# stackcollapse.py - format perf samples with one line per distinct call stack
# SPDX-License-Identifier: GPL-2.0
#
# This script's output has two space-separated fields.  The first is a semicolon
# separated stack including the program name (from the "comm" field) and the
# function names from the call stack.  The second is a count:
#
#  swapper;start_kernel;rest_init;cpu_idle;default_idle;native_safe_halt 2
#
# The file is sorted according to the first field.
#
# Input may be created and processed using:
#
#  perf record -a -g -F 99 sleep 60
#  perf script report stackcollapse > out.stacks-folded
#
# (perf script record stackcollapse works too).
#
# Written by Paolo Bonzini <pbonzini@redhat.com>
# Based on Brendan Gregg's stackcollapse-perf.pl script.

from __future__ import print_function

import os
import sys
from collections import defaultdict
from optparse import OptionParser, make_option

sys.path.append(os.environ['PERF_EXEC_PATH'] + \
    '/scripts/python/Perf-Trace-Util/lib/Perf/Trace')

from perf_trace_context import *
from Core import *
from EventClass import *

# command line parsing

option_list = [
    # formatting options for the bottom entry of the stack
    make_option("--include-tid", dest="include_tid",
                 action="store_true", default=False,
                 help="include thread id in stack"),
    make_option("--include-pid", dest="include_pid",
                 action="store_true", default=False,
                 help="include process id in stack"),
    make_option("--no-comm", dest="include_comm",
                 action="store_false", default=True,
                 help="do not separate stacks according to comm"),
    make_option("--tidy-java", dest="tidy_java",
                 action="store_true", default=False,
                 help="beautify Java signatures"),
    make_option("--kernel", dest="annotate_kernel",
                 action="store_true", default=False,
                 help="annotate kernel functions with _[k]")
]

parser = OptionParser(option_list=option_list)
(opts, args) = parser.parse_args()

if len(args) != 0:
    parser.error("unexpected command line argument")
if opts.include_tid and not opts.include_comm:
    parser.error("requesting tid but not comm is invalid")
if opts.include_pid and not opts.include_comm:
    parser.error("requesting pid but not comm is invalid")

# event handlers

lines = defaultdict(lambda: 0)

def process_event(param_dict):
    def tidy_function_name(sym, dso):
        if sym is None:
            sym = '[unknown]'

        sym = sym.replace(';', ':')
        if opts.tidy_java:
            # the original stackcollapse-perf.pl script gives the
            # example of converting this:
            #    Lorg/mozilla/javascript/MemberBox;.<init>(Ljava/lang/reflect/Method;)V
            # to this:
            #    org/mozilla/javascript/MemberBox:.init
            sym = sym.replace('<', '')
            sym = sym.replace('>', '')
            if sym[0] == 'L' and sym.find('/'):
                sym = sym[1:]
            try:
                sym = sym[:sym.index('(')]
            except ValueError:
                pass

        if opts.annotate_kernel and dso == '[kernel.kallsyms]':
            return sym + '_[k]'
        else:
            return sym

    stack = list()
    if 'callchain' in param_dict:
        for entry in param_dict['callchain']:
            entry.setdefault('sym', dict())
            entry['sym'].setdefault('name', None)
            entry.setdefault('dso', None)
            stack.append(tidy_function_name(entry['sym']['name'],
                                            entry['dso']))
    else:
        param_dict.setdefault('symbol', None)
        param_dict.setdefault('dso', None)
        stack.append(tidy_function_name(param_dict['symbol'],
                                        param_dict['dso']))

    if opts.include_comm:
        comm = param_dict["comm"].replace(' ', '_')
        sep = "-"
        if opts.include_pid:
            comm = comm + sep + str(param_dict['sample']['pid'])
            sep = "/"
        if opts.include_tid:
            comm = comm + sep + str(param_dict['sample']['tid'])
        stack.append(comm)

    stack_string = ';'.join(reversed(stack))
    lines[stack_string] = lines[stack_string] + 1

def trace_end():
    list = sorted(lines)
    for stack in list:
        print("%s %d" % (stack, lines[stack]))
tr>
<tr><td class='sub'>Russell King's ARM Linux kernel tree</td><td class='sub right'>Russell King</td></tr></table>
<table class='tabs'><tr><td>
<a href='/cgit/linux-arm.git/?h=devel-stable'>summary</a><a href='/cgit/linux-arm.git/refs/?h=devel-stable'>refs</a><a href='/cgit/linux-arm.git/log/Documentation?h=devel-stable'>log</a><a href='/cgit/linux-arm.git/tree/Documentation?h=devel-stable'>tree</a><a href='/cgit/linux-arm.git/commit/Documentation?h=devel-stable'>commit</a><a class='active' href='/cgit/linux-arm.git/diff/Documentation?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>diff</a></td><td class='form'><form class='right' method='get' action='/cgit/linux-arm.git/log/Documentation'>
<input type='hidden' name='h' value='devel-stable'/><input type='hidden' name='id2' value='2eacc8479c1f6610288f619a23c374502176ca66'/><select name='qt'>
<option value='grep'>log msg</option>
<option value='author'>author</option>
<option value='committer'>committer</option>
<option value='range'>range</option>
</select>
<input class='txt' type='search' size='10' name='q' value=''/>
<input type='submit' value='search'/>
</form>
</td></tr></table>
<div class='path'>path: <a href='/cgit/linux-arm.git/diff/?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>root</a>/<a href='/cgit/linux-arm.git/diff/Documentation?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation</a></div><div class='content'><div class='cgit-panel'><b>diff options</b><form method='get'><input type='hidden' name='h' value='devel-stable'/><input type='hidden' name='id2' value='2eacc8479c1f6610288f619a23c374502176ca66'/><table><tr><td colspan='2'/></tr><tr><td class='label'>context:</td><td class='ctrl'><select name='context' onchange='this.form.submit();'><option value='1'>1</option><option value='2'>2</option><option value='3' selected='selected'>3</option><option value='4'>4</option><option value='5'>5</option><option value='6'>6</option><option value='7'>7</option><option value='8'>8</option><option value='9'>9</option><option value='10'>10</option><option value='15'>15</option><option value='20'>20</option><option value='25'>25</option><option value='30'>30</option><option value='35'>35</option><option value='40'>40</option></select></td></tr><tr><td class='label'>space:</td><td class='ctrl'><select name='ignorews' onchange='this.form.submit();'><option value='0' selected='selected'>include</option><option value='1'>ignore</option></select></td></tr><tr><td class='label'>mode:</td><td class='ctrl'><select name='dt' onchange='this.form.submit();'><option value='0' selected='selected'>unified</option><option value='1'>ssdiff</option><option value='2'>stat only</option></select></td></tr><tr><td/><td class='ctrl'><noscript><input type='submit' value='reload'/></noscript></td></tr></table></form></div><div class='diffstat-header'><a href='/cgit/linux-arm.git/diff/?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Diffstat</a> (limited to 'Documentation')</div><table summary='diffstat' class='diffstat'><tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/removed/sysfs-selinux-checkreqprot?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/removed/sysfs-selinux-checkreqprot</a> (renamed from Documentation/ABI/obsolete/sysfs-selinux-checkreqprot)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/removed/sysfs-selinux-disable?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/removed/sysfs-selinux-disable</a> (renamed from Documentation/ABI/obsolete/sysfs-selinux-disable)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-acpi-pmprofile?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-acpi-pmprofile</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-block?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-block</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-bus-mhi?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-bus-mhi</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-devices-node?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-devices-node</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-driver-dma-idxd?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-driver-dma-idxd</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-driver-mlxreg-io?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-driver-mlxreg-io</a></td><td class='right'>231</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-driver-speakup?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-driver-speakup</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-hypervisor-xen?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-hypervisor-xen</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/stable/sysfs-module?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-module</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/configfs-usb-gadget?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/configfs-usb-gadget</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/configfs-usb-gadget-mass-storage?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/configfs-usb-gadget-mass-storage</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/configfs-usb-gadget-uvc?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/configfs-usb-gadget-uvc</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-cros-ec?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-cros-ec</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-cxl?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-cxl</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-dell-wmi-ddv?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-dell-wmi-ddv</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-driver-dcc?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-driver-dcc</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-driver-habanalabs?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-driver-habanalabs</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-hisi-hpre?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-hisi-hpre</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-hisi-sec?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-hisi-sec</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-hisi-zip?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-hisi-zip</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-scmi?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-scmi</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/debugfs-scmi-raw?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-scmi-raw</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/ima_policy?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/ima_policy</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/procfs-smaps_rollup?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/procfs-smaps_rollup</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/securityfs-secrets-coco?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/securityfs-secrets-coco</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-amd-pmc?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-amd-pmc</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-amd-pmf?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-amd-pmf</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-ata?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-ata</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-block-zram?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-block-zram</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-bcma?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-bcma</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-cdx?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-cdx</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-coreboot?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-coreboot</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-counter?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-counter</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-css?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-css</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-cxl?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-cxl</a></td><td class='right'>346</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-event_source-devices-caps?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-event_source-devices-caps</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-event_source-devices-iommu?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-event_source-devices-iommu</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-fcoe?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-fcoe</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-adc-max11410?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-adc-max11410</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-bno055?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-bno055</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-proximity?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-proximity</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-sx9324?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-sx9324</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31856?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-temperature-max31856</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31865?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-temperature-max31865</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-timer-stm32</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-iio-vf610?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-vf610</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-nvdimm?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-nvdimm</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-pci?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-pci</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-bus-usb?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-usb</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-bdi?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-bdi</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-cxl?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-cxl</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-firmware?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-firmware</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-firmware-attributes?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-firmware-attributes</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-hwmon?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-hwmon</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-net-peak_usb?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-net-peak_usb</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-power?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-power</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-power-rt9467?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-power-rt9467</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-power-rt9471?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-power-rt9471</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-pwm?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-pwm</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-regulator?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-regulator</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-rtrs-client?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-rtrs-client</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-rtrs-server?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-rtrs-server</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-typec?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-typec</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-usb_power_delivery?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-usb_power_delivery</a></td><td class='right'>249</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-vduse?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-vduse</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-class-watchdog?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-watchdog</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-hisi_ptt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-hisi_ptt</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-mapping?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-mapping</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-physical_location?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-physical_location</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-platform-soc-ipa?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-platform-soc-ipa</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-power?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-power</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-soc?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-soc</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-state_synced?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-state_synced</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-system-cpu?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-system-cpu</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-devices-vfio-dev?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-vfio-dev</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-ccp?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-ccp</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-chromeos-acpi?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-chromeos-acpi</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-habanalabs?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-habanalabs</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-intel-m10-bmc</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-intel_sdsi?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-intel_sdsi</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-qat?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-qat</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-typec-displayport?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-typec-displayport</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-uacce?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-uacce</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-ufs?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-ufs</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-xen-blkback?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-xen-blkback</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-xen-blkfront?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-xen-blkfront</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-driver-zynqmp-fpga?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-zynqmp-fpga</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-fs-erofs?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-fs-erofs</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-fs-f2fs?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-fs-f2fs</a></td><td class='right'>204</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-kernel-cpu_byteorder?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-cpu_byteorder</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-kernel-iommu_groups?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-iommu_groups</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-kernel-livepatch?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-livepatch</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-kernel-mm-damon?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-mm-damon</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-kernel-mm-ksm?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-mm-ksm</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/ABI/testing/sysfs-kernel-slab?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-slab</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/device-mapper/dm-flakey.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/dm-flakey.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/device-mapper/dm-zoned.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/dm-zoned.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/other-usb-cardlist.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/other-usb-cardlist.rst</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/pci-cardlist.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/pci-cardlist.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/platform-cardlist.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/platform-cardlist.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/pulse8-cec.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/pulse8-cec.rst</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/si476x.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/si476x.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/tm6000-cardlist.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/tm6000-cardlist.rst</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/usb-cardlist.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/usb-cardlist.rst</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/v4l-drivers.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/v4l-drivers.rst</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/vimc.dot?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/vimc.dot</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/vimc.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/vimc.rst</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/visl.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/visl.rst</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/vivid.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/vivid.rst</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/media/zr364xx.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/zr364xx.rst</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/cma_debugfs.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/cma_debugfs.rst</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/concepts.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/concepts.rst</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/damon/index.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/index.rst</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/damon/lru_sort.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/lru_sort.rst</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/damon/reclaim.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/reclaim.rst</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/damon/start.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/start.rst</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/damon/usage.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/usage.rst</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/hugetlbpage.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/hugetlbpage.rst</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/idle_page_tracking.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/idle_page_tracking.rst</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/index.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/index.rst</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/ksm.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/ksm.rst</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/memory-hotplug.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/memory-hotplug.rst</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/multigen_lru.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/multigen_lru.rst</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/numa_memory_policy.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/numa_memory_policy.rst</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/numaperf.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/numaperf.rst</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/pagemap.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/pagemap.rst</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/shrinker_debugfs.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/shrinker_debugfs.rst</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/soft-dirty.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/soft-dirty.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/swap_numa.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/swap_numa.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/transhuge.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/transhuge.rst</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/userfaultfd.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/userfaultfd.rst</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/mm/zswap.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/zswap.rst</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/nfs/nfs-client.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/nfs/nfs-client.rst</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/perf/alibaba_pmu.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/perf/alibaba_pmu.rst</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/admin-guide/perf/hisi-pcie-pmu.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/perf/hisi-pcie-pmu.rst</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,corstone1000.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml</a> (renamed from Documentation/devicetree/bindings/arm/ete.yaml)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,integrator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,integrator.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,realview.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,realview.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml</a> (renamed from Documentation/devicetree/bindings/arm/trbe.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,versatile.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,versatile.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/atmel-at91.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/atmel-at91.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/atmel-sysregs.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/atmel-sysregs.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/axxia.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/axxia.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/bitmain.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bitmain.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/calxeda.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/calxeda.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/cci-control-port.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/cci-control-port.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/cpus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/cpus.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/digicolor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/digicolor.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/fsl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/fsl.yaml</a></td><td class='right'>356</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.9%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/hpe,gxp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/hpe,gxp.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/intel,keembay.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/intel,keembay.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/intel,socfpga.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/intel,socfpga.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/marvell/marvell,ac5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/marvell,ac5.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/microchip,sparx5.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/moxart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/moxart.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/mstar/mstar.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mstar/mstar.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/npcm/npcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/npcm/npcm.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/omap/prcm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/omap/prcm.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/oxnas.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/oxnas.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/pmu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/psci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/psci.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/qcom-soc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/qcom-soc.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/qcom.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/qcom.yaml</a></td><td class='right'>828</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 84.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/rda.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/rda.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/realtek.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/realtek.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/rockchip.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/rockchip.yaml</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/rockchip/pmu.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/socionext/uniphier.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sp810.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sp810.txt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sp810.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sp810.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/spe-pmu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/spe-pmu.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/spear.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/spear.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sti.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sti.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/stm32/stm32.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/stm32/stm32.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sunxi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/swir.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/swir.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/syna.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/syna.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/tegra.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/tesla.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tesla.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/ti/k3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/ti/k3.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/toshiba.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/toshiba.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/ux500.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/ux500.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/versatile-sysreg.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/versatile-sysreg.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/vexpress-config.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/vexpress-config.yaml</a></td><td class='right'>285</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/vexpress-sysreg.txt</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/vt8500.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/vt8500.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/arm/xilinx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/xilinx.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/ahci-ceva.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/ahci-ceva.txt</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/ahci-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/ahci-common.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/ahci-platform.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/ahci-platform.yaml</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/ata-generic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/ata-generic.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/sata-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/sata-common.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/sata_highbank.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/sata_highbank.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/palmbus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/palmbus.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/qcom,ssc-block-bus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/qcom,ssc-block-bus.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/ti-sysc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/ti-sysc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/bus/xlnx,versal-net-cdx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/xlnx,versal-net-cdx.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml</a> (renamed from Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/freescale-l2cache.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/freescale-l2cache.txt</a> (renamed from Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/l2c2x0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/l2c2x0.yaml</a> (renamed from Documentation/devicetree/bindings/arm/l2c2x0.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt</a> (renamed from Documentation/devicetree/bindings/arm/mrvl/feroceon.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt</a> (renamed from Documentation/devicetree/bindings/arm/mrvl/tauros2.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/qcom,llcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/qcom,llcc.yaml</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/sifive,ccache0.yaml</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml</a> (renamed from Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/chosen.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/chosen.txt</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/chrome/google,cros-kbd-led-backlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/chrome/google,cros-kbd-led-backlight.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/apple,nco.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/apple,nco.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/calxeda.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/calxeda.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/clock-bindings.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/clock-bindings.txt</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/efm32-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/efm32-clock.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fixed-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/fsl,plldig.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fsl,plldig.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/gpio-gate-clock.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/idt,versaclock5.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx1-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx1-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx21-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx21-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx23-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx23-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx25-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx25-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx27-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx27-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx28-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx28-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx31-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx31-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx35-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx35-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx5-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx5-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx6q-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6q-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6sl-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6sll-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6sx-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6ul-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx7d-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx7d-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx8m-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8m-clock.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imx93-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx93-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ingenic,cgu.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/intel,agilex.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,agilex.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/intel,stratix10.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,stratix10.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/loongson,ls1x-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/loongson,ls1x-clk.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt8186-fhctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt8186-fhctl.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml</a> (renamed from Documentation/devicetree/bindings/clock/microchip,mpfs.yaml)</td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/milbeaut-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/pwm-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/pwm-clock.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/pwm-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/pwm-clock.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,a53pll.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,a7pll.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,kpss-gcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,kpss-gcc.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,lcc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,lcc.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,lcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,lcc.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,lpasscc.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,mmcc.yaml</a></td><td class='right'>289</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 94.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,rpmcc.txt</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/qcom,videocc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,videocc.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,9series.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,9series.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml</a></td><td class='right'>263</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,s3c2443-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s3c2443-clock.txt</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/st/st,flexgen.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/st/st,flexgen.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti,cdce925.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,cdce925.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti,cdce925.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,cdce925.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti,lmk04832.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,lmk04832.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,sci-clk.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti-clkctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti-clkctrl.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/clockdomain.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/clockdomain.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/composite.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/composite.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/davinci/pll.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/davinci/pll.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/dra7-atl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/dra7-atl.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/gate.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/gate.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/interface.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/interface.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/mux.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/mux.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/connector/usb-connector.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/connector/usb-connector.yaml</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpu/cpu-capacity.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpu/cpu-capacity.txt</a> (renamed from Documentation/devicetree/bindings/arm/cpu-capacity.txt)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpu/idle-states.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpu/idle-states.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0-mon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/fsl,sec-v4.0-mon.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/fsl-sec4.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/fsl-sec4.txt</a></td><td class='right'>553</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 10.4%;'/><td class='none' style='width: 89.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/qcom-qce.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/qcom-qce.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/qcom-qce.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/qcom-qce.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/rockchip-crypto.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/devfreq/exynos-bus.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/exynos-bus.txt</a></td><td class='right'>488</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.2%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,hdlcd.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,hdlcd.txt</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,hdlcd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,hdlcd.yaml</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,komeda.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,komeda.txt</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,komeda.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,komeda.yaml</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,malidp.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,malidp.txt</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,malidp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,malidp.yaml</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,pl11x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,pl11x.txt</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/arm,pl11x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,pl11x.yaml</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/atmel,lcdc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/atmel,lcdc.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/analogix_dp.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/anx6345.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/anx6345.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/ps8622.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ps8622.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/ps8640.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ps8640.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml</a></td><td class='right'>255</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/sii902x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sii902x.txt</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/tda998x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/tda998x.txt</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/ti,dlpc3433.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ti,dlpc3433.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.yaml</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/dp-aux-bus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/dp-aux-bus.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/dsi-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/dsi-controller.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/exynos/exynos_dp.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/fsl,lcdif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/fsl,lcdif.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/ilitek,ili9341.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ilitek,ili9341.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ilitek,ili9486.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/imx/fsl,imx-lcdc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/imx/fsl,imx-lcdc.yaml</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/ingenic,ipu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ingenic,ipu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/ingenic,lcd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ingenic,lcd.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/intel,keembay-display.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/intel,keembay-display.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dpu-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-common.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.3%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.4%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml</a></td><td class='right'>301</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/gmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/gmu.yaml</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/gpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/gpu.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/hdmi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/hdmi.txt</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/hdmi.yaml</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/mdp4.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/mdp4.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/mdp5.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/mdp5.txt</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/mdss-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/mdss-common.yaml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml</a></td><td class='right'>272</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml</a></td><td class='right'>427</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml</a></td><td class='right'>280</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml</a></td><td class='right'>332</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml</a></td><td class='right'>334</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml</a></td><td class='right'>223</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml</a></td><td class='right'>345</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml</a></td><td class='right'>333</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/auo,a030jtn01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/auo,a030jtn01.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/display-timings.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/display-timings.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/focaltech,gpt3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/focaltech,gpt3.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/innolux,p120zdg-bf1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/innolux,p120zdg-bf1.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/newvision,nv3051d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/newvision,nv3051d.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-lvds.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/panel-timing.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-timing.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,ams495qa01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,ams495qa01.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/tpo,td.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/tpo,td.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/renesas,du.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/renesas,du.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip,lvds.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip,lvds.yaml</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/simple-framebuffer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/simple-framebuffer.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/sitronix,st7735r.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/st,stm32-dsi.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml</a></td><td class='right'>197</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-display.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-display.yaml</a></td><td class='right'>308</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dsi-padctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dsi-padctl.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt</a></td><td class='right'>675</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 12.7%;'/><td class='none' style='width: 87.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml</a></td><td class='right'>430</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/altr,msgdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/altr,msgdma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/apple,admac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/apple,admac.yaml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/arm,pl330.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/arm,pl330.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/arm-pl08x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/arm-pl08x.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/dma-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/dma-common.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/dma-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/dma-controller.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/dma-router.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/dma-router.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/fsl,edma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl,edma.yaml</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/fsl-edma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-edma.txt</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-imx-dma.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/ingenic,dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ingenic,dma.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/intel,ldma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/intel,ldma.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/mmp-dma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/mmp-dma.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/owl-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/owl-dma.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/qcom,adm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom,adm.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/qcom,gpi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom,gpi.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/qcom_adm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom_adm.txt</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom_bam_dma.txt</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/sprd-dma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/sprd-dma.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/st,stm32-dma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/ste-dma40.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ste-dma40.txt</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/stericsson,dma40.yaml</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti/k3-udma.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dsp/fsl,dsp.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/edac/dmc-520.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/edac/dmc-520.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/eeprom/at24.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/eeprom/at24.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/eeprom/at24.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/eeprom/at24.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/eeprom/at25.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/eeprom/at25.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml</a> (renamed from Documentation/devicetree/bindings/misc/eeprom-93xx46.yaml)</td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/example-schema.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/example-schema.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/maxim,max77843.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/amlogic,meson-gxbb-sm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/amlogic,meson-gxbb-sm.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/arm,scmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/arm,scmi.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/arm,scpi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/arm,scpi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/fsl,scu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/fsl,scu.yaml</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/meson/meson_sm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/meson/meson_sm.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/qcom,scm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/qcom,scm.txt</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/qcom,scm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/qcom,scm.yaml</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/fpga-region.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/fpga-region.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gnss/mediatek.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/mediatek.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gnss/mediatek.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/mediatek.yaml</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gnss/sirfstar.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/sirfstar.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/fcs,fxl6408.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fcs,fxl6408.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-altera.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-altera.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-consumer-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-consumer-common.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-davinci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-davinci.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-latch.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-latch.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-mvebu.txt</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-pisosr.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-sprd.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-sprd.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-stmpe.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-tpic2810.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-tpic2810.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-tpic2810.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-tpic2810.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-xilinx.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-zynq.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/gpio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/loongson,ls1x-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/loongson,ls1x-gpio.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/sifive,gpio.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/sprd,gpio.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/samsung-rotator.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/gpu/vivante,gc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/vivante,gc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/h8300/cpu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/h8300/cpu.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml</a> (renamed from Documentation/devicetree/bindings/arm/renesas,prr.yaml)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml</a> (renamed from Documentation/devicetree/bindings/soc/samsung/exynos-chipid.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml</a> (renamed from Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml)</td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adi,ltc2945.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,ltc2945.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adi,max31760.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,max31760.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/adt7475.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adt7475.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/hpe,gxp-fan-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/hpe,gxp-fan-ctrl.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt</a> (renamed from Documentation/devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt)</td><td class='right'>0</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/lm75.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/lm75.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/microchip,lan966x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/microchip,lan966x.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/national,lm90.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/national,lm90.yaml</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/pwm-fan.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/pwm-fan.txt</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/pwm-fan.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,tmp401.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp401.yaml</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/hwmon/vexpress.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/vexpress.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/apple,i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/apple,i2c.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/brcm,kona-i2c.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/brcm,kona-i2c.yaml</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/hisilicon,ascend910-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/hisilicon,ascend910-i2c.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-efm32.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-efm32.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-gate.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-gate.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-gpio.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-imx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-imx.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mpc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mt7621.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-nomadik.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-nomadik.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-ocores.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-ocores.txt</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-pxa.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-st.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-st.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-synquacer.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/i2c-versatile.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-versatile.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/renesas,riic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/renesas,riic.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i3c/cdns,i3c-master.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/cdns,i3c-master.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i3c/i3c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/i3c.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/kionix,kx022a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/kionix,kx022a.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/adi,max11410.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,max11410.yaml</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,adc081c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc081c.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,ads1100.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads1100.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml</a></td><td class='right'>373</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/maxim,max5522.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/maxim,max5522.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adf4371.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/humidity/dht11.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/humidity/dht11.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/light/rohm,bu27034.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/light/rohm,bu27034.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/light/stk33xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/light/stk33xx.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/bmp085.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/st,st-sensors.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/st,st-sensors.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml</a></td><td class='right'>528</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.8%;'/><td class='rem' style='width: 4.1%;'/><td class='none' style='width: 90.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/adc-joystick.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/adc-joystick.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/adc-keys.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/adc-keys.txt</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/adc-keys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/adc-keys.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/adi,adp5588.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/adi,adp5588.yaml</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml</a></td><td class='right'>950</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/da9062-onkey.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/da9062-onkey.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/elan,ekth6915.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/elan,ekth6915.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/fsl,scu-key.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/fsl,scu-key.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/goodix,gt7375p.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/gpio-beeper.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/gpio-beeper.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/gpio-beeper.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/gpio-beeper.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/gpio-keys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/gpio-keys.yaml</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/hid-over-i2c.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/hid-over-i2c.txt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/hid-over-i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/hid-over-i2c.yaml</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/ibm,op-panel.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ibm,op-panel.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/imx-keypad.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/imx-keypad.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/input.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/input.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/iqs269a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/iqs269a.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/iqs626a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/iqs626a.yaml</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/iqs62x-keys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/iqs62x-keys.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/matrix-keymap.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/matrix-keymap.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/max77650-onkey.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/max77650-onkey.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/microchip,cap11xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/microchip,cap11xx.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/mtk-pmic-keys.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/mtk-pmic-keys.txt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/pwm-beeper.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/pwm-beeper.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/pwm-beeper.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/pwm-beeper.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/pwm-vibrator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/pwm-vibrator.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/qcom,pm8921-pwrkey.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/qcom,pm8921-pwrkey.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/qcom,pm8xxx-pwrkey.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/qcom,pm8xxx-pwrkey.txt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/regulator-haptic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/regulator-haptic.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/snvs-pwrkey.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/snvs-pwrkey.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/ti,drv260x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ti,drv260x.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/ti,drv260x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ti,drv260x.yaml</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/cypress,tt21000.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/cypress,tt21000.yaml</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/goodix.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/himax,hx83112b.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/himax,hx83112b.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/hynitron,cstxxx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/hynitron,cstxxx.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/st,stmfts.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/stmpe.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,qdu1000-rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,qdu1000-rpmh.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,rpmh-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,rpmh-common.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,sm6350-rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,sm6350-rpmh.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml</a></td><td class='right'>317</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,cpu-interrupt-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,cpu-interrupt-controller.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/mediatek,cirq.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mediatek,cirq.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/apple,dart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/apple,dart.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/apple,sart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/apple,sart.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/arm,smmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/arm,smmu.yaml</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/qcom,iommu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/qcom,iommu.txt</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/qcom,iommu.yaml</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ipmi/ssif-bmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ipmi/ssif-bmc.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/common.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/kinetic,ktz8866.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/kinetic,ktz8866.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/common.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/irled/spi-ir-led.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/spi-ir-led.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/kinetic,ktd2692.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/kinetic,ktd2692.yaml</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-aat1290.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-aat1290.txt</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-aw2013.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-aw2013.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-bcm63138.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-gpio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-is31fl319x.txt</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-ktd2692.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-ktd2692.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-lgm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-lgm.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-lp50xx.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-lp55xx.yaml</a></td><td class='right'>269</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-max77650.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-max77650.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-mt6323.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-mt6323.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-mt6360.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-mt6360.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-pca9532.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-pca9532.txt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-pm8058.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-pm8058.txt</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-pwm-multicolor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-pwm-multicolor.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-pwm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml</a></td><td class='right'>188</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-rt4505.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-rt4505.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/leds-sgm3140.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-sgm3140.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/maxim,max77693.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/maxim,max77693.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/nxp,pca953x.yaml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/register-bit-led.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/register-bit-led.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/regulator-led.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/regulator-led.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/leds/ti,tca6507.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/ti,tca6507.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/arm,mhu.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/fsl,mu.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/mtk-gce.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/mtk-gce.txt</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/sti-mailbox.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/sti-mailbox.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allegro,al5e.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allegro,al5e.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/amlogic,meson6-ir.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,meson6-ir.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/atmel,isc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/atmel,isc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec-gpio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec-gpio.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec/amlogic,meson-gx-ao-cec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec/amlogic,meson-gx-ao-cec.yaml</a> (renamed from Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec/cec-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec/cec-common.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec/cec-gpio.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec/samsung,s5p-cec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec/samsung,s5p-cec.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec/st,stih-cec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec/st,stih-cec.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml</a> (renamed from Documentation/devicetree/bindings/media/st,stm32-cec.yaml)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/coda.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/coda.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/exynos-fimc-lite.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos-fimc-lite.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos4-fimc-is.txt</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/exynos5-gsc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos5-gsc.txt</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/fsl-pxp.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/fsl-pxp.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/gpio-ir-receiver.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/gpio-ir-receiver.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/gpio-ir-receiver.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/adv7604.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/adv7604.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ak7375.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ak7375.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/imx219.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/imx219.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/imx258.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/imx258.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/imx290.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/imx290.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/onnn,ar0521.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/onnn,ar0521.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ov2685.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ov2685.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ov5645.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ov5645.txt</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ov8856.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ov8856.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov4689.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov4689.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov5670.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5670.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov5675.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5675.yaml</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov8858.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov8858.yaml</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx296.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx296.yaml</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/st,st-vgxy61.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/st,st-vgxy61.yaml</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/meson-ir.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/meson-ir.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/microchip,csi2dc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/microchip,xisc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/microchip,xisc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/nxp,dw100.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,dw100.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/qcom,venus-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,venus-common.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/rc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,ceu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,ceu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,csi2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,csi2.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,fcp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,fcp.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,isp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,isp.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,vin.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,vin.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/renesas,vsp1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,vsp1.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/rockchip,vdec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rockchip,vdec.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/rockchip-isp1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rockchip-isp1.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/rockchip-vpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rockchip-vpu.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/s5p-cec.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/s5p-cec.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/s5p-mfc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/s5p-mfc.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml</a></td><td class='right'>220</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,fimc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,fimc.yaml</a></td><td class='right'>279</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung-fimc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-fimc.txt</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-mipi-csis.txt</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung-s5c73m3.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-s5c73m3.txt</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung-s5k5baf.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-s5k5baf.txt</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/samsung-s5k6a3.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-s5k6a3.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/si470x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/si470x.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/silabs,si470x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/silabs,si470x.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/stih-cec.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/stih-cec.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/tegra-cec.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/tegra-cec.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/ti,cal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/ti,cal.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/ti,vpe.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/ti,vpe.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/video-interface-devices.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/video-interface-devices.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/media/video-interfaces.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/video-interfaces.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml</a> (renamed from Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml)</td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-peripherals.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-peripherals.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml</a> (renamed from Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml)</td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi-props.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/actions,atc260x.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ampere,smpro.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/aspeed-scu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/aspeed-scu.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/atmel-flexcom.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/atmel-usart.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/atmel-usart.txt</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/brcm,twd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,twd.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/dlg,da9063.yaml</a></td><td class='right'>146</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ene-kb3930.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/ene-kb930.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ene-kb930.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/google,cros-ec.yaml</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/khadas,mcu.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/max77650.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/max77650.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max14577.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/maxim,max5970.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max5970.yaml</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77686.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77693.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/maxim,max77714.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77714.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/maxim,max77802.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77802.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77843.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/mediatek,mt6360.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mediatek,mt6360.yaml</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/mps,mp2629.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mps,mp2629.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/mt6397.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mt6397.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/nxp,bbnsm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/nxp,bbnsm.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/omap-usb-host.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/omap-usb-host.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,tcsr.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/qcom-rpm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom-rpm.txt</a></td><td class='right'>283</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 5.3%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rk808.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rk808.txt</a></td><td class='right'>465</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 8.7%;'/><td class='none' style='width: 91.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml</a></td><td class='right'>219</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml</a></td><td class='right'>257</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml</a></td><td class='right'>384</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml</a></td><td class='right'>282</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/st,stmfx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stmfx.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stpmic1.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/syscon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/syscon.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ti,tps65086.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/wlf,arizona.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/brcm/soc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/brcm/soc.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/cpu_irq.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/cpu_irq.txt</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/cpus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/cpus.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/ingenic/devices.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/ingenic/devices.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/lantiq/rcu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/lantiq/rcu.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/loongson/devices.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/loongson/devices.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/ralink.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/ralink.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mips/realtek-rtl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/realtek-rtl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/idt,89hpesx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/idt,89hpesx.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/idt_89hpesx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/idt_89hpesx.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/qcom,fastrpc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/qcom,fastrpc.txt</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/arm,pl18x.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/fujitsu,sdhci-fujitsu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/fujitsu,sdhci-fujitsu.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/marvell,dove-sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/marvell,dove-sdhci.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/marvell,orion-sdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/marvell,orion-sdio.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml</a></td><td class='right'>277</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mmc-card.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-card.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mmc-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-controller.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mtk-sd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mtk-sd.yaml</a></td><td class='right'>234</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/mxs-mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mxs-mmc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/orion-sdio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/orion-sdio.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/owl-mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/owl-mmc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/samsung,s3c6410-sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/samsung,s3c6410-sdhci.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/samsung-sdhci.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-am654.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sdhci-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-common.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sdhci-dove.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-dove.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sdhci-msm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-msm.txt</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-msm.yaml</a></td><td class='right'>259</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/sunplus,mmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sunplus,mmc.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/aspeed-smc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/aspeed-smc.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/atmel-nand.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/atmel-nand.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/common.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/common.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/denali,nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/denali,nand.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/gpmi-nand.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ingenic,nand.yaml</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mtd-physmap.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/mtd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mtd.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/mtk-nand.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mtk-nand.txt</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/mxc-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mxc-nand.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/nand-chip.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/nand-chip.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/nand-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/nand-controller.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partition.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partition.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/partition.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/partition.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/partitions.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/partitions.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/qcom,nandc.yaml</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/renesas-nandc.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/spi-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/spi-nand.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/ti,elm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ti,elm.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mux/gpio-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/gpio-mux.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mux/mux-consumer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/mux-consumer.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mux/mux-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/mux-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/mux/reg-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/reg-mux.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/actions,owl-emac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/actions,owl-emac.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/adi,adin.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/adi,adin.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/adi,adin1110.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/adi,adin1110.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/altera_tse.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/altera_tse.txt</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/altr,tse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/altr,tse.yaml</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/amlogic,g12a-mdio-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/amlogic,g12a-mdio-mux.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/asix,ax88178.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/asix,ax88178.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/asix,ax88796c.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/asix,ax88796c.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/bluetooth.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/bluetooth.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/bluetooth/bluetooth-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/bluetooth/bluetooth-controller.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml</a> (renamed from Documentation/devicetree/bindings/net/qualcomm-bluetooth.yaml)</td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/brcm,amac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/brcm,amac.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/brcm,systemport.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/brcm,systemport.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/bosch,c_can.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/bosch,c_can.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/bosch,m_can.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/can-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/can-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/can-transceiver.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/can-transceiver.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml</a></td><td class='right'>152</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/sja1000.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/sja1000.txt</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/can/xilinx,can.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/xilinx,can.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/cdns,macb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/cdns,macb.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/cpsw.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/cpsw.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/ar9331.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/ar9331.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/dsa-port.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/dsa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/dsa.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/lan9303.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/lan9303.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml</a></td><td class='right'>812</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 15.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 84.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml</a></td><td class='right'>192</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/mt7530.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/mt7530.txt</a></td><td class='right'>327</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.2%;'/><td class='none' style='width: 93.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/ocelot.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/ocelot.txt</a></td><td class='right'>213</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/qca8k.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/qca8k.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/realtek.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/realtek.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/emac_rockchip.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/emac_rockchip.txt</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/engleder,tsnep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/engleder,tsnep.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ethernet-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ethernet-controller.yaml</a></td><td class='right'>211</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ethernet-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ethernet-phy.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ethernet-switch-port.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ethernet-switch-port.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ethernet-switch.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ethernet-switch.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/fsl,fec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/fsl,fec.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/fsl-fman.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/fsl-fman.txt</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 2.4%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ingenic,mac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ingenic,mac.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell,dfx-server.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,dfx-server.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell,mvusb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,mvusb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell,pp2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,pp2.yaml</a></td><td class='right'>305</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell,prestera.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,prestera.txt</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell,prestera.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,prestera.yaml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell-bluetooth.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell-bluetooth.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell-orion-mdio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell-orion-mdio.txt</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/marvell-pp2.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell-pp2.txt</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mdio-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mdio-gpio.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mdio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mediatek,net.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek,net.yaml</a></td><td class='right'>489</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 90.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek,star-emac.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek-dwmac.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mediatek-net.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek-net.txt</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/micrel,ks8851.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/micrel,ks8851.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/micrel-ksz90x1.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/micrel.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/micrel.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/microchip,lan95xx.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mscc,miim.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mscc,miim.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/mscc-miim.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mscc-miim.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nxp,tja11xx.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qca,ar71xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qca,ar71xx.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qca,ar803x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qca,ar803x.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qcom,ethqos.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ethqos.txt</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qcom,ethqos.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ethqos.yaml</a></td><td class='right'>111</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qcom,ipa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ipa.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/qcom-emac.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom-emac.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ralink,rt2880-net.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/realtek-bluetooth.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/renesas,etheravb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/renesas,etheravb.yaml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml</a></td><td class='right'>262</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/rfkill-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/rfkill-gpio.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/rockchip,emac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/rockchip,emac.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/rockchip-dwmac.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/sff,sfp.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/sff,sfp.txt</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/sff,sfp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/sff,sfp.yaml</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/smsc,lan91c111.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/smsc,lan91c111.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/smsc-lan91c111.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/smsc-lan91c111.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/snps,dwmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/socionext-netsec.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/socionext-netsec.txt</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/sti-dwmac.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/sti-dwmac.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/stm32-dwmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/stm32-dwmac.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ti,dp83822.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,dp83822.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ti,dp83867.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,dp83867.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ti,dp83869.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,dp83869.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/ieee80211.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt</a></td><td class='right'>215</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml</a></td><td class='right'>358</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml</a></td><td class='right'>391</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.2%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml</a> (renamed from Documentation/devicetree/bindings/staging/net/wireless/silabs,wfx.yaml)</td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/xilinx_axienet.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/xilinx_axienet.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/xlnx,emaclite.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/amlogic,meson-gxbb-efuse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/amlogic,meson-gxbb-efuse.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/apple,efuses.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/apple,efuses.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/fsl,scu-ocotp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/fsl,scu-ocotp.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/imx-iim.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/imx-iim.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/mtk-efuse.txt</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/nvmem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/nvmem.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/rmem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/rmem.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml</a></td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/u-boot,env.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/opp/opp-v1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v1.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/opp/opp-v2-base.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2-base.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/opp/opp-v2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/apple,pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/apple,pcie.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml</a></td><td class='right'>168</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/cdns-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns-pcie.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml</a></td><td class='right'>270</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/host-generic-pci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/host-generic-pci.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/layerscape-pci.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/layerscape-pci.txt</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/mediatek-pcie.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/mediatek-pcie.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml</a></td><td class='right'>319</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt</a></td><td class='right'>245</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 4.6%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml</a></td><td class='right'>380</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/pci-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/pci-ep.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/qcom,pcie.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/qcom,pcie.txt</a></td><td class='right'>397</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 7.5%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/qcom,pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/qcom,pcie.yaml</a></td><td class='right'>953</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 17.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 82.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml</a></td><td class='right'>69</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml</a></td><td class='right'>266</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml</a></td><td class='right'>210</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml</a></td><td class='right'>260</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/uniphier-pcie.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/uniphier-pcie.txt</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/xilinx-pcie.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xilinx-pcie.txt</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml</a></td><td class='right'>149</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/peci/peci-aspeed.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/peci/peci-aspeed.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/peci/peci-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/peci/peci-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/perf/arm,ccn.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/arm,ccn.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/perf/arm,cmn.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/arm,cmn.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/perf/arm-ccn.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/arm-ccn.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/perf/riscv,pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/riscv,pmu.yaml</a></td><td class='right'>160</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/perf/spe-pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/spe-pmu.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,g12a-usb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,g12a-usb2-phy.yaml</a> (renamed from Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml)</td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,g12a-usb3-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,g12a-usb3-pcie-phy.yaml</a> (renamed from Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml)</td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,meson-gxl-usb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson-gxl-usb2-phy.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/calxeda-combophy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/cdns,dphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/cdns,dphy.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/fsl,imx8qm-lvds-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/fsl,imx8qm-lvds-phy.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,tphy.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mxs-usb-phy.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt</a></td><td class='right'>779</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 14.7%;'/><td class='none' style='width: 85.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.yaml</a></td><td class='right'>654</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 12.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 87.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/nvidia,tegra186-xusb-padctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra186-xusb-padctl.yaml</a></td><td class='right'>544</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 10.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 89.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml</a></td><td class='right'>632</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 11.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 88.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml</a></td><td class='right'>786</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 14.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 85.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-stih407-usb.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-other.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,hdmi-phy-other.yaml</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml</a></td><td class='right'>299</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml</a></td><td class='right'>189</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml</a></td><td class='right'>244</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml</a></td><td class='right'>394</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml</a></td><td class='right'>496</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 9.3%;'/><td class='none' style='width: 90.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml</a> (renamed from Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml)</td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml</a></td><td class='right'>216</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/renesas,r8a779f0-ether-serdes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/renesas,r8a779f0-ether-serdes.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml</a> (renamed from Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml)</td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/transmit-amplitude.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml)</td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx8m-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8m-pinctrl.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml)</td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml)</td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml</a></td><td class='right'>228</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml</a></td><td class='right'>298</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml</a></td><td class='right'>450</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml</a></td><td class='right'>480</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 9.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml)</td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml</a></td><td class='right'>232</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml</a></td><td class='right'>184</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml)</td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml</a></td><td class='right'>230</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra-pinmux-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra-pinmux-common.yaml</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-dpaux-padctl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-dpaux-padctl.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt</a></td><td class='right'>153</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.9%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.txt</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml</a></td><td class='right'>284</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.1%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.7%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.txt</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml</a></td><td class='right'>130</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml)</td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt</a></td><td class='right'>161</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml</a></td><td class='right'>157</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt</a></td><td class='right'>121</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml</a></td><td class='right'>172</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.txt</a></td><td class='right'>186</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt</a></td><td class='right'>202</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml</a></td><td class='right'>322</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 93.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt</a></td><td class='right'>199</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.7%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml</a></td><td class='right'>125</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt</a></td><td class='right'>187</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.5%;'/><td class='none' style='width: 96.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml)</td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml</a></td><td class='right'>155</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml)</td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml</a></td><td class='right'>181</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml</a></td><td class='right'>119</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt</a></td><td class='right'>176</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml</a></td><td class='right'>144</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml)</td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml)</td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml</a></td><td class='right'>148</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.txt</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.6%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml</a></td><td class='right'>166</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml</a></td><td class='right'>191</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml)</td><td class='right'>105</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml</a></td><td class='right'>164</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml</a> (renamed from Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml)</td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml</a></td><td class='right'>154</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml</a></td><td class='right'>261</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml</a></td><td class='right'>206</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml</a></td><td class='right'>170</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/domain-idle-state.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/domain-idle-state.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/fsl,scu-pd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/fsl,scu-pd.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/mediatek,power-controller.yaml</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/power-domain.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/power-domain.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/qcom,kpss-acc-v2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/qcom,kpss-acc-v2.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/qcom,rpmpd.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/renesas,apmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/renesas,apmu.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/gpio-restart.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/msm-poweroff.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/msm-poweroff.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/qcom,pon.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/qcom,pshold.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/qcom,pshold.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/restart-handler.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/restart-handler.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/rockchip,power-controller.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/rockchip-io-domain.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/adc-battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/adc-battery.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/battery.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq2415x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq2415x.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq24190.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq24190.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq24257.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq24257.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq24735.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq24735.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq2515x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq2515x.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq256xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq256xx.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq25890.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq25890.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq25980.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq25980.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq27xxx.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/charger-manager.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/charger-manager.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/isp1704.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/isp1704.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/olpc-battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/olpc-battery.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/power-supply.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/power-supply.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/richtek,rt9467.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/richtek,rt9467.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/richtek,rt9471.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/richtek,rt9471.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/power/wakeup-source.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/wakeup-source.txt</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/powerpc/fsl/cache_sram.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/fsl/cache_sram.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/fsl/cpus.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/nintendo/wii.txt</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/atmel-pwm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/atmel-pwm.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/clk-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/clk-pwm.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-mediatek.txt</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/pwm-meson.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-meson.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-sifive.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/pwm/sunplus,sp7021-pwm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/sunplus,sp7021-pwm.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/act8865-regulator.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/act8865-regulator.txt</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.2%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/act8945a-regulator.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/act8945a-regulator.txt</a></td><td class='right'>113</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/active-semi,act8600.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/active-semi,act8600.yaml</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/active-semi,act8865.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/active-semi,act8865.yaml</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml</a></td><td class='right'>258</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/anatop-regulator.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/dlg,da9121.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/fan53555.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/fan53555.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/fcs,fan53555.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/fcs,fan53555.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/fixed-regulator.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/gpio-regulator.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/max77650-regulator.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/max8660.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/max8660.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/max8893.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/max8893.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max14577.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max14577.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max20411.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max20411.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max77686.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77686.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max77693.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77693.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77802.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max77843.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77843.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max8952.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max8952.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max8973.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max8973.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max8997.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml</a></td><td class='right'>273</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mps,mp5416.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mps,mp886x.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/pfuze100.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/pfuze100.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/pwm-regulator.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/pwm-regulator.txt</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/pwm-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/pwm-regulator.yaml</a></td><td class='right'>126</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml</a></td><td class='right'>128</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml</a></td><td class='right'>355</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.2%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt</a></td><td class='right'>347</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 6.5%;'/><td class='none' style='width: 93.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml</a></td><td class='right'>354</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 93.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/regulator-output.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/regulator-output.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/regulator.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/richtek,rt4803.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt4803.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/ti,tps62360.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/ti,tps65219.yaml</a></td><td class='right'>173</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/vexpress.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/vexpress.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/wlf,arizona.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml</a></td><td class='right'>429</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 7.7%;'/><td class='none' style='width: 91.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml</a></td><td class='right'>291</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml</a></td><td class='right'>393</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 7.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 92.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt</a></td><td class='right'>212</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 3.9%;'/><td class='none' style='width: 96.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml</a></td><td class='right'>247</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml</a></td><td class='right'>133</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml</a></td><td class='right'>268</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml</a></td><td class='right'>143</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml</a></td><td class='right'>167</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml</a></td><td class='right'>174</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml</a></td><td class='right'>182</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml</a></td><td class='right'>178</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt</a></td><td class='right'>177</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.3%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml</a></td><td class='right'>294</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml</a></td><td class='right'>76</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/framebuffer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/framebuffer.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/memory-region.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/phram.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/phram.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/ramoops.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/ramoops.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/ath79-reset.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/ath79-reset.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/berlin,reset.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/berlin,reset.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/lantiq,reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/lantiq,reset.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/microchip,rst.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/microchip,rst.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/renesas,rst.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/renesas,rst.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/socfpga-reset.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/socfpga-reset.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/st,sti-powerdown.txt</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/sunplus,reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/sunplus,reset.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/ti,sci-reset.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/riscv/cpus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/cpus.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/riscv/microchip.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/microchip.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/riscv/starfive.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/starfive.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/riscv/sunxi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/sunxi.yaml</a></td><td class='right'>74</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/ingenic,rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/ingenic,rng.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/ingenic,trng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/ingenic,trng.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/mtk-rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/mtk-rng.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/omap_rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/omap_rng.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/st,stm32-rng.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/timeriomem_rng.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/amlogic,meson-vrtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/amlogic,meson-vrtc.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/amlogic,meson6-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/amlogic,meson6-rtc.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/epson,rx8900.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/epson,rx8900.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/fsl,scu-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/fsl,scu-rtc.yaml</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/haoyu,hym8563.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/haoyu,hym8563.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/nxp,pcf85363.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf85363.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-ds1307.txt</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml</a></td><td class='right'>102</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-m41t80.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-m41t80.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-meson-vrtc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-meson-vrtc.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-meson.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-meson.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-mt6397.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-mxc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/snvs-rtc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/snvs-rtc.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/st,m41t80.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/st,m41t80.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/trivial-rtc.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/8250.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/8250.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/8250_omap.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/8250_omap.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml</a></td><td class='right'>190</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/cdns,uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/cdns,uart.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/efm32-uart.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/efm32-uart.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl-lpuart.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/ingenic,uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/ingenic,uart.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/mediatek,uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/mediatek,uart.yaml</a></td><td class='right'>122</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/mtk-uart.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/mtk-uart.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/pl011.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/pl011.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/qcom,msm-uart.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,em-uart.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/renesas,hscif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,hscif.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/renesas,sci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,sci.yaml</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/renesas,scif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,scif.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/renesas,scifa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,scifa.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/renesas,scifb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,scifb.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/rs485.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/rs485.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/samsung_uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/samsung_uart.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/serial.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/serial.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/sifive-serial.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/sifive-serial.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/sprd-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/sprd-uart.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/st,stm32-uart.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serio/arm,pl050.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serio/arm,pl050.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serio/ps2-gpio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serio/ps2-gpio.txt</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/serio/ps2-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serio/ps2-gpio.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/slimbus/bus.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/bus.txt</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/slimbus/qcom,slim.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/qcom,slim.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/slimbus/slimbus.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/slimbus.yaml</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.txt</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml</a></td><td class='right'>162</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml</a></td><td class='right'>205</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-dcfg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-dcfg.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-scfg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-scfg.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml</a></td><td class='right'>169</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml</a></td><td class='right'>80</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/devapc.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml</a> (renamed from Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml)</td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml</a></td><td class='right'>147</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/pwrap.txt</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml</a></td><td class='right'>180</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,dcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,dcc.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,msm8976-ramp-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,msm8976-ramp-controller.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml</a></td><td class='right'>267</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 95.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml</a></td><td class='right'>145</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml</a></td><td class='right'>138</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.txt</a></td><td class='right'>131</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt</a></td><td class='right'>137</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.6%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml</a> (renamed from Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml)</td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/renesas/renesas.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/renesas/renesas.yaml</a> (renamed from Documentation/devicetree/bindings/arm/renesas.yaml)</td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/rockchip/grf.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/rockchip/grf.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml</a></td><td class='right'>77</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml</a></td><td class='right'>106</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml</a></td><td class='right'>64</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml</a></td><td class='right'>114</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml</a></td><td class='right'>104</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,adau1372.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau1372.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,adau17x1.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau17x1.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,adau17x1.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau17x1.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,adau1977.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau1977.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,adau7002.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau7002.txt</a></td><td class='right'>19</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,adau7002.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau7002.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,adau7118.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau7118.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,max98363.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,max98363.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/adi,max98396.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,max98396.yaml</a></td><td class='right'>141</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ak4375.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4375.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ak4458.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4458.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ak4613.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4613.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ak4642.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4642.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ak5558.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak5558.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/alc5632.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/alc5632.txt</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,aiu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml</a></td><td class='right'>183</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,t9015.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/apple,mca.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/apple,mca.yaml</a></td><td class='right'>135</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/atmel,sama5d2-classd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel,sama5d2-classd.yaml</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/atmel,sama5d2-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel,sama5d2-i2s.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/atmel,sama5d2-pdmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel,sama5d2-pdmic.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/audio-graph-card.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph-card.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph-card2.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/audio-graph-port.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph-port.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/audio-graph.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/awinic,aw8738.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/awinic,aw8738.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/awinic,aw88395.yaml</a></td><td class='right'>53</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/cirrus,ep9301-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,ep9301-i2s.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/cirrus,madera.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,madera.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/component-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/component-common.yaml</a> (renamed from Documentation/devicetree/bindings/sound/name-prefix.yaml)</td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/da9055.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/da9055.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/dai-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/dai-common.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/dai-params.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/dai-params.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/designware-i2s.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/designware-i2s.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/dmic-codec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/dmic-codec.yaml</a></td><td class='right'>55</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/dmic.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/dmic.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/everest,es8316.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/everest,es8316.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/everest,es8326.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/everest,es8326.yaml</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,micfil.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,micfil.txt</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,micfil.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,micfil.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,mqs.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,mqs.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml</a></td><td class='right'>117</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,sai.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,sai.yaml</a></td><td class='right'>203</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,spdif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,spdif.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,xcvr.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/fsl-sai.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl-sai.txt</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.6%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/imx-audio-card.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/imx-audio-card.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/infineon,peb2466.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/infineon,peb2466.yaml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ingenic,aic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ingenic,aic.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ingenic,codec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ingenic,codec.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/linux,bt-sco.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/max98090.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98090.txt</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/max98095.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98095.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/max98357a.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98357a.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/max98371.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98371.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/max98504.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98504.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/max9867.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max9867.txt</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max9759.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max9759.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max9759.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max9759.yaml</a></td><td class='right'>45</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max98090.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98090.yaml</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max98095.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98095.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max98357a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98357a.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max98371.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98371.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max98390.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98390.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max98504.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98504.yaml</a></td><td class='right'>86</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max98520.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98520.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/maxim,max9867.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max9867.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml</a></td><td class='right'>208</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smcc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smcc.yaml</a> (renamed from Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml)</td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml</a> (renamed from Documentation/devicetree/bindings/sound/microchip,pdmc.yaml)</td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdifrx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/microchip,sama7g5-spdifrx.yaml</a> (renamed from Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml)</td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdiftx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/microchip,sama7g5-spdiftx.yaml</a> (renamed from Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml)</td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt6358.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt6358.txt</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt6359.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt6359.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1011-rt5682.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1011-rt5682.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a> (renamed from Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml)</td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/mvebu-audio.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mvebu-audio.txt</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nau8315.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8315.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nau8821.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8821.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nau8822.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8822.txt</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nau8825.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8825.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml</a></td><td class='right'>90</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml</a></td><td class='right'>87</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml</a></td><td class='right'>150</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml</a></td><td class='right'>93</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6adm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6adm.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6adm.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6afe.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6afe.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6afe.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6apm.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6asm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6asm.txt</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6asm.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6core.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6core.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6core.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6core.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6prm.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,sdm845.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,sdm845.txt</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd9335.txt</a></td><td class='right'>123</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.3%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,wcd9335.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd9335.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/realtek,alc5632.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/realtek,alc5632.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/renesas,fsi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/renesas,fsi.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/renesas,idt821034.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/renesas,idt821034.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/renesas,rsnd.yaml</a></td><td class='right'>209</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 96.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/richtek,rt9120.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/richtek,rt9120.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rockchip,pdm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip,pdm.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip-i2s.yaml</a></td><td class='right'>17</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip-spdif.yaml</a></td><td class='right'>23</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rohm,bd28623.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rohm,bd28623.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rt5640.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rt5640.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rt5659.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rt5659.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/rt5682.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rt5682.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung,arndale.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,arndale.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung,odroid.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,odroid.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung,snow.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,snow.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung,tm2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,tm2.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/samsung-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung-i2s.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/serial-midi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/serial-midi.yaml</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/sgtl5000.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/sgtl5000.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/simple-audio-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/simple-audio-mux.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/simple-card.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/simple-card.yaml</a></td><td class='right'>46</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/sound-dai.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/sound-dai.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/st,stm32-sai.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tas2562.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas2562.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tas2770.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas2770.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='mov'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tas27xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas27xx.yaml</a> (renamed from Documentation/devicetree/bindings/sound/tas2764.yaml)</td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tas571x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas571x.txt</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tas5720.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas5720.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tas5805m.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas5805m.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/test-component.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/test-component.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ti,pcm3168a.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,pcm3168a.txt</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ti,pcm3168a.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,pcm3168a.yaml</a></td><td class='right'>107</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ti,src4xxx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,src4xxx.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml</a></td><td class='right'>165</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tlv320adcx140.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/tlv320aic3x.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tlv320aic3x.txt</a></td><td class='right'>97</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/ts3a227e.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ts3a227e.txt</a></td><td class='right'>30</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,arizona.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,arizona.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8510.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8510.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8523.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8523.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8524.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8524.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8580.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8580.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8711.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8711.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8728.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8728.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8731.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8731.yaml</a></td><td class='right'>99</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8737.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8737.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8753.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8753.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8940.yaml</a></td><td class='right'>60</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8960.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8961.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8961.yaml</a></td><td class='right'>43</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8962.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8962.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8978.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8994.yaml</a></td><td class='right'>194</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wm8510.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8510.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wm8960.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8960.txt</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/wm8994.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8994.txt</a></td><td class='right'>112</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.1%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sound/zl38060.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/zl38060.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soundwire/qcom,sdw.txt</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.8%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/amlogic,a1-spifc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/amlogic,a1-spifc.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml</a></td><td class='right'>108</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml</a></td><td class='right'>82</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/atmel,quadspi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml</a></td><td class='right'>134</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.5%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml</a></td><td class='right'>75</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/cdns,xspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/cdns,xspi.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/efm32-spi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/efm32-spi.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml</a></td><td class='right'>56</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/ingenic,spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/ingenic,spi.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml</a></td><td class='right'>124</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/mxs-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mxs-spi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml</a></td><td class='right'>32</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/omap-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/omap-spi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml</a></td><td class='right'>118</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-qup.txt</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.9%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml</a></td><td class='right'>81</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/renesas,hspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/renesas,hspi.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/renesas,rspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/renesas,rspi.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/samsung,spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/samsung,spi.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/socionext,f-ospi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/socionext,f-ospi.yaml</a></td><td class='right'>57</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml</a></td><td class='right'>73</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt</a></td><td class='right'>33</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-cadence.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-cadence.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-controller.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-controller.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-davinci.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-davinci.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-gpio.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-mt7621.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-mt7621.txt</a></td><td class='right'>26</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-mux.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-pl022.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-pl022.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-rockchip.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-rockchip.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-sifive.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-sifive.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-xilinx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-xilinx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/spi_atmel.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi_atmel.txt</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/st,ssc-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/st,ssc-spi.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/st,stm32-spi.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt</a></td><td class='right'>65</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml</a></td><td class='right'>94</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 1.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sram/qcom,imem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sram/qcom,imem.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sram/qcom,ocmem.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/sram/sram.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sram/sram.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/generic-adc-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/generic-adc-thermal.yaml</a></td><td class='right'>84</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/imx-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/imx-thermal.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml</a></td><td class='right'>142</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/mediatek-thermal.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml</a></td><td class='right'>85</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-lmh.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml</a></td><td class='right'>116</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-tsens.yaml</a></td><td class='right'>243</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 4.1%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 95.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rcar-thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/sprd-thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/thermal-generic-adc.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-generic-adc.txt</a></td><td class='right'>95</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.8%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/thermal-idle.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-idle.yaml</a></td><td class='right'>156</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 1.4%;'/><td class='none' style='width: 97.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-sensor.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/thermal-zones.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-zones.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml</a></td><td class='right'>96</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/amlogic,meson6-timer.yaml</a></td><td class='right'>54</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/arm,arch_timer.yaml</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/brcm,bcmbca-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/brcm,bcmbca-timer.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/cdns,ttc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/cdns,ttc.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/ingenic,sysost.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/ingenic,tcu.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml</a></td><td class='right'>109</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/qcom,msm-timer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/qcom,msm-timer.txt</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/rda,8810pl-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/rda,8810pl-timer.yaml</a></td><td class='right'>47</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/renesas,cmt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,cmt.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml</a></td><td class='right'>302</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/renesas,tmu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,tmu.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/riscv,timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/riscv,timer.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/sifive,clint.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/sifive,clint.yaml</a></td><td class='right'>27</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml</a></td><td class='right'>58</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/st,stm32-timer.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/ti,timer-dm.yaml</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/ti,timer.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/ti,timer.txt</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml</a></td><td class='right'>92</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timestamp/hardware-timestamps-common.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timestamp/hardware-timestamps-common.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timestamp/hte-consumer.yaml</a></td><td class='right'>39</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml</a></td><td class='right'>140</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/trivial-devices.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/trivial-devices.yaml</a></td><td class='right'>38</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/qcom,ufs.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/renesas,ufs.yaml</a></td><td class='right'>61</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/ufs/sprd,ums9620-ufs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/sprd,ums9620-ufs.yaml</a></td><td class='right'>79</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/am33xx-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/am33xx-usb.txt</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/analogix,anx7411.yaml</a></td><td class='right'>83</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/aspeed,ast2600-udc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/aspeed,ast2600-udc.yaml</a></td><td class='right'>52</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/atmel-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/atmel-usb.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/brcm,bcm3384-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/brcm,bcm3384-usb.txt</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/cdns,usb3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/cdns,usb3.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt</a></td><td class='right'>158</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 3.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml</a></td><td class='right'>448</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 8.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 91.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml</a></td><td class='right'>98</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/da8xx-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/da8xx-usb.txt</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/dwc2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/dwc2.yaml</a></td><td class='right'>25</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.4%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/dwc3-st.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/dwc3-st.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ehci-omap.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ehci-omap.txt</a></td><td class='right'>31</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ehci-orion.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ehci-orion.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ehci-st.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ehci-st.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/faraday,fotg210.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/faraday,fotg210.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/faraday,fotg210.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/faraday,fotg210.yaml</a></td><td class='right'>78</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.5%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/fcs,fusb302.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fcs,fusb302.txt</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/fcs,fusb302.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fcs,fusb302.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/fsl,imx8mq-dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fsl,imx8mq-dwc3.yaml</a></td><td class='right'>48</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/generic-ehci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/generic-ehci.yaml</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/generic-ohci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/generic-ohci.yaml</a></td><td class='right'>42</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/generic-xhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/generic-xhci.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/genesys,gl850g.yaml</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml</a></td><td class='right'>110</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ingenic,musb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ingenic,musb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/maxim,max33359.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/maxim,max33359.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml</a></td><td class='right'>36</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/mediatek,musb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,musb.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/npcm7xx-usb.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.3%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt</a></td><td class='right'>132</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 2.5%;'/><td class='none' style='width: 97.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.yaml</a></td><td class='right'>200</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nvidia,tegra186-xusb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra186-xusb.yaml</a></td><td class='right'>171</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nvidia,tegra194-xusb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra194-xusb.yaml</a></td><td class='right'>175</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nvidia,tegra210-xusb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra210-xusb.yaml</a></td><td class='right'>195</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 96.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml</a></td><td class='right'>159</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 3.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nxp,isp1760.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nxp,isp1760.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/nxp,ptn5110.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nxp,ptn5110.yaml</a></td><td class='right'>72</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ohci-nxp.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ohci-nxp.txt</a></td><td class='right'>24</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ohci-omap3.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ohci-omap3.txt</a></td><td class='right'>15</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ohci-st.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ohci-st.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/pxa-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/pxa-usb.txt</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/qcom,dwc3.yaml</a></td><td class='right'>396</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 6.8%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 92.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/realtek,rts5411.yaml</a></td><td class='right'>14</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/renesas,rzv2m-usb3drd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,rzv2m-usb3drd.yaml</a></td><td class='right'>129</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.7%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml</a></td><td class='right'>63</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,usbhs.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml</a></td><td class='right'>100</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/richtek,rt1719.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml</a></td><td class='right'>115</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/smsc,usb3503.yaml</a></td><td class='right'>59</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 98.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/snps,dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/snps,dwc3.yaml</a></td><td class='right'>62</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/spear-usb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/spear-usb.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/st,stusb160x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/st,stusb160x.yaml</a></td><td class='right'>20</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/st,typec-stm32g0.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/st,typec-stm32g0.yaml</a></td><td class='right'>91</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,am62-usb.yaml</a></td><td class='right'>103</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,tps6598x.yaml</a></td><td class='right'>13</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/ti,usb8041.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,usb8041.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/typec-tcpci.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/typec-tcpci.txt</a></td><td class='right'>49</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.9%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb-device.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-device.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb-drd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-drd.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb-hcd.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-hcd.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml</a></td><td class='right'>10</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb-xhci.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-xhci.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb251xb.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb251xb.txt</a></td><td class='right'>89</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.7%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usb251xb.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb251xb.yaml</a></td><td class='right'>271</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 5.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 94.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/usbmisc-imx.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usbmisc-imx.txt</a></td><td class='right'>18</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/vialab,vl817.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/vialab,vl817.yaml</a></td><td class='right'>71</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/vendor-prefixes.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a></td><td class='right'>179</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.6%;'/><td class='none' style='width: 96.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/virtio/iommu.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/virtio/iommu.txt</a></td><td class='right'>66</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.2%;'/><td class='none' style='width: 98.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/virtio/mmio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/virtio/mmio.yaml</a></td><td class='right'>4</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/virtio/pci-iommu.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/virtio/pci-iommu.yaml</a></td><td class='right'>101</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/virtio/virtio-device.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/virtio/virtio-device.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/w1/maxim,ds2482.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/w1/maxim,ds2482.yaml</a></td><td class='right'>44</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/w1/w1-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/w1/w1-gpio.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml</a></td><td class='right'>29</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.3%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/alphascale,asm9260-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/alphascale,asm9260-wdt.yaml</a></td><td class='right'>70</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/alphascale-asm9260.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/alphascale-asm9260.txt</a></td><td class='right'>35</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.7%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/amlogic,meson6-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/amlogic,meson6-wdt.yaml</a></td><td class='right'>50</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.9%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.1%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/apple,wdt.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm,sp805.yaml</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml</a></td><td class='right'>9</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/atmel,at91sam9-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/atmel,at91sam9-wdt.yaml</a></td><td class='right'>127</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.4%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/atmel-wdt.txt</a></td><td class='right'>51</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 1.0%;'/><td class='none' style='width: 99.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/da9062-wdt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/da9062-wdt.txt</a></td><td class='right'>6</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.txt</a></td><td class='right'>22</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml</a></td><td class='right'>67</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/fsl,scu-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/fsl,scu-wdt.yaml</a></td><td class='right'>34</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.4%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml</a></td><td class='right'>37</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.6%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml</a></td><td class='right'>7</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/gpio-wdt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/gpio-wdt.txt</a></td><td class='right'>28</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 99.5%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/linux,wdt-gpio.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/linux,wdt-gpio.yaml</a></td><td class='right'>68</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.7%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/mediatek,mt7621-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mediatek,mt7621-wdt.yaml</a></td><td class='right'>40</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml</a></td><td class='right'>88</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 1.7%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 98.3%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/meson-wdt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/meson-wdt.txt</a></td><td class='right'>21</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.4%;'/><td class='none' style='width: 99.6%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/mt7621-wdt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mt7621-wdt.txt</a></td><td class='right'>12</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='del'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mtk-wdt.txt</a></td><td class='right'>41</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.8%;'/><td class='none' style='width: 99.2%;'/></tr></table></td></tr>
<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt</a></td><td class='right'>3</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml</a></td><td class='right'>136</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.1%;'/><td class='rem' style='width: 0.5%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml</a></td><td class='right'>5</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.9%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/networking/device_drivers/can/ctu/fsm_txt_buffer_user.svg?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/can/ctu/fsm_txt_buffer_user.svg</a></td><td class='right'>151</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.8%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.2%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/networking/device_drivers/ethernet/amd/pds_core.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/amd/pds_core.rst</a></td><td class='right'>139</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.6%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.4%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst</a></td><td class='right'>11</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst</a></td><td class='right'>2</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/networking/device_drivers/wwan/index.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/wwan/index.rst</a></td><td class='right'>1</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.0%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 100.0%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='add'><a href='/cgit/linux-arm.git/diff/Documentation/networking/device_drivers/wwan/t7xx.rst?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/wwan/t7xx.rst</a></td><td class='right'>120</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 2.3%;'/><td class='rem' style='width: 0.0%;'/><td class='none' style='width: 97.7%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/scsi/ChangeLog.megaraid?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/scsi/ChangeLog.megaraid</a></td><td class='right'>8</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.1%;'/><td class='rem' style='width: 0.1%;'/><td class='none' style='width: 99.8%;'/></tr></table></td></tr>
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<tr><td class='mode'>-rw-r--r--</td><td class='upd'><a href='/cgit/linux-arm.git/diff/Documentation/scsi/ChangeLog.ncr53c8xx?h=devel-stable&amp;id2=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/scsi/ChangeLog.ncr53c8xx</a></td><td class='right'>16</td><td class='graph'><table summary='file diffstat' width='100%'><tr><td class='add' style='width: 0.2%;'/><td class='rem' style='width: 0.2%;'/><td class='none' style='width: 99.7%;'/></tr></table></td></tr>
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</table><div class='diffstat-summary'>4988 files changed, 228268 insertions, 68999 deletions</div><table summary='diff' class='diff'><tr><td><div class='head'>diff --git a/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot b/Documentation/ABI/removed/sysfs-selinux-checkreqprot<br/>index ed6b52ca210f..f599a0a87e8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/obsolete/sysfs-selinux-checkreqprot</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/removed/sysfs-selinux-checkreqprot?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/removed/sysfs-selinux-checkreqprot</a></div><div class='hunk'>@@ -4,6 +4,9 @@ KernelVersion:	2.6.12-rc2 (predates git)</div><div class='ctx'> Contact:	selinux@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> </div><div class='add'>+	REMOVAL UPDATE: The SELinux checkreqprot functionality was removed in</div><div class='add'>+	March 2023, the original deprecation notice is shown below.</div><div class='add'>+</div><div class='ctx'> 	The selinuxfs "checkreqprot" node allows SELinux to be configured</div><div class='ctx'> 	to check the protection requested by userspace for mmap/mprotect</div><div class='ctx'> 	calls instead of the actual protection applied by the kernel.</div><div class='head'>diff --git a/Documentation/ABI/obsolete/sysfs-selinux-disable b/Documentation/ABI/removed/sysfs-selinux-disable<br/>index c340278e3cf8..cb783c64cab3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/obsolete/sysfs-selinux-disable?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/obsolete/sysfs-selinux-disable</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/removed/sysfs-selinux-disable?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/removed/sysfs-selinux-disable</a></div><div class='hunk'>@@ -4,6 +4,9 @@ KernelVersion:	2.6.12-rc2 (predates git)</div><div class='ctx'> Contact:	selinux@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> </div><div class='add'>+	REMOVAL UPDATE: The SELinux runtime disable functionality was removed</div><div class='add'>+	in March 2023, the original deprecation notice is shown below.</div><div class='add'>+</div><div class='ctx'> 	The selinuxfs "disable" node allows SELinux to be disabled at runtime</div><div class='ctx'> 	prior to a policy being loaded into the kernel.  If disabled via this</div><div class='ctx'> 	mechanism, SELinux will remain disabled until the system is rebooted.</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-acpi-pmprofile b/Documentation/ABI/stable/sysfs-acpi-pmprofile<br/>index 2d6314f0e4e4..cd55e421d921 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-acpi-pmprofile?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-acpi-pmprofile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-acpi-pmprofile?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-acpi-pmprofile</a></div><div class='hunk'>@@ -2,16 +2,17 @@ What:		/sys/firmware/acpi/pm_profile</div><div class='ctx'> Date:		03-Nov-2011</div><div class='ctx'> KernelVersion:	v3.2</div><div class='ctx'> Contact:	linux-acpi@vger.kernel.org</div><div class='del'>-Description:	The ACPI pm_profile sysfs interface exports the platform</div><div class='del'>-		power management (and performance) requirement expectations</div><div class='del'>-		as provided by BIOS. The integer value is directly passed as</div><div class='del'>-		retrieved from the FADT ACPI table.</div><div class='add'>+Description:	The ACPI pm_profile sysfs interface exposes the preferred</div><div class='add'>+		power management (and performance) profile of the platform</div><div class='add'>+		as provided in the ACPI FADT Preferred_PM_Profile field.</div><div class='ctx'> </div><div class='del'>-Values:	        For possible values see ACPI specification:</div><div class='del'>-		5.2.9 Fixed ACPI Description Table (FADT)</div><div class='del'>-		Field: Preferred_PM_Profile</div><div class='add'>+		The integer value is directly passed as retrieved from the FADT.</div><div class='ctx'> </div><div class='del'>-		Currently these values are defined by spec:</div><div class='add'>+Values:	        For the possible values refer to the Preferred_PM_Profile field</div><div class='add'>+		definition in Table 5.9 "FADT Format", Section 5.2.9 "Fixed ACPI</div><div class='add'>+		Description Table (FADT)" of the ACPI specification.</div><div class='add'>+</div><div class='add'>+		As of ACPI 6.5, the following values are defined:</div><div class='ctx'> </div><div class='ctx'> 		== =================</div><div class='ctx'> 		0  Unspecified</div><div class='hunk'>@@ -22,5 +23,6 @@ Values:	        For possible values see ACPI specification:</div><div class='ctx'> 		5  SOHO Server</div><div class='ctx'> 		6  Appliance PC</div><div class='ctx'> 		7  Performance Server</div><div class='del'>-		&gt;7 Reserved</div><div class='add'>+		8  Tablet</div><div class='add'>+		&gt;8 Reserved</div><div class='ctx'> 		== =================</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-block b/Documentation/ABI/stable/sysfs-block<br/>index e8797cd09aff..c57e5b7cb532 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-block?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-block</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-block?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-block</a></div><div class='hunk'>@@ -260,6 +260,15 @@ Description:</div><div class='ctx'> 		for discards, and don't read this file.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+What:		/sys/block/&lt;disk&gt;/queue/dma_alignment</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	linux-block@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Reports the alignment that user space addresses must have to be</div><div class='add'>+		used for raw block device access with O_DIRECT and other driver</div><div class='add'>+		specific passthrough mechanisms.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/queue/fua</div><div class='ctx'> Date:		May 2018</div><div class='ctx'> Contact:	linux-block@vger.kernel.org</div><div class='hunk'>@@ -327,18 +336,11 @@ What:		/sys/block/&lt;disk&gt;/queue/io_poll_delay</div><div class='ctx'> Date:		November 2016</div><div class='ctx'> Contact:	linux-block@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		[RW] If polling is enabled, this controls what kind of polling</div><div class='del'>-		will be performed. It defaults to -1, which is classic polling.</div><div class='add'>+		[RW] This was used to control what kind of polling will be</div><div class='add'>+		performed.  It is now fixed to -1, which is classic polling.</div><div class='ctx'> 		In this mode, the CPU will repeatedly ask for completions</div><div class='del'>-		without giving up any time.  If set to 0, a hybrid polling mode</div><div class='del'>-		is used, where the kernel will attempt to make an educated guess</div><div class='del'>-		at when the IO will complete. Based on this guess, the kernel</div><div class='del'>-		will put the process issuing IO to sleep for an amount of time,</div><div class='del'>-		before entering a classic poll loop. This mode might be a little</div><div class='del'>-		slower than pure classic polling, but it will be more efficient.</div><div class='del'>-		If set to a value larger than 0, the kernel will put the process</div><div class='del'>-		issuing IO to sleep for this amount of microseconds before</div><div class='del'>-		entering classic polling.</div><div class='add'>+		without giving up any time.</div><div class='add'>+		&lt;deprecated&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/queue/io_timeout</div><div class='hunk'>@@ -423,7 +425,8 @@ Contact:	linux-block@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> 		[RW] This is the maximum number of kilobytes that the block</div><div class='ctx'> 		layer will allow for a filesystem request. Must be smaller than</div><div class='del'>-		or equal to the maximum size allowed by the hardware.</div><div class='add'>+		or equal to the maximum size allowed by the hardware. Write 0</div><div class='add'>+		to use default kernel settings.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/queue/max_segment_size</div><div class='hunk'>@@ -695,6 +698,15 @@ Description:</div><div class='ctx'> 		zoned will report "none".</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+What:		/sys/block/&lt;disk&gt;/hidden</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	linux-block@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		[RO] the block device is hidden. it doesn’t produce events, and</div><div class='add'>+		can’t be opened from userspace or using blkdev_get*.</div><div class='add'>+		Used for the underlying components of multipath devices.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> What:		/sys/block/&lt;disk&gt;/stat</div><div class='ctx'> Date:		February 2008</div><div class='ctx'> Contact:	Jerome Marchand &lt;jmarchan@redhat.com&gt;</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-bus-mhi b/Documentation/ABI/stable/sysfs-bus-mhi<br/>index ecfe7662f8d0..96ccc3385a2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-bus-mhi?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-bus-mhi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-bus-mhi?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-bus-mhi</a></div><div class='hunk'>@@ -19,3 +19,13 @@ Description:	The file holds the OEM PK Hash value of the endpoint device</div><div class='ctx'> 		read without having the device power on at least once, the file</div><div class='ctx'> 		will read all 0's.</div><div class='ctx'> Users:		Any userspace application or clients interested in device info.</div><div class='add'>+</div><div class='add'>+What:           /sys/bus/mhi/devices/.../soc_reset</div><div class='add'>+Date:           April 2022</div><div class='add'>+KernelVersion:  5.19</div><div class='add'>+Contact:        mhi@lists.linux.dev</div><div class='add'>+Description:	Initiates a SoC reset on the MHI controller.  A SoC reset is</div><div class='add'>+                a reset of last resort, and will require a complete re-init.</div><div class='add'>+                This can be useful as a method of recovery if the device is</div><div class='add'>+                non-responsive, or as a means of loading new firmware as a</div><div class='add'>+                system administration task.</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-devices-node b/Documentation/ABI/stable/sysfs-devices-node<br/>index 8db67aa472f1..402af4b2b905 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-devices-node?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-devices-node</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-devices-node?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-devices-node</a></div><div class='hunk'>@@ -182,3 +182,42 @@ Date:		November 2021</div><div class='ctx'> Contact:	Jarkko Sakkinen &lt;jarkko@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		The total amount of SGX physical memory in bytes.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/system/node/nodeX/memory_failure/total</div><div class='add'>+Date:		January 2023</div><div class='add'>+Contact:	Jiaqi Yan &lt;jiaqiyan@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The total number of raw poisoned pages (pages containing</div><div class='add'>+		corrupted data due to memory errors) on a NUMA node.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/system/node/nodeX/memory_failure/ignored</div><div class='add'>+Date:		January 2023</div><div class='add'>+Contact:	Jiaqi Yan &lt;jiaqiyan@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Of the raw poisoned pages on a NUMA node, how many pages are</div><div class='add'>+		ignored by memory error recovery attempt, usually because</div><div class='add'>+		support for this type of pages is unavailable, and kernel</div><div class='add'>+		gives up the recovery.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/system/node/nodeX/memory_failure/failed</div><div class='add'>+Date:		January 2023</div><div class='add'>+Contact:	Jiaqi Yan &lt;jiaqiyan@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Of the raw poisoned pages on a NUMA node, how many pages are</div><div class='add'>+		failed by memory error recovery attempt. This usually means</div><div class='add'>+		a key recovery operation failed.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/system/node/nodeX/memory_failure/delayed</div><div class='add'>+Date:		January 2023</div><div class='add'>+Contact:	Jiaqi Yan &lt;jiaqiyan@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Of the raw poisoned pages on a NUMA node, how many pages are</div><div class='add'>+		delayed by memory error recovery attempt. Delayed poisoned</div><div class='add'>+		pages usually will be retried by kernel.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/system/node/nodeX/memory_failure/recovered</div><div class='add'>+Date:		January 2023</div><div class='add'>+Contact:	Jiaqi Yan &lt;jiaqiyan@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Of the raw poisoned pages on a NUMA node, how many pages are</div><div class='add'>+		recovered by memory error recovery attempt.</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-driver-dma-idxd b/Documentation/ABI/stable/sysfs-driver-dma-idxd<br/>index 0c2b613f2373..534b7a3d59fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-driver-dma-idxd?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-driver-dma-idxd</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-driver-dma-idxd?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-driver-dma-idxd</a></div><div class='hunk'>@@ -22,6 +22,7 @@ Date:           Oct 25, 2019</div><div class='ctx'> KernelVersion:  5.6.0</div><div class='ctx'> Contact:        dmaengine@vger.kernel.org</div><div class='ctx'> Description:    The largest number of work descriptors in a batch.</div><div class='add'>+                It's not visible when the device does not support batch.</div><div class='ctx'> </div><div class='ctx'> What:           /sys/bus/dsa/devices/dsa&lt;m&gt;/max_work_queues_size</div><div class='ctx'> Date:           Oct 25, 2019</div><div class='hunk'>@@ -49,6 +50,8 @@ Description:    The total number of read buffers supported by this device.</div><div class='ctx'> 		The read buffers represent resources within the DSA</div><div class='ctx'> 		implementation, and these resources are allocated by engines to</div><div class='ctx'> 		support operations. See DSA spec v1.2 9.2.4 Total Read Buffers.</div><div class='add'>+		It's not visible when the device does not support Read Buffer</div><div class='add'>+		allocation control.</div><div class='ctx'> </div><div class='ctx'> What:           /sys/bus/dsa/devices/dsa&lt;m&gt;/max_transfer_size</div><div class='ctx'> Date:           Oct 25, 2019</div><div class='hunk'>@@ -122,6 +125,8 @@ Contact:        dmaengine@vger.kernel.org</div><div class='ctx'> Description:    The maximum number of read buffers that may be in use at</div><div class='ctx'> 		one time by operations that access low bandwidth memory in the</div><div class='ctx'> 		device. See DSA spec v1.2 9.2.8 GENCFG on Global Read Buffer Limit.</div><div class='add'>+		It's not visible when the device does not support Read Buffer</div><div class='add'>+		allocation control.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/dsa/devices/dsa&lt;m&gt;/cmd_status</div><div class='ctx'> Date:		Aug 28, 2020</div><div class='hunk'>@@ -131,6 +136,22 @@ Description:	The last executed device administrative command's status/error.</div><div class='ctx'> 		Also last configuration error overloaded.</div><div class='ctx'> 		Writing to it will clear the status.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/dsa/devices/dsa&lt;m&gt;/iaa_cap</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion: 6.0.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	IAA (IAX) capability mask. Exported to user space for application</div><div class='add'>+		consumption. This attribute should only be visible on IAA devices</div><div class='add'>+		that are version 2 or later.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/dsa/devices/dsa&lt;m&gt;/event_log_size</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion: 6.4.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	The event log size to be configured. Default is 64 entries and</div><div class='add'>+		occupies 4k size if the evl entry is 64 bytes. It's visible</div><div class='add'>+		only on platforms that support the capability.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/block_on_fault</div><div class='ctx'> Date:		Oct 27, 2020</div><div class='ctx'> KernelVersion:	5.11.0</div><div class='hunk'>@@ -205,6 +226,7 @@ KernelVersion:	5.10.0</div><div class='ctx'> Contact:	dmaengine@vger.kernel.org</div><div class='ctx'> Description:	The max batch size for this workqueue. Cannot exceed device</div><div class='ctx'> 		max batch size. Configurable parameter.</div><div class='add'>+		It's not visible when the device does not support batch.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/ats_disable</div><div class='ctx'> Date:		Nov 13, 2020</div><div class='hunk'>@@ -213,6 +235,16 @@ Contact:	dmaengine@vger.kernel.org</div><div class='ctx'> Description:	Indicate whether ATS disable is turned on for the workqueue.</div><div class='ctx'> 		0 indicates ATS is on, and 1 indicates ATS is off for the workqueue.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/prs_disable</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion: 6.4.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	Controls whether PRS disable is turned on for the workqueue.</div><div class='add'>+		0 indicates PRS is on, and 1 indicates PRS is off for the</div><div class='add'>+		workqueue. This option overrides block_on_fault attribute</div><div class='add'>+		if set. It's visible only on platforms that support the</div><div class='add'>+		capability.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/occupancy</div><div class='ctx'> Date		May 25, 2021</div><div class='ctx'> KernelVersion:	5.14.0</div><div class='hunk'>@@ -227,6 +259,17 @@ Contact:	dmaengine@vger.kernel.org</div><div class='ctx'> Description:	Indicate the number of retires for an enqcmds submission on a sharedwq.</div><div class='ctx'> 		A max value to set attribute is capped at 64.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/op_config</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion:	6.0.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	Shows the operation capability bits displayed in bitmap format</div><div class='add'>+		presented by %*pb printk() output format specifier.</div><div class='add'>+		The attribute can be configured when the WQ is disabled in</div><div class='add'>+		order to configure the WQ to accept specific bits that</div><div class='add'>+		correlates to the operations allowed. It's visible only</div><div class='add'>+		on platforms that support the capability.</div><div class='add'>+</div><div class='ctx'> What:           /sys/bus/dsa/devices/engine&lt;m&gt;.&lt;n&gt;/group_id</div><div class='ctx'> Date:           Oct 25, 2019</div><div class='ctx'> KernelVersion:  5.6.0</div><div class='hunk'>@@ -239,6 +282,8 @@ KernelVersion:	5.17.0</div><div class='ctx'> Contact:	dmaengine@vger.kernel.org</div><div class='ctx'> Description:	Enable the use of global read buffer limit for the group. See DSA</div><div class='ctx'> 		spec v1.2 9.2.18 GRPCFG Use Global Read Buffer Limit.</div><div class='add'>+		It's not visible when the device does not support Read Buffer</div><div class='add'>+		allocation control.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/dsa/devices/group&lt;m&gt;.&lt;n&gt;/read_buffers_allowed</div><div class='ctx'> Date:		Dec 10, 2021</div><div class='hunk'>@@ -247,6 +292,8 @@ Contact:	dmaengine@vger.kernel.org</div><div class='ctx'> Description:	Indicates max number of read buffers that may be in use at one time</div><div class='ctx'> 		by all engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read</div><div class='ctx'> 		Buffers Allowed.</div><div class='add'>+		It's not visible when the device does not support Read Buffer</div><div class='add'>+		allocation control.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/dsa/devices/group&lt;m&gt;.&lt;n&gt;/read_buffers_reserved</div><div class='ctx'> Date:		Dec 10, 2021</div><div class='hunk'>@@ -255,3 +302,54 @@ Contact:	dmaengine@vger.kernel.org</div><div class='ctx'> Description:	Indicates the number of Read Buffers reserved for the use of</div><div class='ctx'> 		engines in the group. See DSA spec v1.2 9.2.18 GRPCFG Read Buffers</div><div class='ctx'> 		Reserved.</div><div class='add'>+		It's not visible when the device does not support Read Buffer</div><div class='add'>+		allocation control.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/dsa/devices/group&lt;m&gt;.&lt;n&gt;/desc_progress_limit</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion:	6.0.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	Allows control of the number of work descriptors that can be</div><div class='add'>+		concurrently processed by an engine in the group as a fraction</div><div class='add'>+		of the Maximum Work Descriptors in Progress value specified in</div><div class='add'>+		the ENGCAP register. The acceptable values are 0 (default),</div><div class='add'>+		1 (1/2 of max value), 2 (1/4 of the max value), and 3 (1/8 of</div><div class='add'>+		the max value). It's visible only on platforms that support</div><div class='add'>+		the capability.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/dsa/devices/group&lt;m&gt;.&lt;n&gt;/batch_progress_limit</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion:	6.0.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	Allows control of the number of batch descriptors that can be</div><div class='add'>+		concurrently processed by an engine in the group as a fraction</div><div class='add'>+		of the Maximum Batch Descriptors in Progress value specified in</div><div class='add'>+		the ENGCAP register. The acceptable values are 0 (default),</div><div class='add'>+		1 (1/2 of max value), 2 (1/4 of the max value), and 3 (1/8 of</div><div class='add'>+		the max value). It's visible only on platforms that support</div><div class='add'>+		the capability.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/dsa&lt;x&gt;\!wq&lt;m&gt;.&lt;n&gt;/file&lt;y&gt;/cr_faults</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion:	6.4.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	Show the number of Completion Record (CR) faults this application</div><div class='add'>+		has caused.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/dsa&lt;x&gt;\!wq&lt;m&gt;.&lt;n&gt;/file&lt;y&gt;/cr_fault_failures</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion:	6.4.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	Show the number of Completion Record (CR) faults failures that this</div><div class='add'>+		application has caused. The failure counter is incremented when the</div><div class='add'>+		driver cannot fault in the address for the CR. Typically this is caused</div><div class='add'>+		by a bad address programmed in the submitted descriptor or a malicious</div><div class='add'>+		submitter is using bad CR address on purpose.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/dsa/devices/wq&lt;m&gt;.&lt;n&gt;/dsa&lt;x&gt;\!wq&lt;m&gt;.&lt;n&gt;/file&lt;y&gt;/pid</div><div class='add'>+Date:		Sept 14, 2022</div><div class='add'>+KernelVersion:	6.4.0</div><div class='add'>+Contact:	dmaengine@vger.kernel.org</div><div class='add'>+Description:	Show the process id of the application that opened the file. This is</div><div class='add'>+		helpful information for a monitor daemon that wants to kill the</div><div class='add'>+		application that opened the file.</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-driver-mlxreg-io b/Documentation/ABI/stable/sysfs-driver-mlxreg-io<br/>index 12c3f895cd2f..60953903d007 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-driver-mlxreg-io?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-driver-mlxreg-io</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-driver-mlxreg-io?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-driver-mlxreg-io</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_health</div><div class='ctx'> Date:		June 2018</div><div class='ctx'> KernelVersion:	4.19</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	This file shows ASIC health status. The possible values are:</div><div class='ctx'> 		0 - health failed, 2 - health OK, 3 - ASIC in booting state.</div><div class='ctx'> </div><div class='hunk'>@@ -11,7 +11,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld1_version</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld2_version</div><div class='ctx'> Date:		June 2018</div><div class='ctx'> KernelVersion:	4.19</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show with which CPLD versions have been burned</div><div class='ctx'> 		on carrier and switch boards.</div><div class='ctx'> </div><div class='hunk'>@@ -20,7 +20,7 @@ Description:	These files show with which CPLD versions have been burned</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/fan_dir</div><div class='ctx'> Date:		December 2018</div><div class='ctx'> KernelVersion:	5.0</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	This file shows the system fans direction:</div><div class='ctx'> 		forward direction - relevant bit is set 0;</div><div class='ctx'> 		reversed direction - relevant bit is set 1.</div><div class='hunk'>@@ -30,7 +30,7 @@ Description:	This file shows the system fans direction:</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_version</div><div class='ctx'> Date:		November 2018</div><div class='ctx'> KernelVersion:	5.0</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show with which CPLD versions have been burned</div><div class='ctx'> 		on LED or Gearbox board.</div><div class='ctx'> </div><div class='hunk'>@@ -39,7 +39,7 @@ Description:	These files show with which CPLD versions have been burned</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/jtag_enable</div><div class='ctx'> Date:		November 2018</div><div class='ctx'> KernelVersion:	5.0</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files enable and disable the access to the JTAG domain.</div><div class='ctx'> 		By default access to the JTAG domain is disabled.</div><div class='ctx'> </div><div class='hunk'>@@ -48,7 +48,7 @@ Description:	These files enable and disable the access to the JTAG domain.</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/select_iio</div><div class='ctx'> Date:		June 2018</div><div class='ctx'> KernelVersion:	4.19</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	This file allows iio devices selection.</div><div class='ctx'> </div><div class='ctx'> 		Attribute select_iio can be written with 0 or with 1. It</div><div class='hunk'>@@ -62,7 +62,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu1_on</div><div class='ctx'> 		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_down</div><div class='ctx'> Date:		June 2018</div><div class='ctx'> KernelVersion:	4.19</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files allow asserting system power cycling, switching</div><div class='ctx'> 		power supply units on and off and system's main power domain</div><div class='ctx'> 		shutdown.</div><div class='hunk'>@@ -89,7 +89,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_short_pb</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_sw_reset</div><div class='ctx'> Date:		June 2018</div><div class='ctx'> KernelVersion:	4.19</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show the system reset cause, as following: power</div><div class='ctx'> 		auxiliary outage or power refresh, ASIC thermal shutdown, halt,</div><div class='ctx'> 		hotswap, watchdog, firmware reset, long press power button,</div><div class='hunk'>@@ -106,7 +106,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_system</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_voltmon_upgrade_fail</div><div class='ctx'> Date:		November 2018</div><div class='ctx'> KernelVersion:	5.0</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show the system reset cause, as following: ComEx</div><div class='ctx'> 		power fail, reset from ComEx, system platform reset, reset</div><div class='ctx'> 		due to voltage monitor devices upgrade failure,</div><div class='hunk'>@@ -119,7 +119,7 @@ Description:	These files show the system reset cause, as following: ComEx</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld4_version</div><div class='ctx'> Date:		November 2018</div><div class='ctx'> KernelVersion:	5.0</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show with which CPLD versions have been burned</div><div class='ctx'> 		on LED board.</div><div class='ctx'> </div><div class='hunk'>@@ -133,7 +133,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_sff_wd</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_swb_wd</div><div class='ctx'> Date:		June 2019</div><div class='ctx'> KernelVersion:	5.3</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show the system reset cause, as following:</div><div class='ctx'> 		COMEX thermal shutdown; wathchdog power off or reset was derived</div><div class='ctx'> 		by one of the next components: COMEX, switch board or by Small Form</div><div class='hunk'>@@ -148,7 +148,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/config1</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/config2</div><div class='ctx'> Date:		January 2020</div><div class='ctx'> KernelVersion:	5.6</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show system static topology identification</div><div class='ctx'> 		like system's static I2C topology, number and type of FPGA</div><div class='ctx'> 		devices within the system and so on.</div><div class='hunk'>@@ -161,7 +161,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_soc</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_sw_pwr_off</div><div class='ctx'> Date:		January 2020</div><div class='ctx'> KernelVersion:	5.6</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show the system reset causes, as following: reset</div><div class='ctx'> 		due to AC power failure, reset invoked from software by</div><div class='ctx'> 		assertion reset signal through CPLD. reset caused by signal</div><div class='hunk'>@@ -173,7 +173,7 @@ Description:	These files show the system reset causes, as following: reset</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pcie_asic_reset_dis</div><div class='ctx'> Date:		January 2020</div><div class='ctx'> KernelVersion:	5.6</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	This file allows to retain ASIC up during PCIe root complex</div><div class='ctx'> 		reset, when attribute is set 1.</div><div class='ctx'> </div><div class='hunk'>@@ -182,7 +182,7 @@ Description:	This file allows to retain ASIC up during PCIe root complex</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/vpd_wp</div><div class='ctx'> Date:		January 2020</div><div class='ctx'> KernelVersion:	5.6</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	This file allows to overwrite system VPD hardware write</div><div class='ctx'> 		protection when attribute is set 1.</div><div class='ctx'> </div><div class='hunk'>@@ -191,7 +191,7 @@ Description:	This file allows to overwrite system VPD hardware write</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/voltreg_update_status</div><div class='ctx'> Date:		January 2020</div><div class='ctx'> KernelVersion:	5.6</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	This file exposes the configuration update status of burnable</div><div class='ctx'> 		voltage regulator devices. The status values are as following:</div><div class='ctx'> 		0 - OK; 1 - CRC failure; 2 = I2C failure; 3 - in progress.</div><div class='hunk'>@@ -201,7 +201,7 @@ Description:	This file exposes the configuration update status of burnable</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/ufm_version</div><div class='ctx'> Date:		January 2020</div><div class='ctx'> KernelVersion:	5.6</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	This file exposes the firmware version of burnable voltage</div><div class='ctx'> 		regulator devices.</div><div class='ctx'> </div><div class='hunk'>@@ -217,7 +217,7 @@ What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld3_version_min</div><div class='ctx'> What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/cpld4_version_min</div><div class='ctx'> Date:		July 2020</div><div class='ctx'> KernelVersion:	5.9</div><div class='del'>-Contact:	Vadim Pasternak &lt;vadimpmellanox.com&gt;</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='ctx'> Description:	These files show with which CPLD part numbers and minor</div><div class='ctx'> 		versions have been burned CPLD devices equipped on a</div><div class='ctx'> 		system.</div><div class='hunk'>@@ -467,3 +467,198 @@ Description:	These files provide the maximum powered required for line card</div><div class='ctx'> 		feeding and line card configuration Id.</div><div class='ctx'> </div><div class='ctx'> 		The files are read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/phy_reset</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file allows to reset PHY 88E1548 when attribute is set 0</div><div class='add'>+		due to some abnormal PHY behavior.</div><div class='add'>+		Expected behavior:</div><div class='add'>+		When phy_reset is written 1, all PHY 88E1548 are released</div><div class='add'>+		from the reset state, when 0 - are hold in reset state.</div><div class='add'>+</div><div class='add'>+		The files are read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/mac_reset</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file allows to reset ASIC MT52132 when attribute is set 0</div><div class='add'>+		due to some abnormal ASIC behavior.</div><div class='add'>+		Expected behavior:</div><div class='add'>+		When mac_reset is written 1, the ASIC MT52132 is released</div><div class='add'>+		from the reset state, when 0 - is hold in reset state.</div><div class='add'>+</div><div class='add'>+		The files are read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/qsfp_pwr_good</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file shows QSFP ports power status. The value is set to 0</div><div class='add'>+		when one of any QSFP ports is plugged. The value is set to 1 when</div><div class='add'>+		there are no any QSFP ports are plugged.</div><div class='add'>+		The possible values are:</div><div class='add'>+		0 - Power good, 1 - Not power good.</div><div class='add'>+</div><div class='add'>+		The files are read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic2_health</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file shows 2-nd ASIC health status. The possible values are:</div><div class='add'>+		0 - health failed, 2 - health OK, 3 - ASIC in booting state.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_reset</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic2_reset</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files allow to each of ASICs by writing 1.</div><div class='add'>+</div><div class='add'>+		The files are write only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/comm_chnl_ready</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file is used to indicate remote end (for example BMC) that system</div><div class='add'>+	        host CPU is ready for sending telemetry data to remote end.</div><div class='add'>+		For indication the file should be written 1.</div><div class='add'>+</div><div class='add'>+		The file is write only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/config3</div><div class='add'>+Date:		January 2020</div><div class='add'>+KernelVersion:	5.6</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	The file indicates COME module hardware configuration.</div><div class='add'>+		The value is pushed by hardware through GPIO pins.</div><div class='add'>+		The purpose is to expose some minor BOM changes for the same system SKU.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_pwr_converter_fail</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file shows the system reset cause due to power converter</div><div class='add'>+		devices failure.</div><div class='add'>+		Value 1 in file means this is reset cause, 0 - otherwise.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_ap_reset</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_ap_reset</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files aim to monitor the status of the External Root of Trust (EROT)</div><div class='add'>+		processor's RESET output to the Application Processor (AP).</div><div class='add'>+		By reading this file, could be determined if the EROT has invalidated or</div><div class='add'>+		revoked AP Firmware, at which point it will hold the AP in RESET until a</div><div class='add'>+		valid firmware is loaded. This protects the AP from running an</div><div class='add'>+		unauthorized firmware. In the normal flow, the AP reset should be released</div><div class='add'>+		after the EROT validates the integrity of the FW, and it should be done so</div><div class='add'>+		as quickly as possible so that the AP boots before the CPU starts to</div><div class='add'>+		communicate to each ASIC.</div><div class='add'>+</div><div class='add'>+		The files are read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_recovery</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_recovery</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_reset</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_reset</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files aim to perform External Root of Trust (EROT) recovery</div><div class='add'>+		sequence after EROT device failure.</div><div class='add'>+		These EROT devices protect ASICs from unauthorized access and in normal</div><div class='add'>+		flow their reset should be released with system power – earliest power</div><div class='add'>+		up stage, so that EROTs can begin boot and authentication process before</div><div class='add'>+		CPU starts to communicate to ASICs.</div><div class='add'>+		Issuing a reset to the EROT while asserting the recovery signal will cause</div><div class='add'>+		the EROT Application Processor to enter recovery mode so that the EROT FW</div><div class='add'>+		can be updated/recovered.</div><div class='add'>+		For reset/recovery the related file should be toggled by 1/0.</div><div class='add'>+</div><div class='add'>+		The files are read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot1_wp</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/erot2_wp</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	These files allow access to External Root of Trust (EROT) for reset</div><div class='add'>+		and recovery sequence after EROT device failure.</div><div class='add'>+		Default is 0 (programming disabled).</div><div class='add'>+		If the system is in locked-down mode writing this file will not be allowed.</div><div class='add'>+</div><div class='add'>+		The files are read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/spi_chnl_select</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file allows SPI chip selection for External Root of Trust (EROT)</div><div class='add'>+		device Out-of-Band recovery.</div><div class='add'>+		File can be written with 0 or with 1. It selects which EROT can be accessed</div><div class='add'>+		through SPI device.</div><div class='add'>+</div><div class='add'>+		The file is read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/asic_pg_fail</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak vadimp@nvidia.com</div><div class='add'>+Description:	This file shows ASIC Power Good status.</div><div class='add'>+		Value 1 in file means ASIC Power Good failed, 0 - otherwise.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd1_boot_fail</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd2_boot_fail</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd_fail</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak vadimp@nvidia.com</div><div class='add'>+Description:	These files are related to clock boards status in system.</div><div class='add'>+		- clk_brd1_boot_fail: warning about 1-st clock board failed to boot from CI.</div><div class='add'>+		- clk_brd2_boot_fail: warning about 2-nd clock board failed to boot from CI.</div><div class='add'>+		- clk_brd_fail: error about common clock board boot failure.</div><div class='add'>+</div><div class='add'>+		The files are read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/clk_brd_prog_en</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file enables programming of clock boards.</div><div class='add'>+		Default is 0 (programming disabled).</div><div class='add'>+		If the system is in locked-down mode writing this file will not be allowed.</div><div class='add'>+</div><div class='add'>+		The file is read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_converter_prog_en</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file enables programming of power converters.</div><div class='add'>+		Default is 0 (programming disabled).</div><div class='add'>+		If the system is in locked-down mode writing this file will not be allowed.</div><div class='add'>+</div><div class='add'>+		The file is read/write.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/reset_ac_ok_fail</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Vadim Pasternak &lt;vadimp@nvidia.com&gt;</div><div class='add'>+Description:	This file shows the system reset cause due to AC power failure.</div><div class='add'>+		Value 1 in file means this is reset cause, 0 - otherwise.</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-driver-speakup b/Documentation/ABI/stable/sysfs-driver-speakup<br/>index dc2a6ba1674b..bcb6831aa114 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-driver-speakup?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-driver-speakup</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-driver-speakup?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-driver-speakup</a></div><div class='hunk'>@@ -35,6 +35,15 @@ Description:	This controls cursor delay when using arrow keys. When a</div><div class='ctx'> 		characters. Set this to a higher value to adjust for the delay</div><div class='ctx'> 		and better synchronisation between cursor position and speech.</div><div class='ctx'> </div><div class='add'>+What:		/sys/accessibility/speakup/cur_phonetic</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	speakup@linux-speakup.org</div><div class='add'>+Description:	This allows speakup to speak letters phoneticaly when arrowing through</div><div class='add'>+		a word letter by letter. This doesn't affect the spelling when typing</div><div class='add'>+		the characters. When cur_phonetic=1, speakup will speak characters</div><div class='add'>+		phoneticaly when arrowing over a letter. When cur_phonetic=0, speakup</div><div class='add'>+		will speak letters as normally.</div><div class='add'>+</div><div class='ctx'> What:		/sys/accessibility/speakup/delimiters</div><div class='ctx'> KernelVersion:	2.6</div><div class='ctx'> Contact:	speakup@linux-speakup.org</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-hypervisor-xen b/Documentation/ABI/stable/sysfs-hypervisor-xen<br/>index 748593c64568..be9ca9981bb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-hypervisor-xen?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-hypervisor-xen</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-hypervisor-xen?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-hypervisor-xen</a></div><div class='hunk'>@@ -120,3 +120,16 @@ Contact:	xen-devel@lists.xenproject.org</div><div class='ctx'> Description:	If running under Xen:</div><div class='ctx'> 		The Xen version is in the format &lt;major&gt;.&lt;minor&gt;&lt;extra&gt;</div><div class='ctx'> 		This is the &lt;minor&gt; part of it.</div><div class='add'>+</div><div class='add'>+What:		/sys/hypervisor/start_flags/*</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3.0</div><div class='add'>+Contact:	xen-devel@lists.xenproject.org</div><div class='add'>+Description:	If running under Xen:</div><div class='add'>+		All bits in Xen's start-flags are represented as</div><div class='add'>+		boolean files, returning '1' if set, '0' otherwise.</div><div class='add'>+		This takes the place of the defunct /proc/xen/capabilities,</div><div class='add'>+		which would contain "control_d" on dom0, and be empty</div><div class='add'>+		otherwise.  This flag is now exposed as "initdomain" in</div><div class='add'>+		addition to the "privileged" flag; all other possible flags</div><div class='add'>+		are accessible as "unknownXX".</div><div class='head'>diff --git a/Documentation/ABI/stable/sysfs-module b/Documentation/ABI/stable/sysfs-module<br/>index 560b4a3278df..41b1f16e8795 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-module?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/stable/sysfs-module</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/stable/sysfs-module?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/stable/sysfs-module</a></div><div class='hunk'>@@ -38,7 +38,7 @@ What:		/sys/module/&lt;MODULENAME&gt;/srcversion</div><div class='ctx'> Date:		Jun 2005</div><div class='ctx'> Description:</div><div class='ctx'> 		If the module source has MODULE_VERSION, this file will contain</div><div class='del'>-		the checksum of the the source code.</div><div class='add'>+		the checksum of the source code.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/module/&lt;MODULENAME&gt;/version</div><div class='ctx'> Date:		Jun 2005</div><div class='head'>diff --git a/Documentation/ABI/testing/configfs-usb-gadget b/Documentation/ABI/testing/configfs-usb-gadget<br/>index b7943aa7e997..a8bb896def54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/configfs-usb-gadget?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/configfs-usb-gadget</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/configfs-usb-gadget?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/configfs-usb-gadget</a></div><div class='hunk'>@@ -143,3 +143,16 @@ Description:</div><div class='ctx'> 		qw_sign		an identifier to be reported as "OS String"</div><div class='ctx'> 				proper</div><div class='ctx'> 		=============	===============================================</div><div class='add'>+</div><div class='add'>+What:		/config/usb-gadget/gadget/webusb</div><div class='add'>+Date:		Dec 2022</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Description:</div><div class='add'>+		This group contains "WebUSB" extension handling attributes.</div><div class='add'>+</div><div class='add'>+		=============	===============================================</div><div class='add'>+		use		flag turning "WebUSB" support on/off</div><div class='add'>+		bcdVersion	bcd WebUSB specification version number</div><div class='add'>+		bVendorCode	one-byte value used for custom per-device</div><div class='add'>+		landingPage	UTF-8 encoded URL of the device's landing page</div><div class='add'>+		=============	===============================================</div><div class='head'>diff --git a/Documentation/ABI/testing/configfs-usb-gadget-mass-storage b/Documentation/ABI/testing/configfs-usb-gadget-mass-storage<br/>index c86b63a7bb43..fc0328069267 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/configfs-usb-gadget-mass-storage?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/configfs-usb-gadget-mass-storage</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/configfs-usb-gadget-mass-storage?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/configfs-usb-gadget-mass-storage</a></div><div class='hunk'>@@ -19,7 +19,7 @@ KernelVersion:	3.13</div><div class='ctx'> Description:</div><div class='ctx'> 		The attributes:</div><div class='ctx'> </div><div class='del'>-		===========	==============================================</div><div class='add'>+		============	==============================================</div><div class='ctx'> 		file		The path to the backing file for the LUN.</div><div class='ctx'> 				Required if LUN is not marked as removable.</div><div class='ctx'> 		ro		Flag specifying access to the LUN shall be</div><div class='hunk'>@@ -32,4 +32,10 @@ Description:</div><div class='ctx'> 				being a CD-ROM.</div><div class='ctx'> 		nofua		Flag specifying that FUA flag</div><div class='ctx'> 				in SCSI WRITE(10,12)</div><div class='del'>-		===========	==============================================</div><div class='add'>+		forced_eject	This write-only file is useful only when</div><div class='add'>+				the function is active. It causes the backing</div><div class='add'>+				file to be forcibly detached from the LUN,</div><div class='add'>+				regardless of whether the host has allowed it.</div><div class='add'>+				Any non-zero number of bytes written will</div><div class='add'>+				result in ejection.</div><div class='add'>+		============	==============================================</div><div class='head'>diff --git a/Documentation/ABI/testing/configfs-usb-gadget-uvc b/Documentation/ABI/testing/configfs-usb-gadget-uvc<br/>index 889ed45be4ca..4feb692c4c1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/configfs-usb-gadget-uvc?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/configfs-usb-gadget-uvc</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/configfs-usb-gadget-uvc?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/configfs-usb-gadget-uvc</a></div><div class='hunk'>@@ -7,6 +7,7 @@ Description:	UVC function directory</div><div class='ctx'> 		streaming_maxburst	0..15 (ss only)</div><div class='ctx'> 		streaming_maxpacket	1..1023 (fs), 1..3072 (hs/ss)</div><div class='ctx'> 		streaming_interval	1..16</div><div class='add'>+		function_name		string [32]</div><div class='ctx'> 		===================	=============================</div><div class='ctx'> </div><div class='ctx'> What:		/config/usb-gadget/gadget/functions/uvc.name/control</div><div class='hunk'>@@ -14,12 +15,14 @@ Date:		Dec 2014</div><div class='ctx'> KernelVersion:	4.0</div><div class='ctx'> Description:	Control descriptors</div><div class='ctx'> </div><div class='del'>-		All attributes read only:</div><div class='add'>+		All attributes read only except enable_interrupt_ep:</div><div class='ctx'> </div><div class='del'>-		================	=============================</div><div class='add'>+		===================	=============================</div><div class='ctx'> 		bInterfaceNumber	USB interface number for this</div><div class='ctx'> 					streaming interface</div><div class='del'>-		================	=============================</div><div class='add'>+		enable_interrupt_ep	flag to enable the interrupt</div><div class='add'>+					endpoint for the VC interface</div><div class='add'>+		===================	=============================</div><div class='ctx'> </div><div class='ctx'> What:		/config/usb-gadget/gadget/functions/uvc.name/control/class</div><div class='ctx'> Date:		Dec 2014</div><div class='hunk'>@@ -51,7 +54,7 @@ Date:		Dec 2014</div><div class='ctx'> KernelVersion:	4.0</div><div class='ctx'> Description:	Default output terminal descriptors</div><div class='ctx'> </div><div class='del'>-		All attributes read only:</div><div class='add'>+		All attributes read only except bSourceID:</div><div class='ctx'> </div><div class='ctx'> 		==============	=============================================</div><div class='ctx'> 		iTerminal	index of string descriptor</div><div class='hunk'>@@ -73,7 +76,7 @@ Date:		Dec 2014</div><div class='ctx'> KernelVersion:	4.0</div><div class='ctx'> Description:	Default camera terminal descriptors</div><div class='ctx'> </div><div class='del'>-		All attributes read only:</div><div class='add'>+		All attributes read only except bmControls, which is read/write:</div><div class='ctx'> </div><div class='ctx'> 		========================  ====================================</div><div class='ctx'> 		bmControls		  bitmap specifying which controls are</div><div class='hunk'>@@ -98,7 +101,7 @@ Date:		Dec 2014</div><div class='ctx'> KernelVersion:	4.0</div><div class='ctx'> Description:	Default processing unit descriptors</div><div class='ctx'> </div><div class='del'>-		All attributes read only:</div><div class='add'>+		All attributes read only except bmControls, which is read/write:</div><div class='ctx'> </div><div class='ctx'> 		===============	========================================</div><div class='ctx'> 		iProcessing	index of string descriptor</div><div class='hunk'>@@ -110,6 +113,34 @@ Description:	Default processing unit descriptors</div><div class='ctx'> 		bUnitID		a non-zero id of this unit</div><div class='ctx'> 		===============	========================================</div><div class='ctx'> </div><div class='add'>+What:		/config/usb-gadget/gadget/functions/uvc.name/control/extensions</div><div class='add'>+Date:		Nov 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Description:	Extension unit descriptors</div><div class='add'>+</div><div class='add'>+What:		/config/usb-gadget/gadget/functions/uvc.name/control/extensions/name</div><div class='add'>+Date:		Nov 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Description:	Extension Unit (XU) Descriptor</div><div class='add'>+</div><div class='add'>+		bLength, bUnitID and iExtension are read-only. All others are</div><div class='add'>+		read-write.</div><div class='add'>+</div><div class='add'>+		=================	========================================</div><div class='add'>+		bLength			size of the descriptor in bytes</div><div class='add'>+		bUnitID			non-zero ID of this unit</div><div class='add'>+		guidExtensionCode	Vendor-specific code identifying the XU</div><div class='add'>+		bNumControls		number of controls in this XU</div><div class='add'>+		bNrInPins		number of input pins for this unit</div><div class='add'>+		baSourceID		list of the IDs of the units or terminals</div><div class='add'>+					to which this XU is connected</div><div class='add'>+		bControlSize		size of the bmControls field in bytes</div><div class='add'>+		bmControls		list of bitmaps detailing which vendor</div><div class='add'>+					specific controls are supported</div><div class='add'>+		iExtension		index of a string descriptor that describes</div><div class='add'>+					this extension unit</div><div class='add'>+		=================	========================================</div><div class='add'>+</div><div class='ctx'> What:		/config/usb-gadget/gadget/functions/uvc.name/control/header</div><div class='ctx'> Date:		Dec 2014</div><div class='ctx'> KernelVersion:	4.0</div><div class='hunk'>@@ -164,7 +195,24 @@ Date:		Dec 2014</div><div class='ctx'> KernelVersion:	4.0</div><div class='ctx'> Description:	Default color matching descriptors</div><div class='ctx'> </div><div class='del'>-		All attributes read only:</div><div class='add'>+		All attributes read/write:</div><div class='add'>+</div><div class='add'>+		========================  ======================================</div><div class='add'>+		bMatrixCoefficients	  matrix used to compute luma and</div><div class='add'>+					  chroma values from the color primaries</div><div class='add'>+		bTransferCharacteristics  optoelectronic transfer</div><div class='add'>+					  characteristic of the source picture,</div><div class='add'>+					  also called the gamma function</div><div class='add'>+		bColorPrimaries		  color primaries and the reference</div><div class='add'>+					  white</div><div class='add'>+		========================  ======================================</div><div class='add'>+</div><div class='add'>+What:		/config/usb-gadget/gadget/functions/uvc.name/streaming/color_matching/name</div><div class='add'>+Date:		Dec 2022</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Description:	Additional color matching descriptors</div><div class='add'>+</div><div class='add'>+		All attributes read/write:</div><div class='ctx'> </div><div class='ctx'> 		========================  ======================================</div><div class='ctx'> 		bMatrixCoefficients	  matrix used to compute luma and</div><div class='hunk'>@@ -196,7 +244,7 @@ Description:	Specific MJPEG format descriptors</div><div class='ctx'> 					read-only</div><div class='ctx'> 		bmaControls		this format's data for bmaControls in</div><div class='ctx'> 					the streaming header</div><div class='del'>-		bmInterfaceFlags	specifies interlace information,</div><div class='add'>+		bmInterlaceFlags	specifies interlace information,</div><div class='ctx'> 					read-only</div><div class='ctx'> 		bAspectRatioY		the X dimension of the picture aspect</div><div class='ctx'> 					ratio, read-only</div><div class='hunk'>@@ -252,7 +300,7 @@ Description:	Specific uncompressed format descriptors</div><div class='ctx'> 					read-only</div><div class='ctx'> 		bmaControls		this format's data for bmaControls in</div><div class='ctx'> 					the streaming header</div><div class='del'>-		bmInterfaceFlags	specifies interlace information,</div><div class='add'>+		bmInterlaceFlags	specifies interlace information,</div><div class='ctx'> 					read-only</div><div class='ctx'> 		bAspectRatioY		the X dimension of the picture aspect</div><div class='ctx'> 					ratio, read-only</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-cros-ec b/Documentation/ABI/testing/debugfs-cros-ec<br/>index 1fe0add99a2a..9a040c6f5e03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-cros-ec?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-cros-ec</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-cros-ec?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-cros-ec</a></div><div class='hunk'>@@ -54,3 +54,25 @@ Description:</div><div class='ctx'> 		this feature.</div><div class='ctx'> </div><div class='ctx'> 		Output will be in the format: "0x%08x\n".</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/&lt;cros-ec-device&gt;/suspend_timeout_ms</div><div class='add'>+Date:		August 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Description:</div><div class='add'>+		Some ECs have a feature where they will track transitions of</div><div class='add'>+		a hardware-controlled sleep line, such as Intel's SLP_S0 line,</div><div class='add'>+		in order to detect cases where a system failed to go into deep</div><div class='add'>+		sleep states. The suspend_timeout_ms file controls the amount of</div><div class='add'>+		time in milliseconds the EC will wait before declaring a sleep</div><div class='add'>+		timeout event and attempting to wake the system.</div><div class='add'>+</div><div class='add'>+		Supply 0 to use the default value coded into EC firmware. Supply</div><div class='add'>+		65535 (EC_HOST_SLEEP_TIMEOUT_INFINITE) to disable the EC sleep</div><div class='add'>+		failure detection mechanism. Values in between 0 and 65535</div><div class='add'>+		indicate the number of milliseconds the EC should wait after a</div><div class='add'>+		sleep transition before declaring a timeout. This includes both</div><div class='add'>+		the duration after a sleep command was received but before the</div><div class='add'>+		hardware line changed, as well as the duration between when the</div><div class='add'>+		hardware line changed and the kernel sent an EC resume command.</div><div class='add'>+</div><div class='add'>+		Output will be in the format: "%u\n".</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-cxl b/Documentation/ABI/testing/debugfs-cxl<br/>new file mode 100644<br/>index 000000000000..fe61d372e3fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-cxl?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-cxl</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+What:		/sys/kernel/debug/cxl/memX/inject_poison</div><div class='add'>+Date:		April, 2023</div><div class='add'>+KernelVersion:	v6.4</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(WO) When a Device Physical Address (DPA) is written to this</div><div class='add'>+		attribute, the memdev driver sends an inject poison command to</div><div class='add'>+		the device for the specified address. The DPA must be 64-byte</div><div class='add'>+		aligned and the length of the injected poison is 64-bytes. If</div><div class='add'>+		successful, the device returns poison when the address is</div><div class='add'>+		accessed through the CXL.mem bus. Injecting poison adds the</div><div class='add'>+		address to the device's Poison List and the error source is set</div><div class='add'>+		to Injected. In addition, the device adds a poison creation</div><div class='add'>+		event to its internal Informational Event log, updates the</div><div class='add'>+		Event Status register, and if configured, interrupts the host.</div><div class='add'>+		It is not an error to inject poison into an address that</div><div class='add'>+		already has poison present and no error is returned. The</div><div class='add'>+		inject_poison attribute is only visible for devices supporting</div><div class='add'>+		the capability.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/memX/clear_poison</div><div class='add'>+Date:		April, 2023</div><div class='add'>+KernelVersion:	v6.4</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(WO) When a Device Physical Address (DPA) is written to this</div><div class='add'>+		attribute, the memdev driver sends a clear poison command to</div><div class='add'>+		the device for the specified address. Clearing poison removes</div><div class='add'>+		the address from the device's Poison List and writes 0 (zero)</div><div class='add'>+		for 64 bytes starting at address. It is not an error to clear</div><div class='add'>+		poison from an address that does not have poison set. If the</div><div class='add'>+		device cannot clear poison from the address, -ENXIO is returned.</div><div class='add'>+		The clear_poison attribute is only visible for devices</div><div class='add'>+		supporting the capability.</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-dell-wmi-ddv b/Documentation/ABI/testing/debugfs-dell-wmi-ddv<br/>new file mode 100644<br/>index 000000000000..fbcc5d6f7388<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-dell-wmi-ddv?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-dell-wmi-ddv</a></div><div class='hunk'>@@ -0,0 +1,21 @@</div><div class='add'>+What:		/sys/kernel/debug/dell-wmi-ddv-&lt;wmi_device_name&gt;/fan_sensor_information</div><div class='add'>+Date:		September 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Armin Wolf &lt;W_Armin@gmx.de&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file contains the contents of the fan sensor information buffer,</div><div class='add'>+		which contains fan sensor entries and a terminating character (0xFF).</div><div class='add'>+</div><div class='add'>+		Each fan sensor entry consists of three bytes with an unknown meaning,</div><div class='add'>+		interested people may use this file for reverse-engineering.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/dell-wmi-ddv-&lt;wmi_device_name&gt;/thermal_sensor_information</div><div class='add'>+Date:		September 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Armin Wolf &lt;W_Armin@gmx.de&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file contains the contents of the thermal sensor information buffer,</div><div class='add'>+		which contains thermal sensor entries and a terminating character (0xFF).</div><div class='add'>+</div><div class='add'>+		Each thermal sensor entry consists of five bytes with an unknown meaning,</div><div class='add'>+		interested people may use this file for reverse-engineering.</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-driver-dcc b/Documentation/ABI/testing/debugfs-driver-dcc<br/>new file mode 100644<br/>index 000000000000..27ed5919d21b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-driver-dcc?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-driver-dcc</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+What:           /sys/kernel/debug/dcc/.../ready</div><div class='add'>+Date:           December 2022</div><div class='add'>+Contact:        Souradeep Chowdhury &lt;quic_schowdhu@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file is used to check the status of the dcc</div><div class='add'>+		hardware if it's ready to receive user configurations.</div><div class='add'>+		A 'Y' here indicates dcc is ready.</div><div class='add'>+</div><div class='add'>+What:           /sys/kernel/debug/dcc/.../trigger</div><div class='add'>+Date:           December 2022</div><div class='add'>+Contact:        Souradeep Chowdhury &lt;quic_schowdhu@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This is the debugfs interface for manual software</div><div class='add'>+		triggers. The trigger can be invoked by writing '1'</div><div class='add'>+		to the file.</div><div class='add'>+</div><div class='add'>+What:           /sys/kernel/debug/dcc/.../config_reset</div><div class='add'>+Date:           December 2022</div><div class='add'>+Contact:        Souradeep Chowdhury &lt;quic_schowdhu@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file is used to reset the configuration of</div><div class='add'>+		a dcc driver to the default configuration. When '1'</div><div class='add'>+		is written to the file, all the previous addresses</div><div class='add'>+		stored in the driver gets removed and users need to</div><div class='add'>+		reconfigure addresses again.</div><div class='add'>+</div><div class='add'>+What:           /sys/kernel/debug/dcc/.../[list-number]/config</div><div class='add'>+Date:		 December 2022</div><div class='add'>+Contact:        Souradeep Chowdhury &lt;quic_schowdhu@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This stores the addresses of the registers which</div><div class='add'>+		can be read in case of a hardware crash or manual</div><div class='add'>+		software triggers. The input addresses type</div><div class='add'>+		can be one of following dcc instructions: read,</div><div class='add'>+		write, read-write, and loop type. The lists need to</div><div class='add'>+		be configured sequentially and not in a overlapping</div><div class='add'>+		manner; e.g. users can jump to list x only after</div><div class='add'>+		list y is configured and enabled. The input format for</div><div class='add'>+		each type is as follows:</div><div class='add'>+</div><div class='add'>+	        i) Read instruction</div><div class='add'>+</div><div class='add'>+		   ::</div><div class='add'>+</div><div class='add'>+		     echo R &lt;addr&gt; &lt;n&gt; &lt;bus&gt; &gt;/sys/kernel/debug/dcc/../[list-number]/config</div><div class='add'>+</div><div class='add'>+		   where:</div><div class='add'>+</div><div class='add'>+		   &lt;addr&gt;</div><div class='add'>+			The address to be read.</div><div class='add'>+</div><div class='add'>+		   &lt;n&gt;</div><div class='add'>+			The addresses word count, starting from address &lt;1&gt;.</div><div class='add'>+			Each word is 32 bits (4 bytes). If omitted, defaulted</div><div class='add'>+			to 1.</div><div class='add'>+</div><div class='add'>+		   &lt;bus type&gt;</div><div class='add'>+			The bus type, which can be either 'apb' or 'ahb'.</div><div class='add'>+			The default is 'ahb' if leaved out.</div><div class='add'>+</div><div class='add'>+		ii) Write instruction</div><div class='add'>+</div><div class='add'>+		    ::</div><div class='add'>+</div><div class='add'>+		      echo W &lt;addr&gt; &lt;n&gt; &lt;bus type&gt; &gt; /sys/kernel/debug/dcc/../[list-number]/config</div><div class='add'>+</div><div class='add'>+		    where:</div><div class='add'>+</div><div class='add'>+		    &lt;addr&gt;</div><div class='add'>+			The address to be written.</div><div class='add'>+</div><div class='add'>+		    &lt;n&gt;</div><div class='add'>+			The value to be written at &lt;addr&gt;.</div><div class='add'>+</div><div class='add'>+		    &lt;bus type&gt;</div><div class='add'>+			The bus type, which can be either 'apb' or 'ahb'.</div><div class='add'>+</div><div class='add'>+	        iii) Read-write instruction</div><div class='add'>+</div><div class='add'>+		     ::</div><div class='add'>+</div><div class='add'>+		       echo RW &lt;addr&gt; &lt;n&gt; &lt;mask&gt; &gt; /sys/kernel/debug/dcc/../[list-number]/config</div><div class='add'>+</div><div class='add'>+		     where:</div><div class='add'>+</div><div class='add'>+		     &lt;addr&gt;</div><div class='add'>+			The address to be read and written.</div><div class='add'>+</div><div class='add'>+		     &lt;n&gt;</div><div class='add'>+		        The value to be written at &lt;addr&gt;.</div><div class='add'>+</div><div class='add'>+		     &lt;mask&gt;</div><div class='add'>+			The value mask.</div><div class='add'>+</div><div class='add'>+		iv) Loop instruction</div><div class='add'>+</div><div class='add'>+		    ::</div><div class='add'>+</div><div class='add'>+		      echo L &lt;loop count&gt; &lt;address count&gt; &lt;address&gt;... &gt; /sys/kernel/debug/dcc/../[list-number]/config</div><div class='add'>+</div><div class='add'>+		    where:</div><div class='add'>+</div><div class='add'>+		    &lt;loop count&gt;</div><div class='add'>+			Number of iterations</div><div class='add'>+</div><div class='add'>+		    &lt;address count&gt;</div><div class='add'>+			total number of addresses to be written</div><div class='add'>+</div><div class='add'>+		    &lt;address&gt;</div><div class='add'>+			Space-separated list of addresses.</div><div class='add'>+</div><div class='add'>+What:           /sys/kernel/debug/dcc/.../[list-number]/enable</div><div class='add'>+Date:           December 2022</div><div class='add'>+Contact:        Souradeep Chowdhury &lt;quic_schowdhu@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This debugfs interface is used for enabling the</div><div class='add'>+		the dcc hardware. A file named "enable" is in the</div><div class='add'>+		directory list number where users can enable/disable</div><div class='add'>+		the specific list by writing boolean (1 or 0) to the</div><div class='add'>+		file.</div><div class='add'>+</div><div class='add'>+		On enabling the dcc, all the addresses specified</div><div class='add'>+		by the user for the corresponding list is written</div><div class='add'>+		into dcc sram which is read by the dcc hardware</div><div class='add'>+		on manual or crash induced triggers. Lists must</div><div class='add'>+		be configured and enabled sequentially, e.g. list</div><div class='add'>+		2 can only be enabled when list 1 have so.</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-driver-habanalabs b/Documentation/ABI/testing/debugfs-driver-habanalabs<br/>index bcf6915987e4..85f6d04f528b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-driver-habanalabs?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-driver-habanalabs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-driver-habanalabs?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-driver-habanalabs</a></div><div class='hunk'>@@ -91,6 +91,13 @@ Description:    Enables the root user to set the device to specific state.</div><div class='ctx'>                 Valid values are "disable", "enable", "suspend", "resume".</div><div class='ctx'>                 User can read this property to see the valid values</div><div class='ctx'> </div><div class='add'>+What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/device_release_watchdog_timeout</div><div class='add'>+Date:           Oct 2022</div><div class='add'>+KernelVersion:  6.2</div><div class='add'>+Contact:        ttayar@habana.ai</div><div class='add'>+Description:    The watchdog timeout value in seconds for a device relese upon</div><div class='add'>+                certain error cases, after which the device is reset.</div><div class='add'>+</div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/dma_size</div><div class='ctx'> Date:           Apr 2021</div><div class='ctx'> KernelVersion:  5.13</div><div class='hunk'>@@ -101,6 +108,15 @@ Description:    Specify the size of the DMA transaction when using DMA to read</div><div class='ctx'>                 When the write is finished, the user can read the "data_dma"</div><div class='ctx'>                 blob</div><div class='ctx'> </div><div class='add'>+What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/dump_razwi_events</div><div class='add'>+Date:           Aug 2022</div><div class='add'>+KernelVersion:  5.20</div><div class='add'>+Contact:        fkassabri@habana.ai</div><div class='add'>+Description:    Dumps all razwi events to dmesg if exist.</div><div class='add'>+                After reading the status register of an existing event</div><div class='add'>+                the routine will clear the status register.</div><div class='add'>+                Usage: cat dump_razwi_events</div><div class='add'>+</div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/dump_security_violations</div><div class='ctx'> Date:           Jan 2021</div><div class='ctx'> KernelVersion:  5.12</div><div class='hunk'>@@ -121,14 +137,16 @@ Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Sets I2C device address for I2C transaction that is generated</div><div class='del'>-                by the device's CPU</div><div class='add'>+                by the device's CPU, Not available when device is loaded with secured</div><div class='add'>+                firmware</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/i2c_bus</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Sets I2C bus address for I2C transaction that is generated by</div><div class='del'>-                the device's CPU</div><div class='add'>+                the device's CPU, Not available when device is loaded with secured</div><div class='add'>+                firmware</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/i2c_data</div><div class='ctx'> Date:           Jan 2019</div><div class='hunk'>@@ -136,39 +154,60 @@ KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Triggers an I2C transaction that is generated by the device's</div><div class='ctx'>                 CPU. Writing to this file generates a write transaction while</div><div class='del'>-                reading from the file generates a read transaction</div><div class='add'>+                reading from the file generates a read transaction, Not available</div><div class='add'>+                when device is loaded with secured firmware</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/i2c_len</div><div class='ctx'> Date:           Dec 2021</div><div class='ctx'> KernelVersion:  5.17</div><div class='ctx'> Contact:        obitton@habana.ai</div><div class='ctx'> Description:    Sets I2C length in bytes for I2C transaction that is generated by</div><div class='del'>-                the device's CPU</div><div class='add'>+                the device's CPU, Not available when device is loaded with secured</div><div class='add'>+                firmware</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/i2c_reg</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Sets I2C register id for I2C transaction that is generated by</div><div class='del'>-                the device's CPU</div><div class='add'>+                the device's CPU, Not available when device is loaded with secured</div><div class='add'>+                firmware</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/led0</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='del'>-Description:    Sets the state of the first S/W led on the device</div><div class='add'>+Description:    Sets the state of the first S/W led on the device, Not available</div><div class='add'>+                when device is loaded with secured firmware</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/led1</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='del'>-Description:    Sets the state of the second S/W led on the device</div><div class='add'>+Description:    Sets the state of the second S/W led on the device, Not available</div><div class='add'>+                when device is loaded with secured firmware</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/led2</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='del'>-Description:    Sets the state of the third S/W led on the device</div><div class='add'>+Description:    Sets the state of the third S/W led on the device, Not available</div><div class='add'>+                when device is loaded with secured firmware</div><div class='add'>+</div><div class='add'>+What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/memory_scrub</div><div class='add'>+Date:           May 2022</div><div class='add'>+KernelVersion:  5.19</div><div class='add'>+Contact:        dhirschfeld@habana.ai</div><div class='add'>+Description:    Allows the root user to scrub the dram memory. The scrubbing</div><div class='add'>+                value can be set using the debugfs file memory_scrub_val.</div><div class='add'>+</div><div class='add'>+What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/memory_scrub_val</div><div class='add'>+Date:           May 2022</div><div class='add'>+KernelVersion:  5.19</div><div class='add'>+Contact:        dhirschfeld@habana.ai</div><div class='add'>+Description:    The value to which the dram will be set to when the user</div><div class='add'>+                scrubs the dram using 'memory_scrub' debugfs file and</div><div class='add'>+                the scrubbing value when using module param 'memory_scrub'</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/mmu</div><div class='ctx'> Date:           Jan 2019</div><div class='hunk'>@@ -190,6 +229,30 @@ Description:    Check and display page fault or access violation mmu errors for</div><div class='ctx'>                 echo "0x200" &gt; /sys/kernel/debug/habanalabs/hl0/mmu_error</div><div class='ctx'>                 cat /sys/kernel/debug/habanalabs/hl0/mmu_error</div><div class='ctx'> </div><div class='add'>+What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/monitor_dump</div><div class='add'>+Date:           Mar 2022</div><div class='add'>+KernelVersion:  5.19</div><div class='add'>+Contact:        osharabi@habana.ai</div><div class='add'>+Description:    Allows the root user to dump monitors status from the device's</div><div class='add'>+                protected config space.</div><div class='add'>+                This property is a binary blob that contains the result of the</div><div class='add'>+                monitors registers dump.</div><div class='add'>+                This custom interface is needed (instead of using the generic</div><div class='add'>+                Linux user-space PCI mapping) because this space is protected</div><div class='add'>+                and cannot be accessed using PCI read.</div><div class='add'>+                This interface doesn't support concurrency in the same device.</div><div class='add'>+                Only supported on GAUDI.</div><div class='add'>+</div><div class='add'>+What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/monitor_dump_trig</div><div class='add'>+Date:           Mar 2022</div><div class='add'>+KernelVersion:  5.19</div><div class='add'>+Contact:        osharabi@habana.ai</div><div class='add'>+Description:    Triggers dump of monitor data. The value to trigger the operation</div><div class='add'>+                must be 1. Triggering the monitor dump operation initiates dump of</div><div class='add'>+                current registers values of all monitors.</div><div class='add'>+                When the write is finished, the user can read the "monitor_dump"</div><div class='add'>+                blob</div><div class='add'>+</div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/set_power_state</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='hunk'>@@ -239,7 +302,7 @@ Description:    Displays a list with information about the currently user</div><div class='ctx'>                 to DMA addresses</div><div class='ctx'> </div><div class='ctx'> What:           /sys/kernel/debug/habanalabs/hl&lt;n&gt;/userptr_lookup</div><div class='del'>-Date:           Aug 2021</div><div class='add'>+Date:           Oct 2021</div><div class='ctx'> KernelVersion:  5.15</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Allows to search for specific user pointers (user virtual</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-hisi-hpre b/Documentation/ABI/testing/debugfs-hisi-hpre<br/>index 396de7bc735d..82abf92df429 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-hisi-hpre?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-hisi-hpre</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-hisi-hpre?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-hisi-hpre</a></div><div class='hunk'>@@ -104,6 +104,20 @@ Description:	Dump the status of the QM.</div><div class='ctx'> 		Four states: initiated, started, stopped and closed.</div><div class='ctx'> 		Available for both PF and VF, and take no other effect on HPRE.</div><div class='ctx'> </div><div class='add'>+What:		/sys/kernel/debug/hisi_hpre/&lt;bdf&gt;/qm/diff_regs</div><div class='add'>+Date:		Mar 2022</div><div class='add'>+Contact:	linux-crypto@vger.kernel.org</div><div class='add'>+Description:	QM debug registers(regs) read hardware register value. This</div><div class='add'>+		node is used to show the change of the qm register values. This</div><div class='add'>+		node can be help users to check the change of register values.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/hisi_hpre/&lt;bdf&gt;/hpre_dfx/diff_regs</div><div class='add'>+Date:		Mar 2022</div><div class='add'>+Contact:	linux-crypto@vger.kernel.org</div><div class='add'>+Description:	HPRE debug registers(regs) read hardware register value. This</div><div class='add'>+		node is used to show the change of the register values. This</div><div class='add'>+		node can be help users to check the change of register values.</div><div class='add'>+</div><div class='ctx'> What:		/sys/kernel/debug/hisi_hpre/&lt;bdf&gt;/hpre_dfx/send_cnt</div><div class='ctx'> Date:		Apr 2020</div><div class='ctx'> Contact:	linux-crypto@vger.kernel.org</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-hisi-sec b/Documentation/ABI/testing/debugfs-hisi-sec<br/>index 2bf84ced484b..93c530d1bf0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-hisi-sec?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-hisi-sec</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-hisi-sec?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-hisi-sec</a></div><div class='hunk'>@@ -84,6 +84,20 @@ Description:	Dump the status of the QM.</div><div class='ctx'> 		Four states: initiated, started, stopped and closed.</div><div class='ctx'> 		Available for both PF and VF, and take no other effect on SEC.</div><div class='ctx'> </div><div class='add'>+What:		/sys/kernel/debug/hisi_sec2/&lt;bdf&gt;/qm/diff_regs</div><div class='add'>+Date:		Mar 2022</div><div class='add'>+Contact:	linux-crypto@vger.kernel.org</div><div class='add'>+Description:	QM debug registers(regs) read hardware register value. This</div><div class='add'>+		node is used to show the change of the qm register values. This</div><div class='add'>+		node can be help users to check the change of register values.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/hisi_sec2/&lt;bdf&gt;/sec_dfx/diff_regs</div><div class='add'>+Date:		Mar 2022</div><div class='add'>+Contact:	linux-crypto@vger.kernel.org</div><div class='add'>+Description:	SEC debug registers(regs) read hardware register value. This</div><div class='add'>+		node is used to show the change of the register values. This</div><div class='add'>+		node can be help users to check the change of register values.</div><div class='add'>+</div><div class='ctx'> What:		/sys/kernel/debug/hisi_sec2/&lt;bdf&gt;/sec_dfx/send_cnt</div><div class='ctx'> Date:		Apr 2020</div><div class='ctx'> Contact:	linux-crypto@vger.kernel.org</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-hisi-zip b/Documentation/ABI/testing/debugfs-hisi-zip<br/>index bf1258bc6495..fd3f314cf8d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-hisi-zip?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/debugfs-hisi-zip</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-hisi-zip?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-hisi-zip</a></div><div class='hunk'>@@ -97,6 +97,20 @@ Description:	Dump the status of the QM.</div><div class='ctx'> 		Four states: initiated, started, stopped and closed.</div><div class='ctx'> 		Available for both PF and VF, and take no other effect on ZIP.</div><div class='ctx'> </div><div class='add'>+What:		/sys/kernel/debug/hisi_zip/&lt;bdf&gt;/qm/diff_regs</div><div class='add'>+Date:		Mar 2022</div><div class='add'>+Contact:	linux-crypto@vger.kernel.org</div><div class='add'>+Description:	QM debug registers(regs) read hardware register value. This</div><div class='add'>+		node is used to show the change of the qm registers value. This</div><div class='add'>+		node can be help users to check the change of register values.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/hisi_zip/&lt;bdf&gt;/zip_dfx/diff_regs</div><div class='add'>+Date:		Mar 2022</div><div class='add'>+Contact:	linux-crypto@vger.kernel.org</div><div class='add'>+Description:	ZIP debug registers(regs) read hardware register value. This</div><div class='add'>+		node is used to show the change of the registers value. this</div><div class='add'>+		node can be help users to check the change of register values.</div><div class='add'>+</div><div class='ctx'> What:		/sys/kernel/debug/hisi_zip/&lt;bdf&gt;/zip_dfx/send_cnt</div><div class='ctx'> Date:		Apr 2020</div><div class='ctx'> Contact:	linux-crypto@vger.kernel.org</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-scmi b/Documentation/ABI/testing/debugfs-scmi<br/>new file mode 100644<br/>index 000000000000..ee7179ab2edf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-scmi?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-scmi</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/instance_name</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	The name of the underlying SCMI instance &lt;n&gt; described by</div><div class='add'>+		all the debugfs accessors rooted at /sys/kernel/debug/scmi/&lt;n&gt;,</div><div class='add'>+		expressed as the full name of the top DT SCMI node under which</div><div class='add'>+		this SCMI instance is rooted.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/atomic_threshold_us</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	An optional time value, expressed in microseconds, representing,</div><div class='add'>+		on this SCMI instance &lt;n&gt;, the threshold above which any SCMI</div><div class='add'>+		command, advertised to have an higher-than-threshold execution</div><div class='add'>+		latency, should not be considered for atomic mode of operation,</div><div class='add'>+		even if requested.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/transport/type</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	A string representing the type of transport configured for this</div><div class='add'>+		SCMI instance &lt;n&gt;.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/transport/is_atomic</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	A boolean stating if the transport configured on the underlying</div><div class='add'>+		SCMI instance &lt;n&gt; is capable of atomic mode of operation.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/transport/max_rx_timeout_ms</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	Timeout in milliseconds allowed for SCMI synchronous replies</div><div class='add'>+		for the currently configured SCMI transport for instance &lt;n&gt;.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/transport/max_msg_size</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	Max message size of allowed SCMI messages for the currently</div><div class='add'>+		configured SCMI transport for instance &lt;n&gt;.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/transport/tx_max_msg</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	Max number of concurrently allowed in-flight SCMI messages for</div><div class='add'>+		the currently configured SCMI transport for instance &lt;n&gt; on the</div><div class='add'>+		TX channels.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/transport/rx_max_msg</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	Max number of concurrently allowed in-flight SCMI messages for</div><div class='add'>+		the currently configured SCMI transport for instance &lt;n&gt; on the</div><div class='add'>+		RX channels.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='head'>diff --git a/Documentation/ABI/testing/debugfs-scmi-raw b/Documentation/ABI/testing/debugfs-scmi-raw<br/>new file mode 100644<br/>index 000000000000..97678cc9535c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/debugfs-scmi-raw?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/debugfs-scmi-raw</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/raw/message</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	SCMI Raw synchronous message injection/snooping facility; write</div><div class='add'>+		a complete SCMI synchronous command message (header included)</div><div class='add'>+		in little-endian binary format to have it sent to the configured</div><div class='add'>+		backend SCMI server for instance &lt;n&gt;.</div><div class='add'>+		Any subsequently received response can be read from this same</div><div class='add'>+		entry if it arrived within the configured timeout.</div><div class='add'>+		Each write to the entry causes one command request to be built</div><div class='add'>+		and sent while the replies are read back one message at time</div><div class='add'>+		(receiving an EOF at each message boundary).</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/raw/message_async</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	SCMI Raw asynchronous message injection/snooping facility; write</div><div class='add'>+		a complete SCMI asynchronous command message (header included)</div><div class='add'>+		in little-endian binary format to have it sent to the configured</div><div class='add'>+		backend SCMI server for instance &lt;n&gt;.</div><div class='add'>+		Any subsequently received response can be read from this same</div><div class='add'>+		entry if it arrived within the configured timeout.</div><div class='add'>+		Any additional delayed response received afterwards can be read</div><div class='add'>+		from this same entry too if it arrived within the configured</div><div class='add'>+		timeout.</div><div class='add'>+		Each write to the entry causes one command request to be built</div><div class='add'>+		and sent while the replies are read back one message at time</div><div class='add'>+		(receiving an EOF at each message boundary).</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/raw/errors</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	SCMI Raw message errors facility; any kind of timed-out or</div><div class='add'>+		generally unexpectedly received SCMI message, for instance &lt;n&gt;,</div><div class='add'>+		can be read from this entry.</div><div class='add'>+		Each read gives back one message at time (receiving an EOF at</div><div class='add'>+		each message boundary).</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/raw/notification</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	SCMI Raw notification snooping facility; any notification</div><div class='add'>+		emitted by the backend SCMI server, for instance &lt;n&gt;, can be</div><div class='add'>+		read from this entry.</div><div class='add'>+		Each read gives back one message at time (receiving an EOF at</div><div class='add'>+		each message boundary).</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/raw/reset</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	SCMI Raw stack reset facility; writing a value to this entry</div><div class='add'>+		causes the internal queues of any kind of received message,</div><div class='add'>+		still pending to be read out for instance &lt;n&gt;, to be immediately</div><div class='add'>+		flushed.</div><div class='add'>+		Can be used to reset and clean the SCMI Raw stack between to</div><div class='add'>+		different test-run.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/raw/channels/&lt;m&gt;/message</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	SCMI Raw synchronous message injection/snooping facility; write</div><div class='add'>+		a complete SCMI synchronous command message (header included)</div><div class='add'>+		in little-endian binary format to have it sent to the configured</div><div class='add'>+		backend SCMI server for instance &lt;n&gt; through the &lt;m&gt; transport</div><div class='add'>+		channel.</div><div class='add'>+		Any subsequently received response can be read from this same</div><div class='add'>+		entry if it arrived on channel &lt;m&gt; within the configured</div><div class='add'>+		timeout.</div><div class='add'>+		Each write to the entry causes one command request to be built</div><div class='add'>+		and sent while the replies are read back one message at time</div><div class='add'>+		(receiving an EOF at each message boundary).</div><div class='add'>+		Channel identifier &lt;m&gt; matches the SCMI protocol number which</div><div class='add'>+		has been associated with this transport channel in the DT</div><div class='add'>+		description, with base protocol number 0x10 being the default</div><div class='add'>+		channel for this instance.</div><div class='add'>+		Note that these per-channel entries rooted at &lt;..&gt;/channels</div><div class='add'>+		exist only if the transport is configured to have more than</div><div class='add'>+		one default channel.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/debug/scmi/&lt;n&gt;/raw/channels/&lt;m&gt;/message_async</div><div class='add'>+Date:		March 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	cristian.marussi@arm.com</div><div class='add'>+Description:	SCMI Raw asynchronous message injection/snooping facility; write</div><div class='add'>+		a complete SCMI asynchronous command message (header included)</div><div class='add'>+		in little-endian binary format to have it sent to the configured</div><div class='add'>+		backend SCMI server for instance &lt;n&gt; through the &lt;m&gt; transport</div><div class='add'>+		channel.</div><div class='add'>+		Any subsequently received response can be read from this same</div><div class='add'>+		entry if it arrived on channel &lt;m&gt; within the configured</div><div class='add'>+		timeout.</div><div class='add'>+		Any additional delayed response received afterwards can be read</div><div class='add'>+		from this same entry too if it arrived within the configured</div><div class='add'>+		timeout.</div><div class='add'>+		Each write to the entry causes one command request to be built</div><div class='add'>+		and sent while the replies are read back one message at time</div><div class='add'>+		(receiving an EOF at each message boundary).</div><div class='add'>+		Channel identifier &lt;m&gt; matches the SCMI protocol number which</div><div class='add'>+		has been associated with this transport channel in the DT</div><div class='add'>+		description, with base protocol number 0x10 being the default</div><div class='add'>+		channel for this instance.</div><div class='add'>+		Note that these per-channel entries rooted at &lt;..&gt;/channels</div><div class='add'>+		exist only if the transport is configured to have more than</div><div class='add'>+		one default channel.</div><div class='add'>+Users:		Debugging, any userspace test suite</div><div class='head'>diff --git a/Documentation/ABI/testing/ima_policy b/Documentation/ABI/testing/ima_policy<br/>index 839fab811b18..49db0ff288e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/ima_policy?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/ima_policy</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/ima_policy?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/ima_policy</a></div><div class='hunk'>@@ -27,14 +27,15 @@ Description:</div><div class='ctx'> 				[fowner=] [fgroup=]]</div><div class='ctx'> 			lsm:	[[subj_user=] [subj_role=] [subj_type=]</div><div class='ctx'> 				 [obj_user=] [obj_role=] [obj_type=]]</div><div class='del'>-			option:	[[appraise_type=]] [template=] [permit_directio]</div><div class='del'>-				[appraise_flag=] [appraise_algos=] [keyrings=]</div><div class='add'>+			option:	[digest_type=] [template=] [permit_directio]</div><div class='add'>+				[appraise_type=] [appraise_flag=]</div><div class='add'>+				[appraise_algos=] [keyrings=]</div><div class='ctx'> 		  base:</div><div class='ctx'> 			func:= [BPRM_CHECK][MMAP_CHECK][CREDS_CHECK][FILE_CHECK][MODULE_CHECK]</div><div class='ctx'> 				[FIRMWARE_CHECK]</div><div class='ctx'> 				[KEXEC_KERNEL_CHECK] [KEXEC_INITRAMFS_CHECK]</div><div class='ctx'> 				[KEXEC_CMDLINE] [KEY_CHECK] [CRITICAL_DATA]</div><div class='del'>-				[SETXATTR_CHECK]</div><div class='add'>+				[SETXATTR_CHECK][MMAP_CHECK_REQPROT]</div><div class='ctx'> 			mask:= [[^]MAY_READ] [[^]MAY_WRITE] [[^]MAY_APPEND]</div><div class='ctx'> 			       [[^]MAY_EXEC]</div><div class='ctx'> 			fsmagic:= hex value</div><div class='hunk'>@@ -47,10 +48,21 @@ Description:</div><div class='ctx'> 			fgroup:= decimal value</div><div class='ctx'> 		  lsm:  are LSM specific</div><div class='ctx'> 		  option:</div><div class='del'>-			appraise_type:= [imasig] [imasig|modsig]</div><div class='add'>+			appraise_type:= [imasig] | [imasig|modsig] | [sigv3]</div><div class='add'>+			    where 'imasig' is the original or the signature</div><div class='add'>+				format v2.</div><div class='add'>+			    where 'modsig' is an appended signature,</div><div class='add'>+			    where 'sigv3' is the signature format v3. (Currently</div><div class='add'>+				limited to fsverity digest based signatures</div><div class='add'>+				stored in security.ima xattr. Requires</div><div class='add'>+				specifying "digest_type=verity" first.)</div><div class='add'>+</div><div class='ctx'> 			appraise_flag:= [check_blacklist]</div><div class='ctx'> 			Currently, blacklist check is only for files signed with appended</div><div class='ctx'> 			signature.</div><div class='add'>+			digest_type:= verity</div><div class='add'>+			    Require fs-verity's file digest instead of the</div><div class='add'>+			    regular IMA file hash.</div><div class='ctx'> 			keyrings:= list of keyrings</div><div class='ctx'> 			(eg, .builtin_trusted_keys|.ima). Only valid</div><div class='ctx'> 			when action is "measure" and func is KEY_CHECK.</div><div class='hunk'>@@ -149,3 +161,30 @@ Description:</div><div class='ctx'> 		security.ima xattr of a file:</div><div class='ctx'> </div><div class='ctx'> 			appraise func=SETXATTR_CHECK appraise_algos=sha256,sha384,sha512</div><div class='add'>+</div><div class='add'>+		Example of a 'measure' rule requiring fs-verity's digests</div><div class='add'>+		with indication of type of digest in the measurement list.</div><div class='add'>+</div><div class='add'>+			measure func=FILE_CHECK digest_type=verity \</div><div class='add'>+				template=ima-ngv2</div><div class='add'>+</div><div class='add'>+		Example of 'measure' and 'appraise' rules requiring fs-verity</div><div class='add'>+		signatures (format version 3) stored in security.ima xattr.</div><div class='add'>+</div><div class='add'>+		The 'measure' rule specifies the 'ima-sigv3' template option,</div><div class='add'>+		which includes the indication of type of digest and the file</div><div class='add'>+		signature in the measurement list.</div><div class='add'>+</div><div class='add'>+			measure func=BPRM_CHECK digest_type=verity \</div><div class='add'>+				template=ima-sigv3</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		The 'appraise' rule specifies the type and signature format</div><div class='add'>+		version (sigv3) required.</div><div class='add'>+</div><div class='add'>+			appraise func=BPRM_CHECK digest_type=verity \</div><div class='add'>+				appraise_type=sigv3</div><div class='add'>+</div><div class='add'>+		All of these policy rules could, for example, be constrained</div><div class='add'>+		either based on a filesystem's UUID (fsuuid) or based on LSM</div><div class='add'>+		labels.</div><div class='head'>diff --git a/Documentation/ABI/testing/procfs-smaps_rollup b/Documentation/ABI/testing/procfs-smaps_rollup<br/>index a4e31c465194..b446a7154a1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/procfs-smaps_rollup?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/procfs-smaps_rollup</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/procfs-smaps_rollup?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/procfs-smaps_rollup</a></div><div class='hunk'>@@ -22,6 +22,7 @@ Description:</div><div class='ctx'> 			MMUPageSize:           4 kB</div><div class='ctx'> 			Rss:		     884 kB</div><div class='ctx'> 			Pss:		     385 kB</div><div class='add'>+			Pss_Dirty:	      68 kB</div><div class='ctx'> 			Pss_Anon:	     301 kB</div><div class='ctx'> 			Pss_File:	      80 kB</div><div class='ctx'> 			Pss_Shmem:	       4 kB</div><div class='head'>diff --git a/Documentation/ABI/testing/securityfs-secrets-coco b/Documentation/ABI/testing/securityfs-secrets-coco<br/>new file mode 100644<br/>index 000000000000..f2b6909155f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/securityfs-secrets-coco?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/securityfs-secrets-coco</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+What:		security/secrets/coco</div><div class='add'>+Date:		February 2022</div><div class='add'>+Contact:	Dov Murik &lt;dovmurik@linux.ibm.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Exposes confidential computing (coco) EFI secrets to</div><div class='add'>+		userspace via securityfs.</div><div class='add'>+</div><div class='add'>+		EFI can declare memory area used by confidential computing</div><div class='add'>+		platforms (such as AMD SEV and SEV-ES) for secret injection by</div><div class='add'>+		the Guest Owner during VM's launch.  The secrets are encrypted</div><div class='add'>+		by the Guest Owner and decrypted inside the trusted enclave,</div><div class='add'>+		and therefore are not readable by the untrusted host.</div><div class='add'>+</div><div class='add'>+		The efi_secret module exposes the secrets to userspace.  Each</div><div class='add'>+		secret appears as a file under &lt;securityfs&gt;/secrets/coco,</div><div class='add'>+		where the filename is the GUID of the entry in the secrets</div><div class='add'>+		table.  This module is loaded automatically by the EFI driver</div><div class='add'>+		if the EFI secret area is populated.</div><div class='add'>+</div><div class='add'>+		Two operations are supported for the files: read and unlink.</div><div class='add'>+		Reading the file returns the content of secret entry.</div><div class='add'>+		Unlinking the file overwrites the secret data with zeroes and</div><div class='add'>+		removes the entry from the filesystem.  A secret cannot be read</div><div class='add'>+		after it has been unlinked.</div><div class='add'>+</div><div class='add'>+		For example, listing the available secrets::</div><div class='add'>+</div><div class='add'>+		  # modprobe efi_secret</div><div class='add'>+		  # ls -l /sys/kernel/security/secrets/coco</div><div class='add'>+		  -r--r----- 1 root root 0 Jun 28 11:54 736870e5-84f0-4973-92ec-06879ce3da0b</div><div class='add'>+		  -r--r----- 1 root root 0 Jun 28 11:54 83c83f7f-1356-4975-8b7e-d3a0b54312c6</div><div class='add'>+		  -r--r----- 1 root root 0 Jun 28 11:54 9553f55d-3da2-43ee-ab5d-ff17f78864d2</div><div class='add'>+		  -r--r----- 1 root root 0 Jun 28 11:54 e6f5a162-d67f-4750-a67c-5d065f2a9910</div><div class='add'>+</div><div class='add'>+		Reading the secret data by reading a file::</div><div class='add'>+</div><div class='add'>+		  # cat /sys/kernel/security/secrets/coco/e6f5a162-d67f-4750-a67c-5d065f2a9910</div><div class='add'>+		  the-content-of-the-secret-data</div><div class='add'>+</div><div class='add'>+		Wiping a secret by unlinking a file::</div><div class='add'>+</div><div class='add'>+		  # rm /sys/kernel/security/secrets/coco/e6f5a162-d67f-4750-a67c-5d065f2a9910</div><div class='add'>+		  # ls -l /sys/kernel/security/secrets/coco</div><div class='add'>+		  -r--r----- 1 root root 0 Jun 28 11:54 736870e5-84f0-4973-92ec-06879ce3da0b</div><div class='add'>+		  -r--r----- 1 root root 0 Jun 28 11:54 83c83f7f-1356-4975-8b7e-d3a0b54312c6</div><div class='add'>+		  -r--r----- 1 root root 0 Jun 28 11:54 9553f55d-3da2-43ee-ab5d-ff17f78864d2</div><div class='add'>+</div><div class='add'>+		Note: The binary format of the secrets table injected by the</div><div class='add'>+		Guest Owner is described in</div><div class='add'>+		drivers/virt/coco/efi_secret/efi_secret.c under "Structure of</div><div class='add'>+		the EFI secret area".</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-amd-pmc b/Documentation/ABI/testing/sysfs-amd-pmc<br/>new file mode 100644<br/>index 000000000000..c421b72844f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-amd-pmc?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-amd-pmc</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+What:		/sys/bus/platform/drivers/amd_pmc/*/smu_fw_version</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	Mario Limonciello &lt;mario.limonciello@amd.com&gt;</div><div class='add'>+Description:	Reading this file reports the version of the firmware loaded to</div><div class='add'>+		System Management Unit (SMU) contained in AMD CPUs and</div><div class='add'>+		APUs.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/amd_pmc/*/smu_program</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	Mario Limonciello &lt;mario.limonciello@amd.com&gt;</div><div class='add'>+Description:	Reading this file reports the program corresponding to the SMU</div><div class='add'>+		firmware version.  The program field is used to disambiguate two</div><div class='add'>+		APU/CPU models that can share the same firmware binary.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-amd-pmf b/Documentation/ABI/testing/sysfs-amd-pmf<br/>new file mode 100644<br/>index 000000000000..7fc0e1c2b76b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-amd-pmf?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-amd-pmf</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+What:		/sys/devices/platform/*/cnqf_enable</div><div class='add'>+Date:		September 2022</div><div class='add'>+Contact:	Shyam Sundar S K &lt;Shyam-sundar.S-k@amd.com&gt;</div><div class='add'>+Description:	Reading this file tells if the AMD Platform Management(PMF)</div><div class='add'>+		Cool n Quiet Framework(CnQF) feature is enabled or not.</div><div class='add'>+</div><div class='add'>+		This feature is not enabled by default and gets only turned on</div><div class='add'>+		if OEM BIOS passes a "flag" to PMF ACPI function (index 11 or 12)</div><div class='add'>+		or in case the user writes "on".</div><div class='add'>+</div><div class='add'>+		To turn off CnQF user can write "off" to the sysfs node.</div><div class='add'>+		Note: Systems that support auto mode will not have this sysfs file</div><div class='add'>+		available.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-ata b/Documentation/ABI/testing/sysfs-ata<br/>index 2f726c914752..3daecac48964 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-ata?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-ata</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-ata?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-ata</a></div><div class='hunk'>@@ -107,13 +107,14 @@ Description:</div><div class='ctx'> 				described in ATA8 7.16 and 7.17. Only valid if</div><div class='ctx'> 				the device is not a PM.</div><div class='ctx'> </div><div class='del'>-		pio_mode:	(RO) Transfer modes supported by the device when</div><div class='del'>-				in PIO mode. Mostly used by PATA device.</div><div class='add'>+		pio_mode:	(RO) PIO transfer mode used by the device.</div><div class='add'>+				Mostly used by PATA devices.</div><div class='ctx'> </div><div class='del'>-		xfer_mode:	(RO) Current transfer mode</div><div class='add'>+		xfer_mode:	(RO) Current transfer mode. Mostly used by</div><div class='add'>+				PATA devices.</div><div class='ctx'> </div><div class='del'>-		dma_mode:	(RO) Transfer modes supported by the device when</div><div class='del'>-				in DMA mode. Mostly used by PATA device.</div><div class='add'>+		dma_mode:	(RO) DMA transfer mode used by the device.</div><div class='add'>+				Mostly used by PATA devices.</div><div class='ctx'> </div><div class='ctx'> 		class:		(RO) Device class. Can be "ata" for disk,</div><div class='ctx'> 				"atapi" for packet device, "pmp" for PM, or</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-block-zram b/Documentation/ABI/testing/sysfs-block-zram<br/>index 14b2bf2e5105..628a00fb20a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-block-zram?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-block-zram</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-block-zram?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-block-zram</a></div><div class='hunk'>@@ -137,3 +137,17 @@ Description:</div><div class='ctx'> 		The writeback_limit file is read-write and specifies the maximum</div><div class='ctx'> 		amount of writeback ZRAM can do. The limit could be changed</div><div class='ctx'> 		in run time.</div><div class='add'>+</div><div class='add'>+What:		/sys/block/zram&lt;id&gt;/recomp_algorithm</div><div class='add'>+Date:		November 2022</div><div class='add'>+Contact:	Sergey Senozhatsky &lt;senozhatsky@chromium.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		The recomp_algorithm file is read-write and allows to set</div><div class='add'>+		or show secondary compression algorithms.</div><div class='add'>+</div><div class='add'>+What:		/sys/block/zram&lt;id&gt;/recompress</div><div class='add'>+Date:		November 2022</div><div class='add'>+Contact:	Sergey Senozhatsky &lt;senozhatsky@chromium.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		The recompress file is write-only and triggers re-compression</div><div class='add'>+		with secondary compression algorithms.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-bcma b/Documentation/ABI/testing/sysfs-bus-bcma<br/>index 721b4aea3020..e93d3ddca844 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-bcma?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-bcma</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-bcma?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-bcma</a></div><div class='hunk'>@@ -3,7 +3,7 @@ Date:		May 2011</div><div class='ctx'> KernelVersion:	3.0</div><div class='ctx'> Contact:	Rafał Miłecki &lt;zajec5@gmail.com&gt;</div><div class='ctx'> Description:</div><div class='del'>-		Each BCMA core has it's manufacturer id. See</div><div class='add'>+		Each BCMA core has its manufacturer id. See</div><div class='ctx'> 		include/linux/bcma/bcma.h for possible values.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/bcma/devices/.../id</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-cdx b/Documentation/ABI/testing/sysfs-bus-cdx<br/>new file mode 100644<br/>index 000000000000..7af477f49998<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-cdx?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-cdx</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+What:		/sys/bus/cdx/rescan</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	nipun.gupta@amd.com</div><div class='add'>+Description:</div><div class='add'>+		Writing y/1/on to this file will cause rescan of the bus</div><div class='add'>+		and devices on the CDX bus. Any new devices are scanned and</div><div class='add'>+		added to the list of Linux devices and any devices removed are</div><div class='add'>+		also deleted from Linux.</div><div class='add'>+</div><div class='add'>+		For example::</div><div class='add'>+</div><div class='add'>+		  # echo 1 &gt; /sys/bus/cdx/rescan</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cdx/devices/.../vendor</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	nipun.gupta@amd.com</div><div class='add'>+Description:</div><div class='add'>+		Vendor ID for this CDX device, in hexadecimal. Vendor ID is</div><div class='add'>+		16 bit identifier which is specific to the device manufacturer.</div><div class='add'>+		Combination of Vendor ID and Device ID identifies a device.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cdx/devices/.../device</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	nipun.gupta@amd.com</div><div class='add'>+Description:</div><div class='add'>+		Device ID for this CDX device, in hexadecimal. Device ID is</div><div class='add'>+		16 bit identifier to identify a device type within the range</div><div class='add'>+		of a device manufacturer.</div><div class='add'>+		Combination of Vendor ID and Device ID identifies a device.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cdx/devices/.../reset</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	nipun.gupta@amd.com</div><div class='add'>+Description:</div><div class='add'>+		Writing y/1/on to this file resets the CDX device.</div><div class='add'>+		On resetting the device, the corresponding driver is notified</div><div class='add'>+		twice, once before the device is being reset, and again after</div><div class='add'>+		the reset has been complete.</div><div class='add'>+</div><div class='add'>+		For example::</div><div class='add'>+</div><div class='add'>+		  # echo 1 &gt; /sys/bus/cdx/.../reset</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cdx/devices/.../remove</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	tarak.reddy@amd.com</div><div class='add'>+Description:</div><div class='add'>+		Writing y/1/on to this file removes the corresponding</div><div class='add'>+		device from the CDX bus. If the device is to be reconfigured</div><div class='add'>+		reconfigured in the Hardware, the device can be removed, so</div><div class='add'>+		that the device driver does not access the device while it is</div><div class='add'>+		being reconfigured.</div><div class='add'>+</div><div class='add'>+		For example::</div><div class='add'>+</div><div class='add'>+		  # echo 1 &gt; /sys/bus/cdx/devices/.../remove</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-coreboot b/Documentation/ABI/testing/sysfs-bus-coreboot<br/>new file mode 100644<br/>index 000000000000..9c5accecc470<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-coreboot?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-coreboot</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+What:		/sys/bus/coreboot</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Jack Rosenthal &lt;jrosenth@chromium.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		The coreboot bus provides a variety of virtual devices used to</div><div class='add'>+		access data structures created by the Coreboot BIOS.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coreboot/devices/cbmem-&lt;id&gt;</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Jack Rosenthal &lt;jrosenth@chromium.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		CBMEM is a downwards-growing memory region created by Coreboot,</div><div class='add'>+		and contains tagged data structures to be shared with payloads</div><div class='add'>+		in the boot process and the OS.  Each CBMEM entry is given a</div><div class='add'>+		directory in /sys/bus/coreboot/devices based on its id.</div><div class='add'>+		A list of ids known to Coreboot can be found in the coreboot</div><div class='add'>+		source tree at</div><div class='add'>+		``src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h``.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coreboot/devices/cbmem-&lt;id&gt;/address</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Jack Rosenthal &lt;jrosenth@chromium.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		This is the pyhsical memory address that the CBMEM entry's data</div><div class='add'>+		begins at, in hexadecimal (e.g., ``0x76ffe000``).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coreboot/devices/cbmem-&lt;id&gt;/size</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Jack Rosenthal &lt;jrosenth@chromium.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		This is the size of the CBMEM entry's data, in hexadecimal</div><div class='add'>+		(e.g., ``0x1234``).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coreboot/devices/cbmem-&lt;id&gt;/mem</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Jack Rosenthal &lt;jrosenth@chromium.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		A file exposing read/write access to the entry's data.  Note</div><div class='add'>+		that this file does not support mmap(), as coreboot</div><div class='add'>+		does not guarantee that the data will be page-aligned.</div><div class='add'>+</div><div class='add'>+		The mode of this file is 0600.  While there shouldn't be</div><div class='add'>+		anything security-sensitive contained in CBMEM, read access</div><div class='add'>+		requires root privileges given this is exposing a small subset</div><div class='add'>+		of physical memory.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x<br/>index 651602a61eac..234c33fbdb55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm3x</a></div><div class='hunk'>@@ -236,7 +236,7 @@ What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.[etm|ptm]/traceid</div><div class='ctx'> Date:		November 2014</div><div class='ctx'> KernelVersion:	3.19</div><div class='ctx'> Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='del'>-Description: 	(RW) Holds the trace ID that will appear in the trace stream</div><div class='add'>+Description: 	(RO) Holds the trace ID that will appear in the trace stream</div><div class='ctx'> 		coming from this trace entity.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/coresight/devices/&lt;memory_map&gt;.[etm|ptm]/trigger_event</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x b/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x<br/>index 8e53a32f8150..08b1964f27d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-coresight-devices-etm4x</a></div><div class='hunk'>@@ -516,3 +516,11 @@ Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='ctx'> Description:	(Read) Returns the number of special conditional P1 right-hand keys</div><div class='ctx'> 		that the trace unit can use (0x194).  The value is taken</div><div class='ctx'> 		directly from the HW.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/etm&lt;N&gt;/ts_source</div><div class='add'>+Date:		October 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt; or Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+Description:	(Read) When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for</div><div class='add'>+		trace session. Otherwise -1 indicates an unknown time source. Check</div><div class='add'>+		trcidr0.tssize to see if a global timestamp is available.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm<br/>new file mode 100644<br/>index 000000000000..4a58e649550d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+What:		/sys/bus/coresight/devices/&lt;tpdm-name&gt;/integration_test</div><div class='add'>+Date:		January 2023</div><div class='add'>+KernelVersion	6.2</div><div class='add'>+Contact:	Jinlong Mao (QUIC) &lt;quic_jinlmao@quicinc.com&gt;, Tao Zhang (QUIC) &lt;quic_taozha@quicinc.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(Write) Run integration test for tpdm. Integration test</div><div class='add'>+		will generate test data for tpdm. It can help to make</div><div class='add'>+		sure that the trace path is enabled and the link configurations</div><div class='add'>+		are fine.</div><div class='add'>+</div><div class='add'>+		Accepts only one of the 2 values -  1 or 2.</div><div class='add'>+		1 : Generate 64 bits data</div><div class='add'>+		2 : Generate 32 bits data</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb b/Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb<br/>new file mode 100644<br/>index 000000000000..f560918ae738<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-coresight-devices-ultra_smb</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+What:		/sys/bus/coresight/devices/ultra_smb&lt;N&gt;/enable_sink</div><div class='add'>+Date:		January 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Junhao He &lt;hejunhao3@huawei.com&gt;</div><div class='add'>+Description:	(RW) Add/remove a SMB device from a trace path. There can be</div><div class='add'>+		multiple sources for a single SMB device.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/ultra_smb&lt;N&gt;/mgmt/buf_size</div><div class='add'>+Date:		January 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Junhao He &lt;hejunhao3@huawei.com&gt;</div><div class='add'>+Description:	(RO) Shows the buffer size of each UltraSoc SMB device.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/ultra_smb&lt;N&gt;/mgmt/buf_status</div><div class='add'>+Date:		January 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Junhao He &lt;hejunhao3@huawei.com&gt;</div><div class='add'>+Description:	(RO) Shows the value of UltraSoc SMB status register.</div><div class='add'>+		BIT(0) is zero means buffer is empty.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/ultra_smb&lt;N&gt;/mgmt/read_pos</div><div class='add'>+Date:		January 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Junhao He &lt;hejunhao3@huawei.com&gt;</div><div class='add'>+Description:	(RO) Shows the value of UltraSoc SMB Read Pointer register.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/coresight/devices/ultra_smb&lt;N&gt;/mgmt/write_pos</div><div class='add'>+Date:		January 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Junhao He &lt;hejunhao3@huawei.com&gt;</div><div class='add'>+Description:	(RO) Shows the value of UltraSoc SMB Write Pointer register.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-counter b/Documentation/ABI/testing/sysfs-bus-counter<br/>index 06c2b3e27e0b..1417c4272c6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-counter?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-counter</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-counter?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-counter</a></div><div class='hunk'>@@ -1,9 +1,45 @@</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/cascade_counts_enable</div><div class='add'>+KernelVersion:	6.4</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Indicates the cascading of Counts on Counter X.</div><div class='add'>+</div><div class='add'>+		Valid attribute values are boolean.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/external_input_phase_clock_select</div><div class='add'>+KernelVersion:	6.4</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Selects the external clock pin for phase counting mode of</div><div class='add'>+		Counter X.</div><div class='add'>+</div><div class='add'>+		MTCLKA-MTCLKB:</div><div class='add'>+			MTCLKA and MTCLKB pins are selected for the external</div><div class='add'>+			phase clock.</div><div class='add'>+</div><div class='add'>+		MTCLKC-MTCLKD:</div><div class='add'>+			MTCLKC and MTCLKD pins are selected for the external</div><div class='add'>+			phase clock.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/external_input_phase_clock_select_available</div><div class='add'>+KernelVersion:  6.4</div><div class='add'>+Contact:        linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+                Discrete set of available values for the respective device</div><div class='add'>+                configuration are listed in this file.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/count</div><div class='ctx'> KernelVersion:	5.2</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> 		Count data of Count Y represented as a string.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/counter/devices/counterX/countY/capture</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Historical capture of the Count Y count data.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/ceiling</div><div class='ctx'> KernelVersion:	5.2</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='hunk'>@@ -203,6 +239,15 @@ Description:</div><div class='ctx'> 		both edges:</div><div class='ctx'> 			Any state transition.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/counter/devices/counterX/countY/num_overflows</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		This attribute indicates the number of overflows of count Y.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/cascade_counts_enable_component_id</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/external_input_phase_clock_select_component_id</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/countY/capture_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/ceiling_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/floor_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/count_mode_component_id</div><div class='hunk'>@@ -213,11 +258,14 @@ What:		/sys/bus/counter/devices/counterX/countY/prescaler_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/preset_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/preset_enable_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/countY/signalZ_action_component_id</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/countY/num_overflows_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/signalY/cable_fault_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/signalY/cable_fault_enable_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/signalY/index_polarity_component_id</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/signalY/polarity_component_id</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/signalY/synchronous_mode_component_id</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/signalY/frequency_component_id</div><div class='ctx'> KernelVersion:	5.16</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -303,6 +351,19 @@ Description:</div><div class='ctx'> 		Discrete set of available values for the respective Signal Y</div><div class='ctx'> 		configuration are listed in this file.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/counter/devices/counterX/signalY/polarity</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Active level of Signal Y. The following polarity values are</div><div class='add'>+		available:</div><div class='add'>+</div><div class='add'>+		positive:</div><div class='add'>+			Signal high state considered active level (rising edge).</div><div class='add'>+</div><div class='add'>+		negative:</div><div class='add'>+			Signal low state considered active level (falling edge).</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/counter/devices/counterX/signalY/name</div><div class='ctx'> KernelVersion:	5.2</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='hunk'>@@ -345,3 +406,9 @@ Description:</div><div class='ctx'> 			via index_polarity. The index function (as enabled via</div><div class='ctx'> 			preset_enable) is performed synchronously with the</div><div class='ctx'> 			quadrature clock on the active level of the index input.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/counter/devices/counterX/signalY/frequency</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Read-only attribute that indicates the signal Y frequency, in Hz.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-css b/Documentation/ABI/testing/sysfs-bus-css<br/>index 12a733fe357f..d4d5cfb63b90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-css?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-css</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-css?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-css</a></div><div class='hunk'>@@ -1,22 +1,19 @@</div><div class='ctx'> What:		/sys/bus/css/devices/.../type</div><div class='ctx'> Date:		March 2008</div><div class='del'>-Contact:	Cornelia Huck &lt;cornelia.huck@de.ibm.com&gt;</div><div class='del'>-		linux-s390@vger.kernel.org</div><div class='add'>+Contact:	linux-s390@vger.kernel.org</div><div class='ctx'> Description:	Contains the subchannel type, as reported by the hardware.</div><div class='ctx'> 		This attribute is present for all subchannel types.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/css/devices/.../modalias</div><div class='ctx'> Date:		March 2008</div><div class='del'>-Contact:	Cornelia Huck &lt;cornelia.huck@de.ibm.com&gt;</div><div class='del'>-		linux-s390@vger.kernel.org</div><div class='add'>+Contact:	linux-s390@vger.kernel.org</div><div class='ctx'> Description:	Contains the module alias as reported with uevents.</div><div class='ctx'> 		It is of the format css:t&lt;type&gt; and present for all</div><div class='ctx'> 		subchannel types.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/css/drivers/io_subchannel/.../chpids</div><div class='ctx'> Date:		December 2002</div><div class='del'>-Contact:	Cornelia Huck &lt;cornelia.huck@de.ibm.com&gt;</div><div class='del'>-		linux-s390@vger.kernel.org</div><div class='add'>+Contact:	linux-s390@vger.kernel.org</div><div class='ctx'> Description:	Contains the ids of the channel paths used by this</div><div class='ctx'> 		subchannel, as reported by the channel subsystem</div><div class='ctx'> 		during subchannel recognition.</div><div class='hunk'>@@ -26,8 +23,7 @@ Users:		s390-tools, HAL</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/css/drivers/io_subchannel/.../pimpampom</div><div class='ctx'> Date:		December 2002</div><div class='del'>-Contact:	Cornelia Huck &lt;cornelia.huck@de.ibm.com&gt;</div><div class='del'>-		linux-s390@vger.kernel.org</div><div class='add'>+Contact:	linux-s390@vger.kernel.org</div><div class='ctx'> Description:	Contains the PIM/PAM/POM values, as reported by the</div><div class='ctx'> 		channel subsystem when last queried by the common I/O</div><div class='ctx'> 		layer (this implies that this attribute is not necessarily</div><div class='hunk'>@@ -38,8 +34,7 @@ Users:		s390-tools, HAL</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/css/devices/.../driver_override</div><div class='ctx'> Date:		June 2019</div><div class='del'>-Contact:	Cornelia Huck &lt;cohuck@redhat.com&gt;</div><div class='del'>-		linux-s390@vger.kernel.org</div><div class='add'>+Contact:	linux-s390@vger.kernel.org</div><div class='ctx'> Description:	This file allows the driver for a device to be specified. When</div><div class='ctx'> 		specified, only a driver with a name matching the value written</div><div class='ctx'> 		to driver_override will have an opportunity to bind to the</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/testing/sysfs-bus-cxl<br/>index 7c2b846521f3..48ac0d911801 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-cxl?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-cxl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-cxl?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-cxl</a></div><div class='hunk'>@@ -7,6 +7,7 @@ Description:</div><div class='ctx'> 		all descendant memdevs for unbind. Writing '1' to this attribute</div><div class='ctx'> 		flushes that work.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/memX/firmware_version</div><div class='ctx'> Date:		December, 2020</div><div class='ctx'> KernelVersion:	v5.12</div><div class='hunk'>@@ -16,6 +17,7 @@ Description:</div><div class='ctx'> 		Memory Device Output Payload in the CXL-2.0</div><div class='ctx'> 		specification.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/memX/ram/size</div><div class='ctx'> Date:		December, 2020</div><div class='ctx'> KernelVersion:	v5.12</div><div class='hunk'>@@ -25,6 +27,7 @@ Description:</div><div class='ctx'> 		identically named field in the Identify Memory Device Output</div><div class='ctx'> 		Payload in the CXL-2.0 specification.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/memX/pmem/size</div><div class='ctx'> Date:		December, 2020</div><div class='ctx'> KernelVersion:	v5.12</div><div class='hunk'>@@ -34,6 +37,7 @@ Description:</div><div class='ctx'> 		identically named field in the Identify Memory Device Output</div><div class='ctx'> 		Payload in the CXL-2.0 specification.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/memX/serial</div><div class='ctx'> Date:		January, 2022</div><div class='ctx'> KernelVersion:	v5.18</div><div class='hunk'>@@ -43,6 +47,7 @@ Description:</div><div class='ctx'> 		capability. Mandatory for CXL devices, see CXL 2.0 8.1.12.2</div><div class='ctx'> 		Memory Device PCIe Capabilities and Extended Capabilities.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/memX/numa_node</div><div class='ctx'> Date:		January, 2022</div><div class='ctx'> KernelVersion:	v5.18</div><div class='hunk'>@@ -52,114 +57,375 @@ Description:</div><div class='ctx'> 		host PCI device for this memory device, emit the CPU node</div><div class='ctx'> 		affinity for this device.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/*/devtype</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		CXL device objects export the devtype attribute which mirrors</div><div class='del'>-		the same value communicated in the DEVTYPE environment variable</div><div class='del'>-		for uevents for devices on the "cxl" bus.</div><div class='add'>+		(RO) CXL device objects export the devtype attribute which</div><div class='add'>+		mirrors the same value communicated in the DEVTYPE environment</div><div class='add'>+		variable for uevents for devices on the "cxl" bus.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/cxl/devices/*/modalias</div><div class='ctx'> Date:		December, 2021</div><div class='ctx'> KernelVersion:	v5.18</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		CXL device objects export the modalias attribute which mirrors</div><div class='del'>-		the same value communicated in the MODALIAS environment variable</div><div class='del'>-		for uevents for devices on the "cxl" bus.</div><div class='add'>+		(RO) CXL device objects export the modalias attribute which</div><div class='add'>+		mirrors the same value communicated in the MODALIAS environment</div><div class='add'>+		variable for uevents for devices on the "cxl" bus.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/cxl/devices/portX/uport</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		CXL port objects are enumerated from either a platform firmware</div><div class='del'>-		device (ACPI0017 and ACPI0016) or PCIe switch upstream port with</div><div class='del'>-		CXL component registers. The 'uport' symlink connects the CXL</div><div class='del'>-		portX object to the device that published the CXL port</div><div class='add'>+		(RO) CXL port objects are enumerated from either a platform</div><div class='add'>+		firmware device (ACPI0017 and ACPI0016) or PCIe switch upstream</div><div class='add'>+		port with CXL component registers. The 'uport' symlink connects</div><div class='add'>+		the CXL portX object to the device that published the CXL port</div><div class='ctx'> 		capability.</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/{port,endpoint}X/parent_dport</div><div class='add'>+Date:		January, 2023</div><div class='add'>+KernelVersion:	v6.3</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RO) CXL port objects are instantiated for each upstream port in</div><div class='add'>+		a CXL/PCIe switch, and for each endpoint to map the</div><div class='add'>+		corresponding memory device into the CXL port hierarchy. When a</div><div class='add'>+		descendant CXL port (switch or endpoint) is enumerated it is</div><div class='add'>+		useful to know which 'dport' object in the parent CXL port</div><div class='add'>+		routes to this descendant. The 'parent_dport' symlink points to</div><div class='add'>+		the device representing the downstream port of a CXL switch that</div><div class='add'>+		routes to {port,endpoint}X.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/portX/dportY</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		CXL port objects are enumerated from either a platform firmware</div><div class='del'>-		device (ACPI0017 and ACPI0016) or PCIe switch upstream port with</div><div class='del'>-		CXL component registers. The 'dportY' symlink identifies one or</div><div class='del'>-		more downstream ports that the upstream port may target in its</div><div class='del'>-		decode of CXL memory resources.  The 'Y' integer reflects the</div><div class='del'>-		hardware port unique-id used in the hardware decoder target</div><div class='del'>-		list.</div><div class='add'>+		(RO) CXL port objects are enumerated from either a platform</div><div class='add'>+		firmware device (ACPI0017 and ACPI0016) or PCIe switch upstream</div><div class='add'>+		port with CXL component registers. The 'dportY' symlink</div><div class='add'>+		identifies one or more downstream ports that the upstream port</div><div class='add'>+		may target in its decode of CXL memory resources.  The 'Y'</div><div class='add'>+		integer reflects the hardware port unique-id used in the</div><div class='add'>+		hardware decoder target list.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/cxl/devices/decoderX.Y</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		CXL decoder objects are enumerated from either a platform</div><div class='add'>+		(RO) CXL decoder objects are enumerated from either a platform</div><div class='ctx'> 		firmware description, or a CXL HDM decoder register set in a</div><div class='ctx'> 		PCIe device (see CXL 2.0 section 8.2.5.12 CXL HDM Decoder</div><div class='ctx'> 		Capability Structure). The 'X' in decoderX.Y represents the</div><div class='ctx'> 		cxl_port container of this decoder, and 'Y' represents the</div><div class='ctx'> 		instance id of a given decoder resource.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/decoderX.Y/{start,size}</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		The 'start' and 'size' attributes together convey the physical</div><div class='del'>-		address base and number of bytes mapped in the decoder's decode</div><div class='del'>-		window. For decoders of devtype "cxl_decoder_root" the address</div><div class='del'>-		range is fixed. For decoders of devtype "cxl_decoder_switch" the</div><div class='del'>-		address is bounded by the decode range of the cxl_port ancestor</div><div class='del'>-		of the decoder's cxl_port, and dynamically updates based on the</div><div class='del'>-		active memory regions in that address space.</div><div class='add'>+		(RO) The 'start' and 'size' attributes together convey the</div><div class='add'>+		physical address base and number of bytes mapped in the</div><div class='add'>+		decoder's decode window. For decoders of devtype</div><div class='add'>+		"cxl_decoder_root" the address range is fixed. For decoders of</div><div class='add'>+		devtype "cxl_decoder_switch" the address is bounded by the</div><div class='add'>+		decode range of the cxl_port ancestor of the decoder's cxl_port,</div><div class='add'>+		and dynamically updates based on the active memory regions in</div><div class='add'>+		that address space.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/cxl/devices/decoderX.Y/locked</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		CXL HDM decoders have the capability to lock the configuration</div><div class='del'>-		until the next device reset. For decoders of devtype</div><div class='del'>-		"cxl_decoder_root" there is no standard facility to unlock them.</div><div class='del'>-		For decoders of devtype "cxl_decoder_switch" a secondary bus</div><div class='del'>-		reset, of the PCIe bridge that provides the bus for this</div><div class='del'>-		decoders uport, unlocks / resets the decoder.</div><div class='add'>+		(RO) CXL HDM decoders have the capability to lock the</div><div class='add'>+		configuration until the next device reset. For decoders of</div><div class='add'>+		devtype "cxl_decoder_root" there is no standard facility to</div><div class='add'>+		unlock them.  For decoders of devtype "cxl_decoder_switch" a</div><div class='add'>+		secondary bus reset, of the PCIe bridge that provides the bus</div><div class='add'>+		for this decoders uport, unlocks / resets the decoder.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/cxl/devices/decoderX.Y/target_list</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		Display a comma separated list of the current decoder target</div><div class='del'>-		configuration. The list is ordered by the current configured</div><div class='del'>-		interleave order of the decoder's dport instances. Each entry in</div><div class='del'>-		the list is a dport id.</div><div class='add'>+		(RO) Display a comma separated list of the current decoder</div><div class='add'>+		target configuration. The list is ordered by the current</div><div class='add'>+		configured interleave order of the decoder's dport instances.</div><div class='add'>+		Each entry in the list is a dport id.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/cxl/devices/decoderX.Y/cap_{pmem,ram,type2,type3}</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		When a CXL decoder is of devtype "cxl_decoder_root", it</div><div class='add'>+		(RO) When a CXL decoder is of devtype "cxl_decoder_root", it</div><div class='ctx'> 		represents a fixed memory window identified by platform</div><div class='ctx'> 		firmware. A fixed window may only support a subset of memory</div><div class='ctx'> 		types. The 'cap_*' attributes indicate whether persistent</div><div class='ctx'> 		memory, volatile memory, accelerator memory, and / or expander</div><div class='ctx'> 		memory may be mapped behind this decoder's memory window.</div><div class='ctx'> </div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/cxl/devices/decoderX.Y/target_type</div><div class='ctx'> Date:		June, 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	linux-cxl@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		When a CXL decoder is of devtype "cxl_decoder_switch", it can</div><div class='del'>-		optionally decode either accelerator memory (type-2) or expander</div><div class='del'>-		memory (type-3). The 'target_type' attribute indicates the</div><div class='del'>-		current setting which may dynamically change based on what</div><div class='add'>+		(RO) When a CXL decoder is of devtype "cxl_decoder_switch", it</div><div class='add'>+		can optionally decode either accelerator memory (type-2) or</div><div class='add'>+		expander memory (type-3). The 'target_type' attribute indicates</div><div class='add'>+		the current setting which may dynamically change based on what</div><div class='ctx'> 		memory regions are activated in this decode hierarchy.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/endpointX/CDAT</div><div class='add'>+Date:		July, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RO) If this sysfs entry is not present no DOE mailbox was</div><div class='add'>+		found to support CDAT data.  If it is present and the length of</div><div class='add'>+		the data is 0 reading the CDAT data failed.  Otherwise the CDAT</div><div class='add'>+		data is reported.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/decoderX.Y/mode</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it</div><div class='add'>+		translates from a host physical address range, to a device local</div><div class='add'>+		address range. Device-local address ranges are further split</div><div class='add'>+		into a 'ram' (volatile memory) range and 'pmem' (persistent</div><div class='add'>+		memory) range. The 'mode' attribute emits one of 'ram', 'pmem',</div><div class='add'>+		'mixed', or 'none'. The 'mixed' indication is for error cases</div><div class='add'>+		when a decoder straddles the volatile/persistent partition</div><div class='add'>+		boundary, and 'none' indicates the decoder is not actively</div><div class='add'>+		decoding, or no DPA allocation policy has been set.</div><div class='add'>+</div><div class='add'>+		'mode' can be written, when the decoder is in the 'disabled'</div><div class='add'>+		state, with either 'ram' or 'pmem' to set the boundaries for the</div><div class='add'>+		next allocation.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/decoderX.Y/dpa_resource</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RO) When a CXL decoder is of devtype "cxl_decoder_endpoint",</div><div class='add'>+		and its 'dpa_size' attribute is non-zero, this attribute</div><div class='add'>+		indicates the device physical address (DPA) base address of the</div><div class='add'>+		allocation.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/decoderX.Y/dpa_size</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) When a CXL decoder is of devtype "cxl_decoder_endpoint" it</div><div class='add'>+		translates from a host physical address range, to a device local</div><div class='add'>+		address range. The range, base address plus length in bytes, of</div><div class='add'>+		DPA allocated to this decoder is conveyed in these 2 attributes.</div><div class='add'>+		Allocations can be mutated as long as the decoder is in the</div><div class='add'>+		disabled state. A write to 'dpa_size' releases the previous DPA</div><div class='add'>+		allocation and then attempts to allocate from the free capacity</div><div class='add'>+		in the device partition referred to by 'decoderX.Y/mode'.</div><div class='add'>+		Allocate and free requests can only be performed on the highest</div><div class='add'>+		instance number disabled decoder with non-zero size. I.e.</div><div class='add'>+		allocations are enforced to occur in increasing 'decoderX.Y/id'</div><div class='add'>+		order and frees are enforced to occur in decreasing</div><div class='add'>+		'decoderX.Y/id' order.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/decoderX.Y/interleave_ways</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RO) The number of targets across which this decoder's host</div><div class='add'>+		physical address (HPA) memory range is interleaved. The device</div><div class='add'>+		maps every Nth block of HPA (of size ==</div><div class='add'>+		'interleave_granularity') to consecutive DPA addresses. The</div><div class='add'>+		decoder's position in the interleave is determined by the</div><div class='add'>+		device's (endpoint or switch) switch ancestry. For root</div><div class='add'>+		decoders their interleave is specified by platform firmware and</div><div class='add'>+		they only specify a downstream target order for host bridges.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/decoderX.Y/interleave_granularity</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RO) The number of consecutive bytes of host physical address</div><div class='add'>+		space this decoder claims at address N before the decode rotates</div><div class='add'>+		to the next target in the interleave at address N +</div><div class='add'>+		interleave_granularity (assuming N is aligned to</div><div class='add'>+		interleave_granularity).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/decoderX.Y/create_{pmem,ram}_region</div><div class='add'>+Date:		May, 2022, January, 2023</div><div class='add'>+KernelVersion:	v6.0 (pmem), v6.3 (ram)</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) Write a string in the form 'regionZ' to start the process</div><div class='add'>+		of defining a new persistent, or volatile memory region</div><div class='add'>+		(interleave-set) within the decode range bounded by root decoder</div><div class='add'>+		'decoderX.Y'. The value written must match the current value</div><div class='add'>+		returned from reading this attribute. An atomic compare exchange</div><div class='add'>+		operation is done on write to assign the requested id to a</div><div class='add'>+		region and allocate the region-id for the next creation attempt.</div><div class='add'>+		EBUSY is returned if the region name written does not match the</div><div class='add'>+		current cached value.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/decoderX.Y/delete_region</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(WO) Write a string in the form 'regionZ' to delete that region,</div><div class='add'>+		provided it is currently idle / not bound to a driver.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/uuid</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) Write a unique identifier for the region. This field must</div><div class='add'>+		be set for persistent regions and it must not conflict with the</div><div class='add'>+		UUID of another region. For volatile ram regions this</div><div class='add'>+		attribute is a read-only empty string.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/interleave_granularity</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) Set the number of consecutive bytes each device in the</div><div class='add'>+		interleave set will claim. The possible interleave granularity</div><div class='add'>+		values are determined by the CXL spec and the participating</div><div class='add'>+		devices.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/interleave_ways</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) Configures the number of devices participating in the</div><div class='add'>+		region is set by writing this value. Each device will provide</div><div class='add'>+		1/interleave_ways of storage for the region.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/size</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) System physical address space to be consumed by the region.</div><div class='add'>+		When written trigger the driver to allocate space out of the</div><div class='add'>+		parent root decoder's address space. When read the size of the</div><div class='add'>+		address space is reported and should match the span of the</div><div class='add'>+		region's resource attribute. Size shall be set after the</div><div class='add'>+		interleave configuration parameters. Once set it cannot be</div><div class='add'>+		changed, only freed by writing 0. The kernel makes no guarantees</div><div class='add'>+		that data is maintained over an address space freeing event, and</div><div class='add'>+		there is no guarantee that a free followed by an allocate</div><div class='add'>+		results in the same address being allocated.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/mode</div><div class='add'>+Date:		January, 2023</div><div class='add'>+KernelVersion:	v6.3</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RO) The mode of a region is established at region creation time</div><div class='add'>+		and dictates the mode of the endpoint decoder that comprise the</div><div class='add'>+		region. For more details on the possible modes see</div><div class='add'>+		/sys/bus/cxl/devices/decoderX.Y/mode</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/resource</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RO) A region is a contiguous partition of a CXL root decoder</div><div class='add'>+		address space. Region capacity is allocated by writing to the</div><div class='add'>+		size attribute, the resulting physical address space determined</div><div class='add'>+		by the driver is reflected here. It is therefore not useful to</div><div class='add'>+		read this before writing a value to the size attribute.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/target[0..N]</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) Write an endpoint decoder object name to 'targetX' where X</div><div class='add'>+		is the intended position of the endpoint device in the region</div><div class='add'>+		interleave and N is the 'interleave_ways' setting for the</div><div class='add'>+		region. ENXIO is returned if the write results in an impossible</div><div class='add'>+		to map decode scenario, like the endpoint is unreachable at that</div><div class='add'>+		position relative to the root decoder interleave. EBUSY is</div><div class='add'>+		returned if the position in the region is already occupied, or</div><div class='add'>+		if the region is not in a state to accept interleave</div><div class='add'>+		configuration changes. EINVAL is returned if the object name is</div><div class='add'>+		not an endpoint decoder. Once all positions have been</div><div class='add'>+		successfully written a final validation for decode conflicts is</div><div class='add'>+		performed before activating the region.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/regionZ/commit</div><div class='add'>+Date:		May, 2022</div><div class='add'>+KernelVersion:	v6.0</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) Write a boolean 'true' string value to this attribute to</div><div class='add'>+		trigger the region to transition from the software programmed</div><div class='add'>+		state to the actively decoding in hardware state. The commit</div><div class='add'>+		operation in addition to validating that the region is in proper</div><div class='add'>+		configured state, validates that the decoders are being</div><div class='add'>+		committed in spec mandated order (last committed decoder id +</div><div class='add'>+		1), and checks that the hardware accepts the commit request.</div><div class='add'>+		Reading this value indicates whether the region is committed or</div><div class='add'>+		not.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/cxl/devices/memX/trigger_poison_list</div><div class='add'>+Date:		April, 2023</div><div class='add'>+KernelVersion:	v6.4</div><div class='add'>+Contact:	linux-cxl@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(WO) When a boolean 'true' is written to this attribute the</div><div class='add'>+		memdev driver retrieves the poison list from the device. The</div><div class='add'>+		list consists of addresses that are poisoned, or would result</div><div class='add'>+		in poison if accessed, and the source of the poison. This</div><div class='add'>+		attribute is only visible for devices supporting the</div><div class='add'>+		capability. The retrieved errors are logged as kernel</div><div class='add'>+		events when cxl_poison event tracing is enabled.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-caps b/Documentation/ABI/testing/sysfs-bus-event_source-devices-caps<br/>new file mode 100644<br/>index 000000000000..8757dcf41c08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-event_source-devices-caps?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-event_source-devices-caps</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+What:		/sys/bus/event_source/devices/&lt;dev&gt;/caps</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Linux kernel mailing list &lt;linux-kernel@vger.kernel.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		Attribute group to describe the capabilities exposed</div><div class='add'>+		for a particular pmu. Each attribute of this group can</div><div class='add'>+		expose information specific to a PMU, say pmu_name, so that</div><div class='add'>+		userspace can understand some of the feature which the</div><div class='add'>+		platform specific PMU supports.</div><div class='add'>+</div><div class='add'>+		One of the example available capability in supported platform</div><div class='add'>+		like Intel is pmu_name, which exposes underlying CPU name known</div><div class='add'>+		to the PMU driver.</div><div class='add'>+</div><div class='add'>+		Example output in powerpc:</div><div class='add'>+		grep . /sys/bus/event_source/devices/cpu/caps/*</div><div class='add'>+		/sys/bus/event_source/devices/cpu/caps/pmu_name:POWER9</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-iommu b/Documentation/ABI/testing/sysfs-bus-event_source-devices-iommu<br/>new file mode 100644<br/>index 000000000000..d7af4919302e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-event_source-devices-iommu?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-event_source-devices-iommu</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+What:		/sys/bus/event_source/devices/dmar*/format</div><div class='add'>+Date:		Jan 2023</div><div class='add'>+KernelVersion:  6.3</div><div class='add'>+Contact:	Kan Liang &lt;kan.liang@linux.intel.com&gt;</div><div class='add'>+Description:	Read-only.  Attribute group to describe the magic bits</div><div class='add'>+		that go into perf_event_attr.config,</div><div class='add'>+		perf_event_attr.config1 or perf_event_attr.config2 for</div><div class='add'>+		the IOMMU pmu.  (See also</div><div class='add'>+		ABI/testing/sysfs-bus-event_source-devices-format).</div><div class='add'>+</div><div class='add'>+		Each attribute in this group defines a bit range in</div><div class='add'>+		perf_event_attr.config, perf_event_attr.config1,</div><div class='add'>+		or perf_event_attr.config2. All supported attributes</div><div class='add'>+		are listed below (See the VT-d Spec 4.0 for possible</div><div class='add'>+		attribute values)::</div><div class='add'>+</div><div class='add'>+		    event		= "config:0-27"   - event ID</div><div class='add'>+		    event_group		= "config:28-31"  - event group ID</div><div class='add'>+</div><div class='add'>+		    filter_requester_en	= "config1:0"     - Enable Requester ID filter</div><div class='add'>+		    filter_domain_en	= "config1:1"     - Enable Domain ID filter</div><div class='add'>+		    filter_pasid_en	= "config1:2"     - Enable PASID filter</div><div class='add'>+		    filter_ats_en	= "config1:3"     - Enable Address Type filter</div><div class='add'>+		    filter_page_table_en= "config1:4"     - Enable Page Table Level filter</div><div class='add'>+		    filter_requester_id	= "config1:16-31" - Requester ID filter</div><div class='add'>+		    filter_domain	= "config1:32-47" - Domain ID filter</div><div class='add'>+		    filter_pasid	= "config2:0-21"  - PASID filter</div><div class='add'>+		    filter_ats		= "config2:24-28" - Address Type filter</div><div class='add'>+		    filter_page_table	= "config2:32-36" - Page Table Level filter</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/event_source/devices/dmar*/cpumask</div><div class='add'>+Date:		Jan 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Kan Liang &lt;kan.liang@linux.intel.com&gt;</div><div class='add'>+Description:	Read-only. This file always returns the CPU to which the</div><div class='add'>+		IOMMU pmu is bound for access to all IOMMU pmu performance</div><div class='add'>+		monitoring events.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-fcoe b/Documentation/ABI/testing/sysfs-bus-fcoe<br/>index 8fe787cc4ab7..5a4f2091ac37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-fcoe?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-fcoe</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-fcoe?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-fcoe</a></div><div class='hunk'>@@ -31,7 +31,7 @@ Description:	'FCoE Controller' instances on the fcoe bus.</div><div class='ctx'> 		1) Write interface name to ctlr_create 2) Configure the FCoE</div><div class='ctx'> 		Controller (ctlr_X) 3) Enable the FCoE Controller to begin</div><div class='ctx'> 		discovery and login. The FCoE Controller is destroyed by</div><div class='del'>-		writing it's name, i.e. ctlr_X to the ctlr_delete file.</div><div class='add'>+		writing its name, i.e. ctlr_X to the ctlr_delete file.</div><div class='ctx'> </div><div class='ctx'> Attributes:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio<br/>index d4ccc68fdcf0..7140e8e7313f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio</a></div><div class='hunk'>@@ -79,6 +79,11 @@ Description:</div><div class='ctx'> 		* "accel-base"</div><div class='ctx'> 		* "accel-display"</div><div class='ctx'> </div><div class='add'>+		For devices where an accelerometer is housed in the swivel camera subassembly</div><div class='add'>+		(for AR application), the following standardized label is used:</div><div class='add'>+</div><div class='add'>+		* "accel-camera"</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/current_timestamp_clock</div><div class='ctx'> KernelVersion:	4.5</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='hunk'>@@ -102,6 +107,9 @@ Description:</div><div class='ctx'> 		relevant directories.  If it affects all of the above</div><div class='ctx'> 		then it is to be found in the base device directory.</div><div class='ctx'> </div><div class='add'>+		The stm32-timer-trigger has the additional characteristic that</div><div class='add'>+		a sampling_frequency of 0 is defined to stop sampling.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/sampling_frequency_available</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency_available</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_proximity_sampling_frequency_available</div><div class='hunk'>@@ -188,7 +196,7 @@ Description:</div><div class='ctx'> 		Raw capacitance measurement from channel Y. Units after</div><div class='ctx'> 		application of scale and offset are nanofarads.</div><div class='ctx'> </div><div class='del'>-What:		/sys/.../iio:deviceX/in_capacitanceY-in_capacitanceZ_raw</div><div class='add'>+What:		/sys/.../iio:deviceX/in_capacitanceY-capacitanceZ_raw</div><div class='ctx'> KernelVersion:	3.2</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='hunk'>@@ -199,6 +207,25 @@ Description:</div><div class='ctx'> 		is required is a consistent labeling.  Units after application</div><div class='ctx'> 		of scale and offset are nanofarads.</div><div class='ctx'> </div><div class='add'>+What:		/sys/.../iio:deviceX/in_capacitanceY-capacitanceZ_zeropoint</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		For differential channels, this an offset that is applied</div><div class='add'>+		equally to both inputs. As the reading is of the difference</div><div class='add'>+		between the two inputs, this should not be applied to the _raw</div><div class='add'>+		reading by userspace (unlike _offset) and unlike calibbias</div><div class='add'>+		it does not affect the differential value measured because</div><div class='add'>+		the effect of _zeropoint cancels out across the two inputs</div><div class='add'>+		that make up the differential pair. It's purpose is to bring</div><div class='add'>+		the individual signals, before the differential is measured,</div><div class='add'>+		within the measurement range of the device. The naming is</div><div class='add'>+		chosen because if the separate inputs that make the</div><div class='add'>+		differential pair are drawn on a graph in their</div><div class='add'>+		_raw  units, this is the value that the zero point on the</div><div class='add'>+		measurement axis represents. It is expressed with the</div><div class='add'>+		same scaling as _raw.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_temp_raw</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_tempX_raw</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_temp_x_raw</div><div class='hunk'>@@ -233,6 +260,15 @@ Description:</div><div class='ctx'> 		Has all of the equivalent parameters as per voltageY. Units</div><div class='ctx'> 		after application of scale and offset are m/s^2.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_linear_x_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_linear_y_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_linear_z_raw</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		As per in_accel_X_raw attributes, but minus the</div><div class='add'>+		acceleration due to gravity.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_gravity_x_raw</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_gravity_y_raw</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_gravity_z_raw</div><div class='hunk'>@@ -1771,8 +1807,8 @@ What:		/sys/bus/iio/devices/iio:deviceX/out_resistanceX_raw</div><div class='ctx'> KernelVersion:	4.3</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		Raw (unscaled no offset etc.) resistance reading that can be processed</div><div class='del'>-		into an ohm value.</div><div class='add'>+		Raw (unscaled no offset etc.) resistance reading.</div><div class='add'>+		Units after application of scale and offset are ohms.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/heater_enable</div><div class='ctx'> KernelVersion:	4.1.0</div><div class='hunk'>@@ -1858,8 +1894,9 @@ What:		/sys/bus/iio/devices/iio:deviceX/in_electricalconductivity_raw</div><div class='ctx'> KernelVersion:	4.8</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		Raw (unscaled no offset etc.) electric conductivity reading that</div><div class='del'>-		can be processed to siemens per meter.</div><div class='add'>+		Raw (unscaled no offset etc.) electric conductivity reading.</div><div class='add'>+		Units after application of scale and offset are siemens per</div><div class='add'>+		meter.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_countY_raw</div><div class='ctx'> KernelVersion:	4.10</div><div class='hunk'>@@ -1915,8 +1952,8 @@ What:		/sys/bus/iio/devices/iio:deviceX/in_phaseY_raw</div><div class='ctx'> KernelVersion:	4.18</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		Raw (unscaled) phase difference reading from channel Y</div><div class='del'>-		that can be processed to radians.</div><div class='add'>+		Raw (unscaled) phase difference reading from channel Y.</div><div class='add'>+		Units after application of scale and offset are radians.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_massconcentration_pm1_input</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_massconcentrationY_pm1_input</div><div class='hunk'>@@ -2030,3 +2067,99 @@ Description:</div><div class='ctx'> 		Available range for the forced calibration value, expressed as:</div><div class='ctx'> </div><div class='ctx'> 		- a range specified as "[min step max]"</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageX_sampling_frequency</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_powerY_sampling_frequency</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_currentZ_sampling_frequency</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Some devices have separate controls of sampling frequency for</div><div class='add'>+		individual channels. If multiple channels are enabled in a scan,</div><div class='add'>+		then the sampling_frequency of the scan may be computed from the</div><div class='add'>+		per channel sampling frequencies.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_singletap_en</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_doubletap_en</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Device generates an event on a single or double tap.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_singletap_value</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_doubletap_value</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Specifies the threshold value that the device is comparing</div><div class='add'>+		against to generate the tap gesture event. The lower</div><div class='add'>+		threshold value increases the sensitivity of tap detection.</div><div class='add'>+		Units and the exact meaning of value are device-specific.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_tap_value_available</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Lists all available threshold values which can be used to</div><div class='add'>+		modify the sensitivity of the tap detection.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_singletap_reset_timeout</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_doubletap_reset_timeout</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Specifies the timeout value in seconds for the tap detector</div><div class='add'>+		to not to look for another tap event after the event as</div><div class='add'>+		occurred. Basically the minimum quiet time between the two</div><div class='add'>+		single-tap's or two double-tap's.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_tap_reset_timeout_available</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Lists all available tap reset timeout values. Units in seconds.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_doubletap_tap2_min_delay</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Specifies the minimum quiet time in seconds between the two</div><div class='add'>+		taps of a double tap.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_doubletap_tap2_min_delay_available</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Lists all available delay values between two taps in the double</div><div class='add'>+		tap. Units in seconds.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_tap_maxtomin_time</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Specifies the maximum time difference allowed between upper</div><div class='add'>+		and lower peak of tap to consider it as the valid tap event.</div><div class='add'>+		Units in seconds.</div><div class='add'>+</div><div class='add'>+What:		/sys/.../events/in_accel_gesture_tap_maxtomin_time_available</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Lists all available time values between upper peak to lower</div><div class='add'>+		peak. Units in seconds.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_rot_yaw_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_rot_pitch_raw</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_rot_roll_raw</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Raw (unscaled) euler angles readings. Units after</div><div class='add'>+		application of scale are deg.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/serialnumber</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		An example format is 16-bytes, 2-digits-per-byte, HEX-string</div><div class='add'>+		representing the sensor unique ID number.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130<br/>new file mode 100644<br/>index 000000000000..f24ed6687e90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available</div><div class='add'>+KernelVersion:  6.2</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Reading returns a list with the possible filter modes.</div><div class='add'>+</div><div class='add'>+		  * "sinc4"       - Sinc 4. Excellent noise performance. Long</div><div class='add'>+                    1st conversion time. No natural 50/60Hz rejection.</div><div class='add'>+</div><div class='add'>+		  * "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion</div><div class='add'>+		    time.</div><div class='add'>+</div><div class='add'>+		  * "sinc3"	      - Sinc3. Moderate 1st conversion time.</div><div class='add'>+		    Good noise performance.</div><div class='add'>+</div><div class='add'>+		  * "sinc3+rej60" - Sinc3 + 60Hz rejection. At a sampling</div><div class='add'>+		    frequency of 50Hz, achieves simultaneous 50Hz and 60Hz</div><div class='add'>+		    rejection.</div><div class='add'>+</div><div class='add'>+		  * "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion</div><div class='add'>+		    time. Best used with a sampling frequency of at least</div><div class='add'>+		    216.19Hz.</div><div class='add'>+</div><div class='add'>+		  * "sinc3+pf1"   - Sinc3 + Post Filter 1. 53dB rejection @</div><div class='add'>+		    50Hz, 58dB rejection @ 60Hz.</div><div class='add'>+</div><div class='add'>+		  * "sinc3+pf2"   - Sinc3 + Post Filter 2. 70dB rejection @</div><div class='add'>+		    50Hz, 70dB rejection @ 60Hz.</div><div class='add'>+</div><div class='add'>+		  * "sinc3+pf3"   - Sinc3 + Post Filter 3. 99dB rejection @</div><div class='add'>+		    50Hz, 103dB rejection @ 60Hz.</div><div class='add'>+</div><div class='add'>+		  * "sinc3+pf4"   - Sinc3 + Post Filter 4. 103dB rejection @</div><div class='add'>+		    50Hz, 109dB rejection @ 60Hz.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode</div><div class='add'>+KernelVersion:  6.2</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Set the filter mode of the differential channel. When the filter</div><div class='add'>+		mode changes, the in_voltageY-voltageZ_sampling_frequency and</div><div class='add'>+		in_voltageY-voltageZ_sampling_frequency_available attributes</div><div class='add'>+		might also change to accommodate the new filter mode.</div><div class='add'>+		If the current sampling frequency is out of range for the new</div><div class='add'>+		filter mode, the sampling frequency will be changed to the</div><div class='add'>+		closest valid one.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-max11410 b/Documentation/ABI/testing/sysfs-bus-iio-adc-max11410<br/>new file mode 100644<br/>index 000000000000..2a53c6b37360<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-adc-max11410?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-adc-max11410</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_filterY_notch_en</div><div class='add'>+Date:		September 2022</div><div class='add'>+KernelVersion:  6.0</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Enable or disable a notch filter.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_filterY_notch_center</div><div class='add'>+Date:		September 2022</div><div class='add'>+KernelVersion:  6.0</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Center frequency of the notch filter in Hz.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-bno055 b/Documentation/ABI/testing/sysfs-bus-iio-bno055<br/>new file mode 100644<br/>index 000000000000..f32b1644e986<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-bno055?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-bno055</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_raw_range</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Raw (unscaled) range for acceleration readings. Unit after</div><div class='add'>+		application of scale is m/s^2. Note that this doesn't affects</div><div class='add'>+		the scale (which should be used when changing the maximum and</div><div class='add'>+		minimum readable value affects also the reading scaling factor).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_raw_range</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Range for angular velocity readings in radians per second. Note</div><div class='add'>+		that this does not affects the scale (which should be used when</div><div class='add'>+		changing the maximum and minimum readable value affects also the</div><div class='add'>+		reading scaling factor).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_raw_range_available</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		List of allowed values for in_accel_raw_range attribute</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_raw_range_available</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		List of allowed values for in_anglvel_raw_range attribute</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_magn_calibration_fast_enable</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Can be 1 or 0. Enables/disables the "Fast Magnetometer</div><div class='add'>+		Calibration" HW function.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/fusion_enable</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Can be 1 or 0. Enables/disables the "sensor fusion" (a.k.a.</div><div class='add'>+		NDOF) HW function.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/calibration_data</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Reports the binary calibration data blob for the IMU sensors.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_calibration_auto_status</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Reports the autocalibration status for the accelerometer sensor.</div><div class='add'>+		Can be 0 (calibration non even enabled) or 1 to 5 where the greater</div><div class='add'>+		the number, the better the calibration status.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_gyro_calibration_auto_status</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Reports the autocalibration status for the gyroscope sensor.</div><div class='add'>+		Can be 0 (calibration non even enabled) or 1 to 5 where the greater</div><div class='add'>+		the number, the better the calibration status.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_magn_calibration_auto_status</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Reports the autocalibration status for the magnetometer sensor.</div><div class='add'>+		Can be 0 (calibration non even enabled) or 1 to 5 where the greater</div><div class='add'>+		the number, the better the calibration status.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/sys_calibration_auto_status</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Reports the status for the IMU overall autocalibration.</div><div class='add'>+		Can be 0 (calibration non even enabled) or 1 to 5 where the greater</div><div class='add'>+		the number, the better the calibration status.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746 b/Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746<br/>new file mode 100644<br/>index 000000000000..02ca8941dce1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-cdc-ad7746</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+What:		/sys/.../iio:deviceX/in_capacitableY_calibbias_calibration</div><div class='add'>+What:		/sys/.../iio:deviceX/in_capacitableY_calibscale_calibration</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Write 1 to trigger a calibration of the calibbias or</div><div class='add'>+		calibscale. For calibscale, a full scale capacitance should</div><div class='add'>+		be connected to the capacitance input and a</div><div class='add'>+		calibscale_calibration then started.  For calibbias see</div><div class='add'>+		the device datasheet section on "capacitive system offset</div><div class='add'>+		calibration".</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-proximity b/Documentation/ABI/testing/sysfs-bus-iio-proximity<br/>index 3aac6dab8775..9b9d1cc9b703 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-proximity?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-proximity</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-proximity?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-proximity</a></div><div class='hunk'>@@ -18,7 +18,7 @@ Description:</div><div class='ctx'> 		on the signal from which time of flight measurements are</div><div class='ctx'> 		taken.</div><div class='ctx'> 		The appropriate values to take is dependent on both the</div><div class='del'>-		sensor and it's operating environment:</div><div class='add'>+		sensor and its operating environment:</div><div class='ctx'> 		* as3935 (0-31 range)</div><div class='ctx'> 		18 = indoors (default)</div><div class='ctx'> 		14 = outdoors</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-sx9324 b/Documentation/ABI/testing/sysfs-bus-iio-sx9324<br/>index 632e3321f5a3..a8342770e7cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-sx9324?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-sx9324</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-sx9324?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-sx9324</a></div><div class='hunk'>@@ -5,6 +5,7 @@ Contact:	Gwendal Grignou &lt;gwendal@chromium.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		SX9324 has 3 inputs, CS0, CS1 and CS2. Hardware layout</div><div class='ctx'> 		defines if the input is</div><div class='add'>+</div><div class='ctx'> 		+ not connected (HZ),</div><div class='ctx'> 		+ grounded (GD),</div><div class='ctx'> 		+ connected to an antenna where it can act as a base</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31856 b/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31856<br/>deleted file mode 100644<br/>index e5ef6d8e5da1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31856?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-temperature-max31856</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-What:		/sys/bus/iio/devices/iio:deviceX/fault_oc</div><div class='del'>-KernelVersion:	5.1</div><div class='del'>-Contact:	linux-iio@vger.kernel.org</div><div class='del'>-Description:</div><div class='del'>-		Open-circuit fault. The detection of open-circuit faults,</div><div class='del'>-		such as those caused by broken thermocouple wires.</div><div class='del'>-		Reading returns either '1' or '0'.</div><div class='del'>-</div><div class='del'>-		===  =======================================================</div><div class='del'>-		'1'  An open circuit such as broken thermocouple wires</div><div class='del'>-		     has been detected.</div><div class='del'>-		'0'  No open circuit or broken thermocouple wires are detected</div><div class='del'>-		===  =======================================================</div><div class='del'>-</div><div class='del'>-What:		/sys/bus/iio/devices/iio:deviceX/fault_ovuv</div><div class='del'>-KernelVersion:	5.1</div><div class='del'>-Contact:	linux-iio@vger.kernel.org</div><div class='del'>-Description:</div><div class='del'>-		Overvoltage or Undervoltage Input Fault. The internal circuitry</div><div class='del'>-		is protected from excessive voltages applied to the thermocouple</div><div class='del'>-		cables by integrated MOSFETs at the T+ and T- inputs, and the</div><div class='del'>-		BIAS output. These MOSFETs turn off when the input voltage is</div><div class='del'>-		negative or greater than VDD.</div><div class='del'>-</div><div class='del'>-		Reading returns either '1' or '0'.</div><div class='del'>-</div><div class='del'>-		===  =======================================================</div><div class='del'>-		'1'  The input voltage is negative or greater than VDD.</div><div class='del'>-		'0'  The input voltage is positive and less than VDD (normal</div><div class='del'>-		     state).</div><div class='del'>-		===  =======================================================</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31865 b/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31865<br/>deleted file mode 100644<br/>index 4b072da92218..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-temperature-max31865?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-temperature-max31865</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-What:		/sys/bus/iio/devices/iio:deviceX/fault_ovuv</div><div class='del'>-KernelVersion:	5.11</div><div class='del'>-Contact:	linux-iio@vger.kernel.org</div><div class='del'>-Description:</div><div class='del'>-		Overvoltage or Undervoltage Input fault. The internal circuitry</div><div class='del'>-		is protected from excessive voltages applied to the thermocouple</div><div class='del'>-		cables at FORCE+, FORCE2, RTDIN+ &amp; RTDIN-. This circuitry turn</div><div class='del'>-		off when the input voltage is negative or greater than VDD.</div><div class='del'>-</div><div class='del'>-		Reading returns '1' if input voltage is negative or greater</div><div class='del'>-		than VDD, otherwise '0'.</div><div class='del'>-</div><div class='del'>-What:		/sys/bus/iio/devices/iio:deviceX/in_filter_notch_center_frequency</div><div class='del'>-KernelVersion:	5.11</div><div class='del'>-Contact:	linux-iio@vger.kernel.org</div><div class='del'>-Description:</div><div class='del'>-		Notch frequency in Hz for a noise rejection filter. Used i.e for</div><div class='del'>-		line noise rejection.</div><div class='del'>-</div><div class='del'>-		Valid notch filter values are 50 Hz and 60 Hz.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-thermocouple b/Documentation/ABI/testing/sysfs-bus-iio-thermocouple<br/>new file mode 100644<br/>index 000000000000..01259df297ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-thermocouple?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-thermocouple</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/fault_ovuv</div><div class='add'>+KernelVersion:	5.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Overvoltage or Undervoltage Input Fault. The internal circuitry</div><div class='add'>+		is protected from excessive voltages applied to the thermocouple</div><div class='add'>+		cables. The device can also detect if such a condition occurs.</div><div class='add'>+</div><div class='add'>+		Reading returns '1' if input voltage is negative or greater</div><div class='add'>+		than VDD, otherwise '0'.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/fault_oc</div><div class='add'>+KernelVersion:	5.1</div><div class='add'>+Contact:	linux-iio@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		Open-circuit fault. The detection of open-circuit faults,</div><div class='add'>+		such as those caused by broken thermocouple wires.</div><div class='add'>+		Reading returns '1' if fault, '0' otherwise.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 b/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32<br/>index c4a4497c249a..05074c4a65e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-timer-stm32</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-timer-stm32?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-timer-stm32</a></div><div class='hunk'>@@ -90,14 +90,6 @@ Description:</div><div class='ctx'> 		Reading returns the current master modes.</div><div class='ctx'> 		Writing set the master mode</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/iio/devices/triggerX/sampling_frequency</div><div class='del'>-KernelVersion:	4.11</div><div class='del'>-Contact:	benjamin.gaignard@st.com</div><div class='del'>-Description:</div><div class='del'>-		Reading returns the current sampling frequency.</div><div class='del'>-		Writing an value different of 0 set and start sampling.</div><div class='del'>-		Writing 0 stop sampling.</div><div class='del'>-</div><div class='ctx'> What:		/sys/bus/iio/devices/iio:deviceX/in_count0_preset</div><div class='ctx'> KernelVersion:	4.12</div><div class='ctx'> Contact:	benjamin.gaignard@st.com</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-iio-vf610 b/Documentation/ABI/testing/sysfs-bus-iio-vf610<br/>index 308a6756d3bf..491ead804488 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-vf610?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-iio-vf610</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-iio-vf610?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-iio-vf610</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-What:		/sys/bus/iio/devices/iio:deviceX/conversion_mode</div><div class='add'>+What:		/sys/bus/iio/devices/iio:deviceX/in_conversion_mode</div><div class='ctx'> KernelVersion:	4.2</div><div class='ctx'> Contact:	linux-iio@vger.kernel.org</div><div class='ctx'> Description:</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-nvdimm b/Documentation/ABI/testing/sysfs-bus-nvdimm<br/>index 1c1f5acbf53d..de8c5a59c77f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-nvdimm?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-nvdimm</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-nvdimm?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-nvdimm</a></div><div class='hunk'>@@ -41,3 +41,17 @@ KernelVersion:  5.18</div><div class='ctx'> Contact:        Kajol Jain &lt;kjain@linux.ibm.com&gt;</div><div class='ctx'> Description:	(RO) This sysfs file exposes the cpumask which is designated to</div><div class='ctx'> 		to retrieve nvdimm pmu event counter data.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/nd/devices/nmemX/cxl/id</div><div class='add'>+Date:		November 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	Dave Jiang &lt;dave.jiang@intel.com&gt;</div><div class='add'>+Description:	(RO) Show the id (serial) of the device. This is CXL specific.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/nd/devices/nmemX/cxl/provider</div><div class='add'>+Date:		November 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	Dave Jiang &lt;dave.jiang@intel.com&gt;</div><div class='add'>+Description:	(RO) Shows the CXL bridge device that ties to a CXL memory device</div><div class='add'>+		to this NVDIMM device. I.e. the parent of the device returned is</div><div class='add'>+		a /sys/bus/cxl/devices/memX instance.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci<br/>index 6fc2c2efe8ab..ecf47559f495 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-pci?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-pci</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-pci?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-pci</a></div><div class='hunk'>@@ -407,6 +407,16 @@ Description:</div><div class='ctx'> 	        file contains a '1' if the memory has been published for</div><div class='ctx'> 		use outside the driver that owns the device.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/pci/devices/.../p2pmem/allocate</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Logan Gunthorpe &lt;logang@deltatee.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file allows mapping p2pmem into userspace. For each</div><div class='add'>+		mmap() call on this file, the kernel will allocate a chunk</div><div class='add'>+		of Peer-to-Peer memory for use in Peer-to-Peer transactions.</div><div class='add'>+		This memory can be used in O_DIRECT calls to NVMe backed</div><div class='add'>+		files for Peer-to-Peer copies.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/pci/devices/.../link/clkpm</div><div class='ctx'> 		/sys/bus/pci/devices/.../link/l0s_aspm</div><div class='ctx'> 		/sys/bus/pci/devices/.../link/l1_aspm</div><div class='hunk'>@@ -457,3 +467,36 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 		The file is writable if the PF is bound to a driver that</div><div class='ctx'> 		implements -&gt;sriov_set_msix_vec_count().</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/.../resourceN_resize</div><div class='add'>+Date:		September 2022</div><div class='add'>+Contact:	Alex Williamson &lt;alex.williamson@redhat.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		These files provide an interface to PCIe Resizable BAR support.</div><div class='add'>+		A file is created for each BAR resource (N) supported by the</div><div class='add'>+		PCIe Resizable BAR extended capability of the device.  Reading</div><div class='add'>+		each file exposes the bitmap of available resource sizes:</div><div class='add'>+</div><div class='add'>+		# cat resource1_resize</div><div class='add'>+		00000000000001c0</div><div class='add'>+</div><div class='add'>+		The bitmap represents supported resource sizes for the BAR,</div><div class='add'>+		where bit0 = 1MB, bit1 = 2MB, bit2 = 4MB, etc.  In the above</div><div class='add'>+		example the device supports 64MB, 128MB, and 256MB BAR sizes.</div><div class='add'>+</div><div class='add'>+		When writing the file, the user provides the bit position of</div><div class='add'>+		the desired resource size, for example:</div><div class='add'>+</div><div class='add'>+		# echo 7 &gt; resource1_resize</div><div class='add'>+</div><div class='add'>+		This indicates to set the size value corresponding to bit 7,</div><div class='add'>+		128MB.  The resulting size is 2 ^ (bit# + 20).  This definition</div><div class='add'>+		matches the PCIe specification of this capability.</div><div class='add'>+</div><div class='add'>+		In order to make use of resource resizing, all PCI drivers must</div><div class='add'>+		be unbound from the device and peer devices under the same</div><div class='add'>+		parent bridge may need to be soft removed.  In the case of</div><div class='add'>+		VGA devices, writing a resize value will remove low level</div><div class='add'>+		console drivers from the device.  Raw users of pci-sysfs</div><div class='add'>+		resourceN attributes must be terminated prior to resizing.</div><div class='add'>+		Success of the resizing operation is not guaranteed.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd b/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd<br/>index 0088aba4caa8..5a775b8f6543 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd</a></div><div class='hunk'>@@ -23,3 +23,55 @@ Description:</div><div class='ctx'> 		Reading this attribute gives the state of the DbC. It</div><div class='ctx'> 		can be one of the following states: disabled, enabled,</div><div class='ctx'> 		initialized, connected, configured and stalled.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xhci_hcd/.../dbc_idVendor</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This dbc_idVendor attribute lets us change the idVendor field</div><div class='add'>+		presented in the USB device descriptor by this xhci debug</div><div class='add'>+		device.</div><div class='add'>+		Value can only be changed while debug capability (DbC) is in</div><div class='add'>+		disabled state to prevent USB device descriptor change while</div><div class='add'>+		connected to a USB host.</div><div class='add'>+		The default value is 0x1d6b (Linux Foundation).</div><div class='add'>+		It can be any 16-bit integer.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xhci_hcd/.../dbc_idProduct</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This dbc_idProduct attribute lets us change the idProduct field</div><div class='add'>+		presented in the USB device descriptor by this xhci debug</div><div class='add'>+		device.</div><div class='add'>+		Value can only be changed while debug capability (DbC) is in</div><div class='add'>+		disabled state to prevent USB device descriptor change while</div><div class='add'>+		connected to a USB host.</div><div class='add'>+		The default value is 0x0010. It can be any 16-bit integer.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xhci_hcd/.../dbc_bcdDevice</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This dbc_bcdDevice attribute lets us change the bcdDevice field</div><div class='add'>+		presented in the USB device descriptor by this xhci debug</div><div class='add'>+		device.</div><div class='add'>+		Value can only be changed while debug capability (DbC) is in</div><div class='add'>+		disabled state to prevent USB device descriptor change while</div><div class='add'>+		connected to a USB host.</div><div class='add'>+		The default value is 0x0010. (device rev 0.10)</div><div class='add'>+		It can be any 16-bit integer.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/drivers/xhci_hcd/.../dbc_bInterfaceProtocol</div><div class='add'>+Date:		March 2023</div><div class='add'>+Contact:	Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This attribute lets us change the bInterfaceProtocol field</div><div class='add'>+		presented in the USB Interface descriptor by the xhci debug</div><div class='add'>+		device.</div><div class='add'>+		Value can only be changed while debug capability (DbC) is in</div><div class='add'>+		disabled state to prevent USB descriptor change while</div><div class='add'>+		connected to a USB host.</div><div class='add'>+		The default value is 1  (GNU Remote Debug command).</div><div class='add'>+		Other permissible value is 0 which is for vendor defined debug</div><div class='add'>+		target.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro b/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro<br/>new file mode 100644<br/>index 000000000000..fead760dcf77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro</a></div><div class='hunk'>@@ -0,0 +1,325 @@</div><div class='add'>+What:		/sys/bus/platform/devices/smpro-errmon.*/error_[core|mem|pcie|other]_[ce|ue]</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RO) Contains the 48-byte Ampere (Vendor-Specific) Error Record printed</div><div class='add'>+		in hex format according to the table below:</div><div class='add'>+</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| Offset |     Field     | Size (byte) |                     Description                            |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 00     | Error Type    | 1           | See :ref:`the table below &lt;smpro-error-types&gt;` for details |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 01     | Subtype       | 1           | See :ref:`the table below &lt;smpro-error-types&gt;` for details |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 02     | Instance      | 2           | See :ref:`the table below &lt;smpro-error-types&gt;` for details |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 04     | Error status  | 4           | See ARM RAS specification for details                      |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 08     | Error Address | 8           | See ARM RAS specification for details                      |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 16     | Error Misc 0  | 8           | See ARM RAS specification for details                      |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 24     | Error Misc 1  | 8           | See ARM RAS specification for details                      |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 32     | Error Misc 2  | 8           | See ARM RAS specification for details                      |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+		| 40     | Error Misc 3  | 8           | See ARM RAS specification for details                      |</div><div class='add'>+		+--------+---------------+-------------+------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+		The table below defines the value of error types, their subtype, subcomponent and instance:</div><div class='add'>+</div><div class='add'>+		.. _smpro-error-types:</div><div class='add'>+</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		|   Error Group   | Error Type | Sub type | Sub component  |               Instance                 |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| CPM (core)      | 0          | 0        | Snoop-Logic    | CPM #                                  |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| CPM (core)      | 0          | 2        | Armv8 Core 1   | CPM #                                  |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| MCU (mem)       | 1          | 1        | ERR1           | MCU # \| SLOT &lt;&lt; 11                    |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| MCU (mem)       | 1          | 2        | ERR2           | MCU # \| SLOT &lt;&lt; 11                    |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| MCU (mem)       | 1          | 3        | ERR3           | MCU #                                  |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| MCU (mem)       | 1          | 4        | ERR4           | MCU #                                  |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| MCU (mem)       | 1          | 5        | ERR5           | MCU #                                  |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| MCU (mem)       | 1          | 6        | ERR6           | MCU #                                  |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| MCU (mem)       | 1          | 7        | Link Error     | MCU #                                  |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| Mesh (other)    | 2          | 0        | Cross Point    | X \| (Y &lt;&lt; 5) \| NS &lt;&lt;11               |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| Mesh (other)    | 2          | 1        | Home Node(IO)  | X \| (Y &lt;&lt; 5) \| NS &lt;&lt;11               |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| Mesh (other)    | 2          | 2        | Home Node(Mem) | X \| (Y &lt;&lt; 5) \| NS &lt;&lt;11 \| device&lt;&lt;12 |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| Mesh (other)    | 2          | 4        | CCIX Node      | X \| (Y &lt;&lt; 5) \| NS &lt;&lt;11               |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| 2P Link (other) | 3          | 0        | N/A            | Altra 2P Link #                        |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 0        | ERR0           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 1        | ERR1           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 2        | ERR2           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 3        | ERR3           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 4        | ERR4           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 5        | ERR5           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 6        | ERR6           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 7        | ERR7           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 8        | ERR8           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 9        | ERR9           | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 10       | ERR10          | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 11       | ERR11          | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 12       | ERR12          | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| GIC (other)     | 5          | 13-21    | ERR13          | RC # + 1                               |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TCU      | 100            | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU0     | 0              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU1     | 1              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU2     | 2              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU3     | 3              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU4     | 4              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU5     | 5              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU6     | 6              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU7     | 7              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU8     | 8              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMMU (other)    | 6          | TBU9     | 9              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PCIe AER (pcie) | 7          | Root     | 0              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PCIe AER (pcie) | 7          | Device   | 1              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PCIe RC (pcie)  | 8          | RCA HB   | 0              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PCIe RC (pcie)  | 8          | RCB HB   | 1              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PCIe RC (pcie)  | 8          | RASDP    | 8              | RC #                                   |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| OCM (other)     | 9          | ERR0     | 0              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| OCM (other)     | 9          | ERR1     | 1              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| OCM (other)     | 9          | ERR2     | 2              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMpro (other)   | 10         | ERR0     | 0              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMpro (other)   | 10         | ERR1     | 1              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| SMpro (other)   | 10         | MPA_ERR  | 2              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PMpro (other)   | 11         | ERR0     | 0              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PMpro (other)   | 11         | ERR1     | 1              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+		| PMpro (other)   | 11         | MPA_ERR  | 2              | 0                                      |</div><div class='add'>+		+-----------------+------------+----------+----------------+----------------------------------------+</div><div class='add'>+</div><div class='add'>+		Example::</div><div class='add'>+</div><div class='add'>+		 # cat error_other_ue</div><div class='add'>+		 880807001e004010401040101500000001004010401040100c0000000000000000000000000000000000000000000000</div><div class='add'>+</div><div class='add'>+		The detail of each sysfs entries is as below:</div><div class='add'>+</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		|   Error     |                   Sysfs entry                           |   Description (when triggered)   |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| Core's CE   | /sys/bus/platform/devices/smpro-errmon.*/error_core_ce  | Core has CE error                |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| Core's UE   | /sys/bus/platform/devices/smpro-errmon.*/error_core_ue  | Core has UE error                |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ce   | Memory has CE error              |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ue   | Memory has UE error              |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| PCIe's CE   | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ce  | any PCIe controller has CE error |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| PCIe's UE   | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ue  | any PCIe controller has UE error |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| Other's CE  | /sys/bus/platform/devices/smpro-errmon.*/error_other_ce | any other CE error               |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+		| Other's UE  | /sys/bus/platform/devices/smpro-errmon.*/error_other_ue | any other UE error               |</div><div class='add'>+		+-------------+---------------------------------------------------------+----------------------------------+</div><div class='add'>+</div><div class='add'>+		UE: Uncorrect-able Error</div><div class='add'>+		CE: Correct-able Error</div><div class='add'>+</div><div class='add'>+		For details, see section `3.3 Ampere (Vendor-Specific) Error Record Formats,</div><div class='add'>+		Altra Family RAS Supplement`.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/smpro-errmon.*/overflow_[core|mem|pcie|other]_[ce|ue]</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RO) Return the overflow status of each type HW error reported:</div><div class='add'>+</div><div class='add'>+		  - 0      : No overflow</div><div class='add'>+		  - 1      : There is an overflow and the oldest HW errors are dropped</div><div class='add'>+</div><div class='add'>+		The detail of each sysfs entries is as below:</div><div class='add'>+</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		|   Overflow  |                   Sysfs entry                             |             Description               |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| Core's CE   | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ce | Core CE error overflow                |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| Core's UE   | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ue | Core UE error overflow                |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ce  | Memory CE error overflow              |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ue  | Memory UE error overflow              |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| PCIe's CE   | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ce | any PCIe controller CE error overflow |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| PCIe's UE   | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ue | any PCIe controller UE error overflow |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| Other's CE  | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ce| any other CE error overflow           |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+		| Other's UE  | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ue| other UE error overflow               |</div><div class='add'>+		+-------------+-----------------------------------------------------------+---------------------------------------+</div><div class='add'>+</div><div class='add'>+		where:</div><div class='add'>+</div><div class='add'>+		  - UE: Uncorrect-able Error</div><div class='add'>+		  - CE: Correct-able Error</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/smpro-errmon.*/[error|warn]_[smpro|pmpro]</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RO) Contains the internal firmware error/warning printed as hex format.</div><div class='add'>+</div><div class='add'>+		The detail of each sysfs entries is as below:</div><div class='add'>+</div><div class='add'>+		+---------------+------------------------------------------------------+--------------------------+</div><div class='add'>+		|   Error       |                   Sysfs entry                        |        Description       |</div><div class='add'>+		+---------------+------------------------------------------------------+--------------------------+</div><div class='add'>+		| SMpro error   | /sys/bus/platform/devices/smpro-errmon.*/error_smpro | system has SMpro error   |</div><div class='add'>+		+---------------+------------------------------------------------------+--------------------------+</div><div class='add'>+		| SMpro warning | /sys/bus/platform/devices/smpro-errmon.*/warn_smpro  | system has SMpro warning |</div><div class='add'>+		+---------------+------------------------------------------------------+--------------------------+</div><div class='add'>+		| PMpro error   | /sys/bus/platform/devices/smpro-errmon.*/error_pmpro | system has PMpro error   |</div><div class='add'>+		+---------------+------------------------------------------------------+--------------------------+</div><div class='add'>+		| PMpro warning | /sys/bus/platform/devices/smpro-errmon.*/warn_pmpro  | system has PMpro warning |</div><div class='add'>+		+---------------+------------------------------------------------------+--------------------------+</div><div class='add'>+</div><div class='add'>+		For details, see section `5.10 RAS Internal Error Register Definitions,</div><div class='add'>+		Altra Family Soc BMC Interface Specification`.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/smpro-errmon.*/event_[vrd_warn_fault|vrd_hot|dimm_hot|dimm_2x_refresh]</div><div class='add'>+KernelVersion:	6.1 (event_[vrd_warn_fault|vrd_hot|dimm_hot]), 6.4 (event_dimm_2x_refresh)</div><div class='add'>+Contact:	Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RO) Contains the detail information in case of VRD/DIMM warning/hot events</div><div class='add'>+		in hex format as below::</div><div class='add'>+</div><div class='add'>+		    AAAA</div><div class='add'>+</div><div class='add'>+		where:</div><div class='add'>+</div><div class='add'>+		  - ``AAAA``: The event detail information data</div><div class='add'>+</div><div class='add'>+		The detail of each sysfs entries is as below:</div><div class='add'>+</div><div class='add'>+		+---------------+---------------------------------------------------------------+---------------------+</div><div class='add'>+		|   Event       |                        Sysfs entry                            |     Description     |</div><div class='add'>+		+---------------+---------------------------------------------------------------+---------------------+</div><div class='add'>+		| VRD HOT       | /sys/bus/platform/devices/smpro-errmon.*/event_vrd_hot        | VRD Hot             |</div><div class='add'>+		+---------------+---------------------------------------------------------------+---------------------+</div><div class='add'>+		| VR Warn/Fault | /sys/bus/platform/devices/smpro-errmon.*/event_vrd_warn_fault | VR Warning or Fault |</div><div class='add'>+		+---------------+---------------------------------------------------------------+---------------------+</div><div class='add'>+		| DIMM HOT      | /sys/bus/platform/devices/smpro-errmon.*/event_dimm_hot       | DIMM Hot            |</div><div class='add'>+		+---------------+---------------------------------------------------------------+---------------------+</div><div class='add'>+		| DIMM 2X       | /sys/bus/platform/devices/smpro-errmon.*/event_dimm_2x_refresh| DIMM 2x refresh rate|</div><div class='add'>+		| REFRESH RATE  |                                                               | event in high temp  |</div><div class='add'>+		+---------------+---------------------------------------------------------------+---------------------+</div><div class='add'>+</div><div class='add'>+		For more details, see section `5.7 GPI Status Registers and 5.9 Memory Error Register Definitions,</div><div class='add'>+		Altra Family Soc BMC Interface Specification`.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/smpro-errmon.*/event_dimm[0-15]_syndrome</div><div class='add'>+KernelVersion:	6.4</div><div class='add'>+Contact:	Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RO) The sysfs returns the 2-byte DIMM failure syndrome data for slot</div><div class='add'>+		0-15 if it failed to initialize.</div><div class='add'>+</div><div class='add'>+		For more details, see section `5.11 Boot Stage Register Definitions,</div><div class='add'>+		Altra Family Soc BMC Interface Specification`.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/smpro-misc.*/boot_progress</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RO) Contains the boot stages information in hex as format below::</div><div class='add'>+</div><div class='add'>+		    AABBCCCCCCCC</div><div class='add'>+</div><div class='add'>+		where:</div><div class='add'>+</div><div class='add'>+		  - ``AA``      : The boot stages</div><div class='add'>+</div><div class='add'>+		    - 00: SMpro firmware booting</div><div class='add'>+		    - 01: PMpro firmware booting</div><div class='add'>+		    - 02: ATF BL1 firmware booting</div><div class='add'>+		    - 03: DDR initialization</div><div class='add'>+		    - 04: DDR training report status</div><div class='add'>+		    - 05: ATF BL2 firmware booting</div><div class='add'>+		    - 06: ATF BL31 firmware booting</div><div class='add'>+		    - 07: ATF BL32 firmware booting</div><div class='add'>+		    - 08: UEFI firmware booting</div><div class='add'>+		    - 09: OS booting</div><div class='add'>+</div><div class='add'>+		  - ``BB``      : Boot status</div><div class='add'>+</div><div class='add'>+		    - 00: Not started</div><div class='add'>+		    - 01: Started</div><div class='add'>+		    - 02: Completed without error</div><div class='add'>+		    - 03: Failed.</div><div class='add'>+</div><div class='add'>+		  - ``CCCCCCCC``: Boot status information defined for each boot stages</div><div class='add'>+</div><div class='add'>+		For details, see section `5.11 Boot Stage Register Definitions`</div><div class='add'>+		and section `6. Processor Boot Progress Codes, Altra Family Soc BMC</div><div class='add'>+		Interface Specification`.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/smpro-misc*/soc_power_limit</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RW) Contains the desired SoC power limit in Watt.</div><div class='add'>+		Writes to this sysfs set the desired SoC power limit (W).</div><div class='add'>+		Reads from this register return the current SoC power limit (W).</div><div class='add'>+		The value ranges:</div><div class='add'>+</div><div class='add'>+		  - Minimum: 120 W</div><div class='add'>+		  - Maximum: Socket TDP power</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-hub b/Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-hub<br/>new file mode 100644<br/>index 000000000000..42deb0552065<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-hub?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-platform-onboard-usb-hub</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+What:		/sys/bus/platform/devices/&lt;dev&gt;/always_powered_in_suspend</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Matthias Kaehlcke &lt;matthias@kaehlcke.net&gt;</div><div class='add'>+		linux-usb@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		(RW) Controls whether the USB hub remains always powered</div><div class='add'>+		during system suspend or not.
\ No newline at end of file</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor b/Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor<br/>index d76cd3946434..c800621eff95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-spi-devices-spi-nor</a></div><div class='hunk'>@@ -5,6 +5,9 @@ Contact:	linux-mtd@lists.infradead.org</div><div class='ctx'> Description:	(RO) The JEDEC ID of the SPI NOR flash as reported by the</div><div class='ctx'> 		flash device.</div><div class='ctx'> </div><div class='add'>+		The attribute is not present if the flash doesn't support</div><div class='add'>+		the "Read JEDEC ID" command (9Fh). This is the case for</div><div class='add'>+		non-JEDEC compliant flashes.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/spi/devices/.../spi-nor/manufacturer</div><div class='ctx'> Date:		April 2021</div><div class='hunk'>@@ -12,6 +15,9 @@ KernelVersion:	5.14</div><div class='ctx'> Contact:	linux-mtd@lists.infradead.org</div><div class='ctx'> Description:	(RO) Manufacturer of the SPI NOR flash.</div><div class='ctx'> </div><div class='add'>+		The attribute is not present if the flash device isn't</div><div class='add'>+		known to the kernel and is only probed by its SFDP</div><div class='add'>+		tables.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/spi/devices/.../spi-nor/partname</div><div class='ctx'> Date:		April 2021</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-surface_aggregator-tabletsw b/Documentation/ABI/testing/sysfs-bus-surface_aggregator-tabletsw<br/>new file mode 100644<br/>index 000000000000..74cd9d754e60<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-surface_aggregator-tabletsw?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-surface_aggregator-tabletsw</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+What:		/sys/bus/surface_aggregator/devices/01:0e:01:00:01/state</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Maximilian Luz &lt;luzmaximilian@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This attribute returns a string with the current type-cover</div><div class='add'>+		or device posture, as indicated by the embedded controller.</div><div class='add'>+		Currently returned posture states are:</div><div class='add'>+</div><div class='add'>+		- "disconnected": The type-cover has been disconnected.</div><div class='add'>+</div><div class='add'>+		- "closed": The type-cover has been folded closed and lies on</div><div class='add'>+		  top of the display.</div><div class='add'>+</div><div class='add'>+		- "laptop": The type-cover is open and in laptop-mode, i.e.,</div><div class='add'>+		  ready for normal use.</div><div class='add'>+</div><div class='add'>+		- "folded-canvas": The type-cover has been folded back</div><div class='add'>+		  part-ways, but does not lie flush with the back side of the</div><div class='add'>+		  device. In general, this means that the kick-stand is used</div><div class='add'>+		  and extended atop of the cover.</div><div class='add'>+</div><div class='add'>+		- "folded-back": The type cover has been fully folded back and</div><div class='add'>+		  lies flush with the back side of the device.</div><div class='add'>+</div><div class='add'>+		- "&lt;unknown&gt;": The current state is unknown to the driver, for</div><div class='add'>+		  example due to newer as-of-yet unsupported hardware.</div><div class='add'>+</div><div class='add'>+		New states may be introduced with new hardware. Users therefore</div><div class='add'>+		must not rely on this list of states being exhaustive and</div><div class='add'>+		gracefully handle unknown states.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/surface_aggregator/devices/01:26:01:00:01/state</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Maximilian Luz &lt;luzmaximilian@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This attribute returns a string with the current device posture, as indicated by the embedded controller. Currently</div><div class='add'>+		returned posture states are:</div><div class='add'>+</div><div class='add'>+		- "closed": The lid of the device is closed.</div><div class='add'>+</div><div class='add'>+		- "laptop": The lid of the device is opened and the device</div><div class='add'>+		  operates as a normal laptop.</div><div class='add'>+</div><div class='add'>+		- "slate": The screen covers the keyboard or has been flipped</div><div class='add'>+		  back and the device operates mainly based on touch input.</div><div class='add'>+</div><div class='add'>+		- "tablet": The device operates as tablet and exclusively</div><div class='add'>+		  relies on touch input (or external peripherals).</div><div class='add'>+</div><div class='add'>+		- "&lt;unknown&gt;": The current state is unknown to the driver, for</div><div class='add'>+		  example due to newer as-of-yet unsupported hardware.</div><div class='add'>+</div><div class='add'>+		New states may be introduced with new hardware. Users therefore</div><div class='add'>+		must not rely on this list of states being exhaustive and</div><div class='add'>+		gracefully handle unknown states.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-thunderbolt b/Documentation/ABI/testing/sysfs-bus-thunderbolt<br/>index b7e87f6c7d47..76ab3e1fe374 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-thunderbolt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-thunderbolt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-thunderbolt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-thunderbolt</a></div><div class='hunk'>@@ -153,7 +153,7 @@ Date:		Jan 2020</div><div class='ctx'> KernelVersion:	5.5</div><div class='ctx'> Contact:	Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;</div><div class='ctx'> Description:	This attribute reports number of RX lanes the device is</div><div class='del'>-		using simultaneusly through its upstream port.</div><div class='add'>+		using simultaneously through its upstream port.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/thunderbolt/devices/.../tx_speed</div><div class='ctx'> Date:		Jan 2020</div><div class='hunk'>@@ -167,7 +167,7 @@ Date:		Jan 2020</div><div class='ctx'> KernelVersion:	5.5</div><div class='ctx'> Contact:	Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;</div><div class='ctx'> Description:	This attribute reports number of TX lanes the device is</div><div class='del'>-		using simultaneusly through its upstream port.</div><div class='add'>+		using simultaneously through its upstream port.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/thunderbolt/devices/.../vendor</div><div class='ctx'> Date:		Sep 2017</div><div class='hunk'>@@ -293,6 +293,16 @@ Contact:	thunderbolt-software@lists.01.org</div><div class='ctx'> Description:	This contains XDomain service specific settings as</div><div class='ctx'> 		bitmask. Format: %x</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/thunderbolt/devices/usb4_portX/connector</div><div class='add'>+Date:		April 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Symlink to the USB Type-C connector. This link is only</div><div class='add'>+		created when USB Type-C Connector Class is enabled,</div><div class='add'>+		and only if the system firmware is capable of</div><div class='add'>+		describing the connection between a port and its</div><div class='add'>+		connector.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/thunderbolt/devices/usb4_portX/link</div><div class='ctx'> Date:		Sep 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-bus-usb b/Documentation/ABI/testing/sysfs-bus-usb<br/>index 7efe31ed3a25..cb172db41b34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-usb?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-bus-usb</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-bus-usb?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-bus-usb</a></div><div class='hunk'>@@ -166,6 +166,23 @@ Description:</div><div class='ctx'> 		The file will be present for all speeds of USB devices, and will</div><div class='ctx'> 		always read "no" for USB 1.1 and USB 2.0 devices.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/usb/devices/&lt;INTERFACE&gt;/wireless_status</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Bastien Nocera &lt;hadess@hadess.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some USB devices use a USB receiver dongle to communicate</div><div class='add'>+		wirelessly with their device using proprietary protocols. This</div><div class='add'>+		attribute allows user-space to know whether the device is</div><div class='add'>+		connected to its receiver dongle, and, for example, consider</div><div class='add'>+		the device to be absent when choosing whether to show the</div><div class='add'>+		device's battery, show a headset in a list of outputs, or show</div><div class='add'>+		an on-screen keyboard if the only wireless keyboard is</div><div class='add'>+		turned off.</div><div class='add'>+		This attribute is not to be used to replace protocol specific</div><div class='add'>+		statuses available in WWAN, WLAN/Wi-Fi, Bluetooth, etc.</div><div class='add'>+		If the device does not use a receiver dongle with a wireless</div><div class='add'>+		device, then this attribute will not exist.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/usb/devices/.../&lt;hub_interface&gt;/port&lt;X&gt;</div><div class='ctx'> Date:		August 2012</div><div class='ctx'> Contact:	Lan Tianyu &lt;tianyu.lan@intel.com&gt;</div><div class='hunk'>@@ -253,6 +270,28 @@ Description:</div><div class='ctx'> 		only if the system firmware is capable of describing the</div><div class='ctx'> 		connection between a port and its connector.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/usb/devices/.../&lt;hub_interface&gt;/port&lt;X&gt;/disable</div><div class='add'>+Date:		June 2022</div><div class='add'>+Contact:	Michael Grzeschik &lt;m.grzeschik@pengutronix.de&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file controls the state of a USB port, including</div><div class='add'>+		Vbus power output (but only on hubs that support</div><div class='add'>+		power switching -- most hubs don't support it). If</div><div class='add'>+		a port is disabled, the port is unusable: Devices</div><div class='add'>+		attached to the port will not be detected, initialized,</div><div class='add'>+		or enumerated.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/usb/devices/.../&lt;hub_interface&gt;/port&lt;X&gt;/early_stop</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+Contact:	Ray Chi &lt;raychi@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some USB hosts have some watchdog mechanisms so that the device</div><div class='add'>+		may enter ramdump if it takes a long time during port initialization.</div><div class='add'>+		This attribute allows each port just has two attempts so that the</div><div class='add'>+		port initialization will be failed quickly. In addition, if a port</div><div class='add'>+		which is marked with early_stop has failed to initialize, it will ignore</div><div class='add'>+		all future connections until this attribute is clear.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/usb/devices/.../power/usb2_lpm_l1_timeout</div><div class='ctx'> Date:		May 2013</div><div class='ctx'> Contact:	Mathias Nyman &lt;mathias.nyman@linux.intel.com&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-bdi b/Documentation/ABI/testing/sysfs-class-bdi<br/>index 6d2a2fc189dd..0d2abd88a18c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-bdi?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-bdi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-bdi?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-bdi</a></div><div class='hunk'>@@ -44,6 +44,21 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 	(read-write)</div><div class='ctx'> </div><div class='add'>+What:		/sys/class/bdi/&lt;bdi&gt;/min_ratio_fine</div><div class='add'>+Date:		November 2022</div><div class='add'>+Contact:	Stefan Roesch &lt;shr@devkernel.io&gt;</div><div class='add'>+Description:</div><div class='add'>+	Under normal circumstances each device is given a part of the</div><div class='add'>+	total write-back cache that relates to its current average</div><div class='add'>+	writeout speed in relation to the other devices.</div><div class='add'>+</div><div class='add'>+	The 'min_ratio_fine' parameter allows assigning a minimum reserve</div><div class='add'>+	of the write-back cache to a particular device. The value is</div><div class='add'>+	expressed as part of 1 million. For example, this is useful for</div><div class='add'>+	providing a minimum QoS.</div><div class='add'>+</div><div class='add'>+	(read-write)</div><div class='add'>+</div><div class='ctx'> What:		/sys/class/bdi/&lt;bdi&gt;/max_ratio</div><div class='ctx'> Date:		January 2008</div><div class='ctx'> Contact:	Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;</div><div class='hunk'>@@ -56,6 +71,59 @@ Description:</div><div class='ctx'> 	be trusted to play fair.</div><div class='ctx'> </div><div class='ctx'> 	(read-write)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/bdi/&lt;bdi&gt;/max_ratio_fine</div><div class='add'>+Date:		November 2022</div><div class='add'>+Contact:	Stefan Roesch &lt;shr@devkernel.io&gt;</div><div class='add'>+Description:</div><div class='add'>+	Allows limiting a particular device to use not more than the</div><div class='add'>+	given value of the write-back cache.  The value is given as part</div><div class='add'>+	of 1 million. This is useful in situations where we want to avoid</div><div class='add'>+	one device taking all or most of the write-back cache.  For example</div><div class='add'>+	in case of an NFS mount that is prone to get stuck, or a FUSE mount</div><div class='add'>+	which cannot be trusted to play fair.</div><div class='add'>+</div><div class='add'>+	(read-write)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/bdi/&lt;bdi&gt;/min_bytes</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	Stefan Roesch &lt;shr@devkernel.io&gt;</div><div class='add'>+Description:</div><div class='add'>+	Under normal circumstances each device is given a part of the</div><div class='add'>+	total write-back cache that relates to its current average</div><div class='add'>+	writeout speed in relation to the other devices.</div><div class='add'>+</div><div class='add'>+	The 'min_bytes' parameter allows assigning a minimum</div><div class='add'>+	percentage of the write-back cache to a particular device</div><div class='add'>+	expressed in bytes.</div><div class='add'>+	For example, this is useful for providing a minimum QoS.</div><div class='add'>+</div><div class='add'>+	(read-write)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/bdi/&lt;bdi&gt;/max_bytes</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	Stefan Roesch &lt;shr@devkernel.io&gt;</div><div class='add'>+Description:</div><div class='add'>+	Allows limiting a particular device to use not more than the</div><div class='add'>+	given 'max_bytes' of the write-back cache.  This is useful in</div><div class='add'>+	situations where we want to avoid one device taking all or</div><div class='add'>+	most of the write-back cache.  For example in case of an NFS</div><div class='add'>+	mount that is prone to get stuck, a FUSE mount which cannot be</div><div class='add'>+	trusted to play fair, or a nbd device.</div><div class='add'>+</div><div class='add'>+	(read-write)</div><div class='add'>+</div><div class='add'>+What:		/sys/class/bdi/&lt;bdi&gt;/strict_limit</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	Stefan Roesch &lt;shr@devkernel.io&gt;</div><div class='add'>+Description:</div><div class='add'>+	Forces per-BDI checks for the share of given device in the write-back</div><div class='add'>+	cache even before the global background dirty limit is reached. This</div><div class='add'>+	is useful in situations where the global limit is much higher than</div><div class='add'>+	affordable for given relatively slow (or untrusted) device. Turning</div><div class='add'>+	strictlimit on has no visible effect if max_ratio is equal to 100%.</div><div class='add'>+</div><div class='add'>+	(read-write)</div><div class='ctx'> What:		/sys/class/bdi/&lt;bdi&gt;/stable_pages_required</div><div class='ctx'> Date:		January 2008</div><div class='ctx'> Contact:	Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-cxl b/Documentation/ABI/testing/sysfs-class-cxl<br/>index 3c77677e0ca7..594fda254130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-cxl?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-cxl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-cxl?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-cxl</a></div><div class='hunk'>@@ -103,8 +103,8 @@ What:           /sys/class/cxl/&lt;afu&gt;/api_version_compatible</div><div class='ctx'> Date:           September 2014</div><div class='ctx'> Contact:        linuxppc-dev@lists.ozlabs.org</div><div class='ctx'> Description:    read only</div><div class='del'>-                Decimal value of the the lowest version of the userspace API</div><div class='del'>-                this this kernel supports.</div><div class='add'>+                Decimal value of the lowest version of the userspace API</div><div class='add'>+                this kernel supports.</div><div class='ctx'> Users:		https://github.com/ibm-capi/libcxl</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-firmware b/Documentation/ABI/testing/sysfs-class-firmware<br/>new file mode 100644<br/>index 000000000000..978d3d500400<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-firmware?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-firmware</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+What: 		/sys/class/firmware/.../data</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	The data sysfs file is used for firmware-fallback and for</div><div class='add'>+		firmware uploads. Cat a firmware image to this sysfs file</div><div class='add'>+		after you echo 1 to the loading sysfs file. When the firmware</div><div class='add'>+		image write is complete, echo 0 to the loading sysfs file. This</div><div class='add'>+		sequence will signal the completion of the firmware write and</div><div class='add'>+		signal the lower-level driver that the firmware data is</div><div class='add'>+		available.</div><div class='add'>+</div><div class='add'>+What: 		/sys/class/firmware/.../cancel</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Write-only. For firmware uploads, write a "1" to this file to</div><div class='add'>+		request that the transfer of firmware data to the lower-level</div><div class='add'>+		device be canceled. This request will be rejected (EBUSY) if</div><div class='add'>+		the update cannot be canceled (e.g. a FLASH write is in</div><div class='add'>+		progress) or (ENODEV) if there is no firmware update in progress.</div><div class='add'>+</div><div class='add'>+What: 		/sys/class/firmware/.../error</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read-only. Returns a string describing a failed firmware</div><div class='add'>+		upload. This string will be in the form of &lt;STATUS&gt;:&lt;ERROR&gt;,</div><div class='add'>+		where &lt;STATUS&gt; will be one of the status strings described</div><div class='add'>+		for the status sysfs file and &lt;ERROR&gt; will be one of the</div><div class='add'>+		following: "hw-error", "timeout", "user-abort", "device-busy",</div><div class='add'>+		"invalid-file-size", "read-write-error", "flash-wearout". The</div><div class='add'>+		error sysfs file is only meaningful when the current firmware</div><div class='add'>+		upload status is "idle". If this file is read while a firmware</div><div class='add'>+		transfer is in progress, then the read will fail with EBUSY.</div><div class='add'>+</div><div class='add'>+What: 		/sys/class/firmware/.../loading</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	The loading sysfs file is used for both firmware-fallback and</div><div class='add'>+		for firmware uploads. Echo 1 onto the loading file to indicate</div><div class='add'>+		you are writing a firmware file to the data sysfs node. Echo</div><div class='add'>+		-1 onto this file to abort the data write or echo 0 onto this</div><div class='add'>+		file to indicate that the write is complete. For firmware</div><div class='add'>+		uploads, the zero value also triggers the transfer of the</div><div class='add'>+		firmware data to the lower-level device driver.</div><div class='add'>+</div><div class='add'>+What: 		/sys/class/firmware/.../remaining_size</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read-only. For firmware upload, this file contains the size</div><div class='add'>+		of the firmware data that remains to be transferred to the</div><div class='add'>+		lower-level device driver. The size value is initialized to</div><div class='add'>+		the full size of the firmware image that was previously</div><div class='add'>+		written to the data sysfs file. This value is periodically</div><div class='add'>+		updated during the "transferring" phase of the firmware</div><div class='add'>+		upload.</div><div class='add'>+		Format: "%u".</div><div class='add'>+</div><div class='add'>+What: 		/sys/class/firmware/.../status</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read-only. Returns a string describing the current status of</div><div class='add'>+		a firmware upload. The string will be one of the following:</div><div class='add'>+		idle, "receiving", "preparing", "transferring", "programming".</div><div class='add'>+</div><div class='add'>+What: 		/sys/class/firmware/.../timeout</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	This file supports the timeout mechanism for firmware</div><div class='add'>+		fallback.  This file has no affect on firmware uploads. For</div><div class='add'>+		more information on timeouts please see the documentation</div><div class='add'>+		for firmware fallback.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-firmware-attributes b/Documentation/ABI/testing/sysfs-class-firmware-attributes<br/>index 05820365f1ec..4cdba3477176 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-firmware-attributes?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-firmware-attributes</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-firmware-attributes?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-firmware-attributes</a></div><div class='hunk'>@@ -116,7 +116,7 @@ Description:</div><div class='ctx'> 					    &lt;value&gt;[ForceIf:&lt;attribute&gt;=&lt;value&gt;]</div><div class='ctx'> 					    &lt;value&gt;[ForceIfNot:&lt;attribute&gt;=&lt;value&gt;]</div><div class='ctx'> </div><div class='del'>-					For example:</div><div class='add'>+					For example::</div><div class='ctx'> </div><div class='ctx'> 					    LegacyOrom/dell_value_modifier has value:</div><div class='ctx'> 						    Disabled[ForceIf:SecureBoot=Enabled]</div><div class='hunk'>@@ -212,7 +212,7 @@ Description:</div><div class='ctx'> 		the next boot.</div><div class='ctx'> </div><div class='ctx'> 		Lenovo specific class extensions</div><div class='del'>-		------------------------------</div><div class='add'>+		--------------------------------</div><div class='ctx'> </div><div class='ctx'> 		On Lenovo systems the following additional settings are available:</div><div class='ctx'> </div><div class='hunk'>@@ -246,9 +246,7 @@ Description:</div><div class='ctx'> 					that is being referenced (e.g hdd0, hdd1 etc)</div><div class='ctx'> 					This attribute defaults to device 0.</div><div class='ctx'> </div><div class='del'>-		certificate:</div><div class='del'>-		signature:</div><div class='del'>-		save_signature:</div><div class='add'>+		certificate, signature, save_signature:</div><div class='ctx'> 					These attributes are used for certificate based authentication. This is</div><div class='ctx'> 					used in conjunction with a signing server as an alternative to password</div><div class='ctx'> 					based authentication.</div><div class='hunk'>@@ -257,22 +255,27 @@ Description:</div><div class='ctx'> 					The attributes can be displayed to check the stored value.</div><div class='ctx'> </div><div class='ctx'> 					Some usage examples:</div><div class='del'>-					Installing a certificate to enable feature:</div><div class='del'>-						echo &lt;supervisor password &gt; authentication/Admin/current_password</div><div class='del'>-						echo &lt;signed certificate&gt; &gt; authentication/Admin/certificate</div><div class='ctx'> </div><div class='del'>-					Updating the installed certificate:</div><div class='del'>-						echo &lt;signature&gt; &gt; authentication/Admin/signature</div><div class='del'>-						echo &lt;signed certificate&gt; &gt; authentication/Admin/certificate</div><div class='add'>+						Installing a certificate to enable feature::</div><div class='add'>+</div><div class='add'>+							echo "supervisor password" &gt; authentication/Admin/current_password</div><div class='add'>+							echo "signed certificate" &gt; authentication/Admin/certificate</div><div class='add'>+</div><div class='add'>+						Updating the installed certificate::</div><div class='add'>+</div><div class='add'>+							echo "signature" &gt; authentication/Admin/signature</div><div class='add'>+							echo "signed certificate" &gt; authentication/Admin/certificate</div><div class='ctx'> </div><div class='del'>-					Removing the installed certificate:</div><div class='del'>-						echo &lt;signature&gt; &gt; authentication/Admin/signature</div><div class='del'>-						echo '' &gt; authentication/Admin/certificate</div><div class='add'>+						Removing the installed certificate::</div><div class='ctx'> </div><div class='del'>-					Changing a BIOS setting:</div><div class='del'>-						echo &lt;signature&gt; &gt; authentication/Admin/signature</div><div class='del'>-						echo &lt;save signature&gt; &gt; authentication/Admin/save_signature</div><div class='del'>-						echo Enable &gt; attribute/PasswordBeep/current_value</div><div class='add'>+							echo "signature" &gt; authentication/Admin/signature</div><div class='add'>+							echo "" &gt; authentication/Admin/certificate</div><div class='add'>+</div><div class='add'>+						Changing a BIOS setting::</div><div class='add'>+</div><div class='add'>+							echo "signature" &gt; authentication/Admin/signature</div><div class='add'>+							echo "save signature" &gt; authentication/Admin/save_signature</div><div class='add'>+							echo Enable &gt; attribute/PasswordBeep/current_value</div><div class='ctx'> </div><div class='ctx'> 					You cannot enable certificate authentication if a supervisor password</div><div class='ctx'> 					has not been set.</div><div class='hunk'>@@ -288,9 +291,10 @@ Description:</div><div class='ctx'> 		certificate_to_password:</div><div class='ctx'> 					Write only attribute used to switch from certificate based authentication</div><div class='ctx'> 					back to password based.</div><div class='del'>-					Usage:</div><div class='del'>-						echo &lt;signature&gt; &gt; authentication/Admin/signature</div><div class='del'>-						echo &lt;password&gt; &gt; authentication/Admin/certificate_to_password</div><div class='add'>+					Usage::</div><div class='add'>+</div><div class='add'>+						echo "signature" &gt; authentication/Admin/signature</div><div class='add'>+						echo "password" &gt; authentication/Admin/certificate_to_password</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> What:		/sys/class/firmware-attributes/*/attributes/pending_reboot</div><div class='hunk'>@@ -345,7 +349,7 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 		    # echo "factory" &gt; /sys/class/firmware-attributes/*/device/attributes/reset_bios</div><div class='ctx'> 		    # cat /sys/class/firmware-attributes/*/device/attributes/reset_bios</div><div class='del'>-		    # builtinsafe lastknowngood [factory] custom</div><div class='add'>+		    builtinsafe lastknowngood [factory] custom</div><div class='ctx'> </div><div class='ctx'> 		Note that any changes to this attribute requires a reboot</div><div class='ctx'> 		for changes to take effect.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-hwmon b/Documentation/ABI/testing/sysfs-class-hwmon<br/>index 653d4c75eddb..638f4c6d4ec7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-hwmon?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-hwmon</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-hwmon?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-hwmon</a></div><div class='hunk'>@@ -276,6 +276,15 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 		RW</div><div class='ctx'> </div><div class='add'>+What:		/sys/class/hwmon/hwmonX/fanY_fault</div><div class='add'>+Description:</div><div class='add'>+		Reports if a fan has reported failure.</div><div class='add'>+</div><div class='add'>+		- 1: Failed</div><div class='add'>+		- 0: Ok</div><div class='add'>+</div><div class='add'>+		RO</div><div class='add'>+</div><div class='ctx'> What:		/sys/class/hwmon/hwmonX/pwmY</div><div class='ctx'> Description:</div><div class='ctx'> 		Pulse width modulation fan control.</div><div class='hunk'>@@ -938,3 +947,12 @@ Description:</div><div class='ctx'> 		- 1: enable</div><div class='ctx'> </div><div class='ctx'> 		RW</div><div class='add'>+</div><div class='add'>+What:		/sys/class/hwmon/hwmonX/device/pec</div><div class='add'>+Description:</div><div class='add'>+		PEC support on I2C devices</div><div class='add'>+</div><div class='add'>+		- 0, off, n: disable</div><div class='add'>+		- 1, on, y: enable</div><div class='add'>+</div><div class='add'>+		RW</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-net-peak_usb b/Documentation/ABI/testing/sysfs-class-net-peak_usb<br/>new file mode 100644<br/>index 000000000000..9e3d0bf4d4b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-net-peak_usb?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-net-peak_usb</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+</div><div class='add'>+What:		/sys/class/net/&lt;iface&gt;/peak_usb/can_channel_id</div><div class='add'>+Date:		November 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	Stephane Grosjean &lt;s.grosjean@peak-system.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		PEAK PCAN-USB devices support user-configurable CAN channel</div><div class='add'>+		identifiers. Contrary to a USB serial number, these identifiers</div><div class='add'>+		are writable and can be set per CAN interface. This means that</div><div class='add'>+		if a USB device exports multiple CAN interfaces, each of them</div><div class='add'>+		can be assigned a unique channel ID.</div><div class='add'>+		This attribute provides read-only access to the currently</div><div class='add'>+		configured value of the channel identifier. Depending on the</div><div class='add'>+		device type, the identifier has a length of 8 or 32 bit. The</div><div class='add'>+		value read from this attribute is always an 8 digit 32 bit</div><div class='add'>+		hexadecimal value in big endian format. If the device only</div><div class='add'>+		supports an 8 bit identifier, the upper 24 bit of the value are</div><div class='add'>+		set to zero.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power<br/>index a9ce63cfbe87..7c81f0a25a48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-power?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-power</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-power?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-power</a></div><div class='hunk'>@@ -364,7 +364,10 @@ Date:		April 2019</div><div class='ctx'> Contact:	linux-pm@vger.kernel.org</div><div class='ctx'> Description:</div><div class='ctx'> 		Represents a battery percentage level, above which charging will</div><div class='del'>-		stop.</div><div class='add'>+		stop. Not all hardware is capable of setting this to an arbitrary</div><div class='add'>+		percentage. Drivers will round written values to the nearest</div><div class='add'>+		supported value. Reading back the value will show the actual</div><div class='add'>+		threshold set by the driver.</div><div class='ctx'> </div><div class='ctx'> 		Access: Read, Write</div><div class='ctx'> </div><div class='hunk'>@@ -434,7 +437,8 @@ What:		/sys/class/power_supply/&lt;supply_name&gt;/present</div><div class='ctx'> Date:		May 2007</div><div class='ctx'> Contact:	linux-pm@vger.kernel.org</div><div class='ctx'> Description:</div><div class='del'>-		Reports whether a battery is present or not in the system.</div><div class='add'>+		Reports whether a battery is present or not in the system. If the</div><div class='add'>+		property does not exist, the battery is considered to be present.</div><div class='ctx'> </div><div class='ctx'> 		Access: Read</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-power-rt9467 b/Documentation/ABI/testing/sysfs-class-power-rt9467<br/>new file mode 100644<br/>index 000000000000..619b7c45d145<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-power-rt9467?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-power-rt9467</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+What:		/sys/class/power_supply/rt9467-*/sysoff_enable</div><div class='add'>+Date:		Feb 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	ChiaEn Wu &lt;chiaen_wu@richtek.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry allows enabling the sysoff mode of rt9467 charger</div><div class='add'>+		devices.</div><div class='add'>+		If enabled and the input is removed, the internal battery FET</div><div class='add'>+		is turned off to reduce the leakage from the BAT pin. See</div><div class='add'>+		device datasheet for details. It's commonly used when the</div><div class='add'>+		product enter shipping stage. After entering shipping mode,</div><div class='add'>+		only 'VBUS' or 'Power key" pressed can make it leave this mode.</div><div class='add'>+		'Disable' also can help to leave it, but it's more like to</div><div class='add'>+		abort the action before the device really enter shipping mode.</div><div class='add'>+</div><div class='add'>+		Access: Read, Write</div><div class='add'>+		Valid values:</div><div class='add'>+		- 1: enabled</div><div class='add'>+		- 0: disabled</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-power-rt9471 b/Documentation/ABI/testing/sysfs-class-power-rt9471<br/>new file mode 100644<br/>index 000000000000..0a390ee5ac21<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-power-rt9471?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-power-rt9471</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+What:		/sys/class/power_supply/rt9471-*/sysoff_enable</div><div class='add'>+Date:		Feb 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry allows enabling the sysoff mode of rt9471 charger devices.</div><div class='add'>+		If enabled and the input is removed, the internal battery FET is turned</div><div class='add'>+		off to reduce the leakage from the BAT pin. See device datasheet for details.</div><div class='add'>+		It's commonly used when the product enter shipping stage. After entering</div><div class='add'>+		shipping mode, only 'VBUS' or 'Power key" pressed can make it leave this</div><div class='add'>+		mode. 'Disable' also can help to leave it, but it's more like to abort</div><div class='add'>+		the action before the device really enter shipping mode.</div><div class='add'>+</div><div class='add'>+		Access: Read, Write</div><div class='add'>+		Valid values:</div><div class='add'>+		- 1: enabled</div><div class='add'>+		- 0: disabled</div><div class='add'>+</div><div class='add'>+What:		/sys/class/power_supply/rt9471-*/port_detect_enable</div><div class='add'>+Date:		Feb 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This entry allows enabling the USB BC12 port detect function of rt9471 charger</div><div class='add'>+		devices. If enabled and VBUS is inserted, device will start to do the BC12</div><div class='add'>+		port detect and report the usb port type when port detect is done. See</div><div class='add'>+		datasheet for details. Normally controlled when TypeC/USBPD port integrated.</div><div class='add'>+</div><div class='add'>+		Access: Read, Write</div><div class='add'>+		Valid values:</div><div class='add'>+		- 1: enabled</div><div class='add'>+		- 0: disabled</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-pwm b/Documentation/ABI/testing/sysfs-class-pwm<br/>index 3d65285bcd5f..0638c94d01ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-pwm?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-pwm</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-pwm?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-pwm</a></div><div class='hunk'>@@ -81,7 +81,7 @@ Description:</div><div class='ctx'> What:		/sys/class/pwm/pwmchip&lt;N&gt;/pwmX/capture</div><div class='ctx'> Date:		June 2016</div><div class='ctx'> KernelVersion:	4.8</div><div class='del'>-Contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+Contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Capture information about a PWM signal. The output format is a</div><div class='ctx'> 		pair unsigned integers (period and duty cycle), separated by a</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-regulator b/Documentation/ABI/testing/sysfs-class-regulator<br/>index 8516f08806dd..475b9a372657 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-regulator?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-regulator</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-regulator?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-regulator</a></div><div class='hunk'>@@ -370,3 +370,84 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 		'unknown' means software cannot determine the state, or</div><div class='ctx'> 		the reported state is invalid.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../under_voltage</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		under_voltage.  This indicates if the device reports an</div><div class='add'>+		under-voltage fault (1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../over_current</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		over_current.  This indicates if the device reports an</div><div class='add'>+		over-current fault (1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../regulation_out</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		regulation_out.  This indicates if the device reports an</div><div class='add'>+		out-of-regulation fault (1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../fail</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		fail.  This indicates if the device reports an output failure</div><div class='add'>+		(1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../over_temp</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		over_temp.  This indicates if the device reports an</div><div class='add'>+		over-temperature fault (1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../under_voltage_warn</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		under_voltage_warn.  This indicates if the device reports an</div><div class='add'>+		under-voltage warning (1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../over_current_warn</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		over_current_warn.  This indicates if the device reports an</div><div class='add'>+		over-current warning (1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../over_voltage_warn</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		over_voltage_warn.  This indicates if the device reports an</div><div class='add'>+		over-voltage warning (1) or not (0).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/regulator/.../over_temp_warn</div><div class='add'>+Date:		April 2022</div><div class='add'>+KernelVersion:	5.18</div><div class='add'>+Contact:	Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		Some regulator directories will contain a field called</div><div class='add'>+		over_temp_warn.  This indicates if the device reports an</div><div class='add'>+		over-temperature warning (1) or not (0).</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-rtrs-client b/Documentation/ABI/testing/sysfs-class-rtrs-client<br/>index 49a4157c7bf1..fecc59d1b96f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-rtrs-client?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-rtrs-client</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-rtrs-client?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-rtrs-client</a></div><div class='hunk'>@@ -78,7 +78,7 @@ What:		/sys/class/rtrs-client/&lt;session-name&gt;/paths/&lt;src@dst&gt;/hca_name</div><div class='ctx'> Date:		Feb 2020</div><div class='ctx'> KernelVersion:	5.7</div><div class='ctx'> Contact:	Jack Wang &lt;jinpu.wang@cloud.ionos.com&gt; Danil Kipnis &lt;danil.kipnis@cloud.ionos.com&gt;</div><div class='del'>-Description:	RO, Contains the the name of HCA the connection established on.</div><div class='add'>+Description:	RO, Contains the name of HCA the connection established on.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/class/rtrs-client/&lt;session-name&gt;/paths/&lt;src@dst&gt;/hca_port</div><div class='ctx'> Date:		Feb 2020</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-rtrs-server b/Documentation/ABI/testing/sysfs-class-rtrs-server<br/>index 3b6d5b067df0..b08601d80409 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-rtrs-server?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-rtrs-server</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-rtrs-server?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-rtrs-server</a></div><div class='hunk'>@@ -24,7 +24,7 @@ What:		/sys/class/rtrs-server/&lt;session-name&gt;/paths/&lt;src@dst&gt;/hca_name</div><div class='ctx'> Date:		Feb 2020</div><div class='ctx'> KernelVersion:	5.7</div><div class='ctx'> Contact:	Jack Wang &lt;jinpu.wang@cloud.ionos.com&gt; Danil Kipnis &lt;danil.kipnis@cloud.ionos.com&gt;</div><div class='del'>-Description:	RO, Contains the the name of HCA the connection established on.</div><div class='add'>+Description:	RO, Contains the name of HCA the connection established on.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/class/rtrs-server/&lt;session-name&gt;/paths/&lt;src@dst&gt;/hca_port</div><div class='ctx'> Date:		Feb 2020</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-typec b/Documentation/ABI/testing/sysfs-class-typec<br/>index 75088ecad202..281b995beb05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-typec?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-typec</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-typec?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-typec</a></div><div class='hunk'>@@ -141,6 +141,14 @@ Description:</div><div class='ctx'> 		- "reverse": CC2 orientation</div><div class='ctx'> 		- "unknown": Orientation cannot be determined.</div><div class='ctx'> </div><div class='add'>+What:		/sys/class/typec/&lt;port&gt;/select_usb_power_delivery</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Lists the USB Power Delivery Capabilities that the port can</div><div class='add'>+		advertise to the partner. The currently used capabilities are in</div><div class='add'>+		brackets. Selection happens by writing to the file.</div><div class='add'>+</div><div class='ctx'> USB Type-C partner devices (eg. /sys/class/typec/port0-partner/)</div><div class='ctx'> </div><div class='ctx'> What:		/sys/class/typec/&lt;port&gt;-partner/accessory_mode</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-usb_power_delivery b/Documentation/ABI/testing/sysfs-class-usb_power_delivery<br/>new file mode 100644<br/>index 000000000000..1bf9d1d7902c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-usb_power_delivery?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-usb_power_delivery</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+What:		/sys/class/usb_power_delivery</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Directory for USB Power Delivery devices.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../revision</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		File showing the USB Power Delivery Specification Revision used</div><div class='add'>+		in communication.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../version</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This is an optional attribute file showing the version of the</div><div class='add'>+		specific revision of the USB Power Delivery Specification. In</div><div class='add'>+		most cases the specification version is not known and the file</div><div class='add'>+		is not available.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../source-capabilities</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The source capabilities message "Source_Capabilities" contains a</div><div class='add'>+		set of Power Data Objects (PDO), each representing a type of</div><div class='add'>+		power supply. The order of the PDO objects is defined in the USB</div><div class='add'>+		Power Delivery Specification. Each PDO - power supply - will</div><div class='add'>+		have its own device, and the PDO device name will start with the</div><div class='add'>+		object position number as the first character followed by the</div><div class='add'>+		power supply type name (":" as delimiter).</div><div class='add'>+</div><div class='add'>+			/sys/class/usb_power_delivery/.../source_capabilities/&lt;position&gt;:&lt;type&gt;</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../sink-capabilities</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The sink capability message "Sink_Capabilities" contains a set</div><div class='add'>+		of Power Data Objects (PDO) just like with source capabilities,</div><div class='add'>+		but instead of describing the power capabilities, these objects</div><div class='add'>+		describe the power requirements.</div><div class='add'>+</div><div class='add'>+		The order of the objects in the sink capability message is the</div><div class='add'>+		same as with the source capabilities message.</div><div class='add'>+</div><div class='add'>+Fixed Supplies</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:fixed_supply</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Devices containing the attributes (the bit fields) defined for</div><div class='add'>+		Fixed Supplies.</div><div class='add'>+</div><div class='add'>+		The device "1:fixed_supply" is special. USB Power Delivery</div><div class='add'>+		Specification dictates that the first PDO (at object position</div><div class='add'>+		1), and the only mandatory PDO, is always the vSafe5V Fixed</div><div class='add'>+		Supply Object. vSafe5V Object has additional fields defined for</div><div class='add'>+		it that the other Fixed Supply Objects do not have and that are</div><div class='add'>+		related to the USB capabilities rather than power capabilities.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/1:fixed_supply/dual_role_power</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file contains boolean value that tells does the device</div><div class='add'>+		support both source and sink power roles.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../source-capabilities/1:fixed_supply/usb_suspend_supported</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file shows the value of the USB Suspend Supported bit in</div><div class='add'>+		vSafe5V Fixed Supply Object. If the bit is set then the device</div><div class='add'>+		will follow the USB 2.0 and USB 3.2 rules for suspend and</div><div class='add'>+		resume.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../sink-capabilities/1:fixed_supply/higher_capability</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Saranya Gopal &lt;saranya.gopal@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file shows the value of the Higher capability bit in</div><div class='add'>+		vsafe5V Fixed Supply Object. If the bit is set, then the sink</div><div class='add'>+		needs more than vsafe5V(eg. 12 V) to provide full functionality.</div><div class='add'>+		Valid values: 0, 1</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/1:fixed_supply/unconstrained_power</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file shows the value of the Unconstrained Power bit in</div><div class='add'>+		vSafe5V Fixed Supply Object. The bit is set when an external</div><div class='add'>+		source of power, powerful enough to power the entire system on</div><div class='add'>+		its own, is available for the device.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/1:fixed_supply/usb_communication_capable</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file shows the value of the USB Communication Capable bit in</div><div class='add'>+		vSafe5V Fixed Supply Object.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/1:fixed_supply/dual_role_data</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file shows the value of the Dual-Role Data bit in vSafe5V</div><div class='add'>+		Fixed Supply Object. Dual role data means ability act as both</div><div class='add'>+		USB host and USB device.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/1:fixed_supply/unchunked_extended_messages_supported</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file shows the value of the Unchunked Extended Messages</div><div class='add'>+		Supported bit in vSafe5V Fixed Supply Object.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:fixed_supply/voltage</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The voltage the supply supports in millivolts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../source-capabilities/&lt;position&gt;:fixed_supply/maximum_current</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Maximum current of the fixed source supply in milliamperes.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../sink-capabilities/&lt;position&gt;:fixed_supply/operational_current</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Operational current of the sink in milliamperes.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../sink-capabilities/&lt;position&gt;:fixed_supply/fast_role_swap_current</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This file contains the value of the "Fast Role Swap USB Type-C</div><div class='add'>+		Current" field that tells the current level the sink requires</div><div class='add'>+		after a Fast Role Swap.</div><div class='add'>+		0 - Fast Swap not supported"</div><div class='add'>+		1 - Default USB Power"</div><div class='add'>+		2 - 1.5A@5V"</div><div class='add'>+		3 - 3.0A@5V"</div><div class='add'>+</div><div class='add'>+Variable Supplies</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:variable_supply</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Variable Power Supply PDO.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:variable_supply/maximum_voltage</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Maximum Voltage in millivolts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:variable_supply/minimum_voltage</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Minimum Voltage in millivolts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../source-capabilities/&lt;position&gt;:variable_supply/maximum_current</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The maximum current in milliamperes that the source can supply</div><div class='add'>+		at the given Voltage range.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../sink-capabilities/&lt;position&gt;:variable_supply/operational_current</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The operational current in milliamperes that the sink requires</div><div class='add'>+		at the given Voltage range.</div><div class='add'>+</div><div class='add'>+Battery Supplies</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:battery</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Battery PDO.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:battery/maximum_voltage</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Maximum Voltage in millivolts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:battery/minimum_voltage</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Minimum Voltage in millivolts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../source-capabilities/&lt;position&gt;:battery/maximum_power</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Maximum allowable Power in milliwatts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../sink-capabilities/&lt;position&gt;:battery/operational_power</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The operational power that the sink requires at the given</div><div class='add'>+		voltage range.</div><div class='add'>+</div><div class='add'>+Standard Power Range (SPR) Programmable Power Supplies</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:programmable_supply</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Programmable Power Supply (PPS) Augmented PDO (APDO).</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:programmable_supply/maximum_voltage</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Maximum Voltage in millivolts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:programmable_supply/minimum_voltage</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Minimum Voltage in millivolts.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../&lt;capability&gt;/&lt;position&gt;:programmable_supply/maximum_current</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Maximum Current in milliamperes.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/usb_power_delivery/.../source-capabilities/&lt;position&gt;:programmable_supply/pps_power_limited</div><div class='add'>+Date:		May 2022</div><div class='add'>+Contact:	Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The PPS Power Limited bit indicates whether or not the source</div><div class='add'>+		supply will exceed the rated output power if requested.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-vduse b/Documentation/ABI/testing/sysfs-class-vduse<br/>new file mode 100644<br/>index 000000000000..2f2bc5c8fc48<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-vduse?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-vduse</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+What:		/sys/class/vduse/</div><div class='add'>+Date:		Oct 2021</div><div class='add'>+KernelVersion:	5.15</div><div class='add'>+Contact:	Yongji Xie &lt;xieyongji@bytedance.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The vduse/ class sub-directory belongs to the VDUSE</div><div class='add'>+		framework and provides a sysfs interface for configuring</div><div class='add'>+		VDUSE devices.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/vduse/control/</div><div class='add'>+Date:		Oct 2021</div><div class='add'>+KernelVersion:	5.15</div><div class='add'>+Contact:	Yongji Xie &lt;xieyongji@bytedance.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This directory entry is created for the control device</div><div class='add'>+		of VDUSE framework.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/vduse/&lt;device-name&gt;/</div><div class='add'>+Date:		Oct 2021</div><div class='add'>+KernelVersion:	5.15</div><div class='add'>+Contact:	Yongji Xie &lt;xieyongji@bytedance.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This directory entry is created when a VDUSE device is</div><div class='add'>+		created via the control device.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/vduse/&lt;device-name&gt;/msg_timeout</div><div class='add'>+Date:		Oct 2021</div><div class='add'>+KernelVersion:	5.15</div><div class='add'>+Contact:	Yongji Xie &lt;xieyongji@bytedance.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RW) The timeout (in seconds) for waiting for the control</div><div class='add'>+		message's response from userspace. Default value is 30s.</div><div class='add'>+		Writing a '0' to the file means to disable the timeout.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-class-watchdog b/Documentation/ABI/testing/sysfs-class-watchdog<br/>index 585caecda3a5..94fb74615951 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-watchdog?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-class-watchdog</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-class-watchdog?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-class-watchdog</a></div><div class='hunk'>@@ -6,6 +6,19 @@ Description:</div><div class='ctx'> 		device at boot. It is equivalent to WDIOC_GETBOOTSTATUS of</div><div class='ctx'> 		ioctl interface.</div><div class='ctx'> </div><div class='add'>+What:		/sys/class/watchdog/watchdogn/options</div><div class='add'>+Date:		April 2023</div><div class='add'>+Contact:	Thomas Weißschuh</div><div class='add'>+Description:</div><div class='add'>+		It is a read only file. It contains options of watchdog device.</div><div class='add'>+</div><div class='add'>+What:		/sys/class/watchdog/watchdogn/fw_version</div><div class='add'>+Date:		April 2023</div><div class='add'>+Contact:	Thomas Weißschuh</div><div class='add'>+Description:</div><div class='add'>+		It is a read only file. It contains firmware version of</div><div class='add'>+		watchdog device.</div><div class='add'>+</div><div class='ctx'> What:		/sys/class/watchdog/watchdogn/identity</div><div class='ctx'> Date:		August 2015</div><div class='ctx'> Contact:	Wim Van Sebroeck &lt;wim@iguana.be&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-hisi_ptt b/Documentation/ABI/testing/sysfs-devices-hisi_ptt<br/>new file mode 100644<br/>index 000000000000..82de6d710266<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-hisi_ptt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-hisi_ptt</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+What:		/sys/devices/hisi_ptt&lt;sicl_id&gt;_&lt;core_id&gt;/tune</div><div class='add'>+Date:		October 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Yicong Yang &lt;yangyicong@hisilicon.com&gt;</div><div class='add'>+Description:	This directory contains files for tuning the PCIe link</div><div class='add'>+		parameters(events). Each file is named after the event</div><div class='add'>+		of the PCIe link.</div><div class='add'>+</div><div class='add'>+		See Documentation/trace/hisi-ptt.rst for more information.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/hisi_ptt&lt;sicl_id&gt;_&lt;core_id&gt;/tune/qos_tx_cpl</div><div class='add'>+Date:		October 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Yicong Yang &lt;yangyicong@hisilicon.com&gt;</div><div class='add'>+Description:	(RW) Controls the weight of Tx completion TLPs, which influence</div><div class='add'>+		the proportion of outbound completion TLPs on the PCIe link.</div><div class='add'>+		The available tune data is [0, 1, 2]. Writing a negative value</div><div class='add'>+		will return an error, and out of range values will be converted</div><div class='add'>+		to 2. The value indicates a probable level of the event.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/hisi_ptt&lt;sicl_id&gt;_&lt;core_id&gt;/tune/qos_tx_np</div><div class='add'>+Date:		October 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Yicong Yang &lt;yangyicong@hisilicon.com&gt;</div><div class='add'>+Description:	(RW) Controls the weight of Tx non-posted TLPs, which influence</div><div class='add'>+		the proportion of outbound non-posted TLPs on the PCIe link.</div><div class='add'>+		The available tune data is [0, 1, 2]. Writing a negative value</div><div class='add'>+		will return an error, and out of range values will be converted</div><div class='add'>+		to 2. The value indicates a probable level of the event.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/hisi_ptt&lt;sicl_id&gt;_&lt;core_id&gt;/tune/qos_tx_p</div><div class='add'>+Date:		October 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Yicong Yang &lt;yangyicong@hisilicon.com&gt;</div><div class='add'>+Description:	(RW) Controls the weight of Tx posted TLPs, which influence the</div><div class='add'>+		proportion of outbound posted TLPs on the PCIe link.</div><div class='add'>+		The available tune data is [0, 1, 2]. Writing a negative value</div><div class='add'>+		will return an error, and out of range values will be converted</div><div class='add'>+		to 2. The value indicates a probable level of the event.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/hisi_ptt&lt;sicl_id&gt;_&lt;core_id&gt;/tune/rx_alloc_buf_level</div><div class='add'>+Date:		October 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Yicong Yang &lt;yangyicong@hisilicon.com&gt;</div><div class='add'>+Description:	(RW) Control the allocated buffer watermark for inbound packets.</div><div class='add'>+		The packets will be stored in the buffer first and then transmitted</div><div class='add'>+		either when the watermark reached or when timed out.</div><div class='add'>+		The available tune data is [0, 1, 2]. Writing a negative value</div><div class='add'>+		will return an error, and out of range values will be converted</div><div class='add'>+		to 2. The value indicates a probable level of the event.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/hisi_ptt&lt;sicl_id&gt;_&lt;core_id&gt;/tune/tx_alloc_buf_level</div><div class='add'>+Date:		October 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Yicong Yang &lt;yangyicong@hisilicon.com&gt;</div><div class='add'>+Description:	(RW) Control the allocated buffer watermark of outbound packets.</div><div class='add'>+		The packets will be stored in the buffer first and then transmitted</div><div class='add'>+		either when the watermark reached or when timed out.</div><div class='add'>+		The available tune data is [0, 1, 2]. Writing a negative value</div><div class='add'>+		will return an error, and out of range values will be converted</div><div class='add'>+		to 2. The value indicates a probable level of the event.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-mapping b/Documentation/ABI/testing/sysfs-devices-mapping<br/>index 8d202bac9394..2eee1446ad4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-mapping?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-mapping</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-mapping?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-mapping</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> What:           /sys/devices/uncore_iio_x/dieX</div><div class='ctx'> Date:           February 2020</div><div class='del'>-Contact:        Roman Sudarikov &lt;roman.sudarikov@linux.intel.com&gt;</div><div class='add'>+Contact:        Alexander Antonov &lt;alexander.antonov@linux.intel.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'>                 Each IIO stack (PCIe root port) has its own IIO PMON block, so</div><div class='ctx'>                 each dieX file (where X is die number) holds "Segment:Root Bus"</div><div class='hunk'>@@ -32,3 +32,31 @@ Description:</div><div class='ctx'> 		    IIO PMU 0 on die 1 belongs to PCI RP on bus 0x40, domain 0x0000</div><div class='ctx'> 		    IIO PMU 0 on die 2 belongs to PCI RP on bus 0x80, domain 0x0000</div><div class='ctx'> 		    IIO PMU 0 on die 3 belongs to PCI RP on bus 0xc0, domain 0x0000</div><div class='add'>+</div><div class='add'>+What:           /sys/devices/uncore_upi_x/dieX</div><div class='add'>+Date:           March 2022</div><div class='add'>+Contact:        Alexander Antonov &lt;alexander.antonov@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+                Each /sys/devices/uncore_upi_X/dieY file holds "upi_Z,die_W"</div><div class='add'>+                value that means UPI link number X on die Y is connected to UPI</div><div class='add'>+                link Z on die W and this link between sockets can be monitored</div><div class='add'>+                by UPI PMON block.</div><div class='add'>+                For example, 4-die Sapphire Rapids platform has the following</div><div class='add'>+                UPI 0 topology::</div><div class='add'>+</div><div class='add'>+		    # tail /sys/devices/uncore_upi_0/die*</div><div class='add'>+		    ==&gt; /sys/devices/uncore_upi_0/die0 &lt;==</div><div class='add'>+		    upi_1,die_1</div><div class='add'>+		    ==&gt; /sys/devices/uncore_upi_0/die1 &lt;==</div><div class='add'>+		    upi_0,die_3</div><div class='add'>+		    ==&gt; /sys/devices/uncore_upi_0/die2 &lt;==</div><div class='add'>+		    upi_1,die_3</div><div class='add'>+		    ==&gt; /sys/devices/uncore_upi_0/die3 &lt;==</div><div class='add'>+		    upi_0,die_1</div><div class='add'>+</div><div class='add'>+                Which means::</div><div class='add'>+</div><div class='add'>+		    UPI link 0 on die 0 is connected to UPI link 1 on die 1</div><div class='add'>+		    UPI link 0 on die 1 is connected to UPI link 0 on die 3</div><div class='add'>+		    UPI link 0 on die 2 is connected to UPI link 1 on die 3</div><div class='add'>+		    UPI link 0 on die 3 is connected to UPI link 0 on die 1
\ No newline at end of file</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-physical_location b/Documentation/ABI/testing/sysfs-devices-physical_location<br/>new file mode 100644<br/>index 000000000000..202324b87083<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-physical_location?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-physical_location</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+What:		/sys/devices/.../physical_location</div><div class='add'>+Date:		March 2022</div><div class='add'>+Contact:	Won Chung &lt;wonchung@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		This directory contains information on physical location of</div><div class='add'>+		the device connection point with respect to the system's</div><div class='add'>+		housing.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../physical_location/panel</div><div class='add'>+Date:		March 2022</div><div class='add'>+Contact:	Won Chung &lt;wonchung@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Describes which panel surface of the system’s housing the</div><div class='add'>+		device connection point resides on.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../physical_location/vertical_position</div><div class='add'>+Date:		March 2022</div><div class='add'>+Contact:	Won Chung &lt;wonchung@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Describes vertical position of the device connection point on</div><div class='add'>+		the panel surface.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../physical_location/horizontal_position</div><div class='add'>+Date:		March 2022</div><div class='add'>+Contact:	Won Chung &lt;wonchung@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Describes horizontal position of the device connection point on</div><div class='add'>+		the panel surface.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../physical_location/dock</div><div class='add'>+Date:		March 2022</div><div class='add'>+Contact:	Won Chung &lt;wonchung@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		"Yes" if the device connection point resides in a docking</div><div class='add'>+		station or a port replicator. "No" otherwise.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../physical_location/lid</div><div class='add'>+Date:		March 2022</div><div class='add'>+Contact:	Won Chung &lt;wonchung@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		"Yes" if the device connection point resides on the lid of</div><div class='add'>+		laptop system. "No" otherwise.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD b/Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD<br/>index f7b360a61b21..bc44bc903bc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-platform-ACPI-TAD</a></div><div class='hunk'>@@ -74,7 +74,7 @@ Description:</div><div class='ctx'> </div><div class='ctx'> 		Reads also cause the AC alarm timer status to be reset.</div><div class='ctx'> </div><div class='del'>-		Another way to reset the the status of the AC alarm timer is to</div><div class='add'>+		Another way to reset the status of the AC alarm timer is to</div><div class='ctx'> 		write (the number) 0 to this file.</div><div class='ctx'> </div><div class='ctx'> 		If the status return value indicates that the timer has expired,</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-platform-soc-ipa b/Documentation/ABI/testing/sysfs-devices-platform-soc-ipa<br/>index c56dcf15bf29..364b1ba41242 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-platform-soc-ipa?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-platform-soc-ipa</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-platform-soc-ipa?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-platform-soc-ipa</a></div><div class='hunk'>@@ -46,33 +46,69 @@ Description:</div><div class='ctx'> 		that is supported by the hardware.  The possible values</div><div class='ctx'> 		are "MAPv4" or "MAPv5".</div><div class='ctx'> </div><div class='add'>+What:		.../XXXXXXX.ipa/endpoint_id/</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	v5.19</div><div class='add'>+Contact:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		The .../XXXXXXX.ipa/endpoint_id/ directory contains</div><div class='add'>+		attributes that define IDs associated with IPA</div><div class='add'>+		endpoints.  The "rx" or "tx" in an endpoint name is</div><div class='add'>+		from the perspective of the AP.  An endpoint ID is a</div><div class='add'>+		small unsigned integer.</div><div class='add'>+</div><div class='add'>+What:		.../XXXXXXX.ipa/endpoint_id/modem_rx</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	v5.19</div><div class='add'>+Contact:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		The .../XXXXXXX.ipa/endpoint_id/modem_rx file contains</div><div class='add'>+		the ID of the AP endpoint on which packets originating</div><div class='add'>+		from the embedded modem are received.</div><div class='add'>+</div><div class='add'>+What:		.../XXXXXXX.ipa/endpoint_id/modem_tx</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	v5.19</div><div class='add'>+Contact:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		The .../XXXXXXX.ipa/endpoint_id/modem_tx file contains</div><div class='add'>+		the ID of the AP endpoint on which packets destined</div><div class='add'>+		for the embedded modem are sent.</div><div class='add'>+</div><div class='add'>+What:		.../XXXXXXX.ipa/endpoint_id/monitor_rx</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	v5.19</div><div class='add'>+Contact:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		The .../XXXXXXX.ipa/endpoint_id/monitor_rx file contains</div><div class='add'>+		the ID of the AP endpoint on which IPA "monitor" data is</div><div class='add'>+		received.  The monitor endpoint supplies replicas of</div><div class='add'>+		packets that enter the IPA hardware for processing.</div><div class='add'>+		Each replicated packet is preceded by a fixed-size "ODL"</div><div class='add'>+		header (see .../XXXXXXX.ipa/feature/monitor, above).</div><div class='add'>+		Large packets are truncated, to reduce the bandwidth</div><div class='add'>+		required to provide the monitor function.</div><div class='add'>+</div><div class='ctx'> What:		.../XXXXXXX.ipa/modem/</div><div class='ctx'> Date:		June 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='del'>-		The .../XXXXXXX.ipa/modem/ directory contains a set of</div><div class='del'>-		attributes describing properties of the modem execution</div><div class='del'>-		environment reachable by the IPA hardware.</div><div class='add'>+		The .../XXXXXXX.ipa/modem/ directory contains attributes</div><div class='add'>+		describing properties of the modem embedded in the SoC.</div><div class='ctx'> </div><div class='ctx'> What:		.../XXXXXXX.ipa/modem/rx_endpoint_id</div><div class='ctx'> Date:		June 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='del'>-		The .../XXXXXXX.ipa/feature/rx_endpoint_id file contains</div><div class='del'>-		the AP endpoint ID that receives packets originating from</div><div class='del'>-		the modem execution environment.  The "rx" is from the</div><div class='del'>-		perspective of the AP; this endpoint is considered an "IPA</div><div class='del'>-		producer".  An endpoint ID is a small unsigned integer.</div><div class='add'>+		The .../XXXXXXX.ipa/modem/rx_endpoint_id file duplicates</div><div class='add'>+		the value found in .../XXXXXXX.ipa/endpoint_id/modem_rx.</div><div class='ctx'> </div><div class='ctx'> What:		.../XXXXXXX.ipa/modem/tx_endpoint_id</div><div class='ctx'> Date:		June 2021</div><div class='ctx'> KernelVersion:	v5.14</div><div class='ctx'> Contact:	Alex Elder &lt;elder@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='del'>-		The .../XXXXXXX.ipa/feature/tx_endpoint_id file contains</div><div class='del'>-		the AP endpoint ID used to transmit packets destined for</div><div class='del'>-		the modem execution environment.  The "tx" is from the</div><div class='del'>-		perspective of the AP; this endpoint is considered an "IPA</div><div class='del'>-		consumer".  An endpoint ID is a small unsigned integer.</div><div class='add'>+		The .../XXXXXXX.ipa/modem/tx_endpoint_id file duplicates</div><div class='add'>+		the value found in .../XXXXXXX.ipa/endpoint_id/modem_tx.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-power b/Documentation/ABI/testing/sysfs-devices-power<br/>index 1b2a2d41ff80..54195530e97a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-power?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-power</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-power?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-power</a></div><div class='hunk'>@@ -303,5 +303,5 @@ Date:		Apr 2010</div><div class='ctx'> Contact:	Dominik Brodowski &lt;linux@dominikbrodowski.net&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Reports the runtime PM children usage count of a device, or</div><div class='del'>-		0 if the the children will be ignored.</div><div class='add'>+		0 if the children will be ignored.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-soc b/Documentation/ABI/testing/sysfs-devices-soc<br/>index ea999e292f11..5269808ec35f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-soc?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-soc</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-soc?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-soc</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> What:		/sys/devices/socX</div><div class='ctx'> Date:		January 2012</div><div class='del'>-contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		The /sys/devices/ directory contains a sub-directory for each</div><div class='ctx'> 		System-on-Chip (SoC) device on a running platform. Information</div><div class='hunk'>@@ -14,14 +14,14 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/socX/machine</div><div class='ctx'> Date:		January 2012</div><div class='del'>-contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Read-only attribute common to all SoCs. Contains the SoC machine</div><div class='ctx'> 		name (e.g. Ux500).</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/socX/family</div><div class='ctx'> Date:		January 2012</div><div class='del'>-contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Read-only attribute common to all SoCs. Contains SoC family name</div><div class='ctx'> 		(e.g. DB8500).</div><div class='hunk'>@@ -59,7 +59,7 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/socX/soc_id</div><div class='ctx'> Date:		January 2012</div><div class='del'>-contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Read-only attribute supported by most SoCs. In the case of</div><div class='ctx'> 		ST-Ericsson's chips this contains the SoC serial number.</div><div class='hunk'>@@ -72,21 +72,21 @@ Description:</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/socX/revision</div><div class='ctx'> Date:		January 2012</div><div class='del'>-contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Read-only attribute supported by most SoCs. Contains the SoC's</div><div class='ctx'> 		manufacturing revision number.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/socX/process</div><div class='ctx'> Date:		January 2012</div><div class='del'>-contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		Read-only attribute supported ST-Ericsson's silicon. Contains the</div><div class='ctx'> 		the process by which the silicon chip was manufactured.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/soc</div><div class='ctx'> Date:		January 2012</div><div class='del'>-contact:	Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+contact:	Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		The /sys/bus/soc/ directory contains the usual sub-folders</div><div class='ctx'> 		expected under most buses. /sys/bus/soc/devices is of particular</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-state_synced b/Documentation/ABI/testing/sysfs-devices-state_synced<br/>index 0c922d7d02fc..c64636ddac41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-state_synced?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-state_synced</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-state_synced?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-state_synced</a></div><div class='hunk'>@@ -21,4 +21,9 @@ Description:</div><div class='ctx'> 		at the time the kernel starts are not affected or limited in</div><div class='ctx'> 		any way by sync_state() callbacks.</div><div class='ctx'> </div><div class='add'>+		Writing "1" to this file will force a call to the device's</div><div class='add'>+		sync_state() function if it hasn't been called already. The</div><div class='add'>+		sync_state() call happens independent of the state of the</div><div class='add'>+		consumer devices.</div><div class='add'>+</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu<br/>index 2ad01cad7f1c..f54867cadb0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-devices-system-cpu</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-system-cpu?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-system-cpu</a></div><div class='hunk'>@@ -67,8 +67,7 @@ Description:	Discover NUMA node a CPU belongs to</div><div class='ctx'> 		/sys/devices/system/cpu/cpu42/node2 -&gt; ../../node/node2</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-What:		/sys/devices/system/cpu/cpuX/topology/core_id</div><div class='del'>-		/sys/devices/system/cpu/cpuX/topology/core_siblings</div><div class='add'>+What:		/sys/devices/system/cpu/cpuX/topology/core_siblings</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/topology/core_siblings_list</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/topology/physical_package_id</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/topology/thread_siblings</div><div class='hunk'>@@ -84,10 +83,6 @@ Description:	CPU topology files that describe a logical CPU's relationship</div><div class='ctx'> </div><div class='ctx'> 		Briefly, the files above are:</div><div class='ctx'> </div><div class='del'>-		core_id: the CPU core ID of cpuX. Typically it is the</div><div class='del'>-		hardware platform's identifier (rather than the kernel's).</div><div class='del'>-		The actual value is architecture and platform dependent.</div><div class='del'>-</div><div class='ctx'> 		core_siblings: internal kernel map of cpuX's hardware threads</div><div class='ctx'> 		within the same physical_package_id.</div><div class='ctx'> </div><div class='hunk'>@@ -301,7 +296,7 @@ Description:	Processor frequency boosting control</div><div class='ctx'> </div><div class='ctx'> 		This switch controls the boost setting for the whole system.</div><div class='ctx'> 		Boosting allows the CPU and the firmware to run at a frequency</div><div class='del'>-		beyond it's nominal limit.</div><div class='add'>+		beyond its nominal limit.</div><div class='ctx'> </div><div class='ctx'> 		More details can be found in</div><div class='ctx'> 		Documentation/admin-guide/pm/cpufreq.rst</div><div class='hunk'>@@ -493,12 +488,13 @@ What:		/sys/devices/system/cpu/cpuX/regs/</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/regs/identification/</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/regs/identification/midr_el1</div><div class='ctx'> 		/sys/devices/system/cpu/cpuX/regs/identification/revidr_el1</div><div class='add'>+		/sys/devices/system/cpu/cpuX/regs/identification/smidr_el1</div><div class='ctx'> Date:		June 2016</div><div class='ctx'> Contact:	Linux ARM Kernel Mailing list &lt;linux-arm-kernel@lists.infradead.org&gt;</div><div class='ctx'> Description:	AArch64 CPU registers</div><div class='ctx'> </div><div class='ctx'> 		'identification' directory exposes the CPU ID registers for</div><div class='del'>-		identifying model and revision of the CPU.</div><div class='add'>+		identifying model and revision of the CPU and SMCU.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/devices/system/cpu/aarch32_el0</div><div class='ctx'> Date:		May 2021</div><div class='hunk'>@@ -526,6 +522,8 @@ What:		/sys/devices/system/cpu/vulnerabilities</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/srbds</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/tsx_async_abort</div><div class='ctx'> 		/sys/devices/system/cpu/vulnerabilities/itlb_multihit</div><div class='add'>+		/sys/devices/system/cpu/vulnerabilities/mmio_stale_data</div><div class='add'>+		/sys/devices/system/cpu/vulnerabilities/retbleed</div><div class='ctx'> Date:		January 2018</div><div class='ctx'> Contact:	Linux kernel mailing list &lt;linux-kernel@vger.kernel.org&gt;</div><div class='ctx'> Description:	Information about CPU vulnerabilities</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-devices-vfio-dev b/Documentation/ABI/testing/sysfs-devices-vfio-dev<br/>new file mode 100644<br/>index 000000000000..e21424fd9666<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-devices-vfio-dev?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-devices-vfio-dev</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+What:		 /sys/.../&lt;device&gt;/vfio-dev/vfioX/</div><div class='add'>+Date:		 September 2022</div><div class='add'>+Contact:	 Yi Liu &lt;yi.l.liu@intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		 This directory is created when the device is bound to a</div><div class='add'>+		 vfio driver. The layout under this directory matches what</div><div class='add'>+		 exists for a standard 'struct device'. 'X' is a unique</div><div class='add'>+		 index marking this device in vfio.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator b/Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator<br/>index 42214b4ff14a..90596d8bb51c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator</a></div><div class='hunk'>@@ -26,6 +26,6 @@ Description:	Read/write the current state of DDR Backup Mode, which controls</div><div class='ctx'> 		     DDR Backup Mode must be explicitly enabled by the user,</div><div class='ctx'> 		     to invoke step 1.</div><div class='ctx'> </div><div class='del'>-		See also Documentation/devicetree/bindings/mfd/bd9571mwv.txt.</div><div class='add'>+		See also Documentation/devicetree/bindings/mfd/rohm,bd9571mwv.yaml.</div><div class='ctx'> Users:		User space applications for embedded boards equipped with a</div><div class='ctx'> 		BD9571MWV PMIC.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-ccp b/Documentation/ABI/testing/sysfs-driver-ccp<br/>new file mode 100644<br/>index 000000000000..7aded9b75553<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-ccp?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-ccp</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/fused_part</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/fused_part file reports</div><div class='add'>+		whether the CPU or APU has been fused to prevent tampering.</div><div class='add'>+		0: Not fused</div><div class='add'>+		1: Fused</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/debug_lock_on</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/debug_lock_on reports</div><div class='add'>+		whether the AMD CPU or APU has been unlocked for debugging.</div><div class='add'>+		Possible values:</div><div class='add'>+		0: Not locked</div><div class='add'>+		1: Locked</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/tsme_status</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/tsme_status file reports</div><div class='add'>+		the status of transparent secure memory encryption on AMD systems.</div><div class='add'>+		Possible values:</div><div class='add'>+		0: Not active</div><div class='add'>+		1: Active</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/anti_rollback_status</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/anti_rollback_status file reports</div><div class='add'>+		whether the PSP is enforcing rollback protection.</div><div class='add'>+		Possible values:</div><div class='add'>+		0: Not enforcing</div><div class='add'>+		1: Enforcing</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/rpmc_production_enabled</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/rpmc_production_enabled file reports</div><div class='add'>+		whether Replay Protected Monotonic Counter support has been enabled.</div><div class='add'>+		Possible values:</div><div class='add'>+		0: Not enabled</div><div class='add'>+		1: Enabled</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/rpmc_spirom_available</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/rpmc_spirom_available file reports</div><div class='add'>+		whether an Replay Protected Monotonic Counter supported SPI is installed</div><div class='add'>+		on the system.</div><div class='add'>+		Possible values:</div><div class='add'>+		0: Not present</div><div class='add'>+		1: Present</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/hsp_tpm_available</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/hsp_tpm_available file reports</div><div class='add'>+		whether the HSP TPM has been activated.</div><div class='add'>+		Possible values:</div><div class='add'>+		0: Not activated or present</div><div class='add'>+		1: Activated</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/rom_armor_enforced</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Contact:	mario.limonciello@amd.com</div><div class='add'>+Description:</div><div class='add'>+		The /sys/bus/pci/devices/&lt;BDF&gt;/rom_armor_enforced file reports</div><div class='add'>+		whether RomArmor SPI protection is enforced.</div><div class='add'>+		Possible values:</div><div class='add'>+		0: Not enforced</div><div class='add'>+		1: Enforced</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-chromeos-acpi b/Documentation/ABI/testing/sysfs-driver-chromeos-acpi<br/>new file mode 100644<br/>index 000000000000..c308926e1568<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-chromeos-acpi?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-chromeos-acpi</a></div><div class='hunk'>@@ -0,0 +1,137 @@</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/BINF.2</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns active EC firmware of current boot (boolean).</div><div class='add'>+</div><div class='add'>+		== ===============================</div><div class='add'>+		0  Read only (recovery) firmware.</div><div class='add'>+		1  Rewritable firmware.</div><div class='add'>+		== ===============================</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/BINF.3</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns main firmware type for current boot (integer).</div><div class='add'>+</div><div class='add'>+		== =====================================</div><div class='add'>+		0  Recovery.</div><div class='add'>+		1  Normal.</div><div class='add'>+		2  Developer.</div><div class='add'>+		3  Netboot (factory installation only).</div><div class='add'>+		== =====================================</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/CHSW</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns switch position for Chrome OS specific hardware</div><div class='add'>+		switches when the firmware is booted (integer).</div><div class='add'>+</div><div class='add'>+		==== ===========================================</div><div class='add'>+		0    No changes.</div><div class='add'>+		2    Recovery button was pressed.</div><div class='add'>+		4    Recovery button was pressed (EC firmware).</div><div class='add'>+		32   Developer switch was enabled.</div><div class='add'>+		512  Firmware write protection was disabled.</div><div class='add'>+		==== ===========================================</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/FMAP</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns physical memory address of the start of the main</div><div class='add'>+		processor firmware flashmap.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/FRID</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns firmware version for the read-only portion of the</div><div class='add'>+		main processor firmware.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/FWID</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns firmware version for the rewritable portion of the</div><div class='add'>+		main processor firmware.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.0</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns type of the GPIO signal for the Chrome OS specific</div><div class='add'>+		GPIO assignments (integer).</div><div class='add'>+</div><div class='add'>+		=========== ==================================</div><div class='add'>+		1           Recovery button.</div><div class='add'>+		2           Developer mode switch.</div><div class='add'>+		3           Firmware write protection switch.</div><div class='add'>+		256 to 511  Debug header GPIO 0 to GPIO 255.</div><div class='add'>+		=========== ==================================</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.1</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns signal attributes of the GPIO signal (integer bitfield).</div><div class='add'>+</div><div class='add'>+		== =======================</div><div class='add'>+		0  Signal is active low.</div><div class='add'>+		1  Signal is active high.</div><div class='add'>+		== =======================</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.2</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns the GPIO number on the specified GPIO</div><div class='add'>+		controller.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/GPIO.X/GPIO.3</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns name of the GPIO controller.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/HWID</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns hardware ID for the Chromebook.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/MECK</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns the SHA-1 or SHA-256 hash that is read out of the</div><div class='add'>+		Management Engine extended registers during boot. The hash</div><div class='add'>+		is exported via ACPI so the OS can verify that the Management</div><div class='add'>+		Engine firmware has not changed. If Management Engine is not</div><div class='add'>+		present, or if the firmware was unable to read the extended registers, this buffer size can be zero.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/VBNV.0</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns offset in CMOS bank 0 of the verified boot non-volatile</div><div class='add'>+		storage block, counting from the first writable CMOS byte</div><div class='add'>+		(that is, 'offset = 0' is the byte following the 14 bytes of</div><div class='add'>+		clock data).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/VBNV.1</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Return the size in bytes of the verified boot non-volatile</div><div class='add'>+		storage block.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/GGL0001:*/VDAT</div><div class='add'>+Date:		May 2022</div><div class='add'>+KernelVersion:	5.19</div><div class='add'>+Description:</div><div class='add'>+		Returns the verified boot data block shared between the</div><div class='add'>+		firmware verification step and the kernel verification step</div><div class='add'>+		(binary).</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-habanalabs b/Documentation/ABI/testing/sysfs-driver-habanalabs<br/>index 96646fb2e7a1..1b98b6503b23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-habanalabs?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-habanalabs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-habanalabs?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-habanalabs</a></div><div class='hunk'>@@ -16,7 +16,7 @@ Description:    Version of the application running on the device's CPU</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/habanalabs/hl&lt;n&gt;/clk_max_freq_mhz</div><div class='ctx'> Date:           Jun 2019</div><div class='del'>-KernelVersion:  not yet upstreamed</div><div class='add'>+KernelVersion:  5.7</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Allows the user to set the maximum clock frequency, in MHz.</div><div class='ctx'>                 The device clock might be set to lower value than the maximum.</div><div class='hunk'>@@ -26,7 +26,7 @@ Description:    Allows the user to set the maximum clock frequency, in MHz.</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/habanalabs/hl&lt;n&gt;/clk_cur_freq_mhz</div><div class='ctx'> Date:           Jun 2019</div><div class='del'>-KernelVersion:  not yet upstreamed</div><div class='add'>+KernelVersion:  5.7</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Displays the current frequency, in MHz, of the device clock.</div><div class='ctx'>                 This property is valid only for the Gaudi ASIC family</div><div class='hunk'>@@ -176,6 +176,12 @@ KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Version of the device's preboot F/W code</div><div class='ctx'> </div><div class='add'>+What:           /sys/class/habanalabs/hl&lt;n&gt;/security_enabled</div><div class='add'>+Date:           Oct 2022</div><div class='add'>+KernelVersion:  6.1</div><div class='add'>+Contact:        obitton@habana.ai</div><div class='add'>+Description:    Displays the device's security status</div><div class='add'>+</div><div class='ctx'> What:           /sys/class/habanalabs/hl&lt;n&gt;/soft_reset</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='hunk'>@@ -195,7 +201,19 @@ What:           /sys/class/habanalabs/hl&lt;n&gt;/status</div><div class='ctx'> Date:           Jan 2019</div><div class='ctx'> KernelVersion:  5.1</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='del'>-Description:    Status of the card: "Operational", "Malfunction", "In reset".</div><div class='add'>+Description:    Status of the card:</div><div class='add'>+</div><div class='add'>+                  * "operational" - Device is available for work.</div><div class='add'>+                  * "in reset" - Device is going through reset, will be</div><div class='add'>+                    available shortly.</div><div class='add'>+                  * "disabled" - Device is not usable.</div><div class='add'>+                  * "needs reset" - Device is not usable until a hard reset</div><div class='add'>+                    is initiated.</div><div class='add'>+                  * "in device creation" - Device is not available yet, as it</div><div class='add'>+                    is still initializing.</div><div class='add'>+                  * "in reset after device release" - Device is going through</div><div class='add'>+                    a compute-reset which is executed after a device release</div><div class='add'>+                    (relevant for Gaudi2 only).</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/habanalabs/hl&lt;n&gt;/thermal_ver</div><div class='ctx'> Date:           Jan 2019</div><div class='hunk'>@@ -230,6 +248,6 @@ Description:    Version of the u-boot running on the device's CPU</div><div class='ctx'> </div><div class='ctx'> What:           /sys/class/habanalabs/hl&lt;n&gt;/vrm_ver</div><div class='ctx'> Date:           Jan 2022</div><div class='del'>-KernelVersion:  not yet upstreamed</div><div class='add'>+KernelVersion:  5.17</div><div class='ctx'> Contact:        ogabbay@kernel.org</div><div class='ctx'> Description:    Version of the Device's Voltage Regulator Monitor F/W code. N/A to GOYA and GAUDI</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon b/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon<br/>new file mode 100644<br/>index 000000000000..8d7d8f05f6cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+What:		/sys/devices/.../hwmon/hwmon&lt;i&gt;/in0_input</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	intel-gfx@lists.freedesktop.org</div><div class='add'>+Description:	RO. Current Voltage in millivolt.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel i915 graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../hwmon/hwmon&lt;i&gt;/power1_max</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	intel-gfx@lists.freedesktop.org</div><div class='add'>+Description:	RW. Card reactive sustained  (PL1/Tau) power limit in microwatts.</div><div class='add'>+</div><div class='add'>+		The power controller will throttle the operating frequency</div><div class='add'>+		if the power averaged over a window (typically seconds)</div><div class='add'>+		exceeds this limit. A read value of 0 means that the PL1</div><div class='add'>+		power limit is disabled, writing 0 disables the</div><div class='add'>+		limit. Writing values &gt; 0 will enable the power limit.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel i915 graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../hwmon/hwmon&lt;i&gt;/power1_rated_max</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	intel-gfx@lists.freedesktop.org</div><div class='add'>+Description:	RO. Card default power limit (default TDP setting).</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel i915 graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../hwmon/hwmon&lt;i&gt;/power1_max_interval</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	intel-gfx@lists.freedesktop.org</div><div class='add'>+Description:	RW. Sustained power limit interval (Tau in PL1/Tau) in</div><div class='add'>+		milliseconds over which sustained power is averaged.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel i915 graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../hwmon/hwmon&lt;i&gt;/power1_crit</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	intel-gfx@lists.freedesktop.org</div><div class='add'>+Description:	RW. Card reactive critical (I1) power limit in microwatts.</div><div class='add'>+</div><div class='add'>+		Card reactive critical (I1) power limit in microwatts is exposed</div><div class='add'>+		for client products. The power controller will throttle the</div><div class='add'>+		operating frequency if the power averaged over a window exceeds</div><div class='add'>+		this limit.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel i915 graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../hwmon/hwmon&lt;i&gt;/curr1_crit</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	intel-gfx@lists.freedesktop.org</div><div class='add'>+Description:	RW. Card reactive critical (I1) power limit in milliamperes.</div><div class='add'>+</div><div class='add'>+		Card reactive critical (I1) power limit in milliamperes is</div><div class='add'>+		exposed for server products. The power controller will throttle</div><div class='add'>+		the operating frequency if the power averaged over a window</div><div class='add'>+		exceeds this limit.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel i915 graphics platforms.</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/.../hwmon/hwmon&lt;i&gt;/energy1_input</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	intel-gfx@lists.freedesktop.org</div><div class='add'>+Description:	RO. Energy input of device or gt in microjoules.</div><div class='add'>+</div><div class='add'>+		For i915 device level hwmon devices (name "i915") this</div><div class='add'>+		reflects energy input for the entire device. For gt level</div><div class='add'>+		hwmon devices (name "i915_gtN") this reflects energy input</div><div class='add'>+		for the gt.</div><div class='add'>+</div><div class='add'>+		Only supported for particular Intel i915 graphics platforms.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc<br/>index 9773925138af..a8ab58035c95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-intel-m10-bmc</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-intel-m10-bmc</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-What:		/sys/bus/spi/devices/.../bmc_version</div><div class='add'>+What:		/sys/bus/.../drivers/intel-m10-bmc/.../bmc_version</div><div class='ctx'> Date:		June 2020</div><div class='ctx'> KernelVersion:	5.10</div><div class='ctx'> Contact:	Xu Yilun &lt;yilun.xu@intel.com&gt;</div><div class='hunk'>@@ -6,7 +6,7 @@ Description:	Read only. Returns the hardware build version of Intel</div><div class='ctx'> 		MAX10 BMC chip.</div><div class='ctx'> 		Format: "0x%x".</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/spi/devices/.../bmcfw_version</div><div class='add'>+What:		/sys/bus/.../drivers/intel-m10-bmc/.../bmcfw_version</div><div class='ctx'> Date:		June 2020</div><div class='ctx'> KernelVersion:	5.10</div><div class='ctx'> Contact:	Xu Yilun &lt;yilun.xu@intel.com&gt;</div><div class='hunk'>@@ -14,7 +14,7 @@ Description:	Read only. Returns the firmware version of Intel MAX10</div><div class='ctx'> 		BMC chip.</div><div class='ctx'> 		Format: "0x%x".</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/spi/devices/.../mac_address</div><div class='add'>+What:		/sys/bus/.../drivers/intel-m10-bmc/.../mac_address</div><div class='ctx'> Date:		January 2021</div><div class='ctx'> KernelVersion:  5.12</div><div class='ctx'> Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='hunk'>@@ -25,7 +25,7 @@ Description:	Read only. Returns the first MAC address in a block</div><div class='ctx'> 		space.</div><div class='ctx'> 		Format: "%02x:%02x:%02x:%02x:%02x:%02x".</div><div class='ctx'> </div><div class='del'>-What:		/sys/bus/spi/devices/.../mac_count</div><div class='add'>+What:		/sys/bus/.../drivers/intel-m10-bmc/.../mac_count</div><div class='ctx'> Date:		January 2021</div><div class='ctx'> KernelVersion:  5.12</div><div class='ctx'> Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update<br/>new file mode 100644<br/>index 000000000000..0a41afe0ab4c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-intel-m10-bmc-sec-update</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read only. Returns the root entry hash for the static</div><div class='add'>+		region if one is programmed, else it returns the</div><div class='add'>+		string: "hash not programmed".  This file is only</div><div class='add'>+		visible if the underlying device supports it.</div><div class='add'>+		Format: string.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read only. Returns the root entry hash for the partial</div><div class='add'>+		reconfiguration region if one is programmed, else it</div><div class='add'>+		returns the string: "hash not programmed".  This file</div><div class='add'>+		is only visible if the underlying device supports it.</div><div class='add'>+		Format: string.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read only. Returns the root entry hash for the BMC image</div><div class='add'>+		if one is programmed, else it returns the string:</div><div class='add'>+		"hash not programmed".  This file is only visible if the</div><div class='add'>+		underlying device supports it.</div><div class='add'>+		Format: string.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read only. Returns a list of indices for canceled code</div><div class='add'>+		signing keys for the static region. The standard bitmap</div><div class='add'>+		list format is used (e.g. "1,2-6,9").</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read only. Returns a list of indices for canceled code</div><div class='add'>+		signing keys for the partial reconfiguration region. The</div><div class='add'>+		standard bitmap list format is used (e.g. "1,2-6,9").</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_canceled_csks</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read only. Returns a list of indices for canceled code</div><div class='add'>+		signing keys for the BMC.  The standard bitmap list format</div><div class='add'>+		is used (e.g. "1,2-6,9").</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count</div><div class='add'>+Date:		Sep 2022</div><div class='add'>+KernelVersion:	5.20</div><div class='add'>+Contact:	Russ Weight &lt;russell.h.weight@intel.com&gt;</div><div class='add'>+Description:	Read only. Returns number of times the secure update</div><div class='add'>+		staging area has been flashed.</div><div class='add'>+		Format: "%u".</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-intel_sdsi b/Documentation/ABI/testing/sysfs-driver-intel_sdsi<br/>index ab122125ff9a..f8afed127107 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-intel_sdsi?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-intel_sdsi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-intel_sdsi?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-intel_sdsi</a></div><div class='hunk'>@@ -4,26 +4,28 @@ KernelVersion:	5.18</div><div class='ctx'> Contact:	"David E. Box" &lt;david.e.box@linux.intel.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		This directory contains interface files for accessing Intel</div><div class='del'>-		Software Defined Silicon (SDSi) features on a CPU. X</div><div class='del'>-		represents the socket instance (though not the socket ID).</div><div class='del'>-		The socket ID is determined by reading the registers file</div><div class='del'>-		and decoding it per the specification.</div><div class='add'>+		On Demand (formerly Software Defined Silicon or SDSi) features</div><div class='add'>+		on a CPU. X represents the socket instance (though not the</div><div class='add'>+		socket ID). The socket ID is determined by reading the</div><div class='add'>+		registers file and decoding it per the specification.</div><div class='ctx'> </div><div class='del'>-		Some files communicate with SDSi hardware through a mailbox.</div><div class='del'>-		Should the operation fail, one of the following error codes</div><div class='del'>-		may be returned:</div><div class='add'>+		Some files communicate with On Demand hardware through a</div><div class='add'>+		mailbox. Should the operation fail, one of the following error</div><div class='add'>+		codes may be returned:</div><div class='ctx'> </div><div class='add'>+		==========	=====</div><div class='ctx'> 		Error Code	Cause</div><div class='del'>-	        ----------	-----</div><div class='del'>-	        EIO		General mailbox failure. Log may indicate cause.</div><div class='del'>-	        EBUSY		Mailbox is owned by another agent.</div><div class='del'>-	        EPERM		SDSI capability is not enabled in hardware.</div><div class='del'>-	        EPROTO		Failure in mailbox protocol detected by driver.</div><div class='add'>+		==========	=====</div><div class='add'>+		EIO		General mailbox failure. Log may indicate cause.</div><div class='add'>+		EBUSY		Mailbox is owned by another agent.</div><div class='add'>+		EPERM		On Demand capability is not enabled in hardware.</div><div class='add'>+		EPROTO		Failure in mailbox protocol detected by driver.</div><div class='ctx'> 				See log for details.</div><div class='del'>-	        EOVERFLOW	For provision commands, the size of the data</div><div class='add'>+		EOVERFLOW	For provision commands, the size of the data</div><div class='ctx'> 				exceeds what may be written.</div><div class='del'>-	        ESPIPE		Seeking is not allowed.</div><div class='del'>-	        ETIMEDOUT	Failure to complete mailbox transaction in time.</div><div class='add'>+		ESPIPE		Seeking is not allowed.</div><div class='add'>+		ETIMEDOUT	Failure to complete mailbox transaction in time.</div><div class='add'>+		==========	=====</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/guid</div><div class='ctx'> Date:		Feb 2022</div><div class='hunk'>@@ -52,8 +54,8 @@ KernelVersion:	5.18</div><div class='ctx'> Contact:	"David E. Box" &lt;david.e.box@linux.intel.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		(WO) Used to write an Authentication Key Certificate (AKC) to</div><div class='del'>-		the SDSi NVRAM for the CPU. The AKC is used to authenticate a</div><div class='del'>-		Capability Activation Payload. Mailbox command.</div><div class='add'>+		the On Demand NVRAM for the CPU. The AKC is used to authenticate</div><div class='add'>+		a Capability Activation Payload. Mailbox command.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/provision_cap</div><div class='ctx'> Date:		Feb 2022</div><div class='hunk'>@@ -61,17 +63,28 @@ KernelVersion:	5.18</div><div class='ctx'> Contact:	"David E. Box" &lt;david.e.box@linux.intel.com&gt;</div><div class='ctx'> Description:</div><div class='ctx'> 		(WO) Used to write a Capability Activation Payload (CAP) to the</div><div class='del'>-		SDSi NVRAM for the CPU. CAPs are used to activate a given CPU</div><div class='del'>-		feature. A CAP is validated by SDSi hardware using a previously</div><div class='del'>-		provisioned AKC file. Upon successful authentication, the CPU</div><div class='del'>-		configuration is updated. A cold reboot is required to fully</div><div class='del'>-		activate the feature. Mailbox command.</div><div class='add'>+		On Demand NVRAM for the CPU. CAPs are used to activate a given</div><div class='add'>+		CPU feature. A CAP is validated by On Demand hardware using a</div><div class='add'>+		previously provisioned AKC file. Upon successful authentication,</div><div class='add'>+		the CPU configuration is updated. A cold reboot is required to</div><div class='add'>+		fully activate the feature. Mailbox command.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/meter_certificate</div><div class='add'>+Date:		Nov 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	"David E. Box" &lt;david.e.box@linux.intel.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		(RO) Used to read back the current meter certificate for the CPU</div><div class='add'>+		from Intel On Demand hardware. The meter certificate contains</div><div class='add'>+		utilization metrics of On Demand enabled features. Mailbox</div><div class='add'>+		command.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/bus/auxiliary/devices/intel_vsec.sdsi.X/state_certificate</div><div class='ctx'> Date:		Feb 2022</div><div class='ctx'> KernelVersion:	5.18</div><div class='ctx'> Contact:	"David E. Box" &lt;david.e.box@linux.intel.com&gt;</div><div class='ctx'> Description:</div><div class='del'>-		(RO) Used to read back the current State Certificate for the CPU</div><div class='del'>-		from SDSi hardware. The State Certificate contains information</div><div class='del'>-		about the current licenses on the CPU. Mailbox command.</div><div class='add'>+		(RO) Used to read back the current state certificate for the CPU</div><div class='add'>+		from On Demand hardware. The state certificate contains</div><div class='add'>+		information about the current licenses on the CPU. Mailbox</div><div class='add'>+		command.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-qat b/Documentation/ABI/testing/sysfs-driver-qat<br/>new file mode 100644<br/>index 000000000000..087842b1969e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-qat?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-qat</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/qat/state</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	6.0</div><div class='add'>+Contact:	qat-linux@intel.com</div><div class='add'>+Description:	(RW) Reports the current state of the QAT device. Write to</div><div class='add'>+		the file to start or stop the device.</div><div class='add'>+</div><div class='add'>+		The values are:</div><div class='add'>+</div><div class='add'>+		* up: the device is up and running</div><div class='add'>+		* down: the device is down</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		It is possible to transition the device from up to down only</div><div class='add'>+		if the device is up and vice versa.</div><div class='add'>+</div><div class='add'>+		This attribute is only available for qat_4xxx devices.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/pci/devices/&lt;BDF&gt;/qat/cfg_services</div><div class='add'>+Date:		June 2022</div><div class='add'>+KernelVersion:	6.0</div><div class='add'>+Contact:	qat-linux@intel.com</div><div class='add'>+Description:	(RW) Reports the current configuration of the QAT device.</div><div class='add'>+		Write to the file to change the configured services.</div><div class='add'>+</div><div class='add'>+		The values are:</div><div class='add'>+</div><div class='add'>+		* sym;asym: the device is configured for running crypto</div><div class='add'>+		  services</div><div class='add'>+		* dc: the device is configured for running compression services</div><div class='add'>+</div><div class='add'>+		It is possible to set the configuration only if the device</div><div class='add'>+		is in the `down` state (see /sys/bus/pci/devices/&lt;BDF&gt;/qat/state)</div><div class='add'>+</div><div class='add'>+		The following example shows how to change the configuration of</div><div class='add'>+		a device configured for running crypto services in order to</div><div class='add'>+		run data compression::</div><div class='add'>+</div><div class='add'>+			# cat /sys/bus/pci/devices/&lt;BDF&gt;/qat/state</div><div class='add'>+			up</div><div class='add'>+			# cat /sys/bus/pci/devices/&lt;BDF&gt;/qat/cfg_services</div><div class='add'>+			sym;asym</div><div class='add'>+			# echo down &gt; /sys/bus/pci/devices/&lt;BDF&gt;/qat/state</div><div class='add'>+			# echo dc &gt; /sys/bus/pci/devices/&lt;BDF&gt;/qat/cfg_services</div><div class='add'>+			# echo up &gt; /sys/bus/pci/devices/&lt;BDF&gt;/qat/state</div><div class='add'>+			# cat /sys/bus/pci/devices/&lt;BDF&gt;/qat/cfg_services</div><div class='add'>+			dc</div><div class='add'>+</div><div class='add'>+		This attribute is only available for qat_4xxx devices.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-typec-displayport b/Documentation/ABI/testing/sysfs-driver-typec-displayport<br/>index 231471ad0d4b..256c87c5219a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-typec-displayport?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-typec-displayport</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-typec-displayport?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-typec-displayport</a></div><div class='hunk'>@@ -47,3 +47,18 @@ Description:</div><div class='ctx'> 		USB SuperSpeed protocol. From user perspective pin assignments C</div><div class='ctx'> 		and E are equal, where all channels on the connector are used</div><div class='ctx'> 		for carrying DisplayPort protocol (allowing higher resolutions).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/typec/devices/.../displayport/hpd</div><div class='add'>+Date:		Dec 2022</div><div class='add'>+Contact:	Badhri Jagan Sridharan &lt;badhri@google.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		VESA DisplayPort Alt Mode on USB Type-C Standard defines how</div><div class='add'>+		HotPlugDetect(HPD) shall be supported on the USB-C connector when</div><div class='add'>+		operating in DisplayPort Alt Mode. This is a read only node which</div><div class='add'>+		reflects the current state of HPD.</div><div class='add'>+</div><div class='add'>+		Valid values:</div><div class='add'>+			- 1: when HPD’s logical state is high (HPD_High) as defined</div><div class='add'>+			     by VESA DisplayPort Alt Mode on USB Type-C Standard.</div><div class='add'>+			- 0 when HPD’s logical state is low (HPD_Low) as defined by</div><div class='add'>+			     VESA DisplayPort Alt Mode on USB Type-C Standard.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-uacce b/Documentation/ABI/testing/sysfs-driver-uacce<br/>index 08f2591138af..d3f0b8f3c589 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-uacce?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-uacce</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-uacce?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-uacce</a></div><div class='hunk'>@@ -19,6 +19,24 @@ Contact:        linux-accelerators@lists.ozlabs.org</div><div class='ctx'> Description:    Available instances left of the device</div><div class='ctx'>                 Return -ENODEV if uacce_ops get_available_instances is not provided</div><div class='ctx'> </div><div class='add'>+What:           /sys/class/uacce/&lt;dev_name&gt;/isolate_strategy</div><div class='add'>+Date:           Nov 2022</div><div class='add'>+KernelVersion:  6.1</div><div class='add'>+Contact:        linux-accelerators@lists.ozlabs.org</div><div class='add'>+Description:    (RW) A sysfs node that configure the error threshold for the hardware</div><div class='add'>+                isolation strategy. This size is a configured integer value, which is the</div><div class='add'>+                number of threshold for hardware errors occurred in one hour. The default is 0.</div><div class='add'>+                0 means never isolate the device. The maximum value is 65535. You can write</div><div class='add'>+                a number of threshold based on your hardware.</div><div class='add'>+</div><div class='add'>+What:           /sys/class/uacce/&lt;dev_name&gt;/isolate</div><div class='add'>+Date:           Nov 2022</div><div class='add'>+KernelVersion:  6.1</div><div class='add'>+Contact:        linux-accelerators@lists.ozlabs.org</div><div class='add'>+Description:    (R) A sysfs node that read the device isolated state. The value 1</div><div class='add'>+                means the device is unavailable. The 0 means the device is</div><div class='add'>+                available.</div><div class='add'>+</div><div class='ctx'> What:           /sys/class/uacce/&lt;dev_name&gt;/algorithms</div><div class='ctx'> Date:           Feb 2020</div><div class='ctx'> KernelVersion:  5.7</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-ufs b/Documentation/ABI/testing/sysfs-driver-ufs<br/>index a44ef8bfbadf..228aa43e14ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-ufs?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-ufs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-ufs?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-ufs</a></div><div class='hunk'>@@ -1417,6 +1417,15 @@ Description:	This node is used to set or display whether UFS WriteBooster is</div><div class='ctx'> 		platform that doesn't support UFSHCD_CAP_CLK_SCALING, we can</div><div class='ctx'> 		disable/enable WriteBooster through this sysfs node.</div><div class='ctx'> </div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/enable_wb_buf_flush</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/enable_wb_buf_flush</div><div class='add'>+Date:		July 2022</div><div class='add'>+Contact:	Jinyoung Choi &lt;j-young.choi@samsung.com&gt;</div><div class='add'>+Description:	This entry shows the status of WriteBooster buffer flushing</div><div class='add'>+		and it can be used to enable or disable the flushing.</div><div class='add'>+		If flushing is enabled, the device executes the flush</div><div class='add'>+		operation when the command queue is empty.</div><div class='add'>+</div><div class='ctx'> What:		/sys/bus/platform/drivers/ufshcd/*/device_descriptor/hpb_version</div><div class='ctx'> What:		/sys/bus/platform/devices/*.ufs/device_descriptor/hpb_version</div><div class='ctx'> Date:		June 2021</div><div class='hunk'>@@ -1518,7 +1527,7 @@ Description:	This entry shows the number of reads that cannot be changed to</div><div class='ctx'> </div><div class='ctx'> 		The file is read only.</div><div class='ctx'> </div><div class='del'>-What:		/sys/class/scsi_device/*/device/hpb_stats/rb_noti_cnt</div><div class='add'>+What:		/sys/class/scsi_device/*/device/hpb_stats/rcmd_noti_cnt</div><div class='ctx'> Date:		June 2021</div><div class='ctx'> Contact:	Daejun Park &lt;daejun7.park@samsung.com&gt;</div><div class='ctx'> Description:	This entry shows the number of response UPIUs that has</div><div class='hunk'>@@ -1526,19 +1535,23 @@ Description:	This entry shows the number of response UPIUs that has</div><div class='ctx'> </div><div class='ctx'> 		The file is read only.</div><div class='ctx'> </div><div class='del'>-What:		/sys/class/scsi_device/*/device/hpb_stats/rb_active_cnt</div><div class='add'>+What:		/sys/class/scsi_device/*/device/hpb_stats/rcmd_active_cnt</div><div class='ctx'> Date:		June 2021</div><div class='ctx'> Contact:	Daejun Park &lt;daejun7.park@samsung.com&gt;</div><div class='del'>-Description:	This entry shows the number of active sub-regions recommended by</div><div class='del'>-		response UPIUs.</div><div class='add'>+Description:	For the HPB device control mode, this entry shows the number of</div><div class='add'>+        active sub-regions recommended by response UPIUs. For the HPB host control</div><div class='add'>+        mode, this entry shows the number of active sub-regions recommended by the</div><div class='add'>+        HPB host control mode heuristic algorithm.</div><div class='ctx'> </div><div class='ctx'> 		The file is read only.</div><div class='ctx'> </div><div class='del'>-What:		/sys/class/scsi_device/*/device/hpb_stats/rb_inactive_cnt</div><div class='add'>+What:		/sys/class/scsi_device/*/device/hpb_stats/rcmd_inactive_cnt</div><div class='ctx'> Date:		June 2021</div><div class='ctx'> Contact:	Daejun Park &lt;daejun7.park@samsung.com&gt;</div><div class='del'>-Description:	This entry shows the number of inactive regions recommended by</div><div class='del'>-		response UPIUs.</div><div class='add'>+Description:	For the HPB device control mode, this entry shows the number of</div><div class='add'>+        inactive regions recommended by response UPIUs. For the HPB host control</div><div class='add'>+        mode, this entry shows the number of inactive regions recommended by the</div><div class='add'>+        HPB host control mode heuristic algorithm.</div><div class='ctx'> </div><div class='ctx'> 		The file is read only.</div><div class='ctx'> </div><div class='hunk'>@@ -1587,6 +1600,43 @@ Description:	This entry shows the status of HPB.</div><div class='ctx'> </div><div class='ctx'> 		The file is read only.</div><div class='ctx'> </div><div class='add'>+Contact:	Daniil Lunev &lt;dlunev@chromium.org&gt;</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/capabilities/</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/capabilities/</div><div class='add'>+Date:		August 2022</div><div class='add'>+Description:	The group represents the effective capabilities of the</div><div class='add'>+		host-device pair. i.e. the capabilities which are enabled in the</div><div class='add'>+		driver for the specific host controller, supported by the host</div><div class='add'>+		controller and are supported and/or have compatible</div><div class='add'>+		configuration on the device side.</div><div class='add'>+</div><div class='add'>+Contact:	Daniil Lunev &lt;dlunev@chromium.org&gt;</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/capabilities/clock_scaling</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/capabilities/clock_scaling</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Daniil Lunev &lt;dlunev@chromium.org&gt;</div><div class='add'>+Description:	Indicates status of clock scaling.</div><div class='add'>+</div><div class='add'>+		== ============================</div><div class='add'>+		0  Clock scaling is not supported.</div><div class='add'>+		1  Clock scaling is supported.</div><div class='add'>+		== ============================</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/drivers/ufshcd/*/capabilities/write_booster</div><div class='add'>+What:		/sys/bus/platform/devices/*.ufs/capabilities/write_booster</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Daniil Lunev &lt;dlunev@chromium.org&gt;</div><div class='add'>+Description:	Indicates status of Write Booster.</div><div class='add'>+</div><div class='add'>+		== ============================</div><div class='add'>+		0  Write Booster can not be enabled.</div><div class='add'>+		1  Write Booster can be enabled.</div><div class='add'>+		== ============================</div><div class='add'>+</div><div class='add'>+		The file is read only.</div><div class='add'>+</div><div class='ctx'> What:		/sys/class/scsi_device/*/device/hpb_param_sysfs/activation_thld</div><div class='ctx'> Date:		February 2021</div><div class='ctx'> Contact:	Avri Altman &lt;avri.altman@wdc.com&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-xen-blkback b/Documentation/ABI/testing/sysfs-driver-xen-blkback<br/>index a74dfe52dd76..fac0f429a869 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-xen-blkback?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-xen-blkback</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-xen-blkback?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-xen-blkback</a></div><div class='hunk'>@@ -29,7 +29,7 @@ Description:</div><div class='ctx'> What:           /sys/module/xen_blkback/parameters/buffer_squeeze_duration_ms</div><div class='ctx'> Date:           December 2019</div><div class='ctx'> KernelVersion:  5.6</div><div class='del'>-Contact:        SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Contact:        Maximilian Heyne &lt;mheyne@amazon.de&gt;</div><div class='ctx'> Description:</div><div class='ctx'>                 When memory pressure is reported to blkback this option</div><div class='ctx'>                 controls the duration in milliseconds that blkback will not</div><div class='hunk'>@@ -39,8 +39,8 @@ Description:</div><div class='ctx'> What:           /sys/module/xen_blkback/parameters/feature_persistent</div><div class='ctx'> Date:           September 2020</div><div class='ctx'> KernelVersion:  5.10</div><div class='del'>-Contact:        SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Contact:        Maximilian Heyne &lt;mheyne@amazon.de&gt;</div><div class='ctx'> Description:</div><div class='ctx'>                 Whether to enable the persistent grants feature or not.  Note</div><div class='del'>-                that this option only takes effect on newly created backends.</div><div class='add'>+                that this option only takes effect on newly connected backends.</div><div class='ctx'>                 The default is Y (enable).</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-xen-blkfront b/Documentation/ABI/testing/sysfs-driver-xen-blkfront<br/>index 61fd173fabfe..4d36c5a10546 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-xen-blkfront?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-driver-xen-blkfront</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-xen-blkfront?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-xen-blkfront</a></div><div class='hunk'>@@ -12,8 +12,8 @@ Description:</div><div class='ctx'> What:           /sys/module/xen_blkfront/parameters/feature_persistent</div><div class='ctx'> Date:           September 2020</div><div class='ctx'> KernelVersion:  5.10</div><div class='del'>-Contact:        SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Contact:        Maximilian Heyne &lt;mheyne@amazon.de&gt;</div><div class='ctx'> Description:</div><div class='ctx'>                 Whether to enable the persistent grants feature or not.  Note</div><div class='del'>-                that this option only takes effect on newly created frontends.</div><div class='add'>+                that this option only takes effect on newly connected frontends.</div><div class='ctx'>                 The default is Y (enable).</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager b/Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager<br/>new file mode 100644<br/>index 000000000000..57b9b68a73ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager</a></div><div class='hunk'>@@ -0,0 +1,16 @@</div><div class='add'>+What:          /sys/devices/platform/amba_pl/&lt;dev&gt;/errcnt</div><div class='add'>+Date:          Nov 2022</div><div class='add'>+Contact:       appana.durga.kedareswara.rao@amd.com</div><div class='add'>+Description:   This control file provides the fault detection count.</div><div class='add'>+               This file cannot be written.</div><div class='add'>+               Example:</div><div class='add'>+               # cat /sys/devices/platform/amba_pl/44a10000.tmr_manager/errcnt</div><div class='add'>+               1</div><div class='add'>+</div><div class='add'>+What:          /sys/devices/platform/amba_pl/&lt;dev&gt;/dis_block_break</div><div class='add'>+Date:          Nov 2022</div><div class='add'>+Contact:       appana.durga.kedareswara.rao@amd.com</div><div class='add'>+Description:   Write any value to it, This control file enables the break signal.</div><div class='add'>+               This file is write only.</div><div class='add'>+               Example:</div><div class='add'>+               # echo &lt;any value&gt; &gt; /sys/devices/platform/amba_pl/44a10000.tmr_manager/dis_block_break</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-driver-zynqmp-fpga b/Documentation/ABI/testing/sysfs-driver-zynqmp-fpga<br/>new file mode 100644<br/>index 000000000000..8f93d27b6d91<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-driver-zynqmp-fpga?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-driver-zynqmp-fpga</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+What:		/sys/bus/platform/drivers/zynqmp_fpga_manager/firmware:zynqmp-firmware:pcap/status</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.4</div><div class='add'>+Contact:	Nava kishore Manne &lt;nava.kishore.manne@amd.com&gt;</div><div class='add'>+Description:	(RO) Read fpga status.</div><div class='add'>+		Read returns a hexadecimal value that tells the current status</div><div class='add'>+		of the FPGA device. Each bit position in the status value is</div><div class='add'>+		described Below(see ug570 chapter 9).</div><div class='add'>+		https://docs.xilinx.com/v/u/en-US/ug570-ultrascale-configuration</div><div class='add'>+</div><div class='add'>+		======================  ==============================================</div><div class='add'>+		BIT(0)			0: No CRC error</div><div class='add'>+					1: CRC error</div><div class='add'>+</div><div class='add'>+		BIT(1)			0: Decryptor security not set</div><div class='add'>+					1: Decryptor security set</div><div class='add'>+</div><div class='add'>+		BIT(2)			0: MMCMs/PLLs are not locked</div><div class='add'>+					1: MMCMs/PLLs are locked</div><div class='add'>+</div><div class='add'>+		BIT(3)			0: DCI not matched</div><div class='add'>+					1: DCI matched</div><div class='add'>+</div><div class='add'>+		BIT(4)			0: Start-up sequence has not finished</div><div class='add'>+					1: Start-up sequence has finished</div><div class='add'>+</div><div class='add'>+		BIT(5)			0: All I/Os are placed in High-Z state</div><div class='add'>+					1: All I/Os behave as configured</div><div class='add'>+</div><div class='add'>+		BIT(6)			0: Flip-flops and block RAM are write disabled</div><div class='add'>+					1: Flip-flops and block RAM are write enabled</div><div class='add'>+</div><div class='add'>+		BIT(7)			0: GHIGH_B_STATUS asserted</div><div class='add'>+					1: GHIGH_B_STATUS deasserted</div><div class='add'>+</div><div class='add'>+		BIT(8) to BIT(10)	Status of the mode pins</div><div class='add'>+</div><div class='add'>+		BIT(11)			0: Initialization has not finished</div><div class='add'>+					1: Initialization finished</div><div class='add'>+</div><div class='add'>+		BIT(12)			Value on INIT_B_PIN pin</div><div class='add'>+</div><div class='add'>+		BIT(13)			0: Signal not released</div><div class='add'>+					1: Signal released</div><div class='add'>+</div><div class='add'>+		BIT(14)			Value on DONE_PIN pin.</div><div class='add'>+</div><div class='add'>+		BIT(15)			0: No IDCODE_ERROR</div><div class='add'>+					1: IDCODE_ERROR</div><div class='add'>+</div><div class='add'>+		BIT(16)			0: No SECURITY_ERROR</div><div class='add'>+					1: SECURITY_ERROR</div><div class='add'>+</div><div class='add'>+		BIT(17)			System Monitor over-temperature if set</div><div class='add'>+</div><div class='add'>+		BIT(18) to BIT(20)	Start-up state machine (0 to 7)</div><div class='add'>+					Phase 0 = 000</div><div class='add'>+					Phase 1 = 001</div><div class='add'>+					Phase 2 = 011</div><div class='add'>+					Phase 3 = 010</div><div class='add'>+					Phase 4 = 110</div><div class='add'>+					Phase 5 = 111</div><div class='add'>+					Phase 6 = 101</div><div class='add'>+					Phase 7 = 100</div><div class='add'>+</div><div class='add'>+		BIT(25) to BIT(26)	Indicates the detected bus width</div><div class='add'>+					00 = x1</div><div class='add'>+					01 = x8</div><div class='add'>+					10 = x16</div><div class='add'>+					11 = x32</div><div class='add'>+		======================  ==============================================</div><div class='add'>+</div><div class='add'>+		The other bits are reserved.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg b/Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg<br/>index ee0d6dbc810e..54d1bfd0db12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-firmware-qemu_fw_cfg</a></div><div class='hunk'>@@ -12,8 +12,9 @@ Description:</div><div class='ctx'> 		configuration data to the guest userspace.</div><div class='ctx'> </div><div class='ctx'> 		The authoritative guest-side hardware interface documentation</div><div class='del'>-		to the fw_cfg device can be found in "docs/specs/fw_cfg.txt"</div><div class='del'>-		in the QEMU source tree.</div><div class='add'>+		to the fw_cfg device can be found in "docs/specs/fw_cfg.rst"</div><div class='add'>+		in the QEMU source tree, or online at:</div><div class='add'>+		https://qemu-project.gitlab.io/qemu/specs/fw_cfg.html</div><div class='ctx'> </div><div class='ctx'> 		**SysFS fw_cfg Interface**</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-fs-erofs b/Documentation/ABI/testing/sysfs-fs-erofs<br/>index 05482374a741..284224d1b56f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-fs-erofs?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-fs-erofs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-fs-erofs?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-fs-erofs</a></div><div class='hunk'>@@ -4,13 +4,15 @@ Contact:	"Huang Jianan" &lt;huangjianan@oppo.com&gt;</div><div class='ctx'> Description:	Shows all enabled kernel features.</div><div class='ctx'> 		Supported features:</div><div class='ctx'> 		zero_padding, compr_cfgs, big_pcluster, chunked_file,</div><div class='del'>-		device_table, compr_head2, sb_chksum.</div><div class='add'>+		device_table, compr_head2, sb_chksum, ztailpacking,</div><div class='add'>+		dedupe, fragments.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/fs/erofs/&lt;disk&gt;/sync_decompress</div><div class='ctx'> Date:		November 2021</div><div class='ctx'> Contact:	"Huang Jianan" &lt;huangjianan@oppo.com&gt;</div><div class='del'>-Description:	Control strategy of sync decompression</div><div class='add'>+Description:	Control strategy of sync decompression:</div><div class='add'>+</div><div class='ctx'> 		- 0 (default, auto): enable for readpage, and enable for</div><div class='del'>-				     readahead on atomic contexts only,</div><div class='add'>+		  readahead on atomic contexts only.</div><div class='ctx'> 		- 1 (force on): enable for readpage and readahead.</div><div class='ctx'> 		- 2 (force off): disable for all situations.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs<br/>index 9b583dd0298b..8140fc98f5ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-fs-f2fs?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-fs-f2fs</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-fs-f2fs?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-fs-f2fs</a></div><div class='hunk'>@@ -49,16 +49,23 @@ Contact:	"Jaegeuk Kim" &lt;jaegeuk.kim@samsung.com&gt;</div><div class='ctx'> Description:	Controls the in-place-update policy.</div><div class='ctx'> 		updates in f2fs. User can set:</div><div class='ctx'> </div><div class='del'>-		====  =================</div><div class='del'>-		0x01  F2FS_IPU_FORCE</div><div class='del'>-		0x02  F2FS_IPU_SSR</div><div class='del'>-		0x04  F2FS_IPU_UTIL</div><div class='del'>-		0x08  F2FS_IPU_SSR_UTIL</div><div class='del'>-		0x10  F2FS_IPU_FSYNC</div><div class='del'>-		0x20  F2FS_IPU_ASYNC</div><div class='del'>-		0x40  F2FS_IPU_NOCACHE</div><div class='del'>-		0x80  F2FS_IPU_HONOR_OPU_WRITE</div><div class='del'>-		====  =================</div><div class='add'>+		===== =============== ===================================================</div><div class='add'>+		value policy          description</div><div class='add'>+		0x00  DISABLE         disable IPU(=default option in LFS mode)</div><div class='add'>+		0x01  FORCE           all the time</div><div class='add'>+		0x02  SSR             if SSR mode is activated</div><div class='add'>+		0x04  UTIL            if FS utilization is over threashold</div><div class='add'>+		0x08  SSR_UTIL        if SSR mode is activated and FS utilization is over</div><div class='add'>+		                      threashold</div><div class='add'>+		0x10  FSYNC           activated in fsync path only for high performance</div><div class='add'>+		                      flash storages. IPU will be triggered only if the</div><div class='add'>+		                      # of dirty pages over min_fsync_blocks.</div><div class='add'>+		                      (=default option)</div><div class='add'>+		0x20  ASYNC           do IPU given by asynchronous write requests</div><div class='add'>+		0x40  NOCACHE         disable IPU bio cache</div><div class='add'>+		0x80  HONOR_OPU_WRITE use OPU write prior to IPU write if inode has</div><div class='add'>+		                      FI_OPU_WRITE flag</div><div class='add'>+		===== =============== ===================================================</div><div class='ctx'> </div><div class='ctx'> 		Refer segment.h for details.</div><div class='ctx'> </div><div class='hunk'>@@ -99,6 +106,12 @@ Description:	Controls the issue rate of discard commands that consist of small</div><div class='ctx'> 		checkpoint is triggered, and issued during the checkpoint.</div><div class='ctx'> 		By default, it is disabled with 0.</div><div class='ctx'> </div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/max_ordered_discard</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	"Yangtao Li" &lt;frank.li@vivo.com&gt;</div><div class='add'>+Description:	Controls the maximum ordered discard, the unit size is one block(4KB).</div><div class='add'>+		Set it to 16 by default.</div><div class='add'>+</div><div class='ctx'> What:		/sys/fs/f2fs/&lt;disk&gt;/max_discard_request</div><div class='ctx'> Date:		December 2021</div><div class='ctx'> Contact:	"Konstantin Vyshetsky" &lt;vkon@google.com&gt;</div><div class='hunk'>@@ -132,7 +145,8 @@ Contact:	"Chao Yu" &lt;yuchao0@huawei.com&gt;</div><div class='ctx'> Description:	Controls discard granularity of inner discard thread. Inner thread</div><div class='ctx'> 		will not issue discards with size that is smaller than granularity.</div><div class='ctx'> 		The unit size is one block(4KB), now only support configuring</div><div class='del'>-		in range of [1, 512]. Default value is 4(=16KB).</div><div class='add'>+		in range of [1, 512]. Default value is 16.</div><div class='add'>+		For small devices, default value is 1.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/fs/f2fs/&lt;disk&gt;/umount_discard_timeout</div><div class='ctx'> Date:		January 2019</div><div class='hunk'>@@ -176,12 +190,6 @@ Description:	Controls the memory footprint used by free nids and cached</div><div class='ctx'> 		nat entries. By default, 1 is set, which indicates</div><div class='ctx'> 		10 MB / 1 GB RAM.</div><div class='ctx'> </div><div class='del'>-What:		/sys/fs/f2fs/&lt;disk&gt;/batched_trim_sections</div><div class='del'>-Date:		February 2015</div><div class='del'>-Contact:	"Jaegeuk Kim" &lt;jaegeuk@kernel.org&gt;</div><div class='del'>-Description:	Controls the trimming rate in batch mode.</div><div class='del'>-		&lt;deprecated&gt;</div><div class='del'>-</div><div class='ctx'> What:		/sys/fs/f2fs/&lt;disk&gt;/cp_interval</div><div class='ctx'> Date:		October 2015</div><div class='ctx'> Contact:	"Jaegeuk Kim" &lt;jaegeuk@kernel.org&gt;</div><div class='hunk'>@@ -235,7 +243,7 @@ Description:	Shows total written kbytes issued to disk.</div><div class='ctx'> What:		/sys/fs/f2fs/&lt;disk&gt;/features</div><div class='ctx'> Date:		July 2017</div><div class='ctx'> Contact:	"Jaegeuk Kim" &lt;jaegeuk@kernel.org&gt;</div><div class='del'>-Description:	&lt;deprecated: should use /sys/fs/f2fs/&lt;disk&gt;/feature_list/</div><div class='add'>+Description:	&lt;deprecated: should use /sys/fs/f2fs/&lt;disk&gt;/feature_list/&gt;</div><div class='ctx'> 		Shows all enabled features in current device.</div><div class='ctx'> 		Supported features:</div><div class='ctx'> 		encryption, blkzoned, extra_attr, projquota, inode_checksum,</div><div class='hunk'>@@ -466,6 +474,30 @@ Description:	Show status of f2fs superblock in real time.</div><div class='ctx'> 		0x4000 SBI_IS_FREEZING       freefs is in process</div><div class='ctx'> 		====== ===================== =================================</div><div class='ctx'> </div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/stat/cp_status</div><div class='add'>+Date:		September 2022</div><div class='add'>+Contact:	"Chao Yu" &lt;chao.yu@oppo.com&gt;</div><div class='add'>+Description:	Show status of f2fs checkpoint in real time.</div><div class='add'>+</div><div class='add'>+		=============================== ==============================</div><div class='add'>+		cp flag				value</div><div class='add'>+		CP_UMOUNT_FLAG			0x00000001</div><div class='add'>+		CP_ORPHAN_PRESENT_FLAG		0x00000002</div><div class='add'>+		CP_COMPACT_SUM_FLAG		0x00000004</div><div class='add'>+		CP_ERROR_FLAG			0x00000008</div><div class='add'>+		CP_FSCK_FLAG			0x00000010</div><div class='add'>+		CP_FASTBOOT_FLAG		0x00000020</div><div class='add'>+		CP_CRC_RECOVERY_FLAG		0x00000040</div><div class='add'>+		CP_NAT_BITS_FLAG		0x00000080</div><div class='add'>+		CP_TRIMMED_FLAG			0x00000100</div><div class='add'>+		CP_NOCRC_RECOVERY_FLAG		0x00000200</div><div class='add'>+		CP_LARGE_NAT_BITMAP_FLAG	0x00000400</div><div class='add'>+		CP_QUOTA_NEED_FSCK_FLAG		0x00000800</div><div class='add'>+		CP_DISABLED_FLAG		0x00001000</div><div class='add'>+		CP_DISABLED_QUICK_FLAG		0x00002000</div><div class='add'>+		CP_RESIZEFS_FLAG		0x00004000</div><div class='add'>+		=============================== ==============================</div><div class='add'>+</div><div class='ctx'> What:		/sys/fs/f2fs/&lt;disk&gt;/ckpt_thread_ioprio</div><div class='ctx'> Date:		January 2021</div><div class='ctx'> Contact:	"Daeho Jeong" &lt;daehojeong@google.com&gt;</div><div class='hunk'>@@ -568,10 +600,10 @@ Description:	With "mode=fragment:block" mount options, we can scatter block allo</div><div class='ctx'> 		in the length of 1..&lt;max_fragment_hole&gt; by turns. This value can be set</div><div class='ctx'> 		between 1..512 and the default value is 4.</div><div class='ctx'> </div><div class='del'>-What:		/sys/fs/f2fs/&lt;disk&gt;/gc_urgent_high_remaining</div><div class='del'>-Date:		December 2021</div><div class='del'>-Contact:	"Daeho Jeong" &lt;daehojeong@google.com&gt;</div><div class='del'>-Description:	You can set the trial count limit for GC urgent high mode with this value.</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/gc_remaining_trials</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	"Yangtao Li" &lt;frank.li@vivo.com&gt;</div><div class='add'>+Description:	You can set the trial count limit for GC urgent and idle mode with this value.</div><div class='ctx'> 		If GC thread gets to the limit, the mode will turn back to GC normal mode.</div><div class='ctx'> 		By default, the value is zero, which means there is no limit like before.</div><div class='ctx'> </div><div class='hunk'>@@ -580,3 +612,131 @@ Date:		January 2022</div><div class='ctx'> Contact:	"Jaegeuk Kim" &lt;jaegeuk@kernel.org&gt;</div><div class='ctx'> Description:	Controls max # of node block writes to be used for roll forward</div><div class='ctx'> 		recovery. This can limit the roll forward recovery time.</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/unusable_blocks_per_sec</div><div class='add'>+Date:		June 2022</div><div class='add'>+Contact:	"Jaegeuk Kim" &lt;jaegeuk@kernel.org&gt;</div><div class='add'>+Description:	Shows the number of unusable blocks in a section which was defined by</div><div class='add'>+		the zone capacity reported by underlying zoned device.</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/current_atomic_write</div><div class='add'>+Date:		July 2022</div><div class='add'>+Contact:	"Daeho Jeong" &lt;daehojeong@google.com&gt;</div><div class='add'>+Description:	Show the total current atomic write block count, which is not committed yet.</div><div class='add'>+		This is a read-only entry.</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/peak_atomic_write</div><div class='add'>+Date:		July 2022</div><div class='add'>+Contact:	"Daeho Jeong" &lt;daehojeong@google.com&gt;</div><div class='add'>+Description:	Show the peak value of total current atomic write block count after boot.</div><div class='add'>+		If you write "0" here, you can initialize to "0".</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/committed_atomic_block</div><div class='add'>+Date:		July 2022</div><div class='add'>+Contact:	"Daeho Jeong" &lt;daehojeong@google.com&gt;</div><div class='add'>+Description:	Show the accumulated total committed atomic write block count after boot.</div><div class='add'>+		If you write "0" here, you can initialize to "0".</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/revoked_atomic_block</div><div class='add'>+Date:		July 2022</div><div class='add'>+Contact:	"Daeho Jeong" &lt;daehojeong@google.com&gt;</div><div class='add'>+Description:	Show the accumulated total revoked atomic write block count after boot.</div><div class='add'>+		If you write "0" here, you can initialize to "0".</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/gc_mode</div><div class='add'>+Date:		October 2022</div><div class='add'>+Contact:	"Yangtao Li" &lt;frank.li@vivo.com&gt;</div><div class='add'>+Description:	Show the current gc_mode as a string.</div><div class='add'>+		This is a read-only entry.</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/discard_urgent_util</div><div class='add'>+Date:		November 2022</div><div class='add'>+Contact:	"Yangtao Li" &lt;frank.li@vivo.com&gt;</div><div class='add'>+Description:	When space utilization exceeds this, do background DISCARD aggressively.</div><div class='add'>+		Does DISCARD forcibly in a period of given min_discard_issue_time when the number</div><div class='add'>+		of discards is not 0 and set discard granularity to 1.</div><div class='add'>+		Default: 80</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/hot_data_age_threshold</div><div class='add'>+Date:		November 2022</div><div class='add'>+Contact:	"Ping Xiong" &lt;xiongping1@xiaomi.com&gt;</div><div class='add'>+Description:	When DATA SEPARATION is on, it controls the age threshold to indicate</div><div class='add'>+		the data blocks as hot. By default it was initialized as 262144 blocks</div><div class='add'>+		(equals to 1GB).</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/warm_data_age_threshold</div><div class='add'>+Date:		November 2022</div><div class='add'>+Contact:	"Ping Xiong" &lt;xiongping1@xiaomi.com&gt;</div><div class='add'>+Description:	When DATA SEPARATION is on, it controls the age threshold to indicate</div><div class='add'>+		the data blocks as warm. By default it was initialized as 2621440 blocks</div><div class='add'>+		(equals to 10GB).</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/fault_rate</div><div class='add'>+Date:		May 2016</div><div class='add'>+Contact:	"Sheng Yong" &lt;shengyong@oppo.com&gt;</div><div class='add'>+Contact:	"Chao Yu" &lt;chao@kernel.org&gt;</div><div class='add'>+Description:	Enable fault injection in all supported types with</div><div class='add'>+		specified injection rate.</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/fault_type</div><div class='add'>+Date:		May 2016</div><div class='add'>+Contact:	"Sheng Yong" &lt;shengyong@oppo.com&gt;</div><div class='add'>+Contact:	"Chao Yu" &lt;chao@kernel.org&gt;</div><div class='add'>+Description:	Support configuring fault injection type, should be</div><div class='add'>+		enabled with fault_injection option, fault type value</div><div class='add'>+		is shown below, it supports single or combined type.</div><div class='add'>+</div><div class='add'>+		===================      ===========</div><div class='add'>+		Type_Name                Type_Value</div><div class='add'>+		===================      ===========</div><div class='add'>+		FAULT_KMALLOC            0x000000001</div><div class='add'>+		FAULT_KVMALLOC           0x000000002</div><div class='add'>+		FAULT_PAGE_ALLOC         0x000000004</div><div class='add'>+		FAULT_PAGE_GET           0x000000008</div><div class='add'>+		FAULT_ALLOC_BIO          0x000000010 (obsolete)</div><div class='add'>+		FAULT_ALLOC_NID          0x000000020</div><div class='add'>+		FAULT_ORPHAN             0x000000040</div><div class='add'>+		FAULT_BLOCK              0x000000080</div><div class='add'>+		FAULT_DIR_DEPTH          0x000000100</div><div class='add'>+		FAULT_EVICT_INODE        0x000000200</div><div class='add'>+		FAULT_TRUNCATE           0x000000400</div><div class='add'>+		FAULT_READ_IO            0x000000800</div><div class='add'>+		FAULT_CHECKPOINT         0x000001000</div><div class='add'>+		FAULT_DISCARD            0x000002000</div><div class='add'>+		FAULT_WRITE_IO           0x000004000</div><div class='add'>+		FAULT_SLAB_ALLOC         0x000008000</div><div class='add'>+		FAULT_DQUOT_INIT         0x000010000</div><div class='add'>+		FAULT_LOCK_OP            0x000020000</div><div class='add'>+		FAULT_BLKADDR            0x000040000</div><div class='add'>+		===================      ===========</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/discard_io_aware_gran</div><div class='add'>+Date:		January 2023</div><div class='add'>+Contact:	"Yangtao Li" &lt;frank.li@vivo.com&gt;</div><div class='add'>+Description:	Controls background discard granularity of inner discard thread</div><div class='add'>+		when is not in idle. Inner thread will not issue discards with size that</div><div class='add'>+		is smaller than granularity. The unit size is one block(4KB), now only</div><div class='add'>+		support configuring in range of [0, 512].</div><div class='add'>+		Default: 512</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/last_age_weight</div><div class='add'>+Date:		January 2023</div><div class='add'>+Contact:	"Ping Xiong" &lt;xiongping1@xiaomi.com&gt;</div><div class='add'>+Description:	When DATA SEPARATION is on, it controls the weight of last data block age.</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/compress_watermark</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	"Yangtao Li" &lt;frank.li@vivo.com&gt;</div><div class='add'>+Description:	When compress cache is on, it controls free memory watermark</div><div class='add'>+		in order to limit caching compress page. If free memory is lower</div><div class='add'>+		than watermark, then deny caching compress page. The value should be in</div><div class='add'>+		range of (0, 100], by default it was initialized as 20(%).</div><div class='add'>+</div><div class='add'>+What:		/sys/fs/f2fs/&lt;disk&gt;/compress_percent</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	"Yangtao Li" &lt;frank.li@vivo.com&gt;</div><div class='add'>+Description:	When compress cache is on, it controls cached page</div><div class='add'>+		percent(compress pages / free_ram) in order to limit caching compress page.</div><div class='add'>+		If cached page percent exceed threshold, then deny caching compress page.</div><div class='add'>+		The value should be in range of (0, 100], by default it was initialized</div><div class='add'>+		as 20(%).</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-address_bits b/Documentation/ABI/testing/sysfs-kernel-address_bits<br/>new file mode 100644<br/>index 000000000000..5d09ff84d4d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-address_bits?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-address_bits</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+What:		/sys/kernel/address_bit</div><div class='add'>+Date:		May 2023</div><div class='add'>+KernelVersion:	6.3</div><div class='add'>+Contact:	Thomas Weißschuh &lt;linux@weissschuh.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		The address size of the running kernel in bits.</div><div class='add'>+</div><div class='add'>+		Access: Read</div><div class='add'>+</div><div class='add'>+Users:		util-linux</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-cpu_byteorder b/Documentation/ABI/testing/sysfs-kernel-cpu_byteorder<br/>new file mode 100644<br/>index 000000000000..f0e6ac1b5356<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-cpu_byteorder?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-cpu_byteorder</a></div><div class='hunk'>@@ -0,0 +1,12 @@</div><div class='add'>+What:		/sys/kernel/cpu_byteorder</div><div class='add'>+Date:		February 2023</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	Thomas Weißschuh &lt;linux@weissschuh.net&gt;</div><div class='add'>+Description:</div><div class='add'>+		The endianness of the running kernel.</div><div class='add'>+</div><div class='add'>+		Access: Read</div><div class='add'>+</div><div class='add'>+		Valid values:</div><div class='add'>+			"little", "big"</div><div class='add'>+Users:		util-linux</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-iommu_groups b/Documentation/ABI/testing/sysfs-kernel-iommu_groups<br/>index b15af6a5bc08..a42d4383d999 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-iommu_groups?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-iommu_groups</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-iommu_groups?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-iommu_groups</a></div><div class='hunk'>@@ -53,7 +53,6 @@ Description:	/sys/kernel/iommu_groups/&lt;grp_id&gt;/type shows the type of default</div><div class='ctx'> </div><div class='ctx'> 		The default domain type of a group may be modified only when</div><div class='ctx'> </div><div class='del'>-		- The group has only one device.</div><div class='ctx'> 		- The device in the group is not bound to any device driver.</div><div class='ctx'> 		  So, the users must unbind the appropriate driver before</div><div class='ctx'> 		  changing the default domain type.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-livepatch b/Documentation/ABI/testing/sysfs-kernel-livepatch<br/>index bea7bd5a1d5f..a5df9b4910dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-livepatch?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-livepatch</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-livepatch?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-livepatch</a></div><div class='hunk'>@@ -55,6 +55,14 @@ Description:</div><div class='ctx'> 		The object directory contains subdirectories for each function</div><div class='ctx'> 		that is patched within the object.</div><div class='ctx'> </div><div class='add'>+What:		/sys/kernel/livepatch/&lt;patch&gt;/&lt;object&gt;/patched</div><div class='add'>+Date:		August 2022</div><div class='add'>+KernelVersion:	6.1.0</div><div class='add'>+Contact:	live-patching@vger.kernel.org</div><div class='add'>+Description:</div><div class='add'>+		An attribute which indicates whether the object is currently</div><div class='add'>+		patched.</div><div class='add'>+</div><div class='ctx'> What:		/sys/kernel/livepatch/&lt;patch&gt;/&lt;object&gt;/&lt;function,sympos&gt;</div><div class='ctx'> Date:		Nov 2014</div><div class='ctx'> KernelVersion:	3.19.0</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-damon b/Documentation/ABI/testing/sysfs-kernel-mm-damon<br/>index 9e282065cbcf..2744f21b5a6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-mm-damon?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-mm-damon</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-mm-damon?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-mm-damon</a></div><div class='hunk'>@@ -23,9 +23,14 @@ Date:		Mar 2022</div><div class='ctx'> Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='ctx'> Description:	Writing 'on' or 'off' to this file makes the kdamond starts or</div><div class='ctx'> 		stops, respectively.  Reading the file returns the keywords</div><div class='del'>-		based on the current status.  Writing 'update_schemes_stats' to</div><div class='del'>-		the file updates contents of schemes stats files of the</div><div class='del'>-		kdamond.</div><div class='add'>+		based on the current status.  Writing 'commit' to this file</div><div class='add'>+		makes the kdamond reads the user inputs in the sysfs files</div><div class='add'>+		except 'state' again.  Writing 'update_schemes_stats' to the</div><div class='add'>+		file updates contents of schemes stats files of the kdamond.</div><div class='add'>+		Writing 'update_schemes_tried_regions' to the file updates</div><div class='add'>+		contents of 'tried_regions' directory of every scheme directory</div><div class='add'>+		of this kdamond.  Writing 'clear_schemes_tried_regions' to the</div><div class='add'>+		file removes contents of the 'tried_regions' directory.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/pid</div><div class='ctx'> Date:		Mar 2022</div><div class='hunk'>@@ -40,14 +45,24 @@ Description:	Writing a number 'N' to this file creates the number of</div><div class='ctx'> 		directories for controlling each DAMON context named '0' to</div><div class='ctx'> 		'N-1' under the contexts/ directory.</div><div class='ctx'> </div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/avail_operations</div><div class='add'>+Date:		Apr 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Reading this file returns the available monitoring operations</div><div class='add'>+		sets on the currently running kernel.</div><div class='add'>+</div><div class='ctx'> What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/operations</div><div class='ctx'> Date:		Mar 2022</div><div class='ctx'> Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='ctx'> Description:	Writing a keyword for a monitoring operations set ('vaddr' for</div><div class='del'>-		virtual address spaces monitoring, and 'paddr' for the physical</div><div class='del'>-		address space monitoring) to this file makes the context to use</div><div class='del'>-		the operations set.  Reading the file returns the keyword for</div><div class='del'>-		the operations set the context is set to use.</div><div class='add'>+		virtual address spaces monitoring, 'fvaddr' for fixed virtual</div><div class='add'>+		address ranges monitoring, and 'paddr' for the physical address</div><div class='add'>+		space monitoring) to this file makes the context to use the</div><div class='add'>+		operations set.  Reading the file returns the keyword for the</div><div class='add'>+		operations set the context is set to use.</div><div class='add'>+</div><div class='add'>+		Note that only the operations sets that listed in</div><div class='add'>+		'avail_operations' file are valid inputs.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/monitoring_attrs/intervals/sample_us</div><div class='ctx'> Date:		Mar 2022</div><div class='hunk'>@@ -243,6 +258,35 @@ Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='ctx'> Description:	Writing to and reading from this file sets and gets the low</div><div class='ctx'> 		watermark of the scheme in permil.</div><div class='ctx'> </div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/filters/nr_filters</div><div class='add'>+Date:		Dec 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Writing a number 'N' to this file creates the number of</div><div class='add'>+		directories for setting filters of the scheme named '0' to</div><div class='add'>+		'N-1' under the filters/ directory.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/filters/&lt;F&gt;/type</div><div class='add'>+Date:		Dec 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Writing to and reading from this file sets and gets the type of</div><div class='add'>+		the memory of the interest.  'anon' for anonymous pages, or</div><div class='add'>+		'memcg' for specific memory cgroup can be written and read.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/filters/&lt;F&gt;/memcg_path</div><div class='add'>+Date:		Dec 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	If 'memcg' is written to the 'type' file, writing to and</div><div class='add'>+		reading from this file sets and gets the path to the memory</div><div class='add'>+		cgroup of the interest.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/filters/&lt;F&gt;/matching</div><div class='add'>+Date:		Dec 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Writing 'Y' or 'N' to this file sets whether to filter out</div><div class='add'>+		pages that do or do not match to the 'type' and 'memcg_path',</div><div class='add'>+		respectively.  Filter out means the action of the scheme will</div><div class='add'>+		not be applied to.</div><div class='add'>+</div><div class='ctx'> What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/stats/nr_tried</div><div class='ctx'> Date:		Mar 2022</div><div class='ctx'> Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='hunk'>@@ -272,3 +316,31 @@ Date:		Mar 2022</div><div class='ctx'> Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='ctx'> Description:	Reading this file returns the number of the exceed events of</div><div class='ctx'> 		the scheme's quotas.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/tried_regions/&lt;R&gt;/start</div><div class='add'>+Date:		Oct 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Reading this file returns the start address of a memory region</div><div class='add'>+		that corresponding DAMON-based Operation Scheme's action has</div><div class='add'>+		tried to be applied.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/tried_regions/&lt;R&gt;/end</div><div class='add'>+Date:		Oct 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Reading this file returns the end address of a memory region</div><div class='add'>+		that corresponding DAMON-based Operation Scheme's action has</div><div class='add'>+		tried to be applied.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/tried_regions/&lt;R&gt;/nr_accesses</div><div class='add'>+Date:		Oct 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Reading this file returns the 'nr_accesses' of a memory region</div><div class='add'>+		that corresponding DAMON-based Operation Scheme's action has</div><div class='add'>+		tried to be applied.</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/damon/admin/kdamonds/&lt;K&gt;/contexts/&lt;C&gt;/schemes/&lt;S&gt;/tried_regions/&lt;R&gt;/age</div><div class='add'>+Date:		Oct 2022</div><div class='add'>+Contact:	SeongJae Park &lt;sj@kernel.org&gt;</div><div class='add'>+Description:	Reading this file returns the 'age' of a memory region that</div><div class='add'>+		corresponding DAMON-based Operation Scheme's action has tried</div><div class='add'>+		to be applied.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-ksm b/Documentation/ABI/testing/sysfs-kernel-mm-ksm<br/>index 1c9bed5595f5..6041a025b65a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-mm-ksm?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-mm-ksm</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-mm-ksm?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-mm-ksm</a></div><div class='hunk'>@@ -41,7 +41,7 @@ Description:	Kernel Samepage Merging daemon sysfs interface</div><div class='ctx'> 		sleep_millisecs: how many milliseconds ksm should sleep between</div><div class='ctx'> 		scans.</div><div class='ctx'> </div><div class='del'>-		See Documentation/vm/ksm.rst for more information.</div><div class='add'>+		See Documentation/mm/ksm.rst for more information.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/mm/ksm/merge_across_nodes</div><div class='ctx'> Date:		January 2013</div><div class='hunk'>@@ -51,3 +51,11 @@ Description:	Control merging pages across different NUMA nodes.</div><div class='ctx'> </div><div class='ctx'> 		When it is set to 0 only pages from the same node are merged,</div><div class='ctx'> 		otherwise pages from all nodes can be merged together (default).</div><div class='add'>+</div><div class='add'>+What:		/sys/kernel/mm/ksm/general_profit</div><div class='add'>+Date:		April 2023</div><div class='add'>+KernelVersion:  6.4</div><div class='add'>+Contact:	Linux memory management mailing list &lt;linux-mm@kvack.org&gt;</div><div class='add'>+Description:	Measure how effective KSM is.</div><div class='add'>+		general_profit: how effective is KSM. The formula for the</div><div class='add'>+		calculation is in Documentation/admin-guide/mm/ksm.rst.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-mm-memory-tiers b/Documentation/ABI/testing/sysfs-kernel-mm-memory-tiers<br/>new file mode 100644<br/>index 000000000000..721a05b90109<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-mm-memory-tiers?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-mm-memory-tiers</a></div><div class='hunk'>@@ -0,0 +1,25 @@</div><div class='add'>+What:		/sys/devices/virtual/memory_tiering/</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Linux memory management mailing list &lt;linux-mm@kvack.org&gt;</div><div class='add'>+Description:	A collection of all the memory tiers allocated.</div><div class='add'>+</div><div class='add'>+		Individual memory tier details are contained in subdirectories</div><div class='add'>+		named by the abstract distance of the memory tier.</div><div class='add'>+</div><div class='add'>+		/sys/devices/virtual/memory_tiering/memory_tierN/</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/memory_tiering/memory_tierN/</div><div class='add'>+		/sys/devices/virtual/memory_tiering/memory_tierN/nodelist</div><div class='add'>+Date:		August 2022</div><div class='add'>+Contact:	Linux memory management mailing list &lt;linux-mm@kvack.org&gt;</div><div class='add'>+Description:	Directory with details of a specific memory tier</div><div class='add'>+</div><div class='add'>+		This is the directory containing information about a particular</div><div class='add'>+		memory tier, memtierN, where N is derived based on abstract distance.</div><div class='add'>+</div><div class='add'>+		A smaller value of N implies a higher (faster) memory tier in the</div><div class='add'>+		hierarchy.</div><div class='add'>+</div><div class='add'>+		nodelist: NUMA nodes that are part of this memory tier.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-oops_count b/Documentation/ABI/testing/sysfs-kernel-oops_count<br/>new file mode 100644<br/>index 000000000000..156cca9dbc96<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-oops_count?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-oops_count</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+What:		/sys/kernel/oops_count</div><div class='add'>+Date:		November 2022</div><div class='add'>+KernelVersion:	6.2.0</div><div class='add'>+Contact:	Linux Kernel Hardening List &lt;linux-hardening@vger.kernel.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows how many times the system has Oopsed since last boot.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-slab b/Documentation/ABI/testing/sysfs-kernel-slab<br/>index c440f4946e12..cd5fb8fa3ddf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-slab?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-kernel-slab</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-slab?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-slab</a></div><div class='hunk'>@@ -37,7 +37,7 @@ Description:</div><div class='ctx'> 		The alloc_calls file is read-only and lists the kernel code</div><div class='ctx'> 		locations from which allocations for this cache were performed.</div><div class='ctx'> 		The alloc_calls file only contains information if debugging is</div><div class='del'>-		enabled for that cache (see Documentation/vm/slub.rst).</div><div class='add'>+		enabled for that cache (see Documentation/mm/slub.rst).</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/slab/&lt;cache&gt;/alloc_fastpath</div><div class='ctx'> Date:		February 2008</div><div class='hunk'>@@ -219,7 +219,7 @@ Contact:	Pekka Enberg &lt;penberg@cs.helsinki.fi&gt;,</div><div class='ctx'> Description:</div><div class='ctx'> 		The free_calls file is read-only and lists the locations of</div><div class='ctx'> 		object frees if slab debugging is enabled (see</div><div class='del'>-		Documentation/vm/slub.rst).</div><div class='add'>+		Documentation/mm/slub.rst).</div><div class='ctx'> </div><div class='ctx'> What:		/sys/kernel/slab/&lt;cache&gt;/free_fastpath</div><div class='ctx'> Date:		February 2008</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-kernel-warn_count b/Documentation/ABI/testing/sysfs-kernel-warn_count<br/>new file mode 100644<br/>index 000000000000..90a029813717<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-kernel-warn_count?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-kernel-warn_count</a></div><div class='hunk'>@@ -0,0 +1,6 @@</div><div class='add'>+What:		/sys/kernel/warn_count</div><div class='add'>+Date:		November 2022</div><div class='add'>+KernelVersion:	6.2.0</div><div class='add'>+Contact:	Linux Kernel Hardening List &lt;linux-hardening@vger.kernel.org&gt;</div><div class='add'>+Description:</div><div class='add'>+		Shows how many times the system has Warned since last boot.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-asus-wmi b/Documentation/ABI/testing/sysfs-platform-asus-wmi<br/>index 04885738cf15..a77a004a1baa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-asus-wmi?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-platform-asus-wmi</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-asus-wmi?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-platform-asus-wmi</a></div><div class='hunk'>@@ -57,3 +57,44 @@ Description:</div><div class='ctx'> 			* 0 - default,</div><div class='ctx'> 			* 1 - overboost,</div><div class='ctx'> 			* 2 - silent</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/&lt;platform&gt;/gpu_mux_mode</div><div class='add'>+Date:		Aug 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	"Luke Jones" &lt;luke@ljones.dev&gt;</div><div class='add'>+Description:</div><div class='add'>+		Switch the GPU hardware MUX mode. Laptops with this feature can</div><div class='add'>+		can be toggled to boot with only the dGPU (discrete mode) or in</div><div class='add'>+		standard Optimus/Hybrid mode. On switch a reboot is required:</div><div class='add'>+</div><div class='add'>+			* 0 - Discrete GPU,</div><div class='add'>+			* 1 - Optimus/Hybrid,</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/&lt;platform&gt;/dgpu_disable</div><div class='add'>+Date:		Aug 2022</div><div class='add'>+KernelVersion:	5.17</div><div class='add'>+Contact:	"Luke Jones" &lt;luke@ljones.dev&gt;</div><div class='add'>+Description:</div><div class='add'>+		Disable discrete GPU:</div><div class='add'>+			* 0 - Enable dGPU,</div><div class='add'>+			* 1 - Disable dGPU</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/&lt;platform&gt;/egpu_enable</div><div class='add'>+Date:		Aug 2022</div><div class='add'>+KernelVersion:	5.17</div><div class='add'>+Contact:	"Luke Jones" &lt;luke@ljones.dev&gt;</div><div class='add'>+Description:</div><div class='add'>+		Enable the external GPU paired with ROG X-Flow laptops.</div><div class='add'>+		Toggling this setting will also trigger ACPI to disable the dGPU:</div><div class='add'>+</div><div class='add'>+			* 0 - Disable,</div><div class='add'>+			* 1 - Enable</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/platform/&lt;platform&gt;/panel_od</div><div class='add'>+Date:		Aug 2022</div><div class='add'>+KernelVersion:	5.17</div><div class='add'>+Contact:	"Luke Jones" &lt;luke@ljones.dev&gt;</div><div class='add'>+Description:</div><div class='add'>+		Enable an LCD response-time boost to reduce or remove ghosting:</div><div class='add'>+			* 0 - Disable,</div><div class='add'>+			* 1 - Enable</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-brcmstb-memc b/Documentation/ABI/testing/sysfs-platform-brcmstb-memc<br/>new file mode 100644<br/>index 000000000000..2f2b750ac2fd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-brcmstb-memc?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-platform-brcmstb-memc</a></div><div class='hunk'>@@ -0,0 +1,15 @@</div><div class='add'>+What:		/sys/bus/platform/devices/*/srpd</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.21</div><div class='add'>+Contact:	Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		Self Refresh Power Down (SRPD) inactivity timeout counted in</div><div class='add'>+		internal DDR controller clock cycles. Possible values range</div><div class='add'>+		from 0 (disable inactivity timeout) to 65535 (0xffff).</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/*/frequency</div><div class='add'>+Date:		July 2022</div><div class='add'>+KernelVersion:	5.21</div><div class='add'>+Contact:	Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		DDR PHY frequency in Hz.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-chipidea-usb2 b/Documentation/ABI/testing/sysfs-platform-chipidea-usb2<br/>index b0f4684a83fe..b9f7d924f28a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-chipidea-usb2?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-platform-chipidea-usb2</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-chipidea-usb2?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-platform-chipidea-usb2</a></div><div class='hunk'>@@ -2,8 +2,8 @@ What:		/sys/bus/platform/devices/ci_hdrc.0/role</div><div class='ctx'> Date:		Mar 2017</div><div class='ctx'> Contact:	Peter Chen &lt;peter.chen@nxp.com&gt;</div><div class='ctx'> Description:</div><div class='del'>-		It returns string "gadget" or "host" when read it, it indicates</div><div class='del'>-		current controller role.</div><div class='add'>+		When read, it returns string "gadget" or "host", indicating</div><div class='add'>+		the current controller role.</div><div class='ctx'> </div><div class='del'>-		It will do role switch when write "gadget" or "host" to it.</div><div class='add'>+		It will do role switch when "gadget" or "host" is written to it.</div><div class='ctx'> 		Only controller at dual-role configuration supports writing.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-dell-wmi-ddv b/Documentation/ABI/testing/sysfs-platform-dell-wmi-ddv<br/>new file mode 100644<br/>index 000000000000..1d97ad615c66<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-dell-wmi-ddv?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-platform-dell-wmi-ddv</a></div><div class='hunk'>@@ -0,0 +1,7 @@</div><div class='add'>+What:		/sys/class/power_supply/&lt;battery_name&gt;/eppid</div><div class='add'>+Date:		September 2022</div><div class='add'>+KernelVersion:	6.1</div><div class='add'>+Contact:	Armin Wolf &lt;W_Armin@gmx.de&gt;</div><div class='add'>+Description:</div><div class='add'>+		Reports the Dell ePPID (electronic Dell Piece Part Identification)</div><div class='add'>+		of the ACPI battery.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-intel-ifs b/Documentation/ABI/testing/sysfs-platform-intel-ifs<br/>new file mode 100644<br/>index 000000000000..41b4d5b1e21c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-intel-ifs?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-platform-intel-ifs</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+Device instance to test mapping</div><div class='add'>+intel_ifs_0  -&gt;  Scan Test</div><div class='add'>+intel_ifs_1  -&gt;  Array BIST test</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/intel_ifs_&lt;N&gt;/run_test</div><div class='add'>+Date:		Nov 16 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	"Jithu Joseph" &lt;jithu.joseph@intel.com&gt;</div><div class='add'>+Description:	Write &lt;cpu#&gt; to trigger IFS test for one online core.</div><div class='add'>+		Note that the test is per core. The cpu# can be</div><div class='add'>+		for any thread on the core. Running on one thread</div><div class='add'>+		completes the test for the core containing that thread.</div><div class='add'>+		Example: to test the core containing cpu5: echo 5 &gt;</div><div class='add'>+		/sys/devices/virtual/misc/intel_ifs_&lt;N&gt;/run_test</div><div class='add'>+Devices:	all</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/intel_ifs_&lt;N&gt;/status</div><div class='add'>+Date:		Nov 16 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	"Jithu Joseph" &lt;jithu.joseph@intel.com&gt;</div><div class='add'>+Description:	The status of the last test. It can be one of "pass", "fail"</div><div class='add'>+		or "untested".</div><div class='add'>+Devices:	all</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/intel_ifs_&lt;N&gt;/details</div><div class='add'>+Date:		Nov 16 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	"Jithu Joseph" &lt;jithu.joseph@intel.com&gt;</div><div class='add'>+Description:	Additional information regarding the last test. The details file reports</div><div class='add'>+		the hex value of the STATUS MSR for this test. Note that the error_code field</div><div class='add'>+		may contain driver defined software code not defined in the Intel SDM.</div><div class='add'>+Devices:	all</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/intel_ifs_&lt;N&gt;/image_version</div><div class='add'>+Date:		Nov 16 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	"Jithu Joseph" &lt;jithu.joseph@intel.com&gt;</div><div class='add'>+Description:	Version (hexadecimal) of loaded IFS test image. If no test image</div><div class='add'>+		is loaded reports "none". Only present for device instances where a test image</div><div class='add'>+		is applicable.</div><div class='add'>+Devices:	intel_ifs_0</div><div class='add'>+</div><div class='add'>+What:		/sys/devices/virtual/misc/intel_ifs_&lt;N&gt;/current_batch</div><div class='add'>+Date:		Nov 16 2022</div><div class='add'>+KernelVersion:	6.2</div><div class='add'>+Contact:	"Jithu Joseph" &lt;jithu.joseph@intel.com&gt;</div><div class='add'>+Description:	Write a number less than or equal to 0xff to load an IFS test image.</div><div class='add'>+		The number written treated as the 2 digit suffix in the following file name:</div><div class='add'>+		/lib/firmware/intel/ifs_&lt;N&gt;/ff-mm-ss-02x.scan</div><div class='add'>+		Reading the file will provide the suffix of the currently loaded IFS test image.</div><div class='add'>+		This file is present only for device instances where a test image is applicable.</div><div class='add'>+Devices:	intel_ifs_0</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl b/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl<br/>index e79ca22e2f45..9b99a81babb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-platform-mellanox-bootctl</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-platform-mellanox-bootctl?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-platform-mellanox-bootctl</a></div><div class='hunk'>@@ -68,3 +68,10 @@ Description:</div><div class='ctx'> 		Wasted   burnt and invalid</div><div class='ctx'> 		Invalid  not burnt but marked as valid (error state).</div><div class='ctx'> 		=======  ===============================================</div><div class='add'>+</div><div class='add'>+What:		/sys/bus/platform/devices/MLNXBF04:00/bootfifo</div><div class='add'>+Date:		Apr 2023</div><div class='add'>+KernelVersion:	6.4</div><div class='add'>+Contact:	"Liming Sun &lt;limings@nvidia.com&gt;"</div><div class='add'>+Description:</div><div class='add'>+		The file used to access the BlueField boot fifo.</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-power b/Documentation/ABI/testing/sysfs-power<br/>index 90ec4987074b..a3942b1036e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-power?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-power</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-power?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-power</a></div><div class='hunk'>@@ -152,7 +152,7 @@ Description:</div><div class='ctx'> 		case further investigation is required to determine which</div><div class='ctx'> 		device is causing the problem.  Note that genuine RTC clock</div><div class='ctx'> 		values (such as when pm_trace has not been used), can still</div><div class='del'>-		match a device and output it's name here.</div><div class='add'>+		match a device and output its name here.</div><div class='ctx'> </div><div class='ctx'> What:		/sys/power/pm_async</div><div class='ctx'> Date:		January 2009</div><div class='hunk'>@@ -413,6 +413,35 @@ Description:</div><div class='ctx'> 		The /sys/power/suspend_stats/last_failed_step file contains</div><div class='ctx'> 		the last failed step in the suspend/resume path.</div><div class='ctx'> </div><div class='add'>+What:		/sys/power/suspend_stats/last_hw_sleep</div><div class='add'>+Date:		June 2023</div><div class='add'>+Contact:	Mario Limonciello &lt;mario.limonciello@amd.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/power/suspend_stats/last_hw_sleep file</div><div class='add'>+		contains the duration of time spent in a hardware sleep</div><div class='add'>+		state in the most recent system suspend-resume cycle.</div><div class='add'>+		This number is measured in microseconds.</div><div class='add'>+</div><div class='add'>+What:		/sys/power/suspend_stats/total_hw_sleep</div><div class='add'>+Date:		June 2023</div><div class='add'>+Contact:	Mario Limonciello &lt;mario.limonciello@amd.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/power/suspend_stats/total_hw_sleep file</div><div class='add'>+		contains the aggregate of time spent in a hardware sleep</div><div class='add'>+		state since the kernel was booted. This number</div><div class='add'>+		is measured in microseconds.</div><div class='add'>+</div><div class='add'>+What:		/sys/power/suspend_stats/max_hw_sleep</div><div class='add'>+Date:		June 2023</div><div class='add'>+Contact:	Mario Limonciello &lt;mario.limonciello@amd.com&gt;</div><div class='add'>+Description:</div><div class='add'>+		The /sys/power/suspend_stats/max_hw_sleep file</div><div class='add'>+		contains the maximum amount of time that the hardware can</div><div class='add'>+		report for time spent in a hardware sleep state. When sleep</div><div class='add'>+		cycles are longer than this time, the values for</div><div class='add'>+		'total_hw_sleep' and 'last_hw_sleep' may not be accurate.</div><div class='add'>+		This number is measured in microseconds.</div><div class='add'>+</div><div class='ctx'> What:		/sys/power/sync_on_suspend</div><div class='ctx'> Date:		October 2019</div><div class='ctx'> Contact:	Jonas Meurer &lt;jonas@freesources.org&gt;</div><div class='head'>diff --git a/Documentation/ABI/testing/sysfs-secvar b/Documentation/ABI/testing/sysfs-secvar<br/>index feebb8c57294..857cf12b0904 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-secvar?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ABI/testing/sysfs-secvar</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/ABI/testing/sysfs-secvar?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/ABI/testing/sysfs-secvar</a></div><div class='hunk'>@@ -18,6 +18,14 @@ Description:	A string indicating which backend is in use by the firmware.</div><div class='ctx'> 		This determines the format of the variable and the accepted</div><div class='ctx'> 		format of variable updates.</div><div class='ctx'> </div><div class='add'>+		On powernv/OPAL, this value is provided by the OPAL firmware</div><div class='add'>+		and is expected to be "ibm,edk2-compat-v1".</div><div class='add'>+</div><div class='add'>+		On pseries/PLPKS, this is generated by the kernel based on the</div><div class='add'>+		version number in the SB_VERSION variable in the keystore, and</div><div class='add'>+		has the form "ibm,plpks-sb-v&lt;version&gt;", or</div><div class='add'>+		"ibm,plpks-sb-unknown" if there is no SB_VERSION variable.</div><div class='add'>+</div><div class='ctx'> What:		/sys/firmware/secvar/vars/&lt;variable name&gt;</div><div class='ctx'> Date:		August 2019</div><div class='ctx'> Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='hunk'>@@ -34,7 +42,7 @@ Description:	An integer representation of the size of the content of the</div><div class='ctx'> </div><div class='ctx'> What:		/sys/firmware/secvar/vars/&lt;variable_name&gt;/data</div><div class='ctx'> Date:		August 2019</div><div class='del'>-Contact:	Nayna Jain h&lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='ctx'> Description:	A read-only file containing the value of the variable. The size</div><div class='ctx'> 		of the file represents the maximum size of the variable data.</div><div class='ctx'> </div><div class='hunk'>@@ -44,3 +52,68 @@ Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='ctx'> Description:	A write-only file that is used to submit the new value for the</div><div class='ctx'> 		variable. The size of the file represents the maximum size of</div><div class='ctx'> 		the variable data that can be written.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/secvar/config</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Description:	This optional directory contains read-only config attributes as</div><div class='add'>+		defined by the secure variable implementation.  All data is in</div><div class='add'>+		ASCII format. The directory is only created if the backing</div><div class='add'>+		implementation provides variables to populate it, which at</div><div class='add'>+		present is only PLPKS on the pseries platform.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/secvar/config/version</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Description:	Config version as reported by the hypervisor in ASCII decimal</div><div class='add'>+		format.</div><div class='add'>+</div><div class='add'>+		Currently only provided by PLPKS on the pseries platform.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/secvar/config/max_object_size</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Description:	Maximum allowed size of	objects in the keystore in bytes,</div><div class='add'>+		represented in ASCII decimal format.</div><div class='add'>+</div><div class='add'>+		This is not necessarily the same as the max size that can be</div><div class='add'>+		written to an update file as writes can contain more than</div><div class='add'>+		object data, you should use the size of the update file for</div><div class='add'>+		that purpose.</div><div class='add'>+</div><div class='add'>+		Currently only provided by PLPKS on the pseries platform.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/secvar/config/total_size</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Description:	Total size of the PLPKS in bytes, represented in ASCII decimal</div><div class='add'>+		format.</div><div class='add'>+</div><div class='add'>+		Currently only provided by PLPKS on the pseries platform.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/secvar/config/used_space</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Description:	Current space consumed by the key store, in bytes, represented</div><div class='add'>+		in ASCII decimal format.</div><div class='add'>+</div><div class='add'>+		Currently only provided by PLPKS on the pseries platform.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/secvar/config/supported_policies</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Description:	Bitmask of supported policy flags by the hypervisor,</div><div class='add'>+		represented as an 8 byte hexadecimal ASCII string. Consult the</div><div class='add'>+		hypervisor documentation for what these flags are.</div><div class='add'>+</div><div class='add'>+		Currently only provided by PLPKS on the pseries platform.</div><div class='add'>+</div><div class='add'>+What:		/sys/firmware/secvar/config/signed_update_algorithms</div><div class='add'>+Date:		February 2023</div><div class='add'>+Contact:	Nayna Jain &lt;nayna@linux.ibm.com&gt;</div><div class='add'>+Description:	Bitmask of flags indicating which algorithms the hypervisor</div><div class='add'>+		supports for signed update of objects, represented as a 16 byte</div><div class='add'>+		hexadecimal ASCII string. Consult the hypervisor documentation</div><div class='add'>+		for what these flags mean.</div><div class='add'>+</div><div class='add'>+		Currently only provided by PLPKS on the pseries platform.</div><div class='head'>diff --git a/Documentation/Kconfig b/Documentation/Kconfig<br/>index e549a61f4d96..3a0e7ac0c4e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/Kconfig?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/Kconfig</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/Kconfig?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/Kconfig</a></div><div class='hunk'>@@ -1,23 +1,28 @@</div><div class='del'>-config WARN_MISSING_DOCUMENTS</div><div class='add'>+if COMPILE_TEST</div><div class='add'>+</div><div class='add'>+menu "Documentation"</div><div class='ctx'> </div><div class='add'>+config WARN_MISSING_DOCUMENTS</div><div class='ctx'> 	bool "Warn if there's a missing documentation file"</div><div class='del'>-	depends on COMPILE_TEST</div><div class='ctx'> 	help</div><div class='del'>-	   It is not uncommon that a document gets renamed.</div><div class='del'>-	   This option makes the Kernel to check for missing dependencies,</div><div class='del'>-	   warning when something is missing. Works only if the Kernel</div><div class='del'>-	   is built from a git tree.</div><div class='add'>+	  It is not uncommon that a document gets renamed.</div><div class='add'>+	  This option makes the Kernel to check for missing dependencies,</div><div class='add'>+	  warning when something is missing. Works only if the Kernel</div><div class='add'>+	  is built from a git tree.</div><div class='ctx'> </div><div class='del'>-	   If unsure, select 'N'.</div><div class='add'>+	  If unsure, select 'N'.</div><div class='ctx'> </div><div class='ctx'> config WARN_ABI_ERRORS</div><div class='ctx'> 	bool "Warn if there are errors at ABI files"</div><div class='del'>-	depends on COMPILE_TEST</div><div class='ctx'> 	help</div><div class='del'>-	   The files under Documentation/ABI should follow what's</div><div class='del'>-	   described at Documentation/ABI/README. Yet, as they're manually</div><div class='del'>-	   written, it would be possible that some of those files would</div><div class='del'>-	   have errors that would break them for being parsed by</div><div class='del'>-	   scripts/get_abi.pl. Add a check to verify them.</div><div class='add'>+	  The files under Documentation/ABI should follow what's</div><div class='add'>+	  described at Documentation/ABI/README. Yet, as they're manually</div><div class='add'>+	  written, it would be possible that some of those files would</div><div class='add'>+	  have errors that would break them for being parsed by</div><div class='add'>+	  scripts/get_abi.pl. Add a check to verify them.</div><div class='add'>+</div><div class='add'>+	  If unsure, select 'N'.</div><div class='add'>+</div><div class='add'>+endmenu</div><div class='ctx'> </div><div class='del'>-	   If unsure, select 'N'.</div><div class='add'>+endif</div><div class='head'>diff --git a/Documentation/Makefile b/Documentation/Makefile<br/>index 64d44c1ecad3..023fa658a0a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/Makefile?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/Makefile?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/Makefile</a></div><div class='hunk'>@@ -28,7 +28,7 @@ BUILDDIR      = $(obj)/output</div><div class='ctx'> PDFLATEX      = xelatex</div><div class='ctx'> LATEXOPTS     = -interaction=batchmode -no-shell-escape</div><div class='ctx'> </div><div class='del'>-ifeq ($(KBUILD_VERBOSE),0)</div><div class='add'>+ifeq ($(findstring 1, $(KBUILD_VERBOSE)),)</div><div class='ctx'> SPHINXOPTS    += "-q"</div><div class='ctx'> endif</div><div class='ctx'> </div><div class='hunk'>@@ -95,6 +95,15 @@ htmldocs:</div><div class='ctx'> 	@$(srctree)/scripts/sphinx-pre-install --version-check</div><div class='ctx'> 	@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var)))</div><div class='ctx'> </div><div class='add'>+texinfodocs:</div><div class='add'>+	@$(srctree)/scripts/sphinx-pre-install --version-check</div><div class='add'>+	@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,texinfo,$(var),texinfo,$(var)))</div><div class='add'>+</div><div class='add'>+# Note: the 'info' Make target is generated by sphinx itself when</div><div class='add'>+# running the texinfodocs target define above.</div><div class='add'>+infodocs: texinfodocs</div><div class='add'>+	$(MAKE) -C $(BUILDDIR)/texinfo info</div><div class='add'>+</div><div class='ctx'> linkcheckdocs:</div><div class='ctx'> 	@$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,linkcheck,$(var),,$(var)))</div><div class='ctx'> </div><div class='hunk'>@@ -143,6 +152,8 @@ cleandocs:</div><div class='ctx'> dochelp:</div><div class='ctx'> 	@echo  ' Linux kernel internal documentation in different formats from ReST:'</div><div class='ctx'> 	@echo  '  htmldocs        - HTML'</div><div class='add'>+	@echo  '  texinfodocs     - Texinfo'</div><div class='add'>+	@echo  '  infodocs        - Info'</div><div class='ctx'> 	@echo  '  latexdocs       - LaTeX'</div><div class='ctx'> 	@echo  '  pdfdocs         - PDF'</div><div class='ctx'> 	@echo  '  epubdocs        - EPUB'</div><div class='head'>diff --git a/Documentation/PCI/endpoint/index.rst b/Documentation/PCI/endpoint/index.rst<br/>index 38ea1f604b6d..4d2333e7ae06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/endpoint/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/PCI/endpoint/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/endpoint/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/endpoint/index.rst</a></div><div class='hunk'>@@ -13,6 +13,8 @@ PCI Endpoint Framework</div><div class='ctx'>    pci-test-howto</div><div class='ctx'>    pci-ntb-function</div><div class='ctx'>    pci-ntb-howto</div><div class='add'>+   pci-vntb-function</div><div class='add'>+   pci-vntb-howto</div><div class='ctx'> </div><div class='ctx'>    function/binding/pci-test</div><div class='ctx'>    function/binding/pci-ntb</div><div class='head'>diff --git a/Documentation/PCI/endpoint/pci-vntb-function.rst b/Documentation/PCI/endpoint/pci-vntb-function.rst<br/>new file mode 100644<br/>index 000000000000..0c51f53ab972<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/endpoint/pci-vntb-function.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/endpoint/pci-vntb-function.rst</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=================</div><div class='add'>+PCI vNTB Function</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+:Author: Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+The difference between PCI NTB function and PCI vNTB function is</div><div class='add'>+</div><div class='add'>+PCI NTB function need at two endpoint instances and connect HOST1</div><div class='add'>+and HOST2.</div><div class='add'>+</div><div class='add'>+PCI vNTB function only use one host and one endpoint(EP), use NTB</div><div class='add'>+connect EP and PCI host</div><div class='add'>+</div><div class='add'>+.. code-block:: text</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  +------------+         +---------------------------------------+</div><div class='add'>+  |            |         |                                       |</div><div class='add'>+  +------------+         |                        +--------------+</div><div class='add'>+  | NTB        |         |                        | NTB          |</div><div class='add'>+  | NetDev     |         |                        | NetDev       |</div><div class='add'>+  +------------+         |                        +--------------+</div><div class='add'>+  | NTB        |         |                        | NTB          |</div><div class='add'>+  | Transfer   |         |                        | Transfer     |</div><div class='add'>+  +------------+         |                        +--------------+</div><div class='add'>+  |            |         |                        |              |</div><div class='add'>+  |  PCI NTB   |         |                        |              |</div><div class='add'>+  |    EPF     |         |                        |              |</div><div class='add'>+  |   Driver   |         |                        | PCI Virtual  |</div><div class='add'>+  |            |         +---------------+        | NTB Driver   |</div><div class='add'>+  |            |         | PCI EP NTB    |&lt;------&gt;|              |</div><div class='add'>+  |            |         |  FN Driver    |        |              |</div><div class='add'>+  +------------+         +---------------+        +--------------+</div><div class='add'>+  |            |         |               |        |              |</div><div class='add'>+  |  PCI BUS   | &lt;-----&gt; |  PCI EP BUS   |        |  Virtual PCI |</div><div class='add'>+  |            |  PCI    |               |        |     BUS      |</div><div class='add'>+  +------------+         +---------------+--------+--------------+</div><div class='add'>+      PCI RC                        PCI EP</div><div class='add'>+</div><div class='add'>+Constructs used for Implementing vNTB</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+	1) Config Region</div><div class='add'>+	2) Self Scratchpad Registers</div><div class='add'>+	3) Peer Scratchpad Registers</div><div class='add'>+	4) Doorbell (DB) Registers</div><div class='add'>+	5) Memory Window (MW)</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Config Region:</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+It is same as PCI NTB Function driver</div><div class='add'>+</div><div class='add'>+Scratchpad Registers:</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+It is appended after Config region.</div><div class='add'>+</div><div class='add'>+.. code-block:: text</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  +--------------------------------------------------+ Base</div><div class='add'>+  |                                                  |</div><div class='add'>+  |                                                  |</div><div class='add'>+  |                                                  |</div><div class='add'>+  |          Common Config Register                  |</div><div class='add'>+  |                                                  |</div><div class='add'>+  |                                                  |</div><div class='add'>+  |                                                  |</div><div class='add'>+  +-----------------------+--------------------------+ Base + span_offset</div><div class='add'>+  |                       |                          |</div><div class='add'>+  |    Peer Span Space    |    Span Space            |</div><div class='add'>+  |                       |                          |</div><div class='add'>+  |                       |                          |</div><div class='add'>+  +-----------------------+--------------------------+ Base + span_offset</div><div class='add'>+  |                       |                          |      + span_count * 4</div><div class='add'>+  |                       |                          |</div><div class='add'>+  |     Span Space        |   Peer Span Space        |</div><div class='add'>+  |                       |                          |</div><div class='add'>+  +-----------------------+--------------------------+</div><div class='add'>+        Virtual PCI             Pcie Endpoint</div><div class='add'>+        NTB Driver               NTB Driver</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Doorbell Registers:</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+  Doorbell Registers are used by the hosts to interrupt each other.</div><div class='add'>+</div><div class='add'>+Memory Window:</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+  Actual transfer of data between the two hosts will happen using the</div><div class='add'>+  memory window.</div><div class='add'>+</div><div class='add'>+Modeling Constructs:</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+32-bit BARs.</div><div class='add'>+</div><div class='add'>+======  ===============</div><div class='add'>+BAR NO  CONSTRUCTS USED</div><div class='add'>+======  ===============</div><div class='add'>+BAR0    Config Region</div><div class='add'>+BAR1    Doorbell</div><div class='add'>+BAR2    Memory Window 1</div><div class='add'>+BAR3    Memory Window 2</div><div class='add'>+BAR4    Memory Window 3</div><div class='add'>+BAR5    Memory Window 4</div><div class='add'>+======  ===============</div><div class='add'>+</div><div class='add'>+64-bit BARs.</div><div class='add'>+</div><div class='add'>+======  ===============================</div><div class='add'>+BAR NO  CONSTRUCTS USED</div><div class='add'>+======  ===============================</div><div class='add'>+BAR0    Config Region + Scratchpad</div><div class='add'>+BAR1</div><div class='add'>+BAR2    Doorbell</div><div class='add'>+BAR3</div><div class='add'>+BAR4    Memory Window 1</div><div class='add'>+BAR5</div><div class='add'>+======  ===============================</div><div class='add'>+</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/PCI/endpoint/pci-vntb-howto.rst b/Documentation/PCI/endpoint/pci-vntb-howto.rst<br/>new file mode 100644<br/>index 000000000000..4ab8e4a26d4b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/endpoint/pci-vntb-howto.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/endpoint/pci-vntb-howto.rst</a></div><div class='hunk'>@@ -0,0 +1,167 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===================================================================</div><div class='add'>+PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide</div><div class='add'>+===================================================================</div><div class='add'>+</div><div class='add'>+:Author: Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+This document is a guide to help users use pci-epf-vntb function driver</div><div class='add'>+and ntb_hw_epf host driver for NTB functionality. The list of steps to</div><div class='add'>+be followed in the host side and EP side is given below. For the hardware</div><div class='add'>+configuration and internals of NTB using configurable endpoints see</div><div class='add'>+Documentation/PCI/endpoint/pci-vntb-function.rst</div><div class='add'>+</div><div class='add'>+Endpoint Device</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+Endpoint Controller Devices</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+To find the list of endpoint controller devices in the system::</div><div class='add'>+</div><div class='add'>+        # ls /sys/class/pci_epc/</div><div class='add'>+          5f010000.pcie_ep</div><div class='add'>+</div><div class='add'>+If PCI_ENDPOINT_CONFIGFS is enabled::</div><div class='add'>+</div><div class='add'>+        # ls /sys/kernel/config/pci_ep/controllers</div><div class='add'>+          5f010000.pcie_ep</div><div class='add'>+</div><div class='add'>+Endpoint Function Drivers</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+To find the list of endpoint function drivers in the system::</div><div class='add'>+</div><div class='add'>+	# ls /sys/bus/pci-epf/drivers</div><div class='add'>+	pci_epf_ntb  pci_epf_test  pci_epf_vntb</div><div class='add'>+</div><div class='add'>+If PCI_ENDPOINT_CONFIGFS is enabled::</div><div class='add'>+</div><div class='add'>+	# ls /sys/kernel/config/pci_ep/functions</div><div class='add'>+	pci_epf_ntb  pci_epf_test  pci_epf_vntb</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Creating pci-epf-vntb Device</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+PCI endpoint function device can be created using the configfs. To create</div><div class='add'>+pci-epf-vntb device, the following commands can be used::</div><div class='add'>+</div><div class='add'>+	# mount -t configfs none /sys/kernel/config</div><div class='add'>+	# cd /sys/kernel/config/pci_ep/</div><div class='add'>+	# mkdir functions/pci_epf_vntb/func1</div><div class='add'>+</div><div class='add'>+The "mkdir func1" above creates the pci-epf-ntb function device that will</div><div class='add'>+be probed by pci_epf_vntb driver.</div><div class='add'>+</div><div class='add'>+The PCI endpoint framework populates the directory with the following</div><div class='add'>+configurable fields::</div><div class='add'>+</div><div class='add'>+	# ls functions/pci_epf_ntb/func1</div><div class='add'>+	baseclass_code    deviceid          msi_interrupts    pci-epf-ntb.0</div><div class='add'>+	progif_code       secondary         subsys_id         vendorid</div><div class='add'>+	cache_line_size   interrupt_pin     msix_interrupts   primary</div><div class='add'>+	revid             subclass_code     subsys_vendor_id</div><div class='add'>+</div><div class='add'>+The PCI endpoint function driver populates these entries with default values</div><div class='add'>+when the device is bound to the driver. The pci-epf-vntb driver populates</div><div class='add'>+vendorid with 0xffff and interrupt_pin with 0x0001::</div><div class='add'>+</div><div class='add'>+	# cat functions/pci_epf_vntb/func1/vendorid</div><div class='add'>+	0xffff</div><div class='add'>+	# cat functions/pci_epf_vntb/func1/interrupt_pin</div><div class='add'>+	0x0001</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Configuring pci-epf-vntb Device</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+The user can configure the pci-epf-vntb device using its configfs entry. In order</div><div class='add'>+to change the vendorid and the deviceid, the following</div><div class='add'>+commands can be used::</div><div class='add'>+</div><div class='add'>+	# echo 0x1957 &gt; functions/pci_epf_vntb/func1/vendorid</div><div class='add'>+	# echo 0x0809 &gt; functions/pci_epf_vntb/func1/deviceid</div><div class='add'>+</div><div class='add'>+In order to configure NTB specific attributes, a new sub-directory to func1</div><div class='add'>+should be created::</div><div class='add'>+</div><div class='add'>+	# mkdir functions/pci_epf_vntb/func1/pci_epf_vntb.0/</div><div class='add'>+</div><div class='add'>+The NTB function driver will populate this directory with various attributes</div><div class='add'>+that can be configured by the user::</div><div class='add'>+</div><div class='add'>+	# ls functions/pci_epf_vntb/func1/pci_epf_vntb.0/</div><div class='add'>+	db_count    mw1         mw2         mw3         mw4         num_mws</div><div class='add'>+	spad_count</div><div class='add'>+</div><div class='add'>+A sample configuration for NTB function is given below::</div><div class='add'>+</div><div class='add'>+	# echo 4 &gt; functions/pci_epf_vntb/func1/pci_epf_vntb.0/db_count</div><div class='add'>+	# echo 128 &gt; functions/pci_epf_vntb/func1/pci_epf_vntb.0/spad_count</div><div class='add'>+	# echo 1 &gt; functions/pci_epf_vntb/func1/pci_epf_vntb.0/num_mws</div><div class='add'>+	# echo 0x100000 &gt; functions/pci_epf_vntb/func1/pci_epf_vntb.0/mw1</div><div class='add'>+</div><div class='add'>+A sample configuration for virtual NTB driver for virutal PCI bus::</div><div class='add'>+</div><div class='add'>+	# echo 0x1957 &gt; functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_vid</div><div class='add'>+	# echo 0x080A &gt; functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid</div><div class='add'>+	# echo 0x10 &gt; functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number</div><div class='add'>+</div><div class='add'>+Binding pci-epf-ntb Device to EP Controller</div><div class='add'>+--------------------------------------------</div><div class='add'>+</div><div class='add'>+NTB function device should be attached to PCI endpoint controllers</div><div class='add'>+connected to the host.</div><div class='add'>+</div><div class='add'>+	# ln -s controllers/5f010000.pcie_ep functions/pci-epf-ntb/func1/primary</div><div class='add'>+</div><div class='add'>+Once the above step is completed, the PCI endpoint controllers are ready to</div><div class='add'>+establish a link with the host.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Start the Link</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+In order for the endpoint device to establish a link with the host, the _start_</div><div class='add'>+field should be populated with '1'. For NTB, both the PCI endpoint controllers</div><div class='add'>+should establish link with the host (imx8 don't need this steps)::</div><div class='add'>+</div><div class='add'>+	# echo 1 &gt; controllers/5f010000.pcie_ep/start</div><div class='add'>+</div><div class='add'>+RootComplex Device</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+lspci Output at Host side</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+Note that the devices listed here correspond to the values populated in</div><div class='add'>+"Creating pci-epf-ntb Device" section above::</div><div class='add'>+</div><div class='add'>+	# lspci</div><div class='add'>+        00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0000 (rev 01)</div><div class='add'>+        01:00.0 RAM memory: Freescale Semiconductor Inc Device 0809</div><div class='add'>+</div><div class='add'>+Endpoint Device / Virtual PCI bus</div><div class='add'>+=================================</div><div class='add'>+</div><div class='add'>+lspci Output at EP Side / Virtual PCI bus</div><div class='add'>+-----------------------------------------</div><div class='add'>+</div><div class='add'>+Note that the devices listed here correspond to the values populated in</div><div class='add'>+"Creating pci-epf-ntb Device" section above::</div><div class='add'>+</div><div class='add'>+        # lspci</div><div class='add'>+        10:00.0 Unassigned class [ffff]: Dawicontrol Computersysteme GmbH Device 1234 (rev ff)</div><div class='add'>+</div><div class='add'>+Using ntb_hw_epf Device</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+The host side software follows the standard NTB software architecture in Linux.</div><div class='add'>+All the existing client side NTB utilities like NTB Transport Client and NTB</div><div class='add'>+Netdev, NTB Ping Pong Test Client and NTB Tool Test Client can be used with NTB</div><div class='add'>+function device.</div><div class='add'>+</div><div class='add'>+For more information on NTB see</div><div class='add'>+:doc:`Non-Transparent Bridge &lt;../../driver-api/ntb&gt;`</div><div class='head'>diff --git a/Documentation/PCI/index.rst b/Documentation/PCI/index.rst<br/>index c17c87af1968..e73f84aebde3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/PCI/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/index.rst</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-=======================</div><div class='del'>-Linux PCI Bus Subsystem</div><div class='del'>-=======================</div><div class='add'>+=================</div><div class='add'>+PCI Bus Subsystem</div><div class='add'>+=================</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 2</div><div class='head'>diff --git a/Documentation/PCI/msi-howto.rst b/Documentation/PCI/msi-howto.rst<br/>index aa2046af69f7..8ae461e97c54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/msi-howto.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/PCI/msi-howto.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/msi-howto.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/msi-howto.rst</a></div><div class='hunk'>@@ -285,3 +285,13 @@ to bridges between the PCI root and the device, MSIs are disabled.</div><div class='ctx'> It is also worth checking the device driver to see whether it supports MSIs.</div><div class='ctx'> For example, it may contain calls to pci_alloc_irq_vectors() with the</div><div class='ctx'> PCI_IRQ_MSI or PCI_IRQ_MSIX flags.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+List of device drivers MSI(-X) APIs</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+The PCI/MSI subystem has a dedicated C file for its exported device driver</div><div class='add'>+APIs — `drivers/pci/msi/api.c`. The following functions are exported:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/pci/msi/api.c</div><div class='add'>+   :export:</div><div class='head'>diff --git a/Documentation/PCI/pci-error-recovery.rst b/Documentation/PCI/pci-error-recovery.rst<br/>index 187f43a03200..9981d330da8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/pci-error-recovery.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/PCI/pci-error-recovery.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/pci-error-recovery.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/pci-error-recovery.rst</a></div><div class='hunk'>@@ -83,6 +83,7 @@ This structure has the form::</div><div class='ctx'> 		int (*mmio_enabled)(struct pci_dev *dev);</div><div class='ctx'> 		int (*slot_reset)(struct pci_dev *dev);</div><div class='ctx'> 		void (*resume)(struct pci_dev *dev);</div><div class='add'>+		void (*cor_error_detected)(struct pci_dev *dev);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> The possible channel states are::</div><div class='hunk'>@@ -417,10 +418,15 @@ That is, the recovery API only requires that:</div><div class='ctx'>    - drivers/next/e100.c</div><div class='ctx'>    - drivers/net/e1000</div><div class='ctx'>    - drivers/net/e1000e</div><div class='del'>-   - drivers/net/ixgb</div><div class='ctx'>    - drivers/net/ixgbe</div><div class='ctx'>    - drivers/net/cxgb3</div><div class='ctx'>    - drivers/net/s2io.c</div><div class='ctx'> </div><div class='add'>+   The cor_error_detected() callback is invoked in handle_error_source() when</div><div class='add'>+   the error severity is "correctable". The callback is optional and allows</div><div class='add'>+   additional logging to be done if desired. See example:</div><div class='add'>+</div><div class='add'>+   - drivers/cxl/pci.c</div><div class='add'>+</div><div class='ctx'> The End</div><div class='ctx'> -------</div><div class='head'>diff --git a/Documentation/PCI/pci-iov-howto.rst b/Documentation/PCI/pci-iov-howto.rst<br/>index b9fd003206f1..27d35933cea2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/pci-iov-howto.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/PCI/pci-iov-howto.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/pci-iov-howto.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/pci-iov-howto.rst</a></div><div class='hunk'>@@ -125,14 +125,14 @@ Following piece of code illustrates the usage of the SR-IOV API.</div><div class='ctx'> 		...</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int dev_suspend(struct pci_dev *dev, pm_message_t state)</div><div class='add'>+	static int dev_suspend(struct device *dev)</div><div class='ctx'> 	{</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int dev_resume(struct pci_dev *dev)</div><div class='add'>+	static int dev_resume(struct device *dev)</div><div class='ctx'> 	{</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='hunk'>@@ -165,8 +165,7 @@ Following piece of code illustrates the usage of the SR-IOV API.</div><div class='ctx'> 		.id_table =	dev_id_table,</div><div class='ctx'> 		.probe =	dev_probe,</div><div class='ctx'> 		.remove =	dev_remove,</div><div class='del'>-		.suspend =	dev_suspend,</div><div class='del'>-		.resume =	dev_resume,</div><div class='add'>+		.driver.pm =	&amp;dev_pm_ops,</div><div class='ctx'> 		.shutdown =	dev_shutdown,</div><div class='ctx'> 		.sriov_configure = dev_sriov_configure,</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/PCI/pci.rst b/Documentation/PCI/pci.rst<br/>index 67a850b55617..cced568d78e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/pci.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/PCI/pci.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/pci.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/pci.rst</a></div><div class='hunk'>@@ -273,12 +273,12 @@ Set the DMA mask size</div><div class='ctx'> While all drivers should explicitly indicate the DMA capability</div><div class='ctx'> (e.g. 32 or 64 bit) of the PCI bus master, devices with more than</div><div class='ctx'> 32-bit bus master capability for streaming data need the driver</div><div class='del'>-to "register" this capability by calling pci_set_dma_mask() with</div><div class='add'>+to "register" this capability by calling dma_set_mask() with</div><div class='ctx'> appropriate parameters.  In general this allows more efficient DMA</div><div class='ctx'> on systems where System RAM exists above 4G _physical_ address.</div><div class='ctx'> </div><div class='ctx'> Drivers for all PCI-X and PCIe compliant devices must call</div><div class='del'>-set_dma_mask() as they are 64-bit DMA devices.</div><div class='add'>+dma_set_mask() as they are 64-bit DMA devices.</div><div class='ctx'> </div><div class='ctx'> Similarly, drivers must also "register" this capability if the device</div><div class='ctx'> can directly address "coherent memory" in System RAM above 4G physical</div><div class='head'>diff --git a/Documentation/PCI/sysfs-pci.rst b/Documentation/PCI/sysfs-pci.rst<br/>index 742fbd21dc1f..f495185aa88a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/sysfs-pci.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/PCI/sysfs-pci.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/PCI/sysfs-pci.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/PCI/sysfs-pci.rst</a></div><div class='hunk'>@@ -125,7 +125,7 @@ implementation of that functionality. To support the historical interface of</div><div class='ctx'> mmap() through files in /proc/bus/pci, platforms may also set HAVE_PCI_MMAP.</div><div class='ctx'> </div><div class='ctx'> Alternatively, platforms which set HAVE_PCI_MMAP may provide their own</div><div class='del'>-implementation of pci_mmap_page_range() instead of defining</div><div class='add'>+implementation of pci_mmap_resource_range() instead of defining</div><div class='ctx'> ARCH_GENERIC_PCI_MMAP_RESOURCE.</div><div class='ctx'> </div><div class='ctx'> Platforms which support write-combining maps of PCI resources must define</div><div class='head'>diff --git a/Documentation/RCU/Design/Data-Structures/Data-Structures.rst b/Documentation/RCU/Design/Data-Structures/Data-Structures.rst<br/>index f4efd6897b09..b34990c7c377 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Data-Structures/Data-Structures.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/Design/Data-Structures/Data-Structures.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Data-Structures/Data-Structures.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/Design/Data-Structures/Data-Structures.rst</a></div><div class='hunk'>@@ -973,7 +973,7 @@ The ``-&gt;dynticks`` field counts the corresponding CPU's transitions to</div><div class='ctx'> and from either dyntick-idle or user mode, so that this counter has an</div><div class='ctx'> even value when the CPU is in dyntick-idle mode or user mode and an odd</div><div class='ctx'> value otherwise. The transitions to/from user mode need to be counted</div><div class='del'>-for user mode adaptive-ticks support (see timers/NO_HZ.txt).</div><div class='add'>+for user mode adaptive-ticks support (see Documentation/timers/no_hz.rst).</div><div class='ctx'> </div><div class='ctx'> The ``-&gt;rcu_need_heavy_qs`` field is used to record the fact that the</div><div class='ctx'> RCU core code would really like to see a quiescent state from the</div><div class='head'>diff --git a/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst b/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst<br/>index 6f89cf1e567d..93d899d53258 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/Design/Expedited-Grace-Periods/Expedited-Grace-Periods.rst</a></div><div class='hunk'>@@ -277,7 +277,7 @@ the following access functions:</div><div class='ctx'> </div><div class='ctx'> Again, only one request in a given batch need actually carry out a</div><div class='ctx'> grace-period operation, which means there must be an efficient way to</div><div class='del'>-identify which of many concurrent reqeusts will initiate the grace</div><div class='add'>+identify which of many concurrent requests will initiate the grace</div><div class='ctx'> period, and that there be an efficient way for the remaining requests to</div><div class='ctx'> wait for that grace period to complete. However, that is the topic of</div><div class='ctx'> the next section.</div><div class='hunk'>@@ -405,8 +405,8 @@ Use of Workqueues</div><div class='ctx'> In earlier implementations, the task requesting the expedited grace</div><div class='ctx'> period also drove it to completion. This straightforward approach had</div><div class='ctx'> the disadvantage of needing to account for POSIX signals sent to user</div><div class='del'>-tasks, so more recent implemementations use the Linux kernel's</div><div class='del'>-`workqueues &lt;https://www.kernel.org/doc/Documentation/core-api/workqueue.rst&gt;`__.</div><div class='add'>+tasks, so more recent implementations use the Linux kernel's</div><div class='add'>+workqueues (see Documentation/core-api/workqueue.rst).</div><div class='ctx'> </div><div class='ctx'> The requesting task still does counter snapshotting and funnel-lock</div><div class='ctx'> processing, but the task reaching the top of the funnel lock does a</div><div class='hunk'>@@ -465,7 +465,7 @@ corresponding disadvantage that workqueues cannot be used until they are</div><div class='ctx'> initialized, which does not happen until some time after the scheduler</div><div class='ctx'> spawns the first task. Given that there are parts of the kernel that</div><div class='ctx'> really do want to execute grace periods during this mid-boot “dead</div><div class='del'>-zone”, expedited grace periods must do something else during thie time.</div><div class='add'>+zone”, expedited grace periods must do something else during this time.</div><div class='ctx'> </div><div class='ctx'> What they do is to fall back to the old practice of requiring that the</div><div class='ctx'> requesting task drive the expedited grace period, as was the case before</div><div class='head'>diff --git a/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst b/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst<br/>index 7fdf151a8680..5750f125361b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/Design/Memory-Ordering/Tree-RCU-Memory-Ordering.rst</a></div><div class='hunk'>@@ -168,7 +168,7 @@ an ``atomic_add_return()`` of zero) to detect idle CPUs.</div><div class='ctx'> +-----------------------------------------------------------------------+</div><div class='ctx'> </div><div class='ctx'> The approach must be extended to handle one final case, that of waking a</div><div class='del'>-task blocked in ``synchronize_rcu()``. This task might be affinitied to</div><div class='add'>+task blocked in ``synchronize_rcu()``. This task might be affined to</div><div class='ctx'> a CPU that is not yet aware that the grace period has ended, and thus</div><div class='ctx'> might not yet be subject to the grace period's memory ordering.</div><div class='ctx'> Therefore, there is an ``smp_mb()`` after the return from</div><div class='head'>diff --git a/Documentation/RCU/Design/Requirements/Requirements.rst b/Documentation/RCU/Design/Requirements/Requirements.rst<br/>index 45278e2974c0..49387d823619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Requirements/Requirements.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/Design/Requirements/Requirements.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/Design/Requirements/Requirements.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/Design/Requirements/Requirements.rst</a></div><div class='hunk'>@@ -370,8 +370,8 @@ pointer fetched by rcu_dereference() may not be used outside of the</div><div class='ctx'> outermost RCU read-side critical section containing that</div><div class='ctx'> rcu_dereference(), unless protection of the corresponding data</div><div class='ctx'> element has been passed from RCU to some other synchronization</div><div class='del'>-mechanism, most commonly locking or `reference</div><div class='del'>-counting &lt;https://www.kernel.org/doc/Documentation/RCU/rcuref.txt&gt;`__.</div><div class='add'>+mechanism, most commonly locking or reference counting</div><div class='add'>+(see ../../rcuref.rst).</div><div class='ctx'> </div><div class='ctx'> .. |high-quality implementation of C11 memory_order_consume [PDF]| replace:: high-quality implementation of C11 ``memory_order_consume`` [PDF]</div><div class='ctx'> .. _high-quality implementation of C11 memory_order_consume [PDF]: http://www.rdrop.com/users/paulmck/RCU/consume.2015.07.13a.pdf</div><div class='hunk'>@@ -1844,10 +1844,10 @@ that meets this requirement.</div><div class='ctx'> </div><div class='ctx'> Furthermore, NMI handlers can be interrupted by what appear to RCU to be</div><div class='ctx'> normal interrupts. One way that this can happen is for code that</div><div class='del'>-directly invokes rcu_irq_enter() and rcu_irq_exit() to be called</div><div class='add'>+directly invokes ct_irq_enter() and ct_irq_exit() to be called</div><div class='ctx'> from an NMI handler. This astonishing fact of life prompted the current</div><div class='del'>-code structure, which has rcu_irq_enter() invoking</div><div class='del'>-rcu_nmi_enter() and rcu_irq_exit() invoking rcu_nmi_exit().</div><div class='add'>+code structure, which has ct_irq_enter() invoking</div><div class='add'>+ct_nmi_enter() and ct_irq_exit() invoking ct_nmi_exit().</div><div class='ctx'> And yes, I also learned of this requirement the hard way.</div><div class='ctx'> </div><div class='ctx'> Loadable Modules</div><div class='hunk'>@@ -1858,7 +1858,7 @@ unloaded. After a given module has been unloaded, any attempt to call</div><div class='ctx'> one of its functions results in a segmentation fault. The module-unload</div><div class='ctx'> functions must therefore cancel any delayed calls to loadable-module</div><div class='ctx'> functions, for example, any outstanding mod_timer() must be dealt</div><div class='del'>-with via del_timer_sync() or similar.</div><div class='add'>+with via timer_shutdown_sync() or similar.</div><div class='ctx'> </div><div class='ctx'> Unfortunately, there is no way to cancel an RCU callback; once you</div><div class='ctx'> invoke call_rcu(), the callback function is eventually going to be</div><div class='hunk'>@@ -2195,7 +2195,7 @@ scheduling-clock interrupt be enabled when RCU needs it to be:</div><div class='ctx'>    sections, and RCU believes this CPU to be idle, no problem. This</div><div class='ctx'>    sort of thing is used by some architectures for light-weight</div><div class='ctx'>    exception handlers, which can then avoid the overhead of</div><div class='del'>-   rcu_irq_enter() and rcu_irq_exit() at exception entry and</div><div class='add'>+   ct_irq_enter() and ct_irq_exit() at exception entry and</div><div class='ctx'>    exit, respectively. Some go further and avoid the entireties of</div><div class='ctx'>    irq_enter() and irq_exit().</div><div class='ctx'>    Just make very sure you are running some of your tests with</div><div class='hunk'>@@ -2226,7 +2226,7 @@ scheduling-clock interrupt be enabled when RCU needs it to be:</div><div class='ctx'> +-----------------------------------------------------------------------+</div><div class='ctx'> | **Answer**:                                                           |</div><div class='ctx'> +-----------------------------------------------------------------------+</div><div class='del'>-| One approach is to do ``rcu_irq_exit();rcu_irq_enter();`` every so    |</div><div class='add'>+| One approach is to do ``ct_irq_exit();ct_irq_enter();`` every so      |</div><div class='ctx'> | often. But given that long-running interrupt handlers can cause other |</div><div class='ctx'> | problems, not least for response time, shouldn't you work to keep     |</div><div class='ctx'> | your interrupt handler's runtime within reasonable bounds?            |</div><div class='hunk'>@@ -2654,6 +2654,38 @@ synchronize_rcu(), and rcu_barrier(), respectively. In</div><div class='ctx'> three APIs are therefore implemented by separate functions that check</div><div class='ctx'> for voluntary context switches.</div><div class='ctx'> </div><div class='add'>+Tasks Rude RCU</div><div class='add'>+~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Some forms of tracing need to wait for all preemption-disabled regions</div><div class='add'>+of code running on any online CPU, including those executed when RCU is</div><div class='add'>+not watching.  This means that synchronize_rcu() is insufficient, and</div><div class='add'>+Tasks Rude RCU must be used instead.  This flavor of RCU does its work by</div><div class='add'>+forcing a workqueue to be scheduled on each online CPU, hence the "Rude"</div><div class='add'>+moniker.  And this operation is considered to be quite rude by real-time</div><div class='add'>+workloads that don't want their ``nohz_full`` CPUs receiving IPIs and</div><div class='add'>+by battery-powered systems that don't want their idle CPUs to be awakened.</div><div class='add'>+</div><div class='add'>+The tasks-rude-RCU API is also reader-marking-free and thus quite compact,</div><div class='add'>+consisting of call_rcu_tasks_rude(), synchronize_rcu_tasks_rude(),</div><div class='add'>+and rcu_barrier_tasks_rude().</div><div class='add'>+</div><div class='add'>+Tasks Trace RCU</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Some forms of tracing need to sleep in readers, but cannot tolerate</div><div class='add'>+SRCU's read-side overhead, which includes a full memory barrier in both</div><div class='add'>+srcu_read_lock() and srcu_read_unlock().  This need is handled by a</div><div class='add'>+Tasks Trace RCU that uses scheduler locking and IPIs to synchronize with</div><div class='add'>+readers.  Real-time systems that cannot tolerate IPIs may build their</div><div class='add'>+kernels with ``CONFIG_TASKS_TRACE_RCU_READ_MB=y``, which avoids the IPIs at</div><div class='add'>+the expense of adding full memory barriers to the read-side primitives.</div><div class='add'>+</div><div class='add'>+The tasks-trace-RCU API is also reasonably compact,</div><div class='add'>+consisting of rcu_read_lock_trace(), rcu_read_unlock_trace(),</div><div class='add'>+rcu_read_lock_trace_held(), call_rcu_tasks_trace(),</div><div class='add'>+synchronize_rcu_tasks_trace(), and rcu_barrier_tasks_trace().</div><div class='add'>+</div><div class='ctx'> Possible Future Changes</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/RCU/NMI-RCU.rst b/Documentation/RCU/NMI-RCU.rst<br/>index 2a92bc685ef1..dff60a80b386 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/NMI-RCU.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/NMI-RCU.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/NMI-RCU.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/NMI-RCU.rst</a></div><div class='hunk'>@@ -8,7 +8,7 @@ Although RCU is usually used to protect read-mostly data structures,</div><div class='ctx'> it is possible to use RCU to provide dynamic non-maskable interrupt</div><div class='ctx'> handlers, as well as dynamic irq handlers.  This document describes</div><div class='ctx'> how to do this, drawing loosely from Zwane Mwaikambo's NMI-timer</div><div class='del'>-work in "arch/x86/kernel/traps.c".</div><div class='add'>+work in an old version of "arch/x86/kernel/traps.c".</div><div class='ctx'> </div><div class='ctx'> The relevant pieces of code are listed below, each followed by a</div><div class='ctx'> brief explanation::</div><div class='hunk'>@@ -116,7 +116,7 @@ Answer to Quick Quiz:</div><div class='ctx'> </div><div class='ctx'> 	This same sad story can happen on other CPUs when using</div><div class='ctx'> 	a compiler with aggressive pointer-value speculation</div><div class='del'>-	optimizations.</div><div class='add'>+	optimizations.  (But please don't!)</div><div class='ctx'> </div><div class='ctx'> 	More important, the rcu_dereference_sched() makes it</div><div class='ctx'> 	clear to someone reading the code that the pointer is</div><div class='head'>diff --git a/Documentation/RCU/RTFP.txt b/Documentation/RCU/RTFP.txt<br/>index 588d97366a46..db8f16b392aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/RTFP.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/RTFP.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/RTFP.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/RTFP.txt</a></div><div class='hunk'>@@ -201,7 +201,7 @@ work looked at debugging uses of RCU [Seyster:2011:RFA:2075416.2075425].</div><div class='ctx'> In 2012, Josh Triplett received his Ph.D. with his dissertation</div><div class='ctx'> covering RCU-protected resizable hash tables and the relationship</div><div class='ctx'> between memory barriers and read-side traversal order:  If the updater</div><div class='del'>-is making changes in the opposite direction from the read-side traveral</div><div class='add'>+is making changes in the opposite direction from the read-side traversal</div><div class='ctx'> order, the updater need only execute a memory-barrier instruction,</div><div class='ctx'> but if in the same direction, the updater needs to wait for a grace</div><div class='ctx'> period between the individual updates [JoshTriplettPhD].  Also in 2012,</div><div class='hunk'>@@ -1245,7 +1245,7 @@ Oregon Health and Sciences University"</div><div class='ctx'> [Viewed September 5, 2005]"</div><div class='ctx'> ,annotation={</div><div class='ctx'> 	First posting showing how RCU can be safely adapted for</div><div class='del'>-	preemptable RCU read side critical sections.</div><div class='add'>+	preemptible RCU read side critical sections.</div><div class='ctx'> }</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -1888,7 +1888,7 @@ Revised:</div><div class='ctx'> \url{https://lore.kernel.org/r/20070910183004.GA3299@linux.vnet.ibm.com}</div><div class='ctx'> [Viewed October 25, 2007]"</div><div class='ctx'> ,annotation={</div><div class='del'>-	Final patch for preemptable RCU to -rt.  (Later patches were</div><div class='add'>+	Final patch for preemptible RCU to -rt.  (Later patches were</div><div class='ctx'> 	to mainline, eventually incorporated.)</div><div class='ctx'> }</div><div class='ctx'> }</div><div class='hunk'>@@ -2275,7 +2275,7 @@ lot of {Linux} into your technology!!!"</div><div class='ctx'> \url{https://lore.kernel.org/r/20090724001429.GA17374@linux.vnet.ibm.com}</div><div class='ctx'> [Viewed August 15, 2009]"</div><div class='ctx'> ,annotation={</div><div class='del'>-	First posting of simple and fast preemptable RCU.</div><div class='add'>+	First posting of simple and fast preemptible RCU.</div><div class='ctx'> }</div><div class='ctx'> }</div><div class='ctx'> </div><div class='hunk'>@@ -2639,7 +2639,7 @@ lot of {Linux} into your technology!!!"</div><div class='ctx'> 	RCU-protected hash tables, barriers vs. read-side traversal order.</div><div class='ctx'> 	.</div><div class='ctx'> 	If the updater is making changes in the opposite direction from</div><div class='del'>-	the read-side traveral order, the updater need only execute a</div><div class='add'>+	the read-side traversal order, the updater need only execute a</div><div class='ctx'> 	memory-barrier instruction, but if in the same direction, the</div><div class='ctx'> 	updater needs to wait for a grace period between the individual</div><div class='ctx'> 	updates.</div><div class='head'>diff --git a/Documentation/RCU/UP.rst b/Documentation/RCU/UP.rst<br/>index e26dda27430c..4060d7a2f62a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/UP.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/UP.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/UP.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/UP.rst</a></div><div class='hunk'>@@ -38,7 +38,7 @@ by having call_rcu() directly invoke its arguments only if it was called</div><div class='ctx'> from process context.  However, this can fail in a similar manner.</div><div class='ctx'> </div><div class='ctx'> Suppose that an RCU-based algorithm again scans a linked list containing</div><div class='del'>-elements A, B, and C in process contexts, but that it invokes a function</div><div class='add'>+elements A, B, and C in process context, but that it invokes a function</div><div class='ctx'> on each element as it is scanned.  Suppose further that this function</div><div class='ctx'> deletes element B from the list, then passes it to call_rcu() for deferred</div><div class='ctx'> freeing.  This may be a bit unconventional, but it is perfectly legal</div><div class='hunk'>@@ -59,7 +59,8 @@ Example 3: Death by Deadlock</div><div class='ctx'> Suppose that call_rcu() is invoked while holding a lock, and that the</div><div class='ctx'> callback function must acquire this same lock.  In this case, if</div><div class='ctx'> call_rcu() were to directly invoke the callback, the result would</div><div class='del'>-be self-deadlock.</div><div class='add'>+be self-deadlock *even if* this invocation occurred from a later</div><div class='add'>+call_rcu() invocation a full grace period later.</div><div class='ctx'> </div><div class='ctx'> In some cases, it would possible to restructure to code so that</div><div class='ctx'> the call_rcu() is delayed until after the lock is released.  However,</div><div class='hunk'>@@ -85,6 +86,14 @@ Quick Quiz #2:</div><div class='ctx'> </div><div class='ctx'> :ref:`Answers to Quick Quiz &lt;answer_quick_quiz_up&gt;`</div><div class='ctx'> </div><div class='add'>+It is important to note that userspace RCU implementations *do*</div><div class='add'>+permit call_rcu() to directly invoke callbacks, but only if a full</div><div class='add'>+grace period has elapsed since those callbacks were queued.  This is</div><div class='add'>+the case because some userspace environments are extremely constrained.</div><div class='add'>+Nevertheless, people writing userspace RCU implementations are strongly</div><div class='add'>+encouraged to avoid invoking callbacks from call_rcu(), thus obtaining</div><div class='add'>+the deadlock-avoidance benefits called out above.</div><div class='add'>+</div><div class='ctx'> Summary</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='hunk'>@@ -98,7 +107,7 @@ UP systems, including PREEMPT SMP builds running on UP systems.</div><div class='ctx'> </div><div class='ctx'> Quick Quiz #3:</div><div class='ctx'> 	Why can't synchronize_rcu() return immediately on UP systems running</div><div class='del'>-	preemptable RCU?</div><div class='add'>+	preemptible RCU?</div><div class='ctx'> </div><div class='ctx'> .. _answer_quick_quiz_up:</div><div class='ctx'> </div><div class='hunk'>@@ -134,7 +143,7 @@ Answer to Quick Quiz #2:</div><div class='ctx'> </div><div class='ctx'> Answer to Quick Quiz #3:</div><div class='ctx'> 	Why can't synchronize_rcu() return immediately on UP systems</div><div class='del'>-	running preemptable RCU?</div><div class='add'>+	running preemptible RCU?</div><div class='ctx'> </div><div class='ctx'> 	Because some other task might have been preempted in the middle</div><div class='ctx'> 	of an RCU read-side critical section.  If synchronize_rcu()</div><div class='head'>diff --git a/Documentation/RCU/arrayRCU.rst b/Documentation/RCU/arrayRCU.rst<br/>deleted file mode 100644<br/>index 4051ea3871ef..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/arrayRCU.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/arrayRCU.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,165 +0,0 @@</div><div class='del'>-.. _array_rcu_doc:</div><div class='del'>-</div><div class='del'>-Using RCU to Protect Read-Mostly Arrays</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-Although RCU is more commonly used to protect linked lists, it can</div><div class='del'>-also be used to protect arrays.  Three situations are as follows:</div><div class='del'>-</div><div class='del'>-1.  :ref:`Hash Tables &lt;hash_tables&gt;`</div><div class='del'>-</div><div class='del'>-2.  :ref:`Static Arrays &lt;static_arrays&gt;`</div><div class='del'>-</div><div class='del'>-3.  :ref:`Resizable Arrays &lt;resizable_arrays&gt;`</div><div class='del'>-</div><div class='del'>-Each of these three situations involves an RCU-protected pointer to an</div><div class='del'>-array that is separately indexed.  It might be tempting to consider use</div><div class='del'>-of RCU to instead protect the index into an array, however, this use</div><div class='del'>-case is **not** supported.  The problem with RCU-protected indexes into</div><div class='del'>-arrays is that compilers can play way too many optimization games with</div><div class='del'>-integers, which means that the rules governing handling of these indexes</div><div class='del'>-are far more trouble than they are worth.  If RCU-protected indexes into</div><div class='del'>-arrays prove to be particularly valuable (which they have not thus far),</div><div class='del'>-explicit cooperation from the compiler will be required to permit them</div><div class='del'>-to be safely used.</div><div class='del'>-</div><div class='del'>-That aside, each of the three RCU-protected pointer situations are</div><div class='del'>-described in the following sections.</div><div class='del'>-</div><div class='del'>-.. _hash_tables:</div><div class='del'>-</div><div class='del'>-Situation 1: Hash Tables</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>-Hash tables are often implemented as an array, where each array entry</div><div class='del'>-has a linked-list hash chain.  Each hash chain can be protected by RCU</div><div class='del'>-as described in the listRCU.txt document.  This approach also applies</div><div class='del'>-to other array-of-list situations, such as radix trees.</div><div class='del'>-</div><div class='del'>-.. _static_arrays:</div><div class='del'>-</div><div class='del'>-Situation 2: Static Arrays</div><div class='del'>---------------------------</div><div class='del'>-</div><div class='del'>-Static arrays, where the data (rather than a pointer to the data) is</div><div class='del'>-located in each array element, and where the array is never resized,</div><div class='del'>-have not been used with RCU.  Rik van Riel recommends using seqlock in</div><div class='del'>-this situation, which would also have minimal read-side overhead as long</div><div class='del'>-as updates are rare.</div><div class='del'>-</div><div class='del'>-Quick Quiz:</div><div class='del'>-		Why is it so important that updates be rare when using seqlock?</div><div class='del'>-</div><div class='del'>-:ref:`Answer to Quick Quiz &lt;answer_quick_quiz_seqlock&gt;`</div><div class='del'>-</div><div class='del'>-.. _resizable_arrays:</div><div class='del'>-</div><div class='del'>-Situation 3: Resizable Arrays</div><div class='del'>-------------------------------</div><div class='del'>-</div><div class='del'>-Use of RCU for resizable arrays is demonstrated by the grow_ary()</div><div class='del'>-function formerly used by the System V IPC code.  The array is used</div><div class='del'>-to map from semaphore, message-queue, and shared-memory IDs to the data</div><div class='del'>-structure that represents the corresponding IPC construct.  The grow_ary()</div><div class='del'>-function does not acquire any locks; instead its caller must hold the</div><div class='del'>-ids-&gt;sem semaphore.</div><div class='del'>-</div><div class='del'>-The grow_ary() function, shown below, does some limit checks, allocates a</div><div class='del'>-new ipc_id_ary, copies the old to the new portion of the new, initializes</div><div class='del'>-the remainder of the new, updates the ids-&gt;entries pointer to point to</div><div class='del'>-the new array, and invokes ipc_rcu_putref() to free up the old array.</div><div class='del'>-Note that rcu_assign_pointer() is used to update the ids-&gt;entries pointer,</div><div class='del'>-which includes any memory barriers required on whatever architecture</div><div class='del'>-you are running on::</div><div class='del'>-</div><div class='del'>-	static int grow_ary(struct ipc_ids* ids, int newsize)</div><div class='del'>-	{</div><div class='del'>-		struct ipc_id_ary* new;</div><div class='del'>-		struct ipc_id_ary* old;</div><div class='del'>-		int i;</div><div class='del'>-		int size = ids-&gt;entries-&gt;size;</div><div class='del'>-</div><div class='del'>-		if(newsize &gt; IPCMNI)</div><div class='del'>-			newsize = IPCMNI;</div><div class='del'>-		if(newsize &lt;= size)</div><div class='del'>-			return newsize;</div><div class='del'>-</div><div class='del'>-		new = ipc_rcu_alloc(sizeof(struct kern_ipc_perm *)*newsize +</div><div class='del'>-				    sizeof(struct ipc_id_ary));</div><div class='del'>-		if(new == NULL)</div><div class='del'>-			return size;</div><div class='del'>-		new-&gt;size = newsize;</div><div class='del'>-		memcpy(new-&gt;p, ids-&gt;entries-&gt;p,</div><div class='del'>-		       sizeof(struct kern_ipc_perm *)*size +</div><div class='del'>-		       sizeof(struct ipc_id_ary));</div><div class='del'>-		for(i=size;i&lt;newsize;i++) {</div><div class='del'>-			new-&gt;p[i] = NULL;</div><div class='del'>-		}</div><div class='del'>-		old = ids-&gt;entries;</div><div class='del'>-</div><div class='del'>-		/*</div><div class='del'>-		 * Use rcu_assign_pointer() to make sure the memcpyed</div><div class='del'>-		 * contents of the new array are visible before the new</div><div class='del'>-		 * array becomes visible.</div><div class='del'>-		 */</div><div class='del'>-		rcu_assign_pointer(ids-&gt;entries, new);</div><div class='del'>-</div><div class='del'>-		ipc_rcu_putref(old);</div><div class='del'>-		return newsize;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-The ipc_rcu_putref() function decrements the array's reference count</div><div class='del'>-and then, if the reference count has dropped to zero, uses call_rcu()</div><div class='del'>-to free the array after a grace period has elapsed.</div><div class='del'>-</div><div class='del'>-The array is traversed by the ipc_lock() function.  This function</div><div class='del'>-indexes into the array under the protection of rcu_read_lock(),</div><div class='del'>-using rcu_dereference() to pick up the pointer to the array so</div><div class='del'>-that it may later safely be dereferenced -- memory barriers are</div><div class='del'>-required on the Alpha CPU.  Since the size of the array is stored</div><div class='del'>-with the array itself, there can be no array-size mismatches, so</div><div class='del'>-a simple check suffices.  The pointer to the structure corresponding</div><div class='del'>-to the desired IPC object is placed in "out", with NULL indicating</div><div class='del'>-a non-existent entry.  After acquiring "out-&gt;lock", the "out-&gt;deleted"</div><div class='del'>-flag indicates whether the IPC object is in the process of being</div><div class='del'>-deleted, and, if not, the pointer is returned::</div><div class='del'>-</div><div class='del'>-	struct kern_ipc_perm* ipc_lock(struct ipc_ids* ids, int id)</div><div class='del'>-	{</div><div class='del'>-		struct kern_ipc_perm* out;</div><div class='del'>-		int lid = id % SEQ_MULTIPLIER;</div><div class='del'>-		struct ipc_id_ary* entries;</div><div class='del'>-</div><div class='del'>-		rcu_read_lock();</div><div class='del'>-		entries = rcu_dereference(ids-&gt;entries);</div><div class='del'>-		if(lid &gt;= entries-&gt;size) {</div><div class='del'>-			rcu_read_unlock();</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		out = entries-&gt;p[lid];</div><div class='del'>-		if(out == NULL) {</div><div class='del'>-			rcu_read_unlock();</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		spin_lock(&amp;out-&gt;lock);</div><div class='del'>-</div><div class='del'>-		/* ipc_rmid() may have already freed the ID while ipc_lock</div><div class='del'>-		 * was spinning: here verify that the structure is still valid</div><div class='del'>-		 */</div><div class='del'>-		if (out-&gt;deleted) {</div><div class='del'>-			spin_unlock(&amp;out-&gt;lock);</div><div class='del'>-			rcu_read_unlock();</div><div class='del'>-			return NULL;</div><div class='del'>-		}</div><div class='del'>-		return out;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-.. _answer_quick_quiz_seqlock:</div><div class='del'>-</div><div class='del'>-Answer to Quick Quiz:</div><div class='del'>-	Why is it so important that updates be rare when using seqlock?</div><div class='del'>-</div><div class='del'>-	The reason that it is important that updates be rare when</div><div class='del'>-	using seqlock is that frequent updates can livelock readers.</div><div class='del'>-	One way to avoid this problem is to assign a seqlock for</div><div class='del'>-	each array entry rather than to the entire array.</div><div class='head'>diff --git a/Documentation/RCU/checklist.rst b/Documentation/RCU/checklist.rst<br/>index f4545b7c9a63..bd3c58c44bef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/checklist.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/checklist.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/checklist.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/checklist.rst</a></div><div class='hunk'>@@ -32,8 +32,8 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	for lockless updates.  This does result in the mildly</div><div class='ctx'> 	counter-intuitive situation where rcu_read_lock() and</div><div class='ctx'> 	rcu_read_unlock() are used to protect updates, however, this</div><div class='del'>-	approach provides the same potential simplifications that garbage</div><div class='del'>-	collectors do.</div><div class='add'>+	approach can provide the same simplifications to certain types</div><div class='add'>+	of lockless algorithms that garbage collectors do.</div><div class='ctx'> </div><div class='ctx'> 1.	Does the update code have proper mutual exclusion?</div><div class='ctx'> </div><div class='hunk'>@@ -49,12 +49,12 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	them -- even x86 allows later loads to be reordered to precede</div><div class='ctx'> 	earlier stores), and be prepared to explain why this added</div><div class='ctx'> 	complexity is worthwhile.  If you choose #c, be prepared to</div><div class='del'>-	explain how this single task does not become a major bottleneck on</div><div class='del'>-	big multiprocessor machines (for example, if the task is updating</div><div class='del'>-	information relating to itself that other tasks can read, there</div><div class='del'>-	by definition can be no bottleneck).  Note that the definition</div><div class='del'>-	of "large" has changed significantly:  Eight CPUs was "large"</div><div class='del'>-	in the year 2000, but a hundred CPUs was unremarkable in 2017.</div><div class='add'>+	explain how this single task does not become a major bottleneck</div><div class='add'>+	on large systems (for example, if the task is updating information</div><div class='add'>+	relating to itself that other tasks can read, there by definition</div><div class='add'>+	can be no bottleneck).	Note that the definition of "large" has</div><div class='add'>+	changed significantly:	Eight CPUs was "large" in the year 2000,</div><div class='add'>+	but a hundred CPUs was unremarkable in 2017.</div><div class='ctx'> </div><div class='ctx'> 2.	Do the RCU read-side critical sections make proper use of</div><div class='ctx'> 	rcu_read_lock() and friends?  These primitives are needed</div><div class='hunk'>@@ -66,8 +66,13 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	As a rough rule of thumb, any dereference of an RCU-protected</div><div class='ctx'> 	pointer must be covered by rcu_read_lock(), rcu_read_lock_bh(),</div><div class='ctx'> 	rcu_read_lock_sched(), or by the appropriate update-side lock.</div><div class='del'>-	Disabling of preemption can serve as rcu_read_lock_sched(), but</div><div class='del'>-	is less readable and prevents lockdep from detecting locking issues.</div><div class='add'>+	Explicit disabling of preemption (preempt_disable(), for example)</div><div class='add'>+	can serve as rcu_read_lock_sched(), but is less readable and</div><div class='add'>+	prevents lockdep from detecting locking issues.</div><div class='add'>+</div><div class='add'>+	Please note that you *cannot* rely on code known to be built</div><div class='add'>+	only in non-preemptible kernels.  Such code can and will break,</div><div class='add'>+	especially in kernels built with CONFIG_PREEMPT_COUNT=y.</div><div class='ctx'> </div><div class='ctx'> 	Letting RCU-protected pointers "leak" out of an RCU read-side</div><div class='ctx'> 	critical section is every bit as bad as letting them leak out</div><div class='hunk'>@@ -92,33 +97,38 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> </div><div class='ctx'> 	b.	Proceed as in (a) above, but also maintain per-element</div><div class='ctx'> 		locks (that are acquired by both readers and writers)</div><div class='del'>-		that guard per-element state.  Of course, fields that</div><div class='del'>-		the readers refrain from accessing can be guarded by</div><div class='del'>-		some other lock acquired only by updaters, if desired.</div><div class='add'>+		that guard per-element state.  Fields that the readers</div><div class='add'>+		refrain from accessing can be guarded by some other lock</div><div class='add'>+		acquired only by updaters, if desired.</div><div class='ctx'> </div><div class='del'>-		This works quite well, also.</div><div class='add'>+		This also works quite well.</div><div class='ctx'> </div><div class='ctx'> 	c.	Make updates appear atomic to readers.	For example,</div><div class='ctx'> 		pointer updates to properly aligned fields will</div><div class='ctx'> 		appear atomic, as will individual atomic primitives.</div><div class='ctx'> 		Sequences of operations performed under a lock will *not*</div><div class='ctx'> 		appear to be atomic to RCU readers, nor will sequences</div><div class='del'>-		of multiple atomic primitives.</div><div class='add'>+		of multiple atomic primitives.	One alternative is to</div><div class='add'>+		move multiple individual fields to a separate structure,</div><div class='add'>+		thus solving the multiple-field problem by imposing an</div><div class='add'>+		additional level of indirection.</div><div class='ctx'> </div><div class='ctx'> 		This can work, but is starting to get a bit tricky.</div><div class='ctx'> </div><div class='del'>-	d.	Carefully order the updates and the reads so that</div><div class='del'>-		readers see valid data at all phases of the update.</div><div class='del'>-		This is often more difficult than it sounds, especially</div><div class='del'>-		given modern CPUs' tendency to reorder memory references.</div><div class='del'>-		One must usually liberally sprinkle memory barriers</div><div class='del'>-		(smp_wmb(), smp_rmb(), smp_mb()) through the code,</div><div class='del'>-		making it difficult to understand and to test.</div><div class='del'>-</div><div class='del'>-		It is usually better to group the changing data into</div><div class='del'>-		a separate structure, so that the change may be made</div><div class='del'>-		to appear atomic by updating a pointer to reference</div><div class='del'>-		a new structure containing updated values.</div><div class='add'>+	d.	Carefully order the updates and the reads so that readers</div><div class='add'>+		see valid data at all phases of the update.  This is often</div><div class='add'>+		more difficult than it sounds, especially given modern</div><div class='add'>+		CPUs' tendency to reorder memory references.  One must</div><div class='add'>+		usually liberally sprinkle memory-ordering operations</div><div class='add'>+		through the code, making it difficult to understand and</div><div class='add'>+		to test.  Where it works, it is better to use things</div><div class='add'>+		like smp_store_release() and smp_load_acquire(), but in</div><div class='add'>+		some cases the smp_mb() full memory barrier is required.</div><div class='add'>+</div><div class='add'>+		As noted earlier, it is usually better to group the</div><div class='add'>+		changing data into a separate structure, so that the</div><div class='add'>+		change may be made to appear atomic by updating a pointer</div><div class='add'>+		to reference a new structure containing updated values.</div><div class='ctx'> </div><div class='ctx'> 4.	Weakly ordered CPUs pose special challenges.  Almost all CPUs</div><div class='ctx'> 	are weakly ordered -- even x86 CPUs allow later loads to be</div><div class='hunk'>@@ -140,8 +150,7 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 		prevents destructive compiler optimizations.  However,</div><div class='ctx'> 		with a bit of devious creativity, it is possible to</div><div class='ctx'> 		mishandle the return value from rcu_dereference().</div><div class='del'>-		Please see rcu_dereference.txt in this directory for</div><div class='del'>-		more information.</div><div class='add'>+		Please see rcu_dereference.rst for more information.</div><div class='ctx'> </div><div class='ctx'> 		The rcu_dereference() primitive is used by the</div><div class='ctx'> 		various "_rcu()" list-traversal primitives, such</div><div class='hunk'>@@ -151,7 +160,7 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 		primitives.  This is particularly useful in code that</div><div class='ctx'> 		is common to readers and updaters.  However, lockdep</div><div class='ctx'> 		will complain if you access rcu_dereference() outside</div><div class='del'>-		of an RCU read-side critical section.  See lockdep.txt</div><div class='add'>+		of an RCU read-side critical section.  See lockdep.rst</div><div class='ctx'> 		to learn what to do about this.</div><div class='ctx'> </div><div class='ctx'> 		Of course, neither rcu_dereference() nor the "_rcu()"</div><div class='hunk'>@@ -184,23 +193,29 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 		when publicizing a pointer to a structure that can</div><div class='ctx'> 		be traversed by an RCU read-side critical section.</div><div class='ctx'> </div><div class='del'>-5.	If call_rcu() or call_srcu() is used, the callback function will</div><div class='del'>-	be called from softirq context.  In particular, it cannot block.</div><div class='add'>+5.	If any of call_rcu(), call_srcu(), call_rcu_tasks(),</div><div class='add'>+	call_rcu_tasks_rude(), or call_rcu_tasks_trace() is used,</div><div class='add'>+	the callback function may be invoked from softirq context,</div><div class='add'>+	and in any case with bottom halves disabled.  In particular,</div><div class='add'>+	this callback function cannot block.  If you need the callback</div><div class='add'>+	to block, run that code in a workqueue handler scheduled from</div><div class='add'>+	the callback.  The queue_rcu_work() function does this for you</div><div class='add'>+	in the case of call_rcu().</div><div class='ctx'> </div><div class='ctx'> 6.	Since synchronize_rcu() can block, it cannot be called</div><div class='ctx'> 	from any sort of irq context.  The same rule applies</div><div class='del'>-	for synchronize_srcu(), synchronize_rcu_expedited(), and</div><div class='del'>-	synchronize_srcu_expedited().</div><div class='add'>+	for synchronize_srcu(), synchronize_rcu_expedited(),</div><div class='add'>+	synchronize_srcu_expedited(), synchronize_rcu_tasks(),</div><div class='add'>+	synchronize_rcu_tasks_rude(), and synchronize_rcu_tasks_trace().</div><div class='ctx'> </div><div class='ctx'> 	The expedited forms of these primitives have the same semantics</div><div class='del'>-	as the non-expedited forms, but expediting is both expensive and</div><div class='del'>-	(with the exception of synchronize_srcu_expedited()) unfriendly</div><div class='del'>-	to real-time workloads.  Use of the expedited primitives should</div><div class='del'>-	be restricted to rare configuration-change operations that would</div><div class='del'>-	not normally be undertaken while a real-time workload is running.</div><div class='del'>-	However, real-time workloads can use rcupdate.rcu_normal kernel</div><div class='del'>-	boot parameter to completely disable expedited grace periods,</div><div class='del'>-	though this might have performance implications.</div><div class='add'>+	as the non-expedited forms, but expediting is more CPU intensive.</div><div class='add'>+	Use of the expedited primitives should be restricted to rare</div><div class='add'>+	configuration-change operations that would not normally be</div><div class='add'>+	undertaken while a real-time workload is running.  Note that</div><div class='add'>+	IPI-sensitive real-time workloads can use the rcupdate.rcu_normal</div><div class='add'>+	kernel boot parameter to completely disable expedited grace</div><div class='add'>+	periods, though this might have performance implications.</div><div class='ctx'> </div><div class='ctx'> 	In particular, if you find yourself invoking one of the expedited</div><div class='ctx'> 	primitives repeatedly in a loop, please do everyone a favor:</div><div class='hunk'>@@ -208,8 +223,9 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	a single non-expedited primitive to cover the entire batch.</div><div class='ctx'> 	This will very likely be faster than the loop containing the</div><div class='ctx'> 	expedited primitive, and will be much much easier on the rest</div><div class='del'>-	of the system, especially to real-time workloads running on</div><div class='del'>-	the rest of the system.</div><div class='add'>+	of the system, especially to real-time workloads running on the</div><div class='add'>+	rest of the system.  Alternatively, instead use asynchronous</div><div class='add'>+	primitives such as call_rcu().</div><div class='ctx'> </div><div class='ctx'> 7.	As of v4.20, a given kernel implements only one RCU flavor, which</div><div class='ctx'> 	is RCU-sched for PREEMPTION=n and RCU-preempt for PREEMPTION=y.</div><div class='hunk'>@@ -232,7 +248,8 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	the corresponding readers must use rcu_read_lock_trace() and</div><div class='ctx'> 	rcu_read_unlock_trace().  If an updater uses call_rcu_tasks_rude()</div><div class='ctx'> 	or synchronize_rcu_tasks_rude(), then the corresponding readers</div><div class='del'>-	must use anything that disables interrupts.</div><div class='add'>+	must use anything that disables preemption, for example,</div><div class='add'>+	preempt_disable() and preempt_enable().</div><div class='ctx'> </div><div class='ctx'> 	Mixing things up will result in confusion and broken kernels, and</div><div class='ctx'> 	has even resulted in an exploitable security issue.  Therefore,</div><div class='hunk'>@@ -246,15 +263,16 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	that this usage is safe is that readers can use anything that</div><div class='ctx'> 	disables BH when updaters use call_rcu() or synchronize_rcu().</div><div class='ctx'> </div><div class='del'>-8.	Although synchronize_rcu() is slower than is call_rcu(), it</div><div class='del'>-	usually results in simpler code.  So, unless update performance is</div><div class='del'>-	critically important, the updaters cannot block, or the latency of</div><div class='del'>-	synchronize_rcu() is visible from userspace, synchronize_rcu()</div><div class='del'>-	should be used in preference to call_rcu().  Furthermore,</div><div class='del'>-	kfree_rcu() usually results in even simpler code than does</div><div class='del'>-	synchronize_rcu() without synchronize_rcu()'s multi-millisecond</div><div class='del'>-	latency.  So please take advantage of kfree_rcu()'s "fire and</div><div class='del'>-	forget" memory-freeing capabilities where it applies.</div><div class='add'>+8.	Although synchronize_rcu() is slower than is call_rcu(),</div><div class='add'>+	it usually results in simpler code.  So, unless update</div><div class='add'>+	performance is critically important, the updaters cannot block,</div><div class='add'>+	or the latency of synchronize_rcu() is visible from userspace,</div><div class='add'>+	synchronize_rcu() should be used in preference to call_rcu().</div><div class='add'>+	Furthermore, kfree_rcu() and kvfree_rcu() usually result</div><div class='add'>+	in even simpler code than does synchronize_rcu() without</div><div class='add'>+	synchronize_rcu()'s multi-millisecond latency.	So please take</div><div class='add'>+	advantage of kfree_rcu()'s and kvfree_rcu()'s "fire and forget"</div><div class='add'>+	memory-freeing capabilities where it applies.</div><div class='ctx'> </div><div class='ctx'> 	An especially important property of the synchronize_rcu()</div><div class='ctx'> 	primitive is that it automatically self-limits: if grace periods</div><div class='hunk'>@@ -264,8 +282,8 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	cases where grace periods are delayed, as failing to do so can</div><div class='ctx'> 	result in excessive realtime latencies or even OOM conditions.</div><div class='ctx'> </div><div class='del'>-	Ways of gaining this self-limiting property when using call_rcu()</div><div class='del'>-	include:</div><div class='add'>+	Ways of gaining this self-limiting property when using call_rcu(),</div><div class='add'>+	kfree_rcu(), or kvfree_rcu() include:</div><div class='ctx'> </div><div class='ctx'> 	a.	Keeping a count of the number of data-structure elements</div><div class='ctx'> 		used by the RCU-protected data structure, including</div><div class='hunk'>@@ -297,17 +315,21 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 		here is that superuser already has lots of ways to crash</div><div class='ctx'> 		the machine.</div><div class='ctx'> </div><div class='del'>-	d.	Periodically invoke synchronize_rcu(), permitting a limited</div><div class='add'>+	d.	Periodically invoke rcu_barrier(), permitting a limited</div><div class='ctx'> 		number of updates per grace period.</div><div class='ctx'> </div><div class='del'>-	The same cautions apply to call_srcu() and kfree_rcu().</div><div class='add'>+	The same cautions apply to call_srcu(), call_rcu_tasks(),</div><div class='add'>+	call_rcu_tasks_rude(), and call_rcu_tasks_trace().  This is</div><div class='add'>+	why there is an srcu_barrier(), rcu_barrier_tasks(),</div><div class='add'>+	rcu_barrier_tasks_rude(), and rcu_barrier_tasks_rude(),</div><div class='add'>+	respectively.</div><div class='ctx'> </div><div class='del'>-	Note that although these primitives do take action to avoid memory</div><div class='del'>-	exhaustion when any given CPU has too many callbacks, a determined</div><div class='del'>-	user could still exhaust memory.  This is especially the case</div><div class='del'>-	if a system with a large number of CPUs has been configured to</div><div class='del'>-	offload all of its RCU callbacks onto a single CPU, or if the</div><div class='del'>-	system has relatively little free memory.</div><div class='add'>+	Note that although these primitives do take action to avoid</div><div class='add'>+	memory exhaustion when any given CPU has too many callbacks,</div><div class='add'>+	a determined user or administrator can still exhaust memory.</div><div class='add'>+	This is especially the case if a system with a large number of</div><div class='add'>+	CPUs has been configured to offload all of its RCU callbacks onto</div><div class='add'>+	a single CPU, or if the system has relatively little free memory.</div><div class='ctx'> </div><div class='ctx'> 9.	All RCU list-traversal primitives, which include</div><div class='ctx'> 	rcu_dereference(), list_for_each_entry_rcu(), and</div><div class='hunk'>@@ -323,7 +345,7 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	primitives when the update-side lock is held is that doing so</div><div class='ctx'> 	can be quite helpful in reducing code bloat when common code is</div><div class='ctx'> 	shared between readers and updaters.  Additional primitives</div><div class='del'>-	are provided for this case, as discussed in lockdep.txt.</div><div class='add'>+	are provided for this case, as discussed in lockdep.rst.</div><div class='ctx'> </div><div class='ctx'> 	One exception to this rule is when data is only ever added to</div><div class='ctx'> 	the linked data structure, and is never removed during any</div><div class='hunk'>@@ -336,14 +358,14 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	and you don't hold the appropriate update-side lock, you *must*</div><div class='ctx'> 	use the "_rcu()" variants of the list macros.  Failing to do so</div><div class='ctx'> 	will break Alpha, cause aggressive compilers to generate bad code,</div><div class='del'>-	and confuse people trying to read your code.</div><div class='add'>+	and confuse people trying to understand your code.</div><div class='ctx'> </div><div class='ctx'> 11.	Any lock acquired by an RCU callback must be acquired elsewhere</div><div class='del'>-	with softirq disabled, e.g., via spin_lock_irqsave(),</div><div class='del'>-	spin_lock_bh(), etc.  Failing to disable softirq on a given</div><div class='del'>-	acquisition of that lock will result in deadlock as soon as</div><div class='del'>-	the RCU softirq handler happens to run your RCU callback while</div><div class='del'>-	interrupting that acquisition's critical section.</div><div class='add'>+	with softirq disabled, e.g., via spin_lock_bh().  Failing to</div><div class='add'>+	disable softirq on a given acquisition of that lock will result</div><div class='add'>+	in deadlock as soon as the RCU softirq handler happens to run</div><div class='add'>+	your RCU callback while interrupting that acquisition's critical</div><div class='add'>+	section.</div><div class='ctx'> </div><div class='ctx'> 12.	RCU callbacks can be and are executed in parallel.  In many cases,</div><div class='ctx'> 	the callback code simply wrappers around kfree(), so that this</div><div class='hunk'>@@ -364,7 +386,17 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	for some  real-time workloads, this is the whole point of using</div><div class='ctx'> 	the rcu_nocbs= kernel boot parameter.</div><div class='ctx'> </div><div class='del'>-13.	Unlike other forms of RCU, it *is* permissible to block in an</div><div class='add'>+	In addition, do not assume that callbacks queued in a given order</div><div class='add'>+	will be invoked in that order, even if they all are queued on the</div><div class='add'>+	same CPU.  Furthermore, do not assume that same-CPU callbacks will</div><div class='add'>+	be invoked serially.  For example, in recent kernels, CPUs can be</div><div class='add'>+	switched between offloaded and de-offloaded callback invocation,</div><div class='add'>+	and while a given CPU is undergoing such a switch, its callbacks</div><div class='add'>+	might be concurrently invoked by that CPU's softirq handler and</div><div class='add'>+	that CPU's rcuo kthread.  At such times, that CPU's callbacks</div><div class='add'>+	might be executed both concurrently and out of order.</div><div class='add'>+</div><div class='add'>+13.	Unlike most flavors of RCU, it *is* permissible to block in an</div><div class='ctx'> 	SRCU read-side critical section (demarked by srcu_read_lock()</div><div class='ctx'> 	and srcu_read_unlock()), hence the "SRCU": "sleepable RCU".</div><div class='ctx'> 	Please note that if you don't need to sleep in read-side critical</div><div class='hunk'>@@ -404,6 +436,12 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	never sends IPIs to other CPUs, so it is easier on</div><div class='ctx'> 	real-time workloads than is synchronize_rcu_expedited().</div><div class='ctx'> </div><div class='add'>+	It is also permissible to sleep in RCU Tasks Trace read-side</div><div class='add'>+	critical, which are delimited by rcu_read_lock_trace() and</div><div class='add'>+	rcu_read_unlock_trace().  However, this is a specialized flavor</div><div class='add'>+	of RCU, and you should not use it without first checking with</div><div class='add'>+	its current users.  In most cases, you should instead use SRCU.</div><div class='add'>+</div><div class='ctx'> 	Note that rcu_assign_pointer() relates to SRCU just as it does to</div><div class='ctx'> 	other forms of RCU, but instead of rcu_dereference() you should</div><div class='ctx'> 	use srcu_dereference() in order to avoid lockdep splats.</div><div class='hunk'>@@ -434,50 +472,62 @@ over a rather long period of time, but improvements are always welcome!</div><div class='ctx'> 	find problems as follows:</div><div class='ctx'> </div><div class='ctx'> 	CONFIG_PROVE_LOCKING:</div><div class='del'>-		check that accesses to RCU-protected data</div><div class='del'>-		structures are carried out under the proper RCU</div><div class='del'>-		read-side critical section, while holding the right</div><div class='del'>-		combination of locks, or whatever other conditions</div><div class='del'>-		are appropriate.</div><div class='add'>+		check that accesses to RCU-protected data structures</div><div class='add'>+		are carried out under the proper RCU read-side critical</div><div class='add'>+		section, while holding the right combination of locks,</div><div class='add'>+		or whatever other conditions are appropriate.</div><div class='ctx'> </div><div class='ctx'> 	CONFIG_DEBUG_OBJECTS_RCU_HEAD:</div><div class='del'>-		check that you don't pass the</div><div class='del'>-		same object to call_rcu() (or friends) before an RCU</div><div class='del'>-		grace period has elapsed since the last time that you</div><div class='del'>-		passed that same object to call_rcu() (or friends).</div><div class='add'>+		check that you don't pass the same object to call_rcu()</div><div class='add'>+		(or friends) before an RCU grace period has elapsed</div><div class='add'>+		since the last time that you passed that same object to</div><div class='add'>+		call_rcu() (or friends).</div><div class='ctx'> </div><div class='ctx'> 	__rcu sparse checks:</div><div class='del'>-		tag the pointer to the RCU-protected data</div><div class='del'>-		structure with __rcu, and sparse will warn you if you</div><div class='del'>-		access that pointer without the services of one of the</div><div class='del'>-		variants of rcu_dereference().</div><div class='add'>+		tag the pointer to the RCU-protected data structure</div><div class='add'>+		with __rcu, and sparse will warn you if you access that</div><div class='add'>+		pointer without the services of one of the variants</div><div class='add'>+		of rcu_dereference().</div><div class='ctx'> </div><div class='ctx'> 	These debugging aids can help you find problems that are</div><div class='ctx'> 	otherwise extremely difficult to spot.</div><div class='ctx'> </div><div class='del'>-17.	If you register a callback using call_rcu() or call_srcu(), and</div><div class='del'>-	pass in a function defined within a loadable module, then it in</div><div class='del'>-	necessary to wait for all pending callbacks to be invoked after</div><div class='del'>-	the last invocation and before unloading that module.  Note that</div><div class='del'>-	it is absolutely *not* sufficient to wait for a grace period!</div><div class='del'>-	The current (say) synchronize_rcu() implementation is *not*</div><div class='del'>-	guaranteed to wait for callbacks registered on other CPUs.</div><div class='del'>-	Or even on the current CPU if that CPU recently went offline</div><div class='del'>-	and came back online.</div><div class='add'>+17.	If you pass a callback function defined within a module to one of</div><div class='add'>+	call_rcu(), call_srcu(), call_rcu_tasks(), call_rcu_tasks_rude(),</div><div class='add'>+	or call_rcu_tasks_trace(), then it is necessary to wait for all</div><div class='add'>+	pending callbacks to be invoked before unloading that module.</div><div class='add'>+	Note that it is absolutely *not* sufficient to wait for a grace</div><div class='add'>+	period!  For example, synchronize_rcu() implementation is *not*</div><div class='add'>+	guaranteed to wait for callbacks registered on other CPUs via</div><div class='add'>+	call_rcu().  Or even on the current CPU if that CPU recently</div><div class='add'>+	went offline and came back online.</div><div class='ctx'> </div><div class='ctx'> 	You instead need to use one of the barrier functions:</div><div class='ctx'> </div><div class='ctx'> 	-	call_rcu() -&gt; rcu_barrier()</div><div class='ctx'> 	-	call_srcu() -&gt; srcu_barrier()</div><div class='add'>+	-	call_rcu_tasks() -&gt; rcu_barrier_tasks()</div><div class='add'>+	-	call_rcu_tasks_rude() -&gt; rcu_barrier_tasks_rude()</div><div class='add'>+	-	call_rcu_tasks_trace() -&gt; rcu_barrier_tasks_trace()</div><div class='ctx'> </div><div class='ctx'> 	However, these barrier functions are absolutely *not* guaranteed</div><div class='del'>-	to wait for a grace period.  In fact, if there are no call_rcu()</div><div class='del'>-	callbacks waiting anywhere in the system, rcu_barrier() is within</div><div class='del'>-	its rights to return immediately.</div><div class='del'>-</div><div class='del'>-	So if you need to wait for both an RCU grace period and for</div><div class='del'>-	all pre-existing call_rcu() callbacks, you will need to execute</div><div class='del'>-	both rcu_barrier() and synchronize_rcu(), if necessary, using</div><div class='del'>-	something like workqueues to to execute them concurrently.</div><div class='del'>-</div><div class='del'>-	See rcubarrier.txt for more information.</div><div class='add'>+	to wait for a grace period.  For example, if there are no</div><div class='add'>+	call_rcu() callbacks queued anywhere in the system, rcu_barrier()</div><div class='add'>+	can and will return immediately.</div><div class='add'>+</div><div class='add'>+	So if you need to wait for both a grace period and for all</div><div class='add'>+	pre-existing callbacks, you will need to invoke both functions,</div><div class='add'>+	with the pair depending on the flavor of RCU:</div><div class='add'>+</div><div class='add'>+	-	Either synchronize_rcu() or synchronize_rcu_expedited(),</div><div class='add'>+		together with rcu_barrier()</div><div class='add'>+	-	Either synchronize_srcu() or synchronize_srcu_expedited(),</div><div class='add'>+		together with and srcu_barrier()</div><div class='add'>+	-	synchronize_rcu_tasks() and rcu_barrier_tasks()</div><div class='add'>+	-	synchronize_tasks_rude() and rcu_barrier_tasks_rude()</div><div class='add'>+	-	synchronize_tasks_trace() and rcu_barrier_tasks_trace()</div><div class='add'>+</div><div class='add'>+	If necessary, you can use something like workqueues to execute</div><div class='add'>+	the requisite pair of functions concurrently.</div><div class='add'>+</div><div class='add'>+	See rcubarrier.rst for more information.</div><div class='head'>diff --git a/Documentation/RCU/index.rst b/Documentation/RCU/index.rst<br/>index e703d3dbe60c..84a79903f6a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/index.rst</a></div><div class='hunk'>@@ -9,7 +9,6 @@ RCU concepts</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 3</div><div class='ctx'> </div><div class='del'>-   arrayRCU</div><div class='ctx'>    checklist</div><div class='ctx'>    lockdep</div><div class='ctx'>    lockdep-splat</div><div class='head'>diff --git a/Documentation/RCU/listRCU.rst b/Documentation/RCU/listRCU.rst<br/>index 2a643e293fb4..bdc4bcc5289f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/listRCU.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/listRCU.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/listRCU.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/listRCU.rst</a></div><div class='hunk'>@@ -3,11 +3,10 @@</div><div class='ctx'> Using RCU to Protect Read-Mostly Linked Lists</div><div class='ctx'> =============================================</div><div class='ctx'> </div><div class='del'>-One of the best applications of RCU is to protect read-mostly linked lists</div><div class='del'>-(``struct list_head`` in list.h).  One big advantage of this approach</div><div class='del'>-is that all of the required memory barriers are included for you in</div><div class='del'>-the list macros.  This document describes several applications of RCU,</div><div class='del'>-with the best fits first.</div><div class='add'>+One of the most common uses of RCU is protecting read-mostly linked lists</div><div class='add'>+(``struct list_head`` in list.h).  One big advantage of this approach is</div><div class='add'>+that all of the required memory ordering is provided by the list macros.</div><div class='add'>+This document describes several list-based RCU use cases.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Example 1: Read-mostly list: Deferred Destruction</div><div class='hunk'>@@ -35,7 +34,8 @@ The code traversing the list of all processes typically looks like::</div><div class='ctx'> 	}</div><div class='ctx'> 	rcu_read_unlock();</div><div class='ctx'> </div><div class='del'>-The simplified code for removing a process from a task list is::</div><div class='add'>+The simplified and heavily inlined code for removing a process from a</div><div class='add'>+task list is::</div><div class='ctx'> </div><div class='ctx'> 	void release_task(struct task_struct *p)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -45,39 +45,48 @@ The simplified code for removing a process from a task list is::</div><div class='ctx'> 		call_rcu(&amp;p-&gt;rcu, delayed_put_task_struct);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-When a process exits, ``release_task()`` calls ``list_del_rcu(&amp;p-&gt;tasks)`` under</div><div class='del'>-``tasklist_lock`` writer lock protection, to remove the task from the list of</div><div class='del'>-all tasks. The ``tasklist_lock`` prevents concurrent list additions/removals</div><div class='del'>-from corrupting the list. Readers using ``for_each_process()`` are not protected</div><div class='del'>-with the ``tasklist_lock``. To prevent readers from noticing changes in the list</div><div class='del'>-pointers, the ``task_struct`` object is freed only after one or more grace</div><div class='del'>-periods elapse (with the help of call_rcu()). This deferring of destruction</div><div class='del'>-ensures that any readers traversing the list will see valid ``p-&gt;tasks.next``</div><div class='del'>-pointers and deletion/freeing can happen in parallel with traversal of the list.</div><div class='del'>-This pattern is also called an **existence lock**, since RCU pins the object in</div><div class='del'>-memory until all existing readers finish.</div><div class='add'>+When a process exits, ``release_task()`` calls ``list_del_rcu(&amp;p-&gt;tasks)``</div><div class='add'>+via __exit_signal() and __unhash_process() under ``tasklist_lock``</div><div class='add'>+writer lock protection.  The list_del_rcu() invocation removes</div><div class='add'>+the task from the list of all tasks. The ``tasklist_lock``</div><div class='add'>+prevents concurrent list additions/removals from corrupting the</div><div class='add'>+list. Readers using ``for_each_process()`` are not protected with the</div><div class='add'>+``tasklist_lock``. To prevent readers from noticing changes in the list</div><div class='add'>+pointers, the ``task_struct`` object is freed only after one or more</div><div class='add'>+grace periods elapse, with the help of call_rcu(), which is invoked via</div><div class='add'>+put_task_struct_rcu_user(). This deferring of destruction ensures that</div><div class='add'>+any readers traversing the list will see valid ``p-&gt;tasks.next`` pointers</div><div class='add'>+and deletion/freeing can happen in parallel with traversal of the list.</div><div class='add'>+This pattern is also called an **existence lock**, since RCU refrains</div><div class='add'>+from invoking the delayed_put_task_struct() callback function until</div><div class='add'>+all existing readers finish, which guarantees that the ``task_struct``</div><div class='add'>+object in question will remain in existence until after the completion</div><div class='add'>+of all RCU readers that might possibly have a reference to that object.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Example 2: Read-Side Action Taken Outside of Lock: No In-Place Updates</div><div class='ctx'> ----------------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-The best applications are cases where, if reader-writer locking were</div><div class='del'>-used, the read-side lock would be dropped before taking any action</div><div class='del'>-based on the results of the search.  The most celebrated example is</div><div class='del'>-the routing table.  Because the routing table is tracking the state of</div><div class='del'>-equipment outside of the computer, it will at times contain stale data.</div><div class='del'>-Therefore, once the route has been computed, there is no need to hold</div><div class='del'>-the routing table static during transmission of the packet.  After all,</div><div class='del'>-you can hold the routing table static all you want, but that won't keep</div><div class='del'>-the external Internet from changing, and it is the state of the external</div><div class='del'>-Internet that really matters.  In addition, routing entries are typically</div><div class='del'>-added or deleted, rather than being modified in place.</div><div class='del'>-</div><div class='del'>-A straightforward example of this use of RCU may be found in the</div><div class='del'>-system-call auditing support.  For example, a reader-writer locked</div><div class='add'>+Some reader-writer locking use cases compute a value while holding</div><div class='add'>+the read-side lock, but continue to use that value after that lock is</div><div class='add'>+released.  These use cases are often good candidates for conversion</div><div class='add'>+to RCU.  One prominent example involves network packet routing.</div><div class='add'>+Because the packet-routing data tracks the state of equipment outside</div><div class='add'>+of the computer, it will at times contain stale data.  Therefore, once</div><div class='add'>+the route has been computed, there is no need to hold the routing table</div><div class='add'>+static during transmission of the packet.  After all, you can hold the</div><div class='add'>+routing table static all you want, but that won't keep the external</div><div class='add'>+Internet from changing, and it is the state of the external Internet</div><div class='add'>+that really matters.  In addition, routing entries are typically added</div><div class='add'>+or deleted, rather than being modified in place.  This is a rare example</div><div class='add'>+of the finite speed of light and the non-zero size of atoms actually</div><div class='add'>+helping make synchronization be lighter weight.</div><div class='add'>+</div><div class='add'>+A straightforward example of this type of RCU use case may be found in</div><div class='add'>+the system-call auditing support.  For example, a reader-writer locked</div><div class='ctx'> implementation of ``audit_filter_task()`` might be as follows::</div><div class='ctx'> </div><div class='del'>-	static enum audit_state audit_filter_task(struct task_struct *tsk)</div><div class='add'>+	static enum audit_state audit_filter_task(struct task_struct *tsk, char **key)</div><div class='ctx'> 	{</div><div class='ctx'> 		struct audit_entry *e;</div><div class='ctx'> 		enum audit_state   state;</div><div class='hunk'>@@ -86,6 +95,8 @@ implementation of ``audit_filter_task()`` might be as follows::</div><div class='ctx'> 		/* Note: audit_filter_mutex held by caller. */</div><div class='ctx'> 		list_for_each_entry(e, &amp;audit_tsklist, list) {</div><div class='ctx'> 			if (audit_filter_rules(tsk, &amp;e-&gt;rule, NULL, &amp;state)) {</div><div class='add'>+				if (state == AUDIT_STATE_RECORD)</div><div class='add'>+					*key = kstrdup(e-&gt;rule.filterkey, GFP_ATOMIC);</div><div class='ctx'> 				read_unlock(&amp;auditsc_lock);</div><div class='ctx'> 				return state;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -101,7 +112,7 @@ you are turning auditing off, it is OK to audit a few extra system calls.</div><div class='ctx'> </div><div class='ctx'> This means that RCU can be easily applied to the read side, as follows::</div><div class='ctx'> </div><div class='del'>-	static enum audit_state audit_filter_task(struct task_struct *tsk)</div><div class='add'>+	static enum audit_state audit_filter_task(struct task_struct *tsk, char **key)</div><div class='ctx'> 	{</div><div class='ctx'> 		struct audit_entry *e;</div><div class='ctx'> 		enum audit_state   state;</div><div class='hunk'>@@ -110,6 +121,8 @@ This means that RCU can be easily applied to the read side, as follows::</div><div class='ctx'> 		/* Note: audit_filter_mutex held by caller. */</div><div class='ctx'> 		list_for_each_entry_rcu(e, &amp;audit_tsklist, list) {</div><div class='ctx'> 			if (audit_filter_rules(tsk, &amp;e-&gt;rule, NULL, &amp;state)) {</div><div class='add'>+				if (state == AUDIT_STATE_RECORD)</div><div class='add'>+					*key = kstrdup(e-&gt;rule.filterkey, GFP_ATOMIC);</div><div class='ctx'> 				rcu_read_unlock();</div><div class='ctx'> 				return state;</div><div class='ctx'> 			}</div><div class='hunk'>@@ -118,13 +131,15 @@ This means that RCU can be easily applied to the read side, as follows::</div><div class='ctx'> 		return AUDIT_BUILD_CONTEXT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-The ``read_lock()`` and ``read_unlock()`` calls have become rcu_read_lock()</div><div class='del'>-and rcu_read_unlock(), respectively, and the list_for_each_entry() has</div><div class='del'>-become list_for_each_entry_rcu().  The **_rcu()** list-traversal primitives</div><div class='del'>-insert the read-side memory barriers that are required on DEC Alpha CPUs.</div><div class='add'>+The read_lock() and read_unlock() calls have become rcu_read_lock()</div><div class='add'>+and rcu_read_unlock(), respectively, and the list_for_each_entry()</div><div class='add'>+has become list_for_each_entry_rcu().  The **_rcu()** list-traversal</div><div class='add'>+primitives add READ_ONCE() and diagnostic checks for incorrect use</div><div class='add'>+outside of an RCU read-side critical section.</div><div class='ctx'> </div><div class='ctx'> The changes to the update side are also straightforward. A reader-writer lock</div><div class='del'>-might be used as follows for deletion and insertion::</div><div class='add'>+might be used as follows for deletion and insertion in these simplified</div><div class='add'>+versions of audit_del_rule() and audit_add_rule()::</div><div class='ctx'> </div><div class='ctx'> 	static inline int audit_del_rule(struct audit_rule *rule,</div><div class='ctx'> 					 struct list_head *list)</div><div class='hunk'>@@ -188,16 +203,16 @@ Following are the RCU equivalents for these two functions::</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-Normally, the ``write_lock()`` and ``write_unlock()`` would be replaced by a</div><div class='add'>+Normally, the write_lock() and write_unlock() would be replaced by a</div><div class='ctx'> spin_lock() and a spin_unlock(). But in this case, all callers hold</div><div class='ctx'> ``audit_filter_mutex``, so no additional locking is required. The</div><div class='del'>-``auditsc_lock`` can therefore be eliminated, since use of RCU eliminates the</div><div class='add'>+auditsc_lock can therefore be eliminated, since use of RCU eliminates the</div><div class='ctx'> need for writers to exclude readers.</div><div class='ctx'> </div><div class='ctx'> The list_del(), list_add(), and list_add_tail() primitives have been</div><div class='ctx'> replaced by list_del_rcu(), list_add_rcu(), and list_add_tail_rcu().</div><div class='del'>-The **_rcu()** list-manipulation primitives add memory barriers that are needed on</div><div class='del'>-weakly ordered CPUs (most of them!).  The list_del_rcu() primitive omits the</div><div class='add'>+The **_rcu()** list-manipulation primitives add memory barriers that are</div><div class='add'>+needed on weakly ordered CPUs.  The list_del_rcu() primitive omits the</div><div class='ctx'> pointer poisoning debug-assist code that would otherwise cause concurrent</div><div class='ctx'> readers to fail spectacularly.</div><div class='ctx'> </div><div class='hunk'>@@ -238,7 +253,9 @@ need to be filled in)::</div><div class='ctx'> The RCU version creates a copy, updates the copy, then replaces the old</div><div class='ctx'> entry with the newly updated entry.  This sequence of actions, allowing</div><div class='ctx'> concurrent reads while making a copy to perform an update, is what gives</div><div class='del'>-RCU (*read-copy update*) its name.  The RCU code is as follows::</div><div class='add'>+RCU (*read-copy update*) its name.</div><div class='add'>+</div><div class='add'>+The RCU version of audit_upd_rule() is as follows::</div><div class='ctx'> </div><div class='ctx'> 	static inline int audit_upd_rule(struct audit_rule *rule,</div><div class='ctx'> 					 struct list_head *list,</div><div class='hunk'>@@ -267,6 +284,9 @@ RCU (*read-copy update*) its name.  The RCU code is as follows::</div><div class='ctx'> Again, this assumes that the caller holds ``audit_filter_mutex``.  Normally, the</div><div class='ctx'> writer lock would become a spinlock in this sort of code.</div><div class='ctx'> </div><div class='add'>+The update_lsm_rule() does something very similar, for those who would</div><div class='add'>+prefer to look at real Linux-kernel code.</div><div class='add'>+</div><div class='ctx'> Another use of this pattern can be found in the openswitch driver's *connection</div><div class='ctx'> tracking table* code in ``ct_limit_set()``.  The table holds connection tracking</div><div class='ctx'> entries and has a limit on the maximum entries.  There is one such table</div><div class='hunk'>@@ -281,9 +301,10 @@ Example 4: Eliminating Stale Data</div><div class='ctx'> ---------------------------------</div><div class='ctx'> </div><div class='ctx'> The auditing example above tolerates stale data, as do most algorithms</div><div class='del'>-that are tracking external state.  Because there is a delay from the</div><div class='del'>-time the external state changes before Linux becomes aware of the change,</div><div class='del'>-additional RCU-induced staleness is generally not a problem.</div><div class='add'>+that are tracking external state.  After all, given there is a delay</div><div class='add'>+from the time the external state changes before Linux becomes aware</div><div class='add'>+of the change, and so as noted earlier, a small quantity of additional</div><div class='add'>+RCU-induced staleness is generally not a problem.</div><div class='ctx'> </div><div class='ctx'> However, there are many examples where stale data cannot be tolerated.</div><div class='ctx'> One example in the Linux kernel is the System V IPC (see the shm_lock()</div><div class='hunk'>@@ -302,7 +323,7 @@ Quick Quiz:</div><div class='ctx'> </div><div class='ctx'> If the system-call audit module were to ever need to reject stale data, one way</div><div class='ctx'> to accomplish this would be to add a ``deleted`` flag and a ``lock`` spinlock to the</div><div class='del'>-audit_entry structure, and modify ``audit_filter_task()`` as follows::</div><div class='add'>+``audit_entry`` structure, and modify audit_filter_task() as follows::</div><div class='ctx'> </div><div class='ctx'> 	static enum audit_state audit_filter_task(struct task_struct *tsk)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -319,6 +340,8 @@ audit_entry structure, and modify ``audit_filter_task()`` as follows::</div><div class='ctx'> 					return AUDIT_BUILD_CONTEXT;</div><div class='ctx'> 				}</div><div class='ctx'> 				rcu_read_unlock();</div><div class='add'>+				if (state == AUDIT_STATE_RECORD)</div><div class='add'>+					*key = kstrdup(e-&gt;rule.filterkey, GFP_ATOMIC);</div><div class='ctx'> 				return state;</div><div class='ctx'> 			}</div><div class='ctx'> 		}</div><div class='hunk'>@@ -326,12 +349,6 @@ audit_entry structure, and modify ``audit_filter_task()`` as follows::</div><div class='ctx'> 		return AUDIT_BUILD_CONTEXT;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-Note that this example assumes that entries are only added and deleted.</div><div class='del'>-Additional mechanism is required to deal correctly with the update-in-place</div><div class='del'>-performed by ``audit_upd_rule()``.  For one thing, ``audit_upd_rule()`` would</div><div class='del'>-need additional memory barriers to ensure that the list_add_rcu() was really</div><div class='del'>-executed before the list_del_rcu().</div><div class='del'>-</div><div class='ctx'> The ``audit_del_rule()`` function would need to set the ``deleted`` flag under the</div><div class='ctx'> spinlock as follows::</div><div class='ctx'> </div><div class='hunk'>@@ -357,24 +374,32 @@ spinlock as follows::</div><div class='ctx'> </div><div class='ctx'> This too assumes that the caller holds ``audit_filter_mutex``.</div><div class='ctx'> </div><div class='add'>+Note that this example assumes that entries are only added and deleted.</div><div class='add'>+Additional mechanism is required to deal correctly with the update-in-place</div><div class='add'>+performed by audit_upd_rule().  For one thing, audit_upd_rule() would</div><div class='add'>+need to hold the locks of both the old ``audit_entry`` and its replacement</div><div class='add'>+while executing the list_replace_rcu().</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Example 5: Skipping Stale Objects</div><div class='ctx'> ---------------------------------</div><div class='ctx'> </div><div class='del'>-For some usecases, reader performance can be improved by skipping stale objects</div><div class='del'>-during read-side list traversal if the object in concern is pending destruction</div><div class='del'>-after one or more grace periods. One such example can be found in the timerfd</div><div class='del'>-subsystem. When a ``CLOCK_REALTIME`` clock is reprogrammed - for example due to</div><div class='del'>-setting of the system time, then all programmed timerfds that depend on this</div><div class='del'>-clock get triggered and processes waiting on them to expire are woken up in</div><div class='del'>-advance of their scheduled expiry. To facilitate this, all such timers are added</div><div class='del'>-to an RCU-managed ``cancel_list`` when they are setup in</div><div class='add'>+For some use cases, reader performance can be improved by skipping</div><div class='add'>+stale objects during read-side list traversal, where stale objects</div><div class='add'>+are those that will be removed and destroyed after one or more grace</div><div class='add'>+periods. One such example can be found in the timerfd subsystem. When a</div><div class='add'>+``CLOCK_REALTIME`` clock is reprogrammed (for example due to setting</div><div class='add'>+of the system time) then all programmed ``timerfds`` that depend on</div><div class='add'>+this clock get triggered and processes waiting on them are awakened in</div><div class='add'>+advance of their scheduled expiry. To facilitate this, all such timers</div><div class='add'>+are added to an RCU-managed ``cancel_list`` when they are setup in</div><div class='ctx'> ``timerfd_setup_cancel()``::</div><div class='ctx'> </div><div class='ctx'> 	static void timerfd_setup_cancel(struct timerfd_ctx *ctx, int flags)</div><div class='ctx'> 	{</div><div class='ctx'> 		spin_lock(&amp;ctx-&gt;cancel_lock);</div><div class='del'>-		if ((ctx-&gt;clockid == CLOCK_REALTIME &amp;&amp;</div><div class='add'>+		if ((ctx-&gt;clockid == CLOCK_REALTIME ||</div><div class='add'>+		     ctx-&gt;clockid == CLOCK_REALTIME_ALARM) &amp;&amp;</div><div class='ctx'> 		    (flags &amp; TFD_TIMER_ABSTIME) &amp;&amp; (flags &amp; TFD_TIMER_CANCEL_ON_SET)) {</div><div class='ctx'> 			if (!ctx-&gt;might_cancel) {</div><div class='ctx'> 				ctx-&gt;might_cancel = true;</div><div class='hunk'>@@ -382,13 +407,16 @@ to an RCU-managed ``cancel_list`` when they are setup in</div><div class='ctx'> 				list_add_rcu(&amp;ctx-&gt;clist, &amp;cancel_list);</div><div class='ctx'> 				spin_unlock(&amp;cancel_lock);</div><div class='ctx'> 			}</div><div class='add'>+		} else {</div><div class='add'>+			__timerfd_remove_cancel(ctx);</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock(&amp;ctx-&gt;cancel_lock);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-When a timerfd is freed (fd is closed), then the ``might_cancel`` flag of the</div><div class='del'>-timerfd object is cleared, the object removed from the ``cancel_list`` and</div><div class='del'>-destroyed::</div><div class='add'>+When a timerfd is freed (fd is closed), then the ``might_cancel``</div><div class='add'>+flag of the timerfd object is cleared, the object removed from the</div><div class='add'>+``cancel_list`` and destroyed, as shown in this simplified and inlined</div><div class='add'>+version of timerfd_release()::</div><div class='ctx'> </div><div class='ctx'> 	int timerfd_release(struct inode *inode, struct file *file)</div><div class='ctx'> 	{</div><div class='hunk'>@@ -403,7 +431,10 @@ destroyed::</div><div class='ctx'> 		}</div><div class='ctx'> 		spin_unlock(&amp;ctx-&gt;cancel_lock);</div><div class='ctx'> </div><div class='del'>-		hrtimer_cancel(&amp;ctx-&gt;t.tmr);</div><div class='add'>+		if (isalarm(ctx))</div><div class='add'>+			alarm_cancel(&amp;ctx-&gt;t.alarm);</div><div class='add'>+		else</div><div class='add'>+			hrtimer_cancel(&amp;ctx-&gt;t.tmr);</div><div class='ctx'> 		kfree_rcu(ctx, rcu);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='hunk'>@@ -416,6 +447,7 @@ objects::</div><div class='ctx'> </div><div class='ctx'> 	void timerfd_clock_was_set(void)</div><div class='ctx'> 	{</div><div class='add'>+		ktime_t moffs = ktime_mono_to_real(0);</div><div class='ctx'> 		struct timerfd_ctx *ctx;</div><div class='ctx'> 		unsigned long flags;</div><div class='ctx'> </div><div class='hunk'>@@ -424,7 +456,7 @@ objects::</div><div class='ctx'> 			if (!ctx-&gt;might_cancel)</div><div class='ctx'> 				continue;</div><div class='ctx'> 			spin_lock_irqsave(&amp;ctx-&gt;wqh.lock, flags);</div><div class='del'>-			if (ctx-&gt;moffs != ktime_mono_to_real(0)) {</div><div class='add'>+			if (ctx-&gt;moffs != moffs) {</div><div class='ctx'> 				ctx-&gt;moffs = KTIME_MAX;</div><div class='ctx'> 				ctx-&gt;ticks++;</div><div class='ctx'> 				wake_up_locked_poll(&amp;ctx-&gt;wqh, EPOLLIN);</div><div class='hunk'>@@ -434,10 +466,10 @@ objects::</div><div class='ctx'> 		rcu_read_unlock();</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-The key point here is, because RCU-traversal of the ``cancel_list`` happens</div><div class='del'>-while objects are being added and removed to the list, sometimes the traversal</div><div class='del'>-can step on an object that has been removed from the list. In this example, it</div><div class='del'>-is seen that it is better to skip such objects using a flag.</div><div class='add'>+The key point is that because RCU-protected traversal of the</div><div class='add'>+``cancel_list`` happens concurrently with object addition and removal,</div><div class='add'>+sometimes the traversal can access an object that has been removed from</div><div class='add'>+the list. In this example, a flag is used to skip such objects.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Summary</div><div class='head'>diff --git a/Documentation/RCU/lockdep.rst b/Documentation/RCU/lockdep.rst<br/>index cc860a0c296b..69e73a39bd11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/lockdep.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/lockdep.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/lockdep.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/lockdep.rst</a></div><div class='hunk'>@@ -17,7 +17,9 @@ state::</div><div class='ctx'> 	rcu_read_lock_held() for normal RCU.</div><div class='ctx'> 	rcu_read_lock_bh_held() for RCU-bh.</div><div class='ctx'> 	rcu_read_lock_sched_held() for RCU-sched.</div><div class='add'>+	rcu_read_lock_any_held() for any of normal RCU, RCU-bh, and RCU-sched.</div><div class='ctx'> 	srcu_read_lock_held() for SRCU.</div><div class='add'>+	rcu_read_lock_trace_held() for RCU Tasks Trace.</div><div class='ctx'> </div><div class='ctx'> These functions are conservative, and will therefore return 1 if they</div><div class='ctx'> aren't certain (for example, if CONFIG_DEBUG_LOCK_ALLOC is not set).</div><div class='hunk'>@@ -53,6 +55,8 @@ checking of rcu_dereference() primitives:</div><div class='ctx'> 		is invoked by both SRCU readers and updaters.</div><div class='ctx'> 	rcu_dereference_raw(p):</div><div class='ctx'> 		Don't check.  (Use sparingly, if at all.)</div><div class='add'>+	rcu_dereference_raw_check(p):</div><div class='add'>+		Don't do lockdep at all.  (Use sparingly, if at all.)</div><div class='ctx'> 	rcu_dereference_protected(p, c):</div><div class='ctx'> 		Use explicit check expression "c", and omit all barriers</div><div class='ctx'> 		and compiler constraints.  This is useful when the data</div><div class='hunk'>@@ -61,13 +65,12 @@ checking of rcu_dereference() primitives:</div><div class='ctx'> 	rcu_access_pointer(p):</div><div class='ctx'> 		Return the value of the pointer and omit all barriers,</div><div class='ctx'> 		but retain the compiler constraints that prevent duplicating</div><div class='del'>-		or coalescsing.  This is useful when when testing the</div><div class='add'>+		or coalescing.  This is useful when testing the</div><div class='ctx'> 		value of the pointer itself, for example, against NULL.</div><div class='ctx'> </div><div class='ctx'> The rcu_dereference_check() check expression can be any boolean</div><div class='del'>-expression, but would normally include a lockdep expression.  However,</div><div class='del'>-any boolean expression can be used.  For a moderately ornate example,</div><div class='del'>-consider the following::</div><div class='add'>+expression, but would normally include a lockdep expression.  For a</div><div class='add'>+moderately ornate example, consider the following::</div><div class='ctx'> </div><div class='ctx'> 	file = rcu_dereference_check(fdt-&gt;fd[fd],</div><div class='ctx'> 				     lockdep_is_held(&amp;files-&gt;file_lock) ||</div><div class='hunk'>@@ -93,10 +96,10 @@ code, it could instead be written as follows::</div><div class='ctx'> 					 atomic_read(&amp;files-&gt;count) == 1);</div><div class='ctx'> </div><div class='ctx'> This would verify cases #2 and #3 above, and furthermore lockdep would</div><div class='del'>-complain if this was used in an RCU read-side critical section unless one</div><div class='del'>-of these two cases held.  Because rcu_dereference_protected() omits all</div><div class='del'>-barriers and compiler constraints, it generates better code than do the</div><div class='del'>-other flavors of rcu_dereference().  On the other hand, it is illegal</div><div class='add'>+complain even if this was used in an RCU read-side critical section unless</div><div class='add'>+one of these two cases held.  Because rcu_dereference_protected() omits</div><div class='add'>+all barriers and compiler constraints, it generates better code than do</div><div class='add'>+the other flavors of rcu_dereference().  On the other hand, it is illegal</div><div class='ctx'> to use rcu_dereference_protected() if either the RCU-protected pointer</div><div class='ctx'> or the RCU-protected data that it points to can change concurrently.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/RCU/rcu.rst b/Documentation/RCU/rcu.rst<br/>index 0e03c6ef3147..bf6617b330a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rcu.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/rcu.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rcu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/rcu.rst</a></div><div class='hunk'>@@ -10,9 +10,8 @@ A "grace period" must elapse between the two parts, and this grace period</div><div class='ctx'> must be long enough that any readers accessing the item being deleted have</div><div class='ctx'> since dropped their references.  For example, an RCU-protected deletion</div><div class='ctx'> from a linked list would first remove the item from the list, wait for</div><div class='del'>-a grace period to elapse, then free the element.  See the</div><div class='del'>-:ref:`Documentation/RCU/listRCU.rst &lt;list_rcu_doc&gt;` for more information on</div><div class='del'>-using RCU with linked lists.</div><div class='add'>+a grace period to elapse, then free the element.  See listRCU.rst for more</div><div class='add'>+information on using RCU with linked lists.</div><div class='ctx'> </div><div class='ctx'> Frequently Asked Questions</div><div class='ctx'> --------------------------</div><div class='hunk'>@@ -50,7 +49,7 @@ Frequently Asked Questions</div><div class='ctx'> - If I am running on a uniprocessor kernel, which can only do one</div><div class='ctx'>   thing at a time, why should I wait for a grace period?</div><div class='ctx'> </div><div class='del'>-  See :ref:`Documentation/RCU/UP.rst &lt;up_doc&gt;` for more information.</div><div class='add'>+  See UP.rst for more information.</div><div class='ctx'> </div><div class='ctx'> - How can I see where RCU is currently used in the Linux kernel?</div><div class='ctx'> </div><div class='hunk'>@@ -64,13 +63,13 @@ Frequently Asked Questions</div><div class='ctx'> </div><div class='ctx'> - What guidelines should I follow when writing code that uses RCU?</div><div class='ctx'> </div><div class='del'>-  See the checklist.txt file in this directory.</div><div class='add'>+  See checklist.rst.</div><div class='ctx'> </div><div class='ctx'> - Why the name "RCU"?</div><div class='ctx'> </div><div class='ctx'>   "RCU" stands for "read-copy update".</div><div class='del'>-  :ref:`Documentation/RCU/listRCU.rst &lt;list_rcu_doc&gt;` has more information on where</div><div class='del'>-  this name came from, search for "read-copy update" to find it.</div><div class='add'>+  listRCU.rst has more information on where this name came from, search</div><div class='add'>+  for "read-copy update" to find it.</div><div class='ctx'> </div><div class='ctx'> - I hear that RCU is patented?  What is with that?</div><div class='ctx'> </div><div class='hunk'>@@ -78,15 +77,17 @@ Frequently Asked Questions</div><div class='ctx'>   search for the string "Patent" in Documentation/RCU/RTFP.txt to find them.</div><div class='ctx'>   Of these, one was allowed to lapse by the assignee, and the</div><div class='ctx'>   others have been contributed to the Linux kernel under GPL.</div><div class='add'>+  Many (but not all) have long since expired.</div><div class='ctx'>   There are now also LGPL implementations of user-level RCU</div><div class='ctx'>   available (https://liburcu.org/).</div><div class='ctx'> </div><div class='ctx'> - I hear that RCU needs work in order to support realtime kernels?</div><div class='ctx'> </div><div class='del'>-  Realtime-friendly RCU can be enabled via the CONFIG_PREEMPT_RCU</div><div class='add'>+  Realtime-friendly RCU are enabled via the CONFIG_PREEMPTION</div><div class='ctx'>   kernel configuration parameter.</div><div class='ctx'> </div><div class='ctx'> - Where can I find more information on RCU?</div><div class='ctx'> </div><div class='ctx'>   See the Documentation/RCU/RTFP.txt file.</div><div class='del'>-  Or point your browser at (http://www.rdrop.com/users/paulmck/RCU/).</div><div class='add'>+  Or point your browser at (https://docs.google.com/document/d/1X0lThx8OK0ZgLMqVoXiR4ZrGURHrXK6NyLRbeXe3Xac/edit)</div><div class='add'>+  or (https://docs.google.com/document/d/1GCdQC8SDbb54W1shjEXqGZ0Rq8a6kIeYutdSIajfpLA/edit?usp=sharing).</div><div class='head'>diff --git a/Documentation/RCU/rcu_dereference.rst b/Documentation/RCU/rcu_dereference.rst<br/>index 0b418a5b243c..3b739f6243c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rcu_dereference.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/rcu_dereference.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rcu_dereference.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/rcu_dereference.rst</a></div><div class='hunk'>@@ -19,8 +19,9 @@ Follow these rules to keep your RCU code working properly:</div><div class='ctx'> 	can reload the value, and won't your code have fun with two</div><div class='ctx'> 	different values for a single pointer!  Without rcu_dereference(),</div><div class='ctx'> 	DEC Alpha can load a pointer, dereference that pointer, and</div><div class='del'>-	return data preceding initialization that preceded the store of</div><div class='del'>-	the pointer.</div><div class='add'>+	return data preceding initialization that preceded the store</div><div class='add'>+	of the pointer.  (As noted later, in recent kernels READ_ONCE()</div><div class='add'>+	also prevents DEC Alpha from playing these tricks.)</div><div class='ctx'> </div><div class='ctx'> 	In addition, the volatile cast in rcu_dereference() prevents the</div><div class='ctx'> 	compiler from deducing the resulting pointer value.  Please see</div><div class='hunk'>@@ -34,7 +35,7 @@ Follow these rules to keep your RCU code working properly:</div><div class='ctx'> 	takes on the role of the lockless_dereference() primitive that</div><div class='ctx'> 	was removed in v4.15.</div><div class='ctx'> </div><div class='del'>--	You are only permitted to use rcu_dereference on pointer values.</div><div class='add'>+-	You are only permitted to use rcu_dereference() on pointer values.</div><div class='ctx'> 	The compiler simply knows too much about integral values to</div><div class='ctx'> 	trust it to carry dependencies through integer operations.</div><div class='ctx'> 	There are a very few exceptions, namely that you can temporarily</div><div class='hunk'>@@ -128,10 +129,16 @@ Follow these rules to keep your RCU code working properly:</div><div class='ctx'> 		This sort of comparison occurs frequently when scanning</div><div class='ctx'> 		RCU-protected circular linked lists.</div><div class='ctx'> </div><div class='del'>-		Note that if checks for being within an RCU read-side</div><div class='del'>-		critical section are not required and the pointer is never</div><div class='del'>-		dereferenced, rcu_access_pointer() should be used in place</div><div class='del'>-		of rcu_dereference().</div><div class='add'>+		Note that if the pointer comparison is done outside</div><div class='add'>+		of an RCU read-side critical section, and the pointer</div><div class='add'>+		is never dereferenced, rcu_access_pointer() should be</div><div class='add'>+		used in place of rcu_dereference().  In most cases,</div><div class='add'>+		it is best to avoid accidental dereferences by testing</div><div class='add'>+		the rcu_access_pointer() return value directly, without</div><div class='add'>+		assigning it to a variable.</div><div class='add'>+</div><div class='add'>+		Within an RCU read-side critical section, there is little</div><div class='add'>+		reason to use rcu_access_pointer().</div><div class='ctx'> </div><div class='ctx'> 	-	The comparison is against a pointer that references memory</div><div class='ctx'> 		that was initialized "a long time ago."  The reason</div><div class='hunk'>@@ -234,6 +241,7 @@ precautions.  To see this, consider the following code fragment::</div><div class='ctx'> 		struct foo *q;</div><div class='ctx'> 		int r1, r2;</div><div class='ctx'> </div><div class='add'>+		rcu_read_lock();</div><div class='ctx'> 		p = rcu_dereference(gp2);</div><div class='ctx'> 		if (p == NULL)</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -242,7 +250,10 @@ precautions.  To see this, consider the following code fragment::</div><div class='ctx'> 		if (p == q) {</div><div class='ctx'> 			/* The compiler decides that q-&gt;c is same as p-&gt;c. */</div><div class='ctx'> 			r2 = p-&gt;c; /* Could get 44 on weakly order system. */</div><div class='add'>+		} else {</div><div class='add'>+			r2 = p-&gt;c - r1; /* Unconditional access to p-&gt;c. */</div><div class='ctx'> 		}</div><div class='add'>+		rcu_read_unlock();</div><div class='ctx'> 		do_something_with(r1, r2);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -291,6 +302,7 @@ Then one approach is to use locking, for example, as follows::</div><div class='ctx'> 		struct foo *q;</div><div class='ctx'> 		int r1, r2;</div><div class='ctx'> </div><div class='add'>+		rcu_read_lock();</div><div class='ctx'> 		p = rcu_dereference(gp2);</div><div class='ctx'> 		if (p == NULL)</div><div class='ctx'> 			return;</div><div class='hunk'>@@ -300,7 +312,12 @@ Then one approach is to use locking, for example, as follows::</div><div class='ctx'> 		if (p == q) {</div><div class='ctx'> 			/* The compiler decides that q-&gt;c is same as p-&gt;c. */</div><div class='ctx'> 			r2 = p-&gt;c; /* Locking guarantees r2 == 144. */</div><div class='add'>+		} else {</div><div class='add'>+			spin_lock(&amp;q-&gt;lock);</div><div class='add'>+			r2 = q-&gt;c - r1;</div><div class='add'>+			spin_unlock(&amp;q-&gt;lock);</div><div class='ctx'> 		}</div><div class='add'>+		rcu_read_unlock();</div><div class='ctx'> 		spin_unlock(&amp;p-&gt;lock);</div><div class='ctx'> 		do_something_with(r1, r2);</div><div class='ctx'> 	}</div><div class='hunk'>@@ -358,7 +375,7 @@ the exact value of "p" even in the not-equals case.  This allows the</div><div class='ctx'> compiler to make the return values independent of the load from "gp",</div><div class='ctx'> in turn destroying the ordering between this load and the loads of the</div><div class='ctx'> return values.  This can result in "p-&gt;b" returning pre-initialization</div><div class='del'>-garbage values.</div><div class='add'>+garbage values on weakly ordered systems.</div><div class='ctx'> </div><div class='ctx'> In short, rcu_dereference() is *not* optional when you are going to</div><div class='ctx'> dereference the resulting pointer.</div><div class='hunk'>@@ -424,7 +441,7 @@ member of the rcu_dereference() to use in various situations:</div><div class='ctx'> SPARSE CHECKING OF RCU-PROTECTED POINTERS</div><div class='ctx'> -----------------------------------------</div><div class='ctx'> </div><div class='del'>-The sparse static-analysis tool checks for direct access to RCU-protected</div><div class='add'>+The sparse static-analysis tool checks for non-RCU access to RCU-protected</div><div class='ctx'> pointers, which can result in "interesting" bugs due to compiler</div><div class='ctx'> optimizations involving invented loads and perhaps also load tearing.</div><div class='ctx'> For example, suppose someone mistakenly does something like this::</div><div class='head'>diff --git a/Documentation/RCU/rcubarrier.rst b/Documentation/RCU/rcubarrier.rst<br/>index 3b4a24877496..6da7f66da2a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rcubarrier.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/rcubarrier.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rcubarrier.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/rcubarrier.rst</a></div><div class='hunk'>@@ -5,37 +5,12 @@ RCU and Unloadable Modules</div><div class='ctx'> </div><div class='ctx'> [Originally published in LWN Jan. 14, 2007: http://lwn.net/Articles/217484/]</div><div class='ctx'> </div><div class='del'>-RCU (read-copy update) is a synchronization mechanism that can be thought</div><div class='del'>-of as a replacement for read-writer locking (among other things), but with</div><div class='del'>-very low-overhead readers that are immune to deadlock, priority inversion,</div><div class='del'>-and unbounded latency. RCU read-side critical sections are delimited</div><div class='del'>-by rcu_read_lock() and rcu_read_unlock(), which, in non-CONFIG_PREEMPTION</div><div class='del'>-kernels, generate no code whatsoever.</div><div class='del'>-</div><div class='del'>-This means that RCU writers are unaware of the presence of concurrent</div><div class='del'>-readers, so that RCU updates to shared data must be undertaken quite</div><div class='del'>-carefully, leaving an old version of the data structure in place until all</div><div class='del'>-pre-existing readers have finished. These old versions are needed because</div><div class='del'>-such readers might hold a reference to them. RCU updates can therefore be</div><div class='del'>-rather expensive, and RCU is thus best suited for read-mostly situations.</div><div class='del'>-</div><div class='del'>-How can an RCU writer possibly determine when all readers are finished,</div><div class='del'>-given that readers might well leave absolutely no trace of their</div><div class='del'>-presence? There is a synchronize_rcu() primitive that blocks until all</div><div class='del'>-pre-existing readers have completed. An updater wishing to delete an</div><div class='del'>-element p from a linked list might do the following, while holding an</div><div class='del'>-appropriate lock, of course::</div><div class='del'>-</div><div class='del'>-	list_del_rcu(p);</div><div class='del'>-	synchronize_rcu();</div><div class='del'>-	kfree(p);</div><div class='del'>-</div><div class='del'>-But the above code cannot be used in IRQ context -- the call_rcu()</div><div class='del'>-primitive must be used instead. This primitive takes a pointer to an</div><div class='del'>-rcu_head struct placed within the RCU-protected data structure and</div><div class='del'>-another pointer to a function that may be invoked later to free that</div><div class='del'>-structure. Code to delete an element p from the linked list from IRQ</div><div class='del'>-context might then be as follows::</div><div class='add'>+RCU updaters sometimes use call_rcu() to initiate an asynchronous wait for</div><div class='add'>+a grace period to elapse.  This primitive takes a pointer to an rcu_head</div><div class='add'>+struct placed within the RCU-protected data structure and another pointer</div><div class='add'>+to a function that may be invoked later to free that structure. Code to</div><div class='add'>+delete an element p from the linked list from IRQ context might then be</div><div class='add'>+as follows::</div><div class='ctx'> </div><div class='ctx'> 	list_del_rcu(p);</div><div class='ctx'> 	call_rcu(&amp;p-&gt;rcu, p_callback);</div><div class='hunk'>@@ -54,7 +29,7 @@ IRQ context. The function p_callback() might be defined as follows::</div><div class='ctx'> Unloading Modules That Use call_rcu()</div><div class='ctx'> -------------------------------------</div><div class='ctx'> </div><div class='del'>-But what if p_callback is defined in an unloadable module?</div><div class='add'>+But what if the p_callback() function is defined in an unloadable module?</div><div class='ctx'> </div><div class='ctx'> If we unload the module while some RCU callbacks are pending,</div><div class='ctx'> the CPUs executing these callbacks are going to be severely</div><div class='hunk'>@@ -67,20 +42,21 @@ grace period to elapse, it does not wait for the callbacks to complete.</div><div class='ctx'> </div><div class='ctx'> One might be tempted to try several back-to-back synchronize_rcu()</div><div class='ctx'> calls, but this is still not guaranteed to work. If there is a very</div><div class='del'>-heavy RCU-callback load, then some of the callbacks might be deferred</div><div class='del'>-in order to allow other processing to proceed. Such deferral is required</div><div class='del'>-in realtime kernels in order to avoid excessive scheduling latencies.</div><div class='add'>+heavy RCU-callback load, then some of the callbacks might be deferred in</div><div class='add'>+order to allow other processing to proceed. For but one example, such</div><div class='add'>+deferral is required in realtime kernels in order to avoid excessive</div><div class='add'>+scheduling latencies.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> rcu_barrier()</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-We instead need the rcu_barrier() primitive.  Rather than waiting for</div><div class='del'>-a grace period to elapse, rcu_barrier() waits for all outstanding RCU</div><div class='del'>-callbacks to complete.  Please note that rcu_barrier() does **not** imply</div><div class='del'>-synchronize_rcu(), in particular, if there are no RCU callbacks queued</div><div class='del'>-anywhere, rcu_barrier() is within its rights to return immediately,</div><div class='del'>-without waiting for a grace period to elapse.</div><div class='add'>+This situation can be handled by the rcu_barrier() primitive.  Rather</div><div class='add'>+than waiting for a grace period to elapse, rcu_barrier() waits for all</div><div class='add'>+outstanding RCU callbacks to complete.  Please note that rcu_barrier()</div><div class='add'>+does **not** imply synchronize_rcu(), in particular, if there are no RCU</div><div class='add'>+callbacks queued anywhere, rcu_barrier() is within its rights to return</div><div class='add'>+immediately, without waiting for anything, let alone a grace period.</div><div class='ctx'> </div><div class='ctx'> Pseudo-code using rcu_barrier() is as follows:</div><div class='ctx'> </div><div class='hunk'>@@ -89,83 +65,86 @@ Pseudo-code using rcu_barrier() is as follows:</div><div class='ctx'>    3. Allow the module to be unloaded.</div><div class='ctx'> </div><div class='ctx'> There is also an srcu_barrier() function for SRCU, and you of course</div><div class='del'>-must match the flavor of rcu_barrier() with that of call_rcu().  If your</div><div class='del'>-module uses multiple flavors of call_rcu(), then it must also use multiple</div><div class='del'>-flavors of rcu_barrier() when unloading that module.  For example, if</div><div class='del'>-it uses call_rcu(), call_srcu() on srcu_struct_1, and call_srcu() on</div><div class='del'>-srcu_struct_2, then the following three lines of code will be required</div><div class='del'>-when unloading::</div><div class='del'>-</div><div class='del'>- 1 rcu_barrier();</div><div class='del'>- 2 srcu_barrier(&amp;srcu_struct_1);</div><div class='del'>- 3 srcu_barrier(&amp;srcu_struct_2);</div><div class='del'>-</div><div class='del'>-The rcutorture module makes use of rcu_barrier() in its exit function</div><div class='del'>-as follows::</div><div class='del'>-</div><div class='del'>- 1  static void</div><div class='del'>- 2  rcu_torture_cleanup(void)</div><div class='del'>- 3  {</div><div class='del'>- 4    int i;</div><div class='del'>- 5</div><div class='del'>- 6    fullstop = 1;</div><div class='del'>- 7    if (shuffler_task != NULL) {</div><div class='del'>- 8     VERBOSE_PRINTK_STRING("Stopping rcu_torture_shuffle task");</div><div class='del'>- 9     kthread_stop(shuffler_task);</div><div class='del'>- 10   }</div><div class='del'>- 11   shuffler_task = NULL;</div><div class='add'>+must match the flavor of srcu_barrier() with that of call_srcu().</div><div class='add'>+If your module uses multiple srcu_struct structures, then it must also</div><div class='add'>+use multiple invocations of srcu_barrier() when unloading that module.</div><div class='add'>+For example, if it uses call_rcu(), call_srcu() on srcu_struct_1, and</div><div class='add'>+call_srcu() on srcu_struct_2, then the following three lines of code</div><div class='add'>+will be required when unloading::</div><div class='add'>+</div><div class='add'>+  1  rcu_barrier();</div><div class='add'>+  2  srcu_barrier(&amp;srcu_struct_1);</div><div class='add'>+  3  srcu_barrier(&amp;srcu_struct_2);</div><div class='add'>+</div><div class='add'>+If latency is of the essence, workqueues could be used to run these</div><div class='add'>+three functions concurrently.</div><div class='add'>+</div><div class='add'>+An ancient version of the rcutorture module makes use of rcu_barrier()</div><div class='add'>+in its exit function as follows::</div><div class='add'>+</div><div class='add'>+  1  static void</div><div class='add'>+  2  rcu_torture_cleanup(void)</div><div class='add'>+  3  {</div><div class='add'>+  4    int i;</div><div class='add'>+  5</div><div class='add'>+  6    fullstop = 1;</div><div class='add'>+  7    if (shuffler_task != NULL) {</div><div class='add'>+  8      VERBOSE_PRINTK_STRING("Stopping rcu_torture_shuffle task");</div><div class='add'>+  9      kthread_stop(shuffler_task);</div><div class='add'>+ 10    }</div><div class='add'>+ 11    shuffler_task = NULL;</div><div class='ctx'>  12</div><div class='del'>- 13   if (writer_task != NULL) {</div><div class='del'>- 14     VERBOSE_PRINTK_STRING("Stopping rcu_torture_writer task");</div><div class='del'>- 15     kthread_stop(writer_task);</div><div class='del'>- 16   }</div><div class='del'>- 17   writer_task = NULL;</div><div class='add'>+ 13    if (writer_task != NULL) {</div><div class='add'>+ 14      VERBOSE_PRINTK_STRING("Stopping rcu_torture_writer task");</div><div class='add'>+ 15      kthread_stop(writer_task);</div><div class='add'>+ 16    }</div><div class='add'>+ 17    writer_task = NULL;</div><div class='ctx'>  18</div><div class='del'>- 19   if (reader_tasks != NULL) {</div><div class='del'>- 20     for (i = 0; i &lt; nrealreaders; i++) {</div><div class='del'>- 21       if (reader_tasks[i] != NULL) {</div><div class='del'>- 22         VERBOSE_PRINTK_STRING(</div><div class='del'>- 23           "Stopping rcu_torture_reader task");</div><div class='del'>- 24         kthread_stop(reader_tasks[i]);</div><div class='del'>- 25       }</div><div class='del'>- 26       reader_tasks[i] = NULL;</div><div class='del'>- 27     }</div><div class='del'>- 28     kfree(reader_tasks);</div><div class='del'>- 29     reader_tasks = NULL;</div><div class='del'>- 30   }</div><div class='del'>- 31   rcu_torture_current = NULL;</div><div class='add'>+ 19    if (reader_tasks != NULL) {</div><div class='add'>+ 20      for (i = 0; i &lt; nrealreaders; i++) {</div><div class='add'>+ 21        if (reader_tasks[i] != NULL) {</div><div class='add'>+ 22          VERBOSE_PRINTK_STRING(</div><div class='add'>+ 23            "Stopping rcu_torture_reader task");</div><div class='add'>+ 24          kthread_stop(reader_tasks[i]);</div><div class='add'>+ 25        }</div><div class='add'>+ 26        reader_tasks[i] = NULL;</div><div class='add'>+ 27      }</div><div class='add'>+ 28      kfree(reader_tasks);</div><div class='add'>+ 29      reader_tasks = NULL;</div><div class='add'>+ 30    }</div><div class='add'>+ 31    rcu_torture_current = NULL;</div><div class='ctx'>  32</div><div class='del'>- 33   if (fakewriter_tasks != NULL) {</div><div class='del'>- 34     for (i = 0; i &lt; nfakewriters; i++) {</div><div class='del'>- 35       if (fakewriter_tasks[i] != NULL) {</div><div class='del'>- 36         VERBOSE_PRINTK_STRING(</div><div class='del'>- 37           "Stopping rcu_torture_fakewriter task");</div><div class='del'>- 38         kthread_stop(fakewriter_tasks[i]);</div><div class='del'>- 39       }</div><div class='del'>- 40       fakewriter_tasks[i] = NULL;</div><div class='del'>- 41     }</div><div class='del'>- 42     kfree(fakewriter_tasks);</div><div class='del'>- 43     fakewriter_tasks = NULL;</div><div class='del'>- 44   }</div><div class='add'>+ 33    if (fakewriter_tasks != NULL) {</div><div class='add'>+ 34      for (i = 0; i &lt; nfakewriters; i++) {</div><div class='add'>+ 35        if (fakewriter_tasks[i] != NULL) {</div><div class='add'>+ 36          VERBOSE_PRINTK_STRING(</div><div class='add'>+ 37            "Stopping rcu_torture_fakewriter task");</div><div class='add'>+ 38          kthread_stop(fakewriter_tasks[i]);</div><div class='add'>+ 39        }</div><div class='add'>+ 40        fakewriter_tasks[i] = NULL;</div><div class='add'>+ 41      }</div><div class='add'>+ 42      kfree(fakewriter_tasks);</div><div class='add'>+ 43      fakewriter_tasks = NULL;</div><div class='add'>+ 44    }</div><div class='ctx'>  45</div><div class='del'>- 46   if (stats_task != NULL) {</div><div class='del'>- 47     VERBOSE_PRINTK_STRING("Stopping rcu_torture_stats task");</div><div class='del'>- 48     kthread_stop(stats_task);</div><div class='del'>- 49   }</div><div class='del'>- 50   stats_task = NULL;</div><div class='add'>+ 46    if (stats_task != NULL) {</div><div class='add'>+ 47      VERBOSE_PRINTK_STRING("Stopping rcu_torture_stats task");</div><div class='add'>+ 48      kthread_stop(stats_task);</div><div class='add'>+ 49    }</div><div class='add'>+ 50    stats_task = NULL;</div><div class='ctx'>  51</div><div class='del'>- 52   /* Wait for all RCU callbacks to fire. */</div><div class='del'>- 53   rcu_barrier();</div><div class='add'>+ 52    /* Wait for all RCU callbacks to fire. */</div><div class='add'>+ 53    rcu_barrier();</div><div class='ctx'>  54</div><div class='del'>- 55   rcu_torture_stats_print(); /* -After- the stats thread is stopped! */</div><div class='add'>+ 55    rcu_torture_stats_print(); /* -After- the stats thread is stopped! */</div><div class='ctx'>  56</div><div class='del'>- 57   if (cur_ops-&gt;cleanup != NULL)</div><div class='del'>- 58     cur_ops-&gt;cleanup();</div><div class='del'>- 59   if (atomic_read(&amp;n_rcu_torture_error))</div><div class='del'>- 60     rcu_torture_print_module_parms("End of test: FAILURE");</div><div class='del'>- 61   else</div><div class='del'>- 62     rcu_torture_print_module_parms("End of test: SUCCESS");</div><div class='del'>- 63 }</div><div class='add'>+ 57    if (cur_ops-&gt;cleanup != NULL)</div><div class='add'>+ 58      cur_ops-&gt;cleanup();</div><div class='add'>+ 59    if (atomic_read(&amp;n_rcu_torture_error))</div><div class='add'>+ 60      rcu_torture_print_module_parms("End of test: FAILURE");</div><div class='add'>+ 61    else</div><div class='add'>+ 62      rcu_torture_print_module_parms("End of test: SUCCESS");</div><div class='add'>+ 63  }</div><div class='ctx'> </div><div class='ctx'> Line 6 sets a global variable that prevents any RCU callbacks from</div><div class='ctx'> re-posting themselves. This will not be necessary in most cases, since</div><div class='hunk'>@@ -190,16 +169,17 @@ Quick Quiz #1:</div><div class='ctx'> :ref:`Answer to Quick Quiz #1 &lt;answer_rcubarrier_quiz_1&gt;`</div><div class='ctx'> </div><div class='ctx'> Your module might have additional complications. For example, if your</div><div class='del'>-module invokes call_rcu() from timers, you will need to first cancel all</div><div class='del'>-the timers, and only then invoke rcu_barrier() to wait for any remaining</div><div class='add'>+module invokes call_rcu() from timers, you will need to first refrain</div><div class='add'>+from posting new timers, cancel (or wait for) all the already-posted</div><div class='add'>+timers, and only then invoke rcu_barrier() to wait for any remaining</div><div class='ctx'> RCU callbacks to complete.</div><div class='ctx'> </div><div class='del'>-Of course, if you module uses call_rcu(), you will need to invoke</div><div class='add'>+Of course, if your module uses call_rcu(), you will need to invoke</div><div class='ctx'> rcu_barrier() before unloading.  Similarly, if your module uses</div><div class='ctx'> call_srcu(), you will need to invoke srcu_barrier() before unloading,</div><div class='ctx'> and on the same srcu_struct structure.  If your module uses call_rcu()</div><div class='del'>-**and** call_srcu(), then you will need to invoke rcu_barrier() **and**</div><div class='del'>-srcu_barrier().</div><div class='add'>+**and** call_srcu(), then (as noted above) you will need to invoke</div><div class='add'>+rcu_barrier() **and** srcu_barrier().</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Implementing rcu_barrier()</div><div class='hunk'>@@ -211,27 +191,40 @@ queues. His implementation queues an RCU callback on each of the per-CPU</div><div class='ctx'> callback queues, and then waits until they have all started executing, at</div><div class='ctx'> which point, all earlier RCU callbacks are guaranteed to have completed.</div><div class='ctx'> </div><div class='del'>-The original code for rcu_barrier() was as follows::</div><div class='del'>-</div><div class='del'>- 1  void rcu_barrier(void)</div><div class='del'>- 2  {</div><div class='del'>- 3    BUG_ON(in_interrupt());</div><div class='del'>- 4    /* Take cpucontrol mutex to protect against CPU hotplug */</div><div class='del'>- 5    mutex_lock(&amp;rcu_barrier_mutex);</div><div class='del'>- 6    init_completion(&amp;rcu_barrier_completion);</div><div class='del'>- 7    atomic_set(&amp;rcu_barrier_cpu_count, 0);</div><div class='del'>- 8    on_each_cpu(rcu_barrier_func, NULL, 0, 1);</div><div class='del'>- 9    wait_for_completion(&amp;rcu_barrier_completion);</div><div class='del'>- 10   mutex_unlock(&amp;rcu_barrier_mutex);</div><div class='del'>- 11 }</div><div class='del'>-</div><div class='del'>-Line 3 verifies that the caller is in process context, and lines 5 and 10</div><div class='add'>+The original code for rcu_barrier() was roughly as follows::</div><div class='add'>+</div><div class='add'>+  1  void rcu_barrier(void)</div><div class='add'>+  2  {</div><div class='add'>+  3    BUG_ON(in_interrupt());</div><div class='add'>+  4    /* Take cpucontrol mutex to protect against CPU hotplug */</div><div class='add'>+  5    mutex_lock(&amp;rcu_barrier_mutex);</div><div class='add'>+  6    init_completion(&amp;rcu_barrier_completion);</div><div class='add'>+  7    atomic_set(&amp;rcu_barrier_cpu_count, 1);</div><div class='add'>+  8    on_each_cpu(rcu_barrier_func, NULL, 0, 1);</div><div class='add'>+  9    if (atomic_dec_and_test(&amp;rcu_barrier_cpu_count))</div><div class='add'>+ 10      complete(&amp;rcu_barrier_completion);</div><div class='add'>+ 11    wait_for_completion(&amp;rcu_barrier_completion);</div><div class='add'>+ 12    mutex_unlock(&amp;rcu_barrier_mutex);</div><div class='add'>+ 13  }</div><div class='add'>+</div><div class='add'>+Line 3 verifies that the caller is in process context, and lines 5 and 12</div><div class='ctx'> use rcu_barrier_mutex to ensure that only one rcu_barrier() is using the</div><div class='ctx'> global completion and counters at a time, which are initialized on lines</div><div class='ctx'> 6 and 7. Line 8 causes each CPU to invoke rcu_barrier_func(), which is</div><div class='ctx'> shown below. Note that the final "1" in on_each_cpu()'s argument list</div><div class='ctx'> ensures that all the calls to rcu_barrier_func() will have completed</div><div class='del'>-before on_each_cpu() returns. Line 9 then waits for the completion.</div><div class='add'>+before on_each_cpu() returns. Line 9 removes the initial count from</div><div class='add'>+rcu_barrier_cpu_count, and if this count is now zero, line 10 finalizes</div><div class='add'>+the completion, which prevents line 11 from blocking.  Either way,</div><div class='add'>+line 11 then waits (if needed) for the completion.</div><div class='add'>+</div><div class='add'>+.. _rcubarrier_quiz_2:</div><div class='add'>+</div><div class='add'>+Quick Quiz #2:</div><div class='add'>+	Why doesn't line 8 initialize rcu_barrier_cpu_count to zero,</div><div class='add'>+	thereby avoiding the need for lines 9 and 10?</div><div class='add'>+</div><div class='add'>+:ref:`Answer to Quick Quiz #2 &lt;answer_rcubarrier_quiz_2&gt;`</div><div class='ctx'> </div><div class='ctx'> This code was rewritten in 2008 and several times thereafter, but this</div><div class='ctx'> still gives the general idea.</div><div class='hunk'>@@ -239,21 +232,21 @@ still gives the general idea.</div><div class='ctx'> The rcu_barrier_func() runs on each CPU, where it invokes call_rcu()</div><div class='ctx'> to post an RCU callback, as follows::</div><div class='ctx'> </div><div class='del'>- 1  static void rcu_barrier_func(void *notused)</div><div class='del'>- 2  {</div><div class='del'>- 3    int cpu = smp_processor_id();</div><div class='del'>- 4    struct rcu_data *rdp = &amp;per_cpu(rcu_data, cpu);</div><div class='del'>- 5    struct rcu_head *head;</div><div class='del'>- 6</div><div class='del'>- 7    head = &amp;rdp-&gt;barrier;</div><div class='del'>- 8    atomic_inc(&amp;rcu_barrier_cpu_count);</div><div class='del'>- 9    call_rcu(head, rcu_barrier_callback);</div><div class='del'>- 10 }</div><div class='add'>+  1  static void rcu_barrier_func(void *notused)</div><div class='add'>+  2  {</div><div class='add'>+  3    int cpu = smp_processor_id();</div><div class='add'>+  4    struct rcu_data *rdp = &amp;per_cpu(rcu_data, cpu);</div><div class='add'>+  5    struct rcu_head *head;</div><div class='add'>+  6</div><div class='add'>+  7    head = &amp;rdp-&gt;barrier;</div><div class='add'>+  8    atomic_inc(&amp;rcu_barrier_cpu_count);</div><div class='add'>+  9    call_rcu(head, rcu_barrier_callback);</div><div class='add'>+ 10  }</div><div class='ctx'> </div><div class='ctx'> Lines 3 and 4 locate RCU's internal per-CPU rcu_data structure,</div><div class='ctx'> which contains the struct rcu_head that needed for the later call to</div><div class='ctx'> call_rcu(). Line 7 picks up a pointer to this struct rcu_head, and line</div><div class='del'>-8 increments a global counter. This counter will later be decremented</div><div class='add'>+8 increments the global counter. This counter will later be decremented</div><div class='ctx'> by the callback. Line 9 then registers the rcu_barrier_callback() on</div><div class='ctx'> the current CPU's queue.</div><div class='ctx'> </div><div class='hunk'>@@ -261,33 +254,34 @@ The rcu_barrier_callback() function simply atomically decrements the</div><div class='ctx'> rcu_barrier_cpu_count variable and finalizes the completion when it</div><div class='ctx'> reaches zero, as follows::</div><div class='ctx'> </div><div class='del'>- 1 static void rcu_barrier_callback(struct rcu_head *notused)</div><div class='del'>- 2 {</div><div class='del'>- 3   if (atomic_dec_and_test(&amp;rcu_barrier_cpu_count))</div><div class='del'>- 4     complete(&amp;rcu_barrier_completion);</div><div class='del'>- 5 }</div><div class='add'>+  1  static void rcu_barrier_callback(struct rcu_head *notused)</div><div class='add'>+  2  {</div><div class='add'>+  3    if (atomic_dec_and_test(&amp;rcu_barrier_cpu_count))</div><div class='add'>+  4      complete(&amp;rcu_barrier_completion);</div><div class='add'>+  5  }</div><div class='ctx'> </div><div class='del'>-.. _rcubarrier_quiz_2:</div><div class='add'>+.. _rcubarrier_quiz_3:</div><div class='ctx'> </div><div class='del'>-Quick Quiz #2:</div><div class='add'>+Quick Quiz #3:</div><div class='ctx'> 	What happens if CPU 0's rcu_barrier_func() executes</div><div class='ctx'> 	immediately (thus incrementing rcu_barrier_cpu_count to the</div><div class='ctx'> 	value one), but the other CPU's rcu_barrier_func() invocations</div><div class='ctx'> 	are delayed for a full grace period? Couldn't this result in</div><div class='ctx'> 	rcu_barrier() returning prematurely?</div><div class='ctx'> </div><div class='del'>-:ref:`Answer to Quick Quiz #2 &lt;answer_rcubarrier_quiz_2&gt;`</div><div class='add'>+:ref:`Answer to Quick Quiz #3 &lt;answer_rcubarrier_quiz_3&gt;`</div><div class='ctx'> </div><div class='ctx'> The current rcu_barrier() implementation is more complex, due to the need</div><div class='ctx'> to avoid disturbing idle CPUs (especially on battery-powered systems)</div><div class='ctx'> and the need to minimally disturb non-idle CPUs in real-time systems.</div><div class='del'>-However, the code above illustrates the concepts.</div><div class='add'>+In addition, a great many optimizations have been applied.  However,</div><div class='add'>+the code above illustrates the concepts.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> rcu_barrier() Summary</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='del'>-The rcu_barrier() primitive has seen relatively little use, since most</div><div class='add'>+The rcu_barrier() primitive is used relatively infrequently, since most</div><div class='ctx'> code using RCU is in the core kernel rather than in modules. However, if</div><div class='ctx'> you are using RCU from an unloadable module, you need to use rcu_barrier()</div><div class='ctx'> so that your module may be safely unloaded.</div><div class='hunk'>@@ -302,7 +296,8 @@ Quick Quiz #1:</div><div class='ctx'> 	Is there any other situation where rcu_barrier() might</div><div class='ctx'> 	be required?</div><div class='ctx'> </div><div class='del'>-Answer: Interestingly enough, rcu_barrier() was not originally</div><div class='add'>+Answer:</div><div class='add'>+	Interestingly enough, rcu_barrier() was not originally</div><div class='ctx'> 	implemented for module unloading. Nikita Danilov was using</div><div class='ctx'> 	RCU in a filesystem, which resulted in a similar situation at</div><div class='ctx'> 	filesystem-unmount time. Dipankar Sarma coded up rcu_barrier()</div><div class='hunk'>@@ -318,13 +313,48 @@ Answer: Interestingly enough, rcu_barrier() was not originally</div><div class='ctx'> .. _answer_rcubarrier_quiz_2:</div><div class='ctx'> </div><div class='ctx'> Quick Quiz #2:</div><div class='add'>+	Why doesn't line 8 initialize rcu_barrier_cpu_count to zero,</div><div class='add'>+	thereby avoiding the need for lines 9 and 10?</div><div class='add'>+</div><div class='add'>+Answer:</div><div class='add'>+	Suppose that the on_each_cpu() function shown on line 8 was</div><div class='add'>+	delayed, so that CPU 0's rcu_barrier_func() executed and</div><div class='add'>+	the corresponding grace period elapsed, all before CPU 1's</div><div class='add'>+	rcu_barrier_func() started executing.  This would result in</div><div class='add'>+	rcu_barrier_cpu_count being decremented to zero, so that line</div><div class='add'>+	11's wait_for_completion() would return immediately, failing to</div><div class='add'>+	wait for CPU 1's callbacks to be invoked.</div><div class='add'>+</div><div class='add'>+	Note that this was not a problem when the rcu_barrier() code</div><div class='add'>+	was first added back in 2005.  This is because on_each_cpu()</div><div class='add'>+	disables preemption, which acted as an RCU read-side critical</div><div class='add'>+	section, thus preventing CPU 0's grace period from completing</div><div class='add'>+	until on_each_cpu() had dealt with all of the CPUs.  However,</div><div class='add'>+	with the advent of preemptible RCU, rcu_barrier() no longer</div><div class='add'>+	waited on nonpreemptible regions of code in preemptible kernels,</div><div class='add'>+	that being the job of the new rcu_barrier_sched() function.</div><div class='add'>+</div><div class='add'>+	However, with the RCU flavor consolidation around v4.20, this</div><div class='add'>+	possibility was once again ruled out, because the consolidated</div><div class='add'>+	RCU once again waits on nonpreemptible regions of code.</div><div class='add'>+</div><div class='add'>+	Nevertheless, that extra count might still be a good idea.</div><div class='add'>+	Relying on these sort of accidents of implementation can result</div><div class='add'>+	in later surprise bugs when the implementation changes.</div><div class='add'>+</div><div class='add'>+:ref:`Back to Quick Quiz #2 &lt;rcubarrier_quiz_2&gt;`</div><div class='add'>+</div><div class='add'>+.. _answer_rcubarrier_quiz_3:</div><div class='add'>+</div><div class='add'>+Quick Quiz #3:</div><div class='ctx'> 	What happens if CPU 0's rcu_barrier_func() executes</div><div class='ctx'> 	immediately (thus incrementing rcu_barrier_cpu_count to the</div><div class='ctx'> 	value one), but the other CPU's rcu_barrier_func() invocations</div><div class='ctx'> 	are delayed for a full grace period? Couldn't this result in</div><div class='ctx'> 	rcu_barrier() returning prematurely?</div><div class='ctx'> </div><div class='del'>-Answer: This cannot happen. The reason is that on_each_cpu() has its last</div><div class='add'>+Answer:</div><div class='add'>+	This cannot happen. The reason is that on_each_cpu() has its last</div><div class='ctx'> 	argument, the wait flag, set to "1". This flag is passed through</div><div class='ctx'> 	to smp_call_function() and further to smp_call_function_on_cpu(),</div><div class='ctx'> 	causing this latter to spin until the cross-CPU invocation of</div><div class='hunk'>@@ -336,18 +366,15 @@ Answer: This cannot happen. The reason is that on_each_cpu() has its last</div><div class='ctx'> </div><div class='ctx'> 	Therefore, on_each_cpu() disables preemption across its call</div><div class='ctx'> 	to smp_call_function() and also across the local call to</div><div class='del'>-	rcu_barrier_func(). This prevents the local CPU from context</div><div class='del'>-	switching, again preventing grace periods from completing. This</div><div class='add'>+	rcu_barrier_func(). Because recent RCU implementations treat</div><div class='add'>+	preemption-disabled regions of code as RCU read-side critical</div><div class='add'>+	sections, this prevents grace periods from completing. This</div><div class='ctx'> 	means that all CPUs have executed rcu_barrier_func() before</div><div class='ctx'> 	the first rcu_barrier_callback() can possibly execute, in turn</div><div class='ctx'> 	preventing rcu_barrier_cpu_count from prematurely reaching zero.</div><div class='ctx'> </div><div class='del'>-	Currently, -rt implementations of RCU keep but a single global</div><div class='del'>-	queue for RCU callbacks, and thus do not suffer from this</div><div class='del'>-	problem. However, when the -rt RCU eventually does have per-CPU</div><div class='del'>-	callback queues, things will have to change. One simple change</div><div class='del'>-	is to add an rcu_read_lock() before line 8 of rcu_barrier()</div><div class='del'>-	and an rcu_read_unlock() after line 8 of this same function. If</div><div class='del'>-	you can think of a better change, please let me know!</div><div class='add'>+	But if on_each_cpu() ever decides to forgo disabling preemption,</div><div class='add'>+	as might well happen due to real-time latency considerations,</div><div class='add'>+	initializing rcu_barrier_cpu_count to one will save the day.</div><div class='ctx'> </div><div class='del'>-:ref:`Back to Quick Quiz #2 &lt;rcubarrier_quiz_2&gt;`</div><div class='add'>+:ref:`Back to Quick Quiz #3 &lt;rcubarrier_quiz_3&gt;`</div><div class='head'>diff --git a/Documentation/RCU/rculist_nulls.rst b/Documentation/RCU/rculist_nulls.rst<br/>index a9fc774bc400..9a734bf54b76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rculist_nulls.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/rculist_nulls.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/rculist_nulls.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/rculist_nulls.rst</a></div><div class='hunk'>@@ -8,25 +8,25 @@ This section describes how to use hlist_nulls to</div><div class='ctx'> protect read-mostly linked lists and</div><div class='ctx'> objects using SLAB_TYPESAFE_BY_RCU allocations.</div><div class='ctx'> </div><div class='del'>-Please read the basics in Documentation/RCU/listRCU.rst</div><div class='add'>+Please read the basics in listRCU.rst.</div><div class='ctx'> </div><div class='ctx'> Using 'nulls'</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='ctx'> Using special makers (called 'nulls') is a convenient way</div><div class='del'>-to solve following problem :</div><div class='add'>+to solve following problem.</div><div class='ctx'> </div><div class='del'>-A typical RCU linked list managing objects which are</div><div class='del'>-allocated with SLAB_TYPESAFE_BY_RCU kmem_cache can</div><div class='del'>-use following algos :</div><div class='add'>+Without 'nulls', a typical RCU linked list managing objects which are</div><div class='add'>+allocated with SLAB_TYPESAFE_BY_RCU kmem_cache can use the following</div><div class='add'>+algorithms:</div><div class='ctx'> </div><div class='del'>-1) Lookup algo</div><div class='del'>---------------</div><div class='add'>+1) Lookup algorithm</div><div class='add'>+-------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-  rcu_read_lock()</div><div class='ctx'>   begin:</div><div class='add'>+  rcu_read_lock()</div><div class='ctx'>   obj = lockless_lookup(key);</div><div class='ctx'>   if (obj) {</div><div class='ctx'>     if (!try_get_ref(obj)) // might fail for free objects</div><div class='hunk'>@@ -38,6 +38,7 @@ use following algos :</div><div class='ctx'>     */</div><div class='ctx'>     if (obj-&gt;key != key) { // not the object we expected</div><div class='ctx'>       put_ref(obj);</div><div class='add'>+      rcu_read_unlock();</div><div class='ctx'>       goto begin;</div><div class='ctx'>     }</div><div class='ctx'>   }</div><div class='hunk'>@@ -52,9 +53,9 @@ but a version with an additional memory barrier (smp_rmb())</div><div class='ctx'>   {</div><div class='ctx'>     struct hlist_node *node, *next;</div><div class='ctx'>     for (pos = rcu_dereference((head)-&gt;first);</div><div class='del'>-        pos &amp;&amp; ({ next = pos-&gt;next; smp_rmb(); prefetch(next); 1; }) &amp;&amp;</div><div class='del'>-        ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; });</div><div class='del'>-        pos = rcu_dereference(next))</div><div class='add'>+         pos &amp;&amp; ({ next = pos-&gt;next; smp_rmb(); prefetch(next); 1; }) &amp;&amp;</div><div class='add'>+         ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; });</div><div class='add'>+         pos = rcu_dereference(next))</div><div class='ctx'>       if (obj-&gt;key == key)</div><div class='ctx'>         return obj;</div><div class='ctx'>     return NULL;</div><div class='hunk'>@@ -64,9 +65,9 @@ And note the traditional hlist_for_each_entry_rcu() misses this smp_rmb()::</div><div class='ctx'> </div><div class='ctx'>   struct hlist_node *node;</div><div class='ctx'>   for (pos = rcu_dereference((head)-&gt;first);</div><div class='del'>-        pos &amp;&amp; ({ prefetch(pos-&gt;next); 1; }) &amp;&amp;</div><div class='del'>-        ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; });</div><div class='del'>-        pos = rcu_dereference(pos-&gt;next))</div><div class='add'>+       pos &amp;&amp; ({ prefetch(pos-&gt;next); 1; }) &amp;&amp;</div><div class='add'>+       ({ tpos = hlist_entry(pos, typeof(*tpos), member); 1; });</div><div class='add'>+       pos = rcu_dereference(pos-&gt;next))</div><div class='ctx'>    if (obj-&gt;key == key)</div><div class='ctx'>      return obj;</div><div class='ctx'>   return NULL;</div><div class='hunk'>@@ -82,36 +83,32 @@ Quoting Corey Minyard::</div><div class='ctx'>   solved by pre-fetching the "next" field (with proper barriers) before</div><div class='ctx'>   checking the key."</div><div class='ctx'> </div><div class='del'>-2) Insert algo</div><div class='del'>---------------</div><div class='add'>+2) Insertion algorithm</div><div class='add'>+----------------------</div><div class='ctx'> </div><div class='ctx'> We need to make sure a reader cannot read the new 'obj-&gt;obj_next' value</div><div class='del'>-and previous value of 'obj-&gt;key'. Or else, an item could be deleted</div><div class='add'>+and previous value of 'obj-&gt;key'. Otherwise, an item could be deleted</div><div class='ctx'> from a chain, and inserted into another chain. If new chain was empty</div><div class='del'>-before the move, 'next' pointer is NULL, and lockless reader can</div><div class='del'>-not detect it missed following items in original chain.</div><div class='add'>+before the move, 'next' pointer is NULL, and lockless reader can not</div><div class='add'>+detect the fact that it missed following items in original chain.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>   /*</div><div class='del'>-  * Please note that new inserts are done at the head of list,</div><div class='del'>-  * not in the middle or end.</div><div class='del'>-  */</div><div class='add'>+   * Please note that new inserts are done at the head of list,</div><div class='add'>+   * not in the middle or end.</div><div class='add'>+   */</div><div class='ctx'>   obj = kmem_cache_alloc(...);</div><div class='ctx'>   lock_chain(); // typically a spin_lock()</div><div class='ctx'>   obj-&gt;key = key;</div><div class='del'>-  /*</div><div class='del'>-  * we need to make sure obj-&gt;key is updated before obj-&gt;next</div><div class='del'>-  * or obj-&gt;refcnt</div><div class='del'>-  */</div><div class='del'>-  smp_wmb();</div><div class='del'>-  atomic_set(&amp;obj-&gt;refcnt, 1);</div><div class='add'>+  atomic_set_release(&amp;obj-&gt;refcnt, 1); // key before refcnt</div><div class='ctx'>   hlist_add_head_rcu(&amp;obj-&gt;obj_node, list);</div><div class='ctx'>   unlock_chain(); // typically a spin_unlock()</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-3) Remove algo</div><div class='del'>---------------</div><div class='add'>+3) Removal algorithm</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='ctx'> Nothing special here, we can use a standard RCU hlist deletion.</div><div class='ctx'> But thanks to SLAB_TYPESAFE_BY_RCU, beware a deleted object can be reused</div><div class='ctx'> very very fast (before the end of RCU grace period)</div><div class='hunk'>@@ -133,7 +130,7 @@ Avoiding extra smp_rmb()</div><div class='ctx'> ========================</div><div class='ctx'> </div><div class='ctx'> With hlist_nulls we can avoid extra smp_rmb() in lockless_lookup()</div><div class='del'>-and extra smp_wmb() in insert function.</div><div class='add'>+and extra _release() in insert function.</div><div class='ctx'> </div><div class='ctx'> For example, if we choose to store the slot number as the 'nulls'</div><div class='ctx'> end-of-list marker for each slot of the hash table, we can detect</div><div class='hunk'>@@ -142,59 +139,61 @@ to another chain) checking the final 'nulls' value if</div><div class='ctx'> the lookup met the end of chain. If final 'nulls' value</div><div class='ctx'> is not the slot number, then we must restart the lookup at</div><div class='ctx'> the beginning. If the object was moved to the same chain,</div><div class='del'>-then the reader doesn't care : It might eventually</div><div class='add'>+then the reader doesn't care: It might occasionally</div><div class='ctx'> scan the list again without harm.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-1) lookup algo</div><div class='del'>---------------</div><div class='add'>+1) lookup algorithm</div><div class='add'>+-------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>   head = &amp;table[slot];</div><div class='del'>-  rcu_read_lock();</div><div class='ctx'>   begin:</div><div class='add'>+  rcu_read_lock();</div><div class='ctx'>   hlist_nulls_for_each_entry_rcu(obj, node, head, member) {</div><div class='ctx'>     if (obj-&gt;key == key) {</div><div class='del'>-      if (!try_get_ref(obj)) // might fail for free objects</div><div class='add'>+      if (!try_get_ref(obj)) { // might fail for free objects</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'>         goto begin;</div><div class='add'>+      }</div><div class='ctx'>       if (obj-&gt;key != key) { // not the object we expected</div><div class='ctx'>         put_ref(obj);</div><div class='add'>+	rcu_read_unlock();</div><div class='ctx'>         goto begin;</div><div class='ctx'>       }</div><div class='del'>-    goto out;</div><div class='add'>+      goto out;</div><div class='add'>+    }</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  // If the nulls value we got at the end of this lookup is</div><div class='add'>+  // not the expected one, we must restart lookup.</div><div class='add'>+  // We probably met an item that was moved to another chain.</div><div class='add'>+  if (get_nulls_value(node) != slot) {</div><div class='add'>+    put_ref(obj);</div><div class='add'>+    rcu_read_unlock();</div><div class='add'>+    goto begin;</div><div class='ctx'>   }</div><div class='del'>-  /*</div><div class='del'>-  * if the nulls value we got at the end of this lookup is</div><div class='del'>-  * not the expected one, we must restart lookup.</div><div class='del'>-  * We probably met an item that was moved to another chain.</div><div class='del'>-  */</div><div class='del'>-  if (get_nulls_value(node) != slot)</div><div class='del'>-  goto begin;</div><div class='ctx'>   obj = NULL;</div><div class='ctx'> </div><div class='ctx'>   out:</div><div class='ctx'>   rcu_read_unlock();</div><div class='ctx'> </div><div class='del'>-2) Insert function</div><div class='del'>-------------------</div><div class='add'>+2) Insert algorithm</div><div class='add'>+-------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>   /*</div><div class='del'>-  * Please note that new inserts are done at the head of list,</div><div class='del'>-  * not in the middle or end.</div><div class='del'>-  */</div><div class='add'>+   * Please note that new inserts are done at the head of list,</div><div class='add'>+   * not in the middle or end.</div><div class='add'>+   */</div><div class='ctx'>   obj = kmem_cache_alloc(cachep);</div><div class='ctx'>   lock_chain(); // typically a spin_lock()</div><div class='ctx'>   obj-&gt;key = key;</div><div class='add'>+  atomic_set_release(&amp;obj-&gt;refcnt, 1); // key before refcnt</div><div class='ctx'>   /*</div><div class='del'>-  * changes to obj-&gt;key must be visible before refcnt one</div><div class='del'>-  */</div><div class='del'>-  smp_wmb();</div><div class='del'>-  atomic_set(&amp;obj-&gt;refcnt, 1);</div><div class='del'>-  /*</div><div class='del'>-  * insert obj in RCU way (readers might be traversing chain)</div><div class='del'>-  */</div><div class='add'>+   * insert obj in RCU way (readers might be traversing chain)</div><div class='add'>+   */</div><div class='ctx'>   hlist_nulls_add_head_rcu(&amp;obj-&gt;obj_node, list);</div><div class='ctx'>   unlock_chain(); // typically a spin_unlock()</div><div class='head'>diff --git a/Documentation/RCU/stallwarn.rst b/Documentation/RCU/stallwarn.rst<br/>index 78404625bad2..ca7b7cd806a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/stallwarn.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/stallwarn.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/stallwarn.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/stallwarn.rst</a></div><div class='hunk'>@@ -25,10 +25,10 @@ warnings:</div><div class='ctx'> </div><div class='ctx'> -	A CPU looping with bottom halves disabled.</div><div class='ctx'> </div><div class='del'>--	For !CONFIG_PREEMPTION kernels, a CPU looping anywhere in the kernel</div><div class='del'>-	without invoking schedule().  If the looping in the kernel is</div><div class='del'>-	really expected and desirable behavior, you might need to add</div><div class='del'>-	some calls to cond_resched().</div><div class='add'>+-	For !CONFIG_PREEMPTION kernels, a CPU looping anywhere in the</div><div class='add'>+	kernel without potentially invoking schedule().  If the looping</div><div class='add'>+	in the kernel is really expected and desirable behavior, you</div><div class='add'>+	might need to add some calls to cond_resched().</div><div class='ctx'> </div><div class='ctx'> -	Booting Linux using a console connection that is too slow to</div><div class='ctx'> 	keep up with the boot-time console-message rate.  For example,</div><div class='hunk'>@@ -97,27 +97,28 @@ warnings:</div><div class='ctx'> 	which will include additional debugging information.</div><div class='ctx'> </div><div class='ctx'> -	A low-level kernel issue that either fails to invoke one of the</div><div class='del'>-	variants of rcu_user_enter(), rcu_user_exit(), rcu_idle_enter(),</div><div class='del'>-	rcu_idle_exit(), rcu_irq_enter(), or rcu_irq_exit() on the one</div><div class='add'>+	variants of rcu_eqs_enter(true), rcu_eqs_exit(true), ct_idle_enter(),</div><div class='add'>+	ct_idle_exit(), ct_irq_enter(), or ct_irq_exit() on the one</div><div class='ctx'> 	hand, or that invokes one of them too many times on the other.</div><div class='ctx'> 	Historically, the most frequent issue has been an omission</div><div class='ctx'> 	of either irq_enter() or irq_exit(), which in turn invoke</div><div class='del'>-	rcu_irq_enter() or rcu_irq_exit(), respectively.  Building your</div><div class='add'>+	ct_irq_enter() or ct_irq_exit(), respectively.  Building your</div><div class='ctx'> 	kernel with CONFIG_RCU_EQS_DEBUG=y can help track down these types</div><div class='ctx'> 	of issues, which sometimes arise in architecture-specific code.</div><div class='ctx'> </div><div class='ctx'> -	A bug in the RCU implementation.</div><div class='ctx'> </div><div class='del'>--	A hardware failure.  This is quite unlikely, but has occurred</div><div class='del'>-	at least once in real life.  A CPU failed in a running system,</div><div class='del'>-	becoming unresponsive, but not causing an immediate crash.</div><div class='del'>-	This resulted in a series of RCU CPU stall warnings, eventually</div><div class='del'>-	leading the realization that the CPU had failed.</div><div class='add'>+-	A hardware failure.  This is quite unlikely, but is not at all</div><div class='add'>+	uncommon in large datacenter.  In one memorable case some decades</div><div class='add'>+	back, a CPU failed in a running system, becoming unresponsive,</div><div class='add'>+	but not causing an immediate crash.  This resulted in a series</div><div class='add'>+	of RCU CPU stall warnings, eventually leading the realization</div><div class='add'>+	that the CPU had failed.</div><div class='ctx'> </div><div class='del'>-The RCU, RCU-sched, and RCU-tasks implementations have CPU stall warning.</div><div class='del'>-Note that SRCU does *not* have CPU stall warnings.  Please note that</div><div class='del'>-RCU only detects CPU stalls when there is a grace period in progress.</div><div class='del'>-No grace period, no CPU stall warnings.</div><div class='add'>+The RCU, RCU-sched, RCU-tasks, and RCU-tasks-trace implementations have</div><div class='add'>+CPU stall warning.  Note that SRCU does *not* have CPU stall warnings.</div><div class='add'>+Please note that RCU only detects CPU stalls when there is a grace period</div><div class='add'>+in progress.  No grace period, no CPU stall warnings.</div><div class='ctx'> </div><div class='ctx'> To diagnose the cause of the stall, inspect the stack traces.</div><div class='ctx'> The offending function will usually be near the top of the stack.</div><div class='hunk'>@@ -162,6 +163,26 @@ CONFIG_RCU_CPU_STALL_TIMEOUT</div><div class='ctx'> 	Stall-warning messages may be enabled and disabled completely via</div><div class='ctx'> 	/sys/module/rcupdate/parameters/rcu_cpu_stall_suppress.</div><div class='ctx'> </div><div class='add'>+CONFIG_RCU_EXP_CPU_STALL_TIMEOUT</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+	Same as the CONFIG_RCU_CPU_STALL_TIMEOUT parameter but only for</div><div class='add'>+	the expedited grace period. This parameter defines the period</div><div class='add'>+	of time that RCU will wait from the beginning of an expedited</div><div class='add'>+	grace period until it issues an RCU CPU stall warning. This time</div><div class='add'>+	period is normally 20 milliseconds on Android devices.	A zero</div><div class='add'>+	value causes the CONFIG_RCU_CPU_STALL_TIMEOUT value to be used,</div><div class='add'>+	after conversion to milliseconds.</div><div class='add'>+</div><div class='add'>+	This configuration parameter may be changed at runtime via the</div><div class='add'>+	/sys/module/rcupdate/parameters/rcu_exp_cpu_stall_timeout, however</div><div class='add'>+	this parameter is checked only at the beginning of a cycle. If you</div><div class='add'>+	are in a current stall cycle, setting it to a new value will change</div><div class='add'>+	the timeout for the -next- stall.</div><div class='add'>+</div><div class='add'>+	Stall-warning messages may be enabled and disabled completely via</div><div class='add'>+	/sys/module/rcupdate/parameters/rcu_cpu_stall_suppress.</div><div class='add'>+</div><div class='ctx'> RCU_STALL_DELAY_DELTA</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='hunk'>@@ -185,16 +206,21 @@ RCU_STALL_RAT_DELAY</div><div class='ctx'> rcupdate.rcu_task_stall_timeout</div><div class='ctx'> -------------------------------</div><div class='ctx'> </div><div class='del'>-	This boot/sysfs parameter controls the RCU-tasks stall warning</div><div class='del'>-	interval.  A value of zero or less suppresses RCU-tasks stall</div><div class='del'>-	warnings.  A positive value sets the stall-warning interval</div><div class='del'>-	in seconds.  An RCU-tasks stall warning starts with the line:</div><div class='add'>+	This boot/sysfs parameter controls the RCU-tasks and</div><div class='add'>+	RCU-tasks-trace stall warning intervals.  A value of zero or less</div><div class='add'>+	suppresses RCU-tasks stall warnings.  A positive value sets the</div><div class='add'>+	stall-warning interval in seconds.  An RCU-tasks stall warning</div><div class='add'>+	starts with the line:</div><div class='ctx'> </div><div class='ctx'> 		INFO: rcu_tasks detected stalls on tasks:</div><div class='ctx'> </div><div class='ctx'> 	And continues with the output of sched_show_task() for each</div><div class='ctx'> 	task stalling the current RCU-tasks grace period.</div><div class='ctx'> </div><div class='add'>+	An RCU-tasks-trace stall warning starts (and continues) similarly:</div><div class='add'>+</div><div class='add'>+		INFO: rcu_tasks_trace detected stalls on tasks</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Interpreting RCU's CPU Stall-Detector "Splats"</div><div class='ctx'> ==============================================</div><div class='hunk'>@@ -228,7 +254,8 @@ dynticks counter, which will have an even-numbered value if the CPU</div><div class='ctx'> is in dyntick-idle mode and an odd-numbered value otherwise.  The hex</div><div class='ctx'> number between the two "/"s is the value of the nesting, which will be</div><div class='ctx'> a small non-negative number if in the idle loop (as shown above) and a</div><div class='del'>-very large positive number otherwise.</div><div class='add'>+very large positive number otherwise.  The number following the final</div><div class='add'>+"/" is the NMI nesting, which will be a small non-negative number.</div><div class='ctx'> </div><div class='ctx'> The "softirq=" portion of the message tracks the number of RCU softirq</div><div class='ctx'> handlers that the stalled CPU has executed.  The number before the "/"</div><div class='hunk'>@@ -363,3 +390,95 @@ for example, "P3421".</div><div class='ctx'> </div><div class='ctx'> It is entirely possible to see stall warnings from normal and from</div><div class='ctx'> expedited grace periods at about the same time during the same run.</div><div class='add'>+</div><div class='add'>+RCU_CPU_STALL_CPUTIME</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+In kernels built with CONFIG_RCU_CPU_STALL_CPUTIME=y or booted with</div><div class='add'>+rcupdate.rcu_cpu_stall_cputime=1, the following additional information</div><div class='add'>+is supplied with each RCU CPU stall warning::</div><div class='add'>+</div><div class='add'>+  rcu:          hardirqs   softirqs   csw/system</div><div class='add'>+  rcu:  number:      624         45            0</div><div class='add'>+  rcu: cputime:       69          1         2425   ==&gt; 2500(ms)</div><div class='add'>+</div><div class='add'>+These statistics are collected during the sampling period. The values</div><div class='add'>+in row "number:" are the number of hard interrupts, number of soft</div><div class='add'>+interrupts, and number of context switches on the stalled CPU. The</div><div class='add'>+first three values in row "cputime:" indicate the CPU time in</div><div class='add'>+milliseconds consumed by hard interrupts, soft interrupts, and tasks</div><div class='add'>+on the stalled CPU.  The last number is the measurement interval, again</div><div class='add'>+in milliseconds.  Because user-mode tasks normally do not cause RCU CPU</div><div class='add'>+stalls, these tasks are typically kernel tasks, which is why only the</div><div class='add'>+system CPU time are considered.</div><div class='add'>+</div><div class='add'>+The sampling period is shown as follows::</div><div class='add'>+</div><div class='add'>+  |&lt;------------first timeout----------&gt;|&lt;-----second timeout-----&gt;|</div><div class='add'>+  |&lt;--half timeout--&gt;|&lt;--half timeout--&gt;|                          |</div><div class='add'>+  |                  |&lt;--first period--&gt;|                          |</div><div class='add'>+  |                  |&lt;-----------second sampling period----------&gt;|</div><div class='add'>+  |                  |                  |                          |</div><div class='add'>+             snapshot time point    1st-stall                  2nd-stall</div><div class='add'>+</div><div class='add'>+The following describes four typical scenarios:</div><div class='add'>+</div><div class='add'>+1. A CPU looping with interrupts disabled.</div><div class='add'>+</div><div class='add'>+   ::</div><div class='add'>+</div><div class='add'>+     rcu:          hardirqs   softirqs   csw/system</div><div class='add'>+     rcu:  number:        0          0            0</div><div class='add'>+     rcu: cputime:        0          0            0   ==&gt; 2500(ms)</div><div class='add'>+</div><div class='add'>+   Because interrupts have been disabled throughout the measurement</div><div class='add'>+   interval, there are no interrupts and no context switches.</div><div class='add'>+   Furthermore, because CPU time consumption was measured using interrupt</div><div class='add'>+   handlers, the system CPU consumption is misleadingly measured as zero.</div><div class='add'>+   This scenario will normally also have "(0 ticks this GP)" printed on</div><div class='add'>+   this CPU's summary line.</div><div class='add'>+</div><div class='add'>+2. A CPU looping with bottom halves disabled.</div><div class='add'>+</div><div class='add'>+   This is similar to the previous example, but with non-zero number of</div><div class='add'>+   and CPU time consumed by hard interrupts, along with non-zero CPU</div><div class='add'>+   time consumed by in-kernel execution::</div><div class='add'>+</div><div class='add'>+     rcu:          hardirqs   softirqs   csw/system</div><div class='add'>+     rcu:  number:      624          0            0</div><div class='add'>+     rcu: cputime:       49          0         2446   ==&gt; 2500(ms)</div><div class='add'>+</div><div class='add'>+   The fact that there are zero softirqs gives a hint that these were</div><div class='add'>+   disabled, perhaps via local_bh_disable().  It is of course possible</div><div class='add'>+   that there were no softirqs, perhaps because all events that would</div><div class='add'>+   result in softirq execution are confined to other CPUs.  In this case,</div><div class='add'>+   the diagnosis should continue as shown in the next example.</div><div class='add'>+</div><div class='add'>+3. A CPU looping with preemption disabled.</div><div class='add'>+</div><div class='add'>+   Here, only the number of context switches is zero::</div><div class='add'>+</div><div class='add'>+     rcu:          hardirqs   softirqs   csw/system</div><div class='add'>+     rcu:  number:      624         45            0</div><div class='add'>+     rcu: cputime:       69          1         2425   ==&gt; 2500(ms)</div><div class='add'>+</div><div class='add'>+   This situation hints that the stalled CPU was looping with preemption</div><div class='add'>+   disabled.</div><div class='add'>+</div><div class='add'>+4. No looping, but massive hard and soft interrupts.</div><div class='add'>+</div><div class='add'>+   ::</div><div class='add'>+</div><div class='add'>+     rcu:          hardirqs   softirqs   csw/system</div><div class='add'>+     rcu:  number:       xx         xx            0</div><div class='add'>+     rcu: cputime:       xx         xx            0   ==&gt; 2500(ms)</div><div class='add'>+</div><div class='add'>+   Here, the number and CPU time of hard interrupts are all non-zero,</div><div class='add'>+   but the number of context switches and the in-kernel CPU time consumed</div><div class='add'>+   are zero. The number and cputime of soft interrupts will usually be</div><div class='add'>+   non-zero, but could be zero, for example, if the CPU was spinning</div><div class='add'>+   within a single hard interrupt handler.</div><div class='add'>+</div><div class='add'>+   If this type of RCU CPU stall warning can be reproduced, you can</div><div class='add'>+   narrow it down by looking at /proc/interrupts or by writing code to</div><div class='add'>+   trace each interrupt, for example, by referring to show_interrupts().</div><div class='head'>diff --git a/Documentation/RCU/torture.rst b/Documentation/RCU/torture.rst<br/>index a90147713062..b3b6dfa85248 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/torture.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/torture.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/torture.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/torture.rst</a></div><div class='hunk'>@@ -206,23 +206,34 @@ values for memory may require disabling the callback-flooding tests</div><div class='ctx'> using the --bootargs parameter discussed below.</div><div class='ctx'> </div><div class='ctx'> Sometimes additional debugging is useful, and in such cases the --kconfig</div><div class='del'>-parameter to kvm.sh may be used, for example, ``--kconfig 'CONFIG_KASAN=y'``.</div><div class='add'>+parameter to kvm.sh may be used, for example, ``--kconfig 'CONFIG_RCU_EQS_DEBUG=y'``.</div><div class='add'>+In addition, there are the --gdb, --kasan, and --kcsan parameters.</div><div class='add'>+Note that --gdb limits you to one scenario per kvm.sh run and requires</div><div class='add'>+that you have another window open from which to run ``gdb`` as instructed</div><div class='add'>+by the script.</div><div class='ctx'> </div><div class='ctx'> Kernel boot arguments can also be supplied, for example, to control</div><div class='ctx'> rcutorture's module parameters.  For example, to test a change to RCU's</div><div class='ctx'> CPU stall-warning code, use "--bootargs 'rcutorture.stall_cpu=30'".</div><div class='ctx'> This will of course result in the scripting reporting a failure, namely</div><div class='del'>-the resuling RCU CPU stall warning.  As noted above, reducing memory may</div><div class='add'>+the resulting RCU CPU stall warning.  As noted above, reducing memory may</div><div class='ctx'> require disabling rcutorture's callback-flooding tests::</div><div class='ctx'> </div><div class='ctx'> 	kvm.sh --cpus 448 --configs '56*TREE04' --memory 128M \</div><div class='ctx'> 		--bootargs 'rcutorture.fwd_progress=0'</div><div class='ctx'> </div><div class='ctx'> Sometimes all that is needed is a full set of kernel builds.  This is</div><div class='del'>-what the --buildonly argument does.</div><div class='add'>+what the --buildonly parameter does.</div><div class='ctx'> </div><div class='del'>-Finally, the --trust-make argument allows each kernel build to reuse what</div><div class='del'>-it can from the previous kernel build.</div><div class='add'>+The --duration parameter can override the default run time of 30 minutes.</div><div class='add'>+For example, ``--duration 2d`` would run for two days, ``--duration 3h``</div><div class='add'>+would run for three hours, ``--duration 5m`` would run for five minutes,</div><div class='add'>+and ``--duration 45s`` would run for 45 seconds.  This last can be useful</div><div class='add'>+for tracking down rare boot-time failures.</div><div class='add'>+</div><div class='add'>+Finally, the --trust-make parameter allows each kernel build to reuse what</div><div class='add'>+it can from the previous kernel build.  Please note that without the</div><div class='add'>+--trust-make parameter, your tags files may be demolished.</div><div class='ctx'> </div><div class='ctx'> There are additional more arcane arguments that are documented in the</div><div class='ctx'> source code of the kvm.sh script.</div><div class='hunk'>@@ -291,3 +302,73 @@ the following summary at the end of the run on a 12-CPU system::</div><div class='ctx'>     TREE07 ------- 167347 GPs (30.9902/s) [rcu: g1079021 f0x0 ] n_max_cbs: 478732</div><div class='ctx'>     CPU count limited from 16 to 12</div><div class='ctx'>     TREE09 ------- 752238 GPs (139.303/s) [rcu: g13075057 f0x0 ] n_max_cbs: 99011</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Repeated Runs</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+Suppose that you are chasing down a rare boot-time failure.  Although you</div><div class='add'>+could use kvm.sh, doing so will rebuild the kernel on each run.  If you</div><div class='add'>+need (say) 1,000 runs to have confidence that you have fixed the bug,</div><div class='add'>+these pointless rebuilds can become extremely annoying.</div><div class='add'>+</div><div class='add'>+This is why kvm-again.sh exists.</div><div class='add'>+</div><div class='add'>+Suppose that a previous kvm.sh run left its output in this directory::</div><div class='add'>+</div><div class='add'>+	tools/testing/selftests/rcutorture/res/2022.11.03-11.26.28</div><div class='add'>+</div><div class='add'>+Then this run can be re-run without rebuilding as follow:</div><div class='add'>+</div><div class='add'>+	kvm-again.sh tools/testing/selftests/rcutorture/res/2022.11.03-11.26.28</div><div class='add'>+</div><div class='add'>+A few of the original run's kvm.sh parameters may be overridden, perhaps</div><div class='add'>+most notably --duration and --bootargs.  For example::</div><div class='add'>+</div><div class='add'>+	kvm-again.sh tools/testing/selftests/rcutorture/res/2022.11.03-11.26.28 \</div><div class='add'>+		--duration 45s</div><div class='add'>+</div><div class='add'>+would re-run the previous test, but for only 45 seconds, thus facilitating</div><div class='add'>+tracking down the aforementioned rare boot-time failure.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Distributed Runs</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+Although kvm.sh is quite useful, its testing is confined to a single</div><div class='add'>+system.  It is not all that hard to use your favorite framework to cause</div><div class='add'>+(say) 5 instances of kvm.sh to run on your 5 systems, but this will very</div><div class='add'>+likely unnecessarily rebuild kernels.  In addition, manually distributing</div><div class='add'>+the desired rcutorture scenarios across the available systems can be</div><div class='add'>+painstaking and error-prone.</div><div class='add'>+</div><div class='add'>+And this is why the kvm-remote.sh script exists.</div><div class='add'>+</div><div class='add'>+If you the following command works::</div><div class='add'>+</div><div class='add'>+	ssh system0 date</div><div class='add'>+</div><div class='add'>+and if it also works for system1, system2, system3, system4, and system5,</div><div class='add'>+and all of these systems have 64 CPUs, you can type::</div><div class='add'>+</div><div class='add'>+	kvm-remote.sh "system0 system1 system2 system3 system4 system5" \</div><div class='add'>+		--cpus 64 --duration 8h --configs "5*CFLIST"</div><div class='add'>+</div><div class='add'>+This will build each default scenario's kernel on the local system, then</div><div class='add'>+spread each of five instances of each scenario over the systems listed,</div><div class='add'>+running each scenario for eight hours.  At the end of the runs, the</div><div class='add'>+results will be gathered, recorded, and printed.  Most of the parameters</div><div class='add'>+that kvm.sh will accept can be passed to kvm-remote.sh, but the list of</div><div class='add'>+systems must come first.</div><div class='add'>+</div><div class='add'>+The kvm.sh ``--dryrun scenarios`` argument is useful for working out</div><div class='add'>+how many scenarios may be run in one batch across a group of systems.</div><div class='add'>+</div><div class='add'>+You can also re-run a previous remote run in a manner similar to kvm.sh:</div><div class='add'>+</div><div class='add'>+	kvm-remote.sh "system0 system1 system2 system3 system4 system5" \</div><div class='add'>+		tools/testing/selftests/rcutorture/res/2022.11.03-11.26.28-remote \</div><div class='add'>+		--duration 24h</div><div class='add'>+</div><div class='add'>+In this case, most of the kvm-again.sh parameters may be supplied following</div><div class='add'>+the pathname of the old run-results directory.</div><div class='head'>diff --git a/Documentation/RCU/whatisRCU.rst b/Documentation/RCU/whatisRCU.rst<br/>index c34d2212eaca..8eddef28d3a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/whatisRCU.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/RCU/whatisRCU.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/RCU/whatisRCU.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/RCU/whatisRCU.rst</a></div><div class='hunk'>@@ -6,26 +6,33 @@ What is RCU?  --  "Read, Copy, Update"</div><div class='ctx'> Please note that the "What is RCU?" LWN series is an excellent place</div><div class='ctx'> to start learning about RCU:</div><div class='ctx'> </div><div class='del'>-| 1.	What is RCU, Fundamentally?  http://lwn.net/Articles/262464/</div><div class='del'>-| 2.	What is RCU? Part 2: Usage   http://lwn.net/Articles/263130/</div><div class='del'>-| 3.	RCU part 3: the RCU API      http://lwn.net/Articles/264090/</div><div class='del'>-| 4.	The RCU API, 2010 Edition    http://lwn.net/Articles/418853/</div><div class='del'>-| 	2010 Big API Table           http://lwn.net/Articles/419086/</div><div class='del'>-| 5.	The RCU API, 2014 Edition    http://lwn.net/Articles/609904/</div><div class='del'>-|	2014 Big API Table           http://lwn.net/Articles/609973/</div><div class='add'>+| 1.	What is RCU, Fundamentally?  https://lwn.net/Articles/262464/</div><div class='add'>+| 2.	What is RCU? Part 2: Usage   https://lwn.net/Articles/263130/</div><div class='add'>+| 3.	RCU part 3: the RCU API      https://lwn.net/Articles/264090/</div><div class='add'>+| 4.	The RCU API, 2010 Edition    https://lwn.net/Articles/418853/</div><div class='add'>+| 	2010 Big API Table           https://lwn.net/Articles/419086/</div><div class='add'>+| 5.	The RCU API, 2014 Edition    https://lwn.net/Articles/609904/</div><div class='add'>+|	2014 Big API Table           https://lwn.net/Articles/609973/</div><div class='add'>+| 6.	The RCU API, 2019 Edition    https://lwn.net/Articles/777036/</div><div class='add'>+|	2019 Big API Table           https://lwn.net/Articles/777165/</div><div class='add'>+</div><div class='add'>+For those preferring video:</div><div class='add'>+</div><div class='add'>+| 1.	Unraveling RCU Mysteries: Fundamentals          https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries</div><div class='add'>+| 2.	Unraveling RCU Mysteries: Additional Use Cases  https://www.linuxfoundation.org/webinars/unraveling-rcu-usage-mysteries-additional-use-cases</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> What is RCU?</div><div class='ctx'> </div><div class='ctx'> RCU is a synchronization mechanism that was added to the Linux kernel</div><div class='ctx'> during the 2.5 development effort that is optimized for read-mostly</div><div class='del'>-situations.  Although RCU is actually quite simple once you understand it,</div><div class='del'>-getting there can sometimes be a challenge.  Part of the problem is that</div><div class='del'>-most of the past descriptions of RCU have been written with the mistaken</div><div class='del'>-assumption that there is "one true way" to describe RCU.  Instead,</div><div class='del'>-the experience has been that different people must take different paths</div><div class='del'>-to arrive at an understanding of RCU.  This document provides several</div><div class='del'>-different paths, as follows:</div><div class='add'>+situations.  Although RCU is actually quite simple, making effective use</div><div class='add'>+of it requires you to think differently about your code.  Another part</div><div class='add'>+of the problem is the mistaken assumption that there is "one true way" to</div><div class='add'>+describe and to use RCU.  Instead, the experience has been that different</div><div class='add'>+people must take different paths to arrive at an understanding of RCU,</div><div class='add'>+depending on their experiences and use cases.  This document provides</div><div class='add'>+several different paths, as follows:</div><div class='ctx'> </div><div class='ctx'> :ref:`1.	RCU OVERVIEW &lt;1_whatisRCU&gt;`</div><div class='ctx'> </div><div class='hunk'>@@ -155,34 +162,36 @@ rcu_read_lock()</div><div class='ctx'> ^^^^^^^^^^^^^^^</div><div class='ctx'> 	void rcu_read_lock(void);</div><div class='ctx'> </div><div class='del'>-	Used by a reader to inform the reclaimer that the reader is</div><div class='del'>-	entering an RCU read-side critical section.  It is illegal</div><div class='del'>-	to block while in an RCU read-side critical section, though</div><div class='del'>-	kernels built with CONFIG_PREEMPT_RCU can preempt RCU</div><div class='del'>-	read-side critical sections.  Any RCU-protected data structure</div><div class='del'>-	accessed during an RCU read-side critical section is guaranteed to</div><div class='del'>-	remain unreclaimed for the full duration of that critical section.</div><div class='del'>-	Reference counts may be used in conjunction with RCU to maintain</div><div class='del'>-	longer-term references to data structures.</div><div class='add'>+	This temporal primitive is used by a reader to inform the</div><div class='add'>+	reclaimer that the reader is entering an RCU read-side critical</div><div class='add'>+	section.  It is illegal to block while in an RCU read-side</div><div class='add'>+	critical section, though kernels built with CONFIG_PREEMPT_RCU</div><div class='add'>+	can preempt RCU read-side critical sections.  Any RCU-protected</div><div class='add'>+	data structure accessed during an RCU read-side critical section</div><div class='add'>+	is guaranteed to remain unreclaimed for the full duration of that</div><div class='add'>+	critical section.  Reference counts may be used in conjunction</div><div class='add'>+	with RCU to maintain longer-term references to data structures.</div><div class='ctx'> </div><div class='ctx'> rcu_read_unlock()</div><div class='ctx'> ^^^^^^^^^^^^^^^^^</div><div class='ctx'> 	void rcu_read_unlock(void);</div><div class='ctx'> </div><div class='del'>-	Used by a reader to inform the reclaimer that the reader is</div><div class='del'>-	exiting an RCU read-side critical section.  Note that RCU</div><div class='del'>-	read-side critical sections may be nested and/or overlapping.</div><div class='add'>+	This temporal primitives is used by a reader to inform the</div><div class='add'>+	reclaimer that the reader is exiting an RCU read-side critical</div><div class='add'>+	section.  Note that RCU read-side critical sections may be nested</div><div class='add'>+	and/or overlapping.</div><div class='ctx'> </div><div class='ctx'> synchronize_rcu()</div><div class='ctx'> ^^^^^^^^^^^^^^^^^</div><div class='ctx'> 	void synchronize_rcu(void);</div><div class='ctx'> </div><div class='del'>-	Marks the end of updater code and the beginning of reclaimer</div><div class='del'>-	code.  It does this by blocking until all pre-existing RCU</div><div class='del'>-	read-side critical sections on all CPUs have completed.</div><div class='del'>-	Note that synchronize_rcu() will **not** necessarily wait for</div><div class='del'>-	any subsequent RCU read-side critical sections to complete.</div><div class='del'>-	For example, consider the following sequence of events::</div><div class='add'>+	This temporal primitive marks the end of updater code and the</div><div class='add'>+	beginning of reclaimer code.  It does this by blocking until</div><div class='add'>+	all pre-existing RCU read-side critical sections on all CPUs</div><div class='add'>+	have completed.  Note that synchronize_rcu() will **not**</div><div class='add'>+	necessarily wait for any subsequent RCU read-side critical</div><div class='add'>+	sections to complete.  For example, consider the following</div><div class='add'>+	sequence of events::</div><div class='ctx'> </div><div class='ctx'> 	         CPU 0                  CPU 1                 CPU 2</div><div class='ctx'> 	     ----------------- ------------------------- ---------------</div><div class='hunk'>@@ -209,13 +218,13 @@ synchronize_rcu()</div><div class='ctx'> 	to be useful in all but the most read-intensive situations,</div><div class='ctx'> 	synchronize_rcu()'s overhead must also be quite small.</div><div class='ctx'> </div><div class='del'>-	The call_rcu() API is a callback form of synchronize_rcu(),</div><div class='del'>-	and is described in more detail in a later section.  Instead of</div><div class='del'>-	blocking, it registers a function and argument which are invoked</div><div class='del'>-	after all ongoing RCU read-side critical sections have completed.</div><div class='del'>-	This callback variant is particularly useful in situations where</div><div class='del'>-	it is illegal to block or where update-side performance is</div><div class='del'>-	critically important.</div><div class='add'>+	The call_rcu() API is an asynchronous callback form of</div><div class='add'>+	synchronize_rcu(), and is described in more detail in a later</div><div class='add'>+	section.  Instead of blocking, it registers a function and</div><div class='add'>+	argument which are invoked after all ongoing RCU read-side</div><div class='add'>+	critical sections have completed.  This callback variant is</div><div class='add'>+	particularly useful in situations where it is illegal to block</div><div class='add'>+	or where update-side performance is critically important.</div><div class='ctx'> </div><div class='ctx'> 	However, the call_rcu() API should not be used lightly, as use</div><div class='ctx'> 	of the synchronize_rcu() API generally results in simpler code.</div><div class='hunk'>@@ -224,7 +233,7 @@ synchronize_rcu()</div><div class='ctx'> 	be delayed.  This property results in system resilience in face</div><div class='ctx'> 	of denial-of-service attacks.  Code using call_rcu() should limit</div><div class='ctx'> 	update rate in order to gain this same sort of resilience.  See</div><div class='del'>-	checklist.txt for some approaches to limiting the update rate.</div><div class='add'>+	checklist.rst for some approaches to limiting the update rate.</div><div class='ctx'> </div><div class='ctx'> rcu_assign_pointer()</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^^</div><div class='hunk'>@@ -234,11 +243,13 @@ rcu_assign_pointer()</div><div class='ctx'> 	would be cool to be able to declare a function in this manner.</div><div class='ctx'> 	(Compiler experts will no doubt disagree.)</div><div class='ctx'> </div><div class='del'>-	The updater uses this function to assign a new value to an</div><div class='add'>+	The updater uses this spatial macro to assign a new value to an</div><div class='ctx'> 	RCU-protected pointer, in order to safely communicate the change</div><div class='del'>-	in value from the updater to the reader.  This macro does not</div><div class='del'>-	evaluate to an rvalue, but it does execute any memory-barrier</div><div class='del'>-	instructions required for a given CPU architecture.</div><div class='add'>+	in value from the updater to the reader.  This is a spatial (as</div><div class='add'>+	opposed to temporal) macro.  It does not evaluate to an rvalue,</div><div class='add'>+	but it does execute any memory-barrier instructions required</div><div class='add'>+	for a given CPU architecture.  Its ordering properties are that</div><div class='add'>+	of a store-release operation.</div><div class='ctx'> </div><div class='ctx'> 	Perhaps just as important, it serves to document (1) which</div><div class='ctx'> 	pointers are protected by RCU and (2) the point at which a</div><div class='hunk'>@@ -253,14 +264,15 @@ rcu_dereference()</div><div class='ctx'> 	Like rcu_assign_pointer(), rcu_dereference() must be implemented</div><div class='ctx'> 	as a macro.</div><div class='ctx'> </div><div class='del'>-	The reader uses rcu_dereference() to fetch an RCU-protected</div><div class='del'>-	pointer, which returns a value that may then be safely</div><div class='del'>-	dereferenced.  Note that rcu_dereference() does not actually</div><div class='del'>-	dereference the pointer, instead, it protects the pointer for</div><div class='del'>-	later dereferencing.  It also executes any needed memory-barrier</div><div class='del'>-	instructions for a given CPU architecture.  Currently, only Alpha</div><div class='del'>-	needs memory barriers within rcu_dereference() -- on other CPUs,</div><div class='del'>-	it compiles to nothing, not even a compiler directive.</div><div class='add'>+	The reader uses the spatial rcu_dereference() macro to fetch</div><div class='add'>+	an RCU-protected pointer, which returns a value that may</div><div class='add'>+	then be safely dereferenced.  Note that rcu_dereference()</div><div class='add'>+	does not actually dereference the pointer, instead, it</div><div class='add'>+	protects the pointer for later dereferencing.  It also</div><div class='add'>+	executes any needed memory-barrier instructions for a given</div><div class='add'>+	CPU architecture.  Currently, only Alpha needs memory barriers</div><div class='add'>+	within rcu_dereference() -- on other CPUs, it compiles to a</div><div class='add'>+	volatile load.</div><div class='ctx'> </div><div class='ctx'> 	Common coding practice uses rcu_dereference() to copy an</div><div class='ctx'> 	RCU-protected pointer to a local variable, then dereferences</div><div class='hunk'>@@ -318,7 +330,7 @@ rcu_dereference()</div><div class='ctx'> 	must prohibit.	The rcu_dereference_protected() variant takes</div><div class='ctx'> 	a lockdep expression to indicate which locks must be acquired</div><div class='ctx'> 	by the caller. If the indicated protection is not provided,</div><div class='del'>-	a lockdep splat is emitted.  See Documentation/RCU/Design/Requirements/Requirements.rst</div><div class='add'>+	a lockdep splat is emitted.  See Design/Requirements/Requirements.rst</div><div class='ctx'> 	and the API's code comments for more details and example usage.</div><div class='ctx'> </div><div class='ctx'> .. 	[2] If the list_for_each_entry_rcu() instance might be used by</div><div class='hunk'>@@ -353,12 +365,15 @@ reader, updater, and reclaimer.</div><div class='ctx'> 	      synchronize_rcu() &amp; call_rcu()</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-The RCU infrastructure observes the time sequence of rcu_read_lock(),</div><div class='add'>+The RCU infrastructure observes the temporal sequence of rcu_read_lock(),</div><div class='ctx'> rcu_read_unlock(), synchronize_rcu(), and call_rcu() invocations in</div><div class='ctx'> order to determine when (1) synchronize_rcu() invocations may return</div><div class='ctx'> to their callers and (2) call_rcu() callbacks may be invoked.  Efficient</div><div class='ctx'> implementations of the RCU infrastructure make heavy use of batching in</div><div class='ctx'> order to amortize their overhead over many uses of the corresponding APIs.</div><div class='add'>+The rcu_assign_pointer() and rcu_dereference() invocations communicate</div><div class='add'>+spatial changes via stores to and loads from the RCU-protected pointer in</div><div class='add'>+question.</div><div class='ctx'> </div><div class='ctx'> There are at least three flavors of RCU usage in the Linux kernel. The diagram</div><div class='ctx'> above shows the most common one. On the updater side, the rcu_assign_pointer(),</div><div class='hunk'>@@ -390,7 +405,9 @@ b.	RCU applied to networking data structures that may be subjected</div><div class='ctx'> c.	RCU applied to scheduler and interrupt/NMI-handler tasks.</div><div class='ctx'> </div><div class='ctx'> Again, most uses will be of (a).  The (b) and (c) cases are important</div><div class='del'>-for specialized uses, but are relatively uncommon.</div><div class='add'>+for specialized uses, but are relatively uncommon.  The SRCU, RCU-Tasks,</div><div class='add'>+RCU-Tasks-Rude, and RCU-Tasks-Trace have similar relationships among</div><div class='add'>+their assorted primitives.</div><div class='ctx'> </div><div class='ctx'> .. _3_whatisRCU:</div><div class='ctx'> </div><div class='hunk'>@@ -399,8 +416,7 @@ for specialized uses, but are relatively uncommon.</div><div class='ctx'> </div><div class='ctx'> This section shows a simple use of the core RCU API to protect a</div><div class='ctx'> global pointer to a dynamically allocated structure.  More-typical</div><div class='del'>-uses of RCU may be found in :ref:`listRCU.rst &lt;list_rcu_doc&gt;`,</div><div class='del'>-:ref:`arrayRCU.rst &lt;array_rcu_doc&gt;`, and :ref:`NMI-RCU.rst &lt;NMI_rcu_doc&gt;`.</div><div class='add'>+uses of RCU may be found in listRCU.rst, arrayRCU.rst, and NMI-RCU.rst.</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'> 	struct foo {</div><div class='hunk'>@@ -467,7 +483,7 @@ So, to sum up:</div><div class='ctx'> -	Within an RCU read-side critical section, use rcu_dereference()</div><div class='ctx'> 	to dereference RCU-protected pointers.</div><div class='ctx'> </div><div class='del'>--	Use some solid scheme (such as locks or semaphores) to</div><div class='add'>+-	Use some solid design (such as locks or semaphores) to</div><div class='ctx'> 	keep concurrent updates from interfering with each other.</div><div class='ctx'> </div><div class='ctx'> -	Use rcu_assign_pointer() to update an RCU-protected pointer.</div><div class='hunk'>@@ -482,10 +498,9 @@ So, to sum up:</div><div class='ctx'> 	RCU read-side critical sections that might be referencing that</div><div class='ctx'> 	data item.</div><div class='ctx'> </div><div class='del'>-See checklist.txt for additional rules to follow when using RCU.</div><div class='del'>-And again, more-typical uses of RCU may be found in :ref:`listRCU.rst</div><div class='del'>-&lt;list_rcu_doc&gt;`, :ref:`arrayRCU.rst &lt;array_rcu_doc&gt;`, and :ref:`NMI-RCU.rst</div><div class='del'>-&lt;NMI_rcu_doc&gt;`.</div><div class='add'>+See checklist.rst for additional rules to follow when using RCU.</div><div class='add'>+And again, more-typical uses of RCU may be found in listRCU.rst,</div><div class='add'>+arrayRCU.rst, and NMI-RCU.rst.</div><div class='ctx'> </div><div class='ctx'> .. _4_whatisRCU:</div><div class='ctx'> </div><div class='hunk'>@@ -579,7 +594,15 @@ to avoid having to write your own callback::</div><div class='ctx'> </div><div class='ctx'> 	kfree_rcu(old_fp, rcu);</div><div class='ctx'> </div><div class='del'>-Again, see checklist.txt for additional rules governing the use of RCU.</div><div class='add'>+If the occasional sleep is permitted, the single-argument form may</div><div class='add'>+be used, omitting the rcu_head structure from struct foo.</div><div class='add'>+</div><div class='add'>+	kfree_rcu_mightsleep(old_fp);</div><div class='add'>+</div><div class='add'>+This variant almost never blocks, but might do so by invoking</div><div class='add'>+synchronize_rcu() in response to memory-allocation failure.</div><div class='add'>+</div><div class='add'>+Again, see checklist.rst for additional rules governing the use of RCU.</div><div class='ctx'> </div><div class='ctx'> .. _5_whatisRCU:</div><div class='ctx'> </div><div class='hunk'>@@ -596,7 +619,7 @@ lacking both functionality and performance.  However, they are useful</div><div class='ctx'> in getting a feel for how RCU works.  See kernel/rcu/update.c for a</div><div class='ctx'> production-quality implementation, and see:</div><div class='ctx'> </div><div class='del'>-	http://www.rdrop.com/users/paulmck/RCU</div><div class='add'>+	https://docs.google.com/document/d/1X0lThx8OK0ZgLMqVoXiR4ZrGURHrXK6NyLRbeXe3Xac/edit</div><div class='ctx'> </div><div class='ctx'> for papers describing the Linux kernel RCU implementation.  The OLS'01</div><div class='ctx'> and OLS'02 papers are a good introduction, and the dissertation provides</div><div class='hunk'>@@ -663,7 +686,7 @@ been able to write-acquire the lock otherwise.  The smp_mb__after_spinlock()</div><div class='ctx'> promotes synchronize_rcu() to a full memory barrier in compliance with</div><div class='ctx'> the "Memory-Barrier Guarantees" listed in:</div><div class='ctx'> </div><div class='del'>-	Documentation/RCU/Design/Requirements/Requirements.rst</div><div class='add'>+	Design/Requirements/Requirements.rst</div><div class='ctx'> </div><div class='ctx'> It is possible to nest rcu_read_lock(), since reader-writer locks may</div><div class='ctx'> be recursively acquired.  Note also that rcu_read_lock() is immune</div><div class='hunk'>@@ -917,13 +940,20 @@ which an RCU reference is held include:</div><div class='ctx'> The understanding that RCU provides a reference that only prevents a</div><div class='ctx'> change of type is particularly visible with objects allocated from a</div><div class='ctx'> slab cache marked ``SLAB_TYPESAFE_BY_RCU``.  RCU operations may yield a</div><div class='del'>-reference to an object from such a cache that has been concurrently</div><div class='del'>-freed and the memory reallocated to a completely different object,</div><div class='del'>-though of the same type.  In this case RCU doesn't even protect the</div><div class='del'>-identity of the object from changing, only its type.  So the object</div><div class='del'>-found may not be the one expected, but it will be one where it is safe</div><div class='del'>-to take a reference or spinlock and then confirm that the identity</div><div class='del'>-matches the expectations.</div><div class='add'>+reference to an object from such a cache that has been concurrently freed</div><div class='add'>+and the memory reallocated to a completely different object, though of</div><div class='add'>+the same type.  In this case RCU doesn't even protect the identity of the</div><div class='add'>+object from changing, only its type.  So the object found may not be the</div><div class='add'>+one expected, but it will be one where it is safe to take a reference</div><div class='add'>+(and then potentially acquiring a spinlock), allowing subsequent code</div><div class='add'>+to check whether the identity matches expectations.  It is tempting</div><div class='add'>+to simply acquire the spinlock without first taking the reference, but</div><div class='add'>+unfortunately any spinlock in a ``SLAB_TYPESAFE_BY_RCU`` object must be</div><div class='add'>+initialized after each and every call to kmem_cache_alloc(), which renders</div><div class='add'>+reference-free spinlock acquisition completely unsafe.  Therefore, when</div><div class='add'>+using ``SLAB_TYPESAFE_BY_RCU``, make proper use of a reference counter.</div><div class='add'>+(Those willing to use a kmem_cache constructor may also use locking,</div><div class='add'>+including cache-friendly sequence locking.)</div><div class='ctx'> </div><div class='ctx'> With traditional reference counting -- such as that implemented by the</div><div class='ctx'> kref library in Linux -- there is typically code that runs when the last</div><div class='hunk'>@@ -1042,6 +1072,30 @@ sched::</div><div class='ctx'> 	rcu_read_lock_sched_held</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+RCU-Tasks::</div><div class='add'>+</div><div class='add'>+	Critical sections	Grace period		Barrier</div><div class='add'>+</div><div class='add'>+	N/A			call_rcu_tasks		rcu_barrier_tasks</div><div class='add'>+				synchronize_rcu_tasks</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+RCU-Tasks-Rude::</div><div class='add'>+</div><div class='add'>+	Critical sections	Grace period		Barrier</div><div class='add'>+</div><div class='add'>+	N/A			call_rcu_tasks_rude	rcu_barrier_tasks_rude</div><div class='add'>+				synchronize_rcu_tasks_rude</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+RCU-Tasks-Trace::</div><div class='add'>+</div><div class='add'>+	Critical sections	Grace period		Barrier</div><div class='add'>+</div><div class='add'>+	rcu_read_lock_trace	call_rcu_tasks_trace	rcu_barrier_tasks_trace</div><div class='add'>+	rcu_read_unlock_trace	synchronize_rcu_tasks_trace</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> SRCU::</div><div class='ctx'> </div><div class='ctx'> 	Critical sections	Grace period		Barrier</div><div class='hunk'>@@ -1059,14 +1113,20 @@ SRCU: Initialization/cleanup::</div><div class='ctx'> 	init_srcu_struct</div><div class='ctx'> 	cleanup_srcu_struct</div><div class='ctx'> </div><div class='del'>-All: lockdep-checked RCU-protected pointer access::</div><div class='add'>+All: lockdep-checked RCU utility APIs::</div><div class='ctx'> </div><div class='del'>-	rcu_access_pointer</div><div class='del'>-	rcu_dereference_raw</div><div class='ctx'> 	RCU_LOCKDEP_WARN</div><div class='ctx'> 	rcu_sleep_check</div><div class='ctx'> 	RCU_NONIDLE</div><div class='ctx'> </div><div class='add'>+All: Unchecked RCU-protected pointer access::</div><div class='add'>+</div><div class='add'>+	rcu_dereference_raw</div><div class='add'>+</div><div class='add'>+All: Unchecked RCU-protected pointer access with dereferencing prohibited::</div><div class='add'>+</div><div class='add'>+	rcu_access_pointer</div><div class='add'>+</div><div class='ctx'> See the comment headers in the source code (or the docbook generated</div><div class='ctx'> from them) for more information.</div><div class='ctx'> </div><div class='hunk'>@@ -1076,35 +1136,43 @@ list can be helpful:</div><div class='ctx'> </div><div class='ctx'> a.	Will readers need to block?  If so, you need SRCU.</div><div class='ctx'> </div><div class='del'>-b.	What about the -rt patchset?  If readers would need to block</div><div class='del'>-	in an non-rt kernel, you need SRCU.  If readers would block</div><div class='del'>-	in a -rt kernel, but not in a non-rt kernel, SRCU is not</div><div class='del'>-	necessary.  (The -rt patchset turns spinlocks into sleeplocks,</div><div class='del'>-	hence this distinction.)</div><div class='add'>+b.	Will readers need to block and are you doing tracing, for</div><div class='add'>+	example, ftrace or BPF?  If so, you need RCU-tasks,</div><div class='add'>+	RCU-tasks-rude, and/or RCU-tasks-trace.</div><div class='ctx'> </div><div class='del'>-c.	Do you need to treat NMI handlers, hardirq handlers,</div><div class='add'>+c.	What about the -rt patchset?  If readers would need to block in</div><div class='add'>+	an non-rt kernel, you need SRCU.  If readers would block when</div><div class='add'>+	acquiring spinlocks in a -rt kernel, but not in a non-rt kernel,</div><div class='add'>+	SRCU is not necessary.	(The -rt patchset turns spinlocks into</div><div class='add'>+	sleeplocks, hence this distinction.)</div><div class='add'>+</div><div class='add'>+d.	Do you need to treat NMI handlers, hardirq handlers,</div><div class='ctx'> 	and code segments with preemption disabled (whether</div><div class='ctx'> 	via preempt_disable(), local_irq_save(), local_bh_disable(),</div><div class='ctx'> 	or some other mechanism) as if they were explicit RCU readers?</div><div class='del'>-	If so, RCU-sched is the only choice that will work for you.</div><div class='del'>-</div><div class='del'>-d.	Do you need RCU grace periods to complete even in the face</div><div class='del'>-	of softirq monopolization of one or more of the CPUs?  For</div><div class='del'>-	example, is your code subject to network-based denial-of-service</div><div class='del'>-	attacks?  If so, you should disable softirq across your readers,</div><div class='del'>-	for example, by using rcu_read_lock_bh().</div><div class='del'>-</div><div class='del'>-e.	Is your workload too update-intensive for normal use of</div><div class='add'>+	If so, RCU-sched readers are the only choice that will work</div><div class='add'>+	for you, but since about v4.20 you use can use the vanilla RCU</div><div class='add'>+	update primitives.</div><div class='add'>+</div><div class='add'>+e.	Do you need RCU grace periods to complete even in the face of</div><div class='add'>+	softirq monopolization of one or more of the CPUs?  For example,</div><div class='add'>+	is your code subject to network-based denial-of-service attacks?</div><div class='add'>+	If so, you should disable softirq across your readers, for</div><div class='add'>+	example, by using rcu_read_lock_bh().  Since about v4.20 you</div><div class='add'>+	use can use the vanilla RCU update primitives.</div><div class='add'>+</div><div class='add'>+f.	Is your workload too update-intensive for normal use of</div><div class='ctx'> 	RCU, but inappropriate for other synchronization mechanisms?</div><div class='ctx'> 	If so, consider SLAB_TYPESAFE_BY_RCU (which was originally</div><div class='ctx'> 	named SLAB_DESTROY_BY_RCU).  But please be careful!</div><div class='ctx'> </div><div class='del'>-f.	Do you need read-side critical sections that are respected</div><div class='del'>-	even though they are in the middle of the idle loop, during</div><div class='del'>-	user-mode execution, or on an offlined CPU?  If so, SRCU is the</div><div class='del'>-	only choice that will work for you.</div><div class='add'>+g.	Do you need read-side critical sections that are respected even</div><div class='add'>+	on CPUs that are deep in the idle loop, during entry to or exit</div><div class='add'>+	from user-mode execution, or on an offlined CPU?  If so, SRCU</div><div class='add'>+	and RCU Tasks Trace are the only choices that will work for you,</div><div class='add'>+	with SRCU being strongly preferred in almost all cases.</div><div class='ctx'> </div><div class='del'>-g.	Otherwise, use RCU.</div><div class='add'>+h.	Otherwise, use RCU.</div><div class='ctx'> </div><div class='ctx'> Of course, this all assumes that you have determined that RCU is in fact</div><div class='ctx'> the right tool for your job.</div><div class='head'>diff --git a/Documentation/accel/index.rst b/Documentation/accel/index.rst<br/>new file mode 100644<br/>index 000000000000..e94a0160b6a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/accel/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/accel/index.rst</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+====================</div><div class='add'>+Compute Accelerators</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   introduction</div><div class='add'>+   qaic/index</div><div class='add'>+</div><div class='add'>+.. only::  subproject and html</div><div class='add'>+</div><div class='add'>+   Indices</div><div class='add'>+   =======</div><div class='add'>+</div><div class='add'>+   * :ref:`genindex`</div><div class='head'>diff --git a/Documentation/accel/introduction.rst b/Documentation/accel/introduction.rst<br/>new file mode 100644<br/>index 000000000000..89984dfececf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/accel/introduction.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/accel/introduction.rst</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+============</div><div class='add'>+Introduction</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+The Linux compute accelerators subsystem is designed to expose compute</div><div class='add'>+accelerators in a common way to user-space and provide a common set of</div><div class='add'>+functionality.</div><div class='add'>+</div><div class='add'>+These devices can be either stand-alone ASICs or IP blocks inside an SoC/GPU.</div><div class='add'>+Although these devices are typically designed to accelerate</div><div class='add'>+Machine-Learning (ML) and/or Deep-Learning (DL) computations, the accel layer</div><div class='add'>+is not limited to handling these types of accelerators.</div><div class='add'>+</div><div class='add'>+Typically, a compute accelerator will belong to one of the following</div><div class='add'>+categories:</div><div class='add'>+</div><div class='add'>+- Edge AI - doing inference at an edge device. It can be an embedded ASIC/FPGA,</div><div class='add'>+  or an IP inside a SoC (e.g. laptop web camera). These devices</div><div class='add'>+  are typically configured using registers and can work with or without DMA.</div><div class='add'>+</div><div class='add'>+- Inference data-center - single/multi user devices in a large server. This</div><div class='add'>+  type of device can be stand-alone or an IP inside a SoC or a GPU. It will</div><div class='add'>+  have on-board DRAM (to hold the DL topology), DMA engines and</div><div class='add'>+  command submission queues (either kernel or user-space queues).</div><div class='add'>+  It might also have an MMU to manage multiple users and might also enable</div><div class='add'>+  virtualization (SR-IOV) to support multiple VMs on the same device. In</div><div class='add'>+  addition, these devices will usually have some tools, such as profiler and</div><div class='add'>+  debugger.</div><div class='add'>+</div><div class='add'>+- Training data-center - Similar to Inference data-center cards, but typically</div><div class='add'>+  have more computational power and memory b/w (e.g. HBM) and will likely have</div><div class='add'>+  a method of scaling-up/out, i.e. connecting to other training cards inside</div><div class='add'>+  the server or in other servers, respectively.</div><div class='add'>+</div><div class='add'>+All these devices typically have different runtime user-space software stacks,</div><div class='add'>+that are tailored-made to their h/w. In addition, they will also probably</div><div class='add'>+include a compiler to generate programs to their custom-made computational</div><div class='add'>+engines. Typically, the common layer in user-space will be the DL frameworks,</div><div class='add'>+such as PyTorch and TensorFlow.</div><div class='add'>+</div><div class='add'>+Sharing code with DRM</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Because this type of devices can be an IP inside GPUs or have similar</div><div class='add'>+characteristics as those of GPUs, the accel subsystem will use the</div><div class='add'>+DRM subsystem's code and functionality. i.e. the accel core code will</div><div class='add'>+be part of the DRM subsystem and an accel device will be a new type of DRM</div><div class='add'>+device.</div><div class='add'>+</div><div class='add'>+This will allow us to leverage the extensive DRM code-base and</div><div class='add'>+collaborate with DRM developers that have experience with this type of</div><div class='add'>+devices. In addition, new features that will be added for the accelerator</div><div class='add'>+drivers can be of use to GPU drivers as well.</div><div class='add'>+</div><div class='add'>+Differentiation from GPUs</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+Because we want to prevent the extensive user-space graphic software stack</div><div class='add'>+from trying to use an accelerator as a GPU, the compute accelerators will be</div><div class='add'>+differentiated from GPUs by using a new major number and new device char files.</div><div class='add'>+</div><div class='add'>+Furthermore, the drivers will be located in a separate place in the kernel</div><div class='add'>+tree - drivers/accel/.</div><div class='add'>+</div><div class='add'>+The accelerator devices will be exposed to the user space with the dedicated</div><div class='add'>+261 major number and will have the following convention:</div><div class='add'>+</div><div class='add'>+- device char files - /dev/accel/accel\*</div><div class='add'>+- sysfs             - /sys/class/accel/accel\*/</div><div class='add'>+- debugfs           - /sys/kernel/debug/accel/\*/</div><div class='add'>+</div><div class='add'>+Getting Started</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+First, read the DRM documentation at Documentation/gpu/index.rst.</div><div class='add'>+Not only it will explain how to write a new DRM driver but it will also</div><div class='add'>+contain all the information on how to contribute, the Code Of Conduct and</div><div class='add'>+what is the coding style/documentation. All of that is the same for the</div><div class='add'>+accel subsystem.</div><div class='add'>+</div><div class='add'>+Second, make sure the kernel is configured with CONFIG_DRM_ACCEL.</div><div class='add'>+</div><div class='add'>+To expose your device as an accelerator, two changes are needed to</div><div class='add'>+be done in your driver (as opposed to a standard DRM driver):</div><div class='add'>+</div><div class='add'>+- Add the DRIVER_COMPUTE_ACCEL feature flag in your drm_driver's</div><div class='add'>+  driver_features field. It is important to note that this driver feature is</div><div class='add'>+  mutually exclusive with DRIVER_RENDER and DRIVER_MODESET. Devices that want</div><div class='add'>+  to expose both graphics and compute device char files should be handled by</div><div class='add'>+  two drivers that are connected using the auxiliary bus framework.</div><div class='add'>+</div><div class='add'>+- Change the open callback in your driver fops structure to accel_open().</div><div class='add'>+  Alternatively, your driver can use DEFINE_DRM_ACCEL_FOPS macro to easily</div><div class='add'>+  set the correct function operations pointers structure.</div><div class='add'>+</div><div class='add'>+External References</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+email threads</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+* `Initial discussion on the New subsystem for acceleration devices &lt;https://lkml.org/lkml/2022/7/31/83&gt;`_ - Oded Gabbay (2022)</div><div class='add'>+* `patch-set to add the new subsystem &lt;https://lkml.org/lkml/2022/10/22/544&gt;`_ - Oded Gabbay (2022)</div><div class='add'>+</div><div class='add'>+Conference talks</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+* `LPC 2022 Accelerators BOF outcomes summary &lt;https://airlied.blogspot.com/2022/09/accelerators-bof-outcomes-summary.html&gt;`_ - Dave Airlie (2022)</div><div class='head'>diff --git a/Documentation/accel/qaic/aic100.rst b/Documentation/accel/qaic/aic100.rst<br/>new file mode 100644<br/>index 000000000000..c80d0f1307db<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/accel/qaic/aic100.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/accel/qaic/aic100.rst</a></div><div class='hunk'>@@ -0,0 +1,510 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+===============================</div><div class='add'>+ Qualcomm Cloud AI 100 (AIC100)</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+The Qualcomm Cloud AI 100/AIC100 family of products (including SA9000P - part of</div><div class='add'>+Snapdragon Ride) are PCIe adapter cards which contain a dedicated SoC ASIC for</div><div class='add'>+the purpose of efficiently running Artificial Intelligence (AI) Deep Learning</div><div class='add'>+inference workloads. They are AI accelerators.</div><div class='add'>+</div><div class='add'>+The PCIe interface of AIC100 is capable of PCIe Gen4 speeds over eight lanes</div><div class='add'>+(x8). An individual SoC on a card can have up to 16 NSPs for running workloads.</div><div class='add'>+Each SoC has an A53 management CPU. On card, there can be up to 32 GB of DDR.</div><div class='add'>+</div><div class='add'>+Multiple AIC100 cards can be hosted in a single system to scale overall</div><div class='add'>+performance. AIC100 cards are multi-user capable and able to execute workloads</div><div class='add'>+from multiple users in a concurrent manner.</div><div class='add'>+</div><div class='add'>+Hardware Description</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+An AIC100 card consists of an AIC100 SoC, on-card DDR, and a set of misc</div><div class='add'>+peripherals (PMICs, etc).</div><div class='add'>+</div><div class='add'>+An AIC100 card can either be a PCIe HHHL form factor (a traditional PCIe card),</div><div class='add'>+or a Dual M.2 card. Both use PCIe to connect to the host system.</div><div class='add'>+</div><div class='add'>+As a PCIe endpoint/adapter, AIC100 uses the standard VendorID(VID)/</div><div class='add'>+DeviceID(DID) combination to uniquely identify itself to the host. AIC100</div><div class='add'>+uses the standard Qualcomm VID (0x17cb). All AIC100 SKUs use the same</div><div class='add'>+AIC100 DID (0xa100).</div><div class='add'>+</div><div class='add'>+AIC100 does not implement FLR (function level reset).</div><div class='add'>+</div><div class='add'>+AIC100 implements MSI but does not implement MSI-X. AIC100 requires 17 MSIs to</div><div class='add'>+operate (1 for MHI, 16 for the DMA Bridge).</div><div class='add'>+</div><div class='add'>+As a PCIe device, AIC100 utilizes BARs to provide host interfaces to the device</div><div class='add'>+hardware. AIC100 provides 3, 64-bit BARs.</div><div class='add'>+</div><div class='add'>+* The first BAR is 4K in size, and exposes the MHI interface to the host.</div><div class='add'>+</div><div class='add'>+* The second BAR is 2M in size, and exposes the DMA Bridge interface to the</div><div class='add'>+  host.</div><div class='add'>+</div><div class='add'>+* The third BAR is variable in size based on an individual AIC100's</div><div class='add'>+  configuration, but defaults to 64K. This BAR currently has no purpose.</div><div class='add'>+</div><div class='add'>+From the host perspective, AIC100 has several key hardware components -</div><div class='add'>+</div><div class='add'>+* MHI (Modem Host Interface)</div><div class='add'>+* QSM (QAIC Service Manager)</div><div class='add'>+* NSPs (Neural Signal Processor)</div><div class='add'>+* DMA Bridge</div><div class='add'>+* DDR</div><div class='add'>+</div><div class='add'>+MHI</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+AIC100 has one MHI interface over PCIe. MHI itself is documented at</div><div class='add'>+Documentation/mhi/index.rst MHI is the mechanism the host uses to communicate</div><div class='add'>+with the QSM. Except for workload data via the DMA Bridge, all interaction with</div><div class='add'>+the device occurs via MHI.</div><div class='add'>+</div><div class='add'>+QSM</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+QAIC Service Manager. This is an ARM A53 CPU that runs the primary</div><div class='add'>+firmware of the card and performs on-card management tasks. It also</div><div class='add'>+communicates with the host via MHI. Each AIC100 has one of</div><div class='add'>+these.</div><div class='add'>+</div><div class='add'>+NSP</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+Neural Signal Processor. Each AIC100 has up to 16 of these. These are</div><div class='add'>+the processors that run the workloads on AIC100. Each NSP is a Qualcomm Hexagon</div><div class='add'>+(Q6) DSP with HVX and HMX. Each NSP can only run one workload at a time, but</div><div class='add'>+multiple NSPs may be assigned to a single workload. Since each NSP can only run</div><div class='add'>+one workload, AIC100 is limited to 16 concurrent workloads. Workload</div><div class='add'>+"scheduling" is under the purview of the host. AIC100 does not automatically</div><div class='add'>+timeslice.</div><div class='add'>+</div><div class='add'>+DMA Bridge</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The DMA Bridge is custom DMA engine that manages the flow of data</div><div class='add'>+in and out of workloads. AIC100 has one of these. The DMA Bridge has 16</div><div class='add'>+channels, each consisting of a set of request/response FIFOs. Each active</div><div class='add'>+workload is assigned a single DMA Bridge channel. The DMA Bridge exposes</div><div class='add'>+hardware registers to manage the FIFOs (head/tail pointers), but requires host</div><div class='add'>+memory to store the FIFOs.</div><div class='add'>+</div><div class='add'>+DDR</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+AIC100 has on-card DDR. In total, an AIC100 can have up to 32 GB of DDR.</div><div class='add'>+This DDR is used to store workloads, data for the workloads, and is used by the</div><div class='add'>+QSM for managing the device. NSPs are granted access to sections of the DDR by</div><div class='add'>+the QSM. The host does not have direct access to the DDR, and must make</div><div class='add'>+requests to the QSM to transfer data to the DDR.</div><div class='add'>+</div><div class='add'>+High-level Use Flow</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+AIC100 is a multi-user, programmable accelerator typically used for running</div><div class='add'>+neural networks in inferencing mode to efficiently perform AI operations.</div><div class='add'>+AIC100 is not intended for training neural networks. AIC100 can be utilized</div><div class='add'>+for generic compute workloads.</div><div class='add'>+</div><div class='add'>+Assuming a user wants to utilize AIC100, they would follow these steps:</div><div class='add'>+</div><div class='add'>+1. Compile the workload into an ELF targeting the NSP(s)</div><div class='add'>+2. Make requests to the QSM to load the workload and related artifacts into the</div><div class='add'>+   device DDR</div><div class='add'>+3. Make a request to the QSM to activate the workload onto a set of idle NSPs</div><div class='add'>+4. Make requests to the DMA Bridge to send input data to the workload to be</div><div class='add'>+   processed, and other requests to receive processed output data from the</div><div class='add'>+   workload.</div><div class='add'>+5. Once the workload is no longer required, make a request to the QSM to</div><div class='add'>+   deactivate the workload, thus putting the NSPs back into an idle state.</div><div class='add'>+6. Once the workload and related artifacts are no longer needed for future</div><div class='add'>+   sessions, make requests to the QSM to unload the data from DDR. This frees</div><div class='add'>+   the DDR to be used by other users.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Boot Flow</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+AIC100 uses a flashless boot flow, derived from Qualcomm MSMs.</div><div class='add'>+</div><div class='add'>+When AIC100 is first powered on, it begins executing PBL (Primary Bootloader)</div><div class='add'>+from ROM. PBL enumerates the PCIe link, and initializes the BHI (Boot Host</div><div class='add'>+Interface) component of MHI.</div><div class='add'>+</div><div class='add'>+Using BHI, the host points PBL to the location of the SBL (Secondary Bootloader)</div><div class='add'>+image. The PBL pulls the image from the host, validates it, and begins</div><div class='add'>+execution of SBL.</div><div class='add'>+</div><div class='add'>+SBL initializes MHI, and uses MHI to notify the host that the device has entered</div><div class='add'>+the SBL stage. SBL performs a number of operations:</div><div class='add'>+</div><div class='add'>+* SBL initializes the majority of hardware (anything PBL left uninitialized),</div><div class='add'>+  including DDR.</div><div class='add'>+* SBL offloads the bootlog to the host.</div><div class='add'>+* SBL synchronizes timestamps with the host for future logging.</div><div class='add'>+* SBL uses the Sahara protocol to obtain the runtime firmware images from the</div><div class='add'>+  host.</div><div class='add'>+</div><div class='add'>+Once SBL has obtained and validated the runtime firmware, it brings the NSPs out</div><div class='add'>+of reset, and jumps into the QSM.</div><div class='add'>+</div><div class='add'>+The QSM uses MHI to notify the host that the device has entered the QSM stage</div><div class='add'>+(AMSS in MHI terms). At this point, the AIC100 device is fully functional, and</div><div class='add'>+ready to process workloads.</div><div class='add'>+</div><div class='add'>+Userspace components</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+Compiler</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+An open compiler for AIC100 based on upstream LLVM can be found at:</div><div class='add'>+https://github.com/quic/software-kit-for-qualcomm-cloud-ai-100-cc</div><div class='add'>+</div><div class='add'>+Usermode Driver (UMD)</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+An open UMD that interfaces with the qaic kernel driver can be found at:</div><div class='add'>+https://github.com/quic/software-kit-for-qualcomm-cloud-ai-100</div><div class='add'>+</div><div class='add'>+Sahara loader</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+An open implementation of the Sahara protocol called kickstart can be found at:</div><div class='add'>+https://github.com/andersson/qdl</div><div class='add'>+</div><div class='add'>+MHI Channels</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+AIC100 defines a number of MHI channels for different purposes. This is a list</div><div class='add'>+of the defined channels, and their uses.</div><div class='add'>+</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| Channel name   | IDs     | EEs      | Purpose                                |</div><div class='add'>++================+=========+==========+========================================+</div><div class='add'>+| QAIC_LOOPBACK  | 0 &amp; 1   | AMSS     | Any data sent to the device on this    |</div><div class='add'>+|                |         |          | channel is sent back to the host.      |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_SAHARA    | 2 &amp; 3   | SBL      | Used by SBL to obtain the runtime      |</div><div class='add'>+|                |         |          | firmware from the host.                |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_DIAG      | 4 &amp; 5   | AMSS     | Used to communicate with QSM via the   |</div><div class='add'>+|                |         |          | DIAG protocol.                         |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_SSR       | 6 &amp; 7   | AMSS     | Used to notify the host of subsystem   |</div><div class='add'>+|                |         |          | restart events, and to offload SSR     |</div><div class='add'>+|                |         |          | crashdumps.                            |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_QDSS      | 8 &amp; 9   | AMSS     | Used for the Qualcomm Debug Subsystem. |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_CONTROL   | 10 &amp; 11 | AMSS     | Used for the Neural Network Control    |</div><div class='add'>+|                |         |          | (NNC) protocol. This is the primary    |</div><div class='add'>+|                |         |          | channel between host and QSM for       |</div><div class='add'>+|                |         |          | managing workloads.                    |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_LOGGING   | 12 &amp; 13 | SBL      | Used by the SBL to send the bootlog to |</div><div class='add'>+|                |         |          | the host.                              |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_STATUS    | 14 &amp; 15 | AMSS     | Used to notify the host of Reliability,|</div><div class='add'>+|                |         |          | Accessibility, Serviceability (RAS)    |</div><div class='add'>+|                |         |          | events.                                |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_TELEMETRY | 16 &amp; 17 | AMSS     | Used to get/set power/thermal/etc      |</div><div class='add'>+|                |         |          | attributes.                            |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_DEBUG     | 18 &amp; 19 | AMSS     | Not used.                              |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+| QAIC_TIMESYNC  | 20 &amp; 21 | SBL/AMSS | Used to synchronize timestamps in the  |</div><div class='add'>+|                |         |          | device side logs with the host time    |</div><div class='add'>+|                |         |          | source.                                |</div><div class='add'>++----------------+---------+----------+----------------------------------------+</div><div class='add'>+</div><div class='add'>+DMA Bridge</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+The DMA Bridge is one of the main interfaces to the host from the device</div><div class='add'>+(the other being MHI). As part of activating a workload to run on NSPs, the QSM</div><div class='add'>+assigns that network a DMA Bridge channel. A workload's DMA Bridge channel</div><div class='add'>+(DBC for short) is solely for the use of that workload and is not shared with</div><div class='add'>+other workloads.</div><div class='add'>+</div><div class='add'>+Each DBC is a pair of FIFOs that manage data in and out of the workload. One</div><div class='add'>+FIFO is the request FIFO. The other FIFO is the response FIFO.</div><div class='add'>+</div><div class='add'>+Each DBC contains 4 registers in hardware:</div><div class='add'>+</div><div class='add'>+* Request FIFO head pointer (offset 0x0). Read only by the host. Indicates the</div><div class='add'>+  latest item in the FIFO the device has consumed.</div><div class='add'>+* Request FIFO tail pointer (offset 0x4). Read/write by the host. Host</div><div class='add'>+  increments this register to add new items to the FIFO.</div><div class='add'>+* Response FIFO head pointer (offset 0x8). Read/write by the host. Indicates</div><div class='add'>+  the latest item in the FIFO the host has consumed.</div><div class='add'>+* Response FIFO tail pointer (offset 0xc). Read only by the host. Device</div><div class='add'>+  increments this register to add new items to the FIFO.</div><div class='add'>+</div><div class='add'>+The values in each register are indexes in the FIFO. To get the location of the</div><div class='add'>+FIFO element pointed to by the register: FIFO base address + register * element</div><div class='add'>+size.</div><div class='add'>+</div><div class='add'>+DBC registers are exposed to the host via the second BAR. Each DBC consumes</div><div class='add'>+4KB of space in the BAR.</div><div class='add'>+</div><div class='add'>+The actual FIFOs are backed by host memory. When sending a request to the QSM</div><div class='add'>+to activate a network, the host must donate memory to be used for the FIFOs.</div><div class='add'>+Due to internal mapping limitations of the device, a single contiguous chunk of</div><div class='add'>+memory must be provided per DBC, which hosts both FIFOs. The request FIFO will</div><div class='add'>+consume the beginning of the memory chunk, and the response FIFO will consume</div><div class='add'>+the end of the memory chunk.</div><div class='add'>+</div><div class='add'>+Request FIFO</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+A request FIFO element has the following structure:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+  struct request_elem {</div><div class='add'>+	u16 req_id;</div><div class='add'>+	u8  seq_id;</div><div class='add'>+	u8  pcie_dma_cmd;</div><div class='add'>+	u32 reserved;</div><div class='add'>+	u64 pcie_dma_source_addr;</div><div class='add'>+	u64 pcie_dma_dest_addr;</div><div class='add'>+	u32 pcie_dma_len;</div><div class='add'>+	u32 reserved;</div><div class='add'>+	u64 doorbell_addr;</div><div class='add'>+	u8  doorbell_attr;</div><div class='add'>+	u8  reserved;</div><div class='add'>+	u16 reserved;</div><div class='add'>+	u32 doorbell_data;</div><div class='add'>+	u32 sem_cmd0;</div><div class='add'>+	u32 sem_cmd1;</div><div class='add'>+	u32 sem_cmd2;</div><div class='add'>+	u32 sem_cmd3;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+Request field descriptions:</div><div class='add'>+</div><div class='add'>+req_id</div><div class='add'>+	request ID. A request FIFO element and a response FIFO element with</div><div class='add'>+	the same request ID refer to the same command.</div><div class='add'>+</div><div class='add'>+seq_id</div><div class='add'>+	sequence ID within a request. Ignored by the DMA Bridge.</div><div class='add'>+</div><div class='add'>+pcie_dma_cmd</div><div class='add'>+	describes the DMA element of this request.</div><div class='add'>+</div><div class='add'>+	* Bit(7) is the force msi flag, which overrides the DMA Bridge MSI logic</div><div class='add'>+	  and generates a MSI when this request is complete, and QSM</div><div class='add'>+	  configures the DMA Bridge to look at this bit.</div><div class='add'>+	* Bits(6:5) are reserved.</div><div class='add'>+	* Bit(4) is the completion code flag, and indicates that the DMA Bridge</div><div class='add'>+	  shall generate a response FIFO element when this request is</div><div class='add'>+	  complete.</div><div class='add'>+	* Bit(3) indicates if this request is a linked list transfer(0) or a bulk</div><div class='add'>+	  transfer(1).</div><div class='add'>+	* Bit(2) is reserved.</div><div class='add'>+	* Bits(1:0) indicate the type of transfer. No transfer(0), to device(1),</div><div class='add'>+	  from device(2). Value 3 is illegal.</div><div class='add'>+</div><div class='add'>+pcie_dma_source_addr</div><div class='add'>+	source address for a bulk transfer, or the address of the linked list.</div><div class='add'>+</div><div class='add'>+pcie_dma_dest_addr</div><div class='add'>+	destination address for a bulk transfer.</div><div class='add'>+</div><div class='add'>+pcie_dma_len</div><div class='add'>+	length of the bulk transfer. Note that the size of this field</div><div class='add'>+	limits transfers to 4G in size.</div><div class='add'>+</div><div class='add'>+doorbell_addr</div><div class='add'>+	address of the doorbell to ring when this request is complete.</div><div class='add'>+</div><div class='add'>+doorbell_attr</div><div class='add'>+	doorbell attributes.</div><div class='add'>+</div><div class='add'>+	* Bit(7) indicates if a write to a doorbell is to occur.</div><div class='add'>+	* Bits(6:2) are reserved.</div><div class='add'>+	* Bits(1:0) contain the encoding of the doorbell length. 0 is 32-bit,</div><div class='add'>+	  1 is 16-bit, 2 is 8-bit, 3 is reserved. The doorbell address</div><div class='add'>+	  must be naturally aligned to the specified length.</div><div class='add'>+</div><div class='add'>+doorbell_data</div><div class='add'>+	data to write to the doorbell. Only the bits corresponding to</div><div class='add'>+	the doorbell length are valid.</div><div class='add'>+</div><div class='add'>+sem_cmdN</div><div class='add'>+	semaphore command.</div><div class='add'>+</div><div class='add'>+	* Bit(31) indicates this semaphore command is enabled.</div><div class='add'>+	* Bit(30) is the to-device DMA fence. Block this request until all</div><div class='add'>+	  to-device DMA transfers are complete.</div><div class='add'>+	* Bit(29) is the from-device DMA fence. Block this request until all</div><div class='add'>+	  from-device DMA transfers are complete.</div><div class='add'>+	* Bits(28:27) are reserved.</div><div class='add'>+	* Bits(26:24) are the semaphore command. 0 is NOP. 1 is init with the</div><div class='add'>+	  specified value. 2 is increment. 3 is decrement. 4 is wait</div><div class='add'>+	  until the semaphore is equal to the specified value. 5 is wait</div><div class='add'>+	  until the semaphore is greater or equal to the specified value.</div><div class='add'>+	  6 is "P", wait until semaphore is greater than 0, then</div><div class='add'>+	  decrement by 1. 7 is reserved.</div><div class='add'>+	* Bit(23) is reserved.</div><div class='add'>+	* Bit(22) is the semaphore sync. 0 is post sync, which means that the</div><div class='add'>+	  semaphore operation is done after the DMA transfer. 1 is</div><div class='add'>+	  presync, which gates the DMA transfer. Only one presync is</div><div class='add'>+	  allowed per request.</div><div class='add'>+	* Bit(21) is reserved.</div><div class='add'>+	* Bits(20:16) is the index of the semaphore to operate on.</div><div class='add'>+	* Bits(15:12) are reserved.</div><div class='add'>+	* Bits(11:0) are the semaphore value to use in operations.</div><div class='add'>+</div><div class='add'>+Overall, a request is processed in 4 steps:</div><div class='add'>+</div><div class='add'>+1. If specified, the presync semaphore condition must be true</div><div class='add'>+2. If enabled, the DMA transfer occurs</div><div class='add'>+3. If specified, the postsync semaphore conditions must be true</div><div class='add'>+4. If enabled, the doorbell is written</div><div class='add'>+</div><div class='add'>+By using the semaphores in conjunction with the workload running on the NSPs,</div><div class='add'>+the data pipeline can be synchronized such that the host can queue multiple</div><div class='add'>+requests of data for the workload to process, but the DMA Bridge will only copy</div><div class='add'>+the data into the memory of the workload when the workload is ready to process</div><div class='add'>+the next input.</div><div class='add'>+</div><div class='add'>+Response FIFO</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Once a request is fully processed, a response FIFO element is generated if</div><div class='add'>+specified in pcie_dma_cmd. The structure of a response FIFO element:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+  struct response_elem {</div><div class='add'>+	u16 req_id;</div><div class='add'>+	u16 completion_code;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+req_id</div><div class='add'>+	matches the req_id of the request that generated this element.</div><div class='add'>+</div><div class='add'>+completion_code</div><div class='add'>+	status of this request. 0 is success. Non-zero is an error.</div><div class='add'>+</div><div class='add'>+The DMA Bridge will generate a MSI to the host as a reaction to activity in the</div><div class='add'>+response FIFO of a DBC. The DMA Bridge hardware has an IRQ storm mitigation</div><div class='add'>+algorithm, where it will only generate a MSI when the response FIFO transitions</div><div class='add'>+from empty to non-empty (unless force MSI is enabled and triggered). In</div><div class='add'>+response to this MSI, the host is expected to drain the response FIFO, and must</div><div class='add'>+take care to handle any race conditions between draining the FIFO, and the</div><div class='add'>+device inserting elements into the FIFO.</div><div class='add'>+</div><div class='add'>+Neural Network Control (NNC) Protocol</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+The NNC protocol is how the host makes requests to the QSM to manage workloads.</div><div class='add'>+It uses the QAIC_CONTROL MHI channel.</div><div class='add'>+</div><div class='add'>+Each NNC request is packaged into a message. Each message is a series of</div><div class='add'>+transactions. A passthrough type transaction can contain elements known as</div><div class='add'>+commands.</div><div class='add'>+</div><div class='add'>+QSM requires NNC messages be little endian encoded and the fields be naturally</div><div class='add'>+aligned. Since there are 64-bit elements in some NNC messages, 64-bit alignment</div><div class='add'>+must be maintained.</div><div class='add'>+</div><div class='add'>+A message contains a header and then a series of transactions. A message may be</div><div class='add'>+at most 4K in size from QSM to the host. From the host to the QSM, a message</div><div class='add'>+can be at most 64K (maximum size of a single MHI packet), but there is a</div><div class='add'>+continuation feature where message N+1 can be marked as a continuation of</div><div class='add'>+message N. This is used for exceedingly large DMA xfer transactions.</div><div class='add'>+</div><div class='add'>+Transaction descriptions</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+passthrough</div><div class='add'>+	Allows userspace to send an opaque payload directly to the QSM.</div><div class='add'>+	This is used for NNC commands. Userspace is responsible for managing</div><div class='add'>+	the QSM message requirements in the payload.</div><div class='add'>+</div><div class='add'>+dma_xfer</div><div class='add'>+	DMA transfer. Describes an object that the QSM should DMA into the</div><div class='add'>+	device via address and size tuples.</div><div class='add'>+</div><div class='add'>+activate</div><div class='add'>+	Activate a workload onto NSPs. The host must provide memory to be</div><div class='add'>+	used by the DBC.</div><div class='add'>+</div><div class='add'>+deactivate</div><div class='add'>+	Deactivate an active workload and return the NSPs to idle.</div><div class='add'>+</div><div class='add'>+status</div><div class='add'>+	Query the QSM about it's NNC implementation. Returns the NNC version,</div><div class='add'>+	and if CRC is used.</div><div class='add'>+</div><div class='add'>+terminate</div><div class='add'>+	Release a user's resources.</div><div class='add'>+</div><div class='add'>+dma_xfer_cont</div><div class='add'>+	Continuation of a previous DMA transfer. If a DMA transfer</div><div class='add'>+	cannot be specified in a single message (highly fragmented), this</div><div class='add'>+	transaction can be used to specify more ranges.</div><div class='add'>+</div><div class='add'>+validate_partition</div><div class='add'>+	Query to QSM to determine if a partition identifier is valid.</div><div class='add'>+</div><div class='add'>+Each message is tagged with a user id, and a partition id. The user id allows</div><div class='add'>+QSM to track resources, and release them when the user goes away (eg the process</div><div class='add'>+crashes). A partition id identifies the resource partition that QSM manages,</div><div class='add'>+which this message applies to.</div><div class='add'>+</div><div class='add'>+Messages may have CRCs. Messages should have CRCs applied until the QSM</div><div class='add'>+reports via the status transaction that CRCs are not needed. The QSM on the</div><div class='add'>+SA9000P requires CRCs for black channel safing.</div><div class='add'>+</div><div class='add'>+Subsystem Restart (SSR)</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+SSR is the concept of limiting the impact of an error. An AIC100 device may</div><div class='add'>+have multiple users, each with their own workload running. If the workload of</div><div class='add'>+one user crashes, the fallout of that should be limited to that workload and not</div><div class='add'>+impact other workloads. SSR accomplishes this.</div><div class='add'>+</div><div class='add'>+If a particular workload crashes, QSM notifies the host via the QAIC_SSR MHI</div><div class='add'>+channel. This notification identifies the workload by it's assigned DBC. A</div><div class='add'>+multi-stage recovery process is then used to cleanup both sides, and get the</div><div class='add'>+DBC/NSPs into a working state.</div><div class='add'>+</div><div class='add'>+When SSR occurs, any state in the workload is lost. Any inputs that were in</div><div class='add'>+process, or queued by not yet serviced, are lost. The loaded artifacts will</div><div class='add'>+remain in on-card DDR, but the host will need to re-activate the workload if</div><div class='add'>+it desires to recover the workload.</div><div class='add'>+</div><div class='add'>+Reliability, Accessibility, Serviceability (RAS)</div><div class='add'>+================================================</div><div class='add'>+</div><div class='add'>+AIC100 is expected to be deployed in server systems where RAS ideology is</div><div class='add'>+applied. Simply put, RAS is the concept of detecting, classifying, and</div><div class='add'>+reporting errors. While PCIe has AER (Advanced Error Reporting) which factors</div><div class='add'>+into RAS, AER does not allow for a device to report details about internal</div><div class='add'>+errors. Therefore, AIC100 implements a custom RAS mechanism. When a RAS event</div><div class='add'>+occurs, QSM will report the event with appropriate details via the QAIC_STATUS</div><div class='add'>+MHI channel. A sysadmin may determine that a particular device needs</div><div class='add'>+additional service based on RAS reports.</div><div class='add'>+</div><div class='add'>+Telemetry</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+QSM has the ability to report various physical attributes of the device, and in</div><div class='add'>+some cases, to allow the host to control them. Examples include thermal limits,</div><div class='add'>+thermal readings, and power readings. These items are communicated via the</div><div class='add'>+QAIC_TELEMETRY MHI channel.</div><div class='head'>diff --git a/Documentation/accel/qaic/index.rst b/Documentation/accel/qaic/index.rst<br/>new file mode 100644<br/>index 000000000000..ad19b88d1a66<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/accel/qaic/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/accel/qaic/index.rst</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+=====================================</div><div class='add'>+ accel/qaic Qualcomm Cloud AI driver</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+The accel/qaic driver supports the Qualcomm Cloud AI machine learning</div><div class='add'>+accelerator cards.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+</div><div class='add'>+   qaic</div><div class='add'>+   aic100</div><div class='head'>diff --git a/Documentation/accel/qaic/qaic.rst b/Documentation/accel/qaic/qaic.rst<br/>new file mode 100644<br/>index 000000000000..72a70ab6e3a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/accel/qaic/qaic.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/accel/qaic/qaic.rst</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+=============</div><div class='add'>+ QAIC driver</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+The QAIC driver is the Kernel Mode Driver (KMD) for the AIC100 family of AI</div><div class='add'>+accelerator products.</div><div class='add'>+</div><div class='add'>+Interrupts</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+While the AIC100 DMA Bridge hardware implements an IRQ storm mitigation</div><div class='add'>+mechanism, it is still possible for an IRQ storm to occur. A storm can happen</div><div class='add'>+if the workload is particularly quick, and the host is responsive. If the host</div><div class='add'>+can drain the response FIFO as quickly as the device can insert elements into</div><div class='add'>+it, then the device will frequently transition the response FIFO from empty to</div><div class='add'>+non-empty and generate MSIs at a rate equivalent to the speed of the</div><div class='add'>+workload's ability to process inputs. The lprnet (license plate reader network)</div><div class='add'>+workload is known to trigger this condition, and can generate in excess of 100k</div><div class='add'>+MSIs per second. It has been observed that most systems cannot tolerate this</div><div class='add'>+for long, and will crash due to some form of watchdog due to the overhead of</div><div class='add'>+the interrupt controller interrupting the host CPU.</div><div class='add'>+</div><div class='add'>+To mitigate this issue, the QAIC driver implements specific IRQ handling. When</div><div class='add'>+QAIC receives an IRQ, it disables that line. This prevents the interrupt</div><div class='add'>+controller from interrupting the CPU. Then AIC drains the FIFO. Once the FIFO</div><div class='add'>+is drained, QAIC implements a "last chance" polling algorithm where QAIC will</div><div class='add'>+sleep for a time to see if the workload will generate more activity. The IRQ</div><div class='add'>+line remains disabled during this time. If no activity is detected, QAIC exits</div><div class='add'>+polling mode and reenables the IRQ line.</div><div class='add'>+</div><div class='add'>+This mitigation in QAIC is very effective. The same lprnet usecase that</div><div class='add'>+generates 100k IRQs per second (per /proc/interrupts) is reduced to roughly 64</div><div class='add'>+IRQs over 5 minutes while keeping the host system stable, and having the same</div><div class='add'>+workload throughput performance (within run to run noise variation).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Neural Network Control (NNC) Protocol</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+The implementation of NNC is split between the KMD (QAIC) and UMD. In general</div><div class='add'>+QAIC understands how to encode/decode NNC wire protocol, and elements of the</div><div class='add'>+protocol which require kernel space knowledge to process (for example, mapping</div><div class='add'>+host memory to device IOVAs). QAIC understands the structure of a message, and</div><div class='add'>+all of the transactions. QAIC does not understand commands (the payload of a</div><div class='add'>+passthrough transaction).</div><div class='add'>+</div><div class='add'>+QAIC handles and enforces the required little endianness and 64-bit alignment,</div><div class='add'>+to the degree that it can. Since QAIC does not know the contents of a</div><div class='add'>+passthrough transaction, it relies on the UMD to satisfy the requirements.</div><div class='add'>+</div><div class='add'>+The terminate transaction is of particular use to QAIC. QAIC is not aware of</div><div class='add'>+the resources that are loaded onto a device since the majority of that activity</div><div class='add'>+occurs within NNC commands. As a result, QAIC does not have the means to</div><div class='add'>+roll back userspace activity. To ensure that a userspace client's resources</div><div class='add'>+are fully released in the case of a process crash, or a bug, QAIC uses the</div><div class='add'>+terminate command to let QSM know when a user has gone away, and the resources</div><div class='add'>+can be released.</div><div class='add'>+</div><div class='add'>+QSM can report a version number of the NNC protocol it supports. This is in the</div><div class='add'>+form of a Major number and a Minor number.</div><div class='add'>+</div><div class='add'>+Major number updates indicate changes to the NNC protocol which impact the</div><div class='add'>+message format, or transactions (impacts QAIC).</div><div class='add'>+</div><div class='add'>+Minor number updates indicate changes to the NNC protocol which impact the</div><div class='add'>+commands (does not impact QAIC).</div><div class='add'>+</div><div class='add'>+uAPI</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+QAIC defines a number of driver specific IOCTLs as part of the userspace API.</div><div class='add'>+This section describes those APIs.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_MANAGE</div><div class='add'>+  This IOCTL allows userspace to send a NNC request to the QSM. The call will</div><div class='add'>+  block until a response is received, or the request has timed out.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_CREATE_BO</div><div class='add'>+  This IOCTL allows userspace to allocate a buffer object (BO) which can send</div><div class='add'>+  or receive data from a workload. The call will return a GEM handle that</div><div class='add'>+  represents the allocated buffer. The BO is not usable until it has been</div><div class='add'>+  sliced (see DRM_IOCTL_QAIC_ATTACH_SLICE_BO).</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_MMAP_BO</div><div class='add'>+  This IOCTL allows userspace to prepare an allocated BO to be mmap'd into the</div><div class='add'>+  userspace process.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_ATTACH_SLICE_BO</div><div class='add'>+  This IOCTL allows userspace to slice a BO in preparation for sending the BO</div><div class='add'>+  to the device. Slicing is the operation of describing what portions of a BO</div><div class='add'>+  get sent where to a workload. This requires a set of DMA transfers for the</div><div class='add'>+  DMA Bridge, and as such, locks the BO to a specific DBC.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_EXECUTE_BO</div><div class='add'>+  This IOCTL allows userspace to submit a set of sliced BOs to the device. The</div><div class='add'>+  call is non-blocking. Success only indicates that the BOs have been queued</div><div class='add'>+  to the device, but does not guarantee they have been executed.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_PARTIAL_EXECUTE_BO</div><div class='add'>+  This IOCTL operates like DRM_IOCTL_QAIC_EXECUTE_BO, but it allows userspace</div><div class='add'>+  to shrink the BOs sent to the device for this specific call. If a BO</div><div class='add'>+  typically has N inputs, but only a subset of those is available, this IOCTL</div><div class='add'>+  allows userspace to indicate that only the first M bytes of the BO should be</div><div class='add'>+  sent to the device to minimize data transfer overhead. This IOCTL dynamically</div><div class='add'>+  recomputes the slicing, and therefore has some processing overhead before the</div><div class='add'>+  BOs can be queued to the device.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_WAIT_BO</div><div class='add'>+  This IOCTL allows userspace to determine when a particular BO has been</div><div class='add'>+  processed by the device. The call will block until either the BO has been</div><div class='add'>+  processed and can be re-queued to the device, or a timeout occurs.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_PERF_STATS_BO</div><div class='add'>+  This IOCTL allows userspace to collect performance statistics on the most</div><div class='add'>+  recent execution of a BO. This allows userspace to construct an end to end</div><div class='add'>+  timeline of the BO processing for a performance analysis.</div><div class='add'>+</div><div class='add'>+DRM_IOCTL_QAIC_PART_DEV</div><div class='add'>+  This IOCTL allows userspace to request a duplicate "shadow device". This extra</div><div class='add'>+  accelN device is associated with a specific partition of resources on the</div><div class='add'>+  AIC100 device and can be used for limiting a process to some subset of</div><div class='add'>+  resources.</div><div class='add'>+</div><div class='add'>+Userspace Client Isolation</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+AIC100 supports multiple clients. Multiple DBCs can be consumed by a single</div><div class='add'>+client, and multiple clients can each consume one or more DBCs. Workloads</div><div class='add'>+may contain sensitive information therefore only the client that owns the</div><div class='add'>+workload should be allowed to interface with the DBC.</div><div class='add'>+</div><div class='add'>+Clients are identified by the instance associated with their open(). A client</div><div class='add'>+may only use memory they allocate, and DBCs that are assigned to their</div><div class='add'>+workloads. Attempts to access resources assigned to other clients will be</div><div class='add'>+rejected.</div><div class='add'>+</div><div class='add'>+Module parameters</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+QAIC supports the following module parameters:</div><div class='add'>+</div><div class='add'>+**datapath_polling (bool)**</div><div class='add'>+</div><div class='add'>+Configures QAIC to use a polling thread for datapath events instead of relying</div><div class='add'>+on the device interrupts. Useful for platforms with broken multiMSI. Must be</div><div class='add'>+set at QAIC driver initialization. Default is 0 (off).</div><div class='add'>+</div><div class='add'>+**mhi_timeout_ms (unsigned int)**</div><div class='add'>+</div><div class='add'>+Sets the timeout value for MHI operations in milliseconds (ms). Must be set</div><div class='add'>+at the time the driver detects a device. Default is 2000 (2 seconds).</div><div class='add'>+</div><div class='add'>+**control_resp_timeout_s (unsigned int)**</div><div class='add'>+</div><div class='add'>+Sets the timeout value for QSM responses to NNC messages in seconds (s). Must</div><div class='add'>+be set at the time the driver is sending a request to QSM. Default is 60 (one</div><div class='add'>+minute).</div><div class='add'>+</div><div class='add'>+**wait_exec_default_timeout_ms (unsigned int)**</div><div class='add'>+</div><div class='add'>+Sets the default timeout for the wait_exec ioctl in milliseconds (ms). Must be</div><div class='add'>+set prior to the waic_exec ioctl call. A value specified in the ioctl call</div><div class='add'>+overrides this for that call. Default is 5000 (5 seconds).</div><div class='add'>+</div><div class='add'>+**datapath_poll_interval_us (unsigned int)**</div><div class='add'>+</div><div class='add'>+Sets the polling interval in microseconds (us) when datapath polling is active.</div><div class='add'>+Takes effect at the next polling interval. Default is 100 (100 us).</div><div class='head'>diff --git a/Documentation/accounting/delay-accounting.rst b/Documentation/accounting/delay-accounting.rst<br/>index 197fe319cbec..f61c01fc376e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/accounting/delay-accounting.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/accounting/delay-accounting.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/accounting/delay-accounting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/accounting/delay-accounting.rst</a></div><div class='hunk'>@@ -13,8 +13,10 @@ a) waiting for a CPU (while being runnable)</div><div class='ctx'> b) completion of synchronous block I/O initiated by the task</div><div class='ctx'> c) swapping in pages</div><div class='ctx'> d) memory reclaim</div><div class='del'>-e) thrashing page cache</div><div class='add'>+e) thrashing</div><div class='ctx'> f) direct compact</div><div class='add'>+g) write-protect copy</div><div class='add'>+h) IRQ/SOFTIRQ</div><div class='ctx'> </div><div class='ctx'> and makes these statistics available to userspace through</div><div class='ctx'> the taskstats interface.</div><div class='hunk'>@@ -48,7 +50,7 @@ this structure. See</div><div class='ctx'> for a description of the fields pertaining to delay accounting.</div><div class='ctx'> It will generally be in the form of counters returning the cumulative</div><div class='ctx'> delay seen for cpu, sync block I/O, swapin, memory reclaim, thrash page</div><div class='del'>-cache, direct compact etc.</div><div class='add'>+cache, direct compact, write-protect copy, IRQ/SOFTIRQ etc.</div><div class='ctx'> </div><div class='ctx'> Taking the difference of two successive readings of a given</div><div class='ctx'> counter (say cpu_delay_total) for a task will give the delay</div><div class='hunk'>@@ -108,15 +110,19 @@ Get sum of delays, since system boot, for all pids with tgid 5::</div><div class='ctx'> 	CPU             count     real total  virtual total    delay total  delay average</div><div class='ctx'> 	                    8        7000000        6872122        3382277          0.423ms</div><div class='ctx'> 	IO              count    delay total  delay average</div><div class='del'>-		            0              0              0ms</div><div class='add'>+                   0              0          0.000ms</div><div class='ctx'> 	SWAP            count    delay total  delay average</div><div class='del'>-	                    0              0              0ms</div><div class='add'>+                       0              0          0.000ms</div><div class='ctx'> 	RECLAIM         count    delay total  delay average</div><div class='del'>-		            0              0              0ms</div><div class='add'>+                   0              0          0.000ms</div><div class='ctx'> 	THRASHING       count    delay total  delay average</div><div class='del'>-	                    0              0              0ms</div><div class='add'>+                       0              0          0.000ms</div><div class='ctx'> 	COMPACT         count    delay total  delay average</div><div class='del'>-	                    0              0              0ms</div><div class='add'>+                       0              0          0.000ms</div><div class='add'>+	WPCOPY          count    delay total  delay average</div><div class='add'>+                       0              0          0.000ms</div><div class='add'>+	IRQ             count    delay total  delay average</div><div class='add'>+                       0              0          0.000ms</div><div class='ctx'> </div><div class='ctx'> Get IO accounting for pid 1, it works only with -p::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/accounting/psi.rst b/Documentation/accounting/psi.rst<br/>index 860fe651d645..df6062eb3abb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/accounting/psi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/accounting/psi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/accounting/psi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/accounting/psi.rst</a></div><div class='hunk'>@@ -37,11 +37,7 @@ Pressure interface</div><div class='ctx'> Pressure information for each resource is exported through the</div><div class='ctx'> respective file in /proc/pressure/ -- cpu, memory, and io.</div><div class='ctx'> </div><div class='del'>-The format for CPU is as such::</div><div class='del'>-</div><div class='del'>-	some avg10=0.00 avg60=0.00 avg300=0.00 total=0</div><div class='del'>-</div><div class='del'>-and for memory and IO::</div><div class='add'>+The format is as such::</div><div class='ctx'> </div><div class='ctx'> 	some avg10=0.00 avg60=0.00 avg300=0.00 total=0</div><div class='ctx'> 	full avg10=0.00 avg60=0.00 avg300=0.00 total=0</div><div class='hunk'>@@ -58,6 +54,9 @@ situation from a state where some tasks are stalled but the CPU is</div><div class='ctx'> still doing productive work. As such, time spent in this subset of the</div><div class='ctx'> stall state is tracked separately and exported in the "full" averages.</div><div class='ctx'> </div><div class='add'>+CPU full is undefined at the system level, but has been reported</div><div class='add'>+since 5.13, so it is set to zero for backward compatibility.</div><div class='add'>+</div><div class='ctx'> The ratios (in %) are tracked as recent trends over ten, sixty, and</div><div class='ctx'> three hundred second windows, which gives insight into short term events</div><div class='ctx'> as well as medium and long term trends. The total absolute stall time</div><div class='hunk'>@@ -106,6 +105,10 @@ prevent overly frequent polling. Max limit is chosen as a high enough number</div><div class='ctx'> after which monitors are most likely not needed and psi averages can be used</div><div class='ctx'> instead.</div><div class='ctx'> </div><div class='add'>+Unprivileged users can also create monitors, with the only limitation that the</div><div class='add'>+window size must be a multiple of 2s, in order to prevent excessive resource</div><div class='add'>+usage.</div><div class='add'>+</div><div class='ctx'> When activated, psi monitor stays active for at least the duration of one</div><div class='ctx'> tracking window to avoid repeated activations/deactivations when system is</div><div class='ctx'> bouncing in and out of the stall state.</div><div class='head'>diff --git a/Documentation/admin-guide/README.rst b/Documentation/admin-guide/README.rst<br/>index caa3c09a5c3f..9a969c0157f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/README.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/README.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/README.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/README.rst</a></div><div class='hunk'>@@ -1,9 +1,9 @@</div><div class='ctx'> .. _readme:</div><div class='ctx'> </div><div class='del'>-Linux kernel release 5.x &lt;http://kernel.org/&gt;</div><div class='add'>+Linux kernel release 6.x &lt;http://kernel.org/&gt;</div><div class='ctx'> =============================================</div><div class='ctx'> </div><div class='del'>-These are the release notes for Linux version 5.  Read them carefully,</div><div class='add'>+These are the release notes for Linux version 6.  Read them carefully,</div><div class='ctx'> as they tell you what this is all about, explain how to install the</div><div class='ctx'> kernel, and what to do if something goes wrong.</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +63,7 @@ Installing the kernel source</div><div class='ctx'>    directory where you have permissions (e.g. your home directory) and</div><div class='ctx'>    unpack it::</div><div class='ctx'> </div><div class='del'>-     xz -cd linux-5.x.tar.xz | tar xvf -</div><div class='add'>+     xz -cd linux-6.x.tar.xz | tar xvf -</div><div class='ctx'> </div><div class='ctx'>    Replace "X" with the version number of the latest kernel.</div><div class='ctx'> </div><div class='hunk'>@@ -72,12 +72,12 @@ Installing the kernel source</div><div class='ctx'>    files.  They should match the library, and not get messed up by</div><div class='ctx'>    whatever the kernel-du-jour happens to be.</div><div class='ctx'> </div><div class='del'>- - You can also upgrade between 5.x releases by patching.  Patches are</div><div class='add'>+ - You can also upgrade between 6.x releases by patching.  Patches are</div><div class='ctx'>    distributed in the xz format.  To install by patching, get all the</div><div class='ctx'>    newer patch files, enter the top level directory of the kernel source</div><div class='del'>-   (linux-5.x) and execute::</div><div class='add'>+   (linux-6.x) and execute::</div><div class='ctx'> </div><div class='del'>-     xz -cd ../patch-5.x.xz | patch -p1</div><div class='add'>+     xz -cd ../patch-6.x.xz | patch -p1</div><div class='ctx'> </div><div class='ctx'>    Replace "x" for all versions bigger than the version "x" of your current</div><div class='ctx'>    source tree, **in_order**, and you should be ok.  You may want to remove</div><div class='hunk'>@@ -85,13 +85,13 @@ Installing the kernel source</div><div class='ctx'>    that there are no failed patches (some-file-name# or some-file-name.rej).</div><div class='ctx'>    If there are, either you or I have made a mistake.</div><div class='ctx'> </div><div class='del'>-   Unlike patches for the 5.x kernels, patches for the 5.x.y kernels</div><div class='add'>+   Unlike patches for the 6.x kernels, patches for the 6.x.y kernels</div><div class='ctx'>    (also known as the -stable kernels) are not incremental but instead apply</div><div class='del'>-   directly to the base 5.x kernel.  For example, if your base kernel is 5.0</div><div class='del'>-   and you want to apply the 5.0.3 patch, you must not first apply the 5.0.1</div><div class='del'>-   and 5.0.2 patches. Similarly, if you are running kernel version 5.0.2 and</div><div class='del'>-   want to jump to 5.0.3, you must first reverse the 5.0.2 patch (that is,</div><div class='del'>-   patch -R) **before** applying the 5.0.3 patch. You can read more on this in</div><div class='add'>+   directly to the base 6.x kernel.  For example, if your base kernel is 6.0</div><div class='add'>+   and you want to apply the 6.0.3 patch, you must not first apply the 6.0.1</div><div class='add'>+   and 6.0.2 patches. Similarly, if you are running kernel version 6.0.2 and</div><div class='add'>+   want to jump to 6.0.3, you must first reverse the 6.0.2 patch (that is,</div><div class='add'>+   patch -R) **before** applying the 6.0.3 patch. You can read more on this in</div><div class='ctx'>    :ref:`Documentation/process/applying-patches.rst &lt;applying_patches&gt;`.</div><div class='ctx'> </div><div class='ctx'>    Alternatively, the script patch-kernel can be used to automate this</div><div class='hunk'>@@ -114,7 +114,7 @@ Installing the kernel source</div><div class='ctx'> Software requirements</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='del'>-   Compiling and running the 5.x kernels requires up-to-date</div><div class='add'>+   Compiling and running the 6.x kernels requires up-to-date</div><div class='ctx'>    versions of various software packages.  Consult</div><div class='ctx'>    :ref:`Documentation/process/changes.rst &lt;changes&gt;` for the minimum version numbers</div><div class='ctx'>    required and how to get updates for these packages.  Beware that using</div><div class='hunk'>@@ -132,12 +132,12 @@ Build directory for the kernel</div><div class='ctx'>    place for the output files (including .config).</div><div class='ctx'>    Example::</div><div class='ctx'> </div><div class='del'>-     kernel source code: /usr/src/linux-5.x</div><div class='add'>+     kernel source code: /usr/src/linux-6.x</div><div class='ctx'>      build directory:    /home/name/build/kernel</div><div class='ctx'> </div><div class='ctx'>    To configure and build the kernel, use::</div><div class='ctx'> </div><div class='del'>-     cd /usr/src/linux-5.x</div><div class='add'>+     cd /usr/src/linux-6.x</div><div class='ctx'>      make O=/home/name/build/kernel menuconfig</div><div class='ctx'>      make O=/home/name/build/kernel</div><div class='ctx'>      sudo make O=/home/name/build/kernel modules_install install</div><div class='hunk'>@@ -262,8 +262,6 @@ Compiling the kernel</div><div class='ctx'>  - Make sure you have at least gcc 5.1 available.</div><div class='ctx'>    For more information, refer to :ref:`Documentation/process/changes.rst &lt;changes&gt;`.</div><div class='ctx'> </div><div class='del'>-   Please note that you can still run a.out user programs with this kernel.</div><div class='del'>-</div><div class='ctx'>  - Do a ``make`` to create a compressed kernel image. It is also</div><div class='ctx'>    possible to do ``make install`` if you have lilo installed to suit the</div><div class='ctx'>    kernel makefiles, but you may want to check your particular lilo setup first.</div><div class='hunk'>@@ -332,85 +330,10 @@ Compiling the kernel</div><div class='ctx'> If something goes wrong</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='del'>- - If you have problems that seem to be due to kernel bugs, please check</div><div class='del'>-   the file MAINTAINERS to see if there is a particular person associated</div><div class='del'>-   with the part of the kernel that you are having trouble with. If there</div><div class='del'>-   isn't anyone listed there, then the second best thing is to mail</div><div class='del'>-   them to me (torvalds@linux-foundation.org), and possibly to any other</div><div class='del'>-   relevant mailing-list or to the newsgroup.</div><div class='del'>-</div><div class='del'>- - In all bug-reports, *please* tell what kernel you are talking about,</div><div class='del'>-   how to duplicate the problem, and what your setup is (use your common</div><div class='del'>-   sense).  If the problem is new, tell me so, and if the problem is</div><div class='del'>-   old, please try to tell me when you first noticed it.</div><div class='del'>-</div><div class='del'>- - If the bug results in a message like::</div><div class='del'>-</div><div class='del'>-     unable to handle kernel paging request at address C0000010</div><div class='del'>-     Oops: 0002</div><div class='del'>-     EIP:   0010:XXXXXXXX</div><div class='del'>-     eax: xxxxxxxx   ebx: xxxxxxxx   ecx: xxxxxxxx   edx: xxxxxxxx</div><div class='del'>-     esi: xxxxxxxx   edi: xxxxxxxx   ebp: xxxxxxxx</div><div class='del'>-     ds: xxxx  es: xxxx  fs: xxxx  gs: xxxx</div><div class='del'>-     Pid: xx, process nr: xx</div><div class='del'>-     xx xx xx xx xx xx xx xx xx xx</div><div class='del'>-</div><div class='del'>-   or similar kernel debugging information on your screen or in your</div><div class='del'>-   system log, please duplicate it *exactly*.  The dump may look</div><div class='del'>-   incomprehensible to you, but it does contain information that may</div><div class='del'>-   help debugging the problem.  The text above the dump is also</div><div class='del'>-   important: it tells something about why the kernel dumped code (in</div><div class='del'>-   the above example, it's due to a bad kernel pointer). More information</div><div class='del'>-   on making sense of the dump is in Documentation/admin-guide/bug-hunting.rst</div><div class='del'>-</div><div class='del'>- - If you compiled the kernel with CONFIG_KALLSYMS you can send the dump</div><div class='del'>-   as is, otherwise you will have to use the ``ksymoops`` program to make</div><div class='del'>-   sense of the dump (but compiling with CONFIG_KALLSYMS is usually preferred).</div><div class='del'>-   This utility can be downloaded from</div><div class='del'>-   https://www.kernel.org/pub/linux/utils/kernel/ksymoops/ .</div><div class='del'>-   Alternatively, you can do the dump lookup by hand:</div><div class='del'>-</div><div class='del'>- - In debugging dumps like the above, it helps enormously if you can</div><div class='del'>-   look up what the EIP value means.  The hex value as such doesn't help</div><div class='del'>-   me or anybody else very much: it will depend on your particular</div><div class='del'>-   kernel setup.  What you should do is take the hex value from the EIP</div><div class='del'>-   line (ignore the ``0010:``), and look it up in the kernel namelist to</div><div class='del'>-   see which kernel function contains the offending address.</div><div class='del'>-</div><div class='del'>-   To find out the kernel function name, you'll need to find the system</div><div class='del'>-   binary associated with the kernel that exhibited the symptom.  This is</div><div class='del'>-   the file 'linux/vmlinux'.  To extract the namelist and match it against</div><div class='del'>-   the EIP from the kernel crash, do::</div><div class='del'>-</div><div class='del'>-     nm vmlinux | sort | less</div><div class='del'>-</div><div class='del'>-   This will give you a list of kernel addresses sorted in ascending</div><div class='del'>-   order, from which it is simple to find the function that contains the</div><div class='del'>-   offending address.  Note that the address given by the kernel</div><div class='del'>-   debugging messages will not necessarily match exactly with the</div><div class='del'>-   function addresses (in fact, that is very unlikely), so you can't</div><div class='del'>-   just 'grep' the list: the list will, however, give you the starting</div><div class='del'>-   point of each kernel function, so by looking for the function that</div><div class='del'>-   has a starting address lower than the one you are searching for but</div><div class='del'>-   is followed by a function with a higher address you will find the one</div><div class='del'>-   you want.  In fact, it may be a good idea to include a bit of</div><div class='del'>-   "context" in your problem report, giving a few lines around the</div><div class='del'>-   interesting one.</div><div class='del'>-</div><div class='del'>-   If you for some reason cannot do the above (you have a pre-compiled</div><div class='del'>-   kernel image or similar), telling me as much about your setup as</div><div class='del'>-   possible will help.  Please read</div><div class='del'>-   'Documentation/admin-guide/reporting-issues.rst' for details.</div><div class='del'>-</div><div class='del'>- - Alternatively, you can use gdb on a running kernel. (read-only; i.e. you</div><div class='del'>-   cannot change values or set break points.) To do this, first compile the</div><div class='del'>-   kernel with -g; edit arch/x86/Makefile appropriately, then do a ``make</div><div class='del'>-   clean``. You'll also need to enable CONFIG_PROC_FS (via ``make config``).</div><div class='del'>-</div><div class='del'>-   After you've rebooted with the new kernel, do ``gdb vmlinux /proc/kcore``.</div><div class='del'>-   You can now use all the usual gdb commands. The command to look up the</div><div class='del'>-   point where your system crashed is ``l *0xXXXXXXXX``. (Replace the XXXes</div><div class='del'>-   with the EIP value.)</div><div class='del'>-</div><div class='del'>-   gdb'ing a non-running kernel currently fails because ``gdb`` (wrongly)</div><div class='del'>-   disregards the starting offset for which the kernel is compiled.</div><div class='add'>+If you have problems that seem to be due to kernel bugs, please follow the</div><div class='add'>+instructions at 'Documentation/admin-guide/reporting-issues.rst'.</div><div class='add'>+</div><div class='add'>+Hints on understanding kernel bug reports are in</div><div class='add'>+'Documentation/admin-guide/bug-hunting.rst'. More on debugging the kernel</div><div class='add'>+with gdb is in 'Documentation/dev-tools/gdb-kernel-debugging.rst' and</div><div class='add'>+'Documentation/dev-tools/kgdb.rst'.</div><div class='head'>diff --git a/Documentation/admin-guide/acpi/dsdt-override.rst b/Documentation/admin-guide/acpi/dsdt-override.rst<br/>deleted file mode 100644<br/>index 50bd7f194bf4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/acpi/dsdt-override.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/acpi/dsdt-override.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-===============</div><div class='del'>-Overriding DSDT</div><div class='del'>-===============</div><div class='del'>-</div><div class='del'>-Linux supports a method of overriding the BIOS DSDT:</div><div class='del'>-</div><div class='del'>-CONFIG_ACPI_CUSTOM_DSDT - builds the image into the kernel.</div><div class='del'>-</div><div class='del'>-When to use this method is described in detail on the</div><div class='del'>-Linux/ACPI home page:</div><div class='del'>-https://01.org/linux-acpi/documentation/overriding-dsdt</div><div class='head'>diff --git a/Documentation/admin-guide/acpi/index.rst b/Documentation/admin-guide/acpi/index.rst<br/>index 71277689ad97..b078fdb8f4c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/acpi/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/acpi/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/acpi/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/acpi/index.rst</a></div><div class='hunk'>@@ -9,7 +9,6 @@ the Linux ACPI support.</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='ctx'>    initrd_table_override</div><div class='del'>-   dsdt-override</div><div class='ctx'>    ssdt-overlays</div><div class='ctx'>    cppc_sysfs</div><div class='ctx'>    fan_performance_states</div><div class='head'>diff --git a/Documentation/admin-guide/bcache.rst b/Documentation/admin-guide/bcache.rst<br/>index 8d3a2d045c0a..bb5032a99234 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/bcache.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/bcache.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/bcache.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/bcache.rst</a></div><div class='hunk'>@@ -204,7 +204,7 @@ For example::</div><div class='ctx'> This should present your unmodified backing device data in /dev/loop0</div><div class='ctx'> </div><div class='ctx'> If your cache is in writethrough mode, then you can safely discard the</div><div class='del'>-cache device without loosing data.</div><div class='add'>+cache device without losing data.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> E) Wiping a cache device</div><div class='head'>diff --git a/Documentation/admin-guide/blockdev/index.rst b/Documentation/admin-guide/blockdev/index.rst<br/>index b903cf152091..957ccf617797 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/blockdev/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/blockdev/index.rst</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-===========================</div><div class='del'>-The Linux RapidIO Subsystem</div><div class='del'>-===========================</div><div class='add'>+=============</div><div class='add'>+Block Devices</div><div class='add'>+=============</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='head'>diff --git a/Documentation/admin-guide/blockdev/nbd.rst b/Documentation/admin-guide/blockdev/nbd.rst<br/>index d78dfe559dcf..faf2ac4b1509 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/nbd.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/blockdev/nbd.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/nbd.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/blockdev/nbd.rst</a></div><div class='hunk'>@@ -14,7 +14,7 @@ to borrow disk space from another computer.</div><div class='ctx'> Unlike NFS, it is possible to put any filesystem on it, etc.</div><div class='ctx'> </div><div class='ctx'> For more information, or to download the nbd-client and nbd-server</div><div class='del'>-tools, go to http://nbd.sf.net/.</div><div class='add'>+tools, go to https://github.com/NetworkBlockDevice/nbd.</div><div class='ctx'> </div><div class='ctx'> The nbd kernel module need only be installed on the client</div><div class='ctx'> system, as the nbd-server is completely in userspace. In fact,</div><div class='head'>diff --git a/Documentation/admin-guide/blockdev/paride.rst b/Documentation/admin-guide/blockdev/paride.rst<br/>index e1ce90af602a..e85ad37cc0e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/paride.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/blockdev/paride.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/paride.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/blockdev/paride.rst</a></div><div class='hunk'>@@ -3,6 +3,7 @@ Linux and parallel port IDE devices</div><div class='ctx'> ===================================</div><div class='ctx'> </div><div class='ctx'> PARIDE v1.03   (c) 1997-8  Grant Guenther &lt;grant@torque.net&gt;</div><div class='add'>+PATA_PARPORT   (c) 2023 Ondrej Zary</div><div class='ctx'> </div><div class='ctx'> 1. Introduction</div><div class='ctx'> ===============</div><div class='hunk'>@@ -51,27 +52,15 @@ parallel port IDE subsystem, including:</div><div class='ctx'> </div><div class='ctx'> as well as most of the clone and no-name products on the market.</div><div class='ctx'> </div><div class='del'>-To support such a wide range of devices, PARIDE, the parallel port IDE</div><div class='del'>-subsystem, is actually structured in three parts.   There is a base</div><div class='del'>-paride module which provides a registry and some common methods for</div><div class='del'>-accessing the parallel ports.  The second component is a set of</div><div class='del'>-high-level drivers for each of the different types of supported devices:</div><div class='add'>+To support such a wide range of devices, pata_parport is actually structured</div><div class='add'>+in two parts. There is a base pata_parport module which provides an interface</div><div class='add'>+to kernel libata subsystem, registry and some common methods for accessing</div><div class='add'>+the parallel ports.</div><div class='ctx'> </div><div class='del'>-	===	=============</div><div class='del'>-	pd	IDE disk</div><div class='del'>-	pcd	ATAPI CD-ROM</div><div class='del'>-	pf	ATAPI disk</div><div class='del'>-	pt	ATAPI tape</div><div class='del'>-	pg	ATAPI generic</div><div class='del'>-	===	=============</div><div class='del'>-</div><div class='del'>-(Currently, the pg driver is only used with CD-R drives).</div><div class='del'>-</div><div class='del'>-The high-level drivers function according to the relevant standards.</div><div class='del'>-The third component of PARIDE is a set of low-level protocol drivers</div><div class='del'>-for each of the parallel port IDE adapter chips.  Thanks to the interest</div><div class='del'>-and encouragement of Linux users from many parts of the world,</div><div class='del'>-support is available for almost all known adapter protocols:</div><div class='add'>+The second component is a set of low-level protocol drivers for each of the</div><div class='add'>+parallel port IDE adapter chips.  Thanks to the interest and encouragement of</div><div class='add'>+Linux users from many parts of the world, support is available for almost all</div><div class='add'>+known adapter protocols:</div><div class='ctx'> </div><div class='ctx'> 	====    ====================================== ====</div><div class='ctx'>         aten    ATEN EH-100                            (HK)</div><div class='hunk'>@@ -91,251 +80,87 @@ support is available for almost all known adapter protocols:</div><div class='ctx'> 	====    ====================================== ====</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-2. Using the PARIDE subsystem</div><div class='del'>-=============================</div><div class='add'>+2. Using pata_parport subsystem</div><div class='add'>+===============================</div><div class='ctx'> </div><div class='ctx'> While configuring the Linux kernel, you may choose either to build</div><div class='del'>-the PARIDE drivers into your kernel, or to build them as modules.</div><div class='add'>+the pata_parport drivers into your kernel, or to build them as modules.</div><div class='ctx'> </div><div class='ctx'> In either case, you will need to select "Parallel port IDE device support"</div><div class='del'>-as well as at least one of the high-level drivers and at least one</div><div class='del'>-of the parallel port communication protocols.  If you do not know</div><div class='del'>-what kind of parallel port adapter is used in your drive, you could</div><div class='del'>-begin by checking the file names and any text files on your DOS</div><div class='add'>+and at least one of the parallel port communication protocols.</div><div class='add'>+If you do not know what kind of parallel port adapter is used in your drive,</div><div class='add'>+you could begin by checking the file names and any text files on your DOS</div><div class='ctx'> installation floppy.  Alternatively, you can look at the markings on</div><div class='ctx'> the adapter chip itself.  That's usually sufficient to identify the</div><div class='ctx'> correct device.</div><div class='ctx'> </div><div class='del'>-You can actually select all the protocol modules, and allow the PARIDE</div><div class='add'>+You can actually select all the protocol modules, and allow the pata_parport</div><div class='ctx'> subsystem to try them all for you.</div><div class='ctx'> </div><div class='ctx'> For the "brand-name" products listed above, here are the protocol</div><div class='ctx'> and high-level drivers that you would use:</div><div class='ctx'> </div><div class='del'>-	================	============	======	========</div><div class='del'>-	Manufacturer		Model		Driver	Protocol</div><div class='del'>-	================	============	======	========</div><div class='del'>-	MicroSolutions		CD-ROM		pcd	bpck</div><div class='del'>-	MicroSolutions		PD drive	pf	bpck</div><div class='del'>-	MicroSolutions		hard-drive	pd	bpck</div><div class='del'>-	MicroSolutions          8000t tape      pt      bpck</div><div class='del'>-	SyQuest			EZ, SparQ	pd	epat</div><div class='del'>-	Imation			Superdisk	pf	epat</div><div class='del'>-	Maxell                  Superdisk       pf      friq</div><div class='del'>-	Avatar			Shark		pd	epat</div><div class='del'>-	FreeCom			CD-ROM		pcd	frpw</div><div class='del'>-	Hewlett-Packard		5GB Tape	pt	epat</div><div class='del'>-	Hewlett-Packard		7200e (CD)	pcd	epat</div><div class='del'>-	Hewlett-Packard		7200e (CD-R)	pg	epat</div><div class='del'>-	================	============	======	========</div><div class='del'>-</div><div class='del'>-2.1  Configuring built-in drivers</div><div class='del'>----------------------------------</div><div class='del'>-</div><div class='del'>-We recommend that you get to know how the drivers work and how to</div><div class='del'>-configure them as loadable modules, before attempting to compile a</div><div class='del'>-kernel with the drivers built-in.</div><div class='del'>-</div><div class='del'>-If you built all of your PARIDE support directly into your kernel,</div><div class='del'>-and you have just a single parallel port IDE device, your kernel should</div><div class='del'>-locate it automatically for you.  If you have more than one device,</div><div class='del'>-you may need to give some command line options to your bootloader</div><div class='del'>-(eg: LILO), how to do that is beyond the scope of this document.</div><div class='del'>-</div><div class='del'>-The high-level drivers accept a number of command line parameters, all</div><div class='del'>-of which are documented in the source files in linux/drivers/block/paride.</div><div class='del'>-By default, each driver will automatically try all parallel ports it</div><div class='del'>-can find, and all protocol types that have been installed, until it finds</div><div class='del'>-a parallel port IDE adapter.  Once it finds one, the probe stops.  So,</div><div class='del'>-if you have more than one device, you will need to tell the drivers</div><div class='del'>-how to identify them.  This requires specifying the port address, the</div><div class='del'>-protocol identification number and, for some devices, the drive's</div><div class='del'>-chain ID.  While your system is booting, a number of messages are</div><div class='del'>-displayed on the console.  Like all such messages, they can be</div><div class='del'>-reviewed with the 'dmesg' command.  Among those messages will be</div><div class='del'>-some lines like::</div><div class='del'>-</div><div class='del'>-	paride: bpck registered as protocol 0</div><div class='del'>-	paride: epat registered as protocol 1</div><div class='del'>-</div><div class='del'>-The numbers will always be the same until you build a new kernel with</div><div class='del'>-different protocol selections.  You should note these numbers as you</div><div class='del'>-will need them to identify the devices.</div><div class='add'>+	================	============	========</div><div class='add'>+	Manufacturer		Model		Protocol</div><div class='add'>+	================	============	========</div><div class='add'>+	MicroSolutions		CD-ROM		bpck</div><div class='add'>+	MicroSolutions		PD drive	bpck</div><div class='add'>+	MicroSolutions		hard-drive	bpck</div><div class='add'>+	MicroSolutions          8000t tape      bpck</div><div class='add'>+	SyQuest			EZ, SparQ	epat</div><div class='add'>+	Imation			Superdisk	epat</div><div class='add'>+	Maxell                  Superdisk       friq</div><div class='add'>+	Avatar			Shark		epat</div><div class='add'>+	FreeCom			CD-ROM		frpw</div><div class='add'>+	Hewlett-Packard		5GB Tape	epat</div><div class='add'>+	Hewlett-Packard		7200e (CD)	epat</div><div class='add'>+	Hewlett-Packard		7200e (CD-R)	epat</div><div class='add'>+	================	============	========</div><div class='add'>+</div><div class='add'>+All parports and all protocol drivers are probed automatically unless probe=0</div><div class='add'>+parameter is used. So just "modprobe epat" is enough for a Imation SuperDisk</div><div class='add'>+drive to work.</div><div class='add'>+</div><div class='add'>+Manual device creation::</div><div class='add'>+</div><div class='add'>+	# echo "port protocol mode unit delay" &gt;/sys/bus/pata_parport/new_device</div><div class='add'>+</div><div class='add'>+where:</div><div class='add'>+</div><div class='add'>+	======== ================================================</div><div class='add'>+	port	 parport name (or "auto" for all parports)</div><div class='add'>+	protocol protocol name (or "auto" for all protocols)</div><div class='add'>+	mode	 mode number (protocol-specific) or -1 for probe</div><div class='add'>+	unit	 unit number (for backpack only, see below)</div><div class='add'>+	delay	 I/O delay (see troubleshooting section below)</div><div class='add'>+	======== ================================================</div><div class='ctx'> </div><div class='ctx'> If you happen to be using a MicroSolutions backpack device, you will</div><div class='ctx'> also need to know the unit ID number for each drive.  This is usually</div><div class='ctx'> the last two digits of the drive's serial number (but read MicroSolutions'</div><div class='ctx'> documentation about this).</div><div class='ctx'> </div><div class='del'>-As an example, let's assume that you have a MicroSolutions PD/CD drive</div><div class='del'>-with unit ID number 36 connected to the parallel port at 0x378, a SyQuest</div><div class='del'>-EZ-135 connected to the chained port on the PD/CD drive and also an</div><div class='del'>-Imation Superdisk connected to port 0x278.  You could give the following</div><div class='del'>-options on your boot command::</div><div class='del'>-</div><div class='del'>-	pd.drive0=0x378,1 pf.drive0=0x278,1 pf.drive1=0x378,0,36</div><div class='del'>-</div><div class='del'>-In the last option, pf.drive1 configures device /dev/pf1, the 0x378</div><div class='del'>-is the parallel port base address, the 0 is the protocol registration</div><div class='del'>-number and 36 is the chain ID.</div><div class='del'>-</div><div class='del'>-Please note:  while PARIDE will work both with and without the</div><div class='del'>-PARPORT parallel port sharing system that is included by the</div><div class='del'>-"Parallel port support" option, PARPORT must be included and enabled</div><div class='del'>-if you want to use chains of devices on the same parallel port.</div><div class='del'>-</div><div class='del'>-2.2  Loading and configuring PARIDE as modules</div><div class='del'>-----------------------------------------------</div><div class='del'>-</div><div class='del'>-It is much faster and simpler to get to understand the PARIDE drivers</div><div class='del'>-if you use them as loadable kernel modules.</div><div class='del'>-</div><div class='del'>-Note 1:</div><div class='del'>-	using these drivers with the "kerneld" automatic module loading</div><div class='del'>-	system is not recommended for beginners, and is not documented here.</div><div class='del'>-</div><div class='del'>-Note 2:</div><div class='del'>-	if you build PARPORT support as a loadable module, PARIDE must</div><div class='del'>-	also be built as loadable modules, and PARPORT must be loaded before</div><div class='del'>-	the PARIDE modules.</div><div class='del'>-</div><div class='del'>-To use PARIDE, you must begin by::</div><div class='del'>-</div><div class='del'>-	insmod paride</div><div class='del'>-</div><div class='del'>-this loads a base module which provides a registry for the protocols,</div><div class='del'>-among other tasks.</div><div class='del'>-</div><div class='del'>-Then, load as many of the protocol modules as you think you might need.</div><div class='del'>-As you load each module, it will register the protocols that it supports,</div><div class='del'>-and print a log message to your kernel log file and your console. For</div><div class='del'>-example::</div><div class='del'>-</div><div class='del'>-	# insmod epat</div><div class='del'>-	paride: epat registered as protocol 0</div><div class='del'>-	# insmod kbic</div><div class='del'>-	paride: k951 registered as protocol 1</div><div class='del'>-        paride: k971 registered as protocol 2</div><div class='del'>-</div><div class='del'>-Finally, you can load high-level drivers for each kind of device that</div><div class='del'>-you have connected.  By default, each driver will autoprobe for a single</div><div class='del'>-device, but you can support up to four similar devices by giving their</div><div class='del'>-individual coordinates when you load the driver.</div><div class='del'>-</div><div class='del'>-For example, if you had two no-name CD-ROM drives both using the</div><div class='del'>-KingByte KBIC-951A adapter, one on port 0x378 and the other on 0x3bc</div><div class='del'>-you could give the following command::</div><div class='del'>-</div><div class='del'>-	# insmod pcd drive0=0x378,1 drive1=0x3bc,1</div><div class='del'>-</div><div class='del'>-For most adapters, giving a port address and protocol number is sufficient,</div><div class='del'>-but check the source files in linux/drivers/block/paride for more</div><div class='del'>-information.  (Hopefully someone will write some man pages one day !).</div><div class='del'>-</div><div class='del'>-As another example, here's what happens when PARPORT is installed, and</div><div class='del'>-a SyQuest EZ-135 is attached to port 0x378::</div><div class='del'>-</div><div class='del'>-	# insmod paride</div><div class='del'>-	paride: version 1.0 installed</div><div class='del'>-	# insmod epat</div><div class='del'>-	paride: epat registered as protocol 0</div><div class='del'>-	# insmod pd</div><div class='del'>-	pd: pd version 1.0, major 45, cluster 64, nice 0</div><div class='del'>-	pda: Sharing parport1 at 0x378</div><div class='del'>-	pda: epat 1.0, Shuttle EPAT chip c3 at 0x378, mode 5 (EPP-32), delay 1</div><div class='del'>-	pda: SyQuest EZ135A, 262144 blocks [128M], (512/16/32), removable media</div><div class='del'>-	 pda: pda1</div><div class='del'>-</div><div class='del'>-Note that the last line is the output from the generic partition table</div><div class='del'>-scanner - in this case it reports that it has found a disk with one partition.</div><div class='del'>-</div><div class='del'>-2.3  Using a PARIDE device</div><div class='del'>---------------------------</div><div class='del'>-</div><div class='del'>-Once the drivers have been loaded, you can access PARIDE devices in the</div><div class='del'>-same way as their traditional counterparts.  You will probably need to</div><div class='del'>-create the device "special files".  Here is a simple script that you can</div><div class='del'>-cut to a file and execute::</div><div class='del'>-</div><div class='del'>-  #!/bin/bash</div><div class='del'>-  #</div><div class='del'>-  # mkd -- a script to create the device special files for the PARIDE subsystem</div><div class='del'>-  #</div><div class='del'>-  function mkdev {</div><div class='del'>-    mknod $1 $2 $3 $4 ; chmod 0660 $1 ; chown root:disk $1</div><div class='del'>-  }</div><div class='del'>-  #</div><div class='del'>-  function pd {</div><div class='del'>-    D=$( printf \\$( printf "x%03x" $[ $1 + 97 ] ) )</div><div class='del'>-    mkdev pd$D b 45 $[ $1 * 16 ]</div><div class='del'>-    for P in 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15</div><div class='del'>-    do mkdev pd$D$P b 45 $[ $1 * 16 + $P ]</div><div class='del'>-    done</div><div class='del'>-  }</div><div class='del'>-  #</div><div class='del'>-  cd /dev</div><div class='del'>-  #</div><div class='del'>-  for u in 0 1 2 3 ; do pd $u ; done</div><div class='del'>-  for u in 0 1 2 3 ; do mkdev pcd$u b 46 $u ; done</div><div class='del'>-  for u in 0 1 2 3 ; do mkdev pf$u  b 47 $u ; done</div><div class='del'>-  for u in 0 1 2 3 ; do mkdev pt$u  c 96 $u ; done</div><div class='del'>-  for u in 0 1 2 3 ; do mkdev npt$u c 96 $[ $u + 128 ] ; done</div><div class='del'>-  for u in 0 1 2 3 ; do mkdev pg$u  c 97 $u ; done</div><div class='del'>-  #</div><div class='del'>-  # end of mkd</div><div class='del'>-</div><div class='del'>-With the device files and drivers in place, you can access PARIDE devices</div><div class='del'>-like any other Linux device.   For example, to mount a CD-ROM in pcd0, use::</div><div class='del'>-</div><div class='del'>-	mount /dev/pcd0 /cdrom</div><div class='del'>-</div><div class='del'>-If you have a fresh Avatar Shark cartridge, and the drive is pda, you</div><div class='del'>-might do something like::</div><div class='del'>-</div><div class='del'>-	fdisk /dev/pda		-- make a new partition table with</div><div class='del'>-				   partition 1 of type 83</div><div class='del'>-</div><div class='del'>-	mke2fs /dev/pda1	-- to build the file system</div><div class='del'>-</div><div class='del'>-	mkdir /shark		-- make a place to mount the disk</div><div class='del'>-</div><div class='del'>-	mount /dev/pda1 /shark</div><div class='del'>-</div><div class='del'>-Devices like the Imation superdisk work in the same way, except that</div><div class='del'>-they do not have a partition table.  For example to make a 120MB</div><div class='del'>-floppy that you could share with a DOS system::</div><div class='del'>-</div><div class='del'>-	mkdosfs /dev/pf0</div><div class='del'>-	mount /dev/pf0 /mnt</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-2.4  The pf driver</div><div class='del'>-------------------</div><div class='del'>-</div><div class='del'>-The pf driver is intended for use with parallel port ATAPI disk</div><div class='del'>-devices.  The most common devices in this category are PD drives</div><div class='del'>-and LS-120 drives.  Traditionally, media for these devices are not</div><div class='del'>-partitioned.  Consequently, the pf driver does not support partitioned</div><div class='del'>-media.  This may be changed in a future version of the driver.</div><div class='del'>-</div><div class='del'>-2.5  Using the pt driver</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>-The pt driver for parallel port ATAPI tape drives is a minimal driver.</div><div class='del'>-It does not yet support many of the standard tape ioctl operations.</div><div class='del'>-For best performance, a block size of 32KB should be used.  You will</div><div class='del'>-probably want to set the parallel port delay to 0, if you can.</div><div class='del'>-</div><div class='del'>-2.6  Using the pg driver</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>-The pg driver can be used in conjunction with the cdrecord program</div><div class='del'>-to create CD-ROMs.  Please get cdrecord version 1.6.1 or later</div><div class='del'>-from ftp://ftp.fokus.gmd.de/pub/unix/cdrecord/ .  To record CD-R media</div><div class='del'>-your parallel port should ideally be set to EPP mode, and the "port delay"</div><div class='del'>-should be set to 0.  With those settings it is possible to record at 2x</div><div class='del'>-speed without any buffer underruns.  If you cannot get the driver to work</div><div class='del'>-in EPP mode, try to use "bidirectional" or "PS/2" mode and 1x speeds only.</div><div class='add'>+If you omit the parameters from the end, defaults will be used, e.g.:</div><div class='add'>+</div><div class='add'>+Probe all parports with all protocols::</div><div class='add'>+</div><div class='add'>+	# echo auto &gt;/sys/bus/pata_parport/new_device</div><div class='add'>+</div><div class='add'>+Probe parport0 using protocol epat and mode 4 (EPP-16)::</div><div class='add'>+</div><div class='add'>+	# echo "parport0 epat 4" &gt;/sys/bus/pata_parport/new_device</div><div class='add'>+</div><div class='add'>+Probe parport0 using all protocols::</div><div class='add'>+</div><div class='add'>+	# echo "parport0 auto" &gt;/sys/bus/pata_parport/new_device</div><div class='add'>+</div><div class='add'>+Probe all parports using protoocol epat::</div><div class='add'>+</div><div class='add'>+	# echo "auto epat" &gt;/sys/bus/pata_parport/new_device</div><div class='add'>+</div><div class='add'>+Deleting devices::</div><div class='add'>+</div><div class='add'>+	# echo pata_parport.0 &gt;/sys/bus/pata_parport/delete_device</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 3. Troubleshooting</div><div class='hunk'>@@ -344,9 +169,9 @@ in EPP mode, try to use "bidirectional" or "PS/2" mode and 1x speeds only.</div><div class='ctx'> 3.1  Use EPP mode if you can</div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='del'>-The most common problems that people report with the PARIDE drivers</div><div class='add'>+The most common problems that people report with the pata_parport drivers</div><div class='ctx'> concern the parallel port CMOS settings.  At this time, none of the</div><div class='del'>-PARIDE protocol modules support ECP mode, or any ECP combination modes.</div><div class='add'>+protocol modules support ECP mode, or any ECP combination modes.</div><div class='ctx'> If you are able to do so, please set your parallel port into EPP mode</div><div class='ctx'> using your CMOS setup procedure.</div><div class='ctx'> </div><div class='hunk'>@@ -354,17 +179,14 @@ using your CMOS setup procedure.</div><div class='ctx'> -------------------------</div><div class='ctx'> </div><div class='ctx'> Some parallel ports cannot reliably transfer data at full speed.  To</div><div class='del'>-offset the errors, the PARIDE protocol modules introduce a "port</div><div class='add'>+offset the errors, the protocol modules introduce a "port</div><div class='ctx'> delay" between each access to the i/o ports.  Each protocol sets</div><div class='ctx'> a default value for this delay.  In most cases, the user can override</div><div class='ctx'> the default and set it to 0 - resulting in somewhat higher transfer</div><div class='ctx'> rates.  In some rare cases (especially with older 486 systems) the</div><div class='ctx'> default delays are not long enough.  if you experience corrupt data</div><div class='ctx'> transfers, or unexpected failures, you may wish to increase the</div><div class='del'>-port delay.   The delay can be programmed using the "driveN" parameters</div><div class='del'>-to each of the high-level drivers.  Please see the notes above, or</div><div class='del'>-read the comments at the beginning of the driver source files in</div><div class='del'>-linux/drivers/block/paride.</div><div class='add'>+port delay.</div><div class='ctx'> </div><div class='ctx'> 3.3  Some drives need a printer reset</div><div class='ctx'> -------------------------------------</div><div class='hunk'>@@ -374,66 +196,12 @@ that do not always power up correctly.  We have noticed this with some</div><div class='ctx'> drives based on OnSpec and older Freecom adapters.  In these rare cases,</div><div class='ctx'> the adapter can often be reinitialised by issuing a "printer reset" on</div><div class='ctx'> the parallel port.  As the reset operation is potentially disruptive in</div><div class='del'>-multiple device environments, the PARIDE drivers will not do it</div><div class='add'>+multiple device environments, the pata_parport drivers will not do it</div><div class='ctx'> automatically.  You can however, force a printer reset by doing::</div><div class='ctx'> </div><div class='ctx'> 	insmod lp reset=1</div><div class='ctx'> 	rmmod lp</div><div class='ctx'> </div><div class='ctx'> If you have one of these marginal cases, you should probably build</div><div class='del'>-your paride drivers as modules, and arrange to do the printer reset</div><div class='del'>-before loading the PARIDE drivers.</div><div class='del'>-</div><div class='del'>-3.4  Use the verbose option and dmesg if you need help</div><div class='del'>-------------------------------------------------------</div><div class='del'>-</div><div class='del'>-While a lot of testing has gone into these drivers to make them work</div><div class='del'>-as smoothly as possible, problems will arise.  If you do have problems,</div><div class='del'>-please check all the obvious things first:  does the drive work in</div><div class='del'>-DOS with the manufacturer's drivers ?  If that doesn't yield any useful</div><div class='del'>-clues, then please make sure that only one drive is hooked to your system,</div><div class='del'>-and that either (a) PARPORT is enabled or (b) no other device driver</div><div class='del'>-is using your parallel port (check in /proc/ioports).  Then, load the</div><div class='del'>-appropriate drivers (you can load several protocol modules if you want)</div><div class='del'>-as in::</div><div class='del'>-</div><div class='del'>-	# insmod paride</div><div class='del'>-	# insmod epat</div><div class='del'>-	# insmod bpck</div><div class='del'>-	# insmod kbic</div><div class='del'>-	...</div><div class='del'>-	# insmod pd verbose=1</div><div class='del'>-</div><div class='del'>-(using the correct driver for the type of device you have, of course).</div><div class='del'>-The verbose=1 parameter will cause the drivers to log a trace of their</div><div class='del'>-activity as they attempt to locate your drive.</div><div class='del'>-</div><div class='del'>-Use 'dmesg' to capture a log of all the PARIDE messages (any messages</div><div class='del'>-beginning with paride:, a protocol module's name or a driver's name) and</div><div class='del'>-include that with your bug report.  You can submit a bug report in one</div><div class='del'>-of two ways.  Either send it directly to the author of the PARIDE suite,</div><div class='del'>-by e-mail to grant@torque.net, or join the linux-parport mailing list</div><div class='del'>-and post your report there.</div><div class='del'>-</div><div class='del'>-3.5  For more information or help</div><div class='del'>----------------------------------</div><div class='del'>-</div><div class='del'>-You can join the linux-parport mailing list by sending a mail message</div><div class='del'>-to:</div><div class='del'>-</div><div class='del'>-		linux-parport-request@torque.net</div><div class='del'>-</div><div class='del'>-with the single word::</div><div class='del'>-</div><div class='del'>-		subscribe</div><div class='del'>-</div><div class='del'>-in the body of the mail message (not in the subject line).   Please be</div><div class='del'>-sure that your mail program is correctly set up when you do this,  as</div><div class='del'>-the list manager is a robot that will subscribe you using the reply</div><div class='del'>-address in your mail headers.  REMOVE any anti-spam gimmicks you may</div><div class='del'>-have in your mail headers, when sending mail to the list server.</div><div class='del'>-</div><div class='del'>-You might also find some useful information on the linux-parport</div><div class='del'>-web pages (although they are not always up to date) at</div><div class='del'>-</div><div class='del'>-	http://web.archive.org/web/%2E/http://www.torque.net/parport/</div><div class='add'>+your pata_parport drivers as modules, and arrange to do the printer reset</div><div class='add'>+before loading the pata_parport drivers.</div><div class='head'>diff --git a/Documentation/admin-guide/blockdev/zram.rst b/Documentation/admin-guide/blockdev/zram.rst<br/>index 54fe63745ed8..e4551579cb12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/zram.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/blockdev/zram.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/blockdev/zram.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/blockdev/zram.rst</a></div><div class='hunk'>@@ -343,8 +343,18 @@ Admin can request writeback of those idle pages at right timing via::</div><div class='ctx'> </div><div class='ctx'> With the command, zram will writeback idle pages from memory to the storage.</div><div class='ctx'> </div><div class='add'>+Additionally, if a user choose to writeback only huge and idle pages</div><div class='add'>+this can be accomplished with::</div><div class='add'>+</div><div class='add'>+        echo huge_idle &gt; /sys/block/zramX/writeback</div><div class='add'>+</div><div class='add'>+If a user chooses to writeback only incompressible pages (pages that none of</div><div class='add'>+algorithms can compress) this can be accomplished with::</div><div class='add'>+</div><div class='add'>+	echo incompressible &gt; /sys/block/zramX/writeback</div><div class='add'>+</div><div class='ctx'> If an admin wants to write a specific page in zram device to the backing device,</div><div class='del'>-they could write a page index into the interface.</div><div class='add'>+they could write a page index into the interface::</div><div class='ctx'> </div><div class='ctx'> 	echo "page_index=1251" &gt; /sys/block/zramX/writeback</div><div class='ctx'> </div><div class='hunk'>@@ -396,6 +406,87 @@ budget in next setting is user's job.</div><div class='ctx'> If admin wants to measure writeback count in a certain period, they could</div><div class='ctx'> know it via /sys/block/zram0/bd_stat's 3rd column.</div><div class='ctx'> </div><div class='add'>+recompression</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+With CONFIG_ZRAM_MULTI_COMP, zram can recompress pages using alternative</div><div class='add'>+(secondary) compression algorithms. The basic idea is that alternative</div><div class='add'>+compression algorithm can provide better compression ratio at a price of</div><div class='add'>+(potentially) slower compression/decompression speeds. Alternative compression</div><div class='add'>+algorithm can, for example, be more successful compressing huge pages (those</div><div class='add'>+that default algorithm failed to compress). Another application is idle pages</div><div class='add'>+recompression - pages that are cold and sit in the memory can be recompressed</div><div class='add'>+using more effective algorithm and, hence, reduce zsmalloc memory usage.</div><div class='add'>+</div><div class='add'>+With CONFIG_ZRAM_MULTI_COMP, zram supports up to 4 compression algorithms:</div><div class='add'>+one primary and up to 3 secondary ones. Primary zram compressor is explained</div><div class='add'>+in "3) Select compression algorithm", secondary algorithms are configured</div><div class='add'>+using recomp_algorithm device attribute.</div><div class='add'>+</div><div class='add'>+Example:::</div><div class='add'>+</div><div class='add'>+	#show supported recompression algorithms</div><div class='add'>+	cat /sys/block/zramX/recomp_algorithm</div><div class='add'>+	#1: lzo lzo-rle lz4 lz4hc [zstd]</div><div class='add'>+	#2: lzo lzo-rle lz4 [lz4hc] zstd</div><div class='add'>+</div><div class='add'>+Alternative compression algorithms are sorted by priority. In the example</div><div class='add'>+above, zstd is used as the first alternative algorithm, which has priority</div><div class='add'>+of 1, while lz4hc is configured as a compression algorithm with priority 2.</div><div class='add'>+Alternative compression algorithm's priority is provided during algorithms</div><div class='add'>+configuration:::</div><div class='add'>+</div><div class='add'>+	#select zstd recompression algorithm, priority 1</div><div class='add'>+	echo "algo=zstd priority=1" &gt; /sys/block/zramX/recomp_algorithm</div><div class='add'>+</div><div class='add'>+	#select deflate recompression algorithm, priority 2</div><div class='add'>+	echo "algo=deflate priority=2" &gt; /sys/block/zramX/recomp_algorithm</div><div class='add'>+</div><div class='add'>+Another device attribute that CONFIG_ZRAM_MULTI_COMP enables is recompress,</div><div class='add'>+which controls recompression.</div><div class='add'>+</div><div class='add'>+Examples:::</div><div class='add'>+</div><div class='add'>+	#IDLE pages recompression is activated by `idle` mode</div><div class='add'>+	echo "type=idle" &gt; /sys/block/zramX/recompress</div><div class='add'>+</div><div class='add'>+	#HUGE pages recompression is activated by `huge` mode</div><div class='add'>+	echo "type=huge" &gt; /sys/block/zram0/recompress</div><div class='add'>+</div><div class='add'>+	#HUGE_IDLE pages recompression is activated by `huge_idle` mode</div><div class='add'>+	echo "type=huge_idle" &gt; /sys/block/zramX/recompress</div><div class='add'>+</div><div class='add'>+The number of idle pages can be significant, so user-space can pass a size</div><div class='add'>+threshold (in bytes) to the recompress knob: zram will recompress only pages</div><div class='add'>+of equal or greater size:::</div><div class='add'>+</div><div class='add'>+	#recompress all pages larger than 3000 bytes</div><div class='add'>+	echo "threshold=3000" &gt; /sys/block/zramX/recompress</div><div class='add'>+</div><div class='add'>+	#recompress idle pages larger than 2000 bytes</div><div class='add'>+	echo "type=idle threshold=2000" &gt; /sys/block/zramX/recompress</div><div class='add'>+</div><div class='add'>+Recompression of idle pages requires memory tracking.</div><div class='add'>+</div><div class='add'>+During re-compression for every page, that matches re-compression criteria,</div><div class='add'>+ZRAM iterates the list of registered alternative compression algorithms in</div><div class='add'>+order of their priorities. ZRAM stops either when re-compression was</div><div class='add'>+successful (re-compressed object is smaller in size than the original one)</div><div class='add'>+and matches re-compression criteria (e.g. size threshold) or when there are</div><div class='add'>+no secondary algorithms left to try. If none of the secondary algorithms can</div><div class='add'>+successfully re-compressed the page such a page is marked as incompressible,</div><div class='add'>+so ZRAM will not attempt to re-compress it in the future.</div><div class='add'>+</div><div class='add'>+This re-compression behaviour, when it iterates through the list of</div><div class='add'>+registered compression algorithms, increases our chances of finding the</div><div class='add'>+algorithm that successfully compresses a particular page. Sometimes, however,</div><div class='add'>+it is convenient (and sometimes even necessary) to limit recompression to</div><div class='add'>+only one particular algorithm so that it will not try any other algorithms.</div><div class='add'>+This can be achieved by providing a algo=NAME parameter:::</div><div class='add'>+</div><div class='add'>+	#use zstd algorithm only (if registered)</div><div class='add'>+	echo "type=huge algo=zstd" &gt; /sys/block/zramX/recompress</div><div class='add'>+</div><div class='ctx'> memory tracking</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='hunk'>@@ -406,9 +497,11 @@ pages of the process with*pagemap.</div><div class='ctx'> If you enable the feature, you could see block state via</div><div class='ctx'> /sys/kernel/debug/zram/zram0/block_state". The output is as follows::</div><div class='ctx'> </div><div class='del'>-	  300    75.033841 .wh.</div><div class='del'>-	  301    63.806904 s...</div><div class='del'>-	  302    63.806919 ..hi</div><div class='add'>+	  300    75.033841 .wh...</div><div class='add'>+	  301    63.806904 s.....</div><div class='add'>+	  302    63.806919 ..hi..</div><div class='add'>+	  303    62.801919 ....r.</div><div class='add'>+	  304   146.781902 ..hi.n</div><div class='ctx'> </div><div class='ctx'> First column</div><div class='ctx'> 	zram's block index.</div><div class='hunk'>@@ -425,6 +518,10 @@ Third column</div><div class='ctx'> 		huge page</div><div class='ctx'> 	i:</div><div class='ctx'> 		idle page</div><div class='add'>+	r:</div><div class='add'>+		recompressed page (secondary compression algorithm)</div><div class='add'>+	n:</div><div class='add'>+		none (including secondary) of algorithms could compress it</div><div class='ctx'> </div><div class='ctx'> First line of above example says 300th block is accessed at 75.033841sec</div><div class='ctx'> and the block's state is huge so it is written back to the backing</div><div class='head'>diff --git a/Documentation/admin-guide/bootconfig.rst b/Documentation/admin-guide/bootconfig.rst<br/>index a1860fc0ca88..91339efdcb54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/bootconfig.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/bootconfig.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/bootconfig.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/bootconfig.rst</a></div><div class='hunk'>@@ -158,9 +158,15 @@ Each key-value pair is shown in each line with following style::</div><div class='ctx'> Boot Kernel With a Boot Config</div><div class='ctx'> ==============================</div><div class='ctx'> </div><div class='del'>-Since the boot configuration file is loaded with initrd, it will be added</div><div class='del'>-to the end of the initrd (initramfs) image file with padding, size,</div><div class='del'>-checksum and 12-byte magic word as below.</div><div class='add'>+There are two options to boot the kernel with bootconfig: attaching the</div><div class='add'>+bootconfig to the initrd image or embedding it in the kernel itself.</div><div class='add'>+</div><div class='add'>+Attaching a Boot Config to Initrd</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+Since the boot configuration file is loaded with initrd by default,</div><div class='add'>+it will be added to the end of the initrd (initramfs) image file with</div><div class='add'>+padding, size, checksum and 12-byte magic word as below.</div><div class='ctx'> </div><div class='ctx'> [initrd][bootconfig][padding][size(le32)][checksum(le32)][#BOOTCONFIG\n]</div><div class='ctx'> </div><div class='hunk'>@@ -195,7 +201,30 @@ To remove the config from the image, you can use -d option as below::</div><div class='ctx'> </div><div class='ctx'> Then add "bootconfig" on the normal kernel command line to tell the</div><div class='ctx'> kernel to look for the bootconfig at the end of the initrd file.</div><div class='add'>+Alternatively, build your kernel with the ``CONFIG_BOOT_CONFIG_FORCE``</div><div class='add'>+Kconfig option selected.</div><div class='add'>+</div><div class='add'>+Embedding a Boot Config into Kernel</div><div class='add'>+-----------------------------------</div><div class='add'>+</div><div class='add'>+If you can not use initrd, you can also embed the bootconfig file in the</div><div class='add'>+kernel by Kconfig options. In this case, you need to recompile the kernel</div><div class='add'>+with the following configs::</div><div class='add'>+</div><div class='add'>+ CONFIG_BOOT_CONFIG_EMBED=y</div><div class='add'>+ CONFIG_BOOT_CONFIG_EMBED_FILE="/PATH/TO/BOOTCONFIG/FILE"</div><div class='add'>+</div><div class='add'>+``CONFIG_BOOT_CONFIG_EMBED_FILE`` requires an absolute path or a relative</div><div class='add'>+path to the bootconfig file from source tree or object tree.</div><div class='add'>+The kernel will embed it as the default bootconfig.</div><div class='add'>+</div><div class='add'>+Just as when attaching the bootconfig to the initrd, you need ``bootconfig``</div><div class='add'>+option on the kernel command line to enable the embedded bootconfig, or,</div><div class='add'>+alternatively, build your kernel with the ``CONFIG_BOOT_CONFIG_FORCE``</div><div class='add'>+Kconfig option selected.</div><div class='ctx'> </div><div class='add'>+Note that even if you set this option, you can override the embedded</div><div class='add'>+bootconfig by another bootconfig which attached to the initrd.</div><div class='ctx'> </div><div class='ctx'> Kernel parameters via Boot Config</div><div class='ctx'> =================================</div><div class='hunk'>@@ -204,7 +233,7 @@ In addition to the kernel command line, the boot config can be used for</div><div class='ctx'> passing the kernel parameters. All the key-value pairs under ``kernel``</div><div class='ctx'> key will be passed to kernel cmdline directly. Moreover, the key-value</div><div class='ctx'> pairs under ``init`` will be passed to init process via the cmdline.</div><div class='del'>-The parameters are concatinated with user-given kernel cmdline string</div><div class='add'>+The parameters are concatenated with user-given kernel cmdline string</div><div class='ctx'> as the following order, so that the command line parameter can override</div><div class='ctx'> bootconfig parameters (this depends on how the subsystem handles parameters</div><div class='ctx'> but in general, earlier parameter will be overwritten by later one.)::</div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v1/blkio-controller.rst b/Documentation/admin-guide/cgroup-v1/blkio-controller.rst<br/>index 16253eda192e..dabb80cdd25a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/blkio-controller.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/cgroup-v1/blkio-controller.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/blkio-controller.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/cgroup-v1/blkio-controller.rst</a></div><div class='hunk'>@@ -106,7 +106,7 @@ Proportional weight policy files</div><div class='ctx'>           see Documentation/block/bfq-iosched.rst.</div><div class='ctx'> </div><div class='ctx'>   blkio.bfq.weight_device</div><div class='del'>-          Specifes per cgroup per device weights, overriding the default group</div><div class='add'>+          Specifies per cgroup per device weights, overriding the default group</div><div class='ctx'>           weight. For more details, see Documentation/block/bfq-iosched.rst.</div><div class='ctx'> </div><div class='ctx'> 	  Following is the format::</div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v1/cgroups.rst b/Documentation/admin-guide/cgroup-v1/cgroups.rst<br/>index b0688011ed06..9343148ee993 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/cgroups.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/cgroup-v1/cgroups.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/cgroups.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/cgroup-v1/cgroups.rst</a></div><div class='hunk'>@@ -80,6 +80,8 @@ access. For example, cpusets (see Documentation/admin-guide/cgroup-v1/cpusets.rs</div><div class='ctx'> you to associate a set of CPUs and a set of memory nodes with the</div><div class='ctx'> tasks in each cgroup.</div><div class='ctx'> </div><div class='add'>+.. _cgroups-why-needed:</div><div class='add'>+</div><div class='ctx'> 1.2 Why are cgroups needed ?</div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v1/cpusets.rst b/Documentation/admin-guide/cgroup-v1/cpusets.rst<br/>index 5d844ed4df69..ae646d621a8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/cpusets.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/cgroup-v1/cpusets.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/cpusets.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/cgroup-v1/cpusets.rst</a></div><div class='hunk'>@@ -719,7 +719,7 @@ There are ways to query or modify cpusets:</div><div class='ctx'>    cat, rmdir commands from the shell, or their equivalent from C.</div><div class='ctx'>  - via the C library libcpuset.</div><div class='ctx'>  - via the C library libcgroup.</div><div class='del'>-   (http://sourceforge.net/projects/libcg/)</div><div class='add'>+   (https://github.com/libcgroup/libcgroup/)</div><div class='ctx'>  - via the python application cset.</div><div class='ctx'>    (http://code.google.com/p/cpuset/)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v1/memcg_test.rst b/Documentation/admin-guide/cgroup-v1/memcg_test.rst<br/>index 45b94f7b3beb..a402359abb99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/memcg_test.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/cgroup-v1/memcg_test.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/memcg_test.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/cgroup-v1/memcg_test.rst</a></div><div class='hunk'>@@ -97,7 +97,7 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y.</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='ctx'> 	Page Cache is charged at</div><div class='del'>-	- add_to_page_cache_locked().</div><div class='add'>+	- filemap_add_folio().</div><div class='ctx'> </div><div class='ctx'> 	The logic is very clear. (About migration, see below)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v1/memory.rst b/Documentation/admin-guide/cgroup-v1/memory.rst<br/>index 2cc502a75ef6..47d1d7d932a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/memory.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/cgroup-v1/memory.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v1/memory.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/cgroup-v1/memory.rst</a></div><div class='hunk'>@@ -2,18 +2,18 @@</div><div class='ctx'> Memory Resource Controller</div><div class='ctx'> ==========================</div><div class='ctx'> </div><div class='del'>-NOTE:</div><div class='add'>+.. caution::</div><div class='ctx'>       This document is hopelessly outdated and it asks for a complete</div><div class='ctx'>       rewrite. It still contains a useful information so we are keeping it</div><div class='ctx'>       here but make sure to check the current code if you need a deeper</div><div class='ctx'>       understanding.</div><div class='ctx'> </div><div class='del'>-NOTE:</div><div class='add'>+.. note::</div><div class='ctx'>       The Memory Resource Controller has generically been referred to as the</div><div class='ctx'>       memory controller in this document. Do not confuse memory controller</div><div class='ctx'>       used here with the memory controller that is used in hardware.</div><div class='ctx'> </div><div class='del'>-(For editors) In this document:</div><div class='add'>+.. hint::</div><div class='ctx'>       When we mention a cgroup (cgroupfs's directory) with memory controller,</div><div class='ctx'>       we call it "memory cgroup". When you see git-log and source code, you'll</div><div class='ctx'>       see patch's title and function names tend to use "memcg".</div><div class='hunk'>@@ -23,7 +23,7 @@ Benefits and Purpose of the memory controller</div><div class='ctx'> =============================================</div><div class='ctx'> </div><div class='ctx'> The memory controller isolates the memory behaviour of a group of tasks</div><div class='del'>-from the rest of the system. The article on LWN [12] mentions some probable</div><div class='add'>+from the rest of the system. The article on LWN [12]_ mentions some probable</div><div class='ctx'> uses of the memory controller. The memory controller can be used to</div><div class='ctx'> </div><div class='ctx'> a. Isolate an application or a group of applications</div><div class='hunk'>@@ -55,7 +55,8 @@ Features:</div><div class='ctx'>  - Root cgroup has no limit controls.</div><div class='ctx'> </div><div class='ctx'>  Kernel memory support is a work in progress, and the current version provides</div><div class='del'>- basically functionality. (See Section 2.7)</div><div class='add'>+ basically functionality. (See :ref:`section 2.7</div><div class='add'>+ &lt;cgroup-v1-memory-kernel-extension&gt;`)</div><div class='ctx'> </div><div class='ctx'> Brief summary of control files.</div><div class='ctx'> </div><div class='hunk'>@@ -86,6 +87,8 @@ Brief summary of control files.</div><div class='ctx'>  memory.swappiness		     set/show swappiness parameter of vmscan</div><div class='ctx'> 				     (See sysctl's vm.swappiness)</div><div class='ctx'>  memory.move_charge_at_immigrate     set/show controls of moving charges</div><div class='add'>+                                     This knob is deprecated and shouldn't be</div><div class='add'>+                                     used.</div><div class='ctx'>  memory.oom_control		     set/show oom controls.</div><div class='ctx'>  memory.numa_stat		     show the number of memory usage per numa</div><div class='ctx'> 				     node</div><div class='hunk'>@@ -107,16 +110,16 @@ Brief summary of control files.</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='ctx'> The memory controller has a long history. A request for comments for the memory</div><div class='del'>-controller was posted by Balbir Singh [1]. At the time the RFC was posted</div><div class='add'>+controller was posted by Balbir Singh [1]_. At the time the RFC was posted</div><div class='ctx'> there were several implementations for memory control. The goal of the</div><div class='ctx'> RFC was to build consensus and agreement for the minimal features required</div><div class='del'>-for memory control. The first RSS controller was posted by Balbir Singh[2]</div><div class='del'>-in Feb 2007. Pavel Emelianov [3][4][5] has since posted three versions of the</div><div class='del'>-RSS controller. At OLS, at the resource management BoF, everyone suggested</div><div class='del'>-that we handle both page cache and RSS together. Another request was raised</div><div class='del'>-to allow user space handling of OOM. The current memory controller is</div><div class='add'>+for memory control. The first RSS controller was posted by Balbir Singh [2]_</div><div class='add'>+in Feb 2007. Pavel Emelianov [3]_ [4]_ [5]_ has since posted three versions</div><div class='add'>+of the RSS controller. At OLS, at the resource management BoF, everyone</div><div class='add'>+suggested that we handle both page cache and RSS together. Another request was</div><div class='add'>+raised to allow user space handling of OOM. The current memory controller is</div><div class='ctx'> at version 6; it combines both mapped (RSS) and unmapped Page</div><div class='del'>-Cache Control [11].</div><div class='add'>+Cache Control [11]_.</div><div class='ctx'> </div><div class='ctx'> 2. Memory Control</div><div class='ctx'> =================</div><div class='hunk'>@@ -147,7 +150,8 @@ specific data structure (mem_cgroup) associated with it.</div><div class='ctx'> 2.2. Accounting</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='add'>+.. code-block::</div><div class='add'>+   :caption: Figure 1: Hierarchy of Accounting</div><div class='ctx'> </div><div class='ctx'> 		+--------------------+</div><div class='ctx'> 		|  mem_cgroup        |</div><div class='hunk'>@@ -167,7 +171,6 @@ specific data structure (mem_cgroup) associated with it.</div><div class='ctx'>            |               |           |               |</div><div class='ctx'>            +---------------+           +---------------+</div><div class='ctx'> </div><div class='del'>-             (Figure 1: Hierarchy of Accounting)</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Figure 1 shows the important aspects of the controller</div><div class='hunk'>@@ -221,8 +224,9 @@ behind this approach is that a cgroup that aggressively uses a shared</div><div class='ctx'> page will eventually get charged for it (once it is uncharged from</div><div class='ctx'> the cgroup that brought it in -- this will happen on memory pressure).</div><div class='ctx'> </div><div class='del'>-But see section 8.2: when moving a task to another cgroup, its pages may</div><div class='del'>-be recharged to the new cgroup, if move_charge_at_immigrate has been chosen.</div><div class='add'>+But see :ref:`section 8.2 &lt;cgroup-v1-memory-movable-charges&gt;` when moving a</div><div class='add'>+task to another cgroup, its pages may be recharged to the new cgroup, if</div><div class='add'>+move_charge_at_immigrate has been chosen.</div><div class='ctx'> </div><div class='ctx'> 2.4 Swap Extension</div><div class='ctx'> --------------------------------------</div><div class='hunk'>@@ -244,7 +248,8 @@ In this case, setting memsw.limit_in_bytes=3G will prevent bad use of swap.</div><div class='ctx'> By using the memsw limit, you can avoid system OOM which can be caused by swap</div><div class='ctx'> shortage.</div><div class='ctx'> </div><div class='del'>-**why 'memory+swap' rather than swap**</div><div class='add'>+2.4.1 why 'memory+swap' rather than swap</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> The global LRU(kswapd) can swap out arbitrary pages. Swap-out means</div><div class='ctx'> to move account from memory to swap...there is no change in usage of</div><div class='hunk'>@@ -252,7 +257,8 @@ memory+swap. In other words, when we want to limit the usage of swap without</div><div class='ctx'> affecting global LRU, memory+swap limit is better than just limiting swap from</div><div class='ctx'> an OS point of view.</div><div class='ctx'> </div><div class='del'>-**What happens when a cgroup hits memory.memsw.limit_in_bytes**</div><div class='add'>+2.4.2. What happens when a cgroup hits memory.memsw.limit_in_bytes</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> When a cgroup hits memory.memsw.limit_in_bytes, it's useless to do swap-out</div><div class='ctx'> in this cgroup. Then, swap-out will not be done by cgroup routine and file</div><div class='hunk'>@@ -268,26 +274,26 @@ global VM. When a cgroup goes over its limit, we first try</div><div class='ctx'> to reclaim memory from the cgroup so as to make space for the new</div><div class='ctx'> pages that the cgroup has touched. If the reclaim is unsuccessful,</div><div class='ctx'> an OOM routine is invoked to select and kill the bulkiest task in the</div><div class='del'>-cgroup. (See 10. OOM Control below.)</div><div class='add'>+cgroup. (See :ref:`10. OOM Control &lt;cgroup-v1-memory-oom-control&gt;` below.)</div><div class='ctx'> </div><div class='ctx'> The reclaim algorithm has not been modified for cgroups, except that</div><div class='ctx'> pages that are selected for reclaiming come from the per-cgroup LRU</div><div class='ctx'> list.</div><div class='ctx'> </div><div class='del'>-NOTE:</div><div class='del'>-  Reclaim does not work for the root cgroup, since we cannot set any</div><div class='del'>-  limits on the root cgroup.</div><div class='add'>+.. note::</div><div class='add'>+   Reclaim does not work for the root cgroup, since we cannot set any</div><div class='add'>+   limits on the root cgroup.</div><div class='ctx'> </div><div class='del'>-Note2:</div><div class='del'>-  When panic_on_oom is set to "2", the whole system will panic.</div><div class='add'>+.. note::</div><div class='add'>+   When panic_on_oom is set to "2", the whole system will panic.</div><div class='ctx'> </div><div class='ctx'> When oom event notifier is registered, event will be delivered.</div><div class='del'>-(See oom_control section)</div><div class='add'>+(See :ref:`oom_control &lt;cgroup-v1-memory-oom-control&gt;` section)</div><div class='ctx'> </div><div class='ctx'> 2.6 Locking</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='del'>-Lock order is as follows:</div><div class='add'>+Lock order is as follows::</div><div class='ctx'> </div><div class='ctx'>   Page lock (PG_locked bit of page-&gt;flags)</div><div class='ctx'>     mm-&gt;page_table_lock or split pte_lock</div><div class='hunk'>@@ -299,7 +305,9 @@ Per-node-per-memcgroup LRU (cgroup's private LRU) is guarded by</div><div class='ctx'> lruvec-&gt;lru_lock; PG_lru bit of page-&gt;flags is cleared before</div><div class='ctx'> isolating a page from its LRU under lruvec-&gt;lru_lock.</div><div class='ctx'> </div><div class='del'>-2.7 Kernel Memory Extension (CONFIG_MEMCG_KMEM)</div><div class='add'>+.. _cgroup-v1-memory-kernel-extension:</div><div class='add'>+</div><div class='add'>+2.7 Kernel Memory Extension</div><div class='ctx'> -----------------------------------------------</div><div class='ctx'> </div><div class='ctx'> With the Kernel memory extension, the Memory Controller is able to limit</div><div class='hunk'>@@ -367,10 +375,10 @@ U != 0, K &lt; U:</div><div class='ctx'>     never greater than the total memory, and freely set U at the cost of his</div><div class='ctx'>     QoS.</div><div class='ctx'> </div><div class='del'>-WARNING:</div><div class='del'>-    In the current implementation, memory reclaim will NOT be</div><div class='del'>-    triggered for a cgroup when it hits K while staying below U, which makes</div><div class='del'>-    this setup impractical.</div><div class='add'>+    .. warning::</div><div class='add'>+       In the current implementation, memory reclaim will NOT be triggered for</div><div class='add'>+       a cgroup when it hits K while staying below U, which makes this setup</div><div class='add'>+       impractical.</div><div class='ctx'> </div><div class='ctx'> U != 0, K &gt;= U:</div><div class='ctx'>     Since kmem charges will also be fed to the user counter and reclaim will be</div><div class='hunk'>@@ -381,47 +389,41 @@ U != 0, K &gt;= U:</div><div class='ctx'> 3. User Interface</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='del'>-3.0. Configuration</div><div class='del'>-------------------</div><div class='del'>-</div><div class='del'>-a. Enable CONFIG_CGROUPS</div><div class='del'>-b. Enable CONFIG_MEMCG</div><div class='del'>-c. Enable CONFIG_MEMCG_SWAP (to use swap extension)</div><div class='del'>-d. Enable CONFIG_MEMCG_KMEM (to use kmem extension)</div><div class='add'>+To use the user interface:</div><div class='ctx'> </div><div class='del'>-3.1. Prepare the cgroups (see cgroups.txt, Why are cgroups needed?)</div><div class='del'>--------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-::</div><div class='add'>+1. Enable CONFIG_CGROUPS and CONFIG_MEMCG options</div><div class='add'>+2. Prepare the cgroups (see :ref:`Why are cgroups needed?</div><div class='add'>+   &lt;cgroups-why-needed&gt;` for the background information)::</div><div class='ctx'> </div><div class='ctx'> 	# mount -t tmpfs none /sys/fs/cgroup</div><div class='ctx'> 	# mkdir /sys/fs/cgroup/memory</div><div class='ctx'> 	# mount -t cgroup none /sys/fs/cgroup/memory -o memory</div><div class='ctx'> </div><div class='del'>-3.2. Make the new group and move bash into it::</div><div class='add'>+3. Make the new group and move bash into it::</div><div class='ctx'> </div><div class='ctx'> 	# mkdir /sys/fs/cgroup/memory/0</div><div class='ctx'> 	# echo $$ &gt; /sys/fs/cgroup/memory/0/tasks</div><div class='ctx'> </div><div class='del'>-Since now we're in the 0 cgroup, we can alter the memory limit::</div><div class='add'>+4. Since now we're in the 0 cgroup, we can alter the memory limit::</div><div class='ctx'> </div><div class='ctx'> 	# echo 4M &gt; /sys/fs/cgroup/memory/0/memory.limit_in_bytes</div><div class='ctx'> </div><div class='del'>-NOTE:</div><div class='del'>-  We can use a suffix (k, K, m, M, g or G) to indicate values in kilo,</div><div class='del'>-  mega or gigabytes. (Here, Kilo, Mega, Giga are Kibibytes, Mebibytes,</div><div class='del'>-  Gibibytes.)</div><div class='add'>+   The limit can now be queried::</div><div class='add'>+</div><div class='add'>+	# cat /sys/fs/cgroup/memory/0/memory.limit_in_bytes</div><div class='add'>+	4194304</div><div class='ctx'> </div><div class='del'>-NOTE:</div><div class='del'>-  We can write "-1" to reset the ``*.limit_in_bytes(unlimited)``.</div><div class='add'>+.. note::</div><div class='add'>+   We can use a suffix (k, K, m, M, g or G) to indicate values in kilo,</div><div class='add'>+   mega or gigabytes. (Here, Kilo, Mega, Giga are Kibibytes, Mebibytes,</div><div class='add'>+   Gibibytes.)</div><div class='ctx'> </div><div class='del'>-NOTE:</div><div class='del'>-  We cannot set limits on the root cgroup any more.</div><div class='add'>+.. note::</div><div class='add'>+   We can write "-1" to reset the ``*.limit_in_bytes(unlimited)``.</div><div class='ctx'> </div><div class='del'>-::</div><div class='add'>+.. note::</div><div class='add'>+   We cannot set limits on the root cgroup any more.</div><div class='ctx'> </div><div class='del'>-  # cat /sys/fs/cgroup/memory/0/memory.limit_in_bytes</div><div class='del'>-  4194304</div><div class='ctx'> </div><div class='ctx'> We can check the usage::</div><div class='ctx'> </div><div class='hunk'>@@ -460,6 +462,8 @@ test because it has noise of shared objects/status.</div><div class='ctx'> But the above two are testing extreme situations.</div><div class='ctx'> Trying usual test under memory controller is always helpful.</div><div class='ctx'> </div><div class='add'>+.. _cgroup-v1-memory-test-troubleshoot:</div><div class='add'>+</div><div class='ctx'> 4.1 Troubleshooting</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='hunk'>@@ -472,8 +476,11 @@ terminated by the OOM killer. There are several causes for this:</div><div class='ctx'> A sync followed by echo 1 &gt; /proc/sys/vm/drop_caches will help get rid of</div><div class='ctx'> some of the pages cached in the cgroup (page cache pages).</div><div class='ctx'> </div><div class='del'>-To know what happens, disabling OOM_Kill as per "10. OOM Control" (below) and</div><div class='del'>-seeing what happens will be helpful.</div><div class='add'>+To know what happens, disabling OOM_Kill as per :ref:`"10. OOM Control"</div><div class='add'>+&lt;cgroup-v1-memory-oom-control&gt;` (below) and seeing what happens will be</div><div class='add'>+helpful.</div><div class='add'>+</div><div class='add'>+.. _cgroup-v1-memory-test-task-migration:</div><div class='ctx'> </div><div class='ctx'> 4.2 Task migration</div><div class='ctx'> ------------------</div><div class='hunk'>@@ -484,15 +491,16 @@ remain charged to it, the charge is dropped when the page is freed or</div><div class='ctx'> reclaimed.</div><div class='ctx'> </div><div class='ctx'> You can move charges of a task along with task migration.</div><div class='del'>-See 8. "Move charges at task migration"</div><div class='add'>+See :ref:`8. "Move charges at task migration" &lt;cgroup-v1-memory-move-charges&gt;`</div><div class='ctx'> </div><div class='ctx'> 4.3 Removing a cgroup</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='del'>-A cgroup can be removed by rmdir, but as discussed in sections 4.1 and 4.2, a</div><div class='del'>-cgroup might have some charge associated with it, even though all</div><div class='del'>-tasks have migrated away from it. (because we charge against pages, not</div><div class='del'>-against tasks.)</div><div class='add'>+A cgroup can be removed by rmdir, but as discussed in :ref:`sections 4.1</div><div class='add'>+&lt;cgroup-v1-memory-test-troubleshoot&gt;` and :ref:`4.2</div><div class='add'>+&lt;cgroup-v1-memory-test-task-migration&gt;`, a cgroup might have some charge</div><div class='add'>+associated with it, even though all tasks have migrated away from it. (because</div><div class='add'>+we charge against pages, not against tasks.)</div><div class='ctx'> </div><div class='ctx'> We move the stats to parent, and no change on the charge except uncharging</div><div class='ctx'> from the child.</div><div class='hunk'>@@ -521,66 +529,66 @@ will be charged as a new owner of it.</div><div class='ctx'> 5.2 stat file</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-memory.stat file includes following statistics</div><div class='del'>-</div><div class='del'>-per-memory cgroup local status</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='del'>-</div><div class='del'>-=============== ===============================================================</div><div class='del'>-cache		# of bytes of page cache memory.</div><div class='del'>-rss		# of bytes of anonymous and swap cache memory (includes</div><div class='del'>-		transparent hugepages).</div><div class='del'>-rss_huge	# of bytes of anonymous transparent hugepages.</div><div class='del'>-mapped_file	# of bytes of mapped file (includes tmpfs/shmem)</div><div class='del'>-pgpgin		# of charging events to the memory cgroup. The charging</div><div class='del'>-		event happens each time a page is accounted as either mapped</div><div class='del'>-		anon page(RSS) or cache page(Page Cache) to the cgroup.</div><div class='del'>-pgpgout		# of uncharging events to the memory cgroup. The uncharging</div><div class='del'>-		event happens each time a page is unaccounted from the cgroup.</div><div class='del'>-swap		# of bytes of swap usage</div><div class='del'>-dirty		# of bytes that are waiting to get written back to the disk.</div><div class='del'>-writeback	# of bytes of file/anon cache that are queued for syncing to</div><div class='del'>-		disk.</div><div class='del'>-inactive_anon	# of bytes of anonymous and swap cache memory on inactive</div><div class='del'>-		LRU list.</div><div class='del'>-active_anon	# of bytes of anonymous and swap cache memory on active</div><div class='del'>-		LRU list.</div><div class='del'>-inactive_file	# of bytes of file-backed memory on inactive LRU list.</div><div class='del'>-active_file	# of bytes of file-backed memory on active LRU list.</div><div class='del'>-unevictable	# of bytes of memory that cannot be reclaimed (mlocked etc).</div><div class='del'>-=============== ===============================================================</div><div class='del'>-</div><div class='del'>-status considering hierarchy (see memory.use_hierarchy settings)</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='del'>-</div><div class='del'>-========================= ===================================================</div><div class='del'>-hierarchical_memory_limit # of bytes of memory limit with regard to hierarchy</div><div class='del'>-			  under which the memory cgroup is</div><div class='del'>-hierarchical_memsw_limit  # of bytes of memory+swap limit with regard to</div><div class='del'>-			  hierarchy under which memory cgroup is.</div><div class='del'>-</div><div class='del'>-total_&lt;counter&gt;		  # hierarchical version of &lt;counter&gt;, which in</div><div class='del'>-			  addition to the cgroup's own value includes the</div><div class='del'>-			  sum of all hierarchical children's values of</div><div class='del'>-			  &lt;counter&gt;, i.e. total_cache</div><div class='del'>-========================= ===================================================</div><div class='del'>-</div><div class='del'>-The following additional stats are dependent on CONFIG_DEBUG_VM</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='del'>-</div><div class='del'>-========================= ========================================</div><div class='del'>-recent_rotated_anon	  VM internal parameter. (see mm/vmscan.c)</div><div class='del'>-recent_rotated_file	  VM internal parameter. (see mm/vmscan.c)</div><div class='del'>-recent_scanned_anon	  VM internal parameter. (see mm/vmscan.c)</div><div class='del'>-recent_scanned_file	  VM internal parameter. (see mm/vmscan.c)</div><div class='del'>-========================= ========================================</div><div class='del'>-</div><div class='del'>-Memo:</div><div class='add'>+memory.stat file includes following statistics:</div><div class='add'>+</div><div class='add'>+  * per-memory cgroup local status</div><div class='add'>+</div><div class='add'>+    =============== ===============================================================</div><div class='add'>+    cache           # of bytes of page cache memory.</div><div class='add'>+    rss             # of bytes of anonymous and swap cache memory (includes</div><div class='add'>+                    transparent hugepages).</div><div class='add'>+    rss_huge        # of bytes of anonymous transparent hugepages.</div><div class='add'>+    mapped_file     # of bytes of mapped file (includes tmpfs/shmem)</div><div class='add'>+    pgpgin          # of charging events to the memory cgroup. The charging</div><div class='add'>+                    event happens each time a page is accounted as either mapped</div><div class='add'>+                    anon page(RSS) or cache page(Page Cache) to the cgroup.</div><div class='add'>+    pgpgout         # of uncharging events to the memory cgroup. The uncharging</div><div class='add'>+                    event happens each time a page is unaccounted from the</div><div class='add'>+                    cgroup.</div><div class='add'>+    swap            # of bytes of swap usage</div><div class='add'>+    dirty           # of bytes that are waiting to get written back to the disk.</div><div class='add'>+    writeback       # of bytes of file/anon cache that are queued for syncing to</div><div class='add'>+                    disk.</div><div class='add'>+    inactive_anon   # of bytes of anonymous and swap cache memory on inactive</div><div class='add'>+                    LRU list.</div><div class='add'>+    active_anon     # of bytes of anonymous and swap cache memory on active</div><div class='add'>+                    LRU list.</div><div class='add'>+    inactive_file   # of bytes of file-backed memory and MADV_FREE anonymous</div><div class='add'>+                    memory (LazyFree pages) on inactive LRU list.</div><div class='add'>+    active_file     # of bytes of file-backed memory on active LRU list.</div><div class='add'>+    unevictable     # of bytes of memory that cannot be reclaimed (mlocked etc).</div><div class='add'>+    =============== ===============================================================</div><div class='add'>+</div><div class='add'>+  * status considering hierarchy (see memory.use_hierarchy settings):</div><div class='add'>+</div><div class='add'>+    ========================= ===================================================</div><div class='add'>+    hierarchical_memory_limit # of bytes of memory limit with regard to</div><div class='add'>+                              hierarchy</div><div class='add'>+                              under which the memory cgroup is</div><div class='add'>+    hierarchical_memsw_limit  # of bytes of memory+swap limit with regard to</div><div class='add'>+                              hierarchy under which memory cgroup is.</div><div class='add'>+</div><div class='add'>+    total_&lt;counter&gt;           # hierarchical version of &lt;counter&gt;, which in</div><div class='add'>+                              addition to the cgroup's own value includes the</div><div class='add'>+                              sum of all hierarchical children's values of</div><div class='add'>+                              &lt;counter&gt;, i.e. total_cache</div><div class='add'>+    ========================= ===================================================</div><div class='add'>+</div><div class='add'>+  * additional vm parameters (depends on CONFIG_DEBUG_VM):</div><div class='add'>+</div><div class='add'>+    ========================= ========================================</div><div class='add'>+    recent_rotated_anon       VM internal parameter. (see mm/vmscan.c)</div><div class='add'>+    recent_rotated_file       VM internal parameter. (see mm/vmscan.c)</div><div class='add'>+    recent_scanned_anon       VM internal parameter. (see mm/vmscan.c)</div><div class='add'>+    recent_scanned_file       VM internal parameter. (see mm/vmscan.c)</div><div class='add'>+    ========================= ========================================</div><div class='add'>+</div><div class='add'>+.. hint::</div><div class='ctx'> 	recent_rotated means recent frequency of LRU rotation.</div><div class='ctx'> 	recent_scanned means recent # of scans to LRU.</div><div class='ctx'> 	showing for better debug please see the code for meanings.</div><div class='ctx'> </div><div class='del'>-Note:</div><div class='add'>+.. note::</div><div class='ctx'> 	Only anonymous and swap cache memory is listed as part of 'rss' stat.</div><div class='ctx'> 	This should not be confused with the true 'resident set size' or the</div><div class='ctx'> 	amount of physical memory used by the cgroup.</div><div class='hunk'>@@ -711,15 +719,25 @@ If we want to change this to 1G, we can at any time use::</div><div class='ctx'> </div><div class='ctx'> 	# echo 1G &gt; memory.soft_limit_in_bytes</div><div class='ctx'> </div><div class='del'>-NOTE1:</div><div class='add'>+.. note::</div><div class='ctx'>        Soft limits take effect over a long period of time, since they involve</div><div class='ctx'>        reclaiming memory for balancing between memory cgroups</div><div class='del'>-NOTE2:</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='ctx'>        It is recommended to set the soft limit always below the hard limit,</div><div class='ctx'>        otherwise the hard limit will take precedence.</div><div class='ctx'> </div><div class='del'>-8. Move charges at task migration</div><div class='del'>-=================================</div><div class='add'>+.. _cgroup-v1-memory-move-charges:</div><div class='add'>+</div><div class='add'>+8. Move charges at task migration (DEPRECATED!)</div><div class='add'>+===============================================</div><div class='add'>+</div><div class='add'>+THIS IS DEPRECATED!</div><div class='add'>+</div><div class='add'>+It's expensive and unreliable! It's better practice to launch workload</div><div class='add'>+tasks directly from inside their target cgroup. Use dedicated workload</div><div class='add'>+cgroups to allow fine-grained policy adjustments without having to</div><div class='add'>+move physical pages between control domains.</div><div class='ctx'> </div><div class='ctx'> Users can move charges associated with a task along with task migration, that</div><div class='ctx'> is, uncharge task's pages from the old cgroup and charge them to the new cgroup.</div><div class='hunk'>@@ -736,23 +754,29 @@ If you want to enable it::</div><div class='ctx'> </div><div class='ctx'> 	# echo (some positive value) &gt; memory.move_charge_at_immigrate</div><div class='ctx'> </div><div class='del'>-Note:</div><div class='add'>+.. note::</div><div class='ctx'>       Each bits of move_charge_at_immigrate has its own meaning about what type</div><div class='del'>-      of charges should be moved. See 8.2 for details.</div><div class='del'>-Note:</div><div class='add'>+      of charges should be moved. See :ref:`section 8.2</div><div class='add'>+      &lt;cgroup-v1-memory-movable-charges&gt;` for details.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='ctx'>       Charges are moved only when you move mm-&gt;owner, in other words,</div><div class='ctx'>       a leader of a thread group.</div><div class='del'>-Note:</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='ctx'>       If we cannot find enough space for the task in the destination cgroup, we</div><div class='ctx'>       try to make space by reclaiming memory. Task migration may fail if we</div><div class='ctx'>       cannot make enough space.</div><div class='del'>-Note:</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='ctx'>       It can take several seconds if you move charges much.</div><div class='ctx'> </div><div class='ctx'> And if you want disable it again::</div><div class='ctx'> </div><div class='ctx'> 	# echo 0 &gt; memory.move_charge_at_immigrate</div><div class='ctx'> </div><div class='add'>+.. _cgroup-v1-memory-movable-charges:</div><div class='add'>+</div><div class='ctx'> 8.2 Type of charges which can be moved</div><div class='ctx'> --------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -802,6 +826,8 @@ threshold in any direction.</div><div class='ctx'> </div><div class='ctx'> It's applicable for root and non-root cgroup.</div><div class='ctx'> </div><div class='add'>+.. _cgroup-v1-memory-oom-control:</div><div class='add'>+</div><div class='ctx'> 10. OOM Control</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='hunk'>@@ -957,15 +983,16 @@ commented and discussed quite extensively in the community.</div><div class='ctx'> References</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='del'>-1. Singh, Balbir. RFC: Memory Controller, http://lwn.net/Articles/206697/</div><div class='del'>-2. Singh, Balbir. Memory Controller (RSS Control),</div><div class='add'>+.. [1] Singh, Balbir. RFC: Memory Controller, http://lwn.net/Articles/206697/</div><div class='add'>+.. [2] Singh, Balbir. Memory Controller (RSS Control),</div><div class='ctx'>    http://lwn.net/Articles/222762/</div><div class='del'>-3. Emelianov, Pavel. Resource controllers based on process cgroups</div><div class='add'>+.. [3] Emelianov, Pavel. Resource controllers based on process cgroups</div><div class='ctx'>    https://lore.kernel.org/r/45ED7DEC.7010403@sw.ru</div><div class='del'>-4. Emelianov, Pavel. RSS controller based on process cgroups (v2)</div><div class='add'>+.. [4] Emelianov, Pavel. RSS controller based on process cgroups (v2)</div><div class='ctx'>    https://lore.kernel.org/r/461A3010.90403@sw.ru</div><div class='del'>-5. Emelianov, Pavel. RSS controller based on process cgroups (v3)</div><div class='add'>+.. [5] Emelianov, Pavel. RSS controller based on process cgroups (v3)</div><div class='ctx'>    https://lore.kernel.org/r/465D9739.8070209@openvz.org</div><div class='add'>+</div><div class='ctx'> 6. Menage, Paul. Control Groups v10, http://lwn.net/Articles/236032/</div><div class='ctx'> 7. Vaidyanathan, Srinivasan, Control Groups: Pagecache accounting and control</div><div class='ctx'>    subsystem (v3), http://lwn.net/Articles/235534/</div><div class='hunk'>@@ -975,7 +1002,8 @@ References</div><div class='ctx'>    https://lore.kernel.org/r/464D267A.50107@linux.vnet.ibm.com</div><div class='ctx'> 10. Singh, Balbir. Memory controller v6 test results,</div><div class='ctx'>     https://lore.kernel.org/r/20070819094658.654.84837.sendpatchset@balbir-laptop</div><div class='del'>-11. Singh, Balbir. Memory controller introduction (v6),</div><div class='del'>-    https://lore.kernel.org/r/20070817084228.26003.12568.sendpatchset@balbir-laptop</div><div class='del'>-12. Corbet, Jonathan, Controlling memory use in cgroups,</div><div class='del'>-    http://lwn.net/Articles/243795/</div><div class='add'>+</div><div class='add'>+.. [11] Singh, Balbir. Memory controller introduction (v6),</div><div class='add'>+   https://lore.kernel.org/r/20070817084228.26003.12568.sendpatchset@balbir-laptop</div><div class='add'>+.. [12] Corbet, Jonathan, Controlling memory use in cgroups,</div><div class='add'>+   http://lwn.net/Articles/243795/</div><div class='head'>diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst<br/>index 69d7a6983f78..f67c0829350b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v2.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/cgroup-v2.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cgroup-v2.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/cgroup-v2.rst</a></div><div class='hunk'>@@ -184,6 +184,14 @@ cgroup v2 currently supports the following mount options.</div><div class='ctx'> 	ignored on non-init namespace mounts.  Please refer to the</div><div class='ctx'> 	Delegation section for details.</div><div class='ctx'> </div><div class='add'>+  favordynmods</div><div class='add'>+        Reduce the latencies of dynamic cgroup modifications such as</div><div class='add'>+        task migrations and controller on/offs at the cost of making</div><div class='add'>+        hot path operations such as forks and exits more expensive.</div><div class='add'>+        The static usage pattern of creating a cgroup, enabling</div><div class='add'>+        controllers, and then seeding it with CLONE_INTO_CGROUP is</div><div class='add'>+        not affected by this option.</div><div class='add'>+</div><div class='ctx'>   memory_localevents</div><div class='ctx'>         Only populate memory.events with data for the current cgroup,</div><div class='ctx'>         and not any subtrees. This is legacy behaviour, the default</div><div class='hunk'>@@ -611,10 +619,12 @@ process migrations.</div><div class='ctx'> and is an example of this type.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+.. _cgroupv2-limits-distributor:</div><div class='add'>+</div><div class='ctx'> Limits</div><div class='ctx'> ------</div><div class='ctx'> </div><div class='del'>-A child can only consume upto the configured amount of the resource.</div><div class='add'>+A child can only consume up to the configured amount of the resource.</div><div class='ctx'> Limits can be over-committed - the sum of the limits of children can</div><div class='ctx'> exceed the amount of resource available to the parent.</div><div class='ctx'> </div><div class='hunk'>@@ -627,15 +637,16 @@ process migrations.</div><div class='ctx'> "io.max" limits the maximum BPS and/or IOPS that a cgroup can consume</div><div class='ctx'> on an IO device and is an example of this type.</div><div class='ctx'> </div><div class='add'>+.. _cgroupv2-protections-distributor:</div><div class='ctx'> </div><div class='ctx'> Protections</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='del'>-A cgroup is protected upto the configured amount of the resource</div><div class='add'>+A cgroup is protected up to the configured amount of the resource</div><div class='ctx'> as long as the usages of all its ancestors are under their</div><div class='ctx'> protected levels.  Protections can be hard guarantees or best effort</div><div class='ctx'> soft boundaries.  Protections can also be over-committed in which case</div><div class='del'>-only upto the amount available to the parent is protected among</div><div class='add'>+only up to the amount available to the parent is protected among</div><div class='ctx'> children.</div><div class='ctx'> </div><div class='ctx'> Protections are in the range [0, max] and defaults to 0, which is</div><div class='hunk'>@@ -968,6 +979,29 @@ All cgroup core files are prefixed with "cgroup."</div><div class='ctx'> 	killing cgroups is a process directed operation, i.e. it affects</div><div class='ctx'> 	the whole thread-group.</div><div class='ctx'> </div><div class='add'>+  cgroup.pressure</div><div class='add'>+	A read-write single value file that allowed values are "0" and "1".</div><div class='add'>+	The default is "1".</div><div class='add'>+</div><div class='add'>+	Writing "0" to the file will disable the cgroup PSI accounting.</div><div class='add'>+	Writing "1" to the file will re-enable the cgroup PSI accounting.</div><div class='add'>+</div><div class='add'>+	This control attribute is not hierarchical, so disable or enable PSI</div><div class='add'>+	accounting in a cgroup does not affect PSI accounting in descendants</div><div class='add'>+	and doesn't need pass enablement via ancestors from root.</div><div class='add'>+</div><div class='add'>+	The reason this control attribute exists is that PSI accounts stalls for</div><div class='add'>+	each cgroup separately and aggregates it at each level of the hierarchy.</div><div class='add'>+	This may cause non-negligible overhead for some workloads when under</div><div class='add'>+	deep level of the hierarchy, in which case this control attribute can</div><div class='add'>+	be used to disable PSI accounting in the non-leaf cgroups.</div><div class='add'>+</div><div class='add'>+  irq.pressure</div><div class='add'>+	A read-write nested-keyed file.</div><div class='add'>+</div><div class='add'>+	Shows pressure stall information for IRQ/SOFTIRQ. See</div><div class='add'>+	:ref:`Documentation/accounting/psi.rst &lt;psi&gt;` for details.</div><div class='add'>+</div><div class='ctx'> Controllers</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='hunk'>@@ -1045,7 +1079,7 @@ All time durations are in microseconds.</div><div class='ctx'> </div><div class='ctx'> 	  $MAX $PERIOD</div><div class='ctx'> </div><div class='del'>-	which indicates that the group may consume upto $MAX in each</div><div class='add'>+	which indicates that the group may consume up to $MAX in each</div><div class='ctx'> 	$PERIOD duration.  "max" for $MAX indicates no limit.  If only</div><div class='ctx'> 	one number is written, $MAX is updated.</div><div class='ctx'> </div><div class='hunk'>@@ -1208,6 +1242,41 @@ PAGE_SIZE multiple when read back.</div><div class='ctx'> 	high limit is used and monitored properly, this limit's</div><div class='ctx'> 	utility is limited to providing the final safety net.</div><div class='ctx'> </div><div class='add'>+  memory.reclaim</div><div class='add'>+	A write-only nested-keyed file which exists for all cgroups.</div><div class='add'>+</div><div class='add'>+	This is a simple interface to trigger memory reclaim in the</div><div class='add'>+	target cgroup.</div><div class='add'>+</div><div class='add'>+	This file accepts a single key, the number of bytes to reclaim.</div><div class='add'>+	No nested keys are currently supported.</div><div class='add'>+</div><div class='add'>+	Example::</div><div class='add'>+</div><div class='add'>+	  echo "1G" &gt; memory.reclaim</div><div class='add'>+</div><div class='add'>+	The interface can be later extended with nested keys to</div><div class='add'>+	configure the reclaim behavior. For example, specify the</div><div class='add'>+	type of memory to reclaim from (anon, file, ..).</div><div class='add'>+</div><div class='add'>+	Please note that the kernel can over or under reclaim from</div><div class='add'>+	the target cgroup. If less bytes are reclaimed than the</div><div class='add'>+	specified amount, -EAGAIN is returned.</div><div class='add'>+</div><div class='add'>+	Please note that the proactive reclaim (triggered by this</div><div class='add'>+	interface) is not meant to indicate memory pressure on the</div><div class='add'>+	memory cgroup. Therefore socket memory balancing triggered by</div><div class='add'>+	the memory reclaim normally is not exercised in this case.</div><div class='add'>+	This means that the networking layer will not adapt based on</div><div class='add'>+	reclaim induced by memory.reclaim.</div><div class='add'>+</div><div class='add'>+  memory.peak</div><div class='add'>+	A read-only single value file which exists on non-root</div><div class='add'>+	cgroups.</div><div class='add'>+</div><div class='add'>+	The max memory usage recorded for the cgroup and its</div><div class='add'>+	descendants since the creation of the cgroup.</div><div class='add'>+</div><div class='ctx'>   memory.oom.group</div><div class='ctx'> 	A read-write single value file which exists on non-root</div><div class='ctx'> 	cgroups.  The default value is "0".</div><div class='hunk'>@@ -1312,6 +1381,11 @@ PAGE_SIZE multiple when read back.</div><div class='ctx'> 	  pagetables</div><div class='ctx'>                 Amount of memory allocated for page tables.</div><div class='ctx'> </div><div class='add'>+	  sec_pagetables</div><div class='add'>+		Amount of memory allocated for secondary page tables,</div><div class='add'>+		this currently includes KVM mmu allocations on x86</div><div class='add'>+		and arm64.</div><div class='add'>+</div><div class='ctx'> 	  percpu (npn)</div><div class='ctx'> 		Amount of memory used for storing per-cpu kernel</div><div class='ctx'> 		data structures.</div><div class='hunk'>@@ -1326,6 +1400,12 @@ PAGE_SIZE multiple when read back.</div><div class='ctx'> 		Amount of cached filesystem data that is swap-backed,</div><div class='ctx'> 		such as tmpfs, shm segments, shared anonymous mmap()s</div><div class='ctx'> </div><div class='add'>+	  zswap</div><div class='add'>+		Amount of memory consumed by the zswap compression backend.</div><div class='add'>+</div><div class='add'>+	  zswapped</div><div class='add'>+		Amount of application memory swapped out to zswap.</div><div class='add'>+</div><div class='ctx'> 	  file_mapped</div><div class='ctx'> 		Amount of cached filesystem data mapped with mmap()</div><div class='ctx'> </div><div class='hunk'>@@ -1399,6 +1479,30 @@ PAGE_SIZE multiple when read back.</div><div class='ctx'> 	  workingset_nodereclaim</div><div class='ctx'> 		Number of times a shadow node has been reclaimed</div><div class='ctx'> </div><div class='add'>+	  pgscan (npn)</div><div class='add'>+		Amount of scanned pages (in an inactive LRU list)</div><div class='add'>+</div><div class='add'>+	  pgsteal (npn)</div><div class='add'>+		Amount of reclaimed pages</div><div class='add'>+</div><div class='add'>+	  pgscan_kswapd (npn)</div><div class='add'>+		Amount of scanned pages by kswapd (in an inactive LRU list)</div><div class='add'>+</div><div class='add'>+	  pgscan_direct (npn)</div><div class='add'>+		Amount of scanned pages directly  (in an inactive LRU list)</div><div class='add'>+</div><div class='add'>+	  pgscan_khugepaged (npn)</div><div class='add'>+		Amount of scanned pages by khugepaged  (in an inactive LRU list)</div><div class='add'>+</div><div class='add'>+	  pgsteal_kswapd (npn)</div><div class='add'>+		Amount of reclaimed pages by kswapd</div><div class='add'>+</div><div class='add'>+	  pgsteal_direct (npn)</div><div class='add'>+		Amount of reclaimed pages directly</div><div class='add'>+</div><div class='add'>+	  pgsteal_khugepaged (npn)</div><div class='add'>+		Amount of reclaimed pages by khugepaged</div><div class='add'>+</div><div class='ctx'> 	  pgfault (npn)</div><div class='ctx'> 		Total number of page faults incurred</div><div class='ctx'> </div><div class='hunk'>@@ -1408,12 +1512,6 @@ PAGE_SIZE multiple when read back.</div><div class='ctx'> 	  pgrefill (npn)</div><div class='ctx'> 		Amount of scanned pages (in an active LRU list)</div><div class='ctx'> </div><div class='del'>-	  pgscan (npn)</div><div class='del'>-		Amount of scanned pages (in an inactive LRU list)</div><div class='del'>-</div><div class='del'>-	  pgsteal (npn)</div><div class='del'>-		Amount of reclaimed pages</div><div class='del'>-</div><div class='ctx'> 	  pgactivate (npn)</div><div class='ctx'> 		Amount of pages moved to the active LRU list</div><div class='ctx'> </div><div class='hunk'>@@ -1516,6 +1614,21 @@ PAGE_SIZE multiple when read back.</div><div class='ctx'> 	higher than the limit for an extended period of time.  This</div><div class='ctx'> 	reduces the impact on the workload and memory management.</div><div class='ctx'> </div><div class='add'>+  memory.zswap.current</div><div class='add'>+	A read-only single value file which exists on non-root</div><div class='add'>+	cgroups.</div><div class='add'>+</div><div class='add'>+	The total amount of memory consumed by the zswap compression</div><div class='add'>+	backend.</div><div class='add'>+</div><div class='add'>+  memory.zswap.max</div><div class='add'>+	A read-write single value file which exists on non-root</div><div class='add'>+	cgroups.  The default is "max".</div><div class='add'>+</div><div class='add'>+	Zswap usage hard limit. If a cgroup's zswap pool reaches this</div><div class='add'>+	limit, it will refuse to take any more stores before existing</div><div class='add'>+	entries fault back in or are written out to disk.</div><div class='add'>+</div><div class='ctx'>   memory.pressure</div><div class='ctx'> 	A read-only nested-keyed file.</div><div class='ctx'> </div><div class='hunk'>@@ -1881,7 +1994,7 @@ IO Latency Interface Files</div><div class='ctx'>   io.latency</div><div class='ctx'> 	This takes a similar format as the other controllers.</div><div class='ctx'> </div><div class='del'>-		"MAJOR:MINOR target=&lt;target time in microseconds"</div><div class='add'>+		"MAJOR:MINOR target=&lt;target time in microseconds&gt;"</div><div class='ctx'> </div><div class='ctx'>   io.stat</div><div class='ctx'> 	If the controller is enabled you will see extra stats in io.stat in</div><div class='hunk'>@@ -2109,75 +2222,93 @@ Cpuset Interface Files</div><div class='ctx'> </div><div class='ctx'> 	It accepts only the following input values when written to.</div><div class='ctx'> </div><div class='del'>-	  ========	================================</div><div class='del'>-	  "root"	a partition root</div><div class='del'>-	  "member"	a non-root member of a partition</div><div class='del'>-	  ========	================================</div><div class='del'>-</div><div class='del'>-	When set to be a partition root, the current cgroup is the</div><div class='del'>-	root of a new partition or scheduling domain that comprises</div><div class='del'>-	itself and all its descendants except those that are separate</div><div class='del'>-	partition roots themselves and their descendants.  The root</div><div class='del'>-	cgroup is always a partition root.</div><div class='del'>-</div><div class='del'>-	There are constraints on where a partition root can be set.</div><div class='del'>-	It can only be set in a cgroup if all the following conditions</div><div class='del'>-	are true.</div><div class='del'>-</div><div class='del'>-	1) The "cpuset.cpus" is not empty and the list of CPUs are</div><div class='del'>-	   exclusive, i.e. they are not shared by any of its siblings.</div><div class='del'>-	2) The parent cgroup is a partition root.</div><div class='del'>-	3) The "cpuset.cpus" is also a proper subset of the parent's</div><div class='del'>-	   "cpuset.cpus.effective".</div><div class='del'>-	4) There is no child cgroups with cpuset enabled.  This is for</div><div class='del'>-	   eliminating corner cases that have to be handled if such a</div><div class='del'>-	   condition is allowed.</div><div class='del'>-</div><div class='del'>-	Setting it to partition root will take the CPUs away from the</div><div class='del'>-	effective CPUs of the parent cgroup.  Once it is set, this</div><div class='del'>-	file cannot be reverted back to "member" if there are any child</div><div class='del'>-	cgroups with cpuset enabled.</div><div class='del'>-</div><div class='del'>-	A parent partition cannot distribute all its CPUs to its</div><div class='del'>-	child partitions.  There must be at least one cpu left in the</div><div class='del'>-	parent partition.</div><div class='del'>-</div><div class='del'>-	Once becoming a partition root, changes to "cpuset.cpus" is</div><div class='del'>-	generally allowed as long as the first condition above is true,</div><div class='del'>-	the change will not take away all the CPUs from the parent</div><div class='del'>-	partition and the new "cpuset.cpus" value is a superset of its</div><div class='del'>-	children's "cpuset.cpus" values.</div><div class='del'>-</div><div class='del'>-	Sometimes, external factors like changes to ancestors'</div><div class='del'>-	"cpuset.cpus" or cpu hotplug can cause the state of the partition</div><div class='del'>-	root to change.  On read, the "cpuset.sched.partition" file</div><div class='del'>-	can show the following values.</div><div class='del'>-</div><div class='del'>-	  ==============	==============================</div><div class='del'>-	  "member"		Non-root member of a partition</div><div class='del'>-	  "root"		Partition root</div><div class='del'>-	  "root invalid"	Invalid partition root</div><div class='del'>-	  ==============	==============================</div><div class='del'>-</div><div class='del'>-	It is a partition root if the first 2 partition root conditions</div><div class='del'>-	above are true and at least one CPU from "cpuset.cpus" is</div><div class='del'>-	granted by the parent cgroup.</div><div class='del'>-</div><div class='del'>-	A partition root can become invalid if none of CPUs requested</div><div class='del'>-	in "cpuset.cpus" can be granted by the parent cgroup or the</div><div class='del'>-	parent cgroup is no longer a partition root itself.  In this</div><div class='del'>-	case, it is not a real partition even though the restriction</div><div class='del'>-	of the first partition root condition above will still apply.</div><div class='del'>-	The cpu affinity of all the tasks in the cgroup will then be</div><div class='del'>-	associated with CPUs in the nearest ancestor partition.</div><div class='del'>-</div><div class='del'>-	An invalid partition root can be transitioned back to a</div><div class='del'>-	real partition root if at least one of the requested CPUs</div><div class='del'>-	can now be granted by its parent.  In this case, the cpu</div><div class='del'>-	affinity of all the tasks in the formerly invalid partition</div><div class='del'>-	will be associated to the CPUs of the newly formed partition.</div><div class='del'>-	Changing the partition state of an invalid partition root to</div><div class='del'>-	"member" is always allowed even if child cpusets are present.</div><div class='add'>+	  ==========	=====================================</div><div class='add'>+	  "member"	Non-root member of a partition</div><div class='add'>+	  "root"	Partition root</div><div class='add'>+	  "isolated"	Partition root without load balancing</div><div class='add'>+	  ==========	=====================================</div><div class='add'>+</div><div class='add'>+	The root cgroup is always a partition root and its state</div><div class='add'>+	cannot be changed.  All other non-root cgroups start out as</div><div class='add'>+	"member".</div><div class='add'>+</div><div class='add'>+	When set to "root", the current cgroup is the root of a new</div><div class='add'>+	partition or scheduling domain that comprises itself and all</div><div class='add'>+	its descendants except those that are separate partition roots</div><div class='add'>+	themselves and their descendants.</div><div class='add'>+</div><div class='add'>+	When set to "isolated", the CPUs in that partition root will</div><div class='add'>+	be in an isolated state without any load balancing from the</div><div class='add'>+	scheduler.  Tasks placed in such a partition with multiple</div><div class='add'>+	CPUs should be carefully distributed and bound to each of the</div><div class='add'>+	individual CPUs for optimal performance.</div><div class='add'>+</div><div class='add'>+	The value shown in "cpuset.cpus.effective" of a partition root</div><div class='add'>+	is the CPUs that the partition root can dedicate to a potential</div><div class='add'>+	new child partition root. The new child subtracts available</div><div class='add'>+	CPUs from its parent "cpuset.cpus.effective".</div><div class='add'>+</div><div class='add'>+	A partition root ("root" or "isolated") can be in one of the</div><div class='add'>+	two possible states - valid or invalid.  An invalid partition</div><div class='add'>+	root is in a degraded state where some state information may</div><div class='add'>+	be retained, but behaves more like a "member".</div><div class='add'>+</div><div class='add'>+	All possible state transitions among "member", "root" and</div><div class='add'>+	"isolated" are allowed.</div><div class='add'>+</div><div class='add'>+	On read, the "cpuset.cpus.partition" file can show the following</div><div class='add'>+	values.</div><div class='add'>+</div><div class='add'>+	  =============================	=====================================</div><div class='add'>+	  "member"			Non-root member of a partition</div><div class='add'>+	  "root"			Partition root</div><div class='add'>+	  "isolated"			Partition root without load balancing</div><div class='add'>+	  "root invalid (&lt;reason&gt;)"	Invalid partition root</div><div class='add'>+	  "isolated invalid (&lt;reason&gt;)"	Invalid isolated partition root</div><div class='add'>+	  =============================	=====================================</div><div class='add'>+</div><div class='add'>+	In the case of an invalid partition root, a descriptive string on</div><div class='add'>+	why the partition is invalid is included within parentheses.</div><div class='add'>+</div><div class='add'>+	For a partition root to become valid, the following conditions</div><div class='add'>+	must be met.</div><div class='add'>+</div><div class='add'>+	1) The "cpuset.cpus" is exclusive with its siblings , i.e. they</div><div class='add'>+	   are not shared by any of its siblings (exclusivity rule).</div><div class='add'>+	2) The parent cgroup is a valid partition root.</div><div class='add'>+	3) The "cpuset.cpus" is not empty and must contain at least</div><div class='add'>+	   one of the CPUs from parent's "cpuset.cpus", i.e. they overlap.</div><div class='add'>+	4) The "cpuset.cpus.effective" cannot be empty unless there is</div><div class='add'>+	   no task associated with this partition.</div><div class='add'>+</div><div class='add'>+	External events like hotplug or changes to "cpuset.cpus" can</div><div class='add'>+	cause a valid partition root to become invalid and vice versa.</div><div class='add'>+	Note that a task cannot be moved to a cgroup with empty</div><div class='add'>+	"cpuset.cpus.effective".</div><div class='add'>+</div><div class='add'>+	For a valid partition root with the sibling cpu exclusivity</div><div class='add'>+	rule enabled, changes made to "cpuset.cpus" that violate the</div><div class='add'>+	exclusivity rule will invalidate the partition as well as its</div><div class='add'>+	sibling partitions with conflicting cpuset.cpus values. So</div><div class='add'>+	care must be taking in changing "cpuset.cpus".</div><div class='add'>+</div><div class='add'>+	A valid non-root parent partition may distribute out all its CPUs</div><div class='add'>+	to its child partitions when there is no task associated with it.</div><div class='add'>+</div><div class='add'>+	Care must be taken to change a valid partition root to</div><div class='add'>+	"member" as all its child partitions, if present, will become</div><div class='add'>+	invalid causing disruption to tasks running in those child</div><div class='add'>+	partitions. These inactivated partitions could be recovered if</div><div class='add'>+	their parent is switched back to a partition root with a proper</div><div class='add'>+	set of "cpuset.cpus".</div><div class='add'>+</div><div class='add'>+	Poll and inotify events are triggered whenever the state of</div><div class='add'>+	"cpuset.cpus.partition" changes.  That includes changes caused</div><div class='add'>+	by write to "cpuset.cpus.partition", cpu hotplug or other</div><div class='add'>+	changes that modify the validity status of the partition.</div><div class='add'>+	This will allow user space agents to monitor unexpected changes</div><div class='add'>+	to "cpuset.cpus.partition" without the need to do continuous</div><div class='add'>+	polling.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Device controller</div><div class='head'>diff --git a/Documentation/admin-guide/cifs/usage.rst b/Documentation/admin-guide/cifs/usage.rst<br/>index 3766bf8a1c20..2e151cd8c2e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cifs/usage.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/cifs/usage.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/cifs/usage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/cifs/usage.rst</a></div><div class='hunk'>@@ -399,7 +399,7 @@ A partial list of the supported mount options follows:</div><div class='ctx'>   sep</div><div class='ctx'> 		if first mount option (after the -o), overrides</div><div class='ctx'> 		the comma as the separator between the mount</div><div class='del'>-		parms. e.g.::</div><div class='add'>+		parameters. e.g.::</div><div class='ctx'> </div><div class='ctx'> 			-o user=myname,password=mypassword,domain=mydom</div><div class='ctx'> </div><div class='hunk'>@@ -765,7 +765,7 @@ cifsFYI			If set to non-zero value, additional debug information</div><div class='ctx'> 			Some debugging statements are not compiled into the</div><div class='ctx'> 			cifs kernel unless CONFIG_CIFS_DEBUG2 is enabled in the</div><div class='ctx'> 			kernel configuration. cifsFYI may be set to one or</div><div class='del'>-			nore of the following flags (7 sets them all)::</div><div class='add'>+			more of the following flags (7 sets them all)::</div><div class='ctx'> </div><div class='ctx'> 			  +-----------------------------------------------+------+</div><div class='ctx'> 			  | log cifs informational messages		  | 0x01 |</div><div class='hunk'>@@ -858,7 +858,7 @@ CIFS kernel module parameters</div><div class='ctx'> These module parameters can be specified or modified either during the time of</div><div class='ctx'> module loading or during the runtime by using the interface::</div><div class='ctx'> </div><div class='del'>-	/proc/module/cifs/parameters/&lt;param&gt;</div><div class='add'>+	/sys/module/cifs/parameters/&lt;param&gt;</div><div class='ctx'> </div><div class='ctx'> i.e.::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/cache-policies.rst b/Documentation/admin-guide/device-mapper/cache-policies.rst<br/>index b17fe352fc41..13da4d831d46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/cache-policies.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/cache-policies.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/cache-policies.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/cache-policies.rst</a></div><div class='hunk'>@@ -70,7 +70,7 @@ the entries (each hotspot block covers a larger area than a single</div><div class='ctx'> cache block).</div><div class='ctx'> </div><div class='ctx'> All this means smq uses ~25bytes per cache block.  Still a lot of</div><div class='del'>-memory, but a substantial improvement nontheless.</div><div class='add'>+memory, but a substantial improvement nonetheless.</div><div class='ctx'> </div><div class='ctx'> Level balancing</div><div class='ctx'> ^^^^^^^^^^^^^^^</div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/dm-ebs.rst b/Documentation/admin-guide/device-mapper/dm-ebs.rst<br/>index 534fa38e8862..c09f66db5621 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-ebs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/dm-ebs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-ebs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/dm-ebs.rst</a></div><div class='hunk'>@@ -31,7 +31,7 @@ Mandatory parameters:</div><div class='ctx'> </div><div class='ctx'> Optional parameter:</div><div class='ctx'> </div><div class='del'>-    &lt;underyling sectors&gt;:</div><div class='add'>+    &lt;underlying sectors&gt;:</div><div class='ctx'>         Number of sectors defining the logical block size of &lt;dev path&gt;.</div><div class='ctx'>         2^N supported, e.g. 8 = emulate 8 sectors of 512 bytes = 4KiB.</div><div class='ctx'>         If not provided, the logical block size of &lt;dev path&gt; will be used.</div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/dm-flakey.rst b/Documentation/admin-guide/device-mapper/dm-flakey.rst<br/>index 86138735879d..f7104c01b0f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-flakey.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/dm-flakey.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-flakey.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/dm-flakey.rst</a></div><div class='hunk'>@@ -39,6 +39,10 @@ Optional feature parameters:</div><div class='ctx'>   If no feature parameters are present, during the periods of</div><div class='ctx'>   unreliability, all I/O returns errors.</div><div class='ctx'> </div><div class='add'>+  error_reads:</div><div class='add'>+	All read I/O is failed with an error signalled.</div><div class='add'>+	Write I/O is handled correctly.</div><div class='add'>+</div><div class='ctx'>   drop_writes:</div><div class='ctx'> 	All write I/O is silently ignored.</div><div class='ctx'> 	Read I/O is handled correctly.</div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/dm-init.rst b/Documentation/admin-guide/device-mapper/dm-init.rst<br/>index e5242ff17e9b..981d6a907699 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-init.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/dm-init.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-init.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/dm-init.rst</a></div><div class='hunk'>@@ -123,3 +123,11 @@ Other examples (per target):</div><div class='ctx'>     0 1638400 verity 1 8:1 8:2 4096 4096 204800 1 sha256</div><div class='ctx'>     fb1a5a0f00deb908d8b53cb270858975e76cf64105d412ce764225d53b8f3cfd</div><div class='ctx'>     51934789604d1b92399c52e7cb149d1b3a1b74bbbcb103b2a0aaacbed5c08584</div><div class='add'>+</div><div class='add'>+For setups using device-mapper on top of asynchronously probed block</div><div class='add'>+devices (MMC, USB, ..), it may be necessary to tell dm-init to</div><div class='add'>+explicitly wait for them to become available before setting up the</div><div class='add'>+device-mapper tables. This can be done with the "dm-mod.waitfor="</div><div class='add'>+module parameter, which takes a list of devices to wait for::</div><div class='add'>+</div><div class='add'>+  dm-mod.waitfor=&lt;device1&gt;[,..,&lt;deviceN&gt;]</div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/dm-zoned.rst b/Documentation/admin-guide/device-mapper/dm-zoned.rst<br/>index 0fac051caeac..932383fe6e88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-zoned.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/dm-zoned.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/dm-zoned.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/dm-zoned.rst</a></div><div class='hunk'>@@ -46,7 +46,7 @@ just like conventional zones.</div><div class='ctx'> The zones of the device(s) are separated into 2 types:</div><div class='ctx'> </div><div class='ctx'> 1) Metadata zones: these are conventional zones used to store metadata.</div><div class='del'>-Metadata zones are not reported as useable capacity to the user.</div><div class='add'>+Metadata zones are not reported as usable capacity to the user.</div><div class='ctx'> </div><div class='ctx'> 2) Data zones: all remaining zones, the vast majority of which will be</div><div class='ctx'> sequential zones used exclusively to store user data. The conventional</div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/unstriped.rst b/Documentation/admin-guide/device-mapper/unstriped.rst<br/>index 0a8d3eb3f072..5772ccdd1f5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/unstriped.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/unstriped.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/unstriped.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/unstriped.rst</a></div><div class='hunk'>@@ -35,7 +35,7 @@ An example of undoing an existing dm-stripe</div><div class='ctx'> </div><div class='ctx'> This small bash script will setup 4 loop devices and use the existing</div><div class='ctx'> striped target to combine the 4 devices into one.  It then will use</div><div class='del'>-the unstriped target ontop of the striped device to access the</div><div class='add'>+the unstriped target on top of the striped device to access the</div><div class='ctx'> individual backing loop devices.  We write data to the newly exposed</div><div class='ctx'> unstriped devices and verify the data written matches the correct</div><div class='ctx'> underlying device on the striped array::</div><div class='hunk'>@@ -110,8 +110,8 @@ to get a 92% reduction in read latency using this device mapper target.</div><div class='ctx'> Example dmsetup usage</div><div class='ctx'> =====================</div><div class='ctx'> </div><div class='del'>-unstriped ontop of Intel NVMe device that has 2 cores</div><div class='del'>------------------------------------------------------</div><div class='add'>+unstriped on top of Intel NVMe device that has 2 cores</div><div class='add'>+------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='hunk'>@@ -124,8 +124,8 @@ respectively::</div><div class='ctx'>   /dev/mapper/nvmset0</div><div class='ctx'>   /dev/mapper/nvmset1</div><div class='ctx'> </div><div class='del'>-unstriped ontop of striped with 4 drives using 128K chunk size</div><div class='del'>---------------------------------------------------------------</div><div class='add'>+unstriped on top of striped with 4 drives using 128K chunk size</div><div class='add'>+---------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/verity.rst b/Documentation/admin-guide/device-mapper/verity.rst<br/>index 1a6b91368e59..a65c1602cb23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/verity.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/verity.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/verity.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/verity.rst</a></div><div class='hunk'>@@ -141,6 +141,10 @@ root_hash_sig_key_desc &lt;key_description&gt;</div><div class='ctx'>     also gain new certificates at run time if they are signed by a certificate</div><div class='ctx'>     already in the secondary trusted keyring.</div><div class='ctx'> </div><div class='add'>+try_verify_in_tasklet</div><div class='add'>+    If verity hashes are in cache, verify data blocks in kernel tasklet instead</div><div class='add'>+    of workqueue. This option can reduce IO latency.</div><div class='add'>+</div><div class='ctx'> Theory of operation</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/device-mapper/writecache.rst b/Documentation/admin-guide/device-mapper/writecache.rst<br/>index 10429779a91a..60c16b7fd5ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/writecache.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/device-mapper/writecache.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/device-mapper/writecache.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/device-mapper/writecache.rst</a></div><div class='hunk'>@@ -20,6 +20,7 @@ Constructor parameters:</div><div class='ctx'>    size)</div><div class='ctx'> 5. the number of optional parameters (the parameters with an argument</div><div class='ctx'>    count as two)</div><div class='add'>+</div><div class='ctx'> 	start_sector n		(default: 0)</div><div class='ctx'> 		offset from the start of cache device in 512-byte sectors</div><div class='ctx'> 	high_watermark n	(default: 50)</div><div class='hunk'>@@ -74,20 +75,21 @@ Constructor parameters:</div><div class='ctx'> 		the origin volume in the last n milliseconds</div><div class='ctx'> </div><div class='ctx'> Status:</div><div class='add'>+</div><div class='ctx'> 1. error indicator - 0 if there was no error, otherwise error number</div><div class='ctx'> 2. the number of blocks</div><div class='ctx'> 3. the number of free blocks</div><div class='ctx'> 4. the number of blocks under writeback</div><div class='del'>-5. the number of read requests</div><div class='del'>-6. the number of read requests that hit the cache</div><div class='del'>-7. the number of write requests</div><div class='del'>-8. the number of write requests that hit uncommitted block</div><div class='del'>-9. the number of write requests that hit committed block</div><div class='del'>-10. the number of write requests that bypass the cache</div><div class='del'>-11. the number of write requests that are allocated in the cache</div><div class='add'>+5. the number of read blocks</div><div class='add'>+6. the number of read blocks that hit the cache</div><div class='add'>+7. the number of write blocks</div><div class='add'>+8. the number of write blocks that hit uncommitted block</div><div class='add'>+9. the number of write blocks that hit committed block</div><div class='add'>+10. the number of write blocks that bypass the cache</div><div class='add'>+11. the number of write blocks that are allocated in the cache</div><div class='ctx'> 12. the number of write requests that are blocked on the freelist</div><div class='ctx'> 13. the number of flush requests</div><div class='del'>-14. the number of discard requests</div><div class='add'>+14. the number of discarded blocks</div><div class='ctx'> </div><div class='ctx'> Messages:</div><div class='ctx'> 	flush</div><div class='head'>diff --git a/Documentation/admin-guide/devices.rst b/Documentation/admin-guide/devices.rst<br/>index 035275fedbdd..e3776d77374b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/devices.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/devices.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/devices.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/devices.rst</a></div><div class='hunk'>@@ -7,10 +7,9 @@ This list is the Linux Device List, the official registry of allocated</div><div class='ctx'> device numbers and ``/dev`` directory nodes for the Linux operating</div><div class='ctx'> system.</div><div class='ctx'> </div><div class='del'>-The LaTeX version of this document is no longer maintained, nor is</div><div class='del'>-the document that used to reside at lanana.org.  This version in the</div><div class='del'>-mainline Linux kernel is the master document.  Updates shall be sent</div><div class='del'>-as patches to the kernel maintainers (see the</div><div class='add'>+The version of this document at lanana.org is no longer maintained.  This</div><div class='add'>+version in the mainline Linux kernel is the master document.  Updates</div><div class='add'>+shall be sent as patches to the kernel maintainers (see the</div><div class='ctx'> :ref:`Documentation/process/submitting-patches.rst &lt;submittingpatches&gt;` document).</div><div class='ctx'> Specifically explore the sections titled "CHAR and MISC DRIVERS", and</div><div class='ctx'> "BLOCK LAYER" in the MAINTAINERS file to find the right maintainers</div><div class='head'>diff --git a/Documentation/admin-guide/devices.txt b/Documentation/admin-guide/devices.txt<br/>index c07dc0ee860e..06c525e01ea5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/devices.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/devices.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/devices.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/devices.txt</a></div><div class='hunk'>@@ -1933,7 +1933,7 @@</div><div class='ctx'> 		    ...</div><div class='ctx'> 		255= /dev/umem/d15p15  15th partition of 16th board.</div><div class='ctx'> </div><div class='del'>- 117 char	COSA/SRP synchronous serial card</div><div class='add'>+ 117 char	[REMOVED] COSA/SRP synchronous serial card</div><div class='ctx'> 		  0 = /dev/cosa0c0	1st board, 1st channel</div><div class='ctx'> 		  1 = /dev/cosa0c1	1st board, 2nd channel</div><div class='ctx'> 		    ...</div><div class='hunk'>@@ -3080,6 +3080,11 @@</div><div class='ctx'> 		  ...</div><div class='ctx'> 		  255 = /dev/osd255	256th OSD Device</div><div class='ctx'> </div><div class='add'>+ 261 char	Compute Acceleration Devices</div><div class='add'>+		  0 = /dev/accel/accel0	First acceleration device</div><div class='add'>+		  1 = /dev/accel/accel1	Second acceleration device</div><div class='add'>+		    ...</div><div class='add'>+</div><div class='ctx'>  384-511 char	RESERVED FOR DYNAMIC ASSIGNMENT</div><div class='ctx'> 		Character devices that request a dynamic allocation of major</div><div class='ctx'> 		number will take numbers starting from 511 and downward,</div><div class='head'>diff --git a/Documentation/admin-guide/dynamic-debug-howto.rst b/Documentation/admin-guide/dynamic-debug-howto.rst<br/>index a89cfa083155..8dc668cc1216 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/dynamic-debug-howto.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/dynamic-debug-howto.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/dynamic-debug-howto.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/dynamic-debug-howto.rst</a></div><div class='hunk'>@@ -5,143 +5,115 @@ Dynamic debug</div><div class='ctx'> Introduction</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='del'>-This document describes how to use the dynamic debug (dyndbg) feature.</div><div class='add'>+Dynamic debug allows you to dynamically enable/disable kernel</div><div class='add'>+debug-print code to obtain additional kernel information.</div><div class='ctx'> </div><div class='del'>-Dynamic debug is designed to allow you to dynamically enable/disable</div><div class='del'>-kernel code to obtain additional kernel information.  Currently, if</div><div class='del'>-``CONFIG_DYNAMIC_DEBUG`` is set, then all ``pr_debug()``/``dev_dbg()`` and</div><div class='del'>-``print_hex_dump_debug()``/``print_hex_dump_bytes()`` calls can be dynamically</div><div class='del'>-enabled per-callsite.</div><div class='add'>+If ``/proc/dynamic_debug/control`` exists, your kernel has dynamic</div><div class='add'>+debug.  You'll need root access (sudo su) to use this.</div><div class='ctx'> </div><div class='del'>-If you do not want to enable dynamic debug globally (i.e. in some embedded</div><div class='del'>-system), you may set ``CONFIG_DYNAMIC_DEBUG_CORE`` as basic support of dynamic</div><div class='del'>-debug and add ``ccflags := -DDYNAMIC_DEBUG_MODULE`` into the Makefile of any</div><div class='del'>-modules which you'd like to dynamically debug later.</div><div class='del'>-</div><div class='del'>-If ``CONFIG_DYNAMIC_DEBUG`` is not set, ``print_hex_dump_debug()`` is just</div><div class='del'>-shortcut for ``print_hex_dump(KERN_DEBUG)``.</div><div class='del'>-</div><div class='del'>-For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is</div><div class='del'>-its ``prefix_str`` argument, if it is constant string; or ``hexdump``</div><div class='del'>-in case ``prefix_str`` is built dynamically.</div><div class='add'>+Dynamic debug provides:</div><div class='ctx'> </div><div class='del'>-Dynamic debug has even more useful features:</div><div class='add'>+ * a Catalog of all *prdbgs* in your kernel.</div><div class='add'>+   ``cat /proc/dynamic_debug/control`` to see them.</div><div class='ctx'> </div><div class='del'>- * Simple query language allows turning on and off debugging</div><div class='del'>-   statements by matching any combination of 0 or 1 of:</div><div class='add'>+ * a Simple query/command language to alter *prdbgs* by selecting on</div><div class='add'>+   any combination of 0 or 1 of:</div><div class='ctx'> </div><div class='ctx'>    - source filename</div><div class='ctx'>    - function name</div><div class='ctx'>    - line number (including ranges of line numbers)</div><div class='ctx'>    - module name</div><div class='ctx'>    - format string</div><div class='del'>-</div><div class='del'>- * Provides a debugfs control file: ``&lt;debugfs&gt;/dynamic_debug/control``</div><div class='del'>-   which can be read to display the complete list of known debug</div><div class='del'>-   statements, to help guide you</div><div class='del'>-</div><div class='del'>-Controlling dynamic debug Behaviour</div><div class='del'>-===================================</div><div class='del'>-</div><div class='del'>-The behaviour of ``pr_debug()``/``dev_dbg()`` are controlled via writing to a</div><div class='del'>-control file in the 'debugfs' filesystem. Thus, you must first mount</div><div class='del'>-the debugfs filesystem, in order to make use of this feature.</div><div class='del'>-Subsequently, we refer to the control file as:</div><div class='del'>-``&lt;debugfs&gt;/dynamic_debug/control``. For example, if you want to enable</div><div class='del'>-printing from source file ``svcsock.c``, line 1603 you simply do::</div><div class='del'>-</div><div class='del'>-  nullarbor:~ # echo 'file svcsock.c line 1603 +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='del'>-</div><div class='del'>-If you make a mistake with the syntax, the write will fail thus::</div><div class='del'>-</div><div class='del'>-  nullarbor:~ # echo 'file svcsock.c wtf 1 +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='del'>-  -bash: echo: write error: Invalid argument</div><div class='del'>-</div><div class='del'>-Note, for systems without 'debugfs' enabled, the control file can be</div><div class='del'>-found in ``/proc/dynamic_debug/control``.</div><div class='add'>+   - class name (as known/declared by each module)</div><div class='ctx'> </div><div class='ctx'> Viewing Dynamic Debug Behaviour</div><div class='ctx'> ===============================</div><div class='ctx'> </div><div class='del'>-You can view the currently configured behaviour of all the debug</div><div class='del'>-statements via::</div><div class='add'>+You can view the currently configured behaviour in the *prdbg* catalog::</div><div class='ctx'> </div><div class='del'>-  nullarbor:~ # cat &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; head -n7 /proc/dynamic_debug/control</div><div class='ctx'>   # filename:lineno [module]function flags format</div><div class='del'>-  net/sunrpc/svc_rdma.c:323 [svcxprt_rdma]svc_rdma_cleanup =_ "SVCRDMA Module Removed, deregister RPC RDMA transport\012"</div><div class='del'>-  net/sunrpc/svc_rdma.c:341 [svcxprt_rdma]svc_rdma_init =_ "\011max_inline       : %d\012"</div><div class='del'>-  net/sunrpc/svc_rdma.c:340 [svcxprt_rdma]svc_rdma_init =_ "\011sq_depth         : %d\012"</div><div class='del'>-  net/sunrpc/svc_rdma.c:338 [svcxprt_rdma]svc_rdma_init =_ "\011max_requests     : %d\012"</div><div class='del'>-  ...</div><div class='add'>+  init/main.c:1179 [main]initcall_blacklist =_ "blacklisting initcall %s\012</div><div class='add'>+  init/main.c:1218 [main]initcall_blacklisted =_ "initcall %s blacklisted\012"</div><div class='add'>+  init/main.c:1424 [main]run_init_process =_ "  with arguments:\012"</div><div class='add'>+  init/main.c:1426 [main]run_init_process =_ "    %s\012"</div><div class='add'>+  init/main.c:1427 [main]run_init_process =_ "  with environment:\012"</div><div class='add'>+  init/main.c:1429 [main]run_init_process =_ "    %s\012"</div><div class='ctx'> </div><div class='add'>+The 3rd space-delimited column shows the current flags, preceded by</div><div class='add'>+a ``=`` for easy use with grep/cut. ``=p`` shows enabled callsites.</div><div class='ctx'> </div><div class='del'>-You can also apply standard Unix text manipulation filters to this</div><div class='del'>-data, e.g.::</div><div class='add'>+Controlling dynamic debug Behaviour</div><div class='add'>+===================================</div><div class='ctx'> </div><div class='del'>-  nullarbor:~ # grep -i rdma &lt;debugfs&gt;/dynamic_debug/control  | wc -l</div><div class='del'>-  62</div><div class='add'>+The behaviour of *prdbg* sites are controlled by writing</div><div class='add'>+query/commands to the control file.  Example::</div><div class='ctx'> </div><div class='del'>-  nullarbor:~ # grep -i tcp &lt;debugfs&gt;/dynamic_debug/control | wc -l</div><div class='del'>-  42</div><div class='add'>+  # grease the interface</div><div class='add'>+  :#&gt; alias ddcmd='echo $* &gt; /proc/dynamic_debug/control'</div><div class='ctx'> </div><div class='del'>-The third column shows the currently enabled flags for each debug</div><div class='del'>-statement callsite (see below for definitions of the flags).  The</div><div class='del'>-default value, with no flags enabled, is ``=_``.  So you can view all</div><div class='del'>-the debug statement callsites with any non-default flags::</div><div class='add'>+  :#&gt; ddcmd '-p; module main func run* +p'</div><div class='add'>+  :#&gt; grep =p /proc/dynamic_debug/control</div><div class='add'>+  init/main.c:1424 [main]run_init_process =p "  with arguments:\012"</div><div class='add'>+  init/main.c:1426 [main]run_init_process =p "    %s\012"</div><div class='add'>+  init/main.c:1427 [main]run_init_process =p "  with environment:\012"</div><div class='add'>+  init/main.c:1429 [main]run_init_process =p "    %s\012"</div><div class='ctx'> </div><div class='del'>-  nullarbor:~ # awk '$3 != "=_"' &lt;debugfs&gt;/dynamic_debug/control</div><div class='del'>-  # filename:lineno [module]function flags format</div><div class='del'>-  net/sunrpc/svcsock.c:1603 [sunrpc]svc_send p "svc_process: st_sendto returned %d\012"</div><div class='add'>+Error messages go to console/syslog::</div><div class='add'>+</div><div class='add'>+  :#&gt; ddcmd mode foo +p</div><div class='add'>+  dyndbg: unknown keyword "mode"</div><div class='add'>+  dyndbg: query parse failed</div><div class='add'>+  bash: echo: write error: Invalid argument</div><div class='add'>+</div><div class='add'>+If debugfs is also enabled and mounted, ``dynamic_debug/control`` is</div><div class='add'>+also under the mount-dir, typically ``/sys/kernel/debug/``.</div><div class='ctx'> </div><div class='ctx'> Command Language Reference</div><div class='ctx'> ==========================</div><div class='ctx'> </div><div class='del'>-At the lexical level, a command comprises a sequence of words separated</div><div class='add'>+At the basic lexical level, a command is a sequence of words separated</div><div class='ctx'> by spaces or tabs.  So these are all equivalent::</div><div class='ctx'> </div><div class='del'>-  nullarbor:~ # echo -n 'file svcsock.c line 1603 +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='del'>-  nullarbor:~ # echo -n '  file   svcsock.c     line  1603 +p  ' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='del'>-  nullarbor:~ # echo -n 'file svcsock.c line 1603 +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd file svcsock.c line 1603 +p</div><div class='add'>+  :#&gt; ddcmd "file svcsock.c line 1603 +p"</div><div class='add'>+  :#&gt; ddcmd '  file   svcsock.c     line  1603 +p  '</div><div class='ctx'> </div><div class='ctx'> Command submissions are bounded by a write() system call.</div><div class='ctx'> Multiple commands can be written together, separated by ``;`` or ``\n``::</div><div class='ctx'> </div><div class='del'>-  ~# echo "func pnpacpi_get_resources +p; func pnp_assign_mem +p" \</div><div class='del'>-     &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd "func pnpacpi_get_resources +p; func pnp_assign_mem +p"</div><div class='add'>+  :#&gt; ddcmd &lt;&lt;"EOC"</div><div class='add'>+  func pnpacpi_get_resources +p</div><div class='add'>+  func pnp_assign_mem +p</div><div class='add'>+  EOC</div><div class='add'>+  :#&gt; cat query-batch-file &gt; /proc/dynamic_debug/control</div><div class='ctx'> </div><div class='del'>-If your query set is big, you can batch them too::</div><div class='add'>+You can also use wildcards in each query term. The match rule supports</div><div class='add'>+``*`` (matches zero or more characters) and ``?`` (matches exactly one</div><div class='add'>+character). For example, you can match all usb drivers::</div><div class='ctx'> </div><div class='del'>-  ~# cat query-batch-file &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd file "drivers/usb/*" +p	# "" to suppress shell expansion</div><div class='ctx'> </div><div class='del'>-Another way is to use wildcards. The match rule supports ``*`` (matches</div><div class='del'>-zero or more characters) and ``?`` (matches exactly one character). For</div><div class='del'>-example, you can match all usb drivers::</div><div class='del'>-</div><div class='del'>-  ~# echo "file drivers/usb/* +p" &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='del'>-</div><div class='del'>-At the syntactical level, a command comprises a sequence of match</div><div class='del'>-specifications, followed by a flags change specification::</div><div class='add'>+Syntactically, a command is pairs of keyword values, followed by a</div><div class='add'>+flags change or setting::</div><div class='ctx'> </div><div class='ctx'>   command ::= match-spec* flags-spec</div><div class='ctx'> </div><div class='del'>-The match-spec's are used to choose a subset of the known pr_debug()</div><div class='del'>-callsites to which to apply the flags-spec.  Think of them as a query</div><div class='del'>-with implicit ANDs between each pair.  Note that an empty list of</div><div class='del'>-match-specs will select all debug statement callsites.</div><div class='add'>+The match-spec's select *prdbgs* from the catalog, upon which to apply</div><div class='add'>+the flags-spec, all constraints are ANDed together.  An absent keyword</div><div class='add'>+is the same as keyword "*".</div><div class='add'>+</div><div class='ctx'> </div><div class='del'>-A match specification comprises a keyword, which controls the</div><div class='del'>-attribute of the callsite to be compared, and a value to compare</div><div class='del'>-against.  Possible keywords are:::</div><div class='add'>+A match specification is a keyword, which selects the attribute of</div><div class='add'>+the callsite to be compared, and a value to compare against.  Possible</div><div class='add'>+keywords are:::</div><div class='ctx'> </div><div class='ctx'>   match-spec ::= 'func' string |</div><div class='ctx'> 		 'file' string |</div><div class='ctx'> 		 'module' string |</div><div class='ctx'> 		 'format' string |</div><div class='add'>+		 'class' string |</div><div class='ctx'> 		 'line' line-range</div><div class='ctx'> </div><div class='ctx'>   line-range ::= lineno |</div><div class='hunk'>@@ -203,6 +175,16 @@ format</div><div class='ctx'> 	format "nfsd: SETATTR"  // a neater way to match a format with whitespace</div><div class='ctx'> 	format 'nfsd: SETATTR'  // yet another way to match a format with whitespace</div><div class='ctx'> </div><div class='add'>+class</div><div class='add'>+    The given class_name is validated against each module, which may</div><div class='add'>+    have declared a list of known class_names.  If the class_name is</div><div class='add'>+    found for a module, callsite &amp; class matching and adjustment</div><div class='add'>+    proceeds.  Examples::</div><div class='add'>+</div><div class='add'>+	class DRM_UT_KMS	# a DRM.debug category</div><div class='add'>+	class JUNK		# silent non-match</div><div class='add'>+	// class TLD_*		# NOTICE: no wildcard in class names</div><div class='add'>+</div><div class='ctx'> line</div><div class='ctx'>     The given line number or range of line numbers is compared</div><div class='ctx'>     against the line number of each ``pr_debug()`` callsite.  A single</div><div class='hunk'>@@ -228,17 +210,16 @@ of the characters::</div><div class='ctx'> The flags are::</div><div class='ctx'> </div><div class='ctx'>   p    enables the pr_debug() callsite.</div><div class='del'>-  f    Include the function name in the printed message</div><div class='del'>-  l    Include line number in the printed message</div><div class='del'>-  m    Include module name in the printed message</div><div class='del'>-  t    Include thread ID in messages not generated from interrupt context</div><div class='del'>-  _    No flags are set. (Or'd with others on input)</div><div class='add'>+  _    enables no flags.</div><div class='ctx'> </div><div class='del'>-For ``print_hex_dump_debug()`` and ``print_hex_dump_bytes()``, only ``p`` flag</div><div class='del'>-have meaning, other flags ignored.</div><div class='add'>+  Decorator flags add to the message-prefix, in order:</div><div class='add'>+  t    Include thread ID, or &lt;intr&gt;</div><div class='add'>+  m    Include module name</div><div class='add'>+  f    Include the function name</div><div class='add'>+  l    Include line number</div><div class='ctx'> </div><div class='del'>-For display, the flags are preceded by ``=``</div><div class='del'>-(mnemonic: what the flags are currently equal to).</div><div class='add'>+For ``print_hex_dump_debug()`` and ``print_hex_dump_bytes()``, only</div><div class='add'>+the ``p`` flag has meaning, other flags are ignored.</div><div class='ctx'> </div><div class='ctx'> Note the regexp ``^[-+=][flmpt_]+$`` matches a flags specification.</div><div class='ctx'> To clear all flags at once, use ``=_`` or ``-flmpt``.</div><div class='hunk'>@@ -313,7 +294,7 @@ For ``CONFIG_DYNAMIC_DEBUG`` kernels, any settings given at boot-time (or</div><div class='ctx'> enabled by ``-DDEBUG`` flag during compilation) can be disabled later via</div><div class='ctx'> the debugfs interface if the debug messages are no longer needed::</div><div class='ctx'> </div><div class='del'>-   echo "module module_name -p" &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+   echo "module module_name -p" &gt; /proc/dynamic_debug/control</div><div class='ctx'> </div><div class='ctx'> Examples</div><div class='ctx'> ========</div><div class='hunk'>@@ -321,41 +302,35 @@ Examples</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>   // enable the message at line 1603 of file svcsock.c</div><div class='del'>-  nullarbor:~ # echo -n 'file svcsock.c line 1603 +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd 'file svcsock.c line 1603 +p'</div><div class='ctx'> </div><div class='ctx'>   // enable all the messages in file svcsock.c</div><div class='del'>-  nullarbor:~ # echo -n 'file svcsock.c +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd 'file svcsock.c +p'</div><div class='ctx'> </div><div class='ctx'>   // enable all the messages in the NFS server module</div><div class='del'>-  nullarbor:~ # echo -n 'module nfsd +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd 'module nfsd +p'</div><div class='ctx'> </div><div class='ctx'>   // enable all 12 messages in the function svc_process()</div><div class='del'>-  nullarbor:~ # echo -n 'func svc_process +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd 'func svc_process +p'</div><div class='ctx'> </div><div class='ctx'>   // disable all 12 messages in the function svc_process()</div><div class='del'>-  nullarbor:~ # echo -n 'func svc_process -p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd 'func svc_process -p'</div><div class='ctx'> </div><div class='ctx'>   // enable messages for NFS calls READ, READLINK, READDIR and READDIR+.</div><div class='del'>-  nullarbor:~ # echo -n 'format "nfsd: READ" +p' &gt;</div><div class='del'>-				&lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd 'format "nfsd: READ" +p'</div><div class='ctx'> </div><div class='ctx'>   // enable messages in files of which the paths include string "usb"</div><div class='del'>-  nullarbor:~ # echo -n 'file *usb* +p' &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd 'file *usb* +p' &gt; /proc/dynamic_debug/control</div><div class='ctx'> </div><div class='ctx'>   // enable all messages</div><div class='del'>-  nullarbor:~ # echo -n '+p' &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd '+p' &gt; /proc/dynamic_debug/control</div><div class='ctx'> </div><div class='ctx'>   // add module, function to all enabled messages</div><div class='del'>-  nullarbor:~ # echo -n '+mf' &gt; &lt;debugfs&gt;/dynamic_debug/control</div><div class='add'>+  :#&gt; ddcmd '+mf' &gt; /proc/dynamic_debug/control</div><div class='ctx'> </div><div class='ctx'>   // boot-args example, with newlines and comments for readability</div><div class='ctx'>   Kernel command line: ...</div><div class='del'>-    // see whats going on in dyndbg=value processing</div><div class='add'>+    // see what's going on in dyndbg=value processing</div><div class='ctx'>     dynamic_debug.verbose=3</div><div class='ctx'>     // enable pr_debugs in the btrfs module (can be builtin or loadable)</div><div class='ctx'>     btrfs.dyndbg="+p"</div><div class='hunk'>@@ -364,3 +339,38 @@ Examples</div><div class='ctx'>     dyndbg="file init/* +p #cmt ; func parse_one +p"</div><div class='ctx'>     // enable pr_debugs in 2 functions in a module loaded later</div><div class='ctx'>     pc87360.dyndbg="func pc87360_init_device +p; func pc87360_find +p"</div><div class='add'>+</div><div class='add'>+Kernel Configuration</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+Dynamic Debug is enabled via kernel config items::</div><div class='add'>+</div><div class='add'>+  CONFIG_DYNAMIC_DEBUG=y	# build catalog, enables CORE</div><div class='add'>+  CONFIG_DYNAMIC_DEBUG_CORE=y	# enable mechanics only, skip catalog</div><div class='add'>+</div><div class='add'>+If you do not want to enable dynamic debug globally (i.e. in some embedded</div><div class='add'>+system), you may set ``CONFIG_DYNAMIC_DEBUG_CORE`` as basic support of dynamic</div><div class='add'>+debug and add ``ccflags := -DDYNAMIC_DEBUG_MODULE`` into the Makefile of any</div><div class='add'>+modules which you'd like to dynamically debug later.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Kernel *prdbg* API</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+The following functions are cataloged and controllable when dynamic</div><div class='add'>+debug is enabled::</div><div class='add'>+</div><div class='add'>+  pr_debug()</div><div class='add'>+  dev_dbg()</div><div class='add'>+  print_hex_dump_debug()</div><div class='add'>+  print_hex_dump_bytes()</div><div class='add'>+</div><div class='add'>+Otherwise, they are off by default; ``ccflags += -DDEBUG`` or</div><div class='add'>+``#define DEBUG`` in a source file will enable them appropriately.</div><div class='add'>+</div><div class='add'>+If ``CONFIG_DYNAMIC_DEBUG`` is not set, ``print_hex_dump_debug()`` is</div><div class='add'>+just a shortcut for ``print_hex_dump(KERN_DEBUG)``.</div><div class='add'>+</div><div class='add'>+For ``print_hex_dump_debug()``/``print_hex_dump_bytes()``, format string is</div><div class='add'>+its ``prefix_str`` argument, if it is constant string; or ``hexdump``</div><div class='add'>+in case ``prefix_str`` is built dynamically.</div><div class='head'>diff --git a/Documentation/admin-guide/efi-stub.rst b/Documentation/admin-guide/efi-stub.rst<br/>index 833edb0d0bc4..b24e7c40d832 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/efi-stub.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/efi-stub.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/efi-stub.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/efi-stub.rst</a></div><div class='hunk'>@@ -7,10 +7,10 @@ as a PE/COFF image, thereby convincing EFI firmware loaders to load</div><div class='ctx'> it as an EFI executable. The code that modifies the bzImage header,</div><div class='ctx'> along with the EFI-specific entry point that the firmware loader</div><div class='ctx'> jumps to are collectively known as the "EFI boot stub", and live in</div><div class='del'>-arch/x86/boot/header.S and arch/x86/boot/compressed/eboot.c,</div><div class='add'>+arch/x86/boot/header.S and drivers/firmware/efi/libstub/x86-stub.c,</div><div class='ctx'> respectively. For ARM the EFI stub is implemented in</div><div class='ctx'> arch/arm/boot/compressed/efi-header.S and</div><div class='del'>-arch/arm/boot/compressed/efi-stub.c. EFI stub code that is shared</div><div class='add'>+drivers/firmware/efi/libstub/arm32-stub.c. EFI stub code that is shared</div><div class='ctx'> between architectures is in drivers/firmware/efi/libstub.</div><div class='ctx'> </div><div class='ctx'> For arm64, there is no compressed kernel support, so the Image itself</div><div class='head'>diff --git a/Documentation/admin-guide/ext4.rst b/Documentation/admin-guide/ext4.rst<br/>index 4c559e08d11e..5740d85439ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/ext4.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/ext4.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/ext4.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/ext4.rst</a></div><div class='hunk'>@@ -489,9 +489,6 @@ Files in /sys/fs/ext4/&lt;devname&gt;:</div><div class='ctx'>         multiple of this tuning parameter if the stripe size is not set in the</div><div class='ctx'>         ext4 superblock</div><div class='ctx'> </div><div class='del'>-  mb_max_inode_prealloc</div><div class='del'>-        The maximum length of per-inode ext4_prealloc_space list.</div><div class='del'>-</div><div class='ctx'>   mb_max_to_scan</div><div class='ctx'>         The maximum number of extents the multiblock allocator will search to</div><div class='ctx'>         find the best extent.</div><div class='head'>diff --git a/Documentation/admin-guide/gpio/gpio-sim.rst b/Documentation/admin-guide/gpio/gpio-sim.rst<br/>index d8a90c81b9ee..1cc5567a4bbe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/gpio/gpio-sim.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/gpio/gpio-sim.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/gpio/gpio-sim.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/gpio/gpio-sim.rst</a></div><div class='hunk'>@@ -123,7 +123,7 @@ Each simulated GPIO chip creates a separate sysfs group under its device</div><div class='ctx'> directory for each exposed line</div><div class='ctx'> (e.g. ``/sys/devices/platform/gpio-sim.X/gpiochipY/``). The name of each group</div><div class='ctx'> is of the form: ``'sim_gpioX'`` where X is the offset of the line. Inside each</div><div class='del'>-group there are two attibutes:</div><div class='add'>+group there are two attributes:</div><div class='ctx'> </div><div class='ctx'>     ``pull`` - allows to read and set the current simulated pull setting for</div><div class='ctx'>                every line, when writing the value must be one of: ``'pull-up'``,</div><div class='head'>diff --git a/Documentation/admin-guide/gpio/sysfs.rst b/Documentation/admin-guide/gpio/sysfs.rst<br/>index ec09ffd983e7..35171d15f78d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/gpio/sysfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/gpio/sysfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/gpio/sysfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/gpio/sysfs.rst</a></div><div class='hunk'>@@ -145,7 +145,7 @@ requested using gpio_request()::</div><div class='ctx'> 	/* export the GPIO to userspace */</div><div class='ctx'> 	int gpiod_export(struct gpio_desc *desc, bool direction_may_change);</div><div class='ctx'> </div><div class='del'>-	/* reverse gpio_export() */</div><div class='add'>+	/* reverse gpiod_export() */</div><div class='ctx'> 	void gpiod_unexport(struct gpio_desc *desc);</div><div class='ctx'> </div><div class='ctx'> 	/* create a sysfs link to an exported GPIO node */</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst b/Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst<br/>new file mode 100644<br/>index 000000000000..875616d675fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Cross-Thread Return Address Predictions</div><div class='add'>+=======================================</div><div class='add'>+</div><div class='add'>+Certain AMD and Hygon processors are subject to a cross-thread return address</div><div class='add'>+predictions vulnerability. When running in SMT mode and one sibling thread</div><div class='add'>+transitions out of C0 state, the other sibling thread could use return target</div><div class='add'>+predictions from the sibling thread that transitioned out of C0.</div><div class='add'>+</div><div class='add'>+The Spectre v2 mitigations protect the Linux kernel, as it fills the return</div><div class='add'>+address prediction entries with safe targets when context switching to the idle</div><div class='add'>+thread. However, KVM does allow a VMM to prevent exiting guest mode when</div><div class='add'>+transitioning out of C0. This could result in a guest-controlled return target</div><div class='add'>+being consumed by the sibling thread.</div><div class='add'>+</div><div class='add'>+Affected processors</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+The following CPUs are vulnerable:</div><div class='add'>+</div><div class='add'>+    - AMD Family 17h processors</div><div class='add'>+    - Hygon Family 18h processors</div><div class='add'>+</div><div class='add'>+Related CVEs</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+The following CVE entry is related to this issue:</div><div class='add'>+</div><div class='add'>+   ==============  =======================================</div><div class='add'>+   CVE-2022-27672  Cross-Thread Return Address Predictions</div><div class='add'>+   ==============  =======================================</div><div class='add'>+</div><div class='add'>+Problem</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+Affected SMT-capable processors support 1T and 2T modes of execution when SMT</div><div class='add'>+is enabled. In 2T mode, both threads in a core are executing code. For the</div><div class='add'>+processor core to enter 1T mode, it is required that one of the threads</div><div class='add'>+requests to transition out of the C0 state. This can be communicated with the</div><div class='add'>+HLT instruction or with an MWAIT instruction that requests non-C0.</div><div class='add'>+When the thread re-enters the C0 state, the processor transitions back</div><div class='add'>+to 2T mode, assuming the other thread is also still in C0 state.</div><div class='add'>+</div><div class='add'>+In affected processors, the return address predictor (RAP) is partitioned</div><div class='add'>+depending on the SMT mode. For instance, in 2T mode each thread uses a private</div><div class='add'>+16-entry RAP, but in 1T mode, the active thread uses a 32-entry RAP. Upon</div><div class='add'>+transition between 1T/2T mode, the RAP contents are not modified but the RAP</div><div class='add'>+pointers (which control the next return target to use for predictions) may</div><div class='add'>+change. This behavior may result in return targets from one SMT thread being</div><div class='add'>+used by RET predictions in the sibling thread following a 1T/2T switch. In</div><div class='add'>+particular, a RET instruction executed immediately after a transition to 1T may</div><div class='add'>+use a return target from the thread that just became idle. In theory, this</div><div class='add'>+could lead to information disclosure if the return targets used do not come</div><div class='add'>+from trustworthy code.</div><div class='add'>+</div><div class='add'>+Attack scenarios</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+An attack can be mounted on affected processors by performing a series of CALL</div><div class='add'>+instructions with targeted return locations and then transitioning out of C0</div><div class='add'>+state.</div><div class='add'>+</div><div class='add'>+Mitigation mechanism</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Before entering idle state, the kernel context switches to the idle thread. The</div><div class='add'>+context switch fills the RAP entries (referred to as the RSB in Linux) with safe</div><div class='add'>+targets by performing a sequence of CALL instructions.</div><div class='add'>+</div><div class='add'>+Prevent a guest VM from directly putting the processor into an idle state by</div><div class='add'>+intercepting HLT and MWAIT instructions.</div><div class='add'>+</div><div class='add'>+Both mitigations are required to fully address this issue.</div><div class='add'>+</div><div class='add'>+Mitigation control on the kernel command line</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+Use existing Spectre v2 mitigations that will fill the RSB on context switch.</div><div class='add'>+</div><div class='add'>+Mitigation control for KVM - module parameter</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+By default, the KVM hypervisor mitigates this issue by intercepting guest</div><div class='add'>+attempts to transition out of C0. A VMM can use the KVM_CAP_X86_DISABLE_EXITS</div><div class='add'>+capability to override those interceptions, but since this is not common, the</div><div class='add'>+mitigation that covers this path is not enabled by default.</div><div class='add'>+</div><div class='add'>+The mitigation for the KVM_CAP_X86_DISABLE_EXITS capability can be turned on</div><div class='add'>+using the boolean module parameter mitigate_smt_rsb, e.g. ``kvm.mitigate_smt_rsb=1``.</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/index.rst b/Documentation/admin-guide/hw-vuln/index.rst<br/>index 8cbc711cda93..e0614760a99e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/hw-vuln/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/hw-vuln/index.rst</a></div><div class='hunk'>@@ -17,3 +17,5 @@ are configurable at compile, boot or run time.</div><div class='ctx'>    special-register-buffer-data-sampling.rst</div><div class='ctx'>    core-scheduling.rst</div><div class='ctx'>    l1d_flush.rst</div><div class='add'>+   processor_mmio_stale_data.rst</div><div class='add'>+   cross-thread-rsb.rst</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/mds.rst b/Documentation/admin-guide/hw-vuln/mds.rst<br/>index 2d19c9f4c1fe..48ca0bd85604 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/mds.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/hw-vuln/mds.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/mds.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/hw-vuln/mds.rst</a></div><div class='hunk'>@@ -58,14 +58,14 @@ Because the buffers are potentially shared between Hyper-Threads cross</div><div class='ctx'> Hyper-Thread attacks are possible.</div><div class='ctx'> </div><div class='ctx'> Deeper technical information is available in the MDS specific x86</div><div class='del'>-architecture section: :ref:`Documentation/x86/mds.rst &lt;mds&gt;`.</div><div class='add'>+architecture section: :ref:`Documentation/arch/x86/mds.rst &lt;mds&gt;`.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Attack scenarios</div><div class='ctx'> ----------------</div><div class='ctx'> </div><div class='del'>-Attacks against the MDS vulnerabilities can be mounted from malicious non</div><div class='del'>-priviledged user space applications running on hosts or guest. Malicious</div><div class='add'>+Attacks against the MDS vulnerabilities can be mounted from malicious non-</div><div class='add'>+privileged user space applications running on hosts or guest. Malicious</div><div class='ctx'> guest OSes can obviously mount attacks as well.</div><div class='ctx'> </div><div class='ctx'> Contrary to other speculation based vulnerabilities the MDS vulnerability</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst b/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst<br/>new file mode 100644<br/>index 000000000000..c98fd11907cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst</a></div><div class='hunk'>@@ -0,0 +1,260 @@</div><div class='add'>+=========================================</div><div class='add'>+Processor MMIO Stale Data Vulnerabilities</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+Processor MMIO Stale Data Vulnerabilities are a class of memory-mapped I/O</div><div class='add'>+(MMIO) vulnerabilities that can expose data. The sequences of operations for</div><div class='add'>+exposing data range from simple to very complex. Because most of the</div><div class='add'>+vulnerabilities require the attacker to have access to MMIO, many environments</div><div class='add'>+are not affected. System environments using virtualization where MMIO access is</div><div class='add'>+provided to untrusted guests may need mitigation. These vulnerabilities are</div><div class='add'>+not transient execution attacks. However, these vulnerabilities may propagate</div><div class='add'>+stale data into core fill buffers where the data can subsequently be inferred</div><div class='add'>+by an unmitigated transient execution attack. Mitigation for these</div><div class='add'>+vulnerabilities includes a combination of microcode update and software</div><div class='add'>+changes, depending on the platform and usage model. Some of these mitigations</div><div class='add'>+are similar to those used to mitigate Microarchitectural Data Sampling (MDS) or</div><div class='add'>+those used to mitigate Special Register Buffer Data Sampling (SRBDS).</div><div class='add'>+</div><div class='add'>+Data Propagators</div><div class='add'>+================</div><div class='add'>+Propagators are operations that result in stale data being copied or moved from</div><div class='add'>+one microarchitectural buffer or register to another. Processor MMIO Stale Data</div><div class='add'>+Vulnerabilities are operations that may result in stale data being directly</div><div class='add'>+read into an architectural, software-visible state or sampled from a buffer or</div><div class='add'>+register.</div><div class='add'>+</div><div class='add'>+Fill Buffer Stale Data Propagator (FBSDP)</div><div class='add'>+-----------------------------------------</div><div class='add'>+Stale data may propagate from fill buffers (FB) into the non-coherent portion</div><div class='add'>+of the uncore on some non-coherent writes. Fill buffer propagation by itself</div><div class='add'>+does not make stale data architecturally visible. Stale data must be propagated</div><div class='add'>+to a location where it is subject to reading or sampling.</div><div class='add'>+</div><div class='add'>+Sideband Stale Data Propagator (SSDP)</div><div class='add'>+-------------------------------------</div><div class='add'>+The sideband stale data propagator (SSDP) is limited to the client (including</div><div class='add'>+Intel Xeon server E3) uncore implementation. The sideband response buffer is</div><div class='add'>+shared by all client cores. For non-coherent reads that go to sideband</div><div class='add'>+destinations, the uncore logic returns 64 bytes of data to the core, including</div><div class='add'>+both requested data and unrequested stale data, from a transaction buffer and</div><div class='add'>+the sideband response buffer. As a result, stale data from the sideband</div><div class='add'>+response and transaction buffers may now reside in a core fill buffer.</div><div class='add'>+</div><div class='add'>+Primary Stale Data Propagator (PSDP)</div><div class='add'>+------------------------------------</div><div class='add'>+The primary stale data propagator (PSDP) is limited to the client (including</div><div class='add'>+Intel Xeon server E3) uncore implementation. Similar to the sideband response</div><div class='add'>+buffer, the primary response buffer is shared by all client cores. For some</div><div class='add'>+processors, MMIO primary reads will return 64 bytes of data to the core fill</div><div class='add'>+buffer including both requested data and unrequested stale data. This is</div><div class='add'>+similar to the sideband stale data propagator.</div><div class='add'>+</div><div class='add'>+Vulnerabilities</div><div class='add'>+===============</div><div class='add'>+Device Register Partial Write (DRPW) (CVE-2022-21166)</div><div class='add'>+-----------------------------------------------------</div><div class='add'>+Some endpoint MMIO registers incorrectly handle writes that are smaller than</div><div class='add'>+the register size. Instead of aborting the write or only copying the correct</div><div class='add'>+subset of bytes (for example, 2 bytes for a 2-byte write), more bytes than</div><div class='add'>+specified by the write transaction may be written to the register. On</div><div class='add'>+processors affected by FBSDP, this may expose stale data from the fill buffers</div><div class='add'>+of the core that created the write transaction.</div><div class='add'>+</div><div class='add'>+Shared Buffers Data Sampling (SBDS) (CVE-2022-21125)</div><div class='add'>+----------------------------------------------------</div><div class='add'>+After propagators may have moved data around the uncore and copied stale data</div><div class='add'>+into client core fill buffers, processors affected by MFBDS can leak data from</div><div class='add'>+the fill buffer. It is limited to the client (including Intel Xeon server E3)</div><div class='add'>+uncore implementation.</div><div class='add'>+</div><div class='add'>+Shared Buffers Data Read (SBDR) (CVE-2022-21123)</div><div class='add'>+------------------------------------------------</div><div class='add'>+It is similar to Shared Buffer Data Sampling (SBDS) except that the data is</div><div class='add'>+directly read into the architectural software-visible state. It is limited to</div><div class='add'>+the client (including Intel Xeon server E3) uncore implementation.</div><div class='add'>+</div><div class='add'>+Affected Processors</div><div class='add'>+===================</div><div class='add'>+Not all the CPUs are affected by all the variants. For instance, most</div><div class='add'>+processors for the server market (excluding Intel Xeon E3 processors) are</div><div class='add'>+impacted by only Device Register Partial Write (DRPW).</div><div class='add'>+</div><div class='add'>+Below is the list of affected Intel processors [#f1]_:</div><div class='add'>+</div><div class='add'>+   ===================  ============  =========</div><div class='add'>+   Common name          Family_Model  Steppings</div><div class='add'>+   ===================  ============  =========</div><div class='add'>+   HASWELL_X            06_3FH        2,4</div><div class='add'>+   SKYLAKE_L            06_4EH        3</div><div class='add'>+   BROADWELL_X          06_4FH        All</div><div class='add'>+   SKYLAKE_X            06_55H        3,4,6,7,11</div><div class='add'>+   BROADWELL_D          06_56H        3,4,5</div><div class='add'>+   SKYLAKE              06_5EH        3</div><div class='add'>+   ICELAKE_X            06_6AH        4,5,6</div><div class='add'>+   ICELAKE_D            06_6CH        1</div><div class='add'>+   ICELAKE_L            06_7EH        5</div><div class='add'>+   ATOM_TREMONT_D       06_86H        All</div><div class='add'>+   LAKEFIELD            06_8AH        1</div><div class='add'>+   KABYLAKE_L           06_8EH        9 to 12</div><div class='add'>+   ATOM_TREMONT         06_96H        1</div><div class='add'>+   ATOM_TREMONT_L       06_9CH        0</div><div class='add'>+   KABYLAKE             06_9EH        9 to 13</div><div class='add'>+   COMETLAKE            06_A5H        2,3,5</div><div class='add'>+   COMETLAKE_L          06_A6H        0,1</div><div class='add'>+   ROCKETLAKE           06_A7H        1</div><div class='add'>+   ===================  ============  =========</div><div class='add'>+</div><div class='add'>+If a CPU is in the affected processor list, but not affected by a variant, it</div><div class='add'>+is indicated by new bits in MSR IA32_ARCH_CAPABILITIES. As described in a later</div><div class='add'>+section, mitigation largely remains the same for all the variants, i.e. to</div><div class='add'>+clear the CPU fill buffers via VERW instruction.</div><div class='add'>+</div><div class='add'>+New bits in MSRs</div><div class='add'>+================</div><div class='add'>+Newer processors and microcode update on existing affected processors added new</div><div class='add'>+bits to IA32_ARCH_CAPABILITIES MSR. These bits can be used to enumerate</div><div class='add'>+specific variants of Processor MMIO Stale Data vulnerabilities and mitigation</div><div class='add'>+capability.</div><div class='add'>+</div><div class='add'>+MSR IA32_ARCH_CAPABILITIES</div><div class='add'>+--------------------------</div><div class='add'>+Bit 13 - SBDR_SSDP_NO - When set, processor is not affected by either the</div><div class='add'>+	 Shared Buffers Data Read (SBDR) vulnerability or the sideband stale</div><div class='add'>+	 data propagator (SSDP).</div><div class='add'>+Bit 14 - FBSDP_NO - When set, processor is not affected by the Fill Buffer</div><div class='add'>+	 Stale Data Propagator (FBSDP).</div><div class='add'>+Bit 15 - PSDP_NO - When set, processor is not affected by Primary Stale Data</div><div class='add'>+	 Propagator (PSDP).</div><div class='add'>+Bit 17 - FB_CLEAR - When set, VERW instruction will overwrite CPU fill buffer</div><div class='add'>+	 values as part of MD_CLEAR operations. Processors that do not</div><div class='add'>+	 enumerate MDS_NO (meaning they are affected by MDS) but that do</div><div class='add'>+	 enumerate support for both L1D_FLUSH and MD_CLEAR implicitly enumerate</div><div class='add'>+	 FB_CLEAR as part of their MD_CLEAR support.</div><div class='add'>+Bit 18 - FB_CLEAR_CTRL - Processor supports read and write to MSR</div><div class='add'>+	 IA32_MCU_OPT_CTRL[FB_CLEAR_DIS]. On such processors, the FB_CLEAR_DIS</div><div class='add'>+	 bit can be set to cause the VERW instruction to not perform the</div><div class='add'>+	 FB_CLEAR action. Not all processors that support FB_CLEAR will support</div><div class='add'>+	 FB_CLEAR_CTRL.</div><div class='add'>+</div><div class='add'>+MSR IA32_MCU_OPT_CTRL</div><div class='add'>+---------------------</div><div class='add'>+Bit 3 - FB_CLEAR_DIS - When set, VERW instruction does not perform the FB_CLEAR</div><div class='add'>+action. This may be useful to reduce the performance impact of FB_CLEAR in</div><div class='add'>+cases where system software deems it warranted (for example, when performance</div><div class='add'>+is more critical, or the untrusted software has no MMIO access). Note that</div><div class='add'>+FB_CLEAR_DIS has no impact on enumeration (for example, it does not change</div><div class='add'>+FB_CLEAR or MD_CLEAR enumeration) and it may not be supported on all processors</div><div class='add'>+that enumerate FB_CLEAR.</div><div class='add'>+</div><div class='add'>+Mitigation</div><div class='add'>+==========</div><div class='add'>+Like MDS, all variants of Processor MMIO Stale Data vulnerabilities  have the</div><div class='add'>+same mitigation strategy to force the CPU to clear the affected buffers before</div><div class='add'>+an attacker can extract the secrets.</div><div class='add'>+</div><div class='add'>+This is achieved by using the otherwise unused and obsolete VERW instruction in</div><div class='add'>+combination with a microcode update. The microcode clears the affected CPU</div><div class='add'>+buffers when the VERW instruction is executed.</div><div class='add'>+</div><div class='add'>+Kernel reuses the MDS function to invoke the buffer clearing:</div><div class='add'>+</div><div class='add'>+	mds_clear_cpu_buffers()</div><div class='add'>+</div><div class='add'>+On MDS affected CPUs, the kernel already invokes CPU buffer clear on</div><div class='add'>+kernel/userspace, hypervisor/guest and C-state (idle) transitions. No</div><div class='add'>+additional mitigation is needed on such CPUs.</div><div class='add'>+</div><div class='add'>+For CPUs not affected by MDS or TAA, mitigation is needed only for the attacker</div><div class='add'>+with MMIO capability. Therefore, VERW is not required for kernel/userspace. For</div><div class='add'>+virtualization case, VERW is only needed at VMENTER for a guest with MMIO</div><div class='add'>+capability.</div><div class='add'>+</div><div class='add'>+Mitigation points</div><div class='add'>+-----------------</div><div class='add'>+Return to user space</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+Same mitigation as MDS when affected by MDS/TAA, otherwise no mitigation</div><div class='add'>+needed.</div><div class='add'>+</div><div class='add'>+C-State transition</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+Control register writes by CPU during C-state transition can propagate data</div><div class='add'>+from fill buffer to uncore buffers. Execute VERW before C-state transition to</div><div class='add'>+clear CPU fill buffers.</div><div class='add'>+</div><div class='add'>+Guest entry point</div><div class='add'>+^^^^^^^^^^^^^^^^^</div><div class='add'>+Same mitigation as MDS when processor is also affected by MDS/TAA, otherwise</div><div class='add'>+execute VERW at VMENTER only for MMIO capable guests. On CPUs not affected by</div><div class='add'>+MDS/TAA, guest without MMIO access cannot extract secrets using Processor MMIO</div><div class='add'>+Stale Data vulnerabilities, so there is no need to execute VERW for such guests.</div><div class='add'>+</div><div class='add'>+Mitigation control on the kernel command line</div><div class='add'>+---------------------------------------------</div><div class='add'>+The kernel command line allows to control the Processor MMIO Stale Data</div><div class='add'>+mitigations at boot time with the option "mmio_stale_data=". The valid</div><div class='add'>+arguments for this option are:</div><div class='add'>+</div><div class='add'>+  ==========  =================================================================</div><div class='add'>+  full        If the CPU is vulnerable, enable mitigation; CPU buffer clearing</div><div class='add'>+              on exit to userspace and when entering a VM. Idle transitions are</div><div class='add'>+              protected as well. It does not automatically disable SMT.</div><div class='add'>+  full,nosmt  Same as full, with SMT disabled on vulnerable CPUs. This is the</div><div class='add'>+              complete mitigation.</div><div class='add'>+  off         Disables mitigation completely.</div><div class='add'>+  ==========  =================================================================</div><div class='add'>+</div><div class='add'>+If the CPU is affected and mmio_stale_data=off is not supplied on the kernel</div><div class='add'>+command line, then the kernel selects the appropriate mitigation.</div><div class='add'>+</div><div class='add'>+Mitigation status information</div><div class='add'>+-----------------------------</div><div class='add'>+The Linux kernel provides a sysfs interface to enumerate the current</div><div class='add'>+vulnerability status of the system: whether the system is vulnerable, and</div><div class='add'>+which mitigations are active. The relevant sysfs file is:</div><div class='add'>+</div><div class='add'>+	/sys/devices/system/cpu/vulnerabilities/mmio_stale_data</div><div class='add'>+</div><div class='add'>+The possible values in this file are:</div><div class='add'>+</div><div class='add'>+  .. list-table::</div><div class='add'>+</div><div class='add'>+     * - 'Not affected'</div><div class='add'>+       - The processor is not vulnerable</div><div class='add'>+     * - 'Vulnerable'</div><div class='add'>+       - The processor is vulnerable, but no mitigation enabled</div><div class='add'>+     * - 'Vulnerable: Clear CPU buffers attempted, no microcode'</div><div class='add'>+       - The processor is vulnerable, but microcode is not updated. The</div><div class='add'>+         mitigation is enabled on a best effort basis.</div><div class='add'>+     * - 'Mitigation: Clear CPU buffers'</div><div class='add'>+       - The processor is vulnerable and the CPU buffer clearing mitigation is</div><div class='add'>+         enabled.</div><div class='add'>+     * - 'Unknown: No mitigations'</div><div class='add'>+       - The processor vulnerability status is unknown because it is</div><div class='add'>+	 out of Servicing period. Mitigation is not attempted.</div><div class='add'>+</div><div class='add'>+Definitions:</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Servicing period: The process of providing functional and security updates to</div><div class='add'>+Intel processors or platforms, utilizing the Intel Platform Update (IPU)</div><div class='add'>+process or other similar mechanisms.</div><div class='add'>+</div><div class='add'>+End of Servicing Updates (ESU): ESU is the date at which Intel will no</div><div class='add'>+longer provide Servicing, such as through IPU or other similar update</div><div class='add'>+processes. ESU dates will typically be aligned to end of quarter.</div><div class='add'>+</div><div class='add'>+If the processor is vulnerable then the following information is appended to</div><div class='add'>+the above information:</div><div class='add'>+</div><div class='add'>+  ========================  ===========================================</div><div class='add'>+  'SMT vulnerable'          SMT is enabled</div><div class='add'>+  'SMT disabled'            SMT is disabled</div><div class='add'>+  'SMT Host state unknown'  Kernel runs in a VM, Host SMT state unknown</div><div class='add'>+  ========================  ===========================================</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+----------</div><div class='add'>+.. [#f1] Affected Processors</div><div class='add'>+   https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/spectre.rst b/Documentation/admin-guide/hw-vuln/spectre.rst<br/>index 9e9556826450..4d186f599d90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/spectre.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/hw-vuln/spectre.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/spectre.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/hw-vuln/spectre.rst</a></div><div class='hunk'>@@ -422,6 +422,14 @@ The possible values in this file are:</div><div class='ctx'>   'RSB filling'   Protection of RSB on context switch enabled</div><div class='ctx'>   =============   ===========================================</div><div class='ctx'> </div><div class='add'>+  - EIBRS Post-barrier Return Stack Buffer (PBRSB) protection status:</div><div class='add'>+</div><div class='add'>+  ===========================  =======================================================</div><div class='add'>+  'PBRSB-eIBRS: SW sequence'   CPU is affected and protection of RSB on VMEXIT enabled</div><div class='add'>+  'PBRSB-eIBRS: Vulnerable'    CPU is vulnerable</div><div class='add'>+  'PBRSB-eIBRS: Not affected'  CPU is not affected by PBRSB</div><div class='add'>+  ===========================  =======================================================</div><div class='add'>+</div><div class='ctx'> Full mitigation might require a microcode update from the CPU</div><div class='ctx'> vendor. When the necessary microcode is not available, the kernel will</div><div class='ctx'> report vulnerability.</div><div class='hunk'>@@ -471,8 +479,16 @@ Spectre variant 2</div><div class='ctx'>    On Intel Skylake-era systems the mitigation covers most, but not all,</div><div class='ctx'>    cases. See :ref:`[3] &lt;spec_ref3&gt;` for more details.</div><div class='ctx'> </div><div class='del'>-   On CPUs with hardware mitigation for Spectre variant 2 (e.g. Enhanced</div><div class='del'>-   IBRS on x86), retpoline is automatically disabled at run time.</div><div class='add'>+   On CPUs with hardware mitigation for Spectre variant 2 (e.g. IBRS</div><div class='add'>+   or enhanced IBRS on x86), retpoline is automatically disabled at run time.</div><div class='add'>+</div><div class='add'>+   Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at</div><div class='add'>+   boot, by setting the IBRS bit, and they're automatically protected against</div><div class='add'>+   Spectre v2 variant attacks, including cross-thread branch target injections</div><div class='add'>+   on SMT systems (STIBP). In other words, eIBRS enables STIBP too.</div><div class='add'>+</div><div class='add'>+   Legacy IBRS systems clear the IBRS bit on exit to userspace and</div><div class='add'>+   therefore explicitly enable STIBP for that</div><div class='ctx'> </div><div class='ctx'>    The retpoline mitigation is turned on by default on vulnerable</div><div class='ctx'>    CPUs. It can be forced on or off by the administrator</div><div class='hunk'>@@ -496,9 +512,12 @@ Spectre variant 2</div><div class='ctx'>    For Spectre variant 2 mitigation, individual user programs</div><div class='ctx'>    can be compiled with return trampolines for indirect branches.</div><div class='ctx'>    This protects them from consuming poisoned entries in the branch</div><div class='del'>-   target buffer left by malicious software.  Alternatively, the</div><div class='del'>-   programs can disable their indirect branch speculation via prctl()</div><div class='del'>-   (See :ref:`Documentation/userspace-api/spec_ctrl.rst &lt;set_spec_ctrl&gt;`).</div><div class='add'>+   target buffer left by malicious software.</div><div class='add'>+</div><div class='add'>+   On legacy IBRS systems, at return to userspace, implicit STIBP is disabled</div><div class='add'>+   because the kernel clears the IBRS bit. In this case, the userspace programs</div><div class='add'>+   can disable indirect branch speculation via prctl() (See</div><div class='add'>+   :ref:`Documentation/userspace-api/spec_ctrl.rst &lt;set_spec_ctrl&gt;`).</div><div class='ctx'>    On x86, this will turn on STIBP to guard against attacks from the</div><div class='ctx'>    sibling thread when the user program is running, and use IBPB to</div><div class='ctx'>    flush the branch target buffer when switching to/from the program.</div><div class='hunk'>@@ -602,9 +621,10 @@ kernel command line.</div><div class='ctx'>                 retpoline,generic       Retpolines</div><div class='ctx'>                 retpoline,lfence        LFENCE; indirect branch</div><div class='ctx'>                 retpoline,amd           alias for retpoline,lfence</div><div class='del'>-                eibrs                   enhanced IBRS</div><div class='del'>-                eibrs,retpoline         enhanced IBRS + Retpolines</div><div class='del'>-                eibrs,lfence            enhanced IBRS + LFENCE</div><div class='add'>+                eibrs                   Enhanced/Auto IBRS</div><div class='add'>+                eibrs,retpoline         Enhanced/Auto IBRS + Retpolines</div><div class='add'>+                eibrs,lfence            Enhanced/Auto IBRS + LFENCE</div><div class='add'>+                ibrs                    use IBRS to protect kernel</div><div class='ctx'> </div><div class='ctx'> 		Not specifying this option is equivalent to</div><div class='ctx'> 		spectre_v2=auto.</div><div class='head'>diff --git a/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst b/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst<br/>index 76673affd917..014167ef8dd1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/hw-vuln/tsx_async_abort.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw-vuln/tsx_async_abort.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/hw-vuln/tsx_async_abort.rst</a></div><div class='hunk'>@@ -63,7 +63,7 @@ attacker needs to begin a TSX transaction and raise an asynchronous abort</div><div class='ctx'> which in turn potentially leaks data stored in the buffers.</div><div class='ctx'> </div><div class='ctx'> More detailed technical information is available in the TAA specific x86</div><div class='del'>-architecture section: :ref:`Documentation/x86/tsx_async_abort.rst &lt;tsx_async_abort&gt;`.</div><div class='add'>+architecture section: :ref:`Documentation/arch/x86/tsx_async_abort.rst &lt;tsx_async_abort&gt;`.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Attack scenarios</div><div class='head'>diff --git a/Documentation/admin-guide/hw_random.rst b/Documentation/admin-guide/hw_random.rst<br/>index 121de96e395e..d494601717f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw_random.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/hw_random.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/hw_random.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/hw_random.rst</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='del'>-==========================================================</div><div class='del'>-Linux support for random number generator in i8xx chipsets</div><div class='del'>-==========================================================</div><div class='add'>+=================================</div><div class='add'>+Hardware random number generators</div><div class='add'>+=================================</div><div class='ctx'> </div><div class='ctx'> Introduction</div><div class='ctx'> ============</div><div class='head'>diff --git a/Documentation/admin-guide/index.rst b/Documentation/admin-guide/index.rst<br/>index 5bfafcbb9562..43ea35613dfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/index.rst</a></div><div class='hunk'>@@ -36,7 +36,7 @@ problems and bugs in particular.</div><div class='ctx'> </div><div class='ctx'>    reporting-issues</div><div class='ctx'>    reporting-regressions</div><div class='del'>-   security-bugs</div><div class='add'>+   quickly-build-trimmed-linux</div><div class='ctx'>    bug-hunting</div><div class='ctx'>    bug-bisect</div><div class='ctx'>    tainted-kernels</div><div class='hunk'>@@ -56,6 +56,17 @@ ABI will be found here.</div><div class='ctx'> </div><div class='ctx'>    sysfs-rules</div><div class='ctx'> </div><div class='add'>+This is the beginning of a section with information of interest to</div><div class='add'>+application developers and system integrators doing analysis of the</div><div class='add'>+Linux kernel for safety critical applications. Documents supporting</div><div class='add'>+analysis of kernel interactions with applications, and key kernel</div><div class='add'>+subsystems expectations will be found here.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   workload-tracing</div><div class='add'>+</div><div class='ctx'> The rest of this manual consists of various unordered guides on how to</div><div class='ctx'> configure specific aspects of kernel behavior to your liking.</div><div class='ctx'> </div><div class='hunk'>@@ -116,6 +127,7 @@ configure specific aspects of kernel behavior to your liking.</div><div class='ctx'>    svga</div><div class='ctx'>    syscall-user-dispatch</div><div class='ctx'>    sysrq</div><div class='add'>+   thermal/index</div><div class='ctx'>    thunderbolt</div><div class='ctx'>    ufs</div><div class='ctx'>    unicode</div><div class='head'>diff --git a/Documentation/admin-guide/kdump/gdbmacros.txt b/Documentation/admin-guide/kdump/gdbmacros.txt<br/>index 82aecdcae8a6..030de95e3e6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kdump/gdbmacros.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/kdump/gdbmacros.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kdump/gdbmacros.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/kdump/gdbmacros.txt</a></div><div class='hunk'>@@ -312,10 +312,10 @@ define dmesg</div><div class='ctx'> 			set var $prev_flags = $info-&gt;flags</div><div class='ctx'> 		end</div><div class='ctx'> </div><div class='del'>-		set var $id = ($id + 1) &amp; $id_mask</div><div class='ctx'> 		if ($id == $end_id)</div><div class='ctx'> 			loop_break</div><div class='ctx'> 		end</div><div class='add'>+		set var $id = ($id + 1) &amp; $id_mask</div><div class='ctx'> 	end</div><div class='ctx'> end</div><div class='ctx'> document dmesg</div><div class='head'>diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst b/Documentation/admin-guide/kdump/vmcoreinfo.rst<br/>index 8419019b6a88..c18d94fa6470 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kdump/vmcoreinfo.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/kdump/vmcoreinfo.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kdump/vmcoreinfo.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/kdump/vmcoreinfo.rst</a></div><div class='hunk'>@@ -172,7 +172,7 @@ variables.</div><div class='ctx'> Offset of the free_list's member. This value is used to compute the number</div><div class='ctx'> of free pages.</div><div class='ctx'> </div><div class='del'>-Each zone has a free_area structure array called free_area[MAX_ORDER].</div><div class='add'>+Each zone has a free_area structure array called free_area[MAX_ORDER + 1].</div><div class='ctx'> The free_list represents a linked list of free page blocks.</div><div class='ctx'> </div><div class='ctx'> (list_head, next|prev)</div><div class='hunk'>@@ -189,8 +189,8 @@ Offsets of the vmap_area's members. They carry vmalloc-specific</div><div class='ctx'> information. Makedumpfile gets the start address of the vmalloc region</div><div class='ctx'> from this.</div><div class='ctx'> </div><div class='del'>-(zone.free_area, MAX_ORDER)</div><div class='del'>----------------------------</div><div class='add'>+(zone.free_area, MAX_ORDER + 1)</div><div class='add'>+-------------------------------</div><div class='ctx'> </div><div class='ctx'> Free areas descriptor. User-space tools use this value to iterate the</div><div class='ctx'> free_area ranges. MAX_ORDER is used by the zone buddy allocator.</div><div class='hunk'>@@ -200,7 +200,7 @@ prb</div><div class='ctx'> </div><div class='ctx'> A pointer to the printk ringbuffer (struct printk_ringbuffer). This</div><div class='ctx'> may be pointing to the static boot ringbuffer or the dynamically</div><div class='del'>-allocated ringbuffer, depending on when the the core dump occurred.</div><div class='add'>+allocated ringbuffer, depending on when the core dump occurred.</div><div class='ctx'> Used by user-space tools to read the active kernel log buffer.</div><div class='ctx'> </div><div class='ctx'> printk_rb_static</div><div class='hunk'>@@ -595,3 +595,32 @@ X2TLB</div><div class='ctx'> -----</div><div class='ctx'> </div><div class='ctx'> Indicates whether the crashed kernel enabled SH extended mode.</div><div class='add'>+</div><div class='add'>+RISCV64</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+VA_BITS</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+The maximum number of bits for virtual addresses. Used to compute the</div><div class='add'>+virtual memory ranges.</div><div class='add'>+</div><div class='add'>+PAGE_OFFSET</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Indicates the virtual kernel start address of the direct-mapped RAM region.</div><div class='add'>+</div><div class='add'>+phys_ram_base</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Indicates the start physical RAM address.</div><div class='add'>+</div><div class='add'>+MODULES_VADDR|MODULES_END|VMALLOC_START|VMALLOC_END|VMEMMAP_START|VMEMMAP_END|KERNEL_LINK_ADDR</div><div class='add'>+----------------------------------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+Used to get the correct ranges:</div><div class='add'>+</div><div class='add'>+  * MODULES_VADDR ~ MODULES_END : Kernel module space.</div><div class='add'>+  * VMALLOC_START ~ VMALLOC_END : vmalloc() / ioremap() space.</div><div class='add'>+  * VMEMMAP_START ~ VMEMMAP_END : vmemmap space, used for struct page array.</div><div class='add'>+  * KERNEL_LINK_ADDR : start address of Kernel link and BPF</div><div class='head'>diff --git a/Documentation/admin-guide/kernel-parameters.rst b/Documentation/admin-guide/kernel-parameters.rst<br/>index 01ba293a2d70..1ba8f2a44aac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kernel-parameters.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/kernel-parameters.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kernel-parameters.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/kernel-parameters.rst</a></div><div class='hunk'>@@ -99,6 +99,7 @@ parameter is applicable::</div><div class='ctx'> 	ALSA	ALSA sound support is enabled.</div><div class='ctx'> 	APIC	APIC support is enabled.</div><div class='ctx'> 	APM	Advanced Power Management support is enabled.</div><div class='add'>+	APPARMOR AppArmor support is enabled.</div><div class='ctx'> 	ARM	ARM architecture is enabled.</div><div class='ctx'> 	ARM64	ARM64 architecture is enabled.</div><div class='ctx'> 	AX25	Appropriate AX.25 support is enabled.</div><div class='hunk'>@@ -108,15 +109,15 @@ parameter is applicable::</div><div class='ctx'> 	DYNAMIC_DEBUG Build in debug messages and enable them at runtime</div><div class='ctx'> 	EDD	BIOS Enhanced Disk Drive Services (EDD) is enabled</div><div class='ctx'> 	EFI	EFI Partitioning (GPT) is enabled</div><div class='del'>-	EIDE	EIDE/ATAPI support is enabled.</div><div class='ctx'> 	EVM	Extended Verification Module</div><div class='ctx'> 	FB	The frame buffer device is enabled.</div><div class='ctx'> 	FTRACE	Function tracing enabled.</div><div class='ctx'> 	GCOV	GCOV profiling is enabled.</div><div class='add'>+	HIBERNATION HIBERNATION is enabled.</div><div class='ctx'> 	HW	Appropriate hardware is enabled.</div><div class='add'>+	HYPER_V HYPERV support is enabled.</div><div class='ctx'> 	IA-64	IA-64 architecture is enabled.</div><div class='ctx'> 	IMA     Integrity measurement architecture is enabled.</div><div class='del'>-	IOSCHED	More than one I/O scheduler is enabled.</div><div class='ctx'> 	IP_PNP	IP DHCP, BOOTP, or RARP is enabled.</div><div class='ctx'> 	IPV6	IPv6 support is enabled.</div><div class='ctx'> 	ISAPNP	ISA PnP code is enabled.</div><div class='hunk'>@@ -127,10 +128,11 @@ parameter is applicable::</div><div class='ctx'> 	KVM	Kernel Virtual Machine support is enabled.</div><div class='ctx'> 	LIBATA  Libata driver is enabled</div><div class='ctx'> 	LP	Printer support is enabled.</div><div class='add'>+	LOONGARCH LoongArch architecture is enabled.</div><div class='ctx'> 	LOOP	Loopback device support is enabled.</div><div class='ctx'> 	M68k	M68k architecture is enabled.</div><div class='ctx'> 			These options have more detailed description inside of</div><div class='del'>-			Documentation/m68k/kernel-options.rst.</div><div class='add'>+			Documentation/arch/m68k/kernel-options.rst.</div><div class='ctx'> 	MDA	MDA console support is enabled.</div><div class='ctx'> 	MIPS	MIPS architecture is enabled.</div><div class='ctx'> 	MOUSE	Appropriate mouse support is enabled.</div><div class='hunk'>@@ -140,9 +142,7 @@ parameter is applicable::</div><div class='ctx'> 	NUMA	NUMA support is enabled.</div><div class='ctx'> 	NFS	Appropriate NFS support is enabled.</div><div class='ctx'> 	OF	Devicetree is enabled.</div><div class='del'>-	OSS	OSS sound support is enabled.</div><div class='ctx'> 	PV_OPS	A paravirtualized kernel is enabled.</div><div class='del'>-	PARIDE	The ParIDE (parallel port IDE) subsystem is enabled.</div><div class='ctx'> 	PARISC	The PA-RISC architecture is enabled.</div><div class='ctx'> 	PCI	PCI bus support is enabled.</div><div class='ctx'> 	PCIE	PCI Express support is enabled.</div><div class='hunk'>@@ -160,7 +160,6 @@ parameter is applicable::</div><div class='ctx'> 			the Documentation/scsi/ sub-directory.</div><div class='ctx'> 	SECURITY Different security models are enabled.</div><div class='ctx'> 	SELINUX SELinux support is enabled.</div><div class='del'>-	APPARMOR AppArmor support is enabled.</div><div class='ctx'> 	SERIAL	Serial support is enabled.</div><div class='ctx'> 	SH	SuperH architecture is enabled.</div><div class='ctx'> 	SMP	The kernel is an SMP kernel.</div><div class='hunk'>@@ -168,7 +167,6 @@ parameter is applicable::</div><div class='ctx'> 	SWSUSP	Software suspend (hibernation) is enabled.</div><div class='ctx'> 	SUSPEND	System suspend states are enabled.</div><div class='ctx'> 	TPM	TPM drivers are enabled.</div><div class='del'>-	TS	Appropriate touchscreen support is enabled.</div><div class='ctx'> 	UMS	USB Mass Storage support is enabled.</div><div class='ctx'> 	USB	USB support is enabled.</div><div class='ctx'> 	USBHID	USB Human Interface Device support is enabled.</div><div class='hunk'>@@ -177,11 +175,10 @@ parameter is applicable::</div><div class='ctx'> 	VGA	The VGA console has been enabled.</div><div class='ctx'> 	VT	Virtual terminal support is enabled.</div><div class='ctx'> 	WDT	Watchdog support is enabled.</div><div class='del'>-	XT	IBM PC/XT MFM hard disk support is enabled.</div><div class='ctx'> 	X86-32	X86-32, aka i386 architecture is enabled.</div><div class='ctx'> 	X86-64	X86-64 architecture is enabled.</div><div class='ctx'> 			More X86-64 boot options can be found in</div><div class='del'>-			Documentation/x86/x86_64/boot-options.rst.</div><div class='add'>+			Documentation/arch/x86/x86_64/boot-options.rst.</div><div class='ctx'> 	X86	Either 32-bit or 64-bit x86 (same as X86-32+X86-64)</div><div class='ctx'> 	X86_UV	SGI UV support is enabled.</div><div class='ctx'> 	XEN	Xen support is enabled</div><div class='hunk'>@@ -196,10 +193,10 @@ In addition, the following text indicates that the option::</div><div class='ctx'> Parameters denoted with BOOT are actually interpreted by the boot</div><div class='ctx'> loader, and have no meaning to the kernel directly.</div><div class='ctx'> Do not modify the syntax of boot loader parameters without extreme</div><div class='del'>-need or coordination with &lt;Documentation/x86/boot.rst&gt;.</div><div class='add'>+need or coordination with &lt;Documentation/arch/x86/boot.rst&gt;.</div><div class='ctx'> </div><div class='ctx'> There are also arch-specific kernel-parameters not documented here.</div><div class='del'>-See for example &lt;Documentation/x86/x86_64/boot-options.rst&gt;.</div><div class='add'>+See for example &lt;Documentation/arch/x86/x86_64/boot-options.rst&gt;.</div><div class='ctx'> </div><div class='ctx'> Note that ALL kernel parameters listed below are CASE SENSITIVE, and that</div><div class='ctx'> a trailing = on the name of any parameter states that that parameter will</div><div class='hunk'>@@ -211,7 +208,7 @@ The number of kernel parameters is not limited, but the length of the</div><div class='ctx'> complete command line (parameters including spaces etc.) is limited to</div><div class='ctx'> a fixed number of characters. This limit depends on the architecture</div><div class='ctx'> and is between 256 and 4096 characters. It is defined in the file</div><div class='del'>-./include/asm/setup.h as COMMAND_LINE_SIZE.</div><div class='add'>+./include/uapi/asm-generic/setup.h as COMMAND_LINE_SIZE.</div><div class='ctx'> </div><div class='ctx'> Finally, the [KMG] suffix is commonly described after a number of kernel</div><div class='ctx'> parameter values. These 'K', 'M', and 'G' letters represent the _binary_</div><div class='head'>diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt<br/>index 3f1cc5e317ed..9e5bab29685f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kernel-parameters.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/kernel-parameters.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kernel-parameters.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/kernel-parameters.txt</a></div><div class='hunk'>@@ -321,6 +321,8 @@</div><div class='ctx'> 			force_enable - Force enable the IOMMU on platforms known</div><div class='ctx'> 				       to be buggy with IOMMU enabled. Use this</div><div class='ctx'> 				       option with care.</div><div class='add'>+			pgtbl_v1     - Use v1 page table for DMA-API (Default).</div><div class='add'>+			pgtbl_v2     - Use v2 page table for DMA-API.</div><div class='ctx'> </div><div class='ctx'> 	amd_iommu_dump=	[HW,X86-64]</div><div class='ctx'> 			Enable AMD IOMMU driver option to dump the ACPI table</div><div class='hunk'>@@ -337,6 +339,29 @@</div><div class='ctx'> 			             This mode requires kvm-amd.avic=1.</div><div class='ctx'> 			             (Default when IOMMU HW support is present.)</div><div class='ctx'> </div><div class='add'>+	amd_pstate=	[X86]</div><div class='add'>+			disable</div><div class='add'>+			  Do not enable amd_pstate as the default</div><div class='add'>+			  scaling driver for the supported processors</div><div class='add'>+			passive</div><div class='add'>+			  Use amd_pstate with passive mode as a scaling driver.</div><div class='add'>+			  In this mode autonomous selection is disabled.</div><div class='add'>+			  Driver requests a desired performance level and platform</div><div class='add'>+			  tries to match the same performance level if it is</div><div class='add'>+			  satisfied by guaranteed performance level.</div><div class='add'>+			active</div><div class='add'>+			  Use amd_pstate_epp driver instance as the scaling driver,</div><div class='add'>+			  driver provides a hint to the hardware if software wants</div><div class='add'>+			  to bias toward performance (0x0) or energy efficiency (0xff)</div><div class='add'>+			  to the CPPC firmware. then CPPC power algorithm will</div><div class='add'>+			  calculate the runtime workload and adjust the realtime cores</div><div class='add'>+			  frequency.</div><div class='add'>+			guided</div><div class='add'>+			  Activate guided autonomous mode. Driver requests minimum and</div><div class='add'>+			  maximum performance level and the platform autonomously</div><div class='add'>+			  selects a performance level in this range and appropriate</div><div class='add'>+			  to the current workload.</div><div class='add'>+</div><div class='ctx'> 	amijoy.map=	[HW,JOY] Amiga joystick support</div><div class='ctx'> 			Map of devices attached to JOY0DAT and JOY1DAT</div><div class='ctx'> 			Format: &lt;a&gt;,&lt;b&gt;</div><div class='hunk'>@@ -376,18 +401,16 @@</div><div class='ctx'> 	autoconf=	[IPV6]</div><div class='ctx'> 			See Documentation/networking/ipv6.rst.</div><div class='ctx'> </div><div class='del'>-	show_lapic=	[APIC,X86] Advanced Programmable Interrupt Controller</div><div class='del'>-			Limit apic dumping. The parameter defines the maximal</div><div class='del'>-			number of local apics being dumped. Also it is possible</div><div class='del'>-			to set it to "all" by meaning -- no limit here.</div><div class='del'>-			Format: { 1 (default) | 2 | ... | all }.</div><div class='del'>-			The parameter valid if only apic=debug or</div><div class='del'>-			apic=verbose is specified.</div><div class='del'>-			Example: apic=debug show_lapic=all</div><div class='del'>-</div><div class='ctx'> 	apm=		[APM] Advanced Power Management</div><div class='ctx'> 			See header of arch/x86/kernel/apm_32.c.</div><div class='ctx'> </div><div class='add'>+	apparmor=	[APPARMOR] Disable or enable AppArmor at boot time</div><div class='add'>+			Format: { "0" | "1" }</div><div class='add'>+			See security/apparmor/Kconfig help text</div><div class='add'>+			0 -- disable.</div><div class='add'>+			1 -- enable.</div><div class='add'>+			Default value is set via kernel config option.</div><div class='add'>+</div><div class='ctx'> 	arcrimi=	[HW,NET] ARCnet - "RIM I" (entirely mem-mapped) cards</div><div class='ctx'> 			Format: &lt;io&gt;,&lt;irq&gt;,&lt;nodeID&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -400,6 +423,12 @@</div><div class='ctx'> 	arm64.nomte	[ARM64] Unconditionally disable Memory Tagging Extension</div><div class='ctx'> 			support</div><div class='ctx'> </div><div class='add'>+	arm64.nosve	[ARM64] Unconditionally disable Scalable Vector</div><div class='add'>+			Extension support</div><div class='add'>+</div><div class='add'>+	arm64.nosme	[ARM64] Unconditionally disable Scalable Matrix</div><div class='add'>+			Extension support</div><div class='add'>+</div><div class='ctx'> 	ataflop=	[HW,M68k]</div><div class='ctx'> </div><div class='ctx'> 	atarimouse=	[HW,MOUSE] Atari Mouse</div><div class='hunk'>@@ -461,13 +490,21 @@</div><div class='ctx'> 			Format: &lt;io&gt;,&lt;irq&gt;,&lt;mode&gt;</div><div class='ctx'> 			See header of drivers/net/hamradio/baycom_ser_hdx.c.</div><div class='ctx'> </div><div class='add'>+	bert_disable	[ACPI]</div><div class='add'>+			Disable BERT OS support on buggy BIOSes.</div><div class='add'>+</div><div class='add'>+	bgrt_disable	[ACPI][X86]</div><div class='add'>+			Disable BGRT to avoid flickering OEM logo.</div><div class='add'>+</div><div class='ctx'> 	blkdevparts=	Manual partition parsing of block device(s) for</div><div class='ctx'> 			embedded devices based on command line input.</div><div class='ctx'> 			See Documentation/block/cmdline-partition.rst</div><div class='ctx'> </div><div class='ctx'> 	boot_delay=	Milliseconds to delay each printk during boot.</div><div class='del'>-			Values larger than 10 seconds (10000) are changed to</div><div class='del'>-			no delay (0).</div><div class='add'>+			Only works if CONFIG_BOOT_PRINTK_DELAY is enabled,</div><div class='add'>+			and you may also have to specify "lpj=".  Boot_delay</div><div class='add'>+			values larger than 10 seconds (10000) are assumed</div><div class='add'>+			erroneous and ignored.</div><div class='ctx'> 			Format: integer</div><div class='ctx'> </div><div class='ctx'> 	bootconfig	[KNL]</div><div class='hunk'>@@ -476,12 +513,6 @@</div><div class='ctx'> </div><div class='ctx'> 			See Documentation/admin-guide/bootconfig.rst</div><div class='ctx'> </div><div class='del'>-	bert_disable	[ACPI]</div><div class='del'>-			Disable BERT OS support on buggy BIOSes.</div><div class='del'>-</div><div class='del'>-	bgrt_disable	[ACPI][X86]</div><div class='del'>-			Disable BGRT to avoid flickering OEM logo.</div><div class='del'>-</div><div class='ctx'> 	bttv.card=	[HW,V4L] bttv (bt848 + bt878 based grabber cards)</div><div class='ctx'> 	bttv.radio=	Most important insmod options are available as</div><div class='ctx'> 			kernel args too.</div><div class='hunk'>@@ -549,8 +580,9 @@</div><div class='ctx'> 			Format: &lt;string&gt;</div><div class='ctx'> 			nosocket -- Disable socket memory accounting.</div><div class='ctx'> 			nokmem -- Disable kernel memory accounting.</div><div class='add'>+			nobpf -- Disable BPF memory accounting.</div><div class='ctx'> </div><div class='del'>-	checkreqprot	[SELINUX] Set initial checkreqprot flag value.</div><div class='add'>+	checkreqprot=	[SELINUX] Set initial checkreqprot flag value.</div><div class='ctx'> 			Format: { "0" | "1" }</div><div class='ctx'> 			See security/selinux/Kconfig help text.</div><div class='ctx'> 			0 -- check protection applied by kernel (includes</div><div class='hunk'>@@ -563,6 +595,25 @@</div><div class='ctx'> </div><div class='ctx'> 	cio_ignore=	[S390]</div><div class='ctx'> 			See Documentation/s390/common_io.rst for details.</div><div class='add'>+</div><div class='add'>+	clearcpuid=X[,X...] [X86]</div><div class='add'>+			Disable CPUID feature X for the kernel. See</div><div class='add'>+			arch/x86/include/asm/cpufeatures.h for the valid bit</div><div class='add'>+			numbers X. Note the Linux-specific bits are not necessarily</div><div class='add'>+			stable over kernel options, but the vendor-specific</div><div class='add'>+			ones should be.</div><div class='add'>+			X can also be a string as appearing in the flags: line</div><div class='add'>+			in /proc/cpuinfo which does not have the above</div><div class='add'>+			instability issue. However, not all features have names</div><div class='add'>+			in /proc/cpuinfo.</div><div class='add'>+			Note that using this option will taint your kernel.</div><div class='add'>+			Also note that user programs calling CPUID directly</div><div class='add'>+			or using the feature without checking anything</div><div class='add'>+			will still see it. This just prevents it from</div><div class='add'>+			being used by the kernel or shown in /proc/cpuinfo.</div><div class='add'>+			Also note the kernel might malfunction if you disable</div><div class='add'>+			some critical bits.</div><div class='add'>+</div><div class='ctx'> 	clk_ignore_unused</div><div class='ctx'> 			[CLK]</div><div class='ctx'> 			Prevents the clock framework from automatically gating</div><div class='hunk'>@@ -631,19 +682,6 @@</div><div class='ctx'> 			Defaults to zero when built as a module and to</div><div class='ctx'> 			10 seconds when built into the kernel.</div><div class='ctx'> </div><div class='del'>-	clearcpuid=BITNUM[,BITNUM...] [X86]</div><div class='del'>-			Disable CPUID feature X for the kernel. See</div><div class='del'>-			arch/x86/include/asm/cpufeatures.h for the valid bit</div><div class='del'>-			numbers. Note the Linux specific bits are not necessarily</div><div class='del'>-			stable over kernel options, but the vendor specific</div><div class='del'>-			ones should be.</div><div class='del'>-			Also note that user programs calling CPUID directly</div><div class='del'>-			or using the feature without checking anything</div><div class='del'>-			will still see it. This just prevents it from</div><div class='del'>-			being used by the kernel or shown in /proc/cpuinfo.</div><div class='del'>-			Also note the kernel might malfunction if you disable</div><div class='del'>-			some critical bits.</div><div class='del'>-</div><div class='ctx'> 	cma=nn[MG]@[start[MG][-end[MG]]]</div><div class='ctx'> 			[KNL,CMA]</div><div class='ctx'> 			Sets the size of kernel global memory area for</div><div class='hunk'>@@ -658,7 +696,7 @@</div><div class='ctx'> 			Sets the size of kernel per-numa memory area for</div><div class='ctx'> 			contiguous memory allocations. A value of 0 disables</div><div class='ctx'> 			per-numa CMA altogether. And If this option is not</div><div class='del'>-			specificed, the default value is 0.</div><div class='add'>+			specified, the default value is 0.</div><div class='ctx'> 			With per-numa CMA enabled, DMA users on node nid will</div><div class='ctx'> 			first try to allocate buffer from the pernuma area</div><div class='ctx'> 			which is located in node nid, if the allocation fails,</div><div class='hunk'>@@ -689,6 +727,17 @@</div><div class='ctx'> 	condev=		[HW,S390] console device</div><div class='ctx'> 	conmode=</div><div class='ctx'> </div><div class='add'>+	con3215_drop=	[S390] 3215 console drop mode.</div><div class='add'>+			Format: y|n|Y|N|1|0</div><div class='add'>+			When set to true, drop data on the 3215 console when</div><div class='add'>+			the console buffer is full. In this case the</div><div class='add'>+			operator using a 3270 terminal emulator (for example</div><div class='add'>+			x3270) does not have to enter the clear key for the</div><div class='add'>+			console output to advance and the kernel to continue.</div><div class='add'>+			This leads to a much faster boot time when a 3270</div><div class='add'>+			terminal emulator is active. If no 3270 terminal</div><div class='add'>+			emulator is used, this parameter has no effect.</div><div class='add'>+</div><div class='ctx'> 	console=	[KNL] Output console device and options.</div><div class='ctx'> </div><div class='ctx'> 		tty&lt;n&gt;	Use the virtual console device &lt;n&gt;.</div><div class='hunk'>@@ -765,6 +814,24 @@</div><div class='ctx'> 			0: default value, disable debugging</div><div class='ctx'> 			1: enable debugging at boot time</div><div class='ctx'> </div><div class='add'>+	cpcihp_generic=	[HW,PCI] Generic port I/O CompactPCI driver</div><div class='add'>+			Format:</div><div class='add'>+			&lt;first_slot&gt;,&lt;last_slot&gt;,&lt;port&gt;,&lt;enum_bit&gt;[,&lt;debug&gt;]</div><div class='add'>+</div><div class='add'>+	cpu0_hotplug	[X86] Turn on CPU0 hotplug feature when</div><div class='add'>+			CONFIG_BOOTPARAM_HOTPLUG_CPU0 is off.</div><div class='add'>+			Some features depend on CPU0. Known dependencies are:</div><div class='add'>+			1. Resume from suspend/hibernate depends on CPU0.</div><div class='add'>+			Suspend/hibernate will fail if CPU0 is offline and you</div><div class='add'>+			need to online CPU0 before suspend/hibernate.</div><div class='add'>+			2. PIC interrupts also depend on CPU0. CPU0 can't be</div><div class='add'>+			removed if a PIC interrupt is detected.</div><div class='add'>+			It's said poweroff/reboot may depend on CPU0 on some</div><div class='add'>+			machines although I haven't seen such issues so far</div><div class='add'>+			after CPU0 is offline on a few tested machines.</div><div class='add'>+			If the dependencies are under your control, you can</div><div class='add'>+			turn on cpu0_hotplug.</div><div class='add'>+</div><div class='ctx'> 	cpuidle.off=1	[CPU_IDLE]</div><div class='ctx'> 			disable the cpuidle sub-system</div><div class='ctx'> </div><div class='hunk'>@@ -785,9 +852,13 @@</div><div class='ctx'> 			on every CPU online, such as boot, and resume from suspend.</div><div class='ctx'> 			Default: 10000</div><div class='ctx'> </div><div class='del'>-	cpcihp_generic=	[HW,PCI] Generic port I/O CompactPCI driver</div><div class='del'>-			Format:</div><div class='del'>-			&lt;first_slot&gt;,&lt;last_slot&gt;,&lt;port&gt;,&lt;enum_bit&gt;[,&lt;debug&gt;]</div><div class='add'>+	crash_kexec_post_notifiers</div><div class='add'>+			Run kdump after running panic-notifiers and dumping</div><div class='add'>+			kmsg. This only for the users who doubt kdump always</div><div class='add'>+			succeeds in any situation.</div><div class='add'>+			Note that this also increases risks of kdump failure,</div><div class='add'>+			because some panic notifiers can make the crashed</div><div class='add'>+			kernel more unstable.</div><div class='ctx'> </div><div class='ctx'> 	crashkernel=size[KMG][@offset[KMG]]</div><div class='ctx'> 			[KNL] Using kexec, Linux can switch to a 'crash kernel'</div><div class='hunk'>@@ -795,7 +866,7 @@</div><div class='ctx'> 			memory region [offset, offset + size] for that kernel</div><div class='ctx'> 			image. If '@offset' is omitted, then a suitable offset</div><div class='ctx'> 			is selected automatically.</div><div class='del'>-			[KNL, X86-64] Select a region under 4G first, and</div><div class='add'>+			[KNL, X86-64, ARM64] Select a region under 4G first, and</div><div class='ctx'> 			fall back to reserve region above 4G when '@offset'</div><div class='ctx'> 			hasn't been specified.</div><div class='ctx'> 			See Documentation/admin-guide/kdump/kdump.rst for further details.</div><div class='hunk'>@@ -808,22 +879,25 @@</div><div class='ctx'> 			Documentation/admin-guide/kdump/kdump.rst for an example.</div><div class='ctx'> </div><div class='ctx'> 	crashkernel=size[KMG],high</div><div class='del'>-			[KNL, X86-64] range could be above 4G. Allow kernel</div><div class='add'>+			[KNL, X86-64, ARM64] range could be above 4G. Allow kernel</div><div class='ctx'> 			to allocate physical memory region from top, so could</div><div class='ctx'> 			be above 4G if system have more than 4G ram installed.</div><div class='ctx'> 			Otherwise memory region will be allocated below 4G, if</div><div class='ctx'> 			available.</div><div class='ctx'> 			It will be ignored if crashkernel=X is specified.</div><div class='ctx'> 	crashkernel=size[KMG],low</div><div class='del'>-			[KNL, X86-64] range under 4G. When crashkernel=X,high</div><div class='add'>+			[KNL, X86-64, ARM64] range under 4G. When crashkernel=X,high</div><div class='ctx'> 			is passed, kernel could allocate physical memory region</div><div class='ctx'> 			above 4G, that cause second kernel crash on system</div><div class='ctx'> 			that require some amount of low memory, e.g. swiotlb</div><div class='ctx'> 			requires at least 64M+32K low memory, also enough extra</div><div class='ctx'> 			low memory is needed to make sure DMA buffers for 32-bit</div><div class='del'>-			devices won't run out. Kernel would try to allocate at</div><div class='del'>-			at least 256M below 4G automatically.</div><div class='del'>-			This one let user to specify own low range under 4G</div><div class='add'>+			devices won't run out. Kernel would try to allocate</div><div class='add'>+			default	size of memory below 4G automatically. The default</div><div class='add'>+			size is	platform dependent.</div><div class='add'>+			  --&gt; x86: max(swiotlb_size_or_default() + 8MiB, 256MiB)</div><div class='add'>+			  --&gt; arm64: 128MiB</div><div class='add'>+			This one lets the user specify own low range under 4G</div><div class='ctx'> 			for second kernel instead.</div><div class='ctx'> 			0: to disable low allocation.</div><div class='ctx'> 			It will be ignored when crashkernel=X,high is not used</div><div class='hunk'>@@ -838,15 +912,14 @@</div><div class='ctx'> 	cs89x0_media=	[HW,NET]</div><div class='ctx'> 			Format: { rj45 | aui | bnc }</div><div class='ctx'> </div><div class='del'>-	csdlock_debug=	[KNL] Enable debug add-ons of cross-CPU function call</div><div class='del'>-			handling. When switched on, additional debug data is</div><div class='del'>-			printed to the console in case a hanging CPU is</div><div class='del'>-			detected, and that CPU is pinged again in order to try</div><div class='del'>-			to resolve the hang situation.</div><div class='del'>-			0: disable csdlock debugging (default)</div><div class='del'>-			1: enable basic csdlock debugging (minor impact)</div><div class='del'>-			ext: enable extended csdlock debugging (more impact,</div><div class='del'>-			     but more data)</div><div class='add'>+	csdlock_debug=	[KNL] Enable or disable debug add-ons of cross-CPU</div><div class='add'>+			function call handling. When switched on,</div><div class='add'>+			additional debug data is printed to the console</div><div class='add'>+			in case a hanging CPU is detected, and that</div><div class='add'>+			CPU is pinged again in order to try to resolve</div><div class='add'>+			the hang situation.  The default value of this</div><div class='add'>+			option depends on the CSD_LOCK_WAIT_DEBUG_DEFAULT</div><div class='add'>+			Kconfig option.</div><div class='ctx'> </div><div class='ctx'> 	dasd=		[HW,NET]</div><div class='ctx'> 			See header of drivers/s390/block/dasd_devmap.c.</div><div class='hunk'>@@ -878,9 +951,6 @@</div><div class='ctx'> </div><div class='ctx'> 	debug_objects	[KNL] Enable object debugging</div><div class='ctx'> </div><div class='del'>-	no_debug_objects</div><div class='del'>-			[KNL] Disable object debugging</div><div class='del'>-</div><div class='ctx'> 	debug_guardpage_minorder=</div><div class='ctx'> 			[KNL] When CONFIG_DEBUG_PAGEALLOC is set, this</div><div class='ctx'> 			parameter allows control of the order of pages that will</div><div class='hunk'>@@ -894,7 +964,7 @@</div><div class='ctx'> 			driver code when a CPU writes to (or reads from) a</div><div class='ctx'> 			random memory location. Note that there exists a class</div><div class='ctx'> 			of memory corruptions problems caused by buggy H/W or</div><div class='del'>-			F/W or by drivers badly programing DMA (basically when</div><div class='add'>+			F/W or by drivers badly programming DMA (basically when</div><div class='ctx'> 			memory is written at bus level and the CPU MMU is</div><div class='ctx'> 			bypassed) which are not detectable by</div><div class='ctx'> 			CONFIG_DEBUG_PAGEALLOC, hence this option will not help</div><div class='hunk'>@@ -926,10 +996,6 @@</div><div class='ctx'> </div><div class='ctx'> 	debugpat	[X86] Enable PAT debugging</div><div class='ctx'> </div><div class='del'>-	decnet.addr=	[HW,NET]</div><div class='del'>-			Format: &lt;area&gt;[,&lt;node&gt;]</div><div class='del'>-			See also Documentation/networking/decnet.rst.</div><div class='del'>-</div><div class='ctx'> 	default_hugepagesz=</div><div class='ctx'> 			[HW] The size of the default HugeTLB page. This is</div><div class='ctx'> 			the size represented by the legacy /proc/ hugepages</div><div class='hunk'>@@ -945,11 +1011,15 @@</div><div class='ctx'> 			[KNL] Debugging option to set a timeout in seconds for</div><div class='ctx'> 			deferred probe to give up waiting on dependencies to</div><div class='ctx'> 			probe. Only specific dependencies (subsystems or</div><div class='del'>-			drivers) that have opted in will be ignored. A timeout of 0</div><div class='del'>-			will timeout at the end of initcalls. This option will also</div><div class='add'>+			drivers) that have opted in will be ignored. A timeout</div><div class='add'>+			of 0 will timeout at the end of initcalls. If the time</div><div class='add'>+			out hasn't expired, it'll be restarted by each</div><div class='add'>+			successful driver registration. This option will also</div><div class='ctx'> 			dump out devices still on the deferred probe list after</div><div class='ctx'> 			retrying.</div><div class='ctx'> </div><div class='add'>+	delayacct	[KNL] Enable per-task delay accounting</div><div class='add'>+</div><div class='ctx'> 	dell_smm_hwmon.ignore_dmi=</div><div class='ctx'> 			[HW] Continue probing hardware even if DMI data</div><div class='ctx'> 			indicates that the driver is running on unsupported</div><div class='hunk'>@@ -995,32 +1065,12 @@</div><div class='ctx'> 			can be useful when debugging issues that require an SLB</div><div class='ctx'> 			miss to occur.</div><div class='ctx'> </div><div class='del'>-	stress_slb	[PPC]</div><div class='del'>-			Limits the number of kernel SLB entries, and flushes</div><div class='del'>-			them frequently to increase the rate of SLB faults</div><div class='del'>-			on kernel addresses.</div><div class='del'>-</div><div class='ctx'> 	disable=	[IPV6]</div><div class='ctx'> 			See Documentation/networking/ipv6.rst.</div><div class='ctx'> </div><div class='del'>-	hardened_usercopy=</div><div class='del'>-                        [KNL] Under CONFIG_HARDENED_USERCOPY, whether</div><div class='del'>-                        hardening is enabled for this boot. Hardened</div><div class='del'>-                        usercopy checking is used to protect the kernel</div><div class='del'>-                        from reading or writing beyond known memory</div><div class='del'>-                        allocation boundaries as a proactive defense</div><div class='del'>-                        against bounds-checking flaws in the kernel's</div><div class='del'>-                        copy_to_user()/copy_from_user() interface.</div><div class='del'>-                on      Perform hardened usercopy checks (default).</div><div class='del'>-                off     Disable hardened usercopy checks.</div><div class='del'>-</div><div class='ctx'> 	disable_radix	[PPC]</div><div class='ctx'> 			Disable RADIX MMU mode on POWER9</div><div class='ctx'> </div><div class='del'>-	radix_hcall_invalidate=on  [PPC/PSERIES]</div><div class='del'>-			Disable RADIX GTSE feature and use hcall for TLB</div><div class='del'>-			invalidate.</div><div class='del'>-</div><div class='ctx'> 	disable_tlbie	[PPC]</div><div class='ctx'> 			Disable TLBIE instruction. Currently does not work</div><div class='ctx'> 			with KVM, with HASH MMU, or with coherent accelerators.</div><div class='hunk'>@@ -1076,7 +1126,10 @@</div><div class='ctx'> 			driver later using sysfs.</div><div class='ctx'> </div><div class='ctx'> 	driver_async_probe=  [KNL]</div><div class='del'>-			List of driver names to be probed asynchronously.</div><div class='add'>+			List of driver names to be probed asynchronously. *</div><div class='add'>+			matches with all driver names. If * is specified, the</div><div class='add'>+			rest of the listed driver names are those that will NOT</div><div class='add'>+			match the *.</div><div class='ctx'> 			Format: &lt;driver_name1&gt;,&lt;driver_name2&gt;...</div><div class='ctx'> </div><div class='ctx'> 	drm.edid_firmware=[&lt;connector&gt;:]&lt;file&gt;[,[&lt;connector&gt;:]&lt;file&gt;]</div><div class='hunk'>@@ -1119,12 +1172,6 @@</div><div class='ctx'> 			Documentation/admin-guide/dynamic-debug-howto.rst</div><div class='ctx'> 			for details.</div><div class='ctx'> </div><div class='del'>-	nopku		[X86] Disable Memory Protection Keys CPU feature found</div><div class='del'>-			in some Intel CPUs.</div><div class='del'>-</div><div class='del'>-	&lt;module&gt;.async_probe [KNL]</div><div class='del'>-			Enable asynchronous probe on this module.</div><div class='del'>-</div><div class='ctx'> 	early_ioremap_debug [KNL]</div><div class='ctx'> 			Enable debug messages in early_ioremap support. This</div><div class='ctx'> 			is useful for tracking down temporary early mappings</div><div class='hunk'>@@ -1144,10 +1191,10 @@</div><div class='ctx'> 			specified, the serial port must already be setup and</div><div class='ctx'> 			configured.</div><div class='ctx'> </div><div class='del'>-		uart[8250],io,&lt;addr&gt;[,options]</div><div class='del'>-		uart[8250],mmio,&lt;addr&gt;[,options]</div><div class='del'>-		uart[8250],mmio32,&lt;addr&gt;[,options]</div><div class='del'>-		uart[8250],mmio32be,&lt;addr&gt;[,options]</div><div class='add'>+		uart[8250],io,&lt;addr&gt;[,options[,uartclk]]</div><div class='add'>+		uart[8250],mmio,&lt;addr&gt;[,options[,uartclk]]</div><div class='add'>+		uart[8250],mmio32,&lt;addr&gt;[,options[,uartclk]]</div><div class='add'>+		uart[8250],mmio32be,&lt;addr&gt;[,options[,uartclk]]</div><div class='ctx'> 		uart[8250],0x&lt;addr&gt;[,options]</div><div class='ctx'> 			Start an early, polled-mode console on the 8250/16550</div><div class='ctx'> 			UART at the specified I/O port or MMIO address.</div><div class='hunk'>@@ -1156,7 +1203,9 @@</div><div class='ctx'> 			If none of [io|mmio|mmio32|mmio32be], &lt;addr&gt; is assumed</div><div class='ctx'> 			to be equivalent to 'mmio'. 'options' are specified</div><div class='ctx'> 			in the same format described for "console=ttyS&lt;n&gt;"; if</div><div class='del'>-			unspecified, the h/w is not initialized.</div><div class='add'>+			unspecified, the h/w is not initialized. 'uartclk' is</div><div class='add'>+			the uart clock frequency; if unspecified, it is set</div><div class='add'>+			to 'BASE_BAUD' * 16.</div><div class='ctx'> </div><div class='ctx'> 		pl011,&lt;addr&gt;</div><div class='ctx'> 		pl011,mmio32,&lt;addr&gt;</div><div class='hunk'>@@ -1282,7 +1331,7 @@</div><div class='ctx'> 			Append ",keep" to not disable it when the real console</div><div class='ctx'> 			takes over.</div><div class='ctx'> </div><div class='del'>-			Only one of vga, efi, serial, or usb debug port can</div><div class='add'>+			Only one of vga, serial, or usb debug port can</div><div class='ctx'> 			be used at a time.</div><div class='ctx'> </div><div class='ctx'> 			Currently only ttyS0 and ttyS1 may be specified by</div><div class='hunk'>@@ -1297,7 +1346,7 @@</div><div class='ctx'> 			Interaction with the standard serial driver is not</div><div class='ctx'> 			very good.</div><div class='ctx'> </div><div class='del'>-			The VGA and EFI output is eventually overwritten by</div><div class='add'>+			The VGA output is eventually overwritten by</div><div class='ctx'> 			the real console.</div><div class='ctx'> </div><div class='ctx'> 			The xen option can only be used in Xen domains.</div><div class='hunk'>@@ -1316,17 +1365,6 @@</div><div class='ctx'> 			force: enforce the use of EDAC to report H/W event.</div><div class='ctx'> 			default: on.</div><div class='ctx'> </div><div class='del'>-	ekgdboc=	[X86,KGDB] Allow early kernel console debugging</div><div class='del'>-			ekgdboc=kbd</div><div class='del'>-</div><div class='del'>-			This is designed to be used in conjunction with</div><div class='del'>-			the boot argument: earlyprintk=vga</div><div class='del'>-</div><div class='del'>-			This parameter works in place of the kgdboc parameter</div><div class='del'>-			but can only be used if the backing tty is available</div><div class='del'>-			very early in the boot process. For early debugging</div><div class='del'>-			via a serial port see kgdboc_earlycon instead.</div><div class='del'>-</div><div class='ctx'> 	edd=		[EDD]</div><div class='ctx'> 			Format: {"off" | "on" | "skip[mbr]"}</div><div class='ctx'> </div><div class='hunk'>@@ -1388,6 +1426,17 @@</div><div class='ctx'> 	eisa_irq_edge=	[PARISC,HW]</div><div class='ctx'> 			See header of drivers/parisc/eisa.c.</div><div class='ctx'> </div><div class='add'>+	ekgdboc=	[X86,KGDB] Allow early kernel console debugging</div><div class='add'>+			Format: ekgdboc=kbd</div><div class='add'>+</div><div class='add'>+			This is designed to be used in conjunction with</div><div class='add'>+			the boot argument: earlyprintk=vga</div><div class='add'>+</div><div class='add'>+			This parameter works in place of the kgdboc parameter</div><div class='add'>+			but can only be used if the backing tty is available</div><div class='add'>+			very early in the boot process. For early debugging</div><div class='add'>+			via a serial port see kgdboc_earlycon instead.</div><div class='add'>+</div><div class='ctx'> 	elanfreq=	[X86-32]</div><div class='ctx'> 			See comment before function elanfreq_setup() in</div><div class='ctx'> 			arch/x86/kernel/cpu/cpufreq/elanfreq.c.</div><div class='hunk'>@@ -1409,7 +1458,7 @@</div><div class='ctx'> 			(in particular on some ATI chipsets).</div><div class='ctx'> 			The kernel tries to set a reasonable default.</div><div class='ctx'> </div><div class='del'>-	enforcing	[SELINUX] Set initial enforcing status.</div><div class='add'>+	enforcing=	[SELINUX] Set initial enforcing status.</div><div class='ctx'> 			Format: {"0" | "1"}</div><div class='ctx'> 			See security/selinux/Kconfig help text.</div><div class='ctx'> 			0 -- permissive (log only, no denials).</div><div class='hunk'>@@ -1431,6 +1480,14 @@</div><div class='ctx'> 			Permit 'security.evm' to be updated regardless of</div><div class='ctx'> 			current integrity status.</div><div class='ctx'> </div><div class='add'>+	early_page_ext [KNL] Enforces page_ext initialization to earlier</div><div class='add'>+			stages so cover more early boot allocations.</div><div class='add'>+			Please note that as side effect some optimizations</div><div class='add'>+			might be disabled to achieve that (e.g. parallelized</div><div class='add'>+			memory initialization is disabled) so the boot process</div><div class='add'>+			might take longer, especially on systems with a lot of</div><div class='add'>+			memory. Available with CONFIG_PAGE_EXTENSION=y.</div><div class='add'>+</div><div class='ctx'> 	failslab=</div><div class='ctx'> 	fail_usercopy=</div><div class='ctx'> 	fail_page_alloc=</div><div class='hunk'>@@ -1473,6 +1530,15 @@</div><div class='ctx'> 			boot up that is likely to be overridden by user space</div><div class='ctx'> 			start up functionality.</div><div class='ctx'> </div><div class='add'>+			Optionally, the snapshot can also be defined for a tracing</div><div class='add'>+			instance that was created by the trace_instance= command</div><div class='add'>+			line parameter.</div><div class='add'>+</div><div class='add'>+			trace_instance=foo,sched_switch ftrace_boot_snapshot=foo</div><div class='add'>+</div><div class='add'>+			The above will cause the "foo" tracing instance to trigger</div><div class='add'>+			a snapshot at the end of boot up.</div><div class='add'>+</div><div class='ctx'> 	ftrace_dump_on_oops[=orig_cpu]</div><div class='ctx'> 			[FTRACE] will dump the trace buffers on oops.</div><div class='ctx'> 			If no parameter is passed, ftrace will dump</div><div class='hunk'>@@ -1535,6 +1601,20 @@</div><div class='ctx'> 			dependencies. This only applies for fw_devlink=on|rpm.</div><div class='ctx'> 			Format: &lt;bool&gt;</div><div class='ctx'> </div><div class='add'>+	fw_devlink.sync_state =</div><div class='add'>+			[KNL] When all devices that could probe have finished</div><div class='add'>+			probing, this parameter controls what to do with</div><div class='add'>+			devices that haven't yet received their sync_state()</div><div class='add'>+			calls.</div><div class='add'>+			Format: { strict | timeout }</div><div class='add'>+			strict -- Default. Continue waiting on consumers to</div><div class='add'>+				probe successfully.</div><div class='add'>+			timeout -- Give up waiting on consumers and call</div><div class='add'>+				sync_state() on any devices that haven't yet</div><div class='add'>+				received their sync_state() calls after</div><div class='add'>+				deferred_probe_timeout has expired or by</div><div class='add'>+				late_initcall() if !CONFIG_MODULES.</div><div class='add'>+</div><div class='ctx'> 	gamecon.map[2|3]=</div><div class='ctx'> 			[HW,JOY] Multisystem joystick and NES/SNES/PSX pad</div><div class='ctx'> 			support via parallel port (up to 5 devices per port)</div><div class='hunk'>@@ -1586,6 +1666,17 @@</div><div class='ctx'> 			Format: &lt;unsigned int&gt; such that (rxsize &amp; ~0x1fffc0) == 0.</div><div class='ctx'> 			Default: 1024</div><div class='ctx'> </div><div class='add'>+	hardened_usercopy=</div><div class='add'>+			[KNL] Under CONFIG_HARDENED_USERCOPY, whether</div><div class='add'>+			hardening is enabled for this boot. Hardened</div><div class='add'>+			usercopy checking is used to protect the kernel</div><div class='add'>+			from reading or writing beyond known memory</div><div class='add'>+			allocation boundaries as a proactive defense</div><div class='add'>+			against bounds-checking flaws in the kernel's</div><div class='add'>+			copy_to_user()/copy_from_user() interface.</div><div class='add'>+		on	Perform hardened usercopy checks (default).</div><div class='add'>+		off	Disable hardened usercopy checks.</div><div class='add'>+</div><div class='ctx'> 	hardlockup_all_cpu_backtrace=</div><div class='ctx'> 			[KNL] Should the hard-lockup detector generate</div><div class='ctx'> 			backtraces on all cpus.</div><div class='hunk'>@@ -1606,6 +1697,15 @@</div><div class='ctx'> 			corresponding firmware-first mode error processing</div><div class='ctx'> 			logic will be disabled.</div><div class='ctx'> </div><div class='add'>+	hibernate=	[HIBERNATION]</div><div class='add'>+		noresume	Don't check if there's a hibernation image</div><div class='add'>+				present during boot.</div><div class='add'>+		nocompress	Don't compress/decompress hibernation images.</div><div class='add'>+		no		Disable hibernation and resume.</div><div class='add'>+		protect_image	Turn on image protection during restoration</div><div class='add'>+				(that will set all pages holding image data</div><div class='add'>+				during restoration read-only).</div><div class='add'>+</div><div class='ctx'> 	highmem=nn[KMG]	[KNL,BOOT] forces the highmem zone to have an exact</div><div class='ctx'> 			size of &lt;nn&gt;. This works even on boxes that have no</div><div class='ctx'> 			highmem otherwise. This also works to reduce highmem</div><div class='hunk'>@@ -1617,6 +1717,19 @@</div><div class='ctx'> </div><div class='ctx'> 	hlt		[BUGS=ARM,SH]</div><div class='ctx'> </div><div class='add'>+	hostname=	[KNL] Set the hostname (aka UTS nodename).</div><div class='add'>+			Format: &lt;string&gt;</div><div class='add'>+			This allows setting the system's hostname during early</div><div class='add'>+			startup. This sets the name returned by gethostname.</div><div class='add'>+			Using this parameter to set the hostname makes it</div><div class='add'>+			possible to ensure the hostname is correctly set before</div><div class='add'>+			any userspace processes run, avoiding the possibility</div><div class='add'>+			that a process may call gethostname before the hostname</div><div class='add'>+			has been explicitly set, resulting in the calling</div><div class='add'>+			process getting an incorrect result. The string must</div><div class='add'>+			not exceed the maximum allowed hostname length (usually</div><div class='add'>+			64 characters) and will be truncated otherwise.</div><div class='add'>+</div><div class='ctx'> 	hpet=		[X86-32,HPET] option to control HPET usage</div><div class='ctx'> 			Format: { enable (default) | disable | force |</div><div class='ctx'> 				verbose }</div><div class='hunk'>@@ -1628,16 +1741,6 @@</div><div class='ctx'> 	hpet_mmap=	[X86, HPET_MMAP] Allow userspace to mmap HPET</div><div class='ctx'> 			registers.  Default set by CONFIG_HPET_MMAP_DEFAULT.</div><div class='ctx'> </div><div class='del'>-	hugetlb_cma=	[HW,CMA] The size of a CMA area used for allocation</div><div class='del'>-			of gigantic hugepages. Or using node format, the size</div><div class='del'>-			of a CMA area per node can be specified.</div><div class='del'>-			Format: nn[KMGTPE] or (node format)</div><div class='del'>-				&lt;node&gt;:nn[KMGTPE][,&lt;node&gt;:nn[KMGTPE]]</div><div class='del'>-</div><div class='del'>-			Reserve a CMA area of given size and allocate gigantic</div><div class='del'>-			hugepages using the CMA allocator. If enabled, the</div><div class='del'>-			boot-time allocation of gigantic hugepages is skipped.</div><div class='del'>-</div><div class='ctx'> 	hugepages=	[HW] Number of HugeTLB pages to allocate at boot.</div><div class='ctx'> 			If this follows hugepagesz (below), it specifies</div><div class='ctx'> 			the number of pages of hugepagesz to be allocated.</div><div class='hunk'>@@ -1659,22 +1762,35 @@</div><div class='ctx'> 			Documentation/admin-guide/mm/hugetlbpage.rst.</div><div class='ctx'> 			Format: size[KMG]</div><div class='ctx'> </div><div class='add'>+	hugetlb_cma=	[HW,CMA] The size of a CMA area used for allocation</div><div class='add'>+			of gigantic hugepages. Or using node format, the size</div><div class='add'>+			of a CMA area per node can be specified.</div><div class='add'>+			Format: nn[KMGTPE] or (node format)</div><div class='add'>+				&lt;node&gt;:nn[KMGTPE][,&lt;node&gt;:nn[KMGTPE]]</div><div class='add'>+</div><div class='add'>+			Reserve a CMA area of given size and allocate gigantic</div><div class='add'>+			hugepages using the CMA allocator. If enabled, the</div><div class='add'>+			boot-time allocation of gigantic hugepages is skipped.</div><div class='add'>+</div><div class='ctx'> 	hugetlb_free_vmemmap=</div><div class='del'>-			[KNL] Reguires CONFIG_HUGETLB_PAGE_FREE_VMEMMAP</div><div class='add'>+			[KNL] Requires CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP</div><div class='ctx'> 			enabled.</div><div class='add'>+			Control if HugeTLB Vmemmap Optimization (HVO) is enabled.</div><div class='ctx'> 			Allows heavy hugetlb users to free up some more</div><div class='ctx'> 			memory (7 * PAGE_SIZE for each 2MB hugetlb page).</div><div class='ctx'> 			Format: { on | off (default) }</div><div class='ctx'> </div><div class='del'>-			on:  enable the feature</div><div class='del'>-			off: disable the feature</div><div class='add'>+			on: enable HVO</div><div class='add'>+			off: disable HVO</div><div class='ctx'> </div><div class='del'>-			Built with CONFIG_HUGETLB_PAGE_FREE_VMEMMAP_DEFAULT_ON=y,</div><div class='add'>+			Built with CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP_DEFAULT_ON=y,</div><div class='ctx'> 			the default is on.</div><div class='ctx'> </div><div class='del'>-			This is not compatible with memory_hotplug.memmap_on_memory.</div><div class='del'>-			If both parameters are enabled, hugetlb_free_vmemmap takes</div><div class='del'>-			precedence over memory_hotplug.memmap_on_memory.</div><div class='add'>+			Note that the vmemmap pages may be allocated from the added</div><div class='add'>+			memory block itself when memory_hotplug.memmap_on_memory is</div><div class='add'>+			enabled, those vmemmap pages cannot be optimized even if this</div><div class='add'>+			feature is enabled.  Other vmemmap pages not allocated from</div><div class='add'>+			the added memory block itself do not be affected.</div><div class='ctx'> </div><div class='ctx'> 	hung_task_panic=</div><div class='ctx'> 			[KNL] Should the hung task detector generate panics.</div><div class='hunk'>@@ -1696,12 +1812,6 @@</div><div class='ctx'> 				      which allow the hypervisor to 'idle' the</div><div class='ctx'> 				      guest on lock contention.</div><div class='ctx'> </div><div class='del'>-	keep_bootcon	[KNL]</div><div class='del'>-			Do not unregister boot console at start. This is only</div><div class='del'>-			useful for debugging when something happens in the window</div><div class='del'>-			between unregistering the boot console and initializing</div><div class='del'>-			the real console.</div><div class='del'>-</div><div class='ctx'> 	i2c_bus=	[HW]	Override the default board specific I2C bus speed</div><div class='ctx'> 				or register an additional I2C bus that is not</div><div class='ctx'> 				registered from board initialization code.</div><div class='hunk'>@@ -1758,26 +1868,6 @@</div><div class='ctx'> 	icn=		[HW,ISDN]</div><div class='ctx'> 			Format: &lt;io&gt;[,&lt;membase&gt;[,&lt;icn_id&gt;[,&lt;icn_id2&gt;]]]</div><div class='ctx'> </div><div class='del'>-	ide-core.nodma=	[HW] (E)IDE subsystem</div><div class='del'>-			Format: =0.0 to prevent dma on hda, =0.1 hdb =1.0 hdc</div><div class='del'>-			.vlb_clock .pci_clock .noflush .nohpa .noprobe .nowerr</div><div class='del'>-			.cdrom .chs .ignore_cable are additional options</div><div class='del'>-			See Documentation/ide/ide.rst.</div><div class='del'>-</div><div class='del'>-	ide-generic.probe-mask= [HW] (E)IDE subsystem</div><div class='del'>-			Format: &lt;int&gt;</div><div class='del'>-			Probe mask for legacy ISA IDE ports.  Depending on</div><div class='del'>-			platform up to 6 ports are supported, enabled by</div><div class='del'>-			setting corresponding bits in the mask to 1.  The</div><div class='del'>-			default value is 0x0, which has a special meaning.</div><div class='del'>-			On systems that have PCI, it triggers scanning the</div><div class='del'>-			PCI bus for the first and the second port, which</div><div class='del'>-			are then probed.  On systems without PCI the value</div><div class='del'>-			of 0x0 enables probing the two first ports as if it</div><div class='del'>-			was 0x3.</div><div class='del'>-</div><div class='del'>-	ide-pci-generic.all-generic-ide [HW] (E)IDE subsystem</div><div class='del'>-			Claim all unknown PCI IDE storage controllers.</div><div class='ctx'> </div><div class='ctx'> 	idle=		[X86]</div><div class='ctx'> 			Format: idle=poll, idle=halt, idle=nomwait</div><div class='hunk'>@@ -1903,7 +1993,8 @@</div><div class='ctx'> </div><div class='ctx'> 	ima_template=	[IMA]</div><div class='ctx'> 			Select one of defined IMA measurements template formats.</div><div class='del'>-			Formats: { "ima" | "ima-ng" | "ima-sig" }</div><div class='add'>+			Formats: { "ima" | "ima-ng" | "ima-ngv2" | "ima-sig" |</div><div class='add'>+				   "ima-sigv2" }</div><div class='ctx'> 			Default: "ima-ng"</div><div class='ctx'> </div><div class='ctx'> 	ima_template_fmt=</div><div class='hunk'>@@ -2235,39 +2326,73 @@</div><div class='ctx'> </div><div class='ctx'> 	ivrs_ioapic	[HW,X86-64]</div><div class='ctx'> 			Provide an override to the IOAPIC-ID&lt;-&gt;DEVICE-ID</div><div class='del'>-			mapping provided in the IVRS ACPI table. For</div><div class='del'>-			example, to map IOAPIC-ID decimal 10 to</div><div class='del'>-			PCI device 00:14.0 write the parameter as:</div><div class='add'>+			mapping provided in the IVRS ACPI table.</div><div class='add'>+			By default, PCI segment is 0, and can be omitted.</div><div class='add'>+</div><div class='add'>+			For example, to map IOAPIC-ID decimal 10 to</div><div class='add'>+			PCI segment 0x1 and PCI device 00:14.0,</div><div class='add'>+			write the parameter as:</div><div class='add'>+				ivrs_ioapic=10@0001:00:14.0</div><div class='add'>+</div><div class='add'>+			Deprecated formats:</div><div class='add'>+			* To map IOAPIC-ID decimal 10 to PCI device 00:14.0</div><div class='add'>+			  write the parameter as:</div><div class='ctx'> 				ivrs_ioapic[10]=00:14.0</div><div class='add'>+			* To map IOAPIC-ID decimal 10 to PCI segment 0x1 and</div><div class='add'>+			  PCI device 00:14.0 write the parameter as:</div><div class='add'>+				ivrs_ioapic[10]=0001:00:14.0</div><div class='ctx'> </div><div class='ctx'> 	ivrs_hpet	[HW,X86-64]</div><div class='ctx'> 			Provide an override to the HPET-ID&lt;-&gt;DEVICE-ID</div><div class='del'>-			mapping provided in the IVRS ACPI table. For</div><div class='del'>-			example, to map HPET-ID decimal 0 to</div><div class='del'>-			PCI device 00:14.0 write the parameter as:</div><div class='add'>+			mapping provided in the IVRS ACPI table.</div><div class='add'>+			By default, PCI segment is 0, and can be omitted.</div><div class='add'>+</div><div class='add'>+			For example, to map HPET-ID decimal 10 to</div><div class='add'>+			PCI segment 0x1 and PCI device 00:14.0,</div><div class='add'>+			write the parameter as:</div><div class='add'>+				ivrs_hpet=10@0001:00:14.0</div><div class='add'>+</div><div class='add'>+			Deprecated formats:</div><div class='add'>+			* To map HPET-ID decimal 0 to PCI device 00:14.0</div><div class='add'>+			  write the parameter as:</div><div class='ctx'> 				ivrs_hpet[0]=00:14.0</div><div class='add'>+			* To map HPET-ID decimal 10 to PCI segment 0x1 and</div><div class='add'>+			  PCI device 00:14.0 write the parameter as:</div><div class='add'>+				ivrs_ioapic[10]=0001:00:14.0</div><div class='ctx'> </div><div class='ctx'> 	ivrs_acpihid	[HW,X86-64]</div><div class='ctx'> 			Provide an override to the ACPI-HID:UID&lt;-&gt;DEVICE-ID</div><div class='del'>-			mapping provided in the IVRS ACPI table. For</div><div class='del'>-			example, to map UART-HID:UID AMD0020:0 to</div><div class='del'>-			PCI device 00:14.5 write the parameter as:</div><div class='add'>+			mapping provided in the IVRS ACPI table.</div><div class='add'>+			By default, PCI segment is 0, and can be omitted.</div><div class='add'>+</div><div class='add'>+			For example, to map UART-HID:UID AMD0020:0 to</div><div class='add'>+			PCI segment 0x1 and PCI device ID 00:14.5,</div><div class='add'>+			write the parameter as:</div><div class='add'>+				ivrs_acpihid=AMD0020:0@0001:00:14.5</div><div class='add'>+</div><div class='add'>+			Deprecated formats:</div><div class='add'>+			* To map UART-HID:UID AMD0020:0 to PCI segment is 0,</div><div class='add'>+			  PCI device ID 00:14.5, write the parameter as:</div><div class='ctx'> 				ivrs_acpihid[00:14.5]=AMD0020:0</div><div class='add'>+			* To map UART-HID:UID AMD0020:0 to PCI segment 0x1 and</div><div class='add'>+			  PCI device ID 00:14.5, write the parameter as:</div><div class='add'>+				ivrs_acpihid[0001:00:14.5]=AMD0020:0</div><div class='ctx'> </div><div class='ctx'> 	js=		[HW,JOY] Analog joystick</div><div class='ctx'> 			See Documentation/input/joydev/joystick.rst.</div><div class='ctx'> </div><div class='del'>-	nokaslr		[KNL]</div><div class='del'>-			When CONFIG_RANDOMIZE_BASE is set, this disables</div><div class='del'>-			kernel and module base offset ASLR (Address Space</div><div class='del'>-			Layout Randomization).</div><div class='del'>-</div><div class='ctx'> 	kasan_multi_shot</div><div class='ctx'> 			[KNL] Enforce KASAN (Kernel Address Sanitizer) to print</div><div class='ctx'> 			report on every invalid memory access. Without this</div><div class='ctx'> 			parameter KASAN will print report only for the first</div><div class='ctx'> 			invalid access.</div><div class='ctx'> </div><div class='add'>+	keep_bootcon	[KNL]</div><div class='add'>+			Do not unregister boot console at start. This is only</div><div class='add'>+			useful for debugging when something happens in the window</div><div class='add'>+			between unregistering the boot console and initializing</div><div class='add'>+			the real console.</div><div class='add'>+</div><div class='ctx'> 	keepinitrd	[HW,ARM]</div><div class='ctx'> </div><div class='ctx'> 	kernelcore=	[KNL,X86,IA-64,PPC]</div><div class='hunk'>@@ -2363,6 +2488,12 @@</div><div class='ctx'> 			0: force disabled</div><div class='ctx'> 			1: force enabled</div><div class='ctx'> </div><div class='add'>+	kunit.enable=	[KUNIT] Enable executing KUnit tests. Requires</div><div class='add'>+			CONFIG_KUNIT to be set to be fully enabled. The</div><div class='add'>+			default value can be overridden via</div><div class='add'>+			KUNIT_DEFAULT_ENABLED.</div><div class='add'>+			Default is 1 (enabled)</div><div class='add'>+</div><div class='ctx'> 	kvm.ignore_msrs=[KVM] Ignore guest accesses to unhandled MSRs.</div><div class='ctx'> 			Default is 0 (don't ignore, but inject #GP)</div><div class='ctx'> </div><div class='hunk'>@@ -2387,8 +2518,7 @@</div><div class='ctx'> 			the KVM_CLEAR_DIRTY ioctl, and only for the pages being</div><div class='ctx'> 			cleared.</div><div class='ctx'> </div><div class='del'>-			Eager page splitting currently only supports splitting</div><div class='del'>-			huge pages mapped by the TDP MMU.</div><div class='add'>+			Eager page splitting is only supported when kvm.tdp_mmu=Y.</div><div class='ctx'> </div><div class='ctx'> 			Default is Y (on).</div><div class='ctx'> </div><div class='hunk'>@@ -2438,11 +2568,15 @@</div><div class='ctx'> </div><div class='ctx'> 			protected: nVHE-based mode with support for guests whose</div><div class='ctx'> 				   state is kept private from the host.</div><div class='del'>-				   Not valid if the kernel is running in EL2.</div><div class='add'>+</div><div class='add'>+			nested: VHE-based mode with support for nested</div><div class='add'>+				virtualization. Requires at least ARMv8.3</div><div class='add'>+				hardware.</div><div class='ctx'> </div><div class='ctx'> 			Defaults to VHE/nVHE based on hardware support. Setting</div><div class='ctx'> 			mode to "protected" will disable kexec and hibernation</div><div class='del'>-			for the host.</div><div class='add'>+			for the host. "nested" is experimental and should be</div><div class='add'>+			used with extreme caution.</div><div class='ctx'> </div><div class='ctx'> 	kvm-arm.vgic_v3_group0_trap=</div><div class='ctx'> 			[KVM,ARM] Trap guest accesses to GICv3 group-0</div><div class='hunk'>@@ -2622,14 +2756,14 @@</div><div class='ctx'> 			when set.</div><div class='ctx'> 			Format: &lt;int&gt;</div><div class='ctx'> </div><div class='del'>-	libata.force=	[LIBATA] Force configurations.  The format is comma-</div><div class='del'>-			separated list of "[ID:]VAL" where ID is</div><div class='del'>-			PORT[.DEVICE].  PORT and DEVICE are decimal numbers</div><div class='del'>-			matching port, link or device.  Basically, it matches</div><div class='del'>-			the ATA ID string printed on console by libata.  If</div><div class='del'>-			the whole ID part is omitted, the last PORT and DEVICE</div><div class='del'>-			values are used.  If ID hasn't been specified yet, the</div><div class='del'>-			configuration applies to all ports, links and devices.</div><div class='add'>+	libata.force=	[LIBATA] Force configurations.  The format is a comma-</div><div class='add'>+			separated list of "[ID:]VAL" where ID is PORT[.DEVICE].</div><div class='add'>+			PORT and DEVICE are decimal numbers matching port, link</div><div class='add'>+			or device.  Basically, it matches the ATA ID string</div><div class='add'>+			printed on console by libata.  If the whole ID part is</div><div class='add'>+			omitted, the last PORT and DEVICE values are used.  If</div><div class='add'>+			ID hasn't been specified yet, the configuration applies</div><div class='add'>+			to all ports, links and devices.</div><div class='ctx'> </div><div class='ctx'> 			If only DEVICE is omitted, the parameter applies to</div><div class='ctx'> 			the port and all links and devices behind it.  DEVICE</div><div class='hunk'>@@ -2639,7 +2773,7 @@</div><div class='ctx'> 			host link and device attached to it.</div><div class='ctx'> </div><div class='ctx'> 			The VAL specifies the configuration to force.  As long</div><div class='del'>-			as there's no ambiguity shortcut notation is allowed.</div><div class='add'>+			as there is no ambiguity, shortcut notation is allowed.</div><div class='ctx'> 			For example, both 1.5 and 1.5G would work for 1.5Gbps.</div><div class='ctx'> 			The following configurations can be forced.</div><div class='ctx'> </div><div class='hunk'>@@ -2652,27 +2786,67 @@</div><div class='ctx'> 			  udma[/][16,25,33,44,66,100,133] notation is also</div><div class='ctx'> 			  allowed.</div><div class='ctx'> </div><div class='add'>+			* nohrst, nosrst, norst: suppress hard, soft and both</div><div class='add'>+			  resets.</div><div class='add'>+</div><div class='add'>+			* rstonce: only attempt one reset during hot-unplug</div><div class='add'>+			  link recovery.</div><div class='add'>+</div><div class='add'>+			* [no]dbdelay: Enable or disable the extra 200ms delay</div><div class='add'>+			  before debouncing a link PHY and device presence</div><div class='add'>+			  detection.</div><div class='add'>+</div><div class='ctx'> 			* [no]ncq: Turn on or off NCQ.</div><div class='ctx'> </div><div class='del'>-			* [no]ncqtrim: Turn off queued DSM TRIM.</div><div class='add'>+			* [no]ncqtrim: Enable or disable queued DSM TRIM.</div><div class='add'>+</div><div class='add'>+			* [no]ncqati: Enable or disable NCQ trim on ATI chipset.</div><div class='add'>+</div><div class='add'>+			* [no]trim: Enable or disable (unqueued) TRIM.</div><div class='add'>+</div><div class='add'>+			* trim_zero: Indicate that TRIM command zeroes data.</div><div class='add'>+</div><div class='add'>+			* max_trim_128m: Set 128M maximum trim size limit.</div><div class='add'>+</div><div class='add'>+			* [no]dma: Turn on or off DMA transfers.</div><div class='add'>+</div><div class='add'>+			* atapi_dmadir: Enable ATAPI DMADIR bridge support.</div><div class='add'>+</div><div class='add'>+			* atapi_mod16_dma: Enable the use of ATAPI DMA for</div><div class='add'>+			  commands that are not a multiple of 16 bytes.</div><div class='add'>+</div><div class='add'>+			* [no]dmalog: Enable or disable the use of the</div><div class='add'>+			  READ LOG DMA EXT command to access logs.</div><div class='add'>+</div><div class='add'>+			* [no]iddevlog: Enable or disable access to the</div><div class='add'>+			  identify device data log.</div><div class='ctx'> </div><div class='del'>-			* nohrst, nosrst, norst: suppress hard, soft</div><div class='del'>-			  and both resets.</div><div class='add'>+			* [no]logdir: Enable or disable access to the general</div><div class='add'>+			  purpose log directory.</div><div class='ctx'> </div><div class='del'>-			* rstonce: only attempt one reset during</div><div class='del'>-			  hot-unplug link recovery</div><div class='add'>+			* max_sec_128: Set transfer size limit to 128 sectors.</div><div class='ctx'> </div><div class='del'>-			* dump_id: dump IDENTIFY data.</div><div class='add'>+			* max_sec_1024: Set or clear transfer size limit to</div><div class='add'>+			  1024 sectors.</div><div class='ctx'> </div><div class='del'>-			* atapi_dmadir: Enable ATAPI DMADIR bridge support</div><div class='add'>+			* max_sec_lba48: Set or clear transfer size limit to</div><div class='add'>+			  65535 sectors.</div><div class='add'>+</div><div class='add'>+			* [no]lpm: Enable or disable link power management.</div><div class='add'>+</div><div class='add'>+			* [no]setxfer: Indicate if transfer speed mode setting</div><div class='add'>+			  should be skipped.</div><div class='add'>+</div><div class='add'>+			* [no]fua: Disable or enable FUA (Force Unit Access)</div><div class='add'>+			  support for devices supporting this feature.</div><div class='add'>+</div><div class='add'>+			* dump_id: Dump IDENTIFY data.</div><div class='ctx'> </div><div class='ctx'> 			* disable: Disable this device.</div><div class='ctx'> </div><div class='ctx'> 			If there are multiple matching configurations changing</div><div class='ctx'> 			the same attribute, the last one is used.</div><div class='ctx'> </div><div class='del'>-	memblock=debug	[KNL] Enable memblock debug messages.</div><div class='del'>-</div><div class='ctx'> 	load_ramdisk=	[RAM] [Deprecated]</div><div class='ctx'> </div><div class='ctx'> 	lockd.nlm_grace_period=P  [NFS] Assign grace period.</div><div class='hunk'>@@ -2814,7 +2988,7 @@</div><div class='ctx'> 			different yeeloong laptops.</div><div class='ctx'> 			Example: machtype=lemote-yeeloong-2f-7inch</div><div class='ctx'> </div><div class='del'>-	max_addr=nn[KMG]	[KNL,BOOT,ia64] All physical memory greater</div><div class='add'>+	max_addr=nn[KMG]	[KNL,BOOT,IA-64] All physical memory greater</div><div class='ctx'> 			than or equal to this physical address is ignored.</div><div class='ctx'> </div><div class='ctx'> 	maxcpus=	[SMP] Maximum number of processors that	an SMP kernel</div><div class='hunk'>@@ -2835,7 +3009,7 @@</div><div class='ctx'> </div><div class='ctx'> 	mce		[X86-32] Machine Check Exception</div><div class='ctx'> </div><div class='del'>-	mce=option	[X86-64] See Documentation/x86/x86_64/boot-options.rst</div><div class='add'>+	mce=option	[X86-64] See Documentation/arch/x86/x86_64/boot-options.rst</div><div class='ctx'> </div><div class='ctx'> 	md=		[HW] RAID subsystems devices and level</div><div class='ctx'> 			See Documentation/admin-guide/md.rst.</div><div class='hunk'>@@ -2914,6 +3088,8 @@</div><div class='ctx'> 	mem=nopentium	[BUGS=X86-32] Disable usage of 4MB pages for kernel</div><div class='ctx'> 			memory.</div><div class='ctx'> </div><div class='add'>+	memblock=debug	[KNL] Enable memblock debug messages.</div><div class='add'>+</div><div class='ctx'> 	memchunk=nn[KMG]</div><div class='ctx'> 			[KNL,SH] Allow user to override the default size for</div><div class='ctx'> 			per-device physically contiguous DMA buffers.</div><div class='hunk'>@@ -2999,10 +3175,12 @@</div><div class='ctx'> 			[KNL,X86,ARM] Boolean flag to enable this feature.</div><div class='ctx'> 			Format: {on | off (default)}</div><div class='ctx'> 			When enabled, runtime hotplugged memory will</div><div class='del'>-			allocate its internal metadata (struct pages)</div><div class='del'>-			from the hotadded memory which will allow to</div><div class='del'>-			hotadd a lot of memory without requiring</div><div class='del'>-			additional memory to do so.</div><div class='add'>+			allocate its internal metadata (struct pages,</div><div class='add'>+			those vmemmap pages cannot be optimized even</div><div class='add'>+			if hugetlb_free_vmemmap is enabled) from the</div><div class='add'>+			hotadded memory which will allow to hotadd a</div><div class='add'>+			lot of memory without requiring additional</div><div class='add'>+			memory to do so.</div><div class='ctx'> 			This feature is disabled by default because it</div><div class='ctx'> 			has some implication on large (e.g. GB)</div><div class='ctx'> 			allocations in some configurations (e.g. small</div><div class='hunk'>@@ -3012,10 +3190,6 @@</div><div class='ctx'> 			Note that even when enabled, there are a few cases where</div><div class='ctx'> 			the feature is not effective.</div><div class='ctx'> </div><div class='del'>-			This is not compatible with hugetlb_free_vmemmap. If</div><div class='del'>-			both parameters are enabled, hugetlb_free_vmemmap takes</div><div class='del'>-			precedence over memory_hotplug.memmap_on_memory.</div><div class='del'>-</div><div class='ctx'> 	memtest=	[KNL,X86,ARM,M68K,PPC,RISCV] Enable memtest</div><div class='ctx'> 			Format: &lt;integer&gt;</div><div class='ctx'> 			default : 0 &lt;disable&gt;</div><div class='hunk'>@@ -3034,7 +3208,7 @@</div><div class='ctx'> 			mem_encrypt=on:		Activate SME</div><div class='ctx'> 			mem_encrypt=off:	Do not activate SME</div><div class='ctx'> </div><div class='del'>-			Refer to Documentation/virt/kvm/amd-memory-encryption.rst</div><div class='add'>+			Refer to Documentation/virt/kvm/x86/amd-memory-encryption.rst</div><div class='ctx'> 			for details on when memory encryption can be activated.</div><div class='ctx'> </div><div class='ctx'> 	mem_sleep_default=	[SUSPEND] Default system suspend mode:</div><div class='hunk'>@@ -3043,9 +3217,6 @@</div><div class='ctx'> 			deep    - Suspend-To-RAM or equivalent (if supported)</div><div class='ctx'> 			See Documentation/admin-guide/pm/sleep-states.rst.</div><div class='ctx'> </div><div class='del'>-	meye.*=		[HW] Set MotionEye Camera parameters</div><div class='del'>-			See Documentation/admin-guide/media/meye.rst.</div><div class='del'>-</div><div class='ctx'> 	mfgpt_irq=	[IA-32] Specify the IRQ to use for the</div><div class='ctx'> 			Multi-Function General Purpose Timers on AMD Geode</div><div class='ctx'> 			platforms.</div><div class='hunk'>@@ -3057,7 +3228,7 @@</div><div class='ctx'> </div><div class='ctx'> 	mga=		[HW,DRM]</div><div class='ctx'> </div><div class='del'>-	min_addr=nn[KMG]	[KNL,BOOT,ia64] All physical memory below this</div><div class='add'>+	min_addr=nn[KMG]	[KNL,BOOT,IA-64] All physical memory below this</div><div class='ctx'> 			physical address is ignored.</div><div class='ctx'> </div><div class='ctx'> 	mini2440=	[ARM,HW,KNL]</div><div class='hunk'>@@ -3092,19 +3263,23 @@</div><div class='ctx'> 				improves system performance, but it may also</div><div class='ctx'> 				expose users to several CPU vulnerabilities.</div><div class='ctx'> 				Equivalent to: nopti [X86,PPC]</div><div class='del'>-					       kpti=0 [ARM64]</div><div class='add'>+					       if nokaslr then kpti=0 [ARM64]</div><div class='ctx'> 					       nospectre_v1 [X86,PPC]</div><div class='ctx'> 					       nobp=0 [S390]</div><div class='ctx'> 					       nospectre_v2 [X86,PPC,S390,ARM64]</div><div class='ctx'> 					       spectre_v2_user=off [X86]</div><div class='ctx'> 					       spec_store_bypass_disable=off [X86,PPC]</div><div class='ctx'> 					       ssbd=force-off [ARM64]</div><div class='add'>+					       nospectre_bhb [ARM64]</div><div class='ctx'> 					       l1tf=off [X86]</div><div class='ctx'> 					       mds=off [X86]</div><div class='ctx'> 					       tsx_async_abort=off [X86]</div><div class='ctx'> 					       kvm.nx_huge_pages=off [X86]</div><div class='add'>+					       srbds=off [X86,INTEL]</div><div class='ctx'> 					       no_entry_flush [PPC]</div><div class='ctx'> 					       no_uaccess_flush [PPC]</div><div class='add'>+					       mmio_stale_data=off [X86]</div><div class='add'>+					       retbleed=off [X86]</div><div class='ctx'> </div><div class='ctx'> 				Exceptions:</div><div class='ctx'> 					       This does not have any effect on</div><div class='hunk'>@@ -3126,6 +3301,8 @@</div><div class='ctx'> 				Equivalent to: l1tf=flush,nosmt [X86]</div><div class='ctx'> 					       mds=full,nosmt [X86]</div><div class='ctx'> 					       tsx_async_abort=full,nosmt [X86]</div><div class='add'>+					       mmio_stale_data=full,nosmt [X86]</div><div class='add'>+					       retbleed=auto,nosmt [X86]</div><div class='ctx'> </div><div class='ctx'> 	mminit_loglevel=</div><div class='ctx'> 			[KNL] When CONFIG_DEBUG_MEMORY_INIT is set, this</div><div class='hunk'>@@ -3135,6 +3312,62 @@</div><div class='ctx'> 			log everything. Information is printed at KERN_DEBUG</div><div class='ctx'> 			so loglevel=8 may also need to be specified.</div><div class='ctx'> </div><div class='add'>+	mmio_stale_data=</div><div class='add'>+			[X86,INTEL] Control mitigation for the Processor</div><div class='add'>+			MMIO Stale Data vulnerabilities.</div><div class='add'>+</div><div class='add'>+			Processor MMIO Stale Data is a class of</div><div class='add'>+			vulnerabilities that may expose data after an MMIO</div><div class='add'>+			operation. Exposed data could originate or end in</div><div class='add'>+			the same CPU buffers as affected by MDS and TAA.</div><div class='add'>+			Therefore, similar to MDS and TAA, the mitigation</div><div class='add'>+			is to clear the affected CPU buffers.</div><div class='add'>+</div><div class='add'>+			This parameter controls the mitigation. The</div><div class='add'>+			options are:</div><div class='add'>+</div><div class='add'>+			full       - Enable mitigation on vulnerable CPUs</div><div class='add'>+</div><div class='add'>+			full,nosmt - Enable mitigation and disable SMT on</div><div class='add'>+				     vulnerable CPUs.</div><div class='add'>+</div><div class='add'>+			off        - Unconditionally disable mitigation</div><div class='add'>+</div><div class='add'>+			On MDS or TAA affected machines,</div><div class='add'>+			mmio_stale_data=off can be prevented by an active</div><div class='add'>+			MDS or TAA mitigation as these vulnerabilities are</div><div class='add'>+			mitigated with the same mechanism so in order to</div><div class='add'>+			disable this mitigation, you need to specify</div><div class='add'>+			mds=off and tsx_async_abort=off too.</div><div class='add'>+</div><div class='add'>+			Not specifying this option is equivalent to</div><div class='add'>+			mmio_stale_data=full.</div><div class='add'>+</div><div class='add'>+			For details see:</div><div class='add'>+			Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst</div><div class='add'>+</div><div class='add'>+	&lt;module&gt;.async_probe[=&lt;bool&gt;] [KNL]</div><div class='add'>+			If no &lt;bool&gt; value is specified or if the value</div><div class='add'>+			specified is not a valid &lt;bool&gt;, enable asynchronous</div><div class='add'>+			probe on this module.  Otherwise, enable/disable</div><div class='add'>+			asynchronous probe on this module as indicated by the</div><div class='add'>+			&lt;bool&gt; value. See also: module.async_probe</div><div class='add'>+</div><div class='add'>+	module.async_probe=&lt;bool&gt;</div><div class='add'>+			[KNL] When set to true, modules will use async probing</div><div class='add'>+			by default. To enable/disable async probing for a</div><div class='add'>+			specific module, use the module specific control that</div><div class='add'>+			is documented under &lt;module&gt;.async_probe. When both</div><div class='add'>+			module.async_probe and &lt;module&gt;.async_probe are</div><div class='add'>+			specified, &lt;module&gt;.async_probe takes precedence for</div><div class='add'>+			the specific module.</div><div class='add'>+</div><div class='add'>+	module.enable_dups_trace</div><div class='add'>+			[KNL] When CONFIG_MODULE_DEBUG_AUTOLOAD_DUPS is set,</div><div class='add'>+			this means that duplicate request_module() calls will</div><div class='add'>+			trigger a WARN_ON() instead of a pr_warn(). Note that</div><div class='add'>+			if MODULE_DEBUG_AUTOLOAD_DUPS_TRACE is set, WARN_ON()s</div><div class='add'>+			will always be issued and this option does nothing.</div><div class='ctx'> 	module.sig_enforce</div><div class='ctx'> 			[KNL] When CONFIG_MODULE_SIG is set, this means that</div><div class='ctx'> 			modules without (valid) signatures will fail to load.</div><div class='hunk'>@@ -3181,20 +3414,6 @@</div><div class='ctx'> 	mtdparts=	[MTD]</div><div class='ctx'> 			See drivers/mtd/parsers/cmdlinepart.c</div><div class='ctx'> </div><div class='del'>-	multitce=off	[PPC]  This parameter disables the use of the pSeries</div><div class='del'>-			firmware feature for updating multiple TCE entries</div><div class='del'>-			at a time.</div><div class='del'>-</div><div class='del'>-	onenand.bdry=	[HW,MTD] Flex-OneNAND Boundary Configuration</div><div class='del'>-</div><div class='del'>-			Format: [die0_boundary][,die0_lock][,die1_boundary][,die1_lock]</div><div class='del'>-</div><div class='del'>-			boundary - index of last SLC block on Flex-OneNAND.</div><div class='del'>-				   The remaining blocks are configured as MLC blocks.</div><div class='del'>-			lock	 - Configure if Flex-OneNAND boundary should be locked.</div><div class='del'>-				   Once locked, the boundary cannot be changed.</div><div class='del'>-				   1 indicates lock status, 0 indicates unlock status.</div><div class='del'>-</div><div class='ctx'> 	mtdset=		[ARM]</div><div class='ctx'> 			ARM/S3C2412 JIVE boot control</div><div class='ctx'> </div><div class='hunk'>@@ -3221,6 +3440,10 @@</div><div class='ctx'> 			Used for mtrr cleanup. It is spare mtrr entries number.</div><div class='ctx'> 			Set to 2 or more if your graphical card needs more.</div><div class='ctx'> </div><div class='add'>+	multitce=off	[PPC]  This parameter disables the use of the pSeries</div><div class='add'>+			firmware feature for updating multiple TCE entries</div><div class='add'>+			at a time.</div><div class='add'>+</div><div class='ctx'> 	n2=		[NET] SDL Inc. RISCom/N2 synchronous serial card</div><div class='ctx'> </div><div class='ctx'> 	netdev=		[NET] Network devices parameters</div><div class='hunk'>@@ -3230,20 +3453,24 @@</div><div class='ctx'> 			This usage is only documented in each driver source</div><div class='ctx'> 			file if at all.</div><div class='ctx'> </div><div class='add'>+	netpoll.carrier_timeout=</div><div class='add'>+			[NET] Specifies amount of time (in seconds) that</div><div class='add'>+			netpoll should wait for a carrier. By default netpoll</div><div class='add'>+			waits 4 seconds.</div><div class='add'>+</div><div class='ctx'> 	nf_conntrack.acct=</div><div class='ctx'> 			[NETFILTER] Enable connection tracking flow accounting</div><div class='ctx'> 			0 to disable accounting</div><div class='ctx'> 			1 to enable accounting</div><div class='ctx'> 			Default value is 0.</div><div class='ctx'> </div><div class='del'>-	nfsaddrs=	[NFS] Deprecated.  Use ip= instead.</div><div class='del'>-			See Documentation/admin-guide/nfs/nfsroot.rst.</div><div class='del'>-</div><div class='del'>-	nfsroot=	[NFS] nfs root filesystem for disk-less boxes.</div><div class='del'>-			See Documentation/admin-guide/nfs/nfsroot.rst.</div><div class='add'>+	nfs.cache_getent=</div><div class='add'>+			[NFS] sets the pathname to the program which is used</div><div class='add'>+			to update the NFS client cache entries.</div><div class='ctx'> </div><div class='del'>-	nfsrootdebug	[NFS] enable nfsroot debugging messages.</div><div class='del'>-			See Documentation/admin-guide/nfs/nfsroot.rst.</div><div class='add'>+	nfs.cache_getent_timeout=</div><div class='add'>+			[NFS] sets the timeout after which an attempt to</div><div class='add'>+			update a cache entry is deemed to have failed.</div><div class='ctx'> </div><div class='ctx'> 	nfs.callback_nr_threads=</div><div class='ctx'> 			[NFSv4] set the total number of threads that the</div><div class='hunk'>@@ -3254,18 +3481,6 @@</div><div class='ctx'> 			[NFS] set the TCP port on which the NFSv4 callback</div><div class='ctx'> 			channel should listen.</div><div class='ctx'> </div><div class='del'>-	nfs.cache_getent=</div><div class='del'>-			[NFS] sets the pathname to the program which is used</div><div class='del'>-			to update the NFS client cache entries.</div><div class='del'>-</div><div class='del'>-	nfs.cache_getent_timeout=</div><div class='del'>-			[NFS] sets the timeout after which an attempt to</div><div class='del'>-			update a cache entry is deemed to have failed.</div><div class='del'>-</div><div class='del'>-	nfs.idmap_cache_timeout=</div><div class='del'>-			[NFS] set the maximum lifetime for idmapper cache</div><div class='del'>-			entries.</div><div class='del'>-</div><div class='ctx'> 	nfs.enable_ino64=</div><div class='ctx'> 			[NFS] enable 64-bit inode numbers.</div><div class='ctx'> 			If zero, the NFS client will fake up a 32-bit inode</div><div class='hunk'>@@ -3273,6 +3488,10 @@</div><div class='ctx'> 			of returning the full 64-bit number.</div><div class='ctx'> 			The default is to return 64-bit inode numbers.</div><div class='ctx'> </div><div class='add'>+	nfs.idmap_cache_timeout=</div><div class='add'>+			[NFS] set the maximum lifetime for idmapper cache</div><div class='add'>+			entries.</div><div class='add'>+</div><div class='ctx'> 	nfs.max_session_cb_slots=</div><div class='ctx'> 			[NFSv4.1] Sets the maximum number of session</div><div class='ctx'> 			slots the client will assign to the callback</div><div class='hunk'>@@ -3300,21 +3519,14 @@</div><div class='ctx'> 			will be autodetected by the client, and it will fall</div><div class='ctx'> 			back to using the idmapper.</div><div class='ctx'> 			To turn off this behaviour, set the value to '0'.</div><div class='add'>+</div><div class='ctx'> 	nfs.nfs4_unique_id=</div><div class='ctx'> 			[NFS4] Specify an additional fixed unique ident-</div><div class='ctx'> 			ification string that NFSv4 clients can insert into</div><div class='ctx'> 			their nfs_client_id4 string.  This is typically a</div><div class='ctx'> 			UUID that is generated at system install time.</div><div class='ctx'> </div><div class='del'>-	nfs.send_implementation_id =</div><div class='del'>-			[NFSv4.1] Send client implementation identification</div><div class='del'>-			information in exchange_id requests.</div><div class='del'>-			If zero, no implementation identification information</div><div class='del'>-			will be sent.</div><div class='del'>-			The default is to send the implementation identification</div><div class='del'>-			information.</div><div class='del'>-</div><div class='del'>-	nfs.recover_lost_locks =</div><div class='add'>+	nfs.recover_lost_locks=</div><div class='ctx'> 			[NFSv4] Attempt to recover locks that were lost due</div><div class='ctx'> 			to a lease timeout on the server. Please note that</div><div class='ctx'> 			doing this risks data corruption, since there are</div><div class='hunk'>@@ -3326,7 +3538,15 @@</div><div class='ctx'> 			The default parameter value of '0' causes the kernel</div><div class='ctx'> 			not to attempt recovery of lost locks.</div><div class='ctx'> </div><div class='del'>-	nfs4.layoutstats_timer =</div><div class='add'>+	nfs.send_implementation_id=</div><div class='add'>+			[NFSv4.1] Send client implementation identification</div><div class='add'>+			information in exchange_id requests.</div><div class='add'>+			If zero, no implementation identification information</div><div class='add'>+			will be sent.</div><div class='add'>+			The default is to send the implementation identification</div><div class='add'>+			information.</div><div class='add'>+</div><div class='add'>+	nfs4.layoutstats_timer=</div><div class='ctx'> 			[NFSv4.2] Change the rate at which the kernel sends</div><div class='ctx'> 			layoutstats to the pNFS metadata server.</div><div class='ctx'> </div><div class='hunk'>@@ -3335,12 +3555,19 @@</div><div class='ctx'> 			driver. A non-zero value sets the minimum interval</div><div class='ctx'> 			in seconds between layoutstats transmissions.</div><div class='ctx'> </div><div class='del'>-	nfsd.inter_copy_offload_enable =</div><div class='add'>+	nfsd.inter_copy_offload_enable=</div><div class='ctx'> 			[NFSv4.2] When set to 1, the server will support</div><div class='ctx'> 			server-to-server copies for which this server is</div><div class='ctx'> 			the destination of the copy.</div><div class='ctx'> </div><div class='del'>-	nfsd.nfsd4_ssc_umount_timeout =</div><div class='add'>+	nfsd.nfs4_disable_idmapping=</div><div class='add'>+			[NFSv4] When set to the default of '1', the NFSv4</div><div class='add'>+			server will return only numeric uids and gids to</div><div class='add'>+			clients using auth_sys, and will accept numeric uids</div><div class='add'>+			and gids from such clients.  This is intended to ease</div><div class='add'>+			migration from NFSv2/v3.</div><div class='add'>+</div><div class='add'>+	nfsd.nfsd4_ssc_umount_timeout=</div><div class='ctx'> 			[NFSv4.2] When used as the destination of a</div><div class='ctx'> 			server-to-server copy, knfsd temporarily mounts</div><div class='ctx'> 			the source server.  It caches the mount in case</div><div class='hunk'>@@ -3348,13 +3575,14 @@</div><div class='ctx'> 			used for the number of milliseconds specified by</div><div class='ctx'> 			this parameter.</div><div class='ctx'> </div><div class='del'>-	nfsd.nfs4_disable_idmapping=</div><div class='del'>-			[NFSv4] When set to the default of '1', the NFSv4</div><div class='del'>-			server will return only numeric uids and gids to</div><div class='del'>-			clients using auth_sys, and will accept numeric uids</div><div class='del'>-			and gids from such clients.  This is intended to ease</div><div class='del'>-			migration from NFSv2/v3.</div><div class='add'>+	nfsaddrs=	[NFS] Deprecated.  Use ip= instead.</div><div class='add'>+			See Documentation/admin-guide/nfs/nfsroot.rst.</div><div class='add'>+</div><div class='add'>+	nfsroot=	[NFS] nfs root filesystem for disk-less boxes.</div><div class='add'>+			See Documentation/admin-guide/nfs/nfsroot.rst.</div><div class='ctx'> </div><div class='add'>+	nfsrootdebug	[NFS] enable nfsroot debugging messages.</div><div class='add'>+			See Documentation/admin-guide/nfs/nfsroot.rst.</div><div class='ctx'> </div><div class='ctx'> 	nmi_backtrace.backtrace_idle [KNL]</div><div class='ctx'> 			Dump stacks even of idle CPUs in response to an</div><div class='hunk'>@@ -3380,45 +3608,15 @@</div><div class='ctx'> 			These settings can be accessed at runtime via</div><div class='ctx'> 			the nmi_watchdog and hardlockup_panic sysctls.</div><div class='ctx'> </div><div class='del'>-	netpoll.carrier_timeout=</div><div class='del'>-			[NET] Specifies amount of time (in seconds) that</div><div class='del'>-			netpoll should wait for a carrier. By default netpoll</div><div class='del'>-			waits 4 seconds.</div><div class='del'>-</div><div class='ctx'> 	no387		[BUGS=X86-32] Tells the kernel to use the 387 maths</div><div class='ctx'> 			emulation library even if a 387 maths coprocessor</div><div class='ctx'> 			is present.</div><div class='ctx'> </div><div class='del'>-	no5lvl		[X86-64] Disable 5-level paging mode. Forces</div><div class='del'>-			kernel to use 4-level paging instead.</div><div class='del'>-</div><div class='del'>-	nofsgsbase	[X86] Disables FSGSBASE instructions.</div><div class='add'>+	no4lvl		[RISCV] Disable 4-level and 5-level paging modes. Forces</div><div class='add'>+			kernel to use 3-level paging instead.</div><div class='ctx'> </div><div class='del'>-	no_console_suspend</div><div class='del'>-			[HW] Never suspend the console</div><div class='del'>-			Disable suspending of consoles during suspend and</div><div class='del'>-			hibernate operations.  Once disabled, debugging</div><div class='del'>-			messages can reach various consoles while the rest</div><div class='del'>-			of the system is being put to sleep (ie, while</div><div class='del'>-			debugging driver suspend/resume hooks).  This may</div><div class='del'>-			not work reliably with all consoles, but is known</div><div class='del'>-			to work with serial and VGA consoles.</div><div class='del'>-			To facilitate more flexible debugging, we also add</div><div class='del'>-			console_suspend, a printk module parameter to control</div><div class='del'>-			it. Users could use console_suspend (usually</div><div class='del'>-			/sys/module/printk/parameters/console_suspend) to</div><div class='del'>-			turn on/off it dynamically.</div><div class='del'>-</div><div class='del'>-	novmcoredd	[KNL,KDUMP]</div><div class='del'>-			Disable device dump. Device dump allows drivers to</div><div class='del'>-			append dump data to vmcore so you can collect driver</div><div class='del'>-			specified debug info.  Drivers can append the data</div><div class='del'>-			without any limit and this data is stored in memory,</div><div class='del'>-			so this may cause significant memory stress.  Disabling</div><div class='del'>-			device dump can help save memory but the driver debug</div><div class='del'>-			data will be no longer available.  This parameter</div><div class='del'>-			is only available when CONFIG_PROC_VMCORE_DEVICE_DUMP</div><div class='del'>-			is set.</div><div class='add'>+	no5lvl		[X86-64,RISCV] Disable 5-level paging mode. Forces</div><div class='add'>+			kernel to use 4-level paging instead.</div><div class='ctx'> </div><div class='ctx'> 	noaliencache	[MM, NUMA, SLAB] Disables the allocation of alien</div><div class='ctx'> 			caches in the slab allocator.  Saves per-node memory,</div><div class='hunk'>@@ -3434,14 +3632,25 @@</div><div class='ctx'> </div><div class='ctx'> 	noautogroup	Disable scheduler automatic task group creation.</div><div class='ctx'> </div><div class='del'>-	nobats		[PPC] Do not use BATs for mapping kernel lowmem</div><div class='del'>-			on "Classic" PPC cores.</div><div class='del'>-</div><div class='ctx'> 	nocache		[ARM]</div><div class='ctx'> </div><div class='del'>-	noclflush	[BUGS=X86] Don't use the CLFLUSH instruction</div><div class='add'>+	no_console_suspend</div><div class='add'>+			[HW] Never suspend the console</div><div class='add'>+			Disable suspending of consoles during suspend and</div><div class='add'>+			hibernate operations.  Once disabled, debugging</div><div class='add'>+			messages can reach various consoles while the rest</div><div class='add'>+			of the system is being put to sleep (ie, while</div><div class='add'>+			debugging driver suspend/resume hooks).  This may</div><div class='add'>+			not work reliably with all consoles, but is known</div><div class='add'>+			to work with serial and VGA consoles.</div><div class='add'>+			To facilitate more flexible debugging, we also add</div><div class='add'>+			console_suspend, a printk module parameter to control</div><div class='add'>+			it. Users could use console_suspend (usually</div><div class='add'>+			/sys/module/printk/parameters/console_suspend) to</div><div class='add'>+			turn on/off it dynamically.</div><div class='ctx'> </div><div class='del'>-	delayacct	[KNL] Enable per-task delay accounting</div><div class='add'>+	no_debug_objects</div><div class='add'>+			[KNL] Disable object debugging</div><div class='ctx'> </div><div class='ctx'> 	nodsp		[SH] Disable hardware DSP at boot time.</div><div class='ctx'> </div><div class='hunk'>@@ -3451,19 +3660,6 @@</div><div class='ctx'> </div><div class='ctx'> 	noexec		[IA-64]</div><div class='ctx'> </div><div class='del'>-	noexec		[X86]</div><div class='del'>-			On X86-32 available only on PAE configured kernels.</div><div class='del'>-			noexec=on: enable non-executable mappings (default)</div><div class='del'>-			noexec=off: disable non-executable mappings</div><div class='del'>-</div><div class='del'>-	nosmap		[X86,PPC]</div><div class='del'>-			Disable SMAP (Supervisor Mode Access Prevention)</div><div class='del'>-			even if it is supported by processor.</div><div class='del'>-</div><div class='del'>-	nosmep		[X86,PPC64s]</div><div class='del'>-			Disable SMEP (Supervisor Mode Execution Prevention)</div><div class='del'>-			even if it is supported by processor.</div><div class='del'>-</div><div class='ctx'> 	noexec32	[X86-64]</div><div class='ctx'> 			This affects only 32-bit executables.</div><div class='ctx'> 			noexec32=on: enable non-executable mappings (default)</div><div class='hunk'>@@ -3471,70 +3667,18 @@</div><div class='ctx'> 			noexec32=off: disable non-executable mappings</div><div class='ctx'> 				read implies executable mappings</div><div class='ctx'> </div><div class='add'>+	no_file_caps	Tells the kernel not to honor file capabilities.  The</div><div class='add'>+			only way then for a file to be executed with privilege</div><div class='add'>+			is to be setuid root or executed by root.</div><div class='add'>+</div><div class='ctx'> 	nofpu		[MIPS,SH] Disable hardware FPU at boot time.</div><div class='ctx'> </div><div class='add'>+	nofsgsbase	[X86] Disables FSGSBASE instructions.</div><div class='add'>+</div><div class='ctx'> 	nofxsr		[BUGS=X86-32] Disables x86 floating point extended</div><div class='ctx'> 			register save and restore. The kernel will only save</div><div class='ctx'> 			legacy floating-point registers on task switch.</div><div class='ctx'> </div><div class='del'>-	nohugeiomap	[KNL,X86,PPC,ARM64] Disable kernel huge I/O mappings.</div><div class='del'>-</div><div class='del'>-	nohugevmalloc	[PPC] Disable kernel huge vmalloc mappings.</div><div class='del'>-</div><div class='del'>-	nosmt		[KNL,S390] Disable symmetric multithreading (SMT).</div><div class='del'>-			Equivalent to smt=1.</div><div class='del'>-</div><div class='del'>-			[KNL,X86] Disable symmetric multithreading (SMT).</div><div class='del'>-			nosmt=force: Force disable SMT, cannot be undone</div><div class='del'>-				     via the sysfs control file.</div><div class='del'>-</div><div class='del'>-	nospectre_v1	[X86,PPC] Disable mitigations for Spectre Variant 1</div><div class='del'>-			(bounds check bypass). With this option data leaks are</div><div class='del'>-			possible in the system.</div><div class='del'>-</div><div class='del'>-	nospectre_v2	[X86,PPC_FSL_BOOK3E,ARM64] Disable all mitigations for</div><div class='del'>-			the Spectre variant 2 (indirect branch prediction)</div><div class='del'>-			vulnerability. System may allow data leaks with this</div><div class='del'>-			option.</div><div class='del'>-</div><div class='del'>-	nospec_store_bypass_disable</div><div class='del'>-			[HW] Disable all mitigations for the Speculative Store Bypass vulnerability</div><div class='del'>-</div><div class='del'>-	no_uaccess_flush</div><div class='del'>-	                [PPC] Don't flush the L1-D cache after accessing user data.</div><div class='del'>-</div><div class='del'>-	noxsave		[BUGS=X86] Disables x86 extended register state save</div><div class='del'>-			and restore using xsave. The kernel will fallback to</div><div class='del'>-			enabling legacy floating-point and sse state.</div><div class='del'>-</div><div class='del'>-	noxsaveopt	[X86] Disables xsaveopt used in saving x86 extended</div><div class='del'>-			register states. The kernel will fall back to use</div><div class='del'>-			xsave to save the states. By using this parameter,</div><div class='del'>-			performance of saving the states is degraded because</div><div class='del'>-			xsave doesn't support modified optimization while</div><div class='del'>-			xsaveopt supports it on xsaveopt enabled systems.</div><div class='del'>-</div><div class='del'>-	noxsaves	[X86] Disables xsaves and xrstors used in saving and</div><div class='del'>-			restoring x86 extended register state in compacted</div><div class='del'>-			form of xsave area. The kernel will fall back to use</div><div class='del'>-			xsaveopt and xrstor to save and restore the states</div><div class='del'>-			in standard form of xsave area. By using this</div><div class='del'>-			parameter, xsave area per process might occupy more</div><div class='del'>-			memory on xsaves enabled systems.</div><div class='del'>-</div><div class='del'>-	nohlt		[ARM,ARM64,MICROBLAZE,SH] Forces the kernel to busy wait</div><div class='del'>-			in do_idle() and not use the arch_cpu_idle()</div><div class='del'>-			implementation; requires CONFIG_GENERIC_IDLE_POLL_SETUP</div><div class='del'>-			to be effective. This is useful on platforms where the</div><div class='del'>-			sleep(SH) or wfi(ARM,ARM64) instructions do not work</div><div class='del'>-			correctly or when doing power measurements to evalute</div><div class='del'>-			the impact of the sleep instructions. This is also</div><div class='del'>-			useful when using JTAG debugger.</div><div class='del'>-</div><div class='del'>-	no_file_caps	Tells the kernel not to honor file capabilities.  The</div><div class='del'>-			only way then for a file to be executed with privilege</div><div class='del'>-			is to be setuid root or executed by root.</div><div class='del'>-</div><div class='ctx'> 	nohalt		[IA-64] Tells the kernel not to use the power saving</div><div class='ctx'> 			function PAL_HALT_LIGHT when idle. This increases</div><div class='ctx'> 			power-consumption. On the positive side, it reduces</div><div class='hunk'>@@ -3558,6 +3702,19 @@</div><div class='ctx'> </div><div class='ctx'> 	nohibernate	[HIBERNATION] Disable hibernation and resume.</div><div class='ctx'> </div><div class='add'>+	nohlt		[ARM,ARM64,MICROBLAZE,SH] Forces the kernel to busy wait</div><div class='add'>+			in do_idle() and not use the arch_cpu_idle()</div><div class='add'>+			implementation; requires CONFIG_GENERIC_IDLE_POLL_SETUP</div><div class='add'>+			to be effective. This is useful on platforms where the</div><div class='add'>+			sleep(SH) or wfi(ARM,ARM64) instructions do not work</div><div class='add'>+			correctly or when doing power measurements to evaluate</div><div class='add'>+			the impact of the sleep instructions. This is also</div><div class='add'>+			useful when using JTAG debugger.</div><div class='add'>+</div><div class='add'>+	nohugeiomap	[KNL,X86,PPC,ARM64] Disable kernel huge I/O mappings.</div><div class='add'>+</div><div class='add'>+	nohugevmalloc	[KNL,X86,PPC,ARM64] Disable kernel huge vmalloc mappings.</div><div class='add'>+</div><div class='ctx'> 	nohz=		[KNL] Boottime enable/disable dynamic ticks</div><div class='ctx'> 			Valid arguments: on, off</div><div class='ctx'> 			Default: on</div><div class='hunk'>@@ -3572,15 +3729,8 @@</div><div class='ctx'> 			just as if they had also been called out in the</div><div class='ctx'> 			rcu_nocbs= boot parameter.</div><div class='ctx'> </div><div class='del'>-	noiotrap	[SH] Disables trapped I/O port accesses.</div><div class='del'>-</div><div class='del'>-	noirqdebug	[X86-32] Disables the code which attempts to detect and</div><div class='del'>-			disable unhandled interrupt sources.</div><div class='del'>-</div><div class='del'>-	no_timer_check	[X86,APIC] Disables the code which tests for</div><div class='del'>-			broken timer IRQ sources.</div><div class='del'>-</div><div class='del'>-	noisapnp	[ISAPNP] Disables ISA PnP code.</div><div class='add'>+			Note that this argument takes precedence over</div><div class='add'>+			the CONFIG_RCU_NOCB_CPU_DEFAULT_ALL option.</div><div class='ctx'> </div><div class='ctx'> 	noinitrd	[RAM] Tells the kernel not to load any configured</div><div class='ctx'> 			initial RAM disk.</div><div class='hunk'>@@ -3593,28 +3743,29 @@</div><div class='ctx'> </div><div class='ctx'> 	noinvpcid	[X86] Disable the INVPCID cpu feature.</div><div class='ctx'> </div><div class='add'>+	noiotrap	[SH] Disables trapped I/O port accesses.</div><div class='add'>+</div><div class='add'>+	noirqdebug	[X86-32] Disables the code which attempts to detect and</div><div class='add'>+			disable unhandled interrupt sources.</div><div class='add'>+</div><div class='add'>+	noisapnp	[ISAPNP] Disables ISA PnP code.</div><div class='add'>+</div><div class='ctx'> 	nojitter	[IA-64] Disables jitter checking for ITC timers.</div><div class='ctx'> </div><div class='del'>-	no-kvmclock	[X86,KVM] Disable paravirtualized KVM clock driver</div><div class='add'>+	nokaslr		[KNL]</div><div class='add'>+			When CONFIG_RANDOMIZE_BASE is set, this disables</div><div class='add'>+			kernel and module base offset ASLR (Address Space</div><div class='add'>+			Layout Randomization).</div><div class='ctx'> </div><div class='ctx'> 	no-kvmapf	[X86,KVM] Disable paravirtualized asynchronous page</div><div class='ctx'> 			fault handling.</div><div class='ctx'> </div><div class='del'>-	no-vmw-sched-clock</div><div class='del'>-			[X86,PV_OPS] Disable paravirtualized VMware scheduler</div><div class='del'>-			clock and use the default one.</div><div class='del'>-</div><div class='del'>-	no-steal-acc	[X86,PV_OPS,ARM64] Disable paravirtualized steal time</div><div class='del'>-			accounting. steal time is computed, but won't</div><div class='del'>-			influence scheduler behaviour</div><div class='add'>+	no-kvmclock	[X86,KVM] Disable paravirtualized KVM clock driver</div><div class='ctx'> </div><div class='ctx'> 	nolapic		[X86-32,APIC] Do not enable or use the local APIC.</div><div class='ctx'> </div><div class='ctx'> 	nolapic_timer	[X86-32,APIC] Do not use the local APIC timer.</div><div class='ctx'> </div><div class='del'>-	noltlbs		[PPC] Do not use large page/tlb entries for kernel</div><div class='del'>-			lowmem mapping on PPC40x and PPC8xx</div><div class='del'>-</div><div class='ctx'> 	nomca		[IA-64] Disable machine check abort handling</div><div class='ctx'> </div><div class='ctx'> 	nomce		[X86-32] Disable Machine Check Exception</div><div class='hunk'>@@ -3622,55 +3773,123 @@</div><div class='ctx'> 	nomfgpt		[X86-32] Disable Multi-Function General Purpose</div><div class='ctx'> 			Timer usage (for AMD Geode machines).</div><div class='ctx'> </div><div class='del'>-	nonmi_ipi	[X86] Disable using NMI IPIs during panic/reboot to</div><div class='del'>-			shutdown the other cpus.  Instead use the REBOOT_VECTOR</div><div class='del'>-			irq.</div><div class='del'>-</div><div class='del'>-	nomodeset	Disable kernel modesetting. DRM drivers will not perform</div><div class='del'>-			display-mode changes or accelerated rendering. Only the</div><div class='del'>-			system framebuffer will be available for use if this was</div><div class='del'>-			set-up by the firmware or boot loader.</div><div class='add'>+	nomodeset	Disable kernel modesetting. Most systems' firmware</div><div class='add'>+			sets up a display mode and provides framebuffer memory</div><div class='add'>+			for output. With nomodeset, DRM and fbdev drivers will</div><div class='add'>+			not load if they could possibly displace the pre-</div><div class='add'>+			initialized output. Only the system framebuffer will</div><div class='add'>+			be available for use. The respective drivers will not</div><div class='add'>+			perform display-mode changes or accelerated rendering.</div><div class='ctx'> </div><div class='del'>-			Useful as fallback, or for testing and debugging.</div><div class='add'>+			Useful as error fallback, or for testing and debugging.</div><div class='ctx'> </div><div class='ctx'> 	nomodule	Disable module load</div><div class='ctx'> </div><div class='add'>+	nonmi_ipi	[X86] Disable using NMI IPIs during panic/reboot to</div><div class='add'>+			shutdown the other cpus.  Instead use the REBOOT_VECTOR</div><div class='add'>+			irq.</div><div class='add'>+</div><div class='ctx'> 	nopat		[X86] Disable PAT (page attribute table extension of</div><div class='ctx'> 			pagetables) support.</div><div class='ctx'> </div><div class='ctx'> 	nopcid		[X86-64] Disable the PCID cpu feature.</div><div class='ctx'> </div><div class='add'>+	nopku		[X86] Disable Memory Protection Keys CPU feature found</div><div class='add'>+			in some Intel CPUs.</div><div class='add'>+</div><div class='add'>+	nopti		[X86-64]</div><div class='add'>+			Equivalent to pti=off</div><div class='add'>+</div><div class='add'>+	nopv=		[X86,XEN,KVM,HYPER_V,VMWARE]</div><div class='add'>+			Disables the PV optimizations forcing the guest to run</div><div class='add'>+			as generic guest with no PV drivers. Currently support</div><div class='add'>+			XEN HVM, KVM, HYPER_V and VMWARE guest.</div><div class='add'>+</div><div class='add'>+	nopvspin	[X86,XEN,KVM]</div><div class='add'>+			Disables the qspinlock slow path using PV optimizations</div><div class='add'>+			which allow the hypervisor to 'idle' the guest on lock</div><div class='add'>+			contention.</div><div class='add'>+</div><div class='ctx'> 	norandmaps	Don't use address space randomization.  Equivalent to</div><div class='ctx'> 			echo 0 &gt; /proc/sys/kernel/randomize_va_space</div><div class='ctx'> </div><div class='ctx'> 	noreplace-smp	[X86-32,SMP] Don't replace SMP instructions</div><div class='ctx'> 			with UP alternatives</div><div class='ctx'> </div><div class='del'>-	nordrand	[X86] Disable kernel use of the RDRAND and</div><div class='del'>-			RDSEED instructions even if they are supported</div><div class='del'>-			by the processor.  RDRAND and RDSEED are still</div><div class='del'>-			available to user space applications.</div><div class='del'>-</div><div class='ctx'> 	noresume	[SWSUSP] Disables resume and restores original swap</div><div class='ctx'> 			space.</div><div class='ctx'> </div><div class='add'>+	nosbagart	[IA-64]</div><div class='add'>+</div><div class='ctx'> 	no-scroll	[VGA] Disables scrollback.</div><div class='ctx'> 			This is required for the Braillex ib80-piezo Braille</div><div class='ctx'> 			reader made by F.H. Papenmeier (Germany).</div><div class='ctx'> </div><div class='del'>-	nosbagart	[IA-64]</div><div class='add'>+	nosgx		[X86-64,SGX] Disables Intel SGX kernel support.</div><div class='ctx'> </div><div class='del'>-	nosep		[BUGS=X86-32] Disables x86 SYSENTER/SYSEXIT support.</div><div class='add'>+	nosmap		[PPC]</div><div class='add'>+			Disable SMAP (Supervisor Mode Access Prevention)</div><div class='add'>+			even if it is supported by processor.</div><div class='ctx'> </div><div class='del'>-	nosgx		[X86-64,SGX] Disables Intel SGX kernel support.</div><div class='add'>+	nosmep		[PPC64s]</div><div class='add'>+			Disable SMEP (Supervisor Mode Execution Prevention)</div><div class='add'>+			even if it is supported by processor.</div><div class='ctx'> </div><div class='ctx'> 	nosmp		[SMP] Tells an SMP kernel to act as a UP kernel,</div><div class='ctx'> 			and disable the IO APIC.  legacy for "maxcpus=0".</div><div class='ctx'> </div><div class='add'>+	nosmt		[KNL,S390] Disable symmetric multithreading (SMT).</div><div class='add'>+			Equivalent to smt=1.</div><div class='add'>+</div><div class='add'>+			[KNL,X86] Disable symmetric multithreading (SMT).</div><div class='add'>+			nosmt=force: Force disable SMT, cannot be undone</div><div class='add'>+				     via the sysfs control file.</div><div class='add'>+</div><div class='ctx'> 	nosoftlockup	[KNL] Disable the soft-lockup detector.</div><div class='ctx'> </div><div class='add'>+	nospec_store_bypass_disable</div><div class='add'>+			[HW] Disable all mitigations for the Speculative Store Bypass vulnerability</div><div class='add'>+</div><div class='add'>+	nospectre_bhb	[ARM64] Disable all mitigations for Spectre-BHB (branch</div><div class='add'>+			history injection) vulnerability. System may allow data leaks</div><div class='add'>+			with this option.</div><div class='add'>+</div><div class='add'>+	nospectre_v1	[X86,PPC] Disable mitigations for Spectre Variant 1</div><div class='add'>+			(bounds check bypass). With this option data leaks are</div><div class='add'>+			possible in the system.</div><div class='add'>+</div><div class='add'>+	nospectre_v2	[X86,PPC_E500,ARM64] Disable all mitigations for</div><div class='add'>+			the Spectre variant 2 (indirect branch prediction)</div><div class='add'>+			vulnerability. System may allow data leaks with this</div><div class='add'>+			option.</div><div class='add'>+</div><div class='add'>+	no-steal-acc	[X86,PV_OPS,ARM64,PPC/PSERIES] Disable paravirtualized</div><div class='add'>+			steal time accounting. steal time is computed, but</div><div class='add'>+			won't influence scheduler behaviour</div><div class='add'>+</div><div class='ctx'> 	nosync		[HW,M68K] Disables sync negotiation for all devices.</div><div class='ctx'> </div><div class='add'>+	no_timer_check	[X86,APIC] Disables the code which tests for</div><div class='add'>+			broken timer IRQ sources.</div><div class='add'>+</div><div class='add'>+	no_uaccess_flush</div><div class='add'>+	                [PPC] Don't flush the L1-D cache after accessing user data.</div><div class='add'>+</div><div class='add'>+	novmcoredd	[KNL,KDUMP]</div><div class='add'>+			Disable device dump. Device dump allows drivers to</div><div class='add'>+			append dump data to vmcore so you can collect driver</div><div class='add'>+			specified debug info.  Drivers can append the data</div><div class='add'>+			without any limit and this data is stored in memory,</div><div class='add'>+			so this may cause significant memory stress.  Disabling</div><div class='add'>+			device dump can help save memory but the driver debug</div><div class='add'>+			data will be no longer available.  This parameter</div><div class='add'>+			is only available when CONFIG_PROC_VMCORE_DEVICE_DUMP</div><div class='add'>+			is set.</div><div class='add'>+</div><div class='add'>+	no-vmw-sched-clock</div><div class='add'>+			[X86,PV_OPS] Disable paravirtualized VMware scheduler</div><div class='add'>+			clock and use the default one.</div><div class='add'>+</div><div class='ctx'> 	nowatchdog	[KNL] Disable both lockup detectors, i.e.</div><div class='ctx'> 			soft-lockup and NMI watchdog (hard-lockup).</div><div class='ctx'> </div><div class='hunk'>@@ -3678,19 +3897,28 @@</div><div class='ctx'> </div><div class='ctx'> 	nox2apic	[X86-64,APIC] Do not enable x2APIC mode.</div><div class='ctx'> </div><div class='del'>-	cpu0_hotplug	[X86] Turn on CPU0 hotplug feature when</div><div class='del'>-			CONFIG_BOOTPARAM_HOTPLUG_CPU0 is off.</div><div class='del'>-			Some features depend on CPU0. Known dependencies are:</div><div class='del'>-			1. Resume from suspend/hibernate depends on CPU0.</div><div class='del'>-			Suspend/hibernate will fail if CPU0 is offline and you</div><div class='del'>-			need to online CPU0 before suspend/hibernate.</div><div class='del'>-			2. PIC interrupts also depend on CPU0. CPU0 can't be</div><div class='del'>-			removed if a PIC interrupt is detected.</div><div class='del'>-			It's said poweroff/reboot may depend on CPU0 on some</div><div class='del'>-			machines although I haven't seen such issues so far</div><div class='del'>-			after CPU0 is offline on a few tested machines.</div><div class='del'>-			If the dependencies are under your control, you can</div><div class='del'>-			turn on cpu0_hotplug.</div><div class='add'>+			NOTE: this parameter will be ignored on systems with the</div><div class='add'>+			LEGACY_XAPIC_DISABLED bit set in the</div><div class='add'>+			IA32_XAPIC_DISABLE_STATUS MSR.</div><div class='add'>+</div><div class='add'>+	noxsave		[BUGS=X86] Disables x86 extended register state save</div><div class='add'>+			and restore using xsave. The kernel will fallback to</div><div class='add'>+			enabling legacy floating-point and sse state.</div><div class='add'>+</div><div class='add'>+	noxsaveopt	[X86] Disables xsaveopt used in saving x86 extended</div><div class='add'>+			register states. The kernel will fall back to use</div><div class='add'>+			xsave to save the states. By using this parameter,</div><div class='add'>+			performance of saving the states is degraded because</div><div class='add'>+			xsave doesn't support modified optimization while</div><div class='add'>+			xsaveopt supports it on xsaveopt enabled systems.</div><div class='add'>+</div><div class='add'>+	noxsaves	[X86] Disables xsaves and xrstors used in saving and</div><div class='add'>+			restoring x86 extended register state in compacted</div><div class='add'>+			form of xsave area. The kernel will fall back to use</div><div class='add'>+			xsaveopt and xrstor to save and restore the states</div><div class='add'>+			in standard form of xsave area. By using this</div><div class='add'>+			parameter, xsave area per process might occupy more</div><div class='add'>+			memory on xsaves enabled systems.</div><div class='ctx'> </div><div class='ctx'> 	nps_mtm_hs_ctr=	[KNL,ARC]</div><div class='ctx'> 			This parameter sets the maximum duration, in</div><div class='hunk'>@@ -3744,6 +3972,16 @@</div><div class='ctx'> 			For example, to override I2C bus2:</div><div class='ctx'> 			omap_mux=i2c2_scl.i2c2_scl=0x100,i2c2_sda.i2c2_sda=0x100</div><div class='ctx'> </div><div class='add'>+	onenand.bdry=	[HW,MTD] Flex-OneNAND Boundary Configuration</div><div class='add'>+</div><div class='add'>+			Format: [die0_boundary][,die0_lock][,die1_boundary][,die1_lock]</div><div class='add'>+</div><div class='add'>+			boundary - index of last SLC block on Flex-OneNAND.</div><div class='add'>+				   The remaining blocks are configured as MLC blocks.</div><div class='add'>+			lock	 - Configure if Flex-OneNAND boundary should be locked.</div><div class='add'>+				   Once locked, the boundary cannot be changed.</div><div class='add'>+				   1 indicates lock status, 0 indicates unlock status.</div><div class='add'>+</div><div class='ctx'> 	oops=panic	Always panic on oopses. Default is to just kill the</div><div class='ctx'> 			process, but there is a small probability of</div><div class='ctx'> 			deadlocking the machine.</div><div class='hunk'>@@ -3776,7 +4014,7 @@</div><div class='ctx'> 			[KNL] Minimal page reporting order</div><div class='ctx'> 			Format: &lt;integer&gt;</div><div class='ctx'> 			Adjust the minimal page reporting order. The page</div><div class='del'>-			reporting is disabled when it exceeds (MAX_ORDER-1).</div><div class='add'>+			reporting is disabled when it exceeds MAX_ORDER.</div><div class='ctx'> </div><div class='ctx'> 	panic=		[KNL] Kernel behaviour on panic: delay &lt;timeout&gt;</div><div class='ctx'> 			timeout &gt; 0: seconds before rebooting</div><div class='hunk'>@@ -3814,14 +4052,6 @@</div><div class='ctx'> 	panic_on_warn	panic() instead of WARN().  Useful to cause kdump</div><div class='ctx'> 			on a WARN().</div><div class='ctx'> </div><div class='del'>-	crash_kexec_post_notifiers</div><div class='del'>-			Run kdump after running panic-notifiers and dumping</div><div class='del'>-			kmsg. This only for the users who doubt kdump always</div><div class='del'>-			succeeds in any situation.</div><div class='del'>-			Note that this also increases risks of kdump failure,</div><div class='del'>-			because some panic notifiers can make the crashed</div><div class='del'>-			kernel more unstable.</div><div class='del'>-</div><div class='ctx'> 	parkbd.port=	[HW] Parallel port number the keyboard adapter is</div><div class='ctx'> 			connected to, default is 0.</div><div class='ctx'> 			Format: &lt;parport#&gt;</div><div class='hunk'>@@ -3948,10 +4178,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pcbit=		[HW,ISDN]</div><div class='ctx'> </div><div class='del'>-	pcd.		[PARIDE]</div><div class='del'>-			See header of drivers/block/paride/pcd.c.</div><div class='del'>-			See also Documentation/admin-guide/blockdev/paride.rst.</div><div class='del'>-</div><div class='ctx'> 	pci=option[,option...]	[PCI] various PCI subsystem options.</div><div class='ctx'> </div><div class='ctx'> 				Some options herein operate on a specific device</div><div class='hunk'>@@ -4066,6 +4292,15 @@</div><div class='ctx'> 				please report a bug.</div><div class='ctx'> 		nocrs		[X86] Ignore PCI host bridge windows from ACPI.</div><div class='ctx'> 				If you need to use this, please report a bug.</div><div class='add'>+		use_e820	[X86] Use E820 reservations to exclude parts of</div><div class='add'>+				PCI host bridge windows. This is a workaround</div><div class='add'>+				for BIOS defects in host bridge _CRS methods.</div><div class='add'>+				If you need to use this, please report a bug to</div><div class='add'>+				&lt;linux-pci@vger.kernel.org&gt;.</div><div class='add'>+		no_e820		[X86] Ignore E820 reservations for PCI host</div><div class='add'>+				bridge windows. This is the default on modern</div><div class='add'>+				hardware. If you need to use this, please report</div><div class='add'>+				a bug to &lt;linux-pci@vger.kernel.org&gt;.</div><div class='ctx'> 		routeirq	Do IRQ routing for all PCI devices.</div><div class='ctx'> 				This is normally done in pci_enable_device(),</div><div class='ctx'> 				so this option is a temporary workaround</div><div class='hunk'>@@ -4118,7 +4353,9 @@</div><div class='ctx'> 				specified, e.g., 12@pci:8086:9c22:103c:198f</div><div class='ctx'> 				for 4096-byte alignment.</div><div class='ctx'> 		ecrc=		Enable/disable PCIe ECRC (transaction layer</div><div class='del'>-				end-to-end CRC checking).</div><div class='add'>+				end-to-end CRC checking). Only effective if</div><div class='add'>+				OS has native AER control (either granted by</div><div class='add'>+				ACPI _OSC or forced via "pcie_ports=native")</div><div class='ctx'> 				bios: Use BIOS/firmware settings. This is the</div><div class='ctx'> 				the default.</div><div class='ctx'> 				off: Turn ECRC off</div><div class='hunk'>@@ -4205,9 +4442,6 @@</div><div class='ctx'> 			for debug and development, but should not be</div><div class='ctx'> 			needed on a platform with proper driver support.</div><div class='ctx'> </div><div class='del'>-	pd.		[PARIDE]</div><div class='del'>-			See Documentation/admin-guide/blockdev/paride.rst.</div><div class='del'>-</div><div class='ctx'> 	pdcchassis=	[PARISC,HW] Disable/Enable PDC Chassis Status codes at</div><div class='ctx'> 			boot time.</div><div class='ctx'> 			Format: { 0 | 1 }</div><div class='hunk'>@@ -4220,14 +4454,8 @@</div><div class='ctx'> 			allocator.  This parameter is primarily	for debugging</div><div class='ctx'> 			and performance comparison.</div><div class='ctx'> </div><div class='del'>-	pf.		[PARIDE]</div><div class='del'>-			See Documentation/admin-guide/blockdev/paride.rst.</div><div class='del'>-</div><div class='del'>-	pg.		[PARIDE]</div><div class='del'>-			See Documentation/admin-guide/blockdev/paride.rst.</div><div class='del'>-</div><div class='ctx'> 	pirq=		[SMP,APIC] Manual mp-table setup</div><div class='del'>-			See Documentation/x86/i386/IO-APIC.rst.</div><div class='add'>+			See Documentation/arch/x86/i386/IO-APIC.rst.</div><div class='ctx'> </div><div class='ctx'> 	plip=		[PPT,NET] Parallel port network link</div><div class='ctx'> 			Format: { parport&lt;nr&gt; | timid | 0 }</div><div class='hunk'>@@ -4387,9 +4615,6 @@</div><div class='ctx'> </div><div class='ctx'> 	pstore.backend=	Specify the name of the pstore backend to use</div><div class='ctx'> </div><div class='del'>-	pt.		[PARIDE]</div><div class='del'>-			See Documentation/admin-guide/blockdev/paride.rst.</div><div class='del'>-</div><div class='ctx'> 	pti=		[X86-64] Control Page Table Isolation of user and</div><div class='ctx'> 			kernel address spaces.  Disabling this feature</div><div class='ctx'> 			removes hardening, but improves performance of</div><div class='hunk'>@@ -4402,9 +4627,6 @@</div><div class='ctx'> </div><div class='ctx'> 			Not specifying this option is equivalent to pti=auto.</div><div class='ctx'> </div><div class='del'>-	nopti		[X86-64]</div><div class='del'>-			Equivalent to pti=off</div><div class='del'>-</div><div class='ctx'> 	pty.legacy_count=</div><div class='ctx'> 			[KNL] Number of legacy pty's. Overwrites compiled-in</div><div class='ctx'> 			default number.</div><div class='hunk'>@@ -4413,6 +4635,10 @@</div><div class='ctx'> </div><div class='ctx'> 	r128=		[HW,DRM]</div><div class='ctx'> </div><div class='add'>+	radix_hcall_invalidate=on  [PPC/PSERIES]</div><div class='add'>+			Disable RADIX GTSE feature and use hcall for TLB</div><div class='add'>+			invalidate.</div><div class='add'>+</div><div class='ctx'> 	raid=		[HW,RAID]</div><div class='ctx'> 			See Documentation/admin-guide/md.rst.</div><div class='ctx'> </div><div class='hunk'>@@ -4421,17 +4647,15 @@</div><div class='ctx'> </div><div class='ctx'> 	ramdisk_start=	[RAM] RAM disk image start address</div><div class='ctx'> </div><div class='del'>-	random.trust_cpu={on,off}</div><div class='del'>-			[KNL] Enable or disable trusting the use of the</div><div class='del'>-			CPU's random number generator (if available) to</div><div class='del'>-			fully seed the kernel's CRNG. Default is controlled</div><div class='del'>-			by CONFIG_RANDOM_TRUST_CPU.</div><div class='add'>+	random.trust_cpu=off</div><div class='add'>+			[KNL] Disable trusting the use of the CPU's</div><div class='add'>+			random number generator (if available) to</div><div class='add'>+			initialize the kernel's RNG.</div><div class='ctx'> </div><div class='del'>-	random.trust_bootloader={on,off}</div><div class='del'>-			[KNL] Enable or disable trusting the use of a</div><div class='del'>-			seed passed by the bootloader (if available) to</div><div class='del'>-			fully seed the kernel's CRNG. Default is controlled</div><div class='del'>-			by CONFIG_RANDOM_TRUST_BOOTLOADER.</div><div class='add'>+	random.trust_bootloader=off</div><div class='add'>+			[KNL] Disable trusting the use of the a seed</div><div class='add'>+			passed by the bootloader (if available) to</div><div class='add'>+			initialize the kernel's RNG.</div><div class='ctx'> </div><div class='ctx'> 	randomize_kstack_offset=</div><div class='ctx'> 			[KNL] Enable or disable kernel stack offset</div><div class='hunk'>@@ -4475,6 +4699,9 @@</div><div class='ctx'> 			no-callback mode from boot but the mode may be</div><div class='ctx'> 			toggled at runtime via cpusets.</div><div class='ctx'> </div><div class='add'>+			Note that this argument takes precedence over</div><div class='add'>+			the CONFIG_RCU_NOCB_CPU_DEFAULT_ALL option.</div><div class='add'>+</div><div class='ctx'> 	rcu_nocb_poll	[KNL]</div><div class='ctx'> 			Rather than requiring that offloaded CPUs</div><div class='ctx'> 			(specified by rcu_nocbs= above) explicitly</div><div class='hunk'>@@ -4584,6 +4811,34 @@</div><div class='ctx'> 			When RCU_NOCB_CPU is set, also adjust the</div><div class='ctx'> 			priority of NOCB callback kthreads.</div><div class='ctx'> </div><div class='add'>+	rcutree.rcu_divisor= [KNL]</div><div class='add'>+			Set the shift-right count to use to compute</div><div class='add'>+			the callback-invocation batch limit bl from</div><div class='add'>+			the number of callbacks queued on this CPU.</div><div class='add'>+			The result will be bounded below by the value of</div><div class='add'>+			the rcutree.blimit kernel parameter.  Every bl</div><div class='add'>+			callbacks, the softirq handler will exit in</div><div class='add'>+			order to allow the CPU to do other work.</div><div class='add'>+</div><div class='add'>+			Please note that this callback-invocation batch</div><div class='add'>+			limit applies only to non-offloaded callback</div><div class='add'>+			invocation.  Offloaded callbacks are instead</div><div class='add'>+			invoked in the context of an rcuoc kthread, which</div><div class='add'>+			scheduler will preempt as it does any other task.</div><div class='add'>+</div><div class='add'>+	rcutree.nocb_nobypass_lim_per_jiffy= [KNL]</div><div class='add'>+			On callback-offloaded (rcu_nocbs) CPUs,</div><div class='add'>+			RCU reduces the lock contention that would</div><div class='add'>+			otherwise be caused by callback floods through</div><div class='add'>+			use of the -&gt;nocb_bypass list.	However, in the</div><div class='add'>+			common non-flooded case, RCU queues directly to</div><div class='add'>+			the main -&gt;cblist in order to avoid the extra</div><div class='add'>+			overhead of the -&gt;nocb_bypass list and its lock.</div><div class='add'>+			But if there are too many callbacks queued during</div><div class='add'>+			a single jiffy, RCU pre-queues the callbacks into</div><div class='add'>+			the -&gt;nocb_bypass queue.  The definition of "too</div><div class='add'>+			many" is supplied by this kernel boot parameter.</div><div class='add'>+</div><div class='ctx'> 	rcutree.rcu_nocb_gp_stride= [KNL]</div><div class='ctx'> 			Set the number of NOCB callback kthreads in</div><div class='ctx'> 			each group, which defaults to the square root</div><div class='hunk'>@@ -4893,6 +5148,29 @@</div><div class='ctx'> </div><div class='ctx'> 	rcupdate.rcu_cpu_stall_timeout= [KNL]</div><div class='ctx'> 			Set timeout for RCU CPU stall warning messages.</div><div class='add'>+			The value is in seconds and the maximum allowed</div><div class='add'>+			value is 300 seconds.</div><div class='add'>+</div><div class='add'>+	rcupdate.rcu_exp_cpu_stall_timeout= [KNL]</div><div class='add'>+			Set timeout for expedited RCU CPU stall warning</div><div class='add'>+			messages.  The value is in milliseconds</div><div class='add'>+			and the maximum allowed value is 21000</div><div class='add'>+			milliseconds. Please note that this value is</div><div class='add'>+			adjusted to an arch timer tick resolution.</div><div class='add'>+			Setting this to zero causes the value from</div><div class='add'>+			rcupdate.rcu_cpu_stall_timeout to be used (after</div><div class='add'>+			conversion from seconds to milliseconds).</div><div class='add'>+</div><div class='add'>+	rcupdate.rcu_cpu_stall_cputime= [KNL]</div><div class='add'>+			Provide statistics on the cputime and count of</div><div class='add'>+			interrupts and tasks during the sampling period. For</div><div class='add'>+			multiple continuous RCU stalls, all sampling periods</div><div class='add'>+			begin at half of the first RCU stall timeout.</div><div class='add'>+</div><div class='add'>+	rcupdate.rcu_exp_stall_task_details= [KNL]</div><div class='add'>+			Print stack dumps of any tasks blocking the</div><div class='add'>+			current expedited RCU grace period during an</div><div class='add'>+			expedited RCU CPU stall warning.</div><div class='ctx'> </div><div class='ctx'> 	rcupdate.rcu_expedited= [KNL]</div><div class='ctx'> 			Use expedited grace-period primitives, for</div><div class='hunk'>@@ -4955,10 +5233,34 @@</div><div class='ctx'> 			number avoids disturbing real-time workloads,</div><div class='ctx'> 			but lengthens grace periods.</div><div class='ctx'> </div><div class='add'>+	rcupdate.rcu_task_stall_info= [KNL]</div><div class='add'>+			Set initial timeout in jiffies for RCU task stall</div><div class='add'>+			informational messages, which give some indication</div><div class='add'>+			of the problem for those not patient enough to</div><div class='add'>+			wait for ten minutes.  Informational messages are</div><div class='add'>+			only printed prior to the stall-warning message</div><div class='add'>+			for a given grace period. Disable with a value</div><div class='add'>+			less than or equal to zero.  Defaults to ten</div><div class='add'>+			seconds.  A change in value does not take effect</div><div class='add'>+			until the beginning of the next grace period.</div><div class='add'>+</div><div class='add'>+	rcupdate.rcu_task_stall_info_mult= [KNL]</div><div class='add'>+			Multiplier for time interval between successive</div><div class='add'>+			RCU task stall informational messages for a given</div><div class='add'>+			RCU tasks grace period.  This value is clamped</div><div class='add'>+			to one through ten, inclusive.	It defaults to</div><div class='add'>+			the value three, so that the first informational</div><div class='add'>+			message is printed 10 seconds into the grace</div><div class='add'>+			period, the second at 40 seconds, the third at</div><div class='add'>+			160 seconds, and then the stall warning at 600</div><div class='add'>+			seconds would prevent a fourth at 640 seconds.</div><div class='add'>+</div><div class='ctx'> 	rcupdate.rcu_task_stall_timeout= [KNL]</div><div class='del'>-			Set timeout in jiffies for RCU task stall warning</div><div class='del'>-			messages.  Disable with a value less than or equal</div><div class='del'>-			to zero.</div><div class='add'>+			Set timeout in jiffies for RCU task stall</div><div class='add'>+			warning messages.  Disable with a value less</div><div class='add'>+			than or equal to zero.	Defaults to ten minutes.</div><div class='add'>+			A change in value does not take effect until</div><div class='add'>+			the beginning of the next grace period.</div><div class='ctx'> </div><div class='ctx'> 	rcupdate.rcu_self_test= [KNL]</div><div class='ctx'> 			Run the RCU early boot self tests</div><div class='hunk'>@@ -4978,7 +5280,7 @@</div><div class='ctx'> 	rdt=		[HW,X86,RDT]</div><div class='ctx'> 			Turn on/off individual RDT features. List is:</div><div class='ctx'> 			cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp,</div><div class='del'>-			mba.</div><div class='add'>+			mba, smba, bmec.</div><div class='ctx'> 			E.g. to turn on cmt and turn off mba use:</div><div class='ctx'> 				rdt=cmt,!mba</div><div class='ctx'> </div><div class='hunk'>@@ -5077,17 +5379,45 @@</div><div class='ctx'> 			Useful for devices that are detected asynchronously</div><div class='ctx'> 			(e.g. USB and MMC devices).</div><div class='ctx'> </div><div class='del'>-	hibernate=	[HIBERNATION]</div><div class='del'>-		noresume	Don't check if there's a hibernation image</div><div class='del'>-				present during boot.</div><div class='del'>-		nocompress	Don't compress/decompress hibernation images.</div><div class='del'>-		no		Disable hibernation and resume.</div><div class='del'>-		protect_image	Turn on image protection during restoration</div><div class='del'>-				(that will set all pages holding image data</div><div class='del'>-				during restoration read-only).</div><div class='del'>-</div><div class='ctx'> 	retain_initrd	[RAM] Keep initrd memory after extraction</div><div class='ctx'> </div><div class='add'>+	retbleed=	[X86] Control mitigation of RETBleed (Arbitrary</div><div class='add'>+			Speculative Code Execution with Return Instructions)</div><div class='add'>+			vulnerability.</div><div class='add'>+</div><div class='add'>+			AMD-based UNRET and IBPB mitigations alone do not stop</div><div class='add'>+			sibling threads from influencing the predictions of other</div><div class='add'>+			sibling threads. For that reason, STIBP is used on pro-</div><div class='add'>+			cessors that support it, and mitigate SMT on processors</div><div class='add'>+			that don't.</div><div class='add'>+</div><div class='add'>+			off          - no mitigation</div><div class='add'>+			auto         - automatically select a migitation</div><div class='add'>+			auto,nosmt   - automatically select a mitigation,</div><div class='add'>+				       disabling SMT if necessary for</div><div class='add'>+				       the full mitigation (only on Zen1</div><div class='add'>+				       and older without STIBP).</div><div class='add'>+			ibpb         - On AMD, mitigate short speculation</div><div class='add'>+				       windows on basic block boundaries too.</div><div class='add'>+				       Safe, highest perf impact. It also</div><div class='add'>+				       enables STIBP if present. Not suitable</div><div class='add'>+				       on Intel.</div><div class='add'>+			ibpb,nosmt   - Like "ibpb" above but will disable SMT</div><div class='add'>+				       when STIBP is not available. This is</div><div class='add'>+				       the alternative for systems which do not</div><div class='add'>+				       have STIBP.</div><div class='add'>+			unret        - Force enable untrained return thunks,</div><div class='add'>+				       only effective on AMD f15h-f17h based</div><div class='add'>+				       systems.</div><div class='add'>+			unret,nosmt  - Like unret, but will disable SMT when STIBP</div><div class='add'>+				       is not available. This is the alternative for</div><div class='add'>+				       systems which do not have STIBP.</div><div class='add'>+</div><div class='add'>+			Selecting 'auto' will choose a mitigation method at run</div><div class='add'>+			time according to the CPU.</div><div class='add'>+</div><div class='add'>+			Not specifying this option is equivalent to retbleed=auto.</div><div class='add'>+</div><div class='ctx'> 	rfkill.default_state=</div><div class='ctx'> 		0	"airplane mode".  All wifi, bluetooth, wimax, gps, fm,</div><div class='ctx'> 			etc. communication is blocked by default.</div><div class='hunk'>@@ -5112,6 +5442,8 @@</div><div class='ctx'> 	rodata=		[KNL]</div><div class='ctx'> 		on	Mark read-only kernel memory as read-only (default).</div><div class='ctx'> 		off	Leave read-only kernel memory writable for debugging.</div><div class='add'>+		full	Mark read-only kernel memory and aliases as read-only</div><div class='add'>+		        [arm64]</div><div class='ctx'> </div><div class='ctx'> 	rockchip.usb_uart</div><div class='ctx'> 			Enable the uart passthrough on the designated usb port</div><div class='hunk'>@@ -5299,18 +5631,22 @@</div><div class='ctx'> 			1 -- enable.</div><div class='ctx'> 			Default value is 1.</div><div class='ctx'> </div><div class='del'>-	apparmor=	[APPARMOR] Disable or enable AppArmor at boot time</div><div class='del'>-			Format: { "0" | "1" }</div><div class='del'>-			See security/apparmor/Kconfig help text</div><div class='del'>-			0 -- disable.</div><div class='del'>-			1 -- enable.</div><div class='del'>-			Default value is set via kernel config option.</div><div class='del'>-</div><div class='ctx'> 	serialnumber	[BUGS=X86-32]</div><div class='ctx'> </div><div class='add'>+	sev=option[,option...] [X86-64] See Documentation/arch/x86/x86_64/boot-options.rst</div><div class='add'>+</div><div class='ctx'> 	shapers=	[NET]</div><div class='ctx'> 			Maximal number of shapers.</div><div class='ctx'> </div><div class='add'>+	show_lapic=	[APIC,X86] Advanced Programmable Interrupt Controller</div><div class='add'>+			Limit apic dumping. The parameter defines the maximal</div><div class='add'>+			number of local apics being dumped. Also it is possible</div><div class='add'>+			to set it to "all" by meaning -- no limit here.</div><div class='add'>+			Format: { 1 (default) | 2 | ... | all }.</div><div class='add'>+			The parameter valid if only apic=debug or</div><div class='add'>+			apic=verbose is specified.</div><div class='add'>+			Example: apic=debug show_lapic=all</div><div class='add'>+</div><div class='ctx'> 	simeth=		[IA-64]</div><div class='ctx'> 	simscsi=</div><div class='ctx'> </div><div class='hunk'>@@ -5331,7 +5667,7 @@</div><div class='ctx'> 			cache (risks via metadata attacks are mostly</div><div class='ctx'> 			unchanged). Debug options disable merging on their</div><div class='ctx'> 			own.</div><div class='del'>-			For more information see Documentation/vm/slub.rst.</div><div class='add'>+			For more information see Documentation/mm/slub.rst.</div><div class='ctx'> </div><div class='ctx'> 	slab_max_order=	[MM, SLAB]</div><div class='ctx'> 			Determines the maximum allowed order for slabs.</div><div class='hunk'>@@ -5345,13 +5681,13 @@</div><div class='ctx'> 			slub_debug can create guard zones around objects and</div><div class='ctx'> 			may poison objects when not in use. Also tracks the</div><div class='ctx'> 			last alloc / free. For more information see</div><div class='del'>-			Documentation/vm/slub.rst.</div><div class='add'>+			Documentation/mm/slub.rst.</div><div class='ctx'> </div><div class='ctx'> 	slub_max_order= [MM, SLUB]</div><div class='ctx'> 			Determines the maximum allowed order for slabs.</div><div class='ctx'> 			A high setting may cause OOMs due to memory</div><div class='ctx'> 			fragmentation. For more information see</div><div class='del'>-			Documentation/vm/slub.rst.</div><div class='add'>+			Documentation/mm/slub.rst.</div><div class='ctx'> </div><div class='ctx'> 	slub_min_objects=	[MM, SLUB]</div><div class='ctx'> 			The minimum number of objects per slab. SLUB will</div><div class='hunk'>@@ -5360,12 +5696,12 @@</div><div class='ctx'> 			the number of objects indicated. The higher the number</div><div class='ctx'> 			of objects the smaller the overhead of tracking slabs</div><div class='ctx'> 			and the less frequently locks need to be acquired.</div><div class='del'>-			For more information see Documentation/vm/slub.rst.</div><div class='add'>+			For more information see Documentation/mm/slub.rst.</div><div class='ctx'> </div><div class='ctx'> 	slub_min_order=	[MM, SLUB]</div><div class='ctx'> 			Determines the minimum page order for slabs. Must be</div><div class='ctx'> 			lower than slub_max_order.</div><div class='del'>-			For more information see Documentation/vm/slub.rst.</div><div class='add'>+			For more information see Documentation/mm/slub.rst.</div><div class='ctx'> </div><div class='ctx'> 	slub_merge	[MM, SLUB]</div><div class='ctx'> 			Same with slab_merge.</div><div class='hunk'>@@ -5377,6 +5713,17 @@</div><div class='ctx'> 	smart2=		[HW]</div><div class='ctx'> 			Format: &lt;io1&gt;[,&lt;io2&gt;[,...,&lt;io8&gt;]]</div><div class='ctx'> </div><div class='add'>+	smp.csd_lock_timeout= [KNL]</div><div class='add'>+			Specify the period of time in milliseconds</div><div class='add'>+			that smp_call_function() and friends will wait</div><div class='add'>+			for a CPU to release the CSD lock.  This is</div><div class='add'>+			useful when diagnosing bugs involving CPUs</div><div class='add'>+			disabling interrupts for extended periods</div><div class='add'>+			of time.  Defaults to 5,000 milliseconds, and</div><div class='add'>+			setting a value of zero disables this feature.</div><div class='add'>+			This feature may be more efficiently disabled</div><div class='add'>+			using the csdlock_debug- kernel parameter.</div><div class='add'>+</div><div class='ctx'> 	smsc-ircc2.nopnp	[HW] Don't use PNP to discover SMC devices</div><div class='ctx'> 	smsc-ircc2.ircc_cfg=	[HW] Device configuration I/O port</div><div class='ctx'> 	smsc-ircc2.ircc_sir=	[HW] SIR base I/O port</div><div class='hunk'>@@ -5388,7 +5735,7 @@</div><div class='ctx'> 				1: Fast pin select (default)</div><div class='ctx'> 				2: ATC IRMode</div><div class='ctx'> </div><div class='del'>-	smt		[KNL,S390] Set the maximum number of threads (logical</div><div class='add'>+	smt=		[KNL,S390] Set the maximum number of threads (logical</div><div class='ctx'> 			CPUs) to use per physical CPU on systems capable of</div><div class='ctx'> 			symmetric multithreading (SMT). Will be capped to the</div><div class='ctx'> 			actual hardware limit.</div><div class='hunk'>@@ -5443,9 +5790,10 @@</div><div class='ctx'> 			retpoline,generic - Retpolines</div><div class='ctx'> 			retpoline,lfence  - LFENCE; indirect branch</div><div class='ctx'> 			retpoline,amd     - alias for retpoline,lfence</div><div class='del'>-			eibrs		  - enhanced IBRS</div><div class='del'>-			eibrs,retpoline   - enhanced IBRS + Retpolines</div><div class='del'>-			eibrs,lfence      - enhanced IBRS + LFENCE</div><div class='add'>+			eibrs		  - Enhanced/Auto IBRS</div><div class='add'>+			eibrs,retpoline   - Enhanced/Auto IBRS + Retpolines</div><div class='add'>+			eibrs,lfence      - Enhanced/Auto IBRS + LFENCE</div><div class='add'>+			ibrs		  - use IBRS to protect kernel</div><div class='ctx'> </div><div class='ctx'> 			Not specifying this option is equivalent to</div><div class='ctx'> 			spectre_v2=auto.</div><div class='hunk'>@@ -5608,6 +5956,30 @@</div><div class='ctx'> 			off:    Disable mitigation and remove</div><div class='ctx'> 				performance impact to RDRAND and RDSEED</div><div class='ctx'> </div><div class='add'>+	srcutree.big_cpu_lim [KNL]</div><div class='add'>+			Specifies the number of CPUs constituting a</div><div class='add'>+			large system, such that srcu_struct structures</div><div class='add'>+			should immediately allocate an srcu_node array.</div><div class='add'>+			This kernel-boot parameter defaults to 128,</div><div class='add'>+			but takes effect only when the low-order four</div><div class='add'>+			bits of srcutree.convert_to_big is equal to 3</div><div class='add'>+			(decide at boot).</div><div class='add'>+</div><div class='add'>+	srcutree.convert_to_big [KNL]</div><div class='add'>+			Specifies under what conditions an SRCU tree</div><div class='add'>+			srcu_struct structure will be converted to big</div><div class='add'>+			form, that is, with an rcu_node tree:</div><div class='add'>+</div><div class='add'>+				   0:  Never.</div><div class='add'>+				   1:  At init_srcu_struct() time.</div><div class='add'>+				   2:  When rcutorture decides to.</div><div class='add'>+				   3:  Decide at boot time (default).</div><div class='add'>+				0x1X:  Above plus if high contention.</div><div class='add'>+</div><div class='add'>+			Either way, the srcu_node tree will be sized based</div><div class='add'>+			on the actual runtime number of CPUs (nr_cpu_ids)</div><div class='add'>+			instead of the compile-time CONFIG_NR_CPUS.</div><div class='add'>+</div><div class='ctx'> 	srcutree.counter_wrap_check [KNL]</div><div class='ctx'> 			Specifies how frequently to check for</div><div class='ctx'> 			grace-period sequence counter wrap for the</div><div class='hunk'>@@ -5625,6 +5997,32 @@</div><div class='ctx'> 			expediting.  Set to zero to disable automatic</div><div class='ctx'> 			expediting.</div><div class='ctx'> </div><div class='add'>+	srcutree.srcu_max_nodelay [KNL]</div><div class='add'>+			Specifies the number of no-delay instances</div><div class='add'>+			per jiffy for which the SRCU grace period</div><div class='add'>+			worker thread will be rescheduled with zero</div><div class='add'>+			delay. Beyond this limit, worker thread will</div><div class='add'>+			be rescheduled with a sleep delay of one jiffy.</div><div class='add'>+</div><div class='add'>+	srcutree.srcu_max_nodelay_phase [KNL]</div><div class='add'>+			Specifies the per-grace-period phase, number of</div><div class='add'>+			non-sleeping polls of readers. Beyond this limit,</div><div class='add'>+			grace period worker thread will be rescheduled</div><div class='add'>+			with a sleep delay of one jiffy, between each</div><div class='add'>+			rescan of the readers, for a grace period phase.</div><div class='add'>+</div><div class='add'>+	srcutree.srcu_retry_check_delay [KNL]</div><div class='add'>+			Specifies number of microseconds of non-sleeping</div><div class='add'>+			delay between each non-sleeping poll of readers.</div><div class='add'>+</div><div class='add'>+	srcutree.small_contention_lim [KNL]</div><div class='add'>+			Specifies the number of update-side contention</div><div class='add'>+			events per jiffy will be tolerated before</div><div class='add'>+			initiating a conversion of an srcu_struct</div><div class='add'>+			structure to big form.	Note that the value of</div><div class='add'>+			srcutree.convert_to_big must have the 0x10 bit</div><div class='add'>+			set for contention-based conversions to occur.</div><div class='add'>+</div><div class='ctx'> 	ssbd=		[ARM64,HW]</div><div class='ctx'> 			Speculative Store Bypass Disable control</div><div class='ctx'> </div><div class='hunk'>@@ -5688,6 +6086,16 @@</div><div class='ctx'> 			be used to filter out binaries which have</div><div class='ctx'> 			not yet been made aware of AT_MINSIGSTKSZ.</div><div class='ctx'> </div><div class='add'>+	stress_hpt	[PPC]</div><div class='add'>+			Limits the number of kernel HPT entries in the hash</div><div class='add'>+			page table to increase the rate of hash page table</div><div class='add'>+			faults on kernel addresses.</div><div class='add'>+</div><div class='add'>+	stress_slb	[PPC]</div><div class='add'>+			Limits the number of kernel SLB entries, and flushes</div><div class='add'>+			them frequently to increase the rate of SLB faults</div><div class='add'>+			on kernel addresses.</div><div class='add'>+</div><div class='ctx'> 	sunrpc.min_resvport=</div><div class='ctx'> 	sunrpc.max_resvport=</div><div class='ctx'> 			[NFS,SUNRPC]</div><div class='hunk'>@@ -5743,14 +6151,12 @@</div><div class='ctx'> 			This parameter controls use of the Protected</div><div class='ctx'> 			Execution Facility on pSeries.</div><div class='ctx'> </div><div class='del'>-	swapaccount=[0|1]</div><div class='del'>-			[KNL] Enable accounting of swap in memory resource</div><div class='del'>-			controller if no parameter or 1 is given or disable</div><div class='del'>-			it if 0 is given (See Documentation/admin-guide/cgroup-v1/memory.rst)</div><div class='del'>-</div><div class='ctx'> 	swiotlb=	[ARM,IA-64,PPC,MIPS,X86]</div><div class='del'>-			Format: { &lt;int&gt; | force | noforce }</div><div class='add'>+			Format: { &lt;int&gt; [,&lt;int&gt;] | force | noforce }</div><div class='ctx'> 			&lt;int&gt; -- Number of I/O TLB slabs</div><div class='add'>+			&lt;int&gt; -- Second integer after comma. Number of swiotlb</div><div class='add'>+				 areas with their own lock. Will be rounded up</div><div class='add'>+				 to a power of 2.</div><div class='ctx'> 			force -- force using of bounce buffers even if they</div><div class='ctx'> 			         wouldn't be automatically used by the kernel</div><div class='ctx'> 			noforce -- Never use bounce buffers (for debugging)</div><div class='hunk'>@@ -5766,15 +6172,6 @@</div><div class='ctx'> 			later by a loaded module cannot be set this way.</div><div class='ctx'> 			Example: sysctl.vm.swappiness=40</div><div class='ctx'> </div><div class='del'>-	sysfs.deprecated=0|1 [KNL]</div><div class='del'>-			Enable/disable old style sysfs layout for old udev</div><div class='del'>-			on older distributions. When this option is enabled</div><div class='del'>-			very new udev will not work anymore. When this option</div><div class='del'>-			is disabled (or CONFIG_SYSFS_DEPRECATED not compiled)</div><div class='del'>-			in older udev will not work anymore.</div><div class='del'>-			Default depends on CONFIG_SYSFS_DEPRECATED_V2 set in</div><div class='del'>-			the kernel configuration.</div><div class='del'>-</div><div class='ctx'> 	sysrq_always_enabled</div><div class='ctx'> 			[KNL]</div><div class='ctx'> 			Ignore sysrq setting - this boot parameter will</div><div class='hunk'>@@ -5790,7 +6187,8 @@</div><div class='ctx'> </div><div class='ctx'> 	tdfx=		[HW,DRM]</div><div class='ctx'> </div><div class='del'>-	test_suspend=	[SUSPEND][,N]</div><div class='add'>+	test_suspend=	[SUSPEND]</div><div class='add'>+			Format: { "mem" | "standby" | "freeze" }[,N]</div><div class='ctx'> 			Specify "mem" (for Suspend-to-RAM) or "standby" (for</div><div class='ctx'> 			standby suspend) or "freeze" (for suspend type freeze)</div><div class='ctx'> 			as the system sleep state during system startup with</div><div class='hunk'>@@ -5874,22 +6272,95 @@</div><div class='ctx'> 			This will guarantee that all the other pcrs</div><div class='ctx'> 			are saved.</div><div class='ctx'> </div><div class='add'>+	tp_printk	[FTRACE]</div><div class='add'>+			Have the tracepoints sent to printk as well as the</div><div class='add'>+			tracing ring buffer. This is useful for early boot up</div><div class='add'>+			where the system hangs or reboots and does not give the</div><div class='add'>+			option for reading the tracing buffer or performing a</div><div class='add'>+			ftrace_dump_on_oops.</div><div class='add'>+</div><div class='add'>+			To turn off having tracepoints sent to printk,</div><div class='add'>+			 echo 0 &gt; /proc/sys/kernel/tracepoint_printk</div><div class='add'>+			Note, echoing 1 into this file without the</div><div class='add'>+			tracepoint_printk kernel cmdline option has no effect.</div><div class='add'>+</div><div class='add'>+			The tp_printk_stop_on_boot (see below) can also be used</div><div class='add'>+			to stop the printing of events to console at</div><div class='add'>+			late_initcall_sync.</div><div class='add'>+</div><div class='add'>+			** CAUTION **</div><div class='add'>+</div><div class='add'>+			Having tracepoints sent to printk() and activating high</div><div class='add'>+			frequency tracepoints such as irq or sched, can cause</div><div class='add'>+			the system to live lock.</div><div class='add'>+</div><div class='add'>+	tp_printk_stop_on_boot [FTRACE]</div><div class='add'>+			When tp_printk (above) is set, it can cause a lot of noise</div><div class='add'>+			on the console. It may be useful to only include the</div><div class='add'>+			printing of events during boot up, as user space may</div><div class='add'>+			make the system inoperable.</div><div class='add'>+</div><div class='add'>+			This command line option will stop the printing of events</div><div class='add'>+			to console at the late_initcall_sync() time frame.</div><div class='add'>+</div><div class='ctx'> 	trace_buf_size=nn[KMG]</div><div class='ctx'> 			[FTRACE] will set tracing buffer size on each cpu.</div><div class='ctx'> </div><div class='add'>+	trace_clock=	[FTRACE] Set the clock used for tracing events</div><div class='add'>+			at boot up.</div><div class='add'>+			local - Use the per CPU time stamp counter</div><div class='add'>+				(converted into nanoseconds). Fast, but</div><div class='add'>+				depending on the architecture, may not be</div><div class='add'>+				in sync between CPUs.</div><div class='add'>+			global - Event time stamps are synchronize across</div><div class='add'>+				CPUs. May be slower than the local clock,</div><div class='add'>+				but better for some race conditions.</div><div class='add'>+			counter - Simple counting of events (1, 2, ..)</div><div class='add'>+				note, some counts may be skipped due to the</div><div class='add'>+				infrastructure grabbing the clock more than</div><div class='add'>+				once per event.</div><div class='add'>+			uptime - Use jiffies as the time stamp.</div><div class='add'>+			perf - Use the same clock that perf uses.</div><div class='add'>+			mono - Use ktime_get_mono_fast_ns() for time stamps.</div><div class='add'>+			mono_raw - Use ktime_get_raw_fast_ns() for time</div><div class='add'>+				stamps.</div><div class='add'>+			boot - Use ktime_get_boot_fast_ns() for time stamps.</div><div class='add'>+			Architectures may add more clocks. See</div><div class='add'>+			Documentation/trace/ftrace.rst for more details.</div><div class='add'>+</div><div class='ctx'> 	trace_event=[event-list]</div><div class='ctx'> 			[FTRACE] Set and start specified trace events in order</div><div class='ctx'> 			to facilitate early boot debugging. The event-list is a</div><div class='ctx'> 			comma-separated list of trace events to enable. See</div><div class='ctx'> 			also Documentation/trace/events.rst</div><div class='ctx'> </div><div class='add'>+	trace_instance=[instance-info]</div><div class='add'>+			[FTRACE] Create a ring buffer instance early in boot up.</div><div class='add'>+			This will be listed in:</div><div class='add'>+</div><div class='add'>+				/sys/kernel/tracing/instances</div><div class='add'>+</div><div class='add'>+			Events can be enabled at the time the instance is created</div><div class='add'>+			via:</div><div class='add'>+</div><div class='add'>+				trace_instance=&lt;name&gt;,&lt;system1&gt;:&lt;event1&gt;,&lt;system2&gt;:&lt;event2&gt;</div><div class='add'>+</div><div class='add'>+			Note, the "&lt;system*&gt;:" portion is optional if the event is</div><div class='add'>+			unique.</div><div class='add'>+</div><div class='add'>+				trace_instance=foo,sched:sched_switch,irq_handler_entry,initcall</div><div class='add'>+</div><div class='add'>+			will enable the "sched_switch" event (note, the "sched:" is optional, and</div><div class='add'>+			the same thing would happen if it was left off). The irq_handler_entry</div><div class='add'>+			event, and all events under the "initcall" system.</div><div class='add'>+</div><div class='ctx'> 	trace_options=[option-list]</div><div class='ctx'> 			[FTRACE] Enable or disable tracer options at boot.</div><div class='ctx'> 			The option-list is a comma delimited list of options</div><div class='ctx'> 			that can be enabled or disabled just as if you were</div><div class='ctx'> 			to echo the option name into</div><div class='ctx'> </div><div class='del'>-			    /sys/kernel/debug/tracing/trace_options</div><div class='add'>+			    /sys/kernel/tracing/trace_options</div><div class='ctx'> </div><div class='ctx'> 			For example, to enable stacktrace option (to dump the</div><div class='ctx'> 			stack trace of each event), add to the command line:</div><div class='hunk'>@@ -5899,42 +6370,30 @@</div><div class='ctx'> 			See also Documentation/trace/ftrace.rst "trace options"</div><div class='ctx'> 			section.</div><div class='ctx'> </div><div class='del'>-	tp_printk[FTRACE]</div><div class='del'>-			Have the tracepoints sent to printk as well as the</div><div class='del'>-			tracing ring buffer. This is useful for early boot up</div><div class='del'>-			where the system hangs or reboots and does not give the</div><div class='del'>-			option for reading the tracing buffer or performing a</div><div class='del'>-			ftrace_dump_on_oops.</div><div class='add'>+	trace_trigger=[trigger-list]</div><div class='add'>+			[FTRACE] Add a event trigger on specific events.</div><div class='add'>+			Set a trigger on top of a specific event, with an optional</div><div class='add'>+			filter.</div><div class='ctx'> </div><div class='del'>-			To turn off having tracepoints sent to printk,</div><div class='del'>-			 echo 0 &gt; /proc/sys/kernel/tracepoint_printk</div><div class='del'>-			Note, echoing 1 into this file without the</div><div class='del'>-			tracepoint_printk kernel cmdline option has no effect.</div><div class='add'>+			The format is is "trace_trigger=&lt;event&gt;.&lt;trigger&gt;[ if &lt;filter&gt;],..."</div><div class='add'>+			Where more than one trigger may be specified that are comma deliminated.</div><div class='ctx'> </div><div class='del'>-			The tp_printk_stop_on_boot (see below) can also be used</div><div class='del'>-			to stop the printing of events to console at</div><div class='del'>-			late_initcall_sync.</div><div class='add'>+			For example:</div><div class='ctx'> </div><div class='del'>-			** CAUTION **</div><div class='add'>+			  trace_trigger="sched_switch.stacktrace if prev_state == 2"</div><div class='ctx'> </div><div class='del'>-			Having tracepoints sent to printk() and activating high</div><div class='del'>-			frequency tracepoints such as irq or sched, can cause</div><div class='del'>-			the system to live lock.</div><div class='add'>+			The above will enable the "stacktrace" trigger on the "sched_switch"</div><div class='add'>+			event but only trigger it if the "prev_state" of the "sched_switch"</div><div class='add'>+			event is "2" (TASK_UNINTERUPTIBLE).</div><div class='ctx'> </div><div class='del'>-	tp_printk_stop_on_boot[FTRACE]</div><div class='del'>-			When tp_printk (above) is set, it can cause a lot of noise</div><div class='del'>-			on the console. It may be useful to only include the</div><div class='del'>-			printing of events during boot up, as user space may</div><div class='del'>-			make the system inoperable.</div><div class='add'>+			See also "Event triggers" in Documentation/trace/events.rst</div><div class='ctx'> </div><div class='del'>-			This command line option will stop the printing of events</div><div class='del'>-			to console at the late_initcall_sync() time frame.</div><div class='ctx'> </div><div class='ctx'> 	traceoff_on_warning</div><div class='ctx'> 			[FTRACE] enable this option to disable tracing when a</div><div class='ctx'> 			warning is hit. This turns off "tracing_on". Tracing can</div><div class='ctx'> 			be enabled again by echoing '1' into the "tracing_on"</div><div class='del'>-			file located in /sys/kernel/debug/tracing/</div><div class='add'>+			file located in /sys/kernel/tracing/</div><div class='ctx'> </div><div class='ctx'> 			This option is useful, as it disables the trace before</div><div class='ctx'> 			the WARNING dump is called, which prevents the trace to</div><div class='hunk'>@@ -5958,11 +6417,22 @@</div><div class='ctx'> 			sources:</div><div class='ctx'> 			- "tpm"</div><div class='ctx'> 			- "tee"</div><div class='add'>+			- "caam"</div><div class='ctx'> 			If not specified then it defaults to iterating through</div><div class='ctx'> 			the trust source list starting with TPM and assigns the</div><div class='ctx'> 			first trust source as a backend which is initialized</div><div class='ctx'> 			successfully during iteration.</div><div class='ctx'> </div><div class='add'>+	trusted.rng=	[KEYS]</div><div class='add'>+			Format: &lt;string&gt;</div><div class='add'>+			The RNG used to generate key material for trusted keys.</div><div class='add'>+			Can be one of:</div><div class='add'>+			- "kernel"</div><div class='add'>+			- the same value as trusted.source: "tpm" or "tee"</div><div class='add'>+			- "default"</div><div class='add'>+			If not specified, "default" is used. In this case,</div><div class='add'>+			the RNG's choice is left to each individual trust source.</div><div class='add'>+</div><div class='ctx'> 	tsc=		Disable clocksource stability checks for TSC.</div><div class='ctx'> 			Format: &lt;string&gt;</div><div class='ctx'> 			[x86] reliable: mark tsc clocksource as reliable, this</div><div class='hunk'>@@ -5981,6 +6451,16 @@</div><div class='ctx'> 			in situations with strict latency requirements (where</div><div class='ctx'> 			interruptions from clocksource watchdog are not</div><div class='ctx'> 			acceptable).</div><div class='add'>+			[x86] recalibrate: force recalibration against a HW timer</div><div class='add'>+			(HPET or PM timer) on systems whose TSC frequency was</div><div class='add'>+			obtained from HW or FW using either an MSR or CPUID(0x15).</div><div class='add'>+			Warn if the difference is more than 500 ppm.</div><div class='add'>+			[x86] watchdog: Use TSC as the watchdog clocksource with</div><div class='add'>+			which to check other HW timers (HPET or PM timer), but</div><div class='add'>+			only on systems where TSC has been deemed trustworthy.</div><div class='add'>+			This will be suppressed by an earlier tsc=nowatchdog and</div><div class='add'>+			can be overridden by a later tsc=nowatchdog.  A console</div><div class='add'>+			message will flag any such suppression or overriding.</div><div class='ctx'> </div><div class='ctx'> 	tsc_early_khz=  [X86] Skip early TSC calibration and use the given</div><div class='ctx'> 			value instead. Useful when the early TSC frequency discovery</div><div class='hunk'>@@ -6270,7 +6750,7 @@</div><div class='ctx'> 					HIGHMEM regardless of setting</div><div class='ctx'> 					of CONFIG_HIGHPTE.</div><div class='ctx'> </div><div class='del'>-	vdso=		[X86,SH]</div><div class='add'>+	vdso=		[X86,SH,SPARC]</div><div class='ctx'> 			On X86_32, this is an alias for vdso32=.  Otherwise:</div><div class='ctx'> </div><div class='ctx'> 			vdso=1: enable VDSO (the default)</div><div class='hunk'>@@ -6296,11 +6776,12 @@</div><div class='ctx'> 	video=		[FB] Frame buffer configuration</div><div class='ctx'> 			See Documentation/fb/modedb.rst.</div><div class='ctx'> </div><div class='del'>-	video.brightness_switch_enabled= [0,1]</div><div class='add'>+	video.brightness_switch_enabled= [ACPI]</div><div class='add'>+			Format: [0|1]</div><div class='ctx'> 			If set to 1, on receiving an ACPI notify event</div><div class='ctx'> 			generated by hotkey, video driver will adjust brightness</div><div class='ctx'> 			level and then send out the event to user space through</div><div class='del'>-			the allocated input device; If set to 0, video driver</div><div class='add'>+			the allocated input device. If set to 0, video driver</div><div class='ctx'> 			will only send out the event without touching backlight</div><div class='ctx'> 			brightness level.</div><div class='ctx'> 			default: 1</div><div class='hunk'>@@ -6322,7 +6803,7 @@</div><div class='ctx'> 			Can be used multiple times for multiple devices.</div><div class='ctx'> </div><div class='ctx'> 	vga=		[BOOT,X86-32] Select a particular video mode</div><div class='del'>-			See Documentation/x86/boot.rst and</div><div class='add'>+			See Documentation/arch/x86/boot.rst and</div><div class='ctx'> 			Documentation/admin-guide/svga.rst.</div><div class='ctx'> 			Use vga=ask for menu.</div><div class='ctx'> 			This is actually a boot loader parameter; the value is</div><div class='hunk'>@@ -6367,11 +6848,11 @@</div><div class='ctx'> 			functions are at fixed addresses, they make nice</div><div class='ctx'> 			targets for exploits that can control RIP.</div><div class='ctx'> </div><div class='del'>-			emulate     [default] Vsyscalls turn into traps and are</div><div class='del'>-			            emulated reasonably safely.  The vsyscall</div><div class='del'>-				    page is readable.</div><div class='add'>+			emulate     Vsyscalls turn into traps and are emulated</div><div class='add'>+			            reasonably safely.  The vsyscall page is</div><div class='add'>+				    readable.</div><div class='ctx'> </div><div class='del'>-			xonly       Vsyscalls turn into traps and are</div><div class='add'>+			xonly       [default] Vsyscalls turn into traps and are</div><div class='ctx'> 			            emulated reasonably safely.  The vsyscall</div><div class='ctx'> 				    page is not readable.</div><div class='ctx'> </div><div class='hunk'>@@ -6485,6 +6966,12 @@</div><div class='ctx'> 			When enabled, memory and cache locality will be</div><div class='ctx'> 			impacted.</div><div class='ctx'> </div><div class='add'>+	writecombine=	[LOONGARCH] Control the MAT (Memory Access Type) of</div><div class='add'>+			ioremap_wc().</div><div class='add'>+</div><div class='add'>+			on   - Enable writecombine, use WUC for ioremap_wc()</div><div class='add'>+			off  - Disable writecombine, use SUC for ioremap_wc()</div><div class='add'>+</div><div class='ctx'> 	x2apic_phys	[X86-64,APIC] Use x2apic physical mode instead of</div><div class='ctx'> 			default x2apic cluster mode on platforms</div><div class='ctx'> 			supporting x2apic.</div><div class='hunk'>@@ -6512,6 +6999,12 @@</div><div class='ctx'> 			Crash from Xen panic notifier, without executing late</div><div class='ctx'> 			panic() code such as dumping handler.</div><div class='ctx'> </div><div class='add'>+	xen_msr_safe=	[X86,XEN]</div><div class='add'>+			Format: &lt;bool&gt;</div><div class='add'>+			Select whether to always use non-faulting (safe) MSR</div><div class='add'>+			access functions when running as Xen PV guest. The</div><div class='add'>+			default value is controlled by CONFIG_XEN_PV_MSR_SAFE.</div><div class='add'>+</div><div class='ctx'> 	xen_nopvspin	[X86,XEN]</div><div class='ctx'> 			Disables the qspinlock slowpath using Xen PV optimizations.</div><div class='ctx'> 			This parameter is obsoleted by "nopvspin" parameter, which</div><div class='hunk'>@@ -6562,16 +7055,6 @@</div><div class='ctx'> 			fairer and the number of possible event channels is</div><div class='ctx'> 			much higher. Default is on (use fifo events).</div><div class='ctx'> </div><div class='del'>-	nopv=		[X86,XEN,KVM,HYPER_V,VMWARE]</div><div class='del'>-			Disables the PV optimizations forcing the guest to run</div><div class='del'>-			as generic guest with no PV drivers. Currently support</div><div class='del'>-			XEN HVM, KVM, HYPER_V and VMWARE guest.</div><div class='del'>-</div><div class='del'>-	nopvspin	[X86,XEN,KVM]</div><div class='del'>-			Disables the qspinlock slow path using PV optimizations</div><div class='del'>-			which allow the hypervisor to 'idle' the guest on lock</div><div class='del'>-			contention.</div><div class='del'>-</div><div class='ctx'> 	xirc2ps_cs=	[NET,PCMCIA]</div><div class='ctx'> 			Format:</div><div class='ctx'> 			&lt;irq&gt;,&lt;irq_mask&gt;,&lt;io&gt;,&lt;full_duplex&gt;,&lt;do_sound&gt;,&lt;lockup_hack&gt;[,&lt;irq2&gt;[,&lt;irq3&gt;[,&lt;irq4&gt;]]]</div><div class='hunk'>@@ -6614,3 +7097,4 @@</div><div class='ctx'> 				memory, and other data can't be written using</div><div class='ctx'> 				xmon commands.</div><div class='ctx'> 			off	xmon is disabled.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/admin-guide/kernel-per-CPU-kthreads.rst b/Documentation/admin-guide/kernel-per-CPU-kthreads.rst<br/>index e4a5fc26f1a9..993c2a05f5ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kernel-per-CPU-kthreads.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/kernel-per-CPU-kthreads.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/kernel-per-CPU-kthreads.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/kernel-per-CPU-kthreads.rst</a></div><div class='hunk'>@@ -25,7 +25,7 @@ References</div><div class='ctx'> </div><div class='ctx'> -	In order to locate kernel-generated OS jitter on CPU N:</div><div class='ctx'> </div><div class='del'>-		cd /sys/kernel/debug/tracing</div><div class='add'>+		cd /sys/kernel/tracing</div><div class='ctx'> 		echo 1 &gt; max_graph_depth # Increase the "1" for more detail</div><div class='ctx'> 		echo function_graph &gt; current_tracer</div><div class='ctx'> 		# run workload</div><div class='head'>diff --git a/Documentation/admin-guide/laptops/thinkpad-acpi.rst b/Documentation/admin-guide/laptops/thinkpad-acpi.rst<br/>index 475eb0e81e4a..e27a1c3f634e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/laptops/thinkpad-acpi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/laptops/thinkpad-acpi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/laptops/thinkpad-acpi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/laptops/thinkpad-acpi.rst</a></div><div class='hunk'>@@ -1488,7 +1488,7 @@ Example of command to set keyboard language is mentioned below::</div><div class='ctx'> Text corresponding to keyboard layout to be set in sysfs are: be(Belgian),</div><div class='ctx'> cz(Czech), da(Danish), de(German), en(English), es(Spain), et(Estonian),</div><div class='ctx'> fr(French), fr-ch(French(Switzerland)), hu(Hungarian), it(Italy), jp (Japan),</div><div class='del'>-nl(Dutch), nn(Norway), pl(Polish), pt(portugese), sl(Slovenian), sv(Sweden),</div><div class='add'>+nl(Dutch), nn(Norway), pl(Polish), pt(portuguese), sl(Slovenian), sv(Sweden),</div><div class='ctx'> tr(Turkey)</div><div class='ctx'> </div><div class='ctx'> WWAN Antenna type</div><div class='head'>diff --git a/Documentation/admin-guide/md.rst b/Documentation/admin-guide/md.rst<br/>index d8fc9a59c086..4ff2cc291d18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/md.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/md.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/md.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/md.rst</a></div><div class='hunk'>@@ -317,7 +317,7 @@ All md devices contain:</div><div class='ctx'>      suspended (not supported yet)</div><div class='ctx'>          All IO requests will block. The array can be reconfigured.</div><div class='ctx'> </div><div class='del'>-         Writing this, if accepted, will block until array is quiessent</div><div class='add'>+         Writing this, if accepted, will block until array is quiescent</div><div class='ctx'> </div><div class='ctx'>      readonly</div><div class='ctx'>          no resync can happen.  no superblocks get written.</div><div class='head'>diff --git a/Documentation/admin-guide/media/bttv.rst b/Documentation/admin-guide/media/bttv.rst<br/>index 125f6f47123d..58cbaf6df694 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/bttv.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/bttv.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/bttv.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/bttv.rst</a></div><div class='hunk'>@@ -909,7 +909,7 @@ DE hat diverse Treiber fuer diese Modelle (Stand 09/2002):</div><div class='ctx'>   - TVPhone98 (Bt878)</div><div class='ctx'>   - AVerTV und TVCapture98 w/VCR (Bt 878)</div><div class='ctx'>   - AVerTVStudio und TVPhone98 w/VCR (Bt878)</div><div class='del'>-  - AVerTV GO Serie (Kein SVideo Input)</div><div class='add'>+  - AVerTV GO Series (Kein SVideo Input)</div><div class='ctx'>   - AVerTV98 (BT-878 chip)</div><div class='ctx'>   - AVerTV98 mit Fernbedienung (BT-878 chip)</div><div class='ctx'>   - AVerTV/FM98 (BT-878 chip)</div><div class='head'>diff --git a/Documentation/admin-guide/media/building.rst b/Documentation/admin-guide/media/building.rst<br/>index 2d660b76caea..a06473429916 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/building.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/building.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/building.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/building.rst</a></div><div class='hunk'>@@ -137,7 +137,7 @@ The ``LIRC user interface`` option adds enhanced functionality when using the</div><div class='ctx'> from remote controllers.</div><div class='ctx'> </div><div class='ctx'> The ``Support for eBPF programs attached to lirc devices`` option allows</div><div class='del'>-the usage of special programs (called eBPF) that would allow aplications</div><div class='add'>+the usage of special programs (called eBPF) that would allow applications</div><div class='ctx'> to add extra remote controller decoding functionality to the Linux Kernel.</div><div class='ctx'> </div><div class='ctx'> The ``Remote controller decoders`` option allows selecting the</div><div class='head'>diff --git a/Documentation/admin-guide/media/cec-drivers.rst b/Documentation/admin-guide/media/cec-drivers.rst<br/>deleted file mode 100644<br/>index 8d9686c08df9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/cec-drivers.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/cec-drivers.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-=================================</div><div class='del'>-CEC driver-specific documentation</div><div class='del'>-=================================</div><div class='del'>-</div><div class='del'>-.. toctree::</div><div class='del'>-	:maxdepth: 2</div><div class='del'>-</div><div class='del'>-	pulse8-cec</div><div class='head'>diff --git a/Documentation/admin-guide/media/cec.rst b/Documentation/admin-guide/media/cec.rst<br/>new file mode 100644<br/>index 000000000000..6b30e355cf23<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/cec.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/cec.rst</a></div><div class='hunk'>@@ -0,0 +1,380 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+========</div><div class='add'>+HDMI CEC</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Supported hardware in mainline</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+HDMI Transmitters:</div><div class='add'>+</div><div class='add'>+- Exynos4</div><div class='add'>+- Exynos5</div><div class='add'>+- STIH4xx HDMI CEC</div><div class='add'>+- V4L2 adv7511 (same HW, but a different driver from the drm adv7511)</div><div class='add'>+- stm32</div><div class='add'>+- Allwinner A10 (sun4i)</div><div class='add'>+- Raspberry Pi</div><div class='add'>+- dw-hdmi (Synopsis IP)</div><div class='add'>+- amlogic (meson ao-cec and ao-cec-g12a)</div><div class='add'>+- drm adv7511/adv7533</div><div class='add'>+- omap4</div><div class='add'>+- tegra</div><div class='add'>+- rk3288, rk3399</div><div class='add'>+- tda998x</div><div class='add'>+- DisplayPort CEC-Tunneling-over-AUX on i915, nouveau and amdgpu</div><div class='add'>+- ChromeOS EC CEC</div><div class='add'>+- CEC for SECO boards (UDOO x86).</div><div class='add'>+- Chrontel CH7322</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+HDMI Receivers:</div><div class='add'>+</div><div class='add'>+- adv7604/11/12</div><div class='add'>+- adv7842</div><div class='add'>+- tc358743</div><div class='add'>+</div><div class='add'>+USB Dongles (see below for additional information on how to use these</div><div class='add'>+dongles):</div><div class='add'>+</div><div class='add'>+- Pulse-Eight: the pulse8-cec driver implements the following module option:</div><div class='add'>+  ``persistent_config``: by default this is off, but when set to 1 the driver</div><div class='add'>+  will store the current settings to the device's internal eeprom and restore</div><div class='add'>+  it the next time the device is connected to the USB port.</div><div class='add'>+- RainShadow Tech. Note: this driver does not support the persistent_config</div><div class='add'>+  module option of the Pulse-Eight driver. The hardware supports it, but I</div><div class='add'>+  have no plans to add this feature. But I accept patches :-)</div><div class='add'>+</div><div class='add'>+Miscellaneous:</div><div class='add'>+</div><div class='add'>+- vivid: emulates a CEC receiver and CEC transmitter.</div><div class='add'>+  Can be used to test CEC applications without actual CEC hardware.</div><div class='add'>+</div><div class='add'>+- cec-gpio. If the CEC pin is hooked up to a GPIO pin then</div><div class='add'>+  you can control the CEC line through this driver. This supports error</div><div class='add'>+  injection as well.</div><div class='add'>+</div><div class='add'>+- cec-gpio and Allwinner A10 (or any other driver that uses the CEC pin</div><div class='add'>+  framework to drive the CEC pin directly): the CEC pin framework uses</div><div class='add'>+  high-resolution timers. These timers are affected by NTP daemons that</div><div class='add'>+  speed up or slow down the clock to sync with the official time. The</div><div class='add'>+  chronyd server will by default increase or decrease the clock by</div><div class='add'>+  1/12th. This will cause the CEC timings to go out of spec. To fix this,</div><div class='add'>+  add a 'maxslewrate 40000' line to chronyd.conf. This limits the clock</div><div class='add'>+  frequency change to 1/25th, which keeps the CEC timings within spec.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Utilities</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+Utilities are available here: https://git.linuxtv.org/v4l-utils.git</div><div class='add'>+</div><div class='add'>+``utils/cec-ctl``: control a CEC device</div><div class='add'>+</div><div class='add'>+``utils/cec-compliance``: test compliance of a remote CEC device</div><div class='add'>+</div><div class='add'>+``utils/cec-follower``: emulate a CEC follower device</div><div class='add'>+</div><div class='add'>+Note that ``cec-ctl`` has support for the CEC Hospitality Profile as is</div><div class='add'>+used in some hotel displays. See http://www.htng.org.</div><div class='add'>+</div><div class='add'>+Note that the libcec library (https://github.com/Pulse-Eight/libcec) supports</div><div class='add'>+the linux CEC framework.</div><div class='add'>+</div><div class='add'>+If you want to get the CEC specification, then look at the References of</div><div class='add'>+the HDMI wikipedia page: https://en.wikipedia.org/wiki/HDMI. CEC is part</div><div class='add'>+of the HDMI specification. HDMI 1.3 is freely available (very similar to</div><div class='add'>+HDMI 1.4 w.r.t. CEC) and should be good enough for most things.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+DisplayPort to HDMI Adapters with working CEC</div><div class='add'>+=============================================</div><div class='add'>+</div><div class='add'>+Background: most adapters do not support the CEC Tunneling feature,</div><div class='add'>+and of those that do many did not actually connect the CEC pin.</div><div class='add'>+Unfortunately, this means that while a CEC device is created, it</div><div class='add'>+is actually all alone in the world and will never be able to see other</div><div class='add'>+CEC devices.</div><div class='add'>+</div><div class='add'>+This is a list of known working adapters that have CEC Tunneling AND</div><div class='add'>+that properly connected the CEC pin. If you find adapters that work</div><div class='add'>+but are not in this list, then drop me a note.</div><div class='add'>+</div><div class='add'>+To test: hook up your DP-to-HDMI adapter to a CEC capable device</div><div class='add'>+(typically a TV), then run::</div><div class='add'>+</div><div class='add'>+	cec-ctl --playback	# Configure the PC as a CEC Playback device</div><div class='add'>+	cec-ctl -S		# Show the CEC topology</div><div class='add'>+</div><div class='add'>+The ``cec-ctl -S`` command should show at least two CEC devices,</div><div class='add'>+ourselves and the CEC device you are connected to (i.e. typically the TV).</div><div class='add'>+</div><div class='add'>+General note: I have only seen this work with the Parade PS175, PS176 and</div><div class='add'>+PS186 chipsets and the MegaChips 2900. While MegaChips 28x0 claims CEC support,</div><div class='add'>+I have never seen it work.</div><div class='add'>+</div><div class='add'>+USB-C to HDMI</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Samsung Multiport Adapter EE-PW700: https://www.samsung.com/ie/support/model/EE-PW700BBEGWW/</div><div class='add'>+</div><div class='add'>+Kramer ADC-U31C/HF: https://www.kramerav.com/product/ADC-U31C/HF</div><div class='add'>+</div><div class='add'>+Club3D CAC-2504: https://www.club-3d.com/en/detail/2449/usb_3.1_type_c_to_hdmi_2.0_uhd_4k_60hz_active_adapter/</div><div class='add'>+</div><div class='add'>+DisplayPort to HDMI</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+Club3D CAC-1080: https://www.club-3d.com/en/detail/2442/displayport_1.4_to_hdmi_2.0b_hdr/</div><div class='add'>+</div><div class='add'>+CableCreation (SKU: CD0712): https://www.cablecreation.com/products/active-displayport-to-hdmi-adapter-4k-hdr</div><div class='add'>+</div><div class='add'>+HP DisplayPort to HDMI True 4k Adapter (P/N 2JA63AA): https://www.hp.com/us-en/shop/pdp/hp-displayport-to-hdmi-true-4k-adapter</div><div class='add'>+</div><div class='add'>+Mini-DisplayPort to HDMI</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Club3D CAC-1180: https://www.club-3d.com/en/detail/2443/mini_displayport_1.4_to_hdmi_2.0b_hdr/</div><div class='add'>+</div><div class='add'>+Note that passive adapters will never work, you need an active adapter.</div><div class='add'>+</div><div class='add'>+The Club3D adapters in this list are all MegaChips 2900 based. Other Club3D adapters</div><div class='add'>+are PS176 based and do NOT have the CEC pin hooked up, so only the three Club3D</div><div class='add'>+adapters above are known to work.</div><div class='add'>+</div><div class='add'>+I suspect that MegaChips 2900 based designs in general are likely to work</div><div class='add'>+whereas with the PS176 it is more hit-and-miss (mostly miss). The PS186 is</div><div class='add'>+likely to have the CEC pin hooked up, it looks like they changed the reference</div><div class='add'>+design for that chipset.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+USB CEC Dongles</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+These dongles appear as ``/dev/ttyACMX`` devices and need the ``inputattach``</div><div class='add'>+utility to create the ``/dev/cecX`` devices. Support for the Pulse-Eight</div><div class='add'>+has been added to ``inputattach`` 1.6.0. Support for the Rainshadow Tech has</div><div class='add'>+been added to ``inputattach`` 1.6.1.</div><div class='add'>+</div><div class='add'>+You also need udev rules to automatically start systemd services::</div><div class='add'>+</div><div class='add'>+	SUBSYSTEM=="tty", KERNEL=="ttyACM[0-9]*", ATTRS{idVendor}=="2548", ATTRS{idProduct}=="1002", ACTION=="add", TAG+="systemd", ENV{SYSTEMD_WANTS}+="pulse8-cec-inputattach@%k.service"</div><div class='add'>+	SUBSYSTEM=="tty", KERNEL=="ttyACM[0-9]*", ATTRS{idVendor}=="2548", ATTRS{idProduct}=="1001", ACTION=="add", TAG+="systemd", ENV{SYSTEMD_WANTS}+="pulse8-cec-inputattach@%k.service"</div><div class='add'>+	SUBSYSTEM=="tty", KERNEL=="ttyACM[0-9]*", ATTRS{idVendor}=="04d8", ATTRS{idProduct}=="ff59", ACTION=="add", TAG+="systemd", ENV{SYSTEMD_WANTS}+="rainshadow-cec-inputattach@%k.service"</div><div class='add'>+</div><div class='add'>+and these systemd services:</div><div class='add'>+</div><div class='add'>+For Pulse-Eight make /lib/systemd/system/pulse8-cec-inputattach@.service::</div><div class='add'>+</div><div class='add'>+	[Unit]</div><div class='add'>+	Description=inputattach for pulse8-cec device on %I</div><div class='add'>+</div><div class='add'>+	[Service]</div><div class='add'>+	Type=simple</div><div class='add'>+	ExecStart=/usr/bin/inputattach --pulse8-cec /dev/%I</div><div class='add'>+</div><div class='add'>+For the RainShadow Tech make /lib/systemd/system/rainshadow-cec-inputattach@.service::</div><div class='add'>+</div><div class='add'>+	[Unit]</div><div class='add'>+	Description=inputattach for rainshadow-cec device on %I</div><div class='add'>+</div><div class='add'>+	[Service]</div><div class='add'>+	Type=simple</div><div class='add'>+	ExecStart=/usr/bin/inputattach --rainshadow-cec /dev/%I</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+For proper suspend/resume support create: /lib/systemd/system/restart-cec-inputattach.service::</div><div class='add'>+</div><div class='add'>+	[Unit]</div><div class='add'>+	Description=restart inputattach for cec devices</div><div class='add'>+	After=suspend.target</div><div class='add'>+</div><div class='add'>+	[Service]</div><div class='add'>+	Type=forking</div><div class='add'>+	ExecStart=/bin/bash -c 'for d in /dev/serial/by-id/usb-Pulse-Eight*; do /usr/bin/inputattach --daemon --pulse8-cec $d; done; for d in /dev/serial/by-id/usb-RainShadow_Tech*; do /usr/bin/inputattach --daemon --rainshadow-cec $d; done'</div><div class='add'>+</div><div class='add'>+	[Install]</div><div class='add'>+	WantedBy=suspend.target</div><div class='add'>+</div><div class='add'>+And run ``systemctl enable restart-cec-inputattach``.</div><div class='add'>+</div><div class='add'>+To automatically set the physical address of the CEC device whenever the</div><div class='add'>+EDID changes, you can use ``cec-ctl`` with the ``-E`` option::</div><div class='add'>+</div><div class='add'>+	cec-ctl -E /sys/class/drm/card0-DP-1/edid</div><div class='add'>+</div><div class='add'>+This assumes the dongle is connected to the card0-DP-1 output (``xrandr`` will tell</div><div class='add'>+you which output is used) and it will poll for changes to the EDID and update</div><div class='add'>+the Physical Address whenever they occur.</div><div class='add'>+</div><div class='add'>+To automatically run this command you can use cron. Edit crontab with</div><div class='add'>+``crontab -e`` and add this line::</div><div class='add'>+</div><div class='add'>+	@reboot /usr/local/bin/cec-ctl -E /sys/class/drm/card0-DP-1/edid</div><div class='add'>+</div><div class='add'>+This only works for display drivers that expose the EDID in ``/sys/class/drm``,</div><div class='add'>+such as the i915 driver.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+CEC Without HPD</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+Some displays when in standby mode have no HDMI Hotplug Detect signal, but</div><div class='add'>+CEC is still enabled so connected devices can send an &lt;Image View On&gt; CEC</div><div class='add'>+message in order to wake up such displays. Unfortunately, not all CEC</div><div class='add'>+adapters can support this. An example is the Odroid-U3 SBC that has a</div><div class='add'>+level-shifter that is powered off when the HPD signal is low, thus</div><div class='add'>+blocking the CEC pin. Even though the SoC can use CEC without a HPD,</div><div class='add'>+the level-shifter will prevent this from functioning.</div><div class='add'>+</div><div class='add'>+There is a CEC capability flag to signal this: ``CEC_CAP_NEEDS_HPD``.</div><div class='add'>+If set, then the hardware cannot wake up displays with this behavior.</div><div class='add'>+</div><div class='add'>+Note for CEC application implementers: the &lt;Image View On&gt; message must</div><div class='add'>+be the first message you send, don't send any other messages before.</div><div class='add'>+Certain very bad but unfortunately not uncommon CEC implementations</div><div class='add'>+get very confused if they receive anything else but this message and</div><div class='add'>+they won't wake up.</div><div class='add'>+</div><div class='add'>+When writing a driver it can be tricky to test this. There are two</div><div class='add'>+ways to do this:</div><div class='add'>+</div><div class='add'>+1) Get a Pulse-Eight USB CEC dongle, connect an HDMI cable from your</div><div class='add'>+   device to the Pulse-Eight, but do not connect the Pulse-Eight to</div><div class='add'>+   the display.</div><div class='add'>+</div><div class='add'>+   Now configure the Pulse-Eight dongle::</div><div class='add'>+</div><div class='add'>+	cec-ctl -p0.0.0.0 --tv</div><div class='add'>+</div><div class='add'>+   and start monitoring::</div><div class='add'>+</div><div class='add'>+	sudo cec-ctl -M</div><div class='add'>+</div><div class='add'>+   On the device you are testing run::</div><div class='add'>+</div><div class='add'>+	cec-ctl --playback</div><div class='add'>+</div><div class='add'>+   It should report a physical address of f.f.f.f. Now run this</div><div class='add'>+   command::</div><div class='add'>+</div><div class='add'>+	cec-ctl -t0 --image-view-on</div><div class='add'>+</div><div class='add'>+   The Pulse-Eight should see the &lt;Image View On&gt; message. If not,</div><div class='add'>+   then something (hardware and/or software) is preventing the CEC</div><div class='add'>+   message from going out.</div><div class='add'>+</div><div class='add'>+   To make sure you have the wiring correct just connect the</div><div class='add'>+   Pulse-Eight to a CEC-enabled display and run the same command</div><div class='add'>+   on your device: now there is a HPD, so you should see the command</div><div class='add'>+   arriving at the Pulse-Eight.</div><div class='add'>+</div><div class='add'>+2) If you have another linux device supporting CEC without HPD, then</div><div class='add'>+   you can just connect your device to that device. Yes, you can connect</div><div class='add'>+   two HDMI outputs together. You won't have a HPD (which is what we</div><div class='add'>+   want for this test), but the second device can monitor the CEC pin.</div><div class='add'>+</div><div class='add'>+   Otherwise use the same commands as in 1.</div><div class='add'>+</div><div class='add'>+If CEC messages do not come through when there is no HPD, then you</div><div class='add'>+need to figure out why. Typically it is either a hardware restriction</div><div class='add'>+or the software powers off the CEC core when the HPD goes low. The</div><div class='add'>+first cannot be corrected of course, the second will likely required</div><div class='add'>+driver changes.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Microcontrollers &amp; CEC</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+We have seen some CEC implementations in displays that use a microcontroller</div><div class='add'>+to sample the bus. This does not have to be a problem, but some implementations</div><div class='add'>+have timing issues. This is hard to discover unless you can hook up a low-level</div><div class='add'>+CEC debugger (see the next section).</div><div class='add'>+</div><div class='add'>+You will see cases where the CEC transmitter holds the CEC line high or low for</div><div class='add'>+a longer time than is allowed. For directed messages this is not a problem since</div><div class='add'>+if that happens the message will not be Acked and it will be retransmitted.</div><div class='add'>+For broadcast messages no such mechanism exists.</div><div class='add'>+</div><div class='add'>+It's not clear what to do about this. It is probably wise to transmit some</div><div class='add'>+broadcast messages twice to reduce the chance of them being lost. Specifically</div><div class='add'>+&lt;Standby&gt; and &lt;Active Source&gt; are candidates for that.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Making a CEC debugger</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+By using a Raspberry Pi 4B and some cheap components you can make</div><div class='add'>+your own low-level CEC debugger.</div><div class='add'>+</div><div class='add'>+The critical component is one of these HDMI female-female passthrough connectors</div><div class='add'>+(full soldering type 1):</div><div class='add'>+</div><div class='add'>+https://elabbay.myshopify.com/collections/camera/products/hdmi-af-af-v1a-hdmi-type-a-female-to-hdmi-type-a-female-pass-through-adapter-breakout-board?variant=45533926147</div><div class='add'>+</div><div class='add'>+The video quality is variable and certainly not enough to pass-through 4kp60</div><div class='add'>+(594 MHz) video. You might be able to support 4kp30, but more likely you will</div><div class='add'>+be limited to 1080p60 (148.5 MHz). But for CEC testing that is fine.</div><div class='add'>+</div><div class='add'>+You need a breadboard and some breadboard wires:</div><div class='add'>+</div><div class='add'>+http://www.dx.com/p/diy-40p-male-to-female-male-to-male-female-to-female-dupont-line-wire-3pcs-356089#.WYLOOXWGN7I</div><div class='add'>+</div><div class='add'>+If you want to monitor the HPD and/or 5V lines as well, then you need one of</div><div class='add'>+these 5V to 3.3V level shifters:</div><div class='add'>+</div><div class='add'>+https://www.adafruit.com/product/757</div><div class='add'>+</div><div class='add'>+(This is just where I got these components, there are many other places you</div><div class='add'>+can get similar things).</div><div class='add'>+</div><div class='add'>+The ground pin of the HDMI connector needs to be connected to a ground</div><div class='add'>+pin of the Raspberry Pi, of course.</div><div class='add'>+</div><div class='add'>+The CEC pin of the HDMI connector needs to be connected to these pins:</div><div class='add'>+GPIO 6 and GPIO 7. The optional HPD pin of the HDMI connector should</div><div class='add'>+be connected via the level shifter to these pins: GPIO 23 and GPIO 12.</div><div class='add'>+The optional 5V pin of the HDMI connector should be connected via the</div><div class='add'>+level shifter to these pins: GPIO 25 and GPIO 22. Monitoring the HPD and</div><div class='add'>+5V lines is not necessary, but it is helpful.</div><div class='add'>+</div><div class='add'>+This device tree addition in ``arch/arm/boot/dts/bcm2711-rpi-4-b.dts``</div><div class='add'>+will hook up the cec-gpio driver correctly::</div><div class='add'>+</div><div class='add'>+	cec@6 {</div><div class='add'>+		compatible = "cec-gpio";</div><div class='add'>+		cec-gpios = &lt;&amp;gpio 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		hpd-gpios = &lt;&amp;gpio 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		v5-gpios = &lt;&amp;gpio 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	cec@7 {</div><div class='add'>+		compatible = "cec-gpio";</div><div class='add'>+		cec-gpios = &lt;&amp;gpio 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+		hpd-gpios = &lt;&amp;gpio 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+		v5-gpios = &lt;&amp;gpio 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+If you haven't hooked up the HPD and/or 5V lines, then just delete those</div><div class='add'>+lines.</div><div class='add'>+</div><div class='add'>+This dts change will enable two cec GPIO devices: I typically use one to</div><div class='add'>+send/receive CEC commands and the other to monitor. If you monitor using</div><div class='add'>+an unconfigured CEC adapter then it will use GPIO interrupts which makes</div><div class='add'>+monitoring very accurate.</div><div class='add'>+</div><div class='add'>+If you just want to monitor traffic, then a single instance is sufficient.</div><div class='add'>+The minimum configuration is one HDMI female-female passthrough connector</div><div class='add'>+and two female-female breadboard wires: one for connecting the HDMI ground</div><div class='add'>+pin to a ground pin on the Raspberry Pi, and the other to connect the HDMI</div><div class='add'>+CEC pin to GPIO 6 on the Raspberry Pi.</div><div class='add'>+</div><div class='add'>+The documentation on how to use the error injection is here: :ref:`cec_pin_error_inj`.</div><div class='add'>+</div><div class='add'>+``cec-ctl --monitor-pin`` will do low-level CEC bus sniffing and analysis.</div><div class='add'>+You can also store the CEC traffic to file using ``--store-pin`` and analyze</div><div class='add'>+it later using ``--analyze-pin``.</div><div class='add'>+</div><div class='add'>+You can also use this as a full-fledged CEC device by configuring it</div><div class='add'>+using ``cec-ctl --tv -p0.0.0.0`` or ``cec-ctl --playback -p1.0.0.0``.</div><div class='head'>diff --git a/Documentation/admin-guide/media/cpia2.rst b/Documentation/admin-guide/media/cpia2.rst<br/>deleted file mode 100644<br/>index f6ffef686462..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/cpia2.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/cpia2.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,145 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-The cpia2 driver</div><div class='del'>-================</div><div class='del'>-</div><div class='del'>-Authors: Peter Pregler &lt;Peter_Pregler@email.com&gt;,</div><div class='del'>-Scott J. Bertin &lt;scottbertin@yahoo.com&gt;, and</div><div class='del'>-Jarl Totland &lt;Jarl.Totland@bdc.no&gt; for the original cpia driver, which</div><div class='del'>-this one was modelled from.</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-This is a driver for STMicroelectronics's CPiA2 (second generation</div><div class='del'>-Colour Processor Interface ASIC) based cameras. This camera outputs an MJPEG</div><div class='del'>-stream at up to vga size. It implements the Video4Linux interface as much as</div><div class='del'>-possible.  Since the V4L interface does not support compressed formats, only</div><div class='del'>-an mjpeg enabled application can be used with the camera. We have modified the</div><div class='del'>-gqcam application to view this stream.</div><div class='del'>-</div><div class='del'>-The driver is implemented as two kernel modules. The cpia2 module</div><div class='del'>-contains the camera functions and the V4L interface.  The cpia2_usb module</div><div class='del'>-contains usb specific functions.  The main reason for this was the size of the</div><div class='del'>-module was getting out of hand, so I separated them.  It is not likely that</div><div class='del'>-there will be a parallel port version.</div><div class='del'>-</div><div class='del'>-Features</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-- Supports cameras with the Vision stv6410 (CIF) and stv6500 (VGA) cmos</div><div class='del'>-  sensors. I only have the vga sensor, so can't test the other.</div><div class='del'>-- Image formats: VGA, QVGA, CIF, QCIF, and a number of sizes in between.</div><div class='del'>-  VGA and QVGA are the native image sizes for the VGA camera. CIF is done</div><div class='del'>-  in the coprocessor by scaling QVGA.  All other sizes are done by clipping.</div><div class='del'>-- Palette: YCrCb, compressed with MJPEG.</div><div class='del'>-- Some compression parameters are settable.</div><div class='del'>-- Sensor framerate is adjustable (up to 30 fps CIF, 15 fps VGA).</div><div class='del'>-- Adjust brightness, color, contrast while streaming.</div><div class='del'>-- Flicker control settable for 50 or 60 Hz mains frequency.</div><div class='del'>-</div><div class='del'>-Making and installing the stv672 driver modules</div><div class='del'>------------------------------------------------</div><div class='del'>-</div><div class='del'>-Requirements</div><div class='del'>-~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-Video4Linux must be either compiled into the kernel or</div><div class='del'>-available as a module.  Video4Linux2 is automatically detected and made</div><div class='del'>-available at compile time.</div><div class='del'>-</div><div class='del'>-Setup</div><div class='del'>-~~~~~</div><div class='del'>-</div><div class='del'>-Use ``modprobe cpia2`` to load and ``modprobe -r cpia2`` to unload. This</div><div class='del'>-may be done automatically by your distribution.</div><div class='del'>-</div><div class='del'>-Driver options</div><div class='del'>-~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-.. tabularcolumns:: |p{13ex}|L|</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-==============  ========================================================</div><div class='del'>-Option		Description</div><div class='del'>-==============  ========================================================</div><div class='del'>-video_nr	video device to register (0=/dev/video0, etc)</div><div class='del'>-		range -1 to 64.  default is -1 (first available)</div><div class='del'>-		If you have more than 1 camera, this MUST be -1.</div><div class='del'>-buffer_size	Size for each frame buffer in bytes (default 68k)</div><div class='del'>-num_buffers	Number of frame buffers (1-32, default 3)</div><div class='del'>-alternate	USB Alternate (2-7, default 7)</div><div class='del'>-flicker_freq	Frequency for flicker reduction(50 or 60, default 60)</div><div class='del'>-flicker_mode	0 to disable, or 1 to enable flicker reduction.</div><div class='del'>-		(default 0). This is only effective if the camera</div><div class='del'>-		uses a stv0672 coprocessor.</div><div class='del'>-==============  ========================================================</div><div class='del'>-</div><div class='del'>-Setting the options</div><div class='del'>-~~~~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-If you are using modules, edit /etc/modules.conf and add an options</div><div class='del'>-line like this::</div><div class='del'>-</div><div class='del'>-	options cpia2 num_buffers=3 buffer_size=65535</div><div class='del'>-</div><div class='del'>-If the driver is compiled into the kernel, at boot time specify them</div><div class='del'>-like this::</div><div class='del'>-</div><div class='del'>-	cpia2.num_buffers=3 cpia2.buffer_size=65535</div><div class='del'>-</div><div class='del'>-What buffer size should I use?</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-The maximum image size depends on the alternate you choose, and the</div><div class='del'>-frame rate achieved by the camera.  If the compression engine is able to</div><div class='del'>-keep up with the frame rate, the maximum image size is given by the table</div><div class='del'>-below.</div><div class='del'>-</div><div class='del'>-The compression engine starts out at maximum compression, and will</div><div class='del'>-increase image quality until it is close to the size in the table.  As long</div><div class='del'>-as the compression engine can keep up with the frame rate, after a short time</div><div class='del'>-the images will all be about the size in the table, regardless of resolution.</div><div class='del'>-</div><div class='del'>-At low alternate settings, the compression engine may not be able to</div><div class='del'>-compress the image enough and will reduce the frame rate by producing larger</div><div class='del'>-images.</div><div class='del'>-</div><div class='del'>-The default of 68k should be good for most users.  This will handle</div><div class='del'>-any alternate at frame rates down to 15fps.  For lower frame rates, it may</div><div class='del'>-be necessary to increase the buffer size to avoid having frames dropped due</div><div class='del'>-to insufficient space.</div><div class='del'>-</div><div class='del'>-========== ========== ======== =====</div><div class='del'>-Alternate  bytes/ms   15fps    30fps</div><div class='del'>-========== ========== ======== =====</div><div class='del'>-    2         128      8533     4267</div><div class='del'>-    3         384     25600    12800</div><div class='del'>-    4         640     42667    21333</div><div class='del'>-    5         768     51200    25600</div><div class='del'>-    6         896     59733    29867</div><div class='del'>-    7        1023     68200    34100</div><div class='del'>-========== ========== ======== =====</div><div class='del'>-</div><div class='del'>-Table: Image size(bytes)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-How many buffers should I use?</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-For normal streaming, 3 should give the best results.  With only 2,</div><div class='del'>-it is possible for the camera to finish sending one image just after a</div><div class='del'>-program has started reading the other.  If this happens, the driver must drop</div><div class='del'>-a frame.  The exception to this is if you have a heavily loaded machine.  In</div><div class='del'>-this case use 2 buffers.  You are probably not reading at the full frame rate.</div><div class='del'>-If the camera can send multiple images before a read finishes, it could</div><div class='del'>-overwrite the third buffer before the read finishes, leading to a corrupt</div><div class='del'>-image.  Single and double buffering have extra checks to avoid overwriting.</div><div class='del'>-</div><div class='del'>-Using the camera</div><div class='del'>-~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-We are providing a modified gqcam application to view the output. In</div><div class='del'>-order to avoid confusion, here it is called mview.  There is also the qx5view</div><div class='del'>-program which can also control the lights on the qx5 microscope. MJPEG Tools</div><div class='del'>-(http://mjpeg.sourceforge.net) can also be used to record from the camera.</div><div class='head'>diff --git a/Documentation/admin-guide/media/davinci-vpbe.rst b/Documentation/admin-guide/media/davinci-vpbe.rst<br/>deleted file mode 100644<br/>index 9e6360fd02db..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/davinci-vpbe.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/davinci-vpbe.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,65 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-The VPBE V4L2 driver design</div><div class='del'>-===========================</div><div class='del'>-</div><div class='del'>-Functional partitioning</div><div class='del'>------------------------</div><div class='del'>-</div><div class='del'>-Consists of the following:</div><div class='del'>-</div><div class='del'>- 1. V4L2 display driver</div><div class='del'>-</div><div class='del'>-    Implements creation of video2 and video3 device nodes and</div><div class='del'>-    provides v4l2 device interface to manage VID0 and VID1 layers.</div><div class='del'>-</div><div class='del'>- 2. Display controller</div><div class='del'>-</div><div class='del'>-    Loads up VENC, OSD and external encoders such as ths8200. It provides</div><div class='del'>-    a set of API calls to V4L2 drivers to set the output/standards</div><div class='del'>-    in the VENC or external sub devices. It also provides</div><div class='del'>-    a device object to access the services from OSD subdevice</div><div class='del'>-    using sub device ops. The connection of external encoders to VENC LCD</div><div class='del'>-    controller port is done at init time based on default output and standard</div><div class='del'>-    selection or at run time when application change the output through</div><div class='del'>-    V4L2 IOCTLs.</div><div class='del'>-</div><div class='del'>-    When connected to an external encoder, vpbe controller is also responsible</div><div class='del'>-    for setting up the interface between VENC and external encoders based on</div><div class='del'>-    board specific settings (specified in board-xxx-evm.c). This allows</div><div class='del'>-    interfacing external encoders such as ths8200. The setup_if_config()</div><div class='del'>-    is implemented for this as well as configure_venc() (part of the next patch)</div><div class='del'>-    API to set timings in VENC for a specific display resolution. As of this</div><div class='del'>-    patch series, the interconnection and enabling and setting of the external</div><div class='del'>-    encoders is not present, and would be a part of the next patch series.</div><div class='del'>-</div><div class='del'>- 3. VENC subdevice module</div><div class='del'>-</div><div class='del'>-    Responsible for setting outputs provided through internal DACs and also</div><div class='del'>-    setting timings at LCD controller port when external encoders are connected</div><div class='del'>-    at the port or LCD panel timings required. When external encoder/LCD panel</div><div class='del'>-    is connected, the timings for a specific standard/preset is retrieved from</div><div class='del'>-    the board specific table and the values are used to set the timings in</div><div class='del'>-    venc using non-standard timing mode.</div><div class='del'>-</div><div class='del'>-    Support LCD Panel displays using the VENC. For example to support a Logic</div><div class='del'>-    PD display, it requires setting up the LCD controller port with a set of</div><div class='del'>-    timings for the resolution supported and setting the dot clock. So we could</div><div class='del'>-    add the available outputs as a board specific entry (i.e add the "LogicPD"</div><div class='del'>-    output name to board-xxx-evm.c). A table of timings for various LCDs</div><div class='del'>-    supported can be maintained in the board specific setup file to support</div><div class='del'>-    various LCD displays.As of this patch a basic driver is present, and this</div><div class='del'>-    support for external encoders and displays forms a part of the next</div><div class='del'>-    patch series.</div><div class='del'>-</div><div class='del'>- 4. OSD module</div><div class='del'>-</div><div class='del'>-    OSD module implements all OSD layer management and hardware specific</div><div class='del'>-    features. The VPBE module interacts with the OSD for enabling and</div><div class='del'>-    disabling appropriate features of the OSD.</div><div class='del'>-</div><div class='del'>-Current status</div><div class='del'>---------------</div><div class='del'>-</div><div class='del'>-A fully functional working version of the V4L2 driver is available. This</div><div class='del'>-driver has been tested with NTSC and PAL standards and buffer streaming.</div><div class='head'>diff --git a/Documentation/admin-guide/media/dvb-drivers.rst b/Documentation/admin-guide/media/dvb-drivers.rst<br/>index 8df637c375f9..66fa4edd0606 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/dvb-drivers.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/dvb-drivers.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/dvb-drivers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/dvb-drivers.rst</a></div><div class='hunk'>@@ -13,4 +13,3 @@ Digital TV driver-specific documentation</div><div class='ctx'> 	opera-firmware</div><div class='ctx'> 	technisat</div><div class='ctx'> 	ttusb-dec</div><div class='del'>-	zr364xx</div><div class='head'>diff --git a/Documentation/admin-guide/media/i2c-cardlist.rst b/Documentation/admin-guide/media/i2c-cardlist.rst<br/>index ef3b5fff3b01..1825a0bb47bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/i2c-cardlist.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/i2c-cardlist.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/i2c-cardlist.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/i2c-cardlist.rst</a></div><div class='hunk'>@@ -72,17 +72,13 @@ imx319        Sony IMX319 sensor</div><div class='ctx'> imx334        Sony IMX334 sensor</div><div class='ctx'> imx355        Sony IMX355 sensor</div><div class='ctx'> imx412        Sony IMX412 sensor</div><div class='del'>-m5mols        Fujitsu M-5MOLS 8MP sensor</div><div class='ctx'> mt9m001       mt9m001</div><div class='del'>-mt9m032       MT9M032 camera sensor</div><div class='ctx'> mt9m111       mt9m111, mt9m112 and mt9m131</div><div class='ctx'> mt9p031       Aptina MT9P031</div><div class='del'>-mt9t001       Aptina MT9T001</div><div class='ctx'> mt9t112       Aptina MT9T111/MT9T112</div><div class='ctx'> mt9v011       Micron mt9v011 sensor</div><div class='ctx'> mt9v032       Micron MT9V032 sensor</div><div class='ctx'> mt9v111       Aptina MT9V111 sensor</div><div class='del'>-noon010pc30   Siliconfile NOON010PC30 sensor</div><div class='ctx'> ov13858       OmniVision OV13858 sensor</div><div class='ctx'> ov13b10       OmniVision OV13B10 sensor</div><div class='ctx'> ov2640        OmniVision OV2640 sensor</div><div class='hunk'>@@ -109,9 +105,6 @@ s5c73m3       Samsung S5C73M3 sensor</div><div class='ctx'> s5k4ecgx      Samsung S5K4ECGX sensor</div><div class='ctx'> s5k5baf       Samsung S5K5BAF sensor</div><div class='ctx'> s5k6a3        Samsung S5K6A3 sensor</div><div class='del'>-s5k6aa        Samsung S5K6AAFX sensor</div><div class='del'>-sr030pc30     Siliconfile SR030PC30 sensor</div><div class='del'>-vs6624        ST VS6624 sensor</div><div class='ctx'> ============  ==========================================================</div><div class='ctx'> </div><div class='ctx'> Flash devices</div><div class='hunk'>@@ -222,7 +215,6 @@ Video encoders</div><div class='ctx'> ============  ==========================================================</div><div class='ctx'> Driver        Name</div><div class='ctx'> ============  ==========================================================</div><div class='del'>-ad9389b       Analog Devices AD9389B encoder</div><div class='ctx'> adv7170       Analog Devices ADV7170 video encoder</div><div class='ctx'> adv7175       Analog Devices ADV7175 video encoder</div><div class='ctx'> adv7343       ADV7343 video encoder</div><div class='head'>diff --git a/Documentation/admin-guide/media/index.rst b/Documentation/admin-guide/media/index.rst<br/>index c676af665111..43f4a292b245 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/index.rst</a></div><div class='hunk'>@@ -38,13 +38,14 @@ The media subsystem</div><div class='ctx'> </div><div class='ctx'> 	remote-controller</div><div class='ctx'> </div><div class='add'>+	cec</div><div class='add'>+</div><div class='ctx'> 	dvb</div><div class='ctx'> </div><div class='ctx'> 	cardlist</div><div class='ctx'> </div><div class='ctx'> 	v4l-drivers</div><div class='ctx'> 	dvb-drivers</div><div class='del'>-	cec-drivers</div><div class='ctx'> </div><div class='ctx'> **Copyright** |copy| 1999-2020 : LinuxTV Developers</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/media/meye.rst b/Documentation/admin-guide/media/meye.rst<br/>deleted file mode 100644<br/>index 9098a1e65f8b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/meye.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/meye.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,93 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-.. include:: &lt;isonum.txt&gt;</div><div class='del'>-</div><div class='del'>-Vaio Picturebook Motion Eye Camera Driver</div><div class='del'>-=========================================</div><div class='del'>-</div><div class='del'>-Copyright |copy| 2001-2004 Stelian Pop &lt;stelian@popies.net&gt;</div><div class='del'>-</div><div class='del'>-Copyright |copy| 2001-2002 Alcôve &lt;www.alcove.com&gt;</div><div class='del'>-</div><div class='del'>-Copyright |copy| 2000 Andrew Tridgell &lt;tridge@samba.org&gt;</div><div class='del'>-</div><div class='del'>-This driver enable the use of video4linux compatible applications with the</div><div class='del'>-Motion Eye camera. This driver requires the "Sony Laptop Extras" driver (which</div><div class='del'>-can be found in the "Misc devices" section of the kernel configuration utility)</div><div class='del'>-to be compiled and installed (using its "camera=1" parameter).</div><div class='del'>-</div><div class='del'>-It can do at maximum 30 fps @ 320x240 or 15 fps @ 640x480.</div><div class='del'>-</div><div class='del'>-Grabbing is supported in packed YUV colorspace only.</div><div class='del'>-</div><div class='del'>-MJPEG hardware grabbing is supported via a private API (see below).</div><div class='del'>-</div><div class='del'>-Hardware supported</div><div class='del'>-------------------</div><div class='del'>-</div><div class='del'>-This driver supports the 'second' version of the MotionEye camera :)</div><div class='del'>-</div><div class='del'>-The first version was connected directly on the video bus of the Neomagic</div><div class='del'>-video card and is unsupported.</div><div class='del'>-</div><div class='del'>-The second one, made by Kawasaki Steel is fully supported by this</div><div class='del'>-driver (PCI vendor/device is 0x136b/0xff01)</div><div class='del'>-</div><div class='del'>-The third one, present in recent (more or less last year) Picturebooks</div><div class='del'>-(C1M* models), is not supported. The manufacturer has given the specs</div><div class='del'>-to the developers under a NDA (which allows the development of a GPL</div><div class='del'>-driver however), but things are not moving very fast (see</div><div class='del'>-http://r-engine.sourceforge.net/) (PCI vendor/device is 0x10cf/0x2011).</div><div class='del'>-</div><div class='del'>-There is a forth model connected on the USB bus in TR1* Vaio laptops.</div><div class='del'>-This camera is not supported at all by the current driver, in fact</div><div class='del'>-little information if any is available for this camera</div><div class='del'>-(USB vendor/device is 0x054c/0x0107).</div><div class='del'>-</div><div class='del'>-Driver options</div><div class='del'>---------------</div><div class='del'>-</div><div class='del'>-Several options can be passed to the meye driver using the standard</div><div class='del'>-module argument syntax (&lt;param&gt;=&lt;value&gt; when passing the option to the</div><div class='del'>-module or meye.&lt;param&gt;=&lt;value&gt; on the kernel boot line when meye is</div><div class='del'>-statically linked into the kernel). Those options are:</div><div class='del'>-</div><div class='del'>-.. code-block:: none</div><div class='del'>-</div><div class='del'>-	gbuffers:	number of capture buffers, default is 2 (32 max)</div><div class='del'>-</div><div class='del'>-	gbufsize:	size of each capture buffer, default is 614400</div><div class='del'>-</div><div class='del'>-	video_nr:	video device to register (0 = /dev/video0, etc)</div><div class='del'>-</div><div class='del'>-Module use</div><div class='del'>-----------</div><div class='del'>-</div><div class='del'>-In order to automatically load the meye module on use, you can put those lines</div><div class='del'>-in your /etc/modprobe.d/meye.conf file:</div><div class='del'>-</div><div class='del'>-.. code-block:: none</div><div class='del'>-</div><div class='del'>-	alias char-major-81 videodev</div><div class='del'>-	alias char-major-81-0 meye</div><div class='del'>-	options meye gbuffers=32</div><div class='del'>-</div><div class='del'>-Usage:</div><div class='del'>-------</div><div class='del'>-</div><div class='del'>-.. code-block:: none</div><div class='del'>-</div><div class='del'>-	xawtv &gt;= 3.49 (&lt;http://bytesex.org/xawtv/&gt;)</div><div class='del'>-		for display and uncompressed video capture:</div><div class='del'>-</div><div class='del'>-			xawtv -c /dev/video0 -geometry 640x480</div><div class='del'>-				or</div><div class='del'>-			xawtv -c /dev/video0 -geometry 320x240</div><div class='del'>-</div><div class='del'>-	motioneye (&lt;http://popies.net/meye/&gt;)</div><div class='del'>-		for getting ppm or jpg snapshots, mjpeg video</div><div class='del'>-</div><div class='del'>-Bugs / Todo</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-- 'motioneye' still uses the meye private v4l1 API extensions.</div><div class='head'>diff --git a/Documentation/admin-guide/media/other-usb-cardlist.rst b/Documentation/admin-guide/media/other-usb-cardlist.rst<br/>index bbfdb1389c18..fb88db50e861 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/other-usb-cardlist.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/other-usb-cardlist.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/other-usb-cardlist.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/other-usb-cardlist.rst</a></div><div class='hunk'>@@ -14,8 +14,6 @@ dvb-as102	  nBox DVB-T Dongle			  0b89:0007</div><div class='ctx'> dvb-as102	  Sky IT Digital Key (green led)	  2137:0001</div><div class='ctx'> b2c2-flexcop-usb  Technisat/B2C2 FlexCop II/IIb/III	  0af7:0101</div><div class='ctx'> 		  Digital TV</div><div class='del'>-cpia2		  Vision's CPiA2 cameras		  0553:0100, 0553:0140,</div><div class='del'>-		  such as the Digital Blue QX5		  0553:0151</div><div class='ctx'> go7007		  WIS GO7007 MPEG encoder		  1943:a250, 093b:a002,</div><div class='ctx'> 							  093b:a004, 0eb1:6666,</div><div class='ctx'> 							  0eb1:6668</div><div class='hunk'>@@ -66,7 +64,6 @@ pwc		  Visionite VCS-UC300			  0d81:1900</div><div class='ctx'> pwc		  Visionite VCS-UM100			  0d81:1910</div><div class='ctx'> s2255drv	  Sensoray 2255				  1943:2255, 1943:2257</div><div class='ctx'> stk1160		  STK1160 USB video capture dongle	  05e1:0408</div><div class='del'>-stkwebcam	  Syntek DC1125				  174f:a311, 05e1:0501</div><div class='ctx'> dvb-ttusb-budget  Technotrend/Hauppauge Nova-USB devices  0b48:1003, 0b48:1004,</div><div class='ctx'> 							  0b48:1005</div><div class='ctx'> dvb-ttusb_dec	  Technotrend/Hauppauge MPEG decoder	  0b48:1006</div><div class='hunk'>@@ -78,15 +75,4 @@ dvb-ttusb_dec	  Technotrend/Hauppauge MPEG decoder</div><div class='ctx'> 		  DEC2540-t				  0b48:1009</div><div class='ctx'> usbtv		  Fushicai USBTV007 Audio-Video Grabber	  1b71:3002, 1f71:3301,</div><div class='ctx'> 							  1f71:3306</div><div class='del'>-zr364xx		  USB ZR364XX Camera			  08ca:0109, 041e:4024,</div><div class='del'>-							  0d64:0108, 0546:3187,</div><div class='del'>-							  0d64:3108, 0595:4343,</div><div class='del'>-							  0bb0:500d, 0feb:2004,</div><div class='del'>-							  055f:b500, 08ca:2062,</div><div class='del'>-							  052b:1a18, 04c8:0729,</div><div class='del'>-							  04f2:a208, 0784:0040,</div><div class='del'>-							  06d6:0034, 0a17:0062,</div><div class='del'>-							  06d6:003b, 0a17:004e,</div><div class='del'>-							  041e:405d, 08ca:2102,</div><div class='del'>-							  06d6:003d</div><div class='ctx'> ================  ======================================  =====================</div><div class='head'>diff --git a/Documentation/admin-guide/media/pci-cardlist.rst b/Documentation/admin-guide/media/pci-cardlist.rst<br/>index f4d670e632f8..42528795d4da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/pci-cardlist.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/pci-cardlist.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/pci-cardlist.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/pci-cardlist.rst</a></div><div class='hunk'>@@ -77,7 +77,6 @@ ipu3-cio2         Intel ipu3-cio2 driver</div><div class='ctx'> ivtv              Conexant cx23416/cx23415 MPEG encoder/decoder</div><div class='ctx'> ivtvfb            Conexant cx23415 framebuffer</div><div class='ctx'> mantis            MANTIS based cards</div><div class='del'>-meye              Sony Vaio Picturebook Motion Eye</div><div class='ctx'> mxb               Siemens-Nixdorf 'Multimedia eXtension Board'</div><div class='ctx'> netup-unidvb      NetUP Universal DVB card</div><div class='ctx'> ngene             Micronas nGene</div><div class='head'>diff --git a/Documentation/admin-guide/media/platform-cardlist.rst b/Documentation/admin-guide/media/platform-cardlist.rst<br/>index ac73c4166d1e..1230ae4037ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/platform-cardlist.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/platform-cardlist.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/platform-cardlist.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/platform-cardlist.rst</a></div><div class='hunk'>@@ -30,7 +30,6 @@ exynos-fimc-is     EXYNOS4x12 FIMC-IS (Imaging Subsystem)</div><div class='ctx'> exynos-fimc-lite   EXYNOS FIMC-LITE camera interface</div><div class='ctx'> exynos-gsc         Samsung Exynos G-Scaler</div><div class='ctx'> exy                Samsung S5P/EXYNOS4 SoC series Camera Subsystem</div><div class='del'>-fsl-viu            Freescale VIU</div><div class='ctx'> imx-pxp            i.MX Pixel Pipeline (PXP)</div><div class='ctx'> isdf               TI DM365 ISIF video capture</div><div class='ctx'> mmp_camera         Marvell Armada 610 integrated camera controller</div><div class='hunk'>@@ -73,7 +72,6 @@ via-camera         VIAFB camera controller</div><div class='ctx'> video-mux          Video Multiplexer</div><div class='ctx'> vpif_display       TI DaVinci VPIF V4L2-Display</div><div class='ctx'> vpif_capture       TI DaVinci VPIF video capture</div><div class='del'>-vpss               TI DaVinci VPBE V4L2-Display</div><div class='ctx'> vsp1               Renesas VSP1 Video Processing Engine</div><div class='ctx'> xilinx-tpg         Xilinx Video Test Pattern Generator</div><div class='ctx'> xilinx-video       Xilinx Video IP (EXPERIMENTAL)</div><div class='head'>diff --git a/Documentation/admin-guide/media/pulse8-cec.rst b/Documentation/admin-guide/media/pulse8-cec.rst<br/>deleted file mode 100644<br/>index 356d08b519f3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/pulse8-cec.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/pulse8-cec.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-Pulse-Eight CEC Adapter driver</div><div class='del'>-==============================</div><div class='del'>-</div><div class='del'>-The pulse8-cec driver implements the following module option:</div><div class='del'>-</div><div class='del'>-``persistent_config``</div><div class='del'>----------------------</div><div class='del'>-</div><div class='del'>-By default this is off, but when set to 1 the driver will store the current</div><div class='del'>-settings to the device's internal eeprom and restore it the next time the</div><div class='del'>-device is connected to the USB port.</div><div class='head'>diff --git a/Documentation/admin-guide/media/si476x.rst b/Documentation/admin-guide/media/si476x.rst<br/>index 87062301d6a1..c8882ee9f208 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/si476x.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/si476x.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/si476x.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/si476x.rst</a></div><div class='hunk'>@@ -142,7 +142,7 @@ The drivers exposes following files:</div><div class='ctx'> 				  indicator</div><div class='ctx'>   0x18		 lassi		  Signed Low side adjacent Channel</div><div class='ctx'> 				  Strength indicator</div><div class='del'>-  0x19		 hassi		  ditto fpr High side</div><div class='add'>+  0x19		 hassi		  ditto for High side</div><div class='ctx'>   0x20		 mult		  Multipath indicator</div><div class='ctx'>   0x21		 dev		  Frequency deviation</div><div class='ctx'>   0x24		 assi		  Adjacent channel SSI</div><div class='head'>diff --git a/Documentation/admin-guide/media/tm6000-cardlist.rst b/Documentation/admin-guide/media/tm6000-cardlist.rst<br/>deleted file mode 100644<br/>index 6d2769c0f4d8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/tm6000-cardlist.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/tm6000-cardlist.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,83 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-TM6000 cards list</div><div class='del'>-=================</div><div class='del'>-</div><div class='del'>-.. tabularcolumns:: |p{1.4cm}|p{11.1cm}|p{4.2cm}|</div><div class='del'>-</div><div class='del'>-.. flat-table::</div><div class='del'>-   :header-rows: 1</div><div class='del'>-   :widths: 2 19 18</div><div class='del'>-   :stub-columns: 0</div><div class='del'>-</div><div class='del'>-   * - Card number</div><div class='del'>-     - Card name</div><div class='del'>-     - USB IDs</div><div class='del'>-</div><div class='del'>-   * - 0</div><div class='del'>-     - Unknown tm6000 video grabber</div><div class='del'>-     -</div><div class='del'>-</div><div class='del'>-   * - 1</div><div class='del'>-     - Generic tm5600 board</div><div class='del'>-     - 6000:0001</div><div class='del'>-</div><div class='del'>-   * - 2</div><div class='del'>-     - Generic tm6000 board</div><div class='del'>-     -</div><div class='del'>-</div><div class='del'>-   * - 3</div><div class='del'>-     - Generic tm6010 board</div><div class='del'>-     - 6000:0002</div><div class='del'>-</div><div class='del'>-   * - 4</div><div class='del'>-     - 10Moons UT 821</div><div class='del'>-     -</div><div class='del'>-</div><div class='del'>-   * - 5</div><div class='del'>-     - 10Moons UT 330</div><div class='del'>-     -</div><div class='del'>-</div><div class='del'>-   * - 6</div><div class='del'>-     - ADSTECH Dual TV USB</div><div class='del'>-     - 06e1:f332</div><div class='del'>-</div><div class='del'>-   * - 7</div><div class='del'>-     - Freecom Hybrid Stick / Moka DVB-T Receiver Dual</div><div class='del'>-     - 14aa:0620</div><div class='del'>-</div><div class='del'>-   * - 8</div><div class='del'>-     - ADSTECH Mini Dual TV USB</div><div class='del'>-     - 06e1:b339</div><div class='del'>-</div><div class='del'>-   * - 9</div><div class='del'>-     - Hauppauge WinTV HVR-900H / WinTV USB2-Stick</div><div class='del'>-     - 2040:6600, 2040:6601, 2040:6610, 2040:6611</div><div class='del'>-</div><div class='del'>-   * - 10</div><div class='del'>-     - Beholder Wander DVB-T/TV/FM USB2.0</div><div class='del'>-     - 6000:dec0</div><div class='del'>-</div><div class='del'>-   * - 11</div><div class='del'>-     - Beholder Voyager TV/FM USB2.0</div><div class='del'>-     - 6000:dec1</div><div class='del'>-</div><div class='del'>-   * - 12</div><div class='del'>-     - Terratec Cinergy Hybrid XE / Cinergy Hybrid-Stick</div><div class='del'>-     - 0ccd:0086, 0ccd:00A5</div><div class='del'>-</div><div class='del'>-   * - 13</div><div class='del'>-     - Twinhan TU501(704D1)</div><div class='del'>-     - 13d3:3240, 13d3:3241, 13d3:3243, 13d3:3264</div><div class='del'>-</div><div class='del'>-   * - 14</div><div class='del'>-     - Beholder Wander Lite DVB-T/TV/FM USB2.0</div><div class='del'>-     - 6000:dec2</div><div class='del'>-</div><div class='del'>-   * - 15</div><div class='del'>-     - Beholder Voyager Lite TV/FM USB2.0</div><div class='del'>-     - 6000:dec3</div><div class='del'>-</div><div class='del'>-   * - 16</div><div class='del'>-     - Terratec Grabster AV 150/250 MX</div><div class='del'>-     - 0ccd:0079</div><div class='head'>diff --git a/Documentation/admin-guide/media/usb-cardlist.rst b/Documentation/admin-guide/media/usb-cardlist.rst<br/>index 1e96f928e0af..5f5ab0723e48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/usb-cardlist.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/usb-cardlist.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/usb-cardlist.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/usb-cardlist.rst</a></div><div class='hunk'>@@ -43,7 +43,6 @@ Driver                  Name</div><div class='ctx'> airspy                  AirSpy</div><div class='ctx'> au0828                  Auvitek AU0828</div><div class='ctx'> b2c2-flexcop-usb        Technisat/B2C2 Air/Sky/Cable2PC USB</div><div class='del'>-cpia2                   CPiA2 Video For Linux</div><div class='ctx'> cx231xx                 Conexant cx231xx USB video capture</div><div class='ctx'> dvb-as102               Abilis AS102 DVB receiver</div><div class='ctx'> dvb-ttusb-budget        Technotrend/Hauppauge Nova - USB devices</div><div class='hunk'>@@ -93,15 +92,10 @@ pwc                     USB Philips Cameras</div><div class='ctx'> s2250                   Sensoray 2250/2251</div><div class='ctx'> s2255drv                USB Sensoray 2255 video capture device</div><div class='ctx'> smsusb                  Siano SMS1xxx based MDTV receiver</div><div class='del'>-stkwebcam               USB Syntek DC1125 Camera</div><div class='del'>-tm6000-alsa             TV Master TM5600/6000/6010 audio</div><div class='del'>-tm6000-dvb              DVB Support for tm6000 based TV cards</div><div class='del'>-tm6000                  TV Master TM5600/6000/6010 driver</div><div class='ctx'> ttusb_dec               Technotrend/Hauppauge USB DEC devices</div><div class='ctx'> usbtv                   USBTV007 video capture</div><div class='ctx'> uvcvideo                USB Video Class (UVC)</div><div class='ctx'> zd1301                  ZyDAS ZD1301</div><div class='del'>-zr364xx                 USB ZR364XX Camera</div><div class='ctx'> ======================  =========================================================</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='hunk'>@@ -110,7 +104,6 @@ zr364xx                 USB ZR364XX Camera</div><div class='ctx'> 	au0828-cardlist</div><div class='ctx'> 	cx231xx-cardlist</div><div class='ctx'> 	em28xx-cardlist</div><div class='del'>-	tm6000-cardlist</div><div class='ctx'> 	siano-cardlist</div><div class='ctx'> </div><div class='ctx'> 	gspca-cardlist</div><div class='head'>diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst<br/>index 9c7ebe2ca3bd..1c41f87c3917 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/v4l-drivers.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/v4l-drivers.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/v4l-drivers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/v4l-drivers.rst</a></div><div class='hunk'>@@ -11,15 +11,12 @@ Video4Linux (V4L) driver-specific documentation</div><div class='ctx'> </div><div class='ctx'> 	bttv</div><div class='ctx'> 	cafe_ccic</div><div class='del'>-	cpia2</div><div class='ctx'> 	cx88</div><div class='del'>-	davinci-vpbe</div><div class='ctx'> 	fimc</div><div class='ctx'> 	imx</div><div class='ctx'> 	imx7</div><div class='ctx'> 	ipu3</div><div class='ctx'> 	ivtv</div><div class='del'>-	meye</div><div class='ctx'> 	omap3isp</div><div class='ctx'> 	omap4_camera</div><div class='ctx'> 	philips</div><div class='hunk'>@@ -31,4 +28,5 @@ Video4Linux (V4L) driver-specific documentation</div><div class='ctx'> 	si4713</div><div class='ctx'> 	si476x</div><div class='ctx'> 	vimc</div><div class='add'>+	visl</div><div class='ctx'> 	vivid</div><div class='head'>diff --git a/Documentation/admin-guide/media/vimc.dot b/Documentation/admin-guide/media/vimc.dot<br/>index 57863a13fa39..92a5bb631235 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/vimc.dot?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/vimc.dot</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/vimc.dot?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/vimc.dot</a></div><div class='hunk'>@@ -5,18 +5,22 @@ digraph board {</div><div class='ctx'> 	n00000001 [label="{{} | Sensor A\n/dev/v4l-subdev0 | {&lt;port0&gt; 0}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='ctx'> 	n00000001:port0 -&gt; n00000005:port0 [style=bold]</div><div class='ctx'> 	n00000001:port0 -&gt; n0000000b [style=bold]</div><div class='add'>+	n00000001 -&gt; n00000002</div><div class='add'>+	n00000002 [label="{{} | Lens A\n/dev/v4l-subdev5 | {&lt;port0&gt;}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='ctx'> 	n00000003 [label="{{} | Sensor B\n/dev/v4l-subdev1 | {&lt;port0&gt; 0}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='ctx'> 	n00000003:port0 -&gt; n00000008:port0 [style=bold]</div><div class='ctx'> 	n00000003:port0 -&gt; n0000000f [style=bold]</div><div class='add'>+	n00000003 -&gt; n00000004</div><div class='add'>+	n00000004 [label="{{} | Lens B\n/dev/v4l-subdev6 | {&lt;port0&gt;}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='ctx'> 	n00000005 [label="{{&lt;port0&gt; 0} | Debayer A\n/dev/v4l-subdev2 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='del'>-	n00000005:port1 -&gt; n00000017:port0</div><div class='add'>+	n00000005:port1 -&gt; n00000015:port0</div><div class='ctx'> 	n00000008 [label="{{&lt;port0&gt; 0} | Debayer B\n/dev/v4l-subdev3 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='del'>-	n00000008:port1 -&gt; n00000017:port0 [style=dashed]</div><div class='add'>+	n00000008:port1 -&gt; n00000015:port0 [style=dashed]</div><div class='ctx'> 	n0000000b [label="Raw Capture 0\n/dev/video0", shape=box, style=filled, fillcolor=yellow]</div><div class='ctx'> 	n0000000f [label="Raw Capture 1\n/dev/video1", shape=box, style=filled, fillcolor=yellow]</div><div class='del'>-	n00000013 [label="RGB/YUV Input\n/dev/video2", shape=box, style=filled, fillcolor=yellow]</div><div class='del'>-	n00000013 -&gt; n00000017:port0 [style=dashed]</div><div class='del'>-	n00000017 [label="{{&lt;port0&gt; 0} | Scaler\n/dev/v4l-subdev4 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='del'>-	n00000017:port1 -&gt; n0000001a [style=bold]</div><div class='del'>-	n0000001a [label="RGB/YUV Capture\n/dev/video3", shape=box, style=filled, fillcolor=yellow]</div><div class='add'>+	n00000013 [label="{{} | RGB/YUV Input\n/dev/v4l-subdev4 | {&lt;port0&gt; 0}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n00000013:port0 -&gt; n00000015:port0 [style=dashed]</div><div class='add'>+	n00000015 [label="{{&lt;port0&gt; 0} | Scaler\n/dev/v4l-subdev5 | {&lt;port1&gt; 1}}", shape=Mrecord, style=filled, fillcolor=green]</div><div class='add'>+	n00000015:port1 -&gt; n00000018 [style=bold]</div><div class='add'>+	n00000018 [label="RGB/YUV Capture\n/dev/video2", shape=box, style=filled, fillcolor=yellow]</div><div class='ctx'> }</div><div class='head'>diff --git a/Documentation/admin-guide/media/vimc.rst b/Documentation/admin-guide/media/vimc.rst<br/>index 0b07f05dde25..29d843a8ddb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/vimc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/vimc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/vimc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/vimc.rst</a></div><div class='hunk'>@@ -35,11 +35,11 @@ of commands fits for the default topology:</div><div class='ctx'> </div><div class='ctx'>         media-ctl -d platform:vimc -V '"Sensor A":0[fmt:SBGGR8_1X8/640x480]'</div><div class='ctx'>         media-ctl -d platform:vimc -V '"Debayer A":0[fmt:SBGGR8_1X8/640x480]'</div><div class='del'>-        media-ctl -d platform:vimc -V '"Sensor B":0[fmt:SBGGR8_1X8/640x480]'</div><div class='del'>-        media-ctl -d platform:vimc -V '"Debayer B":0[fmt:SBGGR8_1X8/640x480]'</div><div class='del'>-        v4l2-ctl -z platform:vimc -d "RGB/YUV Capture" -v width=1920,height=1440</div><div class='add'>+        media-ctl -d platform:vimc -V '"Scaler":0[fmt:RGB888_1X24/640x480]'</div><div class='add'>+        media-ctl -d platform:vimc -V '"Scaler":0[crop:(100,50)/400x150]'</div><div class='add'>+        media-ctl -d platform:vimc -V '"Scaler":1[fmt:RGB888_1X24/300x700]'</div><div class='add'>+        v4l2-ctl -z platform:vimc -d "RGB/YUV Capture" -v width=300,height=700</div><div class='ctx'>         v4l2-ctl -z platform:vimc -d "Raw Capture 0" -v pixelformat=BA81</div><div class='del'>-        v4l2-ctl -z platform:vimc -d "Raw Capture 1" -v pixelformat=BA81</div><div class='ctx'> </div><div class='ctx'> Subdevices</div><div class='ctx'> ----------</div><div class='hunk'>@@ -53,6 +53,25 @@ vimc-sensor:</div><div class='ctx'> </div><div class='ctx'> 	* 1 Pad source</div><div class='ctx'> </div><div class='add'>+vimc-lens:</div><div class='add'>+	Ancillary lens for a sensor. Supports auto focus control. Linked to</div><div class='add'>+	a vimc-sensor using an ancillary link. The lens supports FOCUS_ABSOLUTE</div><div class='add'>+	control.</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+	media-ctl -p</div><div class='add'>+	...</div><div class='add'>+	- entity 28: Lens A (0 pad, 0 link)</div><div class='add'>+			type V4L2 subdev subtype Lens flags 0</div><div class='add'>+			device node name /dev/v4l-subdev6</div><div class='add'>+	- entity 29: Lens B (0 pad, 0 link)</div><div class='add'>+			type V4L2 subdev subtype Lens flags 0</div><div class='add'>+			device node name /dev/v4l-subdev7</div><div class='add'>+	v4l2-ctl -d /dev/v4l-subdev7 -C focus_absolute</div><div class='add'>+	focus_absolute: 0</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> vimc-debayer:</div><div class='ctx'> 	Transforms images in bayer format into a non-bayer format.</div><div class='ctx'> 	Exposes:</div><div class='head'>diff --git a/Documentation/admin-guide/media/visl.rst b/Documentation/admin-guide/media/visl.rst<br/>new file mode 100644<br/>index 000000000000..7d2dc78341c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/visl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/visl.rst</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+The Virtual Stateless Decoder Driver (visl)</div><div class='add'>+===========================================</div><div class='add'>+</div><div class='add'>+A virtual stateless decoder device for stateless uAPI development</div><div class='add'>+purposes.</div><div class='add'>+</div><div class='add'>+This tool's objective is to help the development and testing of</div><div class='add'>+userspace applications that use the V4L2 stateless API to decode media.</div><div class='add'>+</div><div class='add'>+A userspace implementation can use visl to run a decoding loop even when</div><div class='add'>+no hardware is available or when the kernel uAPI for the codec has not</div><div class='add'>+been upstreamed yet. This can reveal bugs at an early stage.</div><div class='add'>+</div><div class='add'>+This driver can also trace the contents of the V4L2 controls submitted</div><div class='add'>+to it.  It can also dump the contents of the vb2 buffers through a</div><div class='add'>+debugfs interface. This is in many ways similar to the tracing</div><div class='add'>+infrastructure available for other popular encode/decode APIs out there</div><div class='add'>+and can help develop a userspace application by using another (working)</div><div class='add'>+one as a reference.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+</div><div class='add'>+        No actual decoding of video frames is performed by visl. The</div><div class='add'>+        V4L2 test pattern generator is used to write various debug information</div><div class='add'>+        to the capture buffers instead.</div><div class='add'>+</div><div class='add'>+Module parameters</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+- visl_debug: Activates debug info, printing various debug messages through</div><div class='add'>+  dprintk. Also controls whether per-frame debug info is shown. Defaults to off.</div><div class='add'>+  Note that enabling this feature can result in slow performance through serial.</div><div class='add'>+</div><div class='add'>+- visl_transtime_ms: Simulated process time in milliseconds. Slowing down the</div><div class='add'>+  decoding speed can be useful for debugging.</div><div class='add'>+</div><div class='add'>+- visl_dprintk_frame_start, visl_dprintk_frame_nframes: Dictates a range of</div><div class='add'>+  frames where dprintk is activated. This only controls the dprintk tracing on a</div><div class='add'>+  per-frame basis. Note that printing a lot of data can be slow through serial.</div><div class='add'>+</div><div class='add'>+- keep_bitstream_buffers: Controls whether bitstream (i.e. OUTPUT) buffers are</div><div class='add'>+  kept after a decoding session. Defaults to false so as to reduce the amount of</div><div class='add'>+  clutter. keep_bitstream_buffers == false works well when live debugging the</div><div class='add'>+  client program with GDB.</div><div class='add'>+</div><div class='add'>+- bitstream_trace_frame_start, bitstream_trace_nframes: Similar to</div><div class='add'>+  visl_dprintk_frame_start, visl_dprintk_nframes, but controls the dumping of</div><div class='add'>+  buffer data through debugfs instead.</div><div class='add'>+</div><div class='add'>+What is the default use case for this driver?</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+This driver can be used as a way to compare different userspace implementations.</div><div class='add'>+This assumes that a working client is run against visl and that the ftrace and</div><div class='add'>+OUTPUT buffer data is subsequently used to debug a work-in-progress</div><div class='add'>+implementation.</div><div class='add'>+</div><div class='add'>+Information on reference frames, their timestamps, the status of the OUTPUT and</div><div class='add'>+CAPTURE queues and more can be read directly from the CAPTURE buffers.</div><div class='add'>+</div><div class='add'>+Supported codecs</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The following codecs are supported:</div><div class='add'>+</div><div class='add'>+- FWHT</div><div class='add'>+- MPEG2</div><div class='add'>+- VP8</div><div class='add'>+- VP9</div><div class='add'>+- H.264</div><div class='add'>+- HEVC</div><div class='add'>+</div><div class='add'>+visl trace events</div><div class='add'>+-----------------</div><div class='add'>+The trace events are defined on a per-codec basis, e.g.:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+        $ ls /sys/kernel/debug/tracing/events/ | grep visl</div><div class='add'>+        visl_fwht_controls</div><div class='add'>+        visl_h264_controls</div><div class='add'>+        visl_hevc_controls</div><div class='add'>+        visl_mpeg2_controls</div><div class='add'>+        visl_vp8_controls</div><div class='add'>+        visl_vp9_controls</div><div class='add'>+</div><div class='add'>+For example, in order to dump HEVC SPS data:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+        $ echo 1 &gt;  /sys/kernel/debug/tracing/events/visl_hevc_controls/v4l2_ctrl_hevc_sps/enable</div><div class='add'>+</div><div class='add'>+The SPS data will be dumped to the trace buffer, i.e.:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+        $ cat /sys/kernel/debug/tracing/trace</div><div class='add'>+        video_parameter_set_id 0</div><div class='add'>+        seq_parameter_set_id 0</div><div class='add'>+        pic_width_in_luma_samples 1920</div><div class='add'>+        pic_height_in_luma_samples 1080</div><div class='add'>+        bit_depth_luma_minus8 0</div><div class='add'>+        bit_depth_chroma_minus8 0</div><div class='add'>+        log2_max_pic_order_cnt_lsb_minus4 4</div><div class='add'>+        sps_max_dec_pic_buffering_minus1 6</div><div class='add'>+        sps_max_num_reorder_pics 2</div><div class='add'>+        sps_max_latency_increase_plus1 0</div><div class='add'>+        log2_min_luma_coding_block_size_minus3 0</div><div class='add'>+        log2_diff_max_min_luma_coding_block_size 3</div><div class='add'>+        log2_min_luma_transform_block_size_minus2 0</div><div class='add'>+        log2_diff_max_min_luma_transform_block_size 3</div><div class='add'>+        max_transform_hierarchy_depth_inter 2</div><div class='add'>+        max_transform_hierarchy_depth_intra 2</div><div class='add'>+        pcm_sample_bit_depth_luma_minus1 0</div><div class='add'>+        pcm_sample_bit_depth_chroma_minus1 0</div><div class='add'>+        log2_min_pcm_luma_coding_block_size_minus3 0</div><div class='add'>+        log2_diff_max_min_pcm_luma_coding_block_size 0</div><div class='add'>+        num_short_term_ref_pic_sets 0</div><div class='add'>+        num_long_term_ref_pics_sps 0</div><div class='add'>+        chroma_format_idc 1</div><div class='add'>+        sps_max_sub_layers_minus1 0</div><div class='add'>+        flags AMP_ENABLED|SAMPLE_ADAPTIVE_OFFSET|TEMPORAL_MVP_ENABLED|STRONG_INTRA_SMOOTHING_ENABLED</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Dumping OUTPUT buffer data through debugfs</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+If the **VISL_DEBUGFS** Kconfig is enabled, visl will populate</div><div class='add'>+**/sys/kernel/debug/visl/bitstream** with OUTPUT buffer data according to the</div><div class='add'>+values of bitstream_trace_frame_start and bitstream_trace_nframes. This can</div><div class='add'>+highlight errors as broken clients may fail to fill the buffers properly.</div><div class='add'>+</div><div class='add'>+A single file is created for each processed OUTPUT buffer. Its name contains an</div><div class='add'>+integer that denotes the buffer sequence, i.e.:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	snprintf(name, 32, "bitstream%d", run-&gt;src-&gt;sequence);</div><div class='add'>+</div><div class='add'>+Dumping the values is simply a matter of reading from the file, i.e.:</div><div class='add'>+</div><div class='add'>+For the buffer with sequence == 0:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+        $ xxd /sys/kernel/debug/visl/bitstream/bitstream0</div><div class='add'>+        00000000: 2601 af04 d088 bc25 a173 0e41 a4f2 3274  &amp;......%.s.A..2t</div><div class='add'>+        00000010: c668 cb28 e775 b4ac f53a ba60 f8fd 3aa1  .h.(.u...:.`..:.</div><div class='add'>+        00000020: 46b4 bcfc 506c e227 2372 e5f5 d7ea 579f  F...Pl.'#r....W.</div><div class='add'>+        00000030: 6371 5eb5 0eb8 23b5 ca6a 5de5 983a 19e4  cq^...#..j]..:..</div><div class='add'>+        00000040: e8c3 4320 b4ba a226 cbc1 4138 3a12 32d6  ..C ...&amp;..A8:.2.</div><div class='add'>+        00000050: fef3 247b 3523 4e90 9682 ac8e eb0c a389  ..${5#N.........</div><div class='add'>+        00000060: ddd0 6cfc 0187 0e20 7aae b15b 1812 3d33  ..l.... z..[..=3</div><div class='add'>+        00000070: e1c5 f425 a83a 00b7 4f18 8127 3c4c aefb  ...%.:..O..'&lt;L..</div><div class='add'>+</div><div class='add'>+For the buffer with sequence == 1:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+        $ xxd /sys/kernel/debug/visl/bitstream/bitstream1</div><div class='add'>+        00000000: 0201 d021 49e1 0c40 aa11 1449 14a6 01dc  ...!I..@...I....</div><div class='add'>+        00000010: 7023 889a c8cd 2cd0 13b4 dab0 e8ca 21fe  p#....,.......!.</div><div class='add'>+        00000020: c4c8 ab4c 486e 4e2f b0df 96cc c74e 8dde  ...LHnN/.....N..</div><div class='add'>+        00000030: 8ce7 ee36 d880 4095 4d64 30a0 ff4f 0c5e  ...6..@.Md0..O.^</div><div class='add'>+        00000040: f16b a6a1 d806 ca2a 0ece a673 7bea 1f37  .k.....*...s{..7</div><div class='add'>+        00000050: 370f 5bb9 1dc4 ba21 6434 bc53 0173 cba0  7.[....!d4.S.s..</div><div class='add'>+        00000060: dfe6 bc99 01ea b6e0 346b 92b5 c8de 9f5d  ........4k.....]</div><div class='add'>+        00000070: e7cc 3484 1769 fef2 a693 a945 2c8b 31da  ..4..i.....E,.1.</div><div class='add'>+</div><div class='add'>+And so on.</div><div class='add'>+</div><div class='add'>+By default, the files are removed during STREAMOFF. This is to reduce the amount</div><div class='add'>+of clutter.</div><div class='head'>diff --git a/Documentation/admin-guide/media/vivid.rst b/Documentation/admin-guide/media/vivid.rst<br/>index 6d7175f96f74..58ac25b2c385 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/vivid.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/vivid.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/vivid.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/media/vivid.rst</a></div><div class='hunk'>@@ -392,7 +392,7 @@ Which one is returned depends on the chosen channel, each next valid channel</div><div class='ctx'> will cycle through the possible audio subchannel combinations. This allows</div><div class='ctx'> you to test the various combinations by just switching channels..</div><div class='ctx'> </div><div class='del'>-Finally, for these inputs the v4l2_timecode struct is filled in in the</div><div class='add'>+Finally, for these inputs the v4l2_timecode struct is filled in the</div><div class='ctx'> dequeued v4l2_buffer struct.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -580,7 +580,7 @@ Metadata Capture</div><div class='ctx'> ----------------</div><div class='ctx'> </div><div class='ctx'> The Metadata capture generates UVC format metadata. The PTS and SCR are</div><div class='del'>-transmitted based on the values set in vivid contols.</div><div class='add'>+transmitted based on the values set in vivid controls.</div><div class='ctx'> </div><div class='ctx'> The Metadata device will only work for the Webcam input, it will give</div><div class='ctx'> back an error for all other inputs.</div><div class='hunk'>@@ -714,6 +714,20 @@ The Test Pattern Controls are all specific to video capture.</div><div class='ctx'> </div><div class='ctx'> 	does the same for the EAV (End of Active Video) code.</div><div class='ctx'> </div><div class='add'>+- Insert Video Guard Band</div><div class='add'>+</div><div class='add'>+	adds 4 columns of pixels with the HDMI Video Guard Band code at the</div><div class='add'>+	left hand side of the image. This only works with 3 or 4 byte RGB pixel</div><div class='add'>+	formats. The RGB pixel value 0xab/0x55/0xab turns out to be equivalent</div><div class='add'>+	to the HDMI Video Guard Band code that precedes each active video line</div><div class='add'>+	(see section 5.2.2.1 in the HDMI 1.3 Specification). To test if a video</div><div class='add'>+	receiver has correct HDMI Video Guard Band processing, enable this</div><div class='add'>+	control and then move the image to the left hand side of the screen.</div><div class='add'>+	That will result in video lines that start with multiple pixels that</div><div class='add'>+	have the same value as the Video Guard Band that precedes them.</div><div class='add'>+	Receivers that will just keep skipping Video Guard Band values will</div><div class='add'>+	now fail and either loose sync or these video lines will shift.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Capture Feature Selection Controls</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='hunk'>@@ -1304,7 +1318,7 @@ instance. This setup would require the following commands:</div><div class='ctx'> 	$ v4l2-ctl -d2 -i2</div><div class='ctx'> 	$ v4l2-ctl -d2 -c horizontal_movement=4</div><div class='ctx'> 	$ v4l2-ctl -d1 --overlay=1</div><div class='del'>-	$ v4l2-ctl -d1 -c loop_video=1</div><div class='add'>+	$ v4l2-ctl -d0 -c loop_video=1</div><div class='ctx'> 	$ v4l2-ctl -d2 --stream-mmap --overlay=1</div><div class='ctx'> </div><div class='ctx'> And from another console:</div><div class='head'>diff --git a/Documentation/admin-guide/media/zr364xx.rst b/Documentation/admin-guide/media/zr364xx.rst<br/>deleted file mode 100644<br/>index 7291e54b8be3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/media/zr364xx.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/media/zr364xx.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,102 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-Zoran 364xx based USB webcam module</div><div class='del'>-===================================</div><div class='del'>-</div><div class='del'>-site: http://royale.zerezo.com/zr364xx/</div><div class='del'>-</div><div class='del'>-mail: royale@zerezo.com</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-This brings support under Linux for the Aiptek PocketDV 3300 and similar</div><div class='del'>-devices in webcam mode. If you just want to get on your PC the pictures</div><div class='del'>-and movies on the camera, you should use the usb-storage module instead.</div><div class='del'>-</div><div class='del'>-The driver works with several other cameras in webcam mode (see the list</div><div class='del'>-below).</div><div class='del'>-</div><div class='del'>-Possible chipsets are : ZR36430 (ZR36430BGC) and</div><div class='del'>-maybe ZR36431, ZR36440, ZR36442...</div><div class='del'>-</div><div class='del'>-You can try the experience changing the vendor/product ID values (look</div><div class='del'>-at the source code).</div><div class='del'>-</div><div class='del'>-You can get these values by looking at /var/log/messages when you plug</div><div class='del'>-your camera, or by typing : cat /sys/kernel/debug/usb/devices.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Install</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-In order to use this driver, you must compile it with your kernel,</div><div class='del'>-with the following config options::</div><div class='del'>-</div><div class='del'>-    ./scripts/config -e USB</div><div class='del'>-    ./scripts/config -m MEDIA_SUPPORT</div><div class='del'>-    ./scripts/config -e MEDIA_USB_SUPPORT</div><div class='del'>-    ./scripts/config -e MEDIA_CAMERA_SUPPORT</div><div class='del'>-    ./scripts/config -m USB_ZR364XX</div><div class='del'>-</div><div class='del'>-Usage</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-modprobe zr364xx debug=X mode=Y</div><div class='del'>-</div><div class='del'>-- debug      : set to 1 to enable verbose debug messages</div><div class='del'>-- mode       : 0 = 320x240, 1 = 160x120, 2 = 640x480</div><div class='del'>-</div><div class='del'>-You can then use the camera with V4L2 compatible applications, for</div><div class='del'>-example Ekiga.</div><div class='del'>-</div><div class='del'>-To capture a single image, try this: dd if=/dev/video0 of=test.jpg bs=1M</div><div class='del'>-count=1</div><div class='del'>-</div><div class='del'>-links</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-http://mxhaard.free.fr/ (support for many others cams including some Aiptek PocketDV)</div><div class='del'>-http://www.harmwal.nl/pccam880/ (this project also supports cameras based on this chipset)</div><div class='del'>-</div><div class='del'>-Supported devices</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-======  =======  ==============  ====================</div><div class='del'>-Vendor  Product  Distributor     Model</div><div class='del'>-======  =======  ==============  ====================</div><div class='del'>-0x08ca  0x0109   Aiptek          PocketDV 3300</div><div class='del'>-0x08ca  0x0109   Maxell          Maxcam PRO DV3</div><div class='del'>-0x041e  0x4024   Creative        PC-CAM 880</div><div class='del'>-0x0d64  0x0108   Aiptek          Fidelity 3200</div><div class='del'>-0x0d64  0x0108   Praktica        DCZ 1.3 S</div><div class='del'>-0x0d64  0x0108   Genius          Digital Camera (?)</div><div class='del'>-0x0d64  0x0108   DXG Technology  Fashion Cam</div><div class='del'>-0x0546  0x3187   Polaroid        iON 230</div><div class='del'>-0x0d64  0x3108   Praktica        Exakta DC 2200</div><div class='del'>-0x0d64  0x3108   Genius          G-Shot D211</div><div class='del'>-0x0595  0x4343   Concord         Eye-Q Duo 1300</div><div class='del'>-0x0595  0x4343   Concord         Eye-Q Duo 2000</div><div class='del'>-0x0595  0x4343   Fujifilm        EX-10</div><div class='del'>-0x0595  0x4343   Ricoh           RDC-6000</div><div class='del'>-0x0595  0x4343   Digitrex        DSC 1300</div><div class='del'>-0x0595  0x4343   Firstline       FDC 2000</div><div class='del'>-0x0bb0  0x500d   Concord         EyeQ Go Wireless</div><div class='del'>-0x0feb  0x2004   CRS Electronic  3.3 Digital Camera</div><div class='del'>-0x0feb  0x2004   Packard Bell    DSC-300</div><div class='del'>-0x055f  0xb500   Mustek          MDC 3000</div><div class='del'>-0x08ca  0x2062   Aiptek          PocketDV 5700</div><div class='del'>-0x052b  0x1a18   Chiphead        Megapix V12</div><div class='del'>-0x04c8  0x0729   Konica          Revio 2</div><div class='del'>-0x04f2  0xa208   Creative        PC-CAM 850</div><div class='del'>-0x0784  0x0040   Traveler        Slimline X5</div><div class='del'>-0x06d6  0x0034   Trust           Powerc@m 750</div><div class='del'>-0x0a17  0x0062   Pentax          Optio 50L</div><div class='del'>-0x06d6  0x003b   Trust           Powerc@m 970Z</div><div class='del'>-0x0a17  0x004e   Pentax          Optio 50</div><div class='del'>-0x041e  0x405d   Creative        DiVi CAM 516</div><div class='del'>-0x08ca  0x2102   Aiptek          DV T300</div><div class='del'>-0x06d6  0x003d   Trust           Powerc@m 910Z</div><div class='del'>-======  =======  ==============  ====================</div><div class='head'>diff --git a/Documentation/admin-guide/mm/cma_debugfs.rst b/Documentation/admin-guide/mm/cma_debugfs.rst<br/>index 4e06ffabd78a..7367e6294ef6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/cma_debugfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/cma_debugfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/cma_debugfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/cma_debugfs.rst</a></div><div class='hunk'>@@ -5,10 +5,10 @@ CMA Debugfs Interface</div><div class='ctx'> The CMA debugfs interface is useful to retrieve basic information out of the</div><div class='ctx'> different CMA areas and to test allocation/release in each of the areas.</div><div class='ctx'> </div><div class='del'>-Each CMA zone represents a directory under &lt;debugfs&gt;/cma/, indexed by the</div><div class='del'>-kernel's CMA index. So the first CMA zone would be:</div><div class='add'>+Each CMA area represents a directory under &lt;debugfs&gt;/cma/, represented by</div><div class='add'>+its CMA name like below:</div><div class='ctx'> </div><div class='del'>-	&lt;debugfs&gt;/cma/cma-0</div><div class='add'>+	&lt;debugfs&gt;/cma/&lt;cma_name&gt;</div><div class='ctx'> </div><div class='ctx'> The structure of the files created under that directory is as follows:</div><div class='ctx'> </div><div class='hunk'>@@ -18,8 +18,8 @@ The structure of the files created under that directory is as follows:</div><div class='ctx'>  - [RO] bitmap: The bitmap of page states in the zone.</div><div class='ctx'>  - [WO] alloc: Allocate N pages from that CMA area. For example::</div><div class='ctx'> </div><div class='del'>-	echo 5 &gt; &lt;debugfs&gt;/cma/cma-2/alloc</div><div class='add'>+	echo 5 &gt; &lt;debugfs&gt;/cma/&lt;cma_name&gt;/alloc</div><div class='ctx'> </div><div class='del'>-would try to allocate 5 pages from the cma-2 area.</div><div class='add'>+would try to allocate 5 pages from the 'cma_name' area.</div><div class='ctx'> </div><div class='ctx'>  - [WO] free: Free N pages from that CMA area, similar to the above.</div><div class='head'>diff --git a/Documentation/admin-guide/mm/concepts.rst b/Documentation/admin-guide/mm/concepts.rst<br/>index b966fcff993b..e796b0a7e4a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/concepts.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/concepts.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/concepts.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/concepts.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _mm_concepts:</div><div class='del'>-</div><div class='ctx'> =================</div><div class='ctx'> Concepts overview</div><div class='ctx'> =================</div><div class='hunk'>@@ -86,16 +84,15 @@ memory with the huge pages. The first one is `HugeTLB filesystem`, or</div><div class='ctx'> hugetlbfs. It is a pseudo filesystem that uses RAM as its backing</div><div class='ctx'> store. For the files created in this filesystem the data resides in</div><div class='ctx'> the memory and mapped using huge pages. The hugetlbfs is described at</div><div class='del'>-:ref:`Documentation/admin-guide/mm/hugetlbpage.rst &lt;hugetlbpage&gt;`.</div><div class='add'>+Documentation/admin-guide/mm/hugetlbpage.rst.</div><div class='ctx'> </div><div class='ctx'> Another, more recent, mechanism that enables use of the huge pages is</div><div class='ctx'> called `Transparent HugePages`, or THP. Unlike the hugetlbfs that</div><div class='ctx'> requires users and/or system administrators to configure what parts of</div><div class='ctx'> the system memory should and can be mapped by the huge pages, THP</div><div class='ctx'> manages such mappings transparently to the user and hence the</div><div class='del'>-name. See</div><div class='del'>-:ref:`Documentation/admin-guide/mm/transhuge.rst &lt;admin_guide_transhuge&gt;`</div><div class='del'>-for more details about THP.</div><div class='add'>+name. See Documentation/admin-guide/mm/transhuge.rst for more details</div><div class='add'>+about THP.</div><div class='ctx'> </div><div class='ctx'> Zones</div><div class='ctx'> =====</div><div class='hunk'>@@ -125,8 +122,8 @@ processor. Each bank is referred to as a `node` and for each node Linux</div><div class='ctx'> constructs an independent memory management subsystem. A node has its</div><div class='ctx'> own set of zones, lists of free and used pages and various statistics</div><div class='ctx'> counters. You can find more details about NUMA in</div><div class='del'>-:ref:`Documentation/vm/numa.rst &lt;numa&gt;` and in</div><div class='del'>-:ref:`Documentation/admin-guide/mm/numa_memory_policy.rst &lt;numa_memory_policy&gt;`.</div><div class='add'>+Documentation/mm/numa.rst` and in</div><div class='add'>+Documentation/admin-guide/mm/numa_memory_policy.rst.</div><div class='ctx'> </div><div class='ctx'> Page cache</div><div class='ctx'> ==========</div><div class='head'>diff --git a/Documentation/admin-guide/mm/damon/index.rst b/Documentation/admin-guide/mm/damon/index.rst<br/>index 61aff88347f3..33d37bb2fb4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/damon/index.rst</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-========================</div><div class='del'>-Monitoring Data Accesses</div><div class='del'>-========================</div><div class='add'>+==========================</div><div class='add'>+DAMON: Data Access MONitor</div><div class='add'>+==========================</div><div class='ctx'> </div><div class='del'>-:doc:`DAMON &lt;/vm/damon/index&gt;` allows light-weight data access monitoring.</div><div class='add'>+:doc:`DAMON &lt;/mm/damon/index&gt;` allows light-weight data access monitoring.</div><div class='ctx'> Using DAMON, users can analyze the memory access patterns of their systems and</div><div class='ctx'> optimize those.</div><div class='ctx'> </div><div class='hunk'>@@ -14,3 +14,4 @@ optimize those.</div><div class='ctx'>    start</div><div class='ctx'>    usage</div><div class='ctx'>    reclaim</div><div class='add'>+   lru_sort</div><div class='head'>diff --git a/Documentation/admin-guide/mm/damon/lru_sort.rst b/Documentation/admin-guide/mm/damon/lru_sort.rst<br/>new file mode 100644<br/>index 000000000000..7b0775d281b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/lru_sort.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/damon/lru_sort.rst</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=============================</div><div class='add'>+DAMON-based LRU-lists Sorting</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+DAMON-based LRU-lists Sorting (DAMON_LRU_SORT) is a static kernel module that</div><div class='add'>+aimed to be used for proactive and lightweight data access pattern based</div><div class='add'>+(de)prioritization of pages on their LRU-lists for making LRU-lists a more</div><div class='add'>+trusworthy data access pattern source.</div><div class='add'>+</div><div class='add'>+Where Proactive LRU-lists Sorting is Required?</div><div class='add'>+==============================================</div><div class='add'>+</div><div class='add'>+As page-granularity access checking overhead could be significant on huge</div><div class='add'>+systems, LRU lists are normally not proactively sorted but partially and</div><div class='add'>+reactively sorted for special events including specific user requests, system</div><div class='add'>+calls and memory pressure.  As a result, LRU lists are sometimes not so</div><div class='add'>+perfectly prepared to be used as a trustworthy access pattern source for some</div><div class='add'>+situations including reclamation target pages selection under sudden memory</div><div class='add'>+pressure.</div><div class='add'>+</div><div class='add'>+Because DAMON can identify access patterns of best-effort accuracy while</div><div class='add'>+inducing only user-specified range of overhead, proactively running</div><div class='add'>+DAMON_LRU_SORT could be helpful for making LRU lists more trustworthy access</div><div class='add'>+pattern source with low and controlled overhead.</div><div class='add'>+</div><div class='add'>+How It Works?</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+DAMON_LRU_SORT finds hot pages (pages of memory regions that showing access</div><div class='add'>+rates that higher than a user-specified threshold) and cold pages (pages of</div><div class='add'>+memory regions that showing no access for a time that longer than a</div><div class='add'>+user-specified threshold) using DAMON, and prioritizes hot pages while</div><div class='add'>+deprioritizing cold pages on their LRU-lists.  To avoid it consuming too much</div><div class='add'>+CPU for the prioritizations, a CPU time usage limit can be configured.  Under</div><div class='add'>+the limit, it prioritizes and deprioritizes more hot and cold pages first,</div><div class='add'>+respectively.  System administrators can also configure under what situation</div><div class='add'>+this scheme should automatically activated and deactivated with three memory</div><div class='add'>+pressure watermarks.</div><div class='add'>+</div><div class='add'>+Its default parameters for hotness/coldness thresholds and CPU quota limit are</div><div class='add'>+conservatively chosen.  That is, the module under its default parameters could</div><div class='add'>+be widely used without harm for common situations while providing a level of</div><div class='add'>+benefits for systems having clear hot/cold access patterns under memory</div><div class='add'>+pressure while consuming only a limited small portion of CPU time.</div><div class='add'>+</div><div class='add'>+Interface: Module Parameters</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+To use this feature, you should first ensure your system is running on a kernel</div><div class='add'>+that is built with ``CONFIG_DAMON_LRU_SORT=y``.</div><div class='add'>+</div><div class='add'>+To let sysadmins enable or disable it and tune for the given system,</div><div class='add'>+DAMON_LRU_SORT utilizes module parameters.  That is, you can put</div><div class='add'>+``damon_lru_sort.&lt;parameter&gt;=&lt;value&gt;`` on the kernel boot command line or write</div><div class='add'>+proper values to ``/sys/module/damon_lru_sort/parameters/&lt;parameter&gt;`` files.</div><div class='add'>+</div><div class='add'>+Below are the description of each parameter.</div><div class='add'>+</div><div class='add'>+enabled</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+Enable or disable DAMON_LRU_SORT.</div><div class='add'>+</div><div class='add'>+You can enable DAMON_LRU_SORT by setting the value of this parameter as ``Y``.</div><div class='add'>+Setting it as ``N`` disables DAMON_LRU_SORT.  Note that DAMON_LRU_SORT could do</div><div class='add'>+no real monitoring and LRU-lists sorting due to the watermarks-based activation</div><div class='add'>+condition.  Refer to below descriptions for the watermarks parameter for this.</div><div class='add'>+</div><div class='add'>+commit_inputs</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Make DAMON_LRU_SORT reads the input parameters again, except ``enabled``.</div><div class='add'>+</div><div class='add'>+Input parameters that updated while DAMON_LRU_SORT is running are not applied</div><div class='add'>+by default.  Once this parameter is set as ``Y``, DAMON_LRU_SORT reads values</div><div class='add'>+of parametrs except ``enabled`` again.  Once the re-reading is done, this</div><div class='add'>+parameter is set as ``N``.  If invalid parameters are found while the</div><div class='add'>+re-reading, DAMON_LRU_SORT will be disabled.</div><div class='add'>+</div><div class='add'>+hot_thres_access_freq</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+Access frequency threshold for hot memory regions identification in permil.</div><div class='add'>+</div><div class='add'>+If a memory region is accessed in frequency of this or higher, DAMON_LRU_SORT</div><div class='add'>+identifies the region as hot, and mark it as accessed on the LRU list, so that</div><div class='add'>+it could not be reclaimed under memory pressure.  50% by default.</div><div class='add'>+</div><div class='add'>+cold_min_age</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Time threshold for cold memory regions identification in microseconds.</div><div class='add'>+</div><div class='add'>+If a memory region is not accessed for this or longer time, DAMON_LRU_SORT</div><div class='add'>+identifies the region as cold, and mark it as unaccessed on the LRU list, so</div><div class='add'>+that it could be reclaimed first under memory pressure.  120 seconds by</div><div class='add'>+default.</div><div class='add'>+</div><div class='add'>+quota_ms</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+Limit of time for trying the LRU lists sorting in milliseconds.</div><div class='add'>+</div><div class='add'>+DAMON_LRU_SORT tries to use only up to this time within a time window</div><div class='add'>+(quota_reset_interval_ms) for trying LRU lists sorting.  This can be used</div><div class='add'>+for limiting CPU consumption of DAMON_LRU_SORT.  If the value is zero, the</div><div class='add'>+limit is disabled.</div><div class='add'>+</div><div class='add'>+10 ms by default.</div><div class='add'>+</div><div class='add'>+quota_reset_interval_ms</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+The time quota charge reset interval in milliseconds.</div><div class='add'>+</div><div class='add'>+The charge reset interval for the quota of time (quota_ms).  That is,</div><div class='add'>+DAMON_LRU_SORT does not try LRU-lists sorting for more than quota_ms</div><div class='add'>+milliseconds or quota_sz bytes within quota_reset_interval_ms milliseconds.</div><div class='add'>+</div><div class='add'>+1 second by default.</div><div class='add'>+</div><div class='add'>+wmarks_interval</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+The watermarks check time interval in microseconds.</div><div class='add'>+</div><div class='add'>+Minimal time to wait before checking the watermarks, when DAMON_LRU_SORT is</div><div class='add'>+enabled but inactive due to its watermarks rule.  5 seconds by default.</div><div class='add'>+</div><div class='add'>+wmarks_high</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Free memory rate (per thousand) for the high watermark.</div><div class='add'>+</div><div class='add'>+If free memory of the system in bytes per thousand bytes is higher than this,</div><div class='add'>+DAMON_LRU_SORT becomes inactive, so it does nothing but periodically checks the</div><div class='add'>+watermarks.  200 (20%) by default.</div><div class='add'>+</div><div class='add'>+wmarks_mid</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+Free memory rate (per thousand) for the middle watermark.</div><div class='add'>+</div><div class='add'>+If free memory of the system in bytes per thousand bytes is between this and</div><div class='add'>+the low watermark, DAMON_LRU_SORT becomes active, so starts the monitoring and</div><div class='add'>+the LRU-lists sorting.  150 (15%) by default.</div><div class='add'>+</div><div class='add'>+wmarks_low</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+Free memory rate (per thousand) for the low watermark.</div><div class='add'>+</div><div class='add'>+If free memory of the system in bytes per thousand bytes is lower than this,</div><div class='add'>+DAMON_LRU_SORT becomes inactive, so it does nothing but periodically checks the</div><div class='add'>+watermarks.  50 (5%) by default.</div><div class='add'>+</div><div class='add'>+sample_interval</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Sampling interval for the monitoring in microseconds.</div><div class='add'>+</div><div class='add'>+The sampling interval of DAMON for the cold memory monitoring.  Please refer to</div><div class='add'>+the DAMON documentation (:doc:`usage`) for more detail.  5ms by default.</div><div class='add'>+</div><div class='add'>+aggr_interval</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Aggregation interval for the monitoring in microseconds.</div><div class='add'>+</div><div class='add'>+The aggregation interval of DAMON for the cold memory monitoring.  Please</div><div class='add'>+refer to the DAMON documentation (:doc:`usage`) for more detail.  100ms by</div><div class='add'>+default.</div><div class='add'>+</div><div class='add'>+min_nr_regions</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Minimum number of monitoring regions.</div><div class='add'>+</div><div class='add'>+The minimal number of monitoring regions of DAMON for the cold memory</div><div class='add'>+monitoring.  This can be used to set lower-bound of the monitoring quality.</div><div class='add'>+But, setting this too high could result in increased monitoring overhead.</div><div class='add'>+Please refer to the DAMON documentation (:doc:`usage`) for more detail.  10 by</div><div class='add'>+default.</div><div class='add'>+</div><div class='add'>+max_nr_regions</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Maximum number of monitoring regions.</div><div class='add'>+</div><div class='add'>+The maximum number of monitoring regions of DAMON for the cold memory</div><div class='add'>+monitoring.  This can be used to set upper-bound of the monitoring overhead.</div><div class='add'>+However, setting this too low could result in bad monitoring quality.  Please</div><div class='add'>+refer to the DAMON documentation (:doc:`usage`) for more detail.  1000 by</div><div class='add'>+defaults.</div><div class='add'>+</div><div class='add'>+monitor_region_start</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Start of target memory region in physical address.</div><div class='add'>+</div><div class='add'>+The start physical address of memory region that DAMON_LRU_SORT will do work</div><div class='add'>+against.  By default, biggest System RAM is used as the region.</div><div class='add'>+</div><div class='add'>+monitor_region_end</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+End of target memory region in physical address.</div><div class='add'>+</div><div class='add'>+The end physical address of memory region that DAMON_LRU_SORT will do work</div><div class='add'>+against.  By default, biggest System RAM is used as the region.</div><div class='add'>+</div><div class='add'>+kdamond_pid</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+PID of the DAMON thread.</div><div class='add'>+</div><div class='add'>+If DAMON_LRU_SORT is enabled, this becomes the PID of the worker thread.  Else,</div><div class='add'>+-1.</div><div class='add'>+</div><div class='add'>+nr_lru_sort_tried_hot_regions</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+Number of hot memory regions that tried to be LRU-sorted.</div><div class='add'>+</div><div class='add'>+bytes_lru_sort_tried_hot_regions</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+Total bytes of hot memory regions that tried to be LRU-sorted.</div><div class='add'>+</div><div class='add'>+nr_lru_sorted_hot_regions</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+Number of hot memory regions that successfully be LRU-sorted.</div><div class='add'>+</div><div class='add'>+bytes_lru_sorted_hot_regions</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+Total bytes of hot memory regions that successfully be LRU-sorted.</div><div class='add'>+</div><div class='add'>+nr_hot_quota_exceeds</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Number of times that the time quota limit for hot regions have exceeded.</div><div class='add'>+</div><div class='add'>+nr_lru_sort_tried_cold_regions</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+Number of cold memory regions that tried to be LRU-sorted.</div><div class='add'>+</div><div class='add'>+bytes_lru_sort_tried_cold_regions</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+Total bytes of cold memory regions that tried to be LRU-sorted.</div><div class='add'>+</div><div class='add'>+nr_lru_sorted_cold_regions</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Number of cold memory regions that successfully be LRU-sorted.</div><div class='add'>+</div><div class='add'>+bytes_lru_sorted_cold_regions</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+Total bytes of cold memory regions that successfully be LRU-sorted.</div><div class='add'>+</div><div class='add'>+nr_cold_quota_exceeds</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+Number of times that the time quota limit for cold regions have exceeded.</div><div class='add'>+</div><div class='add'>+Example</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+Below runtime example commands make DAMON_LRU_SORT to find memory regions</div><div class='add'>+having &gt;=50% access frequency and LRU-prioritize while LRU-deprioritizing</div><div class='add'>+memory regions that not accessed for 120 seconds.  The prioritization and</div><div class='add'>+deprioritization is limited to be done using only up to 1% CPU time to avoid</div><div class='add'>+DAMON_LRU_SORT consuming too much CPU time for the (de)prioritization.  It also</div><div class='add'>+asks DAMON_LRU_SORT to do nothing if the system's free memory rate is more than</div><div class='add'>+50%, but start the real works if it becomes lower than 40%.  If DAMON_RECLAIM</div><div class='add'>+doesn't make progress and therefore the free memory rate becomes lower than</div><div class='add'>+20%, it asks DAMON_LRU_SORT to do nothing again, so that we can fall back to</div><div class='add'>+the LRU-list based page granularity reclamation. ::</div><div class='add'>+</div><div class='add'>+    # cd /sys/module/damon_lru_sort/parameters</div><div class='add'>+    # echo 500 &gt; hot_thres_access_freq</div><div class='add'>+    # echo 120000000 &gt; cold_min_age</div><div class='add'>+    # echo 10 &gt; quota_ms</div><div class='add'>+    # echo 1000 &gt; quota_reset_interval_ms</div><div class='add'>+    # echo 500 &gt; wmarks_high</div><div class='add'>+    # echo 400 &gt; wmarks_mid</div><div class='add'>+    # echo 200 &gt; wmarks_low</div><div class='add'>+    # echo Y &gt; enabled</div><div class='head'>diff --git a/Documentation/admin-guide/mm/damon/reclaim.rst b/Documentation/admin-guide/mm/damon/reclaim.rst<br/>index 0af51a9705b1..343e25b252f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/reclaim.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/reclaim.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/reclaim.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/damon/reclaim.rst</a></div><div class='hunk'>@@ -46,13 +46,7 @@ that is built with ``CONFIG_DAMON_RECLAIM=y``.</div><div class='ctx'> To let sysadmins enable or disable it and tune for the given system,</div><div class='ctx'> DAMON_RECLAIM utilizes module parameters.  That is, you can put</div><div class='ctx'> ``damon_reclaim.&lt;parameter&gt;=&lt;value&gt;`` on the kernel boot command line or write</div><div class='del'>-proper values to ``/sys/modules/damon_reclaim/parameters/&lt;parameter&gt;`` files.</div><div class='del'>-</div><div class='del'>-Note that the parameter values except ``enabled`` are applied only when</div><div class='del'>-DAMON_RECLAIM starts.  Therefore, if you want to apply new parameter values in</div><div class='del'>-runtime and DAMON_RECLAIM is already enabled, you should disable and re-enable</div><div class='del'>-it via ``enabled`` parameter file.  Writing of the new values to proper</div><div class='del'>-parameter values should be done before the re-enablement.</div><div class='add'>+proper values to ``/sys/module/damon_reclaim/parameters/&lt;parameter&gt;`` files.</div><div class='ctx'> </div><div class='ctx'> Below are the description of each parameter.</div><div class='ctx'> </div><div class='hunk'>@@ -66,6 +60,17 @@ Setting it as ``N`` disables DAMON_RECLAIM.  Note that DAMON_RECLAIM could do</div><div class='ctx'> no real monitoring and reclamation due to the watermarks-based activation</div><div class='ctx'> condition.  Refer to below descriptions for the watermarks parameter for this.</div><div class='ctx'> </div><div class='add'>+commit_inputs</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Make DAMON_RECLAIM reads the input parameters again, except ``enabled``.</div><div class='add'>+</div><div class='add'>+Input parameters that updated while DAMON_RECLAIM is running are not applied</div><div class='add'>+by default.  Once this parameter is set as ``Y``, DAMON_RECLAIM reads values</div><div class='add'>+of parametrs except ``enabled`` again.  Once the re-reading is done, this</div><div class='add'>+parameter is set as ``N``.  If invalid parameters are found while the</div><div class='add'>+re-reading, DAMON_RECLAIM will be disabled.</div><div class='add'>+</div><div class='ctx'> min_age</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='hunk'>@@ -200,6 +205,15 @@ The end physical address of memory region that DAMON_RECLAIM will do work</div><div class='ctx'> against.  That is, DAMON_RECLAIM will find cold memory regions in this region</div><div class='ctx'> and reclaims.  By default, biggest System RAM is used as the region.</div><div class='ctx'> </div><div class='add'>+skip_anon</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+Skip anonymous pages reclamation.</div><div class='add'>+</div><div class='add'>+If this parameter is set as ``Y``, DAMON_RECLAIM does not reclaim anonymous</div><div class='add'>+pages.  By default, ``N``.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> kdamond_pid</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='hunk'>@@ -246,7 +260,7 @@ therefore the free memory rate becomes lower than 20%, it asks DAMON_RECLAIM to</div><div class='ctx'> do nothing again, so that we can fall back to the LRU-list based page</div><div class='ctx'> granularity reclamation. ::</div><div class='ctx'> </div><div class='del'>-    # cd /sys/modules/damon_reclaim/parameters</div><div class='add'>+    # cd /sys/module/damon_reclaim/parameters</div><div class='ctx'>     # echo 30000000 &gt; min_age</div><div class='ctx'>     # echo $((1 * 1024 * 1024 * 1024)) &gt; quota_sz</div><div class='ctx'>     # echo 1000 &gt; quota_reset_interval_ms</div><div class='hunk'>@@ -257,4 +271,4 @@ granularity reclamation. ::</div><div class='ctx'> </div><div class='ctx'> .. [1] https://research.google/pubs/pub48551/</div><div class='ctx'> .. [2] https://lwn.net/Articles/787611/</div><div class='del'>-.. [3] https://www.kernel.org/doc/html/latest/vm/free_page_reporting.html</div><div class='add'>+.. [3] https://www.kernel.org/doc/html/latest/mm/free_page_reporting.html</div><div class='head'>diff --git a/Documentation/admin-guide/mm/damon/start.rst b/Documentation/admin-guide/mm/damon/start.rst<br/>index 4d5ca2c46288..9f88afc734da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/start.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/start.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/start.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/damon/start.rst</a></div><div class='hunk'>@@ -29,16 +29,9 @@ called DAMON Operator (DAMO).  It is available at</div><div class='ctx'> https://github.com/awslabs/damo.  The examples below assume that ``damo`` is on</div><div class='ctx'> your ``$PATH``.  It's not mandatory, though.</div><div class='ctx'> </div><div class='del'>-Because DAMO is using the debugfs interface (refer to :doc:`usage` for the</div><div class='del'>-detail) of DAMON, you should ensure debugfs is mounted.  Mount it manually as</div><div class='del'>-below::</div><div class='del'>-</div><div class='del'>-    # mount -t debugfs none /sys/kernel/debug/</div><div class='del'>-</div><div class='del'>-or append the following line to your ``/etc/fstab`` file so that your system</div><div class='del'>-can automatically mount debugfs upon booting::</div><div class='del'>-</div><div class='del'>-    debugfs /sys/kernel/debug debugfs defaults 0 0</div><div class='add'>+Because DAMO is using the sysfs interface (refer to :doc:`usage` for the</div><div class='add'>+detail) of DAMON, you should ensure :doc:`sysfs &lt;/filesystems/sysfs&gt;` is</div><div class='add'>+mounted.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Recording Data Access Patterns</div><div class='head'>diff --git a/Documentation/admin-guide/mm/damon/usage.rst b/Documentation/admin-guide/mm/damon/usage.rst<br/>index 592ea9a50881..9b823fec974d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/usage.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/damon/usage.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/damon/usage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/damon/usage.rst</a></div><div class='hunk'>@@ -25,16 +25,18 @@ DAMON provides below interfaces for different users.</div><div class='ctx'>   interface provides only simple :ref:`statistics &lt;damos_stats&gt;` for the</div><div class='ctx'>   monitoring results.  For detailed monitoring results, DAMON provides a</div><div class='ctx'>   :ref:`tracepoint &lt;tracepoint&gt;`.</div><div class='del'>-- *debugfs interface.*</div><div class='add'>+- *debugfs interface. (DEPRECATED!)*</div><div class='ctx'>   :ref:`This &lt;debugfs_interface&gt;` is almost identical to :ref:`sysfs interface</div><div class='del'>-  &lt;sysfs_interface&gt;`.  This will be removed after next LTS kernel is released,</div><div class='del'>-  so users should move to the :ref:`sysfs interface &lt;sysfs_interface&gt;`.</div><div class='add'>+  &lt;sysfs_interface&gt;`.  This is deprecated, so users should move to the</div><div class='add'>+  :ref:`sysfs interface &lt;sysfs_interface&gt;`.  If you depend on this and cannot</div><div class='add'>+  move, please report your usecase to damon@lists.linux.dev and</div><div class='add'>+  linux-mm@kvack.org.</div><div class='ctx'> - *Kernel Space Programming Interface.*</div><div class='del'>-  :doc:`This &lt;/vm/damon/api&gt;` is for kernel space programmers.  Using this,</div><div class='add'>+  :doc:`This &lt;/mm/damon/api&gt;` is for kernel space programmers.  Using this,</div><div class='ctx'>   users can utilize every feature of DAMON most flexibly and efficiently by</div><div class='ctx'>   writing kernel space DAMON application programs for you.  You can even extend</div><div class='ctx'>   DAMON for various address spaces.  For detail, please refer to the interface</div><div class='del'>-  :doc:`document &lt;/vm/damon/api&gt;`.</div><div class='add'>+  :doc:`document &lt;/mm/damon/api&gt;`.</div><div class='ctx'> </div><div class='ctx'> .. _sysfs_interface:</div><div class='ctx'> </div><div class='hunk'>@@ -50,10 +52,10 @@ For a short example, users can monitor the virtual address space of a given</div><div class='ctx'> workload as below. ::</div><div class='ctx'> </div><div class='ctx'>     # cd /sys/kernel/mm/damon/admin/</div><div class='del'>-    # echo 1 &gt; kdamonds/nr &amp;&amp; echo 1 &gt; kdamonds/0/contexts/nr</div><div class='add'>+    # echo 1 &gt; kdamonds/nr_kdamonds &amp;&amp; echo 1 &gt; kdamonds/0/contexts/nr_contexts</div><div class='ctx'>     # echo vaddr &gt; kdamonds/0/contexts/0/operations</div><div class='del'>-    # echo 1 &gt; kdamonds/0/contexts/0/targets/nr</div><div class='del'>-    # echo $(pidof &lt;workload&gt;) &gt; kdamonds/0/contexts/0/targets/0/pid</div><div class='add'>+    # echo 1 &gt; kdamonds/0/contexts/0/targets/nr_targets</div><div class='add'>+    # echo $(pidof &lt;workload&gt;) &gt; kdamonds/0/contexts/0/targets/0/pid_target</div><div class='ctx'>     # echo on &gt; kdamonds/0/state</div><div class='ctx'> </div><div class='ctx'> Files Hierarchy</div><div class='hunk'>@@ -68,7 +70,7 @@ comma (","). ::</div><div class='ctx'>     │ kdamonds/nr_kdamonds</div><div class='ctx'>     │ │ 0/state,pid</div><div class='ctx'>     │ │ │ contexts/nr_contexts</div><div class='del'>-    │ │ │ │ 0/operations</div><div class='add'>+    │ │ │ │ 0/avail_operations,operations</div><div class='ctx'>     │ │ │ │ │ monitoring_attrs/</div><div class='ctx'>     │ │ │ │ │ │ intervals/sample_us,aggr_us,update_us</div><div class='ctx'>     │ │ │ │ │ │ nr_regions/min,max</div><div class='hunk'>@@ -87,7 +89,12 @@ comma (","). ::</div><div class='ctx'>     │ │ │ │ │ │ │ quotas/ms,bytes,reset_interval_ms</div><div class='ctx'>     │ │ │ │ │ │ │ │ weights/sz_permil,nr_accesses_permil,age_permil</div><div class='ctx'>     │ │ │ │ │ │ │ watermarks/metric,interval_us,high,mid,low</div><div class='add'>+    │ │ │ │ │ │ │ filters/nr_filters</div><div class='add'>+    │ │ │ │ │ │ │ │ 0/type,matching,memcg_id</div><div class='ctx'>     │ │ │ │ │ │ │ stats/nr_tried,sz_tried,nr_applied,sz_applied,qt_exceeds</div><div class='add'>+    │ │ │ │ │ │ │ tried_regions/</div><div class='add'>+    │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age</div><div class='add'>+    │ │ │ │ │ │ │ │ ...</div><div class='ctx'>     │ │ │ │ │ │ ...</div><div class='ctx'>     │ │ │ │ ...</div><div class='ctx'>     │ │ ...</div><div class='hunk'>@@ -121,10 +128,18 @@ In each kdamond directory, two files (``state`` and ``pid``) and one directory</div><div class='ctx'> </div><div class='ctx'> Reading ``state`` returns ``on`` if the kdamond is currently running, or</div><div class='ctx'> ``off`` if it is not running.  Writing ``on`` or ``off`` makes the kdamond be</div><div class='del'>-in the state.  Writing ``update_schemes_stats`` to ``state`` file updates the</div><div class='del'>-contents of stats files for each DAMON-based operation scheme of the kdamond.</div><div class='del'>-For details of the stats, please refer to :ref:`stats section</div><div class='del'>-&lt;sysfs_schemes_stats&gt;`.</div><div class='add'>+in the state.  Writing ``commit`` to the ``state`` file makes kdamond reads the</div><div class='add'>+user inputs in the sysfs files except ``state`` file again.  Writing</div><div class='add'>+``update_schemes_stats`` to ``state`` file updates the contents of stats files</div><div class='add'>+for each DAMON-based operation scheme of the kdamond.  For details of the</div><div class='add'>+stats, please refer to :ref:`stats section &lt;sysfs_schemes_stats&gt;`.  Writing</div><div class='add'>+``update_schemes_tried_regions`` to ``state`` file updates the DAMON-based</div><div class='add'>+operation scheme action tried regions directory for each DAMON-based operation</div><div class='add'>+scheme of the kdamond.  Writing ``clear_schemes_tried_regions`` to ``state``</div><div class='add'>+file clears the DAMON-based operating scheme action tried regions directory for</div><div class='add'>+each DAMON-based operation scheme of the kdamond.  For details of the</div><div class='add'>+DAMON-based operation scheme action tried regions directory, please refer to</div><div class='add'>+:ref:tried_regions section &lt;sysfs_schemes_tried_regions&gt;`.</div><div class='ctx'> </div><div class='ctx'> If the state is ``on``, reading ``pid`` shows the pid of the kdamond thread.</div><div class='ctx'> </div><div class='hunk'>@@ -140,20 +155,35 @@ number (``N``) to the file creates the number of child directories named as</div><div class='ctx'> moment, only one context per kdamond is supported, so only ``0`` or ``1`` can</div><div class='ctx'> be written to the file.</div><div class='ctx'> </div><div class='add'>+.. _sysfs_contexts:</div><div class='add'>+</div><div class='ctx'> contexts/&lt;N&gt;/</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-In each context directory, one file (``operations``) and three directories</div><div class='del'>-(``monitoring_attrs``, ``targets``, and ``schemes``) exist.</div><div class='add'>+In each context directory, two files (``avail_operations`` and ``operations``)</div><div class='add'>+and three directories (``monitoring_attrs``, ``targets``, and ``schemes``)</div><div class='add'>+exist.</div><div class='ctx'> </div><div class='ctx'> DAMON supports multiple types of monitoring operations, including those for</div><div class='del'>-virtual address space and the physical address space.  You can set and get what</div><div class='del'>-type of monitoring operations DAMON will use for the context by writing one of</div><div class='del'>-below keywords to, and reading from the file.</div><div class='add'>+virtual address space and the physical address space.  You can get the list of</div><div class='add'>+available monitoring operations set on the currently running kernel by reading</div><div class='add'>+``avail_operations`` file.  Based on the kernel configuration, the file will</div><div class='add'>+list some or all of below keywords.</div><div class='ctx'> </div><div class='ctx'>  - vaddr: Monitor virtual address spaces of specific processes</div><div class='add'>+ - fvaddr: Monitor fixed virtual address ranges</div><div class='ctx'>  - paddr: Monitor the physical address space of the system</div><div class='ctx'> </div><div class='add'>+Please refer to :ref:`regions sysfs directory &lt;sysfs_regions&gt;` for detailed</div><div class='add'>+differences between the operations sets in terms of the monitoring target</div><div class='add'>+regions.</div><div class='add'>+</div><div class='add'>+You can set and get what type of monitoring operations DAMON will use for the</div><div class='add'>+context by writing one of the keywords listed in ``avail_operations`` file and</div><div class='add'>+reading from the ``operations`` file.</div><div class='add'>+</div><div class='add'>+.. _sysfs_monitoring_attrs:</div><div class='add'>+</div><div class='ctx'> contexts/&lt;N&gt;/monitoring_attrs/</div><div class='ctx'> ------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -173,7 +203,7 @@ controls the monitoring overhead, exist.  You can set and get the values by</div><div class='ctx'> writing to and rading from the files.</div><div class='ctx'> </div><div class='ctx'> For more details about the intervals and monitoring regions range, please refer</div><div class='del'>-to the Design document (:doc:`/vm/damon/design`).</div><div class='add'>+to the Design document (:doc:`/mm/damon/design`).</div><div class='ctx'> </div><div class='ctx'> contexts/&lt;N&gt;/targets/</div><div class='ctx'> ---------------------</div><div class='hunk'>@@ -192,6 +222,8 @@ If you wrote ``vaddr`` to the ``contexts/&lt;N&gt;/operations``, each target should</div><div class='ctx'> be a process.  You can specify the process to DAMON by writing the pid of the</div><div class='ctx'> process to the ``pid_target`` file.</div><div class='ctx'> </div><div class='add'>+.. _sysfs_regions:</div><div class='add'>+</div><div class='ctx'> targets/&lt;N&gt;/regions</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='hunk'>@@ -202,9 +234,10 @@ can be covered.  However, users could want to set the initial monitoring region</div><div class='ctx'> to specific address ranges.</div><div class='ctx'> </div><div class='ctx'> In contrast, DAMON do not automatically sets and updates the monitoring target</div><div class='del'>-regions when ``paddr`` monitoring operations set is being used (``paddr`` is</div><div class='del'>-written to the ``contexts/&lt;N&gt;/operations``).  Therefore, users should set the</div><div class='del'>-monitoring target regions by themselves in the case.</div><div class='add'>+regions when ``fvaddr`` or ``paddr`` monitoring operations sets are being used</div><div class='add'>+(``fvaddr`` or ``paddr`` have written to the ``contexts/&lt;N&gt;/operations``).</div><div class='add'>+Therefore, users should set the monitoring target regions by themselves in the</div><div class='add'>+cases.</div><div class='ctx'> </div><div class='ctx'> For such cases, users can explicitly set the initial monitoring target regions</div><div class='ctx'> as they want, by writing proper values to the files under this directory.</div><div class='hunk'>@@ -220,6 +253,9 @@ In each region directory, you will find two files (``start`` and ``end``).  You</div><div class='ctx'> can set and get the start and end addresses of the initial monitoring target</div><div class='ctx'> region by writing to and reading from the files, respectively.</div><div class='ctx'> </div><div class='add'>+Each region should not overlap with others.  ``end`` of directory ``N`` should</div><div class='add'>+be equal or smaller than ``start`` of directory ``N+1``.</div><div class='add'>+</div><div class='ctx'> contexts/&lt;N&gt;/schemes/</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='hunk'>@@ -237,19 +273,33 @@ to ``N-1``.  Each directory represents each DAMON-based operation scheme.</div><div class='ctx'> schemes/&lt;N&gt;/</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='del'>-In each scheme directory, four directories (``access_pattern``, ``quotas``,</div><div class='del'>-``watermarks``, and ``stats``) and one file (``action``) exist.</div><div class='add'>+In each scheme directory, five directories (``access_pattern``, ``quotas``,</div><div class='add'>+``watermarks``, ``filters``, ``stats``, and ``tried_regions``) and one file</div><div class='add'>+(``action``) exist.</div><div class='ctx'> </div><div class='ctx'> The ``action`` file is for setting and getting what action you want to apply to</div><div class='ctx'> memory regions having specific access pattern of the interest.  The keywords</div><div class='ctx'> that can be written to and read from the file and their meaning are as below.</div><div class='ctx'> </div><div class='del'>- - ``willneed``: Call ``madvise()`` for the region with ``MADV_WILLNEED``</div><div class='del'>- - ``cold``: Call ``madvise()`` for the region with ``MADV_COLD``</div><div class='del'>- - ``pageout``: Call ``madvise()`` for the region with ``MADV_PAGEOUT``</div><div class='del'>- - ``hugepage``: Call ``madvise()`` for the region with ``MADV_HUGEPAGE``</div><div class='del'>- - ``nohugepage``: Call ``madvise()`` for the region with ``MADV_NOHUGEPAGE``</div><div class='del'>- - ``stat``: Do nothing but count the statistics</div><div class='add'>+Note that support of each action depends on the running DAMON operations set</div><div class='add'>+`implementation &lt;sysfs_contexts&gt;`.</div><div class='add'>+</div><div class='add'>+ - ``willneed``: Call ``madvise()`` for the region with ``MADV_WILLNEED``.</div><div class='add'>+   Supported by ``vaddr`` and ``fvaddr`` operations set.</div><div class='add'>+ - ``cold``: Call ``madvise()`` for the region with ``MADV_COLD``.</div><div class='add'>+   Supported by ``vaddr`` and ``fvaddr`` operations set.</div><div class='add'>+ - ``pageout``: Call ``madvise()`` for the region with ``MADV_PAGEOUT``.</div><div class='add'>+   Supported by ``vaddr``, ``fvaddr`` and ``paddr`` operations set.</div><div class='add'>+ - ``hugepage``: Call ``madvise()`` for the region with ``MADV_HUGEPAGE``.</div><div class='add'>+   Supported by ``vaddr`` and ``fvaddr`` operations set.</div><div class='add'>+ - ``nohugepage``: Call ``madvise()`` for the region with ``MADV_NOHUGEPAGE``.</div><div class='add'>+   Supported by ``vaddr`` and ``fvaddr`` operations set.</div><div class='add'>+ - ``lru_prio``: Prioritize the region on its LRU lists.</div><div class='add'>+   Supported by ``paddr`` operations set.</div><div class='add'>+ - ``lru_deprio``: Deprioritize the region on its LRU lists.</div><div class='add'>+   Supported by ``paddr`` operations set.</div><div class='add'>+ - ``stat``: Do nothing but count the statistics.</div><div class='add'>+   Supported by all operations sets.</div><div class='ctx'> </div><div class='ctx'> schemes/&lt;N&gt;/access_pattern/</div><div class='ctx'> ---------------------------</div><div class='hunk'>@@ -314,6 +364,46 @@ as below.</div><div class='ctx'> </div><div class='ctx'> The ``interval`` should written in microseconds unit.</div><div class='ctx'> </div><div class='add'>+schemes/&lt;N&gt;/filters/</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Users could know something more than the kernel for specific types of memory.</div><div class='add'>+In the case, users could do their own management for the memory and hence</div><div class='add'>+doesn't want DAMOS bothers that.  Users could limit DAMOS by setting the access</div><div class='add'>+pattern of the scheme and/or the monitoring regions for the purpose, but that</div><div class='add'>+can be inefficient in some cases.  In such cases, users could set non-access</div><div class='add'>+pattern driven filters using files in this directory.</div><div class='add'>+</div><div class='add'>+In the beginning, this directory has only one file, ``nr_filters``.  Writing a</div><div class='add'>+number (``N``) to the file creates the number of child directories named ``0``</div><div class='add'>+to ``N-1``.  Each directory represents each filter.  The filters are evaluated</div><div class='add'>+in the numeric order.</div><div class='add'>+</div><div class='add'>+Each filter directory contains three files, namely ``type``, ``matcing``, and</div><div class='add'>+``memcg_path``.  You can write one of two special keywords, ``anon`` for</div><div class='add'>+anonymous pages, or ``memcg`` for specific memory cgroup filtering.  In case of</div><div class='add'>+the memory cgroup filtering, you can specify the memory cgroup of the interest</div><div class='add'>+by writing the path of the memory cgroup from the cgroups mount point to</div><div class='add'>+``memcg_path`` file.  You can write ``Y`` or ``N`` to ``matching`` file to</div><div class='add'>+filter out pages that does or does not match to the type, respectively.  Then,</div><div class='add'>+the scheme's action will not be applied to the pages that specified to be</div><div class='add'>+filtered out.</div><div class='add'>+</div><div class='add'>+For example, below restricts a DAMOS action to be applied to only non-anonymous</div><div class='add'>+pages of all memory cgroups except ``/having_care_already``.::</div><div class='add'>+</div><div class='add'>+    # echo 2 &gt; nr_filters</div><div class='add'>+    # # filter out anonymous pages</div><div class='add'>+    echo anon &gt; 0/type</div><div class='add'>+    echo Y &gt; 0/matching</div><div class='add'>+    # # further filter out all cgroups except one at '/having_care_already'</div><div class='add'>+    echo memcg &gt; 1/type</div><div class='add'>+    echo /having_care_already &gt; 1/memcg_path</div><div class='add'>+    echo N &gt; 1/matching</div><div class='add'>+</div><div class='add'>+Note that filters are currently supported only when ``paddr``</div><div class='add'>+`implementation &lt;sysfs_contexts&gt;` is being used.</div><div class='add'>+</div><div class='ctx'> .. _sysfs_schemes_stats:</div><div class='ctx'> </div><div class='ctx'> schemes/&lt;N&gt;/stats/</div><div class='hunk'>@@ -331,6 +421,32 @@ should ask DAMON sysfs interface to updte the content of the files for the</div><div class='ctx'> stats by writing a special keyword, ``update_schemes_stats`` to the relevant</div><div class='ctx'> ``kdamonds/&lt;N&gt;/state`` file.</div><div class='ctx'> </div><div class='add'>+.. _sysfs_schemes_tried_regions:</div><div class='add'>+</div><div class='add'>+schemes/&lt;N&gt;/tried_regions/</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+When a special keyword, ``update_schemes_tried_regions``, is written to the</div><div class='add'>+relevant ``kdamonds/&lt;N&gt;/state`` file, DAMON creates directories named integer</div><div class='add'>+starting from ``0`` under this directory.  Each directory contains files</div><div class='add'>+exposing detailed information about each of the memory region that the</div><div class='add'>+corresponding scheme's ``action`` has tried to be applied under this directory,</div><div class='add'>+during next :ref:`aggregation interval &lt;sysfs_monitoring_attrs&gt;`.  The</div><div class='add'>+information includes address range, ``nr_accesses``, , and ``age`` of the</div><div class='add'>+region.</div><div class='add'>+</div><div class='add'>+The directories will be removed when another special keyword,</div><div class='add'>+``clear_schemes_tried_regions``, is written to the relevant</div><div class='add'>+``kdamonds/&lt;N&gt;/state`` file.</div><div class='add'>+</div><div class='add'>+tried_regions/&lt;N&gt;/</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+In each region directory, you will find four files (``start``, ``end``,</div><div class='add'>+``nr_accesses``, and ``age``).  Reading the files will show the start and end</div><div class='add'>+addresses, ``nr_accesses``, and ``age`` of the region that corresponding</div><div class='add'>+DAMON-based operation scheme ``action`` has tried to be applied.</div><div class='add'>+</div><div class='ctx'> Example</div><div class='ctx'> ~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -349,12 +465,12 @@ memory rate becomes larger than 60%, or lower than 30%". ::</div><div class='ctx'>     # echo 1 &gt; kdamonds/0/contexts/0/schemes/nr_schemes</div><div class='ctx'>     # cd kdamonds/0/contexts/0/schemes/0</div><div class='ctx'>     # # set the basic access pattern and the action</div><div class='del'>-    # echo 4096 &gt; access_patterns/sz/min</div><div class='del'>-    # echo 8192 &gt; access_patterns/sz/max</div><div class='del'>-    # echo 0 &gt; access_patterns/nr_accesses/min</div><div class='del'>-    # echo 5 &gt; access_patterns/nr_accesses/max</div><div class='del'>-    # echo 10 &gt; access_patterns/age/min</div><div class='del'>-    # echo 20 &gt; access_patterns/age/max</div><div class='add'>+    # echo 4096 &gt; access_pattern/sz/min</div><div class='add'>+    # echo 8192 &gt; access_pattern/sz/max</div><div class='add'>+    # echo 0 &gt; access_pattern/nr_accesses/min</div><div class='add'>+    # echo 5 &gt; access_pattern/nr_accesses/max</div><div class='add'>+    # echo 10 &gt; access_pattern/age/min</div><div class='add'>+    # echo 20 &gt; access_pattern/age/max</div><div class='ctx'>     # echo pageout &gt; action</div><div class='ctx'>     # # set quotas</div><div class='ctx'>     # echo 10 &gt; quotas/ms</div><div class='hunk'>@@ -373,8 +489,17 @@ the files as above.  Above is only for an example.</div><div class='ctx'> </div><div class='ctx'> .. _debugfs_interface:</div><div class='ctx'> </div><div class='del'>-debugfs Interface</div><div class='del'>-=================</div><div class='add'>+debugfs Interface (DEPRECATED!)</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+</div><div class='add'>+  THIS IS DEPRECATED!</div><div class='add'>+</div><div class='add'>+  DAMON debugfs interface is deprecated, so users should move to the</div><div class='add'>+  :ref:`sysfs interface &lt;sysfs_interface&gt;`.  If you depend on this and cannot</div><div class='add'>+  move, please report your usecase to damon@lists.linux.dev and</div><div class='add'>+  linux-mm@kvack.org.</div><div class='ctx'> </div><div class='ctx'> DAMON exports eight files, ``attrs``, ``target_ids``, ``init_regions``,</div><div class='ctx'> ``schemes``, ``monitor_on``, ``kdamond_pid``, ``mk_contexts`` and</div><div class='hunk'>@@ -387,7 +512,7 @@ Attributes</div><div class='ctx'> Users can get and set the ``sampling interval``, ``aggregation interval``,</div><div class='ctx'> ``update interval``, and min/max number of monitoring target regions by</div><div class='ctx'> reading from and writing to the ``attrs`` file.  To know about the monitoring</div><div class='del'>-attributes in detail, please refer to the :doc:`/vm/damon/design`.  For</div><div class='add'>+attributes in detail, please refer to the :doc:`/mm/damon/design`.  For</div><div class='ctx'> example, below commands set those values to 5 ms, 100 ms, 1,000 ms, 10 and</div><div class='ctx'> 1000, and then check it again::</div><div class='ctx'> </div><div class='hunk'>@@ -443,8 +568,9 @@ regions in case of physical memory monitoring.  Therefore, users should set the</div><div class='ctx'> monitoring target regions by themselves.</div><div class='ctx'> </div><div class='ctx'> In such cases, users can explicitly set the initial monitoring target regions</div><div class='del'>-as they want, by writing proper values to the ``init_regions`` file.  Each line</div><div class='del'>-of the input should represent one region in below form.::</div><div class='add'>+as they want, by writing proper values to the ``init_regions`` file.  The input</div><div class='add'>+should be a sequence of three integers separated by white spaces that represent</div><div class='add'>+one region in below form.::</div><div class='ctx'> </div><div class='ctx'>     &lt;target idx&gt; &lt;start address&gt; &lt;end address&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -459,9 +585,9 @@ ranges, ``20-40`` and ``50-100`` as that of pid 4242, which is the second one</div><div class='ctx'>     # cd &lt;debugfs&gt;/damon</div><div class='ctx'>     # cat target_ids</div><div class='ctx'>     42 4242</div><div class='del'>-    # echo "0   1       100</div><div class='del'>-            0   100     200</div><div class='del'>-            1   20      40</div><div class='add'>+    # echo "0   1       100 \</div><div class='add'>+            0   100     200 \</div><div class='add'>+            1   20      40  \</div><div class='ctx'>             1   50      100" &gt; init_regions</div><div class='ctx'> </div><div class='ctx'> Note that this sets the initial monitoring target regions only.  In case of</div><div class='hunk'>@@ -509,11 +635,15 @@ The ``&lt;action&gt;`` is a predefined integer for memory management actions, which</div><div class='ctx'> DAMON will apply to the regions having the target access pattern.  The</div><div class='ctx'> supported numbers and their meanings are as below.</div><div class='ctx'> </div><div class='del'>- - 0: Call ``madvise()`` for the region with ``MADV_WILLNEED``</div><div class='del'>- - 1: Call ``madvise()`` for the region with ``MADV_COLD``</div><div class='del'>- - 2: Call ``madvise()`` for the region with ``MADV_PAGEOUT``</div><div class='del'>- - 3: Call ``madvise()`` for the region with ``MADV_HUGEPAGE``</div><div class='del'>- - 4: Call ``madvise()`` for the region with ``MADV_NOHUGEPAGE``</div><div class='add'>+ - 0: Call ``madvise()`` for the region with ``MADV_WILLNEED``.  Ignored if</div><div class='add'>+   ``target`` is ``paddr``.</div><div class='add'>+ - 1: Call ``madvise()`` for the region with ``MADV_COLD``.  Ignored if</div><div class='add'>+   ``target`` is ``paddr``.</div><div class='add'>+ - 2: Call ``madvise()`` for the region with ``MADV_PAGEOUT``.</div><div class='add'>+ - 3: Call ``madvise()`` for the region with ``MADV_HUGEPAGE``.  Ignored if</div><div class='add'>+   ``target`` is ``paddr``.</div><div class='add'>+ - 4: Call ``madvise()`` for the region with ``MADV_NOHUGEPAGE``.  Ignored if</div><div class='add'>+   ``target`` is ``paddr``.</div><div class='ctx'>  - 5: Do nothing but count the statistics</div><div class='ctx'> </div><div class='ctx'> Quota</div><div class='head'>diff --git a/Documentation/admin-guide/mm/hugetlbpage.rst b/Documentation/admin-guide/mm/hugetlbpage.rst<br/>index 0166f9de3428..e4d4b4a8dc97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/hugetlbpage.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/hugetlbpage.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/hugetlbpage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/hugetlbpage.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _hugetlbpage:</div><div class='del'>-</div><div class='ctx'> =============</div><div class='ctx'> HugeTLB Pages</div><div class='ctx'> =============</div><div class='hunk'>@@ -65,7 +63,7 @@ HugePages_Surp</div><div class='ctx'> 	may be temporarily larger than the maximum number of surplus huge</div><div class='ctx'> 	pages when the system is under memory pressure.</div><div class='ctx'> Hugepagesize</div><div class='del'>-	is the default hugepage size (in Kb).</div><div class='add'>+	is the default hugepage size (in kB).</div><div class='ctx'> Hugetlb</div><div class='ctx'>         is the total amount of memory (in kB), consumed by huge</div><div class='ctx'>         pages of all sizes.</div><div class='hunk'>@@ -86,7 +84,7 @@ by increasing or decreasing the value of ``nr_hugepages``.</div><div class='ctx'> </div><div class='ctx'> Note: When the feature of freeing unused vmemmap pages associated with each</div><div class='ctx'> hugetlb page is enabled, we can fail to free the huge pages triggered by</div><div class='del'>-the user when ths system is under memory pressure.  Please try again later.</div><div class='add'>+the user when the system is under memory pressure.  Please try again later.</div><div class='ctx'> </div><div class='ctx'> Pages that are used as huge pages are reserved inside the kernel and cannot</div><div class='ctx'> be used for other purposes.  Huge pages cannot be swapped out under</div><div class='hunk'>@@ -164,8 +162,8 @@ default_hugepagesz</div><div class='ctx'> 	will all result in 256 2M huge pages being allocated.  Valid default</div><div class='ctx'> 	huge page size is architecture dependent.</div><div class='ctx'> hugetlb_free_vmemmap</div><div class='del'>-	When CONFIG_HUGETLB_PAGE_FREE_VMEMMAP is set, this enables freeing</div><div class='del'>-	unused vmemmap pages associated with each HugeTLB page.</div><div class='add'>+	When CONFIG_HUGETLB_PAGE_OPTIMIZE_VMEMMAP is set, this enables HugeTLB</div><div class='add'>+	Vmemmap Optimization (HVO).</div><div class='ctx'> </div><div class='ctx'> When multiple huge page sizes are supported, ``/proc/sys/vm/nr_hugepages``</div><div class='ctx'> indicates the current number of pre-allocated huge pages of the default size.</div><div class='hunk'>@@ -313,7 +311,7 @@ memory policy mode--bind, preferred, local or interleave--may be used.  The</div><div class='ctx'> resulting effect on persistent huge page allocation is as follows:</div><div class='ctx'> </div><div class='ctx'> #. Regardless of mempolicy mode [see</div><div class='del'>-   :ref:`Documentation/admin-guide/mm/numa_memory_policy.rst &lt;numa_memory_policy&gt;`],</div><div class='add'>+   Documentation/admin-guide/mm/numa_memory_policy.rst],</div><div class='ctx'>    persistent huge pages will be distributed across the node or nodes</div><div class='ctx'>    specified in the mempolicy as if "interleave" had been specified.</div><div class='ctx'>    However, if a node in the policy does not contain sufficient contiguous</div><div class='hunk'>@@ -461,13 +459,13 @@ Examples</div><div class='ctx'> .. _map_hugetlb:</div><div class='ctx'> </div><div class='ctx'> ``map_hugetlb``</div><div class='del'>-	see tools/testing/selftests/vm/map_hugetlb.c</div><div class='add'>+	see tools/testing/selftests/mm/map_hugetlb.c</div><div class='ctx'> </div><div class='ctx'> ``hugepage-shm``</div><div class='del'>-	see tools/testing/selftests/vm/hugepage-shm.c</div><div class='add'>+	see tools/testing/selftests/mm/hugepage-shm.c</div><div class='ctx'> </div><div class='ctx'> ``hugepage-mmap``</div><div class='del'>-	see tools/testing/selftests/vm/hugepage-mmap.c</div><div class='add'>+	see tools/testing/selftests/mm/hugepage-mmap.c</div><div class='ctx'> </div><div class='ctx'> The `libhugetlbfs`_  library provides a wide range of userspace tools</div><div class='ctx'> to help with huge page usability, environment setup, and control.</div><div class='head'>diff --git a/Documentation/admin-guide/mm/idle_page_tracking.rst b/Documentation/admin-guide/mm/idle_page_tracking.rst<br/>index df9394fb39c2..16fcf38dac56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/idle_page_tracking.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/idle_page_tracking.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/idle_page_tracking.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/idle_page_tracking.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _idle_page_tracking:</div><div class='del'>-</div><div class='ctx'> ==================</div><div class='ctx'> Idle Page Tracking</div><div class='ctx'> ==================</div><div class='hunk'>@@ -65,14 +63,13 @@ workload one should:</div><div class='ctx'>     are not reclaimable, he or she can filter them out using</div><div class='ctx'>     ``/proc/kpageflags``.</div><div class='ctx'> </div><div class='del'>-The page-types tool in the tools/vm directory can be used to assist in this.</div><div class='add'>+The page-types tool in the tools/mm directory can be used to assist in this.</div><div class='ctx'> If the tool is run initially with the appropriate option, it will mark all the</div><div class='ctx'> queried pages as idle.  Subsequent runs of the tool can then show which pages have</div><div class='ctx'> their idle flag cleared in the interim.</div><div class='ctx'> </div><div class='del'>-See :ref:`Documentation/admin-guide/mm/pagemap.rst &lt;pagemap&gt;` for more</div><div class='del'>-information about ``/proc/pid/pagemap``, ``/proc/kpageflags``, and</div><div class='del'>-``/proc/kpagecgroup``.</div><div class='add'>+See Documentation/admin-guide/mm/pagemap.rst for more information about</div><div class='add'>+``/proc/pid/pagemap``, ``/proc/kpageflags``, and ``/proc/kpagecgroup``.</div><div class='ctx'> </div><div class='ctx'> .. _impl_details:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/mm/index.rst b/Documentation/admin-guide/mm/index.rst<br/>index c21b5823f126..1f883abf3f00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/index.rst</a></div><div class='hunk'>@@ -16,8 +16,7 @@ are described in Documentation/admin-guide/sysctl/vm.rst and in `man 5 proc`_.</div><div class='ctx'> .. _man 5 proc: http://man7.org/linux/man-pages/man5/proc.5.html</div><div class='ctx'> </div><div class='ctx'> Linux memory management has its own jargon and if you are not yet</div><div class='del'>-familiar with it, consider reading</div><div class='del'>-:ref:`Documentation/admin-guide/mm/concepts.rst &lt;mm_concepts&gt;`.</div><div class='add'>+familiar with it, consider reading Documentation/admin-guide/mm/concepts.rst.</div><div class='ctx'> </div><div class='ctx'> Here we document in detail how to interact with various mechanisms in</div><div class='ctx'> the Linux memory management.</div><div class='hunk'>@@ -32,10 +31,12 @@ the Linux memory management.</div><div class='ctx'>    idle_page_tracking</div><div class='ctx'>    ksm</div><div class='ctx'>    memory-hotplug</div><div class='add'>+   multigen_lru</div><div class='ctx'>    nommu-mmap</div><div class='ctx'>    numa_memory_policy</div><div class='ctx'>    numaperf</div><div class='ctx'>    pagemap</div><div class='add'>+   shrinker_debugfs</div><div class='ctx'>    soft-dirty</div><div class='ctx'>    swap_numa</div><div class='ctx'>    transhuge</div><div class='head'>diff --git a/Documentation/admin-guide/mm/ksm.rst b/Documentation/admin-guide/mm/ksm.rst<br/>index 97d816791aca..7626392fe82c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/ksm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/ksm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/ksm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/ksm.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _admin_guide_ksm:</div><div class='del'>-</div><div class='ctx'> =======================</div><div class='ctx'> Kernel Samepage Merging</div><div class='ctx'> =======================</div><div class='hunk'>@@ -22,7 +20,7 @@ content which can be replaced by a single write-protected page (which</div><div class='ctx'> is automatically copied if a process later wants to update its</div><div class='ctx'> content). The amount of pages that KSM daemon scans in a single pass</div><div class='ctx'> and the time between the passes are configured using :ref:`sysfs</div><div class='del'>-intraface &lt;ksm_sysfs&gt;`</div><div class='add'>+interface &lt;ksm_sysfs&gt;`</div><div class='ctx'> </div><div class='ctx'> KSM only merges anonymous (private) pages, never pagecache (file) pages.</div><div class='ctx'> KSM's merged pages were originally locked into kernel memory, but can now</div><div class='hunk'>@@ -159,6 +157,8 @@ stable_node_chains_prune_millisecs</div><div class='ctx'> </div><div class='ctx'> The effectiveness of KSM and MADV_MERGEABLE is shown in ``/sys/kernel/mm/ksm/``:</div><div class='ctx'> </div><div class='add'>+general_profit</div><div class='add'>+        how effective is KSM. The calculation is explained below.</div><div class='ctx'> pages_shared</div><div class='ctx'>         how many shared pages are being used</div><div class='ctx'> pages_sharing</div><div class='hunk'>@@ -184,6 +184,61 @@ The maximum possible ``pages_sharing/pages_shared`` ratio is limited by the</div><div class='ctx'> ``max_page_sharing`` tunable. To increase the ratio ``max_page_sharing`` must</div><div class='ctx'> be increased accordingly.</div><div class='ctx'> </div><div class='add'>+Monitoring KSM profit</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+KSM can save memory by merging identical pages, but also can consume</div><div class='add'>+additional memory, because it needs to generate a number of rmap_items to</div><div class='add'>+save each scanned page's brief rmap information. Some of these pages may</div><div class='add'>+be merged, but some may not be abled to be merged after being checked</div><div class='add'>+several times, which are unprofitable memory consumed.</div><div class='add'>+</div><div class='add'>+1) How to determine whether KSM save memory or consume memory in system-wide</div><div class='add'>+   range? Here is a simple approximate calculation for reference::</div><div class='add'>+</div><div class='add'>+	general_profit =~ pages_sharing * sizeof(page) - (all_rmap_items) *</div><div class='add'>+			  sizeof(rmap_item);</div><div class='add'>+</div><div class='add'>+   where all_rmap_items can be easily obtained by summing ``pages_sharing``,</div><div class='add'>+   ``pages_shared``, ``pages_unshared`` and ``pages_volatile``.</div><div class='add'>+</div><div class='add'>+2) The KSM profit inner a single process can be similarly obtained by the</div><div class='add'>+   following approximate calculation::</div><div class='add'>+</div><div class='add'>+	process_profit =~ ksm_merging_pages * sizeof(page) -</div><div class='add'>+			  ksm_rmap_items * sizeof(rmap_item).</div><div class='add'>+</div><div class='add'>+   where ksm_merging_pages is shown under the directory ``/proc/&lt;pid&gt;/``,</div><div class='add'>+   and ksm_rmap_items is shown in ``/proc/&lt;pid&gt;/ksm_stat``. The process profit</div><div class='add'>+   is also shown in ``/proc/&lt;pid&gt;/ksm_stat`` as ksm_process_profit.</div><div class='add'>+</div><div class='add'>+From the perspective of application, a high ratio of ``ksm_rmap_items`` to</div><div class='add'>+``ksm_merging_pages`` means a bad madvise-applied policy, so developers or</div><div class='add'>+administrators have to rethink how to change madvise policy. Giving an example</div><div class='add'>+for reference, a page's size is usually 4K, and the rmap_item's size is</div><div class='add'>+separately 32B on 32-bit CPU architecture and 64B on 64-bit CPU architecture.</div><div class='add'>+so if the ``ksm_rmap_items/ksm_merging_pages`` ratio exceeds 64 on 64-bit CPU</div><div class='add'>+or exceeds 128 on 32-bit CPU, then the app's madvise policy should be dropped,</div><div class='add'>+because the ksm profit is approximately zero or negative.</div><div class='add'>+</div><div class='add'>+Monitoring KSM events</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+There are some counters in /proc/vmstat that may be used to monitor KSM events.</div><div class='add'>+KSM might help save memory, it's a tradeoff by may suffering delay on KSM COW</div><div class='add'>+or on swapping in copy. Those events could help users evaluate whether or how</div><div class='add'>+to use KSM. For example, if cow_ksm increases too fast, user may decrease the</div><div class='add'>+range of madvise(, , MADV_MERGEABLE).</div><div class='add'>+</div><div class='add'>+cow_ksm</div><div class='add'>+	is incremented every time a KSM page triggers copy on write (COW)</div><div class='add'>+	when users try to write to a KSM page, we have to make a copy.</div><div class='add'>+</div><div class='add'>+ksm_swpin_copy</div><div class='add'>+	is incremented every time a KSM page is copied when swapping in</div><div class='add'>+	note that KSM page might be copied when swapping in because do_swap_page()</div><div class='add'>+	cannot do all the locking needed to reconstitute a cross-anon_vma KSM page.</div><div class='add'>+</div><div class='ctx'> --</div><div class='ctx'> Izik Eidus,</div><div class='ctx'> Hugh Dickins, 17 Nov 2009</div><div class='head'>diff --git a/Documentation/admin-guide/mm/memory-hotplug.rst b/Documentation/admin-guide/mm/memory-hotplug.rst<br/>index 0f56ecd8ac05..1b02fe5807cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/memory-hotplug.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/memory-hotplug.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/memory-hotplug.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/memory-hotplug.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _admin_guide_memory_hotplug:</div><div class='del'>-</div><div class='ctx'> ==================</div><div class='ctx'> Memory Hot(Un)Plug</div><div class='ctx'> ==================</div><div class='hunk'>@@ -653,8 +651,8 @@ block might fail:</div><div class='ctx'> - Concurrent activity that operates on the same physical memory area, such as</div><div class='ctx'>   allocating gigantic pages, can result in temporary offlining failures.</div><div class='ctx'> </div><div class='del'>-- Out of memory when dissolving huge pages, especially when freeing unused</div><div class='del'>-  vmemmap pages associated with each hugetlb page is enabled.</div><div class='add'>+- Out of memory when dissolving huge pages, especially when HugeTLB Vmemmap</div><div class='add'>+  Optimization (HVO) is enabled.</div><div class='ctx'> </div><div class='ctx'>   Offlining code may be able to migrate huge page contents, but may not be able</div><div class='ctx'>   to dissolve the source huge page because it fails allocating (unmovable) pages</div><div class='head'>diff --git a/Documentation/admin-guide/mm/multigen_lru.rst b/Documentation/admin-guide/mm/multigen_lru.rst<br/>new file mode 100644<br/>index 000000000000..33e068830497<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/multigen_lru.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/multigen_lru.rst</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=============</div><div class='add'>+Multi-Gen LRU</div><div class='add'>+=============</div><div class='add'>+The multi-gen LRU is an alternative LRU implementation that optimizes</div><div class='add'>+page reclaim and improves performance under memory pressure. Page</div><div class='add'>+reclaim decides the kernel's caching policy and ability to overcommit</div><div class='add'>+memory. It directly impacts the kswapd CPU usage and RAM efficiency.</div><div class='add'>+</div><div class='add'>+Quick start</div><div class='add'>+===========</div><div class='add'>+Build the kernel with the following configurations.</div><div class='add'>+</div><div class='add'>+* ``CONFIG_LRU_GEN=y``</div><div class='add'>+* ``CONFIG_LRU_GEN_ENABLED=y``</div><div class='add'>+</div><div class='add'>+All set!</div><div class='add'>+</div><div class='add'>+Runtime options</div><div class='add'>+===============</div><div class='add'>+``/sys/kernel/mm/lru_gen/`` contains stable ABIs described in the</div><div class='add'>+following subsections.</div><div class='add'>+</div><div class='add'>+Kill switch</div><div class='add'>+-----------</div><div class='add'>+``enabled`` accepts different values to enable or disable the</div><div class='add'>+following components. Its default value depends on</div><div class='add'>+``CONFIG_LRU_GEN_ENABLED``. All the components should be enabled</div><div class='add'>+unless some of them have unforeseen side effects. Writing to</div><div class='add'>+``enabled`` has no effect when a component is not supported by the</div><div class='add'>+hardware, and valid values will be accepted even when the main switch</div><div class='add'>+is off.</div><div class='add'>+</div><div class='add'>+====== ===============================================================</div><div class='add'>+Values Components</div><div class='add'>+====== ===============================================================</div><div class='add'>+0x0001 The main switch for the multi-gen LRU.</div><div class='add'>+0x0002 Clearing the accessed bit in leaf page table entries in large</div><div class='add'>+       batches, when MMU sets it (e.g., on x86). This behavior can</div><div class='add'>+       theoretically worsen lock contention (mmap_lock). If it is</div><div class='add'>+       disabled, the multi-gen LRU will suffer a minor performance</div><div class='add'>+       degradation for workloads that contiguously map hot pages,</div><div class='add'>+       whose accessed bits can be otherwise cleared by fewer larger</div><div class='add'>+       batches.</div><div class='add'>+0x0004 Clearing the accessed bit in non-leaf page table entries as</div><div class='add'>+       well, when MMU sets it (e.g., on x86). This behavior was not</div><div class='add'>+       verified on x86 varieties other than Intel and AMD. If it is</div><div class='add'>+       disabled, the multi-gen LRU will suffer a negligible</div><div class='add'>+       performance degradation.</div><div class='add'>+[yYnN] Apply to all the components above.</div><div class='add'>+====== ===============================================================</div><div class='add'>+</div><div class='add'>+E.g.,</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    echo y &gt;/sys/kernel/mm/lru_gen/enabled</div><div class='add'>+    cat /sys/kernel/mm/lru_gen/enabled</div><div class='add'>+    0x0007</div><div class='add'>+    echo 5 &gt;/sys/kernel/mm/lru_gen/enabled</div><div class='add'>+    cat /sys/kernel/mm/lru_gen/enabled</div><div class='add'>+    0x0005</div><div class='add'>+</div><div class='add'>+Thrashing prevention</div><div class='add'>+--------------------</div><div class='add'>+Personal computers are more sensitive to thrashing because it can</div><div class='add'>+cause janks (lags when rendering UI) and negatively impact user</div><div class='add'>+experience. The multi-gen LRU offers thrashing prevention to the</div><div class='add'>+majority of laptop and desktop users who do not have ``oomd``.</div><div class='add'>+</div><div class='add'>+Users can write ``N`` to ``min_ttl_ms`` to prevent the working set of</div><div class='add'>+``N`` milliseconds from getting evicted. The OOM killer is triggered</div><div class='add'>+if this working set cannot be kept in memory. In other words, this</div><div class='add'>+option works as an adjustable pressure relief valve, and when open, it</div><div class='add'>+terminates applications that are hopefully not being used.</div><div class='add'>+</div><div class='add'>+Based on the average human detectable lag (~100ms), ``N=1000`` usually</div><div class='add'>+eliminates intolerable janks due to thrashing. Larger values like</div><div class='add'>+``N=3000`` make janks less noticeable at the risk of premature OOM</div><div class='add'>+kills.</div><div class='add'>+</div><div class='add'>+The default value ``0`` means disabled.</div><div class='add'>+</div><div class='add'>+Experimental features</div><div class='add'>+=====================</div><div class='add'>+``/sys/kernel/debug/lru_gen`` accepts commands described in the</div><div class='add'>+following subsections. Multiple command lines are supported, so does</div><div class='add'>+concatenation with delimiters ``,`` and ``;``.</div><div class='add'>+</div><div class='add'>+``/sys/kernel/debug/lru_gen_full`` provides additional stats for</div><div class='add'>+debugging. ``CONFIG_LRU_GEN_STATS=y`` keeps historical stats from</div><div class='add'>+evicted generations in this file.</div><div class='add'>+</div><div class='add'>+Working set estimation</div><div class='add'>+----------------------</div><div class='add'>+Working set estimation measures how much memory an application needs</div><div class='add'>+in a given time interval, and it is usually done with little impact on</div><div class='add'>+the performance of the application. E.g., data centers want to</div><div class='add'>+optimize job scheduling (bin packing) to improve memory utilizations.</div><div class='add'>+When a new job comes in, the job scheduler needs to find out whether</div><div class='add'>+each server it manages can allocate a certain amount of memory for</div><div class='add'>+this new job before it can pick a candidate. To do so, the job</div><div class='add'>+scheduler needs to estimate the working sets of the existing jobs.</div><div class='add'>+</div><div class='add'>+When it is read, ``lru_gen`` returns a histogram of numbers of pages</div><div class='add'>+accessed over different time intervals for each memcg and node.</div><div class='add'>+``MAX_NR_GENS`` decides the number of bins for each histogram. The</div><div class='add'>+histograms are noncumulative.</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    memcg  memcg_id  memcg_path</div><div class='add'>+       node  node_id</div><div class='add'>+           min_gen_nr  age_in_ms  nr_anon_pages  nr_file_pages</div><div class='add'>+           ...</div><div class='add'>+           max_gen_nr  age_in_ms  nr_anon_pages  nr_file_pages</div><div class='add'>+</div><div class='add'>+Each bin contains an estimated number of pages that have been accessed</div><div class='add'>+within ``age_in_ms``. E.g., ``min_gen_nr`` contains the coldest pages</div><div class='add'>+and ``max_gen_nr`` contains the hottest pages, since ``age_in_ms`` of</div><div class='add'>+the former is the largest and that of the latter is the smallest.</div><div class='add'>+</div><div class='add'>+Users can write the following command to ``lru_gen`` to create a new</div><div class='add'>+generation ``max_gen_nr+1``:</div><div class='add'>+</div><div class='add'>+    ``+ memcg_id node_id max_gen_nr [can_swap [force_scan]]``</div><div class='add'>+</div><div class='add'>+``can_swap`` defaults to the swap setting and, if it is set to ``1``,</div><div class='add'>+it forces the scan of anon pages when swap is off, and vice versa.</div><div class='add'>+``force_scan`` defaults to ``1`` and, if it is set to ``0``, it</div><div class='add'>+employs heuristics to reduce the overhead, which is likely to reduce</div><div class='add'>+the coverage as well.</div><div class='add'>+</div><div class='add'>+A typical use case is that a job scheduler runs this command at a</div><div class='add'>+certain time interval to create new generations, and it ranks the</div><div class='add'>+servers it manages based on the sizes of their cold pages defined by</div><div class='add'>+this time interval.</div><div class='add'>+</div><div class='add'>+Proactive reclaim</div><div class='add'>+-----------------</div><div class='add'>+Proactive reclaim induces page reclaim when there is no memory</div><div class='add'>+pressure. It usually targets cold pages only. E.g., when a new job</div><div class='add'>+comes in, the job scheduler wants to proactively reclaim cold pages on</div><div class='add'>+the server it selected, to improve the chance of successfully landing</div><div class='add'>+this new job.</div><div class='add'>+</div><div class='add'>+Users can write the following command to ``lru_gen`` to evict</div><div class='add'>+generations less than or equal to ``min_gen_nr``.</div><div class='add'>+</div><div class='add'>+    ``- memcg_id node_id min_gen_nr [swappiness [nr_to_reclaim]]``</div><div class='add'>+</div><div class='add'>+``min_gen_nr`` should be less than ``max_gen_nr-1``, since</div><div class='add'>+``max_gen_nr`` and ``max_gen_nr-1`` are not fully aged (equivalent to</div><div class='add'>+the active list) and therefore cannot be evicted. ``swappiness``</div><div class='add'>+overrides the default value in ``/proc/sys/vm/swappiness``.</div><div class='add'>+``nr_to_reclaim`` limits the number of pages to evict.</div><div class='add'>+</div><div class='add'>+A typical use case is that a job scheduler runs this command before it</div><div class='add'>+tries to land a new job on a server. If it fails to materialize enough</div><div class='add'>+cold pages because of the overestimation, it retries on the next</div><div class='add'>+server according to the ranking result obtained from the working set</div><div class='add'>+estimation step. This less forceful approach limits the impacts on the</div><div class='add'>+existing jobs.</div><div class='head'>diff --git a/Documentation/admin-guide/mm/numa_memory_policy.rst b/Documentation/admin-guide/mm/numa_memory_policy.rst<br/>index 5a6afecbb0d0..46515ad2337f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/numa_memory_policy.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/numa_memory_policy.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/numa_memory_policy.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/numa_memory_policy.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _numa_memory_policy:</div><div class='del'>-</div><div class='ctx'> ==================</div><div class='ctx'> NUMA Memory Policy</div><div class='ctx'> ==================</div><div class='hunk'>@@ -246,7 +244,7 @@ MPOL_INTERLEAVED</div><div class='ctx'> 	interleaved system default policy works in this mode.</div><div class='ctx'> </div><div class='ctx'> MPOL_PREFERRED_MANY</div><div class='del'>-	This mode specifices that the allocation should be preferrably</div><div class='add'>+	This mode specifies that the allocation should be preferably</div><div class='ctx'> 	satisfied from the nodemask specified in the policy. If there is</div><div class='ctx'> 	a memory pressure on all nodes in the nodemask, the allocation</div><div class='ctx'> 	can fall back to all existing numa nodes. This is effectively</div><div class='hunk'>@@ -360,7 +358,7 @@ and NUMA nodes.  "Usage" here means one of the following:</div><div class='ctx'> 2) examination of the policy to determine the policy mode and associated node</div><div class='ctx'>    or node lists, if any, for page allocation.  This is considered a "hot</div><div class='ctx'>    path".  Note that for MPOL_BIND, the "usage" extends across the entire</div><div class='del'>-   allocation process, which may sleep during page reclaimation, because the</div><div class='add'>+   allocation process, which may sleep during page reclamation, because the</div><div class='ctx'>    BIND policy nodemask is used, by reference, to filter ineligible nodes.</div><div class='ctx'> </div><div class='ctx'> We can avoid taking an extra reference during the usages listed above as</div><div class='head'>diff --git a/Documentation/admin-guide/mm/numaperf.rst b/Documentation/admin-guide/mm/numaperf.rst<br/>index 166697325947..90a12b6a8bfc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/numaperf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/numaperf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/numaperf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/numaperf.rst</a></div><div class='hunk'>@@ -1,6 +1,7 @@</div><div class='del'>-.. _numaperf:</div><div class='add'>+=======================</div><div class='add'>+NUMA Memory Performance</div><div class='add'>+=======================</div><div class='ctx'> </div><div class='del'>-=============</div><div class='ctx'> NUMA Locality</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +62,6 @@ that are CPUs and hence suitable for generic task scheduling, and</div><div class='ctx'> IO initiators such as GPUs and NICs.  Unlike access class 0, only</div><div class='ctx'> nodes containing CPUs are considered.</div><div class='ctx'> </div><div class='del'>-================</div><div class='ctx'> NUMA Performance</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +96,6 @@ for the platform.</div><div class='ctx'> Access class 1 takes the same form but only includes values for CPU to</div><div class='ctx'> memory activity.</div><div class='ctx'> </div><div class='del'>-==========</div><div class='ctx'> NUMA Cache</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='hunk'>@@ -170,7 +169,6 @@ The "size" is the number of bytes provided by this cache level.</div><div class='ctx'> The "write_policy" will be 0 for write-back, and non-zero for</div><div class='ctx'> write-through caching.</div><div class='ctx'> </div><div class='del'>-========</div><div class='ctx'> See Also</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/mm/pagemap.rst b/Documentation/admin-guide/mm/pagemap.rst<br/>index 6e2e416af783..c8f380271cad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/pagemap.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/pagemap.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/pagemap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/pagemap.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _pagemap:</div><div class='del'>-</div><div class='ctx'> =============================</div><div class='ctx'> Examining Process Page Tables</div><div class='ctx'> =============================</div><div class='hunk'>@@ -19,10 +17,10 @@ There are four components to pagemap:</div><div class='ctx'>     * Bits 0-4   swap type if swapped</div><div class='ctx'>     * Bits 5-54  swap offset if swapped</div><div class='ctx'>     * Bit  55    pte is soft-dirty (see</div><div class='del'>-      :ref:`Documentation/admin-guide/mm/soft-dirty.rst &lt;soft_dirty&gt;`)</div><div class='add'>+      Documentation/admin-guide/mm/soft-dirty.rst)</div><div class='ctx'>     * Bit  56    page exclusively mapped (since 4.2)</div><div class='ctx'>     * Bit  57    pte is uffd-wp write-protected (since 5.13) (see</div><div class='del'>-      :ref:`Documentation/admin-guide/mm/userfaultfd.rst &lt;userfaultfd&gt;`)</div><div class='add'>+      Documentation/admin-guide/mm/userfaultfd.rst)</div><div class='ctx'>     * Bits 58-60 zero</div><div class='ctx'>     * Bit  61    page is file-page or shared-anon (since 3.5)</div><div class='ctx'>     * Bit  62    page swapped</div><div class='hunk'>@@ -46,7 +44,7 @@ There are four components to pagemap:</div><div class='ctx'>  * ``/proc/kpagecount``.  This file contains a 64-bit count of the number of</div><div class='ctx'>    times each page is mapped, indexed by PFN.</div><div class='ctx'> </div><div class='del'>-The page-types tool in the tools/vm directory can be used to query the</div><div class='add'>+The page-types tool in the tools/mm directory can be used to query the</div><div class='ctx'> number of times a page is mapped.</div><div class='ctx'> </div><div class='ctx'>  * ``/proc/kpageflags``.  This file contains a 64-bit set of flags for each</div><div class='hunk'>@@ -93,9 +91,9 @@ Short descriptions to the page flags</div><div class='ctx'>    The page is being locked for exclusive access, e.g. by undergoing read/write</div><div class='ctx'>    IO.</div><div class='ctx'> 7 - SLAB</div><div class='del'>-   The page is managed by the SLAB/SLOB/SLUB/SLQB kernel memory allocator.</div><div class='del'>-   When compound page is used, SLUB/SLQB will only set this flag on the head</div><div class='del'>-   page; SLOB will not flag it at all.</div><div class='add'>+   The page is managed by the SLAB/SLUB kernel memory allocator.</div><div class='add'>+   When compound page is used, either will only set this flag on the head</div><div class='add'>+   page.</div><div class='ctx'> 10 - BUDDY</div><div class='ctx'>     A free memory block managed by the buddy system allocator.</div><div class='ctx'>     The buddy system organizes free memory in blocks of various orders.</div><div class='hunk'>@@ -105,8 +103,7 @@ Short descriptions to the page flags</div><div class='ctx'>     A compound page with order N consists of 2^N physically contiguous pages.</div><div class='ctx'>     A compound page with order 2 takes the form of "HTTT", where H donates its</div><div class='ctx'>     head page and T donates its tail page(s).  The major consumers of compound</div><div class='del'>-    pages are hugeTLB pages</div><div class='del'>-    (:ref:`Documentation/admin-guide/mm/hugetlbpage.rst &lt;hugetlbpage&gt;`),</div><div class='add'>+    pages are hugeTLB pages (Documentation/admin-guide/mm/hugetlbpage.rst),</div><div class='ctx'>     the SLUB etc.  memory allocators and various device drivers.</div><div class='ctx'>     However in this interface, only huge/giga pages are made visible</div><div class='ctx'>     to end users.</div><div class='hunk'>@@ -128,7 +125,7 @@ Short descriptions to the page flags</div><div class='ctx'>     Zero page for pfn_zero or huge_zero page.</div><div class='ctx'> 25 - IDLE</div><div class='ctx'>     The page has not been accessed since it was marked idle (see</div><div class='del'>-    :ref:`Documentation/admin-guide/mm/idle_page_tracking.rst &lt;idle_page_tracking&gt;`).</div><div class='add'>+    Documentation/admin-guide/mm/idle_page_tracking.rst).</div><div class='ctx'>     Note that this flag may be stale in case the page was accessed via</div><div class='ctx'>     a PTE. To make sure the flag is up-to-date one has to read</div><div class='ctx'>     ``/sys/kernel/mm/page_idle/bitmap`` first.</div><div class='hunk'>@@ -173,7 +170,7 @@ LRU related page flags</div><div class='ctx'> 14 - SWAPBACKED</div><div class='ctx'>    The page is backed by swap/RAM.</div><div class='ctx'> </div><div class='del'>-The page-types tool in the tools/vm directory can be used to query the</div><div class='add'>+The page-types tool in the tools/mm directory can be used to query the</div><div class='ctx'> above flags.</div><div class='ctx'> </div><div class='ctx'> Using pagemap to do something useful</div><div class='head'>diff --git a/Documentation/admin-guide/mm/shrinker_debugfs.rst b/Documentation/admin-guide/mm/shrinker_debugfs.rst<br/>new file mode 100644<br/>index 000000000000..c582033bd113<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/shrinker_debugfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/shrinker_debugfs.rst</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+==========================</div><div class='add'>+Shrinker Debugfs Interface</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+Shrinker debugfs interface provides a visibility into the kernel memory</div><div class='add'>+shrinkers subsystem and allows to get information about individual shrinkers</div><div class='add'>+and interact with them.</div><div class='add'>+</div><div class='add'>+For each shrinker registered in the system a directory in **&lt;debugfs&gt;/shrinker/**</div><div class='add'>+is created. The directory's name is composed from the shrinker's name and an</div><div class='add'>+unique id: e.g. *kfree_rcu-0* or *sb-xfs:vda1-36*.</div><div class='add'>+</div><div class='add'>+Each shrinker directory contains **count** and **scan** files, which allow to</div><div class='add'>+trigger *count_objects()* and *scan_objects()* callbacks for each memcg and</div><div class='add'>+numa node (if applicable).</div><div class='add'>+</div><div class='add'>+Usage:</div><div class='add'>+------</div><div class='add'>+</div><div class='add'>+1. *List registered shrinkers*</div><div class='add'>+</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+    $ cd /sys/kernel/debug/shrinker/</div><div class='add'>+    $ ls</div><div class='add'>+    dquota-cache-16     sb-devpts-28     sb-proc-47       sb-tmpfs-42</div><div class='add'>+    mm-shadow-18        sb-devtmpfs-5    sb-proc-48       sb-tmpfs-43</div><div class='add'>+    mm-zspool:zram0-34  sb-hugetlbfs-17  sb-pstore-31     sb-tmpfs-44</div><div class='add'>+    rcu-kfree-0         sb-hugetlbfs-33  sb-rootfs-2      sb-tmpfs-49</div><div class='add'>+    sb-aio-20           sb-iomem-12      sb-securityfs-6  sb-tracefs-13</div><div class='add'>+    sb-anon_inodefs-15  sb-mqueue-21     sb-selinuxfs-22  sb-xfs:vda1-36</div><div class='add'>+    sb-bdev-3           sb-nsfs-4        sb-sockfs-8      sb-zsmalloc-19</div><div class='add'>+    sb-bpf-32           sb-pipefs-14     sb-sysfs-26      thp-deferred_split-10</div><div class='add'>+    sb-btrfs:vda2-24    sb-proc-25       sb-tmpfs-1       thp-zero-9</div><div class='add'>+    sb-cgroup2-30       sb-proc-39       sb-tmpfs-27      xfs-buf:vda1-37</div><div class='add'>+    sb-configfs-23      sb-proc-41       sb-tmpfs-29      xfs-inodegc:vda1-38</div><div class='add'>+    sb-dax-11           sb-proc-45       sb-tmpfs-35</div><div class='add'>+    sb-debugfs-7        sb-proc-46       sb-tmpfs-40</div><div class='add'>+</div><div class='add'>+2. *Get information about a specific shrinker*</div><div class='add'>+</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+    $ cd sb-btrfs\:vda2-24/</div><div class='add'>+    $ ls</div><div class='add'>+    count            scan</div><div class='add'>+</div><div class='add'>+3. *Count objects*</div><div class='add'>+</div><div class='add'>+  Each line in the output has the following format::</div><div class='add'>+</div><div class='add'>+    &lt;cgroup inode id&gt; &lt;nr of objects on node 0&gt; &lt;nr of objects on node 1&gt; ...</div><div class='add'>+    &lt;cgroup inode id&gt; &lt;nr of objects on node 0&gt; &lt;nr of objects on node 1&gt; ...</div><div class='add'>+    ...</div><div class='add'>+</div><div class='add'>+  If there are no objects on all numa nodes, a line is omitted. If there</div><div class='add'>+  are no objects at all, the output might be empty.</div><div class='add'>+</div><div class='add'>+  If the shrinker is not memcg-aware or CONFIG_MEMCG is off, 0 is printed</div><div class='add'>+  as cgroup inode id. If the shrinker is not numa-aware, 0's are printed</div><div class='add'>+  for all nodes except the first one.</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+    $ cat count</div><div class='add'>+    1 224 2</div><div class='add'>+    21 98 0</div><div class='add'>+    55 818 10</div><div class='add'>+    2367 2 0</div><div class='add'>+    2401 30 0</div><div class='add'>+    225 13 0</div><div class='add'>+    599 35 0</div><div class='add'>+    939 124 0</div><div class='add'>+    1041 3 0</div><div class='add'>+    1075 1 0</div><div class='add'>+    1109 1 0</div><div class='add'>+    1279 60 0</div><div class='add'>+    1313 7 0</div><div class='add'>+    1347 39 0</div><div class='add'>+    1381 3 0</div><div class='add'>+    1449 14 0</div><div class='add'>+    1483 63 0</div><div class='add'>+    1517 53 0</div><div class='add'>+    1551 6 0</div><div class='add'>+    1585 1 0</div><div class='add'>+    1619 6 0</div><div class='add'>+    1653 40 0</div><div class='add'>+    1687 11 0</div><div class='add'>+    1721 8 0</div><div class='add'>+    1755 4 0</div><div class='add'>+    1789 52 0</div><div class='add'>+    1823 888 0</div><div class='add'>+    1857 1 0</div><div class='add'>+    1925 2 0</div><div class='add'>+    1959 32 0</div><div class='add'>+    2027 22 0</div><div class='add'>+    2061 9 0</div><div class='add'>+    2469 799 0</div><div class='add'>+    2537 861 0</div><div class='add'>+    2639 1 0</div><div class='add'>+    2707 70 0</div><div class='add'>+    2775 4 0</div><div class='add'>+    2877 84 0</div><div class='add'>+    293 1 0</div><div class='add'>+    735 8 0</div><div class='add'>+</div><div class='add'>+4. *Scan objects*</div><div class='add'>+</div><div class='add'>+  The expected input format::</div><div class='add'>+</div><div class='add'>+    &lt;cgroup inode id&gt; &lt;numa id&gt; &lt;number of objects to scan&gt;</div><div class='add'>+</div><div class='add'>+  For a non-memcg-aware shrinker or on a system with no memory</div><div class='add'>+  cgrups **0** should be passed as cgroup id.</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+    $ cd /sys/kernel/debug/shrinker/</div><div class='add'>+    $ cd sb-btrfs\:vda2-24/</div><div class='add'>+</div><div class='add'>+    $ cat count | head -n 5</div><div class='add'>+    1 212 0</div><div class='add'>+    21 97 0</div><div class='add'>+    55 802 5</div><div class='add'>+    2367 2 0</div><div class='add'>+    225 13 0</div><div class='add'>+</div><div class='add'>+    $ echo "55 0 200" &gt; scan</div><div class='add'>+</div><div class='add'>+    $ cat count | head -n 5</div><div class='add'>+    1 212 0</div><div class='add'>+    21 96 0</div><div class='add'>+    55 752 5</div><div class='add'>+    2367 2 0</div><div class='add'>+    225 13 0</div><div class='head'>diff --git a/Documentation/admin-guide/mm/soft-dirty.rst b/Documentation/admin-guide/mm/soft-dirty.rst<br/>index cb0cfd6672fa..aeea936caa44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/soft-dirty.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/soft-dirty.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/soft-dirty.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/soft-dirty.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _soft_dirty:</div><div class='del'>-</div><div class='ctx'> ===============</div><div class='ctx'> Soft-Dirty PTEs</div><div class='ctx'> ===============</div><div class='head'>diff --git a/Documentation/admin-guide/mm/swap_numa.rst b/Documentation/admin-guide/mm/swap_numa.rst<br/>index e0466f2db8fa..2e630627bcee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/swap_numa.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/swap_numa.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/swap_numa.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/swap_numa.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _swap_numa:</div><div class='del'>-</div><div class='ctx'> ===========================================</div><div class='ctx'> Automatically bind swap device to numa node</div><div class='ctx'> ===========================================</div><div class='head'>diff --git a/Documentation/admin-guide/mm/transhuge.rst b/Documentation/admin-guide/mm/transhuge.rst<br/>index c9c37f16eef8..b0cc8243e093 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/transhuge.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/transhuge.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/transhuge.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/transhuge.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _admin_guide_transhuge:</div><div class='del'>-</div><div class='ctx'> ============================</div><div class='ctx'> Transparent Hugepage Support</div><div class='ctx'> ============================</div><div class='hunk'>@@ -191,7 +189,14 @@ allocation failure to throttle the next allocation attempt::</div><div class='ctx'> </div><div class='ctx'> 	/sys/kernel/mm/transparent_hugepage/khugepaged/alloc_sleep_millisecs</div><div class='ctx'> </div><div class='del'>-The khugepaged progress can be seen in the number of pages collapsed::</div><div class='add'>+The khugepaged progress can be seen in the number of pages collapsed (note</div><div class='add'>+that this counter may not be an exact count of the number of pages</div><div class='add'>+collapsed, since "collapsed" could mean multiple things: (1) A PTE mapping</div><div class='add'>+being replaced by a PMD mapping, or (2) All 4K physical pages replaced by</div><div class='add'>+one 2M hugepage. Each may happen independently, or together, depending on</div><div class='add'>+the type of memory and the failures that occur. As such, this value should</div><div class='add'>+be interpreted roughly as a sign of progress, and counters in /proc/vmstat</div><div class='add'>+consulted for more accurate accounting)::</div><div class='ctx'> </div><div class='ctx'> 	/sys/kernel/mm/transparent_hugepage/khugepaged/pages_collapsed</div><div class='ctx'> </div><div class='hunk'>@@ -366,10 +371,9 @@ thp_split_pmd</div><div class='ctx'> 	page table entry.</div><div class='ctx'> </div><div class='ctx'> thp_zero_page_alloc</div><div class='del'>-	is incremented every time a huge zero page is</div><div class='del'>-	successfully allocated. It includes allocations which where</div><div class='del'>-	dropped due race with other allocation. Note, it doesn't count</div><div class='del'>-	every map of the huge zero page, only its allocation.</div><div class='add'>+	is incremented every time a huge zero page used for thp is</div><div class='add'>+	successfully allocated. Note, it doesn't count every map of</div><div class='add'>+	the huge zero page, only its allocation.</div><div class='ctx'> </div><div class='ctx'> thp_zero_page_alloc_failed</div><div class='ctx'> 	is incremented if kernel fails to allocate</div><div class='head'>diff --git a/Documentation/admin-guide/mm/userfaultfd.rst b/Documentation/admin-guide/mm/userfaultfd.rst<br/>index 6528036093e1..7c304e432205 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/userfaultfd.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/userfaultfd.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/userfaultfd.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/userfaultfd.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _userfaultfd:</div><div class='del'>-</div><div class='ctx'> ===========</div><div class='ctx'> Userfaultfd</div><div class='ctx'> ===========</div><div class='hunk'>@@ -17,7 +15,10 @@ of the ``PROT_NONE+SIGSEGV`` trick.</div><div class='ctx'> Design</div><div class='ctx'> ======</div><div class='ctx'> </div><div class='del'>-Userfaults are delivered and resolved through the ``userfaultfd`` syscall.</div><div class='add'>+Userspace creates a new userfaultfd, initializes it, and registers one or more</div><div class='add'>+regions of virtual memory with it. Then, any page faults which occur within the</div><div class='add'>+region(s) result in a message being delivered to the userfaultfd, notifying</div><div class='add'>+userspace of the fault.</div><div class='ctx'> </div><div class='ctx'> The ``userfaultfd`` (aside from registering and unregistering virtual</div><div class='ctx'> memory ranges) provides two primary functionalities:</div><div class='hunk'>@@ -34,12 +35,11 @@ The real advantage of userfaults if compared to regular virtual memory</div><div class='ctx'> management of mremap/mprotect is that the userfaults in all their</div><div class='ctx'> operations never involve heavyweight structures like vmas (in fact the</div><div class='ctx'> ``userfaultfd`` runtime load never takes the mmap_lock for writing).</div><div class='del'>-</div><div class='ctx'> Vmas are not suitable for page- (or hugepage) granular fault tracking</div><div class='ctx'> when dealing with virtual address spaces that could span</div><div class='ctx'> Terabytes. Too many vmas would be needed for that.</div><div class='ctx'> </div><div class='del'>-The ``userfaultfd`` once opened by invoking the syscall, can also be</div><div class='add'>+The ``userfaultfd``, once created, can also be</div><div class='ctx'> passed using unix domain sockets to a manager process, so the same</div><div class='ctx'> manager process could handle the userfaults of a multitude of</div><div class='ctx'> different processes without them being aware about what is going on</div><div class='hunk'>@@ -50,6 +50,39 @@ is a corner case that would currently return ``-EBUSY``).</div><div class='ctx'> API</div><div class='ctx'> ===</div><div class='ctx'> </div><div class='add'>+Creating a userfaultfd</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+There are two ways to create a new userfaultfd, each of which provide ways to</div><div class='add'>+restrict access to this functionality (since historically userfaultfds which</div><div class='add'>+handle kernel page faults have been a useful tool for exploiting the kernel).</div><div class='add'>+</div><div class='add'>+The first way, supported since userfaultfd was introduced, is the</div><div class='add'>+userfaultfd(2) syscall. Access to this is controlled in several ways:</div><div class='add'>+</div><div class='add'>+- Any user can always create a userfaultfd which traps userspace page faults</div><div class='add'>+  only. Such a userfaultfd can be created using the userfaultfd(2) syscall</div><div class='add'>+  with the flag UFFD_USER_MODE_ONLY.</div><div class='add'>+</div><div class='add'>+- In order to also trap kernel page faults for the address space, either the</div><div class='add'>+  process needs the CAP_SYS_PTRACE capability, or the system must have</div><div class='add'>+  vm.unprivileged_userfaultfd set to 1. By default, vm.unprivileged_userfaultfd</div><div class='add'>+  is set to 0.</div><div class='add'>+</div><div class='add'>+The second way, added to the kernel more recently, is by opening</div><div class='add'>+/dev/userfaultfd and issuing a USERFAULTFD_IOC_NEW ioctl to it. This method</div><div class='add'>+yields equivalent userfaultfds to the userfaultfd(2) syscall.</div><div class='add'>+</div><div class='add'>+Unlike userfaultfd(2), access to /dev/userfaultfd is controlled via normal</div><div class='add'>+filesystem permissions (user/group/mode), which gives fine grained access to</div><div class='add'>+userfaultfd specifically, without also granting other unrelated privileges at</div><div class='add'>+the same time (as e.g. granting CAP_SYS_PTRACE would do). Users who have access</div><div class='add'>+to /dev/userfaultfd can always create userfaultfds that trap kernel page faults;</div><div class='add'>+vm.unprivileged_userfaultfd is not considered.</div><div class='add'>+</div><div class='add'>+Initializing a userfaultfd</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='ctx'> When first opened the ``userfaultfd`` must be enabled invoking the</div><div class='ctx'> ``UFFDIO_API`` ioctl specifying a ``uffdio_api.api`` value set to ``UFFD_API`` (or</div><div class='ctx'> a later API version) which will specify the ``read/POLLIN`` protocol</div><div class='hunk'>@@ -186,6 +219,31 @@ former will have ``UFFD_PAGEFAULT_FLAG_WP`` set, the latter</div><div class='ctx'> you still need to supply a page when ``UFFDIO_REGISTER_MODE_MISSING`` was</div><div class='ctx'> used.</div><div class='ctx'> </div><div class='add'>+Userfaultfd write-protect mode currently behave differently on none ptes</div><div class='add'>+(when e.g. page is missing) over different types of memories.</div><div class='add'>+</div><div class='add'>+For anonymous memory, ``ioctl(UFFDIO_WRITEPROTECT)`` will ignore none ptes</div><div class='add'>+(e.g. when pages are missing and not populated).  For file-backed memories</div><div class='add'>+like shmem and hugetlbfs, none ptes will be write protected just like a</div><div class='add'>+present pte.  In other words, there will be a userfaultfd write fault</div><div class='add'>+message generated when writing to a missing page on file typed memories,</div><div class='add'>+as long as the page range was write-protected before.  Such a message will</div><div class='add'>+not be generated on anonymous memories by default.</div><div class='add'>+</div><div class='add'>+If the application wants to be able to write protect none ptes on anonymous</div><div class='add'>+memory, one can pre-populate the memory with e.g. MADV_POPULATE_READ.  On</div><div class='add'>+newer kernels, one can also detect the feature UFFD_FEATURE_WP_UNPOPULATED</div><div class='add'>+and set the feature bit in advance to make sure none ptes will also be</div><div class='add'>+write protected even upon anonymous memory.</div><div class='add'>+</div><div class='add'>+When using ``UFFDIO_REGISTER_MODE_WP`` in combination with either</div><div class='add'>+``UFFDIO_REGISTER_MODE_MISSING`` or ``UFFDIO_REGISTER_MODE_MINOR``, when</div><div class='add'>+resolving missing / minor faults with ``UFFDIO_COPY`` or ``UFFDIO_CONTINUE``</div><div class='add'>+respectively, it may be desirable for the new page / mapping to be</div><div class='add'>+write-protected (so future writes will also result in a WP fault). These ioctls</div><div class='add'>+support a mode flag (``UFFDIO_COPY_MODE_WP`` or ``UFFDIO_CONTINUE_MODE_WP``</div><div class='add'>+respectively) to configure the mapping this way.</div><div class='add'>+</div><div class='ctx'> QEMU/KVM</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/mm/zswap.rst b/Documentation/admin-guide/mm/zswap.rst<br/>index 6e6f7b0d6562..c5c2c7dbb155 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/zswap.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/mm/zswap.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/mm/zswap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/mm/zswap.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _zswap:</div><div class='del'>-</div><div class='ctx'> =====</div><div class='ctx'> zswap</div><div class='ctx'> =====</div><div class='hunk'>@@ -14,13 +12,7 @@ for potentially reduced swap I/O.  This trade-off can also result in a</div><div class='ctx'> significant performance improvement if reads from the compressed cache are</div><div class='ctx'> faster than reads from a swap device.</div><div class='ctx'> </div><div class='del'>-.. note::</div><div class='del'>-   Zswap is a new feature as of v3.11 and interacts heavily with memory</div><div class='del'>-   reclaim.  This interaction has not been fully explored on the large set of</div><div class='del'>-   potential configurations and workloads that exist.  For this reason, zswap</div><div class='del'>-   is a work in progress and should be considered experimental.</div><div class='del'>-</div><div class='del'>-   Some potential benefits:</div><div class='add'>+Some potential benefits:</div><div class='ctx'> </div><div class='ctx'> * Desktop/laptop users with limited RAM capacities can mitigate the</div><div class='ctx'>   performance impact of swapping.</div><div class='hunk'>@@ -76,9 +68,7 @@ e.g. ``zswap.zpool=zbud``. It can also be changed at runtime using the sysfs</div><div class='ctx'> The zbud type zpool allocates exactly 1 page to store 2 compressed pages, which</div><div class='ctx'> means the compression ratio will always be 2:1 or worse (because of half-full</div><div class='ctx'> zbud pages).  The zsmalloc type zpool has a more complex compressed page</div><div class='del'>-storage method, and it can achieve greater storage densities.  However,</div><div class='del'>-zsmalloc does not implement compressed page eviction, so once zswap fills it</div><div class='del'>-cannot evict the oldest page, it can only reject new pages.</div><div class='add'>+storage method, and it can achieve greater storage densities.</div><div class='ctx'> </div><div class='ctx'> When a swap page is passed from frontswap to zswap, zswap maintains a mapping</div><div class='ctx'> of the swap entry, a combination of the swap type and swap offset, to the zpool</div><div class='head'>diff --git a/Documentation/admin-guide/nfs/nfs-client.rst b/Documentation/admin-guide/nfs/nfs-client.rst<br/>index 6adb6457bc69..36760685dd34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/nfs/nfs-client.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/nfs/nfs-client.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/nfs/nfs-client.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/nfs/nfs-client.rst</a></div><div class='hunk'>@@ -36,10 +36,9 @@ administrative requirements that require particular behavior that does not</div><div class='ctx'> work well as part of an nfs_client_id4 string.</div><div class='ctx'> </div><div class='ctx'> The nfs.nfs4_unique_id boot parameter specifies a unique string that can be</div><div class='del'>-used instead of a system's node name when an NFS client identifies itself to</div><div class='del'>-a server.  Thus, if the system's node name is not unique, or it changes, its</div><div class='del'>-nfs.nfs4_unique_id stays the same, preventing collision with other clients</div><div class='del'>-or loss of state during NFS reboot recovery or transparent state migration.</div><div class='add'>+used together with  a system's node name when an NFS client identifies itself to</div><div class='add'>+a server.  Thus, if the system's node name is not unique, its</div><div class='add'>+nfs.nfs4_unique_id can help prevent collisions with other clients.</div><div class='ctx'> </div><div class='ctx'> The nfs.nfs4_unique_id string is typically a UUID, though it can contain</div><div class='ctx'> anything that is believed to be unique across all NFS clients.  An</div><div class='hunk'>@@ -53,8 +52,12 @@ outstanding NFSv4 state has expired, to prevent loss of NFSv4 state.</div><div class='ctx'> </div><div class='ctx'> This string can be stored in an NFS client's grub.conf, or it can be provided</div><div class='ctx'> via a net boot facility such as PXE.  It may also be specified as an nfs.ko</div><div class='del'>-module parameter.  Specifying a uniquifier string is not support for NFS</div><div class='del'>-clients running in containers.</div><div class='add'>+module parameter.</div><div class='add'>+</div><div class='add'>+This uniquifier string will be the same for all NFS clients running in</div><div class='add'>+containers unless it is overridden by a value written to</div><div class='add'>+/sys/fs/nfs/net/nfs_client/identifier which will be local to the network</div><div class='add'>+namespace of the process which writes.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> The DNS resolver</div><div class='head'>diff --git a/Documentation/admin-guide/perf/alibaba_pmu.rst b/Documentation/admin-guide/perf/alibaba_pmu.rst<br/>new file mode 100644<br/>index 000000000000..11de998bb480<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/alibaba_pmu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/perf/alibaba_pmu.rst</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+=============================================================</div><div class='add'>+Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU)</div><div class='add'>+=============================================================</div><div class='add'>+</div><div class='add'>+The Yitian 710, custom-built by Alibaba Group's chip development business,</div><div class='add'>+T-Head, implements uncore PMU for performance and functional debugging to</div><div class='add'>+facilitate system maintenance.</div><div class='add'>+</div><div class='add'>+DDR Sub-System Driveway (DRW) PMU Driver</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+Yitian 710 employs eight DDR5/4 channels, four on each die. Each DDR5 channel</div><div class='add'>+is independent of others to service system memory requests. And one DDR5</div><div class='add'>+channel is split into two independent sub-channels. The DDR Sub-System Driveway</div><div class='add'>+implements separate PMUs for each sub-channel to monitor various performance</div><div class='add'>+metrics.</div><div class='add'>+</div><div class='add'>+The Driveway PMU devices are named as ali_drw_&lt;sys_base_addr&gt; with perf.</div><div class='add'>+For example, ali_drw_21000 and ali_drw_21080 are two PMU devices for two</div><div class='add'>+sub-channels of the same channel in die 0. And the PMU device of die 1 is</div><div class='add'>+prefixed with ali_drw_400XXXXX, e.g. ali_drw_40021000.</div><div class='add'>+</div><div class='add'>+Each sub-channel has 36 PMU counters in total, which is classified into</div><div class='add'>+four groups:</div><div class='add'>+</div><div class='add'>+- Group 0: PMU Cycle Counter. This group has one pair of counters</div><div class='add'>+  pmu_cycle_cnt_low and pmu_cycle_cnt_high, that is used as the cycle count</div><div class='add'>+  based on DDRC core clock.</div><div class='add'>+</div><div class='add'>+- Group 1: PMU Bandwidth Counters. This group has 8 counters that are used</div><div class='add'>+  to count the total access number of either the eight bank groups in a</div><div class='add'>+  selected rank, or four ranks separately in the first 4 counters. The base</div><div class='add'>+  transfer unit is 64B.</div><div class='add'>+</div><div class='add'>+- Group 2: PMU Retry Counters. This group has 10 counters, that intend to</div><div class='add'>+  count the total retry number of each type of uncorrectable error.</div><div class='add'>+</div><div class='add'>+- Group 3: PMU Common Counters. This group has 16 counters, that are used</div><div class='add'>+  to count the common events.</div><div class='add'>+</div><div class='add'>+For now, the Driveway PMU driver only uses counters in group 0 and group 3.</div><div class='add'>+</div><div class='add'>+The DDR Controller (DDRCTL) and DDR PHY combine to create a complete solution</div><div class='add'>+for connecting an SoC application bus to DDR memory devices. The DDRCTL</div><div class='add'>+receives transactions Host Interface (HIF) which is custom-defined by Synopsys.</div><div class='add'>+These transactions are queued internally and scheduled for access while</div><div class='add'>+satisfying the SDRAM protocol timing requirements, transaction priorities, and</div><div class='add'>+dependencies between the transactions. The DDRCTL in turn issues commands on</div><div class='add'>+the DDR PHY Interface (DFI) to the PHY module, which launches and captures data</div><div class='add'>+to and from the SDRAM. The driveway PMUs have hardware logic to gather</div><div class='add'>+statistics and performance logging signals on HIF, DFI, etc.</div><div class='add'>+</div><div class='add'>+By counting the READ, WRITE and RMW commands sent to the DDRC through the HIF</div><div class='add'>+interface, we could calculate the bandwidth. Example usage of counting memory</div><div class='add'>+data bandwidth::</div><div class='add'>+</div><div class='add'>+  perf stat \</div><div class='add'>+    -e ali_drw_21000/hif_wr/ \</div><div class='add'>+    -e ali_drw_21000/hif_rd/ \</div><div class='add'>+    -e ali_drw_21000/hif_rmw/ \</div><div class='add'>+    -e ali_drw_21000/cycle/ \</div><div class='add'>+    -e ali_drw_21080/hif_wr/ \</div><div class='add'>+    -e ali_drw_21080/hif_rd/ \</div><div class='add'>+    -e ali_drw_21080/hif_rmw/ \</div><div class='add'>+    -e ali_drw_21080/cycle/ \</div><div class='add'>+    -e ali_drw_23000/hif_wr/ \</div><div class='add'>+    -e ali_drw_23000/hif_rd/ \</div><div class='add'>+    -e ali_drw_23000/hif_rmw/ \</div><div class='add'>+    -e ali_drw_23000/cycle/ \</div><div class='add'>+    -e ali_drw_23080/hif_wr/ \</div><div class='add'>+    -e ali_drw_23080/hif_rd/ \</div><div class='add'>+    -e ali_drw_23080/hif_rmw/ \</div><div class='add'>+    -e ali_drw_23080/cycle/ \</div><div class='add'>+    -e ali_drw_25000/hif_wr/ \</div><div class='add'>+    -e ali_drw_25000/hif_rd/ \</div><div class='add'>+    -e ali_drw_25000/hif_rmw/ \</div><div class='add'>+    -e ali_drw_25000/cycle/ \</div><div class='add'>+    -e ali_drw_25080/hif_wr/ \</div><div class='add'>+    -e ali_drw_25080/hif_rd/ \</div><div class='add'>+    -e ali_drw_25080/hif_rmw/ \</div><div class='add'>+    -e ali_drw_25080/cycle/ \</div><div class='add'>+    -e ali_drw_27000/hif_wr/ \</div><div class='add'>+    -e ali_drw_27000/hif_rd/ \</div><div class='add'>+    -e ali_drw_27000/hif_rmw/ \</div><div class='add'>+    -e ali_drw_27000/cycle/ \</div><div class='add'>+    -e ali_drw_27080/hif_wr/ \</div><div class='add'>+    -e ali_drw_27080/hif_rd/ \</div><div class='add'>+    -e ali_drw_27080/hif_rmw/ \</div><div class='add'>+    -e ali_drw_27080/cycle/ -- sleep 10</div><div class='add'>+</div><div class='add'>+The average DRAM bandwidth can be calculated as follows:</div><div class='add'>+</div><div class='add'>+- Read Bandwidth =  perf_hif_rd * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle</div><div class='add'>+- Write Bandwidth = (perf_hif_wr + perf_hif_rmw) * DDRC_WIDTH * DDRC_Freq / DDRC_Cycle</div><div class='add'>+</div><div class='add'>+Here, DDRC_WIDTH = 64 bytes.</div><div class='add'>+</div><div class='add'>+The current driver does not support sampling. So "perf record" is</div><div class='add'>+unsupported.  Also attach to a task is unsupported as the events are all</div><div class='add'>+uncore.</div><div class='head'>diff --git a/Documentation/admin-guide/perf/hisi-pcie-pmu.rst b/Documentation/admin-guide/perf/hisi-pcie-pmu.rst<br/>index 294ebbdb22af..7e863662e2d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/hisi-pcie-pmu.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/perf/hisi-pcie-pmu.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/hisi-pcie-pmu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/perf/hisi-pcie-pmu.rst</a></div><div class='hunk'>@@ -15,10 +15,10 @@ HiSilicon PCIe PMU driver</div><div class='ctx'> The PCIe PMU driver registers a perf PMU with the name of its sicl-id and PCIe</div><div class='ctx'> Core id.::</div><div class='ctx'> </div><div class='del'>-  /sys/bus/event_source/hisi_pcie&lt;sicl&gt;_&lt;core&gt;</div><div class='add'>+  /sys/bus/event_source/hisi_pcie&lt;sicl&gt;_core&lt;core&gt;</div><div class='ctx'> </div><div class='ctx'> PMU driver provides description of available events and filter options in sysfs,</div><div class='del'>-see /sys/bus/event_source/devices/hisi_pcie&lt;sicl&gt;_&lt;core&gt;.</div><div class='add'>+see /sys/bus/event_source/devices/hisi_pcie&lt;sicl&gt;_core&lt;core&gt;.</div><div class='ctx'> </div><div class='ctx'> The "format" directory describes all formats of the config (events) and config1</div><div class='ctx'> (filter options) fields of the perf_event_attr structure. The "events" directory</div><div class='hunk'>@@ -33,13 +33,13 @@ monitored by PMU.</div><div class='ctx'> Example usage of perf::</div><div class='ctx'> </div><div class='ctx'>   $# perf list</div><div class='del'>-  hisi_pcie0_0/rx_mwr_latency/ [kernel PMU event]</div><div class='del'>-  hisi_pcie0_0/rx_mwr_cnt/ [kernel PMU event]</div><div class='add'>+  hisi_pcie0_core0/rx_mwr_latency/ [kernel PMU event]</div><div class='add'>+  hisi_pcie0_core0/rx_mwr_cnt/ [kernel PMU event]</div><div class='ctx'>   ------------------------------------------</div><div class='ctx'> </div><div class='del'>-  $# perf stat -e hisi_pcie0_0/rx_mwr_latency/</div><div class='del'>-  $# perf stat -e hisi_pcie0_0/rx_mwr_cnt/</div><div class='del'>-  $# perf stat -g -e hisi_pcie0_0/rx_mwr_latency/ -e hisi_pcie0_0/rx_mwr_cnt/</div><div class='add'>+  $# perf stat -e hisi_pcie0_core0/rx_mwr_latency/</div><div class='add'>+  $# perf stat -e hisi_pcie0_core0/rx_mwr_cnt/</div><div class='add'>+  $# perf stat -g -e hisi_pcie0_core0/rx_mwr_latency/ -e hisi_pcie0_core0/rx_mwr_cnt/</div><div class='ctx'> </div><div class='ctx'> The current driver does not support sampling. So "perf record" is unsupported.</div><div class='ctx'> Also attach to a task is unsupported for PCIe PMU.</div><div class='hunk'>@@ -48,59 +48,83 @@ Filter options</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='ctx'> 1. Target filter</div><div class='del'>-PMU could only monitor the performance of traffic downstream target Root Ports</div><div class='del'>-or downstream target Endpoint. PCIe PMU driver support "port" and "bdf"</div><div class='del'>-interfaces for users, and these two interfaces aren't supported at the same</div><div class='del'>-time.</div><div class='ctx'> </div><div class='del'>--port</div><div class='del'>-"port" filter can be used in all PCIe PMU events, target Root Port can be</div><div class='del'>-selected by configuring the 16-bits-bitmap "port". Multi ports can be selected</div><div class='del'>-for AP-layer-events, and only one port can be selected for TL/DL-layer-events.</div><div class='add'>+   PMU could only monitor the performance of traffic downstream target Root</div><div class='add'>+   Ports or downstream target Endpoint. PCIe PMU driver support "port" and</div><div class='add'>+   "bdf" interfaces for users, and these two interfaces aren't supported at the</div><div class='add'>+   same time.</div><div class='ctx'> </div><div class='del'>-For example, if target Root Port is 0000:00:00.0 (x8 lanes), bit0 of bitmap</div><div class='del'>-should be set, port=0x1; if target Root Port is 0000:00:04.0 (x4 lanes),</div><div class='del'>-bit8 is set, port=0x100; if these two Root Ports are both monitored, port=0x101.</div><div class='add'>+   - port</div><div class='ctx'> </div><div class='del'>-Example usage of perf::</div><div class='add'>+     "port" filter can be used in all PCIe PMU events, target Root Port can be</div><div class='add'>+     selected by configuring the 16-bits-bitmap "port". Multi ports can be</div><div class='add'>+     selected for AP-layer-events, and only one port can be selected for</div><div class='add'>+     TL/DL-layer-events.</div><div class='ctx'> </div><div class='del'>-  $# perf stat -e hisi_pcie0_0/rx_mwr_latency,port=0x1/ sleep 5</div><div class='add'>+     For example, if target Root Port is 0000:00:00.0 (x8 lanes), bit0 of</div><div class='add'>+     bitmap should be set, port=0x1; if target Root Port is 0000:00:04.0 (x4</div><div class='add'>+     lanes), bit8 is set, port=0x100; if these two Root Ports are both</div><div class='add'>+     monitored, port=0x101.</div><div class='ctx'> </div><div class='del'>--bdf</div><div class='add'>+     Example usage of perf::</div><div class='ctx'> </div><div class='del'>-"bdf" filter can only be used in bandwidth events, target Endpoint is selected</div><div class='del'>-by configuring BDF to "bdf". Counter only counts the bandwidth of message</div><div class='del'>-requested by target Endpoint.</div><div class='add'>+       $# perf stat -e hisi_pcie0_core0/rx_mwr_latency,port=0x1/ sleep 5</div><div class='ctx'> </div><div class='del'>-For example, "bdf=0x3900" means BDF of target Endpoint is 0000:39:00.0.</div><div class='add'>+   - bdf</div><div class='ctx'> </div><div class='del'>-Example usage of perf::</div><div class='add'>+     "bdf" filter can only be used in bandwidth events, target Endpoint is</div><div class='add'>+     selected by configuring BDF to "bdf". Counter only counts the bandwidth of</div><div class='add'>+     message requested by target Endpoint.</div><div class='add'>+</div><div class='add'>+     For example, "bdf=0x3900" means BDF of target Endpoint is 0000:39:00.0.</div><div class='add'>+</div><div class='add'>+     Example usage of perf::</div><div class='ctx'> </div><div class='del'>-  $# perf stat -e hisi_pcie0_0/rx_mrd_flux,bdf=0x3900/ sleep 5</div><div class='add'>+       $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,bdf=0x3900/ sleep 5</div><div class='ctx'> </div><div class='ctx'> 2. Trigger filter</div><div class='del'>-Event statistics start when the first time TLP length is greater/smaller</div><div class='del'>-than trigger condition. You can set the trigger condition by writing "trig_len",</div><div class='del'>-and set the trigger mode by writing "trig_mode". This filter can only be used</div><div class='del'>-in bandwidth events.</div><div class='ctx'> </div><div class='del'>-For example, "trig_len=4" means trigger condition is 2^4 DW, "trig_mode=0"</div><div class='del'>-means statistics start when TLP length &gt; trigger condition, "trig_mode=1"</div><div class='del'>-means start when TLP length &lt; condition.</div><div class='add'>+   Event statistics start when the first time TLP length is greater/smaller</div><div class='add'>+   than trigger condition. You can set the trigger condition by writing</div><div class='add'>+   "trig_len", and set the trigger mode by writing "trig_mode". This filter can</div><div class='add'>+   only be used in bandwidth events.</div><div class='ctx'> </div><div class='del'>-Example usage of perf::</div><div class='add'>+   For example, "trig_len=4" means trigger condition is 2^4 DW, "trig_mode=0"</div><div class='add'>+   means statistics start when TLP length &gt; trigger condition, "trig_mode=1"</div><div class='add'>+   means start when TLP length &lt; condition.</div><div class='add'>+</div><div class='add'>+   Example usage of perf::</div><div class='ctx'> </div><div class='del'>-  $# perf stat -e hisi_pcie0_0/rx_mrd_flux,trig_len=0x4,trig_mode=1/ sleep 5</div><div class='add'>+     $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,trig_len=0x4,trig_mode=1/ sleep 5</div><div class='ctx'> </div><div class='ctx'> 3. Threshold filter</div><div class='del'>-Counter counts when TLP length within the specified range. You can set the</div><div class='del'>-threshold by writing "thr_len", and set the threshold mode by writing</div><div class='del'>-"thr_mode". This filter can only be used in bandwidth events.</div><div class='ctx'> </div><div class='del'>-For example, "thr_len=4" means threshold is 2^4 DW, "thr_mode=0" means</div><div class='del'>-counter counts when TLP length &gt;= threshold, and "thr_mode=1" means counts</div><div class='del'>-when TLP length &lt; threshold.</div><div class='add'>+   Counter counts when TLP length within the specified range. You can set the</div><div class='add'>+   threshold by writing "thr_len", and set the threshold mode by writing</div><div class='add'>+   "thr_mode". This filter can only be used in bandwidth events.</div><div class='ctx'> </div><div class='del'>-Example usage of perf::</div><div class='add'>+   For example, "thr_len=4" means threshold is 2^4 DW, "thr_mode=0" means</div><div class='add'>+   counter counts when TLP length &gt;= threshold, and "thr_mode=1" means counts</div><div class='add'>+   when TLP length &lt; threshold.</div><div class='add'>+</div><div class='add'>+   Example usage of perf::</div><div class='add'>+</div><div class='add'>+     $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,thr_len=0x4,thr_mode=1/ sleep 5</div><div class='add'>+</div><div class='add'>+4. TLP Length filter</div><div class='add'>+</div><div class='add'>+   When counting bandwidth, the data can be composed of certain parts of TLP</div><div class='add'>+   packets. You can specify it through "len_mode":</div><div class='add'>+</div><div class='add'>+   - 2'b00: Reserved (Do not use this since the behaviour is undefined)</div><div class='add'>+   - 2'b01: Bandwidth of TLP payloads</div><div class='add'>+   - 2'b10: Bandwidth of TLP headers</div><div class='add'>+   - 2'b11: Bandwidth of both TLP payloads and headers</div><div class='add'>+</div><div class='add'>+   For example, "len_mode=2" means only counting the bandwidth of TLP headers</div><div class='add'>+   and "len_mode=3" means the final bandwidth data is composed of both TLP</div><div class='add'>+   headers and payloads. Default value if not specified is 2'b11.</div><div class='add'>+</div><div class='add'>+   Example usage of perf::</div><div class='ctx'> </div><div class='del'>-  $# perf stat -e hisi_pcie0_0/rx_mrd_flux,thr_len=0x4,thr_mode=1/ sleep 5</div><div class='add'>+     $# perf stat -e hisi_pcie0_core0/rx_mrd_flux,len_mode=0x1/ sleep 5</div><div class='head'>diff --git a/Documentation/admin-guide/perf/hns3-pmu.rst b/Documentation/admin-guide/perf/hns3-pmu.rst<br/>new file mode 100644<br/>index 000000000000..75a40846d47f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/hns3-pmu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/perf/hns3-pmu.rst</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+======================================</div><div class='add'>+HNS3 Performance Monitoring Unit (PMU)</div><div class='add'>+======================================</div><div class='add'>+</div><div class='add'>+HNS3(HiSilicon network system 3) Performance Monitoring Unit (PMU) is an</div><div class='add'>+End Point device to collect performance statistics of HiSilicon SoC NIC.</div><div class='add'>+On Hip09, each SICL(Super I/O cluster) has one PMU device.</div><div class='add'>+</div><div class='add'>+HNS3 PMU supports collection of performance statistics such as bandwidth,</div><div class='add'>+latency, packet rate and interrupt rate.</div><div class='add'>+</div><div class='add'>+Each HNS3 PMU supports 8 hardware events.</div><div class='add'>+</div><div class='add'>+HNS3 PMU driver</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+The HNS3 PMU driver registers a perf PMU with the name of its sicl id.::</div><div class='add'>+</div><div class='add'>+  /sys/devices/hns3_pmu_sicl_&lt;sicl_id&gt;</div><div class='add'>+</div><div class='add'>+PMU driver provides description of available events, filter modes, format,</div><div class='add'>+identifier and cpumask in sysfs.</div><div class='add'>+</div><div class='add'>+The "events" directory describes the event code of all supported events</div><div class='add'>+shown in perf list.</div><div class='add'>+</div><div class='add'>+The "filtermode" directory describes the supported filter modes of each</div><div class='add'>+event.</div><div class='add'>+</div><div class='add'>+The "format" directory describes all formats of the config (events) and</div><div class='add'>+config1 (filter options) fields of the perf_event_attr structure.</div><div class='add'>+</div><div class='add'>+The "identifier" file shows version of PMU hardware device.</div><div class='add'>+</div><div class='add'>+The "bdf_min" and "bdf_max" files show the supported bdf range of each</div><div class='add'>+pmu device.</div><div class='add'>+</div><div class='add'>+The "hw_clk_freq" file shows the hardware clock frequency of each pmu</div><div class='add'>+device.</div><div class='add'>+</div><div class='add'>+Example usage of checking event code and subevent code::</div><div class='add'>+</div><div class='add'>+  $# cat /sys/devices/hns3_pmu_sicl_0/events/dly_tx_normal_to_mac_time</div><div class='add'>+  config=0x00204</div><div class='add'>+  $# cat /sys/devices/hns3_pmu_sicl_0/events/dly_tx_normal_to_mac_packet_num</div><div class='add'>+  config=0x10204</div><div class='add'>+</div><div class='add'>+Each performance statistic has a pair of events to get two values to</div><div class='add'>+calculate real performance data in userspace.</div><div class='add'>+</div><div class='add'>+The bits 0~15 of config (here 0x0204) are the true hardware event code. If</div><div class='add'>+two events have same value of bits 0~15 of config, that means they are</div><div class='add'>+event pair. And the bit 16 of config indicates getting counter 0 or</div><div class='add'>+counter 1 of hardware event.</div><div class='add'>+</div><div class='add'>+After getting two values of event pair in userspace, the formula of</div><div class='add'>+computation to calculate real performance data is:::</div><div class='add'>+</div><div class='add'>+  counter 0 / counter 1</div><div class='add'>+</div><div class='add'>+Example usage of checking supported filter mode::</div><div class='add'>+</div><div class='add'>+  $# cat /sys/devices/hns3_pmu_sicl_0/filtermode/bw_ssu_rpu_byte_num</div><div class='add'>+  filter mode supported: global/port/port-tc/func/func-queue/</div><div class='add'>+</div><div class='add'>+Example usage of perf::</div><div class='add'>+</div><div class='add'>+  $# perf list</div><div class='add'>+  hns3_pmu_sicl_0/bw_ssu_rpu_byte_num/ [kernel PMU event]</div><div class='add'>+  hns3_pmu_sicl_0/bw_ssu_rpu_time/     [kernel PMU event]</div><div class='add'>+  ------------------------------------------</div><div class='add'>+</div><div class='add'>+  $# perf stat -g -e hns3_pmu_sicl_0/bw_ssu_rpu_byte_num,global=1/ -e hns3_pmu_sicl_0/bw_ssu_rpu_time,global=1/ -I 1000</div><div class='add'>+  or</div><div class='add'>+  $# perf stat -g -e hns3_pmu_sicl_0/config=0x00002,global=1/ -e hns3_pmu_sicl_0/config=0x10002,global=1/ -I 1000</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Filter modes</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+1. global mode</div><div class='add'>+PMU collect performance statistics for all HNS3 PCIe functions of IO DIE.</div><div class='add'>+Set the "global" filter option to 1 will enable this mode.</div><div class='add'>+Example usage of perf::</div><div class='add'>+</div><div class='add'>+  $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,global=1/ -I 1000</div><div class='add'>+</div><div class='add'>+2. port mode</div><div class='add'>+PMU collect performance statistic of one whole physical port. The port id</div><div class='add'>+is same as mac id. The "tc" filter option must be set to 0xF in this mode,</div><div class='add'>+here tc stands for traffic class.</div><div class='add'>+</div><div class='add'>+Example usage of perf::</div><div class='add'>+</div><div class='add'>+  $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,port=0,tc=0xF/ -I 1000</div><div class='add'>+</div><div class='add'>+3. port-tc mode</div><div class='add'>+PMU collect performance statistic of one tc of physical port. The port id</div><div class='add'>+is same as mac id. The "tc" filter option must be set to 0 ~ 7 in this</div><div class='add'>+mode.</div><div class='add'>+Example usage of perf::</div><div class='add'>+</div><div class='add'>+  $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,port=0,tc=0/ -I 1000</div><div class='add'>+</div><div class='add'>+4. func mode</div><div class='add'>+PMU collect performance statistic of one PF/VF. The function id is BDF of</div><div class='add'>+PF/VF, its conversion formula::</div><div class='add'>+</div><div class='add'>+  func = (bus &lt;&lt; 8) + (device &lt;&lt; 3) + (function)</div><div class='add'>+</div><div class='add'>+for example:</div><div class='add'>+  BDF         func</div><div class='add'>+  35:00.0    0x3500</div><div class='add'>+  35:00.1    0x3501</div><div class='add'>+  35:01.0    0x3508</div><div class='add'>+</div><div class='add'>+In this mode, the "queue" filter option must be set to 0xFFFF.</div><div class='add'>+Example usage of perf::</div><div class='add'>+</div><div class='add'>+  $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,bdf=0x3500,queue=0xFFFF/ -I 1000</div><div class='add'>+</div><div class='add'>+5. func-queue mode</div><div class='add'>+PMU collect performance statistic of one queue of PF/VF. The function id</div><div class='add'>+is BDF of PF/VF, the "queue" filter option must be set to the exact queue</div><div class='add'>+id of function.</div><div class='add'>+Example usage of perf::</div><div class='add'>+</div><div class='add'>+  $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,bdf=0x3500,queue=0/ -I 1000</div><div class='add'>+</div><div class='add'>+6. func-intr mode</div><div class='add'>+PMU collect performance statistic of one interrupt of PF/VF. The function</div><div class='add'>+id is BDF of PF/VF, the "intr" filter option must be set to the exact</div><div class='add'>+interrupt id of function.</div><div class='add'>+Example usage of perf::</div><div class='add'>+</div><div class='add'>+  $# perf stat -a -e hns3_pmu_sicl_0/config=0x00301,bdf=0x3500,intr=0/ -I 1000</div><div class='head'>diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst<br/>index 69b23f087c05..9de64a40adab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/perf/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/perf/index.rst</a></div><div class='hunk'>@@ -9,6 +9,7 @@ Performance monitor support</div><div class='ctx'> </div><div class='ctx'>    hisi-pmu</div><div class='ctx'>    hisi-pcie-pmu</div><div class='add'>+   hns3-pmu</div><div class='ctx'>    imx-ddr</div><div class='ctx'>    qcom_l2_pmu</div><div class='ctx'>    qcom_l3_pmu</div><div class='hunk'>@@ -17,3 +18,6 @@ Performance monitor support</div><div class='ctx'>    xgene-pmu</div><div class='ctx'>    arm_dsu_pmu</div><div class='ctx'>    thunderx2-pmu</div><div class='add'>+   alibaba_pmu</div><div class='add'>+   nvidia-pmu</div><div class='add'>+   meson-ddr-pmu</div><div class='head'>diff --git a/Documentation/admin-guide/perf/meson-ddr-pmu.rst b/Documentation/admin-guide/perf/meson-ddr-pmu.rst<br/>new file mode 100644<br/>index 000000000000..8e71be1d6346<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/meson-ddr-pmu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/perf/meson-ddr-pmu.rst</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===========================================================</div><div class='add'>+Amlogic SoC DDR Bandwidth Performance Monitoring Unit (PMU)</div><div class='add'>+===========================================================</div><div class='add'>+</div><div class='add'>+The Amlogic Meson G12 SoC contains a bandwidth monitor inside DRAM controller.</div><div class='add'>+The monitor includes 4 channels. Each channel can count the request accessing</div><div class='add'>+DRAM. The channel can count up to 3 AXI port simultaneously. It can be helpful</div><div class='add'>+to show if the performance bottleneck is on DDR bandwidth.</div><div class='add'>+</div><div class='add'>+Currently, this driver supports the following 5 perf events:</div><div class='add'>+</div><div class='add'>++ meson_ddr_bw/total_rw_bytes/</div><div class='add'>++ meson_ddr_bw/chan_1_rw_bytes/</div><div class='add'>++ meson_ddr_bw/chan_2_rw_bytes/</div><div class='add'>++ meson_ddr_bw/chan_3_rw_bytes/</div><div class='add'>++ meson_ddr_bw/chan_4_rw_bytes/</div><div class='add'>+</div><div class='add'>+meson_ddr_bw/chan_{1,2,3,4}_rw_bytes/ events are channel-specific events.</div><div class='add'>+Each channel support filtering, which can let the channel to monitor</div><div class='add'>+individual IP module in SoC.</div><div class='add'>+</div><div class='add'>+Below are DDR access request event filter keywords:</div><div class='add'>+</div><div class='add'>++ arm             - from CPU</div><div class='add'>++ vpu_read1       - from OSD + VPP read</div><div class='add'>++ gpu             - from 3D GPU</div><div class='add'>++ pcie            - from PCIe controller</div><div class='add'>++ hdcp            - from HDCP controller</div><div class='add'>++ hevc_front      - from HEVC codec front end</div><div class='add'>++ usb3_0          - from USB3.0 controller</div><div class='add'>++ hevc_back       - from HEVC codec back end</div><div class='add'>++ h265enc         - from HEVC encoder</div><div class='add'>++ vpu_read2       - from DI read</div><div class='add'>++ vpu_write1      - from VDIN write</div><div class='add'>++ vpu_write2      - from di write</div><div class='add'>++ vdec            - from legacy codec video decoder</div><div class='add'>++ hcodec          - from H264 encoder</div><div class='add'>++ ge2d            - from ge2d</div><div class='add'>++ spicc1          - from SPI controller 1</div><div class='add'>++ usb0            - from USB2.0 controller 0</div><div class='add'>++ dma             - from system DMA controller 1</div><div class='add'>++ arb0            - from arb0</div><div class='add'>++ sd_emmc_b       - from SD eMMC b controller</div><div class='add'>++ usb1            - from USB2.0 controller 1</div><div class='add'>++ audio           - from Audio module</div><div class='add'>++ sd_emmc_c       - from SD eMMC c controller</div><div class='add'>++ spicc2          - from SPI controller 2</div><div class='add'>++ ethernet        - from Ethernet controller</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Examples:</div><div class='add'>+</div><div class='add'>+  + Show the total DDR bandwidth per seconds:</div><div class='add'>+</div><div class='add'>+    .. code-block:: bash</div><div class='add'>+</div><div class='add'>+       perf stat -a -e meson_ddr_bw/total_rw_bytes/ -I 1000 sleep 10</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  + Show individual DDR bandwidth from CPU and GPU respectively, as well as</div><div class='add'>+    sum of them:</div><div class='add'>+</div><div class='add'>+    .. code-block:: bash</div><div class='add'>+</div><div class='add'>+       perf stat -a -e meson_ddr_bw/chan_1_rw_bytes,arm=1/ -I 1000 sleep 10</div><div class='add'>+       perf stat -a -e meson_ddr_bw/chan_2_rw_bytes,gpu=1/ -I 1000 sleep 10</div><div class='add'>+       perf stat -a -e meson_ddr_bw/chan_3_rw_bytes,arm=1,gpu=1/ -I 1000 sleep 10</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/admin-guide/perf/nvidia-pmu.rst b/Documentation/admin-guide/perf/nvidia-pmu.rst<br/>new file mode 100644<br/>index 000000000000..2e0d47cfe7ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/perf/nvidia-pmu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/perf/nvidia-pmu.rst</a></div><div class='hunk'>@@ -0,0 +1,299 @@</div><div class='add'>+=========================================================</div><div class='add'>+NVIDIA Tegra SoC Uncore Performance Monitoring Unit (PMU)</div><div class='add'>+=========================================================</div><div class='add'>+</div><div class='add'>+The NVIDIA Tegra SoC includes various system PMUs to measure key performance</div><div class='add'>+metrics like memory bandwidth, latency, and utilization:</div><div class='add'>+</div><div class='add'>+* Scalable Coherency Fabric (SCF)</div><div class='add'>+* NVLink-C2C0</div><div class='add'>+* NVLink-C2C1</div><div class='add'>+* CNVLink</div><div class='add'>+* PCIE</div><div class='add'>+</div><div class='add'>+PMU Driver</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The PMUs in this document are based on ARM CoreSight PMU Architecture as</div><div class='add'>+described in document: ARM IHI 0091. Since this is a standard architecture, the</div><div class='add'>+PMUs are managed by a common driver "arm-cs-arch-pmu". This driver describes</div><div class='add'>+the available events and configuration of each PMU in sysfs. Please see the</div><div class='add'>+sections below to get the sysfs path of each PMU. Like other uncore PMU drivers,</div><div class='add'>+the driver provides "cpumask" sysfs attribute to show the CPU id used to handle</div><div class='add'>+the PMU event. There is also "associated_cpus" sysfs attribute, which contains a</div><div class='add'>+list of CPUs associated with the PMU instance.</div><div class='add'>+</div><div class='add'>+.. _SCF_PMU_Section:</div><div class='add'>+</div><div class='add'>+SCF PMU</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+The SCF PMU monitors system level cache events, CPU traffic, and</div><div class='add'>+strongly-ordered (SO) PCIE write traffic to local/remote memory. Please see</div><div class='add'>+:ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section` for more info about the PMU</div><div class='add'>+traffic coverage.</div><div class='add'>+</div><div class='add'>+The events and configuration options of this PMU device are described in sysfs,</div><div class='add'>+see /sys/bus/event_sources/devices/nvidia_scf_pmu_&lt;socket-id&gt;.</div><div class='add'>+</div><div class='add'>+Example usage:</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 in socket 0::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_scf_pmu_0/event=0x0/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 in socket 1::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_scf_pmu_1/event=0x0/</div><div class='add'>+</div><div class='add'>+NVLink-C2C0 PMU</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+The NVLink-C2C0 PMU monitors incoming traffic from a GPU/CPU connected with</div><div class='add'>+NVLink-C2C (Chip-2-Chip) interconnect. The type of traffic captured by this PMU</div><div class='add'>+varies dependent on the chip configuration:</div><div class='add'>+</div><div class='add'>+* NVIDIA Grace Hopper Superchip: Hopper GPU is connected with Grace SoC.</div><div class='add'>+</div><div class='add'>+  In this config, the PMU captures GPU ATS translated or EGM traffic from the GPU.</div><div class='add'>+</div><div class='add'>+* NVIDIA Grace CPU Superchip: two Grace CPU SoCs are connected.</div><div class='add'>+</div><div class='add'>+  In this config, the PMU captures read and relaxed ordered (RO) writes from</div><div class='add'>+  PCIE device of the remote SoC.</div><div class='add'>+</div><div class='add'>+Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section` for more info about</div><div class='add'>+the PMU traffic coverage.</div><div class='add'>+</div><div class='add'>+The events and configuration options of this PMU device are described in sysfs,</div><div class='add'>+see /sys/bus/event_sources/devices/nvidia_nvlink_c2c0_pmu_&lt;socket-id&gt;.</div><div class='add'>+</div><div class='add'>+Example usage:</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU/CPU connected with socket 0::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c0_pmu_0/event=0x0/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU/CPU connected with socket 1::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c0_pmu_1/event=0x0/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU/CPU connected with socket 2::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c0_pmu_2/event=0x0/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU/CPU connected with socket 3::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c0_pmu_3/event=0x0/</div><div class='add'>+</div><div class='add'>+NVLink-C2C1 PMU</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+The NVLink-C2C1 PMU monitors incoming traffic from a GPU connected with</div><div class='add'>+NVLink-C2C (Chip-2-Chip) interconnect. This PMU captures untranslated GPU</div><div class='add'>+traffic, in contrast with NvLink-C2C0 PMU that captures ATS translated traffic.</div><div class='add'>+Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section` for more info about</div><div class='add'>+the PMU traffic coverage.</div><div class='add'>+</div><div class='add'>+The events and configuration options of this PMU device are described in sysfs,</div><div class='add'>+see /sys/bus/event_sources/devices/nvidia_nvlink_c2c1_pmu_&lt;socket-id&gt;.</div><div class='add'>+</div><div class='add'>+Example usage:</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU connected with socket 0::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c1_pmu_0/event=0x0/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU connected with socket 1::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c1_pmu_1/event=0x0/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU connected with socket 2::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c1_pmu_2/event=0x0/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from the GPU connected with socket 3::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_nvlink_c2c1_pmu_3/event=0x0/</div><div class='add'>+</div><div class='add'>+CNVLink PMU</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+The CNVLink PMU monitors traffic from GPU and PCIE device on remote sockets</div><div class='add'>+to local memory. For PCIE traffic, this PMU captures read and relaxed ordered</div><div class='add'>+(RO) write traffic. Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section`</div><div class='add'>+for more info about the PMU traffic coverage.</div><div class='add'>+</div><div class='add'>+The events and configuration options of this PMU device are described in sysfs,</div><div class='add'>+see /sys/bus/event_sources/devices/nvidia_cnvlink_pmu_&lt;socket-id&gt;.</div><div class='add'>+</div><div class='add'>+Each SoC socket can be connected to one or more sockets via CNVLink. The user can</div><div class='add'>+use "rem_socket" bitmap parameter to select the remote socket(s) to monitor.</div><div class='add'>+Each bit represents the socket number, e.g. "rem_socket=0xE" corresponds to</div><div class='add'>+socket 1 to 3.</div><div class='add'>+/sys/bus/event_sources/devices/nvidia_cnvlink_pmu_&lt;socket-id&gt;/format/rem_socket</div><div class='add'>+shows the valid bits that can be set in the "rem_socket" parameter.</div><div class='add'>+</div><div class='add'>+The PMU can not distinguish the remote traffic initiator, therefore it does not</div><div class='add'>+provide filter to select the traffic source to monitor. It reports combined</div><div class='add'>+traffic from remote GPU and PCIE devices.</div><div class='add'>+</div><div class='add'>+Example usage:</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 for the traffic from remote socket 1, 2, and 3 to socket 0::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_cnvlink_pmu_0/event=0x0,rem_socket=0xE/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 for the traffic from remote socket 0, 2, and 3 to socket 1::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_cnvlink_pmu_1/event=0x0,rem_socket=0xD/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 for the traffic from remote socket 0, 1, and 3 to socket 2::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_cnvlink_pmu_2/event=0x0,rem_socket=0xB/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 for the traffic from remote socket 0, 1, and 2 to socket 3::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_cnvlink_pmu_3/event=0x0,rem_socket=0x7/</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+PCIE PMU</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+The PCIE PMU monitors all read/write traffic from PCIE root ports to</div><div class='add'>+local/remote memory. Please see :ref:`NVIDIA_Uncore_PMU_Traffic_Coverage_Section`</div><div class='add'>+for more info about the PMU traffic coverage.</div><div class='add'>+</div><div class='add'>+The events and configuration options of this PMU device are described in sysfs,</div><div class='add'>+see /sys/bus/event_sources/devices/nvidia_pcie_pmu_&lt;socket-id&gt;.</div><div class='add'>+</div><div class='add'>+Each SoC socket can support multiple root ports. The user can use</div><div class='add'>+"root_port" bitmap parameter to select the port(s) to monitor, i.e.</div><div class='add'>+"root_port=0xF" corresponds to root port 0 to 3.</div><div class='add'>+/sys/bus/event_sources/devices/nvidia_pcie_pmu_&lt;socket-id&gt;/format/root_port</div><div class='add'>+shows the valid bits that can be set in the "root_port" parameter.</div><div class='add'>+</div><div class='add'>+Example usage:</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from root port 0 and 1 of socket 0::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_pcie_pmu_0/event=0x0,root_port=0x3/</div><div class='add'>+</div><div class='add'>+* Count event id 0x0 from root port 0 and 1 of socket 1::</div><div class='add'>+</div><div class='add'>+   perf stat -a -e nvidia_pcie_pmu_1/event=0x0,root_port=0x3/</div><div class='add'>+</div><div class='add'>+.. _NVIDIA_Uncore_PMU_Traffic_Coverage_Section:</div><div class='add'>+</div><div class='add'>+Traffic Coverage</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The PMU traffic coverage may vary dependent on the chip configuration:</div><div class='add'>+</div><div class='add'>+* **NVIDIA Grace Hopper Superchip**: Hopper GPU is connected with Grace SoC.</div><div class='add'>+</div><div class='add'>+  Example configuration with two Grace SoCs::</div><div class='add'>+</div><div class='add'>+   *********************************          *********************************</div><div class='add'>+   * SOCKET-A                      *          * SOCKET-B                      *</div><div class='add'>+   *                               *          *                               *</div><div class='add'>+   *                     ::::::::  *          *  ::::::::                     *</div><div class='add'>+   *                     : PCIE :  *          *  : PCIE :                     *</div><div class='add'>+   *                     ::::::::  *          *  ::::::::                     *</div><div class='add'>+   *                         |     *          *      |                        *</div><div class='add'>+   *                         |     *          *      |                        *</div><div class='add'>+   *  :::::::            ::::::::: *          *  :::::::::            ::::::: *</div><div class='add'>+   *  :     :            :       : *          *  :       :            :     : *</div><div class='add'>+   *  : GPU :&lt;--NVLink--&gt;: Grace :&lt;---CNVLink---&gt;: Grace :&lt;--NVLink--&gt;: GPU : *</div><div class='add'>+   *  :     :    C2C     :  SoC  : *          *  :  SoC  :    C2C     :     : *</div><div class='add'>+   *  :::::::            ::::::::: *          *  :::::::::            ::::::: *</div><div class='add'>+   *     |                   |     *          *      |                   |    *</div><div class='add'>+   *     |                   |     *          *      |                   |    *</div><div class='add'>+   *  &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;           &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;  *          *   &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;           &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp; *</div><div class='add'>+   *  &amp; GMEM &amp;           &amp; CMEM &amp;  *          *   &amp; CMEM &amp;           &amp; GMEM &amp; *</div><div class='add'>+   *  &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;           &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;  *          *   &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;           &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp; *</div><div class='add'>+   *                               *          *                               *</div><div class='add'>+   *********************************          *********************************</div><div class='add'>+</div><div class='add'>+   GMEM = GPU Memory (e.g. HBM)</div><div class='add'>+   CMEM = CPU Memory (e.g. LPDDR5X)</div><div class='add'>+</div><div class='add'>+  |</div><div class='add'>+  | Following table contains traffic coverage of Grace SoC PMU in socket-A:</div><div class='add'>+</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+   +--------------+-------+-----------+-----------+-----+----------+----------+</div><div class='add'>+   |              |                        Source                             |</div><div class='add'>+   +              +-------+-----------+-----------+-----+----------+----------+</div><div class='add'>+   | Destination  |       |GPU ATS    |GPU Not-ATS|     | Socket-B | Socket-B |</div><div class='add'>+   |              |PCI R/W|Translated,|Translated | CPU | CPU/PCIE1| GPU/PCIE2|</div><div class='add'>+   |              |       |EGM        |           |     |          |          |</div><div class='add'>+   +==============+=======+===========+===========+=====+==========+==========+</div><div class='add'>+   | Local        | PCIE  |NVLink-C2C0|NVLink-C2C1| SCF | SCF PMU  | CNVLink  |</div><div class='add'>+   | SYSRAM/CMEM  | PMU   |PMU        |PMU        | PMU |          | PMU      |</div><div class='add'>+   +--------------+-------+-----------+-----------+-----+----------+----------+</div><div class='add'>+   | Local GMEM   | PCIE  |    N/A    |NVLink-C2C1| SCF | SCF PMU  | CNVLink  |</div><div class='add'>+   |              | PMU   |           |PMU        | PMU |          | PMU      |</div><div class='add'>+   +--------------+-------+-----------+-----------+-----+----------+----------+</div><div class='add'>+   | Remote       | PCIE  |NVLink-C2C0|NVLink-C2C1| SCF |          |          |</div><div class='add'>+   | SYSRAM/CMEM  | PMU   |PMU        |PMU        | PMU |   N/A    |   N/A    |</div><div class='add'>+   | over CNVLink |       |           |           |     |          |          |</div><div class='add'>+   +--------------+-------+-----------+-----------+-----+----------+----------+</div><div class='add'>+   | Remote GMEM  | PCIE  |NVLink-C2C0|NVLink-C2C1| SCF |          |          |</div><div class='add'>+   | over CNVLink | PMU   |PMU        |PMU        | PMU |   N/A    |   N/A    |</div><div class='add'>+   +--------------+-------+-----------+-----------+-----+----------+----------+</div><div class='add'>+</div><div class='add'>+   PCIE1 traffic represents strongly ordered (SO) writes.</div><div class='add'>+   PCIE2 traffic represents reads and relaxed ordered (RO) writes.</div><div class='add'>+</div><div class='add'>+* **NVIDIA Grace CPU Superchip**: two Grace CPU SoCs are connected.</div><div class='add'>+</div><div class='add'>+  Example configuration with two Grace SoCs::</div><div class='add'>+</div><div class='add'>+   *******************             *******************</div><div class='add'>+   * SOCKET-A        *             * SOCKET-B        *</div><div class='add'>+   *                 *             *                 *</div><div class='add'>+   *    ::::::::     *             *    ::::::::     *</div><div class='add'>+   *    : PCIE :     *             *    : PCIE :     *</div><div class='add'>+   *    ::::::::     *             *    ::::::::     *</div><div class='add'>+   *        |        *             *        |        *</div><div class='add'>+   *        |        *             *        |        *</div><div class='add'>+   *    :::::::::    *             *    :::::::::    *</div><div class='add'>+   *    :       :    *             *    :       :    *</div><div class='add'>+   *    : Grace :&lt;--------NVLink-------&gt;: Grace :    *</div><div class='add'>+   *    :  SoC  :    *     C2C     *    :  SoC  :    *</div><div class='add'>+   *    :::::::::    *             *    :::::::::    *</div><div class='add'>+   *        |        *             *        |        *</div><div class='add'>+   *        |        *             *        |        *</div><div class='add'>+   *     &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;    *             *     &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;    *</div><div class='add'>+   *     &amp; CMEM &amp;    *             *     &amp; CMEM &amp;    *</div><div class='add'>+   *     &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;    *             *     &amp;&amp;&amp;&amp;&amp;&amp;&amp;&amp;    *</div><div class='add'>+   *                 *             *                 *</div><div class='add'>+   *******************             *******************</div><div class='add'>+</div><div class='add'>+   GMEM = GPU Memory (e.g. HBM)</div><div class='add'>+   CMEM = CPU Memory (e.g. LPDDR5X)</div><div class='add'>+</div><div class='add'>+  |</div><div class='add'>+  | Following table contains traffic coverage of Grace SoC PMU in socket-A:</div><div class='add'>+</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+   +-----------------+-----------+---------+----------+-------------+</div><div class='add'>+   |                 |                      Source                  |</div><div class='add'>+   +                 +-----------+---------+----------+-------------+</div><div class='add'>+   | Destination     |           |         | Socket-B | Socket-B    |</div><div class='add'>+   |                 |  PCI R/W  |   CPU   | CPU/PCIE1| PCIE2       |</div><div class='add'>+   |                 |           |         |          |             |</div><div class='add'>+   +=================+===========+=========+==========+=============+</div><div class='add'>+   | Local           |  PCIE PMU | SCF PMU | SCF PMU  | NVLink-C2C0 |</div><div class='add'>+   | SYSRAM/CMEM     |           |         |          | PMU         |</div><div class='add'>+   +-----------------+-----------+---------+----------+-------------+</div><div class='add'>+   | Remote          |           |         |          |             |</div><div class='add'>+   | SYSRAM/CMEM     |  PCIE PMU | SCF PMU |   N/A    |     N/A     |</div><div class='add'>+   | over NVLink-C2C |           |         |          |             |</div><div class='add'>+   +-----------------+-----------+---------+----------+-------------+</div><div class='add'>+</div><div class='add'>+   PCIE1 traffic represents strongly ordered (SO) writes.</div><div class='add'>+   PCIE2 traffic represents reads and relaxed ordered (RO) writes.</div><div class='head'>diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst<br/>index 83b58eb4ab4d..1cf40f69278c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/amd-pstate.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/pm/amd-pstate.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/amd-pstate.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/pm/amd-pstate.rst</a></div><div class='hunk'>@@ -182,6 +182,7 @@ to the ``struct sugov_cpu`` that the utilization update belongs to.</div><div class='ctx'> Then, ``amd-pstate`` updates the desired performance according to the CPU</div><div class='ctx'> scheduler assigned.</div><div class='ctx'> </div><div class='add'>+.. _processor_support:</div><div class='ctx'> </div><div class='ctx'> Processor Support</div><div class='ctx'> =======================</div><div class='hunk'>@@ -229,8 +230,8 @@ with :c:macro:`MSR_AMD_CPPC_ENABLE` or ``cppc_set_enable``, it will respond</div><div class='ctx'> to the request from AMD P-States.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-User Space Interface in ``sysfs``</div><div class='del'>-==================================</div><div class='add'>+User Space Interface in ``sysfs`` - Per-policy control</div><div class='add'>+======================================================</div><div class='ctx'> </div><div class='ctx'> ``amd-pstate`` exposes several global attributes (files) in ``sysfs`` to</div><div class='ctx'> control its functionality at the system level. They are located in the</div><div class='hunk'>@@ -261,6 +262,25 @@ lowest non-linear performance in `AMD CPPC Performance Capability</div><div class='ctx'> &lt;perf_cap_&gt;`_.)</div><div class='ctx'> This attribute is read-only.</div><div class='ctx'> </div><div class='add'>+``energy_performance_available_preferences``</div><div class='add'>+</div><div class='add'>+A list of all the supported EPP preferences that could be used for</div><div class='add'>+``energy_performance_preference`` on this system.</div><div class='add'>+These profiles represent different hints that are provided</div><div class='add'>+to the low-level firmware about the user's desired energy vs efficiency</div><div class='add'>+tradeoff.  ``default`` represents the epp value is set by platform</div><div class='add'>+firmware. This attribute is read-only.</div><div class='add'>+</div><div class='add'>+``energy_performance_preference``</div><div class='add'>+</div><div class='add'>+The current energy performance preference can be read from this attribute.</div><div class='add'>+and user can change current preference according to energy or performance needs</div><div class='add'>+Please get all support profiles list from</div><div class='add'>+``energy_performance_available_preferences`` attribute, all the profiles are</div><div class='add'>+integer values defined between 0 to 255 when EPP feature is enabled by platform</div><div class='add'>+firmware, if EPP feature is disabled, driver will ignore the written value</div><div class='add'>+This attribute is read-write.</div><div class='add'>+</div><div class='ctx'> Other performance and frequency values can be read back from</div><div class='ctx'> ``/sys/devices/system/cpu/cpuX/acpi_cppc/``, see :ref:`cppc_sysfs`.</div><div class='ctx'> </div><div class='hunk'>@@ -279,25 +299,91 @@ module which supports the new AMD P-States mechanism on most of the future AMD</div><div class='ctx'> platforms. The AMD P-States mechanism is the more performance and energy</div><div class='ctx'> efficiency frequency management method on AMD processors.</div><div class='ctx'> </div><div class='del'>-Kernel Module Options for ``amd-pstate``</div><div class='del'>-=========================================</div><div class='ctx'> </div><div class='del'>-``shared_mem``</div><div class='del'>-Use a module param (shared_mem) to enable related processors manually with</div><div class='del'>-**amd_pstate.shared_mem=1**.</div><div class='del'>-Due to the performance issue on the processors with `Shared Memory Support</div><div class='del'>-&lt;perf_cap_&gt;`_, we disable it presently and will re-enable this by default</div><div class='del'>-once we address performance issue with this solution.</div><div class='add'>+AMD Pstate Driver Operation Modes</div><div class='add'>+=================================</div><div class='add'>+</div><div class='add'>+``amd_pstate`` CPPC has 3 operation modes: autonomous (active) mode,</div><div class='add'>+non-autonomous (passive) mode and guided autonomous (guided) mode.</div><div class='add'>+Active/passive/guided mode can be chosen by different kernel parameters.</div><div class='add'>+</div><div class='add'>+- In autonomous mode, platform ignores the desired performance level request</div><div class='add'>+  and takes into account only the values set to the minimum, maximum and energy</div><div class='add'>+  performance preference registers.</div><div class='add'>+- In non-autonomous mode, platform gets desired performance level</div><div class='add'>+  from OS directly through Desired Performance Register.</div><div class='add'>+- In guided-autonomous mode, platform sets operating performance level</div><div class='add'>+  autonomously according to the current workload and within the limits set by</div><div class='add'>+  OS through min and max performance registers.</div><div class='add'>+</div><div class='add'>+Active Mode</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+``amd_pstate=active``</div><div class='ctx'> </div><div class='del'>-To check whether the current processor is using `Full MSR Support &lt;perf_cap_&gt;`_</div><div class='del'>-or `Shared Memory Support &lt;perf_cap_&gt;`_ : ::</div><div class='add'>+This is the low-level firmware control mode which is implemented by ``amd_pstate_epp``</div><div class='add'>+driver with ``amd_pstate=active`` passed to the kernel in the command line.</div><div class='add'>+In this mode, ``amd_pstate_epp`` driver provides a hint to the hardware if software</div><div class='add'>+wants to bias toward performance (0x0) or energy efficiency (0xff) to the CPPC firmware.</div><div class='add'>+then CPPC power algorithm will calculate the runtime workload and adjust the realtime</div><div class='add'>+cores frequency according to the power supply and thermal, core voltage and some other</div><div class='add'>+hardware conditions.</div><div class='ctx'> </div><div class='del'>-  ray@hr-test1:~$ lscpu | grep cppc</div><div class='del'>-  Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd cppc arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm</div><div class='add'>+Passive Mode</div><div class='add'>+------------</div><div class='ctx'> </div><div class='del'>-If the CPU flags have ``cppc``, then this processor supports `Full MSR Support</div><div class='del'>-&lt;perf_cap_&gt;`_. Otherwise, it supports `Shared Memory Support &lt;perf_cap_&gt;`_.</div><div class='add'>+``amd_pstate=passive``</div><div class='ctx'> </div><div class='add'>+It will be enabled if the ``amd_pstate=passive`` is passed to the kernel in the command line.</div><div class='add'>+In this mode, ``amd_pstate`` driver software specifies a desired QoS target in the CPPC</div><div class='add'>+performance scale as a relative number. This can be expressed as percentage of nominal</div><div class='add'>+performance (infrastructure max). Below the nominal sustained performance level,</div><div class='add'>+desired performance expresses the average performance level of the processor subject</div><div class='add'>+to the Performance Reduction Tolerance register. Above the nominal performance level,</div><div class='add'>+processor must provide at least nominal performance requested and go higher if current</div><div class='add'>+operating conditions allow.</div><div class='add'>+</div><div class='add'>+Guided Mode</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+``amd_pstate=guided``</div><div class='add'>+</div><div class='add'>+If ``amd_pstate=guided`` is passed to kernel command line option then this mode</div><div class='add'>+is activated.  In this mode, driver requests minimum and maximum performance</div><div class='add'>+level and the platform autonomously selects a performance level in this range</div><div class='add'>+and appropriate to the current workload.</div><div class='add'>+</div><div class='add'>+User Space Interface in ``sysfs`` - General</div><div class='add'>+===========================================</div><div class='add'>+</div><div class='add'>+Global Attributes</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+``amd-pstate`` exposes several global attributes (files) in ``sysfs`` to</div><div class='add'>+control its functionality at the system level.  They are located in the</div><div class='add'>+``/sys/devices/system/cpu/amd-pstate/`` directory and affect all CPUs.</div><div class='add'>+</div><div class='add'>+``status``</div><div class='add'>+	Operation mode of the driver: "active", "passive" or "disable".</div><div class='add'>+</div><div class='add'>+	"active"</div><div class='add'>+		The driver is functional and in the ``active mode``</div><div class='add'>+</div><div class='add'>+	"passive"</div><div class='add'>+		The driver is functional and in the ``passive mode``</div><div class='add'>+</div><div class='add'>+	"guided"</div><div class='add'>+		The driver is functional and in the ``guided mode``</div><div class='add'>+</div><div class='add'>+	"disable"</div><div class='add'>+		The driver is unregistered and not functional now.</div><div class='add'>+</div><div class='add'>+        This attribute can be written to in order to change the driver's</div><div class='add'>+        operation mode or to unregister it.  The string written to it must be</div><div class='add'>+        one of the possible values of it and, if successful, writing one of</div><div class='add'>+        these values to the sysfs file will cause the driver to switch over</div><div class='add'>+        to the operation mode represented by that string - or to be</div><div class='add'>+        unregistered in the "disable" case.</div><div class='ctx'> </div><div class='ctx'> ``cpupower`` tool support for ``amd-pstate``</div><div class='ctx'> ===============================================</div><div class='hunk'>@@ -393,6 +479,230 @@ about part of the output. ::</div><div class='ctx'>  CPU_005     712          116384        39        49        166       0.7565  9645075 2214891 38431470  25.1   11.646       469         2.496         kworker/5:0-40</div><div class='ctx'>  CPU_006     712          116408        39        49        166       0.6769  8950227 1839034 37192089  24.06  11.272       470         2.496         kworker/6:0-1264</div><div class='ctx'> </div><div class='add'>+Unit Tests for amd-pstate</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+``amd-pstate-ut`` is a test module for testing the ``amd-pstate`` driver.</div><div class='add'>+</div><div class='add'>+ * It can help all users to verify their processor support (SBIOS/Firmware or Hardware).</div><div class='add'>+</div><div class='add'>+ * Kernel can have a basic function test to avoid the kernel regression during the update.</div><div class='add'>+</div><div class='add'>+ * We can introduce more functional or performance tests to align the result together, it will benefit power and performance scale optimization.</div><div class='add'>+</div><div class='add'>+1. Test case descriptions</div><div class='add'>+</div><div class='add'>+    1). Basic tests</div><div class='add'>+</div><div class='add'>+        Test prerequisite and basic functions for the ``amd-pstate`` driver.</div><div class='add'>+</div><div class='add'>+        +---------+--------------------------------+------------------------------------------------------------------------------------+</div><div class='add'>+        | Index   | Functions                      | Description                                                                        |</div><div class='add'>+        +=========+================================+====================================================================================+</div><div class='add'>+        | 1       | amd_pstate_ut_acpi_cpc_valid   || Check whether the _CPC object is present in SBIOS.                                |</div><div class='add'>+        |         |                                ||                                                                                   |</div><div class='add'>+        |         |                                || The detail refer to `Processor Support &lt;processor_support_&gt;`_.                    |</div><div class='add'>+        +---------+--------------------------------+------------------------------------------------------------------------------------+</div><div class='add'>+        | 2       | amd_pstate_ut_check_enabled    || Check whether AMD P-State is enabled.                                             |</div><div class='add'>+        |         |                                ||                                                                                   |</div><div class='add'>+        |         |                                || AMD P-States and ACPI hardware P-States always can be supported in one processor. |</div><div class='add'>+        |         |                                | But AMD P-States has the higher priority and if it is enabled with                 |</div><div class='add'>+        |         |                                | :c:macro:`MSR_AMD_CPPC_ENABLE` or ``cppc_set_enable``, it will respond to the      |</div><div class='add'>+        |         |                                | request from AMD P-States.                                                         |</div><div class='add'>+        +---------+--------------------------------+------------------------------------------------------------------------------------+</div><div class='add'>+        | 3       | amd_pstate_ut_check_perf       || Check if the each performance values are reasonable.                              |</div><div class='add'>+        |         |                                || highest_perf &gt;= nominal_perf &gt; lowest_nonlinear_perf &gt; lowest_perf &gt; 0.           |</div><div class='add'>+        +---------+--------------------------------+------------------------------------------------------------------------------------+</div><div class='add'>+        | 4       | amd_pstate_ut_check_freq       || Check if the each frequency values and max freq when set support boost mode       |</div><div class='add'>+        |         |                                | are reasonable.                                                                    |</div><div class='add'>+        |         |                                || max_freq &gt;= nominal_freq &gt; lowest_nonlinear_freq &gt; min_freq &gt; 0                   |</div><div class='add'>+        |         |                                || If boost is not active but supported, this maximum frequency will be larger than  |</div><div class='add'>+        |         |                                | the one in ``cpuinfo``.                                                            |</div><div class='add'>+        +---------+--------------------------------+------------------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+    2). Tbench test</div><div class='add'>+</div><div class='add'>+        Test and monitor the cpu changes when running tbench benchmark under the specified governor.</div><div class='add'>+        These changes include desire performance, frequency, load, performance, energy etc.</div><div class='add'>+        The specified governor is ondemand or schedutil.</div><div class='add'>+        Tbench can also be tested on the ``acpi-cpufreq`` kernel driver for comparison.</div><div class='add'>+</div><div class='add'>+    3). Gitsource test</div><div class='add'>+</div><div class='add'>+        Test and monitor the cpu changes when running gitsource benchmark under the specified governor.</div><div class='add'>+        These changes include desire performance, frequency, load, time, energy etc.</div><div class='add'>+        The specified governor is ondemand or schedutil.</div><div class='add'>+        Gitsource can also be tested on the ``acpi-cpufreq`` kernel driver for comparison.</div><div class='add'>+</div><div class='add'>+#. How to execute the tests</div><div class='add'>+</div><div class='add'>+   We use test module in the kselftest frameworks to implement it.</div><div class='add'>+   We create ``amd-pstate-ut`` module and tie it into kselftest.(for</div><div class='add'>+   details refer to Linux Kernel Selftests [4]_).</div><div class='add'>+</div><div class='add'>+    1). Build</div><div class='add'>+</div><div class='add'>+        + open the :c:macro:`CONFIG_X86_AMD_PSTATE` configuration option.</div><div class='add'>+        + set the :c:macro:`CONFIG_X86_AMD_PSTATE_UT` configuration option to M.</div><div class='add'>+        + make project</div><div class='add'>+        + make selftest ::</div><div class='add'>+</div><div class='add'>+            $ cd linux</div><div class='add'>+            $ make -C tools/testing/selftests</div><div class='add'>+</div><div class='add'>+        + make perf ::</div><div class='add'>+</div><div class='add'>+            $ cd tools/perf/</div><div class='add'>+            $ make</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    2). Installation &amp; Steps ::</div><div class='add'>+</div><div class='add'>+        $ make -C tools/testing/selftests install INSTALL_PATH=~/kselftest</div><div class='add'>+        $ cp tools/perf/perf /usr/bin/perf</div><div class='add'>+        $ sudo ./kselftest/run_kselftest.sh -c amd-pstate</div><div class='add'>+</div><div class='add'>+    3). Specified test case ::</div><div class='add'>+</div><div class='add'>+        $ cd ~/kselftest/amd-pstate</div><div class='add'>+        $ sudo ./run.sh -t basic</div><div class='add'>+        $ sudo ./run.sh -t tbench</div><div class='add'>+        $ sudo ./run.sh -t tbench -m acpi-cpufreq</div><div class='add'>+        $ sudo ./run.sh -t gitsource</div><div class='add'>+        $ sudo ./run.sh -t gitsource -m acpi-cpufreq</div><div class='add'>+        $ ./run.sh --help</div><div class='add'>+        ./run.sh: illegal option -- -</div><div class='add'>+        Usage: ./run.sh [OPTION...]</div><div class='add'>+                [-h &lt;help&gt;]</div><div class='add'>+                [-o &lt;output-file-for-dump&gt;]</div><div class='add'>+                [-c &lt;all: All testing,</div><div class='add'>+                     basic: Basic testing,</div><div class='add'>+                     tbench: Tbench testing,</div><div class='add'>+                     gitsource: Gitsource testing.&gt;]</div><div class='add'>+                [-t &lt;tbench time limit&gt;]</div><div class='add'>+                [-p &lt;tbench process number&gt;]</div><div class='add'>+                [-l &lt;loop times for tbench&gt;]</div><div class='add'>+                [-i &lt;amd tracer interval&gt;]</div><div class='add'>+                [-m &lt;comparative test: acpi-cpufreq&gt;]</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    4). Results</div><div class='add'>+</div><div class='add'>+        + basic</div><div class='add'>+</div><div class='add'>+         When you finish test, you will get the following log info ::</div><div class='add'>+</div><div class='add'>+          $ dmesg | grep "amd_pstate_ut" | tee log.txt</div><div class='add'>+          [12977.570663] amd_pstate_ut: 1    amd_pstate_ut_acpi_cpc_valid  success!</div><div class='add'>+          [12977.570673] amd_pstate_ut: 2    amd_pstate_ut_check_enabled   success!</div><div class='add'>+          [12977.571207] amd_pstate_ut: 3    amd_pstate_ut_check_perf      success!</div><div class='add'>+          [12977.571212] amd_pstate_ut: 4    amd_pstate_ut_check_freq      success!</div><div class='add'>+</div><div class='add'>+        + tbench</div><div class='add'>+</div><div class='add'>+         When you finish test, you will get selftest.tbench.csv and png images.</div><div class='add'>+         The selftest.tbench.csv file contains the raw data and the drop of the comparative test.</div><div class='add'>+         The png images shows the performance, energy and performan per watt of each test.</div><div class='add'>+         Open selftest.tbench.csv :</div><div class='add'>+</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + Governor                                        | Round        | Des-perf | Freq    | Load     | Performance | Energy  | Performance Per Watt |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + Unit                                            |              |          | GHz     |          | MB/s        | J       | MB/J                 |</div><div class='add'>+         +=================================================+==============+==========+=========+==========+=============+=========+======================+</div><div class='add'>+         + amd-pstate-ondemand                             | 1            |          |         |          | 2504.05     | 1563.67 | 158.5378             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand                             | 2            |          |         |          | 2243.64     | 1430.32 | 155.2941             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand                             | 3            |          |         |          | 2183.88     | 1401.32 | 154.2860             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand                             | Average      |          |         |          | 2310.52     | 1465.1  | 156.1268             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | 1            | 165.329  | 1.62257 | 99.798   | 2136.54     | 1395.26 | 151.5971             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | 2            | 166      | 1.49761 | 99.9993  | 2100.56     | 1380.5  | 150.6377             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | 3            | 166      | 1.47806 | 99.9993  | 2084.12     | 1375.76 | 149.9737             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | Average      | 165.776  | 1.53275 | 99.9322  | 2107.07     | 1383.84 | 150.7399             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | 1            |          |         |          | 2529.9      | 1564.4  | 160.0997             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | 2            |          |         |          | 2249.76     | 1432.97 | 155.4297             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | 3            |          |         |          | 2181.46     | 1406.88 | 153.5060             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | Average      |          |         |          | 2320.37     | 1468.08 | 156.4741             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | 1            |          |         |          | 2137.64     | 1385.24 | 152.7723             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | 2            |          |         |          | 2107.05     | 1372.23 | 152.0138             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | 3            |          |         |          | 2085.86     | 1365.35 | 151.2433             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | Average      |          |         |          | 2110.18     | 1374.27 | 152.0136             |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand VS acpi-cpufreq-schedutil | Comprison(%) |          |         |          | -9.0584     | -6.3899 | -2.8506              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand VS amd-pstate-schedutil     | Comprison(%) |          |         |          | 8.8053      | -5.5463 | -3.4503              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand VS amd-pstate-ondemand    | Comprison(%) |          |         |          | -0.4245     | -0.2029 | -0.2219              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil VS amd-pstate-schedutil  | Comprison(%) |          |         |          | -0.1473     | 0.6963  | -0.8378              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+---------+----------+-------------+---------+----------------------+</div><div class='add'>+</div><div class='add'>+        + gitsource</div><div class='add'>+</div><div class='add'>+         When you finish test, you will get selftest.gitsource.csv and png images.</div><div class='add'>+         The selftest.gitsource.csv file contains the raw data and the drop of the comparative test.</div><div class='add'>+         The png images shows the performance, energy and performan per watt of each test.</div><div class='add'>+         Open selftest.gitsource.csv :</div><div class='add'>+</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + Governor                                        | Round        | Des-perf | Freq     | Load     | Time        | Energy  | Performance Per Watt |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + Unit                                            |              |          | GHz      |          | s           | J       | 1/J                  |</div><div class='add'>+         +=================================================+==============+==========+==========+==========+=============+=========+======================+</div><div class='add'>+         + amd-pstate-ondemand                             | 1            | 50.119   | 2.10509  | 23.3076  | 475.69      | 865.78  | 0.001155027          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand                             | 2            | 94.8006  | 1.98771  | 56.6533  | 467.1       | 839.67  | 0.001190944          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand                             | 3            | 76.6091  | 2.53251  | 43.7791  | 467.69      | 855.85  | 0.001168429          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand                             | Average      | 73.8429  | 2.20844  | 41.2467  | 470.16      | 853.767 | 0.001171279          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | 1            | 165.919  | 1.62319  | 98.3868  | 464.17      | 866.8   | 0.001153668          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | 2            | 165.97   | 1.31309  | 99.5712  | 480.15      | 880.4   | 0.001135847          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | 3            | 165.973  | 1.28448  | 99.9252  | 481.79      | 867.02  | 0.001153375          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-schedutil                            | Average      | 165.954  | 1.40692  | 99.2944  | 475.37      | 871.407 | 0.001147569          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | 1            |          |          |          | 2379.62     | 742.96  | 0.001345967          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | 2            |          |          |          | 441.74      | 817.49  | 0.001223256          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | 3            |          |          |          | 455.48      | 820.01  | 0.001219497          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand                           | Average      |          |          |          | 425.613     | 793.487 | 0.001260260          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | 1            |          |          |          | 459.69      | 838.54  | 0.001192548          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | 2            |          |          |          | 466.55      | 830.89  | 0.001203528          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | 3            |          |          |          | 470.38      | 837.32  | 0.001194286          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil                          | Average      |          |          |          | 465.54      | 835.583 | 0.001196769          |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand VS acpi-cpufreq-schedutil | Comprison(%) |          |          |          | 9.3810      | 5.3051  | -5.0379              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + amd-pstate-ondemand VS amd-pstate-schedutil     | Comprison(%) | 124.7392 | -36.2934 | 140.7329 | 1.1081      | 2.0661  | -2.0242              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-ondemand VS amd-pstate-ondemand    | Comprison(%) |          |          |          | 10.4665     | 7.5968  | -7.0605              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='add'>+         + acpi-cpufreq-schedutil VS amd-pstate-schedutil  | Comprison(%) |          |          |          | 2.1115      | 4.2873  | -4.1110              |</div><div class='add'>+         +-------------------------------------------------+--------------+----------+----------+----------+-------------+---------+----------------------+</div><div class='ctx'> </div><div class='ctx'> Reference</div><div class='ctx'> ===========</div><div class='hunk'>@@ -405,3 +715,6 @@ Reference</div><div class='ctx'> </div><div class='ctx'> .. [3] Processor Programming Reference (PPR) for AMD Family 19h Model 51h, Revision A1 Processors</div><div class='ctx'>        https://www.amd.com/system/files/TechDocs/56569-A1-PUB.zip</div><div class='add'>+</div><div class='add'>+.. [4] Linux Kernel Selftests,</div><div class='add'>+       https://www.kernel.org/doc/html/latest/dev-tools/kselftest.html</div><div class='head'>diff --git a/Documentation/admin-guide/pm/cpuidle.rst b/Documentation/admin-guide/pm/cpuidle.rst<br/>index aec2cd2aaea7..19754beb5a4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/cpuidle.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/pm/cpuidle.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/cpuidle.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/pm/cpuidle.rst</a></div><div class='hunk'>@@ -612,8 +612,8 @@ the ``menu`` governor to be used on the systems that use the ``ladder`` governor</div><div class='ctx'> by default this way, for example.</div><div class='ctx'> </div><div class='ctx'> The other kernel command line parameters controlling CPU idle time management</div><div class='del'>-described below are only relevant for the *x86* architecture and some of</div><div class='del'>-them affect Intel processors only.</div><div class='add'>+described below are only relevant for the *x86* architecture and references</div><div class='add'>+to ``intel_idle`` affect Intel processors only.</div><div class='ctx'> </div><div class='ctx'> The *x86* architecture support code recognizes three kernel command line</div><div class='ctx'> options related to CPU idle time management: ``idle=poll``, ``idle=halt``,</div><div class='hunk'>@@ -635,10 +635,13 @@ idle, so it very well may hurt single-thread computations performance as well as</div><div class='ctx'> energy-efficiency.  Thus using it for performance reasons may not be a good idea</div><div class='ctx'> at all.]</div><div class='ctx'> </div><div class='del'>-The ``idle=nomwait`` option disables the ``intel_idle`` driver and causes</div><div class='del'>-``acpi_idle`` to be used (as long as all of the information needed by it is</div><div class='del'>-there in the system's ACPI tables), but it is not allowed to use the</div><div class='del'>-``MWAIT`` instruction of the CPUs to ask the hardware to enter idle states.</div><div class='add'>+The ``idle=nomwait`` option prevents the use of ``MWAIT`` instruction of</div><div class='add'>+the CPU to enter idle states. When this option is used, the ``acpi_idle``</div><div class='add'>+driver will use the ``HLT`` instruction instead of ``MWAIT``. On systems</div><div class='add'>+running Intel processors, this option disables the ``intel_idle`` driver</div><div class='add'>+and forces the use of the ``acpi_idle`` driver instead. Note that in either</div><div class='add'>+case, ``acpi_idle`` driver will function only if all the information needed</div><div class='add'>+by it is in the system's ACPI tables.</div><div class='ctx'> </div><div class='ctx'> In addition to the architecture-level kernel command line options affecting CPU</div><div class='ctx'> idle time management, there are parameters affecting individual ``CPUIdle``</div><div class='head'>diff --git a/Documentation/admin-guide/pm/intel-speed-select.rst b/Documentation/admin-guide/pm/intel-speed-select.rst<br/>index 0a1fbdb54bfe..a2bfb971654f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/intel-speed-select.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/pm/intel-speed-select.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/intel-speed-select.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/pm/intel-speed-select.rst</a></div><div class='hunk'>@@ -262,6 +262,28 @@ Which shows that the base frequency now increased from 2600 MHz at performance</div><div class='ctx'> level 0 to 2800 MHz at performance level 4. As a result, any workload, which can</div><div class='ctx'> use fewer CPUs, can see a boost of 200 MHz compared to performance level 0.</div><div class='ctx'> </div><div class='add'>+Changing performance level via BMC Interface</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+It is possible to change SST-PP level using out of band (OOB) agent (Via some</div><div class='add'>+remote management console, through BMC "Baseboard Management Controller"</div><div class='add'>+interface). This mode is supported from the Sapphire Rapids processor</div><div class='add'>+generation. The kernel and tool change to support this mode is added to Linux</div><div class='add'>+kernel version 5.18. To enable this feature, kernel config</div><div class='add'>+"CONFIG_INTEL_HFI_THERMAL" is required. The minimum version of the tool</div><div class='add'>+is "v1.12" to support this feature, which is part of Linux kernel version 5.18.</div><div class='add'>+</div><div class='add'>+To support such configuration, this tool can be used as a daemon. Add</div><div class='add'>+a command line option --oob::</div><div class='add'>+</div><div class='add'>+ # intel-speed-select --oob</div><div class='add'>+ Intel(R) Speed Select Technology</div><div class='add'>+ Executing on CPU model:143[0x8f]</div><div class='add'>+ OOB mode is enabled and will run as daemon</div><div class='add'>+</div><div class='add'>+In this mode the tool will online/offline CPUs based on the new performance</div><div class='add'>+level.</div><div class='add'>+</div><div class='ctx'> Check presence of other Intel(R) SST features</div><div class='ctx'> ---------------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/pm/intel_pstate.rst b/Documentation/admin-guide/pm/intel_pstate.rst<br/>index d5043cd8d2f5..bf13ad25a32f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/intel_pstate.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/pm/intel_pstate.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/pm/intel_pstate.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/pm/intel_pstate.rst</a></div><div class='hunk'>@@ -712,7 +712,7 @@ it works in the `active mode &lt;Active Mode_&gt;`_.</div><div class='ctx'> The following sequence of shell commands can be used to enable them and see</div><div class='ctx'> their output (if the kernel is generally configured to support event tracing)::</div><div class='ctx'> </div><div class='del'>- # cd /sys/kernel/debug/tracing/</div><div class='add'>+ # cd /sys/kernel/tracing/</div><div class='ctx'>  # echo 1 &gt; events/power/pstate_sample/enable</div><div class='ctx'>  # echo 1 &gt; events/power/cpu_frequency/enable</div><div class='ctx'>  # cat trace</div><div class='hunk'>@@ -732,7 +732,7 @@ The ``ftrace`` interface can be used for low-level diagnostics of</div><div class='ctx'> P-state is called, the ``ftrace`` filter can be set to</div><div class='ctx'> :c:func:`intel_pstate_set_pstate`::</div><div class='ctx'> </div><div class='del'>- # cd /sys/kernel/debug/tracing/</div><div class='add'>+ # cd /sys/kernel/tracing/</div><div class='ctx'>  # cat available_filter_functions | grep -i pstate</div><div class='ctx'>  intel_pstate_set_pstate</div><div class='ctx'>  intel_pstate_cpu_init</div><div class='head'>diff --git a/Documentation/admin-guide/quickly-build-trimmed-linux.rst b/Documentation/admin-guide/quickly-build-trimmed-linux.rst<br/>new file mode 100644<br/>index 000000000000..ff4f4cc8522b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/quickly-build-trimmed-linux.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/quickly-build-trimmed-linux.rst</a></div><div class='hunk'>@@ -0,0 +1,1092 @@</div><div class='add'>+.. SPDX-License-Identifier: (GPL-2.0+ OR CC-BY-4.0)</div><div class='add'>+.. [see the bottom of this file for redistribution information]</div><div class='add'>+</div><div class='add'>+===========================================</div><div class='add'>+How to quickly build a trimmed Linux kernel</div><div class='add'>+===========================================</div><div class='add'>+</div><div class='add'>+This guide explains how to swiftly build Linux kernels that are ideal for</div><div class='add'>+testing purposes, but perfectly fine for day-to-day use, too.</div><div class='add'>+</div><div class='add'>+The essence of the process (aka 'TL;DR')</div><div class='add'>+========================================</div><div class='add'>+</div><div class='add'>+*[If you are new to compiling Linux, ignore this TLDR and head over to the next</div><div class='add'>+section below: it contains a step-by-step guide, which is more detailed, but</div><div class='add'>+still brief and easy to follow; that guide and its accompanying reference</div><div class='add'>+section also mention alternatives, pitfalls, and additional aspects, all of</div><div class='add'>+which might be relevant for you.]*</div><div class='add'>+</div><div class='add'>+If your system uses techniques like Secure Boot, prepare it to permit starting</div><div class='add'>+self-compiled Linux kernels; install compilers and everything else needed for</div><div class='add'>+building Linux; make sure to have 12 Gigabyte free space in your home directory.</div><div class='add'>+Now run the following commands to download fresh Linux mainline sources, which</div><div class='add'>+you then use to configure, build and install your own kernel::</div><div class='add'>+</div><div class='add'>+    git clone --depth 1 -b master \</div><div class='add'>+      https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git ~/linux/</div><div class='add'>+    cd ~/linux/</div><div class='add'>+    # Hint: if you want to apply patches, do it at this point. See below for details.</div><div class='add'>+    # Hint: it's recommended to tag your build at this point. See below for details.</div><div class='add'>+    yes "" | make localmodconfig</div><div class='add'>+    # Hint: at this point you might want to adjust the build configuration; you'll</div><div class='add'>+    #   have to, if you are running Debian. See below for details.</div><div class='add'>+    make -j $(nproc --all)</div><div class='add'>+    # Note: on many commodity distributions the next command suffices, but on Arch</div><div class='add'>+    #   Linux, its derivatives, and some others it does not. See below for details.</div><div class='add'>+    command -v installkernel &amp;&amp; sudo make modules_install install</div><div class='add'>+    reboot</div><div class='add'>+</div><div class='add'>+If you later want to build a newer mainline snapshot, use these commands::</div><div class='add'>+</div><div class='add'>+    cd ~/linux/</div><div class='add'>+    git fetch --depth 1 origin</div><div class='add'>+    # Note: the next command will discard any changes you did to the code:</div><div class='add'>+    git checkout --force --detach origin/master</div><div class='add'>+    # Reminder: if you want to (re)apply patches, do it at this point.</div><div class='add'>+    # Reminder: you might want to add or modify a build tag at this point.</div><div class='add'>+    make olddefconfig</div><div class='add'>+    make -j $(nproc --all)</div><div class='add'>+    # Reminder: the next command on some distributions does not suffice.</div><div class='add'>+    command -v installkernel &amp;&amp; sudo make modules_install install</div><div class='add'>+    reboot</div><div class='add'>+</div><div class='add'>+Step-by-step guide</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+Compiling your own Linux kernel is easy in principle. There are various ways to</div><div class='add'>+do it. Which of them actually work and is the best depends on the circumstances.</div><div class='add'>+</div><div class='add'>+This guide describes a way perfectly suited for those who want to quickly</div><div class='add'>+install Linux from sources without being bothered by complicated details; the</div><div class='add'>+goal is to cover everything typically needed on mainstream Linux distributions</div><div class='add'>+running on commodity PC or server hardware.</div><div class='add'>+</div><div class='add'>+The described approach is great for testing purposes, for example to try a</div><div class='add'>+proposed fix or to check if a problem was already fixed in the latest codebase.</div><div class='add'>+Nonetheless, kernels built this way are also totally fine for day-to-day use</div><div class='add'>+while at the same time being easy to keep up to date.</div><div class='add'>+</div><div class='add'>+The following steps describe the important aspects of the process; a</div><div class='add'>+comprehensive reference section later explains each of them in more detail. It</div><div class='add'>+sometimes also describes alternative approaches, pitfalls, as well as errors</div><div class='add'>+that might occur at a particular point -- and how to then get things rolling</div><div class='add'>+again.</div><div class='add'>+</div><div class='add'>+..</div><div class='add'>+   Note: if you see this note, you are reading the text's source file. You</div><div class='add'>+   might want to switch to a rendered version, as it makes it a lot easier to</div><div class='add'>+   quickly look something up in the reference section and afterwards jump back</div><div class='add'>+   to where you left off. Find a the latest rendered version here:</div><div class='add'>+   https://docs.kernel.org/admin-guide/quickly-build-trimmed-linux.html</div><div class='add'>+</div><div class='add'>+.. _backup_sbs:</div><div class='add'>+</div><div class='add'>+ * Create a fresh backup and put system repair and restore tools at hand, just</div><div class='add'>+   to be prepared for the unlikely case of something going sideways.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;backup&gt;`]</div><div class='add'>+</div><div class='add'>+.. _secureboot_sbs:</div><div class='add'>+</div><div class='add'>+ * On platforms with 'Secure Boot' or similar techniques, prepare everything to</div><div class='add'>+   ensure the system will permit your self-compiled kernel to boot later. The</div><div class='add'>+   quickest and easiest way to achieve this on commodity x86 systems is to</div><div class='add'>+   disable such techniques in the BIOS setup utility; alternatively, remove</div><div class='add'>+   their restrictions through a process initiated by</div><div class='add'>+   ``mokutil --disable-validation``.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;secureboot&gt;`]</div><div class='add'>+</div><div class='add'>+.. _buildrequires_sbs:</div><div class='add'>+</div><div class='add'>+ * Install all software required to build a Linux kernel. Often you will need:</div><div class='add'>+   'bc', 'binutils' ('ld' et al.), 'bison', 'flex', 'gcc', 'git', 'openssl',</div><div class='add'>+   'pahole', 'perl', and the development headers for 'libelf' and 'openssl'. The</div><div class='add'>+   reference section shows how to quickly install those on various popular Linux</div><div class='add'>+   distributions.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;buildrequires&gt;`]</div><div class='add'>+</div><div class='add'>+.. _diskspace_sbs:</div><div class='add'>+</div><div class='add'>+ * Ensure to have enough free space for building and installing Linux. For the</div><div class='add'>+   latter 150 Megabyte in /lib/ and 100 in /boot/ are a safe bet. For storing</div><div class='add'>+   sources and build artifacts 12 Gigabyte in your home directory should</div><div class='add'>+   typically suffice. If you have less available, be sure to check the reference</div><div class='add'>+   section for the step that explains adjusting your kernels build</div><div class='add'>+   configuration: it mentions a trick that reduce the amount of required space</div><div class='add'>+   in /home/ to around 4 Gigabyte.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;diskspace&gt;`]</div><div class='add'>+</div><div class='add'>+.. _sources_sbs:</div><div class='add'>+</div><div class='add'>+ * Retrieve the sources of the Linux version you intend to build; then change</div><div class='add'>+   into the directory holding them, as all further commands in this guide are</div><div class='add'>+   meant to be executed from there.</div><div class='add'>+</div><div class='add'>+   *[Note: the following paragraphs describe how to retrieve the sources by</div><div class='add'>+   partially cloning the Linux stable git repository. This is called a shallow</div><div class='add'>+   clone. The reference section explains two alternatives:* :ref:`packaged</div><div class='add'>+   archives&lt;sources_archive&gt;` *and* :ref:`a full git clone&lt;sources_full&gt;` *;</div><div class='add'>+   prefer the latter, if downloading a lot of data does not bother you, as that</div><div class='add'>+   will avoid some* :ref:`peculiar characteristics of shallow clones the</div><div class='add'>+   reference section explains&lt;sources_shallow&gt;` *.]*</div><div class='add'>+</div><div class='add'>+   First, execute the following command to retrieve a fresh mainline codebase::</div><div class='add'>+</div><div class='add'>+     git clone --no-checkout --depth 1 -b master \</div><div class='add'>+       https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git ~/linux/</div><div class='add'>+     cd ~/linux/</div><div class='add'>+</div><div class='add'>+   If you want to access recent mainline releases and pre-releases, deepen you</div><div class='add'>+   clone's history to the oldest mainline version you are interested in::</div><div class='add'>+</div><div class='add'>+     git fetch --shallow-exclude=v6.0 origin</div><div class='add'>+</div><div class='add'>+   In case you want to access a stable/longterm release (say v6.1.5), simply add</div><div class='add'>+   the branch holding that series; afterwards fetch the history at least up to</div><div class='add'>+   the mainline version that started the series (v6.1)::</div><div class='add'>+</div><div class='add'>+     git remote set-branches --add origin linux-6.1.y</div><div class='add'>+     git fetch --shallow-exclude=v6.0 origin</div><div class='add'>+</div><div class='add'>+   Now checkout the code you are interested in. If you just performed the</div><div class='add'>+   initial clone, you will be able to check out a fresh mainline codebase, which</div><div class='add'>+   is ideal for checking whether developers already fixed an issue::</div><div class='add'>+</div><div class='add'>+      git checkout --detach origin/master</div><div class='add'>+</div><div class='add'>+   If you deepened your clone, you instead of ``origin/master`` can specify the</div><div class='add'>+   version you deepened to (``v6.0`` above); later releases like ``v6.1`` and</div><div class='add'>+   pre-release like ``v6.2-rc1`` will work, too. Stable or longterm versions</div><div class='add'>+   like ``v6.1.5`` work just the same, if you added the appropriate</div><div class='add'>+   stable/longterm branch as described.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;sources&gt;`]</div><div class='add'>+</div><div class='add'>+.. _patching_sbs:</div><div class='add'>+</div><div class='add'>+ * In case you want to apply a kernel patch, do so now. Often a command like</div><div class='add'>+   this will do the trick::</div><div class='add'>+</div><div class='add'>+     patch -p1 &lt; ../proposed-fix.patch</div><div class='add'>+</div><div class='add'>+   If the ``-p1`` is actually needed, depends on how the patch was created; in</div><div class='add'>+   case it does not apply thus try without it.</div><div class='add'>+</div><div class='add'>+   If you cloned the sources with git and anything goes sideways, run ``git</div><div class='add'>+   reset --hard`` to undo any changes to the sources.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;patching&gt;`]</div><div class='add'>+</div><div class='add'>+.. _tagging_sbs:</div><div class='add'>+</div><div class='add'>+ * If you patched your kernel or have one of the same version installed already,</div><div class='add'>+   better add a unique tag to the one you are about to build::</div><div class='add'>+</div><div class='add'>+     echo "-proposed_fix" &gt; localversion</div><div class='add'>+</div><div class='add'>+   Running ``uname -r`` under your kernel later will then print something like</div><div class='add'>+   '6.1-rc4-proposed_fix'.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;tagging&gt;`]</div><div class='add'>+</div><div class='add'>+ .. _configuration_sbs:</div><div class='add'>+</div><div class='add'>+ * Create the build configuration for your kernel based on an existing</div><div class='add'>+   configuration.</div><div class='add'>+</div><div class='add'>+   If you already prepared such a '.config' file yourself, copy it to</div><div class='add'>+   ~/linux/ and run ``make olddefconfig``.</div><div class='add'>+</div><div class='add'>+   Use the same command, if your distribution or somebody else already tailored</div><div class='add'>+   your running kernel to your or your hardware's needs: the make target</div><div class='add'>+   'olddefconfig' will then try to use that kernel's .config as base.</div><div class='add'>+</div><div class='add'>+   Using this make target is fine for everybody else, too -- but you often can</div><div class='add'>+   save a lot of time by using this command instead::</div><div class='add'>+</div><div class='add'>+     yes "" | make localmodconfig</div><div class='add'>+</div><div class='add'>+   This will try to pick your distribution's kernel as base, but then disable</div><div class='add'>+   modules for any features apparently superfluous for your setup. This will</div><div class='add'>+   reduce the compile time enormously, especially if you are running an</div><div class='add'>+   universal kernel from a commodity Linux distribution.</div><div class='add'>+</div><div class='add'>+   There is a catch: the make target 'localmodconfig' will disable kernel</div><div class='add'>+   features you have not directly or indirectly through some program utilized</div><div class='add'>+   since you booted the system. You can reduce or nearly eliminate that risk by</div><div class='add'>+   using tricks outlined in the reference section; for quick testing purposes</div><div class='add'>+   that risk is often negligible, but it is an aspect you want to keep in mind</div><div class='add'>+   in case your kernel behaves oddly.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;configuration&gt;`]</div><div class='add'>+</div><div class='add'>+.. _configmods_sbs:</div><div class='add'>+</div><div class='add'>+ * Check if you might want to or have to adjust some kernel configuration</div><div class='add'>+   options:</div><div class='add'>+</div><div class='add'>+  * Evaluate how you want to handle debug symbols. Enable them, if you later</div><div class='add'>+    might need to decode a stack trace found for example in a 'panic', 'Oops',</div><div class='add'>+    'warning', or 'BUG'; on the other hand disable them, if you are short on</div><div class='add'>+    storage space or prefer a smaller kernel binary. See the reference section</div><div class='add'>+    for details on how to do either. If neither applies, it will likely be fine</div><div class='add'>+    to simply not bother with this. [:ref:`details&lt;configmods_debugsymbols&gt;`]</div><div class='add'>+</div><div class='add'>+  * Are you running Debian? Then to avoid known problems by performing</div><div class='add'>+    additional adjustments explained in the reference section.</div><div class='add'>+    [:ref:`details&lt;configmods_distros&gt;`].</div><div class='add'>+</div><div class='add'>+  * If you want to influence the other aspects of the configuration, do so now</div><div class='add'>+    by using make targets like 'menuconfig' or 'xconfig'.</div><div class='add'>+    [:ref:`details&lt;configmods_individual&gt;`].</div><div class='add'>+</div><div class='add'>+.. _build_sbs:</div><div class='add'>+</div><div class='add'>+ * Build the image and the modules of your kernel::</div><div class='add'>+</div><div class='add'>+     make -j $(nproc --all)</div><div class='add'>+</div><div class='add'>+   If you want your kernel packaged up as deb, rpm, or tar file, see the</div><div class='add'>+   reference section for alternatives.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;build&gt;`]</div><div class='add'>+</div><div class='add'>+.. _install_sbs:</div><div class='add'>+</div><div class='add'>+ * Now install your kernel::</div><div class='add'>+</div><div class='add'>+     command -v installkernel &amp;&amp; sudo make modules_install install</div><div class='add'>+</div><div class='add'>+   Often all left for you to do afterwards is a ``reboot``, as many commodity</div><div class='add'>+   Linux distributions will then create an initramfs (also known as initrd) and</div><div class='add'>+   an entry for your kernel in your bootloader's configuration; but on some</div><div class='add'>+   distributions you have to take care of these two steps manually for reasons</div><div class='add'>+   the reference section explains.</div><div class='add'>+</div><div class='add'>+   On a few distributions like Arch Linux and its derivatives the above command</div><div class='add'>+   does nothing at all; in that case you have to manually install your kernel,</div><div class='add'>+   as outlined in the reference section.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;install&gt;`]</div><div class='add'>+</div><div class='add'>+.. _another_sbs:</div><div class='add'>+</div><div class='add'>+ * To later build another kernel you need similar steps, but sometimes slightly</div><div class='add'>+   different commands.</div><div class='add'>+</div><div class='add'>+   First, switch back into the sources tree::</div><div class='add'>+</div><div class='add'>+      cd ~/linux/</div><div class='add'>+</div><div class='add'>+   In case you want to build a version from a stable/longterm series you have</div><div class='add'>+   not used yet (say 6.2.y), tell git to track it::</div><div class='add'>+</div><div class='add'>+      git remote set-branches --add origin linux-6.2.y</div><div class='add'>+</div><div class='add'>+   Now fetch the latest upstream changes; you again need to specify the earliest</div><div class='add'>+   version you care about, as git otherwise might retrieve the entire commit</div><div class='add'>+   history::</div><div class='add'>+</div><div class='add'>+     git fetch --shallow-exclude=v6.1 origin</div><div class='add'>+</div><div class='add'>+   If you modified the sources (for example by applying a patch), you now need</div><div class='add'>+   to discard those modifications; that's because git otherwise will not be able</div><div class='add'>+   to switch to the sources of another version due to potential conflicting</div><div class='add'>+   changes::</div><div class='add'>+</div><div class='add'>+     git reset --hard</div><div class='add'>+</div><div class='add'>+   Now checkout the version you are interested in, as explained above::</div><div class='add'>+</div><div class='add'>+     git checkout --detach origin/master</div><div class='add'>+</div><div class='add'>+   At this point you might want to patch the sources again or set/modify a build</div><div class='add'>+   tag, as explained earlier; afterwards adjust the build configuration to the</div><div class='add'>+   new codebase and build your next kernel::</div><div class='add'>+</div><div class='add'>+     # reminder: if you want to apply patches, do it at this point</div><div class='add'>+     # reminder: you might want to update your build tag at this point</div><div class='add'>+     make olddefconfig</div><div class='add'>+     make -j $(nproc --all)</div><div class='add'>+</div><div class='add'>+   Install the kernel as outlined above::</div><div class='add'>+</div><div class='add'>+     command -v installkernel &amp;&amp; sudo make modules_install install</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;another&gt;`]</div><div class='add'>+</div><div class='add'>+.. _uninstall_sbs:</div><div class='add'>+</div><div class='add'>+ * Your kernel is easy to remove later, as its parts are only stored in two</div><div class='add'>+   places and clearly identifiable by the kernel's release name. Just ensure to</div><div class='add'>+   not delete the kernel you are running, as that might render your system</div><div class='add'>+   unbootable.</div><div class='add'>+</div><div class='add'>+   Start by deleting the directory holding your kernel's modules, which is named</div><div class='add'>+   after its release name -- '6.0.1-foobar' in the following example::</div><div class='add'>+</div><div class='add'>+     sudo rm -rf /lib/modules/6.0.1-foobar</div><div class='add'>+</div><div class='add'>+   Now try the following command, which on some distributions will delete all</div><div class='add'>+   other kernel files installed while also removing the kernel's entry from the</div><div class='add'>+   bootloader configuration::</div><div class='add'>+</div><div class='add'>+     command -v kernel-install &amp;&amp; sudo kernel-install -v remove 6.0.1-foobar</div><div class='add'>+</div><div class='add'>+   If that command does not output anything or fails, see the reference section;</div><div class='add'>+   do the same if any files named '*6.0.1-foobar*' remain in /boot/.</div><div class='add'>+</div><div class='add'>+   [:ref:`details&lt;uninstall&gt;`]</div><div class='add'>+</div><div class='add'>+.. _submit_improvements:</div><div class='add'>+</div><div class='add'>+Did you run into trouble following any of the above steps that is not cleared up</div><div class='add'>+by the reference section below? Or do you have ideas how to improve the text?</div><div class='add'>+Then please take a moment of your time and let the maintainer of this document</div><div class='add'>+know by email (Thorsten Leemhuis &lt;linux@leemhuis.info&gt;), ideally while CCing the</div><div class='add'>+Linux docs mailing list (linux-doc@vger.kernel.org). Such feedback is vital to</div><div class='add'>+improve this document further, which is in everybody's interest, as it will</div><div class='add'>+enable more people to master the task described here.</div><div class='add'>+</div><div class='add'>+Reference section for the step-by-step guide</div><div class='add'>+============================================</div><div class='add'>+</div><div class='add'>+This section holds additional information for each of the steps in the above</div><div class='add'>+guide.</div><div class='add'>+</div><div class='add'>+.. _backup:</div><div class='add'>+</div><div class='add'>+Prepare for emergencies</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+   *Create a fresh backup and put system repair and restore tools at hand*</div><div class='add'>+   [:ref:`... &lt;backup_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+Remember, you are dealing with computers, which sometimes do unexpected things</div><div class='add'>+-- especially if you fiddle with crucial parts like the kernel of an operating</div><div class='add'>+system. That's what you are about to do in this process. Hence, better prepare</div><div class='add'>+for something going sideways, even if that should not happen.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;backup_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _secureboot:</div><div class='add'>+</div><div class='add'>+Dealing with techniques like Secure Boot</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+   *On platforms with 'Secure Boot' or similar techniques, prepare everything to</div><div class='add'>+   ensure the system will permit your self-compiled kernel to boot later.*</div><div class='add'>+   [:ref:`... &lt;secureboot_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+Many modern systems allow only certain operating systems to start; they thus by</div><div class='add'>+default will reject booting self-compiled kernels.</div><div class='add'>+</div><div class='add'>+You ideally deal with this by making your platform trust your self-built kernels</div><div class='add'>+with the help of a certificate and signing. How to do that is not described</div><div class='add'>+here, as it requires various steps that would take the text too far away from</div><div class='add'>+its purpose; 'Documentation/admin-guide/module-signing.rst' and various web</div><div class='add'>+sides already explain this in more detail.</div><div class='add'>+</div><div class='add'>+Temporarily disabling solutions like Secure Boot is another way to make your own</div><div class='add'>+Linux boot. On commodity x86 systems it is possible to do this in the BIOS Setup</div><div class='add'>+utility; the steps to do so are not described here, as they greatly vary between</div><div class='add'>+machines.</div><div class='add'>+</div><div class='add'>+On mainstream x86 Linux distributions there is a third and universal option:</div><div class='add'>+disable all Secure Boot restrictions for your Linux environment. You can</div><div class='add'>+initiate this process by running ``mokutil --disable-validation``; this will</div><div class='add'>+tell you to create a one-time password, which is safe to write down. Now</div><div class='add'>+restart; right after your BIOS performed all self-tests the bootloader Shim will</div><div class='add'>+show a blue box with a message 'Press any key to perform MOK management'. Hit</div><div class='add'>+some key before the countdown exposes. This will open a menu and choose 'Change</div><div class='add'>+Secure Boot state' there. Shim's 'MokManager' will now ask you to enter three</div><div class='add'>+randomly chosen characters from the one-time password specified earlier. Once</div><div class='add'>+you provided them, confirm that you really want to disable the validation.</div><div class='add'>+Afterwards, permit MokManager to reboot the machine.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;secureboot_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _buildrequires:</div><div class='add'>+</div><div class='add'>+Install build requirements</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+   *Install all software required to build a Linux kernel.*</div><div class='add'>+   [:ref:`...&lt;buildrequires_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+The kernel is pretty stand-alone, but besides tools like the compiler you will</div><div class='add'>+sometimes need a few libraries to build one. How to install everything needed</div><div class='add'>+depends on your Linux distribution and the configuration of the kernel you are</div><div class='add'>+about to build.</div><div class='add'>+</div><div class='add'>+Here are a few examples what you typically need on some mainstream</div><div class='add'>+distributions:</div><div class='add'>+</div><div class='add'>+ * Debian, Ubuntu, and derivatives::</div><div class='add'>+</div><div class='add'>+     sudo apt install bc binutils bison dwarves flex gcc git make openssl \</div><div class='add'>+       pahole perl-base libssl-dev libelf-dev</div><div class='add'>+</div><div class='add'>+ * Fedora and derivatives::</div><div class='add'>+</div><div class='add'>+     sudo dnf install binutils /usr/include/{libelf.h,openssl/pkcs7.h} \</div><div class='add'>+       /usr/bin/{bc,bison,flex,gcc,git,openssl,make,perl,pahole}</div><div class='add'>+</div><div class='add'>+ * openSUSE and derivatives::</div><div class='add'>+</div><div class='add'>+     sudo zypper install bc binutils bison dwarves flex gcc git make perl-base \</div><div class='add'>+       openssl openssl-devel libelf-dev</div><div class='add'>+</div><div class='add'>+In case you wonder why these lists include openssl and its development headers:</div><div class='add'>+they are needed for the Secure Boot support, which many distributions enable in</div><div class='add'>+their kernel configuration for x86 machines.</div><div class='add'>+</div><div class='add'>+Sometimes you will need tools for compression formats like bzip2, gzip, lz4,</div><div class='add'>+lzma, lzo, xz, or zstd as well.</div><div class='add'>+</div><div class='add'>+You might need additional libraries and their development headers in case you</div><div class='add'>+perform tasks not covered in this guide. For example, zlib will be needed when</div><div class='add'>+building kernel tools from the tools/ directory; adjusting the build</div><div class='add'>+configuration with make targets like 'menuconfig' or 'xconfig' will require</div><div class='add'>+development headers for ncurses or Qt5.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;buildrequires_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _diskspace:</div><div class='add'>+</div><div class='add'>+Space requirements</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+   *Ensure to have enough free space for building and installing Linux.*</div><div class='add'>+   [:ref:`... &lt;diskspace_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+The numbers mentioned are rough estimates with a big extra charge to be on the</div><div class='add'>+safe side, so often you will need less.</div><div class='add'>+</div><div class='add'>+If you have space constraints, remember to read the reference section when you</div><div class='add'>+reach the :ref:`section about configuration adjustments' &lt;configmods&gt;`, as</div><div class='add'>+ensuring debug symbols are disabled will reduce the consumed disk space by quite</div><div class='add'>+a few gigabytes.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;diskspace_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. _sources:</div><div class='add'>+</div><div class='add'>+Download the sources</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+  *Retrieve the sources of the Linux version you intend to build.*</div><div class='add'>+  [:ref:`...&lt;sources_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+The step-by-step guide outlines how to retrieve Linux' sources using a shallow</div><div class='add'>+git clone. There is :ref:`more to tell about this method&lt;sources_shallow&gt;` and</div><div class='add'>+two alternate ways worth describing: :ref:`packaged archives&lt;sources_archive&gt;`</div><div class='add'>+and :ref:`a full git clone&lt;sources_full&gt;`. And the aspects ':ref:`wouldn't it</div><div class='add'>+be wiser to use a proper pre-release than the latest mainline code</div><div class='add'>+&lt;sources_snapshot&gt;`' and ':ref:`how to get an even fresher mainline codebase</div><div class='add'>+&lt;sources_fresher&gt;`' need elaboration, too.</div><div class='add'>+</div><div class='add'>+Note, to keep things simple the commands used in this guide store the build</div><div class='add'>+artifacts in the source tree. If you prefer to separate them, simply add</div><div class='add'>+something like ``O=~/linux-builddir/`` to all make calls; also adjust the path</div><div class='add'>+in all commands that add files or modify any generated (like your '.config').</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;sources_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _sources_shallow:</div><div class='add'>+</div><div class='add'>+Noteworthy characteristics of shallow clones</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The step-by-step guide uses a shallow clone, as it is the best solution for most</div><div class='add'>+of this document's target audience. There are a few aspects of this approach</div><div class='add'>+worth mentioning:</div><div class='add'>+</div><div class='add'>+ * This document in most places uses ``git fetch`` with ``--shallow-exclude=``</div><div class='add'>+   to specify the earliest version you care about (or to be precise: its git</div><div class='add'>+   tag). You alternatively can use the parameter ``--shallow-since=`` to specify</div><div class='add'>+   an absolute (say ``'2023-07-15'``) or relative (``'12 months'``) date to</div><div class='add'>+   define the depth of the history you want to download. As a second</div><div class='add'>+   alternative, you can also specify a certain depth explicitly with a parameter</div><div class='add'>+   like ``--depth=1``, unless you add branches for stable/longterm kernels.</div><div class='add'>+</div><div class='add'>+ * When running ``git fetch``, remember to always specify the oldest version,</div><div class='add'>+   the time you care about, or an explicit depth as shown in the step-by-step</div><div class='add'>+   guide. Otherwise you will risk downloading nearly the entire git history,</div><div class='add'>+   which will consume quite a bit of time and bandwidth while also stressing the</div><div class='add'>+   servers.</div><div class='add'>+</div><div class='add'>+   Note, you do not have to use the same version or date all the time. But when</div><div class='add'>+   you change it over time, git will deepen or flatten the history to the</div><div class='add'>+   specified point. That allows you to retrieve versions you initially thought</div><div class='add'>+   you did not need -- or it will discard the sources of older versions, for</div><div class='add'>+   example in case you want to free up some disk space. The latter will happen</div><div class='add'>+   automatically when using ``--shallow-since=`` or</div><div class='add'>+   ``--depth=``.</div><div class='add'>+</div><div class='add'>+ * Be warned, when deepening your clone you might encounter an error like</div><div class='add'>+   'fatal: error in object: unshallow cafecaca0c0dacafecaca0c0dacafecaca0c0da'.</div><div class='add'>+   In that case run ``git repack -d`` and try again``</div><div class='add'>+</div><div class='add'>+ * In case you want to revert changes from a certain version (say Linux 6.3) or</div><div class='add'>+   perform a bisection (v6.2..v6.3), better tell ``git fetch`` to retrieve</div><div class='add'>+   objects up to three versions earlier (e.g. 6.0): ``git describe`` will then</div><div class='add'>+   be able to describe most commits just like it would in a full git clone.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;sources_sbs&gt;`] [:ref:`back to section intro &lt;sources&gt;`]</div><div class='add'>+</div><div class='add'>+.. _sources_archive:</div><div class='add'>+</div><div class='add'>+Downloading the sources using a packages archive</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+People new to compiling Linux often assume downloading an archive via the</div><div class='add'>+front-page of https://kernel.org is the best approach to retrieve Linux'</div><div class='add'>+sources. It actually can be, if you are certain to build just one particular</div><div class='add'>+kernel version without changing any code. Thing is: you might be sure this will</div><div class='add'>+be the case, but in practice it often will turn out to be a wrong assumption.</div><div class='add'>+</div><div class='add'>+That's because when reporting or debugging an issue developers will often ask to</div><div class='add'>+give another version a try. They also might suggest temporarily undoing a commit</div><div class='add'>+with ``git revert`` or might provide various patches to try. Sometimes reporters</div><div class='add'>+will also be asked to use ``git bisect`` to find the change causing a problem.</div><div class='add'>+These things rely on git or are a lot easier and quicker to handle with it.</div><div class='add'>+</div><div class='add'>+A shallow clone also does not add any significant overhead. For example, when</div><div class='add'>+you use ``git clone --depth=1`` to create a shallow clone of the latest mainline</div><div class='add'>+codebase git will only retrieve a little more data than downloading the latest</div><div class='add'>+mainline pre-release (aka 'rc') via the front-page of kernel.org would.</div><div class='add'>+</div><div class='add'>+A shallow clone therefore is often the better choice. If you nevertheless want</div><div class='add'>+to use a packaged source archive, download one via kernel.org; afterwards</div><div class='add'>+extract its content to some directory and change to the subdirectory created</div><div class='add'>+during extraction. The rest of the step-by-step guide will work just fine, apart</div><div class='add'>+from things that rely on git -- but this mainly concerns the section on</div><div class='add'>+successive builds of other versions.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;sources_sbs&gt;`] [:ref:`back to section intro &lt;sources&gt;`]</div><div class='add'>+</div><div class='add'>+.. _sources_full:</div><div class='add'>+</div><div class='add'>+Downloading the sources using a full git clone</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+If downloading and storing a lot of data (~4,4 Gigabyte as of early 2023) is</div><div class='add'>+nothing that bothers you, instead of a shallow clone perform a full git clone</div><div class='add'>+instead. You then will avoid the specialties mentioned above and will have all</div><div class='add'>+versions and individual commits at hand at any time::</div><div class='add'>+</div><div class='add'>+    curl -L \</div><div class='add'>+      https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/clone.bundle \</div><div class='add'>+      -o linux-stable.git.bundle</div><div class='add'>+    git clone clone.bundle ~/linux/</div><div class='add'>+    rm linux-stable.git.bundle</div><div class='add'>+    cd ~/linux/</div><div class='add'>+    git remote set-url origin</div><div class='add'>+    https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git</div><div class='add'>+    git fetch origin</div><div class='add'>+    git checkout --detach origin/master</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;sources_sbs&gt;`] [:ref:`back to section intro &lt;sources&gt;`]</div><div class='add'>+</div><div class='add'>+.. _sources_snapshot:</div><div class='add'>+</div><div class='add'>+Proper pre-releases (RCs) vs. latest mainline</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+When cloning the sources using git and checking out origin/master, you often</div><div class='add'>+will retrieve a codebase that is somewhere between the latest and the next</div><div class='add'>+release or pre-release. This almost always is the code you want when giving</div><div class='add'>+mainline a shot: pre-releases like v6.1-rc5 are in no way special, as they do</div><div class='add'>+not get any significant extra testing before being published.</div><div class='add'>+</div><div class='add'>+There is one exception: you might want to stick to the latest mainline release</div><div class='add'>+(say v6.1) before its successor's first pre-release (v6.2-rc1) is out. That is</div><div class='add'>+because compiler errors and other problems are more likely to occur during this</div><div class='add'>+time, as mainline then is in its 'merge window': a usually two week long phase,</div><div class='add'>+in which the bulk of the changes for the next release is merged.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;sources_sbs&gt;`] [:ref:`back to section intro &lt;sources&gt;`]</div><div class='add'>+</div><div class='add'>+.. _sources_fresher:</div><div class='add'>+</div><div class='add'>+Avoiding the mainline lag</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The explanations for both the shallow clone and the full clone both retrieve the</div><div class='add'>+code from the Linux stable git repository. That makes things simpler for this</div><div class='add'>+document's audience, as it allows easy access to both mainline and</div><div class='add'>+stable/longterm releases. This approach has just one downside:</div><div class='add'>+</div><div class='add'>+Changes merged into the mainline repository are only synced to the master branch</div><div class='add'>+of the Linux stable repository  every few hours. This lag most of the time is</div><div class='add'>+not something to worry about; but in case you really need the latest code, just</div><div class='add'>+add the mainline repo as additional remote and checkout the code from there::</div><div class='add'>+</div><div class='add'>+    git remote add mainline \</div><div class='add'>+      https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git</div><div class='add'>+    git fetch mainline</div><div class='add'>+    git checkout --detach mainline/master</div><div class='add'>+</div><div class='add'>+When doing this with a shallow clone, remember to call ``git fetch`` with one</div><div class='add'>+of the parameters described earlier to limit the depth.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;sources_sbs&gt;`] [:ref:`back to section intro &lt;sources&gt;`]</div><div class='add'>+</div><div class='add'>+.. _patching:</div><div class='add'>+</div><div class='add'>+Patch the sources (optional)</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+  *In case you want to apply a kernel patch, do so now.*</div><div class='add'>+  [:ref:`...&lt;patching_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+This is the point where you might want to patch your kernel -- for example when</div><div class='add'>+a developer proposed a fix and asked you to check if it helps. The step-by-step</div><div class='add'>+guide already explains everything crucial here.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;patching_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _tagging:</div><div class='add'>+</div><div class='add'>+Tagging this kernel build (optional, often wise)</div><div class='add'>+------------------------------------------------</div><div class='add'>+</div><div class='add'>+  *If you patched your kernel or already have that kernel version installed,</div><div class='add'>+  better tag your kernel by extending its release name:*</div><div class='add'>+  [:ref:`...&lt;tagging_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+Tagging your kernel will help avoid confusion later, especially when you patched</div><div class='add'>+your kernel. Adding an individual tag will also ensure the kernel's image and</div><div class='add'>+its modules are installed in parallel to any existing kernels.</div><div class='add'>+</div><div class='add'>+There are various ways to add such a tag. The step-by-step guide realizes one by</div><div class='add'>+creating a 'localversion' file in your build directory from which the kernel</div><div class='add'>+build scripts will automatically pick up the tag. You can later change that file</div><div class='add'>+to use a different tag in subsequent builds or simply remove that file to dump</div><div class='add'>+the tag.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;tagging_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _configuration:</div><div class='add'>+</div><div class='add'>+Define the build configuration for your kernel</div><div class='add'>+----------------------------------------------</div><div class='add'>+</div><div class='add'>+  *Create the build configuration for your kernel based on an existing</div><div class='add'>+  configuration.* [:ref:`... &lt;configuration_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+There are various aspects for this steps that require a more careful</div><div class='add'>+explanation:</div><div class='add'>+</div><div class='add'>+Pitfalls when using another configuration file as base</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Make targets like localmodconfig and olddefconfig share a few common snares you</div><div class='add'>+want to be aware of:</div><div class='add'>+</div><div class='add'>+ * These targets will reuse a kernel build configuration in your build directory</div><div class='add'>+   (e.g. '~/linux/.config'), if one exists. In case you want to start from</div><div class='add'>+   scratch you thus need to delete it.</div><div class='add'>+</div><div class='add'>+ * The make targets try to find the configuration for your running kernel</div><div class='add'>+   automatically, but might choose poorly. A line like '# using defaults found</div><div class='add'>+   in /boot/config-6.0.7-250.fc36.x86_64' or 'using config:</div><div class='add'>+   '/boot/config-6.0.7-250.fc36.x86_64' tells you which file they picked. If</div><div class='add'>+   that is not the intended one, simply store it as '~/linux/.config'</div><div class='add'>+   before using these make targets.</div><div class='add'>+</div><div class='add'>+ * Unexpected things might happen if you try to use a config file prepared for</div><div class='add'>+   one kernel (say v6.0) on an older generation (say v5.15). In that case you</div><div class='add'>+   might want to use a configuration as base which your distribution utilized</div><div class='add'>+   when they used that or an slightly older kernel version.</div><div class='add'>+</div><div class='add'>+Influencing the configuration</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The make target olddefconfig and the ``yes "" |`` used when utilizing</div><div class='add'>+localmodconfig will set any undefined build options to their default value. This</div><div class='add'>+among others will disable many kernel features that were introduced after your</div><div class='add'>+base kernel was released.</div><div class='add'>+</div><div class='add'>+If you want to set these configurations options manually, use ``oldconfig``</div><div class='add'>+instead of ``olddefconfig`` or omit the ``yes "" |`` when utilizing</div><div class='add'>+localmodconfig. Then for each undefined configuration option you will be asked</div><div class='add'>+how to proceed. In case you are unsure what to answer, simply hit 'enter' to</div><div class='add'>+apply the default value.</div><div class='add'>+</div><div class='add'>+Big pitfall when using localmodconfig</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+As explained briefly in the step-by-step guide already: with localmodconfig it</div><div class='add'>+can easily happen that your self-built kernel will lack modules for tasks you</div><div class='add'>+did not perform before utilizing this make target. That's because those tasks</div><div class='add'>+require kernel modules that are normally autoloaded when you perform that task</div><div class='add'>+for the first time; if you didn't perform that task at least once before using</div><div class='add'>+localmodonfig, the latter will thus assume these modules are superfluous and</div><div class='add'>+disable them.</div><div class='add'>+</div><div class='add'>+You can try to avoid this by performing typical tasks that often will autoload</div><div class='add'>+additional kernel modules: start a VM, establish VPN connections, loop-mount a</div><div class='add'>+CD/DVD ISO, mount network shares (CIFS, NFS, ...), and connect all external</div><div class='add'>+devices (2FA keys, headsets, webcams, ...) as well as storage devices with file</div><div class='add'>+systems you otherwise do not utilize (btrfs, ext4, FAT, NTFS, XFS, ...). But it</div><div class='add'>+is hard to think of everything that might be needed -- even kernel developers</div><div class='add'>+often forget one thing or another at this point.</div><div class='add'>+</div><div class='add'>+Do not let that risk bother you, especially when compiling a kernel only for</div><div class='add'>+testing purposes: everything typically crucial will be there. And if you forget</div><div class='add'>+something important you can turn on a missing feature later and quickly run the</div><div class='add'>+commands to compile and install a better kernel.</div><div class='add'>+</div><div class='add'>+But if you plan to build and use self-built kernels regularly, you might want to</div><div class='add'>+reduce the risk by recording which modules your system loads over the course of</div><div class='add'>+a few weeks. You can automate this with `modprobed-db</div><div class='add'>+&lt;https://github.com/graysky2/modprobed-db&gt;`_. Afterwards use ``LSMOD=&lt;path&gt;`` to</div><div class='add'>+point localmodconfig to the list of modules modprobed-db noticed being used::</div><div class='add'>+</div><div class='add'>+    yes "" | make LSMOD="${HOME}"/.config/modprobed.db localmodconfig</div><div class='add'>+</div><div class='add'>+Remote building with localmodconfig</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+If you want to use localmodconfig to build a kernel for another machine, run</div><div class='add'>+``lsmod &gt; lsmod_foo-machine`` on it and transfer that file to your build host.</div><div class='add'>+Now point the build scripts to the file like this: ``yes "" | make</div><div class='add'>+LSMOD=~/lsmod_foo-machine localmodconfig``. Note, in this case</div><div class='add'>+you likely want to copy a base kernel configuration from the other machine over</div><div class='add'>+as well and place it as .config in your build directory.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;configuration_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _configmods:</div><div class='add'>+</div><div class='add'>+Adjust build configuration</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+   *Check if you might want to or have to adjust some kernel configuration</div><div class='add'>+   options:*</div><div class='add'>+</div><div class='add'>+Depending on your needs you at this point might want or have to adjust some</div><div class='add'>+kernel configuration options.</div><div class='add'>+</div><div class='add'>+.. _configmods_debugsymbols:</div><div class='add'>+</div><div class='add'>+Debug symbols</div><div class='add'>+~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+   *Evaluate how you want to handle debug symbols.*</div><div class='add'>+   [:ref:`...&lt;configmods_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+Most users do not need to care about this, it's often fine to leave everything</div><div class='add'>+as it is; but you should take a closer look at this, if you might need to decode</div><div class='add'>+a stack trace or want to reduce space consumption.</div><div class='add'>+</div><div class='add'>+Having debug symbols available can be important when your kernel throws a</div><div class='add'>+'panic', 'Oops', 'warning', or 'BUG' later when running, as then you will be</div><div class='add'>+able to find the exact place where the problem occurred in the code. But</div><div class='add'>+collecting and embedding the needed debug information takes time and consumes</div><div class='add'>+quite a bit of space: in late 2022 the build artifacts for a typical x86 kernel</div><div class='add'>+configured with localmodconfig consumed around 5 Gigabyte of space with debug</div><div class='add'>+symbols, but less than 1 when they were disabled. The resulting kernel image and</div><div class='add'>+the modules are bigger as well, which increases load times.</div><div class='add'>+</div><div class='add'>+Hence, if you want a small kernel and are unlikely to decode a stack trace</div><div class='add'>+later, you might want to disable debug symbols to avoid above downsides::</div><div class='add'>+</div><div class='add'>+    ./scripts/config --file .config -d DEBUG_INFO \</div><div class='add'>+      -d DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT -d DEBUG_INFO_DWARF4 \</div><div class='add'>+      -d DEBUG_INFO_DWARF5 -e CONFIG_DEBUG_INFO_NONE</div><div class='add'>+    make olddefconfig</div><div class='add'>+</div><div class='add'>+You on the other hand definitely want to enable them, if there is a decent</div><div class='add'>+chance that you need to decode a stack trace later (as explained by 'Decode</div><div class='add'>+failure messages' in Documentation/admin-guide/tainted-kernels.rst in more</div><div class='add'>+detail)::</div><div class='add'>+</div><div class='add'>+    ./scripts/config --file .config -d DEBUG_INFO_NONE -e DEBUG_KERNEL</div><div class='add'>+      -e DEBUG_INFO -e DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT -e KALLSYMS -e KALLSYMS_ALL</div><div class='add'>+    make olddefconfig</div><div class='add'>+</div><div class='add'>+Note, many mainstream distributions enable debug symbols in their kernel</div><div class='add'>+configurations -- make targets like localmodconfig and olddefconfig thus will</div><div class='add'>+often pick that setting up.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;configmods_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _configmods_distros:</div><div class='add'>+</div><div class='add'>+Distro specific adjustments</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+   *Are you running* [:ref:`... &lt;configmods_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+The following sections help you to avoid build problems that are known to occur</div><div class='add'>+when following this guide on a few commodity distributions.</div><div class='add'>+</div><div class='add'>+**Debian:**</div><div class='add'>+</div><div class='add'>+ * Remove a stale reference to a certificate file that would cause your build to</div><div class='add'>+   fail::</div><div class='add'>+</div><div class='add'>+    ./scripts/config --file .config --set-str SYSTEM_TRUSTED_KEYS ''</div><div class='add'>+</div><div class='add'>+   Alternatively, download the needed certificate and make that configuration</div><div class='add'>+   option point to it, as `the Debian handbook explains in more detail</div><div class='add'>+   &lt;https://debian-handbook.info/browse/stable/sect.kernel-compilation.html&gt;`_</div><div class='add'>+   -- or generate your own, as explained in</div><div class='add'>+   Documentation/admin-guide/module-signing.rst.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;configmods_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _configmods_individual:</div><div class='add'>+</div><div class='add'>+Individual adjustments</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+   *If you want to influence the other aspects of the configuration, do so</div><div class='add'>+   now* [:ref:`... &lt;configmods_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+You at this point can use a command like ``make menuconfig`` to enable or</div><div class='add'>+disable certain features using a text-based user interface; to use a graphical</div><div class='add'>+configuration utilize, use the make target ``xconfig`` or ``gconfig`` instead.</div><div class='add'>+All of them require development libraries from toolkits they are based on</div><div class='add'>+(ncurses, Qt5, Gtk2); an error message will tell you if something required is</div><div class='add'>+missing.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;configmods_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _build:</div><div class='add'>+</div><div class='add'>+Build your kernel</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+  *Build the image and the modules of your kernel* [:ref:`... &lt;build_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+A lot can go wrong at this stage, but the instructions below will help you help</div><div class='add'>+yourself. Another subsection explains how to directly package your kernel up as</div><div class='add'>+deb, rpm or tar file.</div><div class='add'>+</div><div class='add'>+Dealing with build errors</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+When a build error occurs, it might be caused by some aspect of your machine's</div><div class='add'>+setup that often can be fixed quickly; other times though the problem lies in</div><div class='add'>+the code and can only be fixed by a developer. A close examination of the</div><div class='add'>+failure messages coupled with some research on the internet will often tell you</div><div class='add'>+which of the two it is. To perform such a investigation, restart the build</div><div class='add'>+process like this::</div><div class='add'>+</div><div class='add'>+    make V=1</div><div class='add'>+</div><div class='add'>+The ``V=1`` activates verbose output, which might be needed to see the actual</div><div class='add'>+error. To make it easier to spot, this command also omits the ``-j $(nproc</div><div class='add'>+--all)`` used earlier to utilize every CPU core in the system for the job -- but</div><div class='add'>+this parallelism also results in some clutter when failures occur.</div><div class='add'>+</div><div class='add'>+After a few seconds the build process should run into the error again. Now try</div><div class='add'>+to find the most crucial line describing the problem. Then search the internet</div><div class='add'>+for the most important and non-generic section of that line (say 4 to 8 words);</div><div class='add'>+avoid or remove anything that looks remotely system-specific, like your username</div><div class='add'>+or local path names like ``/home/username/linux/``. First try your regular</div><div class='add'>+internet search engine with that string, afterwards search Linux kernel mailing</div><div class='add'>+lists via `lore.kernel.org/all/ &lt;https://lore.kernel.org/all/&gt;`_.</div><div class='add'>+</div><div class='add'>+This most of the time will find something that will explain what is wrong; quite</div><div class='add'>+often one of the hits will provide a solution for your problem, too. If you</div><div class='add'>+do not find anything that matches your problem, try again from a different angle</div><div class='add'>+by modifying your search terms or using another line from the error messages.</div><div class='add'>+</div><div class='add'>+In the end, most trouble you are to run into has likely been encountered and</div><div class='add'>+reported by others already. That includes issues where the cause is not your</div><div class='add'>+system, but lies the code. If you run into one of those, you might thus find a</div><div class='add'>+solution (e.g. a patch) or workaround for your problem, too.</div><div class='add'>+</div><div class='add'>+Package your kernel up</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The step-by-step guide uses the default make targets (e.g. 'bzImage' and</div><div class='add'>+'modules' on x86) to build the image and the modules of your kernel, which later</div><div class='add'>+steps of the guide then install. You instead can also directly build everything</div><div class='add'>+and directly package it up by using one of the following targets:</div><div class='add'>+</div><div class='add'>+ * ``make -j $(nproc --all) bindeb-pkg`` to generate a deb package</div><div class='add'>+</div><div class='add'>+ * ``make -j $(nproc --all) binrpm-pkg`` to generate a rpm package</div><div class='add'>+</div><div class='add'>+ * ``make -j $(nproc --all) tarbz2-pkg`` to generate a bz2 compressed tarball</div><div class='add'>+</div><div class='add'>+This is just a selection of available make targets for this purpose, see</div><div class='add'>+``make help`` for others. You can also use these targets after running</div><div class='add'>+``make -j $(nproc --all)``, as they will pick up everything already built.</div><div class='add'>+</div><div class='add'>+If you employ the targets to generate deb or rpm packages, ignore the</div><div class='add'>+step-by-step guide's instructions on installing and removing your kernel;</div><div class='add'>+instead install and remove the packages using the package utility for the format</div><div class='add'>+(e.g. dpkg and rpm) or a package management utility build on top of them (apt,</div><div class='add'>+aptitude, dnf/yum, zypper, ...). Be aware that the packages generated using</div><div class='add'>+these two make targets are designed to work on various distributions utilizing</div><div class='add'>+those formats, they thus will sometimes behave differently than your</div><div class='add'>+distribution's kernel packages.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;build_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _install:</div><div class='add'>+</div><div class='add'>+Install your kernel</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+  *Now install your kernel* [:ref:`... &lt;install_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+What you need to do after executing the command in the step-by-step guide</div><div class='add'>+depends on the existence and the implementation of an ``installkernel``</div><div class='add'>+executable. Many commodity Linux distributions ship such a kernel installer in</div><div class='add'>+``/sbin/`` that does everything needed, hence there is nothing left for you</div><div class='add'>+except rebooting. But some distributions contain an installkernel that does</div><div class='add'>+only part of the job -- and a few lack it completely and leave all the work to</div><div class='add'>+you.</div><div class='add'>+</div><div class='add'>+If ``installkernel`` is found, the kernel's build system will delegate the</div><div class='add'>+actual installation of your kernel's image and related files to this executable.</div><div class='add'>+On almost all Linux distributions it will store the image as '/boot/vmlinuz-</div><div class='add'>+&lt;your kernel's release name&gt;' and put a 'System.map-&lt;your kernel's release</div><div class='add'>+name&gt;' alongside it. Your kernel will thus be installed in parallel to any</div><div class='add'>+existing ones, unless you already have one with exactly the same release name.</div><div class='add'>+</div><div class='add'>+Installkernel on many distributions will afterwards generate an 'initramfs'</div><div class='add'>+(often also called 'initrd'), which commodity distributions rely on for booting;</div><div class='add'>+hence be sure to keep the order of the two make targets used in the step-by-step</div><div class='add'>+guide, as things will go sideways if you install your kernel's image before its</div><div class='add'>+modules. Often installkernel will then add your kernel to the bootloader</div><div class='add'>+configuration, too. You have to take care of one or both of these tasks</div><div class='add'>+yourself, if your distributions installkernel doesn't handle them.</div><div class='add'>+</div><div class='add'>+A few distributions like Arch Linux and its derivatives totally lack an</div><div class='add'>+installkernel executable. On those just install the modules using the kernel's</div><div class='add'>+build system and then install the image and the System.map file manually::</div><div class='add'>+</div><div class='add'>+     sudo make modules_install</div><div class='add'>+     sudo install -m 0600 $(make -s image_name) /boot/vmlinuz-$(make -s kernelrelease)</div><div class='add'>+     sudo install -m 0600 System.map /boot/System.map-$(make -s kernelrelease)</div><div class='add'>+</div><div class='add'>+If your distribution boots with the help of an initramfs, now generate one for</div><div class='add'>+your kernel using the tools your distribution provides for this process.</div><div class='add'>+Afterwards add your kernel to your bootloader configuration and reboot.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;install_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _another:</div><div class='add'>+</div><div class='add'>+Another round later</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+  *To later build another kernel you need similar, but sometimes slightly</div><div class='add'>+  different commands* [:ref:`... &lt;another_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+The process to build later kernels is similar, but at some points slightly</div><div class='add'>+different. You for example do not want to use 'localmodconfig' for succeeding</div><div class='add'>+kernel builds, as you already created a trimmed down configuration you want to</div><div class='add'>+use from now on. Hence instead just use ``oldconfig`` or ``olddefconfig`` to</div><div class='add'>+adjust your build configurations to the needs of the kernel version you are</div><div class='add'>+about to build.</div><div class='add'>+</div><div class='add'>+If you created a shallow-clone with git, remember what the :ref:`section that</div><div class='add'>+explained the setup described in more detail &lt;sources&gt;`: you need to use a</div><div class='add'>+slightly different ``git fetch`` command and when switching to another series</div><div class='add'>+need to add an additional remote branch.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;another_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _uninstall:</div><div class='add'>+</div><div class='add'>+Uninstall the kernel later</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+  *All parts of your installed kernel are identifiable by its release name and</div><div class='add'>+  thus easy to remove later.* [:ref:`... &lt;uninstall_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+Do not worry installing your kernel manually and thus bypassing your</div><div class='add'>+distribution's packaging system will totally mess up your machine: all parts of</div><div class='add'>+your kernel are easy to remove later, as files are stored in two places only and</div><div class='add'>+normally identifiable by the kernel's release name.</div><div class='add'>+</div><div class='add'>+One of the two places is a directory in /lib/modules/, which holds the modules</div><div class='add'>+for each installed kernel. This directory is named after the kernel's release</div><div class='add'>+name; hence, to remove all modules for one of your kernels, simply remove its</div><div class='add'>+modules directory in /lib/modules/.</div><div class='add'>+</div><div class='add'>+The other place is /boot/, where typically one to five files will be placed</div><div class='add'>+during installation of a kernel. All of them usually contain the release name in</div><div class='add'>+their file name, but how many files and their name depends somewhat on your</div><div class='add'>+distribution's installkernel executable (:ref:`see above &lt;install&gt;`) and its</div><div class='add'>+initramfs generator. On some distributions the ``kernel-install`` command</div><div class='add'>+mentioned in the step-by-step guide will remove all of these files for you --</div><div class='add'>+and the entry for your kernel in the bootloader configuration at the same time,</div><div class='add'>+too. On others you have to take care of these steps yourself. The following</div><div class='add'>+command should interactively remove the two main files of a kernel with the</div><div class='add'>+release name '6.0.1-foobar'::</div><div class='add'>+</div><div class='add'>+    rm -i /boot/{System.map,vmlinuz}-6.0.1-foobar</div><div class='add'>+</div><div class='add'>+Now remove the belonging initramfs, which often will be called something like</div><div class='add'>+``/boot/initramfs-6.0.1-foobar.img`` or ``/boot/initrd.img-6.0.1-foobar``.</div><div class='add'>+Afterwards check for other files in /boot/ that have '6.0.1-foobar' in their</div><div class='add'>+name and delete them as well. Now remove the kernel from your bootloader's</div><div class='add'>+configuration.</div><div class='add'>+</div><div class='add'>+Note, be very careful with wildcards like '*' when deleting files or directories</div><div class='add'>+for kernels manually: you might accidentally remove files of a 6.0.11 kernel</div><div class='add'>+when all you want is to remove 6.0 or 6.0.1.</div><div class='add'>+</div><div class='add'>+[:ref:`back to step-by-step guide &lt;uninstall_sbs&gt;`]</div><div class='add'>+</div><div class='add'>+.. _faq:</div><div class='add'>+</div><div class='add'>+FAQ</div><div class='add'>+===</div><div class='add'>+</div><div class='add'>+Why does this 'how-to' not work on my system?</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+As initially stated, this guide is 'designed to cover everything typically</div><div class='add'>+needed [to build a kernel] on mainstream Linux distributions running on</div><div class='add'>+commodity PC or server hardware'. The outlined approach despite this should work</div><div class='add'>+on many other setups as well. But trying to cover every possible use-case in one</div><div class='add'>+guide would defeat its purpose, as without such a focus you would need dozens or</div><div class='add'>+hundreds of constructs along the lines of 'in case you are having &lt;insert</div><div class='add'>+machine or distro&gt;, you at this point have to do &lt;this and that&gt;</div><div class='add'>+&lt;instead|additionally&gt;'. Each of which would make the text longer, more</div><div class='add'>+complicated, and harder to follow.</div><div class='add'>+</div><div class='add'>+That being said: this of course is a balancing act. Hence, if you think an</div><div class='add'>+additional use-case is worth describing, suggest it to the maintainers of this</div><div class='add'>+document, as :ref:`described above &lt;submit_improvements&gt;`.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+..</div><div class='add'>+   end-of-content</div><div class='add'>+..</div><div class='add'>+   This document is maintained by Thorsten Leemhuis &lt;linux@leemhuis.info&gt;. If</div><div class='add'>+   you spot a typo or small mistake, feel free to let him know directly and</div><div class='add'>+   he'll fix it. You are free to do the same in a mostly informal way if you</div><div class='add'>+   want to contribute changes to the text -- but for copyright reasons please CC</div><div class='add'>+   linux-doc@vger.kernel.org and 'sign-off' your contribution as</div><div class='add'>+   Documentation/process/submitting-patches.rst explains in the section 'Sign</div><div class='add'>+   your work - the Developer's Certificate of Origin'.</div><div class='add'>+..</div><div class='add'>+   This text is available under GPL-2.0+ or CC-BY-4.0, as stated at the top</div><div class='add'>+   of the file. If you want to distribute this text under CC-BY-4.0 only,</div><div class='add'>+   please use 'The Linux kernel development community' for author attribution</div><div class='add'>+   and link this as source:</div><div class='add'>+   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/plain/Documentation/admin-guide/quickly-build-trimmed-linux.rst</div><div class='add'>+..</div><div class='add'>+   Note: Only the content of this RST file as found in the Linux kernel sources</div><div class='add'>+   is available under CC-BY-4.0, as versions of this text that were processed</div><div class='add'>+   (for example by the kernel's build system) might contain content taken from</div><div class='add'>+   files which use a more restrictive license.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/admin-guide/ras.rst b/Documentation/admin-guide/ras.rst<br/>index 7b481b2a368e..8e03751d126d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/ras.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/ras.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/ras.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/ras.rst</a></div><div class='hunk'>@@ -199,7 +199,7 @@ Architecture (MCA)\ [#f3]_.</div><div class='ctx'>   mode).</div><div class='ctx'> </div><div class='ctx'> .. [#f3] For more details about the Machine Check Architecture (MCA),</div><div class='del'>-  please read Documentation/x86/x86_64/machinecheck.rst at the Kernel tree.</div><div class='add'>+  please read Documentation/arch/x86/x86_64/machinecheck.rst at the Kernel tree.</div><div class='ctx'> </div><div class='ctx'> EDAC - Error Detection And Correction</div><div class='ctx'> *************************************</div><div class='head'>diff --git a/Documentation/admin-guide/reporting-issues.rst b/Documentation/admin-guide/reporting-issues.rst<br/>index ec62151fe672..2fd5a030235a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/reporting-issues.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/reporting-issues.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/reporting-issues.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/reporting-issues.rst</a></div><div class='hunk'>@@ -395,7 +395,7 @@ might want to be aware of; it for example explains how to add your issue to the</div><div class='ctx'> list of tracked regressions, to ensure it won't fall through the cracks.</div><div class='ctx'> </div><div class='ctx'> What qualifies as security issue is left to your judgment. Consider reading</div><div class='del'>-Documentation/admin-guide/security-bugs.rst before proceeding, as it</div><div class='add'>+Documentation/process/security-bugs.rst before proceeding, as it</div><div class='ctx'> provides additional details how to best handle security issues.</div><div class='ctx'> </div><div class='ctx'> An issue is a 'really severe problem' when something totally unacceptably bad</div><div class='hunk'>@@ -1269,7 +1269,7 @@ them when sending the report by mail. If you filed it in a bug tracker, forward</div><div class='ctx'> the report's text to these addresses; but on top of it put a small note where</div><div class='ctx'> you mention that you filed it with a link to the ticket.</div><div class='ctx'> </div><div class='del'>-See Documentation/admin-guide/security-bugs.rst for more information.</div><div class='add'>+See Documentation/process/security-bugs.rst for more information.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Duties after the report went out</div><div class='head'>diff --git a/Documentation/admin-guide/serial-console.rst b/Documentation/admin-guide/serial-console.rst<br/>index 58b32832e50a..8c8b94e54e26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/serial-console.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/serial-console.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/serial-console.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/serial-console.rst</a></div><div class='hunk'>@@ -33,8 +33,11 @@ The format of this option is::</div><div class='ctx'> 			9600n8. The maximum baudrate is 115200.</div><div class='ctx'> </div><div class='ctx'> You can specify multiple console= options on the kernel command line.</div><div class='del'>-Output will appear on all of them. The last device will be used when</div><div class='del'>-you open ``/dev/console``. So, for example::</div><div class='add'>+</div><div class='add'>+The behavior is well defined when each device type is mentioned only once.</div><div class='add'>+In this case, the output will appear on all requested consoles. And</div><div class='add'>+the last device will be used when you open ``/dev/console``.</div><div class='add'>+So, for example::</div><div class='ctx'> </div><div class='ctx'> 	console=ttyS1,9600 console=tty0</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +45,34 @@ defines that opening ``/dev/console`` will get you the current foreground</div><div class='ctx'> virtual console, and kernel messages will appear on both the VGA</div><div class='ctx'> console and the 2nd serial port (ttyS1 or COM2) at 9600 baud.</div><div class='ctx'> </div><div class='del'>-Note that you can only define one console per device type (serial, video).</div><div class='add'>+The behavior is more complicated when the same device type is defined more</div><div class='add'>+times. In this case, there are the following two rules:</div><div class='add'>+</div><div class='add'>+1. The output will appear only on the first device of each defined type.</div><div class='add'>+</div><div class='add'>+2. ``/dev/console`` will be associated with the first registered device.</div><div class='add'>+   Where the registration order depends on how kernel initializes various</div><div class='add'>+   subsystems.</div><div class='add'>+</div><div class='add'>+   This rule is used also when the last console= parameter is not used</div><div class='add'>+   for other reasons. For example, because of a typo or because</div><div class='add'>+   the hardware is not available.</div><div class='add'>+</div><div class='add'>+The result might be surprising. For example, the following two command</div><div class='add'>+lines have the same result:</div><div class='add'>+</div><div class='add'>+	console=ttyS1,9600 console=tty0 console=tty1</div><div class='add'>+	console=tty0 console=ttyS1,9600 console=tty1</div><div class='add'>+</div><div class='add'>+The kernel messages are printed only on ``tty0`` and ``ttyS1``. And</div><div class='add'>+``/dev/console`` gets associated with ``tty0``. It is because kernel</div><div class='add'>+tries to register graphical consoles before serial ones. It does it</div><div class='add'>+because of the default behavior when no console device is specified,</div><div class='add'>+see below.</div><div class='add'>+</div><div class='add'>+Note that the last ``console=tty1`` parameter still makes a difference.</div><div class='add'>+The kernel command line is used also by systemd. It would use the last</div><div class='add'>+defined ``tty1`` as the login console.</div><div class='ctx'> </div><div class='ctx'> If no console device is specified, the first device found capable of</div><div class='ctx'> acting as a system console will be used. At this time, the system</div><div class='head'>diff --git a/Documentation/admin-guide/spkguide.txt b/Documentation/admin-guide/spkguide.txt<br/>index 1265c1eab31c..74ea7f391942 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/spkguide.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/spkguide.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/spkguide.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/spkguide.txt</a></div><div class='hunk'>@@ -1105,8 +1105,8 @@ speakup load</div><div class='ctx'> Alternatively, you can add the above line to your file</div><div class='ctx'> ~/.bashrc or ~/.bash_profile.</div><div class='ctx'> </div><div class='del'>-If your system administrator ran himself the script, all the users will be able</div><div class='del'>-to change from English to the language choosed by root and do directly</div><div class='add'>+If your system administrator himself ran the script, all the users will be able</div><div class='add'>+to change from English to the language chosen by root and do directly</div><div class='ctx'> speakupconf load (or add this to the ~/.bashrc or</div><div class='ctx'> ~/.bash_profile file). If there are several languages to handle, the</div><div class='ctx'> administrator (or every user) will have to run the first steps until speakupconf</div><div class='head'>diff --git a/Documentation/admin-guide/syscall-user-dispatch.rst b/Documentation/admin-guide/syscall-user-dispatch.rst<br/>index 60314953c728..e3cfffef5a63 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/syscall-user-dispatch.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/syscall-user-dispatch.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/syscall-user-dispatch.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/syscall-user-dispatch.rst</a></div><div class='hunk'>@@ -73,6 +73,10 @@ thread-wide, without the need to invoke the kernel directly.  selector</div><div class='ctx'> can be set to SYSCALL_DISPATCH_FILTER_ALLOW or SYSCALL_DISPATCH_FILTER_BLOCK.</div><div class='ctx'> Any other value should terminate the program with a SIGSYS.</div><div class='ctx'> </div><div class='add'>+Additionally, a tasks syscall user dispatch configuration can be peeked</div><div class='add'>+and poked via the PTRACE_(GET|SET)_SYSCALL_USER_DISPATCH_CONFIG ptrace</div><div class='add'>+requests. This is useful for checkpoint/restart software.</div><div class='add'>+</div><div class='ctx'> Security Notes</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/sysctl/fs.rst b/Documentation/admin-guide/sysctl/fs.rst<br/>index 2a501c9ddc55..a321b84eccaa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/fs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/sysctl/fs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/fs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/sysctl/fs.rst</a></div><div class='hunk'>@@ -2,8 +2,6 @@</div><div class='ctx'> Documentation for /proc/sys/fs/</div><div class='ctx'> ===============================</div><div class='ctx'> </div><div class='del'>-kernel version 2.2.10</div><div class='del'>-</div><div class='ctx'> Copyright (c) 1998, 1999,  Rik van Riel &lt;riel@nl.linux.org&gt;</div><div class='ctx'> </div><div class='ctx'> Copyright (c) 2009,        Shen Feng&lt;shen@cn.fujitsu.com&gt;</div><div class='hunk'>@@ -12,58 +10,40 @@ For general info and legal blurb, please look in intro.rst.</div><div class='ctx'> </div><div class='ctx'> ------------------------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-This file contains documentation for the sysctl files in</div><div class='del'>-/proc/sys/fs/ and is valid for Linux kernel version 2.2.</div><div class='add'>+This file contains documentation for the sysctl files and directories</div><div class='add'>+in ``/proc/sys/fs/``.</div><div class='ctx'> </div><div class='ctx'> The files in this directory can be used to tune and monitor</div><div class='ctx'> miscellaneous and general things in the operation of the Linux</div><div class='del'>-kernel. Since some of the files _can_ be used to screw up your</div><div class='add'>+kernel. Since some of the files *can* be used to screw up your</div><div class='ctx'> system, it is advisable to read both documentation and source</div><div class='ctx'> before actually making adjustments.</div><div class='ctx'> </div><div class='ctx'> 1. /proc/sys/fs</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='del'>-Currently, these files are in /proc/sys/fs:</div><div class='del'>-</div><div class='del'>-- aio-max-nr</div><div class='del'>-- aio-nr</div><div class='del'>-- dentry-state</div><div class='del'>-- dquot-max</div><div class='del'>-- dquot-nr</div><div class='del'>-- file-max</div><div class='del'>-- file-nr</div><div class='del'>-- inode-max</div><div class='del'>-- inode-nr</div><div class='del'>-- inode-state</div><div class='del'>-- nr_open</div><div class='del'>-- overflowuid</div><div class='del'>-- overflowgid</div><div class='del'>-- pipe-user-pages-hard</div><div class='del'>-- pipe-user-pages-soft</div><div class='del'>-- protected_fifos</div><div class='del'>-- protected_hardlinks</div><div class='del'>-- protected_regular</div><div class='del'>-- protected_symlinks</div><div class='del'>-- suid_dumpable</div><div class='del'>-- super-max</div><div class='del'>-- super-nr</div><div class='add'>+Currently, these files might (depending on your configuration)</div><div class='add'>+show up in ``/proc/sys/fs``:</div><div class='add'>+</div><div class='add'>+.. contents:: :local:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> aio-nr &amp; aio-max-nr</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-aio-nr is the running total of the number of events specified on the</div><div class='del'>-io_setup system call for all currently active aio contexts.  If aio-nr</div><div class='del'>-reaches aio-max-nr then io_setup will fail with EAGAIN.  Note that</div><div class='del'>-raising aio-max-nr does not result in the pre-allocation or re-sizing</div><div class='del'>-of any kernel data structures.</div><div class='add'>+``aio-nr`` shows the current system-wide number of asynchronous io</div><div class='add'>+requests.  ``aio-max-nr`` allows you to change the maximum value</div><div class='add'>+``aio-nr`` can grow to.  If ``aio-nr`` reaches ``aio-nr-max`` then</div><div class='add'>+``io_setup`` will fail with ``EAGAIN``.  Note that raising</div><div class='add'>+``aio-max-nr`` does not result in the</div><div class='add'>+pre-allocation or re-sizing of any kernel data structures.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> dentry-state</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='del'>-From linux/include/linux/dcache.h::</div><div class='add'>+This file shows the values in ``struct dentry_stat``, as defined in</div><div class='add'>+``linux/include/linux/dcache.h``::</div><div class='ctx'> </div><div class='ctx'>   struct dentry_stat_t dentry_stat {</div><div class='ctx'>         int nr_dentry;</div><div class='hunk'>@@ -76,95 +56,84 @@ From linux/include/linux/dcache.h::</div><div class='ctx'> </div><div class='ctx'> Dentries are dynamically allocated and deallocated.</div><div class='ctx'> </div><div class='del'>-nr_dentry shows the total number of dentries allocated (active</div><div class='del'>-+ unused). nr_unused shows the number of dentries that are not</div><div class='add'>+``nr_dentry`` shows the total number of dentries allocated (active</div><div class='add'>++ unused). ``nr_unused shows`` the number of dentries that are not</div><div class='ctx'> actively used, but are saved in the LRU list for future reuse.</div><div class='ctx'> </div><div class='del'>-Age_limit is the age in seconds after which dcache entries</div><div class='del'>-can be reclaimed when memory is short and want_pages is</div><div class='del'>-nonzero when shrink_dcache_pages() has been called and the</div><div class='add'>+``age_limit`` is the age in seconds after which dcache entries</div><div class='add'>+can be reclaimed when memory is short and ``want_pages`` is</div><div class='add'>+nonzero when ``shrink_dcache_pages()`` has been called and the</div><div class='ctx'> dcache isn't pruned yet.</div><div class='ctx'> </div><div class='del'>-nr_negative shows the number of unused dentries that are also</div><div class='add'>+``nr_negative`` shows the number of unused dentries that are also</div><div class='ctx'> negative dentries which do not map to any files. Instead,</div><div class='ctx'> they help speeding up rejection of non-existing files provided</div><div class='ctx'> by the users.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-dquot-max &amp; dquot-nr</div><div class='del'>---------------------</div><div class='del'>-</div><div class='del'>-The file dquot-max shows the maximum number of cached disk</div><div class='del'>-quota entries.</div><div class='del'>-</div><div class='del'>-The file dquot-nr shows the number of allocated disk quota</div><div class='del'>-entries and the number of free disk quota entries.</div><div class='del'>-</div><div class='del'>-If the number of free cached disk quotas is very low and</div><div class='del'>-you have some awesome number of simultaneous system users,</div><div class='del'>-you might want to raise the limit.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> file-max &amp; file-nr</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='del'>-The value in file-max denotes the maximum number of file-</div><div class='add'>+The value in ``file-max`` denotes the maximum number of file-</div><div class='ctx'> handles that the Linux kernel will allocate. When you get lots</div><div class='ctx'> of error messages about running out of file handles, you might</div><div class='ctx'> want to increase this limit.</div><div class='ctx'> </div><div class='ctx'> Historically,the kernel was able to allocate file handles</div><div class='ctx'> dynamically, but not to free them again. The three values in</div><div class='del'>-file-nr denote the number of allocated file handles, the number</div><div class='add'>+``file-nr`` denote the number of allocated file handles, the number</div><div class='ctx'> of allocated but unused file handles, and the maximum number of</div><div class='del'>-file handles. Linux 2.6 always reports 0 as the number of free</div><div class='add'>+file handles. Linux 2.6 and later always reports 0 as the number of free</div><div class='ctx'> file handles -- this is not an error, it just means that the</div><div class='ctx'> number of allocated file handles exactly matches the number of</div><div class='ctx'> used file handles.</div><div class='ctx'> </div><div class='del'>-Attempts to allocate more file descriptors than file-max are</div><div class='del'>-reported with printk, look for "VFS: file-max limit &lt;number&gt;</div><div class='del'>-reached".</div><div class='add'>+Attempts to allocate more file descriptors than ``file-max`` are</div><div class='add'>+reported with ``printk``, look for::</div><div class='ctx'> </div><div class='add'>+  VFS: file-max limit &lt;number&gt; reached</div><div class='ctx'> </div><div class='del'>-nr_open</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-This denotes the maximum number of file-handles a process can</div><div class='del'>-allocate. Default value is 1024*1024 (1048576) which should be</div><div class='del'>-enough for most machines. Actual limit depends on RLIMIT_NOFILE</div><div class='del'>-resource limit.</div><div class='add'>+in the kernel logs.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-inode-max, inode-nr &amp; inode-state</div><div class='del'>----------------------------------</div><div class='add'>+inode-nr &amp; inode-state</div><div class='add'>+----------------------</div><div class='ctx'> </div><div class='ctx'> As with file handles, the kernel allocates the inode structures</div><div class='ctx'> dynamically, but can't free them yet.</div><div class='ctx'> </div><div class='del'>-The value in inode-max denotes the maximum number of inode</div><div class='del'>-handlers. This value should be 3-4 times larger than the value</div><div class='del'>-in file-max, since stdin, stdout and network sockets also</div><div class='del'>-need an inode struct to handle them. When you regularly run</div><div class='del'>-out of inodes, you need to increase this value.</div><div class='del'>-</div><div class='del'>-The file inode-nr contains the first two items from</div><div class='del'>-inode-state, so we'll skip to that file...</div><div class='add'>+The file ``inode-nr`` contains the first two items from</div><div class='add'>+``inode-state``, so we'll skip to that file...</div><div class='ctx'> </div><div class='del'>-Inode-state contains three actual numbers and four dummies.</div><div class='del'>-The actual numbers are, in order of appearance, nr_inodes,</div><div class='del'>-nr_free_inodes and preshrink.</div><div class='add'>+``inode-state`` contains three actual numbers and four dummies.</div><div class='add'>+The actual numbers are, in order of appearance, ``nr_inodes``,</div><div class='add'>+``nr_free_inodes`` and ``preshrink``.</div><div class='ctx'> </div><div class='del'>-Nr_inodes stands for the number of inodes the system has</div><div class='del'>-allocated, this can be slightly more than inode-max because</div><div class='del'>-Linux allocates them one pageful at a time.</div><div class='add'>+``nr_inodes`` stands for the number of inodes the system has</div><div class='add'>+allocated.</div><div class='ctx'> </div><div class='del'>-Nr_free_inodes represents the number of free inodes (?) and</div><div class='del'>-preshrink is nonzero when the nr_inodes &gt; inode-max and the</div><div class='add'>+``nr_free_inodes`` represents the number of free inodes (?) and</div><div class='add'>+preshrink is nonzero when the</div><div class='ctx'> system needs to prune the inode list instead of allocating</div><div class='ctx'> more.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+mount-max</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+This denotes the maximum number of mounts that may exist</div><div class='add'>+in a mount namespace.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+nr_open</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+This denotes the maximum number of file-handles a process can</div><div class='add'>+allocate. Default value is 1024*1024 (1048576) which should be</div><div class='add'>+enough for most machines. Actual limit depends on ``RLIMIT_NOFILE``</div><div class='add'>+resource limit.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> overflowgid &amp; overflowuid</div><div class='ctx'> -------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -192,7 +161,7 @@ pipe-user-pages-soft</div><div class='ctx'> Maximum total number of pages a non-privileged user may allocate for pipes</div><div class='ctx'> before the pipe size gets limited to a single page. Once this limit is reached,</div><div class='ctx'> new pipes will be limited to a single page in size for this user in order to</div><div class='del'>-limit total memory usage, and trying to increase them using fcntl() will be</div><div class='add'>+limit total memory usage, and trying to increase them using ``fcntl()`` will be</div><div class='ctx'> denied until usage goes below the limit again. The default value allows to</div><div class='ctx'> allocate up to 1024 pipes at their default size. When set to 0, no limit is</div><div class='ctx'> applied.</div><div class='hunk'>@@ -207,7 +176,7 @@ file.</div><div class='ctx'> </div><div class='ctx'> When set to "0", writing to FIFOs is unrestricted.</div><div class='ctx'> </div><div class='del'>-When set to "1" don't allow O_CREAT open on FIFOs that we don't own</div><div class='add'>+When set to "1" don't allow ``O_CREAT`` open on FIFOs that we don't own</div><div class='ctx'> in world writable sticky directories, unless they are owned by the</div><div class='ctx'> owner of the directory.</div><div class='ctx'> </div><div class='hunk'>@@ -221,7 +190,7 @@ protected_hardlinks</div><div class='ctx'> </div><div class='ctx'> A long-standing class of security issues is the hardlink-based</div><div class='ctx'> time-of-check-time-of-use race, most commonly seen in world-writable</div><div class='del'>-directories like /tmp. The common method of exploitation of this flaw</div><div class='add'>+directories like ``/tmp``. The common method of exploitation of this flaw</div><div class='ctx'> is to cross privilege boundaries when following a given hardlink (i.e. a</div><div class='ctx'> root process follows a hardlink created by another user). Additionally,</div><div class='ctx'> on systems without separated partitions, this stops unauthorized users</div><div class='hunk'>@@ -239,13 +208,13 @@ This protection is based on the restrictions in Openwall and grsecurity.</div><div class='ctx'> protected_regular</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='del'>-This protection is similar to protected_fifos, but it</div><div class='add'>+This protection is similar to `protected_fifos`_, but it</div><div class='ctx'> avoids writes to an attacker-controlled regular file, where a program</div><div class='ctx'> expected to create one.</div><div class='ctx'> </div><div class='ctx'> When set to "0", writing to regular files is unrestricted.</div><div class='ctx'> </div><div class='del'>-When set to "1" don't allow O_CREAT open on regular files that we</div><div class='add'>+When set to "1" don't allow ``O_CREAT`` open on regular files that we</div><div class='ctx'> don't own in world writable sticky directories, unless they are</div><div class='ctx'> owned by the owner of the directory.</div><div class='ctx'> </div><div class='hunk'>@@ -257,7 +226,7 @@ protected_symlinks</div><div class='ctx'> </div><div class='ctx'> A long-standing class of security issues is the symlink-based</div><div class='ctx'> time-of-check-time-of-use race, most commonly seen in world-writable</div><div class='del'>-directories like /tmp. The common method of exploitation of this flaw</div><div class='add'>+directories like ``/tmp``. The common method of exploitation of this flaw</div><div class='ctx'> is to cross privilege boundaries when following a given symlink (i.e. a</div><div class='ctx'> root process follows a symlink belonging to another user). For a likely</div><div class='ctx'> incomplete list of hundreds of examples across the years, please see:</div><div class='hunk'>@@ -272,23 +241,25 @@ follower match, or when the directory owner matches the symlink's owner.</div><div class='ctx'> This protection is based on the restrictions in Openwall and grsecurity.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-suid_dumpable:</div><div class='del'>---------------</div><div class='add'>+suid_dumpable</div><div class='add'>+-------------</div><div class='ctx'> </div><div class='ctx'> This value can be used to query and set the core dump mode for setuid</div><div class='ctx'> or otherwise protected/tainted binaries. The modes are</div><div class='ctx'> </div><div class='ctx'> =   ==========  ===============================================================</div><div class='del'>-0   (default)	traditional behaviour. Any process which has changed</div><div class='add'>+0   (default)	Traditional behaviour. Any process which has changed</div><div class='ctx'> 		privilege levels or is execute only will not be dumped.</div><div class='del'>-1   (debug)	all processes dump core when possible. The core dump is</div><div class='add'>+1   (debug)	All processes dump core when possible. The core dump is</div><div class='ctx'> 		owned by the current user and no security is applied. This is</div><div class='ctx'> 		intended for system debugging situations only.</div><div class='ctx'> 		Ptrace is unchecked.</div><div class='ctx'> 		This is insecure as it allows regular users to examine the</div><div class='ctx'> 		memory contents of privileged processes.</div><div class='del'>-2   (suidsafe)	any binary which normally would not be dumped is dumped</div><div class='del'>-		anyway, but only if the "core_pattern" kernel sysctl is set to</div><div class='add'>+2   (suidsafe)	Any binary which normally would not be dumped is dumped</div><div class='add'>+		anyway, but only if the ``core_pattern`` kernel sysctl (see</div><div class='add'>+		:ref:`Documentation/admin-guide/sysctl/kernel.rst &lt;core_pattern&gt;`)</div><div class='add'>+		is set to</div><div class='ctx'> 		either a pipe handler or a fully qualified path. (For more</div><div class='ctx'> 		details on this limitation, see CVE-2006-2451.) This mode is</div><div class='ctx'> 		appropriate when administrators are attempting to debug</div><div class='hunk'>@@ -301,36 +272,11 @@ or otherwise protected/tainted binaries. The modes are</div><div class='ctx'> =   ==========  ===============================================================</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-super-max &amp; super-nr</div><div class='del'>---------------------</div><div class='del'>-</div><div class='del'>-These numbers control the maximum number of superblocks, and</div><div class='del'>-thus the maximum number of mounted filesystems the kernel</div><div class='del'>-can have. You only need to increase super-max if you need to</div><div class='del'>-mount more filesystems than the current value in super-max</div><div class='del'>-allows you to.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-aio-nr &amp; aio-max-nr</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-aio-nr shows the current system-wide number of asynchronous io</div><div class='del'>-requests.  aio-max-nr allows you to change the maximum value</div><div class='del'>-aio-nr can grow to.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-mount-max</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-This denotes the maximum number of mounts that may exist</div><div class='del'>-in a mount namespace.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> 2. /proc/sys/fs/binfmt_misc</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='del'>-Documentation for the files in /proc/sys/fs/binfmt_misc is</div><div class='add'>+Documentation for the files in ``/proc/sys/fs/binfmt_misc`` is</div><div class='ctx'> in Documentation/admin-guide/binfmt-misc.rst.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -343,28 +289,32 @@ creation of a  user space  library that  implements  the  POSIX message queues</div><div class='ctx'> API (as noted by the  MSG tag in the  POSIX 1003.1-2001 version  of the System</div><div class='ctx'> Interfaces specification.)</div><div class='ctx'> </div><div class='del'>-The "mqueue" filesystem contains values for determining/setting  the amount of</div><div class='del'>-resources used by the file system.</div><div class='add'>+The "mqueue" filesystem contains values for determining/setting the</div><div class='add'>+amount of resources used by the file system.</div><div class='ctx'> </div><div class='del'>-/proc/sys/fs/mqueue/queues_max is a read/write  file for  setting/getting  the</div><div class='del'>-maximum number of message queues allowed on the system.</div><div class='add'>+``/proc/sys/fs/mqueue/queues_max`` is a read/write file for</div><div class='add'>+setting/getting the maximum number of message queues allowed on the</div><div class='add'>+system.</div><div class='ctx'> </div><div class='del'>-/proc/sys/fs/mqueue/msg_max  is  a  read/write file  for  setting/getting  the</div><div class='del'>-maximum number of messages in a queue value.  In fact it is the limiting value</div><div class='del'>-for another (user) limit which is set in mq_open invocation. This attribute of</div><div class='del'>-a queue must be less or equal then msg_max.</div><div class='add'>+``/proc/sys/fs/mqueue/msg_max`` is a read/write file for</div><div class='add'>+setting/getting the maximum number of messages in a queue value.  In</div><div class='add'>+fact it is the limiting value for another (user) limit which is set in</div><div class='add'>+``mq_open`` invocation.  This attribute of a queue must be less than</div><div class='add'>+or equal to ``msg_max``.</div><div class='ctx'> </div><div class='del'>-/proc/sys/fs/mqueue/msgsize_max is  a read/write  file for setting/getting the</div><div class='del'>-maximum  message size value (it is every  message queue's attribute set during</div><div class='del'>-its creation).</div><div class='add'>+``/proc/sys/fs/mqueue/msgsize_max`` is a read/write file for</div><div class='add'>+setting/getting the maximum message size value (it is an attribute of</div><div class='add'>+every message queue, set during its creation).</div><div class='ctx'> </div><div class='del'>-/proc/sys/fs/mqueue/msg_default is  a read/write  file for setting/getting the</div><div class='del'>-default number of messages in a queue value if attr parameter of mq_open(2) is</div><div class='del'>-NULL. If it exceed msg_max, the default value is initialized msg_max.</div><div class='add'>+``/proc/sys/fs/mqueue/msg_default`` is a read/write file for</div><div class='add'>+setting/getting the default number of messages in a queue value if the</div><div class='add'>+``attr`` parameter of ``mq_open(2)`` is ``NULL``. If it exceeds</div><div class='add'>+``msg_max``, the default value is initialized to ``msg_max``.</div><div class='ctx'> </div><div class='del'>-/proc/sys/fs/mqueue/msgsize_default is a read/write file for setting/getting</div><div class='del'>-the default message size value if attr parameter of mq_open(2) is NULL. If it</div><div class='del'>-exceed msgsize_max, the default value is initialized msgsize_max.</div><div class='add'>+``/proc/sys/fs/mqueue/msgsize_default`` is a read/write file for</div><div class='add'>+setting/getting the default message size value if the ``attr``</div><div class='add'>+parameter of ``mq_open(2)`` is ``NULL``. If it exceeds</div><div class='add'>+``msgsize_max``, the default value is initialized to ``msgsize_max``.</div><div class='ctx'> </div><div class='ctx'> 4. /proc/sys/fs/epoll - Configuration options for the epoll interface</div><div class='ctx'> =====================================================================</div><div class='hunk'>@@ -378,7 +328,7 @@ Every epoll file descriptor can store a number of files to be monitored</div><div class='ctx'> for event readiness. Each one of these monitored files constitutes a "watch".</div><div class='ctx'> This configuration option sets the maximum number of "watches" that are</div><div class='ctx'> allowed for each user.</div><div class='del'>-Each "watch" costs roughly 90 bytes on a 32bit kernel, and roughly 160 bytes</div><div class='del'>-on a 64bit one.</div><div class='del'>-The current default value for  max_user_watches  is the 1/25 (4%) of the</div><div class='del'>-available low memory, divided for the "watch" cost in bytes.</div><div class='add'>+Each "watch" costs roughly 90 bytes on a 32-bit kernel, and roughly 160 bytes</div><div class='add'>+on a 64-bit one.</div><div class='add'>+The current default value for ``max_user_watches`` is 4% of the</div><div class='add'>+available low memory, divided by the "watch" cost in bytes.</div><div class='head'>diff --git a/Documentation/admin-guide/sysctl/kernel.rst b/Documentation/admin-guide/sysctl/kernel.rst<br/>index 1144ea3229a3..d85d90f5d000 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/kernel.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/sysctl/kernel.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/kernel.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/sysctl/kernel.rst</a></div><div class='hunk'>@@ -38,8 +38,8 @@ acct</div><div class='ctx'> </div><div class='ctx'> If BSD-style process accounting is enabled these values control</div><div class='ctx'> its behaviour. If free space on filesystem where the log lives</div><div class='del'>-goes below ``lowwater``% accounting suspends. If free space gets</div><div class='del'>-above ``highwater``% accounting resumes. ``frequency`` determines</div><div class='add'>+goes below ``lowwater``\ % accounting suspends. If free space gets</div><div class='add'>+above ``highwater``\ % accounting resumes. ``frequency`` determines</div><div class='ctx'> how often do we check the amount of free space (value is in</div><div class='ctx'> seconds). Default:</div><div class='ctx'> </div><div class='hunk'>@@ -65,6 +65,11 @@ combining the following values:</div><div class='ctx'> 4 s3_beep</div><div class='ctx'> = =======</div><div class='ctx'> </div><div class='add'>+arch</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+The machine hardware name, the same output as ``uname -m``</div><div class='add'>+(e.g. ``x86_64`` or ``aarch64``).</div><div class='ctx'> </div><div class='ctx'> auto_msgmni</div><div class='ctx'> ===========</div><div class='hunk'>@@ -90,7 +95,7 @@ is 0x15 and the full version number is 0x234, this file will contain</div><div class='ctx'> the value 340 = 0x154.</div><div class='ctx'> </div><div class='ctx'> See the ``type_of_loader`` and ``ext_loader_type`` fields in</div><div class='del'>-Documentation/x86/boot.rst for additional information.</div><div class='add'>+Documentation/arch/x86/boot.rst for additional information.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> bootloader_version (x86 only)</div><div class='hunk'>@@ -100,7 +105,7 @@ The complete bootloader version number.  In the example above, this</div><div class='ctx'> file will contain the value 564 = 0x234.</div><div class='ctx'> </div><div class='ctx'> See the ``type_of_loader`` and ``ext_loader_ver`` fields in</div><div class='del'>-Documentation/x86/boot.rst for additional information.</div><div class='add'>+Documentation/arch/x86/boot.rst for additional information.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> bpf_stats_enabled</div><div class='hunk'>@@ -134,6 +139,8 @@ Highest valid capability of the running kernel.  Exports</div><div class='ctx'> ``CAP_LAST_CAP`` from the kernel.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+.. _core_pattern:</div><div class='add'>+</div><div class='ctx'> core_pattern</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='hunk'>@@ -169,6 +176,7 @@ core_pattern</div><div class='ctx'> 	%f      	executable filename</div><div class='ctx'> 	%E		executable path</div><div class='ctx'> 	%c		maximum size of core file by resource limit RLIMIT_CORE</div><div class='add'>+	%C		CPU the task ran on</div><div class='ctx'> 	%&lt;OTHER&gt;	both are dropped</div><div class='ctx'> 	========	==========================================</div><div class='ctx'> </div><div class='hunk'>@@ -428,8 +436,8 @@ ignore-unaligned-usertrap</div><div class='ctx'> </div><div class='ctx'> On architectures where unaligned accesses cause traps, and where this</div><div class='ctx'> feature is supported (``CONFIG_SYSCTL_ARCH_UNALIGN_NO_WARN``;</div><div class='del'>-currently, ``arc`` and ``ia64``), controls whether all unaligned traps</div><div class='del'>-are logged.</div><div class='add'>+currently, ``arc``, ``ia64`` and ``loongarch``), controls whether all</div><div class='add'>+unaligned traps are logged.</div><div class='ctx'> </div><div class='ctx'> = =============================================================</div><div class='ctx'> 0 Log all unaligned accesses.</div><div class='hunk'>@@ -445,9 +453,10 @@ this allows system administrators to override the</div><div class='ctx'> kexec_load_disabled</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='del'>-A toggle indicating if the ``kexec_load`` syscall has been disabled.</div><div class='del'>-This value defaults to 0 (false: ``kexec_load`` enabled), but can be</div><div class='del'>-set to 1 (true: ``kexec_load`` disabled).</div><div class='add'>+A toggle indicating if the syscalls ``kexec_load`` and</div><div class='add'>+``kexec_file_load`` have been disabled.</div><div class='add'>+This value defaults to 0 (false: ``kexec_*load`` enabled), but can be</div><div class='add'>+set to 1 (true: ``kexec_*load`` disabled).</div><div class='ctx'> Once true, kexec can no longer be used, and the toggle cannot be set</div><div class='ctx'> back to false.</div><div class='ctx'> This allows a kexec image to be loaded before disabling the syscall,</div><div class='hunk'>@@ -455,6 +464,24 @@ allowing a system to set up (and later use) an image without it being</div><div class='ctx'> altered.</div><div class='ctx'> Generally used together with the `modules_disabled`_ sysctl.</div><div class='ctx'> </div><div class='add'>+kexec_load_limit_panic</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+This parameter specifies a limit to the number of times the syscalls</div><div class='add'>+``kexec_load`` and ``kexec_file_load`` can be called with a crash</div><div class='add'>+image. It can only be set with a more restrictive value than the</div><div class='add'>+current one.</div><div class='add'>+</div><div class='add'>+== ======================================================</div><div class='add'>+-1 Unlimited calls to kexec. This is the default setting.</div><div class='add'>+N  Number of calls left.</div><div class='add'>+== ======================================================</div><div class='add'>+</div><div class='add'>+kexec_load_limit_reboot</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+Similar functionality as ``kexec_load_limit_panic``, but for a normal</div><div class='add'>+image.</div><div class='ctx'> </div><div class='ctx'> kptr_restrict</div><div class='ctx'> =============</div><div class='hunk'>@@ -592,6 +619,18 @@ to the guest kernel command line (see</div><div class='ctx'> Documentation/admin-guide/kernel-parameters.rst).</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+nmi_wd_lpm_factor (PPC only)</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+Factor to apply to the NMI watchdog timeout (only when ``nmi_watchdog`` is</div><div class='add'>+set to 1). This factor represents the percentage added to</div><div class='add'>+``watchdog_thresh`` when calculating the NMI watchdog timeout during an</div><div class='add'>+LPM. The soft lockup timeout is not impacted.</div><div class='add'>+</div><div class='add'>+A value of 0 means no change. The default value is 200 meaning the NMI</div><div class='add'>+watchdog is set to 30s (based on ``watchdog_thresh`` equal to 10).</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> numa_balancing</div><div class='ctx'> ==============</div><div class='ctx'> </div><div class='hunk'>@@ -623,6 +662,17 @@ different types of memory (represented as different NUMA nodes) to</div><div class='ctx'> place the hot pages in the fast memory.  This is implemented based on</div><div class='ctx'> unmapping and page fault too.</div><div class='ctx'> </div><div class='add'>+numa_balancing_promote_rate_limit_MBps</div><div class='add'>+======================================</div><div class='add'>+</div><div class='add'>+Too high promotion/demotion throughput between different memory types</div><div class='add'>+may hurt application latency.  This can be used to rate limit the</div><div class='add'>+promotion throughput.  The per-node max promotion throughput in MB/s</div><div class='add'>+will be limited to be no more than the set value.</div><div class='add'>+</div><div class='add'>+A rule of thumb is to set this to less than 1/10 of the PMEM node</div><div class='add'>+write bandwidth.</div><div class='add'>+</div><div class='ctx'> oops_all_cpu_backtrace</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='hunk'>@@ -639,6 +689,15 @@ This is the default behavior.</div><div class='ctx'> an oops event is detected.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+oops_limit</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+Number of kernel oopses after which the kernel should panic when</div><div class='add'>+``panic_on_oops`` is not set. Setting this to 0 disables checking</div><div class='add'>+the count. Setting this to  1 has the same effect as setting</div><div class='add'>+``panic_on_oops=1``. The default value is 10000.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> osrelease, ostype &amp; version</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='hunk'>@@ -783,6 +842,13 @@ is useful to define the root cause of RCU stalls using a vmcore.</div><div class='ctx'> 1 panic() after printing RCU stall messages.</div><div class='ctx'> = ============================================================</div><div class='ctx'> </div><div class='add'>+max_rcu_stall_to_panic</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+When ``panic_on_rcu_stall`` is set to 1, this value determines the</div><div class='add'>+number of times that RCU can stall before panic() is called.</div><div class='add'>+</div><div class='add'>+When ``panic_on_rcu_stall`` is set to 0, this value is has no effect.</div><div class='ctx'> </div><div class='ctx'> perf_cpu_time_max_percent</div><div class='ctx'> =========================</div><div class='hunk'>@@ -994,6 +1060,9 @@ This is a directory, with the following entries:</div><div class='ctx'> * ``boot_id``: a UUID generated the first time this is retrieved, and</div><div class='ctx'>   unvarying after that;</div><div class='ctx'> </div><div class='add'>+* ``uuid``: a UUID generated every time this is retrieved (this can</div><div class='add'>+  thus be used to generate UUIDs at will);</div><div class='add'>+</div><div class='ctx'> * ``entropy_avail``: the pool's entropy count, in bits;</div><div class='ctx'> </div><div class='ctx'> * ``poolsize``: the entropy pool size, in bits;</div><div class='hunk'>@@ -1001,10 +1070,7 @@ This is a directory, with the following entries:</div><div class='ctx'> * ``urandom_min_reseed_secs``: obsolete (used to determine the minimum</div><div class='ctx'>   number of seconds between urandom pool reseeding). This file is</div><div class='ctx'>   writable for compatibility purposes, but writing to it has no effect</div><div class='del'>-  on any RNG behavior.</div><div class='del'>-</div><div class='del'>-* ``uuid``: a UUID generated every time this is retrieved (this can</div><div class='del'>-  thus be used to generate UUIDs at will);</div><div class='add'>+  on any RNG behavior;</div><div class='ctx'> </div><div class='ctx'> * ``write_wakeup_threshold``: when the entropy count drops below this</div><div class='ctx'>   (as a number of bits), processes waiting to write to ``/dev/random``</div><div class='hunk'>@@ -1279,6 +1345,29 @@ watchdog work to be queued by the watchdog timer function, otherwise the NMI</div><div class='ctx'> watchdog — if enabled — can detect a hard lockup condition.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+split_lock_mitigate (x86 only)</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+On x86, each "split lock" imposes a system-wide performance penalty. On larger</div><div class='add'>+systems, large numbers of split locks from unprivileged users can result in</div><div class='add'>+denials of service to well-behaved and potentially more important users.</div><div class='add'>+</div><div class='add'>+The kernel mitigates these bad users by detecting split locks and imposing</div><div class='add'>+penalties: forcing them to wait and only allowing one core to execute split</div><div class='add'>+locks at a time.</div><div class='add'>+</div><div class='add'>+These mitigations can make those bad applications unbearably slow. Setting</div><div class='add'>+split_lock_mitigate=0 may restore some application performance, but will also</div><div class='add'>+increase system exposure to denial of service attacks from split lock users.</div><div class='add'>+</div><div class='add'>+= ===================================================================</div><div class='add'>+0 Disable the mitigation mode - just warns the split lock on kernel log</div><div class='add'>+  and exposes the system to denials of service from the split lockers.</div><div class='add'>+1 Enable the mitigation mode (this is the default) - penalizes the split</div><div class='add'>+  lockers with intentional performance degradation.</div><div class='add'>+= ===================================================================</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> stack_erasing</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='hunk'>@@ -1422,8 +1511,8 @@ unaligned-trap</div><div class='ctx'> </div><div class='ctx'> On architectures where unaligned accesses cause traps, and where this</div><div class='ctx'> feature is supported (``CONFIG_SYSCTL_ARCH_UNALIGN_ALLOW``; currently,</div><div class='del'>-``arc`` and ``parisc``), controls whether unaligned traps are caught</div><div class='del'>-and emulated (instead of failing).</div><div class='add'>+``arc``, ``parisc`` and ``loongarch``), controls whether unaligned traps</div><div class='add'>+are caught and emulated (instead of failing).</div><div class='ctx'> </div><div class='ctx'> = ========================================================</div><div class='ctx'> 0 Do not emulate unaligned accesses.</div><div class='hunk'>@@ -1465,6 +1554,16 @@ entry will default to 2 instead of 0.</div><div class='ctx'> 2 Unprivileged calls to ``bpf()`` are disabled</div><div class='ctx'> = =============================================================</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+warn_limit</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+Number of kernel warnings after which the kernel should panic when</div><div class='add'>+``panic_on_warn`` is not set. Setting this to 0 disables checking</div><div class='add'>+the warning count. Setting this to 1 has the same effect as setting</div><div class='add'>+``panic_on_warn=1``. The default value is 0.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> watchdog</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/sysctl/net.rst b/Documentation/admin-guide/sysctl/net.rst<br/>index f86b5e1623c6..466c560b0c30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/net.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/sysctl/net.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/net.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/sysctl/net.rst</a></div><div class='hunk'>@@ -31,17 +31,18 @@ see only some of them, depending on your kernel's configuration.</div><div class='ctx'> </div><div class='ctx'> Table : Subdirectories in /proc/sys/net</div><div class='ctx'> </div><div class='del'>- ========= =================== = ========== ==================</div><div class='add'>+ ========= =================== = ========== ===================</div><div class='ctx'>  Directory Content               Directory  Content</div><div class='del'>- ========= =================== = ========== ==================</div><div class='del'>- core      General parameter     appletalk  Appletalk protocol</div><div class='del'>- unix      Unix domain sockets   netrom     NET/ROM</div><div class='del'>- 802       E802 protocol         ax25       AX25</div><div class='del'>- ethernet  Ethernet protocol     rose       X.25 PLP layer</div><div class='add'>+ ========= =================== = ========== ===================</div><div class='add'>+ 802       E802 protocol         mptcp      Multipath TCP</div><div class='add'>+ appletalk Appletalk protocol    netfilter  Network Filter</div><div class='add'>+ ax25      AX25                  netrom     NET/ROM</div><div class='add'>+ bridge    Bridging              rose       X.25 PLP layer</div><div class='add'>+ core      General parameter     tipc       TIPC</div><div class='add'>+ ethernet  Ethernet protocol     unix       Unix domain sockets</div><div class='ctx'>  ipv4      IP version 4          x25        X.25 protocol</div><div class='del'>- bridge    Bridging              decnet     DEC net</div><div class='del'>- ipv6      IP version 6          tipc       TIPC</div><div class='del'>- ========= =================== = ========== ==================</div><div class='add'>+ ipv6      IP version 6</div><div class='add'>+ ========= =================== = ========== ===================</div><div class='ctx'> </div><div class='ctx'> 1. /proc/sys/net/core - Network core options</div><div class='ctx'> ============================================</div><div class='hunk'>@@ -101,6 +102,9 @@ Values:</div><div class='ctx'> 	- 1 - enable JIT hardening for unprivileged users only</div><div class='ctx'> 	- 2 - enable JIT hardening for all users</div><div class='ctx'> </div><div class='add'>+where "privileged user" in this context means a process having</div><div class='add'>+CAP_BPF or CAP_SYS_ADMIN in the root user name space.</div><div class='add'>+</div><div class='ctx'> bpf_jit_kallsyms</div><div class='ctx'> ----------------</div><div class='ctx'> </div><div class='hunk'>@@ -211,6 +215,12 @@ rmem_max</div><div class='ctx'> </div><div class='ctx'> The maximum receive socket buffer size in bytes.</div><div class='ctx'> </div><div class='add'>+rps_default_mask</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The default RPS CPU mask used on newly created network devices. An empty</div><div class='add'>+mask means RPS disabled by default.</div><div class='add'>+</div><div class='ctx'> tstamp_allow_data</div><div class='ctx'> -----------------</div><div class='ctx'> Allow processes to receive tx timestamps looped together with the original</div><div class='hunk'>@@ -271,7 +281,7 @@ poll cycle or the number of packets processed reaches netdev_budget.</div><div class='ctx'> netdev_max_backlog</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='del'>-Maximum number  of  packets,  queued  on  the  INPUT  side, when the interface</div><div class='add'>+Maximum number of packets, queued on the INPUT side, when the interface</div><div class='ctx'> receives packets faster than kernel can process them.</div><div class='ctx'> </div><div class='ctx'> netdev_rss_key</div><div class='hunk'>@@ -322,6 +332,14 @@ a leaked reference faster. A larger value may be useful to prevent false</div><div class='ctx'> warnings on slow/loaded systems.</div><div class='ctx'> Default value is 10, minimum 1, maximum 3600.</div><div class='ctx'> </div><div class='add'>+skb_defer_max</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Max size (in skbs) of the per-cpu list of skbs being freed</div><div class='add'>+by the cpu which allocated them. Used by TCP stack so far.</div><div class='add'>+</div><div class='add'>+Default: 64</div><div class='add'>+</div><div class='ctx'> optmem_max</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='hunk'>@@ -374,6 +392,27 @@ option is set to SOCK_TXREHASH_DEFAULT (i. e. not overridden by setsockopt).</div><div class='ctx'> If set to 1 (default), hash rethink is performed on listening socket.</div><div class='ctx'> If set to 0, hash rethink is not performed.</div><div class='ctx'> </div><div class='add'>+gro_normal_batch</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+Maximum number of the segments to batch up on output of GRO. When a packet</div><div class='add'>+exits GRO, either as a coalesced superframe or as an original packet which</div><div class='add'>+GRO has decided not to coalesce, it is placed on a per-NAPI list. This</div><div class='add'>+list is then passed to the stack when the number of segments reaches the</div><div class='add'>+gro_normal_batch limit.</div><div class='add'>+</div><div class='add'>+high_order_alloc_disable</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+By default the allocator for page frags tries to use high order pages (order-3</div><div class='add'>+on x86). While the default behavior gives good results in most cases, some users</div><div class='add'>+might have hit a contention in page allocations/freeing. This was especially</div><div class='add'>+true on older kernels (&lt; 5.14) when high-order pages were not stored on per-cpu</div><div class='add'>+lists. This allows to opt-in for order-0 allocation instead but is now mostly of</div><div class='add'>+historical importance.</div><div class='add'>+</div><div class='add'>+Default: 0</div><div class='add'>+</div><div class='ctx'> 2. /proc/sys/net/unix - Parameters for Unix domain sockets</div><div class='ctx'> ----------------------------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst<br/>index f4804ce37c58..45ba1f4dc004 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/vm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/sysctl/vm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysctl/vm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/sysctl/vm.rst</a></div><div class='hunk'>@@ -62,6 +62,7 @@ Currently, these files are in /proc/sys/vm:</div><div class='ctx'> - overcommit_memory</div><div class='ctx'> - overcommit_ratio</div><div class='ctx'> - page-cluster</div><div class='add'>+- page_lock_unfairness</div><div class='ctx'> - panic_on_oom</div><div class='ctx'> - percpu_pagelist_high_fraction</div><div class='ctx'> - stat_interval</div><div class='hunk'>@@ -355,7 +356,7 @@ The lowmem_reserve_ratio is an array. You can see them by reading this file::</div><div class='ctx'> </div><div class='ctx'> But, these values are not used directly. The kernel calculates # of protection</div><div class='ctx'> pages for each zones from them. These are shown as array of protection pages</div><div class='del'>-in /proc/zoneinfo like followings. (This is an example of x86-64 box).</div><div class='add'>+in /proc/zoneinfo like the following. (This is an example of x86-64 box).</div><div class='ctx'> Each zone has an array of protection pages like this::</div><div class='ctx'> </div><div class='ctx'>   Node 0, zone      DMA</div><div class='hunk'>@@ -432,7 +433,7 @@ a 2bit error in a memory module) is detected in the background by hardware</div><div class='ctx'> that cannot be handled by the kernel. In some cases (like the page</div><div class='ctx'> still having a valid copy on disk) the kernel will handle the failure</div><div class='ctx'> transparently without affecting any applications. But if there is</div><div class='del'>-no other uptodate copy of the data it will kill to prevent any data</div><div class='add'>+no other up-to-date copy of the data it will kill to prevent any data</div><div class='ctx'> corruptions from propagating.</div><div class='ctx'> </div><div class='ctx'> 1: Kill all processes that have the corrupted and not reloadable page mapped</div><div class='hunk'>@@ -561,6 +562,43 @@ Change the minimum size of the hugepage pool.</div><div class='ctx'> See Documentation/admin-guide/mm/hugetlbpage.rst</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+hugetlb_optimize_vmemmap</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+This knob is not available when the size of 'struct page' (a structure defined</div><div class='add'>+in include/linux/mm_types.h) is not power of two (an unusual system config could</div><div class='add'>+result in this).</div><div class='add'>+</div><div class='add'>+Enable (set to 1) or disable (set to 0) HugeTLB Vmemmap Optimization (HVO).</div><div class='add'>+</div><div class='add'>+Once enabled, the vmemmap pages of subsequent allocation of HugeTLB pages from</div><div class='add'>+buddy allocator will be optimized (7 pages per 2MB HugeTLB page and 4095 pages</div><div class='add'>+per 1GB HugeTLB page), whereas already allocated HugeTLB pages will not be</div><div class='add'>+optimized.  When those optimized HugeTLB pages are freed from the HugeTLB pool</div><div class='add'>+to the buddy allocator, the vmemmap pages representing that range needs to be</div><div class='add'>+remapped again and the vmemmap pages discarded earlier need to be rellocated</div><div class='add'>+again.  If your use case is that HugeTLB pages are allocated 'on the fly' (e.g.</div><div class='add'>+never explicitly allocating HugeTLB pages with 'nr_hugepages' but only set</div><div class='add'>+'nr_overcommit_hugepages', those overcommitted HugeTLB pages are allocated 'on</div><div class='add'>+the fly') instead of being pulled from the HugeTLB pool, you should weigh the</div><div class='add'>+benefits of memory savings against the more overhead (~2x slower than before)</div><div class='add'>+of allocation or freeing HugeTLB pages between the HugeTLB pool and the buddy</div><div class='add'>+allocator.  Another behavior to note is that if the system is under heavy memory</div><div class='add'>+pressure, it could prevent the user from freeing HugeTLB pages from the HugeTLB</div><div class='add'>+pool to the buddy allocator since the allocation of vmemmap pages could be</div><div class='add'>+failed, you have to retry later if your system encounter this situation.</div><div class='add'>+</div><div class='add'>+Once disabled, the vmemmap pages of subsequent allocation of HugeTLB pages from</div><div class='add'>+buddy allocator will not be optimized meaning the extra overhead at allocation</div><div class='add'>+time from buddy allocator disappears, whereas already optimized HugeTLB pages</div><div class='add'>+will not be affected.  If you want to make sure there are no optimized HugeTLB</div><div class='add'>+pages, you can set "nr_hugepages" to 0 first and then disable this.  Note that</div><div class='add'>+writing 0 to nr_hugepages will make any "in use" HugeTLB pages become surplus</div><div class='add'>+pages.  So, those surplus pages are still optimized until they are no longer</div><div class='add'>+in use.  You would need to wait for those surplus pages to be released before</div><div class='add'>+there are no optimized pages in the system.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> nr_hugepages_mempolicy</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='hunk'>@@ -720,7 +758,7 @@ and don't use much of it.</div><div class='ctx'> </div><div class='ctx'> The default value is 0.</div><div class='ctx'> </div><div class='del'>-See Documentation/vm/overcommit-accounting.rst and</div><div class='add'>+See Documentation/mm/overcommit-accounting.rst and</div><div class='ctx'> mm/util.c::__vm_enough_memory() for more information.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -754,6 +792,14 @@ extra faults and I/O delays for following faults if they would have been part of</div><div class='ctx'> that consecutive pages readahead would have brought in.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+page_lock_unfairness</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+This value determines the number of times that the page lock can be</div><div class='add'>+stolen from under a waiter. After the lock is stolen the number of times</div><div class='add'>+specified in this file (default is 5), the "fair lock handoff" semantics</div><div class='add'>+will apply, and the waiter will only be awakened if the lock can be taken.</div><div class='add'>+</div><div class='ctx'> panic_on_oom</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='hunk'>@@ -880,6 +926,9 @@ calls without any restrictions.</div><div class='ctx'> </div><div class='ctx'> The default value is 0.</div><div class='ctx'> </div><div class='add'>+Another way to control permissions for userfaultfd is to use</div><div class='add'>+/dev/userfaultfd instead of userfaultfd(2). See</div><div class='add'>+Documentation/admin-guide/mm/userfaultfd.rst.</div><div class='ctx'> </div><div class='ctx'> user_reserve_kbytes</div><div class='ctx'> ===================</div><div class='head'>diff --git a/Documentation/admin-guide/sysrq.rst b/Documentation/admin-guide/sysrq.rst<br/>index 0a178ef0111d..51906e47327b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysrq.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/sysrq.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/sysrq.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/sysrq.rst</a></div><div class='hunk'>@@ -138,7 +138,7 @@ Command	    Function</div><div class='ctx'> ``v``	    Forcefully restores framebuffer console</div><div class='ctx'> ``v``	    Causes ETM buffer dump [ARM-specific]</div><div class='ctx'> </div><div class='del'>-``w``	    Dumps tasks that are in uninterruptable (blocked) state.</div><div class='add'>+``w``	    Dumps tasks that are in uninterruptible (blocked) state.</div><div class='ctx'> </div><div class='ctx'> ``x``	    Used by xmon interface on ppc/powerpc platforms.</div><div class='ctx'>             Show global PMU Registers on sparc64.</div><div class='head'>diff --git a/Documentation/admin-guide/tainted-kernels.rst b/Documentation/admin-guide/tainted-kernels.rst<br/>index ceeed7b0798d..92a8a07f5c43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/tainted-kernels.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/tainted-kernels.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/tainted-kernels.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/tainted-kernels.rst</a></div><div class='hunk'>@@ -100,6 +100,7 @@ Bit  Log  Number  Reason that got the kernel tainted</div><div class='ctx'>  15  _/K   32768  kernel has been live patched</div><div class='ctx'>  16  _/X   65536  auxiliary taint, defined for and used by distros</div><div class='ctx'>  17  _/T  131072  kernel was built with the struct randomization plugin</div><div class='add'>+ 18  _/N  262144  an in-kernel test has been run</div><div class='ctx'> ===  ===  ======  ========================================================</div><div class='ctx'> </div><div class='ctx'> Note: The character ``_`` is representing a blank in this table to make reading</div><div class='hunk'>@@ -133,6 +134,12 @@ More detailed explanation for tainting</div><div class='ctx'>        scsi/snic on something else than x86_64, scsi/ips on non</div><div class='ctx'>        x86/x86_64/itanium, have broken firmware settings for the</div><div class='ctx'>        irqchip/irq-gic on arm64 ...).</div><div class='add'>+     - x86/x86_64: Microcode late loading is dangerous and will result in</div><div class='add'>+       tainting the kernel. It requires that all CPUs rendezvous to make sure</div><div class='add'>+       the update happens when the system is as quiescent as possible. However,</div><div class='add'>+       a higher priority MCE/SMI/NMI can move control flow away from that</div><div class='add'>+       rendezvous and interrupt the update, which can be detrimental to the</div><div class='add'>+       machine.</div><div class='ctx'> </div><div class='ctx'>  3)  ``R`` if a module was force unloaded by ``rmmod -f``, ``' '`` if all</div><div class='ctx'>      modules were unloaded normally.</div><div class='head'>diff --git a/Documentation/admin-guide/thermal/index.rst b/Documentation/admin-guide/thermal/index.rst<br/>new file mode 100644<br/>index 000000000000..193b7b01a87d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/thermal/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/thermal/index.rst</a></div><div class='hunk'>@@ -0,0 +1,8 @@</div><div class='add'>+=================</div><div class='add'>+Thermal Subsystem</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   intel_powerclamp</div><div class='head'>diff --git a/Documentation/driver-api/thermal/intel_powerclamp.rst b/Documentation/admin-guide/thermal/intel_powerclamp.rst<br/>index 3f6dfb0b3ea6..08509b978af4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/thermal/intel_powerclamp.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/thermal/intel_powerclamp.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/thermal/intel_powerclamp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/thermal/intel_powerclamp.rst</a></div><div class='hunk'>@@ -26,6 +26,8 @@ By:</div><div class='ctx'> 	    - Generic Thermal Layer (sysfs)</div><div class='ctx'> 	    - Kernel APIs (TBD)</div><div class='ctx'> </div><div class='add'>+	(*) Module Parameters</div><div class='add'>+</div><div class='ctx'> INTRODUCTION</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='hunk'>@@ -85,7 +87,7 @@ migrated, unless the CPU is taken offline. In this case, threads</div><div class='ctx'> belong to the offlined CPUs will be terminated immediately.</div><div class='ctx'> </div><div class='ctx'> Running as SCHED_FIFO and relatively high priority, also allows such</div><div class='del'>-scheme to work for both preemptable and non-preemptable kernels.</div><div class='add'>+scheme to work for both preemptible and non-preemptible kernels.</div><div class='ctx'> Alignment of idle time around jiffies ensures scalability for HZ</div><div class='ctx'> values. This effect can be better visualized using a Perf timechart.</div><div class='ctx'> The following diagram shows the behavior of kernel thread</div><div class='hunk'>@@ -153,13 +155,15 @@ b) determine the amount of compensation needed at each target ratio</div><div class='ctx'> Compensation to each target ratio consists of two parts:</div><div class='ctx'> </div><div class='ctx'> 	a) steady state error compensation</div><div class='del'>-	This is to offset the error occurring when the system can</div><div class='del'>-	enter idle without extra wakeups (such as external interrupts).</div><div class='add'>+</div><div class='add'>+	   This is to offset the error occurring when the system can</div><div class='add'>+	   enter idle without extra wakeups (such as external interrupts).</div><div class='ctx'> </div><div class='ctx'> 	b) dynamic error compensation</div><div class='del'>-	When an excessive amount of wakeups occurs during idle, an</div><div class='del'>-	additional idle ratio can be added to quiet interrupts, by</div><div class='del'>-	slowing down CPU activities.</div><div class='add'>+</div><div class='add'>+	   When an excessive amount of wakeups occurs during idle, an</div><div class='add'>+	   additional idle ratio can be added to quiet interrupts, by</div><div class='add'>+	   slowing down CPU activities.</div><div class='ctx'> </div><div class='ctx'> A debugfs file is provided for the user to examine compensation</div><div class='ctx'> progress and results, such as on a Westmere system::</div><div class='hunk'>@@ -281,6 +285,7 @@ cur_state returns value -1 instead of 0 which is to avoid confusing</div><div class='ctx'> 100% busy state with the disabled state.</div><div class='ctx'> </div><div class='ctx'> Example usage:</div><div class='add'>+</div><div class='ctx'> - To inject 25% idle time::</div><div class='ctx'> </div><div class='ctx'> 	$ sudo sh -c "echo 25 &gt; /sys/class/thermal/cooling_device80/cur_state</div><div class='hunk'>@@ -318,3 +323,23 @@ device, a PID based userspace thermal controller can manage to</div><div class='ctx'> control CPU temperature effectively, when no other thermal influence</div><div class='ctx'> is added. For example, a UltraBook user can compile the kernel under</div><div class='ctx'> certain temperature (below most active trip points).</div><div class='add'>+</div><div class='add'>+Module Parameters</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+``cpumask`` (RW)</div><div class='add'>+	A bit mask of CPUs to inject idle. The format of the bitmask is same as</div><div class='add'>+	used in other subsystems like in /proc/irq/\*/smp_affinity. The mask is</div><div class='add'>+	comma separated 32 bit groups. Each CPU is one bit. For example for a 256</div><div class='add'>+	CPU system the full mask is:</div><div class='add'>+	ffffffff,ffffffff,ffffffff,ffffffff,ffffffff,ffffffff,ffffffff,ffffffff</div><div class='add'>+</div><div class='add'>+	The rightmost mask is for CPU 0-32.</div><div class='add'>+</div><div class='add'>+``max_idle`` (RW)</div><div class='add'>+	Maximum injected idle time to the total CPU time ratio in percent range</div><div class='add'>+	from 1 to 100. Even if the cooling device max_state is always 100 (100%),</div><div class='add'>+	this parameter allows to add a max idle percent limit. The default is 50,</div><div class='add'>+	to match the current implementation of powerclamp driver. Also doesn't</div><div class='add'>+	allow value more than 75, if the cpumask includes every CPU present in</div><div class='add'>+	the system.</div><div class='head'>diff --git a/Documentation/admin-guide/unicode.rst b/Documentation/admin-guide/unicode.rst<br/>index 290fe83ebe82..cba7e5017d36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/unicode.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/unicode.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/unicode.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/unicode.rst</a></div><div class='hunk'>@@ -3,11 +3,10 @@ Unicode support</div><div class='ctx'> </div><div class='ctx'> 		 Last update: 2005-01-17, version 1.4</div><div class='ctx'> </div><div class='del'>-This file is maintained by H. Peter Anvin &lt;unicode@lanana.org&gt; as part</div><div class='del'>-of the Linux Assigned Names And Numbers Authority (LANANA) project.</div><div class='del'>-The current version can be found at:</div><div class='del'>-</div><div class='del'>-	    http://www.lanana.org/docs/unicode/admin-guide/unicode.rst</div><div class='add'>+Note: The original version of this document, which was maintained at</div><div class='add'>+lanana.org as part of the Linux Assigned Names And Numbers Authority</div><div class='add'>+(LANANA) project, is no longer existent.  So, this version in the</div><div class='add'>+mainline Linux kernel is now the maintained main document.</div><div class='ctx'> </div><div class='ctx'> Introduction</div><div class='ctx'> ------------</div><div class='head'>diff --git a/Documentation/admin-guide/workload-tracing.rst b/Documentation/admin-guide/workload-tracing.rst<br/>new file mode 100644<br/>index 000000000000..b2e254ec8ee8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/workload-tracing.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/workload-tracing.rst</a></div><div class='hunk'>@@ -0,0 +1,606 @@</div><div class='add'>+.. SPDX-License-Identifier: (GPL-2.0+ OR CC-BY-4.0)</div><div class='add'>+</div><div class='add'>+======================================================</div><div class='add'>+Discovering Linux kernel subsystems used by a workload</div><div class='add'>+======================================================</div><div class='add'>+</div><div class='add'>+:Authors: - Shuah Khan &lt;skhan@linuxfoundation.org&gt;</div><div class='add'>+          - Shefali Sharma &lt;sshefali021@gmail.com&gt;</div><div class='add'>+:maintained-by: Shuah Khan &lt;skhan@linuxfoundation.org&gt;</div><div class='add'>+</div><div class='add'>+Key Points</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+ * Understanding system resources necessary to build and run a workload</div><div class='add'>+   is important.</div><div class='add'>+ * Linux tracing and strace can be used to discover the system resources</div><div class='add'>+   in use by a workload. The completeness of the system usage information</div><div class='add'>+   depends on the completeness of coverage of a workload.</div><div class='add'>+ * Performance and security of the operating system can be analyzed with</div><div class='add'>+   the help of tools such as:</div><div class='add'>+   `perf &lt;https://man7.org/linux/man-pages/man1/perf.1.html&gt;`_,</div><div class='add'>+   `stress-ng &lt;https://www.mankier.com/1/stress-ng&gt;`_,</div><div class='add'>+   `paxtest &lt;https://github.com/opntr/paxtest-freebsd&gt;`_.</div><div class='add'>+ * Once we discover and understand the workload needs, we can focus on them</div><div class='add'>+   to avoid regressions and use it to evaluate safety considerations.</div><div class='add'>+</div><div class='add'>+Methodology</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+`strace &lt;https://man7.org/linux/man-pages/man1/strace.1.html&gt;`_ is a</div><div class='add'>+diagnostic, instructional, and debugging tool and can be used to discover</div><div class='add'>+the system resources in use by a workload. Once we discover and understand</div><div class='add'>+the workload needs, we can focus on them to avoid regressions and use it</div><div class='add'>+to evaluate safety considerations. We use strace tool to trace workloads.</div><div class='add'>+</div><div class='add'>+This method of tracing using strace tells us the system calls invoked by</div><div class='add'>+the workload and doesn't include all the system calls that can be invoked</div><div class='add'>+by it. In addition, this tracing method tells us just the code paths within</div><div class='add'>+these system calls that are invoked. As an example, if a workload opens a</div><div class='add'>+file and reads from it successfully, then the success path is the one that</div><div class='add'>+is traced. Any error paths in that system call will not be traced. If there</div><div class='add'>+is a workload that provides full coverage of a workload then the method</div><div class='add'>+outlined here will trace and find all possible code paths. The completeness</div><div class='add'>+of the system usage information depends on the completeness of coverage of a</div><div class='add'>+workload.</div><div class='add'>+</div><div class='add'>+The goal is tracing a workload on a system running a default kernel without</div><div class='add'>+requiring custom kernel installs.</div><div class='add'>+</div><div class='add'>+How do we gather fine-grained system information?</div><div class='add'>+=================================================</div><div class='add'>+</div><div class='add'>+strace tool can be used to trace system calls made by a process and signals</div><div class='add'>+it receives. System calls are the fundamental interface between an</div><div class='add'>+application and the operating system kernel. They enable a program to</div><div class='add'>+request services from the kernel. For instance, the open() system call in</div><div class='add'>+Linux is used to provide access to a file in the file system. strace enables</div><div class='add'>+us to track all the system calls made by an application. It lists all the</div><div class='add'>+system calls made by a process and their resulting output.</div><div class='add'>+</div><div class='add'>+You can generate profiling data combining strace and perf record tools to</div><div class='add'>+record the events and information associated with a process. This provides</div><div class='add'>+insight into the process. "perf annotate" tool generates the statistics of</div><div class='add'>+each instruction of the program. This document goes over the details of how</div><div class='add'>+to gather fine-grained information on a workload's usage of system resources.</div><div class='add'>+</div><div class='add'>+We used strace to trace the perf, stress-ng, paxtest workloads to illustrate</div><div class='add'>+our methodology to discover resources used by a workload. This process can</div><div class='add'>+be applied to trace other workloads.</div><div class='add'>+</div><div class='add'>+Getting the system ready for tracing</div><div class='add'>+====================================</div><div class='add'>+</div><div class='add'>+Before we can get started we will show you how to get your system ready.</div><div class='add'>+We assume that you have a Linux distribution running on a physical system</div><div class='add'>+or a virtual machine. Most distributions will include strace command. Let’s</div><div class='add'>+install other tools that aren’t usually included to build Linux kernel.</div><div class='add'>+Please note that the following works on Debian based distributions. You</div><div class='add'>+might have to find equivalent packages on other Linux distributions.</div><div class='add'>+</div><div class='add'>+Install tools to build Linux kernel and tools in kernel repository.</div><div class='add'>+scripts/ver_linux is a good way to check if your system already has</div><div class='add'>+the necessary tools::</div><div class='add'>+</div><div class='add'>+  sudo apt-get build-essentials flex bison yacc</div><div class='add'>+  sudo apt install libelf-dev systemtap-sdt-dev libaudit-dev libslang2-dev libperl-dev libdw-dev</div><div class='add'>+</div><div class='add'>+cscope is a good tool to browse kernel sources. Let's install it now::</div><div class='add'>+</div><div class='add'>+  sudo apt-get install cscope</div><div class='add'>+</div><div class='add'>+Install stress-ng and paxtest::</div><div class='add'>+</div><div class='add'>+  apt-get install stress-ng</div><div class='add'>+  apt-get install paxtest</div><div class='add'>+</div><div class='add'>+Workload overview</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+As mentioned earlier, we used strace to trace perf bench, stress-ng and</div><div class='add'>+paxtest workloads to show how to analyze a workload and identify Linux</div><div class='add'>+subsystems used by these workloads. Let's start with an overview of these</div><div class='add'>+three workloads to get a better understanding of what they do and how to</div><div class='add'>+use them.</div><div class='add'>+</div><div class='add'>+perf bench (all) workload</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+The perf bench command contains multiple multi-threaded microkernel</div><div class='add'>+benchmarks for executing different subsystems in the Linux kernel and</div><div class='add'>+system calls. This allows us to easily measure the impact of changes,</div><div class='add'>+which can help mitigate performance regressions. It also acts as a common</div><div class='add'>+benchmarking framework, enabling developers to easily create test cases,</div><div class='add'>+integrate transparently, and use performance-rich tooling subsystems.</div><div class='add'>+</div><div class='add'>+Stress-ng netdev stressor workload</div><div class='add'>+----------------------------------</div><div class='add'>+</div><div class='add'>+stress-ng is used for performing stress testing on the kernel. It allows</div><div class='add'>+you to exercise various physical subsystems of the computer, as well as</div><div class='add'>+interfaces of the OS kernel, using "stressor-s". They are available for</div><div class='add'>+CPU, CPU cache, devices, I/O, interrupts, file system, memory, network,</div><div class='add'>+operating system, pipelines, schedulers, and virtual machines. Please refer</div><div class='add'>+to the `stress-ng man-page &lt;https://www.mankier.com/1/stress-ng&gt;`_ to</div><div class='add'>+find the description of all the available stressor-s. The netdev stressor</div><div class='add'>+starts specified number (N) of workers that exercise various netdevice</div><div class='add'>+ioctl commands across all the available network devices.</div><div class='add'>+</div><div class='add'>+paxtest kiddie workload</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+paxtest is a program that tests buffer overflows in the kernel. It tests</div><div class='add'>+kernel enforcements over memory usage. Generally, execution in some memory</div><div class='add'>+segments makes buffer overflows possible. It runs a set of programs that</div><div class='add'>+attempt to subvert memory usage. It is used as a regression test suite for</div><div class='add'>+PaX, but might be useful to test other memory protection patches for the</div><div class='add'>+kernel. We used paxtest kiddie mode which looks for simple vulnerabilities.</div><div class='add'>+</div><div class='add'>+What is strace and how do we use it?</div><div class='add'>+====================================</div><div class='add'>+</div><div class='add'>+As mentioned earlier, strace which is a useful diagnostic, instructional,</div><div class='add'>+and debugging tool and can be used to discover the system resources in use</div><div class='add'>+by a workload. It can be used:</div><div class='add'>+</div><div class='add'>+ * To see how a process interacts with the kernel.</div><div class='add'>+ * To see why a process is failing or hanging.</div><div class='add'>+ * For reverse engineering a process.</div><div class='add'>+ * To find the files on which a program depends.</div><div class='add'>+ * For analyzing the performance of an application.</div><div class='add'>+ * For troubleshooting various problems related to the operating system.</div><div class='add'>+</div><div class='add'>+In addition, strace can generate run-time statistics on times, calls, and</div><div class='add'>+errors for each system call and report a summary when program exits,</div><div class='add'>+suppressing the regular output. This attempts to show system time (CPU time</div><div class='add'>+spent running in the kernel) independent of wall clock time. We plan to use</div><div class='add'>+these features to get information on workload system usage.</div><div class='add'>+</div><div class='add'>+strace command supports basic, verbose, and stats modes. strace command when</div><div class='add'>+run in verbose mode gives more detailed information about the system calls</div><div class='add'>+invoked by a process.</div><div class='add'>+</div><div class='add'>+Running strace -c generates a report of the percentage of time spent in each</div><div class='add'>+system call, the total time in seconds, the microseconds per call, the total</div><div class='add'>+number of calls, the count of each system call that has failed with an error</div><div class='add'>+and the type of system call made.</div><div class='add'>+</div><div class='add'>+ * Usage: strace &lt;command we want to trace&gt;</div><div class='add'>+ * Verbose mode usage: strace -v &lt;command&gt;</div><div class='add'>+ * Gather statistics: strace -c &lt;command&gt;</div><div class='add'>+</div><div class='add'>+We used the “-c” option to gather fine-grained run-time statistics in use</div><div class='add'>+by three workloads we have chose for this analysis.</div><div class='add'>+</div><div class='add'>+ * perf</div><div class='add'>+ * stress-ng</div><div class='add'>+ * paxtest</div><div class='add'>+</div><div class='add'>+What is cscope and how do we use it?</div><div class='add'>+====================================</div><div class='add'>+</div><div class='add'>+Now let’s look at `cscope &lt;https://cscope.sourceforge.net/&gt;`_, a command</div><div class='add'>+line tool for browsing C, C++ or Java code-bases. We can use it to find</div><div class='add'>+all the references to a symbol, global definitions, functions called by a</div><div class='add'>+function, functions calling a function, text strings, regular expression</div><div class='add'>+patterns, files including a file.</div><div class='add'>+</div><div class='add'>+We can use cscope to find which system call belongs to which subsystem.</div><div class='add'>+This way we can find the kernel subsystems used by a process when it is</div><div class='add'>+executed.</div><div class='add'>+</div><div class='add'>+Let’s checkout the latest Linux repository and build cscope database::</div><div class='add'>+</div><div class='add'>+  git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git linux</div><div class='add'>+  cd linux</div><div class='add'>+  cscope -R -p10  # builds cscope.out database before starting browse session</div><div class='add'>+  cscope -d -p10  # starts browse session on cscope.out database</div><div class='add'>+</div><div class='add'>+Note: Run "cscope -R -p10" to build the database and c"scope -d -p10" to</div><div class='add'>+enter into the browsing session. cscope by default cscope.out database.</div><div class='add'>+To get out of this mode press ctrl+d. -p option is used to specify the</div><div class='add'>+number of file path components to display. -p10 is optimal for browsing</div><div class='add'>+kernel sources.</div><div class='add'>+</div><div class='add'>+What is perf and how do we use it?</div><div class='add'>+==================================</div><div class='add'>+</div><div class='add'>+Perf is an analysis tool based on Linux 2.6+ systems, which abstracts the</div><div class='add'>+CPU hardware difference in performance measurement in Linux, and provides</div><div class='add'>+a simple command line interface. Perf is based on the perf_events interface</div><div class='add'>+exported by the kernel. It is very useful for profiling the system and</div><div class='add'>+finding performance bottlenecks in an application.</div><div class='add'>+</div><div class='add'>+If you haven't already checked out the Linux mainline repository, you can do</div><div class='add'>+so and then build kernel and perf tool::</div><div class='add'>+</div><div class='add'>+  git clone git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git linux</div><div class='add'>+  cd linux</div><div class='add'>+  make -j3 all</div><div class='add'>+  cd tools/perf</div><div class='add'>+  make</div><div class='add'>+</div><div class='add'>+Note: The perf command can be built without building the kernel in the</div><div class='add'>+repository and can be run on older kernels. However matching the kernel</div><div class='add'>+and perf revisions gives more accurate information on the subsystem usage.</div><div class='add'>+</div><div class='add'>+We used "perf stat" and "perf bench" options. For a detailed information on</div><div class='add'>+the perf tool, run "perf -h".</div><div class='add'>+</div><div class='add'>+perf stat</div><div class='add'>+---------</div><div class='add'>+The perf stat command generates a report of various hardware and software</div><div class='add'>+events. It does so with the help of hardware counter registers found in</div><div class='add'>+modern CPUs that keep the count of these activities. "perf stat cal" shows</div><div class='add'>+stats for cal command.</div><div class='add'>+</div><div class='add'>+Perf bench</div><div class='add'>+----------</div><div class='add'>+The perf bench command contains multiple multi-threaded microkernel</div><div class='add'>+benchmarks for executing different subsystems in the Linux kernel and</div><div class='add'>+system calls. This allows us to easily measure the impact of changes,</div><div class='add'>+which can help mitigate performance regressions. It also acts as a common</div><div class='add'>+benchmarking framework, enabling developers to easily create test cases,</div><div class='add'>+integrate transparently, and use performance-rich tooling.</div><div class='add'>+</div><div class='add'>+"perf bench all" command runs the following benchmarks:</div><div class='add'>+</div><div class='add'>+ * sched/messaging</div><div class='add'>+ * sched/pipe</div><div class='add'>+ * syscall/basic</div><div class='add'>+ * mem/memcpy</div><div class='add'>+ * mem/memset</div><div class='add'>+</div><div class='add'>+What is stress-ng and how do we use it?</div><div class='add'>+=======================================</div><div class='add'>+</div><div class='add'>+As mentioned earlier, stress-ng is used for performing stress testing on</div><div class='add'>+the kernel. It allows you to exercise various physical subsystems of the</div><div class='add'>+computer, as well as interfaces of the OS kernel, using stressor-s. They</div><div class='add'>+are available for CPU, CPU cache, devices, I/O, interrupts, file system,</div><div class='add'>+memory, network, operating system, pipelines, schedulers, and virtual</div><div class='add'>+machines.</div><div class='add'>+</div><div class='add'>+The netdev stressor starts N workers that exercise various netdevice ioctl</div><div class='add'>+commands across all the available network devices. The following ioctls are</div><div class='add'>+exercised:</div><div class='add'>+</div><div class='add'>+ * SIOCGIFCONF, SIOCGIFINDEX, SIOCGIFNAME, SIOCGIFFLAGS</div><div class='add'>+ * SIOCGIFADDR, SIOCGIFNETMASK, SIOCGIFMETRIC, SIOCGIFMTU</div><div class='add'>+ * SIOCGIFHWADDR, SIOCGIFMAP, SIOCGIFTXQLEN</div><div class='add'>+</div><div class='add'>+The following command runs the stressor::</div><div class='add'>+</div><div class='add'>+  stress-ng --netdev 1 -t 60 --metrics command.</div><div class='add'>+</div><div class='add'>+We can use the perf record command to record the events and information</div><div class='add'>+associated with a process. This command records the profiling data in the</div><div class='add'>+perf.data file in the same directory.</div><div class='add'>+</div><div class='add'>+Using the following commands you can record the events associated with the</div><div class='add'>+netdev stressor, view the generated report perf.data and annotate the to</div><div class='add'>+view the statistics of each instruction of the program::</div><div class='add'>+</div><div class='add'>+  perf record stress-ng --netdev 1 -t 60 --metrics command.</div><div class='add'>+  perf report</div><div class='add'>+  perf annotate</div><div class='add'>+</div><div class='add'>+What is paxtest and how do we use it?</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+paxtest is a program that tests buffer overflows in the kernel. It tests</div><div class='add'>+kernel enforcements over memory usage. Generally, execution in some memory</div><div class='add'>+segments makes buffer overflows possible. It runs a set of programs that</div><div class='add'>+attempt to subvert memory usage. It is used as a regression test suite for</div><div class='add'>+PaX, and will be useful to test other memory protection patches for the</div><div class='add'>+kernel.</div><div class='add'>+</div><div class='add'>+paxtest provides kiddie and blackhat modes. The paxtest kiddie mode runs</div><div class='add'>+in normal mode, whereas the blackhat mode tries to get around the protection</div><div class='add'>+of the kernel testing for vulnerabilities. We focus on the kiddie mode here</div><div class='add'>+and combine "paxtest kiddie" run with "perf record" to collect CPU stack</div><div class='add'>+traces for the paxtest kiddie run to see which function is calling other</div><div class='add'>+functions in the performance profile. Then the "dwarf" (DWARF's Call Frame</div><div class='add'>+Information) mode can be used to unwind the stack.</div><div class='add'>+</div><div class='add'>+The following command can be used to view resulting report in call-graph</div><div class='add'>+format::</div><div class='add'>+</div><div class='add'>+  perf record --call-graph dwarf paxtest kiddie</div><div class='add'>+  perf report --stdio</div><div class='add'>+</div><div class='add'>+Tracing workloads</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Now that we understand the workloads, let's start tracing them.</div><div class='add'>+</div><div class='add'>+Tracing perf bench all workload</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+Run the following command to trace perf bench all workload::</div><div class='add'>+</div><div class='add'>+ strace -c perf bench all</div><div class='add'>+</div><div class='add'>+**System Calls made by the workload**</div><div class='add'>+</div><div class='add'>+The below table shows the system calls invoked by the workload, number of</div><div class='add'>+times each system call is invoked, and the corresponding Linux subsystem.</div><div class='add'>+</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| System Call       | # calls   | Linux Subsystem | System Call (API)       |</div><div class='add'>++===================+===========+=================+=========================+</div><div class='add'>+| getppid           | 10000001  | Process Mgmt    | sys_getpid()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| clone             | 1077      | Process Mgmt.   | sys_clone()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| prctl             | 23        | Process Mgmt.   | sys_prctl()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| prlimit64         | 7         | Process Mgmt.   | sys_prlimit64()         |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getpid            | 10        | Process Mgmt.   | sys_getpid()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| uname             | 3         | Process Mgmt.   | sys_uname()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| sysinfo           | 1         | Process Mgmt.   | sys_sysinfo()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getuid            | 1         | Process Mgmt.   | sys_getuid()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getgid            | 1         | Process Mgmt.   | sys_getgid()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| geteuid           | 1         | Process Mgmt.   | sys_geteuid()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getegid           | 1         | Process Mgmt.   | sys_getegid             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| close             | 49951     | Filesystem      | sys_close()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| pipe              | 604       | Filesystem      | sys_pipe()              |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| openat            | 48560     | Filesystem      | sys_opennat()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| fstat             | 8338      | Filesystem      | sys_fstat()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| stat              | 1573      | Filesystem      | sys_stat()              |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| pread64           | 9646      | Filesystem      | sys_pread64()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getdents64        | 1873      | Filesystem      | sys_getdents64()        |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| access            | 3         | Filesystem      | sys_access()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| lstat             | 1880      | Filesystem      | sys_lstat()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| lseek             | 6         | Filesystem      | sys_lseek()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| ioctl             | 3         | Filesystem      | sys_ioctl()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| dup2              | 1         | Filesystem      | sys_dup2()              |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| execve            | 2         | Filesystem      | sys_execve()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| fcntl             | 8779      | Filesystem      | sys_fcntl()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| statfs            | 1         | Filesystem      | sys_statfs()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| epoll_create      | 2         | Filesystem      | sys_epoll_create()      |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| epoll_ctl         | 64        | Filesystem      | sys_epoll_ctl()         |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| newfstatat        | 8318      | Filesystem      | sys_newfstatat()        |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| eventfd2          | 192       | Filesystem      | sys_eventfd2()          |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| mmap              | 243       | Memory Mgmt.    | sys_mmap()              |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| mprotect          | 32        | Memory Mgmt.    | sys_mprotect()          |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| brk               | 21        | Memory Mgmt.    | sys_brk()               |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| munmap            | 128       | Memory Mgmt.    | sys_munmap()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| set_mempolicy     | 156       | Memory Mgmt.    | sys_set_mempolicy()     |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| set_tid_address   | 1         | Process Mgmt.   | sys_set_tid_address()   |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| set_robust_list   | 1         | Futex           | sys_set_robust_list()   |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| futex             | 341       | Futex           | sys_futex()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| sched_getaffinity | 79        | Scheduler       | sys_sched_getaffinity() |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| sched_setaffinity | 223       | Scheduler       | sys_sched_setaffinity() |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| socketpair        | 202       | Network         | sys_socketpair()        |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| rt_sigprocmask    | 21        | Signal          | sys_rt_sigprocmask()    |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| rt_sigaction      | 36        | Signal          | sys_rt_sigaction()      |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| rt_sigreturn      | 2         | Signal          | sys_rt_sigreturn()      |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| wait4             | 889       | Time            | sys_wait4()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| clock_nanosleep   | 37        | Time            | sys_clock_nanosleep()   |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| capget            | 4         | Capability      | sys_capget()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+</div><div class='add'>+Tracing stress-ng netdev stressor workload</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+Run the following command to trace stress-ng netdev stressor workload::</div><div class='add'>+</div><div class='add'>+  strace -c  stress-ng --netdev 1 -t 60 --metrics</div><div class='add'>+</div><div class='add'>+**System Calls made by the workload**</div><div class='add'>+</div><div class='add'>+The below table shows the system calls invoked by the workload, number of</div><div class='add'>+times each system call is invoked, and the corresponding Linux subsystem.</div><div class='add'>+</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| System Call       | # calls   | Linux Subsystem | System Call (API)       |</div><div class='add'>++===================+===========+=================+=========================+</div><div class='add'>+| openat            | 74        | Filesystem      | sys_openat()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| close             | 75        | Filesystem      | sys_close()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| read              | 58        | Filesystem      | sys_read()              |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| fstat             | 20        | Filesystem      | sys_fstat()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| flock             | 10        | Filesystem      | sys_flock()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| write             | 7         | Filesystem      | sys_write()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getdents64        | 8         | Filesystem      | sys_getdents64()        |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| pread64           | 8         | Filesystem      | sys_pread64()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| lseek             | 1         | Filesystem      | sys_lseek()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| access            | 2         | Filesystem      | sys_access()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getcwd            | 1         | Filesystem      | sys_getcwd()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| execve            | 1         | Filesystem      | sys_execve()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| mmap              | 61        | Memory Mgmt.    | sys_mmap()              |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| munmap            | 3         | Memory Mgmt.    | sys_munmap()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| mprotect          | 20        | Memory Mgmt.    | sys_mprotect()          |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| mlock             | 2         | Memory Mgmt.    | sys_mlock()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| brk               | 3         | Memory Mgmt.    | sys_brk()               |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| rt_sigaction      | 21        | Signal          | sys_rt_sigaction()      |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| rt_sigprocmask    | 1         | Signal          | sys_rt_sigprocmask()    |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| sigaltstack       | 1         | Signal          | sys_sigaltstack()       |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| rt_sigreturn      | 1         | Signal          | sys_rt_sigreturn()      |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getpid            | 8         | Process Mgmt.   | sys_getpid()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| prlimit64         | 5         | Process Mgmt.   | sys_prlimit64()         |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| arch_prctl        | 2         | Process Mgmt.   | sys_arch_prctl()        |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| sysinfo           | 2         | Process Mgmt.   | sys_sysinfo()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getuid            | 2         | Process Mgmt.   | sys_getuid()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| uname             | 1         | Process Mgmt.   | sys_uname()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| setpgid           | 1         | Process Mgmt.   | sys_setpgid()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getrusage         | 1         | Process Mgmt.   | sys_getrusage()         |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| geteuid           | 1         | Process Mgmt.   | sys_geteuid()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| getppid           | 1         | Process Mgmt.   | sys_getppid()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| sendto            | 3         | Network         | sys_sendto()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| connect           | 1         | Network         | sys_connect()           |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| socket            | 1         | Network         | sys_socket()            |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| clone             | 1         | Process Mgmt.   | sys_clone()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| set_tid_address   | 1         | Process Mgmt.   | sys_set_tid_address()   |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| wait4             | 2         | Time            | sys_wait4()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| alarm             | 1         | Time            | sys_alarm()             |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+| set_robust_list   | 1         | Futex           | sys_set_robust_list()   |</div><div class='add'>++-------------------+-----------+-----------------+-------------------------+</div><div class='add'>+</div><div class='add'>+Tracing paxtest kiddie workload</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+Run the following command to trace paxtest kiddie workload::</div><div class='add'>+</div><div class='add'>+ strace -c paxtest kiddie</div><div class='add'>+</div><div class='add'>+**System Calls made by the workload**</div><div class='add'>+</div><div class='add'>+The below table shows the system calls invoked by the workload, number of</div><div class='add'>+times each system call is invoked, and the corresponding Linux subsystem.</div><div class='add'>+</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| System Call       | # calls   | Linux Subsystem | System Call (API)    |</div><div class='add'>++===================+===========+=================+======================+</div><div class='add'>+| read              | 3         | Filesystem      | sys_read()           |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| write             | 11        | Filesystem      | sys_write()          |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| close             | 41        | Filesystem      | sys_close()          |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| stat              | 24        | Filesystem      | sys_stat()           |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| fstat             | 2         | Filesystem      | sys_fstat()          |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| pread64           | 6         | Filesystem      | sys_pread64()        |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| access            | 1         | Filesystem      | sys_access()         |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| pipe              | 1         | Filesystem      | sys_pipe()           |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| dup2              | 24        | Filesystem      | sys_dup2()           |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| execve            | 1         | Filesystem      | sys_execve()         |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| fcntl             | 26        | Filesystem      | sys_fcntl()          |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| openat            | 14        | Filesystem      | sys_openat()         |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| rt_sigaction      | 7         | Signal          | sys_rt_sigaction()   |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| rt_sigreturn      | 38        | Signal          | sys_rt_sigreturn()   |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| clone             | 38        | Process Mgmt.   | sys_clone()          |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| wait4             | 44        | Time            | sys_wait4()          |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| mmap              | 7         | Memory Mgmt.    | sys_mmap()           |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| mprotect          | 3         | Memory Mgmt.    | sys_mprotect()       |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| munmap            | 1         | Memory Mgmt.    | sys_munmap()         |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| brk               | 3         | Memory Mgmt.    | sys_brk()            |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| getpid            | 1         | Process Mgmt.   | sys_getpid()         |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| getuid            | 1         | Process Mgmt.   | sys_getuid()         |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| getgid            | 1         | Process Mgmt.   | sys_getgid()         |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| geteuid           | 2         | Process Mgmt.   | sys_geteuid()        |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| getegid           | 1         | Process Mgmt.   | sys_getegid()        |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| getppid           | 1         | Process Mgmt.   | sys_getppid()        |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+| arch_prctl        | 2         | Process Mgmt.   | sys_arch_prctl()     |</div><div class='add'>++-------------------+-----------+-----------------+----------------------+</div><div class='add'>+</div><div class='add'>+Conclusion</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+This document is intended to be used as a guide on how to gather fine-grained</div><div class='add'>+information on the resources in use by workloads using strace.</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+ * `Discovery Linux Kernel Subsystems used by OpenAPS &lt;https://elisa.tech/blog/2022/02/02/discovery-linux-kernel-subsystems-used-by-openaps&gt;`_</div><div class='add'>+ * `ELISA-White-Papers-Discovering Linux kernel subsystems used by a workload &lt;https://github.com/elisa-tech/ELISA-White-Papers/blob/master/Processes/Discovering_Linux_kernel_subsystems_used_by_a_workload.md&gt;`_</div><div class='add'>+ * `strace &lt;https://man7.org/linux/man-pages/man1/strace.1.html&gt;`_</div><div class='add'>+ * `perf &lt;https://man7.org/linux/man-pages/man1/perf.1.html&gt;`_</div><div class='add'>+ * `paxtest README &lt;https://github.com/opntr/paxtest-freebsd/blob/hardenedbsd/0.9.14-hbsd/README&gt;`_</div><div class='add'>+ * `stress-ng &lt;https://www.mankier.com/1/stress-ng&gt;`_</div><div class='add'>+ * `Monitoring and managing system status and performance &lt;https://access.redhat.com/documentation/en-us/red_hat_enterprise_linux/8/html/monitoring_and_managing_system_status_and_performance/index&gt;`_</div><div class='head'>diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst<br/>index 8de008c0c5ad..3a9c041d7f6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/xfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/admin-guide/xfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/admin-guide/xfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/admin-guide/xfs.rst</a></div><div class='hunk'>@@ -236,13 +236,14 @@ the dates listed above.</div><div class='ctx'> Deprecated Mount Options</div><div class='ctx'> ========================</div><div class='ctx'> </div><div class='del'>-===========================     ================</div><div class='add'>+============================    ================</div><div class='ctx'>   Name				Removal Schedule</div><div class='del'>-===========================     ================</div><div class='add'>+============================    ================</div><div class='ctx'> Mounting with V4 filesystem     September 2030</div><div class='add'>+Mounting ascii-ci filesystem    September 2030</div><div class='ctx'> ikeep/noikeep			September 2025</div><div class='ctx'> attr2/noattr2			September 2025</div><div class='del'>-===========================     ================</div><div class='add'>+============================    ================</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Removed Mount Options</div><div class='hunk'>@@ -296,7 +297,7 @@ The following sysctls are available for the XFS filesystem:</div><div class='ctx'> 		XFS_ERRLEVEL_LOW:       1</div><div class='ctx'> 		XFS_ERRLEVEL_HIGH:      5</div><div class='ctx'> </div><div class='del'>-  fs.xfs.panic_mask		(Min: 0  Default: 0  Max: 256)</div><div class='add'>+  fs.xfs.panic_mask		(Min: 0  Default: 0  Max: 511)</div><div class='ctx'> 	Causes certain error conditions to call BUG(). Value is a bitmask;</div><div class='ctx'> 	OR together the tags which represent errors which should cause panics:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arc/arc.rst b/Documentation/arch/arc/arc.rst<br/>index 6c4d978f3f4e..6c4d978f3f4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arc/arc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arc/arc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/arc/arc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/arc/arc.rst</a></div><div class='head'>diff --git a/Documentation/arc/features.rst b/Documentation/arch/arc/features.rst<br/>index b793583d688a..b793583d688a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arc/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arc/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/arc/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/arc/features.rst</a></div><div class='head'>diff --git a/Documentation/arc/index.rst b/Documentation/arch/arc/index.rst<br/>index 7b098d4a5e3e..7b098d4a5e3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arc/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arc/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/arc/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/arc/index.rst</a></div><div class='head'>diff --git a/Documentation/ia64/aliasing.rst b/Documentation/arch/ia64/aliasing.rst<br/>index a08b36aba015..36a1e1d4842b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/aliasing.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/aliasing.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/aliasing.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/aliasing.rst</a></div><div class='hunk'>@@ -61,7 +61,7 @@ Memory Map</div><div class='ctx'>     The efi_memmap table is preserved unmodified because the original</div><div class='ctx'>     boot-time information is required for kexec.</div><div class='ctx'> </div><div class='del'>-Kernel Identify Mappings</div><div class='add'>+Kernel Identity Mappings</div><div class='ctx'> ========================</div><div class='ctx'> </div><div class='ctx'>     Linux/ia64 identity mappings are done with large pages, currently</div><div class='head'>diff --git a/Documentation/ia64/efirtc.rst b/Documentation/arch/ia64/efirtc.rst<br/>index fd8328408301..fd8328408301 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/efirtc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/efirtc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/efirtc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/efirtc.rst</a></div><div class='head'>diff --git a/Documentation/ia64/err_inject.rst b/Documentation/arch/ia64/err_inject.rst<br/>index 900f71e93a29..900f71e93a29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/err_inject.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/err_inject.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/err_inject.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/err_inject.rst</a></div><div class='head'>diff --git a/Documentation/ia64/features.rst b/Documentation/arch/ia64/features.rst<br/>index d7226fdcf5f8..d7226fdcf5f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/features.rst</a></div><div class='head'>diff --git a/Documentation/ia64/fsys.rst b/Documentation/arch/ia64/fsys.rst<br/>index a702d2cc94b6..a702d2cc94b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/fsys.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/fsys.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/fsys.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/fsys.rst</a></div><div class='head'>diff --git a/Documentation/ia64/ia64.rst b/Documentation/arch/ia64/ia64.rst<br/>index b725019a9492..b725019a9492 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/ia64.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/ia64.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/ia64.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/ia64.rst</a></div><div class='head'>diff --git a/Documentation/ia64/index.rst b/Documentation/arch/ia64/index.rst<br/>index 761f2154dfa2..761f2154dfa2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/index.rst</a></div><div class='head'>diff --git a/Documentation/ia64/irq-redir.rst b/Documentation/arch/ia64/irq-redir.rst<br/>index 6bbbbe4f73ef..6bbbbe4f73ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/irq-redir.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/irq-redir.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/irq-redir.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/irq-redir.rst</a></div><div class='head'>diff --git a/Documentation/ia64/mca.rst b/Documentation/arch/ia64/mca.rst<br/>index 08270bba44a4..08270bba44a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/mca.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/mca.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/mca.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/mca.rst</a></div><div class='head'>diff --git a/Documentation/ia64/serial.rst b/Documentation/arch/ia64/serial.rst<br/>index 1de70c305a79..1de70c305a79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ia64/serial.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ia64/serial.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/ia64/serial.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/ia64/serial.rst</a></div><div class='head'>diff --git a/Documentation/arch.rst b/Documentation/arch/index.rst<br/>index 14bcd8294b93..80ee31016584 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arch.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arch.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/index.rst</a></div><div class='hunk'>@@ -10,17 +10,18 @@ implementation.</div><div class='ctx'>    :maxdepth: 2</div><div class='ctx'> </div><div class='ctx'>    arc/index</div><div class='del'>-   arm/index</div><div class='del'>-   arm64/index</div><div class='add'>+   ../arm/index</div><div class='add'>+   ../arm64/index</div><div class='ctx'>    ia64/index</div><div class='add'>+   ../loongarch/index</div><div class='ctx'>    m68k/index</div><div class='del'>-   mips/index</div><div class='add'>+   ../mips/index</div><div class='ctx'>    nios2/index</div><div class='ctx'>    openrisc/index</div><div class='ctx'>    parisc/index</div><div class='del'>-   powerpc/index</div><div class='del'>-   riscv/index</div><div class='del'>-   s390/index</div><div class='add'>+   ../powerpc/index</div><div class='add'>+   ../riscv/index</div><div class='add'>+   ../s390/index</div><div class='ctx'>    sh/index</div><div class='ctx'>    sparc/index</div><div class='ctx'>    x86/index</div><div class='head'>diff --git a/Documentation/m68k/buddha-driver.rst b/Documentation/arch/m68k/buddha-driver.rst<br/>index 20e401413991..20e401413991 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/m68k/buddha-driver.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/m68k/buddha-driver.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/m68k/buddha-driver.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/m68k/buddha-driver.rst</a></div><div class='head'>diff --git a/Documentation/m68k/features.rst b/Documentation/arch/m68k/features.rst<br/>index 5107a2119472..5107a2119472 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/m68k/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/m68k/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/m68k/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/m68k/features.rst</a></div><div class='head'>diff --git a/Documentation/m68k/index.rst b/Documentation/arch/m68k/index.rst<br/>index 0f890dbb5fe2..0f890dbb5fe2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/m68k/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/m68k/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/m68k/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/m68k/index.rst</a></div><div class='head'>diff --git a/Documentation/m68k/kernel-options.rst b/Documentation/arch/m68k/kernel-options.rst<br/>index cabd9419740d..2008a20b4329 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/m68k/kernel-options.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/m68k/kernel-options.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/m68k/kernel-options.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/m68k/kernel-options.rst</a></div><div class='hunk'>@@ -367,8 +367,8 @@ activated by a "external:" sub-option.</div><div class='ctx'> 4.1.2) inverse</div><div class='ctx'> --------------</div><div class='ctx'> </div><div class='del'>-Invert the display. This affects both, text (consoles) and graphics</div><div class='del'>-(X) display. Usually, the background is chosen to be black. With this</div><div class='add'>+Invert the display. This affects only text consoles.</div><div class='add'>+Usually, the background is chosen to be black. With this</div><div class='ctx'> option, you can make the background white.</div><div class='ctx'> </div><div class='ctx'> 4.1.3) font</div><div class='head'>diff --git a/Documentation/nios2/features.rst b/Documentation/arch/nios2/features.rst<br/>index 8449e63f69b2..8449e63f69b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/nios2/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/nios2/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/nios2/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/nios2/features.rst</a></div><div class='head'>diff --git a/Documentation/nios2/index.rst b/Documentation/arch/nios2/index.rst<br/>index 4468fe1a1037..4468fe1a1037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/nios2/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/nios2/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/nios2/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/nios2/index.rst</a></div><div class='head'>diff --git a/Documentation/nios2/nios2.rst b/Documentation/arch/nios2/nios2.rst<br/>index 43da3f7cee76..43da3f7cee76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/nios2/nios2.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/nios2/nios2.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/nios2/nios2.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/nios2/nios2.rst</a></div><div class='head'>diff --git a/Documentation/openrisc/features.rst b/Documentation/arch/openrisc/features.rst<br/>index 3f7c40d219f2..3f7c40d219f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/openrisc/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/openrisc/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/openrisc/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/openrisc/features.rst</a></div><div class='head'>diff --git a/Documentation/openrisc/index.rst b/Documentation/arch/openrisc/index.rst<br/>index 6879f998b87a..6879f998b87a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/openrisc/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/openrisc/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/openrisc/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/openrisc/index.rst</a></div><div class='head'>diff --git a/Documentation/openrisc/openrisc_port.rst b/Documentation/arch/openrisc/openrisc_port.rst<br/>index 657ac4af7be6..657ac4af7be6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/openrisc/openrisc_port.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/openrisc/openrisc_port.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/openrisc/openrisc_port.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/openrisc/openrisc_port.rst</a></div><div class='head'>diff --git a/Documentation/openrisc/todo.rst b/Documentation/arch/openrisc/todo.rst<br/>index 420b18b87eda..420b18b87eda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/openrisc/todo.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/openrisc/todo.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/openrisc/todo.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/openrisc/todo.rst</a></div><div class='head'>diff --git a/Documentation/parisc/debugging.rst b/Documentation/arch/parisc/debugging.rst<br/>index de1b60402c5b..de1b60402c5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/parisc/debugging.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/parisc/debugging.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/parisc/debugging.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/parisc/debugging.rst</a></div><div class='head'>diff --git a/Documentation/parisc/features.rst b/Documentation/arch/parisc/features.rst<br/>index 501d7c450037..501d7c450037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/parisc/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/parisc/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/parisc/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/parisc/features.rst</a></div><div class='head'>diff --git a/Documentation/parisc/index.rst b/Documentation/arch/parisc/index.rst<br/>index 240685751825..240685751825 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/parisc/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/parisc/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/parisc/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/parisc/index.rst</a></div><div class='head'>diff --git a/Documentation/parisc/registers.rst b/Documentation/arch/parisc/registers.rst<br/>index 59c8ecf3e856..59c8ecf3e856 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/parisc/registers.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/parisc/registers.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/parisc/registers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/parisc/registers.rst</a></div><div class='head'>diff --git a/Documentation/sh/booting.rst b/Documentation/arch/sh/booting.rst<br/>index d851c49a01bf..d851c49a01bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sh/booting.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sh/booting.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sh/booting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sh/booting.rst</a></div><div class='head'>diff --git a/Documentation/sh/features.rst b/Documentation/arch/sh/features.rst<br/>index f722af3b6c99..f722af3b6c99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sh/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sh/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sh/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sh/features.rst</a></div><div class='head'>diff --git a/Documentation/sh/index.rst b/Documentation/arch/sh/index.rst<br/>index c64776738cf6..c64776738cf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sh/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sh/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sh/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sh/index.rst</a></div><div class='head'>diff --git a/Documentation/sh/new-machine.rst b/Documentation/arch/sh/new-machine.rst<br/>index e501c52b3b30..e501c52b3b30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sh/new-machine.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sh/new-machine.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sh/new-machine.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sh/new-machine.rst</a></div><div class='head'>diff --git a/Documentation/sh/register-banks.rst b/Documentation/arch/sh/register-banks.rst<br/>index 2bef5c8fcbbc..2bef5c8fcbbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sh/register-banks.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sh/register-banks.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sh/register-banks.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sh/register-banks.rst</a></div><div class='head'>diff --git a/Documentation/sparc/adi.rst b/Documentation/arch/sparc/adi.rst<br/>index 857ad30f9569..dbcd8b6e7bc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sparc/adi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sparc/adi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sparc/adi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sparc/adi.rst</a></div><div class='hunk'>@@ -38,7 +38,7 @@ virtual addresses that contain 0xa in bits 63-60.</div><div class='ctx'> </div><div class='ctx'> ADI is enabled on a set of pages using mprotect() with PROT_ADI flag.</div><div class='ctx'> When ADI is enabled on a set of pages by a task for the first time,</div><div class='del'>-kernel sets the PSTATE.mcde bit fot the task. Version tags for memory</div><div class='add'>+kernel sets the PSTATE.mcde bit for the task. Version tags for memory</div><div class='ctx'> addresses are set with an stxa instruction on the addresses using</div><div class='ctx'> ASI_MCD_PRIMARY or ASI_MCD_ST_BLKINIT_PRIMARY. ADI block size is</div><div class='ctx'> provided by the hypervisor to the kernel.  Kernel returns the value of</div><div class='hunk'>@@ -97,7 +97,7 @@ With ADI enabled, following new traps may occur:</div><div class='ctx'> Disrupting memory corruption</div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='del'>-	When a store accesses a memory localtion that has TTE.mcd=1,</div><div class='add'>+	When a store accesses a memory location that has TTE.mcd=1,</div><div class='ctx'> 	the task is running with ADI enabled (PSTATE.mcde=1), and the ADI</div><div class='ctx'> 	tag in the address used (bits 63:60) does not match the tag set on</div><div class='ctx'> 	the corresponding cacheline, a memory corruption trap occurs. By</div><div class='head'>diff --git a/Documentation/sparc/console.rst b/Documentation/arch/sparc/console.rst<br/>index 73132db83ece..73132db83ece 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sparc/console.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sparc/console.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sparc/console.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sparc/console.rst</a></div><div class='head'>diff --git a/Documentation/sparc/features.rst b/Documentation/arch/sparc/features.rst<br/>index c0c92468b0fe..c0c92468b0fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sparc/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sparc/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sparc/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sparc/features.rst</a></div><div class='head'>diff --git a/Documentation/sparc/index.rst b/Documentation/arch/sparc/index.rst<br/>index ae884224eec2..ae884224eec2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sparc/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sparc/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sparc/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sparc/index.rst</a></div><div class='head'>diff --git a/Documentation/sparc/oradax/dax-hv-api.txt b/Documentation/arch/sparc/oradax/dax-hv-api.txt<br/>index 73e8d506cf64..7ecd0bf4957b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sparc/oradax/dax-hv-api.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sparc/oradax/dax-hv-api.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sparc/oradax/dax-hv-api.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sparc/oradax/dax-hv-api.txt</a></div><div class='hunk'>@@ -22,7 +22,7 @@ Chapter 36. Coprocessor services</div><div class='ctx'>         functionality offered may vary by virtual machine implementation.</div><div class='ctx'> </div><div class='ctx'>         The DAX is a virtual device to sun4v guests, with supported data operations indicated by the virtual device</div><div class='del'>-        compatibilty property. Functionality is accessed through the submission of Command Control Blocks</div><div class='add'>+        compatibility property. Functionality is accessed through the submission of Command Control Blocks</div><div class='ctx'>         (CCBs) via the ccb_submit API function. The operations are processed asynchronously, with the status</div><div class='ctx'>         of the submitted operations reported through a Completion Area linked to each CCB. Each CCB has a</div><div class='ctx'>         separate Completion Area and, unless execution order is specifically restricted through the use of serial-</div><div class='hunk'>@@ -313,7 +313,7 @@ bits set, and terminate at a CCB that has the Conditional bit set, but not the P</div><div class='ctx'> </div><div class='ctx'>           Secondary           Input Description</div><div class='ctx'>           Format Code</div><div class='del'>-          0                          Element is stored as value minus 1 (0 evalutes to 1, 1 evalutes</div><div class='add'>+          0                          Element is stored as value minus 1 (0 evaluates to 1, 1 evaluates</div><div class='ctx'>                                      to 2, etc)</div><div class='ctx'>           1                          Element is stored as value</div><div class='ctx'> </div><div class='hunk'>@@ -659,7 +659,7 @@ Offset         Size            Field Description</div><div class='ctx'>                                             “Secondary Input Element Size”</div><div class='ctx'>                                [13:10]      Output Format (see Section 36.2.1.1.6, “Output Format”)</div><div class='ctx'>                                [9:5]        Operand size for first scan criteria value. In a scan value</div><div class='del'>-                                            operation, this is one of two potential extact match values.</div><div class='add'>+                                            operation, this is one of two potential exact match values.</div><div class='ctx'>                                             In a scan range operation, this is the size of the upper range</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -673,7 +673,7 @@ Offset   Size   Field Description</div><div class='ctx'>                              operand, minus 1. Values 0xF-0x1E are reserved. A value of</div><div class='ctx'>                              0x1F indicates this operand is not in use for this scan operation.</div><div class='ctx'>                 [4:0]        Operand size for second scan criteria value. In a scan value</div><div class='del'>-                             operation, this is one of two potential extact match values.</div><div class='add'>+                             operation, this is one of two potential exact match values.</div><div class='ctx'>                              In a scan range operation, this is the size of the lower range</div><div class='ctx'>                              boundary. The value of this field is the number of bytes in the</div><div class='ctx'>                              operand, minus 1. Values 0xF-0x1E are reserved. A value of</div><div class='hunk'>@@ -690,24 +690,24 @@ Offset   Size   Field Description</div><div class='ctx'> 48       8      Output (same fields as Primary Input)</div><div class='ctx'> 56       8      Symbol Table (if used by Primary Input). Same fields as Section 36.2.1.2,</div><div class='ctx'>                 “Extract command”</div><div class='del'>-64       4      Next 4 most significant bytes of first scan criteria operand occuring after the</div><div class='add'>+64       4      Next 4 most significant bytes of first scan criteria operand occurring after the</div><div class='ctx'>                 bytes specified at offset 40, if needed by the operand size. If first operand</div><div class='ctx'>                 is less than 8 bytes, the valid bytes are left-aligned to the lowest address.</div><div class='del'>-68       4      Next 4 most significant bytes of second scan criteria operand occuring after</div><div class='add'>+68       4      Next 4 most significant bytes of second scan criteria operand occurring after</div><div class='ctx'>                 the bytes specified at offset 44, if needed by the operand size. If second</div><div class='ctx'>                 operand is less than 8 bytes, the valid bytes are left-aligned to the lowest</div><div class='ctx'>                 address.</div><div class='del'>-72       4      Next 4 most significant bytes of first scan criteria operand occuring after the</div><div class='add'>+72       4      Next 4 most significant bytes of first scan criteria operand occurring after the</div><div class='ctx'>                 bytes specified at offset 64, if needed by the operand size. If first operand</div><div class='ctx'>                 is less than 12 bytes, the valid bytes are left-aligned to the lowest address.</div><div class='del'>-76       4      Next 4 most significant bytes of second scan criteria operand occuring after</div><div class='add'>+76       4      Next 4 most significant bytes of second scan criteria operand occurring after</div><div class='ctx'>                 the bytes specified at offset 68, if needed by the operand size. If second</div><div class='ctx'>                 operand is less than 12 bytes, the valid bytes are left-aligned to the lowest</div><div class='ctx'>                 address.</div><div class='del'>-80       4      Next 4 most significant bytes of first scan criteria operand occuring after the</div><div class='add'>+80       4      Next 4 most significant bytes of first scan criteria operand occurring after the</div><div class='ctx'>                 bytes specified at offset 72, if needed by the operand size. If first operand</div><div class='ctx'>                 is less than 16 bytes, the valid bytes are left-aligned to the lowest address.</div><div class='del'>-84       4      Next 4 most significant bytes of second scan criteria operand occuring after</div><div class='add'>+84       4      Next 4 most significant bytes of second scan criteria operand occurring after</div><div class='ctx'>                 the bytes specified at offset 76, if needed by the operand size. If second</div><div class='ctx'>                 operand is less than 16 bytes, the valid bytes are left-aligned to the lowest</div><div class='ctx'>                 address.</div><div class='hunk'>@@ -721,10 +721,10 @@ Offset   Size   Field Description</div><div class='ctx'> </div><div class='ctx'> 36.2.1.4. Translate commands</div><div class='ctx'> </div><div class='del'>-        The translate commands takes an input array of indicies, and a table of single bit values indexed by those</div><div class='del'>-        indicies, and outputs a bit vector or index array created by reading the tables bit value at each index in</div><div class='add'>+        The translate commands takes an input array of indices, and a table of single bit values indexed by those</div><div class='add'>+        indices, and outputs a bit vector or index array created by reading the tables bit value at each index in</div><div class='ctx'>         the input array. The output should therefore contain exactly one bit per index in the input data stream,</div><div class='del'>-        when outputing as a bit vector. When outputing as an index array, the number of elements depends on the</div><div class='add'>+        when outputting as a bit vector. When outputting as an index array, the number of elements depends on the</div><div class='ctx'>         values read in the bit table, but will always be less than, or equal to, the number of input elements. Only</div><div class='ctx'>         a restricted subset of the possible input format types are supported. No variable width or Huffman/OZIP</div><div class='ctx'>         encoded input streams are allowed. The primary input data element size must be 3 bytes or less.</div><div class='hunk'>@@ -742,7 +742,7 @@ Offset   Size   Field Description</div><div class='ctx'>         code in the CCB header.</div><div class='ctx'> </div><div class='ctx'>         There are two supported formats for the output stream: the bit vector and index array formats (codes 0x8,</div><div class='del'>-        0xD, and 0xE). The index array format is an array of indicies of bits which would have been set if the</div><div class='add'>+        0xD, and 0xE). The index array format is an array of indices of bits which would have been set if the</div><div class='ctx'>         output format was a bit array.</div><div class='ctx'> </div><div class='ctx'>         The return value of the CCB completion area contains the number of bits set in the output bit vector,</div><div class='hunk'>@@ -1254,7 +1254,7 @@ EUNAVAILABLE   The requested CCB operation could not be performed at this time.</div><div class='ctx'>                submitted CCB, or may apply to a larger scope. The status should not be</div><div class='ctx'>                interpreted as permanent, and the guest should attempt to submit CCBs in</div><div class='ctx'>                the future which had previously been unable to be performed. The status</div><div class='del'>-               data provides additional information about scope of the retricted availability</div><div class='add'>+               data provides additional information about scope of the restricted availability</div><div class='ctx'>                as follows:</div><div class='ctx'>                Value       Description</div><div class='ctx'>                0           Processing for the exact CCB instance submitted was unavailable,</div><div class='hunk'>@@ -1330,20 +1330,20 @@ EUNAVAILABLE   The requested CCB operation could not be performed at this time.</div><div class='ctx'>          of other CCBs ahead of the requested CCB, to provide a relative estimate of when the CCB may execute.</div><div class='ctx'> </div><div class='ctx'>          The dax return value is only valid when the state is ENQUEUED. The value returned is the DAX unit</div><div class='del'>-         instance indentifier for the DAX unit processing the queue where the requested CCB is located. The value</div><div class='add'>+         instance identifier for the DAX unit processing the queue where the requested CCB is located. The value</div><div class='ctx'>          matches the value that would have been, or was, returned by ccb_submit using the queue info flag.</div><div class='ctx'> </div><div class='ctx'>          The queue return value is only valid when the state is ENQUEUED. The value returned is the DAX</div><div class='del'>-         queue instance indentifier for the DAX unit processing the queue where the requested CCB is located. The</div><div class='add'>+         queue instance identifier for the DAX unit processing the queue where the requested CCB is located. The</div><div class='ctx'>          value matches the value that would have been, or was, returned by ccb_submit using the queue info flag.</div><div class='ctx'> </div><div class='ctx'> 36.3.2.1. Errors</div><div class='ctx'> </div><div class='del'>-          EOK                       The request was proccessed and the CCB state is valid.</div><div class='add'>+          EOK                       The request was processed and the CCB state is valid.</div><div class='ctx'>           EBADALIGN                 address is not on a 64-byte aligned.</div><div class='ctx'>           ENORADDR                  The real address provided for address is not valid.</div><div class='ctx'>           EINVAL                    The CCB completion area contents are not valid.</div><div class='del'>-          EWOULDBLOCK               Internal resource contraints prevented the CCB state from being queried at this</div><div class='add'>+          EWOULDBLOCK               Internal resource constraints prevented the CCB state from being queried at this</div><div class='ctx'>                                     time. The guest should retry the request.</div><div class='ctx'>           ENOACCESS                 The guest does not have permission to access the coprocessor virtual device</div><div class='ctx'>                                     functionality.</div><div class='hunk'>@@ -1401,11 +1401,11 @@ EUNAVAILABLE   The requested CCB operation could not be performed at this time.</div><div class='ctx'> </div><div class='ctx'> 36.3.3.2. Errors</div><div class='ctx'> </div><div class='del'>-          EOK                        The request was proccessed and the result is valid.</div><div class='add'>+          EOK                        The request was processed and the result is valid.</div><div class='ctx'>           EBADALIGN                  address is not on a 64-byte aligned.</div><div class='ctx'>           ENORADDR                   The real address provided for address is not valid.</div><div class='ctx'>           EINVAL                     The CCB completion area contents are not valid.</div><div class='del'>-          EWOULDBLOCK                Internal resource contraints prevented the CCB from being killed at this time.</div><div class='add'>+          EWOULDBLOCK                Internal resource constraints prevented the CCB from being killed at this time.</div><div class='ctx'>                                      The guest should retry the request.</div><div class='ctx'>           ENOACCESS                  The guest does not have permission to access the coprocessor virtual device</div><div class='ctx'>                                      functionality.</div><div class='hunk'>@@ -1423,7 +1423,7 @@ EUNAVAILABLE   The requested CCB operation could not be performed at this time.</div><div class='ctx'> </div><div class='ctx'> 36.3.4.1. Errors</div><div class='ctx'> </div><div class='del'>-          EOK                        The request was proccessed and the number of enabled/disabled DAX units</div><div class='add'>+          EOK                        The request was processed and the number of enabled/disabled DAX units</div><div class='ctx'>                                      are valid.</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/sparc/oradax/oracle-dax.rst b/Documentation/arch/sparc/oradax/oracle-dax.rst<br/>index d1e14d572918..d1e14d572918 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/sparc/oradax/oracle-dax.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/sparc/oradax/oracle-dax.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/sparc/oradax/oracle-dax.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/sparc/oradax/oracle-dax.rst</a></div><div class='head'>diff --git a/Documentation/x86/amd-memory-encryption.rst b/Documentation/arch/x86/amd-memory-encryption.rst<br/>index a1940ebe7be5..934310ce7258 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/amd-memory-encryption.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/amd-memory-encryption.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/amd-memory-encryption.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/amd-memory-encryption.rst</a></div><div class='hunk'>@@ -95,3 +95,39 @@ by supplying mem_encrypt=on on the kernel command line.  However, if BIOS does</div><div class='ctx'> not enable SME, then Linux will not be able to activate memory encryption, even</div><div class='ctx'> if configured to do so by default or the mem_encrypt=on command line parameter</div><div class='ctx'> is specified.</div><div class='add'>+</div><div class='add'>+Secure Nested Paging (SNP)</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+SEV-SNP introduces new features (SEV_FEATURES[1:63]) which can be enabled</div><div class='add'>+by the hypervisor for security enhancements. Some of these features need</div><div class='add'>+guest side implementation to function correctly. The below table lists the</div><div class='add'>+expected guest behavior with various possible scenarios of guest/hypervisor</div><div class='add'>+SNP feature support.</div><div class='add'>+</div><div class='add'>++-----------------+---------------+---------------+------------------+</div><div class='add'>+| Feature Enabled | Guest needs   | Guest has     | Guest boot       |</div><div class='add'>+| by the HV       | implementation| implementation| behaviour        |</div><div class='add'>++=================+===============+===============+==================+</div><div class='add'>+|      No         |      No       |      No       |     Boot         |</div><div class='add'>+|                 |               |               |                  |</div><div class='add'>++-----------------+---------------+---------------+------------------+</div><div class='add'>+|      No         |      Yes      |      No       |     Boot         |</div><div class='add'>+|                 |               |               |                  |</div><div class='add'>++-----------------+---------------+---------------+------------------+</div><div class='add'>+|      No         |      Yes      |      Yes      |     Boot         |</div><div class='add'>+|                 |               |               |                  |</div><div class='add'>++-----------------+---------------+---------------+------------------+</div><div class='add'>+|      Yes        |      No       |      No       | Boot with        |</div><div class='add'>+|                 |               |               | feature enabled  |</div><div class='add'>++-----------------+---------------+---------------+------------------+</div><div class='add'>+|      Yes        |      Yes      |      No       | Graceful boot    |</div><div class='add'>+|                 |               |               | failure          |</div><div class='add'>++-----------------+---------------+---------------+------------------+</div><div class='add'>+|      Yes        |      Yes      |      Yes      | Boot with        |</div><div class='add'>+|                 |               |               | feature enabled  |</div><div class='add'>++-----------------+---------------+---------------+------------------+</div><div class='add'>+</div><div class='add'>+More details in AMD64 APM[1] Vol 2: 15.34.10 SEV_STATUS MSR</div><div class='add'>+</div><div class='add'>+[1] https://www.amd.com/system/files/TechDocs/40332.pdf</div><div class='head'>diff --git a/Documentation/x86/amd_hsmp.rst b/Documentation/arch/x86/amd_hsmp.rst<br/>index 440e4b645a1c..440e4b645a1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/amd_hsmp.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/amd_hsmp.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/amd_hsmp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/amd_hsmp.rst</a></div><div class='head'>diff --git a/Documentation/x86/boot.rst b/Documentation/arch/x86/boot.rst<br/>index 894a19897005..33520ecdb37a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/boot.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/boot.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/boot.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/boot.rst</a></div><div class='hunk'>@@ -455,6 +455,7 @@ Protocol:	2.00+</div><div class='ctx'> 	11 Minimal Linux Bootloader</div><div class='ctx'> 	   &lt;http://sebastian-plotz.blogspot.de&gt;</div><div class='ctx'> 	12 OVMF UEFI virtualization stack</div><div class='add'>+	13 barebox</div><div class='ctx'> 	== =======================================</div><div class='ctx'> </div><div class='ctx'>   Please contact &lt;hpa@zytor.com&gt; if you need a bootloader ID value assigned.</div><div class='hunk'>@@ -1343,7 +1344,7 @@ follow::</div><div class='ctx'> In addition to read/modify/write the setup header of the struct</div><div class='ctx'> boot_params as that of 16-bit boot protocol, the boot loader should</div><div class='ctx'> also fill the additional fields of the struct boot_params as</div><div class='del'>-described in chapter Documentation/x86/zero-page.rst.</div><div class='add'>+described in chapter Documentation/arch/x86/zero-page.rst.</div><div class='ctx'> </div><div class='ctx'> After setting up the struct boot_params, the boot loader can load the</div><div class='ctx'> 32/64-bit kernel in the same way as that of 16-bit boot protocol.</div><div class='hunk'>@@ -1379,7 +1380,7 @@ can be calculated as follows::</div><div class='ctx'> In addition to read/modify/write the setup header of the struct</div><div class='ctx'> boot_params as that of 16-bit boot protocol, the boot loader should</div><div class='ctx'> also fill the additional fields of the struct boot_params as described</div><div class='del'>-in chapter Documentation/x86/zero-page.rst.</div><div class='add'>+in chapter Documentation/arch/x86/zero-page.rst.</div><div class='ctx'> </div><div class='ctx'> After setting up the struct boot_params, the boot loader can load</div><div class='ctx'> 64-bit kernel in the same way as that of 16-bit boot protocol, but</div><div class='head'>diff --git a/Documentation/x86/booting-dt.rst b/Documentation/arch/x86/booting-dt.rst<br/>index 965a374071ab..b089ffd56e6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/booting-dt.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/booting-dt.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/booting-dt.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/booting-dt.rst</a></div><div class='hunk'>@@ -7,7 +7,7 @@ DeviceTree Booting</div><div class='ctx'>   the decompressor (the real mode entry point goes to the same  32bit</div><div class='ctx'>   entry point once it switched into protected mode). That entry point</div><div class='ctx'>   supports one calling convention which is documented in</div><div class='del'>-  Documentation/x86/boot.rst</div><div class='add'>+  Documentation/arch/x86/boot.rst</div><div class='ctx'>   The physical pointer to the device-tree block is passed via setup_data</div><div class='ctx'>   which requires at least boot protocol 2.09.</div><div class='ctx'>   The type filed is defined as</div><div class='head'>diff --git a/Documentation/x86/buslock.rst b/Documentation/arch/x86/buslock.rst<br/>index 7c051e714943..31ec0ef78086 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/buslock.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/buslock.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/buslock.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/buslock.rst</a></div><div class='hunk'>@@ -53,8 +53,14 @@ parameter "split_lock_detect". Here is a summary of different options:</div><div class='ctx'> |off	  	   |Do nothing			|Do nothing		|</div><div class='ctx'> +------------------+----------------------------+-----------------------+</div><div class='ctx'> |warn		   |Kernel OOPs			|Warn once per task and |</div><div class='del'>-|(default)	   |Warn once per task and	|and continues to run.  |</div><div class='del'>-|		   |disable future checking	|			|</div><div class='add'>+|(default)	   |Warn once per task, add a	|and continues to run.  |</div><div class='add'>+|		   |delay, add synchronization	|			|</div><div class='add'>+|		   |to prevent more than one	|			|</div><div class='add'>+|		   |core from executing a	|			|</div><div class='add'>+|		   |split lock in parallel.	|			|</div><div class='add'>+|		   |sysctl split_lock_mitigate	|			|</div><div class='add'>+|		   |can be used to avoid the	|			|</div><div class='add'>+|		   |delay and synchronization	|			|</div><div class='ctx'> |		   |When both features are	|			|</div><div class='ctx'> |		   |supported, warn in #AC	|			|</div><div class='ctx'> +------------------+----------------------------+-----------------------+</div><div class='head'>diff --git a/Documentation/x86/cpuinfo.rst b/Documentation/arch/x86/cpuinfo.rst<br/>index 5d54c39a063f..08246e8ac835 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/cpuinfo.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/cpuinfo.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/cpuinfo.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/cpuinfo.rst</a></div><div class='hunk'>@@ -140,9 +140,8 @@ from #define X86_FEATURE_UMIP (16*32 + 2).</div><div class='ctx'> </div><div class='ctx'> In addition, there exists a variety of custom command-line parameters that</div><div class='ctx'> disable specific features. The list of parameters includes, but is not limited</div><div class='del'>-to, nofsgsbase, nosmap, and nosmep. 5-level paging can also be disabled using</div><div class='del'>-"no5lvl". SMAP and SMEP are disabled with the aforementioned parameters,</div><div class='del'>-respectively.</div><div class='add'>+to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using</div><div class='add'>+"no5lvl".</div><div class='ctx'> </div><div class='ctx'> e: The feature was known to be non-functional.</div><div class='ctx'> ----------------------------------------------</div><div class='head'>diff --git a/Documentation/x86/earlyprintk.rst b/Documentation/arch/x86/earlyprintk.rst<br/>index 51ef11e8f725..51ef11e8f725 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/earlyprintk.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/earlyprintk.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/earlyprintk.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/earlyprintk.rst</a></div><div class='head'>diff --git a/Documentation/x86/elf_auxvec.rst b/Documentation/arch/x86/elf_auxvec.rst<br/>index 18e4744717f9..18e4744717f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/elf_auxvec.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/elf_auxvec.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/elf_auxvec.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/elf_auxvec.rst</a></div><div class='head'>diff --git a/Documentation/x86/entry_64.rst b/Documentation/arch/x86/entry_64.rst<br/>index e433e08f7018..0afdce3c06f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/entry_64.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/entry_64.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/entry_64.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/entry_64.rst</a></div><div class='hunk'>@@ -33,8 +33,8 @@ Some of these entries are:</div><div class='ctx'>  - interrupt: An array of entries.  Every IDT vector that doesn't</div><div class='ctx'>    explicitly point somewhere else gets set to the corresponding</div><div class='ctx'>    value in interrupts.  These point to a whole array of</div><div class='del'>-   magically-generated functions that make their way to do_IRQ with</div><div class='del'>-   the interrupt number as a parameter.</div><div class='add'>+   magically-generated functions that make their way to common_interrupt()</div><div class='add'>+   with the interrupt number as a parameter.</div><div class='ctx'> </div><div class='ctx'>  - APIC interrupts: Various special-purpose interrupts for things</div><div class='ctx'>    like TLB shootdown.</div><div class='head'>diff --git a/Documentation/x86/exception-tables.rst b/Documentation/arch/x86/exception-tables.rst<br/>index de58110c5ffd..efde1fef4fbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/exception-tables.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/exception-tables.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/exception-tables.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/exception-tables.rst</a></div><div class='hunk'>@@ -32,14 +32,14 @@ Whenever the kernel tries to access an address that is currently not</div><div class='ctx'> accessible, the CPU generates a page fault exception and calls the</div><div class='ctx'> page fault handler::</div><div class='ctx'> </div><div class='del'>-  void do_page_fault(struct pt_regs *regs, unsigned long error_code)</div><div class='add'>+  void exc_page_fault(struct pt_regs *regs, unsigned long error_code)</div><div class='ctx'> </div><div class='ctx'> in arch/x86/mm/fault.c. The parameters on the stack are set up by</div><div class='ctx'> the low level assembly glue in arch/x86/entry/entry_32.S. The parameter</div><div class='ctx'> regs is a pointer to the saved registers on the stack, error_code</div><div class='ctx'> contains a reason code for the exception.</div><div class='ctx'> </div><div class='del'>-do_page_fault first obtains the unaccessible address from the CPU</div><div class='add'>+exc_page_fault() first obtains the inaccessible address from the CPU</div><div class='ctx'> control register CR2. If the address is within the virtual address</div><div class='ctx'> space of the process, the fault probably occurred, because the page</div><div class='ctx'> was not swapped in, write protected or something similar. However,</div><div class='hunk'>@@ -57,10 +57,10 @@ Where does fixup point to?</div><div class='ctx'> </div><div class='ctx'> Since we jump to the contents of fixup, fixup obviously points</div><div class='ctx'> to executable code. This code is hidden inside the user access macros.</div><div class='del'>-I have picked the get_user macro defined in arch/x86/include/asm/uaccess.h</div><div class='add'>+I have picked the get_user() macro defined in arch/x86/include/asm/uaccess.h</div><div class='ctx'> as an example. The definition is somewhat hard to follow, so let's peek at</div><div class='ctx'> the code generated by the preprocessor and the compiler. I selected</div><div class='del'>-the get_user call in drivers/char/sysrq.c for a detailed examination.</div><div class='add'>+the get_user() call in drivers/char/sysrq.c for a detailed examination.</div><div class='ctx'> </div><div class='ctx'> The original code in sysrq.c line 587::</div><div class='ctx'> </div><div class='hunk'>@@ -281,12 +281,15 @@ vma occurs?</div><div class='ctx'> </div><div class='ctx'>     &gt; c017e7a5 &lt;do_con_write+e1&gt; movb   (%ebx),%dl</div><div class='ctx'> #. MMU generates exception</div><div class='del'>-#. CPU calls do_page_fault</div><div class='del'>-#. do page fault calls search_exception_table (regs-&gt;eip == c017e7a5);</div><div class='del'>-#. search_exception_table looks up the address c017e7a5 in the</div><div class='add'>+#. CPU calls exc_page_fault()</div><div class='add'>+#. exc_page_fault() calls do_user_addr_fault()</div><div class='add'>+#. do_user_addr_fault() calls kernelmode_fixup_or_oops()</div><div class='add'>+#. kernelmode_fixup_or_oops() calls fixup_exception() (regs-&gt;eip == c017e7a5);</div><div class='add'>+#. fixup_exception() calls search_exception_tables()</div><div class='add'>+#. search_exception_tables() looks up the address c017e7a5 in the</div><div class='ctx'>    exception table (i.e. the contents of the ELF section __ex_table)</div><div class='ctx'>    and returns the address of the associated fault handle code c0199ff5.</div><div class='del'>-#. do_page_fault modifies its own return address to point to the fault</div><div class='add'>+#. fixup_exception() modifies its own return address to point to the fault</div><div class='ctx'>    handle code and returns.</div><div class='ctx'> #. execution continues in the fault handling code.</div><div class='ctx'> #. a) EAX becomes -EFAULT (== -14)</div><div class='hunk'>@@ -298,9 +301,9 @@ The steps 8a to 8c in a certain way emulate the faulting instruction.</div><div class='ctx'> </div><div class='ctx'> That's it, mostly. If you look at our example, you might ask why</div><div class='ctx'> we set EAX to -EFAULT in the exception handler code. Well, the</div><div class='del'>-get_user macro actually returns a value: 0, if the user access was</div><div class='add'>+get_user() macro actually returns a value: 0, if the user access was</div><div class='ctx'> successful, -EFAULT on failure. Our original code did not test this</div><div class='del'>-return value, however the inline assembly code in get_user tries to</div><div class='add'>+return value, however the inline assembly code in get_user() tries to</div><div class='ctx'> return -EFAULT. GCC selected EAX to return this value.</div><div class='ctx'> </div><div class='ctx'> NOTE:</div><div class='head'>diff --git a/Documentation/x86/features.rst b/Documentation/arch/x86/features.rst<br/>index b663f15053ce..b663f15053ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/features.rst</a></div><div class='head'>diff --git a/Documentation/x86/i386/IO-APIC.rst b/Documentation/arch/x86/i386/IO-APIC.rst<br/>index ce4d8df15e7c..ce4d8df15e7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/i386/IO-APIC.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/i386/IO-APIC.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/i386/IO-APIC.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/i386/IO-APIC.rst</a></div><div class='head'>diff --git a/Documentation/x86/i386/index.rst b/Documentation/arch/x86/i386/index.rst<br/>index 8747cf5bbd49..8747cf5bbd49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/i386/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/i386/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/i386/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/i386/index.rst</a></div><div class='head'>diff --git a/Documentation/arch/x86/ifs.rst b/Documentation/arch/x86/ifs.rst<br/>new file mode 100644<br/>index 000000000000..97abb696a680<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/ifs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/ifs.rst</a></div><div class='hunk'>@@ -0,0 +1,2 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+.. kernel-doc:: drivers/platform/x86/intel/ifs/ifs.h</div><div class='head'>diff --git a/Documentation/x86/index.rst b/Documentation/arch/x86/index.rst<br/>index 91b2fa456618..c73d133fd37c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/index.rst</a></div><div class='hunk'>@@ -22,10 +22,11 @@ x86-specific Documentation</div><div class='ctx'>    mtrr</div><div class='ctx'>    pat</div><div class='ctx'>    intel-hfi</div><div class='del'>-   intel-iommu</div><div class='add'>+   iommu</div><div class='ctx'>    intel_txt</div><div class='ctx'>    amd-memory-encryption</div><div class='ctx'>    amd_hsmp</div><div class='add'>+   tdx</div><div class='ctx'>    pti</div><div class='ctx'>    mds</div><div class='ctx'>    microcode</div><div class='hunk'>@@ -35,6 +36,7 @@ x86-specific Documentation</div><div class='ctx'>    usb-legacy-support</div><div class='ctx'>    i386/index</div><div class='ctx'>    x86_64/index</div><div class='add'>+   ifs</div><div class='ctx'>    sva</div><div class='ctx'>    sgx</div><div class='ctx'>    features</div><div class='head'>diff --git a/Documentation/x86/intel-hfi.rst b/Documentation/arch/x86/intel-hfi.rst<br/>index 49dea58ea4fb..49dea58ea4fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/intel-hfi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/intel-hfi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/intel-hfi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/intel-hfi.rst</a></div><div class='head'>diff --git a/Documentation/x86/intel_txt.rst b/Documentation/arch/x86/intel_txt.rst<br/>index d83c1a2122c9..d83c1a2122c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/intel_txt.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/intel_txt.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/intel_txt.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/intel_txt.rst</a></div><div class='head'>diff --git a/Documentation/arch/x86/iommu.rst b/Documentation/arch/x86/iommu.rst<br/>new file mode 100644<br/>index 000000000000..42c7a6faa39a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/iommu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/iommu.rst</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+=================</div><div class='add'>+x86 IOMMU Support</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+The architecture specs can be obtained from the below locations.</div><div class='add'>+</div><div class='add'>+- Intel: http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf</div><div class='add'>+- AMD: https://www.amd.com/system/files/TechDocs/48882_IOMMU.pdf</div><div class='add'>+</div><div class='add'>+This guide gives a quick cheat sheet for some basic understanding.</div><div class='add'>+</div><div class='add'>+Basic stuff</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+ACPI enumerates and lists the different IOMMUs on the platform, and</div><div class='add'>+device scope relationships between devices and which IOMMU controls</div><div class='add'>+them.</div><div class='add'>+</div><div class='add'>+Some ACPI Keywords:</div><div class='add'>+</div><div class='add'>+- DMAR - Intel DMA Remapping table</div><div class='add'>+- DRHD - Intel DMA Remapping Hardware Unit Definition</div><div class='add'>+- RMRR - Intel Reserved Memory Region Reporting Structure</div><div class='add'>+- IVRS - AMD I/O Virtualization Reporting Structure</div><div class='add'>+- IVDB - AMD I/O Virtualization Definition Block</div><div class='add'>+- IVHD - AMD I/O Virtualization Hardware Definition</div><div class='add'>+</div><div class='add'>+What is Intel RMRR?</div><div class='add'>+^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+There are some devices the BIOS controls, for e.g USB devices to perform</div><div class='add'>+PS2 emulation. The regions of memory used for these devices are marked</div><div class='add'>+reserved in the e820 map. When we turn on DMA translation, DMA to those</div><div class='add'>+regions will fail. Hence BIOS uses RMRR to specify these regions along with</div><div class='add'>+devices that need to access these regions. OS is expected to setup</div><div class='add'>+unity mappings for these regions for these devices to access these regions.</div><div class='add'>+</div><div class='add'>+What is AMD IVRS?</div><div class='add'>+^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The architecture defines an ACPI-compatible data structure called an I/O</div><div class='add'>+Virtualization Reporting Structure (IVRS) that is used to convey information</div><div class='add'>+related to I/O virtualization to system software.  The IVRS describes the</div><div class='add'>+configuration and capabilities of the IOMMUs contained in the platform as</div><div class='add'>+well as information about the devices that each IOMMU virtualizes.</div><div class='add'>+</div><div class='add'>+The IVRS provides information about the following:</div><div class='add'>+</div><div class='add'>+- IOMMUs present in the platform including their capabilities and proper configuration</div><div class='add'>+- System I/O topology relevant to each IOMMU</div><div class='add'>+- Peripheral devices that cannot be otherwise enumerated</div><div class='add'>+- Memory regions used by SMI/SMM, platform firmware, and platform hardware. These are generally exclusion ranges to be configured by system software.</div><div class='add'>+</div><div class='add'>+How is an I/O Virtual Address (IOVA) generated?</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+Well behaved drivers call dma_map_*() calls before sending command to device</div><div class='add'>+that needs to perform DMA. Once DMA is completed and mapping is no longer</div><div class='add'>+required, driver performs dma_unmap_*() calls to unmap the region.</div><div class='add'>+</div><div class='add'>+Intel Specific Notes</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Graphics Problems?</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+If you encounter issues with graphics devices, you can try adding</div><div class='add'>+option intel_iommu=igfx_off to turn off the integrated graphics engine.</div><div class='add'>+If this fixes anything, please ensure you file a bug reporting the problem.</div><div class='add'>+</div><div class='add'>+Some exceptions to IOVA</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Interrupt ranges are not address translated, (0xfee00000 - 0xfeefffff).</div><div class='add'>+The same is true for peer to peer transactions. Hence we reserve the</div><div class='add'>+address from PCI MMIO ranges so they are not allocated for IOVA addresses.</div><div class='add'>+</div><div class='add'>+AMD Specific Notes</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Graphics Problems?</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+If you encounter issues with integrated graphics devices, you can try adding</div><div class='add'>+option iommu=pt to the kernel command line use a 1:1 mapping for the IOMMU.  If</div><div class='add'>+this fixes anything, please ensure you file a bug reporting the problem.</div><div class='add'>+</div><div class='add'>+Fault reporting</div><div class='add'>+---------------</div><div class='add'>+When errors are reported, the IOMMU signals via an interrupt. The fault</div><div class='add'>+reason and device that caused it is printed on the console.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Kernel Log Samples</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Intel Boot Messages</div><div class='add'>+^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Something like this gets printed indicating presence of DMAR tables</div><div class='add'>+in ACPI:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	ACPI: DMAR (v001 A M I  OEMDMAR  0x00000001 MSFT 0x00000097) @ 0x000000007f5b5ef0</div><div class='add'>+</div><div class='add'>+When DMAR is being processed and initialized by ACPI, prints DMAR locations</div><div class='add'>+and any RMRR's processed:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	ACPI DMAR:Host address width 36</div><div class='add'>+	ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed90000</div><div class='add'>+	ACPI DMAR:DRHD (flags: 0x00000000)base: 0x00000000fed91000</div><div class='add'>+	ACPI DMAR:DRHD (flags: 0x00000001)base: 0x00000000fed93000</div><div class='add'>+	ACPI DMAR:RMRR base: 0x00000000000ed000 end: 0x00000000000effff</div><div class='add'>+	ACPI DMAR:RMRR base: 0x000000007f600000 end: 0x000000007fffffff</div><div class='add'>+</div><div class='add'>+When DMAR is enabled for use, you will notice:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	PCI-DMA: Using DMAR IOMMU</div><div class='add'>+</div><div class='add'>+Intel Fault reporting</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000</div><div class='add'>+	DMAR:[fault reason 05] PTE Write access is not set</div><div class='add'>+	DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000</div><div class='add'>+	DMAR:[fault reason 05] PTE Write access is not set</div><div class='add'>+</div><div class='add'>+AMD Boot Messages</div><div class='add'>+^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Something like this gets printed indicating presence of the IOMMU:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	iommu: Default domain type: Translated</div><div class='add'>+	iommu: DMA domain TLB invalidation policy: lazy mode</div><div class='add'>+</div><div class='add'>+AMD Fault reporting</div><div class='add'>+^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	AMD-Vi: Event logged [IO_PAGE_FAULT domain=0x0007 address=0xffffc02000 flags=0x0000]</div><div class='add'>+	AMD-Vi: Event logged [IO_PAGE_FAULT device=07:00.0 domain=0x0007 address=0xffffc02000 flags=0x0000]</div><div class='head'>diff --git a/Documentation/x86/kernel-stacks.rst b/Documentation/arch/x86/kernel-stacks.rst<br/>index 6b0bcf027ff1..738671a4070b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/kernel-stacks.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/kernel-stacks.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/kernel-stacks.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/kernel-stacks.rst</a></div><div class='hunk'>@@ -12,7 +12,7 @@ Most of the text from Keith Owens, hacked by AK</div><div class='ctx'> x86_64 page size (PAGE_SIZE) is 4K.</div><div class='ctx'> </div><div class='ctx'> Like all other architectures, x86_64 has a kernel stack for every</div><div class='del'>-active thread.  These thread stacks are THREAD_SIZE (2*PAGE_SIZE) big.</div><div class='add'>+active thread.  These thread stacks are THREAD_SIZE (4*PAGE_SIZE) big.</div><div class='ctx'> These stacks contain useful data as long as a thread is alive or a</div><div class='ctx'> zombie. While the thread is in user space the kernel stack is empty</div><div class='ctx'> except for the thread_info structure at the bottom.</div><div class='head'>diff --git a/Documentation/x86/mds.rst b/Documentation/arch/x86/mds.rst<br/>index 5d4330be200f..5d4330be200f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/mds.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/mds.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/mds.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/mds.rst</a></div><div class='head'>diff --git a/Documentation/arch/x86/microcode.rst b/Documentation/arch/x86/microcode.rst<br/>new file mode 100644<br/>index 000000000000..b627c6f36bcf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/microcode.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/microcode.rst</a></div><div class='hunk'>@@ -0,0 +1,240 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==========================</div><div class='add'>+The Linux Microcode Loader</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+:Authors: - Fenghua Yu &lt;fenghua.yu@intel.com&gt;</div><div class='add'>+          - Borislav Petkov &lt;bp@suse.de&gt;</div><div class='add'>+	  - Ashok Raj &lt;ashok.raj@intel.com&gt;</div><div class='add'>+</div><div class='add'>+The kernel has a x86 microcode loading facility which is supposed to</div><div class='add'>+provide microcode loading methods in the OS. Potential use cases are</div><div class='add'>+updating the microcode on platforms beyond the OEM End-Of-Life support,</div><div class='add'>+and updating the microcode on long-running systems without rebooting.</div><div class='add'>+</div><div class='add'>+The loader supports three loading methods:</div><div class='add'>+</div><div class='add'>+Early load microcode</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+The kernel can update microcode very early during boot. Loading</div><div class='add'>+microcode early can fix CPU issues before they are observed during</div><div class='add'>+kernel boot time.</div><div class='add'>+</div><div class='add'>+The microcode is stored in an initrd file. During boot, it is read from</div><div class='add'>+it and loaded into the CPU cores.</div><div class='add'>+</div><div class='add'>+The format of the combined initrd image is microcode in (uncompressed)</div><div class='add'>+cpio format followed by the (possibly compressed) initrd image. The</div><div class='add'>+loader parses the combined initrd image during boot.</div><div class='add'>+</div><div class='add'>+The microcode files in cpio name space are:</div><div class='add'>+</div><div class='add'>+on Intel:</div><div class='add'>+  kernel/x86/microcode/GenuineIntel.bin</div><div class='add'>+on AMD  :</div><div class='add'>+  kernel/x86/microcode/AuthenticAMD.bin</div><div class='add'>+</div><div class='add'>+During BSP (BootStrapping Processor) boot (pre-SMP), the kernel</div><div class='add'>+scans the microcode file in the initrd. If microcode matching the</div><div class='add'>+CPU is found, it will be applied in the BSP and later on in all APs</div><div class='add'>+(Application Processors).</div><div class='add'>+</div><div class='add'>+The loader also saves the matching microcode for the CPU in memory.</div><div class='add'>+Thus, the cached microcode patch is applied when CPUs resume from a</div><div class='add'>+sleep state.</div><div class='add'>+</div><div class='add'>+Here's a crude example how to prepare an initrd with microcode (this is</div><div class='add'>+normally done automatically by the distribution, when recreating the</div><div class='add'>+initrd, so you don't really have to do it yourself. It is documented</div><div class='add'>+here for future reference only).</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  #!/bin/bash</div><div class='add'>+</div><div class='add'>+  if [ -z "$1" ]; then</div><div class='add'>+      echo "You need to supply an initrd file"</div><div class='add'>+      exit 1</div><div class='add'>+  fi</div><div class='add'>+</div><div class='add'>+  INITRD="$1"</div><div class='add'>+</div><div class='add'>+  DSTDIR=kernel/x86/microcode</div><div class='add'>+  TMPDIR=/tmp/initrd</div><div class='add'>+</div><div class='add'>+  rm -rf $TMPDIR</div><div class='add'>+</div><div class='add'>+  mkdir $TMPDIR</div><div class='add'>+  cd $TMPDIR</div><div class='add'>+  mkdir -p $DSTDIR</div><div class='add'>+</div><div class='add'>+  if [ -d /lib/firmware/amd-ucode ]; then</div><div class='add'>+          cat /lib/firmware/amd-ucode/microcode_amd*.bin &gt; $DSTDIR/AuthenticAMD.bin</div><div class='add'>+  fi</div><div class='add'>+</div><div class='add'>+  if [ -d /lib/firmware/intel-ucode ]; then</div><div class='add'>+          cat /lib/firmware/intel-ucode/* &gt; $DSTDIR/GenuineIntel.bin</div><div class='add'>+  fi</div><div class='add'>+</div><div class='add'>+  find . | cpio -o -H newc &gt;../ucode.cpio</div><div class='add'>+  cd ..</div><div class='add'>+  mv $INITRD $INITRD.orig</div><div class='add'>+  cat ucode.cpio $INITRD.orig &gt; $INITRD</div><div class='add'>+</div><div class='add'>+  rm -rf $TMPDIR</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The system needs to have the microcode packages installed into</div><div class='add'>+/lib/firmware or you need to fixup the paths above if yours are</div><div class='add'>+somewhere else and/or you've downloaded them directly from the processor</div><div class='add'>+vendor's site.</div><div class='add'>+</div><div class='add'>+Late loading</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+You simply install the microcode packages your distro supplies and</div><div class='add'>+run::</div><div class='add'>+</div><div class='add'>+  # echo 1 &gt; /sys/devices/system/cpu/microcode/reload</div><div class='add'>+</div><div class='add'>+as root.</div><div class='add'>+</div><div class='add'>+The loading mechanism looks for microcode blobs in</div><div class='add'>+/lib/firmware/{intel-ucode,amd-ucode}. The default distro installation</div><div class='add'>+packages already put them there.</div><div class='add'>+</div><div class='add'>+Since kernel 5.19, late loading is not enabled by default.</div><div class='add'>+</div><div class='add'>+The /dev/cpu/microcode method has been removed in 5.19.</div><div class='add'>+</div><div class='add'>+Why is late loading dangerous?</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+Synchronizing all CPUs</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+The microcode engine which receives the microcode update is shared</div><div class='add'>+between the two logical threads in a SMT system. Therefore, when</div><div class='add'>+the update is executed on one SMT thread of the core, the sibling</div><div class='add'>+"automatically" gets the update.</div><div class='add'>+</div><div class='add'>+Since the microcode can "simulate" MSRs too, while the microcode update</div><div class='add'>+is in progress, those simulated MSRs transiently cease to exist. This</div><div class='add'>+can result in unpredictable results if the SMT sibling thread happens to</div><div class='add'>+be in the middle of an access to such an MSR. The usual observation is</div><div class='add'>+that such MSR accesses cause #GPs to be raised to signal that former are</div><div class='add'>+not present.</div><div class='add'>+</div><div class='add'>+The disappearing MSRs are just one common issue which is being observed.</div><div class='add'>+Any other instruction that's being patched and gets concurrently</div><div class='add'>+executed by the other SMT sibling, can also result in similar,</div><div class='add'>+unpredictable behavior.</div><div class='add'>+</div><div class='add'>+To eliminate this case, a stop_machine()-based CPU synchronization was</div><div class='add'>+introduced as a way to guarantee that all logical CPUs will not execute</div><div class='add'>+any code but just wait in a spin loop, polling an atomic variable.</div><div class='add'>+</div><div class='add'>+While this took care of device or external interrupts, IPIs including</div><div class='add'>+LVT ones, such as CMCI etc, it cannot address other special interrupts</div><div class='add'>+that can't be shut off. Those are Machine Check (#MC), System Management</div><div class='add'>+(#SMI) and Non-Maskable interrupts (#NMI).</div><div class='add'>+</div><div class='add'>+Machine Checks</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Machine Checks (#MC) are non-maskable. There are two kinds of MCEs.</div><div class='add'>+Fatal un-recoverable MCEs and recoverable MCEs. While un-recoverable</div><div class='add'>+errors are fatal, recoverable errors can also happen in kernel context</div><div class='add'>+are also treated as fatal by the kernel.</div><div class='add'>+</div><div class='add'>+On certain Intel machines, MCEs are also broadcast to all threads in a</div><div class='add'>+system. If one thread is in the middle of executing WRMSR, a MCE will be</div><div class='add'>+taken at the end of the flow. Either way, they will wait for the thread</div><div class='add'>+performing the wrmsr(0x79) to rendezvous in the MCE handler and shutdown</div><div class='add'>+eventually if any of the threads in the system fail to check in to the</div><div class='add'>+MCE rendezvous.</div><div class='add'>+</div><div class='add'>+To be paranoid and get predictable behavior, the OS can choose to set</div><div class='add'>+MCG_STATUS.MCIP. Since MCEs can be at most one in a system, if an</div><div class='add'>+MCE was signaled, the above condition will promote to a system reset</div><div class='add'>+automatically. OS can turn off MCIP at the end of the update for that</div><div class='add'>+core.</div><div class='add'>+</div><div class='add'>+System Management Interrupt</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+SMIs are also broadcast to all CPUs in the platform. Microcode update</div><div class='add'>+requests exclusive access to the core before writing to MSR 0x79. So if</div><div class='add'>+it does happen such that, one thread is in WRMSR flow, and the 2nd got</div><div class='add'>+an SMI, that thread will be stopped in the first instruction in the SMI</div><div class='add'>+handler.</div><div class='add'>+</div><div class='add'>+Since the secondary thread is stopped in the first instruction in SMI,</div><div class='add'>+there is very little chance that it would be in the middle of executing</div><div class='add'>+an instruction being patched. Plus OS has no way to stop SMIs from</div><div class='add'>+happening.</div><div class='add'>+</div><div class='add'>+Non-Maskable Interrupts</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+When thread0 of a core is doing the microcode update, if thread1 is</div><div class='add'>+pulled into NMI, that can cause unpredictable behavior due to the</div><div class='add'>+reasons above.</div><div class='add'>+</div><div class='add'>+OS can choose a variety of methods to avoid running into this situation.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Is the microcode suitable for late loading?</div><div class='add'>+-------------------------------------------</div><div class='add'>+</div><div class='add'>+Late loading is done when the system is fully operational and running</div><div class='add'>+real workloads. Late loading behavior depends on what the base patch on</div><div class='add'>+the CPU is before upgrading to the new patch.</div><div class='add'>+</div><div class='add'>+This is true for Intel CPUs.</div><div class='add'>+</div><div class='add'>+Consider, for example, a CPU has patch level 1 and the update is to</div><div class='add'>+patch level 3.</div><div class='add'>+</div><div class='add'>+Between patch1 and patch3, patch2 might have deprecated a software-visible</div><div class='add'>+feature.</div><div class='add'>+</div><div class='add'>+This is unacceptable if software is even potentially using that feature.</div><div class='add'>+For instance, say MSR_X is no longer available after an update,</div><div class='add'>+accessing that MSR will cause a #GP fault.</div><div class='add'>+</div><div class='add'>+Basically there is no way to declare a new microcode update suitable</div><div class='add'>+for late-loading. This is another one of the problems that caused late</div><div class='add'>+loading to be not enabled by default.</div><div class='add'>+</div><div class='add'>+Builtin microcode</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+The loader supports also loading of a builtin microcode supplied through</div><div class='add'>+the regular builtin firmware method CONFIG_EXTRA_FIRMWARE. Only 64-bit is</div><div class='add'>+currently supported.</div><div class='add'>+</div><div class='add'>+Here's an example::</div><div class='add'>+</div><div class='add'>+  CONFIG_EXTRA_FIRMWARE="intel-ucode/06-3a-09 amd-ucode/microcode_amd_fam15h.bin"</div><div class='add'>+  CONFIG_EXTRA_FIRMWARE_DIR="/lib/firmware"</div><div class='add'>+</div><div class='add'>+This basically means, you have the following tree structure locally::</div><div class='add'>+</div><div class='add'>+  /lib/firmware/</div><div class='add'>+  |-- amd-ucode</div><div class='add'>+  ...</div><div class='add'>+  |   |-- microcode_amd_fam15h.bin</div><div class='add'>+  ...</div><div class='add'>+  |-- intel-ucode</div><div class='add'>+  ...</div><div class='add'>+  |   |-- 06-3a-09</div><div class='add'>+  ...</div><div class='add'>+</div><div class='add'>+so that the build system can find those files and integrate them into</div><div class='add'>+the final kernel image. The early loader finds them and applies them.</div><div class='add'>+</div><div class='add'>+Needless to say, this method is not the most flexible one because it</div><div class='add'>+requires rebuilding the kernel each time updated microcode from the CPU</div><div class='add'>+vendor is available.</div><div class='head'>diff --git a/Documentation/x86/mtrr.rst b/Documentation/arch/x86/mtrr.rst<br/>index 9f0b1851771a..f65ef034da7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/mtrr.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/mtrr.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/mtrr.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/mtrr.rst</a></div><div class='hunk'>@@ -28,7 +28,7 @@ are aligned with platform MTRR setup. If MTRRs are only set up by the platform</div><div class='ctx'> firmware code though and the OS does not make any specific MTRR mapping</div><div class='ctx'> requests mtrr_type_lookup() should always return MTRR_TYPE_INVALID.</div><div class='ctx'> </div><div class='del'>-For details refer to Documentation/x86/pat.rst.</div><div class='add'>+For details refer to Documentation/arch/x86/pat.rst.</div><div class='ctx'> </div><div class='ctx'> .. tip::</div><div class='ctx'>   On Intel P6 family processors (Pentium Pro, Pentium II and later)</div><div class='head'>diff --git a/Documentation/x86/orc-unwinder.rst b/Documentation/arch/x86/orc-unwinder.rst<br/>index 9a66a88be765..cdb257015bd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/orc-unwinder.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/orc-unwinder.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/orc-unwinder.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/orc-unwinder.rst</a></div><div class='hunk'>@@ -140,7 +140,7 @@ Unwinder implementation details</div><div class='ctx'> </div><div class='ctx'> Objtool generates the ORC data by integrating with the compile-time</div><div class='ctx'> stack metadata validation feature, which is described in detail in</div><div class='del'>-tools/objtool/Documentation/stack-validation.txt.  After analyzing all</div><div class='add'>+tools/objtool/Documentation/objtool.txt.  After analyzing all</div><div class='ctx'> the code paths of a .o file, it creates an array of orc_entry structs,</div><div class='ctx'> and a parallel array of instruction addresses associated with those</div><div class='ctx'> structs, and writes them to the .orc_unwind and .orc_unwind_ip sections</div><div class='head'>diff --git a/Documentation/x86/pat.rst b/Documentation/arch/x86/pat.rst<br/>index 5d901771016d..5d901771016d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/pat.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/pat.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/pat.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/pat.rst</a></div><div class='head'>diff --git a/Documentation/x86/pti.rst b/Documentation/arch/x86/pti.rst<br/>index 4b858a9bad8d..4b858a9bad8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/pti.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/pti.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/pti.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/pti.rst</a></div><div class='head'>diff --git a/Documentation/x86/resctrl.rst b/Documentation/arch/x86/resctrl.rst<br/>index 71a531061e4e..387ccbcb558f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/resctrl.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/resctrl.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/resctrl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/resctrl.rst</a></div><div class='hunk'>@@ -17,14 +17,21 @@ AMD refers to this feature as AMD Platform Quality of Service(AMD QoS).</div><div class='ctx'> This feature is enabled by the CONFIG_X86_CPU_RESCTRL and the x86 /proc/cpuinfo</div><div class='ctx'> flag bits:</div><div class='ctx'> </div><div class='del'>-=============================================	================================</div><div class='add'>+===============================================	================================</div><div class='ctx'> RDT (Resource Director Technology) Allocation	"rdt_a"</div><div class='ctx'> CAT (Cache Allocation Technology)		"cat_l3", "cat_l2"</div><div class='ctx'> CDP (Code and Data Prioritization)		"cdp_l3", "cdp_l2"</div><div class='ctx'> CQM (Cache QoS Monitoring)			"cqm_llc", "cqm_occup_llc"</div><div class='ctx'> MBM (Memory Bandwidth Monitoring)		"cqm_mbm_total", "cqm_mbm_local"</div><div class='ctx'> MBA (Memory Bandwidth Allocation)		"mba"</div><div class='del'>-=============================================	================================</div><div class='add'>+SMBA (Slow Memory Bandwidth Allocation)         ""</div><div class='add'>+BMEC (Bandwidth Monitoring Event Configuration) ""</div><div class='add'>+===============================================	================================</div><div class='add'>+</div><div class='add'>+Historically, new features were made visible by default in /proc/cpuinfo. This</div><div class='add'>+resulted in the feature flags becoming hard to parse by humans. Adding a new</div><div class='add'>+flag to /proc/cpuinfo should be avoided if user space can obtain information</div><div class='add'>+about the feature from resctrl's info directory.</div><div class='ctx'> </div><div class='ctx'> To use the feature mount the file system::</div><div class='ctx'> </div><div class='hunk'>@@ -161,6 +168,83 @@ with the following files:</div><div class='ctx'> "mon_features":</div><div class='ctx'> 		Lists the monitoring events if</div><div class='ctx'> 		monitoring is enabled for the resource.</div><div class='add'>+		Example::</div><div class='add'>+</div><div class='add'>+			# cat /sys/fs/resctrl/info/L3_MON/mon_features</div><div class='add'>+			llc_occupancy</div><div class='add'>+			mbm_total_bytes</div><div class='add'>+			mbm_local_bytes</div><div class='add'>+</div><div class='add'>+		If the system supports Bandwidth Monitoring Event</div><div class='add'>+		Configuration (BMEC), then the bandwidth events will</div><div class='add'>+		be configurable. The output will be::</div><div class='add'>+</div><div class='add'>+			# cat /sys/fs/resctrl/info/L3_MON/mon_features</div><div class='add'>+			llc_occupancy</div><div class='add'>+			mbm_total_bytes</div><div class='add'>+			mbm_total_bytes_config</div><div class='add'>+			mbm_local_bytes</div><div class='add'>+			mbm_local_bytes_config</div><div class='add'>+</div><div class='add'>+"mbm_total_bytes_config", "mbm_local_bytes_config":</div><div class='add'>+	Read/write files containing the configuration for the mbm_total_bytes</div><div class='add'>+	and mbm_local_bytes events, respectively, when the Bandwidth</div><div class='add'>+	Monitoring Event Configuration (BMEC) feature is supported.</div><div class='add'>+	The event configuration settings are domain specific and affect</div><div class='add'>+	all the CPUs in the domain. When either event configuration is</div><div class='add'>+	changed, the bandwidth counters for all RMIDs of both events</div><div class='add'>+	(mbm_total_bytes as well as mbm_local_bytes) are cleared for that</div><div class='add'>+	domain. The next read for every RMID will report "Unavailable"</div><div class='add'>+	and subsequent reads will report the valid value.</div><div class='add'>+</div><div class='add'>+	Following are the types of events supported:</div><div class='add'>+</div><div class='add'>+	====    ========================================================</div><div class='add'>+	Bits    Description</div><div class='add'>+	====    ========================================================</div><div class='add'>+	6       Dirty Victims from the QOS domain to all types of memory</div><div class='add'>+	5       Reads to slow memory in the non-local NUMA domain</div><div class='add'>+	4       Reads to slow memory in the local NUMA domain</div><div class='add'>+	3       Non-temporal writes to non-local NUMA domain</div><div class='add'>+	2       Non-temporal writes to local NUMA domain</div><div class='add'>+	1       Reads to memory in the non-local NUMA domain</div><div class='add'>+	0       Reads to memory in the local NUMA domain</div><div class='add'>+	====    ========================================================</div><div class='add'>+</div><div class='add'>+	By default, the mbm_total_bytes configuration is set to 0x7f to count</div><div class='add'>+	all the event types and the mbm_local_bytes configuration is set to</div><div class='add'>+	0x15 to count all the local memory events.</div><div class='add'>+</div><div class='add'>+	Examples:</div><div class='add'>+</div><div class='add'>+	* To view the current configuration::</div><div class='add'>+	  ::</div><div class='add'>+</div><div class='add'>+	    # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config</div><div class='add'>+	    0=0x7f;1=0x7f;2=0x7f;3=0x7f</div><div class='add'>+</div><div class='add'>+	    # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config</div><div class='add'>+	    0=0x15;1=0x15;3=0x15;4=0x15</div><div class='add'>+</div><div class='add'>+	* To change the mbm_total_bytes to count only reads on domain 0,</div><div class='add'>+	  the bits 0, 1, 4 and 5 needs to be set, which is 110011b in binary</div><div class='add'>+	  (in hexadecimal 0x33):</div><div class='add'>+	  ::</div><div class='add'>+</div><div class='add'>+	    # echo  "0=0x33" &gt; /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config</div><div class='add'>+</div><div class='add'>+	    # cat /sys/fs/resctrl/info/L3_MON/mbm_total_bytes_config</div><div class='add'>+	    0=0x33;1=0x7f;2=0x7f;3=0x7f</div><div class='add'>+</div><div class='add'>+	* To change the mbm_local_bytes to count all the slow memory reads on</div><div class='add'>+	  domain 0 and 1, the bits 4 and 5 needs to be set, which is 110000b</div><div class='add'>+	  in binary (in hexadecimal 0x30):</div><div class='add'>+	  ::</div><div class='add'>+</div><div class='add'>+	    # echo  "0=0x30;1=0x30" &gt; /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config</div><div class='add'>+</div><div class='add'>+	    # cat /sys/fs/resctrl/info/L3_MON/mbm_local_bytes_config</div><div class='add'>+	    0=0x30;1=0x30;3=0x15;4=0x15</div><div class='ctx'> </div><div class='ctx'> "max_threshold_occupancy":</div><div class='ctx'> 		Read/write file provides the largest value (in</div><div class='hunk'>@@ -464,6 +548,25 @@ Memory bandwidth domain is L3 cache.</div><div class='ctx'> </div><div class='ctx'> 	MB:&lt;cache_id0&gt;=bw_MBps0;&lt;cache_id1&gt;=bw_MBps1;...</div><div class='ctx'> </div><div class='add'>+Slow Memory Bandwidth Allocation (SMBA)</div><div class='add'>+---------------------------------------</div><div class='add'>+AMD hardware supports Slow Memory Bandwidth Allocation (SMBA).</div><div class='add'>+CXL.memory is the only supported "slow" memory device. With the</div><div class='add'>+support of SMBA, the hardware enables bandwidth allocation on</div><div class='add'>+the slow memory devices. If there are multiple such devices in</div><div class='add'>+the system, the throttling logic groups all the slow sources</div><div class='add'>+together and applies the limit on them as a whole.</div><div class='add'>+</div><div class='add'>+The presence of SMBA (with CXL.memory) is independent of slow memory</div><div class='add'>+devices presence. If there are no such devices on the system, then</div><div class='add'>+configuring SMBA will have no impact on the performance of the system.</div><div class='add'>+</div><div class='add'>+The bandwidth domain for slow memory is L3 cache. Its schemata file</div><div class='add'>+is formatted as:</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	SMBA:&lt;cache_id0&gt;=bandwidth0;&lt;cache_id1&gt;=bandwidth1;...</div><div class='add'>+</div><div class='ctx'> Reading/writing the schemata file</div><div class='ctx'> ---------------------------------</div><div class='ctx'> Reading the schemata file will show the state of all resources</div><div class='hunk'>@@ -479,6 +582,46 @@ which you wish to change.  E.g.</div><div class='ctx'>   L3DATA:0=fffff;1=fffff;2=3c0;3=fffff</div><div class='ctx'>   L3CODE:0=fffff;1=fffff;2=fffff;3=fffff</div><div class='ctx'> </div><div class='add'>+Reading/writing the schemata file (on AMD systems)</div><div class='add'>+--------------------------------------------------</div><div class='add'>+Reading the schemata file will show the current bandwidth limit on all</div><div class='add'>+domains. The allocated resources are in multiples of one eighth GB/s.</div><div class='add'>+When writing to the file, you need to specify what cache id you wish to</div><div class='add'>+configure the bandwidth limit.</div><div class='add'>+</div><div class='add'>+For example, to allocate 2GB/s limit on the first cache id:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  # cat schemata</div><div class='add'>+    MB:0=2048;1=2048;2=2048;3=2048</div><div class='add'>+    L3:0=ffff;1=ffff;2=ffff;3=ffff</div><div class='add'>+</div><div class='add'>+  # echo "MB:1=16" &gt; schemata</div><div class='add'>+  # cat schemata</div><div class='add'>+    MB:0=2048;1=  16;2=2048;3=2048</div><div class='add'>+    L3:0=ffff;1=ffff;2=ffff;3=ffff</div><div class='add'>+</div><div class='add'>+Reading/writing the schemata file (on AMD systems) with SMBA feature</div><div class='add'>+--------------------------------------------------------------------</div><div class='add'>+Reading and writing the schemata file is the same as without SMBA in</div><div class='add'>+above section.</div><div class='add'>+</div><div class='add'>+For example, to allocate 8GB/s limit on the first cache id:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  # cat schemata</div><div class='add'>+    SMBA:0=2048;1=2048;2=2048;3=2048</div><div class='add'>+      MB:0=2048;1=2048;2=2048;3=2048</div><div class='add'>+      L3:0=ffff;1=ffff;2=ffff;3=ffff</div><div class='add'>+</div><div class='add'>+  # echo "SMBA:1=64" &gt; schemata</div><div class='add'>+  # cat schemata</div><div class='add'>+    SMBA:0=2048;1=  64;2=2048;3=2048</div><div class='add'>+      MB:0=2048;1=2048;2=2048;3=2048</div><div class='add'>+      L3:0=ffff;1=ffff;2=ffff;3=ffff</div><div class='add'>+</div><div class='ctx'> Cache Pseudo-Locking</div><div class='ctx'> ====================</div><div class='ctx'> CAT enables a user to specify the amount of cache space that an</div><div class='hunk'>@@ -608,12 +751,12 @@ how we can measure the latency in cycles of reading from this region and</div><div class='ctx'> visualize this data with a histogram that is available if CONFIG_HIST_TRIGGERS</div><div class='ctx'> is set::</div><div class='ctx'> </div><div class='del'>-  # :&gt; /sys/kernel/debug/tracing/trace</div><div class='del'>-  # echo 'hist:keys=latency' &gt; /sys/kernel/debug/tracing/events/resctrl/pseudo_lock_mem_latency/trigger</div><div class='del'>-  # echo 1 &gt; /sys/kernel/debug/tracing/events/resctrl/pseudo_lock_mem_latency/enable</div><div class='add'>+  # :&gt; /sys/kernel/tracing/trace</div><div class='add'>+  # echo 'hist:keys=latency' &gt; /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/trigger</div><div class='add'>+  # echo 1 &gt; /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/enable</div><div class='ctx'>   # echo 1 &gt; /sys/kernel/debug/resctrl/newlock/pseudo_lock_measure</div><div class='del'>-  # echo 0 &gt; /sys/kernel/debug/tracing/events/resctrl/pseudo_lock_mem_latency/enable</div><div class='del'>-  # cat /sys/kernel/debug/tracing/events/resctrl/pseudo_lock_mem_latency/hist</div><div class='add'>+  # echo 0 &gt; /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/enable</div><div class='add'>+  # cat /sys/kernel/tracing/events/resctrl/pseudo_lock_mem_latency/hist</div><div class='ctx'> </div><div class='ctx'>   # event histogram</div><div class='ctx'>   #</div><div class='hunk'>@@ -642,11 +785,11 @@ cache of a platform. Here is how we can obtain details of the cache hits</div><div class='ctx'> and misses using the platform's precision counters.</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-  # :&gt; /sys/kernel/debug/tracing/trace</div><div class='del'>-  # echo 1 &gt; /sys/kernel/debug/tracing/events/resctrl/pseudo_lock_l2/enable</div><div class='add'>+  # :&gt; /sys/kernel/tracing/trace</div><div class='add'>+  # echo 1 &gt; /sys/kernel/tracing/events/resctrl/pseudo_lock_l2/enable</div><div class='ctx'>   # echo 2 &gt; /sys/kernel/debug/resctrl/newlock/pseudo_lock_measure</div><div class='del'>-  # echo 0 &gt; /sys/kernel/debug/tracing/events/resctrl/pseudo_lock_l2/enable</div><div class='del'>-  # cat /sys/kernel/debug/tracing/trace</div><div class='add'>+  # echo 0 &gt; /sys/kernel/tracing/events/resctrl/pseudo_lock_l2/enable</div><div class='add'>+  # cat /sys/kernel/tracing/trace</div><div class='ctx'> </div><div class='ctx'>   # tracer: nop</div><div class='ctx'>   #</div><div class='head'>diff --git a/Documentation/x86/sgx.rst b/Documentation/arch/x86/sgx.rst<br/>index 265568a9292c..2bcbffacbed5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/sgx.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/sgx.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/sgx.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/sgx.rst</a></div><div class='hunk'>@@ -100,6 +100,21 @@ pages and establish enclave page permissions.</div><div class='ctx'>                sgx_ioc_enclave_init</div><div class='ctx'>                sgx_ioc_enclave_provision</div><div class='ctx'> </div><div class='add'>+Enclave runtime management</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Systems supporting SGX2 additionally support changes to initialized</div><div class='add'>+enclaves: modifying enclave page permissions and type, and dynamically</div><div class='add'>+adding and removing of enclave pages. When an enclave accesses an address</div><div class='add'>+within its address range that does not have a backing page then a new</div><div class='add'>+regular page will be dynamically added to the enclave. The enclave is</div><div class='add'>+still required to run EACCEPT on the new page before it can be used.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: arch/x86/kernel/cpu/sgx/ioctl.c</div><div class='add'>+   :functions: sgx_ioc_enclave_restrict_permissions</div><div class='add'>+               sgx_ioc_enclave_modify_types</div><div class='add'>+               sgx_ioc_enclave_remove_pages</div><div class='add'>+</div><div class='ctx'> Enclave vDSO</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/x86/sva.rst b/Documentation/arch/x86/sva.rst<br/>index 2e9b8b0f9a0f..33cb05005982 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/sva.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/sva.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/sva.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/sva.rst</a></div><div class='hunk'>@@ -107,7 +107,7 @@ process share the same page tables, thus the same MSR value.</div><div class='ctx'> PASID Life Cycle Management</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='del'>-PASID is initialized as INVALID_IOASID (-1) when a process is created.</div><div class='add'>+PASID is initialized as IOMMU_PASID_INVALID (-1) when a process is created.</div><div class='ctx'> </div><div class='ctx'> Only processes that access SVA-capable devices need to have a PASID</div><div class='ctx'> allocated. This allocation happens when a process opens/binds an SVA-capable</div><div class='head'>diff --git a/Documentation/arch/x86/tdx.rst b/Documentation/arch/x86/tdx.rst<br/>new file mode 100644<br/>index 000000000000..dc8d9fd2c3f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/tdx.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/tdx.rst</a></div><div class='hunk'>@@ -0,0 +1,261 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=====================================</div><div class='add'>+Intel Trust Domain Extensions (TDX)</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+Intel's Trust Domain Extensions (TDX) protect confidential guest VMs from</div><div class='add'>+the host and physical attacks by isolating the guest register state and by</div><div class='add'>+encrypting the guest memory. In TDX, a special module running in a special</div><div class='add'>+mode sits between the host and the guest and manages the guest/host</div><div class='add'>+separation.</div><div class='add'>+</div><div class='add'>+Since the host cannot directly access guest registers or memory, much</div><div class='add'>+normal functionality of a hypervisor must be moved into the guest. This is</div><div class='add'>+implemented using a Virtualization Exception (#VE) that is handled by the</div><div class='add'>+guest kernel. A #VE is handled entirely inside the guest kernel, but some</div><div class='add'>+require the hypervisor to be consulted.</div><div class='add'>+</div><div class='add'>+TDX includes new hypercall-like mechanisms for communicating from the</div><div class='add'>+guest to the hypervisor or the TDX module.</div><div class='add'>+</div><div class='add'>+New TDX Exceptions</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+TDX guests behave differently from bare-metal and traditional VMX guests.</div><div class='add'>+In TDX guests, otherwise normal instructions or memory accesses can cause</div><div class='add'>+#VE or #GP exceptions.</div><div class='add'>+</div><div class='add'>+Instructions marked with an '*' conditionally cause exceptions.  The</div><div class='add'>+details for these instructions are discussed below.</div><div class='add'>+</div><div class='add'>+Instruction-based #VE</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+- Port I/O (INS, OUTS, IN, OUT)</div><div class='add'>+- HLT</div><div class='add'>+- MONITOR, MWAIT</div><div class='add'>+- WBINVD, INVD</div><div class='add'>+- VMCALL</div><div class='add'>+- RDMSR*,WRMSR*</div><div class='add'>+- CPUID*</div><div class='add'>+</div><div class='add'>+Instruction-based #GP</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+- All VMX instructions: INVEPT, INVVPID, VMCLEAR, VMFUNC, VMLAUNCH,</div><div class='add'>+  VMPTRLD, VMPTRST, VMREAD, VMRESUME, VMWRITE, VMXOFF, VMXON</div><div class='add'>+- ENCLS, ENCLU</div><div class='add'>+- GETSEC</div><div class='add'>+- RSM</div><div class='add'>+- ENQCMD</div><div class='add'>+- RDMSR*,WRMSR*</div><div class='add'>+</div><div class='add'>+RDMSR/WRMSR Behavior</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+MSR access behavior falls into three categories:</div><div class='add'>+</div><div class='add'>+- #GP generated</div><div class='add'>+- #VE generated</div><div class='add'>+- "Just works"</div><div class='add'>+</div><div class='add'>+In general, the #GP MSRs should not be used in guests.  Their use likely</div><div class='add'>+indicates a bug in the guest.  The guest may try to handle the #GP with a</div><div class='add'>+hypercall but it is unlikely to succeed.</div><div class='add'>+</div><div class='add'>+The #VE MSRs are typically able to be handled by the hypervisor.  Guests</div><div class='add'>+can make a hypercall to the hypervisor to handle the #VE.</div><div class='add'>+</div><div class='add'>+The "just works" MSRs do not need any special guest handling.  They might</div><div class='add'>+be implemented by directly passing through the MSR to the hardware or by</div><div class='add'>+trapping and handling in the TDX module.  Other than possibly being slow,</div><div class='add'>+these MSRs appear to function just as they would on bare metal.</div><div class='add'>+</div><div class='add'>+CPUID Behavior</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+For some CPUID leaves and sub-leaves, the virtualized bit fields of CPUID</div><div class='add'>+return values (in guest EAX/EBX/ECX/EDX) are configurable by the</div><div class='add'>+hypervisor. For such cases, the Intel TDX module architecture defines two</div><div class='add'>+virtualization types:</div><div class='add'>+</div><div class='add'>+- Bit fields for which the hypervisor controls the value seen by the guest</div><div class='add'>+  TD.</div><div class='add'>+</div><div class='add'>+- Bit fields for which the hypervisor configures the value such that the</div><div class='add'>+  guest TD either sees their native value or a value of 0.  For these bit</div><div class='add'>+  fields, the hypervisor can mask off the native values, but it can not</div><div class='add'>+  turn *on* values.</div><div class='add'>+</div><div class='add'>+A #VE is generated for CPUID leaves and sub-leaves that the TDX module does</div><div class='add'>+not know how to handle. The guest kernel may ask the hypervisor for the</div><div class='add'>+value with a hypercall.</div><div class='add'>+</div><div class='add'>+#VE on Memory Accesses</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+There are essentially two classes of TDX memory: private and shared.</div><div class='add'>+Private memory receives full TDX protections.  Its content is protected</div><div class='add'>+against access from the hypervisor.  Shared memory is expected to be</div><div class='add'>+shared between guest and hypervisor and does not receive full TDX</div><div class='add'>+protections.</div><div class='add'>+</div><div class='add'>+A TD guest is in control of whether its memory accesses are treated as</div><div class='add'>+private or shared.  It selects the behavior with a bit in its page table</div><div class='add'>+entries.  This helps ensure that a guest does not place sensitive</div><div class='add'>+information in shared memory, exposing it to the untrusted hypervisor.</div><div class='add'>+</div><div class='add'>+#VE on Shared Memory</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Access to shared mappings can cause a #VE.  The hypervisor ultimately</div><div class='add'>+controls whether a shared memory access causes a #VE, so the guest must be</div><div class='add'>+careful to only reference shared pages it can safely handle a #VE.  For</div><div class='add'>+instance, the guest should be careful not to access shared memory in the</div><div class='add'>+#VE handler before it reads the #VE info structure (TDG.VP.VEINFO.GET).</div><div class='add'>+</div><div class='add'>+Shared mapping content is entirely controlled by the hypervisor. The guest</div><div class='add'>+should only use shared mappings for communicating with the hypervisor.</div><div class='add'>+Shared mappings must never be used for sensitive memory content like kernel</div><div class='add'>+stacks.  A good rule of thumb is that hypervisor-shared memory should be</div><div class='add'>+treated the same as memory mapped to userspace.  Both the hypervisor and</div><div class='add'>+userspace are completely untrusted.</div><div class='add'>+</div><div class='add'>+MMIO for virtual devices is implemented as shared memory.  The guest must</div><div class='add'>+be careful not to access device MMIO regions unless it is also prepared to</div><div class='add'>+handle a #VE.</div><div class='add'>+</div><div class='add'>+#VE on Private Pages</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+An access to private mappings can also cause a #VE.  Since all kernel</div><div class='add'>+memory is also private memory, the kernel might theoretically need to</div><div class='add'>+handle a #VE on arbitrary kernel memory accesses.  This is not feasible, so</div><div class='add'>+TDX guests ensure that all guest memory has been "accepted" before memory</div><div class='add'>+is used by the kernel.</div><div class='add'>+</div><div class='add'>+A modest amount of memory (typically 512M) is pre-accepted by the firmware</div><div class='add'>+before the kernel runs to ensure that the kernel can start up without</div><div class='add'>+being subjected to a #VE.</div><div class='add'>+</div><div class='add'>+The hypervisor is permitted to unilaterally move accepted pages to a</div><div class='add'>+"blocked" state. However, if it does this, page access will not generate a</div><div class='add'>+#VE.  It will, instead, cause a "TD Exit" where the hypervisor is required</div><div class='add'>+to handle the exception.</div><div class='add'>+</div><div class='add'>+Linux #VE handler</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Just like page faults or #GP's, #VE exceptions can be either handled or be</div><div class='add'>+fatal.  Typically, an unhandled userspace #VE results in a SIGSEGV.</div><div class='add'>+An unhandled kernel #VE results in an oops.</div><div class='add'>+</div><div class='add'>+Handling nested exceptions on x86 is typically nasty business.  A #VE</div><div class='add'>+could be interrupted by an NMI which triggers another #VE and hilarity</div><div class='add'>+ensues.  The TDX #VE architecture anticipated this scenario and includes a</div><div class='add'>+feature to make it slightly less nasty.</div><div class='add'>+</div><div class='add'>+During #VE handling, the TDX module ensures that all interrupts (including</div><div class='add'>+NMIs) are blocked.  The block remains in place until the guest makes a</div><div class='add'>+TDG.VP.VEINFO.GET TDCALL.  This allows the guest to control when interrupts</div><div class='add'>+or a new #VE can be delivered.</div><div class='add'>+</div><div class='add'>+However, the guest kernel must still be careful to avoid potential</div><div class='add'>+#VE-triggering actions (discussed above) while this block is in place.</div><div class='add'>+While the block is in place, any #VE is elevated to a double fault (#DF)</div><div class='add'>+which is not recoverable.</div><div class='add'>+</div><div class='add'>+MMIO handling</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+In non-TDX VMs, MMIO is usually implemented by giving a guest access to a</div><div class='add'>+mapping which will cause a VMEXIT on access, and then the hypervisor</div><div class='add'>+emulates the access.  That is not possible in TDX guests because VMEXIT</div><div class='add'>+will expose the register state to the host. TDX guests don't trust the host</div><div class='add'>+and can't have their state exposed to the host.</div><div class='add'>+</div><div class='add'>+In TDX, MMIO regions typically trigger a #VE exception in the guest.  The</div><div class='add'>+guest #VE handler then emulates the MMIO instruction inside the guest and</div><div class='add'>+converts it into a controlled TDCALL to the host, rather than exposing</div><div class='add'>+guest state to the host.</div><div class='add'>+</div><div class='add'>+MMIO addresses on x86 are just special physical addresses. They can</div><div class='add'>+theoretically be accessed with any instruction that accesses memory.</div><div class='add'>+However, the kernel instruction decoding method is limited. It is only</div><div class='add'>+designed to decode instructions like those generated by io.h macros.</div><div class='add'>+</div><div class='add'>+MMIO access via other means (like structure overlays) may result in an</div><div class='add'>+oops.</div><div class='add'>+</div><div class='add'>+Shared Memory Conversions</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+All TDX guest memory starts out as private at boot.  This memory can not</div><div class='add'>+be accessed by the hypervisor.  However, some kernel users like device</div><div class='add'>+drivers might have a need to share data with the hypervisor.  To do this,</div><div class='add'>+memory must be converted between shared and private.  This can be</div><div class='add'>+accomplished using some existing memory encryption helpers:</div><div class='add'>+</div><div class='add'>+ * set_memory_decrypted() converts a range of pages to shared.</div><div class='add'>+ * set_memory_encrypted() converts memory back to private.</div><div class='add'>+</div><div class='add'>+Device drivers are the primary user of shared memory, but there's no need</div><div class='add'>+to touch every driver. DMA buffers and ioremap() do the conversions</div><div class='add'>+automatically.</div><div class='add'>+</div><div class='add'>+TDX uses SWIOTLB for most DMA allocations. The SWIOTLB buffer is</div><div class='add'>+converted to shared on boot.</div><div class='add'>+</div><div class='add'>+For coherent DMA allocation, the DMA buffer gets converted on the</div><div class='add'>+allocation. Check force_dma_unencrypted() for details.</div><div class='add'>+</div><div class='add'>+Attestation</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+Attestation is used to verify the TDX guest trustworthiness to other</div><div class='add'>+entities before provisioning secrets to the guest. For example, a key</div><div class='add'>+server may want to use attestation to verify that the guest is the</div><div class='add'>+desired one before releasing the encryption keys to mount the encrypted</div><div class='add'>+rootfs or a secondary drive.</div><div class='add'>+</div><div class='add'>+The TDX module records the state of the TDX guest in various stages of</div><div class='add'>+the guest boot process using the build time measurement register (MRTD)</div><div class='add'>+and runtime measurement registers (RTMR). Measurements related to the</div><div class='add'>+guest initial configuration and firmware image are recorded in the MRTD</div><div class='add'>+register. Measurements related to initial state, kernel image, firmware</div><div class='add'>+image, command line options, initrd, ACPI tables, etc are recorded in</div><div class='add'>+RTMR registers. For more details, as an example, please refer to TDX</div><div class='add'>+Virtual Firmware design specification, section titled "TD Measurement".</div><div class='add'>+At TDX guest runtime, the attestation process is used to attest to these</div><div class='add'>+measurements.</div><div class='add'>+</div><div class='add'>+The attestation process consists of two steps: TDREPORT generation and</div><div class='add'>+Quote generation.</div><div class='add'>+</div><div class='add'>+TDX guest uses TDCALL[TDG.MR.REPORT] to get the TDREPORT (TDREPORT_STRUCT)</div><div class='add'>+from the TDX module. TDREPORT is a fixed-size data structure generated by</div><div class='add'>+the TDX module which contains guest-specific information (such as build</div><div class='add'>+and boot measurements), platform security version, and the MAC to protect</div><div class='add'>+the integrity of the TDREPORT. A user-provided 64-Byte REPORTDATA is used</div><div class='add'>+as input and included in the TDREPORT. Typically it can be some nonce</div><div class='add'>+provided by attestation service so the TDREPORT can be verified uniquely.</div><div class='add'>+More details about the TDREPORT can be found in Intel TDX Module</div><div class='add'>+specification, section titled "TDG.MR.REPORT Leaf".</div><div class='add'>+</div><div class='add'>+After getting the TDREPORT, the second step of the attestation process</div><div class='add'>+is to send it to the Quoting Enclave (QE) to generate the Quote. TDREPORT</div><div class='add'>+by design can only be verified on the local platform as the MAC key is</div><div class='add'>+bound to the platform. To support remote verification of the TDREPORT,</div><div class='add'>+TDX leverages Intel SGX Quoting Enclave to verify the TDREPORT locally</div><div class='add'>+and convert it to a remotely verifiable Quote. Method of sending TDREPORT</div><div class='add'>+to QE is implementation specific. Attestation software can choose</div><div class='add'>+whatever communication channel available (i.e. vsock or TCP/IP) to</div><div class='add'>+send the TDREPORT to QE and receive the Quote.</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+TDX reference material is collected here:</div><div class='add'>+</div><div class='add'>+https://www.intel.com/content/www/us/en/developer/articles/technical/intel-trust-domain-extensions.html</div><div class='head'>diff --git a/Documentation/x86/tlb.rst b/Documentation/arch/x86/tlb.rst<br/>index 82ec58ae63a8..82ec58ae63a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/tlb.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/tlb.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/tlb.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/tlb.rst</a></div><div class='head'>diff --git a/Documentation/x86/topology.rst b/Documentation/arch/x86/topology.rst<br/>index 7f58010ea86a..7f58010ea86a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/topology.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/topology.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/topology.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/topology.rst</a></div><div class='head'>diff --git a/Documentation/x86/tsx_async_abort.rst b/Documentation/arch/x86/tsx_async_abort.rst<br/>index 583ddc185ba2..583ddc185ba2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/tsx_async_abort.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/tsx_async_abort.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/tsx_async_abort.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/tsx_async_abort.rst</a></div><div class='head'>diff --git a/Documentation/x86/usb-legacy-support.rst b/Documentation/arch/x86/usb-legacy-support.rst<br/>index e01c08b7c981..e01c08b7c981 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/usb-legacy-support.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/usb-legacy-support.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/usb-legacy-support.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/usb-legacy-support.rst</a></div><div class='head'>diff --git a/Documentation/x86/x86_64/5level-paging.rst b/Documentation/arch/x86/x86_64/5level-paging.rst<br/>index b792bbdc0b01..71f882f4a173 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/5level-paging.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/5level-paging.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/5level-paging.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/5level-paging.rst</a></div><div class='hunk'>@@ -20,7 +20,7 @@ physical address space. This "ought to be enough for anybody" ©.</div><div class='ctx'> QEMU 2.9 and later support 5-level paging.</div><div class='ctx'> </div><div class='ctx'> Virtual memory layout for 5-level paging is described in</div><div class='del'>-Documentation/x86/x86_64/mm.rst</div><div class='add'>+Documentation/arch/x86/x86_64/mm.rst</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Enabling 5-level paging</div><div class='head'>diff --git a/Documentation/x86/x86_64/boot-options.rst b/Documentation/arch/x86/x86_64/boot-options.rst<br/>index 07aa0007f346..137432d34109 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/boot-options.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/boot-options.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/boot-options.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/boot-options.rst</a></div><div class='hunk'>@@ -9,7 +9,7 @@ only the AMD64 specific ones are listed here.</div><div class='ctx'> </div><div class='ctx'> Machine check</div><div class='ctx'> =============</div><div class='del'>-Please see Documentation/x86/x86_64/machinecheck.rst for sysfs runtime tunables.</div><div class='add'>+Please see Documentation/arch/x86/x86_64/machinecheck.rst for sysfs runtime tunables.</div><div class='ctx'> </div><div class='ctx'>    mce=off</div><div class='ctx'> 		Disable machine check</div><div class='hunk'>@@ -82,7 +82,7 @@ APICs</div><div class='ctx'>      Don't use the local APIC (alias for i386 compatibility)</div><div class='ctx'> </div><div class='ctx'>    pirq=...</div><div class='del'>-	See Documentation/x86/i386/IO-APIC.rst</div><div class='add'>+	See Documentation/arch/x86/i386/IO-APIC.rst</div><div class='ctx'> </div><div class='ctx'>    noapictimer</div><div class='ctx'> 	Don't set up the APIC timer</div><div class='hunk'>@@ -157,15 +157,6 @@ Rebooting</div><div class='ctx'>      newer BIOS, or newer board) using this option will ignore the built-in</div><div class='ctx'>      quirk table, and use the generic default reboot actions.</div><div class='ctx'> </div><div class='del'>-Non Executable Mappings</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-  noexec=on|off</div><div class='del'>-    on</div><div class='del'>-      Enable(default)</div><div class='del'>-    off</div><div class='del'>-      Disable</div><div class='del'>-</div><div class='ctx'> NUMA</div><div class='ctx'> ====</div><div class='ctx'> </div><div class='hunk'>@@ -296,11 +287,13 @@ iommu options only relevant to the AMD GART hardware IOMMU:</div><div class='ctx'> iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU</div><div class='ctx'> implementation:</div><div class='ctx'> </div><div class='del'>-    swiotlb=&lt;pages&gt;[,force]</div><div class='del'>-      &lt;pages&gt;</div><div class='del'>-        Prereserve that many 128K pages for the software IO bounce buffering.</div><div class='add'>+    swiotlb=&lt;slots&gt;[,force,noforce]</div><div class='add'>+      &lt;slots&gt;</div><div class='add'>+        Prereserve that many 2K slots for the software IO bounce buffering.</div><div class='ctx'>       force</div><div class='ctx'>         Force all IO through the software TLB.</div><div class='add'>+      noforce</div><div class='add'>+        Do not initialize the software TLB.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Miscellaneous</div><div class='hunk'>@@ -310,3 +303,17 @@ Miscellaneous</div><div class='ctx'>     Do not use GB pages for kernel direct mappings.</div><div class='ctx'>   gbpages</div><div class='ctx'>     Use GB pages for kernel direct mappings.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+AMD SEV (Secure Encrypted Virtualization)</div><div class='add'>+=========================================</div><div class='add'>+Options relating to AMD SEV, specified via the following format:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+   sev=option1[,option2]</div><div class='add'>+</div><div class='add'>+The available options are:</div><div class='add'>+</div><div class='add'>+   debug</div><div class='add'>+     Enable debug messages.</div><div class='head'>diff --git a/Documentation/x86/x86_64/cpu-hotplug-spec.rst b/Documentation/arch/x86/x86_64/cpu-hotplug-spec.rst<br/>index 8d1c91f0c880..8d1c91f0c880 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/cpu-hotplug-spec.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/cpu-hotplug-spec.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/cpu-hotplug-spec.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/cpu-hotplug-spec.rst</a></div><div class='head'>diff --git a/Documentation/x86/x86_64/fake-numa-for-cpusets.rst b/Documentation/arch/x86/x86_64/fake-numa-for-cpusets.rst<br/>index ff9bcfd2cc14..ba74617d4999 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/fake-numa-for-cpusets.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/fake-numa-for-cpusets.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/fake-numa-for-cpusets.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/fake-numa-for-cpusets.rst</a></div><div class='hunk'>@@ -18,7 +18,7 @@ For more information on the features of cpusets, see</div><div class='ctx'> Documentation/admin-guide/cgroup-v1/cpusets.rst.</div><div class='ctx'> There are a number of different configurations you can use for your needs.  For</div><div class='ctx'> more information on the numa=fake command line option and its various ways of</div><div class='del'>-configuring fake nodes, see Documentation/x86/x86_64/boot-options.rst.</div><div class='add'>+configuring fake nodes, see Documentation/arch/x86/x86_64/boot-options.rst.</div><div class='ctx'> </div><div class='ctx'> For the purposes of this introduction, we'll assume a very primitive NUMA</div><div class='ctx'> emulation setup of "numa=fake=4*512,".  This will split our system memory into</div><div class='head'>diff --git a/Documentation/x86/x86_64/fsgs.rst b/Documentation/arch/x86/x86_64/fsgs.rst<br/>index 50960e09e1f6..50960e09e1f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/fsgs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/fsgs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/fsgs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/fsgs.rst</a></div><div class='head'>diff --git a/Documentation/x86/x86_64/index.rst b/Documentation/arch/x86/x86_64/index.rst<br/>index a56070fc8e77..a56070fc8e77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/index.rst</a></div><div class='head'>diff --git a/Documentation/x86/x86_64/machinecheck.rst b/Documentation/arch/x86/x86_64/machinecheck.rst<br/>index cea12ee97200..cea12ee97200 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/machinecheck.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/machinecheck.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/machinecheck.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/machinecheck.rst</a></div><div class='head'>diff --git a/Documentation/x86/x86_64/mm.rst b/Documentation/arch/x86/x86_64/mm.rst<br/>index 9798676bb0bf..35e5e18c83d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/mm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/mm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/mm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/mm.rst</a></div><div class='hunk'>@@ -140,7 +140,7 @@ The direct mapping covers all memory in the system up to the highest</div><div class='ctx'> memory address (this means in some cases it can also include PCI memory</div><div class='ctx'> holes).</div><div class='ctx'> </div><div class='del'>-We map EFI runtime services in the 'efi_pgd' PGD in a 64Gb large virtual</div><div class='add'>+We map EFI runtime services in the 'efi_pgd' PGD in a 64GB large virtual</div><div class='ctx'> memory window (this size is arbitrary, it can be raised later if needed).</div><div class='ctx'> The mappings are not part of any other kernel PGD and are only available</div><div class='ctx'> during EFI runtime calls.</div><div class='head'>diff --git a/Documentation/x86/x86_64/uefi.rst b/Documentation/arch/x86/x86_64/uefi.rst<br/>index 3b894103a734..fbc30c9a071d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/x86_64/uefi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/x86_64/uefi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/x86_64/uefi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/x86_64/uefi.rst</a></div><div class='hunk'>@@ -29,7 +29,7 @@ Mechanics</div><div class='ctx'>   be selected::</div><div class='ctx'> </div><div class='ctx'> 	CONFIG_EFI=y</div><div class='del'>-	CONFIG_EFI_VARS=y or m		# optional</div><div class='add'>+	CONFIG_EFIVAR_FS=y or m		# optional</div><div class='ctx'> </div><div class='ctx'> - Create a VFAT partition on the disk</div><div class='ctx'> - Copy the following to the VFAT partition:</div><div class='head'>diff --git a/Documentation/arch/x86/xstate.rst b/Documentation/arch/x86/xstate.rst<br/>new file mode 100644<br/>index 000000000000..ae5c69e48b11<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/xstate.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/xstate.rst</a></div><div class='hunk'>@@ -0,0 +1,174 @@</div><div class='add'>+Using XSTATE features in user space applications</div><div class='add'>+================================================</div><div class='add'>+</div><div class='add'>+The x86 architecture supports floating-point extensions which are</div><div class='add'>+enumerated via CPUID. Applications consult CPUID and use XGETBV to</div><div class='add'>+evaluate which features have been enabled by the kernel XCR0.</div><div class='add'>+</div><div class='add'>+Up to AVX-512 and PKRU states, these features are automatically enabled by</div><div class='add'>+the kernel if available. Features like AMX TILE_DATA (XSTATE component 18)</div><div class='add'>+are enabled by XCR0 as well, but the first use of related instruction is</div><div class='add'>+trapped by the kernel because by default the required large XSTATE buffers</div><div class='add'>+are not allocated automatically.</div><div class='add'>+</div><div class='add'>+The purpose for dynamic features</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+Legacy userspace libraries often have hard-coded, static sizes for</div><div class='add'>+alternate signal stacks, often using MINSIGSTKSZ which is typically 2KB.</div><div class='add'>+That stack must be able to store at *least* the signal frame that the</div><div class='add'>+kernel sets up before jumping into the signal handler. That signal frame</div><div class='add'>+must include an XSAVE buffer defined by the CPU.</div><div class='add'>+</div><div class='add'>+However, that means that the size of signal stacks is dynamic, not static,</div><div class='add'>+because different CPUs have differently-sized XSAVE buffers. A compiled-in</div><div class='add'>+size of 2KB with existing applications is too small for new CPU features</div><div class='add'>+like AMX. Instead of universally requiring larger stack, with the dynamic</div><div class='add'>+enabling, the kernel can enforce userspace applications to have</div><div class='add'>+properly-sized altstacks.</div><div class='add'>+</div><div class='add'>+Using dynamically enabled XSTATE features in user space applications</div><div class='add'>+--------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+The kernel provides an arch_prctl(2) based mechanism for applications to</div><div class='add'>+request the usage of such features. The arch_prctl(2) options related to</div><div class='add'>+this are:</div><div class='add'>+</div><div class='add'>+-ARCH_GET_XCOMP_SUPP</div><div class='add'>+</div><div class='add'>+ arch_prctl(ARCH_GET_XCOMP_SUPP, &amp;features);</div><div class='add'>+</div><div class='add'>+ ARCH_GET_XCOMP_SUPP stores the supported features in userspace storage of</div><div class='add'>+ type uint64_t. The second argument is a pointer to that storage.</div><div class='add'>+</div><div class='add'>+-ARCH_GET_XCOMP_PERM</div><div class='add'>+</div><div class='add'>+ arch_prctl(ARCH_GET_XCOMP_PERM, &amp;features);</div><div class='add'>+</div><div class='add'>+ ARCH_GET_XCOMP_PERM stores the features for which the userspace process</div><div class='add'>+ has permission in userspace storage of type uint64_t. The second argument</div><div class='add'>+ is a pointer to that storage.</div><div class='add'>+</div><div class='add'>+-ARCH_REQ_XCOMP_PERM</div><div class='add'>+</div><div class='add'>+ arch_prctl(ARCH_REQ_XCOMP_PERM, feature_nr);</div><div class='add'>+</div><div class='add'>+ ARCH_REQ_XCOMP_PERM allows to request permission for a dynamically enabled</div><div class='add'>+ feature or a feature set. A feature set can be mapped to a facility, e.g.</div><div class='add'>+ AMX, and can require one or more XSTATE components to be enabled.</div><div class='add'>+</div><div class='add'>+ The feature argument is the number of the highest XSTATE component which</div><div class='add'>+ is required for a facility to work.</div><div class='add'>+</div><div class='add'>+When requesting permission for a feature, the kernel checks the</div><div class='add'>+availability. The kernel ensures that sigaltstacks in the process's tasks</div><div class='add'>+are large enough to accommodate the resulting large signal frame. It</div><div class='add'>+enforces this both during ARCH_REQ_XCOMP_SUPP and during any subsequent</div><div class='add'>+sigaltstack(2) calls. If an installed sigaltstack is smaller than the</div><div class='add'>+resulting sigframe size, ARCH_REQ_XCOMP_SUPP results in -ENOSUPP. Also,</div><div class='add'>+sigaltstack(2) results in -ENOMEM if the requested altstack is too small</div><div class='add'>+for the permitted features.</div><div class='add'>+</div><div class='add'>+Permission, when granted, is valid per process. Permissions are inherited</div><div class='add'>+on fork(2) and cleared on exec(3).</div><div class='add'>+</div><div class='add'>+The first use of an instruction related to a dynamically enabled feature is</div><div class='add'>+trapped by the kernel. The trap handler checks whether the process has</div><div class='add'>+permission to use the feature. If the process has no permission then the</div><div class='add'>+kernel sends SIGILL to the application. If the process has permission then</div><div class='add'>+the handler allocates a larger xstate buffer for the task so the large</div><div class='add'>+state can be context switched. In the unlikely cases that the allocation</div><div class='add'>+fails, the kernel sends SIGSEGV.</div><div class='add'>+</div><div class='add'>+AMX TILE_DATA enabling example</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Below is the example of how userspace applications enable</div><div class='add'>+TILE_DATA dynamically:</div><div class='add'>+</div><div class='add'>+  1. The application first needs to query the kernel for AMX</div><div class='add'>+     support::</div><div class='add'>+</div><div class='add'>+        #include &lt;asm/prctl.h&gt;</div><div class='add'>+        #include &lt;sys/syscall.h&gt;</div><div class='add'>+        #include &lt;stdio.h&gt;</div><div class='add'>+        #include &lt;unistd.h&gt;</div><div class='add'>+</div><div class='add'>+        #ifndef ARCH_GET_XCOMP_SUPP</div><div class='add'>+        #define ARCH_GET_XCOMP_SUPP  0x1021</div><div class='add'>+        #endif</div><div class='add'>+</div><div class='add'>+        #ifndef ARCH_XCOMP_TILECFG</div><div class='add'>+        #define ARCH_XCOMP_TILECFG   17</div><div class='add'>+        #endif</div><div class='add'>+</div><div class='add'>+        #ifndef ARCH_XCOMP_TILEDATA</div><div class='add'>+        #define ARCH_XCOMP_TILEDATA  18</div><div class='add'>+        #endif</div><div class='add'>+</div><div class='add'>+        #define MASK_XCOMP_TILE      ((1 &lt;&lt; ARCH_XCOMP_TILECFG) | \</div><div class='add'>+                                      (1 &lt;&lt; ARCH_XCOMP_TILEDATA))</div><div class='add'>+</div><div class='add'>+        unsigned long features;</div><div class='add'>+        long rc;</div><div class='add'>+</div><div class='add'>+        ...</div><div class='add'>+</div><div class='add'>+        rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_SUPP, &amp;features);</div><div class='add'>+</div><div class='add'>+        if (!rc &amp;&amp; (features &amp; MASK_XCOMP_TILE) == MASK_XCOMP_TILE)</div><div class='add'>+            printf("AMX is available.\n");</div><div class='add'>+</div><div class='add'>+  2. After that, determining support for AMX, an application must</div><div class='add'>+     explicitly ask permission to use it::</div><div class='add'>+</div><div class='add'>+        #ifndef ARCH_REQ_XCOMP_PERM</div><div class='add'>+        #define ARCH_REQ_XCOMP_PERM  0x1023</div><div class='add'>+        #endif</div><div class='add'>+</div><div class='add'>+        ...</div><div class='add'>+</div><div class='add'>+        rc = syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_PERM, ARCH_XCOMP_TILEDATA);</div><div class='add'>+</div><div class='add'>+        if (!rc)</div><div class='add'>+            printf("AMX is ready for use.\n");</div><div class='add'>+</div><div class='add'>+Note this example does not include the sigaltstack preparation.</div><div class='add'>+</div><div class='add'>+Dynamic features in signal frames</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+Dynamcally enabled features are not written to the signal frame upon signal</div><div class='add'>+entry if the feature is in its initial configuration.  This differs from</div><div class='add'>+non-dynamic features which are always written regardless of their</div><div class='add'>+configuration.  Signal handlers can examine the XSAVE buffer's XSTATE_BV</div><div class='add'>+field to determine if a features was written.</div><div class='add'>+</div><div class='add'>+Dynamic features for virtual machines</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+The permission for the guest state component needs to be managed separately</div><div class='add'>+from the host, as they are exclusive to each other. A coupled of options</div><div class='add'>+are extended to control the guest permission:</div><div class='add'>+</div><div class='add'>+-ARCH_GET_XCOMP_GUEST_PERM</div><div class='add'>+</div><div class='add'>+ arch_prctl(ARCH_GET_XCOMP_GUEST_PERM, &amp;features);</div><div class='add'>+</div><div class='add'>+ ARCH_GET_XCOMP_GUEST_PERM is a variant of ARCH_GET_XCOMP_PERM. So it</div><div class='add'>+ provides the same semantics and functionality but for the guest</div><div class='add'>+ components.</div><div class='add'>+</div><div class='add'>+-ARCH_REQ_XCOMP_GUEST_PERM</div><div class='add'>+</div><div class='add'>+ arch_prctl(ARCH_REQ_XCOMP_GUEST_PERM, feature_nr);</div><div class='add'>+</div><div class='add'>+ ARCH_REQ_XCOMP_GUEST_PERM is a variant of ARCH_REQ_XCOMP_PERM. It has the</div><div class='add'>+ same semantics for the guest permission. While providing a similar</div><div class='add'>+ functionality, this comes with a constraint. Permission is frozen when the</div><div class='add'>+ first VCPU is created. Any attempt to change permission after that point</div><div class='add'>+ is going to be rejected. So, the permission has to be requested before the</div><div class='add'>+ first VCPU creation.</div><div class='add'>+</div><div class='add'>+Note that some VMMs may have already established a set of supported state</div><div class='add'>+components. These options are not presumed to support any particular VMM.</div><div class='head'>diff --git a/Documentation/x86/zero-page.rst b/Documentation/arch/x86/zero-page.rst<br/>index f088f5881666..45aa9cceb4f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/x86/zero-page.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/x86/zero-page.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/x86/zero-page.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/x86/zero-page.rst</a></div><div class='hunk'>@@ -19,6 +19,7 @@ Offset/Size	Proto	Name			Meaning</div><div class='ctx'> 058/008		ALL	tboot_addr      	Physical address of tboot shared page</div><div class='ctx'> 060/010		ALL	ist_info		Intel SpeedStep (IST) BIOS support information</div><div class='ctx'> 						(struct ist_info)</div><div class='add'>+070/008		ALL	acpi_rsdp_addr		Physical address of ACPI RSDP table</div><div class='ctx'> 080/010		ALL	hd0_info		hd0 disk parameter, OBSOLETE!!</div><div class='ctx'> 090/010		ALL	hd1_info		hd1 disk parameter, OBSOLETE!!</div><div class='ctx'> 0A0/010		ALL	sys_desc_table		System description table (struct sys_desc_table),</div><div class='hunk'>@@ -27,6 +28,7 @@ Offset/Size	Proto	Name			Meaning</div><div class='ctx'> 0C0/004		ALL	ext_ramdisk_image	ramdisk_image high 32bits</div><div class='ctx'> 0C4/004		ALL	ext_ramdisk_size	ramdisk_size high 32bits</div><div class='ctx'> 0C8/004		ALL	ext_cmd_line_ptr	cmd_line_ptr high 32bits</div><div class='add'>+13C/004		ALL	cc_blob_address		Physical address of Confidential Computing blob</div><div class='ctx'> 140/080		ALL	edid_info		Video mode setup (struct edid_info)</div><div class='ctx'> 1C0/020		ALL	efi_info		EFI 32 information (struct efi_info)</div><div class='ctx'> 1E0/004		ALL	alt_mem_k		Alternative mem check, in KB</div><div class='head'>diff --git a/Documentation/xtensa/atomctl.rst b/Documentation/arch/xtensa/atomctl.rst<br/>index 1ecbd0ba9a2e..1ecbd0ba9a2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/xtensa/atomctl.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/xtensa/atomctl.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/xtensa/atomctl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/xtensa/atomctl.rst</a></div><div class='head'>diff --git a/Documentation/xtensa/booting.rst b/Documentation/arch/xtensa/booting.rst<br/>index e1b83707e5b6..e1b83707e5b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/xtensa/booting.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/xtensa/booting.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/xtensa/booting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/xtensa/booting.rst</a></div><div class='head'>diff --git a/Documentation/xtensa/features.rst b/Documentation/arch/xtensa/features.rst<br/>index 6b92c7bfa19d..6b92c7bfa19d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/xtensa/features.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/xtensa/features.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/xtensa/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/xtensa/features.rst</a></div><div class='head'>diff --git a/Documentation/xtensa/index.rst b/Documentation/arch/xtensa/index.rst<br/>index 69952446a9be..69952446a9be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/xtensa/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/xtensa/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/xtensa/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/xtensa/index.rst</a></div><div class='head'>diff --git a/Documentation/xtensa/mmu.rst b/Documentation/arch/xtensa/mmu.rst<br/>index 450573afa31a..450573afa31a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/xtensa/mmu.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/xtensa/mmu.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arch/xtensa/mmu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arch/xtensa/mmu.rst</a></div><div class='head'>diff --git a/Documentation/arm/google/chromebook-boot-flow.rst b/Documentation/arm/google/chromebook-boot-flow.rst<br/>new file mode 100644<br/>index 000000000000..36da77684bba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/google/chromebook-boot-flow.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/google/chromebook-boot-flow.rst</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+======================================</div><div class='add'>+Chromebook Boot Flow</div><div class='add'>+======================================</div><div class='add'>+</div><div class='add'>+Most recent Chromebooks that use device tree are using the opensource</div><div class='add'>+depthcharge_ bootloader. Depthcharge_ expects the OS to be packaged as a `FIT</div><div class='add'>+Image`_ which contains an OS image as well as a collection of device trees. It</div><div class='add'>+is up to depthcharge_ to pick the right device tree from the `FIT Image`_ and</div><div class='add'>+provide it to the OS.</div><div class='add'>+</div><div class='add'>+The scheme that depthcharge_ uses to pick the device tree takes into account</div><div class='add'>+three variables:</div><div class='add'>+</div><div class='add'>+- Board name, specified at depthcharge_ compile time. This is $(BOARD) below.</div><div class='add'>+- Board revision number, determined at runtime (perhaps by reading GPIO</div><div class='add'>+  strappings, perhaps via some other method). This is $(REV) below.</div><div class='add'>+- SKU number, read from GPIO strappings at boot time. This is $(SKU) below.</div><div class='add'>+</div><div class='add'>+For recent Chromebooks, depthcharge_ creates a match list that looks like this:</div><div class='add'>+</div><div class='add'>+- google,$(BOARD)-rev$(REV)-sku$(SKU)</div><div class='add'>+- google,$(BOARD)-rev$(REV)</div><div class='add'>+- google,$(BOARD)-sku$(SKU)</div><div class='add'>+- google,$(BOARD)</div><div class='add'>+</div><div class='add'>+Note that some older Chromebooks use a slightly different list that may</div><div class='add'>+not include SKU matching or may prioritize SKU/rev differently.</div><div class='add'>+</div><div class='add'>+Note that for some boards there may be extra board-specific logic to inject</div><div class='add'>+extra compatibles into the list, but this is uncommon.</div><div class='add'>+</div><div class='add'>+Depthcharge_ will look through all device trees in the `FIT Image`_ trying to</div><div class='add'>+find one that matches the most specific compatible. It will then look</div><div class='add'>+through all device trees in the `FIT Image`_ trying to find the one that</div><div class='add'>+matches the *second most* specific compatible, etc.</div><div class='add'>+</div><div class='add'>+When searching for a device tree, depthcharge_ doesn't care where the</div><div class='add'>+compatible string falls within a device tree's root compatible string array.</div><div class='add'>+As an example, if we're on board "lazor", rev 4, SKU 0 and we have two device</div><div class='add'>+trees:</div><div class='add'>+</div><div class='add'>+- "google,lazor-rev5-sku0", "google,lazor-rev4-sku0", "qcom,sc7180"</div><div class='add'>+- "google,lazor", "qcom,sc7180"</div><div class='add'>+</div><div class='add'>+Then depthcharge_ will pick the first device tree even though</div><div class='add'>+"google,lazor-rev4-sku0" was the second compatible listed in that device tree.</div><div class='add'>+This is because it is a more specific compatible than "google,lazor".</div><div class='add'>+</div><div class='add'>+It should be noted that depthcharge_ does not have any smarts to try to</div><div class='add'>+match board or SKU revisions that are "close by". That is to say that</div><div class='add'>+if depthcharge_ knows it's on "rev4" of a board but there is no "rev4"</div><div class='add'>+device tree then depthcharge_ *won't* look for a "rev3" device tree.</div><div class='add'>+</div><div class='add'>+In general when any significant changes are made to a board the board</div><div class='add'>+revision number is increased even if none of those changes need to</div><div class='add'>+be reflected in the device tree. Thus it's fairly common to see device</div><div class='add'>+trees with multiple revisions.</div><div class='add'>+</div><div class='add'>+It should be noted that, taking into account the above system that</div><div class='add'>+depthcharge_ has, the most flexibility is achieved if the device tree</div><div class='add'>+supporting the newest revision(s) of a board omits the "-rev{REV}"</div><div class='add'>+compatible strings. When this is done then if you get a new board</div><div class='add'>+revision and try to run old software on it then we'll at pick the</div><div class='add'>+newest device tree we know about.</div><div class='add'>+</div><div class='add'>+.. _depthcharge: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/depthcharge/</div><div class='add'>+.. _`FIT Image`: https://doc.coreboot.org/lib/payloads/fit.html</div><div class='head'>diff --git a/Documentation/arm/index.rst b/Documentation/arm/index.rst<br/>index 2bda5461a80b..fd43502ae924 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/index.rst</a></div><div class='hunk'>@@ -31,6 +31,8 @@ SoC-specific documents</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='add'>+   google/chromebook-boot-flow</div><div class='add'>+</div><div class='ctx'>    ixp4xx</div><div class='ctx'> </div><div class='ctx'>    marvell</div><div class='hunk'>@@ -56,22 +58,21 @@ SoC-specific documents</div><div class='ctx'>    stm32/stm32f769-overview</div><div class='ctx'>    stm32/stm32f429-overview</div><div class='ctx'>    stm32/stm32mp13-overview</div><div class='add'>+   stm32/stm32mp151-overview</div><div class='ctx'>    stm32/stm32mp157-overview</div><div class='add'>+   stm32/stm32-dma-mdma-chaining</div><div class='ctx'> </div><div class='ctx'>    sunxi</div><div class='ctx'> </div><div class='ctx'>    samsung/index</div><div class='del'>-   samsung-s3c24xx/index</div><div class='ctx'> </div><div class='ctx'>    sunxi/clocks</div><div class='ctx'> </div><div class='ctx'>    spear/overview</div><div class='ctx'> </div><div class='del'>-   sti/stih416-overview</div><div class='ctx'>    sti/stih407-overview</div><div class='ctx'>    sti/stih418-overview</div><div class='ctx'>    sti/overview</div><div class='del'>-   sti/stih415-overview</div><div class='ctx'> </div><div class='ctx'>    vfp/release-notes</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arm/marvell.rst b/Documentation/arm/marvell.rst<br/>index 2f41caa0096c..3d369a566038 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/marvell.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/marvell.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/marvell.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/marvell.rst</a></div><div class='hunk'>@@ -14,18 +14,20 @@ Orion family</div><div class='ctx'> </div><div class='ctx'>   Flavors:</div><div class='ctx'>         - 88F5082</div><div class='del'>-        - 88F5181</div><div class='del'>-        - 88F5181L</div><div class='del'>-        - 88F5182</div><div class='add'>+        - 88F5181  a.k.a Orion-1</div><div class='add'>+        - 88F5181L a.k.a Orion-VoIP</div><div class='add'>+        - 88F5182  a.k.a Orion-NAS</div><div class='ctx'> </div><div class='ctx'>                - Datasheet: https://web.archive.org/web/20210124231420/http://csclub.uwaterloo.ca/~board/ts7800/MV88F5182-datasheet.pdf</div><div class='ctx'>                - Programmer's User Guide: https://web.archive.org/web/20210124231536/http://csclub.uwaterloo.ca/~board/ts7800/MV88F5182-opensource-manual.pdf</div><div class='ctx'>                - User Manual: https://web.archive.org/web/20210124231631/http://csclub.uwaterloo.ca/~board/ts7800/MV88F5182-usermanual.pdf</div><div class='ctx'>                - Functional Errata: https://web.archive.org/web/20210704165540/https://www.digriz.org.uk/ts78xx/88F5182_Functional_Errata.pdf</div><div class='del'>-        - 88F5281</div><div class='add'>+        - 88F5281  a.k.a Orion-2</div><div class='ctx'> </div><div class='ctx'>                - Datasheet: https://web.archive.org/web/20131028144728/http://www.ocmodshop.com/images/reviews/networking/qnap_ts409u/marvel_88f5281_data_sheet.pdf</div><div class='del'>-        - 88F6183</div><div class='add'>+        - 88F6183  a.k.a Orion-1-90</div><div class='add'>+  Homepage:</div><div class='add'>+        https://web.archive.org/web/20080607215437/http://www.marvell.com/products/media/index.jsp</div><div class='ctx'>   Core:</div><div class='ctx'> 	Feroceon 88fr331 (88f51xx) or 88fr531-vd (88f52xx) ARMv5 compatible</div><div class='ctx'>   Linux kernel mach directory:</div><div class='hunk'>@@ -374,8 +376,6 @@ PXA 2xx/3xx/93x/95x family</div><div class='ctx'> </div><div class='ctx'>    Linux kernel mach directory:</div><div class='ctx'> 	arch/arm/mach-pxa</div><div class='del'>-   Linux kernel plat directory:</div><div class='del'>-	arch/arm/plat-pxa</div><div class='ctx'> </div><div class='ctx'> MMP/MMP2/MMP3 family (communication processor)</div><div class='ctx'> ----------------------------------------------</div><div class='hunk'>@@ -429,8 +429,6 @@ MMP/MMP2/MMP3 family (communication processor)</div><div class='ctx'> </div><div class='ctx'>    Linux kernel mach directory:</div><div class='ctx'> 	arch/arm/mach-mmp</div><div class='del'>-   Linux kernel plat directory:</div><div class='del'>-	arch/arm/plat-pxa</div><div class='ctx'> </div><div class='ctx'> Berlin family (Multimedia Solutions)</div><div class='ctx'> -------------------------------------</div><div class='hunk'>@@ -518,9 +516,6 @@ Long-term plans</div><div class='ctx'>    Business Unit) in a single mach-&lt;foo&gt; directory. The plat-orion/</div><div class='ctx'>    would therefore disappear.</div><div class='ctx'> </div><div class='del'>- * Unify the mach-mmp/ and mach-pxa/ into the same mach-pxa</div><div class='del'>-   directory. The plat-pxa/ would therefore disappear.</div><div class='del'>-</div><div class='ctx'> Credits</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/cpufreq.rst b/Documentation/arm/samsung-s3c24xx/cpufreq.rst<br/>deleted file mode 100644<br/>index 2ddc26c03b1f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/cpufreq.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/cpufreq.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,76 +0,0 @@</div><div class='del'>-=======================</div><div class='del'>-S3C24XX CPUfreq support</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>- The S3C24XX series support a number of power saving systems, such as</div><div class='del'>- the ability to change the core, memory and peripheral operating</div><div class='del'>- frequencies. The core control is exported via the CPUFreq driver</div><div class='del'>- which has a number of different manual or automatic controls over the</div><div class='del'>- rate the core is running at.</div><div class='del'>-</div><div class='del'>- There are two forms of the driver depending on the specific CPU and</div><div class='del'>- how the clocks are arranged. The first implementation used as single</div><div class='del'>- PLL to feed the ARM, memory and peripherals via a series of dividers</div><div class='del'>- and muxes and this is the implementation that is documented here. A</div><div class='del'>- newer version where there is a separate PLL and clock divider for the</div><div class='del'>- ARM core is available as a separate driver.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Layout</div><div class='del'>-------</div><div class='del'>-</div><div class='del'>- The code core manages the CPU specific drivers, any data that they</div><div class='del'>- need to register and the interface to the generic drivers/cpufreq</div><div class='del'>- system. Each CPU registers a driver to control the PLL, clock dividers</div><div class='del'>- and anything else associated with it. Any board that wants to use this</div><div class='del'>- framework needs to supply at least basic details of what is required.</div><div class='del'>-</div><div class='del'>- The core registers with drivers/cpufreq at init time if all the data</div><div class='del'>- necessary has been supplied.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-CPU support</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>- The support for each CPU depends on the facilities provided by the</div><div class='del'>- SoC and the driver as each device has different PLL and clock chains</div><div class='del'>- associated with it.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Slow Mode</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>- The SLOW mode where the PLL is turned off altogether and the</div><div class='del'>- system is fed by the external crystal input is currently not</div><div class='del'>- supported.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-sysfs</div><div class='del'>------</div><div class='del'>-</div><div class='del'>- The core code exports extra information via sysfs in the directory</div><div class='del'>- devices/system/cpu/cpu0/arch-freq.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Board Support</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>- Each board that wants to use the cpufreq code must register some basic</div><div class='del'>- information with the core driver to provide information about what the</div><div class='del'>- board requires and any restrictions being placed on it.</div><div class='del'>-</div><div class='del'>- The board needs to supply information about whether it needs the IO bank</div><div class='del'>- timings changing, any maximum frequency limits and information about the</div><div class='del'>- SDRAM refresh rate.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Document Author</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Ben Dooks, Copyright 2009 Simtec Electronics</div><div class='del'>-Licensed under GPLv2</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/eb2410itx.rst b/Documentation/arm/samsung-s3c24xx/eb2410itx.rst<br/>deleted file mode 100644<br/>index 7863c93652f8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/eb2410itx.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/eb2410itx.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-===================================</div><div class='del'>-Simtec Electronics EB2410ITX (BAST)</div><div class='del'>-===================================</div><div class='del'>-</div><div class='del'>-	http://www.simtec.co.uk/products/EB2410ITX/</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The EB2410ITX is a S3C2410 based development board with a variety of</div><div class='del'>-  peripherals and expansion connectors. This board is also known by</div><div class='del'>-  the shortened name of Bast.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Configuration</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  To set the default configuration, use `make bast_defconfig` which</div><div class='del'>-  supports the commonly used features of this board.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Support</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-  Official support information can be found on the Simtec Electronics</div><div class='del'>-  website, at the product page http://www.simtec.co.uk/products/EB2410ITX/</div><div class='del'>-</div><div class='del'>-  Useful links:</div><div class='del'>-</div><div class='del'>-    - Resources Page http://www.simtec.co.uk/products/EB2410ITX/resources.html</div><div class='del'>-</div><div class='del'>-    - Board FAQ at http://www.simtec.co.uk/products/EB2410ITX/faq.html</div><div class='del'>-</div><div class='del'>-    - Bootloader info http://www.simtec.co.uk/products/SWABLE/resources.html</div><div class='del'>-      and FAQ http://www.simtec.co.uk/products/SWABLE/faq.html</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-MTD</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  The NAND and NOR support has been merged from the linux-mtd project.</div><div class='del'>-  Any problems, see http://www.linux-mtd.infradead.org/ for more</div><div class='del'>-  information or up-to-date versions of linux-mtd.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-IDE</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  Both onboard IDE ports are supported, however there is no support for</div><div class='del'>-  changing speed of devices, PIO Mode 4 capable drives should be used.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Maintainers</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-  This board is maintained by Simtec Electronics.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Copyright 2004 Ben Dooks, Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/gpio.rst b/Documentation/arm/samsung-s3c24xx/gpio.rst<br/>deleted file mode 100644<br/>index f4a8c800a457..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/gpio.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/gpio.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,172 +0,0 @@</div><div class='del'>-====================</div><div class='del'>-S3C24XX GPIO Control</div><div class='del'>-====================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The s3c2410 kernel provides an interface to configure and</div><div class='del'>-  manipulate the state of the GPIO pins, and find out other</div><div class='del'>-  information about them.</div><div class='del'>-</div><div class='del'>-  There are a number of conditions attached to the configuration</div><div class='del'>-  of the s3c2410 GPIO system, please read the Samsung provided</div><div class='del'>-  data-sheet/users manual to find out the complete list.</div><div class='del'>-</div><div class='del'>-  See Documentation/arm/samsung/gpio.rst for the core implementation.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-GPIOLIB</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-  With the event of the GPIOLIB in drivers/gpio, support for some</div><div class='del'>-  of the GPIO functions such as reading and writing a pin will</div><div class='del'>-  be removed in favour of this common access method.</div><div class='del'>-</div><div class='del'>-  Once all the extant drivers have been converted, the functions</div><div class='del'>-  listed below will be removed (they may be marked as __deprecated</div><div class='del'>-  in the near future).</div><div class='del'>-</div><div class='del'>-  The following functions now either have a `s3c_` specific variant</div><div class='del'>-  or are merged into gpiolib. See the definitions in</div><div class='del'>-  arch/arm/mach-s3c/gpio-cfg.h:</div><div class='del'>-</div><div class='del'>-  - s3c2410_gpio_setpin()	gpio_set_value() or gpio_direction_output()</div><div class='del'>-  - s3c2410_gpio_getpin()	gpio_get_value() or gpio_direction_input()</div><div class='del'>-  - s3c2410_gpio_getirq()	gpio_to_irq()</div><div class='del'>-  - s3c2410_gpio_cfgpin()	s3c_gpio_cfgpin()</div><div class='del'>-  - s3c2410_gpio_getcfg()	s3c_gpio_getcfg()</div><div class='del'>-  - s3c2410_gpio_pullup()	s3c_gpio_setpull()</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-GPIOLIB conversion</div><div class='del'>-------------------</div><div class='del'>-</div><div class='del'>-If you need to convert your board or driver to use gpiolib from the phased</div><div class='del'>-out s3c2410 API, then here are some notes on the process.</div><div class='del'>-</div><div class='del'>-1) If your board is exclusively using an GPIO, say to control peripheral</div><div class='del'>-   power, then it will require to claim the gpio with gpio_request() before</div><div class='del'>-   it can use it.</div><div class='del'>-</div><div class='del'>-   It is recommended to check the return value, with at least WARN_ON()</div><div class='del'>-   during initialisation.</div><div class='del'>-</div><div class='del'>-2) The s3c2410_gpio_cfgpin() can be directly replaced with s3c_gpio_cfgpin()</div><div class='del'>-   as they have the same arguments, and can either take the pin specific</div><div class='del'>-   values, or the more generic special-function-number arguments.</div><div class='del'>-</div><div class='del'>-3) s3c2410_gpio_pullup() changes have the problem that while the</div><div class='del'>-   s3c2410_gpio_pullup(x, 1) can be easily translated to the</div><div class='del'>-   s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0)</div><div class='del'>-   are not so easy.</div><div class='del'>-</div><div class='del'>-   The s3c2410_gpio_pullup(x, 0) case enables the pull-up (or in the case</div><div class='del'>-   of some of the devices, a pull-down) and as such the new API distinguishes</div><div class='del'>-   between the UP and DOWN case. There is currently no 'just turn on' setting</div><div class='del'>-   which may be required if this becomes a problem.</div><div class='del'>-</div><div class='del'>-4) s3c2410_gpio_setpin() can be replaced by gpio_set_value(), the old call</div><div class='del'>-   does not implicitly configure the relevant gpio to output. The gpio</div><div class='del'>-   direction should be changed before using gpio_set_value().</div><div class='del'>-</div><div class='del'>-5) s3c2410_gpio_getpin() is replaceable by gpio_get_value() if the pin</div><div class='del'>-   has been set to input. It is currently unknown what the behaviour is</div><div class='del'>-   when using gpio_get_value() on an output pin (s3c2410_gpio_getpin</div><div class='del'>-   would return the value the pin is supposed to be outputting).</div><div class='del'>-</div><div class='del'>-6) s3c2410_gpio_getirq() should be directly replaceable with the</div><div class='del'>-   gpio_to_irq() call.</div><div class='del'>-</div><div class='del'>-The s3c2410_gpio and `gpio_` calls have always operated on the same gpio</div><div class='del'>-numberspace, so there is no problem with converting the gpio numbering</div><div class='del'>-between the calls.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Headers</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-  See arch/arm/mach-s3c/regs-gpio-s3c24xx.h for the list</div><div class='del'>-  of GPIO pins, and the configuration values for them. This</div><div class='del'>-  is included by using #include &lt;mach/regs-gpio.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN Numbers</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-  Each pin has an unique number associated with it in regs-gpio.h,</div><div class='del'>-  e.g. S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell</div><div class='del'>-  the GPIO functions which pin is to be used.</div><div class='del'>-</div><div class='del'>-  With the conversion to gpiolib, there is no longer a direct conversion</div><div class='del'>-  from gpio pin number to register base address as in earlier kernels. This</div><div class='del'>-  is due to the number space required for newer SoCs where the later</div><div class='del'>-  GPIOs are not contiguous.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Configuring a pin</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-  The following function allows the configuration of a given pin to</div><div class='del'>-  be changed.</div><div class='del'>-</div><div class='del'>-    void s3c_gpio_cfgpin(unsigned int pin, unsigned int function);</div><div class='del'>-</div><div class='del'>-  e.g.:</div><div class='del'>-</div><div class='del'>-     s3c_gpio_cfgpin(S3C2410_GPA(0), S3C_GPIO_SFN(1));</div><div class='del'>-     s3c_gpio_cfgpin(S3C2410_GPE(8), S3C_GPIO_SFN(2));</div><div class='del'>-</div><div class='del'>-   which would turn GPA(0) into the lowest Address line A0, and set</div><div class='del'>-   GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Reading the current configuration</div><div class='del'>----------------------------------</div><div class='del'>-</div><div class='del'>-  The current configuration of a pin can be read by using standard</div><div class='del'>-  gpiolib function:</div><div class='del'>-</div><div class='del'>-  s3c_gpio_getcfg(unsigned int pin);</div><div class='del'>-</div><div class='del'>-  The return value will be from the same set of values which can be</div><div class='del'>-  passed to s3c_gpio_cfgpin().</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Configuring a pull-up resistor</div><div class='del'>-------------------------------</div><div class='del'>-</div><div class='del'>-  A large proportion of the GPIO pins on the S3C2410 can have weak</div><div class='del'>-  pull-up resistors enabled. This can be configured by the following</div><div class='del'>-  function:</div><div class='del'>-</div><div class='del'>-    void s3c_gpio_setpull(unsigned int pin, unsigned int to);</div><div class='del'>-</div><div class='del'>-  Where the to value is S3C_GPIO_PULL_NONE to set the pull-up off,</div><div class='del'>-  and S3C_GPIO_PULL_UP to enable the specified pull-up. Any other</div><div class='del'>-  values are currently undefined.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Getting and setting the state of a PIN</div><div class='del'>---------------------------------------</div><div class='del'>-</div><div class='del'>-  These calls are now implemented by the relevant gpiolib calls, convert</div><div class='del'>-  your board or driver to use gpiolib.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Getting the IRQ number associated with a PIN</div><div class='del'>---------------------------------------------</div><div class='del'>-</div><div class='del'>-  A standard gpiolib function can map the given pin number to an IRQ</div><div class='del'>-  number to pass to the IRQ system.</div><div class='del'>-</div><div class='del'>-   int gpio_to_irq(unsigned int pin);</div><div class='del'>-</div><div class='del'>-  Note, not all pins have an IRQ.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Author</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-Ben Dooks, 03 October 2004</div><div class='del'>-Copyright 2004 Ben Dooks, Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/h1940.rst b/Documentation/arm/samsung-s3c24xx/h1940.rst<br/>deleted file mode 100644<br/>index 62a562c178e3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/h1940.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/h1940.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-=============</div><div class='del'>-HP IPAQ H1940</div><div class='del'>-=============</div><div class='del'>-</div><div class='del'>-http://www.handhelds.org/projects/h1940.html</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The HP H1940 is a S3C2410 based handheld device, with</div><div class='del'>-  bluetooth connectivity.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Support</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-  A variety of information is available</div><div class='del'>-</div><div class='del'>-  handhelds.org project page:</div><div class='del'>-</div><div class='del'>-    http://www.handhelds.org/projects/h1940.html</div><div class='del'>-</div><div class='del'>-  handhelds.org wiki page:</div><div class='del'>-</div><div class='del'>-    http://handhelds.org/moin/moin.cgi/HpIpaqH1940</div><div class='del'>-</div><div class='del'>-  Herbert Pötzl pages:</div><div class='del'>-</div><div class='del'>-    http://vserver.13thfloor.at/H1940/</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Maintainers</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-  This project is being maintained and developed by a variety</div><div class='del'>-  of people, including Ben Dooks, Arnaud Patard, and Herbert Pötzl.</div><div class='del'>-</div><div class='del'>-  Thanks to the many others who have also provided support.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-(c) 2005 Ben Dooks</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/index.rst b/Documentation/arm/samsung-s3c24xx/index.rst<br/>deleted file mode 100644<br/>index ccb951a0bedb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/index.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-==========================</div><div class='del'>-Samsung S3C24XX SoC Family</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-.. toctree::</div><div class='del'>-   :maxdepth: 1</div><div class='del'>-</div><div class='del'>-   h1940</div><div class='del'>-   gpio</div><div class='del'>-   cpufreq</div><div class='del'>-   suspend</div><div class='del'>-   usb-host</div><div class='del'>-   s3c2412</div><div class='del'>-   eb2410itx</div><div class='del'>-   nand</div><div class='del'>-   smdk2440</div><div class='del'>-   s3c2413</div><div class='del'>-   overview</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/nand.rst b/Documentation/arm/samsung-s3c24xx/nand.rst<br/>deleted file mode 100644<br/>index 938995694ee7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/nand.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/nand.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-====================</div><div class='del'>-S3C24XX NAND Support</div><div class='del'>-====================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-Small Page NAND</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-The driver uses a 512 byte (1 page) ECC code for this setup. The</div><div class='del'>-ECC code is not directly compatible with the default kernel ECC</div><div class='del'>-code, so the driver enforces its own OOB layout and ECC parameters</div><div class='del'>-</div><div class='del'>-Large Page NAND</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-The driver is capable of handling NAND flash with a 2KiB page</div><div class='del'>-size, with support for hardware ECC generation and correction.</div><div class='del'>-</div><div class='del'>-Unlike the 512byte page mode, the driver generates ECC data for</div><div class='del'>-each 256 byte block in an 2KiB page. This means that more than</div><div class='del'>-one error in a page can be rectified. It also means that the</div><div class='del'>-OOB layout remains the default kernel layout for these flashes.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Document Author</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Ben Dooks, Copyright 2007 Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/overview.rst b/Documentation/arm/samsung-s3c24xx/overview.rst<br/>deleted file mode 100644<br/>index 14535e5cffb7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/overview.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,311 +0,0 @@</div><div class='del'>-==========================</div><div class='del'>-S3C24XX ARM Linux Overview</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The Samsung S3C24XX range of ARM9 System-on-Chip CPUs are supported</div><div class='del'>-  by the 's3c2410' architecture of ARM Linux. Currently the S3C2410,</div><div class='del'>-  S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 and S3C2450 devices</div><div class='del'>-  are supported.</div><div class='del'>-</div><div class='del'>-  Support for the S3C2400 and S3C24A0 series was never completed and the</div><div class='del'>-  corresponding code has been removed after a while.  If someone wishes to</div><div class='del'>-  revive this effort, partial support can be retrieved from earlier Linux</div><div class='del'>-  versions.</div><div class='del'>-</div><div class='del'>-  The S3C2416 and S3C2450 devices are very similar and S3C2450 support is</div><div class='del'>-  included under the arch/arm/mach-s3c directory. Note, while core</div><div class='del'>-  support for these SoCs is in, work on some of the extra peripherals</div><div class='del'>-  and extra interrupts is still ongoing.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Configuration</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  A generic S3C2410 configuration is provided, and can be used as the</div><div class='del'>-  default by `make s3c2410_defconfig`. This configuration has support</div><div class='del'>-  for all the machines, and the commonly used features on them.</div><div class='del'>-</div><div class='del'>-  Certain machines may have their own default configurations as well,</div><div class='del'>-  please check the machine specific documentation.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Layout</div><div class='del'>-------</div><div class='del'>-</div><div class='del'>-  The core support files, register, kernel and paltform data are located in the</div><div class='del'>-  platform code contained in arch/arm/mach-s3c with headers in</div><div class='del'>-  arch/arm/mach-s3c/include</div><div class='del'>-</div><div class='del'>-arch/arm/mach-s3c:</div><div class='del'>-</div><div class='del'>-  Files in here are either common to all the s3c24xx family,</div><div class='del'>-  or are common to only some of them with names to indicate this</div><div class='del'>-  status. The files that are not common to all are generally named</div><div class='del'>-  with the initial cpu they support in the series to ensure a short</div><div class='del'>-  name without any possibility of confusion with newer devices.</div><div class='del'>-</div><div class='del'>-  As an example, initially s3c244x would cover s3c2440 and s3c2442, but</div><div class='del'>-  with the s3c2443 which does not share many of the same drivers in</div><div class='del'>-  this directory, the name becomes invalid. We stick to s3c2440-&lt;x&gt;</div><div class='del'>-  to indicate a driver that is s3c2440 and s3c2442 compatible.</div><div class='del'>-</div><div class='del'>-  This does mean that to find the status of any given SoC, a number</div><div class='del'>-  of directories may need to be searched.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Machines</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-  The currently supported machines are as follows:</div><div class='del'>-</div><div class='del'>-  Simtec Electronics EB2410ITX (BAST)</div><div class='del'>-</div><div class='del'>-    A general purpose development board, see EB2410ITX.txt for further</div><div class='del'>-    details</div><div class='del'>-</div><div class='del'>-  Simtec Electronics IM2440D20 (Osiris)</div><div class='del'>-</div><div class='del'>-    CPU Module from Simtec Electronics, with a S3C2440A CPU, nand flash</div><div class='del'>-    and a PCMCIA controller.</div><div class='del'>-</div><div class='del'>-  Samsung SMDK2410</div><div class='del'>-</div><div class='del'>-    Samsung's own development board, geared for PDA work.</div><div class='del'>-</div><div class='del'>-  Samsung/Aiji SMDK2412</div><div class='del'>-</div><div class='del'>-    The S3C2412 version of the SMDK2440.</div><div class='del'>-</div><div class='del'>-  Samsung/Aiji SMDK2413</div><div class='del'>-</div><div class='del'>-    The S3C2412 version of the SMDK2440.</div><div class='del'>-</div><div class='del'>-  Samsung/Meritech SMDK2440</div><div class='del'>-</div><div class='del'>-    The S3C2440 compatible version of the SMDK2440, which has the</div><div class='del'>-    option of an S3C2440 or S3C2442 CPU module.</div><div class='del'>-</div><div class='del'>-  Thorcom VR1000</div><div class='del'>-</div><div class='del'>-    Custom embedded board</div><div class='del'>-</div><div class='del'>-  HP IPAQ 1940</div><div class='del'>-</div><div class='del'>-    Handheld (IPAQ), available in several varieties</div><div class='del'>-</div><div class='del'>-  HP iPAQ rx3715</div><div class='del'>-</div><div class='del'>-    S3C2440 based IPAQ, with a number of variations depending on</div><div class='del'>-    features shipped.</div><div class='del'>-</div><div class='del'>-  Acer N30</div><div class='del'>-</div><div class='del'>-    A S3C2410 based PDA from Acer.  There is a Wiki page at</div><div class='del'>-    http://handhelds.org/moin/moin.cgi/AcerN30Documentation .</div><div class='del'>-</div><div class='del'>-  AML M5900</div><div class='del'>-</div><div class='del'>-    American Microsystems' M5900</div><div class='del'>-</div><div class='del'>-  Nex Vision Nexcoder</div><div class='del'>-  Nex Vision Otom</div><div class='del'>-</div><div class='del'>-    Two machines by Nex Vision</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Adding New Machines</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-  The architecture has been designed to support as many machines as can</div><div class='del'>-  be configured for it in one kernel build, and any future additions</div><div class='del'>-  should keep this in mind before altering items outside of their own</div><div class='del'>-  machine files.</div><div class='del'>-</div><div class='del'>-  Machine definitions should be kept in arch/arm/mach-s3c,</div><div class='del'>-  and there are a number of examples that can be looked at.</div><div class='del'>-</div><div class='del'>-  Read the kernel patch submission policies as well as the</div><div class='del'>-  Documentation/arm directory before submitting patches. The</div><div class='del'>-  ARM kernel series is managed by Russell King, and has a patch system</div><div class='del'>-  located at http://www.arm.linux.org.uk/developer/patches/</div><div class='del'>-  as well as mailing lists that can be found from the same site.</div><div class='del'>-</div><div class='del'>-  As a courtesy, please notify &lt;ben-linux@fluff.org&gt; of any new</div><div class='del'>-  machines or other modifications.</div><div class='del'>-</div><div class='del'>-  Any large scale modifications, or new drivers should be discussed</div><div class='del'>-  on the ARM kernel mailing list (linux-arm-kernel) before being</div><div class='del'>-  attempted. See http://www.arm.linux.org.uk/mailinglists/ for the</div><div class='del'>-  mailing list information.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-I2C</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  The hardware I2C core in the CPU is supported in single master</div><div class='del'>-  mode, and can be configured via platform data.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-RTC</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  Support for the onboard RTC unit, including alarm function.</div><div class='del'>-</div><div class='del'>-  This has recently been upgraded to use the new RTC core,</div><div class='del'>-  and the module has been renamed to rtc-s3c to fit in with</div><div class='del'>-  the new rtc naming scheme.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Watchdog</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-  The onchip watchdog is available via the standard watchdog</div><div class='del'>-  interface.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-NAND</div><div class='del'>-----</div><div class='del'>-</div><div class='del'>-  The current kernels now have support for the s3c2410 NAND</div><div class='del'>-  controller. If there are any problems the latest linux-mtd</div><div class='del'>-  code can be found from http://www.linux-mtd.infradead.org/</div><div class='del'>-</div><div class='del'>-  For more information see Documentation/arm/samsung-s3c24xx/nand.rst</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-SD/MMC</div><div class='del'>-------</div><div class='del'>-</div><div class='del'>-  The SD/MMC hardware pre S3C2443 is supported in the current</div><div class='del'>-  kernel, the driver is drivers/mmc/host/s3cmci.c and supports</div><div class='del'>-  1 and 4 bit SD or MMC cards.</div><div class='del'>-</div><div class='del'>-  The SDIO behaviour of this driver has not been fully tested. There is no</div><div class='del'>-  current support for hardware SDIO interrupts.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Serial</div><div class='del'>-------</div><div class='del'>-</div><div class='del'>-  The s3c2410 serial driver provides support for the internal</div><div class='del'>-  serial ports. These devices appear as /dev/ttySAC0 through 3.</div><div class='del'>-</div><div class='del'>-  To create device nodes for these, use the following commands</div><div class='del'>-</div><div class='del'>-    mknod ttySAC0 c 204 64</div><div class='del'>-    mknod ttySAC1 c 204 65</div><div class='del'>-    mknod ttySAC2 c 204 66</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-GPIO</div><div class='del'>-----</div><div class='del'>-</div><div class='del'>-  The core contains support for manipulating the GPIO, see the</div><div class='del'>-  documentation in GPIO.txt in the same directory as this file.</div><div class='del'>-</div><div class='del'>-  Newer kernels carry GPIOLIB, and support is being moved towards</div><div class='del'>-  this with some of the older support in line to be removed.</div><div class='del'>-</div><div class='del'>-  As of v2.6.34, the move towards using gpiolib support is almost</div><div class='del'>-  complete, and very little of the old calls are left.</div><div class='del'>-</div><div class='del'>-  See Documentation/arm/samsung-s3c24xx/gpio.rst for the S3C24XX specific</div><div class='del'>-  support and Documentation/arm/samsung/gpio.rst for the core Samsung</div><div class='del'>-  implementation.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Clock Management</div><div class='del'>-----------------</div><div class='del'>-</div><div class='del'>-  The core provides the interface defined in the header file</div><div class='del'>-  include/asm-arm/hardware/clock.h, to allow control over the</div><div class='del'>-  various clock units</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Suspend to RAM</div><div class='del'>---------------</div><div class='del'>-</div><div class='del'>-  For boards that provide support for suspend to RAM, the</div><div class='del'>-  system can be placed into low power suspend.</div><div class='del'>-</div><div class='del'>-  See Suspend.txt for more information.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-SPI</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  SPI drivers are available for both the in-built hardware</div><div class='del'>-  (although there is no DMA support yet) and a generic</div><div class='del'>-  GPIO based solution.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-LEDs</div><div class='del'>-----</div><div class='del'>-</div><div class='del'>-  There is support for GPIO based LEDs via a platform driver</div><div class='del'>-  in the LED subsystem.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Platform Data</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  Whenever a device has platform specific data that is specified</div><div class='del'>-  on a per-machine basis, care should be taken to ensure the</div><div class='del'>-  following:</div><div class='del'>-</div><div class='del'>-    1) that default data is not left in the device to confuse the</div><div class='del'>-       driver if a machine does not set it at startup</div><div class='del'>-</div><div class='del'>-    2) the data should (if possible) be marked as __initdata,</div><div class='del'>-       to ensure that the data is thrown away if the machine is</div><div class='del'>-       not the one currently in use.</div><div class='del'>-</div><div class='del'>-       The best way of doing this is to make a function that</div><div class='del'>-       kmalloc()s an area of memory, and copies the __initdata</div><div class='del'>-       and then sets the relevant device's platform data. Making</div><div class='del'>-       the function `__init` takes care of ensuring it is discarded</div><div class='del'>-       with the rest of the initialisation code::</div><div class='del'>-</div><div class='del'>-         static __init void s3c24xx_xxx_set_platdata(struct xxx_data *pd)</div><div class='del'>-         {</div><div class='del'>-             struct s3c2410_xxx_mach_info *npd;</div><div class='del'>-</div><div class='del'>-	   npd = kmalloc(sizeof(struct s3c2410_xxx_mach_info), GFP_KERNEL);</div><div class='del'>-	   if (npd) {</div><div class='del'>-	      memcpy(npd, pd, sizeof(struct s3c2410_xxx_mach_info));</div><div class='del'>-	      s3c_device_xxx.dev.platform_data = npd;</div><div class='del'>-	   } else {</div><div class='del'>-                printk(KERN_ERR "no memory for xxx platform data\n");</div><div class='del'>-	   }</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	Note, since the code is marked as __init, it should not be</div><div class='del'>-	exported outside arch/arm/mach-s3c/, or exported to</div><div class='del'>-	modules via EXPORT_SYMBOL() and related functions.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Port Contributors</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-  Ben Dooks (BJD)</div><div class='del'>-  Vincent Sanders</div><div class='del'>-  Herbert Potzl</div><div class='del'>-  Arnaud Patard (RTP)</div><div class='del'>-  Roc Wu</div><div class='del'>-  Klaus Fetscher</div><div class='del'>-  Dimitry Andric</div><div class='del'>-  Shannon Holland</div><div class='del'>-  Guillaume Gourat (NexVision)</div><div class='del'>-  Christer Weinigel (wingel) (Acer N30)</div><div class='del'>-  Lucas Correia Villa Real (S3C2400 port)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Document Author</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Ben Dooks, Copyright 2004-2006 Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/s3c2412.rst b/Documentation/arm/samsung-s3c24xx/s3c2412.rst<br/>deleted file mode 100644<br/>index 68b985fc6bf4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/s3c2412.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/s3c2412.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,121 +0,0 @@</div><div class='del'>-==========================</div><div class='del'>-S3C2412 ARM Linux Overview</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The S3C2412 is part of the S3C24XX range of ARM9 System-on-Chip CPUs</div><div class='del'>-  from Samsung. This part has an ARM926-EJS core, capable of running up</div><div class='del'>-  to 266MHz (see data-sheet for more information)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Clock</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-  The core clock code provides a set of clocks to the drivers, and allows</div><div class='del'>-  for source selection and a number of other features.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Power</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-  No support for suspend/resume to RAM in the current system.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-DMA</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  No current support for DMA.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-GPIO</div><div class='del'>-----</div><div class='del'>-</div><div class='del'>-  There is support for setting the GPIO to input/output/special function</div><div class='del'>-  and reading or writing to them.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-UART</div><div class='del'>-----</div><div class='del'>-</div><div class='del'>-  The UART hardware is similar to the S3C2440, and is supported by the</div><div class='del'>-  s3c2410 driver in the drivers/serial directory.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-NAND</div><div class='del'>-----</div><div class='del'>-</div><div class='del'>-  The NAND hardware is similar to the S3C2440, and is supported by the</div><div class='del'>-  s3c2410 driver in the drivers/mtd/nand/raw directory.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-USB Host</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-  The USB hardware is similar to the S3C2410, with extended clock source</div><div class='del'>-  control. The OHCI portion is supported by the ohci-s3c2410 driver, and</div><div class='del'>-  the clock control selection is supported by the core clock code.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-USB Device</div><div class='del'>-----------</div><div class='del'>-</div><div class='del'>-  No current support in the kernel</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-IRQs</div><div class='del'>-----</div><div class='del'>-</div><div class='del'>-  All the standard, and external interrupt sources are supported. The</div><div class='del'>-  extra sub-sources are not yet supported.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-RTC</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  The RTC hardware is similar to the S3C2410, and is supported by the</div><div class='del'>-  s3c2410-rtc driver.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Watchdog</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-  The watchdog hardware is the same as the S3C2410, and is supported by</div><div class='del'>-  the s3c2410_wdt driver.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-MMC/SD/SDIO</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-  No current support for the MMC/SD/SDIO block.</div><div class='del'>-</div><div class='del'>-IIC</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  The IIC hardware is the same as the S3C2410, and is supported by the</div><div class='del'>-  i2c-s3c24xx driver.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-IIS</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  No current support for the IIS interface.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-SPI</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  No current support for the SPI interfaces.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-ATA</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  No current support for the on-board ATA block.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Document Author</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Ben Dooks, Copyright 2006 Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/s3c2413.rst b/Documentation/arm/samsung-s3c24xx/s3c2413.rst<br/>deleted file mode 100644<br/>index 1f51e207fc46..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/s3c2413.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/s3c2413.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-==========================</div><div class='del'>-S3C2413 ARM Linux Overview</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The S3C2413 is an extended version of the S3C2412, with an camera</div><div class='del'>-  interface and mobile DDR memory support. See the S3C2412 support</div><div class='del'>-  documentation for more information.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Camera Interface</div><div class='del'>-----------------</div><div class='del'>-</div><div class='del'>-  This block is currently not supported.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Document Author</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Ben Dooks, Copyright 2006 Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/smdk2440.rst b/Documentation/arm/samsung-s3c24xx/smdk2440.rst<br/>deleted file mode 100644<br/>index 524fd0b4afaf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/smdk2440.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/smdk2440.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,57 +0,0 @@</div><div class='del'>-=========================</div><div class='del'>-Samsung/Meritech SMDK2440</div><div class='del'>-=========================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The SMDK2440 is a two part evaluation board for the Samsung S3C2440</div><div class='del'>-  processor. It includes support for LCD, SmartMedia, Audio, SD and</div><div class='del'>-  10MBit Ethernet, and expansion headers for various signals, including</div><div class='del'>-  the camera and unused GPIO.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Configuration</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  To set the default configuration, use `make smdk2440_defconfig` which</div><div class='del'>-  will configure the common features of this board, or use</div><div class='del'>-  `make s3c2410_config` to include support for all s3c2410/s3c2440 machines</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Support</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-  Ben Dooks' SMDK2440 site at http://www.fluff.org/ben/smdk2440/ which</div><div class='del'>-  includes linux based USB download tools.</div><div class='del'>-</div><div class='del'>-  Some of the h1940 patches that can be found from the H1940 project</div><div class='del'>-  site at http://www.handhelds.org/projects/h1940.html can also be</div><div class='del'>-  applied to this board.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Peripherals</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-  There is no current support for any of the extra peripherals on the</div><div class='del'>-  base-board itself.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-MTD</div><div class='del'>----</div><div class='del'>-</div><div class='del'>-  The NAND flash should be supported by the in kernel MTD NAND support,</div><div class='del'>-  NOR flash will be added later.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Maintainers</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-  This board is being maintained by Ben Dooks, for more info, see</div><div class='del'>-  http://www.fluff.org/ben/smdk2440/</div><div class='del'>-</div><div class='del'>-  Many thanks to Dimitry Andric of TomTom for the loan of the SMDK2440,</div><div class='del'>-  and to Simtec Electronics for allowing me time to work on this.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-(c) 2004 Ben Dooks</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/suspend.rst b/Documentation/arm/samsung-s3c24xx/suspend.rst<br/>deleted file mode 100644<br/>index b4f3ae9fe76e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/suspend.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/suspend.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-=======================</div><div class='del'>-S3C24XX Suspend Support</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  The S3C24XX supports a low-power suspend mode, where the SDRAM is kept</div><div class='del'>-  in Self-Refresh mode, and all but the essential peripheral blocks are</div><div class='del'>-  powered down. For more information on how this works, please look</div><div class='del'>-  at the relevant CPU datasheet from Samsung.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Requirements</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  1) A bootloader that can support the necessary resume operation</div><div class='del'>-</div><div class='del'>-  2) Support for at least 1 source for resume</div><div class='del'>-</div><div class='del'>-  3) CONFIG_PM enabled in the kernel</div><div class='del'>-</div><div class='del'>-  4) Any peripherals that are going to be powered down at the same</div><div class='del'>-     time require suspend/resume support.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Resuming</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-  The S3C2410 user manual defines the process of sending the CPU to</div><div class='del'>-  sleep and how it resumes. The default behaviour of the Linux code</div><div class='del'>-  is to set the GSTATUS3 register to the physical address of the</div><div class='del'>-  code to resume Linux operation.</div><div class='del'>-</div><div class='del'>-  GSTATUS4 is currently left alone by the sleep code, and is free to</div><div class='del'>-  use for any other purposes (for example, the EB2410ITX uses this to</div><div class='del'>-  save memory configuration in).</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Machine Support</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-  The machine specific functions must call the s3c_pm_init() function</div><div class='del'>-  to say that its bootloader is capable of resuming. This can be as</div><div class='del'>-  simple as adding the following to the machine's definition:</div><div class='del'>-</div><div class='del'>-  INITMACHINE(s3c_pm_init)</div><div class='del'>-</div><div class='del'>-  A board can do its own setup before calling s3c_pm_init, if it</div><div class='del'>-  needs to setup anything else for power management support.</div><div class='del'>-</div><div class='del'>-  There is currently no support for over-riding the default method of</div><div class='del'>-  saving the resume address, if your board requires it, then contact</div><div class='del'>-  the maintainer and discuss what is required.</div><div class='del'>-</div><div class='del'>-  Note, the original method of adding an late_initcall() is wrong,</div><div class='del'>-  and will end up initialising all compiled machines' pm init!</div><div class='del'>-</div><div class='del'>-  The following is an example of code used for testing wakeup from</div><div class='del'>-  an falling edge on IRQ_EINT0::</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-    static irqreturn_t button_irq(int irq, void *pw)</div><div class='del'>-    {</div><div class='del'>-	return IRQ_HANDLED;</div><div class='del'>-    }</div><div class='del'>-</div><div class='del'>-    statuc void __init machine_init(void)</div><div class='del'>-    {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,</div><div class='del'>-		   "button-irq-eint0", NULL);</div><div class='del'>-</div><div class='del'>-	enable_irq_wake(IRQ_EINT0);</div><div class='del'>-</div><div class='del'>-	s3c_pm_init();</div><div class='del'>-    }</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Debugging</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-  There are several important things to remember when using PM suspend:</div><div class='del'>-</div><div class='del'>-  1) The uart drivers will disable the clocks to the UART blocks when</div><div class='del'>-     suspending, which means that use of printascii() or similar direct</div><div class='del'>-     access to the UARTs will cause the debug to stop.</div><div class='del'>-</div><div class='del'>-  2) While the pm code itself will attempt to re-enable the UART clocks,</div><div class='del'>-     care should be taken that any external clock sources that the UARTs</div><div class='del'>-     rely on are still enabled at that point.</div><div class='del'>-</div><div class='del'>-  3) If any debugging is placed in the resume path, then it must have the</div><div class='del'>-     relevant clocks and peripherals setup before use (ie, bootloader).</div><div class='del'>-</div><div class='del'>-     For example, if you transmit a character from the UART, the baud</div><div class='del'>-     rate and uart controls must be setup beforehand.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Configuration</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  The S3C2410 specific configuration in `System Type` defines various</div><div class='del'>-  aspects of how the S3C2410 suspend and resume support is configured</div><div class='del'>-</div><div class='del'>-  `S3C2410 PM Suspend debug`</div><div class='del'>-</div><div class='del'>-    This option prints messages to the serial console before and after</div><div class='del'>-    the actual suspend, giving detailed information on what is</div><div class='del'>-    happening</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  `S3C2410 PM Suspend Memory CRC`</div><div class='del'>-</div><div class='del'>-    Allows the entire memory to be checksummed before and after the</div><div class='del'>-    suspend to see if there has been any corruption of the contents.</div><div class='del'>-</div><div class='del'>-    Note, the time to calculate the CRC is dependent on the CPU speed</div><div class='del'>-    and the size of memory. For an 64Mbyte RAM area on an 200MHz</div><div class='del'>-    S3C2410, this can take approximately 4 seconds to complete.</div><div class='del'>-</div><div class='del'>-    This support requires the CRC32 function to be enabled.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  `S3C2410 PM Suspend CRC Chunksize (KiB)`</div><div class='del'>-</div><div class='del'>-    Defines the size of memory each CRC chunk covers. A smaller value</div><div class='del'>-    will mean that the CRC data block will take more memory, but will</div><div class='del'>-    identify any faults with better precision</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Document Author</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Ben Dooks, Copyright 2004 Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung-s3c24xx/usb-host.rst b/Documentation/arm/samsung-s3c24xx/usb-host.rst<br/>deleted file mode 100644<br/>index 7aaffac89e04..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung-s3c24xx/usb-host.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung-s3c24xx/usb-host.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,91 +0,0 @@</div><div class='del'>-========================</div><div class='del'>-S3C24XX USB Host support</div><div class='del'>-========================</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-  This document details the S3C2410/S3C2440 in-built OHCI USB host support.</div><div class='del'>-</div><div class='del'>-Configuration</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  Enable at least the following kernel options:</div><div class='del'>-</div><div class='del'>-  menuconfig::</div><div class='del'>-</div><div class='del'>-   Device Drivers  ---&gt;</div><div class='del'>-     USB support  ---&gt;</div><div class='del'>-       &lt;*&gt; Support for Host-side USB</div><div class='del'>-       &lt;*&gt;   OHCI HCD support</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  .config:</div><div class='del'>-</div><div class='del'>-    - CONFIG_USB</div><div class='del'>-    - CONFIG_USB_OHCI_HCD</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  Once these options are configured, the standard set of USB device</div><div class='del'>-  drivers can be configured and used.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Board Support</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  The driver attaches to a platform device, which will need to be</div><div class='del'>-  added by the board specific support file in arch/arm/mach-s3c,</div><div class='del'>-  such as mach-bast.c or mach-smdk2410.c</div><div class='del'>-</div><div class='del'>-  The platform device's platform_data field is only needed if the</div><div class='del'>-  board implements extra power control or over-current monitoring.</div><div class='del'>-</div><div class='del'>-  The OHCI driver does not ensure the state of the S3C2410's MISCCTRL</div><div class='del'>-  register, so if both ports are to be used for the host, then it is</div><div class='del'>-  the board support file's responsibility to ensure that the second</div><div class='del'>-  port is configured to be connected to the OHCI core.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Platform Data</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-  See include/linux/platform_data/usb-ohci-s3c2410.h for the</div><div class='del'>-  descriptions of the platform device data. An implementation</div><div class='del'>-  can be found in arch/arm/mach-s3c/simtec-usb.c .</div><div class='del'>-</div><div class='del'>-  The `struct s3c2410_hcd_info` contains a pair of functions</div><div class='del'>-  that get called to enable over-current detection, and to</div><div class='del'>-  control the port power status.</div><div class='del'>-</div><div class='del'>-  The ports are numbered 0 and 1.</div><div class='del'>-</div><div class='del'>-  power_control:</div><div class='del'>-    Called to enable or disable the power on the port.</div><div class='del'>-</div><div class='del'>-  enable_oc:</div><div class='del'>-    Called to enable or disable the over-current monitoring.</div><div class='del'>-    This should claim or release the resources being used to</div><div class='del'>-    check the power condition on the port, such as an IRQ.</div><div class='del'>-</div><div class='del'>-  report_oc:</div><div class='del'>-    The OHCI driver fills this field in for the over-current code</div><div class='del'>-    to call when there is a change to the over-current state on</div><div class='del'>-    an port. The ports argument is a bitmask of 1 bit per port,</div><div class='del'>-    with bit X being 1 for an over-current on port X.</div><div class='del'>-</div><div class='del'>-    The function s3c2410_usb_report_oc() has been provided to</div><div class='del'>-    ensure this is called correctly.</div><div class='del'>-</div><div class='del'>-  port[x]:</div><div class='del'>-    This is struct describes each port, 0 or 1. The platform driver</div><div class='del'>-    should set the flags field of each port to S3C_HCDFLG_USED if</div><div class='del'>-    the port is enabled.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Document Author</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Ben Dooks, Copyright 2005 Simtec Electronics</div><div class='head'>diff --git a/Documentation/arm/samsung/gpio.rst b/Documentation/arm/samsung/gpio.rst<br/>index f6e27b07c993..27fae0d50361 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung/gpio.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung/gpio.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung/gpio.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/samsung/gpio.rst</a></div><div class='hunk'>@@ -9,14 +9,6 @@ This outlines the Samsung GPIO implementation and the architecture</div><div class='ctx'> specific calls provided alongside the drivers/gpio core.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-S3C24XX (Legacy)</div><div class='del'>-----------------</div><div class='del'>-</div><div class='del'>-See Documentation/arm/samsung-s3c24xx/gpio.rst for more information</div><div class='del'>-about these devices. Their implementation has been brought into line</div><div class='del'>-with the core samsung implementation described in this document.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> GPIOLIB integration</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arm/samsung/overview.rst b/Documentation/arm/samsung/overview.rst<br/>index e74307897416..8b15a190169b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung/overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/samsung/overview.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/samsung/overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/samsung/overview.rst</a></div><div class='hunk'>@@ -12,21 +12,10 @@ Introduction</div><div class='ctx'> </div><div class='ctx'>   The currently supported SoCs are:</div><div class='ctx'> </div><div class='del'>-  - S3C24XX: See Documentation/arm/samsung-s3c24xx/overview.rst for full list</div><div class='ctx'>   - S3C64XX: S3C6400 and S3C6410</div><div class='ctx'>   - S5PC110 / S5PV210</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-S3C24XX Systems</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-  There is still documentation in Documnetation/arm/Samsung-S3C24XX/ which</div><div class='del'>-  deals with the architecture and drivers specific to these devices.</div><div class='del'>-</div><div class='del'>-  See Documentation/arm/samsung-s3c24xx/overview.rst for more information</div><div class='del'>-  on the implementation details and specific support.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> Configuration</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='hunk'>@@ -51,8 +40,6 @@ Layout</div><div class='ctx'>   specific information. It contains the base clock, GPIO and device definitions</div><div class='ctx'>   to get the system running.</div><div class='ctx'> </div><div class='del'>-  plat-s3c24xx is for s3c24xx specific builds, see the S3C24XX docs.</div><div class='del'>-</div><div class='ctx'>   plat-s5p is for s5p specific builds, and contains common support for the</div><div class='ctx'>   S5P specific systems. Not all S5Ps use all the features in this directory</div><div class='ctx'>   due to differences in the hardware.</div><div class='head'>diff --git a/Documentation/arm/sti/overview.rst b/Documentation/arm/sti/overview.rst<br/>index 70743617a74f..ae16aced800f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/sti/overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/sti/overview.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/sti/overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/sti/overview.rst</a></div><div class='hunk'>@@ -7,22 +7,18 @@ Introduction</div><div class='ctx'> </div><div class='ctx'>   The ST Microelectronics Multimedia and Application Processors range of</div><div class='ctx'>   CortexA9 System-on-Chip are supported by the 'STi' platform of</div><div class='del'>-  ARM Linux. Currently STiH415, STiH416 SOCs are supported with both</div><div class='del'>-  B2000 and B2020 Reference boards.</div><div class='add'>+  ARM Linux. Currently STiH407, STiH410 and STiH418 are supported.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> configuration</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-  A generic configuration is provided for both STiH415/416, and can be used as the</div><div class='del'>-  default by::</div><div class='del'>-</div><div class='del'>-	make stih41x_defconfig</div><div class='add'>+  The configuration for the STi platform is supported via the multi_v7_defconfig.</div><div class='ctx'> </div><div class='ctx'> Layout</div><div class='ctx'> ------</div><div class='ctx'> </div><div class='del'>-  All the files for multiple machine families (STiH415, STiH416, and STiG125)</div><div class='add'>+  All the files for multiple machine families (STiH407, STiH410, and STiH418)</div><div class='ctx'>   are located in the platform code contained in arch/arm/mach-sti</div><div class='ctx'> </div><div class='ctx'>   There is a generic board board-dt.c in the mach folder which support</div><div class='head'>diff --git a/Documentation/arm/sti/stih415-overview.rst b/Documentation/arm/sti/stih415-overview.rst<br/>deleted file mode 100644<br/>index b67452d610c4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/sti/stih415-overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/sti/stih415-overview.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-================</div><div class='del'>-STiH415 Overview</div><div class='del'>-================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-    The STiH415 is the next generation of HD, AVC set-top box processors</div><div class='del'>-    for satellite, cable, terrestrial and IP-STB markets.</div><div class='del'>-</div><div class='del'>-    Features:</div><div class='del'>-</div><div class='del'>-    - ARM Cortex-A9 1.0 GHz, dual-core CPU</div><div class='del'>-    - SATA2x2,USB 2.0x3, PCIe, Gbit Ethernet MACx2</div><div class='head'>diff --git a/Documentation/arm/sti/stih416-overview.rst b/Documentation/arm/sti/stih416-overview.rst<br/>deleted file mode 100644<br/>index 93f17d74d8db..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/sti/stih416-overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/sti/stih416-overview.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-================</div><div class='del'>-STiH416 Overview</div><div class='del'>-================</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-    The STiH416 is the next generation of HD, AVC set-top box processors</div><div class='del'>-    for satellite, cable, terrestrial and IP-STB markets.</div><div class='del'>-</div><div class='del'>-    Features</div><div class='del'>-    - ARM Cortex-A9 1.2 GHz dual core CPU</div><div class='del'>-    - SATA2x2,USB 2.0x3, PCIe, Gbit Ethernet MACx2</div><div class='head'>diff --git a/Documentation/arm/stm32/stm32-dma-mdma-chaining.rst b/Documentation/arm/stm32/stm32-dma-mdma-chaining.rst<br/>new file mode 100644<br/>index 000000000000..2945e0e33104<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/stm32/stm32-dma-mdma-chaining.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/stm32/stm32-dma-mdma-chaining.rst</a></div><div class='hunk'>@@ -0,0 +1,415 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=======================</div><div class='add'>+STM32 DMA-MDMA chaining</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+  This document describes the STM32 DMA-MDMA chaining feature. But before going</div><div class='add'>+  further, let's introduce the peripherals involved.</div><div class='add'>+</div><div class='add'>+  To offload data transfers from the CPU, STM32 microprocessors (MPUs) embed</div><div class='add'>+  direct memory access controllers (DMA).</div><div class='add'>+</div><div class='add'>+  STM32MP1 SoCs embed both STM32 DMA and STM32 MDMA controllers. STM32 DMA</div><div class='add'>+  request routing capabilities are enhanced by a DMA request multiplexer</div><div class='add'>+  (STM32 DMAMUX).</div><div class='add'>+</div><div class='add'>+  **STM32 DMAMUX**</div><div class='add'>+</div><div class='add'>+  STM32 DMAMUX routes any DMA request from a given peripheral to any STM32 DMA</div><div class='add'>+  controller (STM32MP1 counts two STM32 DMA controllers) channels.</div><div class='add'>+</div><div class='add'>+  **STM32 DMA**</div><div class='add'>+</div><div class='add'>+  STM32 DMA is mainly used to implement central data buffer storage (usually in</div><div class='add'>+  the system SRAM) for different peripheral. It can access external RAMs but</div><div class='add'>+  without the ability to generate convenient burst transfer ensuring the best</div><div class='add'>+  load of the AXI.</div><div class='add'>+</div><div class='add'>+  **STM32 MDMA**</div><div class='add'>+</div><div class='add'>+  STM32 MDMA (Master DMA) is mainly used to manage direct data transfers between</div><div class='add'>+  RAM data buffers without CPU intervention. It can also be used in a</div><div class='add'>+  hierarchical structure that uses STM32 DMA as first level data buffer</div><div class='add'>+  interfaces for AHB peripherals, while the STM32 MDMA acts as a second level</div><div class='add'>+  DMA with better performance. As a AXI/AHB master, STM32 MDMA can take control</div><div class='add'>+  of the AXI/AHB bus.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Principles</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+  STM32 DMA-MDMA chaining feature relies on the strengths of STM32 DMA and</div><div class='add'>+  STM32 MDMA controllers.</div><div class='add'>+</div><div class='add'>+  STM32 DMA has a circular Double Buffer Mode (DBM). At each end of transaction</div><div class='add'>+  (when DMA data counter - DMA_SxNDTR - reaches 0), the memory pointers</div><div class='add'>+  (configured with DMA_SxSM0AR and DMA_SxM1AR) are swapped and the DMA data</div><div class='add'>+  counter is automatically reloaded. This allows the SW or the STM32 MDMA to</div><div class='add'>+  process one memory area while the second memory area is being filled/used by</div><div class='add'>+  the STM32 DMA transfer.</div><div class='add'>+</div><div class='add'>+  With STM32 MDMA linked-list mode, a single request initiates the data array</div><div class='add'>+  (collection of nodes) to be transferred until the linked-list pointer for the</div><div class='add'>+  channel is null. The channel transfer complete of the last node is the end of</div><div class='add'>+  transfer, unless first and last nodes are linked to each other, in such a</div><div class='add'>+  case, the linked-list loops on to create a circular MDMA transfer.</div><div class='add'>+</div><div class='add'>+  STM32 MDMA has direct connections with STM32 DMA. This enables autonomous</div><div class='add'>+  communication and synchronization between peripherals, thus saving CPU</div><div class='add'>+  resources and bus congestion. Transfer Complete signal of STM32 DMA channel</div><div class='add'>+  can triggers STM32 MDMA transfer. STM32 MDMA can clear the request generated</div><div class='add'>+  by the STM32 DMA by writing to its Interrupt Clear register (whose address is</div><div class='add'>+  stored in MDMA_CxMAR, and bit mask in MDMA_CxMDR).</div><div class='add'>+</div><div class='add'>+  .. table:: STM32 MDMA interconnect table with STM32 DMA</div><div class='add'>+</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | STM32 DMAMUX | STM32 DMA      | STM32 DMA | STM32 MDMA |</div><div class='add'>+    | channels     | channels       | Transfer  | request    |</div><div class='add'>+    |              |                | complete  |            |</div><div class='add'>+    |              |                | signal    |            |</div><div class='add'>+    +==============+================+===========+============+</div><div class='add'>+    | Channel *0*  | DMA1 channel 0 | dma1_tcf0 | *0x00*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *1*  | DMA1 channel 1 | dma1_tcf1 | *0x01*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *2*  | DMA1 channel 2 | dma1_tcf2 | *0x02*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *3*  | DMA1 channel 3 | dma1_tcf3 | *0x03*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *4*  | DMA1 channel 4 | dma1_tcf4 | *0x04*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *5*  | DMA1 channel 5 | dma1_tcf5 | *0x05*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *6*  | DMA1 channel 6 | dma1_tcf6 | *0x06*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *7*  | DMA1 channel 7 | dma1_tcf7 | *0x07*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *8*  | DMA2 channel 0 | dma2_tcf0 | *0x08*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *9*  | DMA2 channel 1 | dma2_tcf1 | *0x09*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *10* | DMA2 channel 2 | dma2_tcf2 | *0x0A*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *11* | DMA2 channel 3 | dma2_tcf3 | *0x0B*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *12* | DMA2 channel 4 | dma2_tcf4 | *0x0C*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *13* | DMA2 channel 5 | dma2_tcf5 | *0x0D*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *14* | DMA2 channel 6 | dma2_tcf6 | *0x0E*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+    | Channel *15* | DMA2 channel 7 | dma2_tcf7 | *0x0F*     |</div><div class='add'>+    +--------------+----------------+-----------+------------+</div><div class='add'>+</div><div class='add'>+  STM32 DMA-MDMA chaining feature then uses a SRAM buffer. STM32MP1 SoCs embed</div><div class='add'>+  three fast access static internal RAMs of various size, used for data storage.</div><div class='add'>+  Due to STM32 DMA legacy (within microcontrollers), STM32 DMA performances are</div><div class='add'>+  bad with DDR, while they are optimal with SRAM. Hence the SRAM buffer used</div><div class='add'>+  between STM32 DMA and STM32 MDMA. This buffer is split in two equal periods</div><div class='add'>+  and STM32 DMA uses one period while STM32 MDMA uses the other period</div><div class='add'>+  simultaneously.</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+                    dma[1:2]-tcf[0:7]</div><div class='add'>+                   .----------------.</div><div class='add'>+     ____________ '    _________     V____________</div><div class='add'>+    | STM32 DMA  |    /  __|&gt;_  \    | STM32 MDMA |</div><div class='add'>+    |------------|   |  /     \  |   |------------|</div><div class='add'>+    | DMA_SxM0AR |&lt;=&gt;| | SRAM  | |&lt;=&gt;| []-[]...[] |</div><div class='add'>+    | DMA_SxM1AR |   |  \_____/  |   |            |</div><div class='add'>+    |____________|    \___&lt;|____/    |____________|</div><div class='add'>+</div><div class='add'>+  STM32 DMA-MDMA chaining uses (struct dma_slave_config).peripheral_config to</div><div class='add'>+  exchange the parameters needed to configure MDMA. These parameters are</div><div class='add'>+  gathered into a u32 array with three values:</div><div class='add'>+</div><div class='add'>+  * the STM32 MDMA request (which is actually the DMAMUX channel ID),</div><div class='add'>+  * the address of the STM32 DMA register to clear the Transfer Complete</div><div class='add'>+    interrupt flag,</div><div class='add'>+  * the mask of the Transfer Complete interrupt flag of the STM32 DMA channel.</div><div class='add'>+</div><div class='add'>+Device Tree updates for STM32 DMA-MDMA chaining support</div><div class='add'>+-------------------------------------------------------</div><div class='add'>+</div><div class='add'>+  **1. Allocate a SRAM buffer**</div><div class='add'>+</div><div class='add'>+    SRAM device tree node is defined in SoC device tree. You can refer to it in</div><div class='add'>+    your board device tree to define your SRAM pool.</div><div class='add'>+    ::</div><div class='add'>+</div><div class='add'>+          &amp;sram {</div><div class='add'>+                  my_foo_device_dma_pool: dma-sram@0 {</div><div class='add'>+                          reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+                  };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+    Be careful of the start index, in case there are other SRAM consumers.</div><div class='add'>+    Define your pool size strategically: to optimise chaining, the idea is that</div><div class='add'>+    STM32 DMA and STM32 MDMA can work simultaneously, on each buffer of the</div><div class='add'>+    SRAM.</div><div class='add'>+    If the SRAM period is greater than the expected DMA transfer, then STM32 DMA</div><div class='add'>+    and STM32 MDMA will work sequentially instead of simultaneously. It is not a</div><div class='add'>+    functional issue but it is not optimal.</div><div class='add'>+</div><div class='add'>+    Don't forget to refer to your SRAM pool in your device node. You need to</div><div class='add'>+    define a new property.</div><div class='add'>+    ::</div><div class='add'>+</div><div class='add'>+          &amp;my_foo_device {</div><div class='add'>+                  ...</div><div class='add'>+                  my_dma_pool = &amp;my_foo_device_dma_pool;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+    Then get this SRAM pool in your foo driver and allocate your SRAM buffer.</div><div class='add'>+</div><div class='add'>+  **2. Allocate a STM32 DMA channel and a STM32 MDMA channel**</div><div class='add'>+</div><div class='add'>+    You need to define an extra channel in your device tree node, in addition to</div><div class='add'>+    the one you should already have for "classic" DMA operation.</div><div class='add'>+</div><div class='add'>+    This new channel must be taken from STM32 MDMA channels, so, the phandle of</div><div class='add'>+    the DMA controller to use is the MDMA controller's one.</div><div class='add'>+    ::</div><div class='add'>+</div><div class='add'>+          &amp;my_foo_device {</div><div class='add'>+                  [...]</div><div class='add'>+                  my_dma_pool = &amp;my_foo_device_dma_pool;</div><div class='add'>+                  dmas = &lt;&amp;dmamux1 ...&gt;,                // STM32 DMA channel</div><div class='add'>+                         &lt;&amp;mdma1 0 0x3 0x1200000a 0 0&gt;; // + STM32 MDMA channel</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+    Concerning STM32 MDMA bindings:</div><div class='add'>+</div><div class='add'>+    1. The request line number : whatever the value here, it will be overwritten</div><div class='add'>+    by MDMA driver with the STM32 DMAMUX channel ID passed through</div><div class='add'>+    (struct dma_slave_config).peripheral_config</div><div class='add'>+</div><div class='add'>+    2. The priority level : choose Very High (0x3) so that your channel will</div><div class='add'>+    take priority other the other during request arbitration</div><div class='add'>+</div><div class='add'>+    3. A 32bit mask specifying the DMA channel configuration : source and</div><div class='add'>+    destination address increment, block transfer with 128 bytes per single</div><div class='add'>+    transfer</div><div class='add'>+</div><div class='add'>+    4. The 32bit value specifying the register to be used to acknowledge the</div><div class='add'>+    request: it will be overwritten by MDMA driver, with the DMA channel</div><div class='add'>+    interrupt flag clear register address passed through</div><div class='add'>+    (struct dma_slave_config).peripheral_config</div><div class='add'>+</div><div class='add'>+    5. The 32bit mask specifying the value to be written to acknowledge the</div><div class='add'>+    request: it will be overwritten by MDMA driver, with the DMA channel</div><div class='add'>+    Transfer Complete flag passed through</div><div class='add'>+    (struct dma_slave_config).peripheral_config</div><div class='add'>+</div><div class='add'>+Driver updates for STM32 DMA-MDMA chaining support in foo driver</div><div class='add'>+----------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+  **0. (optional) Refactor the original sg_table if dmaengine_prep_slave_sg()**</div><div class='add'>+</div><div class='add'>+    In case of dmaengine_prep_slave_sg(), the original sg_table can't be used as</div><div class='add'>+    is. Two new sg_tables must be created from the original one. One for</div><div class='add'>+    STM32 DMA transfer (where memory address targets now the SRAM buffer instead</div><div class='add'>+    of DDR buffer) and one for STM32 MDMA transfer (where memory address targets</div><div class='add'>+    the DDR buffer).</div><div class='add'>+</div><div class='add'>+    The new sg_list items must fit SRAM period length. Here is an example for</div><div class='add'>+    DMA_DEV_TO_MEM:</div><div class='add'>+    ::</div><div class='add'>+</div><div class='add'>+      /*</div><div class='add'>+        * Assuming sgl and nents, respectively the initial scatterlist and its</div><div class='add'>+        * length.</div><div class='add'>+        * Assuming sram_dma_buf and sram_period, respectively the memory</div><div class='add'>+        * allocated from the pool for DMA usage, and the length of the period,</div><div class='add'>+        * which is half of the sram_buf size.</div><div class='add'>+        */</div><div class='add'>+      struct sg_table new_dma_sgt, new_mdma_sgt;</div><div class='add'>+      struct scatterlist *s, *_sgl;</div><div class='add'>+      dma_addr_t ddr_dma_buf;</div><div class='add'>+      u32 new_nents = 0, len;</div><div class='add'>+      int i;</div><div class='add'>+</div><div class='add'>+      /* Count the number of entries needed */</div><div class='add'>+      for_each_sg(sgl, s, nents, i)</div><div class='add'>+              if (sg_dma_len(s) &gt; sram_period)</div><div class='add'>+                      new_nents += DIV_ROUND_UP(sg_dma_len(s), sram_period);</div><div class='add'>+              else</div><div class='add'>+                      new_nents++;</div><div class='add'>+</div><div class='add'>+      /* Create sg table for STM32 DMA channel */</div><div class='add'>+      ret = sg_alloc_table(&amp;new_dma_sgt, new_nents, GFP_ATOMIC);</div><div class='add'>+      if (ret)</div><div class='add'>+              dev_err(dev, "DMA sg table alloc failed\n");</div><div class='add'>+</div><div class='add'>+      for_each_sg(new_dma_sgt.sgl, s, new_dma_sgt.nents, i) {</div><div class='add'>+              _sgl = sgl;</div><div class='add'>+              sg_dma_len(s) = min(sg_dma_len(_sgl), sram_period);</div><div class='add'>+              /* Targets the beginning = first half of the sram_buf */</div><div class='add'>+              s-&gt;dma_address = sram_buf;</div><div class='add'>+              /*</div><div class='add'>+                * Targets the second half of the sram_buf</div><div class='add'>+                * for odd indexes of the item of the sg_list</div><div class='add'>+                */</div><div class='add'>+              if (i &amp; 1)</div><div class='add'>+                      s-&gt;dma_address += sram_period;</div><div class='add'>+      }</div><div class='add'>+</div><div class='add'>+      /* Create sg table for STM32 MDMA channel */</div><div class='add'>+      ret = sg_alloc_table(&amp;new_mdma_sgt, new_nents, GFP_ATOMIC);</div><div class='add'>+      if (ret)</div><div class='add'>+              dev_err(dev, "MDMA sg_table alloc failed\n");</div><div class='add'>+</div><div class='add'>+      _sgl = sgl;</div><div class='add'>+      len = sg_dma_len(sgl);</div><div class='add'>+      ddr_dma_buf = sg_dma_address(sgl);</div><div class='add'>+      for_each_sg(mdma_sgt.sgl, s, mdma_sgt.nents, i) {</div><div class='add'>+              size_t bytes = min_t(size_t, len, sram_period);</div><div class='add'>+</div><div class='add'>+              sg_dma_len(s) = bytes;</div><div class='add'>+              sg_dma_address(s) = ddr_dma_buf;</div><div class='add'>+              len -= bytes;</div><div class='add'>+</div><div class='add'>+              if (!len &amp;&amp; sg_next(_sgl)) {</div><div class='add'>+                      _sgl = sg_next(_sgl);</div><div class='add'>+                      len = sg_dma_len(_sgl);</div><div class='add'>+                      ddr_dma_buf = sg_dma_address(_sgl);</div><div class='add'>+              } else {</div><div class='add'>+                      ddr_dma_buf += bytes;</div><div class='add'>+              }</div><div class='add'>+      }</div><div class='add'>+</div><div class='add'>+    Don't forget to release these new sg_tables after getting the descriptors</div><div class='add'>+    with dmaengine_prep_slave_sg().</div><div class='add'>+</div><div class='add'>+  **1. Set controller specific parameters**</div><div class='add'>+</div><div class='add'>+    First, use dmaengine_slave_config() with a struct dma_slave_config to</div><div class='add'>+    configure STM32 DMA channel. You just have to take care of DMA addresses,</div><div class='add'>+    the memory address (depending on the transfer direction) must point on your</div><div class='add'>+    SRAM buffer, and set (struct dma_slave_config).peripheral_size != 0.</div><div class='add'>+</div><div class='add'>+    STM32 DMA driver will check (struct dma_slave_config).peripheral_size to</div><div class='add'>+    determine if chaining is being used or not. If it is used, then STM32 DMA</div><div class='add'>+    driver fills (struct dma_slave_config).peripheral_config with an array of</div><div class='add'>+    three u32 : the first one containing STM32 DMAMUX channel ID, the second one</div><div class='add'>+    the channel interrupt flag clear register address, and the third one the</div><div class='add'>+    channel Transfer Complete flag mask.</div><div class='add'>+</div><div class='add'>+    Then, use dmaengine_slave_config with another struct dma_slave_config to</div><div class='add'>+    configure STM32 MDMA channel. Take care of DMA addresses, the device address</div><div class='add'>+    (depending on the transfer direction) must point on your SRAM buffer, and</div><div class='add'>+    the memory address must point to the buffer originally used for "classic"</div><div class='add'>+    DMA operation. Use the previous (struct dma_slave_config).peripheral_size</div><div class='add'>+    and .peripheral_config that have been updated by STM32 DMA driver, to set</div><div class='add'>+    (struct dma_slave_config).peripheral_size and .peripheral_config of the</div><div class='add'>+    struct dma_slave_config to configure STM32 MDMA channel.</div><div class='add'>+    ::</div><div class='add'>+</div><div class='add'>+      struct dma_slave_config dma_conf;</div><div class='add'>+      struct dma_slave_config mdma_conf;</div><div class='add'>+</div><div class='add'>+      memset(&amp;dma_conf, 0, sizeof(dma_conf));</div><div class='add'>+      [...]</div><div class='add'>+      config.direction = DMA_DEV_TO_MEM;</div><div class='add'>+      config.dst_addr = sram_dma_buf;        // SRAM buffer</div><div class='add'>+      config.peripheral_size = 1;            // peripheral_size != 0 =&gt; chaining</div><div class='add'>+</div><div class='add'>+      dmaengine_slave_config(dma_chan, &amp;dma_config);</div><div class='add'>+</div><div class='add'>+      memset(&amp;mdma_conf, 0, sizeof(mdma_conf));</div><div class='add'>+      config.direction = DMA_DEV_TO_MEM;</div><div class='add'>+      mdma_conf.src_addr = sram_dma_buf;     // SRAM buffer</div><div class='add'>+      mdma_conf.dst_addr = rx_dma_buf;       // original memory buffer</div><div class='add'>+      mdma_conf.peripheral_size = dma_conf.peripheral_size;       // &lt;- dma_conf</div><div class='add'>+      mdma_conf.peripheral_config = dma_config.peripheral_config; // &lt;- dma_conf</div><div class='add'>+</div><div class='add'>+      dmaengine_slave_config(mdma_chan, &amp;mdma_conf);</div><div class='add'>+</div><div class='add'>+  **2. Get a descriptor for STM32 DMA channel transaction**</div><div class='add'>+</div><div class='add'>+    In the same way you get your descriptor for your "classic" DMA operation,</div><div class='add'>+    you just have to replace the original sg_list (in case of</div><div class='add'>+    dmaengine_prep_slave_sg()) with the new sg_list using SRAM buffer, or to</div><div class='add'>+    replace the original buffer address, length and period (in case of</div><div class='add'>+    dmaengine_prep_dma_cyclic()) with the new SRAM buffer.</div><div class='add'>+</div><div class='add'>+  **3. Get a descriptor for STM32 MDMA channel transaction**</div><div class='add'>+</div><div class='add'>+    If you previously get descriptor (for STM32 DMA) with</div><div class='add'>+</div><div class='add'>+    * dmaengine_prep_slave_sg(), then use dmaengine_prep_slave_sg() for</div><div class='add'>+      STM32 MDMA;</div><div class='add'>+    * dmaengine_prep_dma_cyclic(), then use dmaengine_prep_dma_cyclic() for</div><div class='add'>+      STM32 MDMA.</div><div class='add'>+</div><div class='add'>+    Use the new sg_list using SRAM buffer (in case of dmaengine_prep_slave_sg())</div><div class='add'>+    or, depending on the transfer direction, either the original DDR buffer (in</div><div class='add'>+    case of DMA_DEV_TO_MEM) or the SRAM buffer (in case of DMA_MEM_TO_DEV), the</div><div class='add'>+    source address being previously set with dmaengine_slave_config().</div><div class='add'>+</div><div class='add'>+  **4. Submit both transactions**</div><div class='add'>+</div><div class='add'>+    Before submitting your transactions, you may need to define on which</div><div class='add'>+    descriptor you want a callback to be called at the end of the transfer</div><div class='add'>+    (dmaengine_prep_slave_sg()) or the period (dmaengine_prep_dma_cyclic()).</div><div class='add'>+    Depending on the direction, set the callback on the descriptor that finishes</div><div class='add'>+    the overal transfer:</div><div class='add'>+</div><div class='add'>+    * DMA_DEV_TO_MEM: set the callback on the "MDMA" descriptor</div><div class='add'>+    * DMA_MEM_TO_DEV: set the callback on the "DMA" descriptor</div><div class='add'>+</div><div class='add'>+    Then, submit the descriptors whatever the order, with dmaengine_tx_submit().</div><div class='add'>+</div><div class='add'>+  **5. Issue pending requests (and wait for callback notification)**</div><div class='add'>+</div><div class='add'>+  As STM32 MDMA channel transfer is triggered by STM32 DMA, you must issue</div><div class='add'>+  STM32 MDMA channel before STM32 DMA channel.</div><div class='add'>+</div><div class='add'>+  If any, your callback will be called to warn you about the end of the overal</div><div class='add'>+  transfer or the period completion.</div><div class='add'>+</div><div class='add'>+  Don't forget to terminate both channels. STM32 DMA channel is configured in</div><div class='add'>+  cyclic Double-Buffer mode so it won't be disabled by HW, you need to terminate</div><div class='add'>+  it. STM32 MDMA channel will be stopped by HW in case of sg transfer, but not</div><div class='add'>+  in case of cyclic transfer. You can terminate it whatever the kind of transfer.</div><div class='add'>+</div><div class='add'>+  **STM32 DMA-MDMA chaining DMA_MEM_TO_DEV special case**</div><div class='add'>+</div><div class='add'>+  STM32 DMA-MDMA chaining in DMA_MEM_TO_DEV is a special case. Indeed, the</div><div class='add'>+  STM32 MDMA feeds the SRAM buffer with the DDR data, and the STM32 DMA reads</div><div class='add'>+  data from SRAM buffer. So some data (the first period) have to be copied in</div><div class='add'>+  SRAM buffer when the STM32 DMA starts to read.</div><div class='add'>+</div><div class='add'>+  A trick could be pausing the STM32 DMA channel (that will raise a Transfer</div><div class='add'>+  Complete signal, triggering the STM32 MDMA channel), but the first data read</div><div class='add'>+  by the STM32 DMA could be "wrong". The proper way is to prepare the first SRAM</div><div class='add'>+  period with dmaengine_prep_dma_memcpy(). Then this first period should be</div><div class='add'>+  "removed" from the sg or the cyclic transfer.</div><div class='add'>+</div><div class='add'>+  Due to this complexity, rather use the STM32 DMA-MDMA chaining for</div><div class='add'>+  DMA_DEV_TO_MEM and keep the "classic" DMA usage for DMA_MEM_TO_DEV, unless</div><div class='add'>+  you're not afraid.</div><div class='add'>+</div><div class='add'>+Resources</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+  Application note, datasheet and reference manual are available on ST website</div><div class='add'>+  (STM32MP1_).</div><div class='add'>+</div><div class='add'>+  Dedicated focus on three application notes (AN5224_, AN4031_ &amp; AN5001_)</div><div class='add'>+  dealing with STM32 DMAMUX, STM32 DMA and STM32 MDMA.</div><div class='add'>+</div><div class='add'>+.. _STM32MP1: https://www.st.com/en/microcontrollers-microprocessors/stm32mp1-series.html</div><div class='add'>+.. _AN5224: https://www.st.com/resource/en/application_note/an5224-stm32-dmamux-the-dma-request-router-stmicroelectronics.pdf</div><div class='add'>+.. _AN4031: https://www.st.com/resource/en/application_note/dm00046011-using-the-stm32f2-stm32f4-and-stm32f7-series-dma-controller-stmicroelectronics.pdf</div><div class='add'>+.. _AN5001: https://www.st.com/resource/en/application_note/an5001-stm32cube-expansion-package-for-stm32h7-series-mdma-stmicroelectronics.pdf</div><div class='add'>+</div><div class='add'>+:Authors:</div><div class='add'>+</div><div class='add'>+- Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt;
\ No newline at end of file</div><div class='head'>diff --git a/Documentation/arm/stm32/stm32mp151-overview.rst b/Documentation/arm/stm32/stm32mp151-overview.rst<br/>new file mode 100644<br/>index 000000000000..f42a2ac309c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/stm32/stm32mp151-overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/stm32/stm32mp151-overview.rst</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+===================</div><div class='add'>+STM32MP151 Overview</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+The STM32MP151 is a Cortex-A MPU aimed at various applications.</div><div class='add'>+It features:</div><div class='add'>+</div><div class='add'>+- Single Cortex-A7 application core</div><div class='add'>+- Standard memories interface support</div><div class='add'>+- Standard connectivity, widely inherited from the STM32 MCU family</div><div class='add'>+- Comprehensive security support</div><div class='add'>+</div><div class='add'>+More details:</div><div class='add'>+</div><div class='add'>+- Cortex-A7 core running up to @800MHz</div><div class='add'>+- FMC controller to connect SDRAM, NOR and NAND memories</div><div class='add'>+- QSPI</div><div class='add'>+- SD/MMC/SDIO support</div><div class='add'>+- Ethernet controller</div><div class='add'>+- ADC/DAC</div><div class='add'>+- USB EHCI/OHCI controllers</div><div class='add'>+- USB OTG</div><div class='add'>+- I2C, SPI busses support</div><div class='add'>+- Several general purpose timers</div><div class='add'>+- Serial Audio interface</div><div class='add'>+- LCD-TFT controller</div><div class='add'>+- DCMIPP</div><div class='add'>+- SPDIFRX</div><div class='add'>+- DFSDM</div><div class='add'>+</div><div class='add'>+:Authors:</div><div class='add'>+</div><div class='add'>+- Roan van Dijk &lt;roan@protonic.nl&gt;</div><div class='head'>diff --git a/Documentation/arm/tcm.rst b/Documentation/arm/tcm.rst<br/>index b256f9783883..1dc6c39220f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/tcm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/tcm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/tcm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/tcm.rst</a></div><div class='hunk'>@@ -34,7 +34,7 @@ CPU so it is usually wise not to overlap any physical RAM with</div><div class='ctx'> the TCM.</div><div class='ctx'> </div><div class='ctx'> The TCM memory can then be remapped to another address again using</div><div class='del'>-the MMU, but notice that the TCM if often used in situations where</div><div class='add'>+the MMU, but notice that the TCM is often used in situations where</div><div class='ctx'> the MMU is turned off. To avoid confusion the current Linux</div><div class='ctx'> implementation will map the TCM 1 to 1 from physical to virtual</div><div class='ctx'> memory in the location specified by the kernel. Currently Linux</div><div class='head'>diff --git a/Documentation/arm/uefi.rst b/Documentation/arm/uefi.rst<br/>index 9b0b5e458a1e..baebe688a006 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm/uefi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm/uefi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm/uefi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm/uefi.rst</a></div><div class='hunk'>@@ -65,10 +65,6 @@ linux,uefi-mmap-desc-size   32-bit   Size in bytes of each entry in the UEFI</div><div class='ctx'> </div><div class='ctx'> linux,uefi-mmap-desc-ver    32-bit   Version of the mmap descriptor format.</div><div class='ctx'> </div><div class='del'>-linux,initrd-start          64-bit   Physical start address of an initrd</div><div class='del'>-</div><div class='del'>-linux,initrd-end            64-bit   Physical end address of an initrd</div><div class='del'>-</div><div class='ctx'> kaslr-seed                  64-bit   Entropy used to randomize the kernel image</div><div class='ctx'>                                      base address location.</div><div class='ctx'> ==========================  ======   ===========================================</div><div class='head'>diff --git a/Documentation/arm64/acpi_object_usage.rst b/Documentation/arm64/acpi_object_usage.rst<br/>index 0609da73970b..484ef9676653 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/acpi_object_usage.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/acpi_object_usage.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/acpi_object_usage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/acpi_object_usage.rst</a></div><div class='hunk'>@@ -163,7 +163,7 @@ FPDT   Section 5.2.23 (signature == "FPDT")</div><div class='ctx'> </div><div class='ctx'>        **Firmware Performance Data Table**</div><div class='ctx'> </div><div class='del'>-       Optional, not currently supported.</div><div class='add'>+       Optional, useful for boot performance profiling.</div><div class='ctx'> </div><div class='ctx'> GTDT   Section 5.2.24 (signature == "GTDT")</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst<br/>index 29884b261aa9..ffeccdd6bdac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/booting.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/booting.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/booting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/booting.rst</a></div><div class='hunk'>@@ -121,8 +121,9 @@ Header notes:</div><div class='ctx'> 			  to the base of DRAM, since memory below it is not</div><div class='ctx'> 			  accessible via the linear mapping</div><div class='ctx'> 			1</div><div class='del'>-			  2MB aligned base may be anywhere in physical</div><div class='del'>-			  memory</div><div class='add'>+			  2MB aligned base such that all image_size bytes</div><div class='add'>+			  counted from the start of the image are within</div><div class='add'>+			  the 48-bit addressable range of physical memory</div><div class='ctx'>   Bits 4-63	Reserved.</div><div class='ctx'>   ============= ===============================================================</div><div class='ctx'> </div><div class='hunk'>@@ -222,7 +223,7 @@ Before jumping into the kernel, the following conditions must be met:</div><div class='ctx'>   For systems with a GICv3 interrupt controller to be used in v3 mode:</div><div class='ctx'>   - If EL3 is present:</div><div class='ctx'> </div><div class='del'>-      - ICC_SRE_EL3.Enable (bit 3) must be initialiased to 0b1.</div><div class='add'>+      - ICC_SRE_EL3.Enable (bit 3) must be initialised to 0b1.</div><div class='ctx'>       - ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b1.</div><div class='ctx'>       - ICC_CTLR_EL3.PMHE (bit 6) must be set to the same value across</div><div class='ctx'>         all CPUs the kernel is executing on, and must stay constant</div><div class='hunk'>@@ -340,7 +341,15 @@ Before jumping into the kernel, the following conditions must be met:</div><div class='ctx'>     - SMCR_EL2.LEN must be initialised to the same value for all CPUs the</div><div class='ctx'>       kernel will execute on.</div><div class='ctx'> </div><div class='del'>-  For CPUs with the Scalable Matrix Extension FA64 feature (FEAT_SME_FA64)</div><div class='add'>+    - HWFGRTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.</div><div class='add'>+</div><div class='add'>+    - HWFGWTR_EL2.nTPIDR2_EL0 (bit 55) must be initialised to 0b01.</div><div class='add'>+</div><div class='add'>+    - HWFGRTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.</div><div class='add'>+</div><div class='add'>+    - HWFGWTR_EL2.nSMPRI_EL1 (bit 54) must be initialised to 0b01.</div><div class='add'>+</div><div class='add'>+  For CPUs with the Scalable Matrix Extension FA64 feature (FEAT_SME_FA64):</div><div class='ctx'> </div><div class='ctx'>   - If EL3 is present:</div><div class='ctx'> </div><div class='hunk'>@@ -350,6 +359,26 @@ Before jumping into the kernel, the following conditions must be met:</div><div class='ctx'> </div><div class='ctx'>     - SMCR_EL2.FA64 (bit 31) must be initialised to 0b1.</div><div class='ctx'> </div><div class='add'>+  For CPUs with the Memory Tagging Extension feature (FEAT_MTE2):</div><div class='add'>+</div><div class='add'>+  - If EL3 is present:</div><div class='add'>+</div><div class='add'>+    - SCR_EL3.ATA (bit 26) must be initialised to 0b1.</div><div class='add'>+</div><div class='add'>+  - If the kernel is entered at EL1 and EL2 is present:</div><div class='add'>+</div><div class='add'>+    - HCR_EL2.ATA (bit 56) must be initialised to 0b1.</div><div class='add'>+</div><div class='add'>+  For CPUs with the Scalable Matrix Extension version 2 (FEAT_SME2):</div><div class='add'>+</div><div class='add'>+  - If EL3 is present:</div><div class='add'>+</div><div class='add'>+    - SMCR_EL3.EZT0 (bit 30) must be initialised to 0b1.</div><div class='add'>+</div><div class='add'>+ - If the kernel is entered at EL1 and EL2 is present:</div><div class='add'>+</div><div class='add'>+    - SMCR_EL2.EZT0 (bit 30) must be initialised to 0b1.</div><div class='add'>+</div><div class='ctx'> The requirements described above for CPU mode, caches, MMUs, architected</div><div class='ctx'> timers, coherency and system registers apply to all CPUs.  All CPUs must</div><div class='ctx'> enter the kernel in the same exception level.  Where the values documented</div><div class='head'>diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst<br/>index 749ae970c319..c7adc7897df6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/cpu-feature-registers.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/cpu-feature-registers.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/cpu-feature-registers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/cpu-feature-registers.rst</a></div><div class='hunk'>@@ -92,7 +92,7 @@ operation if the source belongs to the supported system register space.</div><div class='ctx'> </div><div class='ctx'> The infrastructure emulates only the following system register space::</div><div class='ctx'> </div><div class='del'>-	Op0=3, Op1=0, CRn=0, CRm=0,4,5,6,7</div><div class='add'>+	Op0=3, Op1=0, CRn=0, CRm=0,2,3,4,5,6,7</div><div class='ctx'> </div><div class='ctx'> (See Table C5-6 'System instruction encodings for non-Debug System</div><div class='ctx'> register accesses' in ARMv8 ARM DDI 0487A.h, for the list of</div><div class='hunk'>@@ -290,6 +290,44 @@ infrastructure:</div><div class='ctx'>      +------------------------------+---------+---------+</div><div class='ctx'>      | RPRES                        | [7-4]   |    y    |</div><div class='ctx'>      +------------------------------+---------+---------+</div><div class='add'>+     | WFXT                         | [3-0]   |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+</div><div class='add'>+  10) MVFR0_EL1 - AArch32 Media and VFP Feature Register 0</div><div class='add'>+</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | Name                         |  bits   | visible |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | FPDP                         | [11-8]  |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+</div><div class='add'>+  11) MVFR1_EL1 - AArch32 Media and VFP Feature Register 1</div><div class='add'>+</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | Name                         |  bits   | visible |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | SIMDFMAC                     | [31-28] |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | SIMDSP                       | [19-16] |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | SIMDInt                      | [15-12] |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | SIMDLS                       | [11-8]  |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+</div><div class='add'>+  12) ID_ISAR5_EL1 - AArch32 Instruction Set Attribute Register 5</div><div class='add'>+</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | Name                         |  bits   | visible |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | CRC32                        | [19-16] |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | SHA2                         | [15-12] |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | SHA1                         | [11-8]  |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='add'>+     | AES                          | [7-4]   |    y    |</div><div class='add'>+     +------------------------------+---------+---------+</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Appendix I: Example</div><div class='head'>diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst<br/>index a8f30963e550..83e57e4d38e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/elf_hwcaps.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/elf_hwcaps.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/elf_hwcaps.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/elf_hwcaps.rst</a></div><div class='hunk'>@@ -14,7 +14,7 @@ Some hardware or software features are only available on some CPU</div><div class='ctx'> implementations, and/or with certain kernel configurations, but have no</div><div class='ctx'> architected discovery mechanism available to userspace code at EL0. The</div><div class='ctx'> kernel exposes the presence of these features to userspace through a set</div><div class='del'>-of flags called hwcaps, exposed in the auxilliary vector.</div><div class='add'>+of flags called hwcaps, exposed in the auxiliary vector.</div><div class='ctx'> </div><div class='ctx'> Userspace software can test for features by acquiring the AT_HWCAP or</div><div class='ctx'> AT_HWCAP2 entry of the auxiliary vector, and testing whether the relevant</div><div class='hunk'>@@ -171,99 +171,137 @@ HWCAP_PACG</div><div class='ctx'>     Documentation/arm64/pointer-authentication.rst.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_DCPODP</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVE2</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVEAES</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVEPMULL</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVEBITPERM</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVESHA3</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVESM4</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_FLAGM2</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_FRINT</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVEI8MM</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVEF32MM</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVEF64MM</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_SVEBF16</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_I8MM</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_BF16</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_DGH</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_RNG</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_BTI</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_MTE</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described</div><div class='ctx'>     by Documentation/arm64/memory-tagging-extension.rst.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_ECV</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_AFP</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_RPRES</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.</div><div class='ctx'> </div><div class='ctx'> HWCAP2_MTE3</div><div class='del'>-</div><div class='ctx'>     Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0011, as described</div><div class='ctx'>     by Documentation/arm64/memory-tagging-extension.rst.</div><div class='ctx'> </div><div class='add'>+HWCAP2_SME</div><div class='add'>+    Functionality implied by ID_AA64PFR1_EL1.SME == 0b0001, as described</div><div class='add'>+    by Documentation/arm64/sme.rst.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME_I16I64</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.I16I64 == 0b1111.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME_F64F64</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.F64F64 == 0b1.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME_I8I32</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.I8I32 == 0b1111.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME_F16F32</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.F16F32 == 0b1.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME_B16F32</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.B16F32 == 0b1.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME_F32F32</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.F32F32 == 0b1.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME_FA64</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.FA64 == 0b1.</div><div class='add'>+</div><div class='add'>+HWCAP2_WFXT</div><div class='add'>+    Functionality implied by ID_AA64ISAR2_EL1.WFXT == 0b0010.</div><div class='add'>+</div><div class='add'>+HWCAP2_EBF16</div><div class='add'>+    Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0010.</div><div class='add'>+</div><div class='add'>+HWCAP2_SVE_EBF16</div><div class='add'>+    Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0010.</div><div class='add'>+</div><div class='add'>+HWCAP2_CSSC</div><div class='add'>+    Functionality implied by ID_AA64ISAR2_EL1.CSSC == 0b0001.</div><div class='add'>+</div><div class='add'>+HWCAP2_RPRFM</div><div class='add'>+    Functionality implied by ID_AA64ISAR2_EL1.RPRFM == 0b0001.</div><div class='add'>+</div><div class='add'>+HWCAP2_SVE2P1</div><div class='add'>+    Functionality implied by ID_AA64ZFR0_EL1.SVEver == 0b0010.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME2</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0001.</div><div class='add'>+</div><div class='add'>+HWCAP2_SME2P1</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.SMEver == 0b0010.</div><div class='add'>+</div><div class='add'>+HWCAP2_SMEI16I32</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.I16I32 == 0b0101</div><div class='add'>+</div><div class='add'>+HWCAP2_SMEBI32I32</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.BI32I32 == 0b1</div><div class='add'>+</div><div class='add'>+HWCAP2_SMEB16B16</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.B16B16 == 0b1</div><div class='add'>+</div><div class='add'>+HWCAP2_SMEF16F16</div><div class='add'>+    Functionality implied by ID_AA64SMFR0_EL1.F16F16 == 0b1</div><div class='add'>+</div><div class='ctx'> 4. Unused AT_HWCAP bits</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/arm64/index.rst b/Documentation/arm64/index.rst<br/>index 4f840bac083e..ae21f8118830 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/index.rst</a></div><div class='hunk'>@@ -21,6 +21,7 @@ ARM64 Architecture</div><div class='ctx'>     perf</div><div class='ctx'>     pointer-authentication</div><div class='ctx'>     silicon-errata</div><div class='add'>+    sme</div><div class='ctx'>     sve</div><div class='ctx'>     tagged-address-abi</div><div class='ctx'>     tagged-pointers</div><div class='head'>diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst<br/>index dd27f78d7608..dbae47bba25e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/memory-tagging-extension.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/memory-tagging-extension.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/memory-tagging-extension.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/memory-tagging-extension.rst</a></div><div class='hunk'>@@ -228,10 +228,10 @@ Core dump support</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='ctx'> The allocation tags for user memory mapped with ``PROT_MTE`` are dumped</div><div class='del'>-in the core file as additional ``PT_ARM_MEMTAG_MTE`` segments. The</div><div class='add'>+in the core file as additional ``PT_AARCH64_MEMTAG_MTE`` segments. The</div><div class='ctx'> program header for such segment is defined as:</div><div class='ctx'> </div><div class='del'>-:``p_type``: ``PT_ARM_MEMTAG_MTE``</div><div class='add'>+:``p_type``: ``PT_AARCH64_MEMTAG_MTE``</div><div class='ctx'> :``p_flags``: 0</div><div class='ctx'> :``p_offset``: segment file offset</div><div class='ctx'> :``p_vaddr``: segment virtual address, same as the corresponding</div><div class='head'>diff --git a/Documentation/arm64/memory.rst b/Documentation/arm64/memory.rst<br/>index 901cd094f4ec..2a641ba7be3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/memory.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/memory.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/memory.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/memory.rst</a></div><div class='hunk'>@@ -33,9 +33,8 @@ AArch64 Linux memory layout with 4KB pages + 4 levels (48-bit)::</div><div class='ctx'>   0000000000000000	0000ffffffffffff	 256TB		user</div><div class='ctx'>   ffff000000000000	ffff7fffffffffff	 128TB		kernel logical memory map</div><div class='ctx'>  [ffff600000000000	ffff7fffffffffff]	  32TB		[kasan shadow region]</div><div class='del'>-  ffff800000000000	ffff800007ffffff	 128MB		bpf jit region</div><div class='del'>-  ffff800008000000	ffff80000fffffff	 128MB		modules</div><div class='del'>-  ffff800010000000	fffffbffefffffff	 124TB		vmalloc</div><div class='add'>+  ffff800000000000	ffff800007ffffff	 128MB		modules</div><div class='add'>+  ffff800008000000	fffffbffefffffff	 124TB		vmalloc</div><div class='ctx'>   fffffbfff0000000	fffffbfffdffffff	 224MB		fixed mappings (top down)</div><div class='ctx'>   fffffbfffe000000	fffffbfffe7fffff	   8MB		[guard region]</div><div class='ctx'>   fffffbfffe800000	fffffbffff7fffff	  16MB		PCI I/O space</div><div class='hunk'>@@ -51,9 +50,8 @@ AArch64 Linux memory layout with 64KB pages + 3 levels (52-bit with HW support):</div><div class='ctx'>   0000000000000000	000fffffffffffff	   4PB		user</div><div class='ctx'>   fff0000000000000	ffff7fffffffffff	  ~4PB		kernel logical memory map</div><div class='ctx'>  [fffd800000000000	ffff7fffffffffff]	 512TB		[kasan shadow region]</div><div class='del'>-  ffff800000000000	ffff800007ffffff	 128MB		bpf jit region</div><div class='del'>-  ffff800008000000	ffff80000fffffff	 128MB		modules</div><div class='del'>-  ffff800010000000	fffffbffefffffff	 124TB		vmalloc</div><div class='add'>+  ffff800000000000	ffff800007ffffff	 128MB		modules</div><div class='add'>+  ffff800008000000	fffffbffefffffff	 124TB		vmalloc</div><div class='ctx'>   fffffbfff0000000	fffffbfffdffffff	 224MB		fixed mappings (top down)</div><div class='ctx'>   fffffbfffe000000	fffffbfffe7fffff	   8MB		[guard region]</div><div class='ctx'>   fffffbfffe800000	fffffbffff7fffff	  16MB		PCI I/O space</div><div class='head'>diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/silicon-errata.rst<br/>index 466cb9e89047..9e311bc43e05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/silicon-errata.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/silicon-errata.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/silicon-errata.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/silicon-errata.rst</a></div><div class='hunk'>@@ -52,6 +52,8 @@ stable kernels.</div><div class='ctx'> | Allwinner      | A64/R18         | UNKNOWN1        | SUN50I_ERRATUM_UNKNOWN1     |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| ARM            | Cortex-A510     | #2457168        | ARM64_ERRATUM_2457168       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A510     | #2064142        | ARM64_ERRATUM_2064142       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A510     | #2038923        | ARM64_ERRATUM_2038923       |</div><div class='hunk'>@@ -74,6 +76,8 @@ stable kernels.</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A55      | #1530923        | ARM64_ERRATUM_1530923       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| ARM            | Cortex-A55      | #2441007        | ARM64_ERRATUM_2441007       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A57      | #832075         | ARM64_ERRATUM_832075        |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A57      | #852523         | N/A                         |</div><div class='hunk'>@@ -82,10 +86,14 @@ stable kernels.</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A57      | #1319537        | ARM64_ERRATUM_1319367       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| ARM            | Cortex-A57      | #1742098        | ARM64_ERRATUM_1742098       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A72      | #853709         | N/A                         |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A72      | #1319367        | ARM64_ERRATUM_1319367       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| ARM            | Cortex-A72      | #1655431        | ARM64_ERRATUM_1742098       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A73      | #858921         | ARM64_ERRATUM_858921        |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A76      | #1188873,1418040| ARM64_ERRATUM_1418040       |</div><div class='hunk'>@@ -102,12 +110,18 @@ stable kernels.</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A510     | #2077057        | ARM64_ERRATUM_2077057       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| ARM            | Cortex-A510     | #2441009        | ARM64_ERRATUM_2441009       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| ARM            | Cortex-A510     | #2658417        | ARM64_ERRATUM_2658417       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A710     | #2119858        | ARM64_ERRATUM_2119858       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A710     | #2054223        | ARM64_ERRATUM_2054223       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-A710     | #2224489        | ARM64_ERRATUM_2224489       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| ARM            | Cortex-A715     | #2645198        | ARM64_ERRATUM_2645198       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-X2       | #2119858        | ARM64_ERRATUM_2119858       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | ARM            | Cortex-X2       | #2224489        | ARM64_ERRATUM_2224489       |</div><div class='hunk'>@@ -158,6 +172,8 @@ stable kernels.</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | NVIDIA         | Carmel Core     | N/A             | NVIDIA_CARMEL_CNP_ERRATUM   |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| NVIDIA         | T241 GICv3/4.x  | T241-FABRIC-4   | N/A                         |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | Freescale/NXP  | LS2080A/LS1043A | A-008585        | FSL_ERRATUM_A008585         |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='hunk'>@@ -189,6 +205,12 @@ stable kernels.</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | Qualcomm Tech. | Kryo4xx Silver  | N/A             | ARM64_ERRATUM_1024718       |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| Qualcomm Tech. | Kryo4xx Gold    | N/A             | ARM64_ERRATUM_1286807       |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+| Rockchip       | RK3588          | #3588001        | ROCKCHIP_ERRATUM_3588001    |</div><div class='add'>++----------------+-----------------+-----------------+-----------------------------+</div><div class='add'>+</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='ctx'> | Fujitsu        | A64FX           | E#010001        | FUJITSU_ERRATUM_010001      |</div><div class='ctx'> +----------------+-----------------+-----------------+-----------------------------+</div><div class='head'>diff --git a/Documentation/arm64/sme.rst b/Documentation/arm64/sme.rst<br/>new file mode 100644<br/>index 000000000000..1c43ea12eb4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/sme.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/sme.rst</a></div><div class='hunk'>@@ -0,0 +1,468 @@</div><div class='add'>+===================================================</div><div class='add'>+Scalable Matrix Extension support for AArch64 Linux</div><div class='add'>+===================================================</div><div class='add'>+</div><div class='add'>+This document outlines briefly the interface provided to userspace by Linux in</div><div class='add'>+order to support use of the ARM Scalable Matrix Extension (SME).</div><div class='add'>+</div><div class='add'>+This is an outline of the most important features and issues only and not</div><div class='add'>+intended to be exhaustive.  It should be read in conjunction with the SVE</div><div class='add'>+documentation in sve.rst which provides details on the Streaming SVE mode</div><div class='add'>+included in SME.</div><div class='add'>+</div><div class='add'>+This document does not aim to describe the SME architecture or programmer's</div><div class='add'>+model.  To aid understanding, a minimal description of relevant programmer's</div><div class='add'>+model features for SME is included in Appendix A.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+1.  General</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+* PSTATE.SM, PSTATE.ZA, the streaming mode vector length, the ZA and (when</div><div class='add'>+  present) ZTn register state and TPIDR2_EL0 are tracked per thread.</div><div class='add'>+</div><div class='add'>+* The presence of SME is reported to userspace via HWCAP2_SME in the aux vector</div><div class='add'>+  AT_HWCAP2 entry.  Presence of this flag implies the presence of the SME</div><div class='add'>+  instructions and registers, and the Linux-specific system interfaces</div><div class='add'>+  described in this document.  SME is reported in /proc/cpuinfo as "sme".</div><div class='add'>+</div><div class='add'>+* The presence of SME2 is reported to userspace via HWCAP2_SME2 in the</div><div class='add'>+  aux vector AT_HWCAP2 entry.  Presence of this flag implies the presence of</div><div class='add'>+  the SME2 instructions and ZT0, and the Linux-specific system interfaces</div><div class='add'>+  described in this document.  SME2 is reported in /proc/cpuinfo as "sme2".</div><div class='add'>+</div><div class='add'>+* Support for the execution of SME instructions in userspace can also be</div><div class='add'>+  detected by reading the CPU ID register ID_AA64PFR1_EL1 using an MRS</div><div class='add'>+  instruction, and checking that the value of the SME field is nonzero. [3]</div><div class='add'>+</div><div class='add'>+  It does not guarantee the presence of the system interfaces described in the</div><div class='add'>+  following sections: software that needs to verify that those interfaces are</div><div class='add'>+  present must check for HWCAP2_SME instead.</div><div class='add'>+</div><div class='add'>+* There are a number of optional SME features, presence of these is reported</div><div class='add'>+  through AT_HWCAP2 through:</div><div class='add'>+</div><div class='add'>+	HWCAP2_SME_I16I64</div><div class='add'>+	HWCAP2_SME_F64F64</div><div class='add'>+	HWCAP2_SME_I8I32</div><div class='add'>+	HWCAP2_SME_F16F32</div><div class='add'>+	HWCAP2_SME_B16F32</div><div class='add'>+	HWCAP2_SME_F32F32</div><div class='add'>+	HWCAP2_SME_FA64</div><div class='add'>+        HWCAP2_SME2</div><div class='add'>+</div><div class='add'>+  This list may be extended over time as the SME architecture evolves.</div><div class='add'>+</div><div class='add'>+  These extensions are also reported via the CPU ID register ID_AA64SMFR0_EL1,</div><div class='add'>+  which userspace can read using an MRS instruction.  See elf_hwcaps.txt and</div><div class='add'>+  cpu-feature-registers.txt for details.</div><div class='add'>+</div><div class='add'>+* Debuggers should restrict themselves to interacting with the target via the</div><div class='add'>+  NT_ARM_SVE, NT_ARM_SSVE, NT_ARM_ZA and NT_ARM_ZT regsets.  The recommended</div><div class='add'>+  way of detecting support for these regsets is to connect to a target process</div><div class='add'>+  first and then attempt a</div><div class='add'>+</div><div class='add'>+	ptrace(PTRACE_GETREGSET, pid, NT_ARM_&lt;regset&gt;, &amp;iov).</div><div class='add'>+</div><div class='add'>+* Whenever ZA register values are exchanged in memory between userspace and</div><div class='add'>+  the kernel, the register value is encoded in memory as a series of horizontal</div><div class='add'>+  vectors from 0 to VL/8-1 stored in the same endianness invariant format as is</div><div class='add'>+  used for SVE vectors.</div><div class='add'>+</div><div class='add'>+* On thread creation TPIDR2_EL0 is preserved unless CLONE_SETTLS is specified,</div><div class='add'>+  in which case it is set to 0.</div><div class='add'>+</div><div class='add'>+2.  Vector lengths</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+SME defines a second vector length similar to the SVE vector length which is</div><div class='add'>+controls the size of the streaming mode SVE vectors and the ZA matrix array.</div><div class='add'>+The ZA matrix is square with each side having as many bytes as a streaming</div><div class='add'>+mode SVE vector.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+3.  Sharing of streaming and non-streaming mode SVE state</div><div class='add'>+---------------------------------------------------------</div><div class='add'>+</div><div class='add'>+It is implementation defined which if any parts of the SVE state are shared</div><div class='add'>+between streaming and non-streaming modes.  When switching between modes</div><div class='add'>+via software interfaces such as ptrace if no register content is provided as</div><div class='add'>+part of switching no state will be assumed to be shared and everything will</div><div class='add'>+be zeroed.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4.  System call behaviour</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+* On syscall PSTATE.ZA is preserved, if PSTATE.ZA==1 then the contents of the</div><div class='add'>+  ZA matrix and ZTn (if present) are preserved.</div><div class='add'>+</div><div class='add'>+* On syscall PSTATE.SM will be cleared and the SVE registers will be handled</div><div class='add'>+  as per the standard SVE ABI.</div><div class='add'>+</div><div class='add'>+* None of the SVE registers, ZA or ZTn are used to pass arguments to</div><div class='add'>+  or receive results from any syscall.</div><div class='add'>+</div><div class='add'>+* On process creation (eg, clone()) the newly created process will have</div><div class='add'>+  PSTATE.SM cleared.</div><div class='add'>+</div><div class='add'>+* All other SME state of a thread, including the currently configured vector</div><div class='add'>+  length, the state of the PR_SME_VL_INHERIT flag, and the deferred vector</div><div class='add'>+  length (if any), is preserved across all syscalls, subject to the specific</div><div class='add'>+  exceptions for execve() described in section 6.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+5.  Signal handling</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+* Signal handlers are invoked with streaming mode and ZA disabled.</div><div class='add'>+</div><div class='add'>+* A new signal frame record TPIDR2_MAGIC is added formatted as a struct</div><div class='add'>+  tpidr2_context to allow access to TPIDR2_EL0 from signal handlers.</div><div class='add'>+</div><div class='add'>+* A new signal frame record za_context encodes the ZA register contents on</div><div class='add'>+  signal delivery. [1]</div><div class='add'>+</div><div class='add'>+* The signal frame record for ZA always contains basic metadata, in particular</div><div class='add'>+  the thread's vector length (in za_context.vl).</div><div class='add'>+</div><div class='add'>+* The ZA matrix may or may not be included in the record, depending on</div><div class='add'>+  the value of PSTATE.ZA.  The registers are present if and only if:</div><div class='add'>+  za_context.head.size &gt;= ZA_SIG_CONTEXT_SIZE(sve_vq_from_vl(za_context.vl))</div><div class='add'>+  in which case PSTATE.ZA == 1.</div><div class='add'>+</div><div class='add'>+* If matrix data is present, the remainder of the record has a vl-dependent</div><div class='add'>+  size and layout.  Macros ZA_SIG_* are defined [1] to facilitate access to</div><div class='add'>+  them.</div><div class='add'>+</div><div class='add'>+* The matrix is stored as a series of horizontal vectors in the same format as</div><div class='add'>+  is used for SVE vectors.</div><div class='add'>+</div><div class='add'>+* If the ZA context is too big to fit in sigcontext.__reserved[], then extra</div><div class='add'>+  space is allocated on the stack, an extra_context record is written in</div><div class='add'>+  __reserved[] referencing this space.  za_context is then written in the</div><div class='add'>+  extra space.  Refer to [1] for further details about this mechanism.</div><div class='add'>+</div><div class='add'>+* If ZTn is supported and PSTATE.ZA==1 then a signal frame record for ZTn will</div><div class='add'>+  be generated.</div><div class='add'>+</div><div class='add'>+* The signal record for ZTn has magic ZT_MAGIC (0x5a544e01) and consists of a</div><div class='add'>+  standard signal frame header followed by a struct zt_context specifying</div><div class='add'>+  the number of ZTn registers supported by the system, then zt_context.nregs</div><div class='add'>+  blocks of 64 bytes of data per register.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+5.  Signal return</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+When returning from a signal handler:</div><div class='add'>+</div><div class='add'>+* If there is no za_context record in the signal frame, or if the record is</div><div class='add'>+  present but contains no register data as described in the previous section,</div><div class='add'>+  then ZA is disabled.</div><div class='add'>+</div><div class='add'>+* If za_context is present in the signal frame and contains matrix data then</div><div class='add'>+  PSTATE.ZA is set to 1 and ZA is populated with the specified data.</div><div class='add'>+</div><div class='add'>+* The vector length cannot be changed via signal return.  If za_context.vl in</div><div class='add'>+  the signal frame does not match the current vector length, the signal return</div><div class='add'>+  attempt is treated as illegal, resulting in a forced SIGSEGV.</div><div class='add'>+</div><div class='add'>+* If ZTn is not supported or PSTATE.ZA==0 then it is illegal to have a</div><div class='add'>+  signal frame record for ZTn, resulting in a forced SIGSEGV.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+6.  prctl extensions</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Some new prctl() calls are added to allow programs to manage the SME vector</div><div class='add'>+length:</div><div class='add'>+</div><div class='add'>+prctl(PR_SME_SET_VL, unsigned long arg)</div><div class='add'>+</div><div class='add'>+    Sets the vector length of the calling thread and related flags, where</div><div class='add'>+    arg == vl | flags.  Other threads of the calling process are unaffected.</div><div class='add'>+</div><div class='add'>+    vl is the desired vector length, where sve_vl_valid(vl) must be true.</div><div class='add'>+</div><div class='add'>+    flags:</div><div class='add'>+</div><div class='add'>+	PR_SME_VL_INHERIT</div><div class='add'>+</div><div class='add'>+	    Inherit the current vector length across execve().  Otherwise, the</div><div class='add'>+	    vector length is reset to the system default at execve().  (See</div><div class='add'>+	    Section 9.)</div><div class='add'>+</div><div class='add'>+	PR_SME_SET_VL_ONEXEC</div><div class='add'>+</div><div class='add'>+	    Defer the requested vector length change until the next execve()</div><div class='add'>+	    performed by this thread.</div><div class='add'>+</div><div class='add'>+	    The effect is equivalent to implicit execution of the following</div><div class='add'>+	    call immediately after the next execve() (if any) by the thread:</div><div class='add'>+</div><div class='add'>+		prctl(PR_SME_SET_VL, arg &amp; ~PR_SME_SET_VL_ONEXEC)</div><div class='add'>+</div><div class='add'>+	    This allows launching of a new program with a different vector</div><div class='add'>+	    length, while avoiding runtime side effects in the caller.</div><div class='add'>+</div><div class='add'>+	    Without PR_SME_SET_VL_ONEXEC, the requested change takes effect</div><div class='add'>+	    immediately.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    Return value: a nonnegative on success, or a negative value on error:</div><div class='add'>+	EINVAL: SME not supported, invalid vector length requested, or</div><div class='add'>+	    invalid flags.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    On success:</div><div class='add'>+</div><div class='add'>+    * Either the calling thread's vector length or the deferred vector length</div><div class='add'>+      to be applied at the next execve() by the thread (dependent on whether</div><div class='add'>+      PR_SME_SET_VL_ONEXEC is present in arg), is set to the largest value</div><div class='add'>+      supported by the system that is less than or equal to vl.  If vl ==</div><div class='add'>+      SVE_VL_MAX, the value set will be the largest value supported by the</div><div class='add'>+      system.</div><div class='add'>+</div><div class='add'>+    * Any previously outstanding deferred vector length change in the calling</div><div class='add'>+      thread is cancelled.</div><div class='add'>+</div><div class='add'>+    * The returned value describes the resulting configuration, encoded as for</div><div class='add'>+      PR_SME_GET_VL.  The vector length reported in this value is the new</div><div class='add'>+      current vector length for this thread if PR_SME_SET_VL_ONEXEC was not</div><div class='add'>+      present in arg; otherwise, the reported vector length is the deferred</div><div class='add'>+      vector length that will be applied at the next execve() by the calling</div><div class='add'>+      thread.</div><div class='add'>+</div><div class='add'>+    * Changing the vector length causes all of ZA, ZTn, P0..P15, FFR and all</div><div class='add'>+      bits of Z0..Z31 except for Z0 bits [127:0] .. Z31 bits [127:0] to become</div><div class='add'>+      unspecified, including both streaming and non-streaming SVE state.</div><div class='add'>+      Calling PR_SME_SET_VL with vl equal to the thread's current vector</div><div class='add'>+      length, or calling PR_SME_SET_VL with the PR_SVE_SET_VL_ONEXEC flag,</div><div class='add'>+      does not constitute a change to the vector length for this purpose.</div><div class='add'>+</div><div class='add'>+    * Changing the vector length causes PSTATE.ZA and PSTATE.SM to be cleared.</div><div class='add'>+      Calling PR_SME_SET_VL with vl equal to the thread's current vector</div><div class='add'>+      length, or calling PR_SME_SET_VL with the PR_SVE_SET_VL_ONEXEC flag,</div><div class='add'>+      does not constitute a change to the vector length for this purpose.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+prctl(PR_SME_GET_VL)</div><div class='add'>+</div><div class='add'>+    Gets the vector length of the calling thread.</div><div class='add'>+</div><div class='add'>+    The following flag may be OR-ed into the result:</div><div class='add'>+</div><div class='add'>+	PR_SME_VL_INHERIT</div><div class='add'>+</div><div class='add'>+	    Vector length will be inherited across execve().</div><div class='add'>+</div><div class='add'>+    There is no way to determine whether there is an outstanding deferred</div><div class='add'>+    vector length change (which would only normally be the case between a</div><div class='add'>+    fork() or vfork() and the corresponding execve() in typical use).</div><div class='add'>+</div><div class='add'>+    To extract the vector length from the result, bitwise and it with</div><div class='add'>+    PR_SME_VL_LEN_MASK.</div><div class='add'>+</div><div class='add'>+    Return value: a nonnegative value on success, or a negative value on error:</div><div class='add'>+	EINVAL: SME not supported.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+7.  ptrace extensions</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+* A new regset NT_ARM_SSVE is defined for access to streaming mode SVE</div><div class='add'>+  state via PTRACE_GETREGSET and  PTRACE_SETREGSET, this is documented in</div><div class='add'>+  sve.rst.</div><div class='add'>+</div><div class='add'>+* A new regset NT_ARM_ZA is defined for ZA state for access to ZA state via</div><div class='add'>+  PTRACE_GETREGSET and PTRACE_SETREGSET.</div><div class='add'>+</div><div class='add'>+  Refer to [2] for definitions.</div><div class='add'>+</div><div class='add'>+The regset data starts with struct user_za_header, containing:</div><div class='add'>+</div><div class='add'>+    size</div><div class='add'>+</div><div class='add'>+	Size of the complete regset, in bytes.</div><div class='add'>+	This depends on vl and possibly on other things in the future.</div><div class='add'>+</div><div class='add'>+	If a call to PTRACE_GETREGSET requests less data than the value of</div><div class='add'>+	size, the caller can allocate a larger buffer and retry in order to</div><div class='add'>+	read the complete regset.</div><div class='add'>+</div><div class='add'>+    max_size</div><div class='add'>+</div><div class='add'>+	Maximum size in bytes that the regset can grow to for the target</div><div class='add'>+	thread.  The regset won't grow bigger than this even if the target</div><div class='add'>+	thread changes its vector length etc.</div><div class='add'>+</div><div class='add'>+    vl</div><div class='add'>+</div><div class='add'>+	Target thread's current streaming vector length, in bytes.</div><div class='add'>+</div><div class='add'>+    max_vl</div><div class='add'>+</div><div class='add'>+	Maximum possible streaming vector length for the target thread.</div><div class='add'>+</div><div class='add'>+    flags</div><div class='add'>+</div><div class='add'>+	Zero or more of the following flags, which have the same</div><div class='add'>+	meaning and behaviour as the corresponding PR_SET_VL_* flags:</div><div class='add'>+</div><div class='add'>+	    SME_PT_VL_INHERIT</div><div class='add'>+</div><div class='add'>+	    SME_PT_VL_ONEXEC (SETREGSET only).</div><div class='add'>+</div><div class='add'>+* The effects of changing the vector length and/or flags are equivalent to</div><div class='add'>+  those documented for PR_SME_SET_VL.</div><div class='add'>+</div><div class='add'>+  The caller must make a further GETREGSET call if it needs to know what VL is</div><div class='add'>+  actually set by SETREGSET, unless is it known in advance that the requested</div><div class='add'>+  VL is supported.</div><div class='add'>+</div><div class='add'>+* The size and layout of the payload depends on the header fields.  The</div><div class='add'>+  SME_PT_ZA_*() macros are provided to facilitate access to the data.</div><div class='add'>+</div><div class='add'>+* In either case, for SETREGSET it is permissible to omit the payload, in which</div><div class='add'>+  case the vector length and flags are changed and PSTATE.ZA is set to 0</div><div class='add'>+  (along with any consequences of those changes).  If a payload is provided</div><div class='add'>+  then PSTATE.ZA will be set to 1.</div><div class='add'>+</div><div class='add'>+* For SETREGSET, if the requested VL is not supported, the effect will be the</div><div class='add'>+  same as if the payload were omitted, except that an EIO error is reported.</div><div class='add'>+  No attempt is made to translate the payload data to the correct layout</div><div class='add'>+  for the vector length actually set.  It is up to the caller to translate the</div><div class='add'>+  payload layout for the actual VL and retry.</div><div class='add'>+</div><div class='add'>+* The effect of writing a partial, incomplete payload is unspecified.</div><div class='add'>+</div><div class='add'>+* A new regset NT_ARM_ZT is defined for access to ZTn state via</div><div class='add'>+  PTRACE_GETREGSET and PTRACE_SETREGSET.</div><div class='add'>+</div><div class='add'>+* The NT_ARM_ZT regset consists of a single 512 bit register.</div><div class='add'>+</div><div class='add'>+* When PSTATE.ZA==0 reads of NT_ARM_ZT will report all bits of ZTn as 0.</div><div class='add'>+</div><div class='add'>+* Writes to NT_ARM_ZT will set PSTATE.ZA to 1.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+8.  ELF coredump extensions</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+* NT_ARM_SSVE notes will be added to each coredump for</div><div class='add'>+  each thread of the dumped process.  The contents will be equivalent to the</div><div class='add'>+  data that would have been read if a PTRACE_GETREGSET of the corresponding</div><div class='add'>+  type were executed for each thread when the coredump was generated.</div><div class='add'>+</div><div class='add'>+* A NT_ARM_ZA note will be added to each coredump for each thread of the</div><div class='add'>+  dumped process.  The contents will be equivalent to the data that would have</div><div class='add'>+  been read if a PTRACE_GETREGSET of NT_ARM_ZA were executed for each thread</div><div class='add'>+  when the coredump was generated.</div><div class='add'>+</div><div class='add'>+* A NT_ARM_ZT note will be added to each coredump for each thread of the</div><div class='add'>+  dumped process.  The contents will be equivalent to the data that would have</div><div class='add'>+  been read if a PTRACE_GETREGSET of NT_ARM_ZT were executed for each thread</div><div class='add'>+  when the coredump was generated.</div><div class='add'>+</div><div class='add'>+* The NT_ARM_TLS note will be extended to two registers, the second register</div><div class='add'>+  will contain TPIDR2_EL0 on systems that support SME and will be read as</div><div class='add'>+  zero with writes ignored otherwise.</div><div class='add'>+</div><div class='add'>+9.  System runtime configuration</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+* To mitigate the ABI impact of expansion of the signal frame, a policy</div><div class='add'>+  mechanism is provided for administrators, distro maintainers and developers</div><div class='add'>+  to set the default vector length for userspace processes:</div><div class='add'>+</div><div class='add'>+/proc/sys/abi/sme_default_vector_length</div><div class='add'>+</div><div class='add'>+    Writing the text representation of an integer to this file sets the system</div><div class='add'>+    default vector length to the specified value, unless the value is greater</div><div class='add'>+    than the maximum vector length supported by the system in which case the</div><div class='add'>+    default vector length is set to that maximum.</div><div class='add'>+</div><div class='add'>+    The result can be determined by reopening the file and reading its</div><div class='add'>+    contents.</div><div class='add'>+</div><div class='add'>+    At boot, the default vector length is initially set to 32 or the maximum</div><div class='add'>+    supported vector length, whichever is smaller and supported.  This</div><div class='add'>+    determines the initial vector length of the init process (PID 1).</div><div class='add'>+</div><div class='add'>+    Reading this file returns the current system default vector length.</div><div class='add'>+</div><div class='add'>+* At every execve() call, the new vector length of the new process is set to</div><div class='add'>+  the system default vector length, unless</div><div class='add'>+</div><div class='add'>+    * PR_SME_VL_INHERIT (or equivalently SME_PT_VL_INHERIT) is set for the</div><div class='add'>+      calling thread, or</div><div class='add'>+</div><div class='add'>+    * a deferred vector length change is pending, established via the</div><div class='add'>+      PR_SME_SET_VL_ONEXEC flag (or SME_PT_VL_ONEXEC).</div><div class='add'>+</div><div class='add'>+* Modifying the system default vector length does not affect the vector length</div><div class='add'>+  of any existing process or thread that does not make an execve() call.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Appendix A.  SME programmer's model (informative)</div><div class='add'>+=================================================</div><div class='add'>+</div><div class='add'>+This section provides a minimal description of the additions made by SME to the</div><div class='add'>+ARMv8-A programmer's model that are relevant to this document.</div><div class='add'>+</div><div class='add'>+Note: This section is for information only and not intended to be complete or</div><div class='add'>+to replace any architectural specification.</div><div class='add'>+</div><div class='add'>+A.1.  Registers</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+In A64 state, SME adds the following:</div><div class='add'>+</div><div class='add'>+* A new mode, streaming mode, in which a subset of the normal FPSIMD and SVE</div><div class='add'>+  features are available.  When supported EL0 software may enter and leave</div><div class='add'>+  streaming mode at any time.</div><div class='add'>+</div><div class='add'>+  For best system performance it is strongly encouraged for software to enable</div><div class='add'>+  streaming mode only when it is actively being used.</div><div class='add'>+</div><div class='add'>+* A new vector length controlling the size of ZA and the Z registers when in</div><div class='add'>+  streaming mode, separately to the vector length used for SVE when not in</div><div class='add'>+  streaming mode.  There is no requirement that either the currently selected</div><div class='add'>+  vector length or the set of vector lengths supported for the two modes in</div><div class='add'>+  a given system have any relationship.  The streaming mode vector length</div><div class='add'>+  is referred to as SVL.</div><div class='add'>+</div><div class='add'>+* A new ZA matrix register.  This is a square matrix of SVLxSVL bits.  Most</div><div class='add'>+  operations on ZA require that streaming mode be enabled but ZA can be</div><div class='add'>+  enabled without streaming mode in order to load, save and retain data.</div><div class='add'>+</div><div class='add'>+  For best system performance it is strongly encouraged for software to enable</div><div class='add'>+  ZA only when it is actively being used.</div><div class='add'>+</div><div class='add'>+* A new ZT0 register is introduced when SME2 is present. This is a 512 bit</div><div class='add'>+  register which is accessible when PSTATE.ZA is set, as ZA itself is.</div><div class='add'>+</div><div class='add'>+* Two new 1 bit fields in PSTATE which may be controlled via the SMSTART and</div><div class='add'>+  SMSTOP instructions or by access to the SVCR system register:</div><div class='add'>+</div><div class='add'>+  * PSTATE.ZA, if this is 1 then the ZA matrix is accessible and has valid</div><div class='add'>+    data while if it is 0 then ZA can not be accessed.  When PSTATE.ZA is</div><div class='add'>+    changed from 0 to 1 all bits in ZA are cleared.</div><div class='add'>+</div><div class='add'>+  * PSTATE.SM, if this is 1 then the PE is in streaming mode.  When the value</div><div class='add'>+    of PSTATE.SM is changed then it is implementation defined if the subset</div><div class='add'>+    of the floating point register bits valid in both modes may be retained.</div><div class='add'>+    Any other bits will be cleared.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+[1] arch/arm64/include/uapi/asm/sigcontext.h</div><div class='add'>+    AArch64 Linux signal ABI definitions</div><div class='add'>+</div><div class='add'>+[2] arch/arm64/include/uapi/asm/ptrace.h</div><div class='add'>+    AArch64 Linux ptrace ABI definitions</div><div class='add'>+</div><div class='add'>+[3] Documentation/arm64/cpu-feature-registers.rst</div><div class='head'>diff --git a/Documentation/arm64/sve.rst b/Documentation/arm64/sve.rst<br/>index 9d9a4de5bc34..1b90a30382ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/sve.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/arm64/sve.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/arm64/sve.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/arm64/sve.rst</a></div><div class='hunk'>@@ -7,7 +7,9 @@ Author: Dave Martin &lt;Dave.Martin@arm.com&gt;</div><div class='ctx'> Date:   4 August 2017</div><div class='ctx'> </div><div class='ctx'> This document outlines briefly the interface provided to userspace by Linux in</div><div class='del'>-order to support use of the ARM Scalable Vector Extension (SVE).</div><div class='add'>+order to support use of the ARM Scalable Vector Extension (SVE), including</div><div class='add'>+interactions with Streaming SVE mode added by the Scalable Matrix Extension</div><div class='add'>+(SME).</div><div class='ctx'> </div><div class='ctx'> This is an outline of the most important features and issues only and not</div><div class='ctx'> intended to be exhaustive.</div><div class='hunk'>@@ -23,6 +25,10 @@ model features for SVE is included in Appendix A.</div><div class='ctx'> * SVE registers Z0..Z31, P0..P15 and FFR and the current vector length VL, are</div><div class='ctx'>   tracked per-thread.</div><div class='ctx'> </div><div class='add'>+* In streaming mode FFR is not accessible unless HWCAP2_SME_FA64 is present</div><div class='add'>+  in the system, when it is not supported and these interfaces are used to</div><div class='add'>+  access streaming mode FFR is read and written as zero.</div><div class='add'>+</div><div class='ctx'> * The presence of SVE is reported to userspace via HWCAP_SVE in the aux vector</div><div class='ctx'>   AT_HWCAP entry.  Presence of this flag implies the presence of the SVE</div><div class='ctx'>   instructions and registers, and the Linux-specific system interfaces</div><div class='hunk'>@@ -46,6 +52,7 @@ model features for SVE is included in Appendix A.</div><div class='ctx'> 	HWCAP2_SVEBITPERM</div><div class='ctx'> 	HWCAP2_SVESHA3</div><div class='ctx'> 	HWCAP2_SVESM4</div><div class='add'>+	HWCAP2_SVE2P1</div><div class='ctx'> </div><div class='ctx'>   This list may be extended over time as the SVE architecture evolves.</div><div class='ctx'> </div><div class='hunk'>@@ -53,10 +60,19 @@ model features for SVE is included in Appendix A.</div><div class='ctx'>   which userspace can read using an MRS instruction.  See elf_hwcaps.txt and</div><div class='ctx'>   cpu-feature-registers.txt for details.</div><div class='ctx'> </div><div class='add'>+* On hardware that supports the SME extensions, HWCAP2_SME will also be</div><div class='add'>+  reported in the AT_HWCAP2 aux vector entry.  Among other things SME adds</div><div class='add'>+  streaming mode which provides a subset of the SVE feature set using a</div><div class='add'>+  separate SME vector length and the same Z/V registers.  See sme.rst</div><div class='add'>+  for more details.</div><div class='add'>+</div><div class='ctx'> * Debuggers should restrict themselves to interacting with the target via the</div><div class='ctx'>   NT_ARM_SVE regset.  The recommended way of detecting support for this regset</div><div class='ctx'>   is to connect to a target process first and then attempt a</div><div class='del'>-  ptrace(PTRACE_GETREGSET, pid, NT_ARM_SVE, &amp;iov).</div><div class='add'>+  ptrace(PTRACE_GETREGSET, pid, NT_ARM_SVE, &amp;iov).  Note that when SME is</div><div class='add'>+  present and streaming SVE mode is in use the FPSIMD subset of registers</div><div class='add'>+  will be read via NT_ARM_SVE and NT_ARM_SVE writes will exit streaming mode</div><div class='add'>+  in the target.</div><div class='ctx'> </div><div class='ctx'> * Whenever SVE scalable register values (Zn, Pn, FFR) are exchanged in memory</div><div class='ctx'>   between userspace and the kernel, the register value is encoded in memory in</div><div class='hunk'>@@ -96,7 +112,7 @@ the SVE instruction set architecture.</div><div class='ctx'> </div><div class='ctx'> * On syscall, V0..V31 are preserved (as without SVE).  Thus, bits [127:0] of</div><div class='ctx'>   Z0..Z31 are preserved.  All other bits of Z0..Z31, and all of P0..P15 and FFR</div><div class='del'>-  become unspecified on return from a syscall.</div><div class='add'>+  become zero on return from a syscall.</div><div class='ctx'> </div><div class='ctx'> * The SVE registers are not used to pass arguments to or receive results from</div><div class='ctx'>   any syscall.</div><div class='hunk'>@@ -126,6 +142,11 @@ the SVE instruction set architecture.</div><div class='ctx'>   are only present in fpsimd_context.  For convenience, the content of V0..V31</div><div class='ctx'>   is duplicated between sve_context and fpsimd_context.</div><div class='ctx'> </div><div class='add'>+* The record contains a flag field which includes a flag SVE_SIG_FLAG_SM which</div><div class='add'>+  if set indicates that the thread is in streaming mode and the vector length</div><div class='add'>+  and register data (if present) describe the streaming SVE data and vector</div><div class='add'>+  length.</div><div class='add'>+</div><div class='ctx'> * The signal frame record for SVE always contains basic metadata, in particular</div><div class='ctx'>   the thread's vector length (in sve_context.vl).</div><div class='ctx'> </div><div class='hunk'>@@ -154,7 +175,7 @@ the SVE instruction set architecture.</div><div class='ctx'> When returning from a signal handler:</div><div class='ctx'> </div><div class='ctx'> * If there is no sve_context record in the signal frame, or if the record is</div><div class='del'>-  present but contains no register data as desribed in the previous section,</div><div class='add'>+  present but contains no register data as described in the previous section,</div><div class='ctx'>   then the SVE registers/bits become non-live and take unspecified values.</div><div class='ctx'> </div><div class='ctx'> * If sve_context is present in the signal frame and contains full register</div><div class='hunk'>@@ -170,6 +191,11 @@ When returning from a signal handler:</div><div class='ctx'>   the signal frame does not match the current vector length, the signal return</div><div class='ctx'>   attempt is treated as illegal, resulting in a forced SIGSEGV.</div><div class='ctx'> </div><div class='add'>+* It is permitted to enter or leave streaming mode by setting or clearing</div><div class='add'>+  the SVE_SIG_FLAG_SM flag but applications should take care to ensure that</div><div class='add'>+  when doing so sve_context.vl and any register data are appropriate for the</div><div class='add'>+  vector length in the new mode.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> 6.  prctl extensions</div><div class='ctx'> --------------------</div><div class='hunk'>@@ -197,7 +223,7 @@ prctl(PR_SVE_SET_VL, unsigned long arg)</div><div class='ctx'> 	    Defer the requested vector length change until the next execve()</div><div class='ctx'> 	    performed by this thread.</div><div class='ctx'> </div><div class='del'>-	    The effect is equivalent to implicit exceution of the following</div><div class='add'>+	    The effect is equivalent to implicit execution of the following</div><div class='ctx'> 	    call immediately after the next execve() (if any) by the thread:</div><div class='ctx'> </div><div class='ctx'> 		prctl(PR_SVE_SET_VL, arg &amp; ~PR_SVE_SET_VL_ONEXEC)</div><div class='hunk'>@@ -265,8 +291,14 @@ prctl(PR_SVE_GET_VL)</div><div class='ctx'> 7.  ptrace extensions</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='del'>-* A new regset NT_ARM_SVE is defined for use with PTRACE_GETREGSET and</div><div class='del'>-  PTRACE_SETREGSET.</div><div class='add'>+* New regsets NT_ARM_SVE and NT_ARM_SSVE are defined for use with</div><div class='add'>+  PTRACE_GETREGSET and PTRACE_SETREGSET. NT_ARM_SSVE describes the</div><div class='add'>+  streaming mode SVE registers and NT_ARM_SVE describes the</div><div class='add'>+  non-streaming mode SVE registers.</div><div class='add'>+</div><div class='add'>+  In this description a register set is referred to as being "live" when</div><div class='add'>+  the target is in the appropriate streaming or non-streaming mode and is</div><div class='add'>+  using data beyond the subset shared with the FPSIMD Vn registers.</div><div class='ctx'> </div><div class='ctx'>   Refer to [2] for definitions.</div><div class='ctx'> </div><div class='hunk'>@@ -297,7 +329,7 @@ The regset data starts with struct user_sve_header, containing:</div><div class='ctx'> </div><div class='ctx'>     flags</div><div class='ctx'> </div><div class='del'>-	either</div><div class='add'>+	at most one of</div><div class='ctx'> </div><div class='ctx'> 	    SVE_PT_REGS_FPSIMD</div><div class='ctx'> </div><div class='hunk'>@@ -331,6 +363,10 @@ The regset data starts with struct user_sve_header, containing:</div><div class='ctx'> </div><div class='ctx'> 	    SVE_PT_VL_ONEXEC (SETREGSET only).</div><div class='ctx'> </div><div class='add'>+	If neither FPSIMD nor SVE flags are provided then no register</div><div class='add'>+	payload is available, this is only possible when SME is implemented.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> * The effects of changing the vector length and/or flags are equivalent to</div><div class='ctx'>   those documented for PR_SVE_SET_VL.</div><div class='ctx'> </div><div class='hunk'>@@ -346,6 +382,13 @@ The regset data starts with struct user_sve_header, containing:</div><div class='ctx'>   case only the vector length and flags are changed (along with any</div><div class='ctx'>   consequences of those changes).</div><div class='ctx'> </div><div class='add'>+* In systems supporting SME when in streaming mode a GETREGSET for</div><div class='add'>+  NT_REG_SVE will return only the user_sve_header with no register data,</div><div class='add'>+  similarly a GETREGSET for NT_REG_SSVE will not return any register data</div><div class='add'>+  when not in streaming mode.</div><div class='add'>+</div><div class='add'>+* A GETREGSET for NT_ARM_SSVE will never return SVE_PT_REGS_FPSIMD.</div><div class='add'>+</div><div class='ctx'> * For SETREGSET, if an SVE_PT_REGS_SVE payload is present and the</div><div class='ctx'>   requested VL is not supported, the effect will be the same as if the</div><div class='ctx'>   payload were omitted, except that an EIO error is reported.  No</div><div class='hunk'>@@ -355,17 +398,25 @@ The regset data starts with struct user_sve_header, containing:</div><div class='ctx'>   unspecified.  It is up to the caller to translate the payload layout</div><div class='ctx'>   for the actual VL and retry.</div><div class='ctx'> </div><div class='add'>+* Where SME is implemented it is not possible to GETREGSET the register</div><div class='add'>+  state for normal SVE when in streaming mode, nor the streaming mode</div><div class='add'>+  register state when in normal mode, regardless of the implementation defined</div><div class='add'>+  behaviour of the hardware for sharing data between the two modes.</div><div class='add'>+</div><div class='add'>+* Any SETREGSET of NT_ARM_SVE will exit streaming mode if the target was in</div><div class='add'>+  streaming mode and any SETREGSET of NT_ARM_SSVE will enter streaming mode</div><div class='add'>+  if the target was not in streaming mode.</div><div class='add'>+</div><div class='ctx'> * The effect of writing a partial, incomplete payload is unspecified.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 8.  ELF coredump extensions</div><div class='ctx'> ---------------------------</div><div class='ctx'> </div><div class='del'>-* A NT_ARM_SVE note will be added to each coredump for each thread of the</div><div class='del'>-  dumped process.  The contents will be equivalent to the data that would have</div><div class='del'>-  been read if a PTRACE_GETREGSET of NT_ARM_SVE were executed for each thread</div><div class='del'>-  when the coredump was generated.</div><div class='del'>-</div><div class='add'>+* NT_ARM_SVE and NT_ARM_SSVE notes will be added to each coredump for</div><div class='add'>+  each thread of the dumped process.  The contents will be equivalent to the</div><div class='add'>+  data that would have been read if a PTRACE_GETREGSET of the corresponding</div><div class='add'>+  type were executed for each thread when the coredump was generated.</div><div class='ctx'> </div><div class='ctx'> 9.  System runtime configuration</div><div class='ctx'> --------------------------------</div><div class='hunk'>@@ -402,6 +453,24 @@ The regset data starts with struct user_sve_header, containing:</div><div class='ctx'> * Modifying the system default vector length does not affect the vector length</div><div class='ctx'>   of any existing process or thread that does not make an execve() call.</div><div class='ctx'> </div><div class='add'>+10.  Perf extensions</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+* The arm64 specific DWARF standard [5] added the VG (Vector Granule) register</div><div class='add'>+  at index 46. This register is used for DWARF unwinding when variable length</div><div class='add'>+  SVE registers are pushed onto the stack.</div><div class='add'>+</div><div class='add'>+* Its value is equivalent to the current SVE vector length (VL) in bits divided</div><div class='add'>+  by 64.</div><div class='add'>+</div><div class='add'>+* The value is included in Perf samples in the regs[46] field if</div><div class='add'>+  PERF_SAMPLE_REGS_USER is set and the sample_regs_user mask has bit 46 set.</div><div class='add'>+</div><div class='add'>+* The value is the current value at the time the sample was taken, and it can</div><div class='add'>+  change over time.</div><div class='add'>+</div><div class='add'>+* If the system doesn't support SVE when perf_event_open is called with these</div><div class='add'>+  settings, the event will fail to open.</div><div class='ctx'> </div><div class='ctx'> Appendix A.  SVE programmer's model (informative)</div><div class='ctx'> =================================================</div><div class='hunk'>@@ -543,3 +612,5 @@ References</div><div class='ctx'>     http://infocenter.arm.com/help/topic/com.arm.doc.ihi0055c/IHI0055C_beta_aapcs64.pdf</div><div class='ctx'>     http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html</div><div class='ctx'>     Procedure Call Standard for the ARM 64-bit Architecture (AArch64)</div><div class='add'>+</div><div class='add'>+[5] https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst</div><div class='head'>diff --git a/Documentation/atomic_bitops.txt b/Documentation/atomic_bitops.txt<br/>index 093cdaefdb37..edea4656c5c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/atomic_bitops.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/atomic_bitops.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/atomic_bitops.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/atomic_bitops.txt</a></div><div class='hunk'>@@ -58,13 +58,11 @@ Like with atomic_t, the rule of thumb is:</div><div class='ctx'> </div><div class='ctx'>  - RMW operations that have a return value are fully ordered.</div><div class='ctx'> </div><div class='del'>- - RMW operations that are conditional are unordered on FAILURE,</div><div class='del'>-   otherwise the above rules apply. In the case of test_and_{}_bit() operations,</div><div class='del'>-   if the bit in memory is unchanged by the operation then it is deemed to have</div><div class='del'>-   failed.</div><div class='add'>+ - RMW operations that are conditional are fully ordered.</div><div class='ctx'> </div><div class='del'>-Except for a successful test_and_set_bit_lock() which has ACQUIRE semantics and</div><div class='del'>-clear_bit_unlock() which has RELEASE semantics.</div><div class='add'>+Except for a successful test_and_set_bit_lock() which has ACQUIRE semantics,</div><div class='add'>+clear_bit_unlock() which has RELEASE semantics and test_bit_acquire which has</div><div class='add'>+ACQUIRE semantics.</div><div class='ctx'> </div><div class='ctx'> Since a platform only has a single means of achieving atomic operations</div><div class='ctx'> the same barriers as for atomic_t are used, see atomic_t.txt.</div><div class='head'>diff --git a/Documentation/atomic_t.txt b/Documentation/atomic_t.txt<br/>index 0f1ffa03db09..d7adc6d543db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/atomic_t.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/atomic_t.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/atomic_t.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/atomic_t.txt</a></div><div class='hunk'>@@ -324,7 +324,7 @@ atomic operations.</div><div class='ctx'> </div><div class='ctx'> Specifically 'simple' cmpxchg() loops are expected to not starve one another</div><div class='ctx'> indefinitely. However, this is not evident on LL/SC architectures, because</div><div class='del'>-while an LL/SC architecure 'can/should/must' provide forward progress</div><div class='add'>+while an LL/SC architecture 'can/should/must' provide forward progress</div><div class='ctx'> guarantees between competing LL/SC sections, such a guarantee does not</div><div class='ctx'> transfer to cmpxchg() implemented using LL/SC. Consider:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/block/capability.rst b/Documentation/block/capability.rst<br/>deleted file mode 100644<br/>index 2ae7f064736a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/block/capability.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/block/capability.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-===============================</div><div class='del'>-Generic Block Device Capability</div><div class='del'>-===============================</div><div class='del'>-</div><div class='del'>-This file documents the sysfs file ``block/&lt;disk&gt;/capability``.</div><div class='del'>-</div><div class='del'>-``capability`` is a bitfield, printed in hexadecimal, indicating which</div><div class='del'>-capabilities a specific block device supports:</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: include/linux/blkdev.h</div><div class='head'>diff --git a/Documentation/block/index.rst b/Documentation/block/index.rst<br/>index 68f115f2b1c6..9fea696f9daa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/block/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/block/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/block/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/block/index.rst</a></div><div class='hunk'>@@ -10,7 +10,6 @@ Block</div><div class='ctx'>    bfq-iosched</div><div class='ctx'>    biovecs</div><div class='ctx'>    blk-mq</div><div class='del'>-   capability</div><div class='ctx'>    cmdline-partition</div><div class='ctx'>    data-integrity</div><div class='ctx'>    deadline-iosched</div><div class='hunk'>@@ -19,7 +18,7 @@ Block</div><div class='ctx'>    kyber-iosched</div><div class='ctx'>    null_blk</div><div class='ctx'>    pr</div><div class='del'>-   request</div><div class='ctx'>    stat</div><div class='ctx'>    switching-sched</div><div class='ctx'>    writeback_cache_control</div><div class='add'>+   ublk</div><div class='head'>diff --git a/Documentation/block/inline-encryption.rst b/Documentation/block/inline-encryption.rst<br/>index 4d151fbe2058..90b733422ed4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/block/inline-encryption.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/block/inline-encryption.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/block/inline-encryption.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/block/inline-encryption.rst</a></div><div class='hunk'>@@ -142,7 +142,7 @@ Therefore, we also introduce *blk-crypto-fallback*, which is an implementation</div><div class='ctx'> of inline encryption using the kernel crypto API.  blk-crypto-fallback is built</div><div class='ctx'> into the block layer, so it works on any block device without any special setup.</div><div class='ctx'> Essentially, when a bio with an encryption context is submitted to a</div><div class='del'>-request_queue that doesn't support that encryption context, the block layer will</div><div class='add'>+block_device that doesn't support that encryption context, the block layer will</div><div class='ctx'> handle en/decryption of the bio using blk-crypto-fallback.</div><div class='ctx'> </div><div class='ctx'> For encryption, the data cannot be encrypted in-place, as callers usually rely</div><div class='hunk'>@@ -187,7 +187,7 @@ API presented to users of the block layer</div><div class='ctx'> </div><div class='ctx'> ``blk_crypto_config_supported()`` allows users to check ahead of time whether</div><div class='ctx'> inline encryption with particular crypto settings will work on a particular</div><div class='del'>-request_queue -- either via hardware or via blk-crypto-fallback.  This function</div><div class='add'>+block_device -- either via hardware or via blk-crypto-fallback.  This function</div><div class='ctx'> takes in a ``struct blk_crypto_config`` which is like blk_crypto_key, but omits</div><div class='ctx'> the actual bytes of the key and instead just contains the algorithm, data unit</div><div class='ctx'> size, etc.  This function can be useful if blk-crypto-fallback is disabled.</div><div class='hunk'>@@ -195,7 +195,7 @@ size, etc.  This function can be useful if blk-crypto-fallback is disabled.</div><div class='ctx'> ``blk_crypto_init_key()`` allows users to initialize a blk_crypto_key.</div><div class='ctx'> </div><div class='ctx'> Users must call ``blk_crypto_start_using_key()`` before actually starting to use</div><div class='del'>-a blk_crypto_key on a request_queue (even if ``blk_crypto_config_supported()``</div><div class='add'>+a blk_crypto_key on a block_device (even if ``blk_crypto_config_supported()``</div><div class='ctx'> was called earlier).  This is needed to initialize blk-crypto-fallback if it</div><div class='ctx'> will be needed.  This must not be called from the data path, as this may have to</div><div class='ctx'> allocate resources, which may deadlock in that case.</div><div class='hunk'>@@ -207,7 +207,7 @@ for en/decryption.  Users don't need to worry about freeing the bio_crypt_ctx</div><div class='ctx'> later, as that happens automatically when the bio is freed or reset.</div><div class='ctx'> </div><div class='ctx'> Finally, when done using inline encryption with a blk_crypto_key on a</div><div class='del'>-request_queue, users must call ``blk_crypto_evict_key()``.  This ensures that</div><div class='add'>+block_device, users must call ``blk_crypto_evict_key()``.  This ensures that</div><div class='ctx'> the key is evicted from all keyslots it may be programmed into and unlinked from</div><div class='ctx'> any kernel data structures it may be linked into.</div><div class='ctx'> </div><div class='hunk'>@@ -221,9 +221,9 @@ as follows:</div><div class='ctx'> 5. ``blk_crypto_evict_key()`` (after all I/O has completed)</div><div class='ctx'> 6. Zeroize the blk_crypto_key (this has no dedicated function)</div><div class='ctx'> </div><div class='del'>-If a blk_crypto_key is being used on multiple request_queues, then</div><div class='add'>+If a blk_crypto_key is being used on multiple block_devices, then</div><div class='ctx'> ``blk_crypto_config_supported()`` (if used), ``blk_crypto_start_using_key()``,</div><div class='del'>-and ``blk_crypto_evict_key()`` must be called on each request_queue.</div><div class='add'>+and ``blk_crypto_evict_key()`` must be called on each block_device.</div><div class='ctx'> </div><div class='ctx'> API presented to device drivers</div><div class='ctx'> ===============================</div><div class='hunk'>@@ -270,8 +270,7 @@ Request queue based layered devices like dm-rq that wish to support inline</div><div class='ctx'> encryption need to create their own blk_crypto_profile for their request_queue,</div><div class='ctx'> and expose whatever functionality they choose. When a layered device wants to</div><div class='ctx'> pass a clone of that request to another request_queue, blk-crypto will</div><div class='del'>-initialize and prepare the clone as necessary; see</div><div class='del'>-``blk_crypto_insert_cloned_request()``.</div><div class='add'>+initialize and prepare the clone as necessary.</div><div class='ctx'> </div><div class='ctx'> Interaction between inline encryption and blk integrity</div><div class='ctx'> =======================================================</div><div class='head'>diff --git a/Documentation/block/null_blk.rst b/Documentation/block/null_blk.rst<br/>index edbbab2f12f8..4dd78f24d10a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/block/null_blk.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/block/null_blk.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/block/null_blk.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/block/null_blk.rst</a></div><div class='hunk'>@@ -72,6 +72,28 @@ submit_queues=[1..nr_cpus]: Default: 1</div><div class='ctx'> hw_queue_depth=[0..qdepth]: Default: 64</div><div class='ctx'>   The hardware queue depth of the device.</div><div class='ctx'> </div><div class='add'>+memory_backed=[0/1]: Default: 0</div><div class='add'>+  Whether or not to use a memory buffer to respond to IO requests</div><div class='add'>+</div><div class='add'>+  =  =============================================</div><div class='add'>+  0  Transfer no data in response to IO requests</div><div class='add'>+  1  Use a memory buffer to respond to IO requests</div><div class='add'>+  =  =============================================</div><div class='add'>+</div><div class='add'>+discard=[0/1]: Default: 0</div><div class='add'>+  Support discard operations (requires memory-backed null_blk device).</div><div class='add'>+</div><div class='add'>+  =  =====================================</div><div class='add'>+  0  Do not support discard operations</div><div class='add'>+  1  Enable support for discard operations</div><div class='add'>+  =  =====================================</div><div class='add'>+</div><div class='add'>+cache_size=[Size in MB]: Default: 0</div><div class='add'>+  Cache size in MB for memory-backed device.</div><div class='add'>+</div><div class='add'>+mbps=[Maximum bandwidth in MB/s]: Default: 0 (no limit)</div><div class='add'>+  Bandwidth limit for device performance.</div><div class='add'>+</div><div class='ctx'> Multi-queue specific parameters</div><div class='ctx'> -------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/block/request.rst b/Documentation/block/request.rst<br/>deleted file mode 100644<br/>index 747021e1ffdb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/block/request.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/block/request.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,99 +0,0 @@</div><div class='del'>-============================</div><div class='del'>-struct request documentation</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-Jens Axboe &lt;jens.axboe@oracle.com&gt; 27/05/02</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.. FIXME:</div><div class='del'>-   No idea about what does mean - seems just some noise, so comment it</div><div class='del'>-</div><div class='del'>-   1.0</div><div class='del'>-   Index</div><div class='del'>-</div><div class='del'>-   2.0 Struct request members classification</div><div class='del'>-</div><div class='del'>-       2.1 struct request members explanation</div><div class='del'>-</div><div class='del'>-   3.0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-   2.0</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Short explanation of request members</div><div class='del'>-====================================</div><div class='del'>-</div><div class='del'>-Classification flags:</div><div class='del'>-</div><div class='del'>-	=	====================</div><div class='del'>-	D	driver member</div><div class='del'>-	B	block layer member</div><div class='del'>-	I	I/O scheduler member</div><div class='del'>-	=	====================</div><div class='del'>-</div><div class='del'>-Unless an entry contains a D classification, a device driver must not access</div><div class='del'>-this member. Some members may contain D classifications, but should only be</div><div class='del'>-access through certain macros or functions (eg -&gt;flags).</div><div class='del'>-</div><div class='del'>-&lt;linux/blkdev.h&gt;</div><div class='del'>-</div><div class='del'>-=============================== ======= =======================================</div><div class='del'>-Member				Flag	Comment</div><div class='del'>-=============================== ======= =======================================</div><div class='del'>-struct list_head queuelist	BI	Organization on various internal</div><div class='del'>-					queues</div><div class='del'>-</div><div class='del'>-``void *elevator_private``	I	I/O scheduler private data</div><div class='del'>-</div><div class='del'>-unsigned char cmd[16]		D	Driver can use this for setting up</div><div class='del'>-					a cdb before execution, see</div><div class='del'>-					blk_queue_prep_rq</div><div class='del'>-</div><div class='del'>-unsigned long flags		DBI	Contains info about data direction,</div><div class='del'>-					request type, etc.</div><div class='del'>-</div><div class='del'>-int rq_status			D	Request status bits</div><div class='del'>-</div><div class='del'>-kdev_t rq_dev			DBI	Target device</div><div class='del'>-</div><div class='del'>-int errors			DB	Error counts</div><div class='del'>-</div><div class='del'>-sector_t sector			DBI	Target location</div><div class='del'>-</div><div class='del'>-unsigned long hard_nr_sectors	B	Used to keep sector sane</div><div class='del'>-</div><div class='del'>-unsigned long nr_sectors	DBI	Total number of sectors in request</div><div class='del'>-</div><div class='del'>-unsigned long hard_nr_sectors	B	Used to keep nr_sectors sane</div><div class='del'>-</div><div class='del'>-unsigned short nr_phys_segments	DB	Number of physical scatter gather</div><div class='del'>-					segments in a request</div><div class='del'>-</div><div class='del'>-unsigned short nr_hw_segments	DB	Number of hardware scatter gather</div><div class='del'>-					segments in a request</div><div class='del'>-</div><div class='del'>-unsigned int current_nr_sectors	DB	Number of sectors in first segment</div><div class='del'>-					of request</div><div class='del'>-</div><div class='del'>-unsigned int hard_cur_sectors	B	Used to keep current_nr_sectors sane</div><div class='del'>-</div><div class='del'>-int tag				DB	TCQ tag, if assigned</div><div class='del'>-</div><div class='del'>-``void *special``		D	Free to be used by driver</div><div class='del'>-</div><div class='del'>-``char *buffer``		D	Map of first segment, also see</div><div class='del'>-					section on bouncing SECTION</div><div class='del'>-</div><div class='del'>-``struct completion *waiting``	D	Can be used by driver to get signalled</div><div class='del'>-					on request completion</div><div class='del'>-</div><div class='del'>-``struct bio *bio``		DBI	First bio in request</div><div class='del'>-</div><div class='del'>-``struct bio *biotail``		DBI	Last bio in request</div><div class='del'>-</div><div class='del'>-``struct request_queue *q``	DB	Request queue this request belongs to</div><div class='del'>-</div><div class='del'>-``struct request_list *rl``	B	Request list this request came from</div><div class='del'>-=============================== ======= =======================================</div><div class='head'>diff --git a/Documentation/block/ublk.rst b/Documentation/block/ublk.rst<br/>new file mode 100644<br/>index 000000000000..1713b2890abb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/block/ublk.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/block/ublk.rst</a></div><div class='hunk'>@@ -0,0 +1,326 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===========================================</div><div class='add'>+Userspace block device driver (ublk driver)</div><div class='add'>+===========================================</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+ublk is a generic framework for implementing block device logic from userspace.</div><div class='add'>+The motivation behind it is that moving virtual block drivers into userspace,</div><div class='add'>+such as loop, nbd and similar can be very helpful. It can help to implement</div><div class='add'>+new virtual block device such as ublk-qcow2 (there are several attempts of</div><div class='add'>+implementing qcow2 driver in kernel).</div><div class='add'>+</div><div class='add'>+Userspace block devices are attractive because:</div><div class='add'>+</div><div class='add'>+- They can be written many programming languages.</div><div class='add'>+- They can use libraries that are not available in the kernel.</div><div class='add'>+- They can be debugged with tools familiar to application developers.</div><div class='add'>+- Crashes do not kernel panic the machine.</div><div class='add'>+- Bugs are likely to have a lower security impact than bugs in kernel</div><div class='add'>+  code.</div><div class='add'>+- They can be installed and updated independently of the kernel.</div><div class='add'>+- They can be used to simulate block device easily with user specified</div><div class='add'>+  parameters/setting for test/debug purpose</div><div class='add'>+</div><div class='add'>+ublk block device (``/dev/ublkb*``) is added by ublk driver. Any IO request</div><div class='add'>+on the device will be forwarded to ublk userspace program. For convenience,</div><div class='add'>+in this document, ``ublk server`` refers to generic ublk userspace</div><div class='add'>+program. ``ublksrv`` [#userspace]_ is one of such implementation. It</div><div class='add'>+provides ``libublksrv`` [#userspace_lib]_ library for developing specific</div><div class='add'>+user block device conveniently, while also generic type block device is</div><div class='add'>+included, such as loop and null. Richard W.M. Jones wrote userspace nbd device</div><div class='add'>+``nbdublk`` [#userspace_nbdublk]_  based on ``libublksrv`` [#userspace_lib]_.</div><div class='add'>+</div><div class='add'>+After the IO is handled by userspace, the result is committed back to the</div><div class='add'>+driver, thus completing the request cycle. This way, any specific IO handling</div><div class='add'>+logic is totally done by userspace, such as loop's IO handling, NBD's IO</div><div class='add'>+communication, or qcow2's IO mapping.</div><div class='add'>+</div><div class='add'>+``/dev/ublkb*`` is driven by blk-mq request-based driver. Each request is</div><div class='add'>+assigned by one queue wide unique tag. ublk server assigns unique tag to each</div><div class='add'>+IO too, which is 1:1 mapped with IO of ``/dev/ublkb*``.</div><div class='add'>+</div><div class='add'>+Both the IO request forward and IO handling result committing are done via</div><div class='add'>+``io_uring`` passthrough command; that is why ublk is also one io_uring based</div><div class='add'>+block driver. It has been observed that using io_uring passthrough command can</div><div class='add'>+give better IOPS than block IO; which is why ublk is one of high performance</div><div class='add'>+implementation of userspace block device: not only IO request communication is</div><div class='add'>+done by io_uring, but also the preferred IO handling in ublk server is io_uring</div><div class='add'>+based approach too.</div><div class='add'>+</div><div class='add'>+ublk provides control interface to set/get ublk block device parameters.</div><div class='add'>+The interface is extendable and kabi compatible: basically any ublk request</div><div class='add'>+queue's parameter or ublk generic feature parameters can be set/get via the</div><div class='add'>+interface. Thus, ublk is generic userspace block device framework.</div><div class='add'>+For example, it is easy to setup a ublk device with specified block</div><div class='add'>+parameters from userspace.</div><div class='add'>+</div><div class='add'>+Using ublk</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+ublk requires userspace ublk server to handle real block device logic.</div><div class='add'>+</div><div class='add'>+Below is example of using ``ublksrv`` to provide ublk-based loop device.</div><div class='add'>+</div><div class='add'>+- add a device::</div><div class='add'>+</div><div class='add'>+     ublk add -t loop -f ublk-loop.img</div><div class='add'>+</div><div class='add'>+- format with xfs, then use it::</div><div class='add'>+</div><div class='add'>+     mkfs.xfs /dev/ublkb0</div><div class='add'>+     mount /dev/ublkb0 /mnt</div><div class='add'>+     # do anything. all IOs are handled by io_uring</div><div class='add'>+     ...</div><div class='add'>+     umount /mnt</div><div class='add'>+</div><div class='add'>+- list the devices with their info::</div><div class='add'>+</div><div class='add'>+     ublk list</div><div class='add'>+</div><div class='add'>+- delete the device::</div><div class='add'>+</div><div class='add'>+     ublk del -a</div><div class='add'>+     ublk del -n $ublk_dev_id</div><div class='add'>+</div><div class='add'>+See usage details in README of ``ublksrv`` [#userspace_readme]_.</div><div class='add'>+</div><div class='add'>+Design</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+Control plane</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+ublk driver provides global misc device node (``/dev/ublk-control``) for</div><div class='add'>+managing and controlling ublk devices with help of several control commands:</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_ADD_DEV``</div><div class='add'>+</div><div class='add'>+  Add a ublk char device (``/dev/ublkc*``) which is talked with ublk server</div><div class='add'>+  WRT IO command communication. Basic device info is sent together with this</div><div class='add'>+  command. It sets UAPI structure of ``ublksrv_ctrl_dev_info``,</div><div class='add'>+  such as ``nr_hw_queues``, ``queue_depth``, and max IO request buffer size,</div><div class='add'>+  for which the info is negotiated with the driver and sent back to the server.</div><div class='add'>+  When this command is completed, the basic device info is immutable.</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_SET_PARAMS`` / ``UBLK_CMD_GET_PARAMS``</div><div class='add'>+</div><div class='add'>+  Set or get parameters of the device, which can be either generic feature</div><div class='add'>+  related, or request queue limit related, but can't be IO logic specific,</div><div class='add'>+  because the driver does not handle any IO logic. This command has to be</div><div class='add'>+  sent before sending ``UBLK_CMD_START_DEV``.</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_START_DEV``</div><div class='add'>+</div><div class='add'>+  After the server prepares userspace resources (such as creating per-queue</div><div class='add'>+  pthread &amp; io_uring for handling ublk IO), this command is sent to the</div><div class='add'>+  driver for allocating &amp; exposing ``/dev/ublkb*``. Parameters set via</div><div class='add'>+  ``UBLK_CMD_SET_PARAMS`` are applied for creating the device.</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_STOP_DEV``</div><div class='add'>+</div><div class='add'>+  Halt IO on ``/dev/ublkb*`` and remove the device. When this command returns,</div><div class='add'>+  ublk server will release resources (such as destroying per-queue pthread &amp;</div><div class='add'>+  io_uring).</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_DEL_DEV``</div><div class='add'>+</div><div class='add'>+  Remove ``/dev/ublkc*``. When this command returns, the allocated ublk device</div><div class='add'>+  number can be reused.</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_GET_QUEUE_AFFINITY``</div><div class='add'>+</div><div class='add'>+  When ``/dev/ublkc`` is added, the driver creates block layer tagset, so</div><div class='add'>+  that each queue's affinity info is available. The server sends</div><div class='add'>+  ``UBLK_CMD_GET_QUEUE_AFFINITY`` to retrieve queue affinity info. It can</div><div class='add'>+  set up the per-queue context efficiently, such as bind affine CPUs with IO</div><div class='add'>+  pthread and try to allocate buffers in IO thread context.</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_GET_DEV_INFO``</div><div class='add'>+</div><div class='add'>+  For retrieving device info via ``ublksrv_ctrl_dev_info``. It is the server's</div><div class='add'>+  responsibility to save IO target specific info in userspace.</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_GET_DEV_INFO2``</div><div class='add'>+  Same purpose with ``UBLK_CMD_GET_DEV_INFO``, but ublk server has to</div><div class='add'>+  provide path of the char device of ``/dev/ublkc*`` for kernel to run</div><div class='add'>+  permission check, and this command is added for supporting unprivileged</div><div class='add'>+  ublk device, and introduced with ``UBLK_F_UNPRIVILEGED_DEV`` together.</div><div class='add'>+  Only the user owning the requested device can retrieve the device info.</div><div class='add'>+</div><div class='add'>+  How to deal with userspace/kernel compatibility:</div><div class='add'>+</div><div class='add'>+  1) if kernel is capable of handling ``UBLK_F_UNPRIVILEGED_DEV``</div><div class='add'>+</div><div class='add'>+    If ublk server supports ``UBLK_F_UNPRIVILEGED_DEV``:</div><div class='add'>+</div><div class='add'>+    ublk server should send ``UBLK_CMD_GET_DEV_INFO2``, given anytime</div><div class='add'>+    unprivileged application needs to query devices the current user owns,</div><div class='add'>+    when the application has no idea if ``UBLK_F_UNPRIVILEGED_DEV`` is set</div><div class='add'>+    given the capability info is stateless, and application should always</div><div class='add'>+    retrieve it via ``UBLK_CMD_GET_DEV_INFO2``</div><div class='add'>+</div><div class='add'>+    If ublk server doesn't support ``UBLK_F_UNPRIVILEGED_DEV``:</div><div class='add'>+</div><div class='add'>+    ``UBLK_CMD_GET_DEV_INFO`` is always sent to kernel, and the feature of</div><div class='add'>+    UBLK_F_UNPRIVILEGED_DEV isn't available for user</div><div class='add'>+</div><div class='add'>+  2) if kernel isn't capable of handling ``UBLK_F_UNPRIVILEGED_DEV``</div><div class='add'>+</div><div class='add'>+    If ublk server supports ``UBLK_F_UNPRIVILEGED_DEV``:</div><div class='add'>+</div><div class='add'>+    ``UBLK_CMD_GET_DEV_INFO2`` is tried first, and will be failed, then</div><div class='add'>+    ``UBLK_CMD_GET_DEV_INFO`` needs to be retried given</div><div class='add'>+    ``UBLK_F_UNPRIVILEGED_DEV`` can't be set</div><div class='add'>+</div><div class='add'>+    If ublk server doesn't support ``UBLK_F_UNPRIVILEGED_DEV``:</div><div class='add'>+</div><div class='add'>+    ``UBLK_CMD_GET_DEV_INFO`` is always sent to kernel, and the feature of</div><div class='add'>+    ``UBLK_F_UNPRIVILEGED_DEV`` isn't available for user</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_START_USER_RECOVERY``</div><div class='add'>+</div><div class='add'>+  This command is valid if ``UBLK_F_USER_RECOVERY`` feature is enabled. This</div><div class='add'>+  command is accepted after the old process has exited, ublk device is quiesced</div><div class='add'>+  and ``/dev/ublkc*`` is released. User should send this command before he starts</div><div class='add'>+  a new process which re-opens ``/dev/ublkc*``. When this command returns, the</div><div class='add'>+  ublk device is ready for the new process.</div><div class='add'>+</div><div class='add'>+- ``UBLK_CMD_END_USER_RECOVERY``</div><div class='add'>+</div><div class='add'>+  This command is valid if ``UBLK_F_USER_RECOVERY`` feature is enabled. This</div><div class='add'>+  command is accepted after ublk device is quiesced and a new process has</div><div class='add'>+  opened ``/dev/ublkc*`` and get all ublk queues be ready. When this command</div><div class='add'>+  returns, ublk device is unquiesced and new I/O requests are passed to the</div><div class='add'>+  new process.</div><div class='add'>+</div><div class='add'>+- user recovery feature description</div><div class='add'>+</div><div class='add'>+  Two new features are added for user recovery: ``UBLK_F_USER_RECOVERY`` and</div><div class='add'>+  ``UBLK_F_USER_RECOVERY_REISSUE``.</div><div class='add'>+</div><div class='add'>+  With ``UBLK_F_USER_RECOVERY`` set, after one ubq_daemon(ublk server's io</div><div class='add'>+  handler) is dying, ublk does not delete ``/dev/ublkb*`` during the whole</div><div class='add'>+  recovery stage and ublk device ID is kept. It is ublk server's</div><div class='add'>+  responsibility to recover the device context by its own knowledge.</div><div class='add'>+  Requests which have not been issued to userspace are requeued. Requests</div><div class='add'>+  which have been issued to userspace are aborted.</div><div class='add'>+</div><div class='add'>+  With ``UBLK_F_USER_RECOVERY_REISSUE`` set, after one ubq_daemon(ublk</div><div class='add'>+  server's io handler) is dying, contrary to ``UBLK_F_USER_RECOVERY``,</div><div class='add'>+  requests which have been issued to userspace are requeued and will be</div><div class='add'>+  re-issued to the new process after handling ``UBLK_CMD_END_USER_RECOVERY``.</div><div class='add'>+  ``UBLK_F_USER_RECOVERY_REISSUE`` is designed for backends who tolerate</div><div class='add'>+  double-write since the driver may issue the same I/O request twice. It</div><div class='add'>+  might be useful to a read-only FS or a VM backend.</div><div class='add'>+</div><div class='add'>+Unprivileged ublk device is supported by passing ``UBLK_F_UNPRIVILEGED_DEV``.</div><div class='add'>+Once the flag is set, all control commands can be sent by unprivileged</div><div class='add'>+user. Except for command of ``UBLK_CMD_ADD_DEV``, permission check on</div><div class='add'>+the specified char device(``/dev/ublkc*``) is done for all other control</div><div class='add'>+commands by ublk driver, for doing that, path of the char device has to</div><div class='add'>+be provided in these commands' payload from ublk server. With this way,</div><div class='add'>+ublk device becomes container-ware, and device created in one container</div><div class='add'>+can be controlled/accessed just inside this container.</div><div class='add'>+</div><div class='add'>+Data plane</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+ublk server needs to create per-queue IO pthread &amp; io_uring for handling IO</div><div class='add'>+commands via io_uring passthrough. The per-queue IO pthread</div><div class='add'>+focuses on IO handling and shouldn't handle any control &amp; management</div><div class='add'>+tasks.</div><div class='add'>+</div><div class='add'>+The's IO is assigned by a unique tag, which is 1:1 mapping with IO</div><div class='add'>+request of ``/dev/ublkb*``.</div><div class='add'>+</div><div class='add'>+UAPI structure of ``ublksrv_io_desc`` is defined for describing each IO from</div><div class='add'>+the driver. A fixed mmaped area (array) on ``/dev/ublkc*`` is provided for</div><div class='add'>+exporting IO info to the server; such as IO offset, length, OP/flags and</div><div class='add'>+buffer address. Each ``ublksrv_io_desc`` instance can be indexed via queue id</div><div class='add'>+and IO tag directly.</div><div class='add'>+</div><div class='add'>+The following IO commands are communicated via io_uring passthrough command,</div><div class='add'>+and each command is only for forwarding the IO and committing the result</div><div class='add'>+with specified IO tag in the command data:</div><div class='add'>+</div><div class='add'>+- ``UBLK_IO_FETCH_REQ``</div><div class='add'>+</div><div class='add'>+  Sent from the server IO pthread for fetching future incoming IO requests</div><div class='add'>+  destined to ``/dev/ublkb*``. This command is sent only once from the server</div><div class='add'>+  IO pthread for ublk driver to setup IO forward environment.</div><div class='add'>+</div><div class='add'>+- ``UBLK_IO_COMMIT_AND_FETCH_REQ``</div><div class='add'>+</div><div class='add'>+  When an IO request is destined to ``/dev/ublkb*``, the driver stores</div><div class='add'>+  the IO's ``ublksrv_io_desc`` to the specified mapped area; then the</div><div class='add'>+  previous received IO command of this IO tag (either ``UBLK_IO_FETCH_REQ``</div><div class='add'>+  or ``UBLK_IO_COMMIT_AND_FETCH_REQ)`` is completed, so the server gets</div><div class='add'>+  the IO notification via io_uring.</div><div class='add'>+</div><div class='add'>+  After the server handles the IO, its result is committed back to the</div><div class='add'>+  driver by sending ``UBLK_IO_COMMIT_AND_FETCH_REQ`` back. Once ublkdrv</div><div class='add'>+  received this command, it parses the result and complete the request to</div><div class='add'>+  ``/dev/ublkb*``. In the meantime setup environment for fetching future</div><div class='add'>+  requests with the same IO tag. That is, ``UBLK_IO_COMMIT_AND_FETCH_REQ``</div><div class='add'>+  is reused for both fetching request and committing back IO result.</div><div class='add'>+</div><div class='add'>+- ``UBLK_IO_NEED_GET_DATA``</div><div class='add'>+</div><div class='add'>+  With ``UBLK_F_NEED_GET_DATA`` enabled, the WRITE request will be firstly</div><div class='add'>+  issued to ublk server without data copy. Then, IO backend of ublk server</div><div class='add'>+  receives the request and it can allocate data buffer and embed its addr</div><div class='add'>+  inside this new io command. After the kernel driver gets the command,</div><div class='add'>+  data copy is done from request pages to this backend's buffer. Finally,</div><div class='add'>+  backend receives the request again with data to be written and it can</div><div class='add'>+  truly handle the request.</div><div class='add'>+</div><div class='add'>+  ``UBLK_IO_NEED_GET_DATA`` adds one additional round-trip and one</div><div class='add'>+  io_uring_enter() syscall. Any user thinks that it may lower performance</div><div class='add'>+  should not enable UBLK_F_NEED_GET_DATA. ublk server pre-allocates IO</div><div class='add'>+  buffer for each IO by default. Any new project should try to use this</div><div class='add'>+  buffer to communicate with ublk driver. However, existing project may</div><div class='add'>+  break or not able to consume the new buffer interface; that's why this</div><div class='add'>+  command is added for backwards compatibility so that existing projects</div><div class='add'>+  can still consume existing buffers.</div><div class='add'>+</div><div class='add'>+- data copy between ublk server IO buffer and ublk block IO request</div><div class='add'>+</div><div class='add'>+  The driver needs to copy the block IO request pages into the server buffer</div><div class='add'>+  (pages) first for WRITE before notifying the server of the coming IO, so</div><div class='add'>+  that the server can handle WRITE request.</div><div class='add'>+</div><div class='add'>+  When the server handles READ request and sends</div><div class='add'>+  ``UBLK_IO_COMMIT_AND_FETCH_REQ`` to the server, ublkdrv needs to copy</div><div class='add'>+  the server buffer (pages) read to the IO request pages.</div><div class='add'>+</div><div class='add'>+Future development</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+Zero copy</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+Zero copy is a generic requirement for nbd, fuse or similar drivers. A</div><div class='add'>+problem [#xiaoguang]_ Xiaoguang mentioned is that pages mapped to userspace</div><div class='add'>+can't be remapped any more in kernel with existing mm interfaces. This can</div><div class='add'>+occurs when destining direct IO to ``/dev/ublkb*``. Also, he reported that</div><div class='add'>+big requests (IO size &gt;= 256 KB) may benefit a lot from zero copy.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+.. [#userspace] https://github.com/ming1/ubdsrv</div><div class='add'>+</div><div class='add'>+.. [#userspace_lib] https://github.com/ming1/ubdsrv/tree/master/lib</div><div class='add'>+</div><div class='add'>+.. [#userspace_nbdublk] https://gitlab.com/rwmjones/libnbd/-/tree/nbdublk</div><div class='add'>+</div><div class='add'>+.. [#userspace_readme] https://github.com/ming1/ubdsrv/blob/master/README</div><div class='add'>+</div><div class='add'>+.. [#stefan] https://lore.kernel.org/linux-block/YoOr6jBfgVm8GvWg@stefanha-x1.localdomain/</div><div class='add'>+</div><div class='add'>+.. [#xiaoguang] https://lore.kernel.org/linux-block/YoOr6jBfgVm8GvWg@stefanha-x1.localdomain/</div><div class='head'>diff --git a/Documentation/bpf/bpf_design_QA.rst b/Documentation/bpf/bpf_design_QA.rst<br/>index 437de2a7a5de..38372a956d65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/bpf_design_QA.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/bpf_design_QA.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/bpf_design_QA.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/bpf_design_QA.rst</a></div><div class='hunk'>@@ -208,12 +208,22 @@ data structures and compile with kernel internal headers. Both of these</div><div class='ctx'> kernel internals are subject to change and can break with newer kernels</div><div class='ctx'> such that the program needs to be adapted accordingly.</div><div class='ctx'> </div><div class='add'>+New BPF functionality is generally added through the use of kfuncs instead of</div><div class='add'>+new helpers. Kfuncs are not considered part of the stable API, and have their own</div><div class='add'>+lifecycle expectations as described in :ref:`BPF_kfunc_lifecycle_expectations`.</div><div class='add'>+</div><div class='ctx'> Q: Are tracepoints part of the stable ABI?</div><div class='ctx'> ------------------------------------------</div><div class='ctx'> A: NO. Tracepoints are tied to internal implementation details hence they are</div><div class='ctx'> subject to change and can break with newer kernels. BPF programs need to change</div><div class='ctx'> accordingly when this happens.</div><div class='ctx'> </div><div class='add'>+Q: Are places where kprobes can attach part of the stable ABI?</div><div class='add'>+--------------------------------------------------------------</div><div class='add'>+A: NO. The places to which kprobes can attach are internal implementation</div><div class='add'>+details, which means that they are subject to change and can break with</div><div class='add'>+newer kernels. BPF programs need to change accordingly when this happens.</div><div class='add'>+</div><div class='ctx'> Q: How much stack space a BPF program uses?</div><div class='ctx'> -------------------------------------------</div><div class='ctx'> A: Currently all program types are limited to 512 bytes of stack</div><div class='hunk'>@@ -230,8 +240,8 @@ A: NO. Classic BPF programs are converted into extend BPF instructions.</div><div class='ctx'> </div><div class='ctx'> Q: Can BPF call arbitrary kernel functions?</div><div class='ctx'> -------------------------------------------</div><div class='del'>-A: NO. BPF programs can only call a set of helper functions which</div><div class='del'>-is defined for every program type.</div><div class='add'>+A: NO. BPF programs can only call specific functions exposed as BPF helpers or</div><div class='add'>+kfuncs. The set of available functions is defined for every program type.</div><div class='ctx'> </div><div class='ctx'> Q: Can BPF overwrite arbitrary kernel memory?</div><div class='ctx'> ---------------------------------------------</div><div class='hunk'>@@ -257,7 +267,12 @@ Q: New functionality via kernel modules?</div><div class='ctx'> Q: Can BPF functionality such as new program or map types, new</div><div class='ctx'> helpers, etc be added out of kernel module code?</div><div class='ctx'> </div><div class='del'>-A: NO.</div><div class='add'>+A: Yes, through kfuncs and kptrs</div><div class='add'>+</div><div class='add'>+The core BPF functionality such as program types, maps and helpers cannot be</div><div class='add'>+added to by modules. However, modules can expose functionality to BPF programs</div><div class='add'>+by exporting kfuncs (which may return pointers to module-internal data</div><div class='add'>+structures as kptrs).</div><div class='ctx'> </div><div class='ctx'> Q: Directly calling kernel function is an ABI?</div><div class='ctx'> ----------------------------------------------</div><div class='hunk'>@@ -272,4 +287,70 @@ kernel functions have already been used by other kernel tcp</div><div class='ctx'> cc (congestion-control) implementations.  If any of these kernel</div><div class='ctx'> functions has changed, both the in-tree and out-of-tree kernel tcp cc</div><div class='ctx'> implementations have to be changed.  The same goes for the bpf</div><div class='del'>-programs and they have to be adjusted accordingly.</div><div class='add'>+programs and they have to be adjusted accordingly. See</div><div class='add'>+:ref:`BPF_kfunc_lifecycle_expectations` for details.</div><div class='add'>+</div><div class='add'>+Q: Attaching to arbitrary kernel functions is an ABI?</div><div class='add'>+-----------------------------------------------------</div><div class='add'>+Q: BPF programs can be attached to many kernel functions.  Do these</div><div class='add'>+kernel functions become part of the ABI?</div><div class='add'>+</div><div class='add'>+A: NO.</div><div class='add'>+</div><div class='add'>+The kernel function prototypes will change, and BPF programs attaching to</div><div class='add'>+them will need to change.  The BPF compile-once-run-everywhere (CO-RE)</div><div class='add'>+should be used in order to make it easier to adapt your BPF programs to</div><div class='add'>+different versions of the kernel.</div><div class='add'>+</div><div class='add'>+Q: Marking a function with BTF_ID makes that function an ABI?</div><div class='add'>+-------------------------------------------------------------</div><div class='add'>+A: NO.</div><div class='add'>+</div><div class='add'>+The BTF_ID macro does not cause a function to become part of the ABI</div><div class='add'>+any more than does the EXPORT_SYMBOL_GPL macro.</div><div class='add'>+</div><div class='add'>+Q: What is the compatibility story for special BPF types in map values?</div><div class='add'>+-----------------------------------------------------------------------</div><div class='add'>+Q: Users are allowed to embed bpf_spin_lock, bpf_timer fields in their BPF map</div><div class='add'>+values (when using BTF support for BPF maps). This allows to use helpers for</div><div class='add'>+such objects on these fields inside map values. Users are also allowed to embed</div><div class='add'>+pointers to some kernel types (with __kptr_untrusted and __kptr BTF tags). Will the</div><div class='add'>+kernel preserve backwards compatibility for these features?</div><div class='add'>+</div><div class='add'>+A: It depends. For bpf_spin_lock, bpf_timer: YES, for kptr and everything else:</div><div class='add'>+NO, but see below.</div><div class='add'>+</div><div class='add'>+For struct types that have been added already, like bpf_spin_lock and bpf_timer,</div><div class='add'>+the kernel will preserve backwards compatibility, as they are part of UAPI.</div><div class='add'>+</div><div class='add'>+For kptrs, they are also part of UAPI, but only with respect to the kptr</div><div class='add'>+mechanism. The types that you can use with a __kptr_untrusted and __kptr tagged</div><div class='add'>+pointer in your struct are NOT part of the UAPI contract. The supported types can</div><div class='add'>+and will change across kernel releases. However, operations like accessing kptr</div><div class='add'>+fields and bpf_kptr_xchg() helper will continue to be supported across kernel</div><div class='add'>+releases for the supported types.</div><div class='add'>+</div><div class='add'>+For any other supported struct type, unless explicitly stated in this document</div><div class='add'>+and added to bpf.h UAPI header, such types can and will arbitrarily change their</div><div class='add'>+size, type, and alignment, or any other user visible API or ABI detail across</div><div class='add'>+kernel releases. The users must adapt their BPF programs to the new changes and</div><div class='add'>+update them to make sure their programs continue to work correctly.</div><div class='add'>+</div><div class='add'>+NOTE: BPF subsystem specially reserves the 'bpf\_' prefix for type names, in</div><div class='add'>+order to introduce more special fields in the future. Hence, user programs must</div><div class='add'>+avoid defining types with 'bpf\_' prefix to not be broken in future releases.</div><div class='add'>+In other words, no backwards compatibility is guaranteed if one using a type</div><div class='add'>+in BTF with 'bpf\_' prefix.</div><div class='add'>+</div><div class='add'>+Q: What is the compatibility story for special BPF types in allocated objects?</div><div class='add'>+------------------------------------------------------------------------------</div><div class='add'>+Q: Same as above, but for allocated objects (i.e. objects allocated using</div><div class='add'>+bpf_obj_new for user defined types). Will the kernel preserve backwards</div><div class='add'>+compatibility for these features?</div><div class='add'>+</div><div class='add'>+A: NO.</div><div class='add'>+</div><div class='add'>+Unlike map value types, the API to work with allocated objects and any support</div><div class='add'>+for special fields inside them is exposed through kfuncs, and thus has the same</div><div class='add'>+lifecycle expectations as the kfuncs themselves. See</div><div class='add'>+:ref:`BPF_kfunc_lifecycle_expectations` for details.</div><div class='head'>diff --git a/Documentation/bpf/bpf_devel_QA.rst b/Documentation/bpf/bpf_devel_QA.rst<br/>index 761474bd7fe6..609b71f5747d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/bpf_devel_QA.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/bpf_devel_QA.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/bpf_devel_QA.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/bpf_devel_QA.rst</a></div><div class='hunk'>@@ -7,8 +7,8 @@ workflows related to reporting bugs, submitting patches, and queueing</div><div class='ctx'> patches for stable kernels.</div><div class='ctx'> </div><div class='ctx'> For general information about submitting patches, please refer to</div><div class='del'>-`Documentation/process/`_. This document only describes additional specifics</div><div class='del'>-related to BPF.</div><div class='add'>+Documentation/process/submitting-patches.rst. This document only describes</div><div class='add'>+additional specifics related to BPF.</div><div class='ctx'> </div><div class='ctx'> .. contents::</div><div class='ctx'>     :local:</div><div class='hunk'>@@ -44,6 +44,33 @@ is a guarantee that the reported issue will be overlooked.**</div><div class='ctx'> Submitting patches</div><div class='ctx'> ==================</div><div class='ctx'> </div><div class='add'>+Q: How do I run BPF CI on my changes before sending them out for review?</div><div class='add'>+------------------------------------------------------------------------</div><div class='add'>+A: BPF CI is GitHub based and hosted at https://github.com/kernel-patches/bpf.</div><div class='add'>+While GitHub also provides a CLI that can be used to accomplish the same</div><div class='add'>+results, here we focus on the UI based workflow.</div><div class='add'>+</div><div class='add'>+The following steps lay out how to start a CI run for your patches:</div><div class='add'>+</div><div class='add'>+- Create a fork of the aforementioned repository in your own account (one time</div><div class='add'>+  action)</div><div class='add'>+</div><div class='add'>+- Clone the fork locally, check out a new branch tracking either the bpf-next</div><div class='add'>+  or bpf branch, and apply your to-be-tested patches on top of it</div><div class='add'>+</div><div class='add'>+- Push the local branch to your fork and create a pull request against</div><div class='add'>+  kernel-patches/bpf's bpf-next_base or bpf_base branch, respectively</div><div class='add'>+</div><div class='add'>+Shortly after the pull request has been created, the CI workflow will run. Note</div><div class='add'>+that capacity is shared with patches submitted upstream being checked and so</div><div class='add'>+depending on utilization the run can take a while to finish.</div><div class='add'>+</div><div class='add'>+Note furthermore that both base branches (bpf-next_base and bpf_base) will be</div><div class='add'>+updated as patches are pushed to the respective upstream branches they track. As</div><div class='add'>+such, your patch set will automatically (be attempted to) be rebased as well.</div><div class='add'>+This behavior can result in a CI run being aborted and restarted with the new</div><div class='add'>+base line.</div><div class='add'>+</div><div class='ctx'> Q: To which mailing list do I need to submit my BPF patches?</div><div class='ctx'> ------------------------------------------------------------</div><div class='ctx'> A: Please submit your BPF patches to the bpf kernel mailing list:</div><div class='hunk'>@@ -101,7 +128,8 @@ into the bpf-next tree will make their way into net-next tree. net and</div><div class='ctx'> net-next are both run by David S. Miller. From there, they will go</div><div class='ctx'> into the kernel mainline tree run by Linus Torvalds. To read up on the</div><div class='ctx'> process of net and net-next being merged into the mainline tree, see</div><div class='del'>-the :ref:`netdev-FAQ`</div><div class='add'>+the documentation on netdev subsystem at</div><div class='add'>+Documentation/process/maintainer-netdev.rst.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -120,7 +148,8 @@ request)::</div><div class='ctx'> Q: How do I indicate which tree (bpf vs. bpf-next) my patch should be applied to?</div><div class='ctx'> ---------------------------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-A: The process is the very same as described in the :ref:`netdev-FAQ`,</div><div class='add'>+A: The process is the very same as described in the netdev subsystem</div><div class='add'>+documentation at Documentation/process/maintainer-netdev.rst,</div><div class='ctx'> so please read up on it. The subject line must indicate whether the</div><div class='ctx'> patch is a fix or rather "next-like" content in order to let the</div><div class='ctx'> maintainers know whether it is targeted at bpf or bpf-next.</div><div class='hunk'>@@ -179,8 +208,9 @@ ii) run extensive BPF test suite and</div><div class='ctx'> Once the BPF pull request was accepted by David S. Miller, then</div><div class='ctx'> the patches end up in net or net-next tree, respectively, and</div><div class='ctx'> make their way from there further into mainline. Again, see the</div><div class='del'>-:ref:`netdev-FAQ` for additional information e.g. on how often they are</div><div class='del'>-merged to mainline.</div><div class='add'>+documentation for netdev subsystem at</div><div class='add'>+Documentation/process/maintainer-netdev.rst for additional information</div><div class='add'>+e.g. on how often they are merged to mainline.</div><div class='ctx'> </div><div class='ctx'> Q: How long do I need to wait for feedback on my BPF patches?</div><div class='ctx'> -------------------------------------------------------------</div><div class='hunk'>@@ -203,7 +233,8 @@ Q: Are patches applied to bpf-next when the merge window is open?</div><div class='ctx'> -----------------------------------------------------------------</div><div class='ctx'> A: For the time when the merge window is open, bpf-next will not be</div><div class='ctx'> processed. This is roughly analogous to net-next patch processing,</div><div class='del'>-so feel free to read up on the :ref:`netdev-FAQ` about further details.</div><div class='add'>+so feel free to read up on the netdev docs at</div><div class='add'>+Documentation/process/maintainer-netdev.rst about further details.</div><div class='ctx'> </div><div class='ctx'> During those two weeks of merge window, we might ask you to resend</div><div class='ctx'> your patch series once bpf-next is open again. Once Linus released</div><div class='hunk'>@@ -367,7 +398,8 @@ netdev kernel mailing list in Cc and ask for the fix to be queued up:</div><div class='ctx'>   netdev@vger.kernel.org</div><div class='ctx'> </div><div class='ctx'> The process in general is the same as on netdev itself, see also the</div><div class='del'>-:ref:`netdev-FAQ`.</div><div class='add'>+the documentation on networking subsystem at</div><div class='add'>+Documentation/process/maintainer-netdev.rst.</div><div class='ctx'> </div><div class='ctx'> Q: Do you also backport to kernels not currently maintained as stable?</div><div class='ctx'> ----------------------------------------------------------------------</div><div class='hunk'>@@ -383,7 +415,7 @@ Q: The BPF patch I am about to submit needs to go to stable as well</div><div class='ctx'> What should I do?</div><div class='ctx'> </div><div class='ctx'> A: The same rules apply as with netdev patch submissions in general, see</div><div class='del'>-the :ref:`netdev-FAQ`.</div><div class='add'>+the netdev docs at Documentation/process/maintainer-netdev.rst.</div><div class='ctx'> </div><div class='ctx'> Never add "``Cc: stable@vger.kernel.org``" to the patch description, but</div><div class='ctx'> ask the BPF maintainers to queue the patches instead. This can be done</div><div class='hunk'>@@ -434,15 +466,15 @@ needed::</div><div class='ctx'> </div><div class='ctx'>   $ sudo make run_tests</div><div class='ctx'> </div><div class='del'>-See the kernels selftest `Documentation/dev-tools/kselftest.rst`_</div><div class='del'>-document for further documentation.</div><div class='add'>+See :doc:`kernel selftest documentation &lt;/dev-tools/kselftest&gt;`</div><div class='add'>+for details.</div><div class='ctx'> </div><div class='ctx'> To maximize the number of tests passing, the .config of the kernel</div><div class='ctx'> under test should match the config file fragment in</div><div class='ctx'> tools/testing/selftests/bpf as closely as possible.</div><div class='ctx'> </div><div class='ctx'> Finally to ensure support for latest BPF Type Format features -</div><div class='del'>-discussed in `Documentation/bpf/btf.rst`_ - pahole version 1.16</div><div class='add'>+discussed in Documentation/bpf/btf.rst - pahole version 1.16</div><div class='ctx'> is required for kernels built with CONFIG_DEBUG_INFO_BTF=y.</div><div class='ctx'> pahole is delivered in the dwarves package or can be built</div><div class='ctx'> from source at</div><div class='hunk'>@@ -657,12 +689,7 @@ when:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> .. Links</div><div class='del'>-.. _Documentation/process/: https://www.kernel.org/doc/html/latest/process/</div><div class='del'>-.. _netdev-FAQ: Documentation/process/maintainer-netdev.rst</div><div class='ctx'> .. _selftests:</div><div class='ctx'>    https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/</div><div class='del'>-.. _Documentation/dev-tools/kselftest.rst:</div><div class='del'>-   https://www.kernel.org/doc/html/latest/dev-tools/kselftest.html</div><div class='del'>-.. _Documentation/bpf/btf.rst: btf.rst</div><div class='ctx'> </div><div class='ctx'> Happy BPF hacking!</div><div class='head'>diff --git a/Documentation/bpf/bpf_iterators.rst b/Documentation/bpf/bpf_iterators.rst<br/>new file mode 100644<br/>index 000000000000..6d7770793fab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/bpf_iterators.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/bpf_iterators.rst</a></div><div class='hunk'>@@ -0,0 +1,485 @@</div><div class='add'>+=============</div><div class='add'>+BPF Iterators</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+----------</div><div class='add'>+Motivation</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+There are a few existing ways to dump kernel data into user space. The most</div><div class='add'>+popular one is the ``/proc`` system. For example, ``cat /proc/net/tcp6`` dumps</div><div class='add'>+all tcp6 sockets in the system, and ``cat /proc/net/netlink`` dumps all netlink</div><div class='add'>+sockets in the system. However, their output format tends to be fixed, and if</div><div class='add'>+users want more information about these sockets, they have to patch the kernel,</div><div class='add'>+which often takes time to publish upstream and release. The same is true for popular</div><div class='add'>+tools like `ss &lt;https://man7.org/linux/man-pages/man8/ss.8.html&gt;`_ where any</div><div class='add'>+additional information needs a kernel patch.</div><div class='add'>+</div><div class='add'>+To solve this problem, the `drgn</div><div class='add'>+&lt;https://www.kernel.org/doc/html/latest/bpf/drgn.html&gt;`_ tool is often used to</div><div class='add'>+dig out the kernel data with no kernel change. However, the main drawback for</div><div class='add'>+drgn is performance, as it cannot do pointer tracing inside the kernel. In</div><div class='add'>+addition, drgn cannot validate a pointer value and may read invalid data if the</div><div class='add'>+pointer becomes invalid inside the kernel.</div><div class='add'>+</div><div class='add'>+The BPF iterator solves the above problem by providing flexibility on what data</div><div class='add'>+(e.g., tasks, bpf_maps, etc.) to collect by calling BPF programs for each kernel</div><div class='add'>+data object.</div><div class='add'>+</div><div class='add'>+----------------------</div><div class='add'>+How BPF Iterators Work</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+A BPF iterator is a type of BPF program that allows users to iterate over</div><div class='add'>+specific types of kernel objects. Unlike traditional BPF tracing programs that</div><div class='add'>+allow users to define callbacks that are invoked at particular points of</div><div class='add'>+execution in the kernel, BPF iterators allow users to define callbacks that</div><div class='add'>+should be executed for every entry in a variety of kernel data structures.</div><div class='add'>+</div><div class='add'>+For example, users can define a BPF iterator that iterates over every task on</div><div class='add'>+the system and dumps the total amount of CPU runtime currently used by each of</div><div class='add'>+them. Another BPF task iterator may instead dump the cgroup information for each</div><div class='add'>+task. Such flexibility is the core value of BPF iterators.</div><div class='add'>+</div><div class='add'>+A BPF program is always loaded into the kernel at the behest of a user space</div><div class='add'>+process. A user space process loads a BPF program by opening and initializing</div><div class='add'>+the program skeleton as required and then invoking a syscall to have the BPF</div><div class='add'>+program verified and loaded by the kernel.</div><div class='add'>+</div><div class='add'>+In traditional tracing programs, a program is activated by having user space</div><div class='add'>+obtain a ``bpf_link`` to the program with ``bpf_program__attach()``. Once</div><div class='add'>+activated, the program callback will be invoked whenever the tracepoint is</div><div class='add'>+triggered in the main kernel. For BPF iterator programs, a ``bpf_link`` to the</div><div class='add'>+program is obtained using ``bpf_link_create()``, and the program callback is</div><div class='add'>+invoked by issuing system calls from user space.</div><div class='add'>+</div><div class='add'>+Next, let us see how you can use the iterators to iterate on kernel objects and</div><div class='add'>+read data.</div><div class='add'>+</div><div class='add'>+------------------------</div><div class='add'>+How to Use BPF iterators</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+BPF selftests are a great resource to illustrate how to use the iterators. In</div><div class='add'>+this section, we’ll walk through a BPF selftest which shows how to load and use</div><div class='add'>+a BPF iterator program.   To begin, we’ll look at `bpf_iter.c</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git/tree/tools/testing/selftests/bpf/prog_tests/bpf_iter.c&gt;`_,</div><div class='add'>+which illustrates how to load and trigger BPF iterators on the user space side.</div><div class='add'>+Later, we’ll look at a BPF program that runs in kernel space.</div><div class='add'>+</div><div class='add'>+Loading a BPF iterator in the kernel from user space typically involves the</div><div class='add'>+following steps:</div><div class='add'>+</div><div class='add'>+* The BPF program is loaded into the kernel through ``libbpf``. Once the kernel</div><div class='add'>+  has verified and loaded the program, it returns a file descriptor (fd) to user</div><div class='add'>+  space.</div><div class='add'>+* Obtain a ``link_fd`` to the BPF program by calling the ``bpf_link_create()``</div><div class='add'>+  specified with the BPF program file descriptor received from the kernel.</div><div class='add'>+* Next, obtain a BPF iterator file descriptor (``bpf_iter_fd``) by calling the</div><div class='add'>+  ``bpf_iter_create()`` specified with the ``bpf_link`` received from Step 2.</div><div class='add'>+* Trigger the iteration by calling ``read(bpf_iter_fd)`` until no data is</div><div class='add'>+  available.</div><div class='add'>+* Close the iterator fd using ``close(bpf_iter_fd)``.</div><div class='add'>+* If needed to reread the data, get a new ``bpf_iter_fd`` and do the read again.</div><div class='add'>+</div><div class='add'>+The following are a few examples of selftest BPF iterator programs:</div><div class='add'>+</div><div class='add'>+* `bpf_iter_tcp4.c &lt;https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git/tree/tools/testing/selftests/bpf/progs/bpf_iter_tcp4.c&gt;`_</div><div class='add'>+* `bpf_iter_task_vma.c &lt;https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git/tree/tools/testing/selftests/bpf/progs/bpf_iter_task_vma.c&gt;`_</div><div class='add'>+* `bpf_iter_task_file.c &lt;https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git/tree/tools/testing/selftests/bpf/progs/bpf_iter_task_file.c&gt;`_</div><div class='add'>+</div><div class='add'>+Let us look at ``bpf_iter_task_file.c``, which runs in kernel space:</div><div class='add'>+</div><div class='add'>+Here is the definition of ``bpf_iter__task_file`` in `vmlinux.h</div><div class='add'>+&lt;https://facebookmicrosites.github.io/bpf/blog/2020/02/19/bpf-portability-and-co-re.html#btf&gt;`_.</div><div class='add'>+Any struct name in ``vmlinux.h`` in the format ``bpf_iter__&lt;iter_name&gt;``</div><div class='add'>+represents a BPF iterator. The suffix ``&lt;iter_name&gt;`` represents the type of</div><div class='add'>+iterator.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+    struct bpf_iter__task_file {</div><div class='add'>+            union {</div><div class='add'>+                struct bpf_iter_meta *meta;</div><div class='add'>+            };</div><div class='add'>+            union {</div><div class='add'>+                struct task_struct *task;</div><div class='add'>+            };</div><div class='add'>+            u32 fd;</div><div class='add'>+            union {</div><div class='add'>+                struct file *file;</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+In the above code, the field 'meta' contains the metadata, which is the same for</div><div class='add'>+all BPF iterator programs. The rest of the fields are specific to different</div><div class='add'>+iterators. For example, for task_file iterators, the kernel layer provides the</div><div class='add'>+'task', 'fd' and 'file' field values. The 'task' and 'file' are `reference</div><div class='add'>+counted</div><div class='add'>+&lt;https://facebookmicrosites.github.io/bpf/blog/2018/08/31/object-lifetime.html#file-descriptors-and-reference-counters&gt;`_,</div><div class='add'>+so they won't go away when the BPF program runs.</div><div class='add'>+</div><div class='add'>+Here is a snippet from the  ``bpf_iter_task_file.c`` file:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  SEC("iter/task_file")</div><div class='add'>+  int dump_task_file(struct bpf_iter__task_file *ctx)</div><div class='add'>+  {</div><div class='add'>+    struct seq_file *seq = ctx-&gt;meta-&gt;seq;</div><div class='add'>+    struct task_struct *task = ctx-&gt;task;</div><div class='add'>+    struct file *file = ctx-&gt;file;</div><div class='add'>+    __u32 fd = ctx-&gt;fd;</div><div class='add'>+</div><div class='add'>+    if (task == NULL || file == NULL)</div><div class='add'>+      return 0;</div><div class='add'>+</div><div class='add'>+    if (ctx-&gt;meta-&gt;seq_num == 0) {</div><div class='add'>+      count = 0;</div><div class='add'>+      BPF_SEQ_PRINTF(seq, "    tgid      gid       fd      file\n");</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    if (tgid == task-&gt;tgid &amp;&amp; task-&gt;tgid != task-&gt;pid)</div><div class='add'>+      count++;</div><div class='add'>+</div><div class='add'>+    if (last_tgid != task-&gt;tgid) {</div><div class='add'>+      last_tgid = task-&gt;tgid;</div><div class='add'>+      unique_tgid_count++;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    BPF_SEQ_PRINTF(seq, "%8d %8d %8d %lx\n", task-&gt;tgid, task-&gt;pid, fd,</div><div class='add'>+            (long)file-&gt;f_op);</div><div class='add'>+    return 0;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+In the above example, the section name ``SEC(iter/task_file)``, indicates that</div><div class='add'>+the program is a BPF iterator program to iterate all files from all tasks. The</div><div class='add'>+context of the program is ``bpf_iter__task_file`` struct.</div><div class='add'>+</div><div class='add'>+The user space program invokes the BPF iterator program running in the kernel</div><div class='add'>+by issuing a ``read()`` syscall. Once invoked, the BPF</div><div class='add'>+program can export data to user space using a variety of BPF helper functions.</div><div class='add'>+You can use either ``bpf_seq_printf()`` (and BPF_SEQ_PRINTF helper macro) or</div><div class='add'>+``bpf_seq_write()`` function based on whether you need formatted output or just</div><div class='add'>+binary data, respectively. For binary-encoded data, the user space applications</div><div class='add'>+can process the data from ``bpf_seq_write()`` as needed. For the formatted data,</div><div class='add'>+you can use ``cat &lt;path&gt;`` to print the results similar to ``cat</div><div class='add'>+/proc/net/netlink`` after pinning the BPF iterator to the bpffs mount. Later,</div><div class='add'>+use  ``rm -f &lt;path&gt;`` to remove the pinned iterator.</div><div class='add'>+</div><div class='add'>+For example, you can use the following command to create a BPF iterator from the</div><div class='add'>+``bpf_iter_ipv6_route.o`` object file and pin it to the ``/sys/fs/bpf/my_route``</div><div class='add'>+path:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  $ bpftool iter pin ./bpf_iter_ipv6_route.o  /sys/fs/bpf/my_route</div><div class='add'>+</div><div class='add'>+And then print out the results using the following command:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  $ cat /sys/fs/bpf/my_route</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+-------------------------------------------------------</div><div class='add'>+Implement Kernel Support for BPF Iterator Program Types</div><div class='add'>+-------------------------------------------------------</div><div class='add'>+</div><div class='add'>+To implement a BPF iterator in the kernel, the developer must make a one-time</div><div class='add'>+change to the following key data structure defined in the `bpf.h</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git/tree/include/linux/bpf.h&gt;`_</div><div class='add'>+file.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  struct bpf_iter_reg {</div><div class='add'>+            const char *target;</div><div class='add'>+            bpf_iter_attach_target_t attach_target;</div><div class='add'>+            bpf_iter_detach_target_t detach_target;</div><div class='add'>+            bpf_iter_show_fdinfo_t show_fdinfo;</div><div class='add'>+            bpf_iter_fill_link_info_t fill_link_info;</div><div class='add'>+            bpf_iter_get_func_proto_t get_func_proto;</div><div class='add'>+            u32 ctx_arg_info_size;</div><div class='add'>+            u32 feature;</div><div class='add'>+            struct bpf_ctx_arg_aux ctx_arg_info[BPF_ITER_CTX_ARG_MAX];</div><div class='add'>+            const struct bpf_iter_seq_info *seq_info;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+After filling the data structure fields, call ``bpf_iter_reg_target()`` to</div><div class='add'>+register the iterator to the main BPF iterator subsystem.</div><div class='add'>+</div><div class='add'>+The following is the breakdown for each field in struct ``bpf_iter_reg``.</div><div class='add'>+</div><div class='add'>+.. list-table::</div><div class='add'>+   :widths: 25 50</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - Fields</div><div class='add'>+     - Description</div><div class='add'>+   * - target</div><div class='add'>+     - Specifies the name of the BPF iterator. For example: ``bpf_map``,</div><div class='add'>+       ``bpf_map_elem``. The name should be different from other ``bpf_iter`` target names in the kernel.</div><div class='add'>+   * - attach_target and detach_target</div><div class='add'>+     - Allows for target specific ``link_create`` action since some targets</div><div class='add'>+       may need special processing. Called during the user space link_create stage.</div><div class='add'>+   * - show_fdinfo and fill_link_info</div><div class='add'>+     - Called to fill target specific information when user tries to get link</div><div class='add'>+       info associated with the iterator.</div><div class='add'>+   * - get_func_proto</div><div class='add'>+     - Permits a BPF iterator to access BPF helpers specific to the iterator.</div><div class='add'>+   * - ctx_arg_info_size and ctx_arg_info</div><div class='add'>+     - Specifies the verifier states for BPF program arguments associated with</div><div class='add'>+       the bpf iterator.</div><div class='add'>+   * - feature</div><div class='add'>+     - Specifies certain action requests in the kernel BPF iterator</div><div class='add'>+       infrastructure. Currently, only BPF_ITER_RESCHED is supported. This means</div><div class='add'>+       that the kernel function cond_resched() is called to avoid other kernel</div><div class='add'>+       subsystem (e.g., rcu) misbehaving.</div><div class='add'>+   * - seq_info</div><div class='add'>+     - Specifies certain action requests in the kernel BPF iterator</div><div class='add'>+       infrastructure. Currently, only BPF_ITER_RESCHED is supported. This means</div><div class='add'>+       that the kernel function cond_resched() is called to avoid other kernel</div><div class='add'>+       subsystem (e.g., rcu) misbehaving.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+`Click here</div><div class='add'>+&lt;https://lore.kernel.org/bpf/20210212183107.50963-2-songliubraving@fb.com/&gt;`_</div><div class='add'>+to see an implementation of the ``task_vma`` BPF iterator in the kernel.</div><div class='add'>+</div><div class='add'>+---------------------------------</div><div class='add'>+Parameterizing BPF Task Iterators</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+By default, BPF iterators walk through all the objects of the specified types</div><div class='add'>+(processes, cgroups, maps, etc.) across the entire system to read relevant</div><div class='add'>+kernel data. But often, there are cases where we only care about a much smaller</div><div class='add'>+subset of iterable kernel objects, such as only iterating tasks within a</div><div class='add'>+specific process. Therefore, BPF iterator programs support filtering out objects</div><div class='add'>+from iteration by allowing user space to configure the iterator program when it</div><div class='add'>+is attached.</div><div class='add'>+</div><div class='add'>+--------------------------</div><div class='add'>+BPF Task Iterator Program</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+The following code is a BPF iterator program to print files and task information</div><div class='add'>+through the ``seq_file`` of the iterator. It is a standard BPF iterator program</div><div class='add'>+that visits every file of an iterator. We will use this BPF program in our</div><div class='add'>+example later.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  #include &lt;vmlinux.h&gt;</div><div class='add'>+  #include &lt;bpf/bpf_helpers.h&gt;</div><div class='add'>+</div><div class='add'>+  char _license[] SEC("license") = "GPL";</div><div class='add'>+</div><div class='add'>+  SEC("iter/task_file")</div><div class='add'>+  int dump_task_file(struct bpf_iter__task_file *ctx)</div><div class='add'>+  {</div><div class='add'>+        struct seq_file *seq = ctx-&gt;meta-&gt;seq;</div><div class='add'>+        struct task_struct *task = ctx-&gt;task;</div><div class='add'>+        struct file *file = ctx-&gt;file;</div><div class='add'>+        __u32 fd = ctx-&gt;fd;</div><div class='add'>+        if (task == NULL || file == NULL)</div><div class='add'>+                return 0;</div><div class='add'>+        if (ctx-&gt;meta-&gt;seq_num == 0) {</div><div class='add'>+                BPF_SEQ_PRINTF(seq, "    tgid      pid       fd      file\n");</div><div class='add'>+        }</div><div class='add'>+        BPF_SEQ_PRINTF(seq, "%8d %8d %8d %lx\n", task-&gt;tgid, task-&gt;pid, fd,</div><div class='add'>+                        (long)file-&gt;f_op);</div><div class='add'>+        return 0;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+----------------------------------------</div><div class='add'>+Creating a File Iterator with Parameters</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+Now, let us look at how to create an iterator that includes only files of a</div><div class='add'>+process.</div><div class='add'>+</div><div class='add'>+First,  fill the ``bpf_iter_attach_opts`` struct as shown below:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  LIBBPF_OPTS(bpf_iter_attach_opts, opts);</div><div class='add'>+  union bpf_iter_link_info linfo;</div><div class='add'>+  memset(&amp;linfo, 0, sizeof(linfo));</div><div class='add'>+  linfo.task.pid = getpid();</div><div class='add'>+  opts.link_info = &amp;linfo;</div><div class='add'>+  opts.link_info_len = sizeof(linfo);</div><div class='add'>+</div><div class='add'>+``linfo.task.pid``, if it is non-zero, directs the kernel to create an iterator</div><div class='add'>+that only includes opened files for the process with the specified ``pid``. In</div><div class='add'>+this example, we will only be iterating files for our process. If</div><div class='add'>+``linfo.task.pid`` is zero, the iterator will visit every opened file of every</div><div class='add'>+process. Similarly, ``linfo.task.tid`` directs the kernel to create an iterator</div><div class='add'>+that visits opened files of a specific thread, not a process. In this example,</div><div class='add'>+``linfo.task.tid`` is different from ``linfo.task.pid`` only if the thread has a</div><div class='add'>+separate file descriptor table. In most circumstances, all process threads share</div><div class='add'>+a single file descriptor table.</div><div class='add'>+</div><div class='add'>+Now, in the userspace program, pass the pointer of struct to the</div><div class='add'>+``bpf_program__attach_iter()``.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  link = bpf_program__attach_iter(prog, &amp;opts); iter_fd =</div><div class='add'>+  bpf_iter_create(bpf_link__fd(link));</div><div class='add'>+</div><div class='add'>+If both *tid* and *pid* are zero, an iterator created from this struct</div><div class='add'>+``bpf_iter_attach_opts`` will include every opened file of every task in the</div><div class='add'>+system (in the namespace, actually.) It is the same as passing a NULL as the</div><div class='add'>+second argument to ``bpf_program__attach_iter()``.</div><div class='add'>+</div><div class='add'>+The whole program looks like the following code:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  #include &lt;stdio.h&gt;</div><div class='add'>+  #include &lt;unistd.h&gt;</div><div class='add'>+  #include &lt;bpf/bpf.h&gt;</div><div class='add'>+  #include &lt;bpf/libbpf.h&gt;</div><div class='add'>+  #include "bpf_iter_task_ex.skel.h"</div><div class='add'>+</div><div class='add'>+  static int do_read_opts(struct bpf_program *prog, struct bpf_iter_attach_opts *opts)</div><div class='add'>+  {</div><div class='add'>+        struct bpf_link *link;</div><div class='add'>+        char buf[16] = {};</div><div class='add'>+        int iter_fd = -1, len;</div><div class='add'>+        int ret = 0;</div><div class='add'>+</div><div class='add'>+        link = bpf_program__attach_iter(prog, opts);</div><div class='add'>+        if (!link) {</div><div class='add'>+                fprintf(stderr, "bpf_program__attach_iter() fails\n");</div><div class='add'>+                return -1;</div><div class='add'>+        }</div><div class='add'>+        iter_fd = bpf_iter_create(bpf_link__fd(link));</div><div class='add'>+        if (iter_fd &lt; 0) {</div><div class='add'>+                fprintf(stderr, "bpf_iter_create() fails\n");</div><div class='add'>+                ret = -1;</div><div class='add'>+                goto free_link;</div><div class='add'>+        }</div><div class='add'>+        /* not check contents, but ensure read() ends without error */</div><div class='add'>+        while ((len = read(iter_fd, buf, sizeof(buf) - 1)) &gt; 0) {</div><div class='add'>+                buf[len] = 0;</div><div class='add'>+                printf("%s", buf);</div><div class='add'>+        }</div><div class='add'>+        printf("\n");</div><div class='add'>+  free_link:</div><div class='add'>+        if (iter_fd &gt;= 0)</div><div class='add'>+                close(iter_fd);</div><div class='add'>+        bpf_link__destroy(link);</div><div class='add'>+        return 0;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  static void test_task_file(void)</div><div class='add'>+  {</div><div class='add'>+        LIBBPF_OPTS(bpf_iter_attach_opts, opts);</div><div class='add'>+        struct bpf_iter_task_ex *skel;</div><div class='add'>+        union bpf_iter_link_info linfo;</div><div class='add'>+        skel = bpf_iter_task_ex__open_and_load();</div><div class='add'>+        if (skel == NULL)</div><div class='add'>+                return;</div><div class='add'>+        memset(&amp;linfo, 0, sizeof(linfo));</div><div class='add'>+        linfo.task.pid = getpid();</div><div class='add'>+        opts.link_info = &amp;linfo;</div><div class='add'>+        opts.link_info_len = sizeof(linfo);</div><div class='add'>+        printf("PID %d\n", getpid());</div><div class='add'>+        do_read_opts(skel-&gt;progs.dump_task_file, &amp;opts);</div><div class='add'>+        bpf_iter_task_ex__destroy(skel);</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  int main(int argc, const char * const * argv)</div><div class='add'>+  {</div><div class='add'>+        test_task_file();</div><div class='add'>+        return 0;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+The following lines are the output of the program.</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  PID 1859</div><div class='add'>+</div><div class='add'>+     tgid      pid       fd      file</div><div class='add'>+     1859     1859        0 ffffffff82270aa0</div><div class='add'>+     1859     1859        1 ffffffff82270aa0</div><div class='add'>+     1859     1859        2 ffffffff82270aa0</div><div class='add'>+     1859     1859        3 ffffffff82272980</div><div class='add'>+     1859     1859        4 ffffffff8225e120</div><div class='add'>+     1859     1859        5 ffffffff82255120</div><div class='add'>+     1859     1859        6 ffffffff82254f00</div><div class='add'>+     1859     1859        7 ffffffff82254d80</div><div class='add'>+     1859     1859        8 ffffffff8225abe0</div><div class='add'>+</div><div class='add'>+------------------</div><div class='add'>+Without Parameters</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Let us look at how a BPF iterator without parameters skips files of other</div><div class='add'>+processes in the system. In this case, the BPF program has to check the pid or</div><div class='add'>+the tid of tasks, or it will receive every opened file in the system (in the</div><div class='add'>+current *pid* namespace, actually). So, we usually add a global variable in the</div><div class='add'>+BPF program to pass a *pid* to the BPF program.</div><div class='add'>+</div><div class='add'>+The BPF program would look like the following block.</div><div class='add'>+</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+    ......</div><div class='add'>+    int target_pid = 0;</div><div class='add'>+</div><div class='add'>+    SEC("iter/task_file")</div><div class='add'>+    int dump_task_file(struct bpf_iter__task_file *ctx)</div><div class='add'>+    {</div><div class='add'>+          ......</div><div class='add'>+          if (task-&gt;tgid != target_pid) /* Check task-&gt;pid instead to check thread IDs */</div><div class='add'>+                  return 0;</div><div class='add'>+          BPF_SEQ_PRINTF(seq, "%8d %8d %8d %lx\n", task-&gt;tgid, task-&gt;pid, fd,</div><div class='add'>+                          (long)file-&gt;f_op);</div><div class='add'>+          return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+The user space program would look like the following block:</div><div class='add'>+</div><div class='add'>+  ::</div><div class='add'>+</div><div class='add'>+    ......</div><div class='add'>+    static void test_task_file(void)</div><div class='add'>+    {</div><div class='add'>+          ......</div><div class='add'>+          skel = bpf_iter_task_ex__open_and_load();</div><div class='add'>+          if (skel == NULL)</div><div class='add'>+                  return;</div><div class='add'>+          skel-&gt;bss-&gt;target_pid = getpid(); /* process ID.  For thread id, use gettid() */</div><div class='add'>+          memset(&amp;linfo, 0, sizeof(linfo));</div><div class='add'>+          linfo.task.pid = getpid();</div><div class='add'>+          opts.link_info = &amp;linfo;</div><div class='add'>+          opts.link_info_len = sizeof(linfo);</div><div class='add'>+          ......</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+``target_pid`` is a global variable in the BPF program. The user space program</div><div class='add'>+should initialize the variable with a process ID to skip opened files of other</div><div class='add'>+processes in the BPF program. When you parametrize a BPF iterator, the iterator</div><div class='add'>+calls the BPF program fewer times which can save significant resources.</div><div class='add'>+</div><div class='add'>+---------------------------</div><div class='add'>+Parametrizing VMA Iterators</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+By default, a BPF VMA iterator includes every VMA in every process.  However,</div><div class='add'>+you can still specify a process or a thread to include only its VMAs. Unlike</div><div class='add'>+files, a thread can not have a separate address space (since Linux 2.6.0-test6).</div><div class='add'>+Here, using *tid* makes no difference from using *pid*.</div><div class='add'>+</div><div class='add'>+----------------------------</div><div class='add'>+Parametrizing Task Iterators</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+A BPF task iterator with *pid* includes all tasks (threads) of a process. The</div><div class='add'>+BPF program receives these tasks one after another. You can specify a BPF task</div><div class='add'>+iterator with *tid* parameter to include only the tasks that match the given</div><div class='add'>+*tid*.</div><div class='head'>diff --git a/Documentation/bpf/btf.rst b/Documentation/bpf/btf.rst<br/>index 7940da9bc6c1..7cd7c5415a99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/btf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/btf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/btf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/btf.rst</a></div><div class='hunk'>@@ -74,7 +74,7 @@ sequentially and type id is assigned to each recognized type starting from id</div><div class='ctx'>     #define BTF_KIND_ARRAY          3       /* Array        */</div><div class='ctx'>     #define BTF_KIND_STRUCT         4       /* Struct       */</div><div class='ctx'>     #define BTF_KIND_UNION          5       /* Union        */</div><div class='del'>-    #define BTF_KIND_ENUM           6       /* Enumeration  */</div><div class='add'>+    #define BTF_KIND_ENUM           6       /* Enumeration up to 32-bit values */</div><div class='ctx'>     #define BTF_KIND_FWD            7       /* Forward      */</div><div class='ctx'>     #define BTF_KIND_TYPEDEF        8       /* Typedef      */</div><div class='ctx'>     #define BTF_KIND_VOLATILE       9       /* Volatile     */</div><div class='hunk'>@@ -87,6 +87,7 @@ sequentially and type id is assigned to each recognized type starting from id</div><div class='ctx'>     #define BTF_KIND_FLOAT          16      /* Floating point       */</div><div class='ctx'>     #define BTF_KIND_DECL_TAG       17      /* Decl Tag     */</div><div class='ctx'>     #define BTF_KIND_TYPE_TAG       18      /* Type Tag     */</div><div class='add'>+    #define BTF_KIND_ENUM64         19      /* Enumeration up to 64-bit values */</div><div class='ctx'> </div><div class='ctx'> Note that the type section encodes debug info, not just pure types.</div><div class='ctx'> ``BTF_KIND_FUNC`` is not a type, and it represents a defined subprogram.</div><div class='hunk'>@@ -101,10 +102,10 @@ Each type contains the following common data::</div><div class='ctx'>          * bits 24-28: kind (e.g. int, ptr, array...etc)</div><div class='ctx'>          * bits 29-30: unused</div><div class='ctx'>          * bit     31: kind_flag, currently used by</div><div class='del'>-         *             struct, union and fwd</div><div class='add'>+         *             struct, union, fwd, enum and enum64.</div><div class='ctx'>          */</div><div class='ctx'>         __u32 info;</div><div class='del'>-        /* "size" is used by INT, ENUM, STRUCT and UNION.</div><div class='add'>+        /* "size" is used by INT, ENUM, STRUCT, UNION and ENUM64.</div><div class='ctx'>          * "size" tells the size of the type it is describing.</div><div class='ctx'>          *</div><div class='ctx'>          * "type" is used by PTR, TYPEDEF, VOLATILE, CONST, RESTRICT,</div><div class='hunk'>@@ -281,10 +282,10 @@ modes exist:</div><div class='ctx'> </div><div class='ctx'> ``struct btf_type`` encoding requirement:</div><div class='ctx'>   * ``name_off``: 0 or offset to a valid C identifier</div><div class='del'>-  * ``info.kind_flag``: 0</div><div class='add'>+  * ``info.kind_flag``: 0 for unsigned, 1 for signed</div><div class='ctx'>   * ``info.kind``: BTF_KIND_ENUM</div><div class='ctx'>   * ``info.vlen``: number of enum values</div><div class='del'>-  * ``size``: 4</div><div class='add'>+  * ``size``: 1/2/4/8</div><div class='ctx'> </div><div class='ctx'> ``btf_type`` is followed by ``info.vlen`` number of ``struct btf_enum``.::</div><div class='ctx'> </div><div class='hunk'>@@ -297,6 +298,10 @@ The ``btf_enum`` encoding:</div><div class='ctx'>   * ``name_off``: offset to a valid C identifier</div><div class='ctx'>   * ``val``: any value</div><div class='ctx'> </div><div class='add'>+If the original enum value is signed and the size is less than 4,</div><div class='add'>+that value will be sign extended into 4 bytes. If the size is 8,</div><div class='add'>+the value will be truncated into 4 bytes.</div><div class='add'>+</div><div class='ctx'> 2.2.7 BTF_KIND_FWD</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -364,7 +369,8 @@ No additional type data follow ``btf_type``.</div><div class='ctx'>   * ``name_off``: offset to a valid C identifier</div><div class='ctx'>   * ``info.kind_flag``: 0</div><div class='ctx'>   * ``info.kind``: BTF_KIND_FUNC</div><div class='del'>-  * ``info.vlen``: 0</div><div class='add'>+  * ``info.vlen``: linkage information (BTF_FUNC_STATIC, BTF_FUNC_GLOBAL</div><div class='add'>+                   or BTF_FUNC_EXTERN)</div><div class='ctx'>   * ``type``: a BTF_KIND_FUNC_PROTO type</div><div class='ctx'> </div><div class='ctx'> No additional type data follow ``btf_type``.</div><div class='hunk'>@@ -375,6 +381,9 @@ type. The BTF_KIND_FUNC may in turn be referenced by a func_info in the</div><div class='ctx'> :ref:`BTF_Ext_Section` (ELF) or in the arguments to :ref:`BPF_Prog_Load`</div><div class='ctx'> (ABI).</div><div class='ctx'> </div><div class='add'>+Currently, only linkage values of BTF_FUNC_STATIC and BTF_FUNC_GLOBAL are</div><div class='add'>+supported in the kernel.</div><div class='add'>+</div><div class='ctx'> 2.2.13 BTF_KIND_FUNC_PROTO</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -493,7 +502,7 @@ the attribute is applied to a ``struct``/``union`` member or</div><div class='ctx'> a ``func`` argument, and ``btf_decl_tag.component_idx`` should be a</div><div class='ctx'> valid index (starting from 0) pointing to a member or an argument.</div><div class='ctx'> </div><div class='del'>-2.2.17 BTF_KIND_TYPE_TAG</div><div class='add'>+2.2.18 BTF_KIND_TYPE_TAG</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> ``struct btf_type`` encoding requirement:</div><div class='hunk'>@@ -516,6 +525,32 @@ type_tag, then zero or more const/volatile/restrict/typedef</div><div class='ctx'> and finally the base type. The base type is one of</div><div class='ctx'> int, ptr, array, struct, union, enum, func_proto and float types.</div><div class='ctx'> </div><div class='add'>+2.2.19 BTF_KIND_ENUM64</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+``struct btf_type`` encoding requirement:</div><div class='add'>+  * ``name_off``: 0 or offset to a valid C identifier</div><div class='add'>+  * ``info.kind_flag``: 0 for unsigned, 1 for signed</div><div class='add'>+  * ``info.kind``: BTF_KIND_ENUM64</div><div class='add'>+  * ``info.vlen``: number of enum values</div><div class='add'>+  * ``size``: 1/2/4/8</div><div class='add'>+</div><div class='add'>+``btf_type`` is followed by ``info.vlen`` number of ``struct btf_enum64``.::</div><div class='add'>+</div><div class='add'>+    struct btf_enum64 {</div><div class='add'>+        __u32   name_off;</div><div class='add'>+        __u32   val_lo32;</div><div class='add'>+        __u32   val_hi32;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+The ``btf_enum64`` encoding:</div><div class='add'>+  * ``name_off``: offset to a valid C identifier</div><div class='add'>+  * ``val_lo32``: lower 32-bit value for a 64-bit value</div><div class='add'>+  * ``val_hi32``: high 32-bit value for a 64-bit value</div><div class='add'>+</div><div class='add'>+If the original enum value is signed and the size is less than 8,</div><div class='add'>+that value will be sign extended into 8 bytes.</div><div class='add'>+</div><div class='ctx'> 3. BTF Kernel API</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='hunk'>@@ -1027,4 +1062,9 @@ format.::</div><div class='ctx'> 7. Testing</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='del'>-Kernel bpf selftest `test_btf.c` provides extensive set of BTF-related tests.</div><div class='add'>+The kernel BPF selftest `tools/testing/selftests/bpf/prog_tests/btf.c`_</div><div class='add'>+provides an extensive set of BTF-related tests.</div><div class='add'>+</div><div class='add'>+.. Links</div><div class='add'>+.. _tools/testing/selftests/bpf/prog_tests/btf.c:</div><div class='add'>+   https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/tools/testing/selftests/bpf/prog_tests/btf.c</div><div class='head'>diff --git a/Documentation/bpf/clang-notes.rst b/Documentation/bpf/clang-notes.rst<br/>new file mode 100644<br/>index 000000000000..2c872a1ee08e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/clang-notes.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/clang-notes.rst</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+.. contents::</div><div class='add'>+.. sectnum::</div><div class='add'>+</div><div class='add'>+==========================</div><div class='add'>+Clang implementation notes</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+This document provides more details specific to the Clang/LLVM implementation of the eBPF instruction set.</div><div class='add'>+</div><div class='add'>+Versions</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Clang defined "CPU" versions, where a CPU version of 3 corresponds to the current eBPF ISA.</div><div class='add'>+</div><div class='add'>+Clang can select the eBPF ISA version using ``-mcpu=v3`` for example to select version 3.</div><div class='add'>+</div><div class='add'>+Arithmetic instructions</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+For CPU versions prior to 3, Clang v7.0 and later can enable ``BPF_ALU`` support with</div><div class='add'>+``-Xclang -target-feature -Xclang +alu32``.  In CPU version 3, support is automatically included.</div><div class='add'>+</div><div class='add'>+Jump instructions</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+If ``-O0`` is used, Clang will generate the ``BPF_CALL | BPF_X | BPF_JMP`` (0x8d)</div><div class='add'>+instruction, which is not supported by the Linux kernel verifier.</div><div class='add'>+</div><div class='add'>+Atomic operations</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Clang can generate atomic instructions by default when ``-mcpu=v3`` is</div><div class='add'>+enabled. If a lower version for ``-mcpu`` is set, the only atomic instruction</div><div class='add'>+Clang can generate is ``BPF_ADD`` *without* ``BPF_FETCH``. If you need to enable</div><div class='add'>+the atomics features, while keeping a lower ``-mcpu`` version, you can use</div><div class='add'>+``-Xclang -target-feature -Xclang +alu32``.</div><div class='head'>diff --git a/Documentation/bpf/cpumasks.rst b/Documentation/bpf/cpumasks.rst<br/>new file mode 100644<br/>index 000000000000..41efd8874eeb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/cpumasks.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/cpumasks.rst</a></div><div class='hunk'>@@ -0,0 +1,383 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. _cpumasks-header-label:</div><div class='add'>+</div><div class='add'>+==================</div><div class='add'>+BPF cpumask kfuncs</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+1. Introduction</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+``struct cpumask`` is a bitmap data structure in the kernel whose indices</div><div class='add'>+reflect the CPUs on the system. Commonly, cpumasks are used to track which CPUs</div><div class='add'>+a task is affinitized to, but they can also be used to e.g. track which cores</div><div class='add'>+are associated with a scheduling domain, which cores on a machine are idle,</div><div class='add'>+etc.</div><div class='add'>+</div><div class='add'>+BPF provides programs with a set of :ref:`kfuncs-header-label` that can be</div><div class='add'>+used to allocate, mutate, query, and free cpumasks.</div><div class='add'>+</div><div class='add'>+2. BPF cpumask objects</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+There are two different types of cpumasks that can be used by BPF programs.</div><div class='add'>+</div><div class='add'>+2.1 ``struct bpf_cpumask *``</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+``struct bpf_cpumask *`` is a cpumask that is allocated by BPF, on behalf of a</div><div class='add'>+BPF program, and whose lifecycle is entirely controlled by BPF. These cpumasks</div><div class='add'>+are RCU-protected, can be mutated, can be used as kptrs, and can be safely cast</div><div class='add'>+to a ``struct cpumask *``.</div><div class='add'>+</div><div class='add'>+2.1.1 ``struct bpf_cpumask *`` lifecycle</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+A ``struct bpf_cpumask *`` is allocated, acquired, and released, using the</div><div class='add'>+following functions:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+  :identifiers: bpf_cpumask_create</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+  :identifiers: bpf_cpumask_acquire</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+  :identifiers: bpf_cpumask_release</div><div class='add'>+</div><div class='add'>+For example:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+        struct cpumask_map_value {</div><div class='add'>+                struct bpf_cpumask __kptr * cpumask;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        struct array_map {</div><div class='add'>+                __uint(type, BPF_MAP_TYPE_ARRAY);</div><div class='add'>+                __type(key, int);</div><div class='add'>+                __type(value, struct cpumask_map_value);</div><div class='add'>+                __uint(max_entries, 65536);</div><div class='add'>+        } cpumask_map SEC(".maps");</div><div class='add'>+</div><div class='add'>+        static int cpumask_map_insert(struct bpf_cpumask *mask, u32 pid)</div><div class='add'>+        {</div><div class='add'>+                struct cpumask_map_value local, *v;</div><div class='add'>+                long status;</div><div class='add'>+                struct bpf_cpumask *old;</div><div class='add'>+                u32 key = pid;</div><div class='add'>+</div><div class='add'>+                local.cpumask = NULL;</div><div class='add'>+                status = bpf_map_update_elem(&amp;cpumask_map, &amp;key, &amp;local, 0);</div><div class='add'>+                if (status) {</div><div class='add'>+                        bpf_cpumask_release(mask);</div><div class='add'>+                        return status;</div><div class='add'>+                }</div><div class='add'>+</div><div class='add'>+                v = bpf_map_lookup_elem(&amp;cpumask_map, &amp;key);</div><div class='add'>+                if (!v) {</div><div class='add'>+                        bpf_cpumask_release(mask);</div><div class='add'>+                        return -ENOENT;</div><div class='add'>+                }</div><div class='add'>+</div><div class='add'>+                old = bpf_kptr_xchg(&amp;v-&gt;cpumask, mask);</div><div class='add'>+                if (old)</div><div class='add'>+                        bpf_cpumask_release(old);</div><div class='add'>+</div><div class='add'>+                return 0;</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        /**</div><div class='add'>+         * A sample tracepoint showing how a task's cpumask can be queried and</div><div class='add'>+         * recorded as a kptr.</div><div class='add'>+         */</div><div class='add'>+        SEC("tp_btf/task_newtask")</div><div class='add'>+        int BPF_PROG(record_task_cpumask, struct task_struct *task, u64 clone_flags)</div><div class='add'>+        {</div><div class='add'>+                struct bpf_cpumask *cpumask;</div><div class='add'>+                int ret;</div><div class='add'>+</div><div class='add'>+                cpumask = bpf_cpumask_create();</div><div class='add'>+                if (!cpumask)</div><div class='add'>+                        return -ENOMEM;</div><div class='add'>+</div><div class='add'>+                if (!bpf_cpumask_full(task-&gt;cpus_ptr))</div><div class='add'>+                        bpf_printk("task %s has CPU affinity", task-&gt;comm);</div><div class='add'>+</div><div class='add'>+                bpf_cpumask_copy(cpumask, task-&gt;cpus_ptr);</div><div class='add'>+                return cpumask_map_insert(cpumask, task-&gt;pid);</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+2.1.1 ``struct bpf_cpumask *`` as kptrs</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+As mentioned and illustrated above, these ``struct bpf_cpumask *`` objects can</div><div class='add'>+also be stored in a map and used as kptrs. If a ``struct bpf_cpumask *`` is in</div><div class='add'>+a map, the reference can be removed from the map with bpf_kptr_xchg(), or</div><div class='add'>+opportunistically acquired using RCU:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	/* struct containing the struct bpf_cpumask kptr which is stored in the map. */</div><div class='add'>+	struct cpumasks_kfunc_map_value {</div><div class='add'>+		struct bpf_cpumask __kptr * bpf_cpumask;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	/* The map containing struct cpumasks_kfunc_map_value entries. */</div><div class='add'>+	struct {</div><div class='add'>+		__uint(type, BPF_MAP_TYPE_ARRAY);</div><div class='add'>+		__type(key, int);</div><div class='add'>+		__type(value, struct cpumasks_kfunc_map_value);</div><div class='add'>+		__uint(max_entries, 1);</div><div class='add'>+	} cpumasks_kfunc_map SEC(".maps");</div><div class='add'>+</div><div class='add'>+	/* ... */</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * A simple example tracepoint program showing how a</div><div class='add'>+	 * struct bpf_cpumask * kptr that is stored in a map can</div><div class='add'>+	 * be passed to kfuncs using RCU protection.</div><div class='add'>+	 */</div><div class='add'>+	SEC("tp_btf/cgroup_mkdir")</div><div class='add'>+	int BPF_PROG(cgrp_ancestor_example, struct cgroup *cgrp, const char *path)</div><div class='add'>+	{</div><div class='add'>+		struct bpf_cpumask *kptr;</div><div class='add'>+		struct cpumasks_kfunc_map_value *v;</div><div class='add'>+		u32 key = 0;</div><div class='add'>+</div><div class='add'>+		/* Assume a bpf_cpumask * kptr was previously stored in the map. */</div><div class='add'>+		v = bpf_map_lookup_elem(&amp;cpumasks_kfunc_map, &amp;key);</div><div class='add'>+		if (!v)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		bpf_rcu_read_lock();</div><div class='add'>+		/* Acquire a reference to the bpf_cpumask * kptr that's already stored in the map. */</div><div class='add'>+		kptr = v-&gt;cpumask;</div><div class='add'>+		if (!kptr) {</div><div class='add'>+			/* If no bpf_cpumask was present in the map, it's because</div><div class='add'>+			 * we're racing with another CPU that removed it with</div><div class='add'>+			 * bpf_kptr_xchg() between the bpf_map_lookup_elem()</div><div class='add'>+			 * above, and our load of the pointer from the map.</div><div class='add'>+			 */</div><div class='add'>+			bpf_rcu_read_unlock();</div><div class='add'>+			return -EBUSY;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		bpf_cpumask_setall(kptr);</div><div class='add'>+		bpf_rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+2.2 ``struct cpumask``</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+``struct cpumask`` is the object that actually contains the cpumask bitmap</div><div class='add'>+being queried, mutated, etc. A ``struct bpf_cpumask`` wraps a ``struct</div><div class='add'>+cpumask``, which is why it's safe to cast it as such (note however that it is</div><div class='add'>+**not** safe to cast a ``struct cpumask *`` to a ``struct bpf_cpumask *``, and</div><div class='add'>+the verifier will reject any program that tries to do so).</div><div class='add'>+</div><div class='add'>+As we'll see below, any kfunc that mutates its cpumask argument will take a</div><div class='add'>+``struct bpf_cpumask *`` as that argument. Any argument that simply queries the</div><div class='add'>+cpumask will instead take a ``struct cpumask *``.</div><div class='add'>+</div><div class='add'>+3. cpumask kfuncs</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Above, we described the kfuncs that can be used to allocate, acquire, release,</div><div class='add'>+etc a ``struct bpf_cpumask *``. This section of the document will describe the</div><div class='add'>+kfuncs for mutating and querying cpumasks.</div><div class='add'>+</div><div class='add'>+3.1 Mutating cpumasks</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+Some cpumask kfuncs are "read-only" in that they don't mutate any of their</div><div class='add'>+arguments, whereas others mutate at least one argument (which means that the</div><div class='add'>+argument must be a ``struct bpf_cpumask *``, as described above).</div><div class='add'>+</div><div class='add'>+This section will describe all of the cpumask kfuncs which mutate at least one</div><div class='add'>+argument. :ref:`cpumasks-querying-label` below describes the read-only kfuncs.</div><div class='add'>+</div><div class='add'>+3.1.1 Setting and clearing CPUs</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+bpf_cpumask_set_cpu() and bpf_cpumask_clear_cpu() can be used to set and clear</div><div class='add'>+a CPU in a ``struct bpf_cpumask`` respectively:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_set_cpu bpf_cpumask_clear_cpu</div><div class='add'>+</div><div class='add'>+These kfuncs are pretty straightforward, and can be used, for example, as</div><div class='add'>+follows:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+        /**</div><div class='add'>+         * A sample tracepoint showing how a cpumask can be queried.</div><div class='add'>+         */</div><div class='add'>+        SEC("tp_btf/task_newtask")</div><div class='add'>+        int BPF_PROG(test_set_clear_cpu, struct task_struct *task, u64 clone_flags)</div><div class='add'>+        {</div><div class='add'>+                struct bpf_cpumask *cpumask;</div><div class='add'>+</div><div class='add'>+                cpumask = bpf_cpumask_create();</div><div class='add'>+                if (!cpumask)</div><div class='add'>+                        return -ENOMEM;</div><div class='add'>+</div><div class='add'>+                bpf_cpumask_set_cpu(0, cpumask);</div><div class='add'>+                if (!bpf_cpumask_test_cpu(0, cast(cpumask)))</div><div class='add'>+                        /* Should never happen. */</div><div class='add'>+                        goto release_exit;</div><div class='add'>+</div><div class='add'>+                bpf_cpumask_clear_cpu(0, cpumask);</div><div class='add'>+                if (bpf_cpumask_test_cpu(0, cast(cpumask)))</div><div class='add'>+                        /* Should never happen. */</div><div class='add'>+                        goto release_exit;</div><div class='add'>+</div><div class='add'>+                /* struct cpumask * pointers such as task-&gt;cpus_ptr can also be queried. */</div><div class='add'>+                if (bpf_cpumask_test_cpu(0, task-&gt;cpus_ptr))</div><div class='add'>+                        bpf_printk("task %s can use CPU %d", task-&gt;comm, 0);</div><div class='add'>+</div><div class='add'>+        release_exit:</div><div class='add'>+                bpf_cpumask_release(cpumask);</div><div class='add'>+                return 0;</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+bpf_cpumask_test_and_set_cpu() and bpf_cpumask_test_and_clear_cpu() are</div><div class='add'>+complementary kfuncs that allow callers to atomically test and set (or clear)</div><div class='add'>+CPUs:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_test_and_set_cpu bpf_cpumask_test_and_clear_cpu</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+We can also set and clear entire ``struct bpf_cpumask *`` objects in one</div><div class='add'>+operation using bpf_cpumask_setall() and bpf_cpumask_clear():</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_setall bpf_cpumask_clear</div><div class='add'>+</div><div class='add'>+3.1.2 Operations between cpumasks</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+In addition to setting and clearing individual CPUs in a single cpumask,</div><div class='add'>+callers can also perform bitwise operations between multiple cpumasks using</div><div class='add'>+bpf_cpumask_and(), bpf_cpumask_or(), and bpf_cpumask_xor():</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_and bpf_cpumask_or bpf_cpumask_xor</div><div class='add'>+</div><div class='add'>+The following is an example of how they may be used. Note that some of the</div><div class='add'>+kfuncs shown in this example will be covered in more detail below.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+        /**</div><div class='add'>+         * A sample tracepoint showing how a cpumask can be mutated using</div><div class='add'>+           bitwise operators (and queried).</div><div class='add'>+         */</div><div class='add'>+        SEC("tp_btf/task_newtask")</div><div class='add'>+        int BPF_PROG(test_and_or_xor, struct task_struct *task, u64 clone_flags)</div><div class='add'>+        {</div><div class='add'>+                struct bpf_cpumask *mask1, *mask2, *dst1, *dst2;</div><div class='add'>+</div><div class='add'>+                mask1 = bpf_cpumask_create();</div><div class='add'>+                if (!mask1)</div><div class='add'>+                        return -ENOMEM;</div><div class='add'>+</div><div class='add'>+                mask2 = bpf_cpumask_create();</div><div class='add'>+                if (!mask2) {</div><div class='add'>+                        bpf_cpumask_release(mask1);</div><div class='add'>+                        return -ENOMEM;</div><div class='add'>+                }</div><div class='add'>+</div><div class='add'>+                // ...Safely create the other two masks... */</div><div class='add'>+</div><div class='add'>+                bpf_cpumask_set_cpu(0, mask1);</div><div class='add'>+                bpf_cpumask_set_cpu(1, mask2);</div><div class='add'>+                bpf_cpumask_and(dst1, (const struct cpumask *)mask1, (const struct cpumask *)mask2);</div><div class='add'>+                if (!bpf_cpumask_empty((const struct cpumask *)dst1))</div><div class='add'>+                        /* Should never happen. */</div><div class='add'>+                        goto release_exit;</div><div class='add'>+</div><div class='add'>+                bpf_cpumask_or(dst1, (const struct cpumask *)mask1, (const struct cpumask *)mask2);</div><div class='add'>+                if (!bpf_cpumask_test_cpu(0, (const struct cpumask *)dst1))</div><div class='add'>+                        /* Should never happen. */</div><div class='add'>+                        goto release_exit;</div><div class='add'>+</div><div class='add'>+                if (!bpf_cpumask_test_cpu(1, (const struct cpumask *)dst1))</div><div class='add'>+                        /* Should never happen. */</div><div class='add'>+                        goto release_exit;</div><div class='add'>+</div><div class='add'>+                bpf_cpumask_xor(dst2, (const struct cpumask *)mask1, (const struct cpumask *)mask2);</div><div class='add'>+                if (!bpf_cpumask_equal((const struct cpumask *)dst1,</div><div class='add'>+                                       (const struct cpumask *)dst2))</div><div class='add'>+                        /* Should never happen. */</div><div class='add'>+                        goto release_exit;</div><div class='add'>+</div><div class='add'>+         release_exit:</div><div class='add'>+                bpf_cpumask_release(mask1);</div><div class='add'>+                bpf_cpumask_release(mask2);</div><div class='add'>+                bpf_cpumask_release(dst1);</div><div class='add'>+                bpf_cpumask_release(dst2);</div><div class='add'>+                return 0;</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+The contents of an entire cpumask may be copied to another using</div><div class='add'>+bpf_cpumask_copy():</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_copy</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+.. _cpumasks-querying-label:</div><div class='add'>+</div><div class='add'>+3.2 Querying cpumasks</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+In addition to the above kfuncs, there is also a set of read-only kfuncs that</div><div class='add'>+can be used to query the contents of cpumasks.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_first bpf_cpumask_first_zero bpf_cpumask_test_cpu</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_equal bpf_cpumask_intersects bpf_cpumask_subset</div><div class='add'>+                 bpf_cpumask_empty bpf_cpumask_full</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumask.c</div><div class='add'>+   :identifiers: bpf_cpumask_any bpf_cpumask_any_and</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+Some example usages of these querying kfuncs were shown above. We will not</div><div class='add'>+replicate those exmaples here. Note, however, that all of the aforementioned</div><div class='add'>+kfuncs are tested in `tools/testing/selftests/bpf/progs/cpumask_success.c`_, so</div><div class='add'>+please take a look there if you're looking for more examples of how they can be</div><div class='add'>+used.</div><div class='add'>+</div><div class='add'>+.. _tools/testing/selftests/bpf/progs/cpumask_success.c:</div><div class='add'>+   https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/tools/testing/selftests/bpf/progs/cpumask_success.c</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+4. Adding BPF cpumask kfuncs</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+The set of supported BPF cpumask kfuncs are not (yet) a 1-1 match with the</div><div class='add'>+cpumask operations in include/linux/cpumask.h. Any of those cpumask operations</div><div class='add'>+could easily be encapsulated in a new kfunc if and when required. If you'd like</div><div class='add'>+to support a new cpumask operation, please feel free to submit a patch. If you</div><div class='add'>+do add a new cpumask kfunc, please document it here, and add any relevant</div><div class='add'>+selftest testcases to the cpumask selftest suite.</div><div class='head'>diff --git a/Documentation/bpf/graph_ds_impl.rst b/Documentation/bpf/graph_ds_impl.rst<br/>new file mode 100644<br/>index 000000000000..61274622b71d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/graph_ds_impl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/graph_ds_impl.rst</a></div><div class='hunk'>@@ -0,0 +1,267 @@</div><div class='add'>+=========================</div><div class='add'>+BPF Graph Data Structures</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+This document describes implementation details of new-style "graph" data</div><div class='add'>+structures (linked_list, rbtree), with particular focus on the verifier's</div><div class='add'>+implementation of semantics specific to those data structures.</div><div class='add'>+</div><div class='add'>+Although no specific verifier code is referred to in this document, the document</div><div class='add'>+assumes that the reader has general knowledge of BPF verifier internals, BPF</div><div class='add'>+maps, and BPF program writing.</div><div class='add'>+</div><div class='add'>+Note that the intent of this document is to describe the current state of</div><div class='add'>+these graph data structures. **No guarantees** of stability for either</div><div class='add'>+semantics or APIs are made or implied here.</div><div class='add'>+</div><div class='add'>+.. contents::</div><div class='add'>+    :local:</div><div class='add'>+    :depth: 2</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+The BPF map API has historically been the main way to expose data structures</div><div class='add'>+of various types for use within BPF programs. Some data structures fit naturally</div><div class='add'>+with the map API (HASH, ARRAY), others less so. Consequentially, programs</div><div class='add'>+interacting with the latter group of data structures can be hard to parse</div><div class='add'>+for kernel programmers without previous BPF experience.</div><div class='add'>+</div><div class='add'>+Luckily, some restrictions which necessitated the use of BPF map semantics are</div><div class='add'>+no longer relevant. With the introduction of kfuncs, kptrs, and the any-context</div><div class='add'>+BPF allocator, it is now possible to implement BPF data structures whose API</div><div class='add'>+and semantics more closely match those exposed to the rest of the kernel.</div><div class='add'>+</div><div class='add'>+Two such data structures - linked_list and rbtree - have many verification</div><div class='add'>+details in common. Because both have "root"s ("head" for linked_list) and</div><div class='add'>+"node"s, the verifier code and this document refer to common functionality</div><div class='add'>+as "graph_api", "graph_root", "graph_node", etc.</div><div class='add'>+</div><div class='add'>+Unless otherwise stated, examples and semantics below apply to both graph data</div><div class='add'>+structures.</div><div class='add'>+</div><div class='add'>+Unstable API</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Data structures implemented using the BPF map API have historically used BPF</div><div class='add'>+helper functions - either standard map API helpers like ``bpf_map_update_elem``</div><div class='add'>+or map-specific helpers. The new-style graph data structures instead use kfuncs</div><div class='add'>+to define their manipulation helpers. Because there are no stability guarantees</div><div class='add'>+for kfuncs, the API and semantics for these data structures can be evolved in</div><div class='add'>+a way that breaks backwards compatibility if necessary.</div><div class='add'>+</div><div class='add'>+Root and node types for the new data structures are opaquely defined in the</div><div class='add'>+``uapi/linux/bpf.h`` header.</div><div class='add'>+</div><div class='add'>+Locking</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+The new-style data structures are intrusive and are defined similarly to their</div><div class='add'>+vanilla kernel counterparts:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+        struct node_data {</div><div class='add'>+          long key;</div><div class='add'>+          long data;</div><div class='add'>+          struct bpf_rb_node node;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        struct bpf_spin_lock glock;</div><div class='add'>+        struct bpf_rb_root groot __contains(node_data, node);</div><div class='add'>+</div><div class='add'>+The "root" type for both linked_list and rbtree expects to be in a map_value</div><div class='add'>+which also contains a ``bpf_spin_lock`` - in the above example both global</div><div class='add'>+variables are placed in a single-value arraymap. The verifier considers this</div><div class='add'>+spin_lock to be associated with the ``bpf_rb_root`` by virtue of both being in</div><div class='add'>+the same map_value and will enforce that the correct lock is held when</div><div class='add'>+verifying BPF programs that manipulate the tree. Since this lock checking</div><div class='add'>+happens at verification time, there is no runtime penalty.</div><div class='add'>+</div><div class='add'>+Non-owning references</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+**Motivation**</div><div class='add'>+</div><div class='add'>+Consider the following BPF code:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+        struct node_data *n = bpf_obj_new(typeof(*n)); /* ACQUIRED */</div><div class='add'>+</div><div class='add'>+        bpf_spin_lock(&amp;lock);</div><div class='add'>+</div><div class='add'>+        bpf_rbtree_add(&amp;tree, n); /* PASSED */</div><div class='add'>+</div><div class='add'>+        bpf_spin_unlock(&amp;lock);</div><div class='add'>+</div><div class='add'>+From the verifier's perspective, the pointer ``n`` returned from ``bpf_obj_new``</div><div class='add'>+has type ``PTR_TO_BTF_ID | MEM_ALLOC``, with a ``btf_id`` of</div><div class='add'>+``struct node_data`` and a nonzero ``ref_obj_id``. Because it holds ``n``, the</div><div class='add'>+program has ownership of the pointee's (object pointed to by ``n``) lifetime.</div><div class='add'>+The BPF program must pass off ownership before exiting - either via</div><div class='add'>+``bpf_obj_drop``, which ``free``'s the object, or by adding it to ``tree`` with</div><div class='add'>+``bpf_rbtree_add``.</div><div class='add'>+</div><div class='add'>+(``ACQUIRED`` and ``PASSED`` comments in the example denote statements where</div><div class='add'>+"ownership is acquired" and "ownership is passed", respectively)</div><div class='add'>+</div><div class='add'>+What should the verifier do with ``n`` after ownership is passed off? If the</div><div class='add'>+object was ``free``'d with ``bpf_obj_drop`` the answer is obvious: the verifier</div><div class='add'>+should reject programs which attempt to access ``n`` after ``bpf_obj_drop`` as</div><div class='add'>+the object is no longer valid. The underlying memory may have been reused for</div><div class='add'>+some other allocation, unmapped, etc.</div><div class='add'>+</div><div class='add'>+When ownership is passed to ``tree`` via ``bpf_rbtree_add`` the answer is less</div><div class='add'>+obvious. The verifier could enforce the same semantics as for ``bpf_obj_drop``,</div><div class='add'>+but that would result in programs with useful, common coding patterns being</div><div class='add'>+rejected, e.g.:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+        int x;</div><div class='add'>+        struct node_data *n = bpf_obj_new(typeof(*n)); /* ACQUIRED */</div><div class='add'>+</div><div class='add'>+        bpf_spin_lock(&amp;lock);</div><div class='add'>+</div><div class='add'>+        bpf_rbtree_add(&amp;tree, n); /* PASSED */</div><div class='add'>+        x = n-&gt;data;</div><div class='add'>+        n-&gt;data = 42;</div><div class='add'>+</div><div class='add'>+        bpf_spin_unlock(&amp;lock);</div><div class='add'>+</div><div class='add'>+Both the read from and write to ``n-&gt;data`` would be rejected. The verifier</div><div class='add'>+can do better, though, by taking advantage of two details:</div><div class='add'>+</div><div class='add'>+  * Graph data structure APIs can only be used when the ``bpf_spin_lock``</div><div class='add'>+    associated with the graph root is held</div><div class='add'>+</div><div class='add'>+  * Both graph data structures have pointer stability</div><div class='add'>+</div><div class='add'>+     * Because graph nodes are allocated with ``bpf_obj_new`` and</div><div class='add'>+       adding / removing from the root involves fiddling with the</div><div class='add'>+       ``bpf_{list,rb}_node`` field of the node struct, a graph node will</div><div class='add'>+       remain at the same address after either operation.</div><div class='add'>+</div><div class='add'>+Because the associated ``bpf_spin_lock`` must be held by any program adding</div><div class='add'>+or removing, if we're in the critical section bounded by that lock, we know</div><div class='add'>+that no other program can add or remove until the end of the critical section.</div><div class='add'>+This combined with pointer stability means that, until the critical section</div><div class='add'>+ends, we can safely access the graph node through ``n`` even after it was used</div><div class='add'>+to pass ownership.</div><div class='add'>+</div><div class='add'>+The verifier considers such a reference a *non-owning reference*. The ref</div><div class='add'>+returned by ``bpf_obj_new`` is accordingly considered an *owning reference*.</div><div class='add'>+Both terms currently only have meaning in the context of graph nodes and API.</div><div class='add'>+</div><div class='add'>+**Details**</div><div class='add'>+</div><div class='add'>+Let's enumerate the properties of both types of references.</div><div class='add'>+</div><div class='add'>+*owning reference*</div><div class='add'>+</div><div class='add'>+  * This reference controls the lifetime of the pointee</div><div class='add'>+</div><div class='add'>+  * Ownership of pointee must be 'released' by passing it to some graph API</div><div class='add'>+    kfunc, or via ``bpf_obj_drop``, which ``free``'s the pointee</div><div class='add'>+</div><div class='add'>+    * If not released before program ends, verifier considers program invalid</div><div class='add'>+</div><div class='add'>+  * Access to the pointee's memory will not page fault</div><div class='add'>+</div><div class='add'>+*non-owning reference*</div><div class='add'>+</div><div class='add'>+  * This reference does not own the pointee</div><div class='add'>+</div><div class='add'>+     * It cannot be used to add the graph node to a graph root, nor ``free``'d via</div><div class='add'>+       ``bpf_obj_drop``</div><div class='add'>+</div><div class='add'>+  * No explicit control of lifetime, but can infer valid lifetime based on</div><div class='add'>+    non-owning ref existence (see explanation below)</div><div class='add'>+</div><div class='add'>+  * Access to the pointee's memory will not page fault</div><div class='add'>+</div><div class='add'>+From verifier's perspective non-owning references can only exist</div><div class='add'>+between spin_lock and spin_unlock. Why? After spin_unlock another program</div><div class='add'>+can do arbitrary operations on the data structure like removing and ``free``-ing</div><div class='add'>+via bpf_obj_drop. A non-owning ref to some chunk of memory that was remove'd,</div><div class='add'>+``free``'d, and reused via bpf_obj_new would point to an entirely different thing.</div><div class='add'>+Or the memory could go away.</div><div class='add'>+</div><div class='add'>+To prevent this logic violation all non-owning references are invalidated by the</div><div class='add'>+verifier after a critical section ends. This is necessary to ensure the "will</div><div class='add'>+not page fault" property of non-owning references. So if the verifier hasn't</div><div class='add'>+invalidated a non-owning ref, accessing it will not page fault.</div><div class='add'>+</div><div class='add'>+Currently ``bpf_obj_drop`` is not allowed in the critical section, so</div><div class='add'>+if there's a valid non-owning ref, we must be in a critical section, and can</div><div class='add'>+conclude that the ref's memory hasn't been dropped-and- ``free``'d or</div><div class='add'>+dropped-and-reused.</div><div class='add'>+</div><div class='add'>+Any reference to a node that is in an rbtree _must_ be non-owning, since</div><div class='add'>+the tree has control of the pointee's lifetime. Similarly, any ref to a node</div><div class='add'>+that isn't in rbtree _must_ be owning. This results in a nice property:</div><div class='add'>+graph API add / remove implementations don't need to check if a node</div><div class='add'>+has already been added (or already removed), as the ownership model</div><div class='add'>+allows the verifier to prevent such a state from being valid by simply checking</div><div class='add'>+types.</div><div class='add'>+</div><div class='add'>+However, pointer aliasing poses an issue for the above "nice property".</div><div class='add'>+Consider the following example:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+        struct node_data *n, *m, *o, *p;</div><div class='add'>+        n = bpf_obj_new(typeof(*n));     /* 1 */</div><div class='add'>+</div><div class='add'>+        bpf_spin_lock(&amp;lock);</div><div class='add'>+</div><div class='add'>+        bpf_rbtree_add(&amp;tree, n);        /* 2 */</div><div class='add'>+        m = bpf_rbtree_first(&amp;tree);     /* 3 */</div><div class='add'>+</div><div class='add'>+        o = bpf_rbtree_remove(&amp;tree, n); /* 4 */</div><div class='add'>+        p = bpf_rbtree_remove(&amp;tree, m); /* 5 */</div><div class='add'>+</div><div class='add'>+        bpf_spin_unlock(&amp;lock);</div><div class='add'>+</div><div class='add'>+        bpf_obj_drop(o);</div><div class='add'>+        bpf_obj_drop(p); /* 6 */</div><div class='add'>+</div><div class='add'>+Assume the tree is empty before this program runs. If we track verifier state</div><div class='add'>+changes here using numbers in above comments:</div><div class='add'>+</div><div class='add'>+  1) n is an owning reference</div><div class='add'>+</div><div class='add'>+  2) n is a non-owning reference, it's been added to the tree</div><div class='add'>+</div><div class='add'>+  3) n and m are non-owning references, they both point to the same node</div><div class='add'>+</div><div class='add'>+  4) o is an owning reference, n and m non-owning, all point to same node</div><div class='add'>+</div><div class='add'>+  5) o and p are owning, n and m non-owning, all point to the same node</div><div class='add'>+</div><div class='add'>+  6) a double-free has occurred, since o and p point to same node and o was</div><div class='add'>+     ``free``'d in previous statement</div><div class='add'>+</div><div class='add'>+States 4 and 5 violate our "nice property", as there are non-owning refs to</div><div class='add'>+a node which is not in an rbtree. Statement 5 will try to remove a node which</div><div class='add'>+has already been removed as a result of this violation. State 6 is a dangerous</div><div class='add'>+double-free.</div><div class='add'>+</div><div class='add'>+At a minimum we should prevent state 6 from being possible. If we can't also</div><div class='add'>+prevent state 5 then we must abandon our "nice property" and check whether a</div><div class='add'>+node has already been removed at runtime.</div><div class='add'>+</div><div class='add'>+We prevent both by generalizing the "invalidate non-owning references" behavior</div><div class='add'>+of ``bpf_spin_unlock`` and doing similar invalidation after</div><div class='add'>+``bpf_rbtree_remove``. The logic here being that any graph API kfunc which:</div><div class='add'>+</div><div class='add'>+  * takes an arbitrary node argument</div><div class='add'>+</div><div class='add'>+  * removes it from the data structure</div><div class='add'>+</div><div class='add'>+  * returns an owning reference to the removed node</div><div class='add'>+</div><div class='add'>+May result in a state where some other non-owning reference points to the same</div><div class='add'>+node. So ``remove``-type kfuncs must be considered a non-owning reference</div><div class='add'>+invalidation point as well.</div><div class='head'>diff --git a/Documentation/bpf/index.rst b/Documentation/bpf/index.rst<br/>index 96056a7447c7..dbb39e8f9889 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/index.rst</a></div><div class='hunk'>@@ -19,13 +19,19 @@ that goes into great technical depth about the BPF Architecture.</div><div class='ctx'>    faq</div><div class='ctx'>    syscall_api</div><div class='ctx'>    helpers</div><div class='add'>+   kfuncs</div><div class='add'>+   cpumasks</div><div class='ctx'>    programs</div><div class='ctx'>    maps</div><div class='ctx'>    bpf_prog_run</div><div class='ctx'>    classic_vs_extended.rst</div><div class='add'>+   bpf_iterators</div><div class='ctx'>    bpf_licensing</div><div class='ctx'>    test_debug</div><div class='add'>+   clang-notes</div><div class='add'>+   linux-notes</div><div class='ctx'>    other</div><div class='add'>+   redirect</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/bpf/instruction-set.rst b/Documentation/bpf/instruction-set.rst<br/>index 5300837ac2c9..492980ece1ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/instruction-set.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/instruction-set.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/instruction-set.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/instruction-set.rst</a></div><div class='hunk'>@@ -1,7 +1,18 @@</div><div class='add'>+.. contents::</div><div class='add'>+.. sectnum::</div><div class='ctx'> </div><div class='del'>-====================</div><div class='del'>-eBPF Instruction Set</div><div class='del'>-====================</div><div class='add'>+========================================</div><div class='add'>+eBPF Instruction Set Specification, v1.0</div><div class='add'>+========================================</div><div class='add'>+</div><div class='add'>+This document specifies version 1.0 of the eBPF instruction set.</div><div class='add'>+</div><div class='add'>+Documentation conventions</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+For brevity, this document uses the type notion "u64", "u32", etc.</div><div class='add'>+to mean an unsigned integer whose width is the specified number of bits,</div><div class='add'>+and "s32", etc. to mean a signed integer of the specified number of bits.</div><div class='ctx'> </div><div class='ctx'> Registers and calling convention</div><div class='ctx'> ================================</div><div class='hunk'>@@ -11,10 +22,10 @@ all of which are 64-bits wide.</div><div class='ctx'> </div><div class='ctx'> The eBPF calling convention is defined as:</div><div class='ctx'> </div><div class='del'>- * R0: return value from function calls, and exit value for eBPF programs</div><div class='del'>- * R1 - R5: arguments for function calls</div><div class='del'>- * R6 - R9: callee saved registers that function calls will preserve</div><div class='del'>- * R10: read-only frame pointer to access stack</div><div class='add'>+* R0: return value from function calls, and exit value for eBPF programs</div><div class='add'>+* R1 - R5: arguments for function calls</div><div class='add'>+* R6 - R9: callee saved registers that function calls will preserve</div><div class='add'>+* R10: read-only frame pointer to access stack</div><div class='ctx'> </div><div class='ctx'> R0 - R5 are scratch registers and eBPF programs needs to spill/fill them if</div><div class='ctx'> necessary across calls.</div><div class='hunk'>@@ -24,183 +35,290 @@ Instruction encoding</div><div class='ctx'> </div><div class='ctx'> eBPF has two instruction encodings:</div><div class='ctx'> </div><div class='del'>- * the basic instruction encoding, which uses 64 bits to encode an instruction</div><div class='del'>- * the wide instruction encoding, which appends a second 64-bit immediate value</div><div class='del'>-   (imm64) after the basic instruction for a total of 128 bits.</div><div class='add'>+* the basic instruction encoding, which uses 64 bits to encode an instruction</div><div class='add'>+* the wide instruction encoding, which appends a second 64-bit immediate (i.e.,</div><div class='add'>+  constant) value after the basic instruction for a total of 128 bits.</div><div class='add'>+</div><div class='add'>+The fields conforming an encoded basic instruction are stored in the</div><div class='add'>+following order::</div><div class='add'>+</div><div class='add'>+  opcode:8 src_reg:4 dst_reg:4 offset:16 imm:32 // In little-endian BPF.</div><div class='add'>+  opcode:8 dst_reg:4 src_reg:4 offset:16 imm:32 // In big-endian BPF.</div><div class='ctx'> </div><div class='del'>-The basic instruction encoding looks as follows:</div><div class='add'>+**imm**</div><div class='add'>+  signed integer immediate value</div><div class='ctx'> </div><div class='del'>- =============  =======  ===============  ====================  ============</div><div class='del'>- 32 bits (MSB)  16 bits  4 bits           4 bits                8 bits (LSB)</div><div class='del'>- =============  =======  ===============  ====================  ============</div><div class='del'>- immediate      offset   source register  destination register  opcode</div><div class='del'>- =============  =======  ===============  ====================  ============</div><div class='add'>+**offset**</div><div class='add'>+  signed integer offset used with pointer arithmetic</div><div class='add'>+</div><div class='add'>+**src_reg**</div><div class='add'>+  the source register number (0-10), except where otherwise specified</div><div class='add'>+  (`64-bit immediate instructions`_ reuse this field for other purposes)</div><div class='add'>+</div><div class='add'>+**dst_reg**</div><div class='add'>+  destination register number (0-10)</div><div class='add'>+</div><div class='add'>+**opcode**</div><div class='add'>+  operation to perform</div><div class='add'>+</div><div class='add'>+Note that the contents of multi-byte fields ('imm' and 'offset') are</div><div class='add'>+stored using big-endian byte ordering in big-endian BPF and</div><div class='add'>+little-endian byte ordering in little-endian BPF.</div><div class='add'>+</div><div class='add'>+For example::</div><div class='add'>+</div><div class='add'>+  opcode                  offset imm          assembly</div><div class='add'>+         src_reg dst_reg</div><div class='add'>+  07     0       1        00 00  44 33 22 11  r1 += 0x11223344 // little</div><div class='add'>+         dst_reg src_reg</div><div class='add'>+  07     1       0        00 00  11 22 33 44  r1 += 0x11223344 // big</div><div class='ctx'> </div><div class='ctx'> Note that most instructions do not use all of the fields.</div><div class='ctx'> Unused fields shall be cleared to zero.</div><div class='ctx'> </div><div class='add'>+As discussed below in `64-bit immediate instructions`_, a 64-bit immediate</div><div class='add'>+instruction uses a 64-bit immediate value that is constructed as follows.</div><div class='add'>+The 64 bits following the basic instruction contain a pseudo instruction</div><div class='add'>+using the same format but with opcode, dst_reg, src_reg, and offset all set to zero,</div><div class='add'>+and imm containing the high 32 bits of the immediate value.</div><div class='add'>+</div><div class='add'>+This is depicted in the following figure::</div><div class='add'>+</div><div class='add'>+        basic_instruction</div><div class='add'>+  .-----------------------------.</div><div class='add'>+  |                             |</div><div class='add'>+  code:8 regs:8 offset:16 imm:32 unused:32 imm:32</div><div class='add'>+                                 |              |</div><div class='add'>+                                 '--------------'</div><div class='add'>+                                pseudo instruction</div><div class='add'>+</div><div class='add'>+Thus the 64-bit immediate value is constructed as follows:</div><div class='add'>+</div><div class='add'>+  imm64 = (next_imm &lt;&lt; 32) | imm</div><div class='add'>+</div><div class='add'>+where 'next_imm' refers to the imm value of the pseudo instruction</div><div class='add'>+following the basic instruction.  The unused bytes in the pseudo</div><div class='add'>+instruction are reserved and shall be cleared to zero.</div><div class='add'>+</div><div class='ctx'> Instruction classes</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='ctx'> The three LSB bits of the 'opcode' field store the instruction class:</div><div class='ctx'> </div><div class='del'>-  =========  =====  ===============================</div><div class='del'>-  class      value  description</div><div class='del'>-  =========  =====  ===============================</div><div class='del'>-  BPF_LD     0x00   non-standard load operations</div><div class='del'>-  BPF_LDX    0x01   load into register operations</div><div class='del'>-  BPF_ST     0x02   store from immediate operations</div><div class='del'>-  BPF_STX    0x03   store from register operations</div><div class='del'>-  BPF_ALU    0x04   32-bit arithmetic operations</div><div class='del'>-  BPF_JMP    0x05   64-bit jump operations</div><div class='del'>-  BPF_JMP32  0x06   32-bit jump operations</div><div class='del'>-  BPF_ALU64  0x07   64-bit arithmetic operations</div><div class='del'>-  =========  =====  ===============================</div><div class='add'>+=========  =====  ===============================  ===================================</div><div class='add'>+class      value  description                      reference</div><div class='add'>+=========  =====  ===============================  ===================================</div><div class='add'>+BPF_LD     0x00   non-standard load operations     `Load and store instructions`_</div><div class='add'>+BPF_LDX    0x01   load into register operations    `Load and store instructions`_</div><div class='add'>+BPF_ST     0x02   store from immediate operations  `Load and store instructions`_</div><div class='add'>+BPF_STX    0x03   store from register operations   `Load and store instructions`_</div><div class='add'>+BPF_ALU    0x04   32-bit arithmetic operations     `Arithmetic and jump instructions`_</div><div class='add'>+BPF_JMP    0x05   64-bit jump operations           `Arithmetic and jump instructions`_</div><div class='add'>+BPF_JMP32  0x06   32-bit jump operations           `Arithmetic and jump instructions`_</div><div class='add'>+BPF_ALU64  0x07   64-bit arithmetic operations     `Arithmetic and jump instructions`_</div><div class='add'>+=========  =====  ===============================  ===================================</div><div class='ctx'> </div><div class='ctx'> Arithmetic and jump instructions</div><div class='ctx'> ================================</div><div class='ctx'> </div><div class='del'>-For arithmetic and jump instructions (BPF_ALU, BPF_ALU64, BPF_JMP and</div><div class='del'>-BPF_JMP32), the 8-bit 'opcode' field is divided into three parts:</div><div class='add'>+For arithmetic and jump instructions (``BPF_ALU``, ``BPF_ALU64``, ``BPF_JMP`` and</div><div class='add'>+``BPF_JMP32``), the 8-bit 'opcode' field is divided into three parts:</div><div class='ctx'> </div><div class='del'>-  ==============  ======  =================</div><div class='del'>-  4 bits (MSB)    1 bit   3 bits (LSB)</div><div class='del'>-  ==============  ======  =================</div><div class='del'>-  operation code  source  instruction class</div><div class='del'>-  ==============  ======  =================</div><div class='add'>+==============  ======  =================</div><div class='add'>+4 bits (MSB)    1 bit   3 bits (LSB)</div><div class='add'>+==============  ======  =================</div><div class='add'>+code            source  instruction class</div><div class='add'>+==============  ======  =================</div><div class='ctx'> </div><div class='del'>-The 4th bit encodes the source operand:</div><div class='add'>+**code**</div><div class='add'>+  the operation code, whose meaning varies by instruction class</div><div class='ctx'> </div><div class='del'>-  ======  =====  ========================================</div><div class='del'>-  source  value  description</div><div class='del'>-  ======  =====  ========================================</div><div class='del'>-  BPF_K   0x00   use 32-bit immediate as source operand</div><div class='del'>-  BPF_X   0x08   use 'src_reg' register as source operand</div><div class='del'>-  ======  =====  ========================================</div><div class='add'>+**source**</div><div class='add'>+  the source operand location, which unless otherwise specified is one of:</div><div class='ctx'> </div><div class='del'>-The four MSB bits store the operation code.</div><div class='add'>+  ======  =====  ==============================================</div><div class='add'>+  source  value  description</div><div class='add'>+  ======  =====  ==============================================</div><div class='add'>+  BPF_K   0x00   use 32-bit 'imm' value as source operand</div><div class='add'>+  BPF_X   0x08   use 'src_reg' register value as source operand</div><div class='add'>+  ======  =====  ==============================================</div><div class='ctx'> </div><div class='add'>+**instruction class**</div><div class='add'>+  the instruction class (see `Instruction classes`_)</div><div class='ctx'> </div><div class='ctx'> Arithmetic instructions</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='del'>-BPF_ALU uses 32-bit wide operands while BPF_ALU64 uses 64-bit wide operands for</div><div class='add'>+``BPF_ALU`` uses 32-bit wide operands while ``BPF_ALU64`` uses 64-bit wide operands for</div><div class='ctx'> otherwise identical operations.</div><div class='del'>-The code field encodes the operation as below:</div><div class='add'>+The 'code' field encodes the operation as below, where 'src' and 'dst' refer</div><div class='add'>+to the values of the source and destination registers, respectively.</div><div class='ctx'> </div><div class='del'>-  ========  =====  =================================================</div><div class='del'>-  code      value  description</div><div class='del'>-  ========  =====  =================================================</div><div class='del'>-  BPF_ADD   0x00   dst += src</div><div class='del'>-  BPF_SUB   0x10   dst -= src</div><div class='del'>-  BPF_MUL   0x20   dst \*= src</div><div class='del'>-  BPF_DIV   0x30   dst /= src</div><div class='del'>-  BPF_OR    0x40   dst \|= src</div><div class='del'>-  BPF_AND   0x50   dst &amp;= src</div><div class='del'>-  BPF_LSH   0x60   dst &lt;&lt;= src</div><div class='del'>-  BPF_RSH   0x70   dst &gt;&gt;= src</div><div class='del'>-  BPF_NEG   0x80   dst = ~src</div><div class='del'>-  BPF_MOD   0x90   dst %= src</div><div class='del'>-  BPF_XOR   0xa0   dst ^= src</div><div class='del'>-  BPF_MOV   0xb0   dst = src</div><div class='del'>-  BPF_ARSH  0xc0   sign extending shift right</div><div class='del'>-  BPF_END   0xd0   byte swap operations (see separate section below)</div><div class='del'>-  ========  =====  =================================================</div><div class='add'>+========  =====  ==========================================================</div><div class='add'>+code      value  description</div><div class='add'>+========  =====  ==========================================================</div><div class='add'>+BPF_ADD   0x00   dst += src</div><div class='add'>+BPF_SUB   0x10   dst -= src</div><div class='add'>+BPF_MUL   0x20   dst \*= src</div><div class='add'>+BPF_DIV   0x30   dst = (src != 0) ? (dst / src) : 0</div><div class='add'>+BPF_OR    0x40   dst \|= src</div><div class='add'>+BPF_AND   0x50   dst &amp;= src</div><div class='add'>+BPF_LSH   0x60   dst &lt;&lt;= src</div><div class='add'>+BPF_RSH   0x70   dst &gt;&gt;= src</div><div class='add'>+BPF_NEG   0x80   dst = ~src</div><div class='add'>+BPF_MOD   0x90   dst = (src != 0) ? (dst % src) : dst</div><div class='add'>+BPF_XOR   0xa0   dst ^= src</div><div class='add'>+BPF_MOV   0xb0   dst = src</div><div class='add'>+BPF_ARSH  0xc0   sign extending shift right</div><div class='add'>+BPF_END   0xd0   byte swap operations (see `Byte swap instructions`_ below)</div><div class='add'>+========  =====  ==========================================================</div><div class='ctx'> </div><div class='del'>-BPF_ADD | BPF_X | BPF_ALU means::</div><div class='add'>+Underflow and overflow are allowed during arithmetic operations, meaning</div><div class='add'>+the 64-bit or 32-bit value will wrap. If eBPF program execution would</div><div class='add'>+result in division by zero, the destination register is instead set to zero.</div><div class='add'>+If execution would result in modulo by zero, for ``BPF_ALU64`` the value of</div><div class='add'>+the destination register is unchanged whereas for ``BPF_ALU`` the upper</div><div class='add'>+32 bits of the destination register are zeroed.</div><div class='ctx'> </div><div class='del'>-  dst_reg = (u32) dst_reg + (u32) src_reg;</div><div class='add'>+``BPF_ADD | BPF_X | BPF_ALU`` means::</div><div class='ctx'> </div><div class='del'>-BPF_ADD | BPF_X | BPF_ALU64 means::</div><div class='add'>+  dst = (u32) ((u32) dst + (u32) src)</div><div class='ctx'> </div><div class='del'>-  dst_reg = dst_reg + src_reg</div><div class='add'>+where '(u32)' indicates that the upper 32 bits are zeroed.</div><div class='ctx'> </div><div class='del'>-BPF_XOR | BPF_K | BPF_ALU means::</div><div class='add'>+``BPF_ADD | BPF_X | BPF_ALU64`` means::</div><div class='ctx'> </div><div class='del'>-  src_reg = (u32) src_reg ^ (u32) imm32</div><div class='add'>+  dst = dst + src</div><div class='ctx'> </div><div class='del'>-BPF_XOR | BPF_K | BPF_ALU64 means::</div><div class='add'>+``BPF_XOR | BPF_K | BPF_ALU`` means::</div><div class='ctx'> </div><div class='del'>-  src_reg = src_reg ^ imm32</div><div class='add'>+  dst = (u32) dst ^ (u32) imm32</div><div class='ctx'> </div><div class='add'>+``BPF_XOR | BPF_K | BPF_ALU64`` means::</div><div class='add'>+</div><div class='add'>+  dst = dst ^ imm32</div><div class='add'>+</div><div class='add'>+Also note that the division and modulo operations are unsigned. Thus, for</div><div class='add'>+``BPF_ALU``, 'imm' is first interpreted as an unsigned 32-bit value, whereas</div><div class='add'>+for ``BPF_ALU64``, 'imm' is first sign extended to 64 bits and the result</div><div class='add'>+interpreted as an unsigned 64-bit value. There are no instructions for</div><div class='add'>+signed division or modulo.</div><div class='ctx'> </div><div class='ctx'> Byte swap instructions</div><div class='del'>-----------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-The byte swap instructions use an instruction class of ``BFP_ALU`` and a 4-bit</div><div class='del'>-code field of ``BPF_END``.</div><div class='add'>+The byte swap instructions use an instruction class of ``BPF_ALU`` and a 4-bit</div><div class='add'>+'code' field of ``BPF_END``.</div><div class='ctx'> </div><div class='del'>-The byte swap instructions instructions operate on the destination register</div><div class='add'>+The byte swap instructions operate on the destination register</div><div class='ctx'> only and do not use a separate source register or immediate value.</div><div class='ctx'> </div><div class='del'>-The 1-bit source operand field in the opcode is used to to select what byte</div><div class='add'>+The 1-bit source operand field in the opcode is used to select what byte</div><div class='ctx'> order the operation convert from or to:</div><div class='ctx'> </div><div class='del'>-  =========  =====  =================================================</div><div class='del'>-  source     value  description</div><div class='del'>-  =========  =====  =================================================</div><div class='del'>-  BPF_TO_LE  0x00   convert between host byte order and little endian</div><div class='del'>-  BPF_TO_BE  0x08   convert between host byte order and big endian</div><div class='del'>-  =========  =====  =================================================</div><div class='add'>+=========  =====  =================================================</div><div class='add'>+source     value  description</div><div class='add'>+=========  =====  =================================================</div><div class='add'>+BPF_TO_LE  0x00   convert between host byte order and little endian</div><div class='add'>+BPF_TO_BE  0x08   convert between host byte order and big endian</div><div class='add'>+=========  =====  =================================================</div><div class='ctx'> </div><div class='del'>-The imm field encodes the width of the swap operations.  The following widths</div><div class='add'>+The 'imm' field encodes the width of the swap operations.  The following widths</div><div class='ctx'> are supported: 16, 32 and 64.</div><div class='ctx'> </div><div class='ctx'> Examples:</div><div class='ctx'> </div><div class='ctx'> ``BPF_ALU | BPF_TO_LE | BPF_END`` with imm = 16 means::</div><div class='ctx'> </div><div class='del'>-  dst_reg = htole16(dst_reg)</div><div class='add'>+  dst = htole16(dst)</div><div class='ctx'> </div><div class='ctx'> ``BPF_ALU | BPF_TO_BE | BPF_END`` with imm = 64 means::</div><div class='ctx'> </div><div class='del'>-  dst_reg = htobe64(dst_reg)</div><div class='del'>-</div><div class='del'>-``BPF_FROM_LE`` and ``BPF_FROM_BE`` exist as aliases for ``BPF_TO_LE`` and</div><div class='del'>-``BPF_TO_LE`` respetively.</div><div class='del'>-</div><div class='add'>+  dst = htobe64(dst)</div><div class='ctx'> </div><div class='ctx'> Jump instructions</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='del'>-BPF_JMP32 uses 32-bit wide operands while BPF_JMP uses 64-bit wide operands for</div><div class='add'>+``BPF_JMP32`` uses 32-bit wide operands while ``BPF_JMP`` uses 64-bit wide operands for</div><div class='ctx'> otherwise identical operations.</div><div class='del'>-The code field encodes the operation as below:</div><div class='del'>-</div><div class='del'>-  ========  =====  =========================  ============</div><div class='del'>-  code      value  description                notes</div><div class='del'>-  ========  =====  =========================  ============</div><div class='del'>-  BPF_JA    0x00   PC += off                  BPF_JMP only</div><div class='del'>-  BPF_JEQ   0x10   PC += off if dst == src</div><div class='del'>-  BPF_JGT   0x20   PC += off if dst &gt; src     unsigned</div><div class='del'>-  BPF_JGE   0x30   PC += off if dst &gt;= src    unsigned</div><div class='del'>-  BPF_JSET  0x40   PC += off if dst &amp; src</div><div class='del'>-  BPF_JNE   0x50   PC += off if dst != src</div><div class='del'>-  BPF_JSGT  0x60   PC += off if dst &gt; src     signed</div><div class='del'>-  BPF_JSGE  0x70   PC += off if dst &gt;= src    signed</div><div class='del'>-  BPF_CALL  0x80   function call</div><div class='del'>-  BPF_EXIT  0x90   function / program return  BPF_JMP only</div><div class='del'>-  BPF_JLT   0xa0   PC += off if dst &lt; src     unsigned</div><div class='del'>-  BPF_JLE   0xb0   PC += off if dst &lt;= src    unsigned</div><div class='del'>-  BPF_JSLT  0xc0   PC += off if dst &lt; src     signed</div><div class='del'>-  BPF_JSLE  0xd0   PC += off if dst &lt;= src    signed</div><div class='del'>-  ========  =====  =========================  ============</div><div class='add'>+The 'code' field encodes the operation as below:</div><div class='add'>+</div><div class='add'>+========  =====  ===  ===========================================  =========================================</div><div class='add'>+code      value  src  description                                  notes</div><div class='add'>+========  =====  ===  ===========================================  =========================================</div><div class='add'>+BPF_JA    0x0    0x0  PC += offset                                 BPF_JMP only</div><div class='add'>+BPF_JEQ   0x1    any  PC += offset if dst == src</div><div class='add'>+BPF_JGT   0x2    any  PC += offset if dst &gt; src                    unsigned</div><div class='add'>+BPF_JGE   0x3    any  PC += offset if dst &gt;= src                   unsigned</div><div class='add'>+BPF_JSET  0x4    any  PC += offset if dst &amp; src</div><div class='add'>+BPF_JNE   0x5    any  PC += offset if dst != src</div><div class='add'>+BPF_JSGT  0x6    any  PC += offset if dst &gt; src                    signed</div><div class='add'>+BPF_JSGE  0x7    any  PC += offset if dst &gt;= src                   signed</div><div class='add'>+BPF_CALL  0x8    0x0  call helper function by address              see `Helper functions`_</div><div class='add'>+BPF_CALL  0x8    0x1  call PC += offset                            see `Program-local functions`_</div><div class='add'>+BPF_CALL  0x8    0x2  call helper function by BTF ID               see `Helper functions`_</div><div class='add'>+BPF_EXIT  0x9    0x0  return                                       BPF_JMP only</div><div class='add'>+BPF_JLT   0xa    any  PC += offset if dst &lt; src                    unsigned</div><div class='add'>+BPF_JLE   0xb    any  PC += offset if dst &lt;= src                   unsigned</div><div class='add'>+BPF_JSLT  0xc    any  PC += offset if dst &lt; src                    signed</div><div class='add'>+BPF_JSLE  0xd    any  PC += offset if dst &lt;= src                   signed</div><div class='add'>+========  =====  ===  ===========================================  =========================================</div><div class='ctx'> </div><div class='ctx'> The eBPF program needs to store the return value into register R0 before doing a</div><div class='del'>-BPF_EXIT.</div><div class='add'>+``BPF_EXIT``.</div><div class='add'>+</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+``BPF_JSGE | BPF_X | BPF_JMP32`` (0x7e) means::</div><div class='add'>+</div><div class='add'>+  if (s32)dst s&gt;= (s32)src goto +offset</div><div class='ctx'> </div><div class='add'>+where 's&gt;=' indicates a signed '&gt;=' comparison.</div><div class='add'>+</div><div class='add'>+Helper functions</div><div class='add'>+~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Helper functions are a concept whereby BPF programs can call into a</div><div class='add'>+set of function calls exposed by the underlying platform.</div><div class='add'>+</div><div class='add'>+Historically, each helper function was identified by an address</div><div class='add'>+encoded in the imm field.  The available helper functions may differ</div><div class='add'>+for each program type, but address values are unique across all program types.</div><div class='add'>+</div><div class='add'>+Platforms that support the BPF Type Format (BTF) support identifying</div><div class='add'>+a helper function by a BTF ID encoded in the imm field, where the BTF ID</div><div class='add'>+identifies the helper name and type.</div><div class='add'>+</div><div class='add'>+Program-local functions</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+Program-local functions are functions exposed by the same BPF program as the</div><div class='add'>+caller, and are referenced by offset from the call instruction, similar to</div><div class='add'>+``BPF_JA``.  A ``BPF_EXIT`` within the program-local function will return to</div><div class='add'>+the caller.</div><div class='ctx'> </div><div class='ctx'> Load and store instructions</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='del'>-For load and store instructions (BPF_LD, BPF_LDX, BPF_ST and BPF_STX), the</div><div class='add'>+For load and store instructions (``BPF_LD``, ``BPF_LDX``, ``BPF_ST``, and ``BPF_STX``), the</div><div class='ctx'> 8-bit 'opcode' field is divided as:</div><div class='ctx'> </div><div class='del'>-  ============  ======  =================</div><div class='del'>-  3 bits (MSB)  2 bits  3 bits (LSB)</div><div class='del'>-  ============  ======  =================</div><div class='del'>-  mode          size    instruction class</div><div class='del'>-  ============  ======  =================</div><div class='add'>+============  ======  =================</div><div class='add'>+3 bits (MSB)  2 bits  3 bits (LSB)</div><div class='add'>+============  ======  =================</div><div class='add'>+mode          size    instruction class</div><div class='add'>+============  ======  =================</div><div class='add'>+</div><div class='add'>+The mode modifier is one of:</div><div class='add'>+</div><div class='add'>+  =============  =====  ====================================  =============</div><div class='add'>+  mode modifier  value  description                           reference</div><div class='add'>+  =============  =====  ====================================  =============</div><div class='add'>+  BPF_IMM        0x00   64-bit immediate instructions         `64-bit immediate instructions`_</div><div class='add'>+  BPF_ABS        0x20   legacy BPF packet access (absolute)   `Legacy BPF Packet access instructions`_</div><div class='add'>+  BPF_IND        0x40   legacy BPF packet access (indirect)   `Legacy BPF Packet access instructions`_</div><div class='add'>+  BPF_MEM        0x60   regular load and store operations     `Regular load and store operations`_</div><div class='add'>+  BPF_ATOMIC     0xc0   atomic operations                     `Atomic operations`_</div><div class='add'>+  =============  =====  ====================================  =============</div><div class='ctx'> </div><div class='ctx'> The size modifier is one of:</div><div class='ctx'> </div><div class='hunk'>@@ -213,19 +331,6 @@ The size modifier is one of:</div><div class='ctx'>   BPF_DW         0x18   double word (8 bytes)</div><div class='ctx'>   =============  =====  =====================</div><div class='ctx'> </div><div class='del'>-The mode modifier is one of:</div><div class='del'>-</div><div class='del'>-  =============  =====  ====================================</div><div class='del'>-  mode modifier  value  description</div><div class='del'>-  =============  =====  ====================================</div><div class='del'>-  BPF_IMM        0x00   64-bit immediate instructions</div><div class='del'>-  BPF_ABS        0x20   legacy BPF packet access (absolute)</div><div class='del'>-  BPF_IND        0x40   legacy BPF packet access (indirect)</div><div class='del'>-  BPF_MEM        0x60   regular load and store operations</div><div class='del'>-  BPF_ATOMIC     0xc0   atomic operations</div><div class='del'>-  =============  =====  ====================================</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> Regular load and store operations</div><div class='ctx'> ---------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -234,15 +339,15 @@ instructions that transfer data between a register and memory.</div><div class='ctx'> </div><div class='ctx'> ``BPF_MEM | &lt;size&gt; | BPF_STX`` means::</div><div class='ctx'> </div><div class='del'>-  *(size *) (dst_reg + off) = src_reg</div><div class='add'>+  *(size *) (dst + offset) = src</div><div class='ctx'> </div><div class='ctx'> ``BPF_MEM | &lt;size&gt; | BPF_ST`` means::</div><div class='ctx'> </div><div class='del'>-  *(size *) (dst_reg + off) = imm32</div><div class='add'>+  *(size *) (dst + offset) = imm32</div><div class='ctx'> </div><div class='ctx'> ``BPF_MEM | &lt;size&gt; | BPF_LDX`` means::</div><div class='ctx'> </div><div class='del'>-  dst_reg = *(size *) (src_reg + off)</div><div class='add'>+  dst = *(size *) (src + offset)</div><div class='ctx'> </div><div class='ctx'> Where size is one of: ``BPF_B``, ``BPF_H``, ``BPF_W``, or ``BPF_DW``.</div><div class='ctx'> </div><div class='hunk'>@@ -256,111 +361,115 @@ by other eBPF programs or means outside of this specification.</div><div class='ctx'> All atomic operations supported by eBPF are encoded as store operations</div><div class='ctx'> that use the ``BPF_ATOMIC`` mode modifier as follows:</div><div class='ctx'> </div><div class='del'>-  * ``BPF_ATOMIC | BPF_W | BPF_STX`` for 32-bit operations</div><div class='del'>-  * ``BPF_ATOMIC | BPF_DW | BPF_STX`` for 64-bit operations</div><div class='del'>-  * 8-bit and 16-bit wide atomic operations are not supported.</div><div class='add'>+* ``BPF_ATOMIC | BPF_W | BPF_STX`` for 32-bit operations</div><div class='add'>+* ``BPF_ATOMIC | BPF_DW | BPF_STX`` for 64-bit operations</div><div class='add'>+* 8-bit and 16-bit wide atomic operations are not supported.</div><div class='ctx'> </div><div class='del'>-The imm field is used to encode the actual atomic operation.</div><div class='add'>+The 'imm' field is used to encode the actual atomic operation.</div><div class='ctx'> Simple atomic operation use a subset of the values defined to encode</div><div class='del'>-arithmetic operations in the imm field to encode the atomic operation:</div><div class='del'>-</div><div class='del'>-  ========  =====  ===========</div><div class='del'>-  imm       value  description</div><div class='del'>-  ========  =====  ===========</div><div class='del'>-  BPF_ADD   0x00   atomic add</div><div class='del'>-  BPF_OR    0x40   atomic or</div><div class='del'>-  BPF_AND   0x50   atomic and</div><div class='del'>-  BPF_XOR   0xa0   atomic xor</div><div class='del'>-  ========  =====  ===========</div><div class='add'>+arithmetic operations in the 'imm' field to encode the atomic operation:</div><div class='ctx'> </div><div class='add'>+========  =====  ===========</div><div class='add'>+imm       value  description</div><div class='add'>+========  =====  ===========</div><div class='add'>+BPF_ADD   0x00   atomic add</div><div class='add'>+BPF_OR    0x40   atomic or</div><div class='add'>+BPF_AND   0x50   atomic and</div><div class='add'>+BPF_XOR   0xa0   atomic xor</div><div class='add'>+========  =====  ===========</div><div class='ctx'> </div><div class='del'>-``BPF_ATOMIC | BPF_W  | BPF_STX`` with imm = BPF_ADD means::</div><div class='ctx'> </div><div class='del'>-  *(u32 *)(dst_reg + off16) += src_reg</div><div class='add'>+``BPF_ATOMIC | BPF_W  | BPF_STX`` with 'imm' = BPF_ADD means::</div><div class='ctx'> </div><div class='del'>-``BPF_ATOMIC | BPF_DW | BPF_STX`` with imm = BPF ADD means::</div><div class='add'>+  *(u32 *)(dst + offset) += src</div><div class='ctx'> </div><div class='del'>-  *(u64 *)(dst_reg + off16) += src_reg</div><div class='add'>+``BPF_ATOMIC | BPF_DW | BPF_STX`` with 'imm' = BPF ADD means::</div><div class='ctx'> </div><div class='del'>-``BPF_XADD`` is a deprecated name for ``BPF_ATOMIC | BPF_ADD``.</div><div class='add'>+  *(u64 *)(dst + offset) += src</div><div class='ctx'> </div><div class='ctx'> In addition to the simple atomic operations, there also is a modifier and</div><div class='ctx'> two complex atomic operations:</div><div class='ctx'> </div><div class='del'>-  ===========  ================  ===========================</div><div class='del'>-  imm          value             description</div><div class='del'>-  ===========  ================  ===========================</div><div class='del'>-  BPF_FETCH    0x01              modifier: return old value</div><div class='del'>-  BPF_XCHG     0xe0 | BPF_FETCH  atomic exchange</div><div class='del'>-  BPF_CMPXCHG  0xf0 | BPF_FETCH  atomic compare and exchange</div><div class='del'>-  ===========  ================  ===========================</div><div class='add'>+===========  ================  ===========================</div><div class='add'>+imm          value             description</div><div class='add'>+===========  ================  ===========================</div><div class='add'>+BPF_FETCH    0x01              modifier: return old value</div><div class='add'>+BPF_XCHG     0xe0 | BPF_FETCH  atomic exchange</div><div class='add'>+BPF_CMPXCHG  0xf0 | BPF_FETCH  atomic compare and exchange</div><div class='add'>+===========  ================  ===========================</div><div class='ctx'> </div><div class='ctx'> The ``BPF_FETCH`` modifier is optional for simple atomic operations, and</div><div class='ctx'> always set for the complex atomic operations.  If the ``BPF_FETCH`` flag</div><div class='del'>-is set, then the operation also overwrites ``src_reg`` with the value that</div><div class='add'>+is set, then the operation also overwrites ``src`` with the value that</div><div class='ctx'> was in memory before it was modified.</div><div class='ctx'> </div><div class='del'>-The ``BPF_XCHG`` operation atomically exchanges ``src_reg`` with the value</div><div class='del'>-addressed by ``dst_reg + off``.</div><div class='add'>+The ``BPF_XCHG`` operation atomically exchanges ``src`` with the value</div><div class='add'>+addressed by ``dst + offset``.</div><div class='ctx'> </div><div class='ctx'> The ``BPF_CMPXCHG`` operation atomically compares the value addressed by</div><div class='del'>-``dst_reg + off`` with ``R0``. If they match, the value addressed by</div><div class='del'>-``dst_reg + off`` is replaced with ``src_reg``. In either case, the</div><div class='del'>-value that was at ``dst_reg + off`` before the operation is zero-extended</div><div class='add'>+``dst + offset`` with ``R0``. If they match, the value addressed by</div><div class='add'>+``dst + offset`` is replaced with ``src``. In either case, the</div><div class='add'>+value that was at ``dst + offset`` before the operation is zero-extended</div><div class='ctx'> and loaded back to ``R0``.</div><div class='ctx'> </div><div class='del'>-Clang can generate atomic instructions by default when ``-mcpu=v3`` is</div><div class='del'>-enabled. If a lower version for ``-mcpu`` is set, the only atomic instruction</div><div class='del'>-Clang can generate is ``BPF_ADD`` *without* ``BPF_FETCH``. If you need to enable</div><div class='del'>-the atomics features, while keeping a lower ``-mcpu`` version, you can use</div><div class='del'>-``-Xclang -target-feature -Xclang +alu32``.</div><div class='del'>-</div><div class='ctx'> 64-bit immediate instructions</div><div class='ctx'> -----------------------------</div><div class='ctx'> </div><div class='del'>-Instructions with the ``BPF_IMM`` mode modifier use the wide instruction</div><div class='del'>-encoding for an extra imm64 value.</div><div class='del'>-</div><div class='del'>-There is currently only one such instruction.</div><div class='del'>-</div><div class='del'>-``BPF_LD | BPF_DW | BPF_IMM`` means::</div><div class='del'>-</div><div class='del'>-  dst_reg = imm64</div><div class='del'>-</div><div class='add'>+Instructions with the ``BPF_IMM`` 'mode' modifier use the wide instruction</div><div class='add'>+encoding defined in `Instruction encoding`_, and use the 'src' field of the</div><div class='add'>+basic instruction to hold an opcode subtype.</div><div class='add'>+</div><div class='add'>+The following table defines a set of ``BPF_IMM | BPF_DW | BPF_LD`` instructions</div><div class='add'>+with opcode subtypes in the 'src' field, using new terms such as "map"</div><div class='add'>+defined further below:</div><div class='add'>+</div><div class='add'>+=========================  ======  ===  =========================================  ===========  ==============</div><div class='add'>+opcode construction        opcode  src  pseudocode                                 imm type     dst type</div><div class='add'>+=========================  ======  ===  =========================================  ===========  ==============</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x0  dst = imm64                                integer      integer</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x1  dst = map_by_fd(imm)                       map fd       map</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x2  dst = map_val(map_by_fd(imm)) + next_imm   map fd       data pointer</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x3  dst = var_addr(imm)                        variable id  data pointer</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x4  dst = code_addr(imm)                       integer      code pointer</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x5  dst = map_by_idx(imm)                      map index    map</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x6  dst = map_val(map_by_idx(imm)) + next_imm  map index    data pointer</div><div class='add'>+=========================  ======  ===  =========================================  ===========  ==============</div><div class='add'>+</div><div class='add'>+where</div><div class='add'>+</div><div class='add'>+* map_by_fd(imm) means to convert a 32-bit file descriptor into an address of a map (see `Maps`_)</div><div class='add'>+* map_by_idx(imm) means to convert a 32-bit index into an address of a map</div><div class='add'>+* map_val(map) gets the address of the first value in a given map</div><div class='add'>+* var_addr(imm) gets the address of a platform variable (see `Platform Variables`_) with a given id</div><div class='add'>+* code_addr(imm) gets the address of the instruction at a specified relative offset in number of (64-bit) instructions</div><div class='add'>+* the 'imm type' can be used by disassemblers for display</div><div class='add'>+* the 'dst type' can be used for verification and JIT compilation purposes</div><div class='add'>+</div><div class='add'>+Maps</div><div class='add'>+~~~~</div><div class='add'>+</div><div class='add'>+Maps are shared memory regions accessible by eBPF programs on some platforms.</div><div class='add'>+A map can have various semantics as defined in a separate document, and may or</div><div class='add'>+may not have a single contiguous memory region, but the 'map_val(map)' is</div><div class='add'>+currently only defined for maps that do have a single contiguous memory region.</div><div class='add'>+</div><div class='add'>+Each map can have a file descriptor (fd) if supported by the platform, where</div><div class='add'>+'map_by_fd(imm)' means to get the map with the specified file descriptor. Each</div><div class='add'>+BPF program can also be defined to use a set of maps associated with the</div><div class='add'>+program at load time, and 'map_by_idx(imm)' means to get the map with the given</div><div class='add'>+index in the set associated with the BPF program containing the instruction.</div><div class='add'>+</div><div class='add'>+Platform Variables</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Platform variables are memory regions, identified by integer ids, exposed by</div><div class='add'>+the runtime and accessible by BPF programs on some platforms.  The</div><div class='add'>+'var_addr(imm)' operation means to get the address of the memory region</div><div class='add'>+identified by the given id.</div><div class='ctx'> </div><div class='ctx'> Legacy BPF Packet access instructions</div><div class='ctx'> -------------------------------------</div><div class='ctx'> </div><div class='del'>-eBPF has special instructions for access to packet data that have been</div><div class='del'>-carried over from classic BPF to retain the performance of legacy socket</div><div class='del'>-filters running in the eBPF interpreter.</div><div class='del'>-</div><div class='del'>-The instructions come in two forms: ``BPF_ABS | &lt;size&gt; | BPF_LD`` and</div><div class='del'>-``BPF_IND | &lt;size&gt; | BPF_LD``.</div><div class='del'>-</div><div class='del'>-These instructions are used to access packet data and can only be used when</div><div class='del'>-the program context is a pointer to networking packet.  ``BPF_ABS``</div><div class='del'>-accesses packet data at an absolute offset specified by the immediate data</div><div class='del'>-and ``BPF_IND`` access packet data at an offset that includes the value of</div><div class='del'>-a register in addition to the immediate data.</div><div class='del'>-</div><div class='del'>-These instructions have seven implicit operands:</div><div class='del'>-</div><div class='del'>- * Register R6 is an implicit input that must contain pointer to a</div><div class='del'>-   struct sk_buff.</div><div class='del'>- * Register R0 is an implicit output which contains the data fetched from</div><div class='del'>-   the packet.</div><div class='del'>- * Registers R1-R5 are scratch registers that are clobbered after a call to</div><div class='del'>-   ``BPF_ABS | BPF_LD`` or ``BPF_IND`` | BPF_LD instructions.</div><div class='del'>-</div><div class='del'>-These instructions have an implicit program exit condition as well. When an</div><div class='del'>-eBPF program is trying to access the data beyond the packet boundary, the</div><div class='del'>-program execution will be aborted.</div><div class='del'>-</div><div class='del'>-``BPF_ABS | BPF_W | BPF_LD`` means::</div><div class='del'>-</div><div class='del'>-  R0 = ntohl(*(u32 *) (((struct sk_buff *) R6)-&gt;data + imm32))</div><div class='del'>-</div><div class='del'>-``BPF_IND | BPF_W | BPF_LD`` means::</div><div class='del'>-</div><div class='del'>-  R0 = ntohl(*(u32 *) (((struct sk_buff *) R6)-&gt;data + src_reg + imm32))</div><div class='add'>+eBPF previously introduced special instructions for access to packet data that were</div><div class='add'>+carried over from classic BPF. However, these instructions are</div><div class='add'>+deprecated and should no longer be used.</div><div class='head'>diff --git a/Documentation/bpf/kfuncs.rst b/Documentation/bpf/kfuncs.rst<br/>new file mode 100644<br/>index 000000000000..ea2516374d92<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/kfuncs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/kfuncs.rst</a></div><div class='hunk'>@@ -0,0 +1,609 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. _kfuncs-header-label:</div><div class='add'>+</div><div class='add'>+=============================</div><div class='add'>+BPF Kernel Functions (kfuncs)</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+1. Introduction</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+BPF Kernel Functions or more commonly known as kfuncs are functions in the Linux</div><div class='add'>+kernel which are exposed for use by BPF programs. Unlike normal BPF helpers,</div><div class='add'>+kfuncs do not have a stable interface and can change from one kernel release to</div><div class='add'>+another. Hence, BPF programs need to be updated in response to changes in the</div><div class='add'>+kernel. See :ref:`BPF_kfunc_lifecycle_expectations` for more information.</div><div class='add'>+</div><div class='add'>+2. Defining a kfunc</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+There are two ways to expose a kernel function to BPF programs, either make an</div><div class='add'>+existing function in the kernel visible, or add a new wrapper for BPF. In both</div><div class='add'>+cases, care must be taken that BPF program can only call such function in a</div><div class='add'>+valid context. To enforce this, visibility of a kfunc can be per program type.</div><div class='add'>+</div><div class='add'>+If you are not creating a BPF wrapper for existing kernel function, skip ahead</div><div class='add'>+to :ref:`BPF_kfunc_nodef`.</div><div class='add'>+</div><div class='add'>+2.1 Creating a wrapper kfunc</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+When defining a wrapper kfunc, the wrapper function should have extern linkage.</div><div class='add'>+This prevents the compiler from optimizing away dead code, as this wrapper kfunc</div><div class='add'>+is not invoked anywhere in the kernel itself. It is not necessary to provide a</div><div class='add'>+prototype in a header for the wrapper kfunc.</div><div class='add'>+</div><div class='add'>+An example is given below::</div><div class='add'>+</div><div class='add'>+        /* Disables missing prototype warnings */</div><div class='add'>+        __diag_push();</div><div class='add'>+        __diag_ignore_all("-Wmissing-prototypes",</div><div class='add'>+                          "Global kfuncs as their definitions will be in BTF");</div><div class='add'>+</div><div class='add'>+        __bpf_kfunc struct task_struct *bpf_find_get_task_by_vpid(pid_t nr)</div><div class='add'>+        {</div><div class='add'>+                return find_get_task_by_vpid(nr);</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        __diag_pop();</div><div class='add'>+</div><div class='add'>+A wrapper kfunc is often needed when we need to annotate parameters of the</div><div class='add'>+kfunc. Otherwise one may directly make the kfunc visible to the BPF program by</div><div class='add'>+registering it with the BPF subsystem. See :ref:`BPF_kfunc_nodef`.</div><div class='add'>+</div><div class='add'>+2.2 Annotating kfunc parameters</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+Similar to BPF helpers, there is sometime need for additional context required</div><div class='add'>+by the verifier to make the usage of kernel functions safer and more useful.</div><div class='add'>+Hence, we can annotate a parameter by suffixing the name of the argument of the</div><div class='add'>+kfunc with a __tag, where tag may be one of the supported annotations.</div><div class='add'>+</div><div class='add'>+2.2.1 __sz Annotation</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+This annotation is used to indicate a memory and size pair in the argument list.</div><div class='add'>+An example is given below::</div><div class='add'>+</div><div class='add'>+        __bpf_kfunc void bpf_memzero(void *mem, int mem__sz)</div><div class='add'>+        {</div><div class='add'>+        ...</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+Here, the verifier will treat first argument as a PTR_TO_MEM, and second</div><div class='add'>+argument as its size. By default, without __sz annotation, the size of the type</div><div class='add'>+of the pointer is used. Without __sz annotation, a kfunc cannot accept a void</div><div class='add'>+pointer.</div><div class='add'>+</div><div class='add'>+2.2.2 __k Annotation</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+This annotation is only understood for scalar arguments, where it indicates that</div><div class='add'>+the verifier must check the scalar argument to be a known constant, which does</div><div class='add'>+not indicate a size parameter, and the value of the constant is relevant to the</div><div class='add'>+safety of the program.</div><div class='add'>+</div><div class='add'>+An example is given below::</div><div class='add'>+</div><div class='add'>+        __bpf_kfunc void *bpf_obj_new(u32 local_type_id__k, ...)</div><div class='add'>+        {</div><div class='add'>+        ...</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+Here, bpf_obj_new uses local_type_id argument to find out the size of that type</div><div class='add'>+ID in program's BTF and return a sized pointer to it. Each type ID will have a</div><div class='add'>+distinct size, hence it is crucial to treat each such call as distinct when</div><div class='add'>+values don't match during verifier state pruning checks.</div><div class='add'>+</div><div class='add'>+Hence, whenever a constant scalar argument is accepted by a kfunc which is not a</div><div class='add'>+size parameter, and the value of the constant matters for program safety, __k</div><div class='add'>+suffix should be used.</div><div class='add'>+</div><div class='add'>+2.2.2 __uninit Annotation</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+This annotation is used to indicate that the argument will be treated as</div><div class='add'>+uninitialized.</div><div class='add'>+</div><div class='add'>+An example is given below::</div><div class='add'>+</div><div class='add'>+        __bpf_kfunc int bpf_dynptr_from_skb(..., struct bpf_dynptr_kern *ptr__uninit)</div><div class='add'>+        {</div><div class='add'>+        ...</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+Here, the dynptr will be treated as an uninitialized dynptr. Without this</div><div class='add'>+annotation, the verifier will reject the program if the dynptr passed in is</div><div class='add'>+not initialized.</div><div class='add'>+</div><div class='add'>+.. _BPF_kfunc_nodef:</div><div class='add'>+</div><div class='add'>+2.3 Using an existing kernel function</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+When an existing function in the kernel is fit for consumption by BPF programs,</div><div class='add'>+it can be directly registered with the BPF subsystem. However, care must still</div><div class='add'>+be taken to review the context in which it will be invoked by the BPF program</div><div class='add'>+and whether it is safe to do so.</div><div class='add'>+</div><div class='add'>+2.4 Annotating kfuncs</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+In addition to kfuncs' arguments, verifier may need more information about the</div><div class='add'>+type of kfunc(s) being registered with the BPF subsystem. To do so, we define</div><div class='add'>+flags on a set of kfuncs as follows::</div><div class='add'>+</div><div class='add'>+        BTF_SET8_START(bpf_task_set)</div><div class='add'>+        BTF_ID_FLAGS(func, bpf_get_task_pid, KF_ACQUIRE | KF_RET_NULL)</div><div class='add'>+        BTF_ID_FLAGS(func, bpf_put_pid, KF_RELEASE)</div><div class='add'>+        BTF_SET8_END(bpf_task_set)</div><div class='add'>+</div><div class='add'>+This set encodes the BTF ID of each kfunc listed above, and encodes the flags</div><div class='add'>+along with it. Ofcourse, it is also allowed to specify no flags.</div><div class='add'>+</div><div class='add'>+kfunc definitions should also always be annotated with the ``__bpf_kfunc``</div><div class='add'>+macro. This prevents issues such as the compiler inlining the kfunc if it's a</div><div class='add'>+static kernel function, or the function being elided in an LTO build as it's</div><div class='add'>+not used in the rest of the kernel. Developers should not manually add</div><div class='add'>+annotations to their kfunc to prevent these issues. If an annotation is</div><div class='add'>+required to prevent such an issue with your kfunc, it is a bug and should be</div><div class='add'>+added to the definition of the macro so that other kfuncs are similarly</div><div class='add'>+protected. An example is given below::</div><div class='add'>+</div><div class='add'>+        __bpf_kfunc struct task_struct *bpf_get_task_pid(s32 pid)</div><div class='add'>+        {</div><div class='add'>+        ...</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+2.4.1 KF_ACQUIRE flag</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+The KF_ACQUIRE flag is used to indicate that the kfunc returns a pointer to a</div><div class='add'>+refcounted object. The verifier will then ensure that the pointer to the object</div><div class='add'>+is eventually released using a release kfunc, or transferred to a map using a</div><div class='add'>+referenced kptr (by invoking bpf_kptr_xchg). If not, the verifier fails the</div><div class='add'>+loading of the BPF program until no lingering references remain in all possible</div><div class='add'>+explored states of the program.</div><div class='add'>+</div><div class='add'>+2.4.2 KF_RET_NULL flag</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+The KF_RET_NULL flag is used to indicate that the pointer returned by the kfunc</div><div class='add'>+may be NULL. Hence, it forces the user to do a NULL check on the pointer</div><div class='add'>+returned from the kfunc before making use of it (dereferencing or passing to</div><div class='add'>+another helper). This flag is often used in pairing with KF_ACQUIRE flag, but</div><div class='add'>+both are orthogonal to each other.</div><div class='add'>+</div><div class='add'>+2.4.3 KF_RELEASE flag</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+The KF_RELEASE flag is used to indicate that the kfunc releases the pointer</div><div class='add'>+passed in to it. There can be only one referenced pointer that can be passed</div><div class='add'>+in. All copies of the pointer being released are invalidated as a result of</div><div class='add'>+invoking kfunc with this flag. KF_RELEASE kfuncs automatically receive the</div><div class='add'>+protection afforded by the KF_TRUSTED_ARGS flag described below.</div><div class='add'>+</div><div class='add'>+2.4.4 KF_TRUSTED_ARGS flag</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+The KF_TRUSTED_ARGS flag is used for kfuncs taking pointer arguments. It</div><div class='add'>+indicates that the all pointer arguments are valid, and that all pointers to</div><div class='add'>+BTF objects have been passed in their unmodified form (that is, at a zero</div><div class='add'>+offset, and without having been obtained from walking another pointer, with one</div><div class='add'>+exception described below).</div><div class='add'>+</div><div class='add'>+There are two types of pointers to kernel objects which are considered "valid":</div><div class='add'>+</div><div class='add'>+1. Pointers which are passed as tracepoint or struct_ops callback arguments.</div><div class='add'>+2. Pointers which were returned from a KF_ACQUIRE kfunc.</div><div class='add'>+</div><div class='add'>+Pointers to non-BTF objects (e.g. scalar pointers) may also be passed to</div><div class='add'>+KF_TRUSTED_ARGS kfuncs, and may have a non-zero offset.</div><div class='add'>+</div><div class='add'>+The definition of "valid" pointers is subject to change at any time, and has</div><div class='add'>+absolutely no ABI stability guarantees.</div><div class='add'>+</div><div class='add'>+As mentioned above, a nested pointer obtained from walking a trusted pointer is</div><div class='add'>+no longer trusted, with one exception. If a struct type has a field that is</div><div class='add'>+guaranteed to be valid as long as its parent pointer is trusted, the</div><div class='add'>+``BTF_TYPE_SAFE_NESTED`` macro can be used to express that to the verifier as</div><div class='add'>+follows:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	BTF_TYPE_SAFE_NESTED(struct task_struct) {</div><div class='add'>+		const cpumask_t *cpus_ptr;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+In other words, you must:</div><div class='add'>+</div><div class='add'>+1. Wrap the trusted pointer type in the ``BTF_TYPE_SAFE_NESTED`` macro.</div><div class='add'>+</div><div class='add'>+2. Specify the type and name of the trusted nested field. This field must match</div><div class='add'>+   the field in the original type definition exactly.</div><div class='add'>+</div><div class='add'>+2.4.5 KF_SLEEPABLE flag</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+The KF_SLEEPABLE flag is used for kfuncs that may sleep. Such kfuncs can only</div><div class='add'>+be called by sleepable BPF programs (BPF_F_SLEEPABLE).</div><div class='add'>+</div><div class='add'>+2.4.6 KF_DESTRUCTIVE flag</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+The KF_DESTRUCTIVE flag is used to indicate functions calling which is</div><div class='add'>+destructive to the system. For example such a call can result in system</div><div class='add'>+rebooting or panicking. Due to this additional restrictions apply to these</div><div class='add'>+calls. At the moment they only require CAP_SYS_BOOT capability, but more can be</div><div class='add'>+added later.</div><div class='add'>+</div><div class='add'>+2.4.7 KF_RCU flag</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+The KF_RCU flag is a weaker version of KF_TRUSTED_ARGS. The kfuncs marked with</div><div class='add'>+KF_RCU expect either PTR_TRUSTED or MEM_RCU arguments. The verifier guarantees</div><div class='add'>+that the objects are valid and there is no use-after-free. The pointers are not</div><div class='add'>+NULL, but the object's refcount could have reached zero. The kfuncs need to</div><div class='add'>+consider doing refcnt != 0 check, especially when returning a KF_ACQUIRE</div><div class='add'>+pointer. Note as well that a KF_ACQUIRE kfunc that is KF_RCU should very likely</div><div class='add'>+also be KF_RET_NULL.</div><div class='add'>+</div><div class='add'>+.. _KF_deprecated_flag:</div><div class='add'>+</div><div class='add'>+2.4.8 KF_DEPRECATED flag</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+The KF_DEPRECATED flag is used for kfuncs which are scheduled to be</div><div class='add'>+changed or removed in a subsequent kernel release. A kfunc that is</div><div class='add'>+marked with KF_DEPRECATED should also have any relevant information</div><div class='add'>+captured in its kernel doc. Such information typically includes the</div><div class='add'>+kfunc's expected remaining lifespan, a recommendation for new</div><div class='add'>+functionality that can replace it if any is available, and possibly a</div><div class='add'>+rationale for why it is being removed.</div><div class='add'>+</div><div class='add'>+Note that while on some occasions, a KF_DEPRECATED kfunc may continue to be</div><div class='add'>+supported and have its KF_DEPRECATED flag removed, it is likely to be far more</div><div class='add'>+difficult to remove a KF_DEPRECATED flag after it's been added than it is to</div><div class='add'>+prevent it from being added in the first place. As described in</div><div class='add'>+:ref:`BPF_kfunc_lifecycle_expectations`, users that rely on specific kfuncs are</div><div class='add'>+encouraged to make their use-cases known as early as possible, and participate</div><div class='add'>+in upstream discussions regarding whether to keep, change, deprecate, or remove</div><div class='add'>+those kfuncs if and when such discussions occur.</div><div class='add'>+</div><div class='add'>+2.5 Registering the kfuncs</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Once the kfunc is prepared for use, the final step to making it visible is</div><div class='add'>+registering it with the BPF subsystem. Registration is done per BPF program</div><div class='add'>+type. An example is shown below::</div><div class='add'>+</div><div class='add'>+        BTF_SET8_START(bpf_task_set)</div><div class='add'>+        BTF_ID_FLAGS(func, bpf_get_task_pid, KF_ACQUIRE | KF_RET_NULL)</div><div class='add'>+        BTF_ID_FLAGS(func, bpf_put_pid, KF_RELEASE)</div><div class='add'>+        BTF_SET8_END(bpf_task_set)</div><div class='add'>+</div><div class='add'>+        static const struct btf_kfunc_id_set bpf_task_kfunc_set = {</div><div class='add'>+                .owner = THIS_MODULE,</div><div class='add'>+                .set   = &amp;bpf_task_set,</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        static int init_subsystem(void)</div><div class='add'>+        {</div><div class='add'>+                return register_btf_kfunc_id_set(BPF_PROG_TYPE_TRACING, &amp;bpf_task_kfunc_set);</div><div class='add'>+        }</div><div class='add'>+        late_initcall(init_subsystem);</div><div class='add'>+</div><div class='add'>+2.6  Specifying no-cast aliases with ___init</div><div class='add'>+--------------------------------------------</div><div class='add'>+</div><div class='add'>+The verifier will always enforce that the BTF type of a pointer passed to a</div><div class='add'>+kfunc by a BPF program, matches the type of pointer specified in the kfunc</div><div class='add'>+definition. The verifier, does, however, allow types that are equivalent</div><div class='add'>+according to the C standard to be passed to the same kfunc arg, even if their</div><div class='add'>+BTF_IDs differ.</div><div class='add'>+</div><div class='add'>+For example, for the following type definition:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct bpf_cpumask {</div><div class='add'>+		cpumask_t cpumask;</div><div class='add'>+		refcount_t usage;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+The verifier would allow a ``struct bpf_cpumask *`` to be passed to a kfunc</div><div class='add'>+taking a ``cpumask_t *`` (which is a typedef of ``struct cpumask *``). For</div><div class='add'>+instance, both ``struct cpumask *`` and ``struct bpf_cpmuask *`` can be passed</div><div class='add'>+to bpf_cpumask_test_cpu().</div><div class='add'>+</div><div class='add'>+In some cases, this type-aliasing behavior is not desired. ``struct</div><div class='add'>+nf_conn___init`` is one such example:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct nf_conn___init {</div><div class='add'>+		struct nf_conn ct;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+The C standard would consider these types to be equivalent, but it would not</div><div class='add'>+always be safe to pass either type to a trusted kfunc. ``struct</div><div class='add'>+nf_conn___init`` represents an allocated ``struct nf_conn`` object that has</div><div class='add'>+*not yet been initialized*, so it would therefore be unsafe to pass a ``struct</div><div class='add'>+nf_conn___init *`` to a kfunc that's expecting a fully initialized ``struct</div><div class='add'>+nf_conn *`` (e.g. ``bpf_ct_change_timeout()``).</div><div class='add'>+</div><div class='add'>+In order to accommodate such requirements, the verifier will enforce strict</div><div class='add'>+PTR_TO_BTF_ID type matching if two types have the exact same name, with one</div><div class='add'>+being suffixed with ``___init``.</div><div class='add'>+</div><div class='add'>+.. _BPF_kfunc_lifecycle_expectations:</div><div class='add'>+</div><div class='add'>+3. kfunc lifecycle expectations</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+kfuncs provide a kernel &lt;-&gt; kernel API, and thus are not bound by any of the</div><div class='add'>+strict stability restrictions associated with kernel &lt;-&gt; user UAPIs. This means</div><div class='add'>+they can be thought of as similar to EXPORT_SYMBOL_GPL, and can therefore be</div><div class='add'>+modified or removed by a maintainer of the subsystem they're defined in when</div><div class='add'>+it's deemed necessary.</div><div class='add'>+</div><div class='add'>+Like any other change to the kernel, maintainers will not change or remove a</div><div class='add'>+kfunc without having a reasonable justification.  Whether or not they'll choose</div><div class='add'>+to change a kfunc will ultimately depend on a variety of factors, such as how</div><div class='add'>+widely used the kfunc is, how long the kfunc has been in the kernel, whether an</div><div class='add'>+alternative kfunc exists, what the norm is in terms of stability for the</div><div class='add'>+subsystem in question, and of course what the technical cost is of continuing</div><div class='add'>+to support the kfunc.</div><div class='add'>+</div><div class='add'>+There are several implications of this:</div><div class='add'>+</div><div class='add'>+a) kfuncs that are widely used or have been in the kernel for a long time will</div><div class='add'>+   be more difficult to justify being changed or removed by a maintainer. In</div><div class='add'>+   other words, kfuncs that are known to have a lot of users and provide</div><div class='add'>+   significant value provide stronger incentives for maintainers to invest the</div><div class='add'>+   time and complexity in supporting them. It is therefore important for</div><div class='add'>+   developers that are using kfuncs in their BPF programs to communicate and</div><div class='add'>+   explain how and why those kfuncs are being used, and to participate in</div><div class='add'>+   discussions regarding those kfuncs when they occur upstream.</div><div class='add'>+</div><div class='add'>+b) Unlike regular kernel symbols marked with EXPORT_SYMBOL_GPL, BPF programs</div><div class='add'>+   that call kfuncs are generally not part of the kernel tree. This means that</div><div class='add'>+   refactoring cannot typically change callers in-place when a kfunc changes,</div><div class='add'>+   as is done for e.g. an upstreamed driver being updated in place when a</div><div class='add'>+   kernel symbol is changed.</div><div class='add'>+</div><div class='add'>+   Unlike with regular kernel symbols, this is expected behavior for BPF</div><div class='add'>+   symbols, and out-of-tree BPF programs that use kfuncs should be considered</div><div class='add'>+   relevant to discussions and decisions around modifying and removing those</div><div class='add'>+   kfuncs. The BPF community will take an active role in participating in</div><div class='add'>+   upstream discussions when necessary to ensure that the perspectives of such</div><div class='add'>+   users are taken into account.</div><div class='add'>+</div><div class='add'>+c) A kfunc will never have any hard stability guarantees. BPF APIs cannot and</div><div class='add'>+   will not ever hard-block a change in the kernel purely for stability</div><div class='add'>+   reasons. That being said, kfuncs are features that are meant to solve</div><div class='add'>+   problems and provide value to users. The decision of whether to change or</div><div class='add'>+   remove a kfunc is a multivariate technical decision that is made on a</div><div class='add'>+   case-by-case basis, and which is informed by data points such as those</div><div class='add'>+   mentioned above. It is expected that a kfunc being removed or changed with</div><div class='add'>+   no warning will not be a common occurrence or take place without sound</div><div class='add'>+   justification, but it is a possibility that must be accepted if one is to</div><div class='add'>+   use kfuncs.</div><div class='add'>+</div><div class='add'>+3.1 kfunc deprecation</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+As described above, while sometimes a maintainer may find that a kfunc must be</div><div class='add'>+changed or removed immediately to accommodate some changes in their subsystem,</div><div class='add'>+usually kfuncs will be able to accommodate a longer and more measured</div><div class='add'>+deprecation process. For example, if a new kfunc comes along which provides</div><div class='add'>+superior functionality to an existing kfunc, the existing kfunc may be</div><div class='add'>+deprecated for some period of time to allow users to migrate their BPF programs</div><div class='add'>+to use the new one. Or, if a kfunc has no known users, a decision may be made</div><div class='add'>+to remove the kfunc (without providing an alternative API) after some</div><div class='add'>+deprecation period so as to provide users with a window to notify the kfunc</div><div class='add'>+maintainer if it turns out that the kfunc is actually being used.</div><div class='add'>+</div><div class='add'>+It's expected that the common case will be that kfuncs will go through a</div><div class='add'>+deprecation period rather than being changed or removed without warning. As</div><div class='add'>+described in :ref:`KF_deprecated_flag`, the kfunc framework provides the</div><div class='add'>+KF_DEPRECATED flag to kfunc developers to signal to users that a kfunc has been</div><div class='add'>+deprecated. Once a kfunc has been marked with KF_DEPRECATED, the following</div><div class='add'>+procedure is followed for removal:</div><div class='add'>+</div><div class='add'>+1. Any relevant information for deprecated kfuncs is documented in the kfunc's</div><div class='add'>+   kernel docs. This documentation will typically include the kfunc's expected</div><div class='add'>+   remaining lifespan, a recommendation for new functionality that can replace</div><div class='add'>+   the usage of the deprecated function (or an explanation as to why no such</div><div class='add'>+   replacement exists), etc.</div><div class='add'>+</div><div class='add'>+2. The deprecated kfunc is kept in the kernel for some period of time after it</div><div class='add'>+   was first marked as deprecated. This time period will be chosen on a</div><div class='add'>+   case-by-case basis, and will typically depend on how widespread the use of</div><div class='add'>+   the kfunc is, how long it has been in the kernel, and how hard it is to move</div><div class='add'>+   to alternatives. This deprecation time period is "best effort", and as</div><div class='add'>+   described :ref:`above&lt;BPF_kfunc_lifecycle_expectations&gt;`, circumstances may</div><div class='add'>+   sometimes dictate that the kfunc be removed before the full intended</div><div class='add'>+   deprecation period has elapsed.</div><div class='add'>+</div><div class='add'>+3. After the deprecation period the kfunc will be removed. At this point, BPF</div><div class='add'>+   programs calling the kfunc will be rejected by the verifier.</div><div class='add'>+</div><div class='add'>+4. Core kfuncs</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+The BPF subsystem provides a number of "core" kfuncs that are potentially</div><div class='add'>+applicable to a wide variety of different possible use cases and programs.</div><div class='add'>+Those kfuncs are documented here.</div><div class='add'>+</div><div class='add'>+4.1 struct task_struct * kfuncs</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+There are a number of kfuncs that allow ``struct task_struct *`` objects to be</div><div class='add'>+used as kptrs:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/helpers.c</div><div class='add'>+   :identifiers: bpf_task_acquire bpf_task_release</div><div class='add'>+</div><div class='add'>+These kfuncs are useful when you want to acquire or release a reference to a</div><div class='add'>+``struct task_struct *`` that was passed as e.g. a tracepoint arg, or a</div><div class='add'>+struct_ops callback arg. For example:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * A trivial example tracepoint program that shows how to</div><div class='add'>+	 * acquire and release a struct task_struct * pointer.</div><div class='add'>+	 */</div><div class='add'>+	SEC("tp_btf/task_newtask")</div><div class='add'>+	int BPF_PROG(task_acquire_release_example, struct task_struct *task, u64 clone_flags)</div><div class='add'>+	{</div><div class='add'>+		struct task_struct *acquired;</div><div class='add'>+</div><div class='add'>+		acquired = bpf_task_acquire(task);</div><div class='add'>+		if (acquired)</div><div class='add'>+			/*</div><div class='add'>+			 * In a typical program you'd do something like store</div><div class='add'>+			 * the task in a map, and the map will automatically</div><div class='add'>+			 * release it later. Here, we release it manually.</div><div class='add'>+			 */</div><div class='add'>+			bpf_task_release(acquired);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+References acquired on ``struct task_struct *`` objects are RCU protected.</div><div class='add'>+Therefore, when in an RCU read region, you can obtain a pointer to a task</div><div class='add'>+embedded in a map value without having to acquire a reference:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	#define private(name) SEC(".data." #name) __hidden __attribute__((aligned(8)))</div><div class='add'>+	private(TASK) static struct task_struct *global;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * A trivial example showing how to access a task stored</div><div class='add'>+	 * in a map using RCU.</div><div class='add'>+	 */</div><div class='add'>+	SEC("tp_btf/task_newtask")</div><div class='add'>+	int BPF_PROG(task_rcu_read_example, struct task_struct *task, u64 clone_flags)</div><div class='add'>+	{</div><div class='add'>+		struct task_struct *local_copy;</div><div class='add'>+</div><div class='add'>+		bpf_rcu_read_lock();</div><div class='add'>+		local_copy = global;</div><div class='add'>+		if (local_copy)</div><div class='add'>+			/*</div><div class='add'>+			 * We could also pass local_copy to kfuncs or helper functions here,</div><div class='add'>+			 * as we're guaranteed that local_copy will be valid until we exit</div><div class='add'>+			 * the RCU read region below.</div><div class='add'>+			 */</div><div class='add'>+			bpf_printk("Global task %s is valid", local_copy-&gt;comm);</div><div class='add'>+		else</div><div class='add'>+			bpf_printk("No global task found");</div><div class='add'>+		bpf_rcu_read_unlock();</div><div class='add'>+</div><div class='add'>+		/* At this point we can no longer reference local_copy. */</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+A BPF program can also look up a task from a pid. This can be useful if the</div><div class='add'>+caller doesn't have a trusted pointer to a ``struct task_struct *`` object that</div><div class='add'>+it can acquire a reference on with bpf_task_acquire().</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/helpers.c</div><div class='add'>+   :identifiers: bpf_task_from_pid</div><div class='add'>+</div><div class='add'>+Here is an example of it being used:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	SEC("tp_btf/task_newtask")</div><div class='add'>+	int BPF_PROG(task_get_pid_example, struct task_struct *task, u64 clone_flags)</div><div class='add'>+	{</div><div class='add'>+		struct task_struct *lookup;</div><div class='add'>+</div><div class='add'>+		lookup = bpf_task_from_pid(task-&gt;pid);</div><div class='add'>+		if (!lookup)</div><div class='add'>+			/* A task should always be found, as %task is a tracepoint arg. */</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		if (lookup-&gt;pid != task-&gt;pid) {</div><div class='add'>+			/* bpf_task_from_pid() looks up the task via its</div><div class='add'>+			 * globally-unique pid from the init_pid_ns. Thus,</div><div class='add'>+			 * the pid of the lookup task should always be the</div><div class='add'>+			 * same as the input task.</div><div class='add'>+			 */</div><div class='add'>+			bpf_task_release(lookup);</div><div class='add'>+			return -EINVAL;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* bpf_task_from_pid() returns an acquired reference,</div><div class='add'>+		 * so it must be dropped before returning from the</div><div class='add'>+		 * tracepoint handler.</div><div class='add'>+		 */</div><div class='add'>+		bpf_task_release(lookup);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+4.2 struct cgroup * kfuncs</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+``struct cgroup *`` objects also have acquire and release functions:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/helpers.c</div><div class='add'>+   :identifiers: bpf_cgroup_acquire bpf_cgroup_release</div><div class='add'>+</div><div class='add'>+These kfuncs are used in exactly the same manner as bpf_task_acquire() and</div><div class='add'>+bpf_task_release() respectively, so we won't provide examples for them.</div><div class='add'>+</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+Other kfuncs available for interacting with ``struct cgroup *`` objects are</div><div class='add'>+bpf_cgroup_ancestor() and bpf_cgroup_from_id(), allowing callers to access</div><div class='add'>+the ancestor of a cgroup and find a cgroup by its ID, respectively. Both</div><div class='add'>+return a cgroup kptr.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/helpers.c</div><div class='add'>+   :identifiers: bpf_cgroup_ancestor</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/helpers.c</div><div class='add'>+   :identifiers: bpf_cgroup_from_id</div><div class='add'>+</div><div class='add'>+Eventually, BPF should be updated to allow this to happen with a normal memory</div><div class='add'>+load in the program itself. This is currently not possible without more work in</div><div class='add'>+the verifier. bpf_cgroup_ancestor() can be used as follows:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * Simple tracepoint example that illustrates how a cgroup's</div><div class='add'>+	 * ancestor can be accessed using bpf_cgroup_ancestor().</div><div class='add'>+	 */</div><div class='add'>+	SEC("tp_btf/cgroup_mkdir")</div><div class='add'>+	int BPF_PROG(cgrp_ancestor_example, struct cgroup *cgrp, const char *path)</div><div class='add'>+	{</div><div class='add'>+		struct cgroup *parent;</div><div class='add'>+</div><div class='add'>+		/* The parent cgroup resides at the level before the current cgroup's level. */</div><div class='add'>+		parent = bpf_cgroup_ancestor(cgrp, cgrp-&gt;level - 1);</div><div class='add'>+		if (!parent)</div><div class='add'>+			return -ENOENT;</div><div class='add'>+</div><div class='add'>+		bpf_printk("Parent id is %d", parent-&gt;self.id);</div><div class='add'>+</div><div class='add'>+		/* Return the parent cgroup that was acquired above. */</div><div class='add'>+		bpf_cgroup_release(parent);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+4.3 struct cpumask * kfuncs</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+BPF provides a set of kfuncs that can be used to query, allocate, mutate, and</div><div class='add'>+destroy struct cpumask * objects. Please refer to :ref:`cpumasks-header-label`</div><div class='add'>+for more details.</div><div class='head'>diff --git a/Documentation/bpf/libbpf/index.rst b/Documentation/bpf/libbpf/index.rst<br/>index 4e8c656b539a..7545a2049692 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/libbpf/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/libbpf/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/libbpf/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/libbpf/index.rst</a></div><div class='hunk'>@@ -1,22 +1,33 @@</div><div class='ctx'> .. SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='ctx'> </div><div class='add'>+.. _libbpf:</div><div class='add'>+</div><div class='add'>+======</div><div class='ctx'> libbpf</div><div class='ctx'> ======</div><div class='ctx'> </div><div class='add'>+If you are looking to develop BPF applications using the libbpf library, this</div><div class='add'>+directory contains important documentation that you should read.</div><div class='add'>+</div><div class='add'>+To get started, it is recommended to begin with the :doc:`libbpf Overview</div><div class='add'>+&lt;libbpf_overview&gt;` document, which provides a high-level understanding of the</div><div class='add'>+libbpf APIs and their usage. This will give you a solid foundation to start</div><div class='add'>+exploring and utilizing the various features of libbpf to develop your BPF</div><div class='add'>+applications.</div><div class='add'>+</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='add'>+   libbpf_overview</div><div class='add'>+   API Documentation &lt;https://libbpf.readthedocs.io/en/latest/api.html&gt;</div><div class='add'>+   program_types</div><div class='ctx'>    libbpf_naming_convention</div><div class='ctx'>    libbpf_build</div><div class='ctx'> </div><div class='del'>-This is documentation for libbpf, a userspace library for loading and</div><div class='del'>-interacting with bpf programs.</div><div class='del'>-</div><div class='del'>-For API documentation see the `versioned API documentation site &lt;https://libbpf.readthedocs.io/en/latest/api.html&gt;`_.</div><div class='ctx'> </div><div class='del'>-All general BPF questions, including kernel functionality, libbpf APIs and</div><div class='del'>-their application, should be sent to bpf@vger.kernel.org mailing list.</div><div class='del'>-You can `subscribe &lt;http://vger.kernel.org/vger-lists.html#bpf&gt;`_ to the</div><div class='del'>-mailing list search its `archive &lt;https://lore.kernel.org/bpf/&gt;`_.</div><div class='del'>-Please search the archive before asking new questions. It very well might</div><div class='del'>-be that this was already addressed or answered before.</div><div class='add'>+All general BPF questions, including kernel functionality, libbpf APIs and their</div><div class='add'>+application, should be sent to bpf@vger.kernel.org mailing list.  You can</div><div class='add'>+`subscribe &lt;http://vger.kernel.org/vger-lists.html#bpf&gt;`_ to the mailing list</div><div class='add'>+search its `archive &lt;https://lore.kernel.org/bpf/&gt;`_.  Please search the archive</div><div class='add'>+before asking new questions. It may be that this was already addressed or</div><div class='add'>+answered before.</div><div class='head'>diff --git a/Documentation/bpf/libbpf/libbpf_naming_convention.rst b/Documentation/bpf/libbpf/libbpf_naming_convention.rst<br/>index f86360f734a8..b5b41b61b3c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/libbpf/libbpf_naming_convention.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/libbpf/libbpf_naming_convention.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/libbpf/libbpf_naming_convention.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/libbpf/libbpf_naming_convention.rst</a></div><div class='hunk'>@@ -9,8 +9,8 @@ described here. It's recommended to follow these conventions whenever a</div><div class='ctx'> new function or type is added to keep libbpf API clean and consistent.</div><div class='ctx'> </div><div class='ctx'> All types and functions provided by libbpf API should have one of the</div><div class='del'>-following prefixes: ``bpf_``, ``btf_``, ``libbpf_``, ``xsk_``,</div><div class='del'>-``btf_dump_``, ``ring_buffer_``, ``perf_buffer_``.</div><div class='add'>+following prefixes: ``bpf_``, ``btf_``, ``libbpf_``, ``btf_dump_``,</div><div class='add'>+``ring_buffer_``, ``perf_buffer_``.</div><div class='ctx'> </div><div class='ctx'> System call wrappers</div><div class='ctx'> --------------------</div><div class='hunk'>@@ -59,15 +59,6 @@ Auxiliary functions and types that don't fit well in any of categories</div><div class='ctx'> described above should have ``libbpf_`` prefix, e.g.</div><div class='ctx'> ``libbpf_get_error`` or ``libbpf_prog_type_by_name``.</div><div class='ctx'> </div><div class='del'>-AF_XDP functions</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-AF_XDP functions should have an ``xsk_`` prefix, e.g.</div><div class='del'>-``xsk_umem__get_data`` or ``xsk_umem__create``. The interface consists</div><div class='del'>-of both low-level ring access functions and high-level configuration</div><div class='del'>-functions. These can be mixed and matched. Note that these functions</div><div class='del'>-are not reentrant for performance reasons.</div><div class='del'>-</div><div class='ctx'> ABI</div><div class='ctx'> ---</div><div class='ctx'> </div><div class='hunk'>@@ -92,8 +83,8 @@ This prevents from accidentally exporting a symbol, that is not supposed</div><div class='ctx'> to be a part of ABI what, in turn, improves both libbpf developer- and</div><div class='ctx'> user-experiences.</div><div class='ctx'> </div><div class='del'>-ABI versionning</div><div class='del'>----------------</div><div class='add'>+ABI versioning</div><div class='add'>+--------------</div><div class='ctx'> </div><div class='ctx'> To make future ABI extensions possible libbpf ABI is versioned.</div><div class='ctx'> Versioning is implemented by ``libbpf.map`` version script that is</div><div class='hunk'>@@ -157,7 +148,7 @@ API documentation convention</div><div class='ctx'> The libbpf API is documented via comments above definitions in</div><div class='ctx'> header files. These comments can be rendered by doxygen and sphinx</div><div class='ctx'> for well organized html output. This section describes the</div><div class='del'>-convention in which these comments should be formated.</div><div class='add'>+convention in which these comments should be formatted.</div><div class='ctx'> </div><div class='ctx'> Here is an example from btf.h:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/bpf/libbpf/libbpf_overview.rst b/Documentation/bpf/libbpf/libbpf_overview.rst<br/>new file mode 100644<br/>index 000000000000..f36a2d4ffea2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/libbpf/libbpf_overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/libbpf/libbpf_overview.rst</a></div><div class='hunk'>@@ -0,0 +1,228 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===============</div><div class='add'>+libbpf Overview</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+libbpf is a C-based library containing a BPF loader that takes compiled BPF</div><div class='add'>+object files and prepares and loads them into the Linux kernel. libbpf takes the</div><div class='add'>+heavy lifting of loading, verifying, and attaching BPF programs to various</div><div class='add'>+kernel hooks, allowing BPF application developers to focus only on BPF program</div><div class='add'>+correctness and performance.</div><div class='add'>+</div><div class='add'>+The following are the high-level features supported by libbpf:</div><div class='add'>+</div><div class='add'>+* Provides high-level and low-level APIs for user space programs to interact</div><div class='add'>+  with BPF programs. The low-level APIs wrap all the bpf system call</div><div class='add'>+  functionality, which is useful when users need more fine-grained control</div><div class='add'>+  over the interactions between user space and BPF programs.</div><div class='add'>+* Provides overall support for the BPF object skeleton generated by bpftool.</div><div class='add'>+  The skeleton file simplifies the process for the user space programs to access</div><div class='add'>+  global variables and work with BPF programs.</div><div class='add'>+* Provides BPF-side APIS, including BPF helper definitions, BPF maps support,</div><div class='add'>+  and tracing helpers, allowing developers to simplify BPF code writing.</div><div class='add'>+* Supports BPF CO-RE mechanism, enabling BPF developers to write portable</div><div class='add'>+  BPF programs that can be compiled once and run across different kernel</div><div class='add'>+  versions.</div><div class='add'>+</div><div class='add'>+This document will delve into the above concepts in detail, providing a deeper</div><div class='add'>+understanding of the capabilities and advantages of libbpf and how it can help</div><div class='add'>+you develop BPF applications efficiently.</div><div class='add'>+</div><div class='add'>+BPF App Lifecycle and libbpf APIs</div><div class='add'>+==================================</div><div class='add'>+</div><div class='add'>+A BPF application consists of one or more BPF programs (either cooperating or</div><div class='add'>+completely independent), BPF maps, and global variables. The global</div><div class='add'>+variables are shared between all BPF programs, which allows them to cooperate on</div><div class='add'>+a common set of data. libbpf provides APIs that user space programs can use to</div><div class='add'>+manipulate the BPF programs by triggering different phases of a BPF application</div><div class='add'>+lifecycle.</div><div class='add'>+</div><div class='add'>+The following section provides a brief overview of each phase in the BPF life</div><div class='add'>+cycle:</div><div class='add'>+</div><div class='add'>+* **Open phase**: In this phase, libbpf parses the BPF</div><div class='add'>+  object file and discovers BPF maps, BPF programs, and global variables. After</div><div class='add'>+  a BPF app is opened, user space apps can make additional adjustments</div><div class='add'>+  (setting BPF program types, if necessary; pre-setting initial values for</div><div class='add'>+  global variables, etc.) before all the entities are created and loaded.</div><div class='add'>+</div><div class='add'>+* **Load phase**: In the load phase, libbpf creates BPF</div><div class='add'>+  maps, resolves various relocations, and verifies and loads BPF programs into</div><div class='add'>+  the kernel. At this point, libbpf validates all the parts of a BPF application</div><div class='add'>+  and loads the BPF program into the kernel, but no BPF program has yet been</div><div class='add'>+  executed. After the load phase, it’s possible to set up the initial BPF map</div><div class='add'>+  state without racing with the BPF program code execution.</div><div class='add'>+</div><div class='add'>+* **Attachment phase**: In this phase, libbpf</div><div class='add'>+  attaches BPF programs to various BPF hook points (e.g., tracepoints, kprobes,</div><div class='add'>+  cgroup hooks, network packet processing pipeline, etc.). During this</div><div class='add'>+  phase, BPF programs perform useful work such as processing</div><div class='add'>+  packets, or updating BPF maps and global variables that can be read from user</div><div class='add'>+  space.</div><div class='add'>+</div><div class='add'>+* **Tear down phase**: In the tear down phase,</div><div class='add'>+  libbpf detaches BPF programs and unloads them from the kernel. BPF maps are</div><div class='add'>+  destroyed, and all the resources used by the BPF app are freed.</div><div class='add'>+</div><div class='add'>+BPF Object Skeleton File</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+BPF skeleton is an alternative interface to libbpf APIs for working with BPF</div><div class='add'>+objects. Skeleton code abstract away generic libbpf APIs to significantly</div><div class='add'>+simplify code for manipulating BPF programs from user space. Skeleton code</div><div class='add'>+includes a bytecode representation of the BPF object file, simplifying the</div><div class='add'>+process of distributing your BPF code. With BPF bytecode embedded, there are no</div><div class='add'>+extra files to deploy along with your application binary.</div><div class='add'>+</div><div class='add'>+You can generate the skeleton header file ``(.skel.h)`` for a specific object</div><div class='add'>+file by passing the BPF object to the bpftool. The generated BPF skeleton</div><div class='add'>+provides the following custom functions that correspond to the BPF lifecycle,</div><div class='add'>+each of them prefixed with the specific object name:</div><div class='add'>+</div><div class='add'>+* ``&lt;name&gt;__open()`` – creates and opens BPF application (``&lt;name&gt;`` stands for</div><div class='add'>+  the specific bpf object name)</div><div class='add'>+* ``&lt;name&gt;__load()`` – instantiates, loads,and verifies BPF application parts</div><div class='add'>+* ``&lt;name&gt;__attach()`` – attaches all auto-attachable BPF programs (it’s</div><div class='add'>+  optional, you can have more control by using libbpf APIs directly)</div><div class='add'>+* ``&lt;name&gt;__destroy()`` – detaches all BPF programs and</div><div class='add'>+  frees up all used resources</div><div class='add'>+</div><div class='add'>+Using the skeleton code is the recommended way to work with bpf programs. Keep</div><div class='add'>+in mind, BPF skeleton provides access to the underlying BPF object, so whatever</div><div class='add'>+was possible to do with generic libbpf APIs is still possible even when the BPF</div><div class='add'>+skeleton is used. It's an additive convenience feature, with no syscalls, and no</div><div class='add'>+cumbersome code.</div><div class='add'>+</div><div class='add'>+Other Advantages of Using Skeleton File</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+* BPF skeleton provides an interface for user space programs to work with BPF</div><div class='add'>+  global variables. The skeleton code memory maps global variables as a struct</div><div class='add'>+  into user space. The struct interface allows user space programs to initialize</div><div class='add'>+  BPF programs before the BPF load phase and fetch and update data from user</div><div class='add'>+  space afterward.</div><div class='add'>+</div><div class='add'>+* The ``skel.h`` file reflects the object file structure by listing out the</div><div class='add'>+  available maps, programs, etc. BPF skeleton provides direct access to all the</div><div class='add'>+  BPF maps and BPF programs as struct fields. This eliminates the need for</div><div class='add'>+  string-based lookups with ``bpf_object_find_map_by_name()`` and</div><div class='add'>+  ``bpf_object_find_program_by_name()`` APIs, reducing errors due to BPF source</div><div class='add'>+  code and user-space code getting out of sync.</div><div class='add'>+</div><div class='add'>+* The embedded bytecode representation of the object file ensures that the</div><div class='add'>+  skeleton and the BPF object file are always in sync.</div><div class='add'>+</div><div class='add'>+BPF Helpers</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+libbpf provides BPF-side APIs that BPF programs can use to interact with the</div><div class='add'>+system. The BPF helpers definition allows developers to use them in BPF code as</div><div class='add'>+any other plain C function. For example, there are helper functions to print</div><div class='add'>+debugging messages, get the time since the system was booted, interact with BPF</div><div class='add'>+maps, manipulate network packets, etc.</div><div class='add'>+</div><div class='add'>+For a complete description of what the helpers do, the arguments they take, and</div><div class='add'>+the return value, see the `bpf-helpers</div><div class='add'>+&lt;https://man7.org/linux/man-pages/man7/bpf-helpers.7.html&gt;`_ man page.</div><div class='add'>+</div><div class='add'>+BPF CO-RE (Compile Once – Run Everywhere)</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+BPF programs work in the kernel space and have access to kernel memory and data</div><div class='add'>+structures. One limitation that BPF applications come across is the lack of</div><div class='add'>+portability across different kernel versions and configurations. `BCC</div><div class='add'>+&lt;https://github.com/iovisor/bcc/&gt;`_ is one of the solutions for BPF</div><div class='add'>+portability. However, it comes with runtime overhead and a large binary size</div><div class='add'>+from embedding the compiler with the application.</div><div class='add'>+</div><div class='add'>+libbpf steps up the BPF program portability by supporting the BPF CO-RE concept.</div><div class='add'>+BPF CO-RE brings together BTF type information, libbpf, and the compiler to</div><div class='add'>+produce a single executable binary that you can run on multiple kernel versions</div><div class='add'>+and configurations.</div><div class='add'>+</div><div class='add'>+To make BPF programs portable libbpf relies on the BTF type information of the</div><div class='add'>+running kernel. Kernel also exposes this self-describing authoritative BTF</div><div class='add'>+information through ``sysfs`` at ``/sys/kernel/btf/vmlinux``.</div><div class='add'>+</div><div class='add'>+You can generate the BTF information for the running kernel with the following</div><div class='add'>+command:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  $ bpftool btf dump file /sys/kernel/btf/vmlinux format c &gt; vmlinux.h</div><div class='add'>+</div><div class='add'>+The command generates a ``vmlinux.h`` header file with all kernel types</div><div class='add'>+(:doc:`BTF types &lt;../btf&gt;`) that the running kernel uses. Including</div><div class='add'>+``vmlinux.h`` in your BPF program eliminates dependency on system-wide kernel</div><div class='add'>+headers.</div><div class='add'>+</div><div class='add'>+libbpf enables portability of BPF programs by looking at the BPF program’s</div><div class='add'>+recorded BTF type and relocation information and matching them to BTF</div><div class='add'>+information (vmlinux) provided by the running kernel. libbpf then resolves and</div><div class='add'>+matches all the types and fields, and updates necessary offsets and other</div><div class='add'>+relocatable data to ensure that BPF program’s logic functions correctly for a</div><div class='add'>+specific kernel on the host. BPF CO-RE concept thus eliminates overhead</div><div class='add'>+associated with BPF development and allows developers to write portable BPF</div><div class='add'>+applications without modifications and runtime source code compilation on the</div><div class='add'>+target machine.</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to read the parent field of a kernel</div><div class='add'>+``task_struct`` using BPF CO-RE and libbf. The basic helper to read a field in a</div><div class='add'>+CO-RE relocatable manner is ``bpf_core_read(dst, sz, src)``, which will read</div><div class='add'>+``sz`` bytes from the field referenced by ``src`` into the memory pointed to by</div><div class='add'>+``dst``.</div><div class='add'>+</div><div class='add'>+.. code-block:: C</div><div class='add'>+   :emphasize-lines: 6</div><div class='add'>+</div><div class='add'>+    //...</div><div class='add'>+    struct task_struct *task = (void *)bpf_get_current_task();</div><div class='add'>+    struct task_struct *parent_task;</div><div class='add'>+    int err;</div><div class='add'>+</div><div class='add'>+    err = bpf_core_read(&amp;parent_task, sizeof(void *), &amp;task-&gt;parent);</div><div class='add'>+    if (err) {</div><div class='add'>+      /* handle error */</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+    /* parent_task contains the value of task-&gt;parent pointer */</div><div class='add'>+</div><div class='add'>+In the code snippet, we first get a pointer to the current ``task_struct`` using</div><div class='add'>+``bpf_get_current_task()``.  We then use ``bpf_core_read()`` to read the parent</div><div class='add'>+field of task struct into the ``parent_task`` variable. ``bpf_core_read()`` is</div><div class='add'>+just like ``bpf_probe_read_kernel()`` BPF helper, except it records information</div><div class='add'>+about the field that should be relocated on the target kernel. i.e, if the</div><div class='add'>+``parent`` field gets shifted to a different offset within</div><div class='add'>+``struct task_struct`` due to some new field added in front of it, libbpf will</div><div class='add'>+automatically adjust the actual offset to the proper value.</div><div class='add'>+</div><div class='add'>+Getting Started with libbpf</div><div class='add'>+===========================</div><div class='add'>+</div><div class='add'>+Check out the `libbpf-bootstrap &lt;https://github.com/libbpf/libbpf-bootstrap&gt;`_</div><div class='add'>+repository with simple examples of using libbpf to build various BPF</div><div class='add'>+applications.</div><div class='add'>+</div><div class='add'>+See also `libbpf API documentation</div><div class='add'>+&lt;https://libbpf.readthedocs.io/en/latest/api.html&gt;`_.</div><div class='add'>+</div><div class='add'>+libbpf and Rust</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+If you are building BPF applications in Rust, it is recommended to use the</div><div class='add'>+`Libbpf-rs &lt;https://github.com/libbpf/libbpf-rs&gt;`_ library instead of bindgen</div><div class='add'>+bindings directly to libbpf. Libbpf-rs wraps libbpf functionality in</div><div class='add'>+Rust-idiomatic interfaces and provides libbpf-cargo plugin to handle BPF code</div><div class='add'>+compilation and skeleton generation. Using Libbpf-rs will make building user</div><div class='add'>+space part of the BPF application easier. Note that the BPF program themselves</div><div class='add'>+must still be written in plain C.</div><div class='add'>+</div><div class='add'>+Additional Documentation</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+* `Program types and ELF Sections &lt;https://libbpf.readthedocs.io/en/latest/program_types.html&gt;`_</div><div class='add'>+* `API naming convention &lt;https://libbpf.readthedocs.io/en/latest/libbpf_naming_convention.html&gt;`_</div><div class='add'>+* `Building libbpf &lt;https://libbpf.readthedocs.io/en/latest/libbpf_build.html&gt;`_</div><div class='add'>+* `API documentation Convention &lt;https://libbpf.readthedocs.io/en/latest/libbpf_naming_convention.html#api-documentation-convention&gt;`_</div><div class='head'>diff --git a/Documentation/bpf/libbpf/program_types.rst b/Documentation/bpf/libbpf/program_types.rst<br/>new file mode 100644<br/>index 000000000000..ad4d4d5eecb0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/libbpf/program_types.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/libbpf/program_types.rst</a></div><div class='hunk'>@@ -0,0 +1,203 @@</div><div class='add'>+.. SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+.. _program_types_and_elf:</div><div class='add'>+</div><div class='add'>+Program Types and ELF Sections</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+The table below lists the program types, their attach types where relevant and the ELF section</div><div class='add'>+names supported by libbpf for them. The ELF section names follow these rules:</div><div class='add'>+</div><div class='add'>+- ``type`` is an exact match, e.g. ``SEC("socket")``</div><div class='add'>+- ``type+`` means it can be either exact ``SEC("type")`` or well-formed ``SEC("type/extras")``</div><div class='add'>+  with a '``/``' separator between ``type`` and ``extras``.</div><div class='add'>+</div><div class='add'>+When ``extras`` are specified, they provide details of how to auto-attach the BPF program.  The</div><div class='add'>+format of ``extras`` depends on the program type, e.g. ``SEC("tracepoint/&lt;category&gt;/&lt;name&gt;")``</div><div class='add'>+for tracepoints or ``SEC("usdt/&lt;path&gt;:&lt;provider&gt;:&lt;name&gt;")`` for USDT probes. The extras are</div><div class='add'>+described in more detail in the footnotes.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| Program Type                              | Attach Type                            | ELF Section Name                 | Sleepable |</div><div class='add'>++===========================================+========================================+==================================+===========+</div><div class='add'>+| ``BPF_PROG_TYPE_CGROUP_DEVICE``           | ``BPF_CGROUP_DEVICE``                  | ``cgroup/dev``                   |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_CGROUP_SKB``              |                                        | ``cgroup/skb``                   |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET_EGRESS``             | ``cgroup_skb/egress``            |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET_INGRESS``            | ``cgroup_skb/ingress``           |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_CGROUP_SOCKOPT``          | ``BPF_CGROUP_GETSOCKOPT``              | ``cgroup/getsockopt``            |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_SETSOCKOPT``              | ``cgroup/setsockopt``            |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_CGROUP_SOCK_ADDR``        | ``BPF_CGROUP_INET4_BIND``              | ``cgroup/bind4``                 |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET4_CONNECT``           | ``cgroup/connect4``              |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET4_GETPEERNAME``       | ``cgroup/getpeername4``          |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET4_GETSOCKNAME``       | ``cgroup/getsockname4``          |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET6_BIND``              | ``cgroup/bind6``                 |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET6_CONNECT``           | ``cgroup/connect6``              |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET6_GETPEERNAME``       | ``cgroup/getpeername6``          |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET6_GETSOCKNAME``       | ``cgroup/getsockname6``          |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_UDP4_RECVMSG``            | ``cgroup/recvmsg4``              |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_UDP4_SENDMSG``            | ``cgroup/sendmsg4``              |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_UDP6_RECVMSG``            | ``cgroup/recvmsg6``              |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_UDP6_SENDMSG``            | ``cgroup/sendmsg6``              |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_CGROUP_SOCK``             | ``BPF_CGROUP_INET4_POST_BIND``         | ``cgroup/post_bind4``            |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET6_POST_BIND``         | ``cgroup/post_bind6``            |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET_SOCK_CREATE``        | ``cgroup/sock_create``           |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``cgroup/sock``                  |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_CGROUP_INET_SOCK_RELEASE``       | ``cgroup/sock_release``          |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_CGROUP_SYSCTL``           | ``BPF_CGROUP_SYSCTL``                  | ``cgroup/sysctl``                |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_EXT``                     |                                        | ``freplace+`` [#fentry]_         |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_FLOW_DISSECTOR``          | ``BPF_FLOW_DISSECTOR``                 | ``flow_dissector``               |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_KPROBE``                  |                                        | ``kprobe+`` [#kprobe]_           |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``kretprobe+`` [#kprobe]_        |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``ksyscall+`` [#ksyscall]_       |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        |  ``kretsyscall+`` [#ksyscall]_   |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``uprobe+`` [#uprobe]_           |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``uprobe.s+`` [#uprobe]_         | Yes       |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``uretprobe+`` [#uprobe]_        |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``uretprobe.s+`` [#uprobe]_      | Yes       |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``usdt+`` [#usdt]_               |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_TRACE_KPROBE_MULTI``             | ``kprobe.multi+`` [#kpmulti]_    |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``kretprobe.multi+`` [#kpmulti]_ |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_LIRC_MODE2``              | ``BPF_LIRC_MODE2``                     | ``lirc_mode2``                   |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_LSM``                     | ``BPF_LSM_CGROUP``                     | ``lsm_cgroup+``                  |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_LSM_MAC``                        | ``lsm+`` [#lsm]_                 |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``lsm.s+`` [#lsm]_               | Yes       |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_LWT_IN``                  |                                        | ``lwt_in``                       |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_LWT_OUT``                 |                                        | ``lwt_out``                      |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_LWT_SEG6LOCAL``           |                                        | ``lwt_seg6local``                |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_LWT_XMIT``                |                                        | ``lwt_xmit``                     |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_PERF_EVENT``              |                                        | ``perf_event``                   |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_RAW_TRACEPOINT_WRITABLE`` |                                        | ``raw_tp.w+`` [#rawtp]_          |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``raw_tracepoint.w+``            |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_RAW_TRACEPOINT``          |                                        | ``raw_tp+`` [#rawtp]_            |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``raw_tracepoint+``              |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SCHED_ACT``               |                                        | ``action``                       |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SCHED_CLS``               |                                        | ``classifier``                   |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``tc``                           |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SK_LOOKUP``               | ``BPF_SK_LOOKUP``                      | ``sk_lookup``                    |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SK_MSG``                  | ``BPF_SK_MSG_VERDICT``                 | ``sk_msg``                       |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SK_REUSEPORT``            | ``BPF_SK_REUSEPORT_SELECT_OR_MIGRATE`` | ``sk_reuseport/migrate``         |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_SK_REUSEPORT_SELECT``            | ``sk_reuseport``                 |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SK_SKB``                  |                                        | ``sk_skb``                       |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_SK_SKB_STREAM_PARSER``           | ``sk_skb/stream_parser``         |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_SK_SKB_STREAM_VERDICT``          | ``sk_skb/stream_verdict``        |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SOCKET_FILTER``           |                                        | ``socket``                       |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SOCK_OPS``                | ``BPF_CGROUP_SOCK_OPS``                | ``sockops``                      |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_STRUCT_OPS``              |                                        | ``struct_ops+``                  |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_SYSCALL``                 |                                        | ``syscall``                      | Yes       |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_TRACEPOINT``              |                                        | ``tp+`` [#tp]_                   |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``tracepoint+`` [#tp]_           |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_TRACING``                 | ``BPF_MODIFY_RETURN``                  | ``fmod_ret+`` [#fentry]_         |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``fmod_ret.s+`` [#fentry]_       | Yes       |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_TRACE_FENTRY``                   | ``fentry+`` [#fentry]_           |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``fentry.s+`` [#fentry]_         | Yes       |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_TRACE_FEXIT``                    | ``fexit+`` [#fentry]_            |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``fexit.s+`` [#fentry]_          | Yes       |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_TRACE_ITER``                     | ``iter+`` [#iter]_               |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``iter.s+`` [#iter]_             | Yes       |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_TRACE_RAW_TP``                   | ``tp_btf+`` [#fentry]_           |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+| ``BPF_PROG_TYPE_XDP``                     | ``BPF_XDP_CPUMAP``                     | ``xdp.frags/cpumap``             |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``xdp/cpumap``                   |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_XDP_DEVMAP``                     | ``xdp.frags/devmap``             |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``xdp/devmap``                   |           |</div><div class='add'>++                                           +----------------------------------------+----------------------------------+-----------+</div><div class='add'>+|                                           | ``BPF_XDP``                            | ``xdp.frags``                    |           |</div><div class='add'>++                                           +                                        +----------------------------------+-----------+</div><div class='add'>+|                                           |                                        | ``xdp``                          |           |</div><div class='add'>++-------------------------------------------+----------------------------------------+----------------------------------+-----------+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. rubric:: Footnotes</div><div class='add'>+</div><div class='add'>+.. [#fentry] The ``fentry`` attach format is ``fentry[.s]/&lt;function&gt;``.</div><div class='add'>+.. [#kprobe] The ``kprobe`` attach format is ``kprobe/&lt;function&gt;[+&lt;offset&gt;]``. Valid</div><div class='add'>+             characters for ``function`` are ``a-zA-Z0-9_.`` and ``offset`` must be a valid</div><div class='add'>+             non-negative integer.</div><div class='add'>+.. [#ksyscall] The ``ksyscall`` attach format is ``ksyscall/&lt;syscall&gt;``.</div><div class='add'>+.. [#uprobe] The ``uprobe`` attach format is ``uprobe[.s]/&lt;path&gt;:&lt;function&gt;[+&lt;offset&gt;]``.</div><div class='add'>+.. [#usdt] The ``usdt`` attach format is ``usdt/&lt;path&gt;:&lt;provider&gt;:&lt;name&gt;``.</div><div class='add'>+.. [#kpmulti] The ``kprobe.multi`` attach format is ``kprobe.multi/&lt;pattern&gt;`` where ``pattern``</div><div class='add'>+              supports ``*`` and ``?`` wildcards. Valid characters for pattern are</div><div class='add'>+              ``a-zA-Z0-9_.*?``.</div><div class='add'>+.. [#lsm] The ``lsm`` attachment format is ``lsm[.s]/&lt;hook&gt;``.</div><div class='add'>+.. [#rawtp] The ``raw_tp`` attach format is ``raw_tracepoint[.w]/&lt;tracepoint&gt;``.</div><div class='add'>+.. [#tp] The ``tracepoint`` attach format is ``tracepoint/&lt;category&gt;/&lt;name&gt;``.</div><div class='add'>+.. [#iter] The ``iter`` attach format is ``iter[.s]/&lt;struct-name&gt;``.</div><div class='head'>diff --git a/Documentation/bpf/linux-notes.rst b/Documentation/bpf/linux-notes.rst<br/>new file mode 100644<br/>index 000000000000..508d009d3bed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/linux-notes.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/linux-notes.rst</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+.. contents::</div><div class='add'>+.. sectnum::</div><div class='add'>+</div><div class='add'>+==========================</div><div class='add'>+Linux implementation notes</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+This document provides more details specific to the Linux kernel implementation of the eBPF instruction set.</div><div class='add'>+</div><div class='add'>+Byte swap instructions</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+``BPF_FROM_LE`` and ``BPF_FROM_BE`` exist as aliases for ``BPF_TO_LE`` and ``BPF_TO_BE`` respectively.</div><div class='add'>+</div><div class='add'>+Jump instructions</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+``BPF_CALL | BPF_X | BPF_JMP`` (0x8d), where the helper function</div><div class='add'>+integer would be read from a specified register, is not currently supported</div><div class='add'>+by the verifier.  Any programs with this instruction will fail to load</div><div class='add'>+until such support is added.</div><div class='add'>+</div><div class='add'>+Maps</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+Linux only supports the 'map_val(map)' operation on array maps with a single element.</div><div class='add'>+</div><div class='add'>+Linux uses an fd_array to store maps associated with a BPF program. Thus,</div><div class='add'>+map_by_idx(imm) uses the fd at that index in the array.</div><div class='add'>+</div><div class='add'>+Variables</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+The following 64-bit immediate instruction specifies that a variable address,</div><div class='add'>+which corresponds to some integer stored in the 'imm' field, should be loaded:</div><div class='add'>+</div><div class='add'>+=========================  ======  ===  =========================================  ===========  ==============</div><div class='add'>+opcode construction        opcode  src  pseudocode                                 imm type     dst type</div><div class='add'>+=========================  ======  ===  =========================================  ===========  ==============</div><div class='add'>+BPF_IMM | BPF_DW | BPF_LD  0x18    0x3  dst = var_addr(imm)                        variable id  data pointer</div><div class='add'>+=========================  ======  ===  =========================================  ===========  ==============</div><div class='add'>+</div><div class='add'>+On Linux, this integer is a BTF ID.</div><div class='add'>+</div><div class='add'>+Legacy BPF Packet access instructions</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+As mentioned in the `ISA standard documentation &lt;instruction-set.rst#legacy-bpf-packet-access-instructions&gt;`_,</div><div class='add'>+Linux has special eBPF instructions for access to packet data that have been</div><div class='add'>+carried over from classic BPF to retain the performance of legacy socket</div><div class='add'>+filters running in the eBPF interpreter.</div><div class='add'>+</div><div class='add'>+The instructions come in two forms: ``BPF_ABS | &lt;size&gt; | BPF_LD`` and</div><div class='add'>+``BPF_IND | &lt;size&gt; | BPF_LD``.</div><div class='add'>+</div><div class='add'>+These instructions are used to access packet data and can only be used when</div><div class='add'>+the program context is a pointer to a networking packet.  ``BPF_ABS``</div><div class='add'>+accesses packet data at an absolute offset specified by the immediate data</div><div class='add'>+and ``BPF_IND`` access packet data at an offset that includes the value of</div><div class='add'>+a register in addition to the immediate data.</div><div class='add'>+</div><div class='add'>+These instructions have seven implicit operands:</div><div class='add'>+</div><div class='add'>+* Register R6 is an implicit input that must contain a pointer to a</div><div class='add'>+  struct sk_buff.</div><div class='add'>+* Register R0 is an implicit output which contains the data fetched from</div><div class='add'>+  the packet.</div><div class='add'>+* Registers R1-R5 are scratch registers that are clobbered by the</div><div class='add'>+  instruction.</div><div class='add'>+</div><div class='add'>+These instructions have an implicit program exit condition as well. If an</div><div class='add'>+eBPF program attempts access data beyond the packet boundary, the</div><div class='add'>+program execution will be aborted.</div><div class='add'>+</div><div class='add'>+``BPF_ABS | BPF_W | BPF_LD`` (0x20) means::</div><div class='add'>+</div><div class='add'>+  R0 = ntohl(*(u32 *) ((struct sk_buff *) R6-&gt;data + imm))</div><div class='add'>+</div><div class='add'>+where ``ntohl()`` converts a 32-bit value from network byte order to host byte order.</div><div class='add'>+</div><div class='add'>+``BPF_IND | BPF_W | BPF_LD`` (0x40) means::</div><div class='add'>+</div><div class='add'>+  R0 = ntohl(*(u32 *) ((struct sk_buff *) R6-&gt;data + src + imm))</div><div class='head'>diff --git a/Documentation/bpf/map_array.rst b/Documentation/bpf/map_array.rst<br/>new file mode 100644<br/>index 000000000000..f2f51a53e8ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_array.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_array.rst</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+================================================</div><div class='add'>+BPF_MAP_TYPE_ARRAY and BPF_MAP_TYPE_PERCPU_ARRAY</div><div class='add'>+================================================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_ARRAY`` was introduced in kernel version 3.19</div><div class='add'>+   - ``BPF_MAP_TYPE_PERCPU_ARRAY`` was introduced in version 4.6</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_ARRAY`` and ``BPF_MAP_TYPE_PERCPU_ARRAY`` provide generic array</div><div class='add'>+storage. The key type is an unsigned 32-bit integer (4 bytes) and the map is</div><div class='add'>+of constant size. The size of the array is defined in ``max_entries`` at</div><div class='add'>+creation time. All array elements are pre-allocated and zero initialized when</div><div class='add'>+created. ``BPF_MAP_TYPE_PERCPU_ARRAY`` uses a different memory region for each</div><div class='add'>+CPU whereas ``BPF_MAP_TYPE_ARRAY`` uses the same memory region. The value</div><div class='add'>+stored can be of any size, however, all array elements are aligned to 8</div><div class='add'>+bytes.</div><div class='add'>+</div><div class='add'>+Since kernel 5.5, memory mapping may be enabled for ``BPF_MAP_TYPE_ARRAY`` by</div><div class='add'>+setting the flag ``BPF_F_MMAPABLE``. The map definition is page-aligned and</div><div class='add'>+starts on the first page. Sufficient page-sized and page-aligned blocks of</div><div class='add'>+memory are allocated to store all array values, starting on the second page,</div><div class='add'>+which in some cases will result in over-allocation of memory. The benefit of</div><div class='add'>+using this is increased performance and ease of use since userspace programs</div><div class='add'>+would not be required to use helper functions to access and mutate data.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Array elements can be retrieved using the ``bpf_map_lookup_elem()`` helper.</div><div class='add'>+This helper returns a pointer into the array element, so to avoid data races</div><div class='add'>+with userspace reading the value, the user must use primitives like</div><div class='add'>+``__sync_fetch_and_add()`` when updating the value in-place.</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_update_elem(struct bpf_map *map, const void *key, const void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+Array elements can be updated using the ``bpf_map_update_elem()`` helper.</div><div class='add'>+</div><div class='add'>+``bpf_map_update_elem()`` returns 0 on success, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+Since the array is of constant size, ``bpf_map_delete_elem()`` is not supported.</div><div class='add'>+To clear an array element, you may use ``bpf_map_update_elem()`` to insert a</div><div class='add'>+zero value to that index.</div><div class='add'>+</div><div class='add'>+Per CPU Array</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Values stored in ``BPF_MAP_TYPE_ARRAY`` can be accessed by multiple programs</div><div class='add'>+across different CPUs. To restrict storage to a single CPU, you may use a</div><div class='add'>+``BPF_MAP_TYPE_PERCPU_ARRAY``.</div><div class='add'>+</div><div class='add'>+When using a ``BPF_MAP_TYPE_PERCPU_ARRAY`` the ``bpf_map_update_elem()`` and</div><div class='add'>+``bpf_map_lookup_elem()`` helpers automatically access the slot for the current</div><div class='add'>+CPU.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_percpu_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_map_lookup_percpu_elem(struct bpf_map *map, const void *key, u32 cpu)</div><div class='add'>+</div><div class='add'>+The ``bpf_map_lookup_percpu_elem()`` helper can be used to lookup the array</div><div class='add'>+value for a specific CPU. Returns value on success , or ``NULL`` if no entry was</div><div class='add'>+found or ``cpu`` is invalid.</div><div class='add'>+</div><div class='add'>+Concurrency</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Since kernel version 5.1, the BPF infrastructure provides ``struct bpf_spin_lock``</div><div class='add'>+to synchronize access.</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+Access from userspace uses libbpf APIs with the same names as above, with</div><div class='add'>+the map identified by its ``fd``.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Please see the ``tools/testing/selftests/bpf`` directory for functional</div><div class='add'>+examples. The code samples below demonstrate API usage.</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+This snippet shows how to declare an array in a BPF program.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_ARRAY);</div><div class='add'>+            __type(key, u32);</div><div class='add'>+            __type(value, long);</div><div class='add'>+            __uint(max_entries, 256);</div><div class='add'>+    } my_map SEC(".maps");</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+This example BPF program shows how to access an array element.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_prog(struct __sk_buff *skb)</div><div class='add'>+    {</div><div class='add'>+            struct iphdr ip;</div><div class='add'>+            int index;</div><div class='add'>+            long *value;</div><div class='add'>+</div><div class='add'>+            if (bpf_skb_load_bytes(skb, ETH_HLEN, &amp;ip, sizeof(ip)) &lt; 0)</div><div class='add'>+                    return 0;</div><div class='add'>+</div><div class='add'>+            index = ip.protocol;</div><div class='add'>+            value = bpf_map_lookup_elem(&amp;my_map, &amp;index);</div><div class='add'>+            if (value)</div><div class='add'>+                    __sync_fetch_and_add(value, skb-&gt;len);</div><div class='add'>+</div><div class='add'>+            return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+BPF_MAP_TYPE_ARRAY</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+This snippet shows how to create an array, using ``bpf_map_create_opts`` to</div><div class='add'>+set flags.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    #include &lt;bpf/libbpf.h&gt;</div><div class='add'>+    #include &lt;bpf/bpf.h&gt;</div><div class='add'>+</div><div class='add'>+    int create_array()</div><div class='add'>+    {</div><div class='add'>+            int fd;</div><div class='add'>+            LIBBPF_OPTS(bpf_map_create_opts, opts, .map_flags = BPF_F_MMAPABLE);</div><div class='add'>+</div><div class='add'>+            fd = bpf_map_create(BPF_MAP_TYPE_ARRAY,</div><div class='add'>+                                "example_array",       /* name */</div><div class='add'>+                                sizeof(__u32),         /* key size */</div><div class='add'>+                                sizeof(long),          /* value size */</div><div class='add'>+                                256,                   /* max entries */</div><div class='add'>+                                &amp;opts);                /* create opts */</div><div class='add'>+            return fd;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+This snippet shows how to initialize the elements of an array.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int initialize_array(int fd)</div><div class='add'>+    {</div><div class='add'>+            __u32 i;</div><div class='add'>+            long value;</div><div class='add'>+            int ret;</div><div class='add'>+</div><div class='add'>+            for (i = 0; i &lt; 256; i++) {</div><div class='add'>+                    value = i;</div><div class='add'>+                    ret = bpf_map_update_elem(fd, &amp;i, &amp;value, BPF_ANY);</div><div class='add'>+                    if (ret &lt; 0)</div><div class='add'>+                            return ret;</div><div class='add'>+            }</div><div class='add'>+</div><div class='add'>+            return ret;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+This snippet shows how to retrieve an element value from an array.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int lookup(int fd)</div><div class='add'>+    {</div><div class='add'>+            __u32 index = 42;</div><div class='add'>+            long value;</div><div class='add'>+            int ret;</div><div class='add'>+</div><div class='add'>+            ret = bpf_map_lookup_elem(fd, &amp;index, &amp;value);</div><div class='add'>+            if (ret &lt; 0)</div><div class='add'>+                    return ret;</div><div class='add'>+</div><div class='add'>+            /* use value here */</div><div class='add'>+            assert(value == 42);</div><div class='add'>+</div><div class='add'>+            return ret;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+BPF_MAP_TYPE_PERCPU_ARRAY</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+This snippet shows how to initialize the elements of a per CPU array.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int initialize_array(int fd)</div><div class='add'>+    {</div><div class='add'>+            int ncpus = libbpf_num_possible_cpus();</div><div class='add'>+            long values[ncpus];</div><div class='add'>+            __u32 i, j;</div><div class='add'>+            int ret;</div><div class='add'>+</div><div class='add'>+            for (i = 0; i &lt; 256 ; i++) {</div><div class='add'>+                    for (j = 0; j &lt; ncpus; j++)</div><div class='add'>+                            values[j] = i;</div><div class='add'>+                    ret = bpf_map_update_elem(fd, &amp;i, &amp;values, BPF_ANY);</div><div class='add'>+                    if (ret &lt; 0)</div><div class='add'>+                            return ret;</div><div class='add'>+            }</div><div class='add'>+</div><div class='add'>+            return ret;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+This snippet shows how to access the per CPU elements of an array value.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int lookup(int fd)</div><div class='add'>+    {</div><div class='add'>+            int ncpus = libbpf_num_possible_cpus();</div><div class='add'>+            __u32 index = 42, j;</div><div class='add'>+            long values[ncpus];</div><div class='add'>+            int ret;</div><div class='add'>+</div><div class='add'>+            ret = bpf_map_lookup_elem(fd, &amp;index, &amp;values);</div><div class='add'>+            if (ret &lt; 0)</div><div class='add'>+                    return ret;</div><div class='add'>+</div><div class='add'>+            for (j = 0; j &lt; ncpus; j++) {</div><div class='add'>+                    /* Use per CPU value here */</div><div class='add'>+                    assert(values[j] == 42);</div><div class='add'>+            }</div><div class='add'>+</div><div class='add'>+            return ret;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+Semantics</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+As shown in the example above, when accessing a ``BPF_MAP_TYPE_PERCPU_ARRAY``</div><div class='add'>+in userspace, each value is an array with ``ncpus`` elements.</div><div class='add'>+</div><div class='add'>+When calling ``bpf_map_update_elem()`` the flag ``BPF_NOEXIST`` can not be used</div><div class='add'>+for these maps.</div><div class='head'>diff --git a/Documentation/bpf/map_bloom_filter.rst b/Documentation/bpf/map_bloom_filter.rst<br/>new file mode 100644<br/>index 000000000000..c82487f2fe0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_bloom_filter.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_bloom_filter.rst</a></div><div class='hunk'>@@ -0,0 +1,174 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+=========================</div><div class='add'>+BPF_MAP_TYPE_BLOOM_FILTER</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_BLOOM_FILTER`` was introduced in kernel version 5.16</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_BLOOM_FILTER`` provides a BPF bloom filter map. Bloom</div><div class='add'>+filters are a space-efficient probabilistic data structure used to</div><div class='add'>+quickly test whether an element exists in a set. In a bloom filter,</div><div class='add'>+false positives are possible whereas false negatives are not.</div><div class='add'>+</div><div class='add'>+The bloom filter map does not have keys, only values. When the bloom</div><div class='add'>+filter map is created, it must be created with a ``key_size`` of 0.  The</div><div class='add'>+bloom filter map supports two operations:</div><div class='add'>+</div><div class='add'>+- push: adding an element to the map</div><div class='add'>+- peek: determining whether an element is present in the map</div><div class='add'>+</div><div class='add'>+BPF programs must use ``bpf_map_push_elem`` to add an element to the</div><div class='add'>+bloom filter map and ``bpf_map_peek_elem`` to query the map. These</div><div class='add'>+operations are exposed to userspace applications using the existing</div><div class='add'>+``bpf`` syscall in the following way:</div><div class='add'>+</div><div class='add'>+- ``BPF_MAP_UPDATE_ELEM`` -&gt; push</div><div class='add'>+- ``BPF_MAP_LOOKUP_ELEM`` -&gt; peek</div><div class='add'>+</div><div class='add'>+The ``max_entries`` size that is specified at map creation time is used</div><div class='add'>+to approximate a reasonable bitmap size for the bloom filter, and is not</div><div class='add'>+otherwise strictly enforced. If the user wishes to insert more entries</div><div class='add'>+into the bloom filter than ``max_entries``, this may lead to a higher</div><div class='add'>+false positive rate.</div><div class='add'>+</div><div class='add'>+The number of hashes to use for the bloom filter is configurable using</div><div class='add'>+the lower 4 bits of ``map_extra`` in ``union bpf_attr`` at map creation</div><div class='add'>+time. If no number is specified, the default used will be 5 hash</div><div class='add'>+functions. In general, using more hashes decreases both the false</div><div class='add'>+positive rate and the speed of a lookup.</div><div class='add'>+</div><div class='add'>+It is not possible to delete elements from a bloom filter map. A bloom</div><div class='add'>+filter map may be used as an inner map. The user is responsible for</div><div class='add'>+synchronising concurrent updates and lookups to ensure no false negative</div><div class='add'>+lookups occur.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+bpf_map_push_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_push_elem(struct bpf_map *map, const void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+A ``value`` can be added to a bloom filter using the</div><div class='add'>+``bpf_map_push_elem()`` helper. The ``flags`` parameter must be set to</div><div class='add'>+``BPF_ANY`` when adding an entry to the bloom filter. This helper</div><div class='add'>+returns ``0`` on success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_peek_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_peek_elem(struct bpf_map *map, void *value)</div><div class='add'>+</div><div class='add'>+The ``bpf_map_peek_elem()`` helper is used to determine whether</div><div class='add'>+``value`` is present in the bloom filter map. This helper returns ``0``</div><div class='add'>+if ``value`` is probably present in the map, or ``-ENOENT`` if ``value``</div><div class='add'>+is definitely not present in the map.</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_update_elem (int fd, const void *key, const void *value, __u64 flags)</div><div class='add'>+</div><div class='add'>+A userspace program can add a ``value`` to a bloom filter using libbpf's</div><div class='add'>+``bpf_map_update_elem`` function. The ``key`` parameter must be set to</div><div class='add'>+``NULL`` and ``flags`` must be set to ``BPF_ANY``. Returns ``0`` on</div><div class='add'>+success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_lookup_elem (int fd, const void *key, void *value)</div><div class='add'>+</div><div class='add'>+A userspace program can determine the presence of ``value`` in a bloom</div><div class='add'>+filter using libbpf's ``bpf_map_lookup_elem`` function. The ``key``</div><div class='add'>+parameter must be set to ``NULL``. Returns ``0`` if ``value`` is</div><div class='add'>+probably present in the map, or ``-ENOENT`` if ``value`` is definitely</div><div class='add'>+not present in the map.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+This snippet shows how to declare a bloom filter in a BPF program:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_BLOOM_FILTER);</div><div class='add'>+            __type(value, __u32);</div><div class='add'>+            __uint(max_entries, 1000);</div><div class='add'>+            __uint(map_extra, 3);</div><div class='add'>+    } bloom_filter SEC(".maps");</div><div class='add'>+</div><div class='add'>+This snippet shows how to determine presence of a value in a bloom</div><div class='add'>+filter in a BPF program:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    void *lookup(__u32 key)</div><div class='add'>+    {</div><div class='add'>+            if (bpf_map_peek_elem(&amp;bloom_filter, &amp;key) == 0) {</div><div class='add'>+                    /* Verify not a false positive and fetch an associated</div><div class='add'>+                     * value using a secondary lookup, e.g. in a hash table</div><div class='add'>+                     */</div><div class='add'>+                    return bpf_map_lookup_elem(&amp;hash_table, &amp;key);</div><div class='add'>+            }</div><div class='add'>+            return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+This snippet shows how to use libbpf to create a bloom filter map from</div><div class='add'>+userspace:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int create_bloom()</div><div class='add'>+    {</div><div class='add'>+            LIBBPF_OPTS(bpf_map_create_opts, opts,</div><div class='add'>+                        .map_extra = 3);             /* number of hashes */</div><div class='add'>+</div><div class='add'>+            return bpf_map_create(BPF_MAP_TYPE_BLOOM_FILTER,</div><div class='add'>+                                  "ipv6_bloom",      /* name */</div><div class='add'>+                                  0,                 /* key size, must be zero */</div><div class='add'>+                                  sizeof(ipv6_addr), /* value size */</div><div class='add'>+                                  10000,             /* max entries */</div><div class='add'>+                                  &amp;opts);            /* create options */</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+This snippet shows how to add an element to a bloom filter from</div><div class='add'>+userspace:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int add_element(struct bpf_map *bloom_map, __u32 value)</div><div class='add'>+    {</div><div class='add'>+            int bloom_fd = bpf_map__fd(bloom_map);</div><div class='add'>+            return bpf_map_update_elem(bloom_fd, NULL, &amp;value, BPF_ANY);</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+https://lwn.net/ml/bpf/20210831225005.2762202-1-joannekoong@fb.com/</div><div class='head'>diff --git a/Documentation/bpf/map_cgroup_storage.rst b/Documentation/bpf/map_cgroup_storage.rst<br/>index cab9543017bf..8e5fe532c07e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_cgroup_storage.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/map_cgroup_storage.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_cgroup_storage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_cgroup_storage.rst</a></div><div class='hunk'>@@ -31,7 +31,7 @@ The map uses key of type of either ``__u64 cgroup_inode_id`` or</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ``cgroup_inode_id`` is the inode id of the cgroup directory.</div><div class='del'>-``attach_type`` is the the program's attach type.</div><div class='add'>+``attach_type`` is the program's attach type.</div><div class='ctx'> </div><div class='ctx'> Linux 5.9 added support for type ``__u64 cgroup_inode_id`` as the key type.</div><div class='ctx'> When this key type is used, then all attach types of the particular cgroup and</div><div class='hunk'>@@ -155,7 +155,7 @@ However, the BPF program can still only associate with one map of each type</div><div class='ctx'> ``BPF_MAP_TYPE_CGROUP_STORAGE`` or more than one</div><div class='ctx'> ``BPF_MAP_TYPE_PERCPU_CGROUP_STORAGE``.</div><div class='ctx'> </div><div class='del'>-In all versions, userspace may use the the attach parameters of cgroup and</div><div class='add'>+In all versions, userspace may use the attach parameters of cgroup and</div><div class='ctx'> attach type pair in ``struct bpf_cgroup_storage_key`` as the key to the BPF map</div><div class='ctx'> APIs to read or update the storage for a given attachment. For Linux 5.9</div><div class='ctx'> attach type shared storages, only the first value in the struct, cgroup inode</div><div class='head'>diff --git a/Documentation/bpf/map_cgrp_storage.rst b/Documentation/bpf/map_cgrp_storage.rst<br/>new file mode 100644<br/>index 000000000000..5d3f603efffa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_cgrp_storage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_cgrp_storage.rst</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Meta Platforms, Inc. and affiliates.</div><div class='add'>+</div><div class='add'>+=========================</div><div class='add'>+BPF_MAP_TYPE_CGRP_STORAGE</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+The ``BPF_MAP_TYPE_CGRP_STORAGE`` map type represents a local fix-sized</div><div class='add'>+storage for cgroups. It is only available with ``CONFIG_CGROUPS``.</div><div class='add'>+The programs are made available by the same Kconfig. The</div><div class='add'>+data for a particular cgroup can be retrieved by looking up the map</div><div class='add'>+with that cgroup.</div><div class='add'>+</div><div class='add'>+This document describes the usage and semantics of the</div><div class='add'>+``BPF_MAP_TYPE_CGRP_STORAGE`` map type.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+The map key must be ``sizeof(int)`` representing a cgroup fd.</div><div class='add'>+To access the storage in a program, use ``bpf_cgrp_storage_get``::</div><div class='add'>+</div><div class='add'>+    void *bpf_cgrp_storage_get(struct bpf_map *map, struct cgroup *cgroup, void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+``flags`` could be 0 or ``BPF_LOCAL_STORAGE_GET_F_CREATE`` which indicates that</div><div class='add'>+a new local storage will be created if one does not exist.</div><div class='add'>+</div><div class='add'>+The local storage can be removed with ``bpf_cgrp_storage_delete``::</div><div class='add'>+</div><div class='add'>+    long bpf_cgrp_storage_delete(struct bpf_map *map, struct cgroup *cgroup)</div><div class='add'>+</div><div class='add'>+The map is available to all program types.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+A BPF program example with BPF_MAP_TYPE_CGRP_STORAGE::</div><div class='add'>+</div><div class='add'>+    #include &lt;vmlinux.h&gt;</div><div class='add'>+    #include &lt;bpf/bpf_helpers.h&gt;</div><div class='add'>+    #include &lt;bpf/bpf_tracing.h&gt;</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_CGRP_STORAGE);</div><div class='add'>+            __uint(map_flags, BPF_F_NO_PREALLOC);</div><div class='add'>+            __type(key, int);</div><div class='add'>+            __type(value, long);</div><div class='add'>+    } cgrp_storage SEC(".maps");</div><div class='add'>+</div><div class='add'>+    SEC("tp_btf/sys_enter")</div><div class='add'>+    int BPF_PROG(on_enter, struct pt_regs *regs, long id)</div><div class='add'>+    {</div><div class='add'>+            struct task_struct *task = bpf_get_current_task_btf();</div><div class='add'>+            long *ptr;</div><div class='add'>+</div><div class='add'>+            ptr = bpf_cgrp_storage_get(&amp;cgrp_storage, task-&gt;cgroups-&gt;dfl_cgrp, 0,</div><div class='add'>+                                       BPF_LOCAL_STORAGE_GET_F_CREATE);</div><div class='add'>+            if (ptr)</div><div class='add'>+                __sync_fetch_and_add(ptr, 1);</div><div class='add'>+</div><div class='add'>+            return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+Userspace accessing map declared above::</div><div class='add'>+</div><div class='add'>+    #include &lt;linux/bpf.h&gt;</div><div class='add'>+    #include &lt;linux/libbpf.h&gt;</div><div class='add'>+</div><div class='add'>+    __u32 map_lookup(struct bpf_map *map, int cgrp_fd)</div><div class='add'>+    {</div><div class='add'>+            __u32 *value;</div><div class='add'>+            value = bpf_map_lookup_elem(bpf_map__fd(map), &amp;cgrp_fd);</div><div class='add'>+            if (value)</div><div class='add'>+                return *value;</div><div class='add'>+            return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+Difference Between BPF_MAP_TYPE_CGRP_STORAGE and BPF_MAP_TYPE_CGROUP_STORAGE</div><div class='add'>+============================================================================</div><div class='add'>+</div><div class='add'>+The old cgroup storage map ``BPF_MAP_TYPE_CGROUP_STORAGE`` has been marked as</div><div class='add'>+deprecated (renamed to ``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED``). The new</div><div class='add'>+``BPF_MAP_TYPE_CGRP_STORAGE`` map should be used instead. The following</div><div class='add'>+illusates the main difference between ``BPF_MAP_TYPE_CGRP_STORAGE`` and</div><div class='add'>+``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED``.</div><div class='add'>+</div><div class='add'>+(1). ``BPF_MAP_TYPE_CGRP_STORAGE`` can be used by all program types while</div><div class='add'>+     ``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED`` is available only to cgroup program types</div><div class='add'>+     like BPF_CGROUP_INET_INGRESS or BPF_CGROUP_SOCK_OPS, etc.</div><div class='add'>+</div><div class='add'>+(2). ``BPF_MAP_TYPE_CGRP_STORAGE`` supports local storage for more than one</div><div class='add'>+     cgroup while ``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED`` only supports one cgroup</div><div class='add'>+     which is attached by a BPF program.</div><div class='add'>+</div><div class='add'>+(3). ``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED`` allocates local storage at attach time so</div><div class='add'>+     ``bpf_get_local_storage()`` always returns non-NULL local storage.</div><div class='add'>+     ``BPF_MAP_TYPE_CGRP_STORAGE`` allocates local storage at runtime so</div><div class='add'>+     it is possible that ``bpf_cgrp_storage_get()`` may return null local storage.</div><div class='add'>+     To avoid such null local storage issue, user space can do</div><div class='add'>+     ``bpf_map_update_elem()`` to pre-allocate local storage before a BPF program</div><div class='add'>+     is attached.</div><div class='add'>+</div><div class='add'>+(4). ``BPF_MAP_TYPE_CGRP_STORAGE`` supports deleting local storage by a BPF program</div><div class='add'>+     while ``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED`` only deletes storage during</div><div class='add'>+     prog detach time.</div><div class='add'>+</div><div class='add'>+So overall, ``BPF_MAP_TYPE_CGRP_STORAGE`` supports all ``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED``</div><div class='add'>+functionality and beyond. It is recommended to use ``BPF_MAP_TYPE_CGRP_STORAGE``</div><div class='add'>+instead of ``BPF_MAP_TYPE_CGROUP_STORAGE_DEPRECATED``.</div><div class='head'>diff --git a/Documentation/bpf/map_cpumap.rst b/Documentation/bpf/map_cpumap.rst<br/>new file mode 100644<br/>index 000000000000..923cfc8ab51f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_cpumap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_cpumap.rst</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+===================</div><div class='add'>+BPF_MAP_TYPE_CPUMAP</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_CPUMAP`` was introduced in kernel version 4.15</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/bpf/cpumap.c</div><div class='add'>+ :doc: cpu map</div><div class='add'>+</div><div class='add'>+An example use-case for this map type is software based Receive Side Scaling (RSS).</div><div class='add'>+</div><div class='add'>+The CPUMAP represents the CPUs in the system indexed as the map-key, and the</div><div class='add'>+map-value is the config setting (per CPUMAP entry). Each CPUMAP entry has a dedicated</div><div class='add'>+kernel thread bound to the given CPU to represent the remote CPU execution unit.</div><div class='add'>+</div><div class='add'>+Starting from Linux kernel version 5.9 the CPUMAP can run a second XDP program</div><div class='add'>+on the remote CPU. This allows an XDP program to split its processing across</div><div class='add'>+multiple CPUs. For example, a scenario where the initial CPU (that sees/receives</div><div class='add'>+the packets) needs to do minimal packet processing and the remote CPU (to which</div><div class='add'>+the packet is directed) can afford to spend more cycles processing the frame. The</div><div class='add'>+initial CPU is where the XDP redirect program is executed. The remote CPU</div><div class='add'>+receives raw ``xdp_frame`` objects.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+bpf_redirect_map()</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+     long bpf_redirect_map(struct bpf_map *map, u32 key, u64 flags)</div><div class='add'>+</div><div class='add'>+Redirect the packet to the endpoint referenced by ``map`` at index ``key``.</div><div class='add'>+For ``BPF_MAP_TYPE_CPUMAP`` this map contains references to CPUs.</div><div class='add'>+</div><div class='add'>+The lower two bits of ``flags`` are used as the return code if the map lookup</div><div class='add'>+fails. This is so that the return value can be one of the XDP program return</div><div class='add'>+codes up to ``XDP_TX``, as chosen by the caller.</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+.. note::</div><div class='add'>+    CPUMAP entries can only be updated/looked up/deleted from user space and not</div><div class='add'>+    from an eBPF program. Trying to call these functions from a kernel eBPF</div><div class='add'>+    program will result in the program failing to load and a verifier warning.</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_map_update_elem(int fd, const void *key, const void *value, __u64 flags);</div><div class='add'>+</div><div class='add'>+CPU entries can be added or updated using the ``bpf_map_update_elem()``</div><div class='add'>+helper. This helper replaces existing elements atomically. The ``value`` parameter</div><div class='add'>+can be ``struct bpf_cpumap_val``.</div><div class='add'>+</div><div class='add'>+ .. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct bpf_cpumap_val {</div><div class='add'>+        __u32 qsize;  /* queue size to remote target CPU */</div><div class='add'>+        union {</div><div class='add'>+            int   fd; /* prog fd on map write */</div><div class='add'>+            __u32 id; /* prog id on map read */</div><div class='add'>+        } bpf_prog;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+The flags argument can be one of the following:</div><div class='add'>+  - BPF_ANY: Create a new element or update an existing element.</div><div class='add'>+  - BPF_NOEXIST: Create a new element only if it did not exist.</div><div class='add'>+  - BPF_EXIST: Update an existing element.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_map_lookup_elem(int fd, const void *key, void *value);</div><div class='add'>+</div><div class='add'>+CPU entries can be retrieved using the ``bpf_map_lookup_elem()``</div><div class='add'>+helper.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_map_delete_elem(int fd, const void *key);</div><div class='add'>+</div><div class='add'>+CPU entries can be deleted using the ``bpf_map_delete_elem()``</div><div class='add'>+helper. This helper will return 0 on success, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+Kernel</div><div class='add'>+------</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to declare a ``BPF_MAP_TYPE_CPUMAP`` called</div><div class='add'>+``cpu_map`` and how to redirect packets to a remote CPU using a round robin scheme.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   struct {</div><div class='add'>+        __uint(type, BPF_MAP_TYPE_CPUMAP);</div><div class='add'>+        __type(key, __u32);</div><div class='add'>+        __type(value, struct bpf_cpumap_val);</div><div class='add'>+        __uint(max_entries, 12);</div><div class='add'>+    } cpu_map SEC(".maps");</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+        __uint(type, BPF_MAP_TYPE_ARRAY);</div><div class='add'>+        __type(key, __u32);</div><div class='add'>+        __type(value, __u32);</div><div class='add'>+        __uint(max_entries, 12);</div><div class='add'>+    } cpus_available SEC(".maps");</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+        __uint(type, BPF_MAP_TYPE_PERCPU_ARRAY);</div><div class='add'>+        __type(key, __u32);</div><div class='add'>+        __type(value, __u32);</div><div class='add'>+        __uint(max_entries, 1);</div><div class='add'>+    } cpus_iterator SEC(".maps");</div><div class='add'>+</div><div class='add'>+    SEC("xdp")</div><div class='add'>+    int  xdp_redir_cpu_round_robin(struct xdp_md *ctx)</div><div class='add'>+    {</div><div class='add'>+        __u32 key = 0;</div><div class='add'>+        __u32 cpu_dest = 0;</div><div class='add'>+        __u32 *cpu_selected, *cpu_iterator;</div><div class='add'>+        __u32 cpu_idx;</div><div class='add'>+</div><div class='add'>+        cpu_iterator = bpf_map_lookup_elem(&amp;cpus_iterator, &amp;key);</div><div class='add'>+        if (!cpu_iterator)</div><div class='add'>+            return XDP_ABORTED;</div><div class='add'>+        cpu_idx = *cpu_iterator;</div><div class='add'>+</div><div class='add'>+        *cpu_iterator += 1;</div><div class='add'>+        if (*cpu_iterator == bpf_num_possible_cpus())</div><div class='add'>+            *cpu_iterator = 0;</div><div class='add'>+</div><div class='add'>+        cpu_selected = bpf_map_lookup_elem(&amp;cpus_available, &amp;cpu_idx);</div><div class='add'>+        if (!cpu_selected)</div><div class='add'>+            return XDP_ABORTED;</div><div class='add'>+        cpu_dest = *cpu_selected;</div><div class='add'>+</div><div class='add'>+        if (cpu_dest &gt;= bpf_num_possible_cpus())</div><div class='add'>+            return XDP_ABORTED;</div><div class='add'>+</div><div class='add'>+        return bpf_redirect_map(&amp;cpu_map, cpu_dest, 0);</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to dynamically set the max_entries for a</div><div class='add'>+CPUMAP to the max number of cpus available on the system.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int set_max_cpu_entries(struct bpf_map *cpu_map)</div><div class='add'>+    {</div><div class='add'>+        if (bpf_map__set_max_entries(cpu_map, libbpf_num_possible_cpus()) &lt; 0) {</div><div class='add'>+            fprintf(stderr, "Failed to set max entries for cpu_map map: %s",</div><div class='add'>+                strerror(errno));</div><div class='add'>+            return -1;</div><div class='add'>+        }</div><div class='add'>+        return 0;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+- https://developers.redhat.com/blog/2021/05/13/receive-side-scaling-rss-with-ebpf-and-cpumap#redirecting_into_a_cpumap</div><div class='head'>diff --git a/Documentation/bpf/map_devmap.rst b/Documentation/bpf/map_devmap.rst<br/>new file mode 100644<br/>index 000000000000..927312c7b8c8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_devmap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_devmap.rst</a></div><div class='hunk'>@@ -0,0 +1,238 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+=================================================</div><div class='add'>+BPF_MAP_TYPE_DEVMAP and BPF_MAP_TYPE_DEVMAP_HASH</div><div class='add'>+=================================================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_DEVMAP`` was introduced in kernel version 4.14</div><div class='add'>+   - ``BPF_MAP_TYPE_DEVMAP_HASH`` was introduced in kernel version 5.4</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_DEVMAP`` and ``BPF_MAP_TYPE_DEVMAP_HASH`` are BPF maps primarily</div><div class='add'>+used as backend maps for the XDP BPF helper call ``bpf_redirect_map()``.</div><div class='add'>+``BPF_MAP_TYPE_DEVMAP`` is backed by an array that uses the key as</div><div class='add'>+the index to lookup a reference to a net device. While ``BPF_MAP_TYPE_DEVMAP_HASH``</div><div class='add'>+is backed by a hash table that uses a key to lookup a reference to a net device.</div><div class='add'>+The user provides either &lt;``key``/ ``ifindex``&gt; or &lt;``key``/ ``struct bpf_devmap_val``&gt;</div><div class='add'>+pairs to update the maps with new net devices.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    - The key to a hash map doesn't have to be an ``ifindex``.</div><div class='add'>+    - While ``BPF_MAP_TYPE_DEVMAP_HASH`` allows for densely packing the net devices</div><div class='add'>+      it comes at the cost of a hash of the key when performing a look up.</div><div class='add'>+</div><div class='add'>+The setup and packet enqueue/send code is shared between the two types of</div><div class='add'>+devmap; only the lookup and insertion is different.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+bpf_redirect_map()</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_redirect_map(struct bpf_map *map, u32 key, u64 flags)</div><div class='add'>+</div><div class='add'>+Redirect the packet to the endpoint referenced by ``map`` at index ``key``.</div><div class='add'>+For ``BPF_MAP_TYPE_DEVMAP`` and ``BPF_MAP_TYPE_DEVMAP_HASH`` this map contains</div><div class='add'>+references to net devices (for forwarding packets through other ports).</div><div class='add'>+</div><div class='add'>+The lower two bits of *flags* are used as the return code if the map lookup</div><div class='add'>+fails. This is so that the return value can be one of the XDP program return</div><div class='add'>+codes up to ``XDP_TX``, as chosen by the caller. The higher bits of ``flags``</div><div class='add'>+can be set to ``BPF_F_BROADCAST`` or ``BPF_F_EXCLUDE_INGRESS`` as defined</div><div class='add'>+below.</div><div class='add'>+</div><div class='add'>+With ``BPF_F_BROADCAST`` the packet will be broadcast to all the interfaces</div><div class='add'>+in the map, with ``BPF_F_EXCLUDE_INGRESS`` the ingress interface will be excluded</div><div class='add'>+from the broadcast.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    - The key is ignored if BPF_F_BROADCAST is set.</div><div class='add'>+    - The broadcast feature can also be used to implement multicast forwarding:</div><div class='add'>+      simply create multiple DEVMAPs, each one corresponding to a single multicast group.</div><div class='add'>+</div><div class='add'>+This helper will return ``XDP_REDIRECT`` on success, or the value of the two</div><div class='add'>+lower bits of the ``flags`` argument if the map lookup fails.</div><div class='add'>+</div><div class='add'>+More information about redirection can be found :doc:`redirect`</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Net device entries can be retrieved using the ``bpf_map_lookup_elem()``</div><div class='add'>+helper.</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+.. note::</div><div class='add'>+    DEVMAP entries can only be updated/deleted from user space and not</div><div class='add'>+    from an eBPF program. Trying to call these functions from a kernel eBPF</div><div class='add'>+    program will result in the program failing to load and a verifier warning.</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_update_elem(int fd, const void *key, const void *value, __u64 flags);</div><div class='add'>+</div><div class='add'>+Net device entries can be added or updated using the ``bpf_map_update_elem()``</div><div class='add'>+helper. This helper replaces existing elements atomically. The ``value`` parameter</div><div class='add'>+can be ``struct bpf_devmap_val`` or a simple ``int ifindex`` for backwards</div><div class='add'>+compatibility.</div><div class='add'>+</div><div class='add'>+ .. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct bpf_devmap_val {</div><div class='add'>+        __u32 ifindex;   /* device index */</div><div class='add'>+        union {</div><div class='add'>+            int   fd;  /* prog fd on map write */</div><div class='add'>+            __u32 id;  /* prog id on map read */</div><div class='add'>+        } bpf_prog;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+The ``flags`` argument can be one of the following:</div><div class='add'>+  - ``BPF_ANY``: Create a new element or update an existing element.</div><div class='add'>+  - ``BPF_NOEXIST``: Create a new element only if it did not exist.</div><div class='add'>+  - ``BPF_EXIST``: Update an existing element.</div><div class='add'>+</div><div class='add'>+DEVMAPs can associate a program with a device entry by adding a ``bpf_prog.fd``</div><div class='add'>+to ``struct bpf_devmap_val``. Programs are run after ``XDP_REDIRECT`` and have</div><div class='add'>+access to both Rx device and Tx device. The  program associated with the ``fd``</div><div class='add'>+must have type XDP with expected attach type ``xdp_devmap``.</div><div class='add'>+When a program is associated with a device index, the program is run on an</div><div class='add'>+``XDP_REDIRECT`` and before the buffer is added to the per-cpu queue. Examples</div><div class='add'>+of how to attach/use xdp_devmap progs can be found in the kernel selftests:</div><div class='add'>+</div><div class='add'>+- ``tools/testing/selftests/bpf/prog_tests/xdp_devmap_attach.c``</div><div class='add'>+- ``tools/testing/selftests/bpf/progs/test_xdp_with_devmap_helpers.c``</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+.. c:function::</div><div class='add'>+   int bpf_map_lookup_elem(int fd, const void *key, void *value);</div><div class='add'>+</div><div class='add'>+Net device entries can be retrieved using the ``bpf_map_lookup_elem()``</div><div class='add'>+helper.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+.. c:function::</div><div class='add'>+   int bpf_map_delete_elem(int fd, const void *key);</div><div class='add'>+</div><div class='add'>+Net device entries can be deleted using the ``bpf_map_delete_elem()``</div><div class='add'>+helper. This helper will return 0 on success, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to declare a ``BPF_MAP_TYPE_DEVMAP``</div><div class='add'>+called tx_port.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+        __uint(type, BPF_MAP_TYPE_DEVMAP);</div><div class='add'>+        __type(key, __u32);</div><div class='add'>+        __type(value, __u32);</div><div class='add'>+        __uint(max_entries, 256);</div><div class='add'>+    } tx_port SEC(".maps");</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to declare a ``BPF_MAP_TYPE_DEVMAP_HASH``</div><div class='add'>+called forward_map.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+        __uint(type, BPF_MAP_TYPE_DEVMAP_HASH);</div><div class='add'>+        __type(key, __u32);</div><div class='add'>+        __type(value, struct bpf_devmap_val);</div><div class='add'>+        __uint(max_entries, 32);</div><div class='add'>+    } forward_map SEC(".maps");</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+</div><div class='add'>+    The value type in the DEVMAP above is a ``struct bpf_devmap_val``</div><div class='add'>+</div><div class='add'>+The following code snippet shows a simple xdp_redirect_map program. This program</div><div class='add'>+would work with a user space program that populates the devmap ``forward_map`` based</div><div class='add'>+on ingress ifindexes. The BPF program (below) is redirecting packets using the</div><div class='add'>+ingress ``ifindex`` as the ``key``.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    SEC("xdp")</div><div class='add'>+    int xdp_redirect_map_func(struct xdp_md *ctx)</div><div class='add'>+    {</div><div class='add'>+        int index = ctx-&gt;ingress_ifindex;</div><div class='add'>+</div><div class='add'>+        return bpf_redirect_map(&amp;forward_map, index, 0);</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+The following code snippet shows a BPF program that is broadcasting packets to</div><div class='add'>+all the interfaces in the ``tx_port`` devmap.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    SEC("xdp")</div><div class='add'>+    int xdp_redirect_map_func(struct xdp_md *ctx)</div><div class='add'>+    {</div><div class='add'>+        return bpf_redirect_map(&amp;tx_port, 0, BPF_F_BROADCAST | BPF_F_EXCLUDE_INGRESS);</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to update a devmap called ``tx_port``.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int update_devmap(int ifindex, int redirect_ifindex)</div><div class='add'>+    {</div><div class='add'>+        int ret;</div><div class='add'>+</div><div class='add'>+        ret = bpf_map_update_elem(bpf_map__fd(tx_port), &amp;ifindex, &amp;redirect_ifindex, 0);</div><div class='add'>+        if (ret &lt; 0) {</div><div class='add'>+            fprintf(stderr, "Failed to update devmap_ value: %s\n",</div><div class='add'>+                strerror(errno));</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+        return ret;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to update a hash_devmap called ``forward_map``.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int update_devmap(int ifindex, int redirect_ifindex)</div><div class='add'>+    {</div><div class='add'>+        struct bpf_devmap_val devmap_val = { .ifindex = redirect_ifindex };</div><div class='add'>+        int ret;</div><div class='add'>+</div><div class='add'>+        ret = bpf_map_update_elem(bpf_map__fd(forward_map), &amp;ifindex, &amp;devmap_val, 0);</div><div class='add'>+        if (ret &lt; 0) {</div><div class='add'>+            fprintf(stderr, "Failed to update devmap_ value: %s\n",</div><div class='add'>+                strerror(errno));</div><div class='add'>+        }</div><div class='add'>+        return ret;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+- https://lwn.net/Articles/728146/</div><div class='add'>+- https://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf-next.git/commit/?id=6f9d451ab1a33728adb72d7ff66a7b374d665176</div><div class='add'>+- https://elixir.bootlin.com/linux/latest/source/net/core/filter.c#L4106</div><div class='head'>diff --git a/Documentation/bpf/map_hash.rst b/Documentation/bpf/map_hash.rst<br/>new file mode 100644<br/>index 000000000000..8669426264c6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_hash.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_hash.rst</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+===============================================</div><div class='add'>+BPF_MAP_TYPE_HASH, with PERCPU and LRU Variants</div><div class='add'>+===============================================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_HASH`` was introduced in kernel version 3.19</div><div class='add'>+   - ``BPF_MAP_TYPE_PERCPU_HASH`` was introduced in version 4.6</div><div class='add'>+   - Both ``BPF_MAP_TYPE_LRU_HASH`` and ``BPF_MAP_TYPE_LRU_PERCPU_HASH``</div><div class='add'>+     were introduced in version 4.10</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_HASH`` and ``BPF_MAP_TYPE_PERCPU_HASH`` provide general</div><div class='add'>+purpose hash map storage. Both the key and the value can be structs,</div><div class='add'>+allowing for composite keys and values.</div><div class='add'>+</div><div class='add'>+The kernel is responsible for allocating and freeing key/value pairs, up</div><div class='add'>+to the max_entries limit that you specify. Hash maps use pre-allocation</div><div class='add'>+of hash table elements by default. The ``BPF_F_NO_PREALLOC`` flag can be</div><div class='add'>+used to disable pre-allocation when it is too memory expensive.</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_PERCPU_HASH`` provides a separate value slot per</div><div class='add'>+CPU. The per-cpu values are stored internally in an array.</div><div class='add'>+</div><div class='add'>+The ``BPF_MAP_TYPE_LRU_HASH`` and ``BPF_MAP_TYPE_LRU_PERCPU_HASH``</div><div class='add'>+variants add LRU semantics to their respective hash tables. An LRU hash</div><div class='add'>+will automatically evict the least recently used entries when the hash</div><div class='add'>+table reaches capacity. An LRU hash maintains an internal LRU list that</div><div class='add'>+is used to select elements for eviction. This internal LRU list is</div><div class='add'>+shared across CPUs but it is possible to request a per CPU LRU list with</div><div class='add'>+the ``BPF_F_NO_COMMON_LRU`` flag when calling ``bpf_map_create``.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_update_elem(struct bpf_map *map, const void *key, const void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+Hash entries can be added or updated using the ``bpf_map_update_elem()``</div><div class='add'>+helper. This helper replaces existing elements atomically. The ``flags``</div><div class='add'>+parameter can be used to control the update behaviour:</div><div class='add'>+</div><div class='add'>+- ``BPF_ANY`` will create a new element or update an existing element</div><div class='add'>+- ``BPF_NOEXIST`` will create a new element only if one did not already</div><div class='add'>+  exist</div><div class='add'>+- ``BPF_EXIST`` will update an existing element</div><div class='add'>+</div><div class='add'>+``bpf_map_update_elem()`` returns 0 on success, or negative error in</div><div class='add'>+case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Hash entries can be retrieved using the ``bpf_map_lookup_elem()``</div><div class='add'>+helper. This helper returns a pointer to the value associated with</div><div class='add'>+``key``, or ``NULL`` if no entry was found.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_delete_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Hash entries can be deleted using the ``bpf_map_delete_elem()``</div><div class='add'>+helper. This helper will return 0 on success, or negative error in case</div><div class='add'>+of failure.</div><div class='add'>+</div><div class='add'>+Per CPU Hashes</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+For ``BPF_MAP_TYPE_PERCPU_HASH`` and ``BPF_MAP_TYPE_LRU_PERCPU_HASH``</div><div class='add'>+the ``bpf_map_update_elem()`` and ``bpf_map_lookup_elem()`` helpers</div><div class='add'>+automatically access the hash slot for the current CPU.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_percpu_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_map_lookup_percpu_elem(struct bpf_map *map, const void *key, u32 cpu)</div><div class='add'>+</div><div class='add'>+The ``bpf_map_lookup_percpu_elem()`` helper can be used to lookup the</div><div class='add'>+value in the hash slot for a specific CPU. Returns value associated with</div><div class='add'>+``key`` on ``cpu`` , or ``NULL`` if no entry was found or ``cpu`` is</div><div class='add'>+invalid.</div><div class='add'>+</div><div class='add'>+Concurrency</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+Values stored in ``BPF_MAP_TYPE_HASH`` can be accessed concurrently by</div><div class='add'>+programs running on different CPUs.  Since Kernel version 5.1, the BPF</div><div class='add'>+infrastructure provides ``struct bpf_spin_lock`` to synchronise access.</div><div class='add'>+See ``tools/testing/selftests/bpf/progs/test_spin_lock.c``.</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+bpf_map_get_next_key()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_get_next_key(int fd, const void *cur_key, void *next_key)</div><div class='add'>+</div><div class='add'>+In userspace, it is possible to iterate through the keys of a hash using</div><div class='add'>+libbpf's ``bpf_map_get_next_key()`` function. The first key can be fetched by</div><div class='add'>+calling ``bpf_map_get_next_key()`` with ``cur_key`` set to</div><div class='add'>+``NULL``. Subsequent calls will fetch the next key that follows the</div><div class='add'>+current key. ``bpf_map_get_next_key()`` returns 0 on success, -ENOENT if</div><div class='add'>+cur_key is the last key in the hash, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+Note that if ``cur_key`` gets deleted then ``bpf_map_get_next_key()``</div><div class='add'>+will instead return the *first* key in the hash table which is</div><div class='add'>+undesirable. It is recommended to use batched lookup if there is going</div><div class='add'>+to be key deletion intermixed with ``bpf_map_get_next_key()``.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Please see the ``tools/testing/selftests/bpf`` directory for functional</div><div class='add'>+examples.  The code snippets below demonstrates API usage.</div><div class='add'>+</div><div class='add'>+This example shows how to declare an LRU Hash with a struct key and a</div><div class='add'>+struct value.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    #include &lt;linux/bpf.h&gt;</div><div class='add'>+    #include &lt;bpf/bpf_helpers.h&gt;</div><div class='add'>+</div><div class='add'>+    struct key {</div><div class='add'>+        __u32 srcip;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    struct value {</div><div class='add'>+        __u64 packets;</div><div class='add'>+        __u64 bytes;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_LRU_HASH);</div><div class='add'>+            __uint(max_entries, 32);</div><div class='add'>+            __type(key, struct key);</div><div class='add'>+            __type(value, struct value);</div><div class='add'>+    } packet_stats SEC(".maps");</div><div class='add'>+</div><div class='add'>+This example shows how to create or update hash values using atomic</div><div class='add'>+instructions:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    static void update_stats(__u32 srcip, int bytes)</div><div class='add'>+    {</div><div class='add'>+            struct key key = {</div><div class='add'>+                    .srcip = srcip,</div><div class='add'>+            };</div><div class='add'>+            struct value *value = bpf_map_lookup_elem(&amp;packet_stats, &amp;key);</div><div class='add'>+</div><div class='add'>+            if (value) {</div><div class='add'>+                    __sync_fetch_and_add(&amp;value-&gt;packets, 1);</div><div class='add'>+                    __sync_fetch_and_add(&amp;value-&gt;bytes, bytes);</div><div class='add'>+            } else {</div><div class='add'>+                    struct value newval = { 1, bytes };</div><div class='add'>+</div><div class='add'>+                    bpf_map_update_elem(&amp;packet_stats, &amp;key, &amp;newval, BPF_NOEXIST);</div><div class='add'>+            }</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+Userspace walking the map elements from the map declared above:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    #include &lt;bpf/libbpf.h&gt;</div><div class='add'>+    #include &lt;bpf/bpf.h&gt;</div><div class='add'>+</div><div class='add'>+    static void walk_hash_elements(int map_fd)</div><div class='add'>+    {</div><div class='add'>+            struct key *cur_key = NULL;</div><div class='add'>+            struct key next_key;</div><div class='add'>+            struct value value;</div><div class='add'>+            int err;</div><div class='add'>+</div><div class='add'>+            for (;;) {</div><div class='add'>+                    err = bpf_map_get_next_key(map_fd, cur_key, &amp;next_key);</div><div class='add'>+                    if (err)</div><div class='add'>+                            break;</div><div class='add'>+</div><div class='add'>+                    bpf_map_lookup_elem(map_fd, &amp;next_key, &amp;value);</div><div class='add'>+</div><div class='add'>+                    // Use key and value here</div><div class='add'>+</div><div class='add'>+                    cur_key = &amp;next_key;</div><div class='add'>+            }</div><div class='add'>+    }</div><div class='head'>diff --git a/Documentation/bpf/map_lpm_trie.rst b/Documentation/bpf/map_lpm_trie.rst<br/>new file mode 100644<br/>index 000000000000..74d64a30f500<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_lpm_trie.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_lpm_trie.rst</a></div><div class='hunk'>@@ -0,0 +1,197 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+=====================</div><div class='add'>+BPF_MAP_TYPE_LPM_TRIE</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_LPM_TRIE`` was introduced in kernel version 4.11</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_LPM_TRIE`` provides a longest prefix match algorithm that</div><div class='add'>+can be used to match IP addresses to a stored set of prefixes.</div><div class='add'>+Internally, data is stored in an unbalanced trie of nodes that uses</div><div class='add'>+``prefixlen,data`` pairs as its keys. The ``data`` is interpreted in</div><div class='add'>+network byte order, i.e. big endian, so ``data[0]`` stores the most</div><div class='add'>+significant byte.</div><div class='add'>+</div><div class='add'>+LPM tries may be created with a maximum prefix length that is a multiple</div><div class='add'>+of 8, in the range from 8 to 2048. The key used for lookup and update</div><div class='add'>+operations is a ``struct bpf_lpm_trie_key``, extended by</div><div class='add'>+``max_prefixlen/8`` bytes.</div><div class='add'>+</div><div class='add'>+- For IPv4 addresses the data length is 4 bytes</div><div class='add'>+- For IPv6 addresses the data length is 16 bytes</div><div class='add'>+</div><div class='add'>+The value type stored in the LPM trie can be any user defined type.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   When creating a map of type ``BPF_MAP_TYPE_LPM_TRIE`` you must set the</div><div class='add'>+   ``BPF_F_NO_PREALLOC`` flag.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+The longest prefix entry for a given data value can be found using the</div><div class='add'>+``bpf_map_lookup_elem()`` helper. This helper returns a pointer to the</div><div class='add'>+value associated with the longest matching ``key``, or ``NULL`` if no</div><div class='add'>+entry was found.</div><div class='add'>+</div><div class='add'>+The ``key`` should have ``prefixlen`` set to ``max_prefixlen`` when</div><div class='add'>+performing longest prefix lookups. For example, when searching for the</div><div class='add'>+longest prefix match for an IPv4 address, ``prefixlen`` should be set to</div><div class='add'>+``32``.</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_update_elem(struct bpf_map *map, const void *key, const void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+Prefix entries can be added or updated using the ``bpf_map_update_elem()``</div><div class='add'>+helper. This helper replaces existing elements atomically.</div><div class='add'>+</div><div class='add'>+``bpf_map_update_elem()`` returns ``0`` on success, or negative error in</div><div class='add'>+case of failure.</div><div class='add'>+</div><div class='add'>+ .. note::</div><div class='add'>+    The flags parameter must be one of BPF_ANY, BPF_NOEXIST or BPF_EXIST,</div><div class='add'>+    but the value is ignored, giving BPF_ANY semantics.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_delete_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Prefix entries can be deleted using the ``bpf_map_delete_elem()``</div><div class='add'>+helper. This helper will return 0 on success, or negative error in case</div><div class='add'>+of failure.</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+Access from userspace uses libbpf APIs with the same names as above, with</div><div class='add'>+the map identified by ``fd``.</div><div class='add'>+</div><div class='add'>+bpf_map_get_next_key()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_get_next_key (int fd, const void *cur_key, void *next_key)</div><div class='add'>+</div><div class='add'>+A userspace program can iterate through the entries in an LPM trie using</div><div class='add'>+libbpf's ``bpf_map_get_next_key()`` function. The first key can be</div><div class='add'>+fetched by calling ``bpf_map_get_next_key()`` with ``cur_key`` set to</div><div class='add'>+``NULL``. Subsequent calls will fetch the next key that follows the</div><div class='add'>+current key. ``bpf_map_get_next_key()`` returns ``0`` on success,</div><div class='add'>+``-ENOENT`` if ``cur_key`` is the last key in the trie, or negative</div><div class='add'>+error in case of failure.</div><div class='add'>+</div><div class='add'>+``bpf_map_get_next_key()`` will iterate through the LPM trie elements</div><div class='add'>+from leftmost leaf first. This means that iteration will return more</div><div class='add'>+specific keys before less specific ones.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Please see ``tools/testing/selftests/bpf/test_lpm_map.c`` for examples</div><div class='add'>+of LPM trie usage from userspace. The code snippets below demonstrate</div><div class='add'>+API usage.</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The following BPF code snippet shows how to declare a new LPM trie for IPv4</div><div class='add'>+address prefixes:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    #include &lt;linux/bpf.h&gt;</div><div class='add'>+    #include &lt;bpf/bpf_helpers.h&gt;</div><div class='add'>+</div><div class='add'>+    struct ipv4_lpm_key {</div><div class='add'>+            __u32 prefixlen;</div><div class='add'>+            __u32 data;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_LPM_TRIE);</div><div class='add'>+            __type(key, struct ipv4_lpm_key);</div><div class='add'>+            __type(value, __u32);</div><div class='add'>+            __uint(map_flags, BPF_F_NO_PREALLOC);</div><div class='add'>+            __uint(max_entries, 255);</div><div class='add'>+    } ipv4_lpm_map SEC(".maps");</div><div class='add'>+</div><div class='add'>+The following BPF code snippet shows how to lookup by IPv4 address:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    void *lookup(__u32 ipaddr)</div><div class='add'>+    {</div><div class='add'>+            struct ipv4_lpm_key key = {</div><div class='add'>+                    .prefixlen = 32,</div><div class='add'>+                    .data = ipaddr</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            return bpf_map_lookup_elem(&amp;ipv4_lpm_map, &amp;key);</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+The following snippet shows how to insert an IPv4 prefix entry into an</div><div class='add'>+LPM trie:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int add_prefix_entry(int lpm_fd, __u32 addr, __u32 prefixlen, struct value *value)</div><div class='add'>+    {</div><div class='add'>+            struct ipv4_lpm_key ipv4_key = {</div><div class='add'>+                    .prefixlen = prefixlen,</div><div class='add'>+                    .data = addr</div><div class='add'>+            };</div><div class='add'>+            return bpf_map_update_elem(lpm_fd, &amp;ipv4_key, value, BPF_ANY);</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+The following snippet shows a userspace program walking through the entries</div><div class='add'>+of an LPM trie:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    #include &lt;bpf/libbpf.h&gt;</div><div class='add'>+    #include &lt;bpf/bpf.h&gt;</div><div class='add'>+</div><div class='add'>+    void iterate_lpm_trie(int map_fd)</div><div class='add'>+    {</div><div class='add'>+            struct ipv4_lpm_key *cur_key = NULL;</div><div class='add'>+            struct ipv4_lpm_key next_key;</div><div class='add'>+            struct value value;</div><div class='add'>+            int err;</div><div class='add'>+</div><div class='add'>+            for (;;) {</div><div class='add'>+                    err = bpf_map_get_next_key(map_fd, cur_key, &amp;next_key);</div><div class='add'>+                    if (err)</div><div class='add'>+                            break;</div><div class='add'>+</div><div class='add'>+                    bpf_map_lookup_elem(map_fd, &amp;next_key, &amp;value);</div><div class='add'>+</div><div class='add'>+                    /* Use key and value here */</div><div class='add'>+</div><div class='add'>+                    cur_key = &amp;next_key;</div><div class='add'>+            }</div><div class='add'>+    }</div><div class='head'>diff --git a/Documentation/bpf/map_of_maps.rst b/Documentation/bpf/map_of_maps.rst<br/>new file mode 100644<br/>index 000000000000..7b5617c2d017<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_of_maps.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_of_maps.rst</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+========================================================</div><div class='add'>+BPF_MAP_TYPE_ARRAY_OF_MAPS and BPF_MAP_TYPE_HASH_OF_MAPS</div><div class='add'>+========================================================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_ARRAY_OF_MAPS`` and ``BPF_MAP_TYPE_HASH_OF_MAPS`` were</div><div class='add'>+     introduced in kernel version 4.12</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_ARRAY_OF_MAPS`` and ``BPF_MAP_TYPE_HASH_OF_MAPS`` provide general</div><div class='add'>+purpose support for map in map storage. One level of nesting is supported, where</div><div class='add'>+an outer map contains instances of a single type of inner map, for example</div><div class='add'>+``array_of_maps-&gt;sock_map``.</div><div class='add'>+</div><div class='add'>+When creating an outer map, an inner map instance is used to initialize the</div><div class='add'>+metadata that the outer map holds about its inner maps. This inner map has a</div><div class='add'>+separate lifetime from the outer map and can be deleted after the outer map has</div><div class='add'>+been created.</div><div class='add'>+</div><div class='add'>+The outer map supports element lookup, update and delete from user space using</div><div class='add'>+the syscall API. A BPF program is only allowed to do element lookup in the outer</div><div class='add'>+map.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - Multi-level nesting is not supported.</div><div class='add'>+   - Any BPF map type can be used as an inner map, except for</div><div class='add'>+     ``BPF_MAP_TYPE_PROG_ARRAY``.</div><div class='add'>+   - A BPF program cannot update or delete outer map entries.</div><div class='add'>+</div><div class='add'>+For ``BPF_MAP_TYPE_ARRAY_OF_MAPS`` the key is an unsigned 32-bit integer index</div><div class='add'>+into the array. The array is a fixed size with ``max_entries`` elements that are</div><div class='add'>+zero initialized when created.</div><div class='add'>+</div><div class='add'>+For ``BPF_MAP_TYPE_HASH_OF_MAPS`` the key type can be chosen when defining the</div><div class='add'>+map. The kernel is responsible for allocating and freeing key/value pairs, up to</div><div class='add'>+the max_entries limit that you specify. Hash maps use pre-allocation of hash</div><div class='add'>+table elements by default. The ``BPF_F_NO_PREALLOC`` flag can be used to disable</div><div class='add'>+pre-allocation when it is too memory expensive.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF Helper</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Inner maps can be retrieved using the ``bpf_map_lookup_elem()`` helper. This</div><div class='add'>+helper returns a pointer to the inner map, or ``NULL`` if no entry was found.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Kernel BPF Example</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+This snippet shows how to create and initialise an array of devmaps in a BPF</div><div class='add'>+program. Note that the outer array can only be modified from user space using</div><div class='add'>+the syscall API.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct inner_map {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_DEVMAP);</div><div class='add'>+            __uint(max_entries, 10);</div><div class='add'>+            __type(key, __u32);</div><div class='add'>+            __type(value, __u32);</div><div class='add'>+    } inner_map1 SEC(".maps"), inner_map2 SEC(".maps");</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_ARRAY_OF_MAPS);</div><div class='add'>+            __uint(max_entries, 2);</div><div class='add'>+            __type(key, __u32);</div><div class='add'>+            __array(values, struct inner_map);</div><div class='add'>+    } outer_map SEC(".maps") = {</div><div class='add'>+            .values = { &amp;inner_map1,</div><div class='add'>+                        &amp;inner_map2 }</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+See ``progs/test_btf_map_in_map.c`` in ``tools/testing/selftests/bpf`` for more</div><div class='add'>+examples of declarative initialisation of outer maps.</div><div class='add'>+</div><div class='add'>+User Space</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+This snippet shows how to create an array based outer map:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int create_outer_array(int inner_fd) {</div><div class='add'>+            LIBBPF_OPTS(bpf_map_create_opts, opts, .inner_map_fd = inner_fd);</div><div class='add'>+            int fd;</div><div class='add'>+</div><div class='add'>+            fd = bpf_map_create(BPF_MAP_TYPE_ARRAY_OF_MAPS,</div><div class='add'>+                                "example_array",       /* name */</div><div class='add'>+                                sizeof(__u32),         /* key size */</div><div class='add'>+                                sizeof(__u32),         /* value size */</div><div class='add'>+                                256,                   /* max entries */</div><div class='add'>+                                &amp;opts);                /* create opts */</div><div class='add'>+            return fd;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+This snippet shows how to add an inner map to an outer map:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int add_devmap(int outer_fd, int index, const char *name) {</div><div class='add'>+            int fd;</div><div class='add'>+</div><div class='add'>+            fd = bpf_map_create(BPF_MAP_TYPE_DEVMAP, name,</div><div class='add'>+                                sizeof(__u32), sizeof(__u32), 256, NULL);</div><div class='add'>+            if (fd &lt; 0)</div><div class='add'>+                    return fd;</div><div class='add'>+</div><div class='add'>+            return bpf_map_update_elem(outer_fd, &amp;index, &amp;fd, BPF_ANY);</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+- https://lore.kernel.org/netdev/20170322170035.923581-3-kafai@fb.com/</div><div class='add'>+- https://lore.kernel.org/netdev/20170322170035.923581-4-kafai@fb.com/</div><div class='head'>diff --git a/Documentation/bpf/map_queue_stack.rst b/Documentation/bpf/map_queue_stack.rst<br/>new file mode 100644<br/>index 000000000000..8d14ed49d6e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_queue_stack.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_queue_stack.rst</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+=========================================</div><div class='add'>+BPF_MAP_TYPE_QUEUE and BPF_MAP_TYPE_STACK</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_QUEUE`` and ``BPF_MAP_TYPE_STACK`` were introduced</div><div class='add'>+     in kernel version 4.20</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_QUEUE`` provides FIFO storage and ``BPF_MAP_TYPE_STACK``</div><div class='add'>+provides LIFO storage for BPF programs. These maps support peek, pop and</div><div class='add'>+push operations that are exposed to BPF programs through the respective</div><div class='add'>+helpers. These operations are exposed to userspace applications using</div><div class='add'>+the existing ``bpf`` syscall in the following way:</div><div class='add'>+</div><div class='add'>+- ``BPF_MAP_LOOKUP_ELEM`` -&gt; peek</div><div class='add'>+- ``BPF_MAP_LOOKUP_AND_DELETE_ELEM`` -&gt; pop</div><div class='add'>+- ``BPF_MAP_UPDATE_ELEM`` -&gt; push</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_QUEUE`` and ``BPF_MAP_TYPE_STACK`` do not support</div><div class='add'>+``BPF_F_NO_PREALLOC``.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+bpf_map_push_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_push_elem(struct bpf_map *map, const void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+An element ``value`` can be added to a queue or stack using the</div><div class='add'>+``bpf_map_push_elem`` helper. The ``flags`` parameter must be set to</div><div class='add'>+``BPF_ANY`` or ``BPF_EXIST``. If ``flags`` is set to ``BPF_EXIST`` then,</div><div class='add'>+when the queue or stack is full, the oldest element will be removed to</div><div class='add'>+make room for ``value`` to be added. Returns ``0`` on success, or</div><div class='add'>+negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_peek_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_peek_elem(struct bpf_map *map, void *value)</div><div class='add'>+</div><div class='add'>+This helper fetches an element ``value`` from a queue or stack without</div><div class='add'>+removing it. Returns ``0`` on success, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+bpf_map_pop_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_map_pop_elem(struct bpf_map *map, void *value)</div><div class='add'>+</div><div class='add'>+This helper removes an element into ``value`` from a queue or</div><div class='add'>+stack. Returns ``0`` on success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_update_elem (int fd, const void *key, const void *value, __u64 flags)</div><div class='add'>+</div><div class='add'>+A userspace program can push ``value`` onto a queue or stack using libbpf's</div><div class='add'>+``bpf_map_update_elem`` function. The ``key`` parameter must be set to</div><div class='add'>+``NULL`` and ``flags`` must be set to ``BPF_ANY`` or ``BPF_EXIST``, with the</div><div class='add'>+same semantics as the ``bpf_map_push_elem`` kernel helper. Returns ``0`` on</div><div class='add'>+success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_lookup_elem (int fd, const void *key, void *value)</div><div class='add'>+</div><div class='add'>+A userspace program can peek at the ``value`` at the head of a queue or stack</div><div class='add'>+using the libbpf ``bpf_map_lookup_elem`` function. The ``key`` parameter must be</div><div class='add'>+set to ``NULL``.  Returns ``0`` on success, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_and_delete_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_lookup_and_delete_elem (int fd, const void *key, void *value)</div><div class='add'>+</div><div class='add'>+A userspace program can pop a ``value`` from the head of a queue or stack using</div><div class='add'>+the libbpf ``bpf_map_lookup_and_delete_elem`` function. The ``key`` parameter</div><div class='add'>+must be set to ``NULL``. Returns ``0`` on success, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+This snippet shows how to declare a queue in a BPF program:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_QUEUE);</div><div class='add'>+            __type(value, __u32);</div><div class='add'>+            __uint(max_entries, 10);</div><div class='add'>+    } queue SEC(".maps");</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Userspace</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+This snippet shows how to use libbpf's low-level API to create a queue from</div><div class='add'>+userspace:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int create_queue()</div><div class='add'>+    {</div><div class='add'>+            return bpf_map_create(BPF_MAP_TYPE_QUEUE,</div><div class='add'>+                                  "sample_queue", /* name */</div><div class='add'>+                                  0,              /* key size, must be zero */</div><div class='add'>+                                  sizeof(__u32),  /* value size */</div><div class='add'>+                                  10,             /* max entries */</div><div class='add'>+                                  NULL);          /* create options */</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+https://lwn.net/ml/netdev/153986858555.9127.14517764371945179514.stgit@kernel/</div><div class='head'>diff --git a/Documentation/bpf/map_sk_storage.rst b/Documentation/bpf/map_sk_storage.rst<br/>new file mode 100644<br/>index 000000000000..4e9d23ab9ecd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_sk_storage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_sk_storage.rst</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+=======================</div><div class='add'>+BPF_MAP_TYPE_SK_STORAGE</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_SK_STORAGE`` was introduced in kernel version 5.2</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_SK_STORAGE`` is used to provide socket-local storage for BPF</div><div class='add'>+programs. A map of type ``BPF_MAP_TYPE_SK_STORAGE`` declares the type of storage</div><div class='add'>+to be provided and acts as the handle for accessing the socket-local</div><div class='add'>+storage. The values for maps of type ``BPF_MAP_TYPE_SK_STORAGE`` are stored</div><div class='add'>+locally with each socket instead of with the map. The kernel is responsible for</div><div class='add'>+allocating storage for a socket when requested and for freeing the storage when</div><div class='add'>+either the map or the socket is deleted.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+  - The key type must be ``int`` and ``max_entries`` must be set to ``0``.</div><div class='add'>+  - The ``BPF_F_NO_PREALLOC`` flag must be used when creating a map for</div><div class='add'>+    socket-local storage.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+bpf_sk_storage_get()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   void *bpf_sk_storage_get(struct bpf_map *map, void *sk, void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+Socket-local storage for ``map`` can be retrieved from socket ``sk`` using the</div><div class='add'>+``bpf_sk_storage_get()`` helper. If the ``BPF_LOCAL_STORAGE_GET_F_CREATE``</div><div class='add'>+flag is used then ``bpf_sk_storage_get()`` will create the storage for ``sk``</div><div class='add'>+if it does not already exist. ``value`` can be used together with</div><div class='add'>+``BPF_LOCAL_STORAGE_GET_F_CREATE`` to initialize the storage value, otherwise</div><div class='add'>+it will be zero initialized. Returns a pointer to the storage on success, or</div><div class='add'>+``NULL`` in case of failure.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``sk`` is a kernel ``struct sock`` pointer for LSM or tracing programs.</div><div class='add'>+   - ``sk`` is a ``struct bpf_sock`` pointer for other program types.</div><div class='add'>+</div><div class='add'>+bpf_sk_storage_delete()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   long bpf_sk_storage_delete(struct bpf_map *map, void *sk)</div><div class='add'>+</div><div class='add'>+Socket-local storage for ``map`` can be deleted from socket ``sk`` using the</div><div class='add'>+``bpf_sk_storage_delete()`` helper. Returns ``0`` on success, or negative</div><div class='add'>+error in case of failure.</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_update_elem(int map_fd, const void *key, const void *value, __u64 flags)</div><div class='add'>+</div><div class='add'>+Socket-local storage for map ``map_fd`` can be added or updated locally to a</div><div class='add'>+socket using the ``bpf_map_update_elem()`` libbpf function. The socket is</div><div class='add'>+identified by a `socket` ``fd`` stored in the pointer ``key``. The pointer</div><div class='add'>+``value`` has the data to be added or updated to the socket ``fd``. The type</div><div class='add'>+and size of ``value`` should be the same as the value type of the map</div><div class='add'>+definition.</div><div class='add'>+</div><div class='add'>+The ``flags`` parameter can be used to control the update behaviour:</div><div class='add'>+</div><div class='add'>+- ``BPF_ANY`` will create storage for `socket` ``fd`` or update existing storage.</div><div class='add'>+- ``BPF_NOEXIST`` will create storage for `socket` ``fd`` only if it did not</div><div class='add'>+  already exist, otherwise the call will fail with ``-EEXIST``.</div><div class='add'>+- ``BPF_EXIST`` will update existing storage for `socket` ``fd`` if it already</div><div class='add'>+  exists, otherwise the call will fail with ``-ENOENT``.</div><div class='add'>+</div><div class='add'>+Returns ``0`` on success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_lookup_elem(int map_fd, const void *key, void *value)</div><div class='add'>+</div><div class='add'>+Socket-local storage for map ``map_fd`` can be retrieved from a socket using</div><div class='add'>+the ``bpf_map_lookup_elem()`` libbpf function. The storage is retrieved from</div><div class='add'>+the socket identified by a `socket` ``fd`` stored in the pointer</div><div class='add'>+``key``. Returns ``0`` on success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+   int bpf_map_delete_elem(int map_fd, const void *key)</div><div class='add'>+</div><div class='add'>+Socket-local storage for map ``map_fd`` can be deleted from a socket using the</div><div class='add'>+``bpf_map_delete_elem()`` libbpf function. The storage is deleted from the</div><div class='add'>+socket identified by a `socket` ``fd`` stored in the pointer ``key``. Returns</div><div class='add'>+``0`` on success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+This snippet shows how to declare socket-local storage in a BPF program:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    struct {</div><div class='add'>+            __uint(type, BPF_MAP_TYPE_SK_STORAGE);</div><div class='add'>+            __uint(map_flags, BPF_F_NO_PREALLOC);</div><div class='add'>+            __type(key, int);</div><div class='add'>+            __type(value, struct my_storage);</div><div class='add'>+    } socket_storage SEC(".maps");</div><div class='add'>+</div><div class='add'>+This snippet shows how to retrieve socket-local storage in a BPF program:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    SEC("sockops")</div><div class='add'>+    int _sockops(struct bpf_sock_ops *ctx)</div><div class='add'>+    {</div><div class='add'>+            struct my_storage *storage;</div><div class='add'>+            struct bpf_sock *sk;</div><div class='add'>+</div><div class='add'>+            sk = ctx-&gt;sk;</div><div class='add'>+            if (!sk)</div><div class='add'>+                    return 1;</div><div class='add'>+</div><div class='add'>+            storage = bpf_sk_storage_get(&amp;socket_storage, sk, 0,</div><div class='add'>+                                         BPF_LOCAL_STORAGE_GET_F_CREATE);</div><div class='add'>+            if (!storage)</div><div class='add'>+                    return 1;</div><div class='add'>+</div><div class='add'>+            /* Use 'storage' here */</div><div class='add'>+</div><div class='add'>+            return 1;</div><div class='add'>+    }</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Please see the ``tools/testing/selftests/bpf`` directory for functional</div><div class='add'>+examples.</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+https://lwn.net/ml/netdev/20190426171103.61892-1-kafai@fb.com/</div><div class='head'>diff --git a/Documentation/bpf/map_sockmap.rst b/Documentation/bpf/map_sockmap.rst<br/>new file mode 100644<br/>index 000000000000..cc92047c6630<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_sockmap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_sockmap.rst</a></div><div class='hunk'>@@ -0,0 +1,498 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright Red Hat</div><div class='add'>+</div><div class='add'>+==============================================</div><div class='add'>+BPF_MAP_TYPE_SOCKMAP and BPF_MAP_TYPE_SOCKHASH</div><div class='add'>+==============================================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_SOCKMAP`` was introduced in kernel version 4.14</div><div class='add'>+   - ``BPF_MAP_TYPE_SOCKHASH`` was introduced in kernel version 4.18</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_SOCKMAP`` and ``BPF_MAP_TYPE_SOCKHASH`` maps can be used to</div><div class='add'>+redirect skbs between sockets or to apply policy at the socket level based on</div><div class='add'>+the result of a BPF (verdict) program with the help of the BPF helpers</div><div class='add'>+``bpf_sk_redirect_map()``, ``bpf_sk_redirect_hash()``,</div><div class='add'>+``bpf_msg_redirect_map()`` and ``bpf_msg_redirect_hash()``.</div><div class='add'>+</div><div class='add'>+``BPF_MAP_TYPE_SOCKMAP`` is backed by an array that uses an integer key as the</div><div class='add'>+index to look up a reference to a ``struct sock``. The map values are socket</div><div class='add'>+descriptors. Similarly, ``BPF_MAP_TYPE_SOCKHASH`` is a hash backed BPF map that</div><div class='add'>+holds references to sockets via their socket descriptors.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    The value type is either __u32 or __u64; the latter (__u64) is to support</div><div class='add'>+    returning socket cookies to userspace. Returning the ``struct sock *`` that</div><div class='add'>+    the map holds to user-space is neither safe nor useful.</div><div class='add'>+</div><div class='add'>+These maps may have BPF programs attached to them, specifically a parser program</div><div class='add'>+and a verdict program. The parser program determines how much data has been</div><div class='add'>+parsed and therefore how much data needs to be queued to come to a verdict. The</div><div class='add'>+verdict program is essentially the redirect program and can return a verdict</div><div class='add'>+of ``__SK_DROP``, ``__SK_PASS``, or ``__SK_REDIRECT``.</div><div class='add'>+</div><div class='add'>+When a socket is inserted into one of these maps, its socket callbacks are</div><div class='add'>+replaced and a ``struct sk_psock`` is attached to it. Additionally, this</div><div class='add'>+``sk_psock`` inherits the programs that are attached to the map.</div><div class='add'>+</div><div class='add'>+A sock object may be in multiple maps, but can only inherit a single</div><div class='add'>+parse or verdict program. If adding a sock object to a map would result</div><div class='add'>+in having multiple parser programs the update will return an EBUSY error.</div><div class='add'>+</div><div class='add'>+The supported programs to attach to these maps are:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct sk_psock_progs {</div><div class='add'>+		struct bpf_prog *msg_parser;</div><div class='add'>+		struct bpf_prog *stream_parser;</div><div class='add'>+		struct bpf_prog *stream_verdict;</div><div class='add'>+		struct bpf_prog	*skb_verdict;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    Users are not allowed to attach ``stream_verdict`` and ``skb_verdict``</div><div class='add'>+    programs to the same map.</div><div class='add'>+</div><div class='add'>+The attach types for the map programs are:</div><div class='add'>+</div><div class='add'>+- ``msg_parser`` program - ``BPF_SK_MSG_VERDICT``.</div><div class='add'>+- ``stream_parser`` program - ``BPF_SK_SKB_STREAM_PARSER``.</div><div class='add'>+- ``stream_verdict`` program - ``BPF_SK_SKB_STREAM_VERDICT``.</div><div class='add'>+- ``skb_verdict`` program - ``BPF_SK_SKB_VERDICT``.</div><div class='add'>+</div><div class='add'>+There are additional helpers available to use with the parser and verdict</div><div class='add'>+programs: ``bpf_msg_apply_bytes()`` and ``bpf_msg_cork_bytes()``. With</div><div class='add'>+``bpf_msg_apply_bytes()`` BPF programs can tell the infrastructure how many</div><div class='add'>+bytes the given verdict should apply to. The helper ``bpf_msg_cork_bytes()``</div><div class='add'>+handles a different case where a BPF program cannot reach a verdict on a msg</div><div class='add'>+until it receives more bytes AND the program doesn't want to forward the packet</div><div class='add'>+until it is known to be good.</div><div class='add'>+</div><div class='add'>+Finally, the helpers ``bpf_msg_pull_data()`` and ``bpf_msg_push_data()`` are</div><div class='add'>+available to ``BPF_PROG_TYPE_SK_MSG`` BPF programs to pull in data and set the</div><div class='add'>+start and end pointers to given values or to add metadata to the ``struct</div><div class='add'>+sk_msg_buff *msg``.</div><div class='add'>+</div><div class='add'>+All these helpers will be described in more detail below.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+bpf_msg_redirect_map()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	long bpf_msg_redirect_map(struct sk_msg_buff *msg, struct bpf_map *map, u32 key, u64 flags)</div><div class='add'>+</div><div class='add'>+This helper is used in programs implementing policies at the socket level. If</div><div class='add'>+the message ``msg`` is allowed to pass (i.e., if the verdict BPF program</div><div class='add'>+returns ``SK_PASS``), redirect it to the socket referenced by ``map`` (of type</div><div class='add'>+``BPF_MAP_TYPE_SOCKMAP``) at index ``key``. Both ingress and egress interfaces</div><div class='add'>+can be used for redirection. The ``BPF_F_INGRESS`` value in ``flags`` is used</div><div class='add'>+to select the ingress path otherwise the egress path is selected. This is the</div><div class='add'>+only flag supported for now.</div><div class='add'>+</div><div class='add'>+Returns ``SK_PASS`` on success, or ``SK_DROP`` on error.</div><div class='add'>+</div><div class='add'>+bpf_sk_redirect_map()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_sk_redirect_map(struct sk_buff *skb, struct bpf_map *map, u32 key u64 flags)</div><div class='add'>+</div><div class='add'>+Redirect the packet to the socket referenced by ``map`` (of type</div><div class='add'>+``BPF_MAP_TYPE_SOCKMAP``) at index ``key``. Both ingress and egress interfaces</div><div class='add'>+can be used for redirection. The ``BPF_F_INGRESS`` value in ``flags`` is used</div><div class='add'>+to select the ingress path otherwise the egress path is selected. This is the</div><div class='add'>+only flag supported for now.</div><div class='add'>+</div><div class='add'>+Returns ``SK_PASS`` on success, or ``SK_DROP`` on error.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+socket entries of type ``struct sock *`` can be retrieved using the</div><div class='add'>+``bpf_map_lookup_elem()`` helper.</div><div class='add'>+</div><div class='add'>+bpf_sock_map_update()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_sock_map_update(struct bpf_sock_ops *skops, struct bpf_map *map, void *key, u64 flags)</div><div class='add'>+</div><div class='add'>+Add an entry to, or update a ``map`` referencing sockets. The ``skops`` is used</div><div class='add'>+as a new value for the entry associated to ``key``. The ``flags`` argument can</div><div class='add'>+be one of the following:</div><div class='add'>+</div><div class='add'>+- ``BPF_ANY``: Create a new element or update an existing element.</div><div class='add'>+- ``BPF_NOEXIST``: Create a new element only if it did not exist.</div><div class='add'>+- ``BPF_EXIST``: Update an existing element.</div><div class='add'>+</div><div class='add'>+If the ``map`` has BPF programs (parser and verdict), those will be inherited</div><div class='add'>+by the socket being added. If the socket is already attached to BPF programs,</div><div class='add'>+this results in an error.</div><div class='add'>+</div><div class='add'>+Returns 0 on success, or a negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_sock_hash_update()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_sock_hash_update(struct bpf_sock_ops *skops, struct bpf_map *map, void *key, u64 flags)</div><div class='add'>+</div><div class='add'>+Add an entry to, or update a sockhash ``map`` referencing sockets. The ``skops``</div><div class='add'>+is used as a new value for the entry associated to ``key``.</div><div class='add'>+</div><div class='add'>+The ``flags`` argument can be one of the following:</div><div class='add'>+</div><div class='add'>+- ``BPF_ANY``: Create a new element or update an existing element.</div><div class='add'>+- ``BPF_NOEXIST``: Create a new element only if it did not exist.</div><div class='add'>+- ``BPF_EXIST``: Update an existing element.</div><div class='add'>+</div><div class='add'>+If the ``map`` has BPF programs (parser and verdict), those will be inherited</div><div class='add'>+by the socket being added. If the socket is already attached to BPF programs,</div><div class='add'>+this results in an error.</div><div class='add'>+</div><div class='add'>+Returns 0 on success, or a negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_msg_redirect_hash()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_msg_redirect_hash(struct sk_msg_buff *msg, struct bpf_map *map, void *key, u64 flags)</div><div class='add'>+</div><div class='add'>+This helper is used in programs implementing policies at the socket level. If</div><div class='add'>+the message ``msg`` is allowed to pass (i.e., if the verdict BPF program returns</div><div class='add'>+``SK_PASS``), redirect it to the socket referenced by ``map`` (of type</div><div class='add'>+``BPF_MAP_TYPE_SOCKHASH``) using hash ``key``. Both ingress and egress</div><div class='add'>+interfaces can be used for redirection. The ``BPF_F_INGRESS`` value in</div><div class='add'>+``flags`` is used to select the ingress path otherwise the egress path is</div><div class='add'>+selected. This is the only flag supported for now.</div><div class='add'>+</div><div class='add'>+Returns ``SK_PASS`` on success, or ``SK_DROP`` on error.</div><div class='add'>+</div><div class='add'>+bpf_sk_redirect_hash()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_sk_redirect_hash(struct sk_buff *skb, struct bpf_map *map, void *key, u64 flags)</div><div class='add'>+</div><div class='add'>+This helper is used in programs implementing policies at the skb socket level.</div><div class='add'>+If the sk_buff ``skb`` is allowed to pass (i.e., if the verdict BPF program</div><div class='add'>+returns ``SK_PASS``), redirect it to the socket referenced by ``map`` (of type</div><div class='add'>+``BPF_MAP_TYPE_SOCKHASH``) using hash ``key``. Both ingress and egress</div><div class='add'>+interfaces can be used for redirection. The ``BPF_F_INGRESS`` value in</div><div class='add'>+``flags`` is used to select the ingress path otherwise the egress path is</div><div class='add'>+selected. This is the only flag supported for now.</div><div class='add'>+</div><div class='add'>+Returns ``SK_PASS`` on success, or ``SK_DROP`` on error.</div><div class='add'>+</div><div class='add'>+bpf_msg_apply_bytes()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_msg_apply_bytes(struct sk_msg_buff *msg, u32 bytes)</div><div class='add'>+</div><div class='add'>+For socket policies, apply the verdict of the BPF program to the next (number</div><div class='add'>+of ``bytes``) of message ``msg``. For example, this helper can be used in the</div><div class='add'>+following cases:</div><div class='add'>+</div><div class='add'>+- A single ``sendmsg()`` or ``sendfile()`` system call contains multiple</div><div class='add'>+  logical messages that the BPF program is supposed to read and for which it</div><div class='add'>+  should apply a verdict.</div><div class='add'>+- A BPF program only cares to read the first ``bytes`` of a ``msg``. If the</div><div class='add'>+  message has a large payload, then setting up and calling the BPF program</div><div class='add'>+  repeatedly for all bytes, even though the verdict is already known, would</div><div class='add'>+  create unnecessary overhead.</div><div class='add'>+</div><div class='add'>+Returns 0</div><div class='add'>+</div><div class='add'>+bpf_msg_cork_bytes()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_msg_cork_bytes(struct sk_msg_buff *msg, u32 bytes)</div><div class='add'>+</div><div class='add'>+For socket policies, prevent the execution of the verdict BPF program for</div><div class='add'>+message ``msg`` until the number of ``bytes`` have been accumulated.</div><div class='add'>+</div><div class='add'>+This can be used when one needs a specific number of bytes before a verdict can</div><div class='add'>+be assigned, even if the data spans multiple ``sendmsg()`` or ``sendfile()``</div><div class='add'>+calls.</div><div class='add'>+</div><div class='add'>+Returns 0</div><div class='add'>+</div><div class='add'>+bpf_msg_pull_data()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_msg_pull_data(struct sk_msg_buff *msg, u32 start, u32 end, u64 flags)</div><div class='add'>+</div><div class='add'>+For socket policies, pull in non-linear data from user space for ``msg`` and set</div><div class='add'>+pointers ``msg-&gt;data`` and ``msg-&gt;data_end`` to ``start`` and ``end`` bytes</div><div class='add'>+offsets into ``msg``, respectively.</div><div class='add'>+</div><div class='add'>+If a program of type ``BPF_PROG_TYPE_SK_MSG`` is run on a ``msg`` it can only</div><div class='add'>+parse data that the (``data``, ``data_end``) pointers have already consumed.</div><div class='add'>+For ``sendmsg()`` hooks this is likely the first scatterlist element. But for</div><div class='add'>+calls relying on the ``sendpage`` handler (e.g., ``sendfile()``) this will be</div><div class='add'>+the range (**0**, **0**) because the data is shared with user space and by</div><div class='add'>+default the objective is to avoid allowing user space to modify data while (or</div><div class='add'>+after) BPF verdict is being decided. This helper can be used to pull in data</div><div class='add'>+and to set the start and end pointers to given values. Data will be copied if</div><div class='add'>+necessary (i.e., if data was not linear and if start and end pointers do not</div><div class='add'>+point to the same chunk).</div><div class='add'>+</div><div class='add'>+A call to this helper is susceptible to change the underlying packet buffer.</div><div class='add'>+Therefore, at load time, all checks on pointers previously done by the verifier</div><div class='add'>+are invalidated and must be performed again, if the helper is used in</div><div class='add'>+combination with direct packet access.</div><div class='add'>+</div><div class='add'>+All values for ``flags`` are reserved for future usage, and must be left at</div><div class='add'>+zero.</div><div class='add'>+</div><div class='add'>+Returns 0 on success, or a negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Look up a socket entry in the sockmap or sockhash map.</div><div class='add'>+</div><div class='add'>+Returns the socket entry associated to ``key``, or NULL if no entry was found.</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	long bpf_map_update_elem(struct bpf_map *map, const void *key, const void *value, u64 flags)</div><div class='add'>+</div><div class='add'>+Add or update a socket entry in a sockmap or sockhash.</div><div class='add'>+</div><div class='add'>+The flags argument can be one of the following:</div><div class='add'>+</div><div class='add'>+- BPF_ANY: Create a new element or update an existing element.</div><div class='add'>+- BPF_NOEXIST: Create a new element only if it did not exist.</div><div class='add'>+- BPF_EXIST: Update an existing element.</div><div class='add'>+</div><div class='add'>+Returns 0 on success, or a negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_map_delete_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+Delete a socket entry from a sockmap or a sockhash.</div><div class='add'>+</div><div class='add'>+Returns	0 on success, or a negative error in case of failure.</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	int bpf_map_update_elem(int fd, const void *key, const void *value, __u64 flags)</div><div class='add'>+</div><div class='add'>+Sockmap entries can be added or updated using the ``bpf_map_update_elem()``</div><div class='add'>+function. The ``key`` parameter is the index value of the sockmap array. And the</div><div class='add'>+``value`` parameter is the FD value of that socket.</div><div class='add'>+</div><div class='add'>+Under the hood, the sockmap update function uses the socket FD value to</div><div class='add'>+retrieve the associated socket and its attached psock.</div><div class='add'>+</div><div class='add'>+The flags argument can be one of the following:</div><div class='add'>+</div><div class='add'>+- BPF_ANY: Create a new element or update an existing element.</div><div class='add'>+- BPF_NOEXIST: Create a new element only if it did not exist.</div><div class='add'>+- BPF_EXIST: Update an existing element.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_map_lookup_elem(int fd, const void *key, void *value)</div><div class='add'>+</div><div class='add'>+Sockmap entries can be retrieved using the ``bpf_map_lookup_elem()`` function.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+	The entry returned is a socket cookie rather than a socket itself.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_map_delete_elem(int fd, const void *key)</div><div class='add'>+</div><div class='add'>+Sockmap entries can be deleted using the ``bpf_map_delete_elem()``</div><div class='add'>+function.</div><div class='add'>+</div><div class='add'>+Returns 0 on success, or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+Several examples of the use of sockmap APIs can be found in:</div><div class='add'>+</div><div class='add'>+- `tools/testing/selftests/bpf/progs/test_sockmap_kern.h`_</div><div class='add'>+- `tools/testing/selftests/bpf/progs/sockmap_parse_prog.c`_</div><div class='add'>+- `tools/testing/selftests/bpf/progs/sockmap_verdict_prog.c`_</div><div class='add'>+- `tools/testing/selftests/bpf/progs/test_sockmap_listen.c`_</div><div class='add'>+- `tools/testing/selftests/bpf/progs/test_sockmap_update.c`_</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to declare a sockmap.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		__uint(type, BPF_MAP_TYPE_SOCKMAP);</div><div class='add'>+		__uint(max_entries, 1);</div><div class='add'>+		__type(key, __u32);</div><div class='add'>+		__type(value, __u64);</div><div class='add'>+	} sock_map_rx SEC(".maps");</div><div class='add'>+</div><div class='add'>+The following code snippet shows a sample parser program.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	SEC("sk_skb/stream_parser")</div><div class='add'>+	int bpf_prog_parser(struct __sk_buff *skb)</div><div class='add'>+	{</div><div class='add'>+		return skb-&gt;len;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+The following code snippet shows a simple verdict program that interacts with a</div><div class='add'>+sockmap to redirect traffic to another socket based on the local port.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	SEC("sk_skb/stream_verdict")</div><div class='add'>+	int bpf_prog_verdict(struct __sk_buff *skb)</div><div class='add'>+	{</div><div class='add'>+		__u32 lport = skb-&gt;local_port;</div><div class='add'>+		__u32 idx = 0;</div><div class='add'>+</div><div class='add'>+		if (lport == 10000)</div><div class='add'>+			return bpf_sk_redirect_map(skb, &amp;sock_map_rx, idx, 0);</div><div class='add'>+</div><div class='add'>+		return SK_PASS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to declare a sockhash map.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct socket_key {</div><div class='add'>+		__u32 src_ip;</div><div class='add'>+		__u32 dst_ip;</div><div class='add'>+		__u32 src_port;</div><div class='add'>+		__u32 dst_port;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		__uint(type, BPF_MAP_TYPE_SOCKHASH);</div><div class='add'>+		__uint(max_entries, 1);</div><div class='add'>+		__type(key, struct socket_key);</div><div class='add'>+		__type(value, __u64);</div><div class='add'>+	} sock_hash_rx SEC(".maps");</div><div class='add'>+</div><div class='add'>+The following code snippet shows a simple verdict program that interacts with a</div><div class='add'>+sockhash to redirect traffic to another socket based on a hash of some of the</div><div class='add'>+skb parameters.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	static inline</div><div class='add'>+	void extract_socket_key(struct __sk_buff *skb, struct socket_key *key)</div><div class='add'>+	{</div><div class='add'>+		key-&gt;src_ip = skb-&gt;remote_ip4;</div><div class='add'>+		key-&gt;dst_ip = skb-&gt;local_ip4;</div><div class='add'>+		key-&gt;src_port = skb-&gt;remote_port &gt;&gt; 16;</div><div class='add'>+		key-&gt;dst_port = (bpf_htonl(skb-&gt;local_port)) &gt;&gt; 16;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	SEC("sk_skb/stream_verdict")</div><div class='add'>+	int bpf_prog_verdict(struct __sk_buff *skb)</div><div class='add'>+	{</div><div class='add'>+		struct socket_key key;</div><div class='add'>+</div><div class='add'>+		extract_socket_key(skb, &amp;key);</div><div class='add'>+</div><div class='add'>+		return bpf_sk_redirect_hash(skb, &amp;sock_hash_rx, &amp;key, 0);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+Several examples of the use of sockmap APIs can be found in:</div><div class='add'>+</div><div class='add'>+- `tools/testing/selftests/bpf/prog_tests/sockmap_basic.c`_</div><div class='add'>+- `tools/testing/selftests/bpf/test_sockmap.c`_</div><div class='add'>+- `tools/testing/selftests/bpf/test_maps.c`_</div><div class='add'>+</div><div class='add'>+The following code sample shows how to create a sockmap, attach a parser and</div><div class='add'>+verdict program, as well as add a socket entry.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	int create_sample_sockmap(int sock, int parse_prog_fd, int verdict_prog_fd)</div><div class='add'>+	{</div><div class='add'>+		int index = 0;</div><div class='add'>+		int map, err;</div><div class='add'>+</div><div class='add'>+		map = bpf_map_create(BPF_MAP_TYPE_SOCKMAP, NULL, sizeof(int), sizeof(int), 1, NULL);</div><div class='add'>+		if (map &lt; 0) {</div><div class='add'>+			fprintf(stderr, "Failed to create sockmap: %s\n", strerror(errno));</div><div class='add'>+			return -1;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = bpf_prog_attach(parse_prog_fd, map, BPF_SK_SKB_STREAM_PARSER, 0);</div><div class='add'>+		if (err){</div><div class='add'>+			fprintf(stderr, "Failed to attach_parser_prog_to_map: %s\n", strerror(errno));</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = bpf_prog_attach(verdict_prog_fd, map, BPF_SK_SKB_STREAM_VERDICT, 0);</div><div class='add'>+		if (err){</div><div class='add'>+			fprintf(stderr, "Failed to attach_verdict_prog_to_map: %s\n", strerror(errno));</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		err = bpf_map_update_elem(map, &amp;index, &amp;sock, BPF_NOEXIST);</div><div class='add'>+		if (err) {</div><div class='add'>+			fprintf(stderr, "Failed to update sockmap: %s\n", strerror(errno));</div><div class='add'>+			goto out;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+	out:</div><div class='add'>+		close(map);</div><div class='add'>+		return err;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+- https://github.com/jrfastab/linux-kernel-xdp/commit/c89fd73cb9d2d7f3c716c3e00836f07b1aeb261f</div><div class='add'>+- https://lwn.net/Articles/731133/</div><div class='add'>+- http://vger.kernel.org/lpc_net2018_talks/ktls_bpf_paper.pdf</div><div class='add'>+- https://lwn.net/Articles/748628/</div><div class='add'>+- https://lore.kernel.org/bpf/20200218171023.844439-7-jakub@cloudflare.com/</div><div class='add'>+</div><div class='add'>+.. _`tools/testing/selftests/bpf/progs/test_sockmap_kern.h`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/progs/test_sockmap_kern.h</div><div class='add'>+.. _`tools/testing/selftests/bpf/progs/sockmap_parse_prog.c`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/progs/sockmap_parse_prog.c</div><div class='add'>+.. _`tools/testing/selftests/bpf/progs/sockmap_verdict_prog.c`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/progs/sockmap_verdict_prog.c</div><div class='add'>+.. _`tools/testing/selftests/bpf/prog_tests/sockmap_basic.c`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/prog_tests/sockmap_basic.c</div><div class='add'>+.. _`tools/testing/selftests/bpf/test_sockmap.c`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/test_sockmap.c</div><div class='add'>+.. _`tools/testing/selftests/bpf/test_maps.c`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/test_maps.c</div><div class='add'>+.. _`tools/testing/selftests/bpf/progs/test_sockmap_listen.c`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/progs/test_sockmap_listen.c</div><div class='add'>+.. _`tools/testing/selftests/bpf/progs/test_sockmap_update.c`: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/tools/testing/selftests/bpf/progs/test_sockmap_update.c</div><div class='head'>diff --git a/Documentation/bpf/map_xskmap.rst b/Documentation/bpf/map_xskmap.rst<br/>new file mode 100644<br/>index 000000000000..dc143edd9233<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/map_xskmap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/map_xskmap.rst</a></div><div class='hunk'>@@ -0,0 +1,192 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+===================</div><div class='add'>+BPF_MAP_TYPE_XSKMAP</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   - ``BPF_MAP_TYPE_XSKMAP`` was introduced in kernel version 4.18</div><div class='add'>+</div><div class='add'>+The ``BPF_MAP_TYPE_XSKMAP`` is used as a backend map for XDP BPF helper</div><div class='add'>+call ``bpf_redirect_map()`` and ``XDP_REDIRECT`` action, like 'devmap' and 'cpumap'.</div><div class='add'>+This map type redirects raw XDP frames to `AF_XDP`_ sockets (XSKs), a new type of</div><div class='add'>+address family in the kernel that allows redirection of frames from a driver to</div><div class='add'>+user space without having to traverse the full network stack. An AF_XDP socket</div><div class='add'>+binds to a single netdev queue. A mapping of XSKs to queues is shown below:</div><div class='add'>+</div><div class='add'>+.. code-block:: none</div><div class='add'>+</div><div class='add'>+    +---------------------------------------------------+</div><div class='add'>+    |     xsk A      |     xsk B       |      xsk C     |&lt;---+ User space</div><div class='add'>+    =========================================================|==========</div><div class='add'>+    |    Queue 0     |     Queue 1     |     Queue 2    |    |  Kernel</div><div class='add'>+    +---------------------------------------------------+    |</div><div class='add'>+    |                  Netdev eth0                      |    |</div><div class='add'>+    +---------------------------------------------------+    |</div><div class='add'>+    |                            +=============+        |    |</div><div class='add'>+    |                            | key |  xsk  |        |    |</div><div class='add'>+    |  +---------+               +=============+        |    |</div><div class='add'>+    |  |         |               |  0  | xsk A |        |    |</div><div class='add'>+    |  |         |               +-------------+        |    |</div><div class='add'>+    |  |         |               |  1  | xsk B |        |    |</div><div class='add'>+    |  | BPF     |-- redirect --&gt;+-------------+-------------+</div><div class='add'>+    |  | prog    |               |  2  | xsk C |        |</div><div class='add'>+    |  |         |               +-------------+        |</div><div class='add'>+    |  |         |                                      |</div><div class='add'>+    |  |         |                                      |</div><div class='add'>+    |  +---------+                                      |</div><div class='add'>+    |                                                   |</div><div class='add'>+    +---------------------------------------------------+</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    An AF_XDP socket that is bound to a certain &lt;netdev/queue_id&gt; will *only*</div><div class='add'>+    accept XDP frames from that &lt;netdev/queue_id&gt;. If an XDP program tries to redirect</div><div class='add'>+    from a &lt;netdev/queue_id&gt; other than what the socket is bound to, the frame will</div><div class='add'>+    not be received on the socket.</div><div class='add'>+</div><div class='add'>+Typically an XSKMAP is created per netdev. This map contains an array of XSK File</div><div class='add'>+Descriptors (FDs). The number of array elements is typically set or adjusted using</div><div class='add'>+the ``max_entries`` map parameter. For AF_XDP ``max_entries`` is equal to the number</div><div class='add'>+of queues supported by the netdev.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    Both the map key and map value size must be 4 bytes.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Kernel BPF</div><div class='add'>+----------</div><div class='add'>+bpf_redirect_map()</div><div class='add'>+^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    long bpf_redirect_map(struct bpf_map *map, u32 key, u64 flags)</div><div class='add'>+</div><div class='add'>+Redirect the packet to the endpoint referenced by ``map`` at index ``key``.</div><div class='add'>+For ``BPF_MAP_TYPE_XSKMAP`` this map contains references to XSK FDs</div><div class='add'>+for sockets attached to a netdev's queues.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    If the map is empty at an index, the packet is dropped. This means that it is</div><div class='add'>+    necessary to have an XDP program loaded with at least one XSK in the</div><div class='add'>+    XSKMAP to be able to get any traffic to user space through the socket.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    void *bpf_map_lookup_elem(struct bpf_map *map, const void *key)</div><div class='add'>+</div><div class='add'>+XSK entry references of type ``struct xdp_sock *`` can be retrieved using the</div><div class='add'>+``bpf_map_lookup_elem()`` helper.</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+.. note::</div><div class='add'>+    XSK entries can only be updated/deleted from user space and not from</div><div class='add'>+    a BPF program. Trying to call these functions from a kernel BPF program will</div><div class='add'>+    result in the program failing to load and a verifier warning.</div><div class='add'>+</div><div class='add'>+bpf_map_update_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	int bpf_map_update_elem(int fd, const void *key, const void *value, __u64 flags)</div><div class='add'>+</div><div class='add'>+XSK entries can be added or updated using the ``bpf_map_update_elem()``</div><div class='add'>+helper. The ``key`` parameter is equal to the queue_id of the queue the XSK</div><div class='add'>+is attaching to. And the ``value`` parameter is the FD value of that socket.</div><div class='add'>+</div><div class='add'>+Under the hood, the XSKMAP update function uses the XSK FD value to retrieve the</div><div class='add'>+associated ``struct xdp_sock`` instance.</div><div class='add'>+</div><div class='add'>+The flags argument can be one of the following:</div><div class='add'>+</div><div class='add'>+- BPF_ANY: Create a new element or update an existing element.</div><div class='add'>+- BPF_NOEXIST: Create a new element only if it did not exist.</div><div class='add'>+- BPF_EXIST: Update an existing element.</div><div class='add'>+</div><div class='add'>+bpf_map_lookup_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_map_lookup_elem(int fd, const void *key, void *value)</div><div class='add'>+</div><div class='add'>+Returns ``struct xdp_sock *`` or negative error in case of failure.</div><div class='add'>+</div><div class='add'>+bpf_map_delete_elem()</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+    int bpf_map_delete_elem(int fd, const void *key)</div><div class='add'>+</div><div class='add'>+XSK entries can be deleted using the ``bpf_map_delete_elem()``</div><div class='add'>+helper. This helper will return 0 on success, or negative error in case of</div><div class='add'>+failure.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    When `libxdp`_ deletes an XSK it also removes the associated socket</div><div class='add'>+    entry from the XSKMAP.</div><div class='add'>+</div><div class='add'>+Examples</div><div class='add'>+========</div><div class='add'>+Kernel</div><div class='add'>+------</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to declare a ``BPF_MAP_TYPE_XSKMAP`` called</div><div class='add'>+``xsks_map`` and how to redirect packets to an XSK.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct {</div><div class='add'>+		__uint(type, BPF_MAP_TYPE_XSKMAP);</div><div class='add'>+		__type(key, __u32);</div><div class='add'>+		__type(value, __u32);</div><div class='add'>+		__uint(max_entries, 64);</div><div class='add'>+	} xsks_map SEC(".maps");</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+	SEC("xdp")</div><div class='add'>+	int xsk_redir_prog(struct xdp_md *ctx)</div><div class='add'>+	{</div><div class='add'>+		__u32 index = ctx-&gt;rx_queue_index;</div><div class='add'>+</div><div class='add'>+		if (bpf_map_lookup_elem(&amp;xsks_map, &amp;index))</div><div class='add'>+			return bpf_redirect_map(&amp;xsks_map, index, 0);</div><div class='add'>+		return XDP_PASS;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+User space</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The following code snippet shows how to update an XSKMAP with an XSK entry.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	int update_xsks_map(struct bpf_map *xsks_map, int queue_id, int xsk_fd)</div><div class='add'>+	{</div><div class='add'>+		int ret;</div><div class='add'>+</div><div class='add'>+		ret = bpf_map_update_elem(bpf_map__fd(xsks_map), &amp;queue_id, &amp;xsk_fd, 0);</div><div class='add'>+		if (ret &lt; 0)</div><div class='add'>+			fprintf(stderr, "Failed to update xsks_map: %s\n", strerror(errno));</div><div class='add'>+</div><div class='add'>+		return ret;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+For an example on how create AF_XDP sockets, please see the AF_XDP-example and</div><div class='add'>+AF_XDP-forwarding programs in the `bpf-examples`_ directory in the `libxdp`_ repository.</div><div class='add'>+For a detailed explanation of the AF_XDP interface please see:</div><div class='add'>+</div><div class='add'>+- `libxdp-readme`_.</div><div class='add'>+- `AF_XDP`_ kernel documentation.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    The most comprehensive resource for using XSKMAPs and AF_XDP is `libxdp`_.</div><div class='add'>+</div><div class='add'>+.. _libxdp: https://github.com/xdp-project/xdp-tools/tree/master/lib/libxdp</div><div class='add'>+.. _AF_XDP: https://www.kernel.org/doc/html/latest/networking/af_xdp.html</div><div class='add'>+.. _bpf-examples: https://github.com/xdp-project/bpf-examples</div><div class='add'>+.. _libxdp-readme: https://github.com/xdp-project/xdp-tools/tree/master/lib/libxdp#using-af_xdp-sockets</div><div class='head'>diff --git a/Documentation/bpf/maps.rst b/Documentation/bpf/maps.rst<br/>index f41619e312ac..6f069f3d6f4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/maps.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/maps.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/maps.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/maps.rst</a></div><div class='hunk'>@@ -1,52 +1,82 @@</div><div class='ctx'> </div><div class='del'>-=========</div><div class='del'>-eBPF maps</div><div class='add'>+========</div><div class='add'>+BPF maps</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+BPF 'maps' provide generic storage of different types for sharing data between</div><div class='add'>+kernel and user space. There are several storage types available, including</div><div class='add'>+hash, array, bloom filter and radix-tree. Several of the map types exist to</div><div class='add'>+support specific BPF helpers that perform actions based on the map contents. The</div><div class='add'>+maps are accessed from BPF programs via BPF helpers which are documented in the</div><div class='add'>+`man-pages`_ for `bpf-helpers(7)`_.</div><div class='add'>+</div><div class='add'>+BPF maps are accessed from user space via the ``bpf`` syscall, which provides</div><div class='add'>+commands to create maps, lookup elements, update elements and delete elements.</div><div class='add'>+More details of the BPF syscall are available in `ebpf-syscall`_ and in the</div><div class='add'>+`man-pages`_ for `bpf(2)`_.</div><div class='add'>+</div><div class='add'>+Map Types</div><div class='ctx'> =========</div><div class='ctx'> </div><div class='del'>-'maps' is a generic storage of different types for sharing data between kernel</div><div class='del'>-and userspace.</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+   :glob:</div><div class='ctx'> </div><div class='del'>-The maps are accessed from user space via BPF syscall, which has commands:</div><div class='add'>+   map_*</div><div class='ctx'> </div><div class='del'>-- create a map with given type and attributes</div><div class='del'>-  ``map_fd = bpf(BPF_MAP_CREATE, union bpf_attr *attr, u32 size)``</div><div class='del'>-  using attr-&gt;map_type, attr-&gt;key_size, attr-&gt;value_size, attr-&gt;max_entries</div><div class='del'>-  returns process-local file descriptor or negative error</div><div class='add'>+Usage Notes</div><div class='add'>+===========</div><div class='ctx'> </div><div class='del'>-- lookup key in a given map</div><div class='del'>-  ``err = bpf(BPF_MAP_LOOKUP_ELEM, union bpf_attr *attr, u32 size)``</div><div class='del'>-  using attr-&gt;map_fd, attr-&gt;key, attr-&gt;value</div><div class='del'>-  returns zero and stores found elem into value or negative error</div><div class='add'>+.. c:function::</div><div class='add'>+   int bpf(int command, union bpf_attr *attr, u32 size)</div><div class='ctx'> </div><div class='del'>-- create or update key/value pair in a given map</div><div class='del'>-  ``err = bpf(BPF_MAP_UPDATE_ELEM, union bpf_attr *attr, u32 size)``</div><div class='del'>-  using attr-&gt;map_fd, attr-&gt;key, attr-&gt;value</div><div class='del'>-  returns zero or negative error</div><div class='add'>+Use the ``bpf()`` system call to perform the operation specified by</div><div class='add'>+``command``. The operation takes parameters provided in ``attr``. The ``size``</div><div class='add'>+argument is the size of the ``union bpf_attr`` in ``attr``.</div><div class='ctx'> </div><div class='del'>-- find and delete element by key in a given map</div><div class='del'>-  ``err = bpf(BPF_MAP_DELETE_ELEM, union bpf_attr *attr, u32 size)``</div><div class='del'>-  using attr-&gt;map_fd, attr-&gt;key</div><div class='add'>+**BPF_MAP_CREATE**</div><div class='ctx'> </div><div class='del'>-- to delete map: close(fd)</div><div class='del'>-  Exiting process will delete maps automatically</div><div class='add'>+Create a map with the desired type and attributes in ``attr``:</div><div class='ctx'> </div><div class='del'>-userspace programs use this syscall to create/access maps that eBPF programs</div><div class='del'>-are concurrently updating.</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='del'>-maps can have different types: hash, array, bloom filter, radix-tree, etc.</div><div class='add'>+    int fd;</div><div class='add'>+    union bpf_attr attr = {</div><div class='add'>+            .map_type = BPF_MAP_TYPE_ARRAY;  /* mandatory */</div><div class='add'>+            .key_size = sizeof(__u32);       /* mandatory */</div><div class='add'>+            .value_size = sizeof(__u32);     /* mandatory */</div><div class='add'>+            .max_entries = 256;              /* mandatory */</div><div class='add'>+            .map_flags = BPF_F_MMAPABLE;</div><div class='add'>+            .map_name = "example_array";</div><div class='add'>+    };</div><div class='ctx'> </div><div class='del'>-The map is defined by:</div><div class='add'>+    fd = bpf(BPF_MAP_CREATE, &amp;attr, sizeof(attr));</div><div class='ctx'> </div><div class='del'>-  - type</div><div class='del'>-  - max number of elements</div><div class='del'>-  - key size in bytes</div><div class='del'>-  - value size in bytes</div><div class='add'>+Returns a process-local file descriptor on success, or negative error in case of</div><div class='add'>+failure. The map can be deleted by calling ``close(fd)``. Maps held by open</div><div class='add'>+file descriptors will be deleted automatically when a process exits.</div><div class='ctx'> </div><div class='del'>-Map Types</div><div class='del'>-=========</div><div class='add'>+.. note:: Valid characters for ``map_name`` are ``A-Z``, ``a-z``, ``0-9``,</div><div class='add'>+   ``'_'`` and ``'.'``.</div><div class='ctx'> </div><div class='del'>-.. toctree::</div><div class='del'>-   :maxdepth: 1</div><div class='del'>-   :glob:</div><div class='add'>+**BPF_MAP_LOOKUP_ELEM**</div><div class='add'>+</div><div class='add'>+Lookup key in a given map using ``attr-&gt;map_fd``, ``attr-&gt;key``,</div><div class='add'>+``attr-&gt;value``. Returns zero and stores found elem into ``attr-&gt;value`` on</div><div class='add'>+success, or negative error on failure.</div><div class='add'>+</div><div class='add'>+**BPF_MAP_UPDATE_ELEM**</div><div class='add'>+</div><div class='add'>+Create or update key/value pair in a given map using ``attr-&gt;map_fd``, ``attr-&gt;key``,</div><div class='add'>+``attr-&gt;value``. Returns zero on success or negative error on failure.</div><div class='add'>+</div><div class='add'>+**BPF_MAP_DELETE_ELEM**</div><div class='add'>+</div><div class='add'>+Find and delete element by key in a given map using ``attr-&gt;map_fd``,</div><div class='add'>+``attr-&gt;key``. Returns zero on success or negative error on failure.</div><div class='ctx'> </div><div class='del'>-   map_*
\ No newline at end of file</div><div class='add'>+.. Links:</div><div class='add'>+.. _man-pages: https://www.kernel.org/doc/man-pages/</div><div class='add'>+.. _bpf(2): https://man7.org/linux/man-pages/man2/bpf.2.html</div><div class='add'>+.. _bpf-helpers(7): https://man7.org/linux/man-pages/man7/bpf-helpers.7.html</div><div class='add'>+.. _ebpf-syscall: https://docs.kernel.org/userspace-api/ebpf/syscall.html</div><div class='head'>diff --git a/Documentation/bpf/other.rst b/Documentation/bpf/other.rst<br/>index 3d61963403b4..7e6b12018802 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/other.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/other.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/other.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/other.rst</a></div><div class='hunk'>@@ -6,4 +6,5 @@ Other</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='ctx'>    ringbuf</div><div class='del'>-   llvm_reloc
\ No newline at end of file</div><div class='add'>+   llvm_reloc</div><div class='add'>+   graph_ds_impl</div><div class='head'>diff --git a/Documentation/bpf/prog_lsm.rst b/Documentation/bpf/prog_lsm.rst<br/>index 0dc3fb0d9544..ad2be02f30c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/prog_lsm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/prog_lsm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/prog_lsm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/prog_lsm.rst</a></div><div class='hunk'>@@ -18,7 +18,7 @@ LSM hook:</div><div class='ctx'> .. c:function:: int file_mprotect(struct vm_area_struct *vma, unsigned long reqprot, unsigned long prot);</div><div class='ctx'> </div><div class='ctx'> Other LSM hooks which can be instrumented can be found in</div><div class='del'>-``include/linux/lsm_hooks.h``.</div><div class='add'>+``security/security.c``.</div><div class='ctx'> </div><div class='ctx'> eBPF programs that use Documentation/bpf/btf.rst do not need to include kernel</div><div class='ctx'> headers for accessing information from the attached eBPF program's context.</div><div class='head'>diff --git a/Documentation/bpf/programs.rst b/Documentation/bpf/programs.rst<br/>index 620eb667ac7a..c99000ab6d9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/programs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/programs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/programs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/programs.rst</a></div><div class='hunk'>@@ -7,3 +7,6 @@ Program Types</div><div class='ctx'>    :glob:</div><div class='ctx'> </div><div class='ctx'>    prog_*</div><div class='add'>+</div><div class='add'>+For a list of all program types, see :ref:`program_types_and_elf` in</div><div class='add'>+the :ref:`libbpf` documentation.</div><div class='head'>diff --git a/Documentation/bpf/redirect.rst b/Documentation/bpf/redirect.rst<br/>new file mode 100644<br/>index 000000000000..2fa2b0b05004<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/redirect.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/redirect.rst</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+.. Copyright (C) 2022 Red Hat, Inc.</div><div class='add'>+</div><div class='add'>+========</div><div class='add'>+Redirect</div><div class='add'>+========</div><div class='add'>+XDP_REDIRECT</div><div class='add'>+############</div><div class='add'>+Supported maps</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+XDP_REDIRECT works with the following map types:</div><div class='add'>+</div><div class='add'>+- ``BPF_MAP_TYPE_DEVMAP``</div><div class='add'>+- ``BPF_MAP_TYPE_DEVMAP_HASH``</div><div class='add'>+- ``BPF_MAP_TYPE_CPUMAP``</div><div class='add'>+- ``BPF_MAP_TYPE_XSKMAP``</div><div class='add'>+</div><div class='add'>+For more information on these maps, please see the specific map documentation.</div><div class='add'>+</div><div class='add'>+Process</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: net/core/filter.c</div><div class='add'>+   :doc: xdp redirect</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    Not all drivers support transmitting frames after a redirect, and for</div><div class='add'>+    those that do, not all of them support non-linear frames. Non-linear xdp</div><div class='add'>+    bufs/frames are bufs/frames that contain more than one fragment.</div><div class='add'>+</div><div class='add'>+Debugging packet drops</div><div class='add'>+----------------------</div><div class='add'>+Silent packet drops for XDP_REDIRECT can be debugged using:</div><div class='add'>+</div><div class='add'>+- bpf_trace</div><div class='add'>+- perf_record</div><div class='add'>+</div><div class='add'>+bpf_trace</div><div class='add'>+^^^^^^^^^</div><div class='add'>+The following bpftrace command can be used to capture and count all XDP tracepoints:</div><div class='add'>+</div><div class='add'>+.. code-block:: none</div><div class='add'>+</div><div class='add'>+    sudo bpftrace -e 'tracepoint:xdp:* { @cnt[probe] = count(); }'</div><div class='add'>+    Attaching 12 probes...</div><div class='add'>+    ^C</div><div class='add'>+</div><div class='add'>+    @cnt[tracepoint:xdp:mem_connect]: 18</div><div class='add'>+    @cnt[tracepoint:xdp:mem_disconnect]: 18</div><div class='add'>+    @cnt[tracepoint:xdp:xdp_exception]: 19605</div><div class='add'>+    @cnt[tracepoint:xdp:xdp_devmap_xmit]: 1393604</div><div class='add'>+    @cnt[tracepoint:xdp:xdp_redirect]: 22292200</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+    The various xdp tracepoints can be found in ``source/include/trace/events/xdp.h``</div><div class='add'>+</div><div class='add'>+The following bpftrace command can be used to extract the ``ERRNO`` being returned as</div><div class='add'>+part of the err parameter:</div><div class='add'>+</div><div class='add'>+.. code-block:: none</div><div class='add'>+</div><div class='add'>+    sudo bpftrace -e \</div><div class='add'>+    'tracepoint:xdp:xdp_redirect*_err {@redir_errno[-args-&gt;err] = count();}</div><div class='add'>+    tracepoint:xdp:xdp_devmap_xmit {@devmap_errno[-args-&gt;err] = count();}'</div><div class='add'>+</div><div class='add'>+perf record</div><div class='add'>+^^^^^^^^^^^</div><div class='add'>+The perf tool also supports recording tracepoints:</div><div class='add'>+</div><div class='add'>+.. code-block:: none</div><div class='add'>+</div><div class='add'>+    perf record -a -e xdp:xdp_redirect_err \</div><div class='add'>+        -e xdp:xdp_redirect_map_err \</div><div class='add'>+        -e xdp:xdp_exception \</div><div class='add'>+        -e xdp:xdp_devmap_xmit</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+- https://github.com/xdp-project/xdp-tutorial/tree/master/tracing02-xdp-monitor</div><div class='head'>diff --git a/Documentation/bpf/ringbuf.rst b/Documentation/bpf/ringbuf.rst<br/>index 6a615cd62bda..a99cd05d79d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/ringbuf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/ringbuf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/ringbuf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/ringbuf.rst</a></div><div class='hunk'>@@ -124,7 +124,7 @@ buffer.  Currently 4 are supported:</div><div class='ctx'> </div><div class='ctx'> - ``BPF_RB_AVAIL_DATA`` returns amount of unconsumed data in ring buffer;</div><div class='ctx'> - ``BPF_RB_RING_SIZE`` returns the size of ring buffer;</div><div class='del'>-- ``BPF_RB_CONS_POS``/``BPF_RB_PROD_POS`` returns current logical possition</div><div class='add'>+- ``BPF_RB_CONS_POS``/``BPF_RB_PROD_POS`` returns current logical position</div><div class='ctx'>   of consumer/producer, respectively.</div><div class='ctx'> </div><div class='ctx'> Returned values are momentarily snapshots of ring buffer state and could be</div><div class='hunk'>@@ -146,7 +146,7 @@ Design and Implementation</div><div class='ctx'> This reserve/commit schema allows a natural way for multiple producers, either</div><div class='ctx'> on different CPUs or even on the same CPU/in the same BPF program, to reserve</div><div class='ctx'> independent records and work with them without blocking other producers. This</div><div class='del'>-means that if BPF program was interruped by another BPF program sharing the</div><div class='add'>+means that if BPF program was interrupted by another BPF program sharing the</div><div class='ctx'> same ring buffer, they will both get a record reserved (provided there is</div><div class='ctx'> enough space left) and can work with it and submit it independently. This</div><div class='ctx'> applies to NMI context as well, except that due to using a spinlock during</div><div class='head'>diff --git a/Documentation/bpf/verifier.rst b/Documentation/bpf/verifier.rst<br/>index d4326caf01f9..f0ec19db301c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/verifier.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/bpf/verifier.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/bpf/verifier.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/bpf/verifier.rst</a></div><div class='hunk'>@@ -192,7 +192,7 @@ checked and found to be non-NULL, all copies can become PTR_TO_MAP_VALUEs.</div><div class='ctx'> As well as range-checking, the tracked information is also used for enforcing</div><div class='ctx'> alignment of pointer accesses.  For instance, on most systems the packet pointer</div><div class='ctx'> is 2 bytes after a 4-byte alignment.  If a program adds 14 bytes to that to jump</div><div class='del'>-over the Ethernet header, then reads IHL and addes (IHL * 4), the resulting</div><div class='add'>+over the Ethernet header, then reads IHL and adds (IHL * 4), the resulting</div><div class='ctx'> pointer will have a variable offset known to be 4n+2 for some n, so adding the 2</div><div class='ctx'> bytes (NET_IP_ALIGN) gives a 4-byte alignment and so word-sized accesses through</div><div class='ctx'> that pointer are safe.</div><div class='hunk'>@@ -316,6 +316,301 @@ Pruning considers not only the registers but also the stack (and any spilled</div><div class='ctx'> registers it may hold).  They must all be safe for the branch to be pruned.</div><div class='ctx'> This is implemented in states_equal().</div><div class='ctx'> </div><div class='add'>+Some technical details about state pruning implementation could be found below.</div><div class='add'>+</div><div class='add'>+Register liveness tracking</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+In order to make state pruning effective, liveness state is tracked for each</div><div class='add'>+register and stack slot. The basic idea is to track which registers and stack</div><div class='add'>+slots are actually used during subseqeuent execution of the program, until</div><div class='add'>+program exit is reached. Registers and stack slots that were never used could be</div><div class='add'>+removed from the cached state thus making more states equivalent to a cached</div><div class='add'>+state. This could be illustrated by the following program::</div><div class='add'>+</div><div class='add'>+  0: call bpf_get_prandom_u32()</div><div class='add'>+  1: r1 = 0</div><div class='add'>+  2: if r0 == 0 goto +1</div><div class='add'>+  3: r0 = 1</div><div class='add'>+  --- checkpoint ---</div><div class='add'>+  4: r0 = r1</div><div class='add'>+  5: exit</div><div class='add'>+</div><div class='add'>+Suppose that a state cache entry is created at instruction #4 (such entries are</div><div class='add'>+also called "checkpoints" in the text below). The verifier could reach the</div><div class='add'>+instruction with one of two possible register states:</div><div class='add'>+</div><div class='add'>+* r0 = 1, r1 = 0</div><div class='add'>+* r0 = 0, r1 = 0</div><div class='add'>+</div><div class='add'>+However, only the value of register ``r1`` is important to successfully finish</div><div class='add'>+verification. The goal of the liveness tracking algorithm is to spot this fact</div><div class='add'>+and figure out that both states are actually equivalent.</div><div class='add'>+</div><div class='add'>+Data structures</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Liveness is tracked using the following data structures::</div><div class='add'>+</div><div class='add'>+  enum bpf_reg_liveness {</div><div class='add'>+	REG_LIVE_NONE = 0,</div><div class='add'>+	REG_LIVE_READ32 = 0x1,</div><div class='add'>+	REG_LIVE_READ64 = 0x2,</div><div class='add'>+	REG_LIVE_READ = REG_LIVE_READ32 | REG_LIVE_READ64,</div><div class='add'>+	REG_LIVE_WRITTEN = 0x4,</div><div class='add'>+	REG_LIVE_DONE = 0x8,</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  struct bpf_reg_state {</div><div class='add'>+ 	...</div><div class='add'>+	struct bpf_reg_state *parent;</div><div class='add'>+ 	...</div><div class='add'>+	enum bpf_reg_liveness live;</div><div class='add'>+ 	...</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  struct bpf_stack_state {</div><div class='add'>+	struct bpf_reg_state spilled_ptr;</div><div class='add'>+	...</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  struct bpf_func_state {</div><div class='add'>+	struct bpf_reg_state regs[MAX_BPF_REG];</div><div class='add'>+        ...</div><div class='add'>+	struct bpf_stack_state *stack;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  struct bpf_verifier_state {</div><div class='add'>+	struct bpf_func_state *frame[MAX_CALL_FRAMES];</div><div class='add'>+	struct bpf_verifier_state *parent;</div><div class='add'>+        ...</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+* ``REG_LIVE_NONE`` is an initial value assigned to ``-&gt;live`` fields upon new</div><div class='add'>+  verifier state creation;</div><div class='add'>+</div><div class='add'>+* ``REG_LIVE_WRITTEN`` means that the value of the register (or stack slot) is</div><div class='add'>+  defined by some instruction verified between this verifier state's parent and</div><div class='add'>+  verifier state itself;</div><div class='add'>+</div><div class='add'>+* ``REG_LIVE_READ{32,64}`` means that the value of the register (or stack slot)</div><div class='add'>+  is read by a some child state of this verifier state;</div><div class='add'>+</div><div class='add'>+* ``REG_LIVE_DONE`` is a marker used by ``clean_verifier_state()`` to avoid</div><div class='add'>+  processing same verifier state multiple times and for some sanity checks;</div><div class='add'>+</div><div class='add'>+* ``-&gt;live`` field values are formed by combining ``enum bpf_reg_liveness``</div><div class='add'>+  values using bitwise or.</div><div class='add'>+</div><div class='add'>+Register parentage chains</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+In order to propagate information between parent and child states, a *register</div><div class='add'>+parentage chain* is established. Each register or stack slot is linked to a</div><div class='add'>+corresponding register or stack slot in its parent state via a ``-&gt;parent``</div><div class='add'>+pointer. This link is established upon state creation in ``is_state_visited()``</div><div class='add'>+and might be modified by ``set_callee_state()`` called from</div><div class='add'>+``__check_func_call()``.</div><div class='add'>+</div><div class='add'>+The rules for correspondence between registers / stack slots are as follows:</div><div class='add'>+</div><div class='add'>+* For the current stack frame, registers and stack slots of the new state are</div><div class='add'>+  linked to the registers and stack slots of the parent state with the same</div><div class='add'>+  indices.</div><div class='add'>+</div><div class='add'>+* For the outer stack frames, only caller saved registers (r6-r9) and stack</div><div class='add'>+  slots are linked to the registers and stack slots of the parent state with the</div><div class='add'>+  same indices.</div><div class='add'>+</div><div class='add'>+* When function call is processed a new ``struct bpf_func_state`` instance is</div><div class='add'>+  allocated, it encapsulates a new set of registers and stack slots. For this</div><div class='add'>+  new frame, parent links for r6-r9 and stack slots are set to nil, parent links</div><div class='add'>+  for r1-r5 are set to match caller r1-r5 parent links.</div><div class='add'>+</div><div class='add'>+This could be illustrated by the following diagram (arrows stand for</div><div class='add'>+``-&gt;parent`` pointers)::</div><div class='add'>+</div><div class='add'>+      ...                    ; Frame #0, some instructions</div><div class='add'>+  --- checkpoint #0 ---</div><div class='add'>+  1 : r6 = 42                ; Frame #0</div><div class='add'>+  --- checkpoint #1 ---</div><div class='add'>+  2 : call foo()             ; Frame #0</div><div class='add'>+      ...                    ; Frame #1, instructions from foo()</div><div class='add'>+  --- checkpoint #2 ---</div><div class='add'>+      ...                    ; Frame #1, instructions from foo()</div><div class='add'>+  --- checkpoint #3 ---</div><div class='add'>+      exit                   ; Frame #1, return from foo()</div><div class='add'>+  3 : r1 = r6                ; Frame #0  &lt;- current state</div><div class='add'>+</div><div class='add'>+             +-------------------------------+-------------------------------+</div><div class='add'>+             |           Frame #0            |           Frame #1            |</div><div class='add'>+  Checkpoint +-------------------------------+-------------------------------+</div><div class='add'>+  #0         | r0 | r1-r5 | r6-r9 | fp-8 ... |</div><div class='add'>+             +-------------------------------+</div><div class='add'>+                ^    ^       ^       ^</div><div class='add'>+                |    |       |       |</div><div class='add'>+  Checkpoint +-------------------------------+</div><div class='add'>+  #1         | r0 | r1-r5 | r6-r9 | fp-8 ... |</div><div class='add'>+             +-------------------------------+</div><div class='add'>+                     ^       ^       ^</div><div class='add'>+                     |_______|_______|_______________</div><div class='add'>+                             |       |               |</div><div class='add'>+               nil  nil      |       |               |      nil     nil</div><div class='add'>+                |    |       |       |               |       |       |</div><div class='add'>+  Checkpoint +-------------------------------+-------------------------------+</div><div class='add'>+  #2         | r0 | r1-r5 | r6-r9 | fp-8 ... | r0 | r1-r5 | r6-r9 | fp-8 ... |</div><div class='add'>+             +-------------------------------+-------------------------------+</div><div class='add'>+                             ^       ^               ^       ^       ^</div><div class='add'>+               nil  nil      |       |               |       |       |</div><div class='add'>+                |    |       |       |               |       |       |</div><div class='add'>+  Checkpoint +-------------------------------+-------------------------------+</div><div class='add'>+  #3         | r0 | r1-r5 | r6-r9 | fp-8 ... | r0 | r1-r5 | r6-r9 | fp-8 ... |</div><div class='add'>+             +-------------------------------+-------------------------------+</div><div class='add'>+                             ^       ^</div><div class='add'>+               nil  nil      |       |</div><div class='add'>+                |    |       |       |</div><div class='add'>+  Current    +-------------------------------+</div><div class='add'>+  state      | r0 | r1-r5 | r6-r9 | fp-8 ... |</div><div class='add'>+             +-------------------------------+</div><div class='add'>+                             \</div><div class='add'>+                               r6 read mark is propagated via these links</div><div class='add'>+                               all the way up to checkpoint #1.</div><div class='add'>+                               The checkpoint #1 contains a write mark for r6</div><div class='add'>+                               because of instruction (1), thus read propagation</div><div class='add'>+                               does not reach checkpoint #0 (see section below).</div><div class='add'>+</div><div class='add'>+Liveness marks tracking</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+For each processed instruction, the verifier tracks read and written registers</div><div class='add'>+and stack slots. The main idea of the algorithm is that read marks propagate</div><div class='add'>+back along the state parentage chain until they hit a write mark, which 'screens</div><div class='add'>+off' earlier states from the read. The information about reads is propagated by</div><div class='add'>+function ``mark_reg_read()`` which could be summarized as follows::</div><div class='add'>+</div><div class='add'>+  mark_reg_read(struct bpf_reg_state *state, ...):</div><div class='add'>+      parent = state-&gt;parent</div><div class='add'>+      while parent:</div><div class='add'>+          if state-&gt;live &amp; REG_LIVE_WRITTEN:</div><div class='add'>+              break</div><div class='add'>+          if parent-&gt;live &amp; REG_LIVE_READ64:</div><div class='add'>+              break</div><div class='add'>+          parent-&gt;live |= REG_LIVE_READ64</div><div class='add'>+          state = parent</div><div class='add'>+          parent = state-&gt;parent</div><div class='add'>+</div><div class='add'>+Notes:</div><div class='add'>+</div><div class='add'>+* The read marks are applied to the **parent** state while write marks are</div><div class='add'>+  applied to the **current** state. The write mark on a register or stack slot</div><div class='add'>+  means that it is updated by some instruction in the straight-line code leading</div><div class='add'>+  from the parent state to the current state.</div><div class='add'>+</div><div class='add'>+* Details about REG_LIVE_READ32 are omitted.</div><div class='add'>+  </div><div class='add'>+* Function ``propagate_liveness()`` (see section :ref:`read_marks_for_cache_hits`)</div><div class='add'>+  might override the first parent link. Please refer to the comments in the</div><div class='add'>+  ``propagate_liveness()`` and ``mark_reg_read()`` source code for further</div><div class='add'>+  details.</div><div class='add'>+</div><div class='add'>+Because stack writes could have different sizes ``REG_LIVE_WRITTEN`` marks are</div><div class='add'>+applied conservatively: stack slots are marked as written only if write size</div><div class='add'>+corresponds to the size of the register, e.g. see function ``save_register_state()``.</div><div class='add'>+</div><div class='add'>+Consider the following example::</div><div class='add'>+</div><div class='add'>+  0: (*u64)(r10 - 8) = 0   ; define 8 bytes of fp-8</div><div class='add'>+  --- checkpoint #0 ---</div><div class='add'>+  1: (*u32)(r10 - 8) = 1   ; redefine lower 4 bytes</div><div class='add'>+  2: r1 = (*u32)(r10 - 8)  ; read lower 4 bytes defined at (1)</div><div class='add'>+  3: r2 = (*u32)(r10 - 4)  ; read upper 4 bytes defined at (0)</div><div class='add'>+</div><div class='add'>+As stated above, the write at (1) does not count as ``REG_LIVE_WRITTEN``. Should</div><div class='add'>+it be otherwise, the algorithm above wouldn't be able to propagate the read mark</div><div class='add'>+from (3) to checkpoint #0.</div><div class='add'>+</div><div class='add'>+Once the ``BPF_EXIT`` instruction is reached ``update_branch_counts()`` is</div><div class='add'>+called to update the ``-&gt;branches`` counter for each verifier state in a chain</div><div class='add'>+of parent verifier states. When the ``-&gt;branches`` counter reaches zero the</div><div class='add'>+verifier state becomes a valid entry in a set of cached verifier states.</div><div class='add'>+</div><div class='add'>+Each entry of the verifier states cache is post-processed by a function</div><div class='add'>+``clean_live_states()``. This function marks all registers and stack slots</div><div class='add'>+without ``REG_LIVE_READ{32,64}`` marks as ``NOT_INIT`` or ``STACK_INVALID``.</div><div class='add'>+Registers/stack slots marked in this way are ignored in function ``stacksafe()``</div><div class='add'>+called from ``states_equal()`` when a state cache entry is considered for</div><div class='add'>+equivalence with a current state.</div><div class='add'>+</div><div class='add'>+Now it is possible to explain how the example from the beginning of the section</div><div class='add'>+works::</div><div class='add'>+</div><div class='add'>+  0: call bpf_get_prandom_u32()</div><div class='add'>+  1: r1 = 0</div><div class='add'>+  2: if r0 == 0 goto +1</div><div class='add'>+  3: r0 = 1</div><div class='add'>+  --- checkpoint[0] ---</div><div class='add'>+  4: r0 = r1</div><div class='add'>+  5: exit</div><div class='add'>+</div><div class='add'>+* At instruction #2 branching point is reached and state ``{ r0 == 0, r1 == 0, pc == 4 }``</div><div class='add'>+  is pushed to states processing queue (pc stands for program counter).</div><div class='add'>+</div><div class='add'>+* At instruction #4:</div><div class='add'>+</div><div class='add'>+  * ``checkpoint[0]`` states cache entry is created: ``{ r0 == 1, r1 == 0, pc == 4 }``;</div><div class='add'>+  * ``checkpoint[0].r0`` is marked as written;</div><div class='add'>+  * ``checkpoint[0].r1`` is marked as read;</div><div class='add'>+</div><div class='add'>+* At instruction #5 exit is reached and ``checkpoint[0]`` can now be processed</div><div class='add'>+  by ``clean_live_states()``. After this processing ``checkpoint[0].r0`` has a</div><div class='add'>+  read mark and all other registers and stack slots are marked as ``NOT_INIT``</div><div class='add'>+  or ``STACK_INVALID``</div><div class='add'>+</div><div class='add'>+* The state ``{ r0 == 0, r1 == 0, pc == 4 }`` is popped from the states queue</div><div class='add'>+  and is compared against a cached state ``{ r1 == 0, pc == 4 }``, the states</div><div class='add'>+  are considered equivalent.</div><div class='add'>+</div><div class='add'>+.. _read_marks_for_cache_hits:</div><div class='add'>+  </div><div class='add'>+Read marks propagation for cache hits</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Another point is the handling of read marks when a previously verified state is</div><div class='add'>+found in the states cache. Upon cache hit verifier must behave in the same way</div><div class='add'>+as if the current state was verified to the program exit. This means that all</div><div class='add'>+read marks, present on registers and stack slots of the cached state, must be</div><div class='add'>+propagated over the parentage chain of the current state. Example below shows</div><div class='add'>+why this is important. Function ``propagate_liveness()`` handles this case.</div><div class='add'>+</div><div class='add'>+Consider the following state parentage chain (S is a starting state, A-E are</div><div class='add'>+derived states, -&gt; arrows show which state is derived from which)::</div><div class='add'>+</div><div class='add'>+                   r1 read</div><div class='add'>+            &lt;-------------                A[r1] == 0</div><div class='add'>+                                          C[r1] == 0</div><div class='add'>+      S ---&gt; A ---&gt; B ---&gt; exit           E[r1] == 1</div><div class='add'>+      |</div><div class='add'>+      ` ---&gt; C ---&gt; D</div><div class='add'>+      |</div><div class='add'>+      ` ---&gt; E      ^</div><div class='add'>+                    |___   suppose all these</div><div class='add'>+             ^           states are at insn #Y</div><div class='add'>+             |</div><div class='add'>+      suppose all these</div><div class='add'>+    states are at insn #X</div><div class='add'>+</div><div class='add'>+* Chain of states ``S -&gt; A -&gt; B -&gt; exit`` is verified first.</div><div class='add'>+</div><div class='add'>+* While ``B -&gt; exit`` is verified, register ``r1`` is read and this read mark is</div><div class='add'>+  propagated up to state ``A``.</div><div class='add'>+</div><div class='add'>+* When chain of states ``C -&gt; D`` is verified the state ``D`` turns out to be</div><div class='add'>+  equivalent to state ``B``.</div><div class='add'>+</div><div class='add'>+* The read mark for ``r1`` has to be propagated to state ``C``, otherwise state</div><div class='add'>+  ``C`` might get mistakenly marked as equivalent to state ``E`` even though</div><div class='add'>+  values for register ``r1`` differ between ``C`` and ``E``.</div><div class='add'>+</div><div class='ctx'> Understanding eBPF verifier messages</div><div class='ctx'> ====================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/cdrom/cdrom-standard.rst b/Documentation/cdrom/cdrom-standard.rst<br/>index 52ea7b6b2fe8..7964fe134277 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/cdrom/cdrom-standard.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/cdrom/cdrom-standard.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/cdrom/cdrom-standard.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/cdrom/cdrom-standard.rst</a></div><div class='hunk'>@@ -218,7 +218,6 @@ current *struct* is::</div><div class='ctx'> 		int (*tray_move)(struct cdrom_device_info *, int);</div><div class='ctx'> 		int (*lock_door)(struct cdrom_device_info *, int);</div><div class='ctx'> 		int (*select_speed)(struct cdrom_device_info *, int);</div><div class='del'>-		int (*select_disc)(struct cdrom_device_info *, int);</div><div class='ctx'> 		int (*get_last_session) (struct cdrom_device_info *,</div><div class='ctx'> 					 struct cdrom_multisession *);</div><div class='ctx'> 		int (*get_mcn)(struct cdrom_device_info *, struct cdrom_mcn *);</div><div class='hunk'>@@ -421,15 +420,6 @@ return value indicates an error.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	int select_disc(struct cdrom_device_info *cdi, int number)</div><div class='del'>-</div><div class='del'>-If the drive can store multiple discs (a juke-box) this function</div><div class='del'>-will perform disc selection. It should return the number of the</div><div class='del'>-selected disc on success, a negative value on error. Currently, only</div><div class='del'>-the ide-cd driver supports this functionality.</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='ctx'> 	int get_last_session(struct cdrom_device_info *cdi,</div><div class='ctx'> 			     struct cdrom_multisession *ms_info)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/cdrom/ide-cd.rst b/Documentation/cdrom/ide-cd.rst<br/>deleted file mode 100644<br/>index bdccb74fc92d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/cdrom/ide-cd.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/cdrom/ide-cd.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,538 +0,0 @@</div><div class='del'>-IDE-CD driver documentation</div><div class='del'>-===========================</div><div class='del'>-</div><div class='del'>-:Originally by: scott snyder  &lt;snyder@fnald0.fnal.gov&gt; (19 May 1996)</div><div class='del'>-:Carrying on the torch is: Erik Andersen &lt;andersee@debian.org&gt;</div><div class='del'>-:New maintainers (19 Oct 1998): Jens Axboe &lt;axboe@image.dk&gt;</div><div class='del'>-</div><div class='del'>-1. Introduction</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-The ide-cd driver should work with all ATAPI ver 1.2 to ATAPI 2.6 compliant</div><div class='del'>-CDROM drives which attach to an IDE interface.  Note that some CDROM vendors</div><div class='del'>-(including Mitsumi, Sony, Creative, Aztech, and Goldstar) have made</div><div class='del'>-both ATAPI-compliant drives and drives which use a proprietary</div><div class='del'>-interface.  If your drive uses one of those proprietary interfaces,</div><div class='del'>-this driver will not work with it (but one of the other CDROM drivers</div><div class='del'>-probably will).  This driver will not work with `ATAPI` drives which</div><div class='del'>-attach to the parallel port.  In addition, there is at least one drive</div><div class='del'>-(CyCDROM CR520ie) which attaches to the IDE port but is not ATAPI;</div><div class='del'>-this driver will not work with drives like that either (but see the</div><div class='del'>-aztcd driver).</div><div class='del'>-</div><div class='del'>-This driver provides the following features:</div><div class='del'>-</div><div class='del'>- - Reading from data tracks, and mounting ISO 9660 filesystems.</div><div class='del'>-</div><div class='del'>- - Playing audio tracks.  Most of the CDROM player programs floating</div><div class='del'>-   around should work; I usually use Workman.</div><div class='del'>-</div><div class='del'>- - Multisession support.</div><div class='del'>-</div><div class='del'>- - On drives which support it, reading digital audio data directly</div><div class='del'>-   from audio tracks.  The program cdda2wav can be used for this.</div><div class='del'>-   Note, however, that only some drives actually support this.</div><div class='del'>-</div><div class='del'>- - There is now support for CDROM changers which comply with the</div><div class='del'>-   ATAPI 2.6 draft standard (such as the NEC CDR-251).  This additional</div><div class='del'>-   functionality includes a function call to query which slot is the</div><div class='del'>-   currently selected slot, a function call to query which slots contain</div><div class='del'>-   CDs, etc. A sample program which demonstrates this functionality is</div><div class='del'>-   appended to the end of this file.  The Sanyo 3-disc changer</div><div class='del'>-   (which does not conform to the standard) is also now supported.</div><div class='del'>-   Please note the driver refers to the first CD as slot # 0.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-2. Installation</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-0. The ide-cd relies on the ide disk driver.  See</div><div class='del'>-   Documentation/ide/ide.rst for up-to-date information on the ide</div><div class='del'>-   driver.</div><div class='del'>-</div><div class='del'>-1. Make sure that the ide and ide-cd drivers are compiled into the</div><div class='del'>-   kernel you're using.  When configuring the kernel, in the section</div><div class='del'>-   entitled "Floppy, IDE, and other block devices", say either `Y`</div><div class='del'>-   (which will compile the support directly into the kernel) or `M`</div><div class='del'>-   (to compile support as a module which can be loaded and unloaded)</div><div class='del'>-   to the options::</div><div class='del'>-</div><div class='del'>-      ATA/ATAPI/MFM/RLL support</div><div class='del'>-      Include IDE/ATAPI CDROM support</div><div class='del'>-</div><div class='del'>-   Depending on what type of IDE interface you have, you may need to</div><div class='del'>-   specify additional configuration options.  See</div><div class='del'>-   Documentation/ide/ide.rst.</div><div class='del'>-</div><div class='del'>-2. You should also ensure that the iso9660 filesystem is either</div><div class='del'>-   compiled into the kernel or available as a loadable module.  You</div><div class='del'>-   can see if a filesystem is known to the kernel by catting</div><div class='del'>-   /proc/filesystems.</div><div class='del'>-</div><div class='del'>-3. The CDROM drive should be connected to the host on an IDE</div><div class='del'>-   interface.  Each interface on a system is defined by an I/O port</div><div class='del'>-   address and an IRQ number, the standard assignments being</div><div class='del'>-   0x1f0 and 14 for the primary interface and 0x170 and 15 for the</div><div class='del'>-   secondary interface.  Each interface can control up to two devices,</div><div class='del'>-   where each device can be a hard drive, a CDROM drive, a floppy drive,</div><div class='del'>-   or a tape drive.  The two devices on an interface are called `master`</div><div class='del'>-   and `slave`; this is usually selectable via a jumper on the drive.</div><div class='del'>-</div><div class='del'>-   Linux names these devices as follows.  The master and slave devices</div><div class='del'>-   on the primary IDE interface are called `hda` and `hdb`,</div><div class='del'>-   respectively.  The drives on the secondary interface are called</div><div class='del'>-   `hdc` and `hdd`.  (Interfaces at other locations get other letters</div><div class='del'>-   in the third position; see Documentation/ide/ide.rst.)</div><div class='del'>-</div><div class='del'>-   If you want your CDROM drive to be found automatically by the</div><div class='del'>-   driver, you should make sure your IDE interface uses either the</div><div class='del'>-   primary or secondary addresses mentioned above.  In addition, if</div><div class='del'>-   the CDROM drive is the only device on the IDE interface, it should</div><div class='del'>-   be jumpered as `master`.  (If for some reason you cannot configure</div><div class='del'>-   your system in this manner, you can probably still use the driver.</div><div class='del'>-   You may have to pass extra configuration information to the kernel</div><div class='del'>-   when you boot, however.  See Documentation/ide/ide.rst for more</div><div class='del'>-   information.)</div><div class='del'>-</div><div class='del'>-4. Boot the system.  If the drive is recognized, you should see a</div><div class='del'>-   message which looks like::</div><div class='del'>-</div><div class='del'>-     hdb: NEC CD-ROM DRIVE:260, ATAPI CDROM drive</div><div class='del'>-</div><div class='del'>-   If you do not see this, see section 5 below.</div><div class='del'>-</div><div class='del'>-5. You may want to create a symbolic link /dev/cdrom pointing to the</div><div class='del'>-   actual device.  You can do this with the command::</div><div class='del'>-</div><div class='del'>-     ln -s  /dev/hdX  /dev/cdrom</div><div class='del'>-</div><div class='del'>-   where X should be replaced by the letter indicating where your</div><div class='del'>-   drive is installed.</div><div class='del'>-</div><div class='del'>-6. You should be able to see any error messages from the driver with</div><div class='del'>-   the `dmesg` command.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-3. Basic usage</div><div class='del'>---------------</div><div class='del'>-</div><div class='del'>-An ISO 9660 CDROM can be mounted by putting the disc in the drive and</div><div class='del'>-typing (as root)::</div><div class='del'>-</div><div class='del'>-  mount -t iso9660 /dev/cdrom /mnt/cdrom</div><div class='del'>-</div><div class='del'>-where it is assumed that /dev/cdrom is a link pointing to the actual</div><div class='del'>-device (as described in step 5 of the last section) and /mnt/cdrom is</div><div class='del'>-an empty directory.  You should now be able to see the contents of the</div><div class='del'>-CDROM under the /mnt/cdrom directory.  If you want to eject the CDROM,</div><div class='del'>-you must first dismount it with a command like::</div><div class='del'>-</div><div class='del'>-  umount /mnt/cdrom</div><div class='del'>-</div><div class='del'>-Note that audio CDs cannot be mounted.</div><div class='del'>-</div><div class='del'>-Some distributions set up /etc/fstab to always try to mount a CDROM</div><div class='del'>-filesystem on bootup.  It is not required to mount the CDROM in this</div><div class='del'>-manner, though, and it may be a nuisance if you change CDROMs often.</div><div class='del'>-You should feel free to remove the cdrom line from /etc/fstab and</div><div class='del'>-mount CDROMs manually if that suits you better.</div><div class='del'>-</div><div class='del'>-Multisession and photocd discs should work with no special handling.</div><div class='del'>-The hpcdtoppm package (ftp.gwdg.de:/pub/linux/hpcdtoppm/) may be</div><div class='del'>-useful for reading photocds.</div><div class='del'>-</div><div class='del'>-To play an audio CD, you should first unmount and remove any data</div><div class='del'>-CDROM.  Any of the CDROM player programs should then work (workman,</div><div class='del'>-workbone, cdplayer, etc.).</div><div class='del'>-</div><div class='del'>-On a few drives, you can read digital audio directly using a program</div><div class='del'>-such as cdda2wav.  The only types of drive which I've heard support</div><div class='del'>-this are Sony and Toshiba drives.  You will get errors if you try to</div><div class='del'>-use this function on a drive which does not support it.</div><div class='del'>-</div><div class='del'>-For supported changers, you can use the `cdchange` program (appended to</div><div class='del'>-the end of this file) to switch between changer slots.  Note that the</div><div class='del'>-drive should be unmounted before attempting this.  The program takes</div><div class='del'>-two arguments:  the CDROM device, and the slot number to which you wish</div><div class='del'>-to change.  If the slot number is -1, the drive is unloaded.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-4. Common problems</div><div class='del'>-------------------</div><div class='del'>-</div><div class='del'>-This section discusses some common problems encountered when trying to</div><div class='del'>-use the driver, and some possible solutions.  Note that if you are</div><div class='del'>-experiencing problems, you should probably also review</div><div class='del'>-Documentation/ide/ide.rst for current information about the underlying</div><div class='del'>-IDE support code.  Some of these items apply only to earlier versions</div><div class='del'>-of the driver, but are mentioned here for completeness.</div><div class='del'>-</div><div class='del'>-In most cases, you should probably check with `dmesg` for any errors</div><div class='del'>-from the driver.</div><div class='del'>-</div><div class='del'>-a. Drive is not detected during booting.</div><div class='del'>-</div><div class='del'>-   - Review the configuration instructions above and in</div><div class='del'>-     Documentation/ide/ide.rst, and check how your hardware is</div><div class='del'>-     configured.</div><div class='del'>-</div><div class='del'>-   - If your drive is the only device on an IDE interface, it should</div><div class='del'>-     be jumpered as master, if at all possible.</div><div class='del'>-</div><div class='del'>-   - If your IDE interface is not at the standard addresses of 0x170</div><div class='del'>-     or 0x1f0, you'll need to explicitly inform the driver using a</div><div class='del'>-     lilo option.  See Documentation/ide/ide.rst.  (This feature was</div><div class='del'>-     added around kernel version 1.3.30.)</div><div class='del'>-</div><div class='del'>-   - If the autoprobing is not finding your drive, you can tell the</div><div class='del'>-     driver to assume that one exists by using a lilo option of the</div><div class='del'>-     form `hdX=cdrom`, where X is the drive letter corresponding to</div><div class='del'>-     where your drive is installed.  Note that if you do this and you</div><div class='del'>-     see a boot message like::</div><div class='del'>-</div><div class='del'>-       hdX: ATAPI cdrom (?)</div><div class='del'>-</div><div class='del'>-     this does _not_ mean that the driver has successfully detected</div><div class='del'>-     the drive; rather, it means that the driver has not detected a</div><div class='del'>-     drive, but is assuming there's one there anyway because you told</div><div class='del'>-     it so.  If you actually try to do I/O to a drive defined at a</div><div class='del'>-     nonexistent or nonresponding I/O address, you'll probably get</div><div class='del'>-     errors with a status value of 0xff.</div><div class='del'>-</div><div class='del'>-   - Some IDE adapters require a nonstandard initialization sequence</div><div class='del'>-     before they'll function properly.  (If this is the case, there</div><div class='del'>-     will often be a separate MS-DOS driver just for the controller.)</div><div class='del'>-     IDE interfaces on sound cards often fall into this category.</div><div class='del'>-</div><div class='del'>-     Support for some interfaces needing extra initialization is</div><div class='del'>-     provided in later 1.3.x kernels.  You may need to turn on</div><div class='del'>-     additional kernel configuration options to get them to work;</div><div class='del'>-     see Documentation/ide/ide.rst.</div><div class='del'>-</div><div class='del'>-     Even if support is not available for your interface, you may be</div><div class='del'>-     able to get it to work with the following procedure.  First boot</div><div class='del'>-     MS-DOS and load the appropriate drivers.  Then warm-boot linux</div><div class='del'>-     (i.e., without powering off).  If this works, it can be automated</div><div class='del'>-     by running loadlin from the MS-DOS autoexec.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-b. Timeout/IRQ errors.</div><div class='del'>-</div><div class='del'>-  - If you always get timeout errors, interrupts from the drive are</div><div class='del'>-    probably not making it to the host.</div><div class='del'>-</div><div class='del'>-  - IRQ problems may also be indicated by the message</div><div class='del'>-    `IRQ probe failed (&lt;n&gt;)` while booting.  If &lt;n&gt; is zero, that</div><div class='del'>-    means that the system did not see an interrupt from the drive when</div><div class='del'>-    it was expecting one (on any feasible IRQ).  If &lt;n&gt; is negative,</div><div class='del'>-    that means the system saw interrupts on multiple IRQ lines, when</div><div class='del'>-    it was expecting to receive just one from the CDROM drive.</div><div class='del'>-</div><div class='del'>-  - Double-check your hardware configuration to make sure that the IRQ</div><div class='del'>-    number of your IDE interface matches what the driver expects.</div><div class='del'>-    (The usual assignments are 14 for the primary (0x1f0) interface</div><div class='del'>-    and 15 for the secondary (0x170) interface.)  Also be sure that</div><div class='del'>-    you don't have some other hardware which might be conflicting with</div><div class='del'>-    the IRQ you're using.  Also check the BIOS setup for your system;</div><div class='del'>-    some have the ability to disable individual IRQ levels, and I've</div><div class='del'>-    had one report of a system which was shipped with IRQ 15 disabled</div><div class='del'>-    by default.</div><div class='del'>-</div><div class='del'>-  - Note that many MS-DOS CDROM drivers will still function even if</div><div class='del'>-    there are hardware problems with the interrupt setup; they</div><div class='del'>-    apparently don't use interrupts.</div><div class='del'>-</div><div class='del'>-  - If you own a Pioneer DR-A24X, you _will_ get nasty error messages</div><div class='del'>-    on boot such as "irq timeout: status=0x50 { DriveReady SeekComplete }"</div><div class='del'>-    The Pioneer DR-A24X CDROM drives are fairly popular these days.</div><div class='del'>-    Unfortunately, these drives seem to become very confused when we perform</div><div class='del'>-    the standard Linux ATA disk drive probe. If you own one of these drives,</div><div class='del'>-    you can bypass the ATA probing which confuses these CDROM drives, by</div><div class='del'>-    adding `append="hdX=noprobe hdX=cdrom"` to your lilo.conf file and running</div><div class='del'>-    lilo (again where X is the drive letter corresponding to where your drive</div><div class='del'>-    is installed.)</div><div class='del'>-</div><div class='del'>-c. System hangups.</div><div class='del'>-</div><div class='del'>-  - If the system locks up when you try to access the CDROM, the most</div><div class='del'>-    likely cause is that you have a buggy IDE adapter which doesn't</div><div class='del'>-    properly handle simultaneous transactions on multiple interfaces.</div><div class='del'>-    The most notorious of these is the CMD640B chip.  This problem can</div><div class='del'>-    be worked around by specifying the `serialize` option when</div><div class='del'>-    booting.  Recent kernels should be able to detect the need for</div><div class='del'>-    this automatically in most cases, but the detection is not</div><div class='del'>-    foolproof.  See Documentation/ide/ide.rst for more information</div><div class='del'>-    about the `serialize` option and the CMD640B.</div><div class='del'>-</div><div class='del'>-  - Note that many MS-DOS CDROM drivers will work with such buggy</div><div class='del'>-    hardware, apparently because they never attempt to overlap CDROM</div><div class='del'>-    operations with other disk activity.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-d. Can't mount a CDROM.</div><div class='del'>-</div><div class='del'>-  - If you get errors from mount, it may help to check `dmesg` to see</div><div class='del'>-    if there are any more specific errors from the driver or from the</div><div class='del'>-    filesystem.</div><div class='del'>-</div><div class='del'>-  - Make sure there's a CDROM loaded in the drive, and that's it's an</div><div class='del'>-    ISO 9660 disc.  You can't mount an audio CD.</div><div class='del'>-</div><div class='del'>-  - With the CDROM in the drive and unmounted, try something like::</div><div class='del'>-</div><div class='del'>-      cat /dev/cdrom | od | more</div><div class='del'>-</div><div class='del'>-    If you see a dump, then the drive and driver are probably working</div><div class='del'>-    OK, and the problem is at the filesystem level (i.e., the CDROM is</div><div class='del'>-    not ISO 9660 or has errors in the filesystem structure).</div><div class='del'>-</div><div class='del'>-  - If you see `not a block device` errors, check that the definitions</div><div class='del'>-    of the device special files are correct.  They should be as</div><div class='del'>-    follows::</div><div class='del'>-</div><div class='del'>-      brw-rw----   1 root     disk       3,   0 Nov 11 18:48 /dev/hda</div><div class='del'>-      brw-rw----   1 root     disk       3,  64 Nov 11 18:48 /dev/hdb</div><div class='del'>-      brw-rw----   1 root     disk      22,   0 Nov 11 18:48 /dev/hdc</div><div class='del'>-      brw-rw----   1 root     disk      22,  64 Nov 11 18:48 /dev/hdd</div><div class='del'>-</div><div class='del'>-    Some early Slackware releases had these defined incorrectly.  If</div><div class='del'>-    these are wrong, you can remake them by running the script</div><div class='del'>-    scripts/MAKEDEV.ide.  (You may have to make it executable</div><div class='del'>-    with chmod first.)</div><div class='del'>-</div><div class='del'>-    If you have a /dev/cdrom symbolic link, check that it is pointing</div><div class='del'>-    to the correct device file.</div><div class='del'>-</div><div class='del'>-    If you hear people talking of the devices `hd1a` and `hd1b`, these</div><div class='del'>-    were old names for what are now called hdc and hdd.  Those names</div><div class='del'>-    should be considered obsolete.</div><div class='del'>-</div><div class='del'>-  - If mount is complaining that the iso9660 filesystem is not</div><div class='del'>-    available, but you know it is (check /proc/filesystems), you</div><div class='del'>-    probably need a newer version of mount.  Early versions would not</div><div class='del'>-    always give meaningful error messages.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-e. Directory listings are unpredictably truncated, and `dmesg` shows</div><div class='del'>-   `buffer botch` error messages from the driver.</div><div class='del'>-</div><div class='del'>-  - There was a bug in the version of the driver in 1.2.x kernels</div><div class='del'>-    which could cause this.  It was fixed in 1.3.0.  If you can't</div><div class='del'>-    upgrade, you can probably work around the problem by specifying a</div><div class='del'>-    blocksize of 2048 when mounting.  (Note that you won't be able to</div><div class='del'>-    directly execute binaries off the CDROM in that case.)</div><div class='del'>-</div><div class='del'>-    If you see this in kernels later than 1.3.0, please report it as a</div><div class='del'>-    bug.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-f. Data corruption.</div><div class='del'>-</div><div class='del'>-  - Random data corruption was occasionally observed with the Hitachi</div><div class='del'>-    CDR-7730 CDROM. If you experience data corruption, using "hdx=slow"</div><div class='del'>-    as a command line parameter may work around the problem, at the</div><div class='del'>-    expense of low system performance.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-5. cdchange.c</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>-  /*</div><div class='del'>-   * cdchange.c  [-v]  &lt;device&gt;  [&lt;slot&gt;]</div><div class='del'>-   *</div><div class='del'>-   * This loads a CDROM from a specified slot in a changer, and displays</div><div class='del'>-   * information about the changer status.  The drive should be unmounted before</div><div class='del'>-   * using this program.</div><div class='del'>-   *</div><div class='del'>-   * Changer information is displayed if either the -v flag is specified</div><div class='del'>-   * or no slot was specified.</div><div class='del'>-   *</div><div class='del'>-   * Based on code originally from Gerhard Zuber &lt;zuber@berlin.snafu.de&gt;.</div><div class='del'>-   * Changer status information, and rewrite for the new Uniform CDROM driver</div><div class='del'>-   * interface by Erik Andersen &lt;andersee@debian.org&gt;.</div><div class='del'>-   */</div><div class='del'>-</div><div class='del'>-  #include &lt;stdio.h&gt;</div><div class='del'>-  #include &lt;stdlib.h&gt;</div><div class='del'>-  #include &lt;errno.h&gt;</div><div class='del'>-  #include &lt;string.h&gt;</div><div class='del'>-  #include &lt;unistd.h&gt;</div><div class='del'>-  #include &lt;fcntl.h&gt;</div><div class='del'>-  #include &lt;sys/ioctl.h&gt;</div><div class='del'>-  #include &lt;linux/cdrom.h&gt;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  int</div><div class='del'>-  main (int argc, char **argv)</div><div class='del'>-  {</div><div class='del'>-	char *program;</div><div class='del'>-	char *device;</div><div class='del'>-	int fd;           /* file descriptor for CD-ROM device */</div><div class='del'>-	int status;       /* return status for system calls */</div><div class='del'>-	int verbose = 0;</div><div class='del'>-	int slot=-1, x_slot;</div><div class='del'>-	int total_slots_available;</div><div class='del'>-</div><div class='del'>-	program = argv[0];</div><div class='del'>-</div><div class='del'>-	++argv;</div><div class='del'>-	--argc;</div><div class='del'>-</div><div class='del'>-	if (argc &lt; 1 || argc &gt; 3) {</div><div class='del'>-		fprintf (stderr, "usage: %s [-v] &lt;device&gt; [&lt;slot&gt;]\n",</div><div class='del'>-			 program);</div><div class='del'>-		fprintf (stderr, "       Slots are numbered 1 -- n.\n");</div><div class='del'>-		exit (1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-       if (strcmp (argv[0], "-v") == 0) {</div><div class='del'>-                verbose = 1;</div><div class='del'>-                ++argv;</div><div class='del'>-                --argc;</div><div class='del'>-        }</div><div class='del'>-</div><div class='del'>-	device = argv[0];</div><div class='del'>-</div><div class='del'>-	if (argc == 2)</div><div class='del'>-		slot = atoi (argv[1]) - 1;</div><div class='del'>-</div><div class='del'>-	/* open device */</div><div class='del'>-	fd = open(device, O_RDONLY | O_NONBLOCK);</div><div class='del'>-	if (fd &lt; 0) {</div><div class='del'>-		fprintf (stderr, "%s: open failed for `%s`: %s\n",</div><div class='del'>-			 program, device, strerror (errno));</div><div class='del'>-		exit (1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* Check CD player status */</div><div class='del'>-	total_slots_available = ioctl (fd, CDROM_CHANGER_NSLOTS);</div><div class='del'>-	if (total_slots_available &lt;= 1 ) {</div><div class='del'>-		fprintf (stderr, "%s: Device `%s` is not an ATAPI "</div><div class='del'>-			"compliant CD changer.\n", program, device);</div><div class='del'>-		exit (1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (slot &gt;= 0) {</div><div class='del'>-		if (slot &gt;= total_slots_available) {</div><div class='del'>-			fprintf (stderr, "Bad slot number.  "</div><div class='del'>-				 "Should be 1 -- %d.\n",</div><div class='del'>-				 total_slots_available);</div><div class='del'>-			exit (1);</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		/* load */</div><div class='del'>-		slot=ioctl (fd, CDROM_SELECT_DISC, slot);</div><div class='del'>-		if (slot&lt;0) {</div><div class='del'>-			fflush(stdout);</div><div class='del'>-				perror ("CDROM_SELECT_DISC ");</div><div class='del'>-			exit(1);</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	if (slot &lt; 0 || verbose) {</div><div class='del'>-</div><div class='del'>-		status=ioctl (fd, CDROM_SELECT_DISC, CDSL_CURRENT);</div><div class='del'>-		if (status&lt;0) {</div><div class='del'>-			fflush(stdout);</div><div class='del'>-			perror (" CDROM_SELECT_DISC");</div><div class='del'>-			exit(1);</div><div class='del'>-		}</div><div class='del'>-		slot=status;</div><div class='del'>-</div><div class='del'>-		printf ("Current slot: %d\n", slot+1);</div><div class='del'>-		printf ("Total slots available: %d\n",</div><div class='del'>-			total_slots_available);</div><div class='del'>-</div><div class='del'>-		printf ("Drive status: ");</div><div class='del'>-                status = ioctl (fd, CDROM_DRIVE_STATUS, CDSL_CURRENT);</div><div class='del'>-                if (status&lt;0) {</div><div class='del'>-                  perror(" CDROM_DRIVE_STATUS");</div><div class='del'>-                } else switch(status) {</div><div class='del'>-		case CDS_DISC_OK:</div><div class='del'>-			printf ("Ready.\n");</div><div class='del'>-			break;</div><div class='del'>-		case CDS_TRAY_OPEN:</div><div class='del'>-			printf ("Tray Open.\n");</div><div class='del'>-			break;</div><div class='del'>-		case CDS_DRIVE_NOT_READY:</div><div class='del'>-			printf ("Drive Not Ready.\n");</div><div class='del'>-			break;</div><div class='del'>-		default:</div><div class='del'>-			printf ("This Should not happen!\n");</div><div class='del'>-			break;</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		for (x_slot=0; x_slot&lt;total_slots_available; x_slot++) {</div><div class='del'>-			printf ("Slot %2d: ", x_slot+1);</div><div class='del'>-			status = ioctl (fd, CDROM_DRIVE_STATUS, x_slot);</div><div class='del'>-			if (status&lt;0) {</div><div class='del'>-			     perror(" CDROM_DRIVE_STATUS");</div><div class='del'>-			} else switch(status) {</div><div class='del'>-			case CDS_DISC_OK:</div><div class='del'>-				printf ("Disc present.");</div><div class='del'>-				break;</div><div class='del'>-			case CDS_NO_DISC:</div><div class='del'>-				printf ("Empty slot.");</div><div class='del'>-				break;</div><div class='del'>-			case CDS_TRAY_OPEN:</div><div class='del'>-				printf ("CD-ROM tray open.\n");</div><div class='del'>-				break;</div><div class='del'>-			case CDS_DRIVE_NOT_READY:</div><div class='del'>-				printf ("CD-ROM drive not ready.\n");</div><div class='del'>-				break;</div><div class='del'>-			case CDS_NO_INFO:</div><div class='del'>-				printf ("No Information available.");</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				printf ("This Should not happen!\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		  if (slot == x_slot) {</div><div class='del'>-                  status = ioctl (fd, CDROM_DISC_STATUS);</div><div class='del'>-                  if (status&lt;0) {</div><div class='del'>-			perror(" CDROM_DISC_STATUS");</div><div class='del'>-                  }</div><div class='del'>-		  switch (status) {</div><div class='del'>-			case CDS_AUDIO:</div><div class='del'>-				printf ("\tAudio disc.\t");</div><div class='del'>-				break;</div><div class='del'>-			case CDS_DATA_1:</div><div class='del'>-			case CDS_DATA_2:</div><div class='del'>-				printf ("\tData disc type %d.\t", status-CDS_DATA_1+1);</div><div class='del'>-				break;</div><div class='del'>-			case CDS_XA_2_1:</div><div class='del'>-			case CDS_XA_2_2:</div><div class='del'>-				printf ("\tXA data disc type %d.\t", status-CDS_XA_2_1+1);</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				printf ("\tUnknown disc type 0x%x!\t", status);</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-			}</div><div class='del'>-			status = ioctl (fd, CDROM_MEDIA_CHANGED, x_slot);</div><div class='del'>-			if (status&lt;0) {</div><div class='del'>-				perror(" CDROM_MEDIA_CHANGED");</div><div class='del'>-			}</div><div class='del'>-			switch (status) {</div><div class='del'>-			case 1:</div><div class='del'>-				printf ("Changed.\n");</div><div class='del'>-				break;</div><div class='del'>-			default:</div><div class='del'>-				printf ("\n");</div><div class='del'>-				break;</div><div class='del'>-			}</div><div class='del'>-		}</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	/* close device */</div><div class='del'>-	status = close (fd);</div><div class='del'>-	if (status != 0) {</div><div class='del'>-		fprintf (stderr, "%s: close failed for `%s`: %s\n",</div><div class='del'>-			 program, device, strerror (errno));</div><div class='del'>-		exit (1);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	exit (0);</div><div class='del'>-  }</div><div class='head'>diff --git a/Documentation/cdrom/index.rst b/Documentation/cdrom/index.rst<br/>index 338ad5f94e7c..e87a8785bc1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/cdrom/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/cdrom/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/cdrom/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/cdrom/index.rst</a></div><div class='hunk'>@@ -8,7 +8,6 @@ cdrom</div><div class='ctx'>     :maxdepth: 1</div><div class='ctx'> </div><div class='ctx'>     cdrom-standard</div><div class='del'>-    ide-cd</div><div class='ctx'>     packet-writing</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='head'>diff --git a/Documentation/conf.py b/Documentation/conf.py<br/>index 072ee31a301d..37314afd1ac8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/conf.py?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/conf.py</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/conf.py?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/conf.py</a></div><div class='hunk'>@@ -15,10 +15,28 @@</div><div class='ctx'> import sys</div><div class='ctx'> import os</div><div class='ctx'> import sphinx</div><div class='add'>+import shutil</div><div class='add'>+</div><div class='add'>+# helper</div><div class='add'>+# ------</div><div class='add'>+</div><div class='add'>+def have_command(cmd):</div><div class='add'>+    """Search ``cmd`` in the ``PATH`` environment.</div><div class='add'>+</div><div class='add'>+    If found, return True.</div><div class='add'>+    If not found, return False.</div><div class='add'>+    """</div><div class='add'>+    return shutil.which(cmd) is not None</div><div class='ctx'> </div><div class='ctx'> # Get Sphinx version</div><div class='ctx'> major, minor, patch = sphinx.version_info[:3]</div><div class='ctx'> </div><div class='add'>+#</div><div class='add'>+# Warn about older versions that we don't want to support for much</div><div class='add'>+# longer.</div><div class='add'>+#</div><div class='add'>+if (major &lt; 2) or (major == 2 and minor &lt; 4):</div><div class='add'>+    print('WARNING: support for Sphinx &lt; 2.4 will be removed soon.')</div><div class='ctx'> </div><div class='ctx'> # If extensions (or modules to document with autodoc) are in another directory,</div><div class='ctx'> # add these directories to sys.path here. If the directory is relative to the</div><div class='hunk'>@@ -86,6 +104,7 @@ if major &gt;= 3:</div><div class='ctx'>             "__used",</div><div class='ctx'>             "__weak",</div><div class='ctx'>             "noinline",</div><div class='add'>+            "__fix_address",</div><div class='ctx'> </div><div class='ctx'>             # include/linux/memblock.h:</div><div class='ctx'>             "__init_memblock",</div><div class='hunk'>@@ -97,6 +116,9 @@ if major &gt;= 3:</div><div class='ctx'> </div><div class='ctx'>             # include/linux/linkage.h:</div><div class='ctx'>             "asmlinkage",</div><div class='add'>+</div><div class='add'>+            # include/linux/btf.h</div><div class='add'>+            "__bpf_kfunc",</div><div class='ctx'>         ]</div><div class='ctx'> </div><div class='ctx'> else:</div><div class='hunk'>@@ -106,10 +128,35 @@ else:</div><div class='ctx'> autosectionlabel_prefix_document = True</div><div class='ctx'> autosectionlabel_maxdepth = 2</div><div class='ctx'> </div><div class='del'>-extensions.append("sphinx.ext.imgmath")</div><div class='add'>+# Load math renderer:</div><div class='add'>+# For html builder, load imgmath only when its dependencies are met.</div><div class='add'>+# mathjax is the default math renderer since Sphinx 1.8.</div><div class='add'>+have_latex =  have_command('latex')</div><div class='add'>+have_dvipng = have_command('dvipng')</div><div class='add'>+load_imgmath = have_latex and have_dvipng</div><div class='add'>+</div><div class='add'>+# Respect SPHINX_IMGMATH (for html docs only)</div><div class='add'>+if 'SPHINX_IMGMATH' in os.environ:</div><div class='add'>+    env_sphinx_imgmath = os.environ['SPHINX_IMGMATH']</div><div class='add'>+    if 'yes' in env_sphinx_imgmath:</div><div class='add'>+        load_imgmath = True</div><div class='add'>+    elif 'no' in env_sphinx_imgmath:</div><div class='add'>+        load_imgmath = False</div><div class='add'>+    else:</div><div class='add'>+        sys.stderr.write("Unknown env SPHINX_IMGMATH=%s ignored.\n" % env_sphinx_imgmath)</div><div class='add'>+</div><div class='add'>+# Always load imgmath for Sphinx &lt;1.8 or for epub docs</div><div class='add'>+load_imgmath = (load_imgmath or (major == 1 and minor &lt; 8)</div><div class='add'>+                or 'epub' in sys.argv)</div><div class='add'>+</div><div class='add'>+if load_imgmath:</div><div class='add'>+    extensions.append("sphinx.ext.imgmath")</div><div class='add'>+    math_renderer = 'imgmath'</div><div class='add'>+else:</div><div class='add'>+    math_renderer = 'mathjax'</div><div class='ctx'> </div><div class='ctx'> # Add any paths that contain templates here, relative to this directory.</div><div class='del'>-templates_path = ['_templates']</div><div class='add'>+templates_path = ['sphinx/templates']</div><div class='ctx'> </div><div class='ctx'> # The suffix(es) of source filenames.</div><div class='ctx'> # You can specify multiple suffix as a list of string:</div><div class='hunk'>@@ -156,12 +203,30 @@ finally:</div><div class='ctx'>     else:</div><div class='ctx'>         version = release = "unknown version"</div><div class='ctx'> </div><div class='add'>+#</div><div class='add'>+# HACK: there seems to be no easy way for us to get at the version and</div><div class='add'>+# release information passed in from the makefile...so go pawing through the</div><div class='add'>+# command-line options and find it for ourselves.</div><div class='add'>+#</div><div class='add'>+def get_cline_version():</div><div class='add'>+    c_version = c_release = ''</div><div class='add'>+    for arg in sys.argv:</div><div class='add'>+        if arg.startswith('version='):</div><div class='add'>+            c_version = arg[8:]</div><div class='add'>+        elif arg.startswith('release='):</div><div class='add'>+            c_release = arg[8:]</div><div class='add'>+    if c_version:</div><div class='add'>+        if c_release:</div><div class='add'>+            return c_version + '-' + c_release</div><div class='add'>+        return c_version</div><div class='add'>+    return version # Whatever we came up with before</div><div class='add'>+</div><div class='ctx'> # The language for content autogenerated by Sphinx. Refer to documentation</div><div class='ctx'> # for a list of supported languages.</div><div class='ctx'> #</div><div class='ctx'> # This is also used if you do content translation via gettext catalogs.</div><div class='ctx'> # Usually you set "language" from the command line for these cases.</div><div class='del'>-language = None</div><div class='add'>+language = 'en'</div><div class='ctx'> </div><div class='ctx'> # There are two options for replacing |today|: either, you set today to some</div><div class='ctx'> # non-false value, then it is used:</div><div class='hunk'>@@ -209,7 +274,7 @@ highlight_language = 'none'</div><div class='ctx'> # a list of builtin themes.</div><div class='ctx'> </div><div class='ctx'> # Default theme</div><div class='del'>-html_theme = 'sphinx_rtd_theme'</div><div class='add'>+html_theme = 'alabaster'</div><div class='ctx'> html_css_files = []</div><div class='ctx'> </div><div class='ctx'> if "DOCS_THEME" in os.environ:</div><div class='hunk'>@@ -240,8 +305,12 @@ if html_theme == 'sphinx_rtd_theme' or html_theme == 'sphinx_rtd_dark_mode':</div><div class='ctx'>                 # Add color-specific RTD normal mode</div><div class='ctx'>                 html_css_files.append('theme_rtd_colors.css')</div><div class='ctx'> </div><div class='add'>+        html_theme_options = {</div><div class='add'>+            'navigation_depth': -1,</div><div class='add'>+        }</div><div class='add'>+</div><div class='ctx'>     except ImportError:</div><div class='del'>-        html_theme = 'classic'</div><div class='add'>+        html_theme = 'alabaster'</div><div class='ctx'> </div><div class='ctx'> if "DOCS_CSS" in os.environ:</div><div class='ctx'>     css = os.environ["DOCS_CSS"].split(" ")</div><div class='hunk'>@@ -257,126 +326,35 @@ if major &lt;= 1 and minor &lt; 8:</div><div class='ctx'>     for l in html_css_files:</div><div class='ctx'>         html_context['css_files'].append('_static/' + l)</div><div class='ctx'> </div><div class='del'>-if  html_theme == 'classic':</div><div class='add'>+if  html_theme == 'alabaster':</div><div class='ctx'>     html_theme_options = {</div><div class='del'>-        'rightsidebar':        False,</div><div class='del'>-        'stickysidebar':       True,</div><div class='del'>-        'collapsiblesidebar':  True,</div><div class='del'>-        'externalrefs':        False,</div><div class='del'>-</div><div class='del'>-        'footerbgcolor':       "white",</div><div class='del'>-        'footertextcolor':     "white",</div><div class='del'>-        'sidebarbgcolor':      "white",</div><div class='del'>-        'sidebarbtncolor':     "black",</div><div class='del'>-        'sidebartextcolor':    "black",</div><div class='del'>-        'sidebarlinkcolor':    "#686bff",</div><div class='del'>-        'relbarbgcolor':       "#133f52",</div><div class='del'>-        'relbartextcolor':     "white",</div><div class='del'>-        'relbarlinkcolor':     "white",</div><div class='del'>-        'bgcolor':             "white",</div><div class='del'>-        'textcolor':           "black",</div><div class='del'>-        'headbgcolor':         "#f2f2f2",</div><div class='del'>-        'headtextcolor':       "#20435c",</div><div class='del'>-        'headlinkcolor':       "#c60f0f",</div><div class='del'>-        'linkcolor':           "#355f7c",</div><div class='del'>-        'visitedlinkcolor':    "#355f7c",</div><div class='del'>-        'codebgcolor':         "#3f3f3f",</div><div class='del'>-        'codetextcolor':       "white",</div><div class='del'>-</div><div class='del'>-        'bodyfont':            "serif",</div><div class='del'>-        'headfont':            "sans-serif",</div><div class='add'>+        'description': get_cline_version(),</div><div class='add'>+        'page_width': '65em',</div><div class='add'>+        'sidebar_width': '15em',</div><div class='add'>+        'fixed_sidebar': 'true',</div><div class='add'>+        'font_size': 'inherit',</div><div class='add'>+        'font_family': 'serif',</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='ctx'> sys.stderr.write("Using %s theme\n" % html_theme)</div><div class='ctx'> </div><div class='del'>-# Theme options are theme-specific and customize the look and feel of a theme</div><div class='del'>-# further.  For a list of options available for each theme, see the</div><div class='del'>-# documentation.</div><div class='del'>-#html_theme_options = {}</div><div class='del'>-</div><div class='del'>-# Add any paths that contain custom themes here, relative to this directory.</div><div class='del'>-#html_theme_path = []</div><div class='del'>-</div><div class='del'>-# The name for this set of Sphinx documents.  If None, it defaults to</div><div class='del'>-# "&lt;project&gt; v&lt;release&gt; documentation".</div><div class='del'>-#html_title = None</div><div class='del'>-</div><div class='del'>-# A shorter title for the navigation bar.  Default is the same as html_title.</div><div class='del'>-#html_short_title = None</div><div class='del'>-</div><div class='del'>-# The name of an image file (relative to this directory) to place at the top</div><div class='del'>-# of the sidebar.</div><div class='del'>-#html_logo = None</div><div class='del'>-</div><div class='del'>-# The name of an image file (within the static path) to use as favicon of the</div><div class='del'>-# docs.  This file should be a Windows icon file (.ico) being 16x16 or 32x32</div><div class='del'>-# pixels large.</div><div class='del'>-#html_favicon = None</div><div class='del'>-</div><div class='ctx'> # Add any paths that contain custom static files (such as style sheets) here,</div><div class='ctx'> # relative to this directory. They are copied after the builtin static files,</div><div class='ctx'> # so a file named "default.css" will overwrite the builtin "default.css".</div><div class='ctx'> html_static_path = ['sphinx-static']</div><div class='ctx'> </div><div class='del'>-# Add any extra paths that contain custom files (such as robots.txt or</div><div class='del'>-# .htaccess) here, relative to this directory. These files are copied</div><div class='del'>-# directly to the root of the documentation.</div><div class='del'>-#html_extra_path = []</div><div class='del'>-</div><div class='del'>-# If not '', a 'Last updated on:' timestamp is inserted at every page bottom,</div><div class='del'>-# using the given strftime format.</div><div class='del'>-#html_last_updated_fmt = '%b %d, %Y'</div><div class='del'>-</div><div class='del'>-# If true, SmartyPants will be used to convert quotes and dashes to</div><div class='del'>-# typographically correct entities.</div><div class='del'>-html_use_smartypants = False</div><div class='add'>+# If true, Docutils "smart quotes" will be used to convert quotes and dashes</div><div class='add'>+# to typographically correct entities.  This will convert "--" to "—",</div><div class='add'>+# which is not always what we want, so disable it.</div><div class='add'>+smartquotes = False</div><div class='ctx'> </div><div class='ctx'> # Custom sidebar templates, maps document names to template names.</div><div class='del'>-#html_sidebars = {}</div><div class='del'>-</div><div class='del'>-# Additional templates that should be rendered to pages, maps page names to</div><div class='del'>-# template names.</div><div class='del'>-#html_additional_pages = {}</div><div class='del'>-</div><div class='del'>-# If false, no module index is generated.</div><div class='del'>-#html_domain_indices = True</div><div class='del'>-</div><div class='del'>-# If false, no index is generated.</div><div class='del'>-#html_use_index = True</div><div class='del'>-</div><div class='del'>-# If true, the index is split into individual pages for each letter.</div><div class='del'>-#html_split_index = False</div><div class='del'>-</div><div class='del'>-# If true, links to the reST sources are added to the pages.</div><div class='del'>-#html_show_sourcelink = True</div><div class='del'>-</div><div class='del'>-# If true, "Created using Sphinx" is shown in the HTML footer. Default is True.</div><div class='del'>-#html_show_sphinx = True</div><div class='add'>+# Note that the RTD theme ignores this</div><div class='add'>+html_sidebars = { '**': ['searchbox.html', 'kernel-toc.html', 'sourcelink.html']}</div><div class='ctx'> </div><div class='del'>-# If true, "(C) Copyright ..." is shown in the HTML footer. Default is True.</div><div class='del'>-#html_show_copyright = True</div><div class='del'>-</div><div class='del'>-# If true, an OpenSearch description file will be output, and all pages will</div><div class='del'>-# contain a &lt;link&gt; tag referring to it.  The value of this option must be the</div><div class='del'>-# base URL from which the finished HTML is served.</div><div class='del'>-#html_use_opensearch = ''</div><div class='del'>-</div><div class='del'>-# This is the file name suffix for HTML files (e.g. ".xhtml").</div><div class='del'>-#html_file_suffix = None</div><div class='del'>-</div><div class='del'>-# Language to be used for generating the HTML full-text search index.</div><div class='del'>-# Sphinx supports the following languages:</div><div class='del'>-#   'da', 'de', 'en', 'es', 'fi', 'fr', 'h', 'it', 'ja'</div><div class='del'>-#   'nl', 'no', 'pt', 'ro', 'r', 'sv', 'tr'</div><div class='del'>-#html_search_language = 'en'</div><div class='del'>-</div><div class='del'>-# A dictionary with options for the search language support, empty by default.</div><div class='del'>-# Now only 'ja' uses this config value</div><div class='del'>-#html_search_options = {'type': 'default'}</div><div class='del'>-</div><div class='del'>-# The name of a javascript file (relative to the configuration directory) that</div><div class='del'>-# implements a search results scorer. If empty, the default will be used.</div><div class='del'>-#html_search_scorer = 'scorer.js'</div><div class='add'>+# about.html is available for alabaster theme. Add it at the front.</div><div class='add'>+if html_theme == 'alabaster':</div><div class='add'>+    html_sidebars['**'].insert(0, 'about.html')</div><div class='ctx'> </div><div class='ctx'> # Output file base name for HTML help builder.</div><div class='ctx'> htmlhelp_basename = 'TheLinuxKerneldoc'</div><div class='hunk'>@@ -519,19 +497,6 @@ texinfo_documents = [</div><div class='ctx'>      'Miscellaneous'),</div><div class='ctx'> ]</div><div class='ctx'> </div><div class='del'>-# Documents to append as an appendix to all manuals.</div><div class='del'>-#texinfo_appendices = []</div><div class='del'>-</div><div class='del'>-# If false, no module index is generated.</div><div class='del'>-#texinfo_domain_indices = True</div><div class='del'>-</div><div class='del'>-# How to display URL addresses: 'footnote', 'no', or 'inline'.</div><div class='del'>-#texinfo_show_urls = 'footnote'</div><div class='del'>-</div><div class='del'>-# If true, do not generate a @detailmenu in the "Top" node's menu.</div><div class='del'>-#texinfo_no_detailmenu = False</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> # -- Options for Epub output ----------------------------------------------</div><div class='ctx'> </div><div class='ctx'> # Bibliographic Dublin Core info.</div><div class='hunk'>@@ -540,67 +505,9 @@ epub_author = author</div><div class='ctx'> epub_publisher = author</div><div class='ctx'> epub_copyright = copyright</div><div class='ctx'> </div><div class='del'>-# The basename for the epub file. It defaults to the project name.</div><div class='del'>-#epub_basename = project</div><div class='del'>-</div><div class='del'>-# The HTML theme for the epub output. Since the default themes are not</div><div class='del'>-# optimized for small screen space, using the same theme for HTML and epub</div><div class='del'>-# output is usually not wise. This defaults to 'epub', a theme designed to save</div><div class='del'>-# visual space.</div><div class='del'>-#epub_theme = 'epub'</div><div class='del'>-</div><div class='del'>-# The language of the text. It defaults to the language option</div><div class='del'>-# or 'en' if the language is not set.</div><div class='del'>-#epub_language = ''</div><div class='del'>-</div><div class='del'>-# The scheme of the identifier. Typical schemes are ISBN or URL.</div><div class='del'>-#epub_scheme = ''</div><div class='del'>-</div><div class='del'>-# The unique identifier of the text. This can be a ISBN number</div><div class='del'>-# or the project homepage.</div><div class='del'>-#epub_identifier = ''</div><div class='del'>-</div><div class='del'>-# A unique identification for the text.</div><div class='del'>-#epub_uid = ''</div><div class='del'>-</div><div class='del'>-# A tuple containing the cover image and cover page html template filenames.</div><div class='del'>-#epub_cover = ()</div><div class='del'>-</div><div class='del'>-# A sequence of (type, uri, title) tuples for the guide element of content.opf.</div><div class='del'>-#epub_guide = ()</div><div class='del'>-</div><div class='del'>-# HTML files that should be inserted before the pages created by sphinx.</div><div class='del'>-# The format is a list of tuples containing the path and title.</div><div class='del'>-#epub_pre_files = []</div><div class='del'>-</div><div class='del'>-# HTML files that should be inserted after the pages created by sphinx.</div><div class='del'>-# The format is a list of tuples containing the path and title.</div><div class='del'>-#epub_post_files = []</div><div class='del'>-</div><div class='ctx'> # A list of files that should not be packed into the epub file.</div><div class='ctx'> epub_exclude_files = ['search.html']</div><div class='ctx'> </div><div class='del'>-# The depth of the table of contents in toc.ncx.</div><div class='del'>-#epub_tocdepth = 3</div><div class='del'>-</div><div class='del'>-# Allow duplicate toc entries.</div><div class='del'>-#epub_tocdup = True</div><div class='del'>-</div><div class='del'>-# Choose between 'default' and 'includehidden'.</div><div class='del'>-#epub_tocscope = 'default'</div><div class='del'>-</div><div class='del'>-# Fix unsupported image types using the Pillow.</div><div class='del'>-#epub_fix_images = False</div><div class='del'>-</div><div class='del'>-# Scale large images.</div><div class='del'>-#epub_max_image_width = 0</div><div class='del'>-</div><div class='del'>-# How to display URL addresses: 'footnote', 'no', or 'inline'.</div><div class='del'>-#epub_show_urls = 'inline'</div><div class='del'>-</div><div class='del'>-# If false, no index is generated.</div><div class='del'>-#epub_use_index = True</div><div class='del'>-</div><div class='ctx'> #=======</div><div class='ctx'> # rst2pdf</div><div class='ctx'> #</div><div class='head'>diff --git a/Documentation/asm-annotations.rst b/Documentation/core-api/asm-annotations.rst<br/>index a64f2ca469d4..11c96d3f9ad6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/asm-annotations.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/asm-annotations.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/asm-annotations.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/asm-annotations.rst</a></div><div class='hunk'>@@ -43,10 +43,11 @@ annotated objects like this, tools can be run on them to generate more useful</div><div class='ctx'> information. In particular, on properly annotated objects, ``objtool`` can be</div><div class='ctx'> run to check and fix the object if needed. Currently, ``objtool`` can report</div><div class='ctx'> missing frame pointer setup/destruction in functions. It can also</div><div class='del'>-automatically generate annotations for :doc:`ORC unwinder &lt;x86/orc-unwinder&gt;`</div><div class='add'>+automatically generate annotations for the ORC unwinder</div><div class='add'>+(Documentation/arch/x86/orc-unwinder.rst)</div><div class='ctx'> for most code. Both of these are especially important to support reliable</div><div class='del'>-stack traces which are in turn necessary for :doc:`Kernel live patching</div><div class='del'>-&lt;livepatch/livepatch&gt;`.</div><div class='add'>+stack traces which are in turn necessary for kernel live patching</div><div class='add'>+(Documentation/livepatch/livepatch.rst).</div><div class='ctx'> </div><div class='ctx'> Caveat and Discussion</div><div class='ctx'> ---------------------</div><div class='head'>diff --git a/Documentation/core-api/bus-virt-phys-mapping.rst b/Documentation/core-api/bus-virt-phys-mapping.rst<br/>deleted file mode 100644<br/>index c72b24a7d52c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/bus-virt-phys-mapping.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/bus-virt-phys-mapping.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,220 +0,0 @@</div><div class='del'>-==========================================================</div><div class='del'>-How to access I/O mapped memory from within device drivers</div><div class='del'>-==========================================================</div><div class='del'>-</div><div class='del'>-:Author: Linus</div><div class='del'>-</div><div class='del'>-.. warning::</div><div class='del'>-</div><div class='del'>-	The virt_to_bus() and bus_to_virt() functions have been</div><div class='del'>-	superseded by the functionality provided by the PCI DMA interface</div><div class='del'>-	(see Documentation/core-api/dma-api-howto.rst).  They continue</div><div class='del'>-	to be documented below for historical purposes, but new code</div><div class='del'>-	must not use them. --davidm 00/12/12</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>-  [ This is a mail message in response to a query on IO mapping, thus the</div><div class='del'>-    strange format for a "document" ]</div><div class='del'>-</div><div class='del'>-The AHA-1542 is a bus-master device, and your patch makes the driver give the</div><div class='del'>-controller the physical address of the buffers, which is correct on x86</div><div class='del'>-(because all bus master devices see the physical memory mappings directly). </div><div class='del'>-</div><div class='del'>-However, on many setups, there are actually **three** different ways of looking</div><div class='del'>-at memory addresses, and in this case we actually want the third, the</div><div class='del'>-so-called "bus address". </div><div class='del'>-</div><div class='del'>-Essentially, the three ways of addressing memory are (this is "real memory",</div><div class='del'>-that is, normal RAM--see later about other details): </div><div class='del'>-</div><div class='del'>- - CPU untranslated.  This is the "physical" address.  Physical address </div><div class='del'>-   0 is what the CPU sees when it drives zeroes on the memory bus.</div><div class='del'>-</div><div class='del'>- - CPU translated address. This is the "virtual" address, and is </div><div class='del'>-   completely internal to the CPU itself with the CPU doing the appropriate</div><div class='del'>-   translations into "CPU untranslated". </div><div class='del'>-</div><div class='del'>- - bus address. This is the address of memory as seen by OTHER devices, </div><div class='del'>-   not the CPU. Now, in theory there could be many different bus </div><div class='del'>-   addresses, with each device seeing memory in some device-specific way, but</div><div class='del'>-   happily most hardware designers aren't actually actively trying to make</div><div class='del'>-   things any more complex than necessary, so you can assume that all </div><div class='del'>-   external hardware sees the memory the same way. </div><div class='del'>-</div><div class='del'>-Now, on normal PCs the bus address is exactly the same as the physical</div><div class='del'>-address, and things are very simple indeed. However, they are that simple</div><div class='del'>-because the memory and the devices share the same address space, and that is</div><div class='del'>-not generally necessarily true on other PCI/ISA setups. </div><div class='del'>-</div><div class='del'>-Now, just as an example, on the PReP (PowerPC Reference Platform), the </div><div class='del'>-CPU sees a memory map something like this (this is from memory)::</div><div class='del'>-</div><div class='del'>-	0-2 GB		"real memory"</div><div class='del'>-	2 GB-3 GB	"system IO" (inb/out and similar accesses on x86)</div><div class='del'>-	3 GB-4 GB 	"IO memory" (shared memory over the IO bus)</div><div class='del'>-</div><div class='del'>-Now, that looks simple enough. However, when you look at the same thing from</div><div class='del'>-the viewpoint of the devices, you have the reverse, and the physical memory</div><div class='del'>-address 0 actually shows up as address 2 GB for any IO master.</div><div class='del'>-</div><div class='del'>-So when the CPU wants any bus master to write to physical memory 0, it </div><div class='del'>-has to give the master address 0x80000000 as the memory address.</div><div class='del'>-</div><div class='del'>-So, for example, depending on how the kernel is actually mapped on the </div><div class='del'>-PPC, you can end up with a setup like this::</div><div class='del'>-</div><div class='del'>- physical address:	0</div><div class='del'>- virtual address:	0xC0000000</div><div class='del'>- bus address:		0x80000000</div><div class='del'>-</div><div class='del'>-where all the addresses actually point to the same thing.  It's just seen </div><div class='del'>-through different translations..</div><div class='del'>-</div><div class='del'>-Similarly, on the Alpha, the normal translation is::</div><div class='del'>-</div><div class='del'>- physical address:	0</div><div class='del'>- virtual address:	0xfffffc0000000000</div><div class='del'>- bus address:		0x40000000</div><div class='del'>-</div><div class='del'>-(but there are also Alphas where the physical address and the bus address</div><div class='del'>-are the same). </div><div class='del'>-</div><div class='del'>-Anyway, the way to look up all these translations, you do::</div><div class='del'>-</div><div class='del'>-	#include &lt;asm/io.h&gt;</div><div class='del'>-</div><div class='del'>-	phys_addr = virt_to_phys(virt_addr);</div><div class='del'>-	virt_addr = phys_to_virt(phys_addr);</div><div class='del'>-	 bus_addr = virt_to_bus(virt_addr);</div><div class='del'>-	virt_addr = bus_to_virt(bus_addr);</div><div class='del'>-</div><div class='del'>-Now, when do you need these?</div><div class='del'>-</div><div class='del'>-You want the **virtual** address when you are actually going to access that</div><div class='del'>-pointer from the kernel. So you can have something like this::</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * this is the hardware "mailbox" we use to communicate with</div><div class='del'>-	 * the controller. The controller sees this directly.</div><div class='del'>-	 */</div><div class='del'>-	struct mailbox {</div><div class='del'>-		__u32 status;</div><div class='del'>-		__u32 bufstart;</div><div class='del'>-		__u32 buflen;</div><div class='del'>-		..</div><div class='del'>-	} mbox;</div><div class='del'>-</div><div class='del'>-		unsigned char * retbuffer;</div><div class='del'>-</div><div class='del'>-		/* get the address from the controller */</div><div class='del'>-		retbuffer = bus_to_virt(mbox.bufstart);</div><div class='del'>-		switch (retbuffer[0]) {</div><div class='del'>-			case STATUS_OK:</div><div class='del'>-				...</div><div class='del'>-</div><div class='del'>-on the other hand, you want the bus address when you have a buffer that </div><div class='del'>-you want to give to the controller::</div><div class='del'>-</div><div class='del'>-	/* ask the controller to read the sense status into "sense_buffer" */</div><div class='del'>-	mbox.bufstart = virt_to_bus(&amp;sense_buffer);</div><div class='del'>-	mbox.buflen = sizeof(sense_buffer);</div><div class='del'>-	mbox.status = 0;</div><div class='del'>-	notify_controller(&amp;mbox);</div><div class='del'>-</div><div class='del'>-And you generally **never** want to use the physical address, because you can't</div><div class='del'>-use that from the CPU (the CPU only uses translated virtual addresses), and</div><div class='del'>-you can't use it from the bus master. </div><div class='del'>-</div><div class='del'>-So why do we care about the physical address at all? We do need the physical</div><div class='del'>-address in some cases, it's just not very often in normal code.  The physical</div><div class='del'>-address is needed if you use memory mappings, for example, because the</div><div class='del'>-"remap_pfn_range()" mm function wants the physical address of the memory to</div><div class='del'>-be remapped as measured in units of pages, a.k.a. the pfn (the memory</div><div class='del'>-management layer doesn't know about devices outside the CPU, so it</div><div class='del'>-shouldn't need to know about "bus addresses" etc).</div><div class='del'>-</div><div class='del'>-.. note::</div><div class='del'>-</div><div class='del'>-	The above is only one part of the whole equation. The above</div><div class='del'>-	only talks about "real memory", that is, CPU memory (RAM).</div><div class='del'>-</div><div class='del'>-There is a completely different type of memory too, and that's the "shared</div><div class='del'>-memory" on the PCI or ISA bus. That's generally not RAM (although in the case</div><div class='del'>-of a video graphics card it can be normal DRAM that is just used for a frame</div><div class='del'>-buffer), but can be things like a packet buffer in a network card etc. </div><div class='del'>-</div><div class='del'>-This memory is called "PCI memory" or "shared memory" or "IO memory" or</div><div class='del'>-whatever, and there is only one way to access it: the readb/writeb and</div><div class='del'>-related functions. You should never take the address of such memory, because</div><div class='del'>-there is really nothing you can do with such an address: it's not</div><div class='del'>-conceptually in the same memory space as "real memory" at all, so you cannot</div><div class='del'>-just dereference a pointer. (Sadly, on x86 it **is** in the same memory space,</div><div class='del'>-so on x86 it actually works to just deference a pointer, but it's not</div><div class='del'>-portable). </div><div class='del'>-</div><div class='del'>-For such memory, you can do things like:</div><div class='del'>-</div><div class='del'>- - reading::</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * read first 32 bits from ISA memory at 0xC0000, aka</div><div class='del'>-	 * C000:0000 in DOS terms</div><div class='del'>-	 */</div><div class='del'>-	unsigned int signature = isa_readl(0xC0000);</div><div class='del'>-</div><div class='del'>- - remapping and writing::</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * remap framebuffer PCI memory area at 0xFC000000,</div><div class='del'>-	 * size 1MB, so that we can access it: We can directly</div><div class='del'>-	 * access only the 640k-1MB area, so anything else</div><div class='del'>-	 * has to be remapped.</div><div class='del'>-	 */</div><div class='del'>-	void __iomem *baseptr = ioremap(0xFC000000, 1024*1024);</div><div class='del'>-</div><div class='del'>-	/* write a 'A' to the offset 10 of the area */</div><div class='del'>-	writeb('A',baseptr+10);</div><div class='del'>-</div><div class='del'>-	/* unmap when we unload the driver */</div><div class='del'>-	iounmap(baseptr);</div><div class='del'>-</div><div class='del'>- - copying and clearing::</div><div class='del'>-</div><div class='del'>-	/* get the 6-byte Ethernet address at ISA address E000:0040 */</div><div class='del'>-	memcpy_fromio(kernel_buffer, 0xE0040, 6);</div><div class='del'>-	/* write a packet to the driver */</div><div class='del'>-	memcpy_toio(0xE1000, skb-&gt;data, skb-&gt;len);</div><div class='del'>-	/* clear the frame buffer */</div><div class='del'>-	memset_io(0xA0000, 0, 0x10000);</div><div class='del'>-</div><div class='del'>-OK, that just about covers the basics of accessing IO portably.  Questions?</div><div class='del'>-Comments? You may think that all the above is overly complex, but one day you</div><div class='del'>-might find yourself with a 500 MHz Alpha in front of you, and then you'll be</div><div class='del'>-happy that your driver works ;)</div><div class='del'>-</div><div class='del'>-Note that kernel versions 2.0.x (and earlier) mistakenly called the</div><div class='del'>-ioremap() function "vremap()".  ioremap() is the proper name, but I</div><div class='del'>-didn't think straight when I wrote it originally.  People who have to</div><div class='del'>-support both can do something like::</div><div class='del'>- </div><div class='del'>-	/* support old naming silliness */</div><div class='del'>-	#if LINUX_VERSION_CODE &lt; 0x020100</div><div class='del'>-	#define ioremap vremap</div><div class='del'>-	#define iounmap vfree                                                     </div><div class='del'>-	#endif</div><div class='del'>- </div><div class='del'>-at the top of their source files, and then they can use the right names</div><div class='del'>-even on 2.0.x systems. </div><div class='del'>-</div><div class='del'>-And the above sounds worse than it really is.  Most real drivers really</div><div class='del'>-don't do all that complex things (or rather: the complexity is not so</div><div class='del'>-much in the actual IO accesses as in error handling and timeouts etc). </div><div class='del'>-It's generally not hard to fix drivers, and in many cases the code</div><div class='del'>-actually looks better afterwards::</div><div class='del'>-</div><div class='del'>-	unsigned long signature = *(unsigned int *) 0xC0000;</div><div class='del'>-		vs</div><div class='del'>-	unsigned long signature = readl(0xC0000);</div><div class='del'>-</div><div class='del'>-I think the second version actually is more readable, no?</div><div class='head'>diff --git a/Documentation/core-api/cpu_hotplug.rst b/Documentation/core-api/cpu_hotplug.rst<br/>index c6f4ba2fb32d..f75778d37488 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/cpu_hotplug.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/cpu_hotplug.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/cpu_hotplug.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/cpu_hotplug.rst</a></div><div class='hunk'>@@ -560,7 +560,7 @@ available:</div><div class='ctx'>   * cpuhp_state_remove_instance(state, node)</div><div class='ctx'>   * cpuhp_state_remove_instance_nocalls(state, node)</div><div class='ctx'> </div><div class='del'>-The arguments are the same as for the the cpuhp_state_add_instance*()</div><div class='add'>+The arguments are the same as for the cpuhp_state_add_instance*()</div><div class='ctx'> variants above.</div><div class='ctx'> </div><div class='ctx'> The functions differ in the way how the installed callbacks are treated:</div><div class='head'>diff --git a/Documentation/core-api/dma-api-howto.rst b/Documentation/core-api/dma-api-howto.rst<br/>index 358d495456d1..72f6cdb6be1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/dma-api-howto.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/dma-api-howto.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/dma-api-howto.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/dma-api-howto.rst</a></div><div class='hunk'>@@ -185,7 +185,7 @@ device struct of your device is embedded in the bus-specific device struct of</div><div class='ctx'> your device.  For example, &amp;pdev-&gt;dev is a pointer to the device struct of a</div><div class='ctx'> PCI device (pdev is a pointer to the PCI device struct of your device).</div><div class='ctx'> </div><div class='del'>-These calls usually return zero to indicated your device can perform DMA</div><div class='add'>+These calls usually return zero to indicate your device can perform DMA</div><div class='ctx'> properly on the machine given the address mask you provided, but they might</div><div class='ctx'> return an error if the mask is too small to be supportable on the given</div><div class='ctx'> system.  If it returns non-zero, your device cannot perform DMA properly on</div><div class='hunk'>@@ -707,20 +707,6 @@ to use the dma_sync_*() interfaces::</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-Drivers converted fully to this interface should not use virt_to_bus() any</div><div class='del'>-longer, nor should they use bus_to_virt(). Some drivers have to be changed a</div><div class='del'>-little bit, because there is no longer an equivalent to bus_to_virt() in the</div><div class='del'>-dynamic DMA mapping scheme - you have to always store the DMA addresses</div><div class='del'>-returned by the dma_alloc_coherent(), dma_pool_alloc(), and dma_map_single()</div><div class='del'>-calls (dma_map_sg() stores them in the scatterlist itself if the platform</div><div class='del'>-supports dynamic DMA mapping in hardware) in your driver structures and/or</div><div class='del'>-in the card registers.</div><div class='del'>-</div><div class='del'>-All drivers should be using these interfaces with no exceptions.  It</div><div class='del'>-is planned to completely remove virt_to_bus() and bus_to_virt() as</div><div class='del'>-they are entirely deprecated.  Some ports already do not provide these</div><div class='del'>-as it is impossible to correctly support them.</div><div class='del'>-</div><div class='ctx'> Handling Errors</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/dma-api.rst b/Documentation/core-api/dma-api.rst<br/>index 6d6d0edd2d27..829f20a193ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/dma-api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/dma-api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/dma-api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/dma-api.rst</a></div><div class='hunk'>@@ -206,6 +206,20 @@ others should not be larger than the returned value.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='add'>+	size_t</div><div class='add'>+	dma_opt_mapping_size(struct device *dev);</div><div class='add'>+</div><div class='add'>+Returns the maximum optimal size of a mapping for the device.</div><div class='add'>+</div><div class='add'>+Mapping larger buffers may take much longer in certain scenarios. In</div><div class='add'>+addition, for high-rate short-lived streaming mappings, the upfront time</div><div class='add'>+spent on the mapping may account for an appreciable part of the total</div><div class='add'>+request lifetime. As such, if splitting larger requests incurs no</div><div class='add'>+significant performance penalty, then device drivers are advised to</div><div class='add'>+limit total DMA streaming mappings length to the returned value.</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='ctx'> 	bool</div><div class='ctx'> 	dma_need_sync(struct device *dev, dma_addr_t dma_addr);</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/idr.rst b/Documentation/core-api/idr.rst<br/>index 2eb5afdb9931..18d724867064 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/idr.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/idr.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/idr.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/idr.rst</a></div><div class='hunk'>@@ -17,6 +17,9 @@ solution to the problem to avoid everybody inventing their own.  The IDR</div><div class='ctx'> provides the ability to map an ID to a pointer, while the IDA provides</div><div class='ctx'> only ID allocation, and as a result is much more memory-efficient.</div><div class='ctx'> </div><div class='add'>+The IDR interface is deprecated; please use the :doc:`XArray &lt;xarray&gt;`</div><div class='add'>+instead.</div><div class='add'>+</div><div class='ctx'> IDR usage</div><div class='ctx'> =========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/index.rst b/Documentation/core-api/index.rst<br/>index 972d46a5ddf6..7a3a08d81f11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/index.rst</a></div><div class='hunk'>@@ -18,9 +18,12 @@ it.</div><div class='ctx'> </div><div class='ctx'>    kernel-api</div><div class='ctx'>    workqueue</div><div class='add'>+   watch_queue</div><div class='ctx'>    printk-basics</div><div class='ctx'>    printk-formats</div><div class='add'>+   printk-index</div><div class='ctx'>    symbol-namespaces</div><div class='add'>+   asm-annotations</div><div class='ctx'> </div><div class='ctx'> Data structures and low-level utilities</div><div class='ctx'> =======================================</div><div class='hunk'>@@ -34,15 +37,17 @@ Library functionality that is used throughout the kernel.</div><div class='ctx'>    kref</div><div class='ctx'>    assoc_array</div><div class='ctx'>    xarray</div><div class='add'>+   maple_tree</div><div class='ctx'>    idr</div><div class='ctx'>    circular-buffers</div><div class='ctx'>    rbtree</div><div class='ctx'>    generic-radix-tree</div><div class='ctx'>    packing</div><div class='del'>-   bus-virt-phys-mapping</div><div class='ctx'>    this_cpu_ops</div><div class='ctx'>    timekeeping</div><div class='ctx'>    errseq</div><div class='add'>+   wrappers/atomic_t</div><div class='add'>+   wrappers/atomic_bitops</div><div class='ctx'> </div><div class='ctx'> Low level entry and exit</div><div class='ctx'> ========================</div><div class='hunk'>@@ -66,6 +71,7 @@ Documentation/locking/index.rst for more related documentation.</div><div class='ctx'>    local_ops</div><div class='ctx'>    padata</div><div class='ctx'>    ../RCU/index</div><div class='add'>+   wrappers/memory-barriers.rst</div><div class='ctx'> </div><div class='ctx'> Low-level hardware management</div><div class='ctx'> =============================</div><div class='hunk'>@@ -85,7 +91,7 @@ Memory management</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='ctx'> How to allocate and use memory in the kernel.  Note that there is a lot</div><div class='del'>-more memory-management documentation in Documentation/vm/index.rst.</div><div class='add'>+more memory-management documentation in Documentation/mm/index.rst.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='hunk'>@@ -121,6 +127,7 @@ Documents that don't fit elsewhere or which have yet to be categorized.</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='ctx'>    librs</div><div class='add'>+   netlink</div><div class='ctx'> </div><div class='ctx'> .. only:: subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/irq/irq-domain.rst b/Documentation/core-api/irq/irq-domain.rst<br/>index d30b4d0a9769..f88a6ee67a35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/irq/irq-domain.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/irq/irq-domain.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/irq/irq-domain.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/irq/irq-domain.rst</a></div><div class='hunk'>@@ -71,7 +71,7 @@ variety of methods:</div><div class='ctx'> Note that irq domain lookups must happen in contexts that are</div><div class='ctx'> compatible with a RCU read-side critical section.</div><div class='ctx'> </div><div class='del'>-The irq_create_mapping() function must be called *atleast once*</div><div class='add'>+The irq_create_mapping() function must be called *at least once*</div><div class='ctx'> before any call to irq_find_mapping(), lest the descriptor will not</div><div class='ctx'> be allocated.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/kernel-api.rst b/Documentation/core-api/kernel-api.rst<br/>index d6b3f94b9f1f..9b3f3e5f5a95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/kernel-api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/kernel-api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/kernel-api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/kernel-api.rst</a></div><div class='hunk'>@@ -36,6 +36,9 @@ String Conversions</div><div class='ctx'> String Manipulation</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='add'>+.. kernel-doc:: include/linux/fortify-string.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='ctx'> .. kernel-doc:: lib/string.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='hunk'>@@ -118,6 +121,12 @@ Text Searching</div><div class='ctx'> CRC and Math Functions in Linux</div><div class='ctx'> ===============================</div><div class='ctx'> </div><div class='add'>+Arithmetic Overflow Checking</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/overflow.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='ctx'> CRC Functions</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='hunk'>@@ -165,9 +174,6 @@ Division Functions</div><div class='ctx'> .. kernel-doc:: include/linux/math64.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: lib/math/div64.c</div><div class='del'>-   :functions: div_s64_rem div64_u64_rem div64_u64 div64_s64</div><div class='del'>-</div><div class='ctx'> .. kernel-doc:: lib/math/gcd.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='hunk'>@@ -214,16 +220,34 @@ relay interface</div><div class='ctx'> Module Support</div><div class='ctx'> ==============</div><div class='ctx'> </div><div class='del'>-Module Loading</div><div class='del'>---------------</div><div class='add'>+Kernel module auto-loading</div><div class='add'>+--------------------------</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: kernel/kmod.c</div><div class='add'>+.. kernel-doc:: kernel/module/kmod.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+Module debugging</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/module/stats.c</div><div class='add'>+   :doc: module debugging statistics overview</div><div class='add'>+</div><div class='add'>+dup_failed_modules - tracks duplicate failed modules</div><div class='add'>+****************************************************</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/module/stats.c</div><div class='add'>+   :doc: dup_failed_modules - tracks duplicate failed modules</div><div class='add'>+</div><div class='add'>+module statistics debugfs counters</div><div class='add'>+**********************************</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: kernel/module/stats.c</div><div class='add'>+   :doc: module statistics debugfs counters</div><div class='add'>+</div><div class='ctx'> Inter Module support</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='del'>-Refer to the file kernel/module.c for more information.</div><div class='add'>+Refer to the files in kernel/module/ for more information.</div><div class='ctx'> </div><div class='ctx'> Hardware Interfaces</div><div class='ctx'> ===================</div><div class='head'>diff --git a/Documentation/core-api/local_ops.rst b/Documentation/core-api/local_ops.rst<br/>index 2ac3f9f29845..0b42ceaaf3c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/local_ops.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/local_ops.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/local_ops.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/local_ops.rst</a></div><div class='hunk'>@@ -191,7 +191,7 @@ Here is a sample module which implements a basic per cpu counter using</div><div class='ctx'> </div><div class='ctx'>     static void __exit test_exit(void)</div><div class='ctx'>     {</div><div class='del'>-            del_timer_sync(&amp;test_timer);</div><div class='add'>+            timer_shutdown_sync(&amp;test_timer);</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='ctx'>     module_init(test_init);</div><div class='head'>diff --git a/Documentation/core-api/maple_tree.rst b/Documentation/core-api/maple_tree.rst<br/>new file mode 100644<br/>index 000000000000..45defcf15da7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/maple_tree.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/maple_tree.rst</a></div><div class='hunk'>@@ -0,0 +1,217 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+==========</div><div class='add'>+Maple Tree</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+:Author: Liam R. Howlett</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+The Maple Tree is a B-Tree data type which is optimized for storing</div><div class='add'>+non-overlapping ranges, including ranges of size 1.  The tree was designed to</div><div class='add'>+be simple to use and does not require a user written search method.  It</div><div class='add'>+supports iterating over a range of entries and going to the previous or next</div><div class='add'>+entry in a cache-efficient manner.  The tree can also be put into an RCU-safe</div><div class='add'>+mode of operation which allows reading and writing concurrently.  Writers must</div><div class='add'>+synchronize on a lock, which can be the default spinlock, or the user can set</div><div class='add'>+the lock to an external lock of a different type.</div><div class='add'>+</div><div class='add'>+The Maple Tree maintains a small memory footprint and was designed to use</div><div class='add'>+modern processor cache efficiently.  The majority of the users will be able to</div><div class='add'>+use the normal API.  An :ref:`maple-tree-advanced-api` exists for more complex</div><div class='add'>+scenarios.  The most important usage of the Maple Tree is the tracking of the</div><div class='add'>+virtual memory areas.</div><div class='add'>+</div><div class='add'>+The Maple Tree can store values between ``0`` and ``ULONG_MAX``.  The Maple</div><div class='add'>+Tree reserves values with the bottom two bits set to '10' which are below 4096</div><div class='add'>+(ie 2, 6, 10 .. 4094) for internal use.  If the entries may use reserved</div><div class='add'>+entries then the users can convert the entries using xa_mk_value() and convert</div><div class='add'>+them back by calling xa_to_value().  If the user needs to use a reserved</div><div class='add'>+value, then the user can convert the value when using the</div><div class='add'>+:ref:`maple-tree-advanced-api`, but are blocked by the normal API.</div><div class='add'>+</div><div class='add'>+The Maple Tree can also be configured to support searching for a gap of a given</div><div class='add'>+size (or larger).</div><div class='add'>+</div><div class='add'>+Pre-allocating of nodes is also supported using the</div><div class='add'>+:ref:`maple-tree-advanced-api`.  This is useful for users who must guarantee a</div><div class='add'>+successful store operation within a given</div><div class='add'>+code segment when allocating cannot be done.  Allocations of nodes are</div><div class='add'>+relatively small at around 256 bytes.</div><div class='add'>+</div><div class='add'>+.. _maple-tree-normal-api:</div><div class='add'>+</div><div class='add'>+Normal API</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+Start by initialising a maple tree, either with DEFINE_MTREE() for statically</div><div class='add'>+allocated maple trees or mt_init() for dynamically allocated ones.  A</div><div class='add'>+freshly-initialised maple tree contains a ``NULL`` pointer for the range ``0``</div><div class='add'>+- ``ULONG_MAX``.  There are currently two types of maple trees supported: the</div><div class='add'>+allocation tree and the regular tree.  The regular tree has a higher branching</div><div class='add'>+factor for internal nodes.  The allocation tree has a lower branching factor</div><div class='add'>+but allows the user to search for a gap of a given size or larger from either</div><div class='add'>+``0`` upwards or ``ULONG_MAX`` down.  An allocation tree can be used by</div><div class='add'>+passing in the ``MT_FLAGS_ALLOC_RANGE`` flag when initialising the tree.</div><div class='add'>+</div><div class='add'>+You can then set entries using mtree_store() or mtree_store_range().</div><div class='add'>+mtree_store() will overwrite any entry with the new entry and return 0 on</div><div class='add'>+success or an error code otherwise.  mtree_store_range() works in the same way</div><div class='add'>+but takes a range.  mtree_load() is used to retrieve the entry stored at a</div><div class='add'>+given index.  You can use mtree_erase() to erase an entire range by only</div><div class='add'>+knowing one value within that range, or mtree_store() call with an entry of</div><div class='add'>+NULL may be used to partially erase a range or many ranges at once.</div><div class='add'>+</div><div class='add'>+If you want to only store a new entry to a range (or index) if that range is</div><div class='add'>+currently ``NULL``, you can use mtree_insert_range() or mtree_insert() which</div><div class='add'>+return -EEXIST if the range is not empty.</div><div class='add'>+</div><div class='add'>+You can search for an entry from an index upwards by using mt_find().</div><div class='add'>+</div><div class='add'>+You can walk each entry within a range by calling mt_for_each().  You must</div><div class='add'>+provide a temporary variable to store a cursor.  If you want to walk each</div><div class='add'>+element of the tree then ``0`` and ``ULONG_MAX`` may be used as the range.  If</div><div class='add'>+the caller is going to hold the lock for the duration of the walk then it is</div><div class='add'>+worth looking at the mas_for_each() API in the :ref:`maple-tree-advanced-api`</div><div class='add'>+section.</div><div class='add'>+</div><div class='add'>+Sometimes it is necessary to ensure the next call to store to a maple tree does</div><div class='add'>+not allocate memory, please see :ref:`maple-tree-advanced-api` for this use case.</div><div class='add'>+</div><div class='add'>+Finally, you can remove all entries from a maple tree by calling</div><div class='add'>+mtree_destroy().  If the maple tree entries are pointers, you may wish to free</div><div class='add'>+the entries first.</div><div class='add'>+</div><div class='add'>+Allocating Nodes</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The allocations are handled by the internal tree code.  See</div><div class='add'>+:ref:`maple-tree-advanced-alloc` for other options.</div><div class='add'>+</div><div class='add'>+Locking</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+You do not have to worry about locking.  See :ref:`maple-tree-advanced-locks`</div><div class='add'>+for other options.</div><div class='add'>+</div><div class='add'>+The Maple Tree uses RCU and an internal spinlock to synchronise access:</div><div class='add'>+</div><div class='add'>+Takes RCU read lock:</div><div class='add'>+ * mtree_load()</div><div class='add'>+ * mt_find()</div><div class='add'>+ * mt_for_each()</div><div class='add'>+ * mt_next()</div><div class='add'>+ * mt_prev()</div><div class='add'>+</div><div class='add'>+Takes ma_lock internally:</div><div class='add'>+ * mtree_store()</div><div class='add'>+ * mtree_store_range()</div><div class='add'>+ * mtree_insert()</div><div class='add'>+ * mtree_insert_range()</div><div class='add'>+ * mtree_erase()</div><div class='add'>+ * mtree_destroy()</div><div class='add'>+ * mt_set_in_rcu()</div><div class='add'>+ * mt_clear_in_rcu()</div><div class='add'>+</div><div class='add'>+If you want to take advantage of the internal lock to protect the data</div><div class='add'>+structures that you are storing in the Maple Tree, you can call mtree_lock()</div><div class='add'>+before calling mtree_load(), then take a reference count on the object you</div><div class='add'>+have found before calling mtree_unlock().  This will prevent stores from</div><div class='add'>+removing the object from the tree between looking up the object and</div><div class='add'>+incrementing the refcount.  You can also use RCU to avoid dereferencing</div><div class='add'>+freed memory, but an explanation of that is beyond the scope of this</div><div class='add'>+document.</div><div class='add'>+</div><div class='add'>+.. _maple-tree-advanced-api:</div><div class='add'>+</div><div class='add'>+Advanced API</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+The advanced API offers more flexibility and better performance at the</div><div class='add'>+cost of an interface which can be harder to use and has fewer safeguards.</div><div class='add'>+You must take care of your own locking while using the advanced API.</div><div class='add'>+You can use the ma_lock, RCU or an external lock for protection.</div><div class='add'>+You can mix advanced and normal operations on the same array, as long</div><div class='add'>+as the locking is compatible.  The :ref:`maple-tree-normal-api` is implemented</div><div class='add'>+in terms of the advanced API.</div><div class='add'>+</div><div class='add'>+The advanced API is based around the ma_state, this is where the 'mas'</div><div class='add'>+prefix originates.  The ma_state struct keeps track of tree operations to make</div><div class='add'>+life easier for both internal and external tree users.</div><div class='add'>+</div><div class='add'>+Initialising the maple tree is the same as in the :ref:`maple-tree-normal-api`.</div><div class='add'>+Please see above.</div><div class='add'>+</div><div class='add'>+The maple state keeps track of the range start and end in mas-&gt;index and</div><div class='add'>+mas-&gt;last, respectively.</div><div class='add'>+</div><div class='add'>+mas_walk() will walk the tree to the location of mas-&gt;index and set the</div><div class='add'>+mas-&gt;index and mas-&gt;last according to the range for the entry.</div><div class='add'>+</div><div class='add'>+You can set entries using mas_store().  mas_store() will overwrite any entry</div><div class='add'>+with the new entry and return the first existing entry that is overwritten.</div><div class='add'>+The range is passed in as members of the maple state: index and last.</div><div class='add'>+</div><div class='add'>+You can use mas_erase() to erase an entire range by setting index and</div><div class='add'>+last of the maple state to the desired range to erase.  This will erase</div><div class='add'>+the first range that is found in that range, set the maple state index</div><div class='add'>+and last as the range that was erased and return the entry that existed</div><div class='add'>+at that location.</div><div class='add'>+</div><div class='add'>+You can walk each entry within a range by using mas_for_each().  If you want</div><div class='add'>+to walk each element of the tree then ``0`` and ``ULONG_MAX`` may be used as</div><div class='add'>+the range.  If the lock needs to be periodically dropped, see the locking</div><div class='add'>+section mas_pause().</div><div class='add'>+</div><div class='add'>+Using a maple state allows mas_next() and mas_prev() to function as if the</div><div class='add'>+tree was a linked list.  With such a high branching factor the amortized</div><div class='add'>+performance penalty is outweighed by cache optimization.  mas_next() will</div><div class='add'>+return the next entry which occurs after the entry at index.  mas_prev()</div><div class='add'>+will return the previous entry which occurs before the entry at index.</div><div class='add'>+</div><div class='add'>+mas_find() will find the first entry which exists at or above index on</div><div class='add'>+the first call, and the next entry from every subsequent calls.</div><div class='add'>+</div><div class='add'>+mas_find_rev() will find the fist entry which exists at or below the last on</div><div class='add'>+the first call, and the previous entry from every subsequent calls.</div><div class='add'>+</div><div class='add'>+If the user needs to yield the lock during an operation, then the maple state</div><div class='add'>+must be paused using mas_pause().</div><div class='add'>+</div><div class='add'>+There are a few extra interfaces provided when using an allocation tree.</div><div class='add'>+If you wish to search for a gap within a range, then mas_empty_area()</div><div class='add'>+or mas_empty_area_rev() can be used.  mas_empty_area() searches for a gap</div><div class='add'>+starting at the lowest index given up to the maximum of the range.</div><div class='add'>+mas_empty_area_rev() searches for a gap starting at the highest index given</div><div class='add'>+and continues downward to the lower bound of the range.</div><div class='add'>+</div><div class='add'>+.. _maple-tree-advanced-alloc:</div><div class='add'>+</div><div class='add'>+Advanced Allocating Nodes</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+Allocations are usually handled internally to the tree, however if allocations</div><div class='add'>+need to occur before a write occurs then calling mas_expected_entries() will</div><div class='add'>+allocate the worst-case number of needed nodes to insert the provided number of</div><div class='add'>+ranges.  This also causes the tree to enter mass insertion mode.  Once</div><div class='add'>+insertions are complete calling mas_destroy() on the maple state will free the</div><div class='add'>+unused allocations.</div><div class='add'>+</div><div class='add'>+.. _maple-tree-advanced-locks:</div><div class='add'>+</div><div class='add'>+Advanced Locking</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The maple tree uses a spinlock by default, but external locks can be used for</div><div class='add'>+tree updates as well.  To use an external lock, the tree must be initialized</div><div class='add'>+with the ``MT_FLAGS_LOCK_EXTERN flag``, this is usually done with the</div><div class='add'>+MTREE_INIT_EXT() #define, which takes an external lock as an argument.</div><div class='add'>+</div><div class='add'>+Functions and structures</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/maple_tree.h</div><div class='add'>+.. kernel-doc:: lib/maple_tree.c</div><div class='head'>diff --git a/Documentation/core-api/memory-allocation.rst b/Documentation/core-api/memory-allocation.rst<br/>index 5954ddf6ee13..1c58d883b273 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/memory-allocation.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/memory-allocation.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/memory-allocation.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/memory-allocation.rst</a></div><div class='hunk'>@@ -170,7 +170,16 @@ should be used if a part of the cache might be copied to the userspace.</div><div class='ctx'> After the cache is created kmem_cache_alloc() and its convenience</div><div class='ctx'> wrappers can allocate memory from that cache.</div><div class='ctx'> </div><div class='del'>-When the allocated memory is no longer needed it must be freed. You can</div><div class='del'>-use kvfree() for the memory allocated with `kmalloc`, `vmalloc` and</div><div class='del'>-`kvmalloc`. The slab caches should be freed with kmem_cache_free(). And</div><div class='del'>-don't forget to destroy the cache with kmem_cache_destroy().</div><div class='add'>+When the allocated memory is no longer needed it must be freed.</div><div class='add'>+</div><div class='add'>+Objects allocated by `kmalloc` can be freed by `kfree` or `kvfree`. Objects</div><div class='add'>+allocated by `kmem_cache_alloc` can be freed with `kmem_cache_free`, `kfree`</div><div class='add'>+or `kvfree`, where the latter two might be more convenient thanks to not</div><div class='add'>+needing the kmem_cache pointer.</div><div class='add'>+</div><div class='add'>+The same rules apply to _bulk and _rcu flavors of freeing functions.</div><div class='add'>+</div><div class='add'>+Memory allocated by `vmalloc` can be freed with `vfree` or `kvfree`.</div><div class='add'>+Memory allocated by `kvmalloc` can be freed with `kvfree`.</div><div class='add'>+Caches created by `kmem_cache_create` should be freed with</div><div class='add'>+`kmem_cache_destroy` only after freeing all the allocated objects first.</div><div class='head'>diff --git a/Documentation/core-api/mm-api.rst b/Documentation/core-api/mm-api.rst<br/>index f5b2f92822c8..f5dde5bceaea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/mm-api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/mm-api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/mm-api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/mm-api.rst</a></div><div class='hunk'>@@ -19,19 +19,16 @@ User Space Memory Access</div><div class='ctx'> Memory Allocation Controls</div><div class='ctx'> ==========================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/linux/gfp.h</div><div class='del'>-   :internal:</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: include/linux/gfp.h</div><div class='add'>+.. kernel-doc:: include/linux/gfp_types.h</div><div class='ctx'>    :doc: Page mobility and placement hints</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/linux/gfp.h</div><div class='add'>+.. kernel-doc:: include/linux/gfp_types.h</div><div class='ctx'>    :doc: Watermark modifiers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/linux/gfp.h</div><div class='add'>+.. kernel-doc:: include/linux/gfp_types.h</div><div class='ctx'>    :doc: Reclaim modifiers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/linux/gfp.h</div><div class='add'>+.. kernel-doc:: include/linux/gfp_types.h</div><div class='ctx'>    :doc: Useful GFP flag combinations</div><div class='ctx'> </div><div class='ctx'> The Slab Cache</div><div class='head'>diff --git a/Documentation/core-api/netlink.rst b/Documentation/core-api/netlink.rst<br/>new file mode 100644<br/>index 000000000000..e4a938a05cc9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/netlink.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/netlink.rst</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+.. SPDX-License-Identifier: BSD-3-Clause</div><div class='add'>+</div><div class='add'>+.. _kernel_netlink:</div><div class='add'>+</div><div class='add'>+===================================</div><div class='add'>+Netlink notes for kernel developers</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+General guidance</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+Attribute enums</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Older families often define "null" attributes and commands with value</div><div class='add'>+of ``0`` and named ``unspec``. This is supported (``type: unused``)</div><div class='add'>+but should be avoided in new families. The ``unspec`` enum values are</div><div class='add'>+not used in practice, so just set the value of the first attribute to ``1``.</div><div class='add'>+</div><div class='add'>+Message enums</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Use the same command IDs for requests and replies. This makes it easier</div><div class='add'>+to match them up, and we have plenty of ID space.</div><div class='add'>+</div><div class='add'>+Use separate command IDs for notifications. This makes it easier to</div><div class='add'>+sort the notifications from replies (and present them to the user</div><div class='add'>+application via a different API than replies).</div><div class='add'>+</div><div class='add'>+Answer requests</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Older families do not reply to all of the commands, especially NEW / ADD</div><div class='add'>+commands. User only gets information whether the operation succeeded or</div><div class='add'>+not via the ACK. Try to find useful data to return. Once the command is</div><div class='add'>+added whether it replies with a full message or only an ACK is uAPI and</div><div class='add'>+cannot be changed. It's better to err on the side of replying.</div><div class='add'>+</div><div class='add'>+Specifically NEW and ADD commands should reply with information identifying</div><div class='add'>+the created object such as the allocated object's ID (without having to</div><div class='add'>+resort to using ``NLM_F_ECHO``).</div><div class='add'>+</div><div class='add'>+NLM_F_ECHO</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+Make sure to pass the request info to genl_notify() to allow ``NLM_F_ECHO``</div><div class='add'>+to take effect.  This is useful for programs that need precise feedback</div><div class='add'>+from the kernel (for example for logging purposes).</div><div class='add'>+</div><div class='add'>+Support dump consistency</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+If iterating over objects during dump may skip over objects or repeat</div><div class='add'>+them - make sure to report dump inconsistency with ``NLM_F_DUMP_INTR``.</div><div class='add'>+This is usually implemented by maintaining a generation id for the</div><div class='add'>+structure and recording it in the ``seq`` member of struct netlink_callback.</div><div class='add'>+</div><div class='add'>+Netlink specification</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Documentation of the Netlink specification parts which are only relevant</div><div class='add'>+to the kernel space.</div><div class='add'>+</div><div class='add'>+Globals</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+kernel-policy</div><div class='add'>+~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Defines if the kernel validation policy is per operation (``per-op``)</div><div class='add'>+or for the entire family (``global``). New families should use ``per-op``</div><div class='add'>+(default) to be able to narrow down the attributes accepted by a specific</div><div class='add'>+command.</div><div class='add'>+</div><div class='add'>+checks</div><div class='add'>+------</div><div class='add'>+</div><div class='add'>+Documentation for the ``checks`` sub-sections of attribute specs.</div><div class='add'>+</div><div class='add'>+unterminated-ok</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Accept strings without the null-termination (for legacy families only).</div><div class='add'>+Switches from the ``NLA_NUL_STRING`` to ``NLA_STRING`` policy type.</div><div class='add'>+</div><div class='add'>+max-len</div><div class='add'>+~~~~~~~</div><div class='add'>+</div><div class='add'>+Defines max length for a binary or string attribute (corresponding</div><div class='add'>+to the ``len`` member of struct nla_policy). For string attributes terminating</div><div class='add'>+null character is not counted towards ``max-len``.</div><div class='add'>+</div><div class='add'>+The field may either be a literal integer value or a name of a defined</div><div class='add'>+constant. String types may reduce the constant by one</div><div class='add'>+(i.e. specify ``max-len: CONST - 1``) to reserve space for the terminating</div><div class='add'>+character so implementations should recognize such pattern.</div><div class='add'>+</div><div class='add'>+min-len</div><div class='add'>+~~~~~~~</div><div class='add'>+</div><div class='add'>+Similar to ``max-len`` but defines minimum length.</div><div class='head'>diff --git a/Documentation/core-api/packing.rst b/Documentation/core-api/packing.rst<br/>index d8c341fe383e..3ed13bc9a195 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/packing.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/packing.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/packing.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/packing.rst</a></div><div class='hunk'>@@ -161,6 +161,6 @@ xxx_packing() that calls it using the proper QUIRK_* one-hot bits set.</div><div class='ctx'> </div><div class='ctx'> The packing() function returns an int-encoded error code, which protects the</div><div class='ctx'> programmer against incorrect API use.  The errors are not expected to occur</div><div class='del'>-durring runtime, therefore it is reasonable for xxx_packing() to return void</div><div class='add'>+during runtime, therefore it is reasonable for xxx_packing() to return void</div><div class='ctx'> and simply swallow those errors. Optionally it can dump stack or print the</div><div class='ctx'> error description.</div><div class='head'>diff --git a/Documentation/core-api/padata.rst b/Documentation/core-api/padata.rst<br/>index 35175710b43c..05b73c6c105f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/padata.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/padata.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/padata.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/padata.rst</a></div><div class='hunk'>@@ -42,7 +42,7 @@ padata_shells associated with it, each allowing a separate series of jobs.</div><div class='ctx'> Modifying cpumasks</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='del'>-The CPUs used to run jobs can be changed in two ways, programatically with</div><div class='add'>+The CPUs used to run jobs can be changed in two ways, programmatically with</div><div class='ctx'> padata_set_cpumask() or via sysfs.  The former is defined::</div><div class='ctx'> </div><div class='ctx'>     int padata_set_cpumask(struct padata_instance *pinst, int cpumask_type,</div><div class='head'>diff --git a/Documentation/core-api/pin_user_pages.rst b/Documentation/core-api/pin_user_pages.rst<br/>index b18416f4500f..9fb0b1080d3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/pin_user_pages.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/pin_user_pages.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/pin_user_pages.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/pin_user_pages.rst</a></div><div class='hunk'>@@ -55,18 +55,17 @@ flags the caller provides. The caller is required to pass in a non-null struct</div><div class='ctx'> pages* array, and the function then pins pages by incrementing each by a special</div><div class='ctx'> value: GUP_PIN_COUNTING_BIAS.</div><div class='ctx'> </div><div class='del'>-For compound pages, the GUP_PIN_COUNTING_BIAS scheme is not used. Instead,</div><div class='del'>-an exact form of pin counting is achieved, by using the 2nd struct page</div><div class='del'>-in the compound page. A new struct page field, compound_pincount, has</div><div class='del'>-been added in order to support this.</div><div class='del'>-</div><div class='del'>-This approach for compound pages avoids the counting upper limit problems that</div><div class='del'>-are discussed below. Those limitations would have been aggravated severely by</div><div class='del'>-huge pages, because each tail page adds a refcount to the head page. And in</div><div class='del'>-fact, testing revealed that, without a separate compound_pincount field,</div><div class='del'>-page overflows were seen in some huge page stress tests.</div><div class='del'>-</div><div class='del'>-This also means that huge pages and compound pages do not suffer</div><div class='add'>+For large folios, the GUP_PIN_COUNTING_BIAS scheme is not used. Instead,</div><div class='add'>+the extra space available in the struct folio is used to store the</div><div class='add'>+pincount directly.</div><div class='add'>+</div><div class='add'>+This approach for large folios avoids the counting upper limit problems</div><div class='add'>+that are discussed below. Those limitations would have been aggravated</div><div class='add'>+severely by huge pages, because each tail page adds a refcount to the</div><div class='add'>+head page. And in fact, testing revealed that, without a separate pincount</div><div class='add'>+field, refcount overflows were seen in some huge page stress tests.</div><div class='add'>+</div><div class='add'>+This also means that huge pages and large folios do not suffer</div><div class='ctx'> from the false positives problem that is mentioned below.::</div><div class='ctx'> </div><div class='ctx'>  Function</div><div class='hunk'>@@ -221,7 +220,7 @@ Unit testing</div><div class='ctx'> ============</div><div class='ctx'> This file::</div><div class='ctx'> </div><div class='del'>- tools/testing/selftests/vm/gup_test.c</div><div class='add'>+ tools/testing/selftests/mm/gup_test.c</div><div class='ctx'> </div><div class='ctx'> has the following new calls to exercise the new pin*() wrapper functions:</div><div class='ctx'> </div><div class='hunk'>@@ -264,9 +263,9 @@ place.)</div><div class='ctx'> Other diagnostics</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='del'>-dump_page() has been enhanced slightly, to handle these new counting</div><div class='del'>-fields, and to better report on compound pages in general. Specifically,</div><div class='del'>-for compound pages, the exact (compound_pincount) pincount is reported.</div><div class='add'>+dump_page() has been enhanced slightly to handle these new counting</div><div class='add'>+fields, and to better report on large folios in general.  Specifically,</div><div class='add'>+for large folios, the exact pincount is reported.</div><div class='ctx'> </div><div class='ctx'> References</div><div class='ctx'> ==========</div><div class='head'>diff --git a/Documentation/core-api/printk-formats.rst b/Documentation/core-api/printk-formats.rst<br/>index 5e89497ba314..dfe7e75a71de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/printk-formats.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/printk-formats.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/printk-formats.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/printk-formats.rst</a></div><div class='hunk'>@@ -575,20 +575,26 @@ The field width is passed by value, the bitmap is passed by reference.</div><div class='ctx'> Helper macros cpumask_pr_args() and nodemask_pr_args() are available to ease</div><div class='ctx'> printing cpumask and nodemask.</div><div class='ctx'> </div><div class='del'>-Flags bitfields such as page flags, gfp_flags</div><div class='del'>----------------------------------------------</div><div class='add'>+Flags bitfields such as page flags, page_type, gfp_flags</div><div class='add'>+--------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'> 	%pGp	0x17ffffc0002036(referenced|uptodate|lru|active|private|node=0|zone=2|lastcpupid=0x1fffff)</div><div class='add'>+	%pGt	0xffffff7f(buddy)</div><div class='ctx'> 	%pGg	GFP_USER|GFP_DMA32|GFP_NOWARN</div><div class='ctx'> 	%pGv	read|exec|mayread|maywrite|mayexec|denywrite</div><div class='ctx'> </div><div class='ctx'> For printing flags bitfields as a collection of symbolic constants that</div><div class='ctx'> would construct the value. The type of flags is given by the third</div><div class='del'>-character. Currently supported are [p]age flags, [v]ma_flags (both</div><div class='del'>-expect ``unsigned long *``) and [g]fp_flags (expects ``gfp_t *``). The flag</div><div class='del'>-names and print order depends on the particular	type.</div><div class='add'>+character. Currently supported are:</div><div class='add'>+</div><div class='add'>+        - p - [p]age flags, expects value of type (``unsigned long *``)</div><div class='add'>+        - t - page [t]ype, expects value of type (``unsigned int *``)</div><div class='add'>+        - v - [v]ma_flags, expects value of type (``unsigned long *``)</div><div class='add'>+        - g - [g]fp_flags, expects value of type (``gfp_t *``)</div><div class='add'>+</div><div class='add'>+The flag names and print order depends on the particular type.</div><div class='ctx'> </div><div class='ctx'> Note that this format should not be used directly in the</div><div class='ctx'> :c:func:`TP_printk()` part of a tracepoint. Instead, use the show_*_flags()</div><div class='hunk'>@@ -625,6 +631,16 @@ Examples::</div><div class='ctx'> 	%p4cc	Y10  little-endian (0x20303159)</div><div class='ctx'> 	%p4cc	NV12 big-endian (0xb231564e)</div><div class='ctx'> </div><div class='add'>+Rust</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	%pA</div><div class='add'>+</div><div class='add'>+Only intended to be used from Rust code to format ``core::fmt::Arguments``.</div><div class='add'>+Do *not* use it from C.</div><div class='add'>+</div><div class='ctx'> Thanks</div><div class='ctx'> ======</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/printk-index.rst b/Documentation/core-api/printk-index.rst<br/>new file mode 100644<br/>index 000000000000..3062f37d119b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/printk-index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/printk-index.rst</a></div><div class='hunk'>@@ -0,0 +1,137 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+============</div><div class='add'>+Printk Index</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+There are many ways how to monitor the state of the system. One important</div><div class='add'>+source of information is the system log. It provides a lot of information,</div><div class='add'>+including more or less important warnings and error messages.</div><div class='add'>+</div><div class='add'>+There are monitoring tools that filter and take action based on messages</div><div class='add'>+logged.</div><div class='add'>+</div><div class='add'>+The kernel messages are evolving together with the code. As a result,</div><div class='add'>+particular kernel messages are not KABI and never will be!</div><div class='add'>+</div><div class='add'>+It is a huge challenge for maintaining the system log monitors. It requires</div><div class='add'>+knowing what messages were updated in a particular kernel version and why.</div><div class='add'>+Finding these changes in the sources would require non-trivial parsers.</div><div class='add'>+Also it would require matching the sources with the binary kernel which</div><div class='add'>+is not always trivial. Various changes might be backported. Various kernel</div><div class='add'>+versions might be used on different monitored systems.</div><div class='add'>+</div><div class='add'>+This is where the printk index feature might become useful. It provides</div><div class='add'>+a dump of printk formats used all over the source code used for the kernel</div><div class='add'>+and modules on the running system. It is accessible at runtime via debugfs.</div><div class='add'>+</div><div class='add'>+The printk index helps to find changes in the message formats. Also it helps</div><div class='add'>+to track the strings back to the kernel sources and the related commit.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+User Interface</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+The index of printk formats are split in into separate files. The files are</div><div class='add'>+named according to the binaries where the printk formats are built-in. There</div><div class='add'>+is always "vmlinux" and optionally also modules, for example::</div><div class='add'>+</div><div class='add'>+   /sys/kernel/debug/printk/index/vmlinux</div><div class='add'>+   /sys/kernel/debug/printk/index/ext4</div><div class='add'>+   /sys/kernel/debug/printk/index/scsi_mod</div><div class='add'>+</div><div class='add'>+Note that only loaded modules are shown. Also printk formats from a module</div><div class='add'>+might appear in "vmlinux" when the module is built-in.</div><div class='add'>+</div><div class='add'>+The content is inspired by the dynamic debug interface and looks like::</div><div class='add'>+</div><div class='add'>+   $&gt; head -1 /sys/kernel/debug/printk/index/vmlinux; shuf -n 5 vmlinux</div><div class='add'>+   # &lt;level[,flags]&gt; filename:line function "format"</div><div class='add'>+   &lt;5&gt; block/blk-settings.c:661 disk_stack_limits "%s: Warning: Device %s is misaligned\n"</div><div class='add'>+   &lt;4&gt; kernel/trace/trace.c:8296 trace_create_file "Could not create tracefs '%s' entry\n"</div><div class='add'>+   &lt;6&gt; arch/x86/kernel/hpet.c:144 _hpet_print_config "hpet: %s(%d):\n"</div><div class='add'>+   &lt;6&gt; init/do_mounts.c:605 prepare_namespace "Waiting for root device %s...\n"</div><div class='add'>+   &lt;6&gt; drivers/acpi/osl.c:1410 acpi_no_auto_serialize_setup "ACPI: auto-serialization disabled\n"</div><div class='add'>+</div><div class='add'>+, where the meaning is:</div><div class='add'>+</div><div class='add'>+   - :level: log level value: 0-7 for particular severity, -1 as default,</div><div class='add'>+	'c' as continuous line without an explicit log level</div><div class='add'>+   - :flags: optional flags: currently only 'c' for KERN_CONT</div><div class='add'>+   - :filename\:line: source filename and line number of the related</div><div class='add'>+	printk() call. Note that there are many wrappers, for example,</div><div class='add'>+	pr_warn(), pr_warn_once(), dev_warn().</div><div class='add'>+   - :function: function name where the printk() call is used.</div><div class='add'>+   - :format: format string</div><div class='add'>+</div><div class='add'>+The extra information makes it a bit harder to find differences</div><div class='add'>+between various kernels. Especially the line number might change</div><div class='add'>+very often. On the other hand, it helps a lot to confirm that</div><div class='add'>+it is the same string or find the commit that is responsible</div><div class='add'>+for eventual changes.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+printk() Is Not a Stable KABI</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+Several developers are afraid that exporting all these implementation</div><div class='add'>+details into the user space will transform particular printk() calls</div><div class='add'>+into KABI.</div><div class='add'>+</div><div class='add'>+But it is exactly the opposite. printk() calls must _not_ be KABI.</div><div class='add'>+And the printk index helps user space tools to deal with this.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Subsystem specific printk wrappers</div><div class='add'>+==================================</div><div class='add'>+</div><div class='add'>+The printk index is generated using extra metadata that are stored in</div><div class='add'>+a dedicated .elf section ".printk_index". It is achieved using macro</div><div class='add'>+wrappers doing __printk_index_emit() together with the real printk()</div><div class='add'>+call. The same technique is used also for the metadata used by</div><div class='add'>+the dynamic debug feature.</div><div class='add'>+</div><div class='add'>+The metadata are stored for a particular message only when it is printed</div><div class='add'>+using these special wrappers. It is implemented for the commonly</div><div class='add'>+used printk() calls, including, for example, pr_warn(), or pr_once().</div><div class='add'>+</div><div class='add'>+Additional changes are necessary for various subsystem specific wrappers</div><div class='add'>+that call the original printk() via a common helper function. These needs</div><div class='add'>+their own wrappers adding __printk_index_emit().</div><div class='add'>+</div><div class='add'>+Only few subsystem specific wrappers have been updated so far,</div><div class='add'>+for example, dev_printk(). As a result, the printk formats from</div><div class='add'>+some subsystes can be missing in the printk index.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Subsystem specific prefix</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+The macro pr_fmt() macro allows to define a prefix that is printed</div><div class='add'>+before the string generated by the related printk() calls.</div><div class='add'>+</div><div class='add'>+Subsystem specific wrappers usually add even more complicated</div><div class='add'>+prefixes.</div><div class='add'>+</div><div class='add'>+These prefixes can be stored into the printk index metadata</div><div class='add'>+by an optional parameter of __printk_index_emit(). The debugfs</div><div class='add'>+interface might then show the printk formats including these prefixes.</div><div class='add'>+For example, drivers/acpi/osl.c contains::</div><div class='add'>+</div><div class='add'>+  #define pr_fmt(fmt) "ACPI: OSL: " fmt</div><div class='add'>+</div><div class='add'>+  static int __init acpi_no_auto_serialize_setup(char *str)</div><div class='add'>+  {</div><div class='add'>+	acpi_gbl_auto_serialize_methods = FALSE;</div><div class='add'>+	pr_info("Auto-serialization disabled\n");</div><div class='add'>+</div><div class='add'>+	return 1;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+This results in the following printk index entry::</div><div class='add'>+</div><div class='add'>+  &lt;6&gt; drivers/acpi/osl.c:1410 acpi_no_auto_serialize_setup "ACPI: auto-serialization disabled\n"</div><div class='add'>+</div><div class='add'>+It helps matching messages from the real log with printk index.</div><div class='add'>+Then the source file name, line number, and function name can</div><div class='add'>+be used to match the string with the source code.</div><div class='head'>diff --git a/Documentation/core-api/protection-keys.rst b/Documentation/core-api/protection-keys.rst<br/>index ec575e72d0b2..bf28ac0401f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/protection-keys.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/protection-keys.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/protection-keys.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/protection-keys.rst</a></div><div class='hunk'>@@ -4,31 +4,29 @@</div><div class='ctx'> Memory Protection Keys</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='del'>-Memory Protection Keys for Userspace (PKU aka PKEYs) is a feature</div><div class='del'>-which is found on Intel's Skylake (and later) "Scalable Processor"</div><div class='del'>-Server CPUs. It will be available in future non-server Intel parts</div><div class='del'>-and future AMD processors.</div><div class='del'>-</div><div class='del'>-For anyone wishing to test or use this feature, it is available in</div><div class='del'>-Amazon's EC2 C5 instances and is known to work there using an Ubuntu</div><div class='del'>-17.04 image.</div><div class='del'>-</div><div class='del'>-Memory Protection Keys provides a mechanism for enforcing page-based</div><div class='del'>-protections, but without requiring modification of the page tables</div><div class='del'>-when an application changes protection domains.  It works by</div><div class='del'>-dedicating 4 previously ignored bits in each page table entry to a</div><div class='del'>-"protection key", giving 16 possible keys.</div><div class='del'>-</div><div class='del'>-There is also a new user-accessible register (PKRU) with two separate</div><div class='del'>-bits (Access Disable and Write Disable) for each key.  Being a CPU</div><div class='del'>-register, PKRU is inherently thread-local, potentially giving each</div><div class='add'>+Memory Protection Keys provide a mechanism for enforcing page-based</div><div class='add'>+protections, but without requiring modification of the page tables when an</div><div class='add'>+application changes protection domains.</div><div class='add'>+</div><div class='add'>+Pkeys Userspace (PKU) is a feature which can be found on:</div><div class='add'>+        * Intel server CPUs, Skylake and later</div><div class='add'>+        * Intel client CPUs, Tiger Lake (11th Gen Core) and later</div><div class='add'>+        * Future AMD CPUs</div><div class='add'>+</div><div class='add'>+Pkeys work by dedicating 4 previously Reserved bits in each page table entry to</div><div class='add'>+a "protection key", giving 16 possible keys.</div><div class='add'>+</div><div class='add'>+Protections for each key are defined with a per-CPU user-accessible register</div><div class='add'>+(PKRU).  Each of these is a 32-bit register storing two bits (Access Disable</div><div class='add'>+and Write Disable) for each of 16 keys.</div><div class='add'>+</div><div class='add'>+Being a CPU register, PKRU is inherently thread-local, potentially giving each</div><div class='ctx'> thread a different set of protections from every other thread.</div><div class='ctx'> </div><div class='del'>-There are two new instructions (RDPKRU/WRPKRU) for reading and writing</div><div class='del'>-to the new register.  The feature is only available in 64-bit mode,</div><div class='del'>-even though there is theoretically space in the PAE PTEs.  These</div><div class='del'>-permissions are enforced on data access only and have no effect on</div><div class='del'>-instruction fetches.</div><div class='add'>+There are two instructions (RDPKRU/WRPKRU) for reading and writing to the</div><div class='add'>+register.  The feature is only available in 64-bit mode, even though there is</div><div class='add'>+theoretically space in the PAE PTEs.  These permissions are enforced on data</div><div class='add'>+access only and have no effect on instruction fetches.</div><div class='ctx'> </div><div class='ctx'> Syscalls</div><div class='ctx'> ========</div><div class='head'>diff --git a/Documentation/core-api/symbol-namespaces.rst b/Documentation/core-api/symbol-namespaces.rst<br/>index 5ad9e0abe42c..12e4aecdae94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/symbol-namespaces.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/symbol-namespaces.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/symbol-namespaces.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/symbol-namespaces.rst</a></div><div class='hunk'>@@ -51,8 +51,8 @@ namespace ``USB_STORAGE``, use::</div><div class='ctx'> The corresponding ksymtab entry struct ``kernel_symbol`` will have the member</div><div class='ctx'> ``namespace`` set accordingly. A symbol that is exported without a namespace will</div><div class='ctx'> refer to ``NULL``. There is no default namespace if none is defined. ``modpost``</div><div class='del'>-and kernel/module.c make use the namespace at build time or module load time,</div><div class='del'>-respectively.</div><div class='add'>+and kernel/module/main.c make use the namespace at build time or module load</div><div class='add'>+time, respectively.</div><div class='ctx'> </div><div class='ctx'> 2.2 Using the DEFAULT_SYMBOL_NAMESPACE define</div><div class='ctx'> =============================================</div><div class='head'>diff --git a/Documentation/core-api/timekeeping.rst b/Documentation/core-api/timekeeping.rst<br/>index 729e24864fe7..22ec68f24421 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/timekeeping.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/timekeeping.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/timekeeping.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/timekeeping.rst</a></div><div class='hunk'>@@ -132,6 +132,7 @@ Some additional variants exist for more specialized cases:</div><div class='ctx'> .. c:function:: u64 ktime_get_mono_fast_ns( void )</div><div class='ctx'> 		u64 ktime_get_raw_fast_ns( void )</div><div class='ctx'> 		u64 ktime_get_boot_fast_ns( void )</div><div class='add'>+		u64 ktime_get_tai_fast_ns( void )</div><div class='ctx'> 		u64 ktime_get_real_fast_ns( void )</div><div class='ctx'> </div><div class='ctx'> 	These variants are safe to call from any context, including from</div><div class='head'>diff --git a/Documentation/watch_queue.rst b/Documentation/core-api/watch_queue.rst<br/>index 54f13ad5fc17..54f13ad5fc17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/watch_queue.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/watch_queue.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/watch_queue.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/watch_queue.rst</a></div><div class='head'>diff --git a/Documentation/core-api/workqueue.rst b/Documentation/core-api/workqueue.rst<br/>index 3b22ed137662..8ec4d6270b24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/workqueue.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/core-api/workqueue.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/workqueue.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/workqueue.rst</a></div><div class='hunk'>@@ -370,8 +370,8 @@ of possible problems:</div><div class='ctx'> </div><div class='ctx'> The first one can be tracked using tracing: ::</div><div class='ctx'> </div><div class='del'>-	$ echo workqueue:workqueue_queue_work &gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-	$ cat /sys/kernel/debug/tracing/trace_pipe &gt; out.txt</div><div class='add'>+	$ echo workqueue:workqueue_queue_work &gt; /sys/kernel/tracing/set_event</div><div class='add'>+	$ cat /sys/kernel/tracing/trace_pipe &gt; out.txt</div><div class='ctx'> 	(wait a few secs)</div><div class='ctx'> 	^C</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/core-api/wrappers/atomic_bitops.rst b/Documentation/core-api/wrappers/atomic_bitops.rst<br/>new file mode 100644<br/>index 000000000000..bf24e4081a8f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/wrappers/atomic_bitops.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/wrappers/atomic_bitops.rst</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+   This is a simple wrapper to bring atomic_bitops.txt into the RST world</div><div class='add'>+   until such a time as that file can be converted directly.</div><div class='add'>+</div><div class='add'>+=============</div><div class='add'>+Atomic bitops</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+.. raw:: latex</div><div class='add'>+</div><div class='add'>+    \footnotesize</div><div class='add'>+</div><div class='add'>+.. include:: ../../atomic_bitops.txt</div><div class='add'>+   :literal:</div><div class='add'>+</div><div class='add'>+.. raw:: latex</div><div class='add'>+</div><div class='add'>+    \normalsize</div><div class='head'>diff --git a/Documentation/core-api/wrappers/atomic_t.rst b/Documentation/core-api/wrappers/atomic_t.rst<br/>new file mode 100644<br/>index 000000000000..ed109a964c77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/wrappers/atomic_t.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/wrappers/atomic_t.rst</a></div><div class='hunk'>@@ -0,0 +1,19 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+   This is a simple wrapper to bring atomic_t.txt into the RST world</div><div class='add'>+   until such a time as that file can be converted directly.</div><div class='add'>+</div><div class='add'>+============</div><div class='add'>+Atomic types</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+.. raw:: latex</div><div class='add'>+</div><div class='add'>+    \footnotesize</div><div class='add'>+</div><div class='add'>+.. include:: ../../atomic_t.txt</div><div class='add'>+   :literal:</div><div class='add'>+</div><div class='add'>+.. raw:: latex</div><div class='add'>+</div><div class='add'>+    \normalsize</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/core-api/wrappers/memory-barriers.rst b/Documentation/core-api/wrappers/memory-barriers.rst<br/>new file mode 100644<br/>index 000000000000..532460b5e3eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/core-api/wrappers/memory-barriers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/core-api/wrappers/memory-barriers.rst</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+   This is a simple wrapper to bring memory-barriers.txt into the RST world</div><div class='add'>+   until such a time as that file can be converted directly.</div><div class='add'>+</div><div class='add'>+============================</div><div class='add'>+Linux kernel memory barriers</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+.. raw:: latex</div><div class='add'>+</div><div class='add'>+    \footnotesize</div><div class='add'>+</div><div class='add'>+.. include:: ../../memory-barriers.txt</div><div class='add'>+   :literal:</div><div class='add'>+</div><div class='add'>+.. raw:: latex</div><div class='add'>+</div><div class='add'>+    \normalsize</div><div class='head'>diff --git a/Documentation/cpu-freq/index.rst b/Documentation/cpu-freq/index.rst<br/>index aba7831ab1cb..de25740651f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/cpu-freq/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/cpu-freq/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/cpu-freq/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/cpu-freq/index.rst</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-==============================================================================</div><div class='del'>-Linux CPUFreq - CPU frequency and voltage scaling code in the Linux(TM) kernel</div><div class='del'>-==============================================================================</div><div class='add'>+========================================================================</div><div class='add'>+CPUFreq - CPU frequency and voltage scaling code in the Linux(TM) kernel</div><div class='add'>+========================================================================</div><div class='ctx'> </div><div class='ctx'> Author: Dominik Brodowski  &lt;linux@brodo.de&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -20,18 +20,15 @@ Author: Dominik Brodowski  &lt;linux@brodo.de&gt;</div><div class='ctx'> </div><div class='ctx'> Mailing List</div><div class='ctx'> ------------</div><div class='del'>-There is a CPU frequency changing CVS commit and general list where</div><div class='del'>-you can report bugs, problems or submit patches. To post a message,</div><div class='del'>-send an email to linux-pm@vger.kernel.org.</div><div class='add'>+There is a CPU frequency general list where you can report bugs,</div><div class='add'>+problems or submit patches. To post a message, send an email to</div><div class='add'>+linux-pm@vger.kernel.org.</div><div class='ctx'> </div><div class='ctx'> Links</div><div class='ctx'> -----</div><div class='ctx'> the FTP archives:</div><div class='ctx'> * ftp://ftp.linux.org.uk/pub/linux/cpufreq/</div><div class='ctx'> </div><div class='del'>-how to access the CVS repository:</div><div class='del'>-* http://cvs.arm.linux.org.uk/</div><div class='del'>-</div><div class='ctx'> the CPUFreq Mailing list:</div><div class='ctx'> * http://vger.kernel.org/vger-lists.html#linux-pm</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/crypto/devel-algos.rst b/Documentation/crypto/devel-algos.rst<br/>index f225a953ab4b..3506899ef83e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/crypto/devel-algos.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/crypto/devel-algos.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/crypto/devel-algos.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/crypto/devel-algos.rst</a></div><div class='hunk'>@@ -172,7 +172,7 @@ Here are schematics of how these functions are called when operated from</div><div class='ctx'> other part of the kernel. Note that the .setkey() call might happen</div><div class='ctx'> before or after any of these schematics happen, but must not happen</div><div class='ctx'> during any of these are in-flight. Please note that calling .init()</div><div class='del'>-followed immediately by .finish() is also a perfectly valid</div><div class='add'>+followed immediately by .final() is also a perfectly valid</div><div class='ctx'> transformation.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='head'>diff --git a/Documentation/crypto/index.rst b/Documentation/crypto/index.rst<br/>index 21338fa92642..da5d5ad2bdf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/crypto/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/crypto/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/crypto/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/crypto/index.rst</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='del'>-=======================</div><div class='del'>-Linux Kernel Crypto API</div><div class='del'>-=======================</div><div class='add'>+==========</div><div class='add'>+Crypto API</div><div class='add'>+==========</div><div class='ctx'> </div><div class='ctx'> :Author: Stephan Mueller</div><div class='ctx'> :Author: Marek Vasut</div><div class='head'>diff --git a/Documentation/crypto/userspace-if.rst b/Documentation/crypto/userspace-if.rst<br/>index b45dabbf69d6..f80f243e227e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/crypto/userspace-if.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/crypto/userspace-if.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/crypto/userspace-if.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/crypto/userspace-if.rst</a></div><div class='hunk'>@@ -131,9 +131,9 @@ from the kernel crypto API. If the buffer is too small for the message</div><div class='ctx'> digest, the flag MSG_TRUNC is set by the kernel.</div><div class='ctx'> </div><div class='ctx'> In order to set a message digest key, the calling application must use</div><div class='del'>-the setsockopt() option of ALG_SET_KEY. If the key is not set the HMAC</div><div class='del'>-operation is performed without the initial HMAC state change caused by</div><div class='del'>-the key.</div><div class='add'>+the setsockopt() option of ALG_SET_KEY or ALG_SET_KEY_BY_KEY_SERIAL. If the</div><div class='add'>+key is not set the HMAC operation is performed without the initial HMAC state</div><div class='add'>+change caused by the key.</div><div class='ctx'> </div><div class='ctx'> Symmetric Cipher API</div><div class='ctx'> --------------------</div><div class='hunk'>@@ -382,6 +382,15 @@ mentioned optname:</div><div class='ctx'> </div><div class='ctx'>    -  the RNG cipher type to provide the seed</div><div class='ctx'> </div><div class='add'>+- ALG_SET_KEY_BY_KEY_SERIAL -- Setting the key via keyring key_serial_t.</div><div class='add'>+   This operation behaves the same as ALG_SET_KEY. The decrypted</div><div class='add'>+   data is copied from a keyring key, and uses that data as the</div><div class='add'>+   key for symmetric encryption.</div><div class='add'>+</div><div class='add'>+   The passed in key_serial_t must have the KEY_(POS|USR|GRP|OTH)_SEARCH</div><div class='add'>+   permission set, otherwise -EPERM is returned. Supports key types: user,</div><div class='add'>+   logon, encrypted, and trusted.</div><div class='add'>+</div><div class='ctx'> -  ALG_SET_AEAD_AUTHSIZE -- Setting the authentication tag size for</div><div class='ctx'>    AEAD ciphers. For a encryption operation, the authentication tag of</div><div class='ctx'>    the given size will be generated. For a decryption operation, the</div><div class='head'>diff --git a/Documentation/dev-tools/checkpatch.rst b/Documentation/dev-tools/checkpatch.rst<br/>index b52452bc2963..c3389c6f3838 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/checkpatch.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/checkpatch.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/checkpatch.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/checkpatch.rst</a></div><div class='hunk'>@@ -612,6 +612,13 @@ Commit message</div><div class='ctx'> </div><div class='ctx'>     See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes</div><div class='ctx'> </div><div class='add'>+  **BAD_FIXES_TAG**</div><div class='add'>+    The Fixes: tag is malformed or does not follow the community conventions.</div><div class='add'>+    This can occur if the tag have been split into multiple lines (e.g., when</div><div class='add'>+    pasted in an email program with word wrapping enabled).</div><div class='add'>+</div><div class='add'>+    See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Comparison style</div><div class='ctx'> ----------------</div><div class='head'>diff --git a/Documentation/dev-tools/coccinelle.rst b/Documentation/dev-tools/coccinelle.rst<br/>index 9c454de5a7f7..535ce126fb4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/coccinelle.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/coccinelle.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/coccinelle.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/coccinelle.rst</a></div><div class='hunk'>@@ -66,7 +66,7 @@ The wiki documentation always refers to the linux-next version of the script.</div><div class='ctx'> </div><div class='ctx'> For Semantic Patch Language(SmPL) grammar documentation refer to:</div><div class='ctx'> </div><div class='del'>-http://coccinelle.lip6.fr/documentation.php</div><div class='add'>+https://coccinelle.gitlabpages.inria.fr/website/docs/main_grammar.html</div><div class='ctx'> </div><div class='ctx'> Using Coccinelle on the Linux kernel</div><div class='ctx'> ------------------------------------</div><div class='hunk'>@@ -219,7 +219,7 @@ instance::</div><div class='ctx'>     cat cocci.err</div><div class='ctx'> </div><div class='ctx'> You can use SPFLAGS to add debugging flags; for instance you may want to</div><div class='del'>-add both --profile --show-trying to SPFLAGS when debugging. For example</div><div class='add'>+add both ``--profile --show-trying`` to SPFLAGS when debugging. For example</div><div class='ctx'> you may want to use::</div><div class='ctx'> </div><div class='ctx'>     rm -f err.log</div><div class='hunk'>@@ -248,7 +248,7 @@ variables for .cocciconfig is as follows:</div><div class='ctx'> </div><div class='ctx'> - Your current user's home directory is processed first</div><div class='ctx'> - Your directory from which spatch is called is processed next</div><div class='del'>-- The directory provided with the --dir option is processed last, if used</div><div class='add'>+- The directory provided with the ``--dir`` option is processed last, if used</div><div class='ctx'> </div><div class='ctx'> Since coccicheck runs through make, it naturally runs from the kernel</div><div class='ctx'> proper dir; as such the second rule above would be implied for picking up a</div><div class='hunk'>@@ -265,8 +265,8 @@ The kernel coccicheck script has::</div><div class='ctx'>     fi</div><div class='ctx'> </div><div class='ctx'> KBUILD_EXTMOD is set when an explicit target with M= is used. For both cases</div><div class='del'>-the spatch --dir argument is used, as such third rule applies when whether M=</div><div class='del'>-is used or not, and when M= is used the target directory can have its own</div><div class='add'>+the spatch ``--dir`` argument is used, as such third rule applies when whether</div><div class='add'>+M= is used or not, and when M= is used the target directory can have its own</div><div class='ctx'> .cocciconfig file. When M= is not passed as an argument to coccicheck the</div><div class='ctx'> target directory is the same as the directory from where spatch was called.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/dev-tools/gdb-kernel-debugging.rst b/Documentation/dev-tools/gdb-kernel-debugging.rst<br/>index 8e0f1fe8d17a..895285c037c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/gdb-kernel-debugging.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/gdb-kernel-debugging.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/gdb-kernel-debugging.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/gdb-kernel-debugging.rst</a></div><div class='hunk'>@@ -39,6 +39,10 @@ Setup</div><div class='ctx'>   this mode. In this case, you should build the kernel with</div><div class='ctx'>   CONFIG_RANDOMIZE_BASE disabled if the architecture supports KASLR.</div><div class='ctx'> </div><div class='add'>+- Build the gdb scripts (required on kernels v5.1 and above)::</div><div class='add'>+</div><div class='add'>+    make scripts_gdb</div><div class='add'>+</div><div class='ctx'> - Enable the gdb stub of QEMU/KVM, either</div><div class='ctx'> </div><div class='ctx'>     - at VM startup time by appending "-s" to the QEMU command line</div><div class='head'>diff --git a/Documentation/dev-tools/index.rst b/Documentation/dev-tools/index.rst<br/>index 4621eac290f4..6b0663075dc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/index.rst</a></div><div class='hunk'>@@ -24,6 +24,7 @@ Documentation/dev-tools/testing-overview.rst</div><div class='ctx'>    kcov</div><div class='ctx'>    gcov</div><div class='ctx'>    kasan</div><div class='add'>+   kmsan</div><div class='ctx'>    ubsan</div><div class='ctx'>    kmemleak</div><div class='ctx'>    kcsan</div><div class='head'>diff --git a/Documentation/dev-tools/kasan.rst b/Documentation/dev-tools/kasan.rst<br/>index 7614a1fc30fa..e66916a483cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kasan.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kasan.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kasan.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kasan.rst</a></div><div class='hunk'>@@ -4,39 +4,76 @@ The Kernel Address Sanitizer (KASAN)</div><div class='ctx'> Overview</div><div class='ctx'> --------</div><div class='ctx'> </div><div class='del'>-KernelAddressSANitizer (KASAN) is a dynamic memory safety error detector</div><div class='del'>-designed to find out-of-bound and use-after-free bugs. KASAN has three modes:</div><div class='add'>+Kernel Address Sanitizer (KASAN) is a dynamic memory safety error detector</div><div class='add'>+designed to find out-of-bounds and use-after-free bugs.</div><div class='ctx'> </div><div class='del'>-1. generic KASAN (similar to userspace ASan),</div><div class='del'>-2. software tag-based KASAN (similar to userspace HWASan),</div><div class='del'>-3. hardware tag-based KASAN (based on hardware memory tagging).</div><div class='add'>+KASAN has three modes:</div><div class='ctx'> </div><div class='del'>-Generic KASAN is mainly used for debugging due to a large memory overhead.</div><div class='del'>-Software tag-based KASAN can be used for dogfood testing as it has a lower</div><div class='del'>-memory overhead that allows using it with real workloads. Hardware tag-based</div><div class='del'>-KASAN comes with low memory and performance overheads and, therefore, can be</div><div class='del'>-used in production. Either as an in-field memory bug detector or as a security</div><div class='del'>-mitigation.</div><div class='add'>+1. Generic KASAN</div><div class='add'>+2. Software Tag-Based KASAN</div><div class='add'>+3. Hardware Tag-Based KASAN</div><div class='ctx'> </div><div class='del'>-Software KASAN modes (#1 and #2) use compile-time instrumentation to insert</div><div class='del'>-validity checks before every memory access and, therefore, require a compiler</div><div class='del'>-version that supports that.</div><div class='add'>+Generic KASAN, enabled with CONFIG_KASAN_GENERIC, is the mode intended for</div><div class='add'>+debugging, similar to userspace ASan. This mode is supported on many CPU</div><div class='add'>+architectures, but it has significant performance and memory overheads.</div><div class='ctx'> </div><div class='del'>-Generic KASAN is supported in GCC and Clang. With GCC, it requires version</div><div class='del'>-8.3.0 or later. Any supported Clang version is compatible, but detection of</div><div class='del'>-out-of-bounds accesses for global variables is only supported since Clang 11.</div><div class='add'>+Software Tag-Based KASAN or SW_TAGS KASAN, enabled with CONFIG_KASAN_SW_TAGS,</div><div class='add'>+can be used for both debugging and dogfood testing, similar to userspace HWASan.</div><div class='add'>+This mode is only supported for arm64, but its moderate memory overhead allows</div><div class='add'>+using it for testing on memory-restricted devices with real workloads.</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN mode is only supported in Clang.</div><div class='add'>+Hardware Tag-Based KASAN or HW_TAGS KASAN, enabled with CONFIG_KASAN_HW_TAGS,</div><div class='add'>+is the mode intended to be used as an in-field memory bug detector or as a</div><div class='add'>+security mitigation. This mode only works on arm64 CPUs that support MTE</div><div class='add'>+(Memory Tagging Extension), but it has low memory and performance overheads and</div><div class='add'>+thus can be used in production.</div><div class='ctx'> </div><div class='del'>-The hardware KASAN mode (#3) relies on hardware to perform the checks but</div><div class='del'>-still requires a compiler version that supports memory tagging instructions.</div><div class='del'>-This mode is supported in GCC 10+ and Clang 12+.</div><div class='add'>+For details about the memory and performance impact of each KASAN mode, see the</div><div class='add'>+descriptions of the corresponding Kconfig options.</div><div class='ctx'> </div><div class='del'>-Both software KASAN modes work with SLUB and SLAB memory allocators,</div><div class='del'>-while the hardware tag-based KASAN currently only supports SLUB.</div><div class='add'>+The Generic and the Software Tag-Based modes are commonly referred to as the</div><div class='add'>+software modes. The Software Tag-Based and the Hardware Tag-Based modes are</div><div class='add'>+referred to as the tag-based modes.</div><div class='ctx'> </div><div class='del'>-Currently, generic KASAN is supported for the x86_64, arm, arm64, xtensa, s390,</div><div class='del'>-and riscv architectures, and tag-based KASAN modes are supported only for arm64.</div><div class='add'>+Support</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+Architectures</div><div class='add'>+~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Generic KASAN is supported on x86_64, arm, arm64, powerpc, riscv, s390, and</div><div class='add'>+xtensa, and the tag-based KASAN modes are supported only on arm64.</div><div class='add'>+</div><div class='add'>+Compilers</div><div class='add'>+~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Software KASAN modes use compile-time instrumentation to insert validity checks</div><div class='add'>+before every memory access and thus require a compiler version that provides</div><div class='add'>+support for that. The Hardware Tag-Based mode relies on hardware to perform</div><div class='add'>+these checks but still requires a compiler version that supports the memory</div><div class='add'>+tagging instructions.</div><div class='add'>+</div><div class='add'>+Generic KASAN requires GCC version 8.3.0 or later</div><div class='add'>+or any Clang version supported by the kernel.</div><div class='add'>+</div><div class='add'>+Software Tag-Based KASAN requires GCC 11+</div><div class='add'>+or any Clang version supported by the kernel.</div><div class='add'>+</div><div class='add'>+Hardware Tag-Based KASAN requires GCC 10+ or Clang 12+.</div><div class='add'>+</div><div class='add'>+Memory types</div><div class='add'>+~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Generic KASAN supports finding bugs in all of slab, page_alloc, vmap, vmalloc,</div><div class='add'>+stack, and global memory.</div><div class='add'>+</div><div class='add'>+Software Tag-Based KASAN supports slab, page_alloc, vmalloc, and stack memory.</div><div class='add'>+</div><div class='add'>+Hardware Tag-Based KASAN supports slab, page_alloc, and non-executable vmalloc</div><div class='add'>+memory.</div><div class='add'>+</div><div class='add'>+For slab, both software KASAN modes support SLUB and SLAB allocators, while</div><div class='add'>+Hardware Tag-Based KASAN only supports SLUB.</div><div class='ctx'> </div><div class='ctx'> Usage</div><div class='ctx'> -----</div><div class='hunk'>@@ -45,18 +82,81 @@ To enable KASAN, configure the kernel with::</div><div class='ctx'> </div><div class='ctx'> 	  CONFIG_KASAN=y</div><div class='ctx'> </div><div class='del'>-and choose between ``CONFIG_KASAN_GENERIC`` (to enable generic KASAN),</div><div class='del'>-``CONFIG_KASAN_SW_TAGS`` (to enable software tag-based KASAN), and</div><div class='del'>-``CONFIG_KASAN_HW_TAGS`` (to enable hardware tag-based KASAN).</div><div class='add'>+and choose between ``CONFIG_KASAN_GENERIC`` (to enable Generic KASAN),</div><div class='add'>+``CONFIG_KASAN_SW_TAGS`` (to enable Software Tag-Based KASAN), and</div><div class='add'>+``CONFIG_KASAN_HW_TAGS`` (to enable Hardware Tag-Based KASAN).</div><div class='ctx'> </div><div class='del'>-For software modes, also choose between ``CONFIG_KASAN_OUTLINE`` and</div><div class='add'>+For the software modes, also choose between ``CONFIG_KASAN_OUTLINE`` and</div><div class='ctx'> ``CONFIG_KASAN_INLINE``. Outline and inline are compiler instrumentation types.</div><div class='del'>-The former produces a smaller binary while the latter is 1.1-2 times faster.</div><div class='add'>+The former produces a smaller binary while the latter is up to 2 times faster.</div><div class='ctx'> </div><div class='ctx'> To include alloc and free stack traces of affected slab objects into reports,</div><div class='ctx'> enable ``CONFIG_STACKTRACE``. To include alloc and free stack traces of affected</div><div class='ctx'> physical pages, enable ``CONFIG_PAGE_OWNER`` and boot with ``page_owner=on``.</div><div class='ctx'> </div><div class='add'>+Boot parameters</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+KASAN is affected by the generic ``panic_on_warn`` command line parameter.</div><div class='add'>+When it is enabled, KASAN panics the kernel after printing a bug report.</div><div class='add'>+</div><div class='add'>+By default, KASAN prints a bug report only for the first invalid memory access.</div><div class='add'>+With ``kasan_multi_shot``, KASAN prints a report on every invalid access. This</div><div class='add'>+effectively disables ``panic_on_warn`` for KASAN reports.</div><div class='add'>+</div><div class='add'>+Alternatively, independent of ``panic_on_warn``, the ``kasan.fault=`` boot</div><div class='add'>+parameter can be used to control panic and reporting behaviour:</div><div class='add'>+</div><div class='add'>+- ``kasan.fault=report`` or ``=panic`` controls whether to only print a KASAN</div><div class='add'>+  report or also panic the kernel (default: ``report``). The panic happens even</div><div class='add'>+  if ``kasan_multi_shot`` is enabled.</div><div class='add'>+</div><div class='add'>+Software and Hardware Tag-Based KASAN modes (see the section about various</div><div class='add'>+modes below) support altering stack trace collection behavior:</div><div class='add'>+</div><div class='add'>+- ``kasan.stacktrace=off`` or ``=on`` disables or enables alloc and free stack</div><div class='add'>+  traces collection (default: ``on``).</div><div class='add'>+- ``kasan.stack_ring_size=&lt;number of entries&gt;`` specifies the number of entries</div><div class='add'>+  in the stack ring (default: ``32768``).</div><div class='add'>+</div><div class='add'>+Hardware Tag-Based KASAN mode is intended for use in production as a security</div><div class='add'>+mitigation. Therefore, it supports additional boot parameters that allow</div><div class='add'>+disabling KASAN altogether or controlling its features:</div><div class='add'>+</div><div class='add'>+- ``kasan=off`` or ``=on`` controls whether KASAN is enabled (default: ``on``).</div><div class='add'>+</div><div class='add'>+- ``kasan.mode=sync``, ``=async`` or ``=asymm`` controls whether KASAN</div><div class='add'>+  is configured in synchronous, asynchronous or asymmetric mode of</div><div class='add'>+  execution (default: ``sync``).</div><div class='add'>+  Synchronous mode: a bad access is detected immediately when a tag</div><div class='add'>+  check fault occurs.</div><div class='add'>+  Asynchronous mode: a bad access detection is delayed. When a tag check</div><div class='add'>+  fault occurs, the information is stored in hardware (in the TFSR_EL1</div><div class='add'>+  register for arm64). The kernel periodically checks the hardware and</div><div class='add'>+  only reports tag faults during these checks.</div><div class='add'>+  Asymmetric mode: a bad access is detected synchronously on reads and</div><div class='add'>+  asynchronously on writes.</div><div class='add'>+</div><div class='add'>+- ``kasan.vmalloc=off`` or ``=on`` disables or enables tagging of vmalloc</div><div class='add'>+  allocations (default: ``on``).</div><div class='add'>+</div><div class='add'>+- ``kasan.page_alloc.sample=&lt;sampling interval&gt;`` makes KASAN tag only every</div><div class='add'>+  Nth page_alloc allocation with the order equal or greater than</div><div class='add'>+  ``kasan.page_alloc.sample.order``, where N is the value of the ``sample``</div><div class='add'>+  parameter (default: ``1``, or tag every such allocation).</div><div class='add'>+  This parameter is intended to mitigate the performance overhead introduced</div><div class='add'>+  by KASAN.</div><div class='add'>+  Note that enabling this parameter makes Hardware Tag-Based KASAN skip checks</div><div class='add'>+  of allocations chosen by sampling and thus miss bad accesses to these</div><div class='add'>+  allocations. Use the default value for accurate bug detection.</div><div class='add'>+</div><div class='add'>+- ``kasan.page_alloc.sample.order=&lt;minimum page order&gt;`` specifies the minimum</div><div class='add'>+  order of allocations that are affected by sampling (default: ``3``).</div><div class='add'>+  Only applies when ``kasan.page_alloc.sample`` is set to a value greater</div><div class='add'>+  than ``1``.</div><div class='add'>+  This parameter is intended to allow sampling only large page_alloc</div><div class='add'>+  allocations, which is the biggest source of the performance overhead.</div><div class='add'>+</div><div class='ctx'> Error reports</div><div class='ctx'> ~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -146,7 +246,7 @@ is either 8 or 16 aligned bytes depending on KASAN mode. Each number in the</div><div class='ctx'> memory state section of the report shows the state of one of the memory</div><div class='ctx'> granules that surround the accessed address.</div><div class='ctx'> </div><div class='del'>-For generic KASAN, the size of each memory granule is 8. The state of each</div><div class='add'>+For Generic KASAN, the size of each memory granule is 8. The state of each</div><div class='ctx'> granule is encoded in one shadow byte. Those 8 bytes can be accessible,</div><div class='ctx'> partially accessible, freed, or be a part of a redzone. KASAN uses the following</div><div class='ctx'> encoding for each shadow byte: 00 means that all 8 bytes of the corresponding</div><div class='hunk'>@@ -171,47 +271,6 @@ traces point to places in code that interacted with the object but that are not</div><div class='ctx'> directly present in the bad access stack trace. Currently, this includes</div><div class='ctx'> call_rcu() and workqueue queuing.</div><div class='ctx'> </div><div class='del'>-Boot parameters</div><div class='del'>-~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-KASAN is affected by the generic ``panic_on_warn`` command line parameter.</div><div class='del'>-When it is enabled, KASAN panics the kernel after printing a bug report.</div><div class='del'>-</div><div class='del'>-By default, KASAN prints a bug report only for the first invalid memory access.</div><div class='del'>-With ``kasan_multi_shot``, KASAN prints a report on every invalid access. This</div><div class='del'>-effectively disables ``panic_on_warn`` for KASAN reports.</div><div class='del'>-</div><div class='del'>-Alternatively, independent of ``panic_on_warn`` the ``kasan.fault=`` boot</div><div class='del'>-parameter can be used to control panic and reporting behaviour:</div><div class='del'>-</div><div class='del'>-- ``kasan.fault=report`` or ``=panic`` controls whether to only print a KASAN</div><div class='del'>-  report or also panic the kernel (default: ``report``). The panic happens even</div><div class='del'>-  if ``kasan_multi_shot`` is enabled.</div><div class='del'>-</div><div class='del'>-Hardware tag-based KASAN mode (see the section about various modes below) is</div><div class='del'>-intended for use in production as a security mitigation. Therefore, it supports</div><div class='del'>-additional boot parameters that allow disabling KASAN or controlling features:</div><div class='del'>-</div><div class='del'>-- ``kasan=off`` or ``=on`` controls whether KASAN is enabled (default: ``on``).</div><div class='del'>-</div><div class='del'>-- ``kasan.mode=sync``, ``=async`` or ``=asymm`` controls whether KASAN</div><div class='del'>-  is configured in synchronous, asynchronous or asymmetric mode of</div><div class='del'>-  execution (default: ``sync``).</div><div class='del'>-  Synchronous mode: a bad access is detected immediately when a tag</div><div class='del'>-  check fault occurs.</div><div class='del'>-  Asynchronous mode: a bad access detection is delayed. When a tag check</div><div class='del'>-  fault occurs, the information is stored in hardware (in the TFSR_EL1</div><div class='del'>-  register for arm64). The kernel periodically checks the hardware and</div><div class='del'>-  only reports tag faults during these checks.</div><div class='del'>-  Asymmetric mode: a bad access is detected synchronously on reads and</div><div class='del'>-  asynchronously on writes.</div><div class='del'>-</div><div class='del'>-- ``kasan.vmalloc=off`` or ``=on`` disables or enables tagging of vmalloc</div><div class='del'>-  allocations (default: ``on``).</div><div class='del'>-</div><div class='del'>-- ``kasan.stacktrace=off`` or ``=on`` disables or enables alloc and free stack</div><div class='del'>-  traces collection (default: ``on``).</div><div class='del'>-</div><div class='ctx'> Implementation details</div><div class='ctx'> ----------------------</div><div class='ctx'> </div><div class='hunk'>@@ -250,49 +309,46 @@ outline-instrumented kernel.</div><div class='ctx'> Generic KASAN is the only mode that delays the reuse of freed objects via</div><div class='ctx'> quarantine (see mm/kasan/quarantine.c for implementation).</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN</div><div class='add'>+Software Tag-Based KASAN</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN uses a software memory tagging approach to checking</div><div class='add'>+Software Tag-Based KASAN uses a software memory tagging approach to checking</div><div class='ctx'> access validity. It is currently only implemented for the arm64 architecture.</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN uses the Top Byte Ignore (TBI) feature of arm64 CPUs</div><div class='add'>+Software Tag-Based KASAN uses the Top Byte Ignore (TBI) feature of arm64 CPUs</div><div class='ctx'> to store a pointer tag in the top byte of kernel pointers. It uses shadow memory</div><div class='ctx'> to store memory tags associated with each 16-byte memory cell (therefore, it</div><div class='ctx'> dedicates 1/16th of the kernel memory for shadow memory).</div><div class='ctx'> </div><div class='del'>-On each memory allocation, software tag-based KASAN generates a random tag, tags</div><div class='add'>+On each memory allocation, Software Tag-Based KASAN generates a random tag, tags</div><div class='ctx'> the allocated memory with this tag, and embeds the same tag into the returned</div><div class='ctx'> pointer.</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN uses compile-time instrumentation to insert checks</div><div class='add'>+Software Tag-Based KASAN uses compile-time instrumentation to insert checks</div><div class='ctx'> before each memory access. These checks make sure that the tag of the memory</div><div class='ctx'> that is being accessed is equal to the tag of the pointer that is used to access</div><div class='del'>-this memory. In case of a tag mismatch, software tag-based KASAN prints a bug</div><div class='add'>+this memory. In case of a tag mismatch, Software Tag-Based KASAN prints a bug</div><div class='ctx'> report.</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN also has two instrumentation modes (outline, which</div><div class='add'>+Software Tag-Based KASAN also has two instrumentation modes (outline, which</div><div class='ctx'> emits callbacks to check memory accesses; and inline, which performs the shadow</div><div class='ctx'> memory checks inline). With outline instrumentation mode, a bug report is</div><div class='ctx'> printed from the function that performs the access check. With inline</div><div class='ctx'> instrumentation, a ``brk`` instruction is emitted by the compiler, and a</div><div class='ctx'> dedicated ``brk`` handler is used to print bug reports.</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN uses 0xFF as a match-all pointer tag (accesses through</div><div class='add'>+Software Tag-Based KASAN uses 0xFF as a match-all pointer tag (accesses through</div><div class='ctx'> pointers with the 0xFF pointer tag are not checked). The value 0xFE is currently</div><div class='ctx'> reserved to tag freed memory regions.</div><div class='ctx'> </div><div class='del'>-Software tag-based KASAN currently only supports tagging of slab, page_alloc,</div><div class='del'>-and vmalloc memory.</div><div class='del'>-</div><div class='del'>-Hardware tag-based KASAN</div><div class='add'>+Hardware Tag-Based KASAN</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-Hardware tag-based KASAN is similar to the software mode in concept but uses</div><div class='add'>+Hardware Tag-Based KASAN is similar to the software mode in concept but uses</div><div class='ctx'> hardware memory tagging support instead of compiler instrumentation and</div><div class='ctx'> shadow memory.</div><div class='ctx'> </div><div class='del'>-Hardware tag-based KASAN is currently only implemented for arm64 architecture</div><div class='add'>+Hardware Tag-Based KASAN is currently only implemented for arm64 architecture</div><div class='ctx'> and based on both arm64 Memory Tagging Extension (MTE) introduced in ARMv8.5</div><div class='ctx'> Instruction Set Architecture and Top Byte Ignore (TBI).</div><div class='ctx'> </div><div class='hunk'>@@ -302,21 +358,18 @@ access, hardware makes sure that the tag of the memory that is being accessed is</div><div class='ctx'> equal to the tag of the pointer that is used to access this memory. In case of a</div><div class='ctx'> tag mismatch, a fault is generated, and a report is printed.</div><div class='ctx'> </div><div class='del'>-Hardware tag-based KASAN uses 0xFF as a match-all pointer tag (accesses through</div><div class='add'>+Hardware Tag-Based KASAN uses 0xFF as a match-all pointer tag (accesses through</div><div class='ctx'> pointers with the 0xFF pointer tag are not checked). The value 0xFE is currently</div><div class='ctx'> reserved to tag freed memory regions.</div><div class='ctx'> </div><div class='del'>-Hardware tag-based KASAN currently only supports tagging of slab, page_alloc,</div><div class='del'>-and VM_ALLOC-based vmalloc memory.</div><div class='del'>-</div><div class='del'>-If the hardware does not support MTE (pre ARMv8.5), hardware tag-based KASAN</div><div class='add'>+If the hardware does not support MTE (pre ARMv8.5), Hardware Tag-Based KASAN</div><div class='ctx'> will not be enabled. In this case, all KASAN boot parameters are ignored.</div><div class='ctx'> </div><div class='ctx'> Note that enabling CONFIG_KASAN_HW_TAGS always results in in-kernel TBI being</div><div class='ctx'> enabled. Even when ``kasan.mode=off`` is provided or when the hardware does not</div><div class='ctx'> support MTE (but supports TBI).</div><div class='ctx'> </div><div class='del'>-Hardware tag-based KASAN only reports the first found bug. After that, MTE tag</div><div class='add'>+Hardware Tag-Based KASAN only reports the first found bug. After that, MTE tag</div><div class='ctx'> checking gets disabled.</div><div class='ctx'> </div><div class='ctx'> Shadow memory</div><div class='hunk'>@@ -414,19 +467,18 @@ generic ``noinstr`` one.</div><div class='ctx'> Note that disabling compiler instrumentation (either on a per-file or a</div><div class='ctx'> per-function basis) makes KASAN ignore the accesses that happen directly in</div><div class='ctx'> that code for software KASAN modes. It does not help when the accesses happen</div><div class='del'>-indirectly (through calls to instrumented functions) or with the hardware</div><div class='del'>-tag-based mode that does not use compiler instrumentation.</div><div class='add'>+indirectly (through calls to instrumented functions) or with Hardware</div><div class='add'>+Tag-Based KASAN, which does not use compiler instrumentation.</div><div class='ctx'> </div><div class='ctx'> For software KASAN modes, to disable KASAN reports in a part of the kernel code</div><div class='ctx'> for the current task, annotate this part of the code with a</div><div class='ctx'> ``kasan_disable_current()``/``kasan_enable_current()`` section. This also</div><div class='ctx'> disables the reports for indirect accesses that happen through function calls.</div><div class='ctx'> </div><div class='del'>-For tag-based KASAN modes (include the hardware one), to disable access</div><div class='del'>-checking, use ``kasan_reset_tag()`` or ``page_kasan_tag_reset()``. Note that</div><div class='del'>-temporarily disabling access checking via ``page_kasan_tag_reset()`` requires</div><div class='del'>-saving and restoring the per-page KASAN tag via</div><div class='del'>-``page_kasan_tag``/``page_kasan_tag_set``.</div><div class='add'>+For tag-based KASAN modes, to disable access checking, use</div><div class='add'>+``kasan_reset_tag()`` or ``page_kasan_tag_reset()``. Note that temporarily</div><div class='add'>+disabling access checking via ``page_kasan_tag_reset()`` requires saving and</div><div class='add'>+restoring the per-page KASAN tag via ``page_kasan_tag``/``page_kasan_tag_set``.</div><div class='ctx'> </div><div class='ctx'> Tests</div><div class='ctx'> ~~~~~</div><div class='head'>diff --git a/Documentation/dev-tools/kcov.rst b/Documentation/dev-tools/kcov.rst<br/>index d83c9ab49427..6611434e2dd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kcov.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kcov.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kcov.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kcov.rst</a></div><div class='hunk'>@@ -1,42 +1,50 @@</div><div class='del'>-kcov: code coverage for fuzzing</div><div class='add'>+KCOV: code coverage for fuzzing</div><div class='ctx'> ===============================</div><div class='ctx'> </div><div class='del'>-kcov exposes kernel code coverage information in a form suitable for coverage-</div><div class='del'>-guided fuzzing (randomized testing). Coverage data of a running kernel is</div><div class='del'>-exported via the "kcov" debugfs file. Coverage collection is enabled on a task</div><div class='del'>-basis, and thus it can capture precise coverage of a single system call.</div><div class='add'>+KCOV collects and exposes kernel code coverage information in a form suitable</div><div class='add'>+for coverage-guided fuzzing. Coverage data of a running kernel is exported via</div><div class='add'>+the ``kcov`` debugfs file. Coverage collection is enabled on a task basis, and</div><div class='add'>+thus KCOV can capture precise coverage of a single system call.</div><div class='ctx'> </div><div class='del'>-Note that kcov does not aim to collect as much coverage as possible. It aims</div><div class='del'>-to collect more or less stable coverage that is function of syscall inputs.</div><div class='del'>-To achieve this goal it does not collect coverage in soft/hard interrupts</div><div class='del'>-and instrumentation of some inherently non-deterministic parts of kernel is</div><div class='del'>-disabled (e.g. scheduler, locking).</div><div class='add'>+Note that KCOV does not aim to collect as much coverage as possible. It aims</div><div class='add'>+to collect more or less stable coverage that is a function of syscall inputs.</div><div class='add'>+To achieve this goal, it does not collect coverage in soft/hard interrupts</div><div class='add'>+(unless remove coverage collection is enabled, see below) and from some</div><div class='add'>+inherently non-deterministic parts of the kernel (e.g. scheduler, locking).</div><div class='ctx'> </div><div class='del'>-kcov is also able to collect comparison operands from the instrumented code</div><div class='del'>-(this feature currently requires that the kernel is compiled with clang).</div><div class='add'>+Besides collecting code coverage, KCOV can also collect comparison operands.</div><div class='add'>+See the "Comparison operands collection" section for details.</div><div class='add'>+</div><div class='add'>+Besides collecting coverage data from syscall handlers, KCOV can also collect</div><div class='add'>+coverage for annotated parts of the kernel executing in background kernel</div><div class='add'>+tasks or soft interrupts. See the "Remote coverage collection" section for</div><div class='add'>+details.</div><div class='ctx'> </div><div class='ctx'> Prerequisites</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-Configure the kernel with::</div><div class='add'>+KCOV relies on compiler instrumentation and requires GCC 6.1.0 or later</div><div class='add'>+or any Clang version supported by the kernel.</div><div class='ctx'> </div><div class='del'>-        CONFIG_KCOV=y</div><div class='add'>+Collecting comparison operands is supported with GCC 8+ or with Clang.</div><div class='ctx'> </div><div class='del'>-CONFIG_KCOV requires gcc 6.1.0 or later.</div><div class='add'>+To enable KCOV, configure the kernel with::</div><div class='ctx'> </div><div class='del'>-If the comparison operands need to be collected, set::</div><div class='add'>+        CONFIG_KCOV=y</div><div class='add'>+</div><div class='add'>+To enable comparison operands collection, set::</div><div class='ctx'> </div><div class='ctx'> 	CONFIG_KCOV_ENABLE_COMPARISONS=y</div><div class='ctx'> </div><div class='del'>-Profiling data will only become accessible once debugfs has been mounted::</div><div class='add'>+Coverage data only becomes accessible once debugfs has been mounted::</div><div class='ctx'> </div><div class='ctx'>         mount -t debugfs none /sys/kernel/debug</div><div class='ctx'> </div><div class='ctx'> Coverage collection</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-The following program demonstrates coverage collection from within a test</div><div class='del'>-program using kcov:</div><div class='add'>+The following program demonstrates how to use KCOV to collect coverage for a</div><div class='add'>+single syscall from within a test program:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='hunk'>@@ -84,7 +92,7 @@ program using kcov:</div><div class='ctx'> 		perror("ioctl"), exit(1);</div><div class='ctx'> 	/* Reset coverage from the tail of the ioctl() call. */</div><div class='ctx'> 	__atomic_store_n(&amp;cover[0], 0, __ATOMIC_RELAXED);</div><div class='del'>-	/* That's the target syscal call. */</div><div class='add'>+	/* Call the target syscall call. */</div><div class='ctx'> 	read(-1, NULL, 0);</div><div class='ctx'> 	/* Read number of PCs collected. */</div><div class='ctx'> 	n = __atomic_load_n(&amp;cover[0], __ATOMIC_RELAXED);</div><div class='hunk'>@@ -103,7 +111,7 @@ program using kcov:</div><div class='ctx'> 	return 0;</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='del'>-After piping through addr2line output of the program looks as follows::</div><div class='add'>+After piping through ``addr2line`` the output of the program looks as follows::</div><div class='ctx'> </div><div class='ctx'>     SyS_read</div><div class='ctx'>     fs/read_write.c:562</div><div class='hunk'>@@ -121,12 +129,13 @@ After piping through addr2line output of the program looks as follows::</div><div class='ctx'>     fs/read_write.c:562</div><div class='ctx'> </div><div class='ctx'> If a program needs to collect coverage from several threads (independently),</div><div class='del'>-it needs to open /sys/kernel/debug/kcov in each thread separately.</div><div class='add'>+it needs to open ``/sys/kernel/debug/kcov`` in each thread separately.</div><div class='ctx'> </div><div class='ctx'> The interface is fine-grained to allow efficient forking of test processes.</div><div class='del'>-That is, a parent process opens /sys/kernel/debug/kcov, enables trace mode,</div><div class='del'>-mmaps coverage buffer and then forks child processes in a loop. Child processes</div><div class='del'>-only need to enable coverage (disable happens automatically on thread end).</div><div class='add'>+That is, a parent process opens ``/sys/kernel/debug/kcov``, enables trace mode,</div><div class='add'>+mmaps coverage buffer, and then forks child processes in a loop. The child</div><div class='add'>+processes only need to enable coverage (it gets disabled automatically when</div><div class='add'>+a thread exits).</div><div class='ctx'> </div><div class='ctx'> Comparison operands collection</div><div class='ctx'> ------------------------------</div><div class='hunk'>@@ -205,52 +214,78 @@ Comparison operands collection is similar to coverage collection:</div><div class='ctx'> 	return 0;</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='del'>-Note that the kcov modes (coverage collection or comparison operands) are</div><div class='del'>-mutually exclusive.</div><div class='add'>+Note that the KCOV modes (collection of code coverage or comparison operands)</div><div class='add'>+are mutually exclusive.</div><div class='ctx'> </div><div class='ctx'> Remote coverage collection</div><div class='ctx'> --------------------------</div><div class='ctx'> </div><div class='del'>-With KCOV_ENABLE coverage is collected only for syscalls that are issued</div><div class='del'>-from the current process. With KCOV_REMOTE_ENABLE it's possible to collect</div><div class='del'>-coverage for arbitrary parts of the kernel code, provided that those parts</div><div class='del'>-are annotated with kcov_remote_start()/kcov_remote_stop().</div><div class='del'>-</div><div class='del'>-This allows to collect coverage from two types of kernel background</div><div class='del'>-threads: the global ones, that are spawned during kernel boot in a limited</div><div class='del'>-number of instances (e.g. one USB hub_event() worker thread is spawned per</div><div class='del'>-USB HCD); and the local ones, that are spawned when a user interacts with</div><div class='del'>-some kernel interface (e.g. vhost workers); as well as from soft</div><div class='del'>-interrupts.</div><div class='del'>-</div><div class='del'>-To enable collecting coverage from a global background thread or from a</div><div class='del'>-softirq, a unique global handle must be assigned and passed to the</div><div class='del'>-corresponding kcov_remote_start() call. Then a userspace process can pass</div><div class='del'>-a list of such handles to the KCOV_REMOTE_ENABLE ioctl in the handles</div><div class='del'>-array field of the kcov_remote_arg struct. This will attach the used kcov</div><div class='del'>-device to the code sections, that are referenced by those handles.</div><div class='del'>-</div><div class='del'>-Since there might be many local background threads spawned from different</div><div class='del'>-userspace processes, we can't use a single global handle per annotation.</div><div class='del'>-Instead, the userspace process passes a non-zero handle through the</div><div class='del'>-common_handle field of the kcov_remote_arg struct. This common handle gets</div><div class='del'>-saved to the kcov_handle field in the current task_struct and needs to be</div><div class='del'>-passed to the newly spawned threads via custom annotations. Those threads</div><div class='del'>-should in turn be annotated with kcov_remote_start()/kcov_remote_stop().</div><div class='del'>-</div><div class='del'>-Internally kcov stores handles as u64 integers. The top byte of a handle</div><div class='del'>-is used to denote the id of a subsystem that this handle belongs to, and</div><div class='del'>-the lower 4 bytes are used to denote the id of a thread instance within</div><div class='del'>-that subsystem. A reserved value 0 is used as a subsystem id for common</div><div class='del'>-handles as they don't belong to a particular subsystem. The bytes 4-7 are</div><div class='del'>-currently reserved and must be zero. In the future the number of bytes</div><div class='del'>-used for the subsystem or handle ids might be increased.</div><div class='del'>-</div><div class='del'>-When a particular userspace process collects coverage via a common</div><div class='del'>-handle, kcov will collect coverage for each code section that is annotated</div><div class='del'>-to use the common handle obtained as kcov_handle from the current</div><div class='del'>-task_struct. However non common handles allow to collect coverage</div><div class='del'>-selectively from different subsystems.</div><div class='add'>+Besides collecting coverage data from handlers of syscalls issued from a</div><div class='add'>+userspace process, KCOV can also collect coverage for parts of the kernel</div><div class='add'>+executing in other contexts - so-called "remote" coverage.</div><div class='add'>+</div><div class='add'>+Using KCOV to collect remote coverage requires:</div><div class='add'>+</div><div class='add'>+1. Modifying kernel code to annotate the code section from where coverage</div><div class='add'>+   should be collected with ``kcov_remote_start`` and ``kcov_remote_stop``.</div><div class='add'>+</div><div class='add'>+2. Using ``KCOV_REMOTE_ENABLE`` instead of ``KCOV_ENABLE`` in the userspace</div><div class='add'>+   process that collects coverage.</div><div class='add'>+</div><div class='add'>+Both ``kcov_remote_start`` and ``kcov_remote_stop`` annotations and the</div><div class='add'>+``KCOV_REMOTE_ENABLE`` ioctl accept handles that identify particular coverage</div><div class='add'>+collection sections. The way a handle is used depends on the context where the</div><div class='add'>+matching code section executes.</div><div class='add'>+</div><div class='add'>+KCOV supports collecting remote coverage from the following contexts:</div><div class='add'>+</div><div class='add'>+1. Global kernel background tasks. These are the tasks that are spawned during</div><div class='add'>+   kernel boot in a limited number of instances (e.g. one USB ``hub_event``</div><div class='add'>+   worker is spawned per one USB HCD).</div><div class='add'>+</div><div class='add'>+2. Local kernel background tasks. These are spawned when a userspace process</div><div class='add'>+   interacts with some kernel interface and are usually killed when the process</div><div class='add'>+   exits (e.g. vhost workers).</div><div class='add'>+</div><div class='add'>+3. Soft interrupts.</div><div class='add'>+</div><div class='add'>+For #1 and #3, a unique global handle must be chosen and passed to the</div><div class='add'>+corresponding ``kcov_remote_start`` call. Then a userspace process must pass</div><div class='add'>+this handle to ``KCOV_REMOTE_ENABLE`` in the ``handles`` array field of the</div><div class='add'>+``kcov_remote_arg`` struct. This will attach the used KCOV device to the code</div><div class='add'>+section referenced by this handle. Multiple global handles identifying</div><div class='add'>+different code sections can be passed at once.</div><div class='add'>+</div><div class='add'>+For #2, the userspace process instead must pass a non-zero handle through the</div><div class='add'>+``common_handle`` field of the ``kcov_remote_arg`` struct. This common handle</div><div class='add'>+gets saved to the ``kcov_handle`` field in the current ``task_struct`` and</div><div class='add'>+needs to be passed to the newly spawned local tasks via custom kernel code</div><div class='add'>+modifications. Those tasks should in turn use the passed handle in their</div><div class='add'>+``kcov_remote_start`` and ``kcov_remote_stop`` annotations.</div><div class='add'>+</div><div class='add'>+KCOV follows a predefined format for both global and common handles. Each</div><div class='add'>+handle is a ``u64`` integer. Currently, only the one top and the lower 4 bytes</div><div class='add'>+are used. Bytes 4-7 are reserved and must be zero.</div><div class='add'>+</div><div class='add'>+For global handles, the top byte of the handle denotes the id of a subsystem</div><div class='add'>+this handle belongs to. For example, KCOV uses ``1`` as the USB subsystem id.</div><div class='add'>+The lower 4 bytes of a global handle denote the id of a task instance within</div><div class='add'>+that subsystem. For example, each ``hub_event`` worker uses the USB bus number</div><div class='add'>+as the task instance id.</div><div class='add'>+</div><div class='add'>+For common handles, a reserved value ``0`` is used as a subsystem id, as such</div><div class='add'>+handles don't belong to a particular subsystem. The lower 4 bytes of a common</div><div class='add'>+handle identify a collective instance of all local tasks spawned by the</div><div class='add'>+userspace process that passed a common handle to ``KCOV_REMOTE_ENABLE``.</div><div class='add'>+</div><div class='add'>+In practice, any value can be used for common handle instance id if coverage</div><div class='add'>+is only collected from a single userspace process on the system. However, if</div><div class='add'>+common handles are used by multiple processes, unique instance ids must be</div><div class='add'>+used for each process. One option is to use the process id as the common</div><div class='add'>+handle instance id.</div><div class='add'>+</div><div class='add'>+The following program demonstrates using KCOV to collect coverage from both</div><div class='add'>+local tasks spawned by the process and the global task that handles USB bus #1:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/dev-tools/kmemleak.rst b/Documentation/dev-tools/kmemleak.rst<br/>index 1c935f41cd3a..2cb00b53339f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kmemleak.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kmemleak.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kmemleak.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kmemleak.rst</a></div><div class='hunk'>@@ -174,7 +174,6 @@ mapping:</div><div class='ctx'> </div><div class='ctx'> - ``kmemleak_alloc_phys``</div><div class='ctx'> - ``kmemleak_free_part_phys``</div><div class='del'>-- ``kmemleak_not_leak_phys``</div><div class='ctx'> - ``kmemleak_ignore_phys``</div><div class='ctx'> </div><div class='ctx'> Dealing with false positives/negatives</div><div class='hunk'>@@ -228,7 +227,7 @@ Testing with kmemleak-test</div><div class='ctx'> --------------------------</div><div class='ctx'> </div><div class='ctx'> To check if you have all set up to use kmemleak, you can use the kmemleak-test</div><div class='del'>-module, a module that deliberately leaks memory. Set CONFIG_DEBUG_KMEMLEAK_TEST</div><div class='add'>+module, a module that deliberately leaks memory. Set CONFIG_SAMPLE_KMEMLEAK</div><div class='ctx'> as module (it can't be used as built-in) and boot the kernel with kmemleak</div><div class='ctx'> enabled. Load the module and perform a scan with::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/dev-tools/kmsan.rst b/Documentation/dev-tools/kmsan.rst<br/>new file mode 100644<br/>index 000000000000..55fa82212eb2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kmsan.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kmsan.rst</a></div><div class='hunk'>@@ -0,0 +1,428 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+.. Copyright (C) 2022, Google LLC.</div><div class='add'>+</div><div class='add'>+===================================</div><div class='add'>+The Kernel Memory Sanitizer (KMSAN)</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+KMSAN is a dynamic error detector aimed at finding uses of uninitialized</div><div class='add'>+values. It is based on compiler instrumentation, and is quite similar to the</div><div class='add'>+userspace `MemorySanitizer tool`_.</div><div class='add'>+</div><div class='add'>+An important note is that KMSAN is not intended for production use, because it</div><div class='add'>+drastically increases kernel memory footprint and slows the whole system down.</div><div class='add'>+</div><div class='add'>+Usage</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Building the kernel</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+In order to build a kernel with KMSAN you will need a fresh Clang (14.0.6+).</div><div class='add'>+Please refer to `LLVM documentation`_ for the instructions on how to build Clang.</div><div class='add'>+</div><div class='add'>+Now configure and build the kernel with CONFIG_KMSAN enabled.</div><div class='add'>+</div><div class='add'>+Example report</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+Here is an example of a KMSAN report::</div><div class='add'>+</div><div class='add'>+  =====================================================</div><div class='add'>+  BUG: KMSAN: uninit-value in test_uninit_kmsan_check_memory+0x1be/0x380 [kmsan_test]</div><div class='add'>+   test_uninit_kmsan_check_memory+0x1be/0x380 mm/kmsan/kmsan_test.c:273</div><div class='add'>+   kunit_run_case_internal lib/kunit/test.c:333</div><div class='add'>+   kunit_try_run_case+0x206/0x420 lib/kunit/test.c:374</div><div class='add'>+   kunit_generic_run_threadfn_adapter+0x6d/0xc0 lib/kunit/try-catch.c:28</div><div class='add'>+   kthread+0x721/0x850 kernel/kthread.c:327</div><div class='add'>+   ret_from_fork+0x1f/0x30 ??:?</div><div class='add'>+</div><div class='add'>+  Uninit was stored to memory at:</div><div class='add'>+   do_uninit_local_array+0xfa/0x110 mm/kmsan/kmsan_test.c:260</div><div class='add'>+   test_uninit_kmsan_check_memory+0x1a2/0x380 mm/kmsan/kmsan_test.c:271</div><div class='add'>+   kunit_run_case_internal lib/kunit/test.c:333</div><div class='add'>+   kunit_try_run_case+0x206/0x420 lib/kunit/test.c:374</div><div class='add'>+   kunit_generic_run_threadfn_adapter+0x6d/0xc0 lib/kunit/try-catch.c:28</div><div class='add'>+   kthread+0x721/0x850 kernel/kthread.c:327</div><div class='add'>+   ret_from_fork+0x1f/0x30 ??:?</div><div class='add'>+</div><div class='add'>+  Local variable uninit created at:</div><div class='add'>+   do_uninit_local_array+0x4a/0x110 mm/kmsan/kmsan_test.c:256</div><div class='add'>+   test_uninit_kmsan_check_memory+0x1a2/0x380 mm/kmsan/kmsan_test.c:271</div><div class='add'>+</div><div class='add'>+  Bytes 4-7 of 8 are uninitialized</div><div class='add'>+  Memory access of size 8 starts at ffff888083fe3da0</div><div class='add'>+</div><div class='add'>+  CPU: 0 PID: 6731 Comm: kunit_try_catch Tainted: G    B       E     5.16.0-rc3+ #104</div><div class='add'>+  Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.14.0-2 04/01/2014</div><div class='add'>+  =====================================================</div><div class='add'>+</div><div class='add'>+The report says that the local variable ``uninit`` was created uninitialized in</div><div class='add'>+``do_uninit_local_array()``. The third stack trace corresponds to the place</div><div class='add'>+where this variable was created.</div><div class='add'>+</div><div class='add'>+The first stack trace shows where the uninit value was used (in</div><div class='add'>+``test_uninit_kmsan_check_memory()``). The tool shows the bytes which were left</div><div class='add'>+uninitialized in the local variable, as well as the stack where the value was</div><div class='add'>+copied to another memory location before use.</div><div class='add'>+</div><div class='add'>+A use of uninitialized value ``v`` is reported by KMSAN in the following cases:</div><div class='add'>+</div><div class='add'>+ - in a condition, e.g. ``if (v) { ... }``;</div><div class='add'>+ - in an indexing or pointer dereferencing, e.g. ``array[v]`` or ``*v``;</div><div class='add'>+ - when it is copied to userspace or hardware, e.g. ``copy_to_user(..., &amp;v, ...)``;</div><div class='add'>+ - when it is passed as an argument to a function, and</div><div class='add'>+   ``CONFIG_KMSAN_CHECK_PARAM_RETVAL`` is enabled (see below).</div><div class='add'>+</div><div class='add'>+The mentioned cases (apart from copying data to userspace or hardware, which is</div><div class='add'>+a security issue) are considered undefined behavior from the C11 Standard point</div><div class='add'>+of view.</div><div class='add'>+</div><div class='add'>+Disabling the instrumentation</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+A function can be marked with ``__no_kmsan_checks``. Doing so makes KMSAN</div><div class='add'>+ignore uninitialized values in that function and mark its output as initialized.</div><div class='add'>+As a result, the user will not get KMSAN reports related to that function.</div><div class='add'>+</div><div class='add'>+Another function attribute supported by KMSAN is ``__no_sanitize_memory``.</div><div class='add'>+Applying this attribute to a function will result in KMSAN not instrumenting</div><div class='add'>+it, which can be helpful if we do not want the compiler to interfere with some</div><div class='add'>+low-level code (e.g. that marked with ``noinstr`` which implicitly adds</div><div class='add'>+``__no_sanitize_memory``).</div><div class='add'>+</div><div class='add'>+This however comes at a cost: stack allocations from such functions will have</div><div class='add'>+incorrect shadow/origin values, likely leading to false positives. Functions</div><div class='add'>+called from non-instrumented code may also receive incorrect metadata for their</div><div class='add'>+parameters.</div><div class='add'>+</div><div class='add'>+As a rule of thumb, avoid using ``__no_sanitize_memory`` explicitly.</div><div class='add'>+</div><div class='add'>+It is also possible to disable KMSAN for a single file (e.g. main.o)::</div><div class='add'>+</div><div class='add'>+  KMSAN_SANITIZE_main.o := n</div><div class='add'>+</div><div class='add'>+or for the whole directory::</div><div class='add'>+</div><div class='add'>+  KMSAN_SANITIZE := n</div><div class='add'>+</div><div class='add'>+in the Makefile. Think of this as applying ``__no_sanitize_memory`` to every</div><div class='add'>+function in the file or directory. Most users won't need KMSAN_SANITIZE, unless</div><div class='add'>+their code gets broken by KMSAN (e.g. runs at early boot time).</div><div class='add'>+</div><div class='add'>+Support</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+In order for KMSAN to work the kernel must be built with Clang, which so far is</div><div class='add'>+the only compiler that has KMSAN support. The kernel instrumentation pass is</div><div class='add'>+based on the userspace `MemorySanitizer tool`_.</div><div class='add'>+</div><div class='add'>+The runtime library only supports x86_64 at the moment.</div><div class='add'>+</div><div class='add'>+How KMSAN works</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+KMSAN shadow memory</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+KMSAN associates a metadata byte (also called shadow byte) with every byte of</div><div class='add'>+kernel memory. A bit in the shadow byte is set iff the corresponding bit of the</div><div class='add'>+kernel memory byte is uninitialized. Marking the memory uninitialized (i.e.</div><div class='add'>+setting its shadow bytes to ``0xff``) is called poisoning, marking it</div><div class='add'>+initialized (setting the shadow bytes to ``0x00``) is called unpoisoning.</div><div class='add'>+</div><div class='add'>+When a new variable is allocated on the stack, it is poisoned by default by</div><div class='add'>+instrumentation code inserted by the compiler (unless it is a stack variable</div><div class='add'>+that is immediately initialized). Any new heap allocation done without</div><div class='add'>+``__GFP_ZERO`` is also poisoned.</div><div class='add'>+</div><div class='add'>+Compiler instrumentation also tracks the shadow values as they are used along</div><div class='add'>+the code. When needed, instrumentation code invokes the runtime library in</div><div class='add'>+``mm/kmsan/`` to persist shadow values.</div><div class='add'>+</div><div class='add'>+The shadow value of a basic or compound type is an array of bytes of the same</div><div class='add'>+length. When a constant value is written into memory, that memory is unpoisoned.</div><div class='add'>+When a value is read from memory, its shadow memory is also obtained and</div><div class='add'>+propagated into all the operations which use that value. For every instruction</div><div class='add'>+that takes one or more values the compiler generates code that calculates the</div><div class='add'>+shadow of the result depending on those values and their shadows.</div><div class='add'>+</div><div class='add'>+Example::</div><div class='add'>+</div><div class='add'>+  int a = 0xff;  // i.e. 0x000000ff</div><div class='add'>+  int b;</div><div class='add'>+  int c = a | b;</div><div class='add'>+</div><div class='add'>+In this case the shadow of ``a`` is ``0``, shadow of ``b`` is ``0xffffffff``,</div><div class='add'>+shadow of ``c`` is ``0xffffff00``. This means that the upper three bytes of</div><div class='add'>+``c`` are uninitialized, while the lower byte is initialized.</div><div class='add'>+</div><div class='add'>+Origin tracking</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Every four bytes of kernel memory also have a so-called origin mapped to them.</div><div class='add'>+This origin describes the point in program execution at which the uninitialized</div><div class='add'>+value was created. Every origin is associated with either the full allocation</div><div class='add'>+stack (for heap-allocated memory), or the function containing the uninitialized</div><div class='add'>+variable (for locals).</div><div class='add'>+</div><div class='add'>+When an uninitialized variable is allocated on stack or heap, a new origin</div><div class='add'>+value is created, and that variable's origin is filled with that value. When a</div><div class='add'>+value is read from memory, its origin is also read and kept together with the</div><div class='add'>+shadow. For every instruction that takes one or more values, the origin of the</div><div class='add'>+result is one of the origins corresponding to any of the uninitialized inputs.</div><div class='add'>+If a poisoned value is written into memory, its origin is written to the</div><div class='add'>+corresponding storage as well.</div><div class='add'>+</div><div class='add'>+Example 1::</div><div class='add'>+</div><div class='add'>+  int a = 42;</div><div class='add'>+  int b;</div><div class='add'>+  int c = a + b;</div><div class='add'>+</div><div class='add'>+In this case the origin of ``b`` is generated upon function entry, and is</div><div class='add'>+stored to the origin of ``c`` right before the addition result is written into</div><div class='add'>+memory.</div><div class='add'>+</div><div class='add'>+Several variables may share the same origin address, if they are stored in the</div><div class='add'>+same four-byte chunk. In this case every write to either variable updates the</div><div class='add'>+origin for all of them. We have to sacrifice precision in this case, because</div><div class='add'>+storing origins for individual bits (and even bytes) would be too costly.</div><div class='add'>+</div><div class='add'>+Example 2::</div><div class='add'>+</div><div class='add'>+  int combine(short a, short b) {</div><div class='add'>+    union ret_t {</div><div class='add'>+      int i;</div><div class='add'>+      short s[2];</div><div class='add'>+    } ret;</div><div class='add'>+    ret.s[0] = a;</div><div class='add'>+    ret.s[1] = b;</div><div class='add'>+    return ret.i;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+If ``a`` is initialized and ``b`` is not, the shadow of the result would be</div><div class='add'>+0xffff0000, and the origin of the result would be the origin of ``b``.</div><div class='add'>+``ret.s[0]`` would have the same origin, but it will never be used, because</div><div class='add'>+that variable is initialized.</div><div class='add'>+</div><div class='add'>+If both function arguments are uninitialized, only the origin of the second</div><div class='add'>+argument is preserved.</div><div class='add'>+</div><div class='add'>+Origin chaining</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+To ease debugging, KMSAN creates a new origin for every store of an</div><div class='add'>+uninitialized value to memory. The new origin references both its creation stack</div><div class='add'>+and the previous origin the value had. This may cause increased memory</div><div class='add'>+consumption, so we limit the length of origin chains in the runtime.</div><div class='add'>+</div><div class='add'>+Clang instrumentation API</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+Clang instrumentation pass inserts calls to functions defined in</div><div class='add'>+``mm/kmsan/nstrumentation.c`` into the kernel code.</div><div class='add'>+</div><div class='add'>+Shadow manipulation</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+For every memory access the compiler emits a call to a function that returns a</div><div class='add'>+pair of pointers to the shadow and origin addresses of the given memory::</div><div class='add'>+</div><div class='add'>+  typedef struct {</div><div class='add'>+    void *shadow, *origin;</div><div class='add'>+  } shadow_origin_ptr_t</div><div class='add'>+</div><div class='add'>+  shadow_origin_ptr_t __msan_metadata_ptr_for_load_{1,2,4,8}(void *addr)</div><div class='add'>+  shadow_origin_ptr_t __msan_metadata_ptr_for_store_{1,2,4,8}(void *addr)</div><div class='add'>+  shadow_origin_ptr_t __msan_metadata_ptr_for_load_n(void *addr, uintptr_t size)</div><div class='add'>+  shadow_origin_ptr_t __msan_metadata_ptr_for_store_n(void *addr, uintptr_t size)</div><div class='add'>+</div><div class='add'>+The function name depends on the memory access size.</div><div class='add'>+</div><div class='add'>+The compiler makes sure that for every loaded value its shadow and origin</div><div class='add'>+values are read from memory. When a value is stored to memory, its shadow and</div><div class='add'>+origin are also stored using the metadata pointers.</div><div class='add'>+</div><div class='add'>+Handling locals</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+A special function is used to create a new origin value for a local variable and</div><div class='add'>+set the origin of that variable to that value::</div><div class='add'>+</div><div class='add'>+  void __msan_poison_alloca(void *addr, uintptr_t size, char *descr)</div><div class='add'>+</div><div class='add'>+Access to per-task data</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+At the beginning of every instrumented function KMSAN inserts a call to</div><div class='add'>+``__msan_get_context_state()``::</div><div class='add'>+</div><div class='add'>+  kmsan_context_state *__msan_get_context_state(void)</div><div class='add'>+</div><div class='add'>+``kmsan_context_state`` is declared in ``include/linux/kmsan.h``::</div><div class='add'>+</div><div class='add'>+  struct kmsan_context_state {</div><div class='add'>+    char param_tls[KMSAN_PARAM_SIZE];</div><div class='add'>+    char retval_tls[KMSAN_RETVAL_SIZE];</div><div class='add'>+    char va_arg_tls[KMSAN_PARAM_SIZE];</div><div class='add'>+    char va_arg_origin_tls[KMSAN_PARAM_SIZE];</div><div class='add'>+    u64 va_arg_overflow_size_tls;</div><div class='add'>+    char param_origin_tls[KMSAN_PARAM_SIZE];</div><div class='add'>+    depot_stack_handle_t retval_origin_tls;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+This structure is used by KMSAN to pass parameter shadows and origins between</div><div class='add'>+instrumented functions (unless the parameters are checked immediately by</div><div class='add'>+``CONFIG_KMSAN_CHECK_PARAM_RETVAL``).</div><div class='add'>+</div><div class='add'>+Passing uninitialized values to functions</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Clang's MemorySanitizer instrumentation has an option,</div><div class='add'>+``-fsanitize-memory-param-retval``, which makes the compiler check function</div><div class='add'>+parameters passed by value, as well as function return values.</div><div class='add'>+</div><div class='add'>+The option is controlled by ``CONFIG_KMSAN_CHECK_PARAM_RETVAL``, which is</div><div class='add'>+enabled by default to let KMSAN report uninitialized values earlier.</div><div class='add'>+Please refer to the `LKML discussion`_ for more details.</div><div class='add'>+</div><div class='add'>+Because of the way the checks are implemented in LLVM (they are only applied to</div><div class='add'>+parameters marked as ``noundef``), not all parameters are guaranteed to be</div><div class='add'>+checked, so we cannot give up the metadata storage in ``kmsan_context_state``.</div><div class='add'>+</div><div class='add'>+String functions</div><div class='add'>+~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The compiler replaces calls to ``memcpy()``/``memmove()``/``memset()`` with the</div><div class='add'>+following functions. These functions are also called when data structures are</div><div class='add'>+initialized or copied, making sure shadow and origin values are copied alongside</div><div class='add'>+with the data::</div><div class='add'>+</div><div class='add'>+  void *__msan_memcpy(void *dst, void *src, uintptr_t n)</div><div class='add'>+  void *__msan_memmove(void *dst, void *src, uintptr_t n)</div><div class='add'>+  void *__msan_memset(void *dst, int c, uintptr_t n)</div><div class='add'>+</div><div class='add'>+Error reporting</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+For each use of a value the compiler emits a shadow check that calls</div><div class='add'>+``__msan_warning()`` in the case that value is poisoned::</div><div class='add'>+</div><div class='add'>+  void __msan_warning(u32 origin)</div><div class='add'>+</div><div class='add'>+``__msan_warning()`` causes KMSAN runtime to print an error report.</div><div class='add'>+</div><div class='add'>+Inline assembly instrumentation</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+KMSAN instruments every inline assembly output with a call to::</div><div class='add'>+</div><div class='add'>+  void __msan_instrument_asm_store(void *addr, uintptr_t size)</div><div class='add'>+</div><div class='add'>+, which unpoisons the memory region.</div><div class='add'>+</div><div class='add'>+This approach may mask certain errors, but it also helps to avoid a lot of</div><div class='add'>+false positives in bitwise operations, atomics etc.</div><div class='add'>+</div><div class='add'>+Sometimes the pointers passed into inline assembly do not point to valid memory.</div><div class='add'>+In such cases they are ignored at runtime.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Runtime library</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+The code is located in ``mm/kmsan/``.</div><div class='add'>+</div><div class='add'>+Per-task KMSAN state</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Every task_struct has an associated KMSAN task state that holds the KMSAN</div><div class='add'>+context (see above) and a per-task flag disallowing KMSAN reports::</div><div class='add'>+</div><div class='add'>+  struct kmsan_context {</div><div class='add'>+    ...</div><div class='add'>+    bool allow_reporting;</div><div class='add'>+    struct kmsan_context_state cstate;</div><div class='add'>+    ...</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  struct task_struct {</div><div class='add'>+    ...</div><div class='add'>+    struct kmsan_context kmsan;</div><div class='add'>+    ...</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+KMSAN contexts</div><div class='add'>+~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+When running in a kernel task context, KMSAN uses ``current-&gt;kmsan.cstate`` to</div><div class='add'>+hold the metadata for function parameters and return values.</div><div class='add'>+</div><div class='add'>+But in the case the kernel is running in the interrupt, softirq or NMI context,</div><div class='add'>+where ``current`` is unavailable, KMSAN switches to per-cpu interrupt state::</div><div class='add'>+</div><div class='add'>+  DEFINE_PER_CPU(struct kmsan_ctx, kmsan_percpu_ctx);</div><div class='add'>+</div><div class='add'>+Metadata allocation</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+There are several places in the kernel for which the metadata is stored.</div><div class='add'>+</div><div class='add'>+1. Each ``struct page`` instance contains two pointers to its shadow and</div><div class='add'>+origin pages::</div><div class='add'>+</div><div class='add'>+  struct page {</div><div class='add'>+    ...</div><div class='add'>+    struct page *shadow, *origin;</div><div class='add'>+    ...</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+At boot-time, the kernel allocates shadow and origin pages for every available</div><div class='add'>+kernel page. This is done quite late, when the kernel address space is already</div><div class='add'>+fragmented, so normal data pages may arbitrarily interleave with the metadata</div><div class='add'>+pages.</div><div class='add'>+</div><div class='add'>+This means that in general for two contiguous memory pages their shadow/origin</div><div class='add'>+pages may not be contiguous. Consequently, if a memory access crosses the</div><div class='add'>+boundary of a memory block, accesses to shadow/origin memory may potentially</div><div class='add'>+corrupt other pages or read incorrect values from them.</div><div class='add'>+</div><div class='add'>+In practice, contiguous memory pages returned by the same ``alloc_pages()``</div><div class='add'>+call will have contiguous metadata, whereas if these pages belong to two</div><div class='add'>+different allocations their metadata pages can be fragmented.</div><div class='add'>+</div><div class='add'>+For the kernel data (``.data``, ``.bss`` etc.) and percpu memory regions</div><div class='add'>+there also are no guarantees on metadata contiguity.</div><div class='add'>+</div><div class='add'>+In the case ``__msan_metadata_ptr_for_XXX_YYY()`` hits the border between two</div><div class='add'>+pages with non-contiguous metadata, it returns pointers to fake shadow/origin regions::</div><div class='add'>+</div><div class='add'>+  char dummy_load_page[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE)));</div><div class='add'>+  char dummy_store_page[PAGE_SIZE] __attribute__((aligned(PAGE_SIZE)));</div><div class='add'>+</div><div class='add'>+``dummy_load_page`` is zero-initialized, so reads from it always yield zeroes.</div><div class='add'>+All stores to ``dummy_store_page`` are ignored.</div><div class='add'>+</div><div class='add'>+2. For vmalloc memory and modules, there is a direct mapping between the memory</div><div class='add'>+range, its shadow and origin. KMSAN reduces the vmalloc area by 3/4, making only</div><div class='add'>+the first quarter available to ``vmalloc()``. The second quarter of the vmalloc</div><div class='add'>+area contains shadow memory for the first quarter, the third one holds the</div><div class='add'>+origins. A small part of the fourth quarter contains shadow and origins for the</div><div class='add'>+kernel modules. Please refer to ``arch/x86/include/asm/pgtable_64_types.h`` for</div><div class='add'>+more details.</div><div class='add'>+</div><div class='add'>+When an array of pages is mapped into a contiguous virtual memory space, their</div><div class='add'>+shadow and origin pages are similarly mapped into contiguous regions.</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+E. Stepanov, K. Serebryany. `MemorySanitizer: fast detector of uninitialized</div><div class='add'>+memory use in C++</div><div class='add'>+&lt;https://static.googleusercontent.com/media/research.google.com/en//pubs/archive/43308.pdf&gt;`_.</div><div class='add'>+In Proceedings of CGO 2015.</div><div class='add'>+</div><div class='add'>+.. _MemorySanitizer tool: https://clang.llvm.org/docs/MemorySanitizer.html</div><div class='add'>+.. _LLVM documentation: https://llvm.org/docs/GettingStarted.html</div><div class='add'>+.. _LKML discussion: https://lore.kernel.org/all/20220614144853.3693273-1-glider@google.com/</div><div class='head'>diff --git a/Documentation/dev-tools/kselftest.rst b/Documentation/dev-tools/kselftest.rst<br/>index a833ecf12fbc..12b575b76b20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kselftest.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kselftest.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kselftest.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kselftest.rst</a></div><div class='hunk'>@@ -208,6 +208,14 @@ In general, the rules for selftests are</div><div class='ctx'> Contributing new tests (details)</div><div class='ctx'> ================================</div><div class='ctx'> </div><div class='add'>+ * In your Makefile, use facilities from lib.mk by including it instead of</div><div class='add'>+   reinventing the wheel. Specify flags and binaries generation flags on</div><div class='add'>+   need basis before including lib.mk. ::</div><div class='add'>+</div><div class='add'>+    CFLAGS = $(KHDR_INCLUDES)</div><div class='add'>+    TEST_GEN_PROGS := close_range_test</div><div class='add'>+    include ../lib.mk</div><div class='add'>+</div><div class='ctx'>  * Use TEST_GEN_XXX if such binaries or files are generated during</div><div class='ctx'>    compiling.</div><div class='ctx'> </div><div class='hunk'>@@ -230,13 +238,30 @@ Contributing new tests (details)</div><div class='ctx'>  * First use the headers inside the kernel source and/or git repo, and then the</div><div class='ctx'>    system headers.  Headers for the kernel release as opposed to headers</div><div class='ctx'>    installed by the distro on the system should be the primary focus to be able</div><div class='del'>-   to find regressions.</div><div class='add'>+   to find regressions. Use KHDR_INCLUDES in Makefile to include headers from</div><div class='add'>+   the kernel source.</div><div class='ctx'> </div><div class='ctx'>  * If a test needs specific kernel config options enabled, add a config file in</div><div class='ctx'>    the test directory to enable them.</div><div class='ctx'> </div><div class='ctx'>    e.g: tools/testing/selftests/android/config</div><div class='ctx'> </div><div class='add'>+ * Create a .gitignore file inside test directory and add all generated objects</div><div class='add'>+   in it.</div><div class='add'>+</div><div class='add'>+ * Add new test name in TARGETS in selftests/Makefile::</div><div class='add'>+</div><div class='add'>+    TARGETS += android</div><div class='add'>+</div><div class='add'>+ * All changes should pass::</div><div class='add'>+</div><div class='add'>+    kselftest-{all,install,clean,gen_tar}</div><div class='add'>+    kselftest-{all,install,clean,gen_tar} O=abo_path</div><div class='add'>+    kselftest-{all,install,clean,gen_tar} O=rel_path</div><div class='add'>+    make -C tools/testing/selftests {all,install,clean,gen_tar}</div><div class='add'>+    make -C tools/testing/selftests {all,install,clean,gen_tar} O=abs_path</div><div class='add'>+    make -C tools/testing/selftests {all,install,clean,gen_tar} O=rel_path</div><div class='add'>+</div><div class='ctx'> Test Module</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='hunk'>@@ -250,6 +275,14 @@ assist writing kernel modules that are for use with kselftest:</div><div class='ctx'> - ``tools/testing/selftests/kselftest_module.h``</div><div class='ctx'> - ``tools/testing/selftests/kselftest/module.sh``</div><div class='ctx'> </div><div class='add'>+Note that test modules should taint the kernel with TAINT_TEST. This will</div><div class='add'>+happen automatically for modules which are in the ``tools/testing/``</div><div class='add'>+directory, or for modules which use the ``kselftest_module.h`` header above.</div><div class='add'>+Otherwise, you'll need to add ``MODULE_INFO(test, "Y")`` to your module</div><div class='add'>+source. selftests which do not load modules typically should not taint the</div><div class='add'>+kernel, but in cases where a non-test module is loaded, TEST_TAINT can be</div><div class='add'>+applied from userspace by writing to ``/proc/sys/kernel/tainted``.</div><div class='add'>+</div><div class='ctx'> How to use</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='hunk'>@@ -287,7 +320,7 @@ A bare bones test module might look like this:</div><div class='ctx'> </div><div class='ctx'>    #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt</div><div class='ctx'> </div><div class='del'>-   #include "../tools/testing/selftests/kselftest/module.h"</div><div class='add'>+   #include "../tools/testing/selftests/kselftest_module.h"</div><div class='ctx'> </div><div class='ctx'>    KSTM_MODULE_GLOBALS();</div><div class='ctx'> </div><div class='hunk'>@@ -308,6 +341,7 @@ A bare bones test module might look like this:</div><div class='ctx'>    KSTM_MODULE_LOADERS(test_foo);</div><div class='ctx'>    MODULE_AUTHOR("John Developer &lt;jd@fooman.org&gt;");</div><div class='ctx'>    MODULE_LICENSE("GPL");</div><div class='add'>+   MODULE_INFO(test, "Y");</div><div class='ctx'> </div><div class='ctx'> Example test script</div><div class='ctx'> -------------------</div><div class='head'>diff --git a/Documentation/dev-tools/ktap.rst b/Documentation/dev-tools/ktap.rst<br/>index 5ee735c6687f..414c105b10a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/ktap.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/ktap.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/ktap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/ktap.rst</a></div><div class='hunk'>@@ -80,8 +80,8 @@ have the number 1 and the number then must increase by 1 for each additional</div><div class='ctx'> subtest within the same test at the same nesting level.</div><div class='ctx'> </div><div class='ctx'> The description is a description of the test, generally the name of</div><div class='del'>-the test, and can be any string of words (can't include #). The</div><div class='del'>-description is optional, but recommended.</div><div class='add'>+the test, and can be any string of characters other than # or a</div><div class='add'>+newline.  The description is optional, but recommended.</div><div class='ctx'> </div><div class='ctx'> The directive and any diagnostic data is optional. If either are present, they</div><div class='ctx'> must follow a hash sign, "#".</div><div class='hunk'>@@ -115,34 +115,32 @@ The diagnostic data field is optional, and results which have neither a</div><div class='ctx'> directive nor any diagnostic data do not need to include the "#" field</div><div class='ctx'> separator.</div><div class='ctx'> </div><div class='del'>-Example result lines include:</div><div class='del'>-</div><div class='del'>-.. code-block:: none</div><div class='add'>+Example result lines include::</div><div class='ctx'> </div><div class='ctx'> 	ok 1 test_case_name</div><div class='ctx'> </div><div class='ctx'> The test "test_case_name" passed.</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+::</div><div class='ctx'> </div><div class='ctx'> 	not ok 1 test_case_name</div><div class='ctx'> </div><div class='ctx'> The test "test_case_name" failed.</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+::</div><div class='ctx'> </div><div class='ctx'> 	ok 1 test # SKIP necessary dependency unavailable</div><div class='ctx'> </div><div class='ctx'> The test "test" was SKIPPED with the diagnostic message "necessary dependency</div><div class='ctx'> unavailable".</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+::</div><div class='ctx'> </div><div class='ctx'> 	not ok 1 test # TIMEOUT 30 seconds</div><div class='ctx'> </div><div class='ctx'> The test "test" timed out, with diagnostic data "30 seconds".</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+::</div><div class='ctx'> </div><div class='ctx'> 	ok 5 check return code # rcode=0</div><div class='ctx'> </div><div class='hunk'>@@ -202,7 +200,7 @@ allowed to be either indented or not indented.</div><div class='ctx'> </div><div class='ctx'> An example of a test with two nested subtests:</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+::</div><div class='ctx'> </div><div class='ctx'> 	KTAP version 1</div><div class='ctx'> 	1..1</div><div class='hunk'>@@ -215,7 +213,7 @@ An example of a test with two nested subtests:</div><div class='ctx'> </div><div class='ctx'> An example format with multiple levels of nested testing:</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+::</div><div class='ctx'> </div><div class='ctx'> 	KTAP version 1</div><div class='ctx'> 	1..2</div><div class='hunk'>@@ -250,7 +248,7 @@ nested version line, uses a line of the form</div><div class='ctx'> </div><div class='ctx'> Example KTAP output</div><div class='ctx'> --------------------</div><div class='del'>-.. code-block:: none</div><div class='add'>+::</div><div class='ctx'> </div><div class='ctx'> 	KTAP version 1</div><div class='ctx'> 	1..1</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/api/functionredirection.rst b/Documentation/dev-tools/kunit/api/functionredirection.rst<br/>new file mode 100644<br/>index 000000000000..3791efc2fcca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/api/functionredirection.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/api/functionredirection.rst</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+========================</div><div class='add'>+Function Redirection API</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+When writing unit tests, it's important to be able to isolate the code being</div><div class='add'>+tested from other parts of the kernel. This ensures the reliability of the test</div><div class='add'>+(it won't be affected by external factors), reduces dependencies on specific</div><div class='add'>+hardware or config options (making the test easier to run), and protects the</div><div class='add'>+stability of the rest of the system (making it less likely for test-specific</div><div class='add'>+state to interfere with the rest of the system).</div><div class='add'>+</div><div class='add'>+While for some code (typically generic data structures, helpers, and other</div><div class='add'>+"pure functions") this is trivial, for others (like device drivers,</div><div class='add'>+filesystems, core subsystems) the code is heavily coupled with other parts of</div><div class='add'>+the kernel.</div><div class='add'>+</div><div class='add'>+This coupling is often due to global state in some way: be it a global list of</div><div class='add'>+devices, the filesystem, or some hardware state. Tests need to either carefully</div><div class='add'>+manage, isolate, and restore state, or they can avoid it altogether by</div><div class='add'>+replacing access to and mutation of this state with a "fake" or "mock" variant.</div><div class='add'>+</div><div class='add'>+By refactoring access to such state, such as by introducing a layer of</div><div class='add'>+indirection which can use or emulate a separate set of test state. However,</div><div class='add'>+such refactoring comes with its own costs (and undertaking significant</div><div class='add'>+refactoring before being able to write tests is suboptimal).</div><div class='add'>+</div><div class='add'>+A simpler way to intercept and replace some of the function calls is to use</div><div class='add'>+function redirection via static stubs.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Static Stubs</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+Static stubs are a way of redirecting calls to one function (the "real"</div><div class='add'>+function) to another function (the "replacement" function).</div><div class='add'>+</div><div class='add'>+It works by adding a macro to the "real" function which checks to see if a test</div><div class='add'>+is running, and if a replacement function is available. If so, that function is</div><div class='add'>+called in place of the original.</div><div class='add'>+</div><div class='add'>+Using static stubs is pretty straightforward:</div><div class='add'>+</div><div class='add'>+1. Add the KUNIT_STATIC_STUB_REDIRECT() macro to the start of the "real"</div><div class='add'>+   function.</div><div class='add'>+</div><div class='add'>+   This should be the first statement in the function, after any variable</div><div class='add'>+   declarations. KUNIT_STATIC_STUB_REDIRECT() takes the name of the</div><div class='add'>+   function, followed by all of the arguments passed to the real function.</div><div class='add'>+</div><div class='add'>+   For example:</div><div class='add'>+</div><div class='add'>+   .. code-block:: c</div><div class='add'>+</div><div class='add'>+	void send_data_to_hardware(const char *str)</div><div class='add'>+	{</div><div class='add'>+		KUNIT_STATIC_STUB_REDIRECT(send_data_to_hardware, str);</div><div class='add'>+		/* real implementation */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+2. Write one or more replacement functions.</div><div class='add'>+</div><div class='add'>+   These functions should have the same function signature as the real function.</div><div class='add'>+   In the event they need to access or modify test-specific state, they can use</div><div class='add'>+   kunit_get_current_test() to get a struct kunit pointer. This can then</div><div class='add'>+   be passed to the expectation/assertion macros, or used to look up KUnit</div><div class='add'>+   resources.</div><div class='add'>+</div><div class='add'>+   For example:</div><div class='add'>+</div><div class='add'>+   .. code-block:: c</div><div class='add'>+</div><div class='add'>+	void fake_send_data_to_hardware(const char *str)</div><div class='add'>+	{</div><div class='add'>+		struct kunit *test = kunit_get_current_test();</div><div class='add'>+		KUNIT_EXPECT_STREQ(test, str, "Hello World!");</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+3. Activate the static stub from your test.</div><div class='add'>+</div><div class='add'>+   From within a test, the redirection can be enabled with</div><div class='add'>+   kunit_activate_static_stub(), which accepts a struct kunit pointer,</div><div class='add'>+   the real function, and the replacement function. You can call this several</div><div class='add'>+   times with different replacement functions to swap out implementations of the</div><div class='add'>+   function.</div><div class='add'>+</div><div class='add'>+   In our example, this would be</div><div class='add'>+</div><div class='add'>+   .. code-block:: c</div><div class='add'>+</div><div class='add'>+	kunit_activate_static_stub(test,</div><div class='add'>+				   send_data_to_hardware,</div><div class='add'>+				   fake_send_data_to_hardware);</div><div class='add'>+</div><div class='add'>+4. Call (perhaps indirectly) the real function.</div><div class='add'>+</div><div class='add'>+   Once the redirection is activated, any call to the real function will call</div><div class='add'>+   the replacement function instead. Such calls may be buried deep in the</div><div class='add'>+   implementation of another function, but must occur from the test's kthread.</div><div class='add'>+</div><div class='add'>+   For example:</div><div class='add'>+</div><div class='add'>+   .. code-block:: c</div><div class='add'>+</div><div class='add'>+	send_data_to_hardware("Hello World!"); /* Succeeds */</div><div class='add'>+	send_data_to_hardware("Something else"); /* Fails the test. */</div><div class='add'>+</div><div class='add'>+5. (Optionally) disable the stub.</div><div class='add'>+</div><div class='add'>+   When you no longer need it, disable the redirection (and hence resume the</div><div class='add'>+   original behaviour of the 'real' function) using</div><div class='add'>+   kunit_deactivate_static_stub(). Otherwise, it will be automatically disabled</div><div class='add'>+   when the test exits.</div><div class='add'>+</div><div class='add'>+   For example:</div><div class='add'>+</div><div class='add'>+   .. code-block:: c</div><div class='add'>+</div><div class='add'>+	kunit_deactivate_static_stub(test, send_data_to_hardware);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+It's also possible to use these replacement functions to test to see if a</div><div class='add'>+function is called at all, for example:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	void send_data_to_hardware(const char *str)</div><div class='add'>+	{</div><div class='add'>+		KUNIT_STATIC_STUB_REDIRECT(send_data_to_hardware, str);</div><div class='add'>+		/* real implementation */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	/* In test file */</div><div class='add'>+	int times_called = 0;</div><div class='add'>+	void fake_send_data_to_hardware(const char *str)</div><div class='add'>+	{</div><div class='add'>+		times_called++;</div><div class='add'>+	}</div><div class='add'>+	...</div><div class='add'>+	/* In the test case, redirect calls for the duration of the test */</div><div class='add'>+	kunit_activate_static_stub(test, send_data_to_hardware, fake_send_data_to_hardware);</div><div class='add'>+</div><div class='add'>+	send_data_to_hardware("hello");</div><div class='add'>+	KUNIT_EXPECT_EQ(test, times_called, 1);</div><div class='add'>+</div><div class='add'>+	/* Can also deactivate the stub early, if wanted */</div><div class='add'>+	kunit_deactivate_static_stub(test, send_data_to_hardware);</div><div class='add'>+</div><div class='add'>+	send_data_to_hardware("hello again");</div><div class='add'>+	KUNIT_EXPECT_EQ(test, times_called, 1);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+API Reference</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/kunit/static_stub.h</div><div class='add'>+   :internal:</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/api/index.rst b/Documentation/dev-tools/kunit/api/index.rst<br/>index 3006cadcf44a..2d8f756aab56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/api/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/api/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/api/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/api/index.rst</a></div><div class='hunk'>@@ -4,12 +4,24 @@</div><div class='ctx'> API Reference</div><div class='ctx'> =============</div><div class='ctx'> .. toctree::</div><div class='add'>+	:hidden:</div><div class='ctx'> </div><div class='ctx'> 	test</div><div class='add'>+	resource</div><div class='add'>+	functionredirection</div><div class='ctx'> </div><div class='del'>-This section documents the KUnit kernel testing API. It is divided into the</div><div class='add'>+</div><div class='add'>+This page documents the KUnit kernel testing API. It is divided into the</div><div class='ctx'> following sections:</div><div class='ctx'> </div><div class='ctx'> Documentation/dev-tools/kunit/api/test.rst</div><div class='ctx'> </div><div class='del'>- - documents all of the standard testing API</div><div class='add'>+ - Documents all of the standard testing API</div><div class='add'>+</div><div class='add'>+Documentation/dev-tools/kunit/api/resource.rst</div><div class='add'>+</div><div class='add'>+ - Documents the KUnit resource API</div><div class='add'>+</div><div class='add'>+Documentation/dev-tools/kunit/api/functionredirection.rst</div><div class='add'>+</div><div class='add'>+ - Documents the KUnit Function Redirection API</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/api/resource.rst b/Documentation/dev-tools/kunit/api/resource.rst<br/>new file mode 100644<br/>index 000000000000..0a94f831259e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/api/resource.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/api/resource.rst</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+============</div><div class='add'>+Resource API</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+This file documents the KUnit resource API.</div><div class='add'>+</div><div class='add'>+Most users won't need to use this API directly, power users can use it to store</div><div class='add'>+state on a per-test basis, register custom cleanup actions, and more.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/kunit/resource.h</div><div class='add'>+   :internal:</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/architecture.rst b/Documentation/dev-tools/kunit/architecture.rst<br/>index ff9c85a0bff2..e95ab05342bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/architecture.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/architecture.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/architecture.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/architecture.rst</a></div><div class='hunk'>@@ -4,16 +4,17 @@</div><div class='ctx'> KUnit Architecture</div><div class='ctx'> ==================</div><div class='ctx'> </div><div class='del'>-The KUnit architecture can be divided into two parts:</div><div class='add'>+The KUnit architecture is divided into two parts:</div><div class='ctx'> </div><div class='del'>-- Kernel testing library</div><div class='del'>-- kunit_tool (Command line test harness)</div><div class='add'>+- `In-Kernel Testing Framework`_</div><div class='add'>+- `kunit_tool (Command-line Test Harness)`_</div><div class='ctx'> </div><div class='ctx'> In-Kernel Testing Framework</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='ctx'> The kernel testing library supports KUnit tests written in C using</div><div class='del'>-KUnit. KUnit tests are kernel code. KUnit does several things:</div><div class='add'>+KUnit. These KUnit tests are kernel code. KUnit performs the following</div><div class='add'>+tasks:</div><div class='ctx'> </div><div class='ctx'> - Organizes tests</div><div class='ctx'> - Reports test results</div><div class='hunk'>@@ -22,19 +23,17 @@ KUnit. KUnit tests are kernel code. KUnit does several things:</div><div class='ctx'> Test Cases</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='del'>-The fundamental unit in KUnit is the test case. The KUnit test cases are</div><div class='del'>-grouped into KUnit suites. A KUnit test case is a function with type</div><div class='del'>-signature ``void (*)(struct kunit *test)``.</div><div class='del'>-These test case functions are wrapped in a struct called</div><div class='del'>-struct kunit_case.</div><div class='add'>+The test case is the fundamental unit in KUnit. KUnit test cases are organised</div><div class='add'>+into suites. A KUnit test case is a function with type signature</div><div class='add'>+``void (*)(struct kunit *test)``. These test case functions are wrapped in a</div><div class='add'>+struct called struct kunit_case.</div><div class='ctx'> </div><div class='ctx'> .. note:</div><div class='ctx'> 	``generate_params`` is optional for non-parameterized tests.</div><div class='ctx'> </div><div class='del'>-Each KUnit test case gets a ``struct kunit`` context</div><div class='del'>-object passed to it that tracks a running test. The KUnit assertion</div><div class='del'>-macros and other KUnit utilities use the ``struct kunit`` context</div><div class='del'>-object. As an exception, there are two fields:</div><div class='add'>+Each KUnit test case receives a ``struct kunit`` context object that tracks a</div><div class='add'>+running test. The KUnit assertion macros and other KUnit utilities use the</div><div class='add'>+``struct kunit`` context object. As an exception, there are two fields:</div><div class='ctx'> </div><div class='ctx'> - ``-&gt;priv``: The setup functions can use it to store arbitrary test</div><div class='ctx'>   user data.</div><div class='hunk'>@@ -77,12 +76,13 @@ Executor</div><div class='ctx'> </div><div class='ctx'> The KUnit executor can list and run built-in KUnit tests on boot.</div><div class='ctx'> The Test suites are stored in a linker section</div><div class='del'>-called ``.kunit_test_suites``. For code, see:</div><div class='del'>-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/asm-generic/vmlinux.lds.h?h=v5.15#n945.</div><div class='add'>+called ``.kunit_test_suites``. For the code, see ``KUNIT_TABLE()`` macro</div><div class='add'>+definition in</div><div class='add'>+`include/asm-generic/vmlinux.lds.h &lt;https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/asm-generic/vmlinux.lds.h?h=v6.0#n950&gt;`_.</div><div class='ctx'> The linker section consists of an array of pointers to</div><div class='ctx'> ``struct kunit_suite``, and is populated by the ``kunit_test_suites()``</div><div class='del'>-macro. To run all tests compiled into the kernel, the KUnit executor</div><div class='del'>-iterates over the linker section array.</div><div class='add'>+macro. The KUnit executor iterates over the linker section array in order to</div><div class='add'>+run all the tests that are compiled into the kernel.</div><div class='ctx'> </div><div class='ctx'> .. kernel-figure:: kunit_suitememorydiagram.svg</div><div class='ctx'> 	:alt:	KUnit Suite Memory</div><div class='hunk'>@@ -90,17 +90,17 @@ iterates over the linker section array.</div><div class='ctx'> 	KUnit Suite Memory Diagram</div><div class='ctx'> </div><div class='ctx'> On the kernel boot, the KUnit executor uses the start and end addresses</div><div class='del'>-of this section to iterate over and run all tests. For code, see:</div><div class='del'>-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/lib/kunit/executor.c</div><div class='del'>-</div><div class='add'>+of this section to iterate over and run all tests. For the implementation of the</div><div class='add'>+executor, see</div><div class='add'>+`lib/kunit/executor.c &lt;https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/lib/kunit/executor.c&gt;`_.</div><div class='ctx'> When built as a module, the ``kunit_test_suites()`` macro defines a</div><div class='ctx'> ``module_init()`` function, which runs all the tests in the compilation</div><div class='ctx'> unit instead of utilizing the executor.</div><div class='ctx'> </div><div class='ctx'> In KUnit tests, some error classes do not affect other tests</div><div class='ctx'> or parts of the kernel, each KUnit case executes in a separate thread</div><div class='del'>-context. For code, see:</div><div class='del'>-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/lib/kunit/try-catch.c?h=v5.15#n58</div><div class='add'>+context. See the ``kunit_try_catch_run()`` function in</div><div class='add'>+`lib/kunit/try-catch.c &lt;https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/lib/kunit/try-catch.c?h=v5.15#n58&gt;`_.</div><div class='ctx'> </div><div class='ctx'> Assertion Macros</div><div class='ctx'> ----------------</div><div class='hunk'>@@ -111,37 +111,36 @@ All expectations/assertions are formatted as:</div><div class='ctx'> </div><div class='ctx'> - ``{EXPECT|ASSERT}`` determines whether the check is an assertion or an</div><div class='ctx'>   expectation.</div><div class='add'>+  In the event of a failure, the testing flow differs as follows:</div><div class='ctx'> </div><div class='del'>-	- For an expectation, if the check fails, marks the test as failed</div><div class='del'>-	  and logs the failure.</div><div class='add'>+	- For expectations, the test is marked as failed and the failure is logged.</div><div class='ctx'> </div><div class='del'>-	- An assertion, on failure, causes the test case to terminate</div><div class='del'>-	  immediately.</div><div class='add'>+	- Failing assertions, on the other hand, result in the test case being</div><div class='add'>+	  terminated immediately.</div><div class='ctx'> </div><div class='del'>-		- Assertions call function:</div><div class='add'>+		- Assertions call the function:</div><div class='ctx'> 		  ``void __noreturn kunit_abort(struct kunit *)``.</div><div class='ctx'> </div><div class='del'>-		- ``kunit_abort`` calls function:</div><div class='add'>+		- ``kunit_abort`` calls the function:</div><div class='ctx'> 		  ``void __noreturn kunit_try_catch_throw(struct kunit_try_catch *try_catch)``.</div><div class='ctx'> </div><div class='del'>-		- ``kunit_try_catch_throw`` calls function:</div><div class='del'>-		  ``void complete_and_exit(struct completion *, long) __noreturn;``</div><div class='add'>+		- ``kunit_try_catch_throw`` calls the function:</div><div class='add'>+		  ``void kthread_complete_and_exit(struct completion *, long) __noreturn;``</div><div class='ctx'> 		  and terminates the special thread context.</div><div class='ctx'> </div><div class='ctx'> - ``&lt;op&gt;`` denotes a check with options: ``TRUE`` (supplied property</div><div class='del'>-  has the boolean value “true”), ``EQ`` (two supplied properties are</div><div class='add'>+  has the boolean value "true"), ``EQ`` (two supplied properties are</div><div class='ctx'>   equal), ``NOT_ERR_OR_NULL`` (supplied pointer is not null and does not</div><div class='del'>-  contain an “err” value).</div><div class='add'>+  contain an "err" value).</div><div class='ctx'> </div><div class='ctx'> - ``[_MSG]`` prints a custom message on failure.</div><div class='ctx'> </div><div class='ctx'> Test Result Reporting</div><div class='ctx'> ---------------------</div><div class='del'>-KUnit prints test results in KTAP format. KTAP is based on TAP14, see:</div><div class='del'>-https://github.com/isaacs/testanything.github.io/blob/tap14/tap-version-14-specification.md.</div><div class='del'>-KTAP (yet to be standardized format) works with KUnit and Kselftest.</div><div class='del'>-The KUnit executor prints KTAP results to dmesg, and debugfs</div><div class='del'>-(if configured).</div><div class='add'>+KUnit prints the test results in KTAP format. KTAP is based on TAP14, see</div><div class='add'>+Documentation/dev-tools/ktap.rst.</div><div class='add'>+KTAP works with KUnit and Kselftest. The KUnit executor prints KTAP results to</div><div class='add'>+dmesg, and debugfs (if configured).</div><div class='ctx'> </div><div class='ctx'> Parameterized Tests</div><div class='ctx'> -------------------</div><div class='hunk'>@@ -150,33 +149,35 @@ Each KUnit parameterized test is associated with a collection of</div><div class='ctx'> parameters. The test is invoked multiple times, once for each parameter</div><div class='ctx'> value and the parameter is stored in the ``param_value`` field.</div><div class='ctx'> The test case includes a KUNIT_CASE_PARAM() macro that accepts a</div><div class='del'>-generator function.</div><div class='del'>-The generator function is passed the previous parameter and returns the next</div><div class='del'>-parameter. It also provides a macro to generate common-case generators based on</div><div class='del'>-arrays.</div><div class='add'>+generator function. The generator function is passed the previous parameter</div><div class='add'>+and returns the next parameter. It also includes a macro for generating</div><div class='add'>+array-based common-case generators.</div><div class='ctx'> </div><div class='del'>-kunit_tool (Command Line Test Harness)</div><div class='add'>+kunit_tool (Command-line Test Harness)</div><div class='ctx'> ======================================</div><div class='ctx'> </div><div class='del'>-kunit_tool is a Python script ``(tools/testing/kunit/kunit.py)``</div><div class='del'>-that can be used to configure, build, exec, parse and run (runs other</div><div class='del'>-commands in order) test results. You can either run KUnit tests using</div><div class='del'>-kunit_tool or can include KUnit in kernel and parse manually.</div><div class='add'>+``kunit_tool`` is a Python script, found in ``tools/testing/kunit/kunit.py``. It</div><div class='add'>+is used to configure, build, execute, parse test results and run all of the</div><div class='add'>+previous commands in correct order (i.e., configure, build, execute and parse).</div><div class='add'>+You have two options for running KUnit tests: either build the kernel with KUnit</div><div class='add'>+enabled and manually parse the results (see</div><div class='add'>+Documentation/dev-tools/kunit/run_manual.rst) or use ``kunit_tool``</div><div class='add'>+(see Documentation/dev-tools/kunit/run_wrapper.rst).</div><div class='ctx'> </div><div class='ctx'> - ``configure`` command generates the kernel ``.config`` from a</div><div class='ctx'>   ``.kunitconfig`` file (and any architecture-specific options).</div><div class='del'>-  For some architectures, additional config options are specified in the</div><div class='del'>-  ``qemu_config`` Python script</div><div class='del'>-  (For example: ``tools/testing/kunit/qemu_configs/powerpc.py``).</div><div class='add'>+  The Python scripts available in ``qemu_configs`` folder</div><div class='add'>+  (for example, ``tools/testing/kunit/qemu configs/powerpc.py``) contains</div><div class='add'>+  additional configuration options for specific architectures.</div><div class='ctx'>   It parses both the existing ``.config`` and the ``.kunitconfig`` files</div><div class='del'>-  and ensures that ``.config`` is a superset of ``.kunitconfig``.</div><div class='del'>-  If this is not the case, it will combine the two and run</div><div class='del'>-  ``make olddefconfig`` to regenerate the ``.config`` file. It then</div><div class='del'>-  verifies that ``.config`` is now a superset. This checks if all</div><div class='del'>-  Kconfig dependencies are correctly specified in ``.kunitconfig``.</div><div class='del'>-  ``kunit_config.py`` includes the parsing Kconfigs code. The code which</div><div class='del'>-  runs ``make olddefconfig`` is a part of ``kunit_kernel.py``. You can</div><div class='del'>-  invoke this command via: ``./tools/testing/kunit/kunit.py config`` and</div><div class='add'>+  to ensure that ``.config`` is a superset of ``.kunitconfig``.</div><div class='add'>+  If not, it will combine the two and run ``make olddefconfig`` to regenerate</div><div class='add'>+  the ``.config`` file. It then checks to see if ``.config`` has become a superset.</div><div class='add'>+  This verifies that all the Kconfig dependencies are correctly specified in the</div><div class='add'>+  file ``.kunitconfig``. The ``kunit_config.py`` script contains the code for parsing</div><div class='add'>+  Kconfigs. The code which runs ``make olddefconfig`` is part of the</div><div class='add'>+  ``kunit_kernel.py`` script. You can invoke this command through:</div><div class='add'>+  ``./tools/testing/kunit/kunit.py config`` and</div><div class='ctx'>   generate a ``.config`` file.</div><div class='ctx'> - ``build`` runs ``make`` on the kernel tree with required options</div><div class='ctx'>   (depends on the architecture and some options, for example: build_dir)</div><div class='hunk'>@@ -184,8 +185,8 @@ kunit_tool or can include KUnit in kernel and parse manually.</div><div class='ctx'>   To build a KUnit kernel from the current ``.config``, you can use the</div><div class='ctx'>   ``build`` argument: ``./tools/testing/kunit/kunit.py build``.</div><div class='ctx'> - ``exec`` command executes kernel results either directly (using</div><div class='del'>-  User-mode Linux configuration), or via an emulator such</div><div class='del'>-  as QEMU. It reads results from the log via standard</div><div class='add'>+  User-mode Linux configuration), or through an emulator such</div><div class='add'>+  as QEMU. It reads results from the log using standard</div><div class='ctx'>   output (stdout), and passes them to ``parse`` to be parsed.</div><div class='ctx'>   If you already have built a kernel with built-in KUnit tests,</div><div class='ctx'>   you can run the kernel and display the test results with the ``exec``</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/faq.rst b/Documentation/dev-tools/kunit/faq.rst<br/>index 172e239791a8..fae426f2634a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/faq.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/faq.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/faq.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/faq.rst</a></div><div class='hunk'>@@ -31,13 +31,16 @@ For the most part, the KUnit core framework (what we use to write the tests)</div><div class='ctx'> can compile to any architecture. It compiles like just another part of the</div><div class='ctx'> kernel and runs when the kernel boots, or when built as a module, when the</div><div class='ctx'> module is loaded.  However, there is infrastructure, like the KUnit Wrapper</div><div class='del'>-(``tools/testing/kunit/kunit.py``) that does not support other architectures.</div><div class='add'>+(``tools/testing/kunit/kunit.py``) that might not support some architectures</div><div class='add'>+(see :ref:`kunit-on-qemu`).</div><div class='ctx'> </div><div class='ctx'> In short, yes, you can run KUnit on other architectures, but it might require</div><div class='ctx'> more work than using KUnit on UML.</div><div class='ctx'> </div><div class='ctx'> For more information, see :ref:`kunit-on-non-uml`.</div><div class='ctx'> </div><div class='add'>+.. _kinds-of-tests:</div><div class='add'>+</div><div class='ctx'> What is the difference between a unit test and other kinds of tests?</div><div class='ctx'> ====================================================================</div><div class='ctx'> Most existing tests for the Linux kernel would be categorized as an integration</div><div class='hunk'>@@ -95,8 +98,7 @@ things to try.</div><div class='ctx'>    seeing. When tests are built-in, they will execute when the kernel boots, and</div><div class='ctx'>    modules will automatically execute associated tests when loaded. Test results</div><div class='ctx'>    can be collected from ``/sys/kernel/debug/kunit/&lt;test suite&gt;/results``, and</div><div class='del'>-   can be parsed with ``kunit.py parse``. For more details, see "KUnit on</div><div class='del'>-   non-UML architectures" in Documentation/dev-tools/kunit/usage.rst.</div><div class='add'>+   can be parsed with ``kunit.py parse``. For more details, see :ref:`kunit-on-qemu`.</div><div class='ctx'> </div><div class='ctx'> If none of the above tricks help, you are always welcome to email any issues to</div><div class='ctx'> kunit-dev@googlegroups.com.</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/index.rst b/Documentation/dev-tools/kunit/index.rst<br/>index 595205348d2d..b3593ae29ace 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/index.rst</a></div><div class='hunk'>@@ -13,11 +13,9 @@ KUnit - Linux Kernel Unit Testing</div><div class='ctx'> 	run_wrapper</div><div class='ctx'> 	run_manual</div><div class='ctx'> 	usage</div><div class='del'>-	kunit-tool</div><div class='ctx'> 	api/index</div><div class='ctx'> 	style</div><div class='ctx'> 	faq</div><div class='del'>-	tips</div><div class='ctx'> 	running_tips</div><div class='ctx'> </div><div class='ctx'> This section details the kernel unit testing framework.</div><div class='hunk'>@@ -29,10 +27,10 @@ KUnit (Kernel unit testing framework) provides a common framework for</div><div class='ctx'> unit tests within the Linux kernel. Using KUnit, you can define groups</div><div class='ctx'> of test cases called test suites. The tests either run on kernel boot</div><div class='ctx'> if built-in, or load as a module. KUnit automatically flags and reports</div><div class='del'>-failed test cases in the kernel log. The test results appear in `TAP</div><div class='del'>-(Test Anything Protocol) format &lt;https://testanything.org/&gt;`_. It is inspired by</div><div class='del'>-JUnit, Python’s unittest.mock, and GoogleTest/GoogleMock (C++ unit testing</div><div class='del'>-framework).</div><div class='add'>+failed test cases in the kernel log. The test results appear in</div><div class='add'>+:doc:`KTAP (Kernel - Test Anything Protocol) format&lt;/dev-tools/ktap&gt;`.</div><div class='add'>+It is inspired by JUnit, Python’s unittest.mock, and GoogleTest/GoogleMock</div><div class='add'>+(C++ unit testing framework).</div><div class='ctx'> </div><div class='ctx'> KUnit tests are part of the kernel, written in the C (programming)</div><div class='ctx'> language, and test parts of the Kernel implementation (example: a C</div><div class='hunk'>@@ -46,8 +44,9 @@ internal system functionality. KUnit runs in kernel space and is not</div><div class='ctx'> restricted to things exposed to user-space.</div><div class='ctx'> </div><div class='ctx'> In addition, KUnit has kunit_tool, a script (``tools/testing/kunit/kunit.py``)</div><div class='del'>-that configures the Linux kernel, runs KUnit tests under QEMU or UML (`User Mode</div><div class='del'>-Linux &lt;http://user-mode-linux.sourceforge.net/&gt;`_), parses the test results and</div><div class='add'>+that configures the Linux kernel, runs KUnit tests under QEMU or UML</div><div class='add'>+(:doc:`User Mode Linux &lt;/virt/uml/user_mode_linux_howto_v2&gt;`),</div><div class='add'>+parses the test results and</div><div class='ctx'> displays them in a user friendly manner.</div><div class='ctx'> </div><div class='ctx'> Features</div><div class='hunk'>@@ -95,19 +94,16 @@ Unit Testing Advantages</div><div class='ctx'> - Improves code quality.</div><div class='ctx'> - Encourages writing testable code.</div><div class='ctx'> </div><div class='add'>+Read also :ref:`kinds-of-tests`.</div><div class='add'>+</div><div class='ctx'> How do I use it?</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='del'>-*   Documentation/dev-tools/kunit/start.rst - for KUnit new users.</div><div class='del'>-*   Documentation/dev-tools/kunit/architecture.rst - KUnit architecture.</div><div class='del'>-*   Documentation/dev-tools/kunit/run_wrapper.rst - run kunit_tool.</div><div class='del'>-*   Documentation/dev-tools/kunit/run_manual.rst - run tests without kunit_tool.</div><div class='del'>-*   Documentation/dev-tools/kunit/usage.rst - write tests.</div><div class='del'>-*   Documentation/dev-tools/kunit/tips.rst - best practices with</div><div class='del'>-    examples.</div><div class='del'>-*   Documentation/dev-tools/kunit/api/index.rst - KUnit APIs</div><div class='del'>-    used for testing.</div><div class='del'>-*   Documentation/dev-tools/kunit/kunit-tool.rst - kunit_tool helper</div><div class='del'>-    script.</div><div class='del'>-*   Documentation/dev-tools/kunit/faq.rst - KUnit common questions and</div><div class='del'>-    answers.</div><div class='add'>+You can find a step-by-step guide to writing and running KUnit tests in</div><div class='add'>+Documentation/dev-tools/kunit/start.rst</div><div class='add'>+</div><div class='add'>+Alternatively, feel free to look through the rest of the KUnit documentation,</div><div class='add'>+or to experiment with tools/testing/kunit/kunit.py and the example test under</div><div class='add'>+lib/kunit/kunit-example-test.c</div><div class='add'>+</div><div class='add'>+Happy testing!</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/kunit-tool.rst b/Documentation/dev-tools/kunit/kunit-tool.rst<br/>deleted file mode 100644<br/>index ae52e0f489f9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/kunit-tool.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/kunit-tool.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,232 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-=================</div><div class='del'>-kunit_tool How-To</div><div class='del'>-=================</div><div class='del'>-</div><div class='del'>-What is kunit_tool?</div><div class='del'>-===================</div><div class='del'>-</div><div class='del'>-kunit_tool is a script (``tools/testing/kunit/kunit.py``) that aids in building</div><div class='del'>-the Linux kernel as UML (`User Mode Linux</div><div class='del'>-&lt;http://user-mode-linux.sourceforge.net/&gt;`_), running KUnit tests, parsing</div><div class='del'>-the test results and displaying them in a user friendly manner.</div><div class='del'>-</div><div class='del'>-kunit_tool addresses the problem of being able to run tests without needing a</div><div class='del'>-virtual machine or actual hardware with User Mode Linux. User Mode Linux is a</div><div class='del'>-Linux architecture, like ARM or x86; however, unlike other architectures it</div><div class='del'>-compiles the kernel as a standalone Linux executable that can be run like any</div><div class='del'>-other program directly inside of a host operating system. To be clear, it does</div><div class='del'>-not require any virtualization support: it is just a regular program.</div><div class='del'>-</div><div class='del'>-What is a .kunitconfig?</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-It's just a defconfig that kunit_tool looks for in the build directory</div><div class='del'>-(``.kunit`` by default).  kunit_tool uses it to generate a .config as you might</div><div class='del'>-expect. In addition, it verifies that the generated .config contains the CONFIG</div><div class='del'>-options in the .kunitconfig; the reason it does this is so that it is easy to</div><div class='del'>-be sure that a CONFIG that enables a test actually ends up in the .config.</div><div class='del'>-</div><div class='del'>-It's also possible to pass a separate .kunitconfig fragment to kunit_tool,</div><div class='del'>-which is useful if you have several different groups of tests you wish</div><div class='del'>-to run independently, or if you want to use pre-defined test configs for</div><div class='del'>-certain subsystems.</div><div class='del'>-</div><div class='del'>-Getting Started with kunit_tool</div><div class='del'>-===============================</div><div class='del'>-</div><div class='del'>-If a kunitconfig is present at the root directory, all you have to do is:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run</div><div class='del'>-</div><div class='del'>-However, you most likely want to use it with the following options:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run --timeout=30 --jobs=`nproc --all`</div><div class='del'>-</div><div class='del'>-- ``--timeout`` sets a maximum amount of time to allow tests to run.</div><div class='del'>-- ``--jobs`` sets the number of threads to use to build the kernel.</div><div class='del'>-</div><div class='del'>-.. note::</div><div class='del'>-	This command will work even without a .kunitconfig file: if no</div><div class='del'>-	.kunitconfig is present, a default one will be used instead.</div><div class='del'>-</div><div class='del'>-If you wish to use a different .kunitconfig file (such as one provided for</div><div class='del'>-testing a particular subsystem), you can pass it as an option.</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run --kunitconfig=fs/ext4/.kunitconfig</div><div class='del'>-</div><div class='del'>-For a list of all the flags supported by kunit_tool, you can run:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run --help</div><div class='del'>-</div><div class='del'>-Configuring, Building, and Running Tests</div><div class='del'>-========================================</div><div class='del'>-</div><div class='del'>-It's also possible to run just parts of the KUnit build process independently,</div><div class='del'>-which is useful if you want to make manual changes to part of the process.</div><div class='del'>-</div><div class='del'>-A .config can be generated from a .kunitconfig by using the ``config`` argument</div><div class='del'>-when running kunit_tool:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py config</div><div class='del'>-</div><div class='del'>-Similarly, if you just want to build a KUnit kernel from the current .config,</div><div class='del'>-you can use the ``build`` argument:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py build</div><div class='del'>-</div><div class='del'>-And, if you already have a built UML kernel with built-in KUnit tests, you can</div><div class='del'>-run the kernel and display the test results with the ``exec`` argument:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py exec</div><div class='del'>-</div><div class='del'>-The ``run`` command which is discussed above is equivalent to running all three</div><div class='del'>-of these in sequence.</div><div class='del'>-</div><div class='del'>-All of these commands accept a number of optional command-line arguments. The</div><div class='del'>-``--help`` flag will give a complete list of these, or keep reading this page</div><div class='del'>-for a guide to some of the more useful ones.</div><div class='del'>-</div><div class='del'>-Parsing Test Results</div><div class='del'>-====================</div><div class='del'>-</div><div class='del'>-KUnit tests output their results in TAP (Test Anything Protocol) format.</div><div class='del'>-kunit_tool will, when running tests, parse this output and print a summary</div><div class='del'>-which is much more pleasant to read. If you wish to look at the raw test</div><div class='del'>-results in TAP format, you can pass the ``--raw_output`` argument.</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run --raw_output</div><div class='del'>-</div><div class='del'>-The raw output from test runs may contain other, non-KUnit kernel log</div><div class='del'>-lines. You can see just KUnit output with ``--raw_output=kunit``:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run --raw_output=kunit</div><div class='del'>-</div><div class='del'>-If you have KUnit results in their raw TAP format, you can parse them and print</div><div class='del'>-the human-readable summary with the ``parse`` command for kunit_tool. This</div><div class='del'>-accepts a filename for an argument, or will read from standard input.</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	# Reading from a file</div><div class='del'>-	./tools/testing/kunit/kunit.py parse /var/log/dmesg</div><div class='del'>-	# Reading from stdin</div><div class='del'>-	dmesg | ./tools/testing/kunit/kunit.py parse</div><div class='del'>-</div><div class='del'>-This is very useful if you wish to run tests in a configuration not supported</div><div class='del'>-by kunit_tool (such as on real hardware, or an unsupported architecture).</div><div class='del'>-</div><div class='del'>-Filtering Tests</div><div class='del'>-===============</div><div class='del'>-</div><div class='del'>-It's possible to run only a subset of the tests built into a kernel by passing</div><div class='del'>-a filter to the ``exec`` or ``run`` commands. For example, if you only wanted</div><div class='del'>-to run KUnit resource tests, you could use:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run 'kunit-resource*'</div><div class='del'>-</div><div class='del'>-This uses the standard glob format for wildcards.</div><div class='del'>-</div><div class='del'>-Running Tests on QEMU</div><div class='del'>-=====================</div><div class='del'>-</div><div class='del'>-kunit_tool supports running tests on QEMU as well as via UML (as mentioned</div><div class='del'>-elsewhere). The default way of running tests on QEMU requires two flags:</div><div class='del'>-</div><div class='del'>-``--arch``</div><div class='del'>-	Selects a collection of configs (Kconfig as well as QEMU configs</div><div class='del'>-	options, etc) that allow KUnit tests to be run on the specified</div><div class='del'>-	architecture in a minimal way; this is usually not much slower than</div><div class='del'>-	using UML. The architecture argument is the same as the name of the</div><div class='del'>-	option passed to the ``ARCH`` variable used by Kbuild. Not all</div><div class='del'>-	architectures are currently supported by this flag, but can be handled</div><div class='del'>-	by the ``--qemu_config`` discussed later. If ``um`` is passed (or this</div><div class='del'>-	this flag is ignored) the tests will run via UML. Non-UML architectures,</div><div class='del'>-	e.g. i386, x86_64, arm, um, etc. Non-UML run on QEMU.</div><div class='del'>-</div><div class='del'>-``--cross_compile``</div><div class='del'>-	Specifies the use of a toolchain by Kbuild. The argument passed here is</div><div class='del'>-	the same passed to the ``CROSS_COMPILE`` variable used by Kbuild. As a</div><div class='del'>-	reminder this will be the prefix for the toolchain binaries such as gcc</div><div class='del'>-	for example ``sparc64-linux-gnu-`` if you have the sparc toolchain</div><div class='del'>-	installed on your system, or</div><div class='del'>-	``$HOME/toolchains/microblaze/gcc-9.2.0-nolibc/microblaze-linux/bin/microblaze-linux-``</div><div class='del'>-	if you have downloaded the microblaze toolchain from the 0-day website</div><div class='del'>-	to a directory in your home directory called ``toolchains``.</div><div class='del'>-</div><div class='del'>-In many cases it is likely that you may want to run an architecture which is</div><div class='del'>-not supported by the ``--arch`` flag, or you may want to just run KUnit tests</div><div class='del'>-on QEMU using a non-default configuration. For this use case, you can write</div><div class='del'>-your own QemuConfig. These QemuConfigs are written in Python. They must have an</div><div class='del'>-import line ``from ..qemu_config import QemuArchParams`` at the top of the file</div><div class='del'>-and the file must contain a variable called ``QEMU_ARCH`` that has an instance</div><div class='del'>-of ``QemuArchParams`` assigned to it. An example can be seen in</div><div class='del'>-``tools/testing/kunit/qemu_configs/x86_64.py``.</div><div class='del'>-</div><div class='del'>-Once you have a QemuConfig you can pass it into kunit_tool using the</div><div class='del'>-``--qemu_config`` flag; when used this flag replaces the ``--arch`` flag. If we</div><div class='del'>-were to do this with the ``x86_64.py`` example from above, the invocation would</div><div class='del'>-look something like this:</div><div class='del'>-</div><div class='del'>-.. code-block:: bash</div><div class='del'>-</div><div class='del'>-	./tools/testing/kunit/kunit.py run \</div><div class='del'>-		--timeout=60 \</div><div class='del'>-		--jobs=12 \</div><div class='del'>-		--qemu_config=./tools/testing/kunit/qemu_configs/x86_64.py</div><div class='del'>-</div><div class='del'>-Other Useful Options</div><div class='del'>-====================</div><div class='del'>-</div><div class='del'>-kunit_tool has a number of other command-line arguments which can be useful</div><div class='del'>-when adapting it to fit your environment or needs.</div><div class='del'>-</div><div class='del'>-Some of the more useful ones are:</div><div class='del'>-</div><div class='del'>-``--help``</div><div class='del'>-	Lists all of the available options. Note that different commands</div><div class='del'>-	(``config``, ``build``, ``run``, etc) will have different supported</div><div class='del'>-	options. Place ``--help`` before the command to list common options,</div><div class='del'>-	and after the command for options specific to that command.</div><div class='del'>-</div><div class='del'>-``--build_dir``</div><div class='del'>-	Specifies the build directory that kunit_tool will use. This is where</div><div class='del'>-	the .kunitconfig file is located, as well as where the .config and</div><div class='del'>-	compiled kernel will be placed. Defaults to ``.kunit``.</div><div class='del'>-</div><div class='del'>-``--make_options``</div><div class='del'>-	Specifies additional options to pass to ``make`` when compiling a</div><div class='del'>-	kernel (with the ``build`` or ``run`` commands). For example, to enable</div><div class='del'>-	compiler warnings, you can pass ``--make_options W=1``.</div><div class='del'>-</div><div class='del'>-``--alltests``</div><div class='del'>-        Builds a UML kernel with all config options enabled using ``make</div><div class='del'>-        allyesconfig``. This allows you to run as many tests as is possible,</div><div class='del'>-        but is very slow and prone to breakage as new options are added or</div><div class='del'>-        modified. In most cases, enabling all tests which have satisfied</div><div class='del'>-        dependencies by adding ``CONFIG_KUNIT_ALL_TESTS=1`` to your</div><div class='del'>-        .kunitconfig is preferable.</div><div class='del'>-</div><div class='del'>-There are several other options (and new ones are often added), so do check</div><div class='del'>-``--help`` if you're looking for something not mentioned here.</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/run_wrapper.rst b/Documentation/dev-tools/kunit/run_wrapper.rst<br/>index 653985ce9cae..dafe8eb28d30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/run_wrapper.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/run_wrapper.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/run_wrapper.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/run_wrapper.rst</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-=========================</div><div class='del'>-Run Tests with kunit_tool</div><div class='del'>-=========================</div><div class='add'>+=============================</div><div class='add'>+Running tests with kunit_tool</div><div class='add'>+=============================</div><div class='ctx'> </div><div class='ctx'> We can either run KUnit tests using kunit_tool or can run tests</div><div class='ctx'> manually, and then use kunit_tool to parse the results. To run tests</div><div class='hunk'>@@ -22,7 +22,7 @@ We should see the following:</div><div class='ctx'> </div><div class='ctx'> .. code-block::</div><div class='ctx'> </div><div class='del'>-	Generating .config...</div><div class='add'>+	Configuring KUnit Kernel ...</div><div class='ctx'> 	Building KUnit kernel...</div><div class='ctx'> 	Starting KUnit kernel...</div><div class='ctx'> </div><div class='hunk'>@@ -30,7 +30,7 @@ We may want to use the following options:</div><div class='ctx'> </div><div class='ctx'> .. code-block::</div><div class='ctx'> </div><div class='del'>-	./tools/testing/kunit/kunit.py run --timeout=30 --jobs=`nproc --all</div><div class='add'>+	./tools/testing/kunit/kunit.py run --timeout=30 --jobs=`nproc --all`</div><div class='ctx'> </div><div class='ctx'> - ``--timeout`` sets a maximum amount of time for tests to run.</div><div class='ctx'> - ``--jobs`` sets the number of threads to build the kernel.</div><div class='hunk'>@@ -58,8 +58,8 @@ To view kunit_tool flags (optional command-line arguments), run:</div><div class='ctx'> </div><div class='ctx'> 	./tools/testing/kunit/kunit.py run --help</div><div class='ctx'> </div><div class='del'>-Create a  ``.kunitconfig`` File</div><div class='del'>-===============================</div><div class='add'>+Creating a ``.kunitconfig`` file</div><div class='add'>+================================</div><div class='ctx'> </div><div class='ctx'> If we want to run a specific set of tests (rather than those listed</div><div class='ctx'> in the KUnit ``defconfig``), we can provide Kconfig options in the</div><div class='hunk'>@@ -98,8 +98,8 @@ have not included the options dependencies.</div><div class='ctx'>    The build dir needs to be set for ``make menuconfig`` to</div><div class='ctx'>    work, therefore  by default use ``make O=.kunit menuconfig``.</div><div class='ctx'> </div><div class='del'>-Configure, Build, and Run Tests</div><div class='del'>-===============================</div><div class='add'>+Configuring, building, and running tests</div><div class='add'>+========================================</div><div class='ctx'> </div><div class='ctx'> If we want to make manual changes to the KUnit build process, we</div><div class='ctx'> can run part of the KUnit build process independently.</div><div class='hunk'>@@ -125,11 +125,11 @@ argument:</div><div class='ctx'> </div><div class='ctx'> 	./tools/testing/kunit/kunit.py exec</div><div class='ctx'> </div><div class='del'>-The ``run`` command discussed in section: **Run Tests with kunit_tool**,</div><div class='add'>+The ``run`` command discussed in section: **Running tests with kunit_tool**,</div><div class='ctx'> is equivalent to running the above three commands in sequence.</div><div class='ctx'> </div><div class='del'>-Parse Test Results</div><div class='del'>-==================</div><div class='add'>+Parsing test results</div><div class='add'>+====================</div><div class='ctx'> </div><div class='ctx'> KUnit tests output displays results in TAP (Test Anything Protocol)</div><div class='ctx'> format. When running tests, kunit_tool parses this output and prints</div><div class='hunk'>@@ -152,8 +152,8 @@ standard input.</div><div class='ctx'> 	# Reading from stdin</div><div class='ctx'> 	dmesg | ./tools/testing/kunit/kunit.py parse</div><div class='ctx'> </div><div class='del'>-Run Selected Test Suites</div><div class='del'>-========================</div><div class='add'>+Filtering tests</div><div class='add'>+===============</div><div class='ctx'> </div><div class='ctx'> By passing a bash style glob filter to the ``exec`` or ``run``</div><div class='ctx'> commands, we can run a subset of the tests built into a kernel . For</div><div class='hunk'>@@ -165,8 +165,10 @@ example: if we only want to run KUnit resource tests, use:</div><div class='ctx'> </div><div class='ctx'> This uses the standard glob format with wildcard characters.</div><div class='ctx'> </div><div class='del'>-Run Tests on qemu</div><div class='del'>-=================</div><div class='add'>+.. _kunit-on-qemu:</div><div class='add'>+</div><div class='add'>+Running tests on QEMU</div><div class='add'>+=====================</div><div class='ctx'> </div><div class='ctx'> kunit_tool supports running tests on  qemu as well as</div><div class='ctx'> via UML. To run tests on qemu, by default it requires two flags:</div><div class='hunk'>@@ -192,6 +194,21 @@ via UML. To run tests on qemu, by default it requires two flags:</div><div class='ctx'>     if we have downloaded the microblaze toolchain from the 0-day</div><div class='ctx'>     website to a directory in our home directory called toolchains.</div><div class='ctx'> </div><div class='add'>+This means that for most architectures, running under qemu is as simple as:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+	./tools/testing/kunit/kunit.py run --arch=x86_64</div><div class='add'>+</div><div class='add'>+When cross-compiling, we'll likely need to specify a different toolchain, for</div><div class='add'>+example:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+	./tools/testing/kunit/kunit.py run \</div><div class='add'>+		--arch=s390 \</div><div class='add'>+		--cross_compile=s390x-linux-gnu-</div><div class='add'>+</div><div class='ctx'> If we want to run KUnit tests on an architecture not supported by</div><div class='ctx'> the ``--arch`` flag, or want to run KUnit tests on qemu using a</div><div class='ctx'> non-default configuration; then we can write our own``QemuConfig``.</div><div class='hunk'>@@ -214,14 +231,11 @@ as</div><div class='ctx'> 		--jobs=12 \</div><div class='ctx'> 		--qemu_config=./tools/testing/kunit/qemu_configs/x86_64.py</div><div class='ctx'> </div><div class='del'>-To run existing KUnit tests on non-UML architectures, see:</div><div class='del'>-Documentation/dev-tools/kunit/non_uml.rst.</div><div class='del'>-</div><div class='del'>-Command-Line Arguments</div><div class='del'>-======================</div><div class='add'>+Running command-line arguments</div><div class='add'>+==============================</div><div class='ctx'> </div><div class='ctx'> kunit_tool has a number of other command-line arguments which can</div><div class='del'>-be useful for our test environment. Below the most commonly used</div><div class='add'>+be useful for our test environment. Below are the most commonly used</div><div class='ctx'> command line arguments:</div><div class='ctx'> </div><div class='ctx'> - ``--help``: Lists all available options. To list common options,</div><div class='hunk'>@@ -237,11 +251,73 @@ command line arguments:</div><div class='ctx'>   compiling a kernel (using ``build`` or ``run`` commands). For example:</div><div class='ctx'>   to enable compiler warnings, we can pass ``--make_options W=1``.</div><div class='ctx'> </div><div class='del'>-- ``--alltests``: Builds a UML kernel with all config options enabled</div><div class='del'>-  using ``make allyesconfig``. This allows us to run as many tests as</div><div class='del'>-  possible.</div><div class='add'>+- ``--alltests``: Enable a predefined set of options in order to build</div><div class='add'>+  as many tests as possible.</div><div class='add'>+</div><div class='add'>+  .. note:: The list of enabled options can be found in</div><div class='add'>+            ``tools/testing/kunit/configs/all_tests.config``.</div><div class='add'>+</div><div class='add'>+            If you only want to enable all tests with otherwise satisfied</div><div class='add'>+            dependencies, instead add ``CONFIG_KUNIT_ALL_TESTS=y`` to your</div><div class='add'>+            ``.kunitconfig``.</div><div class='add'>+</div><div class='add'>+- ``--kunitconfig``: Specifies the path or the directory of the ``.kunitconfig``</div><div class='add'>+  file. For example:</div><div class='add'>+</div><div class='add'>+  - ``lib/kunit/.kunitconfig`` can be the path of the file.</div><div class='add'>+</div><div class='add'>+  - ``lib/kunit`` can be the directory in which the file is located.</div><div class='add'>+</div><div class='add'>+  This file is used to build and run with a predefined set of tests</div><div class='add'>+  and their dependencies. For example, to run tests for a given subsystem.</div><div class='add'>+</div><div class='add'>+- ``--kconfig_add``: Specifies additional configuration options to be</div><div class='add'>+  appended to the ``.kunitconfig`` file. For example:</div><div class='add'>+</div><div class='add'>+  .. code-block::</div><div class='add'>+</div><div class='add'>+	./tools/testing/kunit/kunit.py run --kconfig_add CONFIG_KASAN=y</div><div class='add'>+</div><div class='add'>+- ``--arch``: Runs tests on the specified architecture. The architecture</div><div class='add'>+  argument is same as the Kbuild ARCH environment variable.</div><div class='add'>+  For example, i386, x86_64, arm, um, etc. Non-UML architectures run on qemu.</div><div class='add'>+  Default is `um`.</div><div class='add'>+</div><div class='add'>+- ``--cross_compile``: Specifies the Kbuild toolchain. It passes the</div><div class='add'>+  same argument as passed to the ``CROSS_COMPILE`` variable used by</div><div class='add'>+  Kbuild. This will be the prefix for the toolchain</div><div class='add'>+  binaries such as GCC. For example:</div><div class='add'>+</div><div class='add'>+  - ``sparc64-linux-gnu-`` if we have the sparc toolchain installed on</div><div class='add'>+    our system.</div><div class='add'>+</div><div class='add'>+  - ``$HOME/toolchains/microblaze/gcc-9.2.0-nolibc/microblaze-linux/bin/microblaze-linux``</div><div class='add'>+    if we have downloaded the microblaze toolchain from the 0-day</div><div class='add'>+    website to a specified path in our home directory called toolchains.</div><div class='add'>+</div><div class='add'>+- ``--qemu_config``: Specifies the path to a file containing a</div><div class='add'>+  custom qemu architecture definition. This should be a python file</div><div class='add'>+  containing a `QemuArchParams` object.</div><div class='add'>+</div><div class='add'>+- ``--qemu_args``: Specifies additional qemu arguments, for example, ``-smp 8``.</div><div class='add'>+</div><div class='add'>+- ``--jobs``: Specifies the number of jobs (commands) to run simultaneously.</div><div class='add'>+  By default, this is set to the number of cores on your system.</div><div class='add'>+</div><div class='add'>+- ``--timeout``: Specifies the maximum number of seconds allowed for all tests to run.</div><div class='add'>+  This does not include the time taken to build the tests.</div><div class='add'>+</div><div class='add'>+- ``--kernel_args``: Specifies additional kernel command-line arguments. May be repeated.</div><div class='add'>+</div><div class='add'>+- ``--run_isolated``: If set, boots the kernel for each individual suite/test.</div><div class='add'>+  This is useful for debugging a non-hermetic test, one that</div><div class='add'>+  might pass/fail based on what ran before it.</div><div class='add'>+</div><div class='add'>+- ``--raw_output``: If set, generates unformatted output from kernel. Possible options are:</div><div class='add'>+</div><div class='add'>+   - ``all``: To view the full kernel output, use ``--raw_output=all``.</div><div class='add'>+</div><div class='add'>+   - ``kunit``: This is the default option and filters to KUnit output. Use ``--raw_output`` or ``--raw_output=kunit``.</div><div class='ctx'> </div><div class='del'>-  .. note:: It is slow and prone to breakage as new options are</div><div class='del'>-            added or modified. Instead, enable all tests</div><div class='del'>-            which have satisfied dependencies by adding</div><div class='del'>-            ``CONFIG_KUNIT_ALL_TESTS=y`` to your ``.kunitconfig``.</div><div class='add'>+- ``--json``: If set, stores the test results in a JSON format and prints to `stdout` or</div><div class='add'>+  saves to a file if a filename is specified.</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/running_tips.rst b/Documentation/dev-tools/kunit/running_tips.rst<br/>index 7b6d26a25959..8e8c493f17d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/running_tips.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/running_tips.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/running_tips.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/running_tips.rst</a></div><div class='hunk'>@@ -15,7 +15,7 @@ It can be handy to create a bash function like:</div><div class='ctx'> .. code-block:: bash</div><div class='ctx'> </div><div class='ctx'> 	function run_kunit() {</div><div class='del'>-	  ( cd "$(git rev-parse --show-toplevel)" &amp;&amp; ./tools/testing/kunit/kunit.py run $@ )</div><div class='add'>+	  ( cd "$(git rev-parse --show-toplevel)" &amp;&amp; ./tools/testing/kunit/kunit.py run "$@" )</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> .. note::</div><div class='hunk'>@@ -114,6 +114,7 @@ Instead of enabling ``CONFIG_GCOV_KERNEL=y``, we can set these options:</div><div class='ctx'> </div><div class='ctx'> 	CONFIG_DEBUG_KERNEL=y</div><div class='ctx'> 	CONFIG_DEBUG_INFO=y</div><div class='add'>+	CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=y</div><div class='ctx'> 	CONFIG_GCOV=y</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -122,8 +123,7 @@ Putting it together into a copy-pastable sequence of commands:</div><div class='ctx'> .. code-block:: bash</div><div class='ctx'> </div><div class='ctx'> 	# Append coverage options to the current config</div><div class='del'>-	$ echo -e "CONFIG_DEBUG_KERNEL=y\nCONFIG_DEBUG_INFO=y\nCONFIG_GCOV=y" &gt;&gt; .kunit/.kunitconfig</div><div class='del'>-	$ ./tools/testing/kunit/kunit.py run</div><div class='add'>+	$ ./tools/testing/kunit/kunit.py run --kunitconfig=.kunit/ --kunitconfig=tools/testing/kunit/configs/coverage_uml.config</div><div class='ctx'> 	# Extract the coverage information from the build dir (.kunit/)</div><div class='ctx'> 	$ lcov -t "my_kunit_tests" -o coverage.info -c -d .kunit/</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/dev-tools/kunit/start.rst b/Documentation/dev-tools/kunit/start.rst<br/>index ad168d16968f..c736613c9b19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/start.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/start.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/start.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/start.rst</a></div><div class='hunk'>@@ -4,6 +4,10 @@</div><div class='ctx'> Getting Started</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='add'>+This page contains an overview of the kunit_tool and KUnit framework,</div><div class='add'>+teaching how to run existing tests and then how to write a simple test case,</div><div class='add'>+and covers common problems users face when using KUnit for the first time.</div><div class='add'>+</div><div class='ctx'> Installing Dependencies</div><div class='ctx'> =======================</div><div class='ctx'> KUnit has the same dependencies as the Linux kernel. As long as you can</div><div class='hunk'>@@ -19,78 +23,127 @@ can run kunit_tool:</div><div class='ctx'> </div><div class='ctx'> 	./tools/testing/kunit/kunit.py run</div><div class='ctx'> </div><div class='del'>-For more information on this wrapper, see:</div><div class='del'>-Documentation/dev-tools/kunit/run_wrapper.rst.</div><div class='add'>+.. note ::</div><div class='add'>+	You may see the following error:</div><div class='add'>+	"The source tree is not clean, please run 'make ARCH=um mrproper'"</div><div class='ctx'> </div><div class='del'>-Creating a ``.kunitconfig``</div><div class='del'>----------------------------</div><div class='add'>+	This happens because internally kunit.py specifies ``.kunit``</div><div class='add'>+	(default option) as the build directory in the command ``make O=output/dir``</div><div class='add'>+	through the argument ``--build_dir``.  Hence, before starting an</div><div class='add'>+	out-of-tree build, the source tree must be clean.</div><div class='ctx'> </div><div class='del'>-By default, kunit_tool runs a selection of tests. However, you can specify which</div><div class='del'>-unit tests to run by creating a ``.kunitconfig`` file with kernel config options</div><div class='del'>-that enable only a specific set of tests and their dependencies.</div><div class='del'>-The ``.kunitconfig`` file contains a list of kconfig options which are required</div><div class='del'>-to run the desired targets. The ``.kunitconfig`` also contains any other test</div><div class='del'>-specific config options, such as test dependencies. For example: the</div><div class='del'>-``FAT_FS`` tests - ``FAT_KUNIT_TEST``, depends on</div><div class='del'>-``FAT_FS``. ``FAT_FS`` can be enabled by selecting either ``MSDOS_FS``</div><div class='del'>-or ``VFAT_FS``. To run ``FAT_KUNIT_TEST``, the ``.kunitconfig`` has:</div><div class='add'>+	There is also the same caveat mentioned in the "Build directory for</div><div class='add'>+	the kernel" section of the :doc:`admin-guide &lt;/admin-guide/README&gt;`,</div><div class='add'>+	that is, its use, it must be used for all invocations of ``make``.</div><div class='add'>+	The good news is that it can indeed be solved by running</div><div class='add'>+	``make ARCH=um mrproper``, just be aware that this will delete the</div><div class='add'>+	current configuration and all generated files.</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+If everything worked correctly, you should see the following:</div><div class='add'>+</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+	Configuring KUnit Kernel ...</div><div class='add'>+	Building KUnit Kernel ...</div><div class='add'>+	Starting KUnit Kernel ...</div><div class='add'>+</div><div class='add'>+The tests will pass or fail.</div><div class='add'>+</div><div class='add'>+.. note ::</div><div class='add'>+   Because it is building a lot of sources for the first time,</div><div class='add'>+   the ``Building KUnit Kernel`` step may take a while.</div><div class='add'>+</div><div class='add'>+For detailed information on this wrapper, see:</div><div class='add'>+Documentation/dev-tools/kunit/run_wrapper.rst.</div><div class='add'>+</div><div class='add'>+Selecting which tests to run</div><div class='add'>+----------------------------</div><div class='ctx'> </div><div class='del'>-	CONFIG_KUNIT=y</div><div class='del'>-	CONFIG_MSDOS_FS=y</div><div class='del'>-	CONFIG_FAT_KUNIT_TEST=y</div><div class='add'>+By default, kunit_tool runs all tests reachable with minimal configuration,</div><div class='add'>+that is, using default values for most of the kconfig options.  However,</div><div class='add'>+you can select which tests to run by:</div><div class='ctx'> </div><div class='del'>-1. A good starting point for the ``.kunitconfig``, is the KUnit default</div><div class='del'>-   config. Run the command:</div><div class='add'>+- `Customizing Kconfig`_ used to compile the kernel, or</div><div class='add'>+- `Filtering tests by name`_ to select specifically which compiled tests to run.</div><div class='add'>+</div><div class='add'>+Customizing Kconfig</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='add'>+A good starting point for the ``.kunitconfig`` is the KUnit default config.</div><div class='add'>+If you didn't run ``kunit.py run`` yet, you can generate it by running:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: bash</div><div class='ctx'> </div><div class='ctx'> 	cd $PATH_TO_LINUX_REPO</div><div class='del'>-	cp tools/testing/kunit/configs/default.config .kunitconfig</div><div class='add'>+	tools/testing/kunit/kunit.py config</div><div class='add'>+	cat .kunit/.kunitconfig</div><div class='ctx'> </div><div class='ctx'> .. note ::</div><div class='add'>+   ``.kunitconfig`` lives in the ``--build_dir`` used by kunit.py, which is</div><div class='add'>+   ``.kunit`` by default.</div><div class='add'>+</div><div class='add'>+Before running the tests, kunit_tool ensures that all config options</div><div class='add'>+set in ``.kunitconfig`` are set in the kernel ``.config``. It will warn</div><div class='add'>+you if you have not included dependencies for the options used.</div><div class='add'>+</div><div class='add'>+There are many ways to customize the configurations:</div><div class='add'>+</div><div class='add'>+a. Edit ``.kunit/.kunitconfig``. The file should contain the list of kconfig</div><div class='add'>+   options required to run the desired tests, including their dependencies.</div><div class='ctx'>    You may want to remove CONFIG_KUNIT_ALL_TESTS from the ``.kunitconfig`` as</div><div class='ctx'>    it will enable a number of additional tests that you may not want.</div><div class='add'>+   If you need to run on an architecture other than UML see :ref:`kunit-on-qemu`.</div><div class='ctx'> </div><div class='del'>-2. You can then add any other Kconfig options, for example:</div><div class='add'>+b. Enable additional kconfig options on top of ``.kunit/.kunitconfig``.</div><div class='add'>+   For example, to include the kernel's linked-list test you can run::</div><div class='ctx'> </div><div class='del'>-.. code-block:: none</div><div class='add'>+	./tools/testing/kunit/kunit.py run \</div><div class='add'>+		--kconfig_add CONFIG_LIST_KUNIT_TEST=y</div><div class='ctx'> </div><div class='del'>-	CONFIG_LIST_KUNIT_TEST=y</div><div class='add'>+c. Provide the path of one or more .kunitconfig files from the tree.</div><div class='add'>+   For example, to run only ``FAT_FS`` and ``EXT4`` tests you can run::</div><div class='ctx'> </div><div class='del'>-Before running the tests, kunit_tool ensures that all config options</div><div class='del'>-set in ``.kunitconfig`` are set in the kernel ``.config``. It will warn</div><div class='del'>-you if you have not included dependencies for the options used.</div><div class='add'>+	./tools/testing/kunit/kunit.py run \</div><div class='add'>+		--kunitconfig ./fs/fat/.kunitconfig \</div><div class='add'>+		--kunitconfig ./fs/ext4/.kunitconfig</div><div class='ctx'> </div><div class='del'>-.. note ::</div><div class='del'>-   If you change the ``.kunitconfig``, kunit.py will trigger a rebuild of the</div><div class='add'>+d. If you change the ``.kunitconfig``, kunit.py will trigger a rebuild of the</div><div class='ctx'>    ``.config`` file. But you can edit the ``.config`` file directly or with</div><div class='ctx'>    tools like ``make menuconfig O=.kunit``. As long as its a superset of</div><div class='ctx'>    ``.kunitconfig``, kunit.py won't overwrite your changes.</div><div class='ctx'> </div><div class='del'>-Running Tests (KUnit Wrapper)</div><div class='del'>------------------------------</div><div class='del'>-1. To make sure that everything is set up correctly, invoke the Python</div><div class='del'>-   wrapper from your kernel repository:</div><div class='ctx'> </div><div class='del'>-.. code-block:: bash</div><div class='add'>+.. note ::</div><div class='ctx'> </div><div class='del'>-	./tools/testing/kunit/kunit.py run</div><div class='add'>+	To save a .kunitconfig after finding a satisfactory configuration::</div><div class='ctx'> </div><div class='del'>-If everything worked correctly, you should see the following:</div><div class='add'>+		make savedefconfig O=.kunit</div><div class='add'>+		cp .kunit/defconfig .kunit/.kunitconfig</div><div class='ctx'> </div><div class='del'>-.. code-block::</div><div class='add'>+Filtering tests by name</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+If you want to be more specific than Kconfig can provide, it is also possible</div><div class='add'>+to select which tests to execute at boot-time by passing a glob filter</div><div class='add'>+(read instructions regarding the pattern in the manpage :manpage:`glob(7)`).</div><div class='add'>+If there is a ``"."`` (period) in the filter, it will be interpreted as a</div><div class='add'>+separator between the name of the test suite and the test case,</div><div class='add'>+otherwise, it will be interpreted as the name of the test suite.</div><div class='add'>+For example, let's assume we are using the default config:</div><div class='ctx'> </div><div class='del'>-	Generating .config ...</div><div class='del'>-	Building KUnit Kernel ...</div><div class='del'>-	Starting KUnit Kernel ...</div><div class='add'>+a. inform the name of a test suite, like ``"kunit_executor_test"``,</div><div class='add'>+   to run every test case it contains::</div><div class='ctx'> </div><div class='del'>-The tests will pass or fail.</div><div class='add'>+	./tools/testing/kunit/kunit.py run "kunit_executor_test"</div><div class='ctx'> </div><div class='del'>-.. note ::</div><div class='del'>-   Because it is building a lot of sources for the first time, the</div><div class='del'>-   ``Building KUnit kernel`` may take a while.</div><div class='add'>+b. inform the name of a test case prefixed by its test suite,</div><div class='add'>+   like ``"example.example_simple_test"``, to run specifically that test case::</div><div class='add'>+</div><div class='add'>+	./tools/testing/kunit/kunit.py run "example.example_simple_test"</div><div class='add'>+</div><div class='add'>+c. use wildcard characters (``*?[``) to run any test case that matches the pattern,</div><div class='add'>+   like ``"*.*64*"`` to run test cases containing ``"64"`` in the name inside</div><div class='add'>+   any test suite::</div><div class='add'>+</div><div class='add'>+	./tools/testing/kunit/kunit.py run "*.*64*"</div><div class='ctx'> </div><div class='ctx'> Running Tests without the KUnit Wrapper</div><div class='ctx'> =======================================</div><div class='hunk'>@@ -212,7 +265,7 @@ Now we are ready to write the test cases.</div><div class='ctx'> </div><div class='ctx'> 	obj-$(CONFIG_MISC_EXAMPLE_TEST) += example_test.o</div><div class='ctx'> </div><div class='del'>-4. Add the following lines to ``.kunitconfig``:</div><div class='add'>+4. Add the following lines to ``.kunit/.kunitconfig``:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: none</div><div class='ctx'> </div><div class='hunk'>@@ -241,15 +294,11 @@ Congrats! You just wrote your first KUnit test.</div><div class='ctx'> Next Steps</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='del'>-*   Documentation/dev-tools/kunit/architecture.rst - KUnit architecture.</div><div class='del'>-*   Documentation/dev-tools/kunit/run_wrapper.rst - run kunit_tool.</div><div class='del'>-*   Documentation/dev-tools/kunit/run_manual.rst - run tests without kunit_tool.</div><div class='del'>-*   Documentation/dev-tools/kunit/usage.rst - write tests.</div><div class='del'>-*   Documentation/dev-tools/kunit/tips.rst - best practices with</div><div class='del'>-    examples.</div><div class='del'>-*   Documentation/dev-tools/kunit/api/index.rst - KUnit APIs</div><div class='del'>-    used for testing.</div><div class='del'>-*   Documentation/dev-tools/kunit/kunit-tool.rst - kunit_tool helper</div><div class='del'>-    script.</div><div class='del'>-*   Documentation/dev-tools/kunit/faq.rst - KUnit common questions and</div><div class='del'>-    answers.</div><div class='add'>+If you're interested in using some of the more advanced features of kunit.py,</div><div class='add'>+take a look at Documentation/dev-tools/kunit/run_wrapper.rst</div><div class='add'>+</div><div class='add'>+If you'd like to run tests without using kunit.py, check out</div><div class='add'>+Documentation/dev-tools/kunit/run_manual.rst</div><div class='add'>+</div><div class='add'>+For more information on writing KUnit tests (including some common techniques</div><div class='add'>+for testing different things), see Documentation/dev-tools/kunit/usage.rst</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/tips.rst b/Documentation/dev-tools/kunit/tips.rst<br/>deleted file mode 100644<br/>index 492d2ded2f5a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/tips.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/tips.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,190 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-============================</div><div class='del'>-Tips For Writing KUnit Tests</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-Exiting early on failed expectations</div><div class='del'>-------------------------------------</div><div class='del'>-</div><div class='del'>-``KUNIT_EXPECT_EQ`` and friends will mark the test as failed and continue</div><div class='del'>-execution.  In some cases, it's unsafe to continue and you can use the</div><div class='del'>-``KUNIT_ASSERT`` variant to exit on failure.</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	void example_test_user_alloc_function(struct kunit *test)</div><div class='del'>-	{</div><div class='del'>-		void *object = alloc_some_object_for_me();</div><div class='del'>-</div><div class='del'>-		/* Make sure we got a valid pointer back. */</div><div class='del'>-		KUNIT_ASSERT_NOT_ERR_OR_NULL(test, object);</div><div class='del'>-		do_something_with_object(object);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-Allocating memory</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-Where you would use ``kzalloc``, you should prefer ``kunit_kzalloc`` instead.</div><div class='del'>-KUnit will ensure the memory is freed once the test completes.</div><div class='del'>-</div><div class='del'>-This is particularly useful since it lets you use the ``KUNIT_ASSERT_EQ``</div><div class='del'>-macros to exit early from a test without having to worry about remembering to</div><div class='del'>-call ``kfree``.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	void example_test_allocation(struct kunit *test)</div><div class='del'>-	{</div><div class='del'>-		char *buffer = kunit_kzalloc(test, 16, GFP_KERNEL);</div><div class='del'>-		/* Ensure allocation succeeded. */</div><div class='del'>-		KUNIT_ASSERT_NOT_ERR_OR_NULL(test, buffer);</div><div class='del'>-</div><div class='del'>-		KUNIT_ASSERT_STREQ(test, buffer, "");</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Testing static functions</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>-If you don't want to expose functions or variables just for testing, one option</div><div class='del'>-is to conditionally ``#include`` the test file at the end of your .c file, e.g.</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	/* In my_file.c */</div><div class='del'>-</div><div class='del'>-	static int do_interesting_thing();</div><div class='del'>-</div><div class='del'>-	#ifdef CONFIG_MY_KUNIT_TEST</div><div class='del'>-	#include "my_kunit_test.c"</div><div class='del'>-	#endif</div><div class='del'>-</div><div class='del'>-Injecting test-only code</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>-Similarly to the above, it can be useful to add test-specific logic.</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	/* In my_file.h */</div><div class='del'>-</div><div class='del'>-	#ifdef CONFIG_MY_KUNIT_TEST</div><div class='del'>-	/* Defined in my_kunit_test.c */</div><div class='del'>-	void test_only_hook(void);</div><div class='del'>-	#else</div><div class='del'>-	void test_only_hook(void) { }</div><div class='del'>-	#endif</div><div class='del'>-</div><div class='del'>-This test-only code can be made more useful by accessing the current kunit</div><div class='del'>-test, see below.</div><div class='del'>-</div><div class='del'>-Accessing the current test</div><div class='del'>---------------------------</div><div class='del'>-</div><div class='del'>-In some cases, you need to call test-only code from outside the test file, e.g.</div><div class='del'>-like in the example above or if you're providing a fake implementation of an</div><div class='del'>-ops struct.</div><div class='del'>-There is a ``kunit_test`` field in ``task_struct``, so you can access it via</div><div class='del'>-``current-&gt;kunit_test``.</div><div class='del'>-</div><div class='del'>-Here's a slightly in-depth example of how one could implement "mocking":</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	#include &lt;linux/sched.h&gt; /* for current */</div><div class='del'>-</div><div class='del'>-	struct test_data {</div><div class='del'>-		int foo_result;</div><div class='del'>-		int want_foo_called_with;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	static int fake_foo(int arg)</div><div class='del'>-	{</div><div class='del'>-		struct kunit *test = current-&gt;kunit_test;</div><div class='del'>-		struct test_data *test_data = test-&gt;priv;</div><div class='del'>-</div><div class='del'>-		KUNIT_EXPECT_EQ(test, test_data-&gt;want_foo_called_with, arg);</div><div class='del'>-		return test_data-&gt;foo_result;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	static void example_simple_test(struct kunit *test)</div><div class='del'>-	{</div><div class='del'>-		/* Assume priv is allocated in the suite's .init */</div><div class='del'>-		struct test_data *test_data = test-&gt;priv;</div><div class='del'>-</div><div class='del'>-		test_data-&gt;foo_result = 42;</div><div class='del'>-		test_data-&gt;want_foo_called_with = 1;</div><div class='del'>-</div><div class='del'>-		/* In a real test, we'd probably pass a pointer to fake_foo somewhere</div><div class='del'>-		 * like an ops struct, etc. instead of calling it directly. */</div><div class='del'>-		KUNIT_EXPECT_EQ(test, fake_foo(1), 42);</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Note: here we're able to get away with using ``test-&gt;priv``, but if you wanted</div><div class='del'>-something more flexible you could use a named ``kunit_resource``, see</div><div class='del'>-Documentation/dev-tools/kunit/api/test.rst.</div><div class='del'>-</div><div class='del'>-Failing the current test</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>-But sometimes, you might just want to fail the current test. In that case, we</div><div class='del'>-have ``kunit_fail_current_test(fmt, args...)`` which is defined in ``&lt;kunit/test-bug.h&gt;`` and</div><div class='del'>-doesn't require pulling in ``&lt;kunit/test.h&gt;``.</div><div class='del'>-</div><div class='del'>-E.g. say we had an option to enable some extra debug checks on some data structure:</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	#include &lt;kunit/test-bug.h&gt;</div><div class='del'>-</div><div class='del'>-	#ifdef CONFIG_EXTRA_DEBUG_CHECKS</div><div class='del'>-	static void validate_my_data(struct data *data)</div><div class='del'>-	{</div><div class='del'>-		if (is_valid(data))</div><div class='del'>-			return;</div><div class='del'>-</div><div class='del'>-		kunit_fail_current_test("data %p is invalid", data);</div><div class='del'>-</div><div class='del'>-		/* Normal, non-KUnit, error reporting code here. */</div><div class='del'>-	}</div><div class='del'>-	#else</div><div class='del'>-	static void my_debug_function(void) { }</div><div class='del'>-	#endif</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Customizing error messages</div><div class='del'>---------------------------</div><div class='del'>-</div><div class='del'>-Each of the ``KUNIT_EXPECT`` and ``KUNIT_ASSERT`` macros have a ``_MSG`` variant.</div><div class='del'>-These take a format string and arguments to provide additional context to the automatically generated error messages.</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	char some_str[41];</div><div class='del'>-	generate_sha1_hex_string(some_str);</div><div class='del'>-</div><div class='del'>-	/* Before. Not easy to tell why the test failed. */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, strlen(some_str), 40);</div><div class='del'>-</div><div class='del'>-	/* After. Now we see the offending string. */</div><div class='del'>-	KUNIT_EXPECT_EQ_MSG(test, strlen(some_str), 40, "some_str='%s'", some_str);</div><div class='del'>-</div><div class='del'>-Alternatively, one can take full control over the error message by using ``KUNIT_FAIL()``, e.g.</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	/* Before */</div><div class='del'>-	KUNIT_EXPECT_EQ(test, some_setup_function(), 0);</div><div class='del'>-</div><div class='del'>-	/* After: full control over the failure message. */</div><div class='del'>-	if (some_setup_function())</div><div class='del'>-		KUNIT_FAIL(test, "Failed to setup thing for testing");</div><div class='del'>-</div><div class='del'>-Next Steps</div><div class='del'>-==========</div><div class='del'>-*   Optional: see the Documentation/dev-tools/kunit/usage.rst page for a more</div><div class='del'>-    in-depth explanation of KUnit.</div><div class='head'>diff --git a/Documentation/dev-tools/kunit/usage.rst b/Documentation/dev-tools/kunit/usage.rst<br/>index 1c83e7d60a8a..9faf2b4153fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/usage.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/kunit/usage.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/kunit/usage.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/kunit/usage.rst</a></div><div class='hunk'>@@ -112,11 +112,45 @@ terminates the test case if the condition is not satisfied. For example:</div><div class='ctx'> 			KUNIT_EXPECT_LE(test, a[i], a[i + 1]);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-In this example, the method under test should return pointer to a value. If the</div><div class='del'>-pointer returns null or an errno, we want to stop the test since the following</div><div class='del'>-expectation could crash the test case. `ASSERT_NOT_ERR_OR_NULL(...)` allows us</div><div class='del'>-to bail out of the test case if the appropriate conditions are not satisfied to</div><div class='del'>-complete the test.</div><div class='add'>+In this example, we need to be able to allocate an array to test the ``sort()``</div><div class='add'>+function. So we use ``KUNIT_ASSERT_NOT_ERR_OR_NULL()`` to abort the test if</div><div class='add'>+there's an allocation error.</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+   In other test frameworks, ``ASSERT`` macros are often implemented by calling</div><div class='add'>+   ``return`` so they only work from the test function. In KUnit, we stop the</div><div class='add'>+   current kthread on failure, so you can call them from anywhere.</div><div class='add'>+</div><div class='add'>+Customizing error messages</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Each of the ``KUNIT_EXPECT`` and ``KUNIT_ASSERT`` macros have a ``_MSG``</div><div class='add'>+variant.  These take a format string and arguments to provide additional</div><div class='add'>+context to the automatically generated error messages.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	char some_str[41];</div><div class='add'>+	generate_sha1_hex_string(some_str);</div><div class='add'>+</div><div class='add'>+	/* Before. Not easy to tell why the test failed. */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, strlen(some_str), 40);</div><div class='add'>+</div><div class='add'>+	/* After. Now we see the offending string. */</div><div class='add'>+	KUNIT_EXPECT_EQ_MSG(test, strlen(some_str), 40, "some_str='%s'", some_str);</div><div class='add'>+</div><div class='add'>+Alternatively, one can take full control over the error message by using</div><div class='add'>+``KUNIT_FAIL()``, e.g.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	/* Before */</div><div class='add'>+	KUNIT_EXPECT_EQ(test, some_setup_function(), 0);</div><div class='add'>+</div><div class='add'>+	/* After: full control over the failure message. */</div><div class='add'>+	if (some_setup_function())</div><div class='add'>+		KUNIT_FAIL(test, "Failed to setup thing for testing");</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Test Suites</div><div class='ctx'> ~~~~~~~~~~~</div><div class='hunk'>@@ -125,8 +159,8 @@ We need many test cases covering all the unit's behaviors. It is common to have</div><div class='ctx'> many similar tests. In order to reduce duplication in these closely related</div><div class='ctx'> tests, most unit testing frameworks (including KUnit) provide the concept of a</div><div class='ctx'> *test suite*. A test suite is a collection of test cases for a unit of code</div><div class='del'>-with a setup function that gets invoked before every test case and then a tear</div><div class='del'>-down function that gets invoked after every test case completes. For example:</div><div class='add'>+with optional setup and teardown functions that run before/after the whole</div><div class='add'>+suite and/or every test case. For example:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='hunk'>@@ -141,16 +175,19 @@ down function that gets invoked after every test case completes. For example:</div><div class='ctx'> 		.name = "example",</div><div class='ctx'> 		.init = example_test_init,</div><div class='ctx'> 		.exit = example_test_exit,</div><div class='add'>+		.suite_init = example_suite_init,</div><div class='add'>+		.suite_exit = example_suite_exit,</div><div class='ctx'> 		.test_cases = example_test_cases,</div><div class='ctx'> 	};</div><div class='ctx'> 	kunit_test_suite(example_test_suite);</div><div class='ctx'> </div><div class='del'>-In the above example, the test suite ``example_test_suite`` would run the test</div><div class='del'>-cases ``example_test_foo``, ``example_test_bar``, and ``example_test_baz``. Each</div><div class='del'>-would have ``example_test_init`` called immediately before it and</div><div class='del'>-``example_test_exit`` called immediately after it.</div><div class='del'>-``kunit_test_suite(example_test_suite)`` registers the test suite with the</div><div class='del'>-KUnit test framework.</div><div class='add'>+In the above example, the test suite ``example_test_suite`` would first run</div><div class='add'>+``example_suite_init``, then run the test cases ``example_test_foo``,</div><div class='add'>+``example_test_bar``, and ``example_test_baz``. Each would have</div><div class='add'>+``example_test_init`` called immediately before it and ``example_test_exit``</div><div class='add'>+called immediately after it. Finally, ``example_suite_exit`` would be called</div><div class='add'>+after everything else. ``kunit_test_suite(example_test_suite)`` registers the</div><div class='add'>+test suite with the KUnit test framework.</div><div class='ctx'> </div><div class='ctx'> .. note::</div><div class='ctx'>    A test case will only run if it is associated with a test suite.</div><div class='hunk'>@@ -162,6 +199,8 @@ built as a module).</div><div class='ctx'> </div><div class='ctx'> For more information, see Documentation/dev-tools/kunit/api/test.rst.</div><div class='ctx'> </div><div class='add'>+.. _kunit-on-non-uml:</div><div class='add'>+</div><div class='ctx'> Writing Tests For Other Architectures</div><div class='ctx'> -------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -502,7 +541,7 @@ By reusing the same ``cases`` array from above, we can write the test as a</div><div class='ctx'> 		const char *str;</div><div class='ctx'> 		const char *sha1;</div><div class='ctx'> 	};</div><div class='del'>-	struct sha1_test_case cases[] = {</div><div class='add'>+	const struct sha1_test_case cases[] = {</div><div class='ctx'> 		{</div><div class='ctx'> 			.str = "hello world",</div><div class='ctx'> 			.sha1 = "2aae6c35c94fcfb415dbe95f408b9ce91ee846ed",</div><div class='hunk'>@@ -541,26 +580,6 @@ By reusing the same ``cases`` array from above, we can write the test as a</div><div class='ctx'> 		{}</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-.. _kunit-on-non-uml:</div><div class='del'>-</div><div class='del'>-Exiting Early on Failed Expectations</div><div class='del'>-------------------------------------</div><div class='del'>-</div><div class='del'>-We can use ``KUNIT_EXPECT_EQ`` to mark the test as failed and continue</div><div class='del'>-execution.  In some cases, it is unsafe to continue. We can use the</div><div class='del'>-``KUNIT_ASSERT`` variant to exit on failure.</div><div class='del'>-</div><div class='del'>-.. code-block:: c</div><div class='del'>-</div><div class='del'>-	void example_test_user_alloc_function(struct kunit *test)</div><div class='del'>-	{</div><div class='del'>-		void *object = alloc_some_object_for_me();</div><div class='del'>-</div><div class='del'>-		/* Make sure we got a valid pointer back. */</div><div class='del'>-		KUNIT_ASSERT_NOT_ERR_OR_NULL(test, object);</div><div class='del'>-		do_something_with_object(object);</div><div class='del'>-	}</div><div class='del'>-</div><div class='ctx'> Allocating Memory</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='hunk'>@@ -622,17 +641,22 @@ as shown in next section: *Accessing The Current Test*.</div><div class='ctx'> Accessing The Current Test</div><div class='ctx'> --------------------------</div><div class='ctx'> </div><div class='del'>-In some cases, we need to call test-only code from outside the test file.</div><div class='del'>-For example, see example in section *Injecting Test-Only Code* or if</div><div class='del'>-we are providing a fake implementation of an ops struct. Using</div><div class='del'>-``kunit_test`` field in ``task_struct``, we can access it via</div><div class='del'>-``current-&gt;kunit_test``.</div><div class='add'>+In some cases, we need to call test-only code from outside the test file.  This</div><div class='add'>+is helpful, for example, when providing a fake implementation of a function, or</div><div class='add'>+to fail any current test from within an error handler.</div><div class='add'>+We can do this via the ``kunit_test`` field in ``task_struct``, which we can</div><div class='add'>+access using the ``kunit_get_current_test()`` function in ``kunit/test-bug.h``.</div><div class='add'>+</div><div class='add'>+``kunit_get_current_test()`` is safe to call even if KUnit is not enabled. If</div><div class='add'>+KUnit is not enabled, or if no test is running in the current task, it will</div><div class='add'>+return ``NULL``. This compiles down to either a no-op or a static key check,</div><div class='add'>+so will have a negligible performance impact when no test is running.</div><div class='ctx'> </div><div class='del'>-The example below includes how to implement "mocking":</div><div class='add'>+The example below uses this to implement a "mock" implementation of a function, ``foo``:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='del'>-	#include &lt;linux/sched.h&gt; /* for current */</div><div class='add'>+	#include &lt;kunit/test-bug.h&gt; /* for kunit_get_current_test */</div><div class='ctx'> </div><div class='ctx'> 	struct test_data {</div><div class='ctx'> 		int foo_result;</div><div class='hunk'>@@ -641,7 +665,7 @@ The example below includes how to implement "mocking":</div><div class='ctx'> </div><div class='ctx'> 	static int fake_foo(int arg)</div><div class='ctx'> 	{</div><div class='del'>-		struct kunit *test = current-&gt;kunit_test;</div><div class='add'>+		struct kunit *test = kunit_get_current_test();</div><div class='ctx'> 		struct test_data *test_data = test-&gt;priv;</div><div class='ctx'> </div><div class='ctx'> 		KUNIT_EXPECT_EQ(test, test_data-&gt;want_foo_called_with, arg);</div><div class='hunk'>@@ -672,7 +696,7 @@ Each test can have multiple resources which have string names providing the same</div><div class='ctx'> flexibility as a ``priv`` member, but also, for example, allowing helper</div><div class='ctx'> functions to create resources without conflicting with each other. It is also</div><div class='ctx'> possible to define a clean up function for each resource, making it easy to</div><div class='del'>-avoid resource leaks. For more information, see Documentation/dev-tools/kunit/api/test.rst.</div><div class='add'>+avoid resource leaks. For more information, see Documentation/dev-tools/kunit/api/resource.rst.</div><div class='ctx'> </div><div class='ctx'> Failing The Current Test</div><div class='ctx'> ------------------------</div><div class='hunk'>@@ -700,3 +724,7 @@ structures as shown below:</div><div class='ctx'> 	static void my_debug_function(void) { }</div><div class='ctx'> 	#endif</div><div class='ctx'> </div><div class='add'>+``kunit_fail_current_test()`` is safe to call even if KUnit is not enabled. If</div><div class='add'>+KUnit is not enabled, or if no test is running in the current task, it will do</div><div class='add'>+nothing. This compiles down to either a no-op or a static key check, so will</div><div class='add'>+have a negligible performance impact when no test is running.</div><div class='head'>diff --git a/Documentation/dev-tools/testing-overview.rst b/Documentation/dev-tools/testing-overview.rst<br/>index 65feb81edb14..0aaf6ea53608 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/testing-overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dev-tools/testing-overview.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dev-tools/testing-overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dev-tools/testing-overview.rst</a></div><div class='hunk'>@@ -115,3 +115,66 @@ that none of these errors are occurring during the test.</div><div class='ctx'> Some of these tools integrate with KUnit or kselftest and will</div><div class='ctx'> automatically fail tests if an issue is detected.</div><div class='ctx'> </div><div class='add'>+Static Analysis Tools</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+In addition to testing a running kernel, one can also analyze kernel source code</div><div class='add'>+directly (**at compile time**) using **static analysis** tools. The tools</div><div class='add'>+commonly used in the kernel allow one to inspect the whole source tree or just</div><div class='add'>+specific files within it. They make it easier to detect and fix problems during</div><div class='add'>+the development process.</div><div class='add'>+</div><div class='add'>+Sparse can help test the kernel by performing type-checking, lock checking,</div><div class='add'>+value range checking, in addition to reporting various errors and warnings while</div><div class='add'>+examining the code. See the Documentation/dev-tools/sparse.rst documentation</div><div class='add'>+page for details on how to use it.</div><div class='add'>+</div><div class='add'>+Smatch extends Sparse and provides additional checks for programming logic</div><div class='add'>+mistakes such as missing breaks in switch statements, unused return values on</div><div class='add'>+error checking, forgetting to set an error code in the return of an error path,</div><div class='add'>+etc. Smatch also has tests against more serious issues such as integer</div><div class='add'>+overflows, null pointer dereferences, and memory leaks. See the project page at</div><div class='add'>+http://smatch.sourceforge.net/.</div><div class='add'>+</div><div class='add'>+Coccinelle is another static analyzer at our disposal. Coccinelle is often used</div><div class='add'>+to aid refactoring and collateral evolution of source code, but it can also help</div><div class='add'>+to avoid certain bugs that occur in common code patterns. The types of tests</div><div class='add'>+available include API tests, tests for correct usage of kernel iterators, checks</div><div class='add'>+for the soundness of free operations, analysis of locking behavior, and further</div><div class='add'>+tests known to help keep consistent kernel usage. See the</div><div class='add'>+Documentation/dev-tools/coccinelle.rst documentation page for details.</div><div class='add'>+</div><div class='add'>+Beware, though, that static analysis tools suffer from **false positives**.</div><div class='add'>+Errors and warns need to be evaluated carefully before attempting to fix them.</div><div class='add'>+</div><div class='add'>+When to use Sparse and Smatch</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+Sparse does type checking, such as verifying that annotated variables do not</div><div class='add'>+cause endianness bugs, detecting places that use ``__user`` pointers improperly,</div><div class='add'>+and analyzing the compatibility of symbol initializers.</div><div class='add'>+</div><div class='add'>+Smatch does flow analysis and, if allowed to build the function database, it</div><div class='add'>+also does cross function analysis. Smatch tries to answer questions like where</div><div class='add'>+is this buffer allocated? How big is it? Can this index be controlled by the</div><div class='add'>+user? Is this variable larger than that variable?</div><div class='add'>+</div><div class='add'>+It's generally easier to write checks in Smatch than it is to write checks in</div><div class='add'>+Sparse. Nevertheless, there are some overlaps between Sparse and Smatch checks.</div><div class='add'>+</div><div class='add'>+Strong points of Smatch and Coccinelle</div><div class='add'>+--------------------------------------</div><div class='add'>+</div><div class='add'>+Coccinelle is probably the easiest for writing checks. It works before the</div><div class='add'>+pre-processor so it's easier to check for bugs in macros using Coccinelle.</div><div class='add'>+Coccinelle also creates patches for you, which no other tool does.</div><div class='add'>+</div><div class='add'>+For example, with Coccinelle you can do a mass conversion from</div><div class='add'>+``kmalloc(x * size, GFP_KERNEL)`` to ``kmalloc_array(x, size, GFP_KERNEL)``, and</div><div class='add'>+that's really useful. If you just created a Smatch warning and try to push the</div><div class='add'>+work of converting on to the maintainers they would be annoyed. You'd have to</div><div class='add'>+argue about each warning if can really overflow or not.</div><div class='add'>+</div><div class='add'>+Coccinelle does no analysis of variable values, which is the strong point of</div><div class='add'>+Smatch. On the other hand, Coccinelle allows you to do simple things in a simple</div><div class='add'>+way.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/.gitignore b/Documentation/devicetree/bindings/.gitignore<br/>index a77719968a7e..51ddb26d93f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/.gitignore?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/.gitignore</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/.gitignore?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/.gitignore</a></div><div class='hunk'>@@ -2,3 +2,8 @@</div><div class='ctx'> *.example.dts</div><div class='ctx'> /processed-schema*.yaml</div><div class='ctx'> /processed-schema*.json</div><div class='add'>+</div><div class='add'>+#</div><div class='add'>+# We don't want to ignore the following even if they are dot-files</div><div class='add'>+#</div><div class='add'>+!.yamllint</div><div class='head'>diff --git a/Documentation/devicetree/bindings/.yamllint b/Documentation/devicetree/bindings/.yamllint<br/>index 214abd3ec440..4abe9f0a1d46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/.yamllint?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/.yamllint</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/.yamllint?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/.yamllint</a></div><div class='hunk'>@@ -19,7 +19,7 @@ rules:</div><div class='ctx'>   colons: {max-spaces-before: 0, max-spaces-after: 1}</div><div class='ctx'>   commas: {min-spaces-after: 1, max-spaces-after: 1}</div><div class='ctx'>   comments:</div><div class='del'>-    require-starting-space: false</div><div class='add'>+    require-starting-space: true</div><div class='ctx'>     min-spaces-from-content: 1</div><div class='ctx'>   comments-indentation: disable</div><div class='ctx'>   document-start:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile<br/>index c9953f86b19d..8b395893bd85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/Makefile?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/Makefile</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/Makefile?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/Makefile</a></div><div class='hunk'>@@ -28,7 +28,7 @@ $(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE</div><div class='ctx'> find_all_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \</div><div class='ctx'> 		-name 'processed-schema*' \)</div><div class='ctx'> </div><div class='del'>-find_cmd = $(find_all_cmd) | grep -F "$(DT_SCHEMA_FILES)"</div><div class='add'>+find_cmd = $(find_all_cmd) | grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))"</div><div class='ctx'> CHK_DT_DOCS := $(shell $(find_cmd))</div><div class='ctx'> </div><div class='ctx'> quiet_cmd_yamllint = LINT    $(src)</div><div class='hunk'>@@ -42,9 +42,7 @@ quiet_cmd_chk_bindings = CHKDT   $@</div><div class='ctx'> </div><div class='ctx'> quiet_cmd_mk_schema = SCHEMA  $@</div><div class='ctx'>       cmd_mk_schema = f=$$(mktemp) ; \</div><div class='del'>-                      $(if $(DT_MK_SCHEMA_FLAGS), \</div><div class='del'>-                           printf '%s\n' $(real-prereqs), \</div><div class='del'>-                           $(find_all_cmd)) &gt; $$f ; \</div><div class='add'>+                      $(find_all_cmd) &gt; $$f ; \</div><div class='ctx'>                       $(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f &gt; $@ ; \</div><div class='ctx'> 		      rm -f $$f</div><div class='ctx'> </div><div class='hunk'>@@ -77,3 +75,6 @@ always-$(CHECK_DT_BINDING) += $(patsubst $(srctree)/$(src)/%.yaml,%.example.dtb,</div><div class='ctx'> # build artifacts here before they are processed by scripts/Makefile.clean</div><div class='ctx'> clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \</div><div class='ctx'> 			-name '*.example.dtb' \) -delete 2&gt;/dev/null)</div><div class='add'>+</div><div class='add'>+dt_compatible_check: $(obj)/processed-schema.json</div><div class='add'>+	$(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $&lt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml<br/>index 02dc72c97645..e012f612f039 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/actions.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/actions.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/actions.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/actions.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/actions.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Actions Semi platforms device tree bindings</div><div class='add'>+title: Actions Semi platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andreas Färber &lt;afaerber@suse.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/airoha.yaml b/Documentation/devicetree/bindings/arm/airoha.yaml<br/>index fc19b1a6f37b..3292c669ee11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/airoha.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/airoha.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/airoha.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/airoha.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/airoha.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Airoha SoC based Platforms Device Tree Bindings</div><div class='add'>+title: Airoha SoC based Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml<br/>index 5e2017c0a051..8c7575455422 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/altera.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/altera.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/altera.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/altera.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/altera.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Altera's SoCFPGA platform device tree bindings</div><div class='add'>+title: Altera's SoCFPGA platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dinh Nguyen &lt;dinguyen@kernel.org&gt;</div><div class='hunk'>@@ -25,7 +25,15 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - altr,socfpga-arria10-socdk</div><div class='del'>-              - enclustra,mercury-aa1</div><div class='add'>+          - const: altr,socfpga-arria10</div><div class='add'>+          - const: altr,socfpga</div><div class='add'>+</div><div class='add'>+      - description: Mercury+ AA1 boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - enclustra,mercury-pe1</div><div class='add'>+              - google,chameleon-v3</div><div class='add'>+          - const: enclustra,mercury-aa1</div><div class='ctx'>           - const: altr,socfpga-arria10</div><div class='ctx'>           - const: altr,socfpga</div><div class='ctx'> </div><div class='hunk'>@@ -47,6 +55,7 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - altr,socfpga-stratix10-socdk</div><div class='add'>+              - altr,socfpga-stratix10-swvp</div><div class='ctx'>           - const: altr,socfpga-stratix10</div><div class='ctx'> </div><div class='ctx'>       - description: SoCFPGA VT</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/amazon,al.yaml b/Documentation/devicetree/bindings/arm/amazon,al.yaml<br/>index 0f03135d91b6..37dbb4768e5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amazon,al.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/amazon,al.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amazon,al.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/amazon,al.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/amazon,al.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Amazon's Annapurna Labs Alpine Platform Device Tree Bindings</div><div class='add'>+title: Amazon's Annapurna Labs Alpine Platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Hanna Hawa &lt;hhhawa@amazon.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml<br/>index 61a6cabb375b..274ee0890312 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amlogic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/amlogic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amlogic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/amlogic.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/amlogic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Amlogic MesonX device tree bindings</div><div class='add'>+title: Amlogic MesonX</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kevin Hilman &lt;khilman@baylibre.com&gt;</div><div class='hunk'>@@ -120,6 +120,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - amlogic,q200</div><div class='ctx'>               - amlogic,q201</div><div class='add'>+              - azw,gt1-ultimate</div><div class='ctx'>               - khadas,vim2</div><div class='ctx'>               - kingnovel,r-box-pro</div><div class='ctx'>               - libretech,aml-s912-pc</div><div class='hunk'>@@ -136,6 +137,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - amlogic,s400</div><div class='ctx'>               - jethome,jethub-j100</div><div class='add'>+              - jethome,jethub-j110</div><div class='ctx'>           - const: amlogic,a113d</div><div class='ctx'>           - const: amlogic,meson-axg</div><div class='ctx'> </div><div class='hunk'>@@ -151,7 +153,17 @@ properties:</div><div class='ctx'>       - description: Boards with the Amlogic Meson G12B A311D SoC</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - bananapi,bpi-m2s</div><div class='ctx'>               - khadas,vim3</div><div class='add'>+              - radxa,zero2</div><div class='add'>+          - const: amlogic,a311d</div><div class='add'>+          - const: amlogic,g12b</div><div class='add'>+</div><div class='add'>+      - description: Boards using the BPI-CM4 module with Amlogic Meson G12B A311D SoC</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - bananapi,bpi-cm4io</div><div class='add'>+          - const: bananapi,bpi-cm4</div><div class='ctx'>           - const: amlogic,a311d</div><div class='ctx'>           - const: amlogic,g12b</div><div class='ctx'> </div><div class='hunk'>@@ -161,7 +173,10 @@ properties:</div><div class='ctx'>               - azw,gsking-x</div><div class='ctx'>               - azw,gtking</div><div class='ctx'>               - azw,gtking-pro</div><div class='add'>+              - bananapi,bpi-m2s</div><div class='add'>+              - hardkernel,odroid-go-ultra</div><div class='ctx'>               - hardkernel,odroid-n2</div><div class='add'>+              - hardkernel,odroid-n2l</div><div class='ctx'>               - hardkernel,odroid-n2-plus</div><div class='ctx'>               - khadas,vim3</div><div class='ctx'>               - ugoos,am6</div><div class='hunk'>@@ -173,6 +188,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - amediatech,x96-air</div><div class='ctx'>               - amediatech,x96-air-gbit</div><div class='add'>+              - bananapi,bpi-m2-pro</div><div class='ctx'>               - bananapi,bpi-m5</div><div class='ctx'>               - cyx,a95xf3-air</div><div class='ctx'>               - cyx,a95xf3-air-gbit</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml<br/>index 6cc74523ebfd..7dff32f373cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson Firmware registers Interface</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Meson SoCs have a register bank with status and data shared with the</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml<br/>index eee7cda9f91b..09b27e98d4c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentation/devicetree/bindings/arm/apple.yaml<br/>index 8d93e8a6cc18..883fd67e3752 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/apple.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/apple.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/apple.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/apple.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/apple.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Apple ARM Machine Device Tree Bindings</div><div class='add'>+title: Apple ARM Machine</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Hector Martin &lt;marcan@marcan.st&gt;</div><div class='hunk'>@@ -19,12 +19,20 @@ description: |</div><div class='ctx'>   - MacBook Air (M1, 2020)</div><div class='ctx'>   - iMac (24-inch, M1, 2021)</div><div class='ctx'> </div><div class='del'>-  And devices based on the "M1 Pro" and "M1 Max" SoCs:</div><div class='add'>+  Devices based on the "M2" SoC:</div><div class='add'>+</div><div class='add'>+  - MacBook Air (M2, 2022)</div><div class='add'>+  - MacBook Pro (13-inch, M2, 2022)</div><div class='add'>+  - Mac mini (M2, 2023)</div><div class='add'>+</div><div class='add'>+  And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs:</div><div class='ctx'> </div><div class='ctx'>   - MacBook Pro (14-inch, M1 Pro, 2021)</div><div class='ctx'>   - MacBook Pro (14-inch, M1 Max, 2021)</div><div class='ctx'>   - MacBook Pro (16-inch, M1 Pro, 2021)</div><div class='ctx'>   - MacBook Pro (16-inch, M1 Max, 2021)</div><div class='add'>+  - Mac Studio (M1 Max, 2022)</div><div class='add'>+  - Mac Studio (M1 Ultra, 2022)</div><div class='ctx'> </div><div class='ctx'>   The compatible property should follow this format:</div><div class='ctx'> </div><div class='hunk'>@@ -67,6 +75,16 @@ properties:</div><div class='ctx'>               - apple,j457 # iMac (24-inch, 2x USB-C, M1, 2021)</div><div class='ctx'>           - const: apple,t8103</div><div class='ctx'>           - const: apple,arm-platform</div><div class='add'>+</div><div class='add'>+      - description: Apple M2 SoC based platforms</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - apple,j413 # MacBook Air (M2, 2022)</div><div class='add'>+              - apple,j473 # Mac mini (M2, 2023)</div><div class='add'>+              - apple,j493 # MacBook Pro (13-inch, M2, 2022)</div><div class='add'>+          - const: apple,t8112</div><div class='add'>+          - const: apple,arm-platform</div><div class='add'>+</div><div class='ctx'>       - description: Apple M1 Pro SoC based platforms</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -74,14 +92,23 @@ properties:</div><div class='ctx'>               - apple,j316s # MacBook Pro (16-inch, M1 Pro, 2021)</div><div class='ctx'>           - const: apple,t6000</div><div class='ctx'>           - const: apple,arm-platform</div><div class='add'>+</div><div class='ctx'>       - description: Apple M1 Max SoC based platforms</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - apple,j314c # MacBook Pro (14-inch, M1 Max, 2021)</div><div class='ctx'>               - apple,j316c # MacBook Pro (16-inch, M1 Max, 2021)</div><div class='add'>+              - apple,j375c # Mac Studio (M1 Max, 2022)</div><div class='ctx'>           - const: apple,t6001</div><div class='ctx'>           - const: apple,arm-platform</div><div class='ctx'> </div><div class='add'>+      - description: Apple M1 Ultra SoC based platforms</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - apple,j375d # Mac Studio (M1 Ultra, 2022)</div><div class='add'>+          - const: apple,t6002</div><div class='add'>+          - const: apple,arm-platform</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml<br/>index 0dc957a56d35..673277a7a224 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,t8103-pmgr</div><div class='add'>+          - apple,t8112-pmgr</div><div class='ctx'>           - apple,t6000-pmgr</div><div class='ctx'>       - const: apple,pmgr</div><div class='ctx'>       - const: syscon</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,cci-400.yaml b/Documentation/devicetree/bindings/arm/arm,cci-400.yaml<br/>index 1706134b75a3..d28303d909e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,cci-400.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,cci-400.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,cci-400.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,cci-400.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM CCI Cache Coherent Interconnect Device Tree Binding</div><div class='add'>+title: ARM CCI Cache Coherent Interconnect</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml<br/>new file mode 100644<br/>index 000000000000..2bae06eed693<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-catu.yaml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-catu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm Coresight Address Translation Unit (CATU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The CoreSight Address Translation Unit (CATU) translates addresses between an</div><div class='add'>+  AXI master and system memory. The CATU is normally used along with the TMC to</div><div class='add'>+  implement scattering of virtual trace buffers in physical memory. The CATU</div><div class='add'>+  translates contiguous Virtual Addresses (VAs) from an AXI master into</div><div class='add'>+  non-contiguous Physical Addresses (PAs) that are intended for system memory.</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-catu</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-catu</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Address translation error interrupt</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: AXI Slave connected to another Coresight component</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - in-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    catu@207e0000 {</div><div class='add'>+        compatible = "arm,coresight-catu", "arm,primecell";</div><div class='add'>+        reg = &lt;0x207e0000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;oscclk6a&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        in-ports {</div><div class='add'>+            port {</div><div class='add'>+                catu_in_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;etr_out_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml<br/>new file mode 100644<br/>index 000000000000..0a6bc03ebe00<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-cpu-debug.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-cpu-debug.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: CoreSight CPU Debug Component</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight CPU debug component are compliant with the ARMv8 architecture</div><div class='add'>+  reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The</div><div class='add'>+  external debug module is mainly used for two modes: self-hosted debug and</div><div class='add'>+  external debug, and it can be accessed from mmio region from Coresight and</div><div class='add'>+  eventually the debug module connects with CPU for debugging. And the debug</div><div class='add'>+  module provides sample-based profiling extension, which can be used to sample</div><div class='add'>+  CPU program counter, secure state and exception level, etc; usually every CPU</div><div class='add'>+  has one dedicated debug module to be connected.</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-cpu-debug</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-cpu-debug</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  cpu:</div><div class='add'>+    description:</div><div class='add'>+      A phandle to the cpu this debug component is bound to.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      A phandle to the debug power domain if the debug logic has its own</div><div class='add'>+      dedicated power domain. CPU idle states may also need to be separately</div><div class='add'>+      constrained to keep CPU cores powered.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - cpu</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    debug@f6590000 {</div><div class='add'>+        compatible = "arm,coresight-cpu-debug", "arm,primecell";</div><div class='add'>+        reg = &lt;0xf6590000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;sys_ctrl 1&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/coresight-cti.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml<br/>index 21e3515491f4..0c5b875cb654 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/coresight-cti.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/coresight-cti.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-cti.yaml</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Copyright 2019 Linaro Ltd.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/arm/coresight-cti.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: ARM Coresight Cross Trigger Interface (CTI) device.</div><div class='hunk'>@@ -12,8 +12,7 @@ description: |</div><div class='ctx'>   to one or more CoreSight components and/or a CPU, with CTIs interconnected in</div><div class='ctx'>   a star topology via the Cross Trigger Matrix (CTM), which is not programmable.</div><div class='ctx'>   The ECT components are not part of the trace generation data path and are thus</div><div class='del'>-  not part of the CoreSight graph described in the general CoreSight bindings</div><div class='del'>-  file coresight.txt.</div><div class='add'>+  not part of the CoreSight graph.</div><div class='ctx'> </div><div class='ctx'>   The CTI component properties define the connections between the individual</div><div class='ctx'>   CTI and the components it is directly connected to, consisting of input and</div><div class='hunk'>@@ -99,6 +98,9 @@ properties:</div><div class='ctx'>       base cti node if compatible string arm,coresight-cti-v8-arch is used,</div><div class='ctx'>       or may appear in a trig-conns child node when appropriate.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   arm,cti-ctm-id:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml<br/>new file mode 100644<br/>index 000000000000..44a1041cb0fc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight Programmable Trace Bus Funnel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The Coresight funnel merges 2-8 trace sources into a single trace</div><div class='add'>+  stream with programmable enable and priority of input ports.</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-dynamic-funnel</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-dynamic-funnel</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^port(@[0-7])?$':</div><div class='add'>+        description: Input connections from CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Output connection to CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - in-ports</div><div class='add'>+  - out-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    funnel@20040000 {</div><div class='add'>+        compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='add'>+        reg = &lt;0x20040000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;oscclk6a&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        out-ports {</div><div class='add'>+            port {</div><div class='add'>+                funnel_out_port0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;replicator_in_port0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        in-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                funnel_in_port0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;ptm0_out_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                funnel_in_port1: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;ptm1_out_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                funnel_in_port2: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;etm0_out_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml<br/>new file mode 100644<br/>index 000000000000..03792e9bd97a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm Coresight Programmable Trace Bus Replicator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The Coresight replicator splits a single trace stream into two trace streams</div><div class='add'>+  for systems that have more than one trace sink component.</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-dynamic-replicator</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-dynamic-replicator</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,replicator-loses-context:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the replicator will lose register context when AMBA clock</div><div class='add'>+      is removed which is observed in some replicator designs.</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Input connection from CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^port(@[01])?$':</div><div class='add'>+        description: Output connections to CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - in-ports</div><div class='add'>+  - out-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    replicator@20120000 {</div><div class='add'>+        compatible = "arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='add'>+        reg = &lt;0x20120000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+        out-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            /* replicator output ports */</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                replicator_out_port0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;tpiu_in_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                replicator_out_port1: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;etr_in_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+        in-ports {</div><div class='add'>+            port {</div><div class='add'>+                replicator_in_port0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csys2_funnel_out_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml<br/>new file mode 100644<br/>index 000000000000..90679788e0bf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-etb10.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-etb10.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight Embedded Trace Buffer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The CoreSight Embedded Trace Buffer stores traces in a dedicated SRAM that is</div><div class='add'>+  used as a circular buffer.</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-etb10</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-etb10</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Input connection from CoreSight Trace bus.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - in-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    etb@20010000 {</div><div class='add'>+        compatible = "arm,coresight-etb10", "arm,primecell";</div><div class='add'>+        reg = &lt;0x20010000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;oscclk6a&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        in-ports {</div><div class='add'>+            port {</div><div class='add'>+                etb_in_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;replicator_out_port0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml<br/>new file mode 100644<br/>index 000000000000..01200f67504a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-etm.yaml</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-etm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight Embedded Trace MacroCell</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The Embedded Trace Macrocell (ETM) is a real-time trace module providing</div><div class='add'>+  instruction and data tracing of a processor.</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - arm,coresight-etm3x</div><div class='add'>+          - arm,coresight-etm4x</div><div class='add'>+          - arm,coresight-etm4x-sysreg</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: arm,coresight-etm4x-sysreg</div><div class='add'>+    then:</div><div class='add'>+      $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description:</div><div class='add'>+          Embedded Trace Macrocell with memory mapped access.</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - arm,coresight-etm3x</div><div class='add'>+              - arm,coresight-etm4x</div><div class='add'>+          - const: arm,primecell</div><div class='add'>+      - description:</div><div class='add'>+          Embedded Trace Macrocell (version 4.x), with system register access only</div><div class='add'>+        const: arm,coresight-etm4x-sysreg</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  arm,coresight-loses-context-with-cpu:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the hardware will lose register context on CPU power down</div><div class='add'>+      (e.g. CPUIdle). An example of where this may be needed are systems which</div><div class='add'>+      contain a coresight component and CPU in the same power domain. When the</div><div class='add'>+      CPU powers down the coresight component also powers down and loses its</div><div class='add'>+      context.</div><div class='add'>+</div><div class='add'>+  arm,cp14:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Must be present if the system accesses ETM/PTM management registers via</div><div class='add'>+      co-processor 14.</div><div class='add'>+</div><div class='add'>+  qcom,skip-power-up:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates that an implementation can skip powering up the trace unit.</div><div class='add'>+      TRCPDCR.PU does not have to be set on Qualcomm Technologies Inc. systems</div><div class='add'>+      since ETMs are in the same power domain as their CPU cores. This property</div><div class='add'>+      is required to identify such systems with hardware errata where the CPU</div><div class='add'>+      watchdog counter is stopped when TRCPDCR.PU is set.</div><div class='add'>+</div><div class='add'>+  cpu:</div><div class='add'>+    description:</div><div class='add'>+      phandle to the cpu this ETM is bound to.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Output connection from the ETM to CoreSight Trace bus.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - cpu</div><div class='add'>+  - out-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ptm@2201c000 {</div><div class='add'>+        compatible = "arm,coresight-etm3x", "arm,primecell";</div><div class='add'>+        reg = &lt;0x2201c000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        cpu = &lt;&amp;cpu0&gt;;</div><div class='add'>+        clocks = &lt;&amp;oscclk6a&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        out-ports {</div><div class='add'>+            port {</div><div class='add'>+                ptm0_out_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;funnel_in_port0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    ptm@2201d000 {</div><div class='add'>+        compatible = "arm,coresight-etm3x", "arm,primecell";</div><div class='add'>+        reg = &lt;0x2201d000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        cpu = &lt;&amp;cpu1&gt;;</div><div class='add'>+        clocks = &lt;&amp;oscclk6a&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        out-ports {</div><div class='add'>+            port {</div><div class='add'>+                ptm1_out_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;funnel_in_port1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml<br/>new file mode 100644<br/>index 000000000000..cc8c3baa79b4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-static-funnel.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-static-funnel.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight Static Trace Bus Funnel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The Coresight static funnel merges 2-8 trace sources into a single trace</div><div class='add'>+  stream.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,coresight-static-funnel</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^port@[0-7]$':</div><div class='add'>+        description: Input connections from CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Output connection to CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - in-ports</div><div class='add'>+  - out-ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    funnel {</div><div class='add'>+        /*</div><div class='add'>+         * non-configurable replicators don't show up on the</div><div class='add'>+         * AMBA bus.  As such no need to add "arm,primecell".</div><div class='add'>+         */</div><div class='add'>+        compatible = "arm,coresight-static-funnel";</div><div class='add'>+</div><div class='add'>+        out-ports {</div><div class='add'>+            port {</div><div class='add'>+                combo_funnel_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;top_funnel_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        in-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                combo_funnel_in0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;cluster0_etf_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                combo_funnel_in1: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;cluster1_etf_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml<br/>new file mode 100644<br/>index 000000000000..1892a091ac35<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-static-replicator.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-static-replicator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight Static Trace Bus Replicator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The Coresight replicator splits a single trace stream into two trace streams</div><div class='add'>+  for systems that have more than one trace sink component.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,coresight-static-replicator</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Input connection from CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^port@[01]$':</div><div class='add'>+        description: Output connections to CoreSight Trace bus</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - in-ports</div><div class='add'>+  - out-ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    replicator {</div><div class='add'>+        /*</div><div class='add'>+         * non-configurable replicators don't show up on the</div><div class='add'>+         * AMBA bus.  As such no need to add "arm,primecell".</div><div class='add'>+         */</div><div class='add'>+        compatible = "arm,coresight-static-replicator";</div><div class='add'>+</div><div class='add'>+        out-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            /* replicator output ports */</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                replicator_out_port0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;etb_in_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                replicator_out_port1: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;tpiu_in_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        in-ports {</div><div class='add'>+            port {</div><div class='add'>+                replicator_in_port0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;funnel_out_port0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml<br/>new file mode 100644<br/>index 000000000000..378380c3f5aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-stm.yaml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight System Trace MacroCell</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The STM is a trace source that is integrated into a CoreSight system, designed</div><div class='add'>+  primarily for high-bandwidth trace of instrumentation embedded into software.</div><div class='add'>+  This instrumentation is made up of memory-mapped writes to the STM Advanced</div><div class='add'>+  eXtensible Interface (AXI) slave, which carry information about the behavior</div><div class='add'>+  of the software.</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-stm</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-stm</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: stm-base</div><div class='add'>+      - const: stm-stimulus-base</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Output connection to the CoreSight Trace bus.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - out-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    stm@20100000 {</div><div class='add'>+        compatible = "arm,coresight-stm", "arm,primecell";</div><div class='add'>+        reg = &lt;0x20100000 0x1000&gt;,</div><div class='add'>+              &lt;0x28000000 0x180000&gt;;</div><div class='add'>+        reg-names = "stm-base", "stm-stimulus-base";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        out-ports {</div><div class='add'>+            port {</div><div class='add'>+                stm_out_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;main_funnel_in_port2&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml<br/>new file mode 100644<br/>index 000000000000..cb8dceaca70e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,137 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight Trace Memory Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  Trace Memory Controller is used for Embedded Trace Buffer(ETB), Embedded Trace</div><div class='add'>+  FIFO(ETF) and Embedded Trace Router(ETR) configurations. The configuration</div><div class='add'>+  mode (ETB, ETF, ETR) is discovered at boot time when the device is probed.</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-tmc</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-tmc</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  arm,buffer-size:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      Size of contiguous buffer space for TMC ETR (embedded trace router). The</div><div class='add'>+      buffer size can be configured dynamically via buffer_size property in</div><div class='add'>+      sysfs instead.</div><div class='add'>+</div><div class='add'>+  arm,scatter-gather:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the TMC-ETR can safely use the SG mode on this system.</div><div class='add'>+</div><div class='add'>+  arm,max-burst-size:</div><div class='add'>+    description:</div><div class='add'>+      The maximum burst size initiated by TMC on the AXI master interface. The</div><div class='add'>+      burst size can be in the range [0..15], the setting supports one data</div><div class='add'>+      transfer per burst up to a maximum of 16 data transfers per burst.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 15</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Input connection from the CoreSight Trace bus.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: AXI or ATB Master output connection. Used for ETR</div><div class='add'>+          and ETF configurations.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - in-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    etr@20070000 {</div><div class='add'>+        compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='add'>+        reg = &lt;0x20070000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;oscclk6a&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        in-ports {</div><div class='add'>+            port {</div><div class='add'>+                etr_in_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;replicator2_out_port0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        out-ports {</div><div class='add'>+            port {</div><div class='add'>+                etr_out_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;catu_in_port&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml<br/>new file mode 100644<br/>index 000000000000..61a0cdc27745<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,coresight-tpiu.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,coresight-tpiu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm CoreSight Trace Port Interface Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt;</div><div class='add'>+  - Mike Leach &lt;mike.leach@linaro.org&gt;</div><div class='add'>+  - Leo Yan &lt;leo.yan@linaro.org&gt;</div><div class='add'>+  - Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CoreSight components are compliant with the ARM CoreSight architecture</div><div class='add'>+  specification and can be connected in various topologies to suit a particular</div><div class='add'>+  SoCs tracing needs. These trace components can generally be classified as</div><div class='add'>+  sinks, links and sources. Trace data produced by one or more sources flows</div><div class='add'>+  through the intermediate links connecting the source to the currently selected</div><div class='add'>+  sink.</div><div class='add'>+</div><div class='add'>+  The CoreSight Trace Port Interface Unit captures trace data from the trace bus</div><div class='add'>+  and outputs it to an external trace port.</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,coresight-tpiu</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,coresight-tpiu</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+      - const: atclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Input connection from the CoreSight Trace bus.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - in-ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    tpiu@e3c05000 {</div><div class='add'>+        compatible = "arm,coresight-tpiu", "arm,primecell";</div><div class='add'>+        reg = &lt;0xe3c05000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;clk_375m&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+        in-ports {</div><div class='add'>+            port {</div><div class='add'>+                tpiu_in_port: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;funnel4_out_port0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml b/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml<br/>new file mode 100644<br/>index 000000000000..693f3fe7be60<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,corstone1000.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,corstone1000.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,corstone1000.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Corstone1000</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vishnu Banavath &lt;vishnu.banavath@arm.com&gt;</div><div class='add'>+  - Rui Miguel Silva &lt;rui.silva@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that</div><div class='add'>+  provides a flexible compute architecture that combines Cortex‑A and Cortex‑M</div><div class='add'>+  processors.</div><div class='add'>+</div><div class='add'>+  Support for Cortex‑A32, Cortex‑A35 and Cortex‑A53 processors. Two expansion</div><div class='add'>+  systems for M-Class (or other) processors for adding sensors, connectivity,</div><div class='add'>+  video, audio and machine learning at the edge System and security IPs to build</div><div class='add'>+  a secure SoC for a range of rich IoT applications, for example gateways, smart</div><div class='add'>+  cameras and embedded systems.</div><div class='add'>+</div><div class='add'>+  Integrated Secure Enclave providing hardware Root of Trust and supporting</div><div class='add'>+  seamless integration of the optional CryptoCell™-312 cryptographic</div><div class='add'>+  accelerator.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Corstone1000 MPS3 it has 1 Cortex-A35 CPU core in a FPGA</div><div class='add'>+          implementation of the Corstone1000 in the MPS3 prototyping board. See</div><div class='add'>+          ARM document DAI0550.</div><div class='add'>+        items:</div><div class='add'>+          - const: arm,corstone1000-mps3</div><div class='add'>+      - description: Corstone1000 FVP is the Fixed Virtual Platform</div><div class='add'>+          implementation of this system. See ARM ecosystems FVP's.</div><div class='add'>+        items:</div><div class='add'>+          - const: arm,corstone1000-fvp</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/ete.yaml b/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml<br/>index 7f9b2d1e1147..108460627d9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/ete.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/ete.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Copyright 2021, Arm Ltd</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/ete.yaml#"</div><div class='add'>+$id: "http://devicetree.org/schemas/arm/arm,embedded-trace-extension.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='ctx'> title: ARM Embedded Trace Extensions</div><div class='hunk'>@@ -20,7 +20,6 @@ description: |</div><div class='ctx'>   Arm Trace Buffer Extension (TRBE)). Since the ETE can be connected to</div><div class='ctx'>   legacy CoreSight components, a node must be listed per instance, along</div><div class='ctx'>   with any optional connection graph as per the coresight bindings.</div><div class='del'>-  See bindings/arm/coresight.txt.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='hunk'>@@ -34,6 +33,9 @@ properties:</div><div class='ctx'>       Handle to the cpu this ETE is bound to.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   out-ports:</div><div class='ctx'>     description: |</div><div class='ctx'>       Output connections from the ETE to legacy CoreSight trace bus.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,integrator.yaml b/Documentation/devicetree/bindings/arm/arm,integrator.yaml<br/>index 528eee64290a..98ff5698ae1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,integrator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,integrator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,integrator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,integrator.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/arm,integrator.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM Integrator Boards Device Tree Bindings</div><div class='add'>+title: ARM Integrator Boards</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,realview.yaml b/Documentation/devicetree/bindings/arm/arm,realview.yaml<br/>index 4f9b21f49e84..8d3ed2e4ed31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,realview.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,realview.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,realview.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,realview.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/arm,realview.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM RealView Boards Device Tree Bindings</div><div class='add'>+title: ARM RealView Boards</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/trbe.yaml b/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml<br/>index 4402d7bfd1fc..b1322658063a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/trbe.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/trbe.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Copyright 2021, Arm Ltd</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/trbe.yaml#"</div><div class='add'>+$id: "http://devicetree.org/schemas/arm/arm,trace-buffer-extension.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='ctx'> title: ARM Trace Buffer Extensions</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml b/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml<br/>new file mode 100644<br/>index 000000000000..491eef1e1b10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,versatile-sysreg.yaml</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/arm,versatile-sysreg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm Versatile system registers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is a system control registers block, providing multiple low level</div><div class='add'>+  platform functions like board detection and identification, software</div><div class='add'>+  interrupt generation, MMC and NOR Flash control, etc.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,versatile-sysreg</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  panel:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,versatile.yaml b/Documentation/devicetree/bindings/arm/arm,versatile.yaml<br/>index 34b437c72751..13e52ba92060 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,versatile.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,versatile.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,versatile.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,versatile.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/arm,versatile.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM Versatile Boards Device Tree Bindings</div><div class='add'>+title: ARM Versatile Boards</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml b/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml<br/>index a4b4452afc1d..09c319f803ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM Versatile Express and Juno Boards Device Tree Bindings</div><div class='add'>+title: ARM Versatile Express and Juno Boards</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sudeep Holla &lt;sudeep.holla@arm.com&gt;</div><div class='hunk'>@@ -144,6 +144,7 @@ patternProperties:</div><div class='ctx'>       it is stricter and always has two compatibles.</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: '/schemas/simple-bus.yaml'</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml b/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml<br/>new file mode 100644<br/>index 000000000000..e0eff4c05879<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml</a></div><div class='hunk'>@@ -0,0 +1,92 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/aspeed/aspeed.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Aspeed SoC based boards</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Joel Stanley &lt;joel@jms.id.au&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: AST2400 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - delta,ahe50dc-bmc</div><div class='add'>+              - facebook,galaxy100-bmc</div><div class='add'>+              - facebook,wedge100-bmc</div><div class='add'>+              - facebook,wedge40-bmc</div><div class='add'>+              - microsoft,olympus-bmc</div><div class='add'>+              - quanta,q71l-bmc</div><div class='add'>+              - tyan,palmetto-bmc</div><div class='add'>+              - yadro,vesnin-bmc</div><div class='add'>+          - const: aspeed,ast2400</div><div class='add'>+</div><div class='add'>+      - description: AST2500 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amd,daytonax-bmc</div><div class='add'>+              - amd,ethanolx-bmc</div><div class='add'>+              - ampere,mtjade-bmc</div><div class='add'>+              - aspeed,ast2500-evb</div><div class='add'>+              - asrock,e3c246d4i-bmc</div><div class='add'>+              - asrock,romed8hm3-bmc</div><div class='add'>+              - bytedance,g220a-bmc</div><div class='add'>+              - facebook,cmm-bmc</div><div class='add'>+              - facebook,minipack-bmc</div><div class='add'>+              - facebook,tiogapass-bmc</div><div class='add'>+              - facebook,yamp-bmc</div><div class='add'>+              - facebook,yosemitev2-bmc</div><div class='add'>+              - facebook,wedge400-bmc</div><div class='add'>+              - hxt,stardragon4800-rep2-bmc</div><div class='add'>+              - ibm,mihawk-bmc</div><div class='add'>+              - ibm,mowgli-bmc</div><div class='add'>+              - ibm,romulus-bmc</div><div class='add'>+              - ibm,swift-bmc</div><div class='add'>+              - ibm,witherspoon-bmc</div><div class='add'>+              - ingrasys,zaius-bmc</div><div class='add'>+              - inspur,fp5280g2-bmc</div><div class='add'>+              - inspur,nf5280m6-bmc</div><div class='add'>+              - inspur,on5263m5-bmc</div><div class='add'>+              - intel,s2600wf-bmc</div><div class='add'>+              - inventec,lanyang-bmc</div><div class='add'>+              - lenovo,hr630-bmc</div><div class='add'>+              - lenovo,hr855xg2-bmc</div><div class='add'>+              - portwell,neptune-bmc</div><div class='add'>+              - qcom,centriq2400-rep-bmc</div><div class='add'>+              - supermicro,x11spi-bmc</div><div class='add'>+              - tyan,s7106-bmc</div><div class='add'>+              - tyan,s8036-bmc</div><div class='add'>+              - yadro,nicole-bmc</div><div class='add'>+              - yadro,vegman-n110-bmc</div><div class='add'>+              - yadro,vegman-rx20-bmc</div><div class='add'>+              - yadro,vegman-sx20-bmc</div><div class='add'>+          - const: aspeed,ast2500</div><div class='add'>+</div><div class='add'>+      - description: AST2600 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ampere,mtmitchell-bmc</div><div class='add'>+              - aspeed,ast2600-evb</div><div class='add'>+              - aspeed,ast2600-evb-a1</div><div class='add'>+              - facebook,bletchley-bmc</div><div class='add'>+              - facebook,cloudripper-bmc</div><div class='add'>+              - facebook,elbert-bmc</div><div class='add'>+              - facebook,fuji-bmc</div><div class='add'>+              - facebook,greatlakes-bmc</div><div class='add'>+              - ibm,everest-bmc</div><div class='add'>+              - ibm,rainier-bmc</div><div class='add'>+              - ibm,tacoma-bmc</div><div class='add'>+              - inventec,transformer-bmc</div><div class='add'>+              - jabil,rbp-bmc</div><div class='add'>+              - qcom,dc-scm-v1-bmc</div><div class='add'>+              - quanta,s6q-bmc</div><div class='add'>+              - ufispace,ncplite-bmc</div><div class='add'>+          - const: aspeed,ast2600</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml<br/>index 4e495e03264b..dfb8fd089197 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/atmel-at91.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/atmel-at91.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/atmel-at91.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/atmel-at91.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/atmel-at91.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Atmel AT91 device tree bindings.</div><div class='add'>+title: Atmel AT91.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='hunk'>@@ -91,9 +91,11 @@ properties:</div><div class='ctx'>           - const: atmel,sama5d2</div><div class='ctx'>           - const: atmel,sama5</div><div class='ctx'> </div><div class='del'>-      - description: SAM9X60-EK board</div><div class='add'>+      - description: Microchip SAM9X60 Evaluation Boards</div><div class='ctx'>         items:</div><div class='del'>-          - const: microchip,sam9x60ek</div><div class='add'>+          - enum:</div><div class='add'>+              - microchip,sam9x60ek</div><div class='add'>+              - microchip,sam9x60-curiosity</div><div class='ctx'>           - const: microchip,sam9x60</div><div class='ctx'>           - const: atmel,at91sam9</div><div class='ctx'> </div><div class='hunk'>@@ -127,6 +129,13 @@ properties:</div><div class='ctx'>           - const: atmel,sama5d3</div><div class='ctx'>           - const: atmel,sama5</div><div class='ctx'> </div><div class='add'>+      - description: Microchip SAMA5D3 Ethernet Development System Board</div><div class='add'>+        items:</div><div class='add'>+          - const: microchip,sama5d3-eds</div><div class='add'>+          - const: atmel,sama5d36</div><div class='add'>+          - const: atmel,sama5d3</div><div class='add'>+          - const: atmel,sama5</div><div class='add'>+</div><div class='ctx'>       - description: CalAmp LMU5000 board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: calamp,lmu5000</div><div class='hunk'>@@ -163,9 +172,11 @@ properties:</div><div class='ctx'>           - const: microchip,sama7g5</div><div class='ctx'>           - const: microchip,sama7</div><div class='ctx'> </div><div class='del'>-      - description: Microchip LAN9662 PCB8291 Evaluation Board.</div><div class='add'>+      - description: Microchip LAN9662 Evaluation Boards.</div><div class='ctx'>         items:</div><div class='del'>-          - const: microchip,lan9662-pcb8291</div><div class='add'>+          - enum:</div><div class='add'>+              - microchip,lan9662-pcb8291</div><div class='add'>+              - microchip,lan9662-pcb8309</div><div class='ctx'>           - const: microchip,lan9662</div><div class='ctx'>           - const: microchip,lan966</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt<br/>index 16eef600d599..ab1b352344ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/atmel-sysregs.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/atmel-sysregs.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/atmel-sysregs.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/atmel-sysregs.txt</a></div><div class='hunk'>@@ -25,21 +25,6 @@ System Timer (ST) required properties:</div><div class='ctx'> Its subnodes can be:</div><div class='ctx'> - watchdog: compatible should be "atmel,at91rm9200-wdt"</div><div class='ctx'> </div><div class='del'>-RSTC Reset Controller required properties:</div><div class='del'>-- compatible: Should be "atmel,&lt;chip&gt;-rstc".</div><div class='del'>-  &lt;chip&gt; can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7"</div><div class='del'>-  it also can be "microchip,sam9x60-rstc"</div><div class='del'>-- reg: Should contain registers location and length</div><div class='del'>-- clocks: phandle to input clock.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	rstc@fffffd00 {</div><div class='del'>-		compatible = "atmel,at91sam9260-rstc";</div><div class='del'>-		reg = &lt;0xfffffd00 0x10&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk32k&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> RAMC SDRAM/DDR Controller required properties:</div><div class='ctx'> - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"</div><div class='ctx'> 			"atmel,at91sam9260-sdramc",</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/axxia.yaml b/Documentation/devicetree/bindings/arm/axxia.yaml<br/>index e0d2bb71cf50..d60907e43efc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/axxia.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/axxia.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/axxia.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/axxia.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/axxia.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Axxia AXM55xx device tree bindings</div><div class='add'>+title: Axxia AXM55xx</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anders Berg &lt;anders.berg@lsi.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml b/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml<br/>index 8051a75c2c79..162a39dab218 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/bcm2835.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/bcm2835.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM2711/BCM2835 Platforms Device Tree Bindings</div><div class='add'>+title: Broadcom BCM2711/BCM2835 Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Eric Anholt &lt;eric@anholt.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml<br/>index c60324357435..f2bcac0096b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm11351.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM11351 device tree bindings</div><div class='add'>+title: Broadcom BCM11351</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml<br/>index b3020757380f..cf4e254e32f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm21664.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm21664.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM21664 device tree bindings</div><div class='add'>+title: Broadcom BCM21664</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml<br/>index 37f3a6fcde76..eafec29ba7ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm23550.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM23550 device tree bindings</div><div class='add'>+title: Broadcom BCM23550</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml<br/>index 434d3c6db61e..454b0e93245d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4708.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM4708 device tree bindings</div><div class='add'>+title: Broadcom BCM4708</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Broadcom BCM4708/47081/4709/47094/53012 Wi-Fi/network SoCs based</div><div class='hunk'>@@ -64,7 +64,9 @@ properties:</div><div class='ctx'>       - description: BCM47094 based boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - asus,rt-ac88u</div><div class='ctx'>               - dlink,dir-885l</div><div class='add'>+              - dlink,dir-890l</div><div class='ctx'>               - linksys,panamera</div><div class='ctx'>               - luxul,abr-4500-v1</div><div class='ctx'>               - luxul,xap-1610-v1</div><div class='hunk'>@@ -83,9 +85,22 @@ properties:</div><div class='ctx'>               - brcm,bcm953012er</div><div class='ctx'>               - brcm,bcm953012hr</div><div class='ctx'>               - brcm,bcm953012k</div><div class='add'>+          - const: brcm,bcm53012</div><div class='add'>+          - const: brcm,bcm4708</div><div class='add'>+</div><div class='add'>+      - description: BCM53015 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - meraki,mr26</div><div class='add'>+          - const: brcm,bcm53015</div><div class='add'>+          - const: brcm,bcm4708</div><div class='add'>+</div><div class='add'>+      - description: BCM53016 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - dlink,dwl-8610ap</div><div class='ctx'>               - meraki,mr32</div><div class='del'>-          - const: brcm,brcm53012</div><div class='del'>-          - const: brcm,brcm53016</div><div class='add'>+          - const: brcm,bcm53016</div><div class='ctx'>           - const: brcm,bcm4708</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml<br/>deleted file mode 100644<br/>index 9b745531ff04..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/arm/bcm/brcm,bcm4908.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Broadcom BCM4908 device tree bindings</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  Broadcom BCM4906 / BCM4908 / BCM49408 Wi-Fi/network SoCs with Brahma CPUs.</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  $nodename:</div><div class='del'>-    const: '/'</div><div class='del'>-  compatible:</div><div class='del'>-    oneOf:</div><div class='del'>-      - description: BCM4906 based boards</div><div class='del'>-        items:</div><div class='del'>-          - enum:</div><div class='del'>-              - netgear,r8000p</div><div class='del'>-              - tplink,archer-c2300-v1</div><div class='del'>-          - const: brcm,bcm4906</div><div class='del'>-          - const: brcm,bcm4908</div><div class='del'>-</div><div class='del'>-      - description: BCM4908 based boards</div><div class='del'>-        items:</div><div class='del'>-          - enum:</div><div class='del'>-              - asus,gt-ac5300</div><div class='del'>-              - netgear,raxe500</div><div class='del'>-          - const: brcm,bcm4908</div><div class='del'>-</div><div class='del'>-      - description: BCM49408 based boards</div><div class='del'>-        items:</div><div class='del'>-          - const: brcm,bcm49408</div><div class='del'>-          - const: brcm,bcm4908</div><div class='del'>-</div><div class='del'>-additionalProperties: true</div><div class='del'>-</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt<br/>index 8c7a4908a849..a8866c6e9d46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,bcm63138.txt</a></div><div class='hunk'>@@ -30,7 +30,7 @@ Example:</div><div class='ctx'> </div><div class='ctx'> 	cpus {</div><div class='ctx'> 		cpu@0 {</div><div class='del'>-			compatible = "arm,cotex-a9";</div><div class='add'>+			compatible = "arm,cortex-a9";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			...</div><div class='ctx'> 			enable-method = "brcm,bcm63138";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml<br/>new file mode 100644<br/>index 000000000000..07892cbdd23c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/bcm/brcm,bcmbca.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom Broadband SoC</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Broadcom Broadband SoCs include family of high performance DSL/PON/Wireless</div><div class='add'>+  chips that can be used as home gateway, router and WLAN AP for residential,</div><div class='add'>+  enterprise and carrier applications.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - William Zhang &lt;william.zhang@broadcom.com&gt;</div><div class='add'>+  - Anand Gore &lt;anand.gore@broadcom.com&gt;</div><div class='add'>+  - Kursad Oney &lt;kursad.oney@broadcom.com&gt;</div><div class='add'>+  - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: BCM47622 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm947622</div><div class='add'>+          - const: brcm,bcm47622</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM4906 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - netgear,r8000p</div><div class='add'>+              - tplink,archer-c2300-v1</div><div class='add'>+          - const: brcm,bcm4906</div><div class='add'>+          - const: brcm,bcm4908</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM4908 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - asus,gt-ac5300</div><div class='add'>+              - brcm,bcm94908</div><div class='add'>+              - netgear,raxe500</div><div class='add'>+          - const: brcm,bcm4908</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM49408 based boards</div><div class='add'>+        items:</div><div class='add'>+          - const: brcm,bcm49408</div><div class='add'>+          - const: brcm,bcm4908</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM4912 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - asus,gt-ax6000</div><div class='add'>+              - brcm,bcm94912</div><div class='add'>+          - const: brcm,bcm4912</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM63138 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm963138</div><div class='add'>+              - brcm,BCM963138DVT</div><div class='add'>+          - const: brcm,bcm63138</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM63146 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm963146</div><div class='add'>+          - const: brcm,bcm63146</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM63148 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm963148</div><div class='add'>+          - const: brcm,bcm63148</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM63158 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm963158</div><div class='add'>+          - const: brcm,bcm63158</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM63178 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm963178</div><div class='add'>+          - const: brcm,bcm63178</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM6756 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm96756</div><div class='add'>+          - const: brcm,bcm6756</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM6813 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm96813</div><div class='add'>+          - const: brcm,bcm6813</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM6846 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm96846</div><div class='add'>+          - const: brcm,bcm6846</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM6855 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm96855</div><div class='add'>+          - const: brcm,bcm6855</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM6856 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm96856</div><div class='add'>+          - const: brcm,bcm6856</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM6858 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm96858</div><div class='add'>+          - const: brcm,bcm6858</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+      - description: BCM6878 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm96878</div><div class='add'>+          - const: brcm,bcm6878</div><div class='add'>+          - const: brcm,bcmbca</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt<br/>index 104cc9b41df4..071421dbc4d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt</a></div><div class='hunk'>@@ -187,15 +187,8 @@ Required properties:</div><div class='ctx'> Sequencer DRAM parameters and control registers. Used for Self-Refresh</div><div class='ctx'> Power-Down (SRPD), among other things.</div><div class='ctx'> </div><div class='del'>-Required properties:</div><div class='del'>-- compatible     : should contain one of these</div><div class='del'>-	"brcm,brcmstb-memc-ddr-rev-b.2.1"</div><div class='del'>-	"brcm,brcmstb-memc-ddr-rev-b.2.2"</div><div class='del'>-	"brcm,brcmstb-memc-ddr-rev-b.2.3"</div><div class='del'>-	"brcm,brcmstb-memc-ddr-rev-b.3.0"</div><div class='del'>-	"brcm,brcmstb-memc-ddr-rev-b.3.1"</div><div class='del'>-	"brcm,brcmstb-memc-ddr"</div><div class='del'>-- reg            : the MEMC DDR register range</div><div class='add'>+See Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml for a</div><div class='add'>+full list of supported compatible strings and properties.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml<br/>index 432ccf990f9e..a0a3f32db54e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,cygnus.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,cygnus.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom Cygnus device tree bindings</div><div class='add'>+title: Broadcom Cygnus</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ray Jui &lt;rjui@broadcom.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml<br/>index 294948399f82..cc6add0e933a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,hr2.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,hr2.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom Hurricane 2 device tree bindings</div><div class='add'>+title: Broadcom Hurricane 2</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml<br/>index c4847abbecd8..6696598eca0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,ns2.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,ns2.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom North Star 2 (NS2) device tree bindings</div><div class='add'>+title: Broadcom North Star 2 (NS2)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ray Jui &lt;rjui@broadcom.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml<br/>index 7d184ba7d180..a43b2d4d936b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,nsp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,nsp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom Northstar Plus device tree bindings</div><div class='add'>+title: Broadcom Northstar Plus</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Broadcom Northstar Plus family of SoCs are used for switching control</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml<br/>index c638e04ebae0..c6ccb78aab0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,stingray.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,stingray.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom Stingray device tree bindings</div><div class='add'>+title: Broadcom Stingray</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ray Jui &lt;rjui@broadcom.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml<br/>index 4eba182abd53..3f441352fbf0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom Vulcan device tree bindings</div><div class='add'>+title: Broadcom Vulcan</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Robert Richter &lt;rrichter@marvell.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml<br/>index b369b374fc4a..39e3c248f5b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml</a></div><div class='hunk'>@@ -30,6 +30,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -47,6 +48,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   reset:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -63,6 +65,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   pwm:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -76,8 +79,6 @@ properties:</div><div class='ctx'>       - compatible</div><div class='ctx'>       - "#pwm-cells"</div><div class='ctx'> </div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - mboxes</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/bitmain.yaml b/Documentation/devicetree/bindings/arm/bitmain.yaml<br/>index 90ba02be48ce..55a5a570b5bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bitmain.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/bitmain.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/bitmain.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/bitmain.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/bitmain.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bitmain platform device tree bindings</div><div class='add'>+title: Bitmain platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/calxeda.yaml b/Documentation/devicetree/bindings/arm/calxeda.yaml<br/>index 46f78addebb0..3e9f5e1d862e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/calxeda.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/calxeda.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/calxeda.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/calxeda.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/calxeda.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Calxeda Platforms Device Tree Bindings</div><div class='add'>+title: Calxeda Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/cci-control-port.yaml b/Documentation/devicetree/bindings/arm/cci-control-port.yaml<br/>index c9114866213f..c29d250a6d77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/cci-control-port.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/cci-control-port.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/cci-control-port.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/cci-control-port.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/cci-control-port.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: CCI Interconnect Bus Masters binding</div><div class='add'>+title: CCI Interconnect Bus Masters</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt<br/>deleted file mode 100644<br/>index f1de3247c1b7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-* CoreSight CPU Debug Component:</div><div class='del'>-</div><div class='del'>-CoreSight CPU debug component are compliant with the ARMv8 architecture</div><div class='del'>-reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The</div><div class='del'>-external debug module is mainly used for two modes: self-hosted debug and</div><div class='del'>-external debug, and it can be accessed from mmio region from Coresight</div><div class='del'>-and eventually the debug module connects with CPU for debugging. And the</div><div class='del'>-debug module provides sample-based profiling extension, which can be used</div><div class='del'>-to sample CPU program counter, secure state and exception level, etc;</div><div class='del'>-usually every CPU has one dedicated debug module to be connected.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "arm,coresight-cpu-debug"; supplemented with</div><div class='del'>-               "arm,primecell" since this driver is using the AMBA bus</div><div class='del'>-	       interface.</div><div class='del'>-</div><div class='del'>-- reg : physical base address and length of the register set.</div><div class='del'>-</div><div class='del'>-- clocks : the clock associated to this component.</div><div class='del'>-</div><div class='del'>-- clock-names : the name of the clock referenced by the code. Since we are</div><div class='del'>-                using the AMBA framework, the name of the clock providing</div><div class='del'>-		the interconnect should be "apb_pclk" and the clock is</div><div class='del'>-		mandatory. The interface between the debug logic and the</div><div class='del'>-		processor core is clocked by the internal CPU clock, so it</div><div class='del'>-		is enabled with CPU clock by default.</div><div class='del'>-</div><div class='del'>-- cpu : the CPU phandle the debug module is affined to. Do not assume it</div><div class='del'>-        to default to CPU0 if omitted.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- power-domains: a phandle to the debug power domain. We use "power-domains"</div><div class='del'>-                 binding to turn on the debug logic if it has own dedicated</div><div class='del'>-		 power domain and if necessary to use "cpuidle.off=1" or</div><div class='del'>-		 "nohlt" in the kernel command line or sysfs node to</div><div class='del'>-		 constrain idle states to ensure registers in the CPU power</div><div class='del'>-		 domain are accessible.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	debug@f6590000 {</div><div class='del'>-		compatible = "arm,coresight-cpu-debug","arm,primecell";</div><div class='del'>-		reg = &lt;0 0xf6590000 0 0x1000&gt;;</div><div class='del'>-		clocks = &lt;&amp;sys_ctrl HI6220_DAPB_CLK&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		cpu = &lt;&amp;cpu0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/coresight.txt b/Documentation/devicetree/bindings/arm/coresight.txt<br/>deleted file mode 100644<br/>index c68d93a35b6c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/coresight.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/coresight.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,402 +0,0 @@</div><div class='del'>-* CoreSight Components:</div><div class='del'>-</div><div class='del'>-CoreSight components are compliant with the ARM CoreSight architecture</div><div class='del'>-specification and can be connected in various topologies to suit a particular</div><div class='del'>-SoCs tracing needs. These trace components can generally be classified as</div><div class='del'>-sinks, links and sources. Trace data produced by one or more sources flows</div><div class='del'>-through the intermediate links connecting the source to the currently selected</div><div class='del'>-sink. Each CoreSight component device should use these properties to describe</div><div class='del'>-its hardware characteristcs.</div><div class='del'>-</div><div class='del'>-* Required properties for all components *except* non-configurable replicators</div><div class='del'>-  and non-configurable funnels:</div><div class='del'>-</div><div class='del'>-	* compatible: These have to be supplemented with "arm,primecell" as</div><div class='del'>-	  drivers are using the AMBA bus interface.  Possible values include:</div><div class='del'>-		- Embedded Trace Buffer (version 1.0):</div><div class='del'>-			"arm,coresight-etb10", "arm,primecell";</div><div class='del'>-</div><div class='del'>-		- Trace Port Interface Unit:</div><div class='del'>-			"arm,coresight-tpiu", "arm,primecell";</div><div class='del'>-</div><div class='del'>-		- Trace Memory Controller, used for Embedded Trace Buffer(ETB),</div><div class='del'>-		  Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR)</div><div class='del'>-		  configuration.  The configuration mode (ETB, ETF, ETR) is</div><div class='del'>-		  discovered at boot time when the device is probed.</div><div class='del'>-			"arm,coresight-tmc", "arm,primecell";</div><div class='del'>-</div><div class='del'>-		- Trace Programmable Funnel:</div><div class='del'>-			"arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='del'>-			"arm,coresight-funnel", "arm,primecell"; (OBSOLETE. For</div><div class='del'>-				backward compatibility and will be removed)</div><div class='del'>-</div><div class='del'>-		- Embedded Trace Macrocell (version 3.x) and</div><div class='del'>-					Program Flow Trace Macrocell:</div><div class='del'>-			"arm,coresight-etm3x", "arm,primecell";</div><div class='del'>-</div><div class='del'>-		- Embedded Trace Macrocell (version 4.x), with memory mapped access.</div><div class='del'>-			"arm,coresight-etm4x", "arm,primecell";</div><div class='del'>-</div><div class='del'>-		- Embedded Trace Macrocell (version 4.x), with system register access only.</div><div class='del'>-			"arm,coresight-etm4x-sysreg";</div><div class='del'>-</div><div class='del'>-		- Coresight programmable Replicator :</div><div class='del'>-			"arm,coresight-dynamic-replicator", "arm,primecell";</div><div class='del'>-</div><div class='del'>-		- System Trace Macrocell:</div><div class='del'>-			"arm,coresight-stm", "arm,primecell"; [1]</div><div class='del'>-		- Coresight Address Translation Unit (CATU)</div><div class='del'>-			"arm,coresight-catu", "arm,primecell";</div><div class='del'>-</div><div class='del'>-		- Coresight Cross Trigger Interface (CTI):</div><div class='del'>-			"arm,coresight-cti", "arm,primecell";</div><div class='del'>-			See coresight-cti.yaml for full CTI definitions.</div><div class='del'>-</div><div class='del'>-	* reg: physical base address and length of the register</div><div class='del'>-	  set(s) of the component.</div><div class='del'>-</div><div class='del'>-	* clocks: the clocks associated to this component.</div><div class='del'>-</div><div class='del'>-	* clock-names: the name of the clocks referenced by the code.</div><div class='del'>-	  Since we are using the AMBA framework, the name of the clock</div><div class='del'>-	  providing the interconnect should be "apb_pclk", and some</div><div class='del'>-	  coresight blocks also have an additional clock "atclk", which</div><div class='del'>-	  clocks the core of that coresight component. The latter clock</div><div class='del'>-	  is optional.</div><div class='del'>-</div><div class='del'>-	* port or ports: see "Graph bindings for Coresight" below.</div><div class='del'>-</div><div class='del'>-* Additional required property for Embedded Trace Macrocell (version 3.x and</div><div class='del'>-  version 4.x):</div><div class='del'>-	* cpu: the cpu phandle this ETM/PTM is affined to. Do not</div><div class='del'>-	  assume it to default to CPU0 if omitted.</div><div class='del'>-</div><div class='del'>-* Additional required properties for System Trace Macrocells (STM):</div><div class='del'>-	* reg: along with the physical base address and length of the register</div><div class='del'>-	  set as described above, another entry is required to describe the</div><div class='del'>-	  mapping of the extended stimulus port area.</div><div class='del'>-</div><div class='del'>-	* reg-names: the only acceptable values are "stm-base" and</div><div class='del'>-	  "stm-stimulus-base", each corresponding to the areas defined in "reg".</div><div class='del'>-</div><div class='del'>-* Required properties for Coresight Cross Trigger Interface (CTI)</div><div class='del'>-	See coresight-cti.yaml for full CTI definitions.</div><div class='del'>-</div><div class='del'>-* Required properties for devices that don't show up on the AMBA bus, such as</div><div class='del'>-  non-configurable replicators and non-configurable funnels:</div><div class='del'>-</div><div class='del'>-	* compatible: Currently supported value is (note the absence of the</div><div class='del'>-	  AMBA markee):</div><div class='del'>-		- Coresight Non-configurable Replicator:</div><div class='del'>-			"arm,coresight-static-replicator";</div><div class='del'>-			"arm,coresight-replicator"; (OBSOLETE. For backward</div><div class='del'>-				compatibility and will be removed)</div><div class='del'>-</div><div class='del'>-		- Coresight Non-configurable Funnel:</div><div class='del'>-			"arm,coresight-static-funnel";</div><div class='del'>-</div><div class='del'>-	* port or ports: see "Graph bindings for Coresight" below.</div><div class='del'>-</div><div class='del'>-* Optional properties for all components:</div><div class='del'>-</div><div class='del'>-	* arm,coresight-loses-context-with-cpu : boolean. Indicates that the</div><div class='del'>-	  hardware will lose register context on CPU power down (e.g. CPUIdle).</div><div class='del'>-	  An example of where this may be needed are systems which contain a</div><div class='del'>-	  coresight component and CPU in the same power domain. When the CPU</div><div class='del'>-	  powers down the coresight component also powers down and loses its</div><div class='del'>-	  context. This property is currently only used for the ETM 4.x driver.</div><div class='del'>-</div><div class='del'>-* Optional properties for ETM/PTMs:</div><div class='del'>-</div><div class='del'>-	* arm,cp14: must be present if the system accesses ETM/PTM management</div><div class='del'>-	  registers via co-processor 14.</div><div class='del'>-</div><div class='del'>-	* qcom,skip-power-up: boolean. Indicates that an implementation can</div><div class='del'>-	  skip powering up the trace unit. TRCPDCR.PU does not have to be set</div><div class='del'>-	  on Qualcomm Technologies Inc. systems since ETMs are in the same power</div><div class='del'>-	  domain as their CPU cores. This property is required to identify such</div><div class='del'>-	  systems with hardware errata where the CPU watchdog counter is stopped</div><div class='del'>-	  when TRCPDCR.PU is set.</div><div class='del'>-</div><div class='del'>-* Optional property for TMC:</div><div class='del'>-</div><div class='del'>-	* arm,buffer-size: size of contiguous buffer space for TMC ETR</div><div class='del'>-	  (embedded trace router). This property is obsolete. The buffer size</div><div class='del'>-	  can be configured dynamically via buffer_size property in sysfs.</div><div class='del'>-</div><div class='del'>-	* arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely</div><div class='del'>-	  use the SG mode on this system.</div><div class='del'>-</div><div class='del'>-	* arm,max-burst-size: The maximum burst size initiated by TMC on the</div><div class='del'>-	  AXI master interface. The burst size can be in the range [0..15],</div><div class='del'>-	  the setting supports one data transfer per burst up to a maximum of</div><div class='del'>-	  16 data transfers per burst.</div><div class='del'>-</div><div class='del'>-* Optional property for CATU :</div><div class='del'>-	* interrupts : Exactly one SPI may be listed for reporting the address</div><div class='del'>-	  error</div><div class='del'>-</div><div class='del'>-* Optional property for configurable replicators:</div><div class='del'>-</div><div class='del'>-	* qcom,replicator-loses-context: boolean. Indicates that the replicator</div><div class='del'>-	  will lose register context when AMBA clock is removed which is observed</div><div class='del'>-	  in some replicator designs.</div><div class='del'>-</div><div class='del'>-Graph bindings for Coresight</div><div class='del'>--------------------------------</div><div class='del'>-</div><div class='del'>-Coresight components are interconnected to create a data path for the flow of</div><div class='del'>-trace data generated from the "sources" to their collection points "sink".</div><div class='del'>-Each coresight component must describe the "input" and "output" connections.</div><div class='del'>-The connections must be described via generic DT graph bindings as described</div><div class='del'>-by the "bindings/graph.txt", where each "port" along with an "endpoint"</div><div class='del'>-component represents a hardware port and the connection.</div><div class='del'>-</div><div class='del'>- * All output ports must be listed inside a child node named "out-ports"</div><div class='del'>- * All input ports must be listed inside a child node named "in-ports".</div><div class='del'>- * Port address must match the hardware port number.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-1. Sinks</div><div class='del'>-	etb@20010000 {</div><div class='del'>-		compatible = "arm,coresight-etb10", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x20010000 0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;oscclk6a&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		in-ports {</div><div class='del'>-			port {</div><div class='del'>-				etb_in_port: endpoint@0 {</div><div class='del'>-					remote-endpoint = &lt;&amp;replicator_out_port0&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tpiu@20030000 {</div><div class='del'>-		compatible = "arm,coresight-tpiu", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x20030000 0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;oscclk6a&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		in-ports {</div><div class='del'>-			port {</div><div class='del'>-				tpiu_in_port: endpoint@0 {</div><div class='del'>-					remote-endpoint = &lt;&amp;replicator_out_port1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	etr@20070000 {</div><div class='del'>-		compatible = "arm,coresight-tmc", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x20070000 0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;oscclk6a&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		in-ports {</div><div class='del'>-			port {</div><div class='del'>-				etr_in_port: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;replicator2_out_port0&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		out-ports {</div><div class='del'>-			port {</div><div class='del'>-				etr_out_port: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;catu_in_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-2. Links</div><div class='del'>-	replicator {</div><div class='del'>-		/* non-configurable replicators don't show up on the</div><div class='del'>-		 * AMBA bus.  As such no need to add "arm,primecell".</div><div class='del'>-		 */</div><div class='del'>-		compatible = "arm,coresight-static-replicator";</div><div class='del'>-</div><div class='del'>-		out-ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			/* replicator output ports */</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				replicator_out_port0: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;etb_in_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				replicator_out_port1: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;tpiu_in_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		in-ports {</div><div class='del'>-			port {</div><div class='del'>-				replicator_in_port0: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;funnel_out_port0&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	funnel {</div><div class='del'>-		/*</div><div class='del'>-		 * non-configurable funnel don't show up on the AMBA</div><div class='del'>-		 * bus.  As such no need to add "arm,primecell".</div><div class='del'>-		 */</div><div class='del'>-		compatible = "arm,coresight-static-funnel";</div><div class='del'>-		clocks = &lt;&amp;crg_ctrl HI3660_PCLK&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-</div><div class='del'>-		out-ports {</div><div class='del'>-			port {</div><div class='del'>-				combo_funnel_out: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;top_funnel_in&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		in-ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				combo_funnel_in0: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;cluster0_etf_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				combo_funnel_in1: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;cluster1_etf_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	funnel@20040000 {</div><div class='del'>-		compatible = "arm,coresight-dynamic-funnel", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x20040000 0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;oscclk6a&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		out-ports {</div><div class='del'>-			port {</div><div class='del'>-				funnel_out_port0: endpoint {</div><div class='del'>-					remote-endpoint =</div><div class='del'>-							&lt;&amp;replicator_in_port0&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		in-ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				funnel_in_port0: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;ptm0_out_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				funnel_in_port1: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;ptm1_out_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@2 {</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-				funnel_in_port2: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;etm0_out_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-3. Sources</div><div class='del'>-	ptm@2201c000 {</div><div class='del'>-		compatible = "arm,coresight-etm3x", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x2201c000 0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		cpu = &lt;&amp;cpu0&gt;;</div><div class='del'>-		clocks = &lt;&amp;oscclk6a&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		out-ports {</div><div class='del'>-			port {</div><div class='del'>-				ptm0_out_port: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;funnel_in_port0&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ptm@2201d000 {</div><div class='del'>-		compatible = "arm,coresight-etm3x", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x2201d000 0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		cpu = &lt;&amp;cpu1&gt;;</div><div class='del'>-		clocks = &lt;&amp;oscclk6a&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		out-ports {</div><div class='del'>-			port {</div><div class='del'>-				ptm1_out_port: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;funnel_in_port1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-4. STM</div><div class='del'>-	stm@20100000 {</div><div class='del'>-		compatible = "arm,coresight-stm", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x20100000 0 0x1000&gt;,</div><div class='del'>-		      &lt;0 0x28000000 0 0x180000&gt;;</div><div class='del'>-		reg-names = "stm-base", "stm-stimulus-base";</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;soc_smc50mhz&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-		out-ports {</div><div class='del'>-			port {</div><div class='del'>-				stm_out_port: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;main_funnel_in_port2&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-5. CATU</div><div class='del'>-</div><div class='del'>-	catu@207e0000 {</div><div class='del'>-		compatible = "arm,coresight-catu", "arm,primecell";</div><div class='del'>-		reg = &lt;0 0x207e0000 0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;oscclk6a&gt;;</div><div class='del'>-		clock-names = "apb_pclk";</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		in-ports {</div><div class='del'>-			port {</div><div class='del'>-				catu_in_port: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;etr_out_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-[1]. There is currently two version of STM: STM32 and STM500.  Both</div><div class='del'>-have the same HW interface and as such don't need an explicit binding name.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml<br/>index ed04650291a8..ff272e517d57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/cpus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/cpus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/cpus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/cpus.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/cpus.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM CPUs bindings</div><div class='add'>+title: ARM CPUs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</div><div class='hunk'>@@ -85,6 +85,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - apple,avalanche</div><div class='add'>+      - apple,blizzard</div><div class='ctx'>       - apple,icestorm</div><div class='ctx'>       - apple,firestorm</div><div class='ctx'>       - arm,arm710t</div><div class='hunk'>@@ -138,8 +140,11 @@ properties:</div><div class='ctx'>       - arm,cortex-a76</div><div class='ctx'>       - arm,cortex-a77</div><div class='ctx'>       - arm,cortex-a78</div><div class='add'>+      - arm,cortex-a78ae</div><div class='add'>+      - arm,cortex-a78c</div><div class='ctx'>       - arm,cortex-a510</div><div class='ctx'>       - arm,cortex-a710</div><div class='add'>+      - arm,cortex-a715</div><div class='ctx'>       - arm,cortex-m0</div><div class='ctx'>       - arm,cortex-m0+</div><div class='ctx'>       - arm,cortex-m1</div><div class='hunk'>@@ -149,7 +154,9 @@ properties:</div><div class='ctx'>       - arm,cortex-r5</div><div class='ctx'>       - arm,cortex-r7</div><div class='ctx'>       - arm,cortex-x1</div><div class='add'>+      - arm,cortex-x1c</div><div class='ctx'>       - arm,cortex-x2</div><div class='add'>+      - arm,cortex-x3</div><div class='ctx'>       - arm,neoverse-e1</div><div class='ctx'>       - arm,neoverse-n1</div><div class='ctx'>       - arm,neoverse-n2</div><div class='hunk'>@@ -173,14 +180,17 @@ properties:</div><div class='ctx'>       - nvidia,tegra194-carmel</div><div class='ctx'>       - qcom,krait</div><div class='ctx'>       - qcom,kryo</div><div class='add'>+      - qcom,kryo240</div><div class='ctx'>       - qcom,kryo250</div><div class='ctx'>       - qcom,kryo260</div><div class='ctx'>       - qcom,kryo280</div><div class='add'>+      - qcom,kryo360</div><div class='ctx'>       - qcom,kryo385</div><div class='ctx'>       - qcom,kryo468</div><div class='ctx'>       - qcom,kryo485</div><div class='ctx'>       - qcom,kryo560</div><div class='ctx'>       - qcom,kryo570</div><div class='add'>+      - qcom,kryo660</div><div class='ctx'>       - qcom,kryo685</div><div class='ctx'>       - qcom,kryo780</div><div class='ctx'>       - qcom,scorpion</div><div class='hunk'>@@ -221,6 +231,7 @@ properties:</div><div class='ctx'>           - qcom,kpss-acc-v1</div><div class='ctx'>           - qcom,kpss-acc-v2</div><div class='ctx'>           - qcom,msm8226-smp</div><div class='add'>+          - qcom,msm8909-smp</div><div class='ctx'>           # Only valid on ARM 32-bit, see above for ARM v8 64-bit</div><div class='ctx'>           - qcom,msm8916-smp</div><div class='ctx'>           - renesas,apmu</div><div class='hunk'>@@ -252,7 +263,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   capacity-dmips-mhz:</div><div class='ctx'>     description:</div><div class='del'>-      u32 value representing CPU capacity (see ./cpu-capacity.txt) in</div><div class='add'>+      u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in</div><div class='ctx'>       DMIPS/MHz, relative to highest capacity-dmips-mhz</div><div class='ctx'>       in the system.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/digicolor.yaml b/Documentation/devicetree/bindings/arm/digicolor.yaml<br/>index a35de3c9e284..0cf9ddaa527e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/digicolor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/digicolor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/digicolor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/digicolor.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/digicolor.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Conexant Digicolor Platforms Device Tree Bindings</div><div class='add'>+title: Conexant Digicolor Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Baruch Siach &lt;baruch@tkos.co.il&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml<br/>index 9a426110a14a..5d033570b57b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/firmware/linaro,optee-tz.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: OP-TEE Device Tree Bindings</div><div class='add'>+title: OP-TEE</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jens Wiklander &lt;jens.wiklander@linaro.org&gt;</div><div class='hunk'>@@ -28,7 +28,8 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: |</div><div class='ctx'>       This interrupt which is used to signal an event by the secure world</div><div class='del'>-      software is expected to be edge-triggered.</div><div class='add'>+      software is expected to be either a per-cpu interrupt or an</div><div class='add'>+      edge-triggered peripheral interrupt.</div><div class='ctx'> </div><div class='ctx'>   method:</div><div class='ctx'>     enum: [smc, hvc]</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt<br/>deleted file mode 100644<br/>index 10a91cc8b997..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-Freescale DCFG</div><div class='del'>-</div><div class='del'>-DCFG is the device configuration unit, that provides general purpose</div><div class='del'>-configuration and status for the device. Such as setting the secondary</div><div class='del'>-core start address and release the secondary core from holdoff and startup.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: Should contain a chip-specific compatible string,</div><div class='del'>-	Chip-specific strings are of the form "fsl,&lt;chip&gt;-dcfg",</div><div class='del'>-	The following &lt;chip&gt;s are known to be supported:</div><div class='del'>-	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a</div><div class='del'>-</div><div class='del'>-  - reg : should contain base address and length of DCFG memory-mapped registers</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	dcfg: dcfg@1ee0000 {</div><div class='del'>-		compatible = "fsl,ls1021a-dcfg";</div><div class='del'>-		reg = &lt;0x0 0x1ee0000 0x0 0x10000&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt<br/>deleted file mode 100644<br/>index 0ab67b0b216d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-scfg.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-Freescale SCFG</div><div class='del'>-</div><div class='del'>-SCFG is the supplemental configuration unit, that provides SoC specific</div><div class='del'>-configuration and status registers for the chip. Such as getting PEX port</div><div class='del'>-status.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: Should contain a chip-specific compatible string,</div><div class='del'>-	Chip-specific strings are of the form "fsl,&lt;chip&gt;-scfg",</div><div class='del'>-	The following &lt;chip&gt;s are known to be supported:</div><div class='del'>-	ls1012a, ls1021a, ls1043a, ls1046a, ls2080a.</div><div class='del'>-</div><div class='del'>-  - reg: should contain base address and length of SCFG memory-mapped registers</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	scfg: scfg@1570000 {</div><div class='del'>-		compatible = "fsl,ls1021a-scfg";</div><div class='del'>-		reg = &lt;0x0 0x1570000 0x0 0x10000&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt<br/>deleted file mode 100644<br/>index a87ec15e28d2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,271 +0,0 @@</div><div class='del'>-NXP i.MX System Controller Firmware (SCFW)</div><div class='del'>---------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-The System Controller Firmware (SCFW) is a low-level system function</div><div class='del'>-which runs on a dedicated Cortex-M core to provide power, clock, and</div><div class='del'>-resource management. It exists on some i.MX8 processors. e.g. i.MX8QM</div><div class='del'>-(QM, QP), and i.MX8QX (QXP, DX).</div><div class='del'>-</div><div class='del'>-The AP communicates with the SC using a multi-ported MU module found</div><div class='del'>-in the LSIO subsystem. The current definition of this MU module provides</div><div class='del'>-5 remote AP connections to the SC to support up to 5 execution environments</div><div class='del'>-(TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces</div><div class='del'>-with the LSIO DSC IP bus. The SC firmware will communicate with this MU</div><div class='del'>-using the MSI bus.</div><div class='del'>-</div><div class='del'>-System Controller Device Node:</div><div class='del'>-============================================================</div><div class='del'>-</div><div class='del'>-The scu node with the following properties shall be under the /firmware/ node.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>--------------------</div><div class='del'>-- compatible:	should be "fsl,imx-scu".</div><div class='del'>-- mbox-names:	should include "tx0", "tx1", "tx2", "tx3",</div><div class='del'>-			       "rx0", "rx1", "rx2", "rx3";</div><div class='del'>-		include "gip3" if want to support general MU interrupt.</div><div class='del'>-- mboxes:	List of phandle of 4 MU channels for tx, 4 MU channels for</div><div class='del'>-		rx, and 1 optional MU channel for general interrupt.</div><div class='del'>-		All MU channels must be in the same MU instance.</div><div class='del'>-		Cross instances are not allowed. The MU instance can only</div><div class='del'>-		be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need</div><div class='del'>-		to make sure use the one which is not conflict with other</div><div class='del'>-		execution environments. e.g. ATF.</div><div class='del'>-		Note:</div><div class='del'>-		Channel 0 must be "tx0" or "rx0".</div><div class='del'>-		Channel 1 must be "tx1" or "rx1".</div><div class='del'>-		Channel 2 must be "tx2" or "rx2".</div><div class='del'>-		Channel 3 must be "tx3" or "rx3".</div><div class='del'>-		General interrupt rx channel must be "gip3".</div><div class='del'>-		e.g.</div><div class='del'>-		mboxes = &lt;&amp;lsio_mu1 0 0</div><div class='del'>-			  &amp;lsio_mu1 0 1</div><div class='del'>-			  &amp;lsio_mu1 0 2</div><div class='del'>-			  &amp;lsio_mu1 0 3</div><div class='del'>-			  &amp;lsio_mu1 1 0</div><div class='del'>-			  &amp;lsio_mu1 1 1</div><div class='del'>-			  &amp;lsio_mu1 1 2</div><div class='del'>-			  &amp;lsio_mu1 1 3</div><div class='del'>-			  &amp;lsio_mu1 3 3&gt;;</div><div class='del'>-		See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml</div><div class='del'>-		for detailed mailbox binding.</div><div class='del'>-</div><div class='del'>-Note: Each mu which supports general interrupt should have an alias correctly</div><div class='del'>-numbered in "aliases" node.</div><div class='del'>-e.g.</div><div class='del'>-aliases {</div><div class='del'>-	mu1 = &amp;lsio_mu1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-i.MX SCU Client Device Node:</div><div class='del'>-============================================================</div><div class='del'>-</div><div class='del'>-Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='del'>-</div><div class='del'>-Power domain bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-This binding for the SCU power domain providers uses the generic power</div><div class='del'>-domain binding[2].</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Should be one of:</div><div class='del'>-			  "fsl,imx8qm-scu-pd",</div><div class='del'>-			  "fsl,imx8qxp-scu-pd"</div><div class='del'>-			followed by "fsl,scu-pd"</div><div class='del'>-</div><div class='del'>-- #power-domain-cells:	Must be 1. Contains the Resource ID used by</div><div class='del'>-			SCU commands.</div><div class='del'>-			See detailed Resource ID list from:</div><div class='del'>-			include/dt-bindings/firmware/imx/rsrc.h</div><div class='del'>-</div><div class='del'>-Clock bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-This binding uses the common clock binding[1].</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Should be one of:</div><div class='del'>-			  "fsl,imx8dxl-clk"</div><div class='del'>-			  "fsl,imx8qm-clk"</div><div class='del'>-			  "fsl,imx8qxp-clk"</div><div class='del'>-			followed by "fsl,scu-clk"</div><div class='del'>-- #clock-cells:		Should be 2.</div><div class='del'>-			Contains the Resource and Clock ID value.</div><div class='del'>-- clocks:		List of clock specifiers, must contain an entry for</div><div class='del'>-			each required entry in clock-names</div><div class='del'>-- clock-names:		Should include entries "xtal_32KHz", "xtal_24MHz"</div><div class='del'>-</div><div class='del'>-The clock consumer should specify the desired clock by having the clock</div><div class='del'>-ID in its "clocks" phandle cell.</div><div class='del'>-</div><div class='del'>-See the full list of clock IDs from:</div><div class='del'>-include/dt-bindings/clock/imx8qxp-clock.h</div><div class='del'>-</div><div class='del'>-Pinctrl bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-This binding uses the i.MX common pinctrl binding[3].</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Should be one of:</div><div class='del'>-			"fsl,imx8qm-iomuxc",</div><div class='del'>-			"fsl,imx8qxp-iomuxc",</div><div class='del'>-			"fsl,imx8dxl-iomuxc".</div><div class='del'>-</div><div class='del'>-Required properties for Pinctrl sub nodes:</div><div class='del'>-- fsl,pins:		Each entry consists of 3 integers which represents</div><div class='del'>-			the mux and config setting for one pin. The first 2</div><div class='del'>-			integers &lt;pin_id mux_mode&gt; are specified using a</div><div class='del'>-			PIN_FUNC_ID macro, which can be found in</div><div class='del'>-			&lt;dt-bindings/pinctrl/pads-imx8qm.h&gt;,</div><div class='del'>-			&lt;dt-bindings/pinctrl/pads-imx8qxp.h&gt;,</div><div class='del'>-			&lt;dt-bindings/pinctrl/pads-imx8dxl.h&gt;.</div><div class='del'>-			The last integer CONFIG is the pad setting value like</div><div class='del'>-			pull-up on this pin.</div><div class='del'>-</div><div class='del'>-			Please refer to i.MX8QXP Reference Manual for detailed</div><div class='del'>-			CONFIG settings.</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-[2] Documentation/devicetree/bindings/power/power-domain.yaml</div><div class='del'>-[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt</div><div class='del'>-</div><div class='del'>-RTC bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "fsl,imx8qxp-sc-rtc";</div><div class='del'>-</div><div class='del'>-OCOTP bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Should be one of:</div><div class='del'>-			"fsl,imx8qm-scu-ocotp",</div><div class='del'>-			"fsl,imx8qxp-scu-ocotp".</div><div class='del'>-- #address-cells:	Must be 1. Contains byte index</div><div class='del'>-- #size-cells:		Must be 1. Contains byte length</div><div class='del'>-</div><div class='del'>-Optional Child nodes:</div><div class='del'>-</div><div class='del'>-- Data cells of ocotp:</div><div class='del'>-  Detailed bindings are described in bindings/nvmem/nvmem.txt</div><div class='del'>-</div><div class='del'>-Watchdog bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be:</div><div class='del'>-              "fsl,imx8qxp-sc-wdt"</div><div class='del'>-              followed by "fsl,imx-sc-wdt";</div><div class='del'>-Optional properties:</div><div class='del'>-- timeout-sec: contains the watchdog timeout in seconds.</div><div class='del'>-</div><div class='del'>-SCU key bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be:</div><div class='del'>-              "fsl,imx8qxp-sc-key"</div><div class='del'>-              followed by "fsl,imx-sc-key";</div><div class='del'>-- linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml</div><div class='del'>-</div><div class='del'>-Thermal bindings based on SCU Message Protocol</div><div class='del'>-------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:			Should be :</div><div class='del'>-				  "fsl,imx8qxp-sc-thermal"</div><div class='del'>-				followed by "fsl,imx-sc-thermal";</div><div class='del'>-</div><div class='del'>-- #thermal-sensor-cells:	See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml</div><div class='del'>-				for a description.</div><div class='del'>-</div><div class='del'>-Example (imx8qxp):</div><div class='del'>--------------</div><div class='del'>-aliases {</div><div class='del'>-	mu1 = &amp;lsio_mu1;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-lsio_mu1: mailbox@5d1c0000 {</div><div class='del'>-	...</div><div class='del'>-	#mbox-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-firmware {</div><div class='del'>-	scu {</div><div class='del'>-		compatible = "fsl,imx-scu";</div><div class='del'>-		mbox-names = "tx0", "tx1", "tx2", "tx3",</div><div class='del'>-			     "rx0", "rx1", "rx2", "rx3",</div><div class='del'>-			     "gip3";</div><div class='del'>-		mboxes = &lt;&amp;lsio_mu1 0 0</div><div class='del'>-			  &amp;lsio_mu1 0 1</div><div class='del'>-			  &amp;lsio_mu1 0 2</div><div class='del'>-			  &amp;lsio_mu1 0 3</div><div class='del'>-			  &amp;lsio_mu1 1 0</div><div class='del'>-			  &amp;lsio_mu1 1 1</div><div class='del'>-			  &amp;lsio_mu1 1 2</div><div class='del'>-			  &amp;lsio_mu1 1 3</div><div class='del'>-			  &amp;lsio_mu1 3 3&gt;;</div><div class='del'>-</div><div class='del'>-		clk: clk {</div><div class='del'>-			compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";</div><div class='del'>-			#clock-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		iomuxc {</div><div class='del'>-			compatible = "fsl,imx8qxp-iomuxc";</div><div class='del'>-</div><div class='del'>-			pinctrl_lpuart0: lpuart0grp {</div><div class='del'>-				fsl,pins = &lt;</div><div class='del'>-					SC_P_UART0_RX_ADMA_UART0_RX	0x06000020</div><div class='del'>-					SC_P_UART0_TX_ADMA_UART0_TX	0x06000020</div><div class='del'>-				&gt;;</div><div class='del'>-			};</div><div class='del'>-			...</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ocotp: imx8qx-ocotp {</div><div class='del'>-			compatible = "fsl,imx8qxp-scu-ocotp";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			fec_mac0: mac@2c4 {</div><div class='del'>-				reg = &lt;0x2c4 8&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pd: imx8qx-pd {</div><div class='del'>-			compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";</div><div class='del'>-			#power-domain-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtc: rtc {</div><div class='del'>-			compatible = "fsl,imx8qxp-sc-rtc";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		scu_key: scu-key {</div><div class='del'>-			compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";</div><div class='del'>-			linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		watchdog {</div><div class='del'>-			compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";</div><div class='del'>-			timeout-sec = &lt;60&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		tsens: thermal-sensor {</div><div class='del'>-			compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";</div><div class='del'>-			#thermal-sensor-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-serial@5a060000 {</div><div class='del'>-	...</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_lpuart0&gt;;</div><div class='del'>-	clocks = &lt;&amp;uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER&gt;;</div><div class='del'>-	clock-names = "ipg";</div><div class='del'>-	power-domains = &lt;&amp;pd IMX_SC_R_UART_0&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml<br/>index 08bdd30e511c..15d411084065 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/fsl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/fsl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/fsl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/fsl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/fsl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale i.MX Platforms Device Tree Bindings</div><div class='add'>+title: Freescale i.MX Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='hunk'>@@ -88,12 +88,56 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - armadeus,imx28-apf28      # APF28 SoM</div><div class='del'>-              - armadeus,imx28-apf28dev   # APF28 SoM on APF28Dev board</div><div class='add'>+              - bluegiga,apx4devkit       # Bluegiga APx4 SoM on dev board</div><div class='add'>+              - crystalfontz,cfa10036     # Crystalfontz CFA-10036 SoM</div><div class='add'>+              - eukrea,mbmx28lc</div><div class='ctx'>               - fsl,imx28-evk</div><div class='ctx'>               - i2se,duckbill</div><div class='ctx'>               - i2se,duckbill-2</div><div class='add'>+              - karo,tx28                 # Ka-Ro electronics TX28 module</div><div class='add'>+              - lwn,imx28-xea</div><div class='add'>+              - msr,m28cu3                # M28 SoM with custom base board</div><div class='add'>+              - schulercontrol,imx28-sps1</div><div class='ctx'>               - technologic,imx28-ts4600</div><div class='ctx'>           - const: fsl,imx28</div><div class='add'>+</div><div class='add'>+      - description: i.MX28 Aries M28 SoM Board</div><div class='add'>+        items:</div><div class='add'>+          - const: aries,m28</div><div class='add'>+          - const: denx,m28</div><div class='add'>+          - const: fsl,imx28</div><div class='add'>+</div><div class='add'>+      - description: i.MX28 Aries M28EVK Board</div><div class='add'>+        items:</div><div class='add'>+          - const: aries,m28evk</div><div class='add'>+          - const: denx,m28evk</div><div class='add'>+          - const: fsl,imx28</div><div class='add'>+</div><div class='add'>+      - description: i.MX28 Armadeus Systems APF28Dev Board</div><div class='add'>+        items:</div><div class='add'>+          - const: armadeus,imx28-apf28dev</div><div class='add'>+          - const: armadeus,imx28-apf28</div><div class='add'>+          - const: fsl,imx28</div><div class='add'>+</div><div class='add'>+      - description: i.MX28 Crystalfontz CFA-10036 based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - crystalfontz,cfa10037</div><div class='add'>+              - crystalfontz,cfa10049</div><div class='add'>+              - crystalfontz,cfa10057</div><div class='add'>+              - crystalfontz,cfa10058</div><div class='add'>+          - const: crystalfontz,cfa10036</div><div class='add'>+          - const: fsl,imx28</div><div class='add'>+</div><div class='add'>+      - description: i.MX28 Crystalfontz CFA-10037 based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - crystalfontz,cfa10055</div><div class='add'>+              - crystalfontz,cfa10056</div><div class='add'>+          - const: crystalfontz,cfa10037</div><div class='add'>+          - const: crystalfontz,cfa10036</div><div class='add'>+          - const: fsl,imx28</div><div class='add'>+</div><div class='ctx'>       - description: i.MX28 Duckbill 2 based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -103,6 +147,19 @@ properties:</div><div class='ctx'>           - const: i2se,duckbill-2</div><div class='ctx'>           - const: fsl,imx28</div><div class='ctx'> </div><div class='add'>+      - description: i.MX28 Eukrea Electromatique MBMX283LC Board</div><div class='add'>+        items:</div><div class='add'>+          - const: eukrea,mbmx283lc</div><div class='add'>+          - const: eukrea,mbmx28lc</div><div class='add'>+          - const: fsl,imx28</div><div class='add'>+</div><div class='add'>+      - description: i.MX28 Eukrea Electromatique MBMX287LC Board</div><div class='add'>+        items:</div><div class='add'>+          - const: eukrea,mbmx287lc</div><div class='add'>+          - const: eukrea,mbmx283lc</div><div class='add'>+          - const: eukrea,mbmx28lc</div><div class='add'>+          - const: fsl,imx28</div><div class='add'>+</div><div class='ctx'>       - description: i.MX31 based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -172,7 +229,8 @@ properties:</div><div class='ctx'>               - karo,tx53                     # Ka-Ro electronics TX53 module</div><div class='ctx'>               - kiebackpeter,imx53-ddc        # K+P imx53 DDC</div><div class='ctx'>               - kiebackpeter,imx53-hsc        # K+P imx53 HSC</div><div class='del'>-              - menlo,m53menlo</div><div class='add'>+              - menlo,m53menlo                # i.MX53 Menlo board</div><div class='add'>+              - starterkit,sk-imx53</div><div class='ctx'>               - voipac,imx53-dmm-668          # Voipac i.MX53 X53-DMM-668</div><div class='ctx'>           - const: fsl,imx53</div><div class='ctx'> </div><div class='hunk'>@@ -192,6 +250,7 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - auvidea,h100              # Auvidea H100</div><div class='add'>+              - bosch,imx6q-acc           # Bosch ACC i.MX6 Dual</div><div class='ctx'>               - boundary,imx6q-nitrogen6_max</div><div class='ctx'>               - boundary,imx6q-nitrogen6_som2</div><div class='ctx'>               - boundary,imx6q-nitrogen6x</div><div class='hunk'>@@ -241,6 +300,7 @@ properties:</div><div class='ctx'>               - variscite,dt6customboard</div><div class='ctx'>               - wand,imx6q-wandboard      # Wandboard i.MX6 Quad Board</div><div class='ctx'>               - ysoft,imx6q-yapp4-crux    # i.MX6 Quad Y Soft IOTA Crux board</div><div class='add'>+              - ysoft,imx6q-yapp4-pegasus # i.MX6 Quad Y Soft IOTA Pegasus board</div><div class='ctx'>               - zealz,imx6q-gk802         # Zealz GK802</div><div class='ctx'>               - zii,imx6q-zii-rdu2        # ZII RDU2 Board</div><div class='ctx'>           - const: fsl,imx6q</div><div class='hunk'>@@ -320,6 +380,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - toradex,apalis_imx6q-ixora      # Apalis iMX6Q/D Module on Ixora Carrier Board</div><div class='ctx'>               - toradex,apalis_imx6q-ixora-v1.1 # Apalis iMX6Q/D Module on Ixora V1.1 Carrier Board</div><div class='add'>+              - toradex,apalis_imx6q-ixora-v1.2 # Apalis iMX6Q/D Module on Ixora V1.2 Carrier Board</div><div class='ctx'>               - toradex,apalis_imx6q-eval       # Apalis iMX6Q/D Module on Apalis Evaluation Board</div><div class='ctx'>           - const: toradex,apalis_imx6q</div><div class='ctx'>           - const: fsl,imx6q</div><div class='hunk'>@@ -350,6 +411,7 @@ properties:</div><div class='ctx'>               - prt,prtwd3                # Protonic WD3 board</div><div class='ctx'>               - wand,imx6qp-wandboard     # Wandboard i.MX6 QuadPlus Board</div><div class='ctx'>               - ysoft,imx6qp-yapp4-crux-plus  # i.MX6 Quad Plus Y Soft IOTA Crux+ board</div><div class='add'>+              - ysoft,imx6qp-yapp4-pegasus-plus # i.MX6 Quad Plus Y Soft IOTA Pegasus+ board</div><div class='ctx'>               - zii,imx6qp-zii-rdu2       # ZII RDU2+ Board</div><div class='ctx'>           - const: fsl,imx6qp</div><div class='ctx'> </div><div class='hunk'>@@ -411,13 +473,14 @@ properties:</div><div class='ctx'>               - technologic,imx6dl-ts4900</div><div class='ctx'>               - technologic,imx6dl-ts7970</div><div class='ctx'>               - toradex,colibri_imx6dl      # Colibri iMX6 Modules</div><div class='del'>-              - toradex,colibri_imx6dl-v1_1 # Colibri iMX6 V1.1 Modules</div><div class='ctx'>               - udoo,imx6dl-udoo          # Udoo i.MX6 Dual-lite Board</div><div class='ctx'>               - vdl,lanmcu                # Van der Laan LANMCU board</div><div class='ctx'>               - wand,imx6dl-wandboard     # Wandboard i.MX6 Dual Lite Board</div><div class='del'>-              - ysoft,imx6dl-yapp4-draco  # i.MX6 DualLite Y Soft IOTA Draco board</div><div class='add'>+              - ysoft,imx6dl-yapp4-draco  # i.MX6 Solo Y Soft IOTA Draco board</div><div class='ctx'>               - ysoft,imx6dl-yapp4-hydra  # i.MX6 DualLite Y Soft IOTA Hydra board</div><div class='add'>+              - ysoft,imx6dl-yapp4-lynx   # i.MX6 DualLite Y Soft IOTA Lynx board</div><div class='ctx'>               - ysoft,imx6dl-yapp4-orion  # i.MX6 DualLite Y Soft IOTA Orion board</div><div class='add'>+              - ysoft,imx6dl-yapp4-phoenix  # i.MX6 DualLite Y Soft IOTA Phoenix board</div><div class='ctx'>               - ysoft,imx6dl-yapp4-ursa   # i.MX6 Solo Y Soft IOTA Ursa board</div><div class='ctx'>           - const: fsl,imx6dl</div><div class='ctx'> </div><div class='hunk'>@@ -488,17 +551,13 @@ properties:</div><div class='ctx'>       - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S Modules</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - toradex,colibri_imx6dl-aster        # Colibri iMX6DL/S Module on Aster Board</div><div class='ctx'>               - toradex,colibri_imx6dl-eval-v3      # Colibri iMX6DL/S Module on Colibri Evaluation Board V3</div><div class='add'>+              - toradex,colibri_imx6dl-iris         # Colibri iMX6DL/S Module on Iris Board</div><div class='add'>+              - toradex,colibri_imx6dl-iris-v2      # Colibri iMX6DL/S Module on Iris Board V2</div><div class='ctx'>           - const: toradex,colibri_imx6dl           # Colibri iMX6DL/S Module</div><div class='ctx'>           - const: fsl,imx6dl</div><div class='ctx'> </div><div class='del'>-      - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S V1.1 Modules</div><div class='del'>-        items:</div><div class='del'>-          - enum:</div><div class='del'>-              - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6DL/S V1.1 M. on Colibri Evaluation Board V3</div><div class='del'>-          - const: toradex,colibri_imx6dl-v1_1      # Colibri iMX6DL/S V1.1 Module</div><div class='del'>-          - const: fsl,imx6dl</div><div class='del'>-</div><div class='ctx'>       - description: i.MX6S DHCOM DRC02 Board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: dh,imx6s-dhcom-drc02</div><div class='hunk'>@@ -523,8 +582,10 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx6sl-evk            # i.MX6 SoloLite EVK Board</div><div class='add'>+              - kobo,aura2</div><div class='ctx'>               - kobo,tolino-shine2hd</div><div class='ctx'>               - kobo,tolino-shine3</div><div class='add'>+              - kobo,tolino-vision</div><div class='ctx'>               - kobo,tolino-vision5</div><div class='ctx'>               - revotics,imx6sl-warp      # Revotics WaRP Board</div><div class='ctx'>           - const: fsl,imx6sl</div><div class='hunk'>@@ -557,8 +618,7 @@ properties:</div><div class='ctx'>               - engicam,imx6ul-isiot      # Engicam Is.IoT MX6UL eMMC/NAND Starter kit</div><div class='ctx'>               - fsl,imx6ul-14x14-evk      # i.MX6 UltraLite 14x14 EVK Board</div><div class='ctx'>               - karo,imx6ul-tx6ul         # Ka-Ro electronics TXUL-0010 Module</div><div class='del'>-              - kontron,imx6ul-n6310-som  # Kontron N6310 SOM</div><div class='del'>-              - kontron,imx6ul-n6311-som  # Kontron N6311 SOM</div><div class='add'>+              - kontron,sl-imx6ul         # Kontron SL i.MX6UL SoM</div><div class='ctx'>               - prt,prti6g                # Protonic PRTI6G Board</div><div class='ctx'>               - technexion,imx6ul-pico-dwarf   # TechNexion i.MX6UL Pico-Dwarf</div><div class='ctx'>               - technexion,imx6ul-pico-hobbit  # TechNexion i.MX6UL Pico-Hobbit</div><div class='hunk'>@@ -594,23 +654,39 @@ properties:</div><div class='ctx'>           - const: phytec,imx6ul-pcl063   # PHYTEC phyCORE-i.MX 6UL</div><div class='ctx'>           - const: fsl,imx6ul</div><div class='ctx'> </div><div class='del'>-      - description: Kontron N6310 S Board</div><div class='add'>+      - description: Kontron BL i.MX6UL (N631X S) Board</div><div class='ctx'>         items:</div><div class='del'>-          - const: kontron,imx6ul-n6310-s</div><div class='del'>-          - const: kontron,imx6ul-n6310-som</div><div class='add'>+          - const: kontron,bl-imx6ul       # Kontron BL i.MX6UL Carrier Board</div><div class='add'>+          - const: kontron,sl-imx6ul       # Kontron SL i.MX6UL SoM</div><div class='ctx'>           - const: fsl,imx6ul</div><div class='ctx'> </div><div class='del'>-      - description: Kontron N6311 S Board</div><div class='add'>+      - description: Kontron BL i.MX6UL 43 (N631X S 43) Board</div><div class='ctx'>         items:</div><div class='del'>-          - const: kontron,imx6ul-n6311-s</div><div class='del'>-          - const: kontron,imx6ul-n6311-som</div><div class='add'>+          - const: kontron,bl-imx6ul-43    # Kontron BL i.MX6UL Carrier Board with 4.3" Display</div><div class='add'>+          - const: kontron,bl-imx6ul       # Kontron BL i.MX6UL Carrier Board</div><div class='add'>+          - const: kontron,sl-imx6ul       # Kontron SL i.MX6UL SoM</div><div class='ctx'>           - const: fsl,imx6ul</div><div class='ctx'> </div><div class='del'>-      - description: Kontron N6310 S 43 Board</div><div class='add'>+      - description: TQ-Systems TQMa6UL1 SoM on MBa6ULx board</div><div class='ctx'>         items:</div><div class='del'>-          - const: kontron,imx6ul-n6310-s-43</div><div class='del'>-          - const: kontron,imx6ul-n6310-s</div><div class='del'>-          - const: kontron,imx6ul-n6310-som</div><div class='add'>+          - enum:</div><div class='add'>+              - tq,imx6ul-tqma6ul1-mba6ulx</div><div class='add'>+          - const: tq,imx6ul-tqma6ul1      # MCIMX6G1</div><div class='add'>+          - const: fsl,imx6ul</div><div class='add'>+</div><div class='add'>+      - description: TQ-Systems TQMa6UL2 SoM on MBa6ULx board</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - tq,imx6ul-tqma6ul2-mba6ulx</div><div class='add'>+          - const: tq,imx6ul-tqma6ul2      # MCIMX6G2</div><div class='add'>+          - const: fsl,imx6ul</div><div class='add'>+</div><div class='add'>+      - description: TQ-Systems TQMa6ULxL SoM on MBa6ULx[L] board</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - tq,imx6ul-tqma6ul2l-mba6ulx # using LGA adapter</div><div class='add'>+              - tq,imx6ul-tqma6ul2l-mba6ulxl</div><div class='add'>+          - const: tq,imx6ul-tqma6ul2l      # MCIMX6G2, LGA SoM variant</div><div class='ctx'>           - const: fsl,imx6ul</div><div class='ctx'> </div><div class='ctx'>       - description: i.MX6ULL based Boards</div><div class='hunk'>@@ -618,7 +694,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx6ull-14x14-evk     # i.MX6 UltraLiteLite 14x14 EVK Board</div><div class='ctx'>               - joz,jozacp                # JOZ Access Point</div><div class='del'>-              - kontron,imx6ull-n6411-som # Kontron N6411 SOM</div><div class='add'>+              - kontron,sl-imx6ull        # Kontron SL i.MX6ULL SoM</div><div class='ctx'>               - myir,imx6ull-mys-6ulx-eval # MYiR Tech iMX6ULL Evaluation Board</div><div class='ctx'>               - toradex,colibri-imx6ull      # Colibri iMX6ULL Modules</div><div class='ctx'>               - toradex,colibri-imx6ull-emmc # Colibri iMX6ULL 1GB (eMMC) Module</div><div class='hunk'>@@ -631,6 +707,25 @@ properties:</div><div class='ctx'>           - const: armadeus,imx6ull-opos6ul     # OPOS6UL (i.MX6ULL) SoM</div><div class='ctx'>           - const: fsl,imx6ull</div><div class='ctx'> </div><div class='add'>+      - description: i.MX6ULL chargebyte Tarragon Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - chargebyte,imx6ull-tarragon-master</div><div class='add'>+              - chargebyte,imx6ull-tarragon-micro</div><div class='add'>+              - chargebyte,imx6ull-tarragon-slave</div><div class='add'>+              - chargebyte,imx6ull-tarragon-slavext</div><div class='add'>+          - const: fsl,imx6ull</div><div class='add'>+</div><div class='add'>+      - description: i.MX6ULL DHCOM SoM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - dh,imx6ull-dhcom-drc02</div><div class='add'>+              - dh,imx6ull-dhcom-pdk2</div><div class='add'>+              - dh,imx6ull-dhcom-picoitx</div><div class='add'>+          - const: dh,imx6ull-dhcom-som # The DHCOR is soldered on the DHCOM</div><div class='add'>+          - const: dh,imx6ull-dhcor-som</div><div class='add'>+          - const: fsl,imx6ull</div><div class='add'>+</div><div class='ctx'>       - description: i.MX6ULL PHYTEC phyBOARD-Segin</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -640,31 +735,64 @@ properties:</div><div class='ctx'>           - const: phytec,imx6ull-pcl063  # PHYTEC phyCORE-i.MX 6ULL</div><div class='ctx'>           - const: fsl,imx6ull</div><div class='ctx'> </div><div class='add'>+      - description: i.MX6ULL PHYTEC phyGATE-Tauri</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - phytec,imx6ull-phygate-tauri-emmc</div><div class='add'>+              - phytec,imx6ull-phygate-tauri-nand</div><div class='add'>+          - const: phytec,imx6ull-phygate-tauri # PHYTEC phyGATE-Tauri with i.MX6 ULL</div><div class='add'>+          - const: phytec,imx6ull-pcl063        # PHYTEC phyCORE-i.MX 6ULL</div><div class='add'>+          - const: fsl,imx6ull</div><div class='add'>+</div><div class='ctx'>       - description: i.MX6ULL Boards with Toradex Colibri iMX6ULL Modules</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - toradex,colibri-imx6ull-eval      # Colibri iMX6ULL Module on Colibri Evaluation Board</div><div class='add'>+              - toradex,colibri-imx6ull-aster     # Aster Carrier Board</div><div class='add'>+              - toradex,colibri-imx6ull-eval      # Colibri Evaluation Board V3</div><div class='add'>+              - toradex,colibri-imx6ull-iris      # Iris Carrier Board</div><div class='add'>+              - toradex,colibri-imx6ull-iris-v2   # Iris V2 Carrier Board</div><div class='ctx'>           - const: toradex,colibri-imx6ull        # Colibri iMX6ULL Module</div><div class='del'>-          - const: fsl,imx6dl</div><div class='add'>+          - const: fsl,imx6ull</div><div class='ctx'> </div><div class='ctx'>       - description: i.MX6ULL Boards with Toradex Colibri iMX6ULL 1GB (eMMC) Module</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - toradex,colibri-imx6ull-emmc-eval # Colibri iMX6ULL 1GB (eMMC) M. on Colibri Evaluation Board</div><div class='del'>-          - const: toradex,colibri-imx6ull-emmc   # Colibri iMX6ULL 1GB (eMMC) Module</div><div class='del'>-          - const: fsl,imx6dl</div><div class='add'>+              - toradex,colibri-imx6ull-emmc-aster     # Aster Carrier Board</div><div class='add'>+              - toradex,colibri-imx6ull-emmc-eval      # Colibri Evaluation B. V3</div><div class='add'>+              - toradex,colibri-imx6ull-emmc-iris      # Iris Carrier Board</div><div class='add'>+              - toradex,colibri-imx6ull-emmc-iris-v2   # Iris V2 Carrier Board</div><div class='add'>+          - const: toradex,colibri-imx6ull-emmc        # Colibri iMX6ULL 1GB (eMMC) Module</div><div class='add'>+          - const: fsl,imx6ull</div><div class='ctx'> </div><div class='ctx'>       - description: i.MX6ULL Boards with Toradex Colibri iMX6ULL Wi-Fi / BT Modules</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / BT M. on Colibri Evaluation Board</div><div class='del'>-          - const: toradex,colibri-imx6ull-wifi   # Colibri iMX6ULL Wi-Fi / BT Module</div><div class='del'>-          - const: fsl,imx6dl</div><div class='add'>+              - toradex,colibri-imx6ull-wifi-eval     # Colibri Eval. B. V3</div><div class='add'>+              - toradex,colibri-imx6ull-wifi-aster    # Aster Carrier Board</div><div class='add'>+              - toradex,colibri-imx6ull-wifi-iris     # Iris Carrier Board</div><div class='add'>+              - toradex,colibri-imx6ull-wifi-iris-v2  # Iris V2 Carrier Board</div><div class='add'>+          - const: toradex,colibri-imx6ull-wifi       # Colibri iMX6ULL Wi-Fi / BT Module</div><div class='add'>+          - const: fsl,imx6ull</div><div class='ctx'> </div><div class='del'>-      - description: Kontron N6411 S Board</div><div class='add'>+      - description: Kontron BL i.MX6ULL (N6411 S) Board</div><div class='ctx'>         items:</div><div class='del'>-          - const: kontron,imx6ull-n6411-s</div><div class='del'>-          - const: kontron,imx6ull-n6411-som</div><div class='add'>+          - const: kontron,bl-imx6ull   # Kontron BL i.MX6ULL Carrier Board</div><div class='add'>+          - const: kontron,sl-imx6ull   # Kontron SL i.MX6ULL SoM</div><div class='add'>+          - const: fsl,imx6ull</div><div class='add'>+</div><div class='add'>+      - description: TQ Systems TQMa6ULLx SoM on MBa6ULx board</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - tq,imx6ull-tqma6ull2-mba6ulx</div><div class='add'>+          - const: tq,imx6ull-tqma6ull2      # MCIMX6Y2</div><div class='add'>+          - const: fsl,imx6ull</div><div class='add'>+</div><div class='add'>+      - description: TQ Systems TQMa6ULLxL SoM on MBa6ULx[L] board</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - tq,imx6ull-tqma6ull2l-mba6ulx # using LGA adapter</div><div class='add'>+              - tq,imx6ull-tqma6ull2l-mba6ulxl</div><div class='add'>+          - const: tq,imx6ull-tqma6ull2l      # MCIMX6Y2, LGA SoM variant</div><div class='ctx'>           - const: fsl,imx6ull</div><div class='ctx'> </div><div class='ctx'>       - description: i.MX6ULZ based Boards</div><div class='hunk'>@@ -687,6 +815,8 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - toradex,colibri-imx7s-aster     # Module on Aster Carrier Board</div><div class='ctx'>               - toradex,colibri-imx7s-eval-v3   # Module on Colibri Evaluation Board V3</div><div class='add'>+              - toradex,colibri-imx7s-iris      # Module on Iris Carrier Board</div><div class='add'>+              - toradex,colibri-imx7s-iris-v2   # Module on Iris Carrier Board V2</div><div class='ctx'>           - const: toradex,colibri-imx7s</div><div class='ctx'>           - const: fsl,imx7s</div><div class='ctx'> </div><div class='hunk'>@@ -707,6 +837,7 @@ properties:</div><div class='ctx'>               - kam,imx7d-flex-concentrator-mfg   # Kamstrup OMNIA Flex Concentrator in manufacturing mode</div><div class='ctx'>               - novtech,imx7d-meerkat96   # i.MX7 Meerkat96 Board</div><div class='ctx'>               - remarkable,imx7d-remarkable2  # i.MX7D ReMarkable 2 E-Ink Tablet</div><div class='add'>+              - storopack,imx7d-smegw01       # Storopack i.MX7D SMEGW01</div><div class='ctx'>               - technexion,imx7d-pico-dwarf   # TechNexion i.MX7D Pico-Dwarf</div><div class='ctx'>               - technexion,imx7d-pico-hobbit  # TechNexion i.MX7D Pico-Hobbit</div><div class='ctx'>               - technexion,imx7d-pico-nymph   # TechNexion i.MX7D Pico-Nymph</div><div class='hunk'>@@ -737,8 +868,10 @@ properties:</div><div class='ctx'>       - description: i.MX7D Boards with Toradex Colibri i.MX7D Module</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - toradex,colibri-imx7d-aster   # Colibri iMX7D Module on Aster Carrier Board</div><div class='del'>-              - toradex,colibri-imx7d-eval-v3 # Colibri iMX7D Module on Colibri Evaluation Board V3</div><div class='add'>+              - toradex,colibri-imx7d-aster   # Aster Carrier Board</div><div class='add'>+              - toradex,colibri-imx7d-eval-v3 # Colibri Evaluation Board V3</div><div class='add'>+              - toradex,colibri-imx7d-iris    # Iris Carrier Board</div><div class='add'>+              - toradex,colibri-imx7d-iris-v2 # Iris Carrier Board V2</div><div class='ctx'>           - const: toradex,colibri-imx7d</div><div class='ctx'>           - const: fsl,imx7d</div><div class='ctx'> </div><div class='hunk'>@@ -747,6 +880,8 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - toradex,colibri-imx7d-emmc-aster    # Module on Aster Carrier Board</div><div class='ctx'>               - toradex,colibri-imx7d-emmc-eval-v3  # Module on Colibri Evaluation Board V3</div><div class='add'>+              - toradex,colibri-imx7d-emmc-iris     # Module on Iris Carrier Board</div><div class='add'>+              - toradex,colibri-imx7d-emmc-iris-v2  # Module on Iris Carrier Board V2</div><div class='ctx'>           - const: toradex,colibri-imx7d-emmc</div><div class='ctx'>           - const: fsl,imx7d</div><div class='ctx'> </div><div class='hunk'>@@ -762,16 +897,20 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - beacon,imx8mm-beacon-kit  # i.MX8MM Beacon Development Kit</div><div class='ctx'>               - boundary,imx8mm-nitrogen8mm  # i.MX8MM Nitrogen Board</div><div class='add'>+              - dmo,imx8mm-data-modul-edm-sbc # i.MX8MM eDM SBC</div><div class='ctx'>               - emtrion,emcon-mx8mm-avari # emCON-MX8MM SoM on Avari Base</div><div class='ctx'>               - fsl,imx8mm-ddr4-evk       # i.MX8MM DDR4 EVK Board</div><div class='ctx'>               - fsl,imx8mm-evk            # i.MX8MM EVK Board</div><div class='add'>+              - gateworks,imx8mm-gw7904</div><div class='ctx'>               - gw,imx8mm-gw71xx-0x       # i.MX8MM Gateworks Development Kit</div><div class='ctx'>               - gw,imx8mm-gw72xx-0x       # i.MX8MM Gateworks Development Kit</div><div class='ctx'>               - gw,imx8mm-gw73xx-0x       # i.MX8MM Gateworks Development Kit</div><div class='ctx'>               - gw,imx8mm-gw7901          # i.MX8MM Gateworks Board</div><div class='ctx'>               - gw,imx8mm-gw7902          # i.MX8MM Gateworks Board</div><div class='ctx'>               - gw,imx8mm-gw7903          # i.MX8MM Gateworks Board</div><div class='del'>-              - kontron,imx8mm-n801x-som  # i.MX8MM Kontron SL (N801X) SOM</div><div class='add'>+              - innocomm,wb15-evk         # i.MX8MM Innocomm EVK board with WB15 SoM</div><div class='add'>+              - kontron,imx8mm-sl         # i.MX8MM Kontron SL (N801X) SOM</div><div class='add'>+              - kontron,imx8mm-osm-s      # i.MX8MM Kontron OSM-S (N802X) SOM</div><div class='ctx'>               - toradex,verdin-imx8mm     # Verdin iMX8M Mini Modules</div><div class='ctx'>               - toradex,verdin-imx8mm-nonwifi  # Verdin iMX8M Mini Modules without Wi-Fi / BT</div><div class='ctx'>               - toradex,verdin-imx8mm-wifi  # Verdin iMX8M Mini Wi-Fi / BT Modules</div><div class='hunk'>@@ -789,15 +928,23 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - description: Kontron BL i.MX8MM (N801X S) Board</div><div class='ctx'>         items:</div><div class='del'>-          - const: kontron,imx8mm-n801x-s</div><div class='del'>-          - const: kontron,imx8mm-n801x-som</div><div class='add'>+          - const: kontron,imx8mm-bl</div><div class='add'>+          - const: kontron,imx8mm-sl</div><div class='add'>+          - const: fsl,imx8mm</div><div class='add'>+</div><div class='add'>+      - description: Kontron BL i.MX8MM OSM-S (N802X S) Board</div><div class='add'>+        items:</div><div class='add'>+          - const: kontron,imx8mm-bl-osm-s</div><div class='add'>+          - const: kontron,imx8mm-osm-s</div><div class='ctx'>           - const: fsl,imx8mm</div><div class='ctx'> </div><div class='ctx'>       - description: Toradex Boards with Verdin iMX8M Mini Modules</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - menlo,mx8menlo                       # Verdin iMX8M Mini Module on i.MX8MM Menlo board</div><div class='ctx'>               - toradex,verdin-imx8mm-nonwifi-dahlia # Verdin iMX8M Mini Module on Dahlia</div><div class='ctx'>               - toradex,verdin-imx8mm-nonwifi-dev    # Verdin iMX8M Mini Module on Verdin Development Board</div><div class='add'>+              - toradex,verdin-imx8mm-nonwifi-yavia  # Verdin iMX8M Mini Module on Yavia</div><div class='ctx'>           - const: toradex,verdin-imx8mm-nonwifi     # Verdin iMX8M Mini Module without Wi-Fi / BT</div><div class='ctx'>           - const: toradex,verdin-imx8mm             # Verdin iMX8M Mini Module</div><div class='ctx'>           - const: fsl,imx8mm</div><div class='hunk'>@@ -807,10 +954,17 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - toradex,verdin-imx8mm-wifi-dahlia # Verdin iMX8M Mini Wi-Fi / BT Module on Dahlia</div><div class='ctx'>               - toradex,verdin-imx8mm-wifi-dev    # Verdin iMX8M Mini Wi-Fi / BT M. on Verdin Development B.</div><div class='add'>+              - toradex,verdin-imx8mm-wifi-yavia  # Verdin iMX8M Mini Wi-Fi / BT Module on Yavia</div><div class='ctx'>           - const: toradex,verdin-imx8mm-wifi     # Verdin iMX8M Mini Wi-Fi / BT Module</div><div class='ctx'>           - const: toradex,verdin-imx8mm          # Verdin iMX8M Mini Module</div><div class='ctx'>           - const: fsl,imx8mm</div><div class='ctx'> </div><div class='add'>+      - description: PHYTEC phyCORE-i.MX8MM SoM based boards</div><div class='add'>+        items:</div><div class='add'>+          - const: phytec,imx8mm-phyboard-polis-rdk # phyBOARD-Polis RDK</div><div class='add'>+          - const: phytec,imx8mm-phycore-som        # phyCORE-i.MX8MM SoM</div><div class='add'>+          - const: fsl,imx8mm</div><div class='add'>+</div><div class='ctx'>       - description: Variscite VAR-SOM-MX8MM based boards</div><div class='ctx'>         items:</div><div class='ctx'>           - const: variscite,var-som-mx8mm-symphony</div><div class='hunk'>@@ -824,6 +978,7 @@ properties:</div><div class='ctx'>           one compatible is needed.</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - cloos,imx8mm-phg           # i.MX8MM Cloos PHG Board</div><div class='ctx'>               - tq,imx8mm-tqma8mqml-mba8mx # TQ-Systems GmbH i.MX8MM TQMa8MQML SOM on MBa8Mx</div><div class='ctx'>           - const: tq,imx8mm-tqma8mqml     # TQ-Systems GmbH i.MX8MM TQMa8MQML SOM</div><div class='ctx'>           - const: fsl,imx8mm</div><div class='hunk'>@@ -834,6 +989,7 @@ properties:</div><div class='ctx'>               - beacon,imx8mn-beacon-kit  # i.MX8MN Beacon Development Kit</div><div class='ctx'>               - bsh,imx8mn-bsh-smm-s2     # i.MX8MN BSH SystemMaster S2</div><div class='ctx'>               - bsh,imx8mn-bsh-smm-s2pro  # i.MX8MN BSH SystemMaster S2 PRO</div><div class='add'>+              - fsl,imx8mn-ddr3l-evk      # i.MX8MN DDR3L EVK Board</div><div class='ctx'>               - fsl,imx8mn-ddr4-evk       # i.MX8MN DDR4 EVK Board</div><div class='ctx'>               - fsl,imx8mn-evk            # i.MX8MN LPDDR4 EVK Board</div><div class='ctx'>               - gw,imx8mn-gw7902          # i.MX8MM Gateworks Board</div><div class='hunk'>@@ -859,7 +1015,37 @@ properties:</div><div class='ctx'>       - description: i.MX8MP based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - beacon,imx8mp-beacon-kit  # i.MX8MP Beacon Development Kit</div><div class='add'>+              - dmo,imx8mp-data-modul-edm-sbc # i.MX8MP eDM SBC</div><div class='ctx'>               - fsl,imx8mp-evk            # i.MX8MP EVK Board</div><div class='add'>+              - gateworks,imx8mp-gw74xx   # i.MX8MP Gateworks Board</div><div class='add'>+              - polyhex,imx8mp-debix      # Polyhex Debix boards</div><div class='add'>+              - polyhex,imx8mp-debix-model-a # Polyhex Debix Model A Board</div><div class='add'>+              - toradex,verdin-imx8mp     # Verdin iMX8M Plus Modules</div><div class='add'>+              - toradex,verdin-imx8mp-nonwifi  # Verdin iMX8M Plus Modules without Wi-Fi / BT</div><div class='add'>+              - toradex,verdin-imx8mp-wifi  # Verdin iMX8M Plus Wi-Fi / BT Modules</div><div class='add'>+          - const: fsl,imx8mp</div><div class='add'>+</div><div class='add'>+      - description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules</div><div class='add'>+        items:</div><div class='add'>+          - const: avnet,sm2s-imx8mp-14N0600E-ep1 # SM2S-IMX8PLUS-14N0600E on SM2-MB-EP1 Carrier Board</div><div class='add'>+          - const: avnet,sm2s-imx8mp-14N0600E     # 14N0600E variant of SM2S-IMX8PLUS SoM</div><div class='add'>+          - const: avnet,sm2s-imx8mp              # SM2S-IMX8PLUS SoM</div><div class='add'>+          - const: fsl,imx8mp</div><div class='add'>+</div><div class='add'>+      - description: i.MX8MP DHCOM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - dh,imx8mp-dhcom-pdk2         # i.MX8MP DHCOM SoM on PDK2 board</div><div class='add'>+              - dh,imx8mp-dhcom-pdk3         # i.MX8MP DHCOM SoM on PDK3 board</div><div class='add'>+          - const: dh,imx8mp-dhcom-som       # i.MX8MP DHCOM SoM</div><div class='add'>+          - const: fsl,imx8mp</div><div class='add'>+</div><div class='add'>+      - description: Engicam i.Core MX8M Plus SoM based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - engicam,icore-mx8mp-edimm2.2       # i.MX8MP Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit</div><div class='add'>+          - const: engicam,icore-mx8mp             # i.MX8MP Engicam i.Core MX8M Plus SoM</div><div class='ctx'>           - const: fsl,imx8mp</div><div class='ctx'> </div><div class='ctx'>       - description: PHYTEC phyCORE-i.MX8MP SoM based boards</div><div class='hunk'>@@ -868,6 +1054,38 @@ properties:</div><div class='ctx'>           - const: phytec,imx8mp-phycore-som         # phyCORE-i.MX8MP SoM</div><div class='ctx'>           - const: fsl,imx8mp</div><div class='ctx'> </div><div class='add'>+      - description: Toradex Boards with Verdin iMX8M Plus Modules</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - toradex,verdin-imx8mp-nonwifi-dahlia # Verdin iMX8M Plus Module on Dahlia</div><div class='add'>+              - toradex,verdin-imx8mp-nonwifi-dev    # Verdin iMX8M Plus Module on Verdin Development Board</div><div class='add'>+              - toradex,verdin-imx8mp-nonwifi-yavia  # Verdin iMX8M Plus Module on Yavia</div><div class='add'>+          - const: toradex,verdin-imx8mp-nonwifi     # Verdin iMX8M Plus Module without Wi-Fi / BT</div><div class='add'>+          - const: toradex,verdin-imx8mp             # Verdin iMX8M Plus Module</div><div class='add'>+          - const: fsl,imx8mp</div><div class='add'>+</div><div class='add'>+      - description: Toradex Boards with Verdin iMX8M Plus Wi-Fi / BT Modules</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - toradex,verdin-imx8mp-wifi-dahlia # Verdin iMX8M Plus Wi-Fi / BT Module on Dahlia</div><div class='add'>+              - toradex,verdin-imx8mp-wifi-dev    # Verdin iMX8M Plus Wi-Fi / BT M. on Verdin Development B.</div><div class='add'>+              - toradex,verdin-imx8mp-wifi-yavia  # Verdin iMX8M Plus Wi-Fi / BT Module on Yavia</div><div class='add'>+          - const: toradex,verdin-imx8mp-wifi     # Verdin iMX8M Plus Wi-Fi / BT Module</div><div class='add'>+          - const: toradex,verdin-imx8mp          # Verdin iMX8M Plus Module</div><div class='add'>+          - const: fsl,imx8mp</div><div class='add'>+</div><div class='add'>+      - description:</div><div class='add'>+          TQMa8MPxL is a series of LGA SOM featuring NXP i.MX8MP system-on-chip</div><div class='add'>+          variants. It is designed to be soldered on different carrier boards.</div><div class='add'>+          All CPU variants use the same device tree hence only one compatible</div><div class='add'>+          is needed. MBa8MPxL mainboard can be used as starterkit or in a boxed</div><div class='add'>+          version as an industrial computing device.</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - tq,imx8mp-tqma8mpql-mba8mpxl # TQ-Systems GmbH i.MX8MP TQMa8MPQL SOM on MBa8MPxL</div><div class='add'>+          - const: tq,imx8mp-tqma8mpql       # TQ-Systems GmbH i.MX8MP TQMa8MPQL SOM</div><div class='add'>+          - const: fsl,imx8mp</div><div class='add'>+</div><div class='ctx'>       - description: i.MX8MQ based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -877,12 +1095,17 @@ properties:</div><div class='ctx'>               - fsl,imx8mq-evk            # i.MX8MQ EVK Board</div><div class='ctx'>               - google,imx8mq-phanbell    # Google Coral Edge TPU</div><div class='ctx'>               - kontron,pitx-imx8m        # Kontron pITX-imx8m Board</div><div class='del'>-              - mntre,reform2             # MNT Reform2 Laptop</div><div class='ctx'>               - purism,librem5-devkit     # Purism Librem5 devkit</div><div class='ctx'>               - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse</div><div class='ctx'>               - technexion,pico-pi-imx8m  # TechNexion PICO-PI-8M evk</div><div class='ctx'>           - const: fsl,imx8mq</div><div class='ctx'> </div><div class='add'>+      - description: i.MX8MQ NITROGEN SoM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - const: mntre,reform2                  # MNT Reform2 Laptop</div><div class='add'>+          - const: boundary,imx8mq-nitrogen8m-som # i.MX8MQ NITROGEN SoM</div><div class='add'>+          - const: fsl,imx8mq</div><div class='add'>+</div><div class='ctx'>       - description: Purism Librem5 phones</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -913,6 +1136,25 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx8qm-mek           # i.MX8QM MEK Board</div><div class='add'>+              - toradex,apalis-imx8      # Apalis iMX8 Modules</div><div class='add'>+              - toradex,apalis-imx8-v1.1 # Apalis iMX8 V1.1 Modules</div><div class='add'>+          - const: fsl,imx8qm</div><div class='add'>+</div><div class='add'>+      - description: i.MX8QM Boards with Toradex Apalis iMX8 Modules</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - toradex,apalis-imx8-eval            # Apalis iMX8 Module on Apalis Evaluation Board</div><div class='add'>+              - toradex,apalis-imx8-ixora-v1.1      # Apalis iMX8 Module on Ixora V1.1 Carrier Board</div><div class='add'>+          - const: toradex,apalis-imx8</div><div class='add'>+          - const: fsl,imx8qm</div><div class='add'>+</div><div class='add'>+      - description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - toradex,apalis-imx8-v1.1-eval       # Apalis iMX8 V1.1 Module on Apalis Eval. Board</div><div class='add'>+              - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board</div><div class='add'>+              - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board</div><div class='add'>+          - const: toradex,apalis-imx8-v1.1</div><div class='ctx'>           - const: fsl,imx8qm</div><div class='ctx'> </div><div class='ctx'>       - description: i.MX8QXP based Boards</div><div class='hunk'>@@ -923,10 +1165,19 @@ properties:</div><div class='ctx'>               - toradex,colibri-imx8x     # Colibri iMX8X Modules</div><div class='ctx'>           - const: fsl,imx8qxp</div><div class='ctx'> </div><div class='del'>-      - description: i.MX8QXP Boards with Toradex Coilbri iMX8X Modules</div><div class='add'>+      - description: i.MX8DXL based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - fsl,imx8dxl-evk           # i.MX8DXL EVK Board</div><div class='add'>+          - const: fsl,imx8dxl</div><div class='add'>+</div><div class='add'>+      - description: i.MX8QXP Boards with Toradex Colibri iMX8X Modules</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - toradex,colibri-imx8x-aster   # Colibri iMX8X Module on Aster Board</div><div class='ctx'>               - toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Colibri Evaluation Board V3</div><div class='add'>+              - toradex,colibri-imx8x-iris    # Colibri iMX8X Module on Iris Board</div><div class='add'>+              - toradex,colibri-imx8x-iris-v2 # Colibri iMX8X Module on Iris Board V2</div><div class='ctx'>           - const: toradex,colibri-imx8x</div><div class='ctx'>           - const: fsl,imx8qxp</div><div class='ctx'> </div><div class='hunk'>@@ -936,6 +1187,24 @@ properties:</div><div class='ctx'>               - fsl,imx8ulp-evk           # i.MX8ULP EVK Board</div><div class='ctx'>           - const: fsl,imx8ulp</div><div class='ctx'> </div><div class='add'>+      - description: i.MX93 based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx93-11x11-evk       # i.MX93 11x11 EVK Board</div><div class='add'>+          - const: fsl,imx93</div><div class='add'>+</div><div class='add'>+      - description: i.MXRT1050 based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imxrt1050-evk         # i.MXRT1050 EVK Board</div><div class='add'>+          - const: fsl,imxrt1050</div><div class='add'>+</div><div class='add'>+      - description: i.MXRT1170 based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imxrt1170-evk         # i.MXRT1170 EVK Board</div><div class='add'>+          - const: fsl,imxrt1170</div><div class='add'>+</div><div class='ctx'>       - description:</div><div class='ctx'>           Freescale Vybrid Platform Device Tree Bindings</div><div class='ctx'> </div><div class='hunk'>@@ -999,6 +1268,7 @@ properties:</div><div class='ctx'>       - description: LS1021A based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - fsl,ls1021a-iot</div><div class='ctx'>               - fsl,ls1021a-moxa-uc-8410a</div><div class='ctx'>               - fsl,ls1021a-qds</div><div class='ctx'>               - fsl,ls1021a-tsn</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml<br/>index 7378159e61df..483caf0ce25b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml</a></div><div class='hunk'>@@ -17,14 +17,15 @@ properties:</div><div class='ctx'>       - const: hisilicon,hip04-bootwrapper</div><div class='ctx'> </div><div class='ctx'>   boot-method:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     description: |</div><div class='ctx'>       Address and size of boot method.</div><div class='ctx'>       [0]: bootwrapper physical address</div><div class='ctx'>       [1]: bootwrapper size</div><div class='ctx'>       [2]: relocation physical address</div><div class='ctx'>       [3]: relocation size</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml<br/>index b38458022946..540876322040 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/hisilicon/hisilicon.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Hisilicon Platforms Device Tree Bindings</div><div class='add'>+title: Hisilicon Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Wei Xu &lt;xuwei5@hisilicon.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/hpe,gxp.yaml b/Documentation/devicetree/bindings/arm/hpe,gxp.yaml<br/>new file mode 100644<br/>index 000000000000..224bbcb93f95<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/hpe,gxp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/hpe,gxp.yaml</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/hpe,gxp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HPE BMC GXP platforms</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nick Hawkins &lt;nick.hawkins@hpe.com&gt;</div><div class='add'>+  - Jean-Marie Verdun &lt;verdun@hpe.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: GXP Based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - hpe,gxp-dl360gen10</div><div class='add'>+          - const: hpe,gxp</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/intel,keembay.yaml b/Documentation/devicetree/bindings/arm/intel,keembay.yaml<br/>index 107e686ab207..53d2ce02b207 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/intel,keembay.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/intel,keembay.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/intel,keembay.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/intel,keembay.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/intel,keembay.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Keem Bay platform device tree bindings</div><div class='add'>+title: Keem Bay platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul J. Murphy &lt;paul.j.murphy@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml<br/>index 6e043459fcd5..4b4dcf551eb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/intel,socfpga.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/intel,socfpga.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/intel,socfpga.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/intel,socfpga.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/intel,socfpga.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel SoCFPGA platform device tree bindings</div><div class='add'>+title: Intel SoCFPGA platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dinh Nguyen &lt;dinguyen@kernel.org&gt;</div><div class='hunk'>@@ -18,6 +18,7 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - intel,n5x-socdk</div><div class='add'>+              - intel,socfpga-agilex-n6000</div><div class='ctx'>               - intel,socfpga-agilex-socdk</div><div class='ctx'>           - const: intel,socfpga-agilex</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml<br/>index 230bffeec0e5..553dcbc70e35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/intel-ixp4xx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel IXP4xx Device Tree Bindings</div><div class='add'>+title: Intel IXP4xx</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml<br/>index 5cbcacaeb441..ff378d5cbd32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common K3 TI-SCI bindings</div><div class='add'>+title: Common K3 TI-SCI</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nishanth Menon &lt;nm@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml<br/>index 34f5f877d444..91b96065f7df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/keystone/ti,sci.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/keystone/ti,sci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI-SCI controller device node bindings</div><div class='add'>+title: TI-SCI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nishanth Menon &lt;nm@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt<br/>index 052a967c1f28..c83245065d44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt</a></div><div class='hunk'>@@ -72,7 +72,7 @@ mpp19	19	gpio, uart0(rxd), sdio(pw_off)</div><div class='ctx'> GPIO:</div><div class='ctx'> -----</div><div class='ctx'> For common binding part and usage, refer to</div><div class='del'>-Documentation/devicetree/bindings/gpio/gpio-mvebu.txt.</div><div class='add'>+Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt<br/>index f6d6642d81c0..29fa93dad52b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/marvell/armada-37xx.txt</a></div><div class='hunk'>@@ -1,21 +1,3 @@</div><div class='del'>-Marvell Armada 37xx Platforms Device Tree Bindings</div><div class='del'>---------------------------------------------------</div><div class='del'>-</div><div class='del'>-Boards using a SoC of the Marvell Armada 37xx family must carry the</div><div class='del'>-following root node property:</div><div class='del'>-</div><div class='del'>- - compatible: must contain "marvell,armada3710"</div><div class='del'>-</div><div class='del'>-In addition, boards using the Marvell Armada 3720 SoC shall have the</div><div class='del'>-following property before the previous one:</div><div class='del'>-</div><div class='del'>- - compatible: must contain "marvell,armada3720"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> Power management</div><div class='ctx'> ----------------</div><div class='ctx'> </div><div class='hunk'>@@ -48,11 +30,3 @@ avs: avs@11500 {</div><div class='ctx'> 	compatible = "marvell,armada-3700-avs", "syscon";</div><div class='ctx'> 	reg = &lt;0x11500 0x40&gt;;</div><div class='ctx'> }</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-CZ.NIC's Turris Mox SOHO router Device Tree Bindings</div><div class='del'>-----------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required root node property:</div><div class='del'>-</div><div class='del'>- - compatible: must contain "cznic,turris-mox"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml<br/>new file mode 100644<br/>index 000000000000..6905d29f3108<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/marvell/armada-37xx.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/marvell/armada-37xx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Armada 37xx Platforms</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Robert Marko &lt;robert.marko@sartura.hr&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Armada 3720 SoC boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - cznic,turris-mox</div><div class='add'>+              - globalscale,espressobin</div><div class='add'>+              - marvell,armada-3720-db</div><div class='add'>+              - methode,edpu</div><div class='add'>+              - methode,udpu</div><div class='add'>+          - const: marvell,armada3720</div><div class='add'>+          - const: marvell,armada3710</div><div class='add'>+</div><div class='add'>+      - description: Globalscale Espressobin boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - globalscale,espressobin-emmc</div><div class='add'>+              - globalscale,espressobin-ultra</div><div class='add'>+              - globalscale,espressobin-v7</div><div class='add'>+          - const: globalscale,espressobin</div><div class='add'>+          - const: marvell,armada3720</div><div class='add'>+          - const: marvell,armada3710</div><div class='add'>+</div><div class='add'>+      - description: Globalscale Espressobin V7 boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - globalscale,espressobin-v7-emmc</div><div class='add'>+          - const: globalscale,espressobin-v7</div><div class='add'>+          - const: globalscale,espressobin</div><div class='add'>+          - const: marvell,armada3720</div><div class='add'>+          - const: marvell,armada3710</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml<br/>index e9bf3054529f..52d78521e412 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell Armada 7K/8K Platforms Device Tree Bindings</div><div class='add'>+title: Marvell Armada 7K/8K Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt b/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt<br/>index 0705e765f432..d84105c7c935 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt</a></div><div class='hunk'>@@ -156,7 +156,7 @@ GPIO:</div><div class='ctx'> -----</div><div class='ctx'> </div><div class='ctx'> For common binding part and usage, refer to</div><div class='del'>-Documentation/devicetree/bindings/gpio/gpio-mvebu.txt.</div><div class='add'>+Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/marvell/marvell,ac5.yaml b/Documentation/devicetree/bindings/arm/marvell/marvell,ac5.yaml<br/>new file mode 100644<br/>index 000000000000..8960fb8b2b2f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/marvell/marvell,ac5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/marvell/marvell,ac5.yaml</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/marvell/marvell,ac5.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Alleycat5/5X Platforms</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Alleycat5 (98DX25xx) Reference Design</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - marvell,rd-ac5</div><div class='add'>+          - const: marvell,ac5</div><div class='add'>+</div><div class='add'>+      - description: Alleycat5X (98DX35xx) Reference Design</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - marvell,rd-ac5x</div><div class='add'>+          - const: marvell,ac5x</div><div class='add'>+          - const: marvell,ac5</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml<br/>index ab0593c77321..ae12b1cab9fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/mediatek.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek SoC based Platforms Device Tree Bindings</div><div class='add'>+title: MediaTek SoC based Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='hunk'>@@ -58,6 +58,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt6795-evb</div><div class='add'>+              - sony,xperia-m5</div><div class='ctx'>           - const: mediatek,mt6795</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -83,6 +84,7 @@ properties:</div><div class='ctx'>           - const: mediatek,mt7629</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - bananapi,bpi-r3</div><div class='ctx'>               - mediatek,mt7986a-rfb</div><div class='ctx'>           - const: mediatek,mt7986a</div><div class='ctx'>       - items:</div><div class='hunk'>@@ -131,8 +133,43 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt8183-evb</div><div class='ctx'>           - const: mediatek,mt8183</div><div class='add'>+      - description: Google Hayato</div><div class='add'>+        items:</div><div class='add'>+          - const: google,hayato-rev1</div><div class='add'>+          - const: google,hayato</div><div class='add'>+          - const: mediatek,mt8192</div><div class='add'>+      - description: Google Spherion (Acer Chromebook 514)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,spherion-rev3</div><div class='add'>+          - const: google,spherion-rev2</div><div class='add'>+          - const: google,spherion-rev1</div><div class='add'>+          - const: google,spherion-rev0</div><div class='add'>+          - const: google,spherion</div><div class='add'>+          - const: mediatek,mt8192</div><div class='add'>+      - description: Acer Tomato (Acer Chromebook Spin 513 CP513-2H)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - google,tomato-rev2</div><div class='add'>+              - google,tomato-rev1</div><div class='add'>+          - const: google,tomato</div><div class='add'>+          - const: mediatek,mt8195</div><div class='add'>+      - description: Acer Tomato rev3 - 4 (Acer Chromebook Spin 513 CP513-2H)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,tomato-rev4</div><div class='add'>+          - const: google,tomato-rev3</div><div class='add'>+          - const: google,tomato</div><div class='add'>+          - const: mediatek,mt8195</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8186-evb</div><div class='add'>+          - const: mediatek,mt8186</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8192-evb</div><div class='add'>+          - const: mediatek,mt8192</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8195-demo</div><div class='ctx'>               - mediatek,mt8195-evb</div><div class='ctx'>           - const: mediatek,mt8195</div><div class='ctx'>       - description: Google Burnet (HP Chromebook x360 11MK G3 EE)</div><div class='hunk'>@@ -209,6 +246,10 @@ properties:</div><div class='ctx'>           - const: mediatek,mt8183</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8365-evk</div><div class='add'>+          - const: mediatek,mt8365</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - mediatek,mt8516-pumpkin</div><div class='ctx'>           - const: mediatek,mt8516</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt<br/>deleted file mode 100644<br/>index 3fa755866528..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-Mediatek apmixedsys controller</div><div class='del'>-==============================</div><div class='del'>-</div><div class='del'>-The Mediatek apmixedsys controller provides the PLLs to the system.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be one of:</div><div class='del'>-	- "mediatek,mt2701-apmixedsys"</div><div class='del'>-	- "mediatek,mt2712-apmixedsys", "syscon"</div><div class='del'>-	- "mediatek,mt6765-apmixedsys", "syscon"</div><div class='del'>-	- "mediatek,mt6779-apmixedsys", "syscon"</div><div class='del'>-	- "mediatek,mt6797-apmixedsys"</div><div class='del'>-	- "mediatek,mt7622-apmixedsys"</div><div class='del'>-	- "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys"</div><div class='del'>-	- "mediatek,mt7629-apmixedsys"</div><div class='del'>-	- "mediatek,mt7986-apmixedsys"</div><div class='del'>-	- "mediatek,mt8135-apmixedsys"</div><div class='del'>-	- "mediatek,mt8167-apmixedsys", "syscon"</div><div class='del'>-	- "mediatek,mt8173-apmixedsys"</div><div class='del'>-	- "mediatek,mt8183-apmixedsys", "syscon"</div><div class='del'>-	- "mediatek,mt8516-apmixedsys"</div><div class='del'>-- #clock-cells: Must be 1</div><div class='del'>-</div><div class='del'>-The apmixedsys controller uses the common clk binding from</div><div class='del'>-Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-apmixedsys: clock-controller@10209000 {</div><div class='del'>-	compatible = "mediatek,mt8173-apmixedsys";</div><div class='del'>-	reg = &lt;0 0x10209000 0 0x1000&gt;;</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt<br/>index 0502db73686b..eccd4b706a78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt</a></div><div class='hunk'>@@ -10,6 +10,7 @@ Required Properties:</div><div class='ctx'> 	- "mediatek,mt7622-ethsys", "syscon"</div><div class='ctx'> 	- "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"</div><div class='ctx'> 	- "mediatek,mt7629-ethsys", "syscon"</div><div class='add'>+	- "mediatek,mt7981-ethsys", "syscon"</div><div class='ctx'> 	- "mediatek,mt7986-ethsys", "syscon"</div><div class='ctx'> - #clock-cells: Must be 1</div><div class='ctx'> - #reset-cells: Must be 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt<br/>deleted file mode 100644<br/>index f66bd720571d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-Mediatek infracfg controller</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-The Mediatek infracfg controller provides various clocks and reset</div><div class='del'>-outputs to the system.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be one of:</div><div class='del'>-	- "mediatek,mt2701-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt2712-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt6765-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt6779-infracfg_ao", "syscon"</div><div class='del'>-	- "mediatek,mt6797-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt7622-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt7629-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt7986-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt8135-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt8167-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt8173-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt8183-infracfg", "syscon"</div><div class='del'>-	- "mediatek,mt8516-infracfg", "syscon"</div><div class='del'>-- #clock-cells: Must be 1</div><div class='del'>-- #reset-cells: Must be 1</div><div class='del'>-</div><div class='del'>-The infracfg controller uses the common clk binding from</div><div class='del'>-Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='del'>-Also it uses the common reset controller binding from</div><div class='del'>-Documentation/devicetree/bindings/reset/reset.txt.</div><div class='del'>-The available reset outputs are defined in</div><div class='del'>-dt-bindings/reset/mt*-resets.h</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-infracfg: power-controller@10001000 {</div><div class='del'>-	compatible = "mediatek,mt8173-infracfg", "syscon";</div><div class='del'>-	reg = &lt;0 0x10001000 0 0x1000&gt;;</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-	#reset-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml<br/>new file mode 100644<br/>index 000000000000..ea98043c6ba3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.yaml</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Infrastructure System Configuration Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Mediatek infracfg controller provides various clocks and reset outputs</div><div class='add'>+  to the system. The clock values can be found in &lt;dt-bindings/clock/mt*-clk.h&gt;,</div><div class='add'>+  and reset values in &lt;dt-bindings/reset/mt*-reset.h&gt; and</div><div class='add'>+  &lt;dt-bindings/reset/mt*-resets.h&gt;.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2701-infracfg</div><div class='add'>+              - mediatek,mt2712-infracfg</div><div class='add'>+              - mediatek,mt6765-infracfg</div><div class='add'>+              - mediatek,mt6795-infracfg</div><div class='add'>+              - mediatek,mt6779-infracfg_ao</div><div class='add'>+              - mediatek,mt6797-infracfg</div><div class='add'>+              - mediatek,mt7622-infracfg</div><div class='add'>+              - mediatek,mt7629-infracfg</div><div class='add'>+              - mediatek,mt7981-infracfg</div><div class='add'>+              - mediatek,mt7986-infracfg</div><div class='add'>+              - mediatek,mt8135-infracfg</div><div class='add'>+              - mediatek,mt8167-infracfg</div><div class='add'>+              - mediatek,mt8173-infracfg</div><div class='add'>+              - mediatek,mt8183-infracfg</div><div class='add'>+              - mediatek,mt8516-infracfg</div><div class='add'>+          - const: syscon</div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt7623-infracfg</div><div class='add'>+          - const: mediatek,mt2701-infracfg</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - mediatek,mt2701-infracfg</div><div class='add'>+          - mediatek,mt2712-infracfg</div><div class='add'>+          - mediatek,mt6795-infracfg</div><div class='add'>+          - mediatek,mt7622-infracfg</div><div class='add'>+          - mediatek,mt7986-infracfg</div><div class='add'>+          - mediatek,mt8135-infracfg</div><div class='add'>+          - mediatek,mt8173-infracfg</div><div class='add'>+          - mediatek,mt8183-infracfg</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    infracfg: clock-controller@10001000 {</div><div class='add'>+        compatible = "mediatek,mt8173-infracfg", "syscon";</div><div class='add'>+        reg = &lt;0x10001000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml<br/>index b31d90dc9eb4..536f5a5ebd24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek mmsys controller</div><div class='ctx'> </div><div class='hunk'>@@ -25,22 +25,65 @@ properties:</div><div class='ctx'>               - mediatek,mt2712-mmsys</div><div class='ctx'>               - mediatek,mt6765-mmsys</div><div class='ctx'>               - mediatek,mt6779-mmsys</div><div class='add'>+              - mediatek,mt6795-mmsys</div><div class='ctx'>               - mediatek,mt6797-mmsys</div><div class='ctx'>               - mediatek,mt8167-mmsys</div><div class='ctx'>               - mediatek,mt8173-mmsys</div><div class='ctx'>               - mediatek,mt8183-mmsys</div><div class='ctx'>               - mediatek,mt8186-mmsys</div><div class='add'>+              - mediatek,mt8188-vdosys0</div><div class='ctx'>               - mediatek,mt8192-mmsys</div><div class='add'>+              - mediatek,mt8195-vdosys1</div><div class='add'>+              - mediatek,mt8195-vppsys0</div><div class='add'>+              - mediatek,mt8195-vppsys1</div><div class='ctx'>               - mediatek,mt8365-mmsys</div><div class='ctx'>           - const: syscon</div><div class='add'>+</div><div class='add'>+      - description: vdosys0 and vdosys1 are 2 display HW pipelines,</div><div class='add'>+                     so mt8195 binding should be deprecated.</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          - const: mediatek,mt8195-mmsys</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: mediatek,mt7623-mmsys</div><div class='ctx'>           - const: mediatek,mt2701-mmsys</div><div class='ctx'>           - const: syscon</div><div class='ctx'> </div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt8195-vdosys0</div><div class='add'>+          - const: mediatek,mt8195-mmsys</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    description:</div><div class='add'>+      A phandle and PM domain specifier as defined by bindings</div><div class='add'>+      of the power controller specified by phandle. See</div><div class='add'>+      Documentation/devicetree/bindings/power/power-domain.yaml for details.</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    description:</div><div class='add'>+      Using mailbox to communicate with GCE, it should have this</div><div class='add'>+      property and list of phandle, mailbox specifiers. See</div><div class='add'>+      Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml</div><div class='add'>+      for details.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    description:</div><div class='add'>+      The register of client driver can be configured by gce with 4 arguments</div><div class='add'>+      defined in this property, such as phandle of gce, subsys id,</div><div class='add'>+      register offset and size.</div><div class='add'>+      Each subsys id is mapping to a base address of display function blocks</div><div class='add'>+      register which is defined in the gce header</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   "#clock-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -56,9 +99,16 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/power/mt8173-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8173-gce.h&gt;</div><div class='add'>+</div><div class='ctx'>     mmsys: syscon@14000000 {</div><div class='ctx'>         compatible = "mediatek,mt8173-mmsys", "syscon";</div><div class='ctx'>         reg = &lt;0x14000000 0x1000&gt;;</div><div class='add'>+        power-domains = &lt;&amp;spm MT8173_POWER_DOMAIN_MM&gt;;</div><div class='ctx'>         #clock-cells = &lt;1&gt;;</div><div class='ctx'>         #reset-cells = &lt;1&gt;;</div><div class='add'>+        mboxes = &lt;&amp;gce 0 CMDQ_THR_PRIO_HIGHEST&gt;,</div><div class='add'>+                 &lt;&amp;gce 1 CMDQ_THR_PRIO_HIGHEST&gt;;</div><div class='add'>+        mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0 0x1000&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml<br/>new file mode 100644<br/>index 000000000000..d89848a8f478<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-pcie-mirror.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek PCIE Mirror Controller for MT7622</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+  - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The mediatek PCIE mirror provides a configuration interface for PCIE</div><div class='add'>+  controller on MT7622 soc.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt7622-pcie-mirror</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      pcie_mirror: pcie-mirror@10000400 {</div><div class='add'>+        compatible = "mediatek,mt7622-pcie-mirror", "syscon";</div><div class='add'>+        reg = &lt;0 0x10000400 0 0x10&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml<br/>new file mode 100644<br/>index 000000000000..28ded09d72e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7622-wed.yaml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7622-wed.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Wireless Ethernet Dispatch Controller for MT7622</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+  - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The mediatek wireless ethernet dispatch controller can be configured to</div><div class='add'>+  intercept and handle access to the WLAN DMA queues and PCIe interrupts</div><div class='add'>+  and implement hardware flow offloading from ethernet to WLAN.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt7622-wed</div><div class='add'>+          - mediatek,mt7981-wed</div><div class='add'>+          - mediatek,mt7986-wed</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: firmware EMI region</div><div class='add'>+      - description: firmware ILM region</div><div class='add'>+      - description: firmware DLM region</div><div class='add'>+      - description: firmware CPU DATA region</div><div class='add'>+      - description: firmware BOOT region</div><div class='add'>+</div><div class='add'>+  memory-region-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wo-emi</div><div class='add'>+      - const: wo-ilm</div><div class='add'>+      - const: wo-dlm</div><div class='add'>+      - const: wo-data</div><div class='add'>+      - const: wo-boot</div><div class='add'>+</div><div class='add'>+  mediatek,wo-ccif:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: mediatek wed-wo controller interface.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt7622-wed</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        memory-region-names: false</div><div class='add'>+        memory-region: false</div><div class='add'>+        mediatek,wo-ccif: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      wed0: wed@1020a000 {</div><div class='add'>+        compatible = "mediatek,mt7622-wed","syscon";</div><div class='add'>+        reg = &lt;0 0x1020a000 0 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 214 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      wed@15010000 {</div><div class='add'>+        compatible = "mediatek,mt7986-wed", "syscon";</div><div class='add'>+        reg = &lt;0 0x15010000 0 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;wo_emi&gt;, &lt;&amp;wo_ilm&gt;, &lt;&amp;wo_dlm&gt;,</div><div class='add'>+                        &lt;&amp;wo_data&gt;, &lt;&amp;wo_boot&gt;;</div><div class='add'>+        memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",</div><div class='add'>+                              "wo-data", "wo-boot";</div><div class='add'>+        mediatek,wo-ccif = &lt;&amp;wo_ccif0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml<br/>new file mode 100644<br/>index 000000000000..82f64469a601<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt7986-wed-pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt7986-wed-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek PCIE WED Controller for MT7986</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+  - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The mediatek WED PCIE provides a configuration interface for PCIE</div><div class='add'>+  controller on MT7986 soc.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt7986-wed-pcie</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      wed_pcie: wed-pcie@10003000 {</div><div class='add'>+        compatible = "mediatek,mt7986-wed-pcie",</div><div class='add'>+                     "syscon";</div><div class='add'>+        reg = &lt;0 0x10003000 0 0x10&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml<br/>new file mode 100644<br/>index 000000000000..7cd14b163abe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Functional Clock Controller for MT8186</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The clock architecture in MediaTek like below</div><div class='add'>+  PLLs --&gt;</div><div class='add'>+          dividers --&gt;</div><div class='add'>+                      muxes</div><div class='add'>+                           --&gt;</div><div class='add'>+                              clock gate</div><div class='add'>+</div><div class='add'>+  The devices provide clock gate control in different IP blocks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8186-imp_iic_wrap</div><div class='add'>+          - mediatek,mt8186-mfgsys</div><div class='add'>+          - mediatek,mt8186-wpesys</div><div class='add'>+          - mediatek,mt8186-imgsys1</div><div class='add'>+          - mediatek,mt8186-imgsys2</div><div class='add'>+          - mediatek,mt8186-vdecsys</div><div class='add'>+          - mediatek,mt8186-vencsys</div><div class='add'>+          - mediatek,mt8186-camsys</div><div class='add'>+          - mediatek,mt8186-camsys_rawa</div><div class='add'>+          - mediatek,mt8186-camsys_rawb</div><div class='add'>+          - mediatek,mt8186-mdpsys</div><div class='add'>+          - mediatek,mt8186-ipesys</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    imp_iic_wrap: clock-controller@11017000 {</div><div class='add'>+        compatible = "mediatek,mt8186-imp_iic_wrap";</div><div class='add'>+        reg = &lt;0x11017000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml<br/>new file mode 100644<br/>index 000000000000..64c769416690<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-sys-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek System Clock Controller for MT8186</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The clock architecture in MediaTek like below</div><div class='add'>+  PLLs --&gt;</div><div class='add'>+          dividers --&gt;</div><div class='add'>+                      muxes</div><div class='add'>+                           --&gt;</div><div class='add'>+                              clock gate</div><div class='add'>+</div><div class='add'>+  The apmixedsys provides most of PLLs which generated from SoC 26m.</div><div class='add'>+  The topckgen provides dividers and muxes which provide the clock source to other IP blocks.</div><div class='add'>+  The infracfg_ao provides clock gate in peripheral and infrastructure IP blocks.</div><div class='add'>+  The mcusys provides mux control to select the clock source in AP MCU.</div><div class='add'>+  The device nodes also provide the system control capacity for configuration.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8186-mcusys</div><div class='add'>+          - mediatek,mt8186-topckgen</div><div class='add'>+          - mediatek,mt8186-infracfg_ao</div><div class='add'>+          - mediatek,mt8186-apmixedsys</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    topckgen: syscon@10000000 {</div><div class='add'>+        compatible = "mediatek,mt8186-topckgen", "syscon";</div><div class='add'>+        reg = &lt;0x10000000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml<br/>index c8c67c033f8c..dff4c8e8fd4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-clock.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-clock.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek Functional Clock Controller for MT8192</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +24,6 @@ properties:</div><div class='ctx'>           - mediatek,mt8192-imp_iic_wrap_w</div><div class='ctx'>           - mediatek,mt8192-imp_iic_wrap_n</div><div class='ctx'>           - mediatek,mt8192-msdc_top</div><div class='del'>-          - mediatek,mt8192-msdc</div><div class='ctx'>           - mediatek,mt8192-mfgcfg</div><div class='ctx'>           - mediatek,mt8192-imgsys</div><div class='ctx'>           - mediatek,mt8192-imgsys2</div><div class='hunk'>@@ -108,13 +107,6 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='del'>-    msdc: clock-controller@11f60000 {</div><div class='del'>-        compatible = "mediatek,mt8192-msdc";</div><div class='del'>-        reg = &lt;0x11f60000 0x1000&gt;;</div><div class='del'>-        #clock-cells = &lt;1&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='ctx'>     mfgcfg: clock-controller@13fbf000 {</div><div class='ctx'>         compatible = "mediatek,mt8192-mfgcfg";</div><div class='ctx'>         reg = &lt;0x13fbf000 0x1000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml<br/>index 5705bcf1fe47..8d608fddf3f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8192-sys-clock.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-sys-clock.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8192-sys-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek System Clock Controller for MT8192</div><div class='ctx'> </div><div class='hunk'>@@ -29,6 +29,9 @@ properties:</div><div class='ctx'>   '#clock-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml<br/>index 17fcbb45d121..d17164b0b13e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-clock.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek Functional Clock Controller for MT8195</div><div class='ctx'> </div><div class='hunk'>@@ -28,11 +28,9 @@ properties:</div><div class='ctx'>           - mediatek,mt8195-imp_iic_wrap_s</div><div class='ctx'>           - mediatek,mt8195-imp_iic_wrap_w</div><div class='ctx'>           - mediatek,mt8195-mfgcfg</div><div class='del'>-          - mediatek,mt8195-vppsys0</div><div class='ctx'>           - mediatek,mt8195-wpesys</div><div class='ctx'>           - mediatek,mt8195-wpesys_vpp0</div><div class='ctx'>           - mediatek,mt8195-wpesys_vpp1</div><div class='del'>-          - mediatek,mt8195-vppsys1</div><div class='ctx'>           - mediatek,mt8195-imgsys</div><div class='ctx'>           - mediatek,mt8195-imgsys1_dip_top</div><div class='ctx'>           - mediatek,mt8195-imgsys1_dip_nr</div><div class='hunk'>@@ -93,13 +91,6 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='del'>-    vppsys0: clock-controller@14000000 {</div><div class='del'>-        compatible = "mediatek,mt8195-vppsys0";</div><div class='del'>-        reg = &lt;0x14000000 0x1000&gt;;</div><div class='del'>-        #clock-cells = &lt;1&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='ctx'>     wpesys: clock-controller@14e00000 {</div><div class='ctx'>         compatible = "mediatek,mt8195-wpesys";</div><div class='ctx'>         reg = &lt;0x14e00000 0x1000&gt;;</div><div class='hunk'>@@ -121,13 +112,6 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='del'>-    vppsys1: clock-controller@14f00000 {</div><div class='del'>-        compatible = "mediatek,mt8195-vppsys1";</div><div class='del'>-        reg = &lt;0x14f00000 0x1000&gt;;</div><div class='del'>-        #clock-cells = &lt;1&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='ctx'>     imgsys: clock-controller@15000000 {</div><div class='ctx'>         compatible = "mediatek,mt8195-imgsys";</div><div class='ctx'>         reg = &lt;0x15000000 0x1000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml<br/>index 57a1503d95fe..066c9b3d6ac9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-sys-clock.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-sys-clock.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mt8195-sys-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek System Clock Controller for MT8195</div><div class='ctx'> </div><div class='hunk'>@@ -37,6 +37,9 @@ properties:</div><div class='ctx'>   '#clock-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml<br/>index 8723dfe34bab..26158d0d72f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,pericfg.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/mediatek/mediatek,pericfg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek Peripheral Configuration Controller</div><div class='ctx'> </div><div class='hunk'>@@ -21,11 +21,14 @@ properties:</div><div class='ctx'>               - mediatek,mt2701-pericfg</div><div class='ctx'>               - mediatek,mt2712-pericfg</div><div class='ctx'>               - mediatek,mt6765-pericfg</div><div class='add'>+              - mediatek,mt6795-pericfg</div><div class='ctx'>               - mediatek,mt7622-pericfg</div><div class='ctx'>               - mediatek,mt7629-pericfg</div><div class='ctx'>               - mediatek,mt8135-pericfg</div><div class='ctx'>               - mediatek,mt8173-pericfg</div><div class='ctx'>               - mediatek,mt8183-pericfg</div><div class='add'>+              - mediatek,mt8186-pericfg</div><div class='add'>+              - mediatek,mt8195-pericfg</div><div class='ctx'>               - mediatek,mt8516-pericfg</div><div class='ctx'>           - const: syscon</div><div class='ctx'>       - items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt<br/>deleted file mode 100644<br/>index 29ca7a10b315..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-MediaTek SGMIISYS controller</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-The MediaTek SGMIISYS controller provides various clocks to the system.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be:</div><div class='del'>-	- "mediatek,mt7622-sgmiisys", "syscon"</div><div class='del'>-	- "mediatek,mt7629-sgmiisys", "syscon"</div><div class='del'>-	- "mediatek,mt7986-sgmiisys_0", "syscon"</div><div class='del'>-	- "mediatek,mt7986-sgmiisys_1", "syscon"</div><div class='del'>-- #clock-cells: Must be 1</div><div class='del'>-</div><div class='del'>-The SGMIISYS controller uses the common clk binding from</div><div class='del'>-Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-sgmiisys: sgmiisys@1b128000 {</div><div class='del'>-	compatible = "mediatek,mt7622-sgmiisys", "syscon";</div><div class='del'>-	reg = &lt;0 0x1b128000 0 0x1000&gt;;</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt<br/>deleted file mode 100644<br/>index b82422bb717f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-Mediatek topckgen controller</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-The Mediatek topckgen controller provides various clocks to the system.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be one of:</div><div class='del'>-	- "mediatek,mt2701-topckgen"</div><div class='del'>-	- "mediatek,mt2712-topckgen", "syscon"</div><div class='del'>-	- "mediatek,mt6765-topckgen", "syscon"</div><div class='del'>-	- "mediatek,mt6779-topckgen", "syscon"</div><div class='del'>-	- "mediatek,mt6797-topckgen"</div><div class='del'>-	- "mediatek,mt7622-topckgen"</div><div class='del'>-	- "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen"</div><div class='del'>-	- "mediatek,mt7629-topckgen"</div><div class='del'>-	- "mediatek,mt7986-topckgen", "syscon"</div><div class='del'>-	- "mediatek,mt8135-topckgen"</div><div class='del'>-	- "mediatek,mt8167-topckgen", "syscon"</div><div class='del'>-	- "mediatek,mt8173-topckgen"</div><div class='del'>-	- "mediatek,mt8183-topckgen", "syscon"</div><div class='del'>-	- "mediatek,mt8516-topckgen"</div><div class='del'>-- #clock-cells: Must be 1</div><div class='del'>-</div><div class='del'>-The topckgen controller uses the common clk binding from</div><div class='del'>-Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-The available clocks are defined in dt-bindings/clock/mt*-clk.h.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-topckgen: power-controller@10000000 {</div><div class='del'>-	compatible = "mediatek,mt8173-topckgen";</div><div class='del'>-	reg = &lt;0 0x10000000 0 0x1000&gt;;</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml b/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml<br/>index 6193388c6318..9a0d54e9799c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/microchip,sparx5.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/microchip,sparx5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/microchip,sparx5.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/microchip,sparx5.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip Sparx5 Boards Device Tree Bindings</div><div class='add'>+title: Microchip Sparx5 Boards</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lars Povlsen &lt;lars.povlsen@microchip.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/moxart.yaml b/Documentation/devicetree/bindings/arm/moxart.yaml<br/>index 670d24ce8ec5..42565280914c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/moxart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/moxart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/moxart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/moxart.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/moxart.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MOXA ART device tree bindings</div><div class='add'>+title: MOXA ART</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonas Jensen &lt;jonas.jensen@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml<br/>index d58116136154..4c43eaf3632e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/mrvl/mrvl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell Platforms Device Tree Bindings</div><div class='add'>+title: Marvell Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt<br/>deleted file mode 100644<br/>index 7f696362a4a1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)</div><div class='del'>-</div><div class='del'>-The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.</div><div class='del'>-There is one ACC register region per CPU within the KPSS remapped region as</div><div class='del'>-well as an alias register region that remaps accesses to the ACC associated</div><div class='del'>-with the CPU accessing the region.</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: should be one of:</div><div class='del'>-			"qcom,kpss-acc-v1"</div><div class='del'>-			"qcom,kpss-acc-v2"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the first element specifies the base address and size of</div><div class='del'>-		    the register region. An optional second element specifies</div><div class='del'>-		    the base address and size of the alias register region.</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-        Usage: required</div><div class='del'>-        Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-        Definition: reference to the pll parents.</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-        Usage: required</div><div class='del'>-        Value type: &lt;stringlist&gt;</div><div class='del'>-        Definition: must be "pll8_vote", "pxo".</div><div class='del'>-</div><div class='del'>-- clock-output-names:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Name of the output clock. Typically acpuX_aux where X is a</div><div class='del'>-		    CPU number starting at 0.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	clock-controller@2088000 {</div><div class='del'>-		compatible = "qcom,kpss-acc-v2";</div><div class='del'>-		reg = &lt;0x02088000 0x1000&gt;,</div><div class='del'>-		      &lt;0x02008000 0x1000&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc PLL8_VOTE&gt;, &lt;&amp;gcc PXO_SRC&gt;;</div><div class='del'>-		clock-names = "pll8_vote", "pxo";</div><div class='del'>-		clock-output-names = "acpu0_aux";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt<br/>deleted file mode 100644<br/>index e628758950e1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: should be one of the following. The generic compatible</div><div class='del'>-			"qcom,kpss-gcc" should also be included.</div><div class='del'>-			"qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"</div><div class='del'>-			"qcom,kpss-gcc-apq8064", "qcom,kpss-gcc"</div><div class='del'>-			"qcom,kpss-gcc-msm8974", "qcom,kpss-gcc"</div><div class='del'>-			"qcom,kpss-gcc-msm8960", "qcom,kpss-gcc"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: base address and size of the register region</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to the pll parents.</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "pll8_vote", "pxo".</div><div class='del'>-</div><div class='del'>-- clock-output-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Name of the output clock. Typically acpu_l2_aux indicating</div><div class='del'>-		    an L2 cache auxiliary clock.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	l2cc: clock-controller@2011000 {</div><div class='del'>-		compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc";</div><div class='del'>-		reg = &lt;0x2011000 0x1000&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc PLL8_VOTE&gt;, &lt;&amp;gcc PXO_SRC&gt;;</div><div class='del'>-		clock-names = "pll8_vote", "pxo";</div><div class='del'>-		clock-output-names = "acpu_l2_aux";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml<br/>deleted file mode 100644<br/>index 30fcbe2ad8a3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Last Level Cache Controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Rishabh Bhatnagar &lt;rishabhb@codeaurora.org&gt;</div><div class='del'>-  - Sai Prakash Ranjan &lt;saiprakash.ranjan@codeaurora.org&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,</div><div class='del'>-  that can be shared by multiple clients. Clients here are different cores in the</div><div class='del'>-  SoC, the idea is to minimize the local caches at the clients and migrate to</div><div class='del'>-  common pool of memory. Cache memory is divided into partitions called slices</div><div class='del'>-  which are assigned to clients. Clients can query the slice details, activate</div><div class='del'>-  and deactivate them.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,sc7180-llcc</div><div class='del'>-      - qcom,sc7280-llcc</div><div class='del'>-      - qcom,sdm845-llcc</div><div class='del'>-      - qcom,sm6350-llcc</div><div class='del'>-      - qcom,sm8150-llcc</div><div class='del'>-      - qcom,sm8250-llcc</div><div class='del'>-      - qcom,sm8350-llcc</div><div class='del'>-      - qcom,sm8450-llcc</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    items:</div><div class='del'>-      - description: LLCC base register region</div><div class='del'>-      - description: LLCC broadcast base register region</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: llcc_base</div><div class='del'>-      - const: llcc_broadcast_base</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-</div><div class='del'>-    system-cache-controller@1100000 {</div><div class='del'>-      compatible = "qcom,sdm845-llcc";</div><div class='del'>-      reg = &lt;0x1100000 0x200000&gt;, &lt;0x1300000 0x50000&gt; ;</div><div class='del'>-      reg-names = "llcc_base", "llcc_broadcast_base";</div><div class='del'>-      interrupts = &lt;GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt b/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt<br/>index 94d50a949be1..c0e3c3a42bea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt</a></div><div class='hunk'>@@ -10,7 +10,7 @@ system, notifying them when a low power state is entered or exited.</div><div class='ctx'> Multiple revisions of the SAW hardware are supported using these Device Nodes.</div><div class='ctx'> SAW2 revisions differ in the register offset and configuration data. Also, the</div><div class='ctx'> same revision of the SAW in different SoCs may have different configuration</div><div class='del'>-data due the the differences in hardware capabilities. Hence the SoC name, the</div><div class='add'>+data due the differences in hardware capabilities. Hence the SoC name, the</div><div class='ctx'> version of the SAW hardware in that SoC and the distinction between cpu (big</div><div class='ctx'> or Little) or cache, may be needed to uniquely identify the SAW register</div><div class='ctx'> configuration and initialization data. The compatible string is used to</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mstar/mstar.yaml b/Documentation/devicetree/bindings/arm/mstar/mstar.yaml<br/>index 8892eb6bd3ef..937059fcc7b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mstar/mstar.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mstar/mstar.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mstar/mstar.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/mstar/mstar.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/mstar/mstar.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MStar platforms device tree bindings</div><div class='add'>+title: MStar platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Palmer &lt;daniel@thingy.jp&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/npcm/npcm.yaml b/Documentation/devicetree/bindings/arm/npcm/npcm.yaml<br/>index 95e51378089c..6871483947c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/npcm/npcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/npcm/npcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/npcm/npcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/npcm/npcm.yaml</a></div><div class='hunk'>@@ -4,10 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/npcm/npcm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NPCM Platforms Device Tree Bindings</div><div class='add'>+title: NPCM Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;</div><div class='add'>+  - Tomer Maimon &lt;tmaimon77@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='hunk'>@@ -26,4 +27,10 @@ properties:</div><div class='ctx'>               - nuvoton,npcm750-evb         # NPCM750 evaluation board</div><div class='ctx'>           - const: nuvoton,npcm750</div><div class='ctx'> </div><div class='add'>+      - description: NPCM845 based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nuvoton,npcm845-evb         # NPCM845 evaluation board</div><div class='add'>+          - const: nuvoton,npcm845</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml<br/>index fcb211add7d3..94e72f25b331 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml</a></div><div class='hunk'>@@ -8,6 +8,7 @@ title: Global Control Registers block in Nuvoton SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;</div><div class='add'>+  - Tomer Maimon &lt;tmaimon77@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs</div><div class='hunk'>@@ -20,6 +21,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - nuvoton,wpcm450-gcr</div><div class='ctx'>           - nuvoton,npcm750-gcr</div><div class='add'>+          - nuvoton,npcm845-gcr</div><div class='ctx'>       - const: syscon</div><div class='ctx'>       - const: simple-mfd</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml<br/>index c9675c4cdc1b..84dc6b7512af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NVIDIA Tegra194 CPU Complex device tree bindings</div><div class='add'>+title: NVIDIA Tegra194 CPU Complex</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='hunk'>@@ -25,7 +25,7 @@ properties:</div><div class='ctx'>       - nvidia,tegra194-ccplex</div><div class='ctx'> </div><div class='ctx'>   nvidia,bpmp:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: |</div><div class='ctx'>       Specifies the bpmp node that needs to be queried to get</div><div class='ctx'>       operating point data for all CPUs.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml b/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml<br/>index 214c97bc3063..f1bd6f50e726 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/nxp/lpc32xx.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/nxp/lpc32xx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP LPC32xx Platforms Device Tree Bindings</div><div class='add'>+title: NXP LPC32xx Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Roland Stigge &lt;stigge@antcom.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/omap/prcm.txt b/Documentation/devicetree/bindings/arm/omap/prcm.txt<br/>index 3eb6d7afff14..431ef8c56a13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/omap/prcm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/omap/prcm.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/omap/prcm.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/omap/prcm.txt</a></div><div class='hunk'>@@ -31,12 +31,17 @@ Required properties:</div><div class='ctx'> 		(base address and length)</div><div class='ctx'> - clocks:	clocks for this module</div><div class='ctx'> - clockdomains:	clockdomains for this module</div><div class='add'>+- #clock-cells: From common clock binding</div><div class='add'>+- clock-output-names: From common clock binding</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='del'>-cm: cm@48004000 {</div><div class='add'>+cm: clock@48004000 {</div><div class='ctx'> 	compatible = "ti,omap3-cm";</div><div class='ctx'> 	reg = &lt;0x48004000 0x4000&gt;;</div><div class='add'>+	#clock-cells = &lt;0&gt;;</div><div class='add'>+	clock-output-names = "cm";</div><div class='ctx'> </div><div class='ctx'> 	cm_clocks: clocks {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/oxnas.txt b/Documentation/devicetree/bindings/arm/oxnas.txt<br/>deleted file mode 100644<br/>index ac64e60f99f1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/oxnas.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/oxnas.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-Oxford Semiconductor OXNAS SoCs Family device tree bindings</div><div class='del'>--------------------------------------------</div><div class='del'>-</div><div class='del'>-Boards with the OX810SE SoC shall have the following properties:</div><div class='del'>-  Required root node property:</div><div class='del'>-    compatible: "oxsemi,ox810se"</div><div class='del'>-</div><div class='del'>-Boards with the OX820 SoC shall have the following properties:</div><div class='del'>-  Required root node property:</div><div class='del'>-    compatible: "oxsemi,ox820"</div><div class='del'>-</div><div class='del'>-Board compatible values:</div><div class='del'>-  - "wd,mbwe" (OX810SE)</div><div class='del'>-  - "cloudengines,pogoplugv3" (OX820)</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml<br/>index dbb6f3dc5ae5..e14358bf0b9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/pmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/pmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/pmu.yaml</a></div><div class='hunk'>@@ -20,6 +20,8 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apm,potenza-pmu</div><div class='add'>+          - apple,avalanche-pmu</div><div class='add'>+          - apple,blizzard-pmu</div><div class='ctx'>           - apple,firestorm-pmu</div><div class='ctx'>           - apple,icestorm-pmu</div><div class='ctx'>           - arm,armv8-pmuv3 # Only for s/w models</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentation/devicetree/bindings/arm/psci.yaml<br/>index dd83ef278af0..3a2c908ff282 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/psci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/psci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/psci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/psci.yaml</a></div><div class='hunk'>@@ -43,29 +43,24 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - description:</div><div class='ctx'>           For implementations complying to PSCI 0.2.</div><div class='del'>-        const: arm,psci-0.2</div><div class='del'>-</div><div class='del'>-      - description:</div><div class='del'>-          For implementations complying to PSCI 0.2.</div><div class='ctx'>           Function IDs are not required and should be ignored by an OS with</div><div class='ctx'>           PSCI 0.2 support, but are permitted to be present for compatibility</div><div class='ctx'>           with existing software when "arm,psci" is later in the compatible</div><div class='ctx'>           list.</div><div class='add'>+        minItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           - const: arm,psci-0.2</div><div class='ctx'>           - const: arm,psci</div><div class='ctx'> </div><div class='ctx'>       - description:</div><div class='ctx'>           For implementations complying to PSCI 1.0.</div><div class='del'>-        const: arm,psci-1.0</div><div class='del'>-</div><div class='del'>-      - description:</div><div class='del'>-          For implementations complying to PSCI 1.0.</div><div class='ctx'>           PSCI 1.0 is backward compatible with PSCI 0.2 with minor</div><div class='ctx'>           specification updates, as defined in the PSCI specification[2].</div><div class='add'>+        minItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           - const: arm,psci-1.0</div><div class='ctx'>           - const: arm,psci-0.2</div><div class='add'>+          - const: arm,psci</div><div class='ctx'> </div><div class='ctx'>   method:</div><div class='ctx'>     description: The method of calling the PSCI firmware.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml<br/>new file mode 100644<br/>index 000000000000..2ec9b5b24d73<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Trace, Profiling and Diagnostics Aggregator - TPDA</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  TPDAs are responsible for packetization and timestamping of data sets</div><div class='add'>+  utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or</div><div class='add'>+  more attached TPDM and pushing the resultant (packetized) data out a</div><div class='add'>+  master ATB interface. Performing an arbitrated ATB interleaving (funneling)</div><div class='add'>+  task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).</div><div class='add'>+</div><div class='add'>+  There is no strict binding between TPDM and TPDA. TPDA can have multiple</div><div class='add'>+  TPDMs connect to it. But There must be only one TPDA in the path from the</div><div class='add'>+  TPDM source to TMC sink. TPDM can directly connect to TPDA's inport or</div><div class='add'>+  connect to funnel which will connect to TPDA's inport.</div><div class='add'>+</div><div class='add'>+  We can use the commands are similar to the below to validate TPDMs.</div><div class='add'>+  Enable coresight sink first.</div><div class='add'>+</div><div class='add'>+  echo 1 &gt; /sys/bus/coresight/devices/tmc_etf0/enable_sink</div><div class='add'>+  echo 1 &gt; /sys/bus/coresight/devices/tpdm0/enable_source</div><div class='add'>+  echo 1 &gt; /sys/bus/coresight/devices/tpdm0/integration_test</div><div class='add'>+  echo 2 &gt; /sys/bus/coresight/devices/tpdm0/integration_test</div><div class='add'>+</div><div class='add'>+  The test data will be collected in the coresight sink which is enabled.</div><div class='add'>+  If rwp register of the sink is keeping updating when do integration_test</div><div class='add'>+  (by cat tmc_etf0/mgmt/rwp), it means there is data generated from TPDM</div><div class='add'>+  to sink.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mao Jinlong &lt;quic_jinlmao@quicinc.com&gt;</div><div class='add'>+  - Tao Zhang &lt;quic_taozha@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,coresight-tpda</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^tpda(@[0-9a-f]+)$"</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: qcom,coresight-tpda</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+</div><div class='add'>+  in-ports:</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      Input connections from TPDM to TPDA</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      Output connections from the TPDA to legacy CoreSight trace bus.</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description:</div><div class='add'>+          Output connection from the TPDA to legacy CoreSight Trace bus.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - in-ports</div><div class='add'>+  - out-ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # minimum tpda definition.</div><div class='add'>+  - |</div><div class='add'>+    tpda@6004000 {</div><div class='add'>+       compatible = "qcom,coresight-tpda", "arm,primecell";</div><div class='add'>+       reg = &lt;0x6004000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+       clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+       clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+       in-ports {</div><div class='add'>+         #address-cells = &lt;1&gt;;</div><div class='add'>+         #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        port@0 {</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          tpda_qdss_0_in_tpdm_dcc: endpoint {</div><div class='add'>+            remote-endpoint =</div><div class='add'>+              &lt;&amp;tpdm_dcc_out_tpda_qdss_0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+       out-ports {</div><div class='add'>+         port {</div><div class='add'>+                 tpda_qdss_out_funnel_in0: endpoint {</div><div class='add'>+                    remote-endpoint =</div><div class='add'>+                    &lt;&amp;funnel_in0_in_tpda_qdss&gt;;</div><div class='add'>+                  };</div><div class='add'>+          };</div><div class='add'>+       };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml<br/>new file mode 100644<br/>index 000000000000..5c08342664ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Trace, Profiling and Diagnostics Monitor - TPDM</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The TPDM or Monitor serves as data collection component for various dataset</div><div class='add'>+  types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),</div><div class='add'>+  Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete</div><div class='add'>+  Single Bit (DSB). It performs data collection in the data producing clock</div><div class='add'>+  domain and transfers it to the data collection time domain, generally ATB</div><div class='add'>+  clock domain.</div><div class='add'>+</div><div class='add'>+  The primary use case of the TPDM is to collect data from different data</div><div class='add'>+  sources and send it to a TPDA for packetization, timestamping, and funneling.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mao Jinlong &lt;quic_jinlmao@quicinc.com&gt;</div><div class='add'>+  - Tao Zhang &lt;quic_taozha@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,coresight-tpdm</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^tpdm(@[0-9a-f]+)$"</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: qcom,coresight-tpdm</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+</div><div class='add'>+  out-ports:</div><div class='add'>+    description: |</div><div class='add'>+      Output connections from the TPDM to coresight funnel/TPDA.</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port:</div><div class='add'>+        description: Output connection from the TPDM to coresight</div><div class='add'>+            funnel/TPDA.</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # minimum TPDM definition. TPDM connect to coresight TPDA.</div><div class='add'>+  - |</div><div class='add'>+    tpdm@684c000 {</div><div class='add'>+      compatible = "qcom,coresight-tpdm", "arm,primecell";</div><div class='add'>+      reg = &lt;0x0684c000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+      clock-names = "apb_pclk";</div><div class='add'>+</div><div class='add'>+      out-ports {</div><div class='add'>+        port {</div><div class='add'>+          tpdm_prng_out_tpda_qdss: endpoint {</div><div class='add'>+            remote-endpoint =</div><div class='add'>+              &lt;&amp;tpda_qdss_in_tpdm_prng&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/qcom-soc.yaml b/Documentation/devicetree/bindings/arm/qcom-soc.yaml<br/>new file mode 100644<br/>index 000000000000..e333ec4a9c5f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/qcom-soc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/qcom-soc.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/qcom-soc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SoC compatibles naming convention</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Guidelines for new compatibles for SoC blocks/components.</div><div class='add'>+  When adding new compatibles in new bindings, use the format::</div><div class='add'>+    qcom,SoC-IP</div><div class='add'>+</div><div class='add'>+  For example::</div><div class='add'>+   qcom,sdm845-llcc-bwmon</div><div class='add'>+</div><div class='add'>+  When adding new compatibles to existing bindings, use the format in the</div><div class='add'>+  existing binding, even if it contradicts the above.</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      pattern: "^qcom,.*(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      # Preferred naming style for compatibles of SoC components:</div><div class='add'>+      - pattern: "^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+-.*$"</div><div class='add'>+      - pattern: "^qcom,(sa|sc)8[0-9]+[a-z][a-z]?-.*$"</div><div class='add'>+</div><div class='add'>+      # Legacy namings - variations of existing patterns/compatibles are OK,</div><div class='add'>+      # but do not add completely new entries to these:</div><div class='add'>+      - pattern: "^qcom,[ak]pss-wdt-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"</div><div class='add'>+      - pattern: "^qcom,gcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"</div><div class='add'>+      - pattern: "^qcom,mmcc-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"</div><div class='add'>+      - pattern: "^qcom,pcie-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"</div><div class='add'>+      - pattern: "^qcom,rpm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"</div><div class='add'>+      - pattern: "^qcom,scm-(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+.*$"</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,dsi-ctrl-6g-qcm2290</div><div class='add'>+          - qcom,gpucc-sdm630</div><div class='add'>+          - qcom,gpucc-sdm660</div><div class='add'>+          - qcom,lcc-apq8064</div><div class='add'>+          - qcom,lcc-ipq8064</div><div class='add'>+          - qcom,lcc-mdm9615</div><div class='add'>+          - qcom,lcc-msm8960</div><div class='add'>+          - qcom,lpass-cpu-apq8016</div><div class='add'>+          - qcom,usb-ss-ipq4019-phy</div><div class='add'>+          - qcom,usb-hs-ipq4019-phy</div><div class='add'>+          - qcom,vqmmc-ipq4019-regulator</div><div class='add'>+</div><div class='add'>+      # Legacy compatibles with wild-cards - list cannot grow with new bindings:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,ipq806x-gmac</div><div class='add'>+          - qcom,ipq806x-nand</div><div class='add'>+          - qcom,ipq806x-sata-phy</div><div class='add'>+          - qcom,ipq806x-usb-phy-ss</div><div class='add'>+          - qcom,ipq806x-usb-phy-hs</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml<br/>index 129cdd246223..d9dd25695c3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/qcom.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/qcom.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/qcom.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/qcom.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/qcom.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: QCOM device tree bindings</div><div class='add'>+title: QCOM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Stephen Boyd &lt;sboyd@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Some qcom based bootloaders identify the dtb blob based on a set of</div><div class='hunk'>@@ -29,33 +29,65 @@ description: |</div><div class='ctx'>         apq8074</div><div class='ctx'>         apq8084</div><div class='ctx'>         apq8096</div><div class='add'>+        ipq4018</div><div class='add'>+        ipq5332</div><div class='ctx'>         ipq6018</div><div class='ctx'>         ipq8074</div><div class='add'>+        ipq9574</div><div class='ctx'>         mdm9615</div><div class='ctx'>         msm8226</div><div class='ctx'>         msm8916</div><div class='add'>+        msm8939</div><div class='add'>+        msm8953</div><div class='add'>+        msm8956</div><div class='ctx'>         msm8974</div><div class='add'>+        msm8976</div><div class='ctx'>         msm8992</div><div class='ctx'>         msm8994</div><div class='ctx'>         msm8996</div><div class='add'>+        msm8998</div><div class='add'>+        qcs404</div><div class='add'>+        qcm2290</div><div class='add'>+        qdu1000</div><div class='add'>+        qrb2210</div><div class='add'>+        qrb4210</div><div class='add'>+        qru1000</div><div class='ctx'>         sa8155p</div><div class='add'>+        sa8540p</div><div class='add'>+        sa8775p</div><div class='ctx'>         sc7180</div><div class='ctx'>         sc7280</div><div class='add'>+        sc8180x</div><div class='add'>+        sc8280xp</div><div class='add'>+        sda660</div><div class='add'>+        sdm450</div><div class='ctx'>         sdm630</div><div class='ctx'>         sdm632</div><div class='add'>+        sdm636</div><div class='ctx'>         sdm660</div><div class='add'>+        sdm670</div><div class='ctx'>         sdm845</div><div class='ctx'>         sdx55</div><div class='ctx'>         sdx65</div><div class='add'>+        sm4250</div><div class='add'>+        sm6115</div><div class='add'>+        sm6115p</div><div class='add'>+        sm6125</div><div class='add'>+        sm6350</div><div class='add'>+        sm6375</div><div class='ctx'>         sm7225</div><div class='ctx'>         sm8150</div><div class='ctx'>         sm8250</div><div class='ctx'>         sm8350</div><div class='ctx'>         sm8450</div><div class='add'>+        sm8550</div><div class='ctx'> </div><div class='ctx'>   The 'board' element must be one of the following strings:</div><div class='ctx'> </div><div class='ctx'>         adp</div><div class='add'>+        ap-al02-c7</div><div class='add'>+        ap-mi01.2</div><div class='add'>+        ap-mi01.6</div><div class='ctx'>         cdp</div><div class='ctx'>         cp01-c1</div><div class='ctx'>         dragonboard</div><div class='hunk'>@@ -66,7 +98,10 @@ description: |</div><div class='ctx'>         liquid</div><div class='ctx'>         mtp</div><div class='ctx'>         qrd</div><div class='add'>+        rb2</div><div class='add'>+        ride</div><div class='ctx'>         sbc</div><div class='add'>+        x100</div><div class='ctx'> </div><div class='ctx'>   The 'soc_version' and 'board_version' elements take the form of v&lt;Major&gt;.&lt;Minor&gt;</div><div class='ctx'>   where the minor number may be omitted when it's zero, i.e.  v1.0 is the same</div><div class='hunk'>@@ -87,6 +122,11 @@ description: |</div><div class='ctx'>   A dragonboard board v0.1 of subtype 1 with an apq8074 SoC version 2, made in</div><div class='ctx'>   foundry 2.</div><div class='ctx'> </div><div class='add'>+  There are many devices in the list below that run the standard ChromeOS</div><div class='add'>+  bootloader setup and use the open source depthcharge bootloader to boot the</div><div class='add'>+  OS. These devices do not use the scheme described above. For details, see:</div><div class='add'>+  https://docs.kernel.org/arm/google/chromebook-boot-flow.html</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     const: "/"</div><div class='hunk'>@@ -99,7 +139,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - asus,sparrow</div><div class='add'>+              - huawei,sturgeon</div><div class='ctx'>               - lg,lenok</div><div class='add'>+              - samsung,matisse-wifi</div><div class='ctx'>           - const: qcom,apq8026</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='hunk'>@@ -135,42 +178,102 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - sony,kanuti-tulip</div><div class='add'>+              - square,apq8039-t2</div><div class='add'>+          - const: qcom,msm8939</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sony,kugo-row</div><div class='add'>+              - sony,suzu-row</div><div class='add'>+          - const: qcom,msm8956</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - qcom,msm8960-cdp</div><div class='ctx'>           - const: qcom,msm8960</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - fairphone,fp2</div><div class='ctx'>               - lge,hammerhead</div><div class='del'>-              - samsung,klte</div><div class='ctx'>               - sony,xperia-amami</div><div class='del'>-              - sony,xperia-castor</div><div class='ctx'>               - sony,xperia-honami</div><div class='ctx'>           - const: qcom,msm8974</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - alcatel,idol347</div><div class='del'>-          - const: qcom,msm8916-mtp/1</div><div class='add'>+              - fairphone,fp2</div><div class='add'>+              - oneplus,bacon</div><div class='add'>+              - samsung,klte</div><div class='add'>+              - sony,xperia-castor</div><div class='add'>+          - const: qcom,msm8974pro</div><div class='add'>+          - const: qcom,msm8974</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='ctx'>           - const: qcom,msm8916-mtp</div><div class='add'>+          - const: qcom,msm8916-mtp/1</div><div class='ctx'>           - const: qcom,msm8916</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - longcheer,l8150</div><div class='add'>+              - acer,a1-724</div><div class='add'>+              - alcatel,idol347</div><div class='add'>+              - asus,z00l</div><div class='add'>+              - gplus,fl8005a</div><div class='add'>+              - huawei,g7</div><div class='add'>+              - longcheer,l8910</div><div class='ctx'>               - samsung,a3u-eur</div><div class='ctx'>               - samsung,a5u-eur</div><div class='add'>+              - samsung,e5</div><div class='add'>+              - samsung,e7</div><div class='add'>+              - samsung,grandmax</div><div class='add'>+              - samsung,gt510</div><div class='add'>+              - samsung,gt58</div><div class='add'>+              - samsung,j5</div><div class='add'>+              - samsung,j5x</div><div class='add'>+              - samsung,serranove</div><div class='add'>+              - thwc,uf896</div><div class='add'>+              - thwc,ufi001c</div><div class='add'>+              - wingtech,wt88047</div><div class='add'>+              - yiming,uz801-v3</div><div class='add'>+          - const: qcom,msm8916</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: longcheer,l8150</div><div class='add'>+          - const: qcom,msm8916-v1-qrd/9-v1</div><div class='ctx'>           - const: qcom,msm8916</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - motorola,potter</div><div class='add'>+              - xiaomi,daisy</div><div class='add'>+              - xiaomi,mido</div><div class='add'>+              - xiaomi,tissot</div><div class='add'>+              - xiaomi,vince</div><div class='add'>+          - const: qcom,msm8953</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - lg,bullhead</div><div class='add'>+              - microsoft,talkman</div><div class='add'>+              - xiaomi,libra</div><div class='add'>+          - const: qcom,msm8992</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - sony,karin_windy</div><div class='add'>+          - const: qcom,apq8094</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - huawei,angler</div><div class='add'>+              - microsoft,cityman</div><div class='add'>+              - sony,ivy-row</div><div class='ctx'>               - sony,karin-row</div><div class='ctx'>               - sony,satsuki-row</div><div class='ctx'>               - sony,sumire-row</div><div class='ctx'>               - sony,suzuran-row</div><div class='del'>-              - qcom,msm8994</div><div class='del'>-          - const: qcom,apq8094</div><div class='add'>+          - const: qcom,msm8994</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -181,16 +284,45 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - oneplus,oneplus3</div><div class='add'>+              - oneplus,oneplus3t</div><div class='ctx'>               - qcom,msm8996-mtp</div><div class='ctx'>               - sony,dora-row</div><div class='ctx'>               - sony,kagura-row</div><div class='ctx'>               - sony,keyaki-row</div><div class='ctx'>               - xiaomi,gemini</div><div class='add'>+          - const: qcom,msm8996</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - xiaomi,natrium</div><div class='ctx'>               - xiaomi,scorpio</div><div class='add'>+          - const: qcom,msm8996pro</div><div class='ctx'>           - const: qcom,msm8996</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - asus,novago-tp370ql</div><div class='add'>+              - fxtec,pro1</div><div class='add'>+              - hp,envy-x2</div><div class='add'>+              - lenovo,miix-630</div><div class='add'>+              - oneplus,cheeseburger</div><div class='add'>+              - oneplus,dumpling</div><div class='add'>+              - qcom,msm8998-mtp</div><div class='add'>+              - sony,xperia-lilac</div><div class='add'>+              - sony,xperia-maple</div><div class='add'>+              - sony,xperia-poplar</div><div class='add'>+              - xiaomi,sagit</div><div class='add'>+          - const: qcom,msm8998</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - 8dev,jalapeno</div><div class='add'>+              - alfa-network,ap120c-ac</div><div class='add'>+          - const: qcom,ipq4018</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - qcom,ipq4019-ap-dk01.1-c1</div><div class='ctx'>               - qcom,ipq4019-ap-dk04.1-c3</div><div class='ctx'>               - qcom,ipq4019-ap-dk07.1-c1</div><div class='hunk'>@@ -200,6 +332,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,ipq5332-ap-mi01.2</div><div class='add'>+              - qcom,ipq5332-ap-mi01.6</div><div class='add'>+          - const: qcom,ipq5332</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mikrotik,rb3011</div><div class='ctx'>               - qcom,ipq8064-ap148</div><div class='ctx'>           - const: qcom,ipq8064</div><div class='ctx'> </div><div class='hunk'>@@ -212,31 +351,464 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,ipq9574-ap-al02-c7</div><div class='add'>+          - const: qcom,ipq9574</div><div class='add'>+</div><div class='add'>+      - description: Sierra Wireless MangOH Green with WP8548 Module</div><div class='add'>+        items:</div><div class='add'>+          - const: swir,mangoh-green-wp8548</div><div class='add'>+          - const: swir,wp8548</div><div class='add'>+          - const: qcom,mdm9615</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. Robotics RB1</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qrb2210-rb1</div><div class='add'>+          - const: qcom,qrb2210</div><div class='add'>+          - const: qcom,qcm2290</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qdu1000-idp</div><div class='add'>+              - qcom,qdu1000-x100</div><div class='add'>+          - const: qcom,qdu1000</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. Radio Unit 1000 platform</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qru1000-idp</div><div class='add'>+          - const: qcom,qru1000</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. SC7180 IDP</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - qcom,sc7180-idp</div><div class='ctx'>           - const: qcom,sc7180</div><div class='ctx'> </div><div class='add'>+      - description: HP Chromebook x2 11c (rev1 - 2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,coachz-rev1</div><div class='add'>+          - const: google,coachz-rev2</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: HP Chromebook x2 11c (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,coachz</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: HP Chromebook x2 11c with LTE (rev1 - 2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,coachz-rev1-sku0</div><div class='add'>+          - const: google,coachz-rev2-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: HP Chromebook x2 11c with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,coachz-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo Chromebook Duet 5 13 (rev2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,homestar-rev2</div><div class='add'>+          - const: google,homestar-rev23</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo Chromebook Duet 5 13 (rev3)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,homestar-rev3</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo Chromebook Duet 5 13 (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,homestar</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Kingoftown (rev0)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,kingoftown-rev0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Kingoftown (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,kingoftown</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 (rev0)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 (rev1 - 2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev1</div><div class='add'>+          - const: google,lazor-rev2</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 (rev3 - 8)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev3</div><div class='add'>+          - const: google,lazor-rev4</div><div class='add'>+          - const: google,lazor-rev5</div><div class='add'>+          - const: google,lazor-rev6</div><div class='add'>+          - const: google,lazor-rev7</div><div class='add'>+          - const: google,lazor-rev8</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 with KB Backlight (rev1 - 2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev1-sku2</div><div class='add'>+          - const: google,lazor-rev2-sku2</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 with KB Backlight (rev3 - 8)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev3-sku2</div><div class='add'>+          - const: google,lazor-rev4-sku2</div><div class='add'>+          - const: google,lazor-rev5-sku2</div><div class='add'>+          - const: google,lazor-rev6-sku2</div><div class='add'>+          - const: google,lazor-rev7-sku2</div><div class='add'>+          - const: google,lazor-rev8-sku2</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 with KB Backlight (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-sku2</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 with LTE (rev1 - 2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev1-sku0</div><div class='add'>+          - const: google,lazor-rev2-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 with LTE (rev3 - 8)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev3-sku0</div><div class='add'>+          - const: google,lazor-rev4-sku0</div><div class='add'>+          - const: google,lazor-rev5-sku0</div><div class='add'>+          - const: google,lazor-rev6-sku0</div><div class='add'>+          - const: google,lazor-rev7-sku0</div><div class='add'>+          - const: google,lazor-rev8-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook Spin 513 with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook 511 (rev4 - rev8)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev4-sku4</div><div class='add'>+          - const: google,lazor-rev5-sku4</div><div class='add'>+          - const: google,lazor-rev6-sku4</div><div class='add'>+          - const: google,lazor-rev7-sku4</div><div class='add'>+          - const: google,lazor-rev8-sku4</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook 511 (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-sku4</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook 511 without Touchscreen (rev4)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev4-sku5</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook 511 without Touchscreen (rev5 - rev8)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-rev5-sku5</div><div class='add'>+          - const: google,lazor-rev5-sku6</div><div class='add'>+          - const: google,lazor-rev6-sku6</div><div class='add'>+          - const: google,lazor-rev7-sku6</div><div class='add'>+          - const: google,lazor-rev8-sku6</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Acer Chromebook 511 without Touchscreen (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,lazor-sku6</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Mrbland with AUO panel (rev0)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,mrbland-rev0-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Mrbland with AUO panel (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,mrbland-sku1536</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Mrbland with BOE panel (rev0)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,mrbland-rev0-sku16</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Mrbland with BOE panel (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,mrbland-sku1024</div><div class='add'>+          - const: google,mrbland-sku768</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Pazquel with Parade (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pazquel-sku5</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Pazquel with TI (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pazquel-sku1</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Pazquel with LTE and Parade (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pazquel-sku6</div><div class='add'>+          - const: google,pazquel-sku4</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Pazquel with LTE and TI (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pazquel-sku0</div><div class='add'>+          - const: google,pazquel-sku2</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Pazquel360 with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pazquel-sku22</div><div class='add'>+          - const: google,pazquel-sku20</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Pazquel360 with WiFi (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pazquel-sku21</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Sharp Dynabook Chromebook C1 (rev1)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pompom-rev1</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Sharp Dynabook Chromebook C1 (rev2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pompom-rev2</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Sharp Dynabook Chromebook C1 (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pompom</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Sharp Dynabook Chromebook C1 with LTE (rev1)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pompom-rev1-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Sharp Dynabook Chromebook C1 with LTE (rev2)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pompom-rev2-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Sharp Dynabook Chromebook C1 with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,pompom-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Quackingstick (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,quackingstick-sku1537</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Quackingstick with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,quackingstick-sku1536</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Trogdor (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,trogdor</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Google Trogdor with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,trogdor-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel (rev0)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,wormdingler-rev0-sku16</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,wormdingler-sku1024</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo IdeaPad Chromebook Duet 3 with BOE panel and rt5682s (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,wormdingler-sku1025</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo IdeaPad Chromebook Duet 3 with INX panel (rev0)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,wormdingler-rev0-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo IdeaPad Chromebook Duet 3 with INX panel (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,wormdingler-sku0</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Lenovo IdeaPad Chromebook Duet 3 with INX panel and rt5682s (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,wormdingler-sku1</div><div class='add'>+          - const: qcom,sc7180</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sc7280-crd</div><div class='add'>+          - const: google,hoglin-rev3</div><div class='add'>+          - const: google,hoglin-rev4</div><div class='add'>+          - const: google,piglin-rev3</div><div class='add'>+          - const: google,piglin-rev4</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. sc7280 CRD platform (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,zoglin</div><div class='add'>+          - const: google,hoglin</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. sc7280 CRD Pro platform (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,zoglin-sku1536</div><div class='add'>+          - const: google,hoglin-sku1536</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. sc7280 IDP SKU1 platform</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sc7280-idp</div><div class='add'>+          - const: google,senor</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Qualcomm Technologies, Inc. sc7280 IDP SKU2 platform</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sc7280-idp2</div><div class='add'>+          - const: google,piglin</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Evoker (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,evoker</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Evoker with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,evoker-sku512</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Herobrine (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,herobrine</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Villager (rev0)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,villager-rev0</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Villager (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,villager</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Villager with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,villager-sku512</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Zombie (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,zombie</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Zombie with LTE (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,zombie-sku512</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Zombie with NVMe (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,zombie-sku2</div><div class='add'>+          - const: google,zombie-sku3</div><div class='add'>+          - const: google,zombie-sku515</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='add'>+      - description: Google Zombie with LTE and NVMe (newest rev)</div><div class='add'>+        items:</div><div class='add'>+          - const: google,zombie-sku514</div><div class='add'>+          - const: qcom,sc7280</div><div class='add'>+</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - qcom,sc7280-crd</div><div class='del'>-              - qcom,sc7280-idp</div><div class='del'>-              - qcom,sc7280-idp2</div><div class='del'>-              - google,hoglin</div><div class='del'>-              - google,piglin</div><div class='del'>-              - google,senor</div><div class='del'>-          - const: qcom,sc7280</div><div class='add'>+              - lenovo,flex-5g</div><div class='add'>+              - microsoft,surface-prox</div><div class='add'>+              - qcom,sc8180x-primus</div><div class='add'>+          - const: qcom,sc8180x</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - lenovo,thinkpad-x13s</div><div class='add'>+              - qcom,sc8280xp-crd</div><div class='add'>+              - qcom,sc8280xp-qrd</div><div class='add'>+          - const: qcom,sc8280xp</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - motorola,ali</div><div class='add'>+          - const: qcom,sdm450</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sony,discovery-row</div><div class='add'>+              - sony,kirin-row</div><div class='add'>+              - sony,pioneer-row</div><div class='add'>+              - sony,voyager-row</div><div class='add'>+          - const: qcom,sdm630</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - inforce,ifc6560</div><div class='add'>+          - const: qcom,sda660</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fairphone,fp3</div><div class='add'>+              - motorola,ocean</div><div class='ctx'>           - const: qcom,sdm632</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - sony,mermaid-row</div><div class='add'>+          - const: qcom,sdm636</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - xiaomi,lavender</div><div class='ctx'>           - const: qcom,sdm660</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - google,sargo</div><div class='add'>+          - const: qcom,sdm670</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - qcom,sdx55-mtp</div><div class='ctx'>               - qcom,sdx55-telit-fn980-tlb</div><div class='ctx'>               - qcom,sdx55-t55</div><div class='hunk'>@@ -255,37 +827,259 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,qcs404-evb-1000</div><div class='add'>+              - qcom,qcs404-evb-4000</div><div class='add'>+          - const: qcom,qcs404-evb</div><div class='add'>+          - const: qcom,qcs404</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - qcom,sa8155p-adp</div><div class='ctx'>           - const: qcom,sa8155p</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,sa8295p-adp</div><div class='add'>+              - qcom,sa8540p-ride</div><div class='add'>+          - const: qcom,sa8540p</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sa8775p-ride</div><div class='add'>+          - const: qcom,sa8775p</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - google,cheza</div><div class='add'>+              - google,cheza-rev1</div><div class='add'>+              - google,cheza-rev2</div><div class='add'>+              - lenovo,yoga-c630</div><div class='add'>+              - lg,judyln</div><div class='add'>+              - lg,judyp</div><div class='add'>+              - oneplus,enchilada</div><div class='add'>+              - oneplus,fajita</div><div class='add'>+              - qcom,sdm845-mtp</div><div class='add'>+              - shift,axolotl</div><div class='add'>+              - samsung,starqltechn</div><div class='add'>+              - samsung,w737</div><div class='add'>+              - sony,akari-row</div><div class='add'>+              - sony,akatsuki-row</div><div class='add'>+              - sony,apollo-row</div><div class='add'>+              - thundercomm,db845c</div><div class='add'>+              - xiaomi,beryllium</div><div class='add'>+              - xiaomi,beryllium-ebbg</div><div class='add'>+              - xiaomi,polaris</div><div class='add'>+          - const: qcom,sdm845</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - oneplus,billie2</div><div class='add'>+          - const: qcom,sm4250</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qrb4210-rb2</div><div class='add'>+          - const: qcom,qrb4210</div><div class='add'>+          - const: qcom,sm4250</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - lenovo,j606f</div><div class='add'>+          - const: qcom,sm6115p</div><div class='add'>+          - const: qcom,sm6115</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sony,pdx201</div><div class='add'>+              - xiaomi,laurel-sprout</div><div class='add'>+          - const: qcom,sm6125</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sony,pdx213</div><div class='add'>+          - const: qcom,sm6350</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sony,pdx225</div><div class='add'>+          - const: qcom,sm6375</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - fairphone,fp4</div><div class='ctx'>           - const: qcom,sm7225</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - microsoft,surface-duo</div><div class='add'>+              - qcom,sm8150-hdk</div><div class='ctx'>               - qcom,sm8150-mtp</div><div class='add'>+              - sony,bahamut-generic</div><div class='add'>+              - sony,griffin-generic</div><div class='ctx'>           - const: qcom,sm8150</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,qrb5165-rb5</div><div class='add'>+              - qcom,sm8250-hdk</div><div class='ctx'>               - qcom,sm8250-mtp</div><div class='add'>+              - sony,pdx203-generic</div><div class='add'>+              - sony,pdx206-generic</div><div class='add'>+              - xiaomi,elish</div><div class='ctx'>           - const: qcom,sm8250</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - microsoft,surface-duo2</div><div class='ctx'>               - qcom,sm8350-hdk</div><div class='ctx'>               - qcom,sm8350-mtp</div><div class='add'>+              - sony,pdx214-generic</div><div class='add'>+              - sony,pdx215-generic</div><div class='ctx'>           - const: qcom,sm8350</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,sm8450-hdk</div><div class='ctx'>               - qcom,sm8450-qrd</div><div class='add'>+              - sony,pdx223</div><div class='add'>+              - sony,pdx224</div><div class='ctx'>           - const: qcom,sm8450</div><div class='ctx'> </div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sm8550-mtp</div><div class='add'>+              - qcom,sm8550-qrd</div><div class='add'>+          - const: qcom,sm8550</div><div class='add'>+</div><div class='add'>+  # Board compatibles go above</div><div class='add'>+</div><div class='add'>+  qcom,msm-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: |</div><div class='add'>+            MSM chipset ID - an exact match value consisting of two bitfields::</div><div class='add'>+             - bits 0-15  - The unique MSM chipset ID</div><div class='add'>+             - bits 16-31 - Reserved; should be 0</div><div class='add'>+        - description: |</div><div class='add'>+            Hardware revision ID - a chipset specific 32-bit ID representing</div><div class='add'>+            the version of the chipset.  It is best a match value - the</div><div class='add'>+            bootloader will look for the closest possible match.</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      The MSM chipset and hardware revision used Qualcomm bootloaders.  It</div><div class='add'>+      can optionally be an array of these to indicate multiple hardware that</div><div class='add'>+      use the same device tree.  It is expected that the bootloader will use</div><div class='add'>+      this information at boot-up to decide which device tree to use when given</div><div class='add'>+      multiple device trees, some of which may not be compatible with the</div><div class='add'>+      actual hardware.  It is the bootloader's responsibility to pass the</div><div class='add'>+      correct device tree to the kernel.</div><div class='add'>+      The property is deprecated.</div><div class='add'>+</div><div class='add'>+  qcom,board-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - items:</div><div class='add'>+              - description: |</div><div class='add'>+                  Board ID consisting of three bitfields::</div><div class='add'>+                    - bits 31-24 - Unused</div><div class='add'>+                    - bits 23-16 - Platform Version Major</div><div class='add'>+                    - bits 15-8  - Platform Version Minor</div><div class='add'>+                    - bits 7-0   - Platform Type</div><div class='add'>+                  Platform Type field is an exact match value.  The</div><div class='add'>+                  Platform Major/Minor field is a best match.  The bootloader will</div><div class='add'>+                  look for the closest possible match.</div><div class='add'>+              - description: |</div><div class='add'>+                  Subtype ID unique to a Platform Type/Chipset ID.  For a given</div><div class='add'>+                  Platform Type, there will typically only be a single board and the</div><div class='add'>+                  subtype_id will be 0.  However in some cases board variants may</div><div class='add'>+                  need to be distinguished by different subtype_id values.</div><div class='add'>+      - items:</div><div class='add'>+          # OnePlus uses a variant of board-id with four elements:</div><div class='add'>+          - items:</div><div class='add'>+              - const: 8</div><div class='add'>+              - const: 0</div><div class='add'>+              - description: OnePlus board ID</div><div class='add'>+              - description: OnePlus subtype ID</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      The board type and revision information.  It can optionally be an array</div><div class='add'>+      of these to indicate multiple boards that use the same device tree.  It</div><div class='add'>+      is expected that the bootloader will use this information at boot-up to</div><div class='add'>+      decide which device tree to use when given multiple device trees, some of</div><div class='add'>+      which may not be compatible with the actual hardware.  It is the</div><div class='add'>+      bootloader's responsibility to pass the correct device tree to the</div><div class='add'>+      kernel</div><div class='add'>+      The property is deprecated.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  # Explicit allow-list for older SoCs. The legacy properties are not allowed</div><div class='add'>+  # on newer SoCs.</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,apq8026</div><div class='add'>+              - qcom,apq8094</div><div class='add'>+              - qcom,apq8096</div><div class='add'>+              - qcom,msm8939</div><div class='add'>+              - qcom,msm8953</div><div class='add'>+              - qcom,msm8956</div><div class='add'>+              - qcom,msm8992</div><div class='add'>+              - qcom,msm8994</div><div class='add'>+              - qcom,msm8996</div><div class='add'>+              - qcom,msm8998</div><div class='add'>+              - qcom,sdm450</div><div class='add'>+              - qcom,sdm630</div><div class='add'>+              - qcom,sdm632</div><div class='add'>+              - qcom,sdm636</div><div class='add'>+              - qcom,sdm845</div><div class='add'>+              - qcom,sdx55</div><div class='add'>+              - qcom,sdx65</div><div class='add'>+              - qcom,sm4250</div><div class='add'>+              - qcom,sm6115</div><div class='add'>+              - qcom,sm6125</div><div class='add'>+              - qcom,sm6350</div><div class='add'>+              - qcom,sm7225</div><div class='add'>+              - qcom,sm8150</div><div class='add'>+              - qcom,sm8250</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,board-id: true</div><div class='add'>+        qcom,msm-id: true</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,board-id: false</div><div class='add'>+        qcom,msm-id: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - oneplus,cheeseburger</div><div class='add'>+              - oneplus,dumpling</div><div class='add'>+              - oneplus,enchilada</div><div class='add'>+              - oneplus,fajita</div><div class='add'>+              - oneplus,oneplus3</div><div class='add'>+              - oneplus,oneplus3t</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,board-id:</div><div class='add'>+          items:</div><div class='add'>+            minItems: 4</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,board-id:</div><div class='add'>+          items:</div><div class='add'>+            maxItems: 2</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/rda.yaml b/Documentation/devicetree/bindings/arm/rda.yaml<br/>index a5c0444aa2b4..09241ea1d228 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/rda.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/rda.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/rda.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/rda.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/rda.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: RDA Micro platforms device tree bindings</div><div class='add'>+title: RDA Micro platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml<br/>index 9fb0297fe1ce..ddd9a85099e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/realtek.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/realtek.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/realtek.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/realtek.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/realtek.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Realtek platforms device tree bindings</div><div class='add'>+title: Realtek platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andreas Färber &lt;afaerber@suse.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml<br/>index eece92f83a2d..ec141c937b8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/rockchip.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/rockchip.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/rockchip.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/rockchip.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/rockchip.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip platforms device tree bindings</div><div class='add'>+title: Rockchip platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='hunk'>@@ -30,6 +30,31 @@ properties:</div><div class='ctx'>           - const: amarula,vyasa-rk3288</div><div class='ctx'>           - const: rockchip,rk3288</div><div class='ctx'> </div><div class='add'>+      - description: Anbernic RG351M</div><div class='add'>+        items:</div><div class='add'>+          - const: anbernic,rg351m</div><div class='add'>+          - const: rockchip,rk3326</div><div class='add'>+</div><div class='add'>+      - description: Anbernic RG353P</div><div class='add'>+        items:</div><div class='add'>+          - const: anbernic,rg353p</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: Anbernic RG353V</div><div class='add'>+        items:</div><div class='add'>+          - const: anbernic,rg353v</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: Anbernic RG353VS</div><div class='add'>+        items:</div><div class='add'>+          - const: anbernic,rg353vs</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: Anbernic RG503</div><div class='add'>+        items:</div><div class='add'>+          - const: anbernic,rg503</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='ctx'>       - description: Asus Tinker board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: asus,rk3288-tinker</div><div class='hunk'>@@ -65,11 +90,33 @@ properties:</div><div class='ctx'>           - const: chipspark,rayeager-px2</div><div class='ctx'>           - const: rockchip,rk3066a</div><div class='ctx'> </div><div class='add'>+      - description: Edgeble Neural Compute Module 2(Neu2) SoM based boards</div><div class='add'>+        items:</div><div class='add'>+          - const: edgeble,neural-compute-module-2-io   # Edgeble Neural Compute Module 2 IO Board</div><div class='add'>+          - const: edgeble,neural-compute-module-2      # Edgeble Neural Compute Module 2 SoM</div><div class='add'>+          - const: rockchip,rv1126</div><div class='add'>+</div><div class='add'>+      - description: Edgeble Neural Compute Module 6(Neu6) Model A SoM based boards</div><div class='add'>+        items:</div><div class='add'>+          - const: edgeble,neural-compute-module-6a-io  # Edgeble Neural Compute Module 6A IO Board</div><div class='add'>+          - const: edgeble,neural-compute-module-6a     # Edgeble Neural Compute Module 6A SoM</div><div class='add'>+          - const: rockchip,rk3588</div><div class='add'>+</div><div class='ctx'>       - description: Elgin RV1108 R1</div><div class='ctx'>         items:</div><div class='ctx'>           - const: elgin,rv1108-r1</div><div class='ctx'>           - const: rockchip,rv1108</div><div class='ctx'> </div><div class='add'>+      - description: EmbedFire LubanCat 1</div><div class='add'>+        items:</div><div class='add'>+          - const: embedfire,lubancat-1</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: EmbedFire LubanCat 2</div><div class='add'>+        items:</div><div class='add'>+          - const: embedfire,lubancat-2</div><div class='add'>+          - const: rockchip,rk3568</div><div class='add'>+</div><div class='ctx'>       - description: Engicam PX30.Core C.TOUCH 2.0</div><div class='ctx'>         items:</div><div class='ctx'>           - const: engicam,px30-core-ctouch2</div><div class='hunk'>@@ -133,9 +180,16 @@ properties:</div><div class='ctx'>               - firefly,roc-rk3399-pc-plus</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='ctx'> </div><div class='del'>-      - description: FriendlyElec NanoPi R2S</div><div class='add'>+      - description: Firefly Station M2</div><div class='add'>+        items:</div><div class='add'>+          - const: firefly,rk3566-roc-pc</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: FriendlyElec NanoPi R2 series boards</div><div class='ctx'>         items:</div><div class='del'>-          - const: friendlyarm,nanopi-r2s</div><div class='add'>+          - enum:</div><div class='add'>+              - friendlyarm,nanopi-r2c</div><div class='add'>+              - friendlyarm,nanopi-r2s</div><div class='ctx'>           - const: rockchip,rk3328</div><div class='ctx'> </div><div class='ctx'>       - description: FriendlyElec NanoPi4 series boards</div><div class='hunk'>@@ -146,8 +200,16 @@ properties:</div><div class='ctx'>               - friendlyarm,nanopi-m4b</div><div class='ctx'>               - friendlyarm,nanopi-neo4</div><div class='ctx'>               - friendlyarm,nanopi-r4s</div><div class='add'>+              - friendlyarm,nanopi-r4s-enterprise</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='ctx'> </div><div class='add'>+      - description: FriendlyElec NanoPi R5 series boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - friendlyarm,nanopi-r5c</div><div class='add'>+              - friendlyarm,nanopi-r5s</div><div class='add'>+          - const: rockchip,rk3568</div><div class='add'>+</div><div class='ctx'>       - description: GeekBuying GeekBox</div><div class='ctx'>         items:</div><div class='ctx'>           - const: geekbuying,geekbox</div><div class='hunk'>@@ -358,30 +420,55 @@ properties:</div><div class='ctx'>           - const: google,gru</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='ctx'> </div><div class='del'>-      - description: Google Scarlet - Innolux display (Acer Chromebook Tab 10)</div><div class='add'>+      - description: |</div><div class='add'>+          Google Scarlet - Innolux display (Acer Chromebook Tab 10 and more)</div><div class='ctx'>         items:</div><div class='add'>+          - const: google,scarlet-rev15-sku2</div><div class='add'>+          - const: google,scarlet-rev15-sku4</div><div class='ctx'>           - const: google,scarlet-rev15-sku6</div><div class='ctx'>           - const: google,scarlet-rev15</div><div class='add'>+          - const: google,scarlet-rev14-sku2</div><div class='add'>+          - const: google,scarlet-rev14-sku4</div><div class='ctx'>           - const: google,scarlet-rev14-sku6</div><div class='ctx'>           - const: google,scarlet-rev14</div><div class='add'>+          - const: google,scarlet-rev13-sku2</div><div class='add'>+          - const: google,scarlet-rev13-sku4</div><div class='ctx'>           - const: google,scarlet-rev13-sku6</div><div class='ctx'>           - const: google,scarlet-rev13</div><div class='add'>+          - const: google,scarlet-rev12-sku2</div><div class='add'>+          - const: google,scarlet-rev12-sku4</div><div class='ctx'>           - const: google,scarlet-rev12-sku6</div><div class='ctx'>           - const: google,scarlet-rev12</div><div class='add'>+          - const: google,scarlet-rev11-sku2</div><div class='add'>+          - const: google,scarlet-rev11-sku4</div><div class='ctx'>           - const: google,scarlet-rev11-sku6</div><div class='ctx'>           - const: google,scarlet-rev11</div><div class='add'>+          - const: google,scarlet-rev10-sku2</div><div class='add'>+          - const: google,scarlet-rev10-sku4</div><div class='ctx'>           - const: google,scarlet-rev10-sku6</div><div class='ctx'>           - const: google,scarlet-rev10</div><div class='add'>+          - const: google,scarlet-rev9-sku2</div><div class='add'>+          - const: google,scarlet-rev9-sku4</div><div class='ctx'>           - const: google,scarlet-rev9-sku6</div><div class='ctx'>           - const: google,scarlet-rev9</div><div class='add'>+          - const: google,scarlet-rev8-sku2</div><div class='add'>+          - const: google,scarlet-rev8-sku4</div><div class='ctx'>           - const: google,scarlet-rev8-sku6</div><div class='ctx'>           - const: google,scarlet-rev8</div><div class='add'>+          - const: google,scarlet-rev7-sku2</div><div class='add'>+          - const: google,scarlet-rev7-sku4</div><div class='ctx'>           - const: google,scarlet-rev7-sku6</div><div class='ctx'>           - const: google,scarlet-rev7</div><div class='add'>+          - const: google,scarlet-rev6-sku2</div><div class='add'>+          - const: google,scarlet-rev6-sku4</div><div class='ctx'>           - const: google,scarlet-rev6-sku6</div><div class='ctx'>           - const: google,scarlet-rev6</div><div class='add'>+          - const: google,scarlet-rev5-sku2</div><div class='add'>+          - const: google,scarlet-rev5-sku4</div><div class='ctx'>           - const: google,scarlet-rev5-sku6</div><div class='ctx'>           - const: google,scarlet-rev5</div><div class='add'>+          - const: google,scarlet-rev4-sku2</div><div class='add'>+          - const: google,scarlet-rev4-sku4</div><div class='ctx'>           - const: google,scarlet-rev4-sku6</div><div class='ctx'>           - const: google,scarlet-rev4</div><div class='ctx'>           - const: google,scarlet</div><div class='hunk'>@@ -427,6 +514,21 @@ properties:</div><div class='ctx'>           - const: hardkernel,rk3326-odroid-go2</div><div class='ctx'>           - const: rockchip,rk3326</div><div class='ctx'> </div><div class='add'>+      - description: Hardkernel Odroid Go Advance Black Edition</div><div class='add'>+        items:</div><div class='add'>+          - const: hardkernel,rk3326-odroid-go2-v11</div><div class='add'>+          - const: rockchip,rk3326</div><div class='add'>+</div><div class='add'>+      - description: Hardkernel Odroid Go Super</div><div class='add'>+        items:</div><div class='add'>+          - const: hardkernel,rk3326-odroid-go3</div><div class='add'>+          - const: rockchip,rk3326</div><div class='add'>+</div><div class='add'>+      - description: Hardkernel Odroid M1</div><div class='add'>+        items:</div><div class='add'>+          - const: rockchip,rk3568-odroid-m1</div><div class='add'>+          - const: rockchip,rk3568</div><div class='add'>+</div><div class='ctx'>       - description: Hugsun X99 TV Box</div><div class='ctx'>         items:</div><div class='ctx'>           - const: hugsun,x99</div><div class='hunk'>@@ -440,6 +542,11 @@ properties:</div><div class='ctx'>               - khadas,edge-v</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='ctx'> </div><div class='add'>+      - description: Khadas Edge2 series boards</div><div class='add'>+        items:</div><div class='add'>+          - const: khadas,edge2</div><div class='add'>+          - const: rockchip,rk3588s</div><div class='add'>+</div><div class='ctx'>       - description: Kobol Helios64</div><div class='ctx'>         items:</div><div class='ctx'>           - const: kobol,helios64</div><div class='hunk'>@@ -465,6 +572,11 @@ properties:</div><div class='ctx'>           - const: netxeon,r89</div><div class='ctx'>           - const: rockchip,rk3288</div><div class='ctx'> </div><div class='add'>+      - description: OPEN AI LAB EAIDK-610</div><div class='add'>+        items:</div><div class='add'>+          - const: openailab,eaidk-610</div><div class='add'>+          - const: rockchip,rk3399</div><div class='add'>+</div><div class='ctx'>       - description: Orange Pi RK3399 board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: rockchip,rk3399-orangepi</div><div class='hunk'>@@ -489,6 +601,11 @@ properties:</div><div class='ctx'>           - const: pine64,pinenote</div><div class='ctx'>           - const: rockchip,rk3566</div><div class='ctx'> </div><div class='add'>+      - description: Pine64 PinePhonePro</div><div class='add'>+        items:</div><div class='add'>+          - const: pine64,pinephone-pro</div><div class='add'>+          - const: rockchip,rk3399</div><div class='add'>+</div><div class='ctx'>       - description: Pine64 Rock64</div><div class='ctx'>         items:</div><div class='ctx'>           - const: pine64,rock64</div><div class='hunk'>@@ -502,11 +619,36 @@ properties:</div><div class='ctx'>           - const: pine64,rockpro64</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='ctx'> </div><div class='del'>-      - description: Pine64 Quartz64 Model A</div><div class='add'>+      - description: Pine64 Quartz64 Model A/B</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - pine64,quartz64-a</div><div class='add'>+              - pine64,quartz64-b</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: Pine64 SoQuartz SoM</div><div class='ctx'>         items:</div><div class='del'>-          - const: pine64,quartz64-a</div><div class='add'>+          - enum:</div><div class='add'>+              - pine64,soquartz-blade</div><div class='add'>+              - pine64,soquartz-cm4io</div><div class='add'>+              - pine64,soquartz-model-a</div><div class='add'>+          - const: pine64,soquartz</div><div class='ctx'>           - const: rockchip,rk3566</div><div class='ctx'> </div><div class='add'>+      - description: Radxa Compute Module 3(CM3)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - radxa,cm3-io</div><div class='add'>+          - const: radxa,cm3</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='add'>+      - description: Radxa CM3 Industrial</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - radxa,e25</div><div class='add'>+          - const: radxa,cm3i</div><div class='add'>+          - const: rockchip,rk3568</div><div class='add'>+</div><div class='ctx'>       - description: Radxa Rock</div><div class='ctx'>         items:</div><div class='ctx'>           - const: radxa,rock</div><div class='hunk'>@@ -523,6 +665,11 @@ properties:</div><div class='ctx'>           - const: radxa,rockpi4</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='ctx'> </div><div class='add'>+      - description: Radxa ROCK 4C+</div><div class='add'>+        items:</div><div class='add'>+          - const: radxa,rock-4c-plus</div><div class='add'>+          - const: rockchip,rk3399</div><div class='add'>+</div><div class='ctx'>       - description: Radxa ROCK Pi E</div><div class='ctx'>         items:</div><div class='ctx'>           - const: radxa,rockpi-e</div><div class='hunk'>@@ -540,11 +687,31 @@ properties:</div><div class='ctx'>           - const: vamrs,rk3399pro-vmarc-som</div><div class='ctx'>           - const: rockchip,rk3399pro</div><div class='ctx'> </div><div class='add'>+      - description: Radxa ROCK Pi S</div><div class='add'>+        items:</div><div class='add'>+          - const: radxa,rockpis</div><div class='add'>+          - const: rockchip,rk3308</div><div class='add'>+</div><div class='ctx'>       - description: Radxa Rock2 Square</div><div class='ctx'>         items:</div><div class='ctx'>           - const: radxa,rock2-square</div><div class='ctx'>           - const: rockchip,rk3288</div><div class='ctx'> </div><div class='add'>+      - description: Radxa ROCK3 Model A</div><div class='add'>+        items:</div><div class='add'>+          - const: radxa,rock3a</div><div class='add'>+          - const: rockchip,rk3568</div><div class='add'>+</div><div class='add'>+      - description: Radxa ROCK 5 Model A</div><div class='add'>+        items:</div><div class='add'>+          - const: radxa,rock-5a</div><div class='add'>+          - const: rockchip,rk3588s</div><div class='add'>+</div><div class='add'>+      - description: Radxa ROCK 5 Model B</div><div class='add'>+        items:</div><div class='add'>+          - const: radxa,rock-5b</div><div class='add'>+          - const: rockchip,rk3588</div><div class='add'>+</div><div class='ctx'>       - description: Rikomagic MK808 v1</div><div class='ctx'>         items:</div><div class='ctx'>           - const: rikomagic,mk808</div><div class='hunk'>@@ -582,6 +749,11 @@ properties:</div><div class='ctx'>           - const: rockchip,rk3036-evb</div><div class='ctx'>           - const: rockchip,rk3036</div><div class='ctx'> </div><div class='add'>+      - description: Rockchip RK3128 Evaluation board</div><div class='add'>+        items:</div><div class='add'>+          - const: rockchip,rk3128-evb</div><div class='add'>+          - const: rockchip,rk3128</div><div class='add'>+</div><div class='ctx'>       - description: Rockchip RK3228 Evaluation board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: rockchip,rk3228-evb</div><div class='hunk'>@@ -629,11 +801,21 @@ properties:</div><div class='ctx'>           - const: rockchip,rk3399-sapphire-excavator</div><div class='ctx'>           - const: rockchip,rk3399</div><div class='ctx'> </div><div class='add'>+      - description: Rockchip RK3588 Evaluation board</div><div class='add'>+        items:</div><div class='add'>+          - const: rockchip,rk3588-evb1-v10</div><div class='add'>+          - const: rockchip,rk3588</div><div class='add'>+</div><div class='ctx'>       - description: Rockchip RV1108 Evaluation board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: rockchip,rv1108-evb</div><div class='ctx'>           - const: rockchip,rv1108</div><div class='ctx'> </div><div class='add'>+      - description: Theobroma Systems PX30-uQ7 with Haikou baseboard</div><div class='add'>+        items:</div><div class='add'>+          - const: tsd,px30-ringneck-haikou</div><div class='add'>+          - const: rockchip,px30</div><div class='add'>+</div><div class='ctx'>       - description: Theobroma Systems RK3368-uQ7 with Haikou baseboard</div><div class='ctx'>         items:</div><div class='ctx'>           - const: tsd,rk3368-lion-haikou</div><div class='hunk'>@@ -649,11 +831,23 @@ properties:</div><div class='ctx'>           - const: tronsmart,orion-r68-meta</div><div class='ctx'>           - const: rockchip,rk3368</div><div class='ctx'> </div><div class='add'>+      - description: Xunlong Orange Pi R1 Plus / LTS</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - xunlong,orangepi-r1-plus</div><div class='add'>+              - xunlong,orangepi-r1-plus-lts</div><div class='add'>+          - const: rockchip,rk3328</div><div class='add'>+</div><div class='ctx'>       - description: Zkmagic A95X Z2</div><div class='ctx'>         items:</div><div class='ctx'>           - const: zkmagic,a95x-z2</div><div class='ctx'>           - const: rockchip,rk3318</div><div class='ctx'> </div><div class='add'>+      - description: Rockchip RK3566 BOX Evaluation Demo board</div><div class='add'>+        items:</div><div class='add'>+          - const: rockchip,rk3566-box-demo</div><div class='add'>+          - const: rockchip,rk3566</div><div class='add'>+</div><div class='ctx'>       - description: Rockchip RK3568 Evaluation board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: rockchip,rk3568-evb1-v10</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml b/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml<br/>index 5ece38065e54..b79c81cd9f0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/rockchip/pmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/rockchip/pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/rockchip/pmu.yaml</a></div><div class='hunk'>@@ -21,10 +21,13 @@ select:</div><div class='ctx'>         enum:</div><div class='ctx'>           - rockchip,px30-pmu</div><div class='ctx'>           - rockchip,rk3066-pmu</div><div class='add'>+          - rockchip,rk3128-pmu</div><div class='ctx'>           - rockchip,rk3288-pmu</div><div class='ctx'>           - rockchip,rk3368-pmu</div><div class='ctx'>           - rockchip,rk3399-pmu</div><div class='ctx'>           - rockchip,rk3568-pmu</div><div class='add'>+          - rockchip,rk3588-pmu</div><div class='add'>+          - rockchip,rv1126-pmu</div><div class='ctx'> </div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='hunk'>@@ -35,10 +38,13 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - rockchip,px30-pmu</div><div class='ctx'>           - rockchip,rk3066-pmu</div><div class='add'>+          - rockchip,rk3128-pmu</div><div class='ctx'>           - rockchip,rk3288-pmu</div><div class='ctx'>           - rockchip,rk3368-pmu</div><div class='ctx'>           - rockchip,rk3399-pmu</div><div class='ctx'>           - rockchip,rk3568-pmu</div><div class='add'>+          - rockchip,rk3588-pmu</div><div class='add'>+          - rockchip,rv1126-pmu</div><div class='ctx'>       - const: syscon</div><div class='ctx'>       - const: simple-mfd</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml<br/>index faea33e4f731..deb2cf971871 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/samsung/samsung-boards.yaml</a></div><div class='hunk'>@@ -171,6 +171,7 @@ properties:</div><div class='ctx'>               - hardkernel,odroid-xu3-lite      # Hardkernel Odroid XU3 Lite</div><div class='ctx'>               - hardkernel,odroid-xu4           # Hardkernel Odroid XU4</div><div class='ctx'>               - hardkernel,odroid-hc1           # Hardkernel Odroid HC1</div><div class='add'>+              - samsung,k3g                     # Samsung Galaxy S5 (SM-G900H)</div><div class='ctx'>           - const: samsung,exynos5800</div><div class='ctx'>           - const: samsung,exynos5</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml b/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml<br/>new file mode 100644<br/>index 000000000000..653f85997643<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/samsung/samsung-soc.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/samsung/samsung-soc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S3C, S5P and Exynos SoC compatibles naming convention</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Guidelines for new compatibles for SoC blocks/components.</div><div class='add'>+  When adding new compatibles in new bindings, use the format::</div><div class='add'>+    samsung,SoC-IP</div><div class='add'>+</div><div class='add'>+  For example::</div><div class='add'>+    samsung,exynos5433-cmu-isp</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      pattern: "^samsung,.*(s3c|s5pv|exynos)[0-9a-z]+.*$"</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Preferred naming style for compatibles of SoC components</div><div class='add'>+        pattern: "^samsung,(s3c|s5pv|exynos|exynosautov)[0-9]+-.*$"</div><div class='add'>+</div><div class='add'>+      # Legacy compatibles with wild-cards - list cannot grow with new bindings:</div><div class='add'>+      - enum:</div><div class='add'>+          - samsung,exynos4x12-pinctrl</div><div class='add'>+          - samsung,exynos4x12-usb2-phy</div><div class='add'>+          - samsung,s3c64xx-pinctrl</div><div class='add'>+          - samsung,s3c64xx-wakeup-eint</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml b/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml<br/>index aa1d4afbc510..5a428a885760 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/socionext/milbeaut.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Milbeaut platforms device tree bindings</div><div class='add'>+title: Milbeaut platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taichi Sugaya &lt;sugaya.taichi@socionext.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml b/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml<br/>index 8c0e91658474..3e7f3d927ec7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/socionext/uniphier.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/socionext/uniphier.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/socionext/uniphier.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/socionext/uniphier.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Socionext UniPhier platform device tree bindings</div><div class='add'>+title: Socionext UniPhier platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='hunk'>@@ -26,6 +26,12 @@ properties:</div><div class='ctx'>               - socionext,uniphier-pro4-ref</div><div class='ctx'>               - socionext,uniphier-pro4-sanji</div><div class='ctx'>           - const: socionext,uniphier-pro4</div><div class='add'>+      - description: Pro5 SoC boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - socionext,uniphier-pro5-epcore</div><div class='add'>+              - socionext,uniphier-pro5-proex</div><div class='add'>+          - const: socionext,uniphier-pro5</div><div class='ctx'>       - description: sLD8 SoC boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sp810.txt b/Documentation/devicetree/bindings/arm/sp810.txt<br/>deleted file mode 100644<br/>index 46652bf65147..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sp810.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sp810.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-SP810 System Controller</div><div class='del'>------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible:	standard compatible string for a Primecell peripheral,</div><div class='del'>-		see Documentation/devicetree/bindings/arm/primecell.yaml</div><div class='del'>-		for more details</div><div class='del'>-		should be: "arm,sp810", "arm,primecell"</div><div class='del'>-</div><div class='del'>-- reg:		standard registers property, physical address and size</div><div class='del'>-		of the control registers</div><div class='del'>-</div><div class='del'>-- clock-names:	from the common clock bindings, for more details see</div><div class='del'>-		Documentation/devicetree/bindings/clock/clock-bindings.txt;</div><div class='del'>-		should be: "refclk", "timclk", "apb_pclk"</div><div class='del'>-</div><div class='del'>-- clocks:	from the common clock bindings, phandle and clock</div><div class='del'>-		specifier pairs for the entries of clock-names property</div><div class='del'>-</div><div class='del'>-- #clock-cells: from the common clock bindings;</div><div class='del'>-		should be: &lt;1&gt;</div><div class='del'>-</div><div class='del'>-- clock-output-names: from the common clock bindings;</div><div class='del'>-		should be: "timerclken0", "timerclken1", "timerclken2", "timerclken3"</div><div class='del'>-</div><div class='del'>-- assigned-clocks: from the common clock binding;</div><div class='del'>-		should be: clock specifier for each output clock of this</div><div class='del'>-		provider node</div><div class='del'>-</div><div class='del'>-- assigned-clock-parents: from the common clock binding;</div><div class='del'>-		should be: phandle of input clock listed in clocks</div><div class='del'>-		property with the highest frequency</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	v2m_sysctl: sysctl@20000 {</div><div class='del'>-		compatible = "arm,sp810", "arm,primecell";</div><div class='del'>-		reg = &lt;0x020000 0x1000&gt;;</div><div class='del'>-		clocks = &lt;&amp;v2m_refclk32khz&gt;, &lt;&amp;v2m_refclk1mhz&gt;, &lt;&amp;smbclk&gt;;</div><div class='del'>-		clock-names = "refclk", "timclk", "apb_pclk";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";</div><div class='del'>-		assigned-clocks = &lt;&amp;v2m_sysctl 0&gt;, &lt;&amp;v2m_sysctl 1&gt;, &lt;&amp;v2m_sysctl 3&gt;, &lt;&amp;v2m_sysctl 3&gt;;</div><div class='del'>-		assigned-clock-parents = &lt;&amp;v2m_refclk1mhz&gt;, &lt;&amp;v2m_refclk1mhz&gt;, &lt;&amp;v2m_refclk1mhz&gt;, &lt;&amp;v2m_refclk1mhz&gt;;</div><div class='del'>-</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sp810.yaml b/Documentation/devicetree/bindings/arm/sp810.yaml<br/>new file mode 100644<br/>index 000000000000..c9094e5ec565<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sp810.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sp810.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/sp810.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Versatile Express SP810 System Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Arm SP810 system controller provides clocks, timers and a watchdog.</div><div class='add'>+</div><div class='add'>+# We need a select here so we don't match all nodes with 'arm,primecell'</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,sp810</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,sp810</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: refclk</div><div class='add'>+      - const: timclk</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: reference clock</div><div class='add'>+      - description: timer clock</div><div class='add'>+      - description: APB register access clock</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  assigned-clocks:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  assigned-clock-parents:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sysctl@20000 {</div><div class='add'>+        compatible = "arm,sp810", "arm,primecell";</div><div class='add'>+        reg = &lt;0x020000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;v2m_refclk32khz&gt;, &lt;&amp;v2m_refclk1mhz&gt;, &lt;&amp;smbclk&gt;;</div><div class='add'>+        clock-names = "refclk", "timclk", "apb_pclk";</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        clock-output-names = "timerclken0", "timerclken1",</div><div class='add'>+                             "timerclken2", "timerclken3";</div><div class='add'>+        assigned-clocks = &lt;&amp;v2m_sysctl 0&gt;, &lt;&amp;v2m_sysctl 1&gt;,</div><div class='add'>+                          &lt;&amp;v2m_sysctl 3&gt;, &lt;&amp;v2m_sysctl 3&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;v2m_refclk1mhz&gt;, &lt;&amp;v2m_refclk1mhz&gt;,</div><div class='add'>+                                 &lt;&amp;v2m_refclk1mhz&gt;, &lt;&amp;v2m_refclk1mhz&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt<br/>deleted file mode 100644<br/>index 93372f2a7df9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/spe-pmu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/spe-pmu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)</div><div class='del'>-</div><div class='del'>-ARMv8.2 introduces the optional Statistical Profiling Extension for collecting</div><div class='del'>-performance sample data using an in-memory trace buffer.</div><div class='del'>-</div><div class='del'>-** SPE Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be one of:</div><div class='del'>-	       "arm,statistical-profiling-extension-v1"</div><div class='del'>-</div><div class='del'>-- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where</div><div class='del'>-               SPE is only supported on a subset of the CPUs, please consult</div><div class='del'>-	       the arm,gic-v3 binding for details on describing a PPI partition.</div><div class='del'>-</div><div class='del'>-** Example:</div><div class='del'>-</div><div class='del'>-spe-pmu {</div><div class='del'>-        compatible = "arm,statistical-profiling-extension-v1";</div><div class='del'>-        interrupts = &lt;GIC_PPI 05 IRQ_TYPE_LEVEL_HIGH &amp;part1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/spear.yaml b/Documentation/devicetree/bindings/arm/spear.yaml<br/>index 605ad3f882ef..a465c9eca76e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/spear.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/spear.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/spear.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/spear.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/spear.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ST SPEAr Platforms Device Tree Bindings</div><div class='add'>+title: ST SPEAr Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Viresh Kumar &lt;vireshk@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sprd/sprd.yaml b/Documentation/devicetree/bindings/arm/sprd/sprd.yaml<br/>index 2c12e571394b..eaa67b8e0d6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sprd/sprd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sprd/sprd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sprd/sprd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sprd/sprd.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/sprd/sprd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Unisoc platforms device tree bindings</div><div class='add'>+title: Unisoc platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sti.yaml b/Documentation/devicetree/bindings/arm/sti.yaml<br/>index a41cd8764885..3ca054c64377 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sti.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sti.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sti.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sti.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/sti.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ST STi Platforms Device Tree Bindings</div><div class='add'>+title: ST STi Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml<br/>index ecb28e90fd11..2297ad3f4774 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/arm/stm32/st,mlahb.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 ML-AHB interconnect bindings</div><div class='add'>+title: STMicroelectronics STM32 ML-AHB interconnect</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabien Dessenne &lt;fabien.dessenne@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml b/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml<br/>index 6f846d69c5e1..ad8e51aa01b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/stm32/st,stm32-syscon.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Platforms System Controller bindings</div><div class='add'>+title: STMicroelectronics STM32 Platforms System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>               - st,stm32-syscfg</div><div class='ctx'>               - st,stm32-power-config</div><div class='ctx'>               - st,stm32-tamp</div><div class='add'>+              - st,stm32f4-gcan</div><div class='ctx'>           - const: syscon</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: st,stm32-tamp</div><div class='hunk'>@@ -42,6 +43,7 @@ if:</div><div class='ctx'>       contains:</div><div class='ctx'>         enum:</div><div class='ctx'>           - st,stm32mp157-syscfg</div><div class='add'>+          - st,stm32f4-gcan</div><div class='ctx'> then:</div><div class='ctx'>   required:</div><div class='ctx'>     - clocks</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml<br/>index fa0a1b84122e..13e34241145b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/stm32/stm32.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/stm32/stm32.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/stm32/stm32.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/stm32/stm32.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/stm32/stm32.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Platforms Device Tree Bindings</div><div class='add'>+title: STMicroelectronics STM32 Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt;</div><div class='hunk'>@@ -14,21 +14,6 @@ properties:</div><div class='ctx'>     const: "/"</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - description: DH STM32MP1 SoM based Boards</div><div class='del'>-        items:</div><div class='del'>-          - enum:</div><div class='del'>-              - arrow,stm32mp157a-avenger96 # Avenger96</div><div class='del'>-              - dh,stm32mp153c-dhcom-drc02</div><div class='del'>-              - dh,stm32mp157c-dhcom-pdk2</div><div class='del'>-              - dh,stm32mp157c-dhcom-picoitx</div><div class='del'>-          - enum:</div><div class='del'>-              - dh,stm32mp153c-dhcom-som</div><div class='del'>-              - dh,stm32mp157a-dhcor-som</div><div class='del'>-              - dh,stm32mp157c-dhcom-som</div><div class='del'>-          - enum:</div><div class='del'>-              - st,stm32mp153</div><div class='del'>-              - st,stm32mp157</div><div class='del'>-</div><div class='ctx'>       - description: emtrion STM32MP1 Argon based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - const: emtrion,stm32mp157c-emsbc-argon</div><div class='hunk'>@@ -65,6 +50,33 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - st,stm32mp135f-dk</div><div class='ctx'>           - const: st,stm32mp135</div><div class='add'>+</div><div class='add'>+      - description: ST STM32MP151 based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - prt,prtt1a   # Protonic PRTT1A</div><div class='add'>+              - prt,prtt1c   # Protonic PRTT1C</div><div class='add'>+              - prt,prtt1s   # Protonic PRTT1S</div><div class='add'>+          - const: st,stm32mp151</div><div class='add'>+</div><div class='add'>+      - description: DH STM32MP151 DHCOR SoM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - const: dh,stm32mp151a-dhcor-testbench</div><div class='add'>+          - const: dh,stm32mp151a-dhcor-som</div><div class='add'>+          - const: st,stm32mp151</div><div class='add'>+</div><div class='add'>+      - description: DH STM32MP153 DHCOM SoM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - const: dh,stm32mp153c-dhcom-drc02</div><div class='add'>+          - const: dh,stm32mp153c-dhcom-som</div><div class='add'>+          - const: st,stm32mp153</div><div class='add'>+</div><div class='add'>+      - description: DH STM32MP153 DHCOR SoM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - const: dh,stm32mp153c-dhcor-drc-compact</div><div class='add'>+          - const: dh,stm32mp153c-dhcor-som</div><div class='add'>+          - const: st,stm32mp153</div><div class='add'>+</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - shiratech,stm32mp157a-iot-box # IoT Box</div><div class='hunk'>@@ -72,12 +84,44 @@ properties:</div><div class='ctx'>               - st,stm32mp157c-ed1</div><div class='ctx'>               - st,stm32mp157a-dk1</div><div class='ctx'>               - st,stm32mp157c-dk2</div><div class='add'>+          - const: st,stm32mp157</div><div class='ctx'> </div><div class='add'>+      - items:</div><div class='add'>+          - const: st,stm32mp157a-dk1-scmi</div><div class='add'>+          - const: st,stm32mp157a-dk1</div><div class='add'>+          - const: st,stm32mp157</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,stm32mp157c-dk2-scmi</div><div class='add'>+          - const: st,stm32mp157c-dk2</div><div class='add'>+          - const: st,stm32mp157</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,stm32mp157c-ed1-scmi</div><div class='add'>+          - const: st,stm32mp157c-ed1</div><div class='ctx'>           - const: st,stm32mp157</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: st,stm32mp157c-ev1</div><div class='ctx'>           - const: st,stm32mp157c-ed1</div><div class='ctx'>           - const: st,stm32mp157</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,stm32mp157c-ev1-scmi</div><div class='add'>+          - const: st,stm32mp157c-ev1</div><div class='add'>+          - const: st,stm32mp157c-ed1</div><div class='add'>+          - const: st,stm32mp157</div><div class='add'>+</div><div class='add'>+      - description: DH STM32MP1 SoM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - arrow,stm32mp157a-avenger96 # Avenger96</div><div class='add'>+          - const: dh,stm32mp157a-dhcor-som</div><div class='add'>+          - const: st,stm32mp157</div><div class='add'>+</div><div class='add'>+      - description: DH STM32MP1 SoM based Boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - dh,stm32mp157c-dhcom-pdk2</div><div class='add'>+              - dh,stm32mp157c-dhcom-picoitx</div><div class='add'>+          - const: dh,stm32mp157c-dhcom-som</div><div class='add'>+          - const: st,stm32mp157</div><div class='ctx'> </div><div class='ctx'>       - description: Engicam i.Core STM32MP1 SoM based Boards</div><div class='ctx'>         items:</div><div class='hunk'>@@ -103,6 +147,7 @@ properties:</div><div class='ctx'>           - const: oct,stm32mp15xx-osd32</div><div class='ctx'>           - enum:</div><div class='ctx'>               - st,stm32mp157</div><div class='add'>+</div><div class='ctx'>       - description: Odyssey STM32MP1 SoM based Boards</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml b/Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml<br/>new file mode 100644<br/>index 000000000000..def7d0cfeb31<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sunplus,sp7021.yaml</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/sunplus,sp7021.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SP7021 Boards</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - qinjian &lt;qinjian@cqplus1.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  ARM platforms using Sunplus SP7021, an ARM Cortex A7 (4-cores) based SoC.</div><div class='add'>+  Wiki: https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - sunplus,sp7021-achip</div><div class='add'>+          - sunplus,sp7021-demo-v3</div><div class='add'>+      - const: sunplus,sp7021</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml<br/>index 086c68771d2b..013821f4a7b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sunxi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/sunxi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner platforms device tree bindings</div><div class='add'>+title: Allwinner platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -366,6 +366,12 @@ properties:</div><div class='ctx'>           - const: lamobo,lamobo-r1</div><div class='ctx'>           - const: allwinner,sun7i-a20</div><div class='ctx'> </div><div class='add'>+      - description: Lctech Pi F1C200s</div><div class='add'>+        items:</div><div class='add'>+          - const: lctech,pi-f1c200s</div><div class='add'>+          - const: allwinner,suniv-f1c200s</div><div class='add'>+          - const: allwinner,suniv-f1c100s</div><div class='add'>+</div><div class='ctx'>       - description: Libre Computer Board ALL-H3-CC H2+</div><div class='ctx'>         items:</div><div class='ctx'>           - const: libretech,all-h3-cc-h2-plus</div><div class='hunk'>@@ -391,6 +397,11 @@ properties:</div><div class='ctx'>           - const: libretech,all-h5-cc-h5</div><div class='ctx'>           - const: allwinner,sun50i-h5</div><div class='ctx'> </div><div class='add'>+      - description: Lichee Pi Nano</div><div class='add'>+        items:</div><div class='add'>+          - const: licheepi,licheepi-nano</div><div class='add'>+          - const: allwinner,suniv-f1c100s</div><div class='add'>+</div><div class='ctx'>       - description: Lichee Pi One</div><div class='ctx'>         items:</div><div class='ctx'>           - const: licheepi,licheepi-one</div><div class='hunk'>@@ -802,6 +813,13 @@ properties:</div><div class='ctx'>           - const: sinlinx,sina33</div><div class='ctx'>           - const: allwinner,sun8i-a33</div><div class='ctx'> </div><div class='add'>+      - description: SourceParts PopStick v1.1</div><div class='add'>+        items:</div><div class='add'>+          - const: sourceparts,popstick-v1.1</div><div class='add'>+          - const: sourceparts,popstick</div><div class='add'>+          - const: allwinner,suniv-f1c200s</div><div class='add'>+          - const: allwinner,suniv-f1c100s</div><div class='add'>+</div><div class='ctx'>       - description: SL631 Action Camera with IMX179</div><div class='ctx'>         items:</div><div class='ctx'>           - const: allwinner,sl631-imx179</div><div class='hunk'>@@ -838,6 +856,11 @@ properties:</div><div class='ctx'>           - const: wexler,tab7200</div><div class='ctx'>           - const: allwinner,sun7i-a20</div><div class='ctx'> </div><div class='add'>+      - description: MangoPi MQ-R board</div><div class='add'>+        items:</div><div class='add'>+          - const: widora,mangopi-mq-r-t113</div><div class='add'>+          - const: allwinner,sun8i-t113s</div><div class='add'>+</div><div class='ctx'>       - description: WITS A31 Colombus Evaluation Board</div><div class='ctx'>         items:</div><div class='ctx'>           - const: wits,colombus</div><div class='hunk'>@@ -858,6 +881,11 @@ properties:</div><div class='ctx'>           - const: yones-toptech,bs1078-v2</div><div class='ctx'>           - const: allwinner,sun6i-a31s</div><div class='ctx'> </div><div class='add'>+      - description: X96 Mate TV box</div><div class='add'>+        items:</div><div class='add'>+          - const: hechuang,x96-mate</div><div class='add'>+          - const: allwinner,sun50i-h616</div><div class='add'>+</div><div class='ctx'>       - description: Xunlong OrangePi</div><div class='ctx'>         items:</div><div class='ctx'>           - const: xunlong,orangepi</div><div class='hunk'>@@ -958,4 +986,9 @@ properties:</div><div class='ctx'>           - const: xunlong,orangepi-zero-plus2-h3</div><div class='ctx'>           - const: allwinner,sun8i-h3</div><div class='ctx'> </div><div class='add'>+      - description: Xunlong OrangePi Zero 2</div><div class='add'>+        items:</div><div class='add'>+          - const: xunlong,orangepi-zero2</div><div class='add'>+          - const: allwinner,sun50i-h616</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml<br/>index 8eee312c2e6f..99566688d033 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun4i-a10-mbus.yaml</a></div><div class='hunk'>@@ -29,10 +29,20 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - allwinner,sun5i-a13-mbus</div><div class='add'>+      - allwinner,sun8i-a33-mbus</div><div class='add'>+      - allwinner,sun8i-a50-mbus</div><div class='add'>+      - allwinner,sun8i-a83t-mbus</div><div class='ctx'>       - allwinner,sun8i-h3-mbus</div><div class='ctx'>       - allwinner,sun8i-r40-mbus</div><div class='add'>+      - allwinner,sun8i-v3s-mbus</div><div class='add'>+      - allwinner,sun8i-v536-mbus</div><div class='add'>+      - allwinner,sun20i-d1-mbus</div><div class='ctx'>       - allwinner,sun50i-a64-mbus</div><div class='add'>+      - allwinner,sun50i-a100-mbus</div><div class='ctx'>       - allwinner,sun50i-h5-mbus</div><div class='add'>+      - allwinner,sun50i-h6-mbus</div><div class='add'>+      - allwinner,sun50i-h616-mbus</div><div class='add'>+      - allwinner,sun50i-r329-mbus</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -81,13 +91,13 @@ required:</div><div class='ctx'>   - dma-ranges</div><div class='ctx'> </div><div class='ctx'> if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - allwinner,sun8i-h3-mbus</div><div class='del'>-          - allwinner,sun50i-a64-mbus</div><div class='del'>-          - allwinner,sun50i-h5-mbus</div><div class='add'>+  not:</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          enum:</div><div class='add'>+            - allwinner,sun5i-a13-mbus</div><div class='add'>+            - allwinner,sun8i-r40-mbus</div><div class='ctx'> </div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml<br/>index f3878e0b3cc4..d805c4508b4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun6i-a31-cpuconfig.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner CPU Configuration Controller Device Tree Bindings</div><div class='add'>+title: Allwinner CPU Configuration Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml b/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml<br/>index 668aadbfe4c0..644f391afb32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/sunxi/allwinner,sun9i-a80-prcm.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/sunxi/allwinner,sun9i-a80-prcm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 PRCM Device Tree Bindings</div><div class='add'>+title: Allwinner A80 PRCM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/swir.txt b/Documentation/devicetree/bindings/arm/swir.txt<br/>deleted file mode 100644<br/>index 042be73a95d3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/swir.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/swir.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-Sierra Wireless Modules device tree bindings</div><div class='del'>---------------------------------------------</div><div class='del'>-</div><div class='del'>-Supported Modules :</div><div class='del'>- - WP8548 : Includes MDM9615 and PM8018 in a module</div><div class='del'>-</div><div class='del'>-Sierra Wireless modules shall have the following properties :</div><div class='del'>-  Required root node property</div><div class='del'>-   - compatible: "swir,wp8548" for the WP8548 CF3 Module</div><div class='del'>-</div><div class='del'>-Board compatible values:</div><div class='del'>-  - "swir,mangoh-green-wp8548" for the mangOH green board with the WP8548 module</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/syna.txt b/Documentation/devicetree/bindings/arm/syna.txt<br/>index d8b48f2edf1b..851f48ead927 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/syna.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/syna.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/syna.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/syna.txt</a></div><div class='hunk'>@@ -18,10 +18,6 @@ stable binding/ABI.</div><div class='ctx'> </div><div class='ctx'> ---------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-Boards with the Synaptics AS370 SoC shall have the following properties:</div><div class='del'>-  Required root node property:</div><div class='del'>-    compatible: "syna,as370"</div><div class='del'>-</div><div class='ctx'> Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500</div><div class='ctx'> shall have the following properties:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml<br/>index 49841ca272ee..0df41f5b7e2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/tegra.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/tegra.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NVIDIA Tegra device tree bindings</div><div class='add'>+title: NVIDIA Tegra</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='hunk'>@@ -167,5 +167,14 @@ properties:</div><div class='ctx'>           - const: nvidia,p3737-0000+p3701-0000</div><div class='ctx'>           - const: nvidia,p3701-0000</div><div class='ctx'>           - const: nvidia,tegra234</div><div class='add'>+      - description: Jetson Orin NX</div><div class='add'>+        items:</div><div class='add'>+          - const: nvidia,p3767-0000</div><div class='add'>+          - const: nvidia,tegra234</div><div class='add'>+      - description: Jetson Orin NX Engineering Reference Developer Kit</div><div class='add'>+        items:</div><div class='add'>+          - const: nvidia,p3768-0000+p3767-0000</div><div class='add'>+          - const: nvidia,p3767-0000</div><div class='add'>+          - const: nvidia,tegra234</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml<br/>new file mode 100644<br/>index 000000000000..36dbd0838f2d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra-ccplex-cluster.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra CPU COMPLEX CLUSTER area</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sumit Gupta &lt;sumitg@nvidia.com&gt;</div><div class='add'>+  - Mikko Perttunen &lt;mperttunen@nvidia.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The Tegra CPU COMPLEX CLUSTER area contains memory-mapped</div><div class='add'>+  registers that initiate CPU frequency/voltage transitions.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "ccplex@([0-9a-f]+)$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra186-ccplex-cluster</div><div class='add'>+      - nvidia,tegra234-ccplex-cluster</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,bpmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the BPMP node that needs to be queried to get</div><div class='add'>+      operating point data for all CPUs.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - nvidia,bpmp</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ccplex@e000000 {</div><div class='add'>+      compatible = "nvidia,tegra234-ccplex-cluster";</div><div class='add'>+      reg = &lt;0x0e000000 0x5ffff&gt;;</div><div class='add'>+      nvidia,bpmp = &lt;&amp;bpmp&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml<br/>new file mode 100644<br/>index 000000000000..5e0f1dc542b0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-axi2apb.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-axi2apb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra194 AXI2APB bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sumit Gupta &lt;sumitg@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^axi2apb@([0-9a-f]+)$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-axi2apb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 6</div><div class='add'>+    description: Physical base address and length of registers for all bridges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    axi2apb: axi2apb@2390000 {</div><div class='add'>+      compatible = "nvidia,tegra194-axi2apb";</div><div class='add'>+      reg = &lt;0x02390000 0x1000&gt;,</div><div class='add'>+            &lt;0x023a0000 0x1000&gt;,</div><div class='add'>+            &lt;0x023b0000 0x1000&gt;,</div><div class='add'>+            &lt;0x023c0000 0x1000&gt;,</div><div class='add'>+            &lt;0x023d0000 0x1000&gt;,</div><div class='add'>+            &lt;0x023e0000 0x1000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml<br/>new file mode 100644<br/>index 000000000000..d9c54c32c6b9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra194-cbb.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra194 CBB 1.0</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sumit Gupta &lt;sumitg@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The Control Backbone (CBB) is comprised of the physical path from an</div><div class='add'>+  initiator to a target's register configuration space. CBB 1.0 has</div><div class='add'>+  multiple hierarchical sub-NOCs (Network-on-Chip) and connects various</div><div class='add'>+  initiators and targets using different bridges like AXIP2P, AXI2APB.</div><div class='add'>+</div><div class='add'>+  This driver handles errors due to illegal register accesses reported</div><div class='add'>+  by the NOCs inside the CBB. NOCs reporting errors are cluster NOCs</div><div class='add'>+  "AON-NOC, SCE-NOC, RCE-NOC, BPMP-NOC, CV-NOC" and "CBB Central NOC"</div><div class='add'>+  which is the main NOC.</div><div class='add'>+</div><div class='add'>+  By default, the access issuing initiator is informed about the error</div><div class='add'>+  using SError or Data Abort exception unless the ERD (Error Response</div><div class='add'>+  Disable) is enabled/set for that initiator. If the ERD is enabled, then</div><div class='add'>+  SError or Data Abort is masked and the error is reported with interrupt.</div><div class='add'>+</div><div class='add'>+  - For CCPLEX (CPU Complex) initiator, the driver sets ERD bit. So, the</div><div class='add'>+    errors due to illegal accesses from CCPLEX are reported by interrupts.</div><div class='add'>+    If ERD is not set, then error is reported by SError.</div><div class='add'>+  - For other initiators, the ERD is disabled. So, the access issuing</div><div class='add'>+    initiator is informed about the illegal access by Data Abort exception.</div><div class='add'>+    In addition, an interrupt is also generated to CCPLEX. These initiators</div><div class='add'>+    include all engines using Cortex-R5 (which is ARMv7 CPU cluster) and</div><div class='add'>+    engines like TSEC (Security co-processor), NVDEC (NVIDIA Video Decoder</div><div class='add'>+    engine) etc which can initiate transactions.</div><div class='add'>+</div><div class='add'>+  The driver prints relevant debug information like Error Code, Error</div><div class='add'>+  Description, Master, Address, AXI ID, Cache, Protection, Security Group</div><div class='add'>+  etc on receiving error notification.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^[a-z]+-noc@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-cbb-noc</div><div class='add'>+      - nvidia,tegra194-aon-noc</div><div class='add'>+      - nvidia,tegra194-bpmp-noc</div><div class='add'>+      - nvidia,tegra194-rce-noc</div><div class='add'>+      - nvidia,tegra194-sce-noc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      CCPLEX receives secure or nonsecure interrupt depending on error type.</div><div class='add'>+      A secure interrupt is received for SEC(firewall) &amp; SLV errors and a</div><div class='add'>+      non-secure interrupt is received for TMO &amp; DEC errors.</div><div class='add'>+    items:</div><div class='add'>+      - description: non-secure interrupt</div><div class='add'>+      - description: secure interrupt</div><div class='add'>+</div><div class='add'>+  nvidia,axi2apb:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Specifies the node having all axi2apb bridges which need to be checked</div><div class='add'>+      for any error logged in their status register.</div><div class='add'>+</div><div class='add'>+  nvidia,apbmisc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Specifies the apbmisc node which need to be used for reading the ERD</div><div class='add'>+      register.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - nvidia,apbmisc</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    cbb-noc@2300000 {</div><div class='add'>+        compatible = "nvidia,tegra194-cbb-noc";</div><div class='add'>+        reg = &lt;0x02300000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        nvidia,axi2apb = &lt;&amp;axi2apb&gt;;</div><div class='add'>+        nvidia,apbmisc = &lt;&amp;apbmisc&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml<br/>index 0afec83cc723..89191cfdf619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml</a></div><div class='hunk'>@@ -14,7 +14,6 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - nvidia,tegra20-pmc</div><div class='del'>-      - nvidia,tegra20-pmc</div><div class='ctx'>       - nvidia,tegra30-pmc</div><div class='ctx'>       - nvidia,tegra114-pmc</div><div class='ctx'>       - nvidia,tegra124-pmc</div><div class='hunk'>@@ -124,6 +123,33 @@ properties:</div><div class='ctx'>       some PLLs, clocks and then brings up CPU0 for resuming the</div><div class='ctx'>       system.</div><div class='ctx'> </div><div class='add'>+  core-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to voltage regulator connected to the SoC Core power rail.</div><div class='add'>+</div><div class='add'>+  core-domain:</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      The vast majority of hardware blocks of Tegra SoC belong to a</div><div class='add'>+      Core power domain, which has a dedicated voltage rail that powers</div><div class='add'>+      the blocks.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      operating-points-v2:</div><div class='add'>+        description:</div><div class='add'>+          Should contain level, voltages and opp-supported-hw property.</div><div class='add'>+          The supported-hw is a bitfield indicating SoC speedo or process</div><div class='add'>+          ID mask.</div><div class='add'>+</div><div class='add'>+      "#power-domain-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - operating-points-v2</div><div class='add'>+      - "#power-domain-cells"</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'>   i2c-thermtrip:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='hunk'>@@ -208,8 +234,9 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^[a-z0-9]+$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='del'>-        patternProperties:</div><div class='add'>+        properties:</div><div class='ctx'>           clocks:</div><div class='ctx'>             minItems: 1</div><div class='ctx'>             maxItems: 8</div><div class='hunk'>@@ -226,6 +253,9 @@ properties:</div><div class='ctx'>               for controlling a power-gate.</div><div class='ctx'>               See ../reset/reset.txt for more details.</div><div class='ctx'> </div><div class='add'>+          power-domains:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='ctx'>           '#power-domain-cells':</div><div class='ctx'>             const: 0</div><div class='ctx'>             description: Must be 0.</div><div class='hunk'>@@ -301,33 +331,6 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  core-domain:</div><div class='del'>-    type: object</div><div class='del'>-    description: |</div><div class='del'>-      The vast majority of hardware blocks of Tegra SoC belong to a</div><div class='del'>-      Core power domain, which has a dedicated voltage rail that powers</div><div class='del'>-      the blocks.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      operating-points-v2:</div><div class='del'>-        description:</div><div class='del'>-          Should contain level, voltages and opp-supported-hw property.</div><div class='del'>-          The supported-hw is a bitfield indicating SoC speedo or process</div><div class='del'>-          ID mask.</div><div class='del'>-</div><div class='del'>-      "#power-domain-cells":</div><div class='del'>-        const: 0</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - operating-points-v2</div><div class='del'>-      - "#power-domain-cells"</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-  core-supply:</div><div class='del'>-    description:</div><div class='del'>-      Phandle to voltage regulator connected to the SoC Core power rail.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml<br/>new file mode 100644<br/>index 000000000000..fcdf03131323<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/tegra/nvidia,tegra234-cbb.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra CBB 2.0</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sumit Gupta &lt;sumitg@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The Control Backbone (CBB) is comprised of the physical path from an</div><div class='add'>+  initiator to a target's register configuration space. CBB 2.0 consists</div><div class='add'>+  of multiple sub-blocks connected to each other to create a topology.</div><div class='add'>+  The Tegra234 SoC has different fabrics based on CBB 2.0 architecture</div><div class='add'>+  which include cluster fabrics BPMP, AON, PSC, SCE, RCE, DCE, FSI and</div><div class='add'>+  "CBB central fabric".</div><div class='add'>+</div><div class='add'>+  In CBB 2.0, each initiator which can issue transactions connects to a</div><div class='add'>+  Root Master Node (MN) before it connects to any other element of the</div><div class='add'>+  fabric. Each Root MN contains a Error Monitor (EM) which detects and</div><div class='add'>+  logs error. Interrupts from various EM blocks are collated by Error</div><div class='add'>+  Notifier (EN) which is per fabric and presents a single interrupt from</div><div class='add'>+  fabric to the SoC interrupt controller.</div><div class='add'>+</div><div class='add'>+  The driver handles errors from CBB due to illegal register accesses</div><div class='add'>+  and prints debug information about failed transaction on receiving</div><div class='add'>+  the interrupt from EN. Debug information includes Error Code, Error</div><div class='add'>+  Description, MasterID, Fabric, SlaveID, Address, Cache, Protection,</div><div class='add'>+  Security Group etc on receiving error notification.</div><div class='add'>+</div><div class='add'>+  If the Error Response Disable (ERD) is set/enabled for an initiator,</div><div class='add'>+  then SError or Data abort exception error response is masked and an</div><div class='add'>+  interrupt is used for reporting errors due to illegal accesses from</div><div class='add'>+  that initiator. The value returned on read failures is '0xFFFFFFFF'</div><div class='add'>+  for compatibility with PCIE.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^[a-z]+-fabric@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra234-aon-fabric</div><div class='add'>+      - nvidia,tegra234-bpmp-fabric</div><div class='add'>+      - nvidia,tegra234-cbb-fabric</div><div class='add'>+      - nvidia,tegra234-dce-fabric</div><div class='add'>+      - nvidia,tegra234-rce-fabric</div><div class='add'>+      - nvidia,tegra234-sce-fabric</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: secure interrupt from error notifier</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    cbb-fabric@1300000 {</div><div class='add'>+      compatible = "nvidia,tegra234-cbb-fabric";</div><div class='add'>+      reg = &lt;0x13a00000 0x400000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/tesla.yaml b/Documentation/devicetree/bindings/arm/tesla.yaml<br/>index 09856da657dc..d670a0d56222 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tesla.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/tesla.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/tesla.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/tesla.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/tesla.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tesla Full Self Driving(FSD) platforms device tree bindings</div><div class='add'>+title: Tesla Full Self Driving(FSD) platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alim Akhtar &lt;alim.akhtar@samsung.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml<br/>index 61c6ab4f52e2..e1183f90bb06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/ti/k3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/ti/k3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/ti/k3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/ti/k3.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/ti/k3.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments K3 Multicore SoC architecture device tree bindings</div><div class='add'>+title: Texas Instruments K3 Multicore SoC architecture</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nishanth Menon &lt;nm@ti.com&gt;</div><div class='hunk'>@@ -19,37 +19,18 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'> </div><div class='del'>-      - description: K3 AM654 SoC</div><div class='add'>+      - description: K3 AM62A7 SoC</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - ti,am654-evm</div><div class='del'>-              - siemens,iot2050-basic</div><div class='del'>-              - siemens,iot2050-basic-pg2</div><div class='del'>-              - siemens,iot2050-advanced</div><div class='del'>-              - siemens,iot2050-advanced-pg2</div><div class='del'>-          - const: ti,am654</div><div class='del'>-</div><div class='del'>-      - description: K3 J721E SoC</div><div class='del'>-        oneOf:</div><div class='del'>-          - const: ti,j721e</div><div class='del'>-          - items:</div><div class='del'>-              - enum:</div><div class='del'>-                  - ti,j721e-evm</div><div class='del'>-                  - ti,j721e-sk</div><div class='del'>-              - const: ti,j721e</div><div class='del'>-</div><div class='del'>-      - description: K3 J7200 SoC</div><div class='del'>-        oneOf:</div><div class='del'>-          - const: ti,j7200</div><div class='del'>-          - items:</div><div class='del'>-              - enum:</div><div class='del'>-                  - ti,j7200-evm</div><div class='del'>-              - const: ti,j7200</div><div class='add'>+              - ti,am62a7-sk</div><div class='add'>+          - const: ti,am62a7</div><div class='ctx'> </div><div class='ctx'>       - description: K3 AM625 SoC</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - beagle,am625-beagleplay</div><div class='ctx'>               - ti,am625-sk</div><div class='add'>+              - ti,am62-lp-sk</div><div class='ctx'>           - const: ti,am625</div><div class='ctx'> </div><div class='ctx'>       - description: K3 AM642 SoC</div><div class='hunk'>@@ -59,12 +40,55 @@ properties:</div><div class='ctx'>               - ti,am642-sk</div><div class='ctx'>           - const: ti,am642</div><div class='ctx'> </div><div class='add'>+      - description: K3 AM642 SoC PHYTEC phyBOARD-Electra</div><div class='add'>+        items:</div><div class='add'>+          - const: phytec,am642-phyboard-electra-rdk</div><div class='add'>+          - const: phytec,am64-phycore-som</div><div class='add'>+          - const: ti,am642</div><div class='add'>+</div><div class='add'>+      - description: K3 AM654 SoC</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - siemens,iot2050-advanced</div><div class='add'>+              - siemens,iot2050-advanced-m2</div><div class='add'>+              - siemens,iot2050-advanced-pg2</div><div class='add'>+              - siemens,iot2050-basic</div><div class='add'>+              - siemens,iot2050-basic-pg2</div><div class='add'>+              - ti,am654-evm</div><div class='add'>+          - const: ti,am654</div><div class='add'>+</div><div class='add'>+      - description: K3 J7200 SoC</div><div class='add'>+        oneOf:</div><div class='add'>+          - const: ti,j7200</div><div class='add'>+          - items:</div><div class='add'>+              - enum:</div><div class='add'>+                  - ti,j7200-evm</div><div class='add'>+              - const: ti,j7200</div><div class='add'>+</div><div class='add'>+      - description: K3 J721E SoC</div><div class='add'>+        oneOf:</div><div class='add'>+          - const: ti,j721e</div><div class='add'>+          - items:</div><div class='add'>+              - enum:</div><div class='add'>+                  - beagle,j721e-beagleboneai64</div><div class='add'>+                  - ti,j721e-evm</div><div class='add'>+                  - ti,j721e-sk</div><div class='add'>+              - const: ti,j721e</div><div class='add'>+</div><div class='ctx'>       - description: K3 J721s2 SoC</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - ti,am68-sk</div><div class='ctx'>               - ti,j721s2-evm</div><div class='ctx'>           - const: ti,j721s2</div><div class='ctx'> </div><div class='add'>+      - description: K3 J784s4 SoC</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,am69-sk</div><div class='add'>+              - ti,j784s4-evm</div><div class='add'>+          - const: ti,j784s4</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml b/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml<br/>index c022d325fc08..1656d1a4476f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/ti/ti,davinci.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/ti/ti,davinci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments DaVinci Platforms Device Tree Bindings</div><div class='add'>+title: Texas Instruments DaVinci Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sekhar Nori &lt;nsekhar@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/toshiba.yaml b/Documentation/devicetree/bindings/arm/toshiba.yaml<br/>index 9c1cacbdc916..716ba4a3cab4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/toshiba.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/toshiba.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/toshiba.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/toshiba.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/toshiba.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Toshiba Visconti Platform Device Tree Bindings</div><div class='add'>+title: Toshiba Visconti Platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nobuhiro Iwamatsu &lt;nobuhiro1.iwamatsu@toshiba.co.jp&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/ux500.yaml b/Documentation/devicetree/bindings/arm/ux500.yaml<br/>index a46193ad94e0..b42d20fa4359 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/ux500.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/ux500.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/ux500.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/ux500.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/ux500.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ux500 platforms device tree bindings</div><div class='add'>+title: Ux500 platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='hunk'>@@ -40,6 +40,11 @@ properties:</div><div class='ctx'>           - const: samsung,codina</div><div class='ctx'>           - const: st-ericsson,u8500</div><div class='ctx'> </div><div class='add'>+      - description: Samsung Galaxy Exhibit (SGH-T599)</div><div class='add'>+        items:</div><div class='add'>+          - const: samsung,codina-tmo</div><div class='add'>+          - const: st-ericsson,u8500</div><div class='add'>+</div><div class='ctx'>       - description: Samsung Galaxy Beam (GT-I8530)</div><div class='ctx'>         items:</div><div class='ctx'>           - const: samsung,gavini</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/versatile-sysreg.txt b/Documentation/devicetree/bindings/arm/versatile-sysreg.txt<br/>deleted file mode 100644<br/>index a4f15262d717..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/versatile-sysreg.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/versatile-sysreg.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-ARM Versatile system registers</div><div class='del'>---------------------------------------</div><div class='del'>-</div><div class='del'>-This is a system control registers block, providing multiple low level</div><div class='del'>-platform functions like board detection and identification, software</div><div class='del'>-interrupt generation, MMC and NOR Flash control etc.</div><div class='del'>-</div><div class='del'>-Required node properties:</div><div class='del'>-- compatible value : = "arm,versatile-sysreg", "syscon"</div><div class='del'>-- reg : physical base address and the size of the registers window</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/vexpress-config.yaml b/Documentation/devicetree/bindings/arm/vexpress-config.yaml<br/>new file mode 100644<br/>index 000000000000..b74380da3198<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/vexpress-config.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/vexpress-config.yaml</a></div><div class='hunk'>@@ -0,0 +1,285 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/vexpress-config.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Versatile Express configuration bus</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is a system control register block, acting as a bridge to the</div><div class='add'>+  platform's configuration bus via "system control" interface, addressing</div><div class='add'>+  devices with site number, position in the board stack, config controller,</div><div class='add'>+  function and device numbers - see motherboard's TRM for more details.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,vexpress,config-bus</div><div class='add'>+</div><div class='add'>+  arm,vexpress,config-bridge:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the sysreg node.</div><div class='add'>+</div><div class='add'>+  muxfpga:</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-muxfpga</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: FPGA specifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 7</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  shutdown:</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-shutdown</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: shutdown identifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 8</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  reboot:</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-reboot</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: reboot identifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 9</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  dvimode:</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-dvimode</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: DVI mode identifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 11</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - arm,vexpress,config-bridge</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  'clk[0-9]*$':</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      clocks</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-osc</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: clock specifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 1</div><div class='add'>+          - description: clock number</div><div class='add'>+</div><div class='add'>+      freq-range:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - description: minimal clock frequency</div><div class='add'>+          - description: maximum clock frequency</div><div class='add'>+</div><div class='add'>+      "#clock-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      clock-output-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+      - "#clock-cells"</div><div class='add'>+</div><div class='add'>+  "^volt-.+$":</div><div class='add'>+    $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-volt</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: regulator specifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 2</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  "^amp-.+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-amp</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: current sensor identifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 3</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  "^temp-.+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-temp</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: temperature sensor identifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 4</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  "^reset[0-9]*$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-reset</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: reset specifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 5</div><div class='add'>+          - description: reset device number</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  "^power-.+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-power</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: power sensor identifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        items:</div><div class='add'>+          - const: 12</div><div class='add'>+          - description: device number</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+  "^energy(-.+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: arm,vexpress-energy</div><div class='add'>+</div><div class='add'>+      arm,vexpress-sysreg,func:</div><div class='add'>+        description: energy sensor identifier</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        oneOf:</div><div class='add'>+          - items:</div><div class='add'>+              - const: 13</div><div class='add'>+              - description: device number</div><div class='add'>+          - items:</div><div class='add'>+              - const: 13</div><div class='add'>+              - description: device number</div><div class='add'>+              - const: 13</div><div class='add'>+              - description: second device number</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - arm,vexpress-sysreg,func</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mcc {</div><div class='add'>+        compatible = "arm,vexpress,config-bus";</div><div class='add'>+        arm,vexpress,config-bridge = &lt;&amp;v2m_sysreg&gt;;</div><div class='add'>+</div><div class='add'>+        clk0 {</div><div class='add'>+            compatible = "arm,vexpress-osc";</div><div class='add'>+            arm,vexpress-sysreg,func = &lt;1 0&gt;;</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        energy {</div><div class='add'>+            compatible = "arm,vexpress-energy";</div><div class='add'>+            arm,vexpress-sysreg,func = &lt;13 0&gt;, &lt;13 1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt b/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt<br/>deleted file mode 100644<br/>index 50095802fb4a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/vexpress-sysreg.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,103 +0,0 @@</div><div class='del'>-ARM Versatile Express system registers</div><div class='del'>---------------------------------------</div><div class='del'>-</div><div class='del'>-This is a system control registers block, providing multiple low level</div><div class='del'>-platform functions like board detection and identification, software</div><div class='del'>-interrupt generation, MMC and NOR Flash control etc.</div><div class='del'>-</div><div class='del'>-Required node properties:</div><div class='del'>-- compatible value : = "arm,vexpress,sysreg";</div><div class='del'>-- reg : physical base address and the size of the registers window</div><div class='del'>-</div><div class='del'>-Deprecated properties, replaced by GPIO subnodes (see below):</div><div class='del'>-- gpio-controller : specifies that the node is a GPIO controller</div><div class='del'>-- #gpio-cells : size of the GPIO specifier, should be 2:</div><div class='del'>-  - first cell is the pseudo-GPIO line number:</div><div class='del'>-    0 - MMC CARDIN</div><div class='del'>-    1 - MMC WPROT</div><div class='del'>-    2 - NOR FLASH WPn</div><div class='del'>-  - second cell can take standard GPIO flags (currently ignored).</div><div class='del'>-</div><div class='del'>-Control registers providing pseudo-GPIO lines must be represented</div><div class='del'>-by subnodes, each of them requiring the following properties:</div><div class='del'>-- compatible value : one of</div><div class='del'>-			"arm,vexpress-sysreg,sys_led"</div><div class='del'>-			"arm,vexpress-sysreg,sys_mci"</div><div class='del'>-			"arm,vexpress-sysreg,sys_flash"</div><div class='del'>-- gpio-controller : makes the node a GPIO controller</div><div class='del'>-- #gpio-cells : size of the GPIO specifier, must be 2:</div><div class='del'>-  - first cell is the function number:</div><div class='del'>-    - for sys_led : 0..7 = LED 0..7</div><div class='del'>-    - for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT</div><div class='del'>-    - for sys_flash : 0 = NOR FLASH WPn</div><div class='del'>-  - second cell can take standard GPIO flags (currently ignored).</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	v2m_sysreg: sysreg@10000000 {</div><div class='del'>- 		compatible = "arm,vexpress-sysreg";</div><div class='del'>- 		reg = &lt;0x10000000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		v2m_led_gpios: sys_led@8 {</div><div class='del'>-			compatible = "arm,vexpress-sysreg,sys_led";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		v2m_mmc_gpios: sys_mci@48 {</div><div class='del'>-			compatible = "arm,vexpress-sysreg,sys_mci";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		v2m_flash_gpios: sys_flash@4c {</div><div class='del'>-			compatible = "arm,vexpress-sysreg,sys_flash";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>- 	};</div><div class='del'>-</div><div class='del'>-This block also can also act a bridge to the platform's configuration</div><div class='del'>-bus via "system control" interface, addressing devices with site number,</div><div class='del'>-position in the board stack, config controller, function and device</div><div class='del'>-numbers - see motherboard's TRM for more details. All configuration</div><div class='del'>-controller accessible via this interface must reference the sysreg</div><div class='del'>-node via "arm,vexpress,config-bridge" phandle and define appropriate</div><div class='del'>-topology properties - see main vexpress node documentation for more</div><div class='del'>-details. Each child of such node describes one function and must</div><div class='del'>-define the following properties:</div><div class='del'>-- compatible value : must be one of (corresponding to the TRM):</div><div class='del'>-	"arm,vexpress-amp"</div><div class='del'>-	"arm,vexpress-dvimode"</div><div class='del'>-	"arm,vexpress-energy"</div><div class='del'>-	"arm,vexpress-muxfpga"</div><div class='del'>-	"arm,vexpress-osc"</div><div class='del'>-	"arm,vexpress-power"</div><div class='del'>-	"arm,vexpress-reboot"</div><div class='del'>-	"arm,vexpress-reset"</div><div class='del'>-	"arm,vexpress-scc"</div><div class='del'>-	"arm,vexpress-shutdown"</div><div class='del'>-	"arm,vexpress-temp"</div><div class='del'>-	"arm,vexpress-volt"</div><div class='del'>-- arm,vexpress-sysreg,func : must contain a set of two cells long groups:</div><div class='del'>-  - first cell of each group defines the function number</div><div class='del'>-    (eg. 1 for clock generator, 2 for voltage regulators etc.)</div><div class='del'>-  - second cell of each group defines device number (eg. osc 0,</div><div class='del'>-    osc 1 etc.)</div><div class='del'>-  - some functions (eg. energy meter, with its 64 bit long counter)</div><div class='del'>-    are using more than one function/device number pair</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	mcc {</div><div class='del'>-		compatible = "arm,vexpress,config-bus";</div><div class='del'>-		arm,vexpress,config-bridge = &lt;&amp;v2m_sysreg&gt;;</div><div class='del'>-</div><div class='del'>-		osc@0 {</div><div class='del'>-			compatible = "arm,vexpress-osc";</div><div class='del'>-			arm,vexpress-sysreg,func = &lt;1 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		energy@0 {</div><div class='del'>-			compatible = "arm,vexpress-energy";</div><div class='del'>-			arm,vexpress-sysreg,func = &lt;13 0&gt;, &lt;13 1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml<br/>new file mode 100644<br/>index 000000000000..be6e3b542569<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/arm/vexpress-sysreg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Versatile Express system registers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is a system control registers block, providing multiple low level</div><div class='add'>+  platform functions like board detection and identification, software</div><div class='add'>+  interrupt generation, MMC and NOR Flash control, etc.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,vexpress-sysreg</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  gpio-controller:</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    deprecated: true</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^gpio@[0-9a-f]+$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      GPIO children</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - arm,vexpress-sysreg,sys_led</div><div class='add'>+          - arm,vexpress-sysreg,sys_mci</div><div class='add'>+          - arm,vexpress-sysreg,sys_flash</div><div class='add'>+</div><div class='add'>+      gpio-controller: true</div><div class='add'>+</div><div class='add'>+      "#gpio-cells":</div><div class='add'>+        const: 2</div><div class='add'>+        description: |</div><div class='add'>+          The first cell is the function number:</div><div class='add'>+          for sys_led : 0..7 = LED 0..7</div><div class='add'>+          for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT</div><div class='add'>+          for sys_flash : 0 = NOR FLASH WPn</div><div class='add'>+          The second cell can take standard GPIO flags.</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - reg</div><div class='add'>+      - gpio-controller</div><div class='add'>+      - "#gpio-cells"</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sysreg@0 {</div><div class='add'>+        compatible = "arm,vexpress-sysreg";</div><div class='add'>+        reg = &lt;0x00000 0x1000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        v2m_led_gpios: gpio@8 {</div><div class='add'>+            compatible = "arm,vexpress-sysreg,sys_led";</div><div class='add'>+            reg = &lt;0x008 4&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/vt8500.yaml b/Documentation/devicetree/bindings/arm/vt8500.yaml<br/>index 7b762bfc11e7..5d5ad5a60451 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/vt8500.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/vt8500.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/vt8500.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/vt8500.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/vt8500.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: VIA/Wondermedia VT8500 Platforms Device Tree Bindings</div><div class='add'>+title: VIA/Wondermedia VT8500 Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tony Prisk &lt;linux@prisktech.co.nz&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/xilinx.yaml b/Documentation/devicetree/bindings/arm/xilinx.yaml<br/>index 4dc0e0195974..969cfe6dc434 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/xilinx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/xilinx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/xilinx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/arm/xilinx.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/arm/xilinx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx Zynq Platforms Device Tree Bindings</div><div class='add'>+title: Xilinx Zynq Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ahci-ceva.txt b/Documentation/devicetree/bindings/ata/ahci-ceva.txt<br/>deleted file mode 100644<br/>index bfb6da0281ec..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/ahci-ceva.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/ahci-ceva.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,63 +0,0 @@</div><div class='del'>-Binding for CEVA AHCI SATA Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - reg: Physical base address and size of the controller's register area.</div><div class='del'>-  - compatible: Compatibility string. Must be 'ceva,ahci-1v84'.</div><div class='del'>-  - clocks: Input clock specifier. Refer to common clock bindings.</div><div class='del'>-  - interrupts: Interrupt specifier. Refer to interrupt binding.</div><div class='del'>-  - ceva,p0-cominit-params: OOB timing value for COMINIT parameter for port 0.</div><div class='del'>-  - ceva,p1-cominit-params: OOB timing value for COMINIT parameter for port 1.</div><div class='del'>-			The fields for the above parameter must be as shown below:</div><div class='del'>-			ceva,pN-cominit-params = /bits/ 8 &lt;CIBGMN CIBGMX CIBGN CINMP&gt;;</div><div class='del'>-			CINMP : COMINIT Negate Minimum Period.</div><div class='del'>-			CIBGN : COMINIT Burst Gap Nominal.</div><div class='del'>-			CIBGMX: COMINIT Burst Gap Maximum.</div><div class='del'>-			CIBGMN: COMINIT Burst Gap Minimum.</div><div class='del'>-  - ceva,p0-comwake-params: OOB timing value for COMWAKE parameter for port 0.</div><div class='del'>-  - ceva,p1-comwake-params: OOB timing value for COMWAKE parameter for port 1.</div><div class='del'>-			The fields for the above parameter must be as shown below:</div><div class='del'>-			ceva,pN-comwake-params = /bits/ 8 &lt;CWBGMN CWBGMX CWBGN CWNMP&gt;;</div><div class='del'>-			CWBGMN: COMWAKE Burst Gap Minimum.</div><div class='del'>-			CWBGMX: COMWAKE Burst Gap Maximum.</div><div class='del'>-			CWBGN: COMWAKE Burst Gap Nominal.</div><div class='del'>-			CWNMP: COMWAKE Negate Minimum Period.</div><div class='del'>-  - ceva,p0-burst-params: Burst timing value for COM parameter for port 0.</div><div class='del'>-  - ceva,p1-burst-params: Burst timing value for COM parameter for port 1.</div><div class='del'>-			The fields for the above parameter must be as shown below:</div><div class='del'>-			ceva,pN-burst-params = /bits/ 8 &lt;BMX BNM SFD PTST&gt;;</div><div class='del'>-			BMX: COM Burst Maximum.</div><div class='del'>-			BNM: COM Burst Nominal.</div><div class='del'>-			SFD: Signal Failure Detection value.</div><div class='del'>-			PTST: Partial to Slumber timer value.</div><div class='del'>-  - ceva,p0-retry-params: Retry interval timing value for port 0.</div><div class='del'>-  - ceva,p1-retry-params: Retry interval timing value for port 1.</div><div class='del'>-			The fields for the above parameter must be as shown below:</div><div class='del'>-			ceva,pN-retry-params = /bits/ 16 &lt;RIT RCT&gt;;</div><div class='del'>-			RIT:  Retry Interval Timer.</div><div class='del'>-			RCT:  Rate Change Timer.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - ceva,broken-gen2: limit to gen1 speed instead of gen2.</div><div class='del'>-  - phys: phandle for the PHY device</div><div class='del'>-  - resets: phandle to the reset controller for the SATA IP</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-	ahci@fd0c0000 {</div><div class='del'>-		compatible = "ceva,ahci-1v84";</div><div class='del'>-		reg = &lt;0xfd0c0000 0x200&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		interrupts = &lt;0 133 4&gt;;</div><div class='del'>-		clocks = &lt;&amp;clkc SATA_CLK_ID&gt;;</div><div class='del'>-		ceva,p0-cominit-params = /bits/ 8 &lt;0x0F 0x25 0x18 0x29&gt;;</div><div class='del'>-		ceva,p0-comwake-params = /bits/ 8 &lt;0x04 0x0B 0x08 0x0F&gt;;</div><div class='del'>-		ceva,p0-burst-params = /bits/ 8 &lt;0x0A 0x08 0x4A 0x06&gt;;</div><div class='del'>-		ceva,p0-retry-params = /bits/ 16 &lt;0x0216 0x7F06&gt;;</div><div class='del'>-</div><div class='del'>-		ceva,p1-cominit-params = /bits/ 8 &lt;0x0F 0x25 0x18 0x29&gt;;</div><div class='del'>-		ceva,p1-comwake-params = /bits/ 8 &lt;0x04 0x0B 0x08 0x0F&gt;;</div><div class='del'>-		ceva,p1-burst-params = /bits/ 8 &lt;0x0A 0x08 0x4A 0x06&gt;;</div><div class='del'>-		ceva,p1-retry-params = /bits/ 16 &lt;0x0216 0x7F06&gt;;</div><div class='del'>-		ceva,broken-gen2;</div><div class='del'>-		phys = &lt;&amp;psgtr 1 PHY_TYPE_SATA 1 1&gt;;</div><div class='del'>-		resets = &lt;&amp;zynqmp_reset ZYNQMP_RESET_SATA&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml<br/>new file mode 100644<br/>index 000000000000..7fdf40954a4c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/ahci-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/ahci-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/ahci-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Common Properties for Serial ATA AHCI controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='add'>+  - Damien Le Moal &lt;damien.lemoal@opensource.wdc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document defines device tree properties for a common AHCI SATA</div><div class='add'>+  controller implementation. It's hardware interface is supposed to</div><div class='add'>+  conform to the technical standard defined by Intel (see Serial ATA</div><div class='add'>+  Advanced Host Controller Interface specification for details). The</div><div class='add'>+  document doesn't constitute a DT-node binding by itself but merely</div><div class='add'>+  defines a set of common properties for the AHCI-compatible devices.</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: sata-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      Generic AHCI registers space conforming to the Serial ATA AHCI</div><div class='add'>+      specification.</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    description: CSR space IDs</div><div class='add'>+    contains:</div><div class='add'>+      const: ahci</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      Generic AHCI state change interrupt. Can be implemented either as a</div><div class='add'>+      single line attached to the controller or as a set of the signals</div><div class='add'>+      indicating the particular port events.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 32</div><div class='add'>+</div><div class='add'>+  ahci-supply:</div><div class='add'>+    description: Power regulator for AHCI controller</div><div class='add'>+</div><div class='add'>+  target-supply:</div><div class='add'>+    description: Power regulator for SATA target device</div><div class='add'>+</div><div class='add'>+  phy-supply:</div><div class='add'>+    description: Power regulator for SATA PHY</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    description: Reference to the SATA PHY node</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: sata-phy</div><div class='add'>+</div><div class='add'>+  hba-cap:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Bitfield of the HBA generic platform capabilities like Staggered</div><div class='add'>+      Spin-up or Mechanical Presence Switch support. It can be used to</div><div class='add'>+      appropriately initialize the HWinit fields of the HBA CAP register</div><div class='add'>+      in case if the system firmware hasn't done it.</div><div class='add'>+</div><div class='add'>+  ports-implemented:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Mask that indicates which ports the HBA supports. Useful if PI is not</div><div class='add'>+      programmed by the BIOS, which is true for some embedded SoC's.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^sata-port@[0-9a-f]+$":</div><div class='add'>+    $ref: '#/$defs/ahci-port'</div><div class='add'>+    description:</div><div class='add'>+      It is optionally possible to describe the ports as sub-nodes so</div><div class='add'>+      to enable each port independently when dealing with multiple PHYs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  ahci-port:</div><div class='add'>+    $ref: /schemas/ata/sata-common.yaml#/$defs/sata-port</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description:</div><div class='add'>+          AHCI SATA port identifier. By design AHCI controller can't have</div><div class='add'>+          more than 32 ports due to the CAP.NP fields and PI register size</div><div class='add'>+          constraints.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 31</div><div class='add'>+</div><div class='add'>+      phys:</div><div class='add'>+        description: Individual AHCI SATA port PHY</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      phy-names:</div><div class='add'>+        description: AHCI SATA port PHY ID</div><div class='add'>+        const: sata-phy</div><div class='add'>+</div><div class='add'>+      target-supply:</div><div class='add'>+        description: Power regulator for SATA port target device</div><div class='add'>+</div><div class='add'>+      hba-port-cap:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          Bitfield of the HBA port-specific platform capabilities like Hot</div><div class='add'>+          plugging, eSATA, FIS-based Switching, etc (see AHCI specification</div><div class='add'>+          for details). It can be used to initialize the HWinit fields of</div><div class='add'>+          the PxCMD register in case if the system firmware hasn't done it.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.yaml b/Documentation/devicetree/bindings/ata/ahci-platform.yaml<br/>index c146ab8e14e5..358617115bb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/ahci-platform.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/ahci-platform.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/ahci-platform.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/ahci-platform.yaml</a></div><div class='hunk'>@@ -30,15 +30,12 @@ select:</div><div class='ctx'>           - marvell,armada-3700-ahci</div><div class='ctx'>           - marvell,armada-8k-ahci</div><div class='ctx'>           - marvell,berlin2q-ahci</div><div class='del'>-          - snps,dwc-ahci</div><div class='del'>-          - snps,spear-ahci</div><div class='add'>+          - socionext,uniphier-pro4-ahci</div><div class='add'>+          - socionext,uniphier-pxs2-ahci</div><div class='add'>+          - socionext,uniphier-pxs3-ahci</div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "sata-common.yaml#"</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -48,18 +45,15 @@ properties:</div><div class='ctx'>               - marvell,armada-8k-ahci</div><div class='ctx'>               - marvell,berlin2-ahci</div><div class='ctx'>               - marvell,berlin2q-ahci</div><div class='add'>+              - socionext,uniphier-pro4-ahci</div><div class='add'>+              - socionext,uniphier-pxs2-ahci</div><div class='add'>+              - socionext,uniphier-pxs3-ahci</div><div class='ctx'>           - const: generic-ahci</div><div class='del'>-      - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - rockchip,rk3568-dwc-ahci</div><div class='del'>-          - const: snps,dwc-ahci</div><div class='ctx'>       - enum:</div><div class='ctx'>           - cavium,octeon-7130-ahci</div><div class='ctx'>           - hisilicon,hisi-ahci</div><div class='ctx'>           - ibm,476gtr-ahci</div><div class='ctx'>           - marvell,armada-3700-ahci</div><div class='del'>-          - snps,dwc-ahci</div><div class='del'>-          - snps,spear-ahci</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -69,92 +63,75 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    description:</div><div class='del'>-      Clock IDs array as required by the controller.</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    description:</div><div class='del'>-      Names of clocks corresponding to IDs in the clock property.</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  ahci-supply:</div><div class='del'>-    description:</div><div class='del'>-      regulator for AHCI controller</div><div class='del'>-</div><div class='del'>-  dma-coherent: true</div><div class='del'>-</div><div class='del'>-  phy-supply:</div><div class='del'>-    description:</div><div class='del'>-      regulator for PHY power</div><div class='del'>-</div><div class='del'>-  phys:</div><div class='del'>-    description:</div><div class='del'>-      List of all PHYs on this controller</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  phy-names:</div><div class='del'>-    description:</div><div class='del'>-      Name specifier for the PHYs</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  ports-implemented:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='del'>-    description: |</div><div class='del'>-      Mask that indicates which ports that the HBA supports</div><div class='del'>-      are available for software to use. Useful if PORTS_IMPL</div><div class='del'>-      is not programmed by the BIOS, which is true with</div><div class='del'>-      some embedded SoCs.</div><div class='del'>-    maximum: 0x1f</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  target-supply:</div><div class='del'>-    description:</div><div class='del'>-      regulator for SATA target power</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^sata-port@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    additionalProperties: false</div><div class='del'>-    description:</div><div class='del'>-      Subnode with configuration of the Ports.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      reg:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      phys:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      phy-names:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      target-supply:</div><div class='del'>-        description:</div><div class='del'>-          regulator for SATA target power</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - reg</div><div class='add'>+    $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port</div><div class='ctx'> </div><div class='ctx'>     anyOf:</div><div class='ctx'>       - required: [ phys ]</div><div class='ctx'>       - required: [ target-supply ]</div><div class='ctx'> </div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ahci-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pro4-ahci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          items:</div><div class='add'>+            - description: reset line for the parent</div><div class='add'>+            - description: reset line for the glue logic</div><div class='add'>+            - description: reset line for the controller</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+    else:</div><div class='add'>+      if:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - socionext,uniphier-pxs2-ahci</div><div class='add'>+                - socionext,uniphier-pxs3-ahci</div><div class='add'>+      then:</div><div class='add'>+        properties:</div><div class='add'>+          resets:</div><div class='add'>+            items:</div><div class='add'>+              - description: reset for the glue logic</div><div class='add'>+              - description: reset for the controller</div><div class='add'>+        required:</div><div class='add'>+          - resets</div><div class='add'>+      else:</div><div class='add'>+        properties:</div><div class='add'>+          resets:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -167,6 +144,8 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/clock/berlin2q.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/ata/ahci.h&gt;</div><div class='add'>+</div><div class='ctx'>     sata@f7e90000 {</div><div class='ctx'>         compatible = "marvell,berlin2q-ahci", "generic-ahci";</div><div class='ctx'>         reg = &lt;0xf7e90000 0x1000&gt;;</div><div class='hunk'>@@ -175,15 +154,23 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='add'>+        hba-cap = &lt;HBA_SMPS&gt;;</div><div class='add'>+</div><div class='ctx'>         sata0: sata-port@0 {</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='add'>+</div><div class='ctx'>             phys = &lt;&amp;sata_phy 0&gt;;</div><div class='ctx'>             target-supply = &lt;&amp;reg_sata0&gt;;</div><div class='add'>+</div><div class='add'>+            hba-port-cap = &lt;(HBA_PORT_FBSCP | HBA_PORT_ESP)&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         sata1: sata-port@1 {</div><div class='ctx'>             reg = &lt;1&gt;;</div><div class='add'>+</div><div class='ctx'>             phys = &lt;&amp;sata_phy 1&gt;;</div><div class='ctx'>             target-supply = &lt;&amp;reg_sata1&gt;;</div><div class='add'>+</div><div class='add'>+            hba-port-cap = &lt;(HBA_PORT_HPCP | HBA_PORT_MPSP | HBA_PORT_FBSCP)&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml b/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml<br/>index cb530b46beff..2011bd03cdcd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/allwinner,sun4i-a10-ahci.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/ata/allwinner,sun4i-a10-ahci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 AHCI SATA Controller bindings</div><div class='add'>+title: Allwinner A10 AHCI SATA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml b/Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml<br/>index e6b42a113ff1..a2afe2ad6063 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/allwinner,sun8i-r40-ahci.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/ata/allwinner,sun8i-r40-ahci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner R40 AHCI SATA Controller bindings</div><div class='add'>+title: Allwinner R40 AHCI SATA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ata-generic.yaml b/Documentation/devicetree/bindings/ata/ata-generic.yaml<br/>new file mode 100644<br/>index 000000000000..0697927f3d7e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/ata-generic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/ata-generic.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/ata-generic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Generic Parallel ATA Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Generic Parallel ATA controllers supporting PIO modes only.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - arm,vexpress-cf</div><div class='add'>+          - fsl,mpc8349emitx-pata</div><div class='add'>+      - const: ata-generic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Command interface registers</div><div class='add'>+      - description: Control interface registers</div><div class='add'>+</div><div class='add'>+  reg-shift:</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ata-generic,use16bit:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Use 16-bit accesses instead of 32-bit for data transfers</div><div class='add'>+</div><div class='add'>+  pio-mode:</div><div class='add'>+    description: Maximum ATA PIO transfer mode</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 6</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    compact-flash@1a000 {</div><div class='add'>+        compatible = "arm,vexpress-cf", "ata-generic";</div><div class='add'>+        reg = &lt;0x1a000 0x100&gt;,</div><div class='add'>+              &lt;0x1a100 0xf00&gt;;</div><div class='add'>+        reg-shift = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml b/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml<br/>new file mode 100644<br/>index 000000000000..9b7ca4759bd7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/baikal,bt1-ahci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Baikal-T1 SoC AHCI SATA controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Serge Semin &lt;fancer.lancer@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  AHCI SATA controller embedded into the Baikal-T1 SoC is based on the</div><div class='add'>+  DWC AHCI SATA v4.10a IP-core.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: snps,dwc-ahci-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: baikal,bt1-ahci</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral APB bus clock</div><div class='add'>+      - description: Application AXI BIU clock</div><div class='add'>+      - description: SATA Ports reference clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: ref</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: Application AXI BIU domain reset</div><div class='add'>+      - description: SATA Ports clock domain reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: arst</div><div class='add'>+      - const: ref</div><div class='add'>+</div><div class='add'>+  ports-implemented:</div><div class='add'>+    maximum: 0x3</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^sata-port@[0-1]$":</div><div class='add'>+    $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+</div><div class='add'>+      snps,tx-ts-max:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          Due to having AXI3 bus interface utilized the maximum Tx DMA</div><div class='add'>+          transaction size can't exceed 16 beats (AxLEN[3:0]).</div><div class='add'>+        enum: [ 1, 2, 4, 8, 16 ]</div><div class='add'>+</div><div class='add'>+      snps,rx-ts-max:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          Due to having AXI3 bus interface utilized the maximum Rx DMA</div><div class='add'>+          transaction size can't exceed 16 beats (AxLEN[3:0]).</div><div class='add'>+        enum: [ 1, 2, 4, 8, 16 ]</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sata@1f050000 {</div><div class='add'>+      compatible = "baikal,bt1-ahci";</div><div class='add'>+      reg = &lt;0x1f050000 0x2000&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;0 64 4&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;ccu_sys 1&gt;, &lt;&amp;ccu_axi 2&gt;, &lt;&amp;sata_ref_clk&gt;;</div><div class='add'>+      clock-names = "pclk", "aclk", "ref";</div><div class='add'>+</div><div class='add'>+      resets = &lt;&amp;ccu_axi 2&gt;, &lt;&amp;ccu_sys 0&gt;;</div><div class='add'>+      reset-names = "arst", "ref";</div><div class='add'>+</div><div class='add'>+      ports-implemented = &lt;0x3&gt;;</div><div class='add'>+</div><div class='add'>+      sata-port@0 {</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        snps,tx-ts-max = &lt;4&gt;;</div><div class='add'>+        snps,rx-ts-max = &lt;4&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      sata-port@1 {</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        snps,tx-ts-max = &lt;4&gt;;</div><div class='add'>+        snps,rx-ts-max = &lt;4&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml b/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml<br/>index 235a93ac86b0..fe7f091e744f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/brcm,sata-brcm.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ maintainers:</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: sata-common.yaml#</div><div class='add'>+  - $ref: ahci-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,7 +30,6 @@ properties:</div><div class='ctx'>           - const: brcm,bcm-nsp-ahci</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='hunk'>@@ -41,8 +40,6 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  dma-coherent: true</div><div class='del'>-</div><div class='ctx'> if:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml b/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml<br/>new file mode 100644<br/>index 000000000000..9b31f864e071<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/ceva,ahci-1v84.yaml</a></div><div class='hunk'>@@ -0,0 +1,189 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/ceva,ahci-1v84.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ceva AHCI SATA Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Piyush Mehta &lt;piyush.mehta@xilinx.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Ceva SATA controller mostly conforms to the AHCI interface with some</div><div class='add'>+  special extensions to add functionality, is a high-performance dual-port</div><div class='add'>+  SATA host controller with an AHCI compliant command layer which supports</div><div class='add'>+  advanced features such as native command queuing and frame information</div><div class='add'>+  structure (FIS) based switching for systems employing port multipliers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ceva,ahci-1v84</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ceva,p0-cominit-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      OOB timing value for COMINIT parameter for port 0.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,p0-cominit-params = /bits/ 8 &lt;CIBGMN CIBGMX CIBGN CINMP&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: CINMP - COMINIT Negate Minimum Period.</div><div class='add'>+      - description: CIBGN - COMINIT Burst Gap Nominal.</div><div class='add'>+      - description: CIBGMX - COMINIT Burst Gap Maximum.</div><div class='add'>+      - description: CIBGMN - COMINIT Burst Gap Minimum.</div><div class='add'>+</div><div class='add'>+  ceva,p0-comwake-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      OOB timing value for COMWAKE parameter for port 0.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,p0-comwake-params = /bits/ 8 &lt;CWBGMN CWBGMX CWBGN CWNMP&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: CWBGMN - COMWAKE Burst Gap Minimum.</div><div class='add'>+      - description: CWBGMX - COMWAKE Burst Gap Maximum.</div><div class='add'>+      - description: CWBGN - COMWAKE Burst Gap Nominal.</div><div class='add'>+      - description: CWNMP - COMWAKE Negate Minimum Period.</div><div class='add'>+</div><div class='add'>+  ceva,p0-burst-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      Burst timing value for COM parameter for port 0.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,p0-burst-params = /bits/ 8 &lt;BMX BNM SFD PTST&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: BMX - COM Burst Maximum.</div><div class='add'>+      - description: BNM - COM Burst Nominal.</div><div class='add'>+      - description: SFD - Signal Failure Detection value.</div><div class='add'>+      - description: PTST - Partial to Slumber timer value.</div><div class='add'>+</div><div class='add'>+  ceva,p0-retry-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint16-array</div><div class='add'>+    description: |</div><div class='add'>+      Retry interval timing value for port 0.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,p0-retry-params = /bits/ 16 &lt;RIT RCT&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: RIT - Retry Interval Timer.</div><div class='add'>+      - description: RCT - Rate Change Timer.</div><div class='add'>+</div><div class='add'>+  ceva,p1-cominit-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      OOB timing value for COMINIT parameter for port 1.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,p1-cominit-params = /bits/ 8 &lt;CIBGMN CIBGMX CIBGN CINMP&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: CINMP - COMINIT Negate Minimum Period.</div><div class='add'>+      - description: CIBGN - COMINIT Burst Gap Nominal.</div><div class='add'>+      - description: CIBGMX - COMINIT Burst Gap Maximum.</div><div class='add'>+      - description: CIBGMN - COMINIT Burst Gap Minimum.</div><div class='add'>+</div><div class='add'>+  ceva,p1-comwake-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      OOB timing value for COMWAKE parameter for port 1.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,p1-comwake-params = /bits/ 8 &lt;CWBGMN CWBGMX CWBGN CWNMP&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: CWBGMN - COMWAKE Burst Gap Minimum.</div><div class='add'>+      - description: CWBGMX - COMWAKE Burst Gap Maximum.</div><div class='add'>+      - description: CWBGN - COMWAKE Burst Gap Nominal.</div><div class='add'>+      - description: CWNMP - COMWAKE Negate Minimum Period.</div><div class='add'>+</div><div class='add'>+  ceva,p1-burst-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      Burst timing value for COM parameter for port 1.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,p1-burst-params = /bits/ 8 &lt;BMX BNM SFD PTST&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: BMX - COM Burst Maximum.</div><div class='add'>+      - description: BNM - COM Burst Nominal.</div><div class='add'>+      - description: SFD - Signal Failure Detection value.</div><div class='add'>+      - description: PTST - Partial to Slumber timer value.</div><div class='add'>+</div><div class='add'>+  ceva,p1-retry-params:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint16-array</div><div class='add'>+    description: |</div><div class='add'>+      Retry interval timing value for port 1.</div><div class='add'>+      The fields for the above parameter must be as shown below:-</div><div class='add'>+      ceva,pN-retry-params = /bits/ 16 &lt;RIT RCT&gt;;</div><div class='add'>+    items:</div><div class='add'>+      - description: RIT - Retry Interval Timer.</div><div class='add'>+      - description: RCT - Rate Change Timer.</div><div class='add'>+</div><div class='add'>+  ceva,broken-gen2:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      limit to gen1 speed instead of gen2.</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: sata-phy</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - ceva,p0-cominit-params</div><div class='add'>+  - ceva,p0-comwake-params</div><div class='add'>+  - ceva,p0-burst-params</div><div class='add'>+  - ceva,p0-retry-params</div><div class='add'>+  - ceva,p1-cominit-params</div><div class='add'>+  - ceva,p1-comwake-params</div><div class='add'>+  - ceva,p1-burst-params</div><div class='add'>+  - ceva,p1-retry-params</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/xlnx-zynqmp-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/xlnx-zynqmp-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/xlnx-zynqmp-resets.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/xlnx-zynqmp-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+</div><div class='add'>+    sata: ahci@fd0c0000 {</div><div class='add'>+        compatible = "ceva,ahci-1v84";</div><div class='add'>+        reg = &lt;0xfd0c0000 0x200&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        interrupts = &lt;0 133 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;zynqmp_clk SATA_REF&gt;;</div><div class='add'>+        ceva,p0-cominit-params = /bits/ 8 &lt;0x0F 0x25 0x18 0x29&gt;;</div><div class='add'>+        ceva,p0-comwake-params = /bits/ 8 &lt;0x04 0x0B 0x08 0x0F&gt;;</div><div class='add'>+        ceva,p0-burst-params = /bits/ 8 &lt;0x0A 0x08 0x4A 0x06&gt;;</div><div class='add'>+        ceva,p0-retry-params = /bits/ 16 &lt;0x0216 0x7F06&gt;;</div><div class='add'>+        ceva,p1-cominit-params = /bits/ 8 &lt;0x0F 0x25 0x18 0x29&gt;;</div><div class='add'>+        ceva,p1-comwake-params = /bits/ 8 &lt;0x04 0x0B 0x08 0x0F&gt;;</div><div class='add'>+        ceva,p1-burst-params = /bits/ 8 &lt;0x0A 0x08 0x4A 0x06&gt;;</div><div class='add'>+        ceva,p1-retry-params = /bits/ 16 &lt;0x0216 0x7F06&gt;;</div><div class='add'>+        ceva,broken-gen2;</div><div class='add'>+        phys = &lt;&amp;psgtr 1 PHY_TYPE_SATA 1 1&gt;;</div><div class='add'>+        resets = &lt;&amp;zynqmp_reset ZYNQMP_RESET_SATA&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml b/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml<br/>index 21a90975593b..529093666508 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/cortina,gemini-sata-bridge.yaml</a></div><div class='hunk'>@@ -22,7 +22,6 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'>     description: phandles to the reset lines for both SATA bridges</div><div class='ctx'> </div><div class='hunk'>@@ -32,7 +31,6 @@ properties:</div><div class='ctx'>       - const: sata1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'>     description: phandles to the compulsory peripheral clocks</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml b/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml<br/>index 52e18600ecff..378692010c56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml</a></div><div class='hunk'>@@ -35,6 +35,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: pata-common.yaml#</div><div class='add'>+  - $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml b/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml<br/>index c060c7914cae..fe0909554790 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/renesas,rcar-sata.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/ata/renesas,rcar-sata.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/ata/renesas,rcar-sata.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas R-Car Serial-ATA Interface</div><div class='ctx'> </div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - renesas,sata-r8a774b1     # RZ/G2N</div><div class='add'>+              - renesas,sata-r8a774e1     # RZ/G2H</div><div class='ctx'>               - renesas,sata-r8a7795      # R-Car H3</div><div class='ctx'>               - renesas,sata-r8a77965     # R-Car M3-N</div><div class='ctx'>           - const: renesas,rcar-gen3-sata # generic R-Car Gen3 or RZ/G2</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/sata-common.yaml b/Documentation/devicetree/bindings/ata/sata-common.yaml<br/>index 7ac77b1c5850..58c9342b9925 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/sata-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/sata-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/sata-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/sata-common.yaml</a></div><div class='hunk'>@@ -31,22 +31,27 @@ properties:</div><div class='ctx'>   "#size-cells":</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^sata-port@[0-9a-e]$":</div><div class='add'>+    $ref: '#/$defs/sata-port'</div><div class='ctx'>     description: |</div><div class='ctx'>       DT nodes for ports connected on the SATA host. The SATA port</div><div class='ctx'>       nodes will be named "sata-port".</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  sata-port:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         minimum: 0</div><div class='del'>-        maximum: 14</div><div class='ctx'>         description:</div><div class='del'>-          The ID number of the drive port SATA can potentially use a port</div><div class='del'>-          multiplier making it possible to connect up to 15 disks to a single</div><div class='del'>-          SATA port.</div><div class='del'>-</div><div class='del'>-additionalProperties: true</div><div class='add'>+          The ID number of the SATA port. Aside with being directly used,</div><div class='add'>+          each port can have a Port Multiplier attached thus allowing to</div><div class='add'>+          access more than one drive by means of a single SATA port.</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.yaml b/Documentation/devicetree/bindings/ata/sata_highbank.yaml<br/>index 49679b58041c..f23f26a8f21c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/sata_highbank.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ata/sata_highbank.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/sata_highbank.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/sata_highbank.yaml</a></div><div class='hunk'>@@ -52,7 +52,6 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 8</div><div class='ctx'>     items:</div><div class='del'>-      minItems: 2</div><div class='ctx'>       maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   calxeda,tx-atten:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml<br/>new file mode 100644<br/>index 000000000000..c1457910520b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/snps,dwc-ahci-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/snps,dwc-ahci-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys DWC AHCI SATA controller properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Serge Semin &lt;fancer.lancer@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document defines device tree schema for the generic Synopsys DWC</div><div class='add'>+  AHCI controller properties.</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ahci-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      Basic DWC AHCI SATA clock sources like application AXI/AHB BIU clock,</div><div class='add'>+      PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx)</div><div class='add'>+      clock, etc.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - description: Application APB/AHB/AXI BIU clock</div><div class='add'>+          enum:</div><div class='add'>+            - pclk</div><div class='add'>+            - aclk</div><div class='add'>+            - hclk</div><div class='add'>+            - sata</div><div class='add'>+        - description: Power Module keep-alive clock</div><div class='add'>+          const: pmalive</div><div class='add'>+        - description: RxOOB detection clock</div><div class='add'>+          const: rxoob</div><div class='add'>+        - description: SATA Ports reference clock</div><div class='add'>+          const: ref</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    description:</div><div class='add'>+      At least basic application and reference clock domains resets are</div><div class='add'>+      normally supported by the DWC AHCI SATA controller.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - description: Application AHB/AXI BIU clock domain reset control</div><div class='add'>+          enum:</div><div class='add'>+            - arst</div><div class='add'>+            - hrst</div><div class='add'>+        - description: Power Module keep-alive clock domain reset control</div><div class='add'>+          const: pmalive</div><div class='add'>+        - description: RxOOB detection clock domain reset control</div><div class='add'>+          const: rxoob</div><div class='add'>+        - description: Reference clock domain reset control</div><div class='add'>+          const: ref</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^sata-port@[0-9a-e]$":</div><div class='add'>+    $ref: '#/$defs/dwc-ahci-port'</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  dwc-ahci-port:</div><div class='add'>+    $ref: /schemas/ata/ahci-common.yaml#/$defs/ahci-port</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+</div><div class='add'>+      snps,tx-ts-max:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: Maximal size of Tx DMA transactions in FIFO words</div><div class='add'>+        enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ]</div><div class='add'>+</div><div class='add'>+      snps,rx-ts-max:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: Maximal size of Rx DMA transactions in FIFO words</div><div class='add'>+        enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024 ]</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml b/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml<br/>new file mode 100644<br/>index 000000000000..5afa4b57ce20<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ata/snps,dwc-ahci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys DWC AHCI SATA controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Serge Semin &lt;fancer.lancer@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document defines device tree bindings for the generic Synopsys DWC</div><div class='add'>+  implementation of the AHCI SATA controller.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: snps,dwc-ahci-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Synopsys AHCI SATA-compatible devices</div><div class='add'>+        const: snps,dwc-ahci</div><div class='add'>+      - description: SPEAr1340 AHCI SATA device</div><div class='add'>+        const: snps,spear-ahci</div><div class='add'>+      - description: Rockhip RK3568 AHCI controller</div><div class='add'>+        items:</div><div class='add'>+          - const: rockchip,rk3568-dwc-ahci</div><div class='add'>+          - const: snps,dwc-ahci</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^sata-port@[0-9a-e]$":</div><div class='add'>+    $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/ata/ahci.h&gt;</div><div class='add'>+</div><div class='add'>+    sata@122f0000 {</div><div class='add'>+      compatible = "snps,dwc-ahci";</div><div class='add'>+      reg = &lt;0x122F0000 0x1ff&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;clock1&gt;, &lt;&amp;clock2&gt;;</div><div class='add'>+      clock-names = "aclk", "ref";</div><div class='add'>+</div><div class='add'>+      phys = &lt;&amp;sata_phy&gt;;</div><div class='add'>+      phy-names = "sata-phy";</div><div class='add'>+</div><div class='add'>+      ports-implemented = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+      sata-port@0 {</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        hba-port-cap = &lt;HBA_PORT_FBSCP&gt;;</div><div class='add'>+</div><div class='add'>+        snps,tx-ts-max = &lt;512&gt;;</div><div class='add'>+        snps,rx-ts-max = &lt;512&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml b/Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml<br/>index fc4873deb76f..49304a1476ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/auxdisplay/holtek,ht16k33.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Robin van der Gracht &lt;robin@protonic.nl&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/input/matrix-keymap.yaml#"</div><div class='add'>+  - $ref: /schemas/input/matrix-keymap.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -72,7 +72,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/input/input.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml<br/>index ad313ccaaaef..9845a187bdf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A64 Display Engine Bus Device Tree Bindings</div><div class='add'>+title: Allwinner A64 Display Engine Bus</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -46,6 +46,7 @@ patternProperties:</div><div class='ctx'>   # All other properties should be child nodes with unit-address and 'reg'</div><div class='ctx'>   "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml<br/>index 3d719f468a5b..24c939f59091 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/allwinner,sun8i-a23-rsb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/bus/allwinner,sun8i-a23-rsb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A23 RSB Device Tree Bindings</div><div class='add'>+title: Allwinner A23 RSB</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -45,6 +45,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-9a-fA-F]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml b/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml<br/>new file mode 100644<br/>index 000000000000..2894256c976d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/bus/aspeed,ast2600-ahbc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ASPEED Advanced High-Performance Bus Controller (AHBC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neal Liu &lt;neal_liu@aspeedtech.com&gt;</div><div class='add'>+  - Chia-Wei Wang &lt;chiawei_wang@aspeedtech.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Advanced High-performance Bus Controller (AHBC) supports plenty of mechanisms</div><div class='add'>+  including a priority arbiter, an address decoder and a data multiplexer</div><div class='add'>+  to control the overall operations of Advanced High-performance Bus (AHB).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - aspeed,ast2600-ahbc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ahbc@1e600000 {</div><div class='add'>+        compatible = "aspeed,ast2600-ahbc";</div><div class='add'>+        reg = &lt;0x1e600000 0x100&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml b/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml<br/>new file mode 100644<br/>index 000000000000..b568d0ce438d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml</a></div><div class='hunk'>@@ -0,0 +1,232 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Ying &lt;victor.liu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os</div><div class='add'>+  sitting together with the PHYs.  It is not the same as the MSI bus coming</div><div class='add'>+  from i.MX8 System Controller Unit (SCU) which is used to control power,</div><div class='add'>+  clock and reset through the i.MX8 Distributed Slave System Controller (DSC).</div><div class='add'>+</div><div class='add'>+  i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,</div><div class='add'>+  that is, MSI clock and AHB clock, need to be enabled so that peripherals</div><div class='add'>+  connected to the bus can be accessed. Also, the bus is part of a power</div><div class='add'>+  domain. The power domain needs to be enabled before the peripherals can</div><div class='add'>+  be accessed.</div><div class='add'>+</div><div class='add'>+  Peripherals in i.MX8qm/qxp imaging, LVDS, MIPI DSI and HDMI TX subsystems,</div><div class='add'>+  like I2C controller, PWM controller, MIPI DSI controller and Control and</div><div class='add'>+  Status Registers (CSR) module, are accessed through the bus.</div><div class='add'>+</div><div class='add'>+  The i.MX System Controller Firmware (SCFW) owns and uses the i.MX8qm/qxp</div><div class='add'>+  pixel link MSI bus controller and does not allow SCFW user to control it.</div><div class='add'>+  So, the controller's registers cannot be accessed by SCFW user. Hence,</div><div class='add'>+  the interrupts generated by the controller don't make any sense from SCFW</div><div class='add'>+  user's point of view.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: simple-pm-bus.yaml#</div><div class='add'>+</div><div class='add'>+# We need a select here so we don't match all nodes with 'simple-pm-bus'.</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - fsl,imx8qxp-display-pixel-link-msi-bus</div><div class='add'>+          - fsl,imx8qm-display-pixel-link-msi-bus</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx8qxp-display-pixel-link-msi-bus</div><div class='add'>+          - fsl,imx8qm-display-pixel-link-msi-bus</div><div class='add'>+      - const: simple-pm-bus</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: master gated clock from system</div><div class='add'>+      - description: AHB clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: msi</div><div class='add'>+      - const: ahb</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^.*@[0-9a-f]+$":</div><div class='add'>+    description: Devices attached to the bus</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8-lpcg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+    bus@56200000 {</div><div class='add'>+        compatible = "fsl,imx8qxp-display-pixel-link-msi-bus", "simple-pm-bus";</div><div class='add'>+        reg = &lt;0x56200000 0x20000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;dc0_irqsteer&gt;;</div><div class='add'>+        interrupts = &lt;320&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+        clocks = &lt;&amp;dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4&gt;,</div><div class='add'>+                 &lt;&amp;dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+        clock-names = "msi", "ahb";</div><div class='add'>+        power-domains = &lt;&amp;pd IMX_SC_R_DC_0&gt;;</div><div class='add'>+</div><div class='add'>+        syscon@56221000 {</div><div class='add'>+            compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";</div><div class='add'>+            reg = &lt;0x56221000 0x1000&gt;;</div><div class='add'>+            clocks = &lt;&amp;mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+            clock-names = "ipg";</div><div class='add'>+</div><div class='add'>+            pxl2dpi {</div><div class='add'>+                compatible = "fsl,imx8qxp-pxl2dpi";</div><div class='add'>+                fsl,sc-resource = &lt;IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+                power-domains = &lt;&amp;pd IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+</div><div class='add'>+                ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    port@0 {</div><div class='add'>+                        #address-cells = &lt;1&gt;;</div><div class='add'>+                        #size-cells = &lt;0&gt;;</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                        mipi_lvds_0_pxl2dpi_dc0_pixel_link0: endpoint@0 {</div><div class='add'>+                            reg = &lt;0&gt;;</div><div class='add'>+                            remote-endpoint = &lt;&amp;dc0_pixel_link0_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                        };</div><div class='add'>+</div><div class='add'>+                        mipi_lvds_0_pxl2dpi_dc0_pixel_link1: endpoint@1 {</div><div class='add'>+                            reg = &lt;1&gt;;</div><div class='add'>+                            remote-endpoint = &lt;&amp;dc0_pixel_link1_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@1 {</div><div class='add'>+                        #address-cells = &lt;1&gt;;</div><div class='add'>+                        #size-cells = &lt;0&gt;;</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                        mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {</div><div class='add'>+                            reg = &lt;0&gt;;</div><div class='add'>+                            remote-endpoint = &lt;&amp;mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                        };</div><div class='add'>+</div><div class='add'>+                        mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {</div><div class='add'>+                            reg = &lt;1&gt;;</div><div class='add'>+                            remote-endpoint = &lt;&amp;mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            ldb {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                compatible = "fsl,imx8qxp-ldb";</div><div class='add'>+                clocks = &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2&gt;,</div><div class='add'>+                         &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS&gt;;</div><div class='add'>+                clock-names = "pixel", "bypass";</div><div class='add'>+                power-domains = &lt;&amp;pd IMX_SC_R_LVDS_0&gt;;</div><div class='add'>+</div><div class='add'>+                channel@0 {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    phys = &lt;&amp;mipi_lvds_0_phy&gt;;</div><div class='add'>+                    phy-names = "lvds_phy";</div><div class='add'>+</div><div class='add'>+                    port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                        mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {</div><div class='add'>+                            remote-endpoint = &lt;&amp;mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0&gt;;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                        /* ... */</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                channel@1 {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    phys = &lt;&amp;mipi_lvds_0_phy&gt;;</div><div class='add'>+                    phy-names = "lvds_phy";</div><div class='add'>+</div><div class='add'>+                    port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                        mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {</div><div class='add'>+                            remote-endpoint = &lt;&amp;mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1&gt;;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                        /* ... */</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        clock-controller@56223004 {</div><div class='add'>+            compatible = "fsl,imx8qxp-lpcg";</div><div class='add'>+            reg = &lt;0x56223004 0x4&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            clocks = &lt;&amp;mipi_lvds_0_ipg_clk&gt;;</div><div class='add'>+            clock-indices = &lt;IMX_LPCG_CLK_4&gt;;</div><div class='add'>+            clock-output-names = "mipi_lvds_0_di_mipi_lvds_regs_lpcg_ipg_clk";</div><div class='add'>+            power-domains = &lt;&amp;pd IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        phy@56228300 {</div><div class='add'>+            compatible = "fsl,imx8qxp-mipi-dphy";</div><div class='add'>+            reg = &lt;0x56228300 0x100&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_PHY&gt;;</div><div class='add'>+            clock-names = "phy_ref";</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+            fsl,syscon = &lt;&amp;mipi_lvds_0_csr&gt;;</div><div class='add'>+            power-domains = &lt;&amp;pd IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml b/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml<br/>new file mode 100644<br/>index 000000000000..a8d40c766dcd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/microsoft,vmbus.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/bus/microsoft,vmbus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microsoft Hyper-V VMBus</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Saurabh Sengar &lt;ssengar@linux.microsoft.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  VMBus is a software bus that implement the protocols for communication</div><div class='add'>+  between the root or host OS and guest OSs (virtual machines).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: microsoft,vmbus</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - ranges</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        bus {</div><div class='add'>+            compatible = "simple-bus";</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+</div><div class='add'>+            vmbus@ff0000000 {</div><div class='add'>+                compatible = "microsoft,vmbus";</div><div class='add'>+                #address-cells = &lt;2&gt;;</div><div class='add'>+                #size-cells = &lt;1&gt;;</div><div class='add'>+                ranges = &lt;0x0f 0xf0000000 0x0f 0xf0000000 0x10000000&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml b/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml<br/>index d3ed048c9521..4157e885c6e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/nvidia,tegra210-aconnect.yaml</a></div><div class='hunk'>@@ -40,10 +40,10 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='del'>-    const: 1</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='ctx'> </div><div class='ctx'>   "#size-cells":</div><div class='del'>-    const: 1</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='ctx'> </div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/palmbus.yaml b/Documentation/devicetree/bindings/bus/palmbus.yaml<br/>index f5cbfaf52d53..c36c1e92a573 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/palmbus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/palmbus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/palmbus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/palmbus.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/bus/palmbus.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ralink PalmBus Device Tree Bindings</div><div class='add'>+title: Ralink PalmBus</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='hunk'>@@ -36,6 +36,7 @@ patternProperties:</div><div class='ctx'>   # All other properties should be child nodes with unit-address and 'reg'</div><div class='ctx'>   "@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/qcom,ssc-block-bus.yaml b/Documentation/devicetree/bindings/bus/qcom,ssc-block-bus.yaml<br/>new file mode 100644<br/>index 000000000000..8e9e6ff35d7d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/qcom,ssc-block-bus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/qcom,ssc-block-bus.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Srba &lt;Michael.Srba@seznam.cz&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes the dependencies (clocks, resets, power domains) which</div><div class='add'>+  need to be turned on in a sequence before communication over the AHB bus</div><div class='add'>+  becomes possible.</div><div class='add'>+</div><div class='add'>+  Additionally, the reg property is used to pass to the driver the location of</div><div class='add'>+  two sadly undocumented registers which need to be poked as part of the sequence.</div><div class='add'>+</div><div class='add'>+  The SSC (Snapdragon Sensor Core) block contains a gpio controller, i2c/spi/uart</div><div class='add'>+  controllers, a hexagon core, and a clock controller which provides clocks for</div><div class='add'>+  the above.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: qcom,msm8998-ssc-block-bus</div><div class='add'>+      - const: qcom,ssc-block-bus</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: SSCAON_CONFIG0 registers</div><div class='add'>+      - description: SSCAON_CONFIG1 registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mpm_sscaon_config0</div><div class='add'>+      - const: mpm_sscaon_config1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: aggre2</div><div class='add'>+      - const: gcc_im_sleep</div><div class='add'>+      - const: aggre2_north</div><div class='add'>+      - const: ssc_xo</div><div class='add'>+      - const: ssc_ahbs</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: CX power domain</div><div class='add'>+      - description: MX power domain</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ssc_cx</div><div class='add'>+      - const: ssc_mx</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: Main reset</div><div class='add'>+      - description:</div><div class='add'>+          SSC Branch Control Register reset (associated with the ssc_xo and</div><div class='add'>+          ssc_ahbs clocks)</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ssc_reset</div><div class='add'>+      - const: ssc_bcr</div><div class='add'>+</div><div class='add'>+  qcom,halt-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: describes how to locate the ssc AXI halt register</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: Phandle reference to a syscon representing TCSR</div><div class='add'>+          - description: offset for the ssc AXI halt register</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - ranges</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - qcom,halt-regs</div><div class='add'>+</div><div class='add'>+additionalProperties:</div><div class='add'>+  type: object</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8998.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        // devices under this node are physically located in the SSC block, connected to an ssc-internal bus;</div><div class='add'>+        ssc_ahb_slave: bus@10ac008 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+</div><div class='add'>+            compatible = "qcom,msm8998-ssc-block-bus", "qcom,ssc-block-bus";</div><div class='add'>+            reg = &lt;0x10ac008 0x4&gt;, &lt;0x10ac010 0x4&gt;;</div><div class='add'>+            reg-names = "mpm_sscaon_config0", "mpm_sscaon_config1";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;xo&gt;,</div><div class='add'>+                     &lt;&amp;rpmcc RPM_SMD_AGGR2_NOC_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_IM_SLEEP&gt;,</div><div class='add'>+                     &lt;&amp;gcc AGGRE2_SNOC_NORTH_AXI&gt;,</div><div class='add'>+                     &lt;&amp;gcc SSC_XO&gt;,</div><div class='add'>+                     &lt;&amp;gcc SSC_CNOC_AHBS_CLK&gt;;</div><div class='add'>+            clock-names = "xo", "aggre2", "gcc_im_sleep", "aggre2_north", "ssc_xo", "ssc_ahbs";</div><div class='add'>+</div><div class='add'>+            resets = &lt;&amp;gcc GCC_SSC_RESET&gt;, &lt;&amp;gcc GCC_SSC_BCR&gt;;</div><div class='add'>+            reset-names = "ssc_reset", "ssc_bcr";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;rpmpd MSM8998_SSCCX&gt;, &lt;&amp;rpmpd MSM8998_SSCMX&gt;;</div><div class='add'>+            power-domain-names = "ssc_cx", "ssc_mx";</div><div class='add'>+</div><div class='add'>+            qcom,halt-regs = &lt;&amp;tcsr_mutex_regs 0x26000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/ti-sysc.yaml b/Documentation/devicetree/bindings/bus/ti-sysc.yaml<br/>index bd40213302da..f089634f9466 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/ti-sysc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/ti-sysc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/ti-sysc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/ti-sysc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments interconnect target module binding</div><div class='add'>+title: Texas Instruments interconnect target module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='hunk'>@@ -35,7 +35,6 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - ti,sysc-omap2</div><div class='del'>-              - ti,sysc-omap2</div><div class='ctx'>               - ti,sysc-omap4</div><div class='ctx'>               - ti,sysc-omap4-simple</div><div class='ctx'>               - ti,sysc-omap2-timer</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/xlnx,versal-net-cdx.yaml b/Documentation/devicetree/bindings/bus/xlnx,versal-net-cdx.yaml<br/>new file mode 100644<br/>index 000000000000..7f62ffbdc245<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/xlnx,versal-net-cdx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/bus/xlnx,versal-net-cdx.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/bus/xlnx,versal-net-cdx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: AMD CDX bus controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CDX bus controller for AMD devices is implemented to dynamically</div><div class='add'>+  detect CDX bus and devices using the firmware.</div><div class='add'>+  The CDX bus manages multiple FPGA based hardware devices, which</div><div class='add'>+  can support network, crypto or any other specialized type of</div><div class='add'>+  devices. These FPGA based devices can be added/modified dynamically</div><div class='add'>+  on run-time.</div><div class='add'>+</div><div class='add'>+  All devices on the CDX bus will have a unique streamid (for IOMMU)</div><div class='add'>+  and a unique device ID (for MSI) corresponding to a requestor ID</div><div class='add'>+  (one to one associated with the device). The streamid and deviceid</div><div class='add'>+  are used to configure SMMU and GIC-ITS respectively.</div><div class='add'>+</div><div class='add'>+  iommu-map property is used to define the set of stream ids</div><div class='add'>+  corresponding to each device and the associated IOMMU.</div><div class='add'>+</div><div class='add'>+  The MSI writes are accompanied by sideband data (Device ID).</div><div class='add'>+  The msi-map property is used to associate the devices with the</div><div class='add'>+  device ID as well as the associated ITS controller.</div><div class='add'>+</div><div class='add'>+  rproc property (xlnx,rproc) is used to identify the remote processor</div><div class='add'>+  with which APU (Application Processor Unit) interacts to find out</div><div class='add'>+  the bus and device configuration.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nipun Gupta &lt;nipun.gupta@amd.com&gt;</div><div class='add'>+  - Nikhil Agarwal &lt;nikhil.agarwal@amd.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xlnx,versal-net-cdx</div><div class='add'>+</div><div class='add'>+  iommu-map: true</div><div class='add'>+</div><div class='add'>+  msi-map: true</div><div class='add'>+</div><div class='add'>+  xlnx,rproc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle to the remoteproc_r5 rproc node using which APU interacts</div><div class='add'>+      with remote processor.</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - iommu-map</div><div class='add'>+  - msi-map</div><div class='add'>+  - xlnx,rproc</div><div class='add'>+  - ranges</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cdx {</div><div class='add'>+        compatible = "xlnx,versal-net-cdx";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        /* define map for RIDs 250-259 */</div><div class='add'>+        iommu-map = &lt;250 &amp;smmu 250 10&gt;;</div><div class='add'>+        /* define msi map for RIDs 250-259 */</div><div class='add'>+        msi-map = &lt;250 &amp;its 250 10&gt;;</div><div class='add'>+        xlnx,rproc = &lt;&amp;remoteproc_r5&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml b/Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml<br/>index 1fca282f64a2..ec4f367bc0b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> # Copyright (C) 2020 BAIKAL ELECTRONICS, JSC</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/memory-controllers/baikal,bt1-l2-ctl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/cache/baikal,bt1-l2-ctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Baikal-T1 L2-cache Control Block</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt b/Documentation/devicetree/bindings/cache/freescale-l2cache.txt<br/>index 8a70696395a7..22ad012660e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/freescale-l2cache.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/freescale-l2cache.txt</a></div><div class='hunk'>@@ -6,12 +6,6 @@ The cache bindings explained below are Devicetree Specification compliant</div><div class='ctx'> Required Properties:</div><div class='ctx'> </div><div class='ctx'> - compatible	: Should include one of the following:</div><div class='del'>-		  "fsl,8540-l2-cache-controller"</div><div class='del'>-		  "fsl,8541-l2-cache-controller"</div><div class='del'>-		  "fsl,8544-l2-cache-controller"</div><div class='del'>-		  "fsl,8548-l2-cache-controller"</div><div class='del'>-		  "fsl,8555-l2-cache-controller"</div><div class='del'>-		  "fsl,8568-l2-cache-controller"</div><div class='ctx'> 		  "fsl,b4420-l2-cache-controller"</div><div class='ctx'> 		  "fsl,b4860-l2-cache-controller"</div><div class='ctx'> 		  "fsl,bsc9131-l2-cache-controller"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.yaml b/Documentation/devicetree/bindings/cache/l2c2x0.yaml<br/>index 6b8f4d4fa580..d7840a5c4037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/l2c2x0.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/l2c2x0.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/l2c2x0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/l2c2x0.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/arm/l2c2x0.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/cache/l2c2x0.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: ARM L2 Cache Controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt b/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt<br/>index 0d244b999d10..0d244b999d10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mrvl/feroceon.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt b/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt<br/>index 31af1cbb60bd..31af1cbb60bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/mrvl/tauros2.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml<br/>new file mode 100644<br/>index 000000000000..d8b91944180a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/qcom,llcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/qcom,llcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Last Level Cache Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,</div><div class='add'>+  that can be shared by multiple clients. Clients here are different cores in the</div><div class='add'>+  SoC, the idea is to minimize the local caches at the clients and migrate to</div><div class='add'>+  common pool of memory. Cache memory is divided into partitions called slices</div><div class='add'>+  which are assigned to clients. Clients can query the slice details, activate</div><div class='add'>+  and deactivate them.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc7180-llcc</div><div class='add'>+      - qcom,sc7280-llcc</div><div class='add'>+      - qcom,sc8180x-llcc</div><div class='add'>+      - qcom,sc8280xp-llcc</div><div class='add'>+      - qcom,sdm845-llcc</div><div class='add'>+      - qcom,sm6350-llcc</div><div class='add'>+      - qcom,sm7150-llcc</div><div class='add'>+      - qcom,sm8150-llcc</div><div class='add'>+      - qcom,sm8250-llcc</div><div class='add'>+      - qcom,sm8350-llcc</div><div class='add'>+      - qcom,sm8450-llcc</div><div class='add'>+      - qcom,sm8550-llcc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7180-llcc</div><div class='add'>+              - qcom,sm6350-llcc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: LLCC0 base register region</div><div class='add'>+            - description: LLCC broadcast base register region</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: llcc0_base</div><div class='add'>+            - const: llcc_broadcast_base</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7280-llcc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: LLCC0 base register region</div><div class='add'>+            - description: LLCC1 base register region</div><div class='add'>+            - description: LLCC broadcast base register region</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: llcc0_base</div><div class='add'>+            - const: llcc1_base</div><div class='add'>+            - const: llcc_broadcast_base</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8180x-llcc</div><div class='add'>+              - qcom,sc8280xp-llcc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: LLCC0 base register region</div><div class='add'>+            - description: LLCC1 base register region</div><div class='add'>+            - description: LLCC2 base register region</div><div class='add'>+            - description: LLCC3 base register region</div><div class='add'>+            - description: LLCC4 base register region</div><div class='add'>+            - description: LLCC5 base register region</div><div class='add'>+            - description: LLCC6 base register region</div><div class='add'>+            - description: LLCC7 base register region</div><div class='add'>+            - description: LLCC broadcast base register region</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: llcc0_base</div><div class='add'>+            - const: llcc1_base</div><div class='add'>+            - const: llcc2_base</div><div class='add'>+            - const: llcc3_base</div><div class='add'>+            - const: llcc4_base</div><div class='add'>+            - const: llcc5_base</div><div class='add'>+            - const: llcc6_base</div><div class='add'>+            - const: llcc7_base</div><div class='add'>+            - const: llcc_broadcast_base</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm845-llcc</div><div class='add'>+              - qcom,sm8150-llcc</div><div class='add'>+              - qcom,sm8250-llcc</div><div class='add'>+              - qcom,sm8350-llcc</div><div class='add'>+              - qcom,sm8450-llcc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: LLCC0 base register region</div><div class='add'>+            - description: LLCC1 base register region</div><div class='add'>+            - description: LLCC2 base register region</div><div class='add'>+            - description: LLCC3 base register region</div><div class='add'>+            - description: LLCC broadcast base register region</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: llcc0_base</div><div class='add'>+            - const: llcc1_base</div><div class='add'>+            - const: llcc2_base</div><div class='add'>+            - const: llcc3_base</div><div class='add'>+            - const: llcc_broadcast_base</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        system-cache-controller@1100000 {</div><div class='add'>+            compatible = "qcom,sdm845-llcc";</div><div class='add'>+            reg = &lt;0 0x01100000 0 0x50000&gt;, &lt;0 0x01180000 0 0x50000&gt;,</div><div class='add'>+                &lt;0 0x01200000 0 0x50000&gt;, &lt;0 0x01280000 0 0x50000&gt;,</div><div class='add'>+                &lt;0 0x01300000 0 0x50000&gt;;</div><div class='add'>+            reg-names = "llcc0_base", "llcc1_base", "llcc2_base",</div><div class='add'>+                "llcc3_base", "llcc_broadcast_base";</div><div class='add'>+            interrupts = &lt;GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml<br/>new file mode 100644<br/>index 000000000000..8a6a78e1a7ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/sifive,ccache0.yaml</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2020 SiFive, Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/cache/sifive,ccache0.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SiFive Composable Cache Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Walmsley &lt;paul.walmsley@sifive.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The SiFive Composable Cache Controller is used to provide access to fast copies</div><div class='add'>+  of memory for masters in a Core Complex. The Composable Cache Controller also</div><div class='add'>+  acts as directory-based coherency manager.</div><div class='add'>+  All the properties in ePAPR/DeviceTree specification applies for this platform.</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - sifive,ccache0</div><div class='add'>+          - sifive,fu540-c000-ccache</div><div class='add'>+          - sifive,fu740-c000-ccache</div><div class='add'>+</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sifive,ccache0</div><div class='add'>+              - sifive,fu540-c000-ccache</div><div class='add'>+              - sifive,fu740-c000-ccache</div><div class='add'>+          - const: cache</div><div class='add'>+      - items:</div><div class='add'>+          - const: starfive,jh7110-ccache</div><div class='add'>+          - const: sifive,ccache0</div><div class='add'>+          - const: cache</div><div class='add'>+      - items:</div><div class='add'>+          - const: microchip,mpfs-ccache</div><div class='add'>+          - const: sifive,fu540-c000-ccache</div><div class='add'>+          - const: cache</div><div class='add'>+</div><div class='add'>+  cache-block-size:</div><div class='add'>+    const: 64</div><div class='add'>+</div><div class='add'>+  cache-level:</div><div class='add'>+    enum: [2, 3]</div><div class='add'>+</div><div class='add'>+  cache-sets:</div><div class='add'>+    enum: [1024, 2048]</div><div class='add'>+</div><div class='add'>+  cache-size:</div><div class='add'>+    const: 2097152</div><div class='add'>+</div><div class='add'>+  cache-unified: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 3</div><div class='add'>+    items:</div><div class='add'>+      - description: DirError interrupt</div><div class='add'>+      - description: DataError interrupt</div><div class='add'>+      - description: DataFail interrupt</div><div class='add'>+      - description: DirFail interrupt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  next-level-cache: true</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+      The reference to the reserved-memory for the L2 Loosely Integrated Memory region.</div><div class='add'>+      The reserved memory node should be defined as per the bindings in reserved-memory.txt.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/cache-controller.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - sifive,fu740-c000-ccache</div><div class='add'>+              - starfive,jh7110-ccache</div><div class='add'>+              - microchip,mpfs-ccache</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          description: |</div><div class='add'>+            Must contain entries for DirError, DataError, DataFail, DirFail signals.</div><div class='add'>+          minItems: 4</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          description: |</div><div class='add'>+            Must contain entries for DirError, DataError and DataFail signals.</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - sifive,fu740-c000-ccache</div><div class='add'>+              - starfive,jh7110-ccache</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        cache-sets:</div><div class='add'>+          const: 2048</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        cache-sets:</div><div class='add'>+          const: 1024</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: sifive,ccache0</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        cache-level:</div><div class='add'>+          enum: [2, 3]</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        cache-level:</div><div class='add'>+          const: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - cache-block-size</div><div class='add'>+  - cache-level</div><div class='add'>+  - cache-sets</div><div class='add'>+  - cache-size</div><div class='add'>+  - cache-unified</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cache-controller@2010000 {</div><div class='add'>+        compatible = "sifive,fu540-c000-ccache", "cache";</div><div class='add'>+        cache-block-size = &lt;64&gt;;</div><div class='add'>+        cache-level = &lt;2&gt;;</div><div class='add'>+        cache-sets = &lt;1024&gt;;</div><div class='add'>+        cache-size = &lt;2097152&gt;;</div><div class='add'>+        cache-unified;</div><div class='add'>+        reg = &lt;0x2010000 0x1000&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;plic0&gt;;</div><div class='add'>+        interrupts = &lt;1&gt;,</div><div class='add'>+                     &lt;2&gt;,</div><div class='add'>+                     &lt;3&gt;;</div><div class='add'>+        next-level-cache = &lt;&amp;L25&gt;;</div><div class='add'>+        memory-region = &lt;&amp;l2_lim&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml b/Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml<br/>index 7ca5375f278f..3196263685a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/arm/socionext/socionext,uniphier-system-cache.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/cache/socionext,uniphier-system-cache.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: UniPhier outer cache controller</div><div class='hunk'>@@ -22,7 +22,6 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       should contain 3 regions: control register, revision register,</div><div class='ctx'>       operation register, in this order.</div><div class='del'>-    minItems: 3</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/chosen.txt b/Documentation/devicetree/bindings/chosen.txt<br/>deleted file mode 100644<br/>index 1cc3aa10dcb1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/chosen.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/chosen.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-The chosen node</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-The chosen node does not represent a real device, but serves as a place</div><div class='del'>-for passing data between firmware and the operating system, like boot</div><div class='del'>-arguments. Data in the chosen node does not represent the hardware.</div><div class='del'>-</div><div class='del'>-The following properties are recognized:</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-kaslr-seed</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-This property is used when booting with CONFIG_RANDOMIZE_BASE as the</div><div class='del'>-entropy used to randomize the kernel image base address location. Since</div><div class='del'>-it is used directly, this value is intended only for KASLR, and should</div><div class='del'>-not be used for other purposes (as it may leak information about KASLR</div><div class='del'>-offsets). It is parsed as a u64 value, e.g.</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	chosen {</div><div class='del'>-		kaslr-seed = &lt;0xfeedbeef 0xc0def00d&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Note that if this property is set from UEFI (or a bootloader in EFI</div><div class='del'>-mode) when EFI_RNG_PROTOCOL is supported, it will be overwritten by</div><div class='del'>-the Linux EFI stub (which will populate the property itself, using</div><div class='del'>-EFI_RNG_PROTOCOL).</div><div class='del'>-</div><div class='del'>-stdout-path</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-Device trees may specify the device to be used for boot console output</div><div class='del'>-with a stdout-path property under /chosen, as described in the Devicetree</div><div class='del'>-Specification, e.g.</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	chosen {</div><div class='del'>-		stdout-path = "/serial@f00:115200";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	serial@f00 {</div><div class='del'>-		compatible = "vendor,some-uart";</div><div class='del'>-		reg = &lt;0xf00 0x10&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-If the character ":" is present in the value, this terminates the path.</div><div class='del'>-The meaning of any characters following the ":" is device-specific, and</div><div class='del'>-must be specified in the relevant binding documentation.</div><div class='del'>-</div><div class='del'>-For UART devices, the preferred binding is a string in the form:</div><div class='del'>-</div><div class='del'>-	&lt;baud&gt;{&lt;parity&gt;{&lt;bits&gt;{&lt;flow&gt;}}}</div><div class='del'>-</div><div class='del'>-where</div><div class='del'>-</div><div class='del'>-	baud	- baud rate in decimal</div><div class='del'>-	parity	- 'n' (none), 'o', (odd) or 'e' (even)</div><div class='del'>-	bits	- number of data bits</div><div class='del'>-	flow	- 'r' (rts)</div><div class='del'>-</div><div class='del'>-For example: 115200n8r</div><div class='del'>-</div><div class='del'>-Implementation note: Linux will look for the property "linux,stdout-path" or</div><div class='del'>-on PowerPC "stdout" if "stdout-path" is not found.  However, the</div><div class='del'>-"linux,stdout-path" and "stdout" properties are deprecated. New platforms</div><div class='del'>-should only use the "stdout-path" property.</div><div class='del'>-</div><div class='del'>-linux,booted-from-kexec</div><div class='del'>------------------------</div><div class='del'>-</div><div class='del'>-This property is set (currently only on PowerPC, and only needed on</div><div class='del'>-book3e) by some versions of kexec-tools to tell the new kernel that it</div><div class='del'>-is being booted by kexec, as the booting environment may differ (e.g.</div><div class='del'>-a different secondary CPU release mechanism)</div><div class='del'>-</div><div class='del'>-linux,usable-memory-range</div><div class='del'>--------------------------</div><div class='del'>-</div><div class='del'>-This property holds a base address and size, describing a limited region in</div><div class='del'>-which memory may be considered available for use by the kernel. Memory outside</div><div class='del'>-of this range is not available for use.</div><div class='del'>-</div><div class='del'>-This property describes a limitation: memory within this range is only</div><div class='del'>-valid when also described through another mechanism that the kernel</div><div class='del'>-would otherwise use to determine available memory (e.g. memory nodes</div><div class='del'>-or the EFI memory map). Valid memory may be sparse within the range.</div><div class='del'>-e.g.</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	chosen {</div><div class='del'>-		linux,usable-memory-range = &lt;0x9 0xf0000000 0x0 0x10000000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-The main usage is for crash dump kernel to identify its own usable</div><div class='del'>-memory and exclude, at its boot time, any other memory areas that are</div><div class='del'>-part of the panicked kernel's memory.</div><div class='del'>-</div><div class='del'>-While this property does not represent a real hardware, the address</div><div class='del'>-and the size are expressed in #address-cells and #size-cells,</div><div class='del'>-respectively, of the root node.</div><div class='del'>-</div><div class='del'>-linux,elfcorehdr</div><div class='del'>-----------------</div><div class='del'>-</div><div class='del'>-This property holds the memory range, the address and the size, of the elf</div><div class='del'>-core header which mainly describes the panicked kernel's memory layout as</div><div class='del'>-PT_LOAD segments of elf format.</div><div class='del'>-e.g.</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	chosen {</div><div class='del'>-		linux,elfcorehdr = &lt;0x9 0xfffff000 0x0 0x800&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-While this property does not represent a real hardware, the address</div><div class='del'>-and the size are expressed in #address-cells and #size-cells,</div><div class='del'>-respectively, of the root node.</div><div class='del'>-</div><div class='del'>-linux,initrd-start and linux,initrd-end</div><div class='del'>----------------------------------------</div><div class='del'>-</div><div class='del'>-These properties hold the physical start and end address of an initrd that's</div><div class='del'>-loaded by the bootloader. Note that linux,initrd-start is inclusive, but</div><div class='del'>-linux,initrd-end is exclusive.</div><div class='del'>-e.g.</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	chosen {</div><div class='del'>-		linux,initrd-start = &lt;0x82000000&gt;;</div><div class='del'>-		linux,initrd-end = &lt;0x82800000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml<br/>index 2d98f7c4d3bc..3b0548c34791 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml</a></div><div class='hunk'>@@ -20,23 +20,35 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: google,cros-ec-typec</div><div class='ctx'> </div><div class='del'>-  connector:</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^connector@[0-9a-f]+$':</div><div class='ctx'>     $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='del'>-additionalProperties: true #fixme</div><div class='add'>+additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |+</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>       cros_ec: ec@0 {</div><div class='ctx'>         compatible = "google,cros-ec-spi";</div><div class='ctx'>         reg = &lt;0&gt;;</div><div class='add'>+        interrupts = &lt;35 0&gt;;</div><div class='ctx'> </div><div class='ctx'>         typec {</div><div class='ctx'>           compatible = "google,cros-ec-typec";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/chrome/google,cros-kbd-led-backlight.yaml b/Documentation/devicetree/bindings/chrome/google,cros-kbd-led-backlight.yaml<br/>new file mode 100644<br/>index 000000000000..c94ab8f9e0b8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/chrome/google,cros-kbd-led-backlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/chrome/google,cros-kbd-led-backlight.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/chrome/google,cros-kbd-led-backlight.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ChromeOS keyboard backlight LED driver.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tzung-Bi Shih &lt;tzungbi@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: google,cros-kbd-led-backlight</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      cros_ec: ec@0 {</div><div class='add'>+        compatible = "google,cros-ec-spi";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        interrupts = &lt;15 0&gt;;</div><div class='add'>+</div><div class='add'>+        kbd-led-backlight {</div><div class='add'>+          compatible = "google,cros-kbd-led-backlight";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml b/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml<br/>index 983033fe5b17..5e942bccf277 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/adi,axi-clkgen.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/adi,axi-clkgen.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for Analog Devices AXI clkgen pcore clock generator</div><div class='add'>+title: Analog Devices AXI clkgen pcore clock generator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml b/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml<br/>new file mode 100644<br/>index 000000000000..79b0752faa91<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/airoha,en7523-scu.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/airoha,en7523-scu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: EN7523 Clock</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+  - John Crispin &lt;nbd@nbd.name&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This node defines the System Control Unit of the EN7523 SoC,</div><div class='add'>+  a collection of registers configuring many different aspects of the SoC.</div><div class='add'>+</div><div class='add'>+  The clock driver uses it to read and configure settings of the</div><div class='add'>+  PLL controller, which provides clocks for the CPU, the bus and</div><div class='add'>+  other SoC internal peripherals.</div><div class='add'>+</div><div class='add'>+  Each clock is assigned an identifier and client nodes use this identifier</div><div class='add'>+  to specify which clock they consume.</div><div class='add'>+</div><div class='add'>+  All these identifiers can be found in:</div><div class='add'>+  [1]: &lt;include/dt-bindings/clock/en7523-clk.h&gt;.</div><div class='add'>+</div><div class='add'>+  The clocks are provided inside a system controller node.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: airoha,en7523-scu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    description:</div><div class='add'>+      The first cell indicates the clock number, see [1] for available</div><div class='add'>+      clocks.</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/en7523-clk.h&gt;</div><div class='add'>+    scu: system-controller@1fa20000 {</div><div class='add'>+      compatible = "airoha,en7523-scu";</div><div class='add'>+      reg = &lt;0x1fa20000 0x400&gt;,</div><div class='add'>+            &lt;0x1fb00000 0x1000&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml<br/>index 558db4b6ed17..93587b700476 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ahb-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ahb-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 AHB Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 AHB Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml<br/>index b1e3d739beb2..e14e1aad9fd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb0-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb0-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 APB0 Bus Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 APB0 Bus Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml<br/>index 51b7a6d4ea54..8a4747ebe0ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-apb1-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb1-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 APB1 Bus Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 APB1 Bus Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml<br/>index d801158e15de..aa08dd49dd61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-axi-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-axi-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 AXI Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 AXI Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml<br/>index 15ed64d35261..1690b9d99c3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner Clock Control Unit Device Tree Bindings</div><div class='add'>+title: Allwinner Clock Control Unit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml<br/>index 0dfafba1a168..08d073520cfa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-cpu-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-cpu-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 CPU Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 CPU Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml<br/>index 7484a7ab7dea..e665e50c1785 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-display-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-display-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Display Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Display Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml<br/>index 9a37a357cb4e..c4714d0fbe07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-gates-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Bus Gates Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Bus Gates Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml<br/>index 18f131e262b4..e824e33489b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mbus-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mbus-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 MBUS Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 MBUS Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml<br/>index 5199285a661a..c612f94befb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mmc-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mmc-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Module 1 Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Module 1 Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml<br/>index 3e2abe3e67c1..80ae3a7a588c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod0-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod0-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Module 0 Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Module 0 Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml<br/>index 7ddb55c75cff..4f9a8d44d42a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-mod1-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-mod1-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Module 1 Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Module 1 Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml<br/>index c604822cda07..52a7b6e7124c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-osc-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-osc-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Gatable Oscillator Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Gatable Oscillator Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml<br/>index e5d9d45dab8a..b13a1f21d5da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll1-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll1-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 CPU PLL Device Tree Bindings</div><div class='add'>+title: Allwinner A10 CPU PLL</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml<br/>index 4b80a42fb3da..418d207d23b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll3-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll3-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Video PLL Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Video PLL</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml<br/>index 415bd77de53d..76ef3f0c7f2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll5-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll5-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 DRAM PLL Device Tree Bindings</div><div class='add'>+title: Allwinner A10 DRAM PLL</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml<br/>index ec5652f76027..a94c93c90ece 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-pll6-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll6-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Peripheral PLL Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Peripheral PLL</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml<br/>index 0a335c615efd..6646b2a99fc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-tcon-ch0-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 TCON Channel 0 Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 TCON Channel 0 Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml<br/>index cd95d25bfe7c..5103b675e488 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-usb-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-usb-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 USB Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 USB Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml<br/>index 5dfd0c1c27b4..80337e38d6e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ve-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ve-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Video Engine Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Video Engine Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml<br/>index 99add7991c48..c6a6fbb6863b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun5i-a13-ahb-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun5i-a13-ahb-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A13 AHB Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A13 AHB Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml<br/>index 5f377205af71..7d6a6a34d20c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun6i-a31-pll6-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun6i-a31-pll6-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 Peripheral PLL Device Tree Bindings</div><div class='add'>+title: Allwinner A31 Peripheral PLL</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml<br/>index 59e5dce1b65a..b6202de35707 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-gmac-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A20 GMAC TX Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A20 GMAC TX Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml<br/>index c745733bcf04..fde7f7dc3d34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun7i-a20-out-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-out-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A20 Output Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A20 Output Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml<br/>index e79eeac5f086..70369bd633e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A83t Display Engine 2/3 Clock Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A83t Display Engine 2/3 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -28,6 +28,9 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: allwinner,sun8i-r40-de2-clk</div><div class='ctx'>           - const: allwinner,sun8i-h3-de2-clk</div><div class='add'>+      - items:</div><div class='add'>+          - const: allwinner,sun20i-d1-de2-clk</div><div class='add'>+          - const: allwinner,sun50i-h5-de2-clk</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml<br/>index 3eb2bf65b230..45b9e2c7c1d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun8i-h3-bus-gates-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun8i-h3-bus-gates-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Bus Gates Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Bus Gates Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml<br/>index d178da90aaec..f0f65af8ae22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-ahb-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-ahb-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 AHB Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A80 AHB Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml<br/>index 0351c79bd221..e9f9bc8f5794 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-apb0-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-apb0-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 APB0 Bus Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A80 APB0 Bus Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml<br/>index 24d5b2f1a314..c48db2d49340 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-cpus-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-cpus-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 CPUS Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A80 CPUS Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml<br/>index a82c7c7e942b..e9f81a343be1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-de-clks.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 Display Engine Clock Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A80 Display Engine Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml<br/>index 43963c3062c8..d3ce5eb18d4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-gt-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-gt-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 GT Bus Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A80 GT Bus Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml<br/>index 20dc115fa211..65ee5afe83cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-mmc-config-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-mmc-config-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 MMC Configuration Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A80 MMC Configuration Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml<br/>index b76bab6a30e9..261264a8aef6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-pll4-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-pll4-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 Peripheral PLL Device Tree Bindings</div><div class='add'>+title: Allwinner A80 Peripheral PLL</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml<br/>index 6532fb6821bc..515c15d5f661 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 USB Clock Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A80 USB Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml<br/>index 15218d10e78e..3f7b8d9511f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-mod-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-mod-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 USB Module Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A80 USB Module Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml<br/>index 2569041684e6..0d49072d47ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-phy-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-phy-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 USB PHY Clock Device Tree Bindings</div><div class='add'>+title: Allwinner A80 USB PHY Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml<br/>index 4b8669f870ec..d98d95d8e8c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/amlogic,meson8-ddr-clkc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/amlogic,meson8-ddr-clkc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Amlogic DDR Clock Controller Device Tree Bindings</div><div class='add'>+title: Amlogic DDR Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/apple,nco.yaml b/Documentation/devicetree/bindings/clock/apple,nco.yaml<br/>index 74eab5c0d24a..8b8411dc42f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/apple,nco.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/apple,nco.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/apple,nco.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/apple,nco.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,t6000-nco</div><div class='ctx'>           - apple,t8103-nco</div><div class='add'>+          - apple,t8112-nco</div><div class='ctx'>       - const: apple,nco</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml<br/>index 90eadf6869b2..b5533f81307c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml</a></div><div class='hunk'>@@ -81,11 +81,11 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   lock-offset:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: Offset to the unlocking register for the oscillator</div><div class='ctx'> </div><div class='ctx'>   vco-offset:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: Offset to the VCO register for the oscillator</div><div class='ctx'>     deprecated: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml b/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml<br/>index 08543ecbe35b..2d40df2d34df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/brcm,bcm2711-dvp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/brcm,bcm2711-dvp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM2711 HDMI DVP Device Tree Bindings</div><div class='add'>+title: Broadcom BCM2711 HDMI DVP</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml b/Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml<br/>new file mode 100644<br/>index 000000000000..199818b2fb6d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/brcm,bcm63268-timer-clocks.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom BCM63268 Timer Clock and Reset Device Tree Bindings</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: brcm,bcm63268-timer-clocks</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer_clk: clock-controller@100000ac {</div><div class='add'>+      compatible = "brcm,bcm63268-timer-clocks";</div><div class='add'>+      reg = &lt;0x100000ac 0x4&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/calxeda.yaml b/Documentation/devicetree/bindings/clock/calxeda.yaml<br/>index a34cbf3c9aaf..a88fbe20fef1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/calxeda.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/calxeda.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/calxeda.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/calxeda.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/calxeda.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device Tree Clock bindings for Calxeda highbank platform</div><div class='add'>+title: Calxeda highbank platform Clock Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This binding covers the Calxeda SoC internal peripheral and bus clocks</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml b/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml<br/>index 7f5cf4001f76..998e5cce652f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/canaan,k210-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Canaan Kendryte K210 Clock Device Tree Bindings</div><div class='add'>+title: Canaan Kendryte K210 Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml b/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml<br/>index 0abd6ba82dfd..d416c374e853 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/cirrus,cs2000-cp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/cirrus,cs2000-cp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding CIRRUS LOGIC Fractional-N Clock Synthesizer &amp; Clock Multiplier</div><div class='add'>+title: CIRRUS LOGIC Fractional-N Clock Synthesizer &amp; Clock Multiplier</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='hunk'>@@ -23,7 +23,6 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     description:</div><div class='ctx'>       Common clock binding for CLK_IN, XTI/REF_CLK</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt b/Documentation/devicetree/bindings/clock/clock-bindings.txt<br/>index f2ea53832ac6..6fe541368889 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/clock-bindings.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/clock-bindings.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/clock-bindings.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/clock-bindings.txt</a></div><div class='hunk'>@@ -1,186 +1,2 @@</div><div class='del'>-This binding is a work-in-progress, and are based on some experimental</div><div class='del'>-work by benh[1].</div><div class='del'>-</div><div class='del'>-Sources of clock signal can be represented by any node in the device</div><div class='del'>-tree.  Those nodes are designated as clock providers.  Clock consumer</div><div class='del'>-nodes use a phandle and clock specifier pair to connect clock provider</div><div class='del'>-outputs to clock inputs.  Similar to the gpio specifiers, a clock</div><div class='del'>-specifier is an array of zero, one or more cells identifying the clock</div><div class='del'>-output on a device.  The length of a clock specifier is defined by the</div><div class='del'>-value of a #clock-cells property in the clock provider node.</div><div class='del'>-</div><div class='del'>-[1] https://patchwork.ozlabs.org/patch/31551/</div><div class='del'>-</div><div class='del'>-==Clock providers==</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-#clock-cells:	   Number of cells in a clock specifier; Typically 0 for nodes</div><div class='del'>-		   with a single clock output and 1 for nodes with multiple</div><div class='del'>-		   clock outputs.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-clock-output-names: Recommended to be a list of strings of clock output signal</div><div class='del'>-		    names indexed by the first cell in the clock specifier.</div><div class='del'>-		    However, the meaning of clock-output-names is domain</div><div class='del'>-		    specific to the clock provider, and is only provided to</div><div class='del'>-		    encourage using the same meaning for the majority of clock</div><div class='del'>-		    providers.  This format may not work for clock providers</div><div class='del'>-		    using a complex clock specifier format.  In those cases it</div><div class='del'>-		    is recommended to omit this property and create a binding</div><div class='del'>-		    specific names property.</div><div class='del'>-</div><div class='del'>-		    Clock consumer nodes must never directly reference</div><div class='del'>-		    the provider's clock-output-names property.</div><div class='del'>-</div><div class='del'>-For example:</div><div class='del'>-</div><div class='del'>-    oscillator {</div><div class='del'>-        #clock-cells = &lt;1&gt;;</div><div class='del'>-        clock-output-names = "ckil", "ckih";</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-- this node defines a device with two clock outputs, the first named</div><div class='del'>-  "ckil" and the second named "ckih".  Consumer nodes always reference</div><div class='del'>-  clocks by index. The names should reflect the clock output signal</div><div class='del'>-  names for the device.</div><div class='del'>-</div><div class='del'>-clock-indices:	   If the identifying number for the clocks in the node</div><div class='del'>-		   is not linear from zero, then this allows the mapping of</div><div class='del'>-		   identifiers into the clock-output-names array.</div><div class='del'>-</div><div class='del'>-For example, if we have two clocks &lt;&amp;oscillator 1&gt; and &lt;&amp;oscillator 3&gt;:</div><div class='del'>-</div><div class='del'>-	oscillator {</div><div class='del'>-		compatible = "myclocktype";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-indices = &lt;1&gt;, &lt;3&gt;;</div><div class='del'>-		clock-output-names = "clka", "clkb";</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-	This ensures we do not have any empty strings in clock-output-names</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-==Clock consumers==</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-clocks:		List of phandle and clock specifier pairs, one pair</div><div class='del'>-		for each clock input to the device.  Note: if the</div><div class='del'>-		clock provider specifies '0' for #clock-cells, then</div><div class='del'>-		only the phandle portion of the pair will appear.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-clock-names:	List of clock input name strings sorted in the same</div><div class='del'>-		order as the clocks property.  Consumers drivers</div><div class='del'>-		will use clock-names to match clock input names</div><div class='del'>-		with clocks specifiers.</div><div class='del'>-clock-ranges:	Empty property indicating that child nodes can inherit named</div><div class='del'>-		clocks from this node. Useful for bus nodes to provide a</div><div class='del'>-		clock to their children.</div><div class='del'>-</div><div class='del'>-For example:</div><div class='del'>-</div><div class='del'>-    device {</div><div class='del'>-        clocks = &lt;&amp;osc 1&gt;, &lt;&amp;ref 0&gt;;</div><div class='del'>-        clock-names = "baud", "register";</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-This represents a device with two clock inputs, named "baud" and "register".</div><div class='del'>-The baud clock is connected to output 1 of the &amp;osc device, and the register</div><div class='del'>-clock is connected to output 0 of the &amp;ref.</div><div class='del'>-</div><div class='del'>-==Example==</div><div class='del'>-</div><div class='del'>-    /* external oscillator */</div><div class='del'>-    osc: oscillator {</div><div class='del'>-        compatible = "fixed-clock";</div><div class='del'>-        #clock-cells = &lt;0&gt;;</div><div class='del'>-        clock-frequency  = &lt;32678&gt;;</div><div class='del'>-        clock-output-names = "osc";</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-    /* phase-locked-loop device, generates a higher frequency clock</div><div class='del'>-     * from the external oscillator reference */</div><div class='del'>-    pll: pll@4c000 {</div><div class='del'>-        compatible = "vendor,some-pll-interface"</div><div class='del'>-        #clock-cells = &lt;1&gt;;</div><div class='del'>-        clocks = &lt;&amp;osc 0&gt;;</div><div class='del'>-        clock-names = "ref";</div><div class='del'>-        reg = &lt;0x4c000 0x1000&gt;;</div><div class='del'>-        clock-output-names = "pll", "pll-switched";</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-    /* UART, using the low frequency oscillator for the baud clock,</div><div class='del'>-     * and the high frequency switched PLL output for register</div><div class='del'>-     * clocking */</div><div class='del'>-    uart@a000 {</div><div class='del'>-        compatible = "fsl,imx-uart";</div><div class='del'>-        reg = &lt;0xa000 0x1000&gt;;</div><div class='del'>-        interrupts = &lt;33&gt;;</div><div class='del'>-        clocks = &lt;&amp;osc 0&gt;, &lt;&amp;pll 1&gt;;</div><div class='del'>-        clock-names = "baud", "register";</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-This DT fragment defines three devices: an external oscillator to provide a</div><div class='del'>-low-frequency reference clock, a PLL device to generate a higher frequency</div><div class='del'>-clock signal, and a UART.</div><div class='del'>-</div><div class='del'>-* The oscillator is fixed-frequency, and provides one clock output, named "osc".</div><div class='del'>-* The PLL is both a clock provider and a clock consumer. It uses the clock</div><div class='del'>-  signal generated by the external oscillator, and provides two output signals</div><div class='del'>-  ("pll" and "pll-switched").</div><div class='del'>-* The UART has its baud clock connected the external oscillator and its</div><div class='del'>-  register clock connected to the PLL clock (the "pll-switched" signal)</div><div class='del'>-</div><div class='del'>-==Assigned clock parents and rates==</div><div class='del'>-</div><div class='del'>-Some platforms may require initial configuration of default parent clocks</div><div class='del'>-and clock frequencies. Such a configuration can be specified in a device tree</div><div class='del'>-node through assigned-clocks, assigned-clock-parents and assigned-clock-rates</div><div class='del'>-properties. The assigned-clock-parents property should contain a list of parent</div><div class='del'>-clocks in the form of a phandle and clock specifier pair and the</div><div class='del'>-assigned-clock-rates property should contain a list of frequencies in Hz. Both</div><div class='del'>-these properties should correspond to the clocks listed in the assigned-clocks</div><div class='del'>-property.</div><div class='del'>-</div><div class='del'>-To skip setting parent or rate of a clock its corresponding entry should be</div><div class='del'>-set to 0, or can be omitted if it is not followed by any non-zero entry.</div><div class='del'>-</div><div class='del'>-    uart@a000 {</div><div class='del'>-        compatible = "fsl,imx-uart";</div><div class='del'>-        reg = &lt;0xa000 0x1000&gt;;</div><div class='del'>-        ...</div><div class='del'>-        clocks = &lt;&amp;osc 0&gt;, &lt;&amp;pll 1&gt;;</div><div class='del'>-        clock-names = "baud", "register";</div><div class='del'>-</div><div class='del'>-        assigned-clocks = &lt;&amp;clkcon 0&gt;, &lt;&amp;pll 2&gt;;</div><div class='del'>-        assigned-clock-parents = &lt;&amp;pll 2&gt;;</div><div class='del'>-        assigned-clock-rates = &lt;0&gt;, &lt;460800&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-In this example the &lt;&amp;pll 2&gt; clock is set as parent of clock &lt;&amp;clkcon 0&gt; and</div><div class='del'>-the &lt;&amp;pll 2&gt; clock is assigned a frequency value of 460800 Hz.</div><div class='del'>-</div><div class='del'>-Configuring a clock's parent and rate through the device node that consumes</div><div class='del'>-the clock can be done only for clocks that have a single user. Specifying</div><div class='del'>-conflicting parent or rate configuration in multiple consumer nodes for</div><div class='del'>-a shared clock is forbidden.</div><div class='del'>-</div><div class='del'>-Configuration of common clocks, which affect multiple consumer devices can</div><div class='del'>-be similarly specified in the clock provider node.</div><div class='del'>-</div><div class='del'>-==Protected clocks==</div><div class='del'>-</div><div class='del'>-Some platforms or firmwares may not fully expose all the clocks to the OS, such</div><div class='del'>-as in situations where those clks are used by drivers running in ARM secure</div><div class='del'>-execution levels. Such a configuration can be specified in device tree with the</div><div class='del'>-protected-clocks property in the form of a clock specifier list. This property should</div><div class='del'>-only be specified in the node that is providing the clocks being protected:</div><div class='del'>-</div><div class='del'>-   clock-controller@a000f000 {</div><div class='del'>-        compatible = "vendor,clk95;</div><div class='del'>-        reg = &lt;0xa000f000 0x1000&gt;</div><div class='del'>-        #clocks-cells = &lt;1&gt;;</div><div class='del'>-        ...</div><div class='del'>-        protected-clocks = &lt;UART3_CLK&gt;, &lt;SPI5_CLK&gt;;</div><div class='del'>-   };</div><div class='add'>+This file has moved to the clock binding schema:</div><div class='add'>+https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/efm32-clock.txt b/Documentation/devicetree/bindings/clock/efm32-clock.txt<br/>deleted file mode 100644<br/>index 263d293f6a10..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/efm32-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/efm32-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,11 +0,0 @@</div><div class='del'>-* Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "efm32gg,cmu"</div><div class='del'>-- reg: Base address and length of the register set</div><div class='del'>-- interrupts: Interrupt used by the CMU</div><div class='del'>-- #clock-cells: Should be &lt;1&gt;</div><div class='del'>-</div><div class='del'>-The clock consumer should specify the desired clock by having the clock ID in</div><div class='del'>-its "clocks" phandle cell. The header efm32-clk.h contains a list of available</div><div class='del'>-IDs.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/fixed-clock.yaml b/Documentation/devicetree/bindings/clock/fixed-clock.yaml<br/>index b657ecd0ef1c..b0a4fb8256e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fixed-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fixed-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/fixed-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for simple fixed-rate clock sources</div><div class='add'>+title: Simple fixed-rate clock sources</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Turquette &lt;mturquette@baylibre.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml b/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml<br/>index f415845b38dd..8f71ab300470 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/fixed-factor-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/fixed-factor-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for simple fixed factor rate clock sources</div><div class='add'>+title: Simple fixed factor rate clock sources</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Turquette &lt;mturquette@baylibre.com&gt;</div><div class='hunk'>@@ -13,7 +13,6 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='del'>-      - allwinner,sun4i-a10-pll3-2x-clk</div><div class='ctx'>       - fixed-factor-clock</div><div class='ctx'> </div><div class='ctx'>   "#clock-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml b/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml<br/>index 1453ac849a65..e22fc272d023 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/fixed-mmio-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/fixed-mmio-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for simple memory mapped IO fixed-rate clock sources</div><div class='add'>+title: Simple memory mapped IO fixed-rate clock sources</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This binding describes a fixed-rate clock for which the frequency can</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml b/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml<br/>new file mode 100644<br/>index 000000000000..bbd22e95b319<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/fsl,imx8m-anatop.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/fsl,imx8m-anatop.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX8M Family Anatop Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  NXP i.MX8M Family anatop PLL module which generates PLL to CCM root.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx8mm-anatop</div><div class='add'>+          - fsl,imx8mq-anatop</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mn-anatop</div><div class='add'>+              - fsl,imx8mp-anatop</div><div class='add'>+          - const: fsl,imx8mm-anatop</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    anatop: clock-controller@30360000 {</div><div class='add'>+        compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";</div><div class='add'>+        reg = &lt;0x30360000 0x10000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/fsl,plldig.yaml b/Documentation/devicetree/bindings/clock/fsl,plldig.yaml<br/>index 9ac716dfa602..88dd9c18db92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fsl,plldig.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fsl,plldig.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fsl,plldig.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/fsl,plldig.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/fsl,plldig.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock Binding</div><div class='add'>+title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Wen He &lt;wen.he_1@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml b/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml<br/>index fc3bdfdc091a..3bca9d11c148 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/fsl,sai-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/fsl,sai-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale SAI bitclock-as-a-clock binding</div><div class='add'>+title: Freescale SAI bitclock-as-a-clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Walle &lt;michael@walle.cc&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml<br/>new file mode 100644<br/>index 000000000000..36d4cfc3c2f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/fsl,scu-clk.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/fsl,scu-clk.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - Clock Controller Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Abel Vesa &lt;abel.vesa@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+  This binding uses the common clock binding.</div><div class='add'>+  (Documentation/devicetree/bindings/clock/clock-bindings.txt)</div><div class='add'>+  The clock consumer should specify the desired clock by having the clock</div><div class='add'>+  ID in its "clocks" phandle cell. See the full list of clock IDs from</div><div class='add'>+  include/dt-bindings/clock/imx8qxp-clock.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx8dxl-clk</div><div class='add'>+          - fsl,imx8qm-clk</div><div class='add'>+          - fsl,imx8qxp-clk</div><div class='add'>+      - const: fsl,scu-clk</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller {</div><div class='add'>+        compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";</div><div class='add'>+        #clock-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt b/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt<br/>deleted file mode 100644<br/>index d3379ff9b84b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/gpio-gate-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/gpio-gate-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-Binding for simple gpio gated clock.</div><div class='del'>-</div><div class='del'>-This binding uses the common clock binding[1].</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : shall be "gpio-gate-clock".</div><div class='del'>-- #clock-cells : from common clock binding; shall be set to 0.</div><div class='del'>-- enable-gpios : GPIO reference for enabling and disabling the clock.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks: Maximum of one parent clock is supported.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	clock {</div><div class='del'>-		compatible = "gpio-gate-clock";</div><div class='del'>-		clocks = &lt;&amp;parentclk&gt;;</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;gpio 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml b/Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml<br/>new file mode 100644<br/>index 000000000000..d09d0e3f0c6e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/gpio-gate-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Simple GPIO clock gate</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jyri Sarha &lt;jsarha@ti.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: gpio-gate-clock</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: GPIO reference for enabling and disabling the clock.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - enable-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    clock {</div><div class='add'>+        compatible = "gpio-gate-clock";</div><div class='add'>+        clocks = &lt;&amp;parentclk&gt;;</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+        enable-gpios = &lt;&amp;gpio 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml<br/>index be66f1e8b547..a2c6eea9871d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/idt,versaclock5.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/idt,versaclock5.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/idt,versaclock5.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for IDT VersaClock 5 and 6 programmable I2C clock generators</div><div class='add'>+title: IDT VersaClock 5 and 6 programmable I2C clock generators</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The IDT VersaClock 5 and VersaClock 6 are programmable I2C</div><div class='hunk'>@@ -45,7 +45,7 @@ description: |</div><div class='ctx'>   The case where SH and SP are both 1 is likely not very interesting.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Luca Ceresoli &lt;luca@lucaceresoli.net&gt;</div><div class='add'>+  - Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -54,8 +54,10 @@ properties:</div><div class='ctx'>       - idt,5p49v5925</div><div class='ctx'>       - idt,5p49v5933</div><div class='ctx'>       - idt,5p49v5935</div><div class='add'>+      - idt,5p49v60</div><div class='ctx'>       - idt,5p49v6901</div><div class='ctx'>       - idt,5p49v6965</div><div class='add'>+      - idt,5p49v6975</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description: I2C device address</div><div class='hunk'>@@ -108,7 +110,7 @@ patternProperties:</div><div class='ctx'>     properties:</div><div class='ctx'>       idt,mode:</div><div class='ctx'>         description:</div><div class='del'>-          The output drive mode. Values defined in dt-bindings/clk/versaclock.h</div><div class='add'>+          The output drive mode. Values defined in dt-bindings/clock/versaclock.h</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 6</div><div class='hunk'>@@ -134,6 +136,7 @@ allOf:</div><div class='ctx'>           enum:</div><div class='ctx'>             - idt,5p49v5933</div><div class='ctx'>             - idt,5p49v5935</div><div class='add'>+            - idt,5p49v6975</div><div class='ctx'>     then:</div><div class='ctx'>       # Devices with builtin crystal + optional external input</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -151,7 +154,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/clk/versaclock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/versaclock.h&gt;</div><div class='ctx'> </div><div class='ctx'>     /* 25MHz reference crystal */</div><div class='ctx'>     ref25: ref25m {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx1-clock.yaml b/Documentation/devicetree/bindings/clock/imx1-clock.yaml<br/>index 56f524780b1a..7ade4c32aff3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx1-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx1-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx1-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx1-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx1-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX1 CPUs</div><div class='add'>+title: Freescale i.MX1 CPUs Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexander Shiyan &lt;shc_work@mail.ru&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx21-clock.yaml b/Documentation/devicetree/bindings/clock/imx21-clock.yaml<br/>index e2d50544700a..79cc843703ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx21-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx21-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx21-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx21-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx21-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX21</div><div class='add'>+title: Freescale i.MX21 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexander Shiyan &lt;shc_work@mail.ru&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx23-clock.yaml b/Documentation/devicetree/bindings/clock/imx23-clock.yaml<br/>index 7e890ab9c77d..5e71c9219500 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx23-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx23-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx23-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx23-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx23-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX23</div><div class='add'>+title: Freescale i.MX23 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx25-clock.yaml b/Documentation/devicetree/bindings/clock/imx25-clock.yaml<br/>index 1792e138984b..c626a158590e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx25-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx25-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx25-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx25-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx25-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX25</div><div class='add'>+title: Freescale i.MX25 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sascha Hauer &lt;s.hauer@pengutronix.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx27-clock.yaml b/Documentation/devicetree/bindings/clock/imx27-clock.yaml<br/>index 99925aa22a4c..71d78a0b551f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx27-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx27-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx27-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx27-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx27-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX27</div><div class='add'>+title: Freescale i.MX27 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabio Estevam &lt;festevam@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx28-clock.yaml b/Documentation/devicetree/bindings/clock/imx28-clock.yaml<br/>index a542d680b1ca..4aaad7b9c66e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx28-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx28-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx28-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx28-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx28-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX28</div><div class='add'>+title: Freescale i.MX28 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx31-clock.yaml b/Documentation/devicetree/bindings/clock/imx31-clock.yaml<br/>index 168c8ada5e81..50a8498eef8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx31-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx31-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx31-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx31-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx31-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX31</div><div class='add'>+title: Freescale i.MX31 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabio Estevam &lt;festevam@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx35-clock.yaml b/Documentation/devicetree/bindings/clock/imx35-clock.yaml<br/>index 6415bb6a8d04..c063369de3ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx35-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx35-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx35-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx35-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx35-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX35</div><div class='add'>+title: Freescale i.MX35 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Steffen Trumtrar &lt;s.trumtrar@pengutronix.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx5-clock.yaml b/Documentation/devicetree/bindings/clock/imx5-clock.yaml<br/>index c0e19ff92c76..423c0142c1d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx5-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx5-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx5-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx5-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx5-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX5</div><div class='add'>+title: Freescale i.MX5 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabio Estevam &lt;festevam@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.yaml b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml<br/>index 4f4637eddb8b..bae4fcb3aacc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6q-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6q-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6q-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx6q-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx6q-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX6 Quad</div><div class='add'>+title: Freescale i.MX6 Quad Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml<br/>index b83c8f43d664..c85ff6ea3d24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6sl-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx6sl-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx6sl-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX6 SoloLite</div><div class='add'>+title: Freescale i.MX6 SoloLite Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml<br/>index 484894a4b23f..6b549ed1493c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6sll-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx6sll-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx6sll-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX6 SLL</div><div class='add'>+title: Freescale i.MX6 SLL Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml<br/>index e6c795657c24..55dcad18b7c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6sx-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx6sx-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx6sx-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX6 SoloX</div><div class='add'>+title: Freescale i.MX6 SoloX Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml b/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml<br/>index 6a51a3f51cd9..be54d4df5afa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx6ul-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx6ul-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx6ul-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX6 UltraLite</div><div class='add'>+title: Freescale i.MX6 UltraLite Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx7d-clock.yaml b/Documentation/devicetree/bindings/clock/imx7d-clock.yaml<br/>index cefb61db01a8..e7d8427e4957 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx7d-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx7d-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx7d-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx7d-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx7d-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX7 Dual</div><div class='add'>+title: Freescale i.MX7 Dual Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml b/Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml<br/>index 739c3378f8c8..76842038f52e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx7ulp-pcc-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx7ulp-pcc-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX7ULP Peripheral Clock Control (PCC) modules</div><div class='add'>+title: Freescale i.MX7ULP Peripheral Clock Control (PCC) modules Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - A.s. Dong &lt;aisheng.dong@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml b/Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml<br/>index d06344d7e34f..5e25bc6d1372 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx7ulp-scg-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx7ulp-scg-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MX7ULP System Clock Generation (SCG) modules</div><div class='add'>+title: Freescale i.MX7ULP System Clock Generation (SCG) modules Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - A.s. Dong &lt;aisheng.dong@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml<br/>index 625f573a7b90..0dbc1433fede 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8m-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8m-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8m-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx8m-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX8M Family Clock Control Module Binding</div><div class='add'>+title: NXP i.MX8M Family Clock Control Module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='hunk'>@@ -55,8 +55,6 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='del'>-          minItems: 7</div><div class='del'>-          maxItems: 7</div><div class='ctx'>           items:</div><div class='ctx'>             - description: 32k osc</div><div class='ctx'>             - description: 25m osc</div><div class='hunk'>@@ -66,8 +64,6 @@ allOf:</div><div class='ctx'>             - description: ext3 clock input</div><div class='ctx'>             - description: ext4 clock input</div><div class='ctx'>         clock-names:</div><div class='del'>-          minItems: 7</div><div class='del'>-          maxItems: 7</div><div class='ctx'>           items:</div><div class='ctx'>             - const: ckil</div><div class='ctx'>             - const: osc_25m</div><div class='hunk'>@@ -112,7 +108,7 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='del'>-    clock-controller@30390000 {</div><div class='add'>+    clock-controller@30380000 {</div><div class='ctx'>         compatible = "fsl,imx8mq-ccm";</div><div class='ctx'>         reg = &lt;0x30380000 0x10000&gt;;</div><div class='ctx'>         #clock-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml b/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml<br/>new file mode 100644<br/>index 000000000000..ff9600474df2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/imx8mp-audiomix.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX8MP AudioMIX Block Control Binding</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  NXP i.MX8M Plus AudioMIX is dedicated clock muxing and gating IP</div><div class='add'>+  used to control Audio related clock on the SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx8mp-audio-blk-ctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 7</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ahb</div><div class='add'>+      - const: sai1</div><div class='add'>+      - const: sai2</div><div class='add'>+      - const: sai3</div><div class='add'>+      - const: sai5</div><div class='add'>+      - const: sai6</div><div class='add'>+      - const: sai7</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      The clock consumer should specify the desired clock by having the clock</div><div class='add'>+      ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h</div><div class='add'>+      for the full list of i.MX8MP IMX8MP_CLK_AUDIOMIX_ clock IDs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Clock Control Module node:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    clock-controller@30e20000 {</div><div class='add'>+        compatible = "fsl,imx8mp-audio-blk-ctrl";</div><div class='add'>+        reg = &lt;0x30e20000 0x10000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MP_CLK_AUDIO_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_SAI1&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_SAI2&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_SAI3&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_SAI5&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_SAI6&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_SAI7&gt;;</div><div class='add'>+        clock-names = "ahb",</div><div class='add'>+                      "sai1", "sai2", "sai3",</div><div class='add'>+                      "sai5", "sai6", "sai7";</div><div class='add'>+        power-domains = &lt;&amp;pgc_audio&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml<br/>index cb80105b3c70..b207f95361b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings</div><div class='add'>+title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Aisheng Dong &lt;aisheng.dong@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml b/Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml<br/>index 71f7186b135b..68a60cdc19af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx8ulp-cgc-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx8ulp-cgc-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX8ULP Clock Generation &amp; Control(CGC) Module Binding</div><div class='add'>+title: NXP i.MX8ULP Clock Generation &amp; Control(CGC) Module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jacky Bai &lt;ping.bai@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml b/Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml<br/>index 00612725bf8b..d0b0792fe7ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx8ulp-pcc-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module Binding</div><div class='add'>+title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jacky Bai &lt;ping.bai@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imx93-clock.yaml b/Documentation/devicetree/bindings/clock/imx93-clock.yaml<br/>index 21a06194e4a3..ccb53c6b96c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx93-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imx93-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imx93-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imx93-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imx93-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX93 Clock Control Module Binding</div><div class='add'>+title: NXP i.MX93 Clock Control Module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml b/Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml<br/>index 03fc5c1a2939..777af4aad4b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/imxrt1050-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/imxrt1050-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for Freescale i.MXRT</div><div class='add'>+title: Freescale i.MXRT Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Giulio Benetti &lt;giulio.benetti@benettiengineering.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml b/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml<br/>index aa1df03ef4a6..9e733b10c392 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ingenic,cgu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ingenic,cgu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ingenic,cgu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/ingenic,cgu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs CGU devicetree bindings</div><div class='add'>+title: Ingenic SoCs CGU</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The CGU in an Ingenic SoC provides all the clocks generated on-chip. It</div><div class='hunk'>@@ -22,6 +22,7 @@ select:</div><div class='ctx'>         enum:</div><div class='ctx'>           - ingenic,jz4740-cgu</div><div class='ctx'>           - ingenic,jz4725b-cgu</div><div class='add'>+          - ingenic,jz4755-cgu</div><div class='ctx'>           - ingenic,jz4760-cgu</div><div class='ctx'>           - ingenic,jz4760b-cgu</div><div class='ctx'>           - ingenic,jz4770-cgu</div><div class='hunk'>@@ -51,6 +52,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - ingenic,jz4740-cgu</div><div class='ctx'>           - ingenic,jz4725b-cgu</div><div class='add'>+          - ingenic,jz4755-cgu</div><div class='ctx'>           - ingenic,jz4760-cgu</div><div class='ctx'>           - ingenic,jz4760b-cgu</div><div class='ctx'>           - ingenic,jz4770-cgu</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/intel,agilex.yaml b/Documentation/devicetree/bindings/clock/intel,agilex.yaml<br/>index cf5a9eb803e6..3745ba8dbd76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,agilex.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,agilex.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,agilex.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/intel,agilex.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/intel,agilex.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel SoCFPGA Agilex platform clock controller binding</div><div class='add'>+title: Intel SoCFPGA Agilex platform clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dinh Nguyen &lt;dinguyen@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml b/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml<br/>index f3e1a700a2ca..76609a390429 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/intel,cgu-lgm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Lightning Mountain SoC's Clock Controller(CGU) Binding</div><div class='add'>+title: Intel Lightning Mountain SoC's Clock Controller(CGU)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rahul Tanwar &lt;rahul.tanwar@linux.intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml b/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml<br/>index 8f45976e946e..e000116a51a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel SoCFPGA eASIC N5X platform clock controller binding</div><div class='add'>+title: Intel SoCFPGA eASIC N5X platform clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dinh Nguyen &lt;dinguyen@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/intel,stratix10.yaml b/Documentation/devicetree/bindings/clock/intel,stratix10.yaml<br/>index f506e3db9782..b4a8be213400 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,stratix10.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/intel,stratix10.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/intel,stratix10.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/intel,stratix10.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/intel,stratix10.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel SoCFPGA Stratix10 platform clock controller binding</div><div class='add'>+title: Intel SoCFPGA Stratix10 platform clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dinh Nguyen &lt;dinguyen@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/loongson,ls1x-clk.yaml b/Documentation/devicetree/bindings/clock/loongson,ls1x-clk.yaml<br/>new file mode 100644<br/>index 000000000000..01561a0f35d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/loongson,ls1x-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/loongson,ls1x-clk.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/loongson,ls1x-clk.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson-1 Clock Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - loongson,ls1b-clk</div><div class='add'>+      - loongson,ls1c-clk</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clkc: clock-controller@1fe78030 {</div><div class='add'>+        compatible = "loongson,ls1b-clk";</div><div class='add'>+        reg = &lt;0x1fe78030 0x8&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml b/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml<br/>new file mode 100644<br/>index 000000000000..63a59015987e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/loongson,ls2k-clk.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/loongson,ls2k-clk.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson-2 SoC Clock Control Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Loongson-2 SoC clock control module is an integrated clock controller, which</div><div class='add'>+  generates and supplies to all modules.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - loongson,ls2k-clk</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: 100m ref</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ref_100m</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      The clock consumer should specify the desired clock by having the clock</div><div class='add'>+      ID in its "clocks" phandle cell. See include/dt-bindings/clock/loongson,ls2k-clk.h</div><div class='add'>+      for the full list of Loongson-2 SoC clock IDs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ref_100m: clock-ref-100m {</div><div class='add'>+        compatible = "fixed-clock";</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+        clock-frequency = &lt;100000000&gt;;</div><div class='add'>+        clock-output-names = "ref_100m";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    clk: clock-controller@1fe00480 {</div><div class='add'>+        compatible = "loongson,ls2k-clk";</div><div class='add'>+        reg = &lt;0x1fe00480 0x58&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        clocks = &lt;&amp;ref_100m&gt;;</div><div class='add'>+        clock-names = "ref_100m";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml<br/>new file mode 100644<br/>index 000000000000..372c1d744bc2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,apmixedsys.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek AP Mixedsys Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Turquette &lt;mturquette@baylibre.com&gt;</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Mediatek apmixedsys controller provides PLLs to the system.</div><div class='add'>+  The clock values can be found in &lt;dt-bindings/clock/mt*-clk.h&gt;.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt6797-apmixedsys</div><div class='add'>+          - mediatek,mt7622-apmixedsys</div><div class='add'>+          - mediatek,mt7981-apmixedsys</div><div class='add'>+          - mediatek,mt7986-apmixedsys</div><div class='add'>+          - mediatek,mt8135-apmixedsys</div><div class='add'>+          - mediatek,mt8173-apmixedsys</div><div class='add'>+          - mediatek,mt8516-apmixedsys</div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt7623-apmixedsys</div><div class='add'>+          - const: mediatek,mt2701-apmixedsys</div><div class='add'>+          - const: syscon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2701-apmixedsys</div><div class='add'>+              - mediatek,mt2712-apmixedsys</div><div class='add'>+              - mediatek,mt6765-apmixedsys</div><div class='add'>+              - mediatek,mt6779-apmixedsys</div><div class='add'>+              - mediatek,mt6795-apmixedsys</div><div class='add'>+              - mediatek,mt7629-apmixedsys</div><div class='add'>+              - mediatek,mt8167-apmixedsys</div><div class='add'>+              - mediatek,mt8183-apmixedsys</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    apmixedsys: clock-controller@10209000 {</div><div class='add'>+        compatible = "mediatek,mt8173-apmixedsys";</div><div class='add'>+        reg = &lt;0x10209000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml<br/>new file mode 100644<br/>index 000000000000..04469eabc8fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt6795-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,mt6795-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Functional Clock Controller for MT6795</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+  - Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The clock architecture in MediaTek like below</div><div class='add'>+  PLLs --&gt;</div><div class='add'>+          dividers --&gt;</div><div class='add'>+                      muxes</div><div class='add'>+                           --&gt;</div><div class='add'>+                              clock gate</div><div class='add'>+</div><div class='add'>+  The devices provide clock gate control in different IP blocks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt6795-mfgcfg</div><div class='add'>+      - mediatek,mt6795-vdecsys</div><div class='add'>+      - mediatek,mt6795-vencsys</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        mfgcfg: clock-controller@13000000 {</div><div class='add'>+            compatible = "mediatek,mt6795-mfgcfg";</div><div class='add'>+            reg = &lt;0 0x13000000 0 0x1000&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        vdecsys: clock-controller@16000000 {</div><div class='add'>+            compatible = "mediatek,mt6795-vdecsys";</div><div class='add'>+            reg = &lt;0 0x16000000 0 0x1000&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        vencsys: clock-controller@18000000 {</div><div class='add'>+            compatible = "mediatek,mt6795-vencsys";</div><div class='add'>+            reg = &lt;0 0x18000000 0 0x1000&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml<br/>new file mode 100644<br/>index 000000000000..378b761237d3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt6795-sys-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek System Clock Controller for MT6795</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+  - Chun-Jie Chen &lt;chun-jie.chen@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Mediatek system clock controller provides various clocks and system</div><div class='add'>+  configuration like reset and bus protection on MT6795.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt6795-apmixedsys</div><div class='add'>+          - mediatek,mt6795-infracfg</div><div class='add'>+          - mediatek,mt6795-pericfg</div><div class='add'>+          - mediatek,mt6795-topckgen</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        topckgen: clock-controller@10000000 {</div><div class='add'>+            compatible = "mediatek,mt6795-topckgen", "syscon";</div><div class='add'>+            reg = &lt;0 0x10000000 0 0x1000&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml<br/>index 0c0b0ae5e2ac..b42f0f5c11b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt7621-sysc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MT7621 Clock Device Tree Bindings</div><div class='add'>+title: MT7621 Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8186-fhctl.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8186-fhctl.yaml<br/>new file mode 100644<br/>index 000000000000..d00327d12e1e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt8186-fhctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt8186-fhctl.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,mt8186-fhctl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek frequency hopping and spread spectrum clocking control</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Edward-JW Yang &lt;edward-jw.yang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Frequency hopping control (FHCTL) is a piece of hardware that control</div><div class='add'>+  some PLLs to adopt "hopping" mechanism to adjust their frequency.</div><div class='add'>+  Spread spectrum clocking (SSC) is another function provided by this hardware.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt6795-fhctl</div><div class='add'>+      - mediatek,mt8173-fhctl</div><div class='add'>+      - mediatek,mt8186-fhctl</div><div class='add'>+      - mediatek,mt8192-fhctl</div><div class='add'>+      - mediatek,mt8195-fhctl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Phandles of the PLL with FHCTL hardware capability.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 30</div><div class='add'>+</div><div class='add'>+  mediatek,hopping-ssc-percent:</div><div class='add'>+    description: The percentage of spread spectrum clocking for one PLL.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 30</div><div class='add'>+    items:</div><div class='add'>+      default: 0</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 8</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8186-clk.h&gt;</div><div class='add'>+    fhctl: fhctl@1000ce00 {</div><div class='add'>+        compatible = "mediatek,mt8186-fhctl";</div><div class='add'>+        reg = &lt;0x1000ce00 0x200&gt;;</div><div class='add'>+        clocks = &lt;&amp;apmixedsys CLK_APMIXED_MSDCPLL&gt;;</div><div class='add'>+        mediatek,hopping-ssc-percent = &lt;3&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml<br/>new file mode 100644<br/>index 000000000000..d7214d97b2ba<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt8188-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,mt8188-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Functional Clock Controller for MT8188</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Garmin Chang &lt;garmin.chang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The clock architecture in MediaTek like below</div><div class='add'>+  PLLs --&gt;</div><div class='add'>+          dividers --&gt;</div><div class='add'>+                      muxes</div><div class='add'>+                           --&gt;</div><div class='add'>+                              clock gate</div><div class='add'>+</div><div class='add'>+  The devices provide clock gate control in different IP blocks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8188-adsp-audio26m</div><div class='add'>+      - mediatek,mt8188-camsys</div><div class='add'>+      - mediatek,mt8188-camsys-rawa</div><div class='add'>+      - mediatek,mt8188-camsys-rawb</div><div class='add'>+      - mediatek,mt8188-camsys-yuva</div><div class='add'>+      - mediatek,mt8188-camsys-yuvb</div><div class='add'>+      - mediatek,mt8188-ccusys</div><div class='add'>+      - mediatek,mt8188-imgsys</div><div class='add'>+      - mediatek,mt8188-imgsys-wpe1</div><div class='add'>+      - mediatek,mt8188-imgsys-wpe2</div><div class='add'>+      - mediatek,mt8188-imgsys-wpe3</div><div class='add'>+      - mediatek,mt8188-imgsys1-dip-nr</div><div class='add'>+      - mediatek,mt8188-imgsys1-dip-top</div><div class='add'>+      - mediatek,mt8188-imp-iic-wrap-c</div><div class='add'>+      - mediatek,mt8188-imp-iic-wrap-en</div><div class='add'>+      - mediatek,mt8188-imp-iic-wrap-w</div><div class='add'>+      - mediatek,mt8188-ipesys</div><div class='add'>+      - mediatek,mt8188-mfgcfg</div><div class='add'>+      - mediatek,mt8188-vdecsys</div><div class='add'>+      - mediatek,mt8188-vdecsys-soc</div><div class='add'>+      - mediatek,mt8188-vencsys</div><div class='add'>+      - mediatek,mt8188-vppsys0</div><div class='add'>+      - mediatek,mt8188-vppsys1</div><div class='add'>+      - mediatek,mt8188-wpesys</div><div class='add'>+      - mediatek,mt8188-wpesys-vpp0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@11283000 {</div><div class='add'>+        compatible = "mediatek,mt8188-imp-iic-wrap-c";</div><div class='add'>+        reg = &lt;0x11283000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml<br/>new file mode 100644<br/>index 000000000000..4cf8d3af9803<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt8188-sys-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,mt8188-sys-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek System Clock Controller for MT8188</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Garmin Chang &lt;garmin.chang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The clock architecture in MediaTek like below</div><div class='add'>+  PLLs --&gt;</div><div class='add'>+          dividers --&gt;</div><div class='add'>+                      muxes</div><div class='add'>+                           --&gt;</div><div class='add'>+                              clock gate</div><div class='add'>+</div><div class='add'>+  The apmixedsys provides most of PLLs which generated from SoC 26m.</div><div class='add'>+  The topckgen provides dividers and muxes which provide the clock source to other IP blocks.</div><div class='add'>+  The infracfg_ao provides clock gate in peripheral and infrastructure IP blocks.</div><div class='add'>+  The mcusys provides mux control to select the clock source in AP MCU.</div><div class='add'>+  The device nodes also provide the system control capacity for configuration.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8188-apmixedsys</div><div class='add'>+          - mediatek,mt8188-infracfg-ao</div><div class='add'>+          - mediatek,mt8188-pericfg-ao</div><div class='add'>+          - mediatek,mt8188-topckgen</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@10000000 {</div><div class='add'>+        compatible = "mediatek,mt8188-topckgen", "syscon";</div><div class='add'>+        reg = &lt;0x10000000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml<br/>new file mode 100644<br/>index 000000000000..b327ecb4e524<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt8365-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,mt8365-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Functional Clock Controller for MT8365</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Markus Schneider-Pargmann &lt;msp@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8365-apu</div><div class='add'>+          - mediatek,mt8365-imgsys</div><div class='add'>+          - mediatek,mt8365-mfgcfg</div><div class='add'>+          - mediatek,mt8365-vdecsys</div><div class='add'>+          - mediatek,mt8365-vencsys</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    apu: clock-controller@19020000 {</div><div class='add'>+        compatible = "mediatek,mt8365-apu", "syscon";</div><div class='add'>+        reg = &lt;0x19020000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml<br/>new file mode 100644<br/>index 000000000000..643f84660c8e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,mt8365-sys-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,mt8365-sys-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek System Clock Controller for MT8365</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Markus Schneider-Pargmann &lt;msp@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The apmixedsys module provides most of PLLs which generated from SoC 26m.</div><div class='add'>+  The topckgen provides dividers and muxes which provides the clock source to other IP blocks.</div><div class='add'>+  The infracfg_ao and pericfg_ao provides clock gate in peripheral and infrastructure IP blocks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8365-topckgen</div><div class='add'>+          - mediatek,mt8365-infracfg</div><div class='add'>+          - mediatek,mt8365-apmixedsys</div><div class='add'>+          - mediatek,mt8365-pericfg</div><div class='add'>+          - mediatek,mt8365-mcucfg</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    topckgen: clock-controller@10000000 {</div><div class='add'>+        compatible = "mediatek,mt8365-topckgen", "syscon";</div><div class='add'>+        reg = &lt;0x10000000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml b/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml<br/>new file mode 100644<br/>index 000000000000..6d087ded7437<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/mediatek,topckgen.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/mediatek,topckgen.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Top Clock Generator Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Turquette &lt;mturquette@baylibre.com&gt;</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Mediatek topckgen controller provides various clocks to the system.</div><div class='add'>+  The clock values can be found in &lt;dt-bindings/clock/mt*-clk.h&gt;.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt6797-topckgen</div><div class='add'>+          - mediatek,mt7622-topckgen</div><div class='add'>+          - mediatek,mt8135-topckgen</div><div class='add'>+          - mediatek,mt8173-topckgen</div><div class='add'>+          - mediatek,mt8516-topckgen</div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt7623-topckgen</div><div class='add'>+          - const: mediatek,mt2701-topckgen</div><div class='add'>+          - const: syscon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2701-topckgen</div><div class='add'>+              - mediatek,mt2712-topckgen</div><div class='add'>+              - mediatek,mt6765-topckgen</div><div class='add'>+              - mediatek,mt6779-topckgen</div><div class='add'>+              - mediatek,mt6795-topckgen</div><div class='add'>+              - mediatek,mt7629-topckgen</div><div class='add'>+              - mediatek,mt7981-topckgen</div><div class='add'>+              - mediatek,mt7986-topckgen</div><div class='add'>+              - mediatek,mt8167-topckgen</div><div class='add'>+              - mediatek,mt8183-topckgen</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    topckgen: clock-controller@10000000 {</div><div class='add'>+        compatible = "mediatek,mt8173-topckgen";</div><div class='add'>+        reg = &lt;0x10000000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml<br/>new file mode 100644<br/>index 000000000000..f1770360798f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/microchip,mpfs-ccc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip PolarFire SoC Fabric Clock Conditioning Circuitry</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Conor Dooley &lt;conor.dooley@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Microchip PolarFire SoC has 4 Clock Conditioning Circuitry blocks. Each of</div><div class='add'>+  these blocks contains two PLLs and 2 DLLs &amp; are located in the four corners of</div><div class='add'>+  the FPGA. For more information see "PolarFire SoC FPGA Clocking Resources" at:</div><div class='add'>+  https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: microchip,mpfs-ccc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: PLL0's control registers</div><div class='add'>+      - description: PLL1's control registers</div><div class='add'>+      - description: DLL0's control registers</div><div class='add'>+      - description: DLL1's control registers</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      The CCC PLL's have two input clocks. It is required that even if the input</div><div class='add'>+      clocks are identical that both are provided.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: PLL0's refclk0</div><div class='add'>+      - description: PLL0's refclk1</div><div class='add'>+      - description: PLL1's refclk0</div><div class='add'>+      - description: PLL1's refclk1</div><div class='add'>+      - description: DLL0's refclk</div><div class='add'>+      - description: DLL1's refclk</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: pll0_ref0</div><div class='add'>+      - const: pll0_ref1</div><div class='add'>+      - const: pll1_ref0</div><div class='add'>+      - const: pll1_ref1</div><div class='add'>+      - const: dll0_ref</div><div class='add'>+      - const: dll1_ref</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description: |</div><div class='add'>+      The clock consumer should specify the desired clock by having the clock</div><div class='add'>+      ID in its "clocks" phandle cell.</div><div class='add'>+      See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of</div><div class='add'>+      PolarFire clock IDs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@38100000 {</div><div class='add'>+        compatible = "microchip,mpfs-ccc";</div><div class='add'>+        reg = &lt;0x38010000 0x1000&gt;, &lt;0x38020000 0x1000&gt;,</div><div class='add'>+              &lt;0x39010000 0x1000&gt;, &lt;0x39020000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        clocks = &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;,</div><div class='add'>+                  &lt;&amp;refclk_ccc&gt;, &lt;&amp;refclk_ccc&gt;;</div><div class='add'>+        clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",</div><div class='add'>+                      "dll0_ref", "dll1_ref";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml<br/>index 0c15afa2214c..e4e1c31267d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/microchip,mpfs.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/microchip,mpfs.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/clock/microchip,mpfs.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip PolarFire Clock Control Module Binding</div><div class='add'>+title: Microchip PolarFire Clock Control Module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daire McNamara &lt;daire.mcnamara@microchip.com&gt;</div><div class='hunk'>@@ -22,7 +22,16 @@ properties:</div><div class='ctx'>     const: microchip,mpfs-clkcfg</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: |</div><div class='add'>+          clock config registers:</div><div class='add'>+          These registers contain enable, reset &amp; divider tables for the, cpu,</div><div class='add'>+          axi, ahb and rtc/mtimer reference clocks as well as enable and reset</div><div class='add'>+          for the peripheral clocks.</div><div class='add'>+      - description: |</div><div class='add'>+          mss pll dri registers:</div><div class='add'>+          Block of registers responsible for dynamic reconfiguration of the mss</div><div class='add'>+          pll</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -31,8 +40,21 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'>     description: |</div><div class='ctx'>       The clock consumer should specify the desired clock by having the clock</div><div class='del'>-      ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h</div><div class='del'>-      for the full list of PolarFire clock IDs.</div><div class='add'>+      ID in its "clocks" phandle cell.</div><div class='add'>+      See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of</div><div class='add'>+      PolarFire clock IDs.</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    description:</div><div class='add'>+      The AHB/AXI peripherals on the PolarFire SoC have reset support, so from</div><div class='add'>+      CLK_ENVM to CLK_CFM. The reset consumer should specify the desired</div><div class='add'>+      peripheral via the clock ID in its "resets" phandle cell.</div><div class='add'>+      See include/dt-bindings/clock/microchip,mpfs-clock.h for the full list of</div><div class='add'>+      PolarFire clock IDs.</div><div class='add'>+    const: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -51,7 +73,7 @@ examples:</div><div class='ctx'>             #size-cells = &lt;2&gt;;</div><div class='ctx'>             clkcfg: clock-controller@20002000 {</div><div class='ctx'>                 compatible = "microchip,mpfs-clkcfg";</div><div class='del'>-                reg = &lt;0x0 0x20002000 0x0 0x1000&gt;;</div><div class='add'>+                reg = &lt;0x0 0x20002000 0x0 0x1000&gt;, &lt;0x0 0x3E001000 0x0 0x1000&gt;;</div><div class='ctx'>                 clocks = &lt;&amp;ref&gt;;</div><div class='ctx'>                 #clock-cells = &lt;1&gt;;</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml b/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml<br/>index 6d39344d2b70..0af1c569eb32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/milbeaut-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/milbeaut-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/milbeaut-clock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/milbeaut-clock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Milbeaut SoCs Clock Controller Binding</div><div class='add'>+title: Milbeaut SoCs Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taichi Sugaya &lt;sugaya.taichi@socionext.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml b/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml<br/>new file mode 100644<br/>index 000000000000..b901ca13cd25<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/nuvoton,npcm845-clk.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/nuvoton,npcm845-clk.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Nuvoton NPCM8XX Clock Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tomer Maimon &lt;tmaimon77@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Nuvoton Arbel BMC NPCM8XX contains an integrated clock controller, which</div><div class='add'>+  generates and supplies clocks to all modules within the BMC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nuvoton,npcm845-clk</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      See include/dt-bindings/clock/nuvoton,npcm8xx-clock.h for the full</div><div class='add'>+      list of NPCM8XX clock IDs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ahb {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller@f0801000 {</div><div class='add'>+            compatible = "nuvoton,npcm845-clk";</div><div class='add'>+            reg = &lt;0x0 0xf0801000 0x0 0x1000&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt<br/>index 958e0ad78c52..f7d347385b57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt</a></div><div class='hunk'>@@ -136,7 +136,7 @@ clock@70110000 {</div><div class='ctx'> };</div><div class='ctx'> </div><div class='ctx'> /* pinmux nodes added for completeness. Binding doc can be found in:</div><div class='del'>- * Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt</div><div class='add'>+ * Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml</div><div class='ctx'>  */</div><div class='ctx'> </div><div class='ctx'> pinmux: pinmux@700008d4 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/pwm-clock.txt b/Documentation/devicetree/bindings/clock/pwm-clock.txt<br/>deleted file mode 100644<br/>index 83db876b3b90..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/pwm-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/pwm-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Binding for an external clock signal driven by a PWM pin.</div><div class='del'>-</div><div class='del'>-This binding uses the common clock binding[1] and the common PWM binding[2].</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-[2] Documentation/devicetree/bindings/pwm/pwm.txt</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : shall be "pwm-clock".</div><div class='del'>-- #clock-cells : from common clock binding; shall be set to 0.</div><div class='del'>-- pwms : from common PWM binding; this determines the clock frequency</div><div class='del'>-  via the period given in the PWM specifier.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clock-output-names : From common clock binding.</div><div class='del'>-- clock-frequency : Exact output frequency, in case the PWM period</div><div class='del'>-  is not exact but was rounded to nanoseconds.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	clock {</div><div class='del'>-		compatible = "pwm-clock";</div><div class='del'>-		#clock-cells = &lt;0&gt;;</div><div class='del'>-		clock-frequency = &lt;25000000&gt;;</div><div class='del'>-		clock-output-names = "mipi_mclk";</div><div class='del'>-		pwms = &lt;&amp;pwm2 0 40&gt;; /* 1 / 40 ns = 25 MHz */</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/pwm-clock.yaml b/Documentation/devicetree/bindings/clock/pwm-clock.yaml<br/>new file mode 100644<br/>index 000000000000..f88ecb2995e0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/pwm-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/pwm-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/pwm-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: An external clock signal driven by a PWM pin.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pwm-clock</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: Exact output frequency, in case the PWM period is not exact</div><div class='add'>+      but was rounded to nanoseconds.</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  pwms:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - pwms</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock {</div><div class='add'>+        compatible = "pwm-clock";</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+        clock-frequency = &lt;25000000&gt;;</div><div class='add'>+        clock-output-names = "mipi_mclk";</div><div class='add'>+        pwms = &lt;&amp;pwm2 0 40&gt;; /* 1 / 40 ns = 25 MHz */</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml<br/>index fbd758470b88..659669bf224b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,a53pll.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,a53pll.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm A53 PLL Binding</div><div class='add'>+title: Qualcomm A53 PLL clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sivaprakash Murugesan &lt;sivaprak@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for</div><div class='hunk'>@@ -16,7 +16,9 @@ description:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - qcom,ipq5332-a53pll</div><div class='ctx'>       - qcom,ipq6018-a53pll</div><div class='add'>+      - qcom,ipq8074-a53pll</div><div class='ctx'>       - qcom,msm8916-a53pll</div><div class='ctx'>       - qcom,msm8939-a53pll</div><div class='ctx'> </div><div class='hunk'>@@ -44,14 +46,14 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='del'>-  #Example 1 - A53 PLL found on MSM8916 devices</div><div class='add'>+  # Example 1 - A53 PLL found on MSM8916 devices</div><div class='ctx'>   - |</div><div class='ctx'>     a53pll: clock@b016000 {</div><div class='ctx'>         compatible = "qcom,msm8916-a53pll";</div><div class='ctx'>         reg = &lt;0xb016000 0x40&gt;;</div><div class='ctx'>         #clock-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='del'>-  #Example 2 - A53 PLL found on IPQ6018 devices</div><div class='add'>+  # Example 2 - A53 PLL found on IPQ6018 devices</div><div class='ctx'>   - |</div><div class='ctx'>     a53pll_ipq: clock-controller@b116000 {</div><div class='ctx'>         compatible = "qcom,ipq6018-a53pll";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml<br/>index 0e96f693b050..809c34eb7d5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,a7pll.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,a7pll.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm A7 PLL Binding</div><div class='add'>+title: Qualcomm A7 PLL clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml<br/>index c40a74b5d672..8b8932bd5a92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs</div><div class='add'>+title: LPASS Always ON Clock Controller on SM8250 SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -17,7 +17,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,sm8250-lpass-aon</div><div class='add'>+    const: qcom,sm8250-lpass-aoncc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -28,11 +28,13 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: LPASS Core voting clock</div><div class='add'>+      - description: LPASS Audio codec voting clock</div><div class='ctx'>       - description: Glitch Free Mux register clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: core</div><div class='add'>+      - const: audio</div><div class='ctx'>       - const: bus</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -50,9 +52,10 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='ctx'>     clock-controller@3800000 {</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='del'>-      compatible = "qcom,sm8250-lpass-aon";</div><div class='add'>+      compatible = "qcom,sm8250-lpass-aoncc";</div><div class='ctx'>       reg = &lt;0x03380000 0x40000&gt;;</div><div class='ctx'>       clocks = &lt;&amp;q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+               &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='ctx'>                &lt;&amp;q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='del'>-      clock-names = "core", "bus";</div><div class='add'>+      clock-names = "core", "audio", "bus";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml<br/>index 915d76206ad0..cfca888f6014 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs</div><div class='add'>+title: LPASS Audio Clock Controller on SM8250 SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -28,11 +28,13 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: LPASS Core voting clock</div><div class='add'>+      - description: LPASS Audio codec voting clock</div><div class='ctx'>       - description: Glitch Free Mux register clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: core</div><div class='add'>+      - const: audio</div><div class='ctx'>       - const: bus</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -53,6 +55,7 @@ examples:</div><div class='ctx'>       compatible = "qcom,sm8250-lpass-audiocc";</div><div class='ctx'>       reg = &lt;0x03300000 0x30000&gt;;</div><div class='ctx'>       clocks = &lt;&amp;q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+               &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='ctx'>                &lt;&amp;q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='del'>-      clock-names = "core", "bus";</div><div class='add'>+      clock-names = "core", "audio", "bus";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml<br/>index 9f239c3960d1..426335a2841c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Camera Clock &amp; Reset Controller Binding for SM8250</div><div class='add'>+title: Qualcomm Camera Clock &amp; Reset Controller on SM8250</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Marek &lt;jonathan@marek.ca&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm camera clock control module which supports the clocks, resets and</div><div class='add'>+  Qualcomm camera clock control module provides the clocks, resets and</div><div class='ctx'>   power domains on SM8250.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,camcc-sm8250.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -21,12 +21,16 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='add'>+      - description: AHB</div><div class='ctx'>       - description: Board XO source</div><div class='add'>+      - description: Board active XO source</div><div class='ctx'>       - description: Sleep clock source</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='add'>+      - const: iface</div><div class='ctx'>       - const: bi_tcxo</div><div class='add'>+      - const: bi_tcxo_ao</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='ctx'>   '#clock-cells':</div><div class='hunk'>@@ -38,9 +42,18 @@ properties:</div><div class='ctx'>   '#power-domain-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: MMCX power domain</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  required-opps:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      OPP node describing required MMCX performance point.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -54,13 +67,16 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'>     clock-controller@ad00000 {</div><div class='ctx'>       compatible = "qcom,sm8250-camcc";</div><div class='ctx'>       reg = &lt;0x0ad00000 0x10000&gt;;</div><div class='del'>-      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_CAMERA_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='ctx'>                &lt;&amp;sleep_clk&gt;;</div><div class='del'>-      clock-names = "bi_tcxo", "sleep_clk";</div><div class='add'>+      clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk";</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='ctx'>       #power-domain-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml<br/>new file mode 100644<br/>index 000000000000..3cb996b2c9d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,dispcc-sc8280xp.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,dispcc-sc8280xp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on SC8280XP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm display clock control module which supports the clocks, resets and</div><div class='add'>+  power domains for the two MDSS instances on SC8280XP.</div><div class='add'>+</div><div class='add'>+  See also:</div><div class='add'>+    include/dt-bindings/clock/qcom,dispcc-sc8280xp.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc8280xp-dispcc0</div><div class='add'>+      - qcom,sc8280xp-dispcc1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: AHB interface clock,</div><div class='add'>+      - description: SoC CXO clock</div><div class='add'>+      - description: SoC sleep clock</div><div class='add'>+      - description: DisplayPort 0 link clock</div><div class='add'>+      - description: DisplayPort 0 VCO div clock</div><div class='add'>+      - description: DisplayPort 1 link clock</div><div class='add'>+      - description: DisplayPort 1 VCO div clock</div><div class='add'>+      - description: DisplayPort 2 link clock</div><div class='add'>+      - description: DisplayPort 2 VCO div clock</div><div class='add'>+      - description: DisplayPort 3 link clock</div><div class='add'>+      - description: DisplayPort 3 VCO div clock</div><div class='add'>+      - description: DSI 0 PLL byte clock</div><div class='add'>+      - description: DSI 0 PLL DSI clock</div><div class='add'>+      - description: DSI 1 PLL byte clock</div><div class='add'>+      - description: DSI 1 PLL DSI clock</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: MMCX power domain</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    clock-controller@af00000 {</div><div class='add'>+      compatible = "qcom,sc8280xp-dispcc0";</div><div class='add'>+      reg = &lt;0x0af00000 0x20000&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy0 0&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy0 1&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy1 0&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy1 1&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy2 0&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy2 1&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy3 0&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dp_phy3 1&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dsi0_phy 0&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dsi0_phy 1&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dsi1_phy 0&gt;,</div><div class='add'>+               &lt;&amp;mdss0_dsi1_phy 1&gt;;</div><div class='add'>+      power-domains = &lt;&amp;rpmhpd SC8280XP_MMCX&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml<br/>index 7a03ef19c947..8a210c4c5f82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6125.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Display Clock Controller Binding for SM6125</div><div class='add'>+title: Qualcomm Display Clock Controller on SM6125</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Martin Botka &lt;martin.botka@somainline.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm display clock control module which supports the clocks and</div><div class='del'>-  power domains on SM6125.</div><div class='add'>+  Qualcomm display clock control module provides the clocks and power domains</div><div class='add'>+  on SM6125.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-    dt-bindings/clock/qcom,dispcc-sm6125.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,dispcc-sm6125.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml<br/>index e706678b353a..8efac3fb159f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6350.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Display Clock &amp; Reset Controller Binding for SM6350</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on SM6350</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm display clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM6350.</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM6350.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,dispcc-sm6350.h.</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,dispcc-sm6350.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml<br/>index 31497677e8de..d6774db257f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml</a></div><div class='hunk'>@@ -4,18 +4,19 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Display Clock &amp; Reset Controller Binding for SM8150/SM8250</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on SM8150/SM8250/SM8350</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Marek &lt;jonathan@marek.ca&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm display clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM8150 and SM8250.</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8150/SM8250/SM8350.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-    dt-bindings/clock/qcom,dispcc-sm8150.h</div><div class='del'>-    dt-bindings/clock/qcom,dispcc-sm8250.h</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,dispcc-sm8150.h</div><div class='add'>+    include/dt-bindings/clock/qcom,dispcc-sm8250.h</div><div class='add'>+    include/dt-bindings/clock/qcom,dispcc-sm8350.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -23,6 +24,7 @@ properties:</div><div class='ctx'>       - qcom,sc8180x-dispcc</div><div class='ctx'>       - qcom,sm8150-dispcc</div><div class='ctx'>       - qcom,sm8250-dispcc</div><div class='add'>+      - qcom,sm8350-dispcc</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml<br/>index 97936411b6b4..09cd7a786871 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml</a></div><div class='hunk'>@@ -4,32 +4,53 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for APQ8064</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: qcom,gcc.yaml#</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on APQ8064/MSM8960</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on APQ8064.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on APQ8064.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8960.h</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-msm8960.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-apq8084.h</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-apq8084.h</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8960.h</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-msm8960.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,gcc-apq8084</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,gcc-apq8064</div><div class='add'>+              - qcom,gcc-msm8960</div><div class='add'>+          - const: syscon</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,gcc-apq8064</div><div class='add'>+          - qcom,gcc-msm8960</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  thermal-sensor:</div><div class='add'>+    description: child tsens device</div><div class='add'>+    $ref: /schemas/thermal/qcom-tsens.yaml#</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cxo</div><div class='add'>+      - const: pxo</div><div class='add'>+      - const: pll4</div><div class='ctx'> </div><div class='ctx'>   nvmem-cells:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='add'>+    deprecated: true</div><div class='ctx'>     description:</div><div class='ctx'>       Qualcomm TSENS (thermal sensor device) on some devices can</div><div class='ctx'>       be part of GCC and hence the TSENS properties can also be part</div><div class='hunk'>@@ -39,31 +60,39 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   nvmem-cell-names:</div><div class='ctx'>     minItems: 1</div><div class='add'>+    deprecated: true</div><div class='ctx'>     items:</div><div class='ctx'>       - const: calib</div><div class='ctx'>       - const: calib_backup</div><div class='ctx'> </div><div class='ctx'>   '#thermal-sensor-cells':</div><div class='ctx'>     const: 1</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - nvmem-cells</div><div class='del'>-  - nvmem-cell-names</div><div class='del'>-  - '#thermal-sensor-cells'</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     clock-controller@900000 {</div><div class='del'>-      compatible = "qcom,gcc-apq8064";</div><div class='add'>+      compatible = "qcom,gcc-apq8064", "syscon";</div><div class='ctx'>       reg = &lt;0x00900000 0x4000&gt;;</div><div class='del'>-      nvmem-cells = &lt;&amp;tsens_calib&gt;, &lt;&amp;tsens_backup&gt;;</div><div class='del'>-      nvmem-cell-names = "calib", "calib_backup";</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='ctx'>       #power-domain-cells = &lt;1&gt;;</div><div class='del'>-      #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+      thermal-sensor {</div><div class='add'>+        compatible = "qcom,msm8960-tsens";</div><div class='add'>+</div><div class='add'>+        nvmem-cells = &lt;&amp;tsens_calib&gt;, &lt;&amp;tsens_backup&gt;;</div><div class='add'>+        nvmem-cell-names = "calib", "calib_backup";</div><div class='add'>+        interrupts = &lt;0 178 4&gt;;</div><div class='add'>+        interrupt-names = "uplow";</div><div class='add'>+</div><div class='add'>+        #qcom,sensors = &lt;11&gt;;</div><div class='add'>+        #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+      };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml<br/>new file mode 100644<br/>index 000000000000..d84608269080<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8084.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on APQ8084</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+  - Taniya Das &lt;quic_tdas@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on APQ8084.</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-apq8084.h</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-apq8084.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,gcc-apq8084</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: UFS RX symbol 0 clock</div><div class='add'>+      - description: UFS RX symbol 1 clock</div><div class='add'>+      - description: UFS TX symbol 0 clock</div><div class='add'>+      - description: UFS TX symbol 1 clock</div><div class='add'>+      - description: SATA ASIC0 clock</div><div class='add'>+      - description: SATA RX clock</div><div class='add'>+      - description: PCIe PIPE clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sleep_clk</div><div class='add'>+      - const: ufs_rx_symbol_0_clk_src</div><div class='add'>+      - const: ufs_rx_symbol_1_clk_src</div><div class='add'>+      - const: ufs_tx_symbol_0_clk_src</div><div class='add'>+      - const: ufs_tx_symbol_1_clk_src</div><div class='add'>+      - const: sata_asic0_clk</div><div class='add'>+      - const: sata_rx_clk</div><div class='add'>+      - const: pcie_pipe</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    /* UFS PHY on APQ8084 is not supported (yet), so these bindings just serve an example */</div><div class='add'>+    clock-controller@fc400000 {</div><div class='add'>+        compatible = "qcom,gcc-apq8084";</div><div class='add'>+        reg = &lt;0xfc400000 0x4000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+                 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+                 &lt;&amp;ufsphy 0&gt;,</div><div class='add'>+                 &lt;&amp;ufsphy 1&gt;,</div><div class='add'>+                 &lt;&amp;ufsphy 2&gt;,</div><div class='add'>+                 &lt;&amp;ufsphy 3&gt;,</div><div class='add'>+                 &lt;&amp;sata 0&gt;,</div><div class='add'>+                 &lt;&amp;sata 1&gt;,</div><div class='add'>+                 &lt;&amp;pcie_phy&gt;;</div><div class='add'>+        clock-names = "xo",</div><div class='add'>+                      "sleep_clk",</div><div class='add'>+                      "ufs_rx_symbol_0_clk_src",</div><div class='add'>+                      "ufs_rx_symbol_1_clk_src",</div><div class='add'>+                      "ufs_tx_symbol_0_clk_src",</div><div class='add'>+                      "ufs_tx_symbol_1_clk_src",</div><div class='add'>+                      "sata_asic0_clk",</div><div class='add'>+                      "sata_rx_clk",</div><div class='add'>+                      "pcie_pipe";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml<br/>new file mode 100644<br/>index 000000000000..6ebaef2288fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq4019.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq4019.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on IPQ4019</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+  - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='add'>+  - Robert Marko &lt;robert.markoo@sartura.hr&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on IPQ4019.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-ipq4019.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,gcc-ipq4019</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: board XO clock</div><div class='add'>+      - description: sleep clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sleep_clk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@1800000 {</div><div class='add'>+      compatible = "qcom,gcc-ipq4019";</div><div class='add'>+      reg = &lt;0x1800000 0x60000&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      clocks = &lt;&amp;xo&gt;, &lt;&amp;sleep_clk&gt;;</div><div class='add'>+      clock-names = "xo", "sleep_clk";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml<br/>index 9eb91dd22557..93f3084b97c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml</a></div><div class='hunk'>@@ -4,21 +4,21 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for IPQ8064</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: qcom,gcc.yaml#</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on IPQ8064</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ansuel Smith &lt;ansuelsmth@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on IPQ8064.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on IPQ8064.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -27,14 +27,18 @@ properties:</div><div class='ctx'>       - const: syscon</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 2</div><div class='ctx'>     items:</div><div class='ctx'>       - description: PXO source</div><div class='ctx'>       - description: CXO source</div><div class='add'>+      - description: PLL4 from LCC</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 2</div><div class='ctx'>     items:</div><div class='ctx'>       - const: pxo</div><div class='ctx'>       - const: cxo</div><div class='add'>+      - const: pll4</div><div class='ctx'> </div><div class='ctx'>   thermal-sensor:</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -51,13 +55,14 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lcc-ipq806x.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     gcc: clock-controller@900000 {</div><div class='ctx'>       compatible = "qcom,gcc-ipq8064", "syscon";</div><div class='ctx'>       reg = &lt;0x00900000 0x4000&gt;;</div><div class='del'>-      clocks = &lt;&amp;pxo_board&gt;, &lt;&amp;cxo_board&gt;;</div><div class='del'>-      clock-names = "pxo", "cxo";</div><div class='add'>+      clocks = &lt;&amp;pxo_board&gt;, &lt;&amp;cxo_board&gt;, &lt;&amp;lcc PLL4&gt;;</div><div class='add'>+      clock-names = "pxo", "cxo", "pll4";</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='ctx'>       #power-domain-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml<br/>index 98572b4a9b60..deef398a9872 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml</a></div><div class='hunk'>@@ -4,43 +4,39 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Bindingfor IPQ8074</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on IPQ8074</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on IPQ8074.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on IPQ8074.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-ipq8074.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-ipq8074.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,gcc-ipq8074</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: board XO clock</div><div class='add'>+      - description: sleep clock</div><div class='ctx'> </div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sleep_clk</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -48,6 +44,7 @@ examples:</div><div class='ctx'>       compatible = "qcom,gcc-ipq8074";</div><div class='ctx'>       reg = &lt;0x01800000 0x80000&gt;;</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml<br/>new file mode 100644<br/>index 000000000000..c9e985548621<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8660</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+  - Taniya Das &lt;quic_tdas@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks and resets on</div><div class='add'>+  MSM8660</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8660.h</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-msm8660.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,gcc-msm8660</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pxo</div><div class='add'>+      - const: cxo</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Example for GCC for MSM8974:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@900000 {</div><div class='add'>+      compatible = "qcom,gcc-msm8660";</div><div class='add'>+      reg = &lt;0x900000 0x4000&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      clocks = &lt;&amp;pxo_board&gt;, &lt;&amp;cxo_board&gt;;</div><div class='add'>+      clock-names = "pxo", "cxo";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml<br/>new file mode 100644<br/>index 000000000000..b91462587df5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8909.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8909, MSM8917 and QM215</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephan Gerhold &lt;stephan@gerhold.net&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on MSM8909, MSM8917 or QM215.</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8909.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8917.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,gcc-msm8909</div><div class='add'>+      - qcom,gcc-msm8917</div><div class='add'>+      - qcom,gcc-qm215</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: DSI phy instance 0 dsi clock</div><div class='add'>+      - description: DSI phy instance 0 byte clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sleep_clk</div><div class='add'>+      - const: dsi0pll</div><div class='add'>+      - const: dsi0pllbyte</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gcc: clock-controller@1800000 {</div><div class='add'>+      compatible = "qcom,gcc-msm8909";</div><div class='add'>+      reg = &lt;0x01800000 0x80000&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      clocks = &lt;&amp;xo_board&gt;, &lt;&amp;sleep_clk&gt;, &lt;&amp;dsi0_phy 1&gt;, &lt;&amp;dsi0_phy 0&gt;;</div><div class='add'>+      clock-names = "xo", "sleep_clk", "dsi0pll", "dsi0pllbyte";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml<br/>new file mode 100644<br/>index 000000000000..ad84c0f7680b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8916 and MSM8939</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+  - Taniya Das &lt;quic_tdas@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on MSM8916 or MSM8939.</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8916.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8939.h</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-msm8916.h</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-msm8939.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,gcc-msm8916</div><div class='add'>+      - qcom,gcc-msm8939</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: DSI phy instance 0 dsi clock</div><div class='add'>+      - description: DSI phy instance 0 byte clock</div><div class='add'>+      - description: External MCLK clock</div><div class='add'>+      - description: External Primary I2S clock</div><div class='add'>+      - description: External Secondary I2S clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sleep_clk</div><div class='add'>+      - const: dsi0pll</div><div class='add'>+      - const: dsi0pllbyte</div><div class='add'>+      - const: ext_mclk</div><div class='add'>+      - const: ext_pri_i2s</div><div class='add'>+      - const: ext_sec_i2s</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@300000 {</div><div class='add'>+      compatible = "qcom,gcc-msm8916";</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      reg = &lt;0x300000 0x90000&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml<br/>new file mode 100644<br/>index 000000000000..1927aecc86bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8974.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8974 (including Pro) and MSM8226</div><div class='add'>+  Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+  - Taniya Das &lt;quic_tdas@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on MSM8974 (all variants) and MSM8226.</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)</div><div class='add'>+</div><div class='add'>+$ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,gcc-msm8226</div><div class='add'>+      - qcom,gcc-msm8974</div><div class='add'>+      - qcom,gcc-msm8974pro</div><div class='add'>+      - qcom,gcc-msm8974pro-ac</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sleep_clk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    clock-controller@fc400000 {</div><div class='add'>+        compatible = "qcom,gcc-msm8974";</div><div class='add'>+        reg = &lt;0x00100000 0x94000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clock-names = "xo", "sleep_clk";</div><div class='add'>+        clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+                 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml<br/>index f3430b159caa..d2186e25f55f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml</a></div><div class='hunk'>@@ -4,18 +4,17 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8976.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for MSM8976</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8976</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on MSM8976.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on MSM8976.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8976.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-msm8976.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -45,29 +44,16 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Phandle to voltage regulator providing power to the GX domain.</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - vdd_gfx-supply</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml<br/>index 22e67b238bb6..8f0f20c1442a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8994.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for MSM8994</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8994</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on MSM8994 and MSM8992.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on MSM8994 and MSM8992.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8994.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-msm8994.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -32,28 +31,15 @@ properties:</div><div class='ctx'>       - const: xo</div><div class='ctx'>       - const: sleep</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml<br/>index 5a5b2214f0ca..f77036ace31b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml</a></div><div class='hunk'>@@ -4,59 +4,57 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for MSM8996</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8996</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='add'>+  Qualcomm global clock control module which provides the clocks, resets and</div><div class='ctx'>   power domains on MSM8996.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8996.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-msm8996.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,gcc-msm8996</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 3</div><div class='ctx'>     items:</div><div class='ctx'>       - description: XO source</div><div class='ctx'>       - description: Second XO source</div><div class='ctx'>       - description: Sleep clock source</div><div class='add'>+      - description: PCIe 0 PIPE clock (optional)</div><div class='add'>+      - description: PCIe 1 PIPE clock (optional)</div><div class='add'>+      - description: PCIe 2 PIPE clock (optional)</div><div class='add'>+      - description: USB3 PIPE clock (optional)</div><div class='add'>+      - description: UFS RX symbol 0 clock (optional)</div><div class='add'>+      - description: UFS RX symbol 1 clock (optional)</div><div class='add'>+      - description: UFS TX symbol 0 clock (optional)</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 3</div><div class='ctx'>     items:</div><div class='ctx'>       - const: cxo</div><div class='ctx'>       - const: cxo2</div><div class='ctx'>       - const: sleep_clk</div><div class='del'>-</div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='add'>+      - const: pcie_0_pipe_clk_src</div><div class='add'>+      - const: pcie_1_pipe_clk_src</div><div class='add'>+      - const: pcie_2_pipe_clk_src</div><div class='add'>+      - const: usb3_phy_pipe_clk_src</div><div class='add'>+      - const: ufs_rx_symbol_0_clk_src</div><div class='add'>+      - const: ufs_rx_symbol_1_clk_src</div><div class='add'>+      - const: ufs_tx_symbol_0_clk_src</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml<br/>index 8151c0a05649..3c9729050d6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml</a></div><div class='hunk'>@@ -4,18 +4,17 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for MSM8998</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on MSM8998</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on MSM8998.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on MSM8998.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8998.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-msm8998.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -26,7 +25,6 @@ properties:</div><div class='ctx'>       - description: Board XO source</div><div class='ctx'>       - description: Sleep clock source</div><div class='ctx'>       - description: Audio reference clock (Optional clock)</div><div class='del'>-      - description: PLL test clock source (Optional clock)</div><div class='ctx'>     minItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='hunk'>@@ -34,35 +32,17 @@ properties:</div><div class='ctx'>       - const: xo</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'>       - const: aud_ref_clk # Optional clock</div><div class='del'>-      - const: core_bi_pll_test_se # Optional clock</div><div class='ctx'>     minItems: 2</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -75,11 +55,9 @@ examples:</div><div class='ctx'>       reg = &lt;0x00100000 0xb0000&gt;;</div><div class='ctx'>       clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='ctx'>                &lt;&amp;sleep&gt;,</div><div class='del'>-               &lt;0&gt;,</div><div class='ctx'>                &lt;0&gt;;</div><div class='ctx'>       clock-names = "xo",</div><div class='ctx'>                     "sleep_clk",</div><div class='del'>-                    "aud_ref_clk",</div><div class='del'>-                    "core_bi_pll_test_se";</div><div class='add'>+                    "aud_ref_clk";</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml<br/>index 6c45e0f85494..ae01e7749534 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml</a></div><div class='hunk'>@@ -4,53 +4,34 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-other.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-ipq4019.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-ipq6018.h</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-ipq6018.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8939.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8953.h</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-msm8939.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8660.h</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-msm8660.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-mdm9607.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-mdm9615.h</div><div class='del'>-  - dt-bindings/reset/qcom,gcc-mdm9615.h</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sdm660.h  (qcom,gcc-sdm630 and qcom,gcc-sdm660)</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-ipq6018.h</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-ipq6018.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-msm8953.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-mdm9607.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-mdm9615.h</div><div class='add'>+    include/dt-bindings/reset/qcom,gcc-mdm9615.h</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "qcom,gcc.yaml#"</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='del'>-      - qcom,gcc-ipq4019</div><div class='ctx'>       - qcom,gcc-ipq6018</div><div class='ctx'>       - qcom,gcc-mdm9607</div><div class='del'>-      - qcom,gcc-msm8226</div><div class='del'>-      - qcom,gcc-msm8660</div><div class='del'>-      - qcom,gcc-msm8916</div><div class='del'>-      - qcom,gcc-msm8939</div><div class='ctx'>       - qcom,gcc-msm8953</div><div class='del'>-      - qcom,gcc-msm8960</div><div class='del'>-      - qcom,gcc-msm8974</div><div class='del'>-      - qcom,gcc-msm8974pro</div><div class='del'>-      - qcom,gcc-msm8974pro-ac</div><div class='ctx'>       - qcom,gcc-mdm9615</div><div class='del'>-      - qcom,gcc-sdm630</div><div class='del'>-      - qcom,gcc-sdm660</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -58,10 +39,9 @@ required:</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='del'>-  # Example for GCC for MSM8960:</div><div class='ctx'>   - |</div><div class='ctx'>     clock-controller@900000 {</div><div class='del'>-      compatible = "qcom,gcc-msm8960";</div><div class='add'>+      compatible = "qcom,gcc-mdm9607";</div><div class='ctx'>       reg = &lt;0x900000 0x4000&gt;;</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml<br/>index 5de9c8263138..c9bec4656f6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-qcm2290.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for QCM2290</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on QCM2290</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawn.guo@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets</div><div class='del'>-  and power domains on QCM2290.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on QCM2290.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-qcm2290.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-qcm2290.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,32 +29,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml<br/>index ce06f3f8c3e3..b2256f81b265 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml</a></div><div class='hunk'>@@ -4,43 +4,47 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Bindingfor QCS404</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on QCS404</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on QCS404.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on QCS404.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-qcs404.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-qcs404.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,gcc-qcs404</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: PCIe 0 PIPE clock (optional)</div><div class='add'>+      - description: DSI phy instance 0 dsi clock</div><div class='add'>+      - description: DSI phy instance 0 byte clock</div><div class='add'>+      - description: HDMI phy PLL clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cxo</div><div class='add'>+      - const: sleep_clk</div><div class='add'>+      - const: pcie_0_pipe_clk_src</div><div class='add'>+      - const: dsi0pll</div><div class='add'>+      - const: dsi0pllbyte</div><div class='add'>+      - const: hdmi_pll</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -49,5 +53,6 @@ examples:</div><div class='ctx'>       reg = &lt;0x01800000 0x80000&gt;;</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml<br/>index a404c8fbee67..06dce0c6b7d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml</a></div><div class='hunk'>@@ -4,18 +4,17 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7180.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SC7180</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SC7180</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SC7180.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SC7180.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sc7180.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sc7180.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -33,32 +32,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo_ao</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml<br/>index 5693b8997570..947b47168cec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SC7280</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SC7280</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SC7280.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SC7280.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sc7280.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sc7280.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -44,28 +43,15 @@ properties:</div><div class='ctx'>       - const: ufs_phy_tx_symbol_0_clk</div><div class='ctx'>       - const: usb3_phy_wrapper_gcc_usb30_pipe_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml<br/>index f03ef96e57fa..6c4846b34e4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sc8180x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SC8180x</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SC8180x</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SC8180x.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SC8180x.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sc8180x.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sc8180x.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -32,32 +31,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo_ao</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml<br/>new file mode 100644<br/>index 000000000000..5681e535fede<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SC8280xp</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and</div><div class='add'>+  power domains on SC8280xp.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sc8280xp.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,gcc-sc8280xp</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO reference clock</div><div class='add'>+      - description: Sleep clock</div><div class='add'>+      - description: UFS memory first RX symbol clock</div><div class='add'>+      - description: UFS memory second RX symbol clock</div><div class='add'>+      - description: UFS memory first TX symbol clock</div><div class='add'>+      - description: UFS card first RX symbol clock</div><div class='add'>+      - description: UFS card second RX symbol clock</div><div class='add'>+      - description: UFS card first TX symbol clock</div><div class='add'>+      - description: Primary USB SuperSpeed pipe clock</div><div class='add'>+      - description: USB4 PHY pipegmux clock source</div><div class='add'>+      - description: USB4 PHY DP gmux clock source</div><div class='add'>+      - description: USB4 PHY sys pipegmux clock source</div><div class='add'>+      - description: USB4 PHY PCIe pipe clock</div><div class='add'>+      - description: USB4 PHY router max pipe clock</div><div class='add'>+      - description: Primary USB4 RX0 clock</div><div class='add'>+      - description: Primary USB4 RX1 clock</div><div class='add'>+      - description: Secondary USB SuperSpeed pipe clock</div><div class='add'>+      - description: Second USB4 PHY pipegmux clock source</div><div class='add'>+      - description: Second USB4 PHY DP gmux clock source</div><div class='add'>+      - description: Second USB4 PHY sys pipegmux clock source</div><div class='add'>+      - description: Second USB4 PHY PCIe pipe clock</div><div class='add'>+      - description: Second USB4 PHY router max pipe clock</div><div class='add'>+      - description: Secondary USB4 RX0 clock</div><div class='add'>+      - description: Secondary USB4 RX1 clock</div><div class='add'>+      - description: Multiport USB first SuperSpeed pipe clock</div><div class='add'>+      - description: Multiport USB second SuperSpeed pipe clock</div><div class='add'>+      - description: PCIe 2a pipe clock</div><div class='add'>+      - description: PCIe 2b pipe clock</div><div class='add'>+      - description: PCIe 3a pipe clock</div><div class='add'>+      - description: PCIe 3b pipe clock</div><div class='add'>+      - description: PCIe 4 pipe clock</div><div class='add'>+      - description: First EMAC controller reference clock</div><div class='add'>+      - description: Second EMAC controller reference clock</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: CX domain</div><div class='add'>+</div><div class='add'>+  protected-clocks:</div><div class='add'>+    maxItems: 389</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    clock-controller@100000 {</div><div class='add'>+      compatible = "qcom,gcc-sc8280xp";</div><div class='add'>+      reg = &lt;0x00100000 0x1f0000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;ufs_phy_rx_symbol_0_clk&gt;,</div><div class='add'>+               &lt;&amp;ufs_phy_rx_symbol_1_clk&gt;,</div><div class='add'>+               &lt;&amp;ufs_phy_tx_symbol_0_clk&gt;,</div><div class='add'>+               &lt;&amp;ufs_card_rx_symbol_0_clk&gt;,</div><div class='add'>+               &lt;&amp;ufs_card_rx_symbol_1_clk&gt;,</div><div class='add'>+               &lt;&amp;ufs_card_tx_symbol_0_clk&gt;,</div><div class='add'>+               &lt;&amp;usb_0_ssphy&gt;,</div><div class='add'>+               &lt;&amp;gcc_usb4_phy_pipegmux_clk_src&gt;,</div><div class='add'>+               &lt;&amp;gcc_usb4_phy_dp_gmux_clk_src&gt;,</div><div class='add'>+               &lt;&amp;gcc_usb4_phy_sys_pipegmux_clk_src&gt;,</div><div class='add'>+               &lt;&amp;usb4_phy_gcc_usb4_pcie_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;usb4_phy_gcc_usb4rtr_max_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;qusb4phy_gcc_usb4_rx0_clk&gt;,</div><div class='add'>+               &lt;&amp;qusb4phy_gcc_usb4_rx1_clk&gt;,</div><div class='add'>+               &lt;&amp;usb_1_ssphy&gt;,</div><div class='add'>+               &lt;&amp;gcc_usb4_1_phy_pipegmux_clk_src&gt;,</div><div class='add'>+               &lt;&amp;gcc_usb4_1_phy_dp_gmux_clk_src&gt;,</div><div class='add'>+               &lt;&amp;gcc_usb4_1_phy_sys_pipegmux_clk_src&gt;,</div><div class='add'>+               &lt;&amp;usb4_1_phy_gcc_usb4_pcie_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;usb4_1_phy_gcc_usb4rtr_max_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;qusb4phy_1_gcc_usb4_rx0_clk&gt;,</div><div class='add'>+               &lt;&amp;qusb4phy_1_gcc_usb4_rx1_clk&gt;,</div><div class='add'>+               &lt;&amp;usb_2_ssphy&gt;,</div><div class='add'>+               &lt;&amp;usb_3_ssphy&gt;,</div><div class='add'>+               &lt;&amp;pcie2a_lane&gt;,</div><div class='add'>+               &lt;&amp;pcie2b_lane&gt;,</div><div class='add'>+               &lt;&amp;pcie3a_lane&gt;,</div><div class='add'>+               &lt;&amp;pcie3b_lane&gt;,</div><div class='add'>+               &lt;&amp;pcie4_lane&gt;,</div><div class='add'>+               &lt;&amp;rxc0_ref_clk&gt;,</div><div class='add'>+               &lt;&amp;rxc1_ref_clk&gt;;</div><div class='add'>+      power-domains = &lt;&amp;rpmhpd SC8280XP_CX&gt;;</div><div class='add'>+</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml<br/>new file mode 100644<br/>index 000000000000..52e7412aace5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,gcc-sdm660.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SDM660/SDM630/SDM636 Global Clock &amp; Reset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+  - Taniya Das &lt;quic_tdas@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SDM630, SDM636 and SDM660</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gcc-sdm660.h  (qcom,gcc-sdm630 and qcom,gcc-sdm660)</div><div class='add'>+</div><div class='add'>+$ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,gcc-sdm630</div><div class='add'>+      - qcom,gcc-sdm660</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sleep_clk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Example for GCC for SDM660:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    clock-controller@100000 {</div><div class='add'>+        compatible = "qcom,gcc-sdm660";</div><div class='add'>+        reg = &lt;0x00100000 0x94000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clock-names = "xo", "sleep_clk";</div><div class='add'>+        clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+                 &lt;&amp;sleep_clk&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml<br/>index d902f137ab17..68e1b7822fe0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml</a></div><div class='hunk'>@@ -4,63 +4,81 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SDM670 and SDM845</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SDM845</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SDM670 and SDM845</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sdm845.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sdm845.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,gcc-sdm845</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,gcc-sdm670</div><div class='add'>+      - qcom,gcc-sdm845</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Board XO source</div><div class='del'>-      - description: Board active XO source</div><div class='del'>-      - description: Sleep clock source</div><div class='del'>-      - description: PCIE 0 Pipe clock source</div><div class='del'>-      - description: PCIE 1 Pipe clock source</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: bi_tcxo</div><div class='del'>-      - const: bi_tcxo_ao</div><div class='del'>-      - const: sleep_clk</div><div class='del'>-      - const: pcie_0_pipe_clk</div><div class='del'>-      - const: pcie_1_pipe_clk</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='add'>+  power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,gcc-sdm670</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Board active XO source</div><div class='add'>+            - description: Sleep clock source</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+            - const: bi_tcxo_ao</div><div class='add'>+            - const: sleep_clk</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,gcc-sdm845</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Board active XO source</div><div class='add'>+            - description: Sleep clock source</div><div class='add'>+            - description: PCIE 0 Pipe clock source</div><div class='add'>+            - description: PCIE 1 Pipe clock source</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+            - const: bi_tcxo_ao</div><div class='add'>+            - const: sleep_clk</div><div class='add'>+            - const: pcie_0_pipe_clk</div><div class='add'>+            - const: pcie_1_pipe_clk</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   # Example for GCC for SDM845:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml<br/>index b0d1c65aa354..428e954d7638 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml</a></div><div class='hunk'>@@ -4,18 +4,17 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SDX55</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SDX55</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and</div><div class='ctx'>   power domains on SDX55</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sdx55.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sdx55.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -25,38 +24,21 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Board XO source</div><div class='ctx'>       - description: Sleep clock source</div><div class='del'>-      - description: PLL test clock source (Optional clock)</div><div class='del'>-    minItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: bi_tcxo</div><div class='ctx'>       - const: sleep_clk</div><div class='del'>-      - const: core_bi_pll_test_se # Optional clock</div><div class='del'>-    minItems: 2</div><div class='del'>-</div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -65,8 +47,9 @@ examples:</div><div class='ctx'>       compatible = "qcom,gcc-sdx55";</div><div class='ctx'>       reg = &lt;0x00100000 0x1f0000&gt;;</div><div class='ctx'>       clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='del'>-               &lt;&amp;sleep_clk&gt;, &lt;&amp;pll_test_clk&gt;;</div><div class='del'>-      clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se";</div><div class='add'>+               &lt;&amp;sleep_clk&gt;;</div><div class='add'>+      clock-names = "bi_tcxo",</div><div class='add'>+                    "sleep_clk";</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='ctx'>       #power-domain-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml<br/>index 16c4cdc7b4d6..523e18d7f150 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml</a></div><div class='hunk'>@@ -4,25 +4,21 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx65.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SDX65</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SDX65</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vamsi krishna Lanka &lt;quic_vamslank@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SDX65</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SDX65</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sdx65.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sdx65.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,gcc-sdx65</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Board XO source</div><div class='hunk'>@@ -30,8 +26,6 @@ properties:</div><div class='ctx'>       - description: Sleep clock source</div><div class='ctx'>       - description: PCIE Pipe clock source</div><div class='ctx'>       - description: USB3 phy wrapper pipe clock source</div><div class='del'>-      - description: PLL test clock source (Optional clock)</div><div class='del'>-    minItems: 5</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -40,28 +34,16 @@ properties:</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'>       - const: pcie_pipe_clk</div><div class='ctx'>       - const: usb3_phy_wrapper_gcc_usb30_pipe_clk</div><div class='del'>-      - const: core_bi_pll_test_se # Optional clock</div><div class='del'>-    minItems: 5</div><div class='del'>-</div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -70,9 +52,9 @@ examples:</div><div class='ctx'>       compatible = "qcom,gcc-sdx65";</div><div class='ctx'>       reg = &lt;0x100000 0x1f7400&gt;;</div><div class='ctx'>       clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;, &lt;&amp;sleep_clk&gt;,</div><div class='del'>-               &lt;&amp;pcie_pipe_clk&gt;, &lt;&amp;usb3_phy_wrapper_gcc_usb30_pipe_clk&gt;, &lt;&amp;pll_test_clk&gt;;</div><div class='add'>+               &lt;&amp;pcie_pipe_clk&gt;, &lt;&amp;usb3_phy_wrapper_gcc_usb30_pipe_clk&gt;;</div><div class='ctx'>       clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",</div><div class='del'>-                    "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk", "core_bi_pll_test_se";</div><div class='add'>+                    "pcie_pipe_clk", "usb3_phy_wrapper_gcc_usb30_pipe_clk";</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #reset-cells = &lt;1&gt;;</div><div class='ctx'>       #power-domain-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml<br/>index 26050da844d5..a5ad0a3da397 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SM6115 and SM4250</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM6115 and SM4250</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Iskren Chernev &lt;iskren.chernev@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM4250/6115.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM4250/6115.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sm6115.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sm6115.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,32 +29,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml<br/>index ab12b391effc..8e37623788bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SM6125</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM6125</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM6125.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM6125.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sm6125.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sm6125.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,32 +29,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml<br/>index 20926cd8293e..d1b26ab48eaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6350.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SM6350</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM6350</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM6350.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM6350.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sm6350.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sm6350.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -32,32 +31,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo_ao</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml<br/>index 12766a866625..3ea0ff37a4cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml</a></div><div class='hunk'>@@ -4,18 +4,17 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8150.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SM8150</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM8150</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM8150.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8150.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sm8150.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sm8150.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -31,32 +30,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml<br/>index 80bd6caf5bc9..b752542ee20c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml</a></div><div class='hunk'>@@ -4,18 +4,17 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SM8250</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM8250</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM8250.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8250.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sm8250.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sm8250.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -31,32 +30,15 @@ properties:</div><div class='ctx'>       - const: bi_tcxo</div><div class='ctx'>       - const: sleep_clk</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  protected-clocks:</div><div class='del'>-    description:</div><div class='del'>-      Protected clock specifier list as per common clock binding.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml<br/>index 1122700dcc2b..b4fdde71ef18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SM8350</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM8350</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM8350.</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8350.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sm8350.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sm8350.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -24,7 +23,6 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Board XO source</div><div class='ctx'>       - description: Sleep clock source</div><div class='del'>-      - description: PLL test clock source (Optional clock)</div><div class='ctx'>       - description: PCIE 0 Pipe clock source (Optional clock)</div><div class='ctx'>       - description: PCIE 1 Pipe clock source (Optional clock)</div><div class='ctx'>       - description: UFS card Rx symbol 0 clock source (Optional clock)</div><div class='hunk'>@@ -41,7 +39,6 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: bi_tcxo</div><div class='ctx'>       - const: sleep_clk</div><div class='del'>-      - const: core_bi_pll_test_se # Optional clock</div><div class='ctx'>       - const: pcie_0_pipe_clk # Optional clock</div><div class='ctx'>       - const: pcie_1_pipe_clk # Optional clock</div><div class='ctx'>       - const: ufs_card_rx_symbol_0_clk # Optional clock</div><div class='hunk'>@@ -54,28 +51,15 @@ properties:</div><div class='ctx'>       - const: usb3_uni_phy_sec_gcc_usb30_pipe_clk # Optional clock</div><div class='ctx'>     minItems: 2</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - reg</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml<br/>index 58d98a766de6..9a31981fbeb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding for SM8450</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM8450</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm global clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SM8450</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8450</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,gcc-sm8450.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -46,28 +45,15 @@ properties:</div><div class='ctx'>       - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock</div><div class='ctx'>     minItems: 2</div><div class='ctx'> </div><div class='del'>-  '#clock-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#reset-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  '#power-domain-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - '#clock-cells'</div><div class='del'>-  - '#reset-cells'</div><div class='del'>-  - '#power-domain-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml<br/>index 2ed27a2ef445..7129fbcf2b6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gcc.yaml</a></div><div class='hunk'>@@ -4,15 +4,15 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Global Clock &amp; Reset Controller Binding Common Bindings</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Common bindings for Qualcomm global clock control module which supports</div><div class='del'>-  the clocks, resets and power domains.</div><div class='add'>+  Common bindings for Qualcomm global clock control module providing the</div><div class='add'>+  clocks, resets and power domains.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   '#clock-cells':</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml<br/>index 3f70eb59aae3..0518ea963cdd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Graphics Clock &amp; Reset Controller Binding for SDM630 and SDM660</div><div class='add'>+title: Qualcomm Graphics Clock &amp; Reset Controller on SDM630 and SDM660</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm graphics clock control module which supports the clocks, resets and</div><div class='add'>+  Qualcomm graphics clock control module provides the clocks, resets and</div><div class='ctx'>   power domains on SDM630 and SDM660.</div><div class='ctx'> </div><div class='ctx'>   See also dt-bindings/clock/qcom,gpucc-sdm660.h.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml<br/>index 9ebcb1943b0a..1e3dc9deded9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,gpucc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,gpucc.yaml</a></div><div class='hunk'>@@ -4,33 +4,39 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Graphics Clock &amp; Reset Controller Binding</div><div class='add'>+title: Qualcomm Graphics Clock &amp; Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm graphics clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on Qualcomm SoCs.</div><div class='add'>+  Qualcomm graphics clock control module provides the clocks, resets and power</div><div class='add'>+  domains on Qualcomm SoCs.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-    dt-bindings/clock/qcom,gpucc-sdm845.h</div><div class='del'>-    dt-bindings/clock/qcom,gpucc-sc7180.h</div><div class='del'>-    dt-bindings/clock/qcom,gpucc-sc7280.h</div><div class='del'>-    dt-bindings/clock/qcom,gpucc-sm6350.h</div><div class='del'>-    dt-bindings/clock/qcom,gpucc-sm8150.h</div><div class='del'>-    dt-bindings/clock/qcom,gpucc-sm8250.h</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sdm845.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sa8775p.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sc7180.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sc7280.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sc8280xp.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sm6350.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sm8150.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sm8250.h</div><div class='add'>+    include/dt-bindings/clock/qcom,gpucc-sm8350.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,sdm845-gpucc</div><div class='add'>+      - qcom,sa8775p-gpucc</div><div class='ctx'>       - qcom,sc7180-gpucc</div><div class='ctx'>       - qcom,sc7280-gpucc</div><div class='ctx'>       - qcom,sc8180x-gpucc</div><div class='add'>+      - qcom,sc8280xp-gpucc</div><div class='ctx'>       - qcom,sm6350-gpucc</div><div class='ctx'>       - qcom,sm8150-gpucc</div><div class='ctx'>       - qcom,sm8250-gpucc</div><div class='add'>+      - qcom,sm8350-gpucc</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..718fe0625424<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on IPQ5332</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on IPQ5332.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,ipq5332-gcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO clock source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: PCIE 2lane PHY pipe clock source</div><div class='add'>+      - description: PCIE 2lane x1 PHY pipe clock source (For second lane)</div><div class='add'>+      - description: USB PCIE wrapper pipe clock source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@1800000 {</div><div class='add'>+      compatible = "qcom,ipq5332-gcc";</div><div class='add'>+      reg = &lt;0x01800000 0x80000&gt;;</div><div class='add'>+      clocks = &lt;&amp;xo_board&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie_2lane_phy_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie_2lane_phy_pipe_clk_x1&gt;,</div><div class='add'>+               &lt;&amp;usb_pcie_wrapper_pipe_clk&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..afc68eb9d7cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on IPQ9574</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Anusha Rao &lt;quic_anusha@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on IPQ9574</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,ipq9574-gcc.h</div><div class='add'>+    include/dt-bindings/reset/qcom,ipq9574-gcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,ipq9574-gcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: Bias PLL ubi clock source</div><div class='add'>+      - description: PCIE30 PHY0 pipe clock source</div><div class='add'>+      - description: PCIE30 PHY1 pipe clock source</div><div class='add'>+      - description: PCIE30 PHY2 pipe clock source</div><div class='add'>+      - description: PCIE30 PHY3 pipe clock source</div><div class='add'>+      - description: USB3 PHY pipe clock source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@1800000 {</div><div class='add'>+      compatible = "qcom,ipq9574-gcc";</div><div class='add'>+      reg = &lt;0x01800000 0x80000&gt;;</div><div class='add'>+      clocks = &lt;&amp;xo_board_clk&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;bias_pll_ubi_nc_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie30_phy0_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie30_phy1_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie30_phy2_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie30_phy3_pipe_clk&gt;,</div><div class='add'>+               &lt;&amp;usb3phy_0_cc_pipe_clk&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml b/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml<br/>new file mode 100644<br/>index 000000000000..a466e4e8aacd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,kpss-acc-v1.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,kpss-acc-v1.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v1</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The KPSS ACC provides clock, power domain, and reset control to a Krait CPU.</div><div class='add'>+  There is one ACC register region per CPU within the KPSS remapped region as</div><div class='add'>+  well as an alias register region that remaps accesses to the ACC associated</div><div class='add'>+  with the CPU accessing the region. ACC v1 is currently used as a</div><div class='add'>+  clock-controller for enabling the cpu and hanling the aux clocks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,kpss-acc-v1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Base address and size of the register region</div><div class='add'>+      - description: Optional base address and size of the alias register region</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pll8_vote</div><div class='add'>+      - const: pxo</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description: Name of the aux clock. Krait can have at most 4 cpu.</div><div class='add'>+    enum:</div><div class='add'>+      - acpu0_aux</div><div class='add'>+      - acpu1_aux</div><div class='add'>+      - acpu2_aux</div><div class='add'>+      - acpu3_aux</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - clock-output-names</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-ipq806x.h&gt;</div><div class='add'>+</div><div class='add'>+    clock-controller@2088000 {</div><div class='add'>+      compatible = "qcom,kpss-acc-v1";</div><div class='add'>+      reg = &lt;0x02088000 0x1000&gt;, &lt;0x02008000 0x1000&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc PLL8_VOTE&gt;, &lt;&amp;pxo_board&gt;;</div><div class='add'>+      clock-names = "pll8_vote", "pxo";</div><div class='add'>+      clock-output-names = "acpu0_aux";</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,kpss-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,kpss-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..88b7672123a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,kpss-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,kpss-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,kpss-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used</div><div class='add'>+  to control L2 mux (in the current implementation) and provide access</div><div class='add'>+  to the kpss-gcc registers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,kpss-gcc-ipq8064</div><div class='add'>+          - qcom,kpss-gcc-apq8064</div><div class='add'>+          - qcom,kpss-gcc-msm8974</div><div class='add'>+          - qcom,kpss-gcc-msm8960</div><div class='add'>+          - qcom,kpss-gcc-msm8660</div><div class='add'>+          - qcom,kpss-gcc-mdm9615</div><div class='add'>+      - const: qcom,kpss-gcc</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pll8_vote</div><div class='add'>+      - const: pxo</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,kpss-gcc-ipq8064</div><div class='add'>+          - qcom,kpss-gcc-apq8064</div><div class='add'>+          - qcom,kpss-gcc-msm8974</div><div class='add'>+          - qcom,kpss-gcc-msm8960</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - clocks</div><div class='add'>+    - clock-names</div><div class='add'>+    - '#clock-cells'</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    clock: false</div><div class='add'>+    clock-names: false</div><div class='add'>+    '#clock-cells': false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-ipq806x.h&gt;</div><div class='add'>+</div><div class='add'>+    clock-controller@2011000 {</div><div class='add'>+      compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";</div><div class='add'>+      reg = &lt;0x2011000 0x1000&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc PLL8_VOTE&gt;, &lt;&amp;pxo_board&gt;;</div><div class='add'>+      clock-names = "pll8_vote", "pxo";</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@2011000 {</div><div class='add'>+      compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon";</div><div class='add'>+      reg = &lt;0x02011000 0x1000&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,lcc.txt b/Documentation/devicetree/bindings/clock/qcom,lcc.txt<br/>deleted file mode 100644<br/>index a3c78aa88038..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,lcc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,lcc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-Qualcomm LPASS Clock &amp; Reset Controller Binding</div><div class='del'>-------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties :</div><div class='del'>-- compatible : shall contain only one of the following:</div><div class='del'>-</div><div class='del'>-			"qcom,lcc-msm8960"</div><div class='del'>-			"qcom,lcc-apq8064"</div><div class='del'>-			"qcom,lcc-ipq8064"</div><div class='del'>-			"qcom,lcc-mdm9615"</div><div class='del'>-</div><div class='del'>-- reg : shall contain base register location and length</div><div class='del'>-- #clock-cells : shall contain 1</div><div class='del'>-- #reset-cells : shall contain 1</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	clock-controller@28000000 {</div><div class='del'>-		compatible = "qcom,lcc-ipq8064";</div><div class='del'>-		reg = &lt;0x28000000 0x1000&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,lcc.yaml b/Documentation/devicetree/bindings/clock/qcom,lcc.yaml<br/>new file mode 100644<br/>index 000000000000..8c783823e93c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,lcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,lcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,lcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm LPASS Clock &amp; Reset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,lcc-apq8064</div><div class='add'>+      - qcom,lcc-ipq8064</div><div class='add'>+      - qcom,lcc-mdm9615</div><div class='add'>+      - qcom,lcc-msm8960</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,lcc-apq8064</div><div class='add'>+              - qcom,lcc-msm8960</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board PXO source</div><div class='add'>+            - description: PLL 4 Vote clock</div><div class='add'>+            - description: MI2S codec clock</div><div class='add'>+            - description: Mic I2S codec clock</div><div class='add'>+            - description: Mic I2S spare clock</div><div class='add'>+            - description: Speaker I2S codec clock</div><div class='add'>+            - description: Speaker I2S spare clock</div><div class='add'>+            - description: PCM codec clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pxo</div><div class='add'>+            - const: pll4_vote</div><div class='add'>+            - const: mi2s_codec_clk</div><div class='add'>+            - const: codec_i2s_mic_codec_clk</div><div class='add'>+            - const: spare_i2s_mic_codec_clk</div><div class='add'>+            - const: codec_i2s_spkr_codec_clk</div><div class='add'>+            - const: spare_i2s_spkr_codec_clk</div><div class='add'>+            - const: pcm_codec_clk</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@28000000 {</div><div class='add'>+        compatible = "qcom,lcc-ipq8064";</div><div class='add'>+        reg = &lt;0x28000000 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt b/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt<br/>deleted file mode 100644<br/>index b9e9787045b9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,lpasscc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,lpasscc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Qualcomm LPASS Clock Controller Binding</div><div class='del'>------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties :</div><div class='del'>-- compatible		: shall contain "qcom,sdm845-lpasscc"</div><div class='del'>-- #clock-cells		: from common clock binding, shall contain 1.</div><div class='del'>-- reg			: shall contain base register address and size,</div><div class='del'>-			  in the order</div><div class='del'>-			Index-0 maps to LPASS_CC register region</div><div class='del'>-			Index-1 maps to LPASS_QDSP6SS register region</div><div class='del'>-</div><div class='del'>-Optional properties :</div><div class='del'>-- reg-names	: register names of LPASS domain</div><div class='del'>-		 "cc", "qdsp6ss".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-The below node has to be defined in the cases where the LPASS peripheral loader</div><div class='del'>-would bring the subsystem out of reset.</div><div class='del'>-</div><div class='del'>-	lpasscc: clock-controller@17014000 {</div><div class='del'>-		compatible = "qcom,sdm845-lpasscc";</div><div class='del'>-		reg = &lt;0x17014000 0x1f004&gt;, &lt;0x17300000 0x200&gt;;</div><div class='del'>-		reg-names = "cc", "qdsp6ss";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml<br/>index 4b79e89fd174..acf0c923c24f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,mmcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,mmcc.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Multimedia Clock &amp; Reset Controller Binding</div><div class='add'>+title: Qualcomm Multimedia Clock &amp; Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Jeffrey Hugo &lt;jhugo@codeaurora.org&gt;</div><div class='add'>+  - Jeffrey Hugo &lt;quic_jhugo@quicinc.com&gt;</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm multimedia clock control module which supports the clocks, resets and</div><div class='add'>+  Qualcomm multimedia clock control module provides the clocks, resets and</div><div class='ctx'>   power domains.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -31,30 +31,12 @@ properties:</div><div class='ctx'>       - qcom,mmcc-sdm660</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Board XO source</div><div class='del'>-      - description: Board sleep source</div><div class='del'>-      - description: Global PLL 0 clock</div><div class='del'>-      - description: DSI phy instance 0 dsi clock</div><div class='del'>-      - description: DSI phy instance 0 byte clock</div><div class='del'>-      - description: DSI phy instance 1 dsi clock</div><div class='del'>-      - description: DSI phy instance 1 byte clock</div><div class='del'>-      - description: HDMI phy PLL clock</div><div class='del'>-      - description: DisplayPort phy PLL vco clock</div><div class='del'>-      - description: DisplayPort phy PLL link clock</div><div class='add'>+    minItems: 8</div><div class='add'>+    maxItems: 13</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: xo</div><div class='del'>-      - const: sleep</div><div class='del'>-      - const: gpll0</div><div class='del'>-      - const: dsi0dsi</div><div class='del'>-      - const: dsi0byte</div><div class='del'>-      - const: dsi1dsi</div><div class='del'>-      - const: dsi1byte</div><div class='del'>-      - const: hdmipll</div><div class='del'>-      - const: dpvco</div><div class='del'>-      - const: dplink</div><div class='add'>+    minItems: 8</div><div class='add'>+    maxItems: 13</div><div class='ctx'> </div><div class='ctx'>   '#clock-cells':</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -85,16 +67,255 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: qcom,mmcc-msm8998</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,mmcc-apq8064</div><div class='add'>+              - qcom,mmcc-msm8960</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board PXO source</div><div class='add'>+            - description: PLL 3 clock</div><div class='add'>+            - description: PLL 3 Vote clock</div><div class='add'>+            - description: DSI phy instance 1 dsi clock</div><div class='add'>+            - description: DSI phy instance 1 byte clock</div><div class='add'>+            - description: DSI phy instance 2 dsi clock</div><div class='add'>+            - description: DSI phy instance 2 byte clock</div><div class='add'>+            - description: HDMI phy PLL clock</div><div class='ctx'> </div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - clocks</div><div class='del'>-    - clock-names</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pxo</div><div class='add'>+            - const: pll3</div><div class='add'>+            - const: pll8_vote</div><div class='add'>+            - const: dsi1pll</div><div class='add'>+            - const: dsi1pllbyte</div><div class='add'>+            - const: dsi2pll</div><div class='add'>+            - const: dsi2pllbyte</div><div class='add'>+            - const: hdmipll</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,mmcc-msm8974</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: MMSS GPLL0 voted clock</div><div class='add'>+            - description: GPLL0 voted clock</div><div class='add'>+            - description: GPLL1 voted clock</div><div class='add'>+            - description: GFX3D clock source</div><div class='add'>+            - description: DSI phy instance 0 dsi clock</div><div class='add'>+            - description: DSI phy instance 0 byte clock</div><div class='add'>+            - description: DSI phy instance 1 dsi clock</div><div class='add'>+            - description: DSI phy instance 1 byte clock</div><div class='add'>+            - description: HDMI phy PLL clock</div><div class='add'>+            - description: eDP phy PLL link clock</div><div class='add'>+            - description: eDP phy PLL vco clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: xo</div><div class='add'>+            - const: mmss_gpll0_vote</div><div class='add'>+            - const: gpll0_vote</div><div class='add'>+            - const: gpll1_vote</div><div class='add'>+            - const: gfx3d_clk_src</div><div class='add'>+            - const: dsi0pll</div><div class='add'>+            - const: dsi0pllbyte</div><div class='add'>+            - const: dsi1pll</div><div class='add'>+            - const: dsi1pllbyte</div><div class='add'>+            - const: hdmipll</div><div class='add'>+            - const: edp_link_clk</div><div class='add'>+            - const: edp_vco_div</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,mmcc-apq8084</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Board sleep source</div><div class='add'>+            - description: MMSS GPLL0 voted clock</div><div class='add'>+            - description: GPLL0 clock</div><div class='add'>+            - description: GPLL0 voted clock</div><div class='add'>+            - description: GPLL1 clock</div><div class='add'>+            - description: DSI phy instance 0 dsi clock</div><div class='add'>+            - description: DSI phy instance 0 byte clock</div><div class='add'>+            - description: DSI phy instance 1 dsi clock</div><div class='add'>+            - description: DSI phy instance 1 byte clock</div><div class='add'>+            - description: HDMI phy PLL clock</div><div class='add'>+            - description: eDP phy PLL link clock</div><div class='add'>+            - description: eDP phy PLL vco clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: xo</div><div class='add'>+            - const: sleep_clk</div><div class='add'>+            - const: mmss_gpll0_vote</div><div class='add'>+            - const: gpll0</div><div class='add'>+            - const: gpll0_vote</div><div class='add'>+            - const: gpll1</div><div class='add'>+            - const: dsi0pll</div><div class='add'>+            - const: dsi0pllbyte</div><div class='add'>+            - const: dsi1pll</div><div class='add'>+            - const: dsi1pllbyte</div><div class='add'>+            - const: hdmipll</div><div class='add'>+            - const: edp_link_clk</div><div class='add'>+            - const: edp_vco_div</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,mmcc-msm8994</div><div class='add'>+              - qcom,mmcc-msm8998</div><div class='add'>+              - qcom,mmcc-sdm630</div><div class='add'>+              - qcom,mmcc-sdm660</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,mmcc-msm8994</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Global PLL 0 clock</div><div class='add'>+            - description: MMSS NoC AHB clock</div><div class='add'>+            - description: GFX3D clock</div><div class='add'>+            - description: DSI phy instance 0 dsi clock</div><div class='add'>+            - description: DSI phy instance 0 byte clock</div><div class='add'>+            - description: DSI phy instance 1 dsi clock</div><div class='add'>+            - description: DSI phy instance 1 byte clock</div><div class='add'>+            - description: HDMI phy PLL clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: xo</div><div class='add'>+            - const: gpll0</div><div class='add'>+            - const: mmssnoc_ahb</div><div class='add'>+            - const: oxili_gfx3d_clk_src</div><div class='add'>+            - const: dsi0pll</div><div class='add'>+            - const: dsi0pllbyte</div><div class='add'>+            - const: dsi1pll</div><div class='add'>+            - const: dsi1pllbyte</div><div class='add'>+            - const: hdmipll</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,mmcc-msm8996</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Global PLL 0 clock</div><div class='add'>+            - description: MMSS NoC AHB clock</div><div class='add'>+            - description: DSI phy instance 0 dsi clock</div><div class='add'>+            - description: DSI phy instance 0 byte clock</div><div class='add'>+            - description: DSI phy instance 1 dsi clock</div><div class='add'>+            - description: DSI phy instance 1 byte clock</div><div class='add'>+            - description: HDMI phy PLL clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: xo</div><div class='add'>+            - const: gpll0</div><div class='add'>+            - const: gcc_mmss_noc_cfg_ahb_clk</div><div class='add'>+            - const: dsi0pll</div><div class='add'>+            - const: dsi0pllbyte</div><div class='add'>+            - const: dsi1pll</div><div class='add'>+            - const: dsi1pllbyte</div><div class='add'>+            - const: hdmipll</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,mmcc-msm8998</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Global PLL 0 clock</div><div class='add'>+            - description: DSI phy instance 0 dsi clock</div><div class='add'>+            - description: DSI phy instance 0 byte clock</div><div class='add'>+            - description: DSI phy instance 1 dsi clock</div><div class='add'>+            - description: DSI phy instance 1 byte clock</div><div class='add'>+            - description: HDMI phy PLL clock</div><div class='add'>+            - description: DisplayPort phy PLL link clock</div><div class='add'>+            - description: DisplayPort phy PLL vco clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: xo</div><div class='add'>+            - const: gpll0</div><div class='add'>+            - const: dsi0dsi</div><div class='add'>+            - const: dsi0byte</div><div class='add'>+            - const: dsi1dsi</div><div class='add'>+            - const: dsi1byte</div><div class='add'>+            - const: hdmipll</div><div class='add'>+            - const: dplink</div><div class='add'>+            - const: dpvco</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,mmcc-sdm630</div><div class='add'>+              - qcom,mmcc-sdm660</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Board sleep source</div><div class='add'>+            - description: Global PLL 0 clock</div><div class='add'>+            - description: Global PLL 0 DIV clock</div><div class='add'>+            - description: DSI phy instance 0 dsi clock</div><div class='add'>+            - description: DSI phy instance 0 byte clock</div><div class='add'>+            - description: DSI phy instance 1 dsi clock</div><div class='add'>+            - description: DSI phy instance 1 byte clock</div><div class='add'>+            - description: DisplayPort phy PLL link clock</div><div class='add'>+            - description: DisplayPort phy PLL vco clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: xo</div><div class='add'>+            - const: sleep_clk</div><div class='add'>+            - const: gpll0</div><div class='add'>+            - const: gpll0_div</div><div class='add'>+            - const: dsi0pll</div><div class='add'>+            - const: dsi0pllbyte</div><div class='add'>+            - const: dsi1pll</div><div class='add'>+            - const: dsi1pllbyte</div><div class='add'>+            - const: dp_link_2x_clk_divsel_five</div><div class='add'>+            - const: dp_vco_divided_clk_src_mux</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   # Example for MMCC for MSM8960:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml<br/>index a20cb10636dd..fcace96c72eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml</a></div><div class='hunk'>@@ -26,22 +26,20 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='del'>-      - description: Primary PLL clock for power cluster (little)</div><div class='del'>-      - description: Primary PLL clock for perf cluster (big)</div><div class='del'>-      - description: Alternate PLL clock for power cluster (little)</div><div class='del'>-      - description: Alternate PLL clock for perf cluster (big)</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: SYS APCS AUX clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: pwrcl_pll</div><div class='del'>-      - const: perfcl_pll</div><div class='del'>-      - const: pwrcl_alt_pll</div><div class='del'>-      - const: perfcl_alt_pll</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: sys_apcs_aux</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - '#clock-cells'</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -51,4 +49,7 @@ examples:</div><div class='ctx'>         compatible = "qcom,msm8996-apcc";</div><div class='ctx'>         reg = &lt;0x6400000 0x90000&gt;;</div><div class='ctx'>         #clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;xo_board&gt;, &lt;&amp;apcs_glb&gt;;</div><div class='add'>+        clock-names = "xo", "sys_apcs_aux";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml<br/>new file mode 100644<br/>index 000000000000..3ffe69d8cdd5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,msm8996-cbf.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,msm8996-cbf.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8996 Core Bus Fabric (CBF) clock controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  The clock controller for the Qualcomm MSM8996 CBF clock, which drives the</div><div class='add'>+  interconnect between two CPU clusters.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8996-cbf</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO source</div><div class='add'>+      - description: SYS APCS AUX clock</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#interconnect-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#interconnect-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    clock-controller@9a11000 {</div><div class='add'>+        compatible = "qcom,msm8996-cbf";</div><div class='add'>+        reg = &lt;0x09a11000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;rpmcc RPM_SMD_BB_CLK1&gt;, &lt;&amp;apcs_glb&gt;;</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+        #interconnect-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml<br/>index d747bb58f0a7..2d8897991663 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Graphics Clock &amp; Reset Controller Binding for MSM8998</div><div class='add'>+title: Qualcomm Graphics Clock &amp; Reset Controller on MSM8998</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm graphics clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on MSM8998.</div><div class='add'>+  Qualcomm graphics clock control module provides the clocks, resets and power</div><div class='add'>+  domains on MSM8998.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,gpucc-msm8998.h.</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml b/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml<br/>index bbaaf1e2a203..03fa30fe9253 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: "qcom,qcs404-q6sstopcc"</div><div class='add'>+    const: qcom,qcs404-q6sstopcc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml<br/>index 973e408c6268..4a00f2d41684 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,qcm2290-dispcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Display Clock &amp; Reset Controller Binding for qcm2290</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on QCM2290</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Loic Poulain &lt;loic.poulain@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm display clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on qcm2290.</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on qcm2290.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,dispcc-qcm2290.h.</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,dispcc-qcm2290.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..767a9d03aa32<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,qdu1000-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,qdu1000-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller for QDU1000 and QRU1000</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Melody Olvera &lt;quic_molvera@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module which supports the clocks, resets and</div><div class='add'>+  power domains on QDU1000 and QRU1000</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,qdu1000-gcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,qdu1000-gcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: PCIE 0 Pipe clock source</div><div class='add'>+      - description: PCIE 0 Phy Auxiliary clock source</div><div class='add'>+      - description: USB3 Phy wrapper pipe clock source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    clock-controller@100000 {</div><div class='add'>+      compatible = "qcom,qdu1000-gcc";</div><div class='add'>+      reg = &lt;0x00100000 0x001f4200&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie_0_pipe_clk&gt;, &lt;&amp;pcie_0_phy_aux_clk&gt;,</div><div class='add'>+               &lt;&amp;usb3_phy_wrapper_pipe_clk&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt<br/>deleted file mode 100644<br/>index da295c3c004b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,rpmcc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,63 +0,0 @@</div><div class='del'>-Qualcomm RPM Clock Controller Binding</div><div class='del'>-------------------------------------------------</div><div class='del'>-The RPM is a dedicated hardware engine for managing the shared</div><div class='del'>-SoC resources in order to keep the lowest power profile. It</div><div class='del'>-communicates with other hardware subsystems via shared memory</div><div class='del'>-and accepts clock requests, aggregates the requests and turns</div><div class='del'>-the clocks on/off or scales them on demand.</div><div class='del'>-</div><div class='del'>-Required properties :</div><div class='del'>-- compatible : shall contain only one of the following. The generic</div><div class='del'>-               compatible "qcom,rpmcc" should be also included.</div><div class='del'>-</div><div class='del'>-			"qcom,rpmcc-mdm9607", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8660", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-apq8060", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8226", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8916", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8936", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8953", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8974", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8976", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-apq8064", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-ipq806x", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8992",·"qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8994",·"qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8996", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-msm8998", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-qcm2290", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-qcs404", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-sdm660", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-sm6115", "qcom,rpmcc"</div><div class='del'>-			"qcom,rpmcc-sm6125", "qcom,rpmcc"</div><div class='del'>-</div><div class='del'>-- #clock-cells : shall contain 1</div><div class='del'>-</div><div class='del'>-The clock enumerators are defined in &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='del'>-and come in pairs: FOO_CLK followed by FOO_A_CLK. The latter clock</div><div class='del'>-is an "active" clock, which means that the consumer only care that the</div><div class='del'>-clock is available when the apps CPU subsystem is active, i.e. not</div><div class='del'>-suspended or in deep idle. If it is important that the clock keeps running</div><div class='del'>-during system suspend, you need to specify the non-active clock, the one</div><div class='del'>-not containing *_A_* in the enumerator name.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	smd {</div><div class='del'>-		compatible = "qcom,smd";</div><div class='del'>-</div><div class='del'>-		rpm {</div><div class='del'>-			interrupts = &lt;0 168 1&gt;;</div><div class='del'>-			qcom,ipc = &lt;&amp;apcs 8 0&gt;;</div><div class='del'>-			qcom,smd-edge = &lt;15&gt;;</div><div class='del'>-</div><div class='del'>-			rpm_requests {</div><div class='del'>-				compatible = "qcom,rpm-msm8916";</div><div class='del'>-				qcom,smd-channels = "rpm_requests";</div><div class='del'>-</div><div class='del'>-				rpmcc: clock-controller {</div><div class='del'>-					compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";</div><div class='del'>-					#clock-cells = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml<br/>new file mode 100644<br/>index 000000000000..3665dd30604a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,160 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,rpmcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPM Clock Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The clock enumerators are defined in &lt;dt-bindings/clock/qcom,rpmcc.h&gt; and</div><div class='add'>+  come in pairs:: FOO_CLK followed by FOO_A_CLK. The latter clock is</div><div class='add'>+  an "active" clock, which means that the consumer only care that the clock is</div><div class='add'>+  available when the apps CPU subsystem is active, i.e. not suspended or in</div><div class='add'>+  deep idle. If it is important that the clock keeps running during system</div><div class='add'>+  suspend, you need to specify the non-active clock, the one not containing</div><div class='add'>+  *_A_* in the enumerator name.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,rpmcc-apq8060</div><div class='add'>+          - qcom,rpmcc-apq8064</div><div class='add'>+          - qcom,rpmcc-ipq806x</div><div class='add'>+          - qcom,rpmcc-mdm9607</div><div class='add'>+          - qcom,rpmcc-msm8226</div><div class='add'>+          - qcom,rpmcc-msm8660</div><div class='add'>+          - qcom,rpmcc-msm8909</div><div class='add'>+          - qcom,rpmcc-msm8916</div><div class='add'>+          - qcom,rpmcc-msm8917</div><div class='add'>+          - qcom,rpmcc-msm8936</div><div class='add'>+          - qcom,rpmcc-msm8953</div><div class='add'>+          - qcom,rpmcc-msm8974</div><div class='add'>+          - qcom,rpmcc-msm8976</div><div class='add'>+          - qcom,rpmcc-msm8992</div><div class='add'>+          - qcom,rpmcc-msm8994</div><div class='add'>+          - qcom,rpmcc-msm8996</div><div class='add'>+          - qcom,rpmcc-msm8998</div><div class='add'>+          - qcom,rpmcc-qcm2290</div><div class='add'>+          - qcom,rpmcc-qcs404</div><div class='add'>+          - qcom,rpmcc-sdm660</div><div class='add'>+          - qcom,rpmcc-sm6115</div><div class='add'>+          - qcom,rpmcc-sm6125</div><div class='add'>+          - qcom,rpmcc-sm6375</div><div class='add'>+      - const: qcom,rpmcc</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,rpmcc-apq8060</div><div class='add'>+              - qcom,rpmcc-ipq806x</div><div class='add'>+              - qcom,rpmcc-msm8660</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: pxo clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pxo</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,rpmcc-apq8064</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: pxo clock</div><div class='add'>+            - description: cxo clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pxo</div><div class='add'>+            - const: cxo</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,rpmcc-mdm9607</div><div class='add'>+              - qcom,rpmcc-msm8226</div><div class='add'>+              - qcom,rpmcc-msm8916</div><div class='add'>+              - qcom,rpmcc-msm8917</div><div class='add'>+              - qcom,rpmcc-msm8936</div><div class='add'>+              - qcom,rpmcc-msm8953</div><div class='add'>+              - qcom,rpmcc-msm8974</div><div class='add'>+              - qcom,rpmcc-msm8976</div><div class='add'>+              - qcom,rpmcc-msm8992</div><div class='add'>+              - qcom,rpmcc-msm8994</div><div class='add'>+              - qcom,rpmcc-msm8996</div><div class='add'>+              - qcom,rpmcc-msm8998</div><div class='add'>+              - qcom,rpmcc-qcm2290</div><div class='add'>+              - qcom,rpmcc-qcs404</div><div class='add'>+              - qcom,rpmcc-sdm660</div><div class='add'>+              - qcom,rpmcc-sm6115</div><div class='add'>+              - qcom,rpmcc-sm6125</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: xo clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: xo</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rpm {</div><div class='add'>+        rpm-requests {</div><div class='add'>+            compatible = "qcom,rpm-msm8916";</div><div class='add'>+            qcom,smd-channels = "rpm_requests";</div><div class='add'>+</div><div class='add'>+            clock-controller {</div><div class='add'>+                compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";</div><div class='add'>+                #clock-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    rpm {</div><div class='add'>+        clock-controller {</div><div class='add'>+            compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            clocks = &lt;&amp;pxo_board&gt;;</div><div class='add'>+            clock-names = "pxo";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml<br/>index 8fcaf418f84a..d5a250b7c2af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,rpmhcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies, Inc. RPMh Clocks Bindings</div><div class='add'>+title: Qualcomm Technologies, Inc. RPMh Clocks</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='hunk'>@@ -17,10 +17,13 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - qcom,qdu1000-rpmh-clk</div><div class='add'>+      - qcom,sa8775p-rpmh-clk</div><div class='ctx'>       - qcom,sc7180-rpmh-clk</div><div class='ctx'>       - qcom,sc7280-rpmh-clk</div><div class='ctx'>       - qcom,sc8180x-rpmh-clk</div><div class='ctx'>       - qcom,sc8280xp-rpmh-clk</div><div class='add'>+      - qcom,sdm670-rpmh-clk</div><div class='ctx'>       - qcom,sdm845-rpmh-clk</div><div class='ctx'>       - qcom,sdx55-rpmh-clk</div><div class='ctx'>       - qcom,sdx65-rpmh-clk</div><div class='hunk'>@@ -29,6 +32,7 @@ properties:</div><div class='ctx'>       - qcom,sm8250-rpmh-clk</div><div class='ctx'>       - qcom,sm8350-rpmh-clk</div><div class='ctx'>       - qcom,sm8450-rpmh-clk</div><div class='add'>+      - qcom,sm8550-rpmh-clk</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..0f641c235b13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sa8775p-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on sa8775p</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and</div><div class='add'>+  power domains on sa8775p.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sa8775p-gcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sa8775p-gcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO reference clock</div><div class='add'>+      - description: Sleep clock</div><div class='add'>+      - description: UFS memory first RX symbol clock</div><div class='add'>+      - description: UFS memory second RX symbol clock</div><div class='add'>+      - description: UFS memory first TX symbol clock</div><div class='add'>+      - description: UFS card first RX symbol clock</div><div class='add'>+      - description: UFS card second RX symbol clock</div><div class='add'>+      - description: UFS card first TX symbol clock</div><div class='add'>+      - description: Primary USB3 PHY wrapper pipe clock</div><div class='add'>+      - description: Secondary USB3 PHY wrapper pipe clock</div><div class='add'>+      - description: PCIe 0 pipe clock</div><div class='add'>+      - description: PCIe 1 pipe clock</div><div class='add'>+      - description: PCIe PHY clock</div><div class='add'>+      - description: First EMAC controller reference clock</div><div class='add'>+      - description: Second EMAC controller reference clock</div><div class='add'>+</div><div class='add'>+  protected-clocks:</div><div class='add'>+    maxItems: 240</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    gcc: clock-controller@100000 {</div><div class='add'>+        compatible = "qcom,sa8775p-gcc";</div><div class='add'>+        reg = &lt;0x100000 0xc7018&gt;;</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+                 &lt;&amp;sleep_clk&gt;,</div><div class='add'>+                 &lt;&amp;ufs_phy_rx_symbol_0_clk&gt;,</div><div class='add'>+                 &lt;&amp;ufs_phy_rx_symbol_1_clk&gt;,</div><div class='add'>+                 &lt;&amp;ufs_phy_tx_symbol_0_clk&gt;,</div><div class='add'>+                 &lt;&amp;ufs_card_rx_symbol_0_clk&gt;,</div><div class='add'>+                 &lt;&amp;ufs_card_rx_symbol_1_clk&gt;,</div><div class='add'>+                 &lt;&amp;ufs_card_tx_symbol_0_clk&gt;,</div><div class='add'>+                 &lt;&amp;usb_0_ssphy&gt;,</div><div class='add'>+                 &lt;&amp;usb_1_ssphy&gt;,</div><div class='add'>+                 &lt;&amp;pcie_0_pipe_clk&gt;,</div><div class='add'>+                 &lt;&amp;pcie_1_pipe_clk&gt;,</div><div class='add'>+                 &lt;&amp;pcie_phy_pipe_clk&gt;,</div><div class='add'>+                 &lt;&amp;rxc0_ref_clk&gt;,</div><div class='add'>+                 &lt;&amp;rxc1_ref_clk&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SA8775P_CX&gt;;</div><div class='add'>+</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml<br/>index f49027edfc44..098c8acf4bad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sc7180-camcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Camera Clock &amp; Reset Controller Binding for SC7180</div><div class='add'>+title: Qualcomm Camera Clock &amp; Reset Controller on SC7180</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm camera clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SC7180.</div><div class='add'>+  Qualcomm camera clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SC7180.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,camcc-sc7180.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,camcc-sc7180.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml<br/>index e94847f92770..95ad16d0abc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sc7180-dispcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Display Clock &amp; Reset Controller Binding for SC7180</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on SC7180</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm display clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SC7180.</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SC7180.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,dispcc-sc7180.h.</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,dispcc-sc7180.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml<br/>index c54172fbf29f..f297694ef8b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sc7180-lpasscorecc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm LPASS Core Clock Controller Binding for SC7180</div><div class='add'>+title: Qualcomm LPASS Core Clock Controller on SC7180</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm LPASS core clock control module which supports the clocks and</div><div class='del'>-  power domains on SC7180.</div><div class='add'>+  Qualcomm LPASS core clock control module provides the clocks and power</div><div class='add'>+  domains on SC7180.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,lpasscorecc-sc7180.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml<br/>index 970030986a86..1e856a8a996e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml</a></div><div class='hunk'>@@ -4,16 +4,15 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sc7180-mss.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Modem Clock Controller Binding for SC7180</div><div class='add'>+title: Qualcomm Modem Clock Controller on SC7180</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm modem clock control module which supports the clocks on SC7180.</div><div class='add'>+  Qualcomm modem clock control module provides the clocks on SC7180.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,mss-sc7180.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,mss-sc7180.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml<br/>index f27ca6f03ffa..b60adbad4590 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sc7280-camcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Camera Clock &amp; Reset Controller Binding for SC7280</div><div class='add'>+title: Qualcomm Camera Clock &amp; Reset Controller on SC7280</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm camera clock control module which supports the clocks, resets and</div><div class='add'>+  Qualcomm camera clock control module provides the clocks, resets and</div><div class='ctx'>   power domains on SC7280.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,camcc-sc7280.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,camcc-sc7280.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml<br/>index 2178666fb697..cfe6594a0a6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Display Clock &amp; Reset Controller Binding for SC7280</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on SC7280</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm display clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SC7280.</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SC7280.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,dispcc-sc7280.h.</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,dispcc-sc7280.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml<br/>index 47028d7b98e4..97c6bd96e0cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm LPASS Core Clock Controller Binding for SC7280</div><div class='add'>+title: Qualcomm LPASS Core Clock Controller on SC7280</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm LPASS core clock control module which supports the clocks and</div><div class='del'>-  power domains on SC7280.</div><div class='add'>+  Qualcomm LPASS core clock control module provides the clocks and power</div><div class='add'>+  domains on SC7280.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-  - dt-bindings/clock/qcom,lpass-sc7280.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -36,13 +35,17 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: LPASS qdsp6ss register</div><div class='ctx'>       - description: LPASS top-cc register</div><div class='del'>-      - description: LPASS cc register</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: qdsp6ss</div><div class='ctx'>       - const: top_cc</div><div class='del'>-      - const: cc</div><div class='add'>+</div><div class='add'>+  qcom,adsp-pil-mode:</div><div class='add'>+    description:</div><div class='add'>+      Indicates if the LPASS would be brought out of reset using</div><div class='add'>+      remoteproc peripheral loader.</div><div class='add'>+    type: boolean</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -59,10 +62,11 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,lpass-sc7280.h&gt;</div><div class='ctx'>     clock-controller@3000000 {</div><div class='ctx'>       compatible = "qcom,sc7280-lpasscc";</div><div class='del'>-      reg = &lt;0x03000000 0x40&gt;, &lt;0x03c04000 0x4&gt;, &lt;0x03389000 0x24&gt;;</div><div class='del'>-      reg-names = "qdsp6ss", "top_cc", "cc";</div><div class='add'>+      reg = &lt;0x03000000 0x40&gt;, &lt;0x03c04000 0x4&gt;;</div><div class='add'>+      reg-names = "qdsp6ss", "top_cc";</div><div class='ctx'>       clocks = &lt;&amp;gcc GCC_CFG_NOC_LPASS_CLK&gt;;</div><div class='ctx'>       clock-names = "iface";</div><div class='add'>+      qcom,adsp-pil-mode;</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml<br/>new file mode 100644<br/>index 000000000000..447cdc447a0c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml</a></div><div class='hunk'>@@ -0,0 +1,192 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm LPASS Core &amp; Audio Clock Controller on SC7280</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm LPASS core and audio clock control module provides the clocks and</div><div class='add'>+  power domains on SC7280.</div><div class='add'>+</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h</div><div class='add'>+    include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  clocks: true</div><div class='add'>+</div><div class='add'>+  clock-names: true</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc7280-lpassaoncc</div><div class='add'>+      - qcom,sc7280-lpassaudiocc</div><div class='add'>+      - qcom,sc7280-lpasscorecc</div><div class='add'>+      - qcom,sc7280-lpasshm</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  qcom,adsp-pil-mode:</div><div class='add'>+    description:</div><div class='add'>+      Indicates if the LPASS would be brought out of reset using</div><div class='add'>+      peripheral loader.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,sc7280-lpassaudiocc</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+            - const: lpass_aon_cc_main_rcg_clk_src</div><div class='add'>+</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: lpass core cc register</div><div class='add'>+            - description: lpass audio csr register</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7280-lpassaoncc</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Board XO active only source</div><div class='add'>+            - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+            - const: bi_tcxo_ao</div><div class='add'>+            - const: iface</div><div class='add'>+</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7280-lpasshm</div><div class='add'>+              - qcom,sc7280-lpasscorecc</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpassaudiocc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpasscorecc-sc7280.h&gt;</div><div class='add'>+    lpass_audiocc: clock-controller@3300000 {</div><div class='add'>+      compatible = "qcom,sc7280-lpassaudiocc";</div><div class='add'>+      reg = &lt;0x3300000 0x30000&gt;,</div><div class='add'>+            &lt;0x32a9000 0x1000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC&gt;;</div><div class='add'>+      clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";</div><div class='add'>+      power-domains = &lt;&amp;lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpassaudiocc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpasscorecc-sc7280.h&gt;</div><div class='add'>+    lpass_hm: clock-controller@3c00000 {</div><div class='add'>+      compatible = "qcom,sc7280-lpasshm";</div><div class='add'>+      reg = &lt;0x3c00000 0x28&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+      clock-names = "bi_tcxo";</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpassaudiocc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpasscorecc-sc7280.h&gt;</div><div class='add'>+    lpasscore: clock-controller@3900000 {</div><div class='add'>+      compatible = "qcom,sc7280-lpasscorecc";</div><div class='add'>+      reg = &lt;0x3900000 0x50000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+      clock-names = "bi_tcxo";</div><div class='add'>+      power-domains = &lt;&amp;lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpassaudiocc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpasscorecc-sc7280.h&gt;</div><div class='add'>+    lpass_aon: clock-controller@3380000 {</div><div class='add'>+      compatible = "qcom,sc7280-lpassaoncc";</div><div class='add'>+      reg = &lt;0x3380000 0x30000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+               &lt;&amp;lpasscore LPASS_CORE_CC_CORE_CLK&gt;;</div><div class='add'>+      clock-names = "bi_tcxo", "bi_tcxo_ao","iface";</div><div class='add'>+      qcom,adsp-pil-mode;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml<br/>index d4239ccae917..91d1f7918037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sdm845-camcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Camera Clock &amp; Reset Controller Binding for SDM845</div><div class='add'>+title: Qualcomm Camera Clock &amp; Reset Controller on SDM845</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm camera clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SDM845.</div><div class='add'>+  Qualcomm camera clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SDM845.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,camcc-sm845.h</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,camcc-sm845.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml<br/>index 4a3be733d042..76b53ce64e40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,sdm845-dispcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Display Clock &amp; Reset Controller Binding for SDM845</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on SDM845</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm display clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on SDM845.</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SDM845.</div><div class='ctx'> </div><div class='del'>-  See also dt-bindings/clock/qcom,dispcc-sdm845.h.</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,dispcc-sdm845.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml<br/>new file mode 100644<br/>index 000000000000..a96fd837c70a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sdm845-lpasscc.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sdm845-lpasscc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SDM845 LPASS Clock Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm SDM845 LPASS (Low Power Audio SubSystem) Clock Controller.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,lpass-sdm845.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sdm845-lpasscc</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cc</div><div class='add'>+      - const: qdsp6ss</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@17014000 {</div><div class='add'>+        compatible = "qcom,sdm845-lpasscc";</div><div class='add'>+        reg = &lt;0x17014000 0x1f004&gt;, &lt;0x17300000 0x200&gt;;</div><div class='add'>+        reg-names = "cc", "qdsp6ss";</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml<br/>new file mode 100644<br/>index 000000000000..f802a2e7f818<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm6115-dispcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display Clock Controller for SM6115</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm display clock control module provides the clocks and power domains</div><div class='add'>+  on SM6115.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm6115-dispcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm6115-dispcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Board sleep clock</div><div class='add'>+      - description: Byte clock from DSI PHY0</div><div class='add'>+      - description: Pixel clock from DSI PHY0</div><div class='add'>+      - description: GPLL0 DISP DIV clock from GCC</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm6115.h&gt;</div><div class='add'>+    clock-controller@5f00000 {</div><div class='add'>+      compatible = "qcom,sm6115-dispcc";</div><div class='add'>+      reg = &lt;0x5f00000 0x20000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;dsi0_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dsi0_phy 1&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_DISP_GPLL0_DIV_CLK_SRC&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml<br/>new file mode 100644<br/>index 000000000000..cf19f44af774<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Graphics Clock &amp; Reset Controller on SM6115</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm graphics clock control module provides clocks, resets and power</div><div class='add'>+  domains on Qualcomm SoCs.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm6115-gpucc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: GPLL0 main branch source</div><div class='add'>+      - description: GPLL0 main div source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm6115.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller@5990000 {</div><div class='add'>+            compatible = "qcom,sm6115-gpucc";</div><div class='add'>+            reg = &lt;0x05990000 0x9000&gt;;</div><div class='add'>+            clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+            #power-domain-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml<br/>new file mode 100644<br/>index 000000000000..374a1844a159<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Graphics Clock &amp; Reset Controller on SM6125</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm graphics clock control module provides clocks and power domains on</div><div class='add'>+  Qualcomm SoCs.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm6125-gpucc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: GPLL0 main branch source</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm6125.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller@5990000 {</div><div class='add'>+            compatible = "qcom,sm6125-gpucc";</div><div class='add'>+            reg = &lt;0x05990000 0x9000&gt;;</div><div class='add'>+            clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #power-domain-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6350-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6350-camcc.yaml<br/>new file mode 100644<br/>index 000000000000..fd6658cb793d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm6350-camcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm6350-camcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm6350-camcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Camera Clock &amp; Reset Controller on SM6350</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm camera clock control module provides the clocks, resets and  power</div><div class='add'>+  domains on SM6350.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm6350-camcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm6350-camcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    clock-controller@ad00000 {</div><div class='add'>+      compatible = "qcom,sm6350-camcc";</div><div class='add'>+      reg = &lt;0x0ad00000 0x16000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml<br/>new file mode 100644<br/>index 000000000000..183b1c75dbdf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm6375-dispcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller on SM6375</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM6375.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,dispcc-sm6375.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm6375-dispcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: GPLL0 source from GCC</div><div class='add'>+      - description: Byte clock from DSI PHY</div><div class='add'>+      - description: Pixel clock from DSI PHY</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm6375-gcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+</div><div class='add'>+    clock-controller@5f00000 {</div><div class='add'>+      compatible = "qcom,sm6375-dispcc";</div><div class='add'>+      reg = &lt;0x05f00000 0x20000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_DISP_GPLL0_CLK_SRC&gt;,</div><div class='add'>+               &lt;&amp;dsi_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dsi_phy 1&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..295d4bb1a966<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm6375-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM6375</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM6375</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm6375-gcc.h</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm6375-gcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Board XO Active-Only source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    clock-controller@1400000 {</div><div class='add'>+      compatible = "qcom,sm6375-gcc";</div><div class='add'>+      reg = &lt;0x01400000 0x1f0000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='add'>+               &lt;&amp;rpmcc RPM_SMD_XO_A_CLK_SRC&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml<br/>new file mode 100644<br/>index 000000000000..b480ead5bd69<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Graphics Clock &amp; Reset Controller on SM6375</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm graphics clock control module provides clocks, resets and power</div><div class='add'>+  domains on Qualcomm SoCs.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm6375-gpucc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: GPLL0 main branch source</div><div class='add'>+      - description: GPLL0 div branch source</div><div class='add'>+      - description: SNoC DVM GFX source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm6375-gcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller@5990000 {</div><div class='add'>+            compatible = "qcom,sm6375-gpucc";</div><div class='add'>+            reg = &lt;0 0x05990000 0 0x9000&gt;;</div><div class='add'>+            clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_GPU_GPLL0_CLK_SRC&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_GPU_GPLL0_DIV_CLK_SRC&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_GPU_SNOC_DVM_GFX_CLK&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+            #power-domain-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm7150-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm7150-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..0eb76d9d51c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm7150-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm7150-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm7150-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM7150</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Danila Tikhonov &lt;danila@jiaxyga.com&gt;</div><div class='add'>+  - David Wronek &lt;davidwronek@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM7150</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm7150-gcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm7150-gcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Board XO Active-Only source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    clock-controller@100000 {</div><div class='add'>+      compatible = "qcom,sm7150-gcc";</div><div class='add'>+      reg = &lt;0x00100000 0x001f0000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml<br/>new file mode 100644<br/>index 000000000000..87ae74166807<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Camera Clock &amp; Reset Controller on SM8450</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm camera clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8450.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm8450-camcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8450-camcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Camera AHB clock from GCC</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Board active XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      A phandle and PM domain specifier for the MMCX power domain.</div><div class='add'>+</div><div class='add'>+  required-opps:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      A phandle to an OPP node describing required MMCX performance point.</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - required-opps</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8450.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    clock-controller@ade0000 {</div><div class='add'>+      compatible = "qcom,sm8450-camcc";</div><div class='add'>+      reg = &lt;0xade0000 0x20000&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_CAMERA_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;;</div><div class='add'>+      power-domains = &lt;&amp;rpmhpd SM8450_MMCX&gt;;</div><div class='add'>+      required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml<br/>new file mode 100644<br/>index 000000000000..1dd1f696dcd3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm8450-dispcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller for SM8450</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8450.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm8450-dispcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm8450-dispcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Board Always On XO source</div><div class='add'>+      - description: Display's AHB clock</div><div class='add'>+      - description: sleep clock</div><div class='add'>+      - description: Byte clock from DSI PHY0</div><div class='add'>+      - description: Pixel clock from DSI PHY0</div><div class='add'>+      - description: Byte clock from DSI PHY1</div><div class='add'>+      - description: Pixel clock from DSI PHY1</div><div class='add'>+      - description: Link clock from DP PHY0</div><div class='add'>+      - description: VCO DIV clock from DP PHY0</div><div class='add'>+      - description: Link clock from DP PHY1</div><div class='add'>+      - description: VCO DIV clock from DP PHY1</div><div class='add'>+      - description: Link clock from DP PHY2</div><div class='add'>+      - description: VCO DIV clock from DP PHY2</div><div class='add'>+      - description: Link clock from DP PHY3</div><div class='add'>+      - description: VCO DIV clock from DP PHY3</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    description:</div><div class='add'>+      A phandle and PM domain specifier for the MMCX power domain.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  required-opps:</div><div class='add'>+    description:</div><div class='add'>+      A phandle to an OPP node describing required MMCX performance point.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8450.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    clock-controller@af00000 {</div><div class='add'>+      compatible = "qcom,sm8450-dispcc";</div><div class='add'>+      reg = &lt;0x0af00000 0x10000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;dsi0_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dsi0_phy 1&gt;,</div><div class='add'>+               &lt;&amp;dsi1_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dsi1_phy 1&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      power-domains = &lt;&amp;rpmhpd SM8450_MMCX&gt;;</div><div class='add'>+      required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml<br/>new file mode 100644<br/>index 000000000000..ab25f7cbaa2e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm8550-dispcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display Clock &amp; Reset Controller for SM8550</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm display clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8550.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm8550-dispcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm8550-dispcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Board Always On XO source</div><div class='add'>+      - description: Display's AHB clock</div><div class='add'>+      - description: sleep clock</div><div class='add'>+      - description: Byte clock from DSI PHY0</div><div class='add'>+      - description: Pixel clock from DSI PHY0</div><div class='add'>+      - description: Byte clock from DSI PHY1</div><div class='add'>+      - description: Pixel clock from DSI PHY1</div><div class='add'>+      - description: Link clock from DP PHY0</div><div class='add'>+      - description: VCO DIV clock from DP PHY0</div><div class='add'>+      - description: Link clock from DP PHY1</div><div class='add'>+      - description: VCO DIV clock from DP PHY1</div><div class='add'>+      - description: Link clock from DP PHY2</div><div class='add'>+      - description: VCO DIV clock from DP PHY2</div><div class='add'>+      - description: Link clock from DP PHY3</div><div class='add'>+      - description: VCO DIV clock from DP PHY3</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    description:</div><div class='add'>+      A phandle and PM domain specifier for the MMCX power domain.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  required-opps:</div><div class='add'>+    description:</div><div class='add'>+      A phandle to an OPP node describing required MMCX performance point.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-gcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    clock-controller@af00000 {</div><div class='add'>+      compatible = "qcom,sm8550-dispcc";</div><div class='add'>+      reg = &lt;0x0af00000 0x10000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK_A&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;dsi0_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dsi0_phy 1&gt;,</div><div class='add'>+               &lt;&amp;dsi1_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dsi1_phy 1&gt;,</div><div class='add'>+               &lt;&amp;dp0_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dp0_phy 1&gt;,</div><div class='add'>+               &lt;&amp;dp1_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dp1_phy 1&gt;,</div><div class='add'>+               &lt;&amp;dp2_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dp2_phy 1&gt;,</div><div class='add'>+               &lt;&amp;dp3_phy 0&gt;,</div><div class='add'>+               &lt;&amp;dp3_phy 1&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+      power-domains = &lt;&amp;rpmhpd SM8550_MMCX&gt;;</div><div class='add'>+      required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml<br/>new file mode 100644<br/>index 000000000000..0c706de31cf1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm8550-gcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Global Clock &amp; Reset Controller on SM8550</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm global clock control module provides the clocks, resets and power</div><div class='add'>+  domains on SM8550</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm8550-gcc.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8550-gcc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+      - description: Sleep clock source</div><div class='add'>+      - description: PCIE 0 Pipe clock source</div><div class='add'>+      - description: PCIE 1 Pipe clock source</div><div class='add'>+      - description: PCIE 1 Phy Auxiliary clock source</div><div class='add'>+      - description: UFS Phy Rx symbol 0 clock source</div><div class='add'>+      - description: UFS Phy Rx symbol 1 clock source</div><div class='add'>+      - description: UFS Phy Tx symbol 0 clock source</div><div class='add'>+      - description: USB3 Phy wrapper pipe clock source</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,gcc.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    clock-controller@100000 {</div><div class='add'>+      compatible = "qcom,sm8550-gcc";</div><div class='add'>+      reg = &lt;0x00100000 0x001f4200&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;sleep_clk&gt;,</div><div class='add'>+               &lt;&amp;pcie0_phy&gt;,</div><div class='add'>+               &lt;&amp;pcie1_phy&gt;,</div><div class='add'>+               &lt;&amp;pcie_1_phy_aux_clk&gt;,</div><div class='add'>+               &lt;&amp;ufs_mem_phy 0&gt;,</div><div class='add'>+               &lt;&amp;ufs_mem_phy 1&gt;,</div><div class='add'>+               &lt;&amp;ufs_mem_phy 2&gt;,</div><div class='add'>+               &lt;&amp;usb_1_qmpphy&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml<br/>new file mode 100644<br/>index 000000000000..1bf1a41fd89c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,sm8550-tcsr.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,sm8550-tcsr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm TCSR Clock Controller on SM8550</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm TCSR clock control module provides the clocks, resets and</div><div class='add'>+  power domains on SM8550</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/clock/qcom,sm8550-tcsr.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: qcom,sm8550-tcsr</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: TCXO pad clock</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+</div><div class='add'>+    clock-controller@1fc0000 {</div><div class='add'>+      compatible = "qcom,sm8550-tcsr", "syscon";</div><div class='add'>+      reg = &lt;0x1fc0000 0x30000&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.txt b/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.txt<br/>deleted file mode 100644<br/>index 7474aba36607..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv)</div><div class='del'>-</div><div class='del'>-clkdiv configures the clock frequency of a set of outputs on the PMIC.</div><div class='del'>-These clocks are typically wired through alternate functions on</div><div class='del'>-gpio pins.</div><div class='del'>-</div><div class='del'>-=======================</div><div class='del'>-Properties</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-- compatible</div><div class='del'>-	Usage:      required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,spmi-clkdiv".</div><div class='del'>-</div><div class='del'>-- reg</div><div class='del'>-	Usage:      required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: base address of CLKDIV peripherals.</div><div class='del'>-</div><div class='del'>-- qcom,num-clkdivs</div><div class='del'>-	Usage:      required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: number of CLKDIV peripherals.</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to the xo clock.</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "xo".</div><div class='del'>-</div><div class='del'>-- #clock-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: shall contain 1.</div><div class='del'>-</div><div class='del'>-=======</div><div class='del'>-Example</div><div class='del'>-=======</div><div class='del'>-</div><div class='del'>-pm8998_clk_divs: clock-controller@5b00 {</div><div class='del'>-	compatible = "qcom,spmi-clkdiv";</div><div class='del'>-	reg = &lt;0x5b00&gt;;</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-	qcom,num-clkdivs = &lt;3&gt;;</div><div class='del'>-	clocks = &lt;&amp;xo_board&gt;;</div><div class='del'>-	clock-names = "xo";</div><div class='del'>-</div><div class='del'>-	assigned-clocks = &lt;&amp;pm8998_clk_divs 1&gt;,</div><div class='del'>-			  &lt;&amp;pm8998_clk_divs 2&gt;,</div><div class='del'>-			  &lt;&amp;pm8998_clk_divs 3&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;9600000&gt;,</div><div class='del'>-			       &lt;9600000&gt;,</div><div class='del'>-			       &lt;9600000&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.yaml b/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.yaml<br/>new file mode 100644<br/>index 000000000000..16c95ad6c9d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,spmi-clkdiv.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SPMI PMIC clock divider</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm SPMI PMIC clock divider configures the clock frequency of a set of</div><div class='add'>+  outputs on the PMIC.  These clocks are typically wired through alternate</div><div class='add'>+  functions on GPIO pins.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,spmi-clkdiv</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Board XO source</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  qcom,num-clkdivs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Number of CLKDIV peripherals.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - qcom,num-clkdivs</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pmic {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller@5b00 {</div><div class='add'>+            compatible = "qcom,spmi-clkdiv";</div><div class='add'>+            reg = &lt;0x5b00&gt;;</div><div class='add'>+            clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+            clock-names = "xo";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            qcom,num-clkdivs = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;pm8998_clk_divs 1&gt;,</div><div class='add'>+                              &lt;&amp;pm8998_clk_divs 2&gt;,</div><div class='add'>+                              &lt;&amp;pm8998_clk_divs 3&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;9600000&gt;,</div><div class='add'>+                                   &lt;9600000&gt;,</div><div class='add'>+                                   &lt;9600000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml<br/>index 3cdbcebdc1a1..2b07146161b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,videocc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/qcom,videocc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/qcom,videocc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/qcom,videocc.yaml</a></div><div class='hunk'>@@ -4,21 +4,21 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Video Clock &amp; Reset Controller Binding</div><div class='add'>+title: Qualcomm Video Clock &amp; Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Taniya Das &lt;tdas@codeaurora.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Qualcomm video clock control module which supports the clocks, resets and</div><div class='del'>-  power domains on Qualcomm SoCs.</div><div class='add'>+  Qualcomm video clock control module provides the clocks, resets and power</div><div class='add'>+  domains on Qualcomm SoCs.</div><div class='ctx'> </div><div class='del'>-  See also:</div><div class='del'>-    dt-bindings/clock/qcom,videocc-sc7180.h</div><div class='del'>-    dt-bindings/clock/qcom,videocc-sc7280.h</div><div class='del'>-    dt-bindings/clock/qcom,videocc-sdm845.h</div><div class='del'>-    dt-bindings/clock/qcom,videocc-sm8150.h</div><div class='del'>-    dt-bindings/clock/qcom,videocc-sm8250.h</div><div class='add'>+  See also::</div><div class='add'>+    include/dt-bindings/clock/qcom,videocc-sc7180.h</div><div class='add'>+    include/dt-bindings/clock/qcom,videocc-sc7280.h</div><div class='add'>+    include/dt-bindings/clock/qcom,videocc-sdm845.h</div><div class='add'>+    include/dt-bindings/clock/qcom,videocc-sm8150.h</div><div class='add'>+    include/dt-bindings/clock/qcom,videocc-sm8250.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,12 +30,12 @@ properties:</div><div class='ctx'>       - qcom,sm8250-videocc</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Board XO source</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: bi_tcxo</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   '#clock-cells':</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -68,6 +68,57 @@ required:</div><div class='ctx'>   - '#reset-cells'</div><div class='ctx'>   - '#power-domain-cells'</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc7180-videocc</div><div class='add'>+            - qcom,sdm845-videocc</div><div class='add'>+            - qcom,sm8150-videocc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc7280-videocc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Board active XO source</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+            - const: bi_tcxo_ao</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8250-videocc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: AHB</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Board active XO source</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bi_tcxo</div><div class='add'>+            - const: bi_tcxo_ao</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,9series.yaml b/Documentation/devicetree/bindings/clock/renesas,9series.yaml<br/>index 102eb95cb3fc..3afdebdb52ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,9series.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,9series.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,9series.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/renesas,9series.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/renesas,9series.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for Renesas 9-series I2C PCIe clock generators</div><div class='add'>+title: Renesas 9-series I2C PCIe clock generators</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Renesas 9-series are I2C PCIe clock generators providing</div><div class='hunk'>@@ -16,6 +16,11 @@ description: |</div><div class='ctx'>   - 9FGV0241:</div><div class='ctx'>     0 -- DIF0</div><div class='ctx'>     1 -- DIF1</div><div class='add'>+  - 9FGV0441:</div><div class='add'>+    0 -- DIF0</div><div class='add'>+    1 -- DIF1</div><div class='add'>+    2 -- DIF2</div><div class='add'>+    3 -- DIF3</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marek Vasut &lt;marex@denx.de&gt;</div><div class='hunk'>@@ -24,6 +29,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - renesas,9fgv0241</div><div class='add'>+      - renesas,9fgv0441</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description: I2C device address</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml<br/>index e0b86214f0f5..9c3dc6c4fa94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas Clock Pulse Generator / Module Standby and Software Reset</div><div class='ctx'> </div><div class='hunk'>@@ -49,6 +49,7 @@ properties:</div><div class='ctx'>       - renesas,r8a77995-cpg-mssr # R-Car D3</div><div class='ctx'>       - renesas,r8a779a0-cpg-mssr # R-Car V3U</div><div class='ctx'>       - renesas,r8a779f0-cpg-mssr # R-Car S4-8</div><div class='add'>+      - renesas,r8a779g0-cpg-mssr # R-Car V4H</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt b/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt<br/>deleted file mode 100644<br/>index 399e0da22348..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,h8300-div-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-* Renesas H8/300 divider clock</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-  - compatible: Must be "renesas,h8300-div-clock"</div><div class='del'>-</div><div class='del'>-  - clocks: Reference to the parent clocks ("extal1" and "extal2")</div><div class='del'>-</div><div class='del'>-  - #clock-cells: Must be 1</div><div class='del'>-</div><div class='del'>-  - reg: Base address and length of the divide rate selector</div><div class='del'>-</div><div class='del'>-  - renesas,width: bit width of selector</div><div class='del'>-</div><div class='del'>-Example</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-		cclk: cclk {</div><div class='del'>-			compatible = "renesas,h8300-div-clock";</div><div class='del'>-			clocks = &lt;&amp;xclk&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0xfee01b 2&gt;;</div><div class='del'>-			renesas,width = &lt;2&gt;;</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt b/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt<br/>deleted file mode 100644<br/>index 500cdadbceb7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,h8s2678-pll-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-Renesas H8S2678 PLL clock</div><div class='del'>-</div><div class='del'>-This device is Clock multiplyer</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-  - compatible: Must be "renesas,h8s2678-pll-clock"</div><div class='del'>-</div><div class='del'>-  - clocks: Reference to the parent clocks</div><div class='del'>-</div><div class='del'>-  - #clock-cells: Must be 0</div><div class='del'>-</div><div class='del'>-  - reg: Two rate selector (Multiply / Divide) register address</div><div class='del'>-</div><div class='del'>-Example</div><div class='del'>--------</div><div class='del'>-</div><div class='del'>-		pllclk: pllclk {</div><div class='del'>-			compatible = "renesas,h8s2678-pll-clock";</div><div class='del'>-			clocks = &lt;&amp;xclk&gt;;</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0xfee03b 2&gt;, &lt;0xfee045 2&gt;;</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml b/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml<br/>index 25dbb0fac065..99686085f751 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/renesas,r9a06g032-sysctrl.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Renesas RZ/N1D (R9A06G032) System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Gareth Williams &lt;gareth.williams.jx@renesas.com&gt;</div><div class='add'>+  - Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -39,6 +39,17 @@ properties:</div><div class='ctx'>   '#power-domain-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^dma-router@[a-f0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: "../dma/renesas,rzn1-dmamux.yaml#"</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml b/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml<br/>index 6eaabb4d82ec..c84f29f1810f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/renesas,rcar-usb2-clock-sel.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/clock/renesas,rcar-usb2-clock-sel.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas R-Car USB 2.0 clock selector</div><div class='ctx'> </div><div class='hunk'>@@ -47,7 +47,6 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 4</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='hunk'>@@ -64,7 +63,6 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml<br/>index bd3af8fc616b..fe2fba18ae84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml</a></div><div class='hunk'>@@ -1,17 +1,18 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Renesas RZ/{G2L,V2L} Clock Pulse Generator / Module Standby Mode</div><div class='add'>+title: Renesas RZ/{G2L,V2L,V2M} Clock Pulse Generator / Module Standby Mode</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  On Renesas RZ/{G2L,V2L} SoC, the CPG (Clock Pulse Generator) and Module</div><div class='del'>-  Standby Mode share the same register block.</div><div class='add'>+  On Renesas RZ/{G2L,V2L}-alike SoC's, the CPG (Clock Pulse Generator) and Module</div><div class='add'>+  Standby Mode share the same register block. On RZ/V2M, the functionality is</div><div class='add'>+  similar, but does not have Clock Monitor Registers.</div><div class='ctx'> </div><div class='ctx'>   They provide the following functionalities:</div><div class='ctx'>     - The CPG block generates various core clocks,</div><div class='hunk'>@@ -23,8 +24,10 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='del'>-      - renesas,r9a07g044-cpg  # RZ/G2{L,LC}</div><div class='del'>-      - renesas,r9a07g054-cpg  # RZ/V2L</div><div class='add'>+      - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five</div><div class='add'>+      - renesas,r9a07g044-cpg # RZ/G2{L,LC}</div><div class='add'>+      - renesas,r9a07g054-cpg # RZ/V2L</div><div class='add'>+      - renesas,r9a09g011-cpg # RZ/V2M</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -42,9 +45,9 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"</div><div class='ctx'>         and a core clock reference, as defined in</div><div class='del'>-        &lt;dt-bindings/clock/r9a07g*-cpg.h&gt;</div><div class='add'>+        &lt;dt-bindings/clock/r9a0*-cpg.h&gt;,</div><div class='ctx'>       - For module clocks, the two clock specifier cells must be "CPG_MOD" and</div><div class='del'>-        a module number, as defined in the &lt;dt-bindings/clock/r9a07g0*-cpg.h&gt;.</div><div class='add'>+        a module number, as defined in &lt;dt-bindings/clock/r9a0*-cpg.h&gt;.</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'>   '#power-domain-cells':</div><div class='hunk'>@@ -58,7 +61,7 @@ properties:</div><div class='ctx'>   '#reset-cells':</div><div class='ctx'>     description:</div><div class='ctx'>       The single reset specifier cell must be the module number, as defined in</div><div class='del'>-      the &lt;dt-bindings/clock/r9a07g0*-cpg.h&gt;.</div><div class='add'>+      &lt;dt-bindings/clock/r9a0*-cpg.h&gt;.</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml b/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml<br/>new file mode 100644<br/>index 000000000000..b339f1f9f072<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/renesas,versaclock7.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/renesas,versaclock7.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas Versaclock7 Programmable Clock</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alex Helms &lt;alexander.helms.jy@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Renesas Versaclock7 is a family of configurable clock generator and</div><div class='add'>+  jitter attenuator ICs with fractional and integer dividers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - renesas,rc21008a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: External crystal or oscillator</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xin</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    vc7_xin: clock {</div><div class='add'>+        compatible = "fixed-clock";</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+        clock-frequency = &lt;49152000&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    i2c@0 {</div><div class='add'>+        reg = &lt;0x0 0x100&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        vc7: clock-controller@9 {</div><div class='add'>+            compatible = "renesas,rc21008a";</div><div class='add'>+            reg = &lt;0x9&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            clocks = &lt;&amp;vc7_xin&gt;;</div><div class='add'>+            clock-names = "xin";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt<br/>deleted file mode 100644<br/>index 55e78cddec8c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,px30-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,70 +0,0 @@</div><div class='del'>-* Rockchip PX30 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The PX30 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: PMU for CRU should be "rockchip,px30-pmu-cru"</div><div class='del'>-- compatible: CRU should be "rockchip,px30-cru"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- clocks: A list of phandle + clock-specifier pairs for the clocks listed</div><div class='del'>-          in clock-names</div><div class='del'>-- clock-names: Should contain the following:</div><div class='del'>-  - "xin24m" for both PMUCRU and CRU</div><div class='del'>-  - "gpll" for CRU (sourced from PMUCRU)</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing, pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "xin32k" - rtc clock - optional,</div><div class='del'>- - "i2sx_clkin" - external I2S clock - optional,</div><div class='del'>- - "gmac_clkin" - external GMAC clock - optional</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	pmucru: clock-controller@ff2bc000 {</div><div class='del'>-		compatible = "rockchip,px30-pmucru";</div><div class='del'>-		reg = &lt;0x0 0xff2bc000 0x0 0x1000&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	cru: clock-controller@ff2b0000 {</div><div class='del'>-		compatible = "rockchip,px30-cru";</div><div class='del'>-		reg = &lt;0x0 0xff2b0000 0x0 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@ff030000 {</div><div class='del'>-		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x0 0xff030000 0x0 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;pmucru SCLK_UART0_PMU&gt;, &lt;&amp;pmucru PCLK_UART0_PMU&gt;;</div><div class='del'>-		clock-names = "baudclk", "apb_pclk";</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml<br/>new file mode 100644<br/>index 000000000000..0f0f64b6f8cb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,px30-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,px30-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip PX30 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The PX30 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"     - crystal input       - required</div><div class='add'>+    - "xin32k"     - rtc clock           - optional</div><div class='add'>+    - "i2sx_clkin" - external I2S clock  - optional</div><div class='add'>+    - "gmac_clkin" - external GMAC clock - optional</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,px30-cru</div><div class='add'>+      - rockchip,px30-pmucru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Clock for both PMUCRU and CRU</div><div class='add'>+      - description: Clock for CRU (sourced from PMUCRU)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: xin24m</div><div class='add'>+      - const: gpll</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,px30-cru</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/px30-cru.h&gt;</div><div class='add'>+</div><div class='add'>+    pmucru: clock-controller@ff2bc000 {</div><div class='add'>+      compatible = "rockchip,px30-pmucru";</div><div class='add'>+      reg = &lt;0xff2bc000 0x1000&gt;;</div><div class='add'>+      clocks = &lt;&amp;xin24m&gt;;</div><div class='add'>+      clock-names = "xin24m";</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    cru: clock-controller@ff2b0000 {</div><div class='add'>+      compatible = "rockchip,px30-cru";</div><div class='add'>+      reg = &lt;0xff2b0000 0x1000&gt;;</div><div class='add'>+      clocks = &lt;&amp;xin24m&gt;, &lt;&amp;pmucru PLL_GPLL&gt;;</div><div class='add'>+      clock-names = "xin24m", "gpll";</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt<br/>deleted file mode 100644<br/>index 20df350b9ef3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,56 +0,0 @@</div><div class='del'>-* Rockchip RK3036 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RK3036 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "rockchip,rk3036-cru"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "ext_i2s" - external I2S clock - optional,</div><div class='del'>- - "rmii_clkin" - external EMAC clock - optional</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: cru@20000000 {</div><div class='del'>-		compatible = "rockchip,rk3036-cru";</div><div class='del'>-		reg = &lt;0x20000000 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@20060000 {</div><div class='del'>-		compatible = "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x20060000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml<br/>new file mode 100644<br/>index 000000000000..ba5b45464315<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3036 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3036 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"     - crystal input       - required</div><div class='add'>+    - "ext_i2s"    - external I2S clock  - optional</div><div class='add'>+    - "rmii_clkin" - external EMAC clock - optional</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3036-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@20000000 {</div><div class='add'>+      compatible = "rockchip,rk3036-cru";</div><div class='add'>+      reg = &lt;0x20000000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt<br/>deleted file mode 100644<br/>index 6f8744fd301b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-* Rockchip RK3126/RK3128 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RK3126/RK3128 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "rockchip,rk3126-cru" or "rockchip,rk3128-cru"</div><div class='del'>-  "rockchip,rk3126-cru" - controller compatible with RK3126 SoC.</div><div class='del'>-  "rockchip,rk3128-cru" - controller compatible with RK3128 SoC.</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "ext_i2s" - external I2S clock - optional,</div><div class='del'>- - "gmac_clkin" - external GMAC clock - optional</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: cru@20000000 {</div><div class='del'>-		compatible = "rockchip,rk3128-cru";</div><div class='del'>-		reg = &lt;0x20000000 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart2: serial@20068000 {</div><div class='del'>-		compatible = "rockchip,serial";</div><div class='del'>-		reg = &lt;0x20068000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART2&gt;, &lt;&amp;cru PCLK_UART2&gt;;</div><div class='del'>-		clock-names = "sclk_uart", "pclk_uart";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml<br/>new file mode 100644<br/>index 000000000000..b3d9c8eca989<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3128-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3126/RK3128 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3126/RK3128 clock controller generates and supplies clock to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3126-cru</div><div class='add'>+      - rockchip,rk3128-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: xin24m</div><div class='add'>+      - enum:</div><div class='add'>+          - ext_i2s</div><div class='add'>+          - gmac_clkin</div><div class='add'>+      - enum:</div><div class='add'>+          - ext_i2s</div><div class='add'>+          - gmac_clkin</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@20000000 {</div><div class='add'>+      compatible = "rockchip,rk3128-cru";</div><div class='add'>+      reg = &lt;0x20000000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt<br/>deleted file mode 100644<br/>index 7f368530a2e4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,61 +0,0 @@</div><div class='del'>-* Rockchip RK3188/RK3066 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RK3188/RK3066 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "rockchip,rk3188-cru", "rockchip,rk3188a-cru" or</div><div class='del'>-			"rockchip,rk3066a-cru"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rk3188-cru.h and</div><div class='del'>-dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.</div><div class='del'>-Similar macros exist for the reset sources in these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "xin32k" - rtc clock - optional,</div><div class='del'>- - "xin27m" - 27mhz crystal input on rk3066 - optional,</div><div class='del'>- - "ext_hsadc" - external HSADC clock - optional,</div><div class='del'>- - "ext_cif0" - external camera clock - optional,</div><div class='del'>- - "ext_rmii" - external RMII clock - optional,</div><div class='del'>- - "ext_jtag" - externalJTAG clock - optional</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: cru@20000000 {</div><div class='del'>-		compatible = "rockchip,rk3188-cru";</div><div class='del'>-		reg = &lt;0x20000000 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@10124000 {</div><div class='del'>-		compatible = "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x10124000 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;1&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml<br/>new file mode 100644<br/>index 000000000000..ddd7e46af0f2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3188-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3188-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3188/RK3066 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3188/RK3066 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rk3188-cru.h and</div><div class='add'>+  dt-bindings/clock/rk3066-cru.h headers and can be used in device tree sources.</div><div class='add'>+  Similar macros exist for the reset sources in these files.</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"    - crystal input                 - required</div><div class='add'>+    - "xin32k"    - RTC clock                     - optional</div><div class='add'>+    - "xin27m"    - 27mhz crystal input on RK3066 - optional</div><div class='add'>+    - "ext_hsadc" - external HSADC clock          - optional</div><div class='add'>+    - "ext_cif0"  - external camera clock         - optional</div><div class='add'>+    - "ext_rmii"  - external RMII clock           - optional</div><div class='add'>+    - "ext_jtag"  - external JTAG clock           - optional</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3066a-cru</div><div class='add'>+      - rockchip,rk3188-cru</div><div class='add'>+      - rockchip,rk3188a-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@20000000 {</div><div class='add'>+      compatible = "rockchip,rk3188-cru";</div><div class='add'>+      reg = &lt;0x20000000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt<br/>deleted file mode 100644<br/>index f323048127eb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-* Rockchip RK3228 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RK3228 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "rockchip,rk3228-cru"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rk3228-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "ext_i2s" - external I2S clock - optional,</div><div class='del'>- - "ext_gmac" - external GMAC clock - optional</div><div class='del'>- - "ext_hsadc" - external HSADC clock - optional</div><div class='del'>- - "phy_50m_out" - output clock of the pll in the mac phy</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: cru@20000000 {</div><div class='del'>-		compatible = "rockchip,rk3228-cru";</div><div class='del'>-		reg = &lt;0x20000000 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@10110000 {</div><div class='del'>-		compatible = "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x10110000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml<br/>new file mode 100644<br/>index 000000000000..1050fff72ade<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3228-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3228-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3228 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3228 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rk3228-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"      - crystal input                          - required</div><div class='add'>+    - "ext_i2s"     - external I2S clock                     - optional</div><div class='add'>+    - "ext_gmac"    - external GMAC clock                    - optional</div><div class='add'>+    - "ext_hsadc"   - external HSADC clock                   - optional</div><div class='add'>+    - "phy_50m_out" - output clock of the pll in the mac phy</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3228-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@20000000 {</div><div class='add'>+      compatible = "rockchip,rk3228-cru";</div><div class='add'>+      reg = &lt;0x20000000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt<br/>deleted file mode 100644<br/>index bf3a9ec19241..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,67 +0,0 @@</div><div class='del'>-* Rockchip RK3288 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RK3288 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-A revision of this SoC is available: rk3288w. The clock tree is a bit</div><div class='del'>-different so another dt-compatible is available. Noticed that it is only</div><div class='del'>-setting the difference but there is no automatic revision detection. This</div><div class='del'>-should be performed by bootloaders.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "rockchip,rk3288-cru" or "rockchip,rk3288w-cru" in</div><div class='del'>-  case of this revision of Rockchip rk3288.</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "xin32k" - rtc clock - optional,</div><div class='del'>- - "ext_i2s" - external I2S clock - optional,</div><div class='del'>- - "ext_hsadc" - external HSADC clock - optional,</div><div class='del'>- - "ext_edp_24m" - external display port clock - optional,</div><div class='del'>- - "ext_vip" - external VIP clock - optional,</div><div class='del'>- - "ext_isp" - external ISP clock - optional,</div><div class='del'>- - "ext_jtag" - external JTAG clock - optional</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: cru@20000000 {</div><div class='del'>-		compatible = "rockchip,rk3188-cru";</div><div class='del'>-		reg = &lt;0x20000000 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@10124000 {</div><div class='del'>-		compatible = "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x10124000 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;1&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml<br/>new file mode 100644<br/>index 000000000000..6655e97d52e4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3288-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3288-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3288 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3288 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+</div><div class='add'>+  A revision of this SoC is available: rk3288w. The clock tree is a bit</div><div class='add'>+  different so another dt-compatible is available. Noticed that it is only</div><div class='add'>+  setting the difference but there is no automatic revision detection. This</div><div class='add'>+  should be performed by boot loaders.</div><div class='add'>+</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rk3288-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"      - crystal input               - required,</div><div class='add'>+    - "xin32k"      - rtc clock                   - optional,</div><div class='add'>+    - "ext_i2s"     - external I2S clock          - optional,</div><div class='add'>+    - "ext_hsadc"   - external HSADC clock        - optional,</div><div class='add'>+    - "ext_edp_24m" - external display port clock - optional,</div><div class='add'>+    - "ext_vip"     - external VIP clock          - optional,</div><div class='add'>+    - "ext_isp"     - external ISP clock          - optional,</div><div class='add'>+    - "ext_jtag"    - external JTAG clock         - optional</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3288-cru</div><div class='add'>+      - rockchip,rk3288w-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@ff760000 {</div><div class='add'>+      compatible = "rockchip,rk3288-cru";</div><div class='add'>+      reg = &lt;0xff760000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt<br/>deleted file mode 100644<br/>index 9b151c5b0c90..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,60 +0,0 @@</div><div class='del'>-* Rockchip RK3308 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RK3308 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: CRU should be "rockchip,rk3308-cru"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing, pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "xin32k" - rtc clock - optional,</div><div class='del'>- - "mclk_i2s0_8ch_in", "mclk_i2s1_8ch_in", "mclk_i2s2_8ch_in",</div><div class='del'>-   "mclk_i2s3_8ch_in", "mclk_i2s0_2ch_in",</div><div class='del'>-   "mclk_i2s1_2ch_in" - external I2S or SPDIF clock - optional,</div><div class='del'>- - "mac_clkin" - external MAC clock - optional</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: clock-controller@ff500000 {</div><div class='del'>-		compatible = "rockchip,rk3308-cru";</div><div class='del'>-		reg = &lt;0x0 0xff500000 0x0 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@ff0a0000 {</div><div class='del'>-		compatible = "rockchip,rk3308-uart", "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x0 0xff0a0000 0x0 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART0&gt;, &lt;&amp;cru PCLK_UART0&gt;;</div><div class='del'>-		clock-names = "baudclk", "apb_pclk";</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml<br/>new file mode 100644<br/>index 000000000000..fec37f5b80f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3308-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3308-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3308 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3308 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rk3308-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"                               - crystal input      - required</div><div class='add'>+    - "xin32k"                               - rtc clock          - optional</div><div class='add'>+    - "mclk_i2s0_8ch_in", "mclk_i2s1_8ch_in",</div><div class='add'>+      "mclk_i2s2_8ch_in", "mclk_i2s3_8ch_in",</div><div class='add'>+      "mclk_i2s0_2ch_in", "mclk_i2s1_2ch_in" - external I2S or</div><div class='add'>+                                               SPDIF clock        - optional</div><div class='add'>+    - "mac_clkin"                            - external MAC clock - optional</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3308-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@ff500000 {</div><div class='add'>+      compatible = "rockchip,rk3308-cru";</div><div class='add'>+      reg = &lt;0xff500000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt<br/>deleted file mode 100644<br/>index 7c8bbcfed8d2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,61 +0,0 @@</div><div class='del'>-* Rockchip RK3368 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RK3368 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "rockchip,rk3368-cru"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing, pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rk3368-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "xin32k" - rtc clock - optional,</div><div class='del'>- - "ext_i2s" - external I2S clock - optional,</div><div class='del'>- - "ext_gmac" - external GMAC clock - optional</div><div class='del'>- - "ext_hsadc" - external HSADC clock - optional,</div><div class='del'>- - "ext_isp" - external ISP clock - optional,</div><div class='del'>- - "ext_jtag" - external JTAG clock - optional</div><div class='del'>- - "ext_vip" - external VIP clock - optional,</div><div class='del'>- - "usbotg_out" - output clock of the pll in the otg phy</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: clock-controller@ff760000 {</div><div class='del'>-		compatible = "rockchip,rk3368-cru";</div><div class='del'>-		reg = &lt;0x0 0xff760000 0x0 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@10124000 {</div><div class='del'>-		compatible = "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x10124000 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;1&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml<br/>new file mode 100644<br/>index 000000000000..90af242b41c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3368-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3368-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3368 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3368 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rk3368-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"     - crystal input                          - required</div><div class='add'>+    - "xin32k"     - rtc clock                              - optional</div><div class='add'>+    - "ext_i2s"    - external I2S clock                     - optional</div><div class='add'>+    - "ext_gmac"   - external GMAC clock                    - optional</div><div class='add'>+    - "ext_hsadc"  - external HSADC clock                   - optional</div><div class='add'>+    - "ext_isp"    - external ISP clock                     - optional</div><div class='add'>+    - "ext_jtag"   - external JTAG clock                    - optional</div><div class='add'>+    - "ext_vip"    - external VIP clock                     - optional</div><div class='add'>+    - "usbotg_out" - output clock of the pll in the otg phy</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3368-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@ff760000 {</div><div class='add'>+      compatible = "rockchip,rk3368-cru";</div><div class='add'>+      reg = &lt;0xff760000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml<br/>index 72b286a1beba..0b758e015ee3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3399-cru.yaml</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/rockchip,rk3399-cru.yaml#</div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Rockchip RK3399 Clock and Reset Unit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Xing Zheng &lt;zhengxing@rock-chips.com&gt;</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='hunk'>@@ -22,11 +22,11 @@ description: |</div><div class='ctx'>   There are several clocks that are generated outside the SoC. It is expected</div><div class='ctx'>   that they are defined using standard clock bindings with following</div><div class='ctx'>   clock-output-names:</div><div class='del'>-    - "xin24m" - crystal input - required,</div><div class='del'>-    - "xin32k" - rtc clock - optional,</div><div class='del'>-    - "clkin_gmac" - external GMAC clock - optional,</div><div class='del'>-    - "clkin_i2s" - external I2S clock - optional,</div><div class='del'>-    - "pclkin_cif" - external ISP clock - optional,</div><div class='add'>+    - "xin24m"           - crystal input                          - required,</div><div class='add'>+    - "xin32k"           - rtc clock                              - optional,</div><div class='add'>+    - "clkin_gmac"       - external GMAC clock                    - optional,</div><div class='add'>+    - "clkin_i2s"        - external I2S clock                     - optional,</div><div class='add'>+    - "pclkin_cif"       - external ISP clock                     - optional,</div><div class='ctx'>     - "clk_usbphy0_480m" - output clock of the pll in the usbphy0</div><div class='ctx'>     - "clk_usbphy1_480m" - output clock of the pll in the usbphy1</div><div class='ctx'> </div><div class='hunk'>@@ -46,24 +46,15 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-</div><div class='del'>-  assigned-clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 64</div><div class='del'>-</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 64</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='del'>-  assigned-clock-rates:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 64</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='ctx'> </div><div class='ctx'>   rockchip,grf:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    description: &gt;</div><div class='del'>-      phandle to the syscon managing the "general register files". It is used</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files". It is used</div><div class='ctx'>       for GRF muxes, if missing any muxes present in the GRF will not be</div><div class='ctx'>       available.</div><div class='ctx'> </div><div class='hunk'>@@ -77,7 +68,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    pmucru: pmu-clock-controller@ff750000 {</div><div class='add'>+    pmucru: clock-controller@ff750000 {</div><div class='ctx'>       compatible = "rockchip,rk3399-pmucru";</div><div class='ctx'>       reg = &lt;0xff750000 0x1000&gt;;</div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml<br/>index b2c26097827f..f809c289445e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ROCKCHIP rk3568 Family Clock Control Module Binding</div><div class='add'>+title: ROCKCHIP rk3568 Family Clock Control Module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='hunk'>@@ -34,6 +34,19 @@ properties:</div><div class='ctx'>   "#reset-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml<br/>new file mode 100644<br/>index 000000000000..74cd3f3f229a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rk3588-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rk3588-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip rk3588 Family Clock and Reset Control Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RK3588 clock controller generates the clock and also implements a reset</div><div class='add'>+  controller for SoC peripherals. For example it provides SCLK_UART2 and</div><div class='add'>+  PCLK_UART2, as well as SRST_P_UART2 and SRST_S_UART2 for the second UART</div><div class='add'>+  module.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clock and reset IDs</div><div class='add'>+  are defined as preprocessor macros in dt-binding headers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3588-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xin24m</div><div class='add'>+      - const: xin32k</div><div class='add'>+</div><div class='add'>+  assigned-clocks: true</div><div class='add'>+</div><div class='add'>+  assigned-clock-rates: true</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: &gt;</div><div class='add'>+      phandle to the syscon managing the "general register files". It is used</div><div class='add'>+      for GRF muxes, if missing any muxes present in the GRF will not be</div><div class='add'>+      available.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@fd7c0000 {</div><div class='add'>+      compatible = "rockchip,rk3588-cru";</div><div class='add'>+      reg = &lt;0xfd7c0000 0x5c000&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt<br/>deleted file mode 100644<br/>index 161326a4f9c1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-* Rockchip RV1108 Clock and Reset Unit</div><div class='del'>-</div><div class='del'>-The RV1108 clock controller generates and supplies clock to various</div><div class='del'>-controllers within the SoC and also implements a reset controller for SoC</div><div class='del'>-peripherals.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "rockchip,rv1108-cru"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-- #reset-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the syscon managing the "general register files"</div><div class='del'>-  If missing pll rates are not changeable, due to the missing pll lock status.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. All available clocks are defined as</div><div class='del'>-preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be</div><div class='del'>-used in device tree sources. Similar macros exist for the reset sources in</div><div class='del'>-these files.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xin24m" - crystal input - required,</div><div class='del'>- - "ext_vip" - external VIP clock - optional</div><div class='del'>- - "ext_i2s" - external I2S clock - optional</div><div class='del'>- - "ext_gmac" - external GMAC clock - optional</div><div class='del'>- - "hdmiphy" - external clock input derived from HDMI PHY - optional</div><div class='del'>- - "usbphy" - external clock input derived from USB PHY - optional</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	cru: cru@20200000 {</div><div class='del'>-		compatible = "rockchip,rv1108-cru";</div><div class='del'>-		reg = &lt;0x20200000 0x1000&gt;;</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller:</div><div class='del'>-</div><div class='del'>-	uart0: serial@10230000 {</div><div class='del'>-		compatible = "rockchip,rv1108-uart", "snps,dw-apb-uart";</div><div class='del'>-		reg = &lt;0x10230000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		reg-shift = &lt;2&gt;;</div><div class='del'>-		reg-io-width = &lt;4&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_UART0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml<br/>new file mode 100644<br/>index 000000000000..4611d920b8df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rv1108-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RV1108 Clock and Reset Unit (CRU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Elaine Zhang &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RV1108 clock controller generates and supplies clocks to various</div><div class='add'>+  controllers within the SoC and also implements a reset controller for SoC</div><div class='add'>+  peripherals.</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All available clocks are defined as</div><div class='add'>+  preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be</div><div class='add'>+  used in device tree sources. Similar macros exist for the reset sources in</div><div class='add'>+  these files.</div><div class='add'>+  There are several clocks that are generated outside the SoC. It is expected</div><div class='add'>+  that they are defined using standard clock bindings with following</div><div class='add'>+  clock-output-names:</div><div class='add'>+    - "xin24m"   - crystal input                              - required</div><div class='add'>+    - "ext_vip"  - external VIP clock                         - optional</div><div class='add'>+    - "ext_i2s"  - external I2S clock                         - optional</div><div class='add'>+    - "ext_gmac" - external GMAC clock                        - optional</div><div class='add'>+    - "hdmiphy"  - external clock input derived from HDMI PHY - optional</div><div class='add'>+    - "usbphy"   - external clock input derived from USB PHY  - optional</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rv1108-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@20200000 {</div><div class='add'>+      compatible = "rockchip,rv1108-cru";</div><div class='add'>+      reg = &lt;0x20200000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml<br/>new file mode 100644<br/>index 000000000000..0998f8b922bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/rockchip,rv1126-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/rockchip,rv1126-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RV1126 Clock and Reset Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jagan Teki &lt;jagan@edgeble.ai&gt;</div><div class='add'>+  - Finley Xiao &lt;finley.xiao@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The RV1126 clock controller generates the clock and also implements a</div><div class='add'>+  reset controller for SoC peripherals.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rv1126-cru</div><div class='add'>+      - rockchip,rv1126-pmucru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xin24m</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "general register files" (GRF),</div><div class='add'>+      if missing pll rates are not changeable, due to the missing pll</div><div class='add'>+      lock status.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cru: clock-controller@ff490000 {</div><div class='add'>+      compatible = "rockchip,rv1126-cru";</div><div class='add'>+      reg = &lt;0xff490000 0x1000&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml<br/>index f14f1d39da36..d819dfaafff9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos-audss-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos SoC Audio SubSystem clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml<br/>index 4e8062860986..0589a63e273a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos SoC clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml<br/>index 64d027dbe3b2..c98eff64f2b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos-ext-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung SoC external/osc/XXTI/XusbXTI clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml<br/>index 1ed64add4355..bee13436d1ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos4412-isp-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos4412 SoC ISP clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -61,4 +61,3 @@ examples:</div><div class='ctx'>         clocks = &lt;&amp;clock CLK_ACLK200&gt;, &lt;&amp;clock CLK_ACLK400_MCUISP&gt;;</div><div class='ctx'>         clock-names = "aclk200", "aclk400_mcuisp";</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml<br/>index a3fac5c6809d..b05f83533e3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos5260 SoC clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml<br/>index 032862e9f55b..b737c9d35a1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos5410 SoC clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml<br/>index edd1b4ac4334..3f9326e09f79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos5433 SoC clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml<br/>index 599baf0b7231..c137c6744ef9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos7 SoC clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml<br/>index 7e5a9cac2fd2..006d33a9e0f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml</a></div><div class='hunk'>@@ -9,7 +9,7 @@ title: Samsung Exynos7885 SoC clock controller</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dávid Virág &lt;virag.david003@gmail.com&gt;</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -33,6 +33,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - samsung,exynos7885-cmu-top</div><div class='ctx'>       - samsung,exynos7885-cmu-core</div><div class='add'>+      - samsung,exynos7885-cmu-fsys</div><div class='ctx'>       - samsung,exynos7885-cmu-peri</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -92,6 +93,32 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='add'>+            const: samsung,exynos7885-cmu-fsys</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_FSYS bus clock (from CMU_TOP)</div><div class='add'>+            - description: MMC_CARD clock (from CMU_TOP)</div><div class='add'>+            - description: MMC_EMBD clock (from CMU_TOP)</div><div class='add'>+            - description: MMC_SDIO clock (from CMU_TOP)</div><div class='add'>+            - description: USB30DRD clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_fsys_bus</div><div class='add'>+            - const: dout_fsys_mmc_card</div><div class='add'>+            - const: dout_fsys_mmc_embd</div><div class='add'>+            - const: dout_fsys_mmc_sdio</div><div class='add'>+            - const: dout_fsys_usb30drd</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='ctx'>             const: samsung,exynos7885-cmu-peri</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml<br/>index 80ba60838f2b..c752c8985a53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml</a></div><div class='hunk'>@@ -9,7 +9,7 @@ title: Samsung Exynos850 SoC clock controller</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sam Protsenko &lt;semen.protsenko@linaro.org&gt;</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -33,10 +33,14 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - samsung,exynos850-cmu-top</div><div class='ctx'>       - samsung,exynos850-cmu-apm</div><div class='add'>+      - samsung,exynos850-cmu-aud</div><div class='ctx'>       - samsung,exynos850-cmu-cmgp</div><div class='ctx'>       - samsung,exynos850-cmu-core</div><div class='ctx'>       - samsung,exynos850-cmu-dpu</div><div class='add'>+      - samsung,exynos850-cmu-g3d</div><div class='ctx'>       - samsung,exynos850-cmu-hsi</div><div class='add'>+      - samsung,exynos850-cmu-is</div><div class='add'>+      - samsung,exynos850-cmu-mfcmscl</div><div class='ctx'>       - samsung,exynos850-cmu-peri</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -92,6 +96,24 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='add'>+            const: samsung,exynos850-cmu-aud</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: AUD clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_aud</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='ctx'>             const: samsung,exynos850-cmu-cmgp</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='hunk'>@@ -152,6 +174,24 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='add'>+            const: samsung,exynos850-cmu-g3d</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: G3D clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_g3d_switch</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='ctx'>             const: samsung,exynos850-cmu-hsi</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='hunk'>@@ -162,7 +202,7 @@ allOf:</div><div class='ctx'>             - description: External RTC clock (32768 Hz)</div><div class='ctx'>             - description: CMU_HSI bus clock (from CMU_TOP)</div><div class='ctx'>             - description: SD card clock (from CMU_TOP)</div><div class='del'>-            - description: "USB 2.0 DRD clock (from CMU_TOP)"</div><div class='add'>+            - description: USB 2.0 DRD clock (from CMU_TOP)</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -176,6 +216,54 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='add'>+            const: samsung,exynos850-cmu-is</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_IS bus clock (from CMU_TOP)</div><div class='add'>+            - description: Image Texture Processing core clock (from CMU_TOP)</div><div class='add'>+            - description: Visual Recognition Accelerator clock (from CMU_TOP)</div><div class='add'>+            - description: Geometric Distortion Correction clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_is_bus</div><div class='add'>+            - const: dout_is_itp</div><div class='add'>+            - const: dout_is_vra</div><div class='add'>+            - const: dout_is_gdc</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos850-cmu-mfcmscl</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: Multi-Format Codec clock (from CMU_TOP)</div><div class='add'>+            - description: Memory to Memory Scaler clock (from CMU_TOP)</div><div class='add'>+            - description: Multi-Channel Scaler clock (from CMU_TOP)</div><div class='add'>+            - description: JPEG codec clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_mfcmscl_mfc</div><div class='add'>+            - const: dout_mfcmscl_m2m</div><div class='add'>+            - const: dout_mfcmscl_mcsc</div><div class='add'>+            - const: dout_mfcmscl_jpeg</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='ctx'>             const: samsung,exynos850-cmu-peri</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml<br/>new file mode 100644<br/>index 000000000000..55c4f94a14d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml</a></div><div class='hunk'>@@ -0,0 +1,263 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/samsung,exynosautov9-clock.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung Exynos Auto v9 SoC clock controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chanho Park &lt;chanho61.park@samsung.com&gt;</div><div class='add'>+  - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+  - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Exynos Auto v9 clock controller is comprised of several CMU units, generating</div><div class='add'>+  clocks for different domains. Those CMU units are modeled as separate device</div><div class='add'>+  tree nodes, and might depend on each other. Root clocks in that clock tree are</div><div class='add'>+  two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz).</div><div class='add'>+  The external OSCCLK must be defined as fixed-rate clock in dts.</div><div class='add'>+</div><div class='add'>+  CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs and</div><div class='add'>+  dividers; all other clocks of function blocks (other CMUs) are usually</div><div class='add'>+  derived from CMU_TOP.</div><div class='add'>+</div><div class='add'>+  Each clock is assigned an identifier and client nodes can use this identifier</div><div class='add'>+  to specify the clock which they consume. All clocks available for usage</div><div class='add'>+  in clock consumer nodes are defined as preprocessor macros in</div><div class='add'>+  'include/dt-bindings/clock/samsung,exynosautov9.h' header.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,exynosautov9-cmu-top</div><div class='add'>+      - samsung,exynosautov9-cmu-busmc</div><div class='add'>+      - samsung,exynosautov9-cmu-core</div><div class='add'>+      - samsung,exynosautov9-cmu-fsys0</div><div class='add'>+      - samsung,exynosautov9-cmu-fsys1</div><div class='add'>+      - samsung,exynosautov9-cmu-fsys2</div><div class='add'>+      - samsung,exynosautov9-cmu-peric0</div><div class='add'>+      - samsung,exynosautov9-cmu-peric1</div><div class='add'>+      - samsung,exynosautov9-cmu-peris</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-top</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-busmc</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_BUSMC bus clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_busmc_bus</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-core</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_CORE bus clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_core_bus</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-fsys0</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_FSYS0 bus clock (from CMU_TOP)</div><div class='add'>+            - description: CMU_FSYS0 pcie clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_fsys0_bus</div><div class='add'>+            - const: dout_clkcmu_fsys0_pcie</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-fsys1</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_FSYS1 bus clock (from CMU_TOP)</div><div class='add'>+            - description: CMU_FSYS1 mmc card clock (from CMU_TOP)</div><div class='add'>+            - description: CMU_FSYS1 usb clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_fsys1_bus</div><div class='add'>+            - const: gout_clkcmu_fsys1_mmc_card</div><div class='add'>+            - const: dout_clkcmu_fsys1_usbdrd</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-fsys2</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_FSYS2 bus clock (from CMU_TOP)</div><div class='add'>+            - description: UFS clock (from CMU_TOP)</div><div class='add'>+            - description: Ethernet clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_fsys2_bus</div><div class='add'>+            - const: dout_fsys2_clkcmu_ufs_embd</div><div class='add'>+            - const: dout_fsys2_clkcmu_ethernet</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-peric0</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_PERIC0 bus clock (from CMU_TOP)</div><div class='add'>+            - description: PERIC0 IP clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_peric0_bus</div><div class='add'>+            - const: dout_clkcmu_peric0_ip</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-peric1</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_PERIC1 bus clock (from CMU_TOP)</div><div class='add'>+            - description: PERIC1 IP clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_peric1_bus</div><div class='add'>+            - const: dout_clkcmu_peric1_ip</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynosautov9-cmu-peris</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: External reference clock (26 MHz)</div><div class='add'>+            - description: CMU_PERIS bus clock (from CMU_TOP)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: oscclk</div><div class='add'>+            - const: dout_clkcmu_peris_bus</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Clock controller node for CMU_FSYS2</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/samsung,exynosautov9.h&gt;</div><div class='add'>+</div><div class='add'>+    cmu_fsys2: clock-controller@17c00000 {</div><div class='add'>+        compatible = "samsung,exynosautov9-cmu-fsys2";</div><div class='add'>+        reg = &lt;0x17c00000 0x8000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;xtcxo&gt;,</div><div class='add'>+                 &lt;&amp;cmu_top DOUT_CLKCMU_FSYS2_BUS&gt;,</div><div class='add'>+                 &lt;&amp;cmu_top DOUT_CLKCMU_FSYS2_UFS_EMBD&gt;,</div><div class='add'>+                 &lt;&amp;cmu_top DOUT_CLKCMU_FSYS2_ETHERNET&gt;;</div><div class='add'>+        clock-names = "oscclk",</div><div class='add'>+                      "dout_clkcmu_fsys2_bus",</div><div class='add'>+                      "dout_fsys2_clkcmu_ufs_embd",</div><div class='add'>+                      "dout_fsys2_clkcmu_ethernet";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml<br/>index 1410c51e0e7d..d5296e6053a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,s2mps11.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2M and S5M family clock generator block</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='hunk'>@@ -34,7 +34,6 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   clock-output-names:</div><div class='del'>-    minItems: 3</div><div class='ctx'>     maxItems: 3</div><div class='ctx'>     description: Names for AP, CP and BT clocks.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt b/Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt<br/>deleted file mode 100644<br/>index 2632d3f13004..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s3c2410-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-* Samsung S3C2410 Clock Controller</div><div class='del'>-</div><div class='del'>-The S3C2410 clock controller generates and supplies clock to various controllers</div><div class='del'>-within the SoC. The clock binding described here is applicable to the s3c2410,</div><div class='del'>-s3c2440 and s3c2442 SoCs in the s3c24x family.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be one of the following.</div><div class='del'>-  - "samsung,s3c2410-clock" - controller compatible with S3C2410 SoC.</div><div class='del'>-  - "samsung,s3c2440-clock" - controller compatible with S3C2440 SoC.</div><div class='del'>-  - "samsung,s3c2442-clock" - controller compatible with S3C2442 SoC.</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. Some of the clocks are available only</div><div class='del'>-on a particular SoC.</div><div class='del'>-</div><div class='del'>-All available clocks are defined as preprocessor macros in</div><div class='del'>-dt-bindings/clock/s3c2410.h header and can be used in device</div><div class='del'>-tree sources.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-The xti clock used as input for the plls is generated outside the SoC. It is</div><div class='del'>-expected that is are defined using standard clock bindings with a</div><div class='del'>-clock-output-names value of "xti".</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	clocks: clock-controller@4c000000 {</div><div class='del'>-		compatible = "samsung,s3c2410-clock";</div><div class='del'>-		reg = &lt;0x4c000000 0x20&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller (refer to the standard clock bindings for information about</div><div class='del'>-  "clocks" and "clock-names" properties):</div><div class='del'>-</div><div class='del'>-	serial@50004000 {</div><div class='del'>-		compatible = "samsung,s3c2440-uart";</div><div class='del'>-		reg = &lt;0x50004000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;1 23 3 4&gt;, &lt;1 23 4 4&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud2";</div><div class='del'>-		clocks = &lt;&amp;clocks PCLK_UART0&gt;, &lt;&amp;clocks PCLK_UART0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt b/Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt<br/>deleted file mode 100644<br/>index 21a8c23e658f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s3c2412-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-* Samsung S3C2412 Clock Controller</div><div class='del'>-</div><div class='del'>-The S3C2412 clock controller generates and supplies clock to various controllers</div><div class='del'>-within the SoC. The clock binding described here is applicable to the s3c2412</div><div class='del'>-and s3c2413 SoCs in the s3c24x family.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "samsung,s3c2412-clock"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. Some of the clocks are available only</div><div class='del'>-on a particular SoC.</div><div class='del'>-</div><div class='del'>-All available clocks are defined as preprocessor macros in</div><div class='del'>-dt-bindings/clock/s3c2412.h header and can be used in device</div><div class='del'>-tree sources.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xti" - crystal input - required,</div><div class='del'>- - "ext" - external clock source - optional,</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	clocks: clock-controller@4c000000 {</div><div class='del'>-		compatible = "samsung,s3c2412-clock";</div><div class='del'>-		reg = &lt;0x4c000000 0x20&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller (refer to the standard clock bindings for information about</div><div class='del'>-  "clocks" and "clock-names" properties):</div><div class='del'>-</div><div class='del'>-	serial@50004000 {</div><div class='del'>-		compatible = "samsung,s3c2412-uart";</div><div class='del'>-		reg = &lt;0x50004000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;1 23 3 4&gt;, &lt;1 23 4 4&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud2", "clk_uart_baud3";</div><div class='del'>-		clocks = &lt;&amp;clocks PCLK_UART0&gt;, &lt;&amp;clocks PCLK_UART0&gt;,</div><div class='del'>-			 &lt;&amp;clocks SCLK_UART&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,s3c2443-clock.txt b/Documentation/devicetree/bindings/clock/samsung,s3c2443-clock.txt<br/>deleted file mode 100644<br/>index 985c0f574e9a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s3c2443-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s3c2443-clock.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,55 +0,0 @@</div><div class='del'>-* Samsung S3C2443 Clock Controller</div><div class='del'>-</div><div class='del'>-The S3C2443 clock controller generates and supplies clock to various controllers</div><div class='del'>-within the SoC. The clock binding described here is applicable to all SoCs in</div><div class='del'>-the s3c24x family starting with the s3c2443.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be one of the following.</div><div class='del'>-  - "samsung,s3c2416-clock" - controller compatible with S3C2416 SoC.</div><div class='del'>-  - "samsung,s3c2443-clock" - controller compatible with S3C2443 SoC.</div><div class='del'>-  - "samsung,s3c2450-clock" - controller compatible with S3C2450 SoC.</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- #clock-cells: should be 1.</div><div class='del'>-</div><div class='del'>-Each clock is assigned an identifier and client nodes can use this identifier</div><div class='del'>-to specify the clock which they consume. Some of the clocks are available only</div><div class='del'>-on a particular SoC.</div><div class='del'>-</div><div class='del'>-All available clocks are defined as preprocessor macros in</div><div class='del'>-dt-bindings/clock/s3c2443.h header and can be used in device</div><div class='del'>-tree sources.</div><div class='del'>-</div><div class='del'>-External clocks:</div><div class='del'>-</div><div class='del'>-There are several clocks that are generated outside the SoC. It is expected</div><div class='del'>-that they are defined using standard clock bindings with following</div><div class='del'>-clock-output-names:</div><div class='del'>- - "xti" - crystal input - required,</div><div class='del'>- - "ext" - external clock source - optional,</div><div class='del'>- - "ext_i2s" - external I2S clock - optional,</div><div class='del'>- - "ext_uart" - external uart clock - optional,</div><div class='del'>-</div><div class='del'>-Example: Clock controller node:</div><div class='del'>-</div><div class='del'>-	clocks: clock-controller@4c000000 {</div><div class='del'>-		compatible = "samsung,s3c2416-clock";</div><div class='del'>-		reg = &lt;0x4c000000 0x40&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example: UART controller node that consumes the clock generated by the clock</div><div class='del'>-  controller (refer to the standard clock bindings for information about</div><div class='del'>-  "clocks" and "clock-names" properties):</div><div class='del'>-</div><div class='del'>-	serial@50004000 {</div><div class='del'>-		compatible = "samsung,s3c2440-uart";</div><div class='del'>-		reg = &lt;0x50004000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;1 23 3 4&gt;, &lt;1 23 4 4&gt;;</div><div class='del'>-		clock-names = "uart", "clk_uart_baud2",</div><div class='del'>-				"clk_uart_baud3";</div><div class='del'>-		clocks = &lt;&amp;clocks PCLK_UART0&gt;, &lt;&amp;clocks PCLK_UART0&gt;,</div><div class='del'>-				&lt;&amp;clocks SCLK_UART&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml<br/>index ae8f8fc93233..2659854ea1c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,s5pv210-audss-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung S5Pv210 SoC Audio SubSystem clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml<br/>index dcb29a2d1159..67a33665cf00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung S5P6442/S5PC110/S5PV210 SoC clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml<br/>index c3be1b600007..c79e752283aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml</a></div><div class='hunk'>@@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sagar Kadam &lt;sagar.kadam@sifive.com&gt;</div><div class='ctx'>   - Paul Walmsley  &lt;paul.walmsley@sifive.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml b/Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml<br/>new file mode 100644<br/>index 000000000000..9e35e0e51ce8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/skyworks,si521xx.yaml</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/skyworks,si521xx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Skyworks Si521xx I2C PCIe clock generators</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Skyworks Si521xx are I2C PCIe clock generators providing</div><div class='add'>+  from 4 to 9 output clocks.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - skyworks,si52144</div><div class='add'>+      - skyworks,si52146</div><div class='add'>+      - skyworks,si52147</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    const: 0x6b</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XTal input clock</div><div class='add'>+</div><div class='add'>+  skyworks,out-amplitude-microvolt:</div><div class='add'>+    enum: [ 300000, 400000, 500000, 600000, 700000, 800000, 900000, 1000000 ]</div><div class='add'>+    description: Output clock signal amplitude</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        clock-generator@6b {</div><div class='add'>+            compatible = "skyworks,si52144";</div><div class='add'>+            reg = &lt;0x6b&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            clocks = &lt;&amp;ref25m&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml<br/>index 9a0cc7341630..4e82582fb2f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml</a></div><div class='hunk'>@@ -61,40 +61,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    sysctrl@61840000 {</div><div class='del'>-        compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x61840000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-        clock {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-clock";</div><div class='del'>-            #clock-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        // other nodes ...</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    mioctrl@59810000 {</div><div class='del'>-        compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x59810000 0x800&gt;;</div><div class='del'>-</div><div class='del'>-        clock {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-mio-clock";</div><div class='del'>-            #clock-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        // other nodes ...</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    perictrl@59820000 {</div><div class='del'>-        compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x59820000 0x200&gt;;</div><div class='del'>-</div><div class='del'>-        clock {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-peri-clock";</div><div class='del'>-            #clock-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        // other nodes ...</div><div class='add'>+    clock-controller {</div><div class='add'>+        compatible = "socionext,uniphier-ld11-clock";</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml<br/>index 47e1ab08c95d..1703e305e6d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright 2019 Unisoc Inc.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SC9863A Clock Control Unit Device Tree Bindings</div><div class='add'>+title: SC9863A Clock Control Unit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml<br/>new file mode 100644<br/>index 000000000000..43d2b6c31357<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Unisoc Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: UMS512 Soc clock controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='add'>+  - Baolin Wang &lt;baolin.wang7@gmail.com&gt;</div><div class='add'>+  - Chunyan Zhang &lt;zhang.lyra@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - sprd,ums512-apahb-gate</div><div class='add'>+      - sprd,ums512-ap-clk</div><div class='add'>+      - sprd,ums512-aonapb-clk</div><div class='add'>+      - sprd,ums512-pmu-gate</div><div class='add'>+      - sprd,ums512-g0-pll</div><div class='add'>+      - sprd,ums512-g2-pll</div><div class='add'>+      - sprd,ums512-g3-pll</div><div class='add'>+      - sprd,ums512-gc-pll</div><div class='add'>+      - sprd,ums512-aon-gate</div><div class='add'>+      - sprd,ums512-audcpapb-gate</div><div class='add'>+      - sprd,ums512-audcpahb-gate</div><div class='add'>+      - sprd,ums512-gpu-clk</div><div class='add'>+      - sprd,ums512-mm-clk</div><div class='add'>+      - sprd,ums512-mm-gate-clk</div><div class='add'>+      - sprd,ums512-apapb-gate</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    description: |</div><div class='add'>+      The input parent clock(s) phandle for the clock, only list</div><div class='add'>+      fixed clocks which are declared in devicetree.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: ext-26m</div><div class='add'>+      - const: ext-32k</div><div class='add'>+      - const: ext-4m</div><div class='add'>+      - const: rco-100m</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ap_clk: clock-controller@20200000 {</div><div class='add'>+      compatible = "sprd,ums512-ap-clk";</div><div class='add'>+      reg = &lt;0x20200000 0x1000&gt;;</div><div class='add'>+      clocks = &lt;&amp;ext_26m&gt;;</div><div class='add'>+      clock-names = "ext-26m";</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml<br/>index a0ae4867ed27..5194be0b410e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/st,stm32mp1-rcc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Reset Clock Controller Binding</div><div class='add'>+title: STMicroelectronics STM32MP1 Reset Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Gabriel Fernandez &lt;gabriel.fernandez@foss.st.com&gt;</div><div class='hunk'>@@ -41,6 +41,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'>   The list of valid indices for STM32MP1 is available in:</div><div class='ctx'>   include/dt-bindings/reset-controller/stm32mp1-resets.h</div><div class='add'>+  include/dt-bindings/reset-controller/stm32mp13-resets.h</div><div class='ctx'> </div><div class='ctx'>   This file implements defines like:</div><div class='ctx'>   #define LTDC_R	3072</div><div class='hunk'>@@ -57,7 +58,10 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - st,stm32mp1-rcc-secure</div><div class='ctx'>           - st,stm32mp1-rcc</div><div class='add'>+          - st,stm32mp13-rcc</div><div class='ctx'>       - const: syscon</div><div class='add'>+  clocks: true</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -68,14 +72,54 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - st,stm32mp1-rcc-secure</div><div class='add'>+          - st,stm32mp13-rcc</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    clocks:</div><div class='add'>+      description: Specifies oscillators.</div><div class='add'>+      maxItems: 5</div><div class='add'>+</div><div class='add'>+    clock-names:</div><div class='add'>+      items:</div><div class='add'>+        - const: hse</div><div class='add'>+        - const: hsi</div><div class='add'>+        - const: csi</div><div class='add'>+        - const: lse</div><div class='add'>+        - const: lsi</div><div class='add'>+  required:</div><div class='add'>+    - clocks</div><div class='add'>+    - clock-names</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    clocks:</div><div class='add'>+      description:</div><div class='add'>+        Specifies the external RX clock for ethernet MAC.</div><div class='add'>+      maxItems: 1</div><div class='add'>+</div><div class='add'>+    clock-names:</div><div class='add'>+      const: ETH_RX_CLK/ETH_REF_CLK</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/stm32mp1-clks.h&gt;</div><div class='ctx'>     rcc: rcc@50000000 {</div><div class='ctx'>         compatible = "st,stm32mp1-rcc-secure", "syscon";</div><div class='ctx'>         reg = &lt;0x50000000 0x1000&gt;;</div><div class='ctx'>         #clock-cells = &lt;1&gt;;</div><div class='ctx'>         #reset-cells = &lt;1&gt;;</div><div class='add'>+        clock-names = "hse", "hsi", "csi", "lse", "lsi";</div><div class='add'>+        clocks = &lt;&amp;scmi_clk CK_SCMI_HSE&gt;,</div><div class='add'>+                 &lt;&amp;scmi_clk CK_SCMI_HSI&gt;,</div><div class='add'>+                 &lt;&amp;scmi_clk CK_SCMI_CSI&gt;,</div><div class='add'>+                 &lt;&amp;scmi_clk CK_SCMI_LSE&gt;,</div><div class='add'>+                 &lt;&amp;scmi_clk CK_SCMI_LSI&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/st/st,flexgen.txt b/Documentation/devicetree/bindings/clock/st/st,flexgen.txt<br/>index 55a18939bddd..c918075405ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/st/st,flexgen.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/st/st,flexgen.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/st/st,flexgen.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/st/st,flexgen.txt</a></div><div class='hunk'>@@ -78,7 +78,7 @@ Required properties:</div><div class='ctx'> - #clock-cells : from common clock binding; shall be set to 1 (multiple clock</div><div class='ctx'>   outputs).</div><div class='ctx'> </div><div class='del'>-- clocks : must be set to the parent's phandle. it's could be output clocks of</div><div class='add'>+- clocks : must be set to the parent's phandle. it could be output clocks of</div><div class='ctx'>   a quadsfs or/and a pll or/and clk_sysin (up to 7 clocks)</div><div class='ctx'> </div><div class='ctx'> - clock-output-names : List of strings used to name the clock outputs.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml<br/>new file mode 100644<br/>index 000000000000..923680a44aef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive JH7110 Always-On Clock and Reset Generator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Emil Renner Berthing &lt;kernel@esmil.dk&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: starfive,jh7110-aoncrg</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: Main Oscillator (24 MHz)</div><div class='add'>+          - description: GMAC0 RMII reference or GMAC0 RGMII RX</div><div class='add'>+          - description: STG AXI/AHB</div><div class='add'>+          - description: APB Bus</div><div class='add'>+          - description: GMAC0 GTX</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - description: Main Oscillator (24 MHz)</div><div class='add'>+          - description: GMAC0 RMII reference or GMAC0 RGMII RX</div><div class='add'>+          - description: STG AXI/AHB or GMAC0 RGMII RX</div><div class='add'>+          - description: APB Bus or STG AXI/AHB</div><div class='add'>+          - description: GMAC0 GTX or APB Bus</div><div class='add'>+          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - description: Main Oscillator (24 MHz)</div><div class='add'>+          - description: GMAC0 RMII reference</div><div class='add'>+          - description: GMAC0 RGMII RX</div><div class='add'>+          - description: STG AXI/AHB</div><div class='add'>+          - description: APB Bus</div><div class='add'>+          - description: GMAC0 GTX</div><div class='add'>+          - description: RTC Oscillator (32.768 kHz)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - minItems: 5</div><div class='add'>+        items:</div><div class='add'>+          - const: osc</div><div class='add'>+          - enum:</div><div class='add'>+              - gmac0_rmii_refin</div><div class='add'>+              - gmac0_rgmii_rxin</div><div class='add'>+          - const: stg_axiahb</div><div class='add'>+          - const: apb_bus</div><div class='add'>+          - const: gmac0_gtxclk</div><div class='add'>+          - const: rtc_osc</div><div class='add'>+</div><div class='add'>+      - minItems: 6</div><div class='add'>+        items:</div><div class='add'>+          - const: osc</div><div class='add'>+          - const: gmac0_rmii_refin</div><div class='add'>+          - const: gmac0_rgmii_rxin</div><div class='add'>+          - const: stg_axiahb</div><div class='add'>+          - const: apb_bus</div><div class='add'>+          - const: gmac0_gtxclk</div><div class='add'>+          - const: rtc_osc</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      See &lt;dt-bindings/clock/starfive,jh7110-crg.h&gt; for valid indices.</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      See &lt;dt-bindings/reset/starfive,jh7110-crg.h&gt; for valid indices.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/starfive,jh7110-crg.h&gt;</div><div class='add'>+</div><div class='add'>+    clock-controller@17000000 {</div><div class='add'>+        compatible = "starfive,jh7110-aoncrg";</div><div class='add'>+        reg = &lt;0x17000000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;osc&gt;, &lt;&amp;gmac0_rmii_refin&gt;,</div><div class='add'>+                 &lt;&amp;gmac0_rgmii_rxin&gt;,</div><div class='add'>+                 &lt;&amp;syscrg JH7110_SYSCLK_STG_AXIAHB&gt;,</div><div class='add'>+                 &lt;&amp;syscrg JH7110_SYSCLK_APB_BUS&gt;,</div><div class='add'>+                 &lt;&amp;syscrg JH7110_SYSCLK_GMAC0_GTXCLK&gt;,</div><div class='add'>+                 &lt;&amp;rtc_osc&gt;;</div><div class='add'>+        clock-names = "osc", "gmac0_rmii_refin",</div><div class='add'>+                      "gmac0_rgmii_rxin", "stg_axiahb",</div><div class='add'>+                      "apb_bus", "gmac0_gtxclk",</div><div class='add'>+                      "rtc_osc";</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml<br/>new file mode 100644<br/>index 000000000000..84373ae31644<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive JH7110 System Clock and Reset Generator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Emil Renner Berthing &lt;kernel@esmil.dk&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: starfive,jh7110-syscrg</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: Main Oscillator (24 MHz)</div><div class='add'>+          - description: GMAC1 RMII reference or GMAC1 RGMII RX</div><div class='add'>+          - description: External I2S TX bit clock</div><div class='add'>+          - description: External I2S TX left/right channel clock</div><div class='add'>+          - description: External I2S RX bit clock</div><div class='add'>+          - description: External I2S RX left/right channel clock</div><div class='add'>+          - description: External TDM clock</div><div class='add'>+          - description: External audio master clock</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - description: Main Oscillator (24 MHz)</div><div class='add'>+          - description: GMAC1 RMII reference</div><div class='add'>+          - description: GMAC1 RGMII RX</div><div class='add'>+          - description: External I2S TX bit clock</div><div class='add'>+          - description: External I2S TX left/right channel clock</div><div class='add'>+          - description: External I2S RX bit clock</div><div class='add'>+          - description: External I2S RX left/right channel clock</div><div class='add'>+          - description: External TDM clock</div><div class='add'>+          - description: External audio master clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: osc</div><div class='add'>+          - enum:</div><div class='add'>+              - gmac1_rmii_refin</div><div class='add'>+              - gmac1_rgmii_rxin</div><div class='add'>+          - const: i2stx_bclk_ext</div><div class='add'>+          - const: i2stx_lrck_ext</div><div class='add'>+          - const: i2srx_bclk_ext</div><div class='add'>+          - const: i2srx_lrck_ext</div><div class='add'>+          - const: tdm_ext</div><div class='add'>+          - const: mclk_ext</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: osc</div><div class='add'>+          - const: gmac1_rmii_refin</div><div class='add'>+          - const: gmac1_rgmii_rxin</div><div class='add'>+          - const: i2stx_bclk_ext</div><div class='add'>+          - const: i2stx_lrck_ext</div><div class='add'>+          - const: i2srx_bclk_ext</div><div class='add'>+          - const: i2srx_lrck_ext</div><div class='add'>+          - const: tdm_ext</div><div class='add'>+          - const: mclk_ext</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      See &lt;dt-bindings/clock/starfive,jh7110-crg.h&gt; for valid indices.</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      See &lt;dt-bindings/reset/starfive,jh7110-crg.h&gt; for valid indices.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@13020000 {</div><div class='add'>+        compatible = "starfive,jh7110-syscrg";</div><div class='add'>+        reg = &lt;0x13020000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;osc&gt;, &lt;&amp;gmac1_rmii_refin&gt;,</div><div class='add'>+                 &lt;&amp;gmac1_rgmii_rxin&gt;,</div><div class='add'>+                 &lt;&amp;i2stx_bclk_ext&gt;, &lt;&amp;i2stx_lrck_ext&gt;,</div><div class='add'>+                 &lt;&amp;i2srx_bclk_ext&gt;, &lt;&amp;i2srx_lrck_ext&gt;,</div><div class='add'>+                 &lt;&amp;tdm_ext&gt;, &lt;&amp;mclk_ext&gt;;</div><div class='add'>+        clock-names = "osc", "gmac1_rmii_refin",</div><div class='add'>+                      "gmac1_rgmii_rxin",</div><div class='add'>+                      "i2stx_bclk_ext", "i2stx_lrck_ext",</div><div class='add'>+                      "i2srx_bclk_ext", "i2srx_lrck_ext",</div><div class='add'>+                      "tdm_ext", "mclk_ext";</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml b/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml<br/>index 9bc95a308477..2150307219a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/stericsson,u8500-clks.yaml</a></div><div class='hunk'>@@ -109,6 +109,25 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='add'>+  clkout-clock:</div><div class='add'>+    description: A subnode with three clock cells for externally routed clocks,</div><div class='add'>+      output clocks. These are two PRCMU-internal clocks that can be divided and</div><div class='add'>+      muxed out on the pads of the DB8500 SoC.</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      '#clock-cells':</div><div class='add'>+        description:</div><div class='add'>+          The first cell indicates which output clock we are using,</div><div class='add'>+          possible values are 0 (CLKOUT1) and 1 (CLKOUT2).</div><div class='add'>+          The second cell indicates which clock we want to use as source,</div><div class='add'>+          possible values are 0 thru 7, see the defines for the different</div><div class='add'>+          source clocks.</div><div class='add'>+          The third cell is a divider, legal values are 1 thru 63.</div><div class='add'>+        const: 3</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -119,3 +138,41 @@ required:</div><div class='ctx'>   - smp-twd-clock</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/ste-db8500-clkout.h&gt;</div><div class='add'>+    clocks@8012 {</div><div class='add'>+      compatible = "stericsson,u8500-clks";</div><div class='add'>+      reg = &lt;0x8012f000 0x1000&gt;, &lt;0x8011f000 0x1000&gt;,</div><div class='add'>+            &lt;0x8000f000 0x1000&gt;, &lt;0xa03ff000 0x1000&gt;,</div><div class='add'>+            &lt;0xa03cf000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+      prcmu_clk: prcmu-clock {</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      prcc_pclk: prcc-periph-clock {</div><div class='add'>+        #clock-cells = &lt;2&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      prcc_kclk: prcc-kernel-clock {</div><div class='add'>+        #clock-cells = &lt;2&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      prcc_reset: prcc-reset-controller {</div><div class='add'>+        #reset-cells = &lt;2&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      rtc_clk: rtc32k-clock {</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      smp_twd_clk: smp-twd-clock {</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      clkout_clk: clkout-clock {</div><div class='add'>+        #clock-cells = &lt;3&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml b/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml<br/>new file mode 100644<br/>index 000000000000..bcc14088220a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/sunplus,sp7021-clkc.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/sunplus,sp7021-clkc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SP7021 SoC Clock Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Qin Jian &lt;qinjian@cqplus1.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sunplus,sp7021-clkc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    extclk: osc0 {</div><div class='add'>+      compatible = "fixed-clock";</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+      clock-frequency = &lt;27000000&gt;;</div><div class='add'>+      clock-output-names = "extclk";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    clkc: clock-controller@9c000004 {</div><div class='add'>+      compatible = "sunplus,sp7021-clkc";</div><div class='add'>+      reg = &lt;0x9c000004 0x28&gt;,</div><div class='add'>+            &lt;0x9c000200 0x44&gt;,</div><div class='add'>+            &lt;0x9c000268 0x08&gt;;</div><div class='add'>+      clocks = &lt;&amp;extclk&gt;;</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml<br/>index 9b537bc876b5..66765116aff5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - ti,am654-ehrpwm-tbclk</div><div class='ctx'>           - ti,am64-epwm-tbclk</div><div class='add'>+          - ti,am62-epwm-tbclk</div><div class='ctx'>       - const: syscon</div><div class='ctx'> </div><div class='ctx'>   "#clock-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti,cdce925.txt b/Documentation/devicetree/bindings/clock/ti,cdce925.txt<br/>deleted file mode 100644<br/>index df42ab72718f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,cdce925.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,cdce925.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,53 +0,0 @@</div><div class='del'>-Binding for TI CDCE913/925/937/949 programmable I2C clock synthesizers.</div><div class='del'>-</div><div class='del'>-Reference</div><div class='del'>-This binding uses the common clock binding[1].</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-[2] https://www.ti.com/product/cdce913</div><div class='del'>-[3] https://www.ti.com/product/cdce925</div><div class='del'>-[4] https://www.ti.com/product/cdce937</div><div class='del'>-[5] https://www.ti.com/product/cdce949</div><div class='del'>-</div><div class='del'>-The driver provides clock sources for each output Y1 through Y5.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: Shall be one of the following:</div><div class='del'>-	- "ti,cdce913": 1-PLL, 3 Outputs</div><div class='del'>-	- "ti,cdce925": 2-PLL, 5 Outputs</div><div class='del'>-	- "ti,cdce937": 3-PLL, 7 Outputs</div><div class='del'>-	- "ti,cdce949": 4-PLL, 9 Outputs</div><div class='del'>- - reg: I2C device address.</div><div class='del'>- - clocks: Points to a fixed parent clock that provides the input frequency.</div><div class='del'>- - #clock-cells: From common clock bindings: Shall be 1.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>- - xtal-load-pf: Crystal load-capacitor value to fine-tune performance on a</div><div class='del'>-                 board, or to compensate for external influences.</div><div class='del'>-- vdd-supply: A regulator node for Vdd</div><div class='del'>-- vddout-supply: A regulator node for Vddout</div><div class='del'>-</div><div class='del'>-For all PLL1, PLL2, ... an optional child node can be used to specify spread</div><div class='del'>-spectrum clocking parameters for a board.</div><div class='del'>-  - spread-spectrum: SSC mode as defined in the data sheet.</div><div class='del'>-  - spread-spectrum-center: Use "centered" mode instead of "max" mode. When</div><div class='del'>-    present, the clock runs at the requested frequency on average. Otherwise</div><div class='del'>-    the requested frequency is the maximum value of the SCC range.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	clockgen: cdce925pw@64 {</div><div class='del'>-		compatible = "cdce925";</div><div class='del'>-		reg = &lt;0x64&gt;;</div><div class='del'>-		clocks = &lt;&amp;xtal_27Mhz&gt;;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		xtal-load-pf = &lt;5&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;1v8-reg&gt;;</div><div class='del'>-		vddout-supply = &lt;&amp;3v3-reg&gt;;</div><div class='del'>-		/* PLL options to get SSC 1% centered */</div><div class='del'>-		PLL2 {</div><div class='del'>-			spread-spectrum = &lt;4&gt;;</div><div class='del'>-			spread-spectrum-center;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti,cdce925.yaml b/Documentation/devicetree/bindings/clock/ti,cdce925.yaml<br/>new file mode 100644<br/>index 000000000000..a4ec8dd5ddf1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,cdce925.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti,cdce925.yaml</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/ti,cdce925.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI CDCE913/925/937/949 programmable I2C clock synthesizers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Flexible Low Power LVCMOS Clock Generator with SSC Support for EMI Reduction</div><div class='add'>+</div><div class='add'>+  - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913</div><div class='add'>+  - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925</div><div class='add'>+  - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937</div><div class='add'>+  - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,cdce913</div><div class='add'>+      - ti,cdce925</div><div class='add'>+      - ti,cdce937</div><div class='add'>+      - ti,cdce949</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: fixed parent clock</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: Regulator that provides 1.8V Vdd power supply</div><div class='add'>+</div><div class='add'>+  vddout-supply:</div><div class='add'>+    description: |</div><div class='add'>+      Regulator that provides Vddout power supply.</div><div class='add'>+      non-L variant: 2.5V or 3.3V for</div><div class='add'>+      L variant: 1.8V for</div><div class='add'>+</div><div class='add'>+  xtal-load-pf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Crystal load-capacitor value to fine-tune performance on a</div><div class='add'>+      board, or to compensate for external influences.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^PLL[1-4]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      optional child node can be used to specify spread</div><div class='add'>+      spectrum clocking parameters for a board</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      spread-spectrum:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: SSC mode as defined in the data sheet</div><div class='add'>+</div><div class='add'>+      spread-spectrum-center:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: |</div><div class='add'>+          Use "centered" mode instead of "max" mode. When</div><div class='add'>+          present, the clock runs at the requested frequency on average.</div><div class='add'>+          Otherwise the requested frequency is the maximum value of the</div><div class='add'>+          SCC range.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        cdce925: clock-controller@64 {</div><div class='add'>+            compatible = "ti,cdce925";</div><div class='add'>+            reg = &lt;0x64&gt;;</div><div class='add'>+            clocks = &lt;&amp;xtal_27Mhz&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            xtal-load-pf = &lt;5&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;reg_1v8&gt;;</div><div class='add'>+            vddout-supply = &lt;&amp;reg_3v3&gt;;</div><div class='add'>+            /* PLL options to get SSC 1% centered */</div><div class='add'>+            PLL2 {</div><div class='add'>+                spread-spectrum = &lt;4&gt;;</div><div class='add'>+                spread-spectrum-center;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti,lmk04832.yaml b/Documentation/devicetree/bindings/clock/ti,lmk04832.yaml<br/>index bd8173848253..13d7b3d03d84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,lmk04832.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,lmk04832.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,lmk04832.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti,lmk04832.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/ti,lmk04832.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Clock bindings for the Texas Instruments LMK04832</div><div class='add'>+title: Texas Instruments LMK04832 Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Liam Beguin &lt;liambeguin@gmail.com&gt;</div><div class='hunk'>@@ -160,7 +160,7 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml b/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml<br/>index 0e370289a053..63d976341696 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti,sci-clk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti,sci-clk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti,sci-clk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/ti,sci-clk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI-SCI clock controller node bindings</div><div class='add'>+title: TI-SCI clock controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nishanth Menon &lt;nm@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti-clkctrl.txt b/Documentation/devicetree/bindings/clock/ti-clkctrl.txt<br/>index 18af6b9409e3..d20db7974a38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti-clkctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti-clkctrl.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti-clkctrl.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti-clkctrl.txt</a></div><div class='hunk'>@@ -21,6 +21,7 @@ Required properties :</div><div class='ctx'> 	       "ti,clkctrl-l4-per"</div><div class='ctx'> 	       "ti,clkctrl-l4-secure"</div><div class='ctx'> 	       "ti,clkctrl-l4-wkup"</div><div class='add'>+- clock-output-names : from common clock binding</div><div class='ctx'> - #clock-cells : shall contain 2 with the first entry being the instance</div><div class='ctx'> 		 offset from the clock domain base and the second being the</div><div class='ctx'> 		 clock index</div><div class='hunk'>@@ -32,7 +33,8 @@ Example: Clock controller node on omap 4430:</div><div class='ctx'> 	l4per: cm@1400 {</div><div class='ctx'> 		cm_l4per@0 {</div><div class='ctx'> 			cm_l4per_clkctrl: clock@20 {</div><div class='del'>-				compatible = "ti,clkctrl-l4-per", "ti,clkctrl";</div><div class='add'>+				compatible = "ti,clkctrl";</div><div class='add'>+				clock-output-names = "l4_per";</div><div class='ctx'> 				reg = &lt;0x20 0x1b0&gt;;</div><div class='ctx'> 				#clock-cells = &lt;2&gt;;</div><div class='ctx'> 			};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/clockdomain.txt b/Documentation/devicetree/bindings/clock/ti/clockdomain.txt<br/>index cb76b3f2b341..9c6199249ce5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/clockdomain.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/clockdomain.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/clockdomain.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/clockdomain.txt</a></div><div class='hunk'>@@ -17,6 +17,9 @@ Required properties:</div><div class='ctx'> - #clock-cells : from common clock binding; shall be set to 0.</div><div class='ctx'> - clocks : link phandles of clocks within this domain</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+- clock-output-names : from common clock binding.</div><div class='add'>+</div><div class='ctx'> Examples:</div><div class='ctx'> 	dss_clkdm: dss_clkdm {</div><div class='ctx'> 		compatible = "ti,clockdomain";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/composite.txt b/Documentation/devicetree/bindings/clock/ti/composite.txt<br/>index 5f43c4706b09..33ac7c9ad053 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/composite.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/composite.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/composite.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/composite.txt</a></div><div class='hunk'>@@ -27,6 +27,9 @@ Required properties:</div><div class='ctx'> - clocks : link phandles of component clocks</div><div class='ctx'> - #clock-cells : from common clock binding; shall be set to 0.</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+- clock-output-names : from common clock binding.</div><div class='add'>+</div><div class='ctx'> Examples:</div><div class='ctx'> </div><div class='ctx'> usb_l4_gate_ick: usb_l4_gate_ick {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/davinci/pll.txt b/Documentation/devicetree/bindings/clock/ti/davinci/pll.txt<br/>index 36998e184821..c9894538315b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/davinci/pll.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/davinci/pll.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/davinci/pll.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/davinci/pll.txt</a></div><div class='hunk'>@@ -15,7 +15,7 @@ Required properties:</div><div class='ctx'> 	- for "ti,da850-pll1", shall be "clksrc"</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='del'>-- ti,clkmode-square-wave: Indicates that the the board is supplying a square</div><div class='add'>+- ti,clkmode-square-wave: Indicates that the board is supplying a square</div><div class='ctx'> 	wave input on the OSCIN pin instead of using a crystal oscillator.</div><div class='ctx'> 	This property is only valid when compatible = "ti,da850-pll0".</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/dra7-atl.txt b/Documentation/devicetree/bindings/clock/ti/dra7-atl.txt<br/>index 21c002d28b9b..68504079f99f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/dra7-atl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/dra7-atl.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/dra7-atl.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/dra7-atl.txt</a></div><div class='hunk'>@@ -6,7 +6,7 @@ functional clock but can be configured to provide different clocks.</div><div class='ctx'> ATL can maintain a clock averages to some desired frequency based on the bws/aws</div><div class='ctx'> signals - can compensate the drift between the two ws signal.</div><div class='ctx'> </div><div class='del'>-In order to provide the support for ATL and it's output clocks (which can be used</div><div class='add'>+In order to provide the support for ATL and its output clocks (which can be used</div><div class='ctx'> internally within the SoC or external components) two sets of bindings is needed:</div><div class='ctx'> </div><div class='ctx'> Clock tree binding:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt b/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt<br/>index 662b36d53bf0..518e3c142276 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/fixed-factor-clock.txt</a></div><div class='hunk'>@@ -16,6 +16,7 @@ Required properties:</div><div class='ctx'> - clocks: parent clock.</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='add'>+- clock-output-names : from common clock binding.</div><div class='ctx'> - ti,autoidle-shift: bit shift of the autoidle enable bit for the clock,</div><div class='ctx'>   see [2]</div><div class='ctx'> - reg: offset for the autoidle register of this clock, see [2]</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/gate.txt b/Documentation/devicetree/bindings/clock/ti/gate.txt<br/>index 56d603c1f716..4982615c01b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/gate.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/gate.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/gate.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/gate.txt</a></div><div class='hunk'>@@ -10,7 +10,7 @@ will be controlled instead and the corresponding hw-ops for</div><div class='ctx'> that is used.</div><div class='ctx'> </div><div class='ctx'> [1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt</div><div class='add'>+[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml</div><div class='ctx'> [3] Documentation/devicetree/bindings/clock/ti/clockdomain.txt</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='hunk'>@@ -36,6 +36,7 @@ Required properties:</div><div class='ctx'> 	ti,clkdm-gate-clock type</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='add'>+- clock-output-names : from common clock binding.</div><div class='ctx'> - ti,bit-shift : bit shift for programming the clock gate, invalid for</div><div class='ctx'> 		 ti,clkdm-gate-clock type</div><div class='ctx'> - ti,set-bit-to-disable : inverts default gate programming. Setting the bit</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/interface.txt b/Documentation/devicetree/bindings/clock/ti/interface.txt<br/>index 3f4704040140..d3eb5ca92a7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/interface.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/interface.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/interface.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/interface.txt</a></div><div class='hunk'>@@ -9,7 +9,7 @@ companion clock finding (match corresponding functional gate</div><div class='ctx'> clock) and hardware autoidle enable / disable.</div><div class='ctx'> </div><div class='ctx'> [1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.txt</div><div class='add'>+[2] Documentation/devicetree/bindings/clock/gpio-gate-clock.yaml</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : shall be one of:</div><div class='hunk'>@@ -28,6 +28,7 @@ Required properties:</div><div class='ctx'> - reg : base address for the control register</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='add'>+- clock-output-names : from common clock binding.</div><div class='ctx'> - ti,bit-shift : bit shift for the bit enabling/disabling the clock (default 0)</div><div class='ctx'> </div><div class='ctx'> Examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/mux.txt b/Documentation/devicetree/bindings/clock/ti/mux.txt<br/>index eec8994b9be8..e17425a58621 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/mux.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/mux.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/mux.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/mux.txt</a></div><div class='hunk'>@@ -42,6 +42,7 @@ Required properties:</div><div class='ctx'> - reg : register offset for register controlling adjustable mux</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='add'>+- clock-output-names : from common clock binding.</div><div class='ctx'> - ti,bit-shift : number of bits to shift the bit-mask, defaults to</div><div class='ctx'>   0 if not present</div><div class='ctx'> - ti,index-starts-at-one : valid input select programming starts at 1, not</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml b/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml<br/>index c56f911fff47..d525f96cf244 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/ti/ti,clksel.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/ti/ti,clksel.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for TI clksel clock</div><div class='add'>+title: TI clksel clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml<br/>index 7b7300ce96d6..d36558aa39f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pipllct.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pipllct.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Toshiba Visconti5 TMPV770X PLL Controller Device Tree Bindings</div><div class='add'>+title: Toshiba Visconti5 TMPV770X PLL Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nobuhiro Iwamatsu &lt;nobuhiro1.iwamatsu@toshiba.co.jp&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml b/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml<br/>index ed79f16fe6bc..081f85b1eb88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/toshiba,tmpv770x-pismu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/clock/toshiba,tmpv770x-pismu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Toshiba Visconti5 TMPV770x SMU controller Device Tree Bindings</div><div class='add'>+title: Toshiba Visconti5 TMPV770x SMU controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nobuhiro Iwamatsu &lt;nobuhiro1.iwamatsu@toshiba.co.jp&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml b/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml<br/>new file mode 100644<br/>index 000000000000..c1f04830a832<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/clock/xlnx,clocking-wizard.yaml</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx clocking wizard</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The clocking wizard is a soft ip clocking block of Xilinx versal. It</div><div class='add'>+  reads required input clock frequencies from the devicetree and acts as clock</div><div class='add'>+  clock output.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,clocking-wizard</div><div class='add'>+      - xlnx,clocking-wizard-v5.2</div><div class='add'>+      - xlnx,clocking-wizard-v6.0</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock input</div><div class='add'>+      - description: axi clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: clk_in1</div><div class='add'>+      - const: s_axi_aclk</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  xlnx,speed-grade:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [1, 2, 3]</div><div class='add'>+    description:</div><div class='add'>+      Speed grade of the device. Higher the speed grade faster is the FPGA device.</div><div class='add'>+</div><div class='add'>+  xlnx,nr-outputs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 8</div><div class='add'>+    description:</div><div class='add'>+      Number of outputs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - xlnx,speed-grade</div><div class='add'>+  - xlnx,nr-outputs</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-controller@b0000000  {</div><div class='add'>+        compatible = "xlnx,clocking-wizard";</div><div class='add'>+        reg = &lt;0xb0000000 0x10000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        xlnx,speed-grade = &lt;1&gt;;</div><div class='add'>+        xlnx,nr-outputs = &lt;6&gt;;</div><div class='add'>+        clock-names = "clk_in1", "s_axi_aclk";</div><div class='add'>+        clocks = &lt;&amp;clkc 15&gt;, &lt;&amp;clkc 15&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/connector/usb-connector.yaml b/Documentation/devicetree/bindings/connector/usb-connector.yaml<br/>index 0420fa563532..ae515651fc6b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/connector/usb-connector.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/connector/usb-connector.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/connector/usb-connector.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/connector/usb-connector.yaml</a></div><div class='hunk'>@@ -263,11 +263,11 @@ examples:</div><div class='ctx'>   # Micro-USB connector with HS lines routed via controller (MUIC).</div><div class='ctx'>   - |</div><div class='ctx'>     muic-max77843 {</div><div class='del'>-      usb_con1: connector {</div><div class='del'>-        compatible = "usb-b-connector";</div><div class='del'>-        label = "micro-USB";</div><div class='del'>-        type = "micro";</div><div class='del'>-      };</div><div class='add'>+        usb_con1: connector {</div><div class='add'>+            compatible = "usb-b-connector";</div><div class='add'>+            label = "micro-USB";</div><div class='add'>+            type = "micro";</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   # USB-C connector attached to CC controller (s2mm005), HS lines routed</div><div class='hunk'>@@ -275,34 +275,34 @@ examples:</div><div class='ctx'>   # DisplayPort video lines are routed to the connector via SS mux in USB3 PHY.</div><div class='ctx'>   - |</div><div class='ctx'>     ccic: s2mm005 {</div><div class='del'>-      usb_con2: connector {</div><div class='del'>-        compatible = "usb-c-connector";</div><div class='del'>-        label = "USB-C";</div><div class='add'>+        usb_con2: connector {</div><div class='add'>+            compatible = "usb-c-connector";</div><div class='add'>+            label = "USB-C";</div><div class='ctx'> </div><div class='del'>-        ports {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-          port@0 {</div><div class='del'>-            reg = &lt;0&gt;;</div><div class='del'>-            usb_con_hs: endpoint {</div><div class='del'>-              remote-endpoint = &lt;&amp;max77865_usbc_hs&gt;;</div><div class='del'>-            };</div><div class='del'>-          };</div><div class='del'>-          port@1 {</div><div class='del'>-            reg = &lt;1&gt;;</div><div class='del'>-            usb_con_ss: endpoint {</div><div class='del'>-              remote-endpoint = &lt;&amp;usbdrd_phy_ss&gt;;</div><div class='del'>-            };</div><div class='del'>-          };</div><div class='del'>-          port@2 {</div><div class='del'>-            reg = &lt;2&gt;;</div><div class='del'>-            usb_con_sbu: endpoint {</div><div class='del'>-              remote-endpoint = &lt;&amp;dp_aux&gt;;</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    usb_con_hs: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;max77865_usbc_hs&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    usb_con_ss: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;usbdrd_phy_ss&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    usb_con_sbu: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dp_aux&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='del'>-          };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   # USB-C connector attached to a typec port controller(ptn5110), which has</div><div class='hunk'>@@ -310,16 +310,16 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='ctx'>     typec: ptn5110 {</div><div class='del'>-      usb_con3: connector {</div><div class='del'>-        compatible = "usb-c-connector";</div><div class='del'>-        label = "USB-C";</div><div class='del'>-        power-role = "dual";</div><div class='del'>-        try-power-role = "sink";</div><div class='del'>-        source-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)&gt;;</div><div class='del'>-        sink-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)</div><div class='del'>-                     PDO_VAR(5000, 12000, 2000)&gt;;</div><div class='del'>-        op-sink-microwatt = &lt;10000000&gt;;</div><div class='del'>-      };</div><div class='add'>+        usb_con3: connector {</div><div class='add'>+            compatible = "usb-c-connector";</div><div class='add'>+            label = "USB-C";</div><div class='add'>+            power-role = "dual";</div><div class='add'>+            try-power-role = "sink";</div><div class='add'>+            source-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+            sink-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)</div><div class='add'>+                         PDO_VAR(5000, 12000, 2000)&gt;;</div><div class='add'>+            op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   # USB-C connector attached to SoC and USB3 typec port controller(hd3ss3220)</div><div class='hunk'>@@ -332,20 +332,20 @@ examples:</div><div class='ctx'>         data-role = "dual";</div><div class='ctx'> </div><div class='ctx'>         ports {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='del'>-                port@0 {</div><div class='del'>-                        reg = &lt;0&gt;;</div><div class='del'>-                        hs_ep: endpoint {</div><div class='del'>-                                remote-endpoint = &lt;&amp;usb3_hs_ep&gt;;</div><div class='del'>-                        };</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                hs_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;usb3_hs_ep&gt;;</div><div class='ctx'>                 };</div><div class='del'>-                port@1 {</div><div class='del'>-                        reg = &lt;1&gt;;</div><div class='del'>-                        ss_ep: endpoint {</div><div class='del'>-                                remote-endpoint = &lt;&amp;hd3ss3220_in_ep&gt;;</div><div class='del'>-                        };</div><div class='add'>+            };</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                ss_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;hd3ss3220_in_ep&gt;;</div><div class='ctx'>                 };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -354,12 +354,12 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'>     usb {</div><div class='del'>-      connector {</div><div class='del'>-        compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='del'>-        type = "micro";</div><div class='del'>-        id-gpios = &lt;&amp;pio 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-        vbus-supply = &lt;&amp;usb_p0_vbus&gt;;</div><div class='del'>-      };</div><div class='add'>+        connector {</div><div class='add'>+            compatible = "gpio-usb-b-connector", "usb-b-connector";</div><div class='add'>+            type = "micro";</div><div class='add'>+            id-gpios = &lt;&amp;pio 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            vbus-supply = &lt;&amp;usb_p0_vbus&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   # Micro-USB connector with HS lines routed via controller (MUIC) and MHL</div><div class='hunk'>@@ -367,27 +367,27 @@ examples:</div><div class='ctx'>   # mobile phone</div><div class='ctx'>   - |</div><div class='ctx'>     muic-max77843 {</div><div class='del'>-      usb_con4: connector {</div><div class='del'>-        compatible = "samsung,usb-connector-11pin", "usb-b-connector";</div><div class='del'>-        label = "micro-USB";</div><div class='del'>-        type = "micro";</div><div class='add'>+        usb_con4: connector {</div><div class='add'>+            compatible = "samsung,usb-connector-11pin", "usb-b-connector";</div><div class='add'>+            label = "micro-USB";</div><div class='add'>+            type = "micro";</div><div class='ctx'> </div><div class='del'>-        ports {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-          port@0 {</div><div class='del'>-            reg = &lt;0&gt;;</div><div class='del'>-            muic_to_usb: endpoint {</div><div class='del'>-              remote-endpoint = &lt;&amp;usb_to_muic&gt;;</div><div class='del'>-            };</div><div class='del'>-          };</div><div class='del'>-          port@3 {</div><div class='del'>-            reg = &lt;3&gt;;</div><div class='del'>-            usb_con_mhl: endpoint {</div><div class='del'>-              remote-endpoint = &lt;&amp;sii8620_mhl&gt;;</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    muic_to_usb: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;usb_to_muic&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+                port@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    usb_con_mhl: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;sii8620_mhl&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='del'>-          };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml b/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml<br/>new file mode 100644<br/>index 000000000000..4e0b2d2b303e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/counter/ti,am62-ecap-capture.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/counter/ti,am62-ecap-capture.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments Enhanced Capture (eCAP) Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Julien Panis &lt;jpanis@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The eCAP module resources can be used to capture timestamps</div><div class='add'>+  on input signal events (falling/rising edges).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,am62-ecap-capture</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: fck</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        capture@23100000 { /* eCAP in capture mode on am62x */</div><div class='add'>+            compatible = "ti,am62-ecap-capture";</div><div class='add'>+            reg = &lt;0x00 0x23100000 0x00 0x100&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 113 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            power-domains = &lt;&amp;k3_pds 51 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+            clocks = &lt;&amp;k3_clks 51 0&gt;;</div><div class='add'>+            clock-names = "fck";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/cpu-capacity.txt b/Documentation/devicetree/bindings/cpu/cpu-capacity.txt<br/>index cc5e190390b7..f28e1adad428 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/cpu-capacity.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/cpu-capacity.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpu/cpu-capacity.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpu/cpu-capacity.txt</a></div><div class='hunk'>@@ -1,12 +1,12 @@</div><div class='ctx'> ==========================================</div><div class='del'>-ARM CPUs capacity bindings</div><div class='add'>+CPU capacity bindings</div><div class='ctx'> ==========================================</div><div class='ctx'> </div><div class='ctx'> ==========================================</div><div class='ctx'> 1 - Introduction</div><div class='ctx'> ==========================================</div><div class='ctx'> </div><div class='del'>-ARM systems may be configured to have cpus with different power/performance</div><div class='add'>+Some systems may be configured to have cpus with different power/performance</div><div class='ctx'> characteristics within the same chip. In this case, additional information has</div><div class='ctx'> to be made available to the kernel for it to be aware of such differences and</div><div class='ctx'> take decisions accordingly.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpu/idle-states.yaml b/Documentation/devicetree/bindings/cpu/idle-states.yaml<br/>index fa4d4142ac93..b8cc826c9501 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpu/idle-states.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpu/idle-states.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpu/idle-states.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpu/idle-states.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/cpu/idle-states.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Idle states binding description</div><div class='add'>+title: Idle states</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml b/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml<br/>new file mode 100644<br/>index 000000000000..76cb9726660e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpufreq/apple,cluster-cpufreq.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Apple SoC cluster cpufreq device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hector Martin &lt;marcan@marcan.st&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of</div><div class='add'>+  the cluster management register block. This binding uses the standard</div><div class='add'>+  operating-points-v2 table to define the CPU performance states, with the</div><div class='add'>+  opp-level property specifying the hardware p-state index for that level.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - apple,t8103-cluster-cpufreq</div><div class='add'>+              - apple,t8112-cluster-cpufreq</div><div class='add'>+          - const: apple,cluster-cpufreq</div><div class='add'>+      - items:</div><div class='add'>+          - const: apple,t6000-cluster-cpufreq</div><div class='add'>+          - const: apple,t8103-cluster-cpufreq</div><div class='add'>+          - const: apple,cluster-cpufreq</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#performance-domain-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#performance-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // This example shows a single CPU per domain and 2 domains,</div><div class='add'>+    // with two p-states per domain.</div><div class='add'>+    // Shipping hardware has 2-4 CPUs per domain and 2-6 domains.</div><div class='add'>+    cpus {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      cpu@0 {</div><div class='add'>+        compatible = "apple,icestorm";</div><div class='add'>+        device_type = "cpu";</div><div class='add'>+        reg = &lt;0x0 0x0&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;ecluster_opp&gt;;</div><div class='add'>+        performance-domains = &lt;&amp;cpufreq_e&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cpu@10100 {</div><div class='add'>+        compatible = "apple,firestorm";</div><div class='add'>+        device_type = "cpu";</div><div class='add'>+        reg = &lt;0x0 0x10100&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;pcluster_opp&gt;;</div><div class='add'>+        performance-domains = &lt;&amp;cpufreq_p&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    ecluster_opp: opp-table-0 {</div><div class='add'>+      compatible = "operating-points-v2";</div><div class='add'>+      opp-shared;</div><div class='add'>+</div><div class='add'>+      opp01 {</div><div class='add'>+        opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+        opp-level = &lt;1&gt;;</div><div class='add'>+        clock-latency-ns = &lt;7500&gt;;</div><div class='add'>+      };</div><div class='add'>+      opp02 {</div><div class='add'>+        opp-hz = /bits/ 64 &lt;972000000&gt;;</div><div class='add'>+        opp-level = &lt;2&gt;;</div><div class='add'>+        clock-latency-ns = &lt;22000&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    pcluster_opp: opp-table-1 {</div><div class='add'>+      compatible = "operating-points-v2";</div><div class='add'>+      opp-shared;</div><div class='add'>+</div><div class='add'>+      opp01 {</div><div class='add'>+        opp-hz = /bits/ 64 &lt;600000000&gt;;</div><div class='add'>+        opp-level = &lt;1&gt;;</div><div class='add'>+        clock-latency-ns = &lt;8000&gt;;</div><div class='add'>+      };</div><div class='add'>+      opp02 {</div><div class='add'>+        opp-hz = /bits/ 64 &lt;828000000&gt;;</div><div class='add'>+        opp-level = &lt;2&gt;;</div><div class='add'>+        clock-latency-ns = &lt;19000&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      cpufreq_e: performance-controller@210e20000 {</div><div class='add'>+        compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+        reg = &lt;0x2 0x10e20000 0 0x1000&gt;;</div><div class='add'>+        #performance-domain-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cpufreq_p: performance-controller@211e20000 {</div><div class='add'>+        compatible = "apple,t8103-cluster-cpufreq", "apple,cluster-cpufreq";</div><div class='add'>+        reg = &lt;0x2 0x11e20000 0 0x1000&gt;;</div><div class='add'>+        #performance-domain-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt b/Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt<br/>index 73470ecd1f12..ce91a9197697 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt</a></div><div class='hunk'>@@ -16,7 +16,7 @@ has been processed. See [2] for more information on the brcm,l2-intc node.</div><div class='ctx'> firmware. On some SoCs, this firmware supports DFS and DVFS in addition to</div><div class='ctx'> Adaptive Voltage Scaling.</div><div class='ctx'> </div><div class='del'>-[2] Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt</div><div class='add'>+[2] Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Node brcm,avs-cpu-data-mem</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml<br/>index 9cd42a64b13e..d0aecde2b89b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek-hw.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek's CPUFREQ Bindings</div><div class='add'>+title: MediaTek's CPUFREQ</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Hector Yuan &lt;hector.yuan@mediatek.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt<br/>index b8233ec91d3d..e0a4ba599abc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt</a></div><div class='hunk'>@@ -20,6 +20,13 @@ Optional properties:</div><div class='ctx'> 	       Vsram to fit SoC specific needs. When absent, the voltage scaling</div><div class='ctx'> 	       flow is handled by hardware, hence no software "voltage tracking" is</div><div class='ctx'> 	       needed.</div><div class='add'>+- mediatek,cci:</div><div class='add'>+	Used to confirm the link status between cpufreq and mediatek cci. Because</div><div class='add'>+	cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.</div><div class='add'>+	To prevent the issue of high frequency and low voltage, we need to use this</div><div class='add'>+	property to make sure mediatek cci is ready.</div><div class='add'>+	For details of mediatek cci, please refer to</div><div class='add'>+	Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml</div><div class='ctx'> - #cooling-cells:</div><div class='ctx'> 	For details, please refer to</div><div class='ctx'> 	Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml<br/>index 2f1b8b6852a0..a6b3bb8fdf33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml</a></div><div class='hunk'>@@ -20,23 +20,38 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - description: v1 of CPUFREQ HW</div><div class='ctx'>         items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qcm2290-cpufreq-hw</div><div class='add'>+              - qcom,sc7180-cpufreq-hw</div><div class='add'>+              - qcom,sdm845-cpufreq-hw</div><div class='add'>+              - qcom,sm6115-cpufreq-hw</div><div class='add'>+              - qcom,sm6350-cpufreq-hw</div><div class='add'>+              - qcom,sm8150-cpufreq-hw</div><div class='ctx'>           - const: qcom,cpufreq-hw</div><div class='ctx'> </div><div class='ctx'>       - description: v2 of CPUFREQ HW (EPSS)</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,qdu1000-cpufreq-epss</div><div class='add'>+              - qcom,sa8775p-cpufreq-epss</div><div class='add'>+              - qcom,sc7280-cpufreq-epss</div><div class='add'>+              - qcom,sc8280xp-cpufreq-epss</div><div class='add'>+              - qcom,sm6375-cpufreq-epss</div><div class='ctx'>               - qcom,sm8250-cpufreq-epss</div><div class='add'>+              - qcom,sm8350-cpufreq-epss</div><div class='add'>+              - qcom,sm8450-cpufreq-epss</div><div class='add'>+              - qcom,sm8550-cpufreq-epss</div><div class='ctx'>           - const: qcom,cpufreq-epss</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 2</div><div class='add'>+    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Frequency domain 0 register region</div><div class='ctx'>       - description: Frequency domain 1 register region</div><div class='ctx'>       - description: Frequency domain 2 register region</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='del'>-    minItems: 2</div><div class='add'>+    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: freq-domain0</div><div class='ctx'>       - const: freq-domain1</div><div class='hunk'>@@ -52,9 +67,23 @@ properties:</div><div class='ctx'>       - const: xo</div><div class='ctx'>       - const: alternate</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: dcvsh-irq-0</div><div class='add'>+      - const: dcvsh-irq-1</div><div class='add'>+      - const: dcvsh-irq-2</div><div class='add'>+</div><div class='ctx'>   '#freq-domain-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -64,6 +93,111 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,qcm2290-cpufreq-hw</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,qdu1000-cpufreq-epss</div><div class='add'>+              - qcom,sc7180-cpufreq-hw</div><div class='add'>+              - qcom,sc8280xp-cpufreq-epss</div><div class='add'>+              - qcom,sdm845-cpufreq-hw</div><div class='add'>+              - qcom,sm6115-cpufreq-hw</div><div class='add'>+              - qcom,sm6350-cpufreq-hw</div><div class='add'>+              - qcom,sm6375-cpufreq-epss</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7280-cpufreq-epss</div><div class='add'>+              - qcom,sm8250-cpufreq-epss</div><div class='add'>+              - qcom,sm8350-cpufreq-epss</div><div class='add'>+              - qcom,sm8450-cpufreq-epss</div><div class='add'>+              - qcom,sm8550-cpufreq-epss</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8150-cpufreq-hw</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        # On some SoCs the Prime core shares the LMH irq with Big cores</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='hunk'>@@ -82,11 +216,16 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'>         L2_0: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>           L3_0: l3-cache {</div><div class='ctx'>             compatible = "cache";</div><div class='add'>+            cache-unified;</div><div class='add'>+            cache-level = &lt;3&gt;;</div><div class='ctx'>           };</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -98,8 +237,11 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_100&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'>         L2_100: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -111,8 +253,11 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_200&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'>         L2_200: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -124,8 +269,11 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_300&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 0&gt;;</div><div class='ctx'>         L2_300: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -137,8 +285,11 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_400&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'>         L2_400: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -150,8 +301,11 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_500&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'>         L2_500: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -163,8 +317,11 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_600&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'>         L2_600: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -176,8 +333,11 @@ examples:</div><div class='ctx'>         enable-method = "psci";</div><div class='ctx'>         next-level-cache = &lt;&amp;L2_700&gt;;</div><div class='ctx'>         qcom,freq-domain = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpufreq_hw 1&gt;;</div><div class='ctx'>         L2_700: l2-cache {</div><div class='ctx'>           compatible = "cache";</div><div class='add'>+          cache-unified;</div><div class='add'>+          cache-level = &lt;2&gt;;</div><div class='ctx'>           next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='hunk'>@@ -188,7 +348,7 @@ examples:</div><div class='ctx'>       #size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'>       cpufreq@17d43000 {</div><div class='del'>-        compatible = "qcom,cpufreq-hw";</div><div class='add'>+        compatible = "qcom,sdm845-cpufreq-hw", "qcom,cpufreq-hw";</div><div class='ctx'>         reg = &lt;0x17d43000 0x1400&gt;, &lt;0x17d45800 0x1400&gt;;</div><div class='ctx'>         reg-names = "freq-domain0", "freq-domain1";</div><div class='ctx'> </div><div class='hunk'>@@ -196,6 +356,7 @@ examples:</div><div class='ctx'>         clock-names = "xo", "alternate";</div><div class='ctx'> </div><div class='ctx'>         #freq-domain-cells = &lt;1&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml b/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml<br/>index a9a776da5505..6f5e7904181f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies, Inc. NVMEM CPUFreq bindings</div><div class='add'>+title: Qualcomm Technologies, Inc. NVMEM CPUFreq</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ilia Lin &lt;ilia.lin@kernel.org&gt;</div><div class='hunk'>@@ -17,54 +17,92 @@ description: |</div><div class='ctx'>   on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level</div><div class='ctx'>   according to the required OPPs defined in the CPU OPP tables.</div><div class='ctx'> </div><div class='add'>+  For old implementation efuses are parsed to select the correct opp table and</div><div class='add'>+  voltage and CPR is not supported/used.</div><div class='add'>+</div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='ctx'>       contains:</div><div class='ctx'>         enum:</div><div class='add'>+          - qcom,apq8064</div><div class='add'>+          - qcom,apq8096</div><div class='add'>+          - qcom,ipq8064</div><div class='add'>+          - qcom,msm8939</div><div class='add'>+          - qcom,msm8960</div><div class='add'>+          - qcom,msm8974</div><div class='add'>+          - qcom,msm8996</div><div class='ctx'>           - qcom,qcs404</div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='ctx'> </div><div class='del'>-properties:</div><div class='del'>-  cpus:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    patternProperties:</div><div class='del'>-      'cpu@[0-9a-f]+':</div><div class='del'>-        type: object</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          power-domains:</div><div class='del'>-            maxItems: 1</div><div class='del'>-</div><div class='del'>-          power-domain-names:</div><div class='del'>-            items:</div><div class='del'>-              - const: cpr</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - power-domains</div><div class='del'>-          - power-domain-names</div><div class='del'>-</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^opp-table(-[a-z0-9]+)?$':</div><div class='del'>-    if:</div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            compatible:</div><div class='add'>+              const: operating-points-v2-kryo-cpu</div><div class='add'>+        then:</div><div class='add'>+          $ref: /schemas/opp/opp-v2-kryo-cpu.yaml#</div><div class='add'>+</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            compatible:</div><div class='add'>+              const: operating-points-v2-qcom-level</div><div class='add'>+        then:</div><div class='add'>+          $ref: /schemas/opp/opp-v2-qcom-level.yaml#</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='del'>-          const: operating-points-v2-kryo-cpu</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,qcs404</div><div class='add'>+</div><div class='ctx'>     then:</div><div class='add'>+      properties:</div><div class='add'>+        cpus:</div><div class='add'>+          type: object</div><div class='add'>+</div><div class='add'>+          patternProperties:</div><div class='add'>+            '^cpu@[0-9a-f]+$':</div><div class='add'>+              type: object</div><div class='add'>+</div><div class='add'>+              properties:</div><div class='add'>+                power-domains:</div><div class='add'>+                  maxItems: 1</div><div class='add'>+</div><div class='add'>+                power-domain-names:</div><div class='add'>+                  items:</div><div class='add'>+                    - const: cpr</div><div class='add'>+</div><div class='add'>+              required:</div><div class='add'>+                - power-domains</div><div class='add'>+                - power-domain-names</div><div class='add'>+</div><div class='ctx'>       patternProperties:</div><div class='del'>-        '^opp-?[0-9]+$':</div><div class='del'>-          required:</div><div class='del'>-            - required-opps</div><div class='add'>+        '^opp-table(-[a-z0-9]+)?$':</div><div class='add'>+          if:</div><div class='add'>+            properties:</div><div class='add'>+              compatible:</div><div class='add'>+                const: operating-points-v2-kryo-cpu</div><div class='add'>+          then:</div><div class='add'>+            patternProperties:</div><div class='add'>+              '^opp-?[0-9]+$':</div><div class='add'>+                required:</div><div class='add'>+                  - required-opps</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     / {</div><div class='del'>-        model = "Qualcomm Technologies, Inc. QCS404";</div><div class='del'>-        compatible = "qcom,qcs404";</div><div class='add'>+        model = "Qualcomm Technologies, Inc. QCS404 EVB 1000";</div><div class='add'>+        compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb", "qcom,qcs404";</div><div class='ctx'>         #address-cells = &lt;2&gt;;</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml<br/>index dedc99e34ebc..0401c11da8d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/allwinner,sun4i-a10-crypto.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Security System Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Security System</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml<br/>index 00648f9d9278..4287678aa79f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml</a></div><div class='hunk'>@@ -14,6 +14,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - allwinner,sun8i-h3-crypto</div><div class='ctx'>       - allwinner,sun8i-r40-crypto</div><div class='add'>+      - allwinner,sun20i-d1-crypto</div><div class='ctx'>       - allwinner,sun50i-a64-crypto</div><div class='ctx'>       - allwinner,sun50i-h5-crypto</div><div class='ctx'>       - allwinner,sun50i-h6-crypto</div><div class='hunk'>@@ -29,6 +30,7 @@ properties:</div><div class='ctx'>       - description: Bus clock</div><div class='ctx'>       - description: Module clock</div><div class='ctx'>       - description: MBus clock</div><div class='add'>+      - description: TRNG clock (RC oscillator)</div><div class='ctx'>     minItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='hunk'>@@ -36,6 +38,7 @@ properties:</div><div class='ctx'>       - const: bus</div><div class='ctx'>       - const: mod</div><div class='ctx'>       - const: ram</div><div class='add'>+      - const: trng</div><div class='ctx'>     minItems: 2</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='hunk'>@@ -44,19 +47,33 @@ properties:</div><div class='ctx'> if:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='del'>-      const: allwinner,sun50i-h6-crypto</div><div class='add'>+      enum:</div><div class='add'>+        - allwinner,sun20i-d1-crypto</div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='ctx'>     clocks:</div><div class='del'>-      minItems: 3</div><div class='add'>+      minItems: 4</div><div class='ctx'>     clock-names:</div><div class='del'>-      minItems: 3</div><div class='add'>+      minItems: 4</div><div class='ctx'> else:</div><div class='del'>-  properties:</div><div class='del'>-    clocks:</div><div class='del'>-      maxItems: 2</div><div class='del'>-    clock-names:</div><div class='del'>-      maxItems: 2</div><div class='add'>+  if:</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: allwinner,sun50i-h6-crypto</div><div class='add'>+  then:</div><div class='add'>+    properties:</div><div class='add'>+      clocks:</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 3</div><div class='add'>+      clock-names:</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 3</div><div class='add'>+  else:</div><div class='add'>+    properties:</div><div class='add'>+      clocks:</div><div class='add'>+        maxItems: 2</div><div class='add'>+      clock-names:</div><div class='add'>+        maxItems: 2</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -82,4 +99,3 @@ examples:</div><div class='ctx'>       clock-names = "bus", "mod";</div><div class='ctx'>       resets = &lt;&amp;ccu RST_BUS_CE&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml b/Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml<br/>new file mode 100644<br/>index 000000000000..a772d232de09<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/aspeed,ast2500-hace.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ASPEED HACE hash and crypto Hardware Accelerator Engines</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neal Liu &lt;neal_liu@aspeedtech.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Hash and Crypto Engine (HACE) is designed to accelerate the throughput</div><div class='add'>+  of hash data digest, encryption, and decryption. Basically, HACE can be</div><div class='add'>+  divided into two independently engines - Hash Engine and Crypto Engine.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - aspeed,ast2500-hace</div><div class='add'>+      - aspeed,ast2600-hace</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/ast2600-clock.h&gt;</div><div class='add'>+    hace: crypto@1e6d0000 {</div><div class='add'>+        compatible = "aspeed,ast2600-hace";</div><div class='add'>+        reg = &lt;0x1e6d0000 0x200&gt;;</div><div class='add'>+        interrupts = &lt;4&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscon ASPEED_CLK_GATE_YCLK&gt;;</div><div class='add'>+        resets = &lt;&amp;syscon ASPEED_RESET_HACE&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml b/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml<br/>new file mode 100644<br/>index 000000000000..b18f178aac06<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neal Liu &lt;neal_liu@aspeedtech.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The ACRY ECDSA/RSA engines is designed to accelerate the throughput</div><div class='add'>+  of ECDSA/RSA signature and verification. Basically, ACRY can be</div><div class='add'>+  divided into two independent engines - ECC Engine and RSA Engine.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - aspeed,ast2600-acry</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: acry base address &amp; size</div><div class='add'>+      - description: acry sram base address &amp; size</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/ast2600-clock.h&gt;</div><div class='add'>+    acry: crypto@1e6fa000 {</div><div class='add'>+        compatible = "aspeed,ast2600-acry";</div><div class='add'>+        reg = &lt;0x1e6fa000 0x400&gt;, &lt;0x1e710000 0x1800&gt;;</div><div class='add'>+        interrupts = &lt;160&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscon ASPEED_CLK_GATE_RSACLK&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml<br/>index 0ccaab16dc61..0b7383b3106b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;</div><div class='add'>+  - Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml<br/>index 5163c51b4547..ee2ffb034325 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;</div><div class='add'>+  - Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml b/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml<br/>index fcc5adf03cad..3d6ed24b1b00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-tdes.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Atmel Triple Data Encryption Standard (TDES) HW cryptographic accelerator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;</div><div class='add'>+  - Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0-mon.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0-mon.yaml<br/>new file mode 100644<br/>index 000000000000..286dffa0671b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0-mon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/fsl,sec-v4.0-mon.yaml</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (C) 2008-2011 Freescale Semiconductor Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Secure Non-Volatile Storage (SNVS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - '"Horia Geantă" &lt;horia.geanta@nxp.com&gt;'</div><div class='add'>+  - Pankaj Gupta &lt;pankaj.gupta@nxp.com&gt;</div><div class='add'>+  - Gaurav Jain &lt;gaurav.jain@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Node defines address range and the associated interrupt for the SNVS function.</div><div class='add'>+  This function monitors security state information &amp; reports security</div><div class='add'>+  violations. This also included rtc, system power off and ON/OFF key.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,sec-v4.0-mon</div><div class='add'>+          - const: syscon</div><div class='add'>+          - const: simple-mfd</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,sec-v5.0-mon</div><div class='add'>+          - const: fsl,sec-v4.0-mon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,sec-v5.3-mon</div><div class='add'>+              - fsl,sec-v5.4-mon</div><div class='add'>+          - const: fsl,sec-v5.0-mon</div><div class='add'>+          - const: fsl,sec-v4.0-mon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  snvs-rtc-lp:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: fsl,sec-v4.0-mon-rtc-lp</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        const: snvs-rtc</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        # VFxxx has only one. What is the 2nd one?</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 2</div><div class='add'>+</div><div class='add'>+      regmap:</div><div class='add'>+        description: Parent node containing registers</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+      offset:</div><div class='add'>+        description: LP register offset</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        default: 0x34</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - interrupts</div><div class='add'>+      - regmap</div><div class='add'>+</div><div class='add'>+  snvs-powerkey:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      The snvs-pwrkey is designed to enable POWER key function which controlled</div><div class='add'>+      by SNVS ONOFF, the driver can report the status of POWER key and wakeup</div><div class='add'>+      system if pressed after system suspend.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: fsl,sec-v4.0-pwrkey</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        const: snvs-pwrkey</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      regmap:</div><div class='add'>+        description: Parent node containing registers</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+      wakeup-source: true</div><div class='add'>+</div><div class='add'>+      linux,keycode:</div><div class='add'>+        default: 116</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - interrupts</div><div class='add'>+      - regmap</div><div class='add'>+</div><div class='add'>+  snvs-lpgpr:</div><div class='add'>+    $ref: /schemas/nvmem/snvs-lpgpr.yaml#</div><div class='add'>+</div><div class='add'>+  snvs-poweroff:</div><div class='add'>+    description:</div><div class='add'>+      The SNVS could drive signal to PMIC to turn off system power by setting</div><div class='add'>+      SNVS_LP LPCR register.</div><div class='add'>+    $ref: /schemas/power/reset/syscon-poweroff.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx7d-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    sec_mon: sec-mon@314000 {</div><div class='add'>+        compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";</div><div class='add'>+        reg = &lt;0x314000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        snvs-rtc-lp {</div><div class='add'>+            compatible = "fsl,sec-v4.0-mon-rtc-lp";</div><div class='add'>+            regmap = &lt;&amp;sec_mon&gt;;</div><div class='add'>+            offset = &lt;0x34&gt;;</div><div class='add'>+            clocks = &lt;&amp;clks IMX7D_SNVS_CLK&gt;;</div><div class='add'>+            clock-names = "snvs-rtc";</div><div class='add'>+            interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        snvs-powerkey {</div><div class='add'>+            compatible = "fsl,sec-v4.0-pwrkey";</div><div class='add'>+            regmap = &lt;&amp;sec_mon&gt;;</div><div class='add'>+            clocks = &lt;&amp;clks IMX7D_SNVS_CLK&gt;;</div><div class='add'>+            clock-names = "snvs-pwrkey";</div><div class='add'>+            interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            linux,keycode = &lt;116&gt;; /* KEY_POWER */</div><div class='add'>+            wakeup-source;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml b/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml<br/>new file mode 100644<br/>index 000000000000..0a9ed2848b7c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/fsl,sec-v4.0.yaml</a></div><div class='hunk'>@@ -0,0 +1,266 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# Copyright (C) 2008-2011 Freescale Semiconductor Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale SEC 4</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - '"Horia Geantă" &lt;horia.geanta@nxp.com&gt;'</div><div class='add'>+  - Pankaj Gupta &lt;pankaj.gupta@nxp.com&gt;</div><div class='add'>+  - Gaurav Jain &lt;gaurav.jain@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  NOTE: the SEC 4 is also known as Freescale's Cryptographic Accelerator</div><div class='add'>+  Accelerator and Assurance Module (CAAM).</div><div class='add'>+</div><div class='add'>+  SEC 4 h/w can process requests from 2 types of sources.</div><div class='add'>+  1. DPAA Queue Interface (HW interface between Queue Manager &amp; SEC 4).</div><div class='add'>+  2. Job Rings (HW interface between cores &amp; SEC 4 registers).</div><div class='add'>+</div><div class='add'>+  High Speed Data Path Configuration:</div><div class='add'>+</div><div class='add'>+  HW interface between QM &amp; SEC 4 and also BM &amp; SEC 4, on DPAA-enabled parts</div><div class='add'>+  such as the P4080.  The number of simultaneous dequeues the QI can make is</div><div class='add'>+  equal to the number of Descriptor Controller (DECO) engines in a particular</div><div class='add'>+  SEC version.  E.g., the SEC 4.0 in the P4080 has 5 DECOs and can thus</div><div class='add'>+  dequeue from 5 subportals simultaneously.</div><div class='add'>+</div><div class='add'>+  Job Ring Data Path Configuration:</div><div class='add'>+</div><div class='add'>+  Each JR is located on a separate 4k page, they may (or may not) be made visible</div><div class='add'>+  in the memory partition devoted to a particular core.  The P4080 has 4 JRs, so</div><div class='add'>+  up to 4 JRs can be configured; and all 4 JRs process requests in parallel.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,sec-v5.4</div><div class='add'>+          - const: fsl,sec-v5.0</div><div class='add'>+          - const: fsl,sec-v4.0</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6ul-caam</div><div class='add'>+              - fsl,sec-v5.0</div><div class='add'>+          - const: fsl,sec-v4.0</div><div class='add'>+      - const: fsl,sec-v4.0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      enum: [mem, aclk, ipg, emi_slow]</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fsl,sec-era:</div><div class='add'>+    description: Defines the 'ERA' of the SEC device.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^jr@[0-9a-f]+$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Job Ring (JR) Node. Defines data processing interface to SEC 4 across the</div><div class='add'>+      peripheral bus for purposes of processing cryptographic descriptors. The</div><div class='add'>+      specified address range can be made visible to one (or more) cores. The</div><div class='add'>+      interrupt defined for this node is controlled within the address range of</div><div class='add'>+      this node.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        oneOf:</div><div class='add'>+          - items:</div><div class='add'>+              - const: fsl,sec-v5.4-job-ring</div><div class='add'>+              - const: fsl,sec-v5.0-job-ring</div><div class='add'>+              - const: fsl,sec-v4.0-job-ring</div><div class='add'>+          - items:</div><div class='add'>+              - const: fsl,sec-v5.0-job-ring</div><div class='add'>+              - const: fsl,sec-v4.0-job-ring</div><div class='add'>+          - const: fsl,sec-v4.0-job-ring</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      fsl,liodn:</div><div class='add'>+        description:</div><div class='add'>+          Specifies the LIODN to be used in conjunction with the ppid-to-liodn</div><div class='add'>+          table that specifies the PPID to LIODN mapping. Needed if the PAMU is</div><div class='add'>+          used.  Value is a 12 bit value where value is a LIODN ID for this JR.</div><div class='add'>+          This property is normally set by boot firmware.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        maximum: 0xfff</div><div class='add'>+</div><div class='add'>+  '^rtic@[0-9a-f]+$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Run Time Integrity Check (RTIC) Node. Defines a register space that</div><div class='add'>+      contains up to 5 sets of addresses and their lengths (sizes) that will be</div><div class='add'>+      checked at run time.  After an initial hash result is calculated, these</div><div class='add'>+      addresses are checked by HW to monitor any change.  If any memory is</div><div class='add'>+      modified, a Security Violation is triggered (see SNVS definition).</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        oneOf:</div><div class='add'>+          - items:</div><div class='add'>+              - const: fsl,sec-v5.4-rtic</div><div class='add'>+              - const: fsl,sec-v5.0-rtic</div><div class='add'>+              - const: fsl,sec-v4.0-rtic</div><div class='add'>+          - const: fsl,sec-v4.0-rtic</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      ranges:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^rtic-[a-z]@[0-9a-f]+$':</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description:</div><div class='add'>+          Run Time Integrity Check (RTIC) Memory Node defines individual RTIC</div><div class='add'>+          memory regions that are used to perform run-time integrity check of</div><div class='add'>+          memory areas that should not modified. The node defines a register</div><div class='add'>+          that contains the memory address &amp; length (combined) and a second</div><div class='add'>+          register that contains the hash result in big endian format.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            oneOf:</div><div class='add'>+              - items:</div><div class='add'>+                  - const: fsl,sec-v5.4-rtic-memory</div><div class='add'>+                  - const: fsl,sec-v5.0-rtic-memory</div><div class='add'>+                  - const: fsl,sec-v4.0-rtic-memory</div><div class='add'>+              - const: fsl,sec-v4.0-rtic-memory</div><div class='add'>+</div><div class='add'>+          reg:</div><div class='add'>+            items:</div><div class='add'>+              - description: RTIC memory address</div><div class='add'>+              - description: RTIC hash result</div><div class='add'>+</div><div class='add'>+          fsl,liodn:</div><div class='add'>+            description:</div><div class='add'>+              Specifies the LIODN to be used in conjunction with the</div><div class='add'>+              ppid-to-liodn table that specifies the PPID to LIODN mapping.</div><div class='add'>+              Needed if the PAMU is used.  Value is a 12 bit value where value</div><div class='add'>+              is a LIODN ID for this JR. This property is normally set by boot</div><div class='add'>+              firmware.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            maximum: 0xfff</div><div class='add'>+</div><div class='add'>+          fsl,rtic-region:</div><div class='add'>+            description:</div><div class='add'>+              Specifies the HW address (36 bit address) for this region</div><div class='add'>+              followed by the length of the HW partition to be checked;</div><div class='add'>+              the address is represented as a 64 bit quantity followed</div><div class='add'>+              by a 32 bit length.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    crypto@300000 {</div><div class='add'>+        compatible = "fsl,sec-v4.0";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        reg = &lt;0x300000 0x10000&gt;;</div><div class='add'>+        ranges = &lt;0 0x300000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;92 2&gt;;</div><div class='add'>+</div><div class='add'>+        jr@1000 {</div><div class='add'>+            compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+            reg = &lt;0x1000 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;88 2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        jr@2000 {</div><div class='add'>+            compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+            reg = &lt;0x2000 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;89 2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        jr@3000 {</div><div class='add'>+            compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+            reg = &lt;0x3000 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;90 2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        jr@4000 {</div><div class='add'>+            compatible = "fsl,sec-v4.0-job-ring";</div><div class='add'>+            reg = &lt;0x4000 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;91 2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        rtic@6000 {</div><div class='add'>+            compatible = "fsl,sec-v4.0-rtic";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            reg = &lt;0x6000 0x100&gt;;</div><div class='add'>+            ranges = &lt;0x0 0x6100 0xe00&gt;;</div><div class='add'>+</div><div class='add'>+            rtic-a@0 {</div><div class='add'>+                compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='add'>+                reg = &lt;0x00 0x20&gt;, &lt;0x100 0x80&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rtic-b@20 {</div><div class='add'>+                compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='add'>+                reg = &lt;0x20 0x20&gt;, &lt;0x200 0x80&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rtic-c@40 {</div><div class='add'>+                compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='add'>+                reg = &lt;0x40 0x20&gt;, &lt;0x300 0x80&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rtic-d@60 {</div><div class='add'>+                compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='add'>+                reg = &lt;0x60 0x20&gt;, &lt;0x500 0x80&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt<br/>deleted file mode 100644<br/>index 8f359f473ada..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/fsl-sec4.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/fsl-sec4.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,553 +0,0 @@</div><div class='del'>-=====================================================================</div><div class='del'>-SEC 4 Device Tree Binding</div><div class='del'>-Copyright (C) 2008-2011 Freescale Semiconductor Inc.</div><div class='del'>-</div><div class='del'>- CONTENTS</div><div class='del'>-   -Overview</div><div class='del'>-   -SEC 4 Node</div><div class='del'>-   -Job Ring Node</div><div class='del'>-   -Run Time Integrity Check (RTIC) Node</div><div class='del'>-   -Run Time Integrity Check (RTIC) Memory Node</div><div class='del'>-   -Secure Non-Volatile Storage (SNVS) Node</div><div class='del'>-   -Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node</div><div class='del'>-   -Full Example</div><div class='del'>-</div><div class='del'>-NOTE: the SEC 4 is also known as Freescale's Cryptographic Accelerator</div><div class='del'>-Accelerator and Assurance Module (CAAM).</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Overview</div><div class='del'>-</div><div class='del'>-DESCRIPTION</div><div class='del'>-</div><div class='del'>-SEC 4 h/w can process requests from 2 types of sources.</div><div class='del'>-1. DPAA Queue Interface (HW interface between Queue Manager &amp; SEC 4).</div><div class='del'>-2. Job Rings (HW interface between cores &amp; SEC 4 registers).</div><div class='del'>-</div><div class='del'>-High Speed Data Path Configuration:</div><div class='del'>-</div><div class='del'>-HW interface between QM &amp; SEC 4 and also BM &amp; SEC 4, on DPAA-enabled parts</div><div class='del'>-such as the P4080.  The number of simultaneous dequeues the QI can make is</div><div class='del'>-equal to the number of Descriptor Controller (DECO) engines in a particular</div><div class='del'>-SEC version.  E.g., the SEC 4.0 in the P4080 has 5 DECOs and can thus</div><div class='del'>-dequeue from 5 subportals simultaneously.</div><div class='del'>-</div><div class='del'>-Job Ring Data Path Configuration:</div><div class='del'>-</div><div class='del'>-Each JR is located on a separate 4k page, they may (or may not) be made visible</div><div class='del'>-in the memory partition devoted to a particular core.  The P4080 has 4 JRs, so</div><div class='del'>-up to 4 JRs can be configured; and all 4 JRs process requests in parallel.</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-SEC 4 Node</div><div class='del'>-</div><div class='del'>-Description</div><div class='del'>-</div><div class='del'>-    Node defines the base address of the SEC 4 block.</div><div class='del'>-    This block specifies the address range of all global</div><div class='del'>-    configuration registers for the SEC 4 block.  It</div><div class='del'>-    also receives interrupts from the Run Time Integrity Check</div><div class='del'>-    (RTIC) function within the SEC 4 block.</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-   - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v4.0"</div><div class='del'>-</div><div class='del'>-   - fsl,sec-era</div><div class='del'>-      Usage: optional</div><div class='del'>-      Value type: &lt;u32&gt;</div><div class='del'>-      Definition: A standard property. Define the 'ERA' of the SEC</div><div class='del'>-          device.</div><div class='del'>-</div><div class='del'>-   - #address-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing physical addresses in child nodes.</div><div class='del'>-</div><div class='del'>-   - #size-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing the size of physical addresses in</div><div class='del'>-           child nodes.</div><div class='del'>-</div><div class='del'>-   - reg</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-      Definition: A standard property.  Specifies the physical</div><div class='del'>-          address and length of the SEC4 configuration registers.</div><div class='del'>-          registers</div><div class='del'>-</div><div class='del'>-   - ranges</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-       Definition: A standard property.  Specifies the physical address</div><div class='del'>-           range of the SEC 4.0 register space (-SNVS not included).  A</div><div class='del'>-           triplet that includes the child address, parent address, &amp;</div><div class='del'>-           length.</div><div class='del'>-</div><div class='del'>-   - interrupts</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition:  Specifies the interrupts generated by this</div><div class='del'>-           device.  The value of the interrupts property</div><div class='del'>-           consists of one interrupt specifier. The format</div><div class='del'>-           of the specifier is defined by the binding document</div><div class='del'>-           describing the node's interrupt parent.</div><div class='del'>-</div><div class='del'>-   - clocks</div><div class='del'>-      Usage: required if SEC 4.0 requires explicit enablement of clocks</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition:  A list of phandle and clock specifier pairs describing</div><div class='del'>-          the clocks required for enabling and disabling SEC 4.0.</div><div class='del'>-</div><div class='del'>-   - clock-names</div><div class='del'>-      Usage: required if SEC 4.0 requires explicit enablement of clocks</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: A list of clock name strings in the same order as the</div><div class='del'>-          clocks property.</div><div class='del'>-</div><div class='del'>-   Note: All other standard properties (see the Devicetree Specification)</div><div class='del'>-   are allowed but are optional.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-</div><div class='del'>-iMX6QDL/SX requires four clocks</div><div class='del'>-</div><div class='del'>-	crypto@300000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0";</div><div class='del'>-		fsl,sec-era = &lt;2&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x300000 0x10000&gt;;</div><div class='del'>-		ranges = &lt;0 0x300000 0x10000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-		interrupts = &lt;92 2&gt;;</div><div class='del'>-		clocks = &lt;&amp;clks IMX6QDL_CLK_CAAM_MEM&gt;,</div><div class='del'>-			 &lt;&amp;clks IMX6QDL_CLK_CAAM_ACLK&gt;,</div><div class='del'>-			 &lt;&amp;clks IMX6QDL_CLK_CAAM_IPG&gt;,</div><div class='del'>-			 &lt;&amp;clks IMX6QDL_CLK_EIM_SLOW&gt;;</div><div class='del'>-		clock-names = "mem", "aclk", "ipg", "emi_slow";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-iMX6UL does only require three clocks</div><div class='del'>-</div><div class='del'>-	crypto: crypto@2140000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x2140000 0x3c000&gt;;</div><div class='del'>-		ranges = &lt;0 0x2140000 0x3c000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;clks IMX6UL_CLK_CAAM_MEM&gt;,</div><div class='del'>-			 &lt;&amp;clks IMX6UL_CLK_CAAM_ACLK&gt;,</div><div class='del'>-			 &lt;&amp;clks IMX6UL_CLK_CAAM_IPG&gt;;</div><div class='del'>-		clock-names = "mem", "aclk", "ipg";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Job Ring (JR) Node</div><div class='del'>-</div><div class='del'>-    Child of the crypto node defines data processing interface to SEC 4</div><div class='del'>-    across the peripheral bus for purposes of processing</div><div class='del'>-    cryptographic descriptors. The specified address</div><div class='del'>-    range can be made visible to one (or more) cores.</div><div class='del'>-    The interrupt defined for this node is controlled within</div><div class='del'>-    the address range of this node.</div><div class='del'>-</div><div class='del'>-  - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v4.0-job-ring"</div><div class='del'>-</div><div class='del'>-  - reg</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-      Definition: Specifies a two JR parameters:  an offset from</div><div class='del'>-          the parent physical address and the length the JR registers.</div><div class='del'>-</div><div class='del'>-   - fsl,liodn</div><div class='del'>-       Usage: optional-but-recommended</div><div class='del'>-       Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-       Definition:</div><div class='del'>-           Specifies the LIODN to be used in conjunction with</div><div class='del'>-           the ppid-to-liodn table that specifies the PPID to LIODN mapping.</div><div class='del'>-           Needed if the PAMU is used.  Value is a 12 bit value</div><div class='del'>-           where value is a LIODN ID for this JR. This property is</div><div class='del'>-           normally set by boot firmware.</div><div class='del'>-</div><div class='del'>-   - interrupts</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition:  Specifies the interrupts generated by this</div><div class='del'>-           device.  The value of the interrupts property</div><div class='del'>-           consists of one interrupt specifier. The format</div><div class='del'>-           of the specifier is defined by the binding document</div><div class='del'>-           describing the node's interrupt parent.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-	jr@1000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0-job-ring";</div><div class='del'>-		reg = &lt;0x1000 0x1000&gt;;</div><div class='del'>-		fsl,liodn = &lt;0x081&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-		interrupts = &lt;88 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Run Time Integrity Check (RTIC) Node</div><div class='del'>-</div><div class='del'>-  Child node of the crypto node.  Defines a register space that</div><div class='del'>-  contains up to 5 sets of addresses and their lengths (sizes) that</div><div class='del'>-  will be checked at run time.  After an initial hash result is</div><div class='del'>-  calculated, these addresses are checked by HW to monitor any</div><div class='del'>-  change.  If any memory is modified, a Security Violation is</div><div class='del'>-  triggered (see SNVS definition).</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-  - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v4.0-rtic".</div><div class='del'>-</div><div class='del'>-   - #address-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing physical addresses in child nodes.  Must</div><div class='del'>-           have a value of 1.</div><div class='del'>-</div><div class='del'>-   - #size-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing the size of physical addresses in</div><div class='del'>-           child nodes.  Must have a value of 1.</div><div class='del'>-</div><div class='del'>-  - reg</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-      Definition: A standard property.  Specifies a two parameters:</div><div class='del'>-          an offset from the parent physical address and the length</div><div class='del'>-          the SEC4 registers.</div><div class='del'>-</div><div class='del'>-   - ranges</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-       Definition: A standard property.  Specifies the physical address</div><div class='del'>-           range of the SEC 4 register space (-SNVS not included).  A</div><div class='del'>-           triplet that includes the child address, parent address, &amp;</div><div class='del'>-           length.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-	rtic@6000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0-rtic";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x6000 0x100&gt;;</div><div class='del'>-		ranges = &lt;0x0 0x6100 0xe00&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Run Time Integrity Check (RTIC) Memory Node</div><div class='del'>-  A child node that defines individual RTIC memory regions that are used to</div><div class='del'>-  perform run-time integrity check of memory areas that should not modified.</div><div class='del'>-  The node defines a register that contains the memory address &amp;</div><div class='del'>-  length (combined) and a second register that contains the hash result</div><div class='del'>-  in big endian format.</div><div class='del'>-</div><div class='del'>-  - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v4.0-rtic-memory".</div><div class='del'>-</div><div class='del'>-  - reg</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-      Definition: A standard property.  Specifies two parameters:</div><div class='del'>-          an offset from the parent physical address and the length:</div><div class='del'>-</div><div class='del'>-          1. The location of the RTIC memory address &amp; length registers.</div><div class='del'>-          2. The location RTIC hash result.</div><div class='del'>-</div><div class='del'>-  - fsl,rtic-region</div><div class='del'>-       Usage: optional-but-recommended</div><div class='del'>-       Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-       Definition:</div><div class='del'>-           Specifies the HW address (36 bit address) for this region</div><div class='del'>-           followed by the length of the HW partition to be checked;</div><div class='del'>-           the address is represented as a 64 bit quantity followed</div><div class='del'>-           by a 32 bit length.</div><div class='del'>-</div><div class='del'>-   - fsl,liodn</div><div class='del'>-       Usage: optional-but-recommended</div><div class='del'>-       Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-       Definition:</div><div class='del'>-           Specifies the LIODN to be used in conjunction with</div><div class='del'>-           the ppid-to-liodn table that specifies the PPID to LIODN</div><div class='del'>-           mapping.  Needed if the PAMU is used.  Value is a 12 bit value</div><div class='del'>-           where value is a LIODN ID for this RTIC memory region. This</div><div class='del'>-           property is normally set by boot firmware.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-	rtic-a@0 {</div><div class='del'>-		compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='del'>-		reg = &lt;0x00 0x20 0x100 0x80&gt;;</div><div class='del'>-		fsl,liodn   = &lt;0x03c&gt;;</div><div class='del'>-		fsl,rtic-region  = &lt;0x12345678 0x12345678 0x12345678&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Secure Non-Volatile Storage (SNVS) Node</div><div class='del'>-</div><div class='del'>-    Node defines address range and the associated</div><div class='del'>-    interrupt for the SNVS function.  This function</div><div class='del'>-    monitors security state information &amp; reports</div><div class='del'>-    security violations. This also included rtc,</div><div class='del'>-    system power off and ON/OFF key.</div><div class='del'>-</div><div class='del'>-  - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v4.0-mon" and "syscon".</div><div class='del'>-</div><div class='del'>-  - reg</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-      Definition: A standard property.  Specifies the physical</div><div class='del'>-          address and length of the SEC4 configuration</div><div class='del'>-          registers.</div><div class='del'>-</div><div class='del'>-   - #address-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing physical addresses in child nodes.  Must</div><div class='del'>-           have a value of 1.</div><div class='del'>-</div><div class='del'>-   - #size-cells</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;u32&gt;</div><div class='del'>-       Definition: A standard property.  Defines the number of cells</div><div class='del'>-           for representing the size of physical addresses in</div><div class='del'>-           child nodes.  Must have a value of 1.</div><div class='del'>-</div><div class='del'>-   - ranges</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-       Definition: A standard property.  Specifies the physical address</div><div class='del'>-           range of the SNVS register space.  A triplet that includes</div><div class='del'>-           the child address, parent address, &amp; length.</div><div class='del'>-</div><div class='del'>-   - interrupts</div><div class='del'>-      Usage: optional</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition:  Specifies the interrupts generated by this</div><div class='del'>-           device.  The value of the interrupts property</div><div class='del'>-           consists of one interrupt specifier. The format</div><div class='del'>-           of the specifier is defined by the binding document</div><div class='del'>-           describing the node's interrupt parent.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-	sec_mon@314000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0-mon", "syscon";</div><div class='del'>-		reg = &lt;0x314000 0x1000&gt;;</div><div class='del'>-		ranges = &lt;0 0x314000 0x1000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-		interrupts = &lt;93 2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node</div><div class='del'>-</div><div class='del'>-  A SNVS child node that defines SNVS LP RTC.</div><div class='del'>-</div><div class='del'>-  - compatible</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Must include "fsl,sec-v4.0-mon-rtc-lp".</div><div class='del'>-</div><div class='del'>-  - interrupts</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition: Specifies the interrupts generated by this</div><div class='del'>-	   device.  The value of the interrupts property</div><div class='del'>-	   consists of one interrupt specifier. The format</div><div class='del'>-	   of the specifier is defined by the binding document</div><div class='del'>-	   describing the node's interrupt parent.</div><div class='del'>-</div><div class='del'>- - regmap</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: this is phandle to the register map node.</div><div class='del'>-</div><div class='del'>- - offset</div><div class='del'>-	Usage: option</div><div class='del'>-	value type: &lt;u32&gt;</div><div class='del'>-	Definition: LP register offset. default it is 0x34.</div><div class='del'>-</div><div class='del'>-   - clocks</div><div class='del'>-      Usage: optional, required if SNVS LP RTC requires explicit</div><div class='del'>-          enablement of clocks</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition:  a clock specifier describing the clock required for</div><div class='del'>-          enabling and disabling SNVS LP RTC.</div><div class='del'>-</div><div class='del'>-   - clock-names</div><div class='del'>-      Usage: optional, required if SNVS LP RTC requires explicit</div><div class='del'>-          enablement of clocks</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: clock name string should be "snvs-rtc".</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-	sec_mon_rtc_lp@1 {</div><div class='del'>-		compatible = "fsl,sec-v4.0-mon-rtc-lp";</div><div class='del'>-		interrupts = &lt;93 2&gt;;</div><div class='del'>-		regmap = &lt;&amp;snvs&gt;;</div><div class='del'>-		offset = &lt;0x34&gt;;</div><div class='del'>-		clocks = &lt;&amp;clks IMX7D_SNVS_CLK&gt;;</div><div class='del'>-		clock-names = "snvs-rtc";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-System ON/OFF key driver</div><div class='del'>-</div><div class='del'>-  The snvs-pwrkey is designed to enable POWER key function which controlled</div><div class='del'>-  by SNVS ONOFF, the driver can report the status of POWER key and wakeup</div><div class='del'>-  system if pressed after system suspend.</div><div class='del'>-</div><div class='del'>-  - compatible:</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;string&gt;</div><div class='del'>-      Definition: Mush include "fsl,sec-v4.0-pwrkey".</div><div class='del'>-</div><div class='del'>-  - interrupts:</div><div class='del'>-      Usage: required</div><div class='del'>-      Value type: &lt;prop_encoded-array&gt;</div><div class='del'>-      Definition: The SNVS ON/OFF interrupt number to the CPU(s).</div><div class='del'>-</div><div class='del'>-  - linux,keycode:</div><div class='del'>-      Usage: option</div><div class='del'>-      Value type: &lt;int&gt;</div><div class='del'>-      Definition: Keycode to emit, KEY_POWER by default.</div><div class='del'>-</div><div class='del'>-  - wakeup-source:</div><div class='del'>-      Usage: option</div><div class='del'>-      Value type: &lt;boo&gt;</div><div class='del'>-      Definition: Button can wake-up the system.</div><div class='del'>-</div><div class='del'>- - regmap:</div><div class='del'>-      Usage: required:</div><div class='del'>-      Value type: &lt;phandle&gt;</div><div class='del'>-      Definition: this is phandle to the register map node.</div><div class='del'>-</div><div class='del'>-EXAMPLE:</div><div class='del'>-	snvs-pwrkey@020cc000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0-pwrkey";</div><div class='del'>-		regmap = &lt;&amp;snvs&gt;;</div><div class='del'>-		interrupts = &lt;0 4 0x4&gt;</div><div class='del'>-	        linux,keycode = &lt;116&gt;; /* KEY_POWER */</div><div class='del'>-		wakeup-source;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-FULL EXAMPLE</div><div class='del'>-</div><div class='del'>-	crypto: crypto@300000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x300000 0x10000&gt;;</div><div class='del'>-		ranges = &lt;0 0x300000 0x10000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-		interrupts = &lt;92 2&gt;;</div><div class='del'>-</div><div class='del'>-		sec_jr0: jr@1000 {</div><div class='del'>-			compatible = "fsl,sec-v4.0-job-ring";</div><div class='del'>-			reg = &lt;0x1000 0x1000&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-			interrupts = &lt;88 2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sec_jr1: jr@2000 {</div><div class='del'>-			compatible = "fsl,sec-v4.0-job-ring";</div><div class='del'>-			reg = &lt;0x2000 0x1000&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-			interrupts = &lt;89 2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sec_jr2: jr@3000 {</div><div class='del'>-			compatible = "fsl,sec-v4.0-job-ring";</div><div class='del'>-			reg = &lt;0x3000 0x1000&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-			interrupts = &lt;90 2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		sec_jr3: jr@4000 {</div><div class='del'>-			compatible = "fsl,sec-v4.0-job-ring";</div><div class='del'>-			reg = &lt;0x4000 0x1000&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-			interrupts = &lt;91 2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rtic@6000 {</div><div class='del'>-			compatible = "fsl,sec-v4.0-rtic";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;0x6000 0x100&gt;;</div><div class='del'>-			ranges = &lt;0x0 0x6100 0xe00&gt;;</div><div class='del'>-</div><div class='del'>-			rtic_a: rtic-a@0 {</div><div class='del'>-				compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='del'>-				reg = &lt;0x00 0x20 0x100 0x80&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rtic_b: rtic-b@20 {</div><div class='del'>-				compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='del'>-				reg = &lt;0x20 0x20 0x200 0x80&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rtic_c: rtic-c@40 {</div><div class='del'>-				compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='del'>-				reg = &lt;0x40 0x20 0x300 0x80&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rtic_d: rtic-d@60 {</div><div class='del'>-				compatible = "fsl,sec-v4.0-rtic-memory";</div><div class='del'>-				reg = &lt;0x60 0x20 0x500 0x80&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sec_mon: sec_mon@314000 {</div><div class='del'>-		compatible = "fsl,sec-v4.0-mon";</div><div class='del'>-		reg = &lt;0x314000 0x1000&gt;;</div><div class='del'>-		ranges = &lt;0 0x314000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		sec_mon_rtc_lp@34 {</div><div class='del'>-			compatible = "fsl,sec-v4.0-mon-rtc-lp";</div><div class='del'>-			regmap = &lt;&amp;sec_mon&gt;;</div><div class='del'>-			offset = &lt;0x34&gt;;</div><div class='del'>-			interrupts = &lt;93 2&gt;;</div><div class='del'>-			clocks = &lt;&amp;clks IMX7D_SNVS_CLK&gt;;</div><div class='del'>-			clock-names = "snvs-rtc";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		snvs-pwrkey@020cc000 {</div><div class='del'>-			compatible = "fsl,sec-v4.0-pwrkey";</div><div class='del'>-			regmap = &lt;&amp;sec_mon&gt;;</div><div class='del'>-			interrupts = &lt;0 4 0x4&gt;;</div><div class='del'>-			linux,keycode = &lt;116&gt;; /* KEY_POWER */</div><div class='del'>-			wakeup-source;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml<br/>index ee2c099981b2..fedd8be56ad6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-aes.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-aes.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Keem Bay OCS AES Device Tree Bindings</div><div class='add'>+title: Intel Keem Bay OCS AES</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniele Alessandrelli &lt;daniele.alessandrelli@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml<br/>index a3c16451b1ad..2bb95247b64f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-ecc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-ecc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Keem Bay OCS ECC Device Tree Bindings</div><div class='add'>+title: Intel Keem Bay OCS ECC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniele Alessandrelli &lt;daniele.alessandrelli@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml<br/>index acb92706d280..46e2853ab8f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Keem Bay OCS HCU Device Tree Bindings</div><div class='add'>+title: Intel Keem Bay OCS HCU</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Declan Murphy &lt;declan.murphy@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml<br/>new file mode 100644<br/>index 000000000000..92e1d76e29ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/qcom,inline-crypto-engine.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. (QTI) Inline Crypto Engine</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sm8550-inline-crypto-engine</div><div class='add'>+      - const: qcom,inline-crypto-engine</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-gcc.h&gt;</div><div class='add'>+</div><div class='add'>+    crypto@1d88000 {</div><div class='add'>+      compatible = "qcom,sm8550-inline-crypto-engine",</div><div class='add'>+                   "qcom,inline-crypto-engine";</div><div class='add'>+      reg = &lt;0x01d88000 0x8000&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_UFS_PHY_ICE_CORE_CLK&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.txt b/Documentation/devicetree/bindings/crypto/qcom-qce.txt<br/>deleted file mode 100644<br/>index fdd53b184ba8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/qcom-qce.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/qcom-qce.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-Qualcomm crypto engine driver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible  : should be "qcom,crypto-v5.1"</div><div class='del'>-- reg         : specifies base physical address and size of the registers map</div><div class='del'>-- clocks      : phandle to clock-controller plus clock-specifier pair</div><div class='del'>-- clock-names : "iface" clocks register interface</div><div class='del'>-                "bus" clocks data transfer interface</div><div class='del'>-                "core" clocks rest of the crypto block</div><div class='del'>-- dmas        : DMA specifiers for tx and rx dma channels. For more see</div><div class='del'>-                Documentation/devicetree/bindings/dma/dma.txt</div><div class='del'>-- dma-names   : DMA request names should be "rx" and "tx"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	crypto@fd45a000 {</div><div class='del'>-		compatible = "qcom,crypto-v5.1";</div><div class='del'>-		reg = &lt;0xfd45a000 0x6000&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_CE2_AHB_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_CE2_AXI_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_CE2_CLK&gt;;</div><div class='del'>-		clock-names = "iface", "bus", "core";</div><div class='del'>-		dmas = &lt;&amp;cryptobam 2&gt;, &lt;&amp;cryptobam 3&gt;;</div><div class='del'>-		dma-names = "rx", "tx";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/qcom-qce.yaml b/Documentation/devicetree/bindings/crypto/qcom-qce.yaml<br/>new file mode 100644<br/>index 000000000000..e375bd981300<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/qcom-qce.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/qcom-qce.yaml</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm crypto engine driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document defines the binding for the QCE crypto</div><div class='add'>+  controller found on Qualcomm parts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: qcom,crypto-v5.1</div><div class='add'>+        deprecated: true</div><div class='add'>+        description: Kept only for ABI backward compatibility</div><div class='add'>+</div><div class='add'>+      - const: qcom,crypto-v5.4</div><div class='add'>+        deprecated: true</div><div class='add'>+        description: Kept only for ABI backward compatibility</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,ipq6018-qce</div><div class='add'>+              - qcom,ipq8074-qce</div><div class='add'>+              - qcom,msm8996-qce</div><div class='add'>+              - qcom,sdm845-qce</div><div class='add'>+          - const: qcom,ipq4019-qce</div><div class='add'>+          - const: qcom,qce</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sm8250-qce</div><div class='add'>+              - qcom,sm8350-qce</div><div class='add'>+              - qcom,sm8450-qce</div><div class='add'>+              - qcom,sm8550-qce</div><div class='add'>+          - const: qcom,sm8150-qce</div><div class='add'>+          - const: qcom,qce</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: iface clocks register interface.</div><div class='add'>+      - description: bus clocks data transfer interface.</div><div class='add'>+      - description: core clocks rest of the crypto block.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+    description:</div><div class='add'>+      phandle to apps_smmu node with sid mask.</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Interconnect path between qce crypto and main memory.</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    const: memory</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMA specifiers for rx dma channel.</div><div class='add'>+      - description: DMA specifiers for tx dma channel.</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,crypto-v5.1</div><div class='add'>+              - qcom,crypto-v5.4</div><div class='add'>+              - qcom,ipq4019-qce</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-apq8084.h&gt;</div><div class='add'>+    crypto-engine@fd45a000 {</div><div class='add'>+        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";</div><div class='add'>+        reg = &lt;0xfd45a000 0x6000&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_CE2_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_CE2_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_CE2_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "core";</div><div class='add'>+        dmas = &lt;&amp;cryptobam 2&gt;, &lt;&amp;cryptobam 3&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x584 0x0011&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x586 0x0011&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x594 0x0011&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x596 0x0011&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml b/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml<br/>new file mode 100644<br/>index 000000000000..f1a9da8bff7a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/crypto/rockchip,rk3288-crypto.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip Electronics Security Accelerator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3288-crypto</div><div class='add'>+      - rockchip,rk3328-crypto</div><div class='add'>+      - rockchip,rk3399-crypto</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3288-crypto</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aclk</div><div class='add'>+            - const: hclk</div><div class='add'>+            - const: sclk</div><div class='add'>+            - const: apb_pclk</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: crypto-rst</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3328-crypto</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hclk_master</div><div class='add'>+            - const: hclk_slave</div><div class='add'>+            - const: sclk</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: crypto-rst</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3399-crypto</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hclk_master</div><div class='add'>+            - const: hclk_slave</div><div class='add'>+            - const: sclk</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 3</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: master</div><div class='add'>+            - const: slave</div><div class='add'>+            - const: crypto-rst</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3288-cru.h&gt;</div><div class='add'>+    crypto@ff8a0000 {</div><div class='add'>+      compatible = "rockchip,rk3288-crypto";</div><div class='add'>+      reg = &lt;0xff8a0000 0x4000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;cru ACLK_CRYPTO&gt;, &lt;&amp;cru HCLK_CRYPTO&gt;,</div><div class='add'>+               &lt;&amp;cru SCLK_CRYPTO&gt;, &lt;&amp;cru ACLK_DMAC1&gt;;</div><div class='add'>+      clock-names = "aclk", "hclk", "sclk", "apb_pclk";</div><div class='add'>+      resets = &lt;&amp;cru SRST_CRYPTO&gt;;</div><div class='add'>+      reset-names = "crypto-rst";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt b/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt<br/>deleted file mode 100644<br/>index 5e2ba385b8c9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/rockchip-crypto.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/rockchip-crypto.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-Rockchip Electronics And Security Accelerator</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "rockchip,rk3288-crypto"</div><div class='del'>-- reg: Base physical address of the engine and length of memory mapped</div><div class='del'>-       region</div><div class='del'>-- interrupts: Interrupt number</div><div class='del'>-- clocks: Reference to the clocks about crypto</div><div class='del'>-- clock-names: "aclk" used to clock data</div><div class='del'>-	       "hclk" used to clock data</div><div class='del'>-	       "sclk" used to clock crypto accelerator</div><div class='del'>-	       "apb_pclk" used to clock dma</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-	  See ../reset/reset.txt for details.</div><div class='del'>-- reset-names: Must include the name "crypto-rst".</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-	crypto: cypto-controller@ff8a0000 {</div><div class='del'>-		compatible = "rockchip,rk3288-crypto";</div><div class='del'>-		reg = &lt;0xff8a0000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru ACLK_CRYPTO&gt;, &lt;&amp;cru HCLK_CRYPTO&gt;,</div><div class='del'>-			 &lt;&amp;cru SCLK_CRYPTO&gt;, &lt;&amp;cru ACLK_DMAC1&gt;;</div><div class='del'>-		clock-names = "aclk", "hclk", "sclk", "apb_pclk";</div><div class='del'>-		resets = &lt;&amp;cru SRST_CRYPTO&gt;;</div><div class='del'>-		reset-names = "crypto-rst";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml b/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml<br/>index 676950bb7b37..5b31891c97fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml</a></div><div class='hunk'>@@ -24,7 +24,6 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml b/Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml<br/>index b72e4858f9aa..50b2c2e0c3cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/st,stm32-crc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/st,stm32-crc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 CRC bindings</div><div class='add'>+title: STMicroelectronics STM32 CRC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lionel Debieve &lt;lionel.debieve@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml b/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml<br/>index ed23bf94a8e0..0ddeb8a9a7a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/st,stm32-cryp.yaml</a></div><div class='hunk'>@@ -4,7 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 CRYP bindings</div><div class='add'>+title: STMicroelectronics STM32 CRYP</div><div class='add'>+</div><div class='add'>+description: The STM32 CRYP block is built on the CRYP block found in</div><div class='add'>+  the STn8820 SoC introduced in 2007, and subsequently used in the U8500</div><div class='add'>+  SoC in 2010.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lionel Debieve &lt;lionel.debieve@foss.st.com&gt;</div><div class='hunk'>@@ -12,6 +16,8 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - st,stn8820-cryp</div><div class='add'>+      - stericsson,ux500-cryp</div><div class='ctx'>       - st,stm32f756-cryp</div><div class='ctx'>       - st,stm32mp1-cryp</div><div class='ctx'> </div><div class='hunk'>@@ -27,6 +33,19 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: mem2cryp DMA channel</div><div class='add'>+      - description: cryp2mem DMA channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mem2cryp</div><div class='add'>+      - const: cryp2mem</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml b/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml<br/>index 10ba94792d95..b767ec72a999 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/st,stm32-hash.yaml</a></div><div class='hunk'>@@ -4,7 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 HASH bindings</div><div class='add'>+title: STMicroelectronics STM32 HASH</div><div class='add'>+</div><div class='add'>+description: The STM32 HASH block is built on the HASH block found in</div><div class='add'>+  the STn8820 SoC introduced in 2007, and subsequently used in the U8500</div><div class='add'>+  SoC in 2010.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lionel Debieve &lt;lionel.debieve@foss.st.com&gt;</div><div class='hunk'>@@ -12,6 +16,8 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - st,stn8820-hash</div><div class='add'>+      - stericsson,ux500-hash</div><div class='ctx'>       - st,stm32f456-hash</div><div class='ctx'>       - st,stm32f756-hash</div><div class='ctx'> </div><div class='hunk'>@@ -41,11 +47,26 @@ properties:</div><div class='ctx'>     maximum: 2</div><div class='ctx'>     default: 0</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='del'>-  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          items:</div><div class='add'>+            const: stericsson,ux500-hash</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts: false</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml<br/>index a410d2cedde6..77ec8bc70bf7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ properties:</div><div class='ctx'>       - ti,j721e-sa2ul</div><div class='ctx'>       - ti,am654-sa2ul</div><div class='ctx'>       - ti,am64-sa2ul</div><div class='add'>+      - ti,am62-sa3ul</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -25,8 +26,8 @@ properties:</div><div class='ctx'>   dmas:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: TX DMA Channel</div><div class='del'>-      - description: RX DMA Channel #1</div><div class='del'>-      - description: RX DMA Channel #2</div><div class='add'>+      - description: 'RX DMA Channel #1'</div><div class='add'>+      - description: 'RX DMA Channel #2'</div><div class='ctx'> </div><div class='ctx'>   dma-names:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -34,8 +35,6 @@ properties:</div><div class='ctx'>       - const: rx1</div><div class='ctx'>       - const: rx2</div><div class='ctx'> </div><div class='del'>-  dma-coherent: true</div><div class='del'>-</div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='hunk'>@@ -71,16 +70,6 @@ required:</div><div class='ctx'>   - dmas</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      enum:</div><div class='del'>-        - ti,j721e-sa2ul</div><div class='del'>-        - ti,am654-sa2ul</div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - dma-coherent</div><div class='del'>-</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -94,5 +83,4 @@ examples:</div><div class='ctx'>         dmas = &lt;&amp;main_udmap 0xc000&gt;, &lt;&amp;main_udmap 0x4000&gt;,</div><div class='ctx'>                &lt;&amp;main_udmap 0x4001&gt;;</div><div class='ctx'>         dma-names = "tx", "rx1", "rx2";</div><div class='del'>-        dma-coherent;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml b/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml<br/>index 55dd6e3d270d..9e8fbd02b150 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/crypto/xlnx,zynqmp-aes.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx ZynqMP AES-GCM Hardware Accelerator Device Tree Bindings</div><div class='add'>+title: Xilinx ZynqMP AES-GCM Hardware Accelerator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kalyani Akula &lt;kalyani.akula@xilinx.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml b/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml<br/>index d318fccf78f1..2bdd05af6079 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/devfreq/event/samsung,exynos-nocp.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos NoC (Network on Chip) Probe</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Samsung Exynos542x SoC has a NoC (Network on Chip) Probe for NoC bus.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml b/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml<br/>index c9a8cb5fd555..e300df4b47f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/devfreq/event/samsung,exynos-ppmu.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Samsung Exynos SoC PPMU (Platform Performance Monitoring Unit)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Samsung Exynos SoC has PPMU (Platform Performance Monitoring Unit) for</div><div class='head'>diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt<br/>deleted file mode 100644<br/>index bcaa2c08ac11..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/devfreq/exynos-bus.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/exynos-bus.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,488 +0,0 @@</div><div class='del'>-* Generic Exynos Bus frequency device</div><div class='del'>-</div><div class='del'>-The Samsung Exynos SoC has many buses for data transfer between DRAM</div><div class='del'>-and sub-blocks in SoC. Most Exynos SoCs share the common architecture</div><div class='del'>-for buses. Generally, each bus of Exynos SoC includes a source clock</div><div class='del'>-and a power line, which are able to change the clock frequency</div><div class='del'>-of the bus in runtime. To monitor the usage of each bus in runtime,</div><div class='del'>-the driver uses the PPMU (Platform Performance Monitoring Unit), which</div><div class='del'>-is able to measure the current load of sub-blocks.</div><div class='del'>-</div><div class='del'>-The Exynos SoC includes the various sub-blocks which have the each AXI bus.</div><div class='del'>-The each AXI bus has the owned source clock but, has not the only owned</div><div class='del'>-power line. The power line might be shared among one more sub-blocks.</div><div class='del'>-So, we can divide into two type of device as the role of each sub-block.</div><div class='del'>-There are two type of bus devices as following:</div><div class='del'>-- parent bus device</div><div class='del'>-- passive bus device</div><div class='del'>-</div><div class='del'>-Basically, parent and passive bus device share the same power line.</div><div class='del'>-The parent bus device can only change the voltage of shared power line</div><div class='del'>-and the rest bus devices (passive bus device) depend on the decision of</div><div class='del'>-the parent bus device. If there are three blocks which share the VDD_xxx</div><div class='del'>-power line, Only one block should be parent device and then the rest blocks</div><div class='del'>-should depend on the parent device as passive device.</div><div class='del'>-</div><div class='del'>-	VDD_xxx |--- A block (parent)</div><div class='del'>-		|--- B block (passive)</div><div class='del'>-		|--- C block (passive)</div><div class='del'>-</div><div class='del'>-There are a little different composition among Exynos SoC because each Exynos</div><div class='del'>-SoC has different sub-blocks. Therefore, such difference should be specified</div><div class='del'>-in devicetree file instead of each device driver. In result, this driver</div><div class='del'>-is able to support the bus frequency for all Exynos SoCs.</div><div class='del'>-</div><div class='del'>-Required properties for all bus devices:</div><div class='del'>-- compatible: Should be "samsung,exynos-bus".</div><div class='del'>-- clock-names : the name of clock used by the bus, "bus".</div><div class='del'>-- clocks : phandles for clock specified in "clock-names" property.</div><div class='del'>-- operating-points-v2: the OPP table including frequency/voltage information</div><div class='del'>-  to support DVFS (Dynamic Voltage/Frequency Scaling) feature.</div><div class='del'>-</div><div class='del'>-Required properties only for parent bus device:</div><div class='del'>-- vdd-supply: the regulator to provide the buses with the voltage.</div><div class='del'>-- devfreq-events: the devfreq-event device to monitor the current utilization</div><div class='del'>-  of buses.</div><div class='del'>-</div><div class='del'>-Required properties only for passive bus device:</div><div class='del'>-- devfreq: the parent bus device.</div><div class='del'>-</div><div class='del'>-Optional properties only for parent bus device:</div><div class='del'>-- exynos,saturation-ratio: the percentage value which is used to calibrate</div><div class='del'>-			the performance count against total cycle count.</div><div class='del'>-</div><div class='del'>-Optional properties for the interconnect functionality (QoS frequency</div><div class='del'>-constraints):</div><div class='del'>-- #interconnect-cells: should be 0.</div><div class='del'>-- interconnects: as documented in ../interconnect.txt, describes a path at the</div><div class='del'>-  higher level interconnects used by this interconnect provider.</div><div class='del'>-  If this interconnect provider is directly linked to a top level interconnect</div><div class='del'>-  provider the property contains only one phandle. The provider extends</div><div class='del'>-  the interconnect graph by linking its node to a node registered by provider</div><div class='del'>-  pointed to by first phandle in the 'interconnects' property.</div><div class='del'>-</div><div class='del'>-- samsung,data-clock-ratio: ratio of the data throughput in B/s to minimum data</div><div class='del'>-   clock frequency in Hz, default value is 8 when this property is missing.</div><div class='del'>-</div><div class='del'>-Detailed correlation between sub-blocks and power line according to Exynos SoC:</div><div class='del'>-- In case of Exynos3250, there are two power line as following:</div><div class='del'>-	VDD_MIF |--- DMC</div><div class='del'>-</div><div class='del'>-	VDD_INT |--- LEFTBUS (parent device)</div><div class='del'>-		|--- PERIL</div><div class='del'>-		|--- MFC</div><div class='del'>-		|--- G3D</div><div class='del'>-		|--- RIGHTBUS</div><div class='del'>-		|--- PERIR</div><div class='del'>-		|--- FSYS</div><div class='del'>-		|--- LCD0</div><div class='del'>-		|--- PERIR</div><div class='del'>-		|--- ISP</div><div class='del'>-		|--- CAM</div><div class='del'>-</div><div class='del'>-- In case of Exynos4210, there is one power line as following:</div><div class='del'>-	VDD_INT |--- DMC (parent device)</div><div class='del'>-		|--- LEFTBUS</div><div class='del'>-		|--- PERIL</div><div class='del'>-		|--- MFC(L)</div><div class='del'>-		|--- G3D</div><div class='del'>-		|--- TV</div><div class='del'>-		|--- LCD0</div><div class='del'>-		|--- RIGHTBUS</div><div class='del'>-		|--- PERIR</div><div class='del'>-		|--- MFC(R)</div><div class='del'>-		|--- CAM</div><div class='del'>-		|--- FSYS</div><div class='del'>-		|--- GPS</div><div class='del'>-		|--- LCD0</div><div class='del'>-		|--- LCD1</div><div class='del'>-</div><div class='del'>-- In case of Exynos4x12, there are two power line as following:</div><div class='del'>-	VDD_MIF |--- DMC</div><div class='del'>-</div><div class='del'>-	VDD_INT |--- LEFTBUS (parent device)</div><div class='del'>-		|--- PERIL</div><div class='del'>-		|--- MFC(L)</div><div class='del'>-		|--- G3D</div><div class='del'>-		|--- TV</div><div class='del'>-		|--- IMAGE</div><div class='del'>-		|--- RIGHTBUS</div><div class='del'>-		|--- PERIR</div><div class='del'>-		|--- MFC(R)</div><div class='del'>-		|--- CAM</div><div class='del'>-		|--- FSYS</div><div class='del'>-		|--- GPS</div><div class='del'>-		|--- LCD0</div><div class='del'>-		|--- ISP</div><div class='del'>-</div><div class='del'>-- In case of Exynos5422, there are two power line as following:</div><div class='del'>-	VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller)</div><div class='del'>-	        |--- DREX 1</div><div class='del'>-</div><div class='del'>-	VDD_INT |--- NoC_Core (parent device)</div><div class='del'>-		|--- G2D</div><div class='del'>-		|--- G3D</div><div class='del'>-		|--- DISP1</div><div class='del'>-		|--- NoC_WCORE</div><div class='del'>-		|--- GSCL</div><div class='del'>-		|--- MSCL</div><div class='del'>-		|--- ISP</div><div class='del'>-		|--- MFC</div><div class='del'>-		|--- GEN</div><div class='del'>-		|--- PERIS</div><div class='del'>-		|--- PERIC</div><div class='del'>-		|--- FSYS</div><div class='del'>-		|--- FSYS2</div><div class='del'>-</div><div class='del'>-- In case of Exynos5433, there is VDD_INT power line as following:</div><div class='del'>-	VDD_INT |--- G2D (parent device)</div><div class='del'>-		|--- MSCL</div><div class='del'>-		|--- GSCL</div><div class='del'>-		|--- JPEG</div><div class='del'>-		|--- MFC</div><div class='del'>-		|--- HEVC</div><div class='del'>-		|--- BUS0</div><div class='del'>-		|--- BUS1</div><div class='del'>-		|--- BUS2</div><div class='del'>-		|--- PERIS (Fixed clock rate)</div><div class='del'>-		|--- PERIC (Fixed clock rate)</div><div class='del'>-		|--- FSYS  (Fixed clock rate)</div><div class='del'>-</div><div class='del'>-Example 1:</div><div class='del'>-	Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to</div><div class='del'>-	power line (regulator). The MIF (Memory Interface) AXI bus is used to</div><div class='del'>-	transfer data between DRAM and CPU and uses the VDD_MIF regulator.</div><div class='del'>-</div><div class='del'>-	- MIF (Memory Interface) block</div><div class='del'>-	: VDD_MIF |--- DMC (Dynamic Memory Controller)</div><div class='del'>-</div><div class='del'>-	- INT (Internal) block</div><div class='del'>-	: VDD_INT |--- LEFTBUS (parent device)</div><div class='del'>-		  |--- PERIL</div><div class='del'>-		  |--- MFC</div><div class='del'>-		  |--- G3D</div><div class='del'>-		  |--- RIGHTBUS</div><div class='del'>-		  |--- FSYS</div><div class='del'>-		  |--- LCD0</div><div class='del'>-		  |--- PERIR</div><div class='del'>-		  |--- ISP</div><div class='del'>-		  |--- CAM</div><div class='del'>-</div><div class='del'>-	- MIF bus's frequency/voltage table</div><div class='del'>-	-----------------------</div><div class='del'>-	|Lv| Freq   | Voltage |</div><div class='del'>-	-----------------------</div><div class='del'>-	|L1| 50000  |800000   |</div><div class='del'>-	|L2| 100000 |800000   |</div><div class='del'>-	|L3| 134000 |800000   |</div><div class='del'>-	|L4| 200000 |825000   |</div><div class='del'>-	|L5| 400000 |875000   |</div><div class='del'>-	-----------------------</div><div class='del'>-</div><div class='del'>-	- INT bus's frequency/voltage table</div><div class='del'>-	----------------------------------------------------------</div><div class='del'>-	|Block|LEFTBUS|RIGHTBUS|MCUISP |ISP    |PERIL  ||VDD_INT |</div><div class='del'>-	| name|       |LCD0    |       |       |       ||        |</div><div class='del'>-	|     |       |FSYS    |       |       |       ||        |</div><div class='del'>-	|     |       |MFC     |       |       |       ||        |</div><div class='del'>-	----------------------------------------------------------</div><div class='del'>-	|Mode |*parent|passive |passive|passive|passive||        |</div><div class='del'>-	----------------------------------------------------------</div><div class='del'>-	|Lv   |Frequency                               ||Voltage |</div><div class='del'>-	----------------------------------------------------------</div><div class='del'>-	|L1   |50000  |50000   |50000  |50000  |50000  ||900000  |</div><div class='del'>-	|L2   |80000  |80000   |80000  |80000  |80000  ||900000  |</div><div class='del'>-	|L3   |100000 |100000  |100000 |100000 |100000 ||1000000 |</div><div class='del'>-	|L4   |134000 |134000  |200000 |200000 |       ||1000000 |</div><div class='del'>-	|L5   |200000 |200000  |400000 |300000 |       ||1000000 |</div><div class='del'>-	----------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Example 2:</div><div class='del'>-	The bus of DMC (Dynamic Memory Controller) block in exynos3250.dtsi</div><div class='del'>-	is listed below:</div><div class='del'>-</div><div class='del'>-	bus_dmc: bus_dmc {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu_dmc CLK_DIV_DMC&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_dmc_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_dmc_opp_table: opp_table1 {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-50000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-100000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-134000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;134000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;800000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-200000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;825000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-400000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;875000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_leftbus: bus_leftbus {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_DIV_GDL&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_rightbus: bus_rightbus {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_DIV_GDR&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_lcd0: bus_lcd0 {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_DIV_ACLK_160&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_fsys: bus_fsys {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_DIV_ACLK_200&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_mcuisp: bus_mcuisp {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_DIV_ACLK_400_MCUISP&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_mcuisp_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_isp: bus_isp {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_DIV_ACLK_266&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_isp_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_peril: bus_peril {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_DIV_ACLK_100&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_peril_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_mfc: bus_mfc {</div><div class='del'>-		compatible = "samsung,exynos-bus";</div><div class='del'>-		clocks = &lt;&amp;cmu CLK_SCLK_MFC&gt;;</div><div class='del'>-		clock-names = "bus";</div><div class='del'>-		operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_leftbus_opp_table: opp_table1 {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-50000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-80000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;80000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-100000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-134000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;134000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-200000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_mcuisp_opp_table: opp_table2 {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-50000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-80000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;80000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-100000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-200000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-400000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_isp_opp_table: opp_table3 {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-50000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-80000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;80000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-100000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-200000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-300000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	bus_peril_opp_table: opp_table4 {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-		opp-shared;</div><div class='del'>-</div><div class='del'>-		opp-50000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-80000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;80000000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp-100000000 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	Usage case to handle the frequency and voltage of bus on runtime</div><div class='del'>-	in exynos3250-rinato.dts is listed below:</div><div class='del'>-</div><div class='del'>-	&amp;bus_dmc {</div><div class='del'>-		devfreq-events = &lt;&amp;ppmu_dmc0_3&gt;, &lt;&amp;ppmu_dmc1_3&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;buck1_reg&gt;;	/* VDD_MIF */</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_leftbus {</div><div class='del'>-		devfreq-events = &lt;&amp;ppmu_leftbus_3&gt;, &lt;&amp;ppmu_rightbus_3&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;buck3_reg&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_rightbus {</div><div class='del'>-		devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_lcd0 {</div><div class='del'>-		devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_fsys {</div><div class='del'>-		devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_mcuisp {</div><div class='del'>-		devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_isp {</div><div class='del'>-		devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_peril {</div><div class='del'>-		devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;bus_mfc {</div><div class='del'>-		devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='del'>-		status = "okay";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 3:</div><div class='del'>-	An interconnect path "bus_display -- bus_leftbus -- bus_dmc" on</div><div class='del'>-	Exynos4412 SoC with video mixer as an interconnect consumer device.</div><div class='del'>-</div><div class='del'>-	soc {</div><div class='del'>-		bus_dmc: bus_dmc {</div><div class='del'>-			compatible = "samsung,exynos-bus";</div><div class='del'>-			clocks = &lt;&amp;clock CLK_DIV_DMC&gt;;</div><div class='del'>-			clock-names = "bus";</div><div class='del'>-			operating-points-v2 = &lt;&amp;bus_dmc_opp_table&gt;;</div><div class='del'>-			samsung,data-clock-ratio = &lt;4&gt;;</div><div class='del'>-			#interconnect-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		bus_leftbus: bus_leftbus {</div><div class='del'>-			compatible = "samsung,exynos-bus";</div><div class='del'>-			clocks = &lt;&amp;clock CLK_DIV_GDL&gt;;</div><div class='del'>-			clock-names = "bus";</div><div class='del'>-			operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='del'>-			#interconnect-cells = &lt;0&gt;;</div><div class='del'>-			interconnects = &lt;&amp;bus_dmc&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		bus_display: bus_display {</div><div class='del'>-			compatible = "samsung,exynos-bus";</div><div class='del'>-			clocks = &lt;&amp;clock CLK_ACLK160&gt;;</div><div class='del'>-			clock-names = "bus";</div><div class='del'>-			operating-points-v2 = &lt;&amp;bus_display_opp_table&gt;;</div><div class='del'>-			#interconnect-cells = &lt;0&gt;;</div><div class='del'>-			interconnects = &lt;&amp;bus_leftbus &amp;bus_dmc&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		bus_dmc_opp_table: opp_table1 {</div><div class='del'>-			compatible = "operating-points-v2";</div><div class='del'>-			/* ... */</div><div class='del'>-		}</div><div class='del'>-</div><div class='del'>-		bus_leftbus_opp_table: opp_table3 {</div><div class='del'>-			compatible = "operating-points-v2";</div><div class='del'>-			/* ... */</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		bus_display_opp_table: opp_table4 {</div><div class='del'>-			compatible = "operating-points-v2";</div><div class='del'>-			/* .. */</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		&amp;mixer {</div><div class='del'>-			compatible = "samsung,exynos4212-mixer";</div><div class='del'>-			interconnects = &lt;&amp;bus_display &amp;bus_dmc&gt;;</div><div class='del'>-			/* ... */</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt<br/>deleted file mode 100644<br/>index 58fc8a6cebc7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,212 +0,0 @@</div><div class='del'>-* Rockchip rk3399 DMC (Dynamic Memory Controller) device</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		 Must be "rockchip,rk3399-dmc".</div><div class='del'>-- devfreq-events:	 Node to get DDR loading, Refer to</div><div class='del'>-			 Documentation/devicetree/bindings/devfreq/event/</div><div class='del'>-			 rockchip-dfi.txt</div><div class='del'>-- clocks:		 Phandles for clock specified in "clock-names" property</div><div class='del'>-- clock-names :		 The name of clock used by the DFI, must be</div><div class='del'>-			 "pclk_ddr_mon";</div><div class='del'>-- operating-points-v2:	 Refer to Documentation/devicetree/bindings/opp/opp-v2.yaml</div><div class='del'>-			 for details.</div><div class='del'>-- center-supply:	 DMC supply node.</div><div class='del'>-- status:		 Marks the node enabled/disabled.</div><div class='del'>-- rockchip,pmu:		 Phandle to the syscon managing the "PMU general register</div><div class='del'>-			 files".</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts:		 The CPU interrupt number. The interrupt specifier</div><div class='del'>-			 format depends on the interrupt controller.</div><div class='del'>-			 It should be a DCF interrupt. When DDR DVFS finishes</div><div class='del'>-			 a DCF interrupt is triggered.</div><div class='del'>-- rockchip,pmu:		 Phandle to the syscon managing the "PMU general register</div><div class='del'>-			 files".</div><div class='del'>-</div><div class='del'>-Following properties relate to DDR timing:</div><div class='del'>-</div><div class='del'>-- rockchip,dram_speed_bin :	  Value reference include/dt-bindings/clock/rk3399-ddr.h,</div><div class='del'>-				  it selects the DDR3 cl-trp-trcd type. It must be</div><div class='del'>-				  set according to "Speed Bin" in DDR3 datasheet,</div><div class='del'>-				  DO NOT use a smaller "Speed Bin" than specified</div><div class='del'>-				  for the DDR3 being used.</div><div class='del'>-</div><div class='del'>-- rockchip,pd_idle :		  Configure the PD_IDLE value. Defines the</div><div class='del'>-				  power-down idle period in which memories are</div><div class='del'>-				  placed into power-down mode if bus is idle</div><div class='del'>-				  for PD_IDLE DFI clock cycles.</div><div class='del'>-</div><div class='del'>-- rockchip,sr_idle :		  Configure the SR_IDLE value. Defines the</div><div class='del'>-				  self-refresh idle period in which memories are</div><div class='del'>-				  placed into self-refresh mode if bus is idle</div><div class='del'>-				  for SR_IDLE * 1024 DFI clock cycles (DFI</div><div class='del'>-				  clocks freq is half of DRAM clock), default</div><div class='del'>-				  value is "0".</div><div class='del'>-</div><div class='del'>-- rockchip,sr_mc_gate_idle :	  Defines the memory self-refresh and controller</div><div class='del'>-				  clock gating idle period. Memories are placed</div><div class='del'>-				  into self-refresh mode and memory controller</div><div class='del'>-				  clock arg gating started if bus is idle for</div><div class='del'>-				  sr_mc_gate_idle*1024 DFI clock cycles.</div><div class='del'>-</div><div class='del'>-- rockchip,srpd_lite_idle :	  Defines the self-refresh power down idle</div><div class='del'>-				  period in which memories are placed into</div><div class='del'>-				  self-refresh power down mode if bus is idle</div><div class='del'>-				  for srpd_lite_idle * 1024 DFI clock cycles.</div><div class='del'>-				  This parameter is for LPDDR4 only.</div><div class='del'>-</div><div class='del'>-- rockchip,standby_idle :	  Defines the standby idle period in which</div><div class='del'>-				  memories are placed into self-refresh mode.</div><div class='del'>-				  The controller, pi, PHY and DRAM clock will</div><div class='del'>-				  be gated if bus is idle for standby_idle * DFI</div><div class='del'>-				  clock cycles.</div><div class='del'>-</div><div class='del'>-- rockchip,dram_dll_dis_freq :	  Defines the DDR3 DLL bypass frequency in MHz.</div><div class='del'>-				  When DDR frequency is less than DRAM_DLL_DISB_FREQ,</div><div class='del'>-				  DDR3 DLL will be bypassed. Note: if DLL was bypassed,</div><div class='del'>-				  the odt will also stop working.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_dll_dis_freq :	  Defines the PHY dll bypass frequency in</div><div class='del'>-				  MHz (Mega Hz). When DDR frequency is less than</div><div class='del'>-				  DRAM_DLL_DISB_FREQ, PHY DLL will be bypassed.</div><div class='del'>-				  Note: PHY DLL and PHY ODT are independent.</div><div class='del'>-</div><div class='del'>-- rockchip,ddr3_odt_dis_freq :	  When the DRAM type is DDR3, this parameter defines</div><div class='del'>-				  the ODT disable frequency in MHz (Mega Hz).</div><div class='del'>-				  when the DDR frequency is  less then ddr3_odt_dis_freq,</div><div class='del'>-				  the ODT on the DRAM side and controller side are</div><div class='del'>-				  both disabled.</div><div class='del'>-</div><div class='del'>-- rockchip,ddr3_drv :		  When the DRAM type is DDR3, this parameter defines</div><div class='del'>-				  the DRAM side driver strength in ohms. Default</div><div class='del'>-				  value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,ddr3_odt :		  When the DRAM type is DDR3, this parameter defines</div><div class='del'>-				  the DRAM side ODT strength in ohms. Default value</div><div class='del'>-				  is 120.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_ddr3_ca_drv :	  When the DRAM type is DDR3, this parameter defines</div><div class='del'>-				  the phy side CA line (incluing command line,</div><div class='del'>-				  address line and clock line) driver strength.</div><div class='del'>-				  Default value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_ddr3_dq_drv :	  When the DRAM type is DDR3, this parameter defines</div><div class='del'>-				  the PHY side DQ line (including DQS/DQ/DM line)</div><div class='del'>-				  driver strength. Default value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_ddr3_odt : 	  When the DRAM type is DDR3, this parameter defines</div><div class='del'>-				  the PHY side ODT strength. Default value is 240.</div><div class='del'>-</div><div class='del'>-- rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines</div><div class='del'>-				  then ODT disable frequency in MHz (Mega Hz).</div><div class='del'>-				  When DDR frequency is less then ddr3_odt_dis_freq,</div><div class='del'>-				  the ODT on the DRAM side and controller side are</div><div class='del'>-				  both disabled.</div><div class='del'>-</div><div class='del'>-- rockchip,lpddr3_drv :		  When the DRAM type is LPDDR3, this parameter defines</div><div class='del'>-				  the DRAM side driver strength in ohms. Default</div><div class='del'>-				  value is 34.</div><div class='del'>-</div><div class='del'>-- rockchip,lpddr3_odt :		  When the DRAM type is LPDDR3, this parameter defines</div><div class='del'>-				  the DRAM side ODT strength in ohms. Default value</div><div class='del'>-				  is 240.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_lpddr3_ca_drv :	  When the DRAM type is LPDDR3, this parameter defines</div><div class='del'>-				  the PHY side CA line (including command line,</div><div class='del'>-				  address line and clock line) driver strength.</div><div class='del'>-				  Default value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_lpddr3_dq_drv :	  When the DRAM type is LPDDR3, this parameter defines</div><div class='del'>-				  the PHY side DQ line (including DQS/DQ/DM line)</div><div class='del'>-				  driver strength. Default value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_lpddr3_odt : 	  When dram type is LPDDR3, this parameter define</div><div class='del'>-				  the phy side odt strength, default value is 240.</div><div class='del'>-</div><div class='del'>-- rockchip,lpddr4_odt_dis_freq : When the DRAM type is LPDDR4, this parameter</div><div class='del'>-				  defines the ODT disable frequency in</div><div class='del'>-				  MHz (Mega Hz). When the DDR frequency is less then</div><div class='del'>-				  ddr3_odt_dis_freq, the ODT on the DRAM side and</div><div class='del'>-				  controller side are both disabled.</div><div class='del'>-</div><div class='del'>-- rockchip,lpddr4_drv :		  When the DRAM type is LPDDR4, this parameter defines</div><div class='del'>-				  the DRAM side driver strength in ohms. Default</div><div class='del'>-				  value is 60.</div><div class='del'>-</div><div class='del'>-- rockchip,lpddr4_dq_odt : 	  When the DRAM type is LPDDR4, this parameter defines</div><div class='del'>-				  the DRAM side ODT on DQS/DQ line strength in ohms.</div><div class='del'>-				  Default value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,lpddr4_ca_odt :	  When the DRAM type is LPDDR4, this parameter defines</div><div class='del'>-				  the DRAM side ODT on CA line strength in ohms.</div><div class='del'>-				  Default value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_lpddr4_ca_drv :	  When the DRAM type is LPDDR4, this parameter defines</div><div class='del'>-				  the PHY side CA line (including command address</div><div class='del'>-				  line) driver strength. Default value is 40.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines</div><div class='del'>-				  the PHY side clock line and CS line driver</div><div class='del'>-				  strength. Default value is 80.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_lpddr4_dq_drv :	  When the DRAM type is LPDDR4, this parameter defines</div><div class='del'>-				  the PHY side DQ line (including DQS/DQ/DM line)</div><div class='del'>-				  driver strength. Default value is 80.</div><div class='del'>-</div><div class='del'>-- rockchip,phy_lpddr4_odt :	  When the DRAM type is LPDDR4, this parameter defines</div><div class='del'>-				  the PHY side ODT strength. Default value is 60.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	dmc_opp_table: dmc_opp_table {</div><div class='del'>-		compatible = "operating-points-v2";</div><div class='del'>-</div><div class='del'>-		opp00 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='del'>-		};</div><div class='del'>-		opp01 {</div><div class='del'>-			opp-hz = /bits/ 64 &lt;666000000&gt;;</div><div class='del'>-			opp-microvolt = &lt;900000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dmc: dmc {</div><div class='del'>-		compatible = "rockchip,rk3399-dmc";</div><div class='del'>-		devfreq-events = &lt;&amp;dfi&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_DDRC&gt;;</div><div class='del'>-		clock-names = "dmc_clk";</div><div class='del'>-		operating-points-v2 = &lt;&amp;dmc_opp_table&gt;;</div><div class='del'>-		center-supply = &lt;&amp;ppvar_centerlogic&gt;;</div><div class='del'>-		upthreshold = &lt;15&gt;;</div><div class='del'>-		downdifferential = &lt;10&gt;;</div><div class='del'>-		rockchip,ddr3_speed_bin = &lt;21&gt;;</div><div class='del'>-		rockchip,pd_idle = &lt;0x40&gt;;</div><div class='del'>-		rockchip,sr_idle = &lt;0x2&gt;;</div><div class='del'>-		rockchip,sr_mc_gate_idle = &lt;0x3&gt;;</div><div class='del'>-		rockchip,srpd_lite_idle	= &lt;0x4&gt;;</div><div class='del'>-		rockchip,standby_idle = &lt;0x2000&gt;;</div><div class='del'>-		rockchip,dram_dll_dis_freq = &lt;300&gt;;</div><div class='del'>-		rockchip,phy_dll_dis_freq = &lt;125&gt;;</div><div class='del'>-		rockchip,auto_pd_dis_freq = &lt;666&gt;;</div><div class='del'>-		rockchip,ddr3_odt_dis_freq = &lt;333&gt;;</div><div class='del'>-		rockchip,ddr3_drv = &lt;40&gt;;</div><div class='del'>-		rockchip,ddr3_odt = &lt;120&gt;;</div><div class='del'>-		rockchip,phy_ddr3_ca_drv = &lt;40&gt;;</div><div class='del'>-		rockchip,phy_ddr3_dq_drv = &lt;40&gt;;</div><div class='del'>-		rockchip,phy_ddr3_odt = &lt;240&gt;;</div><div class='del'>-		rockchip,lpddr3_odt_dis_freq = &lt;333&gt;;</div><div class='del'>-		rockchip,lpddr3_drv = &lt;34&gt;;</div><div class='del'>-		rockchip,lpddr3_odt = &lt;240&gt;;</div><div class='del'>-		rockchip,phy_lpddr3_ca_drv = &lt;40&gt;;</div><div class='del'>-		rockchip,phy_lpddr3_dq_drv = &lt;40&gt;;</div><div class='del'>-		rockchip,phy_lpddr3_odt = &lt;240&gt;;</div><div class='del'>-		rockchip,lpddr4_odt_dis_freq = &lt;333&gt;;</div><div class='del'>-		rockchip,lpddr4_drv = &lt;60&gt;;</div><div class='del'>-		rockchip,lpddr4_dq_odt = &lt;40&gt;;</div><div class='del'>-		rockchip,lpddr4_ca_odt = &lt;40&gt;;</div><div class='del'>-		rockchip,phy_lpddr4_ca_drv = &lt;40&gt;;</div><div class='del'>-		rockchip,phy_lpddr4_ck_cs_drv = &lt;80&gt;;</div><div class='del'>-		rockchip,phy_lpddr4_dq_drv = &lt;80&gt;;</div><div class='del'>-		rockchip,phy_lpddr4_odt = &lt;60&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml<br/>index 3d8ea3c2d8dd..ba06d1857b7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-backend.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Display Engine Backend Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Display Engine Backend</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml<br/>index d4412aea7b73..e6088f379f70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-engine.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-engine.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Display Engine Pipeline Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Display Engine Pipeline</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -62,6 +62,7 @@ properties:</div><div class='ctx'>       - allwinner,sun8i-r40-display-engine</div><div class='ctx'>       - allwinner,sun8i-v3s-display-engine</div><div class='ctx'>       - allwinner,sun9i-a80-display-engine</div><div class='add'>+      - allwinner,sun20i-d1-display-engine</div><div class='ctx'>       - allwinner,sun50i-a64-display-engine</div><div class='ctx'>       - allwinner,sun50i-h6-display-engine</div><div class='ctx'> </div><div class='hunk'>@@ -93,6 +94,7 @@ if:</div><div class='ctx'>           - allwinner,sun8i-a83t-display-engine</div><div class='ctx'>           - allwinner,sun8i-r40-display-engine</div><div class='ctx'>           - allwinner,sun9i-a80-display-engine</div><div class='add'>+          - allwinner,sun20i-d1-display-engine</div><div class='ctx'>           - allwinner,sun50i-a64-display-engine</div><div class='ctx'> </div><div class='ctx'> then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml<br/>index 055157fbf3bf..98e8240a05bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-display-frontend.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-frontend.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Display Engine Frontend Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Display Engine Frontend</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml<br/>index 7f11452539f4..55703caacb9c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-hdmi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 HDMI Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 HDMI Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The HDMI Encoder supports the HDMI video and audio outputs, and does</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml<br/>index 3a7d5d731712..724d93b9193b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tcon.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Timings Controller (TCON) Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Timings Controller (TCON)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -33,6 +33,8 @@ properties:</div><div class='ctx'>       - const: allwinner,sun8i-v3s-tcon</div><div class='ctx'>       - const: allwinner,sun9i-a80-tcon-lcd</div><div class='ctx'>       - const: allwinner,sun9i-a80-tcon-tv</div><div class='add'>+      - const: allwinner,sun20i-d1-tcon-lcd</div><div class='add'>+      - const: allwinner,sun20i-d1-tcon-tv</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -231,6 +233,7 @@ allOf:</div><div class='ctx'>               - allwinner,sun8i-a83t-tcon-lcd</div><div class='ctx'>               - allwinner,sun8i-v3s-tcon</div><div class='ctx'>               - allwinner,sun9i-a80-tcon-lcd</div><div class='add'>+              - allwinner,sun20i-d1-tcon-lcd</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -250,6 +253,7 @@ allOf:</div><div class='ctx'>               - allwinner,sun8i-a83t-tcon-tv</div><div class='ctx'>               - allwinner,sun8i-r40-tcon-tv</div><div class='ctx'>               - allwinner,sun9i-a80-tcon-tv</div><div class='add'>+              - allwinner,sun20i-d1-tcon-tv</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -276,6 +280,7 @@ allOf:</div><div class='ctx'>               - allwinner,sun9i-a80-tcon-lcd</div><div class='ctx'>               - allwinner,sun4i-a10-tcon</div><div class='ctx'>               - allwinner,sun8i-a83t-tcon-lcd</div><div class='add'>+              - allwinner,sun20i-d1-tcon-lcd</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='hunk'>@@ -292,6 +297,7 @@ allOf:</div><div class='ctx'>               - allwinner,sun8i-a23-tcon</div><div class='ctx'>               - allwinner,sun8i-a33-tcon</div><div class='ctx'>               - allwinner,sun8i-a83t-tcon-lcd</div><div class='add'>+              - allwinner,sun20i-d1-tcon-lcd</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml b/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml<br/>index afc0ed799e0e..c39e90a5945f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun4i-a10-tv-encoder.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tv-encoder.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 TV Encoder Device Tree Bindings</div><div class='add'>+title: Allwinner A10 TV Encoder</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml<br/>index 71cce5687580..895506d93f4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun6i-a31-drc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-drc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 Dynamic Range Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A31 Dynamic Range Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml<br/>index bf0bdf54e5f9..c731fbdc2fe0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dsi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 MIPI-DSI Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A31 MIPI-DSI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -12,9 +12,14 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - allwinner,sun6i-a31-mipi-dsi</div><div class='del'>-      - allwinner,sun50i-a64-mipi-dsi</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - allwinner,sun6i-a31-mipi-dsi</div><div class='add'>+          - allwinner,sun50i-a64-mipi-dsi</div><div class='add'>+          - allwinner,sun50i-a100-mipi-dsi</div><div class='add'>+      - items:</div><div class='add'>+          - const: allwinner,sun20i-d1-mipi-dsi</div><div class='add'>+          - const: allwinner,sun50i-a100-mipi-dsi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -59,7 +64,6 @@ required:</div><div class='ctx'>   - phys</div><div class='ctx'>   - phy-names</div><div class='ctx'>   - resets</div><div class='del'>-  - vcc-dsi-supply</div><div class='ctx'>   - port</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='hunk'>@@ -68,7 +72,9 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: allwinner,sun6i-a31-mipi-dsi</div><div class='add'>+            enum:</div><div class='add'>+              - allwinner,sun6i-a31-mipi-dsi</div><div class='add'>+              - allwinner,sun50i-a100-mipi-dsi</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -78,16 +84,22 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - clock-names</div><div class='ctx'> </div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: allwinner,sun50i-a64-mipi-dsi</div><div class='add'>+            enum:</div><div class='add'>+              - allwinner,sun6i-a31-mipi-dsi</div><div class='add'>+              - allwinner,sun50i-a64-mipi-dsi</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          minItems: 1</div><div class='add'>+      required:</div><div class='add'>+        - vcc-dsi-supply</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml<br/>index 4f91eec26de9..b75c1ec686ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-de2-mixer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner Display Engine 2.0 Mixer Device Tree Bindings</div><div class='add'>+title: Allwinner Display Engine 2.0 Mixer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -19,6 +19,8 @@ properties:</div><div class='ctx'>       - allwinner,sun8i-r40-de2-mixer-0</div><div class='ctx'>       - allwinner,sun8i-r40-de2-mixer-1</div><div class='ctx'>       - allwinner,sun8i-v3s-de2-mixer</div><div class='add'>+      - allwinner,sun20i-d1-de2-mixer-0</div><div class='add'>+      - allwinner,sun20i-d1-de2-mixer-1</div><div class='ctx'>       - allwinner,sun50i-a64-de2-mixer-0</div><div class='ctx'>       - allwinner,sun50i-a64-de2-mixer-1</div><div class='ctx'>       - allwinner,sun50i-h6-de3-mixer-0</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml<br/>index 4951b5ef5c6a..60fd927b5a06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-dw-hdmi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A83t DWC HDMI TX Encoder Device Tree Bindings</div><div class='add'>+title: Allwinner A83t DWC HDMI TX Encoder</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml<br/>index a97366aaf924..1b47f3d99a78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-hdmi-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-hdmi-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A83t HDMI PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A83t HDMI PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml<br/>index 61ef7b337218..7d849c4095a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun8i-r40-tcon-top.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner R40 TCON TOP Device Tree Bindings</div><div class='add'>+title: Allwinner R40 TCON TOP</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -41,6 +41,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - allwinner,sun8i-r40-tcon-top</div><div class='add'>+      - allwinner,sun20i-d1-tcon-top</div><div class='ctx'>       - allwinner,sun50i-h6-tcon-top</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -48,31 +49,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - description: The TCON TOP interface clock</div><div class='del'>-      - description: The TCON TOP TV0 clock</div><div class='del'>-      - description: The TCON TOP TVE0 clock</div><div class='del'>-      - description: The TCON TOP TV1 clock</div><div class='del'>-      - description: The TCON TOP TVE1 clock</div><div class='del'>-      - description: The TCON TOP MIPI DSI clock</div><div class='add'>+    maxItems: 6</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - const: bus</div><div class='del'>-      - const: tcon-tv0</div><div class='del'>-      - const: tve0</div><div class='del'>-      - const: tcon-tv1</div><div class='del'>-      - const: tve1</div><div class='del'>-      - const: dsi</div><div class='add'>+    maxItems: 6</div><div class='ctx'> </div><div class='ctx'>   clock-output-names:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 3</div><div class='del'>-    description: &gt;</div><div class='del'>-      The first item is the name of the clock created for the TV0</div><div class='del'>-      channel, the second item is the name of the TCON TV1 channel</div><div class='del'>-      clock and the third one is the name of the DSI channel clock.</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -129,32 +114,92 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: allwinner,sun50i-h6-tcon-top</div><div class='del'>-</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    clocks:</div><div class='del'>-      maxItems: 2</div><div class='del'>-</div><div class='del'>-    clock-output-names:</div><div class='del'>-      maxItems: 1</div><div class='del'>-</div><div class='del'>-else:</div><div class='del'>-  properties:</div><div class='del'>-    clocks:</div><div class='del'>-      minItems: 6</div><div class='del'>-</div><div class='del'>-    clock-output-names:</div><div class='del'>-      minItems: 3</div><div class='del'>-</div><div class='del'>-    ports:</div><div class='del'>-      required:</div><div class='del'>-        - port@2</div><div class='del'>-        - port@3</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: allwinner,sun8i-r40-tcon-top</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: The TCON TOP interface clock</div><div class='add'>+            - description: The TCON TOP TV0 clock</div><div class='add'>+            - description: The TCON TOP TVE0 clock</div><div class='add'>+            - description: The TCON TOP TV1 clock</div><div class='add'>+            - description: The TCON TOP TVE1 clock</div><div class='add'>+            - description: The TCON TOP MIPI DSI clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: tcon-tv0</div><div class='add'>+            - const: tve0</div><div class='add'>+            - const: tcon-tv1</div><div class='add'>+            - const: tve1</div><div class='add'>+            - const: dsi</div><div class='add'>+</div><div class='add'>+        clock-output-names:</div><div class='add'>+          items:</div><div class='add'>+            - description: TCON TV0 output clock name</div><div class='add'>+            - description: TCON TV1 output clock name</div><div class='add'>+            - description: DSI output clock name</div><div class='add'>+</div><div class='add'>+        ports:</div><div class='add'>+          required:</div><div class='add'>+            - port@2</div><div class='add'>+            - port@3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: allwinner,sun20i-d1-tcon-top</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: The TCON TOP interface clock</div><div class='add'>+            - description: The TCON TOP TV0 clock</div><div class='add'>+            - description: The TCON TOP TVE0 clock</div><div class='add'>+            - description: The TCON TOP MIPI DSI clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: tcon-tv0</div><div class='add'>+            - const: tve0</div><div class='add'>+            - const: dsi</div><div class='add'>+</div><div class='add'>+        clock-output-names:</div><div class='add'>+          items:</div><div class='add'>+            - description: TCON TV0 output clock name</div><div class='add'>+            - description: DSI output clock name</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: allwinner,sun50i-h6-tcon-top</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: The TCON TOP interface clock</div><div class='add'>+            - description: The TCON TOP TV0 clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: tcon-tv0</div><div class='add'>+</div><div class='add'>+        clock-output-names:</div><div class='add'>+          items:</div><div class='add'>+            - description: TCON TV0 output clock name</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml b/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml<br/>index 637372ec4614..193afee2c3c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/allwinner,sun9i-a80-deu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/allwinner,sun9i-a80-deu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 Detail Enhancement Unit Device Tree Bindings</div><div class='add'>+title: Allwinner A80 Detail Enhancement Unit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml<br/>index 343598c9f473..0c85894648d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/amlogic,meson-dw-hdmi.yaml</a></div><div class='hunk'>@@ -2,16 +2,16 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic specific extensions to the Synopsys Designware HDMI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: /schemas/sound/name-prefix.yaml#</div><div class='add'>+  - $ref: /schemas/sound/dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Amlogic Meson Synopsys Designware Integration is composed of</div><div class='hunk'>@@ -150,4 +150,3 @@ examples:</div><div class='ctx'>              };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml<br/>index 047fd69e0377..0c72120acc4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/amlogic,meson-vpu.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson Display Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Amlogic Meson Display controller is composed of several components</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.txt b/Documentation/devicetree/bindings/display/arm,hdlcd.txt<br/>deleted file mode 100644<br/>index 78bc24296f3e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,hdlcd.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,hdlcd.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,79 +0,0 @@</div><div class='del'>-ARM HDLCD</div><div class='del'>-</div><div class='del'>-This is a display controller found on several development platforms produced</div><div class='del'>-by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB</div><div class='del'>-streamer that reads the data from a framebuffer and sends it to a single</div><div class='del'>-digital encoder (DVI or HDMI).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: "arm,hdlcd"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: One interrupt used by the display controller to notify the</div><div class='del'>-    interrupt controller when any of the interrupt sources programmed in</div><div class='del'>-    the interrupt mask register have activated.</div><div class='del'>-  - clocks: A list of phandle + clock-specifier pairs, one for each</div><div class='del'>-    entry in 'clock-names'.</div><div class='del'>-  - clock-names: A list of clock names. For HDLCD it should contain:</div><div class='del'>-      - "pxlclk" for the clock feeding the output PLL of the controller.</div><div class='del'>-</div><div class='del'>-Required sub-nodes:</div><div class='del'>-  - port: The HDLCD connection to an encoder chip. The connection is modeled</div><div class='del'>-    using the OF graph bindings specified in</div><div class='del'>-    Documentation/devicetree/bindings/graph.txt.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - memory-region: phandle to a node describing memory (see</div><div class='del'>-    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be</div><div class='del'>-    used for the framebuffer; if not present, the framebuffer may be located</div><div class='del'>-    anywhere in memory.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	hdlcd@2b000000 {</div><div class='del'>-		compatible = "arm,hdlcd";</div><div class='del'>-		reg = &lt;0 0x2b000000 0 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;oscclk5&gt;;</div><div class='del'>-		clock-names = "pxlclk";</div><div class='del'>-		port {</div><div class='del'>-			hdlcd_output: endpoint@0 {</div><div class='del'>-				remote-endpoint = &lt;&amp;hdmi_enc_input&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* HDMI encoder on I2C bus */</div><div class='del'>-	i2c@7ffa0000 {</div><div class='del'>-		....</div><div class='del'>-		hdmi-transmitter@70 {</div><div class='del'>-			compatible = ".....";</div><div class='del'>-			reg = &lt;0x70&gt;;</div><div class='del'>-			port@0 {</div><div class='del'>-				hdmi_enc_input: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;hdlcd_output&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				hdmi_enc_output: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;hdmi_1_port&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hdmi1: connector@1 {</div><div class='del'>-		compatible = "hdmi-connector";</div><div class='del'>-		type = "a";</div><div class='del'>-		port {</div><div class='del'>-			hdmi_1_port: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;hdmi_enc_output&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.yaml b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml<br/>new file mode 100644<br/>index 000000000000..9a30e9005e8a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,hdlcd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/arm,hdlcd.yaml</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm HDLCD display controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Arm HDLCD is a display controller found on several development platforms</div><div class='add'>+  produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an</div><div class='add'>+  RGB streamer that reads the data from a framebuffer and sends it to a single</div><div class='add'>+  digital encoder (DVI or HDMI).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,hdlcd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: pxlclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: The input reference for the pixel clock.</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a node describing memory to be used for the framebuffer.</div><div class='add'>+      If not present, the framebuffer may be located anywhere in memory.</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Output endpoint of the controller, connecting the LCD panel signals.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    hdlcd@2b000000 {</div><div class='add'>+        compatible = "arm,hdlcd";</div><div class='add'>+        reg = &lt;0x2b000000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;0 85 4&gt;;</div><div class='add'>+        clocks = &lt;&amp;oscclk5&gt;;</div><div class='add'>+        clock-names = "pxlclk";</div><div class='add'>+        port {</div><div class='add'>+            hdlcd_output: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;hdmi_enc_input&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    /* HDMI encoder on I2C bus */</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        hdmi-transmitter@70 {</div><div class='add'>+            compatible = "nxp,tda998x";</div><div class='add'>+            reg = &lt;0x70&gt;;</div><div class='add'>+            port {</div><div class='add'>+                hdmi_enc_input: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;hdlcd_output&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt<br/>deleted file mode 100644<br/>index 8513695ee47f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,komeda.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,komeda.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,78 +0,0 @@</div><div class='del'>-Device Tree bindings for Arm Komeda display driver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "arm,mali-d71"</div><div class='del'>-- reg: Physical base address and length of the registers in the system</div><div class='del'>-- interrupts: the interrupt line number of the device in the system</div><div class='del'>-- clocks: A list of phandle + clock-specifier pairs, one for each entry</div><div class='del'>-    in 'clock-names'</div><div class='del'>-- clock-names: A list of clock names. It should contain:</div><div class='del'>-      - "aclk": for the main processor clock</div><div class='del'>-- #address-cells: Must be 1</div><div class='del'>-- #size-cells: Must be 0</div><div class='del'>-- iommus: configure the stream id to IOMMU, Must be configured if want to</div><div class='del'>-    enable iommu in display. for how to configure this node please reference</div><div class='del'>-        devicetree/bindings/iommu/arm,smmu-v3.txt,</div><div class='del'>-        devicetree/bindings/iommu/iommu.txt</div><div class='del'>-</div><div class='del'>-Required properties for sub-node: pipeline@nq</div><div class='del'>-Each device contains one or two pipeline sub-nodes (at least one), each</div><div class='del'>-pipeline node should provide properties:</div><div class='del'>-- reg: Zero-indexed identifier for the pipeline</div><div class='del'>-- clocks: A list of phandle + clock-specifier pairs, one for each entry</div><div class='del'>-    in 'clock-names'</div><div class='del'>-- clock-names: should contain:</div><div class='del'>-      - "pxclk": pixel clock</div><div class='del'>-</div><div class='del'>-- port: each pipeline connect to an encoder input port. The connection is</div><div class='del'>-    modeled using the OF graph bindings specified in</div><div class='del'>-    Documentation/devicetree/bindings/graph.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - memory-region: phandle to a node describing memory (see</div><div class='del'>-    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)</div><div class='del'>-    to be used for the framebuffer; if not present, the framebuffer may</div><div class='del'>-    be located anywhere in memory.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-/ {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	dp0: display@c00000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "arm,mali-d71";</div><div class='del'>-		reg = &lt;0xc00000 0x20000&gt;;</div><div class='del'>-		interrupts = &lt;0 168 4&gt;;</div><div class='del'>-		clocks = &lt;&amp;dpu_aclk&gt;;</div><div class='del'>-		clock-names = "aclk";</div><div class='del'>-		iommus = &lt;&amp;smmu 0&gt;, &lt;&amp;smmu 1&gt;, &lt;&amp;smmu 2&gt;, &lt;&amp;smmu 3&gt;,</div><div class='del'>-			&lt;&amp;smmu 4&gt;, &lt;&amp;smmu 5&gt;, &lt;&amp;smmu 6&gt;, &lt;&amp;smmu 7&gt;,</div><div class='del'>-			&lt;&amp;smmu 8&gt;, &lt;&amp;smmu 9&gt;;</div><div class='del'>-</div><div class='del'>-		dp0_pipe0: pipeline@0 {</div><div class='del'>-			clocks = &lt;&amp;fpgaosc2&gt;;</div><div class='del'>-			clock-names = "pxclk";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				dp0_pipe0_out: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;db_dvi0_in&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dp0_pipe1: pipeline@1 {</div><div class='del'>-			clocks = &lt;&amp;fpgaosc2&gt;;</div><div class='del'>-			clock-names = "pxclk";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				dp0_pipe1_out: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;db_dvi1_in&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-	...</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml<br/>new file mode 100644<br/>index 000000000000..3ad3eef89ca8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,komeda.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/arm,komeda.yaml</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/arm,komeda.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm Komeda display processor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Arm Mali D71 display processor supports up to two displays with up</div><div class='add'>+  to a 4K resolution each. Each pipeline can be composed of up to four</div><div class='add'>+  layers. It is typically connected to a digital display connector like HDMI.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: arm,mali-d32</div><div class='add'>+          - const: arm,mali-d71</div><div class='add'>+      - const: arm,mali-d71</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: aclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: The main DPU processor clock</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a node describing memory to be used for the framebuffer.</div><div class='add'>+      If not present, the framebuffer may be located anywhere in memory.</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    description:</div><div class='add'>+      The stream IDs for each of the used pipelines, each four IDs for the</div><div class='add'>+      four layers, plus one for the write-back stream.</div><div class='add'>+    minItems: 5</div><div class='add'>+    maxItems: 10</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^pipeline@[01]$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      clocks</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        enum: [ 0, 1 ]</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        const: pxclk</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description: The input reference for the pixel clock.</div><div class='add'>+</div><div class='add'>+      port:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - pipeline@0</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    display@c00000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "arm,mali-d71";</div><div class='add'>+        reg = &lt;0xc00000 0x20000&gt;;</div><div class='add'>+        interrupts = &lt;168&gt;;</div><div class='add'>+        clocks = &lt;&amp;dpu_aclk&gt;;</div><div class='add'>+        clock-names = "aclk";</div><div class='add'>+        iommus = &lt;&amp;smmu 0&gt;, &lt;&amp;smmu 1&gt;, &lt;&amp;smmu 2&gt;, &lt;&amp;smmu 3&gt;,</div><div class='add'>+                 &lt;&amp;smmu 8&gt;,</div><div class='add'>+                 &lt;&amp;smmu 4&gt;, &lt;&amp;smmu 5&gt;, &lt;&amp;smmu 6&gt;, &lt;&amp;smmu 7&gt;,</div><div class='add'>+                 &lt;&amp;smmu 9&gt;;</div><div class='add'>+</div><div class='add'>+        dp0_pipe0: pipeline@0 {</div><div class='add'>+            clocks = &lt;&amp;fpgaosc2&gt;;</div><div class='add'>+            clock-names = "pxclk";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                dp0_pipe0_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;db_dvi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dp0_pipe1: pipeline@1 {</div><div class='add'>+            clocks = &lt;&amp;fpgaosc2&gt;;</div><div class='add'>+            clock-names = "pxclk";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                dp0_pipe1_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;db_dvi1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt<br/>deleted file mode 100644<br/>index 7a97a2b48c2a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,malidp.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,malidp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,68 +0,0 @@</div><div class='del'>-ARM Mali-DP</div><div class='del'>-</div><div class='del'>-The following bindings apply to a family of Display Processors sold as</div><div class='del'>-licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and</div><div class='del'>-DP650 processors that offer multiple composition layers, support for</div><div class='del'>-rotation and scaling output.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: should be one of</div><div class='del'>-	"arm,mali-dp500"</div><div class='del'>-	"arm,mali-dp550"</div><div class='del'>-	"arm,mali-dp650"</div><div class='del'>-    depending on the particular implementation present in the hardware</div><div class='del'>-  - reg: Physical base address and size of the block of registers used by</div><div class='del'>-    the processor.</div><div class='del'>-  - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt,</div><div class='del'>-    interrupt client nodes.</div><div class='del'>-  - interrupt-names: name of the engine inside the processor that will</div><div class='del'>-    use the corresponding interrupt. Should be one of "DE" or "SE".</div><div class='del'>-  - clocks: A list of phandle + clock-specifier pairs, one for each entry</div><div class='del'>-    in 'clock-names'</div><div class='del'>-  - clock-names: A list of clock names. It should contain:</div><div class='del'>-      - "pclk": for the APB interface clock</div><div class='del'>-      - "aclk": for the AXI interface clock</div><div class='del'>-      - "mclk": for the main processor clock</div><div class='del'>-      - "pxlclk": for the pixel clock feeding the output PLL of the processor.</div><div class='del'>-  - arm,malidp-output-port-lines: Array of u8 values describing the number</div><div class='del'>-    of output lines per channel (R, G and B).</div><div class='del'>-</div><div class='del'>-Required sub-nodes:</div><div class='del'>-  - port: The Mali DP connection to an encoder input port. The connection</div><div class='del'>-    is modelled using the OF graph bindings specified in</div><div class='del'>-    Documentation/devicetree/bindings/graph.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - memory-region: phandle to a node describing memory (see</div><div class='del'>-    Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)</div><div class='del'>-    to be used for the framebuffer; if not present, the framebuffer may</div><div class='del'>-    be located anywhere in memory.</div><div class='del'>-  - arm,malidp-arqos-high-level: integer of u32 value describing the ARQoS</div><div class='del'>-    levels of DP500's QoS signaling.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	dp0: malidp@6f200000 {</div><div class='del'>-		compatible = "arm,mali-dp650";</div><div class='del'>-		reg = &lt;0 0x6f200000 0 0x20000&gt;;</div><div class='del'>-		memory-region = &lt;&amp;display_reserved&gt;;</div><div class='del'>-		interrupts = &lt;0 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;0 168 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "DE", "SE";</div><div class='del'>-		clocks = &lt;&amp;oscclk2&gt;, &lt;&amp;fpgaosc0&gt;, &lt;&amp;fpgaosc1&gt;, &lt;&amp;fpgaosc1&gt;;</div><div class='del'>-		clock-names = "pxlclk", "mclk", "aclk", "pclk";</div><div class='del'>-		arm,malidp-output-port-lines = /bits/ 8 &lt;8 8 8&gt;;</div><div class='del'>-		arm,malidp-arqos-high-level = &lt;0xd000d000&gt;;</div><div class='del'>-		port {</div><div class='del'>-			dp0_output: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;tda998x_2_input&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml<br/>new file mode 100644<br/>index 000000000000..91812573fd08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,malidp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/arm,malidp.yaml</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/arm,malidp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm Mali Display Processor (Mali-DP)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The following bindings apply to a family of Display Processors sold as</div><div class='add'>+  licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and</div><div class='add'>+  DP650 processors that offer multiple composition layers, support for</div><div class='add'>+  rotation and scaling output.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - arm,mali-dp500</div><div class='add'>+      - arm,mali-dp550</div><div class='add'>+      - arm,mali-dp650</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          The interrupt used by the Display Engine (DE). Can be shared with</div><div class='add'>+          the interrupt for the Scaling Engine (SE), but it will have to be</div><div class='add'>+          listed individually.</div><div class='add'>+      - description:</div><div class='add'>+          The interrupt used by the Scaling Engine (SE). Can be shared with</div><div class='add'>+          the interrupt for the Display Engine (DE), but it will have to be</div><div class='add'>+          listed individually.</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: DE</div><div class='add'>+      - const: SE</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pxlclk</div><div class='add'>+      - const: mclk</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: pclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: the pixel clock feeding the output PLL of the processor</div><div class='add'>+      - description: the main processor clock</div><div class='add'>+      - description: the AXI interface clock</div><div class='add'>+      - description: the APB interface clock</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a node describing memory to be used for the framebuffer.</div><div class='add'>+      If not present, the framebuffer may be located anywhere in memory.</div><div class='add'>+</div><div class='add'>+  arm,malidp-output-port-lines:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Number of output lines/bits for each colour channel.</div><div class='add'>+    items:</div><div class='add'>+      - description: number of output lines for the red channel (R)</div><div class='add'>+      - description: number of output lines for the green channel (G)</div><div class='add'>+      - description: number of output lines for the blue channel (B)</div><div class='add'>+</div><div class='add'>+  arm,malidp-arqos-value:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Quality-of-Service value for the display engine FIFOs, to write</div><div class='add'>+      into the RQOS register of the DP500.</div><div class='add'>+      See the ARM Mali-DP500 TRM for details on the encoding.</div><div class='add'>+      If omitted, the RQOS register will not be changed.</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Output endpoint of the controller, connecting the LCD panel signals.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - port</div><div class='add'>+  - arm,malidp-output-port-lines</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    dp0: malidp@6f200000 {</div><div class='add'>+        compatible = "arm,mali-dp650";</div><div class='add'>+        reg = &lt;0x6f200000 0x20000&gt;;</div><div class='add'>+        memory-region = &lt;&amp;display_reserved&gt;;</div><div class='add'>+        interrupts = &lt;168&gt;, &lt;168&gt;;</div><div class='add'>+        interrupt-names = "DE", "SE";</div><div class='add'>+        clocks = &lt;&amp;oscclk2&gt;, &lt;&amp;fpgaosc0&gt;, &lt;&amp;fpgaosc1&gt;, &lt;&amp;fpgaosc1&gt;;</div><div class='add'>+        clock-names = "pxlclk", "mclk", "aclk", "pclk";</div><div class='add'>+        arm,malidp-output-port-lines = /bits/ 8 &lt;8 8 8&gt;;</div><div class='add'>+        arm,malidp-arqos-value = &lt;0xd000d000&gt;;</div><div class='add'>+</div><div class='add'>+        port {</div><div class='add'>+            dp0_output: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;tda998x_2_input&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.txt b/Documentation/devicetree/bindings/display/arm,pl11x.txt<br/>deleted file mode 100644<br/>index 3f977e72a200..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,pl11x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/arm,pl11x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,110 +0,0 @@</div><div class='del'>-* ARM PrimeCell Color LCD Controller PL110/PL111</div><div class='del'>-</div><div class='del'>-See also Documentation/devicetree/bindings/arm/primecell.yaml</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: must be one of:</div><div class='del'>-	"arm,pl110", "arm,primecell"</div><div class='del'>-	"arm,pl111", "arm,primecell"</div><div class='del'>-</div><div class='del'>-- reg: base address and size of the control registers block</div><div class='del'>-</div><div class='del'>-- interrupt-names: either the single entry "combined" representing a</div><div class='del'>-	combined interrupt output (CLCDINTR), or the four entries</div><div class='del'>-	"mbe", "vcomp", "lnbu", "fuf" representing the individual</div><div class='del'>-	CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts</div><div class='del'>-</div><div class='del'>-- interrupts: contains an interrupt specifier for each entry in</div><div class='del'>-	interrupt-names</div><div class='del'>-</div><div class='del'>-- clock-names: should contain "clcdclk" and "apb_pclk"</div><div class='del'>-</div><div class='del'>-- clocks: contains phandle and clock specifier pairs for the entries</div><div class='del'>-	in the clock-names property. See</div><div class='del'>-	Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- memory-region: phandle to a node describing memory (see</div><div class='del'>-	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)</div><div class='del'>-	to be used for the framebuffer; if not present, the framebuffer</div><div class='del'>-	may be located anywhere in the memory</div><div class='del'>-</div><div class='del'>-- max-memory-bandwidth: maximum bandwidth in bytes per second that the</div><div class='del'>-	cell's memory interface can handle; if not present, the memory</div><div class='del'>-	interface is fast enough to handle all possible video modes</div><div class='del'>-</div><div class='del'>-Required sub-nodes:</div><div class='del'>-</div><div class='del'>-- port: describes LCD panel signals, following the common binding</div><div class='del'>-	for video transmitter interfaces; see</div><div class='del'>-	Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-Deprecated properties:</div><div class='del'>-	The port's endbpoint subnode had this, now deprecated property</div><div class='del'>-	in the past. Drivers should be able to survive without it:</div><div class='del'>-</div><div class='del'>-	- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,</div><div class='del'>-		defining the way CLD pads are wired up; first value</div><div class='del'>-		contains index of the "CLD" external pin (pad) used</div><div class='del'>-		as R0 (first bit of the red component), second value</div><div class='del'>-	        index of the pad used as G0, third value index of the</div><div class='del'>-		pad used as B0, see also "LCD panel signal multiplexing</div><div class='del'>-		details" paragraphs in the PL110/PL111 Technical</div><div class='del'>-		Reference Manuals; this implicitly defines available</div><div class='del'>-		color modes, for example:</div><div class='del'>-		- PL111 TFT 4:4:4 panel:</div><div class='del'>-			arm,pl11x,tft-r0g0b0-pads = &lt;4 15 20&gt;;</div><div class='del'>-		- PL110 TFT (1:)5:5:5 panel:</div><div class='del'>-			arm,pl11x,tft-r0g0b0-pads = &lt;1 7 13&gt;;</div><div class='del'>-		- PL111 TFT (1:)5:5:5 panel:</div><div class='del'>-			arm,pl11x,tft-r0g0b0-pads = &lt;3 11 19&gt;;</div><div class='del'>-		- PL111 TFT 5:6:5 panel:</div><div class='del'>-			arm,pl11x,tft-r0g0b0-pads = &lt;3 10 19&gt;;</div><div class='del'>-		- PL110 and PL111 TFT 8:8:8 panel:</div><div class='del'>-			arm,pl11x,tft-r0g0b0-pads = &lt;0 8 16&gt;;</div><div class='del'>-		- PL110 and PL111 TFT 8:8:8 panel, R &amp; B components swapped:</div><div class='del'>-			arm,pl11x,tft-r0g0b0-pads = &lt;16 8 0&gt;;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	clcd@10020000 {</div><div class='del'>-		compatible = "arm,pl111", "arm,primecell";</div><div class='del'>-		reg = &lt;0x10020000 0x1000&gt;;</div><div class='del'>-		interrupt-names = "combined";</div><div class='del'>-		interrupts = &lt;0 44 4&gt;;</div><div class='del'>-		clocks = &lt;&amp;oscclk1&gt;, &lt;&amp;oscclk2&gt;;</div><div class='del'>-		clock-names = "clcdclk", "apb_pclk";</div><div class='del'>-		max-memory-bandwidth = &lt;94371840&gt;; /* Bps, 1024x768@60 16bpp */</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			clcd_pads: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;clcd_panel&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	panel {</div><div class='del'>-		compatible = "panel-dpi";</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			clcd_panel: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;clcd_pads&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		panel-timing {</div><div class='del'>-			clock-frequency = &lt;25175000&gt;;</div><div class='del'>-			hactive = &lt;640&gt;;</div><div class='del'>-			hback-porch = &lt;40&gt;;</div><div class='del'>-			hfront-porch = &lt;24&gt;;</div><div class='del'>-			hsync-len = &lt;96&gt;;</div><div class='del'>-			vactive = &lt;480&gt;;</div><div class='del'>-			vback-porch = &lt;32&gt;;</div><div class='del'>-			vfront-porch = &lt;11&gt;;</div><div class='del'>-			vsync-len = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.yaml b/Documentation/devicetree/bindings/display/arm,pl11x.yaml<br/>new file mode 100644<br/>index 000000000000..6cc9045e5c68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/arm,pl11x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/arm,pl11x.yaml</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/arm,pl11x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm PrimeCell Color LCD Controller PL110/PL111</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liviu Dudau &lt;Liviu.Dudau@arm.com&gt;</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out</div><div class='add'>+  a framebuffer region in system memory, and creates timed signals for</div><div class='add'>+  a variety of LCD panels.</div><div class='add'>+</div><div class='add'>+# We need a select here so we don't match all nodes with 'arm,primecell'</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - arm,pl110</div><div class='add'>+          - arm,pl111</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - arm,pl110</div><div class='add'>+          - arm,pl111</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: combined</div><div class='add'>+        description:</div><div class='add'>+          The IP provides four individual interrupt lines, but also one</div><div class='add'>+          combined line. If the integration only connects this line to the</div><div class='add'>+          interrupt controller, this single interrupt is noted here.</div><div class='add'>+      - items:</div><div class='add'>+          - const: mbe        # CLCDMBEINTR</div><div class='add'>+          - const: vcomp      # CLCDVCOMPINTR</div><div class='add'>+          - const: lnbu       # CLCDLNBUINTR</div><div class='add'>+          - const: fuf        # CLCDFUFINTR</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: clcdclk</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The CLCDCLK reference clock for the controller.</div><div class='add'>+      - description: The HCLK AHB slave clock for the register access.</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a node describing memory to be used for the framebuffer.</div><div class='add'>+      If not present, the framebuffer may be located anywhere in memory.</div><div class='add'>+</div><div class='add'>+  max-memory-bandwidth:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Maximum bandwidth in bytes per second that the cell's memory interface</div><div class='add'>+      can handle.</div><div class='add'>+      If not present, the memory interface is fast enough to handle all</div><div class='add'>+      possible video modes.</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    description:</div><div class='add'>+      Output endpoint of the controller, connecting the LCD panel signals.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/endpoint-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          arm,pl11x,tft-r0g0b0-pads:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+            items:</div><div class='add'>+              - description: index of CLD pad used for first red bit (R0)</div><div class='add'>+              - description: index of CLD pad used for first green bit (G0)</div><div class='add'>+              - description: index of CLD pad used for first blue bit (G0)</div><div class='add'>+            deprecated: true</div><div class='add'>+            description: |</div><div class='add'>+              DEPRECATED. An array of three 32-bit values, defining the way</div><div class='add'>+              CLD[23:0] pads are wired up.</div><div class='add'>+              The first value contains the index of the "CLD" external pin (pad)</div><div class='add'>+              used as R0 (first bit of the red component), the second value for</div><div class='add'>+              green, the third value for blue.</div><div class='add'>+              See also "LCD panel signal multiplexing details" paragraphs in the</div><div class='add'>+              PL110/PL111 Technical Reference Manuals.</div><div class='add'>+              This implicitly defines available color modes, for example:</div><div class='add'>+              - PL111 TFT 4:4:4 panel:</div><div class='add'>+                  arm,pl11x,tft-r0g0b0-pads = &lt;4 15 20&gt;;</div><div class='add'>+              - PL110 TFT (1:)5:5:5 panel:</div><div class='add'>+                  arm,pl11x,tft-r0g0b0-pads = &lt;1 7 13&gt;;</div><div class='add'>+              - PL111 TFT (1:)5:5:5 panel:</div><div class='add'>+                  arm,pl11x,tft-r0g0b0-pads = &lt;3 11 19&gt;;</div><div class='add'>+              - PL111 TFT 5:6:5 panel:</div><div class='add'>+                  arm,pl11x,tft-r0g0b0-pads = &lt;3 10 19&gt;;</div><div class='add'>+              - PL110 and PL111 TFT 8:8:8 panel:</div><div class='add'>+                  arm,pl11x,tft-r0g0b0-pads = &lt;0 8 16&gt;;</div><div class='add'>+              - PL110 and PL111 TFT 8:8:8 panel, R &amp; B components swapped:</div><div class='add'>+                  arm,pl11x,tft-r0g0b0-pads = &lt;16 8 0&gt;;</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupt-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clcd@10020000 {</div><div class='add'>+        compatible = "arm,pl111", "arm,primecell";</div><div class='add'>+        reg = &lt;0x10020000 0x1000&gt;;</div><div class='add'>+        interrupt-names = "combined";</div><div class='add'>+        interrupts = &lt;44&gt;;</div><div class='add'>+        clocks = &lt;&amp;oscclk1&gt;, &lt;&amp;oscclk2&gt;;</div><div class='add'>+        clock-names = "clcdclk", "apb_pclk";</div><div class='add'>+        max-memory-bandwidth = &lt;94371840&gt;; /* Bps, 1024x768@60 16bpp */</div><div class='add'>+</div><div class='add'>+        port {</div><div class='add'>+            clcd_pads: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;clcd_panel&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    panel {</div><div class='add'>+        compatible = "arm,rtsm-display";</div><div class='add'>+</div><div class='add'>+        port {</div><div class='add'>+            clcd_panel: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;clcd_pads&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/atmel,lcdc.txt b/Documentation/devicetree/bindings/display/atmel,lcdc.txt<br/>index acb5a0132127..b5e355ada2fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/atmel,lcdc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/atmel,lcdc.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/atmel,lcdc.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/atmel,lcdc.txt</a></div><div class='hunk'>@@ -9,7 +9,6 @@ Required properties:</div><div class='ctx'> 	"atmel,at91sam9g45-lcdc" ,</div><div class='ctx'> 	"atmel,at91sam9g45es-lcdc" ,</div><div class='ctx'> 	"atmel,at91sam9rl-lcdc" ,</div><div class='del'>-	"atmel,at32ap-lcdc"</div><div class='ctx'> - reg : Should contain 1 register ranges(address and length).</div><div class='ctx'> 	Can contain an additional register range(address and length)</div><div class='ctx'> 	for fixed framebuffer memory. Useful for dedicated memories.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml<br/>index a9d34dd7bbc5..5b35adf34c7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM2711 HDMI Controller Device Tree Bindings</div><div class='add'>+title: Broadcom BCM2711 HDMI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Eric Anholt &lt;eric@anholt.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml<br/>index f08a01dfedf3..5bbe81862c8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/adi,adv7511.yaml</a></div><div class='hunk'>@@ -117,23 +117,21 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ports:</div><div class='ctx'>     description:</div><div class='del'>-      The ADV7511(W)/13 has two video ports and one audio port. This node</div><div class='del'>-      models their connections as documented in</div><div class='del'>-      Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-      Documentation/devicetree/bindings/graph.txt</div><div class='del'>-    type: object</div><div class='add'>+      The ADV7511(W)/13 has two video ports and one audio port.</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='ctx'>         description: Video port for the RGB or YUV input.</div><div class='del'>-        type: object</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='ctx'>         description: Video port for the HDMI output.</div><div class='del'>-        type: object</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='ctx'>       port@2:</div><div class='ctx'>         description: Audio port for the HDMI output.</div><div class='del'>-        type: object</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='ctx'> # adi,input-colorspace and adi,input-clock are required except in</div><div class='ctx'> # "rgb 1x" and "yuv444 1x" modes, in which case they must not be</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml b/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml<br/>index f36209137c8a..987aa83c2649 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml</a></div><div class='hunk'>@@ -91,25 +91,23 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ports:</div><div class='ctx'>     description:</div><div class='del'>-      The ADV7533/35 has two video ports and one audio port. This node</div><div class='del'>-      models their connections as documented in</div><div class='del'>-      Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-      Documentation/devicetree/bindings/graph.txt</div><div class='del'>-    type: object</div><div class='add'>+      The ADV7533/35 has two video ports and one audio port.</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='ctx'>         description:</div><div class='ctx'>           Video port for the DSI input. The remote endpoint phandle</div><div class='ctx'>           should be a reference to a valid mipi_dsi_host_device.</div><div class='del'>-        type: object</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='ctx'>         description: Video port for the HDMI output.</div><div class='del'>-        type: object</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='ctx'>       port@2:</div><div class='ctx'>         description: Audio port for the HDMI output.</div><div class='del'>-        type: object</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml<br/>index 35a48515836e..a1ed1004651b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/analogix,anx7625.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Analogix Semiconductor, Inc.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/analogix,anx7625.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Analogix ANX7625 SlimPort (4K Mobile HD Transmitter)</div><div class='ctx'> </div><div class='hunk'>@@ -16,8 +16,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - const: analogix,anx7625</div><div class='add'>+    const: analogix,anx7625</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -94,7 +93,22 @@ properties:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'>         description:</div><div class='del'>-          Video port for MIPI DSI input.</div><div class='add'>+          MIPI DSI/DPI input.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              remote-endpoint: true</div><div class='add'>+</div><div class='add'>+              bus-type:</div><div class='add'>+                enum: [7]</div><div class='add'>+                default: 1</div><div class='add'>+</div><div class='add'>+              data-lanes: true</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/properties/port</div><div class='hunk'>@@ -119,7 +133,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -143,6 +157,8 @@ examples:</div><div class='ctx'>                     reg = &lt;0&gt;;</div><div class='ctx'>                     anx7625_in: endpoint {</div><div class='ctx'>                         remote-endpoint = &lt;&amp;mipi_dsi&gt;;</div><div class='add'>+                        bus-type = &lt;7&gt;;</div><div class='add'>+                        data-lanes = &lt;0 1 2 3&gt;;</div><div class='ctx'>                     };</div><div class='ctx'>                 };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml<br/>index bce96b5b0db0..4a5e5d9d6f90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/analogix,anx7814.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Analogix ANX7814 SlimPort (Full-HD Transmitter)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andrzej Hajda &lt;andrzej.hajda@intel.com&gt;</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'>   - Robert Foss &lt;robert.foss@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml b/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml<br/>new file mode 100644<br/>index 000000000000..c9b06885cc63<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/analogix,dp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analogix Display Port bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Herring &lt;robh@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks: true</div><div class='add'>+</div><div class='add'>+  clock-names: true</div><div class='add'>+</div><div class='add'>+  phys: true</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: dp</div><div class='add'>+</div><div class='add'>+  force-hpd:</div><div class='add'>+    description:</div><div class='add'>+      Indicate driver need force hpd when hpd detect failed, this</div><div class='add'>+      is used for some eDP screen which don not have a hpd signal.</div><div class='add'>+</div><div class='add'>+  hpd-gpios:</div><div class='add'>+    description:</div><div class='add'>+      Hotplug detect GPIO.</div><div class='add'>+      Indicates which GPIO should be used for hotplug detection</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Input node to receive pixel data.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Port node with one endpoint connected to a dp-connector node.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt b/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt<br/>deleted file mode 100644<br/>index 027d76c27a41..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/analogix_dp.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/analogix_dp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-Analogix Display Port bridge bindings</div><div class='del'>-</div><div class='del'>-Required properties for dp-controller:</div><div class='del'>-	-compatible:</div><div class='del'>-		platform specific such as:</div><div class='del'>-		 * "samsung,exynos5-dp"</div><div class='del'>-		 * "rockchip,rk3288-dp"</div><div class='del'>-		 * "rockchip,rk3399-edp"</div><div class='del'>-	-reg:</div><div class='del'>-		physical base address of the controller and length</div><div class='del'>-		of memory mapped region.</div><div class='del'>-	-interrupts:</div><div class='del'>-		interrupt combiner values.</div><div class='del'>-	-clocks:</div><div class='del'>-		from common clock binding: handle to dp clock.</div><div class='del'>-	-clock-names:</div><div class='del'>-		from common clock binding: Shall be "dp".</div><div class='del'>-	-phys:</div><div class='del'>-		from general PHY binding: the phandle for the PHY device.</div><div class='del'>-	-phy-names:</div><div class='del'>-		from general PHY binding: Should be "dp".</div><div class='del'>-</div><div class='del'>-Optional properties for dp-controller:</div><div class='del'>-	-force-hpd:</div><div class='del'>-		Indicate driver need force hpd when hpd detect failed, this</div><div class='del'>-		is used for some eDP screen which don't have hpd signal.</div><div class='del'>-	-hpd-gpios:</div><div class='del'>-		Hotplug detect GPIO.</div><div class='del'>-		Indicates which GPIO should be used for hotplug detection</div><div class='del'>-	-port@[X]: SoC specific port nodes with endpoint definitions as defined</div><div class='del'>-		in Documentation/devicetree/bindings/media/video-interfaces.txt,</div><div class='del'>-		please refer to the SoC specific binding document:</div><div class='del'>-		* Documentation/devicetree/bindings/display/exynos/exynos_dp.txt</div><div class='del'>-		* Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt</div><div class='del'>-</div><div class='del'>-[1]: Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>--------------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	dp-controller {</div><div class='del'>-		compatible = "samsung,exynos5-dp";</div><div class='del'>-		reg = &lt;0x145b0000 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;10 3&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;combiner&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock 342&gt;;</div><div class='del'>-		clock-names = "dp";</div><div class='del'>-</div><div class='del'>-		phys = &lt;&amp;dp_phy&gt;;</div><div class='del'>-		phy-names = "dp";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/anx6345.yaml b/Documentation/devicetree/bindings/display/bridge/anx6345.yaml<br/>index 1c0406c38fe5..514f58852990 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/anx6345.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/anx6345.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/anx6345.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/anx6345.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/anx6345.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Analogix ANX6345 eDP Transmitter Device Tree Bindings</div><div class='add'>+title: Analogix ANX6345 eDP Transmitter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Torsten Duwe &lt;duwe@lst.de&gt;</div><div class='hunk'>@@ -61,7 +61,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt<br/>deleted file mode 100644<br/>index 525a4bfd8634..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/cdns,dsi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,112 +0,0 @@</div><div class='del'>-Cadence DSI bridge</div><div class='del'>-==================</div><div class='del'>-</div><div class='del'>-The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be set to "cdns,dsi".</div><div class='del'>-- reg: physical base address and length of the controller's registers.</div><div class='del'>-- interrupts: interrupt line connected to the DSI bridge.</div><div class='del'>-- clocks: DSI bridge clocks.</div><div class='del'>-- clock-names: must contain "dsi_p_clk" and "dsi_sys_clk".</div><div class='del'>-- phys: phandle link to the MIPI D-PHY controller.</div><div class='del'>-- phy-names: must contain "dphy".</div><div class='del'>-- #address-cells: must be set to 1.</div><div class='del'>-- #size-cells: must be set to 0.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- resets: DSI reset lines.</div><div class='del'>-- reset-names: can contain "dsi_p_rst".</div><div class='del'>-</div><div class='del'>-Required subnodes:</div><div class='del'>-- ports: Ports as described in Documentation/devicetree/bindings/graph.txt.</div><div class='del'>-  2 ports are available:</div><div class='del'>-  * port 0: this port is only needed if some of your DSI devices are</div><div class='del'>-	    controlled through  an external bus like I2C or SPI. Can have at</div><div class='del'>-	    most 4 endpoints. The endpoint number is directly encoding the</div><div class='del'>-	    DSI virtual channel used by this device.</div><div class='del'>-  * port 1: represents the DPI input.</div><div class='del'>-  Other ports will be added later to support the new kind of inputs.</div><div class='del'>-</div><div class='del'>-- one subnode per DSI device connected on the DSI bus. Each DSI device should</div><div class='del'>-  contain a reg property encoding its virtual channel.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	dsi0: dsi@fd0c0000 {</div><div class='del'>-		compatible = "cdns,dsi";</div><div class='del'>-		reg = &lt;0x0 0xfd0c0000 0x0 0x1000&gt;;</div><div class='del'>-		clocks = &lt;&amp;pclk&gt;, &lt;&amp;sysclk&gt;;</div><div class='del'>-		clock-names = "dsi_p_clk", "dsi_sys_clk";</div><div class='del'>-		interrupts = &lt;1&gt;;</div><div class='del'>-		phys = &lt;&amp;dphy0&gt;;</div><div class='del'>-		phy-names = "dphy";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				dsi0_dpi_input: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;xxx_dpi_output&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		panel: dsi-dev@0 {</div><div class='del'>-			compatible = "&lt;vendor,panel&gt;";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-or</div><div class='del'>-</div><div class='del'>-	dsi0: dsi@fd0c0000 {</div><div class='del'>-		compatible = "cdns,dsi";</div><div class='del'>-		reg = &lt;0x0 0xfd0c0000 0x0 0x1000&gt;;</div><div class='del'>-		clocks = &lt;&amp;pclk&gt;, &lt;&amp;sysclk&gt;;</div><div class='del'>-		clock-names = "dsi_p_clk", "dsi_sys_clk";</div><div class='del'>-		interrupts = &lt;1&gt;;</div><div class='del'>-		phys = &lt;&amp;dphy1&gt;;</div><div class='del'>-		phy-names = "dphy";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				dsi0_output: endpoint@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;dsi_panel_input&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				dsi0_dpi_input: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;xxx_dpi_output&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	i2c@xxx {</div><div class='del'>-		panel: panel@59 {</div><div class='del'>-			compatible = "&lt;vendor,panel&gt;";</div><div class='del'>-			reg = &lt;0x59&gt;;</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				dsi_panel_input: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;dsi0_output&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml<br/>new file mode 100644<br/>index 000000000000..23060324d16e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/cdns,dsi.yaml</a></div><div class='hunk'>@@ -0,0 +1,180 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cadence DSI bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Boris Brezillon &lt;boris.brezillon@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+   CDNS DSI is a bridge device which converts DPI to DSI</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - cdns,dsi</div><div class='add'>+      - ti,j721e-dsi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          Register block for controller's registers.</div><div class='add'>+      - description:</div><div class='add'>+          Register block for wrapper settings registers in case of TI J7 SoCs.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: PSM clock, used by the IP</div><div class='add'>+      - description: sys clock, used by the IP</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dsi_p_clk</div><div class='add'>+      - const: dsi_sys_clk</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: dphy</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: dsi_p_rst</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Output port representing the DSI output. It can have</div><div class='add'>+          at most 4 endpoints. The endpoint number is directly encoding</div><div class='add'>+          the DSI virtual channel used by this device.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Input port representing the DPI input.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ../dsi-controller.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ti,j721e-dsi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        dsi@fd0c0000 {</div><div class='add'>+            compatible = "cdns,dsi";</div><div class='add'>+            reg = &lt;0x0 0xfd0c0000 0x0 0x1000&gt;;</div><div class='add'>+            clocks = &lt;&amp;pclk&gt;, &lt;&amp;sysclk&gt;;</div><div class='add'>+            clock-names = "dsi_p_clk", "dsi_sys_clk";</div><div class='add'>+            interrupts = &lt;1&gt;;</div><div class='add'>+            phys = &lt;&amp;dphy0&gt;;</div><div class='add'>+            phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;xxx_dpi_output&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            panel@0 {</div><div class='add'>+                compatible = "panasonic,vvx10f034n00";</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                power-supply = &lt;&amp;vcc_lcd_reg&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        dsi@fd0c0000 {</div><div class='add'>+            compatible = "cdns,dsi";</div><div class='add'>+            reg = &lt;0x0 0xfd0c0000 0x0 0x1000&gt;;</div><div class='add'>+            clocks = &lt;&amp;pclk&gt;, &lt;&amp;sysclk&gt;;</div><div class='add'>+            clock-names = "dsi_p_clk", "dsi_sys_clk";</div><div class='add'>+            interrupts = &lt;1&gt;;</div><div class='add'>+            phys = &lt;&amp;dphy1&gt;;</div><div class='add'>+            phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    endpoint@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi_panel_input&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;xxx_dpi_output&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml<br/>index b2e8bc6da9d0..c2b369456e4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Cadence MHDP8546 bridge</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml b/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml<br/>index 62c3bd4cb28d..5fb54375aeb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/chipone,icn6211.yaml</a></div><div class='hunk'>@@ -24,6 +24,15 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: virtual channel number of a DSI peripheral</div><div class='ctx'> </div><div class='add'>+  clock-names:</div><div class='add'>+    const: refclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+        Optional external clock connected to REF_CLK input.</div><div class='add'>+        The clock rate must be in 10..154 MHz range.</div><div class='add'>+</div><div class='ctx'>   enable-gpios:</div><div class='ctx'>     description: Bridge EN pin, chip is reset when EN is low.</div><div class='ctx'> </div><div class='hunk'>@@ -41,17 +50,32 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description:</div><div class='ctx'>           Video port for MIPI DSI input</div><div class='ctx'> </div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description: array of physical DSI data lane indexes.</div><div class='add'>+                minItems: 1</div><div class='add'>+                items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='ctx'>       port@1:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>         description:</div><div class='ctx'>           Video port for MIPI DPI output (panel or connector).</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='del'>-      - port@0</div><div class='ctx'>       - port@1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml b/Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml<br/>index bb6289c7d375..b0589fa16736 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/chrontel,ch7033.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/chrontel,ch7033.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Chrontel CH7033 Video Encoder Device Tree Bindings</div><div class='add'>+title: Chrontel CH7033 Video Encoder</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml<br/>new file mode 100644<br/>index 000000000000..94543006f5de<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml</a></div><div class='hunk'>@@ -0,0 +1,173 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX8qm/qxp LVDS Display Bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Ying &lt;victor.liu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.</div><div class='add'>+</div><div class='add'>+  The i.MX8qm/qxp LDB is controlled by Control and Status Registers(CSR) module.</div><div class='add'>+  The CSR module, as a system controller, contains the LDB's configuration</div><div class='add'>+  registers.</div><div class='add'>+</div><div class='add'>+  For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color</div><div class='add'>+  format and can map the input to VESA or JEIDA standards.  The two channels</div><div class='add'>+  cannot be used simultaneously, that is to say, the user should pick one of</div><div class='add'>+  them to use.  Two LDB channels from two LDB instances can work together in</div><div class='add'>+  LDB split mode to support a dual link LVDS display.  The channel indexes</div><div class='add'>+  have to be different.  Channel0 outputs odd pixels and channel1 outputs</div><div class='add'>+  even pixels.</div><div class='add'>+</div><div class='add'>+  For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel</div><div class='add'>+  input color format.  The two channels can be used simultaneously, either</div><div class='add'>+  in dual mode or split mode.  In dual mode, the two channels output identical</div><div class='add'>+  data.  In split mode, channel0 outputs odd pixels and channel1 outputs even</div><div class='add'>+  pixels.</div><div class='add'>+</div><div class='add'>+  A side note is that i.MX8qm/qxp LDB is officially called pixel mapper in</div><div class='add'>+  the SoC reference manuals.  The pixel mapper uses logic of LDBs embedded in</div><div class='add'>+  i.MX6qdl/sx SoCs, i.e., it is essentially based on them.  To keep the naming</div><div class='add'>+  consistency, this binding calls it LDB.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8qm-ldb</div><div class='add'>+      - fsl,imx8qxp-ldb</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: pixel clock</div><div class='add'>+      - description: bypass clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pixel</div><div class='add'>+      - const: bypass</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fsl,companion-ldb:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      A phandle which points to companion LDB which is used in LDB split mode.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^channel@[0-1]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: Represents a channel of LDB.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        description: The channel index.</div><div class='add'>+        enum: [ 0, 1 ]</div><div class='add'>+</div><div class='add'>+      phys:</div><div class='add'>+        description: A phandle to the phy module representing the LVDS PHY.</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      phy-names:</div><div class='add'>+        const: lvds_phy</div><div class='add'>+</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Input port of the channel.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Output port of the channel.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#size-cells"</div><div class='add'>+      - reg</div><div class='add'>+      - phys</div><div class='add'>+      - phy-names</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - channel@0</div><div class='add'>+  - channel@1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8qm-ldb</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        fsl,companion-ldb: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+    ldb {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "fsl,imx8qxp-ldb";</div><div class='add'>+        clocks = &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS&gt;;</div><div class='add'>+        clock-names = "pixel", "bypass";</div><div class='add'>+        power-domains = &lt;&amp;pd IMX_SC_R_LVDS_0&gt;;</div><div class='add'>+</div><div class='add'>+        channel@0 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            phys = &lt;&amp;mipi_lvds_0_phy&gt;;</div><div class='add'>+            phy-names = "lvds_phy";</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@1 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            phys = &lt;&amp;mipi_lvds_0_phy&gt;;</div><div class='add'>+            phy-names = "lvds_phy";</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml<br/>new file mode 100644<br/>index 000000000000..50bae2122183<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX8qm/qxp Pixel Combiner</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Ying &lt;victor.liu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Freescale i.MX8qm/qxp Pixel Combiner takes two output streams from a</div><div class='add'>+  single display controller and manipulates the two streams to support a number</div><div class='add'>+  of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as</div><div class='add'>+  either one screen, two screens, or virtual screens.  The pixel combiner is</div><div class='add'>+  also responsible for generating some of the control signals for the pixel link</div><div class='add'>+  output channel.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8qm-pixel-combiner</div><div class='add'>+      - fsl,imx8qxp-pixel-combiner</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: apb</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^channel@[0-1]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: Represents a display stream of pixel combiner.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        description: The display stream index.</div><div class='add'>+        enum: [ 0, 1 ]</div><div class='add'>+</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Input endpoint of the display stream.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Output endpoint of the display stream.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#size-cells"</div><div class='add'>+      - reg</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8-lpcg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+    pixel-combiner@56020000 {</div><div class='add'>+        compatible = "fsl,imx8qxp-pixel-combiner";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x56020000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;dc0_pixel_combiner_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+        clock-names = "apb";</div><div class='add'>+        power-domains = &lt;&amp;pd IMX_SC_R_DC_0&gt;;</div><div class='add'>+</div><div class='add'>+        channel@0 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                dc0_pixel_combiner_ch0_dc0_dpu_disp0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dc0_dpu_disp0_dc0_pixel_combiner_ch0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                dc0_pixel_combiner_ch0_dc0_pixel_link0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dc0_pixel_link0_dc0_pixel_combiner_ch0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@1 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                dc0_pixel_combiner_ch1_dc0_dpu_disp1: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dc0_dpu_disp1_dc0_pixel_combiner_ch1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                dc0_pixel_combiner_ch1_dc0_pixel_link1: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dc0_pixel_link1_dc0_pixel_combiner_ch1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml<br/>new file mode 100644<br/>index 000000000000..38ecc7926fad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX8qm/qxp Display Pixel Link</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Ying &lt;victor.liu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Freescale i.MX8qm/qxp Display Pixel Link(DPL) forms a standard</div><div class='add'>+  asynchronous linkage between pixel sources(display controller or</div><div class='add'>+  camera module) and pixel consumers(imaging or displays).</div><div class='add'>+  It consists of two distinct functions, a pixel transfer function and a</div><div class='add'>+  control interface.  Multiple pixel channels can exist per one control channel.</div><div class='add'>+  This binding documentation is only for pixel links whose pixel sources are</div><div class='add'>+  display controllers.</div><div class='add'>+</div><div class='add'>+  The i.MX8qm/qxp Display Pixel Link is accessed via System Controller Unit(SCU)</div><div class='add'>+  firmware.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8qm-dc-pixel-link</div><div class='add'>+      - fsl,imx8qxp-dc-pixel-link</div><div class='add'>+</div><div class='add'>+  fsl,dc-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+      u8 value representing the display controller index that the pixel link</div><div class='add'>+      connects to.</div><div class='add'>+</div><div class='add'>+  fsl,dc-stream-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+      u8 value representing the display controller stream index that the pixel</div><div class='add'>+      link connects to.</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The pixel link input port node from upstream video source.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port@[1-4]$":</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The pixel link output port node to downstream bridge.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+      - port@2</div><div class='add'>+      - port@3</div><div class='add'>+      - port@4</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8qxp-dc-pixel-link</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        fsl,dc-id:</div><div class='add'>+          const: 0</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8qm-dc-pixel-link</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        fsl,dc-id:</div><div class='add'>+          enum: [0, 1]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - fsl,dc-id</div><div class='add'>+  - fsl,dc-stream-id</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    dc0-pixel-link0 {</div><div class='add'>+        compatible = "fsl,imx8qxp-dc-pixel-link";</div><div class='add'>+        fsl,dc-id = /bits/ 8 &lt;0&gt;;</div><div class='add'>+        fsl,dc-stream-id = /bits/ 8 &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            /* from dc0 pixel combiner channel0 */</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                dc0_pixel_link0_dc0_pixel_combiner_ch0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dc0_pixel_combiner_ch0_dc0_pixel_link0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            /* to PXL2DPIs in MIPI/LVDS combo subsystems */</div><div class='add'>+            port@1 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                dc0_pixel_link0_mipi_lvds_0_pxl2dpi: endpoint@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_lvds_0_pxl2dpi_dc0_pixel_link0&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                dc0_pixel_link0_mipi_lvds_1_pxl2dpi: endpoint@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_lvds_1_pxl2dpi_dc0_pixel_link0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            /* unused */</div><div class='add'>+            port@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            /* unused */</div><div class='add'>+            port@3 {</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            /* to imaging subsystem */</div><div class='add'>+            port@4 {</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml<br/>new file mode 100644<br/>index 000000000000..e4e77fad05f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml</a></div><div class='hunk'>@@ -0,0 +1,108 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX8qxp Pixel Link to Display Pixel Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Ying &lt;victor.liu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Freescale i.MX8qxp Pixel Link to Display Pixel Interface(PXL2DPI)</div><div class='add'>+  interfaces the pixel link 36-bit data output and the DSI controller’s</div><div class='add'>+  MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module</div><div class='add'>+  used in LVDS mode, to remap the pixel color codings between those modules.</div><div class='add'>+  This module is purely combinatorial.</div><div class='add'>+</div><div class='add'>+  The i.MX8qxp PXL2DPI is controlled by Control and Status Registers(CSR) module.</div><div class='add'>+  The CSR module, as a system controller, contains the PXL2DPI's configuration</div><div class='add'>+  register.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx8qxp-pxl2dpi</div><div class='add'>+</div><div class='add'>+  fsl,sc-resource:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: The SCU resource ID associated with this PXL2DPI instance.</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fsl,companion-pxl2dpi:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      A phandle which points to companion PXL2DPI which is used by downstream</div><div class='add'>+      LVDS Display Bridge(LDB) in split mode.</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The PXL2DPI input port node from pixel link.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The PXL2DPI output port node to downstream bridge.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - fsl,sc-resource</div><div class='add'>+  - power-domains</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+    pxl2dpi {</div><div class='add'>+        compatible = "fsl,imx8qxp-pxl2dpi";</div><div class='add'>+        fsl,sc-resource = &lt;IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_lvds_0_pxl2dpi_dc_pixel_link0: endpoint@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;dc_pixel_link0_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                mipi_lvds_0_pxl2dpi_dc_pixel_link1: endpoint@1 {</div><div class='add'>+                     reg = &lt;1&gt;;</div><div class='add'>+                     remote-endpoint = &lt;&amp;dc_pixel_link1_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml<br/>new file mode 100644<br/>index 000000000000..6e0e3ba9b49e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX8MP DPI to LVDS bridge chip</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The i.MX8MP mediamix contains two registers which are responsible</div><div class='add'>+  for configuring the on-SoC DPI-to-LVDS serializer. This describes</div><div class='add'>+  those registers as bridge within the DT.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8mp-ldb</div><div class='add'>+      - fsl,imx93-ldb</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: ldb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ldb</div><div class='add'>+      - const: lvds</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Video port for DPI input.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Video port for LVDS Channel-A output (panel or bridge).</div><div class='add'>+</div><div class='add'>+      port@2:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Video port for LVDS Channel-B output (panel or bridge).</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx93-ldb</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ports:</div><div class='add'>+          properties:</div><div class='add'>+            port@2: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    blk-ctrl {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        bridge@5c {</div><div class='add'>+            compatible = "fsl,imx8mp-ldb";</div><div class='add'>+            clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_LDB&gt;;</div><div class='add'>+            clock-names = "ldb";</div><div class='add'>+            reg = &lt;0x5c 0x4&gt;, &lt;0x128 0x4&gt;;</div><div class='add'>+            reg-names = "ldb", "lvds";</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    ldb_from_lcdif2: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;lcdif2_to_ldb&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    ldb_lvds_ch0: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;ldb_to_lvdsx4panel&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                    ldb_lvds_ch1: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml b/Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml<br/>index a88a5d8c7ba5..a44d025d33bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/google,cros-ec-anx7688.yaml</a></div><div class='hunk'>@@ -78,4 +78,3 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml<br/>index b8219eab4475..0b27df429bdc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/ingenic,jz4780-hdmi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/ingenic,jz4780-hdmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for Ingenic JZ4780 HDMI Transmitter</div><div class='add'>+title: Ingenic JZ4780 HDMI Transmitter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - H. Nikolaus Schaller &lt;hns@goldelico.com&gt;</div><div class='hunk'>@@ -55,7 +55,6 @@ examples:</div><div class='ctx'>         compatible = "ingenic,jz4780-dw-hdmi";</div><div class='ctx'>         reg = &lt;0x10180000 0x8000&gt;;</div><div class='ctx'>         reg-io-width = &lt;4&gt;;</div><div class='del'>-        ddc-i2c-bus = &lt;&amp;i2c4&gt;;</div><div class='ctx'>         interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'>         interrupts = &lt;3&gt;;</div><div class='ctx'>         clocks = &lt;&amp;cgu JZ4780_CLK_AHB0&gt;, &lt;&amp;cgu JZ4780_CLK_HDMI&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml<br/>index dcb1336ee2a5..958a073f4ff7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/intel,keembay-dsi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/intel,keembay-dsi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Devicetree bindings for Intel Keem Bay mipi dsi controller</div><div class='add'>+title: Intel Keem Bay mipi dsi controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml<br/>index 833d11b2303a..c9a882ee6d98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/ite,it6505.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ITE it6505 Device Tree Bindings</div><div class='add'>+title: ITE it6505</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Allen Chen &lt;allen.chen@ite.com.tw&gt;</div><div class='hunk'>@@ -52,9 +52,49 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: extcon specifier for the Power Delivery</div><div class='ctx'> </div><div class='del'>-  port:</div><div class='del'>-    $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-    description: A port node pointing to DPI host port node</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: A port node pointing to DPI host port node</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/graph.yaml#/$defs/endpoint-base</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              link-frequencies:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 1</div><div class='add'>+                description: Allowed max link frequencies in Hz</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: Video port for DP output</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/graph.yaml#/$defs/endpoint-base</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                uniqueItems: true</div><div class='add'>+                items:</div><div class='add'>+                  - enum: [ 0, 1 ]</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -63,6 +103,7 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - reset-gpios</div><div class='ctx'>   - extcon</div><div class='add'>+  - ports</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -85,9 +126,24 @@ examples:</div><div class='ctx'>             reset-gpios = &lt;&amp;pio 179 1&gt;;</div><div class='ctx'>             extcon = &lt;&amp;usbc_extcon&gt;;</div><div class='ctx'> </div><div class='del'>-            port {</div><div class='del'>-                it6505_in: endpoint {</div><div class='del'>-                    remote-endpoint = &lt;&amp;dpi_out&gt;;</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    it6505_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpi_out&gt;;</div><div class='add'>+                        link-frequencies = /bits/ 64 &lt;150000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    it6505_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dp_in&gt;;</div><div class='add'>+                        data-lanes = &lt;0 1&gt;;</div><div class='add'>+                    };</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml<br/>index 6ec1d5fbb8bc..a7eb2603691f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml</a></div><div class='hunk'>@@ -4,11 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/ite,it66121.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ITE it66121 HDMI bridge Device Tree Bindings</div><div class='add'>+title: ITE it66121 HDMI bridge</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Phong LE &lt;ple@baylibre.com&gt;</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The IT66121 is a high-performance and low-power single channel HDMI</div><div class='hunk'>@@ -17,7 +17,9 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: ite,it66121</div><div class='add'>+    enum:</div><div class='add'>+      - ite,it66121</div><div class='add'>+      - ite,it6610</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -38,6 +40,9 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml<br/>index 674891ee2f8e..f201ae4af4fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml</a></div><div class='hunk'>@@ -67,7 +67,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c4 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml<br/>new file mode 100644<br/>index 000000000000..9a6e9b25d14a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/lontium,lt9211.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/lontium,lt9211.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS</div><div class='add'>+  or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - lontium,lt9211</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO connected to active high RESET pin.</div><div class='add'>+</div><div class='add'>+  vccio-supply:</div><div class='add'>+    description: Regulator for 1.8V IO power.</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Primary MIPI DSI port-1 for MIPI input or</div><div class='add'>+          LVDS port-1 for LVDS input or DPI input.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Additional MIPI port-2 for MIPI input or LVDS port-2</div><div class='add'>+          for LVDS input. Used in combination with primary</div><div class='add'>+          port-1 to drive higher resolution displays</div><div class='add'>+</div><div class='add'>+      port@2:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Primary MIPI DSI port-1 for MIPI output or</div><div class='add'>+          LVDS port-1 for LVDS output or DPI output.</div><div class='add'>+</div><div class='add'>+      port@3:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Additional MIPI port-2 for MIPI output or LVDS port-2</div><div class='add'>+          for LVDS output. Used in combination with primary</div><div class='add'>+          port-1 to drive higher resolution displays.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vccio-supply</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      hdmi-bridge@3b {</div><div class='add'>+        compatible = "lontium,lt9211";</div><div class='add'>+        reg = &lt;0x3b&gt;;</div><div class='add'>+</div><div class='add'>+        reset-gpios = &lt;&amp;tlmm 128 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        interrupts-extended = &lt;&amp;tlmm 84 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+        vccio-supply = &lt;&amp;lt9211_1v8&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          port@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint {</div><div class='add'>+              remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          port@2 {</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint {</div><div class='add'>+              remote-endpoint = &lt;&amp;panel_in_lvds&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml<br/>index 3a8614e0f627..84aafcbf0919 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml</a></div><div class='hunk'>@@ -51,6 +51,7 @@ properties:</div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>           For LVDS encoders, port 0 is the parallel input</div><div class='ctx'>           For LVDS decoders, port 0 is the LVDS input</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml<br/>index 107dd138e6c6..70ec70922c13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/nxp,ptn3460.yaml</a></div><div class='hunk'>@@ -18,7 +18,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   edid-emulation:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='ctx'>       The EDID emulation entry to use</div><div class='ctx'>       Value  Resolution  Description</div><div class='hunk'>@@ -71,7 +71,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml b/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml<br/>new file mode 100644<br/>index 000000000000..c4bf54397473<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/nxp,tda998x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP TDA998x HDMI transmitter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Russell King &lt;linux@armlinux.org.uk&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nxp,tda998x</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  video-ports:</div><div class='add'>+    default: 0x230145</div><div class='add'>+    maximum: 0xffffff</div><div class='add'>+    description:</div><div class='add'>+      24 bits value which defines how the video controller output is wired to</div><div class='add'>+      the TDA998x input.</div><div class='add'>+</div><div class='add'>+  audio-ports:</div><div class='add'>+    description:</div><div class='add'>+      Array of 8-bit values, 2 values per DAI (Documentation/sound/soc/dai.rst).</div><div class='add'>+      The implementation allows one or two DAIs.</div><div class='add'>+      If two DAIs are defined, they must be of different type.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    items:</div><div class='add'>+      minItems: 1</div><div class='add'>+      items:</div><div class='add'>+        - description: |</div><div class='add'>+            The first value defines the DAI type: TDA998x_SPDIF or TDA998x_I2S</div><div class='add'>+            (see include/dt-bindings/display/tda998x.h).</div><div class='add'>+        - description:</div><div class='add'>+            The second value defines the tda998x AP_ENA reg content when the</div><div class='add'>+            DAI in question is used.</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    enum: [ 0, 1 ]</div><div class='add'>+</div><div class='add'>+  nxp,calib-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Calibration GPIO, which must correspond with the gpio used for the</div><div class='add'>+      TDA998x interrupt pin.</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    description: Parallel input port</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        type: object</div><div class='add'>+        description: Parallel input port</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        type: object</div><div class='add'>+        description: HDMI output port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - port</div><div class='add'>+  - required:</div><div class='add'>+      - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/display/tda998x.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        tda998x: hdmi-encoder@70 {</div><div class='add'>+            compatible = "nxp,tda998x";</div><div class='add'>+            reg = &lt;0x70&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+            interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            video-ports = &lt;0x230145&gt;;</div><div class='add'>+</div><div class='add'>+            #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+                         /* DAI-format / AP_ENA reg value */</div><div class='add'>+            audio-ports = &lt;TDA998x_SPDIF 0x04&gt;,</div><div class='add'>+                          &lt;TDA998x_I2S 0x03&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                tda998x_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;lcdc_0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml b/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml<br/>new file mode 100644<br/>index 000000000000..e6397ac2048b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/parade,ps8622.yaml</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/parade,ps8622.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Parade PS8622/PS8625 DisplayPort to LVDS Converter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - parade,ps8622</div><div class='add'>+      - parade,ps8625</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  lane-count:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+    description: Number of DP lanes to use.</div><div class='add'>+</div><div class='add'>+  use-external-pwm:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Backlight will be controlled by an external PWM.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO connected to RST_ pin.</div><div class='add'>+</div><div class='add'>+  sleep-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO connected to PD_ pin.</div><div class='add'>+</div><div class='add'>+  vdd12-supply: true</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Video port for LVDS output.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Video port for DisplayPort input.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - sleep-gpios</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: parade,ps8622</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        lane-count:</div><div class='add'>+          const: 1</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        lane-count:</div><div class='add'>+          const: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        lvds-bridge@48 {</div><div class='add'>+            compatible = "parade,ps8625";</div><div class='add'>+            reg = &lt;0x48&gt;;</div><div class='add'>+            sleep-gpios = &lt;&amp;gpx3 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpy7 7 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            lane-count = &lt;2&gt;;</div><div class='add'>+            use-external-pwm;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    bridge_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    bridge_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dp_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ps8622.txt b/Documentation/devicetree/bindings/display/bridge/ps8622.txt<br/>deleted file mode 100644<br/>index c989c3807f2b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ps8622.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ps8622.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-ps8622-bridge bindings</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: "parade,ps8622" or "parade,ps8625"</div><div class='del'>-	- reg: first i2c address of the bridge</div><div class='del'>-	- sleep-gpios: OF device-tree gpio specification for PD_ pin.</div><div class='del'>-	- reset-gpios: OF device-tree gpio specification for RST_ pin.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- lane-count: number of DP lanes to use</div><div class='del'>-	- use-external-pwm: backlight will be controlled by an external PWM</div><div class='del'>-	- video interfaces: Device node can contain video interface port</div><div class='del'>-			    nodes for panel according to [1].</div><div class='del'>-</div><div class='del'>-[1]: Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	lvds-bridge@48 {</div><div class='del'>-		compatible = "parade,ps8622";</div><div class='del'>-		reg = &lt;0x48&gt;;</div><div class='del'>-		sleep-gpios = &lt;&amp;gpc3 6 1 0 0&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpc3 1 1 0 0&gt;;</div><div class='del'>-		lane-count = &lt;1&gt;;</div><div class='del'>-		ports {</div><div class='del'>-			port@0 {</div><div class='del'>-				bridge_out: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ps8640.yaml b/Documentation/devicetree/bindings/display/bridge/ps8640.yaml<br/>index 186e17be51fb..5856450c5da7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ps8640.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ps8640.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ps8640.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/ps8640.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/ps8640.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MIPI DSI to eDP Video Format Converter Device Tree Bindings</div><div class='add'>+title: MIPI DSI to eDP Video Format Converter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nicolas Boichat &lt;drinkcat@chromium.org&gt;</div><div class='hunk'>@@ -73,7 +73,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -119,4 +119,3 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml<br/>index afeeb967393d..d33026f85e19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/renesas,dsi-csi2-tx.yaml</a></div><div class='hunk'>@@ -11,13 +11,14 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas</div><div class='del'>-  R-Car V3U SoC. The encoder can operate in either DSI or CSI-2 mode, with up</div><div class='add'>+  R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up</div><div class='ctx'>   to four data lanes.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - renesas,r8a779a0-dsi-csi2-tx    # for V3U</div><div class='add'>+      - renesas,r8a779g0-dsi-csi2-tx    # for V4H</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml<br/>new file mode 100644<br/>index 000000000000..e08c24633926<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/renesas,dsi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/G2L MIPI DSI Encoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes the MIPI DSI encoder embedded in the Renesas</div><div class='add'>+  RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with</div><div class='add'>+  up to four data lanes.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/display/dsi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-mipi-dsi # RZ/V2L</div><div class='add'>+      - const: renesas,rzg2l-mipi-dsi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Sequence operation channel 0 interrupt</div><div class='add'>+      - description: Sequence operation channel 1 interrupt</div><div class='add'>+      - description: Video-Input operation channel 1 interrupt</div><div class='add'>+      - description: DSI Packet Receive interrupt</div><div class='add'>+      - description: DSI Fatal Error interrupt</div><div class='add'>+      - description: DSI D-PHY PPI interrupt</div><div class='add'>+      - description: Debug interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: seq0</div><div class='add'>+      - const: seq1</div><div class='add'>+      - const: vin1</div><div class='add'>+      - const: rcv</div><div class='add'>+      - const: ferr</div><div class='add'>+      - const: ppi</div><div class='add'>+      - const: debug</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: DSI D-PHY PLL multiplied clock</div><div class='add'>+      - description: DSI D-PHY system clock</div><div class='add'>+      - description: DSI AXI bus clock</div><div class='add'>+      - description: DSI Register access clock</div><div class='add'>+      - description: DSI Video clock</div><div class='add'>+      - description: DSI D-PHY Escape mode transmit clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pllclk</div><div class='add'>+      - const: sysclk</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: vclk</div><div class='add'>+      - const: lpclk</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: MIPI_DSI_CMN_RSTB</div><div class='add'>+      - description: MIPI_DSI_ARESET_N</div><div class='add'>+      - description: MIPI_DSI_PRESET_N</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rst</div><div class='add'>+      - const: arst</div><div class='add'>+      - const: prst</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Parallel input port</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: DSI output port</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description: array of physical DSI data lane indexes.</div><div class='add'>+                minItems: 1</div><div class='add'>+                items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a07g044-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi0: dsi@10850000 {</div><div class='add'>+        compatible = "renesas,r9a07g044-mipi-dsi", "renesas,rzg2l-mipi-dsi";</div><div class='add'>+        reg = &lt;0x10850000 0x20000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "seq0", "seq1", "vin1", "rcv",</div><div class='add'>+                          "ferr", "ppi", "debug";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_SYSCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_ACLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_PCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_VCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_MIPI_DSI_LPCLK&gt;;</div><div class='add'>+        clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";</div><div class='add'>+        resets = &lt;&amp;cpg R9A07G044_MIPI_DSI_CMN_RSTB&gt;,</div><div class='add'>+                 &lt;&amp;cpg R9A07G044_MIPI_DSI_ARESET_N&gt;,</div><div class='add'>+                 &lt;&amp;cpg R9A07G044_MIPI_DSI_PRESET_N&gt;;</div><div class='add'>+        reset-names = "rst", "arst", "prst";</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                dsi0_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;du_out_dsi0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                dsi0_out: endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;adv7535_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml<br/>index 0c9785c8db51..e3ec697f89e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.yaml</a></div><div class='hunk'>@@ -38,6 +38,9 @@ properties:</div><div class='ctx'>   clock-names:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'> </div><div class='hunk'>@@ -67,6 +70,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='add'>+  - resets</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='hunk'>@@ -85,6 +89,7 @@ examples:</div><div class='ctx'>         clocks = &lt;&amp;cpg CPG_CORE R8A7795_CLK_S0D4&gt;, &lt;&amp;cpg CPG_MOD 729&gt;;</div><div class='ctx'>         clock-names = "iahb", "isfr";</div><div class='ctx'>         power-domains = &lt;&amp;sysc R8A7795_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 729&gt;;</div><div class='ctx'> </div><div class='ctx'>         ports {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml<br/>index a51baf8a4c76..bb9dbfb9beaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml</a></div><div class='hunk'>@@ -95,7 +95,6 @@ then:</div><div class='ctx'>   properties:</div><div class='ctx'>     clocks:</div><div class='ctx'>       minItems: 1</div><div class='del'>-      maxItems: 4</div><div class='ctx'>       items:</div><div class='ctx'>         - description: Functional clock</div><div class='ctx'>         - description: EXTAL input clock</div><div class='hunk'>@@ -104,7 +103,6 @@ then:</div><div class='ctx'> </div><div class='ctx'>     clock-names:</div><div class='ctx'>       minItems: 1</div><div class='del'>-      maxItems: 4</div><div class='ctx'>       items:</div><div class='ctx'>         - const: fck</div><div class='ctx'>         # The LVDS encoder can use the EXTAL or DU_DOTCLKINx clocks.</div><div class='hunk'>@@ -128,12 +126,10 @@ then:</div><div class='ctx'> else:</div><div class='ctx'>   properties:</div><div class='ctx'>     clocks:</div><div class='del'>-      maxItems: 1</div><div class='ctx'>       items:</div><div class='ctx'>         - description: Functional clock</div><div class='ctx'> </div><div class='ctx'>     clock-names:</div><div class='del'>-      maxItems: 1</div><div class='ctx'>       items:</div><div class='ctx'>         - const: fck</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml b/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml<br/>new file mode 100644<br/>index 000000000000..e841659e20cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/samsung,mipi-dsim.yaml</a></div><div class='hunk'>@@ -0,0 +1,255 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung MIPI DSIM bridge controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='add'>+  - Jagan Teki &lt;jagan@amarulasolutions.com&gt;</div><div class='add'>+  - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Samsung MIPI DSIM bridge controller can be found it on Exynos</div><div class='add'>+  and i.MX8M Mini/Nano/Plus SoC's.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - samsung,exynos3250-mipi-dsi</div><div class='add'>+          - samsung,exynos4210-mipi-dsi</div><div class='add'>+          - samsung,exynos5410-mipi-dsi</div><div class='add'>+          - samsung,exynos5422-mipi-dsi</div><div class='add'>+          - samsung,exynos5433-mipi-dsi</div><div class='add'>+          - fsl,imx8mm-mipi-dsim</div><div class='add'>+          - fsl,imx8mp-mipi-dsim</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx8mn-mipi-dsim</div><div class='add'>+          - const: fsl,imx8mm-mipi-dsim</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  samsung,phy-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: phandle to the samsung phy-type</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  samsung,power-domain:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the associated samsung power domain</div><div class='add'>+</div><div class='add'>+  vddcore-supply:</div><div class='add'>+    description: MIPI DSIM Core voltage supply (e.g. 1.1V)</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)</div><div class='add'>+</div><div class='add'>+  samsung,burst-clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      DSIM high speed burst mode frequency.</div><div class='add'>+</div><div class='add'>+  samsung,esc-clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      DSIM escape mode frequency.</div><div class='add'>+</div><div class='add'>+  samsung,pll-clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      DSIM oscillator clock frequency.</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: dsim</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Input port node to receive pixel data from the</div><div class='add'>+          display controller. Exactly one endpoint must be</div><div class='add'>+          specified.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          DSI output port node to the panel or the next bridge</div><div class='add'>+          in the chain.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+  - samsung,burst-clock-frequency</div><div class='add'>+  - samsung,esc-clock-frequency</div><div class='add'>+  - samsung,pll-clock-frequency</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ../dsi-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos5433-mipi-dsi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus_clk</div><div class='add'>+            - const: phyclk_mipidphy0_bitclkdiv8</div><div class='add'>+            - const: phyclk_mipidphy0_rxclkesc0</div><div class='add'>+            - const: sclk_rgb_vclk_to_dsim0</div><div class='add'>+            - const: sclk_mipi</div><div class='add'>+</div><div class='add'>+        ports:</div><div class='add'>+          required:</div><div class='add'>+            - port@0</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - ports</div><div class='add'>+        - vddcore-supply</div><div class='add'>+        - vddio-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos5410-mipi-dsi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus_clk</div><div class='add'>+            - const: pll_clk</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - vddcore-supply</div><div class='add'>+        - vddio-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos4210-mipi-dsi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus_clk</div><div class='add'>+            - const: sclk_mipi</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - vddcore-supply</div><div class='add'>+        - vddio-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos3250-mipi-dsi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus_clk</div><div class='add'>+            - const: pll_clk</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - vddcore-supply</div><div class='add'>+        - vddio-supply</div><div class='add'>+        - samsung,phy-type</div><div class='add'>+</div><div class='add'>+additionalProperties:</div><div class='add'>+  type: object</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos5433.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi@13900000 {</div><div class='add'>+       compatible = "samsung,exynos5433-mipi-dsi";</div><div class='add'>+       reg = &lt;0x13900000 0xC0&gt;;</div><div class='add'>+       interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+       phys = &lt;&amp;mipi_phy 1&gt;;</div><div class='add'>+       phy-names = "dsim";</div><div class='add'>+       clocks = &lt;&amp;cmu_disp CLK_PCLK_DSIM0&gt;,</div><div class='add'>+                &lt;&amp;cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8&gt;,</div><div class='add'>+                &lt;&amp;cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0&gt;,</div><div class='add'>+                &lt;&amp;cmu_disp CLK_SCLK_RGB_VCLK_TO_DSIM0&gt;,</div><div class='add'>+                &lt;&amp;cmu_disp CLK_SCLK_DSIM0&gt;;</div><div class='add'>+       clock-names = "bus_clk",</div><div class='add'>+                     "phyclk_mipidphy0_bitclkdiv8",</div><div class='add'>+                     "phyclk_mipidphy0_rxclkesc0",</div><div class='add'>+                     "sclk_rgb_vclk_to_dsim0",</div><div class='add'>+                     "sclk_mipi";</div><div class='add'>+       power-domains = &lt;&amp;pd_disp&gt;;</div><div class='add'>+       vddcore-supply = &lt;&amp;ldo6_reg&gt;;</div><div class='add'>+       vddio-supply = &lt;&amp;ldo7_reg&gt;;</div><div class='add'>+       samsung,burst-clock-frequency = &lt;512000000&gt;;</div><div class='add'>+       samsung,esc-clock-frequency = &lt;16000000&gt;;</div><div class='add'>+       samsung,pll-clock-frequency = &lt;24000000&gt;;</div><div class='add'>+       pinctrl-names = "default";</div><div class='add'>+       pinctrl-0 = &lt;&amp;te_irq&gt;;</div><div class='add'>+</div><div class='add'>+       ports {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          port@0 {</div><div class='add'>+             reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+             dsi_to_mic: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;mic_to_dsi&gt;;</div><div class='add'>+             };</div><div class='add'>+          };</div><div class='add'>+       };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/sii902x.txt b/Documentation/devicetree/bindings/display/bridge/sii902x.txt<br/>deleted file mode 100644<br/>index 3bc760cc31cb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/sii902x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sii902x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,78 +0,0 @@</div><div class='del'>-sii902x HDMI bridge bindings</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: "sil,sii9022"</div><div class='del'>-	- reg: i2c address of the bridge</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- interrupts: describe the interrupt line used to inform the host</div><div class='del'>-	  about hotplug events.</div><div class='del'>-	- reset-gpios: OF device-tree gpio specification for RST_N pin.</div><div class='del'>-	- iovcc-supply: I/O Supply Voltage (1.8V or 3.3V)</div><div class='del'>-	- cvcc12-supply: Digital Core Supply Voltage (1.2V)</div><div class='del'>-</div><div class='del'>-	HDMI audio properties:</div><div class='del'>-	- #sound-dai-cells: &lt;0&gt; or &lt;1&gt;. &lt;0&gt; if only i2s or spdif pin</div><div class='del'>-	   is wired, &lt;1&gt; if the both are wired. HDMI audio is</div><div class='del'>-	   configured only if this property is found.</div><div class='del'>-	- sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3</div><div class='del'>-	   Each integer indicates which i2s pin is connected to which</div><div class='del'>-	   audio fifo. The first integer selects i2s audio pin for the</div><div class='del'>-	   first audio fifo#0 (HDMI channels 1&amp;2), second for fifo#1</div><div class='del'>-	   (HDMI channels 3&amp;4), and so on. There is 4 fifos and 4 i2s</div><div class='del'>-	   pins (SD0 - SD3). Any i2s pin can be connected to any fifo,</div><div class='del'>-	   but there can be no gaps. E.g. an i2s pin must be mapped to</div><div class='del'>-	   fifo#0 and fifo#1 before mapping a channel to fifo#2. Default</div><div class='del'>-	   value is &lt;0&gt;, describing SD0 pin beiging routed to hdmi audio</div><div class='del'>-	   fifo #0.</div><div class='del'>-	- clocks: phandle and clock specifier for each clock listed in</div><div class='del'>-           the clock-names property</div><div class='del'>-	- clock-names: "mclk"</div><div class='del'>-	   Describes SII902x MCLK input. MCLK can be used to produce</div><div class='del'>-	   HDMI audio CTS values. This property follows</div><div class='del'>-	   Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-	   consumer binding.</div><div class='del'>-</div><div class='del'>-	If HDMI audio is configured the sii902x device becomes an I2S</div><div class='del'>-	and/or spdif audio codec component (e.g a digital audio sink),</div><div class='del'>-	that can be used in configuring a full audio devices with</div><div class='del'>-	simple-card or audio-graph-card binding. See their binding</div><div class='del'>-	documents on how to describe the way the sii902x device is</div><div class='del'>-	connected to the rest of the audio system:</div><div class='del'>-	Documentation/devicetree/bindings/sound/simple-card.yaml</div><div class='del'>-	Documentation/devicetree/bindings/sound/audio-graph-card.yaml</div><div class='del'>-	Note: In case of the audio-graph-card binding the used port</div><div class='del'>-	index should be 3.</div><div class='del'>-</div><div class='del'>-Optional subnodes:</div><div class='del'>-	- video input: this subnode can contain a video input port node</div><div class='del'>-	  to connect the bridge to a display controller output (See this</div><div class='del'>-	  documentation [1]).</div><div class='del'>-</div><div class='del'>-[1]: Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	hdmi-bridge@39 {</div><div class='del'>-		compatible = "sil,sii9022";</div><div class='del'>-		reg = &lt;0x39&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;pioA 1 0&gt;;</div><div class='del'>-		iovcc-supply = &lt;&amp;v3v3_hdmi&gt;;</div><div class='del'>-		cvcc12-supply = &lt;&amp;v1v2_hdmi&gt;;</div><div class='del'>-</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		sil,i2s-data-lanes = &lt; 0 1 2 &gt;;</div><div class='del'>-		clocks = &lt;&amp;mclk&gt;;</div><div class='del'>-		clock-names = "mclk";</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				bridge_in: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;dc_out&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml<br/>new file mode 100644<br/>index 000000000000..6d1a36b76fcb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml</a></div><div class='hunk'>@@ -0,0 +1,108 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/sil,sii8620.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Silicon Image SiI8620 HDMI/MHL bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sil,sii8620</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xtal</div><div class='add'>+</div><div class='add'>+  cvcc10-supply:</div><div class='add'>+    description: Digital Core Supply Voltage (1.0V)</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iovcc18-supply:</div><div class='add'>+    description: I/O Supply Voltage (1.8V)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Video port for HDMI (encoder) input</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          MHL to connector port</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - cvcc10-supply</div><div class='add'>+  - interrupts</div><div class='add'>+  - iovcc18-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        bridge@39 {</div><div class='add'>+            reg = &lt;0x39&gt;;</div><div class='add'>+            compatible = "sil,sii8620";</div><div class='add'>+            cvcc10-supply = &lt;&amp;ldo36_reg&gt;;</div><div class='add'>+            iovcc18-supply = &lt;&amp;ldo34_reg&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpf0&gt;;</div><div class='add'>+            interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpv7 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            clocks = &lt;&amp;pmu_system_controller 0&gt;;</div><div class='add'>+            clock-names = "xtal";</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    mhl_to_hdmi: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;hdmi_to_mhl&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    mhl_to_musb_con: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;musb_con_to_mhl&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml<br/>new file mode 100644<br/>index 000000000000..5a69547ad3d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/sil,sii9022.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Silicon Image sii902x HDMI bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Boris Brezillon &lt;bbrezillon@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sil,sii9022-cpi # CEC Programming Interface</div><div class='add'>+              - sil,sii9022-tpi # Transmitter Programming Interface</div><div class='add'>+          - const: sil,sii9022</div><div class='add'>+      - const: sil,sii9022</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Interrupt line used to inform the host about hotplug events.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iovcc-supply:</div><div class='add'>+    description: I/O Supply Voltage (1.8V or 3.3V)</div><div class='add'>+</div><div class='add'>+  cvcc12-supply:</div><div class='add'>+    description: Digital Core Supply Voltage (1.2V)</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    enum: [ 0, 1 ]</div><div class='add'>+    description: |</div><div class='add'>+      &lt;0&gt; if only I2S or S/PDIF pin is wired,</div><div class='add'>+      &lt;1&gt; if both are wired.</div><div class='add'>+      HDMI audio is configured only if this property is found.</div><div class='add'>+      If HDMI audio is configured, the sii902x device becomes an I2S and/or</div><div class='add'>+      S/PDIF audio codec component (e.g. a digital audio sink), that can be</div><div class='add'>+      used in configuring full audio devices with simple-card or</div><div class='add'>+      audio-graph-card bindings. See their binding documents on how to describe</div><div class='add'>+      the way the</div><div class='add'>+      sii902x device is connected to the rest of the audio system:</div><div class='add'>+      Documentation/devicetree/bindings/sound/simple-card.yaml</div><div class='add'>+      Documentation/devicetree/bindings/sound/audio-graph-card.yaml</div><div class='add'>+      Note: In case of the audio-graph-card binding the used port index should</div><div class='add'>+      be 3.</div><div class='add'>+</div><div class='add'>+  sil,i2s-data-lanes:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    uniqueItems: true</div><div class='add'>+    items:</div><div class='add'>+      enum: [ 0, 1, 2, 3 ]</div><div class='add'>+    description:</div><div class='add'>+      Each integer indicates which I2S pin is connected to which audio FIFO.</div><div class='add'>+      The first integer selects the I2S audio pin for the first audio FIFO#0</div><div class='add'>+      (HDMI channels 1&amp;2), the second for FIFO#1 (HDMI channels 3&amp;4), and so</div><div class='add'>+      on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be</div><div class='add'>+      connected to any FIFO, but there can be no gaps. E.g. an I2S pin must be</div><div class='add'>+      mapped to FIFO#0 and FIFO#1 before mapping a channel to FIFO#2. The</div><div class='add'>+      default value is &lt;0&gt;, describing SD0 pin being routed to HDMI audio</div><div class='add'>+      FIFO#0.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: MCLK input. MCLK can be used to produce HDMI audio CTS values.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: mclk</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Parallel RGB input port</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: HDMI output port</div><div class='add'>+</div><div class='add'>+      port@3:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Sound input port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        hdmi-bridge@39 {</div><div class='add'>+            compatible = "sil,sii9022";</div><div class='add'>+            reg = &lt;0x39&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;pioA 1 0&gt;;</div><div class='add'>+            iovcc-supply = &lt;&amp;v3v3_hdmi&gt;;</div><div class='add'>+            cvcc12-supply = &lt;&amp;v1v2_hdmi&gt;;</div><div class='add'>+</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            sil,i2s-data-lanes = &lt; 0 1 2 &gt;;</div><div class='add'>+            clocks = &lt;&amp;mclk&gt;;</div><div class='add'>+            clock-names = "mclk";</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    bridge_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dc_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml<br/>index f88ddfe4818b..176181d25530 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/sil,sii9234.yaml</a></div><div class='hunk'>@@ -71,7 +71,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt b/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt<br/>deleted file mode 100644<br/>index b05052f7d62f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-Silicon Image SiI8620 HDMI/MHL bridge bindings</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: "sil,sii8620"</div><div class='del'>-	- reg: i2c address of the bridge</div><div class='del'>-	- cvcc10-supply: Digital Core Supply Voltage (1.0V)</div><div class='del'>-	- iovcc18-supply: I/O Supply Voltage (1.8V)</div><div class='del'>-	- interrupts: interrupt specifier of INT pin</div><div class='del'>-	- reset-gpios: gpio specifier of RESET pin</div><div class='del'>-	- clocks, clock-names: specification and name of "xtal" clock</div><div class='del'>-	- video interfaces: Device node can contain video interface port</div><div class='del'>-			    node for HDMI encoder according to [1].</div><div class='del'>-</div><div class='del'>-[1]: Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	sii8620@39 {</div><div class='del'>-		reg = &lt;0x39&gt;;</div><div class='del'>-		compatible = "sil,sii8620";</div><div class='del'>-		cvcc10-supply = &lt;&amp;ldo36_reg&gt;;</div><div class='del'>-		iovcc18-supply = &lt;&amp;ldo34_reg&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpf0&gt;;</div><div class='del'>-		interrupts = &lt;2 0&gt;;</div><div class='del'>-		reset-gpio = &lt;&amp;gpv7 0 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;pmu_system_controller 0&gt;;</div><div class='del'>-		clock-names = "xtal";</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			mhl_to_hdmi: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;hdmi_to_mhl&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml<br/>index 11fd68a70dca..0b51c64f141a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml</a></div><div class='hunk'>@@ -26,19 +26,9 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Module clock</div><div class='del'>-      - description: DSI bus clock for either AHB and APB</div><div class='del'>-      - description: Pixel clock for the DPI/RGB input</div><div class='del'>-    minItems: 2</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: ref</div><div class='del'>-      - const: pclk</div><div class='del'>-      - const: px_clk</div><div class='del'>-    minItems: 2</div><div class='add'>+  clocks: true</div><div class='add'>+</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml<br/>index b00246faea57..4b7e54a8f037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/synopsys,dw-hdmi.yaml</a></div><div class='hunk'>@@ -26,7 +26,6 @@ properties:</div><div class='ctx'>   reg-io-width:</div><div class='ctx'>     description:</div><div class='ctx'>       Width (in bytes) of the registers specified by the reg property.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [1, 4]</div><div class='ctx'>     default: 1</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/tda998x.txt b/Documentation/devicetree/bindings/display/bridge/tda998x.txt<br/>deleted file mode 100644<br/>index f5a02f61dd36..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/tda998x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/tda998x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-Device-Tree bindings for the NXP TDA998x HDMI transmitter</div><div class='del'>-</div><div class='del'>-Required properties;</div><div class='del'>-  - compatible: must be "nxp,tda998x"</div><div class='del'>-</div><div class='del'>-  - reg: I2C address</div><div class='del'>-</div><div class='del'>-Required node:</div><div class='del'>-  - port: Input port node with endpoint definition, as described</div><div class='del'>-        in Documentation/devicetree/bindings/graph.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - interrupts: interrupt number and trigger type</div><div class='del'>-	default: polling</div><div class='del'>-</div><div class='del'>-  - pinctrl-0: pin control group to be used for</div><div class='del'>-	screen plug/unplug interrupt.</div><div class='del'>-</div><div class='del'>-  - pinctrl-names: must contain a "default" entry.</div><div class='del'>-</div><div class='del'>-  - video-ports: 24 bits value which defines how the video controller</div><div class='del'>-	output is wired to the TDA998x input - default: &lt;0x230145&gt;</div><div class='del'>-</div><div class='del'>-  - audio-ports: array of 8-bit values, 2 values per one DAI[1].</div><div class='del'>-	The first value defines the DAI type: TDA998x_SPDIF or TDA998x_I2S[2].</div><div class='del'>-	The second value defines the tda998x AP_ENA reg content when the DAI</div><div class='del'>-	in question is used. The implementation allows one or two DAIs. If two</div><div class='del'>-	DAIs are defined, they must be of different type.</div><div class='del'>-</div><div class='del'>-  - nxp,calib-gpios: calibration GPIO, which must correspond with the</div><div class='del'>-	gpio used for the TDA998x interrupt pin.</div><div class='del'>-</div><div class='del'>-[1] Documentation/sound/soc/dai.rst</div><div class='del'>-[2] include/dt-bindings/display/tda998x.h</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/display/tda998x.h&gt;</div><div class='del'>-</div><div class='del'>-	tda998x: hdmi-encoder {</div><div class='del'>-		compatible = "nxp,tda998x";</div><div class='del'>-		reg = &lt;0x70&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;27 2&gt;;		/* falling edge */</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmx_camera&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		video-ports = &lt;0x230145&gt;;</div><div class='del'>-</div><div class='del'>-		#sound-dai-cells = &lt;2&gt;;</div><div class='del'>-			     /*	DAI-format	AP_ENA reg value */</div><div class='del'>-		audio-ports = &lt;	TDA998x_SPDIF	0x04</div><div class='del'>-				TDA998x_I2S	0x03&gt;;</div><div class='del'>-</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ti,dlpc3433.yaml b/Documentation/devicetree/bindings/display/bridge/ti,dlpc3433.yaml<br/>new file mode 100644<br/>index 000000000000..d3f84d220723<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ti,dlpc3433.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/ti,dlpc3433.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/ti,dlpc3433.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI DLPC3433 MIPI DSI to DMD bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jagan Teki &lt;jagan@amarulasolutions.com&gt;</div><div class='add'>+  - Christopher Vollo &lt;chris@renewoutreach.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  TI DLPC3433 is a MIPI DSI based display controller bridge</div><div class='add'>+  for processing high resolution DMD based projectors.</div><div class='add'>+</div><div class='add'>+  It has a flexible configuration of MIPI DSI and DPI signal</div><div class='add'>+  input that produces a DMD output in RGB565, RGB666, RGB888</div><div class='add'>+  formats.</div><div class='add'>+</div><div class='add'>+  It supports upto 720p resolution with 60 and 120 Hz refresh</div><div class='add'>+  rates.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,dlpc3433</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    enum:</div><div class='add'>+      - 0x1b</div><div class='add'>+      - 0x1d</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: PROJ_ON pin, chip powers up PROJ_ON is high.</div><div class='add'>+</div><div class='add'>+  vcc_intf-supply:</div><div class='add'>+    description: A 1.8V/3.3V supply that power the Host I/O.</div><div class='add'>+</div><div class='add'>+  vcc_flsh-supply:</div><div class='add'>+    description: A 1.8V/3.3V supply that power the Flash I/O.</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: Video port for MIPI DSI input.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description: array of physical DSI data lane indexes.</div><div class='add'>+                minItems: 1</div><div class='add'>+                items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Video port for DMD output.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - enable-gpios</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        bridge@1b {</div><div class='add'>+            compatible = "ti,dlpc3433";</div><div class='add'>+            reg = &lt;0x1b&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;gpio2 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    bridge_in_dsi: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi_out_bridge&gt;;</div><div class='add'>+                        data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    bridge_out_panel: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;panel_out_bridge&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml<br/>index 911564468c5e..6ec6d287bff4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/ti,sn65dsi86.yaml</a></div><div class='hunk'>@@ -90,7 +90,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           endpoint:</div><div class='del'>-            $ref: /schemas/graph.yaml#/$defs/endpoint-base</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='ctx'>             unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>             properties:</div><div class='hunk'>@@ -106,7 +106,6 @@ properties:</div><div class='ctx'>                     description:</div><div class='ctx'>                       If you have 1 logical lane the bridge supports routing</div><div class='ctx'>                       to either port 0 or port 1.  Port 0 is suggested.</div><div class='del'>-                      See ../../media/video-interface.txt for details.</div><div class='ctx'> </div><div class='ctx'>                   - minItems: 2</div><div class='ctx'>                     maxItems: 2</div><div class='hunk'>@@ -118,7 +117,6 @@ properties:</div><div class='ctx'>                     description:</div><div class='ctx'>                       If you have 2 logical lanes the bridge supports</div><div class='ctx'>                       reordering but only on physical ports 0 and 1.</div><div class='del'>-                      See ../../media/video-interface.txt for details.</div><div class='ctx'> </div><div class='ctx'>                   - minItems: 4</div><div class='ctx'>                     maxItems: 4</div><div class='hunk'>@@ -132,7 +130,6 @@ properties:</div><div class='ctx'>                     description:</div><div class='ctx'>                       If you have 4 logical lanes the bridge supports</div><div class='ctx'>                       reordering in any way.</div><div class='del'>-                      See ../../media/video-interface.txt for details.</div><div class='ctx'> </div><div class='ctx'>               lane-polarities:</div><div class='ctx'>                 minItems: 1</div><div class='hunk'>@@ -141,7 +138,6 @@ properties:</div><div class='ctx'>                   enum:</div><div class='ctx'>                     - 0</div><div class='ctx'>                     - 1</div><div class='del'>-                description: See ../../media/video-interface.txt</div><div class='ctx'> </div><div class='ctx'>             dependencies:</div><div class='ctx'>               lane-polarities: [data-lanes]</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml<br/>index 5216c27fc0ad..81ca3cbc7abe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml</a></div><div class='hunk'>@@ -39,7 +39,6 @@ properties:</div><div class='ctx'>           Video port for MIPI DPI output (panel or connector).</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='del'>-      - port@0</div><div class='ctx'>       - port@1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -52,7 +51,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt<br/>deleted file mode 100644<br/>index 8f9abf28a8fa..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-TC358764 MIPI-DSI to LVDS panel bridge</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: "toshiba,tc358764"</div><div class='del'>-  - reg: the virtual channel number of a DSI peripheral</div><div class='del'>-  - vddc-supply: core voltage supply, 1.2V</div><div class='del'>-  - vddio-supply: I/O voltage supply, 1.8V or 3.3V</div><div class='del'>-  - vddlvds-supply: LVDS1/2 voltage supply, 3.3V</div><div class='del'>-  - reset-gpios: a GPIO spec for the reset pin</div><div class='del'>-</div><div class='del'>-The device node can contain following 'port' child nodes,</div><div class='del'>-according to the OF graph bindings defined in [1]:</div><div class='del'>-  0: DSI Input, not required, if the bridge is DSI controlled</div><div class='del'>-  1: LVDS Output, mandatory</div><div class='del'>-</div><div class='del'>-[1]: Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	bridge@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		compatible = "toshiba,tc358764";</div><div class='del'>-		vddc-supply = &lt;&amp;vcc_1v2_reg&gt;;</div><div class='del'>-		vddio-supply = &lt;&amp;vcc_1v8_reg&gt;;</div><div class='del'>-		vddlvds-supply = &lt;&amp;vcc_3v3_reg&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpd1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		port@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			lvds_ep: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;panel_ep&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.yaml<br/>new file mode 100644<br/>index 000000000000..866607400514<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358764.yaml</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358764.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Toshiba TC358764 MIPI-DSI to LVDS bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrzej Hajda &lt;andrzej.hajda@intel.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: toshiba,tc358764</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: Virtual channel number of a DSI peripheral</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vddc-supply:</div><div class='add'>+    description: Core voltage supply, 1.2V</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: I/O voltage supply, 1.8V or 3.3V</div><div class='add'>+</div><div class='add'>+  vddlvds-supply:</div><div class='add'>+    description: LVDS1/2 voltage supply, 3.3V</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Video port for MIPI DSI input, if the bridge DSI controlled</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Video port for LVDS output (panel or connector).</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - vddc-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vddlvds-supply</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        bridge@0 {</div><div class='add'>+            compatible = "toshiba,tc358764";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpd1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vddc-supply = &lt;&amp;vcc_1v2_reg&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vcc_1v8_reg&gt;;</div><div class='add'>+            vddlvds-supply = &lt;&amp;vcc_3v3_reg&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    lvds_ep: endpoint {</div><div class='add'>+                      remote-endpoint = &lt;&amp;panel_ep&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml<br/>index f1541cc05297..e1494b5007cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358767.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Toshiba TC358767 eDP bridge bindings</div><div class='add'>+title: Toshiba TC358767 eDP bridge</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andrey Gusakov &lt;andrey.gusakov@cogentembedded.com&gt;</div><div class='hunk'>@@ -23,7 +23,7 @@ properties:</div><div class='ctx'>         i2c address of the bridge, 0x68 or 0x0f, depending on bootstrap pins</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    const: "ref"</div><div class='add'>+    const: ref</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -53,16 +53,32 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>             DSI input port. The remote endpoint phandle should be a</div><div class='ctx'>             reference to a valid DSI output endpoint node</div><div class='ctx'> </div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description: array of physical DSI data lane indexes.</div><div class='add'>+                minItems: 1</div><div class='add'>+                items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='ctx'>       port@1:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>         description: |</div><div class='del'>-            DPI input port. The remote endpoint phandle should be a</div><div class='del'>-            reference to a valid DPI output endpoint node</div><div class='add'>+            DPI input/output port. The remote endpoint phandle should be a</div><div class='add'>+            reference to a valid DPI output or input endpoint node.</div><div class='ctx'> </div><div class='ctx'>       port@2:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/properties/port</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml<br/>index 3bd670b8e5cd..779d8c57f854 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358768.yaml</a></div><div class='hunk'>@@ -58,6 +58,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>             properties:</div><div class='ctx'>               data-lines:</div><div class='add'>+                $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>                 enum: [ 16, 18, 24 ]</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='hunk'>@@ -86,7 +87,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml<br/>index 10471c6c1ff9..d879c700594a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Toshiba TC358775 DSI to LVDS bridge bindings</div><div class='add'>+title: Toshiba TC358775 DSI to LVDS bridge</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinay Simha BN &lt;simhavcs@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/dp-aux-bus.yaml b/Documentation/devicetree/bindings/display/dp-aux-bus.yaml<br/>index 5e4afe9f98fb..0ece7b01790b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/dp-aux-bus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/dp-aux-bus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/dp-aux-bus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/dp-aux-bus.yaml</a></div><div class='hunk'>@@ -26,7 +26,7 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='del'>-    const: "aux-bus"</div><div class='add'>+    const: aux-bus</div><div class='ctx'> </div><div class='ctx'>   panel:</div><div class='ctx'>     $ref: panel/panel-common.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/dsi-controller.yaml b/Documentation/devicetree/bindings/display/dsi-controller.yaml<br/>index ca21671f6bdd..67ce10307ee0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/dsi-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/dsi-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/dsi-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/dsi-controller.yaml</a></div><div class='hunk'>@@ -30,6 +30,15 @@ properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     pattern: "^dsi(@.*)?$"</div><div class='ctx'> </div><div class='add'>+  clock-master:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Should be enabled if the host is being used in conjunction with</div><div class='add'>+      another DSI host to drive the same peripheral. Hardware supporting</div><div class='add'>+      such a configuration generally requires the data on both the busses</div><div class='add'>+      to be driven by the same clock. Only the DSI host instance</div><div class='add'>+      controlling this clock should contain this property.</div><div class='add'>+</div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -52,15 +61,6 @@ patternProperties:</div><div class='ctx'>           case the reg property can take multiple entries, one for each virtual</div><div class='ctx'>           channel that the peripheral responds to.</div><div class='ctx'> </div><div class='del'>-      clock-master:</div><div class='del'>-        type: boolean</div><div class='del'>-        description:</div><div class='del'>-          Should be enabled if the host is being used in conjunction with</div><div class='del'>-          another DSI host to drive the same peripheral. Hardware supporting</div><div class='del'>-          such a configuration generally requires the data on both the busses</div><div class='del'>-          to be driven by the same clock. Only the DSI host instance</div><div class='del'>-          controlling this clock should contain this property.</div><div class='del'>-</div><div class='ctx'>       enforce-video-mode:</div><div class='ctx'>         type: boolean</div><div class='ctx'>         description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt b/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt<br/>index 9b6cba3f82af..3a401590320f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/exynos/exynos_dp.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/exynos/exynos_dp.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/exynos/exynos_dp.txt</a></div><div class='hunk'>@@ -50,7 +50,7 @@ Optional properties for dp-controller:</div><div class='ctx'> 		Documentation/devicetree/bindings/display/panel/display-timing.txt</div><div class='ctx'> </div><div class='ctx'> For the below properties, please refer to Analogix DP binding document:</div><div class='del'>- * Documentation/devicetree/bindings/display/bridge/analogix_dp.txt</div><div class='add'>+ * Documentation/devicetree/bindings/display/bridge/analogix,dp.yaml</div><div class='ctx'> 	-phys (required)</div><div class='ctx'> 	-phy-names (required)</div><div class='ctx'> 	-hpd-gpios (optional)</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt b/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt<br/>deleted file mode 100644<br/>index be377786e8cd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/exynos/exynos_dsim.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,90 +0,0 @@</div><div class='del'>-Exynos MIPI DSI Master</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: value should be one of the following</div><div class='del'>-		"samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */</div><div class='del'>-		"samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */</div><div class='del'>-		"samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */</div><div class='del'>-		"samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */</div><div class='del'>-		"samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */</div><div class='del'>-  - reg: physical base address and length of the registers set for the device</div><div class='del'>-  - interrupts: should contain DSI interrupt</div><div class='del'>-  - clocks: list of clock specifiers, must contain an entry for each required</div><div class='del'>-    entry in clock-names</div><div class='del'>-  - clock-names: should include "bus_clk"and "sclk_mipi" entries</div><div class='del'>-		 the use of "pll_clk" is deprecated</div><div class='del'>-  - phys: list of phy specifiers, must contain an entry for each required</div><div class='del'>-    entry in phy-names</div><div class='del'>-  - phy-names: should include "dsim" entry</div><div class='del'>-  - vddcore-supply: MIPI DSIM Core voltage supply (e.g. 1.1V)</div><div class='del'>-  - vddio-supply: MIPI DSIM I/O and PLL voltage supply (e.g. 1.8V)</div><div class='del'>-  - samsung,pll-clock-frequency: specifies frequency of the oscillator clock</div><div class='del'>-  - #address-cells, #size-cells: should be set respectively to &lt;1&gt; and &lt;0&gt;</div><div class='del'>-    according to DSI host bindings (see MIPI DSI bindings [1])</div><div class='del'>-  - samsung,burst-clock-frequency: specifies DSI frequency in high-speed burst</div><div class='del'>-    mode</div><div class='del'>-  - samsung,esc-clock-frequency: specifies DSI frequency in escape mode</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - power-domains: a phandle to DSIM power domain node</div><div class='del'>-</div><div class='del'>-Child nodes:</div><div class='del'>-  Should contain DSI peripheral nodes (see MIPI DSI bindings [1]).</div><div class='del'>-</div><div class='del'>-Video interfaces:</div><div class='del'>-  Device node can contain following video interface port nodes according to [2]:</div><div class='del'>-  0: RGB input,</div><div class='del'>-  1: DSI output</div><div class='del'>-</div><div class='del'>-[1]: Documentation/devicetree/bindings/display/mipi-dsi-bus.txt</div><div class='del'>-[2]: Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	dsi@11c80000 {</div><div class='del'>-		compatible = "samsung,exynos4210-mipi-dsi";</div><div class='del'>-		reg = &lt;0x11C80000 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;0 79 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock 286&gt;, &lt;&amp;clock 143&gt;;</div><div class='del'>-		clock-names = "bus_clk", "sclk_mipi";</div><div class='del'>-		phys = &lt;&amp;mipi_phy 1&gt;;</div><div class='del'>-		phy-names = "dsim";</div><div class='del'>-		vddcore-supply = &lt;&amp;vusb_reg&gt;;</div><div class='del'>-		vddio-supply = &lt;&amp;vmipi_reg&gt;;</div><div class='del'>-		power-domains = &lt;&amp;pd_lcd0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		samsung,pll-clock-frequency = &lt;24000000&gt;;</div><div class='del'>-</div><div class='del'>-		panel@1 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			...</div><div class='del'>-			port {</div><div class='del'>-				panel_ep: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;dsi_ep&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				decon_to_mic: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;mic_to_decon&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				dsi_ep: endpoint {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					samsung,burst-clock-frequency = &lt;500000000&gt;;</div><div class='del'>-					samsung,esc-clock-frequency = &lt;20000000&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;panel_ep&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml b/Documentation/devicetree/bindings/display/fsl,lcdif.yaml<br/>index 900a56cae80e..75b4efd70ba8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/fsl,lcdif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/fsl,lcdif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/fsl,lcdif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/fsl,lcdif.yaml</a></div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>           - fsl,imx23-lcdif</div><div class='ctx'>           - fsl,imx28-lcdif</div><div class='ctx'>           - fsl,imx6sx-lcdif</div><div class='add'>+          - fsl,imx8mp-lcdif</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx6sl-lcdif</div><div class='hunk'>@@ -51,6 +52,9 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   port:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>     description: The LCDIF output port</div><div class='hunk'>@@ -80,12 +84,48 @@ allOf:</div><div class='ctx'>           maxItems: 3</div><div class='ctx'>       required:</div><div class='ctx'>         - clock-names</div><div class='del'>-    else:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8mp-lcdif</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - fsl,imx6sx-lcdif</div><div class='add'>+                - fsl,imx8mp-lcdif</div><div class='add'>+    then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           maxItems: 1</div><div class='ctx'>         clock-names:</div><div class='ctx'>           maxItems: 1</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx6sl-lcdif</div><div class='add'>+              - fsl,imx6sx-lcdif</div><div class='add'>+              - fsl,imx8mm-lcdif</div><div class='add'>+              - fsl,imx8mn-lcdif</div><div class='add'>+              - fsl,imx8mp-lcdif</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -100,6 +140,7 @@ examples:</div><div class='ctx'>                  &lt;&amp;clks IMX6SX_CLK_LCDIF_APB&gt;,</div><div class='ctx'>                  &lt;&amp;clks IMX6SX_CLK_DISPLAY_AXI&gt;;</div><div class='ctx'>         clock-names = "pix", "axi", "disp_axi";</div><div class='add'>+        power-domains = &lt;&amp;pd_disp&gt;;</div><div class='ctx'> </div><div class='ctx'>         port {</div><div class='ctx'>             endpoint {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/ilitek,ili9341.txt b/Documentation/devicetree/bindings/display/ilitek,ili9341.txt<br/>deleted file mode 100644<br/>index 169b32e4ee4e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ilitek,ili9341.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ilitek,ili9341.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-Ilitek ILI9341 display panels</div><div class='del'>-</div><div class='del'>-This binding is for display panels using an Ilitek ILI9341 controller in SPI</div><div class='del'>-mode.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:	"adafruit,yx240qv29", "ilitek,ili9341"</div><div class='del'>-- dc-gpios:	D/C pin</div><div class='del'>-- reset-gpios:	Reset pin</div><div class='del'>-</div><div class='del'>-The node for this driver must be a child node of a SPI controller, hence</div><div class='del'>-all mandatory properties described in ../spi/spi-bus.txt must be specified.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- rotation:	panel rotation in degrees counter clockwise (0,90,180,270)</div><div class='del'>-- backlight:	phandle of the backlight device attached to the panel</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	display@0{</div><div class='del'>-		compatible = "adafruit,yx240qv29", "ilitek,ili9341";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;32000000&gt;;</div><div class='del'>-		dc-gpios = &lt;&amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio0 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		rotation = &lt;270&gt;;</div><div class='del'>-		backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml b/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml<br/>index aecff34f505d..1f8f2182e2f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ilitek,ili9486.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ilitek,ili9486.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/ilitek,ili9486.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/ilitek,ili9486.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ilitek ILI9486 display panels device tree bindings</div><div class='add'>+title: Ilitek ILI9486 display panels</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kamlesh Gurudasani &lt;kamlesh.gurudasani@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt b/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt<br/>deleted file mode 100644<br/>index f4df9e83bcd2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/imx/fsl,imx-fb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,57 +0,0 @@</div><div class='del'>-Freescale imx21 Framebuffer</div><div class='del'>-</div><div class='del'>-This framebuffer driver supports devices imx1, imx21, imx25, and imx27.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "fsl,&lt;chip&gt;-fb", chip should be imx1 or imx21</div><div class='del'>-- reg : Should contain 1 register ranges(address and length)</div><div class='del'>-- interrupts : One interrupt of the fb dev</div><div class='del'>-</div><div class='del'>-Required nodes:</div><div class='del'>-- display: Phandle to a display node as described in</div><div class='del'>-	Documentation/devicetree/bindings/display/panel/display-timing.txt</div><div class='del'>-	Additional, the display node has to define properties:</div><div class='del'>-	- bits-per-pixel: Bits per pixel</div><div class='del'>-	- fsl,pcr: LCDC PCR value</div><div class='del'>-	A display node may optionally define</div><div class='del'>-	- fsl,aus-mode: boolean to enable AUS mode (only for imx21)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- lcd-supply: Regulator for LCD supply voltage.</div><div class='del'>-- fsl,dmacr: DMA Control Register value. This is optional. By default, the</div><div class='del'>-	register is not modified as recommended by the datasheet.</div><div class='del'>-- fsl,lpccr: Contrast Control Register value. This property provides the</div><div class='del'>-	default value for the contrast control register.</div><div class='del'>-	If that property is omitted, the register is zeroed.</div><div class='del'>-- fsl,lscr1: LCDC Sharp Configuration Register value.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	imxfb: fb@10021000 {</div><div class='del'>-		compatible = "fsl,imx21-fb";</div><div class='del'>-		interrupts = &lt;61&gt;;</div><div class='del'>-		reg = &lt;0x10021000 0x1000&gt;;</div><div class='del'>-		display = &lt;&amp;display0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	display0: display0 {</div><div class='del'>-		model = "Primeview-PD050VL1";</div><div class='del'>-		bits-per-pixel = &lt;16&gt;;</div><div class='del'>-		fsl,pcr = &lt;0xf0c88080&gt;;	/* non-standard but required */</div><div class='del'>-		display-timings {</div><div class='del'>-			native-mode = &lt;&amp;timing_disp0&gt;;</div><div class='del'>-			timing_disp0: 640x480 {</div><div class='del'>-				hactive = &lt;640&gt;;</div><div class='del'>-				vactive = &lt;480&gt;;</div><div class='del'>-				hback-porch = &lt;112&gt;;</div><div class='del'>-				hfront-porch = &lt;36&gt;;</div><div class='del'>-				hsync-len = &lt;32&gt;;</div><div class='del'>-				vback-porch = &lt;33&gt;;</div><div class='del'>-				vfront-porch = &lt;33&gt;;</div><div class='del'>-				vsync-len = &lt;2&gt;;</div><div class='del'>-				clock-frequency = &lt;25000000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx-lcdc.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx-lcdc.yaml<br/>new file mode 100644<br/>index 000000000000..c2b29622bceb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/imx/fsl,imx-lcdc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/imx/fsl,imx-lcdc.yaml</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/fsl,imx-lcdc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX LCD Controller, found on i.MX1, i.MX21, i.MX25 and i.MX27</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sascha Hauer &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+  - Pengutronix Kernel Team &lt;kernel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx1-fb</div><div class='add'>+          - fsl,imx21-fb</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx25-fb</div><div class='add'>+              - fsl,imx27-fb</div><div class='add'>+          - const: fsl,imx21-fb</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx25-lcdc</div><div class='add'>+          - const: fsl,imx21-lcdc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg</div><div class='add'>+      - const: ahb</div><div class='add'>+      - const: per</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+  display:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  lcd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Regulator for LCD supply voltage.</div><div class='add'>+</div><div class='add'>+  fsl,dmacr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Override value for DMA Control Register</div><div class='add'>+</div><div class='add'>+  fsl,lpccr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Contrast Control Register value.</div><div class='add'>+</div><div class='add'>+  fsl,lscr1:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      LCDC Sharp Configuration Register value.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx1-lcdc</div><div class='add'>+              - fsl,imx21-lcdc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        display: false</div><div class='add'>+        fsl,dmacr: false</div><div class='add'>+        fsl,lpccr: false</div><div class='add'>+        fsl,lscr1: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - port</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        port: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - display</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    lcdc@53fbc000 {</div><div class='add'>+        compatible = "fsl,imx25-lcdc", "fsl,imx21-lcdc";</div><div class='add'>+        reg = &lt;0x53fbc000 0x4000&gt;;</div><div class='add'>+        interrupts = &lt;39&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks 103&gt;, &lt;&amp;clks 66&gt;, &lt;&amp;clks 49&gt;;</div><div class='add'>+        clock-names = "ipg", "ahb", "per";</div><div class='add'>+</div><div class='add'>+        port {</div><div class='add'>+            parallel_out: endpoint {</div><div class='add'>+              remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    imxfb: fb@10021000 {</div><div class='add'>+        compatible = "fsl,imx21-fb";</div><div class='add'>+        interrupts = &lt;61&gt;;</div><div class='add'>+        reg = &lt;0x10021000 0x1000&gt;;</div><div class='add'>+        display = &lt;&amp;display0&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks 103&gt;, &lt;&amp;clks 49&gt;, &lt;&amp;clks 66&gt;;</div><div class='add'>+        clock-names = "ipg", "ahb", "per";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    display0: display0 {</div><div class='add'>+        model = "Primeview-PD050VL1";</div><div class='add'>+        bits-per-pixel = &lt;16&gt;;</div><div class='add'>+        fsl,pcr = &lt;0xf0c88080&gt;; /* non-standard but required */</div><div class='add'>+</div><div class='add'>+        display-timings {</div><div class='add'>+            native-mode = &lt;&amp;timing_disp0&gt;;</div><div class='add'>+            timing_disp0: timing0 {</div><div class='add'>+                hactive = &lt;640&gt;;</div><div class='add'>+                vactive = &lt;480&gt;;</div><div class='add'>+                hback-porch = &lt;112&gt;;</div><div class='add'>+                hfront-porch = &lt;36&gt;;</div><div class='add'>+                hsync-len = &lt;32&gt;;</div><div class='add'>+                vback-porch = &lt;33&gt;;</div><div class='add'>+                vfront-porch = &lt;33&gt;;</div><div class='add'>+                vsync-len = &lt;2&gt;;</div><div class='add'>+                clock-frequency = &lt;25000000&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml<br/>index 0091df9dd73b..4ae6328cde64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 NXP</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: iMX8MQ Display Controller Subsystem (DCSS)</div><div class='ctx'> </div><div class='hunk'>@@ -105,4 +105,3 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/ingenic,ipu.yaml b/Documentation/devicetree/bindings/display/ingenic,ipu.yaml<br/>index 3f93def2c5a2..319bd7c88fe3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ingenic,ipu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ingenic,ipu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ingenic,ipu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/ingenic,ipu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/ingenic,ipu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs Image Processing Unit (IPU) devicetree bindings</div><div class='add'>+title: Ingenic SoCs Image Processing Unit (IPU)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/ingenic,lcd.yaml b/Documentation/devicetree/bindings/display/ingenic,lcd.yaml<br/>index 0049010b37ca..6d4c00f3fcc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ingenic,lcd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ingenic,lcd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ingenic,lcd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/ingenic,lcd.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs LCD controller devicetree bindings</div><div class='add'>+title: Ingenic SoCs LCD controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='hunk'>@@ -17,6 +17,8 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - ingenic,jz4740-lcd</div><div class='ctx'>       - ingenic,jz4725b-lcd</div><div class='add'>+      - ingenic,jz4760-lcd</div><div class='add'>+      - ingenic,jz4760b-lcd</div><div class='ctx'>       - ingenic,jz4770-lcd</div><div class='ctx'>       - ingenic,jz4780-lcd</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/intel,keembay-display.yaml b/Documentation/devicetree/bindings/display/intel,keembay-display.yaml<br/>index bc6622b010ca..2cf54ecc707a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/intel,keembay-display.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/intel,keembay-display.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/intel,keembay-display.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/intel,keembay-display.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/intel,keembay-display.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Devicetree bindings for Intel Keem Bay display controller</div><div class='add'>+title: Intel Keem Bay display controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml b/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml<br/>index a222b52d8b8f..cc7e1f318fe4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/intel,keembay-msscam.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/intel,keembay-msscam.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Devicetree bindings for Intel Keem Bay MSSCAM</div><div class='add'>+title: Intel Keem Bay MSSCAM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anitha Chrisanthus &lt;anitha.chrisanthus@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml<br/>index 61f0ed1e388f..92741486c24d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml</a></div><div class='hunk'>@@ -21,16 +21,20 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8173-disp-aal</div><div class='add'>+          - mediatek,mt8183-disp-aal</div><div class='ctx'>       - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2712-disp-aal</div><div class='ctx'>           - const: mediatek,mt8173-disp-aal</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - mediatek,mt2712-disp-aal</div><div class='del'>-              - mediatek,mt8183-disp-aal</div><div class='add'>+              - mediatek,mt8186-disp-aal</div><div class='add'>+              - mediatek,mt8188-disp-aal</div><div class='ctx'>               - mediatek,mt8192-disp-aal</div><div class='ctx'>               - mediatek,mt8195-disp-aal</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt8173-disp-aal</div><div class='add'>+          - const: mediatek,mt8183-disp-aal</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml<br/>index 0ed53b6238f0..8c2a737237f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml</a></div><div class='hunk'>@@ -21,15 +21,15 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8183-disp-ccorr</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8192-disp-ccorr</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8183-disp-ccorr</div><div class='add'>+          - mediatek,mt8192-disp-ccorr</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8186-disp-ccorr</div><div class='add'>+              - mediatek,mt8188-disp-ccorr</div><div class='ctx'>               - mediatek,mt8195-disp-ccorr</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt8192-disp-ccorr</div><div class='add'>+          - const: mediatek,mt8192-disp-ccorr</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml<br/>index 66288b9f0aa6..080cf321209e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,cec.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/mediatek/mediatek,cec.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek HDMI CEC Controller Device Tree Bindings</div><div class='add'>+title: Mediatek HDMI CEC Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - CK Hu &lt;ck.hu@mediatek.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml<br/>index 3ad842eb5668..d0ea77fc4b06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml</a></div><div class='hunk'>@@ -22,25 +22,23 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt2701-disp-color</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8167-disp-color</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-color</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2701-disp-color</div><div class='add'>+          - mediatek,mt8167-disp-color</div><div class='add'>+          - mediatek,mt8173-disp-color</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt7623-disp-color</div><div class='ctx'>               - mediatek,mt2712-disp-color</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt2701-disp-color</div><div class='add'>+          - const: mediatek,mt2701-disp-color</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt8183-disp-color</div><div class='add'>+              - mediatek,mt8186-disp-color</div><div class='add'>+              - mediatek,mt8188-disp-color</div><div class='ctx'>               - mediatek,mt8192-disp-color</div><div class='ctx'>               - mediatek,mt8195-disp-color</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt8173-disp-color</div><div class='add'>+          - const: mediatek,mt8173-disp-color</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml<br/>index 6657549af165..1588b3f7cec7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml</a></div><div class='hunk'>@@ -22,14 +22,15 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8183-disp-dither</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8183-disp-dither</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8186-disp-dither</div><div class='add'>+              - mediatek,mt8188-disp-dither</div><div class='ctx'>               - mediatek,mt8192-disp-dither</div><div class='ctx'>               - mediatek,mt8195-disp-dither</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt8183-disp-dither</div><div class='add'>+          - const: mediatek,mt8183-disp-dither</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml<br/>new file mode 100644<br/>index 000000000000..ff781f2174a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Display Port Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;</div><div class='add'>+  - Jitao shi &lt;jitao.shi@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek DP and eDP are different hardwares and there are some features</div><div class='add'>+  which are not supported for eDP. For example, audio is not supported for</div><div class='add'>+  eDP. Therefore, we need to use two different compatibles to describe them.</div><div class='add'>+  In addition, We just need to enable the power domain of DP, so the clock</div><div class='add'>+  of DP is generated by itself and we are not using other PLL to generate</div><div class='add'>+  clocks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8195-dp-tx</div><div class='add'>+      - mediatek,mt8195-edp-tx</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvmem-cells:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: efuse data for display port calibration</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    const: dp_calibration_data</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Input endpoint of the controller, usually dp_intf</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: Output endpoint of the controller</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description: |</div><div class='add'>+                  number of lanes supported by the hardware.</div><div class='add'>+                  The possible values:</div><div class='add'>+                  0       - For 1 lane enabled in IP.</div><div class='add'>+                  0 1     - For 2 lanes enabled in IP.</div><div class='add'>+                  0 1 2 3 - For 4 lanes enabled in IP.</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+  max-linkrate-mhz:</div><div class='add'>+    enum: [ 1620, 2700, 5400, 8100 ]</div><div class='add'>+    description: maximum link rate supported by the hardware.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - ports</div><div class='add'>+  - max-linkrate-mhz</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8195-power.h&gt;</div><div class='add'>+    dptx@1c600000 {</div><div class='add'>+        compatible = "mediatek,mt8195-dp-tx";</div><div class='add'>+        reg = &lt;0x1c600000 0x8000&gt;;</div><div class='add'>+        power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_DP_TX&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+        max-linkrate-mhz = &lt;8100&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                dptx_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dp_intf0_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                dptx_out: endpoint {</div><div class='add'>+                    data-lanes = &lt;0 1 2 3&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml<br/>index 843f89d6053f..d976380801e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml</a></div><div class='hunk'>@@ -4,16 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: mediatek DPI Controller Device Tree Bindings</div><div class='add'>+title: MediaTek DPI and DP_INTF Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - CK Hu &lt;ck.hu@mediatek.com&gt;</div><div class='ctx'>   - Jitao shi &lt;jitao.shi@mediatek.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  The Mediatek DPI function block is a sink of the display subsystem and</div><div class='del'>-  provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel</div><div class='del'>-  output bus.</div><div class='add'>+  The MediaTek DPI and DP_INTF function blocks are a sink of the display</div><div class='add'>+  subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a</div><div class='add'>+  parallel output bus.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -22,7 +22,10 @@ properties:</div><div class='ctx'>       - mediatek,mt7623-dpi</div><div class='ctx'>       - mediatek,mt8173-dpi</div><div class='ctx'>       - mediatek,mt8183-dpi</div><div class='add'>+      - mediatek,mt8186-dpi</div><div class='add'>+      - mediatek,mt8188-dp-intf</div><div class='ctx'>       - mediatek,mt8192-dpi</div><div class='add'>+      - mediatek,mt8195-dp-intf</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -54,7 +57,7 @@ properties:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>     description:</div><div class='ctx'>       Output port node. This port should be connected to the input port of an</div><div class='del'>-      attached HDMI or LVDS encoder chip.</div><div class='add'>+      attached HDMI, LVDS or DisplayPort encoder chip.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml<br/>index 49248864514b..2cbdd9ee449d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml</a></div><div class='hunk'>@@ -20,8 +20,8 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8195-disp-dsc</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8195-disp-dsc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt<br/>deleted file mode 100644<br/>index 36b01458f45c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-Mediatek DSI Device</div><div class='del'>-===================</div><div class='del'>-</div><div class='del'>-The Mediatek DSI function block is a sink of the display subsystem and can</div><div class='del'>-drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-</div><div class='del'>-channel output.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "mediatek,&lt;chip&gt;-dsi"</div><div class='del'>-- the supported chips are mt2701, mt7623, mt8167, mt8173 and mt8183.</div><div class='del'>-- reg: Physical base address and length of the controller's registers</div><div class='del'>-- interrupts: The interrupt signal from the function block.</div><div class='del'>-- clocks: device clocks</div><div class='del'>-  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.</div><div class='del'>-- clock-names: must contain "engine", "digital", and "hs"</div><div class='del'>-- phys: phandle link to the MIPI D-PHY controller.</div><div class='del'>-- phy-names: must contain "dphy"</div><div class='del'>-- port: Output port node with endpoint definitions as described in</div><div class='del'>-  Documentation/devicetree/bindings/graph.txt. This port should be connected</div><div class='del'>-  to the input port of an attached DSI panel or DSI-to-eDP encoder chip.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- resets: list of phandle + reset specifier pair, as described in [1].</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/reset/reset.txt</div><div class='del'>-</div><div class='del'>-MIPI TX Configuration Module</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-See phy/mediatek,dsi-phy.yaml</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-mipi_tx0: mipi-dphy@10215000 {</div><div class='del'>-	compatible = "mediatek,mt8173-mipi-tx";</div><div class='del'>-	reg = &lt;0 0x10215000 0 0x1000&gt;;</div><div class='del'>-	clocks = &lt;&amp;clk26m&gt;;</div><div class='del'>-	clock-output-names = "mipi_tx0_pll";</div><div class='del'>-	#clock-cells = &lt;0&gt;;</div><div class='del'>-	#phy-cells = &lt;0&gt;;</div><div class='del'>-	drive-strength-microamp = &lt;4600&gt;;</div><div class='del'>-	nvmem-cells= &lt;&amp;mipi_tx_calibration&gt;;</div><div class='del'>-	nvmem-cell-names = "calibration-data";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-dsi0: dsi@1401b000 {</div><div class='del'>-	compatible = "mediatek,mt8173-dsi";</div><div class='del'>-	reg = &lt;0 0x1401b000 0 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 192 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-	clocks = &lt;&amp;mmsys MM_DSI0_ENGINE&gt;, &lt;&amp;mmsys MM_DSI0_DIGITAL&gt;,</div><div class='del'>-		 &lt;&amp;mipi_tx0&gt;;</div><div class='del'>-	clock-names = "engine", "digital", "hs";</div><div class='del'>-	resets = &lt;&amp;mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0&gt;;</div><div class='del'>-	phys = &lt;&amp;mipi_tx0&gt;;</div><div class='del'>-	phy-names = "dphy";</div><div class='del'>-</div><div class='del'>-	port {</div><div class='del'>-		dsi0_out: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml<br/>new file mode 100644<br/>index 000000000000..4707b60238b0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,dsi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek DSI Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;</div><div class='add'>+  - Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</div><div class='add'>+  - Jitao Shi &lt;jitao.shi@mediatek.com&gt;</div><div class='add'>+  - Xinlei Lee &lt;xinlei.lee@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MediaTek DSI function block is a sink of the display subsystem and can</div><div class='add'>+  drive up to 4-lane MIPI DSI output. Two DSIs can be synchronized for dual-</div><div class='add'>+  channel output.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/display/dsi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt2701-dsi</div><div class='add'>+      - mediatek,mt7623-dsi</div><div class='add'>+      - mediatek,mt8167-dsi</div><div class='add'>+      - mediatek,mt8173-dsi</div><div class='add'>+      - mediatek,mt8183-dsi</div><div class='add'>+      - mediatek,mt8186-dsi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Engine Clock</div><div class='add'>+      - description: Digital Clock</div><div class='add'>+      - description: HS Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: engine</div><div class='add'>+      - const: digital</div><div class='add'>+      - const: hs</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dphy</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    description:</div><div class='add'>+      Output port node. This port should be connected to the input</div><div class='add'>+      port of an attached DSI panel or DSI-to-eDP encoder chip.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8183-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/phy/phy.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt8183-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        dsi0: dsi@14014000 {</div><div class='add'>+            compatible = "mediatek,mt8183-dsi";</div><div class='add'>+            reg = &lt;0 0x14014000 0 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 236 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+            clocks = &lt;&amp;mmsys CLK_MM_DSI0_MM&gt;,</div><div class='add'>+                &lt;&amp;mmsys CLK_MM_DSI0_IF&gt;,</div><div class='add'>+                &lt;&amp;mipi_tx0&gt;;</div><div class='add'>+            clock-names = "engine", "digital", "hs";</div><div class='add'>+            resets = &lt;&amp;mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0&gt;;</div><div class='add'>+            phys = &lt;&amp;mipi_tx0&gt;;</div><div class='add'>+            phy-names = "dphy";</div><div class='add'>+            port {</div><div class='add'>+                dsi0_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;panel_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml<br/>new file mode 100644<br/>index 000000000000..801fa66ae615<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,ethdr.yaml</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,ethdr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Ethdr Device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;</div><div class='add'>+  - Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  ETHDR (ET High Dynamic Range) is a MediaTek internal HDR engine and is</div><div class='add'>+  designed for HDR video and graphics conversion in the external display path.</div><div class='add'>+  It handles multiple HDR input types and performs tone mapping, color</div><div class='add'>+  space/color format conversion, and then combine different layers,</div><div class='add'>+  output the required HDR or SDR signal to the subsequent display path.</div><div class='add'>+  This engine is composed of two video frontends, two graphic frontends,</div><div class='add'>+  one video backend and a mixer. ETHDR has two DMA function blocks, DS and ADL.</div><div class='add'>+  These two function blocks read the pre-programmed registers from DRAM and</div><div class='add'>+  set them to HW in the v-blanking period.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8195-disp-ethdr</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mixer</div><div class='add'>+      - const: vdo_fe0</div><div class='add'>+      - const: vdo_fe1</div><div class='add'>+      - const: gfx_fe0</div><div class='add'>+      - const: gfx_fe1</div><div class='add'>+      - const: vdo_be</div><div class='add'>+      - const: adl_ds</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: mixer clock</div><div class='add'>+      - description: video frontend 0 clock</div><div class='add'>+      - description: video frontend 1 clock</div><div class='add'>+      - description: graphic frontend 0 clock</div><div class='add'>+      - description: graphic frontend 1 clock</div><div class='add'>+      - description: video backend clock</div><div class='add'>+      - description: autodownload and menuload clock</div><div class='add'>+      - description: video frontend 0 async clock</div><div class='add'>+      - description: video frontend 1 async clock</div><div class='add'>+      - description: graphic frontend 0 async clock</div><div class='add'>+      - description: graphic frontend 1 async clock</div><div class='add'>+      - description: video backend async clock</div><div class='add'>+      - description: ethdr top clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mixer</div><div class='add'>+      - const: vdo_fe0</div><div class='add'>+      - const: vdo_fe1</div><div class='add'>+      - const: gfx_fe0</div><div class='add'>+      - const: gfx_fe1</div><div class='add'>+      - const: vdo_be</div><div class='add'>+      - const: adl_ds</div><div class='add'>+      - const: vdo_fe0_async</div><div class='add'>+      - const: vdo_fe1_async</div><div class='add'>+      - const: gfx_fe0_async</div><div class='add'>+      - const: gfx_fe1_async</div><div class='add'>+      - const: vdo_be_async</div><div class='add'>+      - const: ethdr_top</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: video frontend 0 async reset</div><div class='add'>+      - description: video frontend 1 async reset</div><div class='add'>+      - description: graphic frontend 0 async reset</div><div class='add'>+      - description: graphic frontend 1 async reset</div><div class='add'>+      - description: video backend async reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vdo_fe0_async</div><div class='add'>+      - const: vdo_fe1_async</div><div class='add'>+      - const: gfx_fe0_async</div><div class='add'>+      - const: gfx_fe1_async</div><div class='add'>+      - const: vdo_be_async</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='add'>+    description: The register of display function block to be set by gce.</div><div class='add'>+      There are 4 arguments in this property, gce node, subsys id, offset and</div><div class='add'>+      register size. The subsys id is defined in the gce header of each chips</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h, mapping to the register of display</div><div class='add'>+      function block.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - mediatek,gce-client-reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8195-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8195-gce.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/mt8195-memory-port.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8195-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt8195-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        hdr-engine@1c114000 {</div><div class='add'>+                compatible = "mediatek,mt8195-disp-ethdr";</div><div class='add'>+                reg = &lt;0 0x1c114000 0 0x1000&gt;,</div><div class='add'>+                      &lt;0 0x1c115000 0 0x1000&gt;,</div><div class='add'>+                      &lt;0 0x1c117000 0 0x1000&gt;,</div><div class='add'>+                      &lt;0 0x1c119000 0 0x1000&gt;,</div><div class='add'>+                      &lt;0 0x1c11a000 0 0x1000&gt;,</div><div class='add'>+                      &lt;0 0x1c11b000 0 0x1000&gt;,</div><div class='add'>+                      &lt;0 0x1c11c000 0 0x1000&gt;;</div><div class='add'>+                reg-names = "mixer", "vdo_fe0", "vdo_fe1", "gfx_fe0", "gfx_fe1",</div><div class='add'>+                            "vdo_be", "adl_ds";</div><div class='add'>+                mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c11XXXX 0x4000 0x1000&gt;,</div><div class='add'>+                                          &lt;&amp;gce0 SUBSYS_1c11XXXX 0x5000 0x1000&gt;,</div><div class='add'>+                                          &lt;&amp;gce0 SUBSYS_1c11XXXX 0x7000 0x1000&gt;,</div><div class='add'>+                                          &lt;&amp;gce0 SUBSYS_1c11XXXX 0x9000 0x1000&gt;,</div><div class='add'>+                                          &lt;&amp;gce0 SUBSYS_1c11XXXX 0xa000 0x1000&gt;,</div><div class='add'>+                                          &lt;&amp;gce0 SUBSYS_1c11XXXX 0xb000 0x1000&gt;,</div><div class='add'>+                                          &lt;&amp;gce0 SUBSYS_1c11XXXX 0xc000 0x1000&gt;;</div><div class='add'>+                clocks = &lt;&amp;vdosys1 CLK_VDO1_DISP_MIXER&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE0&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE1&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE0&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE1&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_BE&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_26M_SLOW&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE0_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_FE1_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE0_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_GFX_FE1_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 CLK_VDO1_HDR_VDO_BE_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;topckgen CLK_TOP_ETHDR&gt;;</div><div class='add'>+                clock-names = "mixer", "vdo_fe0", "vdo_fe1", "gfx_fe0", "gfx_fe1",</div><div class='add'>+                              "vdo_be", "adl_ds", "vdo_fe0_async", "vdo_fe1_async",</div><div class='add'>+                              "gfx_fe0_async", "gfx_fe1_async","vdo_be_async",</div><div class='add'>+                              "ethdr_top";</div><div class='add'>+                power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+                iommus = &lt;&amp;iommu_vpp M4U_PORT_L3_HDR_DS&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L3_HDR_ADL&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 517 IRQ_TYPE_LEVEL_HIGH 0&gt;; /* disp mixer */</div><div class='add'>+                resets = &lt;&amp;vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE0_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_FE1_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE0_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_GFX_FE1_DL_ASYNC&gt;,</div><div class='add'>+                         &lt;&amp;vdosys1 MT8195_VDOSYS1_SW1_RST_B_HDR_VDO_BE_DL_ASYNC&gt;;</div><div class='add'>+                reset-names = "vdo_fe0_async", "vdo_fe1_async", "gfx_fe0_async",</div><div class='add'>+                              "gfx_fe1_async", "vdo_be_async";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml<br/>index 78442339314f..6c2be9d6840b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml</a></div><div class='hunk'>@@ -21,16 +21,16 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-gamma</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8183-disp-gamma</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8173-disp-gamma</div><div class='add'>+          - mediatek,mt8183-disp-gamma</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8186-disp-gamma</div><div class='add'>+              - mediatek,mt8188-disp-gamma</div><div class='ctx'>               - mediatek,mt8192-disp-gamma</div><div class='ctx'>               - mediatek,mt8195-disp-gamma</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt8183-disp-gamma</div><div class='add'>+          - const: mediatek,mt8183-disp-gamma</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml<br/>index b6fcdfb99ab2..bd8f7b8ae0ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi-ddc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi-ddc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek HDMI DDC Device Tree Bindings</div><div class='add'>+title: Mediatek HDMI DDC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - CK Hu &lt;ck.hu@mediatek.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml<br/>index bdaf0b51e68c..b90b6d18a828 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/mediatek/mediatek,hdmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek HDMI Encoder Device Tree Bindings</div><div class='add'>+title: Mediatek HDMI Encoder</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - CK Hu &lt;ck.hu@mediatek.com&gt;</div><div class='hunk'>@@ -50,7 +50,7 @@ properties:</div><div class='ctx'>       - const: hdmi</div><div class='ctx'> </div><div class='ctx'>   mediatek,syscon-hdmi:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to system configuration registers</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml<br/>new file mode 100644<br/>index 000000000000..dd12e2ff685c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-rdma.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MDP RDMA</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;</div><div class='add'>+  - Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek MDP RDMA stands for Read Direct Memory Access.</div><div class='add'>+  It provides real time data to the back-end panel driver, such as DSI,</div><div class='add'>+  DPI and DP_INTF.</div><div class='add'>+  It contains one line buffer to store the sufficient pixel data.</div><div class='add'>+  RDMA device node must be siblings to the central MMSYS_CONFIG node.</div><div class='add'>+  For a description of the MMSYS_CONFIG binding, see</div><div class='add'>+  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8195-vdo1-rdma</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: RDMA Clock</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    description:</div><div class='add'>+      The register of display function block to be set by gce. There are 4 arguments,</div><div class='add'>+      such as gce node, subsys id, offset and register size. The subsys id that is</div><div class='add'>+      mapping to the register of display function blocks is defined in the gce header</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h of each chips.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle of GCE</div><div class='add'>+        - description: GCE subsys id</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: register size</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - iommus</div><div class='add'>+  - mediatek,gce-client-reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8195-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8195-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8195-gce.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/mt8195-memory-port.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        rdma@1c104000 {</div><div class='add'>+            compatible = "mediatek,mt8195-vdo1-rdma";</div><div class='add'>+            reg = &lt;0 0x1c104000 0 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+            clocks = &lt;&amp;vdosys1 CLK_VDO1_MDP_RDMA0&gt;;</div><div class='add'>+            power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDOSYS1&gt;;</div><div class='add'>+            iommus = &lt;&amp;iommu_vdo M4U_PORT_L2_MDP_RDMA0&gt;;</div><div class='add'>+            mediatek,gce-client-reg = &lt;&amp;gce0 SUBSYS_1c10XXXX 0x4000 0x1000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml<br/>index d635c5dcb68b..2f8e2f4dc3b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml</a></div><div class='hunk'>@@ -21,10 +21,9 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-merge</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8195-disp-merge</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8173-disp-merge</div><div class='add'>+          - mediatek,mt8195-disp-merge</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -102,4 +101,3 @@ examples:</div><div class='ctx'>             clock-names = "merge";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml<br/>index 853fcb9db2be..29f9fa8f8219 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml</a></div><div class='hunk'>@@ -21,10 +21,9 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt2712-disp-od</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-od</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2712-disp-od</div><div class='add'>+          - mediatek,mt8173-disp-od</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml<br/>index da999ba53b7c..c7dd0ef02dcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml</a></div><div class='hunk'>@@ -21,9 +21,12 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8183-disp-ovl-2l</div><div class='add'>+          - mediatek,mt8192-disp-ovl-2l</div><div class='ctx'>       - items:</div><div class='del'>-          - const: mediatek,mt8183-disp-ovl-2l</div><div class='del'>-      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8186-disp-ovl-2l</div><div class='ctx'>           - const: mediatek,mt8192-disp-ovl-2l</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml<br/>index f77094e61443..92e320d54ba2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml</a></div><div class='hunk'>@@ -21,25 +21,25 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt2701-disp-ovl</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-ovl</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8183-disp-ovl</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8192-disp-ovl</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2701-disp-ovl</div><div class='add'>+          - mediatek,mt8173-disp-ovl</div><div class='add'>+          - mediatek,mt8183-disp-ovl</div><div class='add'>+          - mediatek,mt8192-disp-ovl</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt7623-disp-ovl</div><div class='ctx'>               - mediatek,mt2712-disp-ovl</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt2701-disp-ovl</div><div class='add'>+          - const: mediatek,mt2701-disp-ovl</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8188-disp-ovl</div><div class='ctx'>               - mediatek,mt8195-disp-ovl</div><div class='add'>+          - const: mediatek,mt8183-disp-ovl</div><div class='add'>+      - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - mediatek,mt8183-disp-ovl</div><div class='add'>+              - mediatek,mt8186-disp-ovl</div><div class='add'>+          - const: mediatek,mt8192-disp-ovl</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml<br/>index 2d769422e29f..11fe32e50a59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,postmask.yaml</a></div><div class='hunk'>@@ -21,7 +21,12 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8192-disp-postmask</div><div class='ctx'>       - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8186-disp-postmask</div><div class='add'>+              - mediatek,mt8188-disp-postmask</div><div class='ctx'>           - const: mediatek,mt8192-disp-postmask</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml<br/>index e8c72afa0630..42059efad45d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml</a></div><div class='hunk'>@@ -23,25 +23,25 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2701-disp-rdma</div><div class='add'>+          - mediatek,mt8173-disp-rdma</div><div class='add'>+          - mediatek,mt8183-disp-rdma</div><div class='add'>+          - mediatek,mt8195-disp-rdma</div><div class='ctx'>       - items:</div><div class='del'>-          - const: mediatek,mt2701-disp-rdma</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-rdma</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8183-disp-rdma</div><div class='del'>-      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8188-disp-rdma</div><div class='ctx'>           - const: mediatek,mt8195-disp-rdma</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt7623-disp-rdma</div><div class='ctx'>               - mediatek,mt2712-disp-rdma</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt2701-disp-rdma</div><div class='add'>+          - const: mediatek,mt2701-disp-rdma</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8186-disp-rdma</div><div class='ctx'>               - mediatek,mt8192-disp-rdma</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt8183-disp-rdma</div><div class='add'>+          - const: mediatek,mt8183-disp-rdma</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml<br/>index 35ace1f322e8..21a4e96ecd93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml</a></div><div class='hunk'>@@ -21,8 +21,8 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-split</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8173-disp-split</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml<br/>index b8bb135fe96b..62fad23a26f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml</a></div><div class='hunk'>@@ -22,8 +22,8 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-ufoe</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8173-disp-ufoe</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml<br/>index 7d7cc1ab526b..991183165d29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml</a></div><div class='hunk'>@@ -21,8 +21,8 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-wdma</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8173-disp-wdma</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml<br/>index cd05cfd76536..f0c2237d5f82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dp-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dp-controller.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: MSM Display Port Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Kuogee Hsieh &lt;khsieh@codeaurora.org&gt;</div><div class='add'>+  - Kuogee Hsieh &lt;quic_khsieh@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Device tree bindings for DisplayPort host controller for MSM targets</div><div class='hunk'>@@ -15,15 +15,24 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,sc7180-dp</div><div class='del'>-      - qcom,sc7280-dp</div><div class='del'>-      - qcom,sc7280-edp</div><div class='del'>-      - qcom,sc8180x-dp</div><div class='del'>-      - qcom,sc8180x-edp</div><div class='del'>-      - qcom,sm8350-dp</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sc7180-dp</div><div class='add'>+          - qcom,sc7280-dp</div><div class='add'>+          - qcom,sc7280-edp</div><div class='add'>+          - qcom,sc8180x-dp</div><div class='add'>+          - qcom,sc8180x-edp</div><div class='add'>+          - qcom,sc8280xp-dp</div><div class='add'>+          - qcom,sc8280xp-edp</div><div class='add'>+          - qcom,sdm845-dp</div><div class='add'>+          - qcom,sm8350-dp</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sm8450-dp</div><div class='add'>+          - const: qcom,sm8350-dp</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='add'>+    minItems: 4</div><div class='ctx'>     items:</div><div class='ctx'>       - description: ahb register block</div><div class='ctx'>       - description: aux register block</div><div class='hunk'>@@ -67,15 +76,32 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: dp</div><div class='ctx'> </div><div class='del'>-  operating-points-v2:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  opp-table: true</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  aux-bus:</div><div class='add'>+    $ref: /schemas/display/dp-aux-bus.yaml#</div><div class='add'>+</div><div class='add'>+  data-lanes:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    deprecated: true</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      maximum: 3</div><div class='add'>+</div><div class='ctx'>   "#sound-dai-cells":</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  vdda-0p9-supply:</div><div class='add'>+    deprecated: true</div><div class='add'>+  vdda-1p2-supply:</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'>     properties:</div><div class='hunk'>@@ -84,8 +110,28 @@ properties:</div><div class='ctx'>         description: Input endpoint of the controller</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>         description: Output endpoint of the controller</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+                items:</div><div class='add'>+                  enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+              link-frequencies:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+                items:</div><div class='add'>+                  enum: [ 1620000000, 2700000000, 5400000000, 8100000000 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -95,10 +141,32 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - phys</div><div class='ctx'>   - phy-names</div><div class='del'>-  - "#sound-dai-cells"</div><div class='ctx'>   - power-domains</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  # AUX BUS does not exist on DP controllers</div><div class='add'>+  # Audio output also is present only on DP output</div><div class='add'>+  # p1 regions is present on DP, but not on eDP</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7280-edp</div><div class='add'>+              - qcom,sc8180x-edp</div><div class='add'>+              - qcom,sc8280xp-edp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        "#sound-dai-cells": false</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        aux-bus: false</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 5</div><div class='add'>+      required:</div><div class='add'>+        - "#sound-dai-cells"</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -152,6 +220,8 @@ examples:</div><div class='ctx'>                 reg = &lt;1&gt;;</div><div class='ctx'>                 endpoint {</div><div class='ctx'>                     remote-endpoint = &lt;&amp;typec&gt;;</div><div class='add'>+                    data-lanes = &lt;0 1&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;1620000000 2700000000 5400000000 8100000000&gt;;</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml<br/>new file mode 100644<br/>index 000000000000..3f953aa5e694<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dpu-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dpu-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display DPU common properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Common properties for QCom DPU display controller.</div><div class='add'>+</div><div class='add'>+# Do not select this by default, otherwise it is also selected for all</div><div class='add'>+# display-controller@ nodes</div><div class='add'>+select:</div><div class='add'>+  false</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: '^display-controller@[0-9a-f]+$'</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    description: |</div><div class='add'>+      Contains the list of output ports from DPU device. These ports</div><div class='add'>+      connect to interfaces that are external to the DPU hardware,</div><div class='add'>+      such as DSI, DP etc.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port@[0-9a-f]+$":</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+    # at least one port is required</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - interrupts</div><div class='add'>+  - power-domains</div><div class='add'>+  - operating-points-v2</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml<br/>deleted file mode 100644<br/>index 2df64afb76e6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,219 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/display/msm/dpu-msm8998.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Qualcomm Display DPU dt properties for MSM8998 target</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='del'>-  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='del'>-  bindings of MDSS and DPU are mentioned for MSM8998 target.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    items:</div><div class='del'>-      - const: qcom,msm8998-mdss</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    const: mdss</div><div class='del'>-</div><div class='del'>-  power-domains:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Display AHB clock</div><div class='del'>-      - description: Display AXI clock</div><div class='del'>-      - description: Display core clock</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: iface</div><div class='del'>-      - const: bus</div><div class='del'>-      - const: core</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  "#address-cells": true</div><div class='del'>-</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='del'>-  "#interrupt-cells":</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  iommus:</div><div class='del'>-    items:</div><div class='del'>-      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0</div><div class='del'>-</div><div class='del'>-  ranges: true</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^display-controller@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    description: Node containing the properties of DPU.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        items:</div><div class='del'>-          - const: qcom,msm8998-dpu</div><div class='del'>-</div><div class='del'>-      reg:</div><div class='del'>-        items:</div><div class='del'>-          - description: Address offset and size for mdp register set</div><div class='del'>-          - description: Address offset and size for regdma register set</div><div class='del'>-          - description: Address offset and size for vbif register set</div><div class='del'>-          - description: Address offset and size for non-realtime vbif register set</div><div class='del'>-</div><div class='del'>-      reg-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: mdp</div><div class='del'>-          - const: regdma</div><div class='del'>-          - const: vbif</div><div class='del'>-          - const: vbif_nrt</div><div class='del'>-</div><div class='del'>-      clocks:</div><div class='del'>-        items:</div><div class='del'>-          - description: Display ahb clock</div><div class='del'>-          - description: Display axi clock</div><div class='del'>-          - description: Display mem-noc clock</div><div class='del'>-          - description: Display core clock</div><div class='del'>-          - description: Display vsync clock</div><div class='del'>-</div><div class='del'>-      clock-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: iface</div><div class='del'>-          - const: bus</div><div class='del'>-          - const: mnoc</div><div class='del'>-          - const: core</div><div class='del'>-          - const: vsync</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      power-domains:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      operating-points-v2: true</div><div class='del'>-      ports:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/ports</div><div class='del'>-        description: |</div><div class='del'>-          Contains the list of output ports from DPU device. These ports</div><div class='del'>-          connect to interfaces that are external to the DPU hardware,</div><div class='del'>-          such as DSI, DP etc. Each output port contains an endpoint that</div><div class='del'>-          describes how it is connected to an external interface.</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          port@0:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF1 (DSI1)</div><div class='del'>-</div><div class='del'>-          port@1:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF2 (DSI2)</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - port@0</div><div class='del'>-          - port@1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - reg</div><div class='del'>-      - reg-names</div><div class='del'>-      - clocks</div><div class='del'>-      - interrupts</div><div class='del'>-      - power-domains</div><div class='del'>-      - operating-points-v2</div><div class='del'>-      - ports</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - iommus</div><div class='del'>-  - ranges</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,mmcc-msm8998.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='del'>-</div><div class='del'>-    mdss: display-subsystem@c900000 {</div><div class='del'>-        compatible = "qcom,msm8998-mdss";</div><div class='del'>-        reg = &lt;0x0c900000 0x1000&gt;;</div><div class='del'>-        reg-names = "mdss";</div><div class='del'>-</div><div class='del'>-        clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='del'>-                 &lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='del'>-                 &lt;&amp;mmcc MDSS_MDP_CLK&gt;;</div><div class='del'>-        clock-names = "iface", "bus", "core";</div><div class='del'>-</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #interrupt-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        interrupt-controller;</div><div class='del'>-        iommus = &lt;&amp;mmss_smmu 0&gt;;</div><div class='del'>-</div><div class='del'>-        power-domains = &lt;&amp;mmcc MDSS_GDSC&gt;;</div><div class='del'>-        ranges;</div><div class='del'>-</div><div class='del'>-        display-controller@c901000 {</div><div class='del'>-            compatible = "qcom,msm8998-dpu";</div><div class='del'>-            reg = &lt;0x0c901000 0x8f000&gt;,</div><div class='del'>-                  &lt;0x0c9a8e00 0xf0&gt;,</div><div class='del'>-                  &lt;0x0c9b0000 0x2008&gt;,</div><div class='del'>-                  &lt;0x0c9b8000 0x1040&gt;;</div><div class='del'>-            reg-names = "mdp", "regdma", "vbif", "vbif_nrt";</div><div class='del'>-</div><div class='del'>-            clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='del'>-                     &lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='del'>-                     &lt;&amp;mmcc MNOC_AHB_CLK&gt;,</div><div class='del'>-                     &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='del'>-                     &lt;&amp;mmcc MDSS_VSYNC_CLK&gt;;</div><div class='del'>-            clock-names = "iface", "bus", "mnoc", "core", "vsync";</div><div class='del'>-</div><div class='del'>-            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-            interrupts = &lt;0&gt;;</div><div class='del'>-            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='del'>-            power-domains = &lt;&amp;rpmpd MSM8998_VDDMX&gt;;</div><div class='del'>-</div><div class='del'>-            ports {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                port@0 {</div><div class='del'>-                    reg = &lt;0&gt;;</div><div class='del'>-                    dpu_intf1_out: endpoint {</div><div class='del'>-                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='del'>-                    };</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                port@1 {</div><div class='del'>-                    reg = &lt;1&gt;;</div><div class='del'>-                    dpu_intf2_out: endpoint {</div><div class='del'>-                        remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='del'>-                    };</div><div class='del'>-                };</div><div class='del'>-            };</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml<br/>deleted file mode 100644<br/>index d31483a78eab..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,215 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/display/msm/dpu-qcm2290.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Qualcomm Display DPU dt properties for QCM2290 target</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Loic Poulain &lt;loic.poulain@linaro.org&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='del'>-  sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS</div><div class='del'>-  and DPU are mentioned for QCM2290 target.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    items:</div><div class='del'>-      - const: qcom,qcm2290-mdss</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    const: mdss</div><div class='del'>-</div><div class='del'>-  power-domains:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Display AHB clock from gcc</div><div class='del'>-      - description: Display AXI clock</div><div class='del'>-      - description: Display core clock</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: iface</div><div class='del'>-      - const: bus</div><div class='del'>-      - const: core</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  "#address-cells": true</div><div class='del'>-</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='del'>-  "#interrupt-cells":</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  iommus:</div><div class='del'>-    items:</div><div class='del'>-      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0</div><div class='del'>-      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1</div><div class='del'>-</div><div class='del'>-  ranges: true</div><div class='del'>-</div><div class='del'>-  interconnects:</div><div class='del'>-    items:</div><div class='del'>-      - description: Interconnect path specifying the port ids for data bus</div><div class='del'>-</div><div class='del'>-  interconnect-names:</div><div class='del'>-    const: mdp0-mem</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^display-controller@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    description: Node containing the properties of DPU.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        items:</div><div class='del'>-          - const: qcom,qcm2290-dpu</div><div class='del'>-</div><div class='del'>-      reg:</div><div class='del'>-        items:</div><div class='del'>-          - description: Address offset and size for mdp register set</div><div class='del'>-          - description: Address offset and size for vbif register set</div><div class='del'>-</div><div class='del'>-      reg-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: mdp</div><div class='del'>-          - const: vbif</div><div class='del'>-</div><div class='del'>-      clocks:</div><div class='del'>-        items:</div><div class='del'>-          - description: Display AXI clock from gcc</div><div class='del'>-          - description: Display AHB clock from dispcc</div><div class='del'>-          - description: Display core clock from dispcc</div><div class='del'>-          - description: Display lut clock from dispcc</div><div class='del'>-          - description: Display vsync clock from dispcc</div><div class='del'>-</div><div class='del'>-      clock-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: bus</div><div class='del'>-          - const: iface</div><div class='del'>-          - const: core</div><div class='del'>-          - const: lut</div><div class='del'>-          - const: vsync</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      power-domains:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      operating-points-v2: true</div><div class='del'>-</div><div class='del'>-      ports:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/ports</div><div class='del'>-        description: |</div><div class='del'>-          Contains the list of output ports from DPU device. These ports</div><div class='del'>-          connect to interfaces that are external to the DPU hardware,</div><div class='del'>-          such as DSI. Each output port contains an endpoint that</div><div class='del'>-          describes how it is connected to an external interface.</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          port@0:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF1 (DSI1)</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - port@0</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - reg</div><div class='del'>-      - reg-names</div><div class='del'>-      - clocks</div><div class='del'>-      - interrupts</div><div class='del'>-      - power-domains</div><div class='del'>-      - operating-points-v2</div><div class='del'>-      - ports</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - iommus</div><div class='del'>-  - ranges</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,dispcc-qcm2290.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,gcc-qcm2290.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interconnect/qcom,qcm2290.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='del'>-</div><div class='del'>-    mdss: mdss@5e00000 {</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        compatible = "qcom,qcm2290-mdss", "qcom,mdss";</div><div class='del'>-        reg = &lt;0x05e00000 0x1000&gt;;</div><div class='del'>-        reg-names = "mdss";</div><div class='del'>-        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='del'>-        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='del'>-                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='del'>-                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='del'>-        clock-names = "iface", "bus", "core";</div><div class='del'>-</div><div class='del'>-        interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        interrupt-controller;</div><div class='del'>-        #interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-        interconnects = &lt;&amp;mmrt_virt MASTER_MDP0 &amp;bimc SLAVE_EBI1&gt;;</div><div class='del'>-        interconnect-names = "mdp0-mem";</div><div class='del'>-</div><div class='del'>-        iommus = &lt;&amp;apps_smmu 0x420 0x2&gt;,</div><div class='del'>-                 &lt;&amp;apps_smmu 0x421 0x0&gt;;</div><div class='del'>-        ranges;</div><div class='del'>-</div><div class='del'>-        mdss_mdp: mdp@5e01000 {</div><div class='del'>-                compatible = "qcom,qcm2290-dpu";</div><div class='del'>-                reg = &lt;0x05e01000 0x8f000&gt;,</div><div class='del'>-                      &lt;0x05eb0000 0x2008&gt;;</div><div class='del'>-                reg-names = "mdp", "vbif";</div><div class='del'>-</div><div class='del'>-                clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='del'>-                         &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='del'>-                         &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='del'>-                         &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='del'>-                         &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='del'>-                clock-names = "bus", "iface", "core", "lut", "vsync";</div><div class='del'>-</div><div class='del'>-                operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='del'>-                power-domains = &lt;&amp;rpmpd QCM2290_VDDCX&gt;;</div><div class='del'>-</div><div class='del'>-                interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-                interrupts = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                ports {</div><div class='del'>-                        #address-cells = &lt;1&gt;;</div><div class='del'>-                        #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                        port@0 {</div><div class='del'>-                                reg = &lt;0&gt;;</div><div class='del'>-                                dpu_intf1_out: endpoint {</div><div class='del'>-                                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='del'>-                                };</div><div class='del'>-                        };</div><div class='del'>-                };</div><div class='del'>-         };</div><div class='del'>-    };</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml<br/>deleted file mode 100644<br/>index 12a86b1ec1bc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,228 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Qualcomm Display DPU dt properties for SC7180 target</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='del'>-  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='del'>-  bindings of MDSS and DPU are mentioned for SC7180 target.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    items:</div><div class='del'>-      - const: qcom,sc7180-mdss</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    const: mdss</div><div class='del'>-</div><div class='del'>-  power-domains:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Display AHB clock from gcc</div><div class='del'>-      - description: Display AHB clock from dispcc</div><div class='del'>-      - description: Display core clock</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: iface</div><div class='del'>-      - const: ahb</div><div class='del'>-      - const: core</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  "#address-cells": true</div><div class='del'>-</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='del'>-  "#interrupt-cells":</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  iommus:</div><div class='del'>-    items:</div><div class='del'>-      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0</div><div class='del'>-</div><div class='del'>-  ranges: true</div><div class='del'>-</div><div class='del'>-  interconnects:</div><div class='del'>-    items:</div><div class='del'>-      - description: Interconnect path specifying the port ids for data bus</div><div class='del'>-</div><div class='del'>-  interconnect-names:</div><div class='del'>-    const: mdp0-mem</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^display-controller@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    description: Node containing the properties of DPU.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        items:</div><div class='del'>-          - const: qcom,sc7180-dpu</div><div class='del'>-</div><div class='del'>-      reg:</div><div class='del'>-        items:</div><div class='del'>-          - description: Address offset and size for mdp register set</div><div class='del'>-          - description: Address offset and size for vbif register set</div><div class='del'>-</div><div class='del'>-      reg-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: mdp</div><div class='del'>-          - const: vbif</div><div class='del'>-</div><div class='del'>-      clocks:</div><div class='del'>-        items:</div><div class='del'>-          - description: Display hf axi clock</div><div class='del'>-          - description: Display ahb clock</div><div class='del'>-          - description: Display rotator clock</div><div class='del'>-          - description: Display lut clock</div><div class='del'>-          - description: Display core clock</div><div class='del'>-          - description: Display vsync clock</div><div class='del'>-</div><div class='del'>-      clock-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: bus</div><div class='del'>-          - const: iface</div><div class='del'>-          - const: rot</div><div class='del'>-          - const: lut</div><div class='del'>-          - const: core</div><div class='del'>-          - const: vsync</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      power-domains:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      operating-points-v2: true</div><div class='del'>-</div><div class='del'>-      ports:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/ports</div><div class='del'>-        description: |</div><div class='del'>-          Contains the list of output ports from DPU device. These ports</div><div class='del'>-          connect to interfaces that are external to the DPU hardware,</div><div class='del'>-          such as DSI, DP etc. Each output port contains an endpoint that</div><div class='del'>-          describes how it is connected to an external interface.</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          port@0:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF1 (DSI1)</div><div class='del'>-</div><div class='del'>-          port@2:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF0 (DP)</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - port@0</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - reg</div><div class='del'>-      - reg-names</div><div class='del'>-      - clocks</div><div class='del'>-      - interrupts</div><div class='del'>-      - power-domains</div><div class='del'>-      - operating-points-v2</div><div class='del'>-      - ports</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - iommus</div><div class='del'>-  - ranges</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,dispcc-sc7180.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interconnect/qcom,sdm845.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='del'>-</div><div class='del'>-    display-subsystem@ae00000 {</div><div class='del'>-         #address-cells = &lt;1&gt;;</div><div class='del'>-         #size-cells = &lt;1&gt;;</div><div class='del'>-         compatible = "qcom,sc7180-mdss";</div><div class='del'>-         reg = &lt;0xae00000 0x1000&gt;;</div><div class='del'>-         reg-names = "mdss";</div><div class='del'>-         power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='del'>-         clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='del'>-                  &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='del'>-                  &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='del'>-         clock-names = "iface", "ahb", "core";</div><div class='del'>-</div><div class='del'>-         interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-         interrupt-controller;</div><div class='del'>-         #interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-         interconnects = &lt;&amp;mmss_noc MASTER_MDP0 &amp;mc_virt SLAVE_EBI1&gt;;</div><div class='del'>-         interconnect-names = "mdp0-mem";</div><div class='del'>-</div><div class='del'>-         iommus = &lt;&amp;apps_smmu 0x800 0x2&gt;;</div><div class='del'>-         ranges;</div><div class='del'>-</div><div class='del'>-         display-controller@ae01000 {</div><div class='del'>-                   compatible = "qcom,sc7180-dpu";</div><div class='del'>-                   reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='del'>-                         &lt;0x0aeb0000 0x2008&gt;;</div><div class='del'>-</div><div class='del'>-                   reg-names = "mdp", "vbif";</div><div class='del'>-</div><div class='del'>-                   clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_ROT_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='del'>-                   clock-names = "bus", "iface", "rot", "lut", "core",</div><div class='del'>-                                 "vsync";</div><div class='del'>-</div><div class='del'>-                   interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-                   interrupts = &lt;0&gt;;</div><div class='del'>-                   power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='del'>-                   operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='del'>-</div><div class='del'>-                   ports {</div><div class='del'>-                           #address-cells = &lt;1&gt;;</div><div class='del'>-                           #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                           port@0 {</div><div class='del'>-                                   reg = &lt;0&gt;;</div><div class='del'>-                                   dpu_intf1_out: endpoint {</div><div class='del'>-                                                  remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='del'>-                                   };</div><div class='del'>-                           };</div><div class='del'>-</div><div class='del'>-                            port@2 {</div><div class='del'>-                                    reg = &lt;2&gt;;</div><div class='del'>-                                    dpu_intf0_out: endpoint {</div><div class='del'>-                                                   remote-endpoint = &lt;&amp;dp_in&gt;;</div><div class='del'>-                                    };</div><div class='del'>-                            };</div><div class='del'>-                   };</div><div class='del'>-         };</div><div class='del'>-    };</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml<br/>deleted file mode 100644<br/>index fbeb931a026e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,232 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/display/msm/dpu-sc7280.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Qualcomm Display DPU dt properties for SC7280</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates</div><div class='del'>-  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='del'>-  bindings of MDSS and DPU are mentioned for SC7280.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: qcom,sc7280-mdss</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    const: mdss</div><div class='del'>-</div><div class='del'>-  power-domains:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Display AHB clock from gcc</div><div class='del'>-      - description: Display AHB clock from dispcc</div><div class='del'>-      - description: Display core clock</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: iface</div><div class='del'>-      - const: ahb</div><div class='del'>-      - const: core</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  "#address-cells": true</div><div class='del'>-</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='del'>-  "#interrupt-cells":</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  iommus:</div><div class='del'>-    items:</div><div class='del'>-      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0</div><div class='del'>-</div><div class='del'>-  ranges: true</div><div class='del'>-</div><div class='del'>-  interconnects:</div><div class='del'>-    items:</div><div class='del'>-      - description: Interconnect path specifying the port ids for data bus</div><div class='del'>-</div><div class='del'>-  interconnect-names:</div><div class='del'>-    const: mdp0-mem</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^display-controller@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    description: Node containing the properties of DPU.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        const: qcom,sc7280-dpu</div><div class='del'>-</div><div class='del'>-      reg:</div><div class='del'>-        items:</div><div class='del'>-          - description: Address offset and size for mdp register set</div><div class='del'>-          - description: Address offset and size for vbif register set</div><div class='del'>-</div><div class='del'>-      reg-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: mdp</div><div class='del'>-          - const: vbif</div><div class='del'>-</div><div class='del'>-      clocks:</div><div class='del'>-        items:</div><div class='del'>-          - description: Display hf axi clock</div><div class='del'>-          - description: Display sf axi clock</div><div class='del'>-          - description: Display ahb clock</div><div class='del'>-          - description: Display lut clock</div><div class='del'>-          - description: Display core clock</div><div class='del'>-          - description: Display vsync clock</div><div class='del'>-</div><div class='del'>-      clock-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: bus</div><div class='del'>-          - const: nrt_bus</div><div class='del'>-          - const: iface</div><div class='del'>-          - const: lut</div><div class='del'>-          - const: core</div><div class='del'>-          - const: vsync</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      power-domains:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      operating-points-v2: true</div><div class='del'>-</div><div class='del'>-      ports:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/ports</div><div class='del'>-        description: |</div><div class='del'>-          Contains the list of output ports from DPU device. These ports</div><div class='del'>-          connect to interfaces that are external to the DPU hardware,</div><div class='del'>-          such as DSI, DP etc. Each output port contains an endpoint that</div><div class='del'>-          describes how it is connected to an external interface.</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          port@0:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF1 (DSI)</div><div class='del'>-</div><div class='del'>-          port@1:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF5 (EDP)</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - port@0</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - reg</div><div class='del'>-      - reg-names</div><div class='del'>-      - clocks</div><div class='del'>-      - interrupts</div><div class='del'>-      - power-domains</div><div class='del'>-      - operating-points-v2</div><div class='del'>-      - ports</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - iommus</div><div class='del'>-  - ranges</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,dispcc-sc7280.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interconnect/qcom,sc7280.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='del'>-</div><div class='del'>-    display-subsystem@ae00000 {</div><div class='del'>-         #address-cells = &lt;1&gt;;</div><div class='del'>-         #size-cells = &lt;1&gt;;</div><div class='del'>-         compatible = "qcom,sc7280-mdss";</div><div class='del'>-         reg = &lt;0xae00000 0x1000&gt;;</div><div class='del'>-         reg-names = "mdss";</div><div class='del'>-         power-domains = &lt;&amp;dispcc DISP_CC_MDSS_CORE_GDSC&gt;;</div><div class='del'>-         clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='del'>-                  &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='del'>-                  &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='del'>-         clock-names = "iface",</div><div class='del'>-                       "ahb",</div><div class='del'>-                       "core";</div><div class='del'>-</div><div class='del'>-         interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-         interrupt-controller;</div><div class='del'>-         #interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-         interconnects = &lt;&amp;mmss_noc MASTER_MDP0 &amp;mc_virt SLAVE_EBI1&gt;;</div><div class='del'>-         interconnect-names = "mdp0-mem";</div><div class='del'>-</div><div class='del'>-         iommus = &lt;&amp;apps_smmu 0x900 0x402&gt;;</div><div class='del'>-         ranges;</div><div class='del'>-</div><div class='del'>-         display-controller@ae01000 {</div><div class='del'>-                   compatible = "qcom,sc7280-dpu";</div><div class='del'>-                   reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='del'>-                         &lt;0x0aeb0000 0x2008&gt;;</div><div class='del'>-</div><div class='del'>-                   reg-names = "mdp", "vbif";</div><div class='del'>-</div><div class='del'>-                   clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='del'>-                            &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='del'>-                            &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='del'>-                   clock-names = "bus",</div><div class='del'>-                                 "nrt_bus",</div><div class='del'>-                                 "iface",</div><div class='del'>-                                 "lut",</div><div class='del'>-                                 "core",</div><div class='del'>-                                 "vsync";</div><div class='del'>-</div><div class='del'>-                   interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-                   interrupts = &lt;0&gt;;</div><div class='del'>-                   power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='del'>-                   operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='del'>-</div><div class='del'>-                   ports {</div><div class='del'>-                           #address-cells = &lt;1&gt;;</div><div class='del'>-                           #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                           port@0 {</div><div class='del'>-                                   reg = &lt;0&gt;;</div><div class='del'>-                                   dpu_intf1_out: endpoint {</div><div class='del'>-                                           remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='del'>-                                   };</div><div class='del'>-                           };</div><div class='del'>-</div><div class='del'>-                           port@1 {</div><div class='del'>-                                   reg = &lt;1&gt;;</div><div class='del'>-                                   dpu_intf5_out: endpoint {</div><div class='del'>-                                           remote-endpoint = &lt;&amp;edp_in&gt;;</div><div class='del'>-                                   };</div><div class='del'>-                           };</div><div class='del'>-                   };</div><div class='del'>-         };</div><div class='del'>-    };</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml<br/>deleted file mode 100644<br/>index 0dca4b3d66e4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,209 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Qualcomm Display DPU dt properties for SDM845 target</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='del'>-  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='del'>-  bindings of MDSS and DPU are mentioned for SDM845 target.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    items:</div><div class='del'>-      - const: qcom,sdm845-mdss</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    const: mdss</div><div class='del'>-</div><div class='del'>-  power-domains:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Display AHB clock from gcc</div><div class='del'>-      - description: Display core clock</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: iface</div><div class='del'>-      - const: core</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  "#address-cells": true</div><div class='del'>-</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='del'>-  "#interrupt-cells":</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  iommus:</div><div class='del'>-    items:</div><div class='del'>-      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0</div><div class='del'>-      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1</div><div class='del'>-</div><div class='del'>-  ranges: true</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^display-controller@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    description: Node containing the properties of DPU.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        items:</div><div class='del'>-          - const: qcom,sdm845-dpu</div><div class='del'>-</div><div class='del'>-      reg:</div><div class='del'>-        items:</div><div class='del'>-          - description: Address offset and size for mdp register set</div><div class='del'>-          - description: Address offset and size for vbif register set</div><div class='del'>-</div><div class='del'>-      reg-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: mdp</div><div class='del'>-          - const: vbif</div><div class='del'>-</div><div class='del'>-      clocks:</div><div class='del'>-        items:</div><div class='del'>-          - description: Display ahb clock</div><div class='del'>-          - description: Display axi clock</div><div class='del'>-          - description: Display core clock</div><div class='del'>-          - description: Display vsync clock</div><div class='del'>-</div><div class='del'>-      clock-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: iface</div><div class='del'>-          - const: bus</div><div class='del'>-          - const: core</div><div class='del'>-          - const: vsync</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      power-domains:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      operating-points-v2: true</div><div class='del'>-      ports:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/ports</div><div class='del'>-        description: |</div><div class='del'>-          Contains the list of output ports from DPU device. These ports</div><div class='del'>-          connect to interfaces that are external to the DPU hardware,</div><div class='del'>-          such as DSI, DP etc. Each output port contains an endpoint that</div><div class='del'>-          describes how it is connected to an external interface.</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          port@0:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF1 (DSI1)</div><div class='del'>-</div><div class='del'>-          port@1:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-            description: DPU_INTF2 (DSI2)</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - port@0</div><div class='del'>-          - port@1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - reg</div><div class='del'>-      - reg-names</div><div class='del'>-      - clocks</div><div class='del'>-      - interrupts</div><div class='del'>-      - power-domains</div><div class='del'>-      - operating-points-v2</div><div class='del'>-      - ports</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - iommus</div><div class='del'>-  - ranges</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,dispcc-sdm845.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='del'>-</div><div class='del'>-    display-subsystem@ae00000 {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;1&gt;;</div><div class='del'>-          compatible = "qcom,sdm845-mdss";</div><div class='del'>-          reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='del'>-          reg-names = "mdss";</div><div class='del'>-          power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='del'>-</div><div class='del'>-          clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='del'>-                   &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='del'>-          clock-names = "iface", "core";</div><div class='del'>-</div><div class='del'>-          interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-          interrupt-controller;</div><div class='del'>-          #interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-          iommus = &lt;&amp;apps_smmu 0x880 0x8&gt;,</div><div class='del'>-                   &lt;&amp;apps_smmu 0xc80 0x8&gt;;</div><div class='del'>-          ranges;</div><div class='del'>-</div><div class='del'>-          display-controller@ae01000 {</div><div class='del'>-                    compatible = "qcom,sdm845-dpu";</div><div class='del'>-                    reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='del'>-                          &lt;0x0aeb0000 0x2008&gt;;</div><div class='del'>-                    reg-names = "mdp", "vbif";</div><div class='del'>-</div><div class='del'>-                    clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='del'>-                             &lt;&amp;dispcc DISP_CC_MDSS_AXI_CLK&gt;,</div><div class='del'>-                             &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='del'>-                             &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='del'>-                    clock-names = "iface", "bus", "core", "vsync";</div><div class='del'>-</div><div class='del'>-                    interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-                    interrupts = &lt;0&gt;;</div><div class='del'>-                    power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;;</div><div class='del'>-                    operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='del'>-</div><div class='del'>-                    ports {</div><div class='del'>-                           #address-cells = &lt;1&gt;;</div><div class='del'>-                           #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                           port@0 {</div><div class='del'>-                                   reg = &lt;0&gt;;</div><div class='del'>-                                   dpu_intf1_out: endpoint {</div><div class='del'>-                                                  remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='del'>-                                   };</div><div class='del'>-                           };</div><div class='del'>-</div><div class='del'>-                           port@1 {</div><div class='del'>-                                   reg = &lt;1&gt;;</div><div class='del'>-                                   dpu_intf2_out: endpoint {</div><div class='del'>-                                                  remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='del'>-                                   };</div><div class='del'>-                           };</div><div class='del'>-                    };</div><div class='del'>-          };</div><div class='del'>-    };</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml<br/>index 7095ec3c890d..e6c1ebfe8a32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml</a></div><div class='hunk'>@@ -7,16 +7,35 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Display DSI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "../dsi-controller.yaml#"</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,mdss-dsi-ctrl</div><div class='del'>-      - qcom,dsi-ctrl-6g-qcm2290</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,apq8064-dsi-ctrl</div><div class='add'>+              - qcom,msm8916-dsi-ctrl</div><div class='add'>+              - qcom,msm8953-dsi-ctrl</div><div class='add'>+              - qcom,msm8974-dsi-ctrl</div><div class='add'>+              - qcom,msm8996-dsi-ctrl</div><div class='add'>+              - qcom,msm8998-dsi-ctrl</div><div class='add'>+              - qcom,qcm2290-dsi-ctrl</div><div class='add'>+              - qcom,sc7180-dsi-ctrl</div><div class='add'>+              - qcom,sc7280-dsi-ctrl</div><div class='add'>+              - qcom,sdm660-dsi-ctrl</div><div class='add'>+              - qcom,sdm845-dsi-ctrl</div><div class='add'>+              - qcom,sm6115-dsi-ctrl</div><div class='add'>+              - qcom,sm8150-dsi-ctrl</div><div class='add'>+              - qcom,sm8250-dsi-ctrl</div><div class='add'>+              - qcom,sm8350-dsi-ctrl</div><div class='add'>+              - qcom,sm8450-dsi-ctrl</div><div class='add'>+              - qcom,sm8550-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,dsi-ctrl-6g-qcm2290</div><div class='add'>+          - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible</div><div class='add'>+        deprecated: true</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -28,36 +47,34 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Display byte clock</div><div class='del'>-      - description: Display byte interface clock</div><div class='del'>-      - description: Display pixel clock</div><div class='del'>-      - description: Display escape clock</div><div class='del'>-      - description: Display AHB clock</div><div class='del'>-      - description: Display AXI clock</div><div class='add'>+    description: |</div><div class='add'>+      Several clocks are used, depending on the variant. Typical ones are::</div><div class='add'>+       - bus:: Display AHB clock.</div><div class='add'>+       - byte:: Display byte clock.</div><div class='add'>+       - byte_intf:: Display byte interface clock.</div><div class='add'>+       - core:: Display core clock.</div><div class='add'>+       - core_mss:: Core MultiMedia SubSystem clock.</div><div class='add'>+       - iface:: Display AXI clock.</div><div class='add'>+       - mdp_core:: MDP Core clock.</div><div class='add'>+       - mnoc:: MNOC clock</div><div class='add'>+       - pixel:: Display pixel clock.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 9</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: byte</div><div class='del'>-      - const: byte_intf</div><div class='del'>-      - const: pixel</div><div class='del'>-      - const: core</div><div class='del'>-      - const: iface</div><div class='del'>-      - const: bus</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 9</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   phy-names:</div><div class='add'>+    deprecated: true</div><div class='ctx'>     const: dsi</div><div class='ctx'> </div><div class='del'>-  "#address-cells": true</div><div class='del'>-</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='ctx'>   syscon-sfpb:</div><div class='ctx'>     description: A phandle to mmss_sfpb syscon node (only for DSIv2).</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>   qcom,dual-dsi-mode:</div><div class='ctx'>     type: boolean</div><div class='hunk'>@@ -67,13 +84,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   assigned-clocks:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    maxItems: 2</div><div class='add'>+    maxItems: 4</div><div class='ctx'>     description: |</div><div class='ctx'>       Parents of "byte" and "pixel" for the given platform.</div><div class='add'>+      For DSIv2 platforms this should contain "byte", "esc", "src" and</div><div class='add'>+      "pixel_src" clocks.</div><div class='ctx'> </div><div class='ctx'>   assigned-clock-parents:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    maxItems: 2</div><div class='add'>+    maxItems: 4</div><div class='ctx'>     description: |</div><div class='ctx'>       The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.</div><div class='ctx'> </div><div class='hunk'>@@ -82,15 +101,18 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   operating-points-v2: true</div><div class='ctx'> </div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='ctx'>   ports:</div><div class='del'>-    $ref: "/schemas/graph.yaml#/properties/ports"</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'>     description: |</div><div class='ctx'>       Contains DSI controller input and output ports as children, each</div><div class='ctx'>       containing one endpoint subnode.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='del'>-        $ref: "/schemas/graph.yaml#/$defs/port-base"</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>           Input endpoints of the controller.</div><div class='hunk'>@@ -101,12 +123,12 @@ properties:</div><div class='ctx'>             properties:</div><div class='ctx'>               data-lanes:</div><div class='ctx'>                 maxItems: 4</div><div class='del'>-                minItems: 4</div><div class='add'>+                minItems: 1</div><div class='ctx'>                 items:</div><div class='ctx'>                   enum: [ 0, 1, 2, 3 ]</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='del'>-        $ref: "/schemas/graph.yaml#/$defs/port-base"</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>           Output endpoints of the controller.</div><div class='hunk'>@@ -117,7 +139,7 @@ properties:</div><div class='ctx'>             properties:</div><div class='ctx'>               data-lanes:</div><div class='ctx'>                 maxItems: 4</div><div class='del'>-                minItems: 4</div><div class='add'>+                minItems: 1</div><div class='ctx'>                 items:</div><div class='ctx'>                   enum: [ 0, 1, 2, 3 ]</div><div class='ctx'> </div><div class='hunk'>@@ -125,6 +147,26 @@ properties:</div><div class='ctx'>       - port@0</div><div class='ctx'>       - port@1</div><div class='ctx'> </div><div class='add'>+  avdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to vdd regulator device node</div><div class='add'>+</div><div class='add'>+  vcca-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to vdd regulator device node</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      VDD regulator</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description:</div><div class='add'>+      VDD-IO regulator</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description:</div><div class='add'>+      VDDA regulator</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -133,14 +175,197 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - phys</div><div class='del'>-  - phy-names</div><div class='ctx'>   - assigned-clocks</div><div class='ctx'>   - assigned-clock-parents</div><div class='del'>-  - power-domains</div><div class='del'>-  - operating-points-v2</div><div class='ctx'>   - ports</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ../dsi-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,apq8064-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 7</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: core_mmss</div><div class='add'>+            - const: src</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8916-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mdp_core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8953-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mdp_core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8974-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 7</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mdp_core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+            - const: core_mmss</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8996-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 7</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mdp_core</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: core_mmss</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8998-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: byte_intf</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7180-dsi-ctrl</div><div class='add'>+              - qcom,sc7280-dsi-ctrl</div><div class='add'>+              - qcom,sm8150-dsi-ctrl</div><div class='add'>+              - qcom,sm8250-dsi-ctrl</div><div class='add'>+              - qcom,sm8350-dsi-ctrl</div><div class='add'>+              - qcom,sm8450-dsi-ctrl</div><div class='add'>+              - qcom,sm8550-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: byte_intf</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm660-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 9</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mdp_core</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: byte_intf</div><div class='add'>+            - const: mnoc</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: core_mmss</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm845-dsi-ctrl</div><div class='add'>+              - qcom,sm6115-dsi-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: byte</div><div class='add'>+            - const: byte_intf</div><div class='add'>+            - const: pixel</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -150,7 +375,7 @@ examples:</div><div class='ctx'>      #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='ctx'> </div><div class='ctx'>      dsi@ae94000 {</div><div class='del'>-           compatible = "qcom,mdss-dsi-ctrl";</div><div class='add'>+           compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='ctx'>            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='ctx'>            reg-names = "dsi_ctrl";</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml<br/>index 2d5a766d028f..e6b00d7387ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Display DSI 10nm PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: dsi-phy-common.yaml#</div><div class='hunk'>@@ -37,7 +37,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   qcom,phy-rescode-offset-top:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/int8-array</div><div class='del'>-    minItems: 5</div><div class='ctx'>     maxItems: 5</div><div class='ctx'>     description:</div><div class='ctx'>       Integer array of offset for pull-up legs rescode for all five lanes.</div><div class='hunk'>@@ -49,7 +48,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   qcom,phy-rescode-offset-bot:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/int8-array</div><div class='del'>-    minItems: 5</div><div class='ctx'>     maxItems: 5</div><div class='ctx'>     description:</div><div class='ctx'>       Integer array of offset for pull-down legs rescode for all five lanes.</div><div class='hunk'>@@ -60,7 +58,7 @@ properties:</div><div class='ctx'>       maximum: 31</div><div class='ctx'> </div><div class='ctx'>   qcom,phy-drive-ldo-level:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='ctx'>       The PHY LDO has an amplitude tuning feature to adjust the LDO output</div><div class='ctx'>       for the HSTX drive. Use supported levels (mV) to offset the drive level</div><div class='hunk'>@@ -71,7 +69,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - vdds-supply</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml<br/>index 81dbee4803c0..a43e11d3b00d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Display DSI 14nm PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: dsi-phy-common.yaml#</div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,dsi-phy-14nm</div><div class='add'>+      - qcom,dsi-phy-14nm-2290</div><div class='ctx'>       - qcom,dsi-phy-14nm-660</div><div class='ctx'>       - qcom,dsi-phy-14nm-8953</div><div class='ctx'> </div><div class='hunk'>@@ -38,7 +39,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - vcca-supply</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml<br/>index b8de785ce815..9c1f9140c731 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Display DSI 20nm PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: dsi-phy-common.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml<br/>index 69eecaa64b18..cf4a338c4661 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Display DSI 28nm PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: dsi-phy-common.yaml#</div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,dsi-phy-28nm-hpm</div><div class='add'>+      - qcom,dsi-phy-28nm-hpm-fam-b</div><div class='ctx'>       - qcom,dsi-phy-28nm-lp</div><div class='ctx'>       - qcom,dsi-phy-28nm-8960</div><div class='ctx'> </div><div class='hunk'>@@ -34,6 +35,10 @@ properties:</div><div class='ctx'>   vddio-supply:</div><div class='ctx'>     description: Phandle to vdd-io regulator device node.</div><div class='ctx'> </div><div class='add'>+  qcom,dsi-phy-regulator-ldo-mode:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Indicates if the LDO mode PHY regulator is wanted.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml<br/>index c851770bbdf2..8e9031bbde73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml</a></div><div class='hunk'>@@ -18,6 +18,10 @@ properties:</div><div class='ctx'>       - qcom,dsi-phy-7nm</div><div class='ctx'>       - qcom,dsi-phy-7nm-8150</div><div class='ctx'>       - qcom,sc7280-dsi-phy-7nm</div><div class='add'>+      - qcom,sm6375-dsi-phy-7nm</div><div class='add'>+      - qcom,sm8350-dsi-phy-5nm</div><div class='add'>+      - qcom,sm8450-dsi-phy-5nm</div><div class='add'>+      - qcom,sm8550-dsi-phy-4nm</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -44,7 +48,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - vdds-supply</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml b/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml<br/>index 502bdda90235..0f6f08890e7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml</a></div><div class='hunk'>@@ -4,14 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/msm/dsi-phy-common.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Description of Qualcomm Display DSI PHY common dt properties</div><div class='add'>+title: Qualcomm Display DSI PHY Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krishna Manikandan &lt;mkrishn@codeaurora.org&gt;</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This defines the DSI PHY dt properties which are common for all</div><div class='del'>-  dsi phy versions.</div><div class='add'>+description:</div><div class='add'>+  Common properties for Qualcomm Display DSI PHY.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#clock-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml<br/>index fe55611d2603..029d72822d8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/gmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/gmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/gmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/gmu.yaml</a></div><div class='hunk'>@@ -3,10 +3,10 @@</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='ctx'> </div><div class='del'>-$id: "http://devicetree.org/schemas/display/msm/gmu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/gmu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Devicetree bindings for the GMU attached to certain Adreno GPUs</div><div class='add'>+title: GMU attached to certain Adreno GPUs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='hunk'>@@ -20,35 +20,24 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='del'>-      - enum:</div><div class='del'>-          - qcom,adreno-gmu-630.2</div><div class='add'>+      - pattern: '^qcom,adreno-gmu-6[0-9][0-9]\.[0-9]$'</div><div class='ctx'>       - const: qcom,adreno-gmu</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    items:</div><div class='del'>-      - description: Core GMU registers</div><div class='del'>-      - description: GMU PDC registers</div><div class='del'>-      - description: GMU PDC sequence registers</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: gmu</div><div class='del'>-      - const: gmu_pdc</div><div class='del'>-      - const: gmu_pdc_seq</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: GMU clock</div><div class='del'>-      - description: GPU CX clock</div><div class='del'>-      - description: GPU AXI clock</div><div class='del'>-      - description: GPU MEMNOC clock</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 7</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: gmu</div><div class='del'>-      - const: cxo</div><div class='del'>-      - const: axi</div><div class='del'>-      - const: memnoc</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 7</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -76,6 +65,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   operating-points-v2: true</div><div class='ctx'> </div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -91,6 +83,140 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,adreno-gmu-618.0</div><div class='add'>+              - qcom,adreno-gmu-630.2</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Core GMU registers</div><div class='add'>+            - description: GMU PDC registers</div><div class='add'>+            - description: GMU PDC sequence registers</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gmu</div><div class='add'>+            - const: gmu_pdc</div><div class='add'>+            - const: gmu_pdc_seq</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GMU clock</div><div class='add'>+            - description: GPU CX clock</div><div class='add'>+            - description: GPU AXI clock</div><div class='add'>+            - description: GPU MEMNOC clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gmu</div><div class='add'>+            - const: cxo</div><div class='add'>+            - const: axi</div><div class='add'>+            - const: memnoc</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,adreno-gmu-635.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Core GMU registers</div><div class='add'>+            - description: Resource controller registers</div><div class='add'>+            - description: GMU PDC registers</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gmu</div><div class='add'>+            - const: rscc</div><div class='add'>+            - const: gmu_pdc</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GMU clock</div><div class='add'>+            - description: GPU CX clock</div><div class='add'>+            - description: GPU AXI clock</div><div class='add'>+            - description: GPU MEMNOC clock</div><div class='add'>+            - description: GPU AHB clock</div><div class='add'>+            - description: GPU HUB CX clock</div><div class='add'>+            - description: GPU SMMU vote clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gmu</div><div class='add'>+            - const: cxo</div><div class='add'>+            - const: axi</div><div class='add'>+            - const: memnoc</div><div class='add'>+            - const: ahb</div><div class='add'>+            - const: hub</div><div class='add'>+            - const: smmu_vote</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,adreno-gmu-640.1</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Core GMU registers</div><div class='add'>+            - description: GMU PDC registers</div><div class='add'>+            - description: GMU PDC sequence registers</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gmu</div><div class='add'>+            - const: gmu_pdc</div><div class='add'>+            - const: gmu_pdc_seq</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,adreno-gmu-650.2</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Core GMU registers</div><div class='add'>+            - description: Resource controller registers</div><div class='add'>+            - description: GMU PDC registers</div><div class='add'>+            - description: GMU PDC sequence registers</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gmu</div><div class='add'>+            - const: rscc</div><div class='add'>+            - const: gmu_pdc</div><div class='add'>+            - const: gmu_pdc_seq</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,adreno-gmu-640.1</div><div class='add'>+              - qcom,adreno-gmu-650.2</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GPU AHB clock</div><div class='add'>+            - description: GMU clock</div><div class='add'>+            - description: GPU CX clock</div><div class='add'>+            - description: GPU AXI clock</div><div class='add'>+            - description: GPU MEMNOC clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ahb</div><div class='add'>+            - const: gmu</div><div class='add'>+            - const: cxo</div><div class='add'>+            - const: axi</div><div class='add'>+            - const: memnoc</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,gpucc-sdm845.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml<br/>index 3397bc31d087..5dabe7b6794b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/gpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/gpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/gpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/gpu.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='ctx'> </div><div class='del'>-$id: "http://devicetree.org/schemas/display/msm/gpu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/gpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Devicetree bindings for the Adreno or Snapdragon GPUs</div><div class='add'>+title: Adreno or Snapdragon GPUs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='hunk'>@@ -58,7 +58,8 @@ properties:</div><div class='ctx'>       - const: ocmem</div><div class='ctx'> </div><div class='ctx'>   iommus:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 64</div><div class='ctx'> </div><div class='ctx'>   sram:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='hunk'>@@ -81,13 +82,14 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   zap-shader:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       For a5xx and a6xx devices this node contains a memory-region that</div><div class='ctx'>       points to reserved memory to store the zap shader that can be used to</div><div class='ctx'>       help bring the GPU out of secure mode.</div><div class='ctx'>     properties:</div><div class='ctx'>       memory-region:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+        maxItems: 1</div><div class='ctx'> </div><div class='ctx'>       firmware-name:</div><div class='ctx'>         description: |</div><div class='hunk'>@@ -147,6 +149,8 @@ allOf:</div><div class='ctx'>                 description: GPU 3D engine clock</div><div class='ctx'>               - const: rbbmtimer</div><div class='ctx'>                 description: GPU RBBM Timer for Adreno 5xx series</div><div class='add'>+              - const: rbcpr</div><div class='add'>+                description: GPU RB Core Power Reduction clock</div><div class='ctx'>           minItems: 2</div><div class='ctx'>           maxItems: 7</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.txt b/Documentation/devicetree/bindings/display/msm/hdmi.txt<br/>deleted file mode 100644<br/>index 5f90a40da51b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/hdmi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/hdmi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,99 +0,0 @@</div><div class='del'>-Qualcomm adreno/snapdragon hdmi output</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: one of the following</div><div class='del'>-   * "qcom,hdmi-tx-8996"</div><div class='del'>-   * "qcom,hdmi-tx-8994"</div><div class='del'>-   * "qcom,hdmi-tx-8084"</div><div class='del'>-   * "qcom,hdmi-tx-8974"</div><div class='del'>-   * "qcom,hdmi-tx-8660"</div><div class='del'>-   * "qcom,hdmi-tx-8960"</div><div class='del'>-- reg: Physical base address and length of the controller's registers</div><div class='del'>-- reg-names: "core_physical"</div><div class='del'>-- interrupts: The interrupt signal from the hdmi block.</div><div class='del'>-- power-domains: Should be &lt;&amp;mmcc MDSS_GDSC&gt;.</div><div class='del'>-- clocks: device clocks</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- core-vdda-supply: phandle to supply regulator</div><div class='del'>-- hdmi-mux-supply: phandle to mux regulator</div><div class='del'>-- phys: the phandle for the HDMI PHY device</div><div class='del'>-- phy-names: the name of the corresponding PHY device</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- hpd-gpios: hpd pin</div><div class='del'>-- qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin</div><div class='del'>-- qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin</div><div class='del'>-- qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin</div><div class='del'>-- power-domains: reference to the power domain(s), if available.</div><div class='del'>-- pinctrl-names: the pin control state names; should contain "default"</div><div class='del'>-- pinctrl-0: the default pinctrl state (active)</div><div class='del'>-- pinctrl-1: the "sleep" pinctrl state</div><div class='del'>-</div><div class='del'>-HDMI PHY:</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Could be the following</div><div class='del'>-  * "qcom,hdmi-phy-8660"</div><div class='del'>-  * "qcom,hdmi-phy-8960"</div><div class='del'>-  * "qcom,hdmi-phy-8974"</div><div class='del'>-  * "qcom,hdmi-phy-8084"</div><div class='del'>-  * "qcom,hdmi-phy-8996"</div><div class='del'>-- #phy-cells: Number of cells in a PHY specifier; Should be 0.</div><div class='del'>-- reg: Physical base address and length of the registers of the PHY sub blocks.</div><div class='del'>-- reg-names: The names of register regions. The following regions are required:</div><div class='del'>-  * "hdmi_phy"</div><div class='del'>-  * "hdmi_pll"</div><div class='del'>-  For HDMI PHY on msm8996, these additional register regions are required:</div><div class='del'>-    * "hdmi_tx_l0"</div><div class='del'>-    * "hdmi_tx_l1"</div><div class='del'>-    * "hdmi_tx_l3"</div><div class='del'>-    * "hdmi_tx_l4"</div><div class='del'>-- power-domains: Should be &lt;&amp;mmcc MDSS_GDSC&gt;.</div><div class='del'>-- clocks: device clocks</div><div class='del'>-  See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.</div><div class='del'>-- core-vdda-supply: phandle to vdda regulator device node</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	hdmi: hdmi@4a00000 {</div><div class='del'>-		compatible = "qcom,hdmi-tx-8960";</div><div class='del'>-		reg-names = "core_physical";</div><div class='del'>-		reg = &lt;0x04a00000 0x2f0&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 79 0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;mmcc MDSS_GDSC&gt;;</div><div class='del'>-		clock-names =</div><div class='del'>-		    "core",</div><div class='del'>-		    "master_iface",</div><div class='del'>-		    "slave_iface";</div><div class='del'>-		clocks =</div><div class='del'>-		    &lt;&amp;mmcc HDMI_APP_CLK&gt;,</div><div class='del'>-		    &lt;&amp;mmcc HDMI_M_AHB_CLK&gt;,</div><div class='del'>-		    &lt;&amp;mmcc HDMI_S_AHB_CLK&gt;;</div><div class='del'>-		qcom,hdmi-tx-ddc-clk = &lt;&amp;msmgpio 70 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		qcom,hdmi-tx-ddc-data = &lt;&amp;msmgpio 71 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		qcom,hdmi-tx-hpd = &lt;&amp;msmgpio 72 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		core-vdda-supply = &lt;&amp;pm8921_hdmi_mvs&gt;;</div><div class='del'>-		hdmi-mux-supply = &lt;&amp;ext_3p3v&gt;;</div><div class='del'>-		pinctrl-names = "default", "sleep";</div><div class='del'>-		pinctrl-0 = &lt;&amp;hpd_active  &amp;ddc_active  &amp;cec_active&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;hpd_suspend &amp;ddc_suspend &amp;cec_suspend&gt;;</div><div class='del'>-</div><div class='del'>-		phys = &lt;&amp;hdmi_phy&gt;;</div><div class='del'>-		phy-names = "hdmi_phy";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	hdmi_phy: phy@4a00400 {</div><div class='del'>-		compatible = "qcom,hdmi-phy-8960";</div><div class='del'>-		reg-names = "hdmi_phy",</div><div class='del'>-			    "hdmi_pll";</div><div class='del'>-		reg = &lt;0x4a00400 0x60&gt;,</div><div class='del'>-		      &lt;0x4a00500 0x100&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		power-domains = &lt;&amp;mmcc MDSS_GDSC&gt;;</div><div class='del'>-		clock-names = "slave_iface";</div><div class='del'>-		clocks = &lt;&amp;mmcc HDMI_S_AHB_CLK&gt;;</div><div class='del'>-		core-vdda-supply = &lt;&amp;pm8921_hdmi_mvs&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/hdmi.yaml b/Documentation/devicetree/bindings/display/msm/hdmi.yaml<br/>new file mode 100644<br/>index 000000000000..47e97669821c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/hdmi.yaml</a></div><div class='hunk'>@@ -0,0 +1,232 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/hdmi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Adreno/Snapdragon HDMI output</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,hdmi-tx-8084</div><div class='add'>+      - qcom,hdmi-tx-8660</div><div class='add'>+      - qcom,hdmi-tx-8960</div><div class='add'>+      - qcom,hdmi-tx-8974</div><div class='add'>+      - qcom,hdmi-tx-8994</div><div class='add'>+      - qcom,hdmi-tx-8996</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: core_physical</div><div class='add'>+      - const: qfprom_physical</div><div class='add'>+      - const: hdcp_physical</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    enum:</div><div class='add'>+      - hdmi_phy</div><div class='add'>+      - hdmi-phy</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  core-vdda-supply:</div><div class='add'>+    description: phandle to VDDA supply regulator</div><div class='add'>+</div><div class='add'>+  hdmi-mux-supply:</div><div class='add'>+    description: phandle to mux regulator</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  core-vcc-supply:</div><div class='add'>+    description: phandle to VCC supply regulator</div><div class='add'>+</div><div class='add'>+  hpd-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: hpd pin</div><div class='add'>+</div><div class='add'>+  qcom,hdmi-tx-mux-en-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: HDMI mux enable pin</div><div class='add'>+</div><div class='add'>+  qcom,hdmi-tx-mux-sel-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: HDMI mux select pin</div><div class='add'>+</div><div class='add'>+  qcom,hdmi-tx-mux-lpm-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: HDMI mux lpm pin</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        description: |</div><div class='add'>+          Input endpoints of the controller.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        description: |</div><div class='add'>+          Output endpoints of the controller.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - phys</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,hdmi-tx-8960</div><div class='add'>+              - qcom,hdmi-tx-8660</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+            - const: master_iface</div><div class='add'>+            - const: slave_iface</div><div class='add'>+        core-vcc-supplies: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,hdmi-tx-8974</div><div class='add'>+              - qcom,hdmi-tx-8084</div><div class='add'>+              - qcom,hdmi-tx-8994</div><div class='add'>+              - qcom,hdmi-tx-8996</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mdp_core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: core</div><div class='add'>+            - const: alt_iface</div><div class='add'>+            - const: extp</div><div class='add'>+        hdmi-mux-supplies: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    hdmi: hdmi@4a00000 {</div><div class='add'>+      compatible = "qcom,hdmi-tx-8960";</div><div class='add'>+      reg-names = "core_physical";</div><div class='add'>+      reg = &lt;0x04a00000 0x2f0&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clock-names = "core",</div><div class='add'>+                    "master_iface",</div><div class='add'>+                    "slave_iface";</div><div class='add'>+      clocks = &lt;&amp;clk 61&gt;,</div><div class='add'>+               &lt;&amp;clk 72&gt;,</div><div class='add'>+               &lt;&amp;clk 98&gt;;</div><div class='add'>+      hpd-gpios = &lt;&amp;msmgpio 72 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+      core-vdda-supply = &lt;&amp;pm8921_hdmi_mvs&gt;;</div><div class='add'>+      hdmi-mux-supply = &lt;&amp;ext_3p3v&gt;;</div><div class='add'>+      pinctrl-names = "default", "sleep";</div><div class='add'>+      pinctrl-0 = &lt;&amp;hpd_active  &amp;ddc_active  &amp;cec_active&gt;;</div><div class='add'>+      pinctrl-1 = &lt;&amp;hpd_suspend &amp;ddc_suspend &amp;cec_suspend&gt;;</div><div class='add'>+</div><div class='add'>+      phys = &lt;&amp;hdmi_phy&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8996.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,mmcc-msm8996.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    hdmi@9a0000 {</div><div class='add'>+      compatible = "qcom,hdmi-tx-8996";</div><div class='add'>+      reg = &lt;0x009a0000 0x50c&gt;,</div><div class='add'>+            &lt;0x00070000 0x6158&gt;,</div><div class='add'>+            &lt;0x009e0000 0xfff&gt;;</div><div class='add'>+      reg-names = "core_physical",</div><div class='add'>+                  "qfprom_physical",</div><div class='add'>+                  "hdcp_physical";</div><div class='add'>+</div><div class='add'>+      interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+      interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='add'>+               &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;mmcc MDSS_HDMI_CLK&gt;,</div><div class='add'>+               &lt;&amp;mmcc MDSS_HDMI_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;mmcc MDSS_EXTPCLK_CLK&gt;;</div><div class='add'>+      clock-names = "mdp_core",</div><div class='add'>+                    "iface",</div><div class='add'>+                    "core",</div><div class='add'>+                    "alt_iface",</div><div class='add'>+                    "extp";</div><div class='add'>+</div><div class='add'>+      phys = &lt;&amp;hdmi_phy&gt;;</div><div class='add'>+      #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+      pinctrl-names = "default", "sleep";</div><div class='add'>+      pinctrl-0 = &lt;&amp;hdmi_hpd_active &amp;hdmi_ddc_active&gt;;</div><div class='add'>+      pinctrl-1 = &lt;&amp;hdmi_hpd_suspend &amp;hdmi_ddc_suspend&gt;;</div><div class='add'>+</div><div class='add'>+      core-vdda-supply = &lt;&amp;vreg_l12a_1p8&gt;;</div><div class='add'>+      core-vcc-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+</div><div class='add'>+      ports {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        port@0 {</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          endpoint {</div><div class='add'>+            remote-endpoint = &lt;&amp;mdp5_intf3_out&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/mdp4.yaml b/Documentation/devicetree/bindings/display/msm/mdp4.yaml<br/>index f63f60fea27c..35204a287579 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/mdp4.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/mdp4.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/mdp4.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/mdp4.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/msm/mdp4.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/mdp4.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Adreno/Snapdragon MDP4 display controller</div><div class='ctx'> </div><div class='hunk'>@@ -36,7 +36,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   iommus:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt<br/>deleted file mode 100644<br/>index 43d11279c925..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/mdp5.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/msm/mdp5.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,160 +0,0 @@</div><div class='del'>-Qualcomm adreno/snapdragon MDP5 display controller</div><div class='del'>-</div><div class='del'>-Description:</div><div class='del'>-</div><div class='del'>-This is the bindings documentation for the Mobile Display Subsytem(MDSS) that</div><div class='del'>-encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display</div><div class='del'>-controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996.</div><div class='del'>-</div><div class='del'>-MDSS:</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:</div><div class='del'>-  * "qcom,mdss" - MDSS</div><div class='del'>-- reg: Physical base address and length of the controller's registers.</div><div class='del'>-- reg-names: The names of register regions. The following regions are required:</div><div class='del'>-  * "mdss_phys"</div><div class='del'>-  * "vbif_phys"</div><div class='del'>-- interrupts: The interrupt signal from MDSS.</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an interrupt</div><div class='del'>-  source, should be 1.</div><div class='del'>-- power-domains: a power domain consumer specifier according to</div><div class='del'>-  Documentation/devicetree/bindings/power/power_domain.txt</div><div class='del'>-- clocks: device clocks. See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names: the following clocks are required.</div><div class='del'>-  * "iface"</div><div class='del'>-  * "bus"</div><div class='del'>-  * "vsync"</div><div class='del'>-- #address-cells: number of address cells for the MDSS children. Should be 1.</div><div class='del'>-- #size-cells: Should be 1.</div><div class='del'>-- ranges: parent bus address space is the same as the child bus address space.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clock-names: the following clocks are optional:</div><div class='del'>-  * "lut"</div><div class='del'>-</div><div class='del'>-MDP5:</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:</div><div class='del'>-  * "qcom,mdp5" - MDP5</div><div class='del'>-- reg: Physical base address and length of the controller's registers.</div><div class='del'>-- reg-names: The names of register regions. The following regions are required:</div><div class='del'>-  * "mdp_phys"</div><div class='del'>-- interrupts: Interrupt line from MDP5 to MDSS interrupt controller.</div><div class='del'>-- clocks: device clocks. See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names: the following clocks are required.</div><div class='del'>--   * "bus"</div><div class='del'>--   * "iface"</div><div class='del'>--   * "core"</div><div class='del'>--   * "vsync"</div><div class='del'>-- ports: contains the list of output ports from MDP. These connect to interfaces</div><div class='del'>-  that are external to the MDP hardware, such as HDMI, DSI, EDP etc (LVDS is a</div><div class='del'>-  special case since it is a part of the MDP block itself).</div><div class='del'>-</div><div class='del'>-  Each output port contains an endpoint that describes how it is connected to an</div><div class='del'>-  external interface. These are described by the standard properties documented</div><div class='del'>-  here:</div><div class='del'>-	Documentation/devicetree/bindings/graph.txt</div><div class='del'>-	Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-  The availability of output ports can vary across SoC revisions:</div><div class='del'>-</div><div class='del'>-  For MSM8974 and APQ8084:</div><div class='del'>-	 Port 0 -&gt; MDP_INTF0 (eDP)</div><div class='del'>-	 Port 1 -&gt; MDP_INTF1 (DSI1)</div><div class='del'>-	 Port 2 -&gt; MDP_INTF2 (DSI2)</div><div class='del'>-	 Port 3 -&gt; MDP_INTF3 (HDMI)</div><div class='del'>-</div><div class='del'>-  For MSM8916:</div><div class='del'>-	 Port 0 -&gt; MDP_INTF1 (DSI1)</div><div class='del'>-</div><div class='del'>-  For MSM8994 and MSM8996:</div><div class='del'>-	 Port 0 -&gt; MDP_INTF1 (DSI1)</div><div class='del'>-	 Port 1 -&gt; MDP_INTF2 (DSI2)</div><div class='del'>-	 Port 2 -&gt; MDP_INTF3 (HDMI)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clock-names: the following clocks are optional:</div><div class='del'>-  * "lut"</div><div class='del'>-  * "tbu"</div><div class='del'>-  * "tbu_rt"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	mdss: mdss@1a00000 {</div><div class='del'>-		compatible = "qcom,mdss";</div><div class='del'>-		reg = &lt;0x1a00000 0x1000&gt;,</div><div class='del'>-		      &lt;0x1ac8000 0x3000&gt;;</div><div class='del'>-		reg-names = "mdss_phys", "vbif_phys";</div><div class='del'>-</div><div class='del'>-		power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;;</div><div class='del'>-		clock-names = "iface",</div><div class='del'>-			      "bus",</div><div class='del'>-			      "vsync"</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;0 72 0&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		mdp: mdp@1a01000 {</div><div class='del'>-			compatible = "qcom,mdp5";</div><div class='del'>-			reg = &lt;0x1a01000 0x90000&gt;;</div><div class='del'>-			reg-names = "mdp_phys";</div><div class='del'>-</div><div class='del'>-			interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='del'>-			interrupts = &lt;0 0&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;;</div><div class='del'>-			clock-names = "iface",</div><div class='del'>-				      "bus",</div><div class='del'>-				      "core",</div><div class='del'>-				      "vsync";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					mdp5_intf1_out: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dsi0: dsi@1a98000 {</div><div class='del'>-			...</div><div class='del'>-			ports {</div><div class='del'>-				...</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					dsi0_in: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;mdp5_intf1_out&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-				...</div><div class='del'>-			};</div><div class='del'>-			...</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dsi_phy0: dsi-phy@1a98300 {</div><div class='del'>-			...</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/mdss-common.yaml b/Documentation/devicetree/bindings/display/msm/mdss-common.yaml<br/>new file mode 100644<br/>index 000000000000..ccd7d6417523<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/mdss-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/mdss-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/mdss-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display MDSS common properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc.</div><div class='add'>+</div><div class='add'>+# Do not select this by default, otherwise it is also selected for qcom,mdss</div><div class='add'>+# devices.</div><div class='add'>+select:</div><div class='add'>+  false</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^display-subsystem@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    const: mdss</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#address-cells": true</div><div class='add'>+</div><div class='add'>+  "#size-cells": true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0</div><div class='add'>+      - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Interconnect path from mdp0 (or a single mdp) port to the data bus</div><div class='add'>+      - description: Interconnect path from mdp1 port to the data bus</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp0-mem</div><div class='add'>+      - const: mdp1-mem</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: MDSS_CORE reset</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - iommus</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml<br/>new file mode 100644<br/>index 000000000000..a763cf8da122<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,mdp5.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Adreno/Snapdragon Mobile Display controller (MDP5)</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MDP5 display controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994</div><div class='add'>+  and MSM8996.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: qcom,mdp5</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,apq8084-mdp5</div><div class='add'>+              - qcom,msm8916-mdp5</div><div class='add'>+              - qcom,msm8917-mdp5</div><div class='add'>+              - qcom,msm8953-mdp5</div><div class='add'>+              - qcom,msm8974-mdp5</div><div class='add'>+              - qcom,msm8976-mdp5</div><div class='add'>+              - qcom,msm8994-mdp5</div><div class='add'>+              - qcom,msm8996-mdp5</div><div class='add'>+              - qcom,sdm630-mdp5</div><div class='add'>+              - qcom,sdm660-mdp5</div><div class='add'>+          - const: qcom,mdp5</div><div class='add'>+</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: '^display-controller@[0-9a-f]+$'</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp_phys</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - minItems: 4</div><div class='add'>+        items:</div><div class='add'>+          - const: iface</div><div class='add'>+          - const: bus</div><div class='add'>+          - const: core</div><div class='add'>+          - const: vsync</div><div class='add'>+          - const: lut</div><div class='add'>+          - const: tbu</div><div class='add'>+          - const: tbu_rt</div><div class='add'>+        # MSM8996 has additional iommu clock</div><div class='add'>+      - items:</div><div class='add'>+          - const: iface</div><div class='add'>+          - const: bus</div><div class='add'>+          - const: core</div><div class='add'>+          - const: iommu</div><div class='add'>+          - const: vsync</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Interconnect path from mdp0 (or a single mdp) port to the data bus</div><div class='add'>+      - description: Interconnect path from mdp1 port to the data bus</div><div class='add'>+      - description: Interconnect path from rotator port to the data bus</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp0-mem</div><div class='add'>+      - const: mdp1-mem</div><div class='add'>+      - const: rotator-mem</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    items:</div><div class='add'>+      - description: apps SMMU with the Stream-ID mask for Hard-Fail port0</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    description: &gt;</div><div class='add'>+      Contains the list of output ports from DPU device. These ports</div><div class='add'>+      connect to interfaces that are external to the DPU hardware,</div><div class='add'>+      such as DSI, DP etc. MDP5 devices support up to 4 ports:</div><div class='add'>+      one or two DSI ports, HDMI and eDP.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port@[0-3]+$":</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+    # at least one port is required</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    display-controller@1a01000 {</div><div class='add'>+        compatible = "qcom,mdp5";</div><div class='add'>+        reg = &lt;0x1a01000 0x90000&gt;;</div><div class='add'>+        reg-names = "mdp_phys";</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "iface",</div><div class='add'>+                      "bus",</div><div class='add'>+                      "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml<br/>new file mode 100644<br/>index 000000000000..b0100105e428<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,211 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Mobile Display SubSystem (MDSS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is the bindings documentation for the Mobile Display Subsytem(MDSS) that</div><div class='add'>+  encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^display-subsystem@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,mdss</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: mdss_phys</div><div class='add'>+      - const: vbif_phys</div><div class='add'>+      - const: vbif_nrt_phys</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+      The MDSS power domain provided by GCC</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    oneOf:</div><div class='add'>+      - minItems: 3</div><div class='add'>+        items:</div><div class='add'>+          - description: Display abh clock</div><div class='add'>+          - description: Display axi clock</div><div class='add'>+          - description: Display vsync clock</div><div class='add'>+          - description: Display core clock</div><div class='add'>+      - minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - description: Display abh clock</div><div class='add'>+          - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - minItems: 3</div><div class='add'>+        items:</div><div class='add'>+          - const: iface</div><div class='add'>+          - const: bus</div><div class='add'>+          - const: vsync</div><div class='add'>+          - const: core</div><div class='add'>+      - minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - const: iface</div><div class='add'>+          - const: core</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: MDSS_CORE reset</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[1-9a-f][0-9a-f]*$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: qcom,mdp5</div><div class='add'>+</div><div class='add'>+  "^dsi@[1-9a-f][0-9a-f]*$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[1-9a-f][0-9a-f]*$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,dsi-phy-14nm</div><div class='add'>+          - qcom,dsi-phy-14nm-660</div><div class='add'>+          - qcom,dsi-phy-14nm-8953</div><div class='add'>+          - qcom,dsi-phy-20nm</div><div class='add'>+          - qcom,dsi-phy-28nm-hpm</div><div class='add'>+          - qcom,dsi-phy-28nm-lp</div><div class='add'>+          - qcom,hdmi-phy-8084</div><div class='add'>+          - qcom,hdmi-phy-8660</div><div class='add'>+          - qcom,hdmi-phy-8960</div><div class='add'>+          - qcom,hdmi-phy-8974</div><div class='add'>+          - qcom,hdmi-phy-8996</div><div class='add'>+</div><div class='add'>+  "^hdmi-tx@[1-9a-f][0-9a-f]*$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,hdmi-tx-8084</div><div class='add'>+          - qcom,hdmi-tx-8660</div><div class='add'>+          - qcom,hdmi-tx-8960</div><div class='add'>+          - qcom,hdmi-tx-8974</div><div class='add'>+          - qcom,hdmi-tx-8994</div><div class='add'>+          - qcom,hdmi-tx-8996</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    display-subsystem@1a00000 {</div><div class='add'>+        compatible = "qcom,mdss";</div><div class='add'>+        reg = &lt;0x1a00000 0x1000&gt;,</div><div class='add'>+              &lt;0x1ac8000 0x3000&gt;;</div><div class='add'>+        reg-names = "mdss_phys", "vbif_phys";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;gcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "iface",</div><div class='add'>+                      "bus",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@1a01000 {</div><div class='add'>+            compatible = "qcom,msm8916-mdp5", "qcom,mdp5";</div><div class='add'>+            reg = &lt;0x01a01000 0x89000&gt;;</div><div class='add'>+            reg-names = "mdp_phys";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_MDSS_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "iface",</div><div class='add'>+                      "bus",</div><div class='add'>+                      "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+            iommus = &lt;&amp;apps_iommu 4&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    mdp5_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..8d3cd46260fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,msm8998-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display DPU on MSM8998</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8998-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for regdma register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+      - description: Address offset and size for non-realtime vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: regdma</div><div class='add'>+      - const: vbif</div><div class='add'>+      - const: vbif_nrt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display axi clock</div><div class='add'>+      - description: Display mem-noc clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: mnoc</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,mmcc-msm8998.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@c901000 {</div><div class='add'>+        compatible = "qcom,msm8998-dpu";</div><div class='add'>+        reg = &lt;0x0c901000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0c9a8e00 0xf0&gt;,</div><div class='add'>+              &lt;0x0c9b0000 0x2008&gt;,</div><div class='add'>+              &lt;0x0c9b8000 0x1040&gt;;</div><div class='add'>+        reg-names = "mdp", "regdma", "vbif", "vbif_nrt";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc MNOC_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "mnoc", "core", "vsync";</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmpd MSM8998_VDDMX&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..3c2b6ed98a56<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,msm8998-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,272 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,msm8998-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8998 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@somainline.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='add'>+  bindings of MDSS are mentioned for MSM8998 target.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8998-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock</div><div class='add'>+      - description: Display AXI clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,msm8998-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,msm8998-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-10nm-8998</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,mmcc-msm8998.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@c900000 {</div><div class='add'>+        compatible = "qcom,msm8998-mdss";</div><div class='add'>+        reg = &lt;0x0c900000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "core";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        iommus = &lt;&amp;mmss_smmu 0&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;mmcc MDSS_GDSC&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@c901000 {</div><div class='add'>+            compatible = "qcom,msm8998-dpu";</div><div class='add'>+            reg = &lt;0x0c901000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0c9a8e00 0xf0&gt;,</div><div class='add'>+                  &lt;0x0c9b0000 0x2008&gt;,</div><div class='add'>+                  &lt;0x0c9b8000 0x1040&gt;;</div><div class='add'>+            reg-names = "mdp", "regdma", "vbif", "vbif_nrt";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MNOC_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "bus", "mnoc", "core", "vsync";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmpd MSM8998_VDDMX&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@c994000 {</div><div class='add'>+            compatible = "qcom,msm8998-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0c994000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;mmcc MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;mmcc BYTE0_CLK_SRC&gt;, &lt;&amp;mmcc PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmpd MSM8998_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@c994400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-10nm-8998";</div><div class='add'>+            reg = &lt;0x0c994400 0x200&gt;,</div><div class='add'>+                  &lt;0x0c994600 0x280&gt;,</div><div class='add'>+                  &lt;0x0c994a00 0x1e0&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+            vdds-supply = &lt;&amp;pm8998_l1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@c996000 {</div><div class='add'>+            compatible = "qcom,msm8998-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0c996000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;mmcc MDSS_BYTE1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_PCLK1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_ESC1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;mmcc MDSS_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;mmcc BYTE1_CLK_SRC&gt;, &lt;&amp;mmcc PCLK1_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi1_phy 0&gt;, &lt;&amp;dsi1_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmpd MSM8998_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi1_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi1_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi1_phy: phy@c996400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-10nm-8998";</div><div class='add'>+            reg = &lt;0x0c996400 0x200&gt;,</div><div class='add'>+                  &lt;0x0c996600 0x280&gt;,</div><div class='add'>+                  &lt;0x0c996a00 0x10e&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;mmcc MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+            vdds-supply = &lt;&amp;pm8998_l1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..414f4e7ebdf1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,qcm2290-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display DPU on QCM2290</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Loic Poulain &lt;loic.poulain@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,qcm2290-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AXI clock from gcc</div><div class='add'>+      - description: Display AHB clock from dispcc</div><div class='add'>+      - description: Display core clock from dispcc</div><div class='add'>+      - description: Display lut clock from dispcc</div><div class='add'>+      - description: Display vsync clock from dispcc</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: core</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-qcm2290.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-qcm2290.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@5e01000 {</div><div class='add'>+        compatible = "qcom,qcm2290-dpu";</div><div class='add'>+        reg = &lt;0x05e01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x05eb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus", "iface", "core", "lut", "vsync";</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmpd QCM2290_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..2995b84b2cd4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,qcm2290-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,200 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,qcm2290-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QCM220 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Loic Poulain &lt;loic.poulain@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS</div><div class='add'>+  are mentioned for QCM2290 target.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,qcm2290-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display AXI clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,qcm2290-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-ctrl-6g-qcm2290</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-14nm-2290</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-qcm2290.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-qcm2290.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,qcm2290.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@5e00000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        compatible = "qcom,qcm2290-mdss";</div><div class='add'>+        reg = &lt;0x05e00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmrt_virt MASTER_MDP0 &amp;bimc SLAVE_EBI1&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x420 0x2&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x421 0x0&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@5e01000 {</div><div class='add'>+            compatible = "qcom,qcm2290-dpu";</div><div class='add'>+            reg = &lt;0x05e01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x05eb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus", "iface", "core", "lut", "vsync";</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmpd QCM2290_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@5e94000 {</div><div class='add'>+            compatible = "qcom,dsi-ctrl-6g-qcm2290";</div><div class='add'>+            reg = &lt;0x05e94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmpd QCM2290_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@5e94400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-14nm-2290";</div><div class='add'>+            reg = &lt;0x05e94400 0x100&gt;,</div><div class='add'>+                  &lt;0x05e94500 0x300&gt;,</div><div class='add'>+                  &lt;0x05e94800 0x188&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vcca-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..1fb8321d9ee8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sc7180-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display DPU on SC7180</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc7180-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display rotator clock</div><div class='add'>+      - description: Display lut clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: rot</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sc7180-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_ROT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus", "iface", "rot", "lut", "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dp_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..42ef06edddc4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sc7180-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,308 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7180 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='add'>+  bindings of MDSS are mentioned for SC7180 target.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc7180-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display AHB clock from dispcc</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: ahb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sc7180-dpu</div><div class='add'>+</div><div class='add'>+  "^displayport-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sc7180-dp</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sc7180-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-10nm</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        compatible = "qcom,sc7180-mdss";</div><div class='add'>+        reg = &lt;0xae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "ahb", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP0 &amp;mc_virt SLAVE_EBI1&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x800 0x2&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sc7180-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ROT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus", "iface", "rot", "lut", "core",</div><div class='add'>+                          "vsync";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    dpu_intf0_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dp_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sc7180-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi_phy 0&gt;, &lt;&amp;dsi_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-187500000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-10nm";</div><div class='add'>+            reg = &lt;0x0ae94400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae94600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae94a00 0x1e0&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                    "dsi_phy_lane",</div><div class='add'>+                    "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        displayport-controller@ae90000 {</div><div class='add'>+            compatible = "qcom,sc7180-dp";</div><div class='add'>+</div><div class='add'>+            reg = &lt;0xae90000 0x200&gt;,</div><div class='add'>+                  &lt;0xae90200 0x200&gt;,</div><div class='add'>+                  &lt;0xae90400 0xc00&gt;,</div><div class='add'>+                  &lt;0xae91000 0x400&gt;,</div><div class='add'>+                  &lt;0xae91400 0x400&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;12&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='add'>+            clock-names = "core_iface", "core_aux", "ctrl_link",</div><div class='add'>+                          "ctrl_link_iface", "stream_pixel";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dp_phy 0&gt;, &lt;&amp;dp_phy 1&gt;;</div><div class='add'>+            phys = &lt;&amp;dp_phy&gt;;</div><div class='add'>+            phy-names = "dp";</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='add'>+</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dp_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dp_out: endpoint { };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-160000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;160000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-270000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-540000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-810000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..26dc073bd19a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display DPU on SC7280</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc7280-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display sf axi clock</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display lut clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sc7280-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus",</div><div class='add'>+                      "nrt_bus",</div><div class='add'>+                      "iface",</div><div class='add'>+                      "lut",</div><div class='add'>+                      "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;edp_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..078e1d1a7d2f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sc7280-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,427 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sc7280-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7280 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='add'>+  bindings of MDSS are mentioned for SC7280.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc7280-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display AHB clock from dispcc</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: ahb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sc7280-dpu</div><div class='add'>+</div><div class='add'>+  "^displayport-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sc7280-dp</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sc7280-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^edp@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sc7280-edp</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,sc7280-dsi-phy-7nm</div><div class='add'>+          - qcom,sc7280-edp-phy</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        compatible = "qcom,sc7280-mdss";</div><div class='add'>+        reg = &lt;0xae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+        power-domains = &lt;&amp;dispcc DISP_CC_MDSS_CORE_GDSC&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface",</div><div class='add'>+                      "ahb",</div><div class='add'>+                      "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP0 &amp;mc_virt SLAVE_EBI1&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x900 0x402&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sc7280-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus",</div><div class='add'>+                          "nrt_bus",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "lut",</div><div class='add'>+                          "core",</div><div class='add'>+                          "vsync";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf5_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;edp_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    dpu_intf0_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dp_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sc7280-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;mdss_dsi_phy 0&gt;, &lt;&amp;mdss_dsi_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;mdss_dsi_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-187500000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdss_dsi_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,sc7280-dsi-phy-7nm";</div><div class='add'>+            reg = &lt;0x0ae94400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae94600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae94900 0x280&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_supply&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        edp@aea0000 {</div><div class='add'>+            compatible = "qcom,sc7280-edp";</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;edp_hot_plug_det&gt;;</div><div class='add'>+</div><div class='add'>+            reg = &lt;0xaea0000 0x200&gt;,</div><div class='add'>+                  &lt;0xaea0200 0x200&gt;,</div><div class='add'>+                  &lt;0xaea0400 0xc00&gt;,</div><div class='add'>+                  &lt;0xaea1000 0x400&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;14&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_EDP_AUX_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_EDP_LINK_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_EDP_LINK_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_EDP_PIXEL_CLK&gt;;</div><div class='add'>+            clock-names = "core_iface",</div><div class='add'>+                          "core_aux",</div><div class='add'>+                          "ctrl_link",</div><div class='add'>+                          "ctrl_link_iface",</div><div class='add'>+                          "stream_pixel";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_EDP_LINK_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_EDP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;mdss_edp_phy 0&gt;, &lt;&amp;mdss_edp_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;mdss_edp_phy&gt;;</div><div class='add'>+            phy-names = "dp";</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;edp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    edp_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf5_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    mdss_edp_out: endpoint { };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            edp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-160000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;160000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-270000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-540000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-810000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdss_edp_phy: phy@aec2a00 {</div><div class='add'>+            compatible = "qcom,sc7280-edp-phy";</div><div class='add'>+</div><div class='add'>+            reg = &lt;0xaec2a00 0x19c&gt;,</div><div class='add'>+                  &lt;0xaec2200 0xa0&gt;,</div><div class='add'>+                  &lt;0xaec2600 0xa0&gt;,</div><div class='add'>+                  &lt;0xaec2000 0x1c0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_EDP_CLKREF_EN&gt;;</div><div class='add'>+            clock-names = "aux",</div><div class='add'>+                          "cfg_ahb";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        displayport-controller@ae90000 {</div><div class='add'>+            compatible = "qcom,sc7280-dp";</div><div class='add'>+</div><div class='add'>+            reg = &lt;0xae90000 0x200&gt;,</div><div class='add'>+                  &lt;0xae90200 0x200&gt;,</div><div class='add'>+                  &lt;0xae90400 0xc00&gt;,</div><div class='add'>+                  &lt;0xae91000 0x400&gt;,</div><div class='add'>+                  &lt;0xae91400 0x400&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;12&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_AUX_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK&gt;;</div><div class='add'>+            clock-names = "core_iface",</div><div class='add'>+                          "core_aux",</div><div class='add'>+                          "ctrl_link",</div><div class='add'>+                          "ctrl_link_iface",</div><div class='add'>+                          "stream_pixel";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dp_phy 0&gt;, &lt;&amp;dp_phy 1&gt;;</div><div class='add'>+            phys = &lt;&amp;dp_phy&gt;;</div><div class='add'>+            phy-names = "dp";</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='add'>+</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dp_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf0_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dp_out: endpoint { };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-160000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;160000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-270000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;270000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-540000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;540000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-810000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;810000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..f2c8e16cf067<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC8280XP Display Processing Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for SC8280XP Display Processing Unit.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc8280xp-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display sf axi clock</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display lut clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sc8280xp-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc0 DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc0 DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc0 DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc0 DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus",</div><div class='add'>+                      "nrt_bus",</div><div class='add'>+                      "iface",</div><div class='add'>+                      "lut",</div><div class='add'>+                      "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;dispcc0 DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                          &lt;&amp;dispcc0 DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;460000000&gt;,</div><div class='add'>+                               &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC8280XP_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mdss0_dp0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@4 {</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mdss0_dp1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@5 {</div><div class='add'>+                reg = &lt;5&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mdss0_dp3_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@6 {</div><div class='add'>+                reg = &lt;6&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mdss0_dp2_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..c239544bc37f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC8280XP Mobile Display Subsystem</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc8280xp-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display AHB clock from dispcc</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: ahb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sc8280xp-dpu</div><div class='add'>+</div><div class='add'>+  "^displayport-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,sc8280xp-dp</div><div class='add'>+          - qcom,sc8280xp-edp</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        compatible = "qcom,sc8280xp-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;dispcc0 MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc0 DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc0 DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface",</div><div class='add'>+                      "ahb",</div><div class='add'>+                      "core";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;dispcc0 DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP0 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_MDP1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1000 0x402&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sc8280xp-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+            &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc0 DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc0 DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc0 DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc0 DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus",</div><div class='add'>+                          "nrt_bus",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "lut",</div><div class='add'>+                          "core",</div><div class='add'>+                          "vsync";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc0 DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdss0_mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SC8280XP_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss0&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss0_dp0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss0_dp1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@5 {</div><div class='add'>+                    reg = &lt;5&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss0_dp3_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@6 {</div><div class='add'>+                    reg = &lt;6&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mdss0_dp2_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..0f7765d832e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sdm845-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display DPU on SDM845</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sdm845-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display GCC bus clock</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display axi clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: gcc-bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sdm845-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "gcc-bus", "iface", "bus", "core", "vsync";</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..6ecb00920d7f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sdm845-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,280 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sdm845-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SDM845 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krishna Manikandan &lt;quic_mkrishn@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='add'>+  bindings of MDSS are mentioned for SDM845 target.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sdm845-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sdm845-dpu</div><div class='add'>+</div><div class='add'>+  "^displayport-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sdm845-dp</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sdm845-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-10nm</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        compatible = "qcom,sdm845-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x880 0x8&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0xc80 0x8&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sdm845-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "gcc-bus", "iface", "bus", "core", "vsync";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;;</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sdm845-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-10nm";</div><div class='add'>+            reg = &lt;0x0ae94400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae94600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae94a00 0x1e0&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae96000 {</div><div class='add'>+            compatible = "qcom,sdm845-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae96000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi1_phy 0&gt;, &lt;&amp;dsi1_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi1_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi1_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi1_phy: phy@ae96400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-10nm";</div><div class='add'>+            reg = &lt;0x0ae96400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae96600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae96a00 0x10e&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..bf62c2f5325a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm6115-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm6115-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Display DPU on SM6115</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm6115-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: MDP register set</div><div class='add'>+      - description: VBIF register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AXI</div><div class='add'>+      - description: Display AHB</div><div class='add'>+      - description: Display core</div><div class='add'>+      - description: Display lut</div><div class='add'>+      - description: Display rotator</div><div class='add'>+      - description: Display vsync</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: core</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: rot</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm6115-dispcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm6115.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@5e01000 {</div><div class='add'>+        compatible = "qcom,sm6115-dpu";</div><div class='add'>+        reg = &lt;0x05e01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x05eb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_ROT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus", "iface", "core", "lut", "rot", "vsync";</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmpd SM6115_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..b9f83088f370<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm6115-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,187 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm6115-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM6115 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS</div><div class='add'>+  are mentioned for SM6115 target.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm6115-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display AXI clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm6115-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        oneOf:</div><div class='add'>+          - items:</div><div class='add'>+              - const: qcom,sm6115-dsi-ctrl</div><div class='add'>+              - const: qcom,mdss-dsi-ctrl</div><div class='add'>+          - description: Old binding, please don't use</div><div class='add'>+            deprecated: true</div><div class='add'>+            const: qcom,dsi-ctrl-6g-qcm2290</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-14nm-2290</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm6115-dispcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm6115.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@5e00000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        compatible = "qcom,sm6115-mdss";</div><div class='add'>+        reg = &lt;0x05e00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x420 0x2&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x421 0x0&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@5e01000 {</div><div class='add'>+            compatible = "qcom,sm6115-dpu";</div><div class='add'>+            reg = &lt;0x05e01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x05eb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ROT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus", "iface", "core", "lut", "rot", "vsync";</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmpd SM6115_VDDCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@5e94000 {</div><div class='add'>+            compatible = "qcom,sm6115-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x05e94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;, &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmpd SM6115_VDDCX&gt;;</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@5e94400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-14nm-2290";</div><div class='add'>+            reg = &lt;0x05e94400 0x100&gt;,</div><div class='add'>+                  &lt;0x05e94500 0x300&gt;,</div><div class='add'>+                  &lt;0x05e94800 0x188&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;, &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..2b3f3fe9bdf7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8150-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,92 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8150-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8150 Display DPU</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8150-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sm8150.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8150.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8150.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sm8150-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "core", "vsync";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM8150_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..5182e958e069<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,332 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8150-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8150 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='add'>+  bindings of MDSS are mentioned for SM8150 target.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: qcom,sm8150-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display sf axi clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm8150-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sm8150-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-7nm</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sm8150.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8150.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8150.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        compatible = "qcom,sm8150-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP_PORT0 &amp;mc_virt SLAVE_EBI_CH0&gt;,</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_MDP_PORT1 &amp;mc_virt SLAVE_EBI_CH0&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "nrt_bus", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x800 0x420&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sm8150-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "bus", "core", "vsync";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8150_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mdp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-171428571 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;171428571&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-345000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;345000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-460000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;460000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sm8150-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8150_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-187500000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-7nm";</div><div class='add'>+            reg = &lt;0x0ae94400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae94600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae94900 0x260&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae96000 {</div><div class='add'>+            compatible = "qcom,sm8150-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae96000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi1_phy 0&gt;, &lt;&amp;dsi1_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8150_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi1_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi1_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi1_phy: phy@ae96400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-7nm";</div><div class='add'>+            reg = &lt;0x0ae96400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae96600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae96900 0x260&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..687c8c170cd4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8250-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8250 Display DPU</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8250-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sm8250-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "core", "vsync";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM8250_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..368d3db0ce96<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8250-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,334 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8250-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8250 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates</div><div class='add'>+  sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree</div><div class='add'>+  bindings of MDSS are mentioned for SM8250 target.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8250-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display sf axi clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm8250-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sm8250-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-7nm</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        compatible = "qcom,sm8250-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP_PORT0 &amp;mc_virt SLAVE_EBI_CH0&gt;,</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_MDP_PORT1 &amp;mc_virt SLAVE_EBI_CH0&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "nrt_bus", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x820 0x402&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sm8250-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "bus", "core", "vsync";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8250_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mdp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-200000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-345000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;345000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-460000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;460000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sm8250-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8250_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-187500000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-7nm";</div><div class='add'>+            reg = &lt;0x0ae94400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae94600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae94900 0x260&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae96000 {</div><div class='add'>+            compatible = "qcom,sm8250-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae96000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi1_phy 0&gt;, &lt;&amp;dsi1_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8250_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi1_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi1_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi1_phy: phy@ae96400 {</div><div class='add'>+            compatible = "qcom,dsi-phy-7nm";</div><div class='add'>+            reg = &lt;0x0ae96400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae96600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae96900 0x260&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..120500395c9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8350-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8350-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8350 Display DPU</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Robert Foss &lt;robert.foss@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8350-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display sf axi clock</div><div class='add'>+      - description: Display ahb clock</div><div class='add'>+      - description: Display lut clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+      - description: Display vsync clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sm8350-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus",</div><div class='add'>+                      "nrt_bus",</div><div class='add'>+                      "iface",</div><div class='add'>+                      "lut",</div><div class='add'>+                      "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM8350_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                dpu_intf1_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdp_opp_table: opp-table {</div><div class='add'>+            compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+            opp-200000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-300000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-345000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;345000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-460000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;460000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..4d94dbff3054<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8350-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,223 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8350-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8350 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Robert Foss &lt;robert.foss@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MSM Mobile Display Subsystem(MDSS) that encapsulates sub-blocks like</div><div class='add'>+  DPU display controller, DSI and DP interfaces etc.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: qcom,sm8350-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB clock from gcc</div><div class='add'>+      - description: Display hf axi clock</div><div class='add'>+      - description: Display sf axi clock</div><div class='add'>+      - description: Display core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp0-mem</div><div class='add'>+      - const: mdp1-mem</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm8350-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sm8350-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,dsi-phy-5nm-8350</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,dispcc-sm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        compatible = "qcom,sm8350-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP0 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_MDP1 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+        resets = &lt;&amp;dispcc DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "nrt_bus", "core";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x820 0x402&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sm8350-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus",</div><div class='add'>+                          "nrt_bus",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "lut",</div><div class='add'>+                          "core",</div><div class='add'>+                          "vsync";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8350_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mdp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-200000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-345000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;345000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-460000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;460000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0: dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sm8350-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                      "byte_intf",</div><div class='add'>+                      "pixel",</div><div class='add'>+                      "core",</div><div class='add'>+                      "iface",</div><div class='add'>+                      "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+                          &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;mdss_dsi0_phy 0&gt;,</div><div class='add'>+                                 &lt;&amp;mdss_dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8350_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;mdss_dsi0_phy&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+             #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..0d17ece1c453<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8450-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8450-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8450 Display DPU</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8450-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display hf axi</div><div class='add'>+      - description: Display sf axi</div><div class='add'>+      - description: Display ahb</div><div class='add'>+      - description: Display lut</div><div class='add'>+      - description: Display core</div><div class='add'>+      - description: Display vsync</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8450-dispcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8450.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8450.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sm8450-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus",</div><div class='add'>+                      "nrt_bus",</div><div class='add'>+                      "iface",</div><div class='add'>+                      "lut",</div><div class='add'>+                      "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM8450_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                dpu_intf1_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                dpu_intf2_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdp_opp_table: opp-table {</div><div class='add'>+            compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+            opp-172000000{</div><div class='add'>+                opp-hz = /bits/ 64 &lt;172000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_low_svs_d1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-200000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-325000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;325000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-375000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;375000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-500000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..f26eb5643aed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,345 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8450-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8450 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SM8450 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like</div><div class='add'>+  DPU display controller, DSI and DP interfaces etc.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8450-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB</div><div class='add'>+      - description: Display hf AXI</div><div class='add'>+      - description: Display sf AXI</div><div class='add'>+      - description: Display core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm8450-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sm8450-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm8450-dsi-phy-5nm</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8450-dispcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8450.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8450.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        compatible = "qcom,sm8450-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP_DISP 0 &amp;mc_virt SLAVE_EBI1_DISP 0&gt;,</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_MDP_DISP 0 &amp;mc_virt SLAVE_EBI1_DISP 0&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;dispcc DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "nrt_bus", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x2800 0x402&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sm8450-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                    &lt;&amp;gcc GCC_DISP_SF_AXI_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus",</div><div class='add'>+                          "nrt_bus",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "lut",</div><div class='add'>+                          "core",</div><div class='add'>+                          "vsync";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8450_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mdp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-172000000{</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;172000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs_d1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-200000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-325000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;325000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-375000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;375000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-500000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;500000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8450_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-160310000{</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;160310000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs_d1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-187500000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,sm8450-dsi-phy-5nm";</div><div class='add'>+            reg = &lt;0x0ae94400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae94600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae94900 0x260&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae96000 {</div><div class='add'>+            compatible = "qcom,sm8450-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae96000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi1_phy 0&gt;, &lt;&amp;dsi1_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8450_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi1_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi1_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi1_phy: phy@ae96400 {</div><div class='add'>+            compatible = "qcom,sm8450-dsi-phy-5nm";</div><div class='add'>+            reg = &lt;0x0ae96400 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae96600 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae96900 0x260&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+            vdds-supply = &lt;&amp;vreg_dsi_phy&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml<br/>new file mode 100644<br/>index 000000000000..ff58a747bb6f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8550-dpu.yaml</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8550-dpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8550 Display DPU</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/dpu-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8550-dpu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address offset and size for mdp register set</div><div class='add'>+      - description: Address offset and size for vbif register set</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mdp</div><div class='add'>+      - const: vbif</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display AHB</div><div class='add'>+      - description: Display hf axi</div><div class='add'>+      - description: Display MDSS ahb</div><div class='add'>+      - description: Display lut</div><div class='add'>+      - description: Display core</div><div class='add'>+      - description: Display vsync</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nrt_bus</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: lut</div><div class='add'>+      - const: core</div><div class='add'>+      - const: vsync</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-dispcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-gcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-controller@ae01000 {</div><div class='add'>+        compatible = "qcom,sm8550-dpu";</div><div class='add'>+        reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+              &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+        reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        clock-names = "bus",</div><div class='add'>+                      "nrt_bus",</div><div class='add'>+                      "iface",</div><div class='add'>+                      "lut",</div><div class='add'>+                      "core",</div><div class='add'>+                      "vsync";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM8550_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                dpu_intf1_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                dpu_intf2_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdp_opp_table: opp-table {</div><div class='add'>+            compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+            opp-200000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-325000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;325000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-375000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;375000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            opp-514000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;514000000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml<br/>new file mode 100644<br/>index 000000000000..887be33ba108<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/msm/qcom,sm8550-mdss.yaml</a></div><div class='hunk'>@@ -0,0 +1,333 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/msm/qcom,sm8550-mdss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8550 Display MDSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SM8550 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like</div><div class='add'>+  DPU display controller, DSI and DP interfaces etc.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/display/msm/mdss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8550-mdss</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Display MDSS AHB</div><div class='add'>+      - description: Display AHB</div><div class='add'>+      - description: Display hf AXI</div><div class='add'>+      - description: Display core</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm8550-dpu</div><div class='add'>+</div><div class='add'>+  "^dsi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sm8550-dsi-ctrl</div><div class='add'>+          - const: qcom,mdss-dsi-ctrl</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,sm8550-dsi-phy-4nm</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-dispcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-gcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8550-rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    display-subsystem@ae00000 {</div><div class='add'>+        compatible = "qcom,sm8550-mdss";</div><div class='add'>+        reg = &lt;0x0ae00000 0x1000&gt;;</div><div class='add'>+        reg-names = "mdss";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mmss_noc MASTER_MDP 0 &amp;gem_noc SLAVE_LLCC 0&gt;,</div><div class='add'>+                        &lt;&amp;mc_virt MASTER_LLCC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+        interconnect-names = "mdp0-mem", "mdp1-mem";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;dispcc DISP_CC_MDSS_CORE_BCR&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;dispcc MDSS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "nrt_bus", "core";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1c00 0x2&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        display-controller@ae01000 {</div><div class='add'>+            compatible = "qcom,sm8550-dpu";</div><div class='add'>+            reg = &lt;0x0ae01000 0x8f000&gt;,</div><div class='add'>+                  &lt;0x0aeb0000 0x2008&gt;;</div><div class='add'>+            reg-names = "mdp", "vbif";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_DISP_AHB_CLK&gt;,</div><div class='add'>+                    &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_MDP_LUT_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_MDP_CLK&gt;,</div><div class='add'>+                    &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            clock-names = "bus",</div><div class='add'>+                          "nrt_bus",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "lut",</div><div class='add'>+                          "core",</div><div class='add'>+                          "vsync";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_VSYNC_CLK&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;mdp_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8550_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dpu_intf1_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dpu_intf2_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mdp_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-200000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-325000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;325000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-375000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;375000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-514000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;514000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_nom&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae94000 {</div><div class='add'>+            compatible = "qcom,sm8550-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae94000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC0_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE0_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK0_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi0_phy 0&gt;, &lt;&amp;dsi0_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8550_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi0_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi0_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi0_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dsi_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                opp-187500000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;187500000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-300000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;300000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                opp-358000000 {</div><div class='add'>+                    opp-hz = /bits/ 64 &lt;358000000&gt;;</div><div class='add'>+                    required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi0_phy: phy@ae94400 {</div><div class='add'>+            compatible = "qcom,sm8550-dsi-phy-4nm";</div><div class='add'>+            reg = &lt;0x0ae95000 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae95200 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae95500 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@ae96000 {</div><div class='add'>+            compatible = "qcom,sm8550-dsi-ctrl", "qcom,mdss-dsi-ctrl";</div><div class='add'>+            reg = &lt;0x0ae96000 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_ctrl";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;mdss&gt;;</div><div class='add'>+            interrupts = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_INTF_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_ESC1_CLK&gt;,</div><div class='add'>+                     &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_DISP_HF_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "byte",</div><div class='add'>+                          "byte_intf",</div><div class='add'>+                          "pixel",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "bus";</div><div class='add'>+</div><div class='add'>+            assigned-clocks = &lt;&amp;dispcc DISP_CC_MDSS_BYTE1_CLK_SRC&gt;,</div><div class='add'>+                              &lt;&amp;dispcc DISP_CC_MDSS_PCLK1_CLK_SRC&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;dsi1_phy 0&gt;, &lt;&amp;dsi1_phy 1&gt;;</div><div class='add'>+</div><div class='add'>+            operating-points-v2 = &lt;&amp;dsi_opp_table&gt;;</div><div class='add'>+            power-domains = &lt;&amp;rpmhpd SM8550_MMCX&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;dsi1_phy&gt;;</div><div class='add'>+            phy-names = "dsi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    dsi1_in: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dpu_intf2_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    dsi1_out: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi1_phy: phy@ae96400 {</div><div class='add'>+            compatible = "qcom,sm8550-dsi-phy-4nm";</div><div class='add'>+            reg = &lt;0x0ae97000 0x200&gt;,</div><div class='add'>+                  &lt;0x0ae97200 0x280&gt;,</div><div class='add'>+                  &lt;0x0ae97500 0x400&gt;;</div><div class='add'>+            reg-names = "dsi_phy",</div><div class='add'>+                        "dsi_phy_lane",</div><div class='add'>+                        "dsi_pll";</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;dispcc DISP_CC_MDSS_AHB_CLK&gt;,</div><div class='add'>+                     &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "ref";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml b/Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml<br/>index 3a8c2c11f9bd..f6fea9085aab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/advantech,idk-1110wr.yaml</a></div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='del'>-  - $ref: /schemas/display/lvds.yaml/#</div><div class='add'>+  - $ref: /schemas/display/lvds.yaml#</div><div class='ctx'> </div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml b/Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml<br/>new file mode 100644<br/>index 000000000000..4ad484f09ba3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml</a></div><div class='hunk'>@@ -0,0 +1,27 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/arm,rtsm-display.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm RTSM Virtual Platforms Display</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,rtsm-display</div><div class='add'>+</div><div class='add'>+  port: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml b/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml<br/>index be69e0cc50fc..c9958f824d9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/arm,versatile-tft-panel.yaml</a></div><div class='hunk'>@@ -37,9 +37,6 @@ examples:</div><div class='ctx'>         compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";</div><div class='ctx'>         reg = &lt;0x00000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='ctx'>         panel {</div><div class='ctx'>             compatible = "arm,versatile-tft-panel";</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/auo,a030jtn01.yaml b/Documentation/devicetree/bindings/display/panel/auo,a030jtn01.yaml<br/>new file mode 100644<br/>index 000000000000..86c834eb4d98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/auo,a030jtn01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/auo,a030jtn01.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/auo,a030jtn01.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: AUO A030JTN01 3.0" (320x480 pixels) 24-bit TFT LCD panel</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Delta RGB 8-bit panel found in some Retrogame handhelds</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='add'>+  - Christophe Branchereau &lt;cbranchereau@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: auo,a030jtn01</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - power-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "auo,a030jtn01";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpe 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            power-supply = &lt;&amp;lcd_power&gt;;</div><div class='add'>+</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_input: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;panel_output&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml<br/>index a2384bd74cf2..aed55608ebf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml</a></div><div class='hunk'>@@ -30,6 +30,8 @@ properties:</div><div class='ctx'>       - boe,tv110c9m-ll3</div><div class='ctx'>         # INX HJ110IZ-01A 10.95" WUXGA TFT LCD panel</div><div class='ctx'>       - innolux,hj110iz-01a</div><div class='add'>+        # STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel</div><div class='add'>+      - starry,2081101qfh032011-53g</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description: the virtual channel number of a DSI peripheral</div><div class='hunk'>@@ -53,6 +55,7 @@ properties:</div><div class='ctx'>     description: phandle of the backlight device attached to the panel</div><div class='ctx'> </div><div class='ctx'>   port: true</div><div class='add'>+  rotation: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/display-timings.yaml b/Documentation/devicetree/bindings/display/panel/display-timings.yaml<br/>index 6d30575819d3..dc5f7e36e30b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/display-timings.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/display-timings.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/display-timings.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/display-timings.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/panel/display-timings.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: display timings bindings</div><div class='add'>+title: display timings</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml b/Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml<br/>new file mode 100644<br/>index 000000000000..80deedc01c7c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/ebbg,ft8719.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/ebbg,ft8719.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: EBBG FT8719 MIPI-DSI LCD panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Joel Selvaraj &lt;jo@jsfamily.in&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The FT8719 panel from EBBG is a FHD+ LCD display panel with a resolution</div><div class='add'>+  of 1080x2246. It is a video mode DSI panel. The backlight is managed</div><div class='add'>+  through the QCOM WLED driver.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ebbg,ft8719</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: DSI virtual channel of the peripheral</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: power IC supply regulator</div><div class='add'>+</div><div class='add'>+  vddpos-supply:</div><div class='add'>+    description: positive boost supply regulator</div><div class='add'>+</div><div class='add'>+  vddneg-supply:</div><div class='add'>+    description: negative boost supply regulator</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vddpos-supply</div><div class='add'>+  - vddneg-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      panel@0 {</div><div class='add'>+        compatible = "ebbg,ft8719";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        vddio-supply = &lt;&amp;vreg_l14a_1p88&gt;;</div><div class='add'>+        vddpos-supply = &lt;&amp;lab&gt;;</div><div class='add'>+        vddneg-supply = &lt;&amp;ibb&gt;;</div><div class='add'>+</div><div class='add'>+        reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+        backlight = &lt;&amp;pmi8998_wled&gt;;</div><div class='add'>+</div><div class='add'>+        port {</div><div class='add'>+          ebbg_ft8719_in_0: endpoint {</div><div class='add'>+            remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml b/Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml<br/>index 7adb83e2e8d9..265ab6d30572 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/elida,kd35t133.yaml</a></div><div class='hunk'>@@ -17,7 +17,9 @@ properties:</div><div class='ctx'>     const: elida,kd35t133</div><div class='ctx'>   reg: true</div><div class='ctx'>   backlight: true</div><div class='add'>+  port: true</div><div class='ctx'>   reset-gpios: true</div><div class='add'>+  rotation: true</div><div class='ctx'>   iovcc-supply:</div><div class='ctx'>     description: regulator that supplies the iovcc voltage</div><div class='ctx'>   vdd-supply:</div><div class='hunk'>@@ -27,6 +29,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - backlight</div><div class='add'>+  - port</div><div class='ctx'>   - iovcc-supply</div><div class='ctx'>   - vdd-supply</div><div class='ctx'> </div><div class='hunk'>@@ -43,6 +46,12 @@ examples:</div><div class='ctx'>             backlight = &lt;&amp;backlight&gt;;</div><div class='ctx'>             iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'>             vdd-supply = &lt;&amp;vcc3v3_lcd&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml<br/>index 95acf9e96f1c..92df69e80a82 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.yaml</a></div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>   dvdd-supply:</div><div class='ctx'>     description: 3v3 digital regulator</div><div class='ctx'> </div><div class='add'>+  port: true</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'> </div><div class='ctx'>   backlight: true</div><div class='hunk'>@@ -35,7 +36,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - avdd-supply</div><div class='ctx'>   - dvdd-supply</div><div class='del'>-  - reset-gpios</div><div class='add'>+  - port</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -54,5 +55,11 @@ examples:</div><div class='ctx'>             dvdd-supply = &lt;&amp;reg_dldo2&gt;;</div><div class='ctx'>             reset-gpios = &lt;&amp;pio 3 24 GPIO_ACTIVE_HIGH&gt;; /* LCD-RST: PD24 */</div><div class='ctx'>             backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/focaltech,gpt3.yaml b/Documentation/devicetree/bindings/display/panel/focaltech,gpt3.yaml<br/>new file mode 100644<br/>index 000000000000..d54e96b2a9e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/focaltech,gpt3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/focaltech,gpt3.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/focaltech,gpt3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Focaltech GPT3 3.0" (640x480 pixels) IPS LCD panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christophe Branchereau &lt;cbranchereau@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: focaltech,gpt3</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - power-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "focaltech,gpt3";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            spi-max-frequency = &lt;3125000&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpe 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+            power-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_input: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;panel_output&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml b/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml<br/>new file mode 100644<br/>index 000000000000..1b2a1baa26f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/himax,hx8394.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/himax,hx8394.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Himax HX8394 MIPI-DSI LCD panel controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ondrej Jirman &lt;megi@xff.cz&gt;</div><div class='add'>+  - Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device tree bindings for panels based on the Himax HX8394 controller,</div><div class='add'>+  such as the HannStar HSD060BHW4 720x1440 TFT LCD panel connected with</div><div class='add'>+  a MIPI-DSI video interface.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - hannstar,hsd060bhw4</div><div class='add'>+      - const: himax,hx8394</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+  backlight: true</div><div class='add'>+</div><div class='add'>+  port: true</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description: Panel power supply</div><div class='add'>+</div><div class='add'>+  iovcc-supply:</div><div class='add'>+    description: I/O voltage supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - backlight</div><div class='add'>+  - port</div><div class='add'>+  - vcc-supply</div><div class='add'>+  - iovcc-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "hannstar,hsd060bhw4", "himax,hx8394";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            vcc-supply = &lt;&amp;reg_2v8_p&gt;;</div><div class='add'>+            iovcc-supply = &lt;&amp;reg_1v8_p&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio3 13 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml<br/>index 7e7a8362b951..90e323e19edb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/ilitek,ili9163.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/panel/ilitek,ili9163.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ilitek ILI9163 display panels device tree bindings</div><div class='add'>+title: Ilitek ILI9163 display panels</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Mack &lt;daniel@zonque.org&gt;</div><div class='hunk'>@@ -15,6 +15,7 @@ description:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -41,7 +42,7 @@ required:</div><div class='ctx'>   - dc-gpios</div><div class='ctx'>   - reset-gpios</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml<br/>index 20ce88ab4b3a..94f169ea065a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/ilitek,ili9341.yaml</a></div><div class='hunk'>@@ -16,13 +16,16 @@ description: |</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - adafruit,yx240qv29</div><div class='ctx'>           # ili9341 240*320 Color on stm32f429-disco board</div><div class='ctx'>           - st,sf-tc240t-9370-t</div><div class='add'>+          - canaan,kd233-tft</div><div class='ctx'>       - const: ilitek,ili9341</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='hunk'>@@ -47,32 +50,50 @@ properties:</div><div class='ctx'>   vddi-led-supply:</div><div class='ctx'>     description: Voltage supply for the LED driver (1.65 .. 3.3 V)</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - dc-gpios</div><div class='del'>-  - port</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - st,sf-tc240t-9370-t</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - port</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |+</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>         panel: display@0 {</div><div class='del'>-                 compatible = "st,sf-tc240t-9370-t",</div><div class='del'>-                              "ilitek,ili9341";</div><div class='del'>-                 reg = &lt;0&gt;;</div><div class='del'>-                 spi-3wire;</div><div class='del'>-                 spi-max-frequency = &lt;10000000&gt;;</div><div class='del'>-                 dc-gpios = &lt;&amp;gpiod 13 0&gt;;</div><div class='del'>-                 port {</div><div class='del'>-                         panel_in: endpoint {</div><div class='del'>-                           remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='del'>-                      };</div><div class='del'>-                 };</div><div class='del'>-             };</div><div class='add'>+            compatible = "st,sf-tc240t-9370-t",</div><div class='add'>+                         "ilitek,ili9341";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-3wire;</div><div class='add'>+            spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+            dc-gpios = &lt;&amp;gpiod 13 0&gt;;</div><div class='add'>+            port {</div><div class='add'>+                panel_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;display_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+        display@1{</div><div class='add'>+            compatible = "adafruit,yx240qv29", "ilitek,ili9341";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+            dc-gpios = &lt;&amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio0 8 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            rotation = &lt;270&gt;;</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml b/Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml<br/>index 566e11f6bfc0..ab6b7be88341 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/innolux,ee101ia-01d.yaml</a></div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='del'>-  - $ref: /schemas/display/lvds.yaml/#</div><div class='add'>+  - $ref: /schemas/display/lvds.yaml#</div><div class='ctx'> </div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/innolux,p120zdg-bf1.yaml b/Documentation/devicetree/bindings/display/panel/innolux,p120zdg-bf1.yaml<br/>deleted file mode 100644<br/>index 243dac2416f3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/innolux,p120zdg-bf1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/innolux,p120zdg-bf1.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/display/panel/innolux,p120zdg-bf1.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Sandeep Panda &lt;spanda@codeaurora.org&gt;</div><div class='del'>-  - Douglas Anderson &lt;dianders@chromium.org&gt;</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: panel-common.yaml#</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: innolux,p120zdg-bf1</div><div class='del'>-</div><div class='del'>-  enable-gpios: true</div><div class='del'>-  power-supply: true</div><div class='del'>-  backlight: true</div><div class='del'>-  no-hpd: true</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - power-supply</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-    panel_edp: panel-edp {</div><div class='del'>-        compatible = "innolux,p120zdg-bf1";</div><div class='del'>-        enable-gpios = &lt;&amp;msmgpio 31 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-        power-supply = &lt;&amp;pm8916_l2&gt;;</div><div class='del'>-        backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-        no-hpd;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml b/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml<br/>new file mode 100644<br/>index 000000000000..41eb7fbf7715<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/jadard,jd9365da-h3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Jadard JD9365DA-HE WXGA DSI panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jagan Teki &lt;jagan@edgeble.ai&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - chongzhou,cz101b4001</div><div class='add'>+          - radxa,display-10hd-ad001</div><div class='add'>+          - radxa,display-8hd-ad002</div><div class='add'>+      - const: jadard,jd9365da-h3</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: supply regulator for VDD, usually 3.3V</div><div class='add'>+</div><div class='add'>+  vccio-supply:</div><div class='add'>+    description: supply regulator for VCCIO, usually 1.8V</div><div class='add'>+</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+  backlight: true</div><div class='add'>+</div><div class='add'>+  port: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - vccio-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "chongzhou,cz101b4001", "jadard,jd9365da-h3";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;lcd_3v3&gt;;</div><div class='add'>+            vccio-supply = &lt;&amp;vcca_1v8&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio1 RK_PC2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml b/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml<br/>index 2a2756d19681..b4be9bd8ddde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/kingdisplay,kd035g6-54nt.yaml</a></div><div class='hunk'>@@ -23,6 +23,8 @@ properties:</div><div class='ctx'>   reg: true</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'> </div><div class='add'>+  spi-3wire: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - power-supply</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml b/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml<br/>new file mode 100644<br/>index 000000000000..ebdca5f5a001<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/leadtek,ltk035c5444t.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Leadtek ltk035c5444t 3.5" (640x480 pixels) 24-bit IPS LCD panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='add'>+  - Christophe Branchereau &lt;cbranchereau@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: leadtek,ltk035c5444t</div><div class='add'>+</div><div class='add'>+  backlight: true</div><div class='add'>+  port: true</div><div class='add'>+  power-supply: true</div><div class='add'>+  reg: true</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+  spi-3wire: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - power-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "leadtek,ltk035c5444t";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            spi-3wire;</div><div class='add'>+            spi-max-frequency = &lt;3125000&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpe 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+            power-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_input: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;panel_output&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml b/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml<br/>index b4314ce7b411..ee357e139ac0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/lg,lg4573.yaml</a></div><div class='hunk'>@@ -15,13 +15,13 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: lg,lg4573</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml b/Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml<br/>index 5e4e0e552c2f..628c4b898111 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/lgphilips,lb035q02.yaml</a></div><div class='hunk'>@@ -21,6 +21,9 @@ properties:</div><div class='ctx'>   enable-gpios: true</div><div class='ctx'>   port: true</div><div class='ctx'> </div><div class='add'>+  spi-cpha: true</div><div class='add'>+  spi-cpol: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - enable-gpios</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml b/Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml<br/>index 5cf3c588f46d..3623ffa6518d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/mitsubishi,aa104xd12.yaml</a></div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='del'>-  - $ref: /schemas/display/lvds.yaml/#</div><div class='add'>+  - $ref: /schemas/display/lvds.yaml#</div><div class='ctx'> </div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml b/Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml<br/>index 54750cc5440d..37f01d847aac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/mitsubishi,aa121td01.yaml</a></div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='del'>-  - $ref: /schemas/display/lvds.yaml/#</div><div class='add'>+  - $ref: /schemas/display/lvds.yaml#</div><div class='ctx'> </div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml b/Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml<br/>index aa788eaa2f71..accf933d6e46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/nec,nl8048hl11.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -34,13 +35,13 @@ required:</div><div class='ctx'>   - reset-gpios</div><div class='ctx'>   - port</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/newvision,nv3051d.yaml b/Documentation/devicetree/bindings/display/panel/newvision,nv3051d.yaml<br/>new file mode 100644<br/>index 000000000000..116c1b6030a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/newvision,nv3051d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/newvision,nv3051d.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/newvision,nv3051d.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NewVision NV3051D based LCD panel</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The NewVision NV3051D is a driver chip used to drive DSI panels. For now,</div><div class='add'>+  this driver only supports the 640x480 panels found in the Anbernic RG353</div><div class='add'>+  based devices.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Morgan &lt;macromorgan@hotmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - anbernic,rg353p-panel</div><div class='add'>+          - anbernic,rg353v-panel</div><div class='add'>+      - const: newvision,nv3051d</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+  backlight: true</div><div class='add'>+  port: true</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Active low reset GPIO</div><div class='add'>+  vdd-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - backlight</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "anbernic,rg353p-panel", "newvision,nv3051d";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio4 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vcc3v3_lcd&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml<br/>new file mode 100644<br/>index 000000000000..0039561ef04c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/novatek,nt36523.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/novatek,nt36523.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Novatek NT36523 based DSI display Panels</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jianhua Lu &lt;lujianhua000@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Novatek NT36523 is a generic DSI Panel IC used to drive dsi</div><div class='add'>+  panels. Support video mode panels from China Star Optoelectronics</div><div class='add'>+  Technology (CSOT) and BOE Technology.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - xiaomi,elish-boe-nt36523</div><div class='add'>+          - xiaomi,elish-csot-nt36523</div><div class='add'>+      - const: novatek,nt36523</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: phandle of gpio for reset line - This should be 8mA</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: regulator that supplies the I/O voltage</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+  ports: true</div><div class='add'>+  backlight: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "xiaomi,elish-csot-nt36523", "novatek,nt36523";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vddio-supply = &lt;&amp;vreg_l14a_1p88&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 75 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    panel_in_0: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1{</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    panel_in_1: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;dsi1_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml<br/>index 563766d283f6..ae821f465e1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml</a></div><div class='hunk'>@@ -34,7 +34,7 @@ properties:</div><div class='ctx'>     description: phandle of gpio for reset line - This should be 8mA, gpio</div><div class='ctx'>       can be configured using mux, pinctrl, pinctrl-names (active high)</div><div class='ctx'> </div><div class='del'>-  vddi0-supply:</div><div class='add'>+  vddio-supply:</div><div class='ctx'>     description: phandle of the regulator that provides the supply voltage</div><div class='ctx'>       Power IC supply</div><div class='ctx'> </div><div class='hunk'>@@ -46,11 +46,12 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'>   port: true</div><div class='add'>+  backlight: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - vddi0-supply</div><div class='add'>+  - vddio-supply</div><div class='ctx'>   - vddpos-supply</div><div class='ctx'>   - vddneg-supply</div><div class='ctx'>   - reset-gpios</div><div class='hunk'>@@ -69,10 +70,11 @@ examples:</div><div class='ctx'>         panel@0 {</div><div class='ctx'>             compatible = "tianma,fhd-video", "novatek,nt36672a";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='del'>-            vddi0-supply = &lt;&amp;vreg_l14a_1p88&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vreg_l14a_1p88&gt;;</div><div class='ctx'>             vddpos-supply = &lt;&amp;lab&gt;;</div><div class='ctx'>             vddneg-supply = &lt;&amp;ibb&gt;;</div><div class='ctx'> </div><div class='add'>+            backlight = &lt;&amp;pmi8998_wled&gt;;</div><div class='ctx'>             reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'>             port {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml b/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml<br/>index 2329d9610f83..9f97598efdfa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/olimex,lcd-olinuxino.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/panel/olimex,lcd-olinuxino.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for Olimex Ltd. LCD-OLinuXino bridge panel.</div><div class='add'>+title: Olimex Ltd. LCD-OLinuXino bridge panel.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stefan Mavrodiev &lt;stefan@olimex.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml b/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml<br/>index 17cbd0ad32bf..ad7d3575190e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/orisetech,otm8009a.yaml</a></div><div class='hunk'>@@ -50,4 +50,3 @@ examples:</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml b/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml<br/>index fcc50db6a812..929fe046d1e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-lvds.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-lvds.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/panel-lvds.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/panel/panel-lvds.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic LVDS Display Panel Device Tree Bindings</div><div class='add'>+title: Generic LVDS Display Panel</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='del'>-  - $ref: /schemas/display/lvds.yaml/#</div><div class='add'>+  - $ref: /schemas/display/lvds.yaml#</div><div class='ctx'> </div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml<br/>index f29789994b18..9b701df5e9d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml</a></div><div class='hunk'>@@ -22,8 +22,9 @@ description: |</div><div class='ctx'>   The standard defines the following interface signals for type C:</div><div class='ctx'>   - Power:</div><div class='ctx'>     - Vdd: Power supply for display module</div><div class='add'>+      Called power-supply in this binding.</div><div class='ctx'>     - Vddi: Logic level supply for interface signals</div><div class='del'>-    Combined into one in this binding called: power-supply</div><div class='add'>+      Called io-supply in this binding.</div><div class='ctx'>   - Interface:</div><div class='ctx'>     - CSx: Chip select</div><div class='ctx'>     - SCL: Serial clock</div><div class='hunk'>@@ -80,9 +81,16 @@ properties:</div><div class='ctx'>       Controller data/command selection (D/CX) in 4-line SPI mode.</div><div class='ctx'>       If not set, the controller is in 3-line SPI mode.</div><div class='ctx'> </div><div class='add'>+  io-supply:</div><div class='add'>+    description: |</div><div class='add'>+      Logic level supply for interface signals (Vddi).</div><div class='add'>+      No need to set if this is the same as power-supply.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - width-mm</div><div class='add'>+  - height-mm</div><div class='ctx'>   - panel-timing</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml<br/>index 2c00813f5d20..90c04cff8281 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml</a></div><div class='hunk'>@@ -19,9 +19,6 @@ description: |</div><div class='ctx'> </div><div class='ctx'>   If the panel is more advanced a dedicated binding file is required.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: panel-common.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -67,12 +64,31 @@ properties:</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'>   port: true</div><div class='ctx'>   power-supply: true</div><div class='add'>+  vddio-supply: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - samsung,s6e3fc2x01</div><div class='add'>+            - samsung,sofef00</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-supply: false</div><div class='add'>+      required:</div><div class='add'>+        - vddio-supply</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        vddio-supply: false</div><div class='add'>+      required:</div><div class='add'>+        - power-supply</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - power-supply</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml<br/>index 1eb9dd4f8f58..01560fe226dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-simple.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/panel-simple.yaml</a></div><div class='hunk'>@@ -35,6 +35,8 @@ properties:</div><div class='ctx'>       - ampire,am-480272h3tmqw-t01h</div><div class='ctx'>         # Ampire AM-800480R3TMQW-A1H 7.0" WVGA TFT LCD panel</div><div class='ctx'>       - ampire,am800480r3tmqwa1h</div><div class='add'>+        # Ampire AM-800600P5TMQW-TB8H 8.0" SVGA TFT LCD panel</div><div class='add'>+      - ampire,am800600p5tmqw-tb8h</div><div class='ctx'>         # AU Optronics Corporation 10.1" WSVGA TFT LCD panel</div><div class='ctx'>       - auo,b101aw03</div><div class='ctx'>         # AU Optronics Corporation 10.1" WSVGA TFT LCD panel</div><div class='hunk'>@@ -105,6 +107,10 @@ properties:</div><div class='ctx'>       - chunghwa,claa101wb01</div><div class='ctx'>         # Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel</div><div class='ctx'>       - chunghwa,claa101wb03</div><div class='add'>+        # DataImage, Inc. 4.3" WQVGA (480x272) TFT LCD panel with 24-bit parallel interface.</div><div class='add'>+      - dataimage,fg040346dsswbg04</div><div class='add'>+        # DataImage, Inc. 10.1" WXGA (1280×800) TFT LCD panel</div><div class='add'>+      - dataimage,fg1001l0dsswmg01</div><div class='ctx'>         # DataImage, Inc. 7" WVGA (800x480) TFT LCD panel with 24-bit parallel interface.</div><div class='ctx'>       - dataimage,scf0700c48ggu18</div><div class='ctx'>         # DLC Display Co. DLC1010GIG 10.1" WXGA TFT LCD Panel</div><div class='hunk'>@@ -135,6 +141,8 @@ properties:</div><div class='ctx'>         # Emerging Display Technology Corp. WVGA TFT Display with capacitive touch</div><div class='ctx'>       - edt,etm0700g0dh6</div><div class='ctx'>       - edt,etm0700g0edh6</div><div class='add'>+        # Emerging Display Technology Corp. LVDS WSVGA TFT Display with capacitive touch</div><div class='add'>+      - edt,etml0700y5dha</div><div class='ctx'>         # Emerging Display Technology Corp. 5.7" VGA TFT LCD panel with</div><div class='ctx'>         # capacitive touch</div><div class='ctx'>       - edt,etmv570g2dhu</div><div class='hunk'>@@ -156,6 +164,8 @@ properties:</div><div class='ctx'>       - hannstar,hsd070pww1</div><div class='ctx'>         # HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel</div><div class='ctx'>       - hannstar,hsd100pxn1</div><div class='add'>+        # HannStar Display Corp. HSD101PWW2 10.1" WXGA (1280x800) LVDS panel</div><div class='add'>+      - hannstar,hsd101pww2</div><div class='ctx'>         # Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel</div><div class='ctx'>       - hit,tx23d38vm0caa</div><div class='ctx'>         # InfoVision Optoelectronics M133NWF4 R0 13.3" FHD (1920x1080) TFT LCD panel</div><div class='hunk'>@@ -182,6 +192,8 @@ properties:</div><div class='ctx'>       - innolux,n125hce-gn1</div><div class='ctx'>         # InnoLux 15.6" WXGA TFT LCD panel</div><div class='ctx'>       - innolux,n156bge-l21</div><div class='add'>+        # Innolux P120ZDG-BF1 12.02 inch eDP 2K display panel</div><div class='add'>+      - innolux,p120zdg-bf1</div><div class='ctx'>         # Innolux Corporation 7.0" WSVGA (1024x600) TFT LCD panel</div><div class='ctx'>       - innolux,zj070na-01p</div><div class='ctx'>         # King &amp; Display KD116N21-30NV-A010 eDP TFT LCD panel</div><div class='hunk'>@@ -224,6 +236,8 @@ properties:</div><div class='ctx'>       - mitsubishi,aa070mc01-ca1</div><div class='ctx'>         # Multi-Inno Technology Co.,Ltd MI0700S4T-6 7" 800x480 TFT Resistive Touch Module</div><div class='ctx'>       - multi-inno,mi0700s4t-6</div><div class='add'>+        # Multi-Inno Technology Co.,Ltd MI0800FT-9 8" 800x600 TFT Resistive Touch Module</div><div class='add'>+      - multi-inno,mi0800ft-9</div><div class='ctx'>         # Multi-Inno Technology Co.,Ltd MI1010AIT-1CP 10.1" 1280x800 LVDS IPS Cap Touch Mod.</div><div class='ctx'>       - multi-inno,mi1010ait-1cp</div><div class='ctx'>         # NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel</div><div class='hunk'>@@ -270,6 +284,8 @@ properties:</div><div class='ctx'>       - samsung,atna33xc20</div><div class='ctx'>         # Samsung 12.2" (2560x1600 pixels) TFT LCD panel</div><div class='ctx'>       - samsung,lsn122dl01-c01</div><div class='add'>+        # Samsung Electronics 10.1" WXGA (1280x800) TFT LCD panel</div><div class='add'>+      - samsung,ltl101al01</div><div class='ctx'>         # Samsung Electronics 10.1" WSVGA TFT LCD panel</div><div class='ctx'>       - samsung,ltn101nt05</div><div class='ctx'>         # Samsung Electronics 14" WXGA (1366x768) TFT LCD panel</div><div class='hunk'>@@ -294,6 +310,8 @@ properties:</div><div class='ctx'>       - starry,kr070pe2t</div><div class='ctx'>         # Starry 12.2" (1920x1200 pixels) TFT LCD panel</div><div class='ctx'>       - starry,kr122ea0sra</div><div class='add'>+        # Startek KD070WVFPA043-C069A 7" TFT LCD panel</div><div class='add'>+      - startek,kd070wvfpa</div><div class='ctx'>         # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel</div><div class='ctx'>       - team-source-display,tst043015cmhx</div><div class='ctx'>         # Tianma Micro-electronics TM070JDHG30 7.0" WXGA TFT LCD panel</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/panel-timing.yaml b/Documentation/devicetree/bindings/display/panel/panel-timing.yaml<br/>index 9bf592dc3033..aea69b84ca5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-timing.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/panel-timing.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/panel-timing.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/panel-timing.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: panel timing bindings</div><div class='add'>+title: panel timing</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='hunk'>@@ -17,29 +17,29 @@ description: |</div><div class='ctx'> </div><div class='ctx'>   The parameters are defined as seen in the following illustration.</div><div class='ctx'> </div><div class='del'>-  +----------+-------------------------------------+----------+-------+</div><div class='del'>-  |          |        ^                            |          |       |</div><div class='del'>-  |          |        |vback_porch                 |          |       |</div><div class='del'>-  |          |        v                            |          |       |</div><div class='del'>-  +----------#######################################----------+-------+</div><div class='del'>-  |          #        ^                            #          |       |</div><div class='del'>-  |          #        |                            #          |       |</div><div class='del'>-  |  hback   #        |                            #  hfront  | hsync |</div><div class='del'>-  |   porch  #        |       hactive              #  porch   |  len  |</div><div class='del'>-  |&lt;--------&gt;#&lt;-------+---------------------------&gt;#&lt;--------&gt;|&lt;-----&gt;|</div><div class='del'>-  |          #        |                            #          |       |</div><div class='del'>-  |          #        |vactive                     #          |       |</div><div class='del'>-  |          #        |                            #          |       |</div><div class='del'>-  |          #        v                            #          |       |</div><div class='del'>-  +----------#######################################----------+-------+</div><div class='del'>-  |          |        ^                            |          |       |</div><div class='del'>-  |          |        |vfront_porch                |          |       |</div><div class='del'>-  |          |        v                            |          |       |</div><div class='del'>-  +----------+-------------------------------------+----------+-------+</div><div class='del'>-  |          |        ^                            |          |       |</div><div class='del'>-  |          |        |vsync_len                   |          |       |</div><div class='del'>-  |          |        v                            |          |       |</div><div class='del'>-  +----------+-------------------------------------+----------+-------+</div><div class='add'>+  +-------+----------+-------------------------------------+----------+</div><div class='add'>+  |       |          |        ^                            |          |</div><div class='add'>+  |       |          |        |vsync_len                   |          |</div><div class='add'>+  |       |          |        v                            |          |</div><div class='add'>+  +-------+----------+-------------------------------------+----------+</div><div class='add'>+  |       |          |        ^                            |          |</div><div class='add'>+  |       |          |        |vback_porch                 |          |</div><div class='add'>+  |       |          |        v                            |          |</div><div class='add'>+  +-------+----------#######################################----------+</div><div class='add'>+  |       |          #        ^                            #          |</div><div class='add'>+  |       |          #        |                            #          |</div><div class='add'>+  | hsync |  hback   #        |                            #  hfront  |</div><div class='add'>+  |  len  |   porch  #        |       hactive              #  porch   |</div><div class='add'>+  |&lt;-----&gt;|&lt;--------&gt;#&lt;-------+---------------------------&gt;#&lt;--------&gt;|</div><div class='add'>+  |       |          #        |                            #          |</div><div class='add'>+  |       |          #        |vactive                     #          |</div><div class='add'>+  |       |          #        |                            #          |</div><div class='add'>+  |       |          #        v                            #          |</div><div class='add'>+  +-------+----------#######################################----------+</div><div class='add'>+  |       |          |        ^                            |          |</div><div class='add'>+  |       |          |        |vfront_porch                |          |</div><div class='add'>+  |       |          |        v                            |          |</div><div class='add'>+  +-------+----------+-------------------------------------+----------+</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>   The following is the panel timings shown with time on the x-axis.</div><div class='hunk'>@@ -71,78 +71,72 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   hfront-porch:</div><div class='ctx'>     description: Horizontal front porch panel timing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     oneOf:</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maxItems: 1</div><div class='add'>+      - maxItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           description: typical number of pixels</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 3</div><div class='add'>+      - minItems: 3</div><div class='ctx'>         maxItems: 3</div><div class='ctx'>         items:</div><div class='ctx'>           description: min, typ, max number of pixels</div><div class='ctx'> </div><div class='ctx'>   hback-porch:</div><div class='ctx'>     description: Horizontal back porch timing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     oneOf:</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maxItems: 1</div><div class='add'>+      - maxItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           description: typical number of pixels</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 3</div><div class='add'>+      - minItems: 3</div><div class='ctx'>         maxItems: 3</div><div class='ctx'>         items:</div><div class='ctx'>           description: min, typ, max number of pixels</div><div class='ctx'> </div><div class='ctx'>   hsync-len:</div><div class='ctx'>     description: Horizontal sync length panel timing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     oneOf:</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maxItems: 1</div><div class='add'>+      - maxItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           description: typical number of pixels</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 3</div><div class='add'>+      - minItems: 3</div><div class='ctx'>         maxItems: 3</div><div class='ctx'>         items:</div><div class='ctx'>           description: min, typ, max number of pixels</div><div class='ctx'> </div><div class='ctx'>   vfront-porch:</div><div class='ctx'>     description: Vertical front porch panel timing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     oneOf:</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maxItems: 1</div><div class='add'>+      - maxItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           description: typical number of lines</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 3</div><div class='add'>+      - minItems: 3</div><div class='ctx'>         maxItems: 3</div><div class='ctx'>         items:</div><div class='ctx'>           description: min, typ, max number of lines</div><div class='ctx'> </div><div class='ctx'>   vback-porch:</div><div class='ctx'>     description: Vertical back porch panel timing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     oneOf:</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maxItems: 1</div><div class='add'>+      - maxItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           description: typical number of lines</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 3</div><div class='add'>+      - minItems: 3</div><div class='ctx'>         maxItems: 3</div><div class='ctx'>         items:</div><div class='ctx'>           description: min, typ, max number of lines</div><div class='ctx'> </div><div class='ctx'>   vsync-len:</div><div class='ctx'>     description: Vertical sync length panel timing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     oneOf:</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maxItems: 1</div><div class='add'>+      - maxItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           description: typical number of lines</div><div class='del'>-      - $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 3</div><div class='add'>+      - minItems: 3</div><div class='ctx'>         maxItems: 3</div><div class='ctx'>         items:</div><div class='ctx'>           description: min, typ, max number of lines</div><div class='hunk'>@@ -152,6 +146,7 @@ properties:</div><div class='ctx'>       Horizontal sync pulse.</div><div class='ctx'>       0 selects active low, 1 selects active high.</div><div class='ctx'>       If omitted then it is not used by the hardware</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   vsync-active:</div><div class='hunk'>@@ -159,6 +154,7 @@ properties:</div><div class='ctx'>       Vertical sync pulse.</div><div class='ctx'>       0 selects active low, 1 selects active high.</div><div class='ctx'>       If omitted then it is not used by the hardware</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   de-active:</div><div class='hunk'>@@ -166,6 +162,7 @@ properties:</div><div class='ctx'>       Data enable.</div><div class='ctx'>       0 selects active low, 1 selects active high.</div><div class='ctx'>       If omitted then it is not used by the hardware</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   pixelclk-active:</div><div class='hunk'>@@ -175,6 +172,7 @@ properties:</div><div class='ctx'>       sample data on rising edge.</div><div class='ctx'>       Use 1 to drive pixel data on rising edge and</div><div class='ctx'>       sample data on falling edge</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   syncclk-active:</div><div class='hunk'>@@ -185,6 +183,7 @@ properties:</div><div class='ctx'>       sample sync on rising edge of pixel clock.</div><div class='ctx'>       Use 1 to drive sync on rising edge and</div><div class='ctx'>       sample sync on falling edge of pixel clock</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   interlaced:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml b/Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml<br/>index 745dd247c409..d62fd692bf10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml</a></div><div class='hunk'>@@ -24,6 +24,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   dsi-lanes:</div><div class='ctx'>     description: Number of DSI lanes to be used must be &lt;3&gt; or &lt;4&gt;</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [3, 4]</div><div class='ctx'> </div><div class='ctx'>   v3p3-supply:</div><div class='hunk'>@@ -37,6 +38,7 @@ properties:</div><div class='ctx'>       0 - burst-mode</div><div class='ctx'>       1 - non-burst with sync event</div><div class='ctx'>       2 - non-burst with sync pulse</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1, 2]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml b/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml<br/>index d67617f6f74a..95ce22c6787a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/ronbo,rb070d30.yaml</a></div><div class='hunk'>@@ -37,7 +37,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   backlight:</div><div class='ctx'>     description: Backlight used by the panel</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,ams495qa01.yaml b/Documentation/devicetree/bindings/display/panel/samsung,ams495qa01.yaml<br/>new file mode 100644<br/>index 000000000000..58fa073ce258<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,ams495qa01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,ams495qa01.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/samsung,ams495qa01.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung AMS495QA01 panel with Magnachip D53E6EA8966 controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Morgan &lt;macromorgan@hotmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,ams495qa01</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: reset gpio, must be GPIO_ACTIVE_LOW</div><div class='add'>+  elvdd-supply:</div><div class='add'>+    description: regulator that supplies voltage to the panel display</div><div class='add'>+  enable-gpios: true</div><div class='add'>+  port: true</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: regulator that supplies voltage to panel logic</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - vdd-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "samsung,ams495qa01";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio4 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                  remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml b/Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml<br/>index d525165d6d63..c0fabeb38628 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,ld9040.yaml</a></div><div class='hunk'>@@ -42,6 +42,9 @@ properties:</div><div class='ctx'>   panel-height-mm:</div><div class='ctx'>     description: physical panel height [mm]</div><div class='ctx'> </div><div class='add'>+  spi-cpha: true</div><div class='add'>+  spi-cpol: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml b/Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml<br/>index 251f0c7115aa..70ffc88d2a08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml</a></div><div class='hunk'>@@ -9,14 +9,13 @@ title: Samsung LMS380KF01 display panel</div><div class='ctx'> description: The LMS380KF01 is a 480x800 DPI display panel from Samsung Mobile</div><div class='ctx'>   Displays (SMD) utilizing the WideChips WS2401 display controller. It can be</div><div class='ctx'>   used with internal or external backlight control.</div><div class='del'>-  The panel must obey the rules for a SPI slave device as specified in</div><div class='del'>-  spi/spi-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -59,7 +58,7 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'>   - port</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml b/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml<br/>index cd62968426fb..5e77cee93f83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml</a></div><div class='hunk'>@@ -14,6 +14,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -51,7 +52,7 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'>   - port</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml b/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml<br/>index 26e3c820a2f7..d273faf4442a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,s6d27a1.yaml</a></div><div class='hunk'>@@ -7,14 +7,14 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S6D27A1 display panel</div><div class='ctx'> </div><div class='ctx'> description: The S6D27A1 is a 480x800 DPI display panel from Samsung Mobile</div><div class='del'>-  Displays (SMD). The panel must obey the rules for a SPI slave device</div><div class='del'>-  as specified in spi/spi-controller.yaml</div><div class='add'>+  Displays (SMD).</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Markuss Broks &lt;markuss.broks@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml b/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml<br/>index 940f7f88526f..6f1fc7469f07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,s6e63m0.yaml</a></div><div class='hunk'>@@ -24,6 +24,10 @@ properties:</div><div class='ctx'>   default-brightness: true</div><div class='ctx'>   max-brightness: true</div><div class='ctx'> </div><div class='add'>+  spi-3wire: true</div><div class='add'>+  spi-cpha: true</div><div class='add'>+  spi-cpol: true</div><div class='add'>+</div><div class='ctx'>   vdd3-supply:</div><div class='ctx'>     description: VDD regulator</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml b/Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml<br/>index 44ce98f68705..b749e9e906b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,s6e88a0-ams452ef01.yaml</a></div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: samsung,s6e88a0-ams452ef01</div><div class='ctx'>   reg: true</div><div class='add'>+  port: true</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'>   vdd3-supply:</div><div class='ctx'>     description: core voltage supply</div><div class='hunk'>@@ -25,6 +26,7 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - port</div><div class='ctx'>   - vdd3-supply</div><div class='ctx'>   - vci-supply</div><div class='ctx'>   - reset-gpios</div><div class='hunk'>@@ -46,5 +48,11 @@ examples:</div><div class='ctx'>                     vdd3-supply = &lt;&amp;pm8916_l17&gt;;</div><div class='ctx'>                     vci-supply = &lt;&amp;reg_vlcd_vci&gt;;</div><div class='ctx'>                     reset-gpios = &lt;&amp;msmgpio 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+                    port {</div><div class='add'>+                            panel_in: endpoint {</div><div class='add'>+                                    remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='ctx'>             };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml b/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml<br/>index ca959451557e..1cdc91b3439f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/samsung,s6e8aa0.yaml</a></div><div class='hunk'>@@ -36,6 +36,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   init-delay:</div><div class='ctx'>     description: delay after initialization sequence [ms]</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   panel-width-mm:</div><div class='ctx'>     description: physical panel width [mm]</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml b/Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml<br/>index cfaa50cf5f5d..1df3cbb51ff9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/seiko,43wvf1g.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Seiko Instruments Inc. 4.3" WVGA (800 x RGB x 480) TFT with Touch-Panel</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Marco Franchi &lt;marco.franchi@nxp.com&gt;</div><div class='add'>+  - Fabio Estevam &lt;festevam@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='hunk'>@@ -25,6 +25,8 @@ properties:</div><div class='ctx'>   avdd-supply:</div><div class='ctx'>     description: 5v analog regulator</div><div class='ctx'> </div><div class='add'>+  enable-gpios: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - dvdd-supply</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml b/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml<br/>index 44e02decdf3a..e32d9188a3e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/sgd,gktw70sdae4se.yaml</a></div><div class='hunk'>@@ -7,12 +7,12 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'>   - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='del'>-  - $ref: /schemas/display/lvds.yaml/#</div><div class='add'>+  - $ref: /schemas/display/lvds.yaml#</div><div class='ctx'> </div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml b/Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml<br/>index a679d3647dbd..57b44a0e763d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/sharp,lq101r1sx01.yaml</a></div><div class='hunk'>@@ -30,7 +30,12 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: sharp,lq101r1sx01</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: sharp,lq101r1sx03</div><div class='add'>+          - const: sharp,lq101r1sx01</div><div class='add'>+      - enum:</div><div class='add'>+          - sharp,lq101r1sx01</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'>   power-supply: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml<br/>index 6dff59fe4be1..4dc0cd4a6a77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/sitronix,st7701.yaml</a></div><div class='hunk'>@@ -17,6 +17,9 @@ description: |</div><div class='ctx'>   Techstar TS8550B is 480x854, 2-lane MIPI DSI LCD panel which has</div><div class='ctx'>   inbuilt ST7701 chip.</div><div class='ctx'> </div><div class='add'>+  Densitron DMT028VGHMCMI-1A is 480x640, 2-lane MIPI DSI LCD panel</div><div class='add'>+  which has built-in ST7701 chip.</div><div class='add'>+</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='ctx'> </div><div class='hunk'>@@ -24,6 +27,8 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - densitron,dmt028vghmcmi-1a</div><div class='add'>+          - elida,kd50t048a</div><div class='ctx'>           - techstar,ts8550b</div><div class='ctx'>       - const: sitronix,st7701</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +42,9 @@ properties:</div><div class='ctx'>   IOVCC-supply:</div><div class='ctx'>     description: I/O system regulator</div><div class='ctx'> </div><div class='add'>+  port: true</div><div class='ctx'>   reset-gpios: true</div><div class='add'>+  rotation: true</div><div class='ctx'> </div><div class='ctx'>   backlight: true</div><div class='ctx'> </div><div class='hunk'>@@ -46,6 +53,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - VCC-supply</div><div class='ctx'>   - IOVCC-supply</div><div class='add'>+  - port</div><div class='ctx'>   - reset-gpios</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='hunk'>@@ -65,5 +73,11 @@ examples:</div><div class='ctx'>             IOVCC-supply = &lt;&amp;reg_dldo2&gt;;</div><div class='ctx'>             reset-gpios = &lt;&amp;pio 3 24 GPIO_ACTIVE_HIGH&gt;; /* LCD-RST: PD24 */</div><div class='ctx'>             backlight = &lt;&amp;backlight&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml b/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml<br/>index 9e1d707c2ace..fa6556363cca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml</a></div><div class='hunk'>@@ -23,6 +23,13 @@ properties:</div><div class='ctx'>   backlight: true</div><div class='ctx'>   port: true</div><div class='ctx'> </div><div class='add'>+  spi-cpha: true</div><div class='add'>+  spi-cpol: true</div><div class='add'>+</div><div class='add'>+  dc-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: DCX pin, Display data/command selection pin in parallel interface</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml b/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml<br/>new file mode 100644<br/>index 000000000000..b6b885b4c22d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/sony,td4353-jdi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sony TD4353 JDI 5 / 5.7" 2160x1080 MIPI-DSI Panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Sony TD4353 JDI is a 5 (XZ2c) / 5.7 (XZ2) inch 2160x1080</div><div class='add'>+  MIPI-DSI panel, used in Xperia XZ2 and XZ2 Compact smartphones.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sony,td4353-jdi-tama</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  backlight: true</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: VDDIO 1.8V supply</div><div class='add'>+</div><div class='add'>+  vsp-supply:</div><div class='add'>+    description: Positive 5.5V supply</div><div class='add'>+</div><div class='add'>+  vsn-supply:</div><div class='add'>+    description: Negative 5.5V supply</div><div class='add'>+</div><div class='add'>+  panel-reset-gpios:</div><div class='add'>+    description: Display panel reset pin</div><div class='add'>+</div><div class='add'>+  touch-reset-gpios:</div><div class='add'>+    description: Touch panel reset pin</div><div class='add'>+</div><div class='add'>+  port: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vsp-supply</div><div class='add'>+  - vsn-supply</div><div class='add'>+  - panel-reset-gpios</div><div class='add'>+  - touch-reset-gpios</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel: panel@0 {</div><div class='add'>+            compatible = "sony,td4353-jdi-tama";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            backlight = &lt;&amp;pmi8998_wled&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vreg_l14a_1p8&gt;;</div><div class='add'>+            vsp-supply = &lt;&amp;lab&gt;;</div><div class='add'>+            vsn-supply = &lt;&amp;ibb&gt;;</div><div class='add'>+            panel-reset-gpios = &lt;&amp;tlmm 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            touch-reset-gpios = &lt;&amp;tlmm 99 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/tpo,td.yaml b/Documentation/devicetree/bindings/display/panel/tpo,td.yaml<br/>index f902a9d74141..e8c8ee8d7c88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/tpo,td.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/tpo,td.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/tpo,td.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/tpo,td.yaml</a></div><div class='hunk'>@@ -28,6 +28,9 @@ properties:</div><div class='ctx'>   backlight: true</div><div class='ctx'>   port: true</div><div class='ctx'> </div><div class='add'>+  spi-cpha: true</div><div class='add'>+  spi-cpol: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - port</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml b/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml<br/>index 6f1f02044b4b..f0243d196191 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml</a></div><div class='hunk'>@@ -41,6 +41,7 @@ description: |+</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml b/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml<br/>index 076b057b4af5..444ac2a4772d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/panel/visionox,rm69299.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Visionox model RM69299 Panels Device Tree Bindings.</div><div class='add'>+title: Visionox model RM69299 Panels</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Harigovindan P &lt;harigovi@codeaurora.org&gt;</div><div class='hunk'>@@ -19,6 +19,8 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: visionox,rm69299-1080p-display</div><div class='ctx'> </div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='ctx'>   vdda-supply:</div><div class='ctx'>     description: |</div><div class='ctx'>       Phandle of the regulator that provides the vdda supply voltage.</div><div class='hunk'>@@ -34,6 +36,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='add'>+  - reg</div><div class='ctx'>   - vdda-supply</div><div class='ctx'>   - vdd3p3-supply</div><div class='ctx'>   - reset-gpios</div><div class='hunk'>@@ -41,16 +44,22 @@ required:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    panel {</div><div class='del'>-        compatible = "visionox,rm69299-1080p-display";</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "visionox,rm69299-1080p-display";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        vdda-supply = &lt;&amp;src_pp1800_l8c&gt;;</div><div class='del'>-        vdd3p3-supply = &lt;&amp;src_pp2800_l18a&gt;;</div><div class='add'>+            vdda-supply = &lt;&amp;src_pp1800_l8c&gt;;</div><div class='add'>+            vdd3p3-supply = &lt;&amp;src_pp2800_l18a&gt;;</div><div class='ctx'> </div><div class='del'>-        reset-gpios = &lt;&amp;pm6150l_gpio 3 0&gt;;</div><div class='del'>-        port {</div><div class='del'>-            panel0_in: endpoint {</div><div class='del'>-                remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;pm6150l_gpio 3 0&gt;;</div><div class='add'>+            port {</div><div class='add'>+                panel0_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml b/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml<br/>new file mode 100644<br/>index 000000000000..84562a5b710a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/visionox,vtdr6130.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/panel/visionox,vtdr6130.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Visionox VTDR6130 AMOLED DSI Panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: panel-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: visionox,vtdr6130</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: DSI virtual channel</div><div class='add'>+</div><div class='add'>+  vddio-supply: true</div><div class='add'>+  vci-supply: true</div><div class='add'>+  vdd-supply: true</div><div class='add'>+  port: true</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vci-supply</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    dsi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        panel@0 {</div><div class='add'>+            compatible = "visionox,vtdr6130";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vddio-supply = &lt;&amp;vreg_l12b_1p8&gt;;</div><div class='add'>+            vci-supply = &lt;&amp;vreg_l13b_3p0&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vreg_l11b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;tlmm 133 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                panel0_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dsi0_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml b/Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml<br/>index d5c46a3cc2b0..c407deb6afb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/panel/xinpeng,xpp055c272.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>     const: xinpeng,xpp055c272</div><div class='ctx'>   reg: true</div><div class='ctx'>   backlight: true</div><div class='add'>+  port: true</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'>   iovcc-supply:</div><div class='ctx'>     description: regulator that supplies the iovcc voltage</div><div class='hunk'>@@ -27,6 +28,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - backlight</div><div class='add'>+  - port</div><div class='ctx'>   - iovcc-supply</div><div class='ctx'>   - vci-supply</div><div class='ctx'> </div><div class='hunk'>@@ -44,6 +46,12 @@ examples:</div><div class='ctx'>             backlight = &lt;&amp;backlight&gt;;</div><div class='ctx'>             iovcc-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='ctx'>             vci-supply = &lt;&amp;vcc3v3_lcd&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                mipi_in_panel: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/renesas,du.yaml b/Documentation/devicetree/bindings/display/renesas,du.yaml<br/>index 56cedcd6d576..c5b9e6812bce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/renesas,du.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/renesas,du.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/renesas,du.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/renesas,du.yaml</a></div><div class='hunk'>@@ -40,6 +40,7 @@ properties:</div><div class='ctx'>       - renesas,du-r8a77990 # for R-Car E3 compatible DU</div><div class='ctx'>       - renesas,du-r8a77995 # for R-Car D3 compatible DU</div><div class='ctx'>       - renesas,du-r8a779a0 # for R-Car V3U compatible DU</div><div class='add'>+      - renesas,du-r8a779g0 # for R-Car V4H compatible DU</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -75,7 +76,7 @@ properties:</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>   renesas,cmms:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       maxItems: 1</div><div class='ctx'>     description:</div><div class='hunk'>@@ -83,7 +84,7 @@ properties:</div><div class='ctx'>       available DU channel.</div><div class='ctx'> </div><div class='ctx'>   renesas,vsps:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       items:</div><div class='ctx'>         - description: phandle to VSP instance that serves the DU channel</div><div class='hunk'>@@ -109,7 +110,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 1</div><div class='del'>-          maxItems: 3</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock</div><div class='ctx'>             - description: DU_DOTCLKIN0 input clock</div><div class='hunk'>@@ -117,7 +117,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 1</div><div class='del'>-          maxItems: 3</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - pattern: '^dclkin\.[01]$'</div><div class='hunk'>@@ -159,7 +158,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -168,7 +166,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -216,7 +213,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -225,7 +221,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -271,7 +266,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -280,7 +274,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -327,7 +320,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -336,7 +328,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -386,7 +377,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 6</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -397,7 +387,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 6</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -448,7 +437,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 4</div><div class='del'>-          maxItems: 8</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -461,7 +449,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 4</div><div class='del'>-          maxItems: 8</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -525,7 +512,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 6</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -536,7 +522,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 6</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -596,7 +581,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 6</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -607,7 +591,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 6</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -666,14 +649,12 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 1</div><div class='del'>-          maxItems: 2</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: DU_DOTCLKIN0 input clock</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 1</div><div class='del'>-          maxItems: 2</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: dclkin.0</div><div class='hunk'>@@ -723,7 +704,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Functional clock for DU0</div><div class='ctx'>             - description: Functional clock for DU1</div><div class='hunk'>@@ -732,7 +712,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'>             - const: du.1</div><div class='hunk'>@@ -784,6 +763,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - renesas,du-r8a779a0</div><div class='add'>+              - renesas,du-r8a779g0</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='hunk'>@@ -791,7 +771,6 @@ allOf:</div><div class='ctx'>             - description: Functional clock</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='del'>-          maxItems: 1</div><div class='ctx'>           items:</div><div class='ctx'>             - const: du.0</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt<br/>deleted file mode 100644<br/>index 43561584c13a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/analogix_dp-rockchip.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,98 +0,0 @@</div><div class='del'>-Rockchip RK3288 specific extensions to the Analogix Display Port</div><div class='del'>-================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "rockchip,rk3288-dp",</div><div class='del'>-	      "rockchip,rk3399-edp";</div><div class='del'>-</div><div class='del'>-- reg: physical base address of the controller and length</div><div class='del'>-</div><div class='del'>-- clocks: from common clock binding: handle to dp clock.</div><div class='del'>-	  of memory mapped region.</div><div class='del'>-</div><div class='del'>-- clock-names: from common clock binding:</div><div class='del'>-	       Required elements: "dp" "pclk"</div><div class='del'>-</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-	  See ../reset/reset.txt for details.</div><div class='del'>-</div><div class='del'>-- pinctrl-names: Names corresponding to the chip hotplug pinctrl states.</div><div class='del'>-- pinctrl-0: pin-control mode. should be &lt;&amp;edp_hpd&gt;</div><div class='del'>-</div><div class='del'>-- reset-names: Must include the name "dp"</div><div class='del'>-</div><div class='del'>-- rockchip,grf: this soc should set GRF regs, so need get grf here.</div><div class='del'>-</div><div class='del'>-- ports: there are 2 port nodes with endpoint definitions as defined in</div><div class='del'>-  Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='del'>-    Port 0: contained 2 endpoints, connecting to the output of vop.</div><div class='del'>-    Port 1: contained 1 endpoint, connecting to the input of panel.</div><div class='del'>-</div><div class='del'>-Optional property for different chips:</div><div class='del'>-- clocks: from common clock binding: handle to grf_vio clock.</div><div class='del'>-</div><div class='del'>-- clock-names: from common clock binding:</div><div class='del'>-	       Required elements: "grf"</div><div class='del'>-</div><div class='del'>-For the below properties, please refer to Analogix DP binding document:</div><div class='del'>- * Documentation/devicetree/bindings/display/bridge/analogix_dp.txt</div><div class='del'>-- phys (required)</div><div class='del'>-- phy-names (required)</div><div class='del'>-- hpd-gpios (optional)</div><div class='del'>-- force-hpd (optional)</div><div class='del'>--------------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	dp-controller: dp@ff970000 {</div><div class='del'>-		compatible = "rockchip,rk3288-dp";</div><div class='del'>-		reg = &lt;0xff970000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_EDP&gt;, &lt;&amp;cru PCLK_EDP_CTRL&gt;;</div><div class='del'>-		clock-names = "dp", "pclk";</div><div class='del'>-		phys = &lt;&amp;dp_phy&gt;;</div><div class='del'>-		phy-names = "dp";</div><div class='del'>-</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		resets = &lt;&amp;cru 111&gt;;</div><div class='del'>-		reset-names = "dp";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;edp_hpd&gt;;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			edp_in: port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				edp_in_vopb: endpoint@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopb_out_edp&gt;;</div><div class='del'>-				};</div><div class='del'>-				edp_in_vopl: endpoint@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopl_out_edp&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			edp_out: port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				edp_out_panel: endpoint {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;panel_in_edp&gt;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pinctrl {</div><div class='del'>-		edp {</div><div class='del'>-			edp_hpd: edp-hpd {</div><div class='del'>-				rockchip,pins = &lt;7 11 RK_FUNC_2 &amp;pcfg_pull_none&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt<br/>deleted file mode 100644<br/>index 39792f051d2d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,93 +0,0 @@</div><div class='del'>-Rockchip specific extensions to the Synopsys Designware MIPI DSI</div><div class='del'>-================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- #address-cells: Should be &lt;1&gt;.</div><div class='del'>-- #size-cells: Should be &lt;0&gt;.</div><div class='del'>-- compatible: one of</div><div class='del'>-	"rockchip,px30-mipi-dsi", "snps,dw-mipi-dsi"</div><div class='del'>-	"rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi"</div><div class='del'>-	"rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi"</div><div class='del'>-- reg: Represent the physical address range of the controller.</div><div class='del'>-- interrupts: Represent the controller's interrupt to the CPU(s).</div><div class='del'>-- clocks, clock-names: Phandles to the controller's pll reference</div><div class='del'>-  clock(ref) when using an internal dphy and APB clock(pclk).</div><div class='del'>-  For RK3399, a phy config clock (phy_cfg) and a grf clock(grf)</div><div class='del'>-  are required. As described in [1].</div><div class='del'>-- rockchip,grf: this soc should set GRF regs to mux vopl/vopb.</div><div class='del'>-- ports: contain a port node with endpoint definitions as defined in [2].</div><div class='del'>-  For vopb,set the reg = &lt;0&gt; and set the reg = &lt;1&gt; for vopl.</div><div class='del'>-- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl</div><div class='del'>-- video port 1 for either a panel or subsequent encoder</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- phys: from general PHY binding: the phandle for the PHY device.</div><div class='del'>-- phy-names: Should be "dphy" if phys references an external phy.</div><div class='del'>-- #phy-cells: Defined when used as ISP phy, should be 0.</div><div class='del'>-- power-domains: a phandle to mipi dsi power domain node.</div><div class='del'>-- resets: list of phandle + reset specifier pairs, as described in [3].</div><div class='del'>-- reset-names: string reset name, must be "apb".</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='del'>-[2] Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-[3] Documentation/devicetree/bindings/reset/reset.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	mipi_dsi: mipi@ff960000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";</div><div class='del'>-		reg = &lt;0xff960000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_MIPI_24M&gt;, &lt;&amp;cru PCLK_MIPI_DSI0&gt;;</div><div class='del'>-		clock-names = "ref", "pclk";</div><div class='del'>-		resets = &lt;&amp;cru SRST_MIPIDSI0&gt;;</div><div class='del'>-		reset-names = "apb";</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			mipi_in: port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				mipi_in_vopb: endpoint@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopb_out_mipi&gt;;</div><div class='del'>-				};</div><div class='del'>-				mipi_in_vopl: endpoint@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopl_out_mipi&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			mipi_out: port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				mipi_out_panel: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;panel_in_mipi&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		panel {</div><div class='del'>-			compatible ="boe,tv080wum-nl0";</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			enable-gpios = &lt;&amp;gpio7 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;lcd_en&gt;;</div><div class='del'>-			backlight = &lt;&amp;backlight&gt;;</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				panel_in_mipi: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;mipi_out_panel&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml<br/>new file mode 100644<br/>index 000000000000..60dedf9b2be7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/rockchip/rockchip,analogix-dp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip specific extensions to the Analogix Display Port</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sandy Huang &lt;hjc@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3288-dp</div><div class='add'>+      - rockchip,rk3399-edp</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: dp</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: grf</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: dp</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      This SoC makes use of GRF regs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - rockchip,grf</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/display/bridge/analogix,dp.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3288-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    dp@ff970000 {</div><div class='add'>+      compatible = "rockchip,rk3288-dp";</div><div class='add'>+      reg = &lt;0xff970000 0x4000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;cru SCLK_EDP&gt;, &lt;&amp;cru PCLK_EDP_CTRL&gt;;</div><div class='add'>+      clock-names = "dp", "pclk";</div><div class='add'>+      phys = &lt;&amp;dp_phy&gt;;</div><div class='add'>+      phy-names = "dp";</div><div class='add'>+      resets = &lt;&amp;cru 111&gt;;</div><div class='add'>+      reset-names = "dp";</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      pinctrl-0 = &lt;&amp;edp_hpd&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+      ports {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        edp_in: port@0 {</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          edp_in_vopb: endpoint@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            remote-endpoint = &lt;&amp;vopb_out_edp&gt;;</div><div class='add'>+          };</div><div class='add'>+          edp_in_vopl: endpoint@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            remote-endpoint = &lt;&amp;vopl_out_edp&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        edp_out: port@1 {</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+          edp_out_panel: endpoint {</div><div class='add'>+            remote-endpoint = &lt;&amp;panel_in_edp&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml<br/>index da3b889ad8fc..7e59dee15a5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml</a></div><div class='hunk'>@@ -23,10 +23,22 @@ properties:</div><div class='ctx'>       - rockchip,rk3288-dw-hdmi</div><div class='ctx'>       - rockchip,rk3328-dw-hdmi</div><div class='ctx'>       - rockchip,rk3399-dw-hdmi</div><div class='add'>+      - rockchip,rk3568-dw-hdmi</div><div class='ctx'> </div><div class='ctx'>   reg-io-width:</div><div class='ctx'>     const: 4</div><div class='ctx'> </div><div class='add'>+  avdd-0v9-supply:</div><div class='add'>+    description:</div><div class='add'>+      A 0.9V supply that powers up the SoC internal circuitry. The actual pin name</div><div class='add'>+      varies between the different SoCs and is usually HDMI_TX_AVDD_0V9 or sometimes</div><div class='add'>+      HDMI_AVDD_1V0.</div><div class='add'>+</div><div class='add'>+  avdd-1v8-supply:</div><div class='add'>+    description:</div><div class='add'>+      A 1.8V supply that powers up the SoC internal circuitry. The pin name on the</div><div class='add'>+      SoC usually is HDMI_TX_AVDD_1V8.</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     items:</div><div class='hunk'>@@ -36,7 +48,8 @@ properties:</div><div class='ctx'>       # order when present.</div><div class='ctx'>       - description: The HDMI CEC controller main clock</div><div class='ctx'>       - description: Power for GRF IO</div><div class='del'>-      - description: External clock for some HDMI PHY</div><div class='add'>+      - description: External clock for some HDMI PHY (old clock name, deprecated)</div><div class='add'>+      - description: External clock for some HDMI PHY (new name)</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 2</div><div class='hunk'>@@ -47,10 +60,14 @@ properties:</div><div class='ctx'>           - cec</div><div class='ctx'>           - grf</div><div class='ctx'>           - vpll</div><div class='add'>+          - ref</div><div class='ctx'>       - enum:</div><div class='ctx'>           - grf</div><div class='ctx'>           - vpll</div><div class='del'>-      - const: vpll</div><div class='add'>+          - ref</div><div class='add'>+      - enum:</div><div class='add'>+          - vpll</div><div class='add'>+          - ref</div><div class='ctx'> </div><div class='ctx'>   ddc-i2c-bus:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='hunk'>@@ -72,6 +89,7 @@ properties:</div><div class='ctx'>       The unwedge pinctrl entry shall drive the DDC SDA line low. This is</div><div class='ctx'>       intended to work around a hardware errata that can cause the DDC I2C</div><div class='ctx'>       bus to be wedged.</div><div class='add'>+    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: default</div><div class='ctx'>       - const: unwedge</div><div class='hunk'>@@ -79,27 +97,21 @@ properties:</div><div class='ctx'>   ports:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'> </div><div class='del'>-    properties:</div><div class='del'>-      port:</div><div class='del'>-        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='del'>-        unevaluatedProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port(@0)?$":</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'>         description: Input of the DWC HDMI TX</div><div class='del'>-</div><div class='ctx'>         properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            description: Connection to the VOP</div><div class='ctx'>           endpoint@0:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/endpoint</div><div class='ctx'>             description: Connection to the VOPB</div><div class='del'>-</div><div class='ctx'>           endpoint@1:</div><div class='del'>-            $ref: /schemas/graph.yaml#/properties/endpoint</div><div class='ctx'>             description: Connection to the VOPL</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - endpoint@0</div><div class='del'>-          - endpoint@1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - port</div><div class='add'>+    properties:</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Output of the DWC HDMI TX</div><div class='ctx'> </div><div class='ctx'>   rockchip,grf:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml<br/>new file mode 100644<br/>index 000000000000..8e8a40879140<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml</a></div><div class='hunk'>@@ -0,0 +1,166 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-mipi-dsi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip specific extensions to the Synopsys Designware MIPI DSI</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sandy Huang &lt;hjc@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - rockchip,px30-mipi-dsi</div><div class='add'>+          - rockchip,rk3288-mipi-dsi</div><div class='add'>+          - rockchip,rk3399-mipi-dsi</div><div class='add'>+          - rockchip,rk3568-mipi-dsi</div><div class='add'>+      - const: snps,dw-mipi-dsi</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - minItems: 2</div><div class='add'>+        items:</div><div class='add'>+          - const: ref</div><div class='add'>+          - const: pclk</div><div class='add'>+          - const: phy_cfg</div><div class='add'>+          - const: grf</div><div class='add'>+      - const: pclk</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      This SoC uses GRF regs to switch between vopl/vopb.</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: dphy</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+    description:</div><div class='add'>+      Defined when in use as ISP phy.</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - rockchip,grf</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/display/bridge/snps,dw-mipi-dsi.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - rockchip,px30-mipi-dsi</div><div class='add'>+              - rockchip,rk3568-mipi-dsi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - phys</div><div class='add'>+        - phy-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3288-mipi-dsi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3399-mipi-dsi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 4</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3288-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    mipi_dsi: dsi@ff960000 {</div><div class='add'>+      compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";</div><div class='add'>+      reg = &lt;0xff960000 0x4000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;cru SCLK_MIPIDSI_24M&gt;, &lt;&amp;cru PCLK_MIPI_DSI0&gt;;</div><div class='add'>+      clock-names = "ref", "pclk";</div><div class='add'>+      resets = &lt;&amp;cru SRST_MIPIDSI0&gt;;</div><div class='add'>+      reset-names = "apb";</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+</div><div class='add'>+      ports {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        mipi_in: port@0 {</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          mipi_in_vopb: endpoint@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            remote-endpoint = &lt;&amp;vopb_out_mipi&gt;;</div><div class='add'>+          };</div><div class='add'>+          mipi_in_vopl: endpoint@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            remote-endpoint = &lt;&amp;vopl_out_mipi&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mipi_out: port@1 {</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+          mipi_out_panel: endpoint {</div><div class='add'>+            remote-endpoint = &lt;&amp;panel_in_mipi&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,lvds.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,lvds.yaml<br/>new file mode 100644<br/>index 000000000000..03b002a05c47<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip,lvds.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/rockchip/rockchip,lvds.yaml</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/rockchip/rockchip,lvds.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip low-voltage differential signal (LVDS) transmitter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sandy Huang &lt;hjc@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,px30-lvds</div><div class='add'>+      - rockchip,rk3288-lvds</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: pclk_lvds</div><div class='add'>+</div><div class='add'>+  avdd1v0-supply:</div><div class='add'>+    description: 1.0V analog power.</div><div class='add'>+</div><div class='add'>+  avdd1v8-supply:</div><div class='add'>+    description: 1.8V analog power.</div><div class='add'>+</div><div class='add'>+  avdd3v3-supply:</div><div class='add'>+    description: 3.3V analog power.</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Phandle to the general register files syscon.</div><div class='add'>+</div><div class='add'>+  rockchip,output:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum: [rgb, lvds, duallvds]</div><div class='add'>+    description: This describes the output interface.</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: dphy</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    const: lcdc</div><div class='add'>+</div><div class='add'>+  pinctrl-0: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Video port 0 for the VOP input.</div><div class='add'>+          The remote endpoint maybe vopb or vopl.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Video port 1 for either a panel or subsequent encoder.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - rockchip,grf</div><div class='add'>+  - rockchip,output</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,px30-lvds</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg: false</div><div class='add'>+        clocks: false</div><div class='add'>+        clock-names: false</div><div class='add'>+        avdd1v0-supply: false</div><div class='add'>+        avdd1v8-supply: false</div><div class='add'>+        avdd3v3-supply: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - phys</div><div class='add'>+        - phy-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3288-lvds</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        phys: false</div><div class='add'>+        phy-names: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+        - avdd1v0-supply</div><div class='add'>+        - avdd1v8-supply</div><div class='add'>+        - avdd3v3-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3288-cru.h&gt;</div><div class='add'>+</div><div class='add'>+    lvds: lvds@ff96c000 {</div><div class='add'>+      compatible = "rockchip,rk3288-lvds";</div><div class='add'>+      reg = &lt;0xff96c000 0x4000&gt;;</div><div class='add'>+      clocks = &lt;&amp;cru PCLK_LVDS_PHY&gt;;</div><div class='add'>+      clock-names = "pclk_lvds";</div><div class='add'>+      avdd1v0-supply = &lt;&amp;vdd10_lcd&gt;;</div><div class='add'>+      avdd1v8-supply = &lt;&amp;vcc18_lcd&gt;;</div><div class='add'>+      avdd3v3-supply = &lt;&amp;vcca_33&gt;;</div><div class='add'>+      pinctrl-names = "lcdc";</div><div class='add'>+      pinctrl-0 = &lt;&amp;lcdc_ctl&gt;;</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      rockchip,output = "rgb";</div><div class='add'>+</div><div class='add'>+      ports {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        lvds_in: port@0 {</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          lvds_in_vopb: endpoint@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            remote-endpoint = &lt;&amp;vopb_out_lvds&gt;;</div><div class='add'>+          };</div><div class='add'>+          lvds_in_vopl: endpoint@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            remote-endpoint = &lt;&amp;vopl_out_lvds&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        lvds_out: port@1 {</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+          lvds_out_panel: endpoint {</div><div class='add'>+            remote-endpoint = &lt;&amp;panel_in_lvds&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt<br/>deleted file mode 100644<br/>index aaf8c44cf90f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-Rockchip RK3288 LVDS interface</div><div class='del'>-================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: matching the soc type, one of</div><div class='del'>-	- "rockchip,rk3288-lvds";</div><div class='del'>-	- "rockchip,px30-lvds";</div><div class='del'>-</div><div class='del'>-- reg: physical base address of the controller and length</div><div class='del'>-	of memory mapped region.</div><div class='del'>-- clocks: must include clock specifiers corresponding to entries in the</div><div class='del'>-	clock-names property.</div><div class='del'>-- clock-names: must contain "pclk_lvds"</div><div class='del'>-</div><div class='del'>-- avdd1v0-supply: regulator phandle for 1.0V analog power</div><div class='del'>-- avdd1v8-supply: regulator phandle for 1.8V analog power</div><div class='del'>-- avdd3v3-supply: regulator phandle for 3.3V analog power</div><div class='del'>-</div><div class='del'>-- rockchip,grf: phandle to the general register files syscon</div><div class='del'>-- rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface</div><div class='del'>-</div><div class='del'>-- phys: LVDS/DSI DPHY (px30 only)</div><div class='del'>-- phy-names: name of the PHY, must be "dphy" (px30 only)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- pinctrl-names: must contain a "lcdc" entry.</div><div class='del'>-- pinctrl-0: pin control group to be used for this controller.</div><div class='del'>-</div><div class='del'>-Required nodes:</div><div class='del'>-</div><div class='del'>-The lvds has two video ports as described by</div><div class='del'>-	Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-Their connections are modeled using the OF graph bindings specified in</div><div class='del'>-	Documentation/devicetree/bindings/graph.txt.</div><div class='del'>-</div><div class='del'>-- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl</div><div class='del'>-- video port 1 for either a panel or subsequent encoder</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-lvds_panel: lvds-panel {</div><div class='del'>-	compatible = "auo,b101ean01";</div><div class='del'>-	enable-gpios = &lt;&amp;gpio7 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	data-mapping = "jeida-24";</div><div class='del'>-</div><div class='del'>-	ports {</div><div class='del'>-		panel_in_lvds: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;lvds_out_panel&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-For Rockchip RK3288:</div><div class='del'>-</div><div class='del'>-	lvds: lvds@ff96c000 {</div><div class='del'>-		compatible = "rockchip,rk3288-lvds";</div><div class='del'>-		rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-		reg = &lt;0xff96c000 0x4000&gt;;</div><div class='del'>-		clocks = &lt;&amp;cru PCLK_LVDS_PHY&gt;;</div><div class='del'>-		clock-names = "pclk_lvds";</div><div class='del'>-		pinctrl-names = "lcdc";</div><div class='del'>-		pinctrl-0 = &lt;&amp;lcdc_ctl&gt;;</div><div class='del'>-		avdd1v0-supply = &lt;&amp;vdd10_lcd&gt;;</div><div class='del'>-		avdd1v8-supply = &lt;&amp;vcc18_lcd&gt;;</div><div class='del'>-		avdd3v3-supply = &lt;&amp;vcca_33&gt;;</div><div class='del'>-		rockchip,output = "rgb";</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			lvds_in: port@0 {</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				lvds_in_vopb: endpoint@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopb_out_lvds&gt;;</div><div class='del'>-				};</div><div class='del'>-				lvds_in_vopl: endpoint@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;vopl_out_lvds&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			lvds_out: port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-				lvds_out_panel: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;panel_in_lvds&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml<br/>new file mode 100644<br/>index 000000000000..fba45091d909<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip SoC display controller (VOP2)</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  VOP2 (Video Output Processor v2) is the display controller for the Rockchip</div><div class='add'>+  series of SoCs which transfers the image data from a video memory</div><div class='add'>+  buffer to an external LCD interface.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sandy Huang &lt;hjc@rock-chips.com&gt;</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3566-vop</div><div class='add'>+      - rockchip,rk3568-vop</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          Must contain one entry corresponding to the base address and length</div><div class='add'>+          of the register space.</div><div class='add'>+      - description:</div><div class='add'>+          Can optionally contain a second entry corresponding to</div><div class='add'>+          the CRTC gamma LUT address.</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vop</div><div class='add'>+      - const: gamma-lut</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      The VOP interrupt is shared by several interrupt sources, such as</div><div class='add'>+      frame start (VSYNC), line flag and other status interrupts.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Clock for ddr buffer transfer.</div><div class='add'>+      - description: Clock for the ahb bus to R/W the phy regs.</div><div class='add'>+      - description: Pixel clock for video port 0.</div><div class='add'>+      - description: Pixel clock for video port 1.</div><div class='add'>+      - description: Pixel clock for video port 2.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: hclk</div><div class='add'>+      - const: dclk_vp0</div><div class='add'>+      - const: dclk_vp1</div><div class='add'>+      - const: dclk_vp2</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to GRF regs used for misc control</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Output endpoint of VP0</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Output endpoint of VP1</div><div class='add'>+</div><div class='add'>+      port@2:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Output endpoint of VP2</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+        #include &lt;dt-bindings/clock/rk3568-cru.h&gt;</div><div class='add'>+        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+        #include &lt;dt-bindings/power/rk3568-power.h&gt;</div><div class='add'>+        bus {</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            vop: vop@fe040000 {</div><div class='add'>+                compatible = "rockchip,rk3568-vop";</div><div class='add'>+                reg = &lt;0x0 0xfe040000 0x0 0x3000&gt;, &lt;0x0 0xfe044000 0x0 0x1000&gt;;</div><div class='add'>+                reg-names = "vop", "gamma-lut";</div><div class='add'>+                interrupts = &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+                clocks = &lt;&amp;cru ACLK_VOP&gt;,</div><div class='add'>+                         &lt;&amp;cru HCLK_VOP&gt;,</div><div class='add'>+                         &lt;&amp;cru DCLK_VOP0&gt;,</div><div class='add'>+                         &lt;&amp;cru DCLK_VOP1&gt;,</div><div class='add'>+                         &lt;&amp;cru DCLK_VOP2&gt;;</div><div class='add'>+                clock-names = "aclk",</div><div class='add'>+                              "hclk",</div><div class='add'>+                              "dclk_vp0",</div><div class='add'>+                              "dclk_vp1",</div><div class='add'>+                              "dclk_vp2";</div><div class='add'>+                power-domains = &lt;&amp;power RK3568_PD_VO&gt;;</div><div class='add'>+                iommus = &lt;&amp;vop_mmu&gt;;</div><div class='add'>+                vop_out: ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    vp0: port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        #address-cells = &lt;1&gt;;</div><div class='add'>+                        #size-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                    vp1: port@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        #address-cells = &lt;1&gt;;</div><div class='add'>+                        #size-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                    vp2: port@2 {</div><div class='add'>+                        reg = &lt;2&gt;;</div><div class='add'>+                        #address-cells = &lt;1&gt;;</div><div class='add'>+                        #size-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml<br/>index f998a3a5b71f..458d399cb025 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi-ddc.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung Exynos SoC HDMI DDC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml<br/>index cb8e735ce3bd..e4a68c5a1a09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-hdmi.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung Exynos SoC HDMI</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml<br/>index ba40284ac66f..25d53fde92e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/samsung/samsung,exynos-mixer.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung Exynos SoC Mixer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Samsung Exynos SoC Mixer is responsible for mixing and blending multiple data</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml<br/>index 6f796835ea03..6380eeebb073 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-decon.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung Exynos5433 SoC Display and Enhancement Controller (DECON)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   DECON (Display and Enhancement Controller) is the Display Controller for the</div><div class='hunk'>@@ -25,7 +24,6 @@ properties:</div><div class='ctx'>       - samsung,exynos5433-decon-tv</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 11</div><div class='ctx'>     maxItems: 11</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='hunk'>@@ -60,7 +58,6 @@ properties:</div><div class='ctx'>       - const: te</div><div class='ctx'> </div><div class='ctx'>   iommus:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   iommu-names:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml<br/>index 01fccb138ebd..26e5017737a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/samsung/samsung,exynos5433-mic.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung Exynos5433 SoC Mobile Image Compressor (MIC)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   MIC (Mobile Image Compressor) resides between DECON and MIPI DSI. MIPI DSI is</div><div class='hunk'>@@ -25,7 +24,6 @@ properties:</div><div class='ctx'>     const: samsung,exynos5433-mic</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml<br/>index afa137d47922..992c23ca7a4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/samsung/samsung,exynos7-decon.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   DECON (Display and Enhancement Controller) is the Display Controller for the</div><div class='hunk'>@@ -23,7 +22,6 @@ properties:</div><div class='ctx'>     const: samsung,exynos7-decon</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 4</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='hunk'>@@ -38,6 +36,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   i80-if-timings:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: timing configuration for lcd i80 interface support</div><div class='ctx'>     properties:</div><div class='ctx'>       cs-setup:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml b/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml<br/>index 9cf5f120d516..075231716b2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/samsung/samsung,fimd.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung S3C/S5P/Exynos SoC Fully Interactive Mobile Display (FIMD)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -28,7 +27,6 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='hunk'>@@ -41,6 +39,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   i80-if-timings:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       Timing configuration for lcd i80 interface support.</div><div class='ctx'>       The parameters are defined as::</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/simple-framebuffer.yaml b/Documentation/devicetree/bindings/display/simple-framebuffer.yaml<br/>index 27ba4323d221..296500f9da05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/simple-framebuffer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/simple-framebuffer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/simple-framebuffer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/simple-framebuffer.yaml</a></div><div class='hunk'>@@ -4,10 +4,9 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/simple-framebuffer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Simple Framebuffer Device Tree Bindings</div><div class='add'>+title: Simple Framebuffer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;</div><div class='ctx'>   - Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |+</div><div class='hunk'>@@ -27,6 +26,11 @@ description: |+</div><div class='ctx'>   over control to a driver for the real hardware. The bindings for the</div><div class='ctx'>   hw nodes must specify which node is considered the primary node.</div><div class='ctx'> </div><div class='add'>+  If a panel node is given, then the driver uses this to configure the</div><div class='add'>+  physical width and height of the display. If no panel node is given,</div><div class='add'>+  then the driver uses the width and height properties of the simplefb</div><div class='add'>+  node to estimate it.</div><div class='add'>+</div><div class='ctx'>   It is advised to add display# aliases to help the OS determine how</div><div class='ctx'>   to number things. If display# aliases are used, then if the simplefb</div><div class='ctx'>   node contains a display property then the /aliases/display# path</div><div class='hunk'>@@ -64,6 +68,11 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     description: Location and size of the framebuffer memory</div><div class='ctx'> </div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Phandle to a node describing the memory to be used for the</div><div class='add'>+      framebuffer. If present, overrides the "reg" property (if one exists).</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     description: List of clocks used by the framebuffer.</div><div class='ctx'> </div><div class='hunk'>@@ -95,6 +104,7 @@ properties:</div><div class='ctx'>         * `x1r5g5b5` - 16-bit pixels, d[14:10]=r, d[9:5]=g, d[4:0]=b</div><div class='ctx'>         * `x2r10g10b10` - 32-bit pixels, d[29:20]=r, d[19:10]=g, d[9:0]=b</div><div class='ctx'>         * `x8r8g8b8` - 32-bit pixels, d[23:16]=r, d[15:8]=g, d[7:0]=b</div><div class='add'>+        * `x8b8g8r8` - 32-bit pixels, d[23:16]=b, d[15:8]=g, d[7:0]=r</div><div class='ctx'>     enum:</div><div class='ctx'>       - a1r5g5b5</div><div class='ctx'>       - a2r10g10b10</div><div class='hunk'>@@ -106,11 +116,16 @@ properties:</div><div class='ctx'>       - x1r5g5b5</div><div class='ctx'>       - x2r10g10b10</div><div class='ctx'>       - x8r8g8b8</div><div class='add'>+      - x8b8g8r8</div><div class='ctx'> </div><div class='ctx'>   display:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: Primary display hardware node</div><div class='ctx'> </div><div class='add'>+  panel:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Display panel node</div><div class='add'>+</div><div class='ctx'>   allwinner,pipeline:</div><div class='ctx'>     description: Pipeline used by the framebuffer on Allwinner SoCs</div><div class='ctx'>     enum:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml b/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml<br/>index 0cebaaefda03..621f27148419 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/sitronix,st7735r.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/sitronix,st7735r.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/sitronix,st7735r.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/display/sitronix,st7735r.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Sitronix ST7735R Display Panels Device Tree Bindings</div><div class='add'>+title: Sitronix ST7735R Display Panels</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - David Lechner &lt;david@lechnology.com&gt;</div><div class='hunk'>@@ -15,6 +15,7 @@ description:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: panel/panel-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -32,15 +33,13 @@ properties:</div><div class='ctx'>               - okaya,rh128128t</div><div class='ctx'>           - const: sitronix,st7715r</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency:</div><div class='del'>-    maximum: 32000000</div><div class='del'>-</div><div class='ctx'>   dc-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: Display data/command selection (D/CX)</div><div class='ctx'> </div><div class='ctx'>   backlight: true</div><div class='ctx'>   reg: true</div><div class='add'>+  spi-max-frequency: true</div><div class='ctx'>   reset-gpios: true</div><div class='ctx'>   rotation: true</div><div class='ctx'> </div><div class='hunk'>@@ -48,7 +47,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - dc-gpios</div><div class='del'>-  - reset-gpios</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -72,6 +70,7 @@ examples:</div><div class='ctx'>                     dc-gpios = &lt;&amp;gpio 43 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'>                     reset-gpios = &lt;&amp;gpio 80 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'>                     rotation = &lt;270&gt;;</div><div class='add'>+                    backlight = &lt;&amp;backlight&gt;;</div><div class='ctx'>             };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml b/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml<br/>index 9baafd0c42dd..94bb5ef567c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml</a></div><div class='hunk'>@@ -12,11 +12,20 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - solomon,ssd1305fb-i2c</div><div class='del'>-      - solomon,ssd1306fb-i2c</div><div class='del'>-      - solomon,ssd1307fb-i2c</div><div class='del'>-      - solomon,ssd1309fb-i2c</div><div class='add'>+    oneOf:</div><div class='add'>+      # Deprecated compatible strings</div><div class='add'>+      - enum:</div><div class='add'>+          - solomon,ssd1305fb-i2c</div><div class='add'>+          - solomon,ssd1306fb-i2c</div><div class='add'>+          - solomon,ssd1307fb-i2c</div><div class='add'>+          - solomon,ssd1309fb-i2c</div><div class='add'>+        deprecated: true</div><div class='add'>+      - enum:</div><div class='add'>+          - sinowealth,sh1106</div><div class='add'>+          - solomon,ssd1305</div><div class='add'>+          - solomon,ssd1306</div><div class='add'>+          - solomon,ssd1307</div><div class='add'>+          - solomon,ssd1309</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -27,6 +36,14 @@ properties:</div><div class='ctx'>   reset-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  # Only required for SPI</div><div class='add'>+  dc-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO connected to the controller's D/C# (Data/Command) pin,</div><div class='add'>+      that is needed for 4-wire SPI to tell the controller if the</div><div class='add'>+      data sent is for a command register or the display data RAM</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   vbat-supply:</div><div class='ctx'>     description: The supply for VBAT</div><div class='ctx'> </div><div class='hunk'>@@ -131,11 +148,27 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: sinowealth,sh1106</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        solomon,dclk-div:</div><div class='add'>+          default: 1</div><div class='add'>+        solomon,dclk-frq:</div><div class='add'>+          default: 5</div><div class='add'>+</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: solomon,ssd1305fb-i2c</div><div class='add'>+            enum:</div><div class='add'>+              - solomon,ssd1305-i2c</div><div class='add'>+              - solomon,ssd1305</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         solomon,dclk-div:</div><div class='hunk'>@@ -147,7 +180,9 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: solomon,ssd1306fb-i2c</div><div class='add'>+            enum:</div><div class='add'>+              - solomon,ssd1306-i2c</div><div class='add'>+              - solomon,ssd1306</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         solomon,dclk-div:</div><div class='hunk'>@@ -159,7 +194,9 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: solomon,ssd1307fb-i2c</div><div class='add'>+            enum:</div><div class='add'>+              - solomon,ssd1307-i2c</div><div class='add'>+              - solomon,ssd1307</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         solomon,dclk-div:</div><div class='hunk'>@@ -173,7 +210,9 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: solomon,ssd1309fb-i2c</div><div class='add'>+            enum:</div><div class='add'>+              - solomon,ssd1309-i2c</div><div class='add'>+              - solomon,ssd1309</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         solomon,dclk-div:</div><div class='hunk'>@@ -181,26 +220,53 @@ allOf:</div><div class='ctx'>         solomon,dclk-frq:</div><div class='ctx'>           default: 10</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-            ssd1307: oled@3c {</div><div class='del'>-                    compatible = "solomon,ssd1307fb-i2c";</div><div class='add'>+            ssd1307_i2c: oled@3c {</div><div class='add'>+                    compatible = "solomon,ssd1307";</div><div class='ctx'>                     reg = &lt;0x3c&gt;;</div><div class='ctx'>                     pwms = &lt;&amp;pwm 4 3000&gt;;</div><div class='ctx'>                     reset-gpios = &lt;&amp;gpio2 7&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='del'>-            ssd1306: oled@3d {</div><div class='del'>-                    compatible = "solomon,ssd1306fb-i2c";</div><div class='del'>-                    reg = &lt;0x3c&gt;;</div><div class='add'>+            ssd1306_i2c: oled@3d {</div><div class='add'>+                    compatible = "solomon,ssd1306";</div><div class='add'>+                    reg = &lt;0x3d&gt;;</div><div class='add'>+                    pwms = &lt;&amp;pwm 4 3000&gt;;</div><div class='add'>+                    reset-gpios = &lt;&amp;gpio2 7&gt;;</div><div class='add'>+                    solomon,com-lrremap;</div><div class='add'>+                    solomon,com-invdir;</div><div class='add'>+                    solomon,com-offset = &lt;32&gt;;</div><div class='add'>+                    solomon,lookup-table = /bits/ 8 &lt;0x3f 0x3f 0x3f 0x3f&gt;;</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ssd1307_spi: oled@0 {</div><div class='add'>+                    compatible = "solomon,ssd1307";</div><div class='add'>+                    reg = &lt;0x0&gt;;</div><div class='add'>+                    pwms = &lt;&amp;pwm 4 3000&gt;;</div><div class='add'>+                    reset-gpios = &lt;&amp;gpio2 7&gt;;</div><div class='add'>+                    dc-gpios = &lt;&amp;gpio2 8&gt;;</div><div class='add'>+                    spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            ssd1306_spi: oled@1 {</div><div class='add'>+                    compatible = "solomon,ssd1306";</div><div class='add'>+                    reg = &lt;0x1&gt;;</div><div class='ctx'>                     pwms = &lt;&amp;pwm 4 3000&gt;;</div><div class='ctx'>                     reset-gpios = &lt;&amp;gpio2 7&gt;;</div><div class='add'>+                    dc-gpios = &lt;&amp;gpio2 8&gt;;</div><div class='add'>+                    spi-max-frequency = &lt;10000000&gt;;</div><div class='ctx'>                     solomon,com-lrremap;</div><div class='ctx'>                     solomon,com-invdir;</div><div class='ctx'>                     solomon,com-offset = &lt;32&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml<br/>index d0a5592bd89d..b3d5e1b96fae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/sprd/sprd,display-subsystem.yaml</a></div><div class='hunk'>@@ -63,4 +63,3 @@ examples:</div><div class='ctx'>         compatible = "sprd,display-subsystem";</div><div class='ctx'>         ports = &lt;&amp;dpu_out&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml b/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml<br/>index 54f67cb51040..c488308d7be1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/st,stm32-dsi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/st,stm32-dsi.yaml</a></div><div class='hunk'>@@ -58,9 +58,20 @@ properties:</div><div class='ctx'>           DSI input port node, connected to the ltdc rgb output port.</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='del'>-        $ref: /schemas/graph.yaml#/properties/port</div><div class='del'>-        description:</div><div class='del'>-          DSI output port node, connected to a panel or a bridge input port"</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: |</div><div class='add'>+          DSI output port node, connected to a panel or a bridge input port.</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#address-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml b/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml<br/>index 01e2da23790b..d6ea4d62a2cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/st,stm32-ltdc.yaml</a></div><div class='hunk'>@@ -75,4 +75,3 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt<br/>deleted file mode 100644<br/>index e4a25cedc5cf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-NVIDIA Tegra MIPI pad calibration controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nvidia,tegra&lt;chip&gt;-mipi"</div><div class='del'>-- reg: Physical base address and length of the controller's registers.</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names: Must include the following entries:</div><div class='del'>-  - mipi-cal</div><div class='del'>-- #nvidia,mipi-calibrate-cells: Should be 1. The cell is a bitmask of the pads</div><div class='del'>-  that need to be calibrated for a given device.</div><div class='del'>-</div><div class='del'>-User nodes need to contain an nvidia,mipi-calibrate property that has a</div><div class='del'>-phandle to refer to the calibration controller node and a bitmask of the pads</div><div class='del'>-that need to be calibrated.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	mipi: mipi@700e3000 {</div><div class='del'>-		compatible = "nvidia,tegra114-mipi";</div><div class='del'>-		reg = &lt;0x700e3000 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;tegra_car TEGRA114_CLK_MIPI_CAL&gt;;</div><div class='del'>-		clock-names = "mipi-cal";</div><div class='del'>-		#nvidia,mipi-calibrate-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	host1x@50000000 {</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-		dsi@54300000 {</div><div class='del'>-			...</div><div class='del'>-</div><div class='del'>-			nvidia,mipi-calibrate = &lt;&amp;mipi 0x060&gt;;</div><div class='del'>-</div><div class='del'>-			...</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		...</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml<br/>new file mode 100644<br/>index 000000000000..f448624dd779<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra MIPI pad calibration controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^mipi@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra114-mipi</div><div class='add'>+      - nvidia,tegra210-mipi</div><div class='add'>+      - nvidia,tegra186-mipi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mipi-cal</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#nvidia,mipi-calibrate-cells":</div><div class='add'>+    description: The number of cells in a MIPI calibration specifier.</div><div class='add'>+      Should be 1. The single cell specifies a bitmask of the pads that</div><div class='add'>+      need to be calibrated for a given device.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - "#nvidia,mipi-calibrate-cells"</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra114-car.h&gt;</div><div class='add'>+</div><div class='add'>+    mipi@700e3000 {</div><div class='add'>+        compatible = "nvidia,tegra114-mipi";</div><div class='add'>+        reg = &lt;0x700e3000 0x100&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA114_CLK_MIPI_CAL&gt;;</div><div class='add'>+        clock-names = "mipi-cal";</div><div class='add'>+        #nvidia,mipi-calibrate-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    dsia: dsi@54300000 {</div><div class='add'>+        compatible = "nvidia,tegra114-dsi";</div><div class='add'>+        reg = &lt;0x54300000 0x00040000&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA114_CLK_DSIA&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA114_CLK_DSIALP&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA114_CLK_PLL_D_OUT0&gt;;</div><div class='add'>+        clock-names = "dsi", "lp", "parent";</div><div class='add'>+        resets = &lt;&amp;tegra_car 48&gt;;</div><div class='add'>+        reset-names = "dsi";</div><div class='add'>+        nvidia,mipi-calibrate = &lt;&amp;mipi 0x060&gt;; /* DSIA &amp; DSIB pads */</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml<br/>new file mode 100644<br/>index 000000000000..5cdbc527a560<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-dpaux.yaml</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra DisplayPort AUX Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Tegra Display Port Auxiliary (DPAUX) pad controller manages two</div><div class='add'>+  pins which can be assigned to either the DPAUX channel or to an I2C</div><div class='add'>+  controller.</div><div class='add'>+</div><div class='add'>+  When configured for DisplayPort AUX operation, the DPAUX controller</div><div class='add'>+  can also be used to communicate with a DisplayPort device using the</div><div class='add'>+  AUX channel.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^dpaux@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra124-dpaux</div><div class='add'>+          - nvidia,tegra210-dpaux</div><div class='add'>+          - nvidia,tegra186-dpaux</div><div class='add'>+          - nvidia,tegra194-dpaux</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-dpaux</div><div class='add'>+          - const: nvidia,tegra124-dpaux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock input for the DPAUX hardware</div><div class='add'>+      - description: reference clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dpaux</div><div class='add'>+      - const: parent</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dpaux</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  i2c-bus:</div><div class='add'>+    description: Subnode where I2C slave devices are listed. This</div><div class='add'>+      subnode must be always present. If there are no I2C slave</div><div class='add'>+      devices, an empty node should be added. See ../../i2c/i2c.yaml</div><div class='add'>+      for more information.</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  aux-bus:</div><div class='add'>+    $ref: /schemas/display/dp-aux-bus.yaml#</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: phandle of a supply that powers the DisplayPort</div><div class='add'>+      link</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinmux-[a-z0-9]+$":</div><div class='add'>+    description:</div><div class='add'>+      Since only three configurations are possible, only three child</div><div class='add'>+      nodes are needed to describe the pin mux'ing options for the</div><div class='add'>+      DPAUX pads. Furthermore, given that the pad functions are only</div><div class='add'>+      applicable to a single set of pads, the child nodes only need</div><div class='add'>+      to describe the pad group the functions are being applied to</div><div class='add'>+      rather than the individual pads.</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      groups:</div><div class='add'>+        const: dpaux-io</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        enum:</div><div class='add'>+          - aux</div><div class='add'>+          - i2c</div><div class='add'>+          - off</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - groups</div><div class='add'>+      - function</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra210-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    dpaux: dpaux@545c0000 {</div><div class='add'>+        compatible = "nvidia,tegra210-dpaux";</div><div class='add'>+        reg = &lt;0x545c0000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA210_CLK_DPAUX&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_PLL_DP&gt;;</div><div class='add'>+        clock-names = "dpaux", "parent";</div><div class='add'>+        resets = &lt;&amp;tegra_car 181&gt;;</div><div class='add'>+        reset-names = "dpaux";</div><div class='add'>+        power-domains = &lt;&amp;pd_sor&gt;;</div><div class='add'>+</div><div class='add'>+        state_dpaux_aux: pinmux-aux {</div><div class='add'>+            groups = "dpaux-io";</div><div class='add'>+            function = "aux";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        state_dpaux_i2c: pinmux-i2c {</div><div class='add'>+            groups = "dpaux-io";</div><div class='add'>+            function = "i2c";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        state_dpaux_off: pinmux-off {</div><div class='add'>+            groups = "dpaux-io";</div><div class='add'>+            function = "off";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        i2c-bus {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml<br/>new file mode 100644<br/>index 000000000000..70f0e45c71d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-sor.yaml</a></div><div class='hunk'>@@ -0,0 +1,197 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra SOR Output Encoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Serial Output Resource (SOR) can be used to drive HDMI, LVDS, eDP</div><div class='add'>+  and DP outputs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^sor@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra124-sor</div><div class='add'>+          - nvidia,tegra210-sor</div><div class='add'>+          - nvidia,tegra210-sor1</div><div class='add'>+          - nvidia,tegra186-sor</div><div class='add'>+          - nvidia,tegra186-sor1</div><div class='add'>+          - nvidia,tegra194-sor</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-sor</div><div class='add'>+          - const: nvidia,tegra124-sor</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 5</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 5</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: sor</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-io-hdmi-dp-supply:</div><div class='add'>+    description: I/O supply for HDMI/DP</div><div class='add'>+</div><div class='add'>+  vdd-hdmi-dp-pll-supply:</div><div class='add'>+    description: PLL supply for HDMI/DP</div><div class='add'>+</div><div class='add'>+  hdmi-supply:</div><div class='add'>+    description: +5.0V HDMI connector supply, required for HDMI</div><div class='add'>+</div><div class='add'>+  # Tegra186 and later</div><div class='add'>+  nvidia,interface:</div><div class='add'>+    description: index of the SOR interface</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  nvidia,ddc-i2c-bus:</div><div class='add'>+    description: phandle of an I2C controller used for DDC EDID</div><div class='add'>+      probing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  nvidia,hpd-gpio:</div><div class='add'>+    description: specifies a GPIO used for hotplug detection</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,edid:</div><div class='add'>+    description: supplies a binary EDID blob</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+</div><div class='add'>+  nvidia,panel:</div><div class='add'>+    description: phandle of a display panel, required for eDP</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  nvidia,xbar-cfg:</div><div class='add'>+    description: 5 cells containing the crossbar configuration.</div><div class='add'>+      Each lane of the SOR, identified by the cell's index, is</div><div class='add'>+      mapped via the crossbar to the pad specified by the cell's</div><div class='add'>+      value.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+  # optional when driving an eDP output</div><div class='add'>+  nvidia,dpaux:</div><div class='add'>+    description: phandle to a DispayPort AUX interface</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra186-sor</div><div class='add'>+              - nvidia,tegra194-sor</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: clock input for the SOR hardware</div><div class='add'>+            - description: SOR output clock</div><div class='add'>+            - description: input for the pixel clock</div><div class='add'>+            - description: reference clock for the SOR clock</div><div class='add'>+            - description: safe reference clock for the SOR clock</div><div class='add'>+                during power up</div><div class='add'>+            - description: SOR pad output clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: sor</div><div class='add'>+            - enum:</div><div class='add'>+                - source # deprecated</div><div class='add'>+                - out</div><div class='add'>+            - const: parent</div><div class='add'>+            - const: dp</div><div class='add'>+            - const: safe</div><div class='add'>+            - const: pad</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: clock input for the SOR hardware</div><div class='add'>+            - description: SOR output clock</div><div class='add'>+            - description: input for the pixel clock</div><div class='add'>+            - description: reference clock for the SOR clock</div><div class='add'>+            - description: safe reference clock for the SOR clock</div><div class='add'>+                during power up</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: sor</div><div class='add'>+            - enum:</div><div class='add'>+                - source # deprecated</div><div class='add'>+                - out</div><div class='add'>+            - const: parent</div><div class='add'>+            - const: dp</div><div class='add'>+            - const: safe</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - avdd-io-hdmi-dp-supply</div><div class='add'>+  - vdd-hdmi-dp-pll-supply</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra210-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    sor0: sor@54540000 {</div><div class='add'>+        compatible = "nvidia,tegra210-sor";</div><div class='add'>+        reg = &lt;0x54540000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA210_CLK_SOR0&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_SOR0_OUT&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_PLL_D_OUT0&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_PLL_DP&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_SOR_SAFE&gt;;</div><div class='add'>+        clock-names = "sor", "out", "parent", "dp", "safe";</div><div class='add'>+        resets = &lt;&amp;tegra_car 182&gt;;</div><div class='add'>+        reset-names = "sor";</div><div class='add'>+        pinctrl-0 = &lt;&amp;state_dpaux_aux&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;state_dpaux_i2c&gt;;</div><div class='add'>+        pinctrl-2 = &lt;&amp;state_dpaux_off&gt;;</div><div class='add'>+        pinctrl-names = "aux", "i2c", "off";</div><div class='add'>+        power-domains = &lt;&amp;pd_sor&gt;;</div><div class='add'>+</div><div class='add'>+        avdd-io-hdmi-dp-supply = &lt;&amp;avdd_1v05&gt;;</div><div class='add'>+        vdd-hdmi-dp-pll-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+        hdmi-supply = &lt;&amp;vdd_hdmi&gt;;</div><div class='add'>+</div><div class='add'>+        nvidia,ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='add'>+        nvidia,hpd-gpio = &lt;&amp;gpio TEGRA_GPIO(CC, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml<br/>new file mode 100644<br/>index 000000000000..7200095ef19e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra124-vic.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-vic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Video Image Composer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^vic@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra124-vic</div><div class='add'>+          - nvidia,tegra210-vic</div><div class='add'>+          - nvidia,tegra186-vic</div><div class='add'>+          - nvidia,tegra194-vic</div><div class='add'>+          - nvidia,tegra234-vic</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-vic</div><div class='add'>+          - const: nvidia,tegra124-vic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock input for the VIC hardware</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vic</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vic</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    description: Description of the interconnect paths for the VIC;</div><div class='add'>+      see ../interconnect/interconnect.txt for details.</div><div class='add'>+    items:</div><div class='add'>+      - description: memory read client for VIC</div><div class='add'>+      - description: memory write client for VIC</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml<br/>new file mode 100644<br/>index 000000000000..ce4589466a18<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra186 (and later) Display Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^display@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra186-dc</div><div class='add'>+      - nvidia,tegra194-dc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: display controller pixel clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dc</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: display controller reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dc</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    description: Description of the interconnect paths for the</div><div class='add'>+      display controller; see ../interconnect/interconnect.txt</div><div class='add'>+      for details.</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read-0</div><div class='add'>+      - const: read-1</div><div class='add'>+</div><div class='add'>+  nvidia,outputs:</div><div class='add'>+    description: A list of phandles of outputs that this display</div><div class='add'>+      controller can drive.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+</div><div class='add'>+  nvidia,head:</div><div class='add'>+    description: The number of the display controller head. This</div><div class='add'>+      is used to setup the various types of output to receive</div><div class='add'>+      video data from the given head.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - nvidia,outputs</div><div class='add'>+  - nvidia,head</div><div class='add'>+</div><div class='add'>+# see nvidia,tegra186-display.yaml for examples</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-display.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-display.yaml<br/>new file mode 100644<br/>index 000000000000..117c371ce24b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-display.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-display.yaml</a></div><div class='hunk'>@@ -0,0 +1,308 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra186 (and later) Display Hub</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^display-hub@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra186-display</div><div class='add'>+      - nvidia,tegra194-display</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: display hub reset</div><div class='add'>+      - description: window group 0 reset</div><div class='add'>+      - description: window group 1 reset</div><div class='add'>+      - description: window group 2 reset</div><div class='add'>+      - description: window group 3 reset</div><div class='add'>+      - description: window group 4 reset</div><div class='add'>+      - description: window group 5 reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: misc</div><div class='add'>+      - const: wgrp0</div><div class='add'>+      - const: wgrp1</div><div class='add'>+      - const: wgrp2</div><div class='add'>+      - const: wgrp3</div><div class='add'>+      - const: wgrp4</div><div class='add'>+      - const: wgrp5</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^display@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nvidia,tegra186-display</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: display core clock</div><div class='add'>+            - description: display stream compression clock</div><div class='add'>+            - description: display hub clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: disp</div><div class='add'>+            - const: dsc</div><div class='add'>+            - const: hub</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: display core clock</div><div class='add'>+            - description: display hub clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: disp</div><div class='add'>+            - const: hub</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra186-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra186-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra186-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra186-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    display-hub@15200000 {</div><div class='add'>+        compatible = "nvidia,tegra186-display";</div><div class='add'>+        reg = &lt;0x15200000 0x00040000&gt;;</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_MISC&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP0&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP1&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP2&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP3&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP4&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_WGRP5&gt;;</div><div class='add'>+        reset-names = "misc", "wgrp0", "wgrp1", "wgrp2",</div><div class='add'>+                      "wgrp3", "wgrp4", "wgrp5";</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_DISP&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_DSC&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAYHUB&gt;;</div><div class='add'>+        clock-names = "disp", "dsc", "hub";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ranges = &lt;0x15200000 0x15200000 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+        display@15200000 {</div><div class='add'>+            compatible = "nvidia,tegra186-dc";</div><div class='add'>+            reg = &lt;0x15200000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_P0&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_HEAD0&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "read-1";</div><div class='add'>+            iommus = &lt;&amp;smmu TEGRA186_SID_NVDISPLAY&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,outputs = &lt;&amp;dsia &amp;dsib &amp;sor0 &amp;sor1&gt;;</div><div class='add'>+            nvidia,head = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        display@15210000 {</div><div class='add'>+            compatible = "nvidia,tegra186-dc";</div><div class='add'>+            reg = &lt;0x15210000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_P1&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_HEAD1&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_DISPB&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "read-1";</div><div class='add'>+            iommus = &lt;&amp;smmu TEGRA186_SID_NVDISPLAY&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,outputs = &lt;&amp;dsia &amp;dsib &amp;sor0 &amp;sor1&gt;;</div><div class='add'>+            nvidia,head = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        display@15220000 {</div><div class='add'>+            compatible = "nvidia,tegra186-dc";</div><div class='add'>+            reg = &lt;0x15220000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA186_CLK_NVDISPLAY_P2&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA186_RESET_NVDISPLAY0_HEAD2&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_DISPC&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "read-1";</div><div class='add'>+            iommus = &lt;&amp;smmu TEGRA186_SID_NVDISPLAY&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,outputs = &lt;&amp;sor0 &amp;sor1&gt;;</div><div class='add'>+            nvidia,head = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra194-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra194-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra194-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra194-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    display-hub@15200000 {</div><div class='add'>+        compatible = "nvidia,tegra194-display";</div><div class='add'>+        reg = &lt;0x15200000 0x00040000&gt;;</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_MISC&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_WGRP0&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_WGRP1&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_WGRP2&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_WGRP3&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_WGRP4&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_WGRP5&gt;;</div><div class='add'>+        reset-names = "misc", "wgrp0", "wgrp1", "wgrp2",</div><div class='add'>+                      "wgrp3", "wgrp4", "wgrp5";</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA194_CLK_NVDISPLAY_DISP&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_NVDISPLAYHUB&gt;;</div><div class='add'>+        clock-names = "disp", "hub";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ranges = &lt;0x15200000 0x15200000 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+        display@15200000 {</div><div class='add'>+            compatible = "nvidia,tegra194-dc";</div><div class='add'>+            reg = &lt;0x15200000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA194_CLK_NVDISPLAY_P0&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_HEAD0&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "read-1";</div><div class='add'>+</div><div class='add'>+            nvidia,outputs = &lt;&amp;sor0 &amp;sor1 &amp;sor2 &amp;sor3&gt;;</div><div class='add'>+            nvidia,head = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        display@15210000 {</div><div class='add'>+            compatible = "nvidia,tegra194-dc";</div><div class='add'>+            reg = &lt;0x15210000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA194_CLK_NVDISPLAY_P1&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_HEAD1&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_DISPB&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "read-1";</div><div class='add'>+</div><div class='add'>+            nvidia,outputs = &lt;&amp;sor0 &amp;sor1 &amp;sor2 &amp;sor3&gt;;</div><div class='add'>+            nvidia,head = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        display@15220000 {</div><div class='add'>+            compatible = "nvidia,tegra194-dc";</div><div class='add'>+            reg = &lt;0x15220000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA194_CLK_NVDISPLAY_P2&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_HEAD2&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_DISPC&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "read-1";</div><div class='add'>+</div><div class='add'>+            nvidia,outputs = &lt;&amp;sor0 &amp;sor1 &amp;sor2 &amp;sor3&gt;;</div><div class='add'>+            nvidia,head = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        display@15230000 {</div><div class='add'>+            compatible = "nvidia,tegra194-dc";</div><div class='add'>+            reg = &lt;0x15230000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA194_CLK_NVDISPLAY_P3&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA194_RESET_NVDISPLAY0_HEAD3&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_DISPC&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "read-1";</div><div class='add'>+</div><div class='add'>+            nvidia,outputs = &lt;&amp;sor0 &amp;sor1 &amp;sor2 &amp;sor3&gt;;</div><div class='add'>+            nvidia,head = &lt;3&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dsi-padctl.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dsi-padctl.yaml<br/>new file mode 100644<br/>index 000000000000..da75b71e8ece<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dsi-padctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dsi-padctl.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dsi-padctl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra MIPI DSI pad controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^padctl@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra186-dsi-padctl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dsi</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/reset/reset.yaml</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra186-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    padctl@15880000 {</div><div class='add'>+        compatible = "nvidia,tegra186-dsi-padctl";</div><div class='add'>+        reg = &lt;0x15880000 0x10000&gt;;</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA186_RESET_DSI&gt;;</div><div class='add'>+        reset-names = "dsi";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml<br/>new file mode 100644<br/>index 000000000000..69be95afd562<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Display Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^dc@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra20-dc</div><div class='add'>+          - nvidia,tegra30-dc</div><div class='add'>+          - nvidia,tegra114-dc</div><div class='add'>+          - nvidia,tegra124-dc</div><div class='add'>+          - nvidia,tegra210-dc</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra124-dc</div><div class='add'>+          - const: nvidia,tegra132-dc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: display controller pixel clock</div><div class='add'>+      - description: parent clock # optional</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: dc</div><div class='add'>+      - const: parent # optional</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dc</div><div class='add'>+</div><div class='add'>+  interconnect-names: true</div><div class='add'>+  interconnects: true</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the core power domain</div><div class='add'>+</div><div class='add'>+  memory-region: true</div><div class='add'>+</div><div class='add'>+  nvidia,head:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: The number of the display controller head. This is used to setup the various</div><div class='add'>+      types of output to receive video data from the given head.</div><div class='add'>+</div><div class='add'>+  nvidia,outputs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: A list of phandles of outputs that this display controller can drive.</div><div class='add'>+</div><div class='add'>+  rgb:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra20-dc</div><div class='add'>+              - nvidia,tegra30-dc</div><div class='add'>+              - nvidia,tegra114-dc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interconnects:</div><div class='add'>+          items:</div><div class='add'>+            - description: window A memory client</div><div class='add'>+            - description: window B memory client</div><div class='add'>+            - description: window B memory client (vertical filter)</div><div class='add'>+            - description: window C memory client</div><div class='add'>+            - description: cursor memory client</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: wina</div><div class='add'>+            - const: winb</div><div class='add'>+            - const: winb-vfilter</div><div class='add'>+            - const: winc</div><div class='add'>+            - const: cursor</div><div class='add'>+</div><div class='add'>+        rgb:</div><div class='add'>+          description: Each display controller node has a child node, named "rgb", that represents</div><div class='add'>+            the RGB output associated with the controller.</div><div class='add'>+          type: object</div><div class='add'>+          properties:</div><div class='add'>+            nvidia,ddc-i2c-bus:</div><div class='add'>+              $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+              description: phandle of an I2C controller used for DDC EDID probing</div><div class='add'>+</div><div class='add'>+            nvidia,hpd-gpio:</div><div class='add'>+              description: specifies a GPIO used for hotplug detection</div><div class='add'>+              maxItems: 1</div><div class='add'>+</div><div class='add'>+            nvidia,edid:</div><div class='add'>+              $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+              description: supplies a binary EDID blob</div><div class='add'>+</div><div class='add'>+            nvidia,panel:</div><div class='add'>+              $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+              description: phandle of a display panel</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra124-dc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interconnects:</div><div class='add'>+          minItems: 4</div><div class='add'>+          items:</div><div class='add'>+            - description: window A memory client</div><div class='add'>+            - description: window B memory client</div><div class='add'>+            - description: window C memory client</div><div class='add'>+            - description: cursor memory client</div><div class='add'>+            - description: window D memory client</div><div class='add'>+            - description: window T memory client</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          minItems: 4</div><div class='add'>+          items:</div><div class='add'>+            - const: wina</div><div class='add'>+            - const: winb</div><div class='add'>+            - const: winc</div><div class='add'>+            - const: cursor</div><div class='add'>+            - const: wind</div><div class='add'>+            - const: wint</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    dc@54200000 {</div><div class='add'>+        compatible = "nvidia,tegra20-dc";</div><div class='add'>+        reg = &lt;0x54200000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_DISP1&gt;;</div><div class='add'>+        clock-names = "dc";</div><div class='add'>+        resets = &lt;&amp;tegra_car 27&gt;;</div><div class='add'>+        reset-names = "dc";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml<br/>new file mode 100644<br/>index 000000000000..59e1dc0813e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml</a></div><div class='hunk'>@@ -0,0 +1,158 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Display Serial Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra20-dsi</div><div class='add'>+          - nvidia,tegra30-dsi</div><div class='add'>+          - nvidia,tegra114-dsi</div><div class='add'>+          - nvidia,tegra124-dsi</div><div class='add'>+          - nvidia,tegra210-dsi</div><div class='add'>+          - nvidia,tegra186-dsi</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-dsi</div><div class='add'>+          - const: nvidia,tegra124-dsi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dsi</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-dsi-csi-supply:</div><div class='add'>+    description: phandle of a supply that powers the DSI controller</div><div class='add'>+</div><div class='add'>+  nvidia,mipi-calibrate:</div><div class='add'>+    description: Should contain a phandle and a specifier specifying</div><div class='add'>+      which pads are used by this DSI output and need to be</div><div class='add'>+      calibrated. See nvidia,tegra114-mipi.yaml for details.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+</div><div class='add'>+  nvidia,ddc-i2c-bus:</div><div class='add'>+    description: phandle of an I2C controller used for DDC EDID</div><div class='add'>+      probing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  nvidia,hpd-gpio:</div><div class='add'>+    description: specifies a GPIO used for hotplug detection</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,edid:</div><div class='add'>+    description: supplies a binary EDID blob</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+</div><div class='add'>+  nvidia,panel:</div><div class='add'>+    description: phandle of a display panel</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  nvidia,ganged-mode:</div><div class='add'>+    description: contains a phandle to a second DSI controller to</div><div class='add'>+      gang up with in order to support up to 8 data lanes</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ../dsi-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra20-dsi</div><div class='add'>+              - nvidia,tegra30-dsi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: DSI module clock</div><div class='add'>+            - description: input for the pixel clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: dsi</div><div class='add'>+            - const: parent</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: DSI module clock</div><div class='add'>+            - description: low-power module clock</div><div class='add'>+            - description: input for the pixel clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: dsi</div><div class='add'>+            - const: lp</div><div class='add'>+            - const: parent</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nvidia,tegra186-dsi</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra186-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra186-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra186-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    dsi@15300000 {</div><div class='add'>+        compatible = "nvidia,tegra186-dsi";</div><div class='add'>+        reg = &lt;0x15300000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA186_CLK_DSI&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_DSIA_LP&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_PLLD&gt;;</div><div class='add'>+        clock-names = "dsi", "lp", "parent";</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA186_RESET_DSI&gt;;</div><div class='add'>+        reset-names = "dsi";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml<br/>new file mode 100644<br/>index 000000000000..3c095a5491fe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-epp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Encoder Pre-Processor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^epp@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra20-epp</div><div class='add'>+      - nvidia,tegra30-epp</div><div class='add'>+      - nvidia,tegra114-epp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: epp</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the core power domain</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    epp@540c0000 {</div><div class='add'>+        compatible = "nvidia,tegra20-epp";</div><div class='add'>+        reg = &lt;0x540c0000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_EPP&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 19&gt;;</div><div class='add'>+        reset-names = "epp";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml<br/>new file mode 100644<br/>index 000000000000..1026b0bc3dc8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr2d.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA 2D graphics engine</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^gr2d@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra20-gr2d</div><div class='add'>+      - nvidia,tegra30-gr2d</div><div class='add'>+      - nvidia,tegra114-gr2d</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+      - description: memory client hotflush reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: 2d</div><div class='add'>+      - const: mc</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the HEG or core power domain</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra20-mc.h&gt;</div><div class='add'>+</div><div class='add'>+    gr2d@54140000 {</div><div class='add'>+        compatible = "nvidia,tegra20-gr2d";</div><div class='add'>+        reg = &lt;0x54140000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_GR2D&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 21&gt;, &lt;&amp;mc TEGRA20_MC_RESET_2D&gt;;</div><div class='add'>+        reset-names = "2d", "mc";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml<br/>new file mode 100644<br/>index 000000000000..59a52e732ca3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml</a></div><div class='hunk'>@@ -0,0 +1,213 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr3d.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA 3D graphics engine</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^gr3d@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra20-gr3d</div><div class='add'>+      - nvidia,tegra30-gr3d</div><div class='add'>+      - nvidia,tegra114-gr3d</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 10</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 10</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nvidia,tegra20-gr2d</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: module clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: 3d</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          items:</div><div class='add'>+            - description: module reset</div><div class='add'>+            - description: memory client hotflush reset</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: 3d</div><div class='add'>+            - const: mc</div><div class='add'>+</div><div class='add'>+        iommus:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        interconnects:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: phandle to the TD power domain</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nvidia,tegra30-gr3d</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: primary module clock</div><div class='add'>+            - description: secondary module clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: 3d</div><div class='add'>+            - const: 3d2</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          items:</div><div class='add'>+            - description: primary module reset</div><div class='add'>+            - description: secondary module reset</div><div class='add'>+            - description: primary memory client hotflush reset</div><div class='add'>+            - description: secondary memory client hotflush reset</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: 3d</div><div class='add'>+            - const: 3d2</div><div class='add'>+            - const: mc</div><div class='add'>+            - const: mc2</div><div class='add'>+</div><div class='add'>+        iommus:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        interconnects:</div><div class='add'>+          minItems: 8</div><div class='add'>+          maxItems: 8</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          minItems: 8</div><div class='add'>+          maxItems: 8</div><div class='add'>+</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: phandle to the TD power domain</div><div class='add'>+            - description: phandle to the TD2 power domain</div><div class='add'>+</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: 3d0</div><div class='add'>+            - const: 3d1</div><div class='add'>+</div><div class='add'>+      dependencies:</div><div class='add'>+        power-domains: [ power-domain-names ]</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nvidia,tegra114-gr2d</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: module clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: 3d</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          items:</div><div class='add'>+            - description: module reset</div><div class='add'>+            - description: memory client hotflush reset</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: 3d</div><div class='add'>+            - const: mc</div><div class='add'>+</div><div class='add'>+        iommus:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        interconnects:</div><div class='add'>+          minItems: 10</div><div class='add'>+          maxItems: 10</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          minItems: 10</div><div class='add'>+          maxItems: 10</div><div class='add'>+</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: phandle to the TD power domain</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra20-mc.h&gt;</div><div class='add'>+</div><div class='add'>+    gr3d@54180000 {</div><div class='add'>+        compatible = "nvidia,tegra20-gr3d";</div><div class='add'>+        reg = &lt;0x54180000 0x00040000&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_GR3D&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 24&gt;, &lt;&amp;mc TEGRA20_MC_RESET_3D&gt;;</div><div class='add'>+        reset-names = "3d", "mc";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml<br/>new file mode 100644<br/>index 000000000000..f77197e4869f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra HDMI Output Encoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^hdmi@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra20-hdmi</div><div class='add'>+          - nvidia,tegra30-hdmi</div><div class='add'>+          - nvidia,tegra114-hdmi</div><div class='add'>+          - nvidia,tegra124-hdmi</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-hdmi</div><div class='add'>+          - const: nvidia,tegra124-hdmi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+      - description: parent clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hdmi</div><div class='add'>+      - const: parent</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hdmi</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the core power domain</div><div class='add'>+</div><div class='add'>+  hdmi-supply:</div><div class='add'>+    description: supply for the +5V HDMI connector pin</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: regulator for supply voltage</div><div class='add'>+</div><div class='add'>+  pll-supply:</div><div class='add'>+    description: regulator for PLL</div><div class='add'>+</div><div class='add'>+  nvidia,ddc-i2c-bus:</div><div class='add'>+    description: phandle of an I2C controller used for DDC EDID</div><div class='add'>+      probing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  nvidia,hpd-gpio:</div><div class='add'>+    description: specifies a GPIO used for hotplug detection</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,edid:</div><div class='add'>+    description: supplies a binary EDID blob</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+</div><div class='add'>+  nvidia,panel:</div><div class='add'>+    description: phandle of a display panel</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - pll-supply</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - nvidia,ddc-i2c-bus</div><div class='add'>+  - nvidia,hpd-gpio</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra124-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra-gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    hdmi@54280000 {</div><div class='add'>+        compatible = "nvidia,tegra124-hdmi";</div><div class='add'>+        reg = &lt;0x54280000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA124_CLK_HDMI&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_PLL_D2_OUT0&gt;;</div><div class='add'>+        clock-names = "hdmi", "parent";</div><div class='add'>+        resets = &lt;&amp;tegra_car 51&gt;;</div><div class='add'>+        reset-names = "hdmi";</div><div class='add'>+</div><div class='add'>+        hdmi-supply = &lt;&amp;vdd_5v0_hdmi&gt;;</div><div class='add'>+        pll-supply = &lt;&amp;vdd_hdmi_pll&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;vdd_3v3_hdmi&gt;;</div><div class='add'>+</div><div class='add'>+        nvidia,ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='add'>+        nvidia,hpd-gpio = &lt;&amp;gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt<br/>deleted file mode 100644<br/>index e61999ce54e9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,675 +0,0 @@</div><div class='del'>-NVIDIA Tegra host1x</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nvidia,tegra&lt;chip&gt;-host1x"</div><div class='del'>-- reg: Physical base address and length of the controller's registers.</div><div class='del'>-  For pre-Tegra186, one entry describing the whole register area.</div><div class='del'>-  For Tegra186, one entry for each entry in reg-names:</div><div class='del'>-    "vm" - VM region assigned to Linux</div><div class='del'>-    "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)</div><div class='del'>-- interrupts: The interrupt outputs from the controller.</div><div class='del'>-- #address-cells: The number of cells used to represent physical base addresses</div><div class='del'>-  in the host1x address space. Should be 1.</div><div class='del'>-- #size-cells: The number of cells used to represent the size of an address</div><div class='del'>-  range in the host1x address space. Should be 1.</div><div class='del'>-- ranges: The mapping of the host1x address space to the CPU address space.</div><div class='del'>-- clocks: Must contain one entry, for the module clock.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-- reset-names: Must include the following entries:</div><div class='del'>-  - host1x</div><div class='del'>-  - mc</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandle to HEG or core power domain.</div><div class='del'>-</div><div class='del'>-For each opp entry in 'operating-points-v2' table of host1x and its modules:</div><div class='del'>-- opp-supported-hw: One bitfield indicating:</div><div class='del'>-	On Tegra20: SoC process ID mask</div><div class='del'>-	On Tegra30+: SoC speedo ID mask</div><div class='del'>-</div><div class='del'>-	A bitwise AND is performed against the value and if any bit</div><div class='del'>-	matches, the OPP gets enabled.</div><div class='del'>-</div><div class='del'>-Each host1x client module having to perform DMA through the Memory Controller</div><div class='del'>-should have the interconnect endpoints set to the Memory Client and External</div><div class='del'>-Memory respectively.</div><div class='del'>-</div><div class='del'>-The host1x top-level node defines a number of children, each representing one</div><div class='del'>-of the following host1x client modules:</div><div class='del'>-</div><div class='del'>-- mpe: video encoder</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-mpe"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain one entry, for the module clock.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - mpe</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - interconnects: Must contain entry for the MPE memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandle to MPE power domain.</div><div class='del'>-</div><div class='del'>-- vi: video input</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-vi"</div><div class='del'>-  - reg: Physical base address and length of the controller registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: clocks: Must contain one entry, for the module clock.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - Tegra20/Tegra30/Tegra114/Tegra124:</div><div class='del'>-    - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-      See ../reset/reset.txt for details.</div><div class='del'>-    - reset-names: Must include the following entries:</div><div class='del'>-      - vi</div><div class='del'>-  - Tegra210:</div><div class='del'>-    - power-domains: Must include venc powergate node as vi is in VE partition.</div><div class='del'>-</div><div class='del'>-  ports (optional node)</div><div class='del'>-  vi can have optional ports node and max 6 ports are supported. Each port</div><div class='del'>-  should have single 'endpoint' child node. All port nodes are grouped under</div><div class='del'>-  ports node. Please refer to the bindings defined in</div><div class='del'>-  Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-  csi (required node)</div><div class='del'>-  Tegra210 has CSI part of VI sharing same host interface and register space.</div><div class='del'>-  So, VI device node should have CSI child node.</div><div class='del'>-</div><div class='del'>-    - csi: mipi csi interface to vi</div><div class='del'>-</div><div class='del'>-      Required properties:</div><div class='del'>-      - compatible: "nvidia,tegra210-csi"</div><div class='del'>-      - reg: Physical base address offset to parent and length of the controller</div><div class='del'>-        registers.</div><div class='del'>-      - clocks: Must contain entries csi, cilab, cilcd, cile, csi_tpg clocks.</div><div class='del'>-        See ../clocks/clock-bindings.txt for details.</div><div class='del'>-      - power-domains: Must include sor powergate node as csicil is in</div><div class='del'>-        SOR partition.</div><div class='del'>-</div><div class='del'>-      channel (optional nodes)</div><div class='del'>-      Maximum 6 channels are supported with each csi brick as either x4 or x2</div><div class='del'>-      based on hw connectivity to sensor.</div><div class='del'>-</div><div class='del'>-      Required properties:</div><div class='del'>-      - reg: csi port number. Valid port numbers are 0 through 5.</div><div class='del'>-      - nvidia,mipi-calibrate: Should contain a phandle and a specifier</div><div class='del'>-        specifying which pads are used by this CSI port and need to be</div><div class='del'>-	calibrated. See also ../display/tegra/nvidia,tegra114-mipi.txt.</div><div class='del'>-</div><div class='del'>-      Each channel node must contain 2 port nodes which can be grouped</div><div class='del'>-      under 'ports' node and each port should have a single child 'endpoint'</div><div class='del'>-      node.</div><div class='del'>-</div><div class='del'>-        ports node</div><div class='del'>-        Please refer to the bindings defined in</div><div class='del'>-        Documentation/devicetree/bindings/media/video-interfaces.txt</div><div class='del'>-</div><div class='del'>-        ports node must contain below 2 port nodes.</div><div class='del'>-        port@0 with single child 'endpoint' node always a sink.</div><div class='del'>-        port@1 with single child 'endpoint' node always a source.</div><div class='del'>-</div><div class='del'>-        port@0 (required node)</div><div class='del'>-        Required properties:</div><div class='del'>-        - reg: 0</div><div class='del'>-</div><div class='del'>-	  endpoint (required node)</div><div class='del'>-	  Required properties:</div><div class='del'>-	  - data-lanes: an array of data lane from 1 to 8. Valid array</div><div class='del'>-	    lengths are 1/2/4/8.</div><div class='del'>-	  - remote-endpoint: phandle to sensor 'endpoint' node.</div><div class='del'>-</div><div class='del'>-        port@1 (required node)</div><div class='del'>-        Required properties:</div><div class='del'>-        - reg: 1</div><div class='del'>-</div><div class='del'>-	  endpoint (required node)</div><div class='del'>-	  Required properties:</div><div class='del'>-	  - remote-endpoint: phandle to vi port 'endpoint' node.</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - interconnects: Must contain entry for the VI memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandle to VENC power domain.</div><div class='del'>-</div><div class='del'>-- epp: encoder pre-processor</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-epp"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain one entry, for the module clock.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - epp</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - interconnects: Must contain entry for the EPP memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandle to HEG or core power domain.</div><div class='del'>-</div><div class='del'>-- isp: image signal processor</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-isp"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain one entry, for the module clock.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - isp</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - interconnects: Must contain entry for the ISP memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-  - power-domains: Phandle to VENC or core power domain.</div><div class='del'>-</div><div class='del'>-- gr2d: 2D graphics engine</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-gr2d"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain one entry, for the module clock.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - 2d</div><div class='del'>-    - mc</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - interconnects: Must contain entry for the GR2D memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandle to HEG or core power domain.</div><div class='del'>-</div><div class='del'>-- gr3d: 3D graphics engine</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-gr3d"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - clock-names: Must include the following entries:</div><div class='del'>-    (This property may be omitted if the only clock in the list is "3d")</div><div class='del'>-    - 3d</div><div class='del'>-      This MUST be the first entry.</div><div class='del'>-    - 3d2 (Only required on SoCs with two 3D clocks)</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - 3d</div><div class='del'>-    - 3d2 (Only required on SoCs with two 3D clocks)</div><div class='del'>-    - mc</div><div class='del'>-    - mc2 (Only required on SoCs with two 3D clocks)</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - interconnects: Must contain entry for the GR3D memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandles to 3D or core power domain.</div><div class='del'>-</div><div class='del'>-- dc: display controller</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-dc"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - clock-names: Must include the following entries:</div><div class='del'>-    - dc</div><div class='del'>-      This MUST be the first entry.</div><div class='del'>-    - parent</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - dc</div><div class='del'>-  - nvidia,head: The number of the display controller head. This is used to</div><div class='del'>-    setup the various types of output to receive video data from the given</div><div class='del'>-    head.</div><div class='del'>-</div><div class='del'>-  Each display controller node has a child node, named "rgb", that represents</div><div class='del'>-  the RGB output associated with the controller. It can take the following</div><div class='del'>-  optional properties:</div><div class='del'>-  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing</div><div class='del'>-  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection</div><div class='del'>-  - nvidia,edid: supplies a binary EDID blob</div><div class='del'>-  - nvidia,panel: phandle of a display panel</div><div class='del'>-  - interconnects: Must contain entry for the DC memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandle to core power domain.</div><div class='del'>-</div><div class='del'>-- hdmi: High Definition Multimedia Interface</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-hdmi"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - hdmi-supply: supply for the +5V HDMI connector pin</div><div class='del'>-  - vdd-supply: regulator for supply voltage</div><div class='del'>-  - pll-supply: regulator for PLL</div><div class='del'>-  - clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - clock-names: Must include the following entries:</div><div class='del'>-    - hdmi</div><div class='del'>-      This MUST be the first entry.</div><div class='del'>-    - parent</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - hdmi</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing</div><div class='del'>-  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection</div><div class='del'>-  - nvidia,edid: supplies a binary EDID blob</div><div class='del'>-  - nvidia,panel: phandle of a display panel</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-</div><div class='del'>-- tvo: TV encoder output</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-tvo"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain one entry, for the module clock.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-  - power-domains: Phandle to core power domain.</div><div class='del'>-</div><div class='del'>-- dsi: display serial interface</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: "nvidia,tegra&lt;chip&gt;-dsi"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - clock-names: Must include the following entries:</div><div class='del'>-    - dsi</div><div class='del'>-      This MUST be the first entry.</div><div class='del'>-    - lp</div><div class='del'>-    - parent</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - dsi</div><div class='del'>-  - avdd-dsi-supply: phandle of a supply that powers the DSI controller</div><div class='del'>-  - nvidia,mipi-calibrate: Should contain a phandle and a specifier specifying</div><div class='del'>-    which pads are used by this DSI output and need to be calibrated. See also</div><div class='del'>-    ../display/tegra/nvidia,tegra114-mipi.txt.</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing</div><div class='del'>-  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection</div><div class='del'>-  - nvidia,edid: supplies a binary EDID blob</div><div class='del'>-  - nvidia,panel: phandle of a display panel</div><div class='del'>-  - nvidia,ganged-mode: contains a phandle to a second DSI controller to gang</div><div class='del'>-    up with in order to support up to 8 data lanes</div><div class='del'>-  - operating-points-v2: See ../bindings/opp/opp.txt for details.</div><div class='del'>-</div><div class='del'>-- sor: serial output resource</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  - compatible: Should be:</div><div class='del'>-    - "nvidia,tegra124-sor": for Tegra124 and Tegra132</div><div class='del'>-    - "nvidia,tegra132-sor": for Tegra132</div><div class='del'>-    - "nvidia,tegra210-sor": for Tegra210</div><div class='del'>-    - "nvidia,tegra210-sor1": for Tegra210</div><div class='del'>-    - "nvidia,tegra186-sor": for Tegra186</div><div class='del'>-    - "nvidia,tegra186-sor1": for Tegra186</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - clock-names: Must include the following entries:</div><div class='del'>-    - sor: clock input for the SOR hardware</div><div class='del'>-    - out: SOR output clock</div><div class='del'>-    - parent: input for the pixel clock</div><div class='del'>-    - dp: reference clock for the SOR clock</div><div class='del'>-    - safe: safe reference for the SOR clock during power up</div><div class='del'>-</div><div class='del'>-    For Tegra186 and later:</div><div class='del'>-    - pad: SOR pad output clock (on Tegra186 and later)</div><div class='del'>-</div><div class='del'>-    Obsolete:</div><div class='del'>-    - source: source clock for the SOR clock (obsolete, use "out" instead)</div><div class='del'>-</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - sor</div><div class='del'>-</div><div class='del'>-  Required properties on Tegra186 and later:</div><div class='del'>-  - nvidia,interface: index of the SOR interface</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - nvidia,ddc-i2c-bus: phandle of an I2C controller used for DDC EDID probing</div><div class='del'>-  - nvidia,hpd-gpio: specifies a GPIO used for hotplug detection</div><div class='del'>-  - nvidia,edid: supplies a binary EDID blob</div><div class='del'>-  - nvidia,panel: phandle of a display panel</div><div class='del'>-  - nvidia,xbar-cfg: 5 cells containing the crossbar configuration. Each lane</div><div class='del'>-    of the SOR, identified by the cell's index, is mapped via the crossbar to</div><div class='del'>-    the pad specified by the cell's value.</div><div class='del'>-</div><div class='del'>-  Optional properties when driving an eDP output:</div><div class='del'>-  - nvidia,dpaux: phandle to a DispayPort AUX interface</div><div class='del'>-</div><div class='del'>-- dpaux: DisplayPort AUX interface</div><div class='del'>-  - compatible : Should contain one of the following:</div><div class='del'>-    - "nvidia,tegra124-dpaux": for Tegra124 and Tegra132</div><div class='del'>-    - "nvidia,tegra210-dpaux": for Tegra210</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - clock-names: Must include the following entries:</div><div class='del'>-    - dpaux: clock input for the DPAUX hardware</div><div class='del'>-    - parent: reference clock</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - dpaux</div><div class='del'>-  - vdd-supply: phandle of a supply that powers the DisplayPort link</div><div class='del'>-  - i2c-bus: Subnode where I2C slave devices are listed. This subnode</div><div class='del'>-    must be always present. If there are no I2C slave devices, an empty</div><div class='del'>-    node should be added. See ../../i2c/i2c.txt for more information.</div><div class='del'>-</div><div class='del'>-  See ../pinctrl/nvidia,tegra124-dpaux-padctl.txt for information</div><div class='del'>-  regarding the DPAUX pad controller bindings.</div><div class='del'>-</div><div class='del'>-- vic: Video Image Compositor</div><div class='del'>-  - compatible : "nvidia,tegra&lt;chip&gt;-vic"</div><div class='del'>-  - reg: Physical base address and length of the controller's registers.</div><div class='del'>-  - interrupts: The interrupt outputs from the controller.</div><div class='del'>-  - clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-    See ../clocks/clock-bindings.txt for details.</div><div class='del'>-  - clock-names: Must include the following entries:</div><div class='del'>-    - vic: clock input for the VIC hardware</div><div class='del'>-  - resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-    See ../reset/reset.txt for details.</div><div class='del'>-  - reset-names: Must include the following entries:</div><div class='del'>-    - vic</div><div class='del'>-</div><div class='del'>-  Optional properties:</div><div class='del'>-  - interconnects: Must contain entry for the VIC memory clients.</div><div class='del'>-  - interconnect-names: Must include name of the interconnect path for each</div><div class='del'>-    interconnect entry. Consult TRM documentation for information about</div><div class='del'>-    available memory clients, see MEMORY CONTROLLER section.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-/ {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	host1x {</div><div class='del'>-		compatible = "nvidia,tegra20-host1x", "simple-bus";</div><div class='del'>-		reg = &lt;0x50000000 0x00024000&gt;;</div><div class='del'>-		interrupts = &lt;0 65 0x04   /* mpcore syncpt */</div><div class='del'>-			      0 67 0x04&gt;; /* mpcore general */</div><div class='del'>-		clocks = &lt;&amp;tegra_car TEGRA20_CLK_HOST1X&gt;;</div><div class='del'>-		resets = &lt;&amp;tegra_car 28&gt;;</div><div class='del'>-		reset-names = "host1x";</div><div class='del'>-		operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-		power-domains = &lt;&amp;domain&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		ranges = &lt;0x54000000 0x54000000 0x04000000&gt;;</div><div class='del'>-</div><div class='del'>-		mpe {</div><div class='del'>-			compatible = "nvidia,tegra20-mpe";</div><div class='del'>-			reg = &lt;0x54040000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 68 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_MPE&gt;;</div><div class='del'>-			resets = &lt;&amp;tegra_car 60&gt;;</div><div class='del'>-			reset-names = "mpe";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-			power-domains = &lt;&amp;domain&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		vi@54080000 {</div><div class='del'>-			compatible = "nvidia,tegra210-vi";</div><div class='del'>-			reg = &lt;0x0 0x54080000 0x0 0x700&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			assigned-clocks = &lt;&amp;tegra_car TEGRA210_CLK_VI&gt;;</div><div class='del'>-			assigned-clock-parents = &lt;&amp;tegra_car TEGRA210_CLK_PLL_C4_OUT0&gt;;</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA210_CLK_VI&gt;;</div><div class='del'>-			power-domains = &lt;&amp;pd_venc&gt;;</div><div class='del'>-</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			ranges = &lt;0x0 0x0 0x54080000 0x2000&gt;;</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					imx219_vi_in0: endpoint {</div><div class='del'>-						remote-endpoint = &lt;&amp;imx219_csi_out0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			csi@838 {</div><div class='del'>-				compatible = "nvidia,tegra210-csi";</div><div class='del'>-				reg = &lt;0x838 0x1300&gt;;</div><div class='del'>-				assigned-clocks = &lt;&amp;tegra_car TEGRA210_CLK_CILAB&gt;,</div><div class='del'>-						  &lt;&amp;tegra_car TEGRA210_CLK_CILCD&gt;,</div><div class='del'>-						  &lt;&amp;tegra_car TEGRA210_CLK_CILE&gt;,</div><div class='del'>-						  &lt;&amp;tegra_car TEGRA210_CLK_CSI_TPG&gt;;</div><div class='del'>-				assigned-clock-parents = &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;,</div><div class='del'>-							 &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;,</div><div class='del'>-							 &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;;</div><div class='del'>-				assigned-clock-rates = &lt;102000000&gt;,</div><div class='del'>-						       &lt;102000000&gt;,</div><div class='del'>-						       &lt;102000000&gt;,</div><div class='del'>-						       &lt;972000000&gt;;</div><div class='del'>-</div><div class='del'>-				clocks = &lt;&amp;tegra_car TEGRA210_CLK_CSI&gt;,</div><div class='del'>-					 &lt;&amp;tegra_car TEGRA210_CLK_CILAB&gt;,</div><div class='del'>-					 &lt;&amp;tegra_car TEGRA210_CLK_CILCD&gt;,</div><div class='del'>-					 &lt;&amp;tegra_car TEGRA210_CLK_CILE&gt;,</div><div class='del'>-					 &lt;&amp;tegra_car TEGRA210_CLK_CSI_TPG&gt;;</div><div class='del'>-				clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg";</div><div class='del'>-				power-domains = &lt;&amp;pd_sor&gt;;</div><div class='del'>-</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				channel@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					nvidia,mipi-calibrate = &lt;&amp;mipi 0x001&gt;;</div><div class='del'>-</div><div class='del'>-					ports {</div><div class='del'>-						#address-cells = &lt;1&gt;;</div><div class='del'>-						#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-						port@0 {</div><div class='del'>-							reg = &lt;0&gt;;</div><div class='del'>-							imx219_csi_in0: endpoint {</div><div class='del'>-								data-lanes = &lt;1 2&gt;;</div><div class='del'>-								remote-endpoint = &lt;&amp;imx219_out0&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-</div><div class='del'>-						port@1 {</div><div class='del'>-							reg = &lt;1&gt;;</div><div class='del'>-							imx219_csi_out0: endpoint {</div><div class='del'>-								remote-endpoint = &lt;&amp;imx219_vi_in0&gt;;</div><div class='del'>-							};</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		epp {</div><div class='del'>-			compatible = "nvidia,tegra20-epp";</div><div class='del'>-			reg = &lt;0x540c0000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 70 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_EPP&gt;;</div><div class='del'>-			resets = &lt;&amp;tegra_car 19&gt;;</div><div class='del'>-			reset-names = "epp";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-			power-domains = &lt;&amp;domain&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		isp {</div><div class='del'>-			compatible = "nvidia,tegra20-isp";</div><div class='del'>-			reg = &lt;0x54100000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 71 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_ISP&gt;;</div><div class='del'>-			resets = &lt;&amp;tegra_car 23&gt;;</div><div class='del'>-			reset-names = "isp";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gr2d {</div><div class='del'>-			compatible = "nvidia,tegra20-gr2d";</div><div class='del'>-			reg = &lt;0x54140000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 72 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_GR2D&gt;;</div><div class='del'>-			resets = &lt;&amp;tegra_car 21&gt;;</div><div class='del'>-			reset-names = "2d";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-			power-domains = &lt;&amp;domain&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gr3d {</div><div class='del'>-			compatible = "nvidia,tegra20-gr3d";</div><div class='del'>-			reg = &lt;0x54180000 0x00040000&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_GR3D&gt;;</div><div class='del'>-			resets = &lt;&amp;tegra_car 24&gt;;</div><div class='del'>-			reset-names = "3d";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-			power-domains = &lt;&amp;domain&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dc@54200000 {</div><div class='del'>-			compatible = "nvidia,tegra20-dc";</div><div class='del'>-			reg = &lt;0x54200000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 73 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_DISP1&gt;,</div><div class='del'>-				 &lt;&amp;tegra_car TEGRA20_CLK_PLL_P&gt;;</div><div class='del'>-			clock-names = "dc", "parent";</div><div class='del'>-			resets = &lt;&amp;tegra_car 27&gt;;</div><div class='del'>-			reset-names = "dc";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-			power-domains = &lt;&amp;domain&gt;;</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;mc TEGRA20_MC_DISPLAY0A &amp;emc&gt;,</div><div class='del'>-					&lt;&amp;mc TEGRA20_MC_DISPLAY0B &amp;emc&gt;,</div><div class='del'>-					&lt;&amp;mc TEGRA20_MC_DISPLAY0C &amp;emc&gt;,</div><div class='del'>-					&lt;&amp;mc TEGRA20_MC_DISPLAYHC &amp;emc&gt;;</div><div class='del'>-			interconnect-names = "wina",</div><div class='del'>-					     "winb",</div><div class='del'>-					     "winc",</div><div class='del'>-					     "cursor";</div><div class='del'>-</div><div class='del'>-			rgb {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dc@54240000 {</div><div class='del'>-			compatible = "nvidia,tegra20-dc";</div><div class='del'>-			reg = &lt;0x54240000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 74 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_DISP2&gt;,</div><div class='del'>-				 &lt;&amp;tegra_car TEGRA20_CLK_PLL_P&gt;;</div><div class='del'>-			clock-names = "dc", "parent";</div><div class='del'>-			resets = &lt;&amp;tegra_car 26&gt;;</div><div class='del'>-			reset-names = "dc";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-			power-domains = &lt;&amp;domain&gt;;</div><div class='del'>-</div><div class='del'>-			interconnects = &lt;&amp;mc TEGRA20_MC_DISPLAY0AB &amp;emc&gt;,</div><div class='del'>-					&lt;&amp;mc TEGRA20_MC_DISPLAY0BB &amp;emc&gt;,</div><div class='del'>-					&lt;&amp;mc TEGRA20_MC_DISPLAY0CB &amp;emc&gt;,</div><div class='del'>-					&lt;&amp;mc TEGRA20_MC_DISPLAYHCB &amp;emc&gt;;</div><div class='del'>-			interconnect-names = "wina",</div><div class='del'>-					     "winb",</div><div class='del'>-					     "winc",</div><div class='del'>-					     "cursor";</div><div class='del'>-</div><div class='del'>-			rgb {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		hdmi {</div><div class='del'>-			compatible = "nvidia,tegra20-hdmi";</div><div class='del'>-			reg = &lt;0x54280000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 75 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_HDMI&gt;,</div><div class='del'>-				 &lt;&amp;tegra_car TEGRA20_CLK_PLL_D_OUT0&gt;;</div><div class='del'>-			clock-names = "hdmi", "parent";</div><div class='del'>-			resets = &lt;&amp;tegra_car 51&gt;;</div><div class='del'>-			reset-names = "hdmi";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		tvo {</div><div class='del'>-			compatible = "nvidia,tegra20-tvo";</div><div class='del'>-			reg = &lt;0x542c0000 0x00040000&gt;;</div><div class='del'>-			interrupts = &lt;0 76 0x04&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_TVO&gt;;</div><div class='del'>-			status = "disabled";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		dsi {</div><div class='del'>-			compatible = "nvidia,tegra20-dsi";</div><div class='del'>-			reg = &lt;0x54300000 0x00040000&gt;;</div><div class='del'>-			clocks = &lt;&amp;tegra_car TEGRA20_CLK_DSI&gt;,</div><div class='del'>-				 &lt;&amp;tegra_car TEGRA20_CLK_PLL_D_OUT0&gt;;</div><div class='del'>-			clock-names = "dsi", "parent";</div><div class='del'>-			resets = &lt;&amp;tegra_car 48&gt;;</div><div class='del'>-			reset-names = "dsi";</div><div class='del'>-			status = "disabled";</div><div class='del'>-			operating-points-v2 = &lt;&amp;dvfs_opp_table&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml<br/>new file mode 100644<br/>index 000000000000..94c5242c03b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml</a></div><div class='hunk'>@@ -0,0 +1,430 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra host1x controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: The host1x top-level node defines a number of children, each</div><div class='add'>+  representing one of the host1x client modules defined in this binding.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra20-host1x</div><div class='add'>+          - nvidia,tegra30-host1x</div><div class='add'>+          - nvidia,tegra114-host1x</div><div class='add'>+          - nvidia,tegra124-host1x</div><div class='add'>+          - nvidia,tegra210-host1x</div><div class='add'>+          - nvidia,tegra186-host1x</div><div class='add'>+          - nvidia,tegra194-host1x</div><div class='add'>+          - nvidia,tegra234-host1x</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-host1x</div><div class='add'>+          - const: nvidia,tegra124-host1x</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    description: The number of cells used to represent physical base addresses</div><div class='add'>+      in the host1x address space.</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    description: The number of cells used to represent the size of an address</div><div class='add'>+      range in the host1x address space.</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Must contain one entry, for the module clock. See</div><div class='add'>+      ../clocks/clock-bindings.txt for details.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: host1x</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1 # MC reset is optional on Tegra186 and later</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+      - description: memory client hotflush reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1 # MC reset is optional on Tegra186 and later</div><div class='add'>+    items:</div><div class='add'>+      - const: host1x</div><div class='add'>+      - const: mc</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: memory read client for host1x</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the HEG or core power domain</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - ranges</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties:</div><div class='add'>+  type: object</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra20-host1x</div><div class='add'>+              - nvidia,tegra30-host1x</div><div class='add'>+              - nvidia,tegra114-host1x</div><div class='add'>+              - nvidia,tegra124-host1x</div><div class='add'>+              - nvidia,tegra210-host1x</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: host1x syncpoint interrupt</div><div class='add'>+            - description: host1x general interrupt</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: syncpt</div><div class='add'>+            - const: host1x</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+        - reset-names</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra186-host1x</div><div class='add'>+              - nvidia,tegra194-host1x</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hypervisor</div><div class='add'>+            - const: vm</div><div class='add'>+</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: region used by the hypervisor</div><div class='add'>+            - description: region assigned to the virtual machine</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: host1x syncpoint interrupt</div><div class='add'>+            - description: host1x general interrupt</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: syncpt</div><div class='add'>+            - const: host1x</div><div class='add'>+</div><div class='add'>+        iommu-map:</div><div class='add'>+          description: Specification of stream IDs available for memory context device</div><div class='add'>+            use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to</div><div class='add'>+            usable stream IDs.</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - reg-names</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra234-host1x</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: common</div><div class='add'>+            - const: hypervisor</div><div class='add'>+            - const: vm</div><div class='add'>+</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: region used by host1x server</div><div class='add'>+            - description: region used by the hypervisor</div><div class='add'>+            - description: region assigned to the virtual machine</div><div class='add'>+</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: host1x syncpoint interrupt 0</div><div class='add'>+            - description: host1x syncpoint interrupt 1</div><div class='add'>+            - description: host1x syncpoint interrupt 2</div><div class='add'>+            - description: host1x syncpoint interrupt 3</div><div class='add'>+            - description: host1x syncpoint interrupt 4</div><div class='add'>+            - description: host1x syncpoint interrupt 5</div><div class='add'>+            - description: host1x syncpoint interrupt 6</div><div class='add'>+            - description: host1x syncpoint interrupt 7</div><div class='add'>+            - description: host1x general interrupt</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: syncpt0</div><div class='add'>+            - const: syncpt1</div><div class='add'>+            - const: syncpt2</div><div class='add'>+            - const: syncpt3</div><div class='add'>+            - const: syncpt4</div><div class='add'>+            - const: syncpt5</div><div class='add'>+            - const: syncpt6</div><div class='add'>+            - const: syncpt7</div><div class='add'>+            - const: host1x</div><div class='add'>+</div><div class='add'>+        iommu-map:</div><div class='add'>+          description: Specification of stream IDs available for memory context device</div><div class='add'>+            use. Should be a mapping of IDs 0..n to IOMMU entries corresponding to</div><div class='add'>+            usable stream IDs.</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - reg-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra20-mc.h&gt;</div><div class='add'>+</div><div class='add'>+    host1x@50000000 {</div><div class='add'>+        compatible = "nvidia,tegra20-host1x";</div><div class='add'>+        reg = &lt;0x50000000 0x00024000&gt;;</div><div class='add'>+        interrupts = &lt;0 65 0x04&gt;, /* mpcore syncpt */</div><div class='add'>+                     &lt;0 67 0x04&gt;; /* mpcore general */</div><div class='add'>+        interrupt-names = "syncpt", "host1x";</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_HOST1X&gt;;</div><div class='add'>+        clock-names = "host1x";</div><div class='add'>+        resets = &lt;&amp;tegra_car 28&gt;, &lt;&amp;mc TEGRA20_MC_RESET_HC&gt;;</div><div class='add'>+        reset-names = "host1x", "mc";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ranges = &lt;0x54000000 0x54000000 0x04000000&gt;;</div><div class='add'>+</div><div class='add'>+        mpe@54040000 {</div><div class='add'>+            compatible = "nvidia,tegra20-mpe";</div><div class='add'>+            reg = &lt;0x54040000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 68 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_MPE&gt;;</div><div class='add'>+            resets = &lt;&amp;tegra_car 60&gt;;</div><div class='add'>+            reset-names = "mpe";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        vi@54080000 {</div><div class='add'>+            compatible = "nvidia,tegra20-vi";</div><div class='add'>+            reg = &lt;0x54080000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 69 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_VI&gt;;</div><div class='add'>+            resets = &lt;&amp;tegra_car 100&gt;;</div><div class='add'>+            reset-names = "vi";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        epp@540c0000 {</div><div class='add'>+            compatible = "nvidia,tegra20-epp";</div><div class='add'>+            reg = &lt;0x540c0000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 70 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_EPP&gt;;</div><div class='add'>+            resets = &lt;&amp;tegra_car 19&gt;;</div><div class='add'>+            reset-names = "epp";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        isp@54100000 {</div><div class='add'>+            compatible = "nvidia,tegra20-isp";</div><div class='add'>+            reg = &lt;0x54100000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 71 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_ISP&gt;;</div><div class='add'>+            resets = &lt;&amp;tegra_car 23&gt;;</div><div class='add'>+            reset-names = "isp";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        gr2d@54140000 {</div><div class='add'>+            compatible = "nvidia,tegra20-gr2d";</div><div class='add'>+            reg = &lt;0x54140000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 72 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_GR2D&gt;;</div><div class='add'>+            resets = &lt;&amp;tegra_car 21&gt;, &lt;&amp;mc TEGRA20_MC_RESET_2D&gt;;</div><div class='add'>+            reset-names = "2d", "mc";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        gr3d@54180000 {</div><div class='add'>+            compatible = "nvidia,tegra20-gr3d";</div><div class='add'>+            reg = &lt;0x54180000 0x00040000&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_GR3D&gt;;</div><div class='add'>+            resets = &lt;&amp;tegra_car 24&gt;, &lt;&amp;mc TEGRA20_MC_RESET_3D&gt;;</div><div class='add'>+            reset-names = "3d", "mc";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dc@54200000 {</div><div class='add'>+            compatible = "nvidia,tegra20-dc";</div><div class='add'>+            reg = &lt;0x54200000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 73 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_DISP1&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;tegra_car 27&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            rgb {</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dc@54240000 {</div><div class='add'>+            compatible = "nvidia,tegra20-dc";</div><div class='add'>+            reg = &lt;0x54240000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 74 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_DISP2&gt;;</div><div class='add'>+            clock-names = "dc";</div><div class='add'>+            resets = &lt;&amp;tegra_car 26&gt;;</div><div class='add'>+            reset-names = "dc";</div><div class='add'>+</div><div class='add'>+            rgb {</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hdmi@54280000 {</div><div class='add'>+            compatible = "nvidia,tegra20-hdmi";</div><div class='add'>+            reg = &lt;0x54280000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 75 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_HDMI&gt;,</div><div class='add'>+                     &lt;&amp;tegra_car TEGRA20_CLK_PLL_D_OUT0&gt;;</div><div class='add'>+            clock-names = "hdmi", "parent";</div><div class='add'>+            resets = &lt;&amp;tegra_car 51&gt;;</div><div class='add'>+            reset-names = "hdmi";</div><div class='add'>+</div><div class='add'>+            hdmi-supply = &lt;&amp;vdd_5v0_hdmi&gt;;</div><div class='add'>+            pll-supply = &lt;&amp;vdd_hdmi_pll&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vdd_3v3_hdmi&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,ddc-i2c-bus = &lt;&amp;hdmi_ddc&gt;;</div><div class='add'>+            nvidia,hpd-gpio = &lt;&amp;gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        tvo@542c0000 {</div><div class='add'>+            compatible = "nvidia,tegra20-tvo";</div><div class='add'>+            reg = &lt;0x542c0000 0x00040000&gt;;</div><div class='add'>+            interrupts = &lt;0 76 0x04&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_TVO&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dsi@54300000 {</div><div class='add'>+            compatible = "nvidia,tegra20-dsi";</div><div class='add'>+            reg = &lt;0x54300000 0x00040000&gt;;</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA20_CLK_DSI&gt;,</div><div class='add'>+                     &lt;&amp;tegra_car TEGRA20_CLK_PLL_D_OUT0&gt;;</div><div class='add'>+            clock-names = "dsi", "parent";</div><div class='add'>+            resets = &lt;&amp;tegra_car 48&gt;;</div><div class='add'>+            reset-names = "dsi";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra210-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra210-mc.h&gt;</div><div class='add'>+</div><div class='add'>+    host1x@50000000 {</div><div class='add'>+        compatible = "nvidia,tegra210-host1x";</div><div class='add'>+        reg = &lt;0x50000000 0x00024000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;, /* mpcore syncpt */</div><div class='add'>+                     &lt;GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH&gt;; /* mpcore general */</div><div class='add'>+        interrupt-names = "syncpt", "host1x";</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA210_CLK_HOST1X&gt;;</div><div class='add'>+        clock-names = "host1x";</div><div class='add'>+        resets = &lt;&amp;tegra_car 28&gt;;</div><div class='add'>+        reset-names = "host1x";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ranges = &lt;0x54000000 0x54000000 0x01000000&gt;;</div><div class='add'>+        iommus = &lt;&amp;mc TEGRA_SWGROUP_HC&gt;;</div><div class='add'>+</div><div class='add'>+        vi@54080000 {</div><div class='add'>+            compatible = "nvidia,tegra210-vi";</div><div class='add'>+            reg = &lt;0x54080000 0x00000700&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            assigned-clocks = &lt;&amp;tegra_car TEGRA210_CLK_VI&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;tegra_car TEGRA210_CLK_PLL_C4_OUT0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA210_CLK_VI&gt;;</div><div class='add'>+            power-domains = &lt;&amp;pd_venc&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            ranges = &lt;0x0 0x54080000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+            csi@838 {</div><div class='add'>+                compatible = "nvidia,tegra210-csi";</div><div class='add'>+                reg = &lt;0x838 0x1300&gt;;</div><div class='add'>+                assigned-clocks = &lt;&amp;tegra_car TEGRA210_CLK_CILAB&gt;,</div><div class='add'>+                                  &lt;&amp;tegra_car TEGRA210_CLK_CILCD&gt;,</div><div class='add'>+                                  &lt;&amp;tegra_car TEGRA210_CLK_CILE&gt;,</div><div class='add'>+                                  &lt;&amp;tegra_car TEGRA210_CLK_CSI_TPG&gt;;</div><div class='add'>+                assigned-clock-parents = &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;,</div><div class='add'>+                                         &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;,</div><div class='add'>+                                         &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;;</div><div class='add'>+                assigned-clock-rates = &lt;102000000&gt;,</div><div class='add'>+                                       &lt;102000000&gt;,</div><div class='add'>+                                       &lt;102000000&gt;,</div><div class='add'>+                                       &lt;972000000&gt;;</div><div class='add'>+</div><div class='add'>+                clocks = &lt;&amp;tegra_car TEGRA210_CLK_CSI&gt;,</div><div class='add'>+                         &lt;&amp;tegra_car TEGRA210_CLK_CILAB&gt;,</div><div class='add'>+                         &lt;&amp;tegra_car TEGRA210_CLK_CILCD&gt;,</div><div class='add'>+                         &lt;&amp;tegra_car TEGRA210_CLK_CILE&gt;,</div><div class='add'>+                         &lt;&amp;tegra_car TEGRA210_CLK_CSI_TPG&gt;;</div><div class='add'>+                clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg";</div><div class='add'>+                power-domains = &lt;&amp;pd_sor&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml<br/>new file mode 100644<br/>index 000000000000..3bc3b22e98e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-isp.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-isp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra ISP processor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra20-isp</div><div class='add'>+      - nvidia,tegra30-isp</div><div class='add'>+      - nvidia,tegra210-isp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: isp</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: memory write client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # write</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the VENC or core power domain</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    isp@54100000 {</div><div class='add'>+        compatible = "nvidia,tegra20-isp";</div><div class='add'>+        reg = &lt;0x54100000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_ISP&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 23&gt;;</div><div class='add'>+        reset-names = "isp";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml<br/>new file mode 100644<br/>index 000000000000..2cd3e60cd0a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-mpe.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Video Encoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^mpe@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra20-mpe</div><div class='add'>+      - nvidia,tegra30-mpe</div><div class='add'>+      - nvidia,tegra114-mpe</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mpe</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the MPE power domain</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    mpe@54040000 {</div><div class='add'>+        compatible = "nvidia,tegra20-mpe";</div><div class='add'>+        reg = &lt;0x54040000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_MPE&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 60&gt;;</div><div class='add'>+        reset-names = "mpe";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml<br/>new file mode 100644<br/>index 000000000000..6c84d8b7eb7b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-tvo.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra TV Encoder Output</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^tvo@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra20-tvo</div><div class='add'>+      - nvidia,tegra30-tvo</div><div class='add'>+      - nvidia,tegra114-tvo</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the core power domain</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tvo@542c0000 {</div><div class='add'>+        compatible = "nvidia,tegra20-tvo";</div><div class='add'>+        reg = &lt;0x542c0000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_TVO&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml<br/>new file mode 100644<br/>index 000000000000..a42bf33d1e7d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Video Input controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^vi@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra20-vi</div><div class='add'>+      - const: nvidia,tegra30-vi</div><div class='add'>+      - const: nvidia,tegra114-vi</div><div class='add'>+      - const: nvidia,tegra124-vi</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-vi</div><div class='add'>+          - const: nvidia,tegra124-vi</div><div class='add'>+      - const: nvidia,tegra210-vi</div><div class='add'>+      - const: nvidia,tegra186-vi</div><div class='add'>+      - const: nvidia,tegra194-vi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vi</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the VENC power domain</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-dsi-csi-supply:</div><div class='add'>+    description: DSI/CSI power supply. Must supply 1.2 V.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^csi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra20-vi</div><div class='add'>+              - nvidia,tegra30-vi</div><div class='add'>+              - nvidia,tegra114-vi</div><div class='add'>+              - nvidia,tegra124-vi</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+        - reset-names</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    vi@54080000 {</div><div class='add'>+        compatible = "nvidia,tegra20-vi";</div><div class='add'>+        reg = &lt;0x54080000 0x00040000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_VI&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 100&gt;;</div><div class='add'>+        reset-names = "vi";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra210-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    vi@54080000 {</div><div class='add'>+        compatible = "nvidia,tegra210-vi";</div><div class='add'>+        reg = &lt;0x54080000 0x00000700&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        assigned-clocks = &lt;&amp;tegra_car TEGRA210_CLK_VI&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;tegra_car TEGRA210_CLK_PLL_C4_OUT0&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA210_CLK_VI&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd_venc&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ranges = &lt;0x0 0x54080000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+        csi@838 {</div><div class='add'>+            compatible = "nvidia,tegra210-csi";</div><div class='add'>+            reg = &lt;0x838 0x1300&gt;;</div><div class='add'>+            assigned-clocks = &lt;&amp;tegra_car TEGRA210_CLK_CILAB&gt;,</div><div class='add'>+                              &lt;&amp;tegra_car TEGRA210_CLK_CILCD&gt;,</div><div class='add'>+                              &lt;&amp;tegra_car TEGRA210_CLK_CILE&gt;,</div><div class='add'>+                              &lt;&amp;tegra_car TEGRA210_CLK_CSI_TPG&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;,</div><div class='add'>+                                     &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;,</div><div class='add'>+                                     &lt;&amp;tegra_car TEGRA210_CLK_PLL_P&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;102000000&gt;,</div><div class='add'>+                                   &lt;102000000&gt;,</div><div class='add'>+                                   &lt;102000000&gt;,</div><div class='add'>+                                   &lt;972000000&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;tegra_car TEGRA210_CLK_CSI&gt;,</div><div class='add'>+                     &lt;&amp;tegra_car TEGRA210_CLK_CILAB&gt;,</div><div class='add'>+                     &lt;&amp;tegra_car TEGRA210_CLK_CILCD&gt;,</div><div class='add'>+                     &lt;&amp;tegra_car TEGRA210_CLK_CILE&gt;,</div><div class='add'>+                     &lt;&amp;tegra_car TEGRA210_CLK_CSI_TPG&gt;;</div><div class='add'>+            clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg";</div><div class='add'>+            power-domains = &lt;&amp;pd_sor&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml<br/>new file mode 100644<br/>index 000000000000..fa07a40d1004<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/tegra/nvidia,tegra210-csi.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra210-csi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra CSI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^csi@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra210-csi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+      - description: A/B lanes clock</div><div class='add'>+      - description: C/D lanes clock</div><div class='add'>+      - description: E lane clock</div><div class='add'>+      - description: test pattern generator clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: csi</div><div class='add'>+      - const: cilab</div><div class='add'>+      - const: cilcd</div><div class='add'>+      - const: cile</div><div class='add'>+      - const: csi_tpg</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+# see nvidia,tegra20-vi.yaml for an example</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml<br/>index 5c7d2cbc4aac..b6b402f16161 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Texas Instruments AM65x Display Subsystem</div><div class='ctx'> </div><div class='hunk'>@@ -88,7 +88,7 @@ properties:</div><div class='ctx'>           The DSS DPI output port node from video port 2</div><div class='ctx'> </div><div class='ctx'>   ti,am65x-oldi-io-ctrl:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='ctx'>       phandle to syscon device node mapping OLDI IO_CTRL registers.</div><div class='ctx'>       The mapped range should point to OLDI_DAT0_IO_CTRL, map it and</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml<br/>index 2986f9acc9f0..fad7cba58d39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/ti/ti,j721e-dss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/ti/ti,j721e-dss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Texas Instruments J721E Display Subsystem</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml b/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml<br/>index 7ce7bbad5780..96b1439f88e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/ti/ti,k2g-dss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Texas Instruments K2G Display Subsystem</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml b/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml<br/>index 10ec78ca1c65..554f9d5809d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml</a></div><div class='hunk'>@@ -117,6 +117,45 @@ properties:</div><div class='ctx'>       - const: dp-phy0</div><div class='ctx'>       - const: dp-phy1</div><div class='ctx'> </div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    description: |</div><div class='add'>+      Connections to the programmable logic and the DisplayPort PHYs. Each port</div><div class='add'>+      shall have a single endpoint.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The live video input from the programmable logic</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The live graphics input from the programmable logic</div><div class='add'>+</div><div class='add'>+      port@2:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The live audio input from the programmable logic</div><div class='add'>+</div><div class='add'>+      port@3:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The blended video output to the programmable logic</div><div class='add'>+</div><div class='add'>+      port@4:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The mixed audio output to the programmable logic</div><div class='add'>+</div><div class='add'>+      port@5:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: The DisplayPort output</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+      - port@2</div><div class='add'>+      - port@3</div><div class='add'>+      - port@4</div><div class='add'>+      - port@5</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -130,6 +169,7 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'>   - phys</div><div class='ctx'>   - phy-names</div><div class='add'>+  - ports</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -164,6 +204,33 @@ examples:</div><div class='ctx'>                &lt;&amp;psgtr 0 PHY_TYPE_DP 1 3&gt;;</div><div class='ctx'> </div><div class='ctx'>         phy-names = "dp-phy0", "dp-phy1";</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+            port@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+            port@3 {</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+            };</div><div class='add'>+            port@4 {</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+            };</div><div class='add'>+            port@5 {</div><div class='add'>+                reg = &lt;5&gt;;</div><div class='add'>+                dpsub_dp_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;dp_connector&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml b/Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml<br/>index fc02c5d50ce4..76b804b7c880 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/display/xylon,logicvc-display.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Bootlin</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Xylon LogiCVC display controller</div><div class='ctx'> </div><div class='hunk'>@@ -89,25 +89,25 @@ properties:</div><div class='ctx'>     description: Display output colorspace (C_DISPLAY_COLOR_SPACE).</div><div class='ctx'> </div><div class='ctx'>   xylon,display-depth:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: Display output depth (C_PIXEL_DATA_WIDTH).</div><div class='ctx'> </div><div class='ctx'>   xylon,row-stride:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: Fixed number of pixels in a framebuffer row (C_ROW_STRIDE).</div><div class='ctx'> </div><div class='ctx'>   xylon,dithering:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/flag"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description: Dithering module is enabled (C_XCOLOR)</div><div class='ctx'> </div><div class='ctx'>   xylon,background-layer:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/flag"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description: |</div><div class='ctx'>       The last layer is used to display a black background (C_USE_BACKGROUND).</div><div class='ctx'>       The layer must still be registered.</div><div class='ctx'> </div><div class='ctx'>   xylon,layers-configurable:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/flag"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description: |</div><div class='ctx'>       Configuration of layers' size, position and offset is enabled</div><div class='ctx'>       (C_USE_SIZE_POSITION).</div><div class='hunk'>@@ -131,7 +131,7 @@ properties:</div><div class='ctx'>             maxItems: 1</div><div class='ctx'> </div><div class='ctx'>           xylon,layer-depth:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             description: Layer depth (C_LAYER_X_DATA_WIDTH).</div><div class='ctx'> </div><div class='ctx'>           xylon,layer-colorspace:</div><div class='hunk'>@@ -151,19 +151,19 @@ properties:</div><div class='ctx'>             description: Alpha mode for the layer (C_LAYER_X_ALPHA_MODE).</div><div class='ctx'> </div><div class='ctx'>           xylon,layer-base-offset:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             description: |</div><div class='ctx'>               Offset in number of lines (C_LAYER_X_OFFSET) starting from the</div><div class='ctx'>               video RAM base (C_VMEM_BASEADDR), only for version 3.</div><div class='ctx'> </div><div class='ctx'>           xylon,layer-buffer-offset:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             description: |</div><div class='ctx'>               Offset in number of lines (C_BUFFER_*_OFFSET) starting from the</div><div class='ctx'>               layer base offset for the second buffer used in double-buffering.</div><div class='ctx'> </div><div class='ctx'>           xylon,layer-primary:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/flag"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>             description: |</div><div class='ctx'>               Layer should be registered as a primary plane (exactly one is</div><div class='ctx'>               required).</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml<br/>index 83808199657b..02d5bd035409 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/allwinner,sun4i-a10-dma.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/allwinner,sun4i-a10-dma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 DMA Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 DMA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml<br/>index b6e1ebfaf366..ec2d7a789ffe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A64 DMA Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A64 DMA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='hunk'>@@ -20,9 +20,11 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: allwinner,sun50i-a64-dma</div><div class='del'>-      - const: allwinner,sun50i-a100-dma</div><div class='del'>-      - const: allwinner,sun50i-h6-dma</div><div class='add'>+      - enum:</div><div class='add'>+          - allwinner,sun20i-d1-dma</div><div class='add'>+          - allwinner,sun50i-a64-dma</div><div class='add'>+          - allwinner,sun50i-a100-dma</div><div class='add'>+          - allwinner,sun50i-h6-dma</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: allwinner,sun8i-r40-dma</div><div class='ctx'>           - const: allwinner,sun50i-a64-dma</div><div class='hunk'>@@ -58,13 +60,14 @@ if:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='ctx'>       enum:</div><div class='add'>+        - allwinner,sun20i-d1-dma</div><div class='ctx'>         - allwinner,sun50i-a100-dma</div><div class='ctx'>         - allwinner,sun50i-h6-dma</div><div class='ctx'> </div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='ctx'>     clocks:</div><div class='del'>-      maxItems: 2</div><div class='add'>+      minItems: 2</div><div class='ctx'> </div><div class='ctx'>   required:</div><div class='ctx'>     - clock-names</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml<br/>index a6df6f8b54db..5d554bcfab3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/allwinner,sun6i-a31-dma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 DMA Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A31 DMA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/altr,msgdma.yaml b/Documentation/devicetree/bindings/dma/altr,msgdma.yaml<br/>index b193ee2db4a7..391bf5838602 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/altr,msgdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/altr,msgdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/altr,msgdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/altr,msgdma.yaml</a></div><div class='hunk'>@@ -7,14 +7,14 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Altera mSGDMA IP core</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Olivier Dautricourt &lt;olivier.dautricourt@orolia.com&gt;</div><div class='add'>+  - Olivier Dautricourt &lt;olivierdautricourt@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA)</div><div class='ctx'>   intellectual property (IP)</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/apple,admac.yaml b/Documentation/devicetree/bindings/dma/apple,admac.yaml<br/>new file mode 100644<br/>index 000000000000..ab193bc8bdbb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/apple,admac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/apple,admac.yaml</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/apple,admac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Apple Audio DMA Controller (ADMAC)</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples</div><div class='add'>+  on SoCs from the "Apple Silicon" family.</div><div class='add'>+</div><div class='add'>+  The controller has been seen with up to 24 channels. Even-numbered channels</div><div class='add'>+  are TX-only, odd-numbered are RX-only. Individual channels are coupled to</div><div class='add'>+  fixed device endpoints.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Martin Povišer &lt;povik+lin@cutebit.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - apple,t6000-admac</div><div class='add'>+          - apple,t8103-admac</div><div class='add'>+          - apple,t8112-admac</div><div class='add'>+      - const: apple,admac</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#dma-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      Clients specify a single cell with channel number.</div><div class='add'>+</div><div class='add'>+  dma-channels:</div><div class='add'>+    maximum: 24</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 4</div><div class='add'>+    description:</div><div class='add'>+      Interrupts that correspond to the 4 IRQ outputs of the controller. Usually</div><div class='add'>+      only one of the controller outputs will be connected as an usable interrupt</div><div class='add'>+      source. The remaining interrupts will be left without a valid value, e.g.</div><div class='add'>+      in an interrupts-extended list the disconnected positions will contain</div><div class='add'>+      an empty phandle reference &lt;0&gt;.</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#dma-cells'</div><div class='add'>+  - dma-channels</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    aic: interrupt-controller {</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;3&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    admac: dma-controller@238200000 {</div><div class='add'>+      compatible = "apple,t8103-admac", "apple,admac";</div><div class='add'>+      reg = &lt;0x38200000 0x34000&gt;;</div><div class='add'>+      dma-channels = &lt;24&gt;;</div><div class='add'>+      interrupts-extended = &lt;0&gt;,</div><div class='add'>+                            &lt;&amp;aic AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                            &lt;0&gt;,</div><div class='add'>+                            &lt;0&gt;;</div><div class='add'>+      #dma-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/arm,pl330.yaml b/Documentation/devicetree/bindings/dma/arm,pl330.yaml<br/>index decab185cf4d..4a3dd6f5309b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/arm,pl330.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/arm,pl330.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/arm,pl330.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/arm,pl330.yaml</a></div><div class='hunk'>@@ -55,6 +55,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   dma-coherent: true</div><div class='ctx'> </div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='add'>+    description: Up to 1 IOMMU entry per DMA channel for writes and 1</div><div class='add'>+      IOMMU entry for reads.</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/arm-pl08x.yaml b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml<br/>index 9193b18fb75f..ab25ae63d2c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/arm-pl08x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/arm-pl08x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/arm-pl08x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/arm-pl08x.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/arm/primecell.yaml#</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> # We need a select here so we don't match all nodes with 'arm,primecell'</div><div class='ctx'> select:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/dma-common.yaml b/Documentation/devicetree/bindings/dma/dma-common.yaml<br/>index ad06d36af208..ea700f8ee6c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/dma-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/dma-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/dma-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/dma-common.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/dma-common.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: DMA Engine Generic Binding</div><div class='add'>+title: DMA Engine Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/dma-controller.yaml b/Documentation/devicetree/bindings/dma/dma-controller.yaml<br/>index 6d3727267fa8..04d150d4d15d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/dma-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/dma-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/dma-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/dma-controller.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/dma-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: DMA Controller Generic Binding</div><div class='add'>+title: DMA Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-common.yaml#"</div><div class='add'>+  - $ref: dma-common.yaml#</div><div class='ctx'> </div><div class='ctx'> # Everything else is described in the common file</div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/dma-router.yaml b/Documentation/devicetree/bindings/dma/dma-router.yaml<br/>index 4b817f5dc30e..346fe0fa4460 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/dma-router.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/dma-router.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/dma-router.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/dma-router.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/dma-router.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: DMA Router Generic Binding</div><div class='add'>+title: DMA Router Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-common.yaml#"</div><div class='add'>+  - $ref: dma-common.yaml#</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   DMA routers are transparent IP blocks used to route DMA request</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml<br/>new file mode 100644<br/>index 000000000000..5fd8fc604261<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl,edma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/fsl,edma.yaml</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/fsl,edma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale enhanced Direct Memory Access(eDMA) Controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The eDMA channels have multiplex capability by programmable</div><div class='add'>+  memory-mapped registers. channels are split into two groups, called</div><div class='add'>+  DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed</div><div class='add'>+  by any channel of certain group, DMAMUX0 or DMAMUX1, but not both.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,vf610-edma</div><div class='add'>+          - fsl,imx7ulp-edma</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,ls1028a-edma</div><div class='add'>+          - const: fsl,vf610-edma</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 17</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 17</div><div class='add'>+</div><div class='add'>+  "#dma-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  dma-channels:</div><div class='add'>+    const: 32</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  big-endian:</div><div class='add'>+    description: |</div><div class='add'>+      If present registers and hardware scatter/gather descriptors of the</div><div class='add'>+      eDMA are implemented in big endian mode, otherwise in little mode.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#dma-cells"</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - dma-channels</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,vf610-edma</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: dmamux0</div><div class='add'>+            - const: dmamux1</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: edma-tx</div><div class='add'>+            - const: edma-err</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx7ulp-edma</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: dma</div><div class='add'>+            - const: dmamux0</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 17</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/vf610-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    edma0: dma-controller@40018000 {</div><div class='add'>+      #dma-cells = &lt;2&gt;;</div><div class='add'>+      compatible = "fsl,vf610-edma";</div><div class='add'>+      reg = &lt;0x40018000 0x2000&gt;,</div><div class='add'>+            &lt;0x40024000 0x1000&gt;,</div><div class='add'>+            &lt;0x40025000 0x1000&gt;;</div><div class='add'>+      interrupts = &lt;0 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;0 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "edma-tx", "edma-err";</div><div class='add'>+      dma-channels = &lt;32&gt;;</div><div class='add'>+      clock-names = "dmamux0", "dmamux1";</div><div class='add'>+      clocks = &lt;&amp;clks VF610_CLK_DMAMUX0&gt;, &lt;&amp;clks VF610_CLK_DMAMUX1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx7ulp-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    edma1: dma-controller@40080000 {</div><div class='add'>+      #dma-cells = &lt;2&gt;;</div><div class='add'>+      compatible = "fsl,imx7ulp-edma";</div><div class='add'>+      reg = &lt;0x40080000 0x2000&gt;,</div><div class='add'>+            &lt;0x40210000 0x1000&gt;;</div><div class='add'>+      dma-channels = &lt;32&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   /* last is eDMA2-ERR interrupt */</div><div class='add'>+                   &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+       clock-names = "dma", "dmamux0";</div><div class='add'>+       clocks = &lt;&amp;pcc2 IMX7ULP_CLK_DMA1&gt;, &lt;&amp;pcc2 IMX7ULP_CLK_DMA_MUX1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml b/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml<br/>new file mode 100644<br/>index 000000000000..b95dd8db5a30<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/fsl,imx-sdma.yaml</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Smart Direct Memory Access (SDMA) Controller for i.MX</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Joy Zou &lt;joy.zou@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx50-sdma</div><div class='add'>+              - fsl,imx51-sdma</div><div class='add'>+              - fsl,imx53-sdma</div><div class='add'>+              - fsl,imx6q-sdma</div><div class='add'>+              - fsl,imx7d-sdma</div><div class='add'>+          - const: fsl,imx35-sdma</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6sx-sdma</div><div class='add'>+              - fsl,imx6sl-sdma</div><div class='add'>+          - const: fsl,imx6q-sdma</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx6ul-sdma</div><div class='add'>+          - const: fsl,imx6q-sdma</div><div class='add'>+          - const: fsl,imx35-sdma</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx6sll-sdma</div><div class='add'>+          - const: fsl,imx6ul-sdma</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx8mq-sdma</div><div class='add'>+          - const: fsl,imx7d-sdma</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mp-sdma</div><div class='add'>+              - fsl,imx8mn-sdma</div><div class='add'>+              - fsl,imx8mm-sdma</div><div class='add'>+          - const: fsl,imx8mq-sdma</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx25-sdma</div><div class='add'>+              - fsl,imx31-sdma</div><div class='add'>+              - fsl,imx35-sdma</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fsl,sdma-ram-script-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Should contain the full path of SDMA RAM scripts firmware.</div><div class='add'>+</div><div class='add'>+  "#dma-cells":</div><div class='add'>+    const: 3</div><div class='add'>+    description: |</div><div class='add'>+      The first cell: request/event ID</div><div class='add'>+</div><div class='add'>+      The second cell: peripheral types ID</div><div class='add'>+        enum:</div><div class='add'>+          - MCU domain SSI: 0</div><div class='add'>+          - Shared SSI: 1</div><div class='add'>+          - MMC: 2</div><div class='add'>+          - SDHC: 3</div><div class='add'>+          - MCU domain UART: 4</div><div class='add'>+          - Shared UART: 5</div><div class='add'>+          - FIRI: 6</div><div class='add'>+          - MCU domain CSPI: 7</div><div class='add'>+          - Shared CSPI: 8</div><div class='add'>+          - SIM: 9</div><div class='add'>+          - ATA: 10</div><div class='add'>+          - CCM: 11</div><div class='add'>+          - External peripheral: 12</div><div class='add'>+          - Memory Stick Host Controller: 13</div><div class='add'>+          - Shared Memory Stick Host Controller: 14</div><div class='add'>+          - DSP: 15</div><div class='add'>+          - Memory: 16</div><div class='add'>+          - FIFO type Memory: 17</div><div class='add'>+          - SPDIF: 18</div><div class='add'>+          - IPU Memory: 19</div><div class='add'>+          - ASRC: 20</div><div class='add'>+          - ESAI: 21</div><div class='add'>+          - SSI Dual FIFO: 22</div><div class='add'>+              description: needs firmware more than ver 2</div><div class='add'>+          - Shared ASRC: 23</div><div class='add'>+          - SAI: 24</div><div class='add'>+          - HDMI Audio: 25</div><div class='add'>+</div><div class='add'>+       The third cell: transfer priority ID</div><div class='add'>+         enum:</div><div class='add'>+           - High: 0</div><div class='add'>+           - Medium: 1</div><div class='add'>+           - Low: 2</div><div class='add'>+</div><div class='add'>+  gpr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle to the General Purpose Register (GPR) node</div><div class='add'>+</div><div class='add'>+  fsl,sdma-event-remap:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: GPR register offset</div><div class='add'>+        - description: GPR register shift</div><div class='add'>+        - description: GPR register value</div><div class='add'>+    description: |</div><div class='add'>+      Register bits of sdma event remap, the format is &lt;reg shift val&gt;.</div><div class='add'>+      The order is &lt;RX&gt;, &lt;TX&gt;.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg</div><div class='add'>+      - const: ahb</div><div class='add'>+</div><div class='add'>+  iram:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle to the On-chip RAM (OCRAM) node.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - fsl,sdma-ram-script-name</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sdma: dma-controller@83fb0000 {</div><div class='add'>+      compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";</div><div class='add'>+      reg = &lt;0x83fb0000 0x4000&gt;;</div><div class='add'>+      interrupts = &lt;6&gt;;</div><div class='add'>+      #dma-cells = &lt;3&gt;;</div><div class='add'>+      fsl,sdma-ram-script-name = "sdma-imx51.bin";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml<br/>new file mode 100644<br/>index 000000000000..add9c77e8b52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/fsl,mxs-dma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Direct Memory Access (DMA) Controller from i.MX23/i.MX28</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6q-dma-apbh</div><div class='add'>+              - fsl,imx6sx-dma-apbh</div><div class='add'>+              - fsl,imx7d-dma-apbh</div><div class='add'>+          - const: fsl,imx28-dma-apbh</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx23-dma-apbh</div><div class='add'>+          - fsl,imx23-dma-apbx</div><div class='add'>+          - fsl,imx28-dma-apbh</div><div class='add'>+          - fsl,imx28-dma-apbx</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 16</div><div class='add'>+</div><div class='add'>+  "#dma-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  dma-channels:</div><div class='add'>+    enum: [4, 8, 16]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#dma-cells"</div><div class='add'>+  - dma-channels</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-parent = &lt;&amp;irqc&gt;;</div><div class='add'>+</div><div class='add'>+    dma-controller@80004000 {</div><div class='add'>+      compatible = "fsl,imx28-dma-apbh";</div><div class='add'>+      reg = &lt;0x80004000 0x2000&gt;;</div><div class='add'>+      interrupts = &lt;82 83 84 85</div><div class='add'>+                    88 88 88 88</div><div class='add'>+                    88 88 88 88</div><div class='add'>+                    87 86 0 0&gt;;</div><div class='add'>+      #dma-cells = &lt;1&gt;;</div><div class='add'>+      dma-channels = &lt;16&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    dma-controller@80024000 {</div><div class='add'>+      compatible = "fsl,imx28-dma-apbx";</div><div class='add'>+      reg = &lt;0x80024000 0x2000&gt;;</div><div class='add'>+      interrupts = &lt;78 79 66 0</div><div class='add'>+                    80 81 68 69</div><div class='add'>+                    70 71 72 73</div><div class='add'>+                    74 75 76 77&gt;;</div><div class='add'>+      #dma-cells = &lt;1&gt;;</div><div class='add'>+      dma-channels = &lt;16&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl-edma.txt b/Documentation/devicetree/bindings/dma/fsl-edma.txt<br/>deleted file mode 100644<br/>index ee1754739b4b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl-edma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-edma.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,111 +0,0 @@</div><div class='del'>-* Freescale enhanced Direct Memory Access(eDMA) Controller</div><div class='del'>-</div><div class='del'>-  The eDMA channels have multiplex capability by programmble memory-mapped</div><div class='del'>-registers. channels are split into two groups, called DMAMUX0 and DMAMUX1,</div><div class='del'>-specific DMA request source can only be multiplexed by any channel of certain</div><div class='del'>-group, DMAMUX0 or DMAMUX1, but not both.</div><div class='del'>-</div><div class='del'>-* eDMA Controller</div><div class='del'>-Required properties:</div><div class='del'>-- compatible :</div><div class='del'>-	- "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC</div><div class='del'>-	- "fsl,imx7ulp-edma" for eDMA2 used similar to that on i.mx7ulp</div><div class='del'>-	- "fsl,ls1028a-edma" followed by "fsl,vf610-edma" for eDMA used on the</div><div class='del'>-	  LS1028A SoC.</div><div class='del'>-- reg : Specifies base physical address(s) and size of the eDMA registers.</div><div class='del'>-	The 1st region is eDMA control register's address and size.</div><div class='del'>-	The 2nd and the 3rd regions are programmable channel multiplexing</div><div class='del'>-	control register's address and size.</div><div class='del'>-- interrupts : A list of interrupt-specifiers, one for each entry in</div><div class='del'>-	interrupt-names on vf610 similar SoC. But for i.mx7ulp per channel</div><div class='del'>-	per transmission interrupt, total 16 channel interrupt and 1</div><div class='del'>-	error interrupt(located in the last), no interrupt-names list on</div><div class='del'>-	i.mx7ulp for clean on dts.</div><div class='del'>-- #dma-cells : Must be &lt;2&gt;.</div><div class='del'>-	The 1st cell specifies the DMAMUX(0 for DMAMUX0 and 1 for DMAMUX1).</div><div class='del'>-	Specific request source can only be multiplexed by specific channels</div><div class='del'>-	group called DMAMUX.</div><div class='del'>-	The 2nd cell specifies the request source(slot) ID.</div><div class='del'>-	See the SoC's reference manual for all the supported request sources.</div><div class='del'>-- dma-channels : Number of channels supported by the controller</div><div class='del'>-- clock-names : A list of channel group clock names. Should contain:</div><div class='del'>-	"dmamux0" - clock name of mux0 group</div><div class='del'>-	"dmamux1" - clock name of mux1 group</div><div class='del'>-	Note: No dmamux0 on i.mx7ulp, but another 'dma' clk added on i.mx7ulp.</div><div class='del'>-- clocks : A list of phandle and clock-specifier pairs, one for each entry in</div><div class='del'>-	clock-names.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- big-endian: If present registers and hardware scatter/gather descriptors</div><div class='del'>-	of the eDMA are implemented in big endian mode, otherwise in little</div><div class='del'>-	mode.</div><div class='del'>-- interrupt-names : Should contain the below on vf610 similar SoC but not used</div><div class='del'>-	on i.mx7ulp similar SoC:</div><div class='del'>-	"edma-tx" - the transmission interrupt</div><div class='del'>-	"edma-err" - the error interrupt</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-edma0: dma-controller@40018000 {</div><div class='del'>-	#dma-cells = &lt;2&gt;;</div><div class='del'>-	compatible = "fsl,vf610-edma";</div><div class='del'>-	reg = &lt;0x40018000 0x2000&gt;,</div><div class='del'>-		&lt;0x40024000 0x1000&gt;,</div><div class='del'>-		&lt;0x40025000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;0 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		&lt;0 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	interrupt-names = "edma-tx", "edma-err";</div><div class='del'>-	dma-channels = &lt;32&gt;;</div><div class='del'>-	clock-names = "dmamux0", "dmamux1";</div><div class='del'>-	clocks = &lt;&amp;clks VF610_CLK_DMAMUX0&gt;,</div><div class='del'>-		&lt;&amp;clks VF610_CLK_DMAMUX1&gt;;</div><div class='del'>-}; /* vf610 */</div><div class='del'>-</div><div class='del'>-edma1: dma-controller@40080000 {</div><div class='del'>-	#dma-cells = &lt;2&gt;;</div><div class='del'>-	compatible = "fsl,imx7ulp-edma";</div><div class='del'>-	reg = &lt;0x40080000 0x2000&gt;,</div><div class='del'>-		&lt;0x40210000 0x1000&gt;;</div><div class='del'>-	dma-channels = &lt;32&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     /* last is eDMA2-ERR interrupt */</div><div class='del'>-		     &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clock-names = "dma", "dmamux0";</div><div class='del'>-	clocks = &lt;&amp;pcc2 IMX7ULP_CLK_DMA1&gt;,</div><div class='del'>-		 &lt;&amp;pcc2 IMX7ULP_CLK_DMA_MUX1&gt;;</div><div class='del'>-}; /* i.mx7ulp */</div><div class='del'>-</div><div class='del'>-* DMA clients</div><div class='del'>-DMA client drivers that uses the DMA function must use the format described</div><div class='del'>-in the dma.txt file, using a two-cell specifier for each channel: the 1st</div><div class='del'>-specifies the channel group(DMAMUX) in which this request can be multiplexed,</div><div class='del'>-and the 2nd specifies the request source.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-sai2: sai@40031000 {</div><div class='del'>-	compatible = "fsl,vf610-sai";</div><div class='del'>-	reg = &lt;0x40031000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;0 86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clock-names = "sai";</div><div class='del'>-	clocks = &lt;&amp;clks VF610_CLK_SAI2&gt;;</div><div class='del'>-	dma-names = "tx", "rx";</div><div class='del'>-	dmas = &lt;&amp;edma0 0 21&gt;,</div><div class='del'>-		&lt;&amp;edma0 0 20&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt<br/>index 7bd8847d6394..1c9929d53727 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-imx-dma.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl-imx-dma.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/fsl-imx-dma.txt</a></div><div class='hunk'>@@ -13,8 +13,10 @@ Required properties:</div><div class='ctx'> - #dma-cells : Has to be 1. imx-dma does not support anything else.</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='del'>-- #dma-channels : Number of DMA channels supported. Should be 16.</div><div class='del'>-- #dma-requests : Number of DMA requests supported.</div><div class='add'>+- dma-channels : Number of DMA channels supported. Should be 16.</div><div class='add'>+- #dma-channels : deprecated</div><div class='add'>+- dma-requests : Number of DMA requests supported.</div><div class='add'>+- #dma-requests : deprecated</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='hunk'>@@ -23,7 +25,7 @@ Example:</div><div class='ctx'> 		reg = &lt;0x10001000 0x1000&gt;;</div><div class='ctx'> 		interrupts = &lt;32 33&gt;;</div><div class='ctx'> 		#dma-cells = &lt;1&gt;;</div><div class='del'>-		#dma-channels = &lt;16&gt;;</div><div class='add'>+		dma-channels = &lt;16&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt<br/>deleted file mode 100644<br/>index 12c316ff4834..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,118 +0,0 @@</div><div class='del'>-* Freescale Smart Direct Memory Access (SDMA) Controller for i.MX</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be one of</div><div class='del'>-      "fsl,imx25-sdma"</div><div class='del'>-      "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"</div><div class='del'>-      "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"</div><div class='del'>-      "fsl,imx51-sdma"</div><div class='del'>-      "fsl,imx53-sdma"</div><div class='del'>-      "fsl,imx6q-sdma"</div><div class='del'>-      "fsl,imx7d-sdma"</div><div class='del'>-      "fsl,imx6ul-sdma"</div><div class='del'>-      "fsl,imx8mq-sdma"</div><div class='del'>-      "fsl,imx8mm-sdma"</div><div class='del'>-      "fsl,imx8mn-sdma"</div><div class='del'>-      "fsl,imx8mp-sdma"</div><div class='del'>-  The -to variants should be preferred since they allow to determine the</div><div class='del'>-  correct ROM script addresses needed for the driver to work without additional</div><div class='del'>-  firmware.</div><div class='del'>-- reg : Should contain SDMA registers location and length</div><div class='del'>-- interrupts : Should contain SDMA interrupt</div><div class='del'>-- #dma-cells : Must be &lt;3&gt;.</div><div class='del'>-  The first cell specifies the DMA request/event ID.  See details below</div><div class='del'>-  about the second and third cell.</div><div class='del'>-- fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM</div><div class='del'>-  scripts firmware</div><div class='del'>-</div><div class='del'>-The second cell of dma phandle specifies the peripheral type of DMA transfer.</div><div class='del'>-The full ID of peripheral types can be found below.</div><div class='del'>-</div><div class='del'>-	ID	transfer type</div><div class='del'>-	---------------------</div><div class='del'>-	0	MCU domain SSI</div><div class='del'>-	1	Shared SSI</div><div class='del'>-	2	MMC</div><div class='del'>-	3	SDHC</div><div class='del'>-	4	MCU domain UART</div><div class='del'>-	5	Shared UART</div><div class='del'>-	6	FIRI</div><div class='del'>-	7	MCU domain CSPI</div><div class='del'>-	8	Shared CSPI</div><div class='del'>-	9	SIM</div><div class='del'>-	10	ATA</div><div class='del'>-	11	CCM</div><div class='del'>-	12	External peripheral</div><div class='del'>-	13	Memory Stick Host Controller</div><div class='del'>-	14	Shared Memory Stick Host Controller</div><div class='del'>-	15	DSP</div><div class='del'>-	16	Memory</div><div class='del'>-	17	FIFO type Memory</div><div class='del'>-	18	SPDIF</div><div class='del'>-	19	IPU Memory</div><div class='del'>-	20	ASRC</div><div class='del'>-	21	ESAI</div><div class='del'>-	22	SSI Dual FIFO	(needs firmware ver &gt;= 2)</div><div class='del'>-	23	Shared ASRC</div><div class='del'>-	24	SAI</div><div class='del'>-</div><div class='del'>-The third cell specifies the transfer priority as below.</div><div class='del'>-</div><div class='del'>-	ID	transfer priority</div><div class='del'>-	-------------------------</div><div class='del'>-	0	High</div><div class='del'>-	1	Medium</div><div class='del'>-	2	Low</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- gpr : The phandle to the General Purpose Register (GPR) node.</div><div class='del'>-- fsl,sdma-event-remap : Register bits of sdma event remap, the format is</div><div class='del'>-  &lt;reg shift val&gt;.</div><div class='del'>-    reg is the GPR register offset.</div><div class='del'>-    shift is the bit position inside the GPR register.</div><div class='del'>-    val is the value of the bit (0 or 1).</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-sdma@83fb0000 {</div><div class='del'>-	compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";</div><div class='del'>-	reg = &lt;0x83fb0000 0x4000&gt;;</div><div class='del'>-	interrupts = &lt;6&gt;;</div><div class='del'>-	#dma-cells = &lt;3&gt;;</div><div class='del'>-	fsl,sdma-ram-script-name = "sdma-imx51.bin";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-DMA clients connected to the i.MX SDMA controller must use the format</div><div class='del'>-described in the dma.txt file.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-ssi2: ssi@70014000 {</div><div class='del'>-	compatible = "fsl,imx51-ssi", "fsl,imx21-ssi";</div><div class='del'>-	reg = &lt;0x70014000 0x4000&gt;;</div><div class='del'>-	interrupts = &lt;30&gt;;</div><div class='del'>-	clocks = &lt;&amp;clks 49&gt;;</div><div class='del'>-	dmas = &lt;&amp;sdma 24 1 0&gt;,</div><div class='del'>-	       &lt;&amp;sdma 25 1 0&gt;;</div><div class='del'>-	dma-names = "rx", "tx";</div><div class='del'>-	fsl,fifo-depth = &lt;15&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Using the fsl,sdma-event-remap property:</div><div class='del'>-</div><div class='del'>-If we want to use SDMA on the SAI1 port on a MX6SX:</div><div class='del'>-</div><div class='del'>-&amp;sdma {</div><div class='del'>-	gpr = &lt;&amp;gpr&gt;;</div><div class='del'>-	/* SDMA events remap for SAI1_RX and SAI1_TX */</div><div class='del'>-	fsl,sdma-event-remap = &lt;0 15 1&gt;, &lt;0 16 1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-The fsl,sdma-event-remap property in this case has two values:</div><div class='del'>-- &lt;0 15 1&gt; means that the offset is 0, so GPR0 is the register of the</div><div class='del'>-SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.</div><div class='del'>-Setting bit 15 to 1 selects SAI1_RX.</div><div class='del'>-- &lt;0 16 1&gt; means that the offset is 0, so GPR0 is the register of the</div><div class='del'>-SDMA remap. Bit 16 of GPR0 selects between UART4_TX and SAI1_TX.</div><div class='del'>-Setting bit 16 to 1 selects SAI1_TX.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt b/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt<br/>deleted file mode 100644<br/>index e30e184f50c7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/fsl-mxs-dma.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,60 +0,0 @@</div><div class='del'>-* Freescale MXS DMA</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "fsl,&lt;chip&gt;-dma-apbh" or "fsl,&lt;chip&gt;-dma-apbx"</div><div class='del'>-- reg : Should contain registers location and length</div><div class='del'>-- interrupts : Should contain the interrupt numbers of DMA channels.</div><div class='del'>-  If a channel is empty/reserved, 0 should be filled in place.</div><div class='del'>-- #dma-cells : Must be &lt;1&gt;.  The number cell specifies the channel ID.</div><div class='del'>-- dma-channels : Number of channels supported by the DMA controller</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupt-names : Name of DMA channel interrupts</div><div class='del'>-</div><div class='del'>-Supported chips:</div><div class='del'>-imx23, imx28.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-dma_apbh: dma-apbh@80004000 {</div><div class='del'>-	compatible = "fsl,imx28-dma-apbh";</div><div class='del'>-	reg = &lt;0x80004000 0x2000&gt;;</div><div class='del'>-	interrupts = &lt;82 83 84 85</div><div class='del'>-		      88 88 88 88</div><div class='del'>-		      88 88 88 88</div><div class='del'>-		      87 86 0 0&gt;;</div><div class='del'>-	interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",</div><div class='del'>-			  "gpmi0", "gmpi1", "gpmi2", "gmpi3",</div><div class='del'>-			  "gpmi4", "gmpi5", "gpmi6", "gmpi7",</div><div class='del'>-			  "hsadc", "lcdif", "empty", "empty";</div><div class='del'>-	#dma-cells = &lt;1&gt;;</div><div class='del'>-	dma-channels = &lt;16&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-dma_apbx: dma-apbx@80024000 {</div><div class='del'>-	compatible = "fsl,imx28-dma-apbx";</div><div class='del'>-	reg = &lt;0x80024000 0x2000&gt;;</div><div class='del'>-	interrupts = &lt;78 79 66 0</div><div class='del'>-		      80 81 68 69</div><div class='del'>-		      70 71 72 73</div><div class='del'>-		      74 75 76 77&gt;;</div><div class='del'>-	interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",</div><div class='del'>-			  "saif0", "saif1", "i2c0", "i2c1",</div><div class='del'>-			  "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",</div><div class='del'>-			  "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";</div><div class='del'>-	#dma-cells = &lt;1&gt;;</div><div class='del'>-	dma-channels = &lt;16&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-DMA clients connected to the MXS DMA controller must use the format</div><div class='del'>-described in the dma.txt file.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-auart0: serial@8006a000 {</div><div class='del'>-	compatible = "fsl,imx28-auart", "fsl,imx23-auart";</div><div class='del'>-	reg = &lt;0x8006a000 0x2000&gt;;</div><div class='del'>-	interrupts = &lt;112&gt;;</div><div class='del'>-	dmas = &lt;&amp;dma_apbx 8&gt;, &lt;&amp;dma_apbx 9&gt;;</div><div class='del'>-	dma-names = "rx", "tx";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml<br/>index 3b0b3b919af8..37400496e086 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ingenic,dma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ingenic,dma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ingenic,dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/ingenic,dma.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/ingenic,dma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs DMA Controller DT bindings</div><div class='add'>+title: Ingenic SoCs DMA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -18,6 +18,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - ingenic,jz4740-dma</div><div class='ctx'>           - ingenic,jz4725b-dma</div><div class='add'>+          - ingenic,jz4755-dma</div><div class='ctx'>           - ingenic,jz4760-dma</div><div class='ctx'>           - ingenic,jz4760-bdma</div><div class='ctx'>           - ingenic,jz4760-mdma</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/intel,ldma.yaml b/Documentation/devicetree/bindings/dma/intel,ldma.yaml<br/>index a5c4be783593..d6bb553a2c6f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/intel,ldma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/intel,ldma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/intel,ldma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/intel,ldma.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - mallikarjunax.reddy@intel.com</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml<br/>index 54d68fc688b5..dab468a88942 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ description: |</div><div class='ctx'>   for the UART peripheral bus.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -22,6 +22,8 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt2712-uart-dma</div><div class='add'>+              - mediatek,mt6795-uart-dma</div><div class='add'>+              - mediatek,mt8365-uart-dma</div><div class='ctx'>               - mediatek,mt8516-uart-dma</div><div class='ctx'>           - const: mediatek,mt6577-uart-dma</div><div class='ctx'>       - enum:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/mmp-dma.txt b/Documentation/devicetree/bindings/dma/mmp-dma.txt<br/>index 8f7364a7b349..ec18bf0a802a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/mmp-dma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/mmp-dma.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/mmp-dma.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/mmp-dma.txt</a></div><div class='hunk'>@@ -10,10 +10,12 @@ Required properties:</div><div class='ctx'> 		or one irq for pdma device</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='del'>-- #dma-channels: Number of DMA channels supported by the controller (defaults</div><div class='add'>+- dma-channels: Number of DMA channels supported by the controller (defaults</div><div class='ctx'>   to 32 when not specified)</div><div class='del'>-- #dma-requests: Number of DMA requestor lines supported by the controller</div><div class='add'>+- #dma-channels: deprecated</div><div class='add'>+- dma-requests: Number of DMA requestor lines supported by the controller</div><div class='ctx'>   (defaults to 32 when not specified)</div><div class='add'>+- #dma-requests: deprecated</div><div class='ctx'> </div><div class='ctx'> "marvell,pdma-1.0"</div><div class='ctx'> Used platforms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688.</div><div class='hunk'>@@ -33,7 +35,7 @@ pdma: dma-controller@d4000000 {</div><div class='ctx'> 	      reg = &lt;0xd4000000 0x10000&gt;;</div><div class='ctx'> 	      interrupts = &lt;0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15&gt;;</div><div class='ctx'> 	      interrupt-parent = &lt;&amp;intcmux32&gt;;</div><div class='del'>-	      #dma-channels = &lt;16&gt;;</div><div class='add'>+	      dma-channels = &lt;16&gt;;</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='ctx'> /*</div><div class='hunk'>@@ -45,7 +47,7 @@ pdma: dma-controller@d4000000 {</div><div class='ctx'> 	      compatible = "marvell,pdma-1.0";</div><div class='ctx'> 	      reg = &lt;0xd4000000 0x10000&gt;;</div><div class='ctx'> 	      interrupts = &lt;47&gt;;</div><div class='del'>-	      #dma-channels = &lt;16&gt;;</div><div class='add'>+	      dma-channels = &lt;16&gt;;</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt b/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt<br/>index 8a9f3559335b..7e14e26676ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/moxa,moxart-dma.txt</a></div><div class='hunk'>@@ -34,8 +34,8 @@ Example:</div><div class='ctx'> Use specific request line passing from dma</div><div class='ctx'> For example, MMC request line is 5</div><div class='ctx'> </div><div class='del'>-	sdhci: sdhci@98e00000 {</div><div class='del'>-		compatible = "moxa,moxart-sdhci";</div><div class='add'>+	mmc: mmc@98e00000 {</div><div class='add'>+		compatible = "moxa,moxart-mmc";</div><div class='ctx'> 		reg = &lt;0x98e00000 0x5C&gt;;</div><div class='ctx'> 		interrupts = &lt;5 0&gt;;</div><div class='ctx'> 		clocks = &lt;&amp;clk_apb&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml<br/>new file mode 100644<br/>index 000000000000..a790e5687844<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/nvidia,tegra186-gpc-dma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra GPC DMA Controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Tegra General Purpose Central (GPC) DMA controller is used for faster</div><div class='add'>+  data transfers between memory to memory, memory to device and device to</div><div class='add'>+  memory.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Rajesh Gumasta &lt;rgumasta@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra186-gpcdma</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra234-gpcdma</div><div class='add'>+              - nvidia,tegra194-gpcdma</div><div class='add'>+          - const: nvidia,tegra186-gpcdma</div><div class='add'>+</div><div class='add'>+  "#dma-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      Should contain all of the per-channel DMA interrupts in</div><div class='add'>+      ascending order with respect to the DMA channel index.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 32</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: gpcdma</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  dma-channel-mask:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - "#dma-cells"</div><div class='add'>+  - iommus</div><div class='add'>+  - dma-channel-mask</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra186-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra186-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    dma-controller@2600000 {</div><div class='add'>+        compatible = "nvidia,tegra186-gpcdma";</div><div class='add'>+        reg = &lt;0x2600000 0x210000&gt;;</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA186_RESET_GPCDMA&gt;;</div><div class='add'>+        reset-names = "gpcdma";</div><div class='add'>+        interrupts = &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #dma-cells = &lt;1&gt;;</div><div class='add'>+        iommus = &lt;&amp;smmu TEGRA186_SID_GPCDMA_0&gt;;</div><div class='add'>+        dma-coherent;</div><div class='add'>+        dma-channel-mask = &lt;0xfffffffe&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml<br/>index fef804565b88..4003dbe94940 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ maintainers:</div><div class='ctx'>   - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/owl-dma.yaml b/Documentation/devicetree/bindings/dma/owl-dma.yaml<br/>index 93b4847554fb..ec8b3dc37ca4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/owl-dma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/owl-dma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/owl-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/owl-dma.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/qcom,adm.yaml b/Documentation/devicetree/bindings/dma/qcom,adm.yaml<br/>new file mode 100644<br/>index 000000000000..6a9d7bc74aff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/qcom,adm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/qcom,adm.yaml</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/qcom,adm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm ADM DMA Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  QCOM ADM DMA controller provides DMA capabilities for</div><div class='add'>+  peripheral buses such as NAND and SPI.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,adm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#dma-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the core clock</div><div class='add'>+      - description: phandle to the iface clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: iface</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the clk reset</div><div class='add'>+      - description: phandle to the pbus reset</div><div class='add'>+      - description: phandle to the c0 reset</div><div class='add'>+      - description: phandle to the c1 reset</div><div class='add'>+      - description: phandle to the c2 reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: clk</div><div class='add'>+      - const: pbus</div><div class='add'>+      - const: c0</div><div class='add'>+      - const: c1</div><div class='add'>+      - const: c2</div><div class='add'>+</div><div class='add'>+  qcom,ee:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: indicates the security domain identifier used in the secure world.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 255</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#dma-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - qcom,ee</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-ipq806x.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,gcc-ipq806x.h&gt;</div><div class='add'>+</div><div class='add'>+    adm_dma: dma-controller@18300000 {</div><div class='add'>+        compatible = "qcom,adm";</div><div class='add'>+        reg = &lt;0x18300000 0x100000&gt;;</div><div class='add'>+        interrupts = &lt;0 170 0&gt;;</div><div class='add'>+        #dma-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc ADM0_CLK&gt;,</div><div class='add'>+                  &lt;&amp;gcc ADM0_PBUS_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;gcc ADM0_RESET&gt;,</div><div class='add'>+                  &lt;&amp;gcc ADM0_PBUS_RESET&gt;,</div><div class='add'>+                  &lt;&amp;gcc ADM0_C0_RESET&gt;,</div><div class='add'>+                  &lt;&amp;gcc ADM0_C1_RESET&gt;,</div><div class='add'>+                  &lt;&amp;gcc ADM0_C2_RESET&gt;;</div><div class='add'>+        reset-names = "clk", "pbus", "c0", "c1", "c2";</div><div class='add'>+        qcom,ee = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml<br/>new file mode 100644<br/>index 000000000000..f1ddcf672261<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/qcom,bam-dma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies Inc BAM DMA controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+        # APQ8064, IPQ8064 and MSM8960</div><div class='add'>+      - qcom,bam-v1.3.0</div><div class='add'>+        # MSM8974, APQ8074 and APQ8084</div><div class='add'>+      - qcom,bam-v1.4.0</div><div class='add'>+        # MSM8916 and SDM845</div><div class='add'>+      - qcom,bam-v1.7.0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bam_clk</div><div class='add'>+</div><div class='add'>+  "#dma-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  num-channels:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Indicates supported number of DMA channels in a remotely controlled bam.</div><div class='add'>+</div><div class='add'>+  qcom,controlled-remotely:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the bam is controlled by remote proccessor i.e. execution</div><div class='add'>+      environment.</div><div class='add'>+</div><div class='add'>+  qcom,ee:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 7</div><div class='add'>+    description:</div><div class='add'>+      Indicates the active Execution Environment identifier (0-7) used in the</div><div class='add'>+      secure world.</div><div class='add'>+</div><div class='add'>+  qcom,num-ees:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Indicates supported number of Execution Environments in a remotely</div><div class='add'>+      controlled bam.</div><div class='add'>+</div><div class='add'>+  qcom,powered-remotely:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the bam is powered up by a remote processor but must be</div><div class='add'>+      initialized by the local processor.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#dma-cells"</div><div class='add'>+  - interrupts</div><div class='add'>+  - qcom,ee</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8974.h&gt;</div><div class='add'>+</div><div class='add'>+    dma-controller@f9944000 {</div><div class='add'>+        compatible = "qcom,bam-v1.4.0";</div><div class='add'>+        reg = &lt;0xf9944000 0x19000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='add'>+        clock-names = "bam_clk";</div><div class='add'>+        #dma-cells = &lt;1&gt;;</div><div class='add'>+        qcom,ee = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml<br/>index e614fe3187bb..f61145c91b6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/qcom,gpi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom,gpi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/qcom,gpi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/qcom,gpi.yaml</a></div><div class='hunk'>@@ -14,14 +14,32 @@ description: |</div><div class='ctx'>   peripheral buses such as I2C, UART, and SPI.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,sdm845-gpi-dma</div><div class='del'>-      - qcom,sm8150-gpi-dma</div><div class='del'>-      - qcom,sm8250-gpi-dma</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sdm845-gpi-dma</div><div class='add'>+          - qcom,sm6350-gpi-dma</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qcm2290-gpi-dma</div><div class='add'>+              - qcom,qdu1000-gpi-dma</div><div class='add'>+              - qcom,sc7280-gpi-dma</div><div class='add'>+              - qcom,sm6115-gpi-dma</div><div class='add'>+              - qcom,sm6375-gpi-dma</div><div class='add'>+              - qcom,sm8350-gpi-dma</div><div class='add'>+              - qcom,sm8450-gpi-dma</div><div class='add'>+              - qcom,sm8550-gpi-dma</div><div class='add'>+          - const: qcom,sm6350-gpi-dma</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sdm670-gpi-dma</div><div class='add'>+              - qcom,sm6125-gpi-dma</div><div class='add'>+              - qcom,sm8150-gpi-dma</div><div class='add'>+              - qcom,sm8250-gpi-dma</div><div class='add'>+          - const: qcom,sdm845-gpi-dma</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -29,6 +47,7 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     description:</div><div class='ctx'>       Interrupt lines for each GPI instance</div><div class='add'>+    minItems: 1</div><div class='ctx'>     maxItems: 13</div><div class='ctx'> </div><div class='ctx'>   "#dma-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt b/Documentation/devicetree/bindings/dma/qcom_adm.txt<br/>deleted file mode 100644<br/>index 9d3b2f917b7b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/qcom_adm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom_adm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,61 +0,0 @@</div><div class='del'>-QCOM ADM DMA Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960</div><div class='del'>-- reg: Address range for DMA registers</div><div class='del'>-- interrupts: Should contain one interrupt shared by all channels</div><div class='del'>-- #dma-cells: must be &lt;2&gt;.  First cell denotes the channel number.  Second cell</div><div class='del'>-  denotes CRCI (client rate control interface) flow control assignment.</div><div class='del'>-- clocks: Should contain the core clock and interface clock.</div><div class='del'>-- clock-names: Must contain "core" for the core clock and "iface" for the</div><div class='del'>-  interface clock.</div><div class='del'>-- resets: Must contain an entry for each entry in reset names.</div><div class='del'>-- reset-names: Must include the following entries:</div><div class='del'>-  - clk</div><div class='del'>-  - c0</div><div class='del'>-  - c1</div><div class='del'>-  - c2</div><div class='del'>-- qcom,ee: indicates the security domain identifier used in the secure world.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-		adm_dma: dma@18300000 {</div><div class='del'>-			compatible = "qcom,adm";</div><div class='del'>-			reg = &lt;0x18300000 0x100000&gt;;</div><div class='del'>-			interrupts = &lt;0 170 0&gt;;</div><div class='del'>-			#dma-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc ADM0_CLK&gt;, &lt;&amp;gcc ADM0_PBUS_CLK&gt;;</div><div class='del'>-			clock-names = "core", "iface";</div><div class='del'>-</div><div class='del'>-			resets = &lt;&amp;gcc ADM0_RESET&gt;,</div><div class='del'>-				&lt;&amp;gcc ADM0_C0_RESET&gt;,</div><div class='del'>-				&lt;&amp;gcc ADM0_C1_RESET&gt;,</div><div class='del'>-				&lt;&amp;gcc ADM0_C2_RESET&gt;;</div><div class='del'>-			reset-names = "clk", "c0", "c1", "c2";</div><div class='del'>-			qcom,ee = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-DMA clients must use the format descripted in the dma.txt file, using a three</div><div class='del'>-cell specifier for each channel.</div><div class='del'>-</div><div class='del'>-Each dmas request consists of 3 cells:</div><div class='del'>- 1. phandle pointing to the DMA controller</div><div class='del'>- 2. channel number</div><div class='del'>- 3. CRCI assignment, if applicable.  If no CRCI flow control is required, use 0.</div><div class='del'>-    The CRCI is used for flow control.  It identifies the peripheral device that</div><div class='del'>-    is the source/destination for the transferred data.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	spi4: spi@1a280000 {</div><div class='del'>-		spi-max-frequency = &lt;50000000&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-0 = &lt;&amp;spi_pins&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-		cs-gpios = &lt;&amp;qcom_pinmux 20 0&gt;;</div><div class='del'>-</div><div class='del'>-		dmas = &lt;&amp;adm_dma 6 9&gt;,</div><div class='del'>-			&lt;&amp;adm_dma 5 10&gt;;</div><div class='del'>-		dma-names = "rx", "tx";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt b/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt<br/>deleted file mode 100644<br/>index 6e9a5497b3f2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/qcom_bam_dma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/qcom_bam_dma.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,52 +0,0 @@</div><div class='del'>-QCOM BAM DMA controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be one of the following:</div><div class='del'>- * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084</div><div class='del'>- * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960</div><div class='del'>- * "qcom,bam-v1.7.0" for MSM8916</div><div class='del'>-- reg: Address range for DMA registers</div><div class='del'>-- interrupts: Should contain the one interrupt shared by all channels</div><div class='del'>-- #dma-cells: must be &lt;1&gt;, the cell in the dmas property of the client device</div><div class='del'>-  represents the channel number</div><div class='del'>-- clocks: required clock</div><div class='del'>-- clock-names: must contain "bam_clk" entry</div><div class='del'>-- qcom,ee : indicates the active Execution Environment identifier (0-7) used in</div><div class='del'>-  the secure world.</div><div class='del'>-- qcom,controlled-remotely : optional, indicates that the bam is controlled by</div><div class='del'>-  remote proccessor i.e. execution environment.</div><div class='del'>-- qcom,powered-remotely : optional, indicates that the bam is powered up by</div><div class='del'>-  a remote processor but must be initialized by the local processor.</div><div class='del'>-- num-channels : optional, indicates supported number of DMA channels in a</div><div class='del'>-  remotely controlled bam.</div><div class='del'>-- qcom,num-ees : optional, indicates supported number of Execution Environments</div><div class='del'>-  in a remotely controlled bam.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	uart-bam: dma@f9984000 = {</div><div class='del'>-		compatible = "qcom,bam-v1.4.0";</div><div class='del'>-		reg = &lt;0xf9984000 0x15000&gt;;</div><div class='del'>-		interrupts = &lt;0 94 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_BAM_DMA_AHB_CLK&gt;;</div><div class='del'>-		clock-names = "bam_clk";</div><div class='del'>-		#dma-cells = &lt;1&gt;;</div><div class='del'>-		qcom,ee = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-DMA clients must use the format described in the dma.txt file, using a two cell</div><div class='del'>-specifier for each channel.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	serial@f991e000 {</div><div class='del'>-		compatible = "qcom,msm-uart";</div><div class='del'>-		reg = &lt;0xf991e000 0x1000&gt;</div><div class='del'>-			&lt;0xf9944000 0x19000&gt;;</div><div class='del'>-		interrupts = &lt;0 108 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_BLSP1_UART2_APPS_CLK&gt;,</div><div class='del'>-			&lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='del'>-		clock-names = "core", "iface";</div><div class='del'>-</div><div class='del'>-		dmas = &lt;&amp;uart-bam 0&gt;, &lt;&amp;uart-bam 1&gt;;</div><div class='del'>-		dma-names = "rx", "tx";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml<br/>index 7c6badf39921..03aa067b1229 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -42,11 +42,11 @@ properties:</div><div class='ctx'>           - const: renesas,rcar-dmac</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='del'>-          - const: renesas,dmac-r8a779a0 # R-Car V3U</div><div class='del'>-</div><div class='del'>-      - items:</div><div class='del'>-          - const: renesas,dmac-r8a779f0 # R-Car S4-8</div><div class='del'>-          - const: renesas,rcar-gen4-dmac</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,dmac-r8a779a0     # R-Car V3U</div><div class='add'>+              - renesas,dmac-r8a779f0     # R-Car S4-8</div><div class='add'>+              - renesas,dmac-r8a779g0     # R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-dmac # R-Car Gen4</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'> </div><div class='hunk'>@@ -121,7 +121,6 @@ if:</div><div class='ctx'>     compatible:</div><div class='ctx'>       contains:</div><div class='ctx'>         enum:</div><div class='del'>-          - renesas,dmac-r8a779a0</div><div class='ctx'>           - renesas,rcar-gen4-dmac</div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml<br/>index 1e25c5b0fb4d..c284abc6784a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -54,6 +54,11 @@ properties:</div><div class='ctx'>       - description: DMA main clock</div><div class='ctx'>       - description: DMA register access clock</div><div class='ctx'> </div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: main</div><div class='add'>+      - const: register</div><div class='add'>+</div><div class='ctx'>   '#dma-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'>     description:</div><div class='hunk'>@@ -77,16 +82,23 @@ properties:</div><div class='ctx'>       - description: Reset for DMA ARESETN reset terminal</div><div class='ctx'>       - description: Reset for DMA RST_ASYNC reset terminal</div><div class='ctx'> </div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: arst</div><div class='add'>+      - const: rst_async</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - interrupt-names</div><div class='ctx'>   - clocks</div><div class='add'>+  - clock-names</div><div class='ctx'>   - '#dma-cells'</div><div class='ctx'>   - dma-channels</div><div class='ctx'>   - power-domains</div><div class='ctx'>   - resets</div><div class='add'>+  - reset-names</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -124,9 +136,11 @@ examples:</div><div class='ctx'>                           "ch12", "ch13", "ch14", "ch15";</div><div class='ctx'>         clocks = &lt;&amp;cpg CPG_MOD R9A07G044_DMAC_ACLK&gt;,</div><div class='ctx'>                  &lt;&amp;cpg CPG_MOD R9A07G044_DMAC_PCLK&gt;;</div><div class='add'>+        clock-names = "main", "register";</div><div class='ctx'>         power-domains = &lt;&amp;cpg&gt;;</div><div class='ctx'>         resets = &lt;&amp;cpg R9A07G044_DMAC_ARESETN&gt;,</div><div class='ctx'>                  &lt;&amp;cpg R9A07G044_DMAC_RST_ASYNC&gt;;</div><div class='add'>+        reset-names = "arst", "rst_async";</div><div class='ctx'>         #dma-cells = &lt;1&gt;;</div><div class='ctx'>         dma-channels = &lt;16&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml b/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml<br/>new file mode 100644<br/>index 000000000000..ee9833dcc36c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/N1 DMA mux</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-router.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,rzn1-dmamux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: DMA mux first register offset within the system control parent.</div><div class='add'>+</div><div class='add'>+  '#dma-cells':</div><div class='add'>+    const: 6</div><div class='add'>+    description:</div><div class='add'>+      The first four cells are dedicated to the master DMA controller. The fifth</div><div class='add'>+      cell gives the DMA mux bit index that must be set starting from 0. The</div><div class='add'>+      sixth cell gives the binary value that must be written there, ie. 0 or 1.</div><div class='add'>+</div><div class='add'>+  dma-masters:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-requests:</div><div class='add'>+    const: 32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - dma-requests</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    dma-router@a0 {</div><div class='add'>+      compatible = "renesas,rzn1-dmamux";</div><div class='add'>+      reg = &lt;0xa0 4&gt;;</div><div class='add'>+      #dma-cells = &lt;6&gt;;</div><div class='add'>+      dma-masters = &lt;&amp;dma0 &amp;dma1&gt;;</div><div class='add'>+      dma-requests = &lt;32&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml<br/>index ab287c652b2c..17813599fccb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/renesas,usb-dmac.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml b/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml<br/>index 47c46af25536..a1af0b906365 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/sifive,fu540-c000-pdma.yaml</a></div><div class='hunk'>@@ -23,12 +23,20 @@ description: |</div><div class='ctx'>   https://static.dev.sifive.com/FU540-C000-v1.0.pdf</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='del'>-      - const: sifive,fu540-c000-pdma</div><div class='add'>+      - enum:</div><div class='add'>+          - sifive,fu540-c000-pdma</div><div class='add'>+      - const: sifive,pdma0</div><div class='add'>+    description:</div><div class='add'>+      Should be "sifive,&lt;chip&gt;-pdma" and "sifive,pdma&lt;version&gt;".</div><div class='add'>+      Supported compatible strings are -</div><div class='add'>+      "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the</div><div class='add'>+      SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block</div><div class='add'>+      with no chip integration tweaks.</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -37,6 +45,12 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 8</div><div class='ctx'> </div><div class='add'>+  dma-channels:</div><div class='add'>+    description: For backwards-compatibility, the default value is 4</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 4</div><div class='add'>+    default: 4</div><div class='add'>+</div><div class='ctx'>   '#dma-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -50,8 +64,9 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     dma-controller@3000000 {</div><div class='del'>-      compatible = "sifive,fu540-c000-pdma";</div><div class='add'>+      compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";</div><div class='ctx'>       reg = &lt;0x3000000 0x8000&gt;;</div><div class='add'>+      dma-channels = &lt;4&gt;;</div><div class='ctx'>       interrupts = &lt;23&gt;, &lt;24&gt;, &lt;25&gt;, &lt;26&gt;, &lt;27&gt;, &lt;28&gt;, &lt;29&gt;, &lt;30&gt;;</div><div class='ctx'>       #dma-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml<br/>index 6b35089ac017..5da8291a7de0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml</a></div><div class='hunk'>@@ -11,11 +11,17 @@ maintainers:</div><div class='ctx'>   - Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: snps,dma-spear1340</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: snps,dma-spear1340</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a06g032-dma</div><div class='add'>+          - const: renesas,rzn1-dma</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'>   "#dma-cells":</div><div class='ctx'>     minimum: 3</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml<br/>index 4324a94b26b2..363cf8bd150d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml</a></div><div class='hunk'>@@ -8,19 +8,19 @@ title: Synopsys DesignWare AXI DMA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;</div><div class='del'>-  - Jee Heng Sia &lt;jee.heng.sia@intel.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Synopsys DesignWare AXI DMA Controller DT Binding</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - snps,axi-dma-1.01a</div><div class='ctx'>       - intel,kmb-axi-dma</div><div class='add'>+      - starfive,jh7110-axi-dma</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -34,7 +34,12 @@ properties:</div><div class='ctx'>       - const: axidma_apb_regs</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      If the IP-core synthesis parameter DMAX_INTR_IO_TYPE is set to 1, this</div><div class='add'>+      will be per-channel interrupts. Otherwise, this is a single combined IRQ</div><div class='add'>+      for all channels.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -54,7 +59,8 @@ properties:</div><div class='ctx'>     maximum: 8</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   snps,dma-masters:</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -105,25 +111,44 @@ required:</div><div class='ctx'>   - snps,priority</div><div class='ctx'>   - snps,block-size</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - starfive,jh7110-axi-dma</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    resets:</div><div class='add'>+      minItems: 2</div><div class='add'>+      items:</div><div class='add'>+        - description: AXI reset line</div><div class='add'>+        - description: AHB reset line</div><div class='add'>+        - description: module reset</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    resets:</div><div class='add'>+      maxItems: 1</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-     /* example with snps,dw-axi-dmac */</div><div class='del'>-     dmac: dma-controller@80000 {</div><div class='del'>-         compatible = "snps,axi-dma-1.01a";</div><div class='del'>-         reg = &lt;0x80000 0x400&gt;;</div><div class='del'>-         clocks = &lt;&amp;core_clk&gt;, &lt;&amp;cfgr_clk&gt;;</div><div class='del'>-         clock-names = "core-clk", "cfgr-clk";</div><div class='del'>-         interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-         interrupts = &lt;27&gt;;</div><div class='del'>-         #dma-cells = &lt;1&gt;;</div><div class='del'>-         dma-channels = &lt;4&gt;;</div><div class='del'>-         snps,dma-masters = &lt;2&gt;;</div><div class='del'>-         snps,data-width = &lt;3&gt;;</div><div class='del'>-         snps,block-size = &lt;4096 4096 4096 4096&gt;;</div><div class='del'>-         snps,priority = &lt;0 1 2 3&gt;;</div><div class='del'>-         snps,axi-max-burst-len = &lt;16&gt;;</div><div class='del'>-     };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    /* example with snps,dw-axi-dmac */</div><div class='add'>+    dma-controller@80000 {</div><div class='add'>+        compatible = "snps,axi-dma-1.01a";</div><div class='add'>+        reg = &lt;0x80000 0x400&gt;;</div><div class='add'>+        clocks = &lt;&amp;core_clk&gt;, &lt;&amp;cfgr_clk&gt;;</div><div class='add'>+        clock-names = "core-clk", "cfgr-clk";</div><div class='add'>+        interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+        interrupts = &lt;27&gt;;</div><div class='add'>+        #dma-cells = &lt;1&gt;;</div><div class='add'>+        dma-channels = &lt;4&gt;;</div><div class='add'>+        snps,dma-masters = &lt;2&gt;;</div><div class='add'>+        snps,data-width = &lt;3&gt;;</div><div class='add'>+        snps,block-size = &lt;4096 4096 4096 4096&gt;;</div><div class='add'>+        snps,priority = &lt;0 1 2 3&gt;;</div><div class='add'>+        snps,axi-max-burst-len = &lt;16&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml b/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml<br/>index e7bf6dd7da29..23c8a7bf24de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/socionext,uniphier-mio-dmac.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ maintainers:</div><div class='ctx'>   - Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml b/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml<br/>index 371f18773198..da61d1ddc9c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/socionext,uniphier-xdmac.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ maintainers:</div><div class='ctx'>   - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/sprd-dma.txt b/Documentation/devicetree/bindings/dma/sprd-dma.txt<br/>index adccea9941f1..c7e9b5fd50e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/sprd-dma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/sprd-dma.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/sprd-dma.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/sprd-dma.txt</a></div><div class='hunk'>@@ -8,10 +8,13 @@ Required properties:</div><div class='ctx'> - interrupts: Should contain one interrupt shared by all channel.</div><div class='ctx'> - #dma-cells: must be &lt;1&gt;. Used to represent the number of integer</div><div class='ctx'> 	cells in the dmas property of client device.</div><div class='del'>-- #dma-channels : Number of DMA channels supported. Should be 32.</div><div class='add'>+- dma-channels : Number of DMA channels supported. Should be 32.</div><div class='ctx'> - clock-names: Should contain the clock of the DMA controller.</div><div class='ctx'> - clocks: Should contain a clock specifier for each entry in clock-names.</div><div class='ctx'> </div><div class='add'>+Deprecated properties:</div><div class='add'>+- #dma-channels : Number of DMA channels supported. Should be 32.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> Controller:</div><div class='hunk'>@@ -20,7 +23,7 @@ apdma: dma-controller@20100000 {</div><div class='ctx'> 	reg = &lt;0x20100000 0x4000&gt;;</div><div class='ctx'> 	interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> 	#dma-cells = &lt;1&gt;;</div><div class='del'>-	#dma-channels = &lt;32&gt;;</div><div class='add'>+	dma-channels = &lt;32&gt;;</div><div class='ctx'> 	clock-names = "enable";</div><div class='ctx'> 	clocks = &lt;&amp;clk_ap_ahb_gates 5&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml<br/>index 55faab6a468e..329847ef096a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/st,stm32-dma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/st,stm32-dma.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 DMA Controller bindings</div><div class='add'>+title: STMicroelectronics STM32 DMA Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The STM32 DMA is a general-purpose direct memory access controller capable of</div><div class='hunk'>@@ -53,7 +53,7 @@ maintainers:</div><div class='ctx'>   - Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml<br/>index 7b1833d6caa2..e722fbcd8a5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/st,stm32-dmamux.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings</div><div class='add'>+title: STMicroelectronics STM32 DMA MUX (DMA request router)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-router.yaml#"</div><div class='add'>+  - $ref: dma-router.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='hunk'>@@ -51,4 +51,3 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml b/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml<br/>index 87b4afd2cf62..3874544dfa74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 MDMA Controller bindings</div><div class='add'>+title: STMicroelectronics STM32 MDMA Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The STM32 MDMA is a general-purpose direct memory access controller capable of</div><div class='hunk'>@@ -53,7 +53,7 @@ maintainers:</div><div class='ctx'>   - Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dma-controller.yaml#"</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='hunk'>@@ -104,4 +104,3 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/ste-dma40.txt b/Documentation/devicetree/bindings/dma/ste-dma40.txt<br/>deleted file mode 100644<br/>index 99ab5c4d331e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ste-dma40.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ste-dma40.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,138 +0,0 @@</div><div class='del'>-* DMA40 DMA Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "stericsson,dma40"</div><div class='del'>-- reg: Address range of the DMAC registers</div><div class='del'>-- reg-names: Names of the above areas to use during resource look-up</div><div class='del'>-- interrupt: Should contain the DMAC interrupt number</div><div class='del'>-- #dma-cells: must be &lt;3&gt;</div><div class='del'>-- memcpy-channels: Channels to be used for memcpy</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- dma-channels: Number of channels supported by hardware - if not present</div><div class='del'>-		the driver will attempt to obtain the information from H/W</div><div class='del'>-- disabled-channels: Channels which can not be used</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	dma: dma-controller@801c0000 {</div><div class='del'>-		compatible = "stericsson,db8500-dma40", "stericsson,dma40";</div><div class='del'>-		reg = &lt;0x801C0000 0x1000  0x40010000 0x800&gt;;</div><div class='del'>-		reg-names = "base", "lcpa";</div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-		interrupts = &lt;0 25 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		#dma-cells = &lt;2&gt;;</div><div class='del'>-		memcpy-channels  = &lt;56 57 58 59 60&gt;;</div><div class='del'>-		disabled-channels  = &lt;12&gt;;</div><div class='del'>-		dma-channels = &lt;8&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Clients</div><div class='del'>-Required properties:</div><div class='del'>-- dmas: Comma separated list of dma channel requests</div><div class='del'>-- dma-names: Names of the aforementioned requested channels</div><div class='del'>-</div><div class='del'>-Each dmas request consists of 4 cells:</div><div class='del'>-  1. A phandle pointing to the DMA controller</div><div class='del'>-  2. Device signal number, the signal line for single and burst requests</div><div class='del'>-     connected from the device to the DMA40 engine</div><div class='del'>-  3. The DMA request line number (only when 'use fixed channel' is set)</div><div class='del'>-  4. A 32bit mask specifying; mode, direction and endianness</div><div class='del'>-     [NB: This list will grow]</div><div class='del'>-        0x00000001: Mode:</div><div class='del'>-                Logical channel when unset</div><div class='del'>-                Physical channel when set</div><div class='del'>-        0x00000002: Direction:</div><div class='del'>-                Memory to Device when unset</div><div class='del'>-                Device to Memory when set</div><div class='del'>-        0x00000004: Endianness:</div><div class='del'>-                Little endian when unset</div><div class='del'>-                Big endian when set</div><div class='del'>-        0x00000008: Use fixed channel:</div><div class='del'>-                Use automatic channel selection when unset</div><div class='del'>-                Use DMA request line number when set</div><div class='del'>-        0x00000010: Set channel as high priority:</div><div class='del'>-                Normal priority when unset</div><div class='del'>-                High priority when set</div><div class='del'>-</div><div class='del'>-Existing signal numbers for the DB8500 ASIC. Unless specified, the signals are</div><div class='del'>-bidirectional, i.e. the same for RX and TX operations:</div><div class='del'>-</div><div class='del'>-0:  SPI controller 0</div><div class='del'>-1:  SD/MMC controller 0 (unused)</div><div class='del'>-2:  SD/MMC controller 1 (unused)</div><div class='del'>-3:  SD/MMC controller 2 (unused)</div><div class='del'>-4:  I2C port 1</div><div class='del'>-5:  I2C port 3</div><div class='del'>-6:  I2C port 2</div><div class='del'>-7:  I2C port 4</div><div class='del'>-8:  Synchronous Serial Port SSP0</div><div class='del'>-9:  Synchronous Serial Port SSP1</div><div class='del'>-10: Multi-Channel Display Engine MCDE RX</div><div class='del'>-11: UART port 2</div><div class='del'>-12: UART port 1</div><div class='del'>-13: UART port 0</div><div class='del'>-14: Multirate Serial Port MSP2</div><div class='del'>-15: I2C port 0</div><div class='del'>-16: USB OTG in/out endpoints 7 &amp; 15</div><div class='del'>-17: USB OTG in/out endpoints 6 &amp; 14</div><div class='del'>-18: USB OTG in/out endpoints 5 &amp; 13</div><div class='del'>-19: USB OTG in/out endpoints 4 &amp; 12</div><div class='del'>-20: SLIMbus or HSI channel 0</div><div class='del'>-21: SLIMbus or HSI channel 1</div><div class='del'>-22: SLIMbus or HSI channel 2</div><div class='del'>-23: SLIMbus or HSI channel 3</div><div class='del'>-24: Multimedia DSP SXA0</div><div class='del'>-25: Multimedia DSP SXA1</div><div class='del'>-26: Multimedia DSP SXA2</div><div class='del'>-27: Multimedia DSP SXA3</div><div class='del'>-28: SD/MM controller 2</div><div class='del'>-29: SD/MM controller 0</div><div class='del'>-30: MSP port 1 on DB8500 v1, MSP port 3 on DB8500 v2</div><div class='del'>-31: MSP port 0 or SLIMbus channel 0</div><div class='del'>-32: SD/MM controller 1</div><div class='del'>-33: SPI controller 2</div><div class='del'>-34: i2c3 RX2 TX2</div><div class='del'>-35: SPI controller 1</div><div class='del'>-36: USB OTG in/out endpoints 3 &amp; 11</div><div class='del'>-37: USB OTG in/out endpoints 2 &amp; 10</div><div class='del'>-38: USB OTG in/out endpoints 1 &amp; 9</div><div class='del'>-39: USB OTG in/out endpoints 8</div><div class='del'>-40: SPI controller 3</div><div class='del'>-41: SD/MM controller 3</div><div class='del'>-42: SD/MM controller 4</div><div class='del'>-43: SD/MM controller 5</div><div class='del'>-44: Multimedia DSP SXA4</div><div class='del'>-45: Multimedia DSP SXA5</div><div class='del'>-46: SLIMbus channel 8 or Multimedia DSP SXA6</div><div class='del'>-47: SLIMbus channel 9 or Multimedia DSP SXA7</div><div class='del'>-48: Crypto Accelerator 1</div><div class='del'>-49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX</div><div class='del'>-50: Hash Accelerator 1 TX</div><div class='del'>-51: memcpy TX (to be used by the DMA driver for memcpy operations)</div><div class='del'>-52: SLIMbus or HSI channel 4</div><div class='del'>-53: SLIMbus or HSI channel 5</div><div class='del'>-54: SLIMbus or HSI channel 6</div><div class='del'>-55: SLIMbus or HSI channel 7</div><div class='del'>-56: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='del'>-57: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='del'>-58: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='del'>-59: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='del'>-60: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='del'>-61: Crypto Accelerator 0</div><div class='del'>-62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX</div><div class='del'>-63: Hash Accelerator 0 TX</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	uart@80120000 {</div><div class='del'>-		compatible = "arm,pl011", "arm,primecell";</div><div class='del'>-		reg = &lt;0x80120000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 11 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		dmas = &lt;&amp;dma 13 0 0x2&gt;, /* Logical - DevToMem */</div><div class='del'>-		       &lt;&amp;dma 13 0 0x0&gt;; /* Logical - MemToDev */</div><div class='del'>-		dma-names = "rx", "rx";</div><div class='del'>-</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml b/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml<br/>new file mode 100644<br/>index 000000000000..64845347f44d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/stericsson,dma40.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/stericsson,dma40.yaml</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dma/stericsson,dma40.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ST-Ericsson DMA40 DMA Engine</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dma-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  "#dma-cells":</div><div class='add'>+    const: 3</div><div class='add'>+    description: |</div><div class='add'>+      The first cell is the unique device channel number as indicated by this</div><div class='add'>+      table for DB8500 which is the only ASIC known to use DMA40:</div><div class='add'>+</div><div class='add'>+      0:  SPI controller 0</div><div class='add'>+      1:  SD/MMC controller 0 (unused)</div><div class='add'>+      2:  SD/MMC controller 1 (unused)</div><div class='add'>+      3:  SD/MMC controller 2 (unused)</div><div class='add'>+      4:  I2C port 1</div><div class='add'>+      5:  I2C port 3</div><div class='add'>+      6:  I2C port 2</div><div class='add'>+      7:  I2C port 4</div><div class='add'>+      8:  Synchronous Serial Port SSP0</div><div class='add'>+      9:  Synchronous Serial Port SSP1</div><div class='add'>+      10: Multi-Channel Display Engine MCDE RX</div><div class='add'>+      11: UART port 2</div><div class='add'>+      12: UART port 1</div><div class='add'>+      13: UART port 0</div><div class='add'>+      14: Multirate Serial Port MSP2</div><div class='add'>+      15: I2C port 0</div><div class='add'>+      16: USB OTG in/out endpoints 7 &amp; 15</div><div class='add'>+      17: USB OTG in/out endpoints 6 &amp; 14</div><div class='add'>+      18: USB OTG in/out endpoints 5 &amp; 13</div><div class='add'>+      19: USB OTG in/out endpoints 4 &amp; 12</div><div class='add'>+      20: SLIMbus or HSI channel 0</div><div class='add'>+      21: SLIMbus or HSI channel 1</div><div class='add'>+      22: SLIMbus or HSI channel 2</div><div class='add'>+      23: SLIMbus or HSI channel 3</div><div class='add'>+      24: Multimedia DSP SXA0</div><div class='add'>+      25: Multimedia DSP SXA1</div><div class='add'>+      26: Multimedia DSP SXA2</div><div class='add'>+      27: Multimedia DSP SXA3</div><div class='add'>+      28: SD/MMC controller 2</div><div class='add'>+      29: SD/MMC controller 0</div><div class='add'>+      30: MSP port 1 on DB8500 v1, MSP port 3 on DB8500 v2</div><div class='add'>+      31: MSP port 0 or SLIMbus channel 0</div><div class='add'>+      32: SD/MMC controller 1</div><div class='add'>+      33: SPI controller 2</div><div class='add'>+      34: i2c3 RX2 TX2</div><div class='add'>+      35: SPI controller 1</div><div class='add'>+      36: USB OTG in/out endpoints 3 &amp; 11</div><div class='add'>+      37: USB OTG in/out endpoints 2 &amp; 10</div><div class='add'>+      38: USB OTG in/out endpoints 1 &amp; 9</div><div class='add'>+      39: USB OTG in/out endpoints 8</div><div class='add'>+      40: SPI controller 3</div><div class='add'>+      41: SD/MMC controller 3</div><div class='add'>+      42: SD/MMC controller 4</div><div class='add'>+      43: SD/MMC controller 5</div><div class='add'>+      44: Multimedia DSP SXA4</div><div class='add'>+      45: Multimedia DSP SXA5</div><div class='add'>+      46: SLIMbus channel 8 or Multimedia DSP SXA6</div><div class='add'>+      47: SLIMbus channel 9 or Multimedia DSP SXA7</div><div class='add'>+      48: Crypto Accelerator 1</div><div class='add'>+      49: Crypto Accelerator 1 TX or Hash Accelerator 1 TX</div><div class='add'>+      50: Hash Accelerator 1 TX</div><div class='add'>+      51: memcpy TX (to be used by the DMA driver for memcpy operations)</div><div class='add'>+      52: SLIMbus or HSI channel 4</div><div class='add'>+      53: SLIMbus or HSI channel 5</div><div class='add'>+      54: SLIMbus or HSI channel 6</div><div class='add'>+      55: SLIMbus or HSI channel 7</div><div class='add'>+      56: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='add'>+      57: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='add'>+      58: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='add'>+      59: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='add'>+      60: memcpy (to be used by the DMA driver for memcpy operations)</div><div class='add'>+      61: Crypto Accelerator 0</div><div class='add'>+      62: Crypto Accelerator 0 TX or Hash Accelerator 0 TX</div><div class='add'>+      63: Hash Accelerator 0 TX</div><div class='add'>+</div><div class='add'>+      The second cell is the DMA request line number. This is only used when</div><div class='add'>+      a fixed channel is allocated, and indicated by setting bit 3 in the</div><div class='add'>+      flags field (see below).</div><div class='add'>+</div><div class='add'>+      The third cell is a 32bit flags bitfield with the following possible</div><div class='add'>+      bits set:</div><div class='add'>+      0x00000001 (bit 0) - mode:</div><div class='add'>+        Logical channel when unset</div><div class='add'>+        Physical channel when set</div><div class='add'>+      0x00000002 (bit 1) - direction:</div><div class='add'>+        Memory to Device when unset</div><div class='add'>+        Device to Memory when set</div><div class='add'>+      0x00000004 (bit 2) - endianness:</div><div class='add'>+        Little endian when unset</div><div class='add'>+        Big endian when set</div><div class='add'>+      0x00000008 (bit 3) - use fixed channel:</div><div class='add'>+        Use automatic channel selection when unset</div><div class='add'>+        Use DMA request line number when set</div><div class='add'>+      0x00000010 (bit 4) - set channel as high priority:</div><div class='add'>+        Normal priority when unset</div><div class='add'>+        High priority when set</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: stericsson,db8500-dma40</div><div class='add'>+      - const: stericsson,dma40</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMA40 memory base</div><div class='add'>+      - description: LCPA memory base</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: base</div><div class='add'>+      - const: lcpa</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  memcpy-channels:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description: Array of u32 elements indicating which channels on the DMA</div><div class='add'>+      engine are elegible for memcpy transfers</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#dma-cells"</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - memcpy-channels</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/dbx500-prcmu.h&gt;</div><div class='add'>+    dma-controller@801c0000 {</div><div class='add'>+        compatible = "stericsson,db8500-dma40", "stericsson,dma40";</div><div class='add'>+        reg = &lt;0x801c0000 0x1000&gt;, &lt;0x40010000 0x800&gt;;</div><div class='add'>+        reg-names = "base", "lcpa";</div><div class='add'>+        interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #dma-cells = &lt;3&gt;;</div><div class='add'>+        memcpy-channels = &lt;56 57 58 59 60&gt;;</div><div class='add'>+        clocks = &lt;&amp;prcmu_clk PRCMU_DMACLK&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt b/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt<br/>index b849a1ed389d..47e477cce6d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt</a></div><div class='hunk'>@@ -4,7 +4,7 @@ Required properties:</div><div class='ctx'> - compatible:	"ti,dra7-dma-crossbar" for DRA7xx DMA crossbar</div><div class='ctx'> 		"ti,am335x-edma-crossbar" for AM335x and AM437x</div><div class='ctx'> - reg:		Memory map for accessing module</div><div class='del'>-- #dma-cells:	Should be set to to match with the DMA controller's dma-cells</div><div class='add'>+- #dma-cells:	Should be set to match with the DMA controller's dma-cells</div><div class='ctx'> 		for ti,dra7-dma-crossbar and &lt;3&gt; for ti,am335x-edma-crossbar.</div><div class='ctx'> - dma-requests:	Number of DMA requests the crossbar can receive</div><div class='ctx'> - dma-masters:	phandle pointing to the DMA controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml<br/>index 08627d91e607..beecfe7a1732 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments K3 DMSS BCDMA Device Tree Bindings</div><div class='add'>+title: Texas Instruments K3 DMSS BCDMA</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Ujfalusi &lt;peter.ujfalusi@gmail.com&gt;</div><div class='hunk'>@@ -28,13 +28,19 @@ description: |</div><div class='ctx'>   PDMAs can be configured via BCDMA split channel's peer registers to match with</div><div class='ctx'>   the configuration of the legacy peripheral.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/dma/dma-controller.yaml#</div><div class='del'>-  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: ti,am64-dmss-bcdma</div><div class='add'>+    enum:</div><div class='add'>+      - ti,am62a-dmss-bcdma-csirx</div><div class='add'>+      - ti,am64-dmss-bcdma</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   "#dma-cells":</div><div class='ctx'>     const: 3</div><div class='hunk'>@@ -65,19 +71,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       cell 3: ASEL value for the channel</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 5</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: gcfg</div><div class='del'>-      - const: bchanrt</div><div class='del'>-      - const: rchanrt</div><div class='del'>-      - const: tchanrt</div><div class='del'>-      - const: ringrt</div><div class='del'>-</div><div class='ctx'>   msi-parent: true</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    description:</div><div class='add'>+      Power domain if available</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   ti,asel:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: ASEL value for non slave channels</div><div class='hunk'>@@ -123,10 +123,51 @@ required:</div><div class='ctx'>   - msi-parent</div><div class='ctx'>   - ti,sci</div><div class='ctx'>   - ti,sci-dev-id</div><div class='del'>-  - ti,sci-rm-range-bchan</div><div class='del'>-  - ti,sci-rm-range-tchan</div><div class='ctx'>   - ti,sci-rm-range-rchan</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/dma/dma-controller.yaml#</div><div class='add'>+  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ti,am62a-dmss-bcdma-csirx</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,sci-rm-range-bchan: false</div><div class='add'>+        ti,sci-rm-range-tchan: false</div><div class='add'>+</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gcfg</div><div class='add'>+            - const: rchanrt</div><div class='add'>+            - const: ringrt</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 5</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gcfg</div><div class='add'>+            - const: bchanrt</div><div class='add'>+            - const: rchanrt</div><div class='add'>+            - const: tchanrt</div><div class='add'>+            - const: ringrt</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - ti,sci-rm-range-bchan</div><div class='add'>+        - ti,sci-rm-range-tchan</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml<br/>index 507d16d84ade..a69f62f854d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/ti/k3-pktdma.yaml</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/ti/k3-pktdma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments K3 DMSS PKTDMA Device Tree Bindings</div><div class='add'>+title: Texas Instruments K3 DMSS PKTDMA</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Ujfalusi &lt;peter.ujfalusi@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml<br/>index 6a09bbf83d46..22f6c5e2f7f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/ti/k3-udma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/ti/k3-udma.yaml</a></div><div class='hunk'>@@ -6,7 +6,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments K3 NAVSS Unified DMA Device Tree Bindings</div><div class='add'>+title: Texas Instruments K3 NAVSS Unified DMA</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Ujfalusi &lt;peter.ujfalusi@gmail.com&gt;</div><div class='hunk'>@@ -43,7 +43,8 @@ description: |</div><div class='ctx'>   configuration of the legacy peripheral.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "../dma-controller.yaml#"</div><div class='add'>+  - $ref: ../dma-controller.yaml#</div><div class='add'>+  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='hunk'>@@ -78,14 +79,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   msi-parent: true</div><div class='ctx'> </div><div class='del'>-  ti,sci:</div><div class='del'>-    description: phandle to TI-SCI compatible System controller node</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-</div><div class='del'>-  ti,sci-dev-id:</div><div class='del'>-    description: TI-SCI device id of UDMAP</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-</div><div class='ctx'>   ti,ringacc:</div><div class='ctx'>     description: phandle to the ring accelerator node</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt<br/>index 325aca52cd43..d1700a5c36bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt</a></div><div class='hunk'>@@ -110,7 +110,11 @@ axi_vdma_0: axivdma@40030000 {</div><div class='ctx'> Required properties:</div><div class='ctx'> - dmas: a list of &lt;[Video DMA device phandle] [Channel ID]&gt; pairs,</div><div class='ctx'> 	where Channel ID is '0' for write/tx and '1' for read/rx</div><div class='del'>-	channel.</div><div class='add'>+	channel. For MCMDA, MM2S channel(write/tx) ID start from</div><div class='add'>+	'0' and is in [0-15] range. S2MM channel(read/rx) ID start</div><div class='add'>+	from '16' and is in [16-31] range. These channels ID are</div><div class='add'>+	fixed irrespective of IP configuration.</div><div class='add'>+</div><div class='ctx'> - dma-names: a list of DMA channel names, one per "dmas" entry</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml<br/>index c0a1408b12ec..23ada8f87526 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ maintainers:</div><div class='ctx'>   - Michael Tretter &lt;m.tretter@pengutronix.de&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "../dma-controller.yaml#"</div><div class='add'>+  - $ref: ../dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml<br/>index 2a595b18ff6c..d6cbd95ec26d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dpdma.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx ZynqMP DisplayPort DMA Controller Device Tree Bindings</div><div class='add'>+title: Xilinx ZynqMP DisplayPort DMA Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   These bindings describe the DMA engine included in the Xilinx ZynqMP</div><div class='hunk'>@@ -16,7 +16,7 @@ maintainers:</div><div class='ctx'>   - Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "../dma-controller.yaml#"</div><div class='add'>+  - $ref: ../dma-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#dma-cells":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml<br/>index e66ef2da7879..9af40da5688e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/dsp/fsl,dsp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dsp/fsl,dsp.yaml</a></div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>       - fsl,imx8qxp-dsp</div><div class='ctx'>       - fsl,imx8qm-dsp</div><div class='ctx'>       - fsl,imx8mp-dsp</div><div class='add'>+      - fsl,imx8ulp-dsp</div><div class='ctx'>       - fsl,imx8qxp-hifi4</div><div class='ctx'>       - fsl,imx8qm-hifi4</div><div class='ctx'>       - fsl,imx8mp-hifi4</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml<br/>new file mode 100644<br/>index 000000000000..88575da1e6d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek mt8186 DSP core</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tinghan Shen &lt;tinghan.shen@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek mt8186 SoC contains a DSP core used for</div><div class='add'>+  advanced pre- and post- audio processing.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8186-dsp</div><div class='add'>+      - mediatek,mt8188-dsp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address and size of the DSP config registers</div><div class='add'>+      - description: Address and size of the DSP SRAM</div><div class='add'>+      - description: Address and size of the DSP secure registers</div><div class='add'>+      - description: Address and size of the DSP bus registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cfg</div><div class='add'>+      - const: sram</div><div class='add'>+      - const: sec</div><div class='add'>+      - const: bus</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: mux for audio dsp clock</div><div class='add'>+      - description: mux for audio dsp local bus</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: audiodsp</div><div class='add'>+      - const: adsp_bus</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    items:</div><div class='add'>+      - description: mailbox for receiving audio DSP requests.</div><div class='add'>+      - description: mailbox for transmitting requests to audio DSP.</div><div class='add'>+</div><div class='add'>+  mbox-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: dma buffer between host and DSP.</div><div class='add'>+      - description: DSP system memory.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - mbox-names</div><div class='add'>+  - mboxes</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8186-clk.h&gt;</div><div class='add'>+    dsp@10680000 {</div><div class='add'>+        compatible = "mediatek,mt8186-dsp";</div><div class='add'>+        reg = &lt;0x10680000 0x2000&gt;,</div><div class='add'>+              &lt;0x10800000 0x100000&gt;,</div><div class='add'>+              &lt;0x1068b000 0x100&gt;,</div><div class='add'>+              &lt;0x1068f000 0x1000&gt;;</div><div class='add'>+        reg-names = "cfg", "sram", "sec", "bus";</div><div class='add'>+        clocks = &lt;&amp;topckgen CLK_TOP_AUDIODSP&gt;,</div><div class='add'>+                 &lt;&amp;topckgen CLK_TOP_ADSP_BUS&gt;;</div><div class='add'>+        clock-names = "audiodsp",</div><div class='add'>+                      "adsp_bus";</div><div class='add'>+        power-domains = &lt;&amp;spm 6&gt;;</div><div class='add'>+        mbox-names = "rx", "tx";</div><div class='add'>+        mboxes = &lt;&amp;adsp_mailbox0&gt;, &lt;&amp;adsp_mailbox1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml<br/>new file mode 100644<br/>index 000000000000..ca8d8661f872<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/dsp/mediatek,mt8195-dsp.yaml</a></div><div class='hunk'>@@ -0,0 +1,105 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek mt8195 DSP core</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - YC Hung &lt;yc.hung@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Some boards from mt8195 contain a DSP core used for</div><div class='add'>+  advanced pre- and post- audio processing.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8195-dsp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Address and size of the DSP Cfg registers</div><div class='add'>+      - description: Address and size of the DSP SRAM</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cfg</div><div class='add'>+      - const: sram</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: mux for audio dsp clock</div><div class='add'>+      - description: 26M clock</div><div class='add'>+      - description: mux for audio dsp local bus</div><div class='add'>+      - description: default audio dsp local bus clock source</div><div class='add'>+      - description: clock gate for audio dsp clock</div><div class='add'>+      - description: mux for audio dsp access external bus</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: adsp_sel</div><div class='add'>+      - const: clk26m_ck</div><div class='add'>+      - const: audio_local_bus</div><div class='add'>+      - const: mainpll_d7_d2</div><div class='add'>+      - const: scp_adsp_audiodsp</div><div class='add'>+      - const: audio_h</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    items:</div><div class='add'>+      - description: mailbox for receiving audio DSP requests.</div><div class='add'>+      - description: mailbox for transmitting requests to audio DSP.</div><div class='add'>+</div><div class='add'>+  mbox-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: dma buffer between host and DSP.</div><div class='add'>+      - description: DSP system memory.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - memory-region</div><div class='add'>+  - power-domains</div><div class='add'>+  - mbox-names</div><div class='add'>+  - mboxes</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    dsp@10803000 {</div><div class='add'>+       compatible =  "mediatek,mt8195-dsp";</div><div class='add'>+       reg = &lt;0x10803000  0x1000&gt;,</div><div class='add'>+             &lt;0x10840000  0x40000&gt;;</div><div class='add'>+       reg-names = "cfg", "sram";</div><div class='add'>+       clocks = &lt;&amp;topckgen 10&gt;, //CLK_TOP_ADSP</div><div class='add'>+                &lt;&amp;clk26m&gt;,</div><div class='add'>+                &lt;&amp;topckgen 107&gt;, //CLK_TOP_AUDIO_LOCAL_BUS</div><div class='add'>+                &lt;&amp;topckgen 136&gt;, //CLK_TOP_MAINPLL_D7_D2</div><div class='add'>+                &lt;&amp;scp_adsp 0&gt;, //CLK_SCP_ADSP_AUDIODSP</div><div class='add'>+                &lt;&amp;topckgen 34&gt;; //CLK_TOP_AUDIO_H</div><div class='add'>+       clock-names = "adsp_sel",</div><div class='add'>+                     "clk26m_ck",</div><div class='add'>+                     "audio_local_bus",</div><div class='add'>+                     "mainpll_d7_d2",</div><div class='add'>+                     "scp_adsp_audiodsp",</div><div class='add'>+                     "audio_h";</div><div class='add'>+       memory-region = &lt;&amp;adsp_dma_mem_reserved&gt;,</div><div class='add'>+                       &lt;&amp;adsp_mem_reserved&gt;;</div><div class='add'>+       power-domains = &lt;&amp;spm 6&gt;; //MT8195_POWER_DOMAIN_ADSP</div><div class='add'>+       mbox-names = "rx", "tx";</div><div class='add'>+       mboxes = &lt;&amp;adsp_mailbox0&gt;, &lt;&amp;adsp_mailbox1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/edac/dmc-520.yaml b/Documentation/devicetree/bindings/edac/dmc-520.yaml<br/>index 3b6842e92d1b..84db3966662a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/edac/dmc-520.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/edac/dmc-520.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/edac/dmc-520.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/edac/dmc-520.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/edac/dmc-520.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM DMC-520 EDAC bindings</div><div class='add'>+title: ARM DMC-520 EDAC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lei Wang &lt;lewan@microsoft.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt<br/>deleted file mode 100644<br/>index c94acbb8cb0c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/eeprom/at24.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/eeprom/at24.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-This file has been moved to at24.yaml.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml<br/>index 6b61a8cf6137..84af0d5f52aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/eeprom/at24.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/eeprom/at24.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/eeprom/at24.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/eeprom/at24.yaml</a></div><div class='hunk'>@@ -10,6 +10,9 @@ title: I2C EEPROMs compatible with Atmel's AT24</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/nvmem/nvmem.yaml</div><div class='add'>+</div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='hunk'>@@ -120,7 +123,9 @@ properties:</div><div class='ctx'>           - const: giantec,gt24c32a</div><div class='ctx'>           - const: atmel,24c32</div><div class='ctx'>       - items:</div><div class='del'>-          - const: renesas,r1ex24128</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r1ex24128</div><div class='add'>+              - samsung,s524ad0xd1</div><div class='ctx'>           - const: atmel,24c128</div><div class='ctx'> </div><div class='ctx'>   label:</div><div class='hunk'>@@ -181,7 +186,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml<br/>index fbf99e346966..11e2a95a7bcb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/eeprom/at25.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/eeprom/at25.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/eeprom/at25.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/eeprom/at25.yaml</a></div><div class='hunk'>@@ -44,8 +44,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   pagesize:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072]</div><div class='hunk'>@@ -105,6 +103,8 @@ required:</div><div class='ctx'>   - spi-max-frequency</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - $ref: /schemas/nvmem/nvmem.yaml</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -117,12 +117,12 @@ allOf:</div><div class='ctx'>         - size</div><div class='ctx'>         - address-width</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/eeprom-93xx46.yaml b/Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml<br/>index 44fd2f6f0d8a..144e86ce5c0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/eeprom-93xx46.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/eeprom-93xx46.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/misc/eeprom-93xx46.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/eeprom/microchip,93lc46b.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip 93xx46 SPI compatible EEPROM family dt bindings</div><div class='add'>+title: Microchip 93xx46 SPI compatible EEPROM family</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Cory Tusar &lt;cory.tusar@pid1solutions.com&gt;</div><div class='hunk'>@@ -28,9 +28,6 @@ properties:</div><div class='ctx'>     description: chip select of EEPROM</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-  spi-cs-high: true</div><div class='del'>-</div><div class='ctx'>   read-only:</div><div class='ctx'>     description:</div><div class='ctx'>       parameter-less property which disables writes to the EEPROM</div><div class='hunk'>@@ -42,14 +39,17 @@ properties:</div><div class='ctx'>       of EEPROM (e.g. for SPI bus multiplexing)</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - data-size</div><div class='ctx'>   - spi-max-frequency</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - $ref: /schemas/nvmem/nvmem.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml<br/>index 80a28781845d..f4eec4c42fb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/example-schema.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/example-schema.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/example-schema.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/example-schema.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ $id: http://devicetree.org/schemas/example-schema.yaml#</div><div class='ctx'> # $schema is the meta-schema this schema should be validated with.</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: An example schema annotated with jsonschema details</div><div class='add'>+title: An Example Device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='hunk'>@@ -176,6 +176,8 @@ properties:</div><div class='ctx'>     description: Child nodes are just another property from a json-schema</div><div class='ctx'>       perspective.</div><div class='ctx'>     type: object  # DT nodes are json objects</div><div class='add'>+    # Child nodes also need additionalProperties or unevaluatedProperties</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       vendor,a-child-node-property:</div><div class='ctx'>         description: Child node properties have all the same schema</div><div class='hunk'>@@ -249,13 +251,13 @@ examples:</div><div class='ctx'>   # be overridden or an appropriate parent bus node should be shown (such as on</div><div class='ctx'>   # i2c buses).</div><div class='ctx'>   #</div><div class='del'>-  # Any includes used have to be explicitly included.</div><div class='add'>+  # Any includes used have to be explicitly included. Use 4-space indentation.</div><div class='ctx'>   - |</div><div class='ctx'>     node@1000 {</div><div class='del'>-          compatible = "vendor,soc4-ip", "vendor,soc1-ip";</div><div class='del'>-          reg = &lt;0x1000 0x80&gt;,</div><div class='del'>-                &lt;0x3000 0x80&gt;;</div><div class='del'>-          reg-names = "core", "aux";</div><div class='del'>-          interrupts = &lt;10&gt;;</div><div class='del'>-          interrupt-controller;</div><div class='add'>+        compatible = "vendor,soc4-ip", "vendor,soc1-ip";</div><div class='add'>+        reg = &lt;0x1000 0x80&gt;,</div><div class='add'>+              &lt;0x3000 0x80&gt;;</div><div class='add'>+        reg-names = "core", "aux";</div><div class='add'>+        interrupts = &lt;10&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml b/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml<br/>index 2d82b44268db..e00c8072bae9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/extcon/extcon-usbc-cros-ec.yaml</a></div><div class='hunk'>@@ -34,12 +34,13 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>         cros-ec@0 {</div><div class='ctx'>             compatible = "google,cros-ec-spi";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='add'>+            interrupts = &lt;44 0&gt;;</div><div class='ctx'> </div><div class='ctx'>             usbc_extcon0: extcon0 {</div><div class='ctx'>                 compatible = "google,extcon-usbc-cros-ec";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml b/Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml<br/>index 71a9f2e5d0dc..126107dd57b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/extcon/extcon-usbc-tusb320.yaml</a></div><div class='hunk'>@@ -30,7 +30,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>         tusb320@61 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml b/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml<br/>index f9ffe3d6f957..128960545640 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/maxim,max77843.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/maxim,max77843.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/extcon/maxim,max77843.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Maxim MAX77843 MicroUSB and Companion Power Management IC Extcon</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77843 MicroUSB</div><div class='hunk'>@@ -25,7 +25,7 @@ properties:</div><div class='ctx'>     $ref: /schemas/connector/usb-connector.yaml#</div><div class='ctx'> </div><div class='ctx'>   ports:</div><div class='del'>-    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='ctx'>     description:</div><div class='ctx'>       Any connector to the data bus of this controller should be modelled using</div><div class='ctx'>       the OF graph bindings specified</div><div class='head'>diff --git a/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml b/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml<br/>index fd2e55088888..7a224b2f0977 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml</a></div><div class='hunk'>@@ -20,11 +20,12 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - siliconmitus,sm5502-muic</div><div class='ctx'>       - siliconmitus,sm5504-muic</div><div class='add'>+      - siliconmitus,sm5703-muic</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='del'>-    description: I2C slave address of the device. Usually 0x25 for SM5502,</div><div class='del'>-      0x14 for SM5504.</div><div class='add'>+    description: I2C slave address of the device. Usually 0x25 for SM5502</div><div class='add'>+      and SM5703, 0x14 for SM5504.</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/amlogic,meson-gxbb-sm.yaml b/Documentation/devicetree/bindings/firmware/amlogic,meson-gxbb-sm.yaml<br/>new file mode 100644<br/>index 000000000000..8f50e698760e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/amlogic,meson-gxbb-sm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/firmware/amlogic,meson-gxbb-sm.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/firmware/amlogic,meson-gxbb-sm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Secure Monitor (SM)</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  In the Amlogic SoCs the Secure Monitor code is used to provide access to the</div><div class='add'>+  NVMEM, enable JTAG, set USB boot, etc...</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: amlogic,meson-gxbb-sm</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson-gx-sm</div><div class='add'>+          - const: amlogic,meson-gxbb-sm</div><div class='add'>+</div><div class='add'>+  power-controller:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/power/amlogic,meson-sec-pwrc.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    firmware {</div><div class='add'>+        secure-monitor {</div><div class='add'>+            compatible = "amlogic,meson-gxbb-sm";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml<br/>index 948e2a38beed..5824c43e9893 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/arm,scmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/firmware/arm,scmi.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/firmware/arm,scmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: System Control and Management Interface (SCMI) Message Protocol bindings</div><div class='add'>+title: System Control and Management Interface (SCMI) Message Protocol</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sudeep Holla &lt;sudeep.holla@arm.com&gt;</div><div class='hunk'>@@ -56,17 +56,38 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Specifies the mailboxes used to communicate with SCMI compliant</div><div class='ctx'>       firmware.</div><div class='del'>-    items:</div><div class='del'>-      - const: tx</div><div class='del'>-      - const: rx</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: tx</div><div class='add'>+          - const: rx</div><div class='add'>+        minItems: 1</div><div class='add'>+      - items:</div><div class='add'>+          - const: tx</div><div class='add'>+          - const: tx_reply</div><div class='add'>+          - const: rx</div><div class='add'>+        minItems: 2</div><div class='ctx'> </div><div class='ctx'>   mboxes:</div><div class='ctx'>     description:</div><div class='ctx'>       List of phandle and mailbox channel specifiers. It should contain</div><div class='del'>-      exactly one or two mailboxes, one for transmitting messages("tx")</div><div class='del'>-      and another optional for receiving the notifications("rx") if supported.</div><div class='add'>+      exactly one, two or three mailboxes; the first one or two for transmitting</div><div class='add'>+      messages ("tx") and another optional ("rx") for receiving notifications</div><div class='add'>+      and delayed responses, if supported by the platform.</div><div class='add'>+      The number of mailboxes needed for transmitting messages depends on the</div><div class='add'>+      type of channels exposed by the specific underlying mailbox controller;</div><div class='add'>+      one single channel descriptor is enough if such channel is bidirectional,</div><div class='add'>+      while two channel descriptors are needed to represent the SCMI ("tx")</div><div class='add'>+      channel if the underlying mailbox channels are of unidirectional type.</div><div class='add'>+      The effective combination in numbers of mboxes and shmem descriptors let</div><div class='add'>+      the SCMI subsystem determine unambiguosly which type of SCMI channels are</div><div class='add'>+      made available by the underlying mailbox controller and how to use them.</div><div class='add'>+       1 mbox / 1 shmem =&gt; SCMI TX over 1 mailbox bidirectional channel</div><div class='add'>+       2 mbox / 2 shmem =&gt; SCMI TX and RX over 2 mailbox bidirectional channels</div><div class='add'>+       2 mbox / 1 shmem =&gt; SCMI TX over 2 mailbox unidirectional channels</div><div class='add'>+       3 mbox / 2 shmem =&gt; SCMI TX and RX over 3 mailbox unidirectional channels</div><div class='add'>+      Any other combination of mboxes and shmem is invalid.</div><div class='ctx'>     minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   shmem:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -100,7 +121,9 @@ properties:</div><div class='ctx'>       Channel specifier required when using OP-TEE transport.</div><div class='ctx'> </div><div class='ctx'>   protocol@11:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: '#/$defs/protocol-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         const: 0x11</div><div class='hunk'>@@ -112,7 +135,9 @@ properties:</div><div class='ctx'>       - '#power-domain-cells'</div><div class='ctx'> </div><div class='ctx'>   protocol@13:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: '#/$defs/protocol-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         const: 0x13</div><div class='hunk'>@@ -124,7 +149,9 @@ properties:</div><div class='ctx'>       - '#clock-cells'</div><div class='ctx'> </div><div class='ctx'>   protocol@14:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: '#/$defs/protocol-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         const: 0x14</div><div class='hunk'>@@ -136,7 +163,9 @@ properties:</div><div class='ctx'>       - '#clock-cells'</div><div class='ctx'> </div><div class='ctx'>   protocol@15:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: '#/$defs/protocol-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         const: 0x15</div><div class='hunk'>@@ -148,7 +177,9 @@ properties:</div><div class='ctx'>       - '#thermal-sensor-cells'</div><div class='ctx'> </div><div class='ctx'>   protocol@16:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: '#/$defs/protocol-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         const: 0x16</div><div class='hunk'>@@ -160,20 +191,31 @@ properties:</div><div class='ctx'>       - '#reset-cells'</div><div class='ctx'> </div><div class='ctx'>   protocol@17:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: '#/$defs/protocol-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         const: 0x17</div><div class='ctx'> </div><div class='ctx'>       regulators:</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description:</div><div class='ctx'>           The list of all regulators provided by this SCMI controller.</div><div class='ctx'> </div><div class='add'>+        properties:</div><div class='add'>+          '#address-cells':</div><div class='add'>+            const: 1</div><div class='add'>+</div><div class='add'>+          '#size-cells':</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='ctx'>         patternProperties:</div><div class='del'>-          '^regulators@[0-9a-f]+$':</div><div class='add'>+          '^regulator@[0-9a-f]+$':</div><div class='ctx'>             type: object</div><div class='ctx'>             $ref: "../regulator/regulator.yaml#"</div><div class='add'>+            unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>             properties:</div><div class='ctx'>               reg:</div><div class='hunk'>@@ -183,10 +225,18 @@ properties:</div><div class='ctx'>             required:</div><div class='ctx'>               - reg</div><div class='ctx'> </div><div class='add'>+  protocol@18:</div><div class='add'>+    $ref: '#/$defs/protocol-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        const: 0x18</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='del'>-patternProperties:</div><div class='del'>-  '^protocol@[0-9a-f]+$':</div><div class='add'>+$defs:</div><div class='add'>+  protocol-node:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Each sub-node represents a protocol supported. If the platform</div><div class='hunk'>@@ -199,13 +249,20 @@ patternProperties:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='ctx'>       mbox-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: tx</div><div class='del'>-          - const: rx</div><div class='add'>+        oneOf:</div><div class='add'>+          - items:</div><div class='add'>+              - const: tx</div><div class='add'>+              - const: rx</div><div class='add'>+            minItems: 1</div><div class='add'>+          - items:</div><div class='add'>+              - const: tx</div><div class='add'>+              - const: tx_reply</div><div class='add'>+              - const: rx</div><div class='add'>+            minItems: 2</div><div class='ctx'> </div><div class='ctx'>       mboxes:</div><div class='ctx'>         minItems: 1</div><div class='del'>-        maxItems: 2</div><div class='add'>+        maxItems: 3</div><div class='ctx'> </div><div class='ctx'>       shmem:</div><div class='ctx'>         minItems: 1</div><div class='hunk'>@@ -323,6 +380,10 @@ examples:</div><div class='ctx'>                     };</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='add'>+</div><div class='add'>+            scmi_powercap: protocol@18 {</div><div class='add'>+                reg = &lt;0x18&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/arm,scpi.yaml b/Documentation/devicetree/bindings/firmware/arm,scpi.yaml<br/>index 1f9322925e7c..241317239ffc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/arm,scpi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/arm,scpi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/arm,scpi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/firmware/arm,scpi.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/firmware/arm,scpi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: System Control and Power Interface (SCPI) Message Protocol bindings</div><div class='add'>+title: System Control and Power Interface (SCPI) Message Protocol</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sudeep Holla &lt;sudeep.holla@arm.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/fsl,scu.yaml b/Documentation/devicetree/bindings/firmware/fsl,scu.yaml<br/>new file mode 100644<br/>index 000000000000..557e524786c2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/fsl,scu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/firmware/fsl,scu.yaml</a></div><div class='hunk'>@@ -0,0 +1,215 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/firmware/fsl,scu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX System Controller Firmware (SCFW)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The System Controller Firmware (SCFW) is a low-level system function</div><div class='add'>+  which runs on a dedicated Cortex-M core to provide power, clock, and</div><div class='add'>+  resource management. It exists on some i.MX8 processors. e.g. i.MX8QM</div><div class='add'>+  (QM, QP), and i.MX8QX (QXP, DX).</div><div class='add'>+  The AP communicates with the SC using a multi-ported MU module found</div><div class='add'>+  in the LSIO subsystem. The current definition of this MU module provides</div><div class='add'>+  5 remote AP connections to the SC to support up to 5 execution environments</div><div class='add'>+  (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces</div><div class='add'>+  with the LSIO DSC IP bus. The SC firmware will communicate with this MU</div><div class='add'>+  using the MSI bus.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx-scu</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    description:</div><div class='add'>+      Clock controller node that provides the clocks controlled by the SCU</div><div class='add'>+    $ref: /schemas/clock/fsl,scu-clk.yaml</div><div class='add'>+</div><div class='add'>+  gpio:</div><div class='add'>+    description:</div><div class='add'>+      Control the GPIO PINs on SCU domain over the firmware APIs</div><div class='add'>+    $ref: /schemas/gpio/fsl,imx8qxp-sc-gpio.yaml</div><div class='add'>+</div><div class='add'>+  ocotp:</div><div class='add'>+    description:</div><div class='add'>+      OCOTP controller node provided by the SCU</div><div class='add'>+    $ref: /schemas/nvmem/fsl,scu-ocotp.yaml</div><div class='add'>+</div><div class='add'>+  keys:</div><div class='add'>+    description:</div><div class='add'>+      Keys provided by the SCU</div><div class='add'>+    $ref: /schemas/input/fsl,scu-key.yaml</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    description:</div><div class='add'>+      A list of phandles of TX MU channels followed by a list of phandles of</div><div class='add'>+      RX MU channels. The list may include at the end one more optional MU</div><div class='add'>+      channel for general interrupt. The number of expected tx and rx</div><div class='add'>+      channels is 1 TX and 1 RX channels if MU instance is "fsl,imx8-mu-scu"</div><div class='add'>+      compatible, 4 TX and 4 RX channels otherwise. All MU channels must be</div><div class='add'>+      within the same MU instance. Cross instances are not allowed. The MU</div><div class='add'>+      instance can only be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users</div><div class='add'>+      need to ensure that one is used that does not conflict with other</div><div class='add'>+      execution environments such as ATF.</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: TX0 MU channel</div><div class='add'>+          - description: RX0 MU channel</div><div class='add'>+      - items:</div><div class='add'>+          - description: TX0 MU channel</div><div class='add'>+          - description: RX0 MU channel</div><div class='add'>+          - description: optional MU channel for general interrupt</div><div class='add'>+      - items:</div><div class='add'>+          - description: TX0 MU channel</div><div class='add'>+          - description: TX1 MU channel</div><div class='add'>+          - description: TX2 MU channel</div><div class='add'>+          - description: TX3 MU channel</div><div class='add'>+          - description: RX0 MU channel</div><div class='add'>+          - description: RX1 MU channel</div><div class='add'>+          - description: RX2 MU channel</div><div class='add'>+          - description: RX3 MU channel</div><div class='add'>+      - items:</div><div class='add'>+          - description: TX0 MU channel</div><div class='add'>+          - description: TX1 MU channel</div><div class='add'>+          - description: TX2 MU channel</div><div class='add'>+          - description: TX3 MU channel</div><div class='add'>+          - description: RX0 MU channel</div><div class='add'>+          - description: RX1 MU channel</div><div class='add'>+          - description: RX2 MU channel</div><div class='add'>+          - description: RX3 MU channel</div><div class='add'>+          - description: optional MU channel for general interrupt</div><div class='add'>+</div><div class='add'>+  mbox-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: tx0</div><div class='add'>+          - const: rx0</div><div class='add'>+      - items:</div><div class='add'>+          - const: tx0</div><div class='add'>+          - const: rx0</div><div class='add'>+          - const: gip3</div><div class='add'>+      - items:</div><div class='add'>+          - const: tx0</div><div class='add'>+          - const: tx1</div><div class='add'>+          - const: tx2</div><div class='add'>+          - const: tx3</div><div class='add'>+          - const: rx0</div><div class='add'>+          - const: rx1</div><div class='add'>+          - const: rx2</div><div class='add'>+          - const: rx3</div><div class='add'>+      - items:</div><div class='add'>+          - const: tx0</div><div class='add'>+          - const: tx1</div><div class='add'>+          - const: tx2</div><div class='add'>+          - const: tx3</div><div class='add'>+          - const: rx0</div><div class='add'>+          - const: rx1</div><div class='add'>+          - const: rx2</div><div class='add'>+          - const: rx3</div><div class='add'>+          - const: gip3</div><div class='add'>+</div><div class='add'>+  pinctrl:</div><div class='add'>+    description:</div><div class='add'>+      Pin controller provided by the SCU</div><div class='add'>+    $ref: /schemas/pinctrl/fsl,scu-pinctrl.yaml</div><div class='add'>+</div><div class='add'>+  power-controller:</div><div class='add'>+    description:</div><div class='add'>+      Power domains controller node that provides the power domains</div><div class='add'>+      controlled by the SCU</div><div class='add'>+    $ref: /schemas/power/fsl,scu-pd.yaml</div><div class='add'>+</div><div class='add'>+  rtc:</div><div class='add'>+    description:</div><div class='add'>+      RTC controller provided by the SCU</div><div class='add'>+    $ref: /schemas/rtc/fsl,scu-rtc.yaml</div><div class='add'>+</div><div class='add'>+  thermal-sensor:</div><div class='add'>+    description:</div><div class='add'>+      Thermal sensor provided by the SCU</div><div class='add'>+    $ref: /schemas/thermal/fsl,scu-thermal.yaml</div><div class='add'>+</div><div class='add'>+  watchdog:</div><div class='add'>+    description:</div><div class='add'>+      Watchdog controller provided by the SCU</div><div class='add'>+    $ref: /schemas/watchdog/fsl,scu-wdt.yaml</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - mbox-names</div><div class='add'>+  - mboxes</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/pads-imx8qxp.h&gt;</div><div class='add'>+</div><div class='add'>+    firmware {</div><div class='add'>+        system-controller {</div><div class='add'>+            compatible = "fsl,imx-scu";</div><div class='add'>+            mbox-names = "tx0", "tx1", "tx2", "tx3",</div><div class='add'>+                         "rx0", "rx1", "rx2", "rx3",</div><div class='add'>+                         "gip3";</div><div class='add'>+            mboxes = &lt;&amp;lsio_mu1 0 0 &amp;lsio_mu1 0 1 &amp;lsio_mu1 0 2 &amp;lsio_mu1 0 3</div><div class='add'>+                      &amp;lsio_mu1 1 0 &amp;lsio_mu1 1 1 &amp;lsio_mu1 1 2 &amp;lsio_mu1 1 3</div><div class='add'>+                      &amp;lsio_mu1 3 3&gt;;</div><div class='add'>+</div><div class='add'>+            clock-controller {</div><div class='add'>+                compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";</div><div class='add'>+                #clock-cells = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            pinctrl {</div><div class='add'>+                compatible = "fsl,imx8qxp-iomuxc";</div><div class='add'>+</div><div class='add'>+                pinctrl_lpuart0: lpuart0grp {</div><div class='add'>+                    fsl,pins = &lt;</div><div class='add'>+                        IMX8QXP_UART0_RX_ADMA_UART0_RX   0x06000020</div><div class='add'>+                        IMX8QXP_UART0_TX_ADMA_UART0_TX   0x06000020</div><div class='add'>+                    &gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            ocotp {</div><div class='add'>+                compatible = "fsl,imx8qxp-scu-ocotp";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                fec_mac0: mac@2c4 {</div><div class='add'>+                    reg = &lt;0x2c4 6&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            power-controller {</div><div class='add'>+                compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";</div><div class='add'>+                #power-domain-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rtc {</div><div class='add'>+                compatible = "fsl,imx8qxp-sc-rtc";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            keys {</div><div class='add'>+                compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";</div><div class='add'>+                linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            watchdog {</div><div class='add'>+                compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";</div><div class='add'>+                timeout-sec = &lt;60&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            thermal-sensor {</div><div class='add'>+                compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";</div><div class='add'>+                #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/meson/meson_sm.txt b/Documentation/devicetree/bindings/firmware/meson/meson_sm.txt<br/>deleted file mode 100644<br/>index c248cd44f727..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/meson/meson_sm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/meson/meson_sm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-* Amlogic Secure Monitor</div><div class='del'>-</div><div class='del'>-In the Amlogic SoCs the Secure Monitor code is used to provide access to the</div><div class='del'>-NVMEM, enable JTAG, set USB boot, etc...</div><div class='del'>-</div><div class='del'>-Required properties for the secure monitor node:</div><div class='del'>-- compatible: Should be "amlogic,meson-gxbb-sm"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	firmware {</div><div class='del'>-		sm: secure-monitor {</div><div class='del'>-			compatible = "amlogic,meson-gxbb-sm";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt<br/>deleted file mode 100644<br/>index b1cd4ad1889a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/qcom,scm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/qcom,scm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,56 +0,0 @@</div><div class='del'>-QCOM Secure Channel Manager (SCM)</div><div class='del'>-</div><div class='del'>-Qualcomm processors include an interface to communicate to the secure firmware.</div><div class='del'>-This interface allows for clients to request different types of actions.  These</div><div class='del'>-can include CPU power up/down, HDCP requests, loading of firmware, and other</div><div class='del'>-assorted actions.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must contain one of the following:</div><div class='del'>- * "qcom,scm-apq8064"</div><div class='del'>- * "qcom,scm-apq8084"</div><div class='del'>- * "qcom,scm-ipq4019"</div><div class='del'>- * "qcom,scm-ipq806x"</div><div class='del'>- * "qcom,scm-ipq8074"</div><div class='del'>- * "qcom,scm-mdm9607"</div><div class='del'>- * "qcom,scm-msm8226"</div><div class='del'>- * "qcom,scm-msm8660"</div><div class='del'>- * "qcom,scm-msm8916"</div><div class='del'>- * "qcom,scm-msm8953"</div><div class='del'>- * "qcom,scm-msm8960"</div><div class='del'>- * "qcom,scm-msm8974"</div><div class='del'>- * "qcom,scm-msm8994"</div><div class='del'>- * "qcom,scm-msm8996"</div><div class='del'>- * "qcom,scm-msm8998"</div><div class='del'>- * "qcom,scm-sc7180"</div><div class='del'>- * "qcom,scm-sc7280"</div><div class='del'>- * "qcom,scm-sdm845"</div><div class='del'>- * "qcom,scm-sdx55"</div><div class='del'>- * "qcom,scm-sm6350"</div><div class='del'>- * "qcom,scm-sm8150"</div><div class='del'>- * "qcom,scm-sm8250"</div><div class='del'>- * "qcom,scm-sm8350"</div><div class='del'>- * "qcom,scm-sm8450"</div><div class='del'>- and:</div><div class='del'>- * "qcom,scm"</div><div class='del'>-- clocks: Specifies clocks needed by the SCM interface, if any:</div><div class='del'>- * core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660" and</div><div class='del'>-   "qcom,scm-msm8960"</div><div class='del'>- * core, iface and bus clocks required for "qcom,scm-apq8084",</div><div class='del'>-   "qcom,scm-msm8916", "qcom,scm-msm8953" and "qcom,scm-msm8974"</div><div class='del'>-- clock-names: Must contain "core" for the core clock, "iface" for the interface</div><div class='del'>-  clock and "bus" for the bus clock per the requirements of the compatible.</div><div class='del'>-- qcom,dload-mode: phandle to the TCSR hardware block and offset of the</div><div class='del'>-		   download mode control register (optional)</div><div class='del'>-</div><div class='del'>-Example for MSM8916:</div><div class='del'>-</div><div class='del'>-	firmware {</div><div class='del'>-		scm {</div><div class='del'>-			compatible = "qcom,msm8916", "qcom,scm";</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_CRYPTO_CLK&gt; ,</div><div class='del'>-				 &lt;&amp;gcc GCC_CRYPTO_AXI_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_CRYPTO_AHB_CLK&gt;;</div><div class='del'>-			clock-names = "core", "bus", "iface";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml<br/>new file mode 100644<br/>index 000000000000..367d04ad1923<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/qcom,scm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/firmware/qcom,scm.yaml</a></div><div class='hunk'>@@ -0,0 +1,212 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/firmware/qcom,scm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: QCOM Secure Channel Manager (SCM)</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm processors include an interface to communicate to the secure firmware.</div><div class='add'>+  This interface allows for clients to request different types of actions.</div><div class='add'>+  These can include CPU power up/down, HDCP requests, loading of firmware,</div><div class='add'>+  and other assorted actions.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Robert Marko &lt;robimarko@gmail.com&gt;</div><div class='add'>+  - Guru Das Srinagesh &lt;quic_gurus@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,scm-apq8064</div><div class='add'>+          - qcom,scm-apq8084</div><div class='add'>+          - qcom,scm-ipq4019</div><div class='add'>+          - qcom,scm-ipq5332</div><div class='add'>+          - qcom,scm-ipq6018</div><div class='add'>+          - qcom,scm-ipq806x</div><div class='add'>+          - qcom,scm-ipq8074</div><div class='add'>+          - qcom,scm-ipq9574</div><div class='add'>+          - qcom,scm-mdm9607</div><div class='add'>+          - qcom,scm-msm8226</div><div class='add'>+          - qcom,scm-msm8660</div><div class='add'>+          - qcom,scm-msm8916</div><div class='add'>+          - qcom,scm-msm8953</div><div class='add'>+          - qcom,scm-msm8960</div><div class='add'>+          - qcom,scm-msm8974</div><div class='add'>+          - qcom,scm-msm8976</div><div class='add'>+          - qcom,scm-msm8994</div><div class='add'>+          - qcom,scm-msm8996</div><div class='add'>+          - qcom,scm-msm8998</div><div class='add'>+          - qcom,scm-qcm2290</div><div class='add'>+          - qcom,scm-qdu1000</div><div class='add'>+          - qcom,scm-sa8775p</div><div class='add'>+          - qcom,scm-sc7180</div><div class='add'>+          - qcom,scm-sc7280</div><div class='add'>+          - qcom,scm-sc8180x</div><div class='add'>+          - qcom,scm-sc8280xp</div><div class='add'>+          - qcom,scm-sdm670</div><div class='add'>+          - qcom,scm-sdm845</div><div class='add'>+          - qcom,scm-sdx55</div><div class='add'>+          - qcom,scm-sdx65</div><div class='add'>+          - qcom,scm-sm6115</div><div class='add'>+          - qcom,scm-sm6125</div><div class='add'>+          - qcom,scm-sm6350</div><div class='add'>+          - qcom,scm-sm6375</div><div class='add'>+          - qcom,scm-sm8150</div><div class='add'>+          - qcom,scm-sm8250</div><div class='add'>+          - qcom,scm-sm8350</div><div class='add'>+          - qcom,scm-sm8450</div><div class='add'>+          - qcom,scm-sm8550</div><div class='add'>+          - qcom,scm-qcs404</div><div class='add'>+      - const: qcom,scm</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      The wait-queue interrupt that firmware raises as part of handshake</div><div class='add'>+      protocol to handle sleeping SCM calls.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,dload-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR hardware block</div><div class='add'>+          - description: offset of the download mode control register</div><div class='add'>+    description: TCSR hardware block</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  # Clocks</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,scm-apq8064</div><div class='add'>+              - qcom,scm-apq8084</div><div class='add'>+              - qcom,scm-mdm9607</div><div class='add'>+              - qcom,scm-msm8226</div><div class='add'>+              - qcom,scm-msm8660</div><div class='add'>+              - qcom,scm-msm8916</div><div class='add'>+              - qcom,scm-msm8953</div><div class='add'>+              - qcom,scm-msm8960</div><div class='add'>+              - qcom,scm-msm8974</div><div class='add'>+              - qcom,scm-msm8976</div><div class='add'>+              - qcom,scm-qcm2290</div><div class='add'>+              - qcom,scm-sm6375</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names: false</div><div class='add'>+        clocks: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,scm-apq8064</div><div class='add'>+              - qcom,scm-msm8660</div><div class='add'>+              - qcom,scm-msm8960</div><div class='add'>+              - qcom,scm-qcm2290</div><div class='add'>+              - qcom,scm-sm6375</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,scm-apq8084</div><div class='add'>+              - qcom,scm-mdm9607</div><div class='add'>+              - qcom,scm-msm8226</div><div class='add'>+              - qcom,scm-msm8916</div><div class='add'>+              - qcom,scm-msm8953</div><div class='add'>+              - qcom,scm-msm8974</div><div class='add'>+              - qcom,scm-msm8976</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: iface</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+  # Interconnects</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - qcom,scm-qdu1000</div><div class='add'>+                - qcom,scm-sm8450</div><div class='add'>+                - qcom,scm-sm8550</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interconnects: false</div><div class='add'>+</div><div class='add'>+  # Interrupts</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - qcom,scm-sm8450</div><div class='add'>+                - qcom,scm-sm8550</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='add'>+</div><div class='add'>+    firmware {</div><div class='add'>+        scm {</div><div class='add'>+            compatible = "qcom,scm-msm8916", "qcom,scm";</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_CRYPTO_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_CRYPTO_AXI_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_CRYPTO_AHB_CLK&gt;;</div><div class='add'>+            clock-names = "core", "bus", "iface";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml b/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml<br/>index fcf0011b8e6d..3faae3236665 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/firmware/qemu,fw-cfg-mmio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/firmware/qemu,fw-cfg-mmio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: QEMU Firmware Configuration bindings</div><div class='add'>+title: QEMU Firmware Configuration</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt<br/>index 7d3515264838..6694ef29a267 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/fpga-region.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/fpga-region.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/fpga-region.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fpga/fpga-region.txt</a></div><div class='hunk'>@@ -330,7 +330,7 @@ succeeded.</div><div class='ctx'> </div><div class='ctx'> The Device Tree Overlay will contain:</div><div class='ctx'>  * "target-path" or "target"</div><div class='del'>-   The insertion point where the the contents of the overlay will go into the</div><div class='add'>+   The insertion point where the contents of the overlay will go into the</div><div class='ctx'>    live tree.  target-path is a full path, while target is a phandle.</div><div class='ctx'>  * "ranges"</div><div class='ctx'>     The address space mapping from processor to FPGA bus(ses).</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml b/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml<br/>new file mode 100644<br/>index 000000000000..4fb05eb84e2a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/fpga/lattice,sysconfig.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Lattice Slave SPI sysCONFIG FPGA manager</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ivan Bornyakov &lt;i.bornyakov@metrotek.ru&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Lattice sysCONFIG port, which is used for FPGA configuration, among others,</div><div class='add'>+  have Slave Serial Peripheral Interface. Only full reconfiguration is</div><div class='add'>+  supported.</div><div class='add'>+</div><div class='add'>+  Programming of ECP5 is done by writing uncompressed bitstream image in .bit</div><div class='add'>+  format into FPGA's SRAM configuration memory.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - lattice,sysconfig-ecp5</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  program-gpios:</div><div class='add'>+    description:</div><div class='add'>+      A GPIO line connected to PROGRAMN (active low) pin of the device.</div><div class='add'>+      Initiates configuration sequence.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  init-gpios:</div><div class='add'>+    description:</div><div class='add'>+      A GPIO line connected to INITN (active low) pin of the device.</div><div class='add'>+      Indicates that the FPGA is ready to be configured.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  done-gpios:</div><div class='add'>+    description:</div><div class='add'>+      A GPIO line connected to DONE (active high) pin of the device.</div><div class='add'>+      Indicates that the configuration sequence is complete.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: lattice,sysconfig-ecp5</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        spi-max-frequency:</div><div class='add'>+          maximum: 60000000</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        fpga-mgr@0 {</div><div class='add'>+            compatible = "lattice,sysconfig-ecp5";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+            program-gpios = &lt;&amp;gpio3 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            init-gpios = &lt;&amp;gpio3 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            done-gpios = &lt;&amp;gpio3 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml<br/>new file mode 100644<br/>index 000000000000..527532f039ce<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/fpga/microchip,mpf-spi-fpga-mgr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip Polarfire FPGA manager.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ivan Bornyakov &lt;i.bornyakov@metrotek.ru&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Device Tree Bindings for Microchip Polarfire FPGA Manager using slave SPI to</div><div class='add'>+  load the bitstream in .dat format.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - microchip,mpf-spi-fpga-mgr</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: SPI chip select</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            fpga_mgr@0 {</div><div class='add'>+                    compatible = "microchip,mpf-spi-fpga-mgr";</div><div class='add'>+                    spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt b/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt<br/>deleted file mode 100644<br/>index 0acdfa6d62a4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-Xilinx LogiCORE Partial Reconfig Decoupler Softcore</div><div class='del'>-</div><div class='del'>-The Xilinx LogiCORE Partial Reconfig Decoupler manages one or more</div><div class='del'>-decouplers / fpga bridges.</div><div class='del'>-The controller can decouple/disable the bridges which prevents signal</div><div class='del'>-changes from passing through the bridge.  The controller can also</div><div class='del'>-couple / enable the bridges which allows traffic to pass through the</div><div class='del'>-bridge normally.</div><div class='del'>-</div><div class='del'>-Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager</div><div class='del'>-Softcore is compatible with the Xilinx LogiCORE pr-decoupler.</div><div class='del'>-</div><div class='del'>-The Dynamic Function eXchange AXI shutdown manager prevents AXI traffic</div><div class='del'>-from passing through the bridge. The controller safely handles AXI4MM</div><div class='del'>-and AXI4-Lite interfaces on a Reconfigurable Partition when it is</div><div class='del'>-undergoing dynamic reconfiguration, preventing the system deadlock</div><div class='del'>-that can occur if AXI transactions are interrupted by DFX</div><div class='del'>-</div><div class='del'>-The Driver supports only MMIO handling. A PR region can have multiple</div><div class='del'>-PR Decouplers which can be handled independently or chained via decouple/</div><div class='del'>-decouple_status signals.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible		: Should contain "xlnx,pr-decoupler-1.00" followed by</div><div class='del'>-                          "xlnx,pr-decoupler" or</div><div class='del'>-                          "xlnx,dfx-axi-shutdown-manager-1.00" followed by</div><div class='del'>-                          "xlnx,dfx-axi-shutdown-manager"</div><div class='del'>-- regs			: base address and size for decoupler module</div><div class='del'>-- clocks		: input clock to IP</div><div class='del'>-- clock-names		: should contain "aclk"</div><div class='del'>-</div><div class='del'>-See Documentation/devicetree/bindings/fpga/fpga-region.txt and</div><div class='del'>-Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-Partial Reconfig Decoupler:</div><div class='del'>-	fpga-bridge@100000450 {</div><div class='del'>-		compatible = "xlnx,pr-decoupler-1.00",</div><div class='del'>-			     "xlnx-pr-decoupler";</div><div class='del'>-		regs = &lt;0x10000045 0x10&gt;;</div><div class='del'>-		clocks = &lt;&amp;clkc 15&gt;;</div><div class='del'>-		clock-names = "aclk";</div><div class='del'>-		bridge-enable = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Dynamic Function eXchange AXI shutdown manager:</div><div class='del'>-	fpga-bridge@100000450 {</div><div class='del'>-		compatible = "xlnx,dfx-axi-shutdown-manager-1.00",</div><div class='del'>-			     "xlnx,dfx-axi-shutdown-manager";</div><div class='del'>-		regs = &lt;0x10000045 0x10&gt;;</div><div class='del'>-		clocks = &lt;&amp;clkc 15&gt;;</div><div class='del'>-		clock-names = "aclk";</div><div class='del'>-		bridge-enable = &lt;0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt b/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt<br/>deleted file mode 100644<br/>index 5ef659c1394d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xilinx-slave-serial.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-Xilinx Slave Serial SPI FPGA Manager</div><div class='del'>-</div><div class='del'>-Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the</div><div class='del'>-bitstream over what is referred to as "slave serial" interface.</div><div class='del'>-The slave serial link is not technically SPI, and might require extra</div><div class='del'>-circuits in order to play nicely with other SPI slaves on the same bus.</div><div class='del'>-</div><div class='del'>-See:</div><div class='del'>-- https://www.xilinx.com/support/documentation/user_guides/ug380.pdf</div><div class='del'>-- https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf</div><div class='del'>-- https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should contain "xlnx,fpga-slave-serial"</div><div class='del'>-- reg: spi chip select of the FPGA</div><div class='del'>-- prog_b-gpios: config pin (referred to as PROGRAM_B in the manual)</div><div class='del'>-- done-gpios: config status pin (referred to as DONE in the manual)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- init-b-gpios: initialization status and configuration error pin</div><div class='del'>-                (referred to as INIT_B in the manual)</div><div class='del'>-</div><div class='del'>-Example for full FPGA configuration:</div><div class='del'>-</div><div class='del'>-	fpga-region0 {</div><div class='del'>-		compatible = "fpga-region";</div><div class='del'>-		fpga-mgr = &lt;&amp;fpga_mgr_spi&gt;;</div><div class='del'>-		#address-cells = &lt;0x1&gt;;</div><div class='del'>-		#size-cells = &lt;0x1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	spi1: spi@10680 {</div><div class='del'>-		compatible = "marvell,armada-xp-spi", "marvell,orion-spi";</div><div class='del'>-		pinctrl-0 = &lt;&amp;spi0_pins&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		cell-index = &lt;1&gt;;</div><div class='del'>-		interrupts = &lt;92&gt;;</div><div class='del'>-		clocks = &lt;&amp;coreclk 0&gt;;</div><div class='del'>-</div><div class='del'>-		fpga_mgr_spi: fpga-mgr@0 {</div><div class='del'>-			compatible = "xlnx,fpga-slave-serial";</div><div class='del'>-			spi-max-frequency = &lt;60000000&gt;;</div><div class='del'>-			spi-cpha;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			prog_b-gpios = &lt;&amp;gpio0 29 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			init-b-gpios = &lt;&amp;gpio0 28 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			done-gpios = &lt;&amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml b/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml<br/>index 29daca4be47f..f47b6140a742 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fpga/xilinx-zynq-fpga-mgr.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/fpga/xilinx-zynq-fpga-mgr.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx Zynq FPGA Manager Device Tree Bindings</div><div class='add'>+title: Xilinx Zynq FPGA Manager</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml b/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml<br/>new file mode 100644<br/>index 000000000000..614d86ad825f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fpga/xlnx,fpga-slave-serial.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/fpga/xlnx,fpga-slave-serial.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx Slave Serial SPI FPGA</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nava kishore Manne &lt;nava.kishore.manne@amd.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Xilinx Spartan-6 and 7 Series FPGAs support a method of loading the bitstream</div><div class='add'>+  over what is referred to as slave serial interface.The slave serial link is</div><div class='add'>+  not technically SPI, and might require extra circuits in order to play nicely</div><div class='add'>+  with other SPI slaves on the same bus.</div><div class='add'>+</div><div class='add'>+  Datasheets:</div><div class='add'>+    https://www.xilinx.com/support/documentation/user_guides/ug380.pdf</div><div class='add'>+    https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf</div><div class='add'>+    https://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,fpga-slave-serial</div><div class='add'>+</div><div class='add'>+  spi-cpha: true</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 60000000</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  prog_b-gpios:</div><div class='add'>+    description:</div><div class='add'>+      config pin (referred to as PROGRAM_B in the manual)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  done-gpios:</div><div class='add'>+    description:</div><div class='add'>+      config status pin (referred to as DONE in the manual)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  init-b-gpios:</div><div class='add'>+    description:</div><div class='add'>+      initialization status and configuration error pin</div><div class='add'>+      (referred to as INIT_B in the manual)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - prog_b-gpios</div><div class='add'>+  - done-gpios</div><div class='add'>+  - init-b-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      fpga_mgr_spi: fpga-mgr@0 {</div><div class='add'>+        compatible = "xlnx,fpga-slave-serial";</div><div class='add'>+        spi-max-frequency = &lt;60000000&gt;;</div><div class='add'>+        spi-cpha;</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        prog_b-gpios = &lt;&amp;gpio0 29 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        init-b-gpios = &lt;&amp;gpio0 28 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        done-gpios = &lt;&amp;gpio0 9 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml b/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml<br/>new file mode 100644<br/>index 000000000000..a7d4b8e59e19<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fpga/xlnx,pr-decoupler.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/fpga/xlnx,pr-decoupler.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx LogiCORE Partial Reconfig Decoupler/AXI shutdown manager Softcore</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nava kishore Manne &lt;nava.kishore.manne@amd.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Xilinx LogiCORE Partial Reconfig(PR) Decoupler manages one or more</div><div class='add'>+  decouplers/fpga bridges. The controller can decouple/disable the bridges</div><div class='add'>+  which prevents signal changes from passing through the bridge. The controller</div><div class='add'>+  can also couple / enable the bridges which allows traffic to pass through the</div><div class='add'>+  bridge normally.</div><div class='add'>+  Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore</div><div class='add'>+  is compatible with the Xilinx LogiCORE pr-decoupler. The Dynamic Function</div><div class='add'>+  eXchange AXI shutdown manager prevents AXI traffic from passing through the</div><div class='add'>+  bridge. The controller safely handles AXI4MM and AXI4-Lite interfaces on a</div><div class='add'>+  Reconfigurable Partition when it is undergoing dynamic reconfiguration,</div><div class='add'>+  preventing the system deadlock that can occur if AXI transactions are</div><div class='add'>+  interrupted by DFX.</div><div class='add'>+  Please refer to fpga-region.txt and fpga-bridge.txt in this directory for</div><div class='add'>+  common binding part and usage.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: xlnx,pr-decoupler-1.00</div><div class='add'>+          - const: xlnx,pr-decoupler</div><div class='add'>+      - items:</div><div class='add'>+          - const: xlnx,dfx-axi-shutdown-manager-1.00</div><div class='add'>+          - const: xlnx,dfx-axi-shutdown-manager</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    fpga-bridge@100000450 {</div><div class='add'>+      compatible = "xlnx,pr-decoupler-1.00", "xlnx,pr-decoupler";</div><div class='add'>+      reg = &lt;0x10000045 0x10&gt;;</div><div class='add'>+      clocks = &lt;&amp;clkc 15&gt;;</div><div class='add'>+      clock-names = "aclk";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml b/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml<br/>index 6cd2bdc06b5f..00a8d92ff736 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fpga/xlnx,zynqmp-pcap-fpga.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/fpga/xlnx,zynqmp-pcap-fpga.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx Zynq Ultrascale MPSoC FPGA Manager Device Tree Bindings</div><div class='add'>+title: Xilinx Zynq Ultrascale MPSoC FPGA Manager</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nava kishore Manne &lt;navam@xilinx.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml<br/>index 481901269872..02f0b0462377 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml</a></div><div class='hunk'>@@ -44,8 +44,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: fuse</div><div class='ctx'> </div><div class='del'>-  operating-points-v2:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+  operating-points-v2: true</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml b/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml<br/>new file mode 100644<br/>index 000000000000..c21549e0fba6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gnss/brcm,bcm4751.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gnss/brcm,bcm4751.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom BCM4751 family GNSS Receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Johan Hovold &lt;johan@kernel.org&gt;</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Broadcom GPS chips can be used over the UART or I2C bus. The UART</div><div class='add'>+  bus requires CTS/RTS support. The number of the capsule is more</div><div class='add'>+  elaborate than the compatibles BCM4751 may be printed</div><div class='add'>+  BCM4751IFBG for example.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: gnss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - brcm,bcm4751</div><div class='add'>+      - brcm,bcm4752</div><div class='add'>+      - brcm,bcm4753</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      The I2C Address, not required on UART buses.</div><div class='add'>+</div><div class='add'>+  vdd-auxin-supply:</div><div class='add'>+    description:</div><div class='add'>+      Main voltage supply, pin name VDD_AUXIN, typically connected</div><div class='add'>+      directly to a battery such as LiIon 3.8V battery or a 2.6V supply.</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description:</div><div class='add'>+      IO voltage supply, pin name VDDIO, typically 1.8V</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: An optional active low reset line, should be flagged with</div><div class='add'>+      GPIO_ACTIVE_LOW.</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: Enable GPIO line, connected to pins named REGPU or NSTANDBY.</div><div class='add'>+      If the line is active low such as NSTANDBY, it should be tagged</div><div class='add'>+      GPIO_ACTIVE_LOW.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - enable-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    serial {</div><div class='add'>+        gnss {</div><div class='add'>+            compatible = "brcm,bcm4751";</div><div class='add'>+            vdd-auxin-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio0 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;gpio0 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            current-speed = &lt;38400&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gnss/mediatek.txt b/Documentation/devicetree/bindings/gnss/mediatek.txt<br/>deleted file mode 100644<br/>index 80cb802813c5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gnss/mediatek.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/mediatek.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-Mediatek-based GNSS Receiver DT binding</div><div class='del'>-</div><div class='del'>-Mediatek chipsets are used in GNSS-receiver modules produced by several</div><div class='del'>-vendors and can use a UART interface.</div><div class='del'>-</div><div class='del'>-Please see Documentation/devicetree/bindings/gnss/gnss.txt for generic</div><div class='del'>-properties.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	: Must be</div><div class='del'>-</div><div class='del'>-			"globaltop,pa6h"</div><div class='del'>-</div><div class='del'>-- vcc-supply	: Main voltage regulator (pin name: VCC)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- current-speed		: Default UART baud rate</div><div class='del'>-- gnss-fix-gpios	: GPIO used to determine device position fix state</div><div class='del'>-			  (pin name: FIX, 3D_FIX)</div><div class='del'>-- reset-gpios		: GPIO used to reset the device (pin name: RESET, NRESET)</div><div class='del'>-- timepulse-gpios	: Time pulse GPIO (pin name: PPS1, 1PPS)</div><div class='del'>-- vbackup-supply	: Backup voltage regulator (pin name: VBAT, VBACKUP)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-serial@1234 {</div><div class='del'>-	compatible = "ns16550a";</div><div class='del'>-</div><div class='del'>-	gnss {</div><div class='del'>-		compatible = "globaltop,pa6h";</div><div class='del'>-		vcc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gnss/mediatek.yaml b/Documentation/devicetree/bindings/gnss/mediatek.yaml<br/>new file mode 100644<br/>index 000000000000..c0eb35beb2ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gnss/mediatek.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gnss/mediatek.yaml</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gnss/mediatek.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek GNSS Receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Johan Hovold &lt;johan@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Mediatek chipsets are used in GNSS-receiver modules produced by several</div><div class='add'>+  vendors and can use a UART interface.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: gnss-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: globaltop,pa6h</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description:</div><div class='add'>+      Main voltage regulator, pin name VCC.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: An optional reset line, with names such as RESET or NRESET.</div><div class='add'>+      If the line is active low it should be flagged with GPIO_ACTIVE_LOW.</div><div class='add'>+</div><div class='add'>+  timepulse-gpios:</div><div class='add'>+    description: Comes with pin names such as PPS1 or 1PPS.</div><div class='add'>+</div><div class='add'>+  gnss-fix-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO used to determine device position fix state, pin names</div><div class='add'>+      FIX or 3D_FIX.</div><div class='add'>+</div><div class='add'>+  vbackup-supply:</div><div class='add'>+    description:</div><div class='add'>+      Regulator providing backup voltage, pin names such as VBAT or VBACKUP.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - vcc-supply</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    serial {</div><div class='add'>+        gnss {</div><div class='add'>+            compatible = "globaltop,pa6h";</div><div class='add'>+            vcc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gnss/sirfstar.yaml b/Documentation/devicetree/bindings/gnss/sirfstar.yaml<br/>index 991599cdaa6b..0bbe684d82e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gnss/sirfstar.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/sirfstar.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gnss/sirfstar.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gnss/sirfstar.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/gnss/sirfstar.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SiRFstar GNSS Receiver Device Tree Bindings</div><div class='add'>+title: SiRFstar GNSS Receiver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Johan Hovold &lt;johan@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml b/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml<br/>index 35a760cfd343..4835a280b3bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gnss/u-blox,neo-6m.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/gnss/u-blox,neo-6m.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: U-blox GNSS Receiver Device Tree Bindings</div><div class='add'>+title: U-blox GNSS Receiver</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: gnss-common.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml<br/>index 5fe19fa5f67c..c0ad70e66f76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml</a></div><div class='hunk'>@@ -26,14 +26,13 @@ properties:</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'>   registers-number:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: Number of daisy-chained shift registers</div><div class='ctx'> </div><div class='ctx'>   enable-gpios:</div><div class='ctx'>     description: GPIO connected to the OE (Output Enable) pin.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -58,7 +57,10 @@ required:</div><div class='ctx'>   - '#gpio-cells'</div><div class='ctx'>   - registers-number</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/fcs,fxl6408.yaml b/Documentation/devicetree/bindings/gpio/fcs,fxl6408.yaml<br/>new file mode 100644<br/>index 000000000000..65b6970e42fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fcs,fxl6408.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/fcs,fxl6408.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/fcs,fxl6408.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Fairchild FXL6408 I2C GPIO Expander</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Emanuele Ghidoli &lt;emanuele.ghidoli@toradex.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fcs,fxl6408</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$":</div><div class='add'>+    required:</div><div class='add'>+      - gpio-hog</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        gpio_expander_43: gpio-expander@43 {</div><div class='add'>+            compatible = "fcs,fxl6408";</div><div class='add'>+            reg = &lt;0x43&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            gpio-line-names = "Wi-Fi_W_DISABLE", "Wi-Fi_WKUP_WLAN",</div><div class='add'>+                              "PWR_EN_+V3.3_WiFi_N", "PCIe_REF_CLK_EN",</div><div class='add'>+                              "USB_RESET_N", "USB_BYPASS_N", "Wi-Fi_PDn",</div><div class='add'>+                              "Wi-Fi_WKUP_BT";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..b7b32220935d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/fsl,imx8qxp-sc-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/fsl,imx8qxp-sc-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO driver over IMX SCU firmware API</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shenwei Wang &lt;shenwei.wang@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This module provides the standard interface to control the</div><div class='add'>+  resource pins in SCU domain on i.MX8 platforms.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8qxp-sc-gpio</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gpio0: gpio {</div><div class='add'>+        compatible = "fsl,imx8qxp-sc-gpio";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml<br/>index f57d22d1ebd6..ae18603697d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml</a></div><div class='hunk'>@@ -37,6 +37,8 @@ properties:</div><div class='ctx'>               - fsl,imx8mp-gpio</div><div class='ctx'>               - fsl,imx8mq-gpio</div><div class='ctx'>               - fsl,imx8qxp-gpio</div><div class='add'>+              - fsl,imxrt1050-gpio</div><div class='add'>+              - fsl,imxrt1170-gpio</div><div class='ctx'>           - const: fsl,imx35-gpio</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt b/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt<br/>deleted file mode 100644<br/>index bef353f370d8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-Fujitsu MB86S7x GPIO Controller</div><div class='del'>--------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "fujitsu,mb86s70-gpio"</div><div class='del'>-- reg: Base address and length of register space</div><div class='del'>-- clocks: Specify the clock</div><div class='del'>-- gpio-controller: Marks the device node as a gpio controller.</div><div class='del'>-- #gpio-cells: Should be &lt;2&gt;. The first cell is the pin number and the</div><div class='del'>-  second cell is used to specify optional parameters:</div><div class='del'>-   - bit 0 specifies polarity (0 for normal, 1 for inverted).</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-	gpio0: gpio@31000000 {</div><div class='del'>-		compatible = "fujitsu,mb86s70-gpio";</div><div class='del'>-		reg = &lt;0 0x31000000 0x10000&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk 0 2 1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml b/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..d18d95285465<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/fujitsu,mb86s70-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/fujitsu,mb86s70-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Fujitsu MB86S7x GPIO Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jassi Brar &lt;jaswinder.singh@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: socionext,synquacer-gpio</div><div class='add'>+          - const: fujitsu,mb86s70-gpio</div><div class='add'>+      - const: fujitsu,mb86s70-gpio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gpio@31000000 {</div><div class='add'>+        compatible = "fujitsu,mb86s70-gpio";</div><div class='add'>+        reg = &lt;0x31000000 0x10000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk 0 2 1&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-altera.txt b/Documentation/devicetree/bindings/gpio/gpio-altera.txt<br/>index 146e554b3c67..2a80e272cd66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-altera.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-altera.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-altera.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-altera.txt</a></div><div class='hunk'>@@ -9,8 +9,9 @@ Required properties:</div><div class='ctx'>   - The second cell is reserved and is currently unused.</div><div class='ctx'> - gpio-controller : Marks the device node as a GPIO controller.</div><div class='ctx'> - interrupt-controller: Mark the device node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Should be 1. The interrupt type is fixed in the hardware.</div><div class='add'>+- #interrupt-cells : Should be 2. The interrupt type is fixed in the hardware.</div><div class='ctx'>   - The first cell is the GPIO offset number within the GPIO controller.</div><div class='add'>+  - The second cell is the interrupt trigger type and level flags.</div><div class='ctx'> - interrupts: Specify the interrupt.</div><div class='ctx'> - altr,interrupt-type: Specifies the interrupt trigger type the GPIO</div><div class='ctx'>   hardware is synthesized. This field is required if the Altera GPIO controller</div><div class='hunk'>@@ -38,6 +39,6 @@ gpio_altr: gpio@ff200000 {</div><div class='ctx'> 	altr,interrupt-type = &lt;IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> 	#gpio-cells = &lt;2&gt;;</div><div class='ctx'> 	gpio-controller;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='add'>+	#interrupt-cells = &lt;2&gt;;</div><div class='ctx'> 	interrupt-controller;</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-consumer-common.yaml b/Documentation/devicetree/bindings/gpio/gpio-consumer-common.yaml<br/>new file mode 100644<br/>index 000000000000..40d0be31e200<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-consumer-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-consumer-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/gpio-consumer-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Common GPIO lines</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bartosz Golaszewski &lt;brgl@bgdev.pl&gt;</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Pay attention to using proper GPIO flag (e.g. GPIO_ACTIVE_LOW) for the GPIOs</div><div class='add'>+  using inverted signal (e.g. RESETN).</div><div class='add'>+</div><div class='add'>+select: true</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO connected to the enable control pin.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO (or GPIOs for power sequence) connected to the device reset pin</div><div class='add'>+      (e.g. RESET or RESETN).</div><div class='add'>+</div><div class='add'>+  powerdown-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO connected to the power down pin (hardware power down or power cut,</div><div class='add'>+      e.g. PD or PWDN).</div><div class='add'>+</div><div class='add'>+  pwdn-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Use powerdown-gpios</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  wakeup-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO connected to the pin waking up the device from suspend or other</div><div class='add'>+      power-saving modes.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mmc-pwrseq-simple</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reset-gpios:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 32</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reset-gpios:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-davinci.yaml b/Documentation/devicetree/bindings/gpio/gpio-davinci.yaml<br/>index f32e09ef937c..10e56cf306db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-davinci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-davinci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-davinci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-davinci.yaml</a></div><div class='hunk'>@@ -35,7 +35,7 @@ properties:</div><div class='ctx'>   gpio-line-names:</div><div class='ctx'>     description: strings describing the names of each gpio line.</div><div class='ctx'>     minItems: 1</div><div class='del'>-    maxItems: 100</div><div class='add'>+    maxItems: 144</div><div class='ctx'> </div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     const: 2</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt<br/>deleted file mode 100644<br/>index 54040a2bfe3a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-eic-sprd.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,97 +0,0 @@</div><div class='del'>-Spreadtrum EIC controller bindings</div><div class='del'>-</div><div class='del'>-The EIC is the abbreviation of external interrupt controller, which can</div><div class='del'>-be used only in input mode. The Spreadtrum platform has 2 EIC controllers,</div><div class='del'>-one is in digital chip, and another one is in PMIC. The digital chip EIC</div><div class='del'>-controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and</div><div class='del'>-EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-</div><div class='del'>-module.</div><div class='del'>-</div><div class='del'>-The EIC-debounce sub-module provides up to 8 source input signal</div><div class='del'>-connections. A debounce mechanism is used to capture the input signals'</div><div class='del'>-stable status (millisecond resolution) and a single-trigger mechanism</div><div class='del'>-is introduced into this sub-module to enhance the input event detection</div><div class='del'>-reliability. In addition, this sub-module's clock can be shut off</div><div class='del'>-automatically to reduce power dissipation. Moreover the debounce range</div><div class='del'>-is from 1ms to 4s with a step size of 1ms. The input signal will be</div><div class='del'>-ignored if it is asserted for less than 1 ms.</div><div class='del'>-</div><div class='del'>-The EIC-latch sub-module is used to latch some special power down signals</div><div class='del'>-and generate interrupts, since the EIC-latch does not depend on the APB</div><div class='del'>-clock to capture signals.</div><div class='del'>-</div><div class='del'>-The EIC-async sub-module uses a 32kHz clock to capture the short signals</div><div class='del'>-(microsecond resolution) to generate interrupts by level or edge trigger.</div><div class='del'>-</div><div class='del'>-The EIC-sync is similar with GPIO's input function, which is a synchronized</div><div class='del'>-signal input register. It can generate interrupts by level or edge trigger</div><div class='del'>-when detecting input signals.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be one of the following:</div><div class='del'>-  "sprd,sc9860-eic-debounce",</div><div class='del'>-  "sprd,sc9860-eic-latch",</div><div class='del'>-  "sprd,sc9860-eic-async",</div><div class='del'>-  "sprd,sc9860-eic-sync",</div><div class='del'>-  "sprd,sc2731-eic".</div><div class='del'>-- reg: Define the base and range of the I/O address space containing</div><div class='del'>-  the GPIO controller registers.</div><div class='del'>-- gpio-controller: Marks the device node as a GPIO controller.</div><div class='del'>-- #gpio-cells: Should be &lt;2&gt;. The first cell is the gpio number and</div><div class='del'>-  the second cell is used to specify optional parameters.</div><div class='del'>-- interrupt-controller: Marks the device node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: Should be &lt;2&gt;. Specifies the number of cells needed</div><div class='del'>-  to encode interrupt source.</div><div class='del'>-- interrupts: Should be the port interrupt shared by all the gpios.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	eic_debounce: gpio@40210000 {</div><div class='del'>-		compatible = "sprd,sc9860-eic-debounce";</div><div class='del'>-		reg = &lt;0 0x40210000 0 0x80&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eic_latch: gpio@40210080 {</div><div class='del'>-		compatible = "sprd,sc9860-eic-latch";</div><div class='del'>-		reg = &lt;0 0x40210080 0 0x20&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eic_async: gpio@402100a0 {</div><div class='del'>-		compatible = "sprd,sc9860-eic-async";</div><div class='del'>-		reg = &lt;0 0x402100a0 0 0x20&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eic_sync: gpio@402100c0 {</div><div class='del'>-		compatible = "sprd,sc9860-eic-sync";</div><div class='del'>-		reg = &lt;0 0x402100c0 0 0x20&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pmic_eic: gpio@300 {</div><div class='del'>-		compatible = "sprd,sc2731-eic";</div><div class='del'>-		reg = &lt;0x300&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;sc2731_pmic&gt;;</div><div class='del'>-		interrupts = &lt;5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-latch.yaml b/Documentation/devicetree/bindings/gpio/gpio-latch.yaml<br/>new file mode 100644<br/>index 000000000000..1ed82a2cebda<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-latch.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-latch.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/gpio-latch.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO latch controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sascha Hauer &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes a GPIO multiplexer based on latches connected to</div><div class='add'>+  other GPIOs, like this:</div><div class='add'>+</div><div class='add'>+  CLK0 ----------------------.        ,--------.</div><div class='add'>+  CLK1 -------------------.  `--------|&gt;    #0 |</div><div class='add'>+                          |           |        |</div><div class='add'>+  OUT0 ----------------+--|-----------|D0    Q0|-----|&lt;</div><div class='add'>+  OUT1 --------------+-|--|-----------|D1    Q1|-----|&lt;</div><div class='add'>+  OUT2 ------------+-|-|--|-----------|D2    Q2|-----|&lt;</div><div class='add'>+  OUT3 ----------+-|-|-|--|-----------|D3    Q3|-----|&lt;</div><div class='add'>+  OUT4 --------+-|-|-|-|--|-----------|D4    Q4|-----|&lt;</div><div class='add'>+  OUT5 ------+-|-|-|-|-|--|-----------|D5    Q5|-----|&lt;</div><div class='add'>+  OUT6 ----+-|-|-|-|-|-|--|-----------|D6    Q6|-----|&lt;</div><div class='add'>+  OUT7 --+-|-|-|-|-|-|-|--|-----------|D7    Q7|-----|&lt;</div><div class='add'>+         | | | | | | | |  |           `--------'</div><div class='add'>+         | | | | | | | |  |</div><div class='add'>+         | | | | | | | |  |           ,--------.</div><div class='add'>+         | | | | | | | |  `-----------|&gt;    #1 |</div><div class='add'>+         | | | | | | | |              |        |</div><div class='add'>+         | | | | | | | `--------------|D0    Q0|-----|&lt;</div><div class='add'>+         | | | | | | `----------------|D1    Q1|-----|&lt;</div><div class='add'>+         | | | | | `------------------|D2    Q2|-----|&lt;</div><div class='add'>+         | | | | `--------------------|D3    Q3|-----|&lt;</div><div class='add'>+         | | | `----------------------|D4    Q4|-----|&lt;</div><div class='add'>+         | | `------------------------|D5    Q5|-----|&lt;</div><div class='add'>+         | `--------------------------|D6    Q6|-----|&lt;</div><div class='add'>+         `----------------------------|D7    Q7|-----|&lt;</div><div class='add'>+                                      `--------'</div><div class='add'>+</div><div class='add'>+  The number of clk-gpios and latched-gpios is not fixed. The actual number</div><div class='add'>+  of number of latches and the number of inputs per latch is derived from</div><div class='add'>+  the number of GPIOs given in the corresponding device tree properties.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: gpio-latch</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  clk-gpios:</div><div class='add'>+    description: Array of GPIOs to be used to clock a latch</div><div class='add'>+</div><div class='add'>+  latched-gpios:</div><div class='add'>+    description: Array of GPIOs to be used as inputs per latch</div><div class='add'>+</div><div class='add'>+  setup-duration-ns:</div><div class='add'>+    description: Delay in nanoseconds to wait after the latch inputs have been</div><div class='add'>+      set up</div><div class='add'>+</div><div class='add'>+  clock-duration-ns:</div><div class='add'>+    description: Delay in nanoseconds to wait between clock output changes</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - clk-gpios</div><div class='add'>+  - latched-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gpio-latch {</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_di_do_leds&gt;;</div><div class='add'>+        compatible = "gpio-latch";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        setup-duration-ns = &lt;100&gt;;</div><div class='add'>+        clock-duration-ns = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+        clk-gpios = &lt;&amp;gpio3 7 0&gt;, &lt;&amp;gpio3 8 0&gt;;</div><div class='add'>+        latched-gpios = &lt;&amp;gpio3 21 0&gt;, &lt;&amp;gpio3 22 0&gt;,</div><div class='add'>+                       &lt;&amp;gpio3 23 0&gt;, &lt;&amp;gpio3 24 0&gt;,</div><div class='add'>+                       &lt;&amp;gpio3 25 0&gt;, &lt;&amp;gpio3 26 0&gt;,</div><div class='add'>+                       &lt;&amp;gpio3 27 0&gt;, &lt;&amp;gpio3 28 0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt<br/>deleted file mode 100644<br/>index 0fc6700ed800..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-mvebu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,93 +0,0 @@</div><div class='del'>-* Marvell EBU GPIO controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : Should be "marvell,orion-gpio", "marvell,mv78200-gpio",</div><div class='del'>-  "marvell,armadaxp-gpio" or "marvell,armada-8k-gpio".</div><div class='del'>-</div><div class='del'>-    "marvell,orion-gpio" should be used for Orion, Kirkwood, Dove,</div><div class='del'>-    Discovery (except MV78200) and Armada 370. "marvell,mv78200-gpio"</div><div class='del'>-    should be used for the Discovery MV78200.</div><div class='del'>-</div><div class='del'>-    "marvel,armadaxp-gpio" should be used for all Armada XP SoCs</div><div class='del'>-    (MV78230, MV78260, MV78460).</div><div class='del'>-</div><div class='del'>-    "marvell,armada-8k-gpio" should be used for the Armada 7K and 8K</div><div class='del'>-    SoCs (either from AP or CP), see</div><div class='del'>-    Documentation/devicetree/bindings/arm/marvell/ap80x-system-controller.txt</div><div class='del'>-    for specific details about the offset property.</div><div class='del'>-</div><div class='del'>-- reg: Address and length of the register set for the device. Only one</div><div class='del'>-  entry is expected, except for the "marvell,armadaxp-gpio" variant</div><div class='del'>-  for which two entries are expected: one for the general registers,</div><div class='del'>-  one for the per-cpu registers. Not used for marvell,armada-8k-gpio.</div><div class='del'>-</div><div class='del'>-- interrupts: The list of interrupts that are used for all the pins</div><div class='del'>-  managed by this GPIO bank. There can be more than one interrupt</div><div class='del'>-  (example: 1 interrupt per 8 pins on Armada XP, which means 4</div><div class='del'>-  interrupts per bank of 32 GPIOs).</div><div class='del'>-</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. Should be two.</div><div class='del'>-  The first cell is the GPIO number.</div><div class='del'>-  The second cell is used to specify flags:</div><div class='del'>-    bits[3:0] trigger type and level flags:</div><div class='del'>-      1 = low-to-high edge triggered.</div><div class='del'>-      2 = high-to-low edge triggered.</div><div class='del'>-      4 = active high level-sensitive.</div><div class='del'>-      8 = active low level-sensitive.</div><div class='del'>-</div><div class='del'>-- gpio-controller: marks the device node as a gpio controller</div><div class='del'>-</div><div class='del'>-- ngpios: number of GPIOs this controller has</div><div class='del'>-</div><div class='del'>-- #gpio-cells: Should be two. The first cell is the pin number. The</div><div class='del'>-  second cell is reserved for flags, unused at the moment.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-In order to use the GPIO lines in PWM mode, some additional optional</div><div class='del'>-properties are required.</div><div class='del'>-</div><div class='del'>-- compatible: Must contain "marvell,armada-370-gpio"</div><div class='del'>-</div><div class='del'>-- reg: an additional register set is needed, for the GPIO Blink</div><div class='del'>-  Counter on/off registers.</div><div class='del'>-</div><div class='del'>-- reg-names: Must contain an entry "pwm" corresponding to the</div><div class='del'>-  additional register range needed for PWM operation.</div><div class='del'>-</div><div class='del'>-- #pwm-cells: Should be two. The first cell is the GPIO line number. The</div><div class='del'>-  second cell is the period in nanoseconds.</div><div class='del'>-</div><div class='del'>-- clocks: Must be a phandle to the clock for the GPIO controller.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-		gpio0: gpio@d0018100 {</div><div class='del'>-			compatible = "marvell,armadaxp-gpio";</div><div class='del'>-			reg = &lt;0xd0018100 0x40&gt;,</div><div class='del'>-			    &lt;0xd0018800 0x30&gt;;</div><div class='del'>-			ngpios = &lt;32&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			interrupts = &lt;16&gt;, &lt;17&gt;, &lt;18&gt;, &lt;19&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		gpio1: gpio@18140 {</div><div class='del'>-			compatible = "marvell,armada-370-gpio";</div><div class='del'>-			reg = &lt;0x18140 0x40&gt;, &lt;0x181c8 0x08&gt;;</div><div class='del'>-			reg-names = "gpio", "pwm";</div><div class='del'>-			ngpios = &lt;17&gt;;</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-			#pwm-cells = &lt;2&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			interrupts = &lt;87&gt;, &lt;88&gt;, &lt;89&gt;;</div><div class='del'>-			clocks = &lt;&amp;coreclk 0&gt;;</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml<br/>new file mode 100644<br/>index 000000000000..f1bd1e6b2e1f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell EBU GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - marvell,armada-8k-gpio</div><div class='add'>+          - marvell,orion-gpio</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - marvell,mv78200-gpio</div><div class='add'>+              - marvell,armada-370-gpio</div><div class='add'>+          - const: marvell,orion-gpio</div><div class='add'>+</div><div class='add'>+      - description: Deprecated binding</div><div class='add'>+        items:</div><div class='add'>+          - const: marvell,armadaxp-gpio</div><div class='add'>+          - const: marvell,orion-gpio</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: |</div><div class='add'>+      Address and length of the register set for the device. Not used for</div><div class='add'>+      marvell,armada-8k-gpio.</div><div class='add'>+</div><div class='add'>+      A second entry can be provided, for the PWM function using the GPIO Blink</div><div class='add'>+      Counter on/off registers.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: gpio</div><div class='add'>+      - const: pwm</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Offset in the register map for the gpio registers (in bytes)</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: |</div><div class='add'>+      The list of interrupts that are used for all the pins managed by this</div><div class='add'>+      GPIO bank. There can be more than one interrupt (example: 1 interrupt</div><div class='add'>+      per 8 pins on Armada XP, which means 4 interrupts per bank of 32</div><div class='add'>+      GPIOs).</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  ngpios:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  marvell,pwm-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Offset in the register map for the pwm registers (in bytes)</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    description:</div><div class='add'>+      The first cell is the GPIO line number. The second cell is the period</div><div class='add'>+      in nanoseconds.</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      Clock(s) used for PWM function.</div><div class='add'>+    items:</div><div class='add'>+      - description: Core clock</div><div class='add'>+      - description: AXI bus clock</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: axi</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - ngpios</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: marvell,armada-8k-gpio</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - offset</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: true</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gpio@d0018100 {</div><div class='add'>+      compatible = "marvell,armadaxp-gpio", "marvell,orion-gpio";</div><div class='add'>+      reg = &lt;0xd0018100 0x40&gt;, &lt;0xd0018800 0x30&gt;;</div><div class='add'>+      ngpios = &lt;32&gt;;</div><div class='add'>+      gpio-controller;</div><div class='add'>+      #gpio-cells = &lt;2&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      interrupts = &lt;16&gt;, &lt;17&gt;, &lt;18&gt;, &lt;19&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    gpio@18140 {</div><div class='add'>+      compatible = "marvell,armada-370-gpio", "marvell,orion-gpio";</div><div class='add'>+      reg = &lt;0x18140 0x40&gt;, &lt;0x181c8 0x08&gt;;</div><div class='add'>+      reg-names = "gpio", "pwm";</div><div class='add'>+      ngpios = &lt;17&gt;;</div><div class='add'>+      gpio-controller;</div><div class='add'>+      #gpio-cells = &lt;2&gt;;</div><div class='add'>+      #pwm-cells = &lt;2&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+      interrupts = &lt;87&gt;, &lt;88&gt;, &lt;89&gt;;</div><div class='add'>+      clocks = &lt;&amp;coreclk 0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml<br/>index 338c5312a106..5b0134304e51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-pca9570.yaml</a></div><div class='hunk'>@@ -12,7 +12,9 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - dlg,slg7xl45106</div><div class='ctx'>       - nxp,pca9570</div><div class='add'>+      - nxp,pca9571</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -32,7 +34,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml<br/>index dc0fc8fc4839..fa116148ee90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml</a></div><div class='hunk'>@@ -15,51 +15,59 @@ description: |+</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - exar,xra1202</div><div class='del'>-      - maxim,max7310</div><div class='del'>-      - maxim,max7312</div><div class='del'>-      - maxim,max7313</div><div class='del'>-      - maxim,max7315</div><div class='del'>-      - maxim,max7319</div><div class='del'>-      - maxim,max7320</div><div class='del'>-      - maxim,max7321</div><div class='del'>-      - maxim,max7322</div><div class='del'>-      - maxim,max7323</div><div class='del'>-      - maxim,max7324</div><div class='del'>-      - maxim,max7325</div><div class='del'>-      - maxim,max7326</div><div class='del'>-      - maxim,max7327</div><div class='del'>-      - nxp,pca6416</div><div class='del'>-      - nxp,pca9505</div><div class='del'>-      - nxp,pca9506</div><div class='del'>-      - nxp,pca9534</div><div class='del'>-      - nxp,pca9535</div><div class='del'>-      - nxp,pca9536</div><div class='del'>-      - nxp,pca9537</div><div class='del'>-      - nxp,pca9538</div><div class='del'>-      - nxp,pca9539</div><div class='del'>-      - nxp,pca9554</div><div class='del'>-      - nxp,pca9555</div><div class='del'>-      - nxp,pca9556</div><div class='del'>-      - nxp,pca9557</div><div class='del'>-      - nxp,pca9574</div><div class='del'>-      - nxp,pca9575</div><div class='del'>-      - nxp,pca9698</div><div class='del'>-      - nxp,pcal6416</div><div class='del'>-      - nxp,pcal6524</div><div class='del'>-      - nxp,pcal9535</div><div class='del'>-      - nxp,pcal9554b</div><div class='del'>-      - nxp,pcal9555a</div><div class='del'>-      - onnn,cat9554</div><div class='del'>-      - onnn,pca9654</div><div class='del'>-      - ti,pca6107</div><div class='del'>-      - ti,pca9536</div><div class='del'>-      - ti,tca6408</div><div class='del'>-      - ti,tca6416</div><div class='del'>-      - ti,tca6424</div><div class='del'>-      - ti,tca9539</div><div class='del'>-      - ti,tca9554</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: diodes,pi4ioe5v6534q</div><div class='add'>+          - const: nxp,pcal6534</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - exar,xra1202</div><div class='add'>+              - maxim,max7310</div><div class='add'>+              - maxim,max7312</div><div class='add'>+              - maxim,max7313</div><div class='add'>+              - maxim,max7315</div><div class='add'>+              - maxim,max7319</div><div class='add'>+              - maxim,max7320</div><div class='add'>+              - maxim,max7321</div><div class='add'>+              - maxim,max7322</div><div class='add'>+              - maxim,max7323</div><div class='add'>+              - maxim,max7324</div><div class='add'>+              - maxim,max7325</div><div class='add'>+              - maxim,max7326</div><div class='add'>+              - maxim,max7327</div><div class='add'>+              - nxp,pca6408</div><div class='add'>+              - nxp,pca6416</div><div class='add'>+              - nxp,pca9505</div><div class='add'>+              - nxp,pca9506</div><div class='add'>+              - nxp,pca9534</div><div class='add'>+              - nxp,pca9535</div><div class='add'>+              - nxp,pca9536</div><div class='add'>+              - nxp,pca9537</div><div class='add'>+              - nxp,pca9538</div><div class='add'>+              - nxp,pca9539</div><div class='add'>+              - nxp,pca9554</div><div class='add'>+              - nxp,pca9555</div><div class='add'>+              - nxp,pca9556</div><div class='add'>+              - nxp,pca9557</div><div class='add'>+              - nxp,pca9574</div><div class='add'>+              - nxp,pca9575</div><div class='add'>+              - nxp,pca9698</div><div class='add'>+              - nxp,pcal6408</div><div class='add'>+              - nxp,pcal6416</div><div class='add'>+              - nxp,pcal6524</div><div class='add'>+              - nxp,pcal6534</div><div class='add'>+              - nxp,pcal9535</div><div class='add'>+              - nxp,pcal9554b</div><div class='add'>+              - nxp,pcal9555a</div><div class='add'>+              - onnn,cat9554</div><div class='add'>+              - onnn,pca9654</div><div class='add'>+              - ti,pca6107</div><div class='add'>+              - ti,pca9536</div><div class='add'>+              - ti,tca6408</div><div class='add'>+              - ti,tca6416</div><div class='add'>+              - ti,tca6424</div><div class='add'>+              - ti,tca9539</div><div class='add'>+              - ti,tca9554</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -143,7 +151,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -169,7 +177,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -195,7 +203,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c2 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -213,7 +221,7 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='del'>-    i2c3 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt b/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt<br/>index 414a01cdf715..fba3c61f6a5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-pisosr.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-pisosr.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-pisosr.txt</a></div><div class='hunk'>@@ -14,7 +14,7 @@ Optional properties:</div><div class='ctx'>  - ngpios		: Number of used GPIO lines (0..n-1), default is 8.</div><div class='ctx'>  - load-gpios		: GPIO pin specifier attached to load enable, this</div><div class='ctx'> 			  pin is pulsed before reading from the device to</div><div class='del'>-			  load input pin values into the the device.</div><div class='add'>+			  load input pin values into the device.</div><div class='ctx'> </div><div class='ctx'> For other required and optional properties of SPI slave</div><div class='ctx'> nodes please refer to ../spi/spi-bus.txt.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-sprd.txt b/Documentation/devicetree/bindings/gpio/gpio-sprd.txt<br/>deleted file mode 100644<br/>index eca97d45388f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-sprd.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-sprd.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-Spreadtrum GPIO controller bindings</div><div class='del'>-</div><div class='del'>-The controller's registers are organized as sets of sixteen 16-bit</div><div class='del'>-registers with each set controlling a bank of up to 16 pins. A single</div><div class='del'>-interrupt is shared for all of the banks handled by the controller.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "sprd,sc9860-gpio".</div><div class='del'>-- reg: Define the base and range of the I/O address space containing</div><div class='del'>-the GPIO controller registers.</div><div class='del'>-- gpio-controller: Marks the device node as a GPIO controller.</div><div class='del'>-- #gpio-cells: Should be &lt;2&gt;. The first cell is the gpio number and</div><div class='del'>-the second cell is used to specify optional parameters.</div><div class='del'>-- interrupt-controller: Marks the device node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: Should be &lt;2&gt;. Specifies the number of cells needed</div><div class='del'>-to encode interrupt source.</div><div class='del'>-- interrupts: Should be the port interrupt shared by all the gpios.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	ap_gpio: gpio@40280000 {</div><div class='del'>-		compatible = "sprd,sc9860-gpio";</div><div class='del'>-		reg = &lt;0 0x40280000 0 0x1000&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt b/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt<br/>index a0e4cf885213..b33f8f02c0d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-stmpe.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-stmpe.txt</a></div><div class='hunk'>@@ -8,8 +8,7 @@ Optional properties:</div><div class='ctx'>  - st,norequest-mask: bitmask specifying which GPIOs should _not_ be requestable</div><div class='ctx'>    due to different usage (e.g. touch, keypad)</div><div class='ctx'> </div><div class='del'>-Node name must be stmpe_gpio and should be child node of stmpe node to which it</div><div class='del'>-belongs.</div><div class='add'>+Node should be child node of stmpe node to which it belongs.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> 	stmpe_gpio {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-tpic2810.txt b/Documentation/devicetree/bindings/gpio/gpio-tpic2810.txt<br/>deleted file mode 100644<br/>index 1afc2de7a537..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-tpic2810.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-tpic2810.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-TPIC2810 GPIO controller bindings</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible		: Should be "ti,tpic2810".</div><div class='del'>- - reg			: The I2C address of the device</div><div class='del'>- - gpio-controller	: Marks the device node as a GPIO controller.</div><div class='del'>- - #gpio-cells		: Should be two. For consumer use see gpio.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	gpio@60 {</div><div class='del'>-		compatible = "ti,tpic2810";</div><div class='del'>-		reg = &lt;0x60&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-tpic2810.yaml b/Documentation/devicetree/bindings/gpio/gpio-tpic2810.yaml<br/>new file mode 100644<br/>index 000000000000..157969bc4c46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-tpic2810.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-tpic2810.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/gpio-tpic2810.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TPIC2810 GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Aswath Govindraju &lt;a-govindraju@ti.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,tpic2810</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        gpio@60 {</div><div class='add'>+            compatible = "ti,tpic2810";</div><div class='add'>+            reg = &lt;0x60&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            gpio-line-names = "LED A", "LED B", "LED C";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt<br/>deleted file mode 100644<br/>index e506f30e1a95..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-xilinx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-Xilinx plb/axi GPIO controller</div><div class='del'>-</div><div class='del'>-Dual channel GPIO controller with configurable number of pins</div><div class='del'>-(from 1 to 32 per channel). Every pin can be configured as</div><div class='del'>-input/output/tristate. Both channels share the same global IRQ but</div><div class='del'>-local interrupts can be enabled on channel basis.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "xlnx,xps-gpio-1.00.a"</div><div class='del'>-- reg : Address and length of the register set for the device</div><div class='del'>-- #gpio-cells : Should be two. The first cell is the pin number and the</div><div class='del'>-  second cell is used to specify optional parameters (currently unused).</div><div class='del'>-- gpio-controller : Marks the device node as a GPIO controller.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks : Input clock specifier. Refer to common clock bindings.</div><div class='del'>-- interrupts : Interrupt mapping for GPIO IRQ.</div><div class='del'>-- xlnx,all-inputs : if n-th bit is setup, GPIO-n is input</div><div class='del'>-- xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1</div><div class='del'>-- xlnx,gpio-width : gpio width</div><div class='del'>-- xlnx,tri-default : if n-th bit is 1, GPIO-n is in tristate mode</div><div class='del'>-- xlnx,is-dual : if 1, controller also uses the second channel</div><div class='del'>-- xlnx,all-inputs-2 : as above but for the second channel</div><div class='del'>-- xlnx,dout-default-2 : as above but the second channel</div><div class='del'>-- xlnx,gpio2-width : as above but for the second channel</div><div class='del'>-- xlnx,tri-default-2 : as above but for the second channel</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-gpio: gpio@40000000 {</div><div class='del'>-	#gpio-cells = &lt;2&gt;;</div><div class='del'>-	compatible = "xlnx,xps-gpio-1.00.a";</div><div class='del'>-	clocks = &lt;&amp;clkc25&gt;;</div><div class='del'>-	gpio-controller ;</div><div class='del'>-	interrupt-parent = &lt;&amp;microblaze_0_intc&gt;;</div><div class='del'>-	interrupts = &lt; 6 2 &gt;;</div><div class='del'>-	reg = &lt; 0x40000000 0x10000 &gt;;</div><div class='del'>-	xlnx,all-inputs = &lt;0x0&gt;;</div><div class='del'>-	xlnx,all-inputs-2 = &lt;0x0&gt;;</div><div class='del'>-	xlnx,dout-default = &lt;0x0&gt;;</div><div class='del'>-	xlnx,dout-default-2 = &lt;0x0&gt;;</div><div class='del'>-	xlnx,gpio-width = &lt;0x2&gt;;</div><div class='del'>-	xlnx,gpio2-width = &lt;0x2&gt;;</div><div class='del'>-	xlnx,interrupt-present = &lt;0x1&gt;;</div><div class='del'>-	xlnx,is-dual = &lt;0x1&gt;;</div><div class='del'>-	xlnx,tri-default = &lt;0xffffffff&gt;;</div><div class='del'>-	xlnx,tri-default-2 = &lt;0xffffffff&gt;;</div><div class='del'>-} ;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml b/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml<br/>index 378da2649e66..572e1718f501 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio-zynq.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio-zynq.yaml</a></div><div class='hunk'>@@ -4,14 +4,18 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/gpio/gpio-zynq.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx Zynq GPIO controller Device Tree Bindings</div><div class='add'>+title: Xilinx Zynq GPIO controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: xlnx,zynq-gpio-1.0</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,zynq-gpio-1.0</div><div class='add'>+      - xlnx,zynqmp-gpio-1.0</div><div class='add'>+      - xlnx,versal-gpio-1.0</div><div class='add'>+      - xlnx,pmc-gpio-1.0</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -24,6 +28,11 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='add'>+  gpio-line-names:</div><div class='add'>+    description: strings describing the names of each gpio line</div><div class='add'>+    minItems: 58</div><div class='add'>+    maxItems: 174</div><div class='add'>+</div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='ctx'>   "#interrupt-cells":</div><div class='hunk'>@@ -32,6 +41,54 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - xlnx,zynqmp-gpio-1.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 174</div><div class='add'>+          maxItems: 174</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - xlnx,zynq-gpio-1.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 118</div><div class='add'>+          maxItems: 118</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - xlnx,versal-gpio-1.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 58</div><div class='add'>+          maxItems: 58</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - xlnx,pmc-gpio-1.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 116</div><div class='add'>+          maxItems: 116</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/gpio.txt b/Documentation/devicetree/bindings/gpio/gpio.txt<br/>index 5663e71b751f..d82c32217fff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/gpio.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/gpio.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/gpio.txt</a></div><div class='hunk'>@@ -154,18 +154,35 @@ of the GPIOs that can't be used.</div><div class='ctx'> </div><div class='ctx'> Optionally, a GPIO controller may have a "gpio-line-names" property. This is</div><div class='ctx'> an array of strings defining the names of the GPIO lines going out of the</div><div class='del'>-GPIO controller. This name should be the most meaningful producer name</div><div class='del'>-for the system, such as a rail name indicating the usage. Package names</div><div class='del'>-such as pin name are discouraged: such lines have opaque names (since they</div><div class='del'>-are by definition generic purpose) and such names are usually not very</div><div class='del'>-helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are</div><div class='del'>-reasonable line names as they describe what the line is used for. "GPIO0"</div><div class='del'>-is not a good name to give to a GPIO line. Placeholders are discouraged:</div><div class='del'>-rather use the "" (blank string) if the use of the GPIO line is undefined</div><div class='del'>-in your design. The names are assigned starting from line offset 0 from</div><div class='del'>-left to right from the passed array. An incomplete array (where the number</div><div class='del'>-of passed named are less than ngpios) will still be used up until the last</div><div class='del'>-provided valid line index.</div><div class='add'>+GPIO controller.</div><div class='add'>+</div><div class='add'>+For lines which are routed to on-board devices, this name should be</div><div class='add'>+the most meaningful producer name for the system, such as a rail name</div><div class='add'>+indicating the usage. Package names, such as a pin name, are discouraged:</div><div class='add'>+such lines have opaque names (since they are by definition general-purpose)</div><div class='add'>+and such names are usually not very helpful. For example "MMC-CD", "Red LED</div><div class='add'>+Vdd" and "ethernet reset" are reasonable line names as they describe what</div><div class='add'>+the line is used for. "GPIO0" is not a good name to give to a GPIO line</div><div class='add'>+that is hard-wired to a specific device.</div><div class='add'>+</div><div class='add'>+However, in the case of lines that are routed to a general purpose header</div><div class='add'>+(e.g. the Raspberry Pi 40-pin header), and therefore are not hard-wired to</div><div class='add'>+specific devices, using a pin number or the names on the header is fine</div><div class='add'>+provided these are real (preferably unique) names. Using an SoC's pad name</div><div class='add'>+or package name, or names made up from kernel-internal software constructs,</div><div class='add'>+are strongly discouraged. For example "pin8 [gpio14/uart0_txd]" is fine</div><div class='add'>+if the board's documentation labels pin 8 as such. However "PortB_24" (an</div><div class='add'>+example of a name from an SoC's reference manual) would not be desirable.</div><div class='add'>+</div><div class='add'>+In either case placeholders are discouraged: rather use the "" (blank</div><div class='add'>+string) if the use of the GPIO line is undefined in your design. Ideally,</div><div class='add'>+try to add comments to the dts file describing the naming the convention</div><div class='add'>+you have chosen, and specifying from where the names are derived.</div><div class='add'>+</div><div class='add'>+The names are assigned starting from line offset 0, from left to right,</div><div class='add'>+from the passed array. An incomplete array (where the number of passed</div><div class='add'>+names is less than ngpios) will be used up until the last provided valid</div><div class='add'>+line index.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml b/Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..735d97d645a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/hisilicon,ascend910-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/hisilicon,ascend910-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HiSilicon common GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jay Fang &lt;f.fangjian@huawei.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The HiSilicon common GPIO controller can be used for many different</div><div class='add'>+  types of SoC such as Huawei Ascend AI series chips.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: hisilicon,ascend910-gpio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  ngpios:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - ngpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    gpio@840d0000 {</div><div class='add'>+      compatible = "hisilicon,ascend910-gpio";</div><div class='add'>+      reg = &lt;0x840d0000 0x1000&gt;;</div><div class='add'>+      ngpios = &lt;32&gt;;</div><div class='add'>+      gpio-controller;</div><div class='add'>+      #gpio-cells = &lt;2&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml b/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..fb86e8ce6349<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/loongson,ls-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/loongson,ls-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson GPIO controller.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - loongson,ls2k-gpio</div><div class='add'>+      - loongson,ls7a-gpio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ngpios:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 64</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 64</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - ngpios</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - gpio-ranges</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    gpio0: gpio@1fe00500 {</div><div class='add'>+      compatible = "loongson,ls2k-gpio";</div><div class='add'>+      reg = &lt;0x1fe00500 0x38&gt;;</div><div class='add'>+      ngpios = &lt;64&gt;;</div><div class='add'>+      #gpio-cells = &lt;2&gt;;</div><div class='add'>+      gpio-controller;</div><div class='add'>+      gpio-ranges = &lt;&amp;pctrl 0 0 15&gt;,</div><div class='add'>+                    &lt;&amp;pctrl 16 16 15&gt;,</div><div class='add'>+                    &lt;&amp;pctrl 32 32 10&gt;,</div><div class='add'>+                    &lt;&amp;pctrl 44 44 20&gt;;</div><div class='add'>+      interrupt-parent = &lt;&amp;liointc1&gt;;</div><div class='add'>+      interrupts = &lt;28 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;29 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;30 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;30 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;26 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;&gt;,</div><div class='add'>+                   &lt;&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                   &lt;27 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/loongson,ls1x-gpio.yaml b/Documentation/devicetree/bindings/gpio/loongson,ls1x-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..1a472c05697c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/loongson,ls1x-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/loongson,ls1x-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/loongson,ls1x-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson-1 GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: loongson,ls1x-gpio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  ngpios:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - ngpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gpio0: gpio@1fd010c0 {</div><div class='add'>+        compatible = "loongson,ls1x-gpio";</div><div class='add'>+        reg = &lt;0x1fd010c0 0x4&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        ngpios = &lt;32&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml b/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml<br/>index 110651eafa70..d481e78958a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/gpio/microchip,mpfs-gpio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip MPFS GPIO Controller Device Tree Bindings</div><div class='add'>+title: Microchip MPFS GPIO Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Conor Dooley &lt;conor.dooley@microchip.com&gt;</div><div class='hunk'>@@ -44,6 +44,24 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='add'>+patternProperties:</div><div class='add'>+  "^.+-hog(-[0-9]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      gpio-hog: true</div><div class='add'>+      gpios: true</div><div class='add'>+      input: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+      line-name: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - gpio-hog</div><div class='add'>+      - gpios</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml b/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml<br/>index f0ff66c4c74e..3718103e966a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/nxp,pcf8575.yaml</a></div><div class='hunk'>@@ -39,6 +39,10 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  gpio-line-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16</div><div class='add'>+</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='ctx'>   '#gpio-cells':</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml b/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml<br/>index 100f20cebd76..39fd959c45d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/realtek,otto-gpio.yaml</a></div><div class='hunk'>@@ -28,10 +28,11 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - realtek,rtl8380-gpio</div><div class='ctx'>           - realtek,rtl8390-gpio</div><div class='add'>+          - realtek,rtl9300-gpio</div><div class='add'>+          - realtek,rtl9310-gpio</div><div class='ctx'>       - const: realtek,otto-gpio</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  reg: true</div><div class='ctx'> </div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     const: 2</div><div class='hunk'>@@ -50,6 +51,23 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: realtek,rtl9300-gpio</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    reg:</div><div class='add'>+      items:</div><div class='add'>+        - description: GPIO and interrupt control</div><div class='add'>+        - description: interrupt CPU map</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    reg:</div><div class='add'>+      items:</div><div class='add'>+        - description: GPIO and interrupt control</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -74,5 +92,17 @@ examples:</div><div class='ctx'>         interrupt-parent = &lt;&amp;rtlintc&gt;;</div><div class='ctx'>         interrupts = &lt;23&gt;;</div><div class='ctx'>       };</div><div class='add'>+  - |</div><div class='add'>+      gpio@3300 {</div><div class='add'>+        compatible = "realtek,rtl9300-gpio", "realtek,otto-gpio";</div><div class='add'>+        reg = &lt;0x3300 0x1c&gt;, &lt;0x3338 0x8&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        ngpios = &lt;24&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;rtlintc&gt;;</div><div class='add'>+        interrupts = &lt;13&gt;;</div><div class='add'>+      };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml<br/>index f2541739ee3b..aa424e2b95f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml</a></div><div class='hunk'>@@ -49,7 +49,11 @@ properties:</div><div class='ctx'>           - const: renesas,rcar-gen3-gpio # R-Car Gen3 or RZ/G2</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='del'>-          - const: renesas,gpio-r8a779a0  # R-Car V3U</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,gpio-r8a779a0     # R-Car V3U</div><div class='add'>+              - renesas,gpio-r8a779f0     # R-Car S4-8</div><div class='add'>+              - renesas,gpio-r8a779g0     # R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-gpio # R-Car Gen4</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml b/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml<br/>index d4e42c2b995b..affd823c881d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/rockchip,gpio-bank.yaml</a></div><div class='hunk'>@@ -27,6 +27,8 @@ properties:</div><div class='ctx'>       - description: APB interface clock source</div><div class='ctx'>       - description: GPIO debounce reference clock source</div><div class='ctx'> </div><div class='add'>+  gpio-ranges: true</div><div class='add'>+</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='ctx'>   gpio-line-names: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml b/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml<br/>index 939e31c48081..fc095646adea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/sifive,gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/sifive,gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/sifive,gpio.yaml</a></div><div class='hunk'>@@ -46,6 +46,10 @@ properties:</div><div class='ctx'>     maximum: 32</div><div class='ctx'>     default: 16</div><div class='ctx'> </div><div class='add'>+  gpio-line-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 32</div><div class='add'>+</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml b/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml<br/>index bcafa494ed7a..228fa27ffdc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml</a></div><div class='hunk'>@@ -52,6 +52,23 @@ properties:</div><div class='ctx'>       &lt;child-interrupt-base parent-interrupt-base length&gt; triplets.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'> </div><div class='add'>+patternProperties:</div><div class='add'>+  "^.+-hog(-[0-9]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      gpio-hog: true</div><div class='add'>+      gpios: true</div><div class='add'>+      input: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+      line-name: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - gpio-hog</div><div class='add'>+      - gpios</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml<br/>new file mode 100644<br/>index 000000000000..99fcf970773a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Unisoc Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Unisoc EIC controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='add'>+  - Baolin Wang &lt;baolin.wang7@gmail.com&gt;</div><div class='add'>+  - Chunyan Zhang &lt;zhang.lyra@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The EIC is the abbreviation of external interrupt controller, which can</div><div class='add'>+  be used only in input mode. The Spreadtrum platform has 2 EIC controllers,</div><div class='add'>+  one is in digital chip, and another one is in PMIC. The digital chip EIC</div><div class='add'>+  controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and</div><div class='add'>+  EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-</div><div class='add'>+  module.</div><div class='add'>+</div><div class='add'>+  The EIC-debounce sub-module provides up to 8 source input signal</div><div class='add'>+  connections. A debounce mechanism is used to capture the input signals'</div><div class='add'>+  stable status (millisecond resolution) and a single-trigger mechanism</div><div class='add'>+  is introduced into this sub-module to enhance the input event detection</div><div class='add'>+  reliability. In addition, this sub-module's clock can be shut off</div><div class='add'>+  automatically to reduce power dissipation. Moreover the debounce range</div><div class='add'>+  is from 1ms to 4s with a step size of 1ms. The input signal will be</div><div class='add'>+  ignored if it is asserted for less than 1 ms.</div><div class='add'>+</div><div class='add'>+  The EIC-latch sub-module is used to latch some special power down signals</div><div class='add'>+  and generate interrupts, since the EIC-latch does not depend on the APB</div><div class='add'>+  clock to capture signals.</div><div class='add'>+</div><div class='add'>+  The EIC-async sub-module uses a 32kHz clock to capture the short signals</div><div class='add'>+  (microsecond resolution) to generate interrupts by level or edge trigger.</div><div class='add'>+</div><div class='add'>+  The EIC-sync is similar with GPIO's input function, which is a synchronized</div><div class='add'>+  signal input register. It can generate interrupts by level or edge trigger</div><div class='add'>+  when detecting input signals.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - sprd,sc9860-eic-debounce</div><div class='add'>+          - sprd,sc9860-eic-latch</div><div class='add'>+          - sprd,sc9860-eic-async</div><div class='add'>+          - sprd,sc9860-eic-sync</div><div class='add'>+          - sprd,sc2731-eic</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sprd,ums512-eic-debounce</div><div class='add'>+          - const: sprd,sc9860-eic-debounce</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sprd,ums512-eic-latch</div><div class='add'>+          - const: sprd,sc9860-eic-latch</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sprd,ums512-eic-async</div><div class='add'>+          - const: sprd,sc9860-eic-async</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sprd,ums512-eic-sync</div><div class='add'>+          - const: sprd,sc9860-eic-sync</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sprd,sc2730-eic</div><div class='add'>+          - const: sprd,sc2731-eic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+    description:</div><div class='add'>+      EIC controller can support maximum 3 banks which has its own</div><div class='add'>+      address base.</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      The interrupt shared by all GPIO lines for this controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        eic_debounce: gpio@40210000 {</div><div class='add'>+            compatible = "sprd,sc9860-eic-debounce";</div><div class='add'>+            reg = &lt;0 0x40210000 0 0x80&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml<br/>new file mode 100644<br/>index 000000000000..483168838128<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/sprd,gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/sprd,gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Unisoc Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/sprd,gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Unisoc GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='add'>+  - Baolin Wang &lt;baolin.wang7@gmail.com&gt;</div><div class='add'>+  - Chunyan Zhang &lt;zhang.lyra@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The controller's registers are organized as sets of sixteen 16-bit</div><div class='add'>+  registers with each set controlling a bank of up to 16 pins. A single</div><div class='add'>+  interrupt is shared for all of the banks handled by the controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: sprd,sc9860-gpio</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sprd,ums512-gpio</div><div class='add'>+          - const: sprd,sc9860-gpio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: The interrupt shared by all GPIO lines for this controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        ap_gpio: gpio@40280000 {</div><div class='add'>+            compatible = "sprd,sc9860-gpio";</div><div class='add'>+            reg = &lt;0 0x40280000 0 0x1000&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml b/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml<br/>index 7087e4a5013f..bd721c839059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/ti,omap-gpio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: OMAP GPIO controller bindings</div><div class='add'>+title: OMAP GPIO controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml b/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml<br/>index 0f628b088cec..31906c253940 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/x-powers,axp209-gpio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/gpio/x-powers,axp209-gpio.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: X-Powers AXP209 GPIO Device Tree Bindings</div><div class='add'>+title: X-Powers AXP209 GPIO</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -19,8 +19,14 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - x-powers,axp209-gpio</div><div class='add'>+          - x-powers,axp221-gpio</div><div class='ctx'>           - x-powers,axp813-gpio</div><div class='ctx'>       - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - x-powers,axp223-gpio</div><div class='add'>+              - x-powers,axp809-gpio</div><div class='add'>+          - const: x-powers,axp221-gpio</div><div class='add'>+      - items:</div><div class='ctx'>           - const: x-powers,axp803-gpio</div><div class='ctx'>           - const: x-powers,axp813-gpio</div><div class='ctx'> </div><div class='hunk'>@@ -29,6 +35,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*-pins?$":</div><div class='ctx'>     $ref: /schemas/pinctrl/pinmux-node.yaml#</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml b/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml<br/>new file mode 100644<br/>index 000000000000..f333ee2288e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpio/xlnx,gpio-xilinx.yaml</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpio/xlnx,gpio-xilinx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx AXI GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neeli Srinivas &lt;srinivas.neeli@xilinx.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The AXI GPIO design provides a general purpose input/output interface</div><div class='add'>+  to an AXI4-Lite interface. The AXI GPIO can be configured as either</div><div class='add'>+  a single or a dual-channel device. The width of each channel is</div><div class='add'>+  independently configurable. The channels can be configured to</div><div class='add'>+  generate an interrupt when a transition on any of their inputs occurs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,xps-gpio-1.00.a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    description: strings describing the names of each gpio line</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 64</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names: true</div><div class='add'>+</div><div class='add'>+  xlnx,all-inputs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This option sets this GPIO channel1 bits in input mode.</div><div class='add'>+</div><div class='add'>+  xlnx,all-inputs-2:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This option sets this GPIO channel2 bits in input mode.</div><div class='add'>+</div><div class='add'>+  xlnx,all-outputs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This option sets this GPIO channel1 bits in output mode.</div><div class='add'>+</div><div class='add'>+  xlnx,all-outputs-2:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This option sets this GPIO channel2 bits in output mode.</div><div class='add'>+</div><div class='add'>+  xlnx,dout-default:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Sets the default value of all the enabled bits of</div><div class='add'>+                 channel1.</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  xlnx,dout-default-2:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Sets the default value of all the enabled bits of</div><div class='add'>+                 channel2.</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  xlnx,gpio-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: The value defines the bit width of the GPIO channel1.</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+    default: 32</div><div class='add'>+</div><div class='add'>+  xlnx,gpio2-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: The value defines the bit width of the GPIO channel2.</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+    default: 32</div><div class='add'>+</div><div class='add'>+  xlnx,interrupt-present:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This parameter enables interrupt control logic</div><div class='add'>+                 and interrupt registers in GPIO module.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  xlnx,is-dual:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This parameter enables a second GPIO channel (GPIO2).</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  xlnx,tri-default:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This value configures the input or output mode</div><div class='add'>+                 of each bit of GPIO channel1.</div><div class='add'>+</div><div class='add'>+  xlnx,tri-default-2:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: This value configures the input or output mode</div><div class='add'>+                 of each bit of GPIO channel2.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - compatible</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+        gpio@e000a000 {</div><div class='add'>+            compatible = "xlnx,xps-gpio-1.00.a";</div><div class='add'>+            reg = &lt;0xa0020000 0x10000&gt;;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            #interrupt-cells = &lt;0x2&gt;;</div><div class='add'>+            clocks = &lt;&amp;zynqmp_clk 71&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            interrupt-names = "ip2intc_irpt";</div><div class='add'>+            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+            interrupts = &lt;0 89 4&gt;;</div><div class='add'>+            xlnx,all-inputs = &lt;0x0&gt;;</div><div class='add'>+            xlnx,all-inputs-2 = &lt;0x0&gt;;</div><div class='add'>+            xlnx,all-outputs = &lt;0x0&gt;;</div><div class='add'>+            xlnx,all-outputs-2 = &lt;0x0&gt;;</div><div class='add'>+            xlnx,dout-default = &lt;0x0&gt;;</div><div class='add'>+            xlnx,dout-default-2 = &lt;0x0&gt;;</div><div class='add'>+            xlnx,gpio-width = &lt;0x20&gt;;</div><div class='add'>+            xlnx,gpio2-width = &lt;0x20&gt;;</div><div class='add'>+            xlnx,interrupt-present = &lt;0x1&gt;;</div><div class='add'>+            xlnx,is-dual = &lt;0x1&gt;;</div><div class='add'>+            xlnx,tri-default = &lt;0xFFFFFFFF&gt;;</div><div class='add'>+            xlnx,tri-default-2 = &lt;0xFFFFFFFF&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml<br/>index 4d6bfae0653c..0400a361875d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml</a></div><div class='hunk'>@@ -14,15 +14,28 @@ properties:</div><div class='ctx'>     pattern: '^gpu@[a-f0-9]+$'</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - amlogic,meson-g12a-mali</div><div class='del'>-          - mediatek,mt8183-mali</div><div class='del'>-          - realtek,rtd1619-mali</div><div class='del'>-          - renesas,r9a07g044-mali</div><div class='del'>-          - rockchip,px30-mali</div><div class='del'>-          - rockchip,rk3568-mali</div><div class='del'>-      - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amlogic,meson-g12a-mali</div><div class='add'>+              - mediatek,mt8183-mali</div><div class='add'>+              - mediatek,mt8183b-mali</div><div class='add'>+              - mediatek,mt8186-mali</div><div class='add'>+              - realtek,rtd1619-mali</div><div class='add'>+              - renesas,r9a07g044-mali</div><div class='add'>+              - renesas,r9a07g054-mali</div><div class='add'>+              - rockchip,px30-mali</div><div class='add'>+              - rockchip,rk3568-mali</div><div class='add'>+          - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8195-mali</div><div class='add'>+          - const: mediatek,mt8192-mali</div><div class='add'>+          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8192-mali</div><div class='add'>+          - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision is fully discoverable</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -57,7 +70,11 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -87,6 +104,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   dma-coherent: true</div><div class='ctx'> </div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: speed-bin</div><div class='add'>+</div><div class='add'>+  nvmem-cells:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -103,13 +127,19 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             const: amlogic,meson-g12a-mali</div><div class='ctx'>     then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        power-domain-names: false</div><div class='ctx'>       required:</div><div class='ctx'>         - resets</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: renesas,r9a07g044-mali</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,r9a07g044-mali</div><div class='add'>+              - renesas,r9a07g054-mali</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='hunk'>@@ -123,6 +153,9 @@ allOf:</div><div class='ctx'>             - const: gpu</div><div class='ctx'>             - const: bus</div><div class='ctx'>             - const: bus_ace</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        power-domain-names: false</div><div class='ctx'>         resets:</div><div class='ctx'>           minItems: 3</div><div class='ctx'>         reset-names:</div><div class='hunk'>@@ -144,6 +177,7 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         power-domains:</div><div class='ctx'>           minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='ctx'>         power-domain-names:</div><div class='ctx'>           items:</div><div class='ctx'>             - const: core0</div><div class='hunk'>@@ -156,13 +190,65 @@ allOf:</div><div class='ctx'>         - power-domain-names</div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='del'>-        power-domains:</div><div class='del'>-          maxItems: 1</div><div class='ctx'>         sram-supply: false</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='add'>+            const: mediatek,mt8183b-mali</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core0</div><div class='add'>+            - const: core1</div><div class='add'>+            - const: core2</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+        - power-domain-names</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt8186-mali</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core0</div><div class='add'>+            - const: core1</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+        - power-domain-names</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt8192-mali</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 5</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core0</div><div class='add'>+            - const: core1</div><div class='add'>+            - const: core2</div><div class='add'>+            - const: core3</div><div class='add'>+            - const: core4</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+        - power-domain-names</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='ctx'>             const: rockchip,rk3568-mali</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -172,6 +258,9 @@ allOf:</div><div class='ctx'>           items:</div><div class='ctx'>             - const: gpu</div><div class='ctx'>             - const: bus</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        power-domain-names: false</div><div class='ctx'>       required:</div><div class='ctx'>         - clock-names</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml<br/>index d209f272625d..2a25384ca3ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml</a></div><div class='hunk'>@@ -74,7 +74,8 @@ properties:</div><div class='ctx'>       - const: bus</div><div class='ctx'> </div><div class='ctx'>   mali-supply: true</div><div class='del'>-  opp-table: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml<br/>index eceaa176bd57..318122d95eb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml</a></div><div class='hunk'>@@ -101,7 +101,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   mali-supply: true</div><div class='ctx'> </div><div class='del'>-  opp-table: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml b/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml<br/>index e6485f7b046f..dae55b8a267b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom V3D GPU Bindings</div><div class='add'>+title: Broadcom V3D GPU</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Eric Anholt &lt;eric@anholt.net&gt;</div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - brcm,2711-v3d</div><div class='ctx'>       - brcm,7268-v3d</div><div class='ctx'>       - brcm,7278-v3d</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml<br/>index 3cf862976448..ba4c6473ff92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvdec.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device tree binding for NVIDIA Tegra NVDEC</div><div class='add'>+title: NVIDIA Tegra NVDEC</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   NVDEC is the hardware video decoder present on NVIDIA Tegra210</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml<br/>index e63ae1a00818..c23dae713eb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvenc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device tree binding for NVIDIA Tegra NVENC</div><div class='add'>+title: NVIDIA Tegra NVENC</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   NVENC is the hardware video encoder present on NVIDIA Tegra210</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml<br/>index 8647404d67e4..99a33a5eac3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra210-nvjpg.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device tree binding for NVIDIA Tegra NVJPG</div><div class='add'>+title: NVIDIA Tegra NVJPG</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   NVJPG is the hardware JPEG decoder and encoder present on NVIDIA Tegra210</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml b/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml<br/>new file mode 100644<br/>index 000000000000..0b7561c8b9bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/host1x/nvidia,tegra234-nvdec.yaml</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra234 NVDEC</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  NVDEC is the hardware video decoder present on NVIDIA Tegra210</div><div class='add'>+  and newer chips. It is located on the Host1x bus and typically</div><div class='add'>+  programmed through Host1x channels.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;treding@gmail.com&gt;</div><div class='add'>+  - Mikko Perttunen &lt;mperttunen@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^nvdec@[0-9a-f]*$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra234-nvdec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: nvdec</div><div class='add'>+      - const: fuse</div><div class='add'>+      - const: tsec_pka</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: nvdec</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMA read memory client</div><div class='add'>+      - description: DMA write memory client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  nvidia,memory-controller:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle to the memory controller for determining information for the NVDEC</div><div class='add'>+      firmware secure carveout. This carveout is configured by the bootloader and</div><div class='add'>+      not accessible to CPU.</div><div class='add'>+</div><div class='add'>+  nvidia,bl-manifest-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Offset to bootloader manifest from beginning of firmware that was configured by</div><div class='add'>+      the bootloader.</div><div class='add'>+</div><div class='add'>+  nvidia,bl-code-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Offset to bootloader code section from beginning of firmware that was configured by</div><div class='add'>+      the bootloader.</div><div class='add'>+</div><div class='add'>+  nvidia,bl-data-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Offset to bootloader data section from beginning of firmware that was configured by</div><div class='add'>+      the bootloader.</div><div class='add'>+</div><div class='add'>+  nvidia,os-manifest-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Offset to operating system manifest from beginning of firmware that was configured by</div><div class='add'>+      the bootloader.</div><div class='add'>+</div><div class='add'>+  nvidia,os-code-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Offset to operating system code section from beginning of firmware that was configured by</div><div class='add'>+      the bootloader.</div><div class='add'>+</div><div class='add'>+  nvidia,os-data-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Offset to operating system data section from beginning of firmware that was configured</div><div class='add'>+      by the bootloader.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - nvidia,memory-controller</div><div class='add'>+  - nvidia,bl-manifest-offset</div><div class='add'>+  - nvidia,bl-code-offset</div><div class='add'>+  - nvidia,bl-data-offset</div><div class='add'>+  - nvidia,os-manifest-offset</div><div class='add'>+  - nvidia,os-code-offset</div><div class='add'>+  - nvidia,os-data-offset</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra234-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra234-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra234-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    nvdec@15480000 {</div><div class='add'>+            compatible = "nvidia,tegra234-nvdec";</div><div class='add'>+            reg = &lt;0x15480000 0x00040000&gt;;</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA234_CLK_NVDEC&gt;,</div><div class='add'>+                     &lt;&amp;bpmp TEGRA234_CLK_FUSE&gt;,</div><div class='add'>+                     &lt;&amp;bpmp TEGRA234_CLK_TSEC_PKA&gt;;</div><div class='add'>+            clock-names = "nvdec", "fuse", "tsec_pka";</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA234_RESET_NVDEC&gt;;</div><div class='add'>+            reset-names = "nvdec";</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA234_POWER_DOMAIN_NVDEC&gt;;</div><div class='add'>+            interconnects = &lt;&amp;mc TEGRA234_MEMORY_CLIENT_NVDECSRD &amp;emc&gt;,</div><div class='add'>+                            &lt;&amp;mc TEGRA234_MEMORY_CLIENT_NVDECSWR &amp;emc&gt;;</div><div class='add'>+            interconnect-names = "dma-mem", "write";</div><div class='add'>+            iommus = &lt;&amp;smmu_niso1 TEGRA234_SID_NVDEC&gt;;</div><div class='add'>+            dma-coherent;</div><div class='add'>+</div><div class='add'>+            nvidia,memory-controller = &lt;&amp;mc&gt;;</div><div class='add'>+</div><div class='add'>+            /* Placeholder values, to be replaced with values from overlay */</div><div class='add'>+            nvidia,bl-manifest-offset = &lt;0&gt;;</div><div class='add'>+            nvidia,bl-data-offset = &lt;0&gt;;</div><div class='add'>+            nvidia,bl-code-offset = &lt;0&gt;;</div><div class='add'>+            nvidia,os-manifest-offset = &lt;0&gt;;</div><div class='add'>+            nvidia,os-data-offset = &lt;0&gt;;</div><div class='add'>+            nvidia,os-code-offset = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml b/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml<br/>index 62486f55177d..d60626ffb28e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/samsung-rotator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/samsung-rotator.yaml</a></div><div class='hunk'>@@ -53,4 +53,3 @@ examples:</div><div class='ctx'>         clocks = &lt;&amp;clock 278&gt;;</div><div class='ctx'>         clock-names = "rotator";</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml<br/>index 93e7244cdc0e..b1b10ea70ad9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/vivante,gc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/gpu/vivante,gc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/gpu/vivante,gc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/gpu/vivante,gc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/gpu/vivante,gc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Vivante GPU Bindings</div><div class='add'>+title: Vivante GPU</div><div class='ctx'> </div><div class='ctx'> description: Vivante GPU core devices</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/h8300/cpu.txt b/Documentation/devicetree/bindings/h8300/cpu.txt<br/>deleted file mode 100644<br/>index 70cd58608f4b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/h8300/cpu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/h8300/cpu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-* H8/300 CPU bindings</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Compatible property value should be "renesas,h8300".</div><div class='del'>-- clock-frequency: Contains the clock frequency for CPU, in Hz.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-		cpu@0 {</div><div class='del'>-			compatible = "renesas,h8300";</div><div class='del'>-			clock-frequency = &lt;20000000&gt;;</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml<br/>new file mode 100644<br/>index 000000000000..9d0c36ec1982<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwinfo/loongson,ls2k-chipid.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwinfo/loongson,ls2k-chipid.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson-2 SoC ChipID</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Loongson-2 SoC contains many groups of global utilities register</div><div class='add'>+  blocks, of which the ChipID group registers record SoC version,</div><div class='add'>+  feature, vendor and id information.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: loongson,ls2k-chipid</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  little-endian: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    chipid: chipid@1fe00000 {</div><div class='add'>+        compatible = "loongson,ls2k-chipid";</div><div class='add'>+        reg = &lt;0x1fe00000 0x3ffc&gt;;</div><div class='add'>+        little-endian;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/renesas,prr.yaml b/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml<br/>index 1f80767da38b..792f371cec03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/renesas,prr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/renesas,prr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/arm/renesas,prr.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas Product Register</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml<br/>index 4bb8efb83ac1..95cbdcb56efe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/samsung/exynos-chipid.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/samsung/exynos-chipid.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwinfo/samsung,exynos-chipid.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/soc/samsung/exynos-chipid.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/hwinfo/samsung,exynos-chipid.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Samsung Exynos SoC series Chipid driver</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml b/Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml<br/>new file mode 100644<br/>index 000000000000..563ded4fca83<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwinfo/samsung,s5pv210-chipid.yaml</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwinfo/samsung,s5pv210-chipid.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5PV210 SoC ChipID</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,s5pv210-chipid</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    chipid@e0000000 {</div><div class='add'>+        compatible = "samsung,s5pv210-chipid";</div><div class='add'>+        reg = &lt;0xe0000000 0x1000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml b/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml<br/>index a1a8423b2e2e..dada28b47ea0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/k3-socinfo.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwinfo/ti,k3-socinfo.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/soc/ti/k3-socinfo.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/hwinfo/ti,k3-socinfo.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Texas Instruments K3 Multicore SoC platforms chipid module</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml<br/>index 10e5a53e447b..38478dad8b25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwlock/allwinner,sun6i-a31-hwspinlock.yaml</a></div><div class='hunk'>@@ -26,11 +26,15 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  '#hwlock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - resets</div><div class='add'>+  - "#hwlock-cells"</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -44,5 +48,6 @@ examples:</div><div class='ctx'>         reg = &lt;0x01c18000 0x1000&gt;;</div><div class='ctx'>         clocks = &lt;&amp;ccu CLK_BUS_SPINLOCK&gt;;</div><div class='ctx'>         resets = &lt;&amp;ccu RST_BUS_SPINLOCK&gt;;</div><div class='add'>+        #hwlock-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml<br/>index 1c7149f7d171..ee2726149cf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwlock/qcom-hwspinlock.yaml</a></div><div class='hunk'>@@ -15,9 +15,22 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,sfpb-mutex</div><div class='del'>-      - qcom,tcsr-mutex</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sfpb-mutex</div><div class='add'>+          - qcom,tcsr-mutex</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,apq8084-tcsr-mutex</div><div class='add'>+              - qcom,ipq6018-tcsr-mutex</div><div class='add'>+              - qcom,msm8226-tcsr-mutex</div><div class='add'>+              - qcom,msm8994-tcsr-mutex</div><div class='add'>+          - const: qcom,tcsr-mutex</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,msm8974-tcsr-mutex</div><div class='add'>+          - const: qcom,tcsr-mutex</div><div class='add'>+          - const: syscon</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -34,9 +47,9 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        tcsr_mutex: hwlock@1f40000 {</div><div class='del'>-                compatible = "qcom,tcsr-mutex";</div><div class='del'>-                reg = &lt;0x01f40000 0x40000&gt;;</div><div class='del'>-                #hwlock-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='add'>+    hwlock@1f40000 {</div><div class='add'>+        compatible = "qcom,tcsr-mutex";</div><div class='add'>+        reg = &lt;0x01f40000 0x40000&gt;;</div><div class='add'>+        #hwlock-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml<br/>index b18c616035a8..829d1fdf4c67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/hwlock/st,stm32-hwspinlock.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Hardware Spinlock bindings</div><div class='add'>+title: STMicroelectronics STM32 Hardware Spinlock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabien Dessenne &lt;fabien.dessenne@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml<br/>index 154bee851139..ca2b47320689 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adi,adm1177.yaml</a></div><div class='hunk'>@@ -8,7 +8,6 @@ title: Analog Devices ADM1177 Hot Swap Controller and Digital Power Monitor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Hennerich &lt;michael.hennerich@analog.com&gt;</div><div class='del'>-  - Beniamin Bia &lt;beniamin.bia@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Analog Devices ADM1177 Hot Swap Controller and Digital Power Monitor</div><div class='hunk'>@@ -53,16 +52,16 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         pwmon@5a {</div><div class='del'>-                compatible = "adi,adm1177";</div><div class='del'>-                reg = &lt;0x5a&gt;;</div><div class='del'>-                shunt-resistor-micro-ohms = &lt;50000&gt;; /* 50 mOhm */</div><div class='del'>-                adi,shutdown-threshold-microamp = &lt;1059000&gt;; /* 1.059 A */</div><div class='del'>-                adi,vrange-high-enable;</div><div class='add'>+            compatible = "adi,adm1177";</div><div class='add'>+            reg = &lt;0x5a&gt;;</div><div class='add'>+            shunt-resistor-micro-ohms = &lt;50000&gt;; /* 50 mOhm */</div><div class='add'>+            adi,shutdown-threshold-microamp = &lt;1059000&gt;; /* 1.059 A */</div><div class='add'>+            adi,vrange-high-enable;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml<br/>index 43b4f4f57b49..4f8e11bd5142 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml</a></div><div class='hunk'>@@ -39,13 +39,13 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         adm1266@40 {</div><div class='del'>-                compatible = "adi,adm1266";</div><div class='del'>-                reg = &lt;0x40&gt;;</div><div class='add'>+            compatible = "adi,adm1266";</div><div class='add'>+            reg = &lt;0x40&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml<br/>index 6747b870f297..0cf3ed6212a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/hwmon/adi,axi-fan-control.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Analog Devices AXI FAN Control Device Tree Bindings</div><div class='add'>+title: Analog Devices AXI FAN Control</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nuno Sá &lt;nuno.sa@analog.com&gt;</div><div class='hunk'>@@ -49,15 +49,15 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     fpga_axi: fpga-axi {</div><div class='del'>-            #address-cells = &lt;0x2&gt;;</div><div class='del'>-            #size-cells = &lt;0x1&gt;;</div><div class='del'>-</div><div class='del'>-            axi_fan_control: axi-fan-control@80000000 {</div><div class='del'>-                    compatible = "adi,axi-fan-control-1.00.a";</div><div class='del'>-                    reg = &lt;0x0 0x80000000 0x10000&gt;;</div><div class='del'>-                    clocks = &lt;&amp;clk 71&gt;;</div><div class='del'>-                    interrupts = &lt;0 110 0&gt;;</div><div class='del'>-                    pulses-per-revolution = &lt;2&gt;;</div><div class='del'>-            };</div><div class='add'>+        #address-cells = &lt;0x2&gt;;</div><div class='add'>+        #size-cells = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+        axi_fan_control: axi-fan-control@80000000 {</div><div class='add'>+            compatible = "adi,axi-fan-control-1.00.a";</div><div class='add'>+            reg = &lt;0x0 0x80000000 0x10000&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk 71&gt;;</div><div class='add'>+            interrupts = &lt;0 110 0&gt;;</div><div class='add'>+            pulses-per-revolution = &lt;2&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc2945.yaml b/Documentation/devicetree/bindings/hwmon/adi,ltc2945.yaml<br/>new file mode 100644<br/>index 000000000000..5cb66e97e816<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,ltc2945.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adi,ltc2945.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/adi,ltc2945.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices LTC2945 wide range i2c power monitor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Analog Devices LTC2945 wide range i2c power monitor over I2C.</div><div class='add'>+</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/LTC2945.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,ltc2945</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  shunt-resistor-micro-ohms:</div><div class='add'>+    description:</div><div class='add'>+      Shunt resistor value in micro-Ohms</div><div class='add'>+    default: 1000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        power-monitor@6e {</div><div class='add'>+            compatible = "adi,ltc2945";</div><div class='add'>+            reg = &lt;0x6e&gt;;</div><div class='add'>+            /* 10 milli-Ohm shunt resistor */</div><div class='add'>+            shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml b/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml<br/>index bf04151b63d2..152935334c76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adi,ltc2947.yaml</a></div><div class='hunk'>@@ -87,15 +87,15 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='del'>-           #address-cells = &lt;1&gt;;</div><div class='del'>-           #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-           ltc2947_spi: ltc2947@0 {</div><div class='del'>-                   compatible = "adi,ltc2947";</div><div class='del'>-                   reg = &lt;0&gt;;</div><div class='del'>-                   /* accumulation takes place always for energ1/charge1. */</div><div class='del'>-                   /* accumulation only on positive current for energy2/charge2. */</div><div class='del'>-                   adi,accumulator-ctl-pol = &lt;0 1&gt;;</div><div class='del'>-           };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ltc2947_spi: ltc2947@0 {</div><div class='add'>+            compatible = "adi,ltc2947";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            /* accumulation takes place always for energ1/charge1. */</div><div class='add'>+            /* accumulation only on positive current for energy2/charge2. */</div><div class='add'>+            adi,accumulator-ctl-pol = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml b/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml<br/>index 64a8fcb7bc46..b39c632956e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adi,ltc2992.yaml</a></div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@([0-1])$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       Represents the two supplies to be monitored.</div><div class='ctx'> </div><div class='hunk'>@@ -55,26 +56,26 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        ltc2992@6F {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='add'>+        ltc2992@6f {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-                compatible = "adi,ltc2992";</div><div class='del'>-                reg = &lt;0x6F&gt;;</div><div class='add'>+            compatible = "adi,ltc2992";</div><div class='add'>+            reg = &lt;0x6f&gt;;</div><div class='ctx'> </div><div class='del'>-                channel@0 {</div><div class='del'>-                        reg = &lt;0x0&gt;;</div><div class='del'>-                        shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='del'>-                };</div><div class='add'>+            channel@0 {</div><div class='add'>+                reg = &lt;0x0&gt;;</div><div class='add'>+                shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+            };</div><div class='ctx'> </div><div class='del'>-                channel@1 {</div><div class='del'>-                        reg = &lt;0x1&gt;;</div><div class='del'>-                        shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='del'>-                };</div><div class='add'>+            channel@1 {</div><div class='add'>+                reg = &lt;0x1&gt;;</div><div class='add'>+                shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adi,max31760.yaml b/Documentation/devicetree/bindings/hwmon/adi,max31760.yaml<br/>new file mode 100644<br/>index 000000000000..9f2d08d7b978<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adi,max31760.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adi,max31760.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/adi,max31760.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices MAX31760 Fan-Speed Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ibrahim Tilki &lt;Ibrahim.Tilki@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Analog Devices MAX31760 Fan-Speed Controller</div><div class='add'>+  https://datasheets.maximintegrated.com/en/ds/MAX31760.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,max31760</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: I2C address of slave device.</div><div class='add'>+    minimum: 0x50</div><div class='add'>+    maximum: 0x57</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        fan-controller@50 {</div><div class='add'>+            reg = &lt;0x50&gt;;</div><div class='add'>+            compatible = "adi,max31760";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/adt7475.yaml b/Documentation/devicetree/bindings/hwmon/adt7475.yaml<br/>index 7d9c083632b9..051c976ab711 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adt7475.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/adt7475.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/adt7475.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/adt7475.yaml</a></div><div class='hunk'>@@ -57,10 +57,30 @@ patternProperties:</div><div class='ctx'>       Configures bypassing the individual voltage input attenuator. If</div><div class='ctx'>       set to 1 the attenuator is bypassed if set to 0 the attenuator is</div><div class='ctx'>       not bypassed. If the property is absent then the attenuator</div><div class='del'>-      retains it's configuration from the bios/bootloader.</div><div class='add'>+      retains its configuration from the bios/bootloader.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='add'>+  "^adi,pin(5|10)-function$":</div><div class='add'>+    description: |</div><div class='add'>+      Configures the function for pin 5 on the adi,adt7473 and adi,adt7475. Or</div><div class='add'>+      pin 10 on the adi,adt7476 and adi,adt7490.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - pwm2</div><div class='add'>+      - smbalert#</div><div class='add'>+</div><div class='add'>+  "^adi,pin(9|14)-function$":</div><div class='add'>+    description: |</div><div class='add'>+      Configures the function for pin 9 on the adi,adt7473 and adi,adt7475. Or</div><div class='add'>+      pin 14 on the adi,adt7476 and adi,adt7490</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - tach4</div><div class='add'>+      - therm#</div><div class='add'>+      - smbalert#</div><div class='add'>+      - gpio</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -79,6 +99,7 @@ examples:</div><div class='ctx'>         adi,bypass-attenuator-in0 = &lt;1&gt;;</div><div class='ctx'>         adi,bypass-attenuator-in1 = &lt;0&gt;;</div><div class='ctx'>         adi,pwm-active-state = &lt;1 0 1&gt;;</div><div class='add'>+        adi,pin10-function = "smbalert#";</div><div class='add'>+        adi,pin14-function = "tach4";</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml b/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml<br/>index 7598b083979c..353d81d89bf5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/amd,sbrmi.yaml</a></div><div class='hunk'>@@ -41,13 +41,13 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         sbrmi@3c {</div><div class='del'>-                compatible = "amd,sbrmi";</div><div class='del'>-                reg = &lt;0x3c&gt;;</div><div class='add'>+            compatible = "amd,sbrmi";</div><div class='add'>+            reg = &lt;0x3c&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml b/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml<br/>index 446b09f1ce94..75088244a274 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/amd,sbtsi.yaml</a></div><div class='hunk'>@@ -42,13 +42,13 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         sbtsi@4c {</div><div class='del'>-                compatible = "amd,sbtsi";</div><div class='del'>-                reg = &lt;0x4c&gt;;</div><div class='add'>+            compatible = "amd,sbtsi";</div><div class='add'>+            reg = &lt;0x4c&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/hpe,gxp-fan-ctrl.yaml b/Documentation/devicetree/bindings/hwmon/hpe,gxp-fan-ctrl.yaml<br/>new file mode 100644<br/>index 000000000000..4a52aac6be72<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/hpe,gxp-fan-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/hpe,gxp-fan-ctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/hpe,gxp-fan-ctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HPE GXP Fan Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nick Hawkins &lt;nick.hawkins@hpe.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The HPE GXP fan controller controls the fans through an external CPLD</div><div class='add'>+  device that connects to the fans.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: hpe,gxp-fan-ctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Fan controller PWM</div><div class='add'>+      - description: Programmable logic</div><div class='add'>+      - description: Function 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: base</div><div class='add'>+      - const: pl</div><div class='add'>+      - const: fn2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    fan-controller@1000c00 {</div><div class='add'>+      compatible = "hpe,gxp-fan-ctrl";</div><div class='add'>+      reg = &lt;0x1000c00 0x200&gt;, &lt;0xd1000000 0xff&gt;, &lt;0x80200000 0x100000&gt;;</div><div class='add'>+      reg-names = "base", "pl", "fn2";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml<br/>new file mode 100644<br/>index 000000000000..3dbdc5af2804<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ibm,occ-hwmon.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/ibm,occ-hwmon.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: IBM On-Chip Controller (OCC) accessed from a service processor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Eddie James &lt;eajames@linux.ibm.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The POWER processor On-Chip Controller (OCC) helps manage power and</div><div class='add'>+  thermals for the system. A service processor or baseboard management</div><div class='add'>+  controller can query the OCC for it's power and thermal data to report</div><div class='add'>+  through hwmon.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ibm,p9-occ-hwmon</div><div class='add'>+      - ibm,p10-occ-hwmon</div><div class='add'>+</div><div class='add'>+  ibm,no-poll-on-init:</div><div class='add'>+    description: This property describes whether or not the OCC should</div><div class='add'>+      be polled during driver initialization.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    hwmon {</div><div class='add'>+        compatible = "ibm,p10-occ-hwmon";</div><div class='add'>+        ibm,no-poll-on-init;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt b/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt<br/>index 5dc5d2e2573d..5dc5d2e2573d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt</a></div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml<br/>index f5a6cc3efd33..c54b5986b365 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/iio-hwmon.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/hwmon/iio-hwmon.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: ADC-attached Hardware Sensor Device Tree Bindings</div><div class='add'>+title: ADC-attached Hardware Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='hunk'>@@ -31,7 +31,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      iio-hwmon {</div><div class='del'>-          compatible = "iio-hwmon";</div><div class='del'>-          io-channels = &lt;&amp;adc 1&gt;, &lt;&amp;adc 2&gt;;</div><div class='del'>-      };</div><div class='add'>+    iio-hwmon {</div><div class='add'>+        compatible = "iio-hwmon";</div><div class='add'>+        io-channels = &lt;&amp;adc 1&gt;, &lt;&amp;adc 2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml b/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml<br/>index 4b5851c326f7..b1a4c235376e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/lltc,ltc4151.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: LTC4151 High Voltage I2C Current and Voltage Monitor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/lm75.yaml b/Documentation/devicetree/bindings/hwmon/lm75.yaml<br/>index 72980d083c21..8226e3b5d028 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/lm75.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/lm75.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/lm75.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/lm75.yaml</a></div><div class='hunk'>@@ -14,6 +14,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - adi,adt75</div><div class='add'>+      - atmel,at30ts74</div><div class='ctx'>       - dallas,ds1775</div><div class='ctx'>       - dallas,ds75</div><div class='ctx'>       - dallas,ds7505</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/microchip,lan966x.yaml b/Documentation/devicetree/bindings/hwmon/microchip,lan966x.yaml<br/>new file mode 100644<br/>index 000000000000..390dd6755ff5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/microchip,lan966x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/microchip,lan966x.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/microchip,lan966x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip LAN966x Hardware Monitor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Walle &lt;michael@walle.cc&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Microchip LAN966x temperature monitor and fan controller</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - microchip,lan9668-hwmon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: PVT registers</div><div class='add'>+      - description: FAN registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pvt</div><div class='add'>+      - const: fan</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    hwmon: hwmon@e2010180 {</div><div class='add'>+        compatible = "microchip,lan9668-hwmon";</div><div class='add'>+        reg = &lt;0xe2010180 0xc&gt;,</div><div class='add'>+              &lt;0xe20042a8 0xc&gt;;</div><div class='add'>+        reg-names = "pvt", "fan";</div><div class='add'>+        clocks = &lt;&amp;sys_clk&gt;;</div><div class='add'>+        #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml b/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml<br/>index c42051f8a191..028d6e570131 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/microchip,mcp3021.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Microchip MCP3021 A/D converter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml b/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml<br/>index 76be625d5646..51e8619dbf3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml</a></div><div class='hunk'>@@ -22,7 +22,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='del'>-      - description: AHB reference clock</div><div class='add'>+      - description: System reference clock</div><div class='ctx'> </div><div class='ctx'>   '#thermal-sensor-cells':</div><div class='ctx'>     const: 0</div><div class='hunk'>@@ -40,5 +40,5 @@ examples:</div><div class='ctx'>         compatible = "microchip,sparx5-temp";</div><div class='ctx'>         reg = &lt;0x10508110 0xc&gt;;</div><div class='ctx'>         #thermal-sensor-cells = &lt;0&gt;;</div><div class='del'>-        clocks = &lt;&amp;ahb_clk&gt;;</div><div class='add'>+        clocks = &lt;&amp;sys_clk&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml b/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml<br/>index b79f069a04c2..ae4f68d4e696 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml</a></div><div class='hunk'>@@ -4,11 +4,37 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/hwmon/moortec,mr75203.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Moortec Semiconductor MR75203 PVT Controller bindings</div><div class='add'>+title: Moortec Semiconductor MR75203 PVT Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rahul Tanwar &lt;rtanwar@maxlinear.com&gt;</div><div class='ctx'> </div><div class='add'>+description: |</div><div class='add'>+  A Moortec PVT (Process, Voltage, Temperature) monitoring logic design can</div><div class='add'>+  include many different units.</div><div class='add'>+  Such a design will usually consists of several Moortec's embedded analog IPs,</div><div class='add'>+  and a single Moortec controller (mr75203) to configure and control the IPs.</div><div class='add'>+</div><div class='add'>+  Some of the Moortec's analog hard IPs that can be used in a design:</div><div class='add'>+  *) Temperature Sensor (TS) - used to monitor core temperature (e.g. mr74137).</div><div class='add'>+  *) Voltage Monitor (VM) - used to monitor voltage levels (e.g. mr74138).</div><div class='add'>+  *) Process Detector (PD) - used to assess silicon speed (e.g. mr74139).</div><div class='add'>+  *) Delay Chain - ring oscillator connected to the PD, used to measure IO</div><div class='add'>+     based transistors (e.g. mr76008 ring oscillator at 1.1V, mr76007 ring</div><div class='add'>+     oscillator at 1.8V).</div><div class='add'>+  *) Pre Scaler - provides divide-by-X scaling of input voltage, which can then</div><div class='add'>+     be presented for VM for measurement within its range (e.g. mr76006 -</div><div class='add'>+     divide by 2 pre-scaler).</div><div class='add'>+</div><div class='add'>+  TS, VM &amp; PD also include a digital interface, which consists of configuration</div><div class='add'>+  inputs and measurement outputs.</div><div class='add'>+</div><div class='add'>+  Some of the units have number of series, each series can have slightly</div><div class='add'>+  different characteristics.</div><div class='add'>+</div><div class='add'>+  The mr75203 binding describes configuration for the controller unit, but also</div><div class='add'>+  for some of the analog IPs.</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: moortec,mr75203</div><div class='hunk'>@@ -44,13 +70,76 @@ properties:</div><div class='ctx'>   "#thermal-sensor-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  moortec,vm-active-channels:</div><div class='add'>+    description:</div><div class='add'>+      Defines the number of channels per VM that are actually used and are</div><div class='add'>+      connected to some input source.</div><div class='add'>+      Maximum number of items - number of VMs.</div><div class='add'>+      Maximum value of each item - number of channels.</div><div class='add'>+      Minimum value of each item - 0 (which means entire VM sensor is not used).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+</div><div class='add'>+  moortec,vm-pre-scaler-x2:</div><div class='add'>+    description:</div><div class='add'>+      Defines the channels that use a mr76006 pre-scaler to divide the input</div><div class='add'>+      source by 2.</div><div class='add'>+      The pre-scaler is used for input sources that exceed the VM input range.</div><div class='add'>+      The driver uses this information to present to the user with the actual</div><div class='add'>+      value of the voltage source.</div><div class='add'>+      For channels that are not listed, no pre-scaler is assumed.</div><div class='add'>+      Maximum number of items - total number of channels in all VMs.</div><div class='add'>+      Each channel should not appear more than once.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+</div><div class='add'>+  moortec,ts-series:</div><div class='add'>+    description:</div><div class='add'>+      Definition of the temperature equation and coefficients that shall be</div><div class='add'>+      used to convert the digital output to value in milli-Celsius.</div><div class='add'>+    minimum: 5</div><div class='add'>+    maximum: 6</div><div class='add'>+    default: 5</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  moortec,ts-coeff-g:</div><div class='add'>+    description:</div><div class='add'>+      G coefficient for temperature equation.</div><div class='add'>+      Default for series 5 = 60000</div><div class='add'>+      Default for series 6 = 57400</div><div class='add'>+    multipleOf: 1000</div><div class='add'>+    minimum: 1000</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  moortec,ts-coeff-h:</div><div class='add'>+    description:</div><div class='add'>+      H coefficient for temperature equation.</div><div class='add'>+      Default for series 5 = 200000</div><div class='add'>+      Default for series 6 = 249400</div><div class='add'>+    multipleOf: 1000</div><div class='add'>+    minimum: 1000</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  moortec,ts-coeff-cal5:</div><div class='add'>+    description:</div><div class='add'>+      cal5 coefficient for temperature equation.</div><div class='add'>+      Default for series 5 = 4094</div><div class='add'>+      Default for series 6 = 4096</div><div class='add'>+    minimum: 1</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  moortec,ts-coeff-j:</div><div class='add'>+    description:</div><div class='add'>+      J coefficient for temperature equation.</div><div class='add'>+      Default for series 5 = -100</div><div class='add'>+      Default for series 6 = 0</div><div class='add'>+    multipleOf: 1000</div><div class='add'>+    maximum: 0</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/int32</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - intel,vm-map</div><div class='ctx'>   - clocks</div><div class='del'>-  - resets</div><div class='ctx'>   - "#thermal-sensor-cells"</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='hunk'>@@ -67,5 +156,9 @@ examples:</div><div class='ctx'>         intel,vm-map = [03 01 04 ff ff];</div><div class='ctx'>         clocks = &lt;&amp;osc0&gt;;</div><div class='ctx'>         resets = &lt;&amp;rcu0 0x40 7&gt;;</div><div class='add'>+        moortec,vm-active-channels = /bits/ 8 &lt;0x10 0x05&gt;;</div><div class='add'>+        moortec,vm-pre-scaler-x2 = /bits/ 8 &lt;5 6 20&gt;;</div><div class='add'>+        moortec,ts-coeff-g = &lt;61400&gt;;</div><div class='add'>+        moortec,ts-coeff-h = &lt;253700&gt;;</div><div class='ctx'>         #thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/national,lm90.yaml b/Documentation/devicetree/bindings/hwmon/national,lm90.yaml<br/>index 30db92977937..7b9d48d6d6da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/national,lm90.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/national,lm90.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/national,lm90.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/national,lm90.yaml</a></div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'>       - adi,adm1032</div><div class='ctx'>       - adi,adt7461</div><div class='ctx'>       - adi,adt7461a</div><div class='add'>+      - adi,adt7481</div><div class='ctx'>       - dallas,max6646</div><div class='ctx'>       - dallas,max6647</div><div class='ctx'>       - dallas,max6649</div><div class='hunk'>@@ -34,6 +35,7 @@ properties:</div><div class='ctx'>       - nxp,sa56004</div><div class='ctx'>       - onnn,nct1008</div><div class='ctx'>       - ti,tmp451</div><div class='add'>+      - ti,tmp461</div><div class='ctx'>       - winbond,w83l771</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -49,13 +51,133 @@ properties:</div><div class='ctx'>   "#thermal-sensor-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   vcc-supply:</div><div class='ctx'>     description: phandle to the regulator that provides the +VCC supply</div><div class='ctx'> </div><div class='add'>+  ti,extended-range-enable:</div><div class='add'>+    description: Set to enable extended range temperature.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+patternProperties:</div><div class='add'>+  "^channel@([0-2])$":</div><div class='add'>+    type: object</div><div class='add'>+    description: Represents channels of the device and their specific configuration.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: The channel number. 0 is local channel, 1-2 are remote channels.</div><div class='add'>+        items:</div><div class='add'>+          minimum: 0</div><div class='add'>+          maximum: 2</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        description: A descriptive name for this channel, like "ambient" or "psu".</div><div class='add'>+</div><div class='add'>+      temperature-offset-millicelsius:</div><div class='add'>+        description: Temperature offset to be added to or subtracted from remote temperature measurements.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - adi,adt7461</div><div class='add'>+                - adi,adt7461a</div><div class='add'>+                - adi,adt7481</div><div class='add'>+                - ti,tmp451</div><div class='add'>+                - ti,tmp461</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,extended-range-enable: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - dallas,max6646</div><div class='add'>+              - dallas,max6647</div><div class='add'>+              - dallas,max6649</div><div class='add'>+              - dallas,max6657</div><div class='add'>+              - dallas,max6658</div><div class='add'>+              - dallas,max6659</div><div class='add'>+              - dallas,max6695</div><div class='add'>+              - dallas,max6696</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel@([0-2])$":</div><div class='add'>+          properties:</div><div class='add'>+            temperature-offset-millicelsius: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - adi,adt7461</div><div class='add'>+              - adi,adt7461a</div><div class='add'>+              - adi,adt7481</div><div class='add'>+              - onnn,nct1008</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel@([0-2])$":</div><div class='add'>+          properties:</div><div class='add'>+            temperature-offset-millicelsius:</div><div class='add'>+              maximum: 127750</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - adi,adm1032</div><div class='add'>+              - dallas,max6680</div><div class='add'>+              - dallas,max6681</div><div class='add'>+              - gmt,g781</div><div class='add'>+              - national,lm86</div><div class='add'>+              - national,lm89</div><div class='add'>+              - national,lm90</div><div class='add'>+              - national,lm99</div><div class='add'>+              - nxp,sa56004</div><div class='add'>+              - winbond,w83l771</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel@([0-2])$":</div><div class='add'>+          properties:</div><div class='add'>+            temperature-offset-millicelsius:</div><div class='add'>+              maximum: 127875</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,tmp451</div><div class='add'>+              - ti,tmp461</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel@([0-2])$":</div><div class='add'>+          properties:</div><div class='add'>+            temperature-offset-millicelsius:</div><div class='add'>+              maximum: 127937</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -74,3 +196,32 @@ examples:</div><div class='ctx'>             #thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        sensor@4c {</div><div class='add'>+            compatible = "adi,adt7481";</div><div class='add'>+            reg = &lt;0x4c&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            channel@0 {</div><div class='add'>+                reg = &lt;0x0&gt;;</div><div class='add'>+                label = "local";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@1 {</div><div class='add'>+                reg = &lt;0x1&gt;;</div><div class='add'>+                label = "front";</div><div class='add'>+                temperature-offset-millicelsius = &lt;4000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@2 {</div><div class='add'>+                reg = &lt;0x2&gt;;</div><div class='add'>+                label = "back";</div><div class='add'>+                temperature-offset-millicelsius = &lt;750&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml b/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml<br/>index 3d3b139a91a2..3d0146e20d3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml</a></div><div class='hunk'>@@ -6,7 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: NTC thermistor temperature sensors</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Naveen Krishna Chatradhi &lt;ch.naveen@samsung.com&gt;</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='hunk'>@@ -132,7 +131,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    thermistor0 {</div><div class='add'>+    thermistor {</div><div class='ctx'>       compatible = "murata,ncp18wb473";</div><div class='ctx'>       io-channels = &lt;&amp;gpadc 0x06&gt;;</div><div class='ctx'>       pullup-uv = &lt;1800000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml b/Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml<br/>new file mode 100644<br/>index 000000000000..358b262431fc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/nuvoton,nct6775.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/nuvoton,nct6775.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Nuvoton NCT6775 and compatible Super I/O chips</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nuvoton,nct6106</div><div class='add'>+      - nuvoton,nct6116</div><div class='add'>+      - nuvoton,nct6775</div><div class='add'>+      - nuvoton,nct6776</div><div class='add'>+      - nuvoton,nct6779</div><div class='add'>+      - nuvoton,nct6791</div><div class='add'>+      - nuvoton,nct6792</div><div class='add'>+      - nuvoton,nct6793</div><div class='add'>+      - nuvoton,nct6795</div><div class='add'>+      - nuvoton,nct6796</div><div class='add'>+      - nuvoton,nct6797</div><div class='add'>+      - nuvoton,nct6798</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nuvoton,tsi-channel-mask:</div><div class='add'>+    description:</div><div class='add'>+      Bitmask indicating which TSI temperature sensor channels are</div><div class='add'>+      active.  LSB is TSI0, bit 1 is TSI1, etc.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 0xff</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        superio@4d {</div><div class='add'>+            compatible = "nuvoton,nct6779";</div><div class='add'>+            reg = &lt;0x4d&gt;;</div><div class='add'>+            nuvoton,tsi-channel-mask = &lt;0x03&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml b/Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml<br/>index 2f0620ecccc9..cd8dcd797031 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/nuvoton,nct7802.yaml</a></div><div class='hunk'>@@ -123,23 +123,23 @@ examples:</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>             channel@0 { /* LTD */</div><div class='del'>-              reg = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             channel@1 { /* RTD1 */</div><div class='del'>-              reg = &lt;1&gt;;</div><div class='del'>-              sensor-type = "voltage";</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                sensor-type = "voltage";</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             channel@2 { /* RTD2 */</div><div class='del'>-              reg = &lt;2&gt;;</div><div class='del'>-              sensor-type = "temperature";</div><div class='del'>-              temperature-mode = "thermal-diode";</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                sensor-type = "temperature";</div><div class='add'>+                temperature-mode = "thermal-diode";</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             channel@3 { /* RTD3 */</div><div class='del'>-              reg = &lt;3&gt;;</div><div class='del'>-              sensor-type = "temperature";</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                sensor-type = "temperature";</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml b/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml<br/>new file mode 100644<br/>index 000000000000..306f67315835<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/nxp,mc34vr500.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/nxp,mc34vr500.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP MC34VR500 hwmon sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mario Kicherer &lt;dev@kicherer.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nxp,mc34vr500</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pmic@8 {</div><div class='add'>+        compatible = "nxp,mc34vr500";</div><div class='add'>+        reg = &lt;0x08&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.txt b/Documentation/devicetree/bindings/hwmon/pwm-fan.txt<br/>index 4509e688623a..48886f0ce415 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/pwm-fan.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/pwm-fan.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/pwm-fan.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/pwm-fan.txt</a></div><div class='hunk'>@@ -1,67 +1 @@</div><div class='del'>-Bindings for a fan connected to the PWM lines</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible	: "pwm-fan"</div><div class='del'>-- pwms		: the PWM that is used to control the PWM fan</div><div class='del'>-- cooling-levels      : PWM duty cycle values in a range from 0 to 255</div><div class='del'>-			which correspond to thermal cooling states</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- fan-supply		: phandle to the regulator that provides power to the fan</div><div class='del'>-- interrupts		: This contains an interrupt specifier for each fan</div><div class='del'>-			  tachometer output connected to an interrupt source.</div><div class='del'>-			  The output signal must generate a defined number of</div><div class='del'>-			  interrupts per fan revolution, which require that</div><div class='del'>-			  it must be self resetting edge interrupts. See</div><div class='del'>-			  interrupt-controller/interrupts.txt for the format.</div><div class='del'>-- pulses-per-revolution : define the number of pulses per fan revolution for</div><div class='del'>-			  each tachometer input as an integer (default is 2</div><div class='del'>-			  interrupts per revolution). The value must be</div><div class='del'>-			  greater than zero.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	fan0: pwm-fan {</div><div class='del'>-		compatible = "pwm-fan";</div><div class='del'>-		#cooling-cells = &lt;2&gt;;</div><div class='del'>-		pwms = &lt;&amp;pwm 0 10000 0&gt;;</div><div class='del'>-		cooling-levels = &lt;0 102 170 230&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	thermal-zones {</div><div class='del'>-		cpu_thermal: cpu-thermal {</div><div class='del'>-			     thermal-sensors = &lt;&amp;tmu 0&gt;;</div><div class='del'>-			     polling-delay-passive = &lt;0&gt;;</div><div class='del'>-			     polling-delay = &lt;0&gt;;</div><div class='del'>-			     trips {</div><div class='del'>-					cpu_alert1: cpu-alert1 {</div><div class='del'>-						    temperature = &lt;100000&gt;; /* millicelsius */</div><div class='del'>-						    hysteresis = &lt;2000&gt;; /* millicelsius */</div><div class='del'>-						    type = "passive";</div><div class='del'>-					};</div><div class='del'>-			     };</div><div class='del'>-			     cooling-maps {</div><div class='del'>-					map0 {</div><div class='del'>-						    trip = &lt;&amp;cpu_alert1&gt;;</div><div class='del'>-						    cooling-device = &lt;&amp;fan0 0 1&gt;;</div><div class='del'>-					};</div><div class='del'>-			     };</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-Example 2:</div><div class='del'>-	fan0: pwm-fan {</div><div class='del'>-		compatible = "pwm-fan";</div><div class='del'>-		pwms = &lt;&amp;pwm 0 40000 0&gt;;</div><div class='del'>-		fan-supply = &lt;&amp;reg_fan&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		pulses-per-revolution = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 3:</div><div class='del'>-	fan0: pwm-fan {</div><div class='del'>-		compatible = "pwm-fan";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 25000 0&gt;;</div><div class='del'>-		interrupts-extended = &lt;&amp;gpio1 1 IRQ_TYPE_EDGE_FALLING&gt;,</div><div class='del'>-			&lt;&amp;gpio2 5 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		pulses-per-revolution = &lt;2&gt;, &lt;1&gt;;</div><div class='del'>-	};</div><div class='add'>+This file has moved to pwm-fan.yaml.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml b/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml<br/>new file mode 100644<br/>index 000000000000..4e5abf7580cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/pwm-fan.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/pwm-fan.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/pwm-fan.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Fan connected to PWM lines</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jean Delvare &lt;jdelvare@suse.com&gt;</div><div class='add'>+  - Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pwm-fan</div><div class='add'>+</div><div class='add'>+  cooling-levels:</div><div class='add'>+    description: PWM duty cycle values corresponding to thermal cooling states.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      maximum: 255</div><div class='add'>+</div><div class='add'>+  fan-supply:</div><div class='add'>+    description: Phandle to the regulator that provides power to the fan.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      This contains an interrupt specifier for each fan tachometer output</div><div class='add'>+      connected to an interrupt source. The output signal must generate a</div><div class='add'>+      defined number of interrupts per fan revolution, which require that</div><div class='add'>+      it must be self resetting edge interrupts.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  pulses-per-revolution:</div><div class='add'>+    description:</div><div class='add'>+      Define the number of pulses per fan revolution for each tachometer</div><div class='add'>+      input as an integer.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 4</div><div class='add'>+    default: 2</div><div class='add'>+</div><div class='add'>+  pwms:</div><div class='add'>+    description: The PWM that is used to control the fan.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#cooling-cells": true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - pwms</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm-fan {</div><div class='add'>+      compatible = "pwm-fan";</div><div class='add'>+      cooling-levels = &lt;0 102 170 230&gt;;</div><div class='add'>+      pwms = &lt;&amp;pwm 0 10000 0&gt;;</div><div class='add'>+      #cooling-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    thermal-zones {</div><div class='add'>+      cpu_thermal: cpu-thermal {</div><div class='add'>+        thermal-sensors = &lt;&amp;tmu 0&gt;;</div><div class='add'>+        polling-delay-passive = &lt;0&gt;;</div><div class='add'>+        polling-delay = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        trips {</div><div class='add'>+          cpu_alert1: cpu-alert1 {</div><div class='add'>+            temperature = &lt;100000&gt;; /* millicelsius */</div><div class='add'>+            hysteresis = &lt;2000&gt;; /* millicelsius */</div><div class='add'>+            type = "passive";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        cooling-maps {</div><div class='add'>+          map0 {</div><div class='add'>+            trip = &lt;&amp;cpu_alert1&gt;;</div><div class='add'>+            cooling-device = &lt;&amp;fan0 0 1&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    pwm-fan {</div><div class='add'>+      compatible = "pwm-fan";</div><div class='add'>+      pwms = &lt;&amp;pwm 0 40000 0&gt;;</div><div class='add'>+      fan-supply = &lt;&amp;reg_fan&gt;;</div><div class='add'>+      interrupt-parent = &lt;&amp;gpio5&gt;;</div><div class='add'>+      interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+      pulses-per-revolution = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml<br/>index 4669217d01e1..80df7182ea28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/sensirion,sht15.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Sensirion SHT15 humidity and temperature sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml<br/>index 7d49478d9668..159238efa9ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Christopher Ruehl chris.ruehl@gtsys.com.hk</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensor</div><div class='add'>+  The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensors</div><div class='ctx'>   designed especially for battery-driven high-volume consumer electronics</div><div class='ctx'>   applications.</div><div class='ctx'>   For further information refere to Documentation/hwmon/shtc1.rst</div><div class='hunk'>@@ -31,13 +31,13 @@ properties:</div><div class='ctx'>   sensirion,blocking-io:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='del'>-      If set, the driver hold the i2c bus until measurement is finished.</div><div class='add'>+      If set, the driver holds the i2c bus until the measurement is finished.</div><div class='ctx'> </div><div class='ctx'>   sensirion,low-precision:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='del'>-      If set, the sensor aquire data with low precision (not recommended).</div><div class='del'>-      The driver aquire data with high precision by default.</div><div class='add'>+      If set, the sensor acquires data with low precision (not recommended).</div><div class='add'>+      The driver acquires data with high precision by default.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml b/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml<br/>new file mode 100644<br/>index 000000000000..f5b34528928d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/starfive,jh71x0-temp.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/starfive,jh71x0-temp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive JH71x0 Temperature Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Emil Renner Berthing &lt;kernel@esmil.dk&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  StarFive Technology Co. JH71x0 embedded temperature sensor</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - starfive,jh7100-temp</div><div class='add'>+      - starfive,jh7110-temp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: "sense"</div><div class='add'>+      - const: "bus"</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: "sense"</div><div class='add'>+      - const: "bus"</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/starfive-jh7100.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/starfive-jh7100.h&gt;</div><div class='add'>+</div><div class='add'>+    temperature-sensor@124a0000 {</div><div class='add'>+        compatible = "starfive,jh7100-temp";</div><div class='add'>+        reg = &lt;0x124a0000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkgen JH7100_CLK_TEMP_SENSE&gt;,</div><div class='add'>+                 &lt;&amp;clkgen JH7100_CLK_TEMP_APB&gt;;</div><div class='add'>+        clock-names = "sense", "bus";</div><div class='add'>+        #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+        resets = &lt;&amp;rstgen JH7100_RSTN_TEMP_SENSE&gt;,</div><div class='add'>+                 &lt;&amp;rstgen JH7100_RSTN_TEMP_APB&gt;;</div><div class='add'>+        reset-names = "sense", "bus";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml b/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml<br/>index 47af97bb4ced..8648877d2d01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,ina2xx.yaml</a></div><div class='hunk'>@@ -57,6 +57,10 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [1, 2, 4, 8]</div><div class='ctx'> </div><div class='add'>+  vs-supply:</div><div class='add'>+    description: phandle to the regulator that provides the VS supply typically</div><div class='add'>+      in range from 2.7 V to 5.5 V.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -73,5 +77,6 @@ examples:</div><div class='ctx'>             compatible = "ti,ina220";</div><div class='ctx'>             reg = &lt;0x44&gt;;</div><div class='ctx'>             shunt-resistor = &lt;1000&gt;;</div><div class='add'>+            vs-supply = &lt;&amp;vdd_3v0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml<br/>index d3eff4fac107..c5a889e3e27b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,tmp102.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: TMP102 temperature sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml<br/>index eda55bbc172d..dcbc6fbc3b48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: TMP108 temperature sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp401.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp401.yaml<br/>new file mode 100644<br/>index 000000000000..0e8ddf0ad789<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp401.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,tmp401.yaml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/hwmon/ti,tmp401.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TMP401, TPM411 and TMP43x temperature sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  ±1°C Remote and Local temperature sensor</div><div class='add'>+</div><div class='add'>+  Datasheets:</div><div class='add'>+  https://www.ti.com/lit/ds/symlink/tmp401.pdf</div><div class='add'>+  https://www.ti.com/lit/ds/symlink/tmp411.pdf</div><div class='add'>+  https://www.ti.com/lit/ds/symlink/tmp431.pdf</div><div class='add'>+  https://www.ti.com/lit/ds/symlink/tmp435.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,tmp401</div><div class='add'>+      - ti,tmp411</div><div class='add'>+      - ti,tmp431</div><div class='add'>+      - ti,tmp432</div><div class='add'>+      - ti,tmp435</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ti,extended-range-enable:</div><div class='add'>+    description:</div><div class='add'>+      When set, this sensor measures over extended temperature range.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  ti,n-factor:</div><div class='add'>+    description:</div><div class='add'>+      value to be used for converting remote channel measurements to</div><div class='add'>+      temperature.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/int32</div><div class='add'>+    minimum: -128</div><div class='add'>+    maximum: 127</div><div class='add'>+</div><div class='add'>+  ti,beta-compensation:</div><div class='add'>+    description:</div><div class='add'>+      value to select beta correction range.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,tmp401</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,n-factor: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,tmp401</div><div class='add'>+              - ti,tmp411</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,beta-compensation: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      sensor@4c {</div><div class='add'>+        compatible = "ti,tmp401";</div><div class='add'>+        reg = &lt;0x4c&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      sensor@4c {</div><div class='add'>+        compatible = "ti,tmp431";</div><div class='add'>+        reg = &lt;0x4c&gt;;</div><div class='add'>+        ti,extended-range-enable;</div><div class='add'>+        ti,n-factor = &lt;0x3b&gt;;</div><div class='add'>+        ti,beta-compensation = &lt;0x7&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml<br/>index 36f649938fb7..a6f1fa75a67c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,tmp421.yaml</a></div><div class='hunk'>@@ -58,10 +58,9 @@ patternProperties:</div><div class='ctx'>         description: |</div><div class='ctx'>           The value (two's complement) to be programmed in the channel specific N correction register.</div><div class='ctx'>           For remote channels only.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        items:</div><div class='del'>-          minimum: 0</div><div class='del'>-          maximum: 255</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/int32</div><div class='add'>+        minimum: -128</div><div class='add'>+        maximum: 127</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml<br/>index 801ca9ba7d34..f9c00cbb2806 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,tmp464.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: TMP464 and TMP468 temperature sensors</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Agathe Porte &lt;agathe.porte@nokia.com&gt;</div><div class='add'>+  - Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   ±0.0625°C Remote and Local temperature sensor</div><div class='hunk'>@@ -58,9 +58,8 @@ patternProperties:</div><div class='ctx'>           The value (two's complement) to be programmed in the channel specific N correction register.</div><div class='ctx'>           For remote channels only.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/int32</div><div class='del'>-        items:</div><div class='del'>-          minimum: -128</div><div class='del'>-          maximum: 127</div><div class='add'>+        minimum: -128</div><div class='add'>+        maximum: 127</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml b/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml<br/>index 1502b22c77cc..fde5225ce012 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,tmp513.yaml</a></div><div class='hunk'>@@ -77,15 +77,15 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     i2c {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-          tmp513@5c {</div><div class='del'>-              compatible = "ti,tmp513";</div><div class='del'>-              reg = &lt;0x5C&gt;;</div><div class='del'>-              shunt-resistor-micro-ohms = &lt;330000&gt;;</div><div class='del'>-              ti,bus-range-microvolt = &lt;32000000&gt;;</div><div class='del'>-              ti,pga-gain = &lt;8&gt;;</div><div class='del'>-              ti,nfactor = &lt;0x1 0xF3 0x00&gt;;</div><div class='del'>-          };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        tmp513@5c {</div><div class='add'>+            compatible = "ti,tmp513";</div><div class='add'>+            reg = &lt;0x5c&gt;;</div><div class='add'>+            shunt-resistor-micro-ohms = &lt;330000&gt;;</div><div class='add'>+            ti,bus-range-microvolt = &lt;32000000&gt;;</div><div class='add'>+            ti,pga-gain = &lt;8&gt;;</div><div class='add'>+            ti,nfactor = &lt;0x1 0xf3 0x00&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml b/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml<br/>index 3bc8e73dfbf0..bce68a326919 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/ti,tps23861.yaml</a></div><div class='hunk'>@@ -40,12 +40,12 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     i2c {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-          tps23861@30 {</div><div class='del'>-              compatible = "ti,tps23861";</div><div class='del'>-              reg = &lt;0x30&gt;;</div><div class='del'>-              shunt-resistor-micro-ohms = &lt;255000&gt;;</div><div class='del'>-          };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        tps23861@30 {</div><div class='add'>+            compatible = "ti,tps23861";</div><div class='add'>+            reg = &lt;0x30&gt;;</div><div class='add'>+            shunt-resistor-micro-ohms = &lt;255000&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/hwmon/vexpress.txt b/Documentation/devicetree/bindings/hwmon/vexpress.txt<br/>index 9c27ed694bbb..4a4df4ffc460 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/vexpress.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/hwmon/vexpress.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/hwmon/vexpress.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/hwmon/vexpress.txt</a></div><div class='hunk'>@@ -9,7 +9,7 @@ Requires node properties:</div><div class='ctx'> 	"arm,vexpress-power"</div><div class='ctx'> 	"arm,vexpress-energy"</div><div class='ctx'> - "arm,vexpress-sysreg,func" when controlled via vexpress-sysreg</div><div class='del'>-  (see Documentation/devicetree/bindings/arm/vexpress-sysreg.txt</div><div class='add'>+  (see Documentation/devicetree/bindings/arm/vexpress-config.yaml</div><div class='ctx'>   for more details)</div><div class='ctx'> </div><div class='ctx'> Optional node properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml b/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml<br/>index 1b03810d4b4d..5a799246a373 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/allwinner,sun6i-a31-p2wi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/allwinner,sun6i-a31-p2wi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 P2WI (Push/Pull 2 Wires Interface) Device Tree Bindings</div><div class='add'>+title: Allwinner A31 P2WI (Push/Pull 2 Wires Interface)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml<br/>index 6ecb0270d88d..26bed558c6b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/i2c/amlogic,meson6-i2c.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/amlogic,meson6-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson I2C Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'>   - Beniamino Galvani &lt;b.galvani@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/apple,i2c.yaml b/Documentation/devicetree/bindings/i2c/apple,i2c.yaml<br/>index 4ac61fec90e2..077d2a539c83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/apple,i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/apple,i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/apple,i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/apple,i2c.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/i2c/apple,i2c.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/apple,i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Apple/PASemi I2C controller</div><div class='ctx'> </div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,t8103-i2c</div><div class='add'>+          - apple,t8112-i2c</div><div class='ctx'>           - apple,t6000-i2c</div><div class='ctx'>       - const: apple,i2c</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml b/Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml<br/>new file mode 100644<br/>index 000000000000..e58465d1b0c8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/arm,i2c-versatile.yaml</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/arm,i2c-versatile.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: I2C Controller on ARM Ltd development platforms</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,versatile-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+...</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml<br/>index f597f73ccd87..6df27b47b922 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings</div><div class='add'>+title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rayn Chen &lt;rayn_chen@aspeedtech.com&gt;</div><div class='hunk'>@@ -60,7 +60,7 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/aspeed-clock.h&gt;</div><div class='del'>-    i2c0: i2c-bus@40 {</div><div class='add'>+    i2c@40 {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'>       compatible = "aspeed,ast2500-i2c-bus";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml b/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml<br/>index ea2303c0e143..6adedd3ec399 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml</a></div><div class='hunk'>@@ -75,7 +75,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "i2c-controller.yaml"</div><div class='add'>+  - $ref: i2c-controller.yaml</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.txt b/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.txt<br/>deleted file mode 100644<br/>index 1b87b741fa8e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/brcm,kona-i2c.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-Broadcom Kona Family I2C</div><div class='del'>-=========================</div><div class='del'>-</div><div class='del'>-This I2C controller is used in the following Broadcom SoCs:</div><div class='del'>-</div><div class='del'>-  BCM11130</div><div class='del'>-  BCM11140</div><div class='del'>-  BCM11351</div><div class='del'>-  BCM28145</div><div class='del'>-  BCM28155</div><div class='del'>-</div><div class='del'>-Required Properties</div><div class='del'>--------------------</div><div class='del'>-- compatible: "brcm,bcm11351-i2c", "brcm,kona-i2c"</div><div class='del'>-- reg: Physical base address and length of controller registers</div><div class='del'>-- interrupts: The interrupt number used by the controller</div><div class='del'>-- clocks: clock specifier for the kona i2c external clock</div><div class='del'>-- clock-frequency: The I2C bus frequency in Hz</div><div class='del'>-- #address-cells: Should be &lt;1&gt;</div><div class='del'>-- #size-cells: Should be &lt;0&gt;</div><div class='del'>-</div><div class='del'>-Refer to clocks/clock-bindings.txt for generic clock consumer</div><div class='del'>-properties.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-i2c@3e016000 {</div><div class='del'>-	compatible = "brcm,bcm11351-i2c","brcm,kona-i2c";</div><div class='del'>-	reg = &lt;0x3e016000 0x80&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clocks = &lt;&amp;bsc1_clk&gt;;</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.yaml b/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..7a694af90fc6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/brcm,kona-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/brcm,kona-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/brcm,kona-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom Kona family I2C controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - brcm,bcm11351-i2c</div><div class='add'>+          - brcm,bcm21664-i2c</div><div class='add'>+          - brcm,bcm23550-i2c</div><div class='add'>+      - const: brcm,kona-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    enum: [ 100000, 400000, 1000000, 3400000 ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-frequency</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c@3e016000 {</div><div class='add'>+        compatible = "brcm,bcm11351-i2c", "brcm,kona-i2c";</div><div class='add'>+        reg = &lt;0x3e016000 0x80&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;bsc1_clk&gt;;</div><div class='add'>+        clock-frequency = &lt;400000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml<br/>index 1ca1cd19bd1d..cb24d7b3221c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/cdns,i2c-r1p10.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence I2C controller Device Tree Bindings</div><div class='add'>+title: Cadence I2C controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='hunk'>@@ -24,6 +24,9 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 1</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -38,6 +41,13 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       Input clock name.</div><div class='ctx'> </div><div class='add'>+  fifo-depth:</div><div class='add'>+    description:</div><div class='add'>+      Size of the data FIFO in bytes.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 16</div><div class='add'>+    enum: [2, 4, 8, 16, 32, 64, 128, 256]</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -52,9 +62,11 @@ examples:</div><div class='ctx'>     i2c@e0004000 {</div><div class='ctx'>         compatible = "cdns,i2c-r1p10";</div><div class='ctx'>         clocks = &lt;&amp;clkc 38&gt;;</div><div class='add'>+        resets = &lt;&amp;rstc 288&gt;;</div><div class='ctx'>         interrupts = &lt;GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>         reg = &lt;0xe0004000 0x1000&gt;;</div><div class='ctx'>         clock-frequency = &lt;400000&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='add'>+        fifo-depth = &lt;8&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml b/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml<br/>index 6e1c70e9275e..ab151c9db219 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/google,cros-ec-i2c-tunnel.yaml</a></div><div class='hunk'>@@ -39,7 +39,7 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -47,6 +47,7 @@ examples:</div><div class='ctx'>             compatible = "google,cros-ec-spi";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+            interrupts = &lt;99 0&gt;;</div><div class='ctx'> </div><div class='ctx'>             i2c-tunnel {</div><div class='ctx'>                 compatible = "google,cros-ec-i2c-tunnel";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/hisilicon,ascend910-i2c.yaml b/Documentation/devicetree/bindings/i2c/hisilicon,ascend910-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..7d7a8de7bcd8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/hisilicon,ascend910-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/hisilicon,ascend910-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/hisilicon,ascend910-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HiSilicon common I2C controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yicong Yang &lt;yangyicong@hisilicon.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The HiSilicon common I2C controller can be used for many different</div><div class='add'>+  types of SoC such as Huawei Ascend AI series chips.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: hisilicon,ascend910-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 400000</div><div class='add'>+</div><div class='add'>+  i2c-sda-falling-time-ns:</div><div class='add'>+    default: 343</div><div class='add'>+</div><div class='add'>+  i2c-scl-falling-time-ns:</div><div class='add'>+    default: 203</div><div class='add'>+</div><div class='add'>+  i2c-sda-hold-time-ns:</div><div class='add'>+    default: 830</div><div class='add'>+</div><div class='add'>+  i2c-scl-rising-time-ns:</div><div class='add'>+    default: 365</div><div class='add'>+</div><div class='add'>+  i2c-digital-filter-width-ns:</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c@38b0000 {</div><div class='add'>+      compatible = "hisilicon,ascend910-i2c";</div><div class='add'>+      reg = &lt;0x38b0000 0x10000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      i2c-sda-falling-time-ns = &lt;56&gt;;</div><div class='add'>+      i2c-scl-falling-time-ns = &lt;56&gt;;</div><div class='add'>+      i2c-sda-hold-time-ns = &lt;56&gt;;</div><div class='add'>+      i2c-scl-rising-time-ns = &lt;56&gt;;</div><div class='add'>+      i2c-digital-filter;</div><div class='add'>+      i2c-digital-filter-width-ns = &lt;0x0&gt;;</div><div class='add'>+      clocks = &lt;&amp;alg_clk&gt;;</div><div class='add'>+      clock-frequency = &lt;400000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml b/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..6604dcd47251<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/hpe,gxp-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/hpe,gxp-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HPE GXP SoC I2C Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nick Hawkins &lt;nick.hawkins@hpe.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: hpe,gxp-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 100000</div><div class='add'>+</div><div class='add'>+  hpe,sysreg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the global status and enable interrupt registers shared</div><div class='add'>+      between each I2C engine controller instance. It enables the I2C</div><div class='add'>+      engine controller to act as both a master or slave by being able to</div><div class='add'>+      arm and respond to interrupts from its engine. Each bit in the</div><div class='add'>+      registers represent the respective bit position.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c@2600 {</div><div class='add'>+        compatible = "hpe,gxp-i2c";</div><div class='add'>+        reg = &lt;0x2500 0x70&gt;;</div><div class='add'>+        interrupts = &lt;9&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        hpe,sysreg = &lt;&amp;sysreg_system_controller&gt;;</div><div class='add'>+        clock-frequency = &lt;10000&gt;;</div><div class='add'>+</div><div class='add'>+        eeprom@50 {</div><div class='add'>+            compatible = "atmel,24c128";</div><div class='add'>+            reg = &lt;0x50&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-efm32.txt b/Documentation/devicetree/bindings/i2c/i2c-efm32.txt<br/>deleted file mode 100644<br/>index 3b30e54ae3c7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-efm32.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-efm32.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-* Energymicro efm32 i2c controller</div><div class='del'>-</div><div class='del'>-Required properties :</div><div class='del'>-</div><div class='del'>- - reg : Offset and length of the register set for the device</div><div class='del'>- - compatible : should be "energymicro,efm32-i2c"</div><div class='del'>- - interrupts : the interrupt number</div><div class='del'>- - clocks : reference to the module clock</div><div class='del'>-</div><div class='del'>-Recommended properties :</div><div class='del'>-</div><div class='del'>- - clock-frequency : maximal I2C bus clock frequency in Hz.</div><div class='del'>- - energymicro,location : Decides the location of the USART I/O pins.</div><div class='del'>-   Allowed range : [0 .. 6]</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	i2c0: i2c@4000a000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "energymicro,efm32-i2c";</div><div class='del'>-		reg = &lt;0x4000a000 0x400&gt;;</div><div class='del'>-		interrupts = &lt;9&gt;;</div><div class='del'>-		clocks = &lt;&amp;cmu clk_HFPERCLKI2C0&gt;;</div><div class='del'>-		clock-frequency = &lt;100000&gt;;</div><div class='del'>-		energymicro,location = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-		eeprom@50 {</div><div class='del'>-			compatible = "microchip,24c02";</div><div class='del'>-			reg = &lt;0x50&gt;;</div><div class='del'>-			pagesize = &lt;16&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml b/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml<br/>index 19874e8b73b9..3e52a0db6c41 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung's High Speed I2C controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Samsung's High Speed I2C controller is used to interface with I2C devices</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-gate.yaml b/Documentation/devicetree/bindings/i2c/i2c-gate.yaml<br/>index bd67b0766599..0cdc3e890df7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-gate.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-gate.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-gate.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-gate.yaml</a></div><div class='hunk'>@@ -36,4 +36,3 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml b/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml<br/>index fd040284561f..afd4925c2a7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-gpio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/i2c-gpio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for GPIO bitbanged I2C</div><div class='add'>+title: GPIO bitbanged I2C</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Wolfram Sang &lt;wsa@kernel.org&gt;</div><div class='hunk'>@@ -33,6 +33,10 @@ properties:</div><div class='ctx'>       open drain.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  i2c-gpio,sda-output-only:</div><div class='add'>+    description: sda as output only</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   i2c-gpio,scl-output-only:</div><div class='ctx'>     description: scl as output only</div><div class='ctx'>     type: boolean</div><div class='hunk'>@@ -63,6 +67,28 @@ properties:</div><div class='ctx'>       GPIO line used for SCL into open drain mode, and that something is not</div><div class='ctx'>       the GPIO chip. It is essentially an inconsistency flag.</div><div class='ctx'> </div><div class='add'>+  i2c-gpio,sda-has-no-pullup:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: sda is used in a non-compliant way and has no pull-up.</div><div class='add'>+      Therefore disable open-drain. This property is mutually-exclusive</div><div class='add'>+      with i2c-gpio,sda-open-drain.</div><div class='add'>+</div><div class='add'>+  i2c-gpio,scl-has-no-pullup:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: scl is used in a non-compliant way and has no pull-up.</div><div class='add'>+      Therefore disable open-drain. This property is mutually-exclusive</div><div class='add'>+      with i2c-gpio,scl-open-drain.</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  i2c-gpio,sda-has-no-pullup:</div><div class='add'>+    not:</div><div class='add'>+      required:</div><div class='add'>+        - i2c-gpio,sda-open-drain</div><div class='add'>+  i2c-gpio,scl-has-no-pullup:</div><div class='add'>+    not:</div><div class='add'>+      required:</div><div class='add'>+        - i2c-gpio,scl-open-drain</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - sda-gpios</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml<br/>index 529bea56d324..4656f5112b84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>               - fsl,imx8dxl-lpi2c</div><div class='ctx'>               - fsl,imx8qm-lpi2c</div><div class='ctx'>               - fsl,imx8ulp-lpi2c</div><div class='add'>+              - fsl,imx93-lpi2c</div><div class='ctx'>           - const: fsl,imx7ulp-lpi2c</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -37,10 +38,22 @@ properties:</div><div class='ctx'>   clock-frequency: true</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: per</div><div class='add'>+      - const: ipg</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMA controller phandle and request line for TX</div><div class='add'>+      - description: DMA controller phandle and request line for RX</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -63,5 +76,6 @@ examples:</div><div class='ctx'>         reg = &lt;0x40A50000 0x10000&gt;;</div><div class='ctx'>         interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'>         interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        clocks = &lt;&amp;clks IMX7ULP_CLK_LPI2C7&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX7ULP_CLK_LPI2C7&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX7ULP_CLK_NIC1_BUS_DIV&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml<br/>index 01720e338b4c..85ee1282d6d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-imx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-imx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-imx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-imx.yaml</a></div><div class='hunk'>@@ -19,6 +19,17 @@ properties:</div><div class='ctx'>       - const: fsl,imx21-i2c</div><div class='ctx'>       - const: fsl,vf610-i2c</div><div class='ctx'>       - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,ls1012a-i2c</div><div class='add'>+              - fsl,ls1021a-i2c</div><div class='add'>+              - fsl,ls1028a-i2c</div><div class='add'>+              - fsl,ls1043a-i2c</div><div class='add'>+              - fsl,ls1046a-i2c</div><div class='add'>+              - fsl,ls1088a-i2c</div><div class='add'>+              - fsl,ls208xa-i2c</div><div class='add'>+              - fsl,lx2160a-i2c</div><div class='add'>+          - const: fsl,vf610-i2c</div><div class='add'>+      - items:</div><div class='ctx'>           - const: fsl,imx35-i2c</div><div class='ctx'>           - const: fsl,imx1-i2c</div><div class='ctx'>       - items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml b/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml<br/>index 018e1b944424..70fb69b923c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mpc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mpc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-mpc.yaml</a></div><div class='hunk'>@@ -43,6 +43,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   fsl,timeout:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    deprecated: true</div><div class='ctx'>     description: |</div><div class='ctx'>       I2C bus timeout in microseconds</div><div class='ctx'> </div><div class='hunk'>@@ -95,6 +96,6 @@ examples:</div><div class='ctx'>         interrupts = &lt;43 2&gt;;</div><div class='ctx'>         interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='ctx'>         clock-frequency = &lt;400000&gt;;</div><div class='del'>-        fsl,timeout = &lt;10000&gt;;</div><div class='add'>+        i2c-scl-clk-low-timeout-us = &lt;10000&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt<br/>deleted file mode 100644<br/>index 026985b8f61a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,53 +0,0 @@</div><div class='del'>-* MediaTek's I2C controller</div><div class='del'>-</div><div class='del'>-The MediaTek's I2C controller is used to interface with I2C devices.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: value should be either of the following.</div><div class='del'>-      "mediatek,mt2701-i2c", "mediatek,mt6577-i2c": for MediaTek MT2701</div><div class='del'>-      "mediatek,mt2712-i2c": for MediaTek MT2712</div><div class='del'>-      "mediatek,mt6577-i2c": for MediaTek MT6577</div><div class='del'>-      "mediatek,mt6589-i2c": for MediaTek MT6589</div><div class='del'>-      "mediatek,mt6797-i2c", "mediatek,mt6577-i2c": for MediaTek MT6797</div><div class='del'>-      "mediatek,mt7622-i2c": for MediaTek MT7622</div><div class='del'>-      "mediatek,mt7623-i2c", "mediatek,mt6577-i2c": for MediaTek MT7623</div><div class='del'>-      "mediatek,mt7629-i2c", "mediatek,mt2712-i2c": for MediaTek MT7629</div><div class='del'>-      "mediatek,mt8168-i2c": for MediaTek MT8168</div><div class='del'>-      "mediatek,mt8173-i2c": for MediaTek MT8173</div><div class='del'>-      "mediatek,mt8183-i2c": for MediaTek MT8183</div><div class='del'>-      "mediatek,mt8186-i2c": for MediaTek MT8186</div><div class='del'>-      "mediatek,mt8192-i2c": for MediaTek MT8192</div><div class='del'>-      "mediatek,mt8195-i2c", "mediatek,mt8192-i2c": for MediaTek MT8195</div><div class='del'>-      "mediatek,mt8516-i2c", "mediatek,mt2712-i2c": for MediaTek MT8516</div><div class='del'>-  - reg: physical base address of the controller and dma base, length of memory</div><div class='del'>-    mapped region.</div><div class='del'>-  - interrupts: interrupt number to the cpu.</div><div class='del'>-  - clock-div: the fixed value for frequency divider of clock source in i2c</div><div class='del'>-    module. Each IC may be different.</div><div class='del'>-  - clocks: clock name from clock manager</div><div class='del'>-  - clock-names: Must include "main" and "dma", "arb" is for multi-master that</div><div class='del'>-    one bus has more than two i2c controllers, if enable have-pmic need include</div><div class='del'>-    "pmic" extra.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - clock-frequency: Frequency in Hz of the bus when transfer, the default value</div><div class='del'>-    is 100000.</div><div class='del'>-  - mediatek,have-pmic: platform can control i2c form special pmic side.</div><div class='del'>-    Only mt6589 and mt8135 support this feature.</div><div class='del'>-  - mediatek,use-push-pull: IO config use push-pull mode.</div><div class='del'>-  - vbus-supply: phandle to the regulator that provides power to SCL/SDA.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	i2c0: i2c@1100d000 {</div><div class='del'>-			compatible = "mediatek,mt6577-i2c";</div><div class='del'>-			reg = &lt;0x1100d000 0x70&gt;,</div><div class='del'>-			      &lt;0x11000300 0x80&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-			clock-frequency = &lt;400000&gt;;</div><div class='del'>-			mediatek,have-pmic;</div><div class='del'>-			clock-div = &lt;16&gt;;</div><div class='del'>-			clocks = &lt;&amp;i2c0_ck&gt;, &lt;&amp;ap_dma_ck&gt;;</div><div class='del'>-			clock-names = "main", "dma";</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml<br/>new file mode 100644<br/>index 000000000000..fda0467cdd95<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek I2C controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This driver interfaces with the native I2C controller present in</div><div class='add'>+  various MediaTek SoCs.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Qii Wang &lt;qii.wang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: mediatek,mt2712-i2c</div><div class='add'>+      - const: mediatek,mt6577-i2c</div><div class='add'>+      - const: mediatek,mt6589-i2c</div><div class='add'>+      - const: mediatek,mt7622-i2c</div><div class='add'>+      - const: mediatek,mt7981-i2c</div><div class='add'>+      - const: mediatek,mt7986-i2c</div><div class='add'>+      - const: mediatek,mt8168-i2c</div><div class='add'>+      - const: mediatek,mt8173-i2c</div><div class='add'>+      - const: mediatek,mt8183-i2c</div><div class='add'>+      - const: mediatek,mt8186-i2c</div><div class='add'>+      - const: mediatek,mt8188-i2c</div><div class='add'>+      - const: mediatek,mt8192-i2c</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt7629-i2c</div><div class='add'>+              - mediatek,mt8516-i2c</div><div class='add'>+          - const: mediatek,mt2712-i2c</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2701-i2c</div><div class='add'>+              - mediatek,mt6797-i2c</div><div class='add'>+              - mediatek,mt7623-i2c</div><div class='add'>+          - const: mediatek,mt6577-i2c</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8365-i2c</div><div class='add'>+          - const: mediatek,mt8168-i2c</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt6795-i2c</div><div class='add'>+          - const: mediatek,mt8173-i2c</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8195-i2c</div><div class='add'>+          - const: mediatek,mt8192-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Physical base address</div><div class='add'>+      - description: DMA base address</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: Main clock for I2C bus</div><div class='add'>+      - description: Clock for I2C via DMA</div><div class='add'>+      - description: Bus arbitrator clock</div><div class='add'>+      - description: Clock for I2C from PMIC</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: main</div><div class='add'>+      - const: dma</div><div class='add'>+      - const: arb</div><div class='add'>+      - const: pmic</div><div class='add'>+</div><div class='add'>+  clock-div:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Frequency divider of clock source in I2C module</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 100000</div><div class='add'>+    description:</div><div class='add'>+      SCL frequency to use (in Hz). If omitted, 100kHz is used.</div><div class='add'>+</div><div class='add'>+  mediatek,have-pmic:</div><div class='add'>+    description: Platform controls I2C from PMIC side</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mediatek,use-push-pull:</div><div class='add'>+    description: Use push-pull mode I/O config</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  vbus-supply:</div><div class='add'>+    description: Phandle to the regulator providing power to SCL/SDA</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - clock-div</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c0: i2c@1100d000 {</div><div class='add'>+      compatible = "mediatek,mt6577-i2c";</div><div class='add'>+      reg = &lt;0x1100d000 0x70&gt;, &lt;0x11000300 0x80&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+      clocks = &lt;&amp;i2c0_ck&gt;, &lt;&amp;ap_dma_ck&gt;;</div><div class='add'>+      clock-names = "main", "dma";</div><div class='add'>+      clock-div = &lt;16&gt;;</div><div class='add'>+      clock-frequency = &lt;400000&gt;;</div><div class='add'>+      mediatek,have-pmic;</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt b/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt<br/>deleted file mode 100644<br/>index bc36f0eb94cd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mt7621.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mt7621.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-MediaTek MT7621/MT7628 I2C master controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be one of the following:</div><div class='del'>-  - "mediatek,mt7621-i2c": for MT7621/MT7628/MT7688 platforms</div><div class='del'>-- #address-cells: should be 1.</div><div class='del'>-- #size-cells: should be 0.</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- resets: phandle to the reset controller asserting this device in</div><div class='del'>-          reset</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-</div><div class='del'>-Optional properties :</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-i2c: i2c@900 {</div><div class='del'>-	compatible = "mediatek,mt7621-i2c";</div><div class='del'>-	reg = &lt;0x900 0x100&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	resets = &lt;&amp;rstctrl 16&gt;;</div><div class='del'>-	reset-names = "i2c";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml<br/>index 6e0a5686af04..f34cc7ad5a00 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-mux-gpio.yaml</a></div><div class='hunk'>@@ -45,7 +45,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   i2c-parent:</div><div class='ctx'>     description: phandle of the I2C bus that this multiplexer's master-side port is connected to</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>   mux-gpios:</div><div class='ctx'>     description: list of GPIOs used to control the muxer</div><div class='hunk'>@@ -55,7 +55,7 @@ properties:</div><div class='ctx'>   idle-state:</div><div class='ctx'>     description: Value to set the muxer to when idle. When no value is given, it defaults to the</div><div class='ctx'>       last value used.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: i2c-mux.yaml</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml b/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml<br/>index 9b0603a72f40..b6af924dee2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-mux-gpmux.yaml</a></div><div class='hunk'>@@ -28,7 +28,6 @@ description: |+</div><div class='ctx'>       '------------'                  '-----'  '-----'  '-----'</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/i2c/i2c-mux.yaml#</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-nomadik.txt b/Documentation/devicetree/bindings/i2c/i2c-nomadik.txt<br/>deleted file mode 100644<br/>index 72065b0ff680..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-nomadik.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-nomadik.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-I2C for Nomadik based systems</div><div class='del'>-</div><div class='del'>-Required (non-standard) properties:</div><div class='del'>- - Nil</div><div class='del'>-</div><div class='del'>-Recommended (non-standard) properties:</div><div class='del'>- - clock-frequency : Maximum bus clock frequency for the device</div><div class='del'>-</div><div class='del'>-Optional (non-standard) properties:</div><div class='del'>- - Nil</div><div class='del'>-</div><div class='del'>-Example :</div><div class='del'>-</div><div class='del'>-i2c@80004000 {</div><div class='del'>-        compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";</div><div class='del'>-        reg = &lt;0x80004000 0x1000&gt;;</div><div class='del'>-        interrupts = &lt;0 21 0x4&gt;;</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-        v-i2c-supply = &lt;&amp;db8500_vape_reg&gt;;</div><div class='del'>-</div><div class='del'>-        clock-frequency = &lt;400000&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt<br/>deleted file mode 100644<br/>index a37c9455b244..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-ocores.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-ocores.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,78 +0,0 @@</div><div class='del'>-Device tree configuration for i2c-ocores</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible      : "opencores,i2c-ocores"</div><div class='del'>-                    "aeroflexgaisler,i2cmst"</div><div class='del'>-                    "sifive,fu540-c000-i2c", "sifive,i2c0"</div><div class='del'>-                    For Opencore based I2C IP block reimplemented in</div><div class='del'>-                    FU540-C000 SoC.</div><div class='del'>-                    "sifive,fu740-c000-i2c", "sifive,i2c0"</div><div class='del'>-                    For Opencore based I2C IP block reimplemented in</div><div class='del'>-                    FU740-C000 SoC.</div><div class='del'>-                    Please refer to sifive-blocks-ip-versioning.txt for</div><div class='del'>-                    additional details.</div><div class='del'>-- reg             : bus address start and address range size of device</div><div class='del'>-- clocks          : handle to the controller clock; see the note below.</div><div class='del'>-                    Mutually exclusive with opencores,ip-clock-frequency</div><div class='del'>-- opencores,ip-clock-frequency: frequency of the controller clock in Hz;</div><div class='del'>-                    see the note below. Mutually exclusive with clocks</div><div class='del'>-- #address-cells  : should be &lt;1&gt;</div><div class='del'>-- #size-cells     : should be &lt;0&gt;</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts      : interrupt number.</div><div class='del'>-- clock-frequency : frequency of bus clock in Hz; see the note below.</div><div class='del'>-                    Defaults to 100 KHz when the property is not specified</div><div class='del'>-- reg-shift       : device register offsets are shifted by this value</div><div class='del'>-- reg-io-width    : io register width in bytes (1, 2 or 4)</div><div class='del'>-- regstep         : deprecated, use reg-shift above</div><div class='del'>-</div><div class='del'>-Note</div><div class='del'>-clock-frequency property is meant to control the bus frequency for i2c bus</div><div class='del'>-drivers, but it was incorrectly used to specify i2c controller input clock</div><div class='del'>-frequency. So the following rules are set to fix this situation:</div><div class='del'>-- if clock-frequency is present and neither opencores,ip-clock-frequency nor</div><div class='del'>-  clocks are, then clock-frequency specifies i2c controller clock frequency.</div><div class='del'>-  This is to keep backwards compatibility with setups using old DTB. i2c bus</div><div class='del'>-  frequency is fixed at 100 KHz.</div><div class='del'>-- if clocks is present it specifies i2c controller clock. clock-frequency</div><div class='del'>-  property specifies i2c bus frequency.</div><div class='del'>-- if opencores,ip-clock-frequency is present it specifies i2c controller</div><div class='del'>-  clock frequency. clock-frequency property specifies i2c bus frequency.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-	i2c0: ocores@a0000000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "opencores,i2c-ocores";</div><div class='del'>-		reg = &lt;0xa0000000 0x8&gt;;</div><div class='del'>-		interrupts = &lt;10&gt;;</div><div class='del'>-		opencores,ip-clock-frequency = &lt;20000000&gt;;</div><div class='del'>-</div><div class='del'>-		reg-shift = &lt;0&gt;;	/* 8 bit registers */</div><div class='del'>-		reg-io-width = &lt;1&gt;;	/* 8 bit read/write */</div><div class='del'>-</div><div class='del'>-		dummy@60 {</div><div class='del'>-			compatible = "dummy";</div><div class='del'>-			reg = &lt;0x60&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-or</div><div class='del'>-	i2c0: ocores@a0000000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "opencores,i2c-ocores";</div><div class='del'>-		reg = &lt;0xa0000000 0x8&gt;;</div><div class='del'>-		interrupts = &lt;10&gt;;</div><div class='del'>-		clocks = &lt;&amp;osc&gt;;</div><div class='del'>-		clock-frequency = &lt;400000&gt;; /* i2c bus frequency 400 KHz */</div><div class='del'>-</div><div class='del'>-		reg-shift = &lt;0&gt;;	/* 8 bit registers */</div><div class='del'>-		reg-io-width = &lt;1&gt;;	/* 8 bit read/write */</div><div class='del'>-</div><div class='del'>-		dummy@60 {</div><div class='del'>-			compatible = "dummy";</div><div class='del'>-			reg = &lt;0x60&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml b/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml<br/>index 015885dd02d3..31386a8d7684 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-pxa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-pxa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-pxa.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell MMP I2C controller bindings</div><div class='add'>+title: Marvell MMP I2C controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh+dt@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt<br/>deleted file mode 100644<br/>index 924ad8c03464..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,95 +0,0 @@</div><div class='del'>-Qualcomm Camera Control Interface (CCI) I2C controller</div><div class='del'>-</div><div class='del'>-PROPERTIES:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		"qcom,msm8916-cci"</div><div class='del'>-		"qcom,msm8996-cci"</div><div class='del'>-		"qcom,sdm845-cci"</div><div class='del'>-		"qcom,sm8250-cci"</div><div class='del'>-		"qcom,sm8450-cci"</div><div class='del'>-</div><div class='del'>-- reg</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: base address CCI I2C controller and length of memory</div><div class='del'>-		    mapped region.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: specifies the CCI I2C interrupt. The format of the</div><div class='del'>-		    specifier is defined by the binding document describing</div><div class='del'>-		    the node's interrupt parent.</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: a list of phandle, should contain an entry for each</div><div class='del'>-		    entries in clock-names.</div><div class='del'>-</div><div class='del'>-- clock-names</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: a list of clock names, must include "cci" clock.</div><div class='del'>-</div><div class='del'>-- power-domains</div><div class='del'>-	Usage: required for "qcom,msm8996-cci"</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition:</div><div class='del'>-</div><div class='del'>-SUBNODES:</div><div class='del'>-</div><div class='del'>-The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996,</div><div class='del'>-sdm845, sm8250 and sm8450), described as subdevices named "i2c-bus@0" and</div><div class='del'>-"i2c-bus@1".</div><div class='del'>-</div><div class='del'>-PROPERTIES:</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Index of the CCI bus/master</div><div class='del'>-</div><div class='del'>-- clock-frequency:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Desired I2C bus clock frequency in Hz, defaults to 100</div><div class='del'>-		    kHz if omitted.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	cci@a0c000 {</div><div class='del'>-		compatible = "qcom,msm8996-cci";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0xa0c000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 295 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		clocks = &lt;&amp;mmcc MMSS_MMAGIC_AHB_CLK&gt;,</div><div class='del'>-			 &lt;&amp;mmcc CAMSS_TOP_AHB_CLK&gt;,</div><div class='del'>-			 &lt;&amp;mmcc CAMSS_CCI_AHB_CLK&gt;,</div><div class='del'>-			 &lt;&amp;mmcc CAMSS_CCI_CLK&gt;,</div><div class='del'>-			 &lt;&amp;mmcc CAMSS_AHB_CLK&gt;;</div><div class='del'>-		clock-names = "mmss_mmagic_ahb",</div><div class='del'>-			      "camss_top_ahb",</div><div class='del'>-			      "cci_ahb",</div><div class='del'>-			      "cci",</div><div class='del'>-			      "camss_ahb";</div><div class='del'>-</div><div class='del'>-		i2c-bus@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;400000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		i2c-bus@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			clock-frequency = &lt;400000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml<br/>index 5339dd4fc370..82b9d6682297 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml</a></div><div class='hunk'>@@ -29,6 +29,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - rockchip,rk3036-i2c</div><div class='add'>+              - rockchip,rk3128-i2c</div><div class='ctx'>               - rockchip,rk3368-i2c</div><div class='ctx'>           - const: rockchip,rk3288-i2c</div><div class='ctx'>       - items:</div><div class='hunk'>@@ -37,6 +38,8 @@ properties:</div><div class='ctx'>               - rockchip,rk3308-i2c</div><div class='ctx'>               - rockchip,rk3328-i2c</div><div class='ctx'>               - rockchip,rk3568-i2c</div><div class='add'>+              - rockchip,rk3588-i2c</div><div class='add'>+              - rockchip,rv1126-i2c</div><div class='ctx'>           - const: rockchip,rk3399-i2c</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-st.txt b/Documentation/devicetree/bindings/i2c/i2c-st.txt<br/>deleted file mode 100644<br/>index 4c26fda3844a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-st.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-st.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-ST SSC binding, for I2C mode operation</div><div class='del'>-</div><div class='del'>-Required properties :</div><div class='del'>-- compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"</div><div class='del'>-- reg : Offset and length of the register set for the device</div><div class='del'>-- interrupts : the interrupt specifier</div><div class='del'>-- clock-names: Must contain "ssc".</div><div class='del'>-- clocks: Must contain an entry for each name in clock-names. See the common</div><div class='del'>-  clock bindings.</div><div class='del'>-- A pinctrl state named "default" must be defined to set pins in mode of</div><div class='del'>-  operation for I2C transfer.</div><div class='del'>-</div><div class='del'>-Optional properties :</div><div class='del'>-- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,</div><div class='del'>-  the default 100 kHz frequency will be used. As only Normal and Fast modes</div><div class='del'>-  are supported, possible values are 100000 and 400000.</div><div class='del'>-- st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is</div><div class='del'>-  allowed through the deglitch circuit. In units of us.</div><div class='del'>-- st,i2c-min-sda-pulse-width-us : The minimum valid SDA pulse width that is</div><div class='del'>-  allowed through the deglitch circuit. In units of us.</div><div class='del'>-- A pinctrl state named "idle" could be defined to set pins in idle state</div><div class='del'>-  when I2C instance is not performing a transfer.</div><div class='del'>-- A pinctrl state named "sleep" could be defined to set pins in sleep state</div><div class='del'>-  when driver enters in suspend.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example :</div><div class='del'>-</div><div class='del'>-i2c0: i2c@fed40000 {</div><div class='del'>-	compatible	= "st,comms-ssc4-i2c";</div><div class='del'>-	reg		= &lt;0xfed40000 0x110&gt;;</div><div class='del'>-	interrupts	=  &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clocks		= &lt;&amp;clk_s_a0_ls CLK_ICN_REG&gt;;</div><div class='del'>-	clock-names	= "ssc";</div><div class='del'>-	clock-frequency = &lt;400000&gt;;</div><div class='del'>-	pinctrl-names	= "default";</div><div class='del'>-	pinctrl-0	= &lt;&amp;pinctrl_i2c0_default&gt;;</div><div class='del'>-	st,i2c-min-scl-pulse-width-us = &lt;0&gt;;</div><div class='del'>-	st,i2c-min-sda-pulse-width-us = &lt;5&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt b/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt<br/>deleted file mode 100644<br/>index 72f4a2f0fedc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-synquacer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-Socionext SynQuacer I2C</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible      : Must be "socionext,synquacer-i2c"</div><div class='del'>-- reg             : Offset and length of the register set for the device</div><div class='del'>-- interrupts      : A single interrupt specifier</div><div class='del'>-- #address-cells  : Must be &lt;1&gt;;</div><div class='del'>-- #size-cells     : Must be &lt;0&gt;;</div><div class='del'>-- clock-names     : Must contain "pclk".</div><div class='del'>-- clocks          : Must contain an entry for each name in clock-names.</div><div class='del'>-                    (See the common clock bindings.)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and</div><div class='del'>-                    Fast modes are supported, possible values are 100000 and</div><div class='del'>-                    400000.</div><div class='del'>-</div><div class='del'>-Example :</div><div class='del'>-</div><div class='del'>-    i2c@51210000 {</div><div class='del'>-        compatible = "socionext,synquacer-i2c";</div><div class='del'>-        reg = &lt;0x51210000 0x1000&gt;;</div><div class='del'>-        interrupts = &lt;GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-        clock-names = "pclk";</div><div class='del'>-        clocks = &lt;&amp;clk_i2c&gt;;</div><div class='del'>-        clock-frequency = &lt;400000&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/i2c-versatile.txt b/Documentation/devicetree/bindings/i2c/i2c-versatile.txt<br/>deleted file mode 100644<br/>index 361d31c51b6f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/i2c-versatile.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/i2c-versatile.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,10 +0,0 @@</div><div class='del'>-i2c Controller on ARM Versatile platform:</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Must be "arm,versatile-i2c";</div><div class='del'>-- reg</div><div class='del'>-- #address-cells = &lt;1&gt;;</div><div class='del'>-- #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- Child nodes conforming to i2c bus binding</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml<br/>index af6d64a6da6e..b61fdc9548d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/ingenic,i2c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs I2C controller devicetree bindings</div><div class='add'>+title: Ingenic SoCs I2C controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml b/Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..67882ec6e06a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/loongson,ls2x-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/loongson,ls2x-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson LS2X I2C Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Binbin Zhou &lt;zhoubinbin@loongson.cn&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - loongson,ls2k-i2c</div><div class='add'>+      - loongson,ls7a-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c0: i2c@1fe21000 {</div><div class='add'>+        compatible = "loongson,ls2k-i2c";</div><div class='add'>+        reg = &lt;0x1fe21000 0x8&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;extioiic&gt;;</div><div class='add'>+        interrupts = &lt;22 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        eeprom@57 {</div><div class='add'>+            compatible = "atmel,24c16";</div><div class='add'>+            reg = &lt;0x57&gt;;</div><div class='add'>+            pagesize = &lt;16&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml<br/>index f771c09aabfc..984fc1ed3ec6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell MV64XXX I2C Controller Device Tree Bindings</div><div class='add'>+title: Marvell MV64XXX I2C Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;</div><div class='hunk'>@@ -19,12 +19,21 @@ properties:</div><div class='ctx'>       - const: allwinner,sun6i-a31-i2c</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - allwinner,suniv-f1c100s-i2c</div><div class='ctx'>               - allwinner,sun8i-a23-i2c</div><div class='ctx'>               - allwinner,sun8i-a83t-i2c</div><div class='add'>+              - allwinner,sun8i-v536-i2c</div><div class='ctx'>               - allwinner,sun50i-a64-i2c</div><div class='del'>-              - allwinner,sun50i-a100-i2c</div><div class='ctx'>               - allwinner,sun50i-h6-i2c</div><div class='add'>+          - const: allwinner,sun6i-a31-i2c</div><div class='add'>+      - description: Allwinner SoCs with offload support</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - allwinner,sun20i-d1-i2c</div><div class='add'>+              - allwinner,sun50i-a100-i2c</div><div class='ctx'>               - allwinner,sun50i-h616-i2c</div><div class='add'>+              - allwinner,sun50i-r329-i2c</div><div class='add'>+          - const: allwinner,sun8i-v536-i2c</div><div class='ctx'>           - const: allwinner,sun6i-a31-i2c</div><div class='ctx'>       - const: marvell,mv64xxx-i2c</div><div class='ctx'>       - const: marvell,mv78230-i2c</div><div class='hunk'>@@ -58,6 +67,19 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: RX DMA Channel</div><div class='add'>+      - description: TX DMA Channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  dmas: [ dma-names ]</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml b/Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..118ec00fc190<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/mediatek,mt7621-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/mediatek,mt7621-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stefan Roese &lt;sr@denx.de&gt;</div><div class='add'>+</div><div class='add'>+title: Mediatek MT7621/MT7628 I2C master controller</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt7621-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: i2c</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: i2c</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - resets</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt7621-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt7621-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c: i2c@900 {</div><div class='add'>+      compatible = "mediatek,mt7621-i2c";</div><div class='add'>+      reg = &lt;0x900 0x100&gt;;</div><div class='add'>+      clocks = &lt;&amp;sysc MT7621_CLK_I2C&gt;;</div><div class='add'>+      clock-names = "i2c";</div><div class='add'>+      resets = &lt;&amp;sysc MT7621_RST_I2C&gt;;</div><div class='add'>+      reset-names = "i2c";</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      pinctrl-0 = &lt;&amp;i2c_pins&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml<br/>deleted file mode 100644<br/>index 93198d5d43a6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,77 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Mellanox I2C SMBus on BlueField SoCs</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Khalil Blaiech &lt;kblaiech@nvidia.com&gt;</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - mellanox,i2c-mlxbf1</div><div class='del'>-      - mellanox,i2c-mlxbf2</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    minItems: 3</div><div class='del'>-    items:</div><div class='del'>-      - description: Smbus block registers</div><div class='del'>-      - description: Cause master registers</div><div class='del'>-      - description: Cause slave registers</div><div class='del'>-      - description: Cause coalesce registers</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clock-frequency:</div><div class='del'>-    enum: [ 100000, 400000, 1000000 ]</div><div class='del'>-    description:</div><div class='del'>-      bus frequency used to configure timing registers;</div><div class='del'>-      The frequency is expressed in Hz. Default is 100000.</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-</div><div class='del'>-unevaluatedProperties: false</div><div class='del'>-</div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - mellanox,i2c-mlxbf1</div><div class='del'>-</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    reg:</div><div class='del'>-      maxItems: 3</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    i2c@2804000 {</div><div class='del'>-        compatible = "mellanox,i2c-mlxbf1";</div><div class='del'>-        reg = &lt;0x02804000 0x800&gt;,</div><div class='del'>-              &lt;0x02801200 0x020&gt;,</div><div class='del'>-              &lt;0x02801260 0x020&gt;;</div><div class='del'>-        interrupts = &lt;57&gt;;</div><div class='del'>-        clock-frequency = &lt;100000&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    i2c@2808800 {</div><div class='del'>-        compatible = "mellanox,i2c-mlxbf2";</div><div class='del'>-        reg = &lt;0x02808800 0x600&gt;,</div><div class='del'>-              &lt;0x02808e00 0x020&gt;,</div><div class='del'>-              &lt;0x02808e20 0x020&gt;,</div><div class='del'>-              &lt;0x02808e40 0x010&gt;;</div><div class='del'>-        interrupts = &lt;57&gt;;</div><div class='del'>-        clock-frequency = &lt;400000&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml b/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml<br/>index 7bad4b946a34..afa3db726229 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/microchip,corei2c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip MPFS I2C Controller Device Tree Bindings</div><div class='add'>+title: Microchip MPFS I2C Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daire McNamara &lt;daire.mcnamara@microchip.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml b/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml<br/>index 128444942aec..00eb6ff6f5b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml</a></div><div class='hunk'>@@ -4,20 +4,21 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: nuvoton NPCM7XX I2C Controller Device Tree Bindings</div><div class='add'>+title: nuvoton NPCM7XX I2C Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  The NPCM750x includes sixteen I2C bus controllers. All Controllers support</div><div class='del'>-  both master and slave mode. Each controller can switch between master and slave</div><div class='del'>-  at run time (i.e. IPMB mode). Each controller has two 16 byte HW FIFO for TX and</div><div class='del'>-  RX.</div><div class='add'>+  I2C bus controllers of the NPCM series support both master and</div><div class='add'>+  slave mode. Each controller can switch between master and slave at run time</div><div class='add'>+  (i.e. IPMB mode). HW FIFO for TX and RX are supported.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tali Perry &lt;tali.perry1@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: nuvoton,npcm750-i2c</div><div class='add'>+    enum:</div><div class='add'>+      - nuvoton,npcm750-i2c</div><div class='add'>+      - nuvoton,npcm845-i2c</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -36,6 +37,10 @@ properties:</div><div class='ctx'>     default: 100000</div><div class='ctx'>     enum: [100000, 400000, 1000000]</div><div class='ctx'> </div><div class='add'>+  nuvoton,sys-mgr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of system manager register node.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -44,6 +49,15 @@ required:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nuvoton,npcm845-i2c</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - nuvoton,sys-mgr</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -57,6 +71,7 @@ examples:</div><div class='ctx'>         clock-frequency = &lt;100000&gt;;</div><div class='ctx'>         interrupts = &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>         compatible = "nuvoton,npcm750-i2c";</div><div class='add'>+        nuvoton,sys-mgr = &lt;&amp;gcr&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml b/Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml<br/>new file mode 100644<br/>index 000000000000..85d9efb743ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/opencores,i2c-ocores.yaml</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: OpenCores I2C controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Peter Korsgaard &lt;peter@korsgaard.com&gt;</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC</div><div class='add'>+              - sifive,fu540-c000-i2c # Opencore based IP block FU540-C000 SoC</div><div class='add'>+          - const: sifive,i2c0</div><div class='add'>+      - enum:</div><div class='add'>+          - opencores,i2c-ocores</div><div class='add'>+          - aeroflexgaisler,i2cmst</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: |</div><div class='add'>+      clock-frequency property is meant to control the bus frequency for i2c bus</div><div class='add'>+      drivers, but it was incorrectly used to specify i2c controller input clock</div><div class='add'>+      frequency. So the following rules are set to fix this situation:</div><div class='add'>+      - if clock-frequency is present and neither opencores,ip-clock-frequency nor</div><div class='add'>+        clocks are, then clock-frequency specifies i2c controller clock frequency.</div><div class='add'>+        This is to keep backwards compatibility with setups using old DTB. i2c bus</div><div class='add'>+        frequency is fixed at 100 KHz.</div><div class='add'>+      - if clocks is present it specifies i2c controller clock. clock-frequency</div><div class='add'>+        property specifies i2c bus frequency.</div><div class='add'>+      - if opencores,ip-clock-frequency is present it specifies i2c controller</div><div class='add'>+        clock frequency. clock-frequency property specifies i2c bus frequency.</div><div class='add'>+    default: 100000</div><div class='add'>+</div><div class='add'>+  reg-io-width:</div><div class='add'>+    description: |</div><div class='add'>+      io register width in bytes</div><div class='add'>+    enum: [1, 2, 4]</div><div class='add'>+</div><div class='add'>+  reg-shift:</div><div class='add'>+    description: |</div><div class='add'>+      device register offsets are shifted by this value</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  regstep:</div><div class='add'>+    description: |</div><div class='add'>+      deprecated, use reg-shift above</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  opencores,ip-clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Frequency of the controller clock in Hz. Mutually exclusive with clocks.</div><div class='add'>+      See the note above.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - opencores,ip-clock-frequency</div><div class='add'>+  - required:</div><div class='add'>+      - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c@a0000000 {</div><div class='add'>+      compatible = "opencores,i2c-ocores";</div><div class='add'>+      reg = &lt;0xa0000000 0x8&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      interrupts = &lt;10&gt;;</div><div class='add'>+      opencores,ip-clock-frequency = &lt;20000000&gt;;</div><div class='add'>+</div><div class='add'>+      reg-shift = &lt;0&gt;;	/* 8 bit registers */</div><div class='add'>+      reg-io-width = &lt;1&gt;;	/* 8 bit read/write */</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    i2c@b0000000 {</div><div class='add'>+      compatible = "opencores,i2c-ocores";</div><div class='add'>+      reg = &lt;0xa0000000 0x8&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      interrupts = &lt;10&gt;;</div><div class='add'>+      clocks = &lt;&amp;osc&gt;;</div><div class='add'>+      clock-frequency = &lt;400000&gt;; /* i2c bus frequency 400 KHz */</div><div class='add'>+</div><div class='add'>+      reg-shift = &lt;0&gt;;	/* 8 bit registers */</div><div class='add'>+      reg-io-width = &lt;1&gt;;	/* 8 bit read/write */</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml<br/>new file mode 100644<br/>index 000000000000..ec79b7270437<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml</a></div><div class='hunk'>@@ -0,0 +1,277 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/qcom,i2c-cci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Camera Control Interface (CCI) I2C controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Loic Poulain &lt;loic.poulain@linaro.org&gt;</div><div class='add'>+  - Robert Foss &lt;robert.foss@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,msm8226-cci</div><div class='add'>+          - qcom,msm8974-cci</div><div class='add'>+          - qcom,msm8996-cci</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,msm8916-cci</div><div class='add'>+          - const: qcom,msm8226-cci # CCI v1</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sdm845-cci</div><div class='add'>+              - qcom,sm6350-cci</div><div class='add'>+              - qcom,sm8250-cci</div><div class='add'>+              - qcom,sm8450-cci</div><div class='add'>+          - const: qcom,msm8996-cci # CCI v2</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^i2c-bus@[01]$":</div><div class='add'>+    $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clock-frequency:</div><div class='add'>+        default: 100000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8996-cci</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8226-cci</div><div class='add'>+              - qcom,msm8916-cci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        i2c-bus@1: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          oneOf:</div><div class='add'>+            - contains:</div><div class='add'>+                enum:</div><div class='add'>+                  - qcom,msm8974-cci</div><div class='add'>+</div><div class='add'>+            - const: qcom,msm8226-cci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: camss_top_ahb</div><div class='add'>+            - const: cci_ahb</div><div class='add'>+            - const: cci</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          oneOf:</div><div class='add'>+            - contains:</div><div class='add'>+                enum:</div><div class='add'>+                  - qcom,msm8916-cci</div><div class='add'>+</div><div class='add'>+            - const: qcom,msm8996-cci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: camss_top_ahb</div><div class='add'>+            - const: cci_ahb</div><div class='add'>+            - const: cci</div><div class='add'>+            - const: camss_ahb</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm845-cci</div><div class='add'>+              - qcom,sm6350-cci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: camnoc_axi</div><div class='add'>+            - const: soc_ahb</div><div class='add'>+            - const: slow_ahb_src</div><div class='add'>+            - const: cpas_ahb</div><div class='add'>+            - const: cci</div><div class='add'>+            - const: cci_src</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8250-cci</div><div class='add'>+              - qcom,sm8450-cci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: camnoc_axi</div><div class='add'>+            - const: slow_ahb_src</div><div class='add'>+            - const: cpas_ahb</div><div class='add'>+            - const: cci</div><div class='add'>+            - const: cci_src</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,camcc-sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    cci@ac4a000 {</div><div class='add'>+        reg = &lt;0x0ac4a000 0x4000&gt;;</div><div class='add'>+        compatible = "qcom,sdm845-cci", "qcom,msm8996-cci";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 460 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        power-domains = &lt;&amp;clock_camcc TITAN_TOP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;clock_camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;clock_camcc CAM_CC_SOC_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;clock_camcc CAM_CC_SLOW_AHB_CLK_SRC&gt;,</div><div class='add'>+                 &lt;&amp;clock_camcc CAM_CC_CPAS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;clock_camcc CAM_CC_CCI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;clock_camcc CAM_CC_CCI_CLK_SRC&gt;;</div><div class='add'>+        clock-names = "camnoc_axi",</div><div class='add'>+                      "soc_ahb",</div><div class='add'>+                      "slow_ahb_src",</div><div class='add'>+                      "cpas_ahb",</div><div class='add'>+                      "cci",</div><div class='add'>+                      "cci_src";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;clock_camcc CAM_CC_CAMNOC_AXI_CLK&gt;,</div><div class='add'>+                          &lt;&amp;clock_camcc CAM_CC_CCI_CLK&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;80000000&gt;,</div><div class='add'>+                               &lt;37500000&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "default", "sleep";</div><div class='add'>+        pinctrl-0 = &lt;&amp;cci0_default &amp;cci1_default&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;cci0_sleep &amp;cci1_sleep&gt;;</div><div class='add'>+</div><div class='add'>+        i2c-bus@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            clock-frequency = &lt;1000000&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            camera@10 {</div><div class='add'>+                compatible = "ovti,ov8856";</div><div class='add'>+                reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+                reset-gpios = &lt;&amp;tlmm 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+                pinctrl-names = "default";</div><div class='add'>+                pinctrl-0 = &lt;&amp;cam0_default&gt;;</div><div class='add'>+</div><div class='add'>+                clocks = &lt;&amp;clock_camcc CAM_CC_MCLK0_CLK&gt;;</div><div class='add'>+                clock-names = "xvclk";</div><div class='add'>+                clock-frequency = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+                dovdd-supply = &lt;&amp;vreg_lvs1a_1p8&gt;;</div><div class='add'>+                avdd-supply = &lt;&amp;cam0_avdd_2v8&gt;;</div><div class='add'>+                dvdd-supply = &lt;&amp;cam0_dvdd_1v2&gt;;</div><div class='add'>+</div><div class='add'>+                port {</div><div class='add'>+                    ov8856_ep: endpoint {</div><div class='add'>+                        link-frequencies = /bits/ 64 &lt;360000000 180000000&gt;;</div><div class='add'>+                        data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;csiphy0_ep&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        cci_i2c1: i2c-bus@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            clock-frequency = &lt;1000000&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            camera@60 {</div><div class='add'>+                compatible = "ovti,ov7251";</div><div class='add'>+                reg = &lt;0x60&gt;;</div><div class='add'>+</div><div class='add'>+                enable-gpios = &lt;&amp;tlmm 21 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+                pinctrl-names = "default";</div><div class='add'>+                pinctrl-0 = &lt;&amp;cam3_default&gt;;</div><div class='add'>+</div><div class='add'>+                clocks = &lt;&amp;clock_camcc CAM_CC_MCLK3_CLK&gt;;</div><div class='add'>+                clock-names = "xclk";</div><div class='add'>+                clock-frequency = &lt;24000000&gt;;</div><div class='add'>+</div><div class='add'>+                vdddo-supply = &lt;&amp;vreg_lvs1a_1p8&gt;;</div><div class='add'>+                vdda-supply = &lt;&amp;cam3_avdd_2v8&gt;;</div><div class='add'>+</div><div class='add'>+                port {</div><div class='add'>+                    ov7251_ep: endpoint {</div><div class='add'>+                        data-lanes = &lt;0 1&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;csiphy3_ep&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml<br/>new file mode 100644<br/>index 000000000000..9f66a3bb1f80<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/qcom,i2c-geni-qcom.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Geni based QUP I2C Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,geni-i2c</div><div class='add'>+      - qcom,geni-i2c-master-hub</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 100000</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  pinctrl-0: true</div><div class='add'>+  pinctrl-1: true</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  required-opps:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,geni-i2c-master-hub</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: se</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+        dmas: false</div><div class='add'>+        dma-names: false</div><div class='add'>+</div><div class='add'>+        interconnects:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: qup-core</div><div class='add'>+            - const: qup-config</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          const: se</div><div class='add'>+</div><div class='add'>+        interconnects:</div><div class='add'>+          minItems: 3</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: qup-core</div><div class='add'>+            - const: qup-config</div><div class='add'>+            - const: qup-memory</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c@88000 {</div><div class='add'>+        compatible = "qcom,geni-i2c";</div><div class='add'>+        reg = &lt;0x00880000 0x4000&gt;;</div><div class='add'>+        clock-names = "se";</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;qup_i2c0_default&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='add'>+                        &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;,</div><div class='add'>+                        &lt;&amp;aggre1_noc MASTER_QUP_0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+        interconnect-names = "qup-core", "qup-config", "qup-memory";</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='add'>+        required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt<br/>deleted file mode 100644<br/>index dc71754a56af..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,40 +0,0 @@</div><div class='del'>-Qualcomm Universal Peripheral (QUP) I2C controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: Should be:</div><div class='del'>-   * "qcom,i2c-qup-v1.1.1" for 8660, 8960 and 8064.</div><div class='del'>-   * "qcom,i2c-qup-v2.1.1" for 8974 v1.</div><div class='del'>-   * "qcom,i2c-qup-v2.2.1" for 8974 v2 and later.</div><div class='del'>- - reg: Should contain QUP register address and length.</div><div class='del'>- - interrupts: Should contain I2C interrupt.</div><div class='del'>-</div><div class='del'>- - clocks: A list of phandles + clock-specifiers, one for each entry in</div><div class='del'>-   clock-names.</div><div class='del'>- - clock-names: Should contain:</div><div class='del'>-   * "core" for the core clock</div><div class='del'>-   * "iface" for the AHB clock</div><div class='del'>-</div><div class='del'>- - #address-cells: Should be &lt;1&gt; Address cells for i2c device address</div><div class='del'>- - #size-cells: Should be &lt;0&gt; as i2c addresses have no size component</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>- - clock-frequency: Should specify the desired i2c bus clock frequency in Hz,</div><div class='del'>-                    defaults to 100kHz if omitted.</div><div class='del'>-</div><div class='del'>-Child nodes should conform to i2c bus binding.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>- i2c@f9924000 {</div><div class='del'>- 	compatible = "qcom,i2c-qup-v2.2.1";</div><div class='del'>- 	reg = &lt;0xf9924000 0x1000&gt;;</div><div class='del'>- 	interrupts = &lt;0 96 0&gt;;</div><div class='del'>-</div><div class='del'>- 	clocks = &lt;&amp;gcc GCC_BLSP1_QUP2_I2C_APPS_CLK&gt;, &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='del'>- 	clock-names = "core", "iface";</div><div class='del'>-</div><div class='del'>- 	clock-frequency = &lt;355000&gt;;</div><div class='del'>-</div><div class='del'>- 	#address-cells = &lt;1&gt;;</div><div class='del'>- 	#size-cells = &lt;0&gt;;</div><div class='del'>- };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml<br/>new file mode 100644<br/>index 000000000000..f43947514d48<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/qcom,i2c-qup.yaml</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/qcom,i2c-qup.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Universal Peripheral (QUP) I2C controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,i2c-qup-v1.1.1     # for 8660, 8960 and 8064</div><div class='add'>+      - qcom,i2c-qup-v2.1.1     # for 8974 v1</div><div class='add'>+      - qcom,i2c-qup-v2.2.1     # for 8974 v2 and later</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: iface</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 100000</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  pinctrl-0: true</div><div class='add'>+  pinctrl-1: true</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8998.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c@c175000 {</div><div class='add'>+        compatible = "qcom,i2c-qup-v2.2.1";</div><div class='add'>+        reg = &lt;0x0c175000 0x600&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_BLSP1_QUP1_I2C_APPS_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface";</div><div class='add'>+        dmas = &lt;&amp;blsp1_dma 6&gt;, &lt;&amp;blsp1_dma 7&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        pinctrl-names = "default", "sleep";</div><div class='add'>+        pinctrl-0 = &lt;&amp;blsp1_i2c1_default&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;blsp1_i2c1_sleep&gt;;</div><div class='add'>+        clock-frequency = &lt;400000&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml b/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml<br/>index c30107833a51..c4ace5585e1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/renesas,rcar-i2c.yaml</a></div><div class='hunk'>@@ -46,12 +46,13 @@ properties:</div><div class='ctx'>               - renesas,i2c-r8a77980     # R-Car V3H</div><div class='ctx'>               - renesas,i2c-r8a77990     # R-Car E3</div><div class='ctx'>               - renesas,i2c-r8a77995     # R-Car D3</div><div class='del'>-              - renesas,i2c-r8a779a0     # R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-i2c # R-Car Gen3 and RZ/G2</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,i2c-r8a779a0     # R-Car V3U</div><div class='ctx'>               - renesas,i2c-r8a779f0     # R-Car S4-8</div><div class='add'>+              - renesas,i2c-r8a779g0     # R-Car V4H</div><div class='ctx'>           - const: renesas,rcar-gen4-i2c # R-Car Gen4</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml<br/>index f4b235a87ac6..2291a7cd619b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/renesas,riic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/renesas,riic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/renesas,riic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/renesas,riic.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - renesas,riic-r7s72100   # RZ/A1H</div><div class='ctx'>           - renesas,riic-r7s9210    # RZ/A2M</div><div class='add'>+          - renesas,riic-r9a07g043  # RZ/G2UL and RZ/Five</div><div class='ctx'>           - renesas,riic-r9a07g044  # RZ/G2{L,LC}</div><div class='ctx'>           - renesas,riic-r9a07g054  # RZ/V2L</div><div class='ctx'>       - const: renesas,riic-rz      # RZ/A or RZ/G2L</div><div class='hunk'>@@ -59,6 +60,9 @@ properties:</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -75,6 +79,7 @@ if:</div><div class='ctx'>     compatible:</div><div class='ctx'>       contains:</div><div class='ctx'>         enum:</div><div class='add'>+          - renesas,riic-r9a07g043</div><div class='ctx'>           - renesas,riic-r9a07g044</div><div class='ctx'>           - renesas,riic-r9a07g054</div><div class='ctx'> then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml b/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml<br/>new file mode 100644<br/>index 000000000000..5d1e7885b64a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/renesas,rzv2m.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/renesas,rzv2m.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/V2M I2C Bus Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a09g011-i2c  # RZ/V2M</div><div class='add'>+      - const: renesas,rzv2m-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Data transmission/reception interrupt</div><div class='add'>+      - description: Status interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tia</div><div class='add'>+      - const: tis</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 100000</div><div class='add'>+    enum: [ 100000, 400000 ]</div><div class='add'>+    description:</div><div class='add'>+      Desired I2C bus clock frequency in Hz.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a09g011-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c0: i2c@a4030000 {</div><div class='add'>+        compatible = "renesas,r9a09g011-i2c", "renesas,rzv2m-i2c";</div><div class='add'>+        reg = &lt;0xa4030000 0x80&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 232 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 236 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "tia", "tis";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A09G011_IIC_PCLK0&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg R9A09G011_IIC_GPA_PRESETN&gt;;</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        clock-frequency = &lt;100000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml b/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml<br/>index 84051b0129c2..b204e35e4f8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/samsung,s3c2410-i2c.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S3C/S5P/Exynos SoC I2C Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -37,7 +37,7 @@ properties:</div><div class='ctx'>       for "samsung,s3c2440-hdmiphy-i2c" whose input/output lines are</div><div class='ctx'>       permanently wired to the respective client.</div><div class='ctx'>       This property is deprecated. Use "pinctrl-0" and "pinctrl-names" instead.</div><div class='del'>-    deprecated: yes</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -123,7 +123,7 @@ examples:</div><div class='ctx'>         samsung,i2c-slave-addr = &lt;0x66&gt;;</div><div class='ctx'> </div><div class='ctx'>         eeprom@50 {</div><div class='del'>-            compatible = "samsung,s524ad0xd1";</div><div class='add'>+            compatible = "samsung,s524ad0xd1", "atmel,24c128";</div><div class='ctx'>             reg = &lt;0x50&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..f9d6e2038bb4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/socionext,synquacer-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext SynQuacer I2C Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ard Biesheuvel &lt;ardb@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: socionext,synquacer-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: pclk</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    minimum: 100000</div><div class='add'>+    maximum: 400000</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c@51210000 {</div><div class='add'>+        compatible = "socionext,synquacer-i2c";</div><div class='add'>+        reg = &lt;0x51210000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clock-names = "pclk";</div><div class='add'>+        clocks = &lt;&amp;clk_i2c&gt;;</div><div class='add'>+        clock-frequency = &lt;400000&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml<br/>index c76131902b77..4bbe9e775da1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml</a></div><div class='hunk'>@@ -29,6 +29,9 @@ properties:</div><div class='ctx'>     minimum: 100000</div><div class='ctx'>     maximum: 400000</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml<br/>index ddde08636ab0..5abf496edb59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml</a></div><div class='hunk'>@@ -29,6 +29,9 @@ properties:</div><div class='ctx'>     minimum: 100000</div><div class='ctx'>     maximum: 400000</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..16024415a4a7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/st,nomadik-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/st,nomadik-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ST Microelectronics Nomadik I2C</div><div class='add'>+</div><div class='add'>+description: The Nomadik I2C host controller began its life in the ST</div><div class='add'>+  Microelectronics STn8800 SoC, and was then inherited into STn8810 and</div><div class='add'>+  STn8815. It was part of the prototype STn8500 which then became ST-Ericsson</div><div class='add'>+  DB8500 after the merge of these two companies wireless divisions.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+# Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - st,nomadik-i2c</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      # The variant found in STn8815</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,nomadik-i2c</div><div class='add'>+          - const: arm,primecell</div><div class='add'>+      # The variant found in DB8500</div><div class='add'>+      - items:</div><div class='add'>+          - const: stericsson,db8500-i2c</div><div class='add'>+          - const: st,nomadik-i2c</div><div class='add'>+          - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      # Clock name in STn8815</div><div class='add'>+      - items:</div><div class='add'>+          - const: mclk</div><div class='add'>+          - const: apb_pclk</div><div class='add'>+      # Clock name in DB8500</div><div class='add'>+      - items:</div><div class='add'>+          - const: i2cclk</div><div class='add'>+          - const: apb_pclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 400000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/stericsson,db8500-prcc-reset.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/arm/ux500_pm_domains.h&gt;</div><div class='add'>+    i2c@80004000 {</div><div class='add'>+      compatible = "stericsson,db8500-i2c", "st,nomadik-i2c", "arm,primecell";</div><div class='add'>+      reg = &lt;0x80004000 0x1000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      clock-frequency = &lt;400000&gt;;</div><div class='add'>+      clocks = &lt;&amp;prcc_kclk 3 3&gt;, &lt;&amp;prcc_pclk 3 3&gt;;</div><div class='add'>+      clock-names = "i2cclk", "apb_pclk";</div><div class='add'>+      power-domains = &lt;&amp;pm_domains DOMAIN_VAPE&gt;;</div><div class='add'>+      resets = &lt;&amp;prcc_reset DB8500_PRCC_3 DB8500_PRCC_3_RESET_I2C0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    i2c@101f8000 {</div><div class='add'>+      compatible = "st,nomadik-i2c", "arm,primecell";</div><div class='add'>+      reg = &lt;0x101f8000 0x1000&gt;;</div><div class='add'>+      interrupt-parent = &lt;&amp;vica&gt;;</div><div class='add'>+      interrupts = &lt;20&gt;;</div><div class='add'>+      clock-frequency = &lt;100000&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      clocks = &lt;&amp;i2c0clk&gt;, &lt;&amp;pclki2c0&gt;;</div><div class='add'>+      clock-names = "mclk", "apb_pclk";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..08f9c1e446fd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/st,sti-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/st,sti-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: I2C controller embedded in STMicroelectronics STi platform</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - st,comms-ssc-i2c</div><div class='add'>+      - st,comms-ssc4-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    enum: [ 100000, 400000 ]</div><div class='add'>+    default: 100000</div><div class='add'>+</div><div class='add'>+  st,i2c-min-scl-pulse-width-us:</div><div class='add'>+    description:</div><div class='add'>+      The minimum valid SCL pulse width that is allowed through the</div><div class='add'>+      deglitch circuit. In units of us.</div><div class='add'>+</div><div class='add'>+  st,i2c-min-sda-pulse-width-us:</div><div class='add'>+    description:</div><div class='add'>+      The minimum valid SDA pulse width that is allowed through the</div><div class='add'>+      deglitch circuit. In units of us.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/stih407-clks.h&gt;</div><div class='add'>+    i2c@fed40000 {</div><div class='add'>+        compatible = "st,comms-ssc4-i2c";</div><div class='add'>+        reg = &lt;0xfed40000 0x110&gt;;</div><div class='add'>+        interrupts =  &lt;GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk_s_a0_ls CLK_ICN_REG&gt;;</div><div class='add'>+        clock-names = "ssc";</div><div class='add'>+        clock-frequency = &lt;400000&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_i2c0_default&gt;;</div><div class='add'>+        st,i2c-min-scl-pulse-width-us = &lt;0&gt;;</div><div class='add'>+        st,i2c-min-sda-pulse-width-us = &lt;5&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml<br/>index dccbb18b6dc0..94b75d9f66cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - st,stm32f7-i2c</div><div class='add'>+              - st,stm32mp13-i2c</div><div class='ctx'>               - st,stm32mp15-i2c</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -45,6 +46,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - st,stm32f4-i2c</div><div class='ctx'>       - st,stm32f7-i2c</div><div class='add'>+      - st,stm32mp13-i2c</div><div class='ctx'>       - st,stm32mp15-i2c</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -55,6 +57,11 @@ properties:</div><div class='ctx'>       - description: interrupt ID for I2C event</div><div class='ctx'>       - description: interrupt ID for I2C error</div><div class='ctx'> </div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: event</div><div class='add'>+      - const: error</div><div class='add'>+</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -83,13 +90,15 @@ properties:</div><div class='ctx'>   st,syscfg-fmp:</div><div class='ctx'>     description: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode</div><div class='ctx'>       Plus speed is selected by slave.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to syscfg</div><div class='ctx'>           - description: register offset within syscfg</div><div class='ctx'>           - description: register bitmask for FMP bit</div><div class='ctx'> </div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml b/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml<br/>index db0843be91c5..781108ae1ce3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/ti,omap4-i2c.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i2c/ti,omap4-i2c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for I2C controllers on TI's OMAP and K3 SoCs</div><div class='add'>+title: I2C controllers on TI's OMAP and K3 SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vignesh Raghavendra &lt;vigneshr@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml b/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml<br/>index 715dcfa5a922..658ae92fa86d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/i2c/xlnx,xps-iic-2.00.a.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/i2c/xlnx,xps-iic-2.00.a.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx IIC controller Device Tree Bindings</div><div class='add'>+title: Xilinx IIC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - info@mocean-labs.com</div><div class='hunk'>@@ -14,7 +14,9 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: xlnx,xps-iic-2.00.a</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,axi-iic-2.1</div><div class='add'>+      - xlnx,xps-iic-2.00.a</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -30,6 +32,13 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       Input clock name.</div><div class='ctx'> </div><div class='add'>+  clock-frequency:</div><div class='add'>+    description:</div><div class='add'>+      Optional I2C SCL clock frequency. If not specified, do not configure</div><div class='add'>+      in software, rely only on hardware design value.</div><div class='add'>+    default: 100000</div><div class='add'>+    enum: [ 100000, 400000, 1000000 ]</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml b/Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml<br/>new file mode 100644<br/>index 000000000000..fcc3dbff9c9a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i3c/aspeed,ast2600-i3c.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i3c/aspeed,ast2600-i3c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ASPEED AST2600 i3c controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jeremy Kerr &lt;jk@codeconstruct.com.au&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: i3c.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: aspeed,ast2600-i3c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  sda-pullup-ohms:</div><div class='add'>+    enum: [545, 750, 2000]</div><div class='add'>+    default: 2000</div><div class='add'>+    description: |</div><div class='add'>+      Value to configure SDA pullup resistor, in Ohms.</div><div class='add'>+</div><div class='add'>+  aspeed,global-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to i3c global register syscon node</div><div class='add'>+          - description: index of this i3c controller in the global register set</div><div class='add'>+    description: |</div><div class='add'>+      A (phandle, controller index) reference to the i3c global register set</div><div class='add'>+      used for this device.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - aspeed,global-regs</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    i3c-master@2000 {</div><div class='add'>+        compatible = "aspeed,ast2600-i3c";</div><div class='add'>+        reg = &lt;0x2000 0x1000&gt;;</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscon 0&gt;;</div><div class='add'>+        resets = &lt;&amp;syscon 0&gt;;</div><div class='add'>+        aspeed,global-regs = &lt;&amp;i3c_global 0&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_i3c1_default&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt b/Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt<br/>deleted file mode 100644<br/>index 3716589d6999..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/cdns,i3c-master.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-Bindings for cadence I3C master block</div><div class='del'>-=====================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- compatible: shall be "cdns,i3c-master"</div><div class='del'>-- clocks: shall reference the pclk and sysclk</div><div class='del'>-- clock-names: shall contain "pclk" and "sysclk"</div><div class='del'>-- interrupts: the interrupt line connected to this I3C master</div><div class='del'>-- reg: I3C master registers</div><div class='del'>-</div><div class='del'>-Mandatory properties defined by the generic binding (see</div><div class='del'>-Documentation/devicetree/bindings/i3c/i3c.yaml for more details):</div><div class='del'>-</div><div class='del'>-- #address-cells: shall be set to 1</div><div class='del'>-- #size-cells: shall be set to 0</div><div class='del'>-</div><div class='del'>-Optional properties defined by the generic binding (see</div><div class='del'>-Documentation/devicetree/bindings/i3c/i3c.yaml for more details):</div><div class='del'>-</div><div class='del'>-- i2c-scl-hz</div><div class='del'>-- i3c-scl-hz</div><div class='del'>-</div><div class='del'>-I3C device connected on the bus follow the generic description (see</div><div class='del'>-Documentation/devicetree/bindings/i3c/i3c.yaml for more details).</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	i3c-master@0d040000 {</div><div class='del'>-		compatible = "cdns,i3c-master";</div><div class='del'>-		clocks = &lt;&amp;coreclock&gt;, &lt;&amp;i3csysclock&gt;;</div><div class='del'>-		clock-names = "pclk", "sysclk";</div><div class='del'>-		interrupts = &lt;3 0&gt;;</div><div class='del'>-		reg = &lt;0x0d040000 0x1000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		i2c-scl-hz = &lt;100000&gt;;</div><div class='del'>-</div><div class='del'>-		nunchuk: nunchuk@52 {</div><div class='del'>-			compatible = "nintendo,nunchuk";</div><div class='del'>-			reg = &lt;0x52 0x0 0x10&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i3c/cdns,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/cdns,i3c-master.yaml<br/>new file mode 100644<br/>index 000000000000..cc40d25358ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/cdns,i3c-master.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i3c/cdns,i3c-master.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i3c/cdns,i3c-master.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cadence I3C master block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Boris Brezillon &lt;bbrezillon@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: i3c.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cdns,i3c-master</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: sysclk</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i3c-master@d040000 {</div><div class='add'>+        compatible = "cdns,i3c-master";</div><div class='add'>+        clocks = &lt;&amp;coreclock&gt;, &lt;&amp;i3csysclock&gt;;</div><div class='add'>+        clock-names = "pclk", "sysclk";</div><div class='add'>+        interrupts = &lt;3 0&gt;;</div><div class='add'>+        reg = &lt;0x0d040000 0x1000&gt;;</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        i2c-scl-hz = &lt;100000&gt;;</div><div class='add'>+</div><div class='add'>+        eeprom@57{</div><div class='add'>+            compatible = "atmel,24c01";</div><div class='add'>+            reg = &lt;0x57 0x0 0x10&gt;;</div><div class='add'>+            pagesize = &lt;0x8&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i3c/i3c.yaml b/Documentation/devicetree/bindings/i3c/i3c.yaml<br/>index 1f82fc923799..fdb4212149e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/i3c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/i3c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/i3c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i3c/i3c.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/i3c/i3c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: I3C bus binding</div><div class='add'>+title: I3C bus</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml b/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml<br/>index 04da001fc6ec..c002afdbfc7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i3c/mipi-i3c-hci.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/i3c/mipi-i3c-hci.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: MIPI I3C HCI Device Tree Bindings</div><div class='add'>+title: MIPI I3C HCI</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nicolas Pitre &lt;npitre@baylibre.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt<br/>deleted file mode 100644<br/>index 07f35f36085d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-Bindings for Synopsys DesignWare I3C master block</div><div class='del'>-=================================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- compatible: shall be "snps,dw-i3c-master-1.00a"</div><div class='del'>-- clocks: shall reference the core_clk</div><div class='del'>-- interrupts: the interrupt line connected to this I3C master</div><div class='del'>-- reg: Offset and length of I3C master registers</div><div class='del'>-</div><div class='del'>-Mandatory properties defined by the generic binding (see</div><div class='del'>-Documentation/devicetree/bindings/i3c/i3c.yaml for more details):</div><div class='del'>-</div><div class='del'>-- #address-cells: shall be set to 3</div><div class='del'>-- #size-cells: shall be set to 0</div><div class='del'>-</div><div class='del'>-Optional properties defined by the generic binding (see</div><div class='del'>-Documentation/devicetree/bindings/i3c/i3c.yaml for more details):</div><div class='del'>-</div><div class='del'>-- i2c-scl-hz</div><div class='del'>-- i3c-scl-hz</div><div class='del'>-</div><div class='del'>-I3C device connected on the bus follow the generic description (see</div><div class='del'>-Documentation/devicetree/bindings/i3c/i3c.yaml for more details).</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	i3c-master@2000 {</div><div class='del'>-		compatible = "snps,dw-i3c-master-1.00a";</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x02000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;i3cclk&gt;;</div><div class='del'>-</div><div class='del'>-		eeprom@57{</div><div class='del'>-			compatible = "atmel,24c01";</div><div class='del'>-			reg = &lt;0x57 0x0 0x10&gt;;</div><div class='del'>-			pagesize = &lt;0x8&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml b/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml<br/>new file mode 100644<br/>index 000000000000..7a76fd32962a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/i3c/snps,dw-i3c-master.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/i3c/snps,dw-i3c-master.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys DesignWare I3C master block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: i3c.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,dw-i3c-master-1.00a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i3c-master@2000 {</div><div class='add'>+        compatible = "snps,dw-i3c-master-1.00a";</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x02000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;i3cclk&gt;;</div><div class='add'>+</div><div class='add'>+        eeprom@57{</div><div class='add'>+            compatible = "atmel,24c01";</div><div class='add'>+            reg = &lt;0x57 0x0 0x10&gt;;</div><div class='add'>+            pagesize = &lt;0x8&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml<br/>index 6f8f8a6258fe..b6ba7ad1a8d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/adi,adis16201.yaml</a></div><div class='hunk'>@@ -27,20 +27,21 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdd-supply: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml<br/>index 4fcbfd93e218..5887021cc90f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ADIS16240 Programmable Impact Sensor and Recorder driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Alexandru Ardelean &lt;alexandru.ardelean@analog.com&gt;</div><div class='add'>+  - Alexandru Tachici &lt;alexandru.tachici@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   ADIS16240 Programmable Impact Sensor and Recorder driver that supports</div><div class='hunk'>@@ -25,20 +25,21 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml<br/>index d6afc1b8c272..0c5b64cae965 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/adi,adxl313.yaml</a></div><div class='hunk'>@@ -4,28 +4,30 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/accel/adi,adxl313.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Analog Devices ADXL313 3-Axis Digital Accelerometer</div><div class='add'>+title: Analog Devices ADXL312, ADXL313, and ADXL314 3-Axis Digital Accelerometers</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lucas Stankus &lt;lucas.p.stankus@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Analog Devices ADXL313 3-Axis Digital Accelerometer that supports</div><div class='del'>-  both I2C &amp; SPI interfaces.</div><div class='add'>+  Analog Devices ADXL312, ADXL313, and ADXL314 3-Axis Digital Accelerometer that</div><div class='add'>+  support both I2C &amp; SPI interfaces.</div><div class='add'>+    https://www.analog.com/en/products/adxl312.html</div><div class='ctx'>     https://www.analog.com/en/products/adxl313.html</div><div class='add'>+    https://www.analog.com/en/products/adxl314.html</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - adi,adxl312</div><div class='ctx'>       - adi,adxl313</div><div class='add'>+      - adi,adxl314</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   spi-3wire: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vs-supply:</div><div class='ctx'>     description: Regulator that supplies power to the accelerometer</div><div class='ctx'> </div><div class='hunk'>@@ -48,13 +50,16 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml<br/>index 11d32a288535..07cacc3f6a97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml</a></div><div class='hunk'>@@ -32,8 +32,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -42,20 +40,23 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         /* Example for a I2C device node */</div><div class='ctx'>         accelerometer@2a {</div><div class='ctx'>             compatible = "adi,adxl345";</div><div class='del'>-            reg = &lt;0x53&gt;;</div><div class='add'>+            reg = &lt;0x2a&gt;;</div><div class='ctx'>             interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='ctx'>             interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>         };</div><div class='hunk'>@@ -63,7 +64,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml<br/>index ba54d6998f2e..c07261c71013 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml</a></div><div class='hunk'>@@ -4,20 +4,22 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/accel/adi,adxl355.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer</div><div class='add'>+title: Analog Devices ADXL355 and ADXL359 3-Axis, Low noise MEMS Accelerometers</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Puranjay Mohan &lt;puranjay12@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer that supports</div><div class='del'>-  both I2C &amp; SPI interfaces</div><div class='add'>+  Analog Devices ADXL355 and ADXL359 3-Axis, Low noise MEMS Accelerometers that</div><div class='add'>+  support both I2C &amp; SPI interfaces</div><div class='ctx'>     https://www.analog.com/en/products/adxl355.html</div><div class='add'>+    https://www.analog.com/en/products/adxl359.html</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - adi,adxl355</div><div class='add'>+      - adi,adxl359</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -45,44 +47,45 @@ properties:</div><div class='ctx'>   vddio-supply:</div><div class='ctx'>     description: Regulator that provides power to the bus</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-        i2c {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-                /* Example for a I2C device node */</div><div class='del'>-                accelerometer@1d {</div><div class='del'>-                        compatible = "adi,adxl355";</div><div class='del'>-                        reg = &lt;0x1d&gt;;</div><div class='del'>-                        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-                        interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                        interrupt-names = "DRDY";</div><div class='del'>-                };</div><div class='add'>+        /* Example for a I2C device node */</div><div class='add'>+        accelerometer@1d {</div><div class='add'>+            compatible = "adi,adxl355";</div><div class='add'>+            reg = &lt;0x1d&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "DRDY";</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-        spi {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-                accelerometer@0 {</div><div class='del'>-                        compatible = "adi,adxl355";</div><div class='del'>-                        reg = &lt;0&gt;;</div><div class='del'>-                        spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-                        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-                        interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                        interrupt-names = "DRDY";</div><div class='del'>-                };</div><div class='add'>+        accelerometer@0 {</div><div class='add'>+            compatible = "adi,adxl355";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "DRDY";</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml<br/>index d259e796c1d6..f10d98d34cb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/adi,adxl367.yaml</a></div><div class='hunk'>@@ -35,8 +35,6 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdd-supply: true</div><div class='ctx'>   vddio-supply: true</div><div class='ctx'> </div><div class='hunk'>@@ -45,7 +43,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml<br/>index 38b59b6454ce..62465e36a590 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml</a></div><div class='hunk'>@@ -25,43 +25,44 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-        i2c0 {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-                /* Example for a I2C device node */</div><div class='del'>-                accelerometer@53 {</div><div class='del'>-                        compatible = "adi,adxl372";</div><div class='del'>-                        reg = &lt;0x53&gt;;</div><div class='del'>-                        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-                        interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-                };</div><div class='add'>+        /* Example for a I2C device node */</div><div class='add'>+        accelerometer@53 {</div><div class='add'>+            compatible = "adi,adxl372";</div><div class='add'>+            reg = &lt;0x53&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-        spi0 {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-                accelerometer@0 {</div><div class='del'>-                        compatible = "adi,adxl372";</div><div class='del'>-                        reg = &lt;0&gt;;</div><div class='del'>-                        spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-                        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-                        interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-                };</div><div class='add'>+        accelerometer@0 {</div><div class='add'>+            compatible = "adi,adxl372";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml<br/>index 942b23ad0712..ec643de031a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/bosch,bma220.yaml</a></div><div class='hunk'>@@ -20,8 +20,6 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdda-supply: true</div><div class='ctx'>   vddd-supply: true</div><div class='ctx'>   vddio-supply: true</div><div class='hunk'>@@ -30,12 +28,15 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml<br/>index 478e75ae0885..457a709b583c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/bosch,bma255.yaml</a></div><div class='hunk'>@@ -72,7 +72,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml b/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml<br/>index 911a1ae9c83f..3cb82576d758 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/bosch,bmi088.yaml</a></div><div class='hunk'>@@ -17,13 +17,13 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - bosch,bmi085-accel</div><div class='ctx'>       - bosch,bmi088-accel</div><div class='add'>+      - bosch,bmi090l-accel</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdd-supply: true</div><div class='ctx'> </div><div class='ctx'>   vddio-supply: true</div><div class='hunk'>@@ -48,7 +48,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml b/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml<br/>index 7c8f8bdc2333..c8659c5eba2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/fsl,mma7455.yaml</a></div><div class='hunk'>@@ -7,7 +7,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Freescale MMA7455 and MMA7456 three axis accelerometers</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Joachim Eastwood &lt;manabian@gmail.com&gt;</div><div class='ctx'>   - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='hunk'>@@ -40,13 +39,14 @@ properties:</div><div class='ctx'>         - "INT1"</div><div class='ctx'>         - "INT2"</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/kionix,kx022a.yaml b/Documentation/devicetree/bindings/iio/accel/kionix,kx022a.yaml<br/>new file mode 100644<br/>index 000000000000..986df1a6ff0a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/kionix,kx022a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/kionix,kx022a.yaml</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/accel/kionix,kx022a.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ROHM/Kionix KX022A Accelerometer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  KX022A is a 3-axis accelerometer supporting +/- 2G, 4G, 8G and 16G ranges,</div><div class='add'>+  output data-rates from 0.78Hz to 1600Hz and a hardware-fifo buffering.</div><div class='add'>+  KX022A can be accessed either via I2C or SPI.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: kionix,kx022a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - enum: [INT1, INT2]</div><div class='add'>+      - const: INT2</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+  io-vdd-supply: true</div><div class='add'>+</div><div class='add'>+  mount-matrix:</div><div class='add'>+    description: |</div><div class='add'>+      an optional 3x3 mounting rotation matrix.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        accel@1f {</div><div class='add'>+            compatible = "kionix,kx022a";</div><div class='add'>+            reg = &lt;0x1f&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+            interrupts = &lt;29 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            interrupt-names = "INT1";</div><div class='add'>+</div><div class='add'>+            io-vdd-supply = &lt;&amp;iovdd&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml b/Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml<br/>index 714e48e613de..6ddb03f61bd9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/kionix,kxcjk1013.yaml</a></div><div class='hunk'>@@ -44,7 +44,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         accel@f {</div><div class='ctx'>             compatible = "kionix,kxtf9";</div><div class='del'>-            reg = &lt;0x0F&gt;;</div><div class='add'>+            reg = &lt;0xf&gt;;</div><div class='ctx'>             mount-matrix = "0", "1", "0",</div><div class='ctx'>                            "1", "0", "0",</div><div class='ctx'>                            "0", "0", "1";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml<br/>index 390b87242fcb..f64d99b35492 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml</a></div><div class='hunk'>@@ -29,13 +29,14 @@ properties:</div><div class='ctx'>   mount-matrix:</div><div class='ctx'>     description: an optional 3x3 mounting rotation matrix.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml b/Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml<br/>new file mode 100644<br/>index 000000000000..d530ec041fe7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/memsensing,msa311.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MEMSensing digital 3-Axis accelerometer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dmitry Rokosov &lt;ddrokosov@sberdevices.ru&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MSA311 is a tri-axial, low-g accelerometer with I2C digital output for</div><div class='add'>+  sensitivity consumer applications. It has dynamical user selectable full</div><div class='add'>+  scales range of +-2g/+-4g/+-8g/+-16g and allows acceleration measurements</div><div class='add'>+  with output data rates from 1Hz to 1000Hz.</div><div class='add'>+  Datasheet can be found at following URL</div><div class='add'>+  https://cdn-shop.adafruit.com/product-files/5309/MSA311-V1.1-ENG.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: memsensing,msa311</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        accelerometer@62 {</div><div class='add'>+            compatible = "memsensing,msa311";</div><div class='add'>+            reg = &lt;0x62&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio_intc&gt;;</div><div class='add'>+            interrupts = &lt;29 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vcc_5v&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml b/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml<br/>index 55fd3548e3b6..00c990caa1e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/murata,sca3300.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - murata,sca3300</div><div class='add'>+      - murata,scl3300</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -28,7 +29,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml b/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml<br/>index ad529ab2c6e2..783c7ddfcd90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/accel/nxp,fxls8962af.yaml</a></div><div class='hunk'>@@ -27,8 +27,6 @@ properties:</div><div class='ctx'>   vdd-supply:</div><div class='ctx'>     description: phandle to the regulator that provides power to the accelerometer</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -44,12 +42,15 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +65,7 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adc.yaml b/Documentation/devicetree/bindings/iio/adc/adc.yaml<br/>index db348fcbb52c..261601729745 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/adc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic IIO bindings for ADC channels</div><div class='add'>+title: IIO Common Properties for ADC Channels</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml<br/>new file mode 100644<br/>index 000000000000..d00690a8d3fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Analog Devices Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices AD4130 ADC device driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Cosmin Tanislav &lt;cosmin.tanislav@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:</div><div class='add'>+    https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,ad4130</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: phandle to the master clock (mclk)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    description: |</div><div class='add'>+      Specify which interrupt pin should be configured as Data Ready / FIFO</div><div class='add'>+      interrupt.</div><div class='add'>+      Default if not supplied is int.</div><div class='add'>+    enum:</div><div class='add'>+      - int</div><div class='add'>+      - clk</div><div class='add'>+      - p2</div><div class='add'>+      - dout</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  refin1-supply:</div><div class='add'>+    description: refin1 supply. Can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  refin2-supply:</div><div class='add'>+    description: refin2 supply. Can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: AVDD voltage supply. Can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  iovdd-supply:</div><div class='add'>+    description: IOVDD voltage supply. Used for the chip interface.</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 5000000</div><div class='add'>+</div><div class='add'>+  adi,ext-clk-freq-hz:</div><div class='add'>+    description: Specify the frequency of the external clock.</div><div class='add'>+    enum: [76800, 153600]</div><div class='add'>+    default: 76800</div><div class='add'>+</div><div class='add'>+  adi,bipolar:</div><div class='add'>+    description: Specify if the device should be used in bipolar mode.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  adi,vbias-pins:</div><div class='add'>+    description: Analog inputs to apply a voltage bias of (AVDD − AVSS) / 2 to.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 15</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^channel@([0-9a-f])$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: adc.yaml</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: The channel number.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+</div><div class='add'>+      diff-channels:</div><div class='add'>+        description: |</div><div class='add'>+          Besides the analog inputs available, internal inputs can be used.</div><div class='add'>+          16: Internal temperature sensor.</div><div class='add'>+          17: AVSS</div><div class='add'>+          18: Internal reference</div><div class='add'>+          19: DGND</div><div class='add'>+          20: (AVDD − AVSS)/6+</div><div class='add'>+          21: (AVDD − AVSS)/6-</div><div class='add'>+          22: (IOVDD − DGND)/6+</div><div class='add'>+          23: (IOVDD − DGND)/6-</div><div class='add'>+          24: (ALDO − AVSS)/6+</div><div class='add'>+          25: (ALDO − AVSS)/6-</div><div class='add'>+          26: (DLDO − DGND)/6+</div><div class='add'>+          27: (DLDO − DGND)/6-</div><div class='add'>+          28: V_MV_P</div><div class='add'>+          29: V_MV_M</div><div class='add'>+        items:</div><div class='add'>+          minimum: 0</div><div class='add'>+          maximum: 29</div><div class='add'>+</div><div class='add'>+      adi,reference-select:</div><div class='add'>+        description: |</div><div class='add'>+          Select the reference source to use when converting on the</div><div class='add'>+          specific channel. Valid values are:</div><div class='add'>+          0: REFIN1(+)/REFIN1(−)</div><div class='add'>+          1: REFIN2(+)/REFIN2(−)</div><div class='add'>+          2: REFOUT/AVSS (Internal reference)</div><div class='add'>+          3: AVDD/AVSS</div><div class='add'>+          If not specified, REFIN1 is used.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+      adi,excitation-pin-0:</div><div class='add'>+        description: |</div><div class='add'>+          Analog input to apply excitation current to while the channel</div><div class='add'>+          is active.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+      adi,excitation-pin-1:</div><div class='add'>+        description: |</div><div class='add'>+          Analog input to apply excitation current to while this channel</div><div class='add'>+          is active.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+      adi,excitation-current-0-nanoamp:</div><div class='add'>+        description: |</div><div class='add'>+          Excitation current in nanoamps to be applied to pin specified in</div><div class='add'>+          adi,excitation-pin-0 while this channel is active.</div><div class='add'>+        enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000]</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+      adi,excitation-current-1-nanoamp:</div><div class='add'>+        description: |</div><div class='add'>+          Excitation current in nanoamps to be applied to pin specified in</div><div class='add'>+          adi,excitation-pin-1 while this channel is active.</div><div class='add'>+        enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000]</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+      adi,burnout-current-nanoamp:</div><div class='add'>+        description: |</div><div class='add'>+          Burnout current in nanoamps to be applied for this channel.</div><div class='add'>+        enum: [0, 500, 2000, 4000]</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+      adi,buffered-positive:</div><div class='add'>+        description: Enable buffered mode for positive input.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+      adi,buffered-negative:</div><div class='add'>+        description: Enable buffered mode for negative input.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - diff-channels</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      adc@0 {</div><div class='add'>+        compatible = "adi,ad4130";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+        interrupts = &lt;27 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+</div><div class='add'>+        channel@0 {</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          adi,reference-select = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+          /* AIN8, AIN9 */</div><div class='add'>+          diff-channels = &lt;8 9&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@1 {</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+          adi,reference-select = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+          /* AIN10, AIN11 */</div><div class='add'>+          diff-channels = &lt;10 11&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@2 {</div><div class='add'>+          reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+          adi,reference-select = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+          /* Temperature Sensor, DGND */</div><div class='add'>+          diff-channels = &lt;16 19&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@3 {</div><div class='add'>+          reg = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+          adi,reference-select = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+          /* Internal reference, DGND */</div><div class='add'>+          diff-channels = &lt;18 19&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@4 {</div><div class='add'>+          reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+          adi,reference-select = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+          /* DGND, DGND */</div><div class='add'>+          diff-channels = &lt;19 19&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml<br/>index 31ffa275f5fa..ce7ba634643c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices AD7091R5 4-Channel 12-Bit ADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Beniamin Bia &lt;beniamin.bia@analog.com&gt;</div><div class='add'>+  - Michael Hennerich &lt;michael.hennerich@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Analog Devices AD7091R5 4-Channel 12-Bit ADC</div><div class='hunk'>@@ -44,11 +44,11 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         adc@2f {</div><div class='del'>-                compatible = "adi,ad7091r5";</div><div class='del'>-                reg = &lt;0x2f&gt;;</div><div class='add'>+            compatible = "adi,ad7091r5";</div><div class='add'>+            reg = &lt;0x2f&gt;;</div><div class='ctx'> </div><div class='del'>-                interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-                interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml<br/>index fb3d0dae9bae..35ed04350e28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml</a></div><div class='hunk'>@@ -52,8 +52,6 @@ properties:</div><div class='ctx'>   avdd-supply:</div><div class='ctx'>     description: avdd supply can be used as reference for conversion.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -63,7 +61,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@([0-9]|1[0-5])$":</div><div class='del'>-    $ref: "adc.yaml"</div><div class='add'>+    $ref: adc.yaml</div><div class='ctx'>     type: object</div><div class='ctx'>     description: |</div><div class='ctx'>       Represents the external channels which are connected to the ADC.</div><div class='hunk'>@@ -106,7 +104,10 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml<br/>index 22b7ed3723f6..d521d516088b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml</a></div><div class='hunk'>@@ -30,8 +30,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: phandle to the master clock (mclk)</div><div class='hunk'>@@ -94,30 +92,33 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'>   - spi-cpha</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    spi0 {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-      adc@0 {</div><div class='del'>-        compatible = "adi,ad7192";</div><div class='del'>-        reg = &lt;0&gt;;</div><div class='del'>-        spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-        spi-cpol;</div><div class='del'>-        spi-cpha;</div><div class='del'>-        clocks = &lt;&amp;ad7192_mclk&gt;;</div><div class='del'>-        clock-names = "mclk";</div><div class='del'>-        interrupts = &lt;25 0x2&gt;;</div><div class='del'>-        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-        dvdd-supply = &lt;&amp;dvdd&gt;;</div><div class='del'>-        avdd-supply = &lt;&amp;avdd&gt;;</div><div class='del'>-</div><div class='del'>-        adi,refin2-pins-enable;</div><div class='del'>-        adi,rejection-60-Hz-enable;</div><div class='del'>-        adi,buffer-enable;</div><div class='del'>-        adi,burnout-currents-enable;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@0 {</div><div class='add'>+            compatible = "adi,ad7192";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-cpha;</div><div class='add'>+            clocks = &lt;&amp;ad7192_mclk&gt;;</div><div class='add'>+            clock-names = "mclk";</div><div class='add'>+            interrupts = &lt;25 0x2&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;dvdd&gt;;</div><div class='add'>+            avdd-supply = &lt;&amp;avdd&gt;;</div><div class='add'>+</div><div class='add'>+            adi,refin2-pins-enable;</div><div class='add'>+            adi,rejection-60-Hz-enable;</div><div class='add'>+            adi,buffer-enable;</div><div class='add'>+            adi,burnout-currents-enable;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml<br/>index a694d5794d4a..dfb8f305e2f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml</a></div><div class='hunk'>@@ -28,8 +28,6 @@ properties:</div><div class='ctx'>     description: IRQ line for the ADC</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   adi,voltage-alert-last-chan:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='hunk'>@@ -55,7 +53,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml<br/>index 930f9e3904d7..0b2f5dc80600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml</a></div><div class='hunk'>@@ -44,4 +44,3 @@ examples:</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml<br/>index a3e39a40c9b3..7cc4ddc4e9b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml</a></div><div class='hunk'>@@ -30,8 +30,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -45,7 +43,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@[0-7]$":</div><div class='del'>-    $ref: "adc.yaml"</div><div class='add'>+    $ref: adc.yaml</div><div class='ctx'>     type: object</div><div class='ctx'>     description: |</div><div class='ctx'>       Represents the external channels which are connected to the ADC.</div><div class='hunk'>@@ -65,7 +63,10 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml<br/>index ca414bb396c5..cd8ac5162d27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7298.yaml</a></div><div class='hunk'>@@ -24,13 +24,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   vref-supply: true</div><div class='ctx'>   vdd-supply: true</div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml<br/>index cf711082ad7d..44c671eeda73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7476.yaml</a></div><div class='hunk'>@@ -66,8 +66,6 @@ properties:</div><div class='ctx'>       to the other supplies. Needed to be able to establish channel scaling</div><div class='ctx'>       unless there is also an internal reference available (e.g. ad7091r)</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   adi,conversion-start-gpios:</div><div class='ctx'>     description: A GPIO used to trigger the start of a conversion</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -76,9 +74,9 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='ctx'>   # Devices where reference is vcc</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -98,6 +96,7 @@ allOf:</div><div class='ctx'>               - ti,adc121s</div><div class='ctx'>               - ti,ads7866</div><div class='ctx'>               - ti,ads7868</div><div class='add'>+    then:</div><div class='ctx'>       required:</div><div class='ctx'>         - vcc-supply</div><div class='ctx'>   # Devices with a vref</div><div class='hunk'>@@ -157,6 +156,8 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         adi,conversion-start-gpios: false</div><div class='ctx'> </div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml<br/>index 73775174cf57..7fa46df1f4fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml</a></div><div class='hunk'>@@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices AD7606 Simultaneous Sampling ADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Beniamin Bia &lt;beniamin.bia@analog.com&gt;</div><div class='del'>-  - Stefan Popa &lt;stefan.popa@analog.com&gt;</div><div class='add'>+  - Michael Hennerich &lt;michael.hennerich@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Analog Devices AD7606 Simultaneous Sampling ADC</div><div class='hunk'>@@ -33,8 +32,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   avcc-supply: true</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='hunk'>@@ -106,36 +103,39 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - adi,conversion-start-gpios</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         adc@0 {</div><div class='del'>-                compatible = "adi,ad7606-8";</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-                spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-                spi-cpol;</div><div class='del'>-                spi-cpha;</div><div class='del'>-</div><div class='del'>-                avcc-supply = &lt;&amp;adc_vref&gt;;</div><div class='del'>-</div><div class='del'>-                interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-                interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-</div><div class='del'>-                adi,conversion-start-gpios = &lt;&amp;gpio 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-                reset-gpios = &lt;&amp;gpio 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-                adi,first-data-gpios = &lt;&amp;gpio 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-                adi,oversampling-ratio-gpios = &lt;&amp;gpio 18 GPIO_ACTIVE_HIGH&gt;,</div><div class='del'>-                                               &lt;&amp;gpio 23 GPIO_ACTIVE_HIGH&gt;,</div><div class='del'>-                                               &lt;&amp;gpio 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-                standby-gpios = &lt;&amp;gpio 24 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-                adi,sw-mode;</div><div class='add'>+            compatible = "adi,ad7606-8";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-cpha;</div><div class='add'>+</div><div class='add'>+            avcc-supply = &lt;&amp;adc_vref&gt;;</div><div class='add'>+</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+</div><div class='add'>+            adi,conversion-start-gpios = &lt;&amp;gpio 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 27 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            adi,first-data-gpios = &lt;&amp;gpio 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            adi,oversampling-ratio-gpios = &lt;&amp;gpio 18 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+                                           &lt;&amp;gpio 23 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+                                           &lt;&amp;gpio 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            standby-gpios = &lt;&amp;gpio 24 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            adi,sw-mode;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml<br/>index a85a28145ef6..3ce59d4d065f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml</a></div><div class='hunk'>@@ -50,8 +50,6 @@ properties:</div><div class='ctx'>   reset-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='ctx'>   spi-cpha: true</div><div class='hunk'>@@ -88,7 +86,10 @@ patternProperties:</div><div class='ctx'>       - reg</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml<br/>index a67ba67dab51..5fcc8dd012f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml</a></div><div class='hunk'>@@ -72,7 +72,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml<br/>index e82194974eea..85148338c597 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml</a></div><div class='hunk'>@@ -8,11 +8,10 @@ title: Analog Devices AD7923 and similars with 4 and 8 Channel ADCs.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Hennerich &lt;michael.hennerich@analog.com&gt;</div><div class='del'>-  - Patrick Vasseur &lt;patrick.vasseur@c-s.fr&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Analog Devices AD7904, AD7914, AD7923, AD7924 4 Channel ADCs, and AD7908,</div><div class='del'>-   AD7918, AD7928 8 Channels ADCs.</div><div class='add'>+   AD7918, AD7927, AD7928 8 Channels ADCs.</div><div class='ctx'> </div><div class='ctx'>   Specifications about the part can be found at:</div><div class='ctx'>     https://www.analog.com/media/en/technical-documentation/data-sheets/AD7923.pdf</div><div class='hunk'>@@ -21,14 +20,22 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - adi,ad7904</div><div class='del'>-      - adi,ad7914</div><div class='del'>-      - adi,ad7923</div><div class='del'>-      - adi,ad7924</div><div class='del'>-      - adi,ad7908</div><div class='del'>-      - adi,ad7918</div><div class='del'>-      - adi,ad7928</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - adi,ad7904</div><div class='add'>+          - adi,ad7908</div><div class='add'>+          - adi,ad7914</div><div class='add'>+          - adi,ad7918</div><div class='add'>+          - adi,ad7923</div><div class='add'>+          - adi,ad7928</div><div class='add'>+      - const: adi,ad7924</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - const: adi,ad7924</div><div class='add'>+          - const: adi,ad7923</div><div class='add'>+      - items:</div><div class='add'>+          - const: adi,ad7927</div><div class='add'>+          - const: adi,ad7928</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -37,19 +44,24 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       The regulator supply for ADC reference voltage.</div><div class='ctx'> </div><div class='add'>+  adi,range-double:</div><div class='add'>+    description: Sets the analog input range from 0 to 2xVREF.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   '#size-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml<br/>index 0b10ed5f74ae..9ee4d977c5ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml</a></div><div class='hunk'>@@ -49,8 +49,6 @@ properties:</div><div class='ctx'>     default: 4096000</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   '#io-channel-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +62,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml<br/>index 29641ce7175b..433ed2c9295f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad799x.yaml</a></div><div class='hunk'>@@ -57,17 +57,17 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     i2c {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-       adc1: adc@28 {</div><div class='del'>-               reg = &lt;0x28&gt;;</div><div class='del'>-               compatible = "adi,ad7991";</div><div class='del'>-               interrupts = &lt;13 2&gt;;</div><div class='del'>-               interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='add'>+        adc1: adc@28 {</div><div class='add'>+            reg = &lt;0x28&gt;;</div><div class='add'>+            compatible = "adi,ad7991";</div><div class='add'>+            interrupts = &lt;13 2&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='ctx'> </div><div class='del'>-               vcc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='del'>-               vref-supply = &lt;&amp;adc_vref&gt;;</div><div class='add'>+            vcc-supply = &lt;&amp;vcc_3v3&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;adc_vref&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml<br/>index b5aed40d8a50..7aa748d6b7a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml</a></div><div class='hunk'>@@ -8,7 +8,6 @@ title: Analog Devices AD9467 and similar High-Speed ADCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Hennerich &lt;michael.hennerich@analog.com&gt;</div><div class='del'>-  - Alexandru Ardelean &lt;alexandru.ardelean@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The AD9467 and the parts similar with it, are high-speed analog-to-digital</div><div class='hunk'>@@ -65,10 +64,10 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         adc@0 {</div><div class='del'>-          compatible = "adi,ad9467";</div><div class='del'>-          reg = &lt;0&gt;;</div><div class='del'>-          clocks = &lt;&amp;adc_clk&gt;;</div><div class='del'>-          clock-names = "adc-clk";</div><div class='add'>+            compatible = "adi,ad9467";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            clocks = &lt;&amp;adc_clk&gt;;</div><div class='add'>+            clock-names = "adc-clk";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml<br/>index 0924b2b4972b..9996dd93f84b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml</a></div><div class='hunk'>@@ -8,7 +8,6 @@ title: Analog Devices AXI ADC IP core</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Hennerich &lt;michael.hennerich@analog.com&gt;</div><div class='del'>-  - Alexandru Ardelean &lt;alexandru.ardelean@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Analog Devices Generic AXI ADC IP core for interfacing an ADC device</div><div class='hunk'>@@ -52,11 +51,11 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     axi-adc@44a00000 {</div><div class='del'>-          compatible = "adi,axi-adc-10.0.a";</div><div class='del'>-          reg = &lt;0x44a00000 0x10000&gt;;</div><div class='del'>-          dmas = &lt;&amp;rx_dma 0&gt;;</div><div class='del'>-          dma-names = "rx";</div><div class='add'>+        compatible = "adi,axi-adc-10.0.a";</div><div class='add'>+        reg = &lt;0x44a00000 0x10000&gt;;</div><div class='add'>+        dmas = &lt;&amp;rx_dma 0&gt;;</div><div class='add'>+        dma-names = "rx";</div><div class='ctx'> </div><div class='del'>-          adi,adc-dev = &lt;&amp;spi_adc&gt;;</div><div class='add'>+        adi,adc-dev = &lt;&amp;spi_adc&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/adi,max11410.yaml b/Documentation/devicetree/bindings/iio/adc/adi,max11410.yaml<br/>new file mode 100644<br/>index 000000000000..53f9feff137b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/adi,max11410.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/adi,max11410.yaml</a></div><div class='hunk'>@@ -0,0 +1,177 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Analog Devices Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/adi,max11410.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices MAX11410 ADC device driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ibrahim Tilki &lt;Ibrahim.Tilki@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Bindings for the Analog Devices MAX11410 ADC device. Datasheet can be</div><div class='add'>+  found here:</div><div class='add'>+    https://datasheets.maximintegrated.com/en/ds/MAX11410.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,max11410</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    description: Name of the gpio pin of max11410 used for IRQ</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - enum: [gpio0, gpio1]</div><div class='add'>+      - const: gpio1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Optional avdd supply. Used as reference when no explicit reference supplied.</div><div class='add'>+</div><div class='add'>+  vref0p-supply:</div><div class='add'>+    description: vref0p supply can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  vref1p-supply:</div><div class='add'>+    description: vref1p supply can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  vref2p-supply:</div><div class='add'>+    description: vref2p supply can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  vref0n-supply:</div><div class='add'>+    description: vref0n supply can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  vref1n-supply:</div><div class='add'>+    description: vref1n supply can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  vref2n-supply:</div><div class='add'>+    description: vref2n supply can be used as reference for conversion.</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 8000000</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^channel(@[0-9])?$":</div><div class='add'>+    $ref: adc.yaml</div><div class='add'>+    type: object</div><div class='add'>+    description: Represents the external channels which are connected to the ADC.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: The channel number in single-ended mode.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 9</div><div class='add'>+</div><div class='add'>+      adi,reference:</div><div class='add'>+        description: |</div><div class='add'>+          Select the reference source to use when converting on</div><div class='add'>+          the specific channel. Valid values are:</div><div class='add'>+          0: VREF0P/VREF0N</div><div class='add'>+          1: VREF1P/VREF1N</div><div class='add'>+          2: VREF2P/VREF2N</div><div class='add'>+          3: AVDD/AGND</div><div class='add'>+          4: VREF0P/AGND</div><div class='add'>+          5: VREF1P/AGND</div><div class='add'>+          6: VREF2P/AGND</div><div class='add'>+          If this field is left empty, AVDD/AGND is selected.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2, 3, 4, 5, 6]</div><div class='add'>+        default: 3</div><div class='add'>+</div><div class='add'>+      adi,input-mode:</div><div class='add'>+        description: |</div><div class='add'>+          Select signal path of input channels. Valid values are:</div><div class='add'>+          0: Buffered, low-power, unity-gain path (default)</div><div class='add'>+          1: Bypass path</div><div class='add'>+          2: PGA path</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2]</div><div class='add'>+        default: 0</div><div class='add'>+</div><div class='add'>+      diff-channels: true</div><div class='add'>+</div><div class='add'>+      bipolar: true</div><div class='add'>+</div><div class='add'>+      settling-time-us: true</div><div class='add'>+</div><div class='add'>+      adi,buffered-vrefp:</div><div class='add'>+        description: Enable buffered mode for positive reference.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+      adi,buffered-vrefn:</div><div class='add'>+        description: Enable buffered mode for negative reference.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            compatible = "adi,max11410";</div><div class='add'>+            spi-max-frequency = &lt;8000000&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            interrupt-names = "gpio1";</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;adc_avdd&gt;;</div><div class='add'>+</div><div class='add'>+            vref1p-supply = &lt;&amp;adc_vref1p&gt;;</div><div class='add'>+            vref1n-supply = &lt;&amp;adc_vref1n&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            channel@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                diff-channels = &lt;2 3&gt;;</div><div class='add'>+                adi,reference = &lt;1&gt;;</div><div class='add'>+                bipolar;</div><div class='add'>+                settling-time-us = &lt;100000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                diff-channels = &lt;7 9&gt;;</div><div class='add'>+                adi,reference = &lt;5&gt;;</div><div class='add'>+                adi,input-mode = &lt;2&gt;;</div><div class='add'>+                settling-time-us = &lt;50000&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml b/Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml<br/>index 15c514b83583..a73a355fc665 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/allwinner,sun8i-a33-ths.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/allwinner,sun8i-a33-ths.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A33 Thermal Sensor Device Tree Bindings</div><div class='add'>+title: Allwinner A33 Thermal Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml<br/>index b283c8ca2bbf..5c08d8b6e995 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml</a></div><div class='hunk'>@@ -62,13 +62,6 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Inform the driver that last channel will be used to sensor battery.</div><div class='ctx'> </div><div class='del'>-  aspeed,trim-data-valid:</div><div class='del'>-    type: boolean</div><div class='del'>-    description: |</div><div class='del'>-      The ADC reference voltage can be calibrated to obtain the trimming</div><div class='del'>-      data which will be stored in otp. This property informs the driver that</div><div class='del'>-      the data store in the otp is valid.</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml b/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml<br/>index 31f840d59303..4817b840977a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/atmel,sama5d2-adc.yaml</a></div><div class='hunk'>@@ -41,7 +41,7 @@ properties:</div><div class='ctx'>     description: Startup time expressed in ms, it depends on SoC.</div><div class='ctx'> </div><div class='ctx'>   atmel,trigger-edge-type:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='ctx'>       One of possible edge types for the ADTRG hardware trigger pin.</div><div class='ctx'>       When the specific edge type is detected, the conversion will</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml b/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml<br/>index 77605f17901c..9c57eb13f892 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/avia-hx711.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AVIA HX711 ADC chip for weight cells</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml b/Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml<br/>new file mode 100644<br/>index 000000000000..6d4fb3e1d2a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/cirrus,ep9301-adc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cirrus Logic EP930x internal ADC</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Cirrus Logic EP9301/EP9302 SoCs' internal ADC block.</div><div class='add'>+</div><div class='add'>+  User's manual:</div><div class='add'>+  https://cdn.embeddedts.com/resource-attachments/ts-7000_ep9301-ug.pdf</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cirrus,ep9301-adc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    adc: adc@80900000 {</div><div class='add'>+        compatible = "cirrus,ep9301-adc";</div><div class='add'>+        reg = &lt;0x80900000 0x28&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscon 24&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+        interrupts = &lt;30&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml b/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml<br/>index 925f355cc21f..c770ff4998f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml</a></div><div class='hunk'>@@ -14,7 +14,14 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: fsl,vf610-adc</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6sx-adc</div><div class='add'>+              - fsl,imx6ul-adc</div><div class='add'>+          - const: fsl,vf610-adc</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,vf610-adc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml b/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml<br/>index 52490cbb0af0..56bcbe5dcd79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml</a></div><div class='hunk'>@@ -24,8 +24,6 @@ properties:</div><div class='ctx'>       GPIO used for controlling the reset pin</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   "#io-channel-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -33,7 +31,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml b/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml<br/>index 698beb896f76..9cd0fd539782 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ingenic,adc.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright 2019-2020 Artur Rojek</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic JZ47xx ADC controller IIO bindings</div><div class='add'>+title: Ingenic JZ47xx ADC controller IIO</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Artur Rojek &lt;contact@artur-rojek.eu&gt;</div><div class='hunk'>@@ -78,14 +78,14 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/iio/adc/ingenic,adc.h&gt;</div><div class='ctx'> </div><div class='ctx'>     adc@10070000 {</div><div class='del'>-            compatible = "ingenic,jz4740-adc";</div><div class='del'>-            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+        compatible = "ingenic,jz4740-adc";</div><div class='add'>+        #io-channel-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-            reg = &lt;0x10070000 0x30&gt;;</div><div class='add'>+        reg = &lt;0x10070000 0x30&gt;;</div><div class='ctx'> </div><div class='del'>-            clocks = &lt;&amp;cgu JZ4740_CLK_ADC&gt;;</div><div class='del'>-            clock-names = "adc";</div><div class='add'>+        clocks = &lt;&amp;cgu JZ4740_CLK_ADC&gt;;</div><div class='add'>+        clock-names = "adc";</div><div class='ctx'> </div><div class='del'>-            interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-            interrupts = &lt;18&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+        interrupts = &lt;18&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml<br/>index 0bd2fc0356c8..5207c919abe0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml</a></div><div class='hunk'>@@ -22,15 +22,15 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency:</div><div class='del'>-    description: maximal spi bus frequency supported</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - vref-supply</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml<br/>index c1772b568cd1..875f394576c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml</a></div><div class='hunk'>@@ -13,10 +13,14 @@ description: |</div><div class='ctx'>   16bit ADC supporting up to 16 single ended or 8 differential inputs.</div><div class='ctx'>   I2C interface.</div><div class='ctx'> </div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/2497fb.pdf</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/2499fe.pdf</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const:</div><div class='del'>-      lltc,ltc2497</div><div class='add'>+    enum:</div><div class='add'>+      - lltc,ltc2497</div><div class='add'>+      - lltc,ltc2499</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'>   vref-supply: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml<br/>index 46b7747076b9..e4b362113509 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/maxim,max1027.yaml</a></div><div class='hunk'>@@ -45,14 +45,17 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     spi {</div><div class='del'>-       #address-cells = &lt;1&gt;;</div><div class='del'>-       #size-cells = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'>         maxadc: adc@0 {</div><div class='ctx'>             compatible = "maxim,max1027";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml<br/>index 0cf87556ef82..4f74cb33383a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml</a></div><div class='hunk'>@@ -26,13 +26,16 @@ properties:</div><div class='ctx'>     minimum: 100000</div><div class='ctx'>     maximum: 4800000</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml<br/>index e948b3e37b0c..bb336e33ebe2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml</a></div><div class='hunk'>@@ -28,23 +28,25 @@ properties:</div><div class='ctx'>   vref-supply:</div><div class='ctx'>     description: External reference, needed to establish input scaling</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: maxim,max1118</div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - vref-supply</div><div class='del'>-else:</div><div class='del'>-  properties:</div><div class='del'>-    vref-supply: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: maxim,max1118</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - vref-supply</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        vref-supply: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml<br/>new file mode 100644<br/>index 000000000000..5f9e043cf5cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/maxim,max11205.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/maxim,max11205.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim MAX11205 ADC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ramona Bolboaca &lt;ramona.bolboaca@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MAX11205 is an ultra-low-power (&lt; 300FA max active current),</div><div class='add'>+  high-resolution, serial-output ADC.</div><div class='add'>+</div><div class='add'>+  https://datasheets.maximintegrated.com/en/ds/MAX11205.pdf</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,max11205a</div><div class='add'>+      - maxim,max11205b</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 5000000</div><div class='add'>+</div><div class='add'>+  spi-cpha: true</div><div class='add'>+</div><div class='add'>+  vref-supply:</div><div class='add'>+    description:</div><div class='add'>+      The regulator supply for the ADC reference voltage. This is a differential</div><div class='add'>+      reference. It is equal to the V_REFP - V_REFN. The maximum value is 3.6V.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - spi-max-frequency</div><div class='add'>+  - spi-cpha</div><div class='add'>+  - vref-supply</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        adc@0 {</div><div class='add'>+            compatible = "maxim,max11205a";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+            spi-cpha;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;19 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;max11205_vref&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml<br/>index 50bcd72ac9d6..60d7b34e3286 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Family of simple ADCs with i2c inteface and internal references.</div><div class='add'>+  Family of simple ADCs with i2c interface and internal references.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml<br/>index 4c7e0d94bff1..ef8d51e74c08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml</a></div><div class='hunk'>@@ -39,22 +39,23 @@ properties:</div><div class='ctx'>       thus enabling power-down mode.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - vdd-supply</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     spi {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         adc@0 {</div><div class='ctx'>             compatible = "maxim,max1241";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml<br/>index e04f09f35601..96f3f535fe34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-   Family of ADCs with i2c inteface, internal references and threshold</div><div class='add'>+   Family of ADCs with i2c interface, internal references and threshold</div><div class='ctx'>    monitoring.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml b/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml<br/>index 65581ad4b816..7f79a06e76f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/mediatek,mt2701-auxadc.yaml</a></div><div class='hunk'>@@ -35,6 +35,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt8183-auxadc</div><div class='ctx'>               - mediatek,mt8186-auxadc</div><div class='add'>+              - mediatek,mt8188-auxadc</div><div class='ctx'>               - mediatek,mt8195-auxadc</div><div class='ctx'>               - mediatek,mt8516-auxadc</div><div class='ctx'>           - const: mediatek,mt8173-auxadc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml<br/>index fcc1ba53b20d..18108f0f3731 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml</a></div><div class='hunk'>@@ -32,7 +32,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='hunk'>@@ -51,7 +50,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml<br/>index 95ab285f4eba..f7b3fde4115a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Marcus Folkesson &lt;marcus.folkesson@gmail.com&gt;</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microchip MCP3911 Dual channel analog front end (ADC)</div><div class='ctx'> </div><div class='hunk'>@@ -36,6 +36,13 @@ properties:</div><div class='ctx'>     description: IRQ line of the ADC</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  microchip,data-ready-hiz:</div><div class='add'>+    description:</div><div class='add'>+      Data Ready Pin Inactive State Control</div><div class='add'>+      true = The DR pin state is high-impedance</div><div class='add'>+      false = The DR pin state is logic high</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   microchip,device-addr:</div><div class='ctx'>     description: Device address when multiple MCP3911 chips are present on the same SPI bus.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='hunk'>@@ -51,7 +58,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml b/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml<br/>index a6cb857a232d..9ceb6f18c854 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Motorola CPCAP PMIC ADC binding</div><div class='add'>+title: Motorola CPCAP PMIC ADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml<br/>index 001cf263b7d5..fede2aa64092 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml</a></div><div class='hunk'>@@ -10,11 +10,14 @@ maintainers:</div><div class='ctx'>   - Tomer Maimon &lt;tmaimon77@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  The NPCM ADC is a 10-bit converter for eight channel inputs.</div><div class='add'>+  The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,</div><div class='add'>+  both have eight channel inputs.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: nuvoton,npcm750-adc</div><div class='add'>+    enum:</div><div class='add'>+      - nuvoton,npcm750-adc</div><div class='add'>+      - nuvoton,npcm845-adc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml<br/>index 9c59a20a6032..63369ba388e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP IMX8QXP ADC bindings</div><div class='add'>+title: NXP IMX8QXP ADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Cai Huoqing &lt;caihuoqing@baidu.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml<br/>new file mode 100644<br/>index 000000000000..dacc526dc695<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP iMX93 ADC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Haibo Chen &lt;haibo.chen@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels</div><div class='add'>+  connected to pins. it support normal and inject mode, include</div><div class='add'>+  One-Shot and Scan (continuous) conversions. Programmable DMA</div><div class='add'>+  enables for each channel  Also this ADC contain alternate analog</div><div class='add'>+  watchdog thresholds, select threshold through input ports. And</div><div class='add'>+  also has Self-test logic and Software-initiated calibration.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nxp,imx93-adc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: WDGnL, watchdog threshold interrupt requests.</div><div class='add'>+      - description: WDGnH, watchdog threshold interrupt requests.</div><div class='add'>+      - description: normal conversion, include EOC (End of Conversion),</div><div class='add'>+          ECH (End of Chain), JEOC (End of Injected Conversion) and</div><div class='add'>+          JECH (End of injected Chain).</div><div class='add'>+      - description: Self-testing Interrupts.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: ipg</div><div class='add'>+</div><div class='add'>+  vref-supply:</div><div class='add'>+    description:</div><div class='add'>+      The reference voltage which used to establish channel scaling.</div><div class='add'>+</div><div class='add'>+  "#io-channel-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - vref-supply</div><div class='add'>+  - "#io-channel-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx93-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        adc@44530000 {</div><div class='add'>+            compatible = "nxp,imx93-adc";</div><div class='add'>+            reg = &lt;0x44530000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk IMX93_CLK_ADC1_GATE&gt;;</div><div class='add'>+            clock-names = "ipg";</div><div class='add'>+            vref-supply = &lt;&amp;reg_vref_1v8&gt;;</div><div class='add'>+            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml<br/>index 6404fb73f8ed..70b38038a080 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP LPC1850 ADC bindings</div><div class='add'>+title: NXP LPC1850 ADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Joachim Eastwood &lt;manabian@gmail.com&gt;</div><div class='add'>+  - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Supports the ADC found on the LPC1850 SoC.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml<br/>index d186b713d6a7..58ea1ca4a5ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/qcom,pm8018-adc.yaml</a></div><div class='hunk'>@@ -160,7 +160,7 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>             ref_muxoff: adc-channel@f {</div><div class='ctx'>                 reg = &lt;0x00 0x0f&gt;;</div><div class='del'>-           };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml<br/>index 2a94db688830..73def67fbe01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml</a></div><div class='hunk'>@@ -18,7 +18,11 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,spmi-iadc</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,pm8226-iadc</div><div class='add'>+          - qcom,pm8941-iadc</div><div class='add'>+      - const: qcom,spmi-iadc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description: IADC base address and length in the SPMI PMIC register map</div><div class='hunk'>@@ -46,11 +50,11 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spmi_bus {</div><div class='add'>+    spmi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>         pmic_iadc: adc@3600 {</div><div class='del'>-            compatible = "qcom,spmi-iadc";</div><div class='add'>+            compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";</div><div class='ctx'>             reg = &lt;0x3600&gt;;</div><div class='ctx'>             interrupts = &lt;0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'>             qcom,external-resistor-micro-ohms = &lt;10000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml<br/>new file mode 100644<br/>index 000000000000..b3a626389870<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-rradc.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/qcom,spmi-rradc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm's SPMI PMIC Round Robin ADC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Caleb Connolly &lt;caleb.connolly@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Qualcomm SPMI Round Robin ADC (RRADC) provides interface to clients to</div><div class='add'>+  read the voltage, current and temperature for supported peripherals such as</div><div class='add'>+  the battery thermistor die temperature, charger temperature, USB and DC input</div><div class='add'>+  voltage / current and battery ID resistor.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,pmi8998-rradc</div><div class='add'>+      - qcom,pm660-rradc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,batt-id-delay-ms:</div><div class='add'>+    description: Sets the hardware settling time for the battery ID resistor.</div><div class='add'>+    enum: [0, 1, 4, 12, 20, 40, 60, 80]</div><div class='add'>+</div><div class='add'>+  "#io-channel-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pmic {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pmic_rradc: adc@4500 {</div><div class='add'>+            compatible = "qcom,pmi8998-rradc";</div><div class='add'>+            reg = &lt;0x4500&gt;;</div><div class='add'>+            #io-channel-cells  = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml<br/>index 74a4a9d95798..bd6e0d6f6e0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml</a></div><div class='hunk'>@@ -22,13 +22,11 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: qcom,pms405-adc</div><div class='ctx'>           - const: qcom,spmi-adc-rev2</div><div class='del'>-</div><div class='del'>-      - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - qcom,spmi-vadc</div><div class='del'>-              - qcom,spmi-adc5</div><div class='del'>-              - qcom,spmi-adc-rev2</div><div class='del'>-              - qcom,spmi-adc7</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,spmi-vadc</div><div class='add'>+          - qcom,spmi-adc5</div><div class='add'>+          - qcom,spmi-adc-rev2</div><div class='add'>+          - qcom,spmi-adc7</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description: VADC base address in the SPMI PMIC register map</div><div class='hunk'>@@ -58,6 +56,7 @@ required:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       Represents the external channels which are connected to the ADC.</div><div class='ctx'>       For compatible property "qcom,spmi-vadc" following channels, also known as</div><div class='hunk'>@@ -237,42 +236,72 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    spmi_bus {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-      /* VADC node */</div><div class='del'>-      pmic_vadc: adc@3100 {</div><div class='del'>-        compatible = "qcom,spmi-vadc";</div><div class='del'>-        reg = &lt;0x3100&gt;;</div><div class='del'>-        interrupts = &lt;0x0 0x31 0x0 0x1&gt;;</div><div class='add'>+    spmi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='del'>-        #io-channel-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-        /* Channel node */</div><div class='del'>-        adc-chan@39 {</div><div class='del'>-          reg = &lt;0x39&gt;;</div><div class='del'>-          qcom,decimation = &lt;512&gt;;</div><div class='del'>-          qcom,ratiometric;</div><div class='del'>-          qcom,hw-settle-time = &lt;200&gt;;</div><div class='del'>-          qcom,avg-samples = &lt;1&gt;;</div><div class='del'>-          qcom,pre-scaling = &lt;1 3&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        adc-chan@9 {</div><div class='del'>-          reg = &lt;0x9&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        adc-chan@a {</div><div class='del'>-          reg = &lt;0xa&gt;;</div><div class='add'>+        /* VADC node */</div><div class='add'>+        pmic_vadc: adc@3100 {</div><div class='add'>+            compatible = "qcom,spmi-vadc";</div><div class='add'>+            reg = &lt;0x3100&gt;;</div><div class='add'>+            interrupts = &lt;0x0 0x31 0x0 0x1&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            /* Channel node */</div><div class='add'>+            adc-chan@39 {</div><div class='add'>+                reg = &lt;0x39&gt;;</div><div class='add'>+                qcom,decimation = &lt;512&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+                qcom,avg-samples = &lt;1&gt;;</div><div class='add'>+                qcom,pre-scaling = &lt;1 3&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            adc-chan@9 {</div><div class='add'>+                reg = &lt;0x9&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            adc-chan@a {</div><div class='add'>+                reg = &lt;0xa&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            adc-chan@e {</div><div class='add'>+                reg = &lt;0xe&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            adc-chan@f {</div><div class='add'>+                reg = &lt;0xf&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> </div><div class='del'>-        adc-chan@e {</div><div class='del'>-          reg = &lt;0xe&gt;;</div><div class='del'>-        };</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/iio/qcom,spmi-adc7-pmk8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/iio/qcom,spmi-adc7-pm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-        adc-chan@f {</div><div class='del'>-          reg = &lt;0xf&gt;;</div><div class='add'>+    spmi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        adc@3100 {</div><div class='add'>+            reg = &lt;0x3100&gt;;</div><div class='add'>+            compatible = "qcom,spmi-adc7";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            /* Other properties are omitted */</div><div class='add'>+            xo-therm@44 {</div><div class='add'>+                reg = &lt;PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            conn-therm@47 {</div><div class='add'>+                reg = &lt;PM8350_ADC7_AMUX_THM4_100K_PU(1)&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml<br/>index c115e2e99bd9..1c7aee5ed3e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/renesas,rcar-gyroadc.yaml</a></div><div class='hunk'>@@ -34,9 +34,11 @@ properties:</div><div class='ctx'>   clock-names:</div><div class='ctx'>     const: fck</div><div class='ctx'> </div><div class='del'>-  power-domains: true</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='del'>-  resets: true</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -51,6 +53,8 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='ctx'>   - "#address-cells"</div><div class='ctx'>   - "#size-cells"</div><div class='ctx'> </div><div class='hunk'>@@ -108,36 +112,30 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/clock/r8a7791-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a7791-cpg-mssr.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/r8a7791-sysc.h&gt;</div><div class='del'>-    soc {</div><div class='del'>-        #address-cells = &lt;2&gt;;</div><div class='del'>-        #size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-        adc@e6e54000 {</div><div class='del'>-            compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";</div><div class='del'>-            reg = &lt;0 0xe6e54000 0 64&gt;;</div><div class='del'>-            clocks = &lt;&amp;mstp9_clks R8A7791_CLK_GYROADC&gt;;</div><div class='del'>-            clock-names = "fck";</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='del'>-</div><div class='del'>-            pinctrl-0 = &lt;&amp;adc_pins&gt;;</div><div class='del'>-            pinctrl-names = "default";</div><div class='del'>-</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            adc@0 {</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-                compatible = "maxim,max1162";</div><div class='del'>-                vref-supply = &lt;&amp;vref_max1162&gt;;</div><div class='del'>-            };</div><div class='del'>-</div><div class='del'>-            adc@1 {</div><div class='del'>-                reg = &lt;1&gt;;</div><div class='del'>-                compatible = "maxim,max1162";</div><div class='del'>-                vref-supply = &lt;&amp;vref_max1162&gt;;</div><div class='del'>-            };</div><div class='add'>+</div><div class='add'>+    adc@e6e54000 {</div><div class='add'>+        compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc";</div><div class='add'>+        reg = &lt;0xe6e54000 64&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 901&gt;;</div><div class='add'>+        clock-names = "fck";</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 901&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            compatible = "maxim,max1162";</div><div class='add'>+            vref-supply = &lt;&amp;vref_max1162&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        adc@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            compatible = "maxim,max1162";</div><div class='add'>+            vref-supply = &lt;&amp;vref_max1162&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml<br/>index c80201d6a716..ba86c7b7d622 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml</a></div><div class='hunk'>@@ -19,7 +19,9 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='del'>-          - renesas,r9a07g044-adc   # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g043-adc   # RZ/G2UL and RZ/Five</div><div class='add'>+          - renesas,r9a07g044-adc   # RZ/G2L</div><div class='add'>+          - renesas,r9a07g054-adc   # RZ/V2L</div><div class='ctx'>       - const: renesas,rzg2l-adc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -67,7 +69,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@[0-7]$":</div><div class='del'>-    $ref: "adc.yaml"</div><div class='add'>+    $ref: adc.yaml</div><div class='ctx'>     type: object</div><div class='ctx'>     description: |</div><div class='ctx'>       Represents the external channels which are connected to the ADC.</div><div class='hunk'>@@ -75,16 +77,35 @@ patternProperties:</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         description: |</div><div class='del'>-          The channel number. It can have up to 8 channels numbered from 0 to 7.</div><div class='del'>-        items:</div><div class='del'>-          - minimum: 0</div><div class='del'>-            maximum: 7</div><div class='add'>+          The channel number.</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,r9a07g043-adc</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel@[2-7]$": false</div><div class='add'>+        "^channel@[0-1]$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              minimum: 0</div><div class='add'>+              maximum: 1</div><div class='add'>+    else:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel@[0-7]$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              minimum: 0</div><div class='add'>+              maximum: 7</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml b/Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml<br/>new file mode 100644<br/>index 000000000000..88e008629ea8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/richtek,rtq6056.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/richtek,rtq6056.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RTQ6056 Bi-Directional Current and Power Monitor with 16-bit ADC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RTQ6056 is a high accuracy current-sense monitor with I2C and SMBus</div><div class='add'>+  interface, and the device provides full information for system by reading</div><div class='add'>+  out the loading current and power.</div><div class='add'>+</div><div class='add'>+  The device monitors both of the drops across sense resistor and the BUS</div><div class='add'>+  voltage, converts into the current in amperes, and power in watts through</div><div class='add'>+  internal analog-to-digital converter ADC. The programmable calibration,</div><div class='add'>+  adjustable conversion time, and averaging function are also built in for</div><div class='add'>+  more design flexibility.</div><div class='add'>+</div><div class='add'>+  Datasheet is available at</div><div class='add'>+  https://www.richtek.com/assets/product_file/RTQ6056/DSQ6056-00.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: richtek,rtq6056</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#io-channel-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  shunt-resistor-micro-ohms:</div><div class='add'>+    description: Shunt IN+/IN- sensing node resistor</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#io-channel-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      adc@40 {</div><div class='add'>+        compatible = "richtek,rtq6056";</div><div class='add'>+        reg = &lt;0x40&gt;;</div><div class='add'>+        #io-channel-cells = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml<br/>index e512a14e41b4..da50b529c157 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml</a></div><div class='hunk'>@@ -22,6 +22,7 @@ properties:</div><div class='ctx'>               - rockchip,rk3328-saradc</div><div class='ctx'>               - rockchip,rk3568-saradc</div><div class='ctx'>               - rockchip,rv1108-saradc</div><div class='add'>+              - rockchip,rv1126-saradc</div><div class='ctx'>           - const: rockchip,rk3399-saradc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml<br/>index 81c87295912c..582d0a03b814 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml</a></div><div class='hunk'>@@ -52,7 +52,7 @@ properties:</div><div class='ctx'>   vdd-supply: true</div><div class='ctx'> </div><div class='ctx'>   samsung,syscon-phandle:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='ctx'>       Phandle to the PMU system controller node (to access the ADC_PHY</div><div class='ctx'>       register on Exynos3250/4x12/5250/5420/5800).</div><div class='hunk'>@@ -142,7 +142,7 @@ examples:</div><div class='ctx'>             pullup-ohm = &lt;47000&gt;;</div><div class='ctx'>             pulldown-ohm = &lt;0&gt;;</div><div class='ctx'>             io-channels = &lt;&amp;adc 4&gt;;</div><div class='del'>-          };</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='hunk'>@@ -150,7 +150,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>     adc@126c0000 {</div><div class='ctx'>         compatible = "samsung,exynos3250-adc";</div><div class='del'>-        reg = &lt;0x126C0000 0x100&gt;;</div><div class='add'>+        reg = &lt;0x126c0000 0x100&gt;;</div><div class='ctx'>         interrupts = &lt;0 137 0&gt;;</div><div class='ctx'>         #io-channel-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml b/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml<br/>index 2287697f1f61..cab0d425eaa4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/sigma-delta-modulator.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/sigma-delta-modulator.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device-Tree bindings for sigma delta modulator</div><div class='add'>+title: Sigma delta modulator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Arnaud Pouliquen &lt;arnaud.pouliquen@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml b/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml<br/>index caa3ee0b4b8c..8181cf9a8e07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Spreadtrum SC27XX series PMICs ADC binding</div><div class='add'>+title: Spreadtrum SC27XX series PMICs ADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Baolin Wang &lt;baolin.wang7@gmail.com&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>       - sprd,sc2723-adc</div><div class='ctx'>       - sprd,sc2730-adc</div><div class='ctx'>       - sprd,sc2731-adc</div><div class='add'>+      - sprd,ump9620-adc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -33,13 +34,39 @@ properties:</div><div class='ctx'>   hwlocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  nvmem-cells:</div><div class='del'>-    maxItems: 2</div><div class='add'>+  nvmem-cells: true</div><div class='ctx'> </div><div class='del'>-  nvmem-cell-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: big_scale_calib</div><div class='del'>-      - const: small_scale_calib</div><div class='add'>+  nvmem-cell-names: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - sprd,ump9620-adc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        nvmem-cells:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        nvmem-cell-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: big_scale_calib</div><div class='add'>+            - const: small_scale_calib</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        nvmem-cells:</div><div class='add'>+          maxItems: 6</div><div class='add'>+        nvmem-cell-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: big_scale_calib1</div><div class='add'>+            - const: big_scale_calib2</div><div class='add'>+            - const: small_scale_calib1</div><div class='add'>+            - const: small_scale_calib2</div><div class='add'>+            - const: vbat_det_cal1</div><div class='add'>+            - const: vbat_det_cal2</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -69,4 +96,25 @@ examples:</div><div class='ctx'>             nvmem-cell-names = "big_scale_calib", "small_scale_calib";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    pmic {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        adc@504 {</div><div class='add'>+            compatible = "sprd,ump9620-adc";</div><div class='add'>+            reg = &lt;0x504&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;ump9620_pmic&gt;;</div><div class='add'>+            interrupts = &lt;0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+            hwlocks = &lt;&amp;hwlock 4&gt;;</div><div class='add'>+            nvmem-cells = &lt;&amp;adc_bcal1&gt;, &lt;&amp;adc_bcal2&gt;,</div><div class='add'>+                          &lt;&amp;adc_scal1&gt;, &lt;&amp;adc_scal2&gt;,</div><div class='add'>+                          &lt;&amp;vbat_det_cal1&gt;, &lt;&amp;vbat_det_cal2&gt;;</div><div class='add'>+            nvmem-cell-names = "big_scale_calib1", "big_scale_calib2",</div><div class='add'>+                               "small_scale_calib1", "small_scale_calib2",</div><div class='add'>+                               "vbat_det_cal1", "vbat_det_cal2";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml<br/>index 4d6074518b5c..995cbf8cefc6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 ADC bindings</div><div class='add'>+title: STMicroelectronics STM32 ADC</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   STM32 ADC is a successive approximation analog-to-digital converter.</div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>       - st,stm32f4-adc-core</div><div class='ctx'>       - st,stm32h7-adc-core</div><div class='ctx'>       - st,stm32mp1-adc-core</div><div class='add'>+      - st,stm32mp13-adc-core</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -37,6 +38,7 @@ properties:</div><div class='ctx'>         - stm32f4 and stm32h7 share a common ADC interrupt line.</div><div class='ctx'>         - stm32mp1 has two separate interrupt lines, one for each ADC within</div><div class='ctx'>           ADC block.</div><div class='add'>+        - stm32mp13 has an interrupt line per ADC block.</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='hunk'>@@ -78,7 +80,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Phandle to system configuration controller. It can be used to control the</div><div class='ctx'>       analog circuitry on stm32mp1.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='hunk'>@@ -138,7 +140,6 @@ allOf:</div><div class='ctx'>             - const: bus</div><div class='ctx'>             - const: adc</div><div class='ctx'>           minItems: 1</div><div class='del'>-          maxItems: 2</div><div class='ctx'> </div><div class='ctx'>         interrupts:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -170,7 +171,6 @@ allOf:</div><div class='ctx'>             - const: bus</div><div class='ctx'>             - const: adc</div><div class='ctx'>           minItems: 1</div><div class='del'>-          maxItems: 2</div><div class='ctx'> </div><div class='ctx'>         interrupts:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -182,6 +182,33 @@ allOf:</div><div class='ctx'>           maximum: 36000000</div><div class='ctx'>           default: 36000000</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: st,stm32mp13-adc-core</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: adc</div><div class='add'>+          minItems: 1</div><div class='add'>+</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: ADC interrupt line</div><div class='add'>+</div><div class='add'>+        st,max-clk-rate-hz:</div><div class='add'>+          minimum: 150000</div><div class='add'>+          maximum: 75000000</div><div class='add'>+          default: 75000000</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -210,6 +237,7 @@ patternProperties:</div><div class='ctx'>           - st,stm32f4-adc</div><div class='ctx'>           - st,stm32h7-adc</div><div class='ctx'>           - st,stm32mp1-adc</div><div class='add'>+          - st,stm32mp13-adc</div><div class='ctx'> </div><div class='ctx'>       reg:</div><div class='ctx'>         description: |</div><div class='hunk'>@@ -231,7 +259,7 @@ patternProperties:</div><div class='ctx'>       interrupts:</div><div class='ctx'>         description: |</div><div class='ctx'>           IRQ Line for the ADC instance. Valid values are:</div><div class='del'>-            - 0 for adc@0</div><div class='add'>+            - 0 for adc@0 (single adc for stm32mp13)</div><div class='ctx'>             - 1 for adc@100</div><div class='ctx'>             - 2 for adc@200 (stm32f4 only)</div><div class='ctx'>         maxItems: 1</div><div class='hunk'>@@ -252,13 +280,14 @@ patternProperties:</div><div class='ctx'>       assigned-resolution-bits:</div><div class='ctx'>         description: |</div><div class='ctx'>           Resolution (bits) to use for conversions:</div><div class='del'>-            - can be 6, 8, 10 or 12 on stm32f4</div><div class='add'>+            - can be 6, 8, 10 or 12 on stm32f4 and stm32mp13</div><div class='ctx'>             - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1</div><div class='ctx'> </div><div class='ctx'>       st,adc-channels:</div><div class='ctx'>         description: |</div><div class='ctx'>           List of single-ended channels muxed for this ADC. It can have up to:</div><div class='ctx'>             - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4</div><div class='add'>+            - 19 channels, numbered from 0 to 18 (for in0..in18) on stm32mp13.</div><div class='ctx'>             - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and</div><div class='ctx'>               stm32mp1.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='hunk'>@@ -312,7 +341,7 @@ patternProperties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^channel@([0-9]|1[0-9])$":</div><div class='ctx'>         type: object</div><div class='del'>-        $ref: "adc.yaml"</div><div class='add'>+        $ref: adc.yaml</div><div class='ctx'>         description: Represents the external channels which are connected to the ADC.</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='hunk'>@@ -324,7 +353,7 @@ patternProperties:</div><div class='ctx'>           label:</div><div class='ctx'>             description: |</div><div class='ctx'>               Unique name to identify which channel this is.</div><div class='del'>-              Reserved label names "vddcore", "vrefint" and "vbat"</div><div class='add'>+              Reserved label names "vddcore", "vddcpu", "vddq_ddr", "vrefint" and "vbat"</div><div class='ctx'>               are used to identify internal channels with matching names.</div><div class='ctx'> </div><div class='ctx'>           diff-channels:</div><div class='hunk'>@@ -421,6 +450,37 @@ patternProperties:</div><div class='ctx'>               items:</div><div class='ctx'>                 minimum: 40</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            compatible:</div><div class='add'>+              contains:</div><div class='add'>+                const: st,stm32mp13-adc</div><div class='add'>+</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              const: 0x0</div><div class='add'>+</div><div class='add'>+            interrupts:</div><div class='add'>+              const: 0</div><div class='add'>+</div><div class='add'>+            assigned-resolution-bits:</div><div class='add'>+              enum: [6, 8, 10, 12]</div><div class='add'>+              default: 12</div><div class='add'>+</div><div class='add'>+            st,adc-channels:</div><div class='add'>+              minItems: 1</div><div class='add'>+              maxItems: 19</div><div class='add'>+              items:</div><div class='add'>+                minimum: 0</div><div class='add'>+                maximum: 18</div><div class='add'>+</div><div class='add'>+            st,min-sample-time-nsecs:</div><div class='add'>+              minItems: 1</div><div class='add'>+              maxItems: 19</div><div class='add'>+              items:</div><div class='add'>+                minimum: 40</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml<br/>index 7c260f209687..1970503389aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/st,stm32-dfsdm-adc.yaml</a></div><div class='hunk'>@@ -72,6 +72,7 @@ additionalProperties: false</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^filter@[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     description: child node</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='hunk'>@@ -108,9 +109,7 @@ patternProperties:</div><div class='ctx'>           - [1-5]: order 1 to 5.</div><div class='ctx'>           For audio purpose it is recommended to use order 3 to 5.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        items:</div><div class='del'>-          minimum: 0</div><div class='del'>-          maximum: 5</div><div class='add'>+        maximum: 5</div><div class='ctx'> </div><div class='ctx'>       "#io-channel-cells":</div><div class='ctx'>         const: 1</div><div class='hunk'>@@ -174,7 +173,7 @@ patternProperties:</div><div class='ctx'>               contains:</div><div class='ctx'>                 const: st,stm32-dfsdm-adc</div><div class='ctx'> </div><div class='del'>-      - then:</div><div class='add'>+        then:</div><div class='ctx'>           properties:</div><div class='ctx'>             st,adc-channels:</div><div class='ctx'>               minItems: 1</div><div class='hunk'>@@ -206,7 +205,7 @@ patternProperties:</div><div class='ctx'>               contains:</div><div class='ctx'>                 const: st,stm32-dfsdm-dmic</div><div class='ctx'> </div><div class='del'>-      - then:</div><div class='add'>+        then:</div><div class='ctx'>           properties:</div><div class='ctx'>             st,adc-channels:</div><div class='ctx'>               maxItems: 1</div><div class='hunk'>@@ -227,6 +226,7 @@ patternProperties:</div><div class='ctx'>           patternProperties:</div><div class='ctx'>             "^dfsdm-dai+$":</div><div class='ctx'>               type: object</div><div class='add'>+              additionalProperties: false</div><div class='ctx'>               description: child node</div><div class='ctx'> </div><div class='ctx'>               properties:</div><div class='hunk'>@@ -254,7 +254,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             const: st,stm32h7-dfsdm</div><div class='ctx'> </div><div class='del'>-  - then:</div><div class='add'>+    then:</div><div class='ctx'>       patternProperties:</div><div class='ctx'>         "^filter@[0-9]+$":</div><div class='ctx'>           properties:</div><div class='hunk'>@@ -269,7 +269,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             const: st,stm32mp1-dfsdm</div><div class='ctx'> </div><div class='del'>-  - then:</div><div class='add'>+    then:</div><div class='ctx'>       patternProperties:</div><div class='ctx'>         "^filter@[0-9]+$":</div><div class='ctx'>           properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml<br/>index 9049c699152f..474e35c49348 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml</a></div><div class='hunk'>@@ -13,8 +13,7 @@ description:</div><div class='ctx'>   This ADC forms part of an ST microelectronics STMPE multifunction device .</div><div class='ctx'>   The ADC is shared with the STMPE touchscreen. As a result some ADC related</div><div class='ctx'>   settings are specified in the parent node.</div><div class='del'>-  The node name myst be stmpe_adc and should be a child node of the stmpe node</div><div class='del'>-  to which it belongs.</div><div class='add'>+  The node should be a child node of the stmpe node to which it belongs.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -36,10 +35,8 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    stmpe {</div><div class='del'>-        stmpe_adc {</div><div class='del'>-            compatible = "st,stmpe-adc";</div><div class='del'>-            st,norequest-mask = &lt;0x0F&gt;; /* dont use ADC CH3-0 */</div><div class='del'>-        };</div><div class='add'>+    adc {</div><div class='add'>+        compatible = "st,stmpe-adc";</div><div class='add'>+        st,norequest-mask = &lt;0x0f&gt;; /* dont use ADC CH3-0 */</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc081c.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc081c.yaml<br/>new file mode 100644<br/>index 000000000000..caaad777580c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc081c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,adc081c.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/ti,adc081c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI Single-channel I2C ADCs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='add'>+  - Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Single-channel ADC supporting 8, 10, or 12-bit samples and high/low alerts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,adc081c</div><div class='add'>+      - ti,adc101c</div><div class='add'>+      - ti,adc121c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vref-supply:</div><div class='add'>+    description:</div><div class='add'>+      Regulator for the combined power supply and voltage reference</div><div class='add'>+</div><div class='add'>+  "#io-channel-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vref-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@52 {</div><div class='add'>+            compatible = "ti,adc081c";</div><div class='add'>+            reg = &lt;0x52&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;reg_2p5v&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml<br/>index f5a923cc847f..686721176a58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml</a></div><div class='hunk'>@@ -24,8 +24,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply:</div><div class='ctx'>     description: External reference, needed to establish input scaling</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +35,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml<br/>index 1a113b30a414..726d2cbfa368 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,adc084s021.yaml</a></div><div class='hunk'>@@ -19,8 +19,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply:</div><div class='ctx'>     description: External reference, needed to establish input scaling</div><div class='ctx'> </div><div class='hunk'>@@ -37,7 +35,10 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'>   - spi-cpha</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml<br/>index 54955f03df93..9b072b057f16 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Texas Instruments ADC108S102 and ADC128S102</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Bogdan Pricop &lt;bogdan.pricop@emutex.com&gt;</div><div class='add'>+  - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Family of 8 channel, 10/12 bit, SPI, single ended ADCs.</div><div class='hunk'>@@ -19,7 +19,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'>   vref-supply: true</div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'>   "#io-channel-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -28,7 +27,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml<br/>index ec3b2edf1fb7..076088a328c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml</a></div><div class='hunk'>@@ -31,8 +31,6 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: Conversion clock input.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-p-supply:</div><div class='ctx'>     description: The regulator supply for positive analog voltage reference</div><div class='ctx'> </div><div class='hunk'>@@ -62,7 +60,10 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - vref-p-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml<br/>index d54a0183f024..775eee972b12 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml</a></div><div class='hunk'>@@ -27,8 +27,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply: true</div><div class='ctx'> </div><div class='ctx'>   "#io-channel-cells":</div><div class='hunk'>@@ -39,7 +37,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml<br/>index 3f4f334d6f73..afe782522904 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml</a></div><div class='hunk'>@@ -21,8 +21,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdda-supply: true</div><div class='ctx'> </div><div class='ctx'>   "#io-channel-cells":</div><div class='hunk'>@@ -32,7 +30,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml<br/>index 2c2d01bbc296..2127d639a768 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/ti,ads1015.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI ADS1015 4 channel I2C analog to digital converter</div><div class='add'>+title: TI ADS1015/ADS1115 4 channel I2C analog to digital converter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Baluta &lt;daniel.baluta@nxp.com&gt;</div><div class='hunk'>@@ -15,7 +15,10 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: ti,ads1015</div><div class='add'>+    enum:</div><div class='add'>+      - ti,ads1015</div><div class='add'>+      - ti,ads1115</div><div class='add'>+      - ti,tla2024</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -40,6 +43,7 @@ additionalProperties: false</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@[0-7]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       Child nodes needed for each channel that the platform uses.</div><div class='ctx'> </div><div class='hunk'>@@ -100,12 +104,12 @@ examples:</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'>             channel@0 {</div><div class='del'>-              reg = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@4 {</div><div class='del'>-              reg = &lt;4&gt;;</div><div class='del'>-              ti,gain = &lt;3&gt;;</div><div class='del'>-              ti,datarate = &lt;5&gt;;</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+                ti,gain = &lt;3&gt;;</div><div class='add'>+                ti,datarate = &lt;5&gt;;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1100.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1100.yaml<br/>new file mode 100644<br/>index 000000000000..970ccab15e1e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads1100.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,ads1100.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/ti,ads1100.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI ADS1100/ADS1000 single channel I2C analog to digital converter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mike Looijmans &lt;mike.looijmans@topic.nl&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Datasheet at: https://www.ti.com/lit/gpn/ads1100</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,ads1100</div><div class='add'>+      - ti,ads1000</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+</div><div class='add'>+  "#io-channel-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@49 {</div><div class='add'>+            compatible = "ti,ads1100";</div><div class='add'>+            reg = &lt;0x49&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml<br/>index 9f5e96439c01..56a3f1766aab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,ads124s08.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Texas Instruments' ads124s08 and ads124s06 ADC chip</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -18,8 +18,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='ctx'>   reset-gpios:</div><div class='hunk'>@@ -32,7 +30,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml<br/>index e0670e3fbb72..890f125d422c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,ads131e08.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Texas Instruments ADS131E0x 4-, 6- and 8-Channel ADCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Tomislav Denis &lt;tomislav.denis@avl.com&gt;</div><div class='add'>+  - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The ADS131E0x are a family of multichannel, simultaneous sampling,</div><div class='hunk'>@@ -28,8 +28,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -79,7 +77,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@([0-7])$":</div><div class='del'>-    $ref: "adc.yaml"</div><div class='add'>+    $ref: adc.yaml</div><div class='ctx'>     type: object</div><div class='ctx'>     description: |</div><div class='ctx'>       Represents the external channels which are connected to the ADC.</div><div class='hunk'>@@ -120,7 +118,10 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml<br/>new file mode 100644<br/>index 000000000000..0d8d06afed8b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/ti,ads7924.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI ADS7924 4 channels 12 bits I2C analog to digital converter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hugo Villeneuve &lt;hvilleneuve@dimonoff.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Texas Instruments ADS7924 4 channels 12 bits I2C analog to digital converter</div><div class='add'>+</div><div class='add'>+  Specifications:</div><div class='add'>+    https://www.ti.com/lit/gpn/ads7924</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,ads7924</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vref-supply:</div><div class='add'>+    description:</div><div class='add'>+      The regulator supply for the ADC reference voltage (AVDD)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  "#io-channel-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^channel@[0-3]+$":</div><div class='add'>+    $ref: adc.yaml</div><div class='add'>+</div><div class='add'>+    description: |</div><div class='add'>+      Represents the external channels which are connected to the ADC.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: |</div><div class='add'>+          The channel number. It can have up to 4 channels numbered from 0 to 3.</div><div class='add'>+        items:</div><div class='add'>+          - minimum: 0</div><div class='add'>+            maximum: 3</div><div class='add'>+</div><div class='add'>+      label: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vref-supply</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@48 {</div><div class='add'>+            compatible = "ti,ads7924";</div><div class='add'>+            reg = &lt;0x48&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;ads7924_reg&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            channel@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                label = "CH0";</div><div class='add'>+            };</div><div class='add'>+            channel@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                label = "CH1";</div><div class='add'>+            };</div><div class='add'>+            channel@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                label = "CH2";</div><div class='add'>+            };</div><div class='add'>+            channel@3 {</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                label = "CH3";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml<br/>index b8c398187d5c..f75b2c702986 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml</a></div><div class='hunk'>@@ -19,8 +19,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply:</div><div class='ctx'>     description: Supply the 2.5V or 5V reference voltage</div><div class='ctx'> </div><div class='hunk'>@@ -32,7 +30,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml<br/>index a0af4b24877f..f26fdbc15f84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml</a></div><div class='hunk'>@@ -25,13 +25,14 @@ properties:</div><div class='ctx'>     description: Optional external reference.  If not supplied, assume</div><div class='ctx'>       REFSEL input tied low to enable the internal reference.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml b/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml<br/>index d6f21d5cccd7..b32be24a9f98 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,am3359-adc.yaml</a></div><div class='hunk'>@@ -11,9 +11,14 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - ti,am3359-adc</div><div class='del'>-      - ti,am4372-adc</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - ti,am3359-adc</div><div class='add'>+          - ti,am4372-adc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,am654-adc</div><div class='add'>+          - const: ti,am3359-adc</div><div class='ctx'> </div><div class='ctx'>   '#io-channel-cells':</div><div class='ctx'>     const: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml b/Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml<br/>new file mode 100644<br/>index 000000000000..5fb65bf7749d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/adc/ti,lmp92064.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments LMP92064 Precision Current and Voltage Sensor.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Leonard Göhrs &lt;l.goehrs@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The LMP92064 is a two channel ADC intended for combined voltage and current</div><div class='add'>+  measurements.</div><div class='add'>+</div><div class='add'>+  The device contains two ADCs to allow simultaneous sampling of voltage and</div><div class='add'>+  current and thus of instantaneous power consumption.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,lmp92064</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: Regulator that provides power to the main part of the chip</div><div class='add'>+</div><div class='add'>+  vdig-supply:</div><div class='add'>+    description: |</div><div class='add'>+      Regulator that provides power to the digital I/O part of the chip</div><div class='add'>+</div><div class='add'>+  shunt-resistor-micro-ohms:</div><div class='add'>+    description: |</div><div class='add'>+      Value of the shunt resistor (in µΩ) connected between INCP and INCN,</div><div class='add'>+      across which current is measured. Used to provide correct scaling of the</div><div class='add'>+      raw ADC measurement.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - shunt-resistor-micro-ohms</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adc@0 {</div><div class='add'>+            compatible = "ti,lmp92064";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+            vdig-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+            spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+            shunt-resistor-micro-ohms = &lt;15000&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio1 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml<br/>index 57a31356082e..720c16a108d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,palmas-gpadc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/ti,palmas-gpadc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Palmas general purpose ADC IP block devicetree bindings</div><div class='add'>+title: Palmas general purpose ADC IP block</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml b/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml<br/>index 6c2539b3d707..314d1d99bf73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml</a></div><div class='hunk'>@@ -21,8 +21,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply: true</div><div class='ctx'> </div><div class='ctx'>   "#io-channel-cells":</div><div class='hunk'>@@ -33,7 +31,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml b/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml<br/>index 601d69971d84..866a05c9db36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/ti,tsc2046.yaml</a></div><div class='hunk'>@@ -23,7 +23,8 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='add'>+  vref-supply:</div><div class='add'>+    description: Optional supply of the reference voltage</div><div class='ctx'> </div><div class='ctx'>   "#io-channel-cells":</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -40,7 +41,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@[0-7]$":</div><div class='del'>-    $ref: "adc.yaml"</div><div class='add'>+    $ref: adc.yaml</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='hunk'>@@ -59,7 +60,10 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -79,36 +83,36 @@ examples:</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>             channel@0 {</div><div class='del'>-              reg = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@1 {</div><div class='del'>-              reg = &lt;1&gt;;</div><div class='del'>-              settling-time-us = &lt;700&gt;;</div><div class='del'>-              oversampling-ratio = &lt;5&gt;;</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                settling-time-us = &lt;700&gt;;</div><div class='add'>+                oversampling-ratio = &lt;5&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@2 {</div><div class='del'>-              reg = &lt;2&gt;;</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@3 {</div><div class='del'>-              reg = &lt;3&gt;;</div><div class='del'>-              settling-time-us = &lt;700&gt;;</div><div class='del'>-              oversampling-ratio = &lt;5&gt;;</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                settling-time-us = &lt;700&gt;;</div><div class='add'>+                oversampling-ratio = &lt;5&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@4 {</div><div class='del'>-              reg = &lt;4&gt;;</div><div class='del'>-              settling-time-us = &lt;700&gt;;</div><div class='del'>-              oversampling-ratio = &lt;5&gt;;</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+                settling-time-us = &lt;700&gt;;</div><div class='add'>+                oversampling-ratio = &lt;5&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@5 {</div><div class='del'>-              reg = &lt;5&gt;;</div><div class='del'>-              settling-time-us = &lt;700&gt;;</div><div class='del'>-              oversampling-ratio = &lt;5&gt;;</div><div class='add'>+                reg = &lt;5&gt;;</div><div class='add'>+                settling-time-us = &lt;700&gt;;</div><div class='add'>+                oversampling-ratio = &lt;5&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@6 {</div><div class='del'>-              reg = &lt;6&gt;;</div><div class='add'>+                reg = &lt;6&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             channel@7 {</div><div class='del'>-              reg = &lt;7&gt;;</div><div class='add'>+                reg = &lt;7&gt;;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml b/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml<br/>index d6d3d8590171..d40689f233f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/x-powers,axp209-adc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/adc/x-powers,axp209-adc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: X-Powers AXP ADC bindings</div><div class='add'>+title: X-Powers AXP ADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml b/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml<br/>index 3698b4b0900f..be93c109d6ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/adc/xlnx,zynqmp-ams.yaml</a></div><div class='hunk'>@@ -134,6 +134,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ams-pl@400:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       PL-SYSMON is capable of monitoring off chip voltage and temperature.</div><div class='ctx'>       PL-SYSMON block has DRP, JTAG and I2C interface to enable monitoring</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml b/Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml<br/>new file mode 100644<br/>index 000000000000..72d2e910f206<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml</a></div><div class='hunk'>@@ -0,0 +1,373 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/addac/adi,ad74115.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices AD74115H device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Cosmin Tanislav &lt;cosmin.tanislav@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The AD74115H is a single-channel software configurable input/output</div><div class='add'>+  device for industrial control applications. It contains functionality for</div><div class='add'>+  analog output, analog input, digital output, digital input, resistance</div><div class='add'>+  temperature detector, and thermocouple measurements integrated into a single</div><div class='add'>+  chip solution with an SPI interface. The device features a 16-bit ADC and a</div><div class='add'>+  14-bit DAC.</div><div class='add'>+</div><div class='add'>+    https://www.analog.com/en/products/ad74115h.html</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,ad74115h</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 24000000</div><div class='add'>+</div><div class='add'>+  spi-cpol: true</div><div class='add'>+</div><div class='add'>+  reset-gpios: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        - adc_rdy</div><div class='add'>+        - alert</div><div class='add'>+</div><div class='add'>+  avdd-supply: true</div><div class='add'>+  avcc-supply: true</div><div class='add'>+  dvcc-supply: true</div><div class='add'>+  dovdd-supply: true</div><div class='add'>+  refin-supply: true</div><div class='add'>+</div><div class='add'>+  adi,ch-func:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Channel function.</div><div class='add'>+      0 - High impedance</div><div class='add'>+      1 - Voltage output</div><div class='add'>+      2 - Current output</div><div class='add'>+      3 - Voltage input</div><div class='add'>+      4 - Current input, externally-powered</div><div class='add'>+      5 - Current input, loop-powered</div><div class='add'>+      6 - Resistance input</div><div class='add'>+      7 - RTD measure</div><div class='add'>+      8 - Digital input logic</div><div class='add'>+      9 - Digital input, loop-powered</div><div class='add'>+      10 - Current output with HART</div><div class='add'>+      11 - Current input, externally-powered, with HART</div><div class='add'>+      12 - Current input, loop-powered, with HART</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 12</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,conv2-mux:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Input node for ADC conversion 2.</div><div class='add'>+      0 - SENSE_EXT1 to AGND_SENSE</div><div class='add'>+      1 - SENSE_EXT2 to AGND_SENSE</div><div class='add'>+      2 - SENSE_EXT2 to SENSE_EXT1</div><div class='add'>+      3 - AGND to AGND</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,conv2-range-microvolt:</div><div class='add'>+    description: Conversion range for ADC conversion 2.</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum: [-2500000, 0]</div><div class='add'>+          - const: 2500000</div><div class='add'>+      - items:</div><div class='add'>+          - enum: [-12000000, 0]</div><div class='add'>+          - const: 12000000</div><div class='add'>+      - items:</div><div class='add'>+          - const: -2500000</div><div class='add'>+          - const: 0</div><div class='add'>+      - items:</div><div class='add'>+          - const: -104000</div><div class='add'>+          - const: 104000</div><div class='add'>+      - items:</div><div class='add'>+          - const: 0</div><div class='add'>+          - const: 625000</div><div class='add'>+</div><div class='add'>+  adi,sense-agnd-buffer-low-power:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Whether to enable low-power buffered mode for the AGND sense pin.</div><div class='add'>+</div><div class='add'>+  adi,lf-buffer-low-power:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Whether to enable low-power buffered mode for the low-side filtered</div><div class='add'>+      sense pin.</div><div class='add'>+</div><div class='add'>+  adi,hf-buffer-low-power:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Whether to enable low-power buffered mode for the high-side filtered</div><div class='add'>+      sense pin.</div><div class='add'>+</div><div class='add'>+  adi,ext2-buffer-low-power:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to enable low-power buffered mode for the EXT2 pin.</div><div class='add'>+</div><div class='add'>+  adi,ext1-buffer-low-power:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to enable low-power buffered mode for the EXT1 pin.</div><div class='add'>+</div><div class='add'>+  adi,comparator-invert:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to invert the comparator output.</div><div class='add'>+</div><div class='add'>+  adi,digital-input-sink-range-high:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the digital input range is from 0 to 3700uA in steps</div><div class='add'>+      of 120uA, with a ~2k series resistance.</div><div class='add'>+      When present, the digital input range is from 0 to 7400uA in steps</div><div class='add'>+      of 240uA, with a ~1k series resistance.</div><div class='add'>+</div><div class='add'>+  adi,digital-input-sink-microamp:</div><div class='add'>+    description: Sink current in digital input mode.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3700</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,digital-input-debounce-mode-counter-reset:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, a counter increments when the signal is asserted</div><div class='add'>+      and decrements when the signal is de-asserted.</div><div class='add'>+      When present, a counter increments while the signal is asserted and</div><div class='add'>+      resets when the signal de-asserts</div><div class='add'>+</div><div class='add'>+  adi,digital-input-unbuffered:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to buffer digital input signals.</div><div class='add'>+</div><div class='add'>+  adi,digital-input-short-circuit-detection:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to detect digital input short circuits.</div><div class='add'>+</div><div class='add'>+  adi,digital-input-open-circuit-detection:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to detect digital input open circuits.</div><div class='add'>+</div><div class='add'>+  adi,digital-input-threshold-mode-fixed:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the digital input threshold range is -0.96 * AVDD</div><div class='add'>+      to AVDD.</div><div class='add'>+      When present, the threshold range is fixed from -19V to 30V.</div><div class='add'>+</div><div class='add'>+  adi,dac-bipolar:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the DAC operates in the 0V to 12V range.</div><div class='add'>+      When present, the DAC operates in the -12V to 12V range.</div><div class='add'>+</div><div class='add'>+  adi,charge-pump:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to enable the internal charge pump.</div><div class='add'>+</div><div class='add'>+  adi,dac-hart-slew:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to use a HART-compatible slew rate.</div><div class='add'>+</div><div class='add'>+  adi,dac-current-limit-low:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the DAC short-circuit current limit is 32mA in</div><div class='add'>+      either source or sink for VOUT and 4mA sink for IOUT.</div><div class='add'>+      When present, the limit is 16mA in either source or sink for VOUT,</div><div class='add'>+      1mA sink for IOUT.</div><div class='add'>+</div><div class='add'>+  adi,4-wire-rtd:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the ADC should be used for measuring 3-wire RTDs.</div><div class='add'>+      When present, the ADC should be used for measuring 4-wire RTDs.</div><div class='add'>+</div><div class='add'>+  adi,3-wire-rtd-excitation-swap:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to swap the excitation for 3-wire RTD.</div><div class='add'>+</div><div class='add'>+  adi,rtd-excitation-current-microamp:</div><div class='add'>+    description: Excitation current to apply to RTD.</div><div class='add'>+    enum: [250, 500, 750, 1000]</div><div class='add'>+    default: 250</div><div class='add'>+</div><div class='add'>+  adi,ext1-burnout:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to enable burnout current for EXT1.</div><div class='add'>+</div><div class='add'>+  adi,ext1-burnout-current-nanoamp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Burnout current in nanoamps to be applied to EXT1.</div><div class='add'>+    enum: [0, 50, 500, 1000, 10000]</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,ext1-burnout-current-polarity-sourcing:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the burnout current polarity for EXT1 is sinking.</div><div class='add'>+      When present, the burnout current polarity for EXT1 is sourcing.</div><div class='add'>+</div><div class='add'>+  adi,ext2-burnout:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to enable burnout current for EXT2.</div><div class='add'>+</div><div class='add'>+  adi,ext2-burnout-current-nanoamp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Burnout current in nanoamps to be applied to EXT2.</div><div class='add'>+    enum: [0, 50, 500, 1000, 10000]</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,ext2-burnout-current-polarity-sourcing:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the burnout current polarity for EXT2 is sinking.</div><div class='add'>+      When present, the burnout current polarity for EXT2 is sourcing.</div><div class='add'>+</div><div class='add'>+  adi,viout-burnout:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Whether to enable burnout current for VIOUT.</div><div class='add'>+</div><div class='add'>+  adi,viout-burnout-current-nanoamp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Burnout current in nanoamps to be applied to VIOUT.</div><div class='add'>+    enum: [0, 1000, 10000]</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,viout-burnout-current-polarity-sourcing:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When not present, the burnout current polarity for VIOUT is sinking.</div><div class='add'>+      When present, the burnout current polarity for VIOUT is sourcing.</div><div class='add'>+</div><div class='add'>+  adi,gpio0-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      GPIO functions.</div><div class='add'>+      0 - Disabled</div><div class='add'>+      1 - Logic I/O</div><div class='add'>+      2 - Comparator output</div><div class='add'>+      3 - Control HART CD</div><div class='add'>+      4 - Monitor HART CD</div><div class='add'>+      5 - Monitor HART EOM status</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 5</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,gpio1-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      GPIO functions.</div><div class='add'>+      0 - Disabled</div><div class='add'>+      1 - Logic I/O</div><div class='add'>+      2 - Drive external digital output FET</div><div class='add'>+      3 - Control HART RXD</div><div class='add'>+      4 - Monitor HART RXD</div><div class='add'>+      5 - Monitor HART SOM status</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 5</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,gpio2-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      GPIO functions.</div><div class='add'>+      0 - Disabled</div><div class='add'>+      1 - Logic I/O</div><div class='add'>+      2 - Drive internal digital output FET</div><div class='add'>+      3 - Control HART TXD</div><div class='add'>+      4 - Monitor HART TXD</div><div class='add'>+      5 - Monitor HART TX complete status</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 5</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,gpio3-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      GPIO functions.</div><div class='add'>+      0 - Disabled</div><div class='add'>+      1 - Logic I/O</div><div class='add'>+      2 - High impedance</div><div class='add'>+      3 - Control HART RTS</div><div class='add'>+      4 - Monitor HART RTS</div><div class='add'>+      5 - Monitor HART CD complete status</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 5</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - spi-cpol</div><div class='add'>+  - avdd-supply</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - adi,digital-input-sink-range-high</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        adi,digital-input-sink-microamp:</div><div class='add'>+          maximum: 7400</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      addac@0 {</div><div class='add'>+        compatible = "adi,ad74115h";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        spi-max-frequency = &lt;12000000&gt;;</div><div class='add'>+        spi-cpol;</div><div class='add'>+</div><div class='add'>+        reset-gpios = &lt;&amp;gpio 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+        interrupts = &lt;26 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+        interrupt-names = "adc_rdy";</div><div class='add'>+</div><div class='add'>+        avdd-supply = &lt;&amp;ad74115_avdd&gt;;</div><div class='add'>+</div><div class='add'>+        adi,ch-func = &lt;1&gt;;</div><div class='add'>+        adi,conv2-mux = &lt;2&gt;;</div><div class='add'>+        adi,conv2-range-microvolt = &lt;(-12000000) 12000000&gt;;</div><div class='add'>+</div><div class='add'>+        adi,gpio0-mode = &lt;1&gt;;</div><div class='add'>+        adi,gpio1-mode = &lt;1&gt;;</div><div class='add'>+        adi,gpio2-mode = &lt;1&gt;;</div><div class='add'>+        adi,gpio3-mode = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        adi,dac-bipolar;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml b/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml<br/>index baa65a521bad..590ea7936ad7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml</a></div><div class='hunk'>@@ -51,6 +51,9 @@ properties:</div><div class='ctx'>       Shunt (sense) resistor value in micro-Ohms.</div><div class='ctx'>     default: 100000000</div><div class='ctx'> </div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -58,11 +61,10 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'>   - refin-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@[0-3]$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: Represents the external channels which are connected to the device.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='hunk'>@@ -99,9 +101,23 @@ patternProperties:</div><div class='ctx'>           When not configured as a comparator, the GPO will be treated as an</div><div class='ctx'>           output-only GPIO.</div><div class='ctx'> </div><div class='add'>+      drive-strength-microamp:</div><div class='add'>+        description: |</div><div class='add'>+          For channels configured as digital input, this configures the sink</div><div class='add'>+          current.</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1800</div><div class='add'>+        default: 0</div><div class='add'>+        multipleOf: 120</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -112,10 +128,7 @@ examples:</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-      cs-gpios = &lt;&amp;gpio 17 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-      status = "okay";</div><div class='del'>-</div><div class='del'>-      ad74413r@0 {</div><div class='add'>+      addac@0 {</div><div class='ctx'>         compatible = "adi,ad74413r";</div><div class='ctx'>         reg = &lt;0&gt;;</div><div class='ctx'>         spi-max-frequency = &lt;1000000&gt;;</div><div class='hunk'>@@ -128,6 +141,7 @@ examples:</div><div class='ctx'>         interrupts = &lt;26 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='ctx'> </div><div class='ctx'>         refin-supply = &lt;&amp;ad74413r_refin&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio2 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'>         channel@0 {</div><div class='ctx'>           reg = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml<br/>index 5277479be382..c15da155d300 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml</a></div><div class='hunk'>@@ -27,14 +27,15 @@ properties:</div><div class='ctx'>       Enable internal buffer to drive the reference pin.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - avdd-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml<br/>index a557761d8016..9fda56fa49c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml</a></div><div class='hunk'>@@ -8,7 +8,6 @@ title: HMC425A 6-bit Digital Step Attenuator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Hennerich &lt;michael.hennerich@analog.com&gt;</div><div class='del'>-  - Beniamin Bia &lt;beniamin.bia@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Digital Step Attenuator IIO device with gpio interface.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml<br/>index 501a463e5d88..96340a05754c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices AD2552R DAC device driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mihail Chindris &lt;mihail.chindris@analog.com&gt;</div><div class='add'>+  - Nuno Sá &lt;nuno.sa@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Bindings for the Analog Devices AD3552R DAC device and similar.</div><div class='hunk'>@@ -78,6 +78,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>       custom-output-range-config:</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description: Configuration of custom range when</div><div class='ctx'>           adi,output-range-microvolt is not present.</div><div class='ctx'>           The formulas for calculation the output voltages are</div><div class='hunk'>@@ -191,26 +192,26 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-      ad3552r@0 {</div><div class='del'>-              compatible = "adi,ad3552r";</div><div class='del'>-              reg = &lt;0&gt;;</div><div class='del'>-              spi-max-frequency = &lt;20000000&gt;;</div><div class='del'>-              #address-cells = &lt;1&gt;;</div><div class='del'>-              #size-cells = &lt;0&gt;;</div><div class='del'>-              channel@0 {</div><div class='del'>-                      reg = &lt;0&gt;;</div><div class='del'>-                      adi,output-range-microvolt = &lt;0 10000000&gt;;</div><div class='del'>-              };</div><div class='del'>-              channel@1 {</div><div class='del'>-                      reg = &lt;1&gt;;</div><div class='del'>-                      custom-output-range-config {</div><div class='del'>-                              adi,gain-offset = &lt;5&gt;;</div><div class='del'>-                              adi,gain-scaling-p-inv-log2 = &lt;1&gt;;</div><div class='del'>-                              adi,gain-scaling-n-inv-log2 = &lt;2&gt;;</div><div class='del'>-                              adi,rfb-ohms = &lt;1&gt;;</div><div class='del'>-                      };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        ad3552r@0 {</div><div class='add'>+            compatible = "adi,ad3552r";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            channel@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                adi,output-range-microvolt = &lt;0 10000000&gt;;</div><div class='add'>+            };</div><div class='add'>+            channel@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                custom-output-range-config {</div><div class='add'>+                    adi,gain-offset = &lt;5&gt;;</div><div class='add'>+                    adi,gain-scaling-p-inv-log2 = &lt;1&gt;;</div><div class='add'>+                    adi,gain-scaling-n-inv-log2 = &lt;2&gt;;</div><div class='add'>+                    adi,rfb-ohms = &lt;1&gt;;</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml<br/>index 05ed4e0ec364..c04165fa9259 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5064.yaml</a></div><div class='hunk'>@@ -95,15 +95,12 @@ properties:</div><div class='ctx'>   vrefD-supply: true</div><div class='ctx'>   vref-supply: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - # Shared external vref, no internal reference</div><div class='ctx'>     if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -232,6 +229,8 @@ allOf:</div><div class='ctx'>         - vrefA-supply</div><div class='ctx'>         - vrefB-supply</div><div class='ctx'> </div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml<br/>index 0d8fb56f4b09..86e2884cdfb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5360.yaml</a></div><div class='hunk'>@@ -28,10 +28,6 @@ properties:</div><div class='ctx'>   vref1-supply: true</div><div class='ctx'>   vref2-supply: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -39,6 +35,7 @@ required:</div><div class='ctx'>   - vref1-supply</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -59,9 +56,11 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - adi,ad5371</div><div class='del'>-      then:</div><div class='del'>-        required:</div><div class='del'>-          - vref2-supply</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - vref2-supply</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml<br/>index d599b418a020..9eb9928500e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5380.yaml</a></div><div class='hunk'>@@ -12,6 +12,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   DAC devices supporting both SPI and I2C interfaces.</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -39,14 +40,15 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       If not supplied devices will use internal regulators.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml<br/>index 188f656617e3..52d089ebde95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5421.yaml</a></div><div class='hunk'>@@ -26,13 +26,14 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: Fault signal.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml<br/>index 044332c97743..d2af2d491986 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5449.yaml</a></div><div class='hunk'>@@ -27,19 +27,16 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   VREF-supply: true</div><div class='ctx'>   VREFA-supply: true</div><div class='ctx'>   VREFB-supply: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -72,6 +69,8 @@ allOf:</div><div class='ctx'>         - VREFA-supply</div><div class='ctx'>         - VREFB-supply</div><div class='ctx'> </div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml<br/>index 330383b85eeb..4d5111a5f9bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5624r.yaml</a></div><div class='hunk'>@@ -22,17 +22,18 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply:</div><div class='ctx'>     description: If not present, internal reference will be used.</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml<br/>index 5c26441eae9f..b4400c52bec3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml</a></div><div class='hunk'>@@ -33,6 +33,7 @@ properties:</div><div class='ctx'>       - description: I2C devices</div><div class='ctx'>         enum:</div><div class='ctx'>           - adi,ad5311r</div><div class='add'>+          - adi,ad5337r</div><div class='ctx'>           - adi,ad5338r</div><div class='ctx'>           - adi,ad5671r</div><div class='ctx'>           - adi,ad5675r</div><div class='hunk'>@@ -53,14 +54,15 @@ properties:</div><div class='ctx'>   vcc-supply:</div><div class='ctx'>     description: If not supplied the internal reference is used.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml<br/>index f866b88e1440..9a3c2926bf85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5755.yaml</a></div><div class='hunk'>@@ -25,8 +25,6 @@ properties:</div><div class='ctx'>     description: Either this or spi-cpol but not both.</div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   adi,ext-dc-dc-compenstation-resistor:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='hunk'>@@ -67,8 +65,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@[0-7]$":</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -123,6 +119,11 @@ oneOf:</div><div class='ctx'>   - required:</div><div class='ctx'>       - spi-cpol</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml<br/>index fd4edca34a28..4e508bfcc9d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml</a></div><div class='hunk'>@@ -16,7 +16,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='ctx'>   adi,dc-dc-mode:</div><div class='hunk'>@@ -99,11 +98,11 @@ required:</div><div class='ctx'>   - adi,dc-dc-mode</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         adi,dc-dc-mode:</div><div class='del'>-          contains:</div><div class='del'>-            enum: [1, 3]</div><div class='add'>+          enum: [1, 3]</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         adi,range-microvolt: false</div><div class='hunk'>@@ -115,7 +114,7 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - adi,range-microvolt</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml<br/>index 7f95a9ed55fe..df550b5af2f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5761.yaml</a></div><div class='hunk'>@@ -22,18 +22,15 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply:</div><div class='ctx'>     description: If not supplied, internal reference will be used.</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -45,6 +42,8 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - vref-supply</div><div class='ctx'> </div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml<br/>index 8e893d52bfb1..0b409a727a43 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5764.yaml</a></div><div class='hunk'>@@ -22,18 +22,15 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vrefAB-supply: true</div><div class='ctx'>   vrefCD-supply: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -46,6 +43,8 @@ allOf:</div><div class='ctx'>         - vrefAB-supply</div><div class='ctx'>         - vrefCD-supply</div><div class='ctx'> </div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml<br/>index a8f7720d1e3e..212c936bab8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices AD5766 DAC device driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Cristian Pop &lt;cristian.pop@analog.com&gt;</div><div class='add'>+  - Nuno Sá &lt;nuno.sa@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Bindings for the Analog Devices AD5766 current DAC device. Datasheet can be</div><div class='hunk'>@@ -22,6 +22,8 @@ properties:</div><div class='ctx'>       - adi,ad5767</div><div class='ctx'> </div><div class='ctx'>   output-range-microvolts:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/int32-array</div><div class='add'>+    maxItems: 2</div><div class='ctx'>     description: Select converter output range.</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -49,15 +51,15 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-          ad5766@0 {</div><div class='del'>-              compatible = "adi,ad5766";</div><div class='del'>-              output-range-microvolts = &lt;(-5000000) 5000000&gt;;</div><div class='del'>-              reg = &lt;0&gt;;</div><div class='del'>-              spi-cpol;</div><div class='del'>-              spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-              reset-gpios = &lt;&amp;gpio 22 0&gt;;</div><div class='del'>-            };</div><div class='del'>-      };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ad5766@0 {</div><div class='add'>+            compatible = "adi,ad5766";</div><div class='add'>+            output-range-microvolts = &lt;(-5000000) 5000000&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 22 0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml<br/>index fb2c48fc7ce4..82b0eed6a7b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices AD5770R DAC device driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mircea Caprioru &lt;mircea.caprioru@analog.com&gt;</div><div class='add'>+  - Alexandru Tachici &lt;alexandru.tachici@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Bindings for the Analog Devices AD5770R current DAC device. Datasheet can be</div><div class='hunk'>@@ -49,8 +49,6 @@ properties:</div><div class='ctx'>       asserted during driver probe.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -62,6 +60,7 @@ properties:</div><div class='ctx'>       connected to the DAC. Channel 0 can act both as a current</div><div class='ctx'>       source and sink.</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -85,6 +84,7 @@ properties:</div><div class='ctx'>     description: Represents an external channel which are</div><div class='ctx'>       connected to the DAC.</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -101,6 +101,7 @@ properties:</div><div class='ctx'>     description: Represents an external channel which are</div><div class='ctx'>       connected to the DAC.</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -116,6 +117,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@([3-5])$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: Represents the external channels which are connected to the DAC.</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -138,53 +140,56 @@ required:</div><div class='ctx'>   - channel@4</div><div class='ctx'>   - channel@5</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        spi {</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                ad5770r@0 {</div><div class='del'>-                        compatible = "adi,ad5770r";</div><div class='del'>-                        reg = &lt;0&gt;;</div><div class='del'>-                        spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-                        vref-supply = &lt;&amp;vref&gt;;</div><div class='del'>-                        adi,external-resistor;</div><div class='del'>-                        reset-gpios = &lt;&amp;gpio 22 0&gt;;</div><div class='del'>-                        #address-cells = &lt;1&gt;;</div><div class='del'>-                        #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                        channel@0 {</div><div class='del'>-                                reg = &lt;0&gt;;</div><div class='del'>-                                adi,range-microamp = &lt;0 300000&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        channel@1 {</div><div class='del'>-                                reg = &lt;1&gt;;</div><div class='del'>-                                adi,range-microamp = &lt;0 140000&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        channel@2 {</div><div class='del'>-                                reg = &lt;2&gt;;</div><div class='del'>-                                adi,range-microamp = &lt;0 55000&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        channel@3 {</div><div class='del'>-                                reg = &lt;3&gt;;</div><div class='del'>-                                adi,range-microamp = &lt;0 45000&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        channel@4 {</div><div class='del'>-                                reg = &lt;4&gt;;</div><div class='del'>-                                adi,range-microamp = &lt;0 45000&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        channel@5 {</div><div class='del'>-                                reg = &lt;5&gt;;</div><div class='del'>-                                adi,range-microamp = &lt;0 45000&gt;;</div><div class='del'>-                        };</div><div class='del'>-                };</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ad5770r@0 {</div><div class='add'>+            compatible = "adi,ad5770r";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;vref&gt;;</div><div class='add'>+            adi,external-resistor;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 22 0&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            channel@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                adi,range-microamp = &lt;0 300000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                adi,range-microamp = &lt;0 140000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                adi,range-microamp = &lt;0 55000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@3 {</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                adi,range-microamp = &lt;0 45000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@4 {</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+                adi,range-microamp = &lt;0 45000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@5 {</div><div class='add'>+                reg = &lt;5&gt;;</div><div class='add'>+                adi,range-microamp = &lt;0 45000&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml<br/>index 650d1ebdcec3..3a84739736f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad5791.yaml</a></div><div class='hunk'>@@ -23,19 +23,20 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdd-supply: true</div><div class='ctx'>   vss-supply: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - vdd-supply</div><div class='ctx'>   - vss-supply</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml<br/>index 6a3990a8d0ad..1849a2ff05c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ad8801.yaml</a></div><div class='hunk'>@@ -19,19 +19,16 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vrefh-supply: true</div><div class='ctx'>   vrefl-supply: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - vrefh-supply</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -44,6 +41,8 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         vrefl-supply: false</div><div class='ctx'> </div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml<br/>index 48f9e7d29423..f22ef710ecde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/adi,ltc2688.yaml</a></div><div class='hunk'>@@ -48,6 +48,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^channel@([0-9]|1[0-5])$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -115,32 +116,32 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'> </div><div class='ctx'>     spi {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-          ltc2688: ltc2688@0 {</div><div class='del'>-                  compatible = "adi,ltc2688";</div><div class='del'>-                  reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                  vcc-supply = &lt;&amp;vcc&gt;;</div><div class='del'>-                  iovcc-supply = &lt;&amp;vcc&gt;;</div><div class='del'>-                  vref-supply = &lt;&amp;vref&gt;;</div><div class='del'>-</div><div class='del'>-                  #address-cells = &lt;1&gt;;</div><div class='del'>-                  #size-cells = &lt;0&gt;;</div><div class='del'>-                  channel@0 {</div><div class='del'>-                          reg = &lt;0&gt;;</div><div class='del'>-                          adi,toggle-mode;</div><div class='del'>-                          adi,overrange;</div><div class='del'>-                  };</div><div class='del'>-</div><div class='del'>-                  channel@1 {</div><div class='del'>-                          reg = &lt;1&gt;;</div><div class='del'>-                          adi,output-range-microvolt = &lt;0 10000000&gt;;</div><div class='del'>-</div><div class='del'>-                          clocks = &lt;&amp;clock_tgp3&gt;;</div><div class='del'>-                          adi,toggle-dither-input = &lt;2&gt;;</div><div class='del'>-                  };</div><div class='del'>-          };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        ltc2688: ltc2688@0 {</div><div class='add'>+            compatible = "adi,ltc2688";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vcc-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+            iovcc-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;vref&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            channel@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                adi,toggle-mode;</div><div class='add'>+                adi,overrange;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                adi,output-range-microvolt = &lt;0 10000000&gt;;</div><div class='add'>+</div><div class='add'>+                clocks = &lt;&amp;clock_tgp3&gt;;</div><div class='add'>+                adi,toggle-dither-input = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml b/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml<br/>index e51a585bd5a3..c9f51d00fa8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/lltc,ltc1660.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Marcus Folkesson &lt;marcus.folkesson@gmail.com&gt;</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc1660.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/dac/lltc,ltc1660.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Linear Technology Micropower octal 8-Bit and 10-Bit DACs</div><div class='ctx'> </div><div class='hunk'>@@ -41,7 +41,7 @@ examples:</div><div class='ctx'>     spi {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='del'>-  </div><div class='add'>+</div><div class='ctx'>       dac@0 {</div><div class='ctx'>         compatible = "lltc,ltc1660";</div><div class='ctx'>         reg = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml b/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml<br/>index edf804d0aca2..733edc7d6d17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC</div><div class='ctx'> </div><div class='hunk'>@@ -64,14 +64,14 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     spi {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-      dac@0 {</div><div class='del'>-        compatible = "lltc,ltc2632";</div><div class='del'>-        reg = &lt;0&gt;;    /* CS0 */</div><div class='del'>-        spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-        vref-supply = &lt;&amp;vref&gt;;</div><div class='del'>-      };</div><div class='add'>+        dac@0 {</div><div class='add'>+            compatible = "lltc,ltc2632-l12";</div><div class='add'>+            reg = &lt;0&gt;;    /* CS0 */</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            vref-supply = &lt;&amp;vref&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/maxim,max5522.yaml b/Documentation/devicetree/bindings/iio/dac/maxim,max5522.yaml<br/>new file mode 100644<br/>index 000000000000..24830f56c501<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/maxim,max5522.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/maxim,max5522.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/dac/maxim,max5522.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX5522 Dual 10-bit Voltage-Output SPI DACs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Angelo Dureghello &lt;angelo.dureghello@timesys.com&gt;</div><div class='add'>+  - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Datasheet available at:</div><div class='add'>+  https://www.analog.com/en/products/max5522.html</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max5522</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+  vrefin-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vrefin-supply</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        dac@0 {</div><div class='add'>+            compatible = "maxim,max5522";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            vrefin-supply = &lt;&amp;vref&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml<br/>index 12a14b3f36cb..19374401e509 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/microchip,mcp4922.yaml</a></div><div class='hunk'>@@ -15,22 +15,24 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - microchip,mcp4902</div><div class='ctx'>       - microchip,mcp4912</div><div class='add'>+      - microchip,mcp4921</div><div class='ctx'>       - microchip,mcp4922</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vref-supply: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml b/Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml<br/>index 595f481c548e..9c8afe3f1b69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/nxp,lpc1850-dac.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/dac/nxp,lpc1850-dac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP LPC1850 DAC bindings</div><div class='add'>+title: NXP LPC1850 DAC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml b/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml<br/>index 6adeda4087fc..04045b932bd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/st,stm32-dac.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 DAC bindings</div><div class='add'>+title: STMicroelectronics STM32 DAC</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The STM32 DAC is a 12-bit voltage output digital-to-analog converter. The DAC</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml<br/>index b0157050f1ee..201b04af2b22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/ti,dac082s085.yaml</a></div><div class='hunk'>@@ -33,21 +33,22 @@ properties:</div><div class='ctx'>   vref-supply:</div><div class='ctx'>     description: Needed to provide output scaling.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> oneOf:</div><div class='ctx'>   - required:</div><div class='ctx'>       - spi-cpha</div><div class='ctx'>   - required:</div><div class='ctx'>       - spi-cpol</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     vref_2v5_reg: regulator-vref {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml<br/>index 714191724f7c..79da0323c327 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/ti,dac5571.yaml</a></div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>       - ti,dac5573</div><div class='ctx'>       - ti,dac6573</div><div class='ctx'>       - ti,dac7573</div><div class='add'>+      - ti,dac121c081</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -45,7 +46,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         dac@4c {</div><div class='ctx'>             compatible = "ti,dac5571";</div><div class='del'>-            reg = &lt;0x4C&gt;;</div><div class='add'>+            reg = &lt;0x4c&gt;;</div><div class='ctx'>             vref-supply = &lt;&amp;vdd_supply&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml<br/>index 10be98d1f19c..a6814587dbc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/ti,dac7311.yaml</a></div><div class='hunk'>@@ -24,14 +24,15 @@ properties:</div><div class='ctx'>       Reference voltage must be supplied to establish the scaling of the</div><div class='ctx'>       output voltage.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml b/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml<br/>index d172b142f6ed..20dd1370660d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/dac/ti,dac7612.yaml</a></div><div class='hunk'>@@ -29,13 +29,14 @@ properties:</div><div class='ctx'>       DACs are loaded when the pin connected to this GPIO is pulled low.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml<br/>index 6b3a611e1cf1..1cb2adaf66f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adf4371.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/frequency/adf4371.yaml</a></div><div class='hunk'>@@ -40,28 +40,29 @@ properties:</div><div class='ctx'>       output stage will shut down until the ADF4371/ADF4372 achieves lock as</div><div class='ctx'>       measured by the digital lock detect circuitry.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         frequency@0 {</div><div class='del'>-                compatible = "adi,adf4371";</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-                spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-                clocks = &lt;&amp;adf4371_clkin&gt;;</div><div class='del'>-                clock-names = "clkin";</div><div class='add'>+            compatible = "adi,adf4371";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            clocks = &lt;&amp;adf4371_clkin&gt;;</div><div class='add'>+            clock-names = "clkin";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml<br/>index d7f20b8518e0..43cbf27114c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml</a></div><div class='hunk'>@@ -160,13 +160,16 @@ properties:</div><div class='ctx'>       2: +2dBm</div><div class='ctx'>       3: +5dBm</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml<br/>new file mode 100644<br/>index 000000000000..aa6a3193b4e0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml</a></div><div class='hunk'>@@ -0,0 +1,92 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/frequency/adi,adf4377.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ADF4377 Microwave Wideband Synthesizer with Integrated VCO</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Antoniu Miclaus &lt;antoniu.miclaus@analog.com&gt;</div><div class='add'>+  - Dragos Bogdan &lt;dragos.bogdan@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+   The ADF4377 is a high performance, ultralow jitter, dual output integer-N</div><div class='add'>+   phased locked loop (PLL) with integrated voltage controlled oscillator (VCO)</div><div class='add'>+   ideally suited for data converter and mixed signal front end (MxFE) clock</div><div class='add'>+   applications.</div><div class='add'>+</div><div class='add'>+   https://www.analog.com/en/products/adf4377.html</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,adf4377</div><div class='add'>+      - adi,adf4378</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 10000000</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    description:</div><div class='add'>+      External clock that provides reference input frequency.</div><div class='add'>+    items:</div><div class='add'>+      - const: ref_in</div><div class='add'>+</div><div class='add'>+  chip-enable-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO that controls the Chip Enable Pin.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clk1-enable-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO that controls the Enable Clock 1 Output Buffer Pin.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clk2-enable-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO that controls the Enable Clock 2 Output Buffer Pin.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  adi,muxout-select:</div><div class='add'>+    description:</div><div class='add'>+      On chip multiplexer output selection.</div><div class='add'>+      high_z - MUXOUT Pin set to high-Z.</div><div class='add'>+      lock_detect - MUXOUT Pin set to lock detector output.</div><div class='add'>+      muxout_low - MUXOUT Pin set to low.</div><div class='add'>+      f_div_rclk_2 - MUXOUT Pin set to fDIV_RCLK/2.</div><div class='add'>+      f_div_nclk_2 - MUXOUT Pin set to fDIV_NCLK/2.</div><div class='add'>+      muxout_high - MUXOUT Pin set to high.</div><div class='add'>+    enum: [high_z, lock_detect, muxout_low, f_div_rclk_2, f_div_nclk_2, muxout_high]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        frequency@0 {</div><div class='add'>+            compatible = "adi,adf4377";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+            clocks = &lt;&amp;adf4377_ref_in&gt;;</div><div class='add'>+            clock-names = "ref_in";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml<br/>index 23f1f3b55abb..fc813bcb6532 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml</a></div><div class='hunk'>@@ -70,7 +70,10 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - vcm-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml<br/>index 2716c1e8fe31..ab86daa2c56e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml</a></div><div class='hunk'>@@ -104,7 +104,10 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - vcm-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml<br/>index da7fe85ec92e..64f2352aac3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ADMV4420 K Band Downconverter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Cristian Pop &lt;cristian.pop@analog.com&gt;</div><div class='add'>+  - Nuno Sá &lt;nuno.sa@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The ADMV4420 is a highly integrated, double balanced, active</div><div class='hunk'>@@ -37,7 +37,11 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml<br/>index 3a8ea93f4e0c..f11391ab4b62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml</a></div><div class='hunk'>@@ -113,7 +113,10 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml b/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml<br/>index 662ec59ca0af..3d94dd4612c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml</a></div><div class='hunk'>@@ -38,7 +38,10 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'>   - spi-cpha</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -47,13 +50,13 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>         gyro@0 {</div><div class='del'>-                   compatible = "adi,adxrs290";</div><div class='del'>-                   reg = &lt;0&gt;;</div><div class='del'>-                   spi-max-frequency = &lt;5000000&gt;;</div><div class='del'>-                   spi-cpol;</div><div class='del'>-                   spi-cpha;</div><div class='del'>-                   interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-                   interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            compatible = "adi,adxrs290";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-cpha;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml b/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml<br/>index b6bbc312a7cf..1414ba9977c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml</a></div><div class='hunk'>@@ -24,8 +24,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'>     description:</div><div class='ctx'>       Should be configured with type IRQ_TYPE_EDGE_RISING.</div><div class='add'>+      If two interrupts are provided, expected order is INT1 and INT2.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml b/Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml<br/>index 3f57a1b813e6..297d519d68f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml</a></div><div class='hunk'>@@ -56,40 +56,43 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         gyroscope@20 {</div><div class='del'>-          compatible = "nxp,fxas21002c";</div><div class='del'>-          reg = &lt;0x20&gt;;</div><div class='add'>+            compatible = "nxp,fxas21002c";</div><div class='add'>+            reg = &lt;0x20&gt;;</div><div class='ctx'> </div><div class='del'>-          vdd-supply = &lt;&amp;reg_peri_3p15v&gt;;</div><div class='del'>-          vddio-supply = &lt;&amp;reg_peri_3p15v&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;reg_peri_3p15v&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;reg_peri_3p15v&gt;;</div><div class='ctx'> </div><div class='del'>-          interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-          interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-          interrupt-names = "INT1";</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+            interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "INT1";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         gyroscope@0 {</div><div class='del'>-          compatible = "nxp,fxas21002c";</div><div class='del'>-          reg = &lt;0x0&gt;;</div><div class='add'>+            compatible = "nxp,fxas21002c";</div><div class='add'>+            reg = &lt;0x0&gt;;</div><div class='ctx'> </div><div class='del'>-          spi-max-frequency = &lt;2000000&gt;;</div><div class='add'>+            spi-max-frequency = &lt;2000000&gt;;</div><div class='ctx'> </div><div class='del'>-          interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-          interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-          interrupt-names = "INT2";</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+            interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "INT2";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml b/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml<br/>index d861526c5c42..b9b5beac33b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/health/ti,afe4403.yaml</a></div><div class='hunk'>@@ -25,14 +25,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   reset-gpios: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='hunk'>@@ -41,7 +42,7 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        heart_mon@0 {</div><div class='add'>+        heart-mon@0 {</div><div class='ctx'>             compatible = "ti,afe4403";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             spi-max-frequency = &lt;10000000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml b/Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml<br/>index c0e815d9999e..2958c4ca75b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml</a></div><div class='hunk'>@@ -39,7 +39,7 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        heart_mon@58 {</div><div class='add'>+        heart-mon@58 {</div><div class='ctx'>             compatible = "ti,afe4404";</div><div class='ctx'>             reg = &lt;0x58&gt;;</div><div class='ctx'>             tx-supply = &lt;&amp;vbat&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/humidity/dht11.yaml b/Documentation/devicetree/bindings/iio/humidity/dht11.yaml<br/>index 2247481d0203..0103f4238942 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/humidity/dht11.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/humidity/dht11.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/humidity/dht11.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/humidity/dht11.yaml</a></div><div class='hunk'>@@ -34,7 +34,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    humidity_sensor {</div><div class='add'>+    humidity-sensor {</div><div class='ctx'>         compatible = "dht11";</div><div class='ctx'>         gpios = &lt;&amp;gpio0 6 0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml b/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml<br/>index 88384b69f917..a2bc1fa92da0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml</a></div><div class='hunk'>@@ -35,12 +35,12 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-      humidity@40 {</div><div class='del'>-          compatible = "ti,hdc2010";</div><div class='del'>-          reg = &lt;0x40&gt;;</div><div class='del'>-      };</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        humidity@40 {</div><div class='add'>+            compatible = "ti,hdc2010";</div><div class='add'>+            reg = &lt;0x40&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml<br/>index 340be256f283..4e43c80e5119 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml</a></div><div class='hunk'>@@ -25,8 +25,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -35,13 +33,16 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml<br/>index a7574210175a..c73533c54588 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml</a></div><div class='hunk'>@@ -79,6 +79,7 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -107,23 +108,23 @@ allOf:</div><div class='ctx'>       dependencies:</div><div class='ctx'>         adi,sync-mode: [ clocks ]</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     spi {</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            adis16475: adis16475-3@0 {</div><div class='del'>-                    compatible = "adi,adis16475-3";</div><div class='del'>-                    reg = &lt;0&gt;;</div><div class='del'>-                    spi-cpha;</div><div class='del'>-                    spi-cpol;</div><div class='del'>-                    spi-max-frequency = &lt;2000000&gt;;</div><div class='del'>-                    interrupts = &lt;4 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                    interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-            };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        adis16475: adis16475-3@0 {</div><div class='add'>+            compatible = "adi,adis16475-3";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-cpha;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-max-frequency = &lt;2000000&gt;;</div><div class='add'>+            interrupts = &lt;4 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml<br/>index 5dbe24be9925..56e0dc20f5e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/adi,adis16480.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices ADIS16480 and similar IMUs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Alexandru Ardelean &lt;alexandru.ardelean@analog.com&gt;</div><div class='add'>+  - Alexandru Tachici &lt;alexandru.tachici@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -47,8 +47,6 @@ properties:</div><div class='ctx'>         - DIO3</div><div class='ctx'>         - DIO4</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='hunk'>@@ -96,8 +94,6 @@ properties:</div><div class='ctx'>       - DIO3</div><div class='ctx'>       - DIO4</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -106,6 +102,11 @@ required:</div><div class='ctx'>   - spi-cpol</div><div class='ctx'>   - spi-max-frequency</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml<br/>index 6e73cd889b5c..47cfba939ca6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml</a></div><div class='hunk'>@@ -46,13 +46,14 @@ properties:</div><div class='ctx'>   mount-matrix:</div><div class='ctx'>     description: an optional 3x3 mounting rotation matrix</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -63,16 +64,16 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         bmi160@68 {</div><div class='del'>-                compatible = "bosch,bmi160";</div><div class='del'>-                reg = &lt;0x68&gt;;</div><div class='del'>-                vdd-supply = &lt;&amp;pm8916_l17&gt;;</div><div class='del'>-                vddio-supply = &lt;&amp;pm8916_l6&gt;;</div><div class='del'>-                interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-                interrupts = &lt;12 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                interrupt-names = "INT1";</div><div class='del'>-                mount-matrix = "0", "1", "0",</div><div class='del'>-                               "-1", "0", "0",</div><div class='del'>-                               "0", "0", "1";</div><div class='add'>+            compatible = "bosch,bmi160";</div><div class='add'>+            reg = &lt;0x68&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;pm8916_l17&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;pm8916_l6&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+            interrupts = &lt;12 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "INT1";</div><div class='add'>+            mount-matrix = "0", "1", "0",</div><div class='add'>+                           "-1", "0", "0",</div><div class='add'>+                           "0", "0", "1";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'>   - |</div><div class='hunk'>@@ -83,11 +84,11 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         bmi160@0 {</div><div class='del'>-                compatible = "bosch,bmi160";</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-                spi-max-frequency = &lt;10000000&gt;;</div><div class='del'>-                interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-                interrupts = &lt;12 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                interrupt-names = "INT2";</div><div class='add'>+            compatible = "bosch,bmi160";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;10000000&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+            interrupts = &lt;12 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "INT2";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml b/Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml<br/>new file mode 100644<br/>index 000000000000..e0d06db161a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/bosch,bno055.yaml</a></div><div class='hunk'>@@ -0,0 +1,59 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/imu/bosch,bno055.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Bosch BNO055</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrea Merello &lt;andrea.merello@iit.it&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Inertial Measurement Unit with Accelerometer, Gyroscope, Magnetometer and</div><div class='add'>+  internal MCU for sensor fusion</div><div class='add'>+  https://www.bosch-sensortec.com/products/smart-sensors/bno055/</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - bosch,bno055</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    serial {</div><div class='add'>+      imu {</div><div class='add'>+        compatible = "bosch,bno055";</div><div class='add'>+        reset-gpios = &lt;&amp;gpio0 54 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        clocks = &lt;&amp;imu_clk&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      imu@28 {</div><div class='add'>+        compatible = "bosch,bno055";</div><div class='add'>+        reg = &lt;0x28&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio0 54 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        clocks = &lt;&amp;imu_clk&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml<br/>index 4c1c083d0e92..7cd05bcbee31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml</a></div><div class='hunk'>@@ -31,6 +31,7 @@ properties:</div><div class='ctx'>       - invensense,icm42602</div><div class='ctx'>       - invensense,icm42605</div><div class='ctx'>       - invensense,icm42622</div><div class='add'>+      - invensense,icm42631</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -47,7 +48,6 @@ properties:</div><div class='ctx'>   vddio-supply:</div><div class='ctx'>     description: Regulator that provides power to the bus</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'>   spi-cpol: true</div><div class='ctx'> </div><div class='hunk'>@@ -56,41 +56,44 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         icm42605@68 {</div><div class='del'>-          compatible = "invensense,icm42605";</div><div class='del'>-          reg = &lt;0x68&gt;;</div><div class='del'>-          interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-          interrupts = &lt;7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-          vdd-supply = &lt;&amp;vdd&gt;;</div><div class='del'>-          vddio-supply = &lt;&amp;vddio&gt;;</div><div class='add'>+            compatible = "invensense,icm42605";</div><div class='add'>+            reg = &lt;0x68&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+            interrupts = &lt;7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vddio&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         icm42602@0 {</div><div class='del'>-          compatible = "invensense,icm42602";</div><div class='del'>-          reg = &lt;0&gt;;</div><div class='del'>-          spi-max-frequency = &lt;24000000&gt;;</div><div class='del'>-          spi-cpha;</div><div class='del'>-          spi-cpol;</div><div class='del'>-          interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-          interrupts = &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-          vdd-supply = &lt;&amp;vdd&gt;;</div><div class='del'>-          vddio-supply = &lt;&amp;vddio&gt;;</div><div class='add'>+            compatible = "invensense,icm42602";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;24000000&gt;;</div><div class='add'>+            spi-cpha;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+            interrupts = &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vddio&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml<br/>index d69595a524c1..ec64d7877fe5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml</a></div><div class='hunk'>@@ -14,21 +14,25 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - invensense,iam20680</div><div class='del'>-      - invensense,icm20608</div><div class='del'>-      - invensense,icm20609</div><div class='del'>-      - invensense,icm20689</div><div class='del'>-      - invensense,icm20602</div><div class='del'>-      - invensense,icm20690</div><div class='del'>-      - invensense,mpu6000</div><div class='del'>-      - invensense,mpu6050</div><div class='del'>-      - invensense,mpu6500</div><div class='del'>-      - invensense,mpu6515</div><div class='del'>-      - invensense,mpu6880</div><div class='del'>-      - invensense,mpu9150</div><div class='del'>-      - invensense,mpu9250</div><div class='del'>-      - invensense,mpu9255</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - invensense,iam20680</div><div class='add'>+          - invensense,icm20608</div><div class='add'>+          - invensense,icm20609</div><div class='add'>+          - invensense,icm20689</div><div class='add'>+          - invensense,icm20602</div><div class='add'>+          - invensense,icm20690</div><div class='add'>+          - invensense,mpu6000</div><div class='add'>+          - invensense,mpu6050</div><div class='add'>+          - invensense,mpu6500</div><div class='add'>+          - invensense,mpu6515</div><div class='add'>+          - invensense,mpu6880</div><div class='add'>+          - invensense,mpu9150</div><div class='add'>+          - invensense,mpu9250</div><div class='add'>+          - invensense,mpu9255</div><div class='add'>+      - items:</div><div class='add'>+          - const: invensense,icm20608d</div><div class='add'>+          - const: invensense,icm20608</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -36,8 +40,6 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdd-supply: true</div><div class='ctx'>   vddio-supply: true</div><div class='ctx'> </div><div class='hunk'>@@ -50,6 +52,7 @@ properties:</div><div class='ctx'>       These devices also support an auxiliary i2c bus via an i2c-gate.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       not:</div><div class='ctx'>         properties:</div><div class='hunk'>@@ -63,7 +66,7 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         i2c-gate: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml<br/>index 479e7065d4eb..688100b240bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Freescale FXOS8700 Inertial Measurement Unit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Robert Jones &lt;rjones@gateworks.com&gt;</div><div class='add'>+  - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Accelerometer and magnetometer combo device with an i2c and SPI interface.</div><div class='hunk'>@@ -36,45 +36,46 @@ properties:</div><div class='ctx'>   drive-open-drain:</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         fxos8700@1e {</div><div class='del'>-          compatible = "nxp,fxos8700";</div><div class='del'>-          reg = &lt;0x1e&gt;;</div><div class='add'>+            compatible = "nxp,fxos8700";</div><div class='add'>+            reg = &lt;0x1e&gt;;</div><div class='ctx'> </div><div class='del'>-          interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='del'>-          interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-          interrupt-names = "INT1";</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+            interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "INT1";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         fxos8700@0 {</div><div class='del'>-          compatible = "nxp,fxos8700";</div><div class='del'>-          reg = &lt;0&gt;;</div><div class='add'>+            compatible = "nxp,fxos8700";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-          spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-          interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-          interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-          interrupt-names = "INT2";</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+            interrupts = &lt;7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "INT2";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml b/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml<br/>index 0750f700a143..b39f5217d8ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml</a></div><div class='hunk'>@@ -14,23 +14,41 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - st,lsm6ds3</div><div class='del'>-      - st,lsm6ds3h</div><div class='del'>-      - st,lsm6dsl</div><div class='del'>-      - st,lsm6dsm</div><div class='del'>-      - st,ism330dlc</div><div class='del'>-      - st,lsm6dso</div><div class='del'>-      - st,asm330lhh</div><div class='del'>-      - st,lsm6dsox</div><div class='del'>-      - st,lsm6dsr</div><div class='del'>-      - st,lsm6ds3tr-c</div><div class='del'>-      - st,ism330dhcx</div><div class='del'>-      - st,lsm9ds1-imu</div><div class='del'>-      - st,lsm6ds0</div><div class='del'>-      - st,lsm6dsrx</div><div class='del'>-      - st,lsm6dst</div><div class='del'>-      - st,lsm6dsop</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - st,lsm6ds3</div><div class='add'>+          - st,lsm6ds3h</div><div class='add'>+          - st,lsm6dsl</div><div class='add'>+          - st,lsm6dsm</div><div class='add'>+          - st,ism330dlc</div><div class='add'>+          - st,lsm6dso</div><div class='add'>+          - st,asm330lhh</div><div class='add'>+          - st,lsm6dsox</div><div class='add'>+          - st,lsm6dsr</div><div class='add'>+          - st,lsm6ds3tr-c</div><div class='add'>+          - st,ism330dhcx</div><div class='add'>+          - st,lsm9ds1-imu</div><div class='add'>+          - st,lsm6ds0</div><div class='add'>+          - st,lsm6dsrx</div><div class='add'>+          - st,lsm6dst</div><div class='add'>+          - st,lsm6dsop</div><div class='add'>+          - st,lsm6dsv</div><div class='add'>+          - st,lsm6dso16is</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,asm330lhhx</div><div class='add'>+          - const: st,lsm6dsr</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,lsm6dstx</div><div class='add'>+          - const: st,lsm6dst</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,lsm6dsv16x</div><div class='add'>+          - const: st,lsm6dsv</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,ism330is</div><div class='add'>+          - const: st,lsm6dso16is</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,asm330lhb</div><div class='add'>+          - const: st,asm330lhh</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -41,8 +59,6 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Supports up to 2 interrupt lines via the INT1 and INT2 pins.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   vdd-supply:</div><div class='ctx'>     description: if defined provides VDD power to the sensor.</div><div class='ctx'> </div><div class='hunk'>@@ -50,7 +66,7 @@ properties:</div><div class='ctx'>     description: if defined provides VDD IO power to the sensor.</div><div class='ctx'> </div><div class='ctx'>   st,drdy-int-pin:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='ctx'>       The pin on the package that will be used to signal data ready</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -77,12 +93,15 @@ properties:</div><div class='ctx'>   wakeup-source:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml b/Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml<br/>new file mode 100644<br/>index 000000000000..7de1b0e721ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/light/liteon,ltrf216a.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/light/liteon,ltrf216a.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LTRF216A Ambient Light Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shreeya Patel &lt;shreeya.patel@collabora.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Ambient light sensing with an i2c interface.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: liteon,ltrf216a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: Regulator that provides power to the sensor.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        light-sensor@53 {</div><div class='add'>+            compatible = "liteon,ltrf216a";</div><div class='add'>+            reg = &lt;0x53&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vdd_regulator&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+            interrupts = &lt;5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/light/rohm,bu27034.yaml b/Documentation/devicetree/bindings/iio/light/rohm,bu27034.yaml<br/>new file mode 100644<br/>index 000000000000..30a109a1bf3b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/light/rohm,bu27034.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/light/rohm,bu27034.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/light/rohm,bu27034.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ROHM BU27034 ambient light sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  ROHM BU27034 is an ambient light sesnor with 3 channels and 3 photo diodes</div><div class='add'>+  capable of detecting a very wide range of illuminance. Typical application</div><div class='add'>+  is adjusting LCD and backlight power of TVs and mobile phones.</div><div class='add'>+  https://fscdn.rohm.com/en/products/databook/datasheet/ic/sensor/light/bu27034nuc-e.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rohm,bu27034</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      light-sensor@38 {</div><div class='add'>+        compatible = "rohm,bu27034";</div><div class='add'>+        reg = &lt;0x38&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/light/stk33xx.yaml b/Documentation/devicetree/bindings/iio/light/stk33xx.yaml<br/>index f92bf7b2b7f0..f6e22dc9814a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/light/stk33xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/light/stk33xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/light/stk33xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/light/stk33xx.yaml</a></div><div class='hunk'>@@ -13,6 +13,9 @@ maintainers:</div><div class='ctx'> description: |</div><div class='ctx'>   Ambient light and proximity sensor over an i2c interface.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ../common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -26,6 +29,8 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  proximity-near-level: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -44,6 +49,7 @@ examples:</div><div class='ctx'>         stk3310@48 {</div><div class='ctx'>                 compatible = "sensortek,stk3310";</div><div class='ctx'>                 reg = &lt;0x48&gt;;</div><div class='add'>+                proximity-near-level = &lt;25&gt;;</div><div class='ctx'>                 interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='ctx'>                 interrupts = &lt;5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml b/Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml<br/>new file mode 100644<br/>index 000000000000..121d540b7b6e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iio/magnetometer/ti,tmag5273.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI TMAG5273 Low-Power Linear 3D Hall-Effect Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Gerald Loacker &lt;gerald.loacker@wolfvision.net&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The TI TMAG5273 is a low-power linear 3D Hall-effect sensor. This device</div><div class='add'>+  integrates three independent Hall-effect sensors in the X, Y, and Z axes.</div><div class='add'>+  The device has an integrated temperature sensor available. The TMAG5273</div><div class='add'>+  can be configured through the I2C interface to enable any combination of</div><div class='add'>+  magnetic axes and temperature measurements. An integrated angle calculation</div><div class='add'>+  engine (CORDIC) provides full 360° angular position information for both</div><div class='add'>+  on-axis and off-axis angle measurement topologies. The angle calculation is</div><div class='add'>+  performed using two user-selected magnetic axes.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,tmag5273</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#io-channel-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ti,angle-measurement:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description:</div><div class='add'>+      Enables angle measurement in the selected plane.</div><div class='add'>+      If not specified, "x-y" will be anables as default.</div><div class='add'>+    enum:</div><div class='add'>+      - off</div><div class='add'>+      - x-y</div><div class='add'>+      - y-z</div><div class='add'>+      - x-z</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description:</div><div class='add'>+      A regulator providing 1.7 V to 3.6 V supply voltage on the VCC pin,</div><div class='add'>+      typically 3.3 V.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      The low active interrupt can be configured to be fixed width or latched.</div><div class='add'>+      Interrupt events can be configured to be generated from magnetic</div><div class='add'>+      thresholds or when a conversion is completed.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        magnetometer@35 {</div><div class='add'>+            compatible = "ti,tmag5273";</div><div class='add'>+            reg = &lt;0x35&gt;;</div><div class='add'>+            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+            ti,angle-measurement = "x-z";</div><div class='add'>+            vcc-supply = &lt;&amp;vcc3v3&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml b/Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml<br/>index 9438fffaf0ba..877226e9219b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/magnetometer/yamaha,yas530.yaml</a></div><div class='hunk'>@@ -91,12 +91,12 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         magnetometer@2e {</div><div class='del'>-          compatible = "yamaha,yas530";</div><div class='del'>-          reg = &lt;0x2e&gt;;</div><div class='del'>-          vdd-supply = &lt;&amp;ldo1_reg&gt;;</div><div class='del'>-          iovdd-supply = &lt;&amp;ldo2_reg&gt;;</div><div class='del'>-          reset-gpios = &lt;&amp;gpio6 12 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-          interrupts = &lt;13 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            compatible = "yamaha,yas530";</div><div class='add'>+            reg = &lt;0x2e&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;ldo1_reg&gt;;</div><div class='add'>+            iovdd-supply = &lt;&amp;ldo2_reg&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio6 12 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            interrupts = &lt;13 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -105,8 +105,8 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         magnetometer@2e {</div><div class='del'>-          compatible = "yamaha,yas539";</div><div class='del'>-          reg = &lt;0x2e&gt;;</div><div class='del'>-          vdd-supply = &lt;&amp;ldo1_reg&gt;;</div><div class='add'>+            compatible = "yamaha,yas539";</div><div class='add'>+            reg = &lt;0x2e&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;ldo1_reg&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml b/Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml<br/>index 611ad4444cf0..c55831b60ee6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/multiplexer/io-channel-mux.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/multiplexer/io-channel-mux.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: I/O channel multiplexer bindings</div><div class='add'>+title: I/O channel multiplexer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Rosin &lt;peda@axentia.se&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml b/Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml<br/>index 0ebb6725a1af..b8d7083c97f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml</a></div><div class='hunk'>@@ -44,7 +44,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         potentiometer@2f {</div><div class='ctx'>             compatible = "adi,ad5272-020";</div><div class='del'>-            reg = &lt;0x2F&gt;;</div><div class='add'>+            reg = &lt;0x2f&gt;;</div><div class='ctx'>             reset-gpios = &lt;&amp;gpio3 6 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml b/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml<br/>index 567697d996ec..87e88f2a9908 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp41010.yaml</a></div><div class='hunk'>@@ -25,14 +25,15 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml b/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml<br/>index 945a2d644ddc..896fe0b5edcc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml</a></div><div class='hunk'>@@ -80,14 +80,15 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='hunk'>@@ -95,7 +96,7 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         potentiometer@0 {</div><div class='del'>-            compatible = "mcp4131-502";</div><div class='add'>+            compatible = "microchip,mcp4131-502";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             spi-max-frequency = &lt;500000&gt;;</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml b/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml<br/>index be2be4b556db..9fb8d773efa3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/pressure/asc,dlhl60d.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: All Sensors DLH series low voltage digital pressure sensors</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Tomislav Denis &lt;tomislav.denis@avl.com&gt;</div><div class='add'>+  - Jonathan Cameron &lt;jic23@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Bindings for the All Sensors DLH series pressure sensors.</div><div class='hunk'>@@ -39,7 +39,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml b/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml<br/>index 49257f9251e8..6fda887ee9d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/bmp085.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/bmp085.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/pressure/bmp085.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/pressure/bmp085.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: BMP085/BMP180/BMP280/BME280 pressure iio sensors</div><div class='add'>+title: BMP085/BMP180/BMP280/BME280/BMP380 pressure iio sensors</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andreas Klinger &lt;ak@it-klinger.de&gt;</div><div class='hunk'>@@ -16,6 +16,8 @@ description: |</div><div class='ctx'>     https://www.bosch-sensortec.com/bst/products/all_products/bmp180</div><div class='ctx'>     https://www.bosch-sensortec.com/bst/products/all_products/bmp280</div><div class='ctx'>     https://www.bosch-sensortec.com/bst/products/all_products/bme280</div><div class='add'>+    https://www.bosch-sensortec.com/bst/products/all_products/bmp380</div><div class='add'>+    https://www.bosch-sensortec.com/bst/products/all_products/bmp580</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -24,6 +26,8 @@ properties:</div><div class='ctx'>       - bosch,bmp180</div><div class='ctx'>       - bosch,bmp280</div><div class='ctx'>       - bosch,bme280</div><div class='add'>+      - bosch,bmp380</div><div class='add'>+      - bosch,bmp580</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -58,16 +62,16 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-      pressure@77 {</div><div class='del'>-          compatible = "bosch,bmp085";</div><div class='del'>-          reg = &lt;0x77&gt;;</div><div class='del'>-          interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-          interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-          reset-gpios = &lt;&amp;gpio0 26 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-          vddd-supply = &lt;&amp;foo&gt;;</div><div class='del'>-          vdda-supply = &lt;&amp;bar&gt;;</div><div class='del'>-      };</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        pressure@77 {</div><div class='add'>+            compatible = "bosch,bmp085";</div><div class='add'>+            reg = &lt;0x77&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio0 26 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vddd-supply = &lt;&amp;foo&gt;;</div><div class='add'>+            vdda-supply = &lt;&amp;bar&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml b/Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml<br/>index 4f06707450bf..21e6ddb7f41e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml</a></div><div class='hunk'>@@ -30,7 +30,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -52,6 +55,7 @@ examples:</div><div class='ctx'>             compatible = "meas,ms5611";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             vdd-supply = &lt;&amp;ldo_3v3_gnss&gt;;</div><div class='add'>+            spi-max-frequency = &lt;20000000&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml b/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml<br/>index d6103be03460..c33640ddde58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml</a></div><div class='hunk'>@@ -33,7 +33,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml b/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml<br/>index 7fcba5d6d508..c999994e19e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml</a></div><div class='hunk'>@@ -49,7 +49,10 @@ required:</div><div class='ctx'>   - spi-cpha</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -57,7 +60,7 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-    lightning@0 {</div><div class='add'>+        lightning@0 {</div><div class='ctx'>             compatible = "ams,as3935";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             spi-max-frequency = &lt;400000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml b/Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml<br/>index 00e3b59641d2..d4e09d2dcd21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/proximity/google,cros-ec-mkbp-proximity.yaml</a></div><div class='hunk'>@@ -1,7 +1,6 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml<br/>index b8a6ee16854f..b3aa2ebf9661 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/proximity/semtech,sx9324.yaml</a></div><div class='hunk'>@@ -126,6 +126,42 @@ properties:</div><div class='ctx'>       UINT_MAX (4294967295) represents infinite. Other values</div><div class='ctx'>       represent 1-1/N.</div><div class='ctx'> </div><div class='add'>+  semtech,cs-idle-sleep:</div><div class='add'>+    description:</div><div class='add'>+      State of CS pins during sleep mode and idle time.</div><div class='add'>+    enum:</div><div class='add'>+      - hi-z</div><div class='add'>+      - gnd</div><div class='add'>+      - vdd</div><div class='add'>+</div><div class='add'>+  semtech,int-comp-resistor:</div><div class='add'>+    description:</div><div class='add'>+      Internal resistor setting for compensation.</div><div class='add'>+    enum:</div><div class='add'>+      - lowest</div><div class='add'>+      - low</div><div class='add'>+      - high</div><div class='add'>+      - highest</div><div class='add'>+</div><div class='add'>+  semtech,input-precharge-resistor-ohms:</div><div class='add'>+    default: 4000</div><div class='add'>+    multipleOf: 2000</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 30000</div><div class='add'>+    description:</div><div class='add'>+      Pre-charge input resistance in Ohm.</div><div class='add'>+</div><div class='add'>+  semtech,input-analog-gain:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+    description: |</div><div class='add'>+      Defines the input antenna analog gain</div><div class='add'>+      0: x1.247</div><div class='add'>+      1: x1 (default)</div><div class='add'>+      2: x0.768</div><div class='add'>+      3: x0.552</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -157,5 +193,8 @@ examples:</div><div class='ctx'>         semtech,ph01-proxraw-strength = &lt;2&gt;;</div><div class='ctx'>         semtech,ph23-proxraw-strength = &lt;2&gt;;</div><div class='ctx'>         semtech,avg-pos-strength = &lt;64&gt;;</div><div class='add'>+        semtech,int-comp-resistor = "lowest";</div><div class='add'>+        semtech,input-precharge-resistor-ohms = &lt;2000&gt;;</div><div class='add'>+        semtech,cs-idle-sleep = "gnd";</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml<br/>index 63e1a1fd00d4..ad0bb44f41b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/proximity/semtech,sx9360.yaml</a></div><div class='hunk'>@@ -36,7 +36,7 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   semtech,resolution:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [8, 16, 32, 64, 128, 256, 512, 1024]</div><div class='ctx'>     description:</div><div class='ctx'>       Capacitance measurement resolution. For both phases, "reference" and</div><div class='hunk'>@@ -61,6 +61,14 @@ properties:</div><div class='ctx'>       UINT_MAX (4294967295) represents infinite. Other values</div><div class='ctx'>       represent 1-1/N.</div><div class='ctx'> </div><div class='add'>+  semtech,input-precharge-resistor-ohms:</div><div class='add'>+    default: 0</div><div class='add'>+    multipleOf: 2000</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 30000</div><div class='add'>+    description:</div><div class='add'>+      Pre-charge input resistance in Ohm.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -85,5 +93,6 @@ examples:</div><div class='ctx'>         semtech,resolution = &lt;256&gt;;</div><div class='ctx'>         semtech,proxraw-strength = &lt;2&gt;;</div><div class='ctx'>         semtech,avg-pos-strength = &lt;64&gt;;</div><div class='add'>+        semtech,input-precharge-resistor-ohms = &lt;4000&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml b/Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml<br/>index 656460d9d8c8..322befc41de6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/proximity/st,vl53l0x.yaml</a></div><div class='hunk'>@@ -19,6 +19,11 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml b/Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml<br/>index 81e4bdfc17c4..b24e5a202a48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml</a></div><div class='hunk'>@@ -33,8 +33,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -43,6 +41,11 @@ dependencies:</div><div class='ctx'>   spi-cpol: [ spi-cpha ]</div><div class='ctx'>   spi-cpha: [ spi-cpol ]</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml b/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml<br/>index a88b3b14d6bd..dd2ae2bd1ad7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/samsung,sensorhub-rinato.yaml</a></div><div class='hunk'>@@ -40,10 +40,6 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Reset the sensorhub.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -52,6 +48,11 @@ required:</div><div class='ctx'>   - mcu-ap-gpios</div><div class='ctx'>   - mcu-reset-gpios</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/st,st-sensors.yaml b/Documentation/devicetree/bindings/iio/st,st-sensors.yaml<br/>index 9735a2048255..1ff3afca9149 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/st,st-sensors.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/st,st-sensors.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/st,st-sensors.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/st,st-sensors.yaml</a></div><div class='hunk'>@@ -11,9 +11,6 @@ description: The STMicroelectronics sensor devices are pretty straight-forward</div><div class='ctx'>   what type of sensor it is.</div><div class='ctx'>   Note that whilst this covers many STMicro MEMs sensors, some more complex</div><div class='ctx'>   IMUs need their own bindings.</div><div class='del'>-  The STMicroelectronics sensor devices are pretty straight-forward I2C or</div><div class='del'>-  SPI devices, all sharing the same device tree descriptions no matter what</div><div class='del'>-  type of sensor it is.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Denis Ciocca &lt;denis.ciocca@st.com&gt;</div><div class='hunk'>@@ -29,6 +26,7 @@ properties:</div><div class='ctx'>           - st,lis2dw12</div><div class='ctx'>           - st,lis2hh12</div><div class='ctx'>           - st,lis2dh12-accel</div><div class='add'>+          - st,lis302dl</div><div class='ctx'>           - st,lis331dl-accel</div><div class='ctx'>           - st,lis331dlh-accel</div><div class='ctx'>           - st,lis3de</div><div class='hunk'>@@ -38,6 +36,7 @@ properties:</div><div class='ctx'>           - st,lis3lv02dl-accel</div><div class='ctx'>           - st,lng2dm-accel</div><div class='ctx'>           - st,lsm303agr-accel</div><div class='add'>+          - st,lsm303c-accel</div><div class='ctx'>           - st,lsm303dl-accel</div><div class='ctx'>           - st,lsm303dlh-accel</div><div class='ctx'>           - st,lsm303dlhc-accel</div><div class='hunk'>@@ -46,6 +45,9 @@ properties:</div><div class='ctx'>           - st,lsm330d-accel</div><div class='ctx'>           - st,lsm330dl-accel</div><div class='ctx'>           - st,lsm330dlc-accel</div><div class='add'>+      - items:</div><div class='add'>+          - const: st,iis328dq</div><div class='add'>+          - const: st,h3lis331dl-accel</div><div class='ctx'>       - description: Silan Accelerometers</div><div class='ctx'>         enum:</div><div class='ctx'>           - silan,sc7a20</div><div class='hunk'>@@ -65,6 +67,7 @@ properties:</div><div class='ctx'>           - st,lis2mdl</div><div class='ctx'>           - st,lis3mdl-magn</div><div class='ctx'>           - st,lsm303agr-magn</div><div class='add'>+          - st,lsm303c-magn</div><div class='ctx'>           - st,lsm303dlh-magn</div><div class='ctx'>           - st,lsm303dlhc-magn</div><div class='ctx'>           - st,lsm303dlm-magn</div><div class='hunk'>@@ -72,6 +75,7 @@ properties:</div><div class='ctx'>       - description: STMicroelectronics Pressure Sensors</div><div class='ctx'>         enum:</div><div class='ctx'>           - st,lps001wp-press</div><div class='add'>+          - st,lps22df</div><div class='ctx'>           - st,lps22hb-press</div><div class='ctx'>           - st,lps22hh</div><div class='ctx'>           - st,lps25h-press</div><div class='hunk'>@@ -140,6 +144,7 @@ allOf:</div><div class='ctx'>             - st,lis2mdl</div><div class='ctx'>             - st,lis3l02dq</div><div class='ctx'>             - st,lis3lv02dl-accel</div><div class='add'>+            - st,lps22df</div><div class='ctx'>             - st,lps22hb-press</div><div class='ctx'>             - st,lps22hh</div><div class='ctx'>             - st,lps25h-press</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml b/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml<br/>index 722781aa4697..dbb85135fd66 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml</a></div><div class='hunk'>@@ -4,19 +4,52 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Analog Devices LTC2983 Multi-sensor Temperature system</div><div class='add'>+title: Analog Devices LTC2983, LTC2986, LTM2985 Multi-sensor Temperature system</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nuno Sá &lt;nuno.sa@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System</div><div class='add'>+  Analog Devices LTC2983, LTC2984, LTC2986, LTM2985 Multi-Sensor Digital</div><div class='add'>+  Temperature Measurement Systems</div><div class='add'>+</div><div class='ctx'>   https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/29861fa.pdf</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/ltm2985.pdf</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  sensor-node:</div><div class='add'>+    type: object</div><div class='add'>+    description: Sensor node common constraints</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description:</div><div class='add'>+          Channel number. Connects the sensor to the channel with this number</div><div class='add'>+          of the device.</div><div class='add'>+        minimum: 1</div><div class='add'>+        maximum: 20</div><div class='add'>+</div><div class='add'>+      adi,sensor-type:</div><div class='add'>+        description: Type of sensor connected to the device.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - adi,sensor-type</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - adi,ltc2983</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - adi,ltc2983</div><div class='add'>+          - adi,ltc2986</div><div class='add'>+          - adi,ltm2985</div><div class='add'>+      - items:</div><div class='add'>+          - const: adi,ltc2984</div><div class='add'>+          - const: adi,ltc2983</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -25,26 +58,26 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   adi,mux-delay-config-us:</div><div class='del'>-    description:</div><div class='del'>-      The LTC2983 performs 2 or 3 internal conversion cycles per temperature</div><div class='del'>-      result. Each conversion cycle is performed with different excitation and</div><div class='del'>-      input multiplexer configurations. Prior to each conversion, these</div><div class='del'>-      excitation circuits and input switch configurations are changed and an</div><div class='del'>-      internal 1ms delay ensures settling prior to the conversion cycle in most</div><div class='del'>-      cases. An extra delay can be configured using this property. The value is</div><div class='del'>-      rounded to nearest 100us.</div><div class='add'>+    description: |</div><div class='add'>+      Extra delay prior to each conversion, in addition to the internal 1ms</div><div class='add'>+      delay, for the multiplexer to switch input configurations and</div><div class='add'>+      excitation values.</div><div class='add'>+</div><div class='add'>+      This property is supposed to be in microseconds, but to maintain</div><div class='add'>+      compatibility, this value will be multiplied by 100 before usage.</div><div class='ctx'>     maximum: 255</div><div class='add'>+    default: 0</div><div class='ctx'> </div><div class='ctx'>   adi,filter-notch-freq:</div><div class='ctx'>     description:</div><div class='del'>-      Set's the default setting of the digital filter. The default is</div><div class='del'>-      simultaneous 50/60Hz rejection.</div><div class='add'>+      Notch frequency of the digital filter.</div><div class='ctx'>       0 - 50/60Hz rejection</div><div class='ctx'>       1 - 60Hz rejection</div><div class='ctx'>       2 - 50Hz rejection</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 2</div><div class='add'>+    default: 0</div><div class='ctx'> </div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -53,30 +86,11 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "@([1-9]|1[0-9]|20)$":</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      reg:</div><div class='del'>-        description:</div><div class='del'>-          The channel number. It can be connected to one of the 20 channels of</div><div class='del'>-          the device.</div><div class='del'>-        minimum: 1</div><div class='del'>-        maximum: 20</div><div class='del'>-</div><div class='del'>-      adi,sensor-type:</div><div class='del'>-        description: Identifies the type of sensor connected to the device.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - reg</div><div class='del'>-      - adi,sensor-type</div><div class='del'>-</div><div class='ctx'>   "^thermocouple@":</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Represents a thermocouple sensor which is connected to one of the device</div><div class='del'>-      channels.</div><div class='add'>+    $ref: '#/$defs/sensor-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    description: Thermocouple sensor.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       adi,sensor-type:</div><div class='hunk'>@@ -95,86 +109,90 @@ patternProperties:</div><div class='ctx'>         maximum: 9</div><div class='ctx'> </div><div class='ctx'>       adi,single-ended:</div><div class='del'>-        description:</div><div class='del'>-          Boolean property which set's the thermocouple as single-ended.</div><div class='add'>+        description: Whether the sensor is single-ended.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,sensor-oc-current-microamp:</div><div class='del'>-        description:</div><div class='del'>-          This property set's the pulsed current value applied during</div><div class='del'>-          open-circuit detect.</div><div class='add'>+        description: Pulsed current value applied during open-circuit detect.</div><div class='ctx'>         enum: [10, 100, 500, 1000]</div><div class='add'>+        default: 10</div><div class='ctx'> </div><div class='ctx'>       adi,cold-junction-handle:</div><div class='ctx'>         description:</div><div class='del'>-          Phandle which points to a sensor object responsible for measuring</div><div class='del'>-          the thermocouple cold junction temperature.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+          Sensor responsible for measuring the thermocouple cold junction</div><div class='add'>+          temperature.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>       adi,custom-thermocouple:</div><div class='ctx'>         description:</div><div class='del'>-          This is a table, where each entry should be a pair of</div><div class='del'>-          voltage(mv)-temperature(K). The entries must be given in nv and uK</div><div class='del'>-          so that, the original values must be multiplied by 1000000. For</div><div class='del'>-          more details look at table 69 and 70.</div><div class='del'>-          Note should be signed, but dtc doesn't currently maintain the</div><div class='del'>-          sign.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint64-matrix</div><div class='add'>+          Used for digitizing custom thermocouples.</div><div class='add'>+          See Page 59 of the datasheet.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/int64-matrix</div><div class='ctx'>         minItems: 3</div><div class='ctx'>         maxItems: 64</div><div class='ctx'>         items:</div><div class='del'>-          minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - description: Voltage point in nV, signed.</div><div class='add'>+            - description: Temperature point in uK.</div><div class='add'>+</div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            adi,sensor-type:</div><div class='add'>+              const: 9</div><div class='add'>+        then:</div><div class='add'>+          required:</div><div class='add'>+            - adi,custom-thermocouple</div><div class='ctx'> </div><div class='ctx'>   "^diode@":</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Represents a diode sensor which is connected to one of the device</div><div class='del'>-      channels.</div><div class='add'>+    $ref: '#/$defs/sensor-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    description: Diode sensor.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       adi,sensor-type:</div><div class='del'>-        description: Identifies the sensor as a diode.</div><div class='add'>+        description: Sensor type for diodes.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         const: 28</div><div class='ctx'> </div><div class='ctx'>       adi,single-ended:</div><div class='del'>-        description: Boolean property which set's the diode as single-ended.</div><div class='add'>+        description: Whether the sensor is single-ended.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,three-conversion-cycles:</div><div class='ctx'>         description:</div><div class='del'>-          Boolean property which set's three conversion cycles removing</div><div class='del'>-          parasitic resistance effects between the LTC2983 and the diode.</div><div class='add'>+          Whether to use three conversion cycles to remove parasitic</div><div class='add'>+          resistance between the device and the diode.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,average-on:</div><div class='ctx'>         description:</div><div class='del'>-          Boolean property which enables a running average of the diode</div><div class='del'>-          temperature reading. This reduces the noise when the diode is used</div><div class='del'>-          as a cold junction temperature element on an isothermal block</div><div class='del'>-          where temperatures change slowly.</div><div class='add'>+          Whether to use a running average of the diode temperature</div><div class='add'>+          reading to reduce the noise when the diode is used as a cold</div><div class='add'>+          junction temperature element on an isothermal block where</div><div class='add'>+          temperatures change slowly.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,excitation-current-microamp:</div><div class='ctx'>         description:</div><div class='del'>-          This property controls the magnitude of the excitation current</div><div class='del'>-          applied to the diode. Depending on the number of conversions</div><div class='del'>-          cycles, this property will assume different predefined values on</div><div class='del'>-          each cycle. Just set the value of the first cycle (1l).</div><div class='add'>+          Magnitude of the 1l excitation current applied to the diode.</div><div class='add'>+          4l excitation current will be 4 times this value, and 8l</div><div class='add'>+          excitation current will be 8 times value.</div><div class='ctx'>         enum: [10, 20, 40, 80]</div><div class='add'>+        default: 10</div><div class='ctx'> </div><div class='ctx'>       adi,ideal-factor-value:</div><div class='ctx'>         description:</div><div class='del'>-          This property sets the diode ideality factor. The real value must</div><div class='del'>-          be multiplied by 1000000 to remove the fractional part. For more</div><div class='del'>-          information look at table 20 of the datasheet.</div><div class='add'>+          Diode ideality factor.</div><div class='add'>+          Set this property to 1000000 times the real value.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        default: 0</div><div class='ctx'> </div><div class='ctx'>   "^rtd@":</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Represents a rtd sensor which is connected to one of the device channels.</div><div class='add'>+    $ref: '#/$defs/sensor-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: RTD sensor.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -197,68 +215,83 @@ patternProperties:</div><div class='ctx'>         maximum: 18</div><div class='ctx'> </div><div class='ctx'>       adi,rsense-handle:</div><div class='del'>-        description:</div><div class='del'>-          Phandle pointing to a rsense object associated with this RTD.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+        description: Associated sense resistor sensor.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>       adi,number-of-wires:</div><div class='ctx'>         description:</div><div class='del'>-          Identifies the number of wires used by the RTD. Setting this</div><div class='del'>-          property to 5 means 4 wires with Kelvin Rsense.</div><div class='add'>+          Number of wires used by the RTD.</div><div class='add'>+          5 means 4 wires with Kelvin sense resistor.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         enum: [2, 3, 4, 5]</div><div class='add'>+        default: 2</div><div class='ctx'> </div><div class='ctx'>       adi,rsense-share:</div><div class='ctx'>         description:</div><div class='del'>-          Boolean property which enables Rsense sharing, where one sense</div><div class='del'>-          resistor is used for multiple 2-, 3-, and/or 4-wire RTDs.</div><div class='del'>-        type: boolean</div><div class='del'>-</div><div class='del'>-      adi,current-rotate:</div><div class='del'>-        description:</div><div class='del'>-          Boolean property which enables excitation current rotation to</div><div class='del'>-          automatically remove parasitic thermocouple effects. Note that</div><div class='del'>-          this property is not allowed for 2- and 3-wire RTDs.</div><div class='add'>+          Whether to enable sense resistor sharing, where one sense</div><div class='add'>+          resistor is used by multiple sensors.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,excitation-current-microamp:</div><div class='del'>-        description:</div><div class='del'>-          This property controls the magnitude of the excitation current</div><div class='del'>-          applied to the RTD.</div><div class='add'>+        description: Excitation current applied to the RTD.</div><div class='ctx'>         enum: [5, 10, 25, 50, 100, 250, 500, 1000]</div><div class='add'>+        default: 5</div><div class='ctx'> </div><div class='ctx'>       adi,rtd-curve:</div><div class='del'>-        description:</div><div class='del'>-          This property set the RTD curve used and the corresponding</div><div class='del'>-          Callendar-VanDusen constants. Look at table 30 of the datasheet.</div><div class='add'>+        description: |</div><div class='add'>+          RTD curve and the corresponding Callendar-VanDusen constants.</div><div class='add'>+          0 - European</div><div class='add'>+          1 - American</div><div class='add'>+          2 - Japanese</div><div class='add'>+          3 - ITS-90</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3</div><div class='add'>+        default: 0</div><div class='ctx'> </div><div class='ctx'>       adi,custom-rtd:</div><div class='ctx'>         description:</div><div class='del'>-          This is a table, where each entry should be a pair of</div><div class='del'>-          resistance(ohm)-temperature(K). The entries added here are in uohm</div><div class='del'>-          and uK. For more details values look at table 74 and 75.</div><div class='add'>+          Used for digitizing custom RTDs.</div><div class='add'>+          See Page 62 of the datasheet.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint64-matrix</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 64</div><div class='ctx'>         items:</div><div class='del'>-          minItems: 3</div><div class='del'>-          maxItems: 64</div><div class='ctx'>           items:</div><div class='del'>-            minItems: 2</div><div class='del'>-            maxItems: 2</div><div class='add'>+            - description: Resistance point in uOhms.</div><div class='add'>+            - description: Temperature point in uK.</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - adi,rsense-handle</div><div class='ctx'> </div><div class='del'>-    dependencies:</div><div class='del'>-      adi,current-rotate: [ "adi,rsense-share" ]</div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            adi,number-of-wires:</div><div class='add'>+              const: 4</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            adi,current-rotate:</div><div class='add'>+              description:</div><div class='add'>+                Whether to enable excitation current rotation to automatically</div><div class='add'>+                remove parasitic thermocouple effects.</div><div class='add'>+              type: boolean</div><div class='add'>+</div><div class='add'>+          dependencies:</div><div class='add'>+            adi,current-rotate: [ "adi,rsense-share" ]</div><div class='add'>+</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            adi,sensor-type:</div><div class='add'>+              const: 18</div><div class='add'>+        then:</div><div class='add'>+          required:</div><div class='add'>+            - adi,custom-rtd</div><div class='ctx'> </div><div class='ctx'>   "^thermistor@":</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Represents a thermistor sensor which is connected to one of the device</div><div class='del'>-      channels.</div><div class='add'>+    $ref: '#/$defs/sensor-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Thermistor sensor.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       adi,sensor-type:</div><div class='hunk'>@@ -277,61 +310,53 @@ patternProperties:</div><div class='ctx'>         maximum: 27</div><div class='ctx'> </div><div class='ctx'>       adi,rsense-handle:</div><div class='del'>-        description:</div><div class='del'>-          Phandle pointing to a rsense object associated with this</div><div class='del'>-          thermistor.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+        description: Associated sense resistor sensor.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>       adi,single-ended:</div><div class='del'>-        description:</div><div class='del'>-          Boolean property which set's the thermistor as single-ended.</div><div class='add'>+        description: Whether the sensor is single-ended.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,rsense-share:</div><div class='ctx'>         description:</div><div class='del'>-          Boolean property which enables Rsense sharing, where one sense</div><div class='del'>-          resistor is used for multiple thermistors. Note that this property</div><div class='del'>-          is ignored if adi,single-ended is set.</div><div class='add'>+          Whether to enable sense resistor sharing, where one sense</div><div class='add'>+          resistor is used by multiple sensors.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,current-rotate:</div><div class='ctx'>         description:</div><div class='del'>-          Boolean property which enables excitation current rotation to</div><div class='del'>-          automatically remove parasitic thermocouple effects.</div><div class='add'>+          Whether to enable excitation current rotation to automatically</div><div class='add'>+          remove parasitic thermocouple effects.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='ctx'>       adi,excitation-current-nanoamp:</div><div class='ctx'>         description:</div><div class='del'>-          This property controls the magnitude of the excitation current</div><div class='del'>-          applied to the thermistor. Value 0 set's the sensor in auto-range</div><div class='del'>-          mode.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+          Excitation current applied to the thermistor.</div><div class='add'>+          0 sets the sensor in auto-range mode.</div><div class='ctx'>         enum: [0, 250, 500, 1000, 5000, 10000, 25000, 50000, 100000, 250000,</div><div class='ctx'>                500000, 1000000]</div><div class='add'>+        default: 0</div><div class='ctx'> </div><div class='ctx'>       adi,custom-thermistor:</div><div class='ctx'>         description:</div><div class='del'>-          This is a table, where each entry should be a pair of</div><div class='del'>-          resistance(ohm)-temperature(K). The entries added here are in uohm</div><div class='del'>-          and uK only for custom thermistors. For more details look at table</div><div class='del'>-          78 and 79.</div><div class='add'>+          Used for digitizing custom thermistors.</div><div class='add'>+          See Page 65 of the datasheet.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint64-matrix</div><div class='ctx'>         minItems: 3</div><div class='ctx'>         maxItems: 64</div><div class='ctx'>         items:</div><div class='del'>-          minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - description: Resistance point in uOhms.</div><div class='add'>+            - description: Temperature point in uK.</div><div class='ctx'> </div><div class='ctx'>       adi,custom-steinhart:</div><div class='ctx'>         description:</div><div class='del'>-          Steinhart-Hart coefficients are also supported and can</div><div class='del'>-          be programmed into the device memory using this property. For</div><div class='del'>-          Steinhart sensors the coefficients are given in the raw</div><div class='del'>-          format. Look at table 82 for more information.</div><div class='add'>+          Steinhart-Hart coefficients in raw format, used for digitizing</div><div class='add'>+          custom thermistors.</div><div class='add'>+          See Page 68 of the datasheet.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        items:</div><div class='del'>-          minItems: 6</div><div class='del'>-          maxItems: 6</div><div class='add'>+        minItems: 6</div><div class='add'>+        maxItems: 6</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - adi,rsense-handle</div><div class='hunk'>@@ -339,25 +364,81 @@ patternProperties:</div><div class='ctx'>     dependencies:</div><div class='ctx'>       adi,current-rotate: [ "adi,rsense-share" ]</div><div class='ctx'> </div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            adi,sensor-type:</div><div class='add'>+              const: 26</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            adi,excitation-current-nanoamp:</div><div class='add'>+              enum: [250, 500, 1000, 5000, 10000, 25000, 50000, 100000,</div><div class='add'>+                     250000, 500000, 1000000]</div><div class='add'>+              default: 1000</div><div class='add'>+          required:</div><div class='add'>+            - adi,custom-steinhart</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            adi,sensor-type:</div><div class='add'>+              const: 27</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            adi,excitation-current-nanoamp:</div><div class='add'>+              enum: [250, 500, 1000, 5000, 10000, 25000, 50000, 100000,</div><div class='add'>+                     250000, 500000, 1000000]</div><div class='add'>+              default: 1000</div><div class='add'>+          required:</div><div class='add'>+            - adi,custom-thermistor</div><div class='add'>+</div><div class='ctx'>   "^adc@":</div><div class='del'>-    type: object</div><div class='del'>-    description: Represents a channel which is being used as a direct adc.</div><div class='add'>+    $ref: '#/$defs/sensor-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Direct ADC sensor.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       adi,sensor-type:</div><div class='del'>-        description: Identifies the sensor as a direct adc.</div><div class='add'>+        description: Sensor type for direct ADC sensors.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         const: 30</div><div class='ctx'> </div><div class='ctx'>       adi,single-ended:</div><div class='del'>-        description: Boolean property which set's the adc as single-ended.</div><div class='add'>+        description: Whether the sensor is single-ended.</div><div class='ctx'>         type: boolean</div><div class='ctx'> </div><div class='add'>+  "^temp@":</div><div class='add'>+    $ref: '#/$defs/sensor-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Active analog temperature sensor.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      adi,sensor-type:</div><div class='add'>+        description: Sensor type for active analog temperature sensors.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        const: 31</div><div class='add'>+</div><div class='add'>+      adi,single-ended:</div><div class='add'>+        description: Whether the sensor is single-ended.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+      adi,custom-temp:</div><div class='add'>+        description:</div><div class='add'>+          Used for digitizing active analog temperature sensors.</div><div class='add'>+          See Page 67 of the LTM2985 datasheet.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint64-matrix</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 64</div><div class='add'>+        items:</div><div class='add'>+          items:</div><div class='add'>+            - description: Voltage point in nV, signed.</div><div class='add'>+            - description: Temperature point in uK.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - adi,custom-temp</div><div class='add'>+</div><div class='ctx'>   "^rsense@":</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Represents a rsense which is connected to one of the device channels.</div><div class='del'>-      Rsense are used by thermistors and RTD's.</div><div class='add'>+    $ref: '#/$defs/sensor-node'</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Sense resistor sensor.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -365,14 +446,12 @@ patternProperties:</div><div class='ctx'>         maximum: 20</div><div class='ctx'> </div><div class='ctx'>       adi,sensor-type:</div><div class='del'>-        description: Identifies the sensor as a rsense.</div><div class='add'>+        description: Sensor type sense resistor sensors.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         const: 29</div><div class='ctx'> </div><div class='ctx'>       adi,rsense-val-milli-ohms:</div><div class='del'>-        description:</div><div class='del'>-          Sets the value of the sense resistor. Look at table 20 of the</div><div class='del'>-          datasheet for information.</div><div class='add'>+        description: Value of the sense resistor.</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - adi,rsense-val-milli-ohms</div><div class='hunk'>@@ -384,6 +463,18 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - adi,ltc2983</div><div class='add'>+              - adi,ltc2984</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^temp@": false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='hunk'>@@ -391,76 +482,75 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        sensor_ltc2983: ltc2983@0 {</div><div class='del'>-                compatible = "adi,ltc2983";</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                #address-cells = &lt;1&gt;;</div><div class='del'>-                #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                interrupts = &lt;20 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-</div><div class='del'>-                thermocouple@18 {</div><div class='del'>-                        reg = &lt;18&gt;;</div><div class='del'>-                        adi,sensor-type = &lt;8&gt;; //Type B</div><div class='del'>-                        adi,sensor-oc-current-microamp = &lt;10&gt;;</div><div class='del'>-                        adi,cold-junction-handle = &lt;&amp;diode5&gt;;</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                diode5: diode@5 {</div><div class='del'>-                        reg = &lt;5&gt;;</div><div class='del'>-                        adi,sensor-type = &lt;28&gt;;</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                rsense2: rsense@2 {</div><div class='del'>-                        reg = &lt;2&gt;;</div><div class='del'>-                        adi,sensor-type = &lt;29&gt;;</div><div class='del'>-                        adi,rsense-val-milli-ohms = &lt;1200000&gt;; //1.2Kohms</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                rtd@14 {</div><div class='del'>-                        reg = &lt;14&gt;;</div><div class='del'>-                        adi,sensor-type = &lt;15&gt;; //PT1000</div><div class='del'>-                        /*2-wire, internal gnd, no current rotation*/</div><div class='del'>-                        adi,number-of-wires = &lt;2&gt;;</div><div class='del'>-                        adi,rsense-share;</div><div class='del'>-                        adi,excitation-current-microamp = &lt;500&gt;;</div><div class='del'>-                        adi,rsense-handle = &lt;&amp;rsense2&gt;;</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                adc@10 {</div><div class='del'>-                        reg = &lt;10&gt;;</div><div class='del'>-                        adi,sensor-type = &lt;30&gt;;</div><div class='del'>-                        adi,single-ended;</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                thermistor@12 {</div><div class='del'>-                        reg = &lt;12&gt;;</div><div class='del'>-                        adi,sensor-type = &lt;26&gt;; //Steinhart</div><div class='del'>-                        adi,rsense-handle = &lt;&amp;rsense2&gt;;</div><div class='del'>-                        adi,custom-steinhart = &lt;0x00F371EC 0x12345678</div><div class='del'>-                                        0x2C0F8733 0x10018C66 0xA0FEACCD</div><div class='del'>-                                        0x90021D99&gt;; //6 entries</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                thermocouple@20 {</div><div class='del'>-                        reg = &lt;20&gt;;</div><div class='del'>-                        adi,sensor-type = &lt;9&gt;; //custom thermocouple</div><div class='del'>-                        adi,single-ended;</div><div class='del'>-                        adi,custom-thermocouple =</div><div class='del'>-                                 /bits/ 64 &lt;(-50220000) 0&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;(-30200000) 99100000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;(-5300000) 135400000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;0 273150000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;40200000 361200000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;55300000 522100000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;88300000 720300000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;132200000 811200000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;188700000 922500000&gt;,</div><div class='del'>-                                 /bits/ 64 &lt;460400000 1000000000&gt;; //10 pairs</div><div class='del'>-               };</div><div class='del'>-</div><div class='add'>+        temperature-sensor@0 {</div><div class='add'>+            compatible = "adi,ltc2983";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            interrupts = &lt;20 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+</div><div class='add'>+            thermocouple@18 {</div><div class='add'>+                reg = &lt;18&gt;;</div><div class='add'>+                adi,sensor-type = &lt;8&gt;; //Type B</div><div class='add'>+                adi,sensor-oc-current-microamp = &lt;10&gt;;</div><div class='add'>+                adi,cold-junction-handle = &lt;&amp;diode5&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            diode5: diode@5 {</div><div class='add'>+                reg = &lt;5&gt;;</div><div class='add'>+                adi,sensor-type = &lt;28&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rsense2: rsense@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                adi,sensor-type = &lt;29&gt;;</div><div class='add'>+                adi,rsense-val-milli-ohms = &lt;1200000&gt;; //1.2Kohms</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rtd@14 {</div><div class='add'>+                reg = &lt;14&gt;;</div><div class='add'>+                adi,sensor-type = &lt;15&gt;; //PT1000</div><div class='add'>+                /*2-wire, internal gnd, no current rotation*/</div><div class='add'>+                adi,number-of-wires = &lt;2&gt;;</div><div class='add'>+                adi,rsense-share;</div><div class='add'>+                adi,excitation-current-microamp = &lt;500&gt;;</div><div class='add'>+                adi,rsense-handle = &lt;&amp;rsense2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            adc@10 {</div><div class='add'>+                reg = &lt;10&gt;;</div><div class='add'>+                adi,sensor-type = &lt;30&gt;;</div><div class='add'>+                adi,single-ended;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            thermistor@12 {</div><div class='add'>+                reg = &lt;12&gt;;</div><div class='add'>+                adi,sensor-type = &lt;26&gt;; //Steinhart</div><div class='add'>+                adi,rsense-handle = &lt;&amp;rsense2&gt;;</div><div class='add'>+                adi,custom-steinhart = &lt;0x00f371ec 0x12345678</div><div class='add'>+                                0x2c0f8733 0x10018c66 0xa0feaccd</div><div class='add'>+                                0x90021d99&gt;; //6 entries</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            thermocouple@20 {</div><div class='add'>+                reg = &lt;20&gt;;</div><div class='add'>+                adi,sensor-type = &lt;9&gt;; //custom thermocouple</div><div class='add'>+                adi,single-ended;</div><div class='add'>+                adi,custom-thermocouple =</div><div class='add'>+                         /bits/ 64 &lt;(-50220000) 0&gt;,</div><div class='add'>+                         /bits/ 64 &lt;(-30200000) 99100000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;(-5300000) 135400000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;0 273150000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;40200000 361200000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;55300000 522100000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;88300000 720300000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;132200000 811200000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;188700000 922500000&gt;,</div><div class='add'>+                         /bits/ 64 &lt;460400000 1000000000&gt;; //10 pairs</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml b/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml<br/>index 9969bac66aa1..0805ed7e2113 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/temperature/maxim,max31855k.yaml</a></div><div class='hunk'>@@ -32,7 +32,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -40,6 +39,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -53,7 +53,7 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         spi-cpha: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml b/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml<br/>index 873b34766676..228a94165487 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/temperature/maxim,max31856.yaml</a></div><div class='hunk'>@@ -19,7 +19,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='ctx'>   thermocouple-type:</div><div class='hunk'>@@ -34,7 +33,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - spi-cpha</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml b/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml<br/>index aafb33b16549..7cc365e0ebc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/temperature/maxim,max31865.yaml</a></div><div class='hunk'>@@ -25,7 +25,6 @@ properties:</div><div class='ctx'>       enables 3-wire RTD connection. Else 2-wire or 4-wire RTD connection.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'>   spi-cpha: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -33,7 +32,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - spi-cpha</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -41,12 +43,12 @@ examples:</div><div class='ctx'>        #address-cells = &lt;1&gt;;</div><div class='ctx'>        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-       temp_sensor@0 {</div><div class='del'>-         compatible = "maxim,max31865";</div><div class='del'>-         reg = &lt;0&gt;;</div><div class='del'>-         spi-max-frequency = &lt;400000&gt;;</div><div class='del'>-         spi-cpha;</div><div class='del'>-         maxim,3-wire;</div><div class='add'>+       temperature-sensor@0 {</div><div class='add'>+           compatible = "maxim,max31865";</div><div class='add'>+           reg = &lt;0&gt;;</div><div class='add'>+           spi-max-frequency = &lt;400000&gt;;</div><div class='add'>+           spi-cpha;</div><div class='add'>+           maxim,3-wire;</div><div class='ctx'>        };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml b/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml<br/>index b547ddcd544a..4a55e7f25ae7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/temperature/melexis,mlx90632.yaml</a></div><div class='hunk'>@@ -35,6 +35,9 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: Default is 0x3a, but can be reprogrammed.</div><div class='ctx'> </div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: provide VDD power to the sensor.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -50,6 +53,7 @@ examples:</div><div class='ctx'>         temp-sensor@3a {</div><div class='ctx'>             compatible = "melexis,mlx90632";</div><div class='ctx'>             reg = &lt;0x3a&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;ldo4_reg&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml b/Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml<br/>index 347bc16a4671..8c6d7735e875 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iio/temperature/ti,tmp117.yaml</a></div><div class='hunk'>@@ -1,15 +1,16 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/iio/temperature/ti,tmp117.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/iio/temperature/ti,tmp117.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: "TI TMP117 - Digital temperature sensor with integrated NV memory"</div><div class='add'>+title: TI TMP117 - Digital temperature sensor with integrated NV memory</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-    TI TMP117 - Digital temperature sensor with integrated NV memory that supports</div><div class='del'>-    I2C interface.</div><div class='del'>-      https://www.ti.com/lit/gpn/tmp1</div><div class='add'>+    TI TMP116/117 - Digital temperature sensor with integrated NV memory that</div><div class='add'>+    supports I2C interface.</div><div class='add'>+      https://www.ti.com/lit/gpn/tmp116</div><div class='add'>+      https://www.ti.com/lit/gpn/tmp117</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Puranjay Mohan &lt;puranjay12@gmail.com&gt;</div><div class='hunk'>@@ -17,6 +18,7 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - ti,tmp116</div><div class='ctx'>       - ti,tmp117</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/adc-joystick.yaml b/Documentation/devicetree/bindings/input/adc-joystick.yaml<br/>index 2ee04e03bc22..6c244d66f8ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/adc-joystick.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/adc-joystick.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/adc-joystick.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/adc-joystick.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019-2020 Artur Rojek</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/input/adc-joystick.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/input/adc-joystick.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: ADC attached joystick</div><div class='ctx'> </div><div class='hunk'>@@ -14,6 +14,9 @@ description: &gt;</div><div class='ctx'>   Bindings for joystick devices connected to ADC controllers supporting</div><div class='ctx'>   the Industrial I/O subsystem.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: adc-joystick</div><div class='hunk'>@@ -28,6 +31,8 @@ properties:</div><div class='ctx'>       https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml</div><div class='ctx'>       for details.</div><div class='ctx'> </div><div class='add'>+  poll-interval: true</div><div class='add'>+</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -45,6 +50,7 @@ additionalProperties: false</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^axis@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    $ref: input.yaml#</div><div class='ctx'>     description: &gt;</div><div class='ctx'>       Represents a joystick axis bound to the given ADC channel.</div><div class='ctx'>       For each entry in the io-channels list, one axis subnode with a matching</div><div class='hunk'>@@ -57,7 +63,6 @@ patternProperties:</div><div class='ctx'>         description: Index of an io-channels list entry bound to this axis.</div><div class='ctx'> </div><div class='ctx'>       linux,code:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         description: EV_ABS specific event code generated by the axis.</div><div class='ctx'> </div><div class='ctx'>       abs-range:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/adc-keys.txt b/Documentation/devicetree/bindings/input/adc-keys.txt<br/>deleted file mode 100644<br/>index 6c8be6a9ace2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/adc-keys.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/adc-keys.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,67 +0,0 @@</div><div class='del'>-ADC attached resistor ladder buttons</div><div class='del'>-------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: "adc-keys"</div><div class='del'>- - io-channels: Phandle to an ADC channel</div><div class='del'>- - io-channel-names = "buttons";</div><div class='del'>- - keyup-threshold-microvolt: Voltage above or equal to which all the keys are</div><div class='del'>-			      considered up.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- poll-interval: Poll interval time in milliseconds</div><div class='del'>-	- autorepeat: Boolean, Enable auto repeat feature of Linux input</div><div class='del'>-	  subsystem.</div><div class='del'>-</div><div class='del'>-Each button (key) is represented as a sub-node of "adc-keys":</div><div class='del'>-</div><div class='del'>-Required subnode-properties:</div><div class='del'>-	- label: Descriptive name of the key.</div><div class='del'>-	- linux,code: Keycode to emit.</div><div class='del'>-	- press-threshold-microvolt: voltage above or equal to which this key is</div><div class='del'>-				     considered pressed.</div><div class='del'>-</div><div class='del'>-No two values of press-threshold-microvolt may be the same.</div><div class='del'>-All values of press-threshold-microvolt must be less than</div><div class='del'>-keyup-threshold-microvolt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-</div><div class='del'>-	adc-keys {</div><div class='del'>-		compatible = "adc-keys";</div><div class='del'>-		io-channels = &lt;&amp;lradc 0&gt;;</div><div class='del'>-		io-channel-names = "buttons";</div><div class='del'>-		keyup-threshold-microvolt = &lt;2000000&gt;;</div><div class='del'>-</div><div class='del'>-		button-up {</div><div class='del'>-			label = "Volume Up";</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='del'>-			press-threshold-microvolt = &lt;1500000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		button-down {</div><div class='del'>-			label = "Volume Down";</div><div class='del'>-			linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='del'>-			press-threshold-microvolt = &lt;1000000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		button-enter {</div><div class='del'>-			label = "Enter";</div><div class='del'>-			linux,code = &lt;KEY_ENTER&gt;;</div><div class='del'>-			press-threshold-microvolt = &lt;500000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-+--------------------------------+------------------------+</div><div class='del'>-| 2.000.000 &lt;= value             | no key pressed         |</div><div class='del'>-+--------------------------------+------------------------+</div><div class='del'>-| 1.500.000 &lt;= value &lt; 2.000.000 | KEY_VOLUMEUP pressed   |</div><div class='del'>-+--------------------------------+------------------------+</div><div class='del'>-| 1.000.000 &lt;= value &lt; 1.500.000 | KEY_VOLUMEDOWN pressed |</div><div class='del'>-+--------------------------------+------------------------+</div><div class='del'>-|   500.000 &lt;= value &lt; 1.000.000 | KEY_ENTER pressed      |</div><div class='del'>-+--------------------------------+------------------------+</div><div class='del'>-|              value &lt;   500.000 | no key pressed         |</div><div class='del'>-+--------------------------------+------------------------+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/adc-keys.yaml b/Documentation/devicetree/bindings/input/adc-keys.yaml<br/>new file mode 100644<br/>index 000000000000..7aa078dead37<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/adc-keys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/adc-keys.yaml</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/adc-keys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ADC attached resistor ladder buttons</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: adc-keys</div><div class='add'>+</div><div class='add'>+  io-channels:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  io-channel-names:</div><div class='add'>+    const: buttons</div><div class='add'>+</div><div class='add'>+  keyup-threshold-microvolt:</div><div class='add'>+    description:</div><div class='add'>+      Voltage above or equal to which all the keys are considered up.</div><div class='add'>+</div><div class='add'>+  poll-interval: true</div><div class='add'>+  autorepeat: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^button-':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: input.yaml#</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Each button (key) is represented as a sub-node.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      label: true</div><div class='add'>+</div><div class='add'>+      linux,code: true</div><div class='add'>+</div><div class='add'>+      press-threshold-microvolt:</div><div class='add'>+        description:</div><div class='add'>+          Voltage above or equal to which this key is considered pressed. No</div><div class='add'>+          two values of press-threshold-microvolt may be the same. All values</div><div class='add'>+          of press-threshold-microvolt must be less than</div><div class='add'>+          keyup-threshold-microvolt.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - linux,code</div><div class='add'>+      - press-threshold-microvolt</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - io-channels</div><div class='add'>+  - io-channel-names</div><div class='add'>+  - keyup-threshold-microvolt</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+    // +--------------------------------+------------------------+</div><div class='add'>+    // | 2.000.000 &lt;= value             | no key pressed         |</div><div class='add'>+    // +--------------------------------+------------------------+</div><div class='add'>+    // | 1.500.000 &lt;= value &lt; 2.000.000 | KEY_VOLUMEUP pressed   |</div><div class='add'>+    // +--------------------------------+------------------------+</div><div class='add'>+    // | 1.000.000 &lt;= value &lt; 1.500.000 | KEY_VOLUMEDOWN pressed |</div><div class='add'>+    // +--------------------------------+------------------------+</div><div class='add'>+    // |   500.000 &lt;= value &lt; 1.000.000 | KEY_ENTER pressed      |</div><div class='add'>+    // +--------------------------------+------------------------+</div><div class='add'>+    // |              value &lt;   500.000 | no key pressed         |</div><div class='add'>+    // +--------------------------------+------------------------+</div><div class='add'>+</div><div class='add'>+    adc-keys {</div><div class='add'>+        compatible = "adc-keys";</div><div class='add'>+        io-channels = &lt;&amp;lradc 0&gt;;</div><div class='add'>+        io-channel-names = "buttons";</div><div class='add'>+        keyup-threshold-microvolt = &lt;2000000&gt;;</div><div class='add'>+</div><div class='add'>+        button-up {</div><div class='add'>+            label = "Volume Up";</div><div class='add'>+            linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+            press-threshold-microvolt = &lt;1500000&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        button-down {</div><div class='add'>+            label = "Volume Down";</div><div class='add'>+            linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+            press-threshold-microvolt = &lt;1000000&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        button-enter {</div><div class='add'>+            label = "Enter";</div><div class='add'>+            linux,code = &lt;KEY_ENTER&gt;;</div><div class='add'>+            press-threshold-microvolt = &lt;500000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/adi,adp5588.yaml b/Documentation/devicetree/bindings/input/adi,adp5588.yaml<br/>new file mode 100644<br/>index 000000000000..26ea66834ae2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/adi,adp5588.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/adi,adp5588.yaml</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/adi,adp5588.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices ADP5588 Keypad Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nuno Sá &lt;nuno.sa@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Analog Devices Mobile I/O Expander and QWERTY Keypad Controller</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/ADP5588.pdf</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: matrix-keymap.yaml#</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,adp5587</div><div class='add'>+      - adi,adp5588</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description: Supply Voltage Input</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      If specified, it will be asserted during driver probe. As the line is</div><div class='add'>+      active low, it should be marked GPIO_ACTIVE_LOW.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller:</div><div class='add'>+    description:</div><div class='add'>+      This property applies if either keypad,num-rows lower than 8 or</div><div class='add'>+      keypad,num-columns lower than 10.</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller:</div><div class='add'>+    description:</div><div class='add'>+      This property applies if either keypad,num-rows lower than 8 or</div><div class='add'>+      keypad,num-columns lower than 10.</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  adi,unlock-keys:</div><div class='add'>+    description:</div><div class='add'>+      Specifies a maximum of 2 keys that can be used to unlock the keypad.</div><div class='add'>+      If this property is set, the keyboard will be locked and only unlocked</div><div class='add'>+      after these keys are pressed. If only one key is set, a double click is</div><div class='add'>+      needed to unlock the keypad. The value of this property cannot be bigger</div><div class='add'>+      or equal than keypad,num-rows * keypad,num-columns.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - keypad,num-rows</div><div class='add'>+  - keypad,num-columns</div><div class='add'>+  - linux,keymap</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        keys@34 {</div><div class='add'>+            compatible = "adi,adp5588";</div><div class='add'>+            reg = &lt;0x34&gt;;</div><div class='add'>+</div><div class='add'>+            vcc-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+            interrupts = &lt;21 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            keypad,num-rows = &lt;1&gt;;</div><div class='add'>+            keypad,num-columns = &lt;9&gt;;</div><div class='add'>+            linux,keymap = &lt;</div><div class='add'>+                MATRIX_KEY(0x00, 0x00, KEY_1)</div><div class='add'>+                MATRIX_KEY(0x00, 0x01, KEY_2)</div><div class='add'>+                MATRIX_KEY(0x00, 0x02, KEY_3)</div><div class='add'>+                MATRIX_KEY(0x00, 0x03, KEY_4)</div><div class='add'>+                MATRIX_KEY(0x00, 0x04, KEY_5)</div><div class='add'>+                MATRIX_KEY(0x00, 0x05, KEY_6)</div><div class='add'>+                MATRIX_KEY(0x00, 0x06, KEY_7)</div><div class='add'>+                MATRIX_KEY(0x00, 0x07, KEY_8)</div><div class='add'>+                MATRIX_KEY(0x00, 0x08, KEY_9)</div><div class='add'>+            &gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml<br/>index d74f2002409e..5efceb313879 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/allwinner,sun4i-a10-lradc-keys.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 LRADC Device Tree Bindings</div><div class='add'>+title: Allwinner A10 LRADC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -16,12 +16,24 @@ properties:</div><div class='ctx'>       - const: allwinner,sun4i-a10-lradc-keys</div><div class='ctx'>       - const: allwinner,sun8i-a83t-r-lradc</div><div class='ctx'>       - items:</div><div class='del'>-          - const: allwinner,sun50i-a64-lradc</div><div class='add'>+          - enum:</div><div class='add'>+              - allwinner,suniv-f1c100s-lradc</div><div class='add'>+              - allwinner,sun50i-a64-lradc</div><div class='ctx'>           - const: allwinner,sun8i-a83t-r-lradc</div><div class='add'>+      - const: allwinner,sun50i-r329-lradc</div><div class='add'>+      - items:</div><div class='add'>+          - const: allwinner,sun20i-d1-lradc</div><div class='add'>+          - const: allwinner,sun50i-r329-lradc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -34,14 +46,13 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^button-[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    $ref: input.yaml#</div><div class='ctx'>     properties:</div><div class='ctx'>       label:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         description: Descriptive name of the key</div><div class='ctx'> </div><div class='del'>-      linux,code:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: Keycode to emit</div><div class='add'>+      linux,code: true</div><div class='ctx'> </div><div class='ctx'>       channel:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='hunk'>@@ -68,6 +79,18 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - vref-supply</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - allwinner,sun50i-r329-lradc</div><div class='add'>+</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - clocks</div><div class='add'>+    - resets</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml b/Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml<br/>index b4ad829d7383..442f623bb294 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/ariel-pwrbutton.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: input.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml b/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml<br/>new file mode 100644<br/>index 000000000000..9ddba7f2e7aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/azoteq,iqs7222.yaml</a></div><div class='hunk'>@@ -0,0 +1,950 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/azoteq,iqs7222.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Azoteq IQS7222A/B/C Capacitive Touch Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jeff LaBundy &lt;jeff@labundy.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Azoteq IQS7222A, IQS7222B and IQS7222C are multichannel capacitive touch</div><div class='add'>+  controllers that feature additional sensing capabilities.</div><div class='add'>+</div><div class='add'>+  Link to datasheets: https://www.azoteq.com/</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - azoteq,iqs7222a</div><div class='add'>+      - azoteq,iqs7222b</div><div class='add'>+      - azoteq,iqs7222c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  irq-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Specifies the GPIO connected to the device's active-low RDY output.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Specifies the GPIO connected to the device's active-low MCLR input. The</div><div class='add'>+      device is temporarily held in hardware reset prior to initialization if</div><div class='add'>+      this property is present.</div><div class='add'>+</div><div class='add'>+  azoteq,max-counts:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1, 2, 3]</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the maximum number of conversion periods (counts) that can be</div><div class='add'>+      reported as follows:</div><div class='add'>+      0: 1023</div><div class='add'>+      1: 2047</div><div class='add'>+      2: 4095</div><div class='add'>+      3: 16384</div><div class='add'>+</div><div class='add'>+  azoteq,auto-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1, 2, 3]</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the number of conversions to occur before an interrupt is</div><div class='add'>+      generated as follows:</div><div class='add'>+      0: 4</div><div class='add'>+      1: 8</div><div class='add'>+      2: 16</div><div class='add'>+      3: 32</div><div class='add'>+</div><div class='add'>+  azoteq,ati-frac-div-fine:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 31</div><div class='add'>+    description: Specifies the preloaded ATI fine fractional divider.</div><div class='add'>+</div><div class='add'>+  azoteq,ati-frac-div-coarse:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 31</div><div class='add'>+    description: Specifies the preloaded ATI coarse fractional divider.</div><div class='add'>+</div><div class='add'>+  azoteq,ati-comp-select:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1023</div><div class='add'>+    description: Specifies the preloaded ATI compensation selection.</div><div class='add'>+</div><div class='add'>+  azoteq,lta-beta-lp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    description:</div><div class='add'>+      Specifies the long-term average filter damping factor to be applied during</div><div class='add'>+      low-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,lta-beta-np:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    description:</div><div class='add'>+      Specifies the long-term average filter damping factor to be applied during</div><div class='add'>+      normal-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,counts-beta-lp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    description:</div><div class='add'>+      Specifies the counts filter damping factor to be applied during low-power</div><div class='add'>+      mode.</div><div class='add'>+</div><div class='add'>+  azoteq,counts-beta-np:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    description:</div><div class='add'>+      Specifies the counts filter damping factor to be applied during normal-</div><div class='add'>+      power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,lta-fast-beta-lp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    description:</div><div class='add'>+      Specifies the long-term average filter fast damping factor to be applied</div><div class='add'>+      during low-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,lta-fast-beta-np:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    description:</div><div class='add'>+      Specifies the long-term average filter fast damping factor to be applied</div><div class='add'>+      during normal-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,timeout-ati-ms:</div><div class='add'>+    multipleOf: 500</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 32767500</div><div class='add'>+    description:</div><div class='add'>+      Specifies the delay (in ms) before ATI is retried following an ATI error.</div><div class='add'>+</div><div class='add'>+  azoteq,rate-ati-ms:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 65535</div><div class='add'>+    description: Specifies the rate (in ms) at which ATI status is evaluated.</div><div class='add'>+</div><div class='add'>+  azoteq,timeout-np-ms:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 65535</div><div class='add'>+    description:</div><div class='add'>+      Specifies the length of time (in ms) to wait for an event before moving</div><div class='add'>+      from normal-power mode to low-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,rate-np-ms:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3000</div><div class='add'>+    description: Specifies the report rate (in ms) during normal-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,timeout-lp-ms:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 65535</div><div class='add'>+    description:</div><div class='add'>+      Specifies the length of time (in ms) to wait for an event before moving</div><div class='add'>+      from low-power mode to ultra-low-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,rate-lp-ms:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3000</div><div class='add'>+    description: Specifies the report rate (in ms) during low-power mode.</div><div class='add'>+</div><div class='add'>+  azoteq,timeout-ulp-ms:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 65535</div><div class='add'>+    description:</div><div class='add'>+      Specifies the rate (in ms) at which channels not regularly sampled during</div><div class='add'>+      ultra-low-power mode are updated.</div><div class='add'>+</div><div class='add'>+  azoteq,rate-ulp-ms:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3000</div><div class='add'>+    description: Specifies the report rate (in ms) during ultra-low-power mode.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^cycle-[0-9]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: Represents a conversion cycle serving two sensing channels.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      azoteq,conv-period:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 255</div><div class='add'>+        description: Specifies the cycle's conversion period.</div><div class='add'>+</div><div class='add'>+      azoteq,conv-frac:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 255</div><div class='add'>+        description: Specifies the cycle's conversion frequency fraction.</div><div class='add'>+</div><div class='add'>+      azoteq,tx-enable:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 9</div><div class='add'>+        items:</div><div class='add'>+          minimum: 0</div><div class='add'>+          maximum: 8</div><div class='add'>+        description: Specifies the CTx pin(s) associated with the cycle.</div><div class='add'>+</div><div class='add'>+      azoteq,rx-float-inactive:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Floats any inactive CRx pins instead of grounding them.</div><div class='add'>+</div><div class='add'>+      azoteq,dead-time-enable:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Increases the denominator of the conversion frequency formula by one.</div><div class='add'>+</div><div class='add'>+      azoteq,tx-freq-fosc:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Fixes the conversion frequency to that of the device's core clock.</div><div class='add'>+</div><div class='add'>+      azoteq,vbias-enable:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Enables the bias voltage for use during inductive sensing.</div><div class='add'>+</div><div class='add'>+      azoteq,sense-mode:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        description: |</div><div class='add'>+          Specifies the cycle's sensing mode as follows:</div><div class='add'>+          0: None</div><div class='add'>+          1: Self capacitive</div><div class='add'>+          2: Mutual capacitive</div><div class='add'>+          3: Inductive</div><div class='add'>+</div><div class='add'>+          Note that in the case of IQS7222A, cycles 5 and 6 are restricted to</div><div class='add'>+          Hall-effect sensing.</div><div class='add'>+</div><div class='add'>+      azoteq,iref-enable:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Enables the current reference for use during various sensing modes.</div><div class='add'>+</div><div class='add'>+      azoteq,iref-level:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+        description: Specifies the cycle's current reference level.</div><div class='add'>+</div><div class='add'>+      azoteq,iref-trim:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+        description: Specifies the cycle's current reference trim.</div><div class='add'>+</div><div class='add'>+    dependencies:</div><div class='add'>+      azoteq,iref-level: ["azoteq,iref-enable"]</div><div class='add'>+      azoteq,iref-trim: ["azoteq,iref-enable"]</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  "^channel-([0-9]|1[0-9])$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Represents a single sensing channel. A channel is active if defined and</div><div class='add'>+      inactive otherwise.</div><div class='add'>+</div><div class='add'>+      Note that in the case of IQS7222A, channels 10 and 11 are restricted to</div><div class='add'>+      Hall-effect sensing with events reported on channel 10 only.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      azoteq,ulp-allow:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Permits the device to enter ultra-low-power mode while the channel</div><div class='add'>+          lies in a state of touch or proximity.</div><div class='add'>+</div><div class='add'>+      azoteq,ref-select:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 9</div><div class='add'>+        description: Specifies a separate reference channel to be followed.</div><div class='add'>+</div><div class='add'>+      azoteq,ref-weight:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 65535</div><div class='add'>+        description: Specifies the relative weight of the reference channel.</div><div class='add'>+</div><div class='add'>+      azoteq,use-prox:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Activates the reference channel in response to proximity events</div><div class='add'>+          instead of touch events.</div><div class='add'>+</div><div class='add'>+      azoteq,ati-band:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        description: |</div><div class='add'>+          Specifies the channel's ATI band as a fraction of its ATI target as</div><div class='add'>+          follows:</div><div class='add'>+          0: 1/16</div><div class='add'>+          1: 1/8</div><div class='add'>+          2: 1/4</div><div class='add'>+          3: 1/2</div><div class='add'>+</div><div class='add'>+      azoteq,global-halt:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Specifies that the channel's long-term average is to freeze if any</div><div class='add'>+          other participating channel lies in a proximity or touch state.</div><div class='add'>+</div><div class='add'>+      azoteq,invert-enable:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Inverts the polarity of the states reported for proximity and touch</div><div class='add'>+          events relative to their respective thresholds.</div><div class='add'>+</div><div class='add'>+      azoteq,dual-direction:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Specifies that the channel's long-term average is to freeze in the</div><div class='add'>+          presence of either increasing or decreasing counts, thereby permit-</div><div class='add'>+          ting events to be reported in either direction.</div><div class='add'>+</div><div class='add'>+      azoteq,rx-enable:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 4</div><div class='add'>+        items:</div><div class='add'>+          minimum: 0</div><div class='add'>+          maximum: 7</div><div class='add'>+        description: Specifies the CRx pin(s) associated with the channel.</div><div class='add'>+</div><div class='add'>+      azoteq,samp-cap-double:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Doubles the sampling capacitance from 40 pF to 80 pF.</div><div class='add'>+</div><div class='add'>+      azoteq,vref-half:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Halves the discharge threshold from 1.0 V to 0.5 V.</div><div class='add'>+</div><div class='add'>+      azoteq,proj-bias:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        description: |</div><div class='add'>+          Specifies the bias current applied during mutual (projected)</div><div class='add'>+          capacitive sensing as follows:</div><div class='add'>+          0: 2 uA</div><div class='add'>+          1: 5 uA</div><div class='add'>+          2: 7 uA</div><div class='add'>+          3: 10 uA</div><div class='add'>+</div><div class='add'>+      azoteq,ati-target:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        multipleOf: 8</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 2040</div><div class='add'>+        description: Specifies the channel's ATI target.</div><div class='add'>+</div><div class='add'>+      azoteq,ati-base:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        multipleOf: 16</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 496</div><div class='add'>+        description: Specifies the channel's ATI base.</div><div class='add'>+</div><div class='add'>+      azoteq,ati-mode:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2, 3, 4, 5]</div><div class='add'>+        description: |</div><div class='add'>+          Specifies the channel's ATI mode as follows:</div><div class='add'>+          0: Disabled</div><div class='add'>+          1: Compensation</div><div class='add'>+          2: Compensation divider</div><div class='add'>+          3: Fine fractional divider</div><div class='add'>+          4: Coarse fractional divider</div><div class='add'>+          5: Full</div><div class='add'>+</div><div class='add'>+      azoteq,ati-frac-div-fine:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 31</div><div class='add'>+        description: Specifies the channel's ATI fine fractional divider.</div><div class='add'>+</div><div class='add'>+      azoteq,ati-frac-mult-coarse:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+        description: Specifies the channel's ATI coarse fractional multiplier.</div><div class='add'>+</div><div class='add'>+      azoteq,ati-frac-div-coarse:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 31</div><div class='add'>+        description: Specifies the channel's ATI coarse fractional divider.</div><div class='add'>+</div><div class='add'>+      azoteq,ati-comp-div:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 31</div><div class='add'>+        description: Specifies the channel's ATI compensation divider.</div><div class='add'>+</div><div class='add'>+      azoteq,ati-comp-select:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1023</div><div class='add'>+        description: Specifies the channel's ATI compensation selection.</div><div class='add'>+</div><div class='add'>+      azoteq,debounce-enter:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+        description: Specifies the channel's debounce entrance factor.</div><div class='add'>+</div><div class='add'>+      azoteq,debounce-exit:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+        description: Specifies the channel's debounce exit factor.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^event-(prox|touch)$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: input.yaml#</div><div class='add'>+        description:</div><div class='add'>+          Represents a proximity or touch event reported by the channel.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          azoteq,gpio-select:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 3</div><div class='add'>+            items:</div><div class='add'>+              minimum: 0</div><div class='add'>+              maximum: 2</div><div class='add'>+            description: |</div><div class='add'>+              Specifies one or more GPIO mapped to the event as follows:</div><div class='add'>+              0: GPIO0</div><div class='add'>+              1: GPIO3 (IQS7222C only)</div><div class='add'>+              2: GPIO4 (IQS7222C only)</div><div class='add'>+</div><div class='add'>+              Note that although multiple events can be mapped to a single</div><div class='add'>+              GPIO, they must all be of the same type (proximity, touch or</div><div class='add'>+              slider gesture).</div><div class='add'>+</div><div class='add'>+          azoteq,thresh:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description:</div><div class='add'>+              Specifies the threshold for the event. Valid entries range from</div><div class='add'>+              0-127 and 0-255 for proximity and touch events, respectively.</div><div class='add'>+</div><div class='add'>+          azoteq,hyst:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 255</div><div class='add'>+            description:</div><div class='add'>+              Specifies the hysteresis for the event (touch events only).</div><div class='add'>+</div><div class='add'>+          azoteq,timeout-press-ms:</div><div class='add'>+            multipleOf: 500</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 127500</div><div class='add'>+            description:</div><div class='add'>+              Specifies the length of time (in ms) to wait before automatically</div><div class='add'>+              releasing a press event. Specify zero to allow the press state to</div><div class='add'>+              persist indefinitely.</div><div class='add'>+</div><div class='add'>+              The IQS7222B does not feature channel-specific timeouts; the time-</div><div class='add'>+              out specified for any one channel applies to all channels.</div><div class='add'>+</div><div class='add'>+          linux,code: true</div><div class='add'>+</div><div class='add'>+          linux,input-type:</div><div class='add'>+            enum: [1, 5]</div><div class='add'>+            default: 1</div><div class='add'>+            description:</div><div class='add'>+              Specifies whether the event is to be interpreted as a key (1)</div><div class='add'>+              or a switch (5).</div><div class='add'>+</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+    dependencies:</div><div class='add'>+      azoteq,ref-weight: ["azoteq,ref-select"]</div><div class='add'>+      azoteq,use-prox: ["azoteq,ref-select"]</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  "^slider-[0-1]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: Represents a slider comprising three or four channels.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      azoteq,channel-select:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 4</div><div class='add'>+        items:</div><div class='add'>+          minimum: 0</div><div class='add'>+          maximum: 9</div><div class='add'>+        description:</div><div class='add'>+          Specifies the order of the channels that participate in the slider.</div><div class='add'>+</div><div class='add'>+      azoteq,slider-size:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 1</div><div class='add'>+        maximum: 65535</div><div class='add'>+        description:</div><div class='add'>+          Specifies the slider's one-dimensional resolution, equal to the</div><div class='add'>+          maximum coordinate plus one.</div><div class='add'>+</div><div class='add'>+      azoteq,lower-cal:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 255</div><div class='add'>+        description: Specifies the slider's lower starting point.</div><div class='add'>+</div><div class='add'>+      azoteq,upper-cal:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 255</div><div class='add'>+        description: Specifies the slider's upper starting point.</div><div class='add'>+</div><div class='add'>+      azoteq,top-speed:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 65535</div><div class='add'>+        description:</div><div class='add'>+          Specifies the speed of movement after which coordinate filtering is</div><div class='add'>+          no longer applied.</div><div class='add'>+</div><div class='add'>+      azoteq,bottom-speed:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 255</div><div class='add'>+        description:</div><div class='add'>+          Specifies the speed of movement after which coordinate filtering is</div><div class='add'>+          linearly reduced.</div><div class='add'>+</div><div class='add'>+      azoteq,bottom-beta:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+        description:</div><div class='add'>+          Specifies the coordinate filter damping factor to be applied</div><div class='add'>+          while the speed of movement is below that which is specified</div><div class='add'>+          by azoteq,bottom-speed.</div><div class='add'>+</div><div class='add'>+      azoteq,static-beta:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Applies the coordinate filter damping factor specified by</div><div class='add'>+          azoteq,bottom-beta regardless of the speed of movement.</div><div class='add'>+</div><div class='add'>+      azoteq,use-prox:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Directs the slider to respond to the proximity states of the selected</div><div class='add'>+          channels instead of their corresponding touch states. Note the slider</div><div class='add'>+          cannot report granular coordinates during a state of proximity.</div><div class='add'>+</div><div class='add'>+      linux,axis:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          Specifies the absolute axis to which coordinates are mapped. Specify</div><div class='add'>+          ABS_WHEEL to operate the slider as a wheel (IQS7222C only).</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^event-(press|tap|(swipe|flick)-(pos|neg))$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: input.yaml#</div><div class='add'>+        description:</div><div class='add'>+          Represents a press or gesture (IQS7222A only) event reported by</div><div class='add'>+          the slider.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          linux,code: true</div><div class='add'>+</div><div class='add'>+          azoteq,gesture-max-ms:</div><div class='add'>+            multipleOf: 16</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 4080</div><div class='add'>+            description:</div><div class='add'>+              Specifies the length of time (in ms) within which a tap, swipe</div><div class='add'>+              or flick gesture must be completed in order to be acknowledged</div><div class='add'>+              by the device. The number specified for any one swipe or flick</div><div class='add'>+              gesture applies to all remaining swipe or flick gestures.</div><div class='add'>+</div><div class='add'>+          azoteq,gesture-min-ms:</div><div class='add'>+            multipleOf: 16</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 496</div><div class='add'>+            description:</div><div class='add'>+              Specifies the length of time (in ms) for which a tap gesture must</div><div class='add'>+              be held in order to be acknowledged by the device.</div><div class='add'>+</div><div class='add'>+          azoteq,gesture-dist:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            multipleOf: 16</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 4080</div><div class='add'>+            description:</div><div class='add'>+              Specifies the distance across which a swipe or flick gesture must</div><div class='add'>+              travel in order to be acknowledged by the device. The number spec-</div><div class='add'>+              ified for any one swipe or flick gesture applies to all remaining</div><div class='add'>+              swipe or flick gestures.</div><div class='add'>+</div><div class='add'>+          azoteq,gpio-select:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 3</div><div class='add'>+            items:</div><div class='add'>+              minimum: 0</div><div class='add'>+              maximum: 2</div><div class='add'>+            description: |</div><div class='add'>+              Specifies one or more GPIO mapped to the event as follows:</div><div class='add'>+              0: GPIO0</div><div class='add'>+              1: GPIO3 (IQS7222C only)</div><div class='add'>+              2: GPIO4 (IQS7222C only)</div><div class='add'>+</div><div class='add'>+              Note that although multiple events can be mapped to a single</div><div class='add'>+              GPIO, they must all be of the same type (proximity, touch or</div><div class='add'>+              slider gesture).</div><div class='add'>+</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - azoteq,channel-select</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  "^gpio-[0-2]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      Represents a GPIO mapped to one or more events as follows:</div><div class='add'>+      gpio-0: GPIO0</div><div class='add'>+      gpio-1: GPIO3 (IQS7222C only)</div><div class='add'>+      gpio-2: GPIO4 (IQS7222C only)</div><div class='add'>+</div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: ../pinctrl/pincfg-node.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      drive-open-drain: true</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: azoteq,iqs7222b</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^cycle-[0-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            azoteq,iref-enable: false</div><div class='add'>+</div><div class='add'>+        "^channel-([0-9]|1[0-9])$":</div><div class='add'>+          properties:</div><div class='add'>+            azoteq,ref-select: false</div><div class='add'>+</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^event-(prox|touch)$":</div><div class='add'>+              properties:</div><div class='add'>+                azoteq,gpio-select: false</div><div class='add'>+</div><div class='add'>+        "^slider-[0-1]$": false</div><div class='add'>+</div><div class='add'>+        "^gpio-[0-2]$": false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: azoteq,iqs7222a</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel-([0-9]|1[0-9])$":</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^event-(prox|touch)$":</div><div class='add'>+              properties:</div><div class='add'>+                azoteq,gpio-select:</div><div class='add'>+                  maxItems: 1</div><div class='add'>+                  items:</div><div class='add'>+                    maximum: 0</div><div class='add'>+</div><div class='add'>+        "^slider-[0-1]$":</div><div class='add'>+          properties:</div><div class='add'>+            azoteq,slider-size:</div><div class='add'>+              multipleOf: 16</div><div class='add'>+              minimum: 16</div><div class='add'>+              maximum: 4080</div><div class='add'>+</div><div class='add'>+            azoteq,top-speed:</div><div class='add'>+              multipleOf: 4</div><div class='add'>+              maximum: 1020</div><div class='add'>+</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^event-(press|tap|(swipe|flick)-(pos|neg))$":</div><div class='add'>+              properties:</div><div class='add'>+                azoteq,gpio-select:</div><div class='add'>+                  maxItems: 1</div><div class='add'>+                  items:</div><div class='add'>+                    maximum: 0</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel-([0-9]|1[0-9])$":</div><div class='add'>+          properties:</div><div class='add'>+            azoteq,ulp-allow: false</div><div class='add'>+</div><div class='add'>+        "^slider-[0-1]$":</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^event-(press|tap|(swipe|flick)-(pos|neg))$":</div><div class='add'>+              properties:</div><div class='add'>+                azoteq,gesture-max-ms: false</div><div class='add'>+</div><div class='add'>+                azoteq,gesture-min-ms: false</div><div class='add'>+</div><div class='add'>+                azoteq,gesture-dist: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - irq-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            iqs7222a@44 {</div><div class='add'>+                    compatible = "azoteq,iqs7222a";</div><div class='add'>+                    reg = &lt;0x44&gt;;</div><div class='add'>+                    irq-gpios = &lt;&amp;gpio 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+                    azoteq,lta-beta-lp = &lt;7&gt;;</div><div class='add'>+                    azoteq,lta-beta-np = &lt;8&gt;;</div><div class='add'>+                    azoteq,counts-beta-lp = &lt;2&gt;;</div><div class='add'>+                    azoteq,counts-beta-np = &lt;3&gt;;</div><div class='add'>+                    azoteq,lta-fast-beta-lp = &lt;3&gt;;</div><div class='add'>+                    azoteq,lta-fast-beta-np = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+                    cycle-0 {</div><div class='add'>+                            azoteq,conv-period = &lt;5&gt;;</div><div class='add'>+                            azoteq,conv-frac = &lt;127&gt;;</div><div class='add'>+                            azoteq,tx-enable = &lt;1&gt;, &lt;2&gt;, &lt;4&gt;, &lt;5&gt;;</div><div class='add'>+                            azoteq,dead-time-enable;</div><div class='add'>+                            azoteq,sense-mode = &lt;2&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cycle-1 {</div><div class='add'>+                            azoteq,conv-period = &lt;5&gt;;</div><div class='add'>+                            azoteq,conv-frac = &lt;127&gt;;</div><div class='add'>+                            azoteq,tx-enable = &lt;5&gt;;</div><div class='add'>+                            azoteq,dead-time-enable;</div><div class='add'>+                            azoteq,sense-mode = &lt;2&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cycle-2 {</div><div class='add'>+                            azoteq,conv-period = &lt;5&gt;;</div><div class='add'>+                            azoteq,conv-frac = &lt;127&gt;;</div><div class='add'>+                            azoteq,tx-enable = &lt;4&gt;;</div><div class='add'>+                            azoteq,dead-time-enable;</div><div class='add'>+                            azoteq,sense-mode = &lt;2&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cycle-3 {</div><div class='add'>+                            azoteq,conv-period = &lt;5&gt;;</div><div class='add'>+                            azoteq,conv-frac = &lt;127&gt;;</div><div class='add'>+                            azoteq,tx-enable = &lt;2&gt;;</div><div class='add'>+                            azoteq,dead-time-enable;</div><div class='add'>+                            azoteq,sense-mode = &lt;2&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cycle-4 {</div><div class='add'>+                            azoteq,conv-period = &lt;5&gt;;</div><div class='add'>+                            azoteq,conv-frac = &lt;127&gt;;</div><div class='add'>+                            azoteq,tx-enable = &lt;1&gt;;</div><div class='add'>+                            azoteq,dead-time-enable;</div><div class='add'>+                            azoteq,sense-mode = &lt;2&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cycle-5 {</div><div class='add'>+                            azoteq,conv-period = &lt;2&gt;;</div><div class='add'>+                            azoteq,conv-frac = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cycle-6 {</div><div class='add'>+                            azoteq,conv-period = &lt;2&gt;;</div><div class='add'>+                            azoteq,conv-frac = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-0 {</div><div class='add'>+                            azoteq,ulp-allow;</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;3&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;800&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;208&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-1 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;3&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;208&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-2 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;3&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;208&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-3 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;3&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;208&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-4 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;3&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;208&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-5 {</div><div class='add'>+                            azoteq,ulp-allow;</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;6&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;800&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;144&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-6 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;6&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;160&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+                            event-touch {</div><div class='add'>+                                    linux,code = &lt;KEY_MUTE&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-7 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;6&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;160&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+                            event-touch {</div><div class='add'>+                                    linux,code = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-8 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;6&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;160&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+                            event-touch {</div><div class='add'>+                                    linux,code = &lt;KEY_VOLUMEUP&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-9 {</div><div class='add'>+                            azoteq,global-halt;</div><div class='add'>+                            azoteq,invert-enable;</div><div class='add'>+                            azoteq,rx-enable = &lt;6&gt;;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;160&gt;;</div><div class='add'>+                            azoteq,ati-mode = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+                            event-touch {</div><div class='add'>+                                    linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-10 {</div><div class='add'>+                            azoteq,ulp-allow;</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;112&gt;;</div><div class='add'>+</div><div class='add'>+                            event-touch {</div><div class='add'>+                                    linux,code = &lt;SW_LID&gt;;</div><div class='add'>+                                    linux,input-type = &lt;EV_SW&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    channel-11 {</div><div class='add'>+                            azoteq,ati-target = &lt;496&gt;;</div><div class='add'>+                            azoteq,ati-base = &lt;112&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    slider-0 {</div><div class='add'>+                            azoteq,channel-select = &lt;1&gt;, &lt;2&gt;, &lt;3&gt;, &lt;4&gt;;</div><div class='add'>+                            azoteq,slider-size = &lt;4080&gt;;</div><div class='add'>+                            azoteq,upper-cal = &lt;50&gt;;</div><div class='add'>+                            azoteq,lower-cal = &lt;30&gt;;</div><div class='add'>+                            azoteq,top-speed = &lt;200&gt;;</div><div class='add'>+                            azoteq,bottom-speed = &lt;1&gt;;</div><div class='add'>+                            azoteq,bottom-beta = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+                            event-tap {</div><div class='add'>+                                    linux,code = &lt;KEY_PLAYPAUSE&gt;;</div><div class='add'>+                                    azoteq,gesture-max-ms = &lt;400&gt;;</div><div class='add'>+                                    azoteq,gesture-min-ms = &lt;32&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            event-flick-pos {</div><div class='add'>+                                    linux,code = &lt;KEY_NEXTSONG&gt;;</div><div class='add'>+                                    azoteq,gesture-max-ms = &lt;800&gt;;</div><div class='add'>+                                    azoteq,gesture-dist = &lt;800&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            event-flick-neg {</div><div class='add'>+                                    linux,code = &lt;KEY_PREVIOUSSONG&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/da9062-onkey.txt b/Documentation/devicetree/bindings/input/da9062-onkey.txt<br/>index 5f9fbc68e58a..e5eef59a93dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/da9062-onkey.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/da9062-onkey.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/da9062-onkey.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/da9062-onkey.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> This module is part of the DA9061/DA9062/DA9063. For more details about entire</div><div class='ctx'> DA9062 and DA9061 chips see Documentation/devicetree/bindings/mfd/da9062.txt</div><div class='del'>-For DA9063 see Documentation/devicetree/bindings/mfd/da9063.txt</div><div class='add'>+For DA9063 see Documentation/devicetree/bindings/mfd/dlg,da9063.yaml</div><div class='ctx'> </div><div class='ctx'> This module provides the KEY_POWER event.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/elan,ekth6915.yaml b/Documentation/devicetree/bindings/input/elan,ekth6915.yaml<br/>new file mode 100644<br/>index 000000000000..05e6f2df604c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/elan,ekth6915.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/elan,ekth6915.yaml</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/elan,ekth6915.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Elan eKTH6915 touchscreen controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Douglas Anderson &lt;dianders@chromium.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Supports the Elan eKTH6915 touchscreen controller.</div><div class='add'>+  This touchscreen controller uses the i2c-hid protocol with a reset GPIO.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: elan,ekth6915</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    const: 0x10</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Reset GPIO; not all touchscreens using eKTH6915 hook this up.</div><div class='add'>+</div><div class='add'>+  vcc33-supply:</div><div class='add'>+    description: The 3.3V supply to the touchscreen.</div><div class='add'>+</div><div class='add'>+  vccio-supply:</div><div class='add'>+    description:</div><div class='add'>+      The IO supply to the touchscreen. Need not be specified if this is the</div><div class='add'>+      same as the 3.3V supply.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - vcc33-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      ap_ts: touchscreen@10 {</div><div class='add'>+        compatible = "elan,ekth6915";</div><div class='add'>+        reg = &lt;0x10&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+        interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+        reset-gpios = &lt;&amp;tlmm 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        vcc33-supply = &lt;&amp;pp3300_ts&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml b/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml<br/>index 878464f128dc..5139af287d3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml</a></div><div class='hunk'>@@ -57,7 +57,7 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        mpr121@5a {</div><div class='add'>+        touchkey@5a {</div><div class='ctx'>             compatible = "fsl,mpr121-touchkey";</div><div class='ctx'>             reg = &lt;0x5a&gt;;</div><div class='ctx'>             interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='hunk'>@@ -77,7 +77,7 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        mpr121@5a {</div><div class='add'>+        touchkey@5a {</div><div class='ctx'>             compatible = "fsl,mpr121-touchkey";</div><div class='ctx'>             reg = &lt;0x5a&gt;;</div><div class='ctx'>             poll-interval = &lt;20&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/fsl,scu-key.yaml b/Documentation/devicetree/bindings/input/fsl,scu-key.yaml<br/>new file mode 100644<br/>index 000000000000..e5a3c355ee1f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/fsl,scu-key.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/fsl,scu-key.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/fsl,scu-key.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - SCU Key Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx8qxp-sc-key</div><div class='add'>+      - const: fsl,imx-sc-key</div><div class='add'>+</div><div class='add'>+  linux,keycodes:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - linux,keycodes</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+</div><div class='add'>+    keys {</div><div class='add'>+        compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";</div><div class='add'>+        linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml b/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml<br/>index fe1c5016f7f3..ce18d7dadae2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/goodix,gt7375p.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/goodix,gt7375p.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/goodix,gt7375p.yaml</a></div><div class='hunk'>@@ -16,8 +16,11 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='add'>+    oneOf:</div><div class='ctx'>       - const: goodix,gt7375p</div><div class='add'>+      - items:</div><div class='add'>+          - const: goodix,gt7986u</div><div class='add'>+          - const: goodix,gt7375p</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -33,6 +36,13 @@ properties:</div><div class='ctx'>   vdd-supply:</div><div class='ctx'>     description: The 3.3V supply to the touchscreen.</div><div class='ctx'> </div><div class='add'>+  mainboard-vddio-supply:</div><div class='add'>+    description:</div><div class='add'>+      The supply on the main board needed to power up IO signals going</div><div class='add'>+      to the touchscreen. This supply need not go to the touchscreen</div><div class='add'>+      itself as long as it allows the main board to make signals compatible</div><div class='add'>+      with what the touchscreen is expecting for its IO rails.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml b/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml<br/>index e8f137abb03c..fefaaf46a240 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/google,cros-ec-keyb.yaml</a></div><div class='hunk'>@@ -15,14 +15,16 @@ description: |</div><div class='ctx'>   Google's ChromeOS EC Keyboard is a simple matrix keyboard</div><div class='ctx'>   implemented on a separate EC (Embedded Controller) device. It provides</div><div class='ctx'>   a message for reading key scans from the EC. These are then converted</div><div class='del'>-  into keycodes for processing by the kernel.</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "/schemas/input/matrix-keymap.yaml#"</div><div class='add'>+  into keycodes for processing by the kernel. This device also supports</div><div class='add'>+  switches/buttons like power and volume buttons.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: google,cros-ec-keyb</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: ChromeOS EC with only buttons/switches</div><div class='add'>+        const: google,cros-ec-keyb-switches</div><div class='add'>+      - description: ChromeOS EC with keyboard and possibly buttons/switches</div><div class='add'>+        const: google,cros-ec-keyb</div><div class='ctx'> </div><div class='ctx'>   google,needs-ghost-filter:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -31,6 +33,7 @@ properties:</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='ctx'>   function-row-physmap:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 15</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -41,15 +44,31 @@ properties:</div><div class='ctx'>       where the lower 16 bits are reserved. This property is specified only</div><div class='ctx'>       when the keyboard has a custom design for the top row keys.</div><div class='ctx'> </div><div class='add'>+dependencies:</div><div class='add'>+  function-row-physmap: [ 'linux,keymap' ]</div><div class='add'>+  google,needs-ghost-filter: [ 'linux,keymap' ]</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: google,cros-ec-keyb</div><div class='add'>+then:</div><div class='add'>+  $ref: /schemas/input/matrix-keymap.yaml#</div><div class='add'>+  required:</div><div class='add'>+    - keypad,num-rows</div><div class='add'>+    - keypad,num-columns</div><div class='add'>+    - linux,keymap</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/input/input.h&gt;</div><div class='del'>-    cros-ec-keyb {</div><div class='add'>+    keyboard-controller {</div><div class='ctx'>         compatible = "google,cros-ec-keyb";</div><div class='ctx'>         keypad,num-rows = &lt;8&gt;;</div><div class='ctx'>         keypad,num-columns = &lt;13&gt;;</div><div class='hunk'>@@ -113,3 +132,9 @@ examples:</div><div class='ctx'>             /* UP      LEFT    */</div><div class='ctx'>             0x070b0067 0x070c0069&gt;;</div><div class='ctx'>     };</div><div class='add'>+  - |</div><div class='add'>+    /* No matrix keyboard, just buttons/switches */</div><div class='add'>+    keyboard-controller {</div><div class='add'>+        compatible = "google,cros-ec-keyb-switches";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/gpio-beeper.txt b/Documentation/devicetree/bindings/input/gpio-beeper.txt<br/>deleted file mode 100644<br/>index a5086e37fce6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/gpio-beeper.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/gpio-beeper.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-* GPIO beeper device tree bindings</div><div class='del'>-</div><div class='del'>-Register a beeper connected to GPIO pin.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:	Should be "gpio-beeper".</div><div class='del'>-- gpios:	From common gpio binding; gpio connection to beeper enable pin.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	beeper: beeper {</div><div class='del'>-		compatible = "gpio-beeper";</div><div class='del'>-		gpios = &lt;&amp;gpio3 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/gpio-beeper.yaml b/Documentation/devicetree/bindings/input/gpio-beeper.yaml<br/>new file mode 100644<br/>index 000000000000..290372add3d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/gpio-beeper.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/gpio-beeper.yaml</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/gpio-beeper.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO controlled beeper</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Fabio Estevam &lt;festevam@denx.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: gpio-beeper</div><div class='add'>+</div><div class='add'>+  gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO that drives the beeper.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    beeper {</div><div class='add'>+        compatible = "gpio-beeper";</div><div class='add'>+        gpios = &lt;&amp;gpio3 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/gpio-keys.yaml b/Documentation/devicetree/bindings/input/gpio-keys.yaml<br/>index 7fe1966ea28a..159cd9d9fe57 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/gpio-keys.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/gpio-keys.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/gpio-keys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/gpio-keys.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/gpio-keys.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device-Tree bindings for GPIO attached keys</div><div class='add'>+title: GPIO attached keys</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='hunk'>@@ -15,107 +15,106 @@ properties:</div><div class='ctx'>       - gpio-keys</div><div class='ctx'>       - gpio-keys-polled</div><div class='ctx'> </div><div class='add'>+  autorepeat: true</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    description: Name of entire device</div><div class='add'>+</div><div class='add'>+  poll-interval: true</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='del'>-  ".*":</div><div class='del'>-    if:</div><div class='del'>-      type: object</div><div class='del'>-    then:</div><div class='del'>-      $ref: input.yaml#</div><div class='add'>+  "^(button|event|key|switch|(button|event|key|switch)-[a-z0-9-]+|[a-z0-9-]+-(button|event|key|switch))$":</div><div class='add'>+    $ref: input.yaml#</div><div class='ctx'> </div><div class='del'>-      properties:</div><div class='del'>-        gpios:</div><div class='del'>-          maxItems: 1</div><div class='add'>+    properties:</div><div class='add'>+      gpios:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='ctx'> </div><div class='del'>-        interrupts:</div><div class='del'>-          maxItems: 1</div><div class='add'>+      label:</div><div class='add'>+        description: Descriptive name of the key.</div><div class='ctx'> </div><div class='del'>-        label:</div><div class='del'>-          description: Descriptive name of the key.</div><div class='add'>+      linux,code:</div><div class='add'>+        description: Key / Axis code to emit.</div><div class='ctx'> </div><div class='del'>-        linux,code:</div><div class='del'>-          description: Key / Axis code to emit.</div><div class='del'>-          $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+      linux,input-type:</div><div class='add'>+        default: 1  # EV_KEY</div><div class='ctx'> </div><div class='del'>-        linux,input-type:</div><div class='del'>-          description:</div><div class='del'>-            Specify event type this button/key generates. If not specified defaults to</div><div class='del'>-            &lt;1&gt; == EV_KEY.</div><div class='del'>-          $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+      linux,input-value:</div><div class='add'>+        description: |</div><div class='add'>+          If linux,input-type is EV_ABS or EV_REL then this</div><div class='add'>+          value is sent for events this button generates when pressed.</div><div class='add'>+          EV_ABS/EV_REL axis will generate an event with a value of 0</div><div class='add'>+          when all buttons with linux,input-type == type and</div><div class='add'>+          linux,code == axis are released. This value is interpreted</div><div class='add'>+          as a signed 32 bit value, e.g. to make a button generate a</div><div class='add'>+          value of -1 use:</div><div class='ctx'> </div><div class='del'>-          default: 1</div><div class='add'>+          linux,input-value = &lt;0xffffffff&gt;; /* -1 */</div><div class='ctx'> </div><div class='del'>-        linux,input-value:</div><div class='del'>-          description: |</div><div class='del'>-            If linux,input-type is EV_ABS or EV_REL then this</div><div class='del'>-            value is sent for events this button generates when pressed.</div><div class='del'>-            EV_ABS/EV_REL axis will generate an event with a value of 0</div><div class='del'>-            when all buttons with linux,input-type == type and</div><div class='del'>-            linux,code == axis are released. This value is interpreted</div><div class='del'>-            as a signed 32 bit value, e.g. to make a button generate a</div><div class='del'>-            value of -1 use:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='del'>-            linux,input-value = &lt;0xffffffff&gt;; /* -1 */</div><div class='add'>+      debounce-interval:</div><div class='add'>+        description:</div><div class='add'>+          Debouncing interval time in milliseconds. If not specified defaults to 5.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='del'>-          $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        default: 5</div><div class='ctx'> </div><div class='del'>-        debounce-interval:</div><div class='del'>-          description:</div><div class='del'>-            Debouncing interval time in milliseconds. If not specified defaults to 5.</div><div class='del'>-          $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+      wakeup-source:</div><div class='add'>+        description: Button can wake-up the system.</div><div class='ctx'> </div><div class='del'>-          default: 5</div><div class='add'>+      wakeup-event-action:</div><div class='add'>+        description: |</div><div class='add'>+          Specifies whether the key should wake the system when asserted, when</div><div class='add'>+          deasserted, or both. This property is only valid for keys that wake up the</div><div class='add'>+          system (e.g., when the "wakeup-source" property is also provided).</div><div class='ctx'> </div><div class='del'>-        wakeup-source:</div><div class='del'>-          description: Button can wake-up the system.</div><div class='add'>+          Supported values are defined in linux-event-codes.h:</div><div class='ctx'> </div><div class='del'>-        wakeup-event-action:</div><div class='del'>-          description: |</div><div class='del'>-            Specifies whether the key should wake the system when asserted, when</div><div class='del'>-            deasserted, or both. This property is only valid for keys that wake up the</div><div class='del'>-            system (e.g., when the "wakeup-source" property is also provided).</div><div class='add'>+            EV_ACT_ANY        - both asserted and deasserted</div><div class='add'>+            EV_ACT_ASSERTED   - asserted</div><div class='add'>+            EV_ACT_DEASSERTED - deasserted</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2]</div><div class='ctx'> </div><div class='del'>-            Supported values are defined in linux-event-codes.h:</div><div class='add'>+      linux,can-disable:</div><div class='add'>+        description:</div><div class='add'>+          Indicates that button is connected to dedicated (not shared) interrupt</div><div class='add'>+          which can be disabled to suppress events from the button.</div><div class='add'>+        type: boolean</div><div class='ctx'> </div><div class='del'>-              EV_ACT_ANY        - both asserted and deasserted</div><div class='del'>-              EV_ACT_ASSERTED   - asserted</div><div class='del'>-              EV_ACT_DEASSERTED - deasserted</div><div class='del'>-          $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-          enum: [0, 1, 2]</div><div class='add'>+    required:</div><div class='add'>+      - linux,code</div><div class='ctx'> </div><div class='del'>-        linux,can-disable:</div><div class='del'>-          description:</div><div class='del'>-            Indicates that button is connected to dedicated (not shared) interrupt</div><div class='del'>-            which can be disabled to suppress events from the button.</div><div class='del'>-          type: boolean</div><div class='add'>+    anyOf:</div><div class='add'>+      - required:</div><div class='add'>+          - interrupts</div><div class='add'>+      - required:</div><div class='add'>+          - interrupts-extended</div><div class='add'>+      - required:</div><div class='add'>+          - gpios</div><div class='ctx'> </div><div class='add'>+    dependencies:</div><div class='add'>+      wakeup-event-action: [ wakeup-source ]</div><div class='add'>+      linux,input-value: [ gpios ]</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: gpio-keys-polled</div><div class='add'>+    then:</div><div class='ctx'>       required:</div><div class='del'>-        - linux,code</div><div class='del'>-</div><div class='del'>-      anyOf:</div><div class='del'>-        - required:</div><div class='del'>-            - interrupts</div><div class='del'>-        - required:</div><div class='del'>-            - gpios</div><div class='del'>-</div><div class='del'>-      dependencies:</div><div class='del'>-        wakeup-event-action: [ wakeup-source ]</div><div class='del'>-        linux,input-value: [ gpios ]</div><div class='del'>-</div><div class='del'>-      unevaluatedProperties: false</div><div class='del'>-</div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      const: gpio-keys-polled</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    poll-interval:</div><div class='del'>-      description:</div><div class='del'>-        Poll interval time in milliseconds</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-</div><div class='del'>-  required:</div><div class='del'>-    - poll-interval</div><div class='add'>+        - poll-interval</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        poll-interval: false</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -127,13 +126,13 @@ examples:</div><div class='ctx'>         compatible = "gpio-keys";</div><div class='ctx'>         autorepeat;</div><div class='ctx'> </div><div class='del'>-        up {</div><div class='add'>+        key-up {</div><div class='ctx'>             label = "GPIO Key UP";</div><div class='ctx'>             linux,code = &lt;103&gt;;</div><div class='ctx'>             gpios = &lt;&amp;gpio1 0 1&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        down {</div><div class='add'>+        key-down {</div><div class='ctx'>             label = "GPIO Key DOWN";</div><div class='ctx'>             linux,code = &lt;108&gt;;</div><div class='ctx'>             interrupts = &lt;1 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/hid-over-i2c.txt b/Documentation/devicetree/bindings/input/hid-over-i2c.txt<br/>deleted file mode 100644<br/>index 34c43d3bddfd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/hid-over-i2c.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/hid-over-i2c.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-* HID over I2C Device-Tree bindings</div><div class='del'>-</div><div class='del'>-HID over I2C provides support for various Human Interface Devices over the</div><div class='del'>-I2C bus. These devices can be for example touchpads, keyboards, touch screens</div><div class='del'>-or sensors.</div><div class='del'>-</div><div class='del'>-The specification has been written by Microsoft and is currently available here:</div><div class='del'>-http://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx</div><div class='del'>-</div><div class='del'>-If this binding is used, the kernel module i2c-hid will handle the communication</div><div class='del'>-with the device and the generic hid core layer will handle the protocol.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "hid-over-i2c"</div><div class='del'>-- reg: i2c slave address</div><div class='del'>-- hid-descr-addr: HID descriptor address</div><div class='del'>-- interrupts: interrupt line</div><div class='del'>-</div><div class='del'>-Additional optional properties:</div><div class='del'>-</div><div class='del'>-Some devices may support additional optional properties to help with, e.g.,</div><div class='del'>-power sequencing. The following properties can be supported by one or more</div><div class='del'>-device-specific compatible properties, which should be used in addition to the</div><div class='del'>-"hid-over-i2c" string.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-  * "wacom,w9013" (Wacom W9013 digitizer). Supports:</div><div class='del'>-    - vdd-supply (3.3V)</div><div class='del'>-    - vddl-supply (1.8V)</div><div class='del'>-    - post-power-on-delay-ms</div><div class='del'>-</div><div class='del'>-- vdd-supply: phandle of the regulator that provides the supply voltage.</div><div class='del'>-- post-power-on-delay-ms: time required by the device after enabling its regulators</div><div class='del'>-  or powering it on, before it is ready for communication.</div><div class='del'>-- touchscreen-inverted-x: See touchscreen.txt</div><div class='del'>-- touchscreen-inverted-y: See touchscreen.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	i2c-hid-dev@2c {</div><div class='del'>-		compatible = "hid-over-i2c";</div><div class='del'>-		reg = &lt;0x2c&gt;;</div><div class='del'>-		hid-descr-addr = &lt;0x0020&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='del'>-		interrupts = &lt;3 2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/hid-over-i2c.yaml b/Documentation/devicetree/bindings/input/hid-over-i2c.yaml<br/>new file mode 100644<br/>index 000000000000..7156b08f7645<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/hid-over-i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/hid-over-i2c.yaml</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/hid-over-i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HID over I2C Devices</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Benjamin Tissoires &lt;benjamin.tissoires@redhat.com&gt;</div><div class='add'>+  - Jiri Kosina &lt;jkosina@suse.cz&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  HID over I2C provides support for various Human Interface Devices over the</div><div class='add'>+  I2C bus. These devices can be for example touchpads, keyboards, touch screens</div><div class='add'>+  or sensors.</div><div class='add'>+</div><div class='add'>+  The specification has been written by Microsoft and is currently available here:</div><div class='add'>+  https://msdn.microsoft.com/en-us/library/windows/hardware/hh852380.aspx</div><div class='add'>+</div><div class='add'>+  If this binding is used, the kernel module i2c-hid will handle the communication</div><div class='add'>+  with the device and the generic hid core layer will handle the protocol.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/input/touchscreen/touchscreen.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - wacom,w9013</div><div class='add'>+          - const: hid-over-i2c</div><div class='add'>+      - description: Just "hid-over-i2c" alone is allowed, but not recommended.</div><div class='add'>+        const: hid-over-i2c</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  hid-descr-addr:</div><div class='add'>+    description: HID descriptor address</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  post-power-on-delay-ms:</div><div class='add'>+    description: Time required by the device after enabling its regulators</div><div class='add'>+      or powering it on, before it is ready for communication.</div><div class='add'>+</div><div class='add'>+  touchscreen-inverted-x: true</div><div class='add'>+</div><div class='add'>+  touchscreen-inverted-y: true</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: 3.3V supply</div><div class='add'>+</div><div class='add'>+  vddl-supply:</div><div class='add'>+    description: 1.8V supply</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        hid@2c {</div><div class='add'>+            compatible = "hid-over-i2c";</div><div class='add'>+            reg = &lt;0x2c&gt;;</div><div class='add'>+            hid-descr-addr = &lt;0x0020&gt;;</div><div class='add'>+            interrupts = &lt;3 2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/ibm,op-panel.yaml b/Documentation/devicetree/bindings/input/ibm,op-panel.yaml<br/>new file mode 100644<br/>index 000000000000..29a1879e356d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/ibm,op-panel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/ibm,op-panel.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/ibm,op-panel.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: IBM Operation Panel</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Eddie James &lt;eajames@linux.ibm.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The IBM Operation Panel provides a simple interface to control the connected</div><div class='add'>+  server. It has a display and three buttons: two directional arrows and one</div><div class='add'>+  'Enter' button.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ibm,op-panel</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  linux,keycodes:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/i2c/i2c.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ibm-op-panel@62 {</div><div class='add'>+            compatible = "ibm,op-panel";</div><div class='add'>+            reg = &lt;(0x62 | I2C_OWN_SLAVE_ADDRESS)&gt;;</div><div class='add'>+            linux,keycodes = &lt;KEY_UP&gt;, &lt;KEY_DOWN&gt;, &lt;KEY_ENTER&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt b/Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt<br/>deleted file mode 100644<br/>index cdcaa3f52d25..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ilitek,ili2xxx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-Ilitek ILI210x/ILI2117/ILI2120/ILI251x touchscreen controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:</div><div class='del'>-    ilitek,ili210x for ILI210x</div><div class='del'>-    ilitek,ili2117 for ILI2117</div><div class='del'>-    ilitek,ili2120 for ILI2120</div><div class='del'>-    ilitek,ili251x for ILI251x</div><div class='del'>-</div><div class='del'>-- reg: The I2C address of the device</div><div class='del'>-</div><div class='del'>-- interrupts: The sink for the touchscreen's IRQ output</div><div class='del'>-    See ../interrupt-controller/interrupts.txt</div><div class='del'>-</div><div class='del'>-Optional properties for main touchpad device:</div><div class='del'>-</div><div class='del'>-- reset-gpios: GPIO specifier for the touchscreen's reset pin (active low)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	touchscreen@41 {</div><div class='del'>-		compatible = "ilitek,ili251x";</div><div class='del'>-		reg = &lt;0x41&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;7 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio5 21 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/imx-keypad.yaml b/Documentation/devicetree/bindings/input/imx-keypad.yaml<br/>index f21db81206b4..b110eb1f3358 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/imx-keypad.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/imx-keypad.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/imx-keypad.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/imx-keypad.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/imx-keypad.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale i.MX Keypad Port(KPP) device tree bindings</div><div class='add'>+title: Freescale i.MX Keypad Port(KPP)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Liu Ying &lt;gnuiyl@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/input/matrix-keymap.yaml#"</div><div class='add'>+  - $ref: /schemas/input/matrix-keymap.yaml#</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The KPP is designed to interface with a keypad matrix with 2-point contact</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/input.yaml b/Documentation/devicetree/bindings/input/input.yaml<br/>index d41d8743aad4..94f7942189e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/input.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/input.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/input.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/input.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/input.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common input schema binding</div><div class='add'>+title: Input Devices Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;</div><div class='hunk'>@@ -21,7 +21,26 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     items:</div><div class='ctx'>       minimum: 0</div><div class='del'>-      maximum: 0xff</div><div class='add'>+      maximum: 0x2ff</div><div class='add'>+</div><div class='add'>+  linux,code:</div><div class='add'>+    description:</div><div class='add'>+      Specifies a single numeric keycode value to be used for reporting</div><div class='add'>+      button/switch events. Specify KEY_RESERVED (0) to opt out of event</div><div class='add'>+      reporting.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 0x2ff</div><div class='add'>+</div><div class='add'>+  linux,input-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum:</div><div class='add'>+      - 1   # EV_KEY</div><div class='add'>+      - 2   # EV_REL</div><div class='add'>+      - 3   # EV_ABS</div><div class='add'>+      - 5   # EV_SW</div><div class='add'>+    description:</div><div class='add'>+      Specifies whether the event is to be interpreted as a key, relative,</div><div class='add'>+      absolute, or switch.</div><div class='ctx'> </div><div class='ctx'>   poll-interval:</div><div class='ctx'>     description: Poll interval time in milliseconds.</div><div class='hunk'>@@ -39,4 +58,7 @@ properties:</div><div class='ctx'>       reset automatically. Device with key pressed reset feature can specify</div><div class='ctx'>       this property.</div><div class='ctx'> </div><div class='add'>+dependencies:</div><div class='add'>+  linux,input-type: [ "linux,code" ]</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/iqs269a.yaml b/Documentation/devicetree/bindings/input/iqs269a.yaml<br/>index 9c154e5e1a91..3c430d38594f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/iqs269a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/iqs269a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/iqs269a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/iqs269a.yaml</a></div><div class='hunk'>@@ -370,6 +370,7 @@ patternProperties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^event-prox(-alt)?$":</div><div class='ctx'>         type: object</div><div class='add'>+        $ref: input.yaml#</div><div class='ctx'>         description:</div><div class='ctx'>           Represents a proximity event reported by the channel in response to</div><div class='ctx'>           a decrease in counts. Node names suffixed with '-alt' instead corre-</div><div class='hunk'>@@ -396,14 +397,13 @@ patternProperties:</div><div class='ctx'>             default: 10</div><div class='ctx'>             description: Specifies the threshold for the event.</div><div class='ctx'> </div><div class='del'>-          linux,code:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            description: Numeric key or switch code associated with the event.</div><div class='add'>+          linux,code: true</div><div class='ctx'> </div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>       "^event-touch(-alt)?$":</div><div class='ctx'>         type: object</div><div class='add'>+        $ref: input.yaml#</div><div class='ctx'>         description: Represents a touch event reported by the channel.</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='hunk'>@@ -421,14 +421,13 @@ patternProperties:</div><div class='ctx'>             default: 4</div><div class='ctx'>             description: Specifies the hysteresis for the event.</div><div class='ctx'> </div><div class='del'>-          linux,code:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            description: Numeric key or switch code associated with the event.</div><div class='add'>+          linux,code: true</div><div class='ctx'> </div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>       "^event-deep(-alt)?$":</div><div class='ctx'>         type: object</div><div class='add'>+        $ref: input.yaml#</div><div class='ctx'>         description: Represents a deep-touch event reported by the channel.</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='hunk'>@@ -446,9 +445,7 @@ patternProperties:</div><div class='ctx'>             default: 0</div><div class='ctx'>             description: Specifies the hysteresis for the event.</div><div class='ctx'> </div><div class='del'>-          linux,code:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            description: Numeric key or switch code associated with the event.</div><div class='add'>+          linux,code: true</div><div class='ctx'> </div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -475,7 +472,7 @@ examples:</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-            iqs269a@44 {</div><div class='add'>+            touch@44 {</div><div class='ctx'>                     #address-cells = &lt;1&gt;;</div><div class='ctx'>                     #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/iqs626a.yaml b/Documentation/devicetree/bindings/input/iqs626a.yaml<br/>index 0cb736c541c9..e424d67b0542 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/iqs626a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/iqs626a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/iqs626a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/iqs626a.yaml</a></div><div class='hunk'>@@ -449,6 +449,7 @@ patternProperties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^event-(prox|touch|deep)(-alt)?$":</div><div class='ctx'>         type: object</div><div class='add'>+        $ref: input.yaml#</div><div class='ctx'>         description:</div><div class='ctx'>           Represents a proximity, touch or deep-touch event reported by the</div><div class='ctx'>           channel in response to a decrease in counts. Node names suffixed with</div><div class='hunk'>@@ -487,21 +488,15 @@ patternProperties:</div><div class='ctx'>               Specifies the hysteresis for the event (touch and deep-touch</div><div class='ctx'>               events only).</div><div class='ctx'> </div><div class='del'>-          linux,code:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            description: Numeric key or switch code associated with the event.</div><div class='add'>+          linux,code: true</div><div class='ctx'> </div><div class='ctx'>           linux,input-type:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             enum: [1, 5]</div><div class='ctx'>             description:</div><div class='ctx'>               Specifies whether the event is to be interpreted as a key (1) or</div><div class='ctx'>               a switch (5). By default, Hall-channel events are interpreted as</div><div class='ctx'>               switches and all others are interpreted as keys.</div><div class='ctx'> </div><div class='del'>-        dependencies:</div><div class='del'>-          linux,input-type: ["linux,code"]</div><div class='del'>-</div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     dependencies:</div><div class='hunk'>@@ -511,6 +506,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^trackpad-3x[2-3]$":</div><div class='ctx'>     type: object</div><div class='add'>+    $ref: input.yaml#</div><div class='ctx'>     description:</div><div class='ctx'>       Represents all channels associated with the trackpad. The channels are</div><div class='ctx'>       collectively active if the trackpad is defined and inactive otherwise.</div><div class='hunk'>@@ -568,16 +564,6 @@ patternProperties:</div><div class='ctx'>           2: Partial</div><div class='ctx'>           3: Full</div><div class='ctx'> </div><div class='del'>-      azoteq,ati-base:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 6</div><div class='del'>-        maxItems: 9</div><div class='del'>-        items:</div><div class='del'>-          minimum: 45</div><div class='del'>-          maximum: 300</div><div class='del'>-        default: [45, 45, 45, 45, 45, 45, 45, 45, 45]</div><div class='del'>-        description: Specifies each individual trackpad channel's ATI base.</div><div class='del'>-</div><div class='ctx'>       azoteq,ati-target:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         multipleOf: 32</div><div class='hunk'>@@ -624,17 +610,6 @@ patternProperties:</div><div class='ctx'>         description:</div><div class='ctx'>           Tightens the ATI band from 1/8 to 1/16 of the desired target.</div><div class='ctx'> </div><div class='del'>-      azoteq,thresh:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-        minItems: 6</div><div class='del'>-        maxItems: 9</div><div class='del'>-        items:</div><div class='del'>-          minimum: 0</div><div class='del'>-          maximum: 255</div><div class='del'>-        default: [0, 0, 0, 0, 0, 0, 0, 0, 0]</div><div class='del'>-        description:</div><div class='del'>-          Specifies each individual trackpad channel's touch threshold.</div><div class='del'>-</div><div class='ctx'>       azoteq,hyst:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='hunk'>@@ -679,7 +654,6 @@ patternProperties:</div><div class='ctx'>           Specifies the raw count filter strength during low-power mode.</div><div class='ctx'> </div><div class='ctx'>       linux,keycodes:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 6</div><div class='ctx'>         description: |</div><div class='hunk'>@@ -725,6 +699,28 @@ patternProperties:</div><div class='ctx'>           Specifies the number of points across which an axial gesture must</div><div class='ctx'>           travel in order to be interpreted as a flick or swipe.</div><div class='ctx'> </div><div class='add'>+    patternProperties:</div><div class='add'>+      "^channel-[0-8]$":</div><div class='add'>+        type: object</div><div class='add'>+        description: Represents a single trackpad channel.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          azoteq,thresh:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 255</div><div class='add'>+            default: 0</div><div class='add'>+            description: Specifies the threshold for the channel.</div><div class='add'>+</div><div class='add'>+          azoteq,ati-base:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            minimum: 45</div><div class='add'>+            maximum: 300</div><div class='add'>+            default: 45</div><div class='add'>+            description: Specifies the channel's ATI base.</div><div class='add'>+</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>     dependencies:</div><div class='ctx'>       azoteq,gesture-swipe: ["linux,keycodes"]</div><div class='ctx'>       azoteq,timeout-tap-ms: ["linux,keycodes"]</div><div class='hunk'>@@ -751,7 +747,7 @@ examples:</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-            iqs626a@44 {</div><div class='add'>+            touch@44 {</div><div class='ctx'>                     #address-cells = &lt;1&gt;;</div><div class='ctx'>                     #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -785,14 +781,8 @@ examples:</div><div class='ctx'>                             azoteq,filt-str-lp-cnt = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'>                             azoteq,hyst = &lt;4&gt;;</div><div class='del'>-                            azoteq,thresh = &lt;35&gt;, &lt;40&gt;, &lt;40&gt;,</div><div class='del'>-                                            &lt;38&gt;, &lt;33&gt;, &lt;38&gt;,</div><div class='del'>-                                            &lt;35&gt;, &lt;35&gt;, &lt;35&gt;;</div><div class='ctx'> </div><div class='ctx'>                             azoteq,ati-mode = &lt;3&gt;;</div><div class='del'>-                            azoteq,ati-base = &lt;195&gt;, &lt;195&gt;, &lt;195&gt;,</div><div class='del'>-                                              &lt;195&gt;, &lt;195&gt;, &lt;195&gt;,</div><div class='del'>-                                              &lt;195&gt;, &lt;195&gt;, &lt;195&gt;;</div><div class='ctx'>                             azoteq,ati-target = &lt;512&gt;;</div><div class='ctx'> </div><div class='ctx'>                             azoteq,proj-bias = &lt;1&gt;;</div><div class='hunk'>@@ -809,6 +799,51 @@ examples:</div><div class='ctx'>                             azoteq,timeout-swipe-ms = &lt;800&gt;;</div><div class='ctx'>                             azoteq,timeout-tap-ms = &lt;400&gt;;</div><div class='ctx'>                             azoteq,thresh-swipe = &lt;40&gt;;</div><div class='add'>+</div><div class='add'>+                            channel-0 {</div><div class='add'>+                                    azoteq,thresh = &lt;35&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-1 {</div><div class='add'>+                                    azoteq,thresh = &lt;40&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-2 {</div><div class='add'>+                                    azoteq,thresh = &lt;40&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-3 {</div><div class='add'>+                                    azoteq,thresh = &lt;38&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-4 {</div><div class='add'>+                                    azoteq,thresh = &lt;33&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-5 {</div><div class='add'>+                                    azoteq,thresh = &lt;38&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-6 {</div><div class='add'>+                                    azoteq,thresh = &lt;35&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-7 {</div><div class='add'>+                                    azoteq,thresh = &lt;35&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            channel-8 {</div><div class='add'>+                                    azoteq,thresh = &lt;35&gt;;</div><div class='add'>+                                    azoteq,ati-base = &lt;195&gt;;</div><div class='add'>+                            };</div><div class='ctx'>                     };</div><div class='ctx'> </div><div class='ctx'>                     /*</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/iqs62x-keys.yaml b/Documentation/devicetree/bindings/input/iqs62x-keys.yaml<br/>index 77fe3b545b35..0aa951f0ab92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/iqs62x-keys.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/iqs62x-keys.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/iqs62x-keys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/iqs62x-keys.yaml</a></div><div class='hunk'>@@ -9,6 +9,9 @@ title: Azoteq IQS620A/621/622/624/625 Keys and Switches</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jeff LaBundy &lt;jeff@labundy.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='ctx'> description: |</div><div class='ctx'>   The Azoteq IQS620A, IQS621, IQS622, IQS624 and IQS625 multi-function sensors</div><div class='ctx'>   feature a variety of self-capacitive, mutual-inductive and Hall-effect sens-</div><div class='hunk'>@@ -30,7 +33,6 @@ properties:</div><div class='ctx'>       - azoteq,iqs625-keys</div><div class='ctx'> </div><div class='ctx'>   linux,keycodes:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 16</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -89,15 +91,14 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^hall-switch-(north|south)$":</div><div class='ctx'>     type: object</div><div class='add'>+    $ref: input.yaml#</div><div class='ctx'>     description:</div><div class='ctx'>       Represents north/south-field Hall-effect sensor touch or proximity</div><div class='ctx'>       events. Note that north/south-field orientation is reversed on the</div><div class='ctx'>       IQS620AXzCSR device due to its flip-chip package.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='del'>-      linux,code:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: Numeric switch code associated with the event.</div><div class='add'>+      linux,code: true</div><div class='ctx'> </div><div class='ctx'>       azoteq,use-prox:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/flag</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/matrix-keymap.yaml b/Documentation/devicetree/bindings/input/matrix-keymap.yaml<br/>index 6699d5e32dca..a715c2a773fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/matrix-keymap.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/matrix-keymap.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/matrix-keymap.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/matrix-keymap.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/matrix-keymap.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common key matrices binding for matrix-connected key boards</div><div class='add'>+title: Common Key Matrices on Matrix-connected Key Boards</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Olof Johansson &lt;olof@lixom.net&gt;</div><div class='hunk'>@@ -21,7 +21,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   linux,keymap:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     description: |</div><div class='ctx'>       An array of packed 1-cell entries containing the equivalent of row,</div><div class='ctx'>       column and linux key-code. The 32-bit big endian cell is packed as:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/max77650-onkey.yaml b/Documentation/devicetree/bindings/input/max77650-onkey.yaml<br/>index 3a2ad6ec64db..48edc0c8c1dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/max77650-onkey.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/max77650-onkey.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/max77650-onkey.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/max77650-onkey.yaml</a></div><div class='hunk'>@@ -16,15 +16,15 @@ description: |</div><div class='ctx'>   The onkey controller is represented as a sub-node of the PMIC node on</div><div class='ctx'>   the device tree.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: maxim,max77650-onkey</div><div class='ctx'> </div><div class='ctx'>   linux,code:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description:</div><div class='del'>-      The key-code to be reported when the key is pressed. Defaults</div><div class='del'>-      to KEY_POWER.</div><div class='add'>+    default: 116  # KEY_POWER</div><div class='ctx'> </div><div class='ctx'>   maxim,onkey-slide:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml b/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml<br/>index b1770640f94b..47aac8794b68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/mediatek,mt6779-keypad.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/mediatek,mt6779-keypad.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek's Keypad Controller device tree bindings</div><div class='add'>+title: Mediatek's Keypad Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Fengping Yu &lt;fengping.yu@mediatek.com&gt;</div><div class='add'>+  - Mattijs Korpershoek &lt;mkorpershoek@baylibre.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/input/matrix-keymap.yaml#"</div><div class='add'>+  - $ref: /schemas/input/matrix-keymap.yaml#</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Mediatek's Keypad controller is used to interface a SoC with a matrix-type</div><div class='hunk'>@@ -49,6 +49,12 @@ properties:</div><div class='ctx'>     maximum: 256</div><div class='ctx'>     default: 16</div><div class='ctx'> </div><div class='add'>+  mediatek,keys-per-group:</div><div class='add'>+    description: each (row, column) group has multiple keys</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 1</div><div class='add'>+    maximum: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -56,7 +62,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml b/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml<br/>new file mode 100644<br/>index 000000000000..037c3ae9f1c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/mediatek,pmic-keys.yaml</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/mediatek,pmic-keys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek PMIC Keys</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chen Zhong &lt;chen.zhong@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  There are two key functions provided by MT6397, MT6323 and other MediaTek</div><div class='add'>+  PMICs: pwrkey and homekey.</div><div class='add'>+  The key functions are defined as the subnode of the function node provided</div><div class='add'>+  by the PMIC that is defined as a Multi-Function Device (MFD).</div><div class='add'>+</div><div class='add'>+  For MediaTek MT6323/MT6397 PMIC bindings see</div><div class='add'>+  Documentation/devicetree/bindings/mfd/mt6397.txt</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt6323-keys</div><div class='add'>+      - mediatek,mt6331-keys</div><div class='add'>+      - mediatek,mt6357-keys</div><div class='add'>+      - mediatek,mt6358-keys</div><div class='add'>+      - mediatek,mt6397-keys</div><div class='add'>+</div><div class='add'>+  power-off-time-sec: true</div><div class='add'>+</div><div class='add'>+  mediatek,long-press-mode:</div><div class='add'>+    description: |</div><div class='add'>+      Key long-press force shutdown setting</div><div class='add'>+      0 - disabled</div><div class='add'>+      1 - pwrkey</div><div class='add'>+      2 - pwrkey+homekey</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0</div><div class='add'>+    maximum: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^((power|home)|(key-[a-z0-9-]+|[a-z0-9-]+-key))$":</div><div class='add'>+    $ref: input.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      interrupts:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - description: Key press interrupt</div><div class='add'>+          - description: Key release interrupt</div><div class='add'>+</div><div class='add'>+      interrupt-names: true</div><div class='add'>+</div><div class='add'>+      linux-keycodes:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      wakeup-source: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - linux,keycodes</div><div class='add'>+</div><div class='add'>+    if:</div><div class='add'>+      properties:</div><div class='add'>+        interrupt-names:</div><div class='add'>+          contains:</div><div class='add'>+            const: powerkey</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: powerkey</div><div class='add'>+            - const: powerkey_r</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: homekey</div><div class='add'>+            - const: homekey_r</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pmic {</div><div class='add'>+        compatible = "mediatek,mt6397";</div><div class='add'>+</div><div class='add'>+        keys {</div><div class='add'>+          compatible = "mediatek,mt6397-keys";</div><div class='add'>+          mediatek,long-press-mode = &lt;1&gt;;</div><div class='add'>+          power-off-time-sec = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          key-power {</div><div class='add'>+            linux,keycodes = &lt;KEY_POWER&gt;;</div><div class='add'>+            wakeup-source;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          key-home {</div><div class='add'>+            linux,keycodes = &lt;KEY_VOLUMEDOWN&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/microchip,cap11xx.yaml b/Documentation/devicetree/bindings/input/microchip,cap11xx.yaml<br/>index d5d6bced3148..5b5d4f7d3482 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/microchip,cap11xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/microchip,cap11xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/microchip,cap11xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/microchip,cap11xx.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/input/microchip,cap11xx.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/input/microchip,cap11xx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device tree bindings for Microchip CAP11xx based capacitive touch sensors</div><div class='add'>+title: Microchip CAP11xx based capacitive touch sensors</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Microchip CAP1xxx Family of RightTouchTM multiple-channel capacitive</div><div class='hunk'>@@ -19,7 +19,10 @@ properties:</div><div class='ctx'>       - microchip,cap1106</div><div class='ctx'>       - microchip,cap1126</div><div class='ctx'>       - microchip,cap1188</div><div class='add'>+      - microchip,cap1203</div><div class='ctx'>       - microchip,cap1206</div><div class='add'>+      - microchip,cap1293</div><div class='add'>+      - microchip,cap1298</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -112,7 +115,7 @@ examples:</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-      cap1188@28 {</div><div class='add'>+      touch@28 {</div><div class='ctx'>         compatible = "microchip,cap1188";</div><div class='ctx'>         interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='ctx'>         interrupts = &lt;0 0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/mtk-pmic-keys.txt b/Documentation/devicetree/bindings/input/mtk-pmic-keys.txt<br/>deleted file mode 100644<br/>index 9d00f2a8e13a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/mtk-pmic-keys.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/mtk-pmic-keys.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-MediaTek MT6397/MT6323 PMIC Keys Device Driver</div><div class='del'>-</div><div class='del'>-There are two key functions provided by MT6397/MT6323 PMIC, pwrkey</div><div class='del'>-and homekey. The key functions are defined as the subnode of the function</div><div class='del'>-node provided by MT6397/MT6323 PMIC that is being defined as one kind</div><div class='del'>-of Muti-Function Device (MFD)</div><div class='del'>-</div><div class='del'>-For MT6397/MT6323 MFD bindings see:</div><div class='del'>-Documentation/devicetree/bindings/mfd/mt6397.txt</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be one of:</div><div class='del'>-	- "mediatek,mt6397-keys"</div><div class='del'>-	- "mediatek,mt6323-keys"</div><div class='del'>-	- "mediatek,mt6358-keys"</div><div class='del'>-- linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- wakeup-source: See Documentation/devicetree/bindings/power/wakeup-source.txt</div><div class='del'>-- mediatek,long-press-mode: Long press key shutdown setting, 1 for</div><div class='del'>-	pwrkey only, 2 for pwrkey/homekey together, others for disabled.</div><div class='del'>-- power-off-time-sec: See Documentation/devicetree/bindings/input/input.yaml</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pmic: mt6397 {</div><div class='del'>-		compatible = "mediatek,mt6397";</div><div class='del'>-</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-		mt6397keys: mt6397keys {</div><div class='del'>-			compatible = "mediatek,mt6397-keys";</div><div class='del'>-			mediatek,long-press-mode = &lt;1&gt;;</div><div class='del'>-			power-off-time-sec = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			power {</div><div class='del'>-				linux,keycodes = &lt;116&gt;;</div><div class='del'>-				wakeup-source;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			home {</div><div class='del'>-				linux,keycodes = &lt;114&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml b/Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml<br/>new file mode 100644<br/>index 000000000000..490f6c3d9e4b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/pine64,pinephone-keyboard.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/pine64,pinephone-keyboard.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Pine64 PinePhone keyboard</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Samuel Holland &lt;samuel@sholland.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  A keyboard accessory is available for the Pine64 PinePhone and PinePhone Pro.</div><div class='add'>+  It connects via I2C, providing a raw scan matrix, a flashing interface, and a</div><div class='add'>+  subordinate I2C bus for communication with a battery charger IC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pine64,pinephone-keyboard</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    const: 0x15</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vbat-supply:</div><div class='add'>+    description: Supply for the keyboard MCU</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  i2c:</div><div class='add'>+    $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      keyboard@15 {</div><div class='add'>+        compatible = "pine64,pinephone-keyboard";</div><div class='add'>+        reg = &lt;0x15&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;r_pio&gt;;</div><div class='add'>+        interrupts = &lt;0 12 IRQ_TYPE_EDGE_FALLING&gt;; /* PL12 */</div><div class='add'>+</div><div class='add'>+        i2c {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          charger@75 {</div><div class='add'>+            reg = &lt;0x75&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/pwm-beeper.txt b/Documentation/devicetree/bindings/input/pwm-beeper.txt<br/>deleted file mode 100644<br/>index 8fc0e48c20db..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/pwm-beeper.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/pwm-beeper.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-* PWM beeper device tree bindings</div><div class='del'>-</div><div class='del'>-Registers a PWM device as beeper.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "pwm-beeper"</div><div class='del'>-- pwms: phandle to the physical PWM device</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- amp-supply: phandle to a regulator that acts as an amplifier for the beeper</div><div class='del'>-- beeper-hz:  bell frequency in Hz</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-beeper_amp: amplifier {</div><div class='del'>-	compatible = "fixed-regulator";</div><div class='del'>-	gpios = &lt;&amp;gpio0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-beeper {</div><div class='del'>-	compatible = "pwm-beeper";</div><div class='del'>-	pwms = &lt;&amp;pwm0&gt;;</div><div class='del'>-	amp-supply = &lt;&amp;beeper_amp&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/pwm-beeper.yaml b/Documentation/devicetree/bindings/input/pwm-beeper.yaml<br/>new file mode 100644<br/>index 000000000000..a7611c206989<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/pwm-beeper.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/pwm-beeper.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/pwm-beeper.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: PWM beeper</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sascha Hauer &lt;s.hauer@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pwm-beeper</div><div class='add'>+</div><div class='add'>+  pwms:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  amp-supply:</div><div class='add'>+    description: an amplifier for the beeper</div><div class='add'>+</div><div class='add'>+  beeper-hz:</div><div class='add'>+    description: bell frequency in Hz</div><div class='add'>+    minimum: 10</div><div class='add'>+    maximum: 10000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - pwms</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    beeper {</div><div class='add'>+        compatible = "pwm-beeper";</div><div class='add'>+        pwms = &lt;&amp;pwm0&gt;;</div><div class='add'>+        amp-supply = &lt;&amp;beeper_amp&gt;;</div><div class='add'>+        beeper-hz = &lt;1000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/pwm-vibrator.yaml b/Documentation/devicetree/bindings/input/pwm-vibrator.yaml<br/>index a70a636ee112..d32716c604fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/pwm-vibrator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/pwm-vibrator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/pwm-vibrator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/pwm-vibrator.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/input/pwm-vibrator.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/input/pwm-vibrator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: PWM vibrator</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/qcom,pm8921-pwrkey.yaml b/Documentation/devicetree/bindings/input/qcom,pm8921-pwrkey.yaml<br/>new file mode 100644<br/>index 000000000000..12c74c083258<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/qcom,pm8921-pwrkey.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/qcom,pm8921-pwrkey.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/qcom,pm8921-pwrkey.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm PM8921 PMIC Power Key</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: input.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,pm8921-pwrkey</div><div class='add'>+          - qcom,pm8058-pwrkey</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,pm8018-pwrkey</div><div class='add'>+          - const: qcom,pm8921-pwrkey</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: key release</div><div class='add'>+      - description: key press</div><div class='add'>+</div><div class='add'>+  debounce:</div><div class='add'>+    description:</div><div class='add'>+      Time in microseconds that key must be pressed or</div><div class='add'>+      released for state change interrupt to trigger.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  pull-up:</div><div class='add'>+    description:</div><div class='add'>+      Presence of this property indicates that the KPDPWR_N</div><div class='add'>+      pin should be configured for pull up.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+   #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+   ssbi {</div><div class='add'>+     #address-cells = &lt;1&gt;;</div><div class='add'>+     #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+     pmic@0 {</div><div class='add'>+       reg = &lt;0x0&gt;;</div><div class='add'>+       #address-cells = &lt;1&gt;;</div><div class='add'>+       #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+       pwrkey@1c {</div><div class='add'>+         compatible = "qcom,pm8921-pwrkey";</div><div class='add'>+         reg = &lt;0x1c&gt;;</div><div class='add'>+         interrupt-parent = &lt;&amp;pmicint&gt;;</div><div class='add'>+         interrupts = &lt;50 IRQ_TYPE_EDGE_RISING&gt;, &lt;51 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+         debounce = &lt;15625&gt;;</div><div class='add'>+         pull-up;</div><div class='add'>+       };</div><div class='add'>+     };</div><div class='add'>+   };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-pwrkey.txt b/Documentation/devicetree/bindings/input/qcom,pm8xxx-pwrkey.txt<br/>deleted file mode 100644<br/>index 588536cc96ed..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/qcom,pm8xxx-pwrkey.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/qcom,pm8xxx-pwrkey.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-Qualcomm PM8xxx PMIC Power Key</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,pm8058-pwrkey"</div><div class='del'>-		    "qcom,pm8921-pwrkey"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: address of power key control register</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the first interrupt specifies the key release interrupt</div><div class='del'>-		    and the second interrupt specifies the key press interrupt.</div><div class='del'>-		    The format of the specifier is defined by the binding</div><div class='del'>-		    document describing the node's interrupt parent.</div><div class='del'>-</div><div class='del'>-- debounce:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: time in microseconds that key must be pressed or release</div><div class='del'>-		    for state change interrupt to trigger.</div><div class='del'>-</div><div class='del'>-- pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;empty&gt;</div><div class='del'>-	Definition: presence of this property indicates that the KPDPWR_N pin</div><div class='del'>-		    should be configured for pull up.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-</div><div class='del'>-	pwrkey@1c {</div><div class='del'>-		compatible = "qcom,pm8921-pwrkey";</div><div class='del'>-		reg = &lt;0x1c&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;pmicintc&gt;;</div><div class='del'>-		interrupts = &lt;50 1&gt;, &lt;51 1&gt;;</div><div class='del'>-		debounce = &lt;15625&gt;;</div><div class='del'>-		pull-up;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt<br/>deleted file mode 100644<br/>index 64bb990075c3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-Qualcomm PM8xxx PMIC Vibrator</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,pm8058-vib"</div><div class='del'>-		    "qcom,pm8916-vib"</div><div class='del'>-		    "qcom,pm8921-vib"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: address of vibration control register</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-</div><div class='del'>-	vibrator@4a {</div><div class='del'>-		compatible = "qcom,pm8058-vib";</div><div class='del'>-		reg = &lt;0x4a&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml b/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml<br/>new file mode 100644<br/>index 000000000000..c8832cd0d7da<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/qcom,pm8xxx-vib.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/qcom,pm8xxx-vib.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm PM8xxx PMIC Vibrator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,pm8058-vib</div><div class='add'>+      - qcom,pm8916-vib</div><div class='add'>+      - qcom,pm8921-vib</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pmic {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        vibrator@4a {</div><div class='add'>+            compatible = "qcom,pm8058-vib";</div><div class='add'>+            reg = &lt;0x4a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/regulator-haptic.yaml b/Documentation/devicetree/bindings/input/regulator-haptic.yaml<br/>index b1ae72f9cd2d..cf63f834dd7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/regulator-haptic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/regulator-haptic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/regulator-haptic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/regulator-haptic.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/input/regulator-haptic.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/input/regulator-haptic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Regulator Haptic Device Tree Bindings</div><div class='add'>+title: Regulator Haptic</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jaewon Kim &lt;jaewon02.kim@samsung.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/snvs-pwrkey.txt b/Documentation/devicetree/bindings/input/snvs-pwrkey.txt<br/>deleted file mode 100644<br/>index 70c14250323b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/snvs-pwrkey.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/snvs-pwrkey.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-See Documentation/devicetree/bindings/crypto/fsl-sec4.txt</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml b/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml<br/>index 5d67fc8ebc18..a401a0bfcbec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/sprd,sc27xx-vibrator.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/sprd,sc27xx-vibrator.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Spreadtrum SC27xx PMIC Vibrator Device Tree Bindings</div><div class='add'>+title: Spreadtrum SC27xx PMIC Vibrator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/ti,drv260x.txt b/Documentation/devicetree/bindings/input/ti,drv260x.txt<br/>deleted file mode 100644<br/>index 4c5312eaaa85..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/ti,drv260x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/ti,drv260x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,50 +0,0 @@</div><div class='del'>-* Texas Instruments - drv260x Haptics driver family</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible - One of:</div><div class='del'>-		"ti,drv2604" - DRV2604</div><div class='del'>-		"ti,drv2605" - DRV2605</div><div class='del'>-		"ti,drv2605l" - DRV2605L</div><div class='del'>-	- reg -  I2C slave address</div><div class='del'>-	- vbat-supply - Required supply regulator</div><div class='del'>-	- mode - Power up mode of the chip (defined in include/dt-bindings/input/ti-drv260x.h)</div><div class='del'>-		DRV260X_LRA_MODE - Linear Resonance Actuator mode (Piezoelectric)</div><div class='del'>-		DRV260X_LRA_NO_CAL_MODE - This is a LRA Mode but there is no calibration</div><div class='del'>-				sequence during init.  And the device is configured for real</div><div class='del'>-				time playback mode (RTP mode).</div><div class='del'>-		DRV260X_ERM_MODE - Eccentric Rotating Mass mode (Rotary vibrator)</div><div class='del'>-	- library-sel - These are ROM based waveforms pre-programmed into the IC.</div><div class='del'>-				This should be set to set the library to use at power up.</div><div class='del'>-				(defined in include/dt-bindings/input/ti-drv260x.h)</div><div class='del'>-		DRV260X_LIB_EMPTY - Do not use a pre-programmed library</div><div class='del'>-		DRV260X_ERM_LIB_A - Pre-programmed Library</div><div class='del'>-		DRV260X_ERM_LIB_B - Pre-programmed Library</div><div class='del'>-		DRV260X_ERM_LIB_C - Pre-programmed Library</div><div class='del'>-		DRV260X_ERM_LIB_D - Pre-programmed Library</div><div class='del'>-		DRV260X_ERM_LIB_E - Pre-programmed Library</div><div class='del'>-		DRV260X_ERM_LIB_F - Pre-programmed Library</div><div class='del'>-		DRV260X_LIB_LRA - Pre-programmed LRA Library</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- enable-gpio - gpio pin to enable/disable the device.</div><div class='del'>-	- vib-rated-mv - The rated voltage of the actuator in millivolts.</div><div class='del'>-			  If this is not set then the value will be defaulted to</div><div class='del'>-			  3.2 v.</div><div class='del'>-	- vib-overdrive-mv - The overdrive voltage of the actuator in millivolts.</div><div class='del'>-			  If this is not set then the value will be defaulted to</div><div class='del'>-			  3.2 v.</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-haptics: haptics@5a {</div><div class='del'>-	compatible = "ti,drv2605l";</div><div class='del'>-	reg = &lt;0x5a&gt;;</div><div class='del'>-	vbat-supply = &lt;&amp;vbat&gt;;</div><div class='del'>-	enable-gpio = &lt;&amp;gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	mode = &lt;DRV260X_LRA_MODE&gt;;</div><div class='del'>-	library-sel = &lt;DRV260X_LIB_LRA&gt;;</div><div class='del'>-	vib-rated-mv = &lt;3200&gt;;</div><div class='del'>-	vib-overdrive-mv = &lt;3200&gt;;</div><div class='del'>-}</div><div class='del'>-</div><div class='del'>-For more product information please see the link below:</div><div class='del'>-http://www.ti.com/product/drv2605</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/ti,drv260x.yaml b/Documentation/devicetree/bindings/input/ti,drv260x.yaml<br/>new file mode 100644<br/>index 000000000000..c6245c5b9e2e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/ti,drv260x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/ti,drv260x.yaml</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/ti,drv260x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments - drv260x Haptics driver family</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,drv2604</div><div class='add'>+      - ti,drv2605</div><div class='add'>+      - ti,drv2605l</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vbat-supply:</div><div class='add'>+    description: Power supply to the haptic motor</div><div class='add'>+</div><div class='add'>+  # TODO: Deprecate 'mode' in favor of differently named property</div><div class='add'>+  mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Power up mode of the chip</div><div class='add'>+      (defined in include/dt-bindings/input/ti-drv260x.h)</div><div class='add'>+</div><div class='add'>+      DRV260X_LRA_MODE</div><div class='add'>+        Linear Resonance Actuator mode (Piezoelectric)</div><div class='add'>+</div><div class='add'>+      DRV260X_LRA_NO_CAL_MODE</div><div class='add'>+        This is a LRA Mode but there is no calibration sequence during init.</div><div class='add'>+        And the device is configured for real time playback mode (RTP mode).</div><div class='add'>+</div><div class='add'>+      DRV260X_ERM_MODE</div><div class='add'>+        Eccentric Rotating Mass mode (Rotary vibrator)</div><div class='add'>+    enum: [ 0, 1, 2 ]</div><div class='add'>+</div><div class='add'>+  library-sel:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      These are ROM based waveforms pre-programmed into the IC.</div><div class='add'>+      This should be set to set the library to use at power up.</div><div class='add'>+      (defined in include/dt-bindings/input/ti-drv260x.h)</div><div class='add'>+</div><div class='add'>+      DRV260X_LIB_EMPTY - Do not use a pre-programmed library</div><div class='add'>+      DRV260X_ERM_LIB_A - Pre-programmed Library</div><div class='add'>+      DRV260X_ERM_LIB_B - Pre-programmed Library</div><div class='add'>+      DRV260X_ERM_LIB_C - Pre-programmed Library</div><div class='add'>+      DRV260X_ERM_LIB_D - Pre-programmed Library</div><div class='add'>+      DRV260X_ERM_LIB_E - Pre-programmed Library</div><div class='add'>+      DRV260X_ERM_LIB_F - Pre-programmed Library</div><div class='add'>+      DRV260X_LIB_LRA - Pre-programmed LRA Library</div><div class='add'>+    enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ]</div><div class='add'>+</div><div class='add'>+  enable-gpio:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vib-rated-mv:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      The rated voltage of the actuator in millivolts.</div><div class='add'>+      If this is not set then the value will be defaulted to 3200 mV.</div><div class='add'>+    default: 3200</div><div class='add'>+</div><div class='add'>+  vib-overdrive-mv:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      The overdrive voltage of the actuator in millivolts.</div><div class='add'>+      If this is not set then the value will be defaulted to 3200 mV.</div><div class='add'>+    default: 3200</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - enable-gpios</div><div class='add'>+  - mode</div><div class='add'>+  - library-sel</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/input/ti-drv260x.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        haptics@5a {</div><div class='add'>+            compatible = "ti,drv2605l";</div><div class='add'>+            reg = &lt;0x5a&gt;;</div><div class='add'>+            vbat-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            mode = &lt;DRV260X_LRA_MODE&gt;;</div><div class='add'>+            library-sel = &lt;DRV260X_LIB_LRA&gt;;</div><div class='add'>+            vib-rated-mv = &lt;3200&gt;;</div><div class='add'>+            vib-overdrive-mv = &lt;3200&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt b/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt<br/>index f40f21c642b9..b8db975e9f77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/auo_pixcir_ts.txt</a></div><div class='hunk'>@@ -17,10 +17,10 @@ Example:</div><div class='ctx'> 		auo_pixcir_ts@5c {</div><div class='ctx'> 			compatible = "auo,auo_pixcir_ts";</div><div class='ctx'> 			reg = &lt;0x5c&gt;;</div><div class='del'>-			interrupts = &lt;2 0&gt;;</div><div class='add'>+			interrupts = &lt;2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='del'>-			gpios = &lt;&amp;gpf 2 0 2&gt;, /* INT */</div><div class='del'>-				&lt;&amp;gpf 5 1 0&gt;; /* RST */</div><div class='add'>+			gpios = &lt;&amp;gpf 2 0 GPIO_LEVEL_HIGH&gt;, /* INT */</div><div class='add'>+				&lt;&amp;gpf 5 1 GPIO_LEVEL_LOW&gt;; /* RST */</div><div class='ctx'> </div><div class='ctx'> 			x-size = &lt;800&gt;;</div><div class='ctx'> 			y-size = &lt;600&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml b/Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml<br/>index 9df685bdc5db..74a8a01e0745 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/chipone,icn8318.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/chipone,icn8318.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ChipOne ICN8318 Touchscreen Controller Device Tree Bindings</div><div class='add'>+title: ChipOne ICN8318 Touchscreen Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt<br/>index 2e1490a8fe74..ca304357c374 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/colibri-vf50-ts.txt</a></div><div class='hunk'>@@ -3,15 +3,16 @@</div><div class='ctx'> Required Properties:</div><div class='ctx'> - compatible must be toradex,vf50-touchscreen</div><div class='ctx'> - io-channels: adc channels being used by the Colibri VF50 module</div><div class='add'>+    IIO ADC for Y-, X-, Y+, X+ connections</div><div class='ctx'> - xp-gpios: FET gate driver for input of X+</div><div class='ctx'> - xm-gpios: FET gate driver for input of X-</div><div class='ctx'> - yp-gpios: FET gate driver for input of Y+</div><div class='ctx'> - ym-gpios: FET gate driver for input of Y-</div><div class='del'>-- interrupts: pen irq interrupt for touch detection</div><div class='del'>-- pinctrl-names: "idle", "default", "gpios"</div><div class='del'>-- pinctrl-0: pinctrl node for pen/touch detection state pinmux</div><div class='add'>+- interrupts: pen irq interrupt for touch detection, signal from X plate</div><div class='add'>+- pinctrl-names: "idle", "default"</div><div class='add'>+- pinctrl-0: pinctrl node for pen/touch detection, pinctrl must provide</div><div class='add'>+    pull-up resistor on X+, X-.</div><div class='ctx'> - pinctrl-1: pinctrl node for X/Y and pressure measurement (ADC) state pinmux</div><div class='del'>-- pinctrl-2: pinctrl node for gpios functioning as FET gate drivers</div><div class='ctx'> - vf50-ts-min-pressure: pressure level at which to stop measuring X/Y values</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='hunk'>@@ -26,9 +27,8 @@ Example:</div><div class='ctx'> 		ym-gpios = &lt;&amp;gpio0 4 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='ctx'> 		interrupts = &lt;8 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		pinctrl-names = "idle","default","gpios";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_touchctrl_idle&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;pinctrl_touchctrl_default&gt;;</div><div class='del'>-		pinctrl-2 = &lt;&amp;pinctrl_touchctrl_gpios&gt;;</div><div class='add'>+		pinctrl-names = "idle","default";</div><div class='add'>+		pinctrl-0 = &lt;&amp;pinctrl_touchctrl_idle&gt;, &lt;&amp;pinctrl_touchctrl_gpios&gt;;</div><div class='add'>+		pinctrl-1 = &lt;&amp;pinctrl_touchctrl_default&gt;, &lt;&amp;pinctrl_touchctrl_gpios&gt;;</div><div class='ctx'> 		vf50-ts-min-pressure = &lt;200&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml b/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml<br/>index 3225c8d1fdaf..86a6d18f952a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma140.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/cypress,cy8ctma140.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cypress CY8CTMA140 series touchscreen controller bindings</div><div class='add'>+title: Cypress CY8CTMA140 series touchscreen controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml b/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml<br/>index 762e56ee90cd..4dfbb93678b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/cypress,cy8ctma340.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/cypress,cy8ctma340.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cypress CY8CTMA340 series touchscreen controller bindings</div><div class='add'>+title: Cypress CY8CTMA340 series touchscreen controller</div><div class='ctx'> </div><div class='ctx'> description: The Cypress CY8CTMA340 series (also known as "CYTTSP" after</div><div class='ctx'>   the marketing name Cypress TrueTouch Standard Product) touchscreens can</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/cypress,tt21000.yaml b/Documentation/devicetree/bindings/input/touchscreen/cypress,tt21000.yaml<br/>new file mode 100644<br/>index 000000000000..1959ec394768<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/cypress,tt21000.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/cypress,tt21000.yaml</a></div><div class='hunk'>@@ -0,0 +1,106 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/touchscreen/cypress,tt21000.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cypress TT21000 touchscreen controller</div><div class='add'>+</div><div class='add'>+description: The Cypress TT21000 series (also known as "CYTTSP5" after</div><div class='add'>+  the marketing name Cypress TrueTouch Standard Product series 5).</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alistair Francis &lt;alistair@alistair23.me&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: touchscreen.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cypress,tt21000</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: Regulator for voltage.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  linux,keycodes:</div><div class='add'>+    description: EV_ABS specific event code generated by the axis.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^button@[0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: ../input.yaml#</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+      linux,keycodes:</div><div class='add'>+        description: Keycode to emit</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - linux,keycodes</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - vdd-supply</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        touchscreen@24 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            compatible = "cypress,tt21000";</div><div class='add'>+            reg = &lt;0x24&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;tp_reset_ds203&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+            interrupts = &lt;1 5 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;pio 7 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;reg_touch&gt;;</div><div class='add'>+</div><div class='add'>+            button@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                linux,keycodes = &lt;KEY_HOMEPAGE&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            button@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                linux,keycodes = &lt;KEY_MENU&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            button@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                linux,keycodes = &lt;KEY_BACK&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml b/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml<br/>index 2e8da7470513..ef4c841387bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/edt-ft5x06.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: FocalTech EDT-FT5x06 Polytouch Bindings</div><div class='add'>+title: FocalTech EDT-FT5x06 Polytouch</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>              There are 5 variants of the chip for various touch panel sizes</div><div class='hunk'>@@ -85,6 +85,14 @@ properties:</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 80</div><div class='ctx'> </div><div class='add'>+  report-rate-hz:</div><div class='add'>+    description: |</div><div class='add'>+                 Allows setting the scan rate in Hertz.</div><div class='add'>+                  M06 supports range from 30 to 140 Hz.</div><div class='add'>+                  M12 supports range from 1 to 255 Hz.</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 255</div><div class='add'>+</div><div class='ctx'>   touchscreen-size-x: true</div><div class='ctx'>   touchscreen-size-y: true</div><div class='ctx'>   touchscreen-fuzz-x: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt b/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt<br/>index 92fb2620f5e2..ebbe93810574 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/egalax-ts.txt</a></div><div class='hunk'>@@ -13,6 +13,6 @@ Example:</div><div class='ctx'> 		compatible = "eeti,egalax_ts";</div><div class='ctx'> 		reg = &lt;0x04&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='del'>-		interrupts = &lt;9 2&gt;;</div><div class='del'>-		wakeup-gpios = &lt;&amp;gpio1 9 0&gt;;</div><div class='add'>+		interrupts = &lt;9 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+		wakeup-gpios = &lt;&amp;gpio1 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt b/Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt<br/>index 5eef5e7d6aae..c9f2c9f578e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/ektf2127.txt</a></div><div class='hunk'>@@ -6,7 +6,7 @@ Required properties:</div><div class='ctx'>  - interrupts		  : interrupt specification for the ektf2127 interrupt</div><div class='ctx'>  - power-gpios		  : GPIO specification for the pin connected to the</div><div class='ctx'> 			    ektf2127's wake input. This needs to be driven high</div><div class='del'>-			    to take ektf2127 out of it's low power state</div><div class='add'>+			    to take ektf2127 out of its low power state</div><div class='ctx'> </div><div class='ctx'> For additional optional properties see: touchscreen.txt</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml b/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml<br/>index a9b53c2e6f0a..3255c2c8951a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/input/touchscreen/elan,elants_i2c.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/input/touchscreen/elan,elants_i2c.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Elantech I2C Touchscreen</div><div class='ctx'> </div><div class='hunk'>@@ -14,9 +14,13 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - elan,ektf3624</div><div class='del'>-      - elan,ekth3500</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - elan,ektf3624</div><div class='add'>+          - elan,ekth3500</div><div class='add'>+      - items:</div><div class='add'>+          - const: elan,ekth3915</div><div class='add'>+          - const: elan,ekth3500</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml b/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml<br/>index 93f2ce3130ae..3d016b87c8df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/goodix.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/goodix.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/goodix.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/goodix.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Goodix GT9xx series touchscreen controller Bindings</div><div class='add'>+title: Goodix GT9xx series touchscreen controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;</div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - goodix,gt1151</div><div class='add'>+      - goodix,gt1158</div><div class='ctx'>       - goodix,gt5663</div><div class='ctx'>       - goodix,gt5688</div><div class='ctx'>       - goodix,gt911</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/himax,hx83112b.yaml b/Documentation/devicetree/bindings/input/touchscreen/himax,hx83112b.yaml<br/>new file mode 100644<br/>index 000000000000..f42b23d532eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/himax,hx83112b.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/himax,hx83112b.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/touchscreen/himax,hx83112b.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Himax hx83112b touchscreen controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Job Noorman &lt;job@noorman.info&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: touchscreen.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - himax,hx83112b</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  touchscreen-inverted-x: true</div><div class='add'>+  touchscreen-inverted-y: true</div><div class='add'>+  touchscreen-size-x: true</div><div class='add'>+  touchscreen-size-y: true</div><div class='add'>+  touchscreen-swapped-x-y: true</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - touchscreen-size-x</div><div class='add'>+  - touchscreen-size-y</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      touchscreen@48 {</div><div class='add'>+        compatible = "himax,hx83112b";</div><div class='add'>+        reg = &lt;0x48&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+        interrupts = &lt;65 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        touchscreen-size-x = &lt;1080&gt;;</div><div class='add'>+        touchscreen-size-y = &lt;2160&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;tlmm 64 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml b/Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml<br/>index 942562f1e45b..874c0781c476 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/hycon,hy46xx.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/hycon,hy46xx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Hycon HY46XX series touchscreen controller bindings</div><div class='add'>+title: Hycon HY46XX series touchscreen controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   There are 6 variants of the chip for various touch panel sizes and cover lens material</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/hynitron,cstxxx.yaml b/Documentation/devicetree/bindings/input/touchscreen/hynitron,cstxxx.yaml<br/>new file mode 100644<br/>index 000000000000..9cb5d4af00f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/hynitron,cstxxx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/hynitron,cstxxx.yaml</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/touchscreen/hynitron,cstxxx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Hynitron cstxxx series touchscreen controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Bindings for Hynitron cstxxx series multi-touch touchscreen</div><div class='add'>+  controllers.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Morgan &lt;macromorgan@hotmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: touchscreen.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - hynitron,cst340</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  touchscreen-size-x: true</div><div class='add'>+  touchscreen-size-y: true</div><div class='add'>+  touchscreen-inverted-x: true</div><div class='add'>+  touchscreen-inverted-y: true</div><div class='add'>+  touchscreen-swapped-x-y: true</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      touchscreen@1a {</div><div class='add'>+        compatible = "hynitron,cst340";</div><div class='add'>+        reg = &lt;0x1a&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+        interrupts = &lt;9 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio4 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        touchscreen-size-x = &lt;640&gt;;</div><div class='add'>+        touchscreen-size-y = &lt;480&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml b/Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml<br/>index a190e7baac31..9f7328999756 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/ilitek_ts_i2c.yaml</a></div><div class='hunk'>@@ -15,6 +15,9 @@ allOf:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - ilitek,ili210x</div><div class='add'>+      - ilitek,ili2117</div><div class='add'>+      - ilitek,ili2120</div><div class='ctx'>       - ilitek,ili2130</div><div class='ctx'>       - ilitek,ili2131</div><div class='ctx'>       - ilitek,ili2132</div><div class='hunk'>@@ -22,11 +25,12 @@ properties:</div><div class='ctx'>       - ilitek,ili2322</div><div class='ctx'>       - ilitek,ili2323</div><div class='ctx'>       - ilitek,ili2326</div><div class='add'>+      - ilitek,ili251x</div><div class='ctx'>       - ilitek,ili2520</div><div class='ctx'>       - ilitek,ili2521</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    const: 0x41</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -50,7 +54,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='del'>-  - reset-gpios</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml b/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml<br/>index e3a2b871e50c..0d6b033fd5fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/imagis,ist3038c.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Imagis IST30XXC family touchscreen controller bindings</div><div class='add'>+title: Imagis IST30XXC family touchscreen controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Markuss Broks &lt;markuss.broks@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml b/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml<br/>index 62366886fb3e..fdd02898e249 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/melfas,mms114.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/melfas,mms114.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Melfas MMS114 family touchscreen controller bindings</div><div class='add'>+title: Melfas MMS114 family touchscreen controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml b/Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml<br/>index 3a42c23faf6f..ddbbc820c7e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/mstar,msg2638.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/mstar,msg2638.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MStar msg2638 touchscreen controller Bindings</div><div class='add'>+title: MStar msg2638 touchscreen controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vincent Knecht &lt;vincent.knecht@mailoo.org&gt;</div><div class='hunk'>@@ -14,7 +14,9 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mstar,msg2638</div><div class='add'>+    enum:</div><div class='add'>+      - mstar,msg2138</div><div class='add'>+      - mstar,msg2638</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     const: 0x26</div><div class='hunk'>@@ -34,6 +36,10 @@ properties:</div><div class='ctx'>   touchscreen-size-x: true</div><div class='ctx'>   touchscreen-size-y: true</div><div class='ctx'> </div><div class='add'>+  linux,keycodes:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml b/Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml<br/>index f9998edbff70..3305eda5ed88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/pixcir,pixcir_ts.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/pixcir,pixcir_ts.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Pixcir Touchscreen Controller Device Tree Bindings</div><div class='add'>+title: Pixcir Touchscreen Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml b/Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml<br/>index eec6f7f6f0a3..95b554be25b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/silead,gsl1680.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/silead,gsl1680.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Silead GSL1680 Touchscreen Controller Device Tree Bindings</div><div class='add'>+title: Silead GSL1680 Touchscreen Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.txt b/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.txt<br/>deleted file mode 100644<br/>index 0a5d0cb4a280..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/st,stmfts.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-* ST-Microelectronics FingerTip touchscreen controller</div><div class='del'>-</div><div class='del'>-The ST-Microelectronics FingerTip device provides a basic touchscreen</div><div class='del'>-functionality. Along with it the user can enable the touchkey which can work as</div><div class='del'>-a basic HOME and BACK key for phones.</div><div class='del'>-</div><div class='del'>-The driver supports also hovering as an absolute single touch event with x, y, z</div><div class='del'>-coordinates.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible		: must be "st,stmfts"</div><div class='del'>-- reg			: I2C slave address, (e.g. 0x49)</div><div class='del'>-- interrupts		: interrupt specification</div><div class='del'>-- avdd-supply		: analogic power supply</div><div class='del'>-- vdd-supply		: power supply</div><div class='del'>-- touchscreen-size-x	: see touchscreen.txt</div><div class='del'>-- touchscreen-size-y	: see touchscreen.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- touch-key-connected	: specifies whether the touchkey feature is connected</div><div class='del'>-- ledvdd-supply		: power supply to the touch key leds</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-i2c@00000000 {</div><div class='del'>-</div><div class='del'>-	/* ... */</div><div class='del'>-</div><div class='del'>-	touchscreen@49 {</div><div class='del'>-		compatible = "st,stmfts";</div><div class='del'>-		reg = &lt;0x49&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpa1&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_NONE&gt;;</div><div class='del'>-		touchscreen-size-x = &lt;1599&gt;;</div><div class='del'>-		touchscreen-size-y = &lt;2559&gt;;</div><div class='del'>-		touch-key-connected;</div><div class='del'>-		avdd-supply = &lt;&amp;ldo30_reg&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;ldo31_reg&gt;;</div><div class='del'>-		ledvdd-supply = &lt;&amp;ldo33_reg&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml b/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml<br/>new file mode 100644<br/>index 000000000000..c593ae63d0ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/st,stmfts.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/input/touchscreen/st,stmfts.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ST-Microelectronics FingerTip touchscreen controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The ST-Microelectronics FingerTip device provides a basic touchscreen</div><div class='add'>+  functionality. Along with it the user can enable the touchkey which can work</div><div class='add'>+  as a basic HOME and BACK key for phones.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: touchscreen.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stmfts</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analogic power supply</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ledvdd-supply:</div><div class='add'>+    description: Power supply to the touch key leds</div><div class='add'>+</div><div class='add'>+  touch-key-connected:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: The touchkey feature is connected</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: Power supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - avdd-supply</div><div class='add'>+  - interrupts</div><div class='add'>+  - vdd-supply</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        touchscreen@49 {</div><div class='add'>+            compatible = "st,stmfts";</div><div class='add'>+            reg = &lt;0x49&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpa1&gt;;</div><div class='add'>+            interrupts = &lt;1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            touchscreen-size-x = &lt;1599&gt;;</div><div class='add'>+            touchscreen-size-y = &lt;2559&gt;;</div><div class='add'>+            touch-key-connected;</div><div class='add'>+            avdd-supply = &lt;&amp;ldo30_reg&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;ldo31_reg&gt;;</div><div class='add'>+            ledvdd-supply = &lt;&amp;ldo33_reg&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt b/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt<br/>index c549924603d2..238b51555c04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/stmpe.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/stmpe.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/stmpe.txt</a></div><div class='hunk'>@@ -54,8 +54,7 @@ Optional properties common with MFD (deprecated):</div><div class='ctx'> 				1 -&gt; 3.25 MHz</div><div class='ctx'> 				2 || 3 -&gt; 6.5 MHz</div><div class='ctx'> </div><div class='del'>-Node name must be stmpe_touchscreen and should be child node of stmpe node to</div><div class='del'>-which it belongs.</div><div class='add'>+Node should be child node of stmpe node to which it belongs.</div><div class='ctx'> </div><div class='ctx'> Note that common ADC settings of stmpe_touchscreen (child) will take precedence</div><div class='ctx'> over the settings done in MFD.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml b/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml<br/>index 938aab016cc2..7187c390b2f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/ti,tsc2005.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/ti,tsc2005.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments TSC2004 and TSC2005 touchscreen controller bindings</div><div class='add'>+title: Texas Instruments TSC2004 and TSC2005 touchscreen controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marek Vasut &lt;marex@denx.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml<br/>index 4b5b212c772c..895592da9626 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/touchscreen.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common touchscreen Bindings</div><div class='add'>+title: Common touchscreen</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml b/Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml<br/>index b4e5ba7c0b49..b1507463a03e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/input/touchscreen/zinitix,bt400.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/input/touchscreen/zinitix,bt400.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Zinitix BT4xx and BT5xx series touchscreen controller bindings</div><div class='add'>+title: Zinitix BT4xx and BT5xx series touchscreen controller</div><div class='ctx'> </div><div class='ctx'> description: The Zinitix BT4xx and BT5xx series of touchscreen controllers</div><div class='ctx'>   are Korea-produced touchscreens with embedded microcontrollers. The</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml b/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml<br/>index b8204ed22dd5..f7a5e31c506e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/fsl,imx8m-noc.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Generic i.MX bus frequency device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Leonard Crestez &lt;leonard.crestez@nxp.com&gt;</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The i.MX SoC family has multiple buses for which clock frequency (and</div><div class='hunk'>@@ -26,14 +26,16 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - fsl,imx8mn-nic</div><div class='ctx'>               - fsl,imx8mm-nic</div><div class='add'>+              - fsl,imx8mn-nic</div><div class='add'>+              - fsl,imx8mp-nic</div><div class='ctx'>               - fsl,imx8mq-nic</div><div class='ctx'>           - const: fsl,imx8m-nic</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - fsl,imx8mn-noc</div><div class='ctx'>               - fsl,imx8mm-noc</div><div class='add'>+              - fsl,imx8mn-noc</div><div class='add'>+              - fsl,imx8mp-noc</div><div class='ctx'>               - fsl,imx8mq-noc</div><div class='ctx'>           - const: fsl,imx8m-noc</div><div class='ctx'>       - const: fsl,imx8m-nic</div><div class='hunk'>@@ -45,7 +47,8 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   operating-points-v2: true</div><div class='del'>-  opp-table: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='ctx'> </div><div class='ctx'>   fsl,ddrc:</div><div class='ctx'>     $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml b/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml<br/>new file mode 100644<br/>index 000000000000..58611ba2a0f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/mediatek,cci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Cache Coherent Interconnect (CCI) frequency and voltage scaling</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jia-Wei Chang &lt;jia-wei.chang@mediatek.com&gt;</div><div class='add'>+  - Johnson Wang &lt;johnson.wang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek Cache Coherent Interconnect (CCI) is a hardware engine used by</div><div class='add'>+  MT8183 and MT8186 SoCs to scale the frequency and adjust the voltage in</div><div class='add'>+  hardware. It can also optimize the voltage to reduce the power consumption.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8183-cci</div><div class='add'>+      - mediatek,mt8186-cci</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          The multiplexer for clock input of the bus.</div><div class='add'>+      - description:</div><div class='add'>+          A parent of "bus" clock which is used as an intermediate clock source</div><div class='add'>+          when the original clock source (PLL) is under transition and not</div><div class='add'>+          stable yet.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cci</div><div class='add'>+      - const: intermediate</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  proc-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle of the regulator for CCI that provides the supply voltage.</div><div class='add'>+</div><div class='add'>+  sram-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle of the regulator for sram of CCI that provides the supply</div><div class='add'>+      voltage. When it is present, the implementation needs to do</div><div class='add'>+      "voltage tracking" to step by step scale up/down Vproc and Vsram to fit</div><div class='add'>+      SoC specific needs. When absent, the voltage scaling flow is handled by</div><div class='add'>+      hardware, hence no software "voltage tracking" is needed.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - operating-points-v2</div><div class='add'>+  - proc-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    cci: cci {</div><div class='add'>+        compatible = "mediatek,mt8183-cci";</div><div class='add'>+        clocks = &lt;&amp;mcucfg CLK_MCU_BUS_SEL&gt;,</div><div class='add'>+                 &lt;&amp;topckgen CLK_TOP_ARMPLL_DIV_PLL1&gt;;</div><div class='add'>+        clock-names = "cci", "intermediate";</div><div class='add'>+        operating-points-v2 = &lt;&amp;cci_opp&gt;;</div><div class='add'>+        proc-supply = &lt;&amp;mt6358_vproc12_reg&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    cci_opp: opp-table-cci {</div><div class='add'>+        compatible = "operating-points-v2";</div><div class='add'>+        opp-shared;</div><div class='add'>+        opp2_00: opp-273000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;273000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;650000&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_01: opp-338000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;338000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;687500&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_02: opp-403000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;403000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;718750&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_03: opp-463000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;463000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;756250&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_04: opp-546000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;546000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;800000&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_05: opp-624000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;624000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;818750&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_06: opp-689000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;689000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;850000&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_07: opp-767000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;767000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;868750&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_08: opp-845000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;845000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;893750&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_09: opp-871000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;871000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;906250&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_10: opp-923000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;923000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;931250&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_11: opp-962000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;962000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;943750&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_12: opp-1027000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;1027000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;975000&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_13: opp-1092000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;1092000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;1000000&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_14: opp-1144000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;1144000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;1025000&gt;;</div><div class='add'>+        };</div><div class='add'>+        opp2_15: opp-1196000000 {</div><div class='add'>+            opp-hz = /bits/ 64 &lt;1196000000&gt;;</div><div class='add'>+            opp-microvolt = &lt;1050000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml b/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml<br/>index e23df4836c6f..eec987640b37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml</a></div><div class='hunk'>@@ -45,20 +45,20 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   # Example 1: apps bcm_voter on SDM845 SoC should be defined inside &amp;apps_rsc node</div><div class='del'>-  # as defined in Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt</div><div class='add'>+  # as defined in Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml</div><div class='ctx'>   - |</div><div class='ctx'> </div><div class='del'>-    apps_bcm_voter: bcm_voter {</div><div class='add'>+    apps_bcm_voter: bcm-voter {</div><div class='ctx'>         compatible = "qcom,bcm-voter";</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   # Example 2: disp bcm_voter on SDM845 should be defined inside &amp;disp_rsc node</div><div class='del'>-  # as defined in Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt</div><div class='add'>+  # as defined in Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml</div><div class='ctx'>   - |</div><div class='ctx'> </div><div class='ctx'>     #include &lt;dt-bindings/interconnect/qcom,icc.h&gt;</div><div class='ctx'> </div><div class='del'>-    disp_bcm_voter: bcm_voter {</div><div class='add'>+    disp_bcm_voter: bcm-voter {</div><div class='ctx'>         compatible = "qcom,bcm-voter";</div><div class='ctx'>         qcom,tcs-wait = &lt;QCOM_ICC_TAG_AMC&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml<br/>new file mode 100644<br/>index 000000000000..5d17bdcfdf70<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Interconnect Bandwidth Monitor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Bandwidth Monitor measures current throughput on buses between various NoC</div><div class='add'>+  fabrics and provides information when it crosses configured thresholds.</div><div class='add'>+</div><div class='add'>+  Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::</div><div class='add'>+   - Measuring the bandwidth between CPUs and Last Level Cache Controller -</div><div class='add'>+     called just BWMON,</div><div class='add'>+   - Measuring the bandwidth between Last Level Cache Controller and memory</div><div class='add'>+     (DDR) - called LLCC BWMON.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: qcom,msm8998-bwmon       # BWMON v4</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7280-cpu-bwmon</div><div class='add'>+              - qcom,sc8280xp-cpu-bwmon</div><div class='add'>+              - qcom,sdm845-cpu-bwmon</div><div class='add'>+              - qcom,sm8550-cpu-bwmon</div><div class='add'>+          - const: qcom,sdm845-bwmon    # BWMON v4, unified register space</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc8280xp-llcc-bwmon</div><div class='add'>+              - qcom,sm8550-llcc-bwmon</div><div class='add'>+          - const: qcom,sc7280-llcc-bwmon</div><div class='add'>+      - const: qcom,sc7280-llcc-bwmon   # BWMON v5</div><div class='add'>+      - const: qcom,sdm845-llcc-bwmon   # BWMON v5</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    # BWMON v5 uses one register address space, v1-v4 use one or two.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interconnects</div><div class='add'>+  - interrupts</div><div class='add'>+  - operating-points-v2</div><div class='add'>+  - opp-table</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: qcom,msm8998-bwmon</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: monitor</div><div class='add'>+            - const: global</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pmu@1436400 {</div><div class='add'>+        compatible = "qcom,sdm845-cpu-bwmon", "qcom,sdm845-bwmon";</div><div class='add'>+        reg = &lt;0x01436400 0x600&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interconnects = &lt;&amp;gladiator_noc MASTER_APPSS_PROC 3 &amp;mem_noc SLAVE_LLCC 3&gt;;</div><div class='add'>+</div><div class='add'>+        operating-points-v2 = &lt;&amp;cpu_bwmon_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+        cpu_bwmon_opp_table: opp-table {</div><div class='add'>+            compatible = "operating-points-v2";</div><div class='add'>+            opp-0 {</div><div class='add'>+                opp-peak-kBps = &lt;4800000&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-1 {</div><div class='add'>+                opp-peak-kBps = &lt;9216000&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-2 {</div><div class='add'>+                opp-peak-kBps = &lt;15052800&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-3 {</div><div class='add'>+                opp-peak-kBps = &lt;20889600&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-4 {</div><div class='add'>+                opp-peak-kBps = &lt;25497600&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml<br/>index 116e434d0daa..9d0a98d77ae9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sibi Sankar &lt;sibis@codeaurora.org&gt;</div><div class='add'>+  - Sibi Sankar &lt;quic_sibis@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.</div><div class='hunk'>@@ -16,13 +16,23 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,sc7180-osm-l3</div><div class='del'>-      - qcom,sc7280-epss-l3</div><div class='del'>-      - qcom,sc8180x-osm-l3</div><div class='del'>-      - qcom,sdm845-osm-l3</div><div class='del'>-      - qcom,sm8150-osm-l3</div><div class='del'>-      - qcom,sm8250-epss-l3</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7180-osm-l3</div><div class='add'>+              - qcom,sc8180x-osm-l3</div><div class='add'>+              - qcom,sdm845-osm-l3</div><div class='add'>+              - qcom,sm6350-osm-l3</div><div class='add'>+              - qcom,sm8150-osm-l3</div><div class='add'>+          - const: qcom,osm-l3</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7280-epss-l3</div><div class='add'>+              - qcom,sc8280xp-epss-l3</div><div class='add'>+              - qcom,sm6375-cpucp-l3</div><div class='add'>+              - qcom,sm8250-epss-l3</div><div class='add'>+              - qcom,sm8350-epss-l3</div><div class='add'>+          - const: qcom,epss-l3</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -56,7 +66,7 @@ examples:</div><div class='ctx'>     #define RPMH_CXO_CLK        0</div><div class='ctx'> </div><div class='ctx'>     osm_l3: interconnect@17d41000 {</div><div class='del'>-      compatible = "qcom,sdm845-osm-l3";</div><div class='add'>+      compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3";</div><div class='ctx'>       reg = &lt;0x17d41000 0x1400&gt;;</div><div class='ctx'> </div><div class='ctx'>       clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GPLL0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,qdu1000-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,qdu1000-rpmh.yaml<br/>new file mode 100644<br/>index 000000000000..0070b0396e31<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,qdu1000-rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,qdu1000-rpmh.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,qdu1000-rpmh.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMh Network-On-Chip Interconnect on QDU1000</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Georgi Djakov &lt;djakov@kernel.org&gt;</div><div class='add'>+  - Odelu Kukatla &lt;quic_okukatla@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+   RPMh interconnect providers support system bandwidth requirements through</div><div class='add'>+   RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is</div><div class='add'>+   able to communicate with the BCM through the Resource State Coordinator (RSC)</div><div class='add'>+   associated with each execution environment. Provider nodes must point to at</div><div class='add'>+   least one RPMh device child node pertaining to their RSC and each provider</div><div class='add'>+   can map to multiple RPMh resources.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,qdu1000-clk-virt</div><div class='add'>+      - qcom,qdu1000-gem-noc</div><div class='add'>+      - qcom,qdu1000-mc-virt</div><div class='add'>+      - qcom,qdu1000-system-noc</div><div class='add'>+</div><div class='add'>+  '#interconnect-cells': true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,qdu1000-clk-virt</div><div class='add'>+              - qcom,qdu1000-mc-virt</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg: false</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,qdu1000-rpmh.h&gt;</div><div class='add'>+</div><div class='add'>+    system_noc: interconnect@1640000 {</div><div class='add'>+        compatible = "qcom,qdu1000-system-noc";</div><div class='add'>+        reg = &lt;0x1640000 0x45080&gt;;</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    clk_virt: interconnect-0 {</div><div class='add'>+        compatible = "qcom,qdu1000-clk-virt";</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml<br/>index 89853b482513..4f95d512012a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,rpm.yaml</a></div><div class='hunk'>@@ -45,7 +45,11 @@ properties:</div><div class='ctx'>       - qcom,sdm660-snoc</div><div class='ctx'> </div><div class='ctx'>   '#interconnect-cells':</div><div class='del'>-    const: 1</div><div class='add'>+    description: |</div><div class='add'>+      Value: &lt;1&gt; is one cell in an interconnect specifier for the</div><div class='add'>+      interconnect node id, &lt;2&gt; requires the interconnect node id and an</div><div class='add'>+      extra path tag.</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 2</div><div class='hunk'>@@ -58,6 +62,38 @@ properties:</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+# Child node's properties</div><div class='add'>+patternProperties:</div><div class='add'>+  '^interconnect-[a-z0-9]+$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      snoc-mm is a child of snoc, sharing snoc's register address space.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,msm8939-snoc-mm</div><div class='add'>+</div><div class='add'>+      '#interconnect-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: bus</div><div class='add'>+          - const: bus_a</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        items:</div><div class='add'>+          - description: Bus Clock</div><div class='add'>+          - description: Bus A Clock</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - '#interconnect-cells'</div><div class='add'>+      - clock-names</div><div class='add'>+      - clocks</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -80,7 +116,6 @@ allOf:</div><div class='ctx'>               - qcom,msm8939-pcnoc</div><div class='ctx'>               - qcom,msm8939-snoc</div><div class='ctx'>               - qcom,msm8996-a1noc</div><div class='del'>-              - qcom,msm8996-a2noc</div><div class='ctx'>               - qcom,msm8996-bimc</div><div class='ctx'>               - qcom,msm8996-cnoc</div><div class='ctx'>               - qcom,msm8996-pnoc</div><div class='hunk'>@@ -93,48 +128,17 @@ allOf:</div><div class='ctx'>               - qcom,sdm660-gnoc</div><div class='ctx'>               - qcom,sdm660-snoc</div><div class='ctx'> </div><div class='del'>-      then:</div><div class='del'>-        properties:</div><div class='del'>-          clock-names:</div><div class='del'>-            items:</div><div class='del'>-              - const: bus</div><div class='del'>-              - const: bus_a</div><div class='del'>-</div><div class='del'>-          clocks:</div><div class='del'>-            items:</div><div class='del'>-              - description: Bus Clock</div><div class='del'>-              - description: Bus A Clock</div><div class='del'>-</div><div class='del'>-        # Child node's properties</div><div class='del'>-        patternProperties:</div><div class='del'>-          '^interconnect-[a-z0-9]+$':</div><div class='del'>-            type: object</div><div class='del'>-            description:</div><div class='del'>-              snoc-mm is a child of snoc, sharing snoc's register address space.</div><div class='del'>-</div><div class='del'>-            properties:</div><div class='del'>-              compatible:</div><div class='del'>-                enum:</div><div class='del'>-                  - qcom,msm8939-snoc-mm</div><div class='del'>-</div><div class='del'>-              '#interconnect-cells':</div><div class='del'>-                const: 1</div><div class='del'>-</div><div class='del'>-              clock-names:</div><div class='del'>-                items:</div><div class='del'>-                  - const: bus</div><div class='del'>-                  - const: bus_a</div><div class='del'>-</div><div class='del'>-              clocks:</div><div class='del'>-                items:</div><div class='del'>-                  - description: Bus Clock</div><div class='del'>-                  - description: Bus A Clock</div><div class='del'>-</div><div class='del'>-            required:</div><div class='del'>-              - compatible</div><div class='del'>-              - '#interconnect-cells'</div><div class='del'>-              - clock-names</div><div class='del'>-              - clocks</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: bus_a</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Bus Clock</div><div class='add'>+            - description: Bus A Clock</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -187,6 +191,29 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - qcom,msm8996-a2noc</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: bus_a</div><div class='add'>+            - const: aggre2_ufs_axi</div><div class='add'>+            - const: ufs_axi</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Bus Clock</div><div class='add'>+            - description: Bus A Clock</div><div class='add'>+            - description: Aggregate2 NoC UFS AXI Clock</div><div class='add'>+            - description: UFS AXI Clock</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='ctx'>               - qcom,sdm660-a2noc</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='hunk'>@@ -211,6 +238,17 @@ allOf:</div><div class='ctx'>             - description: Aggregate2 USB3 AXI Clock.</div><div class='ctx'>             - description: Config NoC USB2 AXI Clock.</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - qcom,msm8939-snoc</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '^interconnect-[a-z0-9]+$': false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>       #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh-common.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh-common.yaml<br/>new file mode 100644<br/>index 000000000000..bbeb0541536b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,rpmh-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,rpmh-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,rpmh-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMh Network-On-Chip Interconnect</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Georgi Djakov &lt;djakov@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  RPMh interconnect providers support system bandwidth requirements through</div><div class='add'>+  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is</div><div class='add'>+  able to communicate with the BCM through the Resource State Coordinator (RSC)</div><div class='add'>+  associated with each execution environment. Provider nodes must point to at</div><div class='add'>+  least one RPMh device child node pertaining to their RSC and each provider</div><div class='add'>+  can map to multiple RPMh resources.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  '#interconnect-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  qcom,bcm-voters:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      List of phandles to qcom,bcm-voter nodes that are required by</div><div class='add'>+      this interconnect to send RPMh commands.</div><div class='add'>+</div><div class='add'>+  qcom,bcm-voter-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      Names for each of the qcom,bcm-voters specified.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - '#interconnect-cells'</div><div class='add'>+  - qcom,bcm-voters</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml<br/>index 5a911be0c2ea..4d93ad415e0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml</a></div><div class='hunk'>@@ -18,6 +18,9 @@ description: |</div><div class='ctx'>    least one RPMh device child node pertaining to their RSC and each provider</div><div class='ctx'>    can map to multiple RPMh resources.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -31,24 +34,11 @@ properties:</div><div class='ctx'>       - qcom,sc7180-config-noc</div><div class='ctx'>       - qcom,sc7180-dc-noc</div><div class='ctx'>       - qcom,sc7180-gem-noc</div><div class='del'>-      - qcom,sc7180-ipa-virt</div><div class='ctx'>       - qcom,sc7180-mc-virt</div><div class='ctx'>       - qcom,sc7180-mmss-noc</div><div class='ctx'>       - qcom,sc7180-npu-noc</div><div class='ctx'>       - qcom,sc7180-qup-virt</div><div class='ctx'>       - qcom,sc7180-system-noc</div><div class='del'>-      - qcom,sc7280-aggre1-noc</div><div class='del'>-      - qcom,sc7280-aggre2-noc</div><div class='del'>-      - qcom,sc7280-clk-virt</div><div class='del'>-      - qcom,sc7280-cnoc2</div><div class='del'>-      - qcom,sc7280-cnoc3</div><div class='del'>-      - qcom,sc7280-dc-noc</div><div class='del'>-      - qcom,sc7280-gem-noc</div><div class='del'>-      - qcom,sc7280-lpass-ag-noc</div><div class='del'>-      - qcom,sc7280-mc-virt</div><div class='del'>-      - qcom,sc7280-mmss-noc</div><div class='del'>-      - qcom,sc7280-nsp-noc</div><div class='del'>-      - qcom,sc7280-system-noc</div><div class='ctx'>       - qcom,sc8180x-aggre1-noc</div><div class='ctx'>       - qcom,sc8180x-aggre2-noc</div><div class='ctx'>       - qcom,sc8180x-camnoc-virt</div><div class='hunk'>@@ -56,10 +46,18 @@ properties:</div><div class='ctx'>       - qcom,sc8180x-config-noc</div><div class='ctx'>       - qcom,sc8180x-dc-noc</div><div class='ctx'>       - qcom,sc8180x-gem-noc</div><div class='del'>-      - qcom,sc8180x-ipa-virt</div><div class='ctx'>       - qcom,sc8180x-mc-virt</div><div class='ctx'>       - qcom,sc8180x-mmss-noc</div><div class='add'>+      - qcom,sc8180x-qup-virt</div><div class='ctx'>       - qcom,sc8180x-system-noc</div><div class='add'>+      - qcom,sdm670-aggre1-noc</div><div class='add'>+      - qcom,sdm670-aggre2-noc</div><div class='add'>+      - qcom,sdm670-config-noc</div><div class='add'>+      - qcom,sdm670-dc-noc</div><div class='add'>+      - qcom,sdm670-gladiator-noc</div><div class='add'>+      - qcom,sdm670-mem-noc</div><div class='add'>+      - qcom,sdm670-mmss-noc</div><div class='add'>+      - qcom,sdm670-system-noc</div><div class='ctx'>       - qcom,sdm845-aggre1-noc</div><div class='ctx'>       - qcom,sdm845-aggre2-noc</div><div class='ctx'>       - qcom,sdm845-config-noc</div><div class='hunk'>@@ -68,10 +66,12 @@ properties:</div><div class='ctx'>       - qcom,sdm845-mem-noc</div><div class='ctx'>       - qcom,sdm845-mmss-noc</div><div class='ctx'>       - qcom,sdm845-system-noc</div><div class='del'>-      - qcom,sdx55-ipa-virt</div><div class='ctx'>       - qcom,sdx55-mc-virt</div><div class='ctx'>       - qcom,sdx55-mem-noc</div><div class='ctx'>       - qcom,sdx55-system-noc</div><div class='add'>+      - qcom,sdx65-mc-virt</div><div class='add'>+      - qcom,sdx65-mem-noc</div><div class='add'>+      - qcom,sdx65-system-noc</div><div class='ctx'>       - qcom,sm8150-aggre1-noc</div><div class='ctx'>       - qcom,sm8150-aggre2-noc</div><div class='ctx'>       - qcom,sm8150-camnoc-noc</div><div class='hunk'>@@ -79,7 +79,6 @@ properties:</div><div class='ctx'>       - qcom,sm8150-config-noc</div><div class='ctx'>       - qcom,sm8150-dc-noc</div><div class='ctx'>       - qcom,sm8150-gem-noc</div><div class='del'>-      - qcom,sm8150-ipa-virt</div><div class='ctx'>       - qcom,sm8150-mc-virt</div><div class='ctx'>       - qcom,sm8150-mmss-noc</div><div class='ctx'>       - qcom,sm8150-system-noc</div><div class='hunk'>@@ -89,7 +88,6 @@ properties:</div><div class='ctx'>       - qcom,sm8250-config-noc</div><div class='ctx'>       - qcom,sm8250-dc-noc</div><div class='ctx'>       - qcom,sm8250-gem-noc</div><div class='del'>-      - qcom,sm8250-ipa-virt</div><div class='ctx'>       - qcom,sm8250-mc-virt</div><div class='ctx'>       - qcom,sm8250-mmss-noc</div><div class='ctx'>       - qcom,sm8250-npu-noc</div><div class='hunk'>@@ -104,40 +102,14 @@ properties:</div><div class='ctx'>       - qcom,sm8350-mmss-noc</div><div class='ctx'>       - qcom,sm8350-compute-noc</div><div class='ctx'>       - qcom,sm8350-system-noc</div><div class='del'>-      - qcom,sm8450-aggre1-noc</div><div class='del'>-      - qcom,sm8450-aggre2-noc</div><div class='del'>-      - qcom,sm8450-clk-virt</div><div class='del'>-      - qcom,sm8450-config-noc</div><div class='del'>-      - qcom,sm8450-gem-noc</div><div class='del'>-      - qcom,sm8450-lpass-ag-noc</div><div class='del'>-      - qcom,sm8450-mc-virt</div><div class='del'>-      - qcom,sm8450-mmss-noc</div><div class='del'>-      - qcom,sm8450-nsp-noc</div><div class='del'>-      - qcom,sm8450-pcie-anoc</div><div class='del'>-      - qcom,sm8450-system-noc</div><div class='del'>-</div><div class='del'>-  '#interconnect-cells':</div><div class='del'>-    enum: [ 1, 2 ]</div><div class='del'>-</div><div class='del'>-  qcom,bcm-voters:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='del'>-    items:</div><div class='del'>-      maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      List of phandles to qcom,bcm-voter nodes that are required by</div><div class='del'>-      this interconnect to send RPMh commands.</div><div class='ctx'> </div><div class='del'>-  qcom,bcm-voter-names:</div><div class='del'>-    description: |</div><div class='del'>-      Names for each of the qcom,bcm-voters specified.</div><div class='add'>+  '#interconnect-cells': true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - '#interconnect-cells'</div><div class='del'>-  - qcom,bcm-voters</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml<br/>new file mode 100644<br/>index 000000000000..2e0c0bc7a376<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RPMh interconnect providers support system bandwidth requirements through</div><div class='add'>+  RPMh hardware accelerators known as Bus Clock Manager (BCM).</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/interconnect/qcom,sa8775p.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sa8775p-aggre1-noc</div><div class='add'>+      - qcom,sa8775p-aggre2-noc</div><div class='add'>+      - qcom,sa8775p-clk-virt</div><div class='add'>+      - qcom,sa8775p-config-noc</div><div class='add'>+      - qcom,sa8775p-dc-noc</div><div class='add'>+      - qcom,sa8775p-gem-noc</div><div class='add'>+      - qcom,sa8775p-gpdsp-anoc</div><div class='add'>+      - qcom,sa8775p-lpass-ag-noc</div><div class='add'>+      - qcom,sa8775p-mc-virt</div><div class='add'>+      - qcom,sa8775p-mmss-noc</div><div class='add'>+      - qcom,sa8775p-nspa-noc</div><div class='add'>+      - qcom,sa8775p-nspb-noc</div><div class='add'>+      - qcom,sa8775p-pcie-anoc</div><div class='add'>+      - qcom,sa8775p-system-noc</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    aggre1_noc: interconnect-aggre1-noc {</div><div class='add'>+        compatible = "qcom,sa8775p-aggre1-noc";</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml<br/>new file mode 100644<br/>index 000000000000..b135597d9489<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RPMh interconnect providers support system bandwidth requirements through</div><div class='add'>+  RPMh hardware accelerators known as Bus Clock Manager (BCM).</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/interconnect/qcom,sc7280.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc7280-aggre1-noc</div><div class='add'>+      - qcom,sc7280-aggre2-noc</div><div class='add'>+      - qcom,sc7280-clk-virt</div><div class='add'>+      - qcom,sc7280-cnoc2</div><div class='add'>+      - qcom,sc7280-cnoc3</div><div class='add'>+      - qcom,sc7280-dc-noc</div><div class='add'>+      - qcom,sc7280-gem-noc</div><div class='add'>+      - qcom,sc7280-lpass-ag-noc</div><div class='add'>+      - qcom,sc7280-mc-virt</div><div class='add'>+      - qcom,sc7280-mmss-noc</div><div class='add'>+      - qcom,sc7280-nsp-noc</div><div class='add'>+      - qcom,sc7280-system-noc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7280-clk-virt</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg: false</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interconnect {</div><div class='add'>+        compatible = "qcom,sc7280-clk-virt";</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    interconnect@9100000 {</div><div class='add'>+        reg = &lt;0x9100000 0xe2200&gt;;</div><div class='add'>+        compatible = "qcom,sc7280-gem-noc";</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml<br/>new file mode 100644<br/>index 000000000000..6c2da03f0cd2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,sc8280xp-rpmh.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RPMh interconnect providers support system bandwidth requirements through</div><div class='add'>+  RPMh hardware accelerators known as Bus Clock Manager (BCM).</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/interconnect/qcom,sc8280xp.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc8280xp-aggre1-noc</div><div class='add'>+      - qcom,sc8280xp-aggre2-noc</div><div class='add'>+      - qcom,sc8280xp-clk-virt</div><div class='add'>+      - qcom,sc8280xp-config-noc</div><div class='add'>+      - qcom,sc8280xp-dc-noc</div><div class='add'>+      - qcom,sc8280xp-gem-noc</div><div class='add'>+      - qcom,sc8280xp-lpass-ag-noc</div><div class='add'>+      - qcom,sc8280xp-mc-virt</div><div class='add'>+      - qcom,sc8280xp-mmss-noc</div><div class='add'>+      - qcom,sc8280xp-nspa-noc</div><div class='add'>+      - qcom,sc8280xp-nspb-noc</div><div class='add'>+      - qcom,sc8280xp-system-noc</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interconnect-0 {</div><div class='add'>+        compatible = "qcom,sc8280xp-aggre1-noc";</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm6350-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm6350-rpmh.yaml<br/>new file mode 100644<br/>index 000000000000..49eb156b08e0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,sm6350-rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,sm6350-rpmh.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,sm6350-rpmh.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM6350 RPMh Network-On-Chip Interconnect</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Luca Weiss &lt;luca.weiss@fairphone.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm RPMh-based interconnect provider on SM6350.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm6350-aggre1-noc</div><div class='add'>+      - qcom,sm6350-aggre2-noc</div><div class='add'>+      - qcom,sm6350-config-noc</div><div class='add'>+      - qcom,sm6350-dc-noc</div><div class='add'>+      - qcom,sm6350-gem-noc</div><div class='add'>+      - qcom,sm6350-mmss-noc</div><div class='add'>+      - qcom,sm6350-npu-noc</div><div class='add'>+      - qcom,sm6350-system-noc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interconnect-cells': true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^interconnect-[a-z0-9\-]+$':</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      The interconnect providers do not have a separate QoS register space,</div><div class='add'>+      but share parent's space.</div><div class='add'>+    $ref: qcom,rpmh-common.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,sm6350-clk-virt</div><div class='add'>+          - qcom,sm6350-compute-noc</div><div class='add'>+</div><div class='add'>+      '#interconnect-cells': true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    config_noc: interconnect@1500000 {</div><div class='add'>+        compatible = "qcom,sm6350-config-noc";</div><div class='add'>+        reg = &lt;0x01500000 0x28000&gt;;</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    system_noc: interconnect@1620000 {</div><div class='add'>+        compatible = "qcom,sm6350-system-noc";</div><div class='add'>+        reg = &lt;0x01620000 0x17080&gt;;</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+</div><div class='add'>+        clk_virt: interconnect-clk-virt {</div><div class='add'>+            compatible = "qcom,sm6350-clk-virt";</div><div class='add'>+            #interconnect-cells = &lt;2&gt;;</div><div class='add'>+            qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml<br/>new file mode 100644<br/>index 000000000000..3cff7e662255<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RPMh interconnect providers support system bandwidth requirements through</div><div class='add'>+  RPMh hardware accelerators known as Bus Clock Manager (BCM).</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/interconnect/qcom,sm8450.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm8450-aggre1-noc</div><div class='add'>+      - qcom,sm8450-aggre2-noc</div><div class='add'>+      - qcom,sm8450-clk-virt</div><div class='add'>+      - qcom,sm8450-config-noc</div><div class='add'>+      - qcom,sm8450-gem-noc</div><div class='add'>+      - qcom,sm8450-lpass-ag-noc</div><div class='add'>+      - qcom,sm8450-mc-virt</div><div class='add'>+      - qcom,sm8450-mmss-noc</div><div class='add'>+      - qcom,sm8450-nsp-noc</div><div class='add'>+      - qcom,sm8450-pcie-anoc</div><div class='add'>+      - qcom,sm8450-system-noc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8450-clk-virt</div><div class='add'>+              - qcom,sm8450-mc-virt</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg: false</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8450-aggre1-noc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: aggre UFS PHY AXI clock</div><div class='add'>+            - description: aggre USB3 PRIM AXI clock</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8450-aggre2-noc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: aggre-NOC PCIe 0 AXI clock</div><div class='add'>+            - description: aggre-NOC PCIe 1 AXI clock</div><div class='add'>+            - description: aggre UFS PHY AXI clock</div><div class='add'>+            - description: RPMH CC IPA clock</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8450-aggre1-noc</div><div class='add'>+              - qcom,sm8450-aggre2-noc</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8450.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+</div><div class='add'>+    interconnect-0 {</div><div class='add'>+        compatible = "qcom,sm8450-clk-virt";</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    interconnect@1700000 {</div><div class='add'>+        compatible = "qcom,sm8450-aggre2-noc";</div><div class='add'>+        reg = &lt;0x01700000 0x31080&gt;;</div><div class='add'>+        #interconnect-cells = &lt;2&gt;;</div><div class='add'>+        qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;rpmhcc RPMH_IPA_CLK&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml<br/>new file mode 100644<br/>index 000000000000..716bd21f6041<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Abel Vesa &lt;abel.vesa@linaro.org&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RPMh interconnect providers support system bandwidth requirements through</div><div class='add'>+  RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is</div><div class='add'>+  able to communicate with the BCM through the Resource State Coordinator (RSC)</div><div class='add'>+  associated with each execution environment. Provider nodes must point to at</div><div class='add'>+  least one RPMh device child node pertaining to their RSC and each provider</div><div class='add'>+  can map to multiple RPMh resources.</div><div class='add'>+</div><div class='add'>+  See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm8550-aggre1-noc</div><div class='add'>+      - qcom,sm8550-aggre2-noc</div><div class='add'>+      - qcom,sm8550-clk-virt</div><div class='add'>+      - qcom,sm8550-cnoc-main</div><div class='add'>+      - qcom,sm8550-config-noc</div><div class='add'>+      - qcom,sm8550-gem-noc</div><div class='add'>+      - qcom,sm8550-lpass-ag-noc</div><div class='add'>+      - qcom,sm8550-lpass-lpiaon-noc</div><div class='add'>+      - qcom,sm8550-lpass-lpicx-noc</div><div class='add'>+      - qcom,sm8550-mc-virt</div><div class='add'>+      - qcom,sm8550-mmss-noc</div><div class='add'>+      - qcom,sm8550-nsp-noc</div><div class='add'>+      - qcom,sm8550-pcie-anoc</div><div class='add'>+      - qcom,sm8550-system-noc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,rpmh-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8550-clk-virt</div><div class='add'>+              - qcom,sm8550-mc-virt</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg: false</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8550-pcie-anoc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: aggre-NOC PCIe AXI clock</div><div class='add'>+            - description: cfg-NOC PCIe a-NOC AHB clock</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8550-aggre1-noc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: aggre UFS PHY AXI clock</div><div class='add'>+            - description: aggre USB3 PRIM AXI clock</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8550-aggre2-noc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: RPMH CC IPA clock</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8550-aggre1-noc</div><div class='add'>+              - qcom,sm8550-aggre2-noc</div><div class='add'>+              - qcom,sm8550-pcie-anoc</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-gcc.h&gt;</div><div class='add'>+</div><div class='add'>+    clk_virt: interconnect-0 {</div><div class='add'>+      compatible = "qcom,sm8550-clk-virt";</div><div class='add'>+      #interconnect-cells = &lt;2&gt;;</div><div class='add'>+      qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    aggre1_noc: interconnect@16e0000 {</div><div class='add'>+      compatible = "qcom,sm8550-aggre1-noc";</div><div class='add'>+      reg = &lt;0x016e0000 0x14400&gt;;</div><div class='add'>+      #interconnect-cells = &lt;2&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_AGGRE_UFS_PHY_AXI_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;;</div><div class='add'>+      qcom,bcm-voters = &lt;&amp;apps_bcm_voter&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml b/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml<br/>new file mode 100644<br/>index 000000000000..5e26e48c7217<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interconnect/samsung,exynos-bus.yaml</a></div><div class='hunk'>@@ -0,0 +1,317 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung Exynos SoC Bus and Interconnect</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Samsung Exynos SoC has many buses for data transfer between DRAM and</div><div class='add'>+  sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses.</div><div class='add'>+  Generally, each bus of Exynos SoC includes a source clock and a power line,</div><div class='add'>+  which are able to change the clock frequency of the bus in runtime. To</div><div class='add'>+  monitor the usage of each bus in runtime, the driver uses the PPMU (Platform</div><div class='add'>+  Performance Monitoring Unit), which is able to measure the current load of</div><div class='add'>+  sub-blocks.</div><div class='add'>+</div><div class='add'>+  The Exynos SoC includes the various sub-blocks which have the each AXI bus.</div><div class='add'>+  The each AXI bus has the owned source clock but, has not the only owned power</div><div class='add'>+  line. The power line might be shared among one more sub-blocks.  So, we can</div><div class='add'>+  divide into two type of device as the role of each sub-block.  There are two</div><div class='add'>+  type of bus devices as following::</div><div class='add'>+   - parent bus device</div><div class='add'>+   - passive bus device</div><div class='add'>+</div><div class='add'>+  Basically, parent and passive bus device share the same power line.  The</div><div class='add'>+  parent bus device can only change the voltage of shared power line and the</div><div class='add'>+  rest bus devices (passive bus device) depend on the decision of the parent</div><div class='add'>+  bus device. If there are three blocks which share the VDD_xxx power line,</div><div class='add'>+  Only one block should be parent device and then the rest blocks should depend</div><div class='add'>+  on the parent device as passive device.</div><div class='add'>+</div><div class='add'>+    VDD_xxx |--- A block (parent)</div><div class='add'>+      |--- B block (passive)</div><div class='add'>+      |--- C block (passive)</div><div class='add'>+</div><div class='add'>+  There are a little different composition among Exynos SoC because each Exynos</div><div class='add'>+  SoC has different sub-blocks. Therefore, such difference should be specified</div><div class='add'>+  in devicetree file instead of each device driver. In result, this driver is</div><div class='add'>+  able to support the bus frequency for all Exynos SoCs.</div><div class='add'>+</div><div class='add'>+  Detailed correlation between sub-blocks and power line according</div><div class='add'>+  to Exynos SoC::</div><div class='add'>+   - In case of Exynos3250, there are two power line as following::</div><div class='add'>+     VDD_MIF |--- DMC (Dynamic Memory Controller)</div><div class='add'>+</div><div class='add'>+     VDD_INT |--- LEFTBUS (parent device)</div><div class='add'>+       |--- PERIL</div><div class='add'>+       |--- MFC</div><div class='add'>+       |--- G3D</div><div class='add'>+       |--- RIGHTBUS</div><div class='add'>+       |--- PERIR</div><div class='add'>+       |--- FSYS</div><div class='add'>+       |--- LCD0</div><div class='add'>+       |--- PERIR</div><div class='add'>+       |--- ISP</div><div class='add'>+       |--- CAM</div><div class='add'>+</div><div class='add'>+     - MIF bus's frequency/voltage table</div><div class='add'>+       -----------------------</div><div class='add'>+       |Lv| Freq   | Voltage |</div><div class='add'>+       -----------------------</div><div class='add'>+       |L1| 50000  |800000   |</div><div class='add'>+       |L2| 100000 |800000   |</div><div class='add'>+       |L3| 134000 |800000   |</div><div class='add'>+       |L4| 200000 |825000   |</div><div class='add'>+       |L5| 400000 |875000   |</div><div class='add'>+       -----------------------</div><div class='add'>+</div><div class='add'>+     - INT bus's frequency/voltage table</div><div class='add'>+       ----------------------------------------------------------</div><div class='add'>+       |Block|LEFTBUS|RIGHTBUS|MCUISP |ISP    |PERIL  ||VDD_INT |</div><div class='add'>+       | name|       |LCD0    |       |       |       ||        |</div><div class='add'>+       |     |       |FSYS    |       |       |       ||        |</div><div class='add'>+       |     |       |MFC     |       |       |       ||        |</div><div class='add'>+       ----------------------------------------------------------</div><div class='add'>+       |Mode |*parent|passive |passive|passive|passive||        |</div><div class='add'>+       ----------------------------------------------------------</div><div class='add'>+       |Lv   |Frequency                               ||Voltage |</div><div class='add'>+       ----------------------------------------------------------</div><div class='add'>+       |L1   |50000  |50000   |50000  |50000  |50000  ||900000  |</div><div class='add'>+       |L2   |80000  |80000   |80000  |80000  |80000  ||900000  |</div><div class='add'>+       |L3   |100000 |100000  |100000 |100000 |100000 ||1000000 |</div><div class='add'>+       |L4   |134000 |134000  |200000 |200000 |       ||1000000 |</div><div class='add'>+       |L5   |200000 |200000  |400000 |300000 |       ||1000000 |</div><div class='add'>+       ----------------------------------------------------------</div><div class='add'>+</div><div class='add'>+   - In case of Exynos4210, there is one power line as following::</div><div class='add'>+     VDD_INT |--- DMC (parent device, Dynamic Memory Controller)</div><div class='add'>+       |--- LEFTBUS</div><div class='add'>+       |--- PERIL</div><div class='add'>+       |--- MFC(L)</div><div class='add'>+       |--- G3D</div><div class='add'>+       |--- TV</div><div class='add'>+       |--- LCD0</div><div class='add'>+       |--- RIGHTBUS</div><div class='add'>+       |--- PERIR</div><div class='add'>+       |--- MFC(R)</div><div class='add'>+       |--- CAM</div><div class='add'>+       |--- FSYS</div><div class='add'>+       |--- GPS</div><div class='add'>+       |--- LCD0</div><div class='add'>+       |--- LCD1</div><div class='add'>+</div><div class='add'>+   - In case of Exynos4x12, there are two power line as following::</div><div class='add'>+     VDD_MIF |--- DMC (Dynamic Memory Controller)</div><div class='add'>+</div><div class='add'>+     VDD_INT |--- LEFTBUS (parent device)</div><div class='add'>+       |--- PERIL</div><div class='add'>+       |--- MFC(L)</div><div class='add'>+       |--- G3D</div><div class='add'>+       |--- TV</div><div class='add'>+       |--- IMAGE</div><div class='add'>+       |--- RIGHTBUS</div><div class='add'>+       |--- PERIR</div><div class='add'>+       |--- MFC(R)</div><div class='add'>+       |--- CAM</div><div class='add'>+       |--- FSYS</div><div class='add'>+       |--- GPS</div><div class='add'>+       |--- LCD0</div><div class='add'>+       |--- ISP</div><div class='add'>+</div><div class='add'>+   - In case of Exynos5422, there are two power line as following::</div><div class='add'>+     VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller)</div><div class='add'>+             |--- DREX 1</div><div class='add'>+</div><div class='add'>+     VDD_INT |--- NoC_Core (parent device)</div><div class='add'>+       |--- G2D</div><div class='add'>+       |--- G3D</div><div class='add'>+       |--- DISP1</div><div class='add'>+       |--- NoC_WCORE</div><div class='add'>+       |--- GSCL</div><div class='add'>+       |--- MSCL</div><div class='add'>+       |--- ISP</div><div class='add'>+       |--- MFC</div><div class='add'>+       |--- GEN</div><div class='add'>+       |--- PERIS</div><div class='add'>+       |--- PERIC</div><div class='add'>+       |--- FSYS</div><div class='add'>+       |--- FSYS2</div><div class='add'>+</div><div class='add'>+   - In case of Exynos5433, there is VDD_INT power line as following::</div><div class='add'>+     VDD_INT |--- G2D (parent device)</div><div class='add'>+       |--- MSCL</div><div class='add'>+       |--- GSCL</div><div class='add'>+       |--- JPEG</div><div class='add'>+       |--- MFC</div><div class='add'>+       |--- HEVC</div><div class='add'>+       |--- BUS0</div><div class='add'>+       |--- BUS1</div><div class='add'>+       |--- BUS2</div><div class='add'>+       |--- PERIS (Fixed clock rate)</div><div class='add'>+       |--- PERIC (Fixed clock rate)</div><div class='add'>+       |--- FSYS  (Fixed clock rate)</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,exynos-bus</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+</div><div class='add'>+  devfreq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Parent bus device. Valid and required only for the passive bus devices.</div><div class='add'>+</div><div class='add'>+  devfreq-events:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    description:</div><div class='add'>+      Devfreq-event device to monitor the current utilization of buses. Valid</div><div class='add'>+      and required only for the parent bus devices.</div><div class='add'>+</div><div class='add'>+  exynos,saturation-ratio:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Percentage value which is used to calibrate the performance count against</div><div class='add'>+      total cycle count.  Valid only for the parent bus devices.</div><div class='add'>+</div><div class='add'>+  '#interconnect-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  samsung,data-clock-ratio:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 8</div><div class='add'>+    description:</div><div class='add'>+      Ratio of the data throughput in B/s to minimum data clock frequency in</div><div class='add'>+      Hz.</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Main bus power rail. Valid and required only for the parent bus devices.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - operating-points-v2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos3250.h&gt;</div><div class='add'>+</div><div class='add'>+    bus-dmc {</div><div class='add'>+        compatible = "samsung,exynos-bus";</div><div class='add'>+        clocks = &lt;&amp;cmu_dmc CLK_DIV_DMC&gt;;</div><div class='add'>+        clock-names = "bus";</div><div class='add'>+        operating-points-v2 = &lt;&amp;bus_dmc_opp_table&gt;;</div><div class='add'>+        devfreq-events = &lt;&amp;ppmu_dmc0_3&gt;, &lt;&amp;ppmu_dmc1_3&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;buck1_reg&gt;;</div><div class='add'>+</div><div class='add'>+        bus_dmc_opp_table: opp-table {</div><div class='add'>+            compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+            opp-50000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+                opp-microvolt = &lt;800000&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-100000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+                opp-microvolt = &lt;800000&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-134000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;134000000&gt;;</div><div class='add'>+                opp-microvolt = &lt;800000&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-200000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;200000000&gt;;</div><div class='add'>+                opp-microvolt = &lt;825000&gt;;</div><div class='add'>+            };</div><div class='add'>+            opp-400000000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;400000000&gt;;</div><div class='add'>+                opp-microvolt = &lt;875000&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    ppmu_dmc0: ppmu@106a0000 {</div><div class='add'>+        compatible = "samsung,exynos-ppmu";</div><div class='add'>+        reg = &lt;0x106a0000 0x2000&gt;;</div><div class='add'>+        events {</div><div class='add'>+            ppmu_dmc0_3: ppmu-event3-dmc0 {</div><div class='add'>+                event-name = "ppmu-event3-dmc0";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    bus_leftbus: bus-leftbus {</div><div class='add'>+        compatible = "samsung,exynos-bus";</div><div class='add'>+        clocks = &lt;&amp;cmu CLK_DIV_GDL&gt;;</div><div class='add'>+        clock-names = "bus";</div><div class='add'>+        operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='add'>+        devfreq-events = &lt;&amp;ppmu_leftbus_3&gt;, &lt;&amp;ppmu_rightbus_3&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;buck3_reg&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    bus-rightbus {</div><div class='add'>+        compatible = "samsung,exynos-bus";</div><div class='add'>+        clocks = &lt;&amp;cmu CLK_DIV_GDR&gt;;</div><div class='add'>+        clock-names = "bus";</div><div class='add'>+        operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='add'>+        devfreq = &lt;&amp;bus_leftbus&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    dmc: bus-dmc {</div><div class='add'>+        compatible = "samsung,exynos-bus";</div><div class='add'>+        clocks = &lt;&amp;clock CLK_DIV_DMC&gt;;</div><div class='add'>+        clock-names = "bus";</div><div class='add'>+        operating-points-v2 = &lt;&amp;bus_dmc_opp_table&gt;;</div><div class='add'>+        samsung,data-clock-ratio = &lt;4&gt;;</div><div class='add'>+        #interconnect-cells = &lt;0&gt;;</div><div class='add'>+        devfreq-events = &lt;&amp;ppmu_dmc0_3&gt;, &lt;&amp;ppmu_dmc1_3&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;buck1_reg&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    leftbus: bus-leftbus {</div><div class='add'>+        compatible = "samsung,exynos-bus";</div><div class='add'>+        clocks = &lt;&amp;clock CLK_DIV_GDL&gt;;</div><div class='add'>+        clock-names = "bus";</div><div class='add'>+        operating-points-v2 = &lt;&amp;bus_leftbus_opp_table&gt;;</div><div class='add'>+        interconnects = &lt;&amp;dmc&gt;;</div><div class='add'>+        #interconnect-cells = &lt;0&gt;;</div><div class='add'>+        devfreq-events = &lt;&amp;ppmu_leftbus_3&gt;, &lt;&amp;ppmu_rightbus_3&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;buck3_reg&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    display: bus-display {</div><div class='add'>+        compatible = "samsung,exynos-bus";</div><div class='add'>+        clocks = &lt;&amp;clock CLK_DIV_ACLK_266&gt;;</div><div class='add'>+        clock-names = "bus";</div><div class='add'>+        operating-points-v2 = &lt;&amp;bus_display_opp_table&gt;;</div><div class='add'>+        interconnects = &lt;&amp;leftbus &amp;dmc&gt;;</div><div class='add'>+        #interconnect-cells = &lt;0&gt;;</div><div class='add'>+        devfreq = &lt;&amp;leftbus&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml<br/>index 5da333c644c9..27756d0c5419 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml</a></div><div class='hunk'>@@ -32,7 +32,7 @@ properties:</div><div class='ctx'>       The first cell is the input IRQ number, between 0 and 2, while the second</div><div class='ctx'>       cell is the trigger type as defined in interrupt.txt in this directory.</div><div class='ctx'> </div><div class='del'>-  'interrupts':</div><div class='add'>+  interrupts:</div><div class='ctx'>     description: |</div><div class='ctx'>       Contains the GIC SPI IRQs mapped to the external interrupt lines.</div><div class='ctx'>       They shall be specified sequentially from output 0 to 2.</div><div class='hunk'>@@ -44,7 +44,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupt-controller</div><div class='ctx'>   - '#interrupt-cells'</div><div class='del'>-  - 'interrupts'</div><div class='add'>+  - interrupts</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml<br/>index 953d875b5e74..a713633be733 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun4i-a10-ic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Interrupt Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Interrupt Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml<br/>index 4db24b8a9ffe..4fa6fd400eef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun6i-a31-r-intc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 NMI/Wakeup Interrupt Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A31 NMI/Wakeup Interrupt Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml<br/>index 7fc9ad5ef38c..83603180d8d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A20 Non-Maskable Interrupt Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A20 Non-Maskable Interrupt Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml<br/>index 85c85b694217..698588e9aa86 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml</a></div><div class='hunk'>@@ -90,13 +90,12 @@ properties:</div><div class='ctx'>             maximum: 5</div><div class='ctx'> </div><div class='ctx'>           cpus:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>             description:</div><div class='ctx'>               Should be a list of phandles to CPU nodes (as described in</div><div class='ctx'>               Documentation/devicetree/bindings/arm/cpus.yaml).</div><div class='ctx'> </div><div class='ctx'>         required:</div><div class='del'>-          - fiq-index</div><div class='add'>+          - apple,fiq-index</div><div class='ctx'>           - cpus</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml<br/>index 47a78a167aba..2bde6cc6fe0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml</a></div><div class='hunk'>@@ -31,19 +31,22 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='del'>-      - const: apple,t6000-aic</div><div class='add'>+      - enum:</div><div class='add'>+          - apple,t8112-aic</div><div class='add'>+          - apple,t6000-aic</div><div class='ctx'>       - const: apple,aic2</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='ctx'>   '#interrupt-cells':</div><div class='del'>-    const: 4</div><div class='add'>+    minimum: 3</div><div class='add'>+    maximum: 4</div><div class='ctx'>     description: |</div><div class='ctx'>       The 1st cell contains the interrupt type:</div><div class='ctx'>         - 0: Hardware IRQ</div><div class='ctx'>         - 1: FIQ</div><div class='ctx'> </div><div class='del'>-      The 2nd cell contains the die ID.</div><div class='add'>+      The 2nd cell contains the die ID (only present on apple,t6000-aic).</div><div class='ctx'> </div><div class='ctx'>       The next cell contains the interrupt number.</div><div class='ctx'>         - HW IRQs: interrupt number</div><div class='hunk'>@@ -69,6 +72,35 @@ properties:</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  affinities:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      FIQ affinity can be expressed as a single "affinities" node,</div><div class='add'>+      containing a set of sub-nodes, one per FIQ with a non-default</div><div class='add'>+      affinity.</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^.+-affinity$":</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          apple,fiq-index:</div><div class='add'>+            description:</div><div class='add'>+              The interrupt number specified as a FIQ, and for which</div><div class='add'>+              the affinity is not the default.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            maximum: 5</div><div class='add'>+</div><div class='add'>+          cpus:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+            description:</div><div class='add'>+              Should be a list of phandles to CPU nodes (as described in</div><div class='add'>+              Documentation/devicetree/bindings/arm/cpus.yaml).</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - apple,fiq-index</div><div class='add'>+          - cpus</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - '#interrupt-cells'</div><div class='hunk'>@@ -80,6 +112,19 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/interrupt-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: apple,t8112-aic</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        '#interrupt-cells':</div><div class='add'>+          const: 3</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        '#interrupt-cells':</div><div class='add'>+          const: 4</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml<br/>index b7197f78e158..92117261e1e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ARM Generic Interrupt Controller, version 3</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Marc Zyngier &lt;marc.zyngier@arm.com&gt;</div><div class='add'>+  - Marc Zyngier &lt;maz@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   AArch64 SMP cores are often associated with a GICv3, providing Private</div><div class='hunk'>@@ -78,7 +78,11 @@ properties:</div><div class='ctx'>       - GIC Hypervisor interface (GICH)</div><div class='ctx'>       - GIC Virtual CPU interface (GICV)</div><div class='ctx'> </div><div class='del'>-      GICC, GICH and GICV are optional.</div><div class='add'>+      GICC, GICH and GICV are optional, but must be described if the CPUs</div><div class='add'>+      support them. Examples of such CPUs are ARM's implementations of the</div><div class='add'>+      ARMv8.0 architecture such as Cortex-A32, A34, A35, A53, A57, A72 and</div><div class='add'>+      A73 (this list is not exhaustive).</div><div class='add'>+</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 4096   # Should be enough?</div><div class='ctx'> </div><div class='hunk'>@@ -104,7 +108,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   msi-controller:</div><div class='ctx'>     description:</div><div class='del'>-      Only present if the Message Based Interrupt functionnality is</div><div class='add'>+      Only present if the Message Based Interrupt functionality is</div><div class='ctx'>       being exposed by the HW, and the mbi-ranges property present.</div><div class='ctx'> </div><div class='ctx'>   mbi-ranges:</div><div class='hunk'>@@ -129,12 +133,14 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ppi-partitions:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       PPI affinity can be expressed as a single "ppi-partitions" node,</div><div class='ctx'>       containing a set of sub-nodes.</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^interrupt-partition-[0-9]+$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         properties:</div><div class='ctx'>           affinity:</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='hunk'>@@ -166,7 +172,6 @@ dependencies:</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - interrupts</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml<br/>index 62219a5c21c5..a2846e493497 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml</a></div><div class='hunk'>@@ -64,9 +64,9 @@ properties:</div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='del'>-    enum: [ 0, 1 ]</div><div class='add'>+    enum: [ 0, 1, 2 ]</div><div class='ctx'>   "#size-cells":</div><div class='del'>-    const: 1</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='ctx'> </div><div class='ctx'>   "#interrupt-cells":</div><div class='ctx'>     const: 3</div><div class='hunk'>@@ -133,8 +133,8 @@ properties:</div><div class='ctx'>       - items: # for "arm,cortex-a9-gic"</div><div class='ctx'>           - const: PERIPHCLK</div><div class='ctx'>           - const: PERIPHCLKEN</div><div class='del'>-      - const: clk # for "arm,gic-400" and "nvidia,tegra210"</div><div class='del'>-      - const: gclk #for "arm,pl390"</div><div class='add'>+      - const: clk  # for "arm,gic-400" and "nvidia,tegra210"</div><div class='add'>+      - const: gclk # for "arm,pl390"</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml<br/>index 46b2eb3c43ee..c680de1cbd56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml</a></div><div class='hunk'>@@ -109,7 +109,8 @@ properties:</div><div class='ctx'>       for system suspend/resume.</div><div class='ctx'> </div><div class='ctx'>   brcm,int-fwd-mask:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 1</div><div class='ctx'>     description: &gt;</div><div class='ctx'>       if present, a bit mask to configure the interrupts which have a mux gate,</div><div class='ctx'>       typically UARTs. Setting these bits will make their respective interrupt</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml<br/>index 1d6e0f64a807..985bfa4f6fda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml</a></div><div class='hunk'>@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Freescale INTMUX interrupt multiplexer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Joakim Zhang &lt;qiangqing.zhang@nxp.com&gt;</div><div class='add'>+  - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='add'>+  - NXP Linux Team &lt;linux-imx@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml<br/>index bcb5e20fa9ca..20ad4ad82ad6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml</a></div><div class='hunk'>@@ -48,13 +48,13 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   fsl,channel:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='ctx'>       u32 value representing the output channel that all input IRQs should be</div><div class='ctx'>       steered into.</div><div class='ctx'> </div><div class='ctx'>   fsl,num-irqs:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='ctx'>       u32 value representing the number of input interrupts of this channel,</div><div class='ctx'>       should be multiple of 32 input interrupts and up to 512 interrupts.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt<br/>deleted file mode 100644<br/>index 4d47df1a5c91..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,53 +0,0 @@</div><div class='del'>-* Freescale Layerscape external IRQs</div><div class='del'>-</div><div class='del'>-Some Layerscape SOCs (LS1021A, LS1043A, LS1046A</div><div class='del'>-LS1088A, LS208xA, LX216xA) support inverting</div><div class='del'>-the polarity of certain external interrupt lines.</div><div class='del'>-</div><div class='del'>-The device node must be a child of the node representing the</div><div class='del'>-Supplemental Configuration Unit (SCFG).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "fsl,&lt;soc-name&gt;-extirq", e.g. "fsl,ls1021a-extirq".</div><div class='del'>-  "fsl,ls1043a-extirq": for LS1043A, LS1046A.</div><div class='del'>-  "fsl,ls1088a-extirq": for LS1088A, LS208xA, LX216xA.</div><div class='del'>-- #interrupt-cells: Must be 2. The first element is the index of the</div><div class='del'>-  external interrupt line. The second element is the trigger type.</div><div class='del'>-- #address-cells: Must be 0.</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller</div><div class='del'>-- reg: Specifies the Interrupt Polarity Control Register (INTPCR) in</div><div class='del'>-  the SCFG or the External Interrupt Control Register (IRQCR) in</div><div class='del'>-  the ISC.</div><div class='del'>-- interrupt-map: Specifies the mapping from external interrupts to GIC</div><div class='del'>-  interrupts.</div><div class='del'>-- interrupt-map-mask: Must be &lt;0xffffffff 0&gt;.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	scfg: scfg@1570000 {</div><div class='del'>-		compatible = "fsl,ls1021a-scfg", "syscon";</div><div class='del'>-		reg = &lt;0x0 0x1570000 0x0 0x10000&gt;;</div><div class='del'>-		big-endian;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges = &lt;0x0 0x0 0x1570000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-		extirq: interrupt-controller@1ac {</div><div class='del'>-			compatible = "fsl,ls1021a-extirq";</div><div class='del'>-			#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			#address-cells = &lt;0&gt;;</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			reg = &lt;0x1ac 4&gt;;</div><div class='del'>-			interrupt-map =</div><div class='del'>-				&lt;0 0 &amp;gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;1 0 &amp;gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;2 0 &amp;gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;3 0 &amp;gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;4 0 &amp;gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;5 0 &amp;gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			interrupt-map-mask = &lt;0xffffffff 0x0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	interrupts-extended = &lt;&amp;gic GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			      &lt;&amp;extirq 1 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml<br/>new file mode 100644<br/>index 000000000000..887e565b9573<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/fsl,ls-extirq.yaml</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/fsl,ls-extirq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Layerscape External Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='add'>+  - Li Yang &lt;leoyang.li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Some Layerscape SOCs (LS1021A, LS1043A, LS1046A LS1088A, LS208xA,</div><div class='add'>+  LX216xA) support inverting the polarity of certain external interrupt</div><div class='add'>+  lines.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,ls1021a-extirq</div><div class='add'>+          - fsl,ls1043a-extirq</div><div class='add'>+          - fsl,ls1088a-extirq</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,ls1046a-extirq</div><div class='add'>+          - const: fsl,ls1043a-extirq</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,ls2080a-extirq</div><div class='add'>+              - fsl,lx2160a-extirq</div><div class='add'>+          - const: fsl,ls1088a-extirq</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Specifies the Interrupt Polarity Control Register (INTPCR) in the</div><div class='add'>+      SCFG or the External Interrupt Control Register (IRQCR) in the ISC.</div><div class='add'>+</div><div class='add'>+  interrupt-map:</div><div class='add'>+    description: Specifies the mapping from external interrupts to GIC interrupts.</div><div class='add'>+</div><div class='add'>+  interrupt-map-mask: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - interrupt-map-mask</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,ls1021a-extirq</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupt-map:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='add'>+        interrupt-map-mask:</div><div class='add'>+          items:</div><div class='add'>+            - const: 0x7</div><div class='add'>+            - const: 0</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,ls1043a-extirq</div><div class='add'>+              - fsl,ls1046a-extirq</div><div class='add'>+              - fsl,ls1088a-extirq</div><div class='add'>+              - fsl,ls2080a-extirq</div><div class='add'>+              - fsl,lx2160a-extirq</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupt-map:</div><div class='add'>+          minItems: 12</div><div class='add'>+          maxItems: 12</div><div class='add'>+        interrupt-map-mask:</div><div class='add'>+          items:</div><div class='add'>+            - const: 0xf</div><div class='add'>+            - const: 0</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    interrupt-controller@1ac {</div><div class='add'>+            compatible = "fsl,ls1021a-extirq";</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            #address-cells = &lt;0&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            reg = &lt;0x1ac 4&gt;;</div><div class='add'>+            interrupt-map =</div><div class='add'>+                    &lt;0 0 &amp;gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                    &lt;1 0 &amp;gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                    &lt;2 0 &amp;gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                    &lt;3 0 &amp;gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                    &lt;4 0 &amp;gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                    &lt;5 0 &amp;gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-map-mask = &lt;0x7 0x0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml<br/>new file mode 100644<br/>index 000000000000..799ae5c3e32a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale/NXP i.MX Messaging Unit (MU) work as msi controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Li &lt;Frank.Li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Messaging Unit module enables two processors within the SoC to</div><div class='add'>+  communicate and coordinate by passing messages (e.g. data, status</div><div class='add'>+  and control) through the MU interface. The MU also provides the ability</div><div class='add'>+  for one processor (A side) to signal the other processor (B side) using</div><div class='add'>+  interrupts.</div><div class='add'>+</div><div class='add'>+  Because the MU manages the messaging between processors, the MU uses</div><div class='add'>+  different clocks (from each side of the different peripheral buses).</div><div class='add'>+  Therefore, the MU must synchronize the accesses from one side to the</div><div class='add'>+  other. The MU accomplishes synchronization using two sets of matching</div><div class='add'>+  registers (Processor A-side, Processor B-side).</div><div class='add'>+</div><div class='add'>+  MU can work as msi interrupt controller to do doorbell</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx6sx-mu-msi</div><div class='add'>+      - fsl,imx7ulp-mu-msi</div><div class='add'>+      - fsl,imx8ulp-mu-msi</div><div class='add'>+      - fsl,imx8ulp-mu-msi-s4</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: a side register base address</div><div class='add'>+      - description: b side register base address</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: processor-a-side</div><div class='add'>+      - const: processor-b-side</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: a side interrupt number.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: a side power domain</div><div class='add'>+      - description: b side power domain</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: processor-a-side</div><div class='add'>+      - const: processor-b-side</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  msi-controller: true</div><div class='add'>+</div><div class='add'>+  "#msi-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - msi-controller</div><div class='add'>+  - "#msi-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+</div><div class='add'>+    msi-controller@5d270000 {</div><div class='add'>+        compatible = "fsl,imx6sx-mu-msi";</div><div class='add'>+        msi-controller;</div><div class='add'>+        #msi-cells = &lt;0&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        reg = &lt;0x5d270000 0x10000&gt;,     /* A side */</div><div class='add'>+              &lt;0x5d300000 0x10000&gt;;     /* B side */</div><div class='add'>+        reg-names = "processor-a-side", "processor-b-side";</div><div class='add'>+        interrupts = &lt;GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd IMX_SC_R_MU_12A&gt;,</div><div class='add'>+                        &lt;&amp;pd IMX_SC_R_MU_12B&gt;;</div><div class='add'>+        power-domain-names = "processor-a-side", "processor-b-side";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml<br/>index 160ff4b07cac..afb3dd80b643 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/idt,32434-pic.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/idt,32434-pic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: IDT 79RC32434 Interrupt Controller Device Tree Bindings</div><div class='add'>+title: IDT 79RC32434 Interrupt Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml<br/>index 0358a7739c8e..609308a5f91d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/ingenic,intc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs interrupt controller devicetree bindings</div><div class='add'>+title: Ingenic SoCs interrupt controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt b/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt<br/>deleted file mode 100644<br/>index 7d19f494f19a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Interrupt chips</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-* Intel I/O Advanced Programmable Interrupt Controller (IO APIC)</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-  --------------------</div><div class='del'>-     compatible = "intel,ce4100-ioapic";</div><div class='del'>-     #interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-  Device's interrupt property:</div><div class='del'>-</div><div class='del'>-     interrupts = &lt;P S&gt;;</div><div class='del'>-</div><div class='del'>-  The first number (P) represents the interrupt pin which is wired to the</div><div class='del'>-  IO APIC. The second number (S) represents the sense of interrupt which</div><div class='del'>-  should be configured and can be one of:</div><div class='del'>-    0 - Edge Rising</div><div class='del'>-    1 - Level Low</div><div class='del'>-    2 - Level High</div><div class='del'>-    3 - Edge Falling</div><div class='del'>-</div><div class='del'>-* Local APIC</div><div class='del'>-  Required property:</div><div class='del'>-</div><div class='del'>-     compatible = "intel,ce4100-lapic";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.yaml<br/>new file mode 100644<br/>index 000000000000..a3ac818f067d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-ioapic.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Intel I/O Advanced Programmable Interrupt Controller (IO APIC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rahul Tanwar &lt;rtanwar@maxlinear.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Intel's Advanced Programmable Interrupt Controller (APIC) is a</div><div class='add'>+  family of interrupt controllers. The APIC is a split</div><div class='add'>+  architecture design, with a local component (LAPIC) integrated</div><div class='add'>+  into the processor itself and an external I/O APIC. Local APIC</div><div class='add'>+  (lapic) receives interrupts from the processor's interrupt pins,</div><div class='add'>+  from internal sources and from an external I/O APIC (ioapic).</div><div class='add'>+  And it sends these to the processor core for handling.</div><div class='add'>+  See [1] Chapter 8 for more details.</div><div class='add'>+</div><div class='add'>+  Many of the Intel's generic devices like hpet, ioapic, lapic have</div><div class='add'>+  the ce4100 name in their compatible property names because they</div><div class='add'>+  first appeared in CE4100 SoC.</div><div class='add'>+</div><div class='add'>+  This schema defines bindings for I/O APIC interrupt controller.</div><div class='add'>+</div><div class='add'>+  [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: intel,ce4100-ioapic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ioapic1: interrupt-controller@fec00000 {</div><div class='add'>+        compatible = "intel,ce4100-ioapic";</div><div class='add'>+        reg = &lt;0xfec00000 0x1000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml<br/>new file mode 100644<br/>index 000000000000..6b20a5fa8590<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/intel,ce4100-lapic.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Intel Local Advanced Programmable Interrupt Controller (LAPIC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rahul Tanwar &lt;rtanwar@maxlinear.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Intel's Advanced Programmable Interrupt Controller (APIC) is a</div><div class='add'>+  family of interrupt controllers. The APIC is a split</div><div class='add'>+  architecture design, with a local component (LAPIC) integrated</div><div class='add'>+  into the processor itself and an external I/O APIC. Local APIC</div><div class='add'>+  (lapic) receives interrupts from the processor's interrupt pins,</div><div class='add'>+  from internal sources and from an external I/O APIC (ioapic).</div><div class='add'>+  And it sends these to the processor core for handling.</div><div class='add'>+  See [1] Chapter 8 for more details.</div><div class='add'>+</div><div class='add'>+  Many of the Intel's generic devices like hpet, ioapic, lapic have</div><div class='add'>+  the ce4100 name in their compatible property names because they</div><div class='add'>+  first appeared in CE4100 SoC.</div><div class='add'>+</div><div class='add'>+  This schema defines bindings for local APIC interrupt controller.</div><div class='add'>+</div><div class='add'>+  [1] https://pdos.csail.mit.edu/6.828/2008/readings/ia32/IA32-3A.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: intel,ce4100-lapic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  intel,virtual-wire-mode:</div><div class='add'>+    description: Intel defines a few possible interrupt delivery</div><div class='add'>+      modes. With respect to boot/init time, mainly two interrupt</div><div class='add'>+      delivery modes are possible.</div><div class='add'>+      PIC Mode - Legacy external 8259 compliant PIC interrupt controller.</div><div class='add'>+      Virtual Wire Mode - use lapic as virtual wire interrupt delivery mode.</div><div class='add'>+      For ACPI or MPS spec compliant systems, it is figured out by some read</div><div class='add'>+      only bit field/s available in their respective defined data structures.</div><div class='add'>+      For OF based systems, it is by default set to PIC mode.</div><div class='add'>+      But if this optional boolean property is set, then the interrupt delivery</div><div class='add'>+      mode is configured to virtual wire compatibility mode.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    lapic0: interrupt-controller@fee00000 {</div><div class='add'>+        compatible = "intel,ce4100-lapic";</div><div class='add'>+        reg = &lt;0xfee00000 0x1000&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        intel,virtual-wire-mode;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml<br/>index 14dced11877b..a02a6b5af205 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2018 Linaro Ltd.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel IXP4xx XScale Networking Processors Interrupt Controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,cpu-interrupt-controller.yaml<br/>new file mode 100644<br/>index 000000000000..adf989976dcc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,cpu-interrupt-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/loongson,cpu-interrupt-controller.yaml</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/loongson,cpu-interrupt-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LoongArch CPU Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Peibao &lt;liupeibao@loongson.cn&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: loongson,cpu-interrupt-controller</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+      compatible = "loongson,cpu-interrupt-controller";</div><div class='add'>+      #interrupt-cells = &lt;1&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml<br/>index d6bc1a687fc7..f0acd5671bb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Loongson-3 HyperTransport Interrupt Controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml<br/>index 87a74558204f..1d145763908e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/loongson,htvec.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Loongson-3 HyperTransport Interrupt Vector Controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml<br/>index 750cc44628e9..00b570c82903 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/loongson,liointc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Loongson Local I/O Interrupt Controller</div><div class='ctx'> </div><div class='hunk'>@@ -54,7 +54,7 @@ properties:</div><div class='ctx'>   '#interrupt-cells':</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='del'>-  'loongson,parent_int_map':</div><div class='add'>+  loongson,parent_int_map:</div><div class='ctx'>     description: |</div><div class='ctx'>       This property points how the children interrupts will be mapped into CPU</div><div class='ctx'>       interrupt lines. Each cell refers to a parent interrupt line from 0 to 3</div><div class='hunk'>@@ -71,7 +71,7 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - interrupt-controller</div><div class='ctx'>   - '#interrupt-cells'</div><div class='del'>-  - 'loongson,parent_int_map'</div><div class='add'>+  - loongson,parent_int_map</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt<br/>deleted file mode 100644<br/>index a63ed9fcb535..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-Loongson ls1x Interrupt Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "loongson,ls1x-intc". Valid strings are:</div><div class='del'>-</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 2.</div><div class='del'>-- interrupts : Specifies the CPU interrupt the controller is connected to.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-intc: interrupt-controller@1fd01040 {</div><div class='del'>-	compatible = "loongson,ls1x-intc";</div><div class='del'>-	reg = &lt;0x1fd01040 0x18&gt;;</div><div class='del'>-</div><div class='del'>-	interrupt-controller;</div><div class='del'>-	#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='del'>-	interrupts = &lt;2&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml<br/>new file mode 100644<br/>index 000000000000..c60125fb1cbf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/loongson,ls1x-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson-1 Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keguang Zhang &lt;keguang.zhang@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Loongson-1 interrupt controller is connected to the MIPS core interrupt</div><div class='add'>+  controller, which controls several groups of interrupts.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: loongson,ls1x-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    intc0: interrupt-controller@1fd01040 {</div><div class='add'>+        compatible = "loongson,ls1x-intc";</div><div class='add'>+        reg = &lt;0x1fd01040 0x18&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;cpu_intc&gt;;</div><div class='add'>+        interrupts = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml<br/>index 1f6fd73d4624..a71fc2218ede 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Loongson PCH MSI Controller</div><div class='ctx'> </div><div class='hunk'>@@ -25,7 +25,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       u32 value of the base of parent HyperTransport vector allocated</div><div class='ctx'>       to PCH MSI.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 255</div><div class='ctx'> </div><div class='hunk'>@@ -33,7 +33,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       u32 value of the number of parent HyperTransport vectors allocated</div><div class='ctx'>       to PCH MSI.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 1</div><div class='ctx'>     maximum: 256</div><div class='ctx'> </div><div class='hunk'>@@ -46,7 +46,7 @@ required:</div><div class='ctx'>   - loongson,msi-base-vec</div><div class='ctx'>   - loongson,msi-num-vecs</div><div class='ctx'> </div><div class='del'>-additionalProperties: true #fixme</div><div class='add'>+additionalProperties: true # fixme</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml<br/>index fdd6a38a31db..b7bc5cb1dff2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Loongson PCH PIC Controller</div><div class='ctx'> </div><div class='hunk'>@@ -25,7 +25,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       u32 value of the base of parent HyperTransport vector allocated</div><div class='ctx'>       to PCH PIC.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 192</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,cirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,cirq.txt<br/>deleted file mode 100644<br/>index 5865f4f2c69d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mediatek,cirq.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mediatek,cirq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-* Mediatek 27xx cirq</div><div class='del'>-</div><div class='del'>-In Mediatek SOCs, the CIRQ is a low power interrupt controller designed to</div><div class='del'>-work outside MCUSYS which comprises with Cortex-Ax cores,CCI and GIC.</div><div class='del'>-The external interrupts (outside MCUSYS) will feed through CIRQ and connect</div><div class='del'>-to GIC in MCUSYS. When CIRQ is enabled, it will record the edge-sensitive</div><div class='del'>-interrupts and generate a pulse signal to parent interrupt controller when</div><div class='del'>-flush command is executed. With CIRQ, MCUSYS can be completely turned off</div><div class='del'>-to improve the system power consumption without losing interrupts.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of</div><div class='del'>-  - "mediatek,mt2701-cirq" for mt2701 CIRQ</div><div class='del'>-  - "mediatek,mt8135-cirq" for mt8135 CIRQ</div><div class='del'>-  - "mediatek,mt8173-cirq" for mt8173 CIRQ</div><div class='del'>-  and "mediatek,cirq" as a fallback.</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.</div><div class='del'>-- reg: Physical base address of the cirq registers and length of memory</div><div class='del'>-  mapped region.</div><div class='del'>-- mediatek,ext-irq-range: Identifies external irq number range in different</div><div class='del'>-  SOCs.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	cirq: interrupt-controller@10204000 {</div><div class='del'>-		compatible = "mediatek,mt2701-cirq",</div><div class='del'>-			     "mediatek,mtk-cirq";</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;sysirq&gt;;</div><div class='del'>-		reg = &lt;0 0x10204000 0 0x400&gt;;</div><div class='del'>-		mediatek,ext-irq-start = &lt;32 200&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml<br/>new file mode 100644<br/>index 000000000000..fdcb4d8db818<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/mediatek,mtk-cirq.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/mediatek,mtk-cirq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek System Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Youlin Pei &lt;youlin.pei@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  In MediaTek SoCs, the CIRQ is a low power interrupt controller designed to</div><div class='add'>+  work outside of MCUSYS which comprises with Cortex-Ax cores, CCI and GIC.</div><div class='add'>+  The external interrupts (outside MCUSYS) will feed through CIRQ and connect</div><div class='add'>+  to GIC in MCUSYS. When CIRQ is enabled, it will record the edge-sensitive</div><div class='add'>+  interrupts and generate a pulse signal to parent interrupt controller when</div><div class='add'>+  flush command is executed. With CIRQ, MCUSYS can be completely turned off</div><div class='add'>+  to improve the system power consumption without losing interrupts.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2701-cirq</div><div class='add'>+          - mediatek,mt8135-cirq</div><div class='add'>+          - mediatek,mt8173-cirq</div><div class='add'>+          - mediatek,mt8192-cirq</div><div class='add'>+      - const: mediatek,mtk-cirq</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  mediatek,ext-irq-range:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: First CIRQ interrupt</div><div class='add'>+      - description: Last CIRQ interrupt</div><div class='add'>+    description:</div><div class='add'>+      Identifies the range of external interrupts in different SoCs</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - mediatek,ext-irq-range</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    cirq: interrupt-controller@10204000 {</div><div class='add'>+        compatible = "mediatek,mt2701-cirq", "mediatek,mtk-cirq";</div><div class='add'>+        reg = &lt;0x10204000 0x400&gt;;</div><div class='add'>+        #interrupt-cells = &lt;3&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        interrupt-parent = &lt;&amp;sysirq&gt;;</div><div class='add'>+        mediatek,ext-irq-range = &lt;32 200&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt b/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt<br/>index 84ced3f4179b..3ffc60184e44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/mediatek,sysirq.txt</a></div><div class='hunk'>@@ -25,6 +25,7 @@ Required properties:</div><div class='ctx'> 	"mediatek,mt6577-sysirq": for MT6577</div><div class='ctx'> 	"mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712</div><div class='ctx'> 	"mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701</div><div class='add'>+	"mediatek,mt8365-sysirq", "mediatek,mt6577-sysirq": for MT8365</div><div class='ctx'> - interrupt-controller : Identifies the node as an interrupt controller</div><div class='ctx'> - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.</div><div class='ctx'> - reg: Physical base address of the intpol registers and length of memory</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml<br/>index 372ccbfae771..b7c5022eec84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml</a></div><div class='hunk'>@@ -4,13 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell MMP/Orion Interrupt controller bindings</div><div class='add'>+title: Marvell MMP/Orion Interrupt controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Thomas Gleixner &lt;tglx@linutronix.de&gt;</div><div class='del'>-  - Jason Cooper &lt;jason@lakedaemon.net&gt;</div><div class='del'>-  - Marc Zyngier &lt;maz@kernel.org&gt;</div><div class='del'>-  - Rob Herring &lt;robh+dt@kernel.org&gt;</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Gregory Clement &lt;gregory.clement@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - if:</div><div class='hunk'>@@ -55,8 +53,8 @@ allOf:</div><div class='ctx'>           maxItems: 1</div><div class='ctx'>         reg-names:</div><div class='ctx'>           items:</div><div class='del'>-            - const: 'mux status'</div><div class='del'>-            - const: 'mux mask'</div><div class='add'>+            - const: mux status</div><div class='add'>+            - const: mux mask</div><div class='ctx'>       required:</div><div class='ctx'>         - interrupts</div><div class='ctx'>     else:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml<br/>index 27b798bfe29b..4ff609faba32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/mscc,ocelot-icpu-intr.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/mscc,ocelot-icpu-intr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microsemi Ocelot SoC ICPU Interrupt Controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml b/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml<br/>new file mode 100644<br/>index 000000000000..46a1f5f54b74<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MIPS CPU Interrupt Controller</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+   On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU</div><div class='add'>+   IRQs from a devicetree file and create a irq_domain for IRQ controller.</div><div class='add'>+</div><div class='add'>+   With the irq_domain in place we can describe how the 8 IRQs are wired to the</div><div class='add'>+   platforms internal interrupt controller cascade.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mti,cpu-interrupt-controller</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller {</div><div class='add'>+      compatible = "mti,cpu-interrupt-controller";</div><div class='add'>+      #address-cells = &lt;0&gt;;</div><div class='add'>+      #interrupt-cells = &lt;1&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml<br/>index 9ce6804bdb99..2d6307a383ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/nuvoton,wpcm450-aic.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/nuvoton,wpcm450-aic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Nuvoton WPCM450 Advanced Interrupt Controller bindings</div><div class='add'>+title: Nuvoton WPCM450 Advanced Interrupt Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt<br/>deleted file mode 100644<br/>index 98d89e53013d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,76 +0,0 @@</div><div class='del'>-PDC interrupt controller</div><div class='del'>-</div><div class='del'>-Qualcomm Technologies Inc. SoCs based on the RPM Hardened architecture have a</div><div class='del'>-Power Domain Controller (PDC) that is on always-on domain. In addition to</div><div class='del'>-providing power control for the power domains, the hardware also has an</div><div class='del'>-interrupt controller that can be used to help detect edge low interrupts as</div><div class='del'>-well detect interrupts when the GIC is non-operational.</div><div class='del'>-</div><div class='del'>-GIC is parent interrupt controller at the highest level. Platform interrupt</div><div class='del'>-controller PDC is next in hierarchy, followed by others. Drivers requiring</div><div class='del'>-wakeup capabilities of their device interrupts routed through the PDC, must</div><div class='del'>-specify PDC as their interrupt controller and request the PDC port associated</div><div class='del'>-with the GIC interrupt. See example below.</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Should contain "qcom,&lt;soc&gt;-pdc" and "qcom,pdc"</div><div class='del'>-		    - "qcom,sc7180-pdc": For SC7180</div><div class='del'>-		    - "qcom,sc7280-pdc": For SC7280</div><div class='del'>-		    - "qcom,sdm845-pdc": For SDM845</div><div class='del'>-		    - "qcom,sdm8250-pdc": For SM8250</div><div class='del'>-		    - "qcom,sdm8350-pdc": For SM8350</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: Specifies the base physical address for PDC hardware.</div><div class='del'>-</div><div class='del'>-- interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Specifies the number of cells needed to encode an interrupt</div><div class='del'>-		    source.</div><div class='del'>-		    Must be 2.</div><div class='del'>-		    The first element of the tuple is the PDC pin for the</div><div class='del'>-		    interrupt.</div><div class='del'>-		    The second element is the trigger type.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;bool&gt;</div><div class='del'>-	Definition: Identifies the node as an interrupt controller.</div><div class='del'>-</div><div class='del'>-- qcom,pdc-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32 array&gt;</div><div class='del'>-	Definition: Specifies the PDC pin offset and the number of PDC ports.</div><div class='del'>-		    The tuples indicates the valid mapping of valid PDC ports</div><div class='del'>-		    and their hwirq mapping.</div><div class='del'>-		    The first element of the tuple is the starting PDC port.</div><div class='del'>-		    The second element is the GIC hwirq number for the PDC port.</div><div class='del'>-		    The third element is the number of interrupts in sequence.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pdc: interrupt-controller@b220000 {</div><div class='del'>-		compatible = "qcom,sdm845-pdc";</div><div class='del'>-		reg = &lt;0xb220000 0x30000&gt;;</div><div class='del'>-		qcom,pdc-ranges = &lt;0 512 94&gt;, &lt;94 641 15&gt;, &lt;115 662 7&gt;;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-DT binding of a device that wants to use the GIC SPI 514 as a wakeup</div><div class='del'>-interrupt, must do -</div><div class='del'>-</div><div class='del'>-	wake-device {</div><div class='del'>-		interrupts-extended = &lt;&amp;pdc 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-In this case interrupt 514 would be mapped to port 2 on the PDC as defined by</div><div class='del'>-the qcom,pdc-ranges property.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml<br/>new file mode 100644<br/>index 000000000000..a106ba6e810b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: PDC interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm Technologies Inc. SoCs based on the RPM Hardened architecture have a</div><div class='add'>+  Power Domain Controller (PDC) that is on always-on domain. In addition to</div><div class='add'>+  providing power control for the power domains, the hardware also has an</div><div class='add'>+  interrupt controller that can be used to help detect edge low interrupts as</div><div class='add'>+  well detect interrupts when the GIC is non-operational.</div><div class='add'>+</div><div class='add'>+  GIC is parent interrupt controller at the highest level. Platform interrupt</div><div class='add'>+  controller PDC is next in hierarchy, followed by others. Drivers requiring</div><div class='add'>+  wakeup capabilities of their device interrupts routed through the PDC, must</div><div class='add'>+  specify PDC as their interrupt controller and request the PDC port associated</div><div class='add'>+  with the GIC interrupt. See example below.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,qdu1000-pdc</div><div class='add'>+          - qcom,sa8775p-pdc</div><div class='add'>+          - qcom,sc7180-pdc</div><div class='add'>+          - qcom,sc7280-pdc</div><div class='add'>+          - qcom,sc8280xp-pdc</div><div class='add'>+          - qcom,sdm845-pdc</div><div class='add'>+          - qcom,sdx55-pdc</div><div class='add'>+          - qcom,sdx65-pdc</div><div class='add'>+          - qcom,sm6350-pdc</div><div class='add'>+          - qcom,sm8150-pdc</div><div class='add'>+          - qcom,sm8250-pdc</div><div class='add'>+          - qcom,sm8350-pdc</div><div class='add'>+          - qcom,sm8450-pdc</div><div class='add'>+      - const: qcom,pdc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: PDC base register region</div><div class='add'>+      - description: Edge or Level config register for SPI interrupts</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  qcom,pdc-ranges:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 128 # no hard limit</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: starting PDC port</div><div class='add'>+        - description: GIC hwirq number for the PDC port</div><div class='add'>+        - description: number of interrupts in sequence</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the PDC pin offset and the number of PDC ports.</div><div class='add'>+      The tuples indicates the valid mapping of valid PDC ports</div><div class='add'>+      and their hwirq mapping.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - qcom,pdc-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    pdc: interrupt-controller@b220000 {</div><div class='add'>+        compatible = "qcom,sdm845-pdc", "qcom,pdc";</div><div class='add'>+        reg = &lt;0xb220000 0x30000&gt;;</div><div class='add'>+        qcom,pdc-ranges = &lt;0 512 94&gt;, &lt;94 641 15&gt;, &lt;115 662 7&gt;;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    wake-device {</div><div class='add'>+        interrupts-extended = &lt;&amp;pdc 2 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt<br/>deleted file mode 100644<br/>index e0062aebf025..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,61 +0,0 @@</div><div class='del'>-RDA Micro RDA8810PL Interrupt Controller</div><div class='del'>-</div><div class='del'>-The interrupt controller in RDA8810PL SoC is a custom interrupt controller</div><div class='del'>-which supports up to 32 interrupts.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be "rda,8810pl-intc".</div><div class='del'>-- reg: Specifies base physical address of the registers set.</div><div class='del'>-- interrupt-controller: Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 2.</div><div class='del'>-</div><div class='del'>-The interrupt sources are as follows:</div><div class='del'>-</div><div class='del'>-ID	Name</div><div class='del'>-------------</div><div class='del'>-0:	PULSE_DUMMY</div><div class='del'>-1:	I2C</div><div class='del'>-2:	NAND_NFSC</div><div class='del'>-3:	SDMMC1</div><div class='del'>-4:	SDMMC2</div><div class='del'>-5:	SDMMC3</div><div class='del'>-6:	SPI1</div><div class='del'>-7:	SPI2</div><div class='del'>-8:	SPI3</div><div class='del'>-9:	UART1</div><div class='del'>-10:	UART2</div><div class='del'>-11:	UART3</div><div class='del'>-12:	GPIO1</div><div class='del'>-13:	GPIO2</div><div class='del'>-14:	GPIO3</div><div class='del'>-15:	KEYPAD</div><div class='del'>-16:	TIMER</div><div class='del'>-17:	TIMEROS</div><div class='del'>-18:	COMREG0</div><div class='del'>-19:	COMREG1</div><div class='del'>-20:	USB</div><div class='del'>-21:	DMC</div><div class='del'>-22:	DMA</div><div class='del'>-23:	CAMERA</div><div class='del'>-24:	GOUDA</div><div class='del'>-25:	GPU</div><div class='del'>-26:	VPU_JPG</div><div class='del'>-27:	VPU_HOST</div><div class='del'>-28:	VOC</div><div class='del'>-29:	AUIFC0</div><div class='del'>-30:	AUIFC1</div><div class='del'>-31:	L2CC</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-		apb@20800000 {</div><div class='del'>-			compatible = "simple-bus";</div><div class='del'>-			...</div><div class='del'>-			intc: interrupt-controller@0 {</div><div class='del'>-				compatible = "rda,8810pl-intc";</div><div class='del'>-				reg = &lt;0x0 0x1000&gt;;</div><div class='del'>-				interrupt-controller;</div><div class='del'>-				#interrupt-cells = &lt;2&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml<br/>new file mode 100644<br/>index 000000000000..96d6285d0087<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/rda,8810pl-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RDA Micro RDA8810PL interrupt controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/interrupt-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rda,8810pl-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    intc: interrupt-controller@0 {</div><div class='add'>+      compatible = "rda,8810pl-intc";</div><div class='add'>+      reg = &lt;0x0 0x1000&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml<br/>index 9e76fff20323..fb5593724059 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/realtek,rtl-intc.yaml</a></div><div class='hunk'>@@ -4,7 +4,15 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Realtek RTL SoC interrupt controller devicetree bindings</div><div class='add'>+title: Realtek RTL SoC interrupt controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Interrupt controller and router for Realtek MIPS SoCs, allowing each SoC</div><div class='add'>+  interrupt to be routed to one parent CPU (hardware) interrupt, or left</div><div class='add'>+  disconnected.</div><div class='add'>+  All connected input lines from SoC peripherals can be masked individually,</div><div class='add'>+  and an interrupt status register is present to indicate which interrupts are</div><div class='add'>+  pending.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Birger Koblitz &lt;mail@birger-koblitz.de&gt;</div><div class='hunk'>@@ -13,23 +21,33 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: realtek,rtl-intc</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - realtek,rtl8380-intc</div><div class='add'>+          - const: realtek,rtl-intc</div><div class='add'>+      - const: realtek,rtl-intc</div><div class='add'>+        deprecated: true</div><div class='ctx'> </div><div class='ctx'>   "#interrupt-cells":</div><div class='add'>+    description:</div><div class='add'>+      SoC interrupt line index.</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 15</div><div class='add'>+    description:</div><div class='add'>+      List of parent interrupts, in the order that they are connected to this</div><div class='add'>+      interrupt router's outputs, starting at the first output.</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='del'>-  "#address-cells":</div><div class='del'>-    const: 0</div><div class='del'>-</div><div class='ctx'>   interrupt-map:</div><div class='add'>+    deprecated: true</div><div class='ctx'>     description: Describes mapping from SoC interrupts to CPU interrupts</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -37,21 +55,33 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#interrupt-cells"</div><div class='ctx'>   - interrupt-controller</div><div class='del'>-  - "#address-cells"</div><div class='del'>-  - interrupt-map</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: realtek,rtl-intc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        "#address-cells":</div><div class='add'>+          const: 0</div><div class='add'>+      required:</div><div class='add'>+        - "#address-cells"</div><div class='add'>+        - interrupt-map</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    intc: interrupt-controller@3000 {</div><div class='del'>-      compatible = "realtek,rtl-intc";</div><div class='add'>+    interrupt-controller@3000 {</div><div class='add'>+      compatible = "realtek,rtl8380-intc", "realtek,rtl-intc";</div><div class='ctx'>       #interrupt-cells = &lt;1&gt;;</div><div class='ctx'>       interrupt-controller;</div><div class='del'>-      reg = &lt;0x3000 0x20&gt;;</div><div class='del'>-      #address-cells = &lt;0&gt;;</div><div class='del'>-      interrupt-map =</div><div class='del'>-              &lt;31 &amp;cpuintc 2&gt;,</div><div class='del'>-              &lt;30 &amp;cpuintc 1&gt;,</div><div class='del'>-              &lt;29 &amp;cpuintc 5&gt;;</div><div class='add'>+      reg = &lt;0x3000 0x18&gt;;</div><div class='add'>+</div><div class='add'>+      interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='add'>+      interrupts = &lt;2&gt;, &lt;3&gt;, &lt;4&gt;, &lt;5&gt;, &lt;6&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt<br/>deleted file mode 100644<br/>index 56e8d82aff34..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8300h-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-* H8/300H Interrupt controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: has to be "renesas,h8300h-intc", "renesas,h8300-intc" as fallback.</div><div class='del'>-- #interrupt-cells: has to be &lt;2&gt;: an interrupt index and flags, as defined in</div><div class='del'>-  interrupts.txt in this directory</div><div class='del'>-- regs: Base address of interrupt controller registers.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- any properties, listed in interrupts.txt, and any standard resource allocation</div><div class='del'>-  properties</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	h8intc: interrupt-controller@fee012 {</div><div class='del'>-		compatible = "renesas,h8300h-intc", "renesas,h8300-intc";</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		reg = &lt;0xfee012 7&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt<br/>deleted file mode 100644<br/>index faded2b1559b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/renesas,h8s-intc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-* H8S Interrupt controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: has to be "renesas,h8s-intc", "renesas,h8300-intc" as fallback.</div><div class='del'>-- #interrupt-cells: has to be &lt;2&gt;: an interrupt index and flags, as defined in</div><div class='del'>-  interrupts.txt in this directory</div><div class='del'>-- regs: Base address of interrupt controller registers.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- any properties, listed in interrupts.txt, and any standard resource allocation</div><div class='del'>-  properties</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	h8intc: interrupt-controller@fffe00 {</div><div class='del'>-		compatible = "renesas,h8s-intc", "renesas,h8300-intc";</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		reg = &lt;0xfffe00 24&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml<br/>index 620f01775e42..95033cb514fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: DT bindings for the R-Mobile/R-Car/RZ/G interrupt controller</div><div class='add'>+title: R-Mobile/R-Car/RZ/G interrupt controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='hunk'>@@ -37,6 +37,7 @@ properties:</div><div class='ctx'>           - renesas,intc-ex-r8a77990    # R-Car E3</div><div class='ctx'>           - renesas,intc-ex-r8a77995    # R-Car D3</div><div class='ctx'>           - renesas,intc-ex-r8a779a0    # R-Car V3U</div><div class='add'>+          - renesas,intc-ex-r8a779g0    # R-Car V4H</div><div class='ctx'>       - const: renesas,irqc</div><div class='ctx'> </div><div class='ctx'>   '#interrupt-cells':</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml<br/>new file mode 100644<br/>index 000000000000..33b90e975e33<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/renesas,rzg2l-irqc.yaml</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/renesas,rzg2l-irqc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/G2L (and alike SoC's) Interrupt Controller (IA55)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='add'>+  - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  IA55 performs various interrupt controls including synchronization for the external</div><div class='add'>+  interrupts of NMI, IRQ, and GPIOINT and the interrupts of the built-in peripheral</div><div class='add'>+  interrupts output by each IP. And it notifies the interrupt to the GIC</div><div class='add'>+    - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI interrupts</div><div class='add'>+    - GPIO pins used as external interrupt input pins, mapped to 32 GIC SPI interrupts</div><div class='add'>+    - NMI edge select (NMI is not treated as NMI exception and supports fall edge and</div><div class='add'>+      stand-up edge detection interrupts)</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/interrupt-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-irqc    # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-irqc    # RZ/V2L</div><div class='add'>+      - const: renesas,rzg2l-irqc</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    description: The first cell should contain external interrupt number (IRQ0-7) and the</div><div class='add'>+                 second cell is used to specify the flag.</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 41</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: clk</div><div class='add'>+      - const: pclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a07g044-cpg.h&gt;</div><div class='add'>+</div><div class='add'>+    irqc: interrupt-controller@110a0000 {</div><div class='add'>+            compatible = "renesas,r9a07g044-irqc", "renesas,rzg2l-irqc";</div><div class='add'>+            reg = &lt;0x110a0000 0x10000&gt;;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            #address-cells = &lt;0&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;cpg CPG_MOD R9A07G044_IA55_CLK&gt;,</div><div class='add'>+                     &lt;&amp;cpg CPG_MOD R9A07G044_IA55_PCLK&gt;;</div><div class='add'>+            clock-names = "clk", "pclk";</div><div class='add'>+            power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+            resets = &lt;&amp;cpg R9A07G044_IA55_RESETN&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml b/Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml<br/>index d631b7589d50..72456a07dac9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/samsung,exynos4210-combiner.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC Interrupt Combiner Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Samsung's Exynos4 architecture includes a interrupt combiner controller which</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt b/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt<br/>deleted file mode 100644<br/>index c54c5a9a2a90..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/samsung,s3c24xx-irq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,53 +0,0 @@</div><div class='del'>-Samsung S3C24XX Interrupt Controllers</div><div class='del'>-</div><div class='del'>-The S3C24XX SoCs contain a custom set of interrupt controllers providing a</div><div class='del'>-varying number of interrupt sources. The set consists of a main- and sub-</div><div class='del'>-controller and on newer SoCs even a second main controller.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Compatible property value should be "samsung,s3c2410-irq"</div><div class='del'>-  for machines before s3c2416 and "samsung,s3c2416-irq" for s3c2416 and later.</div><div class='del'>-</div><div class='del'>-- reg: Physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells : Specifies the number of cells needed to encode an</div><div class='del'>-  interrupt source. The value shall be 4 and interrupt descriptor shall</div><div class='del'>-  have the following format:</div><div class='del'>-      &lt;ctrl_num parent_irq ctrl_irq type&gt;</div><div class='del'>-</div><div class='del'>-  ctrl_num contains the controller to use:</div><div class='del'>-      - 0 ... main controller</div><div class='del'>-      - 1 ... sub controller</div><div class='del'>-      - 2 ... second main controller on s3c2416 and s3c2450</div><div class='del'>-  parent_irq contains the parent bit in the main controller and will be</div><div class='del'>-             ignored in main controllers</div><div class='del'>-  ctrl_irq contains the interrupt bit of the controller</div><div class='del'>-  type contains the trigger type to use</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	interrupt-controller@4a000000 {</div><div class='del'>-		compatible = "samsung,s3c2410-irq";</div><div class='del'>-		reg = &lt;0x4a000000 0x100&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells=&lt;4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	[...]</div><div class='del'>-</div><div class='del'>-	serial@50000000 {</div><div class='del'>-		compatible = "samsung,s3c2410-uart";</div><div class='del'>-		reg = &lt;0x50000000 0x4000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;subintc&gt;;</div><div class='del'>-		interrupts = &lt;1 28 0 4&gt;, &lt;1 28 1 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rtc@57000000 {</div><div class='del'>-		compatible = "samsung,s3c2410-rtc";</div><div class='del'>-		reg = &lt;0x57000000 0x100&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-		interrupts = &lt;0 30 0 3&gt;, &lt;0 8 0 3&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml<br/>index 27092c6a86c4..f75736a061af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml</a></div><div class='hunk'>@@ -26,9 +26,14 @@ description:</div><div class='ctx'>   with priority below this threshold will not cause the PLIC to raise its</div><div class='ctx'>   interrupt line leading to the context.</div><div class='ctx'> </div><div class='del'>-  While the PLIC supports both edge-triggered and level-triggered interrupts,</div><div class='del'>-  interrupt handlers are oblivious to this distinction and therefore it is not</div><div class='del'>-  specified in the PLIC device-tree binding.</div><div class='add'>+  The PLIC supports both edge-triggered and level-triggered interrupts. For</div><div class='add'>+  edge-triggered interrupts, the RISC-V PLIC spec allows two responses to edges</div><div class='add'>+  seen while an interrupt handler is active; the PLIC may either queue them or</div><div class='add'>+  ignore them. In the first case, handlers are oblivious to the trigger type, so</div><div class='add'>+  it is not included in the interrupt specifier. In the second case, software</div><div class='add'>+  needs to know the trigger type, so it can reorder the interrupt flow to avoid</div><div class='add'>+  missing interrupts. This special handling is needed by at least the Renesas</div><div class='add'>+  RZ/Five SoC (AX45MP AndesCore with a NCEPLIC100) and the T-HEAD C900 PLIC.</div><div class='ctx'> </div><div class='ctx'>   While the RISC-V ISA doesn't specify a memory layout for the PLIC, the</div><div class='ctx'>   "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that</div><div class='hunk'>@@ -40,7 +45,6 @@ description:</div><div class='ctx'>   from S-mode. So add thead,c900-plic to distinguish them.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sagar Kadam &lt;sagar.kadam@sifive.com&gt;</div><div class='ctx'>   - Paul Walmsley  &lt;paul.walmsley@sifive.com&gt;</div><div class='ctx'>   - Palmer Dabbelt &lt;palmer@dabbelt.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -49,14 +53,24 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,r9a07g043-plic</div><div class='add'>+          - const: andestech,nceplic100</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - sifive,fu540-c000-plic</div><div class='ctx'>               - starfive,jh7100-plic</div><div class='add'>+              - starfive,jh7110-plic</div><div class='ctx'>               - canaan,k210-plic</div><div class='ctx'>           - const: sifive,plic-1.0.0</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - allwinner,sun20i-d1-plic</div><div class='ctx'>           - const: thead,c900-plic</div><div class='add'>+      - items:</div><div class='add'>+          - const: sifive,plic-1.0.0</div><div class='add'>+          - const: riscv,plic0</div><div class='add'>+        deprecated: true</div><div class='add'>+        description: For the QEMU virt machine only</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -64,8 +78,7 @@ properties:</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    const: 1</div><div class='add'>+  '#interrupt-cells': true</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='hunk'>@@ -78,10 +91,16 @@ properties:</div><div class='ctx'>       riscv,cpu-intc node, which has a riscv node as parent.</div><div class='ctx'> </div><div class='ctx'>   riscv,ndev:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='ctx'>       Specifies how many external interrupts are supported by this controller.</div><div class='ctx'> </div><div class='add'>+  clocks: true</div><div class='add'>+</div><div class='add'>+  power-domains: true</div><div class='add'>+</div><div class='add'>+  resets: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - '#address-cells'</div><div class='hunk'>@@ -91,6 +110,47 @@ required:</div><div class='ctx'>   - interrupts-extended</div><div class='ctx'>   - riscv,ndev</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - andestech,nceplic100</div><div class='add'>+              - thead,c900-plic</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        '#interrupt-cells':</div><div class='add'>+          const: 2</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        '#interrupt-cells':</div><div class='add'>+          const: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,r9a07g043-plic</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - power-domains</div><div class='add'>+        - resets</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt b/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt<br/>deleted file mode 100644<br/>index dac0846fe789..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-Socionext SynQuacer External Interrupt Unit (EXIU)</div><div class='del'>-</div><div class='del'>-The Socionext Synquacer SoC has an external interrupt unit (EXIU)</div><div class='del'>-that forwards a block of 32 configurable input lines to 32 adjacent</div><div class='del'>-level-high type GICv3 SPIs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible           : Should be "socionext,synquacer-exiu".</div><div class='del'>-- reg                  : Specifies base physical address and size of the</div><div class='del'>-                         control registers.</div><div class='del'>-- interrupt-controller : Identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells     : Specifies the number of cells needed to encode an</div><div class='del'>-                         interrupt source. The value must be 3.</div><div class='del'>-- socionext,spi-base   : The SPI number of the first SPI of the 32 adjacent</div><div class='del'>-                         ones the EXIU forwards its interrups to.</div><div class='del'>-</div><div class='del'>-Notes:</div><div class='del'>-</div><div class='del'>-- Only SPIs can use the EXIU as an interrupt parent.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	exiu: interrupt-controller@510c0000 {</div><div class='del'>-		compatible = "socionext,synquacer-exiu";</div><div class='del'>-		reg = &lt;0x0 0x510c0000 0x0 0x20&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		#interrupt-cells = &lt;3&gt;;</div><div class='del'>-		socionext,spi-base = &lt;112&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml b/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml<br/>new file mode 100644<br/>index 000000000000..92cec2255cca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/socionext,synquacer-exiu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext SynQuacer External Interrupt Unit (EXIU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ard Biesheuvel &lt;ardb@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The Socionext SynQuacer SoC has an external interrupt unit (EXIU)</div><div class='add'>+  that forwards a block of 32 configurable input lines to 32 adjacent</div><div class='add'>+  level-high type GICv3 SPIs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: socionext,synquacer-exiu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  socionext,spi-base:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: The SPI number of the first SPI of the 32 adjacent ones the</div><div class='add'>+      EXIU forwards its interrupts to.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - socionext,spi-base</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    interrupt-controller@510c0000 {</div><div class='add'>+        compatible = "socionext,synquacer-exiu";</div><div class='add'>+        reg = &lt;0x510c0000 0x20&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        #interrupt-cells = &lt;3&gt;;</div><div class='add'>+        socionext,spi-base = &lt;112&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml b/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml<br/>index f89ebde76dab..de7c5e59bae1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/socionext,uniphier-aidet.yaml</a></div><div class='hunk'>@@ -30,6 +30,7 @@ properties:</div><div class='ctx'>       - socionext,uniphier-ld11-aidet</div><div class='ctx'>       - socionext,uniphier-ld20-aidet</div><div class='ctx'>       - socionext,uniphier-pxs3-aidet</div><div class='add'>+      - socionext,uniphier-nx1-aidet</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt<br/>index ced6014061a3..977d7ed3670e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt</a></div><div class='hunk'>@@ -6,11 +6,7 @@ and PL310 L2 Cache IRQs are controlled using System Configuration registers.</div><div class='ctx'> This driver is used to unmask them prior to use.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible	: Should be set to one of:</div><div class='del'>-			"st,stih415-irq-syscfg"</div><div class='del'>-			"st,stih416-irq-syscfg"</div><div class='del'>-			"st,stih407-irq-syscfg"</div><div class='del'>-			"st,stid127-irq-syscfg"</div><div class='add'>+- compatible	: Should be "st,stih407-irq-syscfg"</div><div class='ctx'> - st,syscfg	: Phandle to Cortex-A9 IRQ system config registers</div><div class='ctx'> - st,irq-device	: Array of IRQs to enable - should be 2 in length</div><div class='ctx'> - st,fiq-device	: Array of FIQs to enable - should be 2 in length</div><div class='hunk'>@@ -25,11 +21,10 @@ Optional properties:</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> irq-syscfg {</div><div class='del'>-	compatible    = "st,stih416-irq-syscfg";</div><div class='add'>+	compatible    = "st,stih407-irq-syscfg";</div><div class='ctx'> 	st,syscfg     = &lt;&amp;syscfg_cpu&gt;;</div><div class='ctx'> 	st,irq-device = &lt;ST_IRQ_SYSCFG_PMU_0&gt;,</div><div class='ctx'> 			&lt;ST_IRQ_SYSCFG_PMU_1&gt;;</div><div class='ctx'> 	st,fiq-device = &lt;ST_IRQ_SYSCFG_DISABLED&gt;,</div><div class='ctx'> 			&lt;ST_IRQ_SYSCFG_DISABLED&gt;;</div><div class='del'>-	st,invert-ext = &lt;(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml b/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml<br/>index e44daa09b137..00c10a8258f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/interrupt-controller/st,stm32-exti.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STM32 External Interrupt Controller Device Tree Bindings</div><div class='add'>+title: STM32 External Interrupt Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml<br/>new file mode 100644<br/>index 000000000000..bd0021dbab0b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/sunplus,sp7021-intc.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SP7021 SoC Interrupt Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Qin Jian &lt;qinjian@cqplus1.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: sunplus,sp7021-intc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      Specifies base physical address(s) and size of the controller regs.</div><div class='add'>+      The 1st region include type/polarity/priority/mask regs.</div><div class='add'>+      The 2nd region include clear/masked_ext0/masked_ext1/group regs.</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+    description:</div><div class='add'>+      The first cell is the IRQ number, the second cell is the trigger</div><div class='add'>+      type as defined in interrupt.txt in this directory.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      EXT_INT0 &amp; EXT_INT1, 2 interrupts references to primary interrupt</div><div class='add'>+      controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    intc: interrupt-controller@9c000780 {</div><div class='add'>+        compatible = "sunplus,sp7021-intc";</div><div class='add'>+        reg = &lt;0x9c000780 0x80&gt;, &lt;0x9c000a80 0x80&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;, /* EXT_INT0 */</div><div class='add'>+                     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;; /* EXT_INT1 */</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml<br/>index 88c46e61732e..6a49d74b992a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml</a></div><div class='hunk'>@@ -59,6 +59,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   msi-controller: true</div><div class='ctx'> </div><div class='ctx'>   ti,interrupt-ranges:</div><div class='hunk'>@@ -82,6 +85,9 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Array of phandles to DMA controllers where the unmapped events originate.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml<br/>index e12aee42b126..c99cc7323c71 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml</a></div><div class='hunk'>@@ -58,6 +58,9 @@ properties:</div><div class='ctx'>         1 = If intr supports edge triggered interrupts.</div><div class='ctx'>         4 = If intr supports level triggered interrupts.</div><div class='ctx'> </div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='ctx'>   '#interrupt-cells':</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml b/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml<br/>index 5e125cf2a88b..e20016f12017 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/allwinner,sun50i-h6-iommu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/iommu/allwinner,sun50i-h6-iommu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner H6 IOMMU Device Tree Bindings</div><div class='add'>+title: Allwinner H6 IOMMU</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/apple,dart.yaml b/Documentation/devicetree/bindings/iommu/apple,dart.yaml<br/>index 82ad669feef7..903edf85d72e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/apple,dart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/apple,dart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/apple,dart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/apple,dart.yaml</a></div><div class='hunk'>@@ -22,7 +22,10 @@ description: |+</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: apple,t8103-dart</div><div class='add'>+    enum:</div><div class='add'>+      - apple,t8103-dart</div><div class='add'>+      - apple,t8110-dart</div><div class='add'>+      - apple,t6000-dart</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/apple,sart.yaml b/Documentation/devicetree/bindings/iommu/apple,sart.yaml<br/>new file mode 100644<br/>index 000000000000..e87c1520fea6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/apple,sart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/apple,sart.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iommu/apple,sart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Apple SART DMA address filter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sven Peter &lt;sven@svenpeter.dev&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Apple SART is a simple address filter for DMA transactions. Regions of</div><div class='add'>+  physical memory must be added to the SART's allow list before any</div><div class='add'>+  DMA can target these. Unlike a proper IOMMU no remapping can be done and</div><div class='add'>+  special support in the consumer driver is required since not all DMA</div><div class='add'>+  transactions of a single device are subject to SART filtering.</div><div class='add'>+</div><div class='add'>+  SART1 has first been used since at least the A11 (iPhone 8 and iPhone X)</div><div class='add'>+  and allows 36 bit of physical address space and filter entries with sizes</div><div class='add'>+  up to 24 bit.</div><div class='add'>+</div><div class='add'>+  SART2, first seen in A14 and M1, allows 36 bit of physical address space</div><div class='add'>+  and filter entry size up to 36 bit.</div><div class='add'>+</div><div class='add'>+  SART3, first seen in M1 Pro/Max, extends both the address space and filter</div><div class='add'>+  entry size to 42 bit.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: apple,t8112-sart</div><div class='add'>+          - const: apple,t6000-sart</div><div class='add'>+      - enum:</div><div class='add'>+          - apple,t6000-sart</div><div class='add'>+          - apple,t8103-sart</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    iommu@7bc50000 {</div><div class='add'>+      compatible = "apple,t8103-sart";</div><div class='add'>+      reg = &lt;0x7bc50000 0x4000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml<br/>index e87bfbcc6913..75fcf4cb52d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml</a></div><div class='hunk'>@@ -37,12 +37,13 @@ properties:</div><div class='ctx'>           hardware supports just a single, combined interrupt line.</div><div class='ctx'>           If provided, then the combined interrupt will be used in preference to</div><div class='ctx'>           any others.</div><div class='del'>-      - minItems: 2</div><div class='add'>+      - minItems: 1</div><div class='ctx'>         items:</div><div class='del'>-          - const: eventq     # Event Queue not empty</div><div class='del'>-          - const: gerror     # Global Error activated</div><div class='del'>-          - const: priq       # PRI Queue not empty</div><div class='del'>-          - const: cmdq-sync  # CMD_SYNC complete</div><div class='add'>+          enum:</div><div class='add'>+            - eventq      # Event Queue not empty</div><div class='add'>+            - gerror      # Global Error activated</div><div class='add'>+            - cmdq-sync   # CMD_SYNC complete</div><div class='add'>+            - priq        # PRI Queue not empty</div><div class='ctx'> </div><div class='ctx'>   '#iommu-cells':</div><div class='ctx'>     const: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml<br/>index da5381c8ee11..ba677d401e24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/arm,smmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/arm,smmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/arm,smmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/arm,smmu.yaml</a></div><div class='hunk'>@@ -28,30 +28,90 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,msm8996-smmu-v2</div><div class='ctx'>               - qcom,msm8998-smmu-v2</div><div class='add'>+              - qcom,sdm630-smmu-v2</div><div class='ctx'>           - const: qcom,smmu-v2</div><div class='ctx'> </div><div class='del'>-      - description: Qcom SoCs implementing "arm,mmu-500"</div><div class='add'>+      - description: Qcom SoCs implementing "qcom,smmu-500" and "arm,mmu-500"</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,qcm2290-smmu-500</div><div class='add'>+              - qcom,qdu1000-smmu-500</div><div class='add'>+              - qcom,sa8775p-smmu-500</div><div class='ctx'>               - qcom,sc7180-smmu-500</div><div class='ctx'>               - qcom,sc7280-smmu-500</div><div class='ctx'>               - qcom,sc8180x-smmu-500</div><div class='add'>+              - qcom,sc8280xp-smmu-500</div><div class='add'>+              - qcom,sdm670-smmu-500</div><div class='ctx'>               - qcom,sdm845-smmu-500</div><div class='ctx'>               - qcom,sdx55-smmu-500</div><div class='add'>+              - qcom,sdx65-smmu-500</div><div class='add'>+              - qcom,sm6115-smmu-500</div><div class='add'>+              - qcom,sm6125-smmu-500</div><div class='ctx'>               - qcom,sm6350-smmu-500</div><div class='add'>+              - qcom,sm6375-smmu-500</div><div class='ctx'>               - qcom,sm8150-smmu-500</div><div class='ctx'>               - qcom,sm8250-smmu-500</div><div class='ctx'>               - qcom,sm8350-smmu-500</div><div class='ctx'>               - qcom,sm8450-smmu-500</div><div class='add'>+              - qcom,sm8550-smmu-500</div><div class='add'>+          - const: qcom,smmu-500</div><div class='add'>+          - const: arm,mmu-500</div><div class='add'>+</div><div class='add'>+      - description: Qcom SoCs implementing "arm,mmu-500" (legacy binding)</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          # Do not add additional SoC to this list. Instead use two previous lists.</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,qcm2290-smmu-500</div><div class='add'>+              - qcom,sc7180-smmu-500</div><div class='add'>+              - qcom,sc7280-smmu-500</div><div class='add'>+              - qcom,sc8180x-smmu-500</div><div class='add'>+              - qcom,sc8280xp-smmu-500</div><div class='add'>+              - qcom,sdm845-smmu-500</div><div class='add'>+              - qcom,sm6115-smmu-500</div><div class='add'>+              - qcom,sm6350-smmu-500</div><div class='add'>+              - qcom,sm6375-smmu-500</div><div class='add'>+              - qcom,sm8150-smmu-500</div><div class='add'>+              - qcom,sm8250-smmu-500</div><div class='add'>+              - qcom,sm8350-smmu-500</div><div class='add'>+              - qcom,sm8450-smmu-500</div><div class='add'>+          - const: arm,mmu-500</div><div class='add'>+      - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500"</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7280-smmu-500</div><div class='add'>+              - qcom,sm6115-smmu-500</div><div class='add'>+              - qcom,sm6125-smmu-500</div><div class='add'>+              - qcom,sm8150-smmu-500</div><div class='add'>+              - qcom,sm8250-smmu-500</div><div class='add'>+              - qcom,sm8350-smmu-500</div><div class='add'>+          - const: qcom,adreno-smmu</div><div class='add'>+          - const: qcom,smmu-500</div><div class='add'>+          - const: arm,mmu-500</div><div class='add'>+      - description: Qcom Adreno GPUs implementing "arm,mmu-500" (legacy binding)</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          # Do not add additional SoC to this list. Instead use previous list.</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7280-smmu-500</div><div class='add'>+              - qcom,sm8150-smmu-500</div><div class='add'>+              - qcom,sm8250-smmu-500</div><div class='add'>+          - const: qcom,adreno-smmu</div><div class='ctx'>           - const: arm,mmu-500</div><div class='ctx'>       - description: Qcom Adreno GPUs implementing "arm,smmu-v2"</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,msm8996-smmu-v2</div><div class='ctx'>               - qcom,sc7180-smmu-v2</div><div class='add'>+              - qcom,sdm630-smmu-v2</div><div class='ctx'>               - qcom,sdm845-smmu-v2</div><div class='add'>+              - qcom,sm6350-smmu-v2</div><div class='ctx'>           - const: qcom,adreno-smmu</div><div class='ctx'>           - const: qcom,smmu-v2</div><div class='add'>+      - description: Qcom Adreno GPUs on Google Cheza platform</div><div class='add'>+        items:</div><div class='add'>+          - const: qcom,sdm845-smmu-v2</div><div class='add'>+          - const: qcom,smmu-v2</div><div class='ctx'>       - description: Marvell SoCs implementing "arm,mmu-500"</div><div class='ctx'>         items:</div><div class='ctx'>           - const: marvell,ap806-smmu-500</div><div class='hunk'>@@ -62,8 +122,9 @@ properties:</div><div class='ctx'>           for improved performance.</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - nvidia,tegra194-smmu</div><div class='ctx'>               - nvidia,tegra186-smmu</div><div class='add'>+              - nvidia,tegra194-smmu</div><div class='add'>+              - nvidia,tegra234-smmu</div><div class='ctx'>           - const: nvidia,smmu-500</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: arm,mmu-500</div><div class='hunk'>@@ -143,19 +204,27 @@ properties:</div><div class='ctx'>       present in such cases.</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: bus</div><div class='del'>-      - const: iface</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: bus clock required for downstream bus access and for the</div><div class='del'>-          smmu ptw</div><div class='del'>-      - description: interface clock required to access smmu's registers</div><div class='del'>-          through the TCU's programming interface.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  nvidia,memory-controller:</div><div class='add'>+    description: |</div><div class='add'>+      A phandle to the memory controller on NVIDIA Tegra186 and later SoCs.</div><div class='add'>+      The memory controller needs to be programmed with a mapping of memory</div><div class='add'>+      client IDs to ARM SMMU stream IDs.</div><div class='add'>+</div><div class='add'>+      If this property is absent, the mapping programmed by early firmware</div><div class='add'>+      will be used and it is not guaranteed that IOMMU translations will be</div><div class='add'>+      enabled for any given device.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -172,18 +241,216 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='del'>-              - nvidia,tegra194-smmu</div><div class='ctx'>               - nvidia,tegra186-smmu</div><div class='add'>+              - nvidia,tegra194-smmu</div><div class='add'>+              - nvidia,tegra234-smmu</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         reg:</div><div class='ctx'>           minItems: 1</div><div class='ctx'>           maxItems: 2</div><div class='add'>+</div><div class='add'>+      # The reference to the memory controller is required to ensure that the</div><div class='add'>+      # memory client to stream ID mapping can be done synchronously with the</div><div class='add'>+      # IOMMU attachment.</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,memory-controller</div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='ctx'>         reg:</div><div class='ctx'>           maxItems: 1</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8998-smmu-v2</div><div class='add'>+              - qcom,sdm630-smmu-v2</div><div class='add'>+    then:</div><div class='add'>+      anyOf:</div><div class='add'>+        - properties:</div><div class='add'>+            clock-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: bus</div><div class='add'>+            clocks:</div><div class='add'>+              items:</div><div class='add'>+                - description: bus clock required for downstream bus access and for</div><div class='add'>+                    the smmu ptw</div><div class='add'>+        - properties:</div><div class='add'>+            clock-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: iface</div><div class='add'>+                - const: mem</div><div class='add'>+                - const: mem_iface</div><div class='add'>+            clocks:</div><div class='add'>+              items:</div><div class='add'>+                - description: interface clock required to access smmu's registers</div><div class='add'>+                    through the TCU's programming interface.</div><div class='add'>+                - description: bus clock required for memory access</div><div class='add'>+                - description: bus clock required for GPU memory access</div><div class='add'>+        - properties:</div><div class='add'>+            clock-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: iface-mm</div><div class='add'>+                - const: iface-smmu</div><div class='add'>+                - const: bus-mm</div><div class='add'>+                - const: bus-smmu</div><div class='add'>+            clocks:</div><div class='add'>+              items:</div><div class='add'>+                - description: interface clock required to access mnoc's registers</div><div class='add'>+                    through the TCU's programming interface.</div><div class='add'>+                - description: interface clock required to access smmu's registers</div><div class='add'>+                    through the TCU's programming interface.</div><div class='add'>+                - description: bus clock required for downstream bus access</div><div class='add'>+                - description: bus clock required for the smmu ptw</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8996-smmu-v2</div><div class='add'>+              - qcom,sc7180-smmu-v2</div><div class='add'>+              - qcom,sdm845-smmu-v2</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: iface</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: bus clock required for downstream bus access and for</div><div class='add'>+                the smmu ptw</div><div class='add'>+            - description: interface clock required to access smmu's registers</div><div class='add'>+                through the TCU's programming interface.</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,sc7280-smmu-500</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gcc_gpu_memnoc_gfx_clk</div><div class='add'>+            - const: gcc_gpu_snoc_dvm_gfx_clk</div><div class='add'>+            - const: gpu_cc_ahb_clk</div><div class='add'>+            - const: gpu_cc_hlos1_vote_gpu_smmu_clk</div><div class='add'>+            - const: gpu_cc_cx_gmu_clk</div><div class='add'>+            - const: gpu_cc_hub_cx_int_clk</div><div class='add'>+            - const: gpu_cc_hub_aon_clk</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GPU memnoc_gfx clock</div><div class='add'>+            - description: GPU snoc_dvm_gfx clock</div><div class='add'>+            - description: GPU ahb clock</div><div class='add'>+            - description: GPU hlos1_vote_GPU smmu clock</div><div class='add'>+            - description: GPU cx_gmu clock</div><div class='add'>+            - description: GPU hub_cx_int clock</div><div class='add'>+            - description: GPU hub_aon clock</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm6350-smmu-v2</div><div class='add'>+              - qcom,sm8150-smmu-500</div><div class='add'>+              - qcom,sm8250-smmu-500</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ahb</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: iface</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: bus clock required for AHB bus access</div><div class='add'>+            - description: bus clock required for downstream bus access and for</div><div class='add'>+                the smmu ptw</div><div class='add'>+            - description: interface clock required to access smmu's registers</div><div class='add'>+                through the TCU's programming interface.</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          items:</div><div class='add'>+            - enum:</div><div class='add'>+                - qcom,sm6115-smmu-500</div><div class='add'>+                - qcom,sm6125-smmu-500</div><div class='add'>+            - const: qcom,adreno-smmu</div><div class='add'>+            - const: qcom,smmu-500</div><div class='add'>+            - const: arm,mmu-500</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mem</div><div class='add'>+            - const: hlos</div><div class='add'>+            - const: iface</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GPU memory bus clock</div><div class='add'>+            - description: Voter clock required for HLOS SMMU access</div><div class='add'>+            - description: Interface clock required for register access</div><div class='add'>+</div><div class='add'>+  # Disallow clocks for all other platforms with specific compatibles</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - cavium,smmu-v2</div><div class='add'>+              - marvell,ap806-smmu-500</div><div class='add'>+              - nvidia,smmu-500</div><div class='add'>+              - qcom,qcm2290-smmu-500</div><div class='add'>+              - qcom,qdu1000-smmu-500</div><div class='add'>+              - qcom,sa8775p-smmu-500</div><div class='add'>+              - qcom,sc7180-smmu-500</div><div class='add'>+              - qcom,sc8180x-smmu-500</div><div class='add'>+              - qcom,sc8280xp-smmu-500</div><div class='add'>+              - qcom,sdm670-smmu-500</div><div class='add'>+              - qcom,sdm845-smmu-500</div><div class='add'>+              - qcom,sdx55-smmu-500</div><div class='add'>+              - qcom,sdx65-smmu-500</div><div class='add'>+              - qcom,sm6350-smmu-500</div><div class='add'>+              - qcom,sm6375-smmu-500</div><div class='add'>+              - qcom,sm8350-smmu-500</div><div class='add'>+              - qcom,sm8450-smmu-500</div><div class='add'>+              - qcom,sm8550-smmu-500</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names: false</div><div class='add'>+        clocks: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,sm6375-smmu-500</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: SNoC MMU TBU RT GDSC</div><div class='add'>+            - description: SNoC MMU TBU NRT GDSC</div><div class='add'>+            - description: SNoC TURING MMU TBU0 GDSC</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |+</div><div class='ctx'>     /* SMMU with stream matching or stream indexing */</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml<br/>index 97e8c471a5e8..5b6395bc10e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml</a></div><div class='hunk'>@@ -73,10 +73,16 @@ properties:</div><div class='ctx'>           - mediatek,mt2701-m4u  # generation one</div><div class='ctx'>           - mediatek,mt2712-m4u  # generation two</div><div class='ctx'>           - mediatek,mt6779-m4u  # generation two</div><div class='add'>+          - mediatek,mt6795-m4u  # generation two</div><div class='ctx'>           - mediatek,mt8167-m4u  # generation two</div><div class='ctx'>           - mediatek,mt8173-m4u  # generation two</div><div class='ctx'>           - mediatek,mt8183-m4u  # generation two</div><div class='add'>+          - mediatek,mt8186-iommu-mm         # generation two</div><div class='ctx'>           - mediatek,mt8192-m4u  # generation two</div><div class='add'>+          - mediatek,mt8195-iommu-vdo        # generation two</div><div class='add'>+          - mediatek,mt8195-iommu-vpp        # generation two</div><div class='add'>+          - mediatek,mt8195-iommu-infra      # generation two</div><div class='add'>+          - mediatek,mt8365-m4u  # generation two</div><div class='ctx'> </div><div class='ctx'>       - description: mt7623 generation one</div><div class='ctx'>         items:</div><div class='hunk'>@@ -97,6 +103,10 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: bclk</div><div class='ctx'> </div><div class='add'>+  mediatek,infracfg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle to the mediatek infracfg syscon</div><div class='add'>+</div><div class='ctx'>   mediatek,larbs:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -116,10 +126,14 @@ properties:</div><div class='ctx'>       dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,</div><div class='ctx'>       dt-binding/memory/mt2712-larb-port.h for mt2712,</div><div class='ctx'>       dt-binding/memory/mt6779-larb-port.h for mt6779,</div><div class='add'>+      dt-binding/memory/mt6795-larb-port.h for mt6795,</div><div class='ctx'>       dt-binding/memory/mt8167-larb-port.h for mt8167,</div><div class='ctx'>       dt-binding/memory/mt8173-larb-port.h for mt8173,</div><div class='ctx'>       dt-binding/memory/mt8183-larb-port.h for mt8183,</div><div class='add'>+      dt-binding/memory/mt8186-memory-port.h for mt8186,</div><div class='ctx'>       dt-binding/memory/mt8192-larb-port.h for mt8192.</div><div class='add'>+      dt-binding/memory/mt8195-memory-port.h for mt8195.</div><div class='add'>+      dt-binding/memory/mediatek,mt8365-larb-port.h for mt8365.</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -128,7 +142,6 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='del'>-  - mediatek,larbs</div><div class='ctx'>   - '#iommu-cells'</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='hunk'>@@ -139,8 +152,12 @@ allOf:</div><div class='ctx'>             enum:</div><div class='ctx'>               - mediatek,mt2701-m4u</div><div class='ctx'>               - mediatek,mt2712-m4u</div><div class='add'>+              - mediatek,mt6795-m4u</div><div class='ctx'>               - mediatek,mt8173-m4u</div><div class='add'>+              - mediatek,mt8186-iommu-mm</div><div class='ctx'>               - mediatek,mt8192-m4u</div><div class='add'>+              - mediatek,mt8195-iommu-vdo</div><div class='add'>+              - mediatek,mt8195-iommu-vpp</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='hunk'>@@ -150,12 +167,39 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           enum:</div><div class='add'>+            - mediatek,mt8186-iommu-mm</div><div class='ctx'>             - mediatek,mt8192-m4u</div><div class='add'>+            - mediatek,mt8195-iommu-vdo</div><div class='add'>+            - mediatek,mt8195-iommu-vpp</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='ctx'>         - power-domains</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt2712-m4u</div><div class='add'>+              - mediatek,mt6795-m4u</div><div class='add'>+              - mediatek,mt8173-m4u</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - mediatek,infracfg</div><div class='add'>+</div><div class='add'>+  - if: # The IOMMUs don't have larbs.</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: mediatek,mt8195-iommu-infra</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - mediatek,larbs</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -169,17 +213,8 @@ examples:</div><div class='ctx'>             interrupts = &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='ctx'>             clocks = &lt;&amp;infracfg CLK_INFRA_M4U&gt;;</div><div class='ctx'>             clock-names = "bclk";</div><div class='add'>+            mediatek,infracfg = &lt;&amp;infracfg&gt;;</div><div class='ctx'>             mediatek,larbs = &lt;&amp;larb0&gt;, &lt;&amp;larb1&gt;, &lt;&amp;larb2&gt;,</div><div class='ctx'>                              &lt;&amp;larb3&gt;, &lt;&amp;larb4&gt;, &lt;&amp;larb5&gt;;</div><div class='ctx'>             #iommu-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/memory/mt8173-larb-port.h&gt;</div><div class='del'>-</div><div class='del'>-    /* Example for a client device */</div><div class='del'>-    display {</div><div class='del'>-           compatible = "mediatek,mt8173-disp";</div><div class='del'>-           iommus = &lt;&amp;iommu M4U_PORT_DISP_OVL0&gt;,</div><div class='del'>-                    &lt;&amp;iommu M4U_PORT_DISP_RDMA0&gt;;</div><div class='del'>-     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.txt b/Documentation/devicetree/bindings/iommu/qcom,iommu.txt<br/>deleted file mode 100644<br/>index 059139abce35..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/qcom,iommu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/qcom,iommu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,121 +0,0 @@</div><div class='del'>-* QCOM IOMMU v1 Implementation</div><div class='del'>-</div><div class='del'>-Qualcomm "B" family devices which are not compatible with arm-smmu have</div><div class='del'>-a similar looking IOMMU but without access to the global register space,</div><div class='del'>-and optionally requiring additional configuration to route context irqs</div><div class='del'>-to non-secure vs secure interrupt line.</div><div class='del'>-</div><div class='del'>-** Required properties:</div><div class='del'>-</div><div class='del'>-- compatible       : Should be one of:</div><div class='del'>-</div><div class='del'>-                        "qcom,msm8916-iommu"</div><div class='del'>-</div><div class='del'>-                     Followed by "qcom,msm-iommu-v1".</div><div class='del'>-</div><div class='del'>-- clock-names      : Should be a pair of "iface" (required for IOMMUs</div><div class='del'>-                     register group access) and "bus" (required for</div><div class='del'>-                     the IOMMUs underlying bus access).</div><div class='del'>-</div><div class='del'>-- clocks           : Phandles for respective clocks described by</div><div class='del'>-                     clock-names.</div><div class='del'>-</div><div class='del'>-- #address-cells   : must be 1.</div><div class='del'>-</div><div class='del'>-- #size-cells      : must be 1.</div><div class='del'>-</div><div class='del'>-- #iommu-cells     : Must be 1.  Index identifies the context-bank #.</div><div class='del'>-</div><div class='del'>-- ranges           : Base address and size of the iommu context banks.</div><div class='del'>-</div><div class='del'>-- qcom,iommu-secure-id  : secure-id.</div><div class='del'>-</div><div class='del'>-- List of sub-nodes, one per translation context bank.  Each sub-node</div><div class='del'>-  has the following required properties:</div><div class='del'>-</div><div class='del'>-  - compatible     : Should be one of:</div><div class='del'>-        - "qcom,msm-iommu-v1-ns"  : non-secure context bank</div><div class='del'>-        - "qcom,msm-iommu-v1-sec" : secure context bank</div><div class='del'>-  - reg            : Base address and size of context bank within the iommu</div><div class='del'>-  - interrupts     : The context fault irq.</div><div class='del'>-</div><div class='del'>-** Optional properties:</div><div class='del'>-</div><div class='del'>-- reg              : Base address and size of the SMMU local base, should</div><div class='del'>-                     be only specified if the iommu requires configuration</div><div class='del'>-                     for routing of context bank irq's to secure vs non-</div><div class='del'>-                     secure lines.  (Ie. if the iommu contains secure</div><div class='del'>-                     context banks)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-** Examples:</div><div class='del'>-</div><div class='del'>-	apps_iommu: iommu@1e20000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		#iommu-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";</div><div class='del'>-		ranges = &lt;0 0x1e20000 0x40000&gt;;</div><div class='del'>-		reg = &lt;0x1ef0000 0x3000&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_SMMU_CFG_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_APSS_TCU_CLK&gt;;</div><div class='del'>-		clock-names = "iface", "bus";</div><div class='del'>-		qcom,iommu-secure-id = &lt;17&gt;;</div><div class='del'>-</div><div class='del'>-		// mdp_0:</div><div class='del'>-		iommu-ctx@4000 {</div><div class='del'>-			compatible = "qcom,msm-iommu-v1-ns";</div><div class='del'>-			reg = &lt;0x4000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		// venus_ns:</div><div class='del'>-		iommu-ctx@5000 {</div><div class='del'>-			compatible = "qcom,msm-iommu-v1-sec";</div><div class='del'>-			reg = &lt;0x5000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpu_iommu: iommu@1f08000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		#iommu-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";</div><div class='del'>-		ranges = &lt;0 0x1f08000 0x10000&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_SMMU_CFG_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_GFX_TCU_CLK&gt;;</div><div class='del'>-		clock-names = "iface", "bus";</div><div class='del'>-		qcom,iommu-secure-id = &lt;18&gt;;</div><div class='del'>-</div><div class='del'>-		// gfx3d_user:</div><div class='del'>-		iommu-ctx@1000 {</div><div class='del'>-			compatible = "qcom,msm-iommu-v1-ns";</div><div class='del'>-			reg = &lt;0x1000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		// gfx3d_priv:</div><div class='del'>-		iommu-ctx@2000 {</div><div class='del'>-			compatible = "qcom,msm-iommu-v1-ns";</div><div class='del'>-			reg = &lt;0x2000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	venus: video-codec@1d00000 {</div><div class='del'>-		...</div><div class='del'>-		iommus = &lt;&amp;apps_iommu 5&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mdp: mdp@1a01000 {</div><div class='del'>-		...</div><div class='del'>-		iommus = &lt;&amp;apps_iommu 4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gpu@1c00000 {</div><div class='del'>-		...</div><div class='del'>-		iommus = &lt;&amp;gpu_iommu 1&gt;, &lt;&amp;gpu_iommu 2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml b/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml<br/>new file mode 100644<br/>index 000000000000..d9fabdf930d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/qcom,iommu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/qcom,iommu.yaml</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iommu/qcom,iommu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies legacy IOMMU implementations</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm "B" family devices which are not compatible with arm-smmu have</div><div class='add'>+  a similar looking IOMMU, but without access to the global register space</div><div class='add'>+  and optionally requiring additional configuration to route context IRQs</div><div class='add'>+  to non-secure vs secure interrupt line.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,msm8916-iommu</div><div class='add'>+          - qcom,msm8953-iommu</div><div class='add'>+      - const: qcom,msm-iommu-v1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Clock required for IOMMU register group access</div><div class='add'>+      - description: Clock required for underlying bus access</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  qcom,iommu-secure-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The SCM secure ID of the IOMMU instance.</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#iommu-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^iommu-ctx@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,msm-iommu-v1-ns</div><div class='add'>+          - qcom,msm-iommu-v1-sec</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - interrupts</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - ranges</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - '#iommu-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    apps_iommu: iommu@1e20000 {</div><div class='add'>+      compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";</div><div class='add'>+      reg = &lt;0x01ef0000 0x3000&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_SMMU_CFG_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_APSS_TCU_CLK&gt;;</div><div class='add'>+      clock-names = "iface", "bus";</div><div class='add'>+      qcom,iommu-secure-id = &lt;17&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;1&gt;;</div><div class='add'>+      #iommu-cells = &lt;1&gt;;</div><div class='add'>+      ranges = &lt;0 0x01e20000 0x40000&gt;;</div><div class='add'>+</div><div class='add'>+      /* mdp_0: */</div><div class='add'>+      iommu-ctx@4000 {</div><div class='add'>+        compatible = "qcom,msm-iommu-v1-ns";</div><div class='add'>+        reg = &lt;0x4000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml<br/>index 8854569ca3a6..be90f68c11d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml</a></div><div class='hunk'>@@ -29,6 +29,7 @@ properties:</div><div class='ctx'>               - renesas,ipmmu-r8a7793  # R-Car M2-N</div><div class='ctx'>               - renesas,ipmmu-r8a7794  # R-Car E2</div><div class='ctx'>           - const: renesas,ipmmu-vmsa  # R-Mobile APE6 or R-Car Gen2 or RZ/G1</div><div class='add'>+</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - renesas,ipmmu-r8a774a1 # RZ/G2M</div><div class='hunk'>@@ -43,10 +44,12 @@ properties:</div><div class='ctx'>               - renesas,ipmmu-r8a77980 # R-Car V3H</div><div class='ctx'>               - renesas,ipmmu-r8a77990 # R-Car E3</div><div class='ctx'>               - renesas,ipmmu-r8a77995 # R-Car D3</div><div class='del'>-              - renesas,ipmmu-r8a779a0 # R-Car V3U</div><div class='add'>+</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - renesas,ipmmu-r8a779f0 # R-Car S4-8</div><div class='add'>+              - renesas,ipmmu-r8a779a0           # R-Car V3U</div><div class='add'>+              - renesas,ipmmu-r8a779f0           # R-Car S4-8</div><div class='add'>+              - renesas,ipmmu-r8a779g0           # R-Car V4H</div><div class='ctx'>           - const: renesas,rcar-gen4-ipmmu-vmsa  # R-Car Gen4</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -71,16 +74,16 @@ properties:</div><div class='ctx'>   renesas,ipmmu-main:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='del'>-      - items:</div><div class='add'>+      - minItems: 1</div><div class='add'>+        items:</div><div class='ctx'>           - description: phandle to main IPMMU</div><div class='del'>-          - description: the interrupt bit number associated with the particular</div><div class='del'>-              cache IPMMU device. The interrupt bit number needs to match the main</div><div class='del'>-              IPMMU IMSSTR register. Only used by cache IPMMU instances.</div><div class='add'>+          - description:</div><div class='add'>+              The interrupt bit number associated with the particular cache</div><div class='add'>+              IPMMU device. If present, the interrupt bit number needs to match</div><div class='add'>+              the main IPMMU IMSSTR register. Only used by cache IPMMU</div><div class='add'>+              instances.</div><div class='ctx'>     description:</div><div class='del'>-      Reference to the main IPMMU phandle plus 1 cell. The cell is</div><div class='del'>-      the interrupt bit number associated with the particular cache IPMMU</div><div class='del'>-      device. The interrupt bit number needs to match the main IPMMU IMSSTR</div><div class='del'>-      register. Only used by cache IPMMU instances.</div><div class='add'>+      Reference to the main IPMMU.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -106,6 +109,22 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - power-domains</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,rcar-gen4-ipmmu-vmsa</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        renesas,ipmmu-main:</div><div class='add'>+          items:</div><div class='add'>+            - maxItems: 1</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        renesas,ipmmu-main:</div><div class='add'>+          items:</div><div class='add'>+            - minItems: 2</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/r8a7791-cpg-mssr.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml b/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml<br/>index af51b91c893e..672a0beea600 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/samsung,sysmmu.yaml</a></div><div class='hunk'>@@ -86,16 +86,6 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/exynos5250.h&gt;</div><div class='ctx'> </div><div class='del'>-    gsc_0: scaler@13e00000 {</div><div class='del'>-      compatible = "samsung,exynos5-gsc";</div><div class='del'>-      reg = &lt;0x13e00000 0x1000&gt;;</div><div class='del'>-      interrupts = &lt;0 85 0&gt;;</div><div class='del'>-      power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='del'>-      clocks = &lt;&amp;clock CLK_GSCL0&gt;;</div><div class='del'>-      clock-names = "gscl";</div><div class='del'>-      iommus = &lt;&amp;sysmmu_gsc0&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='ctx'>     sysmmu_gsc0: iommu@13e80000 {</div><div class='ctx'>       compatible = "samsung,exynos-sysmmu";</div><div class='ctx'>       reg = &lt;0x13E80000 0x1000&gt;;</div><div class='hunk'>@@ -107,4 +97,3 @@ examples:</div><div class='ctx'>       power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='ctx'>       #iommu-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml b/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml<br/>new file mode 100644<br/>index 000000000000..be1539d234f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/iommu/xen,grant-dma.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/iommu/xen,grant-dma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xen specific IOMMU for virtualized devices (e.g. virtio)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stefano Stabellini &lt;sstabellini@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Xen IOMMU represents the Xen grant table interface. Grant mappings</div><div class='add'>+  are to be used with devices connected to the Xen IOMMU using the "iommus"</div><div class='add'>+  property, which also specifies the ID of the backend domain.</div><div class='add'>+  The binding is required to restrict memory access using Xen grant mappings.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xen,grant-dma</div><div class='add'>+</div><div class='add'>+  '#iommu-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      The single cell is the domid (domain ID) of the domain where the backend</div><div class='add'>+      is running.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#iommu-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    iommu {</div><div class='add'>+        compatible = "xen,grant-dma";</div><div class='add'>+        #iommu-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml b/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml<br/>index 71bc031c4fde..3f25cdb4e99b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ipmi/ipmi-ipmb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/ipmi/ipmi-ipmb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: IPMI IPMB device bindings</div><div class='add'>+title: IPMI IPMB device</div><div class='ctx'> </div><div class='ctx'> description: IPMI IPMB device bindings</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml b/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml<br/>index 898e3267893a..c1b4bf95ef99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/ipmi/ipmi-smic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: IPMI device bindings</div><div class='add'>+title: IPMI device</div><div class='ctx'> </div><div class='ctx'> description: IPMI device bindings</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt b/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt<br/>index 352f5e9c759b..4fda76e63396 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ipmi/npcm7xx-kcs-bmc.txt</a></div><div class='hunk'>@@ -1,12 +1,13 @@</div><div class='del'>-* Nuvoton NPCM7xx KCS (Keyboard Controller Style) IPMI interface</div><div class='add'>+* Nuvoton NPCM KCS (Keyboard Controller Style) IPMI interface</div><div class='ctx'> </div><div class='del'>-The Nuvoton SOCs (NPCM7xx) are commonly used as BMCs</div><div class='add'>+The Nuvoton SOCs (NPCM) are commonly used as BMCs</div><div class='ctx'> (Baseboard Management Controllers) and the KCS interface can be</div><div class='ctx'> used to perform in-band IPMI communication with their host.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : should be one of</div><div class='ctx'>     "nuvoton,npcm750-kcs-bmc"</div><div class='add'>+    "nuvoton,npcm845-kcs-bmc", "nuvoton,npcm750-kcs-bmc"</div><div class='ctx'> - interrupts : interrupt generated by the controller</div><div class='ctx'> - kcs_chan : The KCS channel number in the controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/ipmi/ssif-bmc.yaml b/Documentation/devicetree/bindings/ipmi/ssif-bmc.yaml<br/>new file mode 100644<br/>index 000000000000..02b662d780bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ipmi/ssif-bmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ipmi/ssif-bmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ipmi/ssif-bmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SSIF IPMI BMC interface</div><div class='add'>+</div><div class='add'>+description: SSIF IPMI BMC device bindings</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ssif-bmc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ssif-bmc@10 {</div><div class='add'>+            compatible = "ssif-bmc";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/common.yaml b/Documentation/devicetree/bindings/leds/backlight/common.yaml<br/>index 702ba350d869..3b60afbab68b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/common.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Common backlight properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'>   - Daniel Thompson &lt;daniel.thompson@linaro.org&gt;</div><div class='ctx'>   - Jingoo Han &lt;jingoohan1@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml<br/>index 75cc569b9c55..584030b6b0b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/gpio-backlight.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/leds/backlight/gpio-backlight.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: gpio-backlight bindings</div><div class='add'>+title: gpio-backlight</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'>   - Daniel Thompson &lt;daniel.thompson@linaro.org&gt;</div><div class='ctx'>   - Jingoo Han &lt;jingoohan1@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/kinetic,ktz8866.yaml b/Documentation/devicetree/bindings/leds/backlight/kinetic,ktz8866.yaml<br/>new file mode 100644<br/>index 000000000000..e1191453c2f0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/kinetic,ktz8866.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/kinetic,ktz8866.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/backlight/kinetic,ktz8866.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Kinetic Technologies KTZ8866 backlight</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jianhua Lu &lt;lujianhua000@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Kinetic Technologies KTZ8866 is a high efficiency 6-channels-current-sinks</div><div class='add'>+  led backlight with dual lcd bias power.</div><div class='add'>+  https://www.kinet-ic.com/ktz8866/</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: kinetic,ktz8866</div><div class='add'>+</div><div class='add'>+  vddpos-supply:</div><div class='add'>+    description: positive boost supply regulator.</div><div class='add'>+</div><div class='add'>+  vddneg-supply:</div><div class='add'>+    description: negative boost supply regulator.</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: GPIO to use to enable/disable the backlight (HWEN pin).</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  current-num-sinks:</div><div class='add'>+    description: number of the LED current sinks' channels.</div><div class='add'>+    enum: [1, 2, 3, 4, 5, 6]</div><div class='add'>+</div><div class='add'>+  kinetic,current-ramp-delay-ms:</div><div class='add'>+    description: |</div><div class='add'>+      LED current ramping delay time in milliseconds, note that the</div><div class='add'>+      case 1 will be mapped to 1μs.</div><div class='add'>+    enum: [1, 2, 4, 8, 16, 32, 64, 128, 192, 256, 320, 384, 448, 512, 576, 640]</div><div class='add'>+</div><div class='add'>+  kinetic,led-enable-ramp-delay-ms:</div><div class='add'>+    description: |</div><div class='add'>+      LED on/off ramping delay time in milliseconds, note that the case 0 will be</div><div class='add'>+      mapped to 512μs because ktz8866 can't ramp faster than it.</div><div class='add'>+    enum: [0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384]</div><div class='add'>+</div><div class='add'>+  kinetic,enable-lcd-bias:</div><div class='add'>+    description: Set if we want to output bias power supply for LCD.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - vddpos-supply</div><div class='add'>+  - vddneg-supply</div><div class='add'>+  - enable-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    backlight {</div><div class='add'>+        compatible = "kinetic,ktz8866";</div><div class='add'>+</div><div class='add'>+        vddpos-supply = &lt;&amp;bl_vddpos_5p5&gt;;</div><div class='add'>+        vddneg-supply = &lt;&amp;bl_vddneg_5p5&gt;;</div><div class='add'>+        enable-gpios = &lt;&amp;tlmm 139 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        current-num-sinks = &lt;5&gt;;</div><div class='add'>+        kinetic,current-ramp-delay-ms = &lt;128&gt;;</div><div class='add'>+        kinetic,led-enable-ramp-delay-ms = &lt;1&gt;;</div><div class='add'>+        kinetic,enable-lcd-bias;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml<br/>index f5822f4ea667..d7b78198abc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/led-backlight.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/leds/backlight/led-backlight.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: led-backlight bindings</div><div class='add'>+title: led-backlight</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'>   - Daniel Thompson &lt;daniel.thompson@linaro.org&gt;</div><div class='ctx'>   - Jingoo Han &lt;jingoohan1@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml<br/>index 08fe5cf8614a..3c9b4054ed9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: TI LM3630A High-Efficiency Dual-String White LED</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'>   - Daniel Thompson &lt;daniel.thompson@linaro.org&gt;</div><div class='ctx'>   - Jingoo Han &lt;jingoohan1@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml<br/>new file mode 100644<br/>index 000000000000..5533b6562d92<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/mediatek,mt6370-backlight.yaml</a></div><div class='hunk'>@@ -0,0 +1,121 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/backlight/mediatek,mt6370-backlight.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT6370 Backlight</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiaEn Wu &lt;chiaen_wu@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This module is part of the MT6370 MFD device.</div><div class='add'>+  The MT6370 Backlight WLED driver supports up to a 29V output voltage for</div><div class='add'>+  4 channels of 8 series WLEDs. Each channel supports up to 30mA of current</div><div class='add'>+  capability with 2048 current steps (11 bits, only for MT6370/MT6371) or</div><div class='add'>+  16384 current steps (14 bits, only for MT6372) in exponential or linear</div><div class='add'>+  mapping curves.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt6370-backlight</div><div class='add'>+      - mediatek,mt6372-backlight</div><div class='add'>+</div><div class='add'>+  default-brightness:</div><div class='add'>+    minimum: 0</div><div class='add'>+</div><div class='add'>+  max-brightness:</div><div class='add'>+    minimum: 0</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: External backlight 'enable' pin</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,bled-pwm-enable:</div><div class='add'>+    description: |</div><div class='add'>+      Enable external PWM input for backlight dimming</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mediatek,bled-pwm-hys-enable:</div><div class='add'>+    description: |</div><div class='add'>+      Enable the backlight input-hysteresis for PWM mode</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mediatek,bled-pwm-hys-input-th-steps:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    enum: [1, 4, 16, 64]</div><div class='add'>+    description: |</div><div class='add'>+      The selection of the upper and lower bounds threshold of backlight</div><div class='add'>+      PWM resolution. If we choose selection 64, the variation of PWM</div><div class='add'>+      resolution needs more than 64 steps.</div><div class='add'>+</div><div class='add'>+  mediatek,bled-ovp-shutdown:</div><div class='add'>+    description: |</div><div class='add'>+      Enable the backlight shutdown when OVP level triggered</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mediatek,bled-ovp-microvolt:</div><div class='add'>+    enum: [17000000, 21000000, 25000000, 29000000]</div><div class='add'>+    description: |</div><div class='add'>+      Backlight OVP level selection.</div><div class='add'>+</div><div class='add'>+  mediatek,bled-ocp-shutdown:</div><div class='add'>+    description: |</div><div class='add'>+      Enable the backlight shutdown when OCP level triggerred.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mediatek,bled-ocp-microamp:</div><div class='add'>+    enum: [900000, 1200000, 1500000, 1800000]</div><div class='add'>+    description: |</div><div class='add'>+      Backlight OC level selection.</div><div class='add'>+</div><div class='add'>+  mediatek,bled-exponential-mode-enable:</div><div class='add'>+    description: |</div><div class='add'>+      Enable the exponential mode of backlight brightness. If this property</div><div class='add'>+      is not enabled, the default is to use linear mode.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mediatek,bled-channel-use:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+      Backlight LED channel to be used.</div><div class='add'>+      Each bit mapping to:</div><div class='add'>+        - 0: CH4</div><div class='add'>+        - 1: CH3</div><div class='add'>+        - 2: CH2</div><div class='add'>+        - 3: CH1</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 15</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: mediatek,mt6372-backlight</div><div class='add'>+</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    default-brightness:</div><div class='add'>+      maximum: 16384</div><div class='add'>+</div><div class='add'>+    max-brightness:</div><div class='add'>+      maximum: 16384</div><div class='add'>+</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    default-brightness:</div><div class='add'>+      maximum: 2048</div><div class='add'>+</div><div class='add'>+    max-brightness:</div><div class='add'>+      maximum: 2048</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - mediatek,bled-channel-use</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml<br/>index fcb8429f3088..5ec47a8c6568 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/pwm-backlight.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/leds/backlight/pwm-backlight.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: pwm-backlight bindings</div><div class='add'>+title: pwm-backlight</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'>   - Daniel Thompson &lt;daniel.thompson@linaro.org&gt;</div><div class='ctx'>   - Jingoo Han &lt;jingoohan1@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml b/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml<br/>index 1c24b333c6e2..5f1849bdabba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/leds/backlight/qcom-wled.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for Qualcomm Technologies, Inc. WLED driver</div><div class='add'>+title: Qualcomm Technologies, Inc. WLED driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,pm8941-wled</div><div class='add'>+      - qcom,pmi8950-wled</div><div class='ctx'>       - qcom,pmi8994-wled</div><div class='ctx'>       - qcom,pmi8998-wled</div><div class='ctx'>       - qcom,pm660l-wled</div><div class='hunk'>@@ -26,7 +27,8 @@ properties:</div><div class='ctx'>       - qcom,pm8150l-wled</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   default-brightness:</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -81,7 +83,7 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       kHz; switching frequency.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    enum: [ 600, 640, 685, 738, 800, 872, 960, 1066, 1200, 1371, 1600, 1920, </div><div class='add'>+    enum: [ 600, 640, 685, 738, 800, 872, 960, 1066, 1200, 1371, 1600, 1920,</div><div class='ctx'>             2400, 3200, 4800, 9600 ]</div><div class='ctx'> </div><div class='ctx'>   qcom,ovp:</div><div class='hunk'>@@ -171,6 +173,9 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'>         qcom,current-boost-limit:</div><div class='ctx'>           enum: [ 105, 385, 525, 805, 980, 1260, 1400, 1680 ]</div><div class='ctx'>           default: 805</div><div class='hunk'>@@ -189,6 +194,9 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='ctx'>         qcom,current-boost-limit:</div><div class='ctx'>           enum: [ 105, 280, 450, 620, 970, 1150, 1300, 1500 ]</div><div class='ctx'>           default: 970</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml<br/>index e0ac68694b63..99e9e138fa92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml</a></div><div class='hunk'>@@ -47,6 +47,11 @@ properties:</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 3</div><div class='ctx'> </div><div class='add'>+  richtek,bled-ocp-microamp:</div><div class='add'>+    description: |</div><div class='add'>+      Backlight over current protection level.</div><div class='add'>+    enum: [900000, 1200000, 1500000, 1800000]</div><div class='add'>+</div><div class='ctx'>   richtek,channel-use:</div><div class='ctx'>     description: |</div><div class='ctx'>       Backlight LED channel to be used.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml<br/>index 328952d7acbb..11aedf1650a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/common.yaml</a></div><div class='hunk'>@@ -79,24 +79,62 @@ properties:</div><div class='ctx'>       the LED.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'> </div><div class='del'>-    enum:</div><div class='del'>-        # LED will act as a back-light, controlled by the framebuffer system</div><div class='del'>-      - backlight</div><div class='del'>-        # LED will turn on (but for leds-gpio see "default-state" property in</div><div class='del'>-        # Documentation/devicetree/bindings/leds/leds-gpio.yaml)</div><div class='del'>-      - default-on</div><div class='del'>-        # LED "double" flashes at a load average based rate</div><div class='del'>-      - heartbeat</div><div class='del'>-        # LED indicates disk activity</div><div class='del'>-      - disk-activity</div><div class='del'>-        # LED indicates IDE disk activity (deprecated), in new implementations</div><div class='del'>-        # use "disk-activity"</div><div class='del'>-      - ide-disk</div><div class='del'>-        # LED flashes at a fixed, configurable rate</div><div class='del'>-      - timer</div><div class='del'>-        # LED alters the brightness for the specified duration with one software</div><div class='del'>-        # timer (requires "led-pattern" property)</div><div class='del'>-      - pattern</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+            # LED will act as a back-light, controlled by the framebuffer system</div><div class='add'>+          - backlight</div><div class='add'>+            # LED will turn on (but for leds-gpio see "default-state" property in</div><div class='add'>+            # Documentation/devicetree/bindings/leds/leds-gpio.yaml)</div><div class='add'>+          - default-on</div><div class='add'>+            # LED "double" flashes at a load average based rate</div><div class='add'>+          - heartbeat</div><div class='add'>+            # LED indicates disk activity</div><div class='add'>+          - disk-activity</div><div class='add'>+            # LED indicates disk read activity</div><div class='add'>+          - disk-read</div><div class='add'>+            # LED indicates disk write activity</div><div class='add'>+          - disk-write</div><div class='add'>+            # LED flashes at a fixed, configurable rate</div><div class='add'>+          - timer</div><div class='add'>+            # LED alters the brightness for the specified duration with one software</div><div class='add'>+            # timer (requires "led-pattern" property)</div><div class='add'>+          - pattern</div><div class='add'>+            # LED indicates mic mute state</div><div class='add'>+          - audio-micmute</div><div class='add'>+            # LED indicates audio mute state</div><div class='add'>+          - audio-mute</div><div class='add'>+            # LED indicates bluetooth power state</div><div class='add'>+          - bluetooth-power</div><div class='add'>+            # LED indicates activity of all CPUs</div><div class='add'>+          - cpu</div><div class='add'>+            # LED indicates camera flash state</div><div class='add'>+          - flash</div><div class='add'>+            # LED indicated keyboard capslock</div><div class='add'>+          - kbd-capslock</div><div class='add'>+            # LED indicates MTD memory activity</div><div class='add'>+          - mtd</div><div class='add'>+            # LED indicates NAND memory activity (deprecated),</div><div class='add'>+            # in new implementations use "mtd"</div><div class='add'>+          - nand-disk</div><div class='add'>+            # No trigger assigned to the LED. This is the default mode</div><div class='add'>+            # if trigger is absent</div><div class='add'>+          - none</div><div class='add'>+            # LED indicates camera torch state</div><div class='add'>+          - torch</div><div class='add'>+            # LED indicates USB gadget activity</div><div class='add'>+          - usb-gadget</div><div class='add'>+            # LED indicates USB host activity</div><div class='add'>+          - usb-host</div><div class='add'>+            # LED indicates USB port state</div><div class='add'>+          - usbport</div><div class='add'>+        # LED is triggered by CPU activity</div><div class='add'>+      - pattern: "^cpu[0-9]*$"</div><div class='add'>+        # LED is triggered by Bluetooth activity</div><div class='add'>+      - pattern: "^hci[0-9]+-power$"</div><div class='add'>+        # LED is triggered by SD/MMC activity</div><div class='add'>+      - pattern: "^mmc[0-9]+$"</div><div class='add'>+        # LED is triggered by WLAN activity</div><div class='add'>+      - pattern: "^phy[0-9]+tx$"</div><div class='ctx'> </div><div class='ctx'>   led-pattern:</div><div class='ctx'>     description: |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml b/Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml<br/>index 9362b1ef9e88..34ef5215c150 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/cznic,turris-omnia-leds.yaml</a></div><div class='hunk'>@@ -33,6 +33,8 @@ patternProperties:</div><div class='ctx'>   "^multi-led@[0-9a-b]$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: leds-class-multicolor.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     description:</div><div class='ctx'>       This node represents one of the RGB LED devices on Turris Omnia.</div><div class='ctx'>       No subnodes need to be added for subchannels since this controller only</div><div class='hunk'>@@ -56,7 +58,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>     #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.txt b/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.txt<br/>deleted file mode 100644<br/>index cbe8dfd29715..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-Device tree bindings for IR LED connected through gpio pin which is used as</div><div class='del'>-remote controller transmitter.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: should be "gpio-ir-tx".</div><div class='del'>-	- gpios :  Should specify the IR LED GPIO, see "gpios property" in</div><div class='del'>-	  Documentation/devicetree/bindings/gpio/gpio.txt.  Active low LEDs</div><div class='del'>-	  should be indicated using flags in the GPIO specifier.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	irled@0 {</div><div class='del'>-		compatible = "gpio-ir-tx";</div><div class='del'>-		gpios = &lt;&amp;gpio1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml b/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml<br/>new file mode 100644<br/>index 000000000000..5839d00c7089<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/irled/gpio-ir-tx.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/irled/gpio-ir-tx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: IR LED connected through GPIO pin</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sean Young &lt;sean@mess.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  IR LED connected through GPIO pin which is used as remote controller</div><div class='add'>+  transmitter.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: gpio-ir-tx</div><div class='add'>+</div><div class='add'>+  gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    irled {</div><div class='add'>+        compatible = "gpio-ir-tx";</div><div class='add'>+        gpios = &lt;&amp;gpio1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml b/Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml<br/>new file mode 100644<br/>index 000000000000..72cadebf6e3e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/irled/ir-spi-led.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/irled/ir-spi-led.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: IR LED connected through SPI bus</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sean Young &lt;sean@mess.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  IR LED switch is connected to the MOSI line of the SPI device and the data</div><div class='add'>+  is delivered through that.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ir-spi-led</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  duty-cycle:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    enum: [50, 60, 70, 75, 80, 90]</div><div class='add'>+    description:</div><div class='add'>+      Percentage of one period in which the signal is active.</div><div class='add'>+</div><div class='add'>+  led-active-low:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Output is negated with a NOT gate.</div><div class='add'>+</div><div class='add'>+  power-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        irled@0 {</div><div class='add'>+            compatible = "ir-spi-led";</div><div class='add'>+            reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+            duty-cycle = /bits/ 8 &lt;60&gt;;</div><div class='add'>+            led-active-low;</div><div class='add'>+            power-supply = &lt;&amp;irda_regulator&gt;;</div><div class='add'>+            spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.txt b/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.txt<br/>deleted file mode 100644<br/>index 66e5672c2e3d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,13 +0,0 @@</div><div class='del'>-Device tree bindings for IR LED connected through pwm pin which is used as</div><div class='del'>-remote controller transmitter.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: should be "pwm-ir-tx".</div><div class='del'>-	- pwms : PWM property to point to the PWM device (phandle)/port (id)</div><div class='del'>-	  and to specify the period time to be used: &lt;&amp;phandle id period_ns&gt;;</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	irled {</div><div class='del'>-		compatible = "pwm-ir-tx";</div><div class='del'>-		pwms = &lt;&amp;pwm0 0 10000000&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml b/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml<br/>new file mode 100644<br/>index 000000000000..f2a6fa140f38<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/irled/pwm-ir-tx.yaml</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/irled/pwm-ir-tx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: IR LED connected through PWM pin</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sean Young &lt;sean@mess.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  IR LED connected through PWM pin which is used as remote controller</div><div class='add'>+  transmitter.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pwm-ir-tx</div><div class='add'>+</div><div class='add'>+  pwms:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - pwms</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    irled {</div><div class='add'>+        compatible = "pwm-ir-tx";</div><div class='add'>+        pwms = &lt;&amp;pwm0 0 10000000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/irled/spi-ir-led.txt b/Documentation/devicetree/bindings/leds/irled/spi-ir-led.txt<br/>deleted file mode 100644<br/>index 83ff1b4d70a6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/irled/spi-ir-led.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/irled/spi-ir-led.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-Device tree bindings for IR LED connected through SPI bus which is used as</div><div class='del'>-remote controller.</div><div class='del'>-</div><div class='del'>-The IR LED switch is connected to the MOSI line of the SPI device and the data</div><div class='del'>-are delivered thourgh that.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: should be "ir-spi-led".</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- duty-cycle: 8 bit value that represents the percentage of one period</div><div class='del'>-	  in which the signal is active.  It can be 50, 60, 70, 75, 80 or 90.</div><div class='del'>-	- led-active-low: boolean value that specifies whether the output is</div><div class='del'>-	  negated with a NOT gate.</div><div class='del'>-	- power-supply: specifies the power source. It can either be a regulator</div><div class='del'>-	  or a gpio which enables a regulator, i.e. a regulator-fixed as</div><div class='del'>-	  described in</div><div class='del'>-	  Documentation/devicetree/bindings/regulator/fixed-regulator.yaml</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	irled@0 {</div><div class='del'>-		compatible = "ir-spi-led";</div><div class='del'>-		reg = &lt;0x0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;5000000&gt;;</div><div class='del'>-		power-supply = &lt;&amp;vdd_led&gt;;</div><div class='del'>-		led-active-low;</div><div class='del'>-		duty-cycle = /bits/ 8 &lt;60&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml b/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml<br/>new file mode 100644<br/>index 000000000000..3c0431c51159<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/issi,is31fl319x.yaml</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/issi,is31fl319x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ISSI LED Controllers for IS31FL319{0,1,3,6,9}</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vincent Knecht &lt;vincent.knecht@mailoo.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The IS31FL319X are LED controllers with I2C interface.</div><div class='add'>+  Previously known as Si-En SN319{0,1,3,6,9}.</div><div class='add'>+</div><div class='add'>+  For more product information please see the links below:</div><div class='add'>+    https://lumissil.com/assets/pdf/core/IS31FL3190_DS.pdf</div><div class='add'>+    https://lumissil.com/assets/pdf/core/IS31FL3191_DS.pdf</div><div class='add'>+    https://lumissil.com/assets/pdf/core/IS31FL3193_DS.pdf</div><div class='add'>+    https://lumissil.com/assets/pdf/core/IS31FL3196_DS.pdf</div><div class='add'>+    https://lumissil.com/assets/pdf/core/IS31FL3199_DS.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - issi,is31fl3190</div><div class='add'>+      - issi,is31fl3191</div><div class='add'>+      - issi,is31fl3193</div><div class='add'>+      - issi,is31fl3196</div><div class='add'>+      - issi,is31fl3199</div><div class='add'>+      - si-en,sn3190</div><div class='add'>+      - si-en,sn3191</div><div class='add'>+      - si-en,sn3193</div><div class='add'>+      - si-en,sn3196</div><div class='add'>+      - si-en,sn3199</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  shutdown-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO attached to the SDB pin.</div><div class='add'>+</div><div class='add'>+  audio-gain-db:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0</div><div class='add'>+    description: Audio gain selection for external analog modulation input.</div><div class='add'>+    enum: [0, 3, 6, 9, 12, 15, 18, 21]</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^led@[1-9]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: Index of the LED.</div><div class='add'>+        minimum: 1</div><div class='add'>+        maximum: 9</div><div class='add'>+</div><div class='add'>+      led-max-microamp:</div><div class='add'>+        description:</div><div class='add'>+          Note that a driver will take the lowest of all LED limits</div><div class='add'>+          since the chip has a single global setting. The lowest value</div><div class='add'>+          will be chosen due to the PWM specificity, where lower</div><div class='add'>+          brightness is achieved by reducing the duty-cycle of pulses</div><div class='add'>+          and not the current, which will always have its peak value</div><div class='add'>+          equal to led-max-microamp.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - issi,is31fl3190</div><div class='add'>+              - issi,is31fl3191</div><div class='add'>+              - issi,is31fl3193</div><div class='add'>+              - si-en,sn3190</div><div class='add'>+              - si-en,sn3191</div><div class='add'>+              - si-en,sn3193</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          enum: [0x68, 0x69, 0x6a, 0x6b]</div><div class='add'>+</div><div class='add'>+        audio-gain-db: false</div><div class='add'>+</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^led@[1-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            led-max-microamp:</div><div class='add'>+              default: 42000</div><div class='add'>+              enum: [5000, 10000, 17500, 30000, 42000]</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          enum: [0x64, 0x65, 0x66, 0x67]</div><div class='add'>+</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^led@[1-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            led-max-microamp:</div><div class='add'>+              default: 20000</div><div class='add'>+              enum: [5000, 10000, 15000, 20000, 25000, 30000, 35000, 40000]</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - issi,is31fl3190</div><div class='add'>+              - issi,is31fl3191</div><div class='add'>+              - si-en,sn3190</div><div class='add'>+              - si-en,sn3191</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^led@[1-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              maximum: 1</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - issi,is31fl3193</div><div class='add'>+              - si-en,sn3193</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^led@[1-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              maximum: 3</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - issi,is31fl3196</div><div class='add'>+              - si-en,sn3196</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^led@[1-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              maximum: 6</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led-controller@65 {</div><div class='add'>+            compatible = "issi,is31fl3196";</div><div class='add'>+            reg = &lt;0x65&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            shutdown-gpios = &lt;&amp;gpio0 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            led@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                label = "red:aux";</div><div class='add'>+                led-max-microamp = &lt;10000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@5 {</div><div class='add'>+                reg = &lt;5&gt;;</div><div class='add'>+                label = "green:power";</div><div class='add'>+                linux,default-trigger = "default-on";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/kinetic,ktd2692.yaml b/Documentation/devicetree/bindings/leds/kinetic,ktd2692.yaml<br/>new file mode 100644<br/>index 000000000000..bac95a51afa1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/kinetic,ktd2692.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/kinetic,ktd2692.yaml</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/kinetic,ktd2692.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: KTD2692 Flash LED Driver from Kinetic Technologies</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Markuss Broks &lt;markuss.broks@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  KTD2692 is the ideal power solution for high-power flash LEDs.</div><div class='add'>+  It uses ExpressWire single-wire programming for maximum flexibility.</div><div class='add'>+</div><div class='add'>+  The ExpressWire interface through CTRL pin can control LED on/off and</div><div class='add'>+  enable/disable the IC, Movie(max 1/3 of Flash current) / Flash mode current,</div><div class='add'>+  Flash timeout, LVP(low voltage protection).</div><div class='add'>+</div><div class='add'>+  Also, When the AUX pin is pulled high while CTRL pin is high,</div><div class='add'>+  LED current will be ramped up to the flash-mode current level.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: kinetic,ktd2692</div><div class='add'>+</div><div class='add'>+  ctrl-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Specifier of the GPIO connected to CTRL pin.</div><div class='add'>+</div><div class='add'>+  aux-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Specifier of the GPIO connected to CTRL pin.</div><div class='add'>+</div><div class='add'>+  vin-supply:</div><div class='add'>+    description: LED supply (2.7V to 5.5V).</div><div class='add'>+</div><div class='add'>+  led:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    description: Properties for the LED.</div><div class='add'>+    properties:</div><div class='add'>+      function: true</div><div class='add'>+      color: true</div><div class='add'>+      flash-max-timeout-us:</div><div class='add'>+        description: Flash LED maximum timeout.</div><div class='add'>+</div><div class='add'>+      led-max-microamp:</div><div class='add'>+        maximum: 300000</div><div class='add'>+        description: Minimum Threshold for Timer protection</div><div class='add'>+          is defined internally (Maximum 300mA).</div><div class='add'>+</div><div class='add'>+      flash-max-microamp:</div><div class='add'>+        maximum: 300000</div><div class='add'>+        description: Flash LED maximum current</div><div class='add'>+          Formula - I(uA) = 15000000 / Rset.</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - ctrl-gpios</div><div class='add'>+  - led</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    ktd2692 {</div><div class='add'>+      compatible = "kinetic,ktd2692";</div><div class='add'>+      ctrl-gpios = &lt;&amp;gpc0 1 0&gt;;</div><div class='add'>+      aux-gpios = &lt;&amp;gpc0 2 0&gt;;</div><div class='add'>+      vin-supply = &lt;&amp;vbat&gt;;</div><div class='add'>+</div><div class='add'>+      led {</div><div class='add'>+        function = LED_FUNCTION_FLASH;</div><div class='add'>+        color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+        flash-max-timeout-us = &lt;250000&gt;;</div><div class='add'>+        flash-max-microamp = &lt;150000&gt;;</div><div class='add'>+        led-max-microamp = &lt;25000&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-aat1290.txt b/Documentation/devicetree/bindings/leds/leds-aat1290.txt<br/>deleted file mode 100644<br/>index 62ed17ec075b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-aat1290.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-aat1290.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,77 +0,0 @@</div><div class='del'>-* Skyworks Solutions, Inc. AAT1290 Current Regulator for Flash LEDs</div><div class='del'>-</div><div class='del'>-The device is controlled through two pins: FL_EN and EN_SET. The pins when,</div><div class='del'>-asserted high, enable flash strobe and movie mode (max 1/2 of flash current)</div><div class='del'>-respectively. In order to add a capability of selecting the strobe signal source</div><div class='del'>-(e.g. CPU or camera sensor) there is an additional switch required, independent</div><div class='del'>-of the flash chip. The switch is controlled with pin control.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : Must be "skyworks,aat1290".</div><div class='del'>-- flen-gpios : Must be device tree identifier of the flash device FL_EN pin.</div><div class='del'>-- enset-gpios : Must be device tree identifier of the flash device EN_SET pin.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- pinctrl-names : Must contain entries: "default", "host", "isp". Entries</div><div class='del'>-		"default" and "host" must refer to the same pin configuration</div><div class='del'>-		node, which sets the host as a strobe signal provider. Entry</div><div class='del'>-		"isp" must refer to the pin configuration node, which sets the</div><div class='del'>-		ISP as a strobe signal provider.</div><div class='del'>-</div><div class='del'>-A discrete LED element connected to the device must be represented by a child</div><div class='del'>-node - see Documentation/devicetree/bindings/leds/common.txt.</div><div class='del'>-</div><div class='del'>-Required properties of the LED child node:</div><div class='del'>-- led-max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-- flash-max-microamp : see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-                       Maximum flash LED supply current can be calculated using</div><div class='del'>-                       following formula: I = 1A * 162kohm / Rset.</div><div class='del'>-- flash-max-timeout-us : see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-                         Maximum flash timeout can be calculated using following</div><div class='del'>-                         formula: T = 8.82 * 10^9 * Ct.</div><div class='del'>-</div><div class='del'>-Optional properties of the LED child node:</div><div class='del'>-- function : see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-- color : see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-- label : see Documentation/devicetree/bindings/leds/common.txt (deprecated)</div><div class='del'>-</div><div class='del'>-Example (by Ct = 220nF, Rset = 160kohm and exynos4412-trats2 board with</div><div class='del'>-a switch that allows for routing strobe signal either from the host or from</div><div class='del'>-the camera sensor):</div><div class='del'>-</div><div class='del'>-#include "exynos4412.dtsi"</div><div class='del'>-#include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-</div><div class='del'>-led-controller {</div><div class='del'>-	compatible = "skyworks,aat1290";</div><div class='del'>-	flen-gpios = &lt;&amp;gpj1 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	enset-gpios = &lt;&amp;gpj1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default", "host", "isp";</div><div class='del'>-	pinctrl-0 = &lt;&amp;camera_flash_host&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;camera_flash_host&gt;;</div><div class='del'>-	pinctrl-2 = &lt;&amp;camera_flash_isp&gt;;</div><div class='del'>-</div><div class='del'>-	camera_flash: led {</div><div class='del'>-		function = LED_FUNCTION_FLASH;</div><div class='del'>-		color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='del'>-		led-max-microamp = &lt;520833&gt;;</div><div class='del'>-		flash-max-microamp = &lt;1012500&gt;;</div><div class='del'>-		flash-max-timeout-us = &lt;1940000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;pinctrl_0 {</div><div class='del'>-	camera_flash_host: camera-flash-host {</div><div class='del'>-		samsung,pins = "gpj1-0";</div><div class='del'>-		samsung,pin-function = &lt;1&gt;;</div><div class='del'>-		samsung,pin-val = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	camera_flash_isp: camera-flash-isp {</div><div class='del'>-		samsung,pins = "gpj1-0";</div><div class='del'>-		samsung,pin-function = &lt;1&gt;;</div><div class='del'>-		samsung,pin-val = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-aw2013.yaml b/Documentation/devicetree/bindings/leds/leds-aw2013.yaml<br/>index e24b0d15ef01..08f3e1cfc1b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-aw2013.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-aw2013.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-aw2013.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-aw2013.yaml</a></div><div class='hunk'>@@ -33,6 +33,7 @@ patternProperties:</div><div class='ctx'>   "^led@[0-2]$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -53,7 +54,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml b/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml<br/>new file mode 100644<br/>index 000000000000..52252fb6bb32<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-bcm63138.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-bcm63138.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/leds-bcm63138.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom's BCM63138 LEDs controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This LEDs controller was first used on BCM63138 and later reused on BCM4908,</div><div class='add'>+  BCM6848, BCM6858, BCM63138, BCM63148, BCM63381 and BCM68360 SoCs.</div><div class='add'>+</div><div class='add'>+  It supports up to 32 LEDs that can be connected parallelly or serially. It</div><div class='add'>+  also includes limited support for hardware blinking.</div><div class='add'>+</div><div class='add'>+  Binding serially connected LEDs isn't documented yet.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm4908-leds</div><div class='add'>+              - brcm,bcm6848-leds</div><div class='add'>+              - brcm,bcm6858-leds</div><div class='add'>+              - brcm,bcm63148-leds</div><div class='add'>+              - brcm,bcm63381-leds</div><div class='add'>+              - brcm,bcm68360-leds</div><div class='add'>+          - const: brcm,bcm63138-leds</div><div class='add'>+      - const: brcm,bcm63138-leds</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^led@[a-f0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description: LED pin number</div><div class='add'>+</div><div class='add'>+      active-low:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Makes LED active low</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    leds@ff800800 {</div><div class='add'>+        compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";</div><div class='add'>+        reg = &lt;0xff800800 0xdc&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led@0 {</div><div class='add'>+            reg = &lt;0x0&gt;;</div><div class='add'>+            function = LED_FUNCTION_POWER;</div><div class='add'>+            color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+            default-state = "on";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        led@3 {</div><div class='add'>+            reg = &lt;0x3&gt;;</div><div class='add'>+            function = LED_FUNCTION_STATUS;</div><div class='add'>+            color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+            active-low;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml<br/>index 37445c68cdef..31840e33dcf5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Common properties for the multicolor LED class.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Bindings for multi color LEDs show how to describe current outputs of</div><div class='hunk'>@@ -19,22 +19,22 @@ description: |</div><div class='ctx'>   LED class.  Common LED nodes and properties are inherited from the common.yaml</div><div class='ctx'>   within this documentation directory.</div><div class='ctx'> </div><div class='del'>-patternProperties:</div><div class='del'>-  "^multi-led@([0-9a-f])$":</div><div class='del'>-    type: object</div><div class='del'>-    description: Represents the LEDs that are to be grouped.</div><div class='del'>-    properties:</div><div class='del'>-      color:</div><div class='del'>-        description: |</div><div class='del'>-          For multicolor LED support this property should be defined as either</div><div class='del'>-          LED_COLOR_ID_RGB or LED_COLOR_ID_MULTI which can be found in</div><div class='del'>-          include/linux/leds/common.h.</div><div class='del'>-        enum: [ 8, 9 ]</div><div class='del'>-</div><div class='del'>-    $ref: "common.yaml#"</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - color</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^multi-led(@[0-9a-f])?$"</div><div class='add'>+</div><div class='add'>+  color:</div><div class='add'>+    description: |</div><div class='add'>+      For multicolor LED support this property should be defined as either</div><div class='add'>+      LED_COLOR_ID_RGB or LED_COLOR_ID_MULTI which can be found in</div><div class='add'>+      include/linux/leds/common.h.</div><div class='add'>+    enum: [ 8, 9 ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - color</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: "common.yaml#"</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-gpio.yaml b/Documentation/devicetree/bindings/leds/leds-gpio.yaml<br/>index 7ad2baeda0b0..7e11703acbd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-gpio.yaml</a></div><div class='hunk'>@@ -23,8 +23,8 @@ patternProperties:</div><div class='ctx'>   # node name to at least catch some child nodes.</div><div class='ctx'>   "(^led-[0-9a-f]$|led)":</div><div class='ctx'>     type: object</div><div class='del'>-</div><div class='ctx'>     $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       gpios:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt b/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt<br/>deleted file mode 100644<br/>index 676d43ec8169..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-is31fl319x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,61 +0,0 @@</div><div class='del'>-LEDs connected to is31fl319x LED controller chip</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be any of</div><div class='del'>-	"issi,is31fl3190"</div><div class='del'>-	"issi,is31fl3191"</div><div class='del'>-	"issi,is31fl3193"</div><div class='del'>-	"issi,is31fl3196"</div><div class='del'>-	"issi,is31fl3199"</div><div class='del'>-	"si-en,sn3199".</div><div class='del'>-- #address-cells: Must be 1.</div><div class='del'>-- #size-cells: Must be 0.</div><div class='del'>-- reg: 0x64, 0x65, 0x66, or 0x67.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- audio-gain-db : audio gain selection for external analog modulation input.</div><div class='del'>-	Valid values: 0 - 21, step by 3 (rounded down)</div><div class='del'>-	Default: 0</div><div class='del'>-- shutdown-gpios : Specifier of the GPIO connected to SDB pin of the chip.</div><div class='del'>-</div><div class='del'>-Each led is represented as a sub-node of the issi,is31fl319x device.</div><div class='del'>-There can be less leds subnodes than the chip can support but not more.</div><div class='del'>-</div><div class='del'>-Required led sub-node properties:</div><div class='del'>-- reg : number of LED line</div><div class='del'>-	Valid values: 1 - number of leds supported by the chip variant.</div><div class='del'>-</div><div class='del'>-Optional led sub-node properties:</div><div class='del'>-- label : see Documentation/devicetree/bindings/leds/common.txt.</div><div class='del'>-- linux,default-trigger :</div><div class='del'>-	see Documentation/devicetree/bindings/leds/common.txt.</div><div class='del'>-- led-max-microamp : (optional)</div><div class='del'>-	Valid values: 5000 - 40000, step by 5000 (rounded down)</div><div class='del'>-	Default: 20000 (20 mA)</div><div class='del'>-	Note: a driver will take the lowest of all led limits since the</div><div class='del'>-	chip has a single global setting. The lowest value will be chosen</div><div class='del'>-	due to the PWM specificity, where lower brightness is achieved</div><div class='del'>-	by reducing the dury-cycle of pulses and not the current, which</div><div class='del'>-	will always have its peak value equal to led-max-microamp.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-fancy_leds: leds@65 {</div><div class='del'>-	compatible = "issi,is31fl3196";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	reg = &lt;0x65&gt;;</div><div class='del'>-	shutdown-gpios = &lt;&amp;gpio0 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-	red_aux: led@1 {</div><div class='del'>-		label = "red:aux";</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		led-max-microamp = &lt;10000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	green_power: led@5 {</div><div class='del'>-		label = "green:power";</div><div class='del'>-		reg = &lt;5&gt;;</div><div class='del'>-		linux,default-trigger = "default-on";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-ktd2692.txt b/Documentation/devicetree/bindings/leds/leds-ktd2692.txt<br/>deleted file mode 100644<br/>index 853737452580..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-ktd2692.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-ktd2692.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,50 +0,0 @@</div><div class='del'>-* Kinetic Technologies - KTD2692 Flash LED Driver</div><div class='del'>-</div><div class='del'>-KTD2692 is the ideal power solution for high-power flash LEDs.</div><div class='del'>-It uses ExpressWire single-wire programming for maximum flexibility.</div><div class='del'>-</div><div class='del'>-The ExpressWire interface through CTRL pin can control LED on/off and</div><div class='del'>-enable/disable the IC, Movie(max 1/3 of Flash current) / Flash mode current,</div><div class='del'>-Flash timeout, LVP(low voltage protection).</div><div class='del'>-</div><div class='del'>-Also, When the AUX pin is pulled high while CTRL pin is high,</div><div class='del'>-LED current will be ramped up to the flash-mode current level.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "kinetic,ktd2692".</div><div class='del'>-- ctrl-gpios : Specifier of the GPIO connected to CTRL pin.</div><div class='del'>-- aux-gpios : Specifier of the GPIO connected to AUX pin.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- vin-supply : "vin" LED supply (2.7V to 5.5V).</div><div class='del'>-  See Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='del'>-</div><div class='del'>-A discrete LED element connected to the device must be represented by a child</div><div class='del'>-node - See Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-</div><div class='del'>-Required properties for flash LED child nodes:</div><div class='del'>-  See Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-- led-max-microamp : Minimum Threshold for Timer protection</div><div class='del'>-  is defined internally (Maximum 300mA).</div><div class='del'>-- flash-max-microamp : Flash LED maximum current</div><div class='del'>-  Formula : I(mA) = 15000 / Rset.</div><div class='del'>-- flash-max-timeout-us : Flash LED maximum timeout.</div><div class='del'>-</div><div class='del'>-Optional properties for flash LED child nodes:</div><div class='del'>-- label : See Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-ktd2692 {</div><div class='del'>-	compatible = "kinetic,ktd2692";</div><div class='del'>-	ctrl-gpios = &lt;&amp;gpc0 1 0&gt;;</div><div class='del'>-	aux-gpios = &lt;&amp;gpc0 2 0&gt;;</div><div class='del'>-	vin-supply = &lt;&amp;vbat&gt;;</div><div class='del'>-</div><div class='del'>-	flash-led {</div><div class='del'>-		label = "ktd2692-flash";</div><div class='del'>-		led-max-microamp = &lt;300000&gt;;</div><div class='del'>-		flash-max-microamp = &lt;1500000&gt;;</div><div class='del'>-		flash-max-timeout-us = &lt;1835000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-lgm.yaml b/Documentation/devicetree/bindings/leds/leds-lgm.yaml<br/>index f8d7963c3a13..8b3b3bf1eaf2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-lgm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-lgm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-lgm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-lgm.yaml</a></div><div class='hunk'>@@ -56,7 +56,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^led@[0-2]$":</div><div class='del'>-        type: object</div><div class='add'>+        $ref: common.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           reg:</div><div class='hunk'>@@ -64,6 +65,9 @@ properties:</div><div class='ctx'>             minimum: 0</div><div class='ctx'>             maximum: 2</div><div class='ctx'> </div><div class='add'>+          led-gpios:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='ctx'>           intel,sso-hw-trigger:</div><div class='ctx'>             type: boolean</div><div class='ctx'>             description: This property indicates Hardware driven/control LED.</div><div class='hunk'>@@ -118,14 +122,14 @@ examples:</div><div class='ctx'>           reg = &lt;0&gt;;</div><div class='ctx'>           function = "gphy";</div><div class='ctx'>           color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-          led-gpio = &lt;&amp;ssogpio 0 0&gt;;</div><div class='add'>+          led-gpios = &lt;&amp;ssogpio 0 0&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         led@2 {</div><div class='ctx'>           reg = &lt;2&gt;;</div><div class='ctx'>           function = LED_FUNCTION_POWER;</div><div class='ctx'>           color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-          led-gpio = &lt;&amp;ssogpio 23 0&gt;;</div><div class='add'>+          led-gpios = &lt;&amp;ssogpio 23 0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml<br/>index f12fe5b53f30..402c25424525 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-lp50xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-lp50xx.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: LED driver for LP50XX RGB LED from Texas Instruments.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into</div><div class='hunk'>@@ -56,6 +56,8 @@ patternProperties:</div><div class='ctx'>   '^multi-led@[0-9a-f]$':</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: leds-class-multicolor.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         minItems: 1</div><div class='hunk'>@@ -65,10 +67,24 @@ patternProperties:</div><div class='ctx'>           for the child node.  The LED modules can either be used stand alone</div><div class='ctx'>           or grouped into a module bank.</div><div class='ctx'> </div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='ctx'>     patternProperties:</div><div class='del'>-      "(^led-[0-9a-f]$|led)":</div><div class='add'>+      "^led@[0-9a-f]+$":</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: common.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -78,60 +94,66 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-   #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-   #include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-</div><div class='del'>-   i2c {</div><div class='del'>-       #address-cells = &lt;1&gt;;</div><div class='del'>-       #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-       led-controller@14 {</div><div class='del'>-           compatible = "ti,lp5009";</div><div class='del'>-           reg = &lt;0x14&gt;;</div><div class='del'>-           #address-cells = &lt;1&gt;;</div><div class='del'>-           #size-cells = &lt;0&gt;;</div><div class='del'>-           enable-gpios = &lt;&amp;gpio1 16&gt;;</div><div class='del'>-</div><div class='del'>-           multi-led@1 {</div><div class='del'>-               #address-cells = &lt;1&gt;;</div><div class='del'>-               #size-cells = &lt;0&gt;;</div><div class='del'>-               reg = &lt;0x1&gt;;</div><div class='del'>-               color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='del'>-               function = LED_FUNCTION_CHARGING;</div><div class='del'>-</div><div class='del'>-               led-0 {</div><div class='del'>-                   color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-               };</div><div class='del'>-</div><div class='del'>-               led-1 {</div><div class='del'>-                   color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-               };</div><div class='del'>-</div><div class='del'>-               led-2 {</div><div class='del'>-                   color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-               };</div><div class='del'>-          };</div><div class='del'>-</div><div class='del'>-          multi-led@2 {</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;2&gt;;</div><div class='del'>-            reg = &lt;0x2 0x3 0x5&gt;;</div><div class='del'>-            color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='del'>-            function = LED_FUNCTION_STANDBY;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='del'>-            led-6 {</div><div class='del'>-              color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-            };</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-            led-7 {</div><div class='del'>-              color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+        led-controller@14 {</div><div class='add'>+            compatible = "ti,lp5009";</div><div class='add'>+            reg = &lt;0x14&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;gpio1 16&gt;;</div><div class='add'>+</div><div class='add'>+            multi-led@1 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0x1&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+                function = LED_FUNCTION_CHARGING;</div><div class='add'>+</div><div class='add'>+                led@0 {</div><div class='add'>+                     reg = &lt;0x0&gt;;</div><div class='add'>+                     color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                led@1 {</div><div class='add'>+                     reg = &lt;0x1&gt;;</div><div class='add'>+                     color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                led@2 {</div><div class='add'>+                     reg = &lt;0x2&gt;;</div><div class='add'>+                     color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='del'>-            led-8 {</div><div class='del'>-              color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+            multi-led@3 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0x3&gt;, &lt;0x4&gt;, &lt;0x5&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+                function = LED_FUNCTION_STANDBY;</div><div class='add'>+</div><div class='add'>+                led@3 {</div><div class='add'>+                    reg = &lt;0x3&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                led@4 {</div><div class='add'>+                    reg = &lt;0x4&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                led@5 {</div><div class='add'>+                    reg = &lt;0x5&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='del'>-         };</div><div class='del'>-       };</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml<br/>index f552cd143d5b..ae607911f1db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-lp55xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-lp55xx.yaml</a></div><div class='hunk'>@@ -43,11 +43,13 @@ properties:</div><div class='ctx'>       - 1 # internal</div><div class='ctx'>       - 2 # external</div><div class='ctx'> </div><div class='del'>-  enable-gpio:</div><div class='add'>+  enable-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: |</div><div class='ctx'>       GPIO attached to the chip's enable pin</div><div class='ctx'> </div><div class='add'>+  label: true</div><div class='add'>+</div><div class='ctx'>   pwr-sel:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -65,9 +67,50 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "(^led@[0-9a-f]$|led)":</div><div class='add'>+  '^multi-led@[0-8]$':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: leds-class-multicolor.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maximum: 8</div><div class='add'>+</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^led@[0-8]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: common.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          led-cur:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+            description: |</div><div class='add'>+              Current setting at each LED channel (mA x10, 0 if LED is not connected)</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 255</div><div class='add'>+</div><div class='add'>+          max-cur:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+            description: Maximun current at each LED channel.</div><div class='add'>+</div><div class='add'>+          reg:</div><div class='add'>+            maximum: 8</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+</div><div class='add'>+  "^led@[0-8]$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       led-cur:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint8</div><div class='hunk'>@@ -108,119 +151,119 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-   #include &lt;dt-bindings/leds/common.h&gt;</div><div class='del'>-</div><div class='del'>-   i2c {</div><div class='del'>-       #address-cells = &lt;1&gt;;</div><div class='del'>-       #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-       led-controller@32 {</div><div class='del'>-           #address-cells = &lt;1&gt;;</div><div class='del'>-           #size-cells = &lt;0&gt;;</div><div class='del'>-           compatible = "ti,lp8501";</div><div class='del'>-           reg = &lt;0x32&gt;;</div><div class='del'>-           clock-mode = /bits/ 8 &lt;2&gt;;</div><div class='del'>-           pwr-sel = /bits/ 8 &lt;3&gt;;	/* D1~9 connected to VOUT */</div><div class='del'>-</div><div class='del'>-           led@0 {</div><div class='del'>-               reg = &lt;0&gt;;</div><div class='del'>-               chan-name = "d1";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@1 {</div><div class='del'>-               reg = &lt;1&gt;;</div><div class='del'>-               chan-name = "d2";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@2 {</div><div class='del'>-               reg = &lt;2&gt;;</div><div class='del'>-               chan-name = "d3";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@3 {</div><div class='del'>-               reg = &lt;3&gt;;</div><div class='del'>-               chan-name = "d4";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@4 {</div><div class='del'>-               reg = &lt;4&gt;;</div><div class='del'>-               chan-name = "d5";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@5 {</div><div class='del'>-               reg = &lt;5&gt;;</div><div class='del'>-               chan-name = "d6";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@6 {</div><div class='del'>-               reg = &lt;6&gt;;</div><div class='del'>-               chan-name = "d7";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@7 {</div><div class='del'>-               reg = &lt;7&gt;;</div><div class='del'>-               chan-name = "d8";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='del'>-</div><div class='del'>-           led@8 {</div><div class='del'>-               reg = &lt;8&gt;;</div><div class='del'>-               chan-name = "d9";</div><div class='del'>-               led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='del'>-               max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='del'>-           };</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led-controller@32 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "ti,lp8501";</div><div class='add'>+            reg = &lt;0x32&gt;;</div><div class='add'>+            clock-mode = /bits/ 8 &lt;2&gt;;</div><div class='add'>+            pwr-sel = /bits/ 8 &lt;3&gt;;	/* D1~9 connected to VOUT */</div><div class='add'>+</div><div class='add'>+            led@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                chan-name = "d1";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                chan-name = "d2";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                chan-name = "d3";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@3 {</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                chan-name = "d4";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@4 {</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+                chan-name = "d5";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@5 {</div><div class='add'>+                reg = &lt;5&gt;;</div><div class='add'>+                chan-name = "d6";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@6 {</div><div class='add'>+                reg = &lt;6&gt;;</div><div class='add'>+                chan-name = "d7";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@7 {</div><div class='add'>+                reg = &lt;7&gt;;</div><div class='add'>+                chan-name = "d8";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@8 {</div><div class='add'>+                reg = &lt;8&gt;;</div><div class='add'>+                chan-name = "d9";</div><div class='add'>+                led-cur = /bits/ 8 &lt;0x14&gt;;</div><div class='add'>+                max-cur = /bits/ 8 &lt;0x20&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-       led-controller@33 {</div><div class='del'>-           #address-cells = &lt;1&gt;;</div><div class='del'>-           #size-cells = &lt;0&gt;;</div><div class='del'>-           compatible = "national,lp5523";</div><div class='del'>-           reg = &lt;0x33&gt;;</div><div class='del'>-           clock-mode = /bits/ 8 &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-           multi-led@2 {</div><div class='del'>-               #address-cells = &lt;1&gt;;</div><div class='del'>-               #size-cells = &lt;0&gt;;</div><div class='del'>-               reg = &lt;0x2&gt;;</div><div class='del'>-               color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='del'>-               function = LED_FUNCTION_STANDBY;</div><div class='del'>-               linux,default-trigger = "heartbeat";</div><div class='del'>-</div><div class='del'>-               led@0 {</div><div class='del'>-                   led-cur = /bits/ 8 &lt;50&gt;;</div><div class='del'>-                   max-cur = /bits/ 8 &lt;100&gt;;</div><div class='del'>-                   reg = &lt;0x0&gt;;</div><div class='del'>-                   color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='del'>-               };</div><div class='del'>-</div><div class='del'>-               led@1 {</div><div class='del'>-                   led-cur = /bits/ 8 &lt;50&gt;;</div><div class='del'>-                   max-cur = /bits/ 8 &lt;100&gt;;</div><div class='del'>-                   reg = &lt;0x1&gt;;</div><div class='del'>-                   color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='del'>-               };</div><div class='del'>-</div><div class='del'>-               led@6 {</div><div class='del'>-                   led-cur = /bits/ 8 &lt;50&gt;;</div><div class='del'>-                   max-cur = /bits/ 8 &lt;100&gt;;</div><div class='del'>-                   reg = &lt;0x6&gt;;</div><div class='del'>-                   color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='del'>-               };</div><div class='add'>+        led-controller@33 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "national,lp5523";</div><div class='add'>+            reg = &lt;0x33&gt;;</div><div class='add'>+            clock-mode = /bits/ 8 &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            multi-led@2 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0x2&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+                function = LED_FUNCTION_STANDBY;</div><div class='add'>+                linux,default-trigger = "heartbeat";</div><div class='add'>+</div><div class='add'>+                led@0 {</div><div class='add'>+                    led-cur = /bits/ 8 &lt;50&gt;;</div><div class='add'>+                    max-cur = /bits/ 8 &lt;100&gt;;</div><div class='add'>+                    reg = &lt;0x0&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                led@1 {</div><div class='add'>+                    led-cur = /bits/ 8 &lt;50&gt;;</div><div class='add'>+                    max-cur = /bits/ 8 &lt;100&gt;;</div><div class='add'>+                    reg = &lt;0x1&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                led@6 {</div><div class='add'>+                    led-cur = /bits/ 8 &lt;50&gt;;</div><div class='add'>+                    max-cur = /bits/ 8 &lt;100&gt;;</div><div class='add'>+                    reg = &lt;0x6&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-max77650.yaml b/Documentation/devicetree/bindings/leds/leds-max77650.yaml<br/>index c6f96cabd4d1..fdb08f44a45d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-max77650.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-max77650.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-max77650.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-max77650.yaml</a></div><div class='hunk'>@@ -30,9 +30,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^led@[0-2]$":</div><div class='del'>-    type: object</div><div class='del'>-    description: |</div><div class='del'>-      Properties for a single LED.</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -41,10 +40,6 @@ patternProperties:</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 2</div><div class='ctx'> </div><div class='del'>-      label: true</div><div class='del'>-</div><div class='del'>-      linux,default-trigger: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - "#address-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-mt6323.txt b/Documentation/devicetree/bindings/leds/leds-mt6323.txt<br/>index 45bf9f7d85f3..73353692efa1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-mt6323.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-mt6323.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-mt6323.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-mt6323.txt</a></div><div class='hunk'>@@ -9,7 +9,7 @@ MT6323 PMIC hardware.</div><div class='ctx'> For MT6323 MFD bindings see:</div><div class='ctx'> Documentation/devicetree/bindings/mfd/mt6397.txt</div><div class='ctx'> For MediaTek PMIC wrapper bindings see:</div><div class='del'>-Documentation/devicetree/bindings/soc/mediatek/pwrap.txt</div><div class='add'>+Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible : Must be "mediatek,mt6323-led"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-mt6360.yaml b/Documentation/devicetree/bindings/leds/leds-mt6360.yaml<br/>index b2fe6eb89389..d84e28e616d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-mt6360.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-mt6360.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-mt6360.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-mt6360.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This module is part of the MT6360 MFD device.</div><div class='del'>-  see Documentation/devicetree/bindings/mfd/mt6360.yaml</div><div class='add'>+  see Documentation/devicetree/bindings/mfd/mediatek,mt6360.yaml</div><div class='ctx'>   Add MT6360 LED driver include 2-channel Flash LED with torch/strobe mode,</div><div class='ctx'>   and 4-channel RGB LED support Register/Flash/Breath Mode</div><div class='ctx'> </div><div class='hunk'>@@ -26,11 +26,10 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "^(multi-)?led@[0-5]$":</div><div class='add'>+  "^multi-led@[0-5]$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: common.yaml#</div><div class='del'>-    description:</div><div class='del'>-      Properties for a single LED.</div><div class='add'>+    $ref: leds-class-multicolor.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -43,7 +42,41 @@ patternProperties:</div><div class='ctx'>           - 4 # LED output FLASH1</div><div class='ctx'>           - 5 # LED output FLASH2</div><div class='ctx'> </div><div class='del'>-unevaluatedProperties: false</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^led@[0-2]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: common.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            enum: [0, 1, 2]</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+          - color</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#size-cells"</div><div class='add'>+</div><div class='add'>+  "^led@[0-5]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for a single LED.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        enum: [0, 1, 2, 3, 4, 5]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-pca9532.txt b/Documentation/devicetree/bindings/leds/leds-pca9532.txt<br/>deleted file mode 100644<br/>index f769c52e3643..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-pca9532.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-pca9532.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-*NXP - pca9532 PWM LED Driver</div><div class='del'>-</div><div class='del'>-The PCA9532 family is SMBus I/O expander optimized for dimming LEDs.</div><div class='del'>-The PWM support 256 steps.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible:</div><div class='del'>-		"nxp,pca9530"</div><div class='del'>-		"nxp,pca9531"</div><div class='del'>-		"nxp,pca9532"</div><div class='del'>-		"nxp,pca9533"</div><div class='del'>-	- reg -  I2C slave address</div><div class='del'>-</div><div class='del'>-Each led is represented as a sub-node of the nxp,pca9530.</div><div class='del'>-</div><div class='del'>-Optional sub-node properties:</div><div class='del'>-	- label: see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-	- type: Output configuration, see dt-bindings/leds/leds-pca9532.h (default NONE)</div><div class='del'>-	- linux,default-trigger: see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-	- default-state: see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-	  This property is only valid for sub-nodes of type &lt;PCA9532_TYPE_LED&gt;.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-  #include &lt;dt-bindings/leds/leds-pca9532.h&gt;</div><div class='del'>-</div><div class='del'>-  leds: pca9530@60 {</div><div class='del'>-    compatible = "nxp,pca9530";</div><div class='del'>-    reg = &lt;0x60&gt;;</div><div class='del'>-</div><div class='del'>-    red-power {</div><div class='del'>-      label = "pca:red:power";</div><div class='del'>-      type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='del'>-    };</div><div class='del'>-    green-power {</div><div class='del'>-      label = "pca:green:power";</div><div class='del'>-      type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='del'>-    };</div><div class='del'>-    kernel-booting {</div><div class='del'>-      type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='del'>-      default-state = "on";</div><div class='del'>-    };</div><div class='del'>-    sys-stat {</div><div class='del'>-      type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='del'>-      default-state = "keep"; // don't touch, was set by U-Boot</div><div class='del'>-    };</div><div class='del'>-  };</div><div class='del'>-</div><div class='del'>-For more product information please see the link below:</div><div class='del'>-http://nxp.com/documents/data_sheet/PCA9532.pdf</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-pm8058.txt b/Documentation/devicetree/bindings/leds/leds-pm8058.txt<br/>deleted file mode 100644<br/>index 89584c49aab2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-pm8058.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-pm8058.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,67 +0,0 @@</div><div class='del'>-Qualcomm PM8058 LED driver</div><div class='del'>-</div><div class='del'>-The Qualcomm PM8058 is a multi-functional device which contains</div><div class='del'>-an LED driver block for up to six LEDs: three normal LEDs, two</div><div class='del'>-"flash" LEDs and one "keypad backlight" LED. The names are</div><div class='del'>-quoted because sometimes these LED drivers are used for wildly</div><div class='del'>-different things than flash or keypad backlight: their names</div><div class='del'>-are more of a suggestion than a hard-wired usecase.</div><div class='del'>-</div><div class='del'>-Hardware-wise the different LEDs support slightly different</div><div class='del'>-output currents. The "flash" LEDs do not need to charge nor</div><div class='del'>-do they support external triggers. They are just powerful LED</div><div class='del'>-drivers.</div><div class='del'>-</div><div class='del'>-The LEDs appear as children to the PM8058 device, with the</div><div class='del'>-proper compatible string. For the PM8058 bindings see:</div><div class='del'>-mfd/qcom-pm8xxx.txt.</div><div class='del'>-</div><div class='del'>-Each LED is represented as a sub-node of the syscon device. Each</div><div class='del'>-node's name represents the name of the corresponding LED.</div><div class='del'>-</div><div class='del'>-LED sub-node properties:</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: one of</div><div class='del'>-  "qcom,pm8058-led" (for the normal LEDs at 0x131, 0x132 and 0x133)</div><div class='del'>-  "qcom,pm8058-keypad-led" (for the "keypad" LED at 0x48)</div><div class='del'>-  "qcom,pm8058-flash-led" (for the "flash" LEDs at 0x49 and 0xFB)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- label: see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-- default-state: see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-- linux,default-trigger: see Documentation/devicetree/bindings/leds/common.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-qcom,ssbi@500000 {</div><div class='del'>-	pmicintc: pmic@0 {</div><div class='del'>-		compatible = "qcom,pm8058";</div><div class='del'>-		led@48 {</div><div class='del'>-			compatible = "qcom,pm8058-keypad-led";</div><div class='del'>-			reg = &lt;0x48&gt;;</div><div class='del'>-			label = "pm8050:white:keypad";</div><div class='del'>-			default-state = "off";</div><div class='del'>-		};</div><div class='del'>-		led@131 {</div><div class='del'>-			compatible = "qcom,pm8058-led";</div><div class='del'>-			reg = &lt;0x131&gt;;</div><div class='del'>-			label = "pm8058:red";</div><div class='del'>-			default-state = "off";</div><div class='del'>-		};</div><div class='del'>-		led@132 {</div><div class='del'>-			compatible = "qcom,pm8058-led";</div><div class='del'>-			reg = &lt;0x132&gt;;</div><div class='del'>-			label = "pm8058:yellow";</div><div class='del'>-			default-state = "off";</div><div class='del'>-			linux,default-trigger = "mmc0";</div><div class='del'>-		};</div><div class='del'>-		led@133 {</div><div class='del'>-			compatible = "qcom,pm8058-led";</div><div class='del'>-			reg = &lt;0x133&gt;;</div><div class='del'>-			label = "pm8058:green";</div><div class='del'>-			default-state = "on";</div><div class='del'>-			linux,default-trigger = "heartbeat";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-pwm-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-pwm-multicolor.yaml<br/>new file mode 100644<br/>index 000000000000..bd6ec04a8727<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-pwm-multicolor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-pwm-multicolor.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/leds-pwm-multicolor.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Multi-color LEDs connected to PWM</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sven Schwermer &lt;sven.schwermer@disruptive-technologies.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This driver combines several monochrome PWM LEDs into one multi-color</div><div class='add'>+  LED using the multicolor LED class.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pwm-leds-multicolor</div><div class='add'>+</div><div class='add'>+  multi-led:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: leds-class-multicolor.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      max-brightness:</div><div class='add'>+        description:</div><div class='add'>+          Maximum brightness possible for the LED</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^led-[0-9a-z]+$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: common.yaml#</div><div class='add'>+</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pwms:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+          pwm-names: true</div><div class='add'>+</div><div class='add'>+          active-low:</div><div class='add'>+            description: For PWMs where the LED is wired to supply rather than ground.</div><div class='add'>+            type: boolean</div><div class='add'>+</div><div class='add'>+          color: true</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - pwms</div><div class='add'>+          - color</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    led-controller {</div><div class='add'>+        compatible = "pwm-leds-multicolor";</div><div class='add'>+</div><div class='add'>+        multi-led {</div><div class='add'>+            color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+            function = LED_FUNCTION_INDICATOR;</div><div class='add'>+            max-brightness = &lt;65535&gt;;</div><div class='add'>+</div><div class='add'>+            led-red {</div><div class='add'>+                pwms = &lt;&amp;pwm1 0 1000000&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led-green {</div><div class='add'>+                pwms = &lt;&amp;pwm2 0 1000000&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led-blue {</div><div class='add'>+                pwms = &lt;&amp;pwm3 0 1000000&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-pwm.yaml b/Documentation/devicetree/bindings/leds/leds-pwm.yaml<br/>index fe4d5fd25913..7de6da58be3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-pwm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-pwm.yaml</a></div><div class='hunk'>@@ -20,8 +20,8 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^led(-[0-9a-f]+)?$":</div><div class='ctx'>     type: object</div><div class='del'>-</div><div class='ctx'>     $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pwms:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml b/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml<br/>new file mode 100644<br/>index 000000000000..6295c91f43e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml</a></div><div class='hunk'>@@ -0,0 +1,188 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/leds-qcom-lpg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Light Pulse Generator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  The Qualcomm Light Pulse Generator consists of three different hardware blocks;</div><div class='add'>+  a ramp generator with lookup table, the light pulse generator and a three</div><div class='add'>+  channel current sink. These blocks are found in a wide range of Qualcomm PMICs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,pm660l-lpg</div><div class='add'>+      - qcom,pm8150b-lpg</div><div class='add'>+      - qcom,pm8150l-lpg</div><div class='add'>+      - qcom,pm8350c-pwm</div><div class='add'>+      - qcom,pm8916-pwm</div><div class='add'>+      - qcom,pm8941-lpg</div><div class='add'>+      - qcom,pm8994-lpg</div><div class='add'>+      - qcom,pmc8180c-lpg</div><div class='add'>+      - qcom,pmi8994-lpg</div><div class='add'>+      - qcom,pmi8998-lpg</div><div class='add'>+      - qcom,pmk8550-pwm</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  qcom,power-source:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      power-source used to drive the output, as defined in the datasheet.</div><div class='add'>+      Should be specified if the TRILED block is present</div><div class='add'>+    enum: [0, 1, 3]</div><div class='add'>+</div><div class='add'>+  qcom,dtest:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    description: &gt;</div><div class='add'>+      A list of integer pairs, where each pair represent the dtest line the</div><div class='add'>+      particular channel should be connected to and the flags denoting how the</div><div class='add'>+      value should be outputed, as defined in the datasheet. The number of</div><div class='add'>+      pairs should be the same as the number of channels.</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: dtest line to attach</div><div class='add'>+        - description: flags for the attachment</div><div class='add'>+</div><div class='add'>+  multi-led:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: leds-class-multicolor.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^led@[0-9a-f]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: common.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^led@[0-9a-f]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    led-controller {</div><div class='add'>+      compatible = "qcom,pmi8994-lpg";</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      qcom,power-source = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+      qcom,dtest = &lt;0 0&gt;,</div><div class='add'>+                   &lt;0 0&gt;,</div><div class='add'>+                   &lt;0 0&gt;,</div><div class='add'>+                   &lt;4 1&gt;;</div><div class='add'>+</div><div class='add'>+      led@1 {</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+        color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+        function = LED_FUNCTION_INDICATOR;</div><div class='add'>+        function-enumerator = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      led@2 {</div><div class='add'>+        reg = &lt;2&gt;;</div><div class='add'>+        color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+        function = LED_FUNCTION_INDICATOR;</div><div class='add'>+        function-enumerator = &lt;0&gt;;</div><div class='add'>+        default-state = "on";</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      led@3 {</div><div class='add'>+        reg = &lt;3&gt;;</div><div class='add'>+        color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+        function = LED_FUNCTION_INDICATOR;</div><div class='add'>+        function-enumerator = &lt;2&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      led@4 {</div><div class='add'>+        reg = &lt;4&gt;;</div><div class='add'>+        color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+        function = LED_FUNCTION_INDICATOR;</div><div class='add'>+        function-enumerator = &lt;3&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    led-controller {</div><div class='add'>+      compatible = "qcom,pmi8994-lpg";</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      qcom,power-source = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+      multi-led {</div><div class='add'>+        color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+        function = LED_FUNCTION_STATUS;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led@1 {</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+          color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        led@2 {</div><div class='add'>+          reg = &lt;2&gt;;</div><div class='add'>+          color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        led@3 {</div><div class='add'>+          reg = &lt;3&gt;;</div><div class='add'>+          color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    pwm-controller {</div><div class='add'>+      compatible = "qcom,pm8916-pwm";</div><div class='add'>+      #pwm-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-rt4505.yaml b/Documentation/devicetree/bindings/leds/leds-rt4505.yaml<br/>index 5b0c74aa6723..bfd0e240f7d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-rt4505.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-rt4505.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-rt4505.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-rt4505.yaml</a></div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>   led:</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -38,7 +39,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/leds-sgm3140.yaml b/Documentation/devicetree/bindings/leds/leds-sgm3140.yaml<br/>index f68259619488..4d2ffe5fcfc7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-sgm3140.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/leds-sgm3140.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/leds-sgm3140.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/leds-sgm3140.yaml</a></div><div class='hunk'>@@ -18,7 +18,9 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: sgmicro,sgm3140</div><div class='add'>+    enum:</div><div class='add'>+      - ocs,ocp8110</div><div class='add'>+      - sgmicro,sgm3140</div><div class='ctx'> </div><div class='ctx'>   enable-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -34,6 +36,7 @@ properties:</div><div class='ctx'>   led:</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/maxim,max77693.yaml b/Documentation/devicetree/bindings/leds/maxim,max77693.yaml<br/>index 86a0005cf156..e27f57bb52ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/maxim,max77693.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/maxim,max77693.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/maxim,max77693.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/maxim,max77693.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX77693 MicroUSB and Companion Power Management IC LEDs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml b/Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml<br/>new file mode 100644<br/>index 000000000000..e9d02ed6a590<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/mediatek,mt6370-flashlight.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/mediatek,mt6370-flashlight.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Flash LED driver for MT6370 PMIC from MediaTek Integrated.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alice Chen &lt;alice_chen@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This module is part of the MT6370 MFD device.</div><div class='add'>+  Add MT6370 flash LED driver include 2-channel flash LED support Torch/Strobe Mode.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt6370-flashlight</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^led@[0-1]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        enum: [0, 1]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml b/Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml<br/>new file mode 100644<br/>index 000000000000..16b3abc2af3a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/mediatek,mt6370-indicator.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/mediatek,mt6370-indicator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LED driver for MT6370 PMIC from MediaTek Integrated.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alice Chen &lt;alice_chen@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This module is part of the MT6370 MFD device.</div><div class='add'>+  Add MT6370 LED driver include 4-channel RGB LED support Register/PWM/Breath Mode</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt6370-indicator</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^multi-led@[0-3]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: leds-class-multicolor.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^led@[0-2]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: common.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            enum: [0, 1, 2]</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+          - color</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - color</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#size-cells"</div><div class='add'>+</div><div class='add'>+  "^led@[0-3]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - color</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml b/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml<br/>new file mode 100644<br/>index 000000000000..edf6f55df685<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/nxp,pca953x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/nxp,pca953x.yaml</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/nxp,pca953x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP PCA9532 LED Dimmer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Riku Voipio &lt;riku.voipio@iki.fi&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The PCA9532 family is SMBus I/O expander optimized for dimming LEDs.</div><div class='add'>+  The PWM support 256 steps.</div><div class='add'>+</div><div class='add'>+  For more product information please see the link below:</div><div class='add'>+    https://www.nxp.com/docs/en/data-sheet/PCA9532.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nxp,pca9530</div><div class='add'>+      - nxp,pca9531</div><div class='add'>+      - nxp,pca9532</div><div class='add'>+      - nxp,pca9533</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^led-[0-9a-z]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      type:</div><div class='add'>+        description: |</div><div class='add'>+          Output configuration, see include/dt-bindings/leds/leds-pca9532.h</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        default: 0</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/leds-pca9532.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led-controller@62 {</div><div class='add'>+            compatible = "nxp,pca9533";</div><div class='add'>+            reg = &lt;0x62&gt;;</div><div class='add'>+</div><div class='add'>+            led-1 {</div><div class='add'>+                label = "pca:red:power";</div><div class='add'>+                type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led-2 {</div><div class='add'>+                label = "pca:green:power";</div><div class='add'>+                type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led-3 {</div><div class='add'>+                type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+                default-state = "on";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led-4 {</div><div class='add'>+                type = &lt;PCA9532_TYPE_LED&gt;;</div><div class='add'>+                default-state = "keep";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml b/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml<br/>new file mode 100644<br/>index 000000000000..fa03e73622d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/qcom,pm8058-led.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/qcom,pm8058-led.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm PM8058 PMIC LED</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Qualcomm PM8058 contains an LED block for up to six LEDs:: three normal</div><div class='add'>+  LEDs, two "flash" LEDs and one "keypad backlight" LED. The names are quoted</div><div class='add'>+  because sometimes these LED drivers are used for wildly different things than</div><div class='add'>+  flash or keypad backlight:: their names are more of a suggestion than a</div><div class='add'>+  hard-wired usecase.</div><div class='add'>+</div><div class='add'>+  Hardware-wise the different LEDs support slightly different output currents.</div><div class='add'>+  The "flash" LEDs do not need to charge nor do they support external triggers.</div><div class='add'>+  They are just powerful LED drivers.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,pm8058-led</div><div class='add'>+      - qcom,pm8058-keypad-led</div><div class='add'>+      - qcom,pm8058-flash-led</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    pmic {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led@131 {</div><div class='add'>+            compatible = "qcom,pm8058-led";</div><div class='add'>+            reg = &lt;0x131&gt;;</div><div class='add'>+            label = "pm8058:red";</div><div class='add'>+            color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+            default-state = "off";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml b/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml<br/>new file mode 100644<br/>index 000000000000..ffacf703d9f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/qcom,spmi-flash-led.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Flash LED device inside Qualcomm Technologies, Inc. PMICs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Fenglin Wu &lt;quic_fenglinw@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Flash LED controller is present inside some Qualcomm Technologies, Inc. PMICs.</div><div class='add'>+  The flash LED module can have different number of LED channels supported</div><div class='add'>+  e.g. 3 or 4. There are some different registers between them but they can</div><div class='add'>+  both support maximum current up to 1.5 A per channel and they can also support</div><div class='add'>+  ganging 2 channels together to supply maximum current up to 2 A. The current</div><div class='add'>+  will be split symmetrically on each channel and they will be enabled and</div><div class='add'>+  disabled at the same time.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,pm6150l-flash-led</div><div class='add'>+          - qcom,pm8150c-flash-led</div><div class='add'>+          - qcom,pm8150l-flash-led</div><div class='add'>+          - qcom,pm8350c-flash-led</div><div class='add'>+      - const: qcom,spmi-flash-led</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^led-[0-3]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Represents the physical LED components which are connected to the</div><div class='add'>+      flash LED channels' output.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      led-sources:</div><div class='add'>+        description:</div><div class='add'>+          The HW indices of the flash LED channels that connect to the</div><div class='add'>+          physical LED</div><div class='add'>+        allOf:</div><div class='add'>+          - minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+            items:</div><div class='add'>+              enum: [1, 2, 3, 4]</div><div class='add'>+</div><div class='add'>+      led-max-microamp:</div><div class='add'>+        anyOf:</div><div class='add'>+          - minimum: 5000</div><div class='add'>+            maximum: 500000</div><div class='add'>+            multipleOf: 5000</div><div class='add'>+          - minimum: 10000</div><div class='add'>+            maximum: 1000000</div><div class='add'>+            multipleOf: 10000</div><div class='add'>+</div><div class='add'>+      flash-max-microamp:</div><div class='add'>+        anyOf:</div><div class='add'>+          - minimum: 12500</div><div class='add'>+            maximum: 1500000</div><div class='add'>+            multipleOf: 12500</div><div class='add'>+          - minimum: 25000</div><div class='add'>+            maximum: 2000000</div><div class='add'>+            multipleOf: 25000</div><div class='add'>+</div><div class='add'>+      flash-max-timeout-us:</div><div class='add'>+        minimum: 10000</div><div class='add'>+        maximum: 1280000</div><div class='add'>+        multipleOf: 10000</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - led-sources</div><div class='add'>+      - led-max-microamp</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+    spmi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        led-controller@ee00 {</div><div class='add'>+            compatible = "qcom,pm8350c-flash-led", "qcom,spmi-flash-led";</div><div class='add'>+            reg = &lt;0xee00&gt;;</div><div class='add'>+</div><div class='add'>+            led-0 {</div><div class='add'>+                function = LED_FUNCTION_FLASH;</div><div class='add'>+                color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                led-sources = &lt;1&gt;, &lt;4&gt;;</div><div class='add'>+                led-max-microamp = &lt;300000&gt;;</div><div class='add'>+                flash-max-microamp = &lt;2000000&gt;;</div><div class='add'>+                flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+                function-enumerator = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led-1 {</div><div class='add'>+                function = LED_FUNCTION_FLASH;</div><div class='add'>+                color = &lt;LED_COLOR_ID_YELLOW&gt;;</div><div class='add'>+                led-sources = &lt;2&gt;, &lt;3&gt;;</div><div class='add'>+                led-max-microamp = &lt;300000&gt;;</div><div class='add'>+                flash-max-microamp = &lt;2000000&gt;;</div><div class='add'>+                flash-max-timeout-us = &lt;1280000&gt;;</div><div class='add'>+                function-enumerator = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/register-bit-led.yaml b/Documentation/devicetree/bindings/leds/register-bit-led.yaml<br/>index 79b8fc0f9d23..ed26ec19ecbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/register-bit-led.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/register-bit-led.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/register-bit-led.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/register-bit-led.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/leds/register-bit-led.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device Tree Bindings for Register Bit LEDs</div><div class='add'>+title: Register Bit LEDs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/regulator-led.yaml b/Documentation/devicetree/bindings/leds/regulator-led.yaml<br/>new file mode 100644<br/>index 000000000000..4ef7b96e9a08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/regulator-led.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/regulator-led.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/regulator-led.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Regulator LEDs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Regulator LEDs are powered by a single regulator such that they can</div><div class='add'>+  be turned on or off by enabling or disabling the regulator. The available</div><div class='add'>+  brightness settings will be inferred from the available voltages on the</div><div class='add'>+  regulator, and any constraints on the voltage or current will need to be</div><div class='add'>+  specified on the regulator.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: '^led.*$'</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    const: regulator-led</div><div class='add'>+</div><div class='add'>+  vled-supply:</div><div class='add'>+    description:</div><div class='add'>+      The regulator controlling the current to the LED.</div><div class='add'>+</div><div class='add'>+  function: true</div><div class='add'>+  color: true</div><div class='add'>+  linux,default-trigger: true</div><div class='add'>+  default-state: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - vled-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    led-heartbeat {</div><div class='add'>+        compatible = "regulator-led";</div><div class='add'>+        vled-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        function = LED_FUNCTION_STATUS;</div><div class='add'>+        color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+        linux,default-trigger = "heartbeat";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml b/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml<br/>new file mode 100644<br/>index 000000000000..14700a2e5fea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/rohm,bd2606mvv.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/rohm,bd2606mvv.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ROHM BD2606MVV LED controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andreas Kemnade &lt;andreas@kemnade.info&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The BD2606 MVV is a programmable LED controller connected via I2C that can</div><div class='add'>+  drive 6 separate lines. Each of them can be individually switched on and off,</div><div class='add'>+  but the brightness setting is shared between pairs of them.</div><div class='add'>+</div><div class='add'>+  Datasheet is available at</div><div class='add'>+  https://fscdn.rohm.com/en/products/databook/datasheet/ic/power/led_driver/bd2606mvv_1-e.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rohm,bd2606mvv</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO pin to enable/disable the device.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^led@[0-6]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 6</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        led-controller@66 {</div><div class='add'>+            compatible = "rohm,bd2606mvv";</div><div class='add'>+            reg = &lt;0x66&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            led@0 {</div><div class='add'>+                reg = &lt;0x0&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+                function = LED_FUNCTION_POWER;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led@2 {</div><div class='add'>+                reg = &lt;0x2&gt;;</div><div class='add'>+                color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                function = LED_FUNCTION_STATUS;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml b/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml<br/>index 86a37c92b834..64b0be9cf70b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ROHM BD71828 Power Management Integrated Circuit LED driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This module is part of the ROHM BD71828 MFD device. For more details</div><div class='hunk'>@@ -26,26 +26,16 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^led-[1-2]$":</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Properties for a single LED.</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='del'>-      #allOf:</div><div class='del'>-        #- $ref: "common.yaml#"</div><div class='ctx'>       rohm,led-compatible:</div><div class='ctx'>         description: LED identification string</div><div class='ctx'>         $ref: "/schemas/types.yaml#/definitions/string"</div><div class='ctx'>         enum:</div><div class='ctx'>           - bd71828-ambled</div><div class='ctx'>           - bd71828-grnled</div><div class='del'>-      function:</div><div class='del'>-        description:</div><div class='del'>-          Purpose of LED as defined in dt-bindings/leds/common.h</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/string"</div><div class='del'>-      color:</div><div class='del'>-        description:</div><div class='del'>-          LED colour as defined in dt-bindings/leds/common.h</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml b/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml<br/>new file mode 100644<br/>index 000000000000..a6aaa92dbccd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/skyworks,aat1290.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/leds/skyworks,aat1290.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Skyworks Solutions, Inc. AAT1290 Current Regulator for Flash LEDs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jacek Anaszewski &lt;jacek.anaszewski@gmail.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The device is controlled through two pins:: FL_EN and EN_SET. The pins when,</div><div class='add'>+  asserted high, enable flash strobe and movie mode (max 1/2 of flash current)</div><div class='add'>+  respectively. In order to add a capability of selecting the strobe signal</div><div class='add'>+  source (e.g. CPU or camera sensor) there is an additional switch required,</div><div class='add'>+  independent of the flash chip. The switch is controlled with pin control.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: skyworks,aat1290</div><div class='add'>+</div><div class='add'>+  enset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: EN_SET pin</div><div class='add'>+</div><div class='add'>+  flen-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: FL_EN pin</div><div class='add'>+</div><div class='add'>+  led:</div><div class='add'>+    $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      led-max-microamp: true</div><div class='add'>+</div><div class='add'>+      flash-max-microamp:</div><div class='add'>+        description: |</div><div class='add'>+          Maximum flash LED supply current can be calculated using following</div><div class='add'>+          formula:: I = 1A * 162 kOhm / Rset.</div><div class='add'>+</div><div class='add'>+      flash-max-timeout-us:</div><div class='add'>+        description: |</div><div class='add'>+          Maximum flash timeout can be calculated using following formula::</div><div class='add'>+            T = 8.82 * 10^9 * Ct.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - flash-max-microamp</div><div class='add'>+      - flash-max-timeout-us</div><div class='add'>+      - led-max-microamp</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: host</div><div class='add'>+      - const: isp</div><div class='add'>+</div><div class='add'>+  pinctrl-0: true</div><div class='add'>+  pinctrl-1: true</div><div class='add'>+  pinctrl-2: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - enset-gpios</div><div class='add'>+  - flen-gpios</div><div class='add'>+  - led</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='add'>+    // Ct = 220 nF, Rset = 160 kOhm</div><div class='add'>+    led-controller {</div><div class='add'>+        compatible = "skyworks,aat1290";</div><div class='add'>+        flen-gpios = &lt;&amp;gpj1 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        enset-gpios = &lt;&amp;gpj1 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "default", "host", "isp";</div><div class='add'>+        pinctrl-0 = &lt;&amp;camera_flash_host&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;camera_flash_host&gt;;</div><div class='add'>+        pinctrl-2 = &lt;&amp;camera_flash_isp&gt;;</div><div class='add'>+</div><div class='add'>+        led {</div><div class='add'>+            function = LED_FUNCTION_FLASH;</div><div class='add'>+            color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+            led-max-microamp = &lt;520833&gt;;</div><div class='add'>+            flash-max-microamp = &lt;1012500&gt;;</div><div class='add'>+            flash-max-timeout-us = &lt;1940000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/leds/ti,tca6507.yaml b/Documentation/devicetree/bindings/leds/ti,tca6507.yaml<br/>index 32c600387895..4b1575e4f180 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/ti,tca6507.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/leds/ti,tca6507.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/leds/ti,tca6507.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/leds/ti,tca6507.yaml</a></div><div class='hunk'>@@ -38,8 +38,8 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^led@[0-6]$":</div><div class='ctx'>     type: object</div><div class='del'>-</div><div class='ctx'>     $ref: common.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -87,7 +87,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml<br/>index aa2b3bf56b57..385809ed1569 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mailbox/amlogic,meson-gxbb-mhu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/amlogic,meson-gxbb-mhu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson Message-Handling-Unit Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller</div><div class='hunk'>@@ -51,4 +51,3 @@ examples:</div><div class='ctx'>           interrupts = &lt;208&gt;, &lt;209&gt;, &lt;210&gt;;</div><div class='ctx'>           #mbox-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml b/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml<br/>index 5c5c328b3134..4c0668e5f0bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml</a></div><div class='hunk'>@@ -29,6 +29,7 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - apple,t8103-asc-mailbox</div><div class='add'>+              - apple,t8112-asc-mailbox</div><div class='ctx'>               - apple,t6000-asc-mailbox</div><div class='ctx'>           - const: apple,asc-mailbox-v4</div><div class='ctx'> </div><div class='hunk'>@@ -39,6 +40,7 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - apple,t8103-m3-mailbox</div><div class='add'>+              - apple,t8112-m3-mailbox</div><div class='ctx'>               - apple,t6000-m3-mailbox</div><div class='ctx'>           - const: apple,m3-mailbox-v2</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml<br/>index bd49c201477d..d9a4f4a02d7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/arm,mhu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/arm,mhu.yaml</a></div><div class='hunk'>@@ -57,6 +57,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='add'>+    minItems: 2</div><div class='ctx'>     items:</div><div class='ctx'>       - description: low-priority non-secure</div><div class='ctx'>       - description: high-priority non-secure</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml<br/>index 7a86e7926dd2..191c1ce15009 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/fsl,mu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/fsl,mu.yaml</a></div><div class='hunk'>@@ -72,14 +72,16 @@ properties:</div><div class='ctx'>       type      : Channel type</div><div class='ctx'>       channel   : Channel number</div><div class='ctx'> </div><div class='del'>-      This MU support 4 type of unidirectional channels, each type</div><div class='del'>-      has 4 channels. A total of 16 channels. Following types are</div><div class='add'>+      This MU support 5 type of unidirectional channels, each type</div><div class='add'>+      has 4 channels except RST channel which only has 1 channel.</div><div class='add'>+      A total of 17 channels.  Following types are</div><div class='ctx'>       supported:</div><div class='ctx'>       0 - TX channel with 32bit transmit register and IRQ transmit</div><div class='ctx'>           acknowledgment support.</div><div class='ctx'>       1 - RX channel with 32bit receive register and IRQ support</div><div class='ctx'>       2 - TX doorbell channel. Without own register and no ACK support.</div><div class='ctx'>       3 - RX doorbell channel.</div><div class='add'>+      4 - RST channel</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml<br/>new file mode 100644<br/>index 000000000000..cef9d7601398<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek Global Command Engine Mailbox</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Houlong Wei &lt;houlong.wei@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Global Command Engine (GCE) is used to help read/write registers with</div><div class='add'>+  critical time limitation, such as updating display configuration during the</div><div class='add'>+  vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt6779-gce</div><div class='add'>+          - mediatek,mt8173-gce</div><div class='add'>+          - mediatek,mt8183-gce</div><div class='add'>+          - mediatek,mt8186-gce</div><div class='add'>+          - mediatek,mt8188-gce</div><div class='add'>+          - mediatek,mt8192-gce</div><div class='add'>+          - mediatek,mt8195-gce</div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt6795-gce</div><div class='add'>+          - const: mediatek,mt8173-gce</div><div class='add'>+</div><div class='add'>+  "#mbox-cells":</div><div class='add'>+    const: 2</div><div class='add'>+    description:</div><div class='add'>+      The first cell describes the Thread ID of the GCE,</div><div class='add'>+      the second cell describes the priority of the GCE thread</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Global Command Engine clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: gce</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#mbox-cells"</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: mediatek,mt8195-gce</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8173-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        gce: mailbox@10212000 {</div><div class='add'>+            compatible = "mediatek,mt8173-gce";</div><div class='add'>+            reg = &lt;0 0x10212000 0 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            #mbox-cells = &lt;2&gt;;</div><div class='add'>+            clocks = &lt;&amp;infracfg CLK_INFRA_GCE&gt;;</div><div class='add'>+            clock-names = "gce";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml<br/>index 082d397d3e89..404477910f02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller</div><div class='ctx'> </div><div class='hunk'>@@ -14,9 +14,15 @@ properties:</div><div class='ctx'>     const: microchip,mpfs-mailbox</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    items:</div><div class='del'>-      - description: mailbox data registers</div><div class='del'>-      - description: mailbox interrupt registers</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - description: mailbox control &amp; data registers</div><div class='add'>+          - description: mailbox interrupt registers</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - description: mailbox control registers</div><div class='add'>+          - description: mailbox interrupt registers</div><div class='add'>+          - description: mailbox data registers</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -39,7 +45,8 @@ examples:</div><div class='ctx'>       #size-cells = &lt;2&gt;;</div><div class='ctx'>       mbox: mailbox@37020000 {</div><div class='ctx'>         compatible = "microchip,mpfs-mailbox";</div><div class='del'>-        reg = &lt;0x0 0x37020000 0x0 0x1000&gt;, &lt;0x0 0x2000318c 0x0 0x40&gt;;</div><div class='add'>+        reg = &lt;0x0 0x37020000 0x0 0x58&gt;, &lt;0x0 0x2000318C 0x0 0x40&gt;,</div><div class='add'>+              &lt;0x0 0x37020800 0x0 0x100&gt;;</div><div class='ctx'>         interrupt-parent = &lt;&amp;L1&gt;;</div><div class='ctx'>         interrupts = &lt;96&gt;;</div><div class='ctx'>         #mbox-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml<br/>index fe454a1fba17..72c1d9e82c89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml</a></div><div class='hunk'>@@ -11,14 +11,15 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC</div><div class='del'>-  to ommunicate with ADSP by passing messages through two mailbox channels.</div><div class='add'>+  to communicate with ADSP by passing messages through two mailbox channels.</div><div class='ctx'>   The MTK ADSP mailbox IPC also provides the ability for one processor to</div><div class='ctx'>   signal the other processor using interrupts.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - const: mediatek,mt8195-adsp-mbox</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8195-adsp-mbox</div><div class='add'>+      - mediatek,mt8186-adsp-mbox</div><div class='ctx'> </div><div class='ctx'>   "#mbox-cells":</div><div class='ctx'>     const: 0</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/mtk-gce.txt b/Documentation/devicetree/bindings/mailbox/mtk-gce.txt<br/>deleted file mode 100644<br/>index c2aeba63bd47..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/mtk-gce.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/mtk-gce.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,82 +0,0 @@</div><div class='del'>-MediaTek GCE</div><div class='del'>-===============</div><div class='del'>-</div><div class='del'>-The Global Command Engine (GCE) is used to help read/write registers with</div><div class='del'>-critical time limitation, such as updating display configuration during the</div><div class='del'>-vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.</div><div class='del'>-</div><div class='del'>-CMDQ driver uses mailbox framework for communication. Please refer to</div><div class='del'>-mailbox.txt for generic information about mailbox device-tree bindings.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: can be "mediatek,mt8173-gce", "mediatek,mt8183-gce",</div><div class='del'>-  "mediatek,mt8186-gce", "mediatek,mt8192-gce", "mediatek,mt8195-gce" or</div><div class='del'>-  "mediatek,mt6779-gce".</div><div class='del'>-- reg: Address range of the GCE unit</div><div class='del'>-- interrupts: The interrupt signal from the GCE block</div><div class='del'>-- clock: Clocks according to the common clock binding</div><div class='del'>-- clock-names: Must be "gce" to stand for GCE clock</div><div class='del'>-- #mbox-cells: Should be 2.</div><div class='del'>-	&lt;&amp;phandle channel priority&gt;</div><div class='del'>-	phandle: Label name of a gce node.</div><div class='del'>-	channel: Channel of mailbox. Be equal to the thread id of GCE.</div><div class='del'>-	priority: Priority of GCE thread.</div><div class='del'>-</div><div class='del'>-Required properties for a client device:</div><div class='del'>-- mboxes: Client use mailbox to communicate with GCE, it should have this</div><div class='del'>-  property and list of phandle, mailbox specifiers.</div><div class='del'>-Optional properties for a client device:</div><div class='del'>-- mediatek,gce-client-reg: Specify the sub-system id which is corresponding</div><div class='del'>-  to the register address, it should have this property and list of phandle,</div><div class='del'>-  sub-system specifiers.</div><div class='del'>-  &lt;&amp;phandle subsys_number start_offset size&gt;</div><div class='del'>-  phandle: Label name of a gce node.</div><div class='del'>-  subsys_number: specify the sub-system id which is corresponding</div><div class='del'>-                 to the register address.</div><div class='del'>-  start_offset: the start offset of register address that GCE can access.</div><div class='del'>-  size: the total size of register address that GCE can access.</div><div class='del'>-</div><div class='del'>-Optional properties for a client mutex node:</div><div class='del'>-- mediatek,gce-events: GCE events used by clients. The event numbers are</div><div class='del'>-  defined in 'dt-bindings/gce/&lt;chip&gt;-gce.h'.</div><div class='del'>-</div><div class='del'>-Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h',</div><div class='del'>-'dt-bindings/gce/mt8183-gce.h', 'dt-bindings/gce/mt8186-gce.h'</div><div class='del'>-'dt-bindings/gce/mt8192-gce.h', 'dt-bindings/gce/mt8195-gce.h' or</div><div class='del'>-'dt-bindings/gce/mt6779-gce.h'.</div><div class='del'>-Such as sub-system ids, thread priority, event ids.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	gce: gce@10212000 {</div><div class='del'>-		compatible = "mediatek,mt8173-gce";</div><div class='del'>-		reg = &lt;0 0x10212000 0 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 135 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;infracfg CLK_INFRA_GCE&gt;;</div><div class='del'>-		clock-names = "gce";</div><div class='del'>-		#mbox-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example for a client device:</div><div class='del'>-</div><div class='del'>-	mmsys: clock-controller@14000000 {</div><div class='del'>-		compatible = "mediatek,mt8173-mmsys";</div><div class='del'>-		mboxes = &lt;&amp;gce 0 CMDQ_THR_PRIO_LOWEST&gt;,</div><div class='del'>-			 &lt;&amp;gce 1 CMDQ_THR_PRIO_LOWEST&gt;;</div><div class='del'>-		mutex-event-eof = &lt;CMDQ_EVENT_MUTEX0_STREAM_EOF</div><div class='del'>-				CMDQ_EVENT_MUTEX1_STREAM_EOF&gt;;</div><div class='del'>-		mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x3000 0x1000&gt;,</div><div class='del'>-					  &lt;&amp;gce SUBSYS_1401XXXX 0x2000 0x100&gt;;</div><div class='del'>-		...</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example for a client mutex node:</div><div class='del'>-	mutex: mutex@14020000 {</div><div class='del'>-		compatible = "mediatek,mt8173-disp-mutex";</div><div class='del'>-		reg = &lt;0 0x14020000 0 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		power-domains = &lt;&amp;scpsys MT8173_POWER_DOMAIN_MM&gt;;</div><div class='del'>-		clocks = &lt;&amp;mmsys CLK_MM_MUTEX_32K&gt;;</div><div class='del'>-		mediatek,gce-events = &lt;CMDQ_EVENT_MUTEX0_STREAM_EOF&gt;,</div><div class='del'>-				      &lt;CMDQ_EVENT_MUTEX1_STREAM_EOF&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml<br/>index 9f7a7296b57f..a3e87516d637 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml</a></div><div class='hunk'>@@ -26,6 +26,15 @@ description: |</div><div class='ctx'>   second cell is used to identify the mailbox that the client is going</div><div class='ctx'>   to use.</div><div class='ctx'> </div><div class='add'>+  For shared mailboxes, the first cell composed of two fields:</div><div class='add'>+    - bits 15..8:</div><div class='add'>+        A bit mask of flags that further specifies the type of shared</div><div class='add'>+        mailbox to be used (based on the data size). If no flag is</div><div class='add'>+        specified then, 32-bit shared mailbox is used.</div><div class='add'>+    - bits 7..0:</div><div class='add'>+        Defines the type of the mailbox to be used. This field should be</div><div class='add'>+        TEGRA_HSP_MBOX_TYPE_SM for shared mailboxes.</div><div class='add'>+</div><div class='ctx'>   For doorbells, the second cell specifies the index of the doorbell to</div><div class='ctx'>   use.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml<br/>index 3b5ba7ecc19d..32d7bbc98cac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm APCS global block bindings</div><div class='add'>+title: Qualcomm APCS global block</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the APCS "global" block found in various Qualcomm</div><div class='hunk'>@@ -15,25 +15,40 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,ipq6018-apcs-apps-global</div><div class='del'>-      - qcom,ipq8074-apcs-apps-global</div><div class='del'>-      - qcom,msm8916-apcs-kpss-global</div><div class='del'>-      - qcom,msm8939-apcs-kpss-global</div><div class='del'>-      - qcom,msm8953-apcs-kpss-global</div><div class='del'>-      - qcom,msm8976-apcs-kpss-global</div><div class='del'>-      - qcom,msm8994-apcs-kpss-global</div><div class='del'>-      - qcom,msm8996-apcs-hmss-global</div><div class='del'>-      - qcom,msm8998-apcs-hmss-global</div><div class='del'>-      - qcom,qcm2290-apcs-hmss-global</div><div class='del'>-      - qcom,qcs404-apcs-apps-global</div><div class='del'>-      - qcom,sc7180-apss-shared</div><div class='del'>-      - qcom,sc8180x-apss-shared</div><div class='del'>-      - qcom,sdm660-apcs-hmss-global</div><div class='del'>-      - qcom,sdm845-apss-shared</div><div class='del'>-      - qcom,sm6125-apcs-hmss-global</div><div class='del'>-      - qcom,sm6115-apcs-hmss-global</div><div class='del'>-      - qcom,sm8150-apss-shared</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,ipq5332-apcs-apps-global</div><div class='add'>+              - qcom,ipq8074-apcs-apps-global</div><div class='add'>+              - qcom,ipq9574-apcs-apps-global</div><div class='add'>+          - const: qcom,ipq6018-apcs-apps-global</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7180-apss-shared</div><div class='add'>+              - qcom,sc8180x-apss-shared</div><div class='add'>+              - qcom,sm8150-apss-shared</div><div class='add'>+          - const: qcom,sdm845-apss-shared</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,msm8916-apcs-kpss-global</div><div class='add'>+              - qcom,msm8939-apcs-kpss-global</div><div class='add'>+              - qcom,msm8953-apcs-kpss-global</div><div class='add'>+              - qcom,msm8976-apcs-kpss-global</div><div class='add'>+              - qcom,msm8994-apcs-kpss-global</div><div class='add'>+              - qcom,qcs404-apcs-apps-global</div><div class='add'>+              - qcom,sdx55-apcs-gcc</div><div class='add'>+          - const: syscon</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,ipq6018-apcs-apps-global</div><div class='add'>+          - qcom,ipq8074-apcs-apps-global</div><div class='add'>+          - qcom,msm8996-apcs-hmss-global</div><div class='add'>+          - qcom,msm8998-apcs-hmss-global</div><div class='add'>+          - qcom,qcm2290-apcs-hmss-global</div><div class='add'>+          - qcom,sdm660-apcs-hmss-global</div><div class='add'>+          - qcom,sdm845-apss-shared</div><div class='add'>+          - qcom,sm4250-apcs-hmss-global</div><div class='add'>+          - qcom,sm6115-apcs-hmss-global</div><div class='add'>+          - qcom,sm6125-apcs-hmss-global</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -41,23 +56,17 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     description: phandles to the parent clocks of the clock driver</div><div class='ctx'>     minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - description: primary pll parent of the clock driver</div><div class='del'>-      - description: auxiliary parent</div><div class='del'>-      - description: reference clock</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   '#mbox-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   '#clock-cells':</div><div class='del'>-    const: 0</div><div class='add'>+    enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - const: pll</div><div class='del'>-      - const: aux</div><div class='del'>-      - const: ref</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -71,31 +80,90 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           enum:</div><div class='del'>-            - qcom,ipq6018-apcs-apps-global</div><div class='del'>-            - qcom,ipq8074-apcs-apps-global</div><div class='ctx'>             - qcom,msm8916-apcs-kpss-global</div><div class='add'>+            - qcom,msm8939-apcs-kpss-global</div><div class='add'>+            - qcom,qcs404-apcs-apps-global</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: primary pll parent of the clock driver</div><div class='add'>+            - description: auxiliary parent</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pll</div><div class='add'>+            - const: aux</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdx55-apcs-gcc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: reference clock</div><div class='add'>+            - description: primary pll parent of the clock driver</div><div class='add'>+            - description: auxiliary parent</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: pll</div><div class='add'>+            - const: aux</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq6018-apcs-apps-global</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: primary pll parent of the clock driver</div><div class='add'>+            - description: XO clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pll</div><div class='add'>+            - const: xo</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,msm8953-apcs-kpss-global</div><div class='add'>+            - qcom,msm8976-apcs-kpss-global</div><div class='ctx'>             - qcom,msm8994-apcs-kpss-global</div><div class='ctx'>             - qcom,msm8996-apcs-hmss-global</div><div class='ctx'>             - qcom,msm8998-apcs-hmss-global</div><div class='del'>-            - qcom,qcs404-apcs-apps-global</div><div class='del'>-            - qcom,sc7180-apss-shared</div><div class='add'>+            - qcom,qcm2290-apcs-hmss-global</div><div class='ctx'>             - qcom,sdm660-apcs-hmss-global</div><div class='ctx'>             - qcom,sdm845-apss-shared</div><div class='add'>+            - qcom,sm4250-apcs-hmss-global</div><div class='add'>+            - qcom,sm6115-apcs-hmss-global</div><div class='ctx'>             - qcom,sm6125-apcs-hmss-global</div><div class='del'>-            - qcom,sm8150-apss-shared</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='del'>-        clocks:</div><div class='del'>-          maxItems: 2</div><div class='add'>+        clocks: false</div><div class='add'>+        clock-names: false</div><div class='add'>+</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='del'>-          enum:</div><div class='del'>-            - qcom,sdx55-apcs-gcc</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq6018-apcs-apps-global</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='del'>-        clocks:</div><div class='del'>-          maxItems: 3</div><div class='add'>+        '#clock-cells':</div><div class='add'>+          const: 1</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        '#clock-cells':</div><div class='add'>+          const: 0</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'> </div><div class='ctx'>   # Example apcs with msm8996</div><div class='hunk'>@@ -106,6 +174,7 @@ examples:</div><div class='ctx'>         reg = &lt;0x9820000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'>         #mbox-cells = &lt;1&gt;;</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     rpm-glink {</div><div class='hunk'>@@ -113,7 +182,6 @@ examples:</div><div class='ctx'>         interrupts = &lt;GIC_SPI 168 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'>         qcom,rpm-msg-ram = &lt;&amp;rpm_msg_ram&gt;;</div><div class='ctx'>         mboxes = &lt;&amp;apcs_glb 0&gt;;</div><div class='del'>-        mbox-names = "rpm_hlos";</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   # Example apcs with qcs404</div><div class='hunk'>@@ -121,7 +189,7 @@ examples:</div><div class='ctx'>     #define GCC_APSS_AHB_CLK_SRC  1</div><div class='ctx'>     #define GCC_GPLL0_AO_OUT_MAIN 123</div><div class='ctx'>     apcs: mailbox@b011000 {</div><div class='del'>-        compatible = "qcom,qcs404-apcs-apps-global";</div><div class='add'>+        compatible = "qcom,qcs404-apcs-apps-global", "syscon";</div><div class='ctx'>         reg = &lt;0x0b011000 0x1000&gt;;</div><div class='ctx'>         #mbox-cells = &lt;1&gt;;</div><div class='ctx'>         clocks = &lt;&amp;apcs_hfpll&gt;, &lt;&amp;gcc GCC_GPLL0_AO_OUT_MAIN&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml<br/>index 866efb278813..cc6f66eccc84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml</a></div><div class='hunk'>@@ -24,10 +24,16 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - qcom,qdu1000-ipcc</div><div class='add'>+          - qcom,sa8775p-ipcc</div><div class='add'>+          - qcom,sc7280-ipcc</div><div class='add'>+          - qcom,sc8280xp-ipcc</div><div class='ctx'>           - qcom,sm6350-ipcc</div><div class='add'>+          - qcom,sm6375-ipcc</div><div class='ctx'>           - qcom,sm8250-ipcc</div><div class='ctx'>           - qcom,sm8350-ipcc</div><div class='del'>-          - qcom,sc7280-ipcc</div><div class='add'>+          - qcom,sm8450-ipcc</div><div class='add'>+          - qcom,sm8550-ipcc</div><div class='ctx'>       - const: qcom,ipcc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -61,23 +67,14 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='del'>-</div><div class='del'>-        mailbox@408000 {</div><div class='del'>-                compatible = "qcom,sm8250-ipcc", "qcom,ipcc";</div><div class='del'>-                reg = &lt;0x408000 0x1000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;3&gt;;</div><div class='del'>-                #mbox-cells = &lt;2&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        smp2p-modem {</div><div class='del'>-                compatible = "qcom,smp2p";</div><div class='del'>-                interrupts-extended = &lt;&amp;ipcc_mproc IPCC_CLIENT_MPSS</div><div class='del'>-                                IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                mboxes = &lt;&amp;ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P&gt;;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='ctx'> </div><div class='del'>-                /* Other SMP2P fields */</div><div class='del'>-        };</div><div class='add'>+    mailbox@408000 {</div><div class='add'>+        compatible = "qcom,sm8250-ipcc", "qcom,ipcc";</div><div class='add'>+        reg = &lt;0x408000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;3&gt;;</div><div class='add'>+        #mbox-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml<br/>index 80feba82cbd6..b526f9c0c272 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Spreadtrum mailbox controller bindings</div><div class='add'>+title: Spreadtrum mailbox controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml<br/>new file mode 100644<br/>index 000000000000..a023c28dff49<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/st,sti-mailbox.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/st,sti-mailbox.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics Mailbox Driver for STi platform</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Each ST Mailbox IP currently consists of 4 instances of 32 channels.</div><div class='add'>+  Messages are passed between Application and Remote processors using</div><div class='add'>+  shared memory.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stih407-mailbox</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mbox-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: name of the mailbox IP</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: the irq line for the RX mailbox</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#mbox-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#mbox-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    mailbox0: mailbox@8f00000  {</div><div class='add'>+        compatible = "st,stih407-mailbox";</div><div class='add'>+        reg = &lt;0x8f00000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #mbox-cells = &lt;2&gt;;</div><div class='add'>+        mbox-name = "a9";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml<br/>index 8eb4bf52ea27..134fd223a02b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/st,stm32-ipcc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 IPC controller bindings</div><div class='add'>+title: STMicroelectronics STM32 IPC controller</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The IPCC block provides a non blocking signaling mechanism to post and</div><div class='hunk'>@@ -30,15 +30,11 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: rx channel occupied</div><div class='ctx'>       - description: tx channel free</div><div class='del'>-      - description: wakeup source</div><div class='del'>-    minItems: 2</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: rx</div><div class='ctx'>       - const: tx</div><div class='del'>-      - const: wakeup</div><div class='del'>-    minItems: 2</div><div class='ctx'> </div><div class='ctx'>   wakeup-source: true</div><div class='ctx'> </div><div class='hunk'>@@ -70,10 +66,9 @@ examples:</div><div class='ctx'>       #mbox-cells = &lt;1&gt;;</div><div class='ctx'>       reg = &lt;0x4c001000 0x400&gt;;</div><div class='ctx'>       st,proc-id = &lt;0&gt;;</div><div class='del'>-      interrupts-extended = &lt;&amp;intc GIC_SPI 100 IRQ_TYPE_NONE&gt;,</div><div class='del'>-      		      &lt;&amp;intc GIC_SPI 101 IRQ_TYPE_NONE&gt;,</div><div class='del'>-      		      &lt;&amp;aiec 62 1&gt;;</div><div class='del'>-      interrupt-names = "rx", "tx", "wakeup";</div><div class='add'>+      interrupts-extended = &lt;&amp;exti 61 1&gt;,</div><div class='add'>+                            &lt;&amp;intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "rx", "tx";</div><div class='ctx'>       clocks = &lt;&amp;rcc_clk IPCC&gt;;</div><div class='ctx'>       wakeup-source;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/sti-mailbox.txt b/Documentation/devicetree/bindings/mailbox/sti-mailbox.txt<br/>deleted file mode 100644<br/>index 351f612673fc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/sti-mailbox.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/sti-mailbox.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-ST Microelectronics Mailbox Driver</div><div class='del'>-</div><div class='del'>-Each ST Mailbox IP currently consists of 4 instances of 32 channels.  Messages</div><div class='del'>-are passed between Application and Remote processors using shared memory.</div><div class='del'>-</div><div class='del'>-Controller</div><div class='del'>-----------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible		: Should be "st,stih407-mailbox"</div><div class='del'>-- reg			: Offset and length of the device's register set</div><div class='del'>-- mbox-name		: Name of the mailbox</div><div class='del'>-- #mbox-cells:		: Must be 2</div><div class='del'>-			  &lt;&amp;phandle instance channel direction&gt;</div><div class='del'>-			    phandle   : Label name of controller</div><div class='del'>-			    instance  : Instance number</div><div class='del'>-			    channel   : Channel number</div><div class='del'>-</div><div class='del'>-Optional properties</div><div class='del'>-- interrupts		: Contains the IRQ line for a Rx mailbox</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-mailbox0: mailbox@0  {</div><div class='del'>-	compatible	= "st,stih407-mailbox";</div><div class='del'>-	reg		= &lt;0x08f00000 0x1000&gt;;</div><div class='del'>-	interrupts	= &lt;GIC_SPI 1 IRQ_TYPE_NONE&gt;;</div><div class='del'>-	#mbox-cells	= &lt;2&gt;;</div><div class='del'>-	mbox-name	= "a9";</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Client</div><div class='del'>-------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible		: Many (See the client docs)</div><div class='del'>-- reg			: Shared (between Application and Remote) memory address</div><div class='del'>-- mboxes		: Standard property to specify a Mailbox (See ./mailbox.txt)</div><div class='del'>-			  Cells must match 'mbox-cells' (See Controller docs above)</div><div class='del'>-</div><div class='del'>-Optional properties</div><div class='del'>-- mbox-names		: Name given to channels seen in the 'mboxes' property.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-mailbox_test {</div><div class='del'>-	compatible	= "mailbox-test";</div><div class='del'>-	reg		= &lt;0x[shared_memory_address], [shared_memory_size]&gt;;</div><div class='del'>-	mboxes		= &lt;&amp;mailbox2 0 1&gt;, &lt;&amp;mailbox0 2 1&gt;;</div><div class='del'>-	mbox-names	= "tx",	"rx";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt<br/>deleted file mode 100644<br/>index ad76edccf881..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,127 +0,0 @@</div><div class='del'>-Xilinx IPI Mailbox Controller</div><div class='del'>-========================================</div><div class='del'>-</div><div class='del'>-The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage</div><div class='del'>-messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI</div><div class='del'>-agent owns registers used for notification and buffers for message.</div><div class='del'>-</div><div class='del'>-               +-------------------------------------+</div><div class='del'>-               | Xilinx ZynqMP IPI Controller        |</div><div class='del'>-               +-------------------------------------+</div><div class='del'>-    +--------------------------------------------------+</div><div class='del'>-ATF                    |                     |</div><div class='del'>-                       |                     |</div><div class='del'>-                       |                     |</div><div class='del'>-    +--------------------------+             |</div><div class='del'>-                       |                     |</div><div class='del'>-                       |                     |</div><div class='del'>-    +--------------------------------------------------+</div><div class='del'>-            +------------------------------------------+</div><div class='del'>-            |  +----------------+   +----------------+ |</div><div class='del'>-Hardware    |  |  IPI Agent     |   |  IPI Buffers   | |</div><div class='del'>-            |  |  Registers     |   |                | |</div><div class='del'>-            |  |                |   |                | |</div><div class='del'>-            |  +----------------+   +----------------+ |</div><div class='del'>-            |                                          |</div><div class='del'>-            | Xilinx IPI Agent Block                   |</div><div class='del'>-            +------------------------------------------+</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Controller Device Node:</div><div class='del'>-===========================</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-IPI agent node:</div><div class='del'>-- compatible:		Shall be: "xlnx,zynqmp-ipi-mailbox"</div><div class='del'>-- interrupt-parent:	Phandle for the interrupt controller</div><div class='del'>-- interrupts:		Interrupt information corresponding to the</div><div class='del'>-			interrupt-names property.</div><div class='del'>-- xlnx,ipi-id:		local Xilinx IPI agent ID</div><div class='del'>-- #address-cells:	number of address cells of internal IPI mailbox nodes</div><div class='del'>-- #size-cells:		number of size cells of internal IPI mailbox nodes</div><div class='del'>-</div><div class='del'>-Internal IPI mailbox node:</div><div class='del'>-- reg:			IPI buffers address ranges</div><div class='del'>-- reg-names:		Names of the reg resources. It should have:</div><div class='del'>-			* local_request_region</div><div class='del'>-			  - IPI request msg buffer written by local and read</div><div class='del'>-			    by remote</div><div class='del'>-			* local_response_region</div><div class='del'>-			  - IPI response msg buffer written by local and read</div><div class='del'>-			    by remote</div><div class='del'>-			* remote_request_region</div><div class='del'>-			  - IPI request msg buffer written by remote and read</div><div class='del'>-			    by local</div><div class='del'>-			* remote_response_region</div><div class='del'>-			  - IPI response msg buffer written by remote and read</div><div class='del'>-			    by local</div><div class='del'>-- #mbox-cells:		Shall be 1. It contains:</div><div class='del'>-			* tx(0) or rx(1) channel</div><div class='del'>-- xlnx,ipi-id:		remote Xilinx IPI agent ID of which the mailbox is</div><div class='del'>-			connected to.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>---------------------</div><div class='del'>-- method:              The method of accessing the IPI agent registers.</div><div class='del'>-                       Permitted values are: "smc" and "hvc". Default is</div><div class='del'>-                       "smc".</div><div class='del'>-</div><div class='del'>-Client Device Node:</div><div class='del'>-===========================</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- mboxes:		Standard property to specify a mailbox</div><div class='del'>-			(See ./mailbox.txt)</div><div class='del'>-- mbox-names:		List of identifier  strings for each mailbox</div><div class='del'>-			channel.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-===========================</div><div class='del'>-	zynqmp_ipi {</div><div class='del'>-		compatible = "xlnx,zynqmp-ipi-mailbox";</div><div class='del'>-		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-		interrupts = &lt;0 29 4&gt;;</div><div class='del'>-		xlnx,ipi-id = &lt;0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		/* APU&lt;-&gt;RPU0 IPI mailbox controller */</div><div class='del'>-		ipi_mailbox_rpu0: mailbox@ff990400 {</div><div class='del'>-			reg = &lt;0xff990400 0x20&gt;,</div><div class='del'>-			      &lt;0xff990420 0x20&gt;,</div><div class='del'>-			      &lt;0xff990080 0x20&gt;,</div><div class='del'>-			      &lt;0xff9900a0 0x20&gt;;</div><div class='del'>-			reg-names = "local_request_region",</div><div class='del'>-				    "local_response_region",</div><div class='del'>-				    "remote_request_region",</div><div class='del'>-				    "remote_response_region";</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			xlnx,ipi-id = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		/* APU&lt;-&gt;RPU1 IPI mailbox controller */</div><div class='del'>-		ipi_mailbox_rpu1: mailbox@ff990440 {</div><div class='del'>-			reg = &lt;0xff990440 0x20&gt;,</div><div class='del'>-			      &lt;0xff990460 0x20&gt;,</div><div class='del'>-			      &lt;0xff990280 0x20&gt;,</div><div class='del'>-			      &lt;0xff9902a0 0x20&gt;;</div><div class='del'>-			reg-names = "local_request_region",</div><div class='del'>-				    "local_response_region",</div><div class='del'>-				    "remote_request_region",</div><div class='del'>-				    "remote_response_region";</div><div class='del'>-			#mbox-cells = &lt;1&gt;;</div><div class='del'>-			xlnx,ipi-id = &lt;2&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-	rpu0 {</div><div class='del'>-		...</div><div class='del'>-		mboxes = &lt;&amp;ipi_mailbox_rpu0 0&gt;,</div><div class='del'>-			 &lt;&amp;ipi_mailbox_rpu0 1&gt;;</div><div class='del'>-		mbox-names = "tx", "rx";</div><div class='del'>-	};</div><div class='del'>-	rpu1 {</div><div class='del'>-		...</div><div class='del'>-		mboxes = &lt;&amp;ipi_mailbox_rpu1 0&gt;,</div><div class='del'>-			 &lt;&amp;ipi_mailbox_rpu1 1&gt;;</div><div class='del'>-		mbox-names = "tx", "rx";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml<br/>new file mode 100644<br/>index 000000000000..374ffe64016f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mailbox/xlnx,zynqmp-ipi-mailbox.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx IPI(Inter Processor Interrupt) mailbox controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage</div><div class='add'>+  messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI</div><div class='add'>+  agent owns registers used for notification and buffers for message.</div><div class='add'>+</div><div class='add'>+               +-------------------------------------+</div><div class='add'>+               | Xilinx ZynqMP IPI Controller        |</div><div class='add'>+               +-------------------------------------+</div><div class='add'>+    +--------------------------------------------------+</div><div class='add'>+  TF-A                   |                     |</div><div class='add'>+                         |                     |</div><div class='add'>+                         |                     |</div><div class='add'>+    +--------------------------+               |</div><div class='add'>+                         |                     |</div><div class='add'>+                         |                     |</div><div class='add'>+    +--------------------------------------------------+</div><div class='add'>+              +------------------------------------------+</div><div class='add'>+              |  +----------------+   +----------------+ |</div><div class='add'>+  Hardware    |  |  IPI Agent     |   |  IPI Buffers   | |</div><div class='add'>+              |  |  Registers     |   |                | |</div><div class='add'>+              |  |                |   |                | |</div><div class='add'>+              |  +----------------+   +----------------+ |</div><div class='add'>+              |                                          |</div><div class='add'>+              | Xilinx IPI Agent Block                   |</div><div class='add'>+              +------------------------------------------+</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xlnx,zynqmp-ipi-mailbox</div><div class='add'>+</div><div class='add'>+  method:</div><div class='add'>+    description: |</div><div class='add'>+      The method of calling the PM-API firmware layer.</div><div class='add'>+      Permitted values are.</div><div class='add'>+      - "smc" : SMC #0, following the SMCCC</div><div class='add'>+      - "hvc" : HVC #0, following the SMCCC</div><div class='add'>+</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - smc</div><div class='add'>+      - hvc</div><div class='add'>+    default: smc</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  xlnx,ipi-id:</div><div class='add'>+    description: |</div><div class='add'>+      Remote Xilinx IPI agent ID of which the mailbox is connected to.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^mailbox@[0-9a-f]+$':</div><div class='add'>+    description: Internal ipi mailbox node</div><div class='add'>+    type: object  # DT nodes are json objects</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      xlnx,ipi-id:</div><div class='add'>+        description:</div><div class='add'>+          Remote Xilinx IPI agent ID of which the mailbox is connected to.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+      '#mbox-cells':</div><div class='add'>+        const: 1</div><div class='add'>+        description:</div><div class='add'>+          It contains tx(0) or rx(1) channel IPI id number.</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 4</div><div class='add'>+</div><div class='add'>+      reg-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: local_request_region</div><div class='add'>+          - const: local_response_region</div><div class='add'>+          - const: remote_request_region</div><div class='add'>+          - const: remote_response_region</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - reg-names</div><div class='add'>+      - "#mbox-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - xlnx,ipi-id</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include&lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    amba {</div><div class='add'>+      #address-cells = &lt;0x2&gt;;</div><div class='add'>+      #size-cells = &lt;0x2&gt;;</div><div class='add'>+      zynqmp-mailbox {</div><div class='add'>+        compatible = "xlnx,zynqmp-ipi-mailbox";</div><div class='add'>+        interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        xlnx,ipi-id = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        mailbox: mailbox@ff9905c0 {</div><div class='add'>+          reg = &lt;0x0 0xff9905c0 0x0 0x20&gt;,</div><div class='add'>+                &lt;0x0 0xff9905e0 0x0 0x20&gt;,</div><div class='add'>+                &lt;0x0 0xff990e80 0x0 0x20&gt;,</div><div class='add'>+                &lt;0x0 0xff990ea0 0x0 0x20&gt;;</div><div class='add'>+          reg-names = "local_request_region",</div><div class='add'>+                      "local_response_region",</div><div class='add'>+                      "remote_request_region",</div><div class='add'>+                      "remote_response_region";</div><div class='add'>+          #mbox-cells = &lt;1&gt;;</div><div class='add'>+          xlnx,ipi-id = &lt;4&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allegro,al5e.yaml b/Documentation/devicetree/bindings/media/allegro,al5e.yaml<br/>index 135bea94b587..2899d26d690e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allegro,al5e.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allegro,al5e.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allegro,al5e.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allegro,al5e.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/allegro,al5e.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allegro DVT Video IP Codecs Device Tree Bindings</div><div class='add'>+title: Allegro DVT Video IP Codecs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michael Tretter &lt;m.tretter@pengutronix.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml<br/>index 6ced94064215..617264ce477d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings</div><div class='add'>+title: Allwinner A10 CMOS Sensor Interface (CSI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml<br/>index 6d8395d6bca0..42dfe22ad5f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-ir.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Infrared Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Infrared Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rc.yaml#"</div><div class='add'>+  - $ref: rc.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>       - const: allwinner,sun6i-a31-ir</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - allwinner,suniv-f1c100s-ir</div><div class='ctx'>               - allwinner,sun8i-a83t-ir</div><div class='ctx'>               - allwinner,sun8i-r40-ir</div><div class='ctx'>               - allwinner,sun50i-a64-ir</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml<br/>index ee7fc3515d89..541325f900a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-video-engine.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Video Engine Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Video Engine</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml<br/>index 24d7bf21499e..a4f06bbdfe49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun50i-h6-vpu-g2.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/allwinner,sun50i-h6-vpu-g2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Hantro G2 VPU codec implemented on Allwinner H6 SoC</div><div class='ctx'> </div><div class='hunk'>@@ -36,6 +36,9 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -43,6 +46,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - resets</div><div class='add'>+  - iommus</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -59,6 +63,7 @@ examples:</div><div class='ctx'>         clocks = &lt;&amp;ccu CLK_BUS_VP9&gt;, &lt;&amp;ccu CLK_VP9&gt;;</div><div class='ctx'>         clock-names = "bus", "mod";</div><div class='ctx'>         resets = &lt;&amp;ccu RST_BUS_VP9&gt;;</div><div class='add'>+        iommus = &lt;&amp;iommu 5&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml<br/>index 8b568072a069..b3d6db922693 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun6i-a31-csi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 CMOS Sensor Interface (CSI) Device Tree Bindings</div><div class='add'>+title: Allwinner A31 CMOS Sensor Interface (CSI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -42,6 +42,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   port:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    description: Parallel input port, connect to a parallel sensor</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       endpoint:</div><div class='hunk'>@@ -59,7 +60,28 @@ properties:</div><div class='ctx'>         required:</div><div class='ctx'>           - bus-width</div><div class='ctx'> </div><div class='del'>-    additionalProperties: false</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: "#/properties/port"</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: MIPI CSI-2 bridge input port</div><div class='add'>+</div><div class='add'>+      port@2:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Internal output port to the ISP</div><div class='add'>+</div><div class='add'>+    anyOf:</div><div class='add'>+      - required:</div><div class='add'>+          - port@0</div><div class='add'>+      - required:</div><div class='add'>+          - port@1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -69,6 +91,12 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - resets</div><div class='ctx'> </div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - ports</div><div class='add'>+  - required:</div><div class='add'>+      - port</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -89,19 +117,25 @@ examples:</div><div class='ctx'>                       "ram";</div><div class='ctx'>         resets = &lt;&amp;ccu RST_BUS_CSI&gt;;</div><div class='ctx'> </div><div class='del'>-        port {</div><div class='del'>-            /* Parallel bus endpoint */</div><div class='del'>-            csi1_ep: endpoint {</div><div class='del'>-                remote-endpoint = &lt;&amp;adv7611_ep&gt;;</div><div class='del'>-                bus-width = &lt;16&gt;;</div><div class='del'>-</div><div class='del'>-                /*</div><div class='del'>-                 * If hsync-active/vsync-active are missing,</div><div class='del'>-                 * embedded BT.656 sync is used.</div><div class='del'>-                 */</div><div class='del'>-                 hsync-active = &lt;0&gt;; /* Active low */</div><div class='del'>-                 vsync-active = &lt;0&gt;; /* Active low */</div><div class='del'>-                 pclk-sample = &lt;1&gt;;  /* Rising */</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                /* Parallel bus endpoint */</div><div class='add'>+                csi1_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;adv7611_ep&gt;;</div><div class='add'>+                    bus-width = &lt;16&gt;;</div><div class='add'>+</div><div class='add'>+                    /*</div><div class='add'>+                     * If hsync-active/vsync-active are missing,</div><div class='add'>+                     * embedded BT.656 sync is used.</div><div class='add'>+                     */</div><div class='add'>+                    hsync-active = &lt;0&gt;; /* Active low */</div><div class='add'>+                    vsync-active = &lt;0&gt;; /* Active low */</div><div class='add'>+                    pclk-sample = &lt;1&gt;;  /* Rising */</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml<br/>new file mode 100644<br/>index 000000000000..a61a76bb611c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun6i-a31-isp.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-isp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner A31 Image Signal Processor Driver (ISP)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Kocialkowski &lt;paul.kocialkowski@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - allwinner,sun6i-a31-isp</div><div class='add'>+      - allwinner,sun8i-v3s-isp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Bus Clock</div><div class='add'>+      - description: Module Clock</div><div class='add'>+      - description: DRAM Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: mod</div><div class='add'>+      - const: ram</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: CSI0 input port</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: CSI1 input port</div><div class='add'>+</div><div class='add'>+    if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - allwinner,sun8i-v3s-isp</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - port@0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/sun8i-v3s-ccu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/sun8i-v3s-ccu.h&gt;</div><div class='add'>+</div><div class='add'>+    isp: isp@1cb8000 {</div><div class='add'>+        compatible = "allwinner,sun8i-v3s-isp";</div><div class='add'>+        reg = &lt;0x01cb8000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;ccu CLK_BUS_CSI&gt;,</div><div class='add'>+             &lt;&amp;ccu CLK_CSI1_SCLK&gt;,</div><div class='add'>+             &lt;&amp;ccu CLK_DRAM_CSI&gt;;</div><div class='add'>+        clock-names = "bus", "mod", "ram";</div><div class='add'>+        resets = &lt;&amp;ccu RST_BUS_CSI&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                isp_in_csi0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csi0_out_isp&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml<br/>new file mode 100644<br/>index 000000000000..54e15ab8a7f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun6i-a31-mipi-csi2.yaml</a></div><div class='hunk'>@@ -0,0 +1,137 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner A31 MIPI CSI-2</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Kocialkowski &lt;paul.kocialkowski@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: allwinner,sun6i-a31-mipi-csi2</div><div class='add'>+      - items:</div><div class='add'>+          - const: allwinner,sun8i-v3s-mipi-csi2</div><div class='add'>+          - const: allwinner,sun6i-a31-mipi-csi2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Bus Clock</div><div class='add'>+      - description: Module Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: mod</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: MIPI D-PHY</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dphy</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        description: Input port, connect to a MIPI CSI-2 sensor</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Output port, connect to a CSI controller</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - resets</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/sun8i-v3s-ccu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/sun8i-v3s-ccu.h&gt;</div><div class='add'>+</div><div class='add'>+    mipi_csi2: csi@1cb1000 {</div><div class='add'>+        compatible = "allwinner,sun8i-v3s-mipi-csi2",</div><div class='add'>+                     "allwinner,sun6i-a31-mipi-csi2";</div><div class='add'>+        reg = &lt;0x01cb1000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;ccu CLK_BUS_CSI&gt;,</div><div class='add'>+                 &lt;&amp;ccu CLK_CSI1_SCLK&gt;;</div><div class='add'>+        clock-names = "bus", "mod";</div><div class='add'>+        resets = &lt;&amp;ccu RST_BUS_CSI&gt;;</div><div class='add'>+</div><div class='add'>+        phys = &lt;&amp;dphy&gt;;</div><div class='add'>+        phy-names = "dphy";</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            mipi_csi2_in: port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_csi2_in_ov5648: endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+</div><div class='add'>+                    remote-endpoint = &lt;&amp;ov5648_out_mipi_csi2&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mipi_csi2_out: port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_csi2_out_csi0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csi0_in_mipi_csi2&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml<br/>index a258832d520c..c2f292dd01ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-de2-rotate.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-de2-rotate.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A83T DE2 Rotate Device Tree Bindings</div><div class='add'>+title: Allwinner A83T DE2 Rotate</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jernej Skrabec &lt;jernej.skrabec@siol.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml<br/>new file mode 100644<br/>index 000000000000..3cac68a87ad7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun8i-a83t-mipi-csi2.yaml</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-mipi-csi2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner A83T MIPI CSI-2</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Kocialkowski &lt;paul.kocialkowski@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: allwinner,sun8i-a83t-mipi-csi2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Bus Clock</div><div class='add'>+      - description: Module Clock</div><div class='add'>+      - description: MIPI-specific Clock</div><div class='add'>+      - description: Misc CSI Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: mod</div><div class='add'>+      - const: mipi</div><div class='add'>+      - const: misc</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        description: Input port, connect to a MIPI CSI-2 sensor</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Output port, connect to a CSI controller</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/sun8i-a83t-ccu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/sun8i-a83t-ccu.h&gt;</div><div class='add'>+</div><div class='add'>+    mipi_csi2: csi@1cb1000 {</div><div class='add'>+        compatible = "allwinner,sun8i-a83t-mipi-csi2";</div><div class='add'>+        reg = &lt;0x01cb1000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;ccu CLK_BUS_CSI&gt;,</div><div class='add'>+                 &lt;&amp;ccu CLK_CSI_SCLK&gt;,</div><div class='add'>+                 &lt;&amp;ccu CLK_MIPI_CSI&gt;,</div><div class='add'>+                 &lt;&amp;ccu CLK_CSI_MISC&gt;;</div><div class='add'>+        clock-names = "bus", "mod", "mipi", "misc";</div><div class='add'>+        resets = &lt;&amp;ccu RST_BUS_CSI&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            mipi_csi2_in: port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_csi2_in_ov8865: endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+</div><div class='add'>+                    remote-endpoint = &lt;&amp;ov8865_out_mipi_csi2&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mipi_csi2_out: port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                mipi_csi2_out_csi: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csi_in_mipi_csi2&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml b/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml<br/>index b80980b1908e..3ccd52164f5b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/allwinner,sun8i-h3-deinterlace.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/allwinner,sun8i-h3-deinterlace.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner H3 Deinterlace Device Tree Bindings</div><div class='add'>+title: Allwinner H3 Deinterlace</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jernej Skrabec &lt;jernej.skrabec@siol.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml b/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml<br/>index bee93bd84771..f23fa6d06ad0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/amlogic,axg-ge2d.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2020 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/amlogic,axg-ge2d.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/amlogic,axg-ge2d.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic GE2D Acceleration Unit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml b/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml<br/>index 5044c4bb94e0..55930f6107c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/amlogic,gx-vdec.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/amlogic,gx-vdec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Video Decoder</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'>   - Maxime Jourdan &lt;mjourdan@baylibre.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml b/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml<br/>index 4432fea32650..377acce93423 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/amlogic,meson-ir-tx.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/amlogic,meson-ir-tx.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/amlogic,meson-ir-tx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson IR transmitter</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,meson6-ir.yaml b/Documentation/devicetree/bindings/media/amlogic,meson6-ir.yaml<br/>new file mode 100644<br/>index 000000000000..3f9fa92703bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,meson6-ir.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/amlogic,meson6-ir.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/amlogic,meson6-ir.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson IR remote control receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - amlogic,meson6-ir</div><div class='add'>+          - amlogic,meson8b-ir</div><div class='add'>+          - amlogic,meson-gxbb-ir</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson-gx-ir</div><div class='add'>+          - const: amlogic,meson-gxbb-ir</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    ir-receiver@c8100480 {</div><div class='add'>+        compatible = "amlogic,meson6-ir";</div><div class='add'>+        reg = &lt;0xc8100480 0x20&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 15 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/atmel,isc.yaml b/Documentation/devicetree/bindings/media/atmel,isc.yaml<br/>index cd6d7af0c768..dc8aba698d78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/atmel,isc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/atmel,isc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/atmel,isc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/atmel,isc.yaml</a></div><div class='hunk'>@@ -45,7 +45,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   port:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='del'>-    unevaluatedProperties: false</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       Input port node, single endpoint describing the input pad.</div><div class='ctx'> </div><div class='hunk'>@@ -77,8 +77,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec-gpio.txt b/Documentation/devicetree/bindings/media/cec-gpio.txt<br/>deleted file mode 100644<br/>index 47e8d73d32a3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec-gpio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec-gpio.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-* HDMI CEC GPIO driver</div><div class='del'>-</div><div class='del'>-The HDMI CEC GPIO module supports CEC implementations where the CEC line</div><div class='del'>-is hooked up to a pull-up GPIO line and - optionally - the HPD line is</div><div class='del'>-hooked up to another GPIO line.</div><div class='del'>-</div><div class='del'>-Please note: the maximum voltage for the CEC line is 3.63V, for the HPD and</div><div class='del'>-5V lines it is 5.3V. So you may need some sort of level conversion circuitry</div><div class='del'>-when connecting them to a GPIO line.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: value must be "cec-gpio".</div><div class='del'>-  - cec-gpios: gpio that the CEC line is connected to. The line should be</div><div class='del'>-    tagged as open drain.</div><div class='del'>-</div><div class='del'>-If the CEC line is associated with an HDMI receiver/transmitter, then the</div><div class='del'>-following property is also required:</div><div class='del'>-</div><div class='del'>-  - hdmi-phandle - phandle to the HDMI controller, see also cec.txt.</div><div class='del'>-</div><div class='del'>-If the CEC line is not associated with an HDMI receiver/transmitter, then</div><div class='del'>-the following property is optional and can be used for debugging HPD changes:</div><div class='del'>-</div><div class='del'>-  - hpd-gpios: gpio that the HPD line is connected to.</div><div class='del'>-</div><div class='del'>-This property is optional and can be used for debugging changes on the 5V line:</div><div class='del'>-</div><div class='del'>-  - v5-gpios: gpio that the 5V line is connected to.</div><div class='del'>-</div><div class='del'>-Example for the Raspberry Pi 3 where the CEC line is connected to</div><div class='del'>-pin 26 aka BCM7 aka CE1 on the GPIO pin header, the HPD line is</div><div class='del'>-connected to pin 11 aka BCM17 and the 5V line is connected to pin</div><div class='del'>-15 aka BCM22 (some level shifter is needed for the HPD and 5V lines!):</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-cec-gpio {</div><div class='del'>-	compatible = "cec-gpio";</div><div class='del'>-	cec-gpios = &lt;&amp;gpio 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;;</div><div class='del'>-	hpd-gpios = &lt;&amp;gpio 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	v5-gpios = &lt;&amp;gpio 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec.txt b/Documentation/devicetree/bindings/media/cec.txt<br/>deleted file mode 100644<br/>index 22d7aae3d3d7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/cec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,8 +0,0 @@</div><div class='del'>-Common bindings for HDMI CEC adapters</div><div class='del'>-</div><div class='del'>-- hdmi-phandle: phandle to the HDMI controller.</div><div class='del'>-</div><div class='del'>-- needs-hpd: if present the CEC support is only available when the HPD</div><div class='del'>-  is high. Some boards only let the CEC pin through if the HPD is high,</div><div class='del'>-  for example if there is a level converter that uses the HPD to power</div><div class='del'>-  up or down.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml b/Documentation/devicetree/bindings/media/cec/amlogic,meson-gx-ao-cec.yaml<br/>index d93aea6a0258..b1fab53418f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/amlogic,meson-gx-ao-cec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec/amlogic,meson-gx-ao-cec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/cec/amlogic,meson-gx-ao-cec.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/amlogic,meson-gx-ao-cec.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/cec/amlogic,meson-gx-ao-cec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson AO-CEC Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Amlogic Meson AO-CEC module is present is Amlogic SoCs and its purpose is</div><div class='hunk'>@@ -33,11 +33,8 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  hdmi-phandle:</div><div class='del'>-    description: phandle to the HDMI controller</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-</div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: cec-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -81,7 +78,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec/cec-common.yaml b/Documentation/devicetree/bindings/media/cec/cec-common.yaml<br/>new file mode 100644<br/>index 000000000000..af6ee5f1c73f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec/cec-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/cec/cec-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/cec/cec-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HDMI CEC Adapters Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hans Verkuil &lt;hverkuil@xs4all.nl&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^cec(@[0-9a-f]+|-[0-9]+)?$"</div><div class='add'>+</div><div class='add'>+  hdmi-phandle:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the HDMI controller.</div><div class='add'>+</div><div class='add'>+  needs-hpd:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      The CEC support is only available when the HPD is high. Some boards only</div><div class='add'>+      let the CEC pin through if the HPD is high, for example if there is a</div><div class='add'>+      level converter that uses the HPD to power up or down.</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml b/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..64d7ec057672<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec/cec-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/cec/cec-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/cec/cec-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HDMI CEC GPIO</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hans Verkuil &lt;hverkuil-cisco@xs4all.nl&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The HDMI CEC GPIO module supports CEC implementations where the CEC line is</div><div class='add'>+  hooked up to a pull-up GPIO line and - optionally - the HPD line is hooked up</div><div class='add'>+  to another GPIO line.</div><div class='add'>+</div><div class='add'>+  Please note:: the maximum voltage for the CEC line is 3.63V, for the HPD and</div><div class='add'>+  5V lines it is 5.3V. So you may need some sort of level conversion</div><div class='add'>+  circuitry when connecting them to a GPIO line.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cec-gpio</div><div class='add'>+</div><div class='add'>+  cec-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO that the CEC line is connected to. The line should be tagged as open</div><div class='add'>+      drain.</div><div class='add'>+</div><div class='add'>+  hpd-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO that the HPD line is connected to.  Used for debugging HPD changes</div><div class='add'>+      when the CEC line is not associated with an HDMI receiver/transmitter.</div><div class='add'>+</div><div class='add'>+  v5-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO that the 5V line is connected to.  Used for debugging changes on the</div><div class='add'>+      5V line.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - cec-gpios</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: cec-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - hdmi-phandle</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        hpd-gpios: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - hpd-gpios</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        hdmi-phandle: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    cec {</div><div class='add'>+        compatible = "cec-gpio";</div><div class='add'>+        cec-gpios = &lt;&amp;gpio 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+        hpd-gpios = &lt;&amp;gpio 17 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        v5-gpios = &lt;&amp;gpio 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml b/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml<br/>new file mode 100644<br/>index 000000000000..369c48fd9bf9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/cec/nvidia,tegra114-cec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra HDMI CEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hans Verkuil &lt;hverkuil-cisco@xs4all.nl&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: cec-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra114-cec</div><div class='add'>+      - nvidia,tegra124-cec</div><div class='add'>+      - nvidia,tegra210-cec</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cec</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - hdmi-phandle</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra124-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    cec@70015000 {</div><div class='add'>+        compatible = "nvidia,tegra124-cec";</div><div class='add'>+        reg = &lt;0x70015000 0x00001000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA124_CLK_CEC&gt;;</div><div class='add'>+        clock-names = "cec";</div><div class='add'>+        status = "disabled";</div><div class='add'>+        hdmi-phandle = &lt;&amp;hdmi&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec/samsung,s5p-cec.yaml b/Documentation/devicetree/bindings/media/cec/samsung,s5p-cec.yaml<br/>new file mode 100644<br/>index 000000000000..016c8a77c1a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec/samsung,s5p-cec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/cec/samsung,s5p-cec.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/cec/samsung,s5p-cec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5PV210 and Exynos HDMI CEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+  - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: cec-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,s5p-cec</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hdmicec</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  samsung,syscon-phandle:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to PMU system controller interface</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - hdmi-phandle</div><div class='add'>+  - interrupts</div><div class='add'>+  - samsung,syscon-phandle</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos5420.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    cec@101b0000 {</div><div class='add'>+        compatible = "samsung,s5p-cec";</div><div class='add'>+        reg = &lt;0x101B0000 0x200&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;clock CLK_HDMI_CEC&gt;;</div><div class='add'>+        clock-names = "hdmicec";</div><div class='add'>+        interrupts = &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        hdmi-phandle = &lt;&amp;hdmi&gt;;</div><div class='add'>+        needs-hpd;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;hdmi_cec&gt;;</div><div class='add'>+        samsung,syscon-phandle = &lt;&amp;pmu_system_controller&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/cec/st,stih-cec.yaml b/Documentation/devicetree/bindings/media/cec/st,stih-cec.yaml<br/>new file mode 100644<br/>index 000000000000..aeddf16ed339<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec/st,stih-cec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/cec/st,stih-cec.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/cec/st,stih-cec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics STIH4xx HDMI CEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alain Volmat &lt;alain.volmat@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: cec-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stih-cec</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cec-clk</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cec-irq</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - hdmi-phandle</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/stih407-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    cec@94a087c {</div><div class='add'>+        compatible = "st,stih-cec";</div><div class='add'>+        reg = &lt;0x94a087c 0x64&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;clk_sysin&gt;;</div><div class='add'>+        clock-names = "cec-clk";</div><div class='add'>+        hdmi-phandle = &lt;&amp;sti_hdmi&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "cec-irq";</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_cec0_default&gt;;</div><div class='add'>+        resets = &lt;&amp;softreset STIH407_LPM_SOFTRESET&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/st,stm32-cec.yaml b/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml<br/>index 77144cc6f7db..2314a9a14650 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/st,stm32-cec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/st,stm32-cec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/cec/st,stm32-cec.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/media/st,stm32-cec.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/media/cec/st,stm32-cec.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 CEC bindings</div><div class='add'>+title: STMicroelectronics STM32 CEC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/coda.yaml b/Documentation/devicetree/bindings/media/coda.yaml<br/>index 36781ee4617f..c9d5adbc8c4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/coda.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/coda.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/coda.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/coda.yaml</a></div><div class='hunk'>@@ -65,7 +65,6 @@ properties:</div><div class='ctx'>   iram:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle pointing to the SRAM device node</div><div class='del'>-    maxItems: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/exynos-fimc-lite.txt b/Documentation/devicetree/bindings/media/exynos-fimc-lite.txt<br/>deleted file mode 100644<br/>index 0bf6fb7fbeab..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/exynos-fimc-lite.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos-fimc-lite.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-Exynos4x12/Exynos5 SoC series camera host interface (FIMC-LITE)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	: should be one of:</div><div class='del'>-		  "samsung,exynos4212-fimc-lite" for Exynos4212/4412 SoCs,</div><div class='del'>-		  "samsung,exynos5250-fimc-lite" for Exynos5250 compatible</div><div class='del'>-		   devices;</div><div class='del'>-- reg		: physical base address and size of the device memory mapped</div><div class='del'>-		  registers;</div><div class='del'>-- interrupts	: should contain FIMC-LITE interrupt;</div><div class='del'>-- clocks	: FIMC LITE gate clock should be specified in this property.</div><div class='del'>-- clock-names	: should contain "flite" entry.</div><div class='del'>-</div><div class='del'>-Each FIMC device should have an alias in the aliases node, in the form of</div><div class='del'>-fimc-lite&lt;n&gt;, where &lt;n&gt; is an integer specifying the IP block instance.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt b/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt<br/>deleted file mode 100644<br/>index ce9a22689e53..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos-jpeg-codec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-Samsung S5P/Exynos SoC series JPEG codec</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	: should be one of:</div><div class='del'>-		  "samsung,s5pv210-jpeg", "samsung,exynos4210-jpeg",</div><div class='del'>-		  "samsung,exynos3250-jpeg", "samsung,exynos5420-jpeg",</div><div class='del'>-		  "samsung,exynos5433-jpeg";</div><div class='del'>-- reg		: address and length of the JPEG codec IP register set;</div><div class='del'>-- interrupts	: specifies the JPEG codec IP interrupt;</div><div class='del'>-- clock-names   : should contain:</div><div class='del'>-		   - "jpeg" for the core gate clock,</div><div class='del'>-		   - "sclk" for the special clock (optional).</div><div class='del'>-- clocks	: should contain the clock specifier and clock ID list</div><div class='del'>-		  matching entries in the clock-names property; from</div><div class='del'>-		  the common clock bindings.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt b/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt<br/>deleted file mode 100644<br/>index 32ced99d4244..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/exynos4-fimc-is.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos4-fimc-is.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,50 +0,0 @@</div><div class='del'>-Exynos4x12 SoC series Imaging Subsystem (FIMC-IS)</div><div class='del'>-</div><div class='del'>-The FIMC-IS is a subsystem for processing image signal from an image sensor.</div><div class='del'>-The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5</div><div class='del'>-processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C</div><div class='del'>-and SPI bus controllers, PWM and ADC.</div><div class='del'>-</div><div class='del'>-fimc-is node</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible	: should be "samsung,exynos4212-fimc-is" for Exynos4212 and</div><div class='del'>-		  Exynos4412 SoCs;</div><div class='del'>-- reg		: physical base address and length of the registers set;</div><div class='del'>-- interrupts	: must contain two FIMC-IS interrupts, in order: ISP0, ISP1;</div><div class='del'>-- clocks	: list of clock specifiers, corresponding to entries in</div><div class='del'>-		  clock-names property;</div><div class='del'>-- clock-names	: must contain "ppmuispx", "ppmuispx", "lite0", "lite1"</div><div class='del'>-		  "mpll", "sysreg", "isp", "drc", "fd", "mcuisp", "gicisp",</div><div class='del'>-		  "pwm_isp", "mcuctl_isp", "uart", "ispdiv0", "ispdiv1",</div><div class='del'>-		  "mcuispdiv0", "mcuispdiv1", "aclk200", "div_aclk200",</div><div class='del'>-		  "aclk400mcuisp", "div_aclk400mcuisp" entries,</div><div class='del'>-		  matching entries in the clocks property.</div><div class='del'>-pmu subnode</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - reg : must contain PMU physical base address and size of the register set.</div><div class='del'>-</div><div class='del'>-The following are the FIMC-IS peripheral device nodes and can be specified</div><div class='del'>-either standalone or as the fimc-is node child nodes.</div><div class='del'>-</div><div class='del'>-i2c-isp (ISP I2C bus controller) nodes</div><div class='del'>-------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	: should be "samsung,exynos4212-i2c-isp" for Exynos4212 and</div><div class='del'>-		  Exynos4412 SoCs;</div><div class='del'>-- reg		: physical base address and length of the registers set;</div><div class='del'>-- clocks	: must contain gate clock specifier for this controller;</div><div class='del'>-- clock-names	: must contain "i2c_isp" entry.</div><div class='del'>-</div><div class='del'>-For the above nodes it is required to specify a pinctrl state named "default",</div><div class='del'>-according to the pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt.</div><div class='del'>-</div><div class='del'>-Device tree nodes of the image sensors' controlled directly by the FIMC-IS</div><div class='del'>-firmware must be child nodes of their corresponding ISP I2C bus controller node.</div><div class='del'>-The data link of these image sensors must be specified using the common video</div><div class='del'>-interfaces bindings, defined in video-interfaces.txt.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/exynos5-gsc.txt b/Documentation/devicetree/bindings/media/exynos5-gsc.txt<br/>deleted file mode 100644<br/>index 1872688fa408..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/exynos5-gsc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/exynos5-gsc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,38 +0,0 @@</div><div class='del'>-* Samsung Exynos5 G-Scaler device</div><div class='del'>-</div><div class='del'>-G-Scaler is used for scaling and color space conversion on Exynos5 SoCs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of</div><div class='del'>-	      "samsung,exynos5250-gsc"</div><div class='del'>-	      "samsung,exynos5420-gsc"</div><div class='del'>-	      "samsung,exynos5433-gsc"</div><div class='del'>-	      "samsung,exynos5-gsc" (deprecated)</div><div class='del'>-- reg: should contain G-Scaler physical address location and length.</div><div class='del'>-- interrupts: should contain G-Scaler interrupt number</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- samsung,sysreg: handle to syscon used to control the system registers to</div><div class='del'>-  set writeback input and destination</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-gsc_0:  gsc@13e00000 {</div><div class='del'>-	compatible = "samsung,exynos5250-gsc";</div><div class='del'>-	reg = &lt;0x13e00000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;0 85 0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Aliases:</div><div class='del'>-Each G-Scaler node should have a numbered alias in the aliases node,</div><div class='del'>-in the form of gscN, N = 0...3. G-Scaler driver uses these aliases</div><div class='del'>-to retrieve the device IDs using "of_alias_get_id()" call.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-aliases {</div><div class='del'>-	gsc0 =&amp;gsc_0;</div><div class='del'>-	gsc1 =&amp;gsc_1;</div><div class='del'>-	gsc2 =&amp;gsc_2;</div><div class='del'>-	gsc3 =&amp;gsc_3;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml b/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml<br/>new file mode 100644<br/>index 000000000000..84a5e894ace4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/fsl,imx6ull-pxp.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Pixel Pipeline</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</div><div class='add'>+  - Michael Tretter &lt;m.tretter@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine</div><div class='add'>+  that supports scaling, colorspace conversion, alpha blending, rotation, and</div><div class='add'>+  pixel conversion via lookup table. Different versions are present on various</div><div class='add'>+  i.MX SoCs from i.MX23 to i.MX7.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx6ul-pxp</div><div class='add'>+          - fsl,imx6ull-pxp</div><div class='add'>+          - fsl,imx7d-pxp</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6sll-pxp</div><div class='add'>+              - fsl,imx6sx-pxp</div><div class='add'>+          - const: fsl,imx6ull-pxp</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: axi</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx6sx-pxp</div><div class='add'>+              - fsl,imx6ul-pxp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 1</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx6ul-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pxp: pxp@21cc000 {</div><div class='add'>+        compatible = "fsl,imx6ull-pxp";</div><div class='add'>+        reg = &lt;0x021cc000 0x4000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clock-names = "axi";</div><div class='add'>+        clocks = &lt;&amp;clks IMX6UL_CLK_PXP&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/fsl-pxp.txt b/Documentation/devicetree/bindings/media/fsl-pxp.txt<br/>deleted file mode 100644<br/>index f8090e06530d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/fsl-pxp.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/fsl-pxp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Freescale Pixel Pipeline</div><div class='del'>-========================</div><div class='del'>-</div><div class='del'>-The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine</div><div class='del'>-that supports scaling, colorspace conversion, alpha blending, rotation, and</div><div class='del'>-pixel conversion via lookup table. Different versions are present on various</div><div class='del'>-i.MX SoCs from i.MX23 to i.MX7.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "fsl,&lt;soc&gt;-pxp", where SoC can be one of imx23, imx28,</div><div class='del'>-  imx6dl, imx6sl, imx6sll, imx6ul, imx6sx, imx6ull, or imx7d.</div><div class='del'>-- reg: the register base and size for the device registers</div><div class='del'>-- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d.</div><div class='del'>-- clock-names: should be "axi"</div><div class='del'>-- clocks: the PXP AXI clock</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-pxp@21cc000 {</div><div class='del'>-	compatible = "fsl,imx6ull-pxp";</div><div class='del'>-	reg = &lt;0x021cc000 0x4000&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clock-names = "axi";</div><div class='del'>-	clocks = &lt;&amp;clks IMX6UL_CLK_PXP&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt b/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt<br/>deleted file mode 100644<br/>index 108bf435b933..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/gpio-ir-receiver.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-Device-Tree bindings for GPIO IR receiver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: should be "gpio-ir-receiver".</div><div class='del'>-	- gpios: specifies GPIO used for IR signal reception.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- linux,rc-map-name: see rc.txt file in the same</div><div class='del'>-	  directory.</div><div class='del'>-	- linux,autosuspend-period: autosuspend delay time,</div><div class='del'>-	  the unit is milisecond.</div><div class='del'>-</div><div class='del'>-Example node:</div><div class='del'>-</div><div class='del'>-	ir: ir-receiver {</div><div class='del'>-		compatible = "gpio-ir-receiver";</div><div class='del'>-		gpios = &lt;&amp;gpio0 19 1&gt;;</div><div class='del'>-		linux,rc-map-name = "rc-rc6-mce";</div><div class='del'>-		linux,autosuspend-period = &lt;125&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/gpio-ir-receiver.yaml b/Documentation/devicetree/bindings/media/gpio-ir-receiver.yaml<br/>new file mode 100644<br/>index 000000000000..008c007ed702<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/gpio-ir-receiver.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/gpio-ir-receiver.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/gpio-ir-receiver.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO Based IR receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sebastian Hesselbarth &lt;sebastian.hesselbarth@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: gpio-ir-receiver</div><div class='add'>+</div><div class='add'>+  gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  linux,autosuspend-period:</div><div class='add'>+    description: autosuspend delay time in milliseconds</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    description: IR receiver can wake-up the system.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ir-receiver {</div><div class='add'>+        compatible = "gpio-ir-receiver";</div><div class='add'>+        gpios = &lt;&amp;gpio0 19 1&gt;;</div><div class='add'>+        linux,rc-map-name = "rc-rc6-mce";</div><div class='add'>+        linux,autosuspend-period = &lt;125&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/adv7604.yaml b/Documentation/devicetree/bindings/media/i2c/adv7604.yaml<br/>index c19d8391e2d5..7589d377c686 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/adv7604.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/adv7604.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/adv7604.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/adv7604.yaml</a></div><div class='hunk'>@@ -60,7 +60,8 @@ properties:</div><div class='ctx'>       enables hot-plug detection.</div><div class='ctx'> </div><div class='ctx'>   default-input:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1 ]</div><div class='ctx'>     description:</div><div class='ctx'>       Select which input is selected after reset.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ak7375.txt b/Documentation/devicetree/bindings/media/i2c/ak7375.txt<br/>deleted file mode 100644<br/>index aa3e24b41241..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ak7375.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ak7375.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,8 +0,0 @@</div><div class='del'>-Asahi Kasei Microdevices AK7375 voice coil lens driver</div><div class='del'>-</div><div class='del'>-AK7375 is a camera voice coil lens.</div><div class='del'>-</div><div class='del'>-Mandatory properties:</div><div class='del'>-</div><div class='del'>-- compatible: "asahi-kasei,ak7375"</div><div class='del'>-- reg: I2C slave address</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml b/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml<br/>index c2ba78116dbb..be00de2f2d58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/aptina,mt9p031.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - aptina,mt9p006</div><div class='ctx'>       - aptina,mt9p031</div><div class='ctx'>       - aptina,mt9p031m</div><div class='ctx'> </div><div class='hunk'>@@ -81,7 +82,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml b/Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml<br/>index e53b8d65f381..088022f88010 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/aptina,mt9v111.yaml</a></div><div class='hunk'>@@ -55,7 +55,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml b/Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml<br/>new file mode 100644<br/>index 000000000000..22a810fc7222<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/asahi-kasei,ak7375.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/asahi-kasei,ak7375.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Asahi Kasei Microdevices AK7375 voice coil lens actuator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tianshu Qiu &lt;tian.shu.qiu@intel.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  AK7375 is a voice coil motor (VCM) camera lens actuator that</div><div class='add'>+  is controlled over I2C.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: asahi-kasei,ak7375</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: VDD supply</div><div class='add'>+</div><div class='add'>+  vio-supply:</div><div class='add'>+    description: I/O pull-up supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - vio-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ak7375: camera-lens@c {</div><div class='add'>+            compatible = "asahi-kasei,ak7375";</div><div class='add'>+            reg = &lt;0x0c&gt;;</div><div class='add'>+</div><div class='add'>+            vdd-supply = &lt;&amp;vreg_l23a_2p8&gt;;</div><div class='add'>+            vio-supply = &lt;&amp;vreg_lvs1a_1p8&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml b/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml<br/>index 63e5b89d2e0b..4e69b6a7ffcc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/i2c/chrontel,ch7322.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/chrontel,ch7322.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Chrontel HDMI-CEC Controller</div><div class='ctx'> </div><div class='hunk'>@@ -13,6 +13,9 @@ description:</div><div class='ctx'>   The Chrontel CH7322 is a discrete HDMI-CEC controller. It is</div><div class='ctx'>   programmable through I2C and drives a single CEC line.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/cec/cec-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: chrontel,ch7322</div><div class='hunk'>@@ -40,16 +43,12 @@ properties:</div><div class='ctx'>       if in auto mode.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  # see ../cec.txt</div><div class='del'>-  hdmi-phandle:</div><div class='del'>-    description: phandle to the HDMI controller</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -58,7 +57,7 @@ examples:</div><div class='ctx'>     i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='del'>-      ch7322@75 {</div><div class='add'>+      cec@75 {</div><div class='ctx'>         compatible = "chrontel,ch7322";</div><div class='ctx'>         reg = &lt;0x75&gt;;</div><div class='ctx'>         interrupts = &lt;47 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.txt b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.txt<br/>deleted file mode 100644<br/>index b88dcdd41def..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,9 +0,0 @@</div><div class='del'>-Dongwoon Anatech DW9714 camera voice coil lens driver</div><div class='del'>-</div><div class='del'>-DW9174 is a 10-bit DAC with current sink capability. It is intended</div><div class='del'>-for driving voice coil lenses in camera modules.</div><div class='del'>-</div><div class='del'>-Mandatory properties:</div><div class='del'>-</div><div class='del'>-- compatible: "dongwoon,dw9714"</div><div class='del'>-- reg: I²C slave address</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.yaml b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.yaml<br/>new file mode 100644<br/>index 000000000000..66229a3dc05d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9714.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9714.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Dongwoon Anatech DW9714 camera voice coil lens driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  DW9174 is a 10-bit DAC with current sink capability. It is intended for</div><div class='add'>+  driving voice coil lenses in camera modules.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: dongwoon,dw9714</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  powerdown-gpios:</div><div class='add'>+    description:</div><div class='add'>+      XSD pin for shutdown (active low)</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description: VDD power supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        camera-lens@c {</div><div class='add'>+            compatible = "dongwoon,dw9714";</div><div class='add'>+            reg = &lt;0x0c&gt;;</div><div class='add'>+            vcc-supply = &lt;&amp;reg_csi_1v8&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml<br/>index 21864ab86ec4..a0855d3b7577 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9768.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9768.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Dongwoon Anatech DW9768 Voice Coil Motor (VCM) Lens Device Tree Bindings</div><div class='add'>+title: Dongwoon Anatech DW9768 Voice Coil Motor (VCM) Lens</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dongchun Zhu &lt;dongchun.zhu@mediatek.com&gt;</div><div class='hunk'>@@ -38,7 +38,7 @@ properties:</div><div class='ctx'>   dongwoon,aac-mode:</div><div class='ctx'>     description:</div><div class='ctx'>       Indication of AAC mode select.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum:</div><div class='ctx'>       - 1    #  AAC2 mode(operation time# 0.48 x Tvib)</div><div class='ctx'>       - 2    #  AAC3 mode(operation time# 0.70 x Tvib)</div><div class='hunk'>@@ -50,7 +50,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Number of AAC Timing count that controlled by one 6-bit period of</div><div class='ctx'>       vibration register AACT[5:0], the unit of which is 100 us.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     default: 0x20</div><div class='ctx'>     minimum: 0x00</div><div class='ctx'>     maximum: 0x3f</div><div class='hunk'>@@ -59,7 +59,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Indication of VCM internal clock dividing rate select, as one multiple</div><div class='ctx'>       factor to calculate VCM ring periodic time Tvib.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum:</div><div class='ctx'>       - 0    #  Dividing Rate -  2</div><div class='ctx'>       - 1    #  Dividing Rate -  1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt<br/>deleted file mode 100644<br/>index c4701f1eaaf6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,9 +0,0 @@</div><div class='del'>-Dongwoon Anatech DW9807 voice coil lens driver</div><div class='del'>-</div><div class='del'>-DW9807 is a 10-bit DAC with current sink capability. It is intended for</div><div class='del'>-controlling voice coil lenses.</div><div class='del'>-</div><div class='del'>-Mandatory properties:</div><div class='del'>-</div><div class='del'>-- compatible: "dongwoon,dw9807-vcm"</div><div class='del'>-- reg: I2C slave address</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml b/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml<br/>new file mode 100644<br/>index 000000000000..aae246ca3fcf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2018, 2021 Intel Corporation</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/dongwoon,dw9807-vcm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Dongwoon Anatech DW9807 voice coil lens driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sakari Ailus &lt;sakari.ailus@linux.intel.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  DW9807 is a 10-bit DAC with current sink capability. It is intended for</div><div class='add'>+  controlling voice coil lenses.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: dongwoon,dw9807-vcm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        lens@e {</div><div class='add'>+            compatible = "dongwoon,dw9807-vcm";</div><div class='add'>+            reg = &lt;0x0e&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/imx219.yaml b/Documentation/devicetree/bindings/media/i2c/imx219.yaml<br/>index 5fc96944b448..07d088cf66e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/imx219.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/imx219.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/imx219.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/imx219.yaml</a></div><div class='hunk'>@@ -83,7 +83,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/imx258.yaml b/Documentation/devicetree/bindings/media/i2c/imx258.yaml<br/>index cde0f7383b2a..80d24220baa0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/imx258.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/imx258.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/imx258.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/imx258.yaml</a></div><div class='hunk'>@@ -84,7 +84,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -111,7 +111,7 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/imx290.txt b/Documentation/devicetree/bindings/media/i2c/imx290.txt<br/>deleted file mode 100644<br/>index a3cc21410f7c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/imx290.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/imx290.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,57 +0,0 @@</div><div class='del'>-* Sony IMX290 1/2.8-Inch CMOS Image Sensor</div><div class='del'>-</div><div class='del'>-The Sony IMX290 is a 1/2.8-Inch CMOS Solid-state image sensor with</div><div class='del'>-Square Pixel for Color Cameras. It is programmable through I2C and 4-wire</div><div class='del'>-interfaces. The sensor output is available via CMOS logic parallel SDR output,</div><div class='del'>-Low voltage LVDS DDR output and CSI-2 serial data output. The CSI-2 bus is the</div><div class='del'>-default. No bindings have been defined for the other busses.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: Should be "sony,imx290"</div><div class='del'>-- reg: I2C bus address of the device</div><div class='del'>-- clocks: Reference to the xclk clock.</div><div class='del'>-- clock-names: Should be "xclk".</div><div class='del'>-- clock-frequency: Frequency of the xclk clock in Hz.</div><div class='del'>-- vdddo-supply: Sensor digital IO regulator.</div><div class='del'>-- vdda-supply: Sensor analog regulator.</div><div class='del'>-- vddd-supply: Sensor digital core regulator.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- reset-gpios: Sensor reset GPIO</div><div class='del'>-</div><div class='del'>-The imx290 device node should contain one 'port' child node with</div><div class='del'>-an 'endpoint' subnode. For further reading on port node refer to</div><div class='del'>-Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='del'>-</div><div class='del'>-Required Properties on endpoint:</div><div class='del'>-- data-lanes: check ../video-interfaces.txt</div><div class='del'>-- link-frequencies: check ../video-interfaces.txt</div><div class='del'>-- remote-endpoint: check ../video-interfaces.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	&amp;i2c1 {</div><div class='del'>-		...</div><div class='del'>-		imx290: camera-sensor@1a {</div><div class='del'>-			compatible = "sony,imx290";</div><div class='del'>-			reg = &lt;0x1a&gt;;</div><div class='del'>-</div><div class='del'>-			reset-gpios = &lt;&amp;msmgpio 35 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;camera_rear_default&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_CAMSS_MCLK0_CLK&gt;;</div><div class='del'>-			clock-names = "xclk";</div><div class='del'>-			clock-frequency = &lt;37125000&gt;;</div><div class='del'>-</div><div class='del'>-			vdddo-supply = &lt;&amp;camera_vdddo_1v8&gt;;</div><div class='del'>-			vdda-supply = &lt;&amp;camera_vdda_2v8&gt;;</div><div class='del'>-			vddd-supply = &lt;&amp;camera_vddd_1v5&gt;;</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				imx290_ep: endpoint {</div><div class='del'>-					data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-					link-frequencies = /bits/ 64 &lt;445500000&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;csiphy0_ep&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml b/Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml<br/>index 90315e217003..a37447256f8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml</a></div><div class='hunk'>@@ -39,7 +39,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   poc-supply:</div><div class='del'>-    description: Regulator providing Power over Coax to the cameras</div><div class='add'>+    description: Regulator providing Power over Coax to all the ports</div><div class='ctx'> </div><div class='ctx'>   enable-gpios:</div><div class='ctx'>     description: GPIO connected to the \#PWDN pin with inverted polarity</div><div class='hunk'>@@ -50,6 +50,21 @@ properties:</div><div class='ctx'>   '#gpio-cells':</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='add'>+  maxim,bus-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 24, 27, 32 ]</div><div class='add'>+    description: |</div><div class='add'>+      The GMSL serial data bus width. This setting is normally controlled by</div><div class='add'>+      the BWS pin, but may be overridden with this property. The value must</div><div class='add'>+      match the configuration of the remote serializers.</div><div class='add'>+</div><div class='add'>+  maxim,i2c-remote-bus-hz:</div><div class='add'>+    enum: [ 8470, 28300, 84700, 105000, 173000, 339000, 533000, 837000 ]</div><div class='add'>+    default: 105000</div><div class='add'>+    description: |</div><div class='add'>+      The I2C clock frequency for the remote I2C buses. The value must match</div><div class='add'>+      the configuration of the remote serializers.</div><div class='add'>+</div><div class='ctx'>   maxim,reverse-channel-microvolt:</div><div class='ctx'>     minimum: 30000</div><div class='ctx'>     maximum: 200000</div><div class='hunk'>@@ -71,7 +86,7 @@ properties:</div><div class='ctx'>       is 100000 micro volts</div><div class='ctx'> </div><div class='ctx'>   maxim,gpio-poc:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -141,6 +156,7 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^i2c@[0-3]$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>           Child node of the i2c bus multiplexer which represents a GMSL link.</div><div class='ctx'>           Each serializer device on the GMSL link remote end is represented with</div><div class='hunk'>@@ -152,6 +168,12 @@ properties:</div><div class='ctx'>             description: The index of the GMSL channel.</div><div class='ctx'>             maxItems: 1</div><div class='ctx'> </div><div class='add'>+          '#address-cells':</div><div class='add'>+            const: 1</div><div class='add'>+</div><div class='add'>+          '#size-cells':</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='ctx'>         patternProperties:</div><div class='ctx'>           "^camera@[a-f0-9]+$":</div><div class='ctx'>             type: object</div><div class='hunk'>@@ -182,21 +204,36 @@ properties:</div><div class='ctx'> </div><div class='ctx'>             additionalProperties: false</div><div class='ctx'> </div><div class='add'>+patternProperties:</div><div class='add'>+  "^port[0-3]-poc-supply$":</div><div class='add'>+    description: Regulator providing Power over Coax for a particular port</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - ports</div><div class='ctx'>   - i2c-mux</div><div class='ctx'> </div><div class='del'>-# If 'maxim,gpio-poc' is present, then 'poc-supply' and 'gpio-controller'</div><div class='del'>-# are not allowed.</div><div class='del'>-if:</div><div class='del'>-  required:</div><div class='del'>-    - maxim,gpio-poc</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    poc-supply: false</div><div class='del'>-    gpio-controller: false</div><div class='add'>+allOf:</div><div class='add'>+  # Only one way of specifying power supplies is allowed: 'maxim,gpio-poc',</div><div class='add'>+  # 'poc-supply' or per-port poc-supply. Additionally, if 'maxim,gpio-poc' is</div><div class='add'>+  # present, then 'gpio-controller' isn't allowed.</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - maxim,gpio-poc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        poc-supply: false</div><div class='add'>+        gpio-controller: false</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^port[0-3]-poc-supply$": false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - poc-supply</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^port[0-3]-poc-supply$": false</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -219,6 +256,7 @@ examples:</div><div class='ctx'>             gpio-controller;</div><div class='ctx'>             #gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+            maxim,i2c-remote-bus-hz = &lt;339000&gt;;</div><div class='ctx'>             maxim,reverse-channel-microvolt = &lt;170000&gt;;</div><div class='ctx'> </div><div class='ctx'>             ports {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml b/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml<br/>index 39395ea8c318..f8ace8cbccdb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/mipi-ccs.yaml</a></div><div class='hunk'>@@ -104,8 +104,9 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c2 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -124,7 +125,7 @@ examples:</div><div class='ctx'>                     remote-endpoint = &lt;&amp;csi2a_ep&gt;;</div><div class='ctx'>                     link-frequencies = /bits/ 64 &lt;199200000 210000000</div><div class='ctx'>                                                   499200000&gt;;</div><div class='del'>-                    bus-type = &lt;4&gt;;</div><div class='add'>+                    bus-type = &lt;MEDIA_BUS_TYPE_CSI2_DPHY&gt;;</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/onnn,ar0521.yaml b/Documentation/devicetree/bindings/media/i2c/onnn,ar0521.yaml<br/>new file mode 100644<br/>index 000000000000..b617cc5c6a9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/onnn,ar0521.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/onnn,ar0521.yaml</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/onnn,ar0521.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ON Semiconductor AR0521 MIPI CSI-2 sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Hałasa &lt;khalasa@piap.pl&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The AR0521 is a raw CMOS image sensor with MIPI CSI-2 and</div><div class='add'>+  I2C-compatible control interface.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: onnn,ar0521</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: extclk</div><div class='add'>+</div><div class='add'>+  vaa-supply:</div><div class='add'>+    description:</div><div class='add'>+      Definition of the regulator used as analog (2.7 V) voltage supply.</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Definition of the regulator used as digital core (1.2 V) voltage supply.</div><div class='add'>+</div><div class='add'>+  vdd_io-supply:</div><div class='add'>+    description:</div><div class='add'>+      Definition of the regulator used as digital I/O (1.8 V) voltage supply.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: reset GPIO, usually active low</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: |</div><div class='add'>+      Video output port.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          bus-type:</div><div class='add'>+            const: 4</div><div class='add'>+          data-lanes:</div><div class='add'>+            anyOf:</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - vaa-supply</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - vdd_io-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ar0521: camera-sensor@36 {</div><div class='add'>+                    compatible = "onnn,ar0521";</div><div class='add'>+                    reg = &lt;0x36&gt;;</div><div class='add'>+                    pinctrl-names = "default";</div><div class='add'>+                    pinctrl-0 = &lt;&amp;pinctrl_mipi_camera&gt;;</div><div class='add'>+                    clocks = &lt;&amp;clks IMX6QDL_CLK_CKO&gt;;</div><div class='add'>+                    clock-names = "extclk";</div><div class='add'>+                    reset-gpios = &lt;&amp;gpio1 7 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+                    vaa-supply = &lt;&amp;reg_2p7v&gt;;</div><div class='add'>+                    vdd-supply = &lt;&amp;reg_1p2v&gt;;</div><div class='add'>+                    vdd_io-supply = &lt;&amp;reg_1p8v&gt;;</div><div class='add'>+</div><div class='add'>+                    port {</div><div class='add'>+                           mipi_camera_to_mipi_csi2: endpoint {</div><div class='add'>+                                    remote-endpoint = &lt;&amp;mipi_csi2_in&gt;;</div><div class='add'>+                                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov2685.txt b/Documentation/devicetree/bindings/media/i2c/ov2685.txt<br/>deleted file mode 100644<br/>index 625c4a8c0d53..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ov2685.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ov2685.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-* Omnivision OV2685 MIPI CSI-2 sensor</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: shall be "ovti,ov2685"</div><div class='del'>-- clocks: reference to the xvclk input clock</div><div class='del'>-- clock-names: shall be "xvclk"</div><div class='del'>-- avdd-supply: Analog voltage supply, 2.8 volts</div><div class='del'>-- dovdd-supply: Digital I/O voltage supply, 1.8 volts</div><div class='del'>-- dvdd-supply: Digital core voltage supply, 1.8 volts</div><div class='del'>-- reset-gpios: Low active reset gpio</div><div class='del'>-</div><div class='del'>-The device node shall contain one 'port' child node with an</div><div class='del'>-'endpoint' subnode for its digital output video port,</div><div class='del'>-in accordance with the video interface bindings defined in</div><div class='del'>-Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='del'>-The endpoint optional property 'data-lanes' shall be "&lt;1&gt;".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-&amp;i2c7 {</div><div class='del'>-	ov2685: camera-sensor@3c {</div><div class='del'>-		compatible = "ovti,ov2685";</div><div class='del'>-		reg = &lt;0x3c&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;clk_24m_cam&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_TESTCLKOUT1&gt;;</div><div class='del'>-		clock-names = "xvclk";</div><div class='del'>-</div><div class='del'>-		avdd-supply = &lt;&amp;pp2800_cam&gt;;</div><div class='del'>-		dovdd-supply = &lt;&amp;pp1800&gt;;</div><div class='del'>-		dvdd-supply = &lt;&amp;pp1800&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		port {</div><div class='del'>-			ucam_out: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='del'>-				data-lanes = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov5645.txt b/Documentation/devicetree/bindings/media/i2c/ov5645.txt<br/>deleted file mode 100644<br/>index 72ad992f77be..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ov5645.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ov5645.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-* Omnivision 1/4-Inch 5Mp CMOS Digital Image Sensor</div><div class='del'>-</div><div class='del'>-The Omnivision OV5645 is a 1/4-Inch CMOS active pixel digital image sensor with</div><div class='del'>-an active array size of 2592H x 1944V. It is programmable through a serial I2C</div><div class='del'>-interface.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: Value should be "ovti,ov5645".</div><div class='del'>-- clocks: Reference to the xclk clock.</div><div class='del'>-- clock-names: Should be "xclk".</div><div class='del'>-- clock-frequency: Frequency of the xclk clock.</div><div class='del'>-- enable-gpios: Chip enable GPIO. Polarity is GPIO_ACTIVE_HIGH. This corresponds</div><div class='del'>-  to the hardware pin PWDNB which is physically active low.</div><div class='del'>-- reset-gpios: Chip reset GPIO. Polarity is GPIO_ACTIVE_LOW. This corresponds to</div><div class='del'>-  the hardware pin RESETB.</div><div class='del'>-- vdddo-supply: Chip digital IO regulator.</div><div class='del'>-- vdda-supply: Chip analog regulator.</div><div class='del'>-- vddd-supply: Chip digital core regulator.</div><div class='del'>-</div><div class='del'>-The device node must contain one 'port' child node for its digital output</div><div class='del'>-video port, in accordance with the video interface bindings defined in</div><div class='del'>-Documentation/devicetree/bindings/media/video-interfaces.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	&amp;i2c1 {</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-		ov5645: ov5645@3c {</div><div class='del'>-			compatible = "ovti,ov5645";</div><div class='del'>-			reg = &lt;0x3c&gt;;</div><div class='del'>-</div><div class='del'>-			enable-gpios = &lt;&amp;gpio1 6 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;gpio5 20 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;camera_rear_default&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;clks 200&gt;;</div><div class='del'>-			clock-names = "xclk";</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-</div><div class='del'>-			vdddo-supply = &lt;&amp;camera_dovdd_1v8&gt;;</div><div class='del'>-			vdda-supply = &lt;&amp;camera_avdd_2v8&gt;;</div><div class='del'>-			vddd-supply = &lt;&amp;camera_dvdd_1v2&gt;;</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				ov5645_ep: endpoint {</div><div class='del'>-					clock-lanes = &lt;1&gt;;</div><div class='del'>-					data-lanes = &lt;0 2&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;csi0_ep&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ov8856.yaml b/Documentation/devicetree/bindings/media/i2c/ov8856.yaml<br/>index baf92aaaf049..57f5e48fd8e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ov8856.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ov8856.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ov8856.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ov8856.yaml</a></div><div class='hunk'>@@ -5,10 +5,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/i2c/ov8856.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Omnivision OV8856 CMOS Sensor Device Tree Bindings</div><div class='add'>+title: Omnivision OV8856 CMOS Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dongchun Zhu &lt;dongchun.zhu@mediatek.com&gt;</div><div class='add'>+  - Sakari Ailus &lt;sakari.ailus@linux.intel.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |-</div><div class='ctx'>   The Omnivision OV8856 is a high performance, 1/4-inch, 8 megapixel, CMOS</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml<br/>index 63a040944f3d..763cebe03dc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov02a10.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/i2c/ovti,ov02a10.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Omnivision OV02A10 CMOS Sensor Device Tree Bindings</div><div class='add'>+title: Omnivision OV02A10 CMOS Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dongchun Zhu &lt;dongchun.zhu@mediatek.com&gt;</div><div class='hunk'>@@ -88,7 +88,7 @@ properties:</div><div class='ctx'>         properties:</div><div class='ctx'>           link-frequencies: true</div><div class='ctx'>           ovti,mipi-clock-voltage:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             description:</div><div class='ctx'>               Definition of MIPI clock voltage unit. This entry corresponds to</div><div class='ctx'>               the link speed defined by the 'link-frequencies' property.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml<br/>new file mode 100644<br/>index 000000000000..e2ffe0a9c26b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov2685.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: OmniVision OV2685 Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shunqian Zheng &lt;zhengsq@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ovti,ov2685</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XVCLK clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xvclk</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital Domain Power Supply</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog Domain Power Supply</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description: I/O Domain Power Supply</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Reset Pin GPIO Control (active low)</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    description: MIPI CSI-2 transmitter port</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - dvdd-supply</div><div class='add'>+  - avdd-supply</div><div class='add'>+  - dovdd-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ov2685: camera-sensor@3c {</div><div class='add'>+            compatible = "ovti,ov2685";</div><div class='add'>+            reg = &lt;0x3c&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;clk_24m_cam&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;cru SCLK_TESTCLKOUT1&gt;;</div><div class='add'>+            clock-names = "xvclk";</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;pp2800_cam&gt;;</div><div class='add'>+            dovdd-supply = &lt;&amp;pp1800&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;pp1800&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio2 3 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ucam_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='add'>+                    data-lanes = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov4689.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov4689.yaml<br/>new file mode 100644<br/>index 000000000000..50579c947f3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov4689.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov4689.yaml</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov4689.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Omnivision OV4689 CMOS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Mikhail Rudenko &lt;mike.rudenko@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Omnivision OV4689 is a high performance, 1/3-inch, 4 megapixel</div><div class='add'>+  image sensor. Ihis chip supports high frame rate speeds up to 90 fps</div><div class='add'>+  at 2688x1520 resolution. It is programmable through an I2C</div><div class='add'>+  interface, and sensor output is sent via 1/2/4 lane MIPI CSI-2</div><div class='add'>+  connection.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/video-interface-devices.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ovti,ov4689</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      External clock (XVCLK) for the sensor, 6-64 MHz</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Digital I/O voltage supply, 1.7-3.0 V</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Analog voltage supply, 2.6-3.0 V</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Digital core voltage supply, 1.1-1.3 V</div><div class='add'>+</div><div class='add'>+  powerdown-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO connected to the powerdown pin (active low)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO connected to the reset pin (active low)</div><div class='add'>+</div><div class='add'>+  orientation: true</div><div class='add'>+</div><div class='add'>+  rotation: true</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Output port node, single endpoint describing the CSI-2 transmitter</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            oneOf:</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+          link-frequencies: true</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+          - link-frequencies</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - dovdd-supply</div><div class='add'>+  - avdd-supply</div><div class='add'>+  - dvdd-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ov4689: camera@36 {</div><div class='add'>+            compatible = "ovti,ov4689";</div><div class='add'>+            reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;ov4689_clk&gt;;</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;ov4689_avdd&gt;;</div><div class='add'>+            dovdd-supply = &lt;&amp;ov4689_dovdd&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;ov4689_dvdd&gt;;</div><div class='add'>+</div><div class='add'>+            powerdown-gpios = &lt;&amp;pio 107 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;pio 109 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            orientation = &lt;2&gt;;</div><div class='add'>+            rotation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                wcam_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_in_wcam&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;504000000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml<br/>index 540fd69ac39f..a621032f9bd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov5640.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/i2c/ovti,ov5640.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: OmniVision OV5640 Image Sensor Device Tree Bindings</div><div class='add'>+title: OmniVision OV5640 Image Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Steve Longerbeam &lt;slongerbeam@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml<br/>new file mode 100644<br/>index 000000000000..bc9b27afe3ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov5645.yaml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov5645.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: OmniVision OV5645 Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ovti,ov5645</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: XCLK Input Clock</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: Frequency of the xclk clock in Hz.</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description: Analog voltage supply, 2.8 volts</div><div class='add'>+</div><div class='add'>+  vddd-supply:</div><div class='add'>+    description: Digital core voltage supply, 1.5 volts</div><div class='add'>+</div><div class='add'>+  vdddo-supply:</div><div class='add'>+    description: Digital I/O voltage supply, 1.8 volts</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Reference to the GPIO connected to the PWDNB pin, if any.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Reference to the GPIO connected to the RESETB pin, if any.</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    description: Digital Output Port</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+            items:</div><div class='add'>+              enum: [1, 2]</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - vdddo-supply</div><div class='add'>+  - vdda-supply</div><div class='add'>+  - vddd-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        camera@3c {</div><div class='add'>+            compatible = "ovti,ov5645";</div><div class='add'>+            reg = &lt;0x3c&gt;;</div><div class='add'>+            clocks = &lt;&amp;clks 1&gt;;</div><div class='add'>+            clock-frequency = &lt;24000000&gt;;</div><div class='add'>+            vdddo-supply = &lt;&amp;ov5645_vdddo_1v8&gt;;</div><div class='add'>+            vdda-supply = &lt;&amp;ov5645_vdda_2v8&gt;;</div><div class='add'>+            vddd-supply = &lt;&amp;ov5645_vddd_1v5&gt;;</div><div class='add'>+            enable-gpios = &lt;&amp;gpio1 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio1 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pinctrl_ov5645&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ov5645_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csi0_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml<br/>index 246dc5fec716..1f497679168c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov5648.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/i2c/ovti,ov5648.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: OmniVision OV5648 Image Sensor Device Tree Bindings</div><div class='add'>+title: OmniVision OV5648 Image Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Kocialkowski &lt;paul.kocialkowski@bootlin.com&gt;</div><div class='hunk'>@@ -81,7 +81,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/sun8i-v3s-ccu.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5670.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5670.yaml<br/>new file mode 100644<br/>index 000000000000..6e089fe1d613<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5670.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov5670.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov5670.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Omnivision OV5670 5 Megapixels raw image sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jacopo Mondi &lt;jacopo.mondi@ideasonboard.com&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The OV5670 is a 5 Megapixels raw image sensor which provides images in 10-bits</div><div class='add'>+  RAW BGGR Bayer format on a 2 data lanes MIPI CSI-2 serial interface and is</div><div class='add'>+  controlled through an I2C compatible control bus.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ovti,ov5670</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: System clock. From 6 to 27 MHz.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  powerdown-gpios:</div><div class='add'>+    description: Reference to the GPIO connected to the PWDNB pin. Active low.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Reference to the GPIO connected to the XSHUTDOWN pin. Active low.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog circuit power. Typically 2.8V.</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital circuit power. Typically 1.2V.</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description: Digital I/O circuit power. Typically 2.8V or 1.8V.</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+            items:</div><div class='add'>+              enum: [1, 2]</div><div class='add'>+</div><div class='add'>+          clock-noncontinuous: true</div><div class='add'>+          remote-endpoint: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ov5670: sensor@36 {</div><div class='add'>+            compatible = "ovti,ov5670";</div><div class='add'>+            reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;sensor_xclk&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ov5670_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csi_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                    clock-noncontinuous;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5675.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5675.yaml<br/>new file mode 100644<br/>index 000000000000..ad07204057f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5675.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov5675.yaml</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov5675.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Omnivision OV5675 CMOS Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/video-interface-devices.yaml#</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Omnivision OV5675 is a high performance, 1/5-inch, 5 megapixel, CMOS</div><div class='add'>+  image sensor that delivers 2592x1944 at 30fps. It provides full-frame,</div><div class='add'>+  sub-sampled, and windowed 10-bit MIPI images in various formats via the</div><div class='add'>+  Serial Camera Control Bus (SCCB) interface.</div><div class='add'>+</div><div class='add'>+  This chip is programmable through I2C and two-wire SCCB. The sensor output</div><div class='add'>+  is available via CSI-2 serial data output (up to 2-lane).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ovti,ov5675</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      System input clock (aka XVCLK). From 6 to 27 MHz.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Digital I/O voltage supply, 1.8 volts.</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Analog voltage supply, 2.8 volts.</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Digital core voltage supply, 1.2 volts.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      The phandle and specifier for the GPIO that controls sensor reset.</div><div class='add'>+      This corresponds to the hardware pin XSHUTDN which is physically</div><div class='add'>+      active low.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+</div><div class='add'>+          # Supports max data transfer of 900 Mbps per lane</div><div class='add'>+          link-frequencies: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - dovdd-supply</div><div class='add'>+  - avdd-supply</div><div class='add'>+  - dvdd-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/px30-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ov5675: camera@36 {</div><div class='add'>+            compatible = "ovti,ov5675";</div><div class='add'>+            reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;cif_clkout_m0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+            assigned-clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;vcc_1v2&gt;;</div><div class='add'>+            dovdd-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+            rotation = &lt;90&gt;;</div><div class='add'>+            orientation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ucam_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;450000000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml<br/>new file mode 100644<br/>index 000000000000..359dc08440a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov5693.yaml</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2022 Amarulasolutions</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov5693.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Omnivision OV5693 CMOS Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tommaso Merciai &lt;tommaso.merciai@amarulasolutions.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Omnivision OV5693 is a high performance, 1/4-inch, 5 megapixel, CMOS</div><div class='add'>+  image sensor that delivers 2592x1944 at 30fps. It provides full-frame,</div><div class='add'>+  sub-sampled, and windowed 10-bit MIPI images in various formats via the</div><div class='add'>+  Serial Camera Control Bus (SCCB) interface.</div><div class='add'>+</div><div class='add'>+  OV5693 is controlled via I2C and two-wire Serial Camera Control Bus (SCCB).</div><div class='add'>+  The sensor output is available via CSI-2 serial data output (up to 2-lane).</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/media/video-interface-devices.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ovti,ov5693</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      System input clock (aka XVCLK). From 6 to 27 MHz.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Digital I/O voltage supply, 1.8V.</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Analog voltage supply, 2.8V.</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Digital core voltage supply, 1.2V.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      The phandle and specifier for the GPIO that controls sensor reset.</div><div class='add'>+      This corresponds to the hardware pin XSHUTDN which is physically</div><div class='add'>+      active low.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    description: MIPI CSI-2 transmitter port</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          link-frequencies: true</div><div class='add'>+</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+          - link-frequencies</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/px30-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ov5693: camera@36 {</div><div class='add'>+            compatible = "ovti,ov5693";</div><div class='add'>+            reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio2 RK_PB1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;cif_clkout_m0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+            assigned-clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;19200000&gt;;</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;vcc_1v8&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;vcc_1v2&gt;;</div><div class='add'>+            dovdd-supply = &lt;&amp;vcc_2v8&gt;;</div><div class='add'>+</div><div class='add'>+            rotation = &lt;90&gt;;</div><div class='add'>+            orientation = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ucam_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;450000000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml<br/>index 44529425ce3a..5d24edba8f99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov772x.yaml</a></div><div class='hunk'>@@ -105,8 +105,9 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>         ov772x: camera@21 {</div><div class='hunk'>@@ -118,7 +119,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>             port {</div><div class='ctx'>                 ov772x_0: endpoint {</div><div class='del'>-                    bus-type = &lt;5&gt;;</div><div class='add'>+                    bus-type = &lt;MEDIA_BUS_TYPE_PARALLEL&gt;;</div><div class='ctx'>                     vsync-active = &lt;0&gt;;</div><div class='ctx'>                     hsync-active = &lt;0&gt;;</div><div class='ctx'>                     pclk-sample = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov8858.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov8858.yaml<br/>new file mode 100644<br/>index 000000000000..a65f921ec0fd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov8858.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov8858.yaml</a></div><div class='hunk'>@@ -0,0 +1,106 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/ovti,ov8858.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: OmniVision OV8858 Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jacopo Mondi &lt;jacopo.mondi@ideasonboard.com&gt;</div><div class='add'>+  - Nicholas Roth &lt;nicholas@rothemail.net&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The OmniVision OV8858 is a color CMOS 8 Megapixels (3264x2448) image sensor</div><div class='add'>+  controlled through an I2C-compatible SCCB bus. The sensor transmits images</div><div class='add'>+  on a MIPI CSI-2 output interface with up to 4 data lanes.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ovti,ov8858</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: XVCLK external clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xvclk</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital Domain Power Supply</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog Domain Power Supply</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description: I/O Domain Power Supply</div><div class='add'>+</div><div class='add'>+  powerdown-gpios:</div><div class='add'>+    description: PWDNB powerdown GPIO (active low)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: XSHUTDN reset GPIO (active low)</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    description: MIPI CSI-2 transmitter port</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 4</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ov8858: camera@36 {</div><div class='add'>+            compatible = "ovti,ov8858";</div><div class='add'>+            reg = &lt;0x36&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+            clock-names = "xvclk";</div><div class='add'>+            assigned-clocks = &lt;&amp;cru SCLK_CIF_OUT&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+</div><div class='add'>+            dovdd-supply = &lt;&amp;vcc1v8_dvp&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio1 RK_PA4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            powerdown-gpios = &lt;&amp;gpio2 RK_PB4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                ucam_out: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml<br/>index b962863e4f65..8a70e23ba6ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov8865.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/i2c/ovti,ov8865.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: OmniVision OV8865 Image Sensor Device Tree Bindings</div><div class='add'>+title: OmniVision OV8865 Image Sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Kocialkowski &lt;paul.kocialkowski@bootlin.com&gt;</div><div class='hunk'>@@ -82,7 +82,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/sun8i-a83t-ccu.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c2 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml b/Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml<br/>index bf115ab9d926..79a7658f6d05 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/ovti,ov9282.yaml</a></div><div class='hunk'>@@ -16,10 +16,13 @@ description:</div><div class='ctx'>   sensor with an active array size of 1296H x 816V. It is programmable through</div><div class='ctx'>   I2C interface. The I2C client address is fixed to 0x60/0x70 as per sensor data</div><div class='ctx'>   sheet. Image data is sent through MIPI CSI-2.</div><div class='add'>+  OV9281 has a different lens chief ray angle.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: ovti,ov9282</div><div class='add'>+    enum:</div><div class='add'>+      - ovti,ov9281</div><div class='add'>+      - ovti,ov9282</div><div class='ctx'>   reg:</div><div class='ctx'>     description: I2C address</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -36,6 +39,15 @@ properties:</div><div class='ctx'>     description: Reference to the GPIO connected to the XCLR pin, if any.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog voltage supply, 2.8 volts</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital core voltage supply, 1.2 volts</div><div class='add'>+</div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description: Digital I/O voltage supply, 1.8 volts</div><div class='add'>+</div><div class='ctx'>   port:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='hunk'>@@ -66,7 +78,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml b/Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml<br/>index f50e54a722eb..34a05df786ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/rda,rda5807.yaml</a></div><div class='hunk'>@@ -50,7 +50,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml<br/>new file mode 100644<br/>index 000000000000..c8f2955e0825<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/samsung,s5k5baf.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/samsung,s5k5baf.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,s5k5baf</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 24000000</div><div class='add'>+    description: mclk clock frequency</div><div class='add'>+</div><div class='add'>+  rstn-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: RSTN pin</div><div class='add'>+</div><div class='add'>+  stbyn-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: STDBYN pin</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description: Analog power supply 2.8V (2.6V to 3.0V)</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: I/O power supply 1.8V (1.65V to 1.95V) or 2.8V (2.5V to 3.1V)</div><div class='add'>+</div><div class='add'>+  vddreg-supply:</div><div class='add'>+    description:</div><div class='add'>+      Regulator input power supply 1.8V (1.7V to 1.9V) or 2.8V (2.6V to 3.0)</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            items:</div><div class='add'>+              - const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - rstn-gpios</div><div class='add'>+  - stbyn-gpios</div><div class='add'>+  - vdda-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vddreg-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        sensor@2d {</div><div class='add'>+            compatible = "samsung,s5k5baf";</div><div class='add'>+            reg = &lt;0x2d&gt;;</div><div class='add'>+            clocks = &lt;&amp;camera 0&gt;;</div><div class='add'>+            clock-names = "mclk";</div><div class='add'>+            clock-frequency = &lt;24000000&gt;;</div><div class='add'>+            rstn-gpios = &lt;&amp;gpl2 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            stbyn-gpios = &lt;&amp;gpl2 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vdda-supply = &lt;&amp;cam_io_en_reg&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vtcam_reg&gt;;</div><div class='add'>+            vddreg-supply = &lt;&amp;vt_core_15v_reg&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csis1_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml<br/>new file mode 100644<br/>index 000000000000..7e83a94124b5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/samsung,s5k6a3.yaml</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/samsung,s5k6a3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5K6A3(YX) raw image sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  S5K6A3(YX) is a raw image sensor with MIPI CSI-2 and CCP2 image data</div><div class='add'>+  interfaces and CCI (I2C compatible) control bus.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,s5k6a3</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: extclk</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 24000000</div><div class='add'>+    description: extclk clock frequency</div><div class='add'>+</div><div class='add'>+  gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO connected to the RESET pin</div><div class='add'>+</div><div class='add'>+  afvdd-supply:</div><div class='add'>+    description: AF (actuator) voltage supply</div><div class='add'>+</div><div class='add'>+  svdda-supply:</div><div class='add'>+    description: Core voltage supply</div><div class='add'>+</div><div class='add'>+  svddio-supply:</div><div class='add'>+    description: I/O voltage supply</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            items:</div><div class='add'>+              - const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - gpios</div><div class='add'>+  - afvdd-supply</div><div class='add'>+  - svdda-supply</div><div class='add'>+  - svddio-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        sensor@10 {</div><div class='add'>+            compatible = "samsung,s5k6a3";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+            clock-frequency = &lt;24000000&gt;;</div><div class='add'>+            clocks = &lt;&amp;camera 1&gt;;</div><div class='add'>+            clock-names = "extclk";</div><div class='add'>+            gpios = &lt;&amp;gpm1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            afvdd-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+            svdda-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='add'>+            svddio-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csis1_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml<br/>index c9760f895b3e..e2470dd5920c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx214.yaml</a></div><div class='hunk'>@@ -97,7 +97,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml<br/>index 4271fc3cc623..b397a730ee94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx274.yaml</a></div><div class='hunk'>@@ -52,7 +52,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml<br/>new file mode 100644<br/>index 000000000000..a531badc16c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx290.yaml</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/sony,imx290.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sony IMX290 1/2.8-Inch CMOS Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+  - Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The Sony IMX290 is a 1/2.8-Inch CMOS Solid-state image sensor with Square</div><div class='add'>+  Pixel, available in either mono or colour variants. It is programmable</div><div class='add'>+  through I2C and 4-wire interfaces.</div><div class='add'>+</div><div class='add'>+  The sensor output is available via CMOS logic parallel SDR output, Low voltage</div><div class='add'>+  LVDS DDR output and CSI-2 serial data output. The CSI-2 bus is the default.</div><div class='add'>+  No bindings have been defined for the other busses.</div><div class='add'>+</div><div class='add'>+  imx290lqr is the full model identifier for the colour variant. "sony,imx290"</div><div class='add'>+  is treated the same as this as it was the original compatible string.</div><div class='add'>+  imx290llr is the mono version of the sensor.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - sony,imx290lqr # Colour</div><div class='add'>+          - sony,imx290llr # Monochrome</div><div class='add'>+          - sony,imx327lqr # Colour</div><div class='add'>+      - const: sony,imx290</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    description: Input clock (37.125 MHz or 74.25 MHz)</div><div class='add'>+    items:</div><div class='add'>+      - const: xclk</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: Frequency of the xclk clock in Hz</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description: Analog power supply (2.9V)</div><div class='add'>+</div><div class='add'>+  vddd-supply:</div><div class='add'>+    description: Digital core power supply (1.2V)</div><div class='add'>+</div><div class='add'>+  vdddo-supply:</div><div class='add'>+    description: Digital I/O power supply (1.8V)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Sensor reset (XCLR) GPIO</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    description: |</div><div class='add'>+      Video output port</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            anyOf:</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='add'>+          link-frequencies: true</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+          - link-frequencies</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - clock-frequency</div><div class='add'>+  - vdda-supply</div><div class='add'>+  - vddd-supply</div><div class='add'>+  - vdddo-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        imx290: camera-sensor@1a {</div><div class='add'>+            compatible = "sony,imx290lqr";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;camera_rear_default&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc 90&gt;;</div><div class='add'>+            clock-names = "xclk";</div><div class='add'>+            clock-frequency = &lt;37125000&gt;;</div><div class='add'>+</div><div class='add'>+            vdddo-supply = &lt;&amp;camera_vdddo_1v8&gt;;</div><div class='add'>+            vdda-supply = &lt;&amp;camera_vdda_2v8&gt;;</div><div class='add'>+            vddd-supply = &lt;&amp;camera_vddd_1v5&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;msmgpio 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                imx290_ep: endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;445500000&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;csiphy0_ep&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx296.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx296.yaml<br/>new file mode 100644<br/>index 000000000000..65ad9c100e45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx296.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx296.yaml</a></div><div class='hunk'>@@ -0,0 +1,106 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/sony,imx296.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sony IMX296 1/2.8-Inch CMOS Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+  - Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The Sony IMX296 is a 1/2.9-Inch active pixel type CMOS Solid-state image</div><div class='add'>+  sensor with square pixel array and 1.58 M effective pixels. This chip</div><div class='add'>+  features a global shutter with variable charge-integration time. It is</div><div class='add'>+  programmable through I2C and 4-wire interfaces. The sensor output is</div><div class='add'>+  available via CSI-2 serial data output (1 Lane).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - sony,imx296</div><div class='add'>+      - sony,imx296ll</div><div class='add'>+      - sony,imx296lq</div><div class='add'>+    description:</div><div class='add'>+      The IMX296 sensor exists in two different models, a colour variant</div><div class='add'>+      (IMX296LQ) and a monochrome variant (IMX296LL). The device exposes the</div><div class='add'>+      model through registers, allowing for auto-detection with a common</div><div class='add'>+      "sony,imx296" compatible string. However, some camera modules disable the</div><div class='add'>+      ability to read the sensor model register, which disables this feature.</div><div class='add'>+      In those cases, the exact model needs to be specified as "sony,imx296ll"</div><div class='add'>+      or "sony,imx296lq".</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    description: Input clock (37.125 MHz, 54 MHz or 74.25 MHz)</div><div class='add'>+    items:</div><div class='add'>+      - const: inck</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog power supply (3.3V)</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital power supply (1.2V)</div><div class='add'>+</div><div class='add'>+  ovdd-supply:</div><div class='add'>+    description: Interface power supply (1.8V)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Sensor reset (XCLR) GPIO</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - avdd-supply</div><div class='add'>+  - dvdd-supply</div><div class='add'>+  - ovdd-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        imx296: camera-sensor@1a {</div><div class='add'>+            compatible = "sony,imx296";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;camera_rear_default&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc 90&gt;;</div><div class='add'>+            clock-names = "inck";</div><div class='add'>+</div><div class='add'>+            avdd-supply = &lt;&amp;camera_vdda_3v3&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;camera_vddd_1v2&gt;;</div><div class='add'>+            ovdd-supply = &lt;&amp;camera_vddo_1v8&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;msmgpio 35 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                imx296_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csiphy0_ep&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml<br/>index f5055b9db693..bce57b22f7b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx334.yaml</a></div><div class='hunk'>@@ -65,7 +65,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -82,7 +82,7 @@ examples:</div><div class='ctx'>                 imx334: endpoint {</div><div class='ctx'>                     remote-endpoint = &lt;&amp;cam&gt;;</div><div class='ctx'>                     data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-                    link-frequencies = /bits/ 64 &lt;891000000&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;891000000 445500000&gt;;</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml<br/>index cf2ca2702cc9..a167dcdb3a32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx335.yaml</a></div><div class='hunk'>@@ -66,7 +66,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml<br/>index afcf70947f7e..d9b7815650fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx412.yaml</a></div><div class='hunk'>@@ -19,7 +19,9 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: sony,imx412</div><div class='add'>+    enum:</div><div class='add'>+      - sony,imx412</div><div class='add'>+      - sony,imx577</div><div class='ctx'>   reg:</div><div class='ctx'>     description: I2C address</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -32,6 +34,15 @@ properties:</div><div class='ctx'>     description: Clock frequency 6MHz, 12MHz, 18MHz, 24MHz or 27MHz</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  dovdd-supply:</div><div class='add'>+    description: Interface power supply.</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog power supply.</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital power supply.</div><div class='add'>+</div><div class='ctx'>   reset-gpios:</div><div class='ctx'>     description: Reference to the GPIO connected to the XCLR pin, if any.</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -66,7 +77,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml b/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml<br/>new file mode 100644<br/>index 000000000000..ffccf5f3c9e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/sony,imx415.yaml</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/sony,imx415.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sony IMX415 CMOS Image Sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Riesch &lt;michael.riesch@wolfvision.net&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The Sony IMX415 is a diagonal 6.4 mm (Type 1/2.8) CMOS active pixel type</div><div class='add'>+  solid-state image sensor with a square pixel array and 8.46 M effective</div><div class='add'>+  pixels. This chip operates with analog 2.9 V, digital 1.1 V, and interface</div><div class='add'>+  1.8 V triple power supply, and has low power consumption.</div><div class='add'>+  The IMX415 is programmable through I2C interface. The sensor output is</div><div class='add'>+  available via CSI-2 serial data output (two or four lanes).</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ../video-interface-devices.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sony,imx415</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Input clock (24 MHz, 27 MHz, 37.125 MHz, 72 MHz or 74.25 MHz)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog power supply (2.9 V)</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital power supply (1.1 V)</div><div class='add'>+</div><div class='add'>+  ovdd-supply:</div><div class='add'>+    description: Interface power supply (1.8 V)</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Sensor reset (XCLR) GPIO</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  flash-leds: true</div><div class='add'>+</div><div class='add'>+  lens-focus: true</div><div class='add'>+</div><div class='add'>+  orientation: true</div><div class='add'>+</div><div class='add'>+  rotation: true</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            oneOf:</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+              - items:</div><div class='add'>+                  - const: 1</div><div class='add'>+                  - const: 2</div><div class='add'>+                  - const: 3</div><div class='add'>+                  - const: 4</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+          - link-frequencies</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - endpoint</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - avdd-supply</div><div class='add'>+  - dvdd-supply</div><div class='add'>+  - ovdd-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        imx415: camera-sensor@1a {</div><div class='add'>+            compatible = "sony,imx415";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+            avdd-supply = &lt;&amp;vcc2v9_cam&gt;;</div><div class='add'>+            clocks = &lt;&amp;clock_cam&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;vcc1v1_cam&gt;;</div><div class='add'>+            lens-focus = &lt;&amp;vcm&gt;;</div><div class='add'>+            orientation = &lt;2&gt;;</div><div class='add'>+            ovdd-supply = &lt;&amp;vcc1v8_cam&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio_expander 14 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            rotation = &lt;180&gt;;</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                imx415_ep: endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    link-frequencies = /bits/ 64 &lt;445500000&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt b/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt<br/>deleted file mode 100644<br/>index 7976e6c40a80..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/i2c/st,st-mipid02.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,82 +0,0 @@</div><div class='del'>-STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge</div><div class='del'>-</div><div class='del'>-MIPID02 has two CSI-2 input ports, only one of those ports can be active at a</div><div class='del'>-time. Active port input stream will be de-serialized and its content outputted</div><div class='del'>-through PARALLEL output port.</div><div class='del'>-CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second</div><div class='del'>-input port is a single lane 800Mbps. Both ports support clock and data lane</div><div class='del'>-polarity swap. First port also supports data lane swap.</div><div class='del'>-PARALLEL output port has a maximum width of 12 bits.</div><div class='del'>-Supported formats are RAW6, RAW7, RAW8, RAW10, RAW12, RGB565, RGB888, RGB444,</div><div class='del'>-YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: shall be "st,st-mipid02"</div><div class='del'>-- clocks: reference to the xclk input clock.</div><div class='del'>-- clock-names: shall be "xclk".</div><div class='del'>-- VDDE-supply: sensor digital IO supply. Must be 1.8 volts.</div><div class='del'>-- VDDIN-supply: sensor internal regulator supply. Must be 1.8 volts.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- reset-gpios: reference to the GPIO connected to the xsdn pin, if any.</div><div class='del'>-	       This is an active low signal to the mipid02.</div><div class='del'>-</div><div class='del'>-Required subnodes:</div><div class='del'>-  - ports: A ports node with one port child node per device input and output</div><div class='del'>-	   port, in accordance with the video interface bindings defined in</div><div class='del'>-	   Documentation/devicetree/bindings/media/video-interfaces.txt. The</div><div class='del'>-	   port nodes are numbered as follows:</div><div class='del'>-</div><div class='del'>-	   Port Description</div><div class='del'>-	   -----------------------------</div><div class='del'>-	   0    CSI-2 first input port</div><div class='del'>-	   1    CSI-2 second input port</div><div class='del'>-	   2    PARALLEL output</div><div class='del'>-</div><div class='del'>-Endpoint node required property for CSI-2 connection is:</div><div class='del'>-- data-lanes: shall be &lt;1&gt; for Port 1. for Port 0 dual-lane operation shall be</div><div class='del'>-&lt;1 2&gt; or &lt;2 1&gt;. For Port 0 single-lane operation shall be &lt;1&gt; or &lt;2&gt;.</div><div class='del'>-Endpoint node optional property for CSI-2 connection is:</div><div class='del'>-- lane-polarities: any lane can be inverted or not.</div><div class='del'>-</div><div class='del'>-Endpoint node required property for PARALLEL connection is:</div><div class='del'>-- bus-width: shall be set to &lt;6&gt;, &lt;7&gt;, &lt;8&gt;, &lt;10&gt; or &lt;12&gt;.</div><div class='del'>-Endpoint node optional properties for PARALLEL connection are:</div><div class='del'>-- hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.</div><div class='del'>-LOW being the default.</div><div class='del'>-- vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.</div><div class='del'>-LOW being the default.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-mipid02: csi2rx@14 {</div><div class='del'>-	compatible = "st,st-mipid02";</div><div class='del'>-	reg = &lt;0x14&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-	clocks = &lt;&amp;clk_ext_camera_12&gt;;</div><div class='del'>-	clock-names = "xclk";</div><div class='del'>-	VDDE-supply = &lt;&amp;vdd&gt;;</div><div class='del'>-	VDDIN-supply = &lt;&amp;vdd&gt;;</div><div class='del'>-	ports {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		port@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			ep0: endpoint {</div><div class='del'>-				data-lanes = &lt;1 2&gt;;</div><div class='del'>-				remote-endpoint = &lt;&amp;mipi_csi2_in&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-		port@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-			ep2: endpoint {</div><div class='del'>-				bus-width = &lt;8&gt;;</div><div class='del'>-				hsync-active = &lt;0&gt;;</div><div class='del'>-				vsync-active = &lt;0&gt;;</div><div class='del'>-				remote-endpoint = &lt;&amp;parallel_out&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml b/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml<br/>new file mode 100644<br/>index 000000000000..19a39d753aad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/st,st-mipid02.yaml</a></div><div class='hunk'>@@ -0,0 +1,176 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Benjamin Mugnier &lt;benjamin.mugnier@foss.st.com&gt;</div><div class='add'>+  - Sylvain Petinot &lt;sylvain.petinot@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MIPID02 has two CSI-2 input ports, only one of those ports can be</div><div class='add'>+  active at a time. Active port input stream will be de-serialized</div><div class='add'>+  and its content outputted through PARALLEL output port.</div><div class='add'>+  CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2</div><div class='add'>+  second input port is a single lane 800Mbps. Both ports support clock</div><div class='add'>+  and data lane polarity swap. First port also supports data lane swap.</div><div class='add'>+  PARALLEL output port has a maximum width of 12 bits.</div><div class='add'>+  Supported formats are RAW6, RAW7, RAW8, RAW10, RAW12, RGB565, RGB888,</div><div class='add'>+  RGB444, YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,st-mipid02</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: xclk</div><div class='add'>+</div><div class='add'>+  VDDE-supply:</div><div class='add'>+    description:</div><div class='add'>+      Sensor digital IO supply. Must be 1.8 volts.</div><div class='add'>+</div><div class='add'>+  VDDIN-supply:</div><div class='add'>+    description:</div><div class='add'>+      Sensor internal regulator supply. Must be 1.8 volts.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      Reference to the GPIO connected to the xsdn pin, if any.</div><div class='add'>+      This is an active low signal to the mipid02.</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: CSI-2 first input port</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description:</div><div class='add'>+                  Single-lane operation shall be &lt;1&gt; or &lt;2&gt; .</div><div class='add'>+                  Dual-lane operation shall be &lt;1 2&gt; or &lt;2 1&gt; .</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 2</div><div class='add'>+</div><div class='add'>+              lane-polarities:</div><div class='add'>+                description:</div><div class='add'>+                  Any lane can be inverted or not.</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 2</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: CSI-2 second input port</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                description:</div><div class='add'>+                  Single-lane operation shall be &lt;1&gt; or &lt;2&gt; .</div><div class='add'>+                maxItems: 1</div><div class='add'>+</div><div class='add'>+              lane-polarities:</div><div class='add'>+                description:</div><div class='add'>+                  Any lane can be inverted or not.</div><div class='add'>+                maxItems: 1</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+      port@2:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: Output port</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              bus-width:</div><div class='add'>+                enum: [6, 7, 8, 10, 12]</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - bus-width</div><div class='add'>+</div><div class='add'>+    anyOf:</div><div class='add'>+      - required:</div><div class='add'>+          - port@0</div><div class='add'>+      - required:</div><div class='add'>+          - port@1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - VDDE-supply</div><div class='add'>+  - VDDIN-supply</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        mipid02: csi2rx@14 {</div><div class='add'>+            compatible = "st,st-mipid02";</div><div class='add'>+            reg = &lt;0x14&gt;;</div><div class='add'>+            status = "okay";</div><div class='add'>+            clocks = &lt;&amp;clk_ext_camera_12&gt;;</div><div class='add'>+            clock-names = "xclk";</div><div class='add'>+            VDDE-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+            VDDIN-supply = &lt;&amp;vdd&gt;;</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    ep0: endpoint {</div><div class='add'>+                        data-lanes = &lt;1 2&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;mipi_csi2_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                    ep2: endpoint {</div><div class='add'>+                        bus-width = &lt;8&gt;;</div><div class='add'>+                        hsync-active = &lt;0&gt;;</div><div class='add'>+                        vsync-active = &lt;0&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;parallel_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/st,st-vgxy61.yaml b/Documentation/devicetree/bindings/media/i2c/st,st-vgxy61.yaml<br/>new file mode 100644<br/>index 000000000000..8c28848b226a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/st,st-vgxy61.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/st,st-vgxy61.yaml</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2022 STMicroelectronics SA.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/st,st-vgxy61.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics VGxy61 HDR Global Shutter Sensor Family</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Benjamin Mugnier &lt;benjamin.mugnier@foss.st.com&gt;</div><div class='add'>+  - Sylvain Petinot &lt;sylvain.petinot@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  STMicroelectronics VGxy61 family has a CSI-2 output port. CSI-2 output is a</div><div class='add'>+  quad lanes 800Mbps per lane.</div><div class='add'>+  Supported formats are RAW8, RAW10, RAW12, RAW14 and RAW16.</div><div class='add'>+  Following part number are supported</div><div class='add'>+  - VG5661 and VG6661 are 1.6 Mpx (1464 x 1104) monochrome and color sensors.</div><div class='add'>+  Maximum frame rate is 75 fps.</div><div class='add'>+  - VG5761 and VG6761 are 2.3 Mpx (1944 x 1204) monochrome and color sensors.</div><div class='add'>+  Maximum frame rate is 60 fps.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,st-vgxy61</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  VCORE-supply:</div><div class='add'>+    description:</div><div class='add'>+      Sensor digital core supply. Must be 1.2 volts.</div><div class='add'>+</div><div class='add'>+  VDDIO-supply:</div><div class='add'>+    description:</div><div class='add'>+      Sensor digital IO supply. Must be 1.8 volts.</div><div class='add'>+</div><div class='add'>+  VANA-supply:</div><div class='add'>+    description:</div><div class='add'>+      Sensor analog supply. Must be 2.8 volts.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      Reference to the GPIO connected to the reset pin, if any.</div><div class='add'>+      This is an active low signal to the vgxy61.</div><div class='add'>+</div><div class='add'>+  st,strobe-gpios-polarity:</div><div class='add'>+    description:</div><div class='add'>+      Invert polarity of illuminator's lights strobe GPIOs.</div><div class='add'>+      These GPIOs directly drive the illuminator LEDs.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            description:</div><div class='add'>+              CSI lanes to use</div><div class='add'>+            items:</div><div class='add'>+              - const: 1</div><div class='add'>+              - const: 2</div><div class='add'>+              - const: 3</div><div class='add'>+              - const: 4</div><div class='add'>+</div><div class='add'>+          remote-endpoint: true</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - VCORE-supply</div><div class='add'>+  - VDDIO-supply</div><div class='add'>+  - VANA-supply</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        vgxy61: csi2tx@10 {</div><div class='add'>+            compatible = "st,st-vgxy61";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk_ext_camera&gt;;</div><div class='add'>+            VCORE-supply = &lt;&amp;v1v2&gt;;</div><div class='add'>+            VDDIO-supply = &lt;&amp;v1v8&gt;;</div><div class='add'>+            VANA-supply = &lt;&amp;v2v8&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;mfxgpio 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            port {</div><div class='add'>+                ep0: endpoint {</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_csi2_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml b/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml<br/>new file mode 100644<br/>index 000000000000..b8ba85a2416c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/i2c/toshiba,tc358746.yaml</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/i2c/toshiba,tc358746.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Toshiba TC358746 Parallel to MIPI CSI2 Bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marco Felsch &lt;kernel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The Toshiba TC358746 converts a parallel video stream into a MIPI CSI-2</div><div class='add'>+  stream. The direction can be either parallel-in -&gt; csi-out or csi-in -&gt;</div><div class='add'>+  parallel-out The chip is programmable trough I2C and SPI but the SPI</div><div class='add'>+  interface is only supported in parallel-in -&gt; csi-out mode.</div><div class='add'>+</div><div class='add'>+  Note that the current device tree bindings only support the</div><div class='add'>+  parallel-in -&gt; csi-out path.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: toshiba,tc358746</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      The phandle to the reference clock source. This corresponds to the</div><div class='add'>+      hardware pin REFCLK.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: refclk</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    description: |</div><div class='add'>+      The bridge can act as clock provider for the sensor. To enable this</div><div class='add'>+      support #clock-cells must be specified. Attention if this feature is used</div><div class='add'>+      then the mclk rate must be at least: (2 * link-frequency) / 8</div><div class='add'>+                                           `------------------´   ^</div><div class='add'>+                                           internal PLL rate   smallest possible</div><div class='add'>+                                                                   mclk-div</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description:</div><div class='add'>+      The clock name of the MCLK output, the default name is tc358746-mclk.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vddc-supply:</div><div class='add'>+    description: Digital core voltage supply, 1.2 volts</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: Digital I/O voltage supply, 1.8 volts</div><div class='add'>+</div><div class='add'>+  vddmipi-supply:</div><div class='add'>+    description: MIPI CSI phy voltage supply, 1.2 volts</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      The phandle and specifier for the GPIO that controls the chip reset.</div><div class='add'>+      This corresponds to the hardware pin RESX which is physically active low.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        description: Input port</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              hsync-active: true</div><div class='add'>+              vsync-active: true</div><div class='add'>+              bus-type:</div><div class='add'>+                enum: [ 5, 6 ]</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - hsync-active</div><div class='add'>+              - vsync-active</div><div class='add'>+              - bus-type</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        description: Output port</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+</div><div class='add'>+              clock-noncontinuous: true</div><div class='add'>+              link-frequencies: true</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - data-lanes</div><div class='add'>+              - link-frequencies</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - vddc-supply</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vddmipi-supply</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      csi-bridge@e {</div><div class='add'>+        compatible = "toshiba,tc358746";</div><div class='add'>+        reg = &lt;0xe&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+        clock-names = "refclk";</div><div class='add'>+</div><div class='add'>+        reset-gpios = &lt;&amp;gpio 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+        vddc-supply = &lt;&amp;v1_2d&gt;;</div><div class='add'>+        vddio-supply = &lt;&amp;v1_8d&gt;;</div><div class='add'>+        vddmipi-supply = &lt;&amp;v1_2d&gt;;</div><div class='add'>+</div><div class='add'>+        /* sensor mclk provider */</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          /* Input */</div><div class='add'>+          port@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            tc358746_in: endpoint {</div><div class='add'>+              remote-endpoint = &lt;&amp;sensor_out&gt;;</div><div class='add'>+              hsync-active = &lt;0&gt;;</div><div class='add'>+              vsync-active = &lt;0&gt;;</div><div class='add'>+              bus-type = &lt;5&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          /* Output */</div><div class='add'>+          port@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            tc358746_out: endpoint {</div><div class='add'>+              remote-endpoint = &lt;&amp;mipi_csi2_in&gt;;</div><div class='add'>+              data-lanes = &lt;1 2&gt;;</div><div class='add'>+              clock-noncontinuous;</div><div class='add'>+              link-frequencies = /bits/ 64 &lt;216000000&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml b/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml<br/>index b39b84c5f012..de3e483f146a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/marvell,mmp2-ccic.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell MMP2 camera host interface bindings</div><div class='add'>+title: Marvell MMP2 camera host interface</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='hunk'>@@ -68,6 +68,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/marvell,mmp2.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/marvell,mmp2.h&gt;</div><div class='ctx'> </div><div class='ctx'>     camera@d420a000 {</div><div class='hunk'>@@ -83,7 +84,7 @@ examples:</div><div class='ctx'>       port {</div><div class='ctx'>         camera0_0: endpoint {</div><div class='ctx'>           remote-endpoint = &lt;&amp;ov7670_0&gt;;</div><div class='del'>-          bus-type = &lt;5&gt;;      /* Parallel */</div><div class='add'>+          bus-type = &lt;MEDIA_BUS_TYPE_PARALLEL&gt;;</div><div class='ctx'>           hsync-active = &lt;1&gt;;  /* Active high */</div><div class='ctx'>           vsync-active = &lt;1&gt;;  /* Active high */</div><div class='ctx'>           pclk-sample = &lt;0&gt;;   /* Falling */</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml<br/>new file mode 100644<br/>index 000000000000..7032c7e15039<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Read Direct Memory Access</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+  - Moudy Ho &lt;moudy.ho@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek Read Direct Memory Access(RDMA) component used to do read DMA.</div><div class='add'>+  It contains one line buffer to store the sufficient pixel data, and</div><div class='add'>+  must be siblings to the central MMSYS_CONFIG node.</div><div class='add'>+  For a description of the MMSYS_CONFIG binding, see</div><div class='add'>+  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml</div><div class='add'>+  for details.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: mediatek,mt8183-mdp3-rdma</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle of GCE</div><div class='add'>+        - description: GCE subsys id</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: register size</div><div class='add'>+    description: The register of client driver can be configured by gce with</div><div class='add'>+      4 arguments defined in this property. Each GCE subsys id is mapping to</div><div class='add'>+      a client defined in the header include/dt-bindings/gce/&lt;chip&gt;-gce.h.</div><div class='add'>+</div><div class='add'>+  mediatek,gce-events:</div><div class='add'>+    description:</div><div class='add'>+      The event id which is mapping to the specific hardware event signal</div><div class='add'>+      to gce. The event id is defined in the gce header</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h of each chips.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: RDMA clock</div><div class='add'>+      - description: RSZ clock</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    items:</div><div class='add'>+      - description: used for 1st data pipe from RDMA</div><div class='add'>+      - description: used for 2nd data pipe from RDMA</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - mediatek,gce-client-reg</div><div class='add'>+  - mediatek,gce-events</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - iommus</div><div class='add'>+  - mboxes</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8183-gce.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8183-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/mt8183-larb-port.h&gt;</div><div class='add'>+</div><div class='add'>+    mdp3_rdma0: mdp3-rdma0@14001000 {</div><div class='add'>+      compatible = "mediatek,mt8183-mdp3-rdma";</div><div class='add'>+      reg = &lt;0x14001000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x1000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-events = &lt;CMDQ_EVENT_MDP_RDMA0_SOF&gt;,</div><div class='add'>+                            &lt;CMDQ_EVENT_MDP_RDMA0_EOF&gt;;</div><div class='add'>+      power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+      clocks = &lt;&amp;mmsys CLK_MM_MDP_RDMA0&gt;,</div><div class='add'>+               &lt;&amp;mmsys CLK_MM_MDP_RSZ1&gt;;</div><div class='add'>+      iommus = &lt;&amp;iommu&gt;;</div><div class='add'>+      mboxes = &lt;&amp;gce 20 CMDQ_THR_PRIO_LOWEST&gt;,</div><div class='add'>+               &lt;&amp;gce 21 CMDQ_THR_PRIO_LOWEST&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml<br/>new file mode 100644<br/>index 000000000000..78f9de6192ef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/mediatek,mdp3-rsz.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Resizer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+  - Moudy Ho &lt;moudy.ho@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  One of Media Data Path 3 (MDP3) components used to do frame resizing.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8183-mdp3-rsz</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle of GCE</div><div class='add'>+        - description: GCE subsys id</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: register size</div><div class='add'>+    description: The register of client driver can be configured by gce with</div><div class='add'>+      4 arguments defined in this property. Each GCE subsys id is mapping to</div><div class='add'>+      a client defined in the header include/dt-bindings/gce/&lt;chip&gt;-gce.h.</div><div class='add'>+</div><div class='add'>+  mediatek,gce-events:</div><div class='add'>+    description:</div><div class='add'>+      The event id which is mapping to the specific hardware event signal</div><div class='add'>+      to gce. The event id is defined in the gce header</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h of each chips.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - mediatek,gce-client-reg</div><div class='add'>+  - mediatek,gce-events</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8183-gce.h&gt;</div><div class='add'>+</div><div class='add'>+    mdp3_rsz0: mdp3-rsz0@14003000 {</div><div class='add'>+      compatible = "mediatek,mt8183-mdp3-rsz";</div><div class='add'>+      reg = &lt;0x14003000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x3000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-events = &lt;CMDQ_EVENT_MDP_RSZ0_SOF&gt;,</div><div class='add'>+                            &lt;CMDQ_EVENT_MDP_RSZ0_EOF&gt;;</div><div class='add'>+      clocks = &lt;&amp;mmsys CLK_MM_MDP_RSZ0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    mdp3_rsz1: mdp3-rsz1@14004000 {</div><div class='add'>+      compatible = "mediatek,mt8183-mdp3-rsz";</div><div class='add'>+      reg = &lt;0x14004000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x4000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-events = &lt;CMDQ_EVENT_MDP_RSZ1_SOF&gt;,</div><div class='add'>+                            &lt;CMDQ_EVENT_MDP_RSZ1_EOF&gt;;</div><div class='add'>+      clocks = &lt;&amp;mmsys CLK_MM_MDP_RSZ1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml<br/>new file mode 100644<br/>index 000000000000..0baa77198fa2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/mediatek,mdp3-wrot.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Write DMA with Rotation</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+  - Moudy Ho &lt;moudy.ho@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  One of Media Data Path 3 (MDP3) components used to write DMA with frame rotation.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8183-mdp3-wrot</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle of GCE</div><div class='add'>+        - description: GCE subsys id</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: register size</div><div class='add'>+    description: The register of client driver can be configured by gce with</div><div class='add'>+      4 arguments defined in this property. Each GCE subsys id is mapping to</div><div class='add'>+      a client defined in the header include/dt-bindings/gce/&lt;chip&gt;-gce.h.</div><div class='add'>+</div><div class='add'>+  mediatek,gce-events:</div><div class='add'>+    description:</div><div class='add'>+      The event id which is mapping to the specific hardware event signal</div><div class='add'>+      to gce. The event id is defined in the gce header</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h of each chips.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - mediatek,gce-client-reg</div><div class='add'>+  - mediatek,gce-events</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - iommus</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8183-gce.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8183-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/mt8183-larb-port.h&gt;</div><div class='add'>+</div><div class='add'>+    mdp3_wrot0: mdp3-wrot0@14005000 {</div><div class='add'>+      compatible = "mediatek,mt8183-mdp3-wrot";</div><div class='add'>+      reg = &lt;0x14005000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x5000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-events = &lt;CMDQ_EVENT_MDP_WROT0_SOF&gt;,</div><div class='add'>+                            &lt;CMDQ_EVENT_MDP_WROT0_EOF&gt;;</div><div class='add'>+      power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+      clocks = &lt;&amp;mmsys CLK_MM_MDP_WROT0&gt;;</div><div class='add'>+      iommus = &lt;&amp;iommu&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml<br/>new file mode 100644<br/>index 000000000000..e5448c60e3eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml</a></div><div class='hunk'>@@ -0,0 +1,161 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegdec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek JPEG Decoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - kyrie wu &lt;kyrie.wu@mediatek.corp-partner.google.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MediaTek JPEG Decoder is the JPEG decode hardware present in MediaTek SoCs</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8195-jpgdec</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 6</div><div class='add'>+    description:</div><div class='add'>+      Points to the respective IOMMU block with master port as argument, see</div><div class='add'>+      Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.</div><div class='add'>+      Ports are according to the HW.</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+# Required child node:</div><div class='add'>+patternProperties:</div><div class='add'>+  "^jpgdec@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      The jpeg decoder hardware device node which should be added as subnodes to</div><div class='add'>+      the main jpeg node.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: mediatek,mt8195-jpgdec-hw</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      iommus:</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 32</div><div class='add'>+        description:</div><div class='add'>+          List of the hardware port in respective IOMMU block for current Socs.</div><div class='add'>+          Refer to bindings/iommu/mediatek,iommu.yaml.</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: jpgdec</div><div class='add'>+</div><div class='add'>+      power-domains:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - reg</div><div class='add'>+      - iommus</div><div class='add'>+      - interrupts</div><div class='add'>+      - clocks</div><div class='add'>+      - clock-names</div><div class='add'>+      - power-domains</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - power-domains</div><div class='add'>+  - iommus</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/mt8195-memory-port.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8195-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8195-power.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        jpgdec-master {</div><div class='add'>+            compatible = "mediatek,mt8195-jpgdec";</div><div class='add'>+            power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDEC1&gt;;</div><div class='add'>+            iommus = &lt;&amp;iommu_vpp M4U_PORT_L19_JPGDEC_WDMA0&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L19_JPGDEC_BSDMA0&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L19_JPGDEC_WDMA1&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L19_JPGDEC_BSDMA1&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET1&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET0&gt;;</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+</div><div class='add'>+            jpgdec@1a040000 {</div><div class='add'>+                compatible = "mediatek,mt8195-jpgdec-hw";</div><div class='add'>+                reg = &lt;0 0x1a040000 0 0x10000&gt;;/* JPGDEC_C0 */</div><div class='add'>+                iommus = &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA0&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA0&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET0&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+                clocks = &lt;&amp;vencsys CLK_VENC_JPGDEC&gt;;</div><div class='add'>+                clock-names = "jpgdec";</div><div class='add'>+                power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDEC0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            jpgdec@1a050000 {</div><div class='add'>+                compatible = "mediatek,mt8195-jpgdec-hw";</div><div class='add'>+                reg = &lt;0 0x1a050000 0 0x10000&gt;;/* JPGDEC_C1 */</div><div class='add'>+                iommus = &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA0&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA0&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_WDMA1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET0&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+                clocks = &lt;&amp;vencsys CLK_VENC_JPGDEC_C1&gt;;</div><div class='add'>+                clock-names = "jpgdec";</div><div class='add'>+                power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDEC1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            jpgdec@1b040000 {</div><div class='add'>+                compatible = "mediatek,mt8195-jpgdec-hw";</div><div class='add'>+                reg = &lt;0 0x1b040000 0 0x10000&gt;;/* JPGDEC_C2 */</div><div class='add'>+                iommus = &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_WDMA0&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_BSDMA0&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_WDMA1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_BSDMA1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_BUFF_OFFSET1&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGDEC_BUFF_OFFSET0&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+                clocks = &lt;&amp;vencsys_core1 CLK_VENC_CORE1_JPGDEC&gt;;</div><div class='add'>+                clock-names = "jpgdec";</div><div class='add'>+                power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VDEC2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml b/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml<br/>new file mode 100644<br/>index 000000000000..596186497b68<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/mediatek,mt8195-jpegenc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek JPEG Encoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - kyrie wu &lt;kyrie.wu@mediatek.corp-partner.google.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8195-jpgenc</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 4</div><div class='add'>+    description:</div><div class='add'>+      Points to the respective IOMMU block with master port as argument, see</div><div class='add'>+      Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.</div><div class='add'>+      Ports are according to the HW.</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+# Required child node:</div><div class='add'>+patternProperties:</div><div class='add'>+  "^jpgenc@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      The jpeg encoder hardware device node which should be added as subnodes to</div><div class='add'>+      the main jpeg node.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: mediatek,mt8195-jpgenc-hw</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      iommus:</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 32</div><div class='add'>+        description:</div><div class='add'>+          List of the hardware port in respective IOMMU block for current Socs.</div><div class='add'>+          Refer to bindings/iommu/mediatek,iommu.yaml.</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: jpgenc</div><div class='add'>+</div><div class='add'>+      power-domains:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - reg</div><div class='add'>+      - iommus</div><div class='add'>+      - interrupts</div><div class='add'>+      - clocks</div><div class='add'>+      - clock-names</div><div class='add'>+      - power-domains</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - power-domains</div><div class='add'>+  - iommus</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/mt8195-memory-port.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8195-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8195-power.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        jpgenc-master {</div><div class='add'>+            compatible = "mediatek,mt8195-jpgenc";</div><div class='add'>+            power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VENC_CORE1&gt;;</div><div class='add'>+            iommus = &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE&gt;,</div><div class='add'>+                     &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_BSDMA&gt;;</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+</div><div class='add'>+            jpgenc@1a030000 {</div><div class='add'>+                compatible = "mediatek,mt8195-jpgenc-hw";</div><div class='add'>+                reg = &lt;0 0x1a030000 0 0x10000&gt;;</div><div class='add'>+                iommus = &lt;&amp;iommu_vdo M4U_PORT_L19_JPGENC_Y_RDMA&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGENC_C_RDMA&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGENC_Q_TABLE&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vdo M4U_PORT_L19_JPGENC_BSDMA&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+                clocks = &lt;&amp;vencsys CLK_VENC_JPGENC&gt;;</div><div class='add'>+                clock-names = "jpgenc";</div><div class='add'>+                power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VENC&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            jpgenc@1b030000 {</div><div class='add'>+                compatible = "mediatek,mt8195-jpgenc-hw";</div><div class='add'>+                reg = &lt;0 0x1b030000 0 0x10000&gt;;</div><div class='add'>+                iommus = &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_Y_RDMA&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE&gt;,</div><div class='add'>+                         &lt;&amp;iommu_vpp M4U_PORT_L20_JPGENC_BSDMA&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+                clocks = &lt;&amp;vencsys_core1 CLK_VENC_CORE1_JPGENC&gt;;</div><div class='add'>+                clock-names = "jpgenc";</div><div class='add'>+                power-domains = &lt;&amp;spm MT8195_POWER_DOMAIN_VENC_CORE1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml<br/>index 9b179bb44dfb..fad59b486d5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml</a></div><div class='hunk'>@@ -56,20 +56,13 @@ properties:</div><div class='ctx'>       List of the hardware port in respective IOMMU block for current Socs.</div><div class='ctx'>       Refer to bindings/iommu/mediatek,iommu.yaml.</div><div class='ctx'> </div><div class='del'>-  dma-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      Describes the physical address space of IOMMU maps to memory.</div><div class='del'>-</div><div class='ctx'>   mediatek,vpu:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    maxItems: 1</div><div class='ctx'>     description:</div><div class='ctx'>       Describes point to vpu.</div><div class='ctx'> </div><div class='ctx'>   mediatek,scp:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    maxItems: 1</div><div class='ctx'>     description:</div><div class='ctx'>       Describes point to scp.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml<br/>index e7b65a91c92c..a2051b31fa29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml</a></div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>       - mediatek,mt8173-vcodec-enc-vp8</div><div class='ctx'>       - mediatek,mt8173-vcodec-enc</div><div class='ctx'>       - mediatek,mt8183-vcodec-enc</div><div class='add'>+      - mediatek,mt8188-vcodec-enc</div><div class='ctx'>       - mediatek,mt8192-vcodec-enc</div><div class='ctx'>       - mediatek,mt8195-vcodec-enc</div><div class='ctx'> </div><div class='hunk'>@@ -48,23 +49,25 @@ properties:</div><div class='ctx'>       List of the hardware port in respective IOMMU block for current Socs.</div><div class='ctx'>       Refer to bindings/iommu/mediatek,iommu.yaml.</div><div class='ctx'> </div><div class='del'>-  dma-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      Describes the physical address space of IOMMU maps to memory.</div><div class='del'>-</div><div class='ctx'>   mediatek,vpu:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    maxItems: 1</div><div class='ctx'>     description:</div><div class='ctx'>       Describes point to vpu.</div><div class='ctx'> </div><div class='ctx'>   mediatek,scp:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    maxItems: 1</div><div class='ctx'>     description:</div><div class='ctx'>       Describes point to scp.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -82,7 +85,9 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - mediatek,mt8183-vcodec-enc</div><div class='add'>+              - mediatek,mt8188-vcodec-enc</div><div class='ctx'>               - mediatek,mt8192-vcodec-enc</div><div class='add'>+              - mediatek,mt8195-vcodec-enc</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='hunk'>@@ -105,8 +110,9 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           enum:</div><div class='ctx'>             - mediatek,mt8173-vcodec-enc</div><div class='add'>+            - mediatek,mt8188-vcodec-enc</div><div class='ctx'>             - mediatek,mt8192-vcodec-enc</div><div class='del'>-            - mediatek,mt8173-vcodec-enc</div><div class='add'>+            - mediatek,mt8195-vcodec-enc</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -117,7 +123,7 @@ allOf:</div><div class='ctx'>         clock-names:</div><div class='ctx'>           items:</div><div class='ctx'>             - const: venc_sel</div><div class='del'>-    else:  # for vp8 hw decoder</div><div class='add'>+    else:  # for vp8 hw encoder</div><div class='ctx'>       properties:</div><div class='ctx'>         clock:</div><div class='ctx'>           items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml<br/>index 7687be0f50aa..dca9b0c5e106 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Mediatek Video Decode Accelerator With Multi Hardware</div><div class='ctx'> </div><div class='hunk'>@@ -17,20 +17,20 @@ description: |</div><div class='ctx'> </div><div class='ctx'>   About the Decoder Hardware Block Diagram, please check below:</div><div class='ctx'> </div><div class='del'>-    +---------------------------------+------------------------------------+</div><div class='del'>-    |                                 |                                    |</div><div class='del'>-    | input -&gt; lat HW -&gt; lat buffer --|--&gt; lat buffer -&gt; core HW -&gt; output |</div><div class='del'>-    |            ||                   |                     ||             |</div><div class='del'>-    +------------||-------------------+---------------------||-------------+</div><div class='del'>-              lat workqueue           |              core workqueue     &lt;parent&gt;</div><div class='del'>-    -------------||-----------------------------------------||------------------</div><div class='del'>-                 ||                                         ||          &lt;child&gt;</div><div class='del'>-                 \/ &lt;----------------HW index--------------&gt;\/</div><div class='del'>-           +------------------------------------------------------+</div><div class='del'>-           |                    enable/disable                    |</div><div class='del'>-           |           clk     power    irq    iommu              |</div><div class='del'>-           |                 (lat/lat soc/core0/core1)            |</div><div class='del'>-           +------------------------------------------------------+</div><div class='add'>+    +------------------------------------------------+-------------------------------------+</div><div class='add'>+    |                                                |                                     |</div><div class='add'>+    |  input -&gt; lat soc HW -&gt; lat HW -&gt; lat buffer --|--&gt; lat buffer -&gt; core HW -&gt; output  |</div><div class='add'>+    |            ||             ||                   |                     ||              |</div><div class='add'>+    +------------||-------------||-------------------+---------------------||--------------+</div><div class='add'>+                 ||     lat     ||                   |               core workqueue  &lt;parent&gt;</div><div class='add'>+    -------------||-------------||-------------------|---------------------||---------------</div><div class='add'>+                 ||&lt;------------||----------------HW index----------------&gt;||        &lt;child&gt;</div><div class='add'>+                 \/             \/                                         \/</div><div class='add'>+               +-------------------------------------------------------------+</div><div class='add'>+               |                          enable/disable                     |</div><div class='add'>+               |                 clk     power    irq    iommu               |</div><div class='add'>+               |                   (lat/lat soc/core0/core1)                 |</div><div class='add'>+               +-------------------------------------------------------------+</div><div class='ctx'> </div><div class='ctx'>   As above, there are parent and child devices, child mean each hardware. The child device</div><div class='ctx'>   controls the information of each hardware independent which include clk/power/irq.</div><div class='hunk'>@@ -45,12 +45,26 @@ description: |</div><div class='ctx'>   For the smi common may not the same for each hardware, can't combine all hardware in one node,</div><div class='ctx'>   or leading to iommu fault when access dram data.</div><div class='ctx'> </div><div class='add'>+  Lat soc is a hardware which is related with some larb(local arbiter) ports. For mt8195</div><div class='add'>+  platform, there are some ports like RDMA, UFO in lat soc larb, need to enable its power and</div><div class='add'>+  clock when lat start to work, don't have interrupt.</div><div class='add'>+</div><div class='add'>+  mt8195: lat soc HW + lat HW + core HW</div><div class='add'>+  mt8192: lat HW + core HW</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mediatek,mt8192-vcodec-dec</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8192-vcodec-dec</div><div class='add'>+      - mediatek,mt8186-vcodec-dec</div><div class='add'>+      - mediatek,mt8188-vcodec-dec</div><div class='add'>+      - mediatek,mt8195-vcodec-dec</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: VDEC_SYS register space</div><div class='add'>+      - description: VDEC_RACING_CTRL register space</div><div class='ctx'> </div><div class='ctx'>   iommus:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -61,16 +75,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   mediatek,scp:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    maxItems: 1</div><div class='ctx'>     description: |</div><div class='ctx'>       The node of system control processor (SCP), using</div><div class='ctx'>       the remoteproc &amp; rpmsg framework.</div><div class='ctx'> </div><div class='del'>-  dma-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      Describes the physical address space of IOMMU maps to memory.</div><div class='del'>-</div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='hunk'>@@ -81,15 +89,19 @@ properties:</div><div class='ctx'> </div><div class='ctx'> # Required child node:</div><div class='ctx'> patternProperties:</div><div class='del'>-  '^vcodec-lat@[0-9a-f]+$':</div><div class='add'>+  '^video-codec@[0-9a-f]+$':</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='del'>-        const: mediatek,mtk-vcodec-lat</div><div class='add'>+        enum:</div><div class='add'>+          - mediatek,mtk-vcodec-core</div><div class='add'>+          - mediatek,mtk-vcodec-lat</div><div class='add'>+          - mediatek,mtk-vcodec-lat-soc</div><div class='ctx'> </div><div class='ctx'>       reg:</div><div class='ctx'>         maxItems: 1</div><div class='add'>+        description: VDEC_MISC register space</div><div class='ctx'> </div><div class='ctx'>       interrupts:</div><div class='ctx'>         maxItems: 1</div><div class='hunk'>@@ -102,69 +114,13 @@ patternProperties:</div><div class='ctx'>           Refer to bindings/iommu/mediatek,iommu.yaml.</div><div class='ctx'> </div><div class='ctx'>       clocks:</div><div class='add'>+        minItems: 4</div><div class='ctx'>         maxItems: 5</div><div class='ctx'> </div><div class='ctx'>       clock-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: sel</div><div class='del'>-          - const: soc-vdec</div><div class='del'>-          - const: soc-lat</div><div class='del'>-          - const: vdec</div><div class='del'>-          - const: top</div><div class='del'>-</div><div class='del'>-      assigned-clocks:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      assigned-clock-parents:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      power-domains:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - reg</div><div class='del'>-      - interrupts</div><div class='del'>-      - iommus</div><div class='del'>-      - clocks</div><div class='del'>-      - clock-names</div><div class='del'>-      - assigned-clocks</div><div class='del'>-      - assigned-clock-parents</div><div class='del'>-      - power-domains</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-  '^vcodec-core@[0-9a-f]+$':</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        const: mediatek,mtk-vcodec-core</div><div class='del'>-</div><div class='del'>-      reg:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      iommus:</div><div class='del'>-        minItems: 1</div><div class='del'>-        maxItems: 32</div><div class='del'>-        description: |</div><div class='del'>-          List of the hardware port in respective IOMMU block for current Socs.</div><div class='del'>-          Refer to bindings/iommu/mediatek,iommu.yaml.</div><div class='del'>-</div><div class='del'>-      clocks:</div><div class='add'>+        minItems: 4</div><div class='ctx'>         maxItems: 5</div><div class='ctx'> </div><div class='del'>-      clock-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: sel</div><div class='del'>-          - const: soc-vdec</div><div class='del'>-          - const: soc-lat</div><div class='del'>-          - const: vdec</div><div class='del'>-          - const: top</div><div class='del'>-</div><div class='ctx'>       assigned-clocks:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -177,7 +133,6 @@ patternProperties:</div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='ctx'>       - reg</div><div class='del'>-      - interrupts</div><div class='ctx'>       - iommus</div><div class='ctx'>       - clocks</div><div class='ctx'>       - clock-names</div><div class='hunk'>@@ -192,9 +147,52 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - iommus</div><div class='ctx'>   - mediatek,scp</div><div class='del'>-  - dma-ranges</div><div class='ctx'>   - ranges</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - mediatek,mtk-vcodec-core</div><div class='add'>+          - mediatek,mtk-vcodec-lat</div><div class='add'>+</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt8192-vcodec-dec</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: sel</div><div class='add'>+            - const: soc-vdec</div><div class='add'>+            - const: soc-lat</div><div class='add'>+            - const: vdec</div><div class='add'>+            - const: top</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt8195-vcodec-dec</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: sel</div><div class='add'>+            - const: vdec</div><div class='add'>+            - const: lat</div><div class='add'>+            - const: top</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -214,12 +212,11 @@ examples:</div><div class='ctx'>             compatible = "mediatek,mt8192-vcodec-dec";</div><div class='ctx'>             mediatek,scp = &lt;&amp;scp&gt;;</div><div class='ctx'>             iommus = &lt;&amp;iommu0 M4U_PORT_L4_VDEC_MC_EXT&gt;;</div><div class='del'>-            dma-ranges = &lt;0x1 0x0 0x0 0x40000000 0x0 0xfff00000&gt;;</div><div class='ctx'>             #address-cells = &lt;2&gt;;</div><div class='ctx'>             #size-cells = &lt;2&gt;;</div><div class='ctx'>             ranges = &lt;0 0 0 0x16000000 0 0x40000&gt;;</div><div class='ctx'>             reg = &lt;0 0x16000000 0 0x1000&gt;;		/* VDEC_SYS */</div><div class='del'>-            vcodec-lat@10000 {</div><div class='add'>+            video-codec@10000 {</div><div class='ctx'>                 compatible = "mediatek,mtk-vcodec-lat";</div><div class='ctx'>                 reg = &lt;0 0x10000 0 0x800&gt;;</div><div class='ctx'>                 interrupts = &lt;GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='hunk'>@@ -242,7 +239,7 @@ examples:</div><div class='ctx'>                 power-domains = &lt;&amp;spm MT8192_POWER_DOMAIN_VDEC&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='del'>-            vcodec-core@25000 {</div><div class='add'>+            video-codec@25000 {</div><div class='ctx'>                 compatible = "mediatek,mtk-vcodec-core";</div><div class='ctx'>                 reg = &lt;0 0x25000 0 0x1000&gt;;</div><div class='ctx'>                 interrupts = &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml<br/>index 052e752157b4..cfabf360f278 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek-jpeg-decoder.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/mediatek-jpeg-decoder.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek JPEG Decoder Device Tree Bindings</div><div class='add'>+title: MediaTek JPEG Decoder</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Xia Jiang &lt;xia.jiang@mediatek.com&gt;</div><div class='hunk'>@@ -22,6 +22,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt7623-jpgdec</div><div class='add'>+              - mediatek,mt8188-jpgdec</div><div class='ctx'>           - const: mediatek,mt2701-jpgdec</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml<br/>index 8bfdfdfaba59..37800e1908cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/mediatek-jpeg-encoder.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek JPEG Encoder Device Tree Bindings</div><div class='add'>+title: MediaTek JPEG Encoder</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Xia Jiang &lt;xia.jiang@mediatek.com&gt;</div><div class='hunk'>@@ -18,6 +18,8 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - mediatek,mt2701-jpgenc</div><div class='ctx'>           - mediatek,mt8183-jpgenc</div><div class='add'>+          - mediatek,mt8186-jpgenc</div><div class='add'>+          - mediatek,mt8188-jpgenc</div><div class='ctx'>       - const: mediatek,mtk-jpgenc</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/meson-ir.txt b/Documentation/devicetree/bindings/media/meson-ir.txt<br/>deleted file mode 100644<br/>index efd9d29a8f10..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/meson-ir.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/meson-ir.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-* Amlogic Meson IR remote control receiver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible	: depending on the platform this should be one of:</div><div class='del'>-		  - "amlogic,meson6-ir"</div><div class='del'>-		  - "amlogic,meson8b-ir"</div><div class='del'>-		  - "amlogic,meson-gxbb-ir"</div><div class='del'>- - reg		: physical base address and length of the device registers</div><div class='del'>- - interrupts	: a single specifier for the interrupt from the device</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>- - linux,rc-map-name:	see rc.txt file in the same directory.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	ir-receiver@c8100480 {</div><div class='del'>-		compatible= "amlogic,meson6-ir";</div><div class='del'>-		reg = &lt;0xc8100480 0x20&gt;;</div><div class='del'>-		interrupts = &lt;0 15 1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml b/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml<br/>index e8544fb2d034..b3a345fc6464 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/microchip,csi2dc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/microchip,csi2dc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/microchip,csi2dc.yaml</a></div><div class='hunk'>@@ -75,6 +75,7 @@ properties:</div><div class='ctx'>     properties:</div><div class='ctx'>       port@0:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description:</div><div class='ctx'>           Input port node, single endpoint describing the input port.</div><div class='ctx'> </div><div class='hunk'>@@ -103,6 +104,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       port@1:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description:</div><div class='ctx'>           Output port node, single endpoint describing the output port.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml b/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml<br/>index 4b77103ca913..59b805ca47c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/microchip,sama5d4-vdec.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/microchip,sama5d4-vdec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Hantro G1 VPU codec implemented on Microchip SAMA5D4 SoCs</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/microchip,xisc.yaml b/Documentation/devicetree/bindings/media/microchip,xisc.yaml<br/>index 086e1430af4f..25f5f79d40ce 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/microchip,xisc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/microchip,xisc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/microchip,xisc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/microchip,xisc.yaml</a></div><div class='hunk'>@@ -67,7 +67,7 @@ properties:</div><div class='ctx'>           remote-endpoint: true</div><div class='ctx'> </div><div class='ctx'>           bus-width:</div><div class='del'>-            enum: [8, 9, 10, 11, 12]</div><div class='add'>+            enum: [8, 9, 10, 11, 12, 14]</div><div class='ctx'>             default: 12</div><div class='ctx'> </div><div class='ctx'>           hsync-active:</div><div class='hunk'>@@ -106,6 +106,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/clock/at91.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='ctx'> </div><div class='ctx'>     xisc: xisc@e1408000 {</div><div class='ctx'>         compatible = "microchip,sama7g5-isc";</div><div class='hunk'>@@ -118,7 +119,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         port {</div><div class='ctx'>                 xisc_in: endpoint {</div><div class='del'>-                       bus-type = &lt;5&gt;; /* Parallel */</div><div class='add'>+                       bus-type = &lt;MEDIA_BUS_TYPE_PARALLEL&gt;;</div><div class='ctx'>                        remote-endpoint = &lt;&amp;csi2dc_out&gt;;</div><div class='ctx'>                        hsync-active = &lt;1&gt;;</div><div class='ctx'>                        vsync-active = &lt;1&gt;;</div><div class='hunk'>@@ -126,4 +127,3 @@ examples:</div><div class='ctx'>                 };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/nxp,dw100.yaml b/Documentation/devicetree/bindings/media/nxp,dw100.yaml<br/>new file mode 100644<br/>index 000000000000..21910ff0e1c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,dw100.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/nxp,dw100.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/nxp,dw100.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX8MP DW100 Dewarper core</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Xavier Roumegue &lt;xavier.roumegue@oss.nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |-</div><div class='add'>+  The Dewarp Engine provides high-performance dewarp processing for the</div><div class='add'>+  correction of the distortion that is introduced in images produced by fisheye</div><div class='add'>+  and wide angle lenses. It is implemented with a line/tile-cache based</div><div class='add'>+  architecture. With configurable address mapping look up tables and per tile</div><div class='add'>+  processing, it successfully generates a corrected output image.</div><div class='add'>+  The engine can be used to perform scaling, cropping and pixel format</div><div class='add'>+  conversion.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nxp,imx8mp-dw100</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The AXI clock</div><div class='add'>+      - description: The AHB clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: ahb</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/imx8mp-power.h&gt;</div><div class='add'>+</div><div class='add'>+    dewarp: dwe@32e30000 {</div><div class='add'>+            compatible = "nxp,imx8mp-dw100";</div><div class='add'>+            reg = &lt;0x32e30000 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI_ROOT&gt;,</div><div class='add'>+                     &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;;</div><div class='add'>+            clock-names = "axi", "ahb";</div><div class='add'>+            power-domains = &lt;&amp;media_blk_ctrl IMX8MP_MEDIABLK_PD_DWE&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml b/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml<br/>index 36b135bf9f2a..03a23a26c4f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/nxp,imx-mipi-csi2.yaml</a></div><div class='hunk'>@@ -22,9 +22,14 @@ description: |-</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - fsl,imx7-mipi-csi2</div><div class='del'>-      - fsl,imx8mm-mipi-csi2</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx7-mipi-csi2</div><div class='add'>+          - fsl,imx8mm-mipi-csi2</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mp-mipi-csi2</div><div class='add'>+          - const: fsl,imx8mm-mipi-csi2</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml b/Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml<br/>index 4f7b78265336..358019e85d90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/nxp,imx7-csi.yaml</a></div><div class='hunk'>@@ -37,6 +37,9 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: mclk</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   port:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='hunk'>@@ -50,6 +53,18 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx8mq-csi</div><div class='add'>+              - fsl,imx8mm-csi</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/imx7d-clock.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml<br/>new file mode 100644<br/>index 000000000000..6038b9b5ab36<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/nxp,imx8-isi.yaml</a></div><div class='hunk'>@@ -0,0 +1,173 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX8 Image Sensing Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Image Sensing Interface (ISI) combines image processing pipelines with</div><div class='add'>+  DMA engines to process and capture frames originating from a variety of</div><div class='add'>+  sources. The inputs to the ISI go through Pixel Link interfaces, and their</div><div class='add'>+  number and nature is SoC-dependent. They cover both capture interfaces (MIPI</div><div class='add'>+  CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8mn-isi</div><div class='add'>+      - fsl,imx8mp-isi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The AXI clock</div><div class='add'>+      - description: The APB clock</div><div class='add'>+      # TODO: Check if the per-channel ipg_proc_clk clocks need to be specified</div><div class='add'>+      # as well, in case some SoCs have the ability to control them separately.</div><div class='add'>+      # This may be the case of the i.MX8[DQ]X(P)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: apb</div><div class='add'>+</div><div class='add'>+  fsl,blk-ctrl:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      A phandle referencing the block control that contains the CSIS to ISI</div><div class='add'>+      gasket.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: Processing pipeline interrupts, one per pipeline</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    description: |</div><div class='add'>+      Ports represent the Pixel Link inputs to the ISI. Their number and</div><div class='add'>+      assignment are model-dependent. Each port shall have a single endpoint.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - fsl,blk-ctrl</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8mn-isi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        ports:</div><div class='add'>+          properties:</div><div class='add'>+            port@0:</div><div class='add'>+              description: MIPI CSI-2 RX</div><div class='add'>+          required:</div><div class='add'>+            - port@0</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8mp-isi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        ports:</div><div class='add'>+          properties:</div><div class='add'>+            port@0:</div><div class='add'>+              description: MIPI CSI-2 RX 0</div><div class='add'>+            port@1:</div><div class='add'>+              description: MIPI CSI-2 RX 1</div><div class='add'>+          required:</div><div class='add'>+            - port@0</div><div class='add'>+            - port@1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mn-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/imx8mn-power.h&gt;</div><div class='add'>+</div><div class='add'>+    isi@32e20000 {</div><div class='add'>+        compatible = "fsl,imx8mn-isi";</div><div class='add'>+        reg = &lt;0x32e20000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MN_CLK_DISP_AXI_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MN_CLK_DISP_APB_ROOT&gt;;</div><div class='add'>+        clock-names = "axi", "apb";</div><div class='add'>+        fsl,blk-ctrl = &lt;&amp;disp_blk_ctrl&gt;;</div><div class='add'>+        power-domains = &lt;&amp;disp_blk_ctrl IMX8MN_DISPBLK_PD_ISI&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                isi_in: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_csi_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    isi@32e00000 {</div><div class='add'>+        compatible = "fsl,imx8mp-isi";</div><div class='add'>+        reg = &lt;0x32e00000 0x4000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;;</div><div class='add'>+        clock-names = "axi", "apb";</div><div class='add'>+        fsl,blk-ctrl = &lt;&amp;media_blk_ctrl&gt;;</div><div class='add'>+        power-domains = &lt;&amp;mediamix_pd&gt;;</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                isi_in_0: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_csi_0_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                isi_in_1: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;mipi_csi_1_out&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml<br/>index 3cc6f42aeb76..3d9d1db37040 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: i.MX8QXP/QM JPEG decoder/encoder Device Tree Bindings</div><div class='add'>+title: i.MX8QXP/QM JPEG decoder/encoder</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mirela Rabulea &lt;mirela.rabulea@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml<br/>index 7dc13a4b1805..3d58f02b0c5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml<br/>index 12ec3e1ea869..eb1499912c58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,msm8916-camss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,msm8916-camss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm CAMSS ISP</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml<br/>index 59ab16ad12f1..2350bf4b370e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm MSM8916 Venus video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -14,16 +13,13 @@ description: |</div><div class='ctx'>   The Venus IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,msm8916-venus</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -39,9 +35,6 @@ properties:</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   video-decoder:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='hunk'>@@ -66,56 +59,36 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='ctx'>   - video-decoder</div><div class='ctx'>   - video-encoder</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='del'>-</div><div class='del'>-        video-codec@1d00000 {</div><div class='del'>-                compatible = "qcom,msm8916-venus";</div><div class='del'>-                reg = &lt;0x01d00000 0xff000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                clocks = &lt;&amp;gcc GCC_VENUS0_VCODEC0_CLK&gt;,</div><div class='del'>-                        &lt;&amp;gcc GCC_VENUS0_AHB_CLK&gt;,</div><div class='del'>-                        &lt;&amp;gcc GCC_VENUS0_AXI_CLK&gt;;</div><div class='del'>-                clock-names = "core", "iface", "bus";</div><div class='del'>-                power-domains = &lt;&amp;gcc VENUS_GDSC&gt;;</div><div class='del'>-                iommus = &lt;&amp;apps_iommu 5&gt;;</div><div class='del'>-                memory-region = &lt;&amp;venus_mem&gt;;</div><div class='del'>-</div><div class='del'>-                video-decoder {</div><div class='del'>-                        compatible = "venus-decoder";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-encoder {</div><div class='del'>-                        compatible = "venus-encoder";</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='add'>+</div><div class='add'>+    video-codec@1d00000 {</div><div class='add'>+        compatible = "qcom,msm8916-venus";</div><div class='add'>+        reg = &lt;0x01d00000 0xff000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_VENUS0_VCODEC0_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_VENUS0_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_VENUS0_AXI_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface", "bus";</div><div class='add'>+        power-domains = &lt;&amp;gcc VENUS_GDSC&gt;;</div><div class='add'>+        iommus = &lt;&amp;apps_iommu 5&gt;;</div><div class='add'>+        memory-region = &lt;&amp;venus_mem&gt;;</div><div class='add'>+</div><div class='add'>+        video-decoder {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-encoder {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml<br/>index 6aeb3d6d02d5..8a10aa1cafc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,msm8996-camss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm CAMSS ISP</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml<br/>index 199f45217b4a..3a4d817e544e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,msm8996-venus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm MSM8996 Venus video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -14,16 +13,13 @@ description: |</div><div class='ctx'>   The Venus IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,msm8996-venus</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -37,12 +33,17 @@ properties:</div><div class='ctx'>       - const: bus</div><div class='ctx'>       - const: mbus</div><div class='ctx'> </div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: video-mem</div><div class='add'>+      - const: cpu-cfg</div><div class='add'>+</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 20</div><div class='ctx'> </div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   video-decoder:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='hunk'>@@ -93,82 +94,62 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='ctx'>   - video-decoder</div><div class='ctx'>   - video-encoder</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,mmcc-msm8996.h&gt;</div><div class='del'>-</div><div class='del'>-        video-codec@c00000 {</div><div class='del'>-                compatible = "qcom,msm8996-venus";</div><div class='del'>-                reg = &lt;0x00c00000 0xff000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                clocks = &lt;&amp;mmcc VIDEO_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;mmcc VIDEO_AHB_CLK&gt;,</div><div class='del'>-                         &lt;&amp;mmcc VIDEO_AXI_CLK&gt;,</div><div class='del'>-                         &lt;&amp;mmcc VIDEO_MAXI_CLK&gt;;</div><div class='del'>-                clock-names = "core", "iface", "bus", "mbus";</div><div class='del'>-                power-domains = &lt;&amp;mmcc VENUS_GDSC&gt;;</div><div class='del'>-                iommus =  &lt;&amp;venus_smmu 0x00&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x01&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x0a&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x07&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x0e&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x0f&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x08&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x09&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x0b&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x0c&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x0d&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x10&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x11&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x21&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x28&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x29&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x2b&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x2c&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x2d&gt;,</div><div class='del'>-                          &lt;&amp;venus_smmu 0x31&gt;;</div><div class='del'>-                memory-region = &lt;&amp;venus_mem&gt;;</div><div class='del'>-</div><div class='del'>-                video-decoder {</div><div class='del'>-                        compatible = "venus-decoder";</div><div class='del'>-                        clocks = &lt;&amp;mmcc VIDEO_SUBCORE0_CLK&gt;;</div><div class='del'>-                        clock-names = "core";</div><div class='del'>-                        power-domains = &lt;&amp;mmcc VENUS_CORE0_GDSC&gt;;</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-encoder {</div><div class='del'>-                        compatible = "venus-encoder";</div><div class='del'>-                        clocks = &lt;&amp;mmcc VIDEO_SUBCORE1_CLK&gt;;</div><div class='del'>-                        clock-names = "core";</div><div class='del'>-                        power-domains = &lt;&amp;mmcc VENUS_CORE1_GDSC&gt;;</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,mmcc-msm8996.h&gt;</div><div class='add'>+</div><div class='add'>+    video-codec@c00000 {</div><div class='add'>+        compatible = "qcom,msm8996-venus";</div><div class='add'>+        reg = &lt;0x00c00000 0xff000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;mmcc VIDEO_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc VIDEO_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc VIDEO_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc VIDEO_MAXI_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface", "bus", "mbus";</div><div class='add'>+        power-domains = &lt;&amp;mmcc VENUS_GDSC&gt;;</div><div class='add'>+        iommus =  &lt;&amp;venus_smmu 0x00&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x01&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x0a&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x07&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x0e&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x0f&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x08&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x09&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x0b&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x0c&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x0d&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x10&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x11&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x21&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x28&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x29&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x2b&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x2c&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x2d&gt;,</div><div class='add'>+                  &lt;&amp;venus_smmu 0x31&gt;;</div><div class='add'>+        memory-region = &lt;&amp;venus_mem&gt;;</div><div class='add'>+</div><div class='add'>+        video-decoder {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+            clocks = &lt;&amp;mmcc VIDEO_SUBCORE0_CLK&gt;;</div><div class='add'>+            clock-names = "core";</div><div class='add'>+            power-domains = &lt;&amp;mmcc VENUS_CORE0_GDSC&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-encoder {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='add'>+            clocks = &lt;&amp;mmcc VIDEO_SUBCORE1_CLK&gt;;</div><div class='add'>+            clock-names = "core";</div><div class='add'>+            power-domains = &lt;&amp;mmcc VENUS_CORE1_GDSC&gt;;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml<br/>index 90b4af2c9724..5cec1d077cda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sc7180-venus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm SC7180 Venus video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -14,16 +13,13 @@ description: |</div><div class='ctx'>   The Venus IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sc7180-venus</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 3</div><div class='hunk'>@@ -60,6 +56,10 @@ properties:</div><div class='ctx'>       - const: video-mem</div><div class='ctx'>       - const: cpu-cfg</div><div class='ctx'> </div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='ctx'>   video-decoder:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='hunk'>@@ -84,62 +84,42 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - power-domains</div><div class='ctx'>   - power-domain-names</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='ctx'>   - video-decoder</div><div class='ctx'>   - video-encoder</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,videocc-sc7180.h&gt;</div><div class='del'>-</div><div class='del'>-        venus: video-codec@aa00000 {</div><div class='del'>-                compatible = "qcom,sc7180-venus";</div><div class='del'>-                reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                power-domains = &lt;&amp;videocc VENUS_GDSC&gt;,</div><div class='del'>-                                &lt;&amp;videocc VCODEC0_GDSC&gt;;</div><div class='del'>-                power-domain-names = "venus", "vcodec0";</div><div class='del'>-                clocks = &lt;&amp;videocc VIDEO_CC_VENUS_CTL_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VENUS_CTL_AXI_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VCODEC0_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VCODEC0_AXI_CLK&gt;;</div><div class='del'>-                clock-names = "core", "iface", "bus",</div><div class='del'>-                              "vcodec0_core", "vcodec0_bus";</div><div class='del'>-                iommus = &lt;&amp;apps_smmu 0x0c00 0x60&gt;;</div><div class='del'>-                memory-region = &lt;&amp;venus_mem&gt;;</div><div class='del'>-</div><div class='del'>-                video-decoder {</div><div class='del'>-                        compatible = "venus-decoder";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-encoder {</div><div class='del'>-                        compatible = "venus-encoder";</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,videocc-sc7180.h&gt;</div><div class='add'>+</div><div class='add'>+    venus: video-codec@aa00000 {</div><div class='add'>+        compatible = "qcom,sc7180-venus";</div><div class='add'>+        reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        power-domains = &lt;&amp;videocc VENUS_GDSC&gt;,</div><div class='add'>+                        &lt;&amp;videocc VCODEC0_GDSC&gt;;</div><div class='add'>+        power-domain-names = "venus", "vcodec0";</div><div class='add'>+        clocks = &lt;&amp;videocc VIDEO_CC_VENUS_CTL_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VENUS_CTL_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VCODEC0_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VCODEC0_AXI_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface", "bus",</div><div class='add'>+                      "vcodec0_core", "vcodec0_bus";</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x0c00 0x60&gt;;</div><div class='add'>+        memory-region = &lt;&amp;venus_mem&gt;;</div><div class='add'>+</div><div class='add'>+        video-decoder {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-encoder {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml<br/>index e2874683b4d5..8f9b6433aeb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sc7280-venus.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sc7280-venus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm SC7280 Venus video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -14,16 +13,13 @@ description: |</div><div class='ctx'>   The Venus Iris2 IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sc7280-venus</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 3</div><div class='hunk'>@@ -49,9 +45,6 @@ properties:</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   interconnects:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='hunk'>@@ -60,6 +53,10 @@ properties:</div><div class='ctx'>       - const: cpu-cfg</div><div class='ctx'>       - const: video-mem</div><div class='ctx'> </div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='ctx'>   video-decoder:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='hunk'>@@ -84,78 +81,58 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - power-domains</div><div class='ctx'>   - power-domain-names</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='ctx'>   - video-decoder</div><div class='ctx'>   - video-encoder</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,videocc-sc7280.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/interconnect/qcom,sc7280.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='del'>-</div><div class='del'>-        venus: video-codec@aa00000 {</div><div class='del'>-                compatible = "qcom,sc7280-venus";</div><div class='del'>-                reg = &lt;0x0aa00000 0xd0600&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-                clocks = &lt;&amp;videocc VIDEO_CC_MVSC_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_MVSC_CTL_AXI_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_MVS0_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_MVS0_AXI_CLK&gt;;</div><div class='del'>-                clock-names = "core", "bus", "iface",</div><div class='del'>-                              "vcodec_core", "vcodec_bus";</div><div class='del'>-</div><div class='del'>-                power-domains = &lt;&amp;videocc MVSC_GDSC&gt;,</div><div class='del'>-                                &lt;&amp;videocc MVS0_GDSC&gt;,</div><div class='del'>-                                &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='del'>-                power-domain-names = "venus", "vcodec0", "cx";</div><div class='del'>-</div><div class='del'>-                interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;cnoc2 SLAVE_VENUS_CFG 0&gt;,</div><div class='del'>-                                &lt;&amp;mmss_noc MASTER_VIDEO_P0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='del'>-                interconnect-names = "cpu-cfg", "video-mem";</div><div class='del'>-</div><div class='del'>-                iommus = &lt;&amp;apps_smmu 0x2180 0x20&gt;,</div><div class='del'>-                         &lt;&amp;apps_smmu 0x2184 0x20&gt;;</div><div class='del'>-</div><div class='del'>-                memory-region = &lt;&amp;video_mem&gt;;</div><div class='del'>-</div><div class='del'>-                video-decoder {</div><div class='del'>-                        compatible = "venus-decoder";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-encoder {</div><div class='del'>-                        compatible = "venus-encoder";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-firmware {</div><div class='del'>-                        iommus = &lt;&amp;apps_smmu 0x21a2 0x0&gt;;</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,videocc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    venus: video-codec@aa00000 {</div><div class='add'>+        compatible = "qcom,sc7280-venus";</div><div class='add'>+        reg = &lt;0x0aa00000 0xd0600&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;videocc VIDEO_CC_MVSC_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_MVSC_CTL_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_MVS0_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_MVS0_AXI_CLK&gt;;</div><div class='add'>+        clock-names = "core", "bus", "iface",</div><div class='add'>+                      "vcodec_core", "vcodec_bus";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;videocc MVSC_GDSC&gt;,</div><div class='add'>+                        &lt;&amp;videocc MVS0_GDSC&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SC7280_CX&gt;;</div><div class='add'>+        power-domain-names = "venus", "vcodec0", "cx";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;cnoc2 SLAVE_VENUS_CFG 0&gt;,</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_VIDEO_P0 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+        interconnect-names = "cpu-cfg", "video-mem";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x2180 0x20&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x2184 0x20&gt;;</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;video_mem&gt;;</div><div class='add'>+</div><div class='add'>+        video-decoder {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-encoder {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-firmware {</div><div class='add'>+            iommus = &lt;&amp;apps_smmu 0x21a2 0x0&gt;;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml<br/>index 338ab28d5f3b..0a109e126064 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sdm660-camss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm CAMSS ISP</div><div class='ctx'> </div><div class='hunk'>@@ -84,6 +84,13 @@ properties:</div><div class='ctx'>       - const: vfe0</div><div class='ctx'>       - const: vfe1</div><div class='ctx'> </div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vfe-mem</div><div class='add'>+</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml<br/>index 33da7d3cfd38..a51835b22045 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sdm660-venus.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm SDM660 Venus video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -15,13 +14,13 @@ description: |</div><div class='ctx'>   The Venus IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sdm660-venus</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='hunk'>@@ -40,15 +39,9 @@ properties:</div><div class='ctx'>       - const: cpu-cfg</div><div class='ctx'>       - const: video-mem</div><div class='ctx'> </div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 20</div><div class='ctx'> </div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -102,85 +95,65 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='del'>-  - interrupts</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='del'>-  - power-domains</div><div class='ctx'>   - video-decoder</div><div class='ctx'>   - video-encoder</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,mmcc-sdm660.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-</div><div class='del'>-        video-codec@cc00000 {</div><div class='del'>-                compatible = "qcom,sdm660-venus";</div><div class='del'>-                reg = &lt;0x0cc00000 0xff000&gt;;</div><div class='del'>-                clocks = &lt;&amp;mmcc VIDEO_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;mmcc VIDEO_AHB_CLK&gt;,</div><div class='del'>-                         &lt;&amp;mmcc VIDEO_AXI_CLK&gt;,</div><div class='del'>-                         &lt;&amp;mmcc THROTTLE_VIDEO_AXI_CLK&gt;;</div><div class='del'>-                clock-names = "core", "iface", "bus", "bus_throttle";</div><div class='del'>-                interconnects = &lt;&amp;gnoc 0 &amp;mnoc 13&gt;,</div><div class='del'>-                                &lt;&amp;mnoc 4 &amp;bimc 5&gt;;</div><div class='del'>-                interconnect-names = "cpu-cfg", "video-mem";</div><div class='del'>-                interrupts = &lt;GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                iommus = &lt;&amp;mmss_smmu 0x400&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x401&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x40a&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x407&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x40e&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x40f&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x408&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x409&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x40b&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x40c&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x40d&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x410&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x421&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x428&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x429&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x42b&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x42c&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x42d&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x411&gt;,</div><div class='del'>-                         &lt;&amp;mmss_smmu 0x431&gt;;</div><div class='del'>-                memory-region = &lt;&amp;venus_region&gt;;</div><div class='del'>-                power-domains = &lt;&amp;mmcc VENUS_GDSC&gt;;</div><div class='del'>-</div><div class='del'>-                video-decoder {</div><div class='del'>-                        compatible = "venus-decoder";</div><div class='del'>-                        clocks = &lt;&amp;mmcc VIDEO_SUBCORE0_CLK&gt;;</div><div class='del'>-                        clock-names = "vcodec0_core";</div><div class='del'>-                        power-domains = &lt;&amp;mmcc VENUS_CORE0_GDSC&gt;;</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-encoder {</div><div class='del'>-                        compatible = "venus-encoder";</div><div class='del'>-                        clocks = &lt;&amp;mmcc VIDEO_SUBCORE0_CLK&gt;;</div><div class='del'>-                        clock-names = "vcodec0_core";</div><div class='del'>-                        power-domains = &lt;&amp;mmcc VENUS_CORE0_GDSC&gt;;</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,mmcc-sdm660.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    video-codec@cc00000 {</div><div class='add'>+        compatible = "qcom,sdm660-venus";</div><div class='add'>+        reg = &lt;0x0cc00000 0xff000&gt;;</div><div class='add'>+        clocks = &lt;&amp;mmcc VIDEO_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc VIDEO_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc VIDEO_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;mmcc THROTTLE_VIDEO_AXI_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface", "bus", "bus_throttle";</div><div class='add'>+        interconnects = &lt;&amp;gnoc 0 &amp;mnoc 13&gt;,</div><div class='add'>+                        &lt;&amp;mnoc 4 &amp;bimc 5&gt;;</div><div class='add'>+        interconnect-names = "cpu-cfg", "video-mem";</div><div class='add'>+        interrupts = &lt;GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        iommus = &lt;&amp;mmss_smmu 0x400&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x401&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x40a&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x407&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x40e&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x40f&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x408&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x409&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x40b&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x40c&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x40d&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x410&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x421&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x428&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x429&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x42b&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x42c&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x42d&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x411&gt;,</div><div class='add'>+                 &lt;&amp;mmss_smmu 0x431&gt;;</div><div class='add'>+        memory-region = &lt;&amp;venus_region&gt;;</div><div class='add'>+        power-domains = &lt;&amp;mmcc VENUS_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        video-decoder {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+            clocks = &lt;&amp;mmcc VIDEO_SUBCORE0_CLK&gt;;</div><div class='add'>+            clock-names = "vcodec0_core";</div><div class='add'>+            power-domains = &lt;&amp;mmcc VENUS_CORE0_GDSC&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-encoder {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='add'>+            clocks = &lt;&amp;mmcc VIDEO_SUBCORE0_CLK&gt;;</div><div class='add'>+            clock-names = "vcodec0_core";</div><div class='add'>+            power-domains = &lt;&amp;mmcc VENUS_CORE0_GDSC&gt;;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml<br/>index f9a003882f84..1530ad0d80bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm CAMSS ISP</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml<br/>index 177bf81544b1..d5f80976f4cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sdm845-venus-v2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm SDM845 Venus v2 video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -14,16 +13,13 @@ description: |</div><div class='ctx'>   The Venus IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sdm845-venus-v2</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     minItems: 3</div><div class='ctx'>     maxItems: 4</div><div class='hunk'>@@ -52,8 +48,9 @@ properties:</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='ctx'> </div><div class='ctx'>   video-core0:</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -79,67 +76,47 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - power-domains</div><div class='ctx'>   - power-domain-names</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='ctx'>   - video-core0</div><div class='ctx'>   - video-core1</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,videocc-sdm845.h&gt;</div><div class='del'>-</div><div class='del'>-        video-codec@aa00000 {</div><div class='del'>-                compatible = "qcom,sdm845-venus-v2";</div><div class='del'>-                reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                clocks = &lt;&amp;videocc VIDEO_CC_VENUS_CTL_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VENUS_CTL_AXI_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VCODEC0_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VCODEC0_AXI_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VCODEC1_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VCODEC1_AXI_CLK&gt;;</div><div class='del'>-                clock-names = "core", "iface", "bus",</div><div class='del'>-                              "vcodec0_core", "vcodec0_bus",</div><div class='del'>-                              "vcodec1_core", "vcodec1_bus";</div><div class='del'>-                power-domains = &lt;&amp;videocc VENUS_GDSC&gt;,</div><div class='del'>-                                &lt;&amp;videocc VCODEC0_GDSC&gt;,</div><div class='del'>-                                &lt;&amp;videocc VCODEC1_GDSC&gt;;</div><div class='del'>-                power-domain-names = "venus", "vcodec0", "vcodec1";</div><div class='del'>-                iommus = &lt;&amp;apps_smmu 0x10a0 0x8&gt;,</div><div class='del'>-                         &lt;&amp;apps_smmu 0x10b0 0x0&gt;;</div><div class='del'>-                memory-region = &lt;&amp;venus_mem&gt;;</div><div class='del'>-</div><div class='del'>-                video-core0 {</div><div class='del'>-                        compatible = "venus-decoder";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-core1 {</div><div class='del'>-                        compatible = "venus-encoder";</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,videocc-sdm845.h&gt;</div><div class='add'>+</div><div class='add'>+    video-codec@aa00000 {</div><div class='add'>+        compatible = "qcom,sdm845-venus-v2";</div><div class='add'>+        reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;videocc VIDEO_CC_VENUS_CTL_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VENUS_CTL_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VCODEC0_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VCODEC0_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VCODEC1_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VCODEC1_AXI_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface", "bus",</div><div class='add'>+                      "vcodec0_core", "vcodec0_bus",</div><div class='add'>+                      "vcodec1_core", "vcodec1_bus";</div><div class='add'>+        power-domains = &lt;&amp;videocc VENUS_GDSC&gt;,</div><div class='add'>+                        &lt;&amp;videocc VCODEC0_GDSC&gt;,</div><div class='add'>+                        &lt;&amp;videocc VCODEC1_GDSC&gt;;</div><div class='add'>+        power-domain-names = "venus", "vcodec0", "vcodec1";</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x10a0 0x8&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x10b0 0x0&gt;;</div><div class='add'>+        memory-region = &lt;&amp;venus_mem&gt;;</div><div class='add'>+</div><div class='add'>+        video-core0 {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-core1 {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml<br/>index 680f37726fdf..eabc0957b241 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm SDM845 Venus video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -14,16 +13,13 @@ description: |</div><div class='ctx'>   The Venus IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sdm845-venus</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -39,9 +35,6 @@ properties:</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   video-core0:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='hunk'>@@ -94,65 +87,45 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - power-domains</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='ctx'>   - video-core0</div><div class='ctx'>   - video-core1</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,videocc-sdm845.h&gt;</div><div class='del'>-</div><div class='del'>-        video-codec@aa00000 {</div><div class='del'>-                compatible = "qcom,sdm845-venus";</div><div class='del'>-                reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                clocks = &lt;&amp;videocc VIDEO_CC_VENUS_CTL_CORE_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='del'>-                         &lt;&amp;videocc VIDEO_CC_VENUS_CTL_AXI_CLK&gt;;</div><div class='del'>-                clock-names = "core", "iface", "bus";</div><div class='del'>-                power-domains = &lt;&amp;videocc VENUS_GDSC&gt;;</div><div class='del'>-                iommus = &lt;&amp;apps_smmu 0x10a0 0x8&gt;,</div><div class='del'>-                         &lt;&amp;apps_smmu 0x10b0 0x0&gt;;</div><div class='del'>-                memory-region = &lt;&amp;venus_mem&gt;;</div><div class='del'>-</div><div class='del'>-                video-core0 {</div><div class='del'>-                        compatible = "venus-decoder";</div><div class='del'>-                        clocks = &lt;&amp;videocc VIDEO_CC_VCODEC0_CORE_CLK&gt;,</div><div class='del'>-                                 &lt;&amp;videocc VIDEO_CC_VCODEC0_AXI_CLK&gt;;</div><div class='del'>-                        clock-names = "core", "bus";</div><div class='del'>-                        power-domains = &lt;&amp;videocc VCODEC0_GDSC&gt;;</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                video-core1 {</div><div class='del'>-                        compatible = "venus-encoder";</div><div class='del'>-                        clocks = &lt;&amp;videocc VIDEO_CC_VCODEC1_CORE_CLK&gt;,</div><div class='del'>-                                 &lt;&amp;videocc VIDEO_CC_VCODEC1_AXI_CLK&gt;;</div><div class='del'>-                        clock-names = "core", "bus";</div><div class='del'>-                        power-domains = &lt;&amp;videocc VCODEC1_GDSC&gt;;</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,videocc-sdm845.h&gt;</div><div class='add'>+</div><div class='add'>+    video-codec@aa00000 {</div><div class='add'>+        compatible = "qcom,sdm845-venus";</div><div class='add'>+        reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;videocc VIDEO_CC_VENUS_CTL_CORE_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VENUS_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_VENUS_CTL_AXI_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface", "bus";</div><div class='add'>+        power-domains = &lt;&amp;videocc VENUS_GDSC&gt;;</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x10a0 0x8&gt;,</div><div class='add'>+                 &lt;&amp;apps_smmu 0x10b0 0x0&gt;;</div><div class='add'>+        memory-region = &lt;&amp;venus_mem&gt;;</div><div class='add'>+</div><div class='add'>+        video-core0 {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+            clocks = &lt;&amp;videocc VIDEO_CC_VCODEC0_CORE_CLK&gt;,</div><div class='add'>+                     &lt;&amp;videocc VIDEO_CC_VCODEC0_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "core", "bus";</div><div class='add'>+            power-domains = &lt;&amp;videocc VCODEC0_GDSC&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-core1 {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='add'>+            clocks = &lt;&amp;videocc VIDEO_CC_VCODEC1_CORE_CLK&gt;,</div><div class='add'>+                     &lt;&amp;videocc VIDEO_CC_VCODEC1_AXI_CLK&gt;;</div><div class='add'>+            clock-names = "core", "bus";</div><div class='add'>+            power-domains = &lt;&amp;videocc VCODEC1_GDSC&gt;;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml<br/>index 07a2af12f37d..fa5073c0fd1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm CAMSS ISP</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml<br/>index ebf8f3d866a5..7915dcd2d99f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml</a></div><div class='hunk'>@@ -1,11 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Venus video encode and decode accelerators</div><div class='add'>+title: Qualcomm SM8250 Venus video encode and decode accelerators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;</div><div class='hunk'>@@ -14,16 +13,13 @@ description: |</div><div class='ctx'>   The Venus IP is a video encode and decode accelerator present</div><div class='ctx'>   on Qualcomm platforms</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: qcom,venus-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sm8250-venus</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 3</div><div class='hunk'>@@ -47,9 +43,6 @@ properties:</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   interconnects:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='hunk'>@@ -58,6 +51,10 @@ properties:</div><div class='ctx'>       - const: cpu-cfg</div><div class='ctx'>       - const: video-mem</div><div class='ctx'> </div><div class='add'>+  operating-points-v2: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='hunk'>@@ -90,77 +87,57 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  video-firmware:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description: |</div><div class='del'>-      Firmware subnode is needed when the platform does not</div><div class='del'>-      have TrustZone.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      iommus:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - iommus</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - power-domains</div><div class='ctx'>   - power-domain-names</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='ctx'>   - interconnects</div><div class='ctx'>   - interconnect-names</div><div class='ctx'>   - iommus</div><div class='del'>-  - memory-region</div><div class='ctx'>   - resets</div><div class='ctx'>   - reset-names</div><div class='ctx'>   - video-decoder</div><div class='ctx'>   - video-encoder</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,videocc-sm8250.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/interconnect/qcom,sm8250.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='del'>-        #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='del'>-</div><div class='del'>-        venus: video-codec@aa00000 {</div><div class='del'>-            compatible = "qcom,sm8250-venus";</div><div class='del'>-            reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            power-domains = &lt;&amp;videocc MVS0C_GDSC&gt;,</div><div class='del'>-                            &lt;&amp;videocc MVS0_GDSC&gt;,</div><div class='del'>-                            &lt;&amp;rpmhpd SM8250_MX&gt;;</div><div class='del'>-            power-domain-names = "venus", "vcodec0", "mx";</div><div class='del'>-</div><div class='del'>-            clocks = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK&gt;,</div><div class='del'>-                     &lt;&amp;videocc VIDEO_CC_MVS0C_CLK&gt;,</div><div class='del'>-                     &lt;&amp;videocc VIDEO_CC_MVS0_CLK&gt;;</div><div class='del'>-            clock-names = "iface", "core", "vcodec0_core";</div><div class='del'>-</div><div class='del'>-            interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 &amp;config_noc SLAVE_VENUS_CFG&gt;,</div><div class='del'>-                            &lt;&amp;mmss_noc MASTER_VIDEO_P0 &amp;mc_virt SLAVE_EBI_CH0&gt;;</div><div class='del'>-            interconnect-names = "cpu-cfg", "video-mem";</div><div class='del'>-</div><div class='del'>-            iommus = &lt;&amp;apps_smmu 0x2100 0x0400&gt;;</div><div class='del'>-            memory-region = &lt;&amp;video_mem&gt;;</div><div class='del'>-</div><div class='del'>-            resets = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK_ARES&gt;,</div><div class='del'>-                     &lt;&amp;videocc VIDEO_CC_MVS0C_CLK_ARES&gt;;</div><div class='del'>-            reset-names = "bus", "core";</div><div class='del'>-</div><div class='del'>-            video-decoder {</div><div class='del'>-                compatible = "venus-decoder";</div><div class='del'>-            };</div><div class='del'>-</div><div class='del'>-            video-encoder {</div><div class='del'>-                compatible = "venus-encoder";</div><div class='del'>-            };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,videocc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    venus: video-codec@aa00000 {</div><div class='add'>+        compatible = "qcom,sm8250-venus";</div><div class='add'>+        reg = &lt;0x0aa00000 0xff000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        power-domains = &lt;&amp;videocc MVS0C_GDSC&gt;,</div><div class='add'>+                        &lt;&amp;videocc MVS0_GDSC&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SM8250_MX&gt;;</div><div class='add'>+        power-domain-names = "venus", "vcodec0", "mx";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_MVS0_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "core", "vcodec0_core";</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;gem_noc MASTER_AMPSS_M0 &amp;config_noc SLAVE_VENUS_CFG&gt;,</div><div class='add'>+                        &lt;&amp;mmss_noc MASTER_VIDEO_P0 &amp;mc_virt SLAVE_EBI_CH0&gt;;</div><div class='add'>+        interconnect-names = "cpu-cfg", "video-mem";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x2100 0x0400&gt;;</div><div class='add'>+        memory-region = &lt;&amp;video_mem&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;gcc GCC_VIDEO_AXI0_CLK_ARES&gt;,</div><div class='add'>+                 &lt;&amp;videocc VIDEO_CC_MVS0C_CLK_ARES&gt;;</div><div class='add'>+        reset-names = "bus", "core";</div><div class='add'>+</div><div class='add'>+        video-decoder {</div><div class='add'>+            compatible = "venus-decoder";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        video-encoder {</div><div class='add'>+            compatible = "venus-encoder";</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/qcom,venus-common.yaml b/Documentation/devicetree/bindings/media/qcom,venus-common.yaml<br/>new file mode 100644<br/>index 000000000000..3153d91f9d18<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/qcom,venus-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/qcom,venus-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/qcom,venus-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SoC Venus Video Encode and Decode Accelerators Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stanimir Varbanov &lt;stanimir.k.varbanov@gmail.com&gt;</div><div class='add'>+  - Vikash Garodia &lt;quic_vgarodia@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Venus IP is a video encode and decode accelerator present</div><div class='add'>+  on Qualcomm platforms</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 20</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  video-firmware:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    description: |</div><div class='add'>+      Firmware subnode is needed when the platform does not</div><div class='add'>+      have TrustZone.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      iommus:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - iommus</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - memory-region</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml<br/>index d4c541c4b164..7bbe580c80f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/rc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/rc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic Infrared Remote Controller Device Tree Bindings</div><div class='add'>+title: Generic Infrared Remote Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;</div><div class='hunk'>@@ -12,13 +12,13 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='del'>-    pattern: "^ir(@[a-f0-9]+)?$"</div><div class='add'>+    pattern: "^ir(-receiver)?(@[a-f0-9]+)?$"</div><div class='ctx'> </div><div class='ctx'>   linux,rc-map-name:</div><div class='ctx'>     description:</div><div class='ctx'>       Specifies the scancode/key mapping table defined in-kernel for</div><div class='ctx'>       the remote controller.</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/string'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     enum:</div><div class='ctx'>       - rc-adstech-dvb-t-pci</div><div class='ctx'>       - rc-alink-dtu-m</div><div class='hunk'>@@ -39,6 +39,7 @@ properties:</div><div class='ctx'>       - rc-avertv-303</div><div class='ctx'>       - rc-azurewave-ad-tu700</div><div class='ctx'>       - rc-beelink-gs1</div><div class='add'>+      - rc-beelink-mxiii</div><div class='ctx'>       - rc-behold</div><div class='ctx'>       - rc-behold-columbus</div><div class='ctx'>       - rc-budget-ci-old</div><div class='hunk'>@@ -55,6 +56,7 @@ properties:</div><div class='ctx'>       - rc-dm1105-nec</div><div class='ctx'>       - rc-dntv-live-dvb-t</div><div class='ctx'>       - rc-dntv-live-dvbt-pro</div><div class='add'>+      - rc-dreambox</div><div class='ctx'>       - rc-dtt200u</div><div class='ctx'>       - rc-dvbsky</div><div class='ctx'>       - rc-dvico-mce</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,ceu.yaml b/Documentation/devicetree/bindings/media/renesas,ceu.yaml<br/>index 50e0740af15a..d527fc42c3fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,ceu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,ceu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,ceu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,ceu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/renesas,ceu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Renesas Capture Engine Unit (CEU) Bindings</div><div class='add'>+title: Renesas Capture Engine Unit (CEU)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jacopo Mondi &lt;jacopo+renesas@jmondi.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,csi2.yaml b/Documentation/devicetree/bindings/media/renesas,csi2.yaml<br/>index b520d6c5c102..977ab188d654 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,csi2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,csi2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,csi2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,csi2.yaml</a></div><div class='hunk'>@@ -31,6 +31,7 @@ properties:</div><div class='ctx'>           - renesas,r8a77980-csi2 # R-Car V3H</div><div class='ctx'>           - renesas,r8a77990-csi2 # R-Car E3</div><div class='ctx'>           - renesas,r8a779a0-csi2 # R-Car V3U</div><div class='add'>+          - renesas,r8a779g0-csi2 # R-Car V4H</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,fcp.yaml b/Documentation/devicetree/bindings/media/renesas,fcp.yaml<br/>index 43f2fed8cd33..c6abe719881b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,fcp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,fcp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,fcp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,fcp.yaml</a></div><div class='hunk'>@@ -21,15 +21,22 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - renesas,fcpv # FCP for VSP</div><div class='del'>-      - renesas,fcpf # FCP for FDP</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,fcpv # FCP for VSP</div><div class='add'>+          - renesas,fcpf # FCP for FDP</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g044-fcpvd # RZ/G2{L,LC}</div><div class='add'>+              - renesas,r9a07g054-fcpvd # RZ/V2L</div><div class='add'>+          - const: renesas,fcpv         # Generic FCP for VSP fallback</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  clocks: true</div><div class='add'>+</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -49,6 +56,34 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,r9a07g044-fcpvd</div><div class='add'>+              - renesas,r9a07g054-fcpvd</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Main clock</div><div class='add'>+            - description: Register access clock</div><div class='add'>+            - description: Video clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aclk</div><div class='add'>+            - const: pclk</div><div class='add'>+            - const: vclk</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   # R8A7795 (R-Car H3) FCP for VSP-D1</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,isp.yaml b/Documentation/devicetree/bindings/media/renesas,isp.yaml<br/>index 514857d36f6b..33650a1ea034 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,isp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,isp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,isp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,isp.yaml</a></div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - renesas,r8a779a0-isp # V3U</div><div class='add'>+          - renesas,r8a779g0-isp # V4H</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml<br/>new file mode 100644<br/>index 000000000000..7dde7967c886<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml</a></div><div class='hunk'>@@ -0,0 +1,157 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Renesas Electronics Corp.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/G2L (and alike SoC's) Camera Data Receiving Unit (CRU) Image processing</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The CRU image processing module is a data conversion module equipped with pixel</div><div class='add'>+  color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and</div><div class='add'>+  parallel (including ITU-R BT.656) input are provided as the image sensor interface.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-cru       # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-cru       # RZ/V2L</div><div class='add'>+      - const: renesas,rzg2l-cru</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: image_conv</div><div class='add'>+      - const: image_conv_err</div><div class='add'>+      - const: axi_mst_err</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: CRU Main clock</div><div class='add'>+      - description: CRU Register access clock</div><div class='add'>+      - description: CRU image transfer clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: video</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: axi</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: CRU_PRESETN reset terminal</div><div class='add'>+      - description: CRU_ARESETN reset terminal</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: presetn</div><div class='add'>+      - const: aresetn</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description:</div><div class='add'>+          Input port node, single endpoint describing a parallel input source.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              hsync-active: true</div><div class='add'>+              vsync-active: true</div><div class='add'>+              bus-width: true</div><div class='add'>+              data-shift: true</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Input port node, describing the Image Processing module connected to the</div><div class='add'>+          CSI-2 receiver.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Device node example with CSI-2</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a07g044-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    cru: video@10830000 {</div><div class='add'>+        compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";</div><div class='add'>+        reg = &lt;0x10830000 0x400&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A07G044_CRU_VCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_CRU_PCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_CRU_ACLK&gt;;</div><div class='add'>+        clock-names = "video", "apb", "axi";</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg R9A07G044_CRU_PRESETN&gt;,</div><div class='add'>+                 &lt;&amp;cpg R9A07G044_CRU_ARESETN&gt;;</div><div class='add'>+        reset-names = "presetn", "aresetn";</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                cru_parallel_in: endpoint@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    remote-endpoint= &lt;&amp;ov5642&gt;;</div><div class='add'>+                    hsync-active = &lt;1&gt;;</div><div class='add'>+                    vsync-active = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                cru_csi_in: endpoint@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    remote-endpoint= &lt;&amp;csi_cru_in&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml b/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml<br/>new file mode 100644<br/>index 000000000000..67eea2ac1d22<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,rzg2l-csi2.yaml</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Renesas Electronics Corp.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L</div><div class='add'>+  (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction</div><div class='add'>+  with the Image Processing module, which provides the video capture capabilities.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-csi2       # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-csi2       # RZ/V2L</div><div class='add'>+      - const: renesas,rzg2l-csi2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Internal clock for connecting CRU and MIPI</div><div class='add'>+      - description: CRU Main clock</div><div class='add'>+      - description: CRU Register access clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: system</div><div class='add'>+      - const: video</div><div class='add'>+      - const: apb</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: CRU_PRESETN reset terminal</div><div class='add'>+      - description: CRU_CMN_RSTB reset terminal</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: presetn</div><div class='add'>+      - const: cmn-rstb</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description:</div><div class='add'>+          Input port node, single endpoint describing the CSI-2 transmitter.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+            properties:</div><div class='add'>+              data-lanes:</div><div class='add'>+                minItems: 1</div><div class='add'>+                maxItems: 4</div><div class='add'>+                items:</div><div class='add'>+                  maximum: 4</div><div class='add'>+</div><div class='add'>+            required:</div><div class='add'>+              - clock-lanes</div><div class='add'>+              - data-lanes</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description:</div><div class='add'>+          Output port node, Image Processing block connected to the CSI-2 receiver.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - port@0</div><div class='add'>+      - port@1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a07g044-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    csi: csi@10830400 {</div><div class='add'>+        compatible = "renesas,r9a07g044-csi2", "renesas,rzg2l-csi2";</div><div class='add'>+        reg = &lt;0x10830400 0xfc00&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A07G044_CRU_SYSCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_CRU_VCLK&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A07G044_CRU_PCLK&gt;;</div><div class='add'>+        clock-names = "system", "video", "apb";</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg R9A07G044_CRU_PRESETN&gt;,</div><div class='add'>+                 &lt;&amp;cpg R9A07G044_CRU_CMN_RSTB&gt;;</div><div class='add'>+        reset-names = "presetn", "cmn-rstb";</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                csi2_in: endpoint {</div><div class='add'>+                    clock-lanes = &lt;0&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;ov5645_ep&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                csi2cru: endpoint@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    remote-endpoint = &lt;&amp;crucsi2&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml<br/>index c0442e79cbb4..91e8f368fb52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,vin.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,vin.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,vin.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,vin.yaml</a></div><div class='hunk'>@@ -53,6 +53,7 @@ properties:</div><div class='ctx'>               - renesas,vin-r8a77990 # R-Car E3</div><div class='ctx'>               - renesas,vin-r8a77995 # R-Car D3</div><div class='ctx'>               - renesas,vin-r8a779a0 # R-Car V3U</div><div class='add'>+              - renesas,vin-r8a779g0 # R-Car V4H</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -69,7 +70,7 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  #The per-board settings for Gen2 and RZ/G1 platforms:</div><div class='add'>+  # The per-board settings for Gen2 and RZ/G1 platforms:</div><div class='ctx'>   port:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>     unevaluatedProperties: false</div><div class='hunk'>@@ -108,7 +109,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>           data-active: true</div><div class='ctx'> </div><div class='del'>-  #The per-board settings for Gen3 and RZ/G2 platforms:</div><div class='add'>+  # The per-board settings for Gen3 and RZ/G2 platforms:</div><div class='ctx'>   renesas,id:</div><div class='ctx'>     description: VIN channel number</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/renesas,vsp1.yaml b/Documentation/devicetree/bindings/media/renesas,vsp1.yaml<br/>index 990e9c1dbc43..3265e922647c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,vsp1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/renesas,vsp1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/renesas,vsp1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/renesas,vsp1.yaml</a></div><div class='hunk'>@@ -16,9 +16,15 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - renesas,vsp1 # R-Car Gen2 and RZ/G1</div><div class='del'>-      - renesas,vsp2 # R-Car Gen3 and RZ/G2</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-vsp2 # RZ/G2L</div><div class='add'>+          - renesas,vsp1 # R-Car Gen2 and RZ/G1</div><div class='add'>+          - renesas,vsp2 # R-Car Gen3 and RZ/G2</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g054-vsp2    # RZ/V2L</div><div class='add'>+          - const: renesas,r9a07g044-vsp2 # RZ/G2L fallback</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -26,8 +32,8 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  clocks: true</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -50,17 +56,43 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      items:</div><div class='del'>-        - const: renesas,vsp1</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    renesas,fcp: false</div><div class='del'>-else:</div><div class='del'>-  required:</div><div class='del'>-    - renesas,fcp</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,vsp1</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        renesas,fcp: false</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - renesas,fcp</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,r9a07g044-vsp2</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Main clock</div><div class='add'>+            - description: Register access clock</div><div class='add'>+            - description: Video clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aclk</div><div class='add'>+            - const: pclk</div><div class='add'>+            - const: vclk</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   # R8A7790 (R-Car H2) VSP1-S</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml<br/>new file mode 100644<br/>index 000000000000..9d90d8d0565a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/rockchip,rk3568-vepu.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/rockchip,rk3568-vepu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Hantro G1 VPU encoders implemented on Rockchip SoCs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nicolas Frattaroli &lt;frattaroli.nicolas@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Hantro G1 video encode-only accelerators present on Rockchip SoCs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3568-vepu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: hclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3568-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/rk3568-power.h&gt;</div><div class='add'>+</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        vepu: video-codec@fdee0000 {</div><div class='add'>+            compatible = "rockchip,rk3568-vepu";</div><div class='add'>+            reg = &lt;0x0 0xfdee0000 0x0 0x800&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;cru ACLK_JENC&gt;, &lt;&amp;cru HCLK_JENC&gt;;</div><div class='add'>+            clock-names = "aclk", "hclk";</div><div class='add'>+            iommus = &lt;&amp;vepu_mmu&gt;;</div><div class='add'>+            power-domains = &lt;&amp;power RK3568_PD_RGA&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml<br/>index 089f11d21b25..08b02ec16755 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rockchip,vdec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rockchip,vdec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rockchip,vdec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/rockchip,vdec.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/rockchip,vdec.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip Video Decoder (VDec) Device Tree Bindings</div><div class='add'>+title: Rockchip Video Decoder (VDec)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='hunk'>@@ -18,7 +18,9 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - const: rockchip,rk3399-vdec</div><div class='ctx'>       - items:</div><div class='del'>-          - const: rockchip,rk3228-vdec</div><div class='add'>+          - enum:</div><div class='add'>+              - rockchip,rk3228-vdec</div><div class='add'>+              - rockchip,rk3328-vdec</div><div class='ctx'>           - const: rockchip,rk3399-vdec</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml<br/>index d1489b177331..0bad7e640148 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rockchip-isp1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rockchip-isp1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rockchip-isp1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/rockchip-isp1.yaml</a></div><div class='hunk'>@@ -84,8 +84,27 @@ properties:</div><div class='ctx'>                 minItems: 1</div><div class='ctx'>                 maxItems: 4</div><div class='ctx'> </div><div class='del'>-    required:</div><div class='del'>-      - port@0</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: connection point for input on the parallel interface</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          bus-type:</div><div class='add'>+            enum: [5, 6]</div><div class='add'>+</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - bus-type</div><div class='add'>+</div><div class='add'>+    anyOf:</div><div class='add'>+      - required:</div><div class='add'>+          - port@0</div><div class='add'>+      - required:</div><div class='add'>+          - port@1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -193,12 +212,19 @@ examples:</div><div class='ctx'>                 compatible = "ovti,ov2685";</div><div class='ctx'>                 reg = &lt;0x3c&gt;;</div><div class='ctx'> </div><div class='del'>-                  port {</div><div class='del'>-                      ucam_out: endpoint {</div><div class='del'>-                          remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='del'>-                          data-lanes = &lt;1&gt;;</div><div class='del'>-                      };</div><div class='del'>-                  };</div><div class='add'>+                clocks = &lt;&amp;cru SCLK_TESTCLKOUT1&gt;;</div><div class='add'>+                clock-names = "xvclk";</div><div class='add'>+</div><div class='add'>+                avdd-supply = &lt;&amp;pp2800_cam&gt;;</div><div class='add'>+                dovdd-supply = &lt;&amp;pp1800&gt;;</div><div class='add'>+                dvdd-supply = &lt;&amp;pp1800&gt;;</div><div class='add'>+</div><div class='add'>+                port {</div><div class='add'>+                    ucam_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mipi_in_ucam&gt;;</div><div class='add'>+                        data-lanes = &lt;1&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/rockchip-vpu.yaml b/Documentation/devicetree/bindings/media/rockchip-vpu.yaml<br/>index bacb60a34989..ee622a8ee1cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rockchip-vpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/rockchip-vpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/rockchip-vpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/rockchip-vpu.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/media/rockchip-vpu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/media/rockchip-vpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Hantro G1 VPU codecs implemented on Rockchip SoCs</div><div class='ctx'> </div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>           - rockchip,rk3328-vpu</div><div class='ctx'>           - rockchip,rk3399-vpu</div><div class='ctx'>           - rockchip,px30-vpu</div><div class='add'>+          - rockchip,rk3568-vpu</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: rockchip,rk3188-vpu</div><div class='ctx'>           - const: rockchip,rk3066-vpu</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/s5p-cec.txt b/Documentation/devicetree/bindings/media/s5p-cec.txt<br/>deleted file mode 100644<br/>index e847291d4aff..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/s5p-cec.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/s5p-cec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-* Samsung HDMI CEC driver</div><div class='del'>-</div><div class='del'>-The HDMI CEC module is present is Samsung SoCs and its purpose is to</div><div class='del'>-handle communication between HDMI connected devices over the CEC bus.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible : value should be following</div><div class='del'>-	"samsung,s5p-cec"</div><div class='del'>-</div><div class='del'>-  - reg : Physical base address of the IP registers and length of memory</div><div class='del'>-	  mapped region.</div><div class='del'>-</div><div class='del'>-  - interrupts : HDMI CEC interrupt number to the CPU.</div><div class='del'>-  - clocks : from common clock binding: handle to HDMI CEC clock.</div><div class='del'>-  - clock-names : from common clock binding: must contain "hdmicec",</div><div class='del'>-		  corresponding to entry in the clocks property.</div><div class='del'>-  - samsung,syscon-phandle - phandle to the PMU system controller</div><div class='del'>-  - hdmi-phandle - phandle to the HDMI controller, see also cec.txt.</div><div class='del'>-</div><div class='del'>-Optional:</div><div class='del'>-  - needs-hpd : if present the CEC support is only available when the HPD</div><div class='del'>-		is high. See cec.txt for more details.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-hdmicec: cec@100b0000 {</div><div class='del'>-	compatible = "samsung,s5p-cec";</div><div class='del'>-	reg = &lt;0x100B0000 0x200&gt;;</div><div class='del'>-	interrupts = &lt;0 114 0&gt;;</div><div class='del'>-	clocks = &lt;&amp;clock CLK_HDMI_CEC&gt;;</div><div class='del'>-	clock-names = "hdmicec";</div><div class='del'>-	samsung,syscon-phandle = &lt;&amp;pmu_system_controller&gt;;</div><div class='del'>-	hdmi-phandle = &lt;&amp;hdmi&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;hdmi_cec&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/s5p-mfc.txt b/Documentation/devicetree/bindings/media/s5p-mfc.txt<br/>index aa54c8159d9f..8eb90c043d5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/s5p-mfc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/s5p-mfc.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/s5p-mfc.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/s5p-mfc.txt</a></div><div class='hunk'>@@ -10,10 +10,12 @@ Required properties:</div><div class='ctx'>   - compatible : value should be either one among the following</div><div class='ctx'> 	(a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs</div><div class='ctx'> 	(b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs</div><div class='del'>-	(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC</div><div class='del'>-	(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC</div><div class='del'>-	(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC</div><div class='del'>-	(f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC</div><div class='add'>+	(c) "samsung,exynos3250-mfc", "samsung,mfc-v7" for MFC v7</div><div class='add'>+	     present in Exynos3250 SoC</div><div class='add'>+	(d) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC</div><div class='add'>+	(e) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC</div><div class='add'>+	(f) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC</div><div class='add'>+	(g) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC</div><div class='ctx'> </div><div class='ctx'>   - reg : Physical base address of the IP registers and length of memory</div><div class='ctx'> 	  mapped region.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml<br/>new file mode 100644<br/>index 000000000000..dd6cc7ac1f7c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,exynos4210-csis.yaml</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,exynos4210-csis.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,s5pv210-csis</div><div class='add'>+      - samsung,exynos4210-csis</div><div class='add'>+      - samsung,exynos4212-csis</div><div class='add'>+      - samsung,exynos5250-csis</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  bus-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [2, 4]</div><div class='add'>+    description:</div><div class='add'>+      Number of data lines supported.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: csis</div><div class='add'>+      - const: sclk_csis</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 166000000</div><div class='add'>+    description:</div><div class='add'>+      The IP's main (system bus) clock frequency in Hz.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: csis</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V).</div><div class='add'>+</div><div class='add'>+  vddcore-supply:</div><div class='add'>+    description: MIPI CSIS Core voltage supply (e.g. 1.1V).</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^port@[34]$":</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Camera input port.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        enum: [3, 4]</div><div class='add'>+</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 4</div><div class='add'>+</div><div class='add'>+          samsung,csis-hs-settle:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: Differential receiver (HS-RX) settle time.</div><div class='add'>+</div><div class='add'>+          samsung,csis-wclk:</div><div class='add'>+            type: boolean</div><div class='add'>+            description:</div><div class='add'>+              CSI-2 wrapper clock selection. If this property is present external clock</div><div class='add'>+              from CMU will be used, or the bus clock if it's not specified.</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - data-lanes</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - bus-width</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - vddio-supply</div><div class='add'>+  - vddcore-supply</div><div class='add'>+</div><div class='add'>+anyOf:</div><div class='add'>+  - required:</div><div class='add'>+      - port@3</div><div class='add'>+  - required:</div><div class='add'>+      - port@4</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - samsung,isp-wb</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - samsung,sysreg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos4.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    csis@11890000 {</div><div class='add'>+        compatible = "samsung,exynos4210-csis";</div><div class='add'>+        reg = &lt;0x11890000 0x4000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clock CLK_CSIS1&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_SCLK_CSIS1&gt;;</div><div class='add'>+        clock-names = "csis", "sclk_csis";</div><div class='add'>+        assigned-clocks = &lt;&amp;clock CLK_MOUT_CSIS1&gt;,</div><div class='add'>+                          &lt;&amp;clock CLK_SCLK_CSIS1&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        bus-width = &lt;2&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+        phys = &lt;&amp;mipi_phy 2&gt;;</div><div class='add'>+        phy-names = "csis";</div><div class='add'>+</div><div class='add'>+        vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='add'>+        vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        /* Camera D (4) MIPI CSI-2 (CSIS1) */</div><div class='add'>+        port@4 {</div><div class='add'>+            reg = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;is_s5k6a3_ep&gt;;</div><div class='add'>+                data-lanes = &lt;1&gt;;</div><div class='add'>+                samsung,csis-hs-settle = &lt;18&gt;;</div><div class='add'>+                samsung,csis-wclk;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml<br/>new file mode 100644<br/>index 000000000000..271d0577a83c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,exynos4210-fimc.yaml</a></div><div class='hunk'>@@ -0,0 +1,152 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,exynos4210-fimc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5P/Exynos SoC Fully Integrated Mobile Camera</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Each FIMC device should have an alias in the aliases node, in the form of</div><div class='add'>+  fimc&lt;n&gt;, where &lt;n&gt; is an integer specifying the IP block instance.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,exynos4210-fimc</div><div class='add'>+      - samsung,exynos4212-fimc</div><div class='add'>+      - samsung,s5pv210-fimc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fimc</div><div class='add'>+      - const: sclk_fimc</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description:</div><div class='add'>+      Maximum FIMC local clock (LCLK) frequency.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  samsung,cam-if:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      The FIMC IP block includes the camera input interface.</div><div class='add'>+</div><div class='add'>+  samsung,isp-wb:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      The FIMC IP block has the ISP writeback input.</div><div class='add'>+</div><div class='add'>+  samsung,lcd-wb:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      The FIMC IP block has the LCD writeback input.</div><div class='add'>+</div><div class='add'>+  samsung,mainscaler-ext:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      FIMC IP supports extended image size and has CIEXTEN register.</div><div class='add'>+</div><div class='add'>+  samsung,min-pix-alignment:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: Minimum supported image height alignment.</div><div class='add'>+      - description: Horizontal image offset.</div><div class='add'>+    description:</div><div class='add'>+      The values are in pixels and default is &lt;2 1&gt;.</div><div class='add'>+</div><div class='add'>+  samsung,min-pix-sizes:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description: |</div><div class='add'>+      An array specyfing minimum image size in pixels at the FIMC input and</div><div class='add'>+      output DMA, in the first and second cell respectively.  Default value</div><div class='add'>+      is &lt;16 16&gt;.</div><div class='add'>+</div><div class='add'>+  samsung,pix-limits:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 4</div><div class='add'>+    description: |</div><div class='add'>+      An array of maximum supported image sizes in pixels, for details refer to</div><div class='add'>+      Table 2-1 in the S5PV210 SoC User Manual. The meaning of each cell is as</div><div class='add'>+      follows:</div><div class='add'>+       0 - scaler input horizontal size</div><div class='add'>+       1 - input horizontal size for the scaler bypassed</div><div class='add'>+       2 - REAL_WIDTH without input rotation</div><div class='add'>+       3 - REAL_HEIGHT with input rotation</div><div class='add'>+</div><div class='add'>+  samsung,rotators:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0x11</div><div class='add'>+    description: |</div><div class='add'>+      A bitmask specifying whether this IP has the input and the output</div><div class='add'>+      rotator. Bits 4 and 0 correspond to input and output rotator</div><div class='add'>+      respectively. If a rotator is present its corresponding bit should be</div><div class='add'>+      set.</div><div class='add'>+</div><div class='add'>+  samsung,sysreg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      System Registers (SYSREG) node.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - samsung,pix-limits</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - samsung,isp-wb</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - samsung,sysreg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos4.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    fimc@11800000 {</div><div class='add'>+        compatible = "samsung,exynos4212-fimc";</div><div class='add'>+        reg = &lt;0x11800000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clock CLK_FIMC0&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_SCLK_FIMC0&gt;;</div><div class='add'>+        clock-names = "fimc", "sclk_fimc";</div><div class='add'>+        interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        iommus = &lt;&amp;sysmmu_fimc0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+        samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='add'>+</div><div class='add'>+        samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='add'>+        samsung,mainscaler-ext;</div><div class='add'>+        samsung,isp-wb;</div><div class='add'>+        samsung,cam-if;</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;clock CLK_MOUT_FIMC0&gt;,</div><div class='add'>+                          &lt;&amp;clock CLK_SCLK_FIMC0&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml<br/>new file mode 100644<br/>index 000000000000..3691cd4962b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml</a></div><div class='hunk'>@@ -0,0 +1,220 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-is.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The FIMC-IS is a subsystem for processing image signal from an image sensor.</div><div class='add'>+  The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5</div><div class='add'>+  processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C</div><div class='add'>+  and SPI bus controllers, PWM and ADC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,exynos4212-fimc-is</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 21</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: lite0</div><div class='add'>+      - const: lite1</div><div class='add'>+      - const: ppmuispx</div><div class='add'>+      - const: ppmuispmx</div><div class='add'>+      - const: isp</div><div class='add'>+      - const: drc</div><div class='add'>+      - const: fd</div><div class='add'>+      - const: mcuisp</div><div class='add'>+      - const: gicisp</div><div class='add'>+      - const: mcuctl_isp</div><div class='add'>+      - const: pwm_isp</div><div class='add'>+      - const: ispdiv0</div><div class='add'>+      - const: ispdiv1</div><div class='add'>+      - const: mcuispdiv0</div><div class='add'>+      - const: mcuispdiv1</div><div class='add'>+      - const: mpll</div><div class='add'>+      - const: aclk200</div><div class='add'>+      - const: aclk400mcuisp</div><div class='add'>+      - const: div_aclk200</div><div class='add'>+      - const: div_aclk400mcuisp</div><div class='add'>+      - const: uart</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  iommu-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: isp</div><div class='add'>+      - const: drc</div><div class='add'>+      - const: fd</div><div class='add'>+      - const: mcuctl</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pmu@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Node representing the SoC's Power Management Unit (duplicated with the</div><div class='add'>+      correct PMU node in the SoC).</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+  "^i2c-isp@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      ISP I2C bus controller</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: samsung,exynos4212-i2c-isp</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: i2c_isp</div><div class='add'>+</div><div class='add'>+      pinctrl-0: true</div><div class='add'>+      pinctrl-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: default</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - reg</div><div class='add'>+      - clocks</div><div class='add'>+      - clock-names</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - ranges</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos4.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    fimc-is@12000000 {</div><div class='add'>+        compatible = "samsung,exynos4212-fimc-is";</div><div class='add'>+        reg = &lt;0x12000000 0x260000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;isp_clock CLK_ISP_FIMC_LITE0&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_FIMC_LITE1&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_PPMUISPX&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_PPMUISPMX&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_FIMC_ISP&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_FIMC_DRC&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_FIMC_FD&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_MCUISP&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_GICISP&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_MCUCTL_ISP&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_PWM_ISP&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_DIV_ISP0&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_DIV_ISP1&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_DIV_MCUISP0&gt;,</div><div class='add'>+                 &lt;&amp;isp_clock CLK_ISP_DIV_MCUISP1&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_ACLK200&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_ACLK400_MCUISP&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_DIV_ACLK200&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_DIV_ACLK400_MCUISP&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_UART_ISP_SCLK&gt;;</div><div class='add'>+        clock-names = "lite0", "lite1", "ppmuispx",</div><div class='add'>+                      "ppmuispmx", "isp",</div><div class='add'>+                      "drc", "fd", "mcuisp",</div><div class='add'>+                      "gicisp", "mcuctl_isp", "pwm_isp",</div><div class='add'>+                      "ispdiv0", "ispdiv1", "mcuispdiv0",</div><div class='add'>+                      "mcuispdiv1", "mpll", "aclk200",</div><div class='add'>+                      "aclk400mcuisp", "div_aclk200",</div><div class='add'>+                      "div_aclk400mcuisp", "uart";</div><div class='add'>+        iommus = &lt;&amp;sysmmu_fimc_isp&gt;, &lt;&amp;sysmmu_fimc_drc&gt;,</div><div class='add'>+                 &lt;&amp;sysmmu_fimc_fd&gt;, &lt;&amp;sysmmu_fimc_mcuctl&gt;;</div><div class='add'>+        iommu-names = "isp", "drc", "fd", "mcuctl";</div><div class='add'>+        power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        pmu@10020000 {</div><div class='add'>+            reg = &lt;0x10020000 0x3000&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        i2c-isp@12140000 {</div><div class='add'>+            compatible = "samsung,exynos4212-i2c-isp";</div><div class='add'>+            reg = &lt;0x12140000 0x100&gt;;</div><div class='add'>+            clocks = &lt;&amp;isp_clock CLK_ISP_I2C1_ISP&gt;;</div><div class='add'>+            clock-names = "i2c_isp";</div><div class='add'>+            pinctrl-0 = &lt;&amp;fimc_is_i2c1&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            image-sensor@10 {</div><div class='add'>+                compatible = "samsung,s5k6a3";</div><div class='add'>+                reg = &lt;0x10&gt;;</div><div class='add'>+                svdda-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='add'>+                svddio-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+                afvdd-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+                clock-frequency = &lt;24000000&gt;;</div><div class='add'>+                clocks = &lt;&amp;camera 1&gt;;</div><div class='add'>+                clock-names = "extclk";</div><div class='add'>+                gpios = &lt;&amp;gpm1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+                port {</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;csis1_ep&gt;;</div><div class='add'>+                        data-lanes = &lt;1&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml b/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml<br/>new file mode 100644<br/>index 000000000000..f80eca0a4f41<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-lite.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-lite.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung Exynos SoC series camera host interface (FIMC-LITE)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Each FIMC device should have an alias in the aliases node, in the form of</div><div class='add'>+  fimc-lite&lt;n&gt;, where &lt;n&gt; is an integer specifying the IP block instance.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,exynos4212-fimc-lite</div><div class='add'>+      - samsung,exynos5250-fimc-lite</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: flite</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos4.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    fimc-lite@12390000 {</div><div class='add'>+        compatible = "samsung,exynos4212-fimc-lite";</div><div class='add'>+        reg = &lt;0x12390000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;isp_clock CLK_ISP_FIMC_LITE0&gt;;</div><div class='add'>+        clock-names = "flite";</div><div class='add'>+        interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+        iommus = &lt;&amp;sysmmu_fimc_lite0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml b/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml<br/>new file mode 100644<br/>index 000000000000..878397830a4d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,exynos5250-gsc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung Exynos SoC G-Scaler</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+  - Seung-Woo Kim &lt;sw0312.kim@samsung.com</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  G-Scaler is used for scaling and color space conversion on Samsung Exynos</div><div class='add'>+  SoCs.</div><div class='add'>+</div><div class='add'>+  Each G-Scaler node should have a numbered alias in the aliases node, in the</div><div class='add'>+  form of gscN, N = 0...3.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynos5250-gsc</div><div class='add'>+              - samsung,exynos5420-gsc</div><div class='add'>+          - const: samsung,exynos5-gsc</div><div class='add'>+      - enum:</div><div class='add'>+          - samsung,exynos5433-gsc</div><div class='add'>+      - const: samsung,exynos5-gsc</div><div class='add'>+        deprecated: True</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  samsung,sysreg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Syscon used to control the system registers to set writeback input and destination.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos5-gsc</div><div class='add'>+              - samsung,exynos5250-gsc</div><div class='add'>+              - samsung,exynos5420-gsc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gscl</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pclk</div><div class='add'>+            - const: aclk</div><div class='add'>+            - const: aclk_xiu</div><div class='add'>+            - const: aclk_gsclbend</div><div class='add'>+            - const: gsd</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos5250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    video-scaler@13e00000 {</div><div class='add'>+        compatible = "samsung,exynos5250-gsc", "samsung,exynos5-gsc";</div><div class='add'>+        reg = &lt;0x13e00000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd_gsc&gt;;</div><div class='add'>+        clocks = &lt;&amp;clock CLK_GSCL0&gt;;</div><div class='add'>+        clock-names = "gscl";</div><div class='add'>+        iommus = &lt;&amp;sysmmu_gsc0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,fimc.yaml b/Documentation/devicetree/bindings/media/samsung,fimc.yaml<br/>new file mode 100644<br/>index 000000000000..79ff6d83a9fd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,fimc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,fimc.yaml</a></div><div class='hunk'>@@ -0,0 +1,279 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,fimc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5P/Exynos SoC Camera Subsystem (FIMC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices</div><div class='add'>+  represented by separate device tree nodes. Currently this includes: Fully</div><div class='add'>+  Integrated Mobile Camera (FIMC, in the S5P SoCs series known as CAMIF), MIPI</div><div class='add'>+  CSIS, FIMC-LITE and FIMC-IS (ISP).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,fimc</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description: |</div><div class='add'>+      The clock specifier cell stores an index of a clock: 0, 1 for</div><div class='add'>+      CAM_A_CLKOUT, CAM_B_CLKOUT clocks respectively.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: sclk_cam0</div><div class='add'>+      - const: sclk_cam1</div><div class='add'>+      - const: pxl_async0</div><div class='add'>+      - const: pxl_async1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  parallel-ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    description:</div><div class='add'>+      Active parallel video input ports.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port@[01]$":</div><div class='add'>+        $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+        description:</div><div class='add'>+          Camera A and camera B inputs.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          endpoint:</div><div class='add'>+            $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: idle</div><div class='add'>+      - const: active_a</div><div class='add'>+      - const: active_b</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^csis@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: samsung,exynos4210-csis.yaml#</div><div class='add'>+    description: MIPI CSI-2 receiver.</div><div class='add'>+</div><div class='add'>+  "^fimc@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: samsung,exynos4210-fimc.yaml#</div><div class='add'>+    description: Fully Integrated Mobile Camera.</div><div class='add'>+</div><div class='add'>+  "^fimc-is@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: samsung,exynos4212-fimc-is.yaml#</div><div class='add'>+    description: Imaging Subsystem (FIMC-IS).</div><div class='add'>+</div><div class='add'>+  "^fimc-lite@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: samsung,exynos4212-fimc-lite.yaml#</div><div class='add'>+    description: Camera host interface (FIMC-LITE).</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - clock-output-names</div><div class='add'>+  - ranges</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos4.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    camera@11800000 {</div><div class='add'>+        compatible = "samsung,fimc";</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0x18000000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;clock CLK_SCLK_CAM0&gt;, &lt;&amp;clock CLK_SCLK_CAM1&gt;,</div><div class='add'>+                 &lt;&amp;clock CLK_PIXELASYNCM0&gt;, &lt;&amp;clock CLK_PIXELASYNCM1&gt;;</div><div class='add'>+        clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";</div><div class='add'>+        clock-output-names = "cam_a_clkout", "cam_b_clkout";</div><div class='add'>+</div><div class='add'>+        assigned-clocks = &lt;&amp;clock CLK_MOUT_CAM0&gt;,</div><div class='add'>+                          &lt;&amp;clock CLK_MOUT_CAM1&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;clock CLK_XUSBXTI&gt;,</div><div class='add'>+                                 &lt;&amp;clock CLK_XUSBXTI&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-0 = &lt;&amp;cam_port_a_clk_active &amp;cam_port_b_clk_active&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+        fimc@11800000 {</div><div class='add'>+            compatible = "samsung,exynos4212-fimc";</div><div class='add'>+            reg = &lt;0x11800000 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;clock CLK_FIMC0&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_SCLK_FIMC0&gt;;</div><div class='add'>+            clock-names = "fimc", "sclk_fimc";</div><div class='add'>+            power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+            samsung,sysreg = &lt;&amp;sys_reg&gt;;</div><div class='add'>+            iommus = &lt;&amp;sysmmu_fimc0&gt;;</div><div class='add'>+</div><div class='add'>+            samsung,pix-limits = &lt;4224 8192 1920 4224&gt;;</div><div class='add'>+            samsung,mainscaler-ext;</div><div class='add'>+            samsung,isp-wb;</div><div class='add'>+            samsung,cam-if;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        /* ... FIMC 1-3 */</div><div class='add'>+</div><div class='add'>+        csis@11880000 {</div><div class='add'>+            compatible = "samsung,exynos4210-csis";</div><div class='add'>+            reg = &lt;0x11880000 0x4000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;clock CLK_CSIS0&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_SCLK_CSIS0&gt;;</div><div class='add'>+            clock-names = "csis", "sclk_csis";</div><div class='add'>+            assigned-clocks = &lt;&amp;clock CLK_MOUT_CSIS0&gt;,</div><div class='add'>+                              &lt;&amp;clock CLK_SCLK_CSIS0&gt;;</div><div class='add'>+            assigned-clock-parents = &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;;</div><div class='add'>+            assigned-clock-rates = &lt;0&gt;, &lt;176000000&gt;;</div><div class='add'>+</div><div class='add'>+            bus-width = &lt;4&gt;;</div><div class='add'>+            power-domains = &lt;&amp;pd_cam&gt;;</div><div class='add'>+            phys = &lt;&amp;mipi_phy 0&gt;;</div><div class='add'>+            phy-names = "csis";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vddcore-supply = &lt;&amp;ldo8_reg&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;ldo10_reg&gt;;</div><div class='add'>+</div><div class='add'>+            /* Camera C (3) MIPI CSI-2 (CSIS0) */</div><div class='add'>+            port@3 {</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;s5c73m3_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                    samsung,csis-hs-settle = &lt;12&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        /* ... CSIS 1 */</div><div class='add'>+</div><div class='add'>+        fimc-lite@12390000 {</div><div class='add'>+              compatible = "samsung,exynos4212-fimc-lite";</div><div class='add'>+              reg = &lt;0x12390000 0x1000&gt;;</div><div class='add'>+              interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+              power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+              clocks = &lt;&amp;isp_clock CLK_ISP_FIMC_LITE0&gt;;</div><div class='add'>+              clock-names = "flite";</div><div class='add'>+              iommus = &lt;&amp;sysmmu_fimc_lite0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        /* ... FIMC-LITE 1 */</div><div class='add'>+</div><div class='add'>+        fimc-is@12000000 {</div><div class='add'>+            compatible = "samsung,exynos4212-fimc-is";</div><div class='add'>+            reg = &lt;0x12000000 0x260000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;isp_clock CLK_ISP_FIMC_LITE0&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_FIMC_LITE1&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_PPMUISPX&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_PPMUISPMX&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_FIMC_ISP&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_FIMC_DRC&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_FIMC_FD&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_MCUISP&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_GICISP&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_MCUCTL_ISP&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_PWM_ISP&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_DIV_ISP0&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_DIV_ISP1&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_DIV_MCUISP0&gt;,</div><div class='add'>+                     &lt;&amp;isp_clock CLK_ISP_DIV_MCUISP1&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_MOUT_MPLL_USER_T&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_ACLK200&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_ACLK400_MCUISP&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_DIV_ACLK200&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_DIV_ACLK400_MCUISP&gt;,</div><div class='add'>+                     &lt;&amp;clock CLK_UART_ISP_SCLK&gt;;</div><div class='add'>+            clock-names = "lite0", "lite1", "ppmuispx",</div><div class='add'>+                          "ppmuispmx", "isp",</div><div class='add'>+                          "drc", "fd", "mcuisp",</div><div class='add'>+                          "gicisp", "mcuctl_isp", "pwm_isp",</div><div class='add'>+                          "ispdiv0", "ispdiv1", "mcuispdiv0",</div><div class='add'>+                          "mcuispdiv1", "mpll", "aclk200",</div><div class='add'>+                          "aclk400mcuisp", "div_aclk200",</div><div class='add'>+                          "div_aclk400mcuisp", "uart";</div><div class='add'>+            iommus = &lt;&amp;sysmmu_fimc_isp&gt;, &lt;&amp;sysmmu_fimc_drc&gt;,</div><div class='add'>+                     &lt;&amp;sysmmu_fimc_fd&gt;, &lt;&amp;sysmmu_fimc_mcuctl&gt;;</div><div class='add'>+            iommu-names = "isp", "drc", "fd", "mcuctl";</div><div class='add'>+            power-domains = &lt;&amp;pd_isp&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+</div><div class='add'>+            pmu@10020000 {</div><div class='add'>+                reg = &lt;0x10020000 0x3000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            i2c-isp@12140000 {</div><div class='add'>+                compatible = "samsung,exynos4212-i2c-isp";</div><div class='add'>+                reg = &lt;0x12140000 0x100&gt;;</div><div class='add'>+                clocks = &lt;&amp;isp_clock CLK_ISP_I2C1_ISP&gt;;</div><div class='add'>+                clock-names = "i2c_isp";</div><div class='add'>+                pinctrl-0 = &lt;&amp;fimc_is_i2c1&gt;;</div><div class='add'>+                pinctrl-names = "default";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                image-sensor@10 {</div><div class='add'>+                    compatible = "samsung,s5k6a3";</div><div class='add'>+                    reg = &lt;0x10&gt;;</div><div class='add'>+                    svdda-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='add'>+                    svddio-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+                    afvdd-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+                    clock-frequency = &lt;24000000&gt;;</div><div class='add'>+                    /* CAM_B_CLKOUT */</div><div class='add'>+                    clocks = &lt;&amp;camera 1&gt;;</div><div class='add'>+                    clock-names = "extclk";</div><div class='add'>+                    gpios = &lt;&amp;gpm1 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+                    port {</div><div class='add'>+                        endpoint {</div><div class='add'>+                            remote-endpoint = &lt;&amp;csis1_ep&gt;;</div><div class='add'>+                            data-lanes = &lt;1&gt;;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml b/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml<br/>new file mode 100644<br/>index 000000000000..1b75390fdaac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,s5c73m3.yaml</a></div><div class='hunk'>@@ -0,0 +1,165 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,s5c73m3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5C73M3 8Mp camera ISP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656)</div><div class='add'>+  video data busses. The I2C bus is the main control bus and additionally the</div><div class='add'>+  SPI bus is used, mostly for transferring the firmware to and from the</div><div class='add'>+  device. Two slave device nodes corresponding to these control bus</div><div class='add'>+  interfaces are required and should be placed under respective bus</div><div class='add'>+  controller nodes.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: samsung,s5c73m3</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cis_extclk</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    default: 24000000</div><div class='add'>+    description: cis_extclk clock frequency.</div><div class='add'>+</div><div class='add'>+  standby-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: STANDBY pin.</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description: Analog power supply (1.2V).</div><div class='add'>+</div><div class='add'>+  vdd-af-supply:</div><div class='add'>+    description: lens power supply (2.8V).</div><div class='add'>+</div><div class='add'>+  vddio-cis-supply:</div><div class='add'>+    description: CIS I/O power supply (1.2V to 1.8V).</div><div class='add'>+</div><div class='add'>+  vddio-host-supply:</div><div class='add'>+    description: Host I/O power supply (1.8V to 2.8V).</div><div class='add'>+</div><div class='add'>+  vdd-int-supply:</div><div class='add'>+    description: Digital power supply (1.2V).</div><div class='add'>+</div><div class='add'>+  vdd-reg-supply:</div><div class='add'>+    description: Regulator input power supply (2.8V).</div><div class='add'>+</div><div class='add'>+  xshutdown-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: XSHUTDOWN pin.</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      endpoint:</div><div class='add'>+        $ref: /schemas/media/video-interfaces.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          data-lanes:</div><div class='add'>+            items:</div><div class='add'>+              - const: 1</div><div class='add'>+              - const: 2</div><div class='add'>+              - const: 3</div><div class='add'>+              - const: 4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - spi-max-frequency</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        # The SPI node is simplified firmware-transfer interface only</div><div class='add'>+        clocks: false</div><div class='add'>+        clock-names: false</div><div class='add'>+        standby-gpios: false</div><div class='add'>+        vdda-supply: false</div><div class='add'>+        vdd-af-supply: false</div><div class='add'>+        vddio-cis-supply: false</div><div class='add'>+        vddio-host-supply: false</div><div class='add'>+        vdd-int-supply: false</div><div class='add'>+        vdd-reg-supply: false</div><div class='add'>+        xshutdown-gpios: false</div><div class='add'>+        port: false</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+        - standby-gpios</div><div class='add'>+        - vdda-supply</div><div class='add'>+        - vdd-af-supply</div><div class='add'>+        - vddio-cis-supply</div><div class='add'>+        - vddio-host-supply</div><div class='add'>+        - vdd-int-supply</div><div class='add'>+        - vdd-reg-supply</div><div class='add'>+        - xshutdown-gpios</div><div class='add'>+        - port</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        image-sensor@3c {</div><div class='add'>+            compatible = "samsung,s5c73m3";</div><div class='add'>+            reg = &lt;0x3c&gt;;</div><div class='add'>+            clock-frequency = &lt;24000000&gt;;</div><div class='add'>+            clocks = &lt;&amp;camera 0&gt;;</div><div class='add'>+            clock-names = "cis_extclk";</div><div class='add'>+            standby-gpios = &lt;&amp;gpm0 6 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vdda-supply = &lt;&amp;cam_vdda_reg&gt;;</div><div class='add'>+            vdd-af-supply = &lt;&amp;cam_af_reg&gt;;</div><div class='add'>+            vddio-cis-supply = &lt;&amp;ldo9_reg&gt;;</div><div class='add'>+            vddio-host-supply = &lt;&amp;ldo18_reg&gt;;</div><div class='add'>+            vdd-int-supply = &lt;&amp;buck9_reg&gt;;</div><div class='add'>+            vdd-reg-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='add'>+            xshutdown-gpios = &lt;&amp;gpf1 3 GPIO_ACTIVE_LOW&gt;; /* ISP_RESET */</div><div class='add'>+</div><div class='add'>+            port {</div><div class='add'>+                s5c73m3_ep: endpoint {</div><div class='add'>+                    remote-endpoint = &lt;&amp;csis0_ep&gt;;</div><div class='add'>+                    data-lanes = &lt;1 2 3 4&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        image-sensor@0 {</div><div class='add'>+            compatible = "samsung,s5c73m3";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+            controller-data {</div><div class='add'>+                samsung,spi-feedback-delay = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml b/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml<br/>new file mode 100644<br/>index 000000000000..e28d6ec56c0b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/samsung,s5pv210-jpeg.yaml</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/samsung,s5pv210-jpeg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung S5PV210 and Exynos SoC JPEG codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jacek Anaszewski &lt;jacek.anaszewski@gmail.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+  - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='add'>+  - Andrzej Pietrasiewicz &lt;andrzejtp2010@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,s5pv210-jpeg</div><div class='add'>+      - samsung,exynos3250-jpeg</div><div class='add'>+      - samsung,exynos4210-jpeg</div><div class='add'>+      - samsung,exynos4212-jpeg</div><div class='add'>+      - samsung,exynos5420-jpeg</div><div class='add'>+      - samsung,exynos5433-jpeg</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,s5pv210-jpeg</div><div class='add'>+              - samsung,exynos4210-jpeg</div><div class='add'>+              - samsung,exynos4212-jpeg</div><div class='add'>+              - samsung,exynos5420-jpeg</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: jpeg</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos3250-jpeg</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: jpeg</div><div class='add'>+            - const: sclk</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos5433-jpeg</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pclk</div><div class='add'>+            - const: aclk</div><div class='add'>+            - const: aclk_xiu</div><div class='add'>+            - const: sclk</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos5433.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    codec@15020000 {</div><div class='add'>+        compatible = "samsung,exynos5433-jpeg";</div><div class='add'>+        reg = &lt;0x15020000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clock-names = "pclk", "aclk", "aclk_xiu", "sclk";</div><div class='add'>+        clocks = &lt;&amp;cmu_mscl CLK_PCLK_JPEG&gt;,</div><div class='add'>+                 &lt;&amp;cmu_mscl CLK_ACLK_JPEG&gt;,</div><div class='add'>+                 &lt;&amp;cmu_mscl CLK_ACLK_XIU_MSCLX&gt;,</div><div class='add'>+                 &lt;&amp;cmu_mscl CLK_SCLK_JPEG&gt;;</div><div class='add'>+        iommus = &lt;&amp;sysmmu_jpeg&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd_mscl&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung-fimc.txt b/Documentation/devicetree/bindings/media/samsung-fimc.txt<br/>deleted file mode 100644<br/>index 20447529c985..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung-fimc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-fimc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,209 +0,0 @@</div><div class='del'>-Samsung S5P/Exynos SoC Camera Subsystem (FIMC)</div><div class='del'>-----------------------------------------------</div><div class='del'>-</div><div class='del'>-The S5P/Exynos SoC Camera subsystem comprises of multiple sub-devices</div><div class='del'>-represented by separate device tree nodes. Currently this includes: FIMC (in</div><div class='del'>-the S5P SoCs series known as CAMIF), MIPI CSIS, FIMC-LITE and FIMC-IS (ISP).</div><div class='del'>-</div><div class='del'>-The sub-subdevices are defined as child nodes of the common 'camera' node which</div><div class='del'>-also includes common properties of the whole subsystem not really specific to</div><div class='del'>-any single sub-device, like common camera port pins or the CAMCLK clock outputs</div><div class='del'>-for external image sensors attached to an SoC.</div><div class='del'>-</div><div class='del'>-Common 'camera' node</div><div class='del'>---------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: must be "samsung,fimc", "simple-bus"</div><div class='del'>-- clocks: list of clock specifiers, corresponding to entries in</div><div class='del'>-  the clock-names property;</div><div class='del'>-- clock-names : must contain "sclk_cam0", "sclk_cam1", "pxl_async0",</div><div class='del'>-  "pxl_async1" entries, matching entries in the clocks property.</div><div class='del'>-</div><div class='del'>-- #clock-cells: from the common clock bindings (../clock/clock-bindings.txt),</div><div class='del'>-  must be 1. A clock provider is associated with the 'camera' node and it should</div><div class='del'>-  be referenced by external sensors that use clocks provided by the SoC on</div><div class='del'>-  CAM_*_CLKOUT pins. The clock specifier cell stores an index of a clock.</div><div class='del'>-  The indices are 0, 1 for CAM_A_CLKOUT, CAM_B_CLKOUT clocks respectively.</div><div class='del'>-</div><div class='del'>-- clock-output-names: from the common clock bindings, should contain names of</div><div class='del'>-  clocks registered by the camera subsystem corresponding to CAM_A_CLKOUT,</div><div class='del'>-  CAM_B_CLKOUT output clocks respectively.</div><div class='del'>-</div><div class='del'>-The pinctrl bindings defined in ../pinctrl/pinctrl-bindings.txt must be used</div><div class='del'>-to define a required pinctrl state named "default" and optional pinctrl states:</div><div class='del'>-"idle", "active-a", active-b". These optional states can be used to switch the</div><div class='del'>-camera port pinmux at runtime. The "idle" state should configure both the camera</div><div class='del'>-ports A and B into high impedance state, especially the CAMCLK clock output</div><div class='del'>-should be inactive. For the "active-a" state the camera port A must be activated</div><div class='del'>-and the port B deactivated and for the state "active-b" it should be the other</div><div class='del'>-way around.</div><div class='del'>-</div><div class='del'>-The 'camera' node must include at least one 'fimc' child node.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-'fimc' device nodes</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: "samsung,s5pv210-fimc" for S5PV210, "samsung,exynos4210-fimc"</div><div class='del'>-  for Exynos4210 and "samsung,exynos4212-fimc" for Exynos4x12 SoCs;</div><div class='del'>-- reg: physical base address and length of the registers set for the device;</div><div class='del'>-- interrupts: should contain FIMC interrupt;</div><div class='del'>-- clocks: list of clock specifiers, must contain an entry for each required</div><div class='del'>-  entry in clock-names;</div><div class='del'>-- clock-names: must contain "fimc", "sclk_fimc" entries.</div><div class='del'>-- samsung,pix-limits: an array of maximum supported image sizes in pixels, for</div><div class='del'>-  details refer to Table 2-1 in the S5PV210 SoC User Manual; The meaning of</div><div class='del'>-  each cell is as follows:</div><div class='del'>-  0 - scaler input horizontal size,</div><div class='del'>-  1 - input horizontal size for the scaler bypassed,</div><div class='del'>-  2 - REAL_WIDTH without input rotation,</div><div class='del'>-  3 - REAL_HEIGHT with input rotation,</div><div class='del'>-- samsung,sysreg: a phandle to the SYSREG node.</div><div class='del'>-</div><div class='del'>-Each FIMC device should have an alias in the aliases node, in the form of</div><div class='del'>-fimc&lt;n&gt;, where &lt;n&gt; is an integer specifying the IP block instance.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- clock-frequency: maximum FIMC local clock (LCLK) frequency;</div><div class='del'>-- samsung,min-pix-sizes: an array specyfing minimum image size in pixels at</div><div class='del'>-  the FIMC input and output DMA, in the first and second cell respectively.</div><div class='del'>-  Default value when this property is not present is &lt;16 16&gt;;</div><div class='del'>-- samsung,min-pix-alignment: minimum supported image height alignment (first</div><div class='del'>-  cell) and the horizontal image offset (second cell). The values are in pixels</div><div class='del'>-  and default to &lt;2 1&gt; when this property is not present;</div><div class='del'>-- samsung,mainscaler-ext: a boolean property indicating whether the FIMC IP</div><div class='del'>-  supports extended image size and has CIEXTEN register;</div><div class='del'>-- samsung,rotators: a bitmask specifying whether this IP has the input and</div><div class='del'>-  the output rotator. Bits 4 and 0 correspond to input and output rotator</div><div class='del'>-  respectively. If a rotator is present its corresponding bit should be set.</div><div class='del'>-  Default value when this property is not specified is 0x11.</div><div class='del'>-- samsung,cam-if: a bolean property indicating whether the IP block includes</div><div class='del'>-  the camera input interface.</div><div class='del'>-- samsung,isp-wb: this property must be present if the IP block has the ISP</div><div class='del'>-  writeback input.</div><div class='del'>-- samsung,lcd-wb: this property must be present if the IP block has the LCD</div><div class='del'>-  writeback input.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-'parallel-ports' node</div><div class='del'>----------------------</div><div class='del'>-</div><div class='del'>-This node should contain child 'port' nodes specifying active parallel video</div><div class='del'>-input ports. It includes camera A and camera B inputs. 'reg' property in the</div><div class='del'>-port nodes specifies data input - 1, 2 indicates input A, B respectively.</div><div class='del'>-</div><div class='del'>-Optional properties</div><div class='del'>-</div><div class='del'>-- samsung,camclk-out (deprecated) : specifies clock output for remote sensor,</div><div class='del'>-  0 - CAM_A_CLKOUT, 1 - CAM_B_CLKOUT;</div><div class='del'>-</div><div class='del'>-Image sensor nodes</div><div class='del'>-------------------</div><div class='del'>-</div><div class='del'>-The sensor device nodes should be added to their control bus controller (e.g.</div><div class='del'>-I2C0) nodes and linked to a port node in the csis or the parallel-ports node,</div><div class='del'>-using the common video interfaces bindings, defined in video-interfaces.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		fimc0 = &amp;fimc_0;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Parallel bus IF sensor */</div><div class='del'>-	i2c_0: i2c@13860000 {</div><div class='del'>-		s5k6aa: sensor@3c {</div><div class='del'>-			compatible = "samsung,s5k6aafx";</div><div class='del'>-			reg = &lt;0x3c&gt;;</div><div class='del'>-			vddio-supply = &lt;...&gt;;</div><div class='del'>-</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-			clocks = &lt;&amp;camera 1&gt;;</div><div class='del'>-			clock-names = "mclk";</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				s5k6aa_ep: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;fimc0_ep&gt;;</div><div class='del'>-					bus-width = &lt;8&gt;;</div><div class='del'>-					hsync-active = &lt;0&gt;;</div><div class='del'>-					vsync-active = &lt;1&gt;;</div><div class='del'>-					pclk-sample = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		/* MIPI CSI-2 bus IF sensor */</div><div class='del'>-		s5c73m3: sensor@1a {</div><div class='del'>-			compatible = "samsung,s5c73m3";</div><div class='del'>-			reg = &lt;0x1a&gt;;</div><div class='del'>-			vddio-supply = &lt;...&gt;;</div><div class='del'>-</div><div class='del'>-			clock-frequency = &lt;24000000&gt;;</div><div class='del'>-			clocks = &lt;&amp;camera 0&gt;;</div><div class='del'>-			clock-names = "mclk";</div><div class='del'>-</div><div class='del'>-			port {</div><div class='del'>-				s5c73m3_1: endpoint {</div><div class='del'>-					data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-					remote-endpoint = &lt;&amp;csis0_ep&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	camera {</div><div class='del'>-		compatible = "samsung,fimc", "simple-bus";</div><div class='del'>-		clocks = &lt;&amp;clock 132&gt;, &lt;&amp;clock 133&gt;, &lt;&amp;clock 351&gt;,</div><div class='del'>-			 &lt;&amp;clock 352&gt;;</div><div class='del'>-		clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0",</div><div class='del'>-			      "pxl_async1";</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		clock-output-names = "cam_a_clkout", "cam_b_clkout";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;cam_port_a_clk_active&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		/* parallel camera ports */</div><div class='del'>-		parallel-ports {</div><div class='del'>-			/* camera A input */</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				fimc0_ep: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;s5k6aa_ep&gt;;</div><div class='del'>-					bus-width = &lt;8&gt;;</div><div class='del'>-					hsync-active = &lt;0&gt;;</div><div class='del'>-					vsync-active = &lt;1&gt;;</div><div class='del'>-					pclk-sample = &lt;1&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		fimc_0: fimc@11800000 {</div><div class='del'>-			compatible = "samsung,exynos4210-fimc";</div><div class='del'>-			reg = &lt;0x11800000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;0 85 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		csis_0: csis@11880000 {</div><div class='del'>-			compatible = "samsung,exynos4210-csis";</div><div class='del'>-			reg = &lt;0x11880000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;0 78 0&gt;;</div><div class='del'>-			/* camera C input */</div><div class='del'>-			port@3 {</div><div class='del'>-				reg = &lt;3&gt;;</div><div class='del'>-				csis0_ep: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;s5c73m3_ep&gt;;</div><div class='del'>-					data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-					samsung,csis-hs-settle = &lt;12&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-The MIPI-CSIS device binding is defined in samsung-mipi-csis.txt.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt b/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt<br/>deleted file mode 100644<br/>index a4149c9434ea..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung-mipi-csis.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-mipi-csis.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)</div><div class='del'>--------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	  : "samsung,s5pv210-csis" for S5PV210 (S5PC110),</div><div class='del'>-		    "samsung,exynos4210-csis" for Exynos4210 (S5PC210),</div><div class='del'>-		    "samsung,exynos4212-csis" for Exynos4212/Exynos4412,</div><div class='del'>-		    "samsung,exynos5250-csis" for Exynos5250;</div><div class='del'>-- reg		  : offset and length of the register set for the device;</div><div class='del'>-- interrupts      : should contain MIPI CSIS interrupt; the format of the</div><div class='del'>-		    interrupt specifier depends on the interrupt controller;</div><div class='del'>-- bus-width	  : maximum number of data lanes supported (SoC specific);</div><div class='del'>-- vddio-supply    : MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V);</div><div class='del'>-- vddcore-supply  : MIPI CSIS Core voltage supply (e.g. 1.1V);</div><div class='del'>-- clocks	  : list of clock specifiers, corresponding to entries in</div><div class='del'>-		    clock-names property;</div><div class='del'>-- clock-names	  : must contain "csis", "sclk_csis" entries, matching entries</div><div class='del'>-		    in the clocks property.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- clock-frequency : The IP's main (system bus) clock frequency in Hz, default</div><div class='del'>-		    value when this property is not specified is 166 MHz;</div><div class='del'>-- samsung,csis-wclk : CSI-2 wrapper clock selection. If this property is present</div><div class='del'>-		    external clock from CMU will be used, or the bus clock if</div><div class='del'>-		    if it's not specified.</div><div class='del'>-</div><div class='del'>-The device node should contain one 'port' child node with one child 'endpoint'</div><div class='del'>-node, according to the bindings defined in Documentation/devicetree/bindings/</div><div class='del'>-media/video-interfaces.txt. The following are properties specific to those nodes.</div><div class='del'>-</div><div class='del'>-port node</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-- reg		  : (required) must be 3 for camera C input (CSIS0) or 4 for</div><div class='del'>-		    camera D input (CSIS1);</div><div class='del'>-</div><div class='del'>-endpoint node</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-- data-lanes	  : (required) an array specifying active physical MIPI-CSI2</div><div class='del'>-		    data input lanes and their mapping to logical lanes; the</div><div class='del'>-		    array's content is unused, only its length is meaningful;</div><div class='del'>-</div><div class='del'>-- samsung,csis-hs-settle : (optional) differential receiver (HS-RX) settle time;</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	reg0: regulator@0 {</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	reg1: regulator@1 {</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-/* SoC properties */</div><div class='del'>-</div><div class='del'>-	csis_0: csis@11880000 {</div><div class='del'>-		compatible = "samsung,exynos4210-csis";</div><div class='del'>-		reg = &lt;0x11880000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 78 0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-/* Board properties */</div><div class='del'>-</div><div class='del'>-	csis_0: csis@11880000 {</div><div class='del'>-		clock-frequency = &lt;166000000&gt;;</div><div class='del'>-		vddio-supply = &lt;&amp;reg0&gt;;</div><div class='del'>-		vddcore-supply = &lt;&amp;reg1&gt;;</div><div class='del'>-		port {</div><div class='del'>-			reg = &lt;3&gt;; /* 3 - CSIS0, 4 - CSIS1 */</div><div class='del'>-			csis0_ep: endpoint {</div><div class='del'>-				remote-endpoint = &lt;...&gt;;</div><div class='del'>-				data-lanes = &lt;1&gt;, &lt;2&gt;;</div><div class='del'>-				samsung,csis-hs-settle = &lt;12&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung-s5c73m3.txt b/Documentation/devicetree/bindings/media/samsung-s5c73m3.txt<br/>deleted file mode 100644<br/>index 21f31fdf5543..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung-s5c73m3.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-s5c73m3.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,97 +0,0 @@</div><div class='del'>-Samsung S5C73M3 8Mp camera ISP</div><div class='del'>-------------------------------</div><div class='del'>-</div><div class='del'>-The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656) video</div><div class='del'>-data busses. The I2C bus is the main control bus and additionally the SPI bus</div><div class='del'>-is used, mostly for transferring the firmware to and from the device. Two</div><div class='del'>-slave device nodes corresponding to these control bus interfaces are required</div><div class='del'>-and should be placed under respective bus controller nodes.</div><div class='del'>-</div><div class='del'>-I2C slave device node</div><div class='del'>----------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	    : "samsung,s5c73m3";</div><div class='del'>-- reg		    : I2C slave address of the sensor;</div><div class='del'>-- vdd-int-supply    : digital power supply (1.2V);</div><div class='del'>-- vdda-supply	    : analog power supply (1.2V);</div><div class='del'>-- vdd-reg-supply    : regulator input power supply (2.8V);</div><div class='del'>-- vddio-host-supply : host I/O power supply (1.8V to 2.8V);</div><div class='del'>-- vddio-cis-supply  : CIS I/O power supply (1.2V to 1.8V);</div><div class='del'>-- vdd-af-supply     : lens power supply (2.8V);</div><div class='del'>-- xshutdown-gpios   : specifier of GPIO connected to the XSHUTDOWN pin;</div><div class='del'>-- standby-gpios     : specifier of GPIO connected to the STANDBY pin;</div><div class='del'>-- clocks	    : should contain list of phandle and clock specifier pairs</div><div class='del'>-		      according to common clock bindings for the clocks described</div><div class='del'>-		      in the clock-names property;</div><div class='del'>-- clock-names	    : should contain "cis_extclk" entry for the CIS_EXTCLK clock;</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- clock-frequency   : the frequency at which the "cis_extclk" clock should be</div><div class='del'>-		      configured to operate, in Hz; if this property is not</div><div class='del'>-		      specified default 24 MHz value will be used.</div><div class='del'>-</div><div class='del'>-The common video interfaces bindings (see video-interfaces.txt) should be used</div><div class='del'>-to specify link from the S5C73M3 to an external image data receiver. The S5C73M3</div><div class='del'>-device node should contain one 'port' child node with an 'endpoint' subnode for</div><div class='del'>-this purpose. The data link from a raw image sensor to the S5C73M3 can be</div><div class='del'>-similarly specified, but it is optional since the S5C73M3 ISP and a raw image</div><div class='del'>-sensor are usually inseparable and form a hybrid module.</div><div class='del'>-</div><div class='del'>-Following properties are valid for the endpoint node(s):</div><div class='del'>-</div><div class='del'>-endpoint subnode</div><div class='del'>-----------------</div><div class='del'>-</div><div class='del'>-- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in</div><div class='del'>-  video-interfaces.txt. This sensor doesn't support data lane remapping</div><div class='del'>-  and physical lane indexes in subsequent elements of the array should</div><div class='del'>-  be only consecutive ascending values.</div><div class='del'>-</div><div class='del'>-SPI device node</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	    : "samsung,s5c73m3";</div><div class='del'>-</div><div class='del'>-For more details see description of the SPI busses bindings</div><div class='del'>-(../spi/spi-bus.txt) and bindings of a specific bus controller.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-i2c@138a000000 {</div><div class='del'>-	...</div><div class='del'>-	s5c73m3@3c {</div><div class='del'>-		compatible = "samsung,s5c73m3";</div><div class='del'>-		reg = &lt;0x3c&gt;;</div><div class='del'>-		vdd-int-supply = &lt;&amp;buck9_reg&gt;;</div><div class='del'>-		vdda-supply = &lt;&amp;ldo17_reg&gt;;</div><div class='del'>-		vdd-reg-supply = &lt;&amp;cam_io_reg&gt;;</div><div class='del'>-		vddio-host-supply = &lt;&amp;ldo18_reg&gt;;</div><div class='del'>-		vddio-cis-supply = &lt;&amp;ldo9_reg&gt;;</div><div class='del'>-		vdd-af-supply = &lt;&amp;cam_af_reg&gt;;</div><div class='del'>-		clock-frequency = &lt;24000000&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk 0&gt;;</div><div class='del'>-		clock-names = "cis_extclk";</div><div class='del'>-		reset-gpios = &lt;&amp;gpf1 3 1&gt;;</div><div class='del'>-		standby-gpios = &lt;&amp;gpm0 1 1&gt;;</div><div class='del'>-		port {</div><div class='del'>-			s5c73m3_ep: endpoint {</div><div class='del'>-				remote-endpoint = &lt;&amp;csis0_ep&gt;;</div><div class='del'>-				data-lanes = &lt;1 2 3 4&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-spi@1392000 {</div><div class='del'>-	...</div><div class='del'>-	s5c73m3_spi: s5c73m3@0 {</div><div class='del'>-		compatible = "samsung,s5c73m3";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		...</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung-s5k5baf.txt b/Documentation/devicetree/bindings/media/samsung-s5k5baf.txt<br/>deleted file mode 100644<br/>index 1f51e0439c96..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung-s5k5baf.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-s5k5baf.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-Samsung S5K5BAF UXGA 1/5" 2M CMOS Image Sensor with embedded SoC ISP</div><div class='del'>---------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	  : "samsung,s5k5baf";</div><div class='del'>-- reg		  : I2C slave address of the sensor;</div><div class='del'>-- vdda-supply	  : analog power supply 2.8V (2.6V to 3.0V);</div><div class='del'>-- vddreg-supply	  : regulator input power supply 1.8V (1.7V to 1.9V)</div><div class='del'>-		    or 2.8V (2.6V to 3.0);</div><div class='del'>-- vddio-supply	  : I/O power supply 1.8V (1.65V to 1.95V)</div><div class='del'>-		    or 2.8V (2.5V to 3.1V);</div><div class='del'>-- stbyn-gpios	  : GPIO connected to STDBYN pin;</div><div class='del'>-- rstn-gpios	  : GPIO connected to RSTN pin;</div><div class='del'>-- clocks	  : list of phandle and clock specifier pairs</div><div class='del'>-		    according to common clock bindings for the</div><div class='del'>-		    clocks described in clock-names;</div><div class='del'>-- clock-names	  : should include "mclk" for the sensor's master clock;</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- clock-frequency : the frequency at which the "mclk" clock should be</div><div class='del'>-		    configured to operate, in Hz; if this property is not</div><div class='del'>-		    specified default 24 MHz value will be used.</div><div class='del'>-</div><div class='del'>-The device node should contain one 'port' child node with one child 'endpoint'</div><div class='del'>-node, according to the bindings defined in Documentation/devicetree/bindings/</div><div class='del'>-media/video-interfaces.txt. The following are properties specific to those</div><div class='del'>-nodes.</div><div class='del'>-</div><div class='del'>-endpoint node</div><div class='del'>--------------</div><div class='del'>-</div><div class='del'>-- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in</div><div class='del'>-	       video-interfaces.txt. If present it should be &lt;1&gt; - the device</div><div class='del'>-	       supports only one data lane without re-mapping.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-s5k5bafx@2d {</div><div class='del'>-	compatible = "samsung,s5k5baf";</div><div class='del'>-	reg = &lt;0x2d&gt;;</div><div class='del'>-	vdda-supply = &lt;&amp;cam_io_en_reg&gt;;</div><div class='del'>-	vddreg-supply = &lt;&amp;vt_core_15v_reg&gt;;</div><div class='del'>-	vddio-supply = &lt;&amp;vtcam_reg&gt;;</div><div class='del'>-	stbyn-gpios = &lt;&amp;gpl2 0 1&gt;;</div><div class='del'>-	rstn-gpios = &lt;&amp;gpl2 1 1&gt;;</div><div class='del'>-	clock-names = "mclk";</div><div class='del'>-	clocks = &lt;&amp;clock_cam 0&gt;;</div><div class='del'>-	clock-frequency = &lt;24000000&gt;;</div><div class='del'>-</div><div class='del'>-	port {</div><div class='del'>-		s5k5bafx_ep: endpoint {</div><div class='del'>-			remote-endpoint = &lt;&amp;csis1_ep&gt;;</div><div class='del'>-			data-lanes = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/samsung-s5k6a3.txt b/Documentation/devicetree/bindings/media/samsung-s5k6a3.txt<br/>deleted file mode 100644<br/>index cce01e82f3e3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/samsung-s5k6a3.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/samsung-s5k6a3.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-Samsung S5K6A3(YX) raw image sensor</div><div class='del'>----------------------------------</div><div class='del'>-</div><div class='del'>-S5K6A3(YX) is a raw image sensor with MIPI CSI-2 and CCP2 image data interfaces</div><div class='del'>-and CCI (I2C compatible) control bus.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible	: "samsung,s5k6a3";</div><div class='del'>-- reg		: I2C slave address of the sensor;</div><div class='del'>-- svdda-supply	: core voltage supply;</div><div class='del'>-- svddio-supply	: I/O voltage supply;</div><div class='del'>-- afvdd-supply	: AF (actuator) voltage supply;</div><div class='del'>-- gpios		: specifier of a GPIO connected to the RESET pin;</div><div class='del'>-- clocks	: should contain list of phandle and clock specifier pairs</div><div class='del'>-		  according to common clock bindings for the clocks described</div><div class='del'>-		  in the clock-names property;</div><div class='del'>-- clock-names	: should contain "extclk" entry for the sensor's EXTCLK clock;</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- clock-frequency : the frequency at which the "extclk" clock should be</div><div class='del'>-		    configured to operate, in Hz; if this property is not</div><div class='del'>-		    specified default 24 MHz value will be used.</div><div class='del'>-</div><div class='del'>-The common video interfaces bindings (see video-interfaces.txt) should be</div><div class='del'>-used to specify link to the image data receiver. The S5K6A3(YX) device</div><div class='del'>-node should contain one 'port' child node with an 'endpoint' subnode.</div><div class='del'>-</div><div class='del'>-Following properties are valid for the endpoint node:</div><div class='del'>-</div><div class='del'>-- data-lanes : (optional) specifies MIPI CSI-2 data lanes as covered in</div><div class='del'>-  video-interfaces.txt.  The sensor supports only one data lane.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/si470x.txt b/Documentation/devicetree/bindings/media/si470x.txt<br/>deleted file mode 100644<br/>index a9403558362e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/si470x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/si470x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-* Silicon Labs FM Radio receiver</div><div class='del'>-</div><div class='del'>-The Silicon Labs Si470x is family of FM radio receivers with receive power scan</div><div class='del'>-supporting 76-108 MHz, programmable through an I2C interface.</div><div class='del'>-Some of them includes an RDS encoder.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: Should contain "silabs,si470x"</div><div class='del'>-- reg: the I2C address of the device</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- interrupts : The interrupt number</div><div class='del'>-- reset-gpios: GPIO specifier for the chips reset line</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-&amp;i2c2 {</div><div class='del'>-        si470x@63 {</div><div class='del'>-                compatible = "silabs,si470x";</div><div class='del'>-                reg = &lt;0x63&gt;;</div><div class='del'>-</div><div class='del'>-                interrupt-parent = &lt;&amp;gpj2&gt;;</div><div class='del'>-                interrupts = &lt;4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-                reset-gpios = &lt;&amp;gpj2 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-        };</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/silabs,si470x.yaml b/Documentation/devicetree/bindings/media/silabs,si470x.yaml<br/>new file mode 100644<br/>index 000000000000..a3d19c562ca3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/silabs,si470x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/silabs,si470x.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/media/silabs,si470x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Silicon Labs Si470x FM Radio Receiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hans Verkuil &lt;hverkuil@xs4all.nl&gt;</div><div class='add'>+  - Paweł Chmiel &lt;pawel.mikolaj.chmiel@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: silabs,si470x</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        fmradio@10 {</div><div class='add'>+            compatible = "silabs,si470x";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpj2&gt;;</div><div class='add'>+            interrupts = &lt;4 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpj2 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml b/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml<br/>index 9c1262a276b5..6b3e413cedb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/st,stm32-dcmi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding</div><div class='add'>+title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Hugues Fruchet &lt;hugues.fruchet@foss.st.com&gt;</div><div class='hunk'>@@ -90,7 +90,9 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/clock/stm32mp1-clks.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/media/video-interfaces.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/reset/stm32mp1-resets.h&gt;</div><div class='add'>+</div><div class='ctx'>     dcmi: dcmi@4c006000 {</div><div class='ctx'>         compatible = "st,stm32-dcmi";</div><div class='ctx'>         reg = &lt;0x4c006000 0x400&gt;;</div><div class='hunk'>@@ -104,7 +106,7 @@ examples:</div><div class='ctx'>         port {</div><div class='ctx'>              dcmi_0: endpoint {</div><div class='ctx'>                    remote-endpoint = &lt;&amp;ov5640_0&gt;;</div><div class='del'>-                   bus-type = &lt;5&gt;;</div><div class='add'>+                   bus-type = &lt;MEDIA_BUS_TYPE_PARALLEL&gt;;</div><div class='ctx'>                    bus-width = &lt;8&gt;;</div><div class='ctx'>                    hsync-active = &lt;0&gt;;</div><div class='ctx'>                    vsync-active = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml b/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml<br/>index f97b4a246605..4afa4a24b868 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/st,stm32-dma2d.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/st,stm32-dma2d.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D binding</div><div class='add'>+title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Chrom-ART Accelerator(DMA2D), graphical hardware accelerator</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/stih-cec.txt b/Documentation/devicetree/bindings/media/stih-cec.txt<br/>deleted file mode 100644<br/>index ece0832fdeaf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/stih-cec.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/stih-cec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-STMicroelectronics STIH4xx HDMI CEC driver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible : value should be "st,stih-cec"</div><div class='del'>- - reg : Physical base address of the IP registers and length of memory</div><div class='del'>-	 mapped region.</div><div class='del'>- - clocks : from common clock binding: handle to HDMI CEC clock</div><div class='del'>- - interrupts : HDMI CEC interrupt number to the CPU.</div><div class='del'>- - pinctrl-names: Contains only one value - "default"</div><div class='del'>- - pinctrl-0: Specifies the pin control groups used for CEC hardware.</div><div class='del'>- - resets: Reference to a reset controller</div><div class='del'>- - hdmi-phandle: Phandle to the HDMI controller, see also cec.txt.</div><div class='del'>-</div><div class='del'>-Example for STIH407:</div><div class='del'>-</div><div class='del'>-sti-cec@94a087c {</div><div class='del'>-	compatible = "st,stih-cec";</div><div class='del'>-	reg = &lt;0x94a087c 0x64&gt;;</div><div class='del'>-	clocks = &lt;&amp;clk_sysin&gt;;</div><div class='del'>-	clock-names = "cec-clk";</div><div class='del'>-	interrupts = &lt;GIC_SPI 140 IRQ_TYPE_NONE&gt;;</div><div class='del'>-	interrupt-names = "cec-irq";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_cec0_default&gt;;</div><div class='del'>-	resets = &lt;&amp;softreset STIH407_LPM_SOFTRESET&gt;;</div><div class='del'>-	hdmi-phandle = &lt;&amp;hdmi&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/tegra-cec.txt b/Documentation/devicetree/bindings/media/tegra-cec.txt<br/>deleted file mode 100644<br/>index c503f06f3b84..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/tegra-cec.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/tegra-cec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-* Tegra HDMI CEC hardware</div><div class='del'>-</div><div class='del'>-The HDMI CEC module is present in Tegra SoCs and its purpose is to</div><div class='del'>-handle communication between HDMI connected devices over the CEC bus.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible : value should be one of the following:</div><div class='del'>-	"nvidia,tegra114-cec"</div><div class='del'>-	"nvidia,tegra124-cec"</div><div class='del'>-	"nvidia,tegra210-cec"</div><div class='del'>-  - reg : Physical base address of the IP registers and length of memory</div><div class='del'>-	  mapped region.</div><div class='del'>-  - interrupts : HDMI CEC interrupt number to the CPU.</div><div class='del'>-  - clocks : from common clock binding: handle to HDMI CEC clock.</div><div class='del'>-  - clock-names : from common clock binding: must contain "cec",</div><div class='del'>-		  corresponding to the entry in the clocks property.</div><div class='del'>-  - hdmi-phandle : phandle to the HDMI controller, see also cec.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-cec@70015000 {</div><div class='del'>-	compatible = "nvidia,tegra124-cec";</div><div class='del'>-	reg = &lt;0x0 0x70015000 0x0 0x00001000&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clocks = &lt;&amp;tegra_car TEGRA124_CLK_CEC&gt;;</div><div class='del'>-	clock-names = "cec";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/ti,cal.yaml b/Documentation/devicetree/bindings/media/ti,cal.yaml<br/>index 7e078424ca4d..f1a940a110d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/ti,cal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/ti,cal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/ti,cal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/ti,cal.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/ti,cal.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) Device Tree Bindings</div><div class='add'>+title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Benoit Parrot &lt;bparrot@ti.com&gt;</div><div class='hunk'>@@ -47,7 +47,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   ti,camerrx-control:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to device control module</div><div class='hunk'>@@ -75,7 +75,7 @@ properties:</div><div class='ctx'>       port@0:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>         unevaluatedProperties: false</div><div class='del'>-        description: CSI2 Port #0</div><div class='add'>+        description: 'CSI2 Port #0'</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           endpoint:</div><div class='hunk'>@@ -93,7 +93,7 @@ properties:</div><div class='ctx'>       port@1:</div><div class='ctx'>         $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='ctx'>         unevaluatedProperties: false</div><div class='del'>-        description: CSI2 Port #1</div><div class='add'>+        description: 'CSI2 Port #1'</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           endpoint:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/ti,vpe.yaml b/Documentation/devicetree/bindings/media/ti,vpe.yaml<br/>index ef473f287399..7fa8a367ed22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/ti,vpe.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/ti,vpe.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/ti,vpe.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/ti,vpe.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/ti,vpe.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments DRA7x Video Processing Engine (VPE) Device Tree Bindings</div><div class='add'>+title: Texas Instruments DRA7x Video Processing Engine (VPE)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Benoit Parrot &lt;bparrot@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/video-interface-devices.yaml b/Documentation/devicetree/bindings/media/video-interface-devices.yaml<br/>index 4527f56a5a6e..cf7712ad297c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/video-interface-devices.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/video-interface-devices.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/video-interface-devices.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/video-interface-devices.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/video-interface-devices.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common bindings for video receiver and transmitter devices</div><div class='add'>+title: Common Properties for Video Receiver and Transmitter Devices</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jacopo Mondi &lt;jacopo@jmondi.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/media/video-interfaces.yaml b/Documentation/devicetree/bindings/media/video-interfaces.yaml<br/>index 4391dce2caee..a211d49dc2ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/video-interfaces.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/media/video-interfaces.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/media/video-interfaces.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/media/video-interfaces.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/media/video-interfaces.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common bindings for video receiver and transmitter interface endpoints</div><div class='add'>+title: Common Properties for Video Receiver and Transmitter Interface Endpoints</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sakari Ailus &lt;sakari.ailus@linux.intel.com&gt;</div><div class='hunk'>@@ -93,6 +93,7 @@ properties:</div><div class='ctx'>       - 4 # MIPI CSI-2 D-PHY</div><div class='ctx'>       - 5 # Parallel</div><div class='ctx'>       - 6 # BT.656</div><div class='add'>+      - 7 # DPI</div><div class='ctx'>     description:</div><div class='ctx'>       Data bus type.</div><div class='ctx'> </div><div class='hunk'>@@ -144,9 +145,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   pclk-sample:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    enum: [ 0, 1 ]</div><div class='add'>+    enum: [ 0, 1, 2 ]</div><div class='ctx'>     description:</div><div class='del'>-      Sample data on rising (1) or falling (0) edge of the pixel clock signal.</div><div class='add'>+      Sample data on falling (0), rising (1) or both (2) edges of the pixel</div><div class='add'>+      clock signal.</div><div class='ctx'> </div><div class='ctx'>   sync-on-green-active:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml b/Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml<br/>index 01c9acf9275d..05dd6b3a1a3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/arm,pl353-smc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/arm,pl35x-smc.yaml</a></div><div class='hunk'>@@ -1,26 +1,30 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/memory-controllers/arm,pl353-smc.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ARM PL353 Static Memory Controller (SMC) device-tree bindings</div><div class='add'>+title: Arm PL35x Series Static Memory Controller (SMC)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='del'>-  - Naga Sureshkumar Relli &lt;naga.sureshkumar.relli@xilinx.com&gt;</div><div class='ctx'> </div><div class='del'>-description:</div><div class='del'>-  The PL353 Static Memory Controller is a bus where you can connect two kinds</div><div class='add'>+description: |</div><div class='add'>+  The PL35x Static Memory Controller is a bus where you can connect two kinds</div><div class='ctx'>   of memory interfaces, which are NAND and memory mapped interfaces (such as</div><div class='del'>-  SRAM or NOR).</div><div class='add'>+  SRAM or NOR) depending on the specific configuration.</div><div class='add'>+</div><div class='add'>+  The TRM is available here:</div><div class='add'>+  https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa</div><div class='ctx'> </div><div class='ctx'> # We need a select here so we don't match all nodes with 'arm,primecell'</div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='ctx'>       contains:</div><div class='del'>-        const: arm,pl353-smc-r2p1</div><div class='add'>+        enum:</div><div class='add'>+          - arm,pl353-smc-r2p1</div><div class='add'>+          - arm,pl354</div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='ctx'> </div><div class='hunk'>@@ -30,7 +34,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='del'>-      - const: arm,pl353-smc-r2p1</div><div class='add'>+      - enum:</div><div class='add'>+          - arm,pl353-smc-r2p1</div><div class='add'>+          - arm,pl354</div><div class='ctx'>       - const: arm,primecell</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='hunk'>@@ -46,31 +52,27 @@ properties:</div><div class='ctx'>           The three chip select regions are defined in 'ranges'.</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: clock for the memory device bus</div><div class='del'>-      - description: main clock of the SMC</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: memclk</div><div class='del'>-      - const: apb_pclk</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   ranges:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      Memory bus areas for interacting with the devices. Reflects</div><div class='del'>-      the memory layout with four integer values following:</div><div class='del'>-      &lt;cs-number&gt; 0 &lt;offset&gt; &lt;size&gt;</div><div class='del'>-    items:</div><div class='del'>-      - description: NAND bank 0</div><div class='del'>-      - description: NOR/SRAM bank 0</div><div class='del'>-      - description: NOR/SRAM bank 1</div><div class='add'>+    maxItems: 8</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Combined or Memory interface 0 IRQ</div><div class='add'>+      - description: Memory interface 1 IRQ</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "@[0-3],[a-f0-9]+$":</div><div class='add'>+  "@[0-7],[a-f0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     description: |</div><div class='ctx'>       The child device node represents the controller connected to the SMC</div><div class='ctx'>       bus. The controller can be a NAND controller or a pair of any memory</div><div class='hunk'>@@ -87,7 +89,7 @@ patternProperties:</div><div class='ctx'>               - description: |</div><div class='ctx'>                   Chip-select ID, as in the parent range property.</div><div class='ctx'>                 minimum: 0</div><div class='del'>-                maximum: 2</div><div class='add'>+                maximum: 7</div><div class='ctx'>               - description: |</div><div class='ctx'>                   Offset of the memory region requested by the device.</div><div class='ctx'>               - description: |</div><div class='hunk'>@@ -102,12 +104,36 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - clocks</div><div class='del'>-  - "#address-cells"</div><div class='del'>-  - "#size-cells"</div><div class='del'>-  - ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: arm,pl354</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          # According to TRM, really should be 3 clocks</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          const: apb_pclk</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: clock for the memory device bus</div><div class='add'>+            - description: main clock of the SMC</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: memclk</div><div class='add'>+            - const: apb_pclk</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     smcc: memory-controller@e000e000 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml<br/>new file mode 100644<br/>index 000000000000..4b072c879b02<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/brcm,brcmstb-memc-ddr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Memory controller (MEMC) for Broadcom STB</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.1.x</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.0</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.1</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.2</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.3</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.5</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.6</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.7</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.2.8</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.3.0</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-b.3.1</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-c.1.0</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-c.1.1</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-c.1.2</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-c.1.3</div><div class='add'>+          - brcm,brcmstb-memc-ddr-rev-c.1.4</div><div class='add'>+      - const: brcm,brcmstb-memc-ddr</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: DDR PHY frequency in Hz</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    memory-controller@9902000 {</div><div class='add'>+        compatible = "brcm,brcmstb-memc-ddr-rev-c.1.1", "brcm,brcmstb-memc-ddr";</div><div class='add'>+        reg = &lt;0x9902000 0x600&gt;;</div><div class='add'>+        clock-frequency = &lt;2133000000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml b/Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml<br/>index 769f13250047..08cbdcddfead 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: DDR PHY Front End (DPFE) for Broadcom STB</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Markus Mayer &lt;mmayer@broadcom.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml b/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml<br/>index 96d563fd61f5..e42aa488704d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/calxeda-ddr-ctrlr.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Calxeda DDR memory controller binding</div><div class='add'>+title: Calxeda DDR memory controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Calxeda DDR memory controller is initialised and programmed by the</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml<br/>new file mode 100644<br/>index 000000000000..f81fb866e319<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Canaan K210 SRAM memory controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB</div><div class='add'>+  of SRAM. The controller is initialised by the bootloader, which configures</div><div class='add'>+  its clocks, before OS bringup.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Conor Dooley &lt;conor@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - canaan,k210-sram</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: sram0 clock</div><div class='add'>+      - description: sram1 clock</div><div class='add'>+      - description: aisram clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: sram0</div><div class='add'>+      - const: sram1</div><div class='add'>+      - const: aisram</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/k210-clk.h&gt;</div><div class='add'>+    memory-controller {</div><div class='add'>+        compatible = "canaan,k210-sram";</div><div class='add'>+        clocks = &lt;&amp;sysclk K210_CLK_SRAM0&gt;,</div><div class='add'>+                 &lt;&amp;sysclk K210_CLK_SRAM1&gt;,</div><div class='add'>+                 &lt;&amp;sysclk K210_CLK_AI&gt;;</div><div class='add'>+        clock-names = "sram0", "sram1", "aisram";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml<br/>new file mode 100644<br/>index 000000000000..34b5bd153f63<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LPDDR channel with chip/rank topology description</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,</div><div class='add'>+  CK, etc.) that connect one or more LPDDR chips to a host system. The main</div><div class='add'>+  purpose of this node is to overall LPDDR topology of the system, including the</div><div class='add'>+  amount of individual LPDDR chips and the ranks per chip.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Julius Werner &lt;jwerner@chromium.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - jedec,lpddr2-channel</div><div class='add'>+      - jedec,lpddr3-channel</div><div class='add'>+      - jedec,lpddr4-channel</div><div class='add'>+      - jedec,lpddr5-channel</div><div class='add'>+</div><div class='add'>+  io-width:</div><div class='add'>+    description:</div><div class='add'>+      The number of DQ pins in the channel. If this number is different</div><div class='add'>+      from (a multiple of) the io-width of the LPDDR chip, that means that</div><div class='add'>+      multiple instances of that type of chip are wired in parallel on this</div><div class='add'>+      channel (with the channel's DQ pins split up between the different</div><div class='add'>+      chips, and the CA, CS, etc. pins of the different chips all shorted</div><div class='add'>+      together).  This means that the total physical memory controlled by a</div><div class='add'>+      channel is equal to the sum of the densities of each rank on the</div><div class='add'>+      connected LPDDR chip, times the io-width of the channel divided by</div><div class='add'>+      the io-width of the LPDDR chip.</div><div class='add'>+    enum:</div><div class='add'>+      - 8</div><div class='add'>+      - 16</div><div class='add'>+      - 32</div><div class='add'>+      - 64</div><div class='add'>+      - 128</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^rank@[0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Each physical LPDDR chip may have one or more ranks. Ranks are</div><div class='add'>+      internal but fully independent sub-units of the chip. Each LPDDR bus</div><div class='add'>+      transaction on the channel targets exactly one rank, based on the</div><div class='add'>+      state of the CS pins. Different ranks may have different densities and</div><div class='add'>+      timing requirements.</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: jedec,lpddr2-channel</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^rank@[0-9]+$":</div><div class='add'>+          $ref: /schemas/memory-controllers/ddr/jedec,lpddr2.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: jedec,lpddr3-channel</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^rank@[0-9]+$":</div><div class='add'>+          $ref: /schemas/memory-controllers/ddr/jedec,lpddr3.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: jedec,lpddr4-channel</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^rank@[0-9]+$":</div><div class='add'>+          $ref: /schemas/memory-controllers/ddr/jedec,lpddr4.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: jedec,lpddr5-channel</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^rank@[0-9]+$":</div><div class='add'>+          $ref: /schemas/memory-controllers/ddr/jedec,lpddr5.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - io-width</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    lpddr-channel0 {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      compatible = "jedec,lpddr3-channel";</div><div class='add'>+      io-width = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+      rank@0 {</div><div class='add'>+        compatible = "lpddr3-ff,0100", "jedec,lpddr3";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        density = &lt;8192&gt;;</div><div class='add'>+        io-width = &lt;16&gt;;</div><div class='add'>+        revision-id = &lt;1 0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    lpddr-channel1 {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      compatible = "jedec,lpddr4-channel";</div><div class='add'>+      io-width = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+      rank@0 {</div><div class='add'>+        compatible = "lpddr4-05,0301", "jedec,lpddr4";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        density = &lt;4096&gt;;</div><div class='add'>+        io-width = &lt;32&gt;;</div><div class='add'>+        revision-id = &lt;3 1&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      rank@1 {</div><div class='add'>+        compatible = "lpddr4-05,0301", "jedec,lpddr4";</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+        density = &lt;2048&gt;;</div><div class='add'>+        io-width = &lt;32&gt;;</div><div class='add'>+        revision-id = &lt;3 1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml<br/>new file mode 100644<br/>index 000000000000..30267ce70124<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Common properties for LPDDR types</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Different LPDDR types generally use the same properties and only differ in the</div><div class='add'>+  range of legal values for each. This file defines the common parts that can be</div><div class='add'>+  reused for each type. Nodes using this schema should generally be nested under</div><div class='add'>+  an LPDDR channel node.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    description:</div><div class='add'>+      Compatible strings can be either explicit vendor names and part numbers</div><div class='add'>+      (e.g. elpida,ECB240ABACN), or generated strings of the form</div><div class='add'>+      lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID</div><div class='add'>+      (from MR5) and ZZZZ is the revision ID (from MR6 and MR7). Both IDs are</div><div class='add'>+      formatted in lower case hexadecimal representation with leading zeroes.</div><div class='add'>+      The latter form can be useful when LPDDR nodes are created at runtime by</div><div class='add'>+      boot firmware that doesn't have access to static part number information.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      The rank number of this LPDDR rank when used as a subnode to an LPDDR</div><div class='add'>+      channel.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+</div><div class='add'>+  revision-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description:</div><div class='add'>+      Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. &lt;MR6 MR7&gt;).</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 255</div><div class='add'>+</div><div class='add'>+  density:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Density in megabits of SDRAM chip. Decoded from Mode Register 8.</div><div class='add'>+    enum:</div><div class='add'>+      - 64</div><div class='add'>+      - 128</div><div class='add'>+      - 256</div><div class='add'>+      - 512</div><div class='add'>+      - 1024</div><div class='add'>+      - 2048</div><div class='add'>+      - 3072</div><div class='add'>+      - 4096</div><div class='add'>+      - 6144</div><div class='add'>+      - 8192</div><div class='add'>+      - 12288</div><div class='add'>+      - 16384</div><div class='add'>+      - 24576</div><div class='add'>+      - 32768</div><div class='add'>+</div><div class='add'>+  io-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      IO bus width in bits of SDRAM chip. Decoded from Mode Register 8.</div><div class='add'>+    enum:</div><div class='add'>+      - 8</div><div class='add'>+      - 16</div><div class='add'>+      - 32</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml<br/>index f3e62ee07126..1daa66592477 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2-timings.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: LPDDR2 SDRAM AC timing parameters for a given speed-bin</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml<br/>index dd2141cad866..a237bc259273 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml</a></div><div class='hunk'>@@ -7,7 +7,10 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: LPDDR2 SDRAM compliant to JEDEC JESD209-2</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: jedec,lpddr-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -17,13 +20,15 @@ properties:</div><div class='ctx'>               - elpida,ECB240ABACN</div><div class='ctx'>               - elpida,B8132B2PB-6D-F</div><div class='ctx'>           - enum:</div><div class='del'>-              - jedec,lpddr2-s4</div><div class='del'>-      - items:</div><div class='del'>-          - enum:</div><div class='add'>+              - jedec,lpddr2-nvm</div><div class='ctx'>               - jedec,lpddr2-s2</div><div class='add'>+              - jedec,lpddr2-s4</div><div class='ctx'>       - items:</div><div class='add'>+          - pattern: "^lpddr2-[0-9a-f]{2},[0-9a-f]{4}$"</div><div class='ctx'>           - enum:</div><div class='ctx'>               - jedec,lpddr2-nvm</div><div class='add'>+              - jedec,lpddr2-s2</div><div class='add'>+              - jedec,lpddr2-s4</div><div class='ctx'> </div><div class='ctx'>   revision-id1:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='hunk'>@@ -41,41 +46,6 @@ properties:</div><div class='ctx'>       Property is deprecated, use revision-id instead.</div><div class='ctx'>     deprecated: true</div><div class='ctx'> </div><div class='del'>-  revision-id:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-    description: |</div><div class='del'>-      Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. &lt;MR6 MR7&gt;).</div><div class='del'>-    minItems: 2</div><div class='del'>-    maxItems: 2</div><div class='del'>-    items:</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 255</div><div class='del'>-</div><div class='del'>-  density:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: |</div><div class='del'>-      Density in megabits of SDRAM chip. Obtained from device datasheet.</div><div class='del'>-    enum:</div><div class='del'>-      - 64</div><div class='del'>-      - 128</div><div class='del'>-      - 256</div><div class='del'>-      - 512</div><div class='del'>-      - 1024</div><div class='del'>-      - 2048</div><div class='del'>-      - 4096</div><div class='del'>-      - 8192</div><div class='del'>-      - 16384</div><div class='del'>-      - 32768</div><div class='del'>-</div><div class='del'>-  io-width:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: |</div><div class='del'>-      IO bus width in bits of SDRAM chip. Obtained from device datasheet.</div><div class='del'>-    enum:</div><div class='del'>-      - 32</div><div class='del'>-      - 16</div><div class='del'>-      - 8</div><div class='del'>-</div><div class='ctx'>   tRRD-min-tck:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     maximum: 16</div><div class='hunk'>@@ -168,7 +138,7 @@ required:</div><div class='ctx'>   - density</div><div class='ctx'>   - io-width</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml<br/>index 97c3e988af5f..5c6512c1e1e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3-timings.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: LPDDR3 SDRAM AC timing parameters for a given speed-bin</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml<br/>index c542f32c39fa..e328a1195ba6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml</a></div><div class='hunk'>@@ -7,37 +7,26 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: LPDDR3 SDRAM compliant to JEDEC JESD209-3</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: jedec,lpddr-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - samsung,K3QF2F20DB</div><div class='del'>-      - const: jedec,lpddr3</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,K3QF2F20DB</div><div class='add'>+          - const: jedec,lpddr3</div><div class='add'>+      - items:</div><div class='add'>+          - pattern: "^lpddr3-[0-9a-f]{2},[0-9a-f]{4}$"</div><div class='add'>+          - const: jedec,lpddr3</div><div class='ctx'> </div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'>     deprecated: true</div><div class='ctx'> </div><div class='del'>-  density:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: |</div><div class='del'>-      Density in megabits of SDRAM chip.</div><div class='del'>-    enum:</div><div class='del'>-      - 4096</div><div class='del'>-      - 8192</div><div class='del'>-      - 16384</div><div class='del'>-      - 32768</div><div class='del'>-</div><div class='del'>-  io-width:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: |</div><div class='del'>-      IO bus width in bits of SDRAM chip.</div><div class='del'>-    enum:</div><div class='del'>-      - 32</div><div class='del'>-      - 16</div><div class='del'>-</div><div class='ctx'>   manufacturer-id:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -45,15 +34,6 @@ properties:</div><div class='ctx'>       deprecated, manufacturer should be derived from the compatible.</div><div class='ctx'>     deprecated: true</div><div class='ctx'> </div><div class='del'>-  revision-id:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-    minItems: 2</div><div class='del'>-    maxItems: 2</div><div class='del'>-    items:</div><div class='del'>-      maximum: 255</div><div class='del'>-    description: |</div><div class='del'>-      Revision value of SDRAM chip read from Mode Registers 6 and 7.</div><div class='del'>-</div><div class='ctx'>   '#size-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'>     deprecated: true</div><div class='hunk'>@@ -206,7 +186,7 @@ required:</div><div class='ctx'>   - density</div><div class='ctx'>   - io-width</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml<br/>new file mode 100644<br/>index 000000000000..a078892fecee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr4.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LPDDR4 SDRAM compliant to JEDEC JESD209-4</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: jedec,lpddr-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - pattern: "^lpddr4-[0-9a-f]{2},[0-9a-f]{4}$"</div><div class='add'>+      - const: jedec,lpddr4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - density</div><div class='add'>+  - io-width</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    lpddr {</div><div class='add'>+        compatible = "lpddr4-ff,0100", "jedec,lpddr4";</div><div class='add'>+        density = &lt;8192&gt;;</div><div class='add'>+        io-width = &lt;16&gt;;</div><div class='add'>+        revision-id = &lt;1 0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml b/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml<br/>new file mode 100644<br/>index 000000000000..e441dac5f154<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr5.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LPDDR5 SDRAM compliant to JEDEC JESD209-5</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: jedec,lpddr-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - pattern: "^lpddr5-[0-9a-f]{2},[0-9a-f]{4}$"</div><div class='add'>+      - const: jedec,lpddr5</div><div class='add'>+</div><div class='add'>+  serial-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description:</div><div class='add'>+      Serial IDs read from Mode Registers 47 through 54. One byte per uint32</div><div class='add'>+      cell (i.e. &lt;MR47 MR48 MR49 MR50 MR51 MR52 MR53 MR54&gt;).</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 255</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - density</div><div class='add'>+  - io-width</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    lpddr {</div><div class='add'>+        compatible = "lpddr5-01,0200", "jedec,lpddr5";</div><div class='add'>+        density = &lt;8192&gt;;</div><div class='add'>+        io-width = &lt;8&gt;;</div><div class='add'>+        revision-id = &lt;2 0&gt;;</div><div class='add'>+        serial-id = &lt;3 1 0 0 0 0 0 0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml b/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml<br/>index c6e44f47ce7c..10a2d97e5f8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml</a></div><div class='hunk'>@@ -38,6 +38,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-3],[a-f0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     description:</div><div class='ctx'>       The actual device nodes should be added as subnodes to the SROMc node.</div><div class='ctx'>       These subnodes, in addition to regular device specification, should</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml<br/>index af5147f9da72..84f778a99546 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ddr.yaml</a></div><div class='hunk'>@@ -25,12 +25,6 @@ properties:</div><div class='ctx'>           - const: fsl,qoriq-memory-controller</div><div class='ctx'>       - enum:</div><div class='ctx'>           - fsl,bsc9132-memory-controller</div><div class='del'>-          - fsl,8540-memory-controller</div><div class='del'>-          - fsl,8541-memory-controller</div><div class='del'>-          - fsl,8544-memory-controller</div><div class='del'>-          - fsl,8548-memory-controller</div><div class='del'>-          - fsl,8555-memory-controller</div><div class='del'>-          - fsl,8568-memory-controller</div><div class='ctx'>           - fsl,mpc8536-memory-controller</div><div class='ctx'>           - fsl,mpc8540-memory-controller</div><div class='ctx'>           - fsl,mpc8541-memory-controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml<br/>index 445e46feda69..519b123116dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: i.MX8M DDR Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Leonard Crestez &lt;leonard.crestez@nxp.com&gt;</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The DDRC block is integrated in i.MX8M for interfacing with DDR based</div><div class='hunk'>@@ -47,7 +47,8 @@ properties:</div><div class='ctx'>       - const: apb</div><div class='ctx'> </div><div class='ctx'>   operating-points-v2: true</div><div class='del'>-  opp-table: true</div><div class='add'>+  opp-table:</div><div class='add'>+    type: object</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-peripherals.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-peripherals.yaml<br/>new file mode 100644<br/>index 000000000000..89ebe3979012<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-peripherals.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-peripherals.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc-peripherals.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ingenic SoCs NAND / External Memory Controller (NEMC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 255</div><div class='add'>+</div><div class='add'>+  ingenic,nemc-bus-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [8, 16]</div><div class='add'>+    description: Specifies the bus width in bits.</div><div class='add'>+</div><div class='add'>+  ingenic,nemc-tAS:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Address setup time in nanoseconds.</div><div class='add'>+</div><div class='add'>+  ingenic,nemc-tAH:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Address hold time in nanoseconds.</div><div class='add'>+</div><div class='add'>+  ingenic,nemc-tBP:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Burst pitch time in nanoseconds.</div><div class='add'>+</div><div class='add'>+  ingenic,nemc-tAW:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Address wait time in nanoseconds.</div><div class='add'>+</div><div class='add'>+  ingenic,nemc-tSTRV:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Static memory recovery time in nanoseconds.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml<br/>index 24f9e1982028..a02724221ff3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings</div><div class='add'>+title: Ingenic SoCs NAND / External Memory Controller (NEMC)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='hunk'>@@ -39,38 +39,6 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   ".*@[0-9]+$":</div><div class='ctx'>     type: object</div><div class='del'>-    properties:</div><div class='del'>-      reg:</div><div class='del'>-        minItems: 1</div><div class='del'>-        maxItems: 255</div><div class='del'>-</div><div class='del'>-      ingenic,nemc-bus-width:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [8, 16]</div><div class='del'>-        description: Specifies the bus width in bits.</div><div class='del'>-</div><div class='del'>-      ingenic,nemc-tAS:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: Address setup time in nanoseconds.</div><div class='del'>-</div><div class='del'>-      ingenic,nemc-tAH:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: Address hold time in nanoseconds.</div><div class='del'>-</div><div class='del'>-      ingenic,nemc-tBP:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: Burst pitch time in nanoseconds.</div><div class='del'>-</div><div class='del'>-      ingenic,nemc-tAW:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: Address wait time in nanoseconds.</div><div class='del'>-</div><div class='del'>-      ingenic,nemc-tSTRV:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: Static memory recovery time in nanoseconds.</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - reg</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml<br/>index 5fb4e7bfa4da..3049d6bb0b1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/bus/intel,ixp4xx-expansion-bus-controller.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel IXP4xx Expansion Bus Controller</div><div class='hunk'>@@ -56,69 +56,8 @@ patternProperties:</div><div class='ctx'>     description: Devices attached to chip selects are represented as</div><div class='ctx'>       subnodes.</div><div class='ctx'>     type: object</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      intel,ixp4xx-eb-t1:</div><div class='del'>-        description: Address timing, extend address phase with n cycles.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maximum: 3</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-t2:</div><div class='del'>-        description: Setup chip select timing, extend setup phase with n cycles.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maximum: 3</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-t3:</div><div class='del'>-        description: Strobe timing, extend strobe phase with n cycles.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maximum: 15</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-t4:</div><div class='del'>-        description: Hold timing, extend hold phase with n cycles.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maximum: 3</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-t5:</div><div class='del'>-        description: Recovery timing, extend recovery phase with n cycles.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        maximum: 15</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-cycle-type:</div><div class='del'>-        description: The type of cycles to use on the expansion bus for this</div><div class='del'>-          chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [0, 1, 2]</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-byte-access-on-halfword:</div><div class='del'>-        description: Allow byte read access on half word devices.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [0, 1]</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-hpi-hrdy-pol-high:</div><div class='del'>-        description: Set HPI HRDY polarity to active high when using HPI.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [0, 1]</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-mux-address-and-data:</div><div class='del'>-        description: Multiplex address and data on the data bus.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [0, 1]</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-ahb-split-transfers:</div><div class='del'>-        description: Enable AHB split transfers.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [0, 1]</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-write-enable:</div><div class='del'>-        description: Enable write cycles.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [0, 1]</div><div class='del'>-</div><div class='del'>-      intel,ixp4xx-eb-byte-access:</div><div class='del'>-        description: Expansion bus uses only 8 bits. The default is to use</div><div class='del'>-          16 bits.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [0, 1]</div><div class='add'>+    $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#</div><div class='add'>+    additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml<br/>new file mode 100644<br/>index 000000000000..d1479a7b9c8d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Peripheral properties for Intel IXP4xx Expansion Bus</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The IXP4xx expansion bus controller handles access to devices on the</div><div class='add'>+  memory-mapped expansion bus on the Intel IXP4xx family of system on chips,</div><div class='add'>+  including IXP42x, IXP43x, IXP45x and IXP46x.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  intel,ixp4xx-eb-t1:</div><div class='add'>+    description: Address timing, extend address phase with n cycles.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 3</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-t2:</div><div class='add'>+    description: Setup chip select timing, extend setup phase with n cycles.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 3</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-t3:</div><div class='add'>+    description: Strobe timing, extend strobe phase with n cycles.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 15</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-t4:</div><div class='add'>+    description: Hold timing, extend hold phase with n cycles.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 3</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-t5:</div><div class='add'>+    description: Recovery timing, extend recovery phase with n cycles.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 15</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-cycle-type:</div><div class='add'>+    description: The type of cycles to use on the expansion bus for this</div><div class='add'>+      chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1, 2]</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-byte-access-on-halfword:</div><div class='add'>+    description: Allow byte read access on half word devices.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-hpi-hrdy-pol-high:</div><div class='add'>+    description: Set HPI HRDY polarity to active high when using HPI.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-mux-address-and-data:</div><div class='add'>+    description: Multiplex address and data on the data bus.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-ahb-split-transfers:</div><div class='add'>+    description: Enable AHB split transfers.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-write-enable:</div><div class='add'>+    description: Enable write cycles.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  intel,ixp4xx-eb-byte-access:</div><div class='add'>+    description: Expansion bus uses only 8 bits. The default is to use</div><div class='add'>+      16 bits.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml b/Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml<br/>index 14a6bc8f421f..9249624c4fa0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/marvell,mvebu-sdram-controller.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Marvell MVEBU SDRAM controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jan Luebbe &lt;jlu@pengutronix.de&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml<br/>new file mode 100644<br/>index 000000000000..5acfcad12bb7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/mc-peripheral-props.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Peripheral-specific properties for a Memory Controller bus.</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Many Memory Controllers need to add properties to peripheral devices.</div><div class='add'>+  They could be common properties like reg or they could be controller</div><div class='add'>+  specific like delay in clock or data lines, etc. These properties need</div><div class='add'>+  to be defined in the peripheral node because they are per-peripheral</div><div class='add'>+  and there can be multiple peripherals attached to a controller. All</div><div class='add'>+  those properties are listed here. The controller specific properties</div><div class='add'>+  should go in their own separate schema that should be referenced</div><div class='add'>+  from here.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    description: Bank number, base address and size of the device.</div><div class='add'>+</div><div class='add'>+  bank-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Bank width of the device, in bytes.</div><div class='add'>+    enum: [1, 2, 4]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+# The controller specific properties go here.</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: st,stm32-fmc2-ebi-props.yaml#</div><div class='add'>+  - $ref: intel,ixp4xx-expansion-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml<br/>index 85e02854f083..6ccdaf99c778 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/mediatek,mt7621-memc.yaml</a></div><div class='hunk'>@@ -11,7 +11,9 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mediatek,mt7621-memc</div><div class='add'>+    items:</div><div class='add'>+      - const: mediatek,mt7621-memc</div><div class='add'>+      - const: syscon</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -25,6 +27,6 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     memory-controller@5000 {</div><div class='del'>-        compatible = "mediatek,mt7621-memc";</div><div class='add'>+        compatible = "mediatek,mt7621-memc", "syscon";</div><div class='ctx'>         reg = &lt;0x5000 0x1000&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml<br/>index a98b359bf909..2f36ac23604c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description: |</div><div class='ctx'>   MediaTek SMI have two generations of HW architecture, here is the list</div><div class='ctx'>   which generation the SoCs use:</div><div class='ctx'>   generation 1: mt2701 and mt7623.</div><div class='del'>-  generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8192 and mt8195.</div><div class='add'>+  generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8188, mt8192 and mt8195.</div><div class='ctx'> </div><div class='ctx'>   There's slight differences between the two SMI, for generation 2, the</div><div class='ctx'>   register which control the iommu port is at each larb's register base. But</div><div class='hunk'>@@ -32,14 +32,18 @@ properties:</div><div class='ctx'>           - mediatek,mt2701-smi-common</div><div class='ctx'>           - mediatek,mt2712-smi-common</div><div class='ctx'>           - mediatek,mt6779-smi-common</div><div class='add'>+          - mediatek,mt6795-smi-common</div><div class='ctx'>           - mediatek,mt8167-smi-common</div><div class='ctx'>           - mediatek,mt8173-smi-common</div><div class='ctx'>           - mediatek,mt8183-smi-common</div><div class='ctx'>           - mediatek,mt8186-smi-common</div><div class='add'>+          - mediatek,mt8188-smi-common-vdo</div><div class='add'>+          - mediatek,mt8188-smi-common-vpp</div><div class='ctx'>           - mediatek,mt8192-smi-common</div><div class='ctx'>           - mediatek,mt8195-smi-common-vdo</div><div class='ctx'>           - mediatek,mt8195-smi-common-vpp</div><div class='ctx'>           - mediatek,mt8195-smi-sub-common</div><div class='add'>+          - mediatek,mt8365-smi-common</div><div class='ctx'> </div><div class='ctx'>       - description: for mt7623</div><div class='ctx'>         items:</div><div class='hunk'>@@ -130,6 +134,7 @@ allOf:</div><div class='ctx'>             - mediatek,mt8192-smi-common</div><div class='ctx'>             - mediatek,mt8195-smi-common-vdo</div><div class='ctx'>             - mediatek,mt8195-smi-common-vpp</div><div class='add'>+            - mediatek,mt8365-smi-common</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -143,7 +148,16 @@ allOf:</div><div class='ctx'>             - const: gals0</div><div class='ctx'>             - const: gals1</div><div class='ctx'> </div><div class='del'>-    else:  # for gen2 HW that don't have gals</div><div class='add'>+  - if:  # for gen2 HW that don't have gals</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - mediatek,mt2712-smi-common</div><div class='add'>+            - mediatek,mt6795-smi-common</div><div class='add'>+            - mediatek,mt8167-smi-common</div><div class='add'>+            - mediatek,mt8173-smi-common</div><div class='add'>+</div><div class='add'>+    then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 2</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml<br/>index c886681f62a7..aee7f6cf1300 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.yaml</a></div><div class='hunk'>@@ -20,10 +20,12 @@ properties:</div><div class='ctx'>           - mediatek,mt2701-smi-larb</div><div class='ctx'>           - mediatek,mt2712-smi-larb</div><div class='ctx'>           - mediatek,mt6779-smi-larb</div><div class='add'>+          - mediatek,mt6795-smi-larb</div><div class='ctx'>           - mediatek,mt8167-smi-larb</div><div class='ctx'>           - mediatek,mt8173-smi-larb</div><div class='ctx'>           - mediatek,mt8183-smi-larb</div><div class='ctx'>           - mediatek,mt8186-smi-larb</div><div class='add'>+          - mediatek,mt8188-smi-larb</div><div class='ctx'>           - mediatek,mt8192-smi-larb</div><div class='ctx'>           - mediatek,mt8195-smi-larb</div><div class='ctx'> </div><div class='hunk'>@@ -32,6 +34,10 @@ properties:</div><div class='ctx'>           - const: mediatek,mt7623-smi-larb</div><div class='ctx'>           - const: mediatek,mt2701-smi-larb</div><div class='ctx'> </div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt8365-smi-larb</div><div class='add'>+          - const: mediatek,mt8186-smi-larb</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -77,6 +83,7 @@ allOf:</div><div class='ctx'>           enum:</div><div class='ctx'>             - mediatek,mt8183-smi-larb</div><div class='ctx'>             - mediatek,mt8186-smi-larb</div><div class='add'>+            - mediatek,mt8188-smi-larb</div><div class='ctx'>             - mediatek,mt8195-smi-larb</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='hunk'>@@ -110,6 +117,7 @@ allOf:</div><div class='ctx'>               - mediatek,mt2712-smi-larb</div><div class='ctx'>               - mediatek,mt6779-smi-larb</div><div class='ctx'>               - mediatek,mt8186-smi-larb</div><div class='add'>+              - mediatek,mt8188-smi-larb</div><div class='ctx'>               - mediatek,mt8192-smi-larb</div><div class='ctx'>               - mediatek,mt8195-smi-larb</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml<br/>index 9163c3f12a85..f5f03bf36413 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml</a></div><div class='hunk'>@@ -50,6 +50,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^emc-timings-[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       nvidia,ram-code:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml<br/>index 13c4c82fd0d3..935d63d181d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml</a></div><div class='hunk'>@@ -34,8 +34,12 @@ properties:</div><div class='ctx'>           - nvidia,tegra234-mc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='add'>+    minItems: 6</div><div class='add'>+    maxItems: 18</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 6</div><div class='add'>+    maxItems: 18</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -142,7 +146,17 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         reg:</div><div class='del'>-          maxItems: 1</div><div class='add'>+          maxItems: 6</div><div class='add'>+          description: 5 memory controller channels and 1 for stream-id registers</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: sid</div><div class='add'>+            - const: broadcast</div><div class='add'>+            - const: ch0</div><div class='add'>+            - const: ch1</div><div class='add'>+            - const: ch2</div><div class='add'>+            - const: ch3</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -151,7 +165,29 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         reg:</div><div class='del'>-          minItems: 3</div><div class='add'>+          minItems: 18</div><div class='add'>+          description: 17 memory controller channels and 1 for stream-id registers</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: sid</div><div class='add'>+            - const: broadcast</div><div class='add'>+            - const: ch0</div><div class='add'>+            - const: ch1</div><div class='add'>+            - const: ch2</div><div class='add'>+            - const: ch3</div><div class='add'>+            - const: ch4</div><div class='add'>+            - const: ch5</div><div class='add'>+            - const: ch6</div><div class='add'>+            - const: ch7</div><div class='add'>+            - const: ch8</div><div class='add'>+            - const: ch9</div><div class='add'>+            - const: ch10</div><div class='add'>+            - const: ch11</div><div class='add'>+            - const: ch12</div><div class='add'>+            - const: ch13</div><div class='add'>+            - const: ch14</div><div class='add'>+            - const: ch15</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -160,13 +196,36 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         reg:</div><div class='del'>-          minItems: 3</div><div class='add'>+          minItems: 18</div><div class='add'>+          description: 17 memory controller channels and 1 for stream-id registers</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: sid</div><div class='add'>+            - const: broadcast</div><div class='add'>+            - const: ch0</div><div class='add'>+            - const: ch1</div><div class='add'>+            - const: ch2</div><div class='add'>+            - const: ch3</div><div class='add'>+            - const: ch4</div><div class='add'>+            - const: ch5</div><div class='add'>+            - const: ch6</div><div class='add'>+            - const: ch7</div><div class='add'>+            - const: ch8</div><div class='add'>+            - const: ch9</div><div class='add'>+            - const: ch10</div><div class='add'>+            - const: ch11</div><div class='add'>+            - const: ch12</div><div class='add'>+            - const: ch13</div><div class='add'>+            - const: ch14</div><div class='add'>+            - const: ch15</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - reg-names</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - "#address-cells"</div><div class='ctx'>   - "#size-cells"</div><div class='hunk'>@@ -182,7 +241,13 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         memory-controller@2c00000 {</div><div class='ctx'>             compatible = "nvidia,tegra186-mc";</div><div class='del'>-            reg = &lt;0x0 0x02c00000 0x0 0xb0000&gt;;</div><div class='add'>+            reg = &lt;0x0 0x02c00000 0x0 0x10000&gt;,    /* MC-SID */</div><div class='add'>+                  &lt;0x0 0x02c10000 0x0 0x10000&gt;,    /* Broadcast channel */</div><div class='add'>+                  &lt;0x0 0x02c20000 0x0 0x10000&gt;,    /* MC0 */</div><div class='add'>+                  &lt;0x0 0x02c30000 0x0 0x10000&gt;,    /* MC1 */</div><div class='add'>+                  &lt;0x0 0x02c40000 0x0 0x10000&gt;,    /* MC2 */</div><div class='add'>+                  &lt;0x0 0x02c50000 0x0 0x10000&gt;;    /* MC3 */</div><div class='add'>+            reg-names = "sid", "broadcast", "ch0", "ch1", "ch2", "ch3";</div><div class='ctx'>             interrupts = &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='ctx'>             #address-cells = &lt;2&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml b/Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml<br/>index 9566b3421f03..0c511ab906bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/qca,ath79-ddr-controller.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Atheros AR7xxx/AR9xxx DDR controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The DDR controller of the AR7xxx and AR9xxx families provides an interface to</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml<br/>index 7056ccb7eb30..8e3822314b25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/renesas,dbsc.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/renesas,dbsc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas DDR Bus Controllers</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.yaml<br/>deleted file mode 100644<br/>index 2b18cef99511..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/renesas,h8300-bsc.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/memory-controllers/renesas,h8300-bsc.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: H8/300 bus controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='del'>-  - Yoshinori Sato &lt;ysato@users.sourceforge.jp&gt;</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - renesas,h8300h-bsc</div><div class='del'>-          - renesas,h8s-bsc</div><div class='del'>-      - const: renesas,h8300-bsc</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    memory-controller@fee01e {</div><div class='del'>-        compatible = "renesas,h8300h-bsc", "renesas,h8300-bsc";</div><div class='del'>-        reg = &lt;0xfee01e 8&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml<br/>index 9a6dbf54b540..56e62cd0b36a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml</a></div><div class='hunk'>@@ -20,7 +20,7 @@ description: |</div><div class='ctx'>   - if it contains "cfi-flash", then HyperFlash is used.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -31,14 +31,25 @@ properties:</div><div class='ctx'>               - renesas,r8a774b1-rpc-if       # RZ/G2N</div><div class='ctx'>               - renesas,r8a774c0-rpc-if       # RZ/G2E</div><div class='ctx'>               - renesas,r8a774e1-rpc-if       # RZ/G2H</div><div class='add'>+              - renesas,r8a7795-rpc-if        # R-Car H3</div><div class='add'>+              - renesas,r8a7796-rpc-if        # R-Car M3-W</div><div class='add'>+              - renesas,r8a77961-rpc-if       # R-Car M3-W+</div><div class='add'>+              - renesas,r8a77965-rpc-if       # R-Car M3-N</div><div class='ctx'>               - renesas,r8a77970-rpc-if       # R-Car V3M</div><div class='ctx'>               - renesas,r8a77980-rpc-if       # R-Car V3H</div><div class='add'>+              - renesas,r8a77990-rpc-if       # R-Car E3</div><div class='ctx'>               - renesas,r8a77995-rpc-if       # R-Car D3</div><div class='ctx'>               - renesas,r8a779a0-rpc-if       # R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-rpc-if   # a generic R-Car gen3 or RZ/G2{E,H,M,N} device</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,r8a779g0-rpc-if       # R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-rpc-if   # a generic R-Car gen4 device</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g043-rpc-if      # RZ/G2UL</div><div class='ctx'>               - renesas,r9a07g044-rpc-if      # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,r9a07g054-rpc-if      # RZ/V2L</div><div class='ctx'>           - const: renesas,rzg2l-rpc-if</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml<br/>new file mode 100644<br/>index 000000000000..fb4920397d08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/rockchip,rk3399-dmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,384 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# %YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip rk3399 DMC (Dynamic Memory Controller) device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Brian Norris &lt;briannorris@chromium.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3399-dmc</div><div class='add'>+</div><div class='add'>+  devfreq-events:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Node to get DDR loading. Refer to</div><div class='add'>+      Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dmc_clk</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  center-supply:</div><div class='add'>+    description:</div><div class='add'>+      DMC regulator supply.</div><div class='add'>+</div><div class='add'>+  rockchip,pmu:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon managing the "PMU general register files".</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      The CPU interrupt number. It should be a DCF interrupt. When DDR DVFS</div><div class='add'>+      finishes, a DCF interrupt is triggered.</div><div class='add'>+</div><div class='add'>+  rockchip,ddr3_speed_bin:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      For values, reference include/dt-bindings/clock/rk3399-ddr.h. Selects the</div><div class='add'>+      DDR3 cl-trp-trcd type. It must be set according to "Speed Bin" in DDR3</div><div class='add'>+      datasheet; DO NOT use a smaller "Speed Bin" than specified for the DDR3</div><div class='add'>+      being used.</div><div class='add'>+</div><div class='add'>+  rockchip,pd_idle:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Configure the PD_IDLE value. Defines the power-down idle period in which</div><div class='add'>+      memories are placed into power-down mode if bus is idle for PD_IDLE DFI</div><div class='add'>+      clock cycles.</div><div class='add'>+      See also rockchip,pd-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,sr_idle:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Configure the SR_IDLE value. Defines the self-refresh idle period in</div><div class='add'>+      which memories are placed into self-refresh mode if bus is idle for</div><div class='add'>+      SR_IDLE * 1024 DFI clock cycles (DFI clocks freq is half of DRAM clock).</div><div class='add'>+      See also rockchip,sr-idle-ns.</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  rockchip,sr_mc_gate_idle:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Defines the memory self-refresh and controller clock gating idle period.</div><div class='add'>+      Memories are placed into self-refresh mode and memory controller clock</div><div class='add'>+      arg gating started if bus is idle for sr_mc_gate_idle*1024 DFI clock</div><div class='add'>+      cycles.</div><div class='add'>+      See also rockchip,sr-mc-gate-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,srpd_lite_idle:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Defines the self-refresh power down idle period in which memories are</div><div class='add'>+      placed into self-refresh power down mode if bus is idle for</div><div class='add'>+      srpd_lite_idle * 1024 DFI clock cycles. This parameter is for LPDDR4</div><div class='add'>+      only.</div><div class='add'>+      See also rockchip,srpd-lite-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,standby_idle:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Defines the standby idle period in which memories are placed into</div><div class='add'>+      self-refresh mode. The controller, pi, PHY and DRAM clock will be gated</div><div class='add'>+      if bus is idle for standby_idle * DFI clock cycles.</div><div class='add'>+      See also rockchip,standby-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,dram_dll_dis_freq:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Defines the DDR3 DLL bypass frequency in MHz. When DDR frequency is less</div><div class='add'>+      than DRAM_DLL_DISB_FREQ, DDR3 DLL will be bypassed.</div><div class='add'>+      Note: if DLL was bypassed, the odt will also stop working.</div><div class='add'>+</div><div class='add'>+  rockchip,phy_dll_dis_freq:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Defines the PHY dll bypass frequency in MHz (Mega Hz). When DDR frequency</div><div class='add'>+      is less than DRAM_DLL_DISB_FREQ, PHY DLL will be bypassed.</div><div class='add'>+      Note: PHY DLL and PHY ODT are independent.</div><div class='add'>+</div><div class='add'>+  rockchip,auto_pd_dis_freq:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Defines the auto PD disable frequency in MHz.</div><div class='add'>+</div><div class='add'>+  rockchip,ddr3_odt_dis_freq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1000000  # In case anyone thought this was MHz.</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is DDR3, this parameter defines the ODT disable</div><div class='add'>+      frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq,</div><div class='add'>+      the ODT on the DRAM side and controller side are both disabled.</div><div class='add'>+</div><div class='add'>+  rockchip,ddr3_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is DDR3, this parameter defines the DRAM side drive</div><div class='add'>+      strength in ohms.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,ddr3_odt:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is DDR3, this parameter defines the DRAM side ODT</div><div class='add'>+      strength in ohms.</div><div class='add'>+    default: 120</div><div class='add'>+</div><div class='add'>+  rockchip,phy_ddr3_ca_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is DDR3, this parameter defines the phy side CA line</div><div class='add'>+      (incluing command line, address line and clock line) drive strength.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,phy_ddr3_dq_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is DDR3, this parameter defines the PHY side DQ line</div><div class='add'>+      (including DQS/DQ/DM line) drive strength.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,phy_ddr3_odt:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is DDR3, this parameter defines the PHY side ODT</div><div class='add'>+      strength.</div><div class='add'>+    default: 240</div><div class='add'>+</div><div class='add'>+  rockchip,lpddr3_odt_dis_freq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1000000  # In case anyone thought this was MHz.</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR3, this parameter defines then ODT disable</div><div class='add'>+      frequency in Hz. When DDR frequency is less then ddr3_odt_dis_freq, the</div><div class='add'>+      ODT on the DRAM side and controller side are both disabled.</div><div class='add'>+</div><div class='add'>+  rockchip,lpddr3_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR3, this parameter defines the DRAM side drive</div><div class='add'>+      strength in ohms.</div><div class='add'>+    default: 34</div><div class='add'>+</div><div class='add'>+  rockchip,lpddr3_odt:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR3, this parameter defines the DRAM side ODT</div><div class='add'>+      strength in ohms.</div><div class='add'>+    default: 240</div><div class='add'>+</div><div class='add'>+  rockchip,phy_lpddr3_ca_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR3, this parameter defines the PHY side CA line</div><div class='add'>+      (including command line, address line and clock line) drive strength.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,phy_lpddr3_dq_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR3, this parameter defines the PHY side DQ line</div><div class='add'>+      (including DQS/DQ/DM line) drive strength.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,phy_lpddr3_odt:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When dram type is LPDDR3, this parameter define the phy side odt</div><div class='add'>+      strength, default value is 240.</div><div class='add'>+</div><div class='add'>+  rockchip,lpddr4_odt_dis_freq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1000000  # In case anyone thought this was MHz.</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the ODT disable</div><div class='add'>+      frequency in Hz. When the DDR frequency is less then ddr3_odt_dis_freq,</div><div class='add'>+      the ODT on the DRAM side and controller side are both disabled.</div><div class='add'>+</div><div class='add'>+  rockchip,lpddr4_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the DRAM side drive</div><div class='add'>+      strength in ohms.</div><div class='add'>+    default: 60</div><div class='add'>+</div><div class='add'>+  rockchip,lpddr4_dq_odt:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the DRAM side ODT on</div><div class='add'>+      DQS/DQ line strength in ohms.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,lpddr4_ca_odt:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the DRAM side ODT on</div><div class='add'>+      CA line strength in ohms.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,phy_lpddr4_ca_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the PHY side CA line</div><div class='add'>+      (including command address line) drive strength.</div><div class='add'>+    default: 40</div><div class='add'>+</div><div class='add'>+  rockchip,phy_lpddr4_ck_cs_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the PHY side clock</div><div class='add'>+      line and CS line drive strength.</div><div class='add'>+    default: 80</div><div class='add'>+</div><div class='add'>+  rockchip,phy_lpddr4_dq_drv:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the PHY side DQ line</div><div class='add'>+      (including DQS/DQ/DM line) drive strength.</div><div class='add'>+    default: 80</div><div class='add'>+</div><div class='add'>+  rockchip,phy_lpddr4_odt:</div><div class='add'>+    deprecated: true</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      When the DRAM type is LPDDR4, this parameter defines the PHY side ODT</div><div class='add'>+      strength.</div><div class='add'>+    default: 60</div><div class='add'>+</div><div class='add'>+  rockchip,pd-idle-ns:</div><div class='add'>+    description:</div><div class='add'>+      Configure the PD_IDLE value in nanoseconds. Defines the power-down idle</div><div class='add'>+      period in which memories are placed into power-down mode if bus is idle</div><div class='add'>+      for PD_IDLE nanoseconds.</div><div class='add'>+</div><div class='add'>+  rockchip,sr-idle-ns:</div><div class='add'>+    description:</div><div class='add'>+      Configure the SR_IDLE value in nanoseconds. Defines the self-refresh idle</div><div class='add'>+      period in which memories are placed into self-refresh mode if bus is idle</div><div class='add'>+      for SR_IDLE nanoseconds.</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  rockchip,sr-mc-gate-idle-ns:</div><div class='add'>+    description:</div><div class='add'>+      Defines the memory self-refresh and controller clock gating idle period in nanoseconds.</div><div class='add'>+      Memories are placed into self-refresh mode and memory controller clock</div><div class='add'>+      arg gating started if bus is idle for sr_mc_gate_idle nanoseconds.</div><div class='add'>+</div><div class='add'>+  rockchip,srpd-lite-idle-ns:</div><div class='add'>+    description:</div><div class='add'>+      Defines the self-refresh power down idle period in which memories are</div><div class='add'>+      placed into self-refresh power down mode if bus is idle for</div><div class='add'>+      srpd_lite_idle nanoseonds. This parameter is for LPDDR4 only.</div><div class='add'>+</div><div class='add'>+  rockchip,standby-idle-ns:</div><div class='add'>+    description:</div><div class='add'>+      Defines the standby idle period in which memories are placed into</div><div class='add'>+      self-refresh mode. The controller, pi, PHY and DRAM clock will be gated</div><div class='add'>+      if bus is idle for standby_idle nanoseconds.</div><div class='add'>+</div><div class='add'>+  rockchip,pd-idle-dis-freq-hz:</div><div class='add'>+    description:</div><div class='add'>+      Defines the power-down idle disable frequency in Hz. When the DDR</div><div class='add'>+      frequency is greater than pd-idle-dis-freq, power-down idle is disabled.</div><div class='add'>+      See also rockchip,pd-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,sr-idle-dis-freq-hz:</div><div class='add'>+    description:</div><div class='add'>+      Defines the self-refresh idle disable frequency in Hz. When the DDR</div><div class='add'>+      frequency is greater than sr-idle-dis-freq, self-refresh idle is</div><div class='add'>+      disabled. See also rockchip,sr-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,sr-mc-gate-idle-dis-freq-hz:</div><div class='add'>+    description:</div><div class='add'>+      Defines the self-refresh and memory-controller clock gating disable</div><div class='add'>+      frequency in Hz. When the DDR frequency is greater than</div><div class='add'>+      sr-mc-gate-idle-dis-freq, the clock will not be gated when idle. See also</div><div class='add'>+      rockchip,sr-mc-gate-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,srpd-lite-idle-dis-freq-hz:</div><div class='add'>+    description:</div><div class='add'>+      Defines the self-refresh power down idle disable frequency in Hz. When</div><div class='add'>+      the DDR frequency is greater than srpd-lite-idle-dis-freq, memory will</div><div class='add'>+      not be placed into self-refresh power down mode when idle. See also</div><div class='add'>+      rockchip,srpd-lite-idle-ns.</div><div class='add'>+</div><div class='add'>+  rockchip,standby-idle-dis-freq-hz:</div><div class='add'>+    description:</div><div class='add'>+      Defines the standby idle disable frequency in Hz. When the DDR frequency</div><div class='add'>+      is greater than standby-idle-dis-freq, standby idle is disabled. See also</div><div class='add'>+      rockchip,standby-idle-ns.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - devfreq-events</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - operating-points-v2</div><div class='add'>+  - center-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    memory-controller {</div><div class='add'>+      compatible = "rockchip,rk3399-dmc";</div><div class='add'>+      devfreq-events = &lt;&amp;dfi&gt;;</div><div class='add'>+      rockchip,pmu = &lt;&amp;pmu&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;cru SCLK_DDRC&gt;;</div><div class='add'>+      clock-names = "dmc_clk";</div><div class='add'>+      operating-points-v2 = &lt;&amp;dmc_opp_table&gt;;</div><div class='add'>+      center-supply = &lt;&amp;ppvar_centerlogic&gt;;</div><div class='add'>+      rockchip,pd-idle-ns = &lt;160&gt;;</div><div class='add'>+      rockchip,sr-idle-ns = &lt;10240&gt;;</div><div class='add'>+      rockchip,sr-mc-gate-idle-ns = &lt;40960&gt;;</div><div class='add'>+      rockchip,srpd-lite-idle-ns = &lt;61440&gt;;</div><div class='add'>+      rockchip,standby-idle-ns = &lt;81920&gt;;</div><div class='add'>+      rockchip,ddr3_odt_dis_freq = &lt;333000000&gt;;</div><div class='add'>+      rockchip,lpddr3_odt_dis_freq = &lt;333000000&gt;;</div><div class='add'>+      rockchip,lpddr4_odt_dis_freq = &lt;333000000&gt;;</div><div class='add'>+      rockchip,pd-idle-dis-freq-hz = &lt;1000000000&gt;;</div><div class='add'>+      rockchip,sr-idle-dis-freq-hz = &lt;1000000000&gt;;</div><div class='add'>+      rockchip,sr-mc-gate-idle-dis-freq-hz = &lt;1000000000&gt;;</div><div class='add'>+      rockchip,srpd-lite-idle-dis-freq-hz = &lt;0&gt;;</div><div class='add'>+      rockchip,standby-idle-dis-freq-hz = &lt;928000000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml b/Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml<br/>index f152243f6b18..783ac984d898 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/samsung,exynos5422-dmc.yaml</a></div><div class='hunk'>@@ -9,7 +9,7 @@ title: |</div><div class='ctx'>   Controller device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Lukasz Luba &lt;lukasz.luba@arm.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='hunk'>@@ -42,7 +42,7 @@ properties:</div><div class='ctx'>     maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   devfreq-events:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 16</div><div class='ctx'>     items:</div><div class='hunk'>@@ -50,7 +50,7 @@ properties:</div><div class='ctx'>     description: phandles of the PPMU events used by the controller.</div><div class='ctx'> </div><div class='ctx'>   device-handle:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: |</div><div class='ctx'>       phandle of the connected DRAM memory device. For more information please</div><div class='ctx'>       refer to jedec,lpddr3.yaml.</div><div class='hunk'>@@ -73,7 +73,7 @@ properties:</div><div class='ctx'>       - description: registers of DREX1</div><div class='ctx'> </div><div class='ctx'>   samsung,syscon-clk:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: |</div><div class='ctx'>       Phandle of the clock register set used by the controller, these registers</div><div class='ctx'>       are used for enabling a 'pause' feature and are not exposed by clock</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml b/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml<br/>new file mode 100644<br/>index 000000000000..e68c4306025a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/snps,dw-umctl2-ddrc.yaml</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys DesignWare Universal Multi-Protocol Memory Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+  - Manish Narani &lt;manish.narani@xilinx.com&gt;</div><div class='add'>+  - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Synopsys DesignWare Enhanced uMCTL2 DDR Memory Controller is capable of</div><div class='add'>+  working with the memory devices supporting up to (LP)DDR4 protocol. It can</div><div class='add'>+  be equipped with SEC/DEC ECC feature if DRAM data bus width is either</div><div class='add'>+  16-bits or 32-bits or 64-bits wide.</div><div class='add'>+</div><div class='add'>+  For instance the ZynqMP DDR controller is based on the DW uMCTL2 v2.40a</div><div class='add'>+  controller. It has an optional SEC/DEC ECC support in 64- and 32-bits</div><div class='add'>+  bus width configurations.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - deprecated: true</div><div class='add'>+        description: Synopsys DW uMCTL2 DDR controller v3.80a</div><div class='add'>+        const: snps,ddrc-3.80a</div><div class='add'>+      - description: Synopsys DW uMCTL2 DDR controller</div><div class='add'>+        const: snps,dw-umctl2-ddrc</div><div class='add'>+      - description: Xilinx ZynqMP DDR controller v2.40a</div><div class='add'>+        const: xlnx,zynqmp-ddrc-2.40a</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      DW uMCTL2 DDRC IP-core provides individual IRQ signal for each event":"</div><div class='add'>+      ECC Corrected Error, ECC Uncorrected Error, ECC Address Protection,</div><div class='add'>+      Scrubber-Done signal, DFI Parity/CRC Error. Some platforms may have the</div><div class='add'>+      signals merged before they reach the IRQ controller or have some of them</div><div class='add'>+      absent in case if the corresponding feature is unavailable/disabled.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Common ECC CE/UE/Scrubber/DFI Errors IRQ</div><div class='add'>+        items:</div><div class='add'>+          - const: ecc</div><div class='add'>+      - description: Individual ECC CE/UE/Scrubber/DFI Errors IRQs</div><div class='add'>+        items:</div><div class='add'>+          enum: [ ecc_ce, ecc_ue, ecc_ap, ecc_sbr, dfi_e ]</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      A standard set of the clock sources contains CSRs bus clock, AXI-ports</div><div class='add'>+      reference clock, DDRC core clock, Scrubber standalone clock</div><div class='add'>+      (synchronous to the DDRC clock).</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      enum: [ pclk, aclk, core, sbr ]</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    description:</div><div class='add'>+      Each clock domain can have separate reset signal.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      enum: [ prst, arst, core, sbr ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    memory-controller@fd070000 {</div><div class='add'>+      compatible = "xlnx,zynqmp-ddrc-2.40a";</div><div class='add'>+      reg = &lt;0xfd070000 0x30000&gt;;</div><div class='add'>+</div><div class='add'>+      interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "ecc";</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    memory-controller@3d400000 {</div><div class='add'>+      compatible = "snps,dw-umctl2-ddrc";</div><div class='add'>+      reg = &lt;0x3d400000 0x400000&gt;;</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;147 IRQ_TYPE_LEVEL_HIGH&gt;, &lt;148 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;149 IRQ_TYPE_LEVEL_HIGH&gt;, &lt;150 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "ecc_ce", "ecc_ue", "ecc_sbr", "dfi_e";</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;pclk&gt;, &lt;&amp;aclk&gt;, &lt;&amp;core_clk&gt;, &lt;&amp;sbr_clk&gt;;</div><div class='add'>+      clock-names = "pclk", "aclk", "core", "sbr";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi-props.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi-props.yaml<br/>new file mode 100644<br/>index 000000000000..475e4095068c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi-props.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Peripheral properties for ST FMC2 Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christophe Kerello &lt;christophe.kerello@foss.st.com&gt;</div><div class='add'>+  - Marek Vasut &lt;marex@denx.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  st,fmc2-ebi-cs-transaction-type:</div><div class='add'>+    description: |</div><div class='add'>+      Select one of the transactions type supported</div><div class='add'>+      0: Asynchronous mode 1 SRAM/FRAM.</div><div class='add'>+      1: Asynchronous mode 1 PSRAM.</div><div class='add'>+      2: Asynchronous mode A SRAM/FRAM.</div><div class='add'>+      3: Asynchronous mode A PSRAM.</div><div class='add'>+      4: Asynchronous mode 2 NOR.</div><div class='add'>+      5: Asynchronous mode B NOR.</div><div class='add'>+      6: Asynchronous mode C NOR.</div><div class='add'>+      7: Asynchronous mode D NOR.</div><div class='add'>+      8: Synchronous read synchronous write PSRAM.</div><div class='add'>+      9: Synchronous read asynchronous write PSRAM.</div><div class='add'>+      10: Synchronous read synchronous write NOR.</div><div class='add'>+      11: Synchronous read asynchronous write NOR.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 11</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-cclk-enable:</div><div class='add'>+    description: Continuous clock enable (first bank must be configured</div><div class='add'>+      in synchronous mode). The FMC_CLK is generated continuously</div><div class='add'>+      during asynchronous and synchronous access. By default, the</div><div class='add'>+      FMC_CLK is only generated during synchronous access.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-mux-enable:</div><div class='add'>+    description: Address/Data multiplexed on databus (valid only with</div><div class='add'>+      NOR and PSRAM transactions type). By default, Address/Data</div><div class='add'>+      are not multiplexed.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-buswidth:</div><div class='add'>+    description: Data bus width</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 8, 16 ]</div><div class='add'>+    default: 16</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-waitpol-high:</div><div class='add'>+    description: Wait signal polarity (NWAIT signal active high).</div><div class='add'>+      By default, NWAIT is active low.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-waitcfg-enable:</div><div class='add'>+    description: The NWAIT signal indicates wheither the data from the</div><div class='add'>+      device are valid or if a wait state must be inserted when accessing</div><div class='add'>+      the device in synchronous mode. By default, the NWAIT signal is</div><div class='add'>+      active one data cycle before wait state.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-wait-enable:</div><div class='add'>+    description: The NWAIT signal is enabled (its level is taken into</div><div class='add'>+      account after the programmed latency period to insert wait states</div><div class='add'>+      if asserted). By default, the NWAIT signal is disabled.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-asyncwait-enable:</div><div class='add'>+    description: The NWAIT signal is taken into account during asynchronous</div><div class='add'>+      transactions. By default, the NWAIT signal is not taken into account</div><div class='add'>+      during asynchronous transactions.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-cpsize:</div><div class='add'>+    description: CRAM page size. The controller splits the burst access</div><div class='add'>+      when the memory page is reached. By default, no burst split when</div><div class='add'>+      crossing page boundary.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 128, 256, 512, 1024 ]</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-byte-lane-setup-ns:</div><div class='add'>+    description: This property configures the byte lane setup timing</div><div class='add'>+      defined in nanoseconds from NBLx low to Chip Select NEx low.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-address-setup-ns:</div><div class='add'>+    description: This property defines the duration of the address setup</div><div class='add'>+      phase in nanoseconds used for asynchronous read/write transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-address-hold-ns:</div><div class='add'>+    description: This property defines the duration of the address hold</div><div class='add'>+      phase in nanoseconds used for asynchronous multiplexed read/write</div><div class='add'>+      transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-data-setup-ns:</div><div class='add'>+    description: This property defines the duration of the data setup phase</div><div class='add'>+      in nanoseconds used for asynchronous read/write transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-bus-turnaround-ns:</div><div class='add'>+    description: This property defines the delay in nanoseconds between the</div><div class='add'>+      end of current read/write transaction and the next transaction.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-data-hold-ns:</div><div class='add'>+    description: This property defines the duration of the data hold phase</div><div class='add'>+      in nanoseconds used for asynchronous read/write transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-clk-period-ns:</div><div class='add'>+    description: This property defines the FMC_CLK output signal period in</div><div class='add'>+      nanoseconds.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-data-latency-ns:</div><div class='add'>+    description: This property defines the data latency before reading or</div><div class='add'>+      writing the first data in nanoseconds.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-write-address-setup-ns:</div><div class='add'>+    description: This property defines the duration of the address setup</div><div class='add'>+      phase in nanoseconds used for asynchronous write transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-write-address-hold-ns:</div><div class='add'>+    description: This property defines the duration of the address hold</div><div class='add'>+      phase in nanoseconds used for asynchronous multiplexed write</div><div class='add'>+      transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-write-data-setup-ns:</div><div class='add'>+    description: This property defines the duration of the data setup</div><div class='add'>+      phase in nanoseconds used for asynchronous write transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-write-bus-turnaround-ns:</div><div class='add'>+    description: This property defines the delay between the end of current</div><div class='add'>+      write transaction and the next transaction in nanoseconds.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-write-data-hold-ns:</div><div class='add'>+    description: This property defines the duration of the data hold phase</div><div class='add'>+      in nanoseconds used for asynchronous write transactions.</div><div class='add'>+</div><div class='add'>+  st,fmc2-ebi-cs-max-low-pulse-ns:</div><div class='add'>+    description: This property defines the maximum chip select low pulse</div><div class='add'>+      duration in nanoseconds for synchronous transactions. When this timing</div><div class='add'>+      reaches 0, the controller splits the current access, toggles NE to</div><div class='add'>+      allow device refresh and restarts a new access.</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml<br/>index 6b516d3895af..14f1833d37c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings</div><div class='add'>+title: STMicroelectronics Flexible Memory Controller 2 (FMC2)</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The FMC2 functional block makes the interface with: synchronous and</div><div class='hunk'>@@ -47,144 +47,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-4],[a-f0-9]+$":</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     type: object</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      reg:</div><div class='del'>-        description: Bank number, base address and size of the device.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-transaction-type:</div><div class='del'>-        description: |</div><div class='del'>-          Select one of the transactions type supported</div><div class='del'>-          0: Asynchronous mode 1 SRAM/FRAM.</div><div class='del'>-          1: Asynchronous mode 1 PSRAM.</div><div class='del'>-          2: Asynchronous mode A SRAM/FRAM.</div><div class='del'>-          3: Asynchronous mode A PSRAM.</div><div class='del'>-          4: Asynchronous mode 2 NOR.</div><div class='del'>-          5: Asynchronous mode B NOR.</div><div class='del'>-          6: Asynchronous mode C NOR.</div><div class='del'>-          7: Asynchronous mode D NOR.</div><div class='del'>-          8: Synchronous read synchronous write PSRAM.</div><div class='del'>-          9: Synchronous read asynchronous write PSRAM.</div><div class='del'>-          10: Synchronous read synchronous write NOR.</div><div class='del'>-          11: Synchronous read asynchronous write NOR.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        minimum: 0</div><div class='del'>-        maximum: 11</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-cclk-enable:</div><div class='del'>-        description: Continuous clock enable (first bank must be configured</div><div class='del'>-          in synchronous mode). The FMC_CLK is generated continuously</div><div class='del'>-          during asynchronous and synchronous access. By default, the</div><div class='del'>-          FMC_CLK is only generated during synchronous access.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-mux-enable:</div><div class='del'>-        description: Address/Data multiplexed on databus (valid only with</div><div class='del'>-          NOR and PSRAM transactions type). By default, Address/Data</div><div class='del'>-          are not multiplexed.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-buswidth:</div><div class='del'>-        description: Data bus width</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [ 8, 16 ]</div><div class='del'>-        default: 16</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-waitpol-high:</div><div class='del'>-        description: Wait signal polarity (NWAIT signal active high).</div><div class='del'>-          By default, NWAIT is active low.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-waitcfg-enable:</div><div class='del'>-        description: The NWAIT signal indicates wheither the data from the</div><div class='del'>-          device are valid or if a wait state must be inserted when accessing</div><div class='del'>-          the device in synchronous mode. By default, the NWAIT signal is</div><div class='del'>-          active one data cycle before wait state.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-wait-enable:</div><div class='del'>-        description: The NWAIT signal is enabled (its level is taken into</div><div class='del'>-          account after the programmed latency period to insert wait states</div><div class='del'>-          if asserted). By default, the NWAIT signal is disabled.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-asyncwait-enable:</div><div class='del'>-        description: The NWAIT signal is taken into account during asynchronous</div><div class='del'>-          transactions. By default, the NWAIT signal is not taken into account</div><div class='del'>-          during asynchronous transactions.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-cpsize:</div><div class='del'>-        description: CRAM page size. The controller splits the burst access</div><div class='del'>-          when the memory page is reached. By default, no burst split when</div><div class='del'>-          crossing page boundary.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        enum: [ 0, 128, 256, 512, 1024 ]</div><div class='del'>-        default: 0</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-byte-lane-setup-ns:</div><div class='del'>-        description: This property configures the byte lane setup timing</div><div class='del'>-          defined in nanoseconds from NBLx low to Chip Select NEx low.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-address-setup-ns:</div><div class='del'>-        description: This property defines the duration of the address setup</div><div class='del'>-          phase in nanoseconds used for asynchronous read/write transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-address-hold-ns:</div><div class='del'>-        description: This property defines the duration of the address hold</div><div class='del'>-          phase in nanoseconds used for asynchronous multiplexed read/write</div><div class='del'>-          transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-data-setup-ns:</div><div class='del'>-        description: This property defines the duration of the data setup phase</div><div class='del'>-          in nanoseconds used for asynchronous read/write transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-bus-turnaround-ns:</div><div class='del'>-        description: This property defines the delay in nanoseconds between the</div><div class='del'>-          end of current read/write transaction and the next transaction.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-data-hold-ns:</div><div class='del'>-        description: This property defines the duration of the data hold phase</div><div class='del'>-          in nanoseconds used for asynchronous read/write transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-clk-period-ns:</div><div class='del'>-        description: This property defines the FMC_CLK output signal period in</div><div class='del'>-          nanoseconds.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-data-latency-ns:</div><div class='del'>-        description: This property defines the data latency before reading or</div><div class='del'>-          writing the first data in nanoseconds.</div><div class='del'>-</div><div class='del'>-      st,fmc2_ebi-cs-write-address-setup-ns:</div><div class='del'>-        description: This property defines the duration of the address setup</div><div class='del'>-          phase in nanoseconds used for asynchronous write transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-write-address-hold-ns:</div><div class='del'>-        description: This property defines the duration of the address hold</div><div class='del'>-          phase in nanoseconds used for asynchronous multiplexed write</div><div class='del'>-          transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-write-data-setup-ns:</div><div class='del'>-        description: This property defines the duration of the data setup</div><div class='del'>-          phase in nanoseconds used for asynchronous write transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-write-bus-turnaround-ns:</div><div class='del'>-        description: This property defines the delay between the end of current</div><div class='del'>-          write transaction and the next transaction in nanoseconds.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-write-data-hold-ns:</div><div class='del'>-        description: This property defines the duration of the data hold phase</div><div class='del'>-          in nanoseconds used for asynchronous write transactions.</div><div class='del'>-</div><div class='del'>-      st,fmc2-ebi-cs-max-low-pulse-ns:</div><div class='del'>-        description: This property defines the maximum chip select low pulse</div><div class='del'>-          duration in nanoseconds for synchronous transactions. When this timing</div><div class='del'>-          reaches 0, the controller splits the current access, toggles NE to</div><div class='del'>-          allow device refresh and restarts a new access.</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - reg</div><div class='add'>+    $ref: mc-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#address-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml b/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml<br/>deleted file mode 100644<br/>index fb7ae38a9c86..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/synopsys,ddrc-ecc.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,74 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/memory-controllers/synopsys,ddrc-ecc.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Synopsys IntelliDDR Multi Protocol memory controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='del'>-  - Manish Narani &lt;manish.narani@xilinx.com&gt;</div><div class='del'>-  - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  The ZynqMP DDR ECC controller has an optional ECC support in 64-bit and</div><div class='del'>-  32-bit bus width configurations.</div><div class='del'>-</div><div class='del'>-  The Zynq DDR ECC controller has an optional ECC support in half-bus width</div><div class='del'>-  (16-bit) configuration.</div><div class='del'>-</div><div class='del'>-  These both ECC controllers correct single bit ECC errors and detect double bit</div><div class='del'>-  ECC errors.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - xlnx,zynq-ddrc-a05</div><div class='del'>-      - xlnx,zynqmp-ddrc-2.40a</div><div class='del'>-      - snps,ddrc-3.80a</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            const: xlnx,zynqmp-ddrc-2.40a</div><div class='del'>-    then:</div><div class='del'>-      required:</div><div class='del'>-        - interrupts</div><div class='del'>-    else:</div><div class='del'>-      properties:</div><div class='del'>-        interrupts: false</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    memory-controller@f8006000 {</div><div class='del'>-        compatible = "xlnx,zynq-ddrc-a05";</div><div class='del'>-        reg = &lt;0xf8006000 0x1000&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    axi {</div><div class='del'>-        #address-cells = &lt;2&gt;;</div><div class='del'>-        #size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-        memory-controller@fd070000 {</div><div class='del'>-            compatible = "xlnx,zynqmp-ddrc-2.40a";</div><div class='del'>-            reg = &lt;0x0 0xfd070000 0x0 0x30000&gt;;</div><div class='del'>-            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-            interrupts = &lt;0 112 4&gt;;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml<br/>index 9ed51185ff99..382ddab60fbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ti,da8xx-ddrctl.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Texas Instruments da8xx DDR2/mDDR memory controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Documentation:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml<br/>index 6e3995bb1630..383d19e0ba26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: device tree bindings for children of the Texas Instruments GPMC</div><div class='add'>+title: Texas Instruments GPMC Bus Child Nodes</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='hunk'>@@ -230,6 +230,13 @@ properties:</div><div class='ctx'>       Wait-pin used by client. Must be less than "gpmc,num-waitpins".</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='add'>+  ti,wait-pin-polarity:</div><div class='add'>+    description: |</div><div class='add'>+      Set the desired polarity for the selected wait pin.</div><div class='add'>+      0 for active low, 1 for active high.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='ctx'>   gpmc,wait-on-read:</div><div class='ctx'>     description: Enables wait monitoring on reads.</div><div class='ctx'>     type: boolean</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml<br/>index e188a4bf755c..bc9406929f6c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments GPMC Memory Controller device-tree bindings</div><div class='add'>+title: Texas Instruments GPMC Memory Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='hunk'>@@ -90,7 +90,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller:</div><div class='ctx'>     description: |</div><div class='del'>-      The GPMC driver implements and interrupt controller for</div><div class='add'>+      The GPMC driver implements an interrupt controller for</div><div class='ctx'>       the NAND events "fifoevent" and "termcount" plus the</div><div class='ctx'>       rising/falling edges on the GPMC_WAIT pins.</div><div class='ctx'>       The interrupt number mapping is as follows</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml<br/>new file mode 100644<br/>index 000000000000..8f72e2f8588a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/xlnx,zynq-ddrc-a05.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/xlnx,zynq-ddrc-a05.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Zynq A05 DDR Memory Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+  - Manish Narani &lt;manish.narani@xilinx.com&gt;</div><div class='add'>+  - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Zynq DDR ECC controller has an optional ECC support in half-bus width</div><div class='add'>+  (16-bit) configuration. It is cappable of correcting single bit ECC errors</div><div class='add'>+  and detecting double bit ECC errors.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xlnx,zynq-ddrc-a05</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    memory-controller@f8006000 {</div><div class='add'>+      compatible = "xlnx,zynq-ddrc-a05";</div><div class='add'>+      reg = &lt;0xf8006000 0x1000&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml b/Documentation/devicetree/bindings/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml<br/>new file mode 100644<br/>index 000000000000..ca9fc747bf4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/memory-controllers/xlnx,zynqmp-ocmc-1.0.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx Zynqmp OCM(On-Chip Memory) Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shubhrajyoti Datta &lt;shubhrajyoti.datta@amd.com&gt;</div><div class='add'>+  - Sai Krishna Potthuri &lt;sai.krishna.potthuri@amd.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The OCM supports 64-bit wide ECC functionality to detect multi-bit errors</div><div class='add'>+  and recover from a single-bit memory fault.On a write, if all bytes are</div><div class='add'>+  being written, the ECC is generated and written into the ECC RAM along with</div><div class='add'>+  the write-data that is written into the data RAM. If one or more bytes are</div><div class='add'>+  not written, then the read operation results in an correctable error or</div><div class='add'>+  uncorrectable error.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xlnx,zynqmp-ocmc-1.0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    memory-controller@ff960000 {</div><div class='add'>+      compatible = "xlnx,zynqmp-ocmc-1.0";</div><div class='add'>+      reg = &lt;0xff960000 0x1000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml b/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml<br/>index dd43a0c766f3..6811246c5771 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/actions,atc260x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/actions,atc260x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/actions,atc260x.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/actions,atc260x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Actions Semi ATC260x Power Management IC bindings</div><div class='add'>+title: Actions Semi ATC260x Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='hunk'>@@ -129,7 +129,7 @@ required:</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml<br/>index f591332fc462..93f5065a6280 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/allwinner,sun4i-a10-ts.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/allwinner,sun4i-a10-ts.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Resistive Touchscreen Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Resistive Touchscreen Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml<br/>index d131759ccaf3..cf94176fe1eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 PRCM Device Tree Bindings</div><div class='add'>+title: Allwinner A31 PRCM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -22,6 +22,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*_(clk|rst)$":</div><div class='ctx'>     type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -38,6 +39,45 @@ patternProperties:</div><div class='ctx'>           properties:</div><div class='ctx'>             compatible:</div><div class='ctx'>               contains:</div><div class='add'>+                const: fixed-factor-clock</div><div class='add'>+</div><div class='add'>+        then:</div><div class='add'>+          $ref: /schemas/clock/fixed-factor-clock.yaml#</div><div class='add'>+</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            compatible:</div><div class='add'>+              contains:</div><div class='add'>+                const: allwinner,sun4i-a10-mod0-clk</div><div class='add'>+</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            "#clock-cells":</div><div class='add'>+              const: 0</div><div class='add'>+</div><div class='add'>+            # Already checked in the main schema</div><div class='add'>+            compatible: true</div><div class='add'>+</div><div class='add'>+            clocks:</div><div class='add'>+              maxItems: 2</div><div class='add'>+</div><div class='add'>+            clock-output-names:</div><div class='add'>+              maxItems: 1</div><div class='add'>+</div><div class='add'>+            phandle: true</div><div class='add'>+</div><div class='add'>+          required:</div><div class='add'>+            - "#clock-cells"</div><div class='add'>+            - compatible</div><div class='add'>+            - clocks</div><div class='add'>+            - clock-output-names</div><div class='add'>+</div><div class='add'>+          additionalProperties: false</div><div class='add'>+</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            compatible:</div><div class='add'>+              contains:</div><div class='ctx'>                 const: allwinner,sun6i-a31-apb0-clk</div><div class='ctx'> </div><div class='ctx'>         then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml b/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml<br/>index aa5e683b236c..16c80a7eec49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/allwinner,sun8i-a23-prcm.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A23 PRCM Device Tree Bindings</div><div class='add'>+title: Allwinner A23 PRCM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -22,6 +22,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*(clk|rst|codec).*$":</div><div class='ctx'>     type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -40,6 +41,15 @@ patternProperties:</div><div class='ctx'>           properties:</div><div class='ctx'>             compatible:</div><div class='ctx'>               contains:</div><div class='add'>+                const: fixed-factor-clock</div><div class='add'>+</div><div class='add'>+        then:</div><div class='add'>+          $ref: /schemas/clock/fixed-factor-clock.yaml#</div><div class='add'>+</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            compatible:</div><div class='add'>+              contains:</div><div class='ctx'>                 const: allwinner,sun8i-a23-apb0-clk</div><div class='ctx'> </div><div class='ctx'>         then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml b/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml<br/>new file mode 100644<br/>index 000000000000..c442c3cdffed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ampere,smpro.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/ampere,smpro.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/ampere,smpro.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ampere Altra SMPro firmware driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Quan Nguyen &lt;quan@os.amperecomputing.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Ampere Altra SMPro firmware may contain different blocks like hardware</div><div class='add'>+  monitoring, error monitoring and other miscellaneous features.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ampere,smpro</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      I2C device address.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        smpro@4f {</div><div class='add'>+            compatible = "ampere,smpro";</div><div class='add'>+            reg = &lt;0x4f&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml b/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml<br/>new file mode 100644<br/>index 000000000000..1689b986f441<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/aspeed,ast2x00-scu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Aspeed System Control Unit</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Aspeed System Control Unit manages the global behaviour of the SoC,</div><div class='add'>+  configuring elements such as clocks, pinmux, and reset.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Joel Stanley &lt;joel@jms.id.au&gt;</div><div class='add'>+  - Andrew Jeffery &lt;andrew@aj.id.au&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - aspeed,ast2400-scu</div><div class='add'>+          - aspeed,ast2500-scu</div><div class='add'>+          - aspeed,ast2600-scu</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^p2a-control@[0-9a-f]+$':</div><div class='add'>+    description: See Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  '^pinctrl(@[0-9a-f]+)?$':</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: /schemas/pinctrl/aspeed,ast2400-pinctrl.yaml</div><div class='add'>+      - $ref: /schemas/pinctrl/aspeed,ast2500-pinctrl.yaml</div><div class='add'>+      - $ref: /schemas/pinctrl/aspeed,ast2600-pinctrl.yaml</div><div class='add'>+</div><div class='add'>+  '^interrupt-controller@[0-9a-f]+$':</div><div class='add'>+    description: See Documentation/devicetree/bindings/interrupt-controller/aspeed,ast2xxx-scu-ic.txt</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+  '^silicon-id@[0-9a-f]+$':</div><div class='add'>+    description: Unique hardware silicon identifiers within the SoC</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - aspeed,ast2400-silicon-id</div><div class='add'>+              - aspeed,ast2500-silicon-id</div><div class='add'>+              - aspeed,ast2600-silicon-id</div><div class='add'>+          - const: aspeed,silicon-id</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        description:</div><div class='add'>+          The reg should be the unique silicon id register, and not backwards</div><div class='add'>+          compatible one in eg. the 2600.</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - description: silicon id information registers</div><div class='add'>+          - description: unique chip id registers</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - ranges</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@1e6e2000 {</div><div class='add'>+        compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";</div><div class='add'>+        reg = &lt;0x1e6e2000 0x1a8&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x1e6e2000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        silicon-id@7c {</div><div class='add'>+            compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";</div><div class='add'>+            reg = &lt;0x7c 0x4&gt;, &lt;0x150 0x8&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt<br/>deleted file mode 100644<br/>index 857ee33f7329..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/aspeed-scu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/aspeed-scu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-The Aspeed System Control Unit manages the global behaviour of the SoC,</div><div class='del'>-configuring elements such as clocks, pinmux, and reset.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:	One of:</div><div class='del'>-		"aspeed,ast2400-scu", "syscon", "simple-mfd"</div><div class='del'>-		"aspeed,ast2500-scu", "syscon", "simple-mfd"</div><div class='del'>-</div><div class='del'>-- reg:		contains the offset and length of the SCU memory region</div><div class='del'>-- #clock-cells: should be set to &lt;1&gt; - the system controller is also a</div><div class='del'>-	clock provider</div><div class='del'>-- #reset-cells: should be set to &lt;1&gt; - the system controller is also a</div><div class='del'>-	reset line provider</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-syscon: syscon@1e6e2000 {</div><div class='del'>-	compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";</div><div class='del'>-	reg = &lt;0x1e6e2000 0x1a8&gt;;</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-	#reset-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Silicon ID</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-Families have unique hardware silicon identifiers within the SoC.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>- - compatible:		"aspeed,silicon-id" or:</div><div class='del'>-			"aspeed,ast2400-silicon-id" or</div><div class='del'>-			"aspeed,ast2500-silicon-id" or</div><div class='del'>-			"aspeed,ast2600-silicon-id"</div><div class='del'>-</div><div class='del'>- - reg:			offset and length of the silicon id information</div><div class='del'>-			optionally, a second offset and length describes the unique chip id</div><div class='del'>-</div><div class='del'>-			The reg should be the unique silicon id register, and</div><div class='del'>-			not backwards compatible one in eg. the 2600.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-silicon-id@7c {</div><div class='del'>-        compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";</div><div class='del'>-        reg = &lt;0x7c 0x4 0x150 0x8&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt b/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt<br/>index 692300117c64..9d837535637b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/atmel-flexcom.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/atmel-flexcom.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/atmel-flexcom.txt</a></div><div class='hunk'>@@ -54,7 +54,7 @@ flexcom@f8034000 {</div><div class='ctx'> 		clock-names = "spi_clk";</div><div class='ctx'> 		atmel,fifo-size = &lt;32&gt;;</div><div class='ctx'> </div><div class='del'>-		mtd_dataflash@0 {</div><div class='add'>+		flash@0 {</div><div class='ctx'> 			compatible = "atmel,at25f512b";</div><div class='ctx'> 			reg = &lt;0&gt;;</div><div class='ctx'> 			spi-max-frequency = &lt;20000000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/atmel-usart.txt b/Documentation/devicetree/bindings/mfd/atmel-usart.txt<br/>deleted file mode 100644<br/>index a09133066aff..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/atmel-usart.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/atmel-usart.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,98 +0,0 @@</div><div class='del'>-* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)</div><div class='del'>-</div><div class='del'>-Required properties for USART:</div><div class='del'>-- compatible: Should be one of the following:</div><div class='del'>-	- "atmel,at91rm9200-usart"</div><div class='del'>-	- "atmel,at91sam9260-usart"</div><div class='del'>-	- "microchip,sam9x60-usart"</div><div class='del'>-	- "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"</div><div class='del'>-	- "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"</div><div class='del'>-	- "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"</div><div class='del'>-- reg: Should contain registers location and length</div><div class='del'>-- interrupts: Should contain interrupt</div><div class='del'>-- clock-names: tuple listing input clock names.</div><div class='del'>-	Required elements: "usart"</div><div class='del'>-- clocks: phandles to input clocks.</div><div class='del'>-</div><div class='del'>-Required properties for USART in SPI mode:</div><div class='del'>-- #size-cells      : Must be &lt;0&gt;</div><div class='del'>-- #address-cells   : Must be &lt;1&gt;</div><div class='del'>-- cs-gpios: chipselects (internal cs not supported)</div><div class='del'>-- atmel,usart-mode : Must be &lt;AT91_USART_MODE_SPI&gt; (found in dt-bindings/mfd/at91-usart.h)</div><div class='del'>-</div><div class='del'>-Optional properties in serial and SPI mode:</div><div class='del'>-- dma bindings for dma transfer:</div><div class='del'>-	- dmas: DMA specifier, consisting of a phandle to DMA controller node,</div><div class='del'>-		memory peripheral interface and USART DMA channel ID, FIFO configuration.</div><div class='del'>-		The order of DMA channels is fixed. The first DMA channel must be TX</div><div class='del'>-		associated channel and the second one must be RX associated channel.</div><div class='del'>-		Refer to dma.txt and atmel-dma.txt for details.</div><div class='del'>-	- dma-names: "tx" for TX channel.</div><div class='del'>-		     "rx" for RX channel.</div><div class='del'>-		     The order of dma-names is also fixed. The first name must be "tx"</div><div class='del'>-		     and the second one must be "rx" as in the examples below.</div><div class='del'>-</div><div class='del'>-Optional properties in serial mode:</div><div class='del'>-- atmel,use-dma-rx: use of PDC or DMA for receiving data</div><div class='del'>-- atmel,use-dma-tx: use of PDC or DMA for transmitting data</div><div class='del'>-- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.</div><div class='del'>-  It will use specified PIO instead of the peripheral function pin for the USART feature.</div><div class='del'>-  If unsure, don't specify this property.</div><div class='del'>-- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO</div><div class='del'>-  capable USARTs.</div><div class='del'>-- rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt</div><div class='del'>-</div><div class='del'>-&lt;chip&gt; compatible description:</div><div class='del'>-- at91rm9200:  legacy USART support</div><div class='del'>-- at91sam9260: generic USART implementation for SAM9 SoCs</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-- use PDC:</div><div class='del'>-	usart0: serial@fff8c000 {</div><div class='del'>-		compatible = "atmel,at91sam9260-usart";</div><div class='del'>-		reg = &lt;0xfff8c000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;7&gt;;</div><div class='del'>-		clocks = &lt;&amp;usart0_clk&gt;;</div><div class='del'>-		clock-names = "usart";</div><div class='del'>-		atmel,use-dma-rx;</div><div class='del'>-		atmel,use-dma-tx;</div><div class='del'>-		rts-gpios = &lt;&amp;pioD 15 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		cts-gpios = &lt;&amp;pioD 16 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		dtr-gpios = &lt;&amp;pioD 17 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		dsr-gpios = &lt;&amp;pioD 18 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		dcd-gpios = &lt;&amp;pioD 20 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		rng-gpios = &lt;&amp;pioD 19 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- use DMA:</div><div class='del'>-	usart0: serial@f001c000 {</div><div class='del'>-		compatible = "atmel,at91sam9260-usart";</div><div class='del'>-		reg = &lt;0xf001c000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;12 4 5&gt;;</div><div class='del'>-		clocks = &lt;&amp;usart0_clk&gt;;</div><div class='del'>-		clock-names = "usart";</div><div class='del'>-		atmel,use-dma-rx;</div><div class='del'>-		atmel,use-dma-tx;</div><div class='del'>-		dmas = &lt;&amp;dma0 2 0x3&gt;,</div><div class='del'>-		       &lt;&amp;dma0 2 0x204&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		atmel,fifo-size = &lt;32&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- SPI mode:</div><div class='del'>-	#include &lt;dt-bindings/mfd/at91-usart.h&gt;</div><div class='del'>-</div><div class='del'>-	spi0: spi@f001c000 {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";</div><div class='del'>-		atmel,usart-mode = &lt;AT91_USART_MODE_SPI&gt;;</div><div class='del'>-		reg = &lt;0xf001c000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;12 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='del'>-		clocks = &lt;&amp;usart0_clk&gt;;</div><div class='del'>-		clock-names = "usart";</div><div class='del'>-		dmas = &lt;&amp;dma0 2 AT91_DMA_CFG_PER_ID(3)&gt;,</div><div class='del'>-		       &lt;&amp;dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		cs-gpios = &lt;&amp;pioB 3 0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml<br/>index afc569bc15cf..148f1da47603 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/brcm,bcm6318-gpio-sysctl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/brcm,bcm6318-gpio-sysctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM6318 GPIO System Controller Device Tree Bindings</div><div class='add'>+title: Broadcom BCM6318 GPIO System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml<br/>index c7771c86d7c1..7e582243ea76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/brcm,bcm63268-gpio-sysctl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/brcm,bcm63268-gpio-sysctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM63268 GPIO System Controller Device Tree Bindings</div><div class='add'>+title: Broadcom BCM63268 GPIO System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml<br/>index 33963c11ae62..2230848e11c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/brcm,bcm6328-gpio-sysctl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/brcm,bcm6328-gpio-sysctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM6328 GPIO System Controller Device Tree Bindings</div><div class='add'>+title: Broadcom BCM6328 GPIO System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml<br/>index 3e44bea78b03..c06693b6f7aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/brcm,bcm6358-gpio-sysctl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM6358 GPIO System Controller Device Tree Bindings</div><div class='add'>+title: Broadcom BCM6358 GPIO System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml<br/>index 48d14a5fe0d5..c560bede0e37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/brcm,bcm6362-gpio-sysctl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/brcm,bcm6362-gpio-sysctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM6362 GPIO System Controller Device Tree Bindings</div><div class='add'>+title: Broadcom BCM6362 GPIO System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml b/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml<br/>index 307270b0cfed..c534f5f2404e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM6368 GPIO System Controller Device Tree Bindings</div><div class='add'>+title: Broadcom BCM6368 GPIO System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/brcm,twd.yaml b/Documentation/devicetree/bindings/mfd/brcm,twd.yaml<br/>index 634526f790b8..e5136a37b0a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,twd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/brcm,twd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/brcm,twd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/brcm,twd.yaml</a></div><div class='hunk'>@@ -36,6 +36,9 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='add'>+  '^timer@[a-f0-9]+$':</div><div class='add'>+    $ref: /schemas/timer/brcm,bcmbca-timer.yaml</div><div class='add'>+</div><div class='ctx'>   '^watchdog@[a-f0-9]+$':</div><div class='ctx'>     $ref: /schemas/watchdog/brcm,bcm7038-wdt.yaml</div><div class='ctx'> </div><div class='hunk'>@@ -54,6 +57,11 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='add'>+        timer@0 {</div><div class='add'>+            compatible = "brcm,bcm63138-timer";</div><div class='add'>+            reg = &lt;0x0 0x28&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='ctx'>         watchdog@28 {</div><div class='ctx'>             compatible = "brcm,bcm7038-wdt";</div><div class='ctx'>             reg = &lt;0x28 0x8&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml b/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml<br/>index c24ad45cabb5..8459d3642205 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/canaan,k210-sysctl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/canaan,k210-sysctl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Canaan Kendryte K210 System Controller Device Tree Bindings</div><div class='add'>+title: Canaan Kendryte K210 System Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</div><div class='hunk'>@@ -36,7 +36,7 @@ properties:</div><div class='ctx'>   clock-controller:</div><div class='ctx'>     # Child node</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "../clock/canaan,k210-clk.yaml"</div><div class='add'>+    $ref: ../clock/canaan,k210-clk.yaml</div><div class='ctx'>     description:</div><div class='ctx'>       Clock controller for the SoC clocks. This child node definition</div><div class='ctx'>       should follow the bindings specified in</div><div class='hunk'>@@ -45,7 +45,7 @@ properties:</div><div class='ctx'>   reset-controller:</div><div class='ctx'>     # Child node</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "../reset/canaan,k210-rst.yaml"</div><div class='add'>+    $ref: ../reset/canaan,k210-rst.yaml</div><div class='ctx'>     description:</div><div class='ctx'>       Reset controller for the SoC. This child node definition</div><div class='ctx'>       should follow the bindings specified in</div><div class='hunk'>@@ -54,7 +54,7 @@ properties:</div><div class='ctx'>   syscon-reboot:</div><div class='ctx'>     # Child node</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "../power/reset/syscon-reboot.yaml"</div><div class='add'>+    $ref: ../power/reset/syscon-reboot.yaml</div><div class='ctx'>     description:</div><div class='ctx'>       Reboot method for the SoC. This child node definition</div><div class='ctx'>       should follow the bindings specified in</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml<br/>index ad285cb480c9..ebbedabb2bd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml</a></div><div class='hunk'>@@ -144,6 +144,7 @@ properties:</div><div class='ctx'>       CODECs digital core if not being provided by an internal regulator.</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='hunk'>@@ -161,6 +162,7 @@ properties:</div><div class='ctx'>       CODECs MICVDD.</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='hunk'>@@ -177,6 +179,7 @@ properties:</div><div class='ctx'>       Initialisation data for the MIC1VDD supplies.</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='hunk'>@@ -202,6 +205,7 @@ properties:</div><div class='ctx'>       Initialisation data for the MIC2VDD supplies.</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='hunk'>@@ -228,6 +232,7 @@ properties:</div><div class='ctx'>       the CODECs analog and 1.8V digital supplies.</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='hunk'>@@ -261,7 +266,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/clk/lochnagar.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/lochnagar.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/pinctrl/lochnagar.h&gt;</div><div class='ctx'>     i2c@e0004000 {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/da9062.txt b/Documentation/devicetree/bindings/mfd/da9062.txt<br/>index bab0d0e66cb3..e4eedd3bd233 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/da9062.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/da9062.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/da9062.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/da9062.txt</a></div><div class='hunk'>@@ -33,11 +33,6 @@ Required properties:</div><div class='ctx'>     "dlg,da9061" for DA9061</div><div class='ctx'> - reg : Specifies the I2C slave address (this defaults to 0x58 but it can be</div><div class='ctx'>   modified to match the chip's OTP settings).</div><div class='del'>-- interrupts : IRQ line information.</div><div class='del'>-- interrupt-controller</div><div class='del'>-</div><div class='del'>-See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for</div><div class='del'>-further information on IRQ bindings.</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> </div><div class='hunk'>@@ -48,6 +43,12 @@ Optional properties:</div><div class='ctx'> See Documentation/devicetree/bindings/gpio/gpio.txt for further information on</div><div class='ctx'> GPIO bindings.</div><div class='ctx'> </div><div class='add'>+- interrupts : IRQ line information.</div><div class='add'>+- interrupt-controller</div><div class='add'>+</div><div class='add'>+See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for</div><div class='add'>+further information on IRQ bindings.</div><div class='add'>+</div><div class='ctx'> Sub-nodes:</div><div class='ctx'> </div><div class='ctx'> - regulators : This node defines the settings for the LDOs and BUCKs.</div><div class='hunk'>@@ -85,7 +86,7 @@ Sub-nodes:</div><div class='ctx'> </div><div class='ctx'> - onkey : See ../input/da9062-onkey.txt</div><div class='ctx'> </div><div class='del'>-- watchdog: See ../watchdog/da9062-watchdog.txt</div><div class='add'>+- watchdog: See ../watchdog/da9062-wdt.txt</div><div class='ctx'> </div><div class='ctx'> - thermal : See ../thermal/da9062-thermal.txt</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/da9063.txt b/Documentation/devicetree/bindings/mfd/da9063.txt<br/>deleted file mode 100644<br/>index 91b79a21d403..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/da9063.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/da9063.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,111 +0,0 @@</div><div class='del'>-* Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)</div><div class='del'>-</div><div class='del'>-DA9063 consists of a large and varied group of sub-devices (I2C Only):</div><div class='del'>-</div><div class='del'>-Device                   Supply Names    Description</div><div class='del'>-------                   ------------    -----------</div><div class='del'>-da9063-regulator        :               : LDOs &amp; BUCKs</div><div class='del'>-da9063-onkey            :               : On Key</div><div class='del'>-da9063-rtc              :               : Real-Time Clock (DA9063 only)</div><div class='del'>-da9063-watchdog         :               : Watchdog</div><div class='del'>-</div><div class='del'>-======</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : Should be "dlg,da9063" or "dlg,da9063l"</div><div class='del'>-- reg : Specifies the I2C slave address (this defaults to 0x58 but it can be</div><div class='del'>-  modified to match the chip's OTP settings).</div><div class='del'>-- interrupts : IRQ line information.</div><div class='del'>-- interrupt-controller</div><div class='del'>-</div><div class='del'>-Sub-nodes:</div><div class='del'>-</div><div class='del'>-- regulators : This node defines the settings for the LDOs and BUCKs.</div><div class='del'>-  The DA9063(L) regulators are bound using their names listed below:</div><div class='del'>-</div><div class='del'>-    bcore1    : BUCK CORE1</div><div class='del'>-    bcore2    : BUCK CORE2</div><div class='del'>-    bpro      : BUCK PRO</div><div class='del'>-    bmem      : BUCK MEM</div><div class='del'>-    bio       : BUCK IO</div><div class='del'>-    bperi     : BUCK PERI</div><div class='del'>-    ldo1      : LDO_1	(DA9063 only)</div><div class='del'>-    ldo2      : LDO_2	(DA9063 only)</div><div class='del'>-    ldo3      : LDO_3</div><div class='del'>-    ldo4      : LDO_4	(DA9063 only)</div><div class='del'>-    ldo5      : LDO_5	(DA9063 only)</div><div class='del'>-    ldo6      : LDO_6	(DA9063 only)</div><div class='del'>-    ldo7      : LDO_7</div><div class='del'>-    ldo8      : LDO_8</div><div class='del'>-    ldo9      : LDO_9</div><div class='del'>-    ldo10     : LDO_10	(DA9063 only)</div><div class='del'>-    ldo11     : LDO_11</div><div class='del'>-</div><div class='del'>-  The component follows the standard regulator framework and the bindings</div><div class='del'>-  details of individual regulator device can be found in:</div><div class='del'>-  Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='del'>-</div><div class='del'>-- rtc : This node defines settings for the Real-Time Clock associated with</div><div class='del'>-  the DA9063 only. The RTC is not present in DA9063L. There are currently</div><div class='del'>-  no entries in this binding, however compatible = "dlg,da9063-rtc" should</div><div class='del'>-  be added if a node is created.</div><div class='del'>-</div><div class='del'>-- onkey : This node defines the OnKey settings for controlling the key</div><div class='del'>-  functionality of the device. The node should contain the compatible property</div><div class='del'>-  with the value "dlg,da9063-onkey".</div><div class='del'>-</div><div class='del'>-  Optional onkey properties:</div><div class='del'>-</div><div class='del'>-  - dlg,disable-key-power : Disable power-down using a long key-press. If this</div><div class='del'>-    entry exists the OnKey driver will remove support for the KEY_POWER key</div><div class='del'>-    press. If this entry does not exist then by default the key-press</div><div class='del'>-    triggered power down is enabled and the OnKey will support both KEY_POWER</div><div class='del'>-    and KEY_SLEEP.</div><div class='del'>-</div><div class='del'>-- watchdog : This node defines settings for the Watchdog timer associated</div><div class='del'>-  with the DA9063 and DA9063L. There are currently no entries in this</div><div class='del'>-  binding, however compatible = "dlg,da9063-watchdog" should be added</div><div class='del'>-  if a node is created.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pmic0: da9063@58 {</div><div class='del'>-		compatible = "dlg,da9063"</div><div class='del'>-		reg = &lt;0x58&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='del'>-		interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-</div><div class='del'>-		rtc {</div><div class='del'>-			compatible = "dlg,da9063-rtc";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		wdt {</div><div class='del'>-			compatible = "dlg,da9063-watchdog";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		onkey {</div><div class='del'>-			compatible = "dlg,da9063-onkey";</div><div class='del'>-			dlg,disable-key-power;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			DA9063_BCORE1: bcore1 {</div><div class='del'>-				regulator-name = "BCORE1";</div><div class='del'>-				regulator-min-microvolt = &lt;300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1570000&gt;;</div><div class='del'>-				regulator-min-microamp = &lt;500000&gt;;</div><div class='del'>-				regulator-max-microamp = &lt;2000000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-			};</div><div class='del'>-			DA9063_LDO11: ldo11 {</div><div class='del'>-				regulator-name = "LDO_11";</div><div class='del'>-				regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3600000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml b/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml<br/>new file mode 100644<br/>index 000000000000..c5a7e10d7d80<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/dlg,da9063.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/dlg,da9063.yaml</a></div><div class='hunk'>@@ -0,0 +1,146 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/dlg,da9063.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Dialog DA9063/DA9063L Power Management Integrated Circuit (PMIC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Steve Twiss &lt;stwiss.opensource@diasemi.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  For device-tree bindings of other sub-modules refer to the binding documents</div><div class='add'>+  under the respective sub-system directories.</div><div class='add'>+  Using regulator-{uv,ov}-{warn,error,protection}-microvolt requires special</div><div class='add'>+  handling: First, when GP_FB2 is used, it must be ensured that there is no</div><div class='add'>+  moment where all voltage monitors are disabled. Next, as da9063 only supports</div><div class='add'>+  UV *and* OV monitoring, both must be set to the same severity and value</div><div class='add'>+  (0: disable, 1: enable).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - dlg,da9063</div><div class='add'>+      - dlg,da9063l</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  dlg,use-sw-pm:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Disable the watchdog during suspend.</div><div class='add'>+      Only use this option if you can't use the watchdog automatic suspend</div><div class='add'>+      function during a suspend (see register CONTROL_B).</div><div class='add'>+</div><div class='add'>+  watchdog:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/watchdog/watchdog.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: dlg,da9063-watchdog</div><div class='add'>+</div><div class='add'>+  rtc:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/rtc/rtc.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: dlg,da9063-rtc</div><div class='add'>+</div><div class='add'>+  onkey:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/input/input.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: dlg,da9063-onkey</div><div class='add'>+</div><div class='add'>+      dlg,disable-key-power:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: |</div><div class='add'>+          Disable power-down using a long key-press.</div><div class='add'>+          If this entry does not exist then by default the key-press triggered</div><div class='add'>+          power down is enabled and the OnKey will support both KEY_POWER and</div><div class='add'>+          KEY_SLEEP.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ldo([1-9]|1[01])|bcore([1-2]|s-merged)|b(pro|mem|io|peri)|bmem-bio-merged)$":</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      pmic@58 {</div><div class='add'>+        compatible = "dlg,da9063";</div><div class='add'>+        reg = &lt;0x58&gt;;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio6&gt;;</div><div class='add'>+        interrupts = &lt;11 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+</div><div class='add'>+        rtc {</div><div class='add'>+          compatible = "dlg,da9063-rtc";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        watchdog {</div><div class='add'>+          compatible = "dlg,da9063-watchdog";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        onkey {</div><div class='add'>+          compatible = "dlg,da9063-onkey";</div><div class='add'>+          dlg,disable-key-power;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        regulators {</div><div class='add'>+          bcore1 {</div><div class='add'>+            regulator-name = "BCORE1";</div><div class='add'>+            regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1570000&gt;;</div><div class='add'>+            regulator-min-microamp = &lt;500000&gt;;</div><div class='add'>+            regulator-max-microamp = &lt;2000000&gt;;</div><div class='add'>+            regulator-boot-on;</div><div class='add'>+          };</div><div class='add'>+          ldo6 {</div><div class='add'>+            /* UNUSED */</div><div class='add'>+            regulator-name = "LDO_6";</div><div class='add'>+            regulator-uv-protection-microvolt = &lt;0&gt;;</div><div class='add'>+            regulator-ov-protection-microvolt = &lt;0&gt;;</div><div class='add'>+          };</div><div class='add'>+          ldo11 {</div><div class='add'>+            regulator-name = "LDO_11";</div><div class='add'>+            regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;900000&gt;;</div><div class='add'>+            regulator-uv-protection-microvolt = &lt;1&gt;;</div><div class='add'>+            regulator-ov-protection-microvolt = &lt;1&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml<br/>index 08af356f5d27..9b11b6e2bbf7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ene-kb3930.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/ene-kb3930.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/ene-kb3930.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ENE KB3930 Embedded Controller bindings</div><div class='add'>+title: ENE KB3930 Embedded Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This binding describes the ENE KB3930 Embedded Controller attached to an</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/ene-kb930.yaml b/Documentation/devicetree/bindings/mfd/ene-kb930.yaml<br/>index 06ed9ec8f4bb..02c111def5de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ene-kb930.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ene-kb930.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ene-kb930.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/ene-kb930.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/ene-kb930.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ENE KB930 Embedded Controller bindings</div><div class='add'>+title: ENE KB930 Embedded Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This binding describes the ENE KB930 Embedded Controller attached to an</div><div class='hunk'>@@ -13,6 +13,8 @@ description: |</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dmitry Osipenko &lt;digetx@gmail.com&gt;</div><div class='ctx'> </div><div class='add'>+$ref: /schemas/power/supply/power-supply.yaml</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -22,15 +24,13 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  monitored-battery: true</div><div class='del'>-  power-supplies: true</div><div class='ctx'>   system-power-controller: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml b/Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml<br/>new file mode 100644<br/>index 000000000000..20067002cc4a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml</a></div><div class='hunk'>@@ -0,0 +1,192 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX8qm/qxp Control and Status Registers Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Ying &lt;victor.liu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  As a system controller, the Freescale i.MX8qm/qxp Control and Status</div><div class='add'>+  Registers(CSR) module represents a set of miscellaneous registers of a</div><div class='add'>+  specific subsystem.  It may provide control and/or status report interfaces</div><div class='add'>+  to a mix of standalone hardware devices within that subsystem.  One typical</div><div class='add'>+  use-case is for some other nodes to acquire a reference to the syscon node</div><div class='add'>+  by phandle, and the other typical use-case is that the operating system</div><div class='add'>+  should consider all subnodes of the CSR module as separate child devices.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^syscon@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx8qxp-mipi-lvds-csr</div><div class='add'>+          - fsl,imx8qm-lvds-csr</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: ipg</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^(ldb|phy|pxl2dpi)$":</div><div class='add'>+    type: object</div><div class='add'>+    description: The possible child devices of the CSR module.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8qxp-mipi-lvds-csr</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - pxl2dpi</div><div class='add'>+        - ldb</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8qm-lvds-csr</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - phy</div><div class='add'>+        - ldb</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8-lpcg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+    mipi_lvds_0_csr: syscon@56221000 {</div><div class='add'>+        compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";</div><div class='add'>+        reg = &lt;0x56221000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4&gt;;</div><div class='add'>+        clock-names = "ipg";</div><div class='add'>+</div><div class='add'>+        mipi_lvds_0_pxl2dpi: pxl2dpi {</div><div class='add'>+            compatible = "fsl,imx8qxp-pxl2dpi";</div><div class='add'>+            fsl,sc-resource = &lt;IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+            power-domains = &lt;&amp;pd IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    mipi_lvds_0_pxl2dpi_dc0_pixel_link0: endpoint@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;dc0_pixel_link0_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    mipi_lvds_0_pxl2dpi_dc0_pixel_link1: endpoint@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;dc0_pixel_link1_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        remote-endpoint = &lt;&amp;mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mipi_lvds_0_ldb: ldb {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "fsl,imx8qxp-ldb";</div><div class='add'>+            clocks = &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2&gt;,</div><div class='add'>+                     &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS&gt;;</div><div class='add'>+            clock-names = "pixel", "bypass";</div><div class='add'>+            power-domains = &lt;&amp;pd IMX_SC_R_LVDS_0&gt;;</div><div class='add'>+</div><div class='add'>+            channel@0 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                phys = &lt;&amp;mipi_lvds_0_phy&gt;;</div><div class='add'>+                phy-names = "lvds_phy";</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    /* ... */</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@1 {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                phys = &lt;&amp;mipi_lvds_0_phy&gt;;</div><div class='add'>+                phy-names = "lvds_phy";</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    /* ... */</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    mipi_lvds_0_phy: phy@56228300 {</div><div class='add'>+        compatible = "fsl,imx8qxp-mipi-dphy";</div><div class='add'>+        reg = &lt;0x56228300 0x100&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_PHY&gt;;</div><div class='add'>+        clock-names = "phy_ref";</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        fsl,syscon = &lt;&amp;mipi_lvds_0_csr&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd IMX_SC_R_MIPI_0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml<br/>index 5a1e8d21f7a0..acb9c54942d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml</a></div><div class='hunk'>@@ -19,7 +19,6 @@ description: |</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tim Harvey &lt;tharvey@gateworks.com&gt;</div><div class='del'>-  - Robert Jones &lt;rjones@gateworks.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='hunk'>@@ -47,6 +46,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   adc:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: Optional hardware monitoring module</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='hunk'>@@ -60,8 +60,9 @@ properties:</div><div class='ctx'>         const: 0</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      "^channel@[0-9]+$":</div><div class='add'>+      "^channel@[0-9a-f]+$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>           Properties for a single ADC which can report cooked values</div><div class='ctx'>           (i.e. temperature sensor based on thermister), raw values</div><div class='hunk'>@@ -114,6 +115,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^fan-controller@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: Optional fan controller</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml<br/>index afec0bd2f1de..e1ca4f297c6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/google,cros-ec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/google,cros-ec.yaml</a></div><div class='hunk'>@@ -20,19 +20,24 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - description:</div><div class='del'>-          For implementations of the EC is connected through I2C.</div><div class='add'>+          For implementations of the EC connected through I2C.</div><div class='ctx'>         const: google,cros-ec-i2c</div><div class='ctx'>       - description:</div><div class='del'>-          For implementations of the EC is connected through SPI.</div><div class='add'>+          For implementations of the EC connected through SPI.</div><div class='ctx'>         const: google,cros-ec-spi</div><div class='ctx'>       - description:</div><div class='del'>-          For implementations of the EC is connected through RPMSG.</div><div class='add'>+          For implementations of the FPMCU connected through SPI.</div><div class='add'>+        items:</div><div class='add'>+          - const: google,cros-ec-fp</div><div class='add'>+          - const: google,cros-ec-spi</div><div class='add'>+      - description:</div><div class='add'>+          For implementations of the EC connected through RPMSG.</div><div class='ctx'>         const: google,cros-ec-rpmsg</div><div class='add'>+      - description:</div><div class='add'>+          For implementations of the EC connected through UART.</div><div class='add'>+        const: google,cros-ec-uart</div><div class='ctx'> </div><div class='del'>-  controller-data:</div><div class='del'>-    description:</div><div class='del'>-      SPI controller data, see bindings/spi/samsung,spi-peripheral-props.yaml</div><div class='del'>-    type: object</div><div class='add'>+  controller-data: true</div><div class='ctx'> </div><div class='ctx'>   google,cros-ec-spi-pre-delay:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -57,13 +62,12 @@ properties:</div><div class='ctx'>   mediatek,rpmsg-name:</div><div class='ctx'>     description:</div><div class='ctx'>       Must be defined if the cros-ec is a rpmsg device for a Mediatek</div><div class='del'>-      ARM Cortex M4 Co-processor. Contains the name pf the rpmsg</div><div class='add'>+      ARM Cortex M4 Co-processor. Contains the name of the rpmsg</div><div class='ctx'>       device. Used to match the subnode to the rpmsg device announced by</div><div class='ctx'>       the SCP.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency:</div><div class='del'>-    description: Maximum SPI frequency of the device in Hz.</div><div class='add'>+  spi-max-frequency: true</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -71,6 +75,15 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  boot0-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Assert for bootloader mode.</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+</div><div class='ctx'>   wakeup-source:</div><div class='ctx'>     description: Button can wake-up the system.</div><div class='ctx'> </div><div class='hunk'>@@ -81,20 +94,23 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   typec:</div><div class='del'>-    $ref: "/schemas/chrome/google,cros-ec-typec.yaml#"</div><div class='add'>+    $ref: /schemas/chrome/google,cros-ec-typec.yaml#</div><div class='ctx'> </div><div class='ctx'>   ec-pwm:</div><div class='del'>-    $ref: "/schemas/pwm/google,cros-ec-pwm.yaml#"</div><div class='add'>+    $ref: /schemas/pwm/google,cros-ec-pwm.yaml#</div><div class='ctx'>     deprecated: true</div><div class='ctx'> </div><div class='ctx'>   pwm:</div><div class='del'>-    $ref: "/schemas/pwm/google,cros-ec-pwm.yaml#"</div><div class='add'>+    $ref: /schemas/pwm/google,cros-ec-pwm.yaml#</div><div class='add'>+</div><div class='add'>+  kbd-led-backlight:</div><div class='add'>+    $ref: /schemas/chrome/google,cros-kbd-led-backlight.yaml#</div><div class='ctx'> </div><div class='ctx'>   keyboard-controller:</div><div class='del'>-    $ref: "/schemas/input/google,cros-ec-keyb.yaml#"</div><div class='add'>+    $ref: /schemas/input/google,cros-ec-keyb.yaml#</div><div class='ctx'> </div><div class='ctx'>   proximity:</div><div class='del'>-    $ref: "/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#"</div><div class='add'>+    $ref: /schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#</div><div class='ctx'> </div><div class='ctx'>   codecs:</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -110,7 +126,7 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^ec-codec@[a-f0-9]+$":</div><div class='ctx'>         type: object</div><div class='del'>-        $ref: "/schemas/sound/google,cros-ec-codec.yaml#"</div><div class='add'>+        $ref: /schemas/sound/google,cros-ec-codec.yaml#</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - "#address-cells"</div><div class='hunk'>@@ -135,15 +151,15 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^i2c-tunnel[0-9]*$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "/schemas/i2c/google,cros-ec-i2c-tunnel.yaml#"</div><div class='add'>+    $ref: /schemas/i2c/google,cros-ec-i2c-tunnel.yaml#</div><div class='ctx'> </div><div class='ctx'>   "^regulator@[0-9]+$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "/schemas/regulator/google,cros-ec-regulator.yaml#"</div><div class='add'>+    $ref: /schemas/regulator/google,cros-ec-regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>   "^extcon[0-9]*$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "/schemas/extcon/extcon-usbc-cros-ec.yaml#"</div><div class='add'>+    $ref: /schemas/extcon/extcon-usbc-cros-ec.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -152,18 +168,76 @@ allOf:</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - google,cros-ec-i2c</div><div class='del'>-              - google,cros-ec-rpmsg</div><div class='add'>+          not:</div><div class='add'>+            contains:</div><div class='add'>+              const: google,cros-ec-spi</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        controller-data: false</div><div class='ctx'>         google,cros-ec-spi-pre-delay: false</div><div class='ctx'>         google,cros-ec-spi-msg-delay: false</div><div class='ctx'>         spi-max-frequency: false</div><div class='ctx'>     else:</div><div class='ctx'>       $ref: /schemas/spi/spi-peripheral-props.yaml</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          not:</div><div class='add'>+            contains:</div><div class='add'>+              const: google,cros-ec-rpmsg</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        mediatek,rpmsg-name: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          not:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - google,cros-ec-rpmsg</div><div class='add'>+                - google,cros-ec-uart</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - reg</div><div class='add'>+        - interrupts</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: google,cros-ec-fp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        '#address-cells': false</div><div class='add'>+        '#size-cells': false</div><div class='add'>+        typec: false</div><div class='add'>+        ec-pwm: false</div><div class='add'>+        kbd-led-backlight: false</div><div class='add'>+        keyboard-controller: false</div><div class='add'>+        proximity: false</div><div class='add'>+        codecs: false</div><div class='add'>+        cbas: false</div><div class='add'>+</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^i2c-tunnel[0-9]*$": false</div><div class='add'>+        "^regulator@[0-9]+$": false</div><div class='add'>+        "^extcon[0-9]*$": false</div><div class='add'>+</div><div class='add'>+      # Using additionalProperties: false here and</div><div class='add'>+      # listing true properties doesn't work</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - reset-gpios</div><div class='add'>+        - boot0-gpios</div><div class='add'>+        - vdd-supply</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reset-gpios: false</div><div class='add'>+        boot0-gpios: false</div><div class='add'>+        vdd-supply: false</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -172,7 +246,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -189,7 +263,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -219,4 +293,30 @@ examples:</div><div class='ctx'>             compatible = "google,cros-ec-rpmsg";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  # Example for FPMCU</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+      #address-cells = &lt;0x1&gt;;</div><div class='add'>+      #size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+      ec@0 {</div><div class='add'>+        compatible = "google,cros-ec-fp", "google,cros-ec-spi";</div><div class='add'>+        reg = &lt;0x0&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio_controller&gt;;</div><div class='add'>+        interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        spi-max-frequency = &lt;3000000&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio_controller 5 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        boot0-gpios = &lt;&amp;gpio_controller 10 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;pp3300_fp_mcu&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example for UART</div><div class='add'>+  - |</div><div class='add'>+    serial {</div><div class='add'>+        cros-ec {</div><div class='add'>+            compatible = "google,cros-ec-uart";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml<br/>index 22edcb4b212f..bdff5b653453 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml</a></div><div class='hunk'>@@ -53,7 +53,7 @@ properties:</div><div class='ctx'>       '^ldo[0-9]+$':</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='del'>-        $ref: "/schemas/regulator/regulator.yaml#"</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml b/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml<br/>index a3b976f101e8..084960fd5a1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/khadas,mcu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/khadas,mcu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/khadas,mcu.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/khadas,mcu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Khadas on-board Microcontroller Device Tree Bindings</div><div class='add'>+title: Khadas on-board Microcontroller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Khadas embeds a microcontroller on their VIM and Edge boards adding some</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/max77650.yaml b/Documentation/devicetree/bindings/mfd/max77650.yaml<br/>index b0a0f0d3d9d4..4181174fcf58 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/max77650.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/max77650.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/max77650.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/max77650.yaml</a></div><div class='hunk'>@@ -100,14 +100,12 @@ examples:</div><div class='ctx'>                 compatible = "maxim,max77650-regulator";</div><div class='ctx'> </div><div class='ctx'>                 max77650_ldo: regulator-ldo {</div><div class='del'>-                    regulator-compatible = "ldo";</div><div class='ctx'>                     regulator-name = "max77650-ldo";</div><div class='ctx'>                     regulator-min-microvolt = &lt;1350000&gt;;</div><div class='ctx'>                     regulator-max-microvolt = &lt;2937500&gt;;</div><div class='ctx'>                 };</div><div class='ctx'> </div><div class='ctx'>                 max77650_sbb0: regulator-sbb0 {</div><div class='del'>-                    regulator-compatible = "sbb0";</div><div class='ctx'>                     regulator-name = "max77650-sbb0";</div><div class='ctx'>                     regulator-min-microvolt = &lt;800000&gt;;</div><div class='ctx'>                     regulator-max-microvolt = &lt;1587500&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml b/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml<br/>index 27870b8760a6..995e96ee7445 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max14577.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max14577.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/maxim,max14577.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB</div><div class='hunk'>@@ -39,6 +39,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   extcon:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max5970.yaml b/Documentation/devicetree/bindings/mfd/maxim,max5970.yaml<br/>new file mode 100644<br/>index 000000000000..da67742c5aa9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max5970.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/maxim,max5970.yaml</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/maxim,max5970.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Regulator for MAX5970 Smart Switch from Maxim Integrated</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The smart switch provides no output regulation, but independent fault protection</div><div class='add'>+  and voltage and current sensing.</div><div class='add'>+  Programming is done through I2C bus.</div><div class='add'>+</div><div class='add'>+  Datasheets:</div><div class='add'>+    https://datasheets.maximintegrated.com/en/ds/MAX5970.pdf</div><div class='add'>+    https://datasheets.maximintegrated.com/en/ds/MAX5978.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,max5970</div><div class='add'>+      - maxim,max5978</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  leds:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Properties for four LEDS.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^led@[0-3]$":</div><div class='add'>+        $ref: /schemas/leds/common.yaml#</div><div class='add'>+        type: object</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  vss1-supply:</div><div class='add'>+    description: Supply of the first channel.</div><div class='add'>+</div><div class='add'>+  vss2-supply:</div><div class='add'>+    description: Supply of the second channel.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Properties for both hot swap control/switch.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^sw[0-1]$":</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        type: object</div><div class='add'>+        properties:</div><div class='add'>+          shunt-resistor-micro-ohms:</div><div class='add'>+            description: |</div><div class='add'>+              The value of current sense resistor in microohms.</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - shunt-resistor-micro-ohms</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - regulators</div><div class='add'>+  - vss1-supply</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - maxim,max5970</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - vss2-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        regulator@3a {</div><div class='add'>+            compatible = "maxim,max5978";</div><div class='add'>+            reg = &lt;0x3a&gt;;</div><div class='add'>+            vss1-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                sw0_ref_0: sw0 {</div><div class='add'>+                    shunt-resistor-micro-ohms = &lt;12000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            leds {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                led@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    label = "led0";</div><div class='add'>+                    default-state = "on";</div><div class='add'>+                };</div><div class='add'>+                led@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    label = "led1";</div><div class='add'>+                    default-state = "on";</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        regulator@3a {</div><div class='add'>+            compatible = "maxim,max5970";</div><div class='add'>+            reg = &lt;0x3a&gt;;</div><div class='add'>+            vss1-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+            vss2-supply = &lt;&amp;p5v&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                sw0_ref_1: sw0 {</div><div class='add'>+                    shunt-resistor-micro-ohms = &lt;12000&gt;;</div><div class='add'>+                };</div><div class='add'>+                sw1_ref_1: sw1 {</div><div class='add'>+                    shunt-resistor-micro-ohms = &lt;10000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml<br/>index 859655a789c3..d027aabe453b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77686.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77686.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/maxim,max77686.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Maxim MAX77686 Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77686 Power Management</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml<br/>index 906101197e11..1b06a77ec798 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77693.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77693.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/maxim,max77693.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Maxim MAX77693 MicroUSB and Companion Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77693 MicroUSB</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77714.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77714.yaml<br/>index 74a6867d3c82..edac14af101e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77714.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77714.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77714.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/maxim,max77714.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: MAX77714 PMIC with GPIO, RTC and watchdog from Maxim Integrated.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Luca Ceresoli &lt;luca@lucaceresoli.net&gt;</div><div class='add'>+  - Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   MAX77714 is a Power Management IC with 4 buck regulators, 9</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77802.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77802.yaml<br/>index baa1346ac5d5..ad2013900b03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77802.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77802.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77802.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/maxim,max77802.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Maxim MAX77802 Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Javier Martinez Canillas &lt;javier@dowhile0.org&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77802 Power Management</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml b/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml<br/>index 61a0f9dcb983..2e2a2a86b57d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/maxim,max77843.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/maxim,max77843.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/maxim,max77843.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX77843 MicroUSB and Companion Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77843 MicroUSB</div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   motor-driver:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         const: maxim,max77843-haptic</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml<br/>new file mode 100644<br/>index 000000000000..fc2a53148e1c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/mediatek,mt6357.yaml</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/mediatek,mt6357.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT6357 PMIC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Flora Fu &lt;flora.fu@mediatek.com&gt;</div><div class='add'>+  - Alexandre Mergnat &lt;amergnat@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MT6357 is a power management system chip containing 5 buck</div><div class='add'>+  converters and 29 LDOs. Supported features are audio codec,</div><div class='add'>+  USB battery charging, fuel gauge, RTC</div><div class='add'>+</div><div class='add'>+  This is a multifunction device with the following sub modules:</div><div class='add'>+  - Regulator</div><div class='add'>+  - RTC</div><div class='add'>+  - Keys</div><div class='add'>+</div><div class='add'>+  It is interfaced to host controller using SPI interface by a proprietary hardware</div><div class='add'>+  called PMIC wrapper or pwrap. This MFD is a child device of pwrap.</div><div class='add'>+  See the following for pwrap node definitions:</div><div class='add'>+  Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt6357</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/regulator/mediatek,mt6357-regulator.yaml</div><div class='add'>+    description:</div><div class='add'>+      List of MT6357 BUCKs and LDOs regulators.</div><div class='add'>+</div><div class='add'>+  rtc:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/rtc/rtc.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      MT6357 Real Time Clock.</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: mediatek,mt6357-rtc</div><div class='add'>+      start-year: true</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='add'>+  keys:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/input/mediatek,pmic-keys.yaml</div><div class='add'>+    description:</div><div class='add'>+      MT6357 power and home keys.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - regulators</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pwrap {</div><div class='add'>+        pmic {</div><div class='add'>+            compatible = "mediatek,mt6357";</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+            interrupts = &lt;145 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                mt6357_vproc_reg: buck-vproc {</div><div class='add'>+                    regulator-name = "vproc";</div><div class='add'>+                    regulator-min-microvolt = &lt;518750&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1312500&gt;;</div><div class='add'>+                    regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+                    regulator-enable-ramp-delay = &lt;220&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                // ...</div><div class='add'>+</div><div class='add'>+                mt6357_vusb33_reg: ldo-vusb33 {</div><div class='add'>+                    regulator-name = "vusb33";</div><div class='add'>+                    regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+                    regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rtc {</div><div class='add'>+                compatible = "mediatek,mt6357-rtc";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            keys {</div><div class='add'>+                compatible = "mediatek,mt6357-keys";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6360.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6360.yaml<br/>new file mode 100644<br/>index 000000000000..fb65abf30d57<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mediatek,mt6360.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/mediatek,mt6360.yaml</a></div><div class='hunk'>@@ -0,0 +1,247 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/mediatek,mt6360.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MT6360 PMIC from MediaTek Integrated</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Gene Chen &lt;gene_chen@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MT6360 is a PMIC device with the following sub modules.</div><div class='add'>+  It is interfaced to host controller using I2C interface.</div><div class='add'>+</div><div class='add'>+  This document describes the binding for PMIC device and its sub module.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt6360</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    const: IRQB</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      The first cell is the IRQ number.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    $ref: /schemas/regulator/mt6360-regulator.yaml#</div><div class='add'>+</div><div class='add'>+  charger:</div><div class='add'>+    $ref: /schemas/power/supply/mt6360_charger.yaml#</div><div class='add'>+</div><div class='add'>+  tcpc:</div><div class='add'>+    $ref: /schemas/usb/mediatek,mt6360-tcpc.yaml#</div><div class='add'>+</div><div class='add'>+  led-controller:</div><div class='add'>+    $ref: /schemas/leds/leds-mt6360.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties:</div><div class='add'>+  type: object</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/regulator/mediatek,mt6360-regulator.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pmic@34 {</div><div class='add'>+            compatible = "mediatek,mt6360";</div><div class='add'>+            reg = &lt;0x34&gt;;</div><div class='add'>+            wakeup-source;</div><div class='add'>+            interrupts-extended = &lt;&amp;gpio26 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            interrupt-names = "IRQB";</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            mt6360_charger: charger {</div><div class='add'>+                compatible = "mediatek,mt6360-chg";</div><div class='add'>+                richtek,vinovp-microvolt = &lt;14500000&gt;;</div><div class='add'>+</div><div class='add'>+                otg_vbus_regulator: usb-otg-vbus-regulator {</div><div class='add'>+                    regulator-name = "usb-otg-vbus";</div><div class='add'>+                    regulator-min-microvolt = &lt;4425000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;5825000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            led-controller {</div><div class='add'>+                compatible = "mediatek,mt6360-led";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                multi-led@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    function = LED_FUNCTION_INDICATOR;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+                    led-max-microamp = &lt;24000&gt;;</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    led@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+                    };</div><div class='add'>+                    led@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+                    };</div><div class='add'>+                    led@2 {</div><div class='add'>+                        reg = &lt;2&gt;;</div><div class='add'>+                        color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+                led@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    function = LED_FUNCTION_INDICATOR;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                    led-max-microamp = &lt;150000&gt;;</div><div class='add'>+                };</div><div class='add'>+                led@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    function = LED_FUNCTION_FLASH;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                    function-enumerator = &lt;1&gt;;</div><div class='add'>+                    led-max-microamp = &lt;200000&gt;;</div><div class='add'>+                    flash-max-microamp = &lt;500000&gt;;</div><div class='add'>+                    flash-max-timeout-us = &lt;1024000&gt;;</div><div class='add'>+                };</div><div class='add'>+                led@5 {</div><div class='add'>+                    reg = &lt;5&gt;;</div><div class='add'>+                    function = LED_FUNCTION_FLASH;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                    function-enumerator = &lt;2&gt;;</div><div class='add'>+                    led-max-microamp = &lt;200000&gt;;</div><div class='add'>+                    flash-max-microamp = &lt;500000&gt;;</div><div class='add'>+                    flash-max-timeout-us = &lt;1024000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                compatible = "mediatek,mt6360-regulator";</div><div class='add'>+                LDO_VIN3-supply = &lt;&amp;BUCK2&gt;;</div><div class='add'>+                buck1 {</div><div class='add'>+                    regulator-name = "mt6360,buck1";</div><div class='add'>+                    regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP</div><div class='add'>+                         MT6360_OPMODE_ULP&gt;;</div><div class='add'>+                };</div><div class='add'>+                BUCK2: buck2 {</div><div class='add'>+                    regulator-name = "mt6360,buck2";</div><div class='add'>+                    regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP</div><div class='add'>+                         MT6360_OPMODE_ULP&gt;;</div><div class='add'>+                };</div><div class='add'>+                ldo6 {</div><div class='add'>+                    regulator-name = "mt6360,ldo6";</div><div class='add'>+                    regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;2100000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP&gt;;</div><div class='add'>+                };</div><div class='add'>+                ldo7 {</div><div class='add'>+                    regulator-name = "mt6360,ldo7";</div><div class='add'>+                    regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;2100000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP&gt;;</div><div class='add'>+                };</div><div class='add'>+                ldo1 {</div><div class='add'>+                    regulator-name = "mt6360,ldo1";</div><div class='add'>+                    regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP&gt;;</div><div class='add'>+                };</div><div class='add'>+                ldo2 {</div><div class='add'>+                    regulator-name = "mt6360,ldo2";</div><div class='add'>+                    regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP&gt;;</div><div class='add'>+                };</div><div class='add'>+                ldo3 {</div><div class='add'>+                    regulator-name = "mt6360,ldo3";</div><div class='add'>+                    regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP&gt;;</div><div class='add'>+                };</div><div class='add'>+                ldo5 {</div><div class='add'>+                    regulator-name = "mt6360,ldo5";</div><div class='add'>+                    regulator-min-microvolt = &lt;2700000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3600000&gt;;</div><div class='add'>+                    regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='add'>+                         MT6360_OPMODE_LP&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tcpc {</div><div class='add'>+                compatible = "mediatek,mt6360-tcpc";</div><div class='add'>+                interrupts-extended = &lt;&amp;gpio26 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+                interrupt-names = "PD_IRQB";</div><div class='add'>+</div><div class='add'>+                connector {</div><div class='add'>+                    compatible = "usb-c-connector";</div><div class='add'>+                    label = "USB-C";</div><div class='add'>+                    data-role = "dual";</div><div class='add'>+                    power-role = "dual";</div><div class='add'>+                    try-power-role = "sink";</div><div class='add'>+                    source-pdos = &lt;PDO_FIXED(5000, 1000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+                    sink-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+                    op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+</div><div class='add'>+                    ports {</div><div class='add'>+                        #address-cells = &lt;1&gt;;</div><div class='add'>+                        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                        port@0 {</div><div class='add'>+                            reg = &lt;0&gt;;</div><div class='add'>+                            endpoint {</div><div class='add'>+                                remote-endpoint = &lt;&amp;usb_hs&gt;;</div><div class='add'>+                            };</div><div class='add'>+                        };</div><div class='add'>+                        port@1 {</div><div class='add'>+                            reg = &lt;1&gt;;</div><div class='add'>+                            endpoint {</div><div class='add'>+                                remote-endpoint = &lt;&amp;usb_ss&gt;;</div><div class='add'>+                          };</div><div class='add'>+                        };</div><div class='add'>+                        port@2 {</div><div class='add'>+                            reg = &lt;2&gt;;</div><div class='add'>+                            endpoint {</div><div class='add'>+                                remote-endpoint = &lt;&amp;dp_aux&gt;;</div><div class='add'>+                            };</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml<br/>new file mode 100644<br/>index 000000000000..c9574b243046<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/mediatek,mt6370.yaml</a></div><div class='hunk'>@@ -0,0 +1,282 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/mediatek,mt6370.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT6370 SubPMIC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MT6370 is a highly-integrated smart power management IC, which includes a</div><div class='add'>+  single cell Li-Ion/Li-Polymer switching battery charger, a USB Type-C &amp;</div><div class='add'>+  Power Delivery (PD) controller, dual flash LED current sources, a RGB LED</div><div class='add'>+  driver, a backlight WLED driver, a display bias driver and a general LDO for</div><div class='add'>+  portable devices.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt6370</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  adc:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description: |</div><div class='add'>+      Provides 9 channels for system monitoring, including VBUSDIV5 (lower</div><div class='add'>+      accuracy, higher measure range), VBUSDIV2 (higher accuracy, lower</div><div class='add'>+      measure range), VBAT, VSYS, CHG_VDDP, TS_BAT, IBUS, IBAT, and TEMP_JC.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: mediatek,mt6370-adc</div><div class='add'>+</div><div class='add'>+      "#io-channel-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - "#io-channel-cells"</div><div class='add'>+</div><div class='add'>+  backlight:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/leds/backlight/mediatek,mt6370-backlight.yaml#</div><div class='add'>+</div><div class='add'>+  charger:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/power/supply/mediatek,mt6370-charger.yaml#</div><div class='add'>+</div><div class='add'>+  tcpc:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/usb/mediatek,mt6370-tcpc.yaml#</div><div class='add'>+</div><div class='add'>+  indicator:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/leds/mediatek,mt6370-indicator.yaml#</div><div class='add'>+</div><div class='add'>+  flashlight:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/leds/mediatek,mt6370-flashlight.yaml#</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description: |</div><div class='add'>+      List all supported regulators, which support the control for DisplayBias</div><div class='add'>+      voltages and one general purpose LDO which commonly used to drive the</div><div class='add'>+      vibrator.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(dsvbst|vibldo)$":</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        type: object</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+      "^(dsvpos|dsvneg)$":</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        type: object</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          enable-gpios:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - regulators</div><div class='add'>+  - adc</div><div class='add'>+  - backlight</div><div class='add'>+  - indicator</div><div class='add'>+  - tcpc</div><div class='add'>+  - charger</div><div class='add'>+  - flashlight</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/iio/adc/mediatek,mt6370_adc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pmic@34 {</div><div class='add'>+        compatible = "mediatek,mt6370";</div><div class='add'>+        reg = &lt;0x34&gt;;</div><div class='add'>+        wakeup-source;</div><div class='add'>+        interrupts-extended = &lt;&amp;gpio26 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        mt6370_adc: adc {</div><div class='add'>+          compatible = "mediatek,mt6370-adc";</div><div class='add'>+          #io-channel-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        backlight {</div><div class='add'>+          compatible = "mediatek,mt6370-backlight";</div><div class='add'>+          mediatek,bled-channel-use = /bits/ 8 &lt;15&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        charger {</div><div class='add'>+          compatible = "mediatek,mt6370-charger";</div><div class='add'>+          interrupts = &lt;68&gt;, &lt;48&gt;, &lt;6&gt;;</div><div class='add'>+          interrupt-names = "uvp_d_evt", "attach_i", "mivr";</div><div class='add'>+          io-channels = &lt;&amp;mt6370_adc MT6370_CHAN_IBUS&gt;;</div><div class='add'>+</div><div class='add'>+          mt6370_otg_vbus: usb-otg-vbus-regulator {</div><div class='add'>+            regulator-name = "mt6370-usb-otg-vbus";</div><div class='add'>+            regulator-min-microvolt = &lt;4350000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;5800000&gt;;</div><div class='add'>+            regulator-min-microamp = &lt;500000&gt;;</div><div class='add'>+            regulator-max-microamp = &lt;3000000&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        indicator {</div><div class='add'>+          compatible = "mediatek,mt6370-indicator";</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          multi-led@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            function = LED_FUNCTION_INDICATOR;</div><div class='add'>+            color = &lt;LED_COLOR_ID_RGB&gt;;</div><div class='add'>+            led-max-microamp = &lt;24000&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            led@0 {</div><div class='add'>+              reg = &lt;0&gt;;</div><div class='add'>+              color = &lt;LED_COLOR_ID_RED&gt;;</div><div class='add'>+            };</div><div class='add'>+            led@1 {</div><div class='add'>+              reg = &lt;1&gt;;</div><div class='add'>+              color = &lt;LED_COLOR_ID_GREEN&gt;;</div><div class='add'>+            };</div><div class='add'>+            led@2 {</div><div class='add'>+              reg = &lt;2&gt;;</div><div class='add'>+              color = &lt;LED_COLOR_ID_BLUE&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+          led@3 {</div><div class='add'>+            reg = &lt;3&gt;;</div><div class='add'>+            function = LED_FUNCTION_INDICATOR;</div><div class='add'>+            color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+            led-max-microamp = &lt;6000&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        flashlight {</div><div class='add'>+          compatible = "mediatek,mt6370-flashlight";</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+          led@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            led-sources = &lt;0&gt;;</div><div class='add'>+            function = LED_FUNCTION_FLASH;</div><div class='add'>+            color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+            function-enumerator = &lt;1&gt;;</div><div class='add'>+            led-max-microamp = &lt;200000&gt;;</div><div class='add'>+            flash-max-microamp = &lt;500000&gt;;</div><div class='add'>+            flash-max-timeout-us = &lt;1248000&gt;;</div><div class='add'>+          };</div><div class='add'>+          led@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            led-sources = &lt;1&gt;;</div><div class='add'>+            function = LED_FUNCTION_FLASH;</div><div class='add'>+            color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+            function-enumerator = &lt;2&gt;;</div><div class='add'>+            led-max-microamp = &lt;200000&gt;;</div><div class='add'>+            flash-max-microamp = &lt;500000&gt;;</div><div class='add'>+            flash-max-timeout-us = &lt;1248000&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        tcpc {</div><div class='add'>+          compatible = "mediatek,mt6370-tcpc";</div><div class='add'>+          interrupts-extended = &lt;&amp;gpio26 4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+          connector {</div><div class='add'>+            compatible = "usb-c-connector";</div><div class='add'>+            label = "USB-C";</div><div class='add'>+            vbus-supply = &lt;&amp;mt6370_otg_vbus&gt;;</div><div class='add'>+            data-role = "dual";</div><div class='add'>+            power-role = "dual";</div><div class='add'>+            try-power-role = "sink";</div><div class='add'>+            source-pdos = &lt;PDO_FIXED(5000, 1000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+            sink-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+            op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+              #address-cells = &lt;1&gt;;</div><div class='add'>+              #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+              port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                  remote-endpoint = &lt;&amp;usb_hs&gt;;</div><div class='add'>+                };</div><div class='add'>+              };</div><div class='add'>+              port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                  remote-endpoint = &lt;&amp;usb_ss&gt;;</div><div class='add'>+                };</div><div class='add'>+              };</div><div class='add'>+              port@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                endpoint {</div><div class='add'>+                  remote-endpoint = &lt;&amp;dp_aux&gt;;</div><div class='add'>+                };</div><div class='add'>+              };</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        regulators {</div><div class='add'>+          dsvbst {</div><div class='add'>+            regulator-name = "mt6370-dsv-vbst";</div><div class='add'>+            regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;6200000&gt;;</div><div class='add'>+          };</div><div class='add'>+          dsvpos {</div><div class='add'>+            regulator-name = "mt6370-dsv-vpos";</div><div class='add'>+            regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+            regulator-boot-on;</div><div class='add'>+          };</div><div class='add'>+          dsvneg {</div><div class='add'>+            regulator-name = "mt6370-dsv-vneg";</div><div class='add'>+            regulator-min-microvolt = &lt;4000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;6000000&gt;;</div><div class='add'>+            regulator-boot-on;</div><div class='add'>+          };</div><div class='add'>+          vibldo {</div><div class='add'>+            regulator-name = "mt6370-vib-ldo";</div><div class='add'>+            regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;4000000&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml b/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml<br/>new file mode 100644<br/>index 000000000000..c8c4812fffe2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/mediatek,mt8195-scpsys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek System Control Processor System</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - MandyJH Liu &lt;mandyjh.liu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MediaTek System Control Processor System (SCPSYS) has several</div><div class='add'>+  power management tasks. The tasks include MTCMOS power</div><div class='add'>+  domain control, thermal measurement, DVFS, etc.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8167-scpsys</div><div class='add'>+          - mediatek,mt8173-scpsys</div><div class='add'>+          - mediatek,mt8183-scpsys</div><div class='add'>+          - mediatek,mt8186-scpsys</div><div class='add'>+          - mediatek,mt8192-scpsys</div><div class='add'>+          - mediatek,mt8195-scpsys</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-controller:</div><div class='add'>+    $ref: /schemas/power/mediatek,power-controller.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8195-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8195-power.h&gt;</div><div class='add'>+</div><div class='add'>+    syscon@10006000 {</div><div class='add'>+      compatible = "mediatek,mt8195-scpsys", "syscon", "simple-mfd";</div><div class='add'>+      reg = &lt;0x10006000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+      spm: power-controller {</div><div class='add'>+        compatible = "mediatek,mt8195-power-controller";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        /* sample of power domain nodes */</div><div class='add'>+        power-domain@MT8195_POWER_DOMAIN_PCIE_PHY {</div><div class='add'>+          reg = &lt;MT8195_POWER_DOMAIN_PCIE_PHY&gt;;</div><div class='add'>+          #power-domain-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        power-domain@MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY {</div><div class='add'>+          reg = &lt;MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY&gt;;</div><div class='add'>+          #power-domain-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mps,mp2629.yaml b/Documentation/devicetree/bindings/mfd/mps,mp2629.yaml<br/>index f91acc42d652..5ba849d78d8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mps,mp2629.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mps,mp2629.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mps,mp2629.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/mps,mp2629.yaml</a></div><div class='hunk'>@@ -18,7 +18,9 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mps,mp2629</div><div class='add'>+    enum:</div><div class='add'>+      - mps,mp2629</div><div class='add'>+      - mps,mp2733</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml b/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml<br/>new file mode 100644<br/>index 000000000000..8bd1abfc44d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/mscc,ocelot.yaml</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/mscc,ocelot.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ocelot Externally-Controlled Ethernet Switch</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Colin Foster &lt;colin.foster@in-advantage.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Ocelot ethernet switch family contains chips that have an internal CPU</div><div class='add'>+  (VSC7513, VSC7514) and chips that don't (VSC7511, VSC7512). All switches have</div><div class='add'>+  the option to be controlled externally via external interfaces like SPI or</div><div class='add'>+  PCIe.</div><div class='add'>+</div><div class='add'>+  The switch family is a multi-port networking switch that supports many</div><div class='add'>+  interfaces. Additionally, the device can perform pin control, MDIO buses, and</div><div class='add'>+  external GPIO expanders.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mscc,vsc7512</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinctrl@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/pinctrl/mscc,ocelot-pinctrl.yaml</div><div class='add'>+</div><div class='add'>+  "^gpio@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/pinctrl/microchip,sparx5-sgpio.yaml</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - mscc,ocelot-sgpio</div><div class='add'>+</div><div class='add'>+  "^mdio@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/net/mscc,miim.yaml</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - mscc,ocelot-miim</div><div class='add'>+</div><div class='add'>+  "^ethernet-switch@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/net/mscc,vsc7514-switch.yaml</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - mscc,vsc7512-switch</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ocelot_clock: ocelot-clock {</div><div class='add'>+          compatible = "fixed-clock";</div><div class='add'>+          #clock-cells = &lt;0&gt;;</div><div class='add'>+          clock-frequency = &lt;125000000&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        soc@0 {</div><div class='add'>+            compatible = "mscc,vsc7512";</div><div class='add'>+            spi-max-frequency = &lt;2500000&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            mdio@7107009c {</div><div class='add'>+                compatible = "mscc,ocelot-miim";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0x7107009c 0x24&gt;;</div><div class='add'>+</div><div class='add'>+                sw_phy0: ethernet-phy@0 {</div><div class='add'>+                    reg = &lt;0x0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mdio@710700c0 {</div><div class='add'>+                compatible = "mscc,ocelot-miim";</div><div class='add'>+                pinctrl-names = "default";</div><div class='add'>+                pinctrl-0 = &lt;&amp;miim1_pins&gt;;</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                reg = &lt;0x710700c0 0x24&gt;;</div><div class='add'>+</div><div class='add'>+                sw_phy4: ethernet-phy@4 {</div><div class='add'>+                    reg = &lt;0x4&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            gpio: pinctrl@71070034 {</div><div class='add'>+                compatible = "mscc,ocelot-pinctrl";</div><div class='add'>+                gpio-controller;</div><div class='add'>+                #gpio-cells = &lt;2&gt;;</div><div class='add'>+                gpio-ranges = &lt;&amp;gpio 0 0 22&gt;;</div><div class='add'>+                reg = &lt;0x71070034 0x6c&gt;;</div><div class='add'>+</div><div class='add'>+                sgpio_pins: sgpio-pins {</div><div class='add'>+                    pins = "GPIO_0", "GPIO_1", "GPIO_2", "GPIO_3";</div><div class='add'>+                    function = "sg0";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                miim1_pins: miim1-pins {</div><div class='add'>+                    pins = "GPIO_14", "GPIO_15";</div><div class='add'>+                    function = "miim";</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            gpio@710700f8 {</div><div class='add'>+                compatible = "mscc,ocelot-sgpio";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                bus-frequency = &lt;12500000&gt;;</div><div class='add'>+                clocks = &lt;&amp;ocelot_clock&gt;;</div><div class='add'>+                microchip,sgpio-port-ranges = &lt;0 15&gt;;</div><div class='add'>+                pinctrl-names = "default";</div><div class='add'>+                pinctrl-0 = &lt;&amp;sgpio_pins&gt;;</div><div class='add'>+                reg = &lt;0x710700f8 0x100&gt;;</div><div class='add'>+</div><div class='add'>+                sgpio_in0: gpio@0 {</div><div class='add'>+                    compatible = "microchip,sparx5-sgpio-bank";</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    gpio-controller;</div><div class='add'>+                    #gpio-cells = &lt;3&gt;;</div><div class='add'>+                    ngpios = &lt;64&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                sgpio_out1: gpio@1 {</div><div class='add'>+                    compatible = "microchip,sparx5-sgpio-bank";</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    gpio-controller;</div><div class='add'>+                    #gpio-cells = &lt;3&gt;;</div><div class='add'>+                    ngpios = &lt;64&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt<br/>index 293db2a71ef2..294693a8906c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mt6397.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/mt6397.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/mt6397.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/mt6397.txt</a></div><div class='hunk'>@@ -13,13 +13,15 @@ MT6397/MT6323 is a multifunction device with the following sub modules:</div><div class='ctx'> It is interfaced to host controller using SPI interface by a proprietary hardware</div><div class='ctx'> called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap.</div><div class='ctx'> See the following for pwarp node definitions:</div><div class='del'>-../soc/mediatek/pwrap.txt</div><div class='add'>+../soc/mediatek/mediatek,pwrap.yaml</div><div class='ctx'> </div><div class='ctx'> This document describes the binding for MFD device and its sub module.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> compatible:</div><div class='ctx'> 	"mediatek,mt6323" for PMIC MT6323</div><div class='add'>+	"mediatek,mt6331" for PMIC MT6331 and MT6332</div><div class='add'>+	"mediatek,mt6357" for PMIC MT6357</div><div class='ctx'> 	"mediatek,mt6358" for PMIC MT6358 and MT6366</div><div class='ctx'> 	"mediatek,mt6359" for PMIC MT6359</div><div class='ctx'> 	"mediatek,mt6397" for PMIC MT6397</div><div class='hunk'>@@ -29,6 +31,7 @@ Optional subnodes:</div><div class='ctx'> - rtc</div><div class='ctx'> 	Required properties: Should be one of follows</div><div class='ctx'> 		- compatible: "mediatek,mt6323-rtc"</div><div class='add'>+		- compatible: "mediatek,mt6331-rtc"</div><div class='ctx'> 		- compatible: "mediatek,mt6358-rtc"</div><div class='ctx'> 		- compatible: "mediatek,mt6397-rtc"</div><div class='ctx'> 	For details, see ../rtc/rtc-mt6397.txt</div><div class='hunk'>@@ -52,8 +55,10 @@ Optional subnodes:</div><div class='ctx'> 	see ../leds/leds-mt6323.txt</div><div class='ctx'> </div><div class='ctx'> - keys</div><div class='del'>-	Required properties:</div><div class='del'>-		- compatible: "mediatek,mt6397-keys" or "mediatek,mt6323-keys"</div><div class='add'>+	Required properties: Should be one of the following</div><div class='add'>+		- compatible: "mediatek,mt6323-keys"</div><div class='add'>+		- compatible: "mediatek,mt6331-keys"</div><div class='add'>+		- compatible: "mediatek,mt6397-keys"</div><div class='ctx'> 	see ../input/mtk-pmic-keys.txt</div><div class='ctx'> </div><div class='ctx'> - power-controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/nxp,bbnsm.yaml b/Documentation/devicetree/bindings/mfd/nxp,bbnsm.yaml<br/>new file mode 100644<br/>index 000000000000..b1ade64a1554<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/nxp,bbnsm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/nxp,bbnsm.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/nxp,bbnsm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP Battery-Backed Non-Secure Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jacky Bai &lt;ping.bai@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  NXP BBNSM serves as non-volatile logic and storage for the system.</div><div class='add'>+  it Intergrates RTC &amp; ON/OFF control.</div><div class='add'>+  The RTC can retain its state and continues counting even when the</div><div class='add'>+  main chip is power down. A time alarm is generated once the most</div><div class='add'>+  significant 32 bits of the real-time counter match the value in the</div><div class='add'>+  Time Alarm register.</div><div class='add'>+  The ON/OFF logic inside the BBNSM allows for connecting directly to</div><div class='add'>+  a PMIC or other voltage regulator device. both smart PMIC mode and</div><div class='add'>+  Dumb PMIC mode supported.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - nxp,imx93-bbnsm</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  rtc:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/rtc/rtc.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - nxp,imx93-bbnsm-rtc</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      start-year: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - interrupts</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  pwrkey:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/input/input.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - nxp,imx93-bbnsm-pwrkey</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      linux,code: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - interrupts</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - rtc</div><div class='add'>+  - pwrkey</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/input/linux-event-codes.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    bbnsm: bbnsm@44440000 {</div><div class='add'>+        compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";</div><div class='add'>+        reg = &lt;0x44440000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+        bbnsm_rtc: rtc {</div><div class='add'>+            compatible = "nxp,imx93-bbnsm-rtc";</div><div class='add'>+            interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        bbnsm_pwrkey: pwrkey {</div><div class='add'>+            compatible = "nxp,imx93-bbnsm-pwrkey";</div><div class='add'>+            interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/omap-usb-host.txt b/Documentation/devicetree/bindings/mfd/omap-usb-host.txt<br/>index aa1eaa59581b..a0d8c30c2631 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/omap-usb-host.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/omap-usb-host.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/omap-usb-host.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/omap-usb-host.txt</a></div><div class='hunk'>@@ -64,8 +64,8 @@ Required properties if child node exists:</div><div class='ctx'> Properties for children:</div><div class='ctx'> </div><div class='ctx'> The OMAP HS USB Host subsystem contains EHCI and OHCI controllers.</div><div class='del'>-See Documentation/devicetree/bindings/usb/ehci-omap.txt and</div><div class='del'>-Documentation/devicetree/bindings/usb/ohci-omap3.txt.</div><div class='add'>+See Documentation/devicetree/bindings/usb/generic-ehci.yaml and</div><div class='add'>+Documentation/devicetree/bindings/usb/generic-ohci.yaml.</div><div class='ctx'> </div><div class='ctx'> Example for OMAP4:</div><div class='ctx'> </div><div class='hunk'>@@ -78,14 +78,14 @@ usbhshost: usbhshost@4a064000 {</div><div class='ctx'> 	ranges;</div><div class='ctx'> </div><div class='ctx'> 	usbhsohci: ohci@4a064800 {</div><div class='del'>-		compatible = "ti,ohci-omap3", "usb-ohci";</div><div class='add'>+		compatible = "ti,ohci-omap3";</div><div class='ctx'> 		reg = &lt;0x4a064800 0x400&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		interrupts = &lt;0 76 0x4&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	usbhsehci: ehci@4a064c00 {</div><div class='del'>-		compatible = "ti,ehci-omap", "usb-ehci";</div><div class='add'>+		compatible = "ti,ehci-omap";</div><div class='ctx'> 		reg = &lt;0x4a064c00 0x400&gt;;</div><div class='ctx'> 		interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'> 		interrupts = &lt;0 77 0x4&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml b/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml<br/>index ec3138c1bbfc..e6a2387d8650 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/qcom,pm8008.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/qcom,pm8008.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies, Inc. PM8008 PMIC bindings</div><div class='add'>+title: Qualcomm Technologies, Inc. PM8008 PMIC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Guru Das Srinagesh &lt;gurus@codeaurora.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt<br/>deleted file mode 100644<br/>index a461ec2f758f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,94 +0,0 @@</div><div class='del'>-          Qualcomm SPMI PMICs multi-function device bindings</div><div class='del'>-</div><div class='del'>-The Qualcomm SPMI series presently includes PM8941, PM8841 and PMA8084</div><div class='del'>-PMICs.  These PMICs use a QPNP scheme through SPMI interface.</div><div class='del'>-QPNP is effectively a partitioning scheme for dividing the SPMI extended</div><div class='del'>-register space up into logical pieces, and set of fixed register</div><div class='del'>-locations/definitions within these regions, with some of these regions</div><div class='del'>-specifically used for interrupt handling.</div><div class='del'>-</div><div class='del'>-The QPNP PMICs are used with the Qualcomm Snapdragon series SoCs, and are</div><div class='del'>-interfaced to the chip via the SPMI (System Power Management Interface) bus.</div><div class='del'>-Support for multiple independent functions are implemented by splitting the</div><div class='del'>-16-bit SPMI slave address space into 256 smaller fixed-size regions, 256 bytes</div><div class='del'>-each. A function can consume one or more of these fixed-size register regions.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:      Should contain one of:</div><div class='del'>-                   "qcom,pm660",</div><div class='del'>-                   "qcom,pm660l",</div><div class='del'>-                   "qcom,pm7325",</div><div class='del'>-                   "qcom,pm8004",</div><div class='del'>-                   "qcom,pm8005",</div><div class='del'>-                   "qcom,pm8019",</div><div class='del'>-                   "qcom,pm8028",</div><div class='del'>-                   "qcom,pm8110",</div><div class='del'>-                   "qcom,pm8150",</div><div class='del'>-                   "qcom,pm8150b",</div><div class='del'>-                   "qcom,pm8150c",</div><div class='del'>-                   "qcom,pm8150l",</div><div class='del'>-                   "qcom,pm8226",</div><div class='del'>-                   "qcom,pm8350c",</div><div class='del'>-                   "qcom,pm8841",</div><div class='del'>-                   "qcom,pm8901",</div><div class='del'>-                   "qcom,pm8909",</div><div class='del'>-                   "qcom,pm8916",</div><div class='del'>-                   "qcom,pm8941",</div><div class='del'>-                   "qcom,pm8950",</div><div class='del'>-                   "qcom,pm8953",</div><div class='del'>-                   "qcom,pm8994",</div><div class='del'>-                   "qcom,pm8998",</div><div class='del'>-                   "qcom,pma8084",</div><div class='del'>-                   "qcom,pmd9635",</div><div class='del'>-                   "qcom,pmi8950",</div><div class='del'>-                   "qcom,pmi8962",</div><div class='del'>-                   "qcom,pmi8994",</div><div class='del'>-                   "qcom,pmi8998",</div><div class='del'>-                   "qcom,pmk8002",</div><div class='del'>-                   "qcom,pmk8350",</div><div class='del'>-                   "qcom,pmr735a",</div><div class='del'>-                   "qcom,smb2351",</div><div class='del'>-                   or generalized "qcom,spmi-pmic".</div><div class='del'>-- reg:             Specifies the SPMI USID slave address for this device.</div><div class='del'>-                   For more information see:</div><div class='del'>-                   Documentation/devicetree/bindings/spmi/spmi.yaml</div><div class='del'>-</div><div class='del'>-Required properties for peripheral child nodes:</div><div class='del'>-- compatible:      Should contain "qcom,xxx", where "xxx" is a peripheral name.</div><div class='del'>-</div><div class='del'>-Optional properties for peripheral child nodes:</div><div class='del'>-- interrupts:      Interrupts are specified as a 4-tuple. For more information</div><div class='del'>-                   see:</div><div class='del'>-                   Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt</div><div class='del'>-- interrupt-names: Corresponding interrupt name to the interrupts property</div><div class='del'>-</div><div class='del'>-Each child node of SPMI slave id represents a function of the PMIC. In the</div><div class='del'>-example below the rtc device node represents a peripheral of pm8941</div><div class='del'>-SID = 0. The regulator device node represents a peripheral of pm8941 SID = 1.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	spmi {</div><div class='del'>-		compatible = "qcom,spmi-pmic-arb";</div><div class='del'>-</div><div class='del'>-		pm8941@0 {</div><div class='del'>-			compatible = "qcom,pm8941", "qcom,spmi-pmic";</div><div class='del'>-			reg = &lt;0x0 SPMI_USID&gt;;</div><div class='del'>-</div><div class='del'>-			rtc {</div><div class='del'>-				compatible = "qcom,rtc";</div><div class='del'>-				interrupts = &lt;0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-				interrupt-names = "alarm";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pm8941@1 {</div><div class='del'>-			compatible = "qcom,pm8941", "qcom,spmi-pmic";</div><div class='del'>-			reg = &lt;0x1 SPMI_USID&gt;;</div><div class='del'>-</div><div class='del'>-			regulator {</div><div class='del'>-				compatible = "qcom,regulator";</div><div class='del'>-				regulator-name = "8941_boost";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml<br/>new file mode 100644<br/>index 000000000000..36de335a33aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml</a></div><div class='hunk'>@@ -0,0 +1,327 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SPMI PMICs multi-function device</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Some Qualcomm PMICs used with the Snapdragon series SoCs are interfaced</div><div class='add'>+  to the chip via the SPMI (System Power Management Interface) bus.</div><div class='add'>+  Support for multiple independent functions are implemented by splitting the</div><div class='add'>+  16-bit SPMI peripheral address space into 256 smaller fixed-size regions, 256 bytes</div><div class='add'>+  each. A function can consume one or more of these fixed-size register regions.</div><div class='add'>+</div><div class='add'>+  The Qualcomm SPMI series includes the PM8941, PM8841, PMA8084, PM8998 and other</div><div class='add'>+  PMICs.  These PMICs use a "QPNP" scheme through SPMI interface.</div><div class='add'>+  QPNP is effectively a partitioning scheme for dividing the SPMI extended</div><div class='add'>+  register space up into logical pieces, and set of fixed register</div><div class='add'>+  locations/definitions within these regions, with some of these regions</div><div class='add'>+  specifically used for interrupt handling.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    oneOf:</div><div class='add'>+      - pattern: '^pmic@.*$'</div><div class='add'>+      - pattern: '^pm(a|s)?[0-9]*@.*$'</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,pm2250</div><div class='add'>+          - qcom,pm6125</div><div class='add'>+          - qcom,pm6150</div><div class='add'>+          - qcom,pm6150l</div><div class='add'>+          - qcom,pm6350</div><div class='add'>+          - qcom,pm660</div><div class='add'>+          - qcom,pm660l</div><div class='add'>+          - qcom,pm7250b</div><div class='add'>+          - qcom,pm7325</div><div class='add'>+          - qcom,pm8004</div><div class='add'>+          - qcom,pm8005</div><div class='add'>+          - qcom,pm8009</div><div class='add'>+          - qcom,pm8010</div><div class='add'>+          - qcom,pm8019</div><div class='add'>+          - qcom,pm8028</div><div class='add'>+          - qcom,pm8110</div><div class='add'>+          - qcom,pm8150</div><div class='add'>+          - qcom,pm8150b</div><div class='add'>+          - qcom,pm8150c</div><div class='add'>+          - qcom,pm8150l</div><div class='add'>+          - qcom,pm8226</div><div class='add'>+          - qcom,pm8350</div><div class='add'>+          - qcom,pm8350b</div><div class='add'>+          - qcom,pm8350c</div><div class='add'>+          - qcom,pm8550</div><div class='add'>+          - qcom,pm8550b</div><div class='add'>+          - qcom,pm8550ve</div><div class='add'>+          - qcom,pm8550vs</div><div class='add'>+          - qcom,pm8841</div><div class='add'>+          - qcom,pm8909</div><div class='add'>+          - qcom,pm8916</div><div class='add'>+          - qcom,pm8941</div><div class='add'>+          - qcom,pm8950</div><div class='add'>+          - qcom,pm8953</div><div class='add'>+          - qcom,pm8994</div><div class='add'>+          - qcom,pm8998</div><div class='add'>+          - qcom,pma8084</div><div class='add'>+          - qcom,pmd9635</div><div class='add'>+          - qcom,pmi8950</div><div class='add'>+          - qcom,pmi8962</div><div class='add'>+          - qcom,pmi8994</div><div class='add'>+          - qcom,pmi8998</div><div class='add'>+          - qcom,pmk8002</div><div class='add'>+          - qcom,pmk8350</div><div class='add'>+          - qcom,pmk8550</div><div class='add'>+          - qcom,pmm8155au</div><div class='add'>+          - qcom,pmm8654au</div><div class='add'>+          - qcom,pmp8074</div><div class='add'>+          - qcom,pmr735a</div><div class='add'>+          - qcom,pmr735b</div><div class='add'>+          - qcom,pmr735d</div><div class='add'>+          - qcom,pms405</div><div class='add'>+          - qcom,pmx55</div><div class='add'>+          - qcom,pmx65</div><div class='add'>+          - qcom,smb2351</div><div class='add'>+      - const: qcom,spmi-pmic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  labibb:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/regulator/qcom-labibb-regulator.yaml#</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/regulator/qcom,spmi-regulator.yaml#</div><div class='add'>+</div><div class='add'>+  pwm:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/leds/leds-qcom-lpg.yaml#</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^adc@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: /schemas/iio/adc/qcom,spmi-iadc.yaml#</div><div class='add'>+      - $ref: /schemas/iio/adc/qcom,spmi-rradc.yaml#</div><div class='add'>+      - $ref: /schemas/iio/adc/qcom,spmi-vadc.yaml#</div><div class='add'>+</div><div class='add'>+  "^adc-tm@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    # ref depends on compatible, see allOf below</div><div class='add'>+</div><div class='add'>+  "^audio-codec@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true # FIXME qcom,pm8916-wcd-analog-codec binding not converted yet</div><div class='add'>+</div><div class='add'>+  "^charger@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: /schemas/power/supply/qcom,pm8941-charger.yaml#</div><div class='add'>+      - $ref: /schemas/power/supply/qcom,pm8941-coincell.yaml#</div><div class='add'>+</div><div class='add'>+  "gpio@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/pinctrl/qcom,pmic-gpio.yaml#</div><div class='add'>+</div><div class='add'>+  "^led-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/leds/qcom,spmi-flash-led.yaml#</div><div class='add'>+</div><div class='add'>+  "^nvram@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/nvmem/qcom,spmi-sdam.yaml#</div><div class='add'>+</div><div class='add'>+  "pon@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/power/reset/qcom,pon.yaml#</div><div class='add'>+</div><div class='add'>+  "^rtc@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/rtc/qcom-pm8xxx-rtc.yaml#</div><div class='add'>+</div><div class='add'>+  "^temp-alarm@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/thermal/qcom,spmi-temp-alarm.yaml#</div><div class='add'>+</div><div class='add'>+  "^usb-detect@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/extcon/qcom,pm8941-misc.yaml#</div><div class='add'>+</div><div class='add'>+  "^usb-vbus-regulator@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/regulator/qcom,usb-vbus-regulator.yaml#</div><div class='add'>+</div><div class='add'>+  "^vibrator@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/input/qcom,pm8xxx-vib.yaml#</div><div class='add'>+</div><div class='add'>+  "^mpps@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/pinctrl/qcom,pmic-mpp.yaml#</div><div class='add'>+</div><div class='add'>+  "(.*)?(wled|leds)@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/leds/backlight/qcom-wled.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8998</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^adc-tm@[0-9a-f]+$":</div><div class='add'>+          $ref: /schemas/thermal/qcom-spmi-adc-tm-hc.yaml#</div><div class='add'>+    else:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^adc-tm@[0-9a-f]+$":</div><div class='add'>+          $ref: /schemas/thermal/qcom-spmi-adc-tm5.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    spmi@c440000 {</div><div class='add'>+        compatible = "qcom,spmi-pmic-arb";</div><div class='add'>+        reg = &lt;0x0c440000 0x1100&gt;,</div><div class='add'>+              &lt;0x0c600000 0x2000000&gt;,</div><div class='add'>+              &lt;0x0e600000 0x100000&gt;,</div><div class='add'>+              &lt;0x0e700000 0xa0000&gt;,</div><div class='add'>+              &lt;0x0c40a000 0x26000&gt;;</div><div class='add'>+        reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";</div><div class='add'>+        interrupt-names = "periph_irq";</div><div class='add'>+        interrupts = &lt;GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        qcom,ee = &lt;0&gt;;</div><div class='add'>+        qcom,channel = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+        pmi8998_lsid0: pmic@2 {</div><div class='add'>+            compatible = "qcom,pmi8998", "qcom,spmi-pmic";</div><div class='add'>+            reg = &lt;0x2 SPMI_USID&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            pmi8998_gpio: gpio@c000 {</div><div class='add'>+                compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio";</div><div class='add'>+                reg = &lt;0xc000&gt;;</div><div class='add'>+                gpio-controller;</div><div class='add'>+                gpio-ranges = &lt;&amp;pmi8998_gpio 0 0 14&gt;;</div><div class='add'>+                #gpio-cells = &lt;2&gt;;</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/input/input.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/iio/qcom,spmi-vadc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+    pmic@0 {</div><div class='add'>+        compatible = "qcom,pm6150", "qcom,spmi-pmic";</div><div class='add'>+        reg = &lt;0x0 SPMI_USID&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pon@800 {</div><div class='add'>+            compatible = "qcom,pm8998-pon";</div><div class='add'>+            reg = &lt;0x800&gt;;</div><div class='add'>+            mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+            mode-recovery = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+            pwrkey {</div><div class='add'>+                compatible = "qcom,pm8941-pwrkey";</div><div class='add'>+                interrupts = &lt;0x0 0x8 0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+                debounce = &lt;15625&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+                linux,code = &lt;KEY_POWER&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        temp-alarm@2400 {</div><div class='add'>+            compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+            reg = &lt;0x2400&gt;;</div><div class='add'>+            interrupts = &lt;0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            io-channels = &lt;&amp;pm6150_adc ADC5_DIE_TEMP&gt;;</div><div class='add'>+            io-channel-names = "thermal";</div><div class='add'>+            #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pm6150_adc: adc@3100 {</div><div class='add'>+            compatible = "qcom,spmi-adc5";</div><div class='add'>+            reg = &lt;0x3100&gt;;</div><div class='add'>+            interrupts = &lt;0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            channel@6 {</div><div class='add'>+                reg = &lt;ADC5_DIE_TEMP&gt;;</div><div class='add'>+                label = "die_temp";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@4f {</div><div class='add'>+                reg = &lt;ADC5_AMUX_THM3_100K_PU&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        adc-tm@3500 {</div><div class='add'>+            compatible = "qcom,spmi-adc-tm5";</div><div class='add'>+            reg = &lt;0x3500&gt;;</div><div class='add'>+            interrupts = &lt;0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            charger-thermistor@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                io-channels = &lt;&amp;pm6150_adc ADC5_AMUX_THM3_100K_PU&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pm6150_gpio: gpio@c000 {</div><div class='add'>+            compatible = "qcom,pm6150-gpio", "qcom,spmi-gpio";</div><div class='add'>+            reg = &lt;0xc000&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            gpio-ranges = &lt;&amp;pm6150_gpio 0 0 10&gt;;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt b/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt<br/>deleted file mode 100644<br/>index add61bcc3c74..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom,tcsr.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom,tcsr.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-QCOM Top Control and Status Register</div><div class='del'>-</div><div class='del'>-Qualcomm devices have a set of registers that provide various control and status</div><div class='del'>-functions for their peripherals.  This node is intended to allow access to these</div><div class='del'>-registers via syscon.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:	Should contain:</div><div class='del'>-		"qcom,tcsr-ipq6018", "syscon", "simple-mfd" for IPQ6018</div><div class='del'>-		"qcom,tcsr-ipq8064", "syscon" for IPQ8064</div><div class='del'>-		"qcom,tcsr-apq8064", "syscon" for APQ8064</div><div class='del'>-		"qcom,tcsr-msm8660", "syscon" for MSM8660</div><div class='del'>-		"qcom,tcsr-msm8953", "syscon" for MSM8953</div><div class='del'>-		"qcom,tcsr-msm8960", "syscon" for MSM8960</div><div class='del'>-		"qcom,tcsr-msm8974", "syscon" for MSM8974</div><div class='del'>-		"qcom,tcsr-apq8084", "syscon" for APQ8084</div><div class='del'>-		"qcom,tcsr-msm8916", "syscon" for MSM8916</div><div class='del'>-- reg: Address range for TCSR registers</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	tcsr: syscon@1a400000 {</div><div class='del'>-		compatible = "qcom,tcsr-msm8960", "syscon";</div><div class='del'>-		reg = &lt;0x1a400000 0x100&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml b/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml<br/>new file mode 100644<br/>index 000000000000..fe790af7b4fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/qcom,tcsr.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/qcom,tcsr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Top Control and Status Register</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm devices have a set of registers that provide various control and</div><div class='add'>+  status functions for their peripherals.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,msm8976-tcsr</div><div class='add'>+          - qcom,msm8998-tcsr</div><div class='add'>+          - qcom,qcs404-tcsr</div><div class='add'>+          - qcom,sc7180-tcsr</div><div class='add'>+          - qcom,sc7280-tcsr</div><div class='add'>+          - qcom,sc8280xp-tcsr</div><div class='add'>+          - qcom,sdm630-tcsr</div><div class='add'>+          - qcom,sdm845-tcsr</div><div class='add'>+          - qcom,sdx55-tcsr</div><div class='add'>+          - qcom,sdx65-tcsr</div><div class='add'>+          - qcom,sm8150-tcsr</div><div class='add'>+          - qcom,sm8450-tcsr</div><div class='add'>+          - qcom,tcsr-apq8064</div><div class='add'>+          - qcom,tcsr-apq8084</div><div class='add'>+          - qcom,tcsr-ipq5332</div><div class='add'>+          - qcom,tcsr-ipq6018</div><div class='add'>+          - qcom,tcsr-ipq8064</div><div class='add'>+          - qcom,tcsr-ipq9574</div><div class='add'>+          - qcom,tcsr-mdm9615</div><div class='add'>+          - qcom,tcsr-msm8226</div><div class='add'>+          - qcom,tcsr-msm8660</div><div class='add'>+          - qcom,tcsr-msm8916</div><div class='add'>+          - qcom,tcsr-msm8953</div><div class='add'>+          - qcom,tcsr-msm8960</div><div class='add'>+          - qcom,tcsr-msm8974</div><div class='add'>+          - qcom,tcsr-msm8996</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@1a400000 {</div><div class='add'>+        compatible = "qcom,tcsr-msm8960", "syscon";</div><div class='add'>+        reg = &lt;0x1a400000 0x100&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml b/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml<br/>index 2568736701be..9c51c1b19067 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/qcom-pm8xxx.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm PM8xxx PMIC multi-function devices</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Satya Priya &lt;skakit@codeaurora.org&gt;</div><div class='add'>+  - Satya Priya &lt;quic_c_skakit@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The PM8xxx family of Power Management ICs are used to provide regulated</div><div class='hunk'>@@ -15,11 +15,15 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,pm8018</div><div class='del'>-      - qcom,pm8058</div><div class='del'>-      - qcom,pm8821</div><div class='del'>-      - qcom,pm8921</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,pm8058</div><div class='add'>+          - qcom,pm8821</div><div class='add'>+          - qcom,pm8921</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,pm8018</div><div class='add'>+          - const: qcom,pm8921</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -39,9 +43,13 @@ properties:</div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='add'>+  "led@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/leds/qcom,pm8058-led.yaml#</div><div class='add'>+</div><div class='ctx'>   "rtc@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "../rtc/qcom-pm8xxx-rtc.yaml"</div><div class='add'>+    $ref: ../rtc/qcom-pm8xxx-rtc.yaml</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -52,4 +60,23 @@ required:</div><div class='ctx'>   - interrupt-controller</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    ssbi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      pmic@0 {</div><div class='add'>+        compatible = "qcom,pm8921";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+        interrupts = &lt;32 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/qcom-rpm.txt b/Documentation/devicetree/bindings/mfd/qcom-rpm.txt<br/>deleted file mode 100644<br/>index b823b8625243..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/qcom-rpm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/qcom-rpm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,283 +0,0 @@</div><div class='del'>-Qualcomm Resource Power Manager (RPM)</div><div class='del'>-</div><div class='del'>-This driver is used to interface with the Resource Power Manager (RPM) found in</div><div class='del'>-various Qualcomm platforms. The RPM allows each component in the system to vote</div><div class='del'>-for state of the system resources, such as clocks, regulators and bus</div><div class='del'>-frequencies.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,rpm-apq8064"</div><div class='del'>-		    "qcom,rpm-msm8660"</div><div class='del'>-		    "qcom,rpm-msm8960"</div><div class='del'>-		    "qcom,rpm-ipq8064"</div><div class='del'>-		    "qcom,rpm-mdm9615"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: base address and size of the RPM's message ram</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: three entries specifying the RPM's:</div><div class='del'>-		    1. acknowledgement interrupt</div><div class='del'>-		    2. error interrupt</div><div class='del'>-		    3. wakeup interrupt</div><div class='del'>-</div><div class='del'>-- interrupt-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: must be the three strings "ack", "err" and "wakeup", in order</div><div class='del'>-</div><div class='del'>-- qcom,ipc:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-</div><div class='del'>-	Definition: three entries specifying the outgoing ipc bit used for</div><div class='del'>-		    signaling the RPM:</div><div class='del'>-		    - phandle to a syscon node representing the apcs registers</div><div class='del'>-		    - u32 representing offset to the register within the syscon</div><div class='del'>-		    - u32 representing the ipc bit within the register</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-= SUBNODES</div><div class='del'>-</div><div class='del'>-The RPM exposes resources to its subnodes. The below bindings specify the set</div><div class='del'>-of valid subnodes that can operate on these resources.</div><div class='del'>-</div><div class='del'>-== Regulators</div><div class='del'>-</div><div class='del'>-Regulator nodes are identified by their compatible:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,rpm-pm8058-regulators"</div><div class='del'>-		    "qcom,rpm-pm8901-regulators"</div><div class='del'>-		    "qcom,rpm-pm8921-regulators"</div><div class='del'>-		    "qcom,rpm-pm8018-regulators"</div><div class='del'>-		    "qcom,rpm-smb208-regulators"</div><div class='del'>-</div><div class='del'>-- vdd_l0_l1_lvs-supply:</div><div class='del'>-- vdd_l2_l11_l12-supply:</div><div class='del'>-- vdd_l3_l4_l5-supply:</div><div class='del'>-- vdd_l6_l7-supply:</div><div class='del'>-- vdd_l8-supply:</div><div class='del'>-- vdd_l9-supply:</div><div class='del'>-- vdd_l10-supply:</div><div class='del'>-- vdd_l13_l16-supply:</div><div class='del'>-- vdd_l14_l15-supply:</div><div class='del'>-- vdd_l17_l18-supply:</div><div class='del'>-- vdd_l19_l20-supply:</div><div class='del'>-- vdd_l21-supply:</div><div class='del'>-- vdd_l22-supply:</div><div class='del'>-- vdd_l23_l24_l25-supply:</div><div class='del'>-- vdd_ncp-supply:</div><div class='del'>-- vdd_s0-supply:</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-	Usage: optional (pm8058 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet</div><div class='del'>-</div><div class='del'>-- lvs0_in-supply:</div><div class='del'>-- lvs1_in-supply:</div><div class='del'>-- lvs2_in-supply:</div><div class='del'>-- lvs3_in-supply:</div><div class='del'>-- mvs_in-supply:</div><div class='del'>-- vdd_l0-supply:</div><div class='del'>-- vdd_l1-supply:</div><div class='del'>-- vdd_l2-supply:</div><div class='del'>-- vdd_l3-supply:</div><div class='del'>-- vdd_l4-supply:</div><div class='del'>-- vdd_l5-supply:</div><div class='del'>-- vdd_l6-supply:</div><div class='del'>-- vdd_s0-supply:</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-	Usage: optional (pm8901 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet</div><div class='del'>-</div><div class='del'>-- vdd_l1_l2_l12_l18-supply:</div><div class='del'>-- vdd_l3_l15_l17-supply:</div><div class='del'>-- vdd_l4_l14-supply:</div><div class='del'>-- vdd_l5_l8_l16-supply:</div><div class='del'>-- vdd_l6_l7-supply:</div><div class='del'>-- vdd_l9_l11-supply:</div><div class='del'>-- vdd_l10_l22-supply:</div><div class='del'>-- vdd_l21_l23_l29-supply:</div><div class='del'>-- vdd_l24-supply:</div><div class='del'>-- vdd_l25-supply:</div><div class='del'>-- vdd_l26-supply:</div><div class='del'>-- vdd_l27-supply:</div><div class='del'>-- vdd_l28-supply:</div><div class='del'>-- vdd_ncp-supply:</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_s5-supply:</div><div class='del'>-- vdd_s6-supply:</div><div class='del'>-- vdd_s7-supply:</div><div class='del'>-- vdd_s8-supply:</div><div class='del'>-- vin_5vs-supply:</div><div class='del'>-- vin_lvs1_3_6-supply:</div><div class='del'>-- vin_lvs2-supply:</div><div class='del'>-- vin_lvs4_5_7-supply:</div><div class='del'>-	Usage: optional (pm8921 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet</div><div class='del'>-</div><div class='del'>-- vin_lvs1-supply:</div><div class='del'>-- vdd_l7-supply:</div><div class='del'>-- vdd_l8-supply:</div><div class='del'>-- vdd_l9_l10_l11_l12-supply:</div><div class='del'>-	Usage: optional (pm8018 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet</div><div class='del'>-</div><div class='del'>-The regulator node houses sub-nodes for each regulator within the device. Each</div><div class='del'>-sub-node is identified using the node's name, with valid values listed for each</div><div class='del'>-of the pmics below.</div><div class='del'>-</div><div class='del'>-pm8058:</div><div class='del'>-	l0, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15,</div><div class='del'>-	l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, s0, s1, s2, s3, s4,</div><div class='del'>-	lvs0, lvs1, ncp</div><div class='del'>-</div><div class='del'>-pm8901:</div><div class='del'>-	l0, l1, l2, l3, l4, l5, l6, s0, s1, s2, s3, s4, lvs0, lvs1, lvs2, lvs3,</div><div class='del'>-	mvs</div><div class='del'>-</div><div class='del'>-pm8921:</div><div class='del'>-	s1, s2, s3, s4, s7, s8, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='del'>-	l12, l14, l15, l16, l17, l18, l21, l22, l23, l24, l25, l26, l27, l28,</div><div class='del'>-	l29, lvs1, lvs2, lvs3, lvs4, lvs5, lvs6, lvs7, usb-switch, hdmi-switch,</div><div class='del'>-	ncp</div><div class='del'>-</div><div class='del'>-pm8018:</div><div class='del'>-	s1, s2, s3, s4, s5, , l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='del'>-	l12, l14, lvs1</div><div class='del'>-</div><div class='del'>-smb208:</div><div class='del'>-	s1a, s1b, s2a, s2b</div><div class='del'>-</div><div class='del'>-The content of each sub-node is defined by the standard binding for regulators -</div><div class='del'>-see regulator.txt - with additional custom properties described below:</div><div class='del'>-</div><div class='del'>-=== Switch-mode Power Supply regulator custom properties</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;empty&gt;</div><div class='del'>-	Definition: enable pull down of the regulator when inactive</div><div class='del'>-</div><div class='del'>-- qcom,switch-mode-frequency:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Frequency (Hz) of the switch-mode power supply;</div><div class='del'>-		    must be one of:</div><div class='del'>-		    19200000, 9600000, 6400000, 4800000, 3840000, 3200000,</div><div class='del'>-		    2740000, 2400000, 2130000, 1920000, 1750000, 1600000,</div><div class='del'>-		    1480000, 1370000, 1280000, 1200000</div><div class='del'>-</div><div class='del'>-- qcom,force-mode:</div><div class='del'>-	Usage: optional (default if no other qcom,force-mode is specified)</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: indicates that the regulator should be forced to a</div><div class='del'>-		   particular mode, valid values are:</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_NONE - do not force any mode</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_LPM - force into low power mode</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_HPM - force into high power mode</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_AUTO - allow regulator to automatically</div><div class='del'>-					      select its own mode based on</div><div class='del'>-					      realtime current draw, only for:</div><div class='del'>-					      pm8921 smps and ftsmps</div><div class='del'>-</div><div class='del'>-- qcom,power-mode-hysteretic:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;empty&gt;</div><div class='del'>-	Definition: select that the power supply should operate in hysteretic</div><div class='del'>-		    mode, instead of the default pwm mode</div><div class='del'>-</div><div class='del'>-=== Low-dropout regulator custom properties</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;empty&gt;</div><div class='del'>-	Definition: enable pull down of the regulator when inactive</div><div class='del'>-</div><div class='del'>-- qcom,force-mode:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: indicates that the regulator should not be forced to any</div><div class='del'>-		   particular mode, valid values are:</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_NONE - do not force any mode</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_LPM - force into low power mode</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_HPM - force into high power mode</div><div class='del'>-		   QCOM_RPM_FORCE_MODE_BYPASS - set regulator to use bypass</div><div class='del'>-						mode, i.e.  to act as a switch</div><div class='del'>-						and not regulate, only for:</div><div class='del'>-						pm8921 pldo, nldo and nldo1200</div><div class='del'>-</div><div class='del'>-=== Negative Charge Pump custom properties</div><div class='del'>-</div><div class='del'>-- qcom,switch-mode-frequency:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Frequency (Hz) of the switch mode power supply;</div><div class='del'>-		    must be one of:</div><div class='del'>-		    19200000, 9600000, 6400000, 4800000, 3840000, 3200000,</div><div class='del'>-		    2740000, 2400000, 2130000, 1920000, 1750000, 1600000,</div><div class='del'>-		    1480000, 1370000, 1280000, 1200000</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-</div><div class='del'>-	#include &lt;dt-bindings/mfd/qcom-rpm.h&gt;</div><div class='del'>-</div><div class='del'>-	rpm@108000 {</div><div class='del'>-		compatible = "qcom,rpm-msm8960";</div><div class='del'>-		reg = &lt;0x108000 0x1000&gt;;</div><div class='del'>-		qcom,ipc = &lt;&amp;apcs 0x8 2&gt;;</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;0 19 0&gt;, &lt;0 21 0&gt;, &lt;0 22 0&gt;;</div><div class='del'>-		interrupt-names = "ack", "err", "wakeup";</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			compatible = "qcom,rpm-pm8921-regulators";</div><div class='del'>-			vdd_l1_l2_l12_l18-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='del'>-</div><div class='del'>-			s1 {</div><div class='del'>-				regulator-min-microvolt = &lt;1225000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1225000&gt;;</div><div class='del'>-</div><div class='del'>-				bias-pull-down;</div><div class='del'>-</div><div class='del'>-				qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pm8921_s4: s4 {</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-</div><div class='del'>-				qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='del'>-				bias-pull-down;</div><div class='del'>-</div><div class='del'>-				qcom,force-mode = &lt;QCOM_RPM_FORCE_MODE_AUTO&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml b/Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml<br/>new file mode 100644<br/>index 000000000000..f73b8b25d7d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/richtek,rt5120.yaml</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/richtek,rt5120.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT5120 PMIC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RT5120 provides four high-efficiency buck converters and one LDO voltage</div><div class='add'>+  regulator. The device is targeted at providingthe processor voltage, memory,</div><div class='add'>+  I/O, and peripheral rails in home entertainment devices. The I2C interface is</div><div class='add'>+  used for dynamic voltage scaling of the processor voltage, power rails on/off</div><div class='add'>+  sequence control, operation mode selection.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - richtek,rt5120</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  richtek,enable-undervolt-hiccup:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      If used, under voltage protection trigger hiccup behavior, else latchup as</div><div class='add'>+      default</div><div class='add'>+</div><div class='add'>+  richtek,enable-overvolt-hiccup:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Like as 'enable-uv-hiccup', it configures over voltage protection to</div><div class='add'>+      hiccup, else latchup as default</div><div class='add'>+</div><div class='add'>+  vin1-supply:</div><div class='add'>+    description: phandle for buck1 input power source</div><div class='add'>+</div><div class='add'>+  vin2-supply:</div><div class='add'>+    description: phandle for buck2 input power source</div><div class='add'>+</div><div class='add'>+  vin3-supply:</div><div class='add'>+    description: phandle for buck3 input power source</div><div class='add'>+</div><div class='add'>+  vin4-supply:</div><div class='add'>+    description: phandle for buck4 input power source</div><div class='add'>+</div><div class='add'>+  vinldo-supply:</div><div class='add'>+    description: phandle for ldo input power source</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^buck[1-4]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          regulator-allowed-modes:</div><div class='add'>+            description: |</div><div class='add'>+              Used to specify the allowed buck converter operating mode</div><div class='add'>+              mode mapping:</div><div class='add'>+                0: auto mode</div><div class='add'>+                1: force pwm mode</div><div class='add'>+            items:</div><div class='add'>+              enum: [0, 1]</div><div class='add'>+</div><div class='add'>+      "^(ldo|exten)$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  powerkey:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      PON key that connected to RT5120 PMIC.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - richtek,rt5120-pwrkey</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - regulators</div><div class='add'>+  - powerkey</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pmic@62 {</div><div class='add'>+        compatible = "richtek,rt5120";</div><div class='add'>+        reg = &lt;0x62&gt;;</div><div class='add'>+        interrupts-extended = &lt;&amp;gpio_intc 32 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        wakeup-source;</div><div class='add'>+</div><div class='add'>+        regulators {</div><div class='add'>+          buck1 {</div><div class='add'>+            regulator-name = "rt5120-buck1";</div><div class='add'>+            regulator-min-microvolt = &lt;600000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1393750&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+            regulator-boot-on;</div><div class='add'>+          };</div><div class='add'>+          buck2 {</div><div class='add'>+            regulator-name = "rt5120-buck2";</div><div class='add'>+            regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+          buck3 {</div><div class='add'>+            regulator-name = "rt5120-buck3";</div><div class='add'>+            regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+          buck4 {</div><div class='add'>+            regulator-name = "rt5120-buck4";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+          ldo {</div><div class='add'>+            regulator-name = "rt5120-ldo";</div><div class='add'>+            regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+          exten {</div><div class='add'>+            regulator-name = "rt5120-exten";</div><div class='add'>+            regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+        powerkey {</div><div class='add'>+          compatible = "richtek,rt5120-pwrkey";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rk808.txt b/Documentation/devicetree/bindings/mfd/rk808.txt<br/>deleted file mode 100644<br/>index 23a17a6663ec..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rk808.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rk808.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,465 +0,0 @@</div><div class='del'>-RK8XX Power Management Integrated Circuit</div><div class='del'>-</div><div class='del'>-The rk8xx family current members:</div><div class='del'>-rk805</div><div class='del'>-rk808</div><div class='del'>-rk809</div><div class='del'>-rk817</div><div class='del'>-rk818</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "rockchip,rk805"</div><div class='del'>-- compatible: "rockchip,rk808"</div><div class='del'>-- compatible: "rockchip,rk809"</div><div class='del'>-- compatible: "rockchip,rk817"</div><div class='del'>-- compatible: "rockchip,rk818"</div><div class='del'>-- reg: I2C slave address</div><div class='del'>-- interrupts: the interrupt outputs of the controller.</div><div class='del'>-- #clock-cells: from common clock binding; shall be set to 1 (multiple clock</div><div class='del'>-  outputs). See &lt;dt-bindings/clock/rockchip,rk808.h&gt; for clock IDs.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clock-output-names: From common clock binding to override the</div><div class='del'>-  default output clock name</div><div class='del'>-- rockchip,system-power-controller: Telling whether or not this pmic is controlling</div><div class='del'>-  the system power.</div><div class='del'>-- wakeup-source: Device can be used as a wakeup source.</div><div class='del'>-</div><div class='del'>-Optional RK805 properties:</div><div class='del'>-- vcc1-supply:  The input supply for DCDC_REG1</div><div class='del'>-- vcc2-supply:  The input supply for DCDC_REG2</div><div class='del'>-- vcc3-supply:  The input supply for DCDC_REG3</div><div class='del'>-- vcc4-supply:  The input supply for DCDC_REG4</div><div class='del'>-- vcc5-supply:  The input supply for LDO_REG1 and LDO_REG2</div><div class='del'>-- vcc6-supply:  The input supply for LDO_REG3</div><div class='del'>-</div><div class='del'>-Optional RK808 properties:</div><div class='del'>-- vcc1-supply:  The input supply for DCDC_REG1</div><div class='del'>-- vcc2-supply:  The input supply for DCDC_REG2</div><div class='del'>-- vcc3-supply:  The input supply for DCDC_REG3</div><div class='del'>-- vcc4-supply:  The input supply for DCDC_REG4</div><div class='del'>-- vcc6-supply:  The input supply for LDO_REG1 and LDO_REG2</div><div class='del'>-- vcc7-supply:  The input supply for LDO_REG3 and LDO_REG7</div><div class='del'>-- vcc8-supply:  The input supply for SWITCH_REG1</div><div class='del'>-- vcc9-supply:  The input supply for LDO_REG4 and LDO_REG5</div><div class='del'>-- vcc10-supply: The input supply for LDO_REG6</div><div class='del'>-- vcc11-supply: The input supply for LDO_REG8</div><div class='del'>-- vcc12-supply: The input supply for SWITCH_REG2</div><div class='del'>-- dvs-gpios:  buck1/2 can be controlled by gpio dvs, this is GPIO specifiers</div><div class='del'>-  for 2 host gpio's used for dvs. The format of the gpio specifier depends in</div><div class='del'>-  the gpio controller. If DVS GPIOs aren't present, voltage changes will happen</div><div class='del'>-  very quickly with no slow ramp time.</div><div class='del'>-</div><div class='del'>-Optional shared RK809 and RK817 properties:</div><div class='del'>-- vcc1-supply:  The input supply for DCDC_REG1</div><div class='del'>-- vcc2-supply:  The input supply for DCDC_REG2</div><div class='del'>-- vcc3-supply:  The input supply for DCDC_REG3</div><div class='del'>-- vcc4-supply:  The input supply for DCDC_REG4</div><div class='del'>-- vcc5-supply:  The input supply for LDO_REG1, LDO_REG2, LDO_REG3</div><div class='del'>-- vcc6-supply:  The input supply for LDO_REG4, LDO_REG5, LDO_REG6</div><div class='del'>-- vcc7-supply:  The input supply for LDO_REG7, LDO_REG8, LDO_REG9</div><div class='del'>-</div><div class='del'>-Optional RK809 properties:</div><div class='del'>-- vcc8-supply:  The input supply for SWITCH_REG1</div><div class='del'>-- vcc9-supply:  The input supply for DCDC_REG5, SWITCH_REG2</div><div class='del'>-</div><div class='del'>-Optional RK817 properties:</div><div class='del'>-- clocks:	The input clock for the audio codec</div><div class='del'>-- clock-names:	The clock name for the codec clock. Should be "mclk".</div><div class='del'>-- #sound-dai-cells: Needed for the interpretation of sound dais. Should be 0.</div><div class='del'>-</div><div class='del'>-- vcc8-supply:  The input supply for BOOST</div><div class='del'>-- vcc9-supply:  The input supply for OTG_SWITCH</div><div class='del'>-- codec:	The child node for the codec to hold additional properties.</div><div class='del'>-		If no additional properties are required for the codec, this</div><div class='del'>-		node can be omitted.</div><div class='del'>-</div><div class='del'>-- rockchip,mic-in-differential: Telling if the microphone uses differential</div><div class='del'>-				mode. Should be under the codec child node.</div><div class='del'>-</div><div class='del'>-Optional RK818 properties:</div><div class='del'>-- vcc1-supply:  The input supply for DCDC_REG1</div><div class='del'>-- vcc2-supply:  The input supply for DCDC_REG2</div><div class='del'>-- vcc3-supply:  The input supply for DCDC_REG3</div><div class='del'>-- vcc4-supply:  The input supply for DCDC_REG4</div><div class='del'>-- boost-supply: The input supply for DCDC_BOOST</div><div class='del'>-- vcc6-supply:  The input supply for LDO_REG1 and LDO_REG2</div><div class='del'>-- vcc7-supply:  The input supply for LDO_REG3, LDO_REG5 and LDO_REG7</div><div class='del'>-- vcc8-supply:  The input supply for LDO_REG4, LDO_REG6 and LDO_REG8</div><div class='del'>-- vcc9-supply:  The input supply for LDO_REG9 and SWITCH_REG</div><div class='del'>-- h_5v-supply:  The input supply for HDMI_SWITCH</div><div class='del'>-- usb-supply:   The input supply for OTG_SWITCH</div><div class='del'>-</div><div class='del'>-Regulators: All the regulators of RK8XX to be instantiated shall be</div><div class='del'>-listed in a child node named 'regulators'. Each regulator is represented</div><div class='del'>-by a child node of the 'regulators' node.</div><div class='del'>-</div><div class='del'>-	regulator-name {</div><div class='del'>-		/* standard regulator bindings here */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Following regulators of the RK805 PMIC regulators are supported. Note that</div><div class='del'>-the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO</div><div class='del'>-number as described in RK805 datasheet.</div><div class='del'>-</div><div class='del'>-	- DCDC_REGn</div><div class='del'>-		- valid values for n are 1 to 4.</div><div class='del'>-	- LDO_REGn</div><div class='del'>-		- valid values for n are 1 to 3</div><div class='del'>-</div><div class='del'>-Following regulators of the RK808 PMIC block are supported. Note that</div><div class='del'>-the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO</div><div class='del'>-number as described in RK808 datasheet.</div><div class='del'>-</div><div class='del'>-	- DCDC_REGn</div><div class='del'>-		- valid values for n are 1 to 4.</div><div class='del'>-	- LDO_REGn</div><div class='del'>-		- valid values for n are 1 to 8.</div><div class='del'>-	- SWITCH_REGn</div><div class='del'>-		- valid values for n are 1 to 2</div><div class='del'>-</div><div class='del'>-Following regulators of the RK809 and RK817 PMIC blocks are supported. Note that</div><div class='del'>-the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO</div><div class='del'>-number as described in RK809 and RK817 datasheets.</div><div class='del'>-</div><div class='del'>-	- DCDC_REGn</div><div class='del'>-		- valid values for n are 1 to 5 for RK809.</div><div class='del'>-		- valid values for n are 1 to 4 for RK817.</div><div class='del'>-	- LDO_REGn</div><div class='del'>-		- valid values for n are 1 to 9 for RK809.</div><div class='del'>-		- valid values for n are 1 to 9 for RK817.</div><div class='del'>-	- SWITCH_REGn</div><div class='del'>-		- valid values for n are 1 to 2 for RK809.</div><div class='del'>-	- BOOST for RK817</div><div class='del'>-	- OTG_SWITCH for RK817</div><div class='del'>-</div><div class='del'>-Following regulators of the RK818 PMIC block are supported. Note that</div><div class='del'>-the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO</div><div class='del'>-number as described in RK818 datasheet.</div><div class='del'>-</div><div class='del'>-	- DCDC_REGn</div><div class='del'>-		- valid values for n are 1 to 4.</div><div class='del'>-	- LDO_REGn</div><div class='del'>-		- valid values for n are 1 to 9.</div><div class='del'>-	- SWITCH_REG</div><div class='del'>-	- HDMI_SWITCH</div><div class='del'>-	- OTG_SWITCH</div><div class='del'>-</div><div class='del'>-It is necessary to configure three pins for both the RK809 and RK817, the three</div><div class='del'>-pins are "gpio_ts" "gpio_gt" "gpio_slp".</div><div class='del'>-	The gpio_gt and gpio_ts pins support the gpio function.</div><div class='del'>-	The gpio_slp pin is for controlling the pmic states, as below:</div><div class='del'>-		- reset</div><div class='del'>-		- power down</div><div class='del'>-		- sleep</div><div class='del'>-</div><div class='del'>-Standard regulator bindings are used inside regulator subnodes. Check</div><div class='del'>-  Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='del'>-for more details</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	rk808: pmic@1b {</div><div class='del'>-		compatible = "rockchip,rk808";</div><div class='del'>-		clock-output-names = "xin32k", "rk808-clkout2";</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_int &amp;dvs_1 &amp;dvs_2&gt;;</div><div class='del'>-		dvs-gpios = &lt;&amp;gpio7 11 GPIO_ACTIVE_HIGH&gt;,</div><div class='del'>-			    &lt;&amp;gpio7 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		reg = &lt;0x1b&gt;;</div><div class='del'>-		rockchip,system-power-controller;</div><div class='del'>-		wakeup-source;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		vcc8-supply = &lt;&amp;vcc_18&gt;;</div><div class='del'>-		vcc9-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-		vcc10-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-		vcc12-supply = &lt;&amp;vcc_io&gt;;</div><div class='del'>-		vddio-supply = &lt;&amp;vccio_pmu&gt;;</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_cpu: DCDC_REG1 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;750000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-				regulator-name = "vdd_arm";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_gpu: DCDC_REG2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;850000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1250000&gt;;</div><div class='del'>-				regulator-name = "vdd_gpu";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_ddr: DCDC_REG3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-name = "vcc_ddr";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_io: DCDC_REG4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-name = "vcc_io";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vccio_pmu: LDO_REG1 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-name = "vccio_pmu";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_tp: LDO_REG2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-name = "vcc_tp";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_10: LDO_REG3 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-name = "vdd_10";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc18_lcd: LDO_REG4 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "vcc18_lcd";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vccio_sd: LDO_REG5 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-name = "vccio_sd";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd10_lcd: LDO_REG6 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-name = "vdd10_lcd";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_18: LDO_REG7 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-name = "vcc_18";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcca_codec: LDO_REG8 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-name = "vcca_codec";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_wl: SWITCH_REG1 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-name = "vcc_wl";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_lcd: SWITCH_REG2 {</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-				regulator-name = "vcc_lcd";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rk817: pmic@20 {</div><div class='del'>-		compatible = "rockchip,rk817";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='del'>-		interrupts = &lt;RK_PB2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clock-output-names = "rk808-clkout1", "xin32k";</div><div class='del'>-		clock-names = "mclk";</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_I2S1_OUT&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1_2ch_mclk&gt;;</div><div class='del'>-		wakeup-source;</div><div class='del'>-		#clock-cells = &lt;1&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		vcc1-supply = &lt;&amp;vccsys&gt;;</div><div class='del'>-		vcc2-supply = &lt;&amp;vccsys&gt;;</div><div class='del'>-		vcc3-supply = &lt;&amp;vccsys&gt;;</div><div class='del'>-		vcc4-supply = &lt;&amp;vccsys&gt;;</div><div class='del'>-		vcc5-supply = &lt;&amp;vccsys&gt;;</div><div class='del'>-		vcc6-supply = &lt;&amp;vccsys&gt;;</div><div class='del'>-		vcc7-supply = &lt;&amp;vccsys&gt;;</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_logic: DCDC_REG1 {</div><div class='del'>-				regulator-name = "vdd_logic";</div><div class='del'>-				regulator-min-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1150000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;6001&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_arm: DCDC_REG2 {</div><div class='del'>-				regulator-name = "vdd_arm";</div><div class='del'>-				regulator-min-microvolt = &lt;950000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='del'>-				regulator-ramp-delay = &lt;6001&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_ddr: DCDC_REG3 {</div><div class='del'>-				regulator-name = "vcc_ddr";</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_3v3: DCDC_REG4 {</div><div class='del'>-				regulator-name = "vcc_3v3";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_1v8: LDO_REG2 {</div><div class='del'>-				regulator-name = "vcc_1v8";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_1v0: LDO_REG3 {</div><div class='del'>-				regulator-name = "vdd_1v0";</div><div class='del'>-				regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1000000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc3v3_pmu: LDO_REG4 {</div><div class='del'>-				regulator-name = "vcc3v3_pmu";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vccio_sd: LDO_REG5 {</div><div class='del'>-				regulator-name = "vccio_sd";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_sd: LDO_REG6 {</div><div class='del'>-				regulator-name = "vcc_sd";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-boot-on;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_bl: LDO_REG7 {</div><div class='del'>-				regulator-name = "vcc_bl";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_lcd: LDO_REG8 {</div><div class='del'>-				regulator-name = "vcc_lcd";</div><div class='del'>-				regulator-min-microvolt = &lt;2800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2800000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;2800000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vcc_cam: LDO_REG9 {</div><div class='del'>-				regulator-name = "vcc_cam";</div><div class='del'>-				regulator-min-microvolt = &lt;3000000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3000000&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-					regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		rk817_codec: codec {</div><div class='del'>-			rockchip,mic-in-differential;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml<br/>new file mode 100644<br/>index 000000000000..4992f71b6fc3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rockchip,rk805.yaml</a></div><div class='hunk'>@@ -0,0 +1,219 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/rockchip,rk805.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RK805 Power Management Integrated Circuit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Zhong &lt;zyw@rock-chips.com&gt;</div><div class='add'>+  - Zhang Qing &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Rockchip RK805 series PMIC. This device consists of an i2c controlled MFD</div><div class='add'>+  that includes multiple switchable regulators.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk805</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    description:</div><div class='add'>+      See &lt;dt-bindings/clock/rockchip,rk808.h&gt; for clock IDs.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description:</div><div class='add'>+      From common clock binding to override the default output clock name.</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  rockchip,system-power-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Telling whether or not this PMIC is controlling the system power.</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Device can be used as a wakeup source.</div><div class='add'>+</div><div class='add'>+  vcc1-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG1.</div><div class='add'>+</div><div class='add'>+  vcc2-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG2.</div><div class='add'>+</div><div class='add'>+  vcc3-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG3.</div><div class='add'>+</div><div class='add'>+  vcc4-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG4.</div><div class='add'>+</div><div class='add'>+  vcc5-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG1 and LDO_REG2.</div><div class='add'>+</div><div class='add'>+  vcc6-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG3.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(DCDC_REG[1-4]|LDO_REG[1-3])$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: ../regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        '#clock-cells':</div><div class='add'>+          const: 0</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-output-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clock-output-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pmic@18 {</div><div class='add'>+            compatible = "rockchip,rk805";</div><div class='add'>+            reg = &lt;0x18&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio2&gt;;</div><div class='add'>+            interrupts = &lt;RK_PA6 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pmic_int_l&gt;;</div><div class='add'>+            rockchip,system-power-controller;</div><div class='add'>+            wakeup-source;</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vcc1-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+            vcc2-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+            vcc3-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+            vcc4-supply = &lt;&amp;vcc_sys&gt;;</div><div class='add'>+            vcc5-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+            vcc6-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                vdd_logic: DCDC_REG1 {</div><div class='add'>+                    regulator-name = "vdd_logic";</div><div class='add'>+                    regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_arm: DCDC_REG2 {</div><div class='add'>+                    regulator-name = "vdd_arm";</div><div class='add'>+                    regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_ddr: DCDC_REG3 {</div><div class='add'>+                    regulator-name = "vcc_ddr";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_io: DCDC_REG4 {</div><div class='add'>+                    regulator-name = "vcc_io";</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_18: LDO_REG1 {</div><div class='add'>+                    regulator-name = "vdd_18";</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc18_emmc: LDO_REG2 {</div><div class='add'>+                    regulator-name = "vcc_18emmc";</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_11: LDO_REG3 {</div><div class='add'>+                    regulator-name = "vdd_11";</div><div class='add'>+                    regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1100000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml<br/>new file mode 100644<br/>index 000000000000..f5908fa01a61<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml</a></div><div class='hunk'>@@ -0,0 +1,257 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/rockchip,rk808.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RK808 Power Management Integrated Circuit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Zhong &lt;zyw@rock-chips.com&gt;</div><div class='add'>+  - Zhang Qing &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Rockchip RK808 series PMIC. This device consists of an i2c controlled MFD</div><div class='add'>+  that includes regulators, an RTC, and a power button.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk808</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    description:</div><div class='add'>+      See &lt;dt-bindings/clock/rockchip,rk808.h&gt; for clock IDs.</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description:</div><div class='add'>+      From common clock binding to override the default output clock name.</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  rockchip,system-power-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Telling whether or not this PMIC is controlling the system power.</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Device can be used as a wakeup source.</div><div class='add'>+</div><div class='add'>+  vcc1-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG1.</div><div class='add'>+</div><div class='add'>+  vcc2-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG2.</div><div class='add'>+</div><div class='add'>+  vcc3-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG3.</div><div class='add'>+</div><div class='add'>+  vcc4-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG4.</div><div class='add'>+</div><div class='add'>+  vcc6-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG1 and LDO_REG2.</div><div class='add'>+</div><div class='add'>+  vcc7-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG3 and LDO_REG7.</div><div class='add'>+</div><div class='add'>+  vcc8-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for SWITCH_REG1.</div><div class='add'>+</div><div class='add'>+  vcc9-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG4 and LDO_REG5.</div><div class='add'>+</div><div class='add'>+  vcc10-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG6.</div><div class='add'>+</div><div class='add'>+  vcc11-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG8.</div><div class='add'>+</div><div class='add'>+  vcc12-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for SWITCH_REG2.</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for digital IO.</div><div class='add'>+</div><div class='add'>+  dvs-gpios:</div><div class='add'>+    description: |</div><div class='add'>+      buck1/2 can be controlled by gpio dvs, this is GPIO specifiers for</div><div class='add'>+      2 host gpio's used for dvs. The format of the gpio specifier</div><div class='add'>+      depends in the gpio controller. If DVS GPIOs aren't present,</div><div class='add'>+      voltage changes will happen very quickly with no slow ramp time.</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(DCDC_REG[1-4]|LDO_REG[1-8]|SWITCH_REG[1-2])$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: ../regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rk808: pmic@1b {</div><div class='add'>+            compatible = "rockchip,rk808";</div><div class='add'>+            clock-output-names = "xin32k", "rk808-clkout2";</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+            interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pmic_int &amp;dvs_1 &amp;dvs_2&gt;;</div><div class='add'>+            dvs-gpios = &lt;&amp;gpio7 11 GPIO_ACTIVE_HIGH&gt;,</div><div class='add'>+                &lt;&amp;gpio7 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reg = &lt;0x1b&gt;;</div><div class='add'>+            rockchip,system-power-controller;</div><div class='add'>+            wakeup-source;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            vcc8-supply = &lt;&amp;vcc_18&gt;;</div><div class='add'>+            vcc9-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+            vcc10-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+            vcc12-supply = &lt;&amp;vcc_io&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vccio_pmu&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                vdd_cpu: DCDC_REG1 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+                    regulator-name = "vdd_arm";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_gpu: DCDC_REG2 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1250000&gt;;</div><div class='add'>+                    regulator-name = "vdd_gpu";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_ddr: DCDC_REG3 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-name = "vcc_ddr";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_io: DCDC_REG4 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-name = "vcc_io";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vccio_pmu: LDO_REG1 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-name = "vccio_pmu";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_tp: LDO_REG2 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-name = "vcc_tp";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_10: LDO_REG3 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-name = "vdd_10";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc18_lcd: LDO_REG4 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-name = "vcc18_lcd";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vccio_sd: LDO_REG5 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-name = "vccio_sd";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd10_lcd: LDO_REG6 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-name = "vdd10_lcd";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_18: LDO_REG7 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-name = "vcc_18";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcca_codec: LDO_REG8 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-name = "vcca_codec";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_wl: SWITCH_REG1 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-name = "vcc_wl";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_lcd: SWITCH_REG2 {</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-name = "vcc_lcd";</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml<br/>new file mode 100644<br/>index 000000000000..7fb849ac74a7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rockchip,rk809.yaml</a></div><div class='hunk'>@@ -0,0 +1,284 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RK809 Power Management Integrated Circuit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Zhong &lt;zyw@rock-chips.com&gt;</div><div class='add'>+  - Zhang Qing &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Rockchip RK809 series PMIC. This device consists of an i2c controlled MFD</div><div class='add'>+  that includes regulators, an RTC, and power button.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk809</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    description: |</div><div class='add'>+      See &lt;dt-bindings/clock/rockchip,rk808.h&gt; for clock IDs.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description:</div><div class='add'>+      From common clock binding to override the default output clock name.</div><div class='add'>+</div><div class='add'>+  rockchip,system-power-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Telling whether or not this PMIC is controlling the system power.</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Device can be used as a wakeup source.</div><div class='add'>+</div><div class='add'>+  vcc1-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG1.</div><div class='add'>+</div><div class='add'>+  vcc2-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG2.</div><div class='add'>+</div><div class='add'>+  vcc3-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG3.</div><div class='add'>+</div><div class='add'>+  vcc4-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG4.</div><div class='add'>+</div><div class='add'>+  vcc5-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG1, LDO_REG2, and LDO_REG3.</div><div class='add'>+</div><div class='add'>+  vcc6-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG4, LDO_REG5, and LDO_REG6.</div><div class='add'>+</div><div class='add'>+  vcc7-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG7, LDO_REG8, and LDO_REG9.</div><div class='add'>+</div><div class='add'>+  vcc8-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for SWITCH_REG1.</div><div class='add'>+</div><div class='add'>+  vcc9-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG5 and SWITCH_REG2.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(LDO_REG[1-9]|DCDC_REG[1-5]|SWITCH_REG[1-2])$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: ../regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        '#clock-cells':</div><div class='add'>+          const: 0</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-output-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clock-output-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rk808: pmic@1b {</div><div class='add'>+            compatible = "rockchip,rk808";</div><div class='add'>+            reg = &lt;0x1b&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            clock-output-names = "xin32k", "rk808-clkout2";</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+            interrupts = &lt;10 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pmic_int_l_pin&gt;;</div><div class='add'>+            rockchip,system-power-controller;</div><div class='add'>+            wakeup-source;</div><div class='add'>+</div><div class='add'>+            vcc1-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc2-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc3-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc4-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc6-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc7-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc8-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+            vcc9-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc10-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc11-supply = &lt;&amp;vcc_sysin&gt;;</div><div class='add'>+            vcc12-supply = &lt;&amp;vcc3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                vdd_center: DCDC_REG1 {</div><div class='add'>+                    regulator-name = "vdd_center";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+                    regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_cpu_l: DCDC_REG2 {</div><div class='add'>+                    regulator-name = "vdd_cpu_l";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+                    regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_ddr: DCDC_REG3 {</div><div class='add'>+                    regulator-name = "vcc_ddr";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_1v8: vcc_wl: DCDC_REG4 {</div><div class='add'>+                    regulator-name = "vcc_1v8";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc1v8_pmupll: LDO_REG3 {</div><div class='add'>+                    regulator-name = "vcc1v8_pmupll";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_sdio: LDO_REG4 {</div><div class='add'>+                    regulator-name = "vcc_sdio";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcca3v0_codec: LDO_REG5 {</div><div class='add'>+                    regulator-name = "vcca3v0_codec";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_1v5: LDO_REG6 {</div><div class='add'>+                    regulator-name = "vcc_1v5";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1500000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcca1v8_codec: LDO_REG7 {</div><div class='add'>+                    regulator-name = "vcca1v8_codec";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_3v0: LDO_REG8 {</div><div class='add'>+                    regulator-name = "vcc_3v0";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc3v3_s3: SWITCH_REG1 {</div><div class='add'>+                    regulator-name = "vcc3v3_s3";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc3v3_s0: SWITCH_REG2 {</div><div class='add'>+                    regulator-name = "vcc3v3_s0";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml<br/>new file mode 100644<br/>index 000000000000..269fb85b2027<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rockchip,rk817.yaml</a></div><div class='hunk'>@@ -0,0 +1,384 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/rockchip,rk817.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RK817 Power Management Integrated Circuit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Zhong &lt;zyw@rock-chips.com&gt;</div><div class='add'>+  - Zhang Qing &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Rockchip RK817 series PMIC. This device consists of an i2c controlled MFD</div><div class='add'>+  that includes regulators, an RTC, a power button, an audio codec, and a</div><div class='add'>+  battery charger manager.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk817</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    description:</div><div class='add'>+      See &lt;dt-bindings/clock/rockchip,rk808.h&gt; for clock IDs.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description:</div><div class='add'>+      From common clock binding to override the default output clock name.</div><div class='add'>+</div><div class='add'>+  rockchip,system-power-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Telling whether or not this PMIC is controlling the system power.</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Device can be used as a wakeup source.</div><div class='add'>+</div><div class='add'>+  vcc1-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG1.</div><div class='add'>+</div><div class='add'>+  vcc2-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG2.</div><div class='add'>+</div><div class='add'>+  vcc3-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG3.</div><div class='add'>+</div><div class='add'>+  vcc4-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG4.</div><div class='add'>+</div><div class='add'>+  vcc5-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG1, LDO_REG2, and LDO_REG3.</div><div class='add'>+</div><div class='add'>+  vcc6-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG4, LDO_REG5, and LDO_REG6.</div><div class='add'>+</div><div class='add'>+  vcc7-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG7, LDO_REG8, and LDO_REG9.</div><div class='add'>+</div><div class='add'>+  vcc8-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for BOOST.</div><div class='add'>+</div><div class='add'>+  vcc9-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for OTG_SWITCH.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(LDO_REG[1-9]|DCDC_REG[1-4]|BOOST|OTG_SWITCH)$":</div><div class='add'>+        type: object</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        $ref: ../regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      The input clock for the audio codec.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    description:</div><div class='add'>+      The clock name for the codec clock.</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    description:</div><div class='add'>+      Needed for the interpretation of sound dais.</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  codec:</div><div class='add'>+    description: |</div><div class='add'>+      The child node for the codec to hold additional properties. If no</div><div class='add'>+      additional properties are required for the codec, this node can be</div><div class='add'>+      omitted.</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      rockchip,mic-in-differential:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Describes if the microphone uses differential mode.</div><div class='add'>+</div><div class='add'>+  charger:</div><div class='add'>+    description: |</div><div class='add'>+      The child node for the charger to hold additional properties. If a</div><div class='add'>+      battery is not in use, this node can be omitted.</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/power/supply/power-supply.yaml</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      monitored-battery:</div><div class='add'>+        description: |</div><div class='add'>+          A phandle to a monitored battery node that contains a valid</div><div class='add'>+          value for:</div><div class='add'>+          charge-full-design-microamp-hours,</div><div class='add'>+          charge-term-current-microamp,</div><div class='add'>+          constant-charge-current-max-microamp,</div><div class='add'>+          constant-charge-voltage-max-microvolt,</div><div class='add'>+          voltage-max-design-microvolt,</div><div class='add'>+          voltage-min-design-microvolt,</div><div class='add'>+          and a valid ocv-capacity table.</div><div class='add'>+</div><div class='add'>+      rockchip,resistor-sense-micro-ohms:</div><div class='add'>+        description: |</div><div class='add'>+          Value in microohms of the battery sense resistor. This value is</div><div class='add'>+          used by the driver to set the correct divisor value to translate</div><div class='add'>+          ADC readings into the proper units of measure.</div><div class='add'>+        enum: [10000, 20000]</div><div class='add'>+</div><div class='add'>+      rockchip,sleep-enter-current-microamp:</div><div class='add'>+        description: |</div><div class='add'>+          Value in microamps of the sleep enter current for the charger.</div><div class='add'>+          Value is used by the driver to calibrate the relax threshold.</div><div class='add'>+</div><div class='add'>+      rockchip,sleep-filter-current-microamp:</div><div class='add'>+        description:</div><div class='add'>+          Value in microamps of the sleep filter current for the charger.</div><div class='add'>+          Value is used by the driver to derive the sleep sample current.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - monitored-battery</div><div class='add'>+      - rockchip,resistor-sense-micro-ohms</div><div class='add'>+      - rockchip,sleep-enter-current-microamp</div><div class='add'>+      - rockchip,sleep-filter-current-microamp</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        '#clock-cells':</div><div class='add'>+          const: 0</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-output-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clock-output-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/px30-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rk817: pmic@20 {</div><div class='add'>+            compatible = "rockchip,rk817";</div><div class='add'>+            reg = &lt;0x20&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+            interrupts = &lt;RK_PB2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            clock-output-names = "rk808-clkout1", "xin32k";</div><div class='add'>+            clock-names = "mclk";</div><div class='add'>+            clocks = &lt;&amp;cru SCLK_I2S1_OUT&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pmic_int&gt;, &lt;&amp;i2s1_2ch_mclk&gt;;</div><div class='add'>+            wakeup-source;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            vcc1-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+            vcc2-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+            vcc3-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+            vcc4-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+            vcc5-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+            vcc6-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+            vcc7-supply = &lt;&amp;vccsys&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                vdd_logic: DCDC_REG1 {</div><div class='add'>+                    regulator-name = "vdd_logic";</div><div class='add'>+                    regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+                    regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_arm: DCDC_REG2 {</div><div class='add'>+                    regulator-name = "vdd_arm";</div><div class='add'>+                    regulator-min-microvolt = &lt;950000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+                    regulator-ramp-delay = &lt;6001&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;950000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_ddr: DCDC_REG3 {</div><div class='add'>+                    regulator-name = "vcc_ddr";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_3v3: DCDC_REG4 {</div><div class='add'>+                    regulator-name = "vcc_3v3";</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_1v8: LDO_REG2 {</div><div class='add'>+                    regulator-name = "vcc_1v8";</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_1v0: LDO_REG3 {</div><div class='add'>+                    regulator-name = "vdd_1v0";</div><div class='add'>+                    regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc3v3_pmu: LDO_REG4 {</div><div class='add'>+                    regulator-name = "vcc3v3_pmu";</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vccio_sd: LDO_REG5 {</div><div class='add'>+                    regulator-name = "vccio_sd";</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_sd: LDO_REG6 {</div><div class='add'>+                    regulator-name = "vcc_sd";</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_bl: LDO_REG7 {</div><div class='add'>+                    regulator-name = "vcc_bl";</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_lcd: LDO_REG8 {</div><div class='add'>+                    regulator-name = "vcc_lcd";</div><div class='add'>+                    regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;2800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_cam: LDO_REG9 {</div><div class='add'>+                    regulator-name = "vcc_cam";</div><div class='add'>+                    regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rk817_charger: charger {</div><div class='add'>+                monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+                rockchip,resistor-sense-micro-ohms = &lt;10000&gt;;</div><div class='add'>+                rockchip,sleep-enter-current-microamp = &lt;300000&gt;;</div><div class='add'>+                rockchip,sleep-filter-current-microamp = &lt;100000&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rk817_codec: codec {</div><div class='add'>+                rockchip,mic-in-differential;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml b/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml<br/>new file mode 100644<br/>index 000000000000..b57c4b005cf4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rockchip,rk818.yaml</a></div><div class='hunk'>@@ -0,0 +1,282 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/rockchip,rk818.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RK818 Power Management Integrated Circuit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Zhong &lt;zyw@rock-chips.com&gt;</div><div class='add'>+  - Zhang Qing &lt;zhangqing@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Rockchip RK818 series PMIC. This device consists of an i2c controlled MFD</div><div class='add'>+  that includes regulators, an RTC, and a power button.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk818</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    description: |</div><div class='add'>+      See &lt;dt-bindings/clock/rockchip,rk808.h&gt; for clock IDs.</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description:</div><div class='add'>+      From common clock binding to override the default output clock name.</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  rockchip,system-power-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Telling whether or not this PMIC is controlling the system power.</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Device can be used as a wakeup source.</div><div class='add'>+</div><div class='add'>+  vcc1-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG1.</div><div class='add'>+</div><div class='add'>+  vcc2-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG2.</div><div class='add'>+</div><div class='add'>+  vcc3-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG3.</div><div class='add'>+</div><div class='add'>+  vcc4-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_REG4.</div><div class='add'>+</div><div class='add'>+  boost-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for DCDC_BOOST</div><div class='add'>+</div><div class='add'>+  vcc6-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG1 and LDO_REG2.</div><div class='add'>+</div><div class='add'>+  vcc7-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG3, LDO_REG5, and LDO_REG7.</div><div class='add'>+</div><div class='add'>+  vcc8-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG4, LDO_REG6, and LDO_REG8.</div><div class='add'>+</div><div class='add'>+  vcc9-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for LDO_REG9 and SWITCH_REG.</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for digital IO.</div><div class='add'>+</div><div class='add'>+  h_5v-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for HDMI_SWITCH.</div><div class='add'>+</div><div class='add'>+  usb-supply:</div><div class='add'>+    description:</div><div class='add'>+      The input supply for OTG_SWITCH.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(DCDC_REG[1-4]|DCDC_BOOST|LDO_REG[1-9]|SWITCH_REG|HDMI_SWITCH|OTG_SWITCH)$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: ../regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/px30-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rockchip.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rk818: pmic@1c {</div><div class='add'>+            compatible = "rockchip,rk818";</div><div class='add'>+            reg = &lt;0x1c&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+            interrupts = &lt;4 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pmic_int&gt;;</div><div class='add'>+            rockchip,system-power-controller;</div><div class='add'>+            wakeup-source;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            vcc1-supply = &lt;&amp;vdd_sys&gt;;</div><div class='add'>+            vcc2-supply = &lt;&amp;vdd_sys&gt;;</div><div class='add'>+            vcc3-supply = &lt;&amp;vdd_sys&gt;;</div><div class='add'>+            vcc4-supply = &lt;&amp;vdd_sys&gt;;</div><div class='add'>+            boost-supply = &lt;&amp;vdd_in_otg_out&gt;;</div><div class='add'>+            vcc6-supply = &lt;&amp;vdd_sys&gt;;</div><div class='add'>+            vcc7-supply = &lt;&amp;vdd_misc_1v8&gt;;</div><div class='add'>+            vcc8-supply = &lt;&amp;vdd_misc_1v8&gt;;</div><div class='add'>+            vcc9-supply = &lt;&amp;vdd_3v3_io&gt;;</div><div class='add'>+            vddio-supply = &lt;&amp;vdd_3v3_io&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                vdd_log: DCDC_REG1 {</div><div class='add'>+                    regulator-name = "vdd_log";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_gpu: DCDC_REG2 {</div><div class='add'>+                    regulator-name = "vdd_gpu";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1250000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vcc_ddr: DCDC_REG3 {</div><div class='add'>+                    regulator-name = "vcc_ddr";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_3v3_io: DCDC_REG4 {</div><div class='add'>+                    regulator-name = "vdd_3v3_io";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_sys: DCDC_BOOST {</div><div class='add'>+                    regulator-name = "vdd_sys";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;5000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;5000000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;5000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_sd: SWITCH_REG {</div><div class='add'>+                    regulator-name = "vdd_sd";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_eth_2v5: LDO_REG2 {</div><div class='add'>+                    regulator-name = "vdd_eth_2v5";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;2500000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_1v0: LDO_REG3 {</div><div class='add'>+                    regulator-name = "vdd_1v0";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_1v8_lcd_ldo: LDO_REG4 {</div><div class='add'>+                    regulator-name = "vdd_1v8_lcd_ldo";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_1v0_lcd: LDO_REG6 {</div><div class='add'>+                    regulator-name = "vdd_1v0_lcd";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-on-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_1v8_ldo: LDO_REG7 {</div><div class='add'>+                    regulator-name = "vdd_1v8_ldo";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                        regulator-suspend-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                vdd_io_sd: LDO_REG9 {</div><div class='add'>+                    regulator-name = "vdd_io_sd";</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+                    regulator-state-mem {</div><div class='add'>+                        regulator-off-in-suspend;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml<br/>index fe265bcab50d..05747e012516 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rohm,bd71815-pmic.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ROHM BD71815 Power Management Integrated Circuit bindings</div><div class='add'>+title: ROHM BD71815 Power Management Integrated Circuit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   BD71815AGW is a single-chip power management ICs for battery-powered</div><div class='hunk'>@@ -46,7 +46,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   rohm,clkout-open-drain:</div><div class='ctx'>     description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 1</div><div class='ctx'> </div><div class='hunk'>@@ -74,7 +74,7 @@ properties:</div><div class='ctx'>   rohm,enable-hidden-gpo:</div><div class='ctx'>     description: |</div><div class='ctx'>       The BD71815 has undocumented GPO at pin E5. Pin is marked as GND at the</div><div class='del'>-      data-sheet as it's location in the middle of GND pins makes it hard to</div><div class='add'>+      data-sheet as its location in the middle of GND pins makes it hard to</div><div class='ctx'>       use on PCB. If your board has managed to use this pin you can enable the</div><div class='ctx'>       second GPO by defining this property. Dont enable this if you are unsure</div><div class='ctx'>       about how the E5 pin is connected on your board.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml<br/>index 8380166d176c..11089aa89ec6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/rohm,bd71828-pmic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ROHM BD71828 Power Management Integrated Circuit bindings</div><div class='add'>+title: ROHM BD71828 Power Management Integrated Circuit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   BD71828GW is a single-chip power management IC for battery-powered portable</div><div class='hunk'>@@ -46,7 +46,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   rohm,clkout-open-drain:</div><div class='ctx'>     description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 1</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml<br/>index 3bfdd33702ad..7aa343f58cb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rohm,bd71837-pmic.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/rohm,bd71837-pmic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ROHM BD71837 Power Management Integrated Circuit bindings</div><div class='add'>+title: ROHM BD71837 Power Management Integrated Circuit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   BD71837MWV is programmable Power Management ICs for powering single-core,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml<br/>index 5d531051a153..7ab7b2c7f3e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/rohm,bd71847-pmic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ROHM BD71847 and BD71850 Power Management Integrated Circuit bindings</div><div class='add'>+title: ROHM BD71847 and BD71850 Power Management Integrated Circuit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   BD71847AMWV and BD71850MWV are programmable Power Management ICs for powering</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml<br/>index 6483860da955..10f207a38178 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/rohm,bd9576-pmic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: ROHM BD9576MUF and BD9573MUF Power Management Integrated Circuit bindings</div><div class='add'>+title: ROHM BD9576MUF and BD9573MUF Power Management Integrated Circuit</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   BD9576MUF and BD9573MUF are power management ICs primarily intended for</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml<br/>index bae55c98961c..b97b06848729 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC Low Power Audio Subsystem (LPASS)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -79,8 +79,8 @@ examples:</div><div class='ctx'>             clocks = &lt;&amp;cmu_aud CLK_ACLK_DMAC&gt;;</div><div class='ctx'>             clock-names = "apb_pclk";</div><div class='ctx'>             #dma-cells = &lt;1&gt;;</div><div class='del'>-            #dma-channels = &lt;8&gt;;</div><div class='del'>-            #dma-requests = &lt;32&gt;;</div><div class='add'>+            dma-channels = &lt;8&gt;;</div><div class='add'>+            dma-requests = &lt;32&gt;;</div><div class='ctx'>             power-domains = &lt;&amp;pd_aud&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml<br/>index 017befdf8adb..055dfc337c2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/samsung,s2mpa01.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPA01 Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml<br/>index 771b3f16da96..5ff6546c72b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPS11/13/14/15 and S2MPU02 Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml b/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml<br/>index 5531718abdf0..10c7b408f33a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/samsung,s5m8767.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S5M8767 Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml b/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml<br/>index 6de74c701635..ee0be32ac020 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/silergy,sy7636a.yaml</a></div><div class='hunk'>@@ -42,6 +42,7 @@ properties:</div><div class='ctx'>       vcom:</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'>         description:</div><div class='ctx'>           The regulator for the compenstation voltage. Enabling/disabling this</div><div class='ctx'>           enables/disables the entire device.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml b/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml<br/>new file mode 100644<br/>index 000000000000..996bd4a17ca3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/sprd,ums512-glbreg.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Unisoc Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/sprd,ums512-glbreg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Unisoc System Global Register</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='add'>+  - Baolin Wang &lt;baolin.wang7@gmail.com&gt;</div><div class='add'>+  - Chunyan Zhang &lt;zhang.lyra@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Unisoc system global registers provide register map</div><div class='add'>+  for clocks and some multimedia modules of the SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: sprd,ums512-glbregs</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^clock-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/clock/sprd,ums512-clk.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Clock controller for the SoC clocks.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ap_apb_regs: syscon@71000000 {</div><div class='add'>+      compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";</div><div class='add'>+      reg = &lt;0x71000000 0x3000&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;1&gt;;</div><div class='add'>+      ranges = &lt;0 0x71000000 0x3000&gt;;</div><div class='add'>+</div><div class='add'>+      clock-controller@0 {</div><div class='add'>+        compatible = "sprd,ums512-apahb-gate";</div><div class='add'>+        reg = &lt;0x0 0x2000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    ap_intc5_regs: syscon@32360000 {</div><div class='add'>+      compatible = "sprd,ums512-glbregs", "syscon", "simple-mfd";</div><div class='add'>+      reg = &lt;0x32360000 0x1000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml<br/>index ec7f0190f46e..27329c5dc38e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Low-Power Timers bindings</div><div class='add'>+title: STMicroelectronics STM32 Low-Power Timers</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several</div><div class='hunk'>@@ -46,6 +46,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   pwm:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -58,43 +59,46 @@ properties:</div><div class='ctx'>       - "#pwm-cells"</div><div class='ctx'>       - compatible</div><div class='ctx'> </div><div class='del'>-patternProperties:</div><div class='del'>-  "^trigger@[0-9]+$":</div><div class='add'>+  counter:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='del'>-        const: st,stm32-lptimer-trigger</div><div class='del'>-</div><div class='del'>-      reg:</div><div class='del'>-        description: Identify trigger hardware block.</div><div class='del'>-        items:</div><div class='del'>-          minimum: 0</div><div class='del'>-          maximum: 2</div><div class='add'>+        const: st,stm32-lptimer-counter</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='del'>-      - reg</div><div class='ctx'> </div><div class='del'>-  counter:</div><div class='add'>+  timer:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='del'>-        const: st,stm32-lptimer-counter</div><div class='add'>+        const: st,stm32-lptimer-timer</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='ctx'> </div><div class='del'>-  timer:</div><div class='add'>+patternProperties:</div><div class='add'>+  "^trigger@[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='del'>-        const: st,stm32-lptimer-timer</div><div class='add'>+        const: st,stm32-lptimer-trigger</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        description: Identify trigger hardware block.</div><div class='add'>+        items:</div><div class='add'>+          minimum: 0</div><div class='add'>+          maximum: 2</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='add'>+      - reg</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#address-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml<br/>index 10b330d42901..f84e09a5743b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Timers bindings</div><div class='add'>+title: STMicroelectronics STM32 Timers</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This hardware block provides 3 types of timer along with PWM functionality:</div><div class='hunk'>@@ -33,7 +33,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: int</div><div class='ctx'> </div><div class='del'>-  reset:</div><div class='add'>+  resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   dmas:</div><div class='hunk'>@@ -46,6 +46,21 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 7</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    oneOf:</div><div class='add'>+      - maxItems: 1</div><div class='add'>+      - maxItems: 4</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: global</div><div class='add'>+      - items:</div><div class='add'>+          - const: brk</div><div class='add'>+          - const: up</div><div class='add'>+          - const: trg-com</div><div class='add'>+          - const: cc</div><div class='add'>+</div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -54,6 +69,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   pwm:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -87,9 +103,21 @@ properties:</div><div class='ctx'>       - "#pwm-cells"</div><div class='ctx'>       - compatible</div><div class='ctx'> </div><div class='add'>+  counter:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: st,stm32-timer-counter</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^timer@[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -107,16 +135,6 @@ patternProperties:</div><div class='ctx'>       - compatible</div><div class='ctx'>       - reg</div><div class='ctx'> </div><div class='del'>-  counter:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        const: st,stm32-timer-counter</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/st,stmfx.yaml b/Documentation/devicetree/bindings/mfd/st,stmfx.yaml<br/>index b2a4e4aa7ff6..76551c90b128 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stmfx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stmfx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stmfx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/st,stmfx.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/st,stmfx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectonics Multi-Function eXpander (STMFX) bindings</div><div class='add'>+title: STMicroelectonics Multi-Function eXpander (STMFX)</div><div class='ctx'> </div><div class='ctx'> description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C for</div><div class='ctx'>                communication with the main MCU. Its main features are GPIO expansion,</div><div class='hunk'>@@ -57,6 +57,7 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^[a-zA-Z]*-pins$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>         allOf:</div><div class='ctx'>           - $ref: ../pinctrl/pinmux-node.yaml</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml b/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml<br/>index 426658ad81d4..9573e4af949e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/st,stpmic1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/st,stpmic1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/st,stpmic1.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/st,stpmic1.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectonics STPMIC1 Power Management IC bindings</div><div class='add'>+title: STMicroelectonics STPMIC1 Power Management IC</div><div class='ctx'> </div><div class='ctx'> description: STMicroelectronics STPMIC1 Power Management IC</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml b/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml<br/>index 623a4b5cd27a..6c8d42f27fe8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/stericsson,ab8500.yaml</a></div><div class='hunk'>@@ -51,6 +51,7 @@ properties:</div><div class='ctx'>       provides the reference clock for the entire U8500 system and</div><div class='ctx'>       the DB8500 counterpart.</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -63,6 +64,7 @@ properties:</div><div class='ctx'>     description: Node describing the AB8500 GPIO controller. A few</div><div class='ctx'>       GPIO pins available for misc usage.</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -78,6 +80,7 @@ properties:</div><div class='ctx'>   rtc:</div><div class='ctx'>     description: Node describing the AB8500 battery-backed RTC.</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -337,34 +340,40 @@ properties:</div><div class='ctx'>         description: The voltage for the auxilary LDO regulator 1</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_aux2:</div><div class='ctx'>         description: The voltage for the auxilary LDO regulator 2</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_aux3:</div><div class='ctx'>         description: The voltage for the auxilary LDO regulator 3</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_aux4:</div><div class='ctx'>         description: The voltage for the auxilary LDO regulator 4</div><div class='ctx'>           only present on AB8505</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_aux5:</div><div class='ctx'>         description: The voltage for the auxilary LDO regulator 5</div><div class='ctx'>           only present on AB8505</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_aux6:</div><div class='ctx'>         description: The voltage for the auxilary LDO regulator 6</div><div class='ctx'>           only present on AB8505</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       # There is never any AUX7 regulator which is confusing</div><div class='ctx'> </div><div class='hunk'>@@ -373,18 +382,21 @@ properties:</div><div class='ctx'>           only present on AB8505</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_intcore:</div><div class='ctx'>         description: The LDO regulator for the internal core voltage</div><div class='ctx'>           of the AB8500</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_adc:</div><div class='ctx'>         description: Analog power regulator for the analog to digital converter</div><div class='ctx'>           ADC, only present on AB8505</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_tvout:</div><div class='ctx'>         description: The voltage for the TV output regulator, incidentally</div><div class='hunk'>@@ -393,33 +405,39 @@ properties:</div><div class='ctx'>           Only present on AB8500.</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_audio:</div><div class='ctx'>         description: The LDO regulator for the audio codec output</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_anamic1:</div><div class='ctx'>         description: The LDO regulator for the analog microphone 1</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_anamic2:</div><div class='ctx'>         description: The LDO regulator for the analog microphone 2</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_dmic:</div><div class='ctx'>         description: The LDO regulator for the digital microphone</div><div class='ctx'>           only present on AB8500</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ldo_ana:</div><div class='ctx'>         description: Analog power regulator for CSI and DSI interfaces,</div><div class='ctx'>           Camera Serial Interface CSI and Display Serial Interface DSI.</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='hunk'>@@ -442,16 +460,19 @@ properties:</div><div class='ctx'>         description: The voltage for the VSMPS1 external regulator</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ext2:</div><div class='ctx'>         description: The voltage for the VSMPS2 external regulator</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       ab8500_ext3:</div><div class='ctx'>         description: The voltage for the VSMPS3 external regulator</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: ../regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='hunk'>@@ -462,6 +483,7 @@ patternProperties:</div><div class='ctx'>   "^pwm@[1-9]+?$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: ../pwm/pwm.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     description: Represents each of the PWM blocks in the AB8500</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml<br/>index 13baa452cc9d..8103154bbb52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/syscon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/syscon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/syscon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/syscon.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/syscon.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: System Controller Registers R/W Device Tree Bindings</div><div class='add'>+title: System Controller Registers R/W</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   System controller node represents a register region containing a set</div><div class='hunk'>@@ -17,7 +17,7 @@ description: |</div><div class='ctx'>   and access the registers directly.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Lee Jones &lt;lee.jones@linaro.org&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> select:</div><div class='ctx'>   properties:</div><div class='hunk'>@@ -38,19 +38,26 @@ properties:</div><div class='ctx'>               - allwinner,sun8i-h3-system-controller</div><div class='ctx'>               - allwinner,sun8i-v3s-system-controller</div><div class='ctx'>               - allwinner,sun50i-a64-system-controller</div><div class='add'>+              - amd,pensando-elba-syscon</div><div class='ctx'>               - brcm,cru-clkset</div><div class='ctx'>               - freecom,fsg-cs2-system-controller</div><div class='add'>+              - fsl,imx93-aonmix-ns-syscfg</div><div class='add'>+              - fsl,imx93-wakeupmix-syscfg</div><div class='ctx'>               - hisilicon,dsa-subctrl</div><div class='ctx'>               - hisilicon,hi6220-sramctrl</div><div class='ctx'>               - hisilicon,pcie-sas-subctrl</div><div class='ctx'>               - hisilicon,peri-subctrl</div><div class='add'>+              - hpe,gxp-sysreg</div><div class='ctx'>               - intel,lgm-syscon</div><div class='ctx'>               - marvell,armada-3700-usb2-host-misc</div><div class='ctx'>               - mediatek,mt8135-pctl-a-syscfg</div><div class='ctx'>               - mediatek,mt8135-pctl-b-syscfg</div><div class='add'>+              - mediatek,mt8365-syscfg</div><div class='ctx'>               - microchip,lan966x-cpu-syscon</div><div class='ctx'>               - microchip,sparx5-cpu-syscon</div><div class='ctx'>               - mstar,msc313-pmsleep</div><div class='add'>+              - nuvoton,ma35d1-sys</div><div class='add'>+              - nuvoton,wpcm450-shm</div><div class='ctx'>               - rockchip,px30-qos</div><div class='ctx'>               - rockchip,rk3036-qos</div><div class='ctx'>               - rockchip,rk3066-qos</div><div class='hunk'>@@ -59,19 +66,16 @@ properties:</div><div class='ctx'>               - rockchip,rk3368-qos</div><div class='ctx'>               - rockchip,rk3399-qos</div><div class='ctx'>               - rockchip,rk3568-qos</div><div class='del'>-              - samsung,exynos3-sysreg</div><div class='del'>-              - samsung,exynos4-sysreg</div><div class='del'>-              - samsung,exynos5-sysreg</div><div class='del'>-              - samsung,exynos5433-sysreg</div><div class='del'>-              - samsung,exynos850-sysreg</div><div class='del'>-              - samsung,exynosautov9-sysreg</div><div class='add'>+              - rockchip,rk3588-qos</div><div class='add'>+              - rockchip,rv1126-qos</div><div class='add'>+              - starfive,jh7100-sysmain</div><div class='ctx'> </div><div class='ctx'>           - const: syscon</div><div class='ctx'> </div><div class='ctx'>       - contains:</div><div class='ctx'>           const: syscon</div><div class='ctx'>         minItems: 2</div><div class='del'>-        maxItems: 4  # Should be enough</div><div class='add'>+        maxItems: 5  # Should be enough</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -80,9 +84,11 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       The size (in bytes) of the IO accesses that should be performed</div><div class='ctx'>       on the device.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [1, 2, 4, 8]</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   hwlocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description:</div><div class='hunk'>@@ -92,6 +98,18 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: simple-mfd</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 5</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -100,12 +118,4 @@ examples:</div><div class='ctx'>         compatible = "allwinner,sun8i-h3-system-controller", "syscon";</div><div class='ctx'>         reg = &lt;0x01c00000 0x1000&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    gpr: iomuxc-gpr@20e0000 {</div><div class='del'>-        compatible = "fsl,imx6q-iomuxc-gpr", "syscon";</div><div class='del'>-        reg = &lt;0x020e0000 0x38&gt;;</div><div class='del'>-        hwlocks = &lt;&amp;hwlock1 1&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml b/Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml<br/>index 34bf6a01436f..23a63265be3c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/ti,am3359-tscadc.yaml</a></div><div class='hunk'>@@ -52,6 +52,9 @@ properties:</div><div class='ctx'>     type: object</div><div class='ctx'>     description: Magnetic reader</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml<br/>index fa86691ebf16..0c98d913747b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/ti,j721e-system-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI J721e System Controller Registers R/W Device Tree Bindings</div><div class='add'>+title: TI J721e System Controller Registers R/W</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This represents the Control Module registers (CTRL_MMR0) on the SoC.</div><div class='hunk'>@@ -26,7 +26,9 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - ti,j7200-system-controller</div><div class='ctx'>           - ti,j721e-system-controller</div><div class='add'>+          - ti,j721s2-system-controller</div><div class='ctx'>       - const: syscon</div><div class='ctx'>       - const: simple-mfd</div><div class='ctx'> </div><div class='hunk'>@@ -48,6 +50,24 @@ patternProperties:</div><div class='ctx'>     description:</div><div class='ctx'>       This is the SERDES lane control mux.</div><div class='ctx'> </div><div class='add'>+  "^clock-controller@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/clock/ti,am654-ehrpwm-tbclk.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Clock provider for TI EHRPWM nodes.</div><div class='add'>+</div><div class='add'>+  "phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/phy/ti,phy-gmii-sel.yaml#</div><div class='add'>+    description:</div><div class='add'>+      The phy node corresponding to the ethernet MAC.</div><div class='add'>+</div><div class='add'>+  "^chipid@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/hwinfo/ti,k3-socinfo.yaml#</div><div class='add'>+    description:</div><div class='add'>+      The node corresponding to SoC chip identification.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -79,5 +99,16 @@ examples:</div><div class='ctx'>                 &lt;0x40c0 0x3&gt;, &lt;0x40c4 0x3&gt;, &lt;0x40c8 0x3&gt;, &lt;0x40cc 0x3&gt;;</div><div class='ctx'>                 /* SERDES4 lane0/1/2/3 select */</div><div class='ctx'>         };</div><div class='add'>+</div><div class='add'>+        clock-controller@4140 {</div><div class='add'>+            compatible = "ti,am654-ehrpwm-tbclk", "syscon";</div><div class='add'>+            reg = &lt;0x4140 0x18&gt;;</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        chipid@14 {</div><div class='add'>+            compatible = "ti,am654-chipid";</div><div class='add'>+            reg = &lt;0x14 0x4&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml b/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml<br/>new file mode 100644<br/>index 000000000000..28cd5164d46f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/ti,nspire-misc.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/ti,nspire-misc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI Nspire MISC hardware block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  System controller node represents a register region containing a set</div><div class='add'>+  of miscellaneous registers. The registers are not cohesive enough to</div><div class='add'>+  represent as any specific type of device. Currently there is a reset</div><div class='add'>+  controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - ti,nspire-misc</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reboot:</div><div class='add'>+    $ref: /schemas/power/reset/syscon-reboot.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reboot</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    misc: misc@900a0000 {</div><div class='add'>+      compatible = "ti,nspire-misc", "syscon", "simple-mfd";</div><div class='add'>+      reg = &lt;0x900a0000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+      reboot {</div><div class='add'>+        compatible = "syscon-reboot";</div><div class='add'>+        offset = &lt;0x08&gt;;</div><div class='add'>+        value = &lt;0x02&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml b/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml<br/>index 6aeedda3be15..bd36a07c1721 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/ti,tps65086.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/ti,tps65086.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/ti,tps65086.yaml</a></div><div class='hunk'>@@ -38,6 +38,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   regulators:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       List of child nodes that specify the regulator initialization data.</div><div class='ctx'>       Child nodes must be named after their hardware counterparts:</div><div class='hunk'>@@ -94,7 +95,7 @@ required:</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml b/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml<br/>index 9e762d474218..7902f3c5d289 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/wlf,arizona.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/wlf,arizona.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/wlf,arizona.yaml</a></div><div class='hunk'>@@ -14,6 +14,7 @@ description: |</div><div class='ctx'>   range of analogue I/O.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml</div><div class='ctx'>   - $ref: /schemas/sound/wlf,arizona.yaml#</div><div class='ctx'>   - $ref: /schemas/regulator/wlf,arizona.yaml#</div><div class='ctx'>   - $ref: /schemas/extcon/wlf,arizona.yaml#</div><div class='hunk'>@@ -155,7 +156,7 @@ properties:</div><div class='ctx'>       entry has a value that is out of range for a 16 bit register then the</div><div class='ctx'>       chip default will be used. If present exactly five values must be</div><div class='ctx'>       specified.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 5</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml b/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml<br/>index de330c9869ff..f3d8394b27e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/x-powers,ac100.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: X-Powers AC100 Device Tree Bindings</div><div class='add'>+title: X-Powers AC100</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml b/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml<br/>index 3a53bae611bc..f7f0f2c0421a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/x-powers,axp152.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mfd/x-powers,axp152.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: X-Powers AXP PMIC Device Tree Bindings</div><div class='add'>+title: X-Powers AXP PMIC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -47,9 +47,8 @@ allOf:</div><div class='ctx'>               - x-powers,axp209</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='del'>-      not:</div><div class='del'>-        required:</div><div class='del'>-          - x-powers,drive-vbus-en</div><div class='add'>+      properties:</div><div class='add'>+        x-powers,drive-vbus-en: false</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       not:</div><div class='hunk'>@@ -59,14 +58,9 @@ allOf:</div><div class='ctx'>               const: x-powers,axp806</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='del'>-      allOf:</div><div class='del'>-        - not:</div><div class='del'>-            required:</div><div class='del'>-              - x-powers,self-working-mode</div><div class='del'>-</div><div class='del'>-        - not:</div><div class='del'>-            required:</div><div class='del'>-              - x-powers,master-mode</div><div class='add'>+      properties:</div><div class='add'>+        x-powers,self-working-mode: false</div><div class='add'>+        x-powers,master-mode: false</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       not:</div><div class='hunk'>@@ -79,6 +73,18 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - interrupts</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - x-powers,axp313a</div><div class='add'>+              - x-powers,axp15060</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        x-powers,dcdc-freq: false</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -88,10 +94,15 @@ properties:</div><div class='ctx'>           - x-powers,axp209</div><div class='ctx'>           - x-powers,axp221</div><div class='ctx'>           - x-powers,axp223</div><div class='add'>+          - x-powers,axp313a</div><div class='ctx'>           - x-powers,axp803</div><div class='ctx'>           - x-powers,axp806</div><div class='ctx'>           - x-powers,axp809</div><div class='ctx'>           - x-powers,axp813</div><div class='add'>+          - x-powers,axp15060</div><div class='add'>+      - items:</div><div class='add'>+          - const: x-powers,axp228</div><div class='add'>+          - const: x-powers,axp221</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: x-powers,axp805</div><div class='ctx'>           - const: x-powers,axp806</div><div class='hunk'>@@ -257,9 +268,10 @@ properties:</div><div class='ctx'>           Defines the work frequency of DC-DC in kHz.</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|drivevbus|dc5ldo)$":</div><div class='add'>+      "^(([a-f])?ldo[0-9]|dcdc[0-7a-e]|ldo(_|-)io(0|1)|(dc1)?sw|rtc(_|-)ldo|cpusldo|drivevbus|dc5ldo)$":</div><div class='ctx'>         $ref: /schemas/regulator/regulator.yaml#</div><div class='ctx'>         type: object</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           regulator-ramp-delay:</div><div class='hunk'>@@ -295,7 +307,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      i2c0 {</div><div class='add'>+      i2c {</div><div class='ctx'>           #address-cells = &lt;1&gt;;</div><div class='ctx'>           #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -311,7 +323,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>       #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-      i2c0 {</div><div class='add'>+      i2c {</div><div class='ctx'>           #address-cells = &lt;1&gt;;</div><div class='ctx'>           #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml b/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml<br/>index 9efd49c39bd2..6e880a46d7ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Bootlin</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mfd/xylon,logicvc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mfd/xylon,logicvc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Xylon LogiCVC multi-function device</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt b/Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt<br/>deleted file mode 100644<br/>index 8ef71b4085ca..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/brcm/brcm,bmips.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,8 +0,0 @@</div><div class='del'>-* Broadcom MIPS (BMIPS) CPUs</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "brcm,bmips3300", "brcm,bmips4350", "brcm,bmips4380",</div><div class='del'>-  "brcm,bmips5000"</div><div class='del'>-</div><div class='del'>-- mips-hpt-frequency: This is common to all CPUs in the system so it lives</div><div class='del'>-  under the "cpus" node.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/brcm/soc.yaml b/Documentation/devicetree/bindings/mips/brcm/soc.yaml<br/>new file mode 100644<br/>index 000000000000..975945ca2888<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/brcm/soc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/brcm/soc.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mips/brcm/soc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom cable/DSL/settop platforms</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+    Boards Broadcom cable/DSL/settop SoC shall have the following properties.</div><div class='add'>+    The experimental -viper variants are for running Linux on the 3384's</div><div class='add'>+    BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - brcm,bcm3368</div><div class='add'>+      - brcm,bcm3384</div><div class='add'>+      - brcm,bcm33843</div><div class='add'>+      - brcm,bcm3384-viper</div><div class='add'>+      - brcm,bcm33843-viper</div><div class='add'>+      - brcm,bcm6328</div><div class='add'>+      - brcm,bcm6358</div><div class='add'>+      - brcm,bcm6362</div><div class='add'>+      - brcm,bcm6368</div><div class='add'>+      - brcm,bcm63168</div><div class='add'>+      - brcm,bcm63268</div><div class='add'>+      - brcm,bcm7125</div><div class='add'>+      - brcm,bcm7346</div><div class='add'>+      - brcm,bcm7358</div><div class='add'>+      - brcm,bcm7360</div><div class='add'>+      - brcm,bcm7362</div><div class='add'>+      - brcm,bcm7420</div><div class='add'>+      - brcm,bcm7425</div><div class='add'>+</div><div class='add'>+  cpus:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      mips-hpt-frequency:</div><div class='add'>+        description: MIPS counter high precision timer frequency.</div><div class='add'>+         This is common to all CPUs in the system so it lives</div><div class='add'>+         under the "cpus" node.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^cpu@[0-9]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/mips/cpus.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - mips-hpt-frequency</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+     / {</div><div class='add'>+         compatible = "brcm,bcm3368";</div><div class='add'>+         #address-cells = &lt;1&gt;;</div><div class='add'>+         #size-cells = &lt;1&gt;;</div><div class='add'>+         model = "Broadcom 3368";</div><div class='add'>+</div><div class='add'>+         cpus {</div><div class='add'>+           #address-cells = &lt;1&gt;;</div><div class='add'>+           #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+           mips-hpt-frequency = &lt;150000000&gt;;</div><div class='add'>+</div><div class='add'>+           cpu@0 {</div><div class='add'>+             compatible = "brcm,bmips4350";</div><div class='add'>+             device_type = "cpu";</div><div class='add'>+             reg = &lt;0&gt;;</div><div class='add'>+           };</div><div class='add'>+</div><div class='add'>+           cpu@1 {</div><div class='add'>+             compatible = "brcm,bmips4350";</div><div class='add'>+             device_type = "cpu";</div><div class='add'>+             reg = &lt;1&gt;;</div><div class='add'>+           };</div><div class='add'>+         };</div><div class='add'>+       };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/cpu_irq.txt b/Documentation/devicetree/bindings/mips/cpu_irq.txt<br/>deleted file mode 100644<br/>index f080f06da6d8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/cpu_irq.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/cpu_irq.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,47 +0,0 @@</div><div class='del'>-MIPS CPU interrupt controller</div><div class='del'>-</div><div class='del'>-On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU</div><div class='del'>-IRQs from a devicetree file and create a irq_domain for IRQ controller.</div><div class='del'>-</div><div class='del'>-With the irq_domain in place we can describe how the 8 IRQs are wired to the</div><div class='del'>-platforms internal interrupt controller cascade.</div><div class='del'>-</div><div class='del'>-Below is an example of a platform describing the cascade inside the devicetree</div><div class='del'>-and the code used to load it inside arch_init_irq().</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "mti,cpu-interrupt-controller"</div><div class='del'>-</div><div class='del'>-Example devicetree:</div><div class='del'>-	cpu-irq: cpu-irq {</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		compatible = "mti,cpu-interrupt-controller";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	intc: intc@200 {</div><div class='del'>-		compatible = "ralink,rt2880-intc";</div><div class='del'>-		reg = &lt;0x200 0x100&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;cpu-irq&gt;;</div><div class='del'>-		interrupts = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example platform irq.c:</div><div class='del'>-static struct of_device_id __initdata of_irq_ids[] = {</div><div class='del'>-	{ .compatible = "mti,cpu-interrupt-controller", .data = mips_cpu_irq_of_init },</div><div class='del'>-	{ .compatible = "ralink,rt2880-intc", .data = intc_of_init },</div><div class='del'>-	{},</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-void __init arch_init_irq(void)</div><div class='del'>-{</div><div class='del'>-	of_irq_init(of_irq_ids);</div><div class='del'>-}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/cpus.yaml b/Documentation/devicetree/bindings/mips/cpus.yaml<br/>new file mode 100644<br/>index 000000000000..cf382dea3922<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/cpus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/cpus.yaml</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mips/cpus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MIPS CPUs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;</div><div class='add'>+  - 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The device tree allows to describe the layout of CPUs in a system through</div><div class='add'>+  the "cpus" node, which in turn contains a number of subnodes (ie "cpu")</div><div class='add'>+  defining properties for every CPU.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - brcm,bmips3300</div><div class='add'>+      - brcm,bmips4350</div><div class='add'>+      - brcm,bmips4380</div><div class='add'>+      - brcm,bmips5000</div><div class='add'>+      - brcm,bmips5200</div><div class='add'>+      - ingenic,xburst-mxu1.0</div><div class='add'>+      - ingenic,xburst-fpu1.0-mxu1.1</div><div class='add'>+      - ingenic,xburst-fpu2.0-mxu2.0</div><div class='add'>+      - ingenic,xburst2-fpu2.1-mxu2.1-smt</div><div class='add'>+      - loongson,gs264</div><div class='add'>+      - mips,m14Kc</div><div class='add'>+      - mips,mips4Kc</div><div class='add'>+      - mips,mips4KEc</div><div class='add'>+      - mips,mips24Kc</div><div class='add'>+      - mips,mips24KEc</div><div class='add'>+      - mips,mips74Kc</div><div class='add'>+      - mips,mips1004Kc</div><div class='add'>+      - mti,interaptiv</div><div class='add'>+      - mti,mips24KEc</div><div class='add'>+      - mti,mips14KEc</div><div class='add'>+      - mti,mips14Kc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  device_type: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ingenic,xburst-mxu1.0</div><div class='add'>+              - ingenic,xburst-fpu1.0-mxu1.1</div><div class='add'>+              - ingenic,xburst-fpu2.0-mxu2.0</div><div class='add'>+              - ingenic,xburst2-fpu2.1-mxu2.1-smt</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - device_type</div><div class='add'>+        - clocks</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cpus {</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+      cpu@0 {</div><div class='add'>+        compatible = "mips,mips1004Kc";</div><div class='add'>+        device_type = "cpu";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cpu@1 {</div><div class='add'>+        compatible = "mips,mips1004Kc";</div><div class='add'>+        device_type = "cpu";</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // Example 2 (Ingenic CPU)</div><div class='add'>+    #include &lt;dt-bindings/clock/ingenic,jz4780-cgu.h&gt;</div><div class='add'>+</div><div class='add'>+    cpus {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      cpu@0 {</div><div class='add'>+        compatible = "ingenic,xburst-fpu1.0-mxu1.1";</div><div class='add'>+        device_type = "cpu";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;cgu JZ4780_CLK_CPU&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cpu@1 {</div><div class='add'>+        compatible = "ingenic,xburst-fpu1.0-mxu1.1";</div><div class='add'>+        device_type = "cpu";</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;cgu JZ4780_CLK_CORE1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml<br/>index ee00d414df10..f2e822afe7fb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/ingenic/devices.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/ingenic/devices.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/ingenic/devices.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/ingenic/devices.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mips/ingenic/devices.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic XBurst based Platforms Device Tree Bindings</div><div class='add'>+title: Ingenic XBurst based Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml<br/>deleted file mode 100644<br/>index b7e7fa715437..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,69 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/mips/ingenic/ingenic,cpu.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Bindings for Ingenic XBurst family CPUs</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  Ingenic XBurst family CPUs shall have the following properties.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    oneOf:</div><div class='del'>-</div><div class='del'>-      - description: Ingenic XBurst®1 CPU Cores</div><div class='del'>-        enum:</div><div class='del'>-          - ingenic,xburst-mxu1.0</div><div class='del'>-          - ingenic,xburst-fpu1.0-mxu1.1</div><div class='del'>-          - ingenic,xburst-fpu2.0-mxu2.0</div><div class='del'>-</div><div class='del'>-      - description: Ingenic XBurst®2 CPU Cores</div><div class='del'>-        enum:</div><div class='del'>-          - ingenic,xburst2-fpu2.1-mxu2.1-smt</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  device_type: true</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - device_type</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - clocks</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/clock/ingenic,jz4780-cgu.h&gt;</div><div class='del'>-</div><div class='del'>-    cpus {</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-        cpu0: cpu@0 {</div><div class='del'>-                device_type = "cpu";</div><div class='del'>-                compatible = "ingenic,xburst-fpu1.0-mxu1.1";</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-                clocks = &lt;&amp;cgu JZ4780_CLK_CPU&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        cpu1: cpu@1 {</div><div class='del'>-                device_type = "cpu";</div><div class='del'>-                compatible = "ingenic,xburst-fpu1.0-mxu1.1";</div><div class='del'>-                reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-                clocks = &lt;&amp;cgu JZ4780_CLK_CORE1&gt;;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml b/Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml<br/>index 40130fefa2b4..15d41bdbdc26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mips/lantiq/lantiq,dma-xway.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Lantiq Xway SoCs DMA Controller DT bindings</div><div class='add'>+title: Lantiq Xway SoCs DMA Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - John Crispin &lt;john@phrozen.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt<br/>index 58d51f480c9e..8ec6191c1712 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/lantiq/rcu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/lantiq/rcu.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/lantiq/rcu.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/lantiq/rcu.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@ Lantiq XWAY SoC RCU binding</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='ctx'> This binding describes the RCU (reset controller unit) multifunction device,</div><div class='del'>-where each sub-device has it's own set of registers.</div><div class='add'>+where each sub-device has its own set of registers.</div><div class='ctx'> </div><div class='ctx'> The RCU register range is used for multiple purposes. Mostly one device</div><div class='ctx'> uses one or multiple register exclusively, but for some registers some</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/loongson/devices.yaml b/Documentation/devicetree/bindings/mips/loongson/devices.yaml<br/>index 9fee6708e6f5..099e40e1482d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/loongson/devices.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/loongson/devices.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/loongson/devices.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/loongson/devices.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mips/loongson/devices.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Loongson based Platforms Device Tree Bindings</div><div class='add'>+title: Loongson based Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;</div><div class='hunk'>@@ -37,6 +37,18 @@ properties:</div><div class='ctx'>         items:</div><div class='ctx'>           - const: loongson,loongson64v-4core-virtio</div><div class='ctx'> </div><div class='add'>+      - description: LS1B based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - loongson,lsgz-1b-dev</div><div class='add'>+          - const: loongson,ls1b</div><div class='add'>+</div><div class='add'>+      - description: LS1C based boards</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - loongmasses,smartloong-1c</div><div class='add'>+          - const: loongson,ls1c</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/ralink.yaml b/Documentation/devicetree/bindings/mips/ralink.yaml<br/>index 0588cee25ae9..704b5b595127 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/ralink.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/ralink.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/ralink.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mips/ralink.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ralink SoC based Platforms Device Tree Bindings</div><div class='add'>+title: Ralink SoC based Platforms</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mips/realtek-rtl.yaml b/Documentation/devicetree/bindings/mips/realtek-rtl.yaml<br/>index aadff8ce0f49..f8ac309d2994 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/realtek-rtl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mips/realtek-rtl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mips/realtek-rtl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mips/realtek-rtl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mips/realtek-rtl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Realtek RTL83xx/93xx SoC series device tree bindings</div><div class='add'>+title: Realtek RTL83xx/93xx SoC series</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bert Vermeulen &lt;bert@biot.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/idt,89hpesx.yaml b/Documentation/devicetree/bindings/misc/idt,89hpesx.yaml<br/>new file mode 100644<br/>index 000000000000..452236e79354<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/idt,89hpesx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/misc/idt,89hpesx.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/misc/idt,89hpesx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Serge Semin &lt;fancer.lancer@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        pattern: '^idt,89hpes'</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - pattern: '^idt,89hpes(8nt2|12nt3|12n3a?|24n3a?|(12|24)t3g2|4t4g2|10t4g2|[56]t5|8t5a?)$'</div><div class='add'>+      - pattern: '^idt,89hpes(6t6g2|16t7|(24t6|32t8|48t12|16t4a?)(g2)?)$'</div><div class='add'>+      - pattern: '^idt,89hpes(24nt6a|32nt8[ab]|12nt12|16nt16|24nt24|32nt24[ab])g2$'</div><div class='add'>+      - pattern: '^idt,89hpes((32h8|48h12a?|22h16|34h16|64h16a?)(g2)?|16h16)$'</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+  </div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^eeprom@':</div><div class='add'>+    $ref: /schemas/eeprom/at24.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        description: Only a subset of devices are supported</div><div class='add'>+        pattern: ',24c(32|64|128|256|512)$'</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        idt@74 {</div><div class='add'>+            compatible = "idt,89hpes32nt8ag2";</div><div class='add'>+            reg = &lt;0x74&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            eeprom@50 {</div><div class='add'>+                compatible = "atmel,24c64";</div><div class='add'>+                reg = &lt;0x50&gt;;</div><div class='add'>+                read-only;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/idt_89hpesx.txt b/Documentation/devicetree/bindings/misc/idt_89hpesx.txt<br/>deleted file mode 100644<br/>index b9093b79ab7d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/idt_89hpesx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/idt_89hpesx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-EEPROM / CSR SMBus-slave interface of IDT 89HPESx devices</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible : should be "&lt;manufacturer&gt;,&lt;type&gt;"</div><div class='del'>-		 Basically there is only one manufacturer: idt, but some</div><div class='del'>-		 compatible devices may be produced in future. Following devices</div><div class='del'>-		 are supported: 89hpes8nt2, 89hpes12nt3, 89hpes24nt6ag2,</div><div class='del'>-		 89hpes32nt8ag2, 89hpes32nt8bg2, 89hpes12nt12g2, 89hpes16nt16g2,</div><div class='del'>-		 89hpes24nt24g2, 89hpes32nt24ag2, 89hpes32nt24bg2;</div><div class='del'>-		 89hpes12n3, 89hpes12n3a, 89hpes24n3, 89hpes24n3a;</div><div class='del'>-		 89hpes32h8, 89hpes32h8g2, 89hpes48h12, 89hpes48h12g2,</div><div class='del'>-		 89hpes48h12ag2, 89hpes16h16, 89hpes22h16, 89hpes22h16g2,</div><div class='del'>-		 89hpes34h16, 89hpes34h16g2, 89hpes64h16, 89hpes64h16g2,</div><div class='del'>-		 89hpes64h16ag2;</div><div class='del'>-		 89hpes12t3g2, 89hpes24t3g2, 89hpes16t4, 89hpes4t4g2,</div><div class='del'>-		 89hpes10t4g2, 89hpes16t4g2, 89hpes16t4ag2, 89hpes5t5,</div><div class='del'>-		 89hpes6t5, 89hpes8t5, 89hpes8t5a, 89hpes24t6, 89hpes6t6g2,</div><div class='del'>-		 89hpes24t6g2, 89hpes16t7, 89hpes32t8, 89hpes32t8g2,</div><div class='del'>-		 89hpes48t12, 89hpes48t12g2.</div><div class='del'>-  - reg :	 I2C address of the IDT 89HPESx device.</div><div class='del'>-</div><div class='del'>-Optionally there can be EEPROM-compatible subnode:</div><div class='del'>-  - compatible:  There are five EEPROM devices supported: 24c32, 24c64, 24c128,</div><div class='del'>-		 24c256 and 24c512 differed by size.</div><div class='del'>-  - reg:         Custom address of EEPROM device (If not specified IDT 89HPESx</div><div class='del'>-    (optional)	 device will try to communicate with EEPROM sited by default</div><div class='del'>-		 address - 0x50)</div><div class='del'>-  - read-only :	 Parameterless property disables writes to the EEPROM</div><div class='del'>-    (optional)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	idt@60 {</div><div class='del'>-		compatible = "idt,89hpes32nt8ag2";</div><div class='del'>-		reg = &lt;0x74&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		eeprom@50 {</div><div class='del'>-			compatible = "onsemi,24c64";</div><div class='del'>-			reg = &lt;0x50&gt;;</div><div class='del'>-			read-only;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml<br/>index b3c45c046ba5..e99342f268a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/misc/olpc,xo1.75-ec.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: OLPC XO-1.75 Embedded Controller bindings</div><div class='add'>+title: OLPC XO-1.75 Embedded Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This binding describes the Embedded Controller acting as a SPI bus master</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.txt b/Documentation/devicetree/bindings/misc/qcom,fastrpc.txt<br/>deleted file mode 100644<br/>index 5ec124b138a6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/qcom,fastrpc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/misc/qcom,fastrpc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,88 +0,0 @@</div><div class='del'>-Qualcomm Technologies, Inc. FastRPC Driver</div><div class='del'>-</div><div class='del'>-The FastRPC implements an IPC (Inter-Processor Communication)</div><div class='del'>-mechanism that allows for clients to transparently make remote method</div><div class='del'>-invocations across DSP and APPS boundaries. This enables developers</div><div class='del'>-to offload tasks to the DSP and free up the application processor for</div><div class='del'>-other tasks.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,fastrpc"</div><div class='del'>-</div><div class='del'>-- label</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: should specify the dsp domain name this fastrpc</div><div class='del'>-	corresponds to. must be one of this: "adsp", "mdsp", "sdsp", "cdsp"</div><div class='del'>-</div><div class='del'>-- qcom,non-secure-domain:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;boolean&gt;</div><div class='del'>-	Definition: Property to specify that dsp domain is non-secure.</div><div class='del'>-</div><div class='del'>-- qcom,vmids:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32 array&gt;</div><div class='del'>-	Definition: Virtual machine IDs for remote processor.</div><div class='del'>-</div><div class='del'>-- #address-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Must be 1</div><div class='del'>-</div><div class='del'>-- #size-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Must be 0</div><div class='del'>-</div><div class='del'>-= COMPUTE BANKS</div><div class='del'>-Each subnode of the Fastrpc represents compute context banks available</div><div class='del'>-on the dsp.</div><div class='del'>-- All Compute context banks MUST contain the following properties:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,fastrpc-compute-cb"</div><div class='del'>-</div><div class='del'>-- reg</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Context Bank ID.</div><div class='del'>-</div><div class='del'>-- qcom,nsessions:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Defination: A value indicating how many sessions can share this</div><div class='del'>-		    context bank. Defaults to 1 when this property</div><div class='del'>-		    is not specified.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-adsp-pil {</div><div class='del'>-	compatible = "qcom,msm8996-adsp-pil";</div><div class='del'>-	...</div><div class='del'>-	smd-edge {</div><div class='del'>-		label = "lpass";</div><div class='del'>-		fastrpc {</div><div class='del'>-			compatible = "qcom,fastrpc";</div><div class='del'>-			qcom,smd-channels = "fastrpcsmd-apps-dsp";</div><div class='del'>-			label = "adsp";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			cb@1 {</div><div class='del'>-				compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			cb@2 {</div><div class='del'>-				compatible = "qcom,fastrpc-compute-cb";</div><div class='del'>-				reg = &lt;2&gt;;</div><div class='del'>-			};</div><div class='del'>-			...</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml b/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml<br/>new file mode 100644<br/>index 000000000000..1ab9588cdd89<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/misc/qcom,fastrpc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm FastRPC Driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The FastRPC implements an IPC (Inter-Processor Communication)</div><div class='add'>+  mechanism that allows for clients to transparently make remote method</div><div class='add'>+  invocations across DSP and APPS boundaries. This enables developers</div><div class='add'>+  to offload tasks to the DSP and free up the application processor for</div><div class='add'>+  other tasks.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,fastrpc</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    enum:</div><div class='add'>+      - adsp</div><div class='add'>+      - mdsp</div><div class='add'>+      - sdsp</div><div class='add'>+      - cdsp</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a node describing memory to be used for remote heap CMA.</div><div class='add'>+</div><div class='add'>+  qcom,glink-channels:</div><div class='add'>+    description:</div><div class='add'>+      A list of channels tied to this function, used for matching</div><div class='add'>+      the function to a set of virtual channels.</div><div class='add'>+    $ref: "/schemas/types.yaml#/definitions/string-array"</div><div class='add'>+    items:</div><div class='add'>+      - const: fastrpcglink-apps-dsp</div><div class='add'>+</div><div class='add'>+  qcom,non-secure-domain:</div><div class='add'>+    description:</div><div class='add'>+      Used to mark the current domain as non-secure.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  qcom,smd-channels:</div><div class='add'>+    description:</div><div class='add'>+      Channel name used for the RPM communication</div><div class='add'>+    $ref: "/schemas/types.yaml#/definitions/string-array"</div><div class='add'>+    items:</div><div class='add'>+      - const: fastrpcsmd-apps-dsp</div><div class='add'>+</div><div class='add'>+  qcom,vmids:</div><div class='add'>+    description:</div><div class='add'>+      Virtual machine IDs for remote processor.</div><div class='add'>+    $ref: "/schemas/types.yaml#/definitions/uint32-array"</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "(compute-)?cb@[0-9]*$":</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    description: &gt;</div><div class='add'>+      Each subnode of the Fastrpc represents compute context banks available on the dsp.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,fastrpc-compute-cb</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      iommus:</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 3</div><div class='add'>+</div><div class='add'>+      qcom,nsessions:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        default: 1</div><div class='add'>+        description: &gt;</div><div class='add'>+          A value indicating how many sessions can share this context bank.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - label</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+</div><div class='add'>+    glink-edge {</div><div class='add'>+        interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                                     IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                     IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                        IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+        label = "lpass";</div><div class='add'>+        qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        fastrpc {</div><div class='add'>+            compatible = "qcom,fastrpc";</div><div class='add'>+            qcom,glink-channels = "fastrpcglink-apps-dsp";</div><div class='add'>+            label = "sdsp";</div><div class='add'>+            qcom,non-secure-domain;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            compute-cb@1 {</div><div class='add'>+                compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                iommus = &lt;&amp;apps_smmu 0x0541 0x0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            compute-cb@2 {</div><div class='add'>+                compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                iommus = &lt;&amp;apps_smmu 0x0542 0x0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            compute-cb@3 {</div><div class='add'>+                compatible = "qcom,fastrpc-compute-cb";</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                iommus = &lt;&amp;apps_smmu 0x0543 0x0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.yaml b/Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.yaml<br/>new file mode 100644<br/>index 000000000000..1aebeb696ee0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/misc/qemu,vcpu-stall-detector.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/misc/qemu,vcpu-stall-detector.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: VCPU stall detector</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This binding describes a CPU stall detector mechanism for virtual CPUs</div><div class='add'>+  which is accessed through MMIO.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sebastian Ene &lt;sebastianene@google.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qemu,vcpu-stall-detector</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      The internal clock of the stall detector peripheral measure in Hz used</div><div class='add'>+      to decrement its internal counter register on each tick.</div><div class='add'>+      Defaults to 10 if unset.</div><div class='add'>+    default: 10</div><div class='add'>+</div><div class='add'>+  timeout-sec:</div><div class='add'>+    description: |</div><div class='add'>+      The stall detector expiration timeout measured in seconds.</div><div class='add'>+      Defaults to 8 if unset. Please note that it also takes into account the</div><div class='add'>+      time spent while the VCPU is not running.</div><div class='add'>+    default: 8</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    vmwdt@9030000 {</div><div class='add'>+      compatible = "qemu,vcpu-stall-detector";</div><div class='add'>+      reg = &lt;0x9030000 0x10000&gt;;</div><div class='add'>+      clock-frequency = &lt;10&gt;;</div><div class='add'>+      timeout-sec = &lt;8&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml b/Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml<br/>new file mode 100644<br/>index 000000000000..1b6020e4ec27<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/misc/xlnx,tmr-inject.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx Triple Modular Redundancy(TMR) Inject IP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Appana Durga Kedareswara rao &lt;appana.durga.kedareswara.rao@amd.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Triple Modular Redundancy(TMR) Inject core provides functional fault</div><div class='add'>+  injection by changing selected MicroBlaze instructions, which provides the</div><div class='add'>+  possibility to verify that the TMR subsystem error detection and fault</div><div class='add'>+  recovery logic is working properly.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,tmr-inject-1.0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  xlnx,magic:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 255</div><div class='add'>+    description: |</div><div class='add'>+      Magic number, When configured it allows the controller to perform</div><div class='add'>+      recovery.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - xlnx,magic</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    fault-inject@44a30000 {</div><div class='add'>+        compatible = "xlnx,tmr-inject-1.0";</div><div class='add'>+        reg = &lt;0x44a10000 0x10000&gt;;</div><div class='add'>+        xlnx,magic = &lt;0x46&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml b/Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml<br/>new file mode 100644<br/>index 000000000000..27de12147a52<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx Triple Modular Redundancy(TMR) Manager IP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Appana Durga Kedareswara rao &lt;appana.durga.kedareswara.rao@amd.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Triple Modular Redundancy(TMR) Manager is responsible for handling the</div><div class='add'>+  TMR subsystem state, including fault detection and error recovery. The core</div><div class='add'>+  is triplicated in each of the sub-blocks in the TMR subsystem, and provides</div><div class='add'>+  majority voting of its internal state.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,tmr-manager-1.0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  xlnx,magic1:</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 255</div><div class='add'>+    description:</div><div class='add'>+      Magic byte 1, When configured it allows the controller to perform</div><div class='add'>+      recovery.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - xlnx,magic1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    tmr-manager@44a10000 {</div><div class='add'>+        compatible = "xlnx,tmr-manager-1.0";</div><div class='add'>+        reg = &lt;0x44a10000 0x10000&gt;;</div><div class='add'>+        xlnx,magic1 = &lt;0x46&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml b/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml<br/>index 7803597b6366..0ccd632d5620 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/allwinner,sun4i-a10-mmc.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/allwinner,sun4i-a10-mmc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 MMC Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 MMC Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml<br/>new file mode 100644<br/>index 000000000000..bc403ae9e5d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/amlogic,meson-gx-mmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic SD / eMMC controller for S905/GXBB family SoCs</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MMC 5.1 compliant host controller on Amlogic provides the</div><div class='add'>+  interface for SD, eMMC and SDIO devices</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: amlogic,meson-axg-mmc</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson-gx-mmc</div><div class='add'>+          - const: amlogic,meson-gxbb-mmc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: mmc controller instance</div><div class='add'>+      - description: card detect</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: clkin0</div><div class='add'>+      - const: clkin1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  amlogic,dram-access-quirk:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      set when controller's internal DMA engine cannot access the DRAM memory,</div><div class='add'>+      like on the G12A dedicated SDIO controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    mmc@70000 {</div><div class='add'>+        compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";</div><div class='add'>+        reg = &lt;0x70000 0x2000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 216 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk_mmc&gt;, &lt;&amp;xtal&gt;, &lt;&amp;clk_div&gt;;</div><div class='add'>+        clock-names = "core", "clkin0", "clkin1";</div><div class='add'>+        pinctrl-0 = &lt;&amp;emm_pins&gt;;</div><div class='add'>+        resets = &lt;&amp;reset_mmc&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt<br/>deleted file mode 100644<br/>index ccc5358db131..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-Amlogic SD / eMMC controller for S905/GXBB family SoCs</div><div class='del'>-</div><div class='del'>-The MMC 5.1 compliant host controller on Amlogic provides the</div><div class='del'>-interface for SD, eMMC and SDIO devices.</div><div class='del'>-</div><div class='del'>-This file documents the properties in addition to those available in</div><div class='del'>-the MMC core bindings, documented by mmc.txt.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : contains one of:</div><div class='del'>-  - "amlogic,meson-gx-mmc"</div><div class='del'>-  - "amlogic,meson-gxbb-mmc"</div><div class='del'>-  - "amlogic,meson-gxl-mmc"</div><div class='del'>-  - "amlogic,meson-gxm-mmc"</div><div class='del'>-  - "amlogic,meson-axg-mmc"</div><div class='del'>-- clocks     : A list of phandle + clock-specifier pairs for the clocks listed in clock-names.</div><div class='del'>-- clock-names: Should contain the following:</div><div class='del'>-	"core" - Main peripheral bus clock</div><div class='del'>-	"clkin0" - Parent clock of internal mux</div><div class='del'>-	"clkin1" - Other parent clock of internal mux</div><div class='del'>-  The driver has an internal mux clock which switches between clkin0 and clkin1 depending on the</div><div class='del'>-  clock rate requested by the MMC core.</div><div class='del'>-- resets     : phandle of the internal reset line</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- amlogic,dram-access-quirk: set when controller's internal DMA engine cannot access the</div><div class='del'>-  DRAM memory, like on the G12A dedicated SDIO controller.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	sd_emmc_a: mmc@70000 {</div><div class='del'>-		compatible = "amlogic,meson-gxbb-mmc";</div><div class='del'>-		reg = &lt;0x0 0x70000 0x0 0x2000&gt;;</div><div class='del'>-		interrupts = &lt; GIC_SPI 216 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		clocks = &lt;&amp;clkc CLKID_SD_EMMC_A&gt;, &lt;&amp;xtal&gt;, &lt;&amp;clkc CLKID_FCLK_DIV2&gt;;</div><div class='del'>-		clock-names = "core", "clkin0", "clkin1";</div><div class='del'>-		pinctrl-0 = &lt;&amp;emmc_pins&gt;;</div><div class='del'>-		resets = &lt;&amp;reset RESET_SD_EMMC_A&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml<br/>index 60955acb8e57..1a6cda82f296 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Amlogic Meson SDHC controller Device Tree Bindings</div><div class='add'>+title: Amlogic Meson SDHC controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml b/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml<br/>index 83be9e93d221..a6c19a6cc99e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml</a></div><div class='hunk'>@@ -1,16 +1,16 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/arasan,sdhci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device Tree Bindings for the Arasan SDHCI Controller</div><div class='add'>+title: Arasan SDHCI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Adrian Hunter &lt;adrian.hunter@intel.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml#"</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -27,6 +27,7 @@ allOf:</div><div class='ctx'>             enum:</div><div class='ctx'>               - xlnx,zynqmp-8.9a</div><div class='ctx'>               - xlnx,versal-8.9a</div><div class='add'>+              - xlnx,versal-net-emmc</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clock-output-names:</div><div class='hunk'>@@ -62,6 +63,10 @@ properties:</div><div class='ctx'>         description:</div><div class='ctx'>           For this device it is strongly suggested to include</div><div class='ctx'>           clock-output-names and '#clock-cells'.</div><div class='add'>+      - const: xlnx,versal-net-emmc     # Versal Net eMMC PHY</div><div class='add'>+        description:</div><div class='add'>+          For this device it is strongly suggested to include</div><div class='add'>+          clock-output-names and '#clock-cells'.</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: intel,lgm-sdhci-5.1-emmc     # Intel LGM eMMC PHY</div><div class='ctx'>           - const: arasan,sdhci-5.1</div><div class='hunk'>@@ -88,12 +93,6 @@ properties:</div><div class='ctx'>         description:</div><div class='ctx'>           For this device it is strongly suggested to include</div><div class='ctx'>           arasan,soc-ctl-syscon.</div><div class='del'>-      - items:</div><div class='del'>-          - const: intel,thunderbay-sdhci-5.1   # Intel Thunder Bay eMMC PHY</div><div class='del'>-          - const: arasan,sdhci-5.1</div><div class='del'>-        description:</div><div class='del'>-          For this device it is strongly suggested to include</div><div class='del'>-          clock-output-names and '#clock-cells'.</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -309,22 +308,3 @@ examples:</div><div class='ctx'>                    &lt;&amp;scmi_clk KEEM_BAY_PSS_SD0&gt;;</div><div class='ctx'>           arasan,soc-ctl-syscon = &lt;&amp;sd0_phy_syscon&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    #define EMMC_XIN_CLK</div><div class='del'>-    #define EMMC_AXI_CLK</div><div class='del'>-    #define TBH_PSS_EMMC_RST_N</div><div class='del'>-    mmc@80420000 {</div><div class='del'>-          compatible = "intel,thunderbay-sdhci-5.1", "arasan,sdhci-5.1";</div><div class='del'>-          interrupts = &lt;GIC_SPI 714 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-          reg = &lt;0x80420000 0x400&gt;;</div><div class='del'>-          clocks = &lt;&amp;scmi_clk EMMC_XIN_CLK&gt;,</div><div class='del'>-                   &lt;&amp;scmi_clk EMMC_AXI_CLK&gt;;</div><div class='del'>-          clock-names = "clk_xin", "clk_ahb";</div><div class='del'>-          phys = &lt;&amp;emmc_phy&gt;;</div><div class='del'>-          phy-names = "phy_arasan";</div><div class='del'>-          assigned-clocks = &lt;&amp;scmi_clk EMMC_XIN_CLK&gt;;</div><div class='del'>-          clock-output-names = "emmc_cardclock";</div><div class='del'>-          resets = &lt;&amp;rst_pss1 TBH_PSS_EMMC_RST_N&gt;;</div><div class='del'>-          #clock-cells = &lt;0x0&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml b/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml<br/>index 1e69a5a42439..1c96da04f0e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/arm,pl18x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/arm,pl18x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/arm,pl18x.yaml</a></div><div class='hunk'>@@ -95,7 +95,9 @@ properties:</div><div class='ctx'>       PIO (polled I/O) interrupt and occurs when the FIFO needs to be</div><div class='ctx'>       emptied as part of a bulk read from the card. Some variants have these</div><div class='ctx'>       two interrupts wired into the same line (logic OR) and in that case</div><div class='del'>-      only one interrupt may be provided.</div><div class='add'>+      only one interrupt may be provided. The interrupt-names property is</div><div class='add'>+      not used due to inconsistency of existing DTs regarding its content.</div><div class='add'>+    deprecated: false</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml<br/>index 987b287f3bff..9fce8cd7b0b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml</a></div><div class='hunk'>@@ -42,6 +42,7 @@ patternProperties:</div><div class='ctx'>   "^sdhci@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: mmc-controller.yaml</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml<br/>index dccd5ad96981..c028039bc477 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml</a></div><div class='hunk'>@@ -4,15 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BRCMSTB/BMIPS SDHCI Controller binding</div><div class='add'>+title: Broadcom BRCMSTB/BMIPS SDHCI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Al Cooper &lt;alcooperx@gmail.com&gt;</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: mmc-controller.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -31,7 +28,7 @@ properties:</div><div class='ctx'>           - const: brcm,sdhci-brcmstb</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -42,45 +39,72 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description:</div><div class='del'>-      handle to core clock for the sdhci controller.</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: handle to core clock for the sdhci controller</div><div class='add'>+      - description: handle to improved 150Mhz clock for sdhci controller (Optional clock)</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: sw_sdio</div><div class='add'>+      - const: sdio_freq # Optional clock</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description:</div><div class='add'>+      Maximum operating frequency of sdio_freq sdhci controller clock</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 100000000</div><div class='add'>+    maximum: 150000000</div><div class='ctx'> </div><div class='ctx'>   sdhci,auto-cmd12:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description: Specifies that controller should use auto CMD12</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          contains:</div><div class='add'>+            const: sdio_freq</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clock-frequency</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - clocks</div><div class='add'>+  - clock-names</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     mmc@84b0000 {</div><div class='del'>-      sd-uhs-sdr50;</div><div class='del'>-      sd-uhs-ddr50;</div><div class='del'>-      sd-uhs-sdr104;</div><div class='del'>-      sdhci,auto-cmd12;</div><div class='ctx'>       compatible = "brcm,bcm7216-sdhci",</div><div class='ctx'>                    "brcm,bcm7445-sdhci",</div><div class='ctx'>                    "brcm,sdhci-brcmstb";</div><div class='ctx'>       reg = &lt;0x84b0000 0x260&gt;, &lt;0x84b0300 0x200&gt;;</div><div class='ctx'>       reg-names = "host", "cfg";</div><div class='add'>+      sd-uhs-sdr50;</div><div class='add'>+      sd-uhs-ddr50;</div><div class='add'>+      sd-uhs-sdr104;</div><div class='add'>+      sdhci,auto-cmd12;</div><div class='ctx'>       interrupts = &lt;0x0 0x26 0x4&gt;;</div><div class='del'>-      interrupt-names = "sdio0_0";</div><div class='ctx'>       clocks = &lt;&amp;scmi_clk 245&gt;;</div><div class='ctx'>       clock-names = "sw_sdio";</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     mmc@84b1000 {</div><div class='add'>+      compatible = "brcm,bcm7216-sdhci",</div><div class='add'>+                   "brcm,bcm7445-sdhci",</div><div class='add'>+                   "brcm,sdhci-brcmstb";</div><div class='add'>+      reg = &lt;0x84b1000 0x260&gt;, &lt;0x84b1300 0x200&gt;;</div><div class='add'>+      reg-names = "host", "cfg";</div><div class='ctx'>       mmc-ddr-1_8v;</div><div class='ctx'>       mmc-hs200-1_8v;</div><div class='ctx'>       mmc-hs400-1_8v;</div><div class='hunk'>@@ -88,13 +112,7 @@ examples:</div><div class='ctx'>       supports-cqe;</div><div class='ctx'>       non-removable;</div><div class='ctx'>       bus-width = &lt;0x8&gt;;</div><div class='del'>-      compatible = "brcm,bcm7216-sdhci",</div><div class='del'>-           "brcm,bcm7445-sdhci",</div><div class='del'>-            "brcm,sdhci-brcmstb";</div><div class='del'>-      reg = &lt;0x84b1000 0x260&gt;, &lt;0x84b1300 0x200&gt;;</div><div class='del'>-      reg-names = "host", "cfg";</div><div class='ctx'>       interrupts = &lt;0x0 0x27 0x4&gt;;</div><div class='del'>-      interrupt-names = "sdio1_0";</div><div class='ctx'>       clocks = &lt;&amp;scmi_clk 245&gt;;</div><div class='ctx'>       clock-names = "sw_sdio";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml<br/>index 4207fed62dfe..6c40611405a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml</a></div><div class='hunk'>@@ -8,21 +8,19 @@ title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;</div><div class='del'>-  - Piotr Sroka &lt;piotrs@cadence.com&gt;</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - amd,pensando-elba-sd4hc</div><div class='ctx'>           - microchip,mpfs-sd4hc</div><div class='ctx'>           - socionext,uniphier-sd4hc</div><div class='ctx'>       - const: cdns,sd4hc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -30,6 +28,9 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   # PHY DLL input delays:</div><div class='ctx'>   # They are used to delay the data valid window, and align the window to</div><div class='ctx'>   # sampling clock. The delay starts from 5ns (for delay parameter equal to 0)</div><div class='hunk'>@@ -37,43 +38,43 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cdns,phy-input-delay-sd-highspeed:</div><div class='ctx'>     description: Value of the delay in the input path for SD high-speed timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   cdns,phy-input-delay-legacy:</div><div class='ctx'>     description: Value of the delay in the input path for legacy timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   cdns,phy-input-delay-sd-uhs-sdr12:</div><div class='ctx'>     description: Value of the delay in the input path for SD UHS SDR12 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   cdns,phy-input-delay-sd-uhs-sdr25:</div><div class='ctx'>     description: Value of the delay in the input path for SD UHS SDR25 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   cdns,phy-input-delay-sd-uhs-sdr50:</div><div class='ctx'>     description: Value of the delay in the input path for SD UHS SDR50 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   cdns,phy-input-delay-sd-uhs-ddr50:</div><div class='ctx'>     description: Value of the delay in the input path for SD UHS DDR50 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   cdns,phy-input-delay-mmc-highspeed:</div><div class='ctx'>     description: Value of the delay in the input path for MMC high-speed timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='hunk'>@@ -84,7 +85,7 @@ properties:</div><div class='ctx'>   # Each delay property represents the fraction of the clock period.</div><div class='ctx'>   # The approximate delay value will be</div><div class='ctx'>   # (&lt;delay property value&gt;/128)*sdmclk_clock_period.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='hunk'>@@ -92,7 +93,7 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       Value of the delay introduced on the sdclk output for all modes except</div><div class='ctx'>       HS200, HS400 and HS400_ES.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x7f</div><div class='ctx'> </div><div class='hunk'>@@ -100,7 +101,7 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       Value of the delay introduced on the sdclk output for HS200, HS400 and</div><div class='ctx'>       HS400_ES speed modes.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x7f</div><div class='ctx'> </div><div class='hunk'>@@ -108,7 +109,7 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       Value of the delay introduced on the dat_strobe input used in</div><div class='ctx'>       HS400 / HS400_ES speed modes.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x7f</div><div class='ctx'> </div><div class='hunk'>@@ -118,6 +119,26 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: amd,pensando-elba-sd4hc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Host controller registers</div><div class='add'>+            - description: Elba byte-lane enable register for writes</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt<br/>deleted file mode 100644<br/>index 753e9d7d8956..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/exynos-dw-mshc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,94 +0,0 @@</div><div class='del'>-* Samsung Exynos specific extensions to the Synopsys Designware Mobile</div><div class='del'>-  Storage Host Controller</div><div class='del'>-</div><div class='del'>-The Synopsys designware mobile storage host controller is used to interface</div><div class='del'>-a SoC with storage medium such as eMMC or SD/MMC cards. This file documents</div><div class='del'>-differences between the core Synopsys dw mshc controller properties described</div><div class='del'>-by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific</div><div class='del'>-extensions to the Synopsys Designware Mobile Storage Host Controller.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-* compatible: should be</div><div class='del'>-	- "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210</div><div class='del'>-	  specific extensions.</div><div class='del'>-	- "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412</div><div class='del'>-	  specific extensions.</div><div class='del'>-	- "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250</div><div class='del'>-	  specific extensions.</div><div class='del'>-	- "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420</div><div class='del'>-	  specific extensions.</div><div class='del'>-	- "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7</div><div class='del'>-	  specific extensions.</div><div class='del'>-	- "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7</div><div class='del'>-	  specific extensions having an SMU.</div><div class='del'>-	- "axis,artpec8-dw-mshc": for controllers with ARTPEC-8 specific</div><div class='del'>-	  extensions.</div><div class='del'>-</div><div class='del'>-* samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface</div><div class='del'>-  unit (ciu) clock. This property is applicable only for Exynos5 SoC's and</div><div class='del'>-  ignored for Exynos4 SoC's. The valid range of divider value is 0 to 7.</div><div class='del'>-</div><div class='del'>-* samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value</div><div class='del'>-  in transmit mode and CIU clock phase shift value in receive mode for single</div><div class='del'>-  data rate mode operation. Refer notes below for the order of the cells and the</div><div class='del'>-  valid values.</div><div class='del'>-</div><div class='del'>-* samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value</div><div class='del'>-  in transmit mode and CIU clock phase shift value in receive mode for double</div><div class='del'>-  data rate mode operation. Refer notes below for the order of the cells and the</div><div class='del'>-  valid values.</div><div class='del'>-* samsung,dw-mshc-hs400-timing: Specifies the value of CIU TX and RX clock phase</div><div class='del'>-  shift value for hs400 mode operation.</div><div class='del'>-</div><div class='del'>-  Notes for the sdr-timing and ddr-timing values:</div><div class='del'>-</div><div class='del'>-    The order of the cells should be</div><div class='del'>-      - First Cell: CIU clock phase shift value for tx mode.</div><div class='del'>-      - Second Cell: CIU clock phase shift value for rx mode.</div><div class='del'>-</div><div class='del'>-    Valid values for SDR and DDR CIU clock timing for Exynos5250:</div><div class='del'>-      - valid value for tx phase shift and rx phase shift is 0 to 7.</div><div class='del'>-      - when CIU clock divider value is set to 3, all possible 8 phase shift</div><div class='del'>-        values can be used.</div><div class='del'>-      - if CIU clock divider value is 0 (that is divide by 1), both tx and rx</div><div class='del'>-        phase shift clocks should be 0.</div><div class='del'>-</div><div class='del'>-* samsung,read-strobe-delay: RCLK (Data strobe) delay to control HS400 mode</div><div class='del'>-  (Latency value for delay line in Read path)</div><div class='del'>-</div><div class='del'>-Required properties for a slot (Deprecated - Recommend to use one slot per host):</div><div class='del'>-</div><div class='del'>-* gpios: specifies a list of gpios used for command, clock and data bus. The</div><div class='del'>-  first gpio is the command line and the second gpio is the clock line. The</div><div class='del'>-  rest of the gpios (depending on the bus-width property) are the data lines in</div><div class='del'>-  no particular order. The format of the gpio specifier depends on the gpio</div><div class='del'>-  controller.</div><div class='del'>-(Deprecated - Refer to Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-  The MSHC controller node can be split into two portions, SoC specific and</div><div class='del'>-  board specific portions as listed below.</div><div class='del'>-</div><div class='del'>-	dwmmc0@12200000 {</div><div class='del'>-		compatible = "samsung,exynos5250-dw-mshc";</div><div class='del'>-		reg = &lt;0x12200000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 75 0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dwmmc0@12200000 {</div><div class='del'>-		cap-mmc-highspeed;</div><div class='del'>-		cap-sd-highspeed;</div><div class='del'>-		broken-cd;</div><div class='del'>-		fifo-depth = &lt;0x80&gt;;</div><div class='del'>-		card-detect-delay = &lt;200&gt;;</div><div class='del'>-		samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='del'>-		samsung,dw-mshc-sdr-timing = &lt;2 3&gt;;</div><div class='del'>-		samsung,dw-mshc-ddr-timing = &lt;1 2&gt;;</div><div class='del'>-		samsung,dw-mshc-hs400-timing = &lt;0 2&gt;;</div><div class='del'>-		samsung,read-strobe-delay = &lt;90&gt;;</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml<br/>index 7dbbcae9485c..fbfd822b9270 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: sdhci-common.yaml#</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Enhanced Secure Digital Host Controller on Freescale i.MX family</div><div class='hunk'>@@ -29,27 +29,66 @@ properties:</div><div class='ctx'>           - fsl,imx53-esdhc</div><div class='ctx'>           - fsl,imx6q-usdhc</div><div class='ctx'>           - fsl,imx6sl-usdhc</div><div class='del'>-          - fsl,imx6sll-usdhc</div><div class='ctx'>           - fsl,imx6sx-usdhc</div><div class='del'>-          - fsl,imx6ull-usdhc</div><div class='ctx'>           - fsl,imx7d-usdhc</div><div class='ctx'>           - fsl,imx7ulp-usdhc</div><div class='add'>+          - fsl,imx8mm-usdhc</div><div class='ctx'>           - fsl,imxrt1050-usdhc</div><div class='ctx'>           - nxp,s32g2-usdhc</div><div class='ctx'>       - items:</div><div class='add'>+          - const: fsl,imx50-esdhc</div><div class='add'>+          - const: fsl,imx53-esdhc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6sll-usdhc</div><div class='add'>+              - fsl,imx6ull-usdhc</div><div class='add'>+          - const: fsl,imx6sx-usdhc</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx7d-usdhc</div><div class='add'>+          - const: fsl,imx6sl-usdhc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mq-usdhc</div><div class='add'>+          - const: fsl,imx7d-usdhc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mn-usdhc</div><div class='add'>+              - fsl,imx8mp-usdhc</div><div class='add'>+              - fsl,imx93-usdhc</div><div class='add'>+              - fsl,imx8ulp-usdhc</div><div class='add'>+          - const: fsl,imx8mm-usdhc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8dxl-usdhc</div><div class='add'>+              - fsl,imx8qm-usdhc</div><div class='add'>+          - const: fsl,imx8qxp-usdhc</div><div class='add'>+      - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx8mm-usdhc</div><div class='ctx'>               - fsl,imx8mn-usdhc</div><div class='ctx'>               - fsl,imx8mp-usdhc</div><div class='del'>-              - fsl,imx8mq-usdhc</div><div class='ctx'>               - fsl,imx8qm-usdhc</div><div class='ctx'>               - fsl,imx8qxp-usdhc</div><div class='ctx'>           - const: fsl,imx7d-usdhc</div><div class='add'>+        deprecated: true</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - fsl,imx93-usdhc</div><div class='del'>-              - fsl,imx8ulp-usdhc</div><div class='add'>+              - fsl,imx8mn-usdhc</div><div class='add'>+              - fsl,imx8mp-usdhc</div><div class='ctx'>           - const: fsl,imx8mm-usdhc</div><div class='add'>+          - const: fsl,imx7d-usdhc</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8dxl-usdhc</div><div class='add'>+              - fsl,imx8qm-usdhc</div><div class='add'>+          - const: fsl,imx8qxp-usdhc</div><div class='add'>+          - const: fsl,imx7d-usdhc</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imxrt1170-usdhc</div><div class='add'>+          - const: fsl,imxrt1050-usdhc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -68,12 +107,12 @@ properties:</div><div class='ctx'>       Specify the number of delay cells for override mode.</div><div class='ctx'>       This is used to set the clock delay for DLL(Delay Line) on override mode</div><div class='ctx'>       to select a proper data sampling window in case the clock quality is not good</div><div class='del'>-      due to signal path is too long on the board. Please refer to eSDHC/uSDHC</div><div class='add'>+      because the signal path is too long on the board. Please refer to eSDHC/uSDHC</div><div class='ctx'>       chapter, DLL (Delay Line) section in RM for details.</div><div class='ctx'>     default: 0</div><div class='ctx'> </div><div class='ctx'>   voltage-ranges:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'>     description: |</div><div class='ctx'>       Specify the voltage range in case there are software transparent level</div><div class='ctx'>       shifters on the outputs of the controller. Two cells are required, first</div><div class='hunk'>@@ -97,7 +136,7 @@ properties:</div><div class='ctx'>       Specify the increasing delay cell steps in tuning procedure.</div><div class='ctx'>       The uSDHC use one delay cell as default increasing step to do tuning process.</div><div class='ctx'>       This property allows user to change the tuning step to more than one delay</div><div class='del'>-      cells which is useful for some special boards or cards when the default</div><div class='add'>+      cell which is useful for some special boards or cards when the default</div><div class='ctx'>       tuning step can't find the proper delay window within limited tuning retries.</div><div class='ctx'>     default: 0</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml<br/>index ffa162722b8e..221f5bc047bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Markus Pargmann &lt;mpa@pengutronix.de&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/fujitsu,sdhci-fujitsu.yaml b/Documentation/devicetree/bindings/mmc/fujitsu,sdhci-fujitsu.yaml<br/>new file mode 100644<br/>index 000000000000..430b62899397<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/fujitsu,sdhci-fujitsu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/fujitsu,sdhci-fujitsu.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/fujitsu,sdhci-fujitsu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Fujitsu/Socionext SDHCI controller (F_SDH30)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: socionext,synquacer-sdhci</div><div class='add'>+          - const: fujitsu,mb86s70-sdhci-3.0</div><div class='add'>+      - enum:</div><div class='add'>+          - fujitsu,mb86s70-sdhci-3.0</div><div class='add'>+          - socionext,f-sdh30-e51-mmc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fujitsu,cmd-dat-delay-select:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      Indicating that this host requires the CMD_DAT_DELAY control to be enabled</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sdhci1: mmc@36600000 {</div><div class='add'>+        compatible = "fujitsu,mb86s70-sdhci-3.0";</div><div class='add'>+        reg = &lt;0x36600000 0x1000&gt;;</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        vqmmc-supply = &lt;&amp;vccq_sdhci1&gt;;</div><div class='add'>+        clocks = &lt;&amp;clock 2 2 0&gt;, &lt;&amp;clock 2 3 0&gt;;</div><div class='add'>+        clock-names = "iface", "core";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml b/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml<br/>index 2d10aedf2e00..bb4e0be0c893 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/ingenic,mmc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs MMC Controller DT bindings</div><div class='add'>+title: Ingenic SoCs MMC Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/marvell,dove-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,dove-sdhci.yaml<br/>new file mode 100644<br/>index 000000000000..7c9c652ad59c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/marvell,dove-sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/marvell,dove-sdhci.yaml</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/marvell,dove-sdhci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell sdhci-dove controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Adrian Hunter &lt;adrian.hunter@intel.com&gt;</div><div class='add'>+  - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,dove-sdhci</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sdio0: mmc@92000 {</div><div class='add'>+      compatible = "marvell,dove-sdhci";</div><div class='add'>+      reg = &lt;0x92000 0x100&gt;;</div><div class='add'>+      interrupts = &lt;35&gt;;</div><div class='add'>+      clocks = &lt;&amp;gate_clk 9&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/marvell,orion-sdio.yaml b/Documentation/devicetree/bindings/mmc/marvell,orion-sdio.yaml<br/>new file mode 100644<br/>index 000000000000..8a97ded15aed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/marvell,orion-sdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/marvell,orion-sdio.yaml</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/marvell,orion-sdio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell orion-sdio controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nicolas Pitre &lt;nico@fluxnic.net&gt;</div><div class='add'>+  - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,orion-sdio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mmc@d00d4000 {</div><div class='add'>+      compatible = "marvell,orion-sdio";</div><div class='add'>+      reg = &lt;0xd00d4000 0x200&gt;;</div><div class='add'>+      interrupts = &lt;54&gt;;</div><div class='add'>+      clocks = &lt;&amp;gateclk 17&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt<br/>deleted file mode 100644<br/>index c51a62d751dc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,173 +0,0 @@</div><div class='del'>-Marvell Xenon SDHCI Controller device tree bindings</div><div class='del'>-This file documents differences between the core mmc properties</div><div class='del'>-described by mmc.txt and the properties used by the Xenon implementation.</div><div class='del'>-</div><div class='del'>-Multiple SDHCs might be put into a single Xenon IP, to save size and cost.</div><div class='del'>-Each SDHC is independent and owns independent resources, such as register sets,</div><div class='del'>-clock and PHY.</div><div class='del'>-Each SDHC should have an independent device tree node.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: should be one of the following</div><div class='del'>-  - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.</div><div class='del'>-  Must provide a second register area and marvell,pad-type.</div><div class='del'>-  - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.</div><div class='del'>-  - "marvell,armada-ap807-sdhci": For controllers on Armada AP807.</div><div class='del'>-  - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-  Array of clocks required for SDHC.</div><div class='del'>-  Require at least input clock for Xenon IP core. For Armada AP806 and</div><div class='del'>-  CP110, the AXI clock is also mandatory.</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-  Array of names corresponding to clocks property.</div><div class='del'>-  The input clock for Xenon IP core should be named as "core".</div><div class='del'>-  The input clock for the AXI bus must be named as "axi".</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-  * For "marvell,armada-3700-sdhci", two register areas.</div><div class='del'>-    The first one for Xenon IP register. The second one for the Armada 3700 SoC</div><div class='del'>-    PHY PAD Voltage Control register.</div><div class='del'>-    Please follow the examples with compatible "marvell,armada-3700-sdhci"</div><div class='del'>-    in below.</div><div class='del'>-    Please also check property marvell,pad-type in below.</div><div class='del'>-</div><div class='del'>-  * For other compatible strings, one register area for Xenon IP.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- marvell,xenon-sdhc-id:</div><div class='del'>-  Indicate the corresponding bit index of current SDHC in</div><div class='del'>-  SDHC System Operation Control Register Bit[7:0].</div><div class='del'>-  Set/clear the corresponding bit to enable/disable current SDHC.</div><div class='del'>-  If Xenon IP contains only one SDHC, this property is optional.</div><div class='del'>-</div><div class='del'>-- marvell,xenon-phy-type:</div><div class='del'>-  Xenon support multiple types of PHYs.</div><div class='del'>-  To select eMMC 5.1 PHY, set:</div><div class='del'>-  marvell,xenon-phy-type = "emmc 5.1 phy"</div><div class='del'>-  eMMC 5.1 PHY is the default choice if this property is not provided.</div><div class='del'>-  To select eMMC 5.0 PHY, set:</div><div class='del'>-  marvell,xenon-phy-type = "emmc 5.0 phy"</div><div class='del'>-</div><div class='del'>-  All those types of PHYs can support eMMC, SD and SDIO.</div><div class='del'>-  Please note that this property only presents the type of PHY.</div><div class='del'>-  It doesn't stand for the entire SDHC type or property.</div><div class='del'>-  For example, "emmc 5.1 phy" doesn't mean that this Xenon SDHC only</div><div class='del'>-  supports eMMC 5.1.</div><div class='del'>-</div><div class='del'>-- marvell,xenon-phy-znr:</div><div class='del'>-  Set PHY ZNR value.</div><div class='del'>-  Only available for eMMC PHY.</div><div class='del'>-  Valid range = [0:0x1F].</div><div class='del'>-  ZNR is set as 0xF by default if this property is not provided.</div><div class='del'>-</div><div class='del'>-- marvell,xenon-phy-zpr:</div><div class='del'>-  Set PHY ZPR value.</div><div class='del'>-  Only available for eMMC PHY.</div><div class='del'>-  Valid range = [0:0x1F].</div><div class='del'>-  ZPR is set as 0xF by default if this property is not provided.</div><div class='del'>-</div><div class='del'>-- marvell,xenon-phy-nr-success-tun:</div><div class='del'>-  Set the number of required consecutive successful sampling points</div><div class='del'>-  used to identify a valid sampling window, in tuning process.</div><div class='del'>-  Valid range = [1:7].</div><div class='del'>-  Set as 0x4 by default if this property is not provided.</div><div class='del'>-</div><div class='del'>-- marvell,xenon-phy-tun-step-divider:</div><div class='del'>-  Set the divider for calculating TUN_STEP.</div><div class='del'>-  Set as 64 by default if this property is not provided.</div><div class='del'>-</div><div class='del'>-- marvell,xenon-phy-slow-mode:</div><div class='del'>-  If this property is selected, transfers will bypass PHY.</div><div class='del'>-  Only available when bus frequency lower than 55MHz in SDR mode.</div><div class='del'>-  Disabled by default. Please only try this property if timing issues</div><div class='del'>-  always occur with PHY enabled in eMMC HS SDR, SD SDR12, SD SDR25,</div><div class='del'>-  SD Default Speed and HS mode and eMMC legacy speed mode.</div><div class='del'>-</div><div class='del'>-- marvell,xenon-tun-count:</div><div class='del'>-  Xenon SDHC SoC usually doesn't provide re-tuning counter in</div><div class='del'>-  Capabilities Register 3 Bit[11:8].</div><div class='del'>-  This property provides the re-tuning counter.</div><div class='del'>-  If this property is not set, default re-tuning counter will</div><div class='del'>-  be set as 0x9 in driver.</div><div class='del'>-</div><div class='del'>-- marvell,pad-type:</div><div class='del'>-  Type of Armada 3700 SoC PHY PAD Voltage Controller register.</div><div class='del'>-  Only valid when "marvell,armada-3700-sdhci" is selected.</div><div class='del'>-  Two types: "sd" and "fixed-1-8v".</div><div class='del'>-  If "sd" is selected, SoC PHY PAD is set as 3.3V at the beginning and is</div><div class='del'>-  switched to 1.8V when later in higher speed mode.</div><div class='del'>-  If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for eMMC.</div><div class='del'>-  Please follow the examples with compatible "marvell,armada-3700-sdhci"</div><div class='del'>-  in below.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-- For eMMC:</div><div class='del'>-</div><div class='del'>-	sdhci@aa0000 {</div><div class='del'>-		compatible = "marvell,armada-ap806-sdhci";</div><div class='del'>-		reg = &lt;0xaa0000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;</div><div class='del'>-		clocks = &lt;&amp;emmc_clk&gt;,&lt;&amp;axi_clk&gt;;</div><div class='del'>-		clock-names = "core", "axi";</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		marvell,xenon-phy-slow-mode;</div><div class='del'>-		marvell,xenon-tun-count = &lt;11&gt;;</div><div class='del'>-		non-removable;</div><div class='del'>-		no-sd;</div><div class='del'>-		no-sdio;</div><div class='del'>-</div><div class='del'>-		/* Vmmc and Vqmmc are both fixed */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- For SD/SDIO:</div><div class='del'>-</div><div class='del'>-	sdhci@ab0000 {</div><div class='del'>-		compatible = "marvell,armada-cp110-sdhci";</div><div class='del'>-		reg = &lt;0xab0000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;</div><div class='del'>-		vqmmc-supply = &lt;&amp;sd_vqmmc_regulator&gt;;</div><div class='del'>-		vmmc-supply = &lt;&amp;sd_vmmc_regulator&gt;;</div><div class='del'>-		clocks = &lt;&amp;sdclk&gt;, &lt;&amp;axi_clk&gt;;</div><div class='del'>-		clock-names = "core", "axi";</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		marvell,xenon-tun-count = &lt;9&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- For eMMC with compatible "marvell,armada-3700-sdhci":</div><div class='del'>-</div><div class='del'>-	sdhci@aa0000 {</div><div class='del'>-		compatible = "marvell,armada-3700-sdhci";</div><div class='del'>-		reg = &lt;0xaa0000 0x1000&gt;,</div><div class='del'>-		      &lt;phy_addr 0x4&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;</div><div class='del'>-		clocks = &lt;&amp;emmcclk&gt;;</div><div class='del'>-		clock-names = "core";</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		mmc-ddr-1_8v;</div><div class='del'>-		mmc-hs400-1_8v;</div><div class='del'>-		non-removable;</div><div class='del'>-		no-sd;</div><div class='del'>-		no-sdio;</div><div class='del'>-</div><div class='del'>-		/* Vmmc and Vqmmc are both fixed */</div><div class='del'>-</div><div class='del'>-		marvell,pad-type = "fixed-1-8v";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- For SD/SDIO with compatible "marvell,armada-3700-sdhci":</div><div class='del'>-</div><div class='del'>-	sdhci@ab0000 {</div><div class='del'>-		compatible = "marvell,armada-3700-sdhci";</div><div class='del'>-		reg = &lt;0xab0000 0x1000&gt;,</div><div class='del'>-		      &lt;phy_addr 0x4&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;</div><div class='del'>-		vqmmc-supply = &lt;&amp;sd_regulator&gt;;</div><div class='del'>-		/* Vmmc is fixed */</div><div class='del'>-		clocks = &lt;&amp;sdclk&gt;;</div><div class='del'>-		clock-names = "core";</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		marvell,pad-type = "sd";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml b/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml<br/>new file mode 100644<br/>index 000000000000..3ee758886558<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml</a></div><div class='hunk'>@@ -0,0 +1,277 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Xenon SDHCI Controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This file documents differences between the core MMC properties described by</div><div class='add'>+  mmc-controller.yaml and the properties used by the Xenon implementation.</div><div class='add'>+</div><div class='add'>+  Multiple SDHCs might be put into a single Xenon IP, to save size and cost.</div><div class='add'>+  Each SDHC is independent and owns independent resources, such as register</div><div class='add'>+  sets, clock and PHY.</div><div class='add'>+</div><div class='add'>+  Each SDHC should have an independent device tree node.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - marvell,armada-cp110-sdhci</div><div class='add'>+          - marvell,armada-ap806-sdhci</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: marvell,armada-ap807-sdhci</div><div class='add'>+          - const: marvell,armada-ap806-sdhci</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: marvell,armada-3700-sdhci</div><div class='add'>+          - const: marvell,sdhci-xenon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description: |</div><div class='add'>+      For "marvell,armada-3700-sdhci", two register areas.  The first one</div><div class='add'>+      for Xenon IP register. The second one for the Armada 3700 SoC PHY PAD</div><div class='add'>+      Voltage Control register.  Please follow the examples with compatible</div><div class='add'>+      "marvell,armada-3700-sdhci" in below.</div><div class='add'>+      Please also check property marvell,pad-type in below.</div><div class='add'>+</div><div class='add'>+      For other compatible strings, one register area for Xenon IP.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: axi</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  marvell,xenon-sdhc-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 7</div><div class='add'>+    description: |</div><div class='add'>+      Indicate the corresponding bit index of current SDHC in SDHC System</div><div class='add'>+      Operation Control Register Bit[7:0].  Set/clear the corresponding bit to</div><div class='add'>+      enable/disable current SDHC.</div><div class='add'>+</div><div class='add'>+  marvell,xenon-phy-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - "emmc 5.1 phy"</div><div class='add'>+      - "emmc 5.0 phy"</div><div class='add'>+    description: |</div><div class='add'>+      Xenon support multiple types of PHYs. To select eMMC 5.1 PHY, set:</div><div class='add'>+      marvell,xenon-phy-type = "emmc 5.1 phy" eMMC 5.1 PHY is the default</div><div class='add'>+      choice if this property is not provided.  To select eMMC 5.0 PHY, set:</div><div class='add'>+      marvell,xenon-phy-type = "emmc 5.0 phy"</div><div class='add'>+</div><div class='add'>+      All those types of PHYs can support eMMC, SD and SDIO. Please note that</div><div class='add'>+      this property only presents the type of PHY.  It doesn't stand for the</div><div class='add'>+      entire SDHC type or property.  For example, "emmc 5.1 phy" doesn't mean</div><div class='add'>+      that this Xenon SDHC only supports eMMC 5.1.</div><div class='add'>+</div><div class='add'>+  marvell,xenon-phy-znr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 0x1f</div><div class='add'>+    default: 0xf</div><div class='add'>+    description: |</div><div class='add'>+      Set PHY ZNR value.</div><div class='add'>+      Only available for eMMC PHY.</div><div class='add'>+</div><div class='add'>+  marvell,xenon-phy-zpr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 0x1f</div><div class='add'>+    default: 0xf</div><div class='add'>+    description: |</div><div class='add'>+      Set PHY ZPR value.</div><div class='add'>+      Only available for eMMC PHY.</div><div class='add'>+</div><div class='add'>+  marvell,xenon-phy-nr-success-tun:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 7</div><div class='add'>+    default: 0x4</div><div class='add'>+    description: |</div><div class='add'>+      Set the number of required consecutive successful sampling points</div><div class='add'>+      used to identify a valid sampling window, in tuning process.</div><div class='add'>+</div><div class='add'>+  marvell,xenon-phy-tun-step-divider:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 64</div><div class='add'>+    description: |</div><div class='add'>+      Set the divider for calculating TUN_STEP.</div><div class='add'>+</div><div class='add'>+  marvell,xenon-phy-slow-mode:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      If this property is selected, transfers will bypass PHY.</div><div class='add'>+      Only available when bus frequency lower than 55MHz in SDR mode.</div><div class='add'>+      Disabled by default. Please only try this property if timing issues</div><div class='add'>+      always occur with PHY enabled in eMMC HS SDR, SD SDR12, SD SDR25,</div><div class='add'>+      SD Default Speed and HS mode and eMMC legacy speed mode.</div><div class='add'>+</div><div class='add'>+  marvell,xenon-tun-count:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0x9</div><div class='add'>+    description: |</div><div class='add'>+      Xenon SDHC SoC usually doesn't provide re-tuning counter in</div><div class='add'>+      Capabilities Register 3 Bit[11:8].</div><div class='add'>+      This property provides the re-tuning counter.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: marvell,armada-3700-sdhci</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Xenon IP registers</div><div class='add'>+            - description: Armada 3700 SoC PHY PAD Voltage Control register</div><div class='add'>+</div><div class='add'>+        marvell,pad-type:</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+          enum:</div><div class='add'>+            - sd</div><div class='add'>+            - fixed-1-8v</div><div class='add'>+          description: |</div><div class='add'>+            Type of Armada 3700 SoC PHY PAD Voltage Controller register.</div><div class='add'>+            If "sd" is selected, SoC PHY PAD is set as 3.3V at the beginning</div><div class='add'>+            and is switched to 1.8V when later in higher speed mode.</div><div class='add'>+            If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for</div><div class='add'>+            eMMC.</div><div class='add'>+            Please follow the examples with compatible</div><div class='add'>+            "marvell,armada-3700-sdhci" in below.</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - marvell,pad-type</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - marvell,armada-cp110-sdhci</div><div class='add'>+              - marvell,armada-ap807-sdhci</div><div class='add'>+              - marvell,armada-ap806-sdhci</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+            - const: axi</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // For eMMC</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    mmc@aa0000 {</div><div class='add'>+      compatible = "marvell,armada-ap807-sdhci", "marvell,armada-ap806-sdhci";</div><div class='add'>+      reg = &lt;0xaa0000 0x1000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;emmc_clk 0&gt;, &lt;&amp;axi_clk 0&gt;;</div><div class='add'>+      clock-names = "core", "axi";</div><div class='add'>+      bus-width = &lt;4&gt;;</div><div class='add'>+      marvell,xenon-phy-slow-mode;</div><div class='add'>+      marvell,xenon-tun-count = &lt;11&gt;;</div><div class='add'>+      non-removable;</div><div class='add'>+      no-sd;</div><div class='add'>+      no-sdio;</div><div class='add'>+</div><div class='add'>+      /* Vmmc and Vqmmc are both fixed */</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // For SD/SDIO</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    mmc@ab0000 {</div><div class='add'>+      compatible = "marvell,armada-cp110-sdhci";</div><div class='add'>+      reg = &lt;0xab0000 0x1000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      vqmmc-supply = &lt;&amp;sd_vqmmc_regulator&gt;;</div><div class='add'>+      vmmc-supply = &lt;&amp;sd_vmmc_regulator&gt;;</div><div class='add'>+      clocks = &lt;&amp;sdclk 0&gt;, &lt;&amp;axi_clk 0&gt;;</div><div class='add'>+      clock-names = "core", "axi";</div><div class='add'>+      bus-width = &lt;4&gt;;</div><div class='add'>+      marvell,xenon-tun-count = &lt;9&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // For eMMC with compatible "marvell,armada-3700-sdhci":</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    mmc@aa0000 {</div><div class='add'>+      compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon";</div><div class='add'>+      reg = &lt;0xaa0000 0x1000&gt;,</div><div class='add'>+            &lt;0x17808 0x4&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;emmcclk 0&gt;;</div><div class='add'>+      clock-names = "core";</div><div class='add'>+      bus-width = &lt;8&gt;;</div><div class='add'>+      mmc-ddr-1_8v;</div><div class='add'>+      mmc-hs400-1_8v;</div><div class='add'>+      non-removable;</div><div class='add'>+      no-sd;</div><div class='add'>+      no-sdio;</div><div class='add'>+</div><div class='add'>+      /* Vmmc and Vqmmc are both fixed */</div><div class='add'>+</div><div class='add'>+      marvell,pad-type = "fixed-1-8v";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // For SD/SDIO with compatible "marvell,armada-3700-sdhci":</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    mmc@ab0000 {</div><div class='add'>+      compatible = "marvell,armada-3700-sdhci", "marvell,sdhci-xenon";</div><div class='add'>+      reg = &lt;0xab0000 0x1000&gt;,</div><div class='add'>+            &lt;0x17808 0x4&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      vqmmc-supply = &lt;&amp;sd_regulator&gt;;</div><div class='add'>+      /* Vmmc is fixed */</div><div class='add'>+      clocks = &lt;&amp;sdclk 0&gt;;</div><div class='add'>+      clock-names = "core";</div><div class='add'>+      bus-width = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+      marvell,pad-type = "sd";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml<br/>index 69ff065c9a39..1f63faf17743 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/microchip,dw-sparx5-sdhci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip Sparx5 Mobile Storage Host Controller Binding</div><div class='add'>+title: Microchip Sparx5 Mobile Storage Host Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lars Povlsen &lt;lars.povlsen@microchip.com&gt;</div><div class='hunk'>@@ -35,7 +35,7 @@ properties:</div><div class='ctx'>   microchip,clock-delay:</div><div class='ctx'>     description: Delay clock to card to meet setup time requirements.</div><div class='ctx'>       Each step increase by 1.25ns.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 1</div><div class='ctx'>     maximum: 15</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-card.yaml b/Documentation/devicetree/bindings/mmc/mmc-card.yaml<br/>index b17d454442b3..fd347126449a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-card.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-card.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-card.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mmc-card.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/mmc-card.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MMC Card / eMMC Generic Device Tree Bindings</div><div class='add'>+title: MMC Card / eMMC Generic</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml<br/>index 513f3c8758aa..86c73fd825fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mmc-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MMC Controller Generic Binding</div><div class='add'>+title: MMC Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -88,11 +88,18 @@ properties:</div><div class='ctx'>     default: 1</div><div class='ctx'> </div><div class='ctx'>   max-frequency:</div><div class='del'>-    description:</div><div class='del'>-      Maximum operating frequency of the bus.</div><div class='add'>+    description: |</div><div class='add'>+      Maximum operating frequency of the bus:</div><div class='add'>+        - for eMMC, the maximum supported frequency is 200MHz,</div><div class='add'>+        - for SD/SDIO cards the SDR104 mode has a max supported</div><div class='add'>+          frequency of 208MHz,</div><div class='add'>+        - some mmc host controllers do support a max frequency upto</div><div class='add'>+          384MHz.</div><div class='add'>+      So, lets keep the maximum supported value here.</div><div class='add'>+</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 400000</div><div class='del'>-    maximum: 200000000</div><div class='add'>+    maximum: 384000000</div><div class='ctx'> </div><div class='ctx'>   disable-wp:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='hunk'>@@ -286,7 +293,6 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       SDIO only. Preserves card power during a suspend/resume cycle.</div><div class='ctx'> </div><div class='del'>-  # Deprecated: enable-sdio-wakeup</div><div class='ctx'>   wakeup-source:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='hunk'>@@ -298,7 +304,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   vqmmc-supply:</div><div class='ctx'>     description:</div><div class='del'>-      Supply for the bus IO line power</div><div class='add'>+      Supply for the bus IO line power, such as a level shifter.</div><div class='add'>+      If the level shifter is controlled by a GPIO line, this shall</div><div class='add'>+      be modeled as a "regulator-fixed" with a GPIO line for</div><div class='add'>+      switching the level shifter on/off.</div><div class='ctx'> </div><div class='ctx'>   mmc-pwrseq:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml<br/>index 1fc7e620f328..588be73168fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-emmc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Simple eMMC hardware reset provider binding</div><div class='add'>+title: Simple eMMC hardware reset provider</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -41,7 +41,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    sdhci0_pwrseq {</div><div class='add'>+    pwrseq {</div><div class='ctx'>       compatible = "mmc-pwrseq-emmc";</div><div class='ctx'>       reset-gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml<br/>index 9e2396751030..b35e00e8c65e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-sd8787.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell SD8787 power sequence provider binding</div><div class='add'>+title: Marvell SD8787 power sequence provider</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -35,7 +35,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    wifi_pwrseq: wifi_pwrseq {</div><div class='add'>+    pwrseq {</div><div class='ctx'>       compatible = "mmc-pwrseq-sd8787";</div><div class='ctx'>       powerdown-gpios = &lt;&amp;twl_gpio 0 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>       reset-gpios = &lt;&amp;twl_gpio 1 GPIO_ACTIVE_LOW&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml<br/>index 226fb191913d..00feaafc1063 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Simple MMC power sequence provider binding</div><div class='add'>+title: Simple MMC power sequence provider</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -55,7 +55,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    sdhci0_pwrseq {</div><div class='add'>+    pwrseq {</div><div class='ctx'>       compatible = "mmc-pwrseq-simple";</div><div class='ctx'>       reset-gpios = &lt;&amp;gpio1 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>       clocks = &lt;&amp;clk_32768_ck&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt<br/>deleted file mode 100644<br/>index 5e74db69f581..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-MMC/SD/SDIO slot directly connected to a SPI bus</div><div class='del'>-</div><div class='del'>-This file documents differences between the core properties described</div><div class='del'>-by mmc.txt and the properties used by the mmc_spi driver.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- spi-max-frequency : maximum frequency for this device (Hz).</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- voltage-ranges : two cells are required, first cell specifies minimum</div><div class='del'>-  slot voltage (mV), second cell specifies maximum slot voltage (mV).</div><div class='del'>-  Several ranges could be specified. If not provided, 3.2v..3.4v is assumed.</div><div class='del'>-- gpios : may specify GPIOs in this order: Card-Detect GPIO,</div><div class='del'>-  Write-Protect GPIO. Note that this does not follow the</div><div class='del'>-  binding from mmc.txt, for historical reasons.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	mmc-slot@0 {</div><div class='del'>-		compatible = "fsl,mpc8323rdb-mmc-slot",</div><div class='del'>-			     "mmc-spi-slot";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		gpios = &lt;&amp;qe_pio_d 14 1</div><div class='del'>-			 &amp;qe_pio_d 15 0&gt;;</div><div class='del'>-		voltage-ranges = &lt;3300 3300&gt;;</div><div class='del'>-		spi-max-frequency = &lt;50000000&gt;;</div><div class='del'>-		interrupts = &lt;42&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;PIC&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml b/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml<br/>new file mode 100644<br/>index 000000000000..36acc40c7d18<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mmc-spi-slot.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/mmc-spi-slot.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MMC/SD/SDIO slot directly connected to a SPI bus</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The extra properties used by an mmc connected via SPI.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mmc-spi-slot</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  voltage-ranges:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description: |</div><div class='add'>+      Two cells are required, first cell specifies minimum slot voltage (mV),</div><div class='add'>+      second cell specifies maximum slot voltage (mV).</div><div class='add'>+    items:</div><div class='add'>+      - description: |</div><div class='add'>+          value for minimum slot voltage in mV</div><div class='add'>+        default: 3200</div><div class='add'>+      - description: |</div><div class='add'>+          value for maximum slot voltage in mV</div><div class='add'>+        default: 3400</div><div class='add'>+</div><div class='add'>+  gpios:</div><div class='add'>+    description: |</div><div class='add'>+      For historical reasons, this does not follow the generic mmc-controller</div><div class='add'>+      binding.</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Card-Detect GPIO</div><div class='add'>+      - description: Write-Protect GPIO</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - spi-max-frequency</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      mmc@0 {</div><div class='add'>+        compatible = "mmc-spi-slot";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        gpios = &lt;&amp;gpio 14 GPIO_ACTIVE_LOW&gt;, &lt;&amp;gpio 15 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        voltage-ranges = &lt;3300 3300&gt;;</div><div class='add'>+        spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+        interrupts = &lt;42&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;PIC&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml<br/>index 297ada03e3de..46eefdd19a2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mtk-sd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mtk-sd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mtk-sd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mtk-sd.yaml</a></div><div class='hunk'>@@ -4,15 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MTK MSDC Storage Host Controller Binding</div><div class='add'>+title: MTK MSDC Storage Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chaotian Jing &lt;chaotian.jing@mediatek.com&gt;</div><div class='ctx'>   - Wenbin Mei &lt;wenbin.mei@mediatek.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: mmc-controller.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -20,8 +17,10 @@ properties:</div><div class='ctx'>           - mediatek,mt2701-mmc</div><div class='ctx'>           - mediatek,mt2712-mmc</div><div class='ctx'>           - mediatek,mt6779-mmc</div><div class='add'>+          - mediatek,mt6795-mmc</div><div class='ctx'>           - mediatek,mt7620-mmc</div><div class='ctx'>           - mediatek,mt7622-mmc</div><div class='add'>+          - mediatek,mt7986-mmc</div><div class='ctx'>           - mediatek,mt8135-mmc</div><div class='ctx'>           - mediatek,mt8173-mmc</div><div class='ctx'>           - mediatek,mt8183-mmc</div><div class='hunk'>@@ -30,51 +29,52 @@ properties:</div><div class='ctx'>           - const: mediatek,mt7623-mmc</div><div class='ctx'>           - const: mediatek,mt2701-mmc</div><div class='ctx'>       - items:</div><div class='del'>-          - const: mediatek,mt8186-mmc</div><div class='del'>-          - const: mediatek,mt8183-mmc</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8192-mmc</div><div class='del'>-          - const: mediatek,mt8183-mmc</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8195-mmc</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8186-mmc</div><div class='add'>+              - mediatek,mt8188-mmc</div><div class='add'>+              - mediatek,mt8192-mmc</div><div class='add'>+              - mediatek,mt8195-mmc</div><div class='add'>+              - mediatek,mt8365-mmc</div><div class='ctx'>           - const: mediatek,mt8183-mmc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: base register (required).</div><div class='add'>+      - description: top base register (required for MT8183).</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     description:</div><div class='ctx'>       Should contain phandle for the clock feeding the MMC controller.</div><div class='ctx'>     minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - description: source clock (required).</div><div class='del'>-      - description: HCLK which used for host (required).</div><div class='del'>-      - description: independent source clock gate (required for MT2712).</div><div class='del'>-      - description: bus clock used for internal register access (required for MT2712 MSDC0/3).</div><div class='del'>-      - description: msdc subsys clock gate (required for MT8192).</div><div class='del'>-      - description: peripheral bus clock gate (required for MT8192).</div><div class='del'>-      - description: AXI bus clock gate (required for MT8192).</div><div class='del'>-      - description: AHB bus clock gate (required for MT8192).</div><div class='add'>+    maxItems: 7</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    items:</div><div class='del'>-      - const: source</div><div class='del'>-      - const: hclk</div><div class='del'>-      - const: source_cg</div><div class='del'>-      - const: bus_clk</div><div class='del'>-      - const: sys_cg</div><div class='del'>-      - const: pclk_cg</div><div class='del'>-      - const: axi_cg</div><div class='del'>-      - const: ahb_cg</div><div class='add'>+    maxItems: 7</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Should at least contain MSDC GIC interrupt. To support SDIO in-band wakeup, an extended</div><div class='add'>+      interrupt is required and be configured as wakeup source irq.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: msdc</div><div class='add'>+      - const: sdio_wakeup</div><div class='ctx'> </div><div class='ctx'>   pinctrl-names:</div><div class='add'>+    description:</div><div class='add'>+      Should at least contain default and state_uhs. To support SDIO in-band wakeup, dat1 pin</div><div class='add'>+      will be switched between GPIO mode and SDIO DAT1 mode, state_eint is mandatory in this</div><div class='add'>+      scenario.</div><div class='add'>+    minItems: 2</div><div class='ctx'>     items:</div><div class='ctx'>       - const: default</div><div class='ctx'>       - const: state_uhs</div><div class='add'>+      - const: state_eint</div><div class='ctx'> </div><div class='ctx'>   pinctrl-0:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -86,6 +86,11 @@ properties:</div><div class='ctx'>       should contain uhs mode pin ctrl.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  pinctrl-2:</div><div class='add'>+    description:</div><div class='add'>+      should switch dat1 pin to GPIO mode.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   assigned-clocks:</div><div class='ctx'>     description:</div><div class='ctx'>       PLL of the source clock.</div><div class='hunk'>@@ -168,6 +173,145 @@ required:</div><div class='ctx'>   - vmmc-supply</div><div class='ctx'>   - vqmmc-supply</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - mediatek,mt2701-mmc</div><div class='add'>+            - mediatek,mt6779-mmc</div><div class='add'>+            - mediatek,mt6795-mmc</div><div class='add'>+            - mediatek,mt7620-mmc</div><div class='add'>+            - mediatek,mt7622-mmc</div><div class='add'>+            - mediatek,mt7623-mmc</div><div class='add'>+            - mediatek,mt8135-mmc</div><div class='add'>+            - mediatek,mt8173-mmc</div><div class='add'>+            - mediatek,mt8183-mmc</div><div class='add'>+            - mediatek,mt8186-mmc</div><div class='add'>+            - mediatek,mt8188-mmc</div><div class='add'>+            - mediatek,mt8195-mmc</div><div class='add'>+            - mediatek,mt8516-mmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - description: source clock</div><div class='add'>+            - description: HCLK which used for host</div><div class='add'>+            - description: independent source clock gate</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - const: source</div><div class='add'>+            - const: hclk</div><div class='add'>+            - const: source_cg</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt2712-mmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          items:</div><div class='add'>+            - description: source clock</div><div class='add'>+            - description: HCLK which used for host</div><div class='add'>+            - description: independent source clock gate</div><div class='add'>+            - description: bus clock used for internal register access (required for MSDC0/3).</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+          items:</div><div class='add'>+            - const: source</div><div class='add'>+            - const: hclk</div><div class='add'>+            - const: source_cg</div><div class='add'>+            - const: bus_clk</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt8183-mmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt7986-mmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          items:</div><div class='add'>+            - description: source clock</div><div class='add'>+            - description: HCLK which used for host</div><div class='add'>+            - description: independent source clock gate</div><div class='add'>+            - description: bus clock used for internal register access (required for MSDC0/3).</div><div class='add'>+            - description: msdc subsys clock gate</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+          items:</div><div class='add'>+            - const: source</div><div class='add'>+            - const: hclk</div><div class='add'>+            - const: source_cg</div><div class='add'>+            - const: bus_clk</div><div class='add'>+            - const: sys_cg</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - mediatek,mt8186-mmc</div><div class='add'>+            - mediatek,mt8188-mmc</div><div class='add'>+            - mediatek,mt8195-mmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: source clock</div><div class='add'>+            - description: HCLK which used for host</div><div class='add'>+            - description: independent source clock gate</div><div class='add'>+            - description: crypto clock used for data encrypt/decrypt (optional)</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: source</div><div class='add'>+            - const: hclk</div><div class='add'>+            - const: source_cg</div><div class='add'>+            - const: crypto</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt8192-mmc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: source clock</div><div class='add'>+            - description: HCLK which used for host</div><div class='add'>+            - description: independent source clock gate</div><div class='add'>+            - description: msdc subsys clock gate</div><div class='add'>+            - description: peripheral bus clock gate</div><div class='add'>+            - description: AXI bus clock gate</div><div class='add'>+            - description: AHB bus clock gate</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: source</div><div class='add'>+            - const: hclk</div><div class='add'>+            - const: source_cg</div><div class='add'>+            - const: sys_cg</div><div class='add'>+            - const: pclk_cg</div><div class='add'>+            - const: axi_cg</div><div class='add'>+            - const: ahb_cg</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -195,4 +339,32 @@ examples:</div><div class='ctx'>         mediatek,hs400-cmd-resp-sel-rising;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='add'>+    mmc3: mmc@11260000 {</div><div class='add'>+        compatible = "mediatek,mt8173-mmc";</div><div class='add'>+        reg = &lt;0x11260000 0x1000&gt;;</div><div class='add'>+        clock-names = "source", "hclk";</div><div class='add'>+        clocks = &lt;&amp;pericfg CLK_PERI_MSDC30_3&gt;,</div><div class='add'>+                 &lt;&amp;topckgen CLK_TOP_MSDC50_2_H_SEL&gt;;</div><div class='add'>+        interrupt-names = "msdc", "sdio_wakeup";</div><div class='add'>+        interrupts-extended = &lt;&amp;gic GIC_SPI 74 IRQ_TYPE_LEVEL_LOW 0&gt;,</div><div class='add'>+                     &lt;&amp;pio 23 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        pinctrl-names = "default", "state_uhs", "state_eint";</div><div class='add'>+        pinctrl-0 = &lt;&amp;mmc2_pins_default&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;mmc2_pins_uhs&gt;;</div><div class='add'>+        pinctrl-2 = &lt;&amp;mmc2_pins_eint&gt;;</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        max-frequency = &lt;200000000&gt;;</div><div class='add'>+        cap-sd-highspeed;</div><div class='add'>+        sd-uhs-sdr104;</div><div class='add'>+        keep-power-in-suspend;</div><div class='add'>+        wakeup-source;</div><div class='add'>+        cap-sdio-irq;</div><div class='add'>+        no-mmc;</div><div class='add'>+        no-sd;</div><div class='add'>+        non-removable;</div><div class='add'>+        vmmc-supply = &lt;&amp;sdio_fixed_3v3&gt;;</div><div class='add'>+        vqmmc-supply = &lt;&amp;mt6397_vgp3_reg&gt;;</div><div class='add'>+        mmc-pwrseq = &lt;&amp;wifi_pwrseq&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/mxs-mmc.yaml b/Documentation/devicetree/bindings/mmc/mxs-mmc.yaml<br/>index bec8f8c71ff2..32e512a68ed6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mxs-mmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/mxs-mmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/mxs-mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/mxs-mmc.yaml</a></div><div class='hunk'>@@ -17,7 +17,7 @@ description: |</div><div class='ctx'>   and the properties used by the mxsmmc driver.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml<br/>index ce64b3498378..72987f0326a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml</a></div><div class='hunk'>@@ -82,8 +82,7 @@ properties:</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  operating-points-v2:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+  operating-points-v2: true</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -100,53 +99,53 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       The DQS trim values are only used on controllers which support HS400</div><div class='ctx'>       timing. Only SDMMC4 on Tegra210 and Tegra186 supports HS400.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,default-trim:</div><div class='ctx'>     description: Specify the default outbound clock trimmer value.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,dqs-trim:</div><div class='ctx'>     description: Specify DQS trim value for HS400 timing.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-down-offset-1v8:</div><div class='ctx'>     description: Specify drive strength calibration offsets for 1.8 V</div><div class='ctx'>       signaling modes.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-down-offset-1v8-timeout:</div><div class='ctx'>     description: Specify drive strength used as a fallback in case the</div><div class='ctx'>       automatic calibration times out on a 1.8 V signaling mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-down-offset-3v3:</div><div class='ctx'>     description: Specify drive strength calibration offsets for 3.3 V</div><div class='ctx'>       signaling modes.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-down-offset-3v3-timeout:</div><div class='ctx'>     description: Specify drive strength used as a fallback in case the</div><div class='ctx'>       automatic calibration times out on a 3.3 V signaling mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-down-offset-sdr104:</div><div class='ctx'>     description: Specify drive strength calibration offsets for SDR104 mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-down-offset-hs400:</div><div class='ctx'>     description: Specify drive strength calibration offsets for HS400 mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-up-offset-1v8:</div><div class='ctx'>     description: Specify drive strength calibration offsets for 1.8 V</div><div class='ctx'>       signaling modes.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-up-offset-1v8-timeout:</div><div class='ctx'>     description: Specify drive strength used as a fallback in case the</div><div class='ctx'>       automatic calibration times out on a 1.8 V signaling mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-up-offset-3v3:</div><div class='ctx'>     description: Specify drive strength calibration offsets for 3.3 V</div><div class='hunk'>@@ -158,25 +157,25 @@ properties:</div><div class='ctx'>       refer to the reference manual of the SoC for correct values. The SDR104</div><div class='ctx'>       and HS400 timing specific values are used in corresponding modes if</div><div class='ctx'>       specified.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-up-offset-3v3-timeout:</div><div class='ctx'>     description: Specify drive strength used as a fallback in case the</div><div class='ctx'>       automatic calibration times out on a 3.3 V signaling mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-up-offset-sdr104:</div><div class='ctx'>     description: Specify drive strength calibration offsets for SDR104 mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,pad-autocal-pull-up-offset-hs400:</div><div class='ctx'>     description: Specify drive strength calibration offsets for HS400 mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   nvidia,only-1-8v:</div><div class='ctx'>     description: The presence of this property indicates that the controller</div><div class='ctx'>       operates at a 1.8 V fixed I/O voltage.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/flag"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -187,7 +186,7 @@ required:</div><div class='ctx'>   - reset-names</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -197,25 +196,22 @@ allOf:</div><div class='ctx'>               - nvidia,tegra30-sdhci</div><div class='ctx'>               - nvidia,tegra114-sdhci</div><div class='ctx'>               - nvidia,tegra124-sdhci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           items:</div><div class='ctx'>             - description: module clock</div><div class='del'>-          minItems: 1</div><div class='del'>-          maxItems: 1</div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           items:</div><div class='ctx'>             - description: module clock</div><div class='ctx'>             - description: timeout clock</div><div class='del'>-          minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='add'>+</div><div class='ctx'>         clock-names:</div><div class='ctx'>           items:</div><div class='ctx'>             - const: sdhci</div><div class='ctx'>             - const: tmclk</div><div class='del'>-          minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='ctx'>       required:</div><div class='ctx'>         - clock-names</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/orion-sdio.txt b/Documentation/devicetree/bindings/mmc/orion-sdio.txt<br/>deleted file mode 100644<br/>index 10f0818a34c5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/orion-sdio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/orion-sdio.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-* Marvell orion-sdio controller</div><div class='del'>-</div><div class='del'>-This file documents differences between the core properties in mmc.txt</div><div class='del'>-and the properties used by the orion-sdio driver.</div><div class='del'>-</div><div class='del'>-- compatible: Should be "marvell,orion-sdio"</div><div class='del'>-- clocks: reference to the clock of the SDIO interface</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	mvsdio@d00d4000 {</div><div class='del'>-		compatible = "marvell,orion-sdio";</div><div class='del'>-		reg = &lt;0xd00d4000 0x200&gt;;</div><div class='del'>-		interrupts = &lt;54&gt;;</div><div class='del'>-		clocks = &lt;&amp;gateclk 17&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml<br/>index b0d81ebe0f6e..1b7d88ed3799 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/owl-mmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/owl-mmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/owl-mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/owl-mmc.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Actions Semi Owl SoCs SD/MMC/SDIO controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml b/Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml<br/>index c36ba561c387..024313b79ec9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/renesas,mmcif.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml<br/>index 9ac4986988c5..7756a8687eaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/renesas,sdhi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas SDHI SD/MMC controller</div><div class='ctx'> </div><div class='hunk'>@@ -56,11 +56,17 @@ properties:</div><div class='ctx'>               - renesas,sdhi-r8a77980  # R-Car V3H</div><div class='ctx'>               - renesas,sdhi-r8a77990  # R-Car E3</div><div class='ctx'>               - renesas,sdhi-r8a77995  # R-Car D3</div><div class='del'>-              - renesas,sdhi-r8a779a0  # R-Car V3U</div><div class='ctx'>               - renesas,sdhi-r9a07g043 # RZ/G2UL</div><div class='ctx'>               - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,sdhi-r9a07g054 # RZ/V2L</div><div class='add'>+              - renesas,sdhi-r9a09g011 # RZ/V2M</div><div class='ctx'>           - const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,sdhi-r8a779a0  # R-Car V3U</div><div class='add'>+              - renesas,sdhi-r8a779f0  # R-Car S4-8</div><div class='add'>+              - renesas,sdhi-r8a779g0  # R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-sdhi # R-Car Gen4</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -85,6 +91,9 @@ properties:</div><div class='ctx'>         - tx</div><div class='ctx'>         - rx</div><div class='ctx'> </div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -103,7 +112,7 @@ properties:</div><div class='ctx'>   max-frequency: true</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml"</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -113,6 +122,7 @@ allOf:</div><div class='ctx'>               - renesas,sdhi-r9a07g043</div><div class='ctx'>               - renesas,sdhi-r9a07g044</div><div class='ctx'>               - renesas,sdhi-r9a07g054</div><div class='add'>+              - renesas,sdhi-r9a09g011</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='hunk'>@@ -141,6 +151,7 @@ allOf:</div><div class='ctx'>               enum:</div><div class='ctx'>                 - renesas,rcar-gen2-sdhi</div><div class='ctx'>                 - renesas,rcar-gen3-sdhi</div><div class='add'>+                - renesas,rcar-gen4-sdhi</div><div class='ctx'>       then:</div><div class='ctx'>         properties:</div><div class='ctx'>           clocks:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml<br/>index 54fb59820d2b..211cd0b0bc5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip designware mobile storage host controller device tree bindings</div><div class='add'>+title: Rockchip designware mobile storage host controller</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Rockchip uses the Synopsys designware mobile storage host controller</div><div class='hunk'>@@ -14,7 +14,7 @@ description:</div><div class='ctx'>   file and the Rockchip specific extensions.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "synopsys-dw-mshc-common.yaml#"</div><div class='add'>+  - $ref: synopsys-dw-mshc-common.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='hunk'>@@ -32,13 +32,16 @@ properties:</div><div class='ctx'>               - rockchip,px30-dw-mshc</div><div class='ctx'>               - rockchip,rk1808-dw-mshc</div><div class='ctx'>               - rockchip,rk3036-dw-mshc</div><div class='add'>+              - rockchip,rk3128-dw-mshc</div><div class='ctx'>               - rockchip,rk3228-dw-mshc</div><div class='ctx'>               - rockchip,rk3308-dw-mshc</div><div class='ctx'>               - rockchip,rk3328-dw-mshc</div><div class='ctx'>               - rockchip,rk3368-dw-mshc</div><div class='ctx'>               - rockchip,rk3399-dw-mshc</div><div class='ctx'>               - rockchip,rk3568-dw-mshc</div><div class='add'>+              - rockchip,rk3588-dw-mshc</div><div class='ctx'>               - rockchip,rv1108-dw-mshc</div><div class='add'>+              - rockchip,rv1126-dw-mshc</div><div class='ctx'>           - const: rockchip,rk3288-dw-mshc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -69,6 +72,9 @@ properties:</div><div class='ctx'>       to control the clock phases, "ciu-sample" is required for tuning</div><div class='ctx'>       high speed modes.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   rockchip,default-sample-phase:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml<br/>new file mode 100644<br/>index 000000000000..6ee78a38bd74<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/samsung,exynos-dw-mshc.yaml</a></div><div class='hunk'>@@ -0,0 +1,160 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title:</div><div class='add'>+  Samsung Exynos SoC specific extensions to the Synopsys Designware Mobile</div><div class='add'>+  Storage Host Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jaehoon Chung &lt;jh80.chung@samsung.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,exynos4210-dw-mshc</div><div class='add'>+      - samsung,exynos4412-dw-mshc</div><div class='add'>+      - samsung,exynos5250-dw-mshc</div><div class='add'>+      - samsung,exynos5420-dw-mshc</div><div class='add'>+      - samsung,exynos5420-dw-mshc-smu</div><div class='add'>+      - samsung,exynos7-dw-mshc</div><div class='add'>+      - samsung,exynos7-dw-mshc-smu</div><div class='add'>+      - axis,artpec8-dw-mshc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      Handle to "biu" and "ciu" clocks for the</div><div class='add'>+      bus interface unit clock and the card interface unit clock.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: biu</div><div class='add'>+      - const: ciu</div><div class='add'>+</div><div class='add'>+  samsung,dw-mshc-ciu-div:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 7</div><div class='add'>+    description:</div><div class='add'>+      The divider value for the card interface unit (ciu) clock.</div><div class='add'>+</div><div class='add'>+  samsung,dw-mshc-ddr-timing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: CIU clock phase shift value for tx mode</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+      - description: CIU clock phase shift value for rx mode</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+    description:</div><div class='add'>+      The value of CUI clock phase shift value in transmit mode and CIU clock</div><div class='add'>+      phase shift value in receive mode for double data rate mode operation.</div><div class='add'>+      See also samsung,dw-mshc-hs400-timing property.</div><div class='add'>+</div><div class='add'>+  samsung,dw-mshc-hs400-timing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: CIU clock phase shift value for tx mode</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+      - description: CIU clock phase shift value for rx mode</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+    description: |</div><div class='add'>+      The value of CIU TX and RX clock phase shift value for HS400 mode</div><div class='add'>+      operation.</div><div class='add'>+      Valid values for SDR and DDR CIU clock timing::</div><div class='add'>+        - valid value for tx phase shift and rx phase shift is 0 to 7.</div><div class='add'>+        - when CIU clock divider value is set to 3, all possible 8 phase shift</div><div class='add'>+          values can be used.</div><div class='add'>+        - if CIU clock divider value is 0 (that is divide by 1), both tx and rx</div><div class='add'>+          phase shift clocks should be 0.</div><div class='add'>+      If missing, values from samsung,dw-mshc-ddr-timing property are used.</div><div class='add'>+</div><div class='add'>+  samsung,dw-mshc-sdr-timing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: CIU clock phase shift value for tx mode</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+      - description: CIU clock phase shift value for rx mode</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+    description:</div><div class='add'>+      The value of CIU clock phase shift value in transmit mode and CIU clock</div><div class='add'>+      phase shift value in receive mode for single data rate mode operation.</div><div class='add'>+      See also samsung,dw-mshc-hs400-timing property.</div><div class='add'>+</div><div class='add'>+  samsung,read-strobe-delay:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      RCLK (Data strobe) delay to control HS400 mode (Latency value for delay</div><div class='add'>+      line in Read path). If missing, default from hardware is used.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - samsung,dw-mshc-ddr-timing</div><div class='add'>+  - samsung,dw-mshc-sdr-timing</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: synopsys-dw-mshc-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos5250-dw-mshc</div><div class='add'>+              - samsung,exynos5420-dw-mshc</div><div class='add'>+              - samsung,exynos7-dw-mshc</div><div class='add'>+              - samsung,exynos7-dw-mshc-smu</div><div class='add'>+              - axis,artpec8-dw-mshc</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - samsung,dw-mshc-ciu-div</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos5420.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    mmc@12220000 {</div><div class='add'>+        compatible = "samsung,exynos5420-dw-mshc";</div><div class='add'>+        interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x12220000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clock CLK_MMC2&gt;, &lt;&amp;clock CLK_SCLK_MMC2&gt;;</div><div class='add'>+        clock-names = "biu", "ciu";</div><div class='add'>+        fifo-depth = &lt;0x40&gt;;</div><div class='add'>+        card-detect-delay = &lt;200&gt;;</div><div class='add'>+        samsung,dw-mshc-ciu-div = &lt;3&gt;;</div><div class='add'>+        samsung,dw-mshc-sdr-timing = &lt;0 4&gt;;</div><div class='add'>+        samsung,dw-mshc-ddr-timing = &lt;0 2&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_cd &amp;sd2_wp &amp;sd2_bus1 &amp;sd2_bus4&gt;;</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        cap-sd-highspeed;</div><div class='add'>+        max-frequency = &lt;200000000&gt;;</div><div class='add'>+        vmmc-supply = &lt;&amp;ldo19_reg&gt;;</div><div class='add'>+        vqmmc-supply = &lt;&amp;ldo13_reg&gt;;</div><div class='add'>+        sd-uhs-sdr50;</div><div class='add'>+        sd-uhs-sdr104;</div><div class='add'>+        sd-uhs-ddr50;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/samsung,s3c6410-sdhci.yaml b/Documentation/devicetree/bindings/mmc/samsung,s3c6410-sdhci.yaml<br/>new file mode 100644<br/>index 000000000000..5d873a60f650<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/samsung,s3c6410-sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/samsung,s3c6410-sdhci.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/samsung,s3c6410-sdhci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung SoC SDHCI Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jaehoon Chung &lt;jh80.chung@samsung.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - samsung,s3c6410-sdhci</div><div class='add'>+      - samsung,exynos4210-sdhci</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: hsmmc</div><div class='add'>+      - pattern: "^mmc_busclk.[0-3]$"</div><div class='add'>+      - pattern: "^mmc_busclk.[0-3]$"</div><div class='add'>+      - pattern: "^mmc_busclk.[0-3]$"</div><div class='add'>+      - pattern: "^mmc_busclk.[0-3]$"</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos4210-sdhci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hsmmc</div><div class='add'>+            - const: mmc_busclk.2</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/exynos4.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    mmc@12510000 {</div><div class='add'>+        compatible = "samsung,exynos4210-sdhci";</div><div class='add'>+        reg = &lt;0x12510000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clock CLK_SDMMC0&gt;, &lt;&amp;clock CLK_SCLK_MMC0&gt;;</div><div class='add'>+        clock-names = "hsmmc", "mmc_busclk.2";</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        cd-gpios = &lt;&amp;gpx3 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        pinctrl-0 = &lt;&amp;sd2_clk &amp;sd2_cmd &amp;sd2_bus4 &amp;sdhci2_cd&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        vmmc-supply = &lt;&amp;ldo21_reg&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt b/Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt<br/>deleted file mode 100644<br/>index 5f68feb9f9d6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/samsung,s3cmci.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-* Samsung's S3C24XX MMC/SD/SDIO controller device tree bindings</div><div class='del'>-</div><div class='del'>-Samsung's S3C24XX MMC/SD/SDIO controller is used as a connectivity interface</div><div class='del'>-with external MMC, SD and SDIO storage mediums.</div><div class='del'>-</div><div class='del'>-This file documents differences between the core mmc properties described by</div><div class='del'>-mmc.txt and the properties used by the Samsung S3C24XX MMC/SD/SDIO controller</div><div class='del'>-implementation.</div><div class='del'>-</div><div class='del'>-Required SoC Specific Properties:</div><div class='del'>-- compatible: should be one of the following</div><div class='del'>-  - "samsung,s3c2410-sdi": for controllers compatible with s3c2410</div><div class='del'>-  - "samsung,s3c2412-sdi": for controllers compatible with s3c2412</div><div class='del'>-  - "samsung,s3c2440-sdi": for controllers compatible with s3c2440</div><div class='del'>-- reg: register location and length</div><div class='del'>-- interrupts: mmc controller interrupt</div><div class='del'>-- clocks: Should reference the controller clock</div><div class='del'>-- clock-names: Should contain "sdi"</div><div class='del'>-</div><div class='del'>-Required Board Specific Properties:</div><div class='del'>-- pinctrl-0: Should specify pin control groups used for this controller.</div><div class='del'>-- pinctrl-names: Should contain only one value - "default".</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- bus-width: number of data lines (see mmc.txt)</div><div class='del'>-- cd-gpios: gpio for card detection (see mmc.txt)</div><div class='del'>-- wp-gpios: gpio for write protection (see mmc.txt)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	mmc0: mmc@5a000000 {</div><div class='del'>-		compatible = "samsung,s3c2440-sdi";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdi_pins&gt;;</div><div class='del'>-		reg = &lt;0x5a000000 0x100000&gt;;</div><div class='del'>-		interrupts = &lt;0 0 21 3&gt;;</div><div class='del'>-		clocks = &lt;&amp;clocks PCLK_SDI&gt;;</div><div class='del'>-		clock-names = "sdi";</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cd-gpios = &lt;&amp;gpg 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		wp-gpios = &lt;&amp;gph 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt b/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt<br/>deleted file mode 100644<br/>index 42e0a9afa100..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/samsung-sdhci.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/samsung-sdhci.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-* Samsung's SDHCI Controller device tree bindings</div><div class='del'>-</div><div class='del'>-Samsung's SDHCI controller is used as a connectivity interface with external</div><div class='del'>-MMC, SD and eMMC storage mediums. This file documents differences between the</div><div class='del'>-core mmc properties described by mmc.txt and the properties used by the</div><div class='del'>-Samsung implementation of the SDHCI controller.</div><div class='del'>-</div><div class='del'>-Required SoC Specific Properties:</div><div class='del'>-- compatible: should be one of the following</div><div class='del'>-  - "samsung,s3c6410-sdhci": For controllers compatible with s3c6410 sdhci</div><div class='del'>-    controller.</div><div class='del'>-  - "samsung,exynos4210-sdhci": For controllers compatible with Exynos4 sdhci</div><div class='del'>-    controller.</div><div class='del'>-</div><div class='del'>-Required Board Specific Properties:</div><div class='del'>-- pinctrl-0: Should specify pin control groups used for this controller.</div><div class='del'>-- pinctrl-names: Should contain only one value - "default".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	sdhci@12530000 {</div><div class='del'>-		compatible = "samsung,exynos4210-sdhci";</div><div class='del'>-		reg = &lt;0x12530000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;0 75 0&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cd-gpios = &lt;&amp;gpk2 2 0&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sd0_clk &amp;sd0_cmd &amp;sd0_bus4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	Note: This example shows both SoC specific and board specific properties</div><div class='del'>-	in a single device node. The properties can be actually be separated</div><div class='del'>-	into SoC specific node and board specific node.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml<br/>index 0566493c4def..676a74695389 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-am654.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/sdhci-am654.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/sdhci-am654.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI AM654 MMC Controller</div><div class='ctx'> </div><div class='hunk'>@@ -11,17 +11,18 @@ maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: mmc-controller.yaml#</div><div class='add'>+  - $ref: sdhci-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: ti,am654-sdhci-5.1</div><div class='del'>-      - const: ti,j721e-sdhci-8bit</div><div class='del'>-      - const: ti,j721e-sdhci-4bit</div><div class='del'>-      - const: ti,am64-sdhci-8bit</div><div class='del'>-      - const: ti,am64-sdhci-4bit</div><div class='del'>-      - const: ti,am62-sdhci</div><div class='add'>+      - enum:</div><div class='add'>+          - ti,am62-sdhci</div><div class='add'>+          - ti,am64-sdhci-4bit</div><div class='add'>+          - ti,am64-sdhci-8bit</div><div class='add'>+          - ti,am654-sdhci-5.1</div><div class='add'>+          - ti,j721e-sdhci-4bit</div><div class='add'>+          - ti,j721e-sdhci-8bit</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: ti,j7200-sdhci-8bit</div><div class='ctx'>           - const: ti,j721e-sdhci-8bit</div><div class='hunk'>@@ -49,7 +50,8 @@ properties:</div><div class='ctx'>       - const: clk_ahb</div><div class='ctx'>       - const: clk_xin</div><div class='ctx'> </div><div class='del'>-  sdhci-caps-mask: true</div><div class='add'>+  dma-coherent:</div><div class='add'>+    type: boolean</div><div class='ctx'> </div><div class='ctx'>   # PHY output tap delays:</div><div class='ctx'>   # Used to delay the data valid window and align it to the sampling clock.</div><div class='hunk'>@@ -58,67 +60,67 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-legacy:</div><div class='ctx'>     description: Output tap delay for SD/MMC legacy timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-mmc-hs:</div><div class='ctx'>     description: Output tap delay for MMC high speed timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-sd-hs:</div><div class='ctx'>     description: Output tap delay for SD high speed timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-sdr12:</div><div class='ctx'>     description: Output tap delay for SD UHS SDR12 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-sdr25:</div><div class='ctx'>     description: Output tap delay for SD UHS SDR25 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-sdr50:</div><div class='ctx'>     description: Output tap delay for SD UHS SDR50 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-sdr104:</div><div class='ctx'>     description: Output tap delay for SD UHS SDR104 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-ddr50:</div><div class='ctx'>     description: Output tap delay for SD UHS DDR50 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-ddr52:</div><div class='ctx'>     description: Output tap delay for eMMC DDR52 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-hs200:</div><div class='ctx'>     description: Output tap delay for eMMC HS200 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,otap-del-sel-hs400:</div><div class='ctx'>     description: Output tap delay for eMMC HS400 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='hunk'>@@ -128,49 +130,55 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ti,itap-del-sel-legacy:</div><div class='ctx'>     description: Input tap delay for SD/MMC legacy timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   ti,itap-del-sel-mmc-hs:</div><div class='ctx'>     description: Input tap delay for MMC high speed timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   ti,itap-del-sel-sd-hs:</div><div class='ctx'>     description: Input tap delay for SD high speed timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   ti,itap-del-sel-sdr12:</div><div class='ctx'>     description: Input tap delay for SD UHS SDR12 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   ti,itap-del-sel-sdr25:</div><div class='ctx'>     description: Input tap delay for SD UHS SDR25 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 0x1f</div><div class='add'>+</div><div class='add'>+  ti,itap-del-sel-ddr50:</div><div class='add'>+    description: Input tap delay for MMC DDR50 timing</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   ti,itap-del-sel-ddr52:</div><div class='ctx'>     description: Input tap delay for MMC DDR52 timing</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>   ti,trm-icp:</div><div class='ctx'>     description: DLL trim select</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 0xf</div><div class='ctx'> </div><div class='ctx'>   ti,driver-strength-ohm:</div><div class='ctx'>     description: DLL drive strength in ohms</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum:</div><div class='ctx'>       - 33</div><div class='ctx'>       - 40</div><div class='hunk'>@@ -180,11 +188,18 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ti,strobe-sel:</div><div class='ctx'>     description: strobe select delay for HS400 speed mode.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   ti,clkbuf-sel:</div><div class='ctx'>     description: Clock Delay Buffer Select</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  ti,fails-without-test-cd:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      When present, indicates that the CD line is not connected</div><div class='add'>+      and the controller is required to be forced into Test mode</div><div class='add'>+      to set the TESTCD bit.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-common.yaml b/Documentation/devicetree/bindings/mmc/sdhci-common.yaml<br/>new file mode 100644<br/>index 000000000000..1664615187c8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/sdhci-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/sdhci-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SDHCI Controller Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Adrian Hunter &lt;adrian.hunter@intel.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Common properties present on Secure Digital Host Controller Interface (SDHCI)</div><div class='add'>+  devices.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  sdhci-caps:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint64</div><div class='add'>+    description:</div><div class='add'>+      Additionally present SDHCI capabilities - values for SDHCI_CAPABILITIES</div><div class='add'>+      and SDHCI_CAPABILITIES_1 registers.</div><div class='add'>+</div><div class='add'>+  sdhci-caps-mask:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint64</div><div class='add'>+    description:</div><div class='add'>+      Masked SDHCI capabilities to remove from SDHCI_CAPABILITIES and</div><div class='add'>+      SDHCI_CAPABILITIES_1 registers.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-dove.txt b/Documentation/devicetree/bindings/mmc/sdhci-dove.txt<br/>deleted file mode 100644<br/>index ae9aab9abcd7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-dove.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-dove.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,14 +0,0 @@</div><div class='del'>-* Marvell sdhci-dove controller</div><div class='del'>-</div><div class='del'>-This file documents differences between the core properties in mmc.txt</div><div class='del'>-and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.</div><div class='del'>-</div><div class='del'>-- compatible: Should be "marvell,dove-sdhci".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-sdio0: sdio@92000 {</div><div class='del'>-	compatible = "marvell,dove-sdhci";</div><div class='del'>-	reg = &lt;0x92000 0x100&gt;;</div><div class='del'>-	interrupts = &lt;35&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt b/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt<br/>deleted file mode 100644<br/>index 3ee9263adf73..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-fujitsu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-* Fujitsu SDHCI controller</div><div class='del'>-</div><div class='del'>-This file documents differences between the core properties in mmc.txt</div><div class='del'>-and the properties used by the sdhci_f_sdh30 driver.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "fujitsu,mb86s70-sdhci-3.0"</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names. It is a</div><div class='del'>-  list of phandles and clock-specifier pairs.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names: Should contain the following two entries:</div><div class='del'>-	"iface" - clock used for sdhci interface</div><div class='del'>-	"core"  - core clock for sdhci controller</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- vqmmc-supply: phandle to the regulator device tree node, mentioned</div><div class='del'>-  as the VCCQ/VDD_IO supply in the eMMC/SD specs.</div><div class='del'>-- fujitsu,cmd-dat-delay-select: boolean property indicating that this host</div><div class='del'>-  requires the CMD_DAT_DELAY control to be enabled.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	sdhci1: mmc@36600000 {</div><div class='del'>-		compatible = "fujitsu,mb86s70-sdhci-3.0";</div><div class='del'>-		reg = &lt;0 0x36600000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 172 0x4&gt;,</div><div class='del'>-			     &lt;0 173 0x4&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		vqmmc-supply = &lt;&amp;vccq_sdhci1&gt;;</div><div class='del'>-		clocks = &lt;&amp;clock 2 2 0&gt;, &lt;&amp;clock 2 3 0&gt;;</div><div class='del'>-		clock-names = "iface", "core";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt<br/>deleted file mode 100644<br/>index 6216ed777343..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-msm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,123 +0,0 @@</div><div class='del'>-* Qualcomm SDHCI controller (sdhci-msm)</div><div class='del'>-</div><div class='del'>-This file documents differences between the core properties in mmc.txt</div><div class='del'>-and the properties used by the sdhci-msm driver.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should contain a SoC-specific string and a IP version string:</div><div class='del'>-	version strings:</div><div class='del'>-		"qcom,sdhci-msm-v4" for sdcc versions less than 5.0</div><div class='del'>-		"qcom,sdhci-msm-v5" for sdcc version 5.0</div><div class='del'>-		For SDCC version 5.0.0, MCI registers are removed from SDCC</div><div class='del'>-		interface and some registers are moved to HC. New compatible</div><div class='del'>-		string is added to support this change - "qcom,sdhci-msm-v5".</div><div class='del'>-	full compatible strings with SoC and version:</div><div class='del'>-		"qcom,apq8084-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,msm8226-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,msm8953-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,msm8974-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,msm8916-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,msm8992-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,msm8994-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,msm8996-sdhci", "qcom,sdhci-msm-v4"</div><div class='del'>-		"qcom,qcs404-sdhci", "qcom,sdhci-msm-v5"</div><div class='del'>-		"qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";</div><div class='del'>-		"qcom,sc7280-sdhci", "qcom,sdhci-msm-v5";</div><div class='del'>-		"qcom,sdm845-sdhci", "qcom,sdhci-msm-v5"</div><div class='del'>-		"qcom,sdx55-sdhci", "qcom,sdhci-msm-v5";</div><div class='del'>-		"qcom,sm8250-sdhci", "qcom,sdhci-msm-v5"</div><div class='del'>-	NOTE that some old device tree files may be floating around that only</div><div class='del'>-	have the string "qcom,sdhci-msm-v4" without the SoC compatible string</div><div class='del'>-	but doing that should be considered a deprecated practice.</div><div class='del'>-</div><div class='del'>-- reg: Base address and length of the register in the following order:</div><div class='del'>-	- Host controller register map (required)</div><div class='del'>-	- SD Core register map (required for controllers earlier than msm-v5)</div><div class='del'>-	- CQE register map (Optional, CQE support is present on SDHC instance meant</div><div class='del'>-	                    for eMMC and version v4.2 and above)</div><div class='del'>-	- Inline Crypto Engine register map (optional)</div><div class='del'>-- reg-names: When CQE register map is supplied, below reg-names are required</div><div class='del'>-	- "hc" for Host controller register map</div><div class='del'>-	- "core" for SD core register map</div><div class='del'>-	- "cqhci" for CQE register map</div><div class='del'>-	- "ice" for Inline Crypto Engine register map (optional)</div><div class='del'>-- interrupts: Should contain an interrupt-specifiers for the interrupts:</div><div class='del'>-	- Host controller interrupt (required)</div><div class='del'>-- pinctrl-names: Should contain only one value - "default".</div><div class='del'>-- pinctrl-0: Should specify pin control groups used for this controller.</div><div class='del'>-- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.</div><div class='del'>-- clock-names: Should contain the following:</div><div class='del'>-	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)</div><div class='del'>-	"core"	- SDC MMC clock (MCLK) (required)</div><div class='del'>-	"bus"	- SDCC bus voter clock (optional)</div><div class='del'>-	"xo"	- TCXO clock (optional)</div><div class='del'>-	"cal"	- reference clock for RCLK delay calibration (optional)</div><div class='del'>-	"sleep"	- sleep clock for RCLK delay calibration (optional)</div><div class='del'>-	"ice" - clock for Inline Crypto Engine (optional)</div><div class='del'>-</div><div class='del'>-- qcom,ddr-config: Certain chipsets and platforms require particular settings</div><div class='del'>-	for the DDR_CONFIG register. Use this field to specify the register</div><div class='del'>-	value as per the Hardware Programming Guide.</div><div class='del'>-</div><div class='del'>-- qcom,dll-config: Chipset and Platform specific value. Use this field to</div><div class='del'>-	specify the DLL_CONFIG register value as per Hardware Programming Guide.</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-* Following bus parameters are required for interconnect bandwidth scaling:</div><div class='del'>-- interconnects: Pairs of phandles and interconnect provider specifier</div><div class='del'>-		 to denote the edge source and destination ports of</div><div class='del'>-		 the interconnect path.</div><div class='del'>-</div><div class='del'>-- interconnect-names: For sdhc, we have two main paths.</div><div class='del'>-		1. Data path : sdhc to ddr</div><div class='del'>-		2. Config path : cpu to sdhc</div><div class='del'>-		For Data interconnect path the name supposed to be</div><div class='del'>-		is "sdhc-ddr" and for config interconnect path it is</div><div class='del'>-		"cpu-sdhc".</div><div class='del'>-		Please refer to Documentation/devicetree/bindings/</div><div class='del'>-		interconnect/ for more details.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	sdhc_1: sdhci@f9824900 {</div><div class='del'>-		compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";</div><div class='del'>-		reg = &lt;0xf9824900 0x11c&gt;, &lt;0xf9824000 0x800&gt;;</div><div class='del'>-		interrupts = &lt;0 123 0&gt;;</div><div class='del'>-		bus-width = &lt;8&gt;;</div><div class='del'>-		non-removable;</div><div class='del'>-</div><div class='del'>-		vmmc-supply = &lt;&amp;pm8941_l20&gt;;</div><div class='del'>-		vqmmc-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdc1_clk &amp;sdc1_cmd &amp;sdc1_data&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_SDCC1_APPS_CLK&gt;, &lt;&amp;gcc GCC_SDCC1_AHB_CLK&gt;;</div><div class='del'>-		clock-names = "core", "iface";</div><div class='del'>-		interconnects = &lt;&amp;qnoc MASTER_SDCC_ID &amp;qnoc SLAVE_DDR_ID&gt;,</div><div class='del'>-				&lt;&amp;qnoc MASTER_CPU_ID &amp;qnoc SLAVE_SDCC_ID&gt;;</div><div class='del'>-		interconnect-names = "sdhc-ddr","cpu-sdhc";</div><div class='del'>-</div><div class='del'>-		qcom,dll-config = &lt;0x000f642c&gt;;</div><div class='del'>-		qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhc_2: sdhci@f98a4900 {</div><div class='del'>-		compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";</div><div class='del'>-		reg = &lt;0xf98a4900 0x11c&gt;, &lt;0xf98a4000 0x800&gt;;</div><div class='del'>-		interrupts = &lt;0 125 0&gt;;</div><div class='del'>-		bus-width = &lt;4&gt;;</div><div class='del'>-		cd-gpios = &lt;&amp;msmgpio 62 0x1&gt;;</div><div class='del'>-</div><div class='del'>-		vmmc-supply = &lt;&amp;pm8941_l21&gt;;</div><div class='del'>-		vqmmc-supply = &lt;&amp;pm8941_l13&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdc2_clk &amp;sdc2_cmd &amp;sdc2_data&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_SDCC2_APPS_CLK&gt;, &lt;&amp;gcc GCC_SDCC2_AHB_CLK&gt;;</div><div class='del'>-		clock-names = "core", "iface";</div><div class='del'>-</div><div class='del'>-		qcom,dll-config = &lt;0x0007642c&gt;;</div><div class='del'>-		qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml<br/>new file mode 100644<br/>index 000000000000..4f2d9e8127dd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/sdhci-msm.yaml</a></div><div class='hunk'>@@ -0,0 +1,259 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SDHCI controller (sdhci-msm)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Secure Digital Host Controller Interface (SDHCI) present on</div><div class='add'>+  Qualcomm SOCs supports SD/MMC/SDIO devices.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sdhci-msm-v4</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,apq8084-sdhci</div><div class='add'>+              - qcom,msm8226-sdhci</div><div class='add'>+              - qcom,msm8953-sdhci</div><div class='add'>+              - qcom,msm8974-sdhci</div><div class='add'>+              - qcom,msm8976-sdhci</div><div class='add'>+              - qcom,msm8916-sdhci</div><div class='add'>+              - qcom,msm8992-sdhci</div><div class='add'>+              - qcom,msm8994-sdhci</div><div class='add'>+              - qcom,msm8996-sdhci</div><div class='add'>+              - qcom,msm8998-sdhci</div><div class='add'>+          - const: qcom,sdhci-msm-v4 # for sdcc versions less than 5.0</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,ipq5018-sdhci</div><div class='add'>+              - qcom,ipq5332-sdhci</div><div class='add'>+              - qcom,ipq9574-sdhci</div><div class='add'>+              - qcom,qcm2290-sdhci</div><div class='add'>+              - qcom,qcs404-sdhci</div><div class='add'>+              - qcom,sc7180-sdhci</div><div class='add'>+              - qcom,sc7280-sdhci</div><div class='add'>+              - qcom,sdm630-sdhci</div><div class='add'>+              - qcom,sdm670-sdhci</div><div class='add'>+              - qcom,sdm845-sdhci</div><div class='add'>+              - qcom,sdx55-sdhci</div><div class='add'>+              - qcom,sdx65-sdhci</div><div class='add'>+              - qcom,sm6115-sdhci</div><div class='add'>+              - qcom,sm6125-sdhci</div><div class='add'>+              - qcom,sm6350-sdhci</div><div class='add'>+              - qcom,sm6375-sdhci</div><div class='add'>+              - qcom,sm8150-sdhci</div><div class='add'>+              - qcom,sm8250-sdhci</div><div class='add'>+              - qcom,sm8350-sdhci</div><div class='add'>+              - qcom,sm8450-sdhci</div><div class='add'>+              - qcom,sm8550-sdhci</div><div class='add'>+          - const: qcom,sdhci-msm-v5 # for sdcc version 5.0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    items:</div><div class='add'>+      - description: Main peripheral bus clock, PCLK/HCLK - AHB Bus clock</div><div class='add'>+      - description: SDC MMC clock, MCLK</div><div class='add'>+      - description: TCXO clock</div><div class='add'>+      - description: clock for Inline Crypto Engine</div><div class='add'>+      - description: SDCC bus voter clock</div><div class='add'>+      - description: reference clock for RCLK delay calibration</div><div class='add'>+      - description: sleep clock for RCLK delay calibration</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: core</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: ice</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: cal</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hc_irq</div><div class='add'>+      - const: pwr_irq</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+  pinctrl-0:</div><div class='add'>+    description:</div><div class='add'>+      Should specify pin control groups used for this controller.</div><div class='add'>+</div><div class='add'>+  pinctrl-1:</div><div class='add'>+    description:</div><div class='add'>+      Should specify sleep pin control groups used for this controller.</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,ddr-config:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: platform specific settings for DDR_CONFIG reg.</div><div class='add'>+</div><div class='add'>+  qcom,dll-config:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: platform specific settings for DLL_CONFIG reg.</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+    description: |</div><div class='add'>+      phandle to apps_smmu node with sid mask.</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: data path, sdhc to ddr</div><div class='add'>+      - description: config path, cpu to sdhc</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: sdhc-ddr</div><div class='add'>+      - const: cpu-sdhc</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    description: A phandle to sdhci power domain node</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^opp-table(-[a-z0-9]+)?$':</div><div class='add'>+    if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: operating-points-v2</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '^opp-?[0-9]+$':</div><div class='add'>+          required:</div><div class='add'>+            - required-opps</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: sdhci-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdhci-msm-v4</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - description: Host controller register map</div><div class='add'>+            - description: SD Core register map</div><div class='add'>+            - description: CQE register map</div><div class='add'>+            - description: Inline Crypto Engine register map</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - const: hc</div><div class='add'>+            - const: core</div><div class='add'>+            - const: cqhci</div><div class='add'>+            - const: ice</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - description: Host controller register map</div><div class='add'>+            - description: CQE register map</div><div class='add'>+            - description: Inline Crypto Engine register map</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: hc</div><div class='add'>+            - const: cqhci</div><div class='add'>+            - const: ice</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    sdhc_2: mmc@8804000 {</div><div class='add'>+      compatible = "qcom,sm8250-sdhci", "qcom,sdhci-msm-v5";</div><div class='add'>+      reg = &lt;0 0x08804000 0 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "hc_irq", "pwr_irq";</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_SDCC2_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_SDCC2_APPS_CLK&gt;,</div><div class='add'>+               &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+      clock-names = "iface", "core", "xo";</div><div class='add'>+      iommus = &lt;&amp;apps_smmu 0x4a0 0x0&gt;;</div><div class='add'>+      qcom,dll-config = &lt;0x0007642c&gt;;</div><div class='add'>+      qcom,ddr-config = &lt;0x80040868&gt;;</div><div class='add'>+      power-domains = &lt;&amp;rpmhpd SM8250_CX&gt;;</div><div class='add'>+</div><div class='add'>+      operating-points-v2 = &lt;&amp;sdhc2_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+      sdhc2_opp_table: opp-table {</div><div class='add'>+        compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+        opp-19200000 {</div><div class='add'>+          opp-hz = /bits/ 64 &lt;19200000&gt;;</div><div class='add'>+          required-opps = &lt;&amp;rpmhpd_opp_min_svs&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        opp-50000000 {</div><div class='add'>+          opp-hz = /bits/ 64 &lt;50000000&gt;;</div><div class='add'>+          required-opps = &lt;&amp;rpmhpd_opp_low_svs&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        opp-100000000 {</div><div class='add'>+          opp-hz = /bits/ 64 &lt;100000000&gt;;</div><div class='add'>+          required-opps = &lt;&amp;rpmhpd_opp_svs&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        opp-202000000 {</div><div class='add'>+          opp-hz = /bits/ 64 &lt;202000000&gt;;</div><div class='add'>+          required-opps = &lt;&amp;rpmhpd_opp_svs_l1&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml<br/>index 1c87f4218e18..09455f9fa8de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/sdhci-pxa.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell PXA SDHCI v2/v3 bindings</div><div class='add'>+title: Marvell PXA SDHCI v1/v2/v3</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -34,6 +34,7 @@ allOf:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - mrvl,pxav1-mmc</div><div class='ctx'>       - mrvl,pxav2-mmc</div><div class='ctx'>       - mrvl,pxav3-mmc</div><div class='ctx'>       - marvell,armada-380-sdhci</div><div class='hunk'>@@ -61,6 +62,22 @@ properties:</div><div class='ctx'>       - const: io</div><div class='ctx'>       - const: core</div><div class='ctx'> </div><div class='add'>+  pinctrl-names:</div><div class='add'>+    description:</div><div class='add'>+      Optional for supporting PXA168 SDIO IRQ errata to switch CMD pin between</div><div class='add'>+      SDIO CMD and GPIO mode.</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: state_cmd_gpio</div><div class='add'>+</div><div class='add'>+  pinctrl-0:</div><div class='add'>+    description:</div><div class='add'>+      Should contain default pinctrl.</div><div class='add'>+</div><div class='add'>+  pinctrl-1:</div><div class='add'>+    description:</div><div class='add'>+      Should switch CMD pin to GPIO mode as a high output.</div><div class='add'>+</div><div class='ctx'>   mrvl,clk-delay-cycles:</div><div class='ctx'>     description: Specify a number of cycles to delay for tuning.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml<br/>index f300ced4cdf3..a43eb837f8da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/snps,dwcmshc-sdhci.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/snps,dwcmshc-sdhci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Synopsys Designware Mobile Storage Host Controller Binding</div><div class='add'>+title: Synopsys Designware Mobile Storage Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - rockchip,rk3568-dwcmshc</div><div class='add'>+      - rockchip,rk3588-dwcmshc</div><div class='ctx'>       - snps,dwcmshc-sdhci</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -44,6 +45,17 @@ properties:</div><div class='ctx'>       - const: block</div><div class='ctx'>       - const: timer</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: block</div><div class='add'>+      - const: timer</div><div class='add'>+</div><div class='ctx'>   rockchip,txclk-tapnum:</div><div class='ctx'>     description: Specify the number of delay for tx sampling.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint8</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml b/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml<br/>index a586fad0a46b..c71424aeaccd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml</a></div><div class='hunk'>@@ -55,6 +55,16 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='add'>+  socionext,syscon-uhs-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to syscon that configures UHS mode</div><div class='add'>+          - description: ID of SD instance</div><div class='add'>+    description:</div><div class='add'>+      A phandle to syscon with one argument that configures UHS mode.</div><div class='add'>+      The argument is the ID of SD instance.</div><div class='add'>+</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: mmc-controller.yaml</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml b/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml<br/>new file mode 100644<br/>index 000000000000..51e1b04e799f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/starfive,jh7110-mmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive Designware Mobile Storage Host Controller</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  StarFive uses the Synopsys designware mobile storage host controller</div><div class='add'>+  to interface a SoC with storage medium such as eMMC or SD/MMC cards.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: synopsys-dw-mshc-common.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - William Qiu &lt;william.qiu@starfivetech.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: starfive,jh7110-mmc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: biu clock</div><div class='add'>+      - description: ciu clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: biu</div><div class='add'>+      - const: ciu</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  starfive,sysreg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to System Register Controller syscon node</div><div class='add'>+          - description: offset of SYS_SYSCONSAIF__SYSCFG register for MMC controller</div><div class='add'>+          - description: shift of SYS_SYSCONSAIF__SYSCFG register for MMC controller</div><div class='add'>+          - description: mask of SYS_SYSCONSAIF__SYSCFG register for MMC controller</div><div class='add'>+    description:</div><div class='add'>+      Should be four parameters, the phandle to System Register Controller</div><div class='add'>+      syscon node and the offset/shift/mask of SYS_SYSCONSAIF__SYSCFG register</div><div class='add'>+      for MMC controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - starfive,sysreg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mmc@16010000 {</div><div class='add'>+        compatible = "starfive,jh7110-mmc";</div><div class='add'>+        reg = &lt;0x16010000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscrg 91&gt;,</div><div class='add'>+                 &lt;&amp;syscrg 93&gt;;</div><div class='add'>+        clock-names = "biu","ciu";</div><div class='add'>+        resets = &lt;&amp;syscrg 64&gt;;</div><div class='add'>+        reset-names = "reset";</div><div class='add'>+        interrupts = &lt;74&gt;;</div><div class='add'>+        fifo-depth = &lt;32&gt;;</div><div class='add'>+        fifo-watermark-aligned;</div><div class='add'>+        data-addr = &lt;0&gt;;</div><div class='add'>+        starfive,sysreg = &lt;&amp;sys_syscon 0x14 0x1a 0x7c000000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/sunplus,mmc.yaml b/Documentation/devicetree/bindings/mmc/sunplus,mmc.yaml<br/>new file mode 100644<br/>index 000000000000..611687166735<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/sunplus,mmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/sunplus,mmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Ltd. Co. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mmc/sunplus,mmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus MMC Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tony Huang &lt;tonyhuang.sunplus@gmail.com&gt;</div><div class='add'>+  - Li-hao Kuo &lt;lhjeff911@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mmc-controller.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - sunplus,sp7021-mmc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    mmc0: mmc@9c003b00 {</div><div class='add'>+        compatible = "sunplus,sp7021-mmc";</div><div class='add'>+        reg = &lt;0x9c003b00 0x180&gt;;</div><div class='add'>+        interrupts = &lt;20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc 0x4e&gt;;</div><div class='add'>+        resets = &lt;&amp;rstc 0x3e&gt;;</div><div class='add'>+        bus-width = &lt;8&gt;;</div><div class='add'>+        max-frequency = &lt;52000000&gt;;</div><div class='add'>+        non-removable;</div><div class='add'>+        disable-wp;</div><div class='add'>+        cap-mmc-highspeed;</div><div class='add'>+        mmc-ddr-3_3v;</div><div class='add'>+        no-sdio;</div><div class='add'>+        no-sd;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml<br/>index 8dfad89c78a7..6f11b2adf103 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Synopsys Designware Mobile Storage Host Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mmc-controller.yaml#"</div><div class='add'>+  - $ref: mmc-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml<br/>index ae6d6fca79e2..b13b5166d20a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml</a></div><div class='hunk'>@@ -4,10 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Synopsys Designware Mobile Storage Host Controller Binding</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "synopsys-dw-mshc-common.yaml#"</div><div class='add'>+title: Synopsys Designware Mobile Storage Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -38,6 +35,35 @@ properties:</div><div class='ctx'>       - const: biu</div><div class='ctx'>       - const: ciu</div><div class='ctx'> </div><div class='add'>+  altr,sysmgr-syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to the sysmgr node</div><div class='add'>+          - description: register offset that controls the SDMMC clock phase</div><div class='add'>+          - description: register shift for the smplsel(drive in) setting</div><div class='add'>+    description:</div><div class='add'>+      This property is optional. Contains the phandle to System Manager block</div><div class='add'>+      that contains the SDMMC clock-phase control register. The first value is</div><div class='add'>+      the pointer to the sysmgr, the 2nd value is the register offset for the</div><div class='add'>+      SDMMC clock phase register, and the 3rd value is the bit shift for the</div><div class='add'>+      smplsel(drive in) setting.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: synopsys-dw-mshc-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: altr,socfpga-dw-mshc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        altr,sysmgr-syscon: true</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        altr,sysmgr-syscon: false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml<br/>index c033ac3f147d..9a88870cd865 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml</a></div><div class='hunk'>@@ -4,19 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/allwinner,sun4i-a10-nand.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 NAND Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 NAND Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml"</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='del'>-  "#address-cells": true</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - allwinner,sun4i-a10-nand</div><div class='hunk'>@@ -49,12 +46,8 @@ properties:</div><div class='ctx'>   dma-names:</div><div class='ctx'>     const: rxtx</div><div class='ctx'> </div><div class='del'>-  pinctrl-names: true</div><div class='del'>-</div><div class='ctx'> patternProperties:</div><div class='del'>-  "^pinctrl-[0-9]+$": true</div><div class='del'>-</div><div class='del'>-  "^nand@[a-f0-9]+$":</div><div class='add'>+  "^nand@[a-f0-9]$":</div><div class='ctx'>     type: object</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -91,6 +84,29 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/sun6i-rtc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/sun8i-a23-a33-ccu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/sun8i-a23-a33-ccu.h&gt;</div><div class='add'>+</div><div class='add'>+    nand-controller@1c03000 {</div><div class='add'>+        compatible = "allwinner,sun8i-a23-nand-controller";</div><div class='add'>+        reg = &lt;0x01c03000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;ccu CLK_BUS_NAND&gt;, &lt;&amp;ccu CLK_NAND&gt;;</div><div class='add'>+        clock-names = "ahb", "mod";</div><div class='add'>+        resets = &lt;&amp;ccu RST_BUS_NAND&gt;;</div><div class='add'>+        reset-names = "ahb";</div><div class='add'>+        dmas = &lt;&amp;dma 5&gt;;</div><div class='add'>+        dma-names = "rxtx";</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;nand_pins &amp;nand_cs0_pin &amp;nand_rb0_pin&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt<br/>deleted file mode 100644<br/>index 5794ab1147c1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,60 +0,0 @@</div><div class='del'>-Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs</div><div class='del'>-</div><div class='del'>-This file documents the properties in addition to those available in</div><div class='del'>-the MTD NAND bindings.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : contains one of:</div><div class='del'>-  - "amlogic,meson-gxl-nfc"</div><div class='del'>-  - "amlogic,meson-axg-nfc"</div><div class='del'>-- clocks     :</div><div class='del'>-	A list of phandle + clock-specifier pairs for the clocks listed</div><div class='del'>-	in clock-names.</div><div class='del'>-</div><div class='del'>-- clock-names: Should contain the following:</div><div class='del'>-	"core" - NFC module gate clock</div><div class='del'>-	"device" - device clock from eMMC sub clock controller</div><div class='del'>-	"rx" - rx clock phase</div><div class='del'>-	"tx" - tx clock phase</div><div class='del'>-</div><div class='del'>-- amlogic,mmc-syscon	: Required for NAND clocks, it's shared with SD/eMMC</div><div class='del'>-				controller port C</div><div class='del'>-</div><div class='del'>-Optional children nodes:</div><div class='del'>-Children nodes represent the available nand chips.</div><div class='del'>-</div><div class='del'>-Other properties:</div><div class='del'>-see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.</div><div class='del'>-</div><div class='del'>-Example demonstrate on AXG SoC:</div><div class='del'>-</div><div class='del'>-	sd_emmc_c_clkc: mmc@7000 {</div><div class='del'>-		compatible = "amlogic,meson-axg-mmc-clkc", "syscon";</div><div class='del'>-		reg = &lt;0x0 0x7000 0x0 0x800&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	nand-controller@7800 {</div><div class='del'>-		compatible = "amlogic,meson-axg-nfc";</div><div class='del'>-		reg = &lt;0x0 0x7800 0x0 0x100&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 34 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;clkc CLKID_SD_EMMC_C&gt;,</div><div class='del'>-			&lt;&amp;sd_emmc_c_clkc CLKID_MMC_DIV&gt;,</div><div class='del'>-			&lt;&amp;sd_emmc_c_clkc CLKID_MMC_PHASE_RX&gt;,</div><div class='del'>-			&lt;&amp;sd_emmc_c_clkc CLKID_MMC_PHASE_TX&gt;;</div><div class='del'>-		clock-names = "core", "device", "rx", "tx";</div><div class='del'>-		amlogic,mmc-syscon = &lt;&amp;sd_emmc_c_clkc&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;nand_pins&gt;;</div><div class='del'>-</div><div class='del'>-		nand@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			nand-on-flash-bbt;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml<br/>new file mode 100644<br/>index 000000000000..28fb9a7dd70f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - liang.yang@amlogic.com</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson-gxl-nfc</div><div class='add'>+      - amlogic,meson-axg-nfc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: nfc</div><div class='add'>+      - const: emmc</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: device</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^nand@[0-7]$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+</div><div class='add'>+      nand-ecc-mode:</div><div class='add'>+        const: hw</div><div class='add'>+</div><div class='add'>+      nand-ecc-step-size:</div><div class='add'>+        const: 1024</div><div class='add'>+</div><div class='add'>+      nand-ecc-strength:</div><div class='add'>+        enum: [8, 16, 24, 30, 40, 50, 60]</div><div class='add'>+        description: |</div><div class='add'>+          The ECC configurations that can be supported are as follows.</div><div class='add'>+            meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60</div><div class='add'>+            meson-axg-nfc 8</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-clkc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    nand-controller@ffe07800 {</div><div class='add'>+      compatible = "amlogic,meson-axg-nfc";</div><div class='add'>+      reg = &lt;0xffe07800 0x100&gt;, &lt;0xffe07000 0x800&gt;;</div><div class='add'>+      reg-names = "nfc", "emmc";</div><div class='add'>+      interrupts = &lt;GIC_SPI 34 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+      clocks = &lt;&amp;clkc CLKID_SD_EMMC_C&gt;,  &lt;&amp;clkc CLKID_FCLK_DIV2&gt;;</div><div class='add'>+      clock-names = "core", "device";</div><div class='add'>+</div><div class='add'>+      pinctrl-0 = &lt;&amp;nand_pins&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      nand@0 {</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml<br/>index b32876933269..15b63bbb82a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/arasan,nand-controller.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/arasan,nand-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Arasan NAND Flash Controller with ONFI 3.1 support device tree bindings</div><div class='add'>+title: Arasan NAND Flash Controller with ONFI 3.1 support</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml"</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Naga Sureshkumar Relli &lt;naga.sureshkumar.relli@xilinx.com&gt;</div><div class='add'>+  - Michal Simek &lt;michal.simek@amd.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -35,9 +35,6 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  "#address-cells": true</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -45,7 +42,7 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: true</div><div class='add'>+unevaluatedProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml b/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml<br/>index 5f126bb9b202..7bd7c55a9c15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/arm,pl353-nand-r2p1.yaml</a></div><div class='hunk'>@@ -4,14 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/arm,pl353-nand-r2p1.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: PL353 NAND Controller device tree bindings</div><div class='add'>+title: PL353 NAND Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml"</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='del'>-  - Naga Sureshkumar Relli &lt;naga.sureshkumar.relli@xilinx.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -34,20 +33,20 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     smcc: memory-controller@e000e000 {</div><div class='del'>-      compatible = "arm,pl353-smc-r2p1", "arm,primecell";</div><div class='del'>-      reg = &lt;0xe000e000 0x0001000&gt;;</div><div class='del'>-      clock-names = "memclk", "apb_pclk";</div><div class='del'>-      clocks = &lt;&amp;clkc 11&gt;, &lt;&amp;clkc 44&gt;;</div><div class='del'>-      ranges = &lt;0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */</div><div class='del'>-                0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */</div><div class='del'>-                0x2 0x0 0xe4000000 0x2000000&gt;; /* SRAM/NOR CS1 region */</div><div class='del'>-      #address-cells = &lt;2&gt;;</div><div class='del'>-      #size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-      nfc0: nand-controller@0,0 {</div><div class='del'>-        compatible = "arm,pl353-nand-r2p1";</div><div class='del'>-        reg = &lt;0 0 0x1000000&gt;;</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-      };</div><div class='add'>+        compatible = "arm,pl353-smc-r2p1", "arm,primecell";</div><div class='add'>+        reg = &lt;0xe000e000 0x0001000&gt;;</div><div class='add'>+        clock-names = "memclk", "apb_pclk";</div><div class='add'>+        clocks = &lt;&amp;clkc 11&gt;, &lt;&amp;clkc 44&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */</div><div class='add'>+                  0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */</div><div class='add'>+                  0x2 0x0 0xe4000000 0x2000000&gt;; /* SRAM/NOR CS1 region */</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        nfc0: nand-controller@0,0 {</div><div class='add'>+            compatible = "arm,pl353-nand-r2p1";</div><div class='add'>+            reg = &lt;0 0 0x1000000&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/aspeed-smc.txt b/Documentation/devicetree/bindings/mtd/aspeed-smc.txt<br/>deleted file mode 100644<br/>index 49f6528ef547..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/aspeed-smc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/aspeed-smc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-* Aspeed Firmware Memory controller</div><div class='del'>-* Aspeed SPI Flash Memory Controller</div><div class='del'>-</div><div class='del'>-The Firmware Memory Controller in the Aspeed AST2500 SoC supports</div><div class='del'>-three chip selects, two of which are always of SPI type and the third</div><div class='del'>-can be SPI or NOR type flash. These bindings only describe SPI.</div><div class='del'>-</div><div class='del'>-The two SPI flash memory controllers in the AST2500 each support two</div><div class='del'>-chip selects.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible : Should be one of</div><div class='del'>-	"aspeed,ast2400-fmc" for the AST2400 Firmware Memory Controller</div><div class='del'>-	"aspeed,ast2400-spi" for the AST2400 SPI Flash memory Controller</div><div class='del'>-	"aspeed,ast2500-fmc" for the AST2500 Firmware Memory Controller</div><div class='del'>-	"aspeed,ast2500-spi" for the AST2500 SPI flash memory controllers</div><div class='del'>-</div><div class='del'>-  - reg : the first contains the control register location and length,</div><div class='del'>-          the second contains the memory window mapping address and length</div><div class='del'>-  - #address-cells : must be 1 corresponding to chip select child binding</div><div class='del'>-  - #size-cells : must be 0 corresponding to chip select child binding</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - interrupts : Should contain the interrupt for the dma device if an</div><div class='del'>-    FMC</div><div class='del'>-</div><div class='del'>-The child nodes are the SPI flash modules which must have a compatible</div><div class='del'>-property as specified in bindings/mtd/jedec,spi-nor.txt</div><div class='del'>-</div><div class='del'>-Optionally, the child node can contain properties for SPI mode (may be</div><div class='del'>-ignored):</div><div class='del'>-  - spi-max-frequency - max frequency of spi bus</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-fmc: fmc@1e620000 {</div><div class='del'>-	compatible = "aspeed,ast2500-fmc";</div><div class='del'>-	reg = &lt; 0x1e620000 0x94</div><div class='del'>-		0x20000000 0x02000000 &gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	interrupts = &lt;19&gt;;</div><div class='del'>-	flash@0 {</div><div class='del'>-		reg = &lt; 0 &gt;;</div><div class='del'>-		compatible = "jedec,spi-nor";</div><div class='del'>-		/* spi-max-frequency = &lt;&gt;; */</div><div class='del'>-		/* m25p,fast-read; */</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/atmel-nand.txt b/Documentation/devicetree/bindings/mtd/atmel-nand.txt<br/>index 3aa297c97ab6..50645828ac20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/atmel-nand.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/atmel-nand.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/atmel-nand.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/atmel-nand.txt</a></div><div class='hunk'>@@ -45,10 +45,8 @@ Optional properties:</div><div class='ctx'> - atmel,rb: an integer identifying the native Ready/Busy pin. Only meaningful</div><div class='ctx'> 	    on sama5 SoCs.</div><div class='ctx'> </div><div class='del'>-All generic properties described in</div><div class='del'>-Documentation/devicetree/bindings/mtd/{common,nand}.txt also apply to the NAND</div><div class='del'>-device node, and NAND partitions should be defined under the NAND node as</div><div class='del'>-described in Documentation/devicetree/bindings/mtd/partition.txt.</div><div class='add'>+All generic properties are described in the generic yaml files under</div><div class='add'>+Documentation/devicetree/bindings/mtd/.</div><div class='ctx'> </div><div class='ctx'> * ECC engine (PMECC) bindings:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml<br/>index dd5a64969e37..1571024aa119 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml</a></div><div class='hunk'>@@ -86,15 +86,15 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - description: NAND CTLRDY interrupt</div><div class='del'>-      - description: FLASH_DMA_DONE if flash DMA is available</div><div class='del'>-      - description: FLASH_EDU_DONE if EDU is available</div><div class='add'>+      - description: FLASH_DMA_DONE (if flash DMA is available) or FLASH_EDU_DONE (if EDU is available)</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: nand_ctlrdy</div><div class='del'>-      - const: flash_dma_done</div><div class='del'>-      - const: flash_edu_done</div><div class='add'>+      - enum:</div><div class='add'>+          - flash_dma_done</div><div class='add'>+          - flash_edu_done</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -173,6 +173,13 @@ allOf:</div><div class='ctx'>             - const: nand</div><div class='ctx'>             - const: iproc-idm</div><div class='ctx'>             - const: iproc-ext</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupt-names</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -184,51 +191,52 @@ required:</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     nand-controller@f0442800 {</div><div class='del'>-            compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";</div><div class='del'>-            reg = &lt;0xf0442800 0x600&gt;,</div><div class='del'>-                  &lt;0xf0443000 0x100&gt;;</div><div class='del'>-            reg-names = "nand", "flash-dma";</div><div class='del'>-            interrupt-parent = &lt;&amp;hif_intr2_intc&gt;;</div><div class='del'>-            interrupts = &lt;24&gt;, &lt;4&gt;;</div><div class='add'>+        compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";</div><div class='add'>+        reg = &lt;0xf0442800 0x600&gt;,</div><div class='add'>+              &lt;0xf0443000 0x100&gt;;</div><div class='add'>+        reg-names = "nand", "flash-dma";</div><div class='add'>+        interrupt-parent = &lt;&amp;hif_intr2_intc&gt;;</div><div class='add'>+        interrupts = &lt;24&gt;, &lt;4&gt;;</div><div class='add'>+        interrupt-names = "nand_ctlrdy", "flash_dma_done";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        nand@1 {</div><div class='add'>+            compatible = "brcm,nandcs";</div><div class='add'>+            reg = &lt;1&gt;; // Chip select 1</div><div class='add'>+            nand-on-flash-bbt;</div><div class='add'>+            nand-ecc-strength = &lt;12&gt;;</div><div class='add'>+            nand-ecc-step-size = &lt;512&gt;;</div><div class='ctx'> </div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            nand@1 {</div><div class='del'>-                    compatible = "brcm,nandcs";</div><div class='del'>-                    reg = &lt;1&gt;; // Chip select 1</div><div class='del'>-                    nand-on-flash-bbt;</div><div class='del'>-                    nand-ecc-strength = &lt;12&gt;;</div><div class='del'>-                    nand-ecc-step-size = &lt;512&gt;;</div><div class='del'>-</div><div class='del'>-                    #address-cells = &lt;1&gt;;</div><div class='del'>-                    #size-cells = &lt;1&gt;;</div><div class='del'>-            };</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'>   - |</div><div class='ctx'>     nand-controller@10000200 {</div><div class='del'>-            compatible = "brcm,nand-bcm63168", "brcm,nand-bcm6368",</div><div class='del'>-                         "brcm,brcmnand-v4.0", "brcm,brcmnand";</div><div class='del'>-            reg = &lt;0x10000200 0x180&gt;,</div><div class='del'>-                  &lt;0x100000b0 0x10&gt;,</div><div class='del'>-                  &lt;0x10000600 0x200&gt;;</div><div class='del'>-            reg-names = "nand", "nand-int-base", "nand-cache";</div><div class='del'>-            interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='del'>-            interrupts = &lt;50&gt;;</div><div class='del'>-            clocks = &lt;&amp;periph_clk 20&gt;;</div><div class='del'>-            clock-names = "nand";</div><div class='add'>+        compatible = "brcm,nand-bcm63168", "brcm,nand-bcm6368",</div><div class='add'>+                     "brcm,brcmnand-v4.0", "brcm,brcmnand";</div><div class='add'>+        reg = &lt;0x10000200 0x180&gt;,</div><div class='add'>+              &lt;0x100000b0 0x10&gt;,</div><div class='add'>+              &lt;0x10000600 0x200&gt;;</div><div class='add'>+        reg-names = "nand", "nand-int-base", "nand-cache";</div><div class='add'>+        interrupt-parent = &lt;&amp;periph_intc&gt;;</div><div class='add'>+        interrupts = &lt;50&gt;;</div><div class='add'>+        clocks = &lt;&amp;periph_clk 20&gt;;</div><div class='add'>+        clock-names = "nand";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        nand@0 {</div><div class='add'>+            compatible = "brcm,nandcs";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            nand-on-flash-bbt;</div><div class='add'>+            nand-ecc-strength = &lt;1&gt;;</div><div class='add'>+            nand-ecc-step-size = &lt;512&gt;;</div><div class='ctx'> </div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            nand@0 {</div><div class='del'>-                    compatible = "brcm,nandcs";</div><div class='del'>-                    reg = &lt;0&gt;;</div><div class='del'>-                    nand-on-flash-bbt;</div><div class='del'>-                    nand-ecc-strength = &lt;1&gt;;</div><div class='del'>-                    nand-ecc-step-size = &lt;512&gt;;</div><div class='del'>-</div><div class='del'>-                    #address-cells = &lt;1&gt;;</div><div class='del'>-                    #size-cells = &lt;1&gt;;</div><div class='del'>-            };</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/common.txt b/Documentation/devicetree/bindings/mtd/common.txt<br/>deleted file mode 100644<br/>index ae16f9ea8606..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/common.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/common.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-This file has been moved to mtd.yaml.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/denali,nand.yaml b/Documentation/devicetree/bindings/mtd/denali,nand.yaml<br/>index 1307ed7e7fc6..0be83ad42970 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/denali,nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/denali,nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/denali,nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/denali,nand.yaml</a></div><div class='hunk'>@@ -145,6 +145,6 @@ examples:</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         nand@0 {</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/elm.txt b/Documentation/devicetree/bindings/mtd/elm.txt<br/>deleted file mode 100644<br/>index 59ddc61c1076..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/elm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/elm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-Error location module</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Must be "ti,am3352-elm"</div><div class='del'>-- reg: physical base address and size of the registers map.</div><div class='del'>-- interrupts: Interrupt number for the elm.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- ti,hwmods: Name of the hwmod associated to the elm</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-elm: elm@0 {</div><div class='del'>-	compatible = "ti,am3352-elm";</div><div class='del'>-	reg = &lt;0x48080000 0x2000&gt;;</div><div class='del'>-	interrupts = &lt;4&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml b/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml<br/>index 9d764e654e1d..ba086c34626d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/gpmi-nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/gpmi-nand.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale General-Purpose Media Interface (GPMI) binding</div><div class='add'>+title: Freescale General-Purpose Media Interface (GPMI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Han Xu &lt;han.xu@nxp.com&gt;</div><div class='hunk'>@@ -93,7 +93,7 @@ required:</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml"</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -147,8 +147,6 @@ allOf:</div><div class='ctx'>             - description: SoC gpmi io clock</div><div class='ctx'>             - description: SoC gpmi bch apb clock</div><div class='ctx'>         clock-names:</div><div class='del'>-          minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='ctx'>           items:</div><div class='ctx'>             - const: gpmi_io</div><div class='ctx'>             - const: gpmi_bch_apb</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt b/Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt<br/>index 74981520d6dd..a99de13c7ccd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/hisilicon,fmc-spi-nor.txt</a></div><div class='hunk'>@@ -17,7 +17,7 @@ spi-nor-controller@10000000 {</div><div class='ctx'> 	reg = &lt;0x10000000 0x1000&gt;, &lt;0x14000000 0x1000000&gt;;</div><div class='ctx'> 	reg-names = "control", "memory";</div><div class='ctx'> 	clocks = &lt;&amp;clock HI3519_FMC_CLK&gt;;</div><div class='del'>-	spi-nor@0 {</div><div class='add'>+	flash@0 {</div><div class='ctx'> 		compatible = "jedec,spi-nor";</div><div class='ctx'> 		reg = &lt;0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml<br/>index 9de8ef6e59ca..a7bdb5d3675c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ingenic,nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/ingenic,nand.yaml</a></div><div class='hunk'>@@ -4,13 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs NAND controller devicetree bindings</div><div class='add'>+title: Ingenic SoCs NAND controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: nand-controller.yaml#</div><div class='add'>+  - $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -31,9 +32,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   partitions:</div><div class='ctx'>     type: object</div><div class='add'>+    deprecated: true</div><div class='ctx'>     description:</div><div class='ctx'>       Node containing description of fixed partitions.</div><div class='del'>-      See Documentation/devicetree/bindings/mtd/partition.txt</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^nand@[a-f0-9]$":</div><div class='hunk'>@@ -57,78 +58,78 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/ingenic,jz4780-cgu.h&gt;</div><div class='ctx'>     memory-controller@13410000 {</div><div class='del'>-      compatible = "ingenic,jz4780-nemc";</div><div class='del'>-      reg = &lt;0x13410000 0x10000&gt;;</div><div class='del'>-      #address-cells = &lt;2&gt;;</div><div class='del'>-      #size-cells = &lt;1&gt;;</div><div class='del'>-      ranges = &lt;1 0 0x1b000000 0x1000000&gt;,</div><div class='del'>-         &lt;2 0 0x1a000000 0x1000000&gt;,</div><div class='del'>-         &lt;3 0 0x19000000 0x1000000&gt;,</div><div class='del'>-         &lt;4 0 0x18000000 0x1000000&gt;,</div><div class='del'>-         &lt;5 0 0x17000000 0x1000000&gt;,</div><div class='del'>-         &lt;6 0 0x16000000 0x1000000&gt;;</div><div class='del'>-</div><div class='del'>-      clocks = &lt;&amp;cgu JZ4780_CLK_NEMC&gt;;</div><div class='del'>-</div><div class='del'>-      nand-controller@1 {</div><div class='del'>-        compatible = "ingenic,jz4780-nand";</div><div class='del'>-        reg = &lt;1 0 0x1000000&gt;;</div><div class='del'>-</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-        ecc-engine = &lt;&amp;bch&gt;;</div><div class='del'>-</div><div class='del'>-        ingenic,nemc-tAS = &lt;10&gt;;</div><div class='del'>-        ingenic,nemc-tAH = &lt;5&gt;;</div><div class='del'>-        ingenic,nemc-tBP = &lt;10&gt;;</div><div class='del'>-        ingenic,nemc-tAW = &lt;15&gt;;</div><div class='del'>-        ingenic,nemc-tSTRV = &lt;100&gt;;</div><div class='del'>-</div><div class='del'>-        pinctrl-names = "default";</div><div class='del'>-        pinctrl-0 = &lt;&amp;pins_nemc&gt;;</div><div class='del'>-</div><div class='del'>-        nand@1 {</div><div class='del'>-          reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-          nand-ecc-step-size = &lt;1024&gt;;</div><div class='del'>-          nand-ecc-strength = &lt;24&gt;;</div><div class='del'>-          nand-ecc-mode = "hw";</div><div class='del'>-          nand-on-flash-bbt;</div><div class='del'>-</div><div class='del'>-          pinctrl-names = "default";</div><div class='del'>-          pinctrl-0 = &lt;&amp;pins_nemc_cs1&gt;;</div><div class='del'>-</div><div class='del'>-          partitions {</div><div class='del'>-            compatible = "fixed-partitions";</div><div class='del'>-            #address-cells = &lt;2&gt;;</div><div class='del'>-            #size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-            partition@0 {</div><div class='del'>-              label = "u-boot-spl";</div><div class='del'>-              reg = &lt;0x0 0x0 0x0 0x800000&gt;;</div><div class='add'>+        compatible = "ingenic,jz4780-nemc";</div><div class='add'>+        reg = &lt;0x13410000 0x10000&gt;;</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;1 0 0x1b000000 0x1000000&gt;,</div><div class='add'>+                 &lt;2 0 0x1a000000 0x1000000&gt;,</div><div class='add'>+                 &lt;3 0 0x19000000 0x1000000&gt;,</div><div class='add'>+                 &lt;4 0 0x18000000 0x1000000&gt;,</div><div class='add'>+                 &lt;5 0 0x17000000 0x1000000&gt;,</div><div class='add'>+                 &lt;6 0 0x16000000 0x1000000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;cgu JZ4780_CLK_NEMC&gt;;</div><div class='add'>+</div><div class='add'>+        nand-controller@1 {</div><div class='add'>+            compatible = "ingenic,jz4780-nand";</div><div class='add'>+            reg = &lt;1 0 0x1000000&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ecc-engine = &lt;&amp;bch&gt;;</div><div class='add'>+</div><div class='add'>+            ingenic,nemc-tAS = &lt;10&gt;;</div><div class='add'>+            ingenic,nemc-tAH = &lt;5&gt;;</div><div class='add'>+            ingenic,nemc-tBP = &lt;10&gt;;</div><div class='add'>+            ingenic,nemc-tAW = &lt;15&gt;;</div><div class='add'>+            ingenic,nemc-tSTRV = &lt;100&gt;;</div><div class='add'>+</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pins_nemc&gt;;</div><div class='add'>+</div><div class='add'>+            nand@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                nand-ecc-step-size = &lt;1024&gt;;</div><div class='add'>+                nand-ecc-strength = &lt;24&gt;;</div><div class='add'>+                nand-ecc-mode = "hw";</div><div class='add'>+                nand-on-flash-bbt;</div><div class='add'>+</div><div class='add'>+                pinctrl-names = "default";</div><div class='add'>+                pinctrl-0 = &lt;&amp;pins_nemc_cs1&gt;;</div><div class='add'>+</div><div class='add'>+                partitions {</div><div class='add'>+                    compatible = "fixed-partitions";</div><div class='add'>+                    #address-cells = &lt;2&gt;;</div><div class='add'>+                    #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                    partition@0 {</div><div class='add'>+                        label = "u-boot-spl";</div><div class='add'>+                        reg = &lt;0x0 0x0 0x0 0x800000&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    partition@800000 {</div><div class='add'>+                        label = "u-boot";</div><div class='add'>+                        reg = &lt;0x0 0x800000 0x0 0x200000&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    partition@a00000 {</div><div class='add'>+                        label = "u-boot-env";</div><div class='add'>+                        reg = &lt;0x0 0xa00000 0x0 0x200000&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    partition@c00000 {</div><div class='add'>+                        label = "boot";</div><div class='add'>+                        reg = &lt;0x0 0xc00000 0x0 0x4000000&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    partition@4c00000 {</div><div class='add'>+                        label = "system";</div><div class='add'>+                        reg = &lt;0x0 0x4c00000 0x1 0xfb400000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='ctx'>             };</div><div class='del'>-</div><div class='del'>-            partition@800000 {</div><div class='del'>-              label = "u-boot";</div><div class='del'>-              reg = &lt;0x0 0x800000 0x0 0x200000&gt;;</div><div class='del'>-            };</div><div class='del'>-</div><div class='del'>-            partition@a00000 {</div><div class='del'>-              label = "u-boot-env";</div><div class='del'>-              reg = &lt;0x0 0xa00000 0x0 0x200000&gt;;</div><div class='del'>-            };</div><div class='del'>-</div><div class='del'>-            partition@c00000 {</div><div class='del'>-              label = "boot";</div><div class='del'>-              reg = &lt;0x0 0xc00000 0x0 0x4000000&gt;;</div><div class='del'>-            };</div><div class='del'>-</div><div class='del'>-            partition@4c00000 {</div><div class='del'>-              label = "system";</div><div class='del'>-              reg = &lt;0x0 0x4c00000 0x1 0xfb400000&gt;;</div><div class='del'>-            };</div><div class='del'>-          };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml<br/>new file mode 100644<br/>index 000000000000..cc3def758e00<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/intel,lgm-ebunand.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Intel LGM SoC NAND Controller</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ramuthevar Vadivel Murugan &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: intel,lgm-ebunand</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ebunand</div><div class='add'>+      - const: hsnand</div><div class='add'>+      - const: nand_cs0</div><div class='add'>+      - const: nand_cs1</div><div class='add'>+      - const: addr_sel0</div><div class='add'>+      - const: addr_sel1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^nand@[a-f0-9]$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+</div><div class='add'>+      nand-ecc-mode: true</div><div class='add'>+</div><div class='add'>+      nand-ecc-algo:</div><div class='add'>+        const: hw</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    nand-controller@e0f00000 {</div><div class='add'>+        compatible = "intel,lgm-ebunand";</div><div class='add'>+        reg = &lt;0xe0f00000 0x100&gt;,</div><div class='add'>+              &lt;0xe1000000 0x300&gt;,</div><div class='add'>+              &lt;0xe1400000 0x8000&gt;,</div><div class='add'>+              &lt;0xe1c00000 0x1000&gt;,</div><div class='add'>+              &lt;0x17400000 0x4&gt;,</div><div class='add'>+              &lt;0x17c00000 0x4&gt;;</div><div class='add'>+        reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",</div><div class='add'>+                    "addr_sel0", "addr_sel1";</div><div class='add'>+        clocks = &lt;&amp;cgu0 125&gt;;</div><div class='add'>+        dmas = &lt;&amp;dma0 8&gt;, &lt;&amp;dma0 9&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        nand@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            nand-ecc-mode = "hw";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml<br/>deleted file mode 100644<br/>index 30e0c66ab0eb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,99 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/mtd/intel,lgm-nand.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Intel LGM SoC NAND Controller Device Tree Bindings</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml"</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Ramuthevar Vadivel Murugan &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: intel,lgm-nand</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 6</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: ebunand</div><div class='del'>-      - const: hsnand</div><div class='del'>-      - const: nand_cs0</div><div class='del'>-      - const: nand_cs1</div><div class='del'>-      - const: addr_sel0</div><div class='del'>-      - const: addr_sel1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  dmas:</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='del'>-  dma-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: tx</div><div class='del'>-      - const: rx</div><div class='del'>-</div><div class='del'>-  "#address-cells":</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  "#size-cells":</div><div class='del'>-    const: 0</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^nand@[a-f0-9]+$":</div><div class='del'>-    type: object</div><div class='del'>-    properties:</div><div class='del'>-      reg:</div><div class='del'>-        minimum: 0</div><div class='del'>-        maximum: 7</div><div class='del'>-</div><div class='del'>-      nand-ecc-mode: true</div><div class='del'>-</div><div class='del'>-      nand-ecc-algo:</div><div class='del'>-        const: hw</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - clocks</div><div class='del'>-  - dmas</div><div class='del'>-  - dma-names</div><div class='del'>-  - "#address-cells"</div><div class='del'>-  - "#size-cells"</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    nand-controller@e0f00000 {</div><div class='del'>-      compatible = "intel,lgm-nand";</div><div class='del'>-      reg = &lt;0xe0f00000 0x100&gt;,</div><div class='del'>-            &lt;0xe1000000 0x300&gt;,</div><div class='del'>-            &lt;0xe1400000 0x8000&gt;,</div><div class='del'>-            &lt;0xe1c00000 0x1000&gt;,</div><div class='del'>-            &lt;0x17400000 0x4&gt;,</div><div class='del'>-            &lt;0x17c00000 0x4&gt;;</div><div class='del'>-      reg-names = "ebunand", "hsnand", "nand_cs0", "nand_cs1",</div><div class='del'>-        "addr_sel0", "addr_sel1";</div><div class='del'>-      clocks = &lt;&amp;cgu0 125&gt;;</div><div class='del'>-      dmas = &lt;&amp;dma0 8&gt;, &lt;&amp;dma0 9&gt;;</div><div class='del'>-      dma-names = "tx", "rx";</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-      nand@0 {</div><div class='del'>-        reg = &lt;0&gt;;</div><div class='del'>-        nand-ecc-mode = "hw";</div><div class='del'>-      };</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml<br/>index 4abfb4cfc157..89959e5c47ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mtd.yaml#"</div><div class='add'>+  - $ref: mtd.yaml#</div><div class='ctx'>   - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -50,10 +50,6 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-  spi-rx-bus-width: true</div><div class='del'>-  spi-tx-bus-width: true</div><div class='del'>-</div><div class='ctx'>   m25p,fast-read:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description:</div><div class='hunk'>@@ -74,37 +70,34 @@ properties:</div><div class='ctx'>       be used on such systems, to denote the absence of a reliable reset</div><div class='ctx'>       mechanism.</div><div class='ctx'> </div><div class='del'>-  label: true</div><div class='del'>-</div><div class='del'>-  partitions:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-  '#address-cells': true</div><div class='del'>-  '#size-cells': true</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      A GPIO line connected to the RESET (active low) signal of the device.</div><div class='add'>+      If "broken-flash-reset" is present then having this property does not</div><div class='add'>+      make any difference.</div><div class='ctx'> </div><div class='del'>-patternProperties:</div><div class='del'>-  # Note: use 'partitions' node for new users</div><div class='del'>-  '^partition@':</div><div class='del'>-    type: object</div><div class='add'>+  spi-cpol: true</div><div class='add'>+  spi-cpha: true</div><div class='ctx'> </div><div class='del'>-  "^otp(-[0-9]+)?$":</div><div class='del'>-    type: object</div><div class='add'>+dependencies:</div><div class='add'>+  spi-cpol: [ spi-cpha ]</div><div class='add'>+  spi-cpha: [ spi-cpol ]</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         flash@0 {</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;1&gt;;</div><div class='ctx'>             compatible = "spansion,m25p80", "jedec,spi-nor";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             spi-max-frequency = &lt;40000000&gt;;</div><div class='ctx'>             m25p,fast-read;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 12 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt b/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt<br/>index 6d60bc3063f5..64c06aa05ac7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/lpc32xx-mlc.txt</a></div><div class='hunk'>@@ -19,7 +19,7 @@ accuracy:)</div><div class='ctx'> - nxp,wr_low: WR_LOW</div><div class='ctx'> </div><div class='ctx'> Optional subnodes:</div><div class='del'>-- Partitions, see Documentation/devicetree/bindings/mtd/partition.txt</div><div class='add'>+- Partitions, see Documentation/devicetree/bindings/mtd/mtd.yaml</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt b/Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt<br/>index d94edc0fc554..39f17630a301 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/lpc32xx-slc.txt</a></div><div class='hunk'>@@ -20,7 +20,7 @@ clock speed:)</div><div class='ctx'> - nxp,rsetup: Read setup time (R_SETUP)</div><div class='ctx'> </div><div class='ctx'> Optional subnodes:</div><div class='del'>-- Partitions, see Documentation/devicetree/bindings/mtd/partition.txt</div><div class='add'>+- Partitions, see Documentation/devicetree/bindings/mtd/mtd.yaml</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml b/Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml<br/>new file mode 100644<br/>index 000000000000..a6e7f123eda7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/mediatek,mtk-nfc.yaml</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek(MTK) SoCs raw NAND FLASH controller (NFC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Xiangsheng Hou &lt;xiangsheng.hou@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt2701-nfc</div><div class='add'>+      - mediatek,mt2712-nfc</div><div class='add'>+      - mediatek,mt7622-nfc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Base physical address and size of NFI.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: NFI interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock used for the controller</div><div class='add'>+      - description: clock used for the pad</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: nfi_clk</div><div class='add'>+      - const: pad_clk</div><div class='add'>+</div><div class='add'>+  ecc-engine:</div><div class='add'>+    description: device-tree node of the required ECC engine.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^nand@[a-f0-9]$":</div><div class='add'>+    $ref: nand-chip.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maximum: 1</div><div class='add'>+      nand-on-flash-bbt: true</div><div class='add'>+      nand-ecc-mode:</div><div class='add'>+        const: hw</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nand-controller.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt2701-nfc</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^nand@[a-f0-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            nand-ecc-step-size:</div><div class='add'>+              enum: [ 512, 1024 ]</div><div class='add'>+            nand-ecc-strength:</div><div class='add'>+              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,</div><div class='add'>+                     40, 44, 48, 52, 56, 60]</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt2712-nfc</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^nand@[a-f0-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            nand-ecc-step-size:</div><div class='add'>+              enum: [ 512, 1024 ]</div><div class='add'>+            nand-ecc-strength:</div><div class='add'>+              enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,</div><div class='add'>+                     40, 44, 48, 52, 56, 60, 68, 72, 80]</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt7622-nfc</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^nand@[a-f0-9]$":</div><div class='add'>+          properties:</div><div class='add'>+            nand-ecc-step-size:</div><div class='add'>+              const: 512</div><div class='add'>+            nand-ecc-strength:</div><div class='add'>+              enum: [4, 6, 8, 10, 12]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - ecc-engine</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt2701-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        nand-controller@1100d000 {</div><div class='add'>+            compatible = "mediatek,mt2701-nfc";</div><div class='add'>+            reg = &lt;0 0x1100d000 0 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            clocks = &lt;&amp;pericfg CLK_PERI_NFI&gt;,</div><div class='add'>+                     &lt;&amp;pericfg CLK_PERI_NFI_PAD&gt;;</div><div class='add'>+            clock-names = "nfi_clk", "pad_clk";</div><div class='add'>+            ecc-engine = &lt;&amp;bch&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            nand@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                nand-on-flash-bbt;</div><div class='add'>+                nand-ecc-mode = "hw";</div><div class='add'>+                nand-ecc-step-size = &lt;1024&gt;;</div><div class='add'>+                nand-ecc-strength = &lt;24&gt;;</div><div class='add'>+</div><div class='add'>+                partitions {</div><div class='add'>+                    compatible = "fixed-partitions";</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    preloader@0 {</div><div class='add'>+                        label = "pl";</div><div class='add'>+                        read-only;</div><div class='add'>+                        reg = &lt;0x0 0x400000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                    android@400000 {</div><div class='add'>+                        label = "android";</div><div class='add'>+                        reg = &lt;0x400000 0x12c00000&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml b/Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml<br/>new file mode 100644<br/>index 000000000000..505baf1e8830<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/mediatek,nand-ecc-engine.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/mediatek,nand-ecc-engine.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek(MTK) SoCs NAND ECC engine</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Xiangsheng Hou &lt;xiangsheng.hou@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MTK NAND ECC engine can cowork with MTK raw NAND and SPI NAND controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt2701-ecc</div><div class='add'>+      - mediatek,mt2712-ecc</div><div class='add'>+      - mediatek,mt7622-ecc</div><div class='add'>+      - mediatek,mt7986-ecc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Base physical address and size of ECC.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: ECC interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: nfiecc_clk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt2701-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        bch: ecc@1100e000 {</div><div class='add'>+            compatible = "mediatek,mt2701-ecc";</div><div class='add'>+            reg = &lt;0 0x1100e000 0 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            clocks = &lt;&amp;pericfg CLK_PERI_NFI_ECC&gt;;</div><div class='add'>+            clock-names = "nfiecc_clk";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml b/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml<br/>index 2cdf6bf3dc4a..00882892f47e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/microchip,mchp48l640.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/mtd/microchip,mchp48l640.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: Microchip 48l640 (and similar) serial EERAM bindings</div><div class='add'>+title: Microchip 48l640 (and similar) serial EERAM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Schocher &lt;hs@denx.de&gt;</div><div class='hunk'>@@ -22,24 +22,25 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-      eeram@0 {</div><div class='del'>-        compatible = "microchip,48l640";</div><div class='del'>-        reg = &lt;0&gt;;</div><div class='del'>-        spi-max-frequency = &lt;20000000&gt;;</div><div class='del'>-      };</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        eeram@0 {</div><div class='add'>+            compatible = "microchip,48l640";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;20000000&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml b/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml<br/>index 82eb4e0f453b..f8c976898a95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mtd-physmap.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/mtd-physmap.yaml</a></div><div class='hunk'>@@ -13,6 +13,10 @@ description: |</div><div class='ctx'>   Flash chips (Memory Technology Devices) are often used for solid state</div><div class='ctx'>   file systems on embedded devices.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mtd.yaml#</div><div class='add'>+  - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -121,10 +125,6 @@ properties:</div><div class='ctx'>   big-endian: true</div><div class='ctx'>   little-endian: true</div><div class='ctx'> </div><div class='del'>-patternProperties:</div><div class='del'>-  '@[0-9a-f]+$':</div><div class='del'>-    $ref: partitions/partition.yaml</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mtd.yaml b/Documentation/devicetree/bindings/mtd/mtd.yaml<br/>index 376b679cfc70..da3d488c335f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mtd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mtd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mtd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/mtd.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/mtd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MTD (Memory Technology Device) Device Tree Bindings</div><div class='add'>+title: MTD (Memory Technology Device)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='del'>-    pattern: "^flash(@.*)?$"</div><div class='add'>+    pattern: "^(flash|.*sram)(@.*)?$"</div><div class='ctx'> </div><div class='ctx'>   label:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -21,10 +21,30 @@ properties:</div><div class='ctx'>       based name) in order to ease flash device identification and/or</div><div class='ctx'>       describe what they are used for.</div><div class='ctx'> </div><div class='add'>+  '#address-cells':</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  partitions:</div><div class='add'>+    $ref: /schemas/mtd/partitions/partitions.yaml</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='add'>+  "@[0-9a-f]+$":</div><div class='add'>+    $ref: partitions/partition.yaml</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  "^partition@[0-9a-f]+":</div><div class='add'>+    $ref: partitions/partition.yaml</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='ctx'>   "^otp(-[0-9]+)?$":</div><div class='del'>-    type: object</div><div class='ctx'>     $ref: ../nvmem/nvmem.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     description: |</div><div class='ctx'>       An OTP memory region. Some flashes provide a one-time-programmable</div><div class='hunk'>@@ -40,6 +60,7 @@ patternProperties:</div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='ctx'> </div><div class='add'>+# This is a generic file other binding inherit from</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mtk-nand.txt b/Documentation/devicetree/bindings/mtd/mtk-nand.txt<br/>deleted file mode 100644<br/>index 4d3ec5e4ff8a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mtk-nand.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mtk-nand.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,176 +0,0 @@</div><div class='del'>-MTK SoCs NAND FLASH controller (NFC) DT binding</div><div class='del'>-</div><div class='del'>-This file documents the device tree bindings for MTK SoCs NAND controllers.</div><div class='del'>-The functional split of the controller requires two drivers to operate:</div><div class='del'>-the nand controller interface driver and the ECC engine driver.</div><div class='del'>-</div><div class='del'>-The hardware description for both devices must be captured as device</div><div class='del'>-tree nodes.</div><div class='del'>-</div><div class='del'>-1) NFC NAND Controller Interface (NFI):</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-The first part of NFC is NAND Controller Interface (NFI) HW.</div><div class='del'>-Required NFI properties:</div><div class='del'>-- compatible:			Should be one of</div><div class='del'>-				"mediatek,mt2701-nfc",</div><div class='del'>-				"mediatek,mt2712-nfc",</div><div class='del'>-				"mediatek,mt7622-nfc".</div><div class='del'>-- reg:				Base physical address and size of NFI.</div><div class='del'>-- interrupts:			Interrupts of NFI.</div><div class='del'>-- clocks:			NFI required clocks.</div><div class='del'>-- clock-names:			NFI clocks internal name.</div><div class='del'>-- ecc-engine:			Required ECC Engine node.</div><div class='del'>-- #address-cells:		NAND chip index, should be 1.</div><div class='del'>-- #size-cells:			Should be 0.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	nandc: nfi@1100d000 {</div><div class='del'>-		compatible = "mediatek,mt2701-nfc";</div><div class='del'>-		reg = &lt;0 0x1100d000 0 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;pericfg CLK_PERI_NFI&gt;,</div><div class='del'>-			 &lt;&amp;pericfg CLK_PERI_NFI_PAD&gt;;</div><div class='del'>-		clock-names = "nfi_clk", "pad_clk";</div><div class='del'>-		ecc-engine = &lt;&amp;bch&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-Platform related properties, should be set in {platform_name}.dts:</div><div class='del'>-- children nodes:	NAND chips.</div><div class='del'>-</div><div class='del'>-Children nodes properties:</div><div class='del'>-- reg:			Chip Select Signal, default 0.</div><div class='del'>-			Set as reg = &lt;0&gt;, &lt;1&gt; when need 2 CS.</div><div class='del'>-Optional:</div><div class='del'>-- nand-on-flash-bbt:	Store BBT on NAND Flash.</div><div class='del'>-- nand-ecc-mode:	the NAND ecc mode (check driver for supported modes)</div><div class='del'>-- nand-ecc-step-size:	Number of data bytes covered by a single ECC step.</div><div class='del'>-			valid values:</div><div class='del'>-			512 and 1024 on mt2701 and mt2712.</div><div class='del'>-			512 only on mt7622.</div><div class='del'>-			1024 is recommended for large page NANDs.</div><div class='del'>-- nand-ecc-strength:	Number of bits to correct per ECC step.</div><div class='del'>-			The valid values that each controller supports:</div><div class='del'>-			mt2701: 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28,</div><div class='del'>-				32, 36, 40, 44, 48, 52, 56, 60.</div><div class='del'>-			mt2712: 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28,</div><div class='del'>-				32, 36, 40, 44, 48, 52, 56, 60, 68, 72, 80.</div><div class='del'>-			mt7622: 4, 6, 8, 10, 12, 14, 16.</div><div class='del'>-			The strength should be calculated as follows:</div><div class='del'>-			E = (S - F) * 8 / B</div><div class='del'>-			S = O / (P / Q)</div><div class='del'>-				E :	nand-ecc-strength.</div><div class='del'>-				S :	spare size per sector.</div><div class='del'>-				F :	FDM size, should be in the range [1,8].</div><div class='del'>-					It is used to store free oob data.</div><div class='del'>-				O :	oob size.</div><div class='del'>-				P :	page size.</div><div class='del'>-				Q :	nand-ecc-step-size.</div><div class='del'>-				B :	number of parity bits needed to correct</div><div class='del'>-					1 bitflip.</div><div class='del'>-					According to MTK NAND controller design,</div><div class='del'>-					this number depends on max ecc step size</div><div class='del'>-					that MTK NAND controller supports.</div><div class='del'>-					If max ecc step size supported is 1024,</div><div class='del'>-					then it should be always 14. And if max</div><div class='del'>-					ecc step size is 512, then it should be</div><div class='del'>-					always 13.</div><div class='del'>-			If the result does not match any one of the listed</div><div class='del'>-			choices above, please select the smaller valid value from</div><div class='del'>-			the list.</div><div class='del'>-			(otherwise the driver will do the adjustment at runtime)</div><div class='del'>-- pinctrl-names:	Default NAND pin GPIO setting name.</div><div class='del'>-- pinctrl-0:		GPIO setting node.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	&amp;pio {</div><div class='del'>-		nand_pins_default: nanddefault {</div><div class='del'>-			pins_dat {</div><div class='del'>-				pinmux = &lt;MT2701_PIN_111_MSDC0_DAT7__FUNC_NLD7&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_112_MSDC0_DAT6__FUNC_NLD6&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_114_MSDC0_DAT4__FUNC_NLD4&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_118_MSDC0_DAT3__FUNC_NLD3&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_121_MSDC0_DAT0__FUNC_NLD0&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_120_MSDC0_DAT1__FUNC_NLD1&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_113_MSDC0_DAT5__FUNC_NLD5&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_115_MSDC0_RSTB__FUNC_NLD8&gt;,</div><div class='del'>-					 &lt;MT2701_PIN_119_MSDC0_DAT2__FUNC_NLD2&gt;;</div><div class='del'>-				input-enable;</div><div class='del'>-				drive-strength = &lt;MTK_DRIVE_8mA&gt;;</div><div class='del'>-				bias-pull-up;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pins_we {</div><div class='del'>-				pinmux = &lt;MT2701_PIN_117_MSDC0_CLK__FUNC_NWEB&gt;;</div><div class='del'>-				drive-strength = &lt;MTK_DRIVE_8mA&gt;;</div><div class='del'>-				bias-pull-up = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pins_ale {</div><div class='del'>-				pinmux = &lt;MT2701_PIN_116_MSDC0_CMD__FUNC_NALE&gt;;</div><div class='del'>-				drive-strength = &lt;MTK_DRIVE_8mA&gt;;</div><div class='del'>-				bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	&amp;nandc {</div><div class='del'>-		status = "okay";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;nand_pins_default&gt;;</div><div class='del'>-		nand@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			nand-on-flash-bbt;</div><div class='del'>-			nand-ecc-mode = "hw";</div><div class='del'>-			nand-ecc-strength = &lt;24&gt;;</div><div class='del'>-			nand-ecc-step-size = &lt;1024&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-NAND chip optional subnodes:</div><div class='del'>-- Partitions, see Documentation/devicetree/bindings/mtd/partition.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	nand@0 {</div><div class='del'>-		partitions {</div><div class='del'>-			compatible = "fixed-partitions";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			preloader@0 {</div><div class='del'>-				label = "pl";</div><div class='del'>-				read-only;</div><div class='del'>-				reg = &lt;0x00000000 0x00400000&gt;;</div><div class='del'>-			};</div><div class='del'>-			android@00400000 {</div><div class='del'>-				label = "android";</div><div class='del'>-				reg = &lt;0x00400000 0x12c00000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-2) ECC Engine:</div><div class='del'>-==============</div><div class='del'>-</div><div class='del'>-Required BCH properties:</div><div class='del'>-- compatible:	Should be one of</div><div class='del'>-		"mediatek,mt2701-ecc",</div><div class='del'>-		"mediatek,mt2712-ecc",</div><div class='del'>-		"mediatek,mt7622-ecc".</div><div class='del'>-- reg:		Base physical address and size of ECC.</div><div class='del'>-- interrupts:	Interrupts of ECC.</div><div class='del'>-- clocks:	ECC required clocks.</div><div class='del'>-- clock-names:	ECC clocks internal name.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	bch: ecc@1100e000 {</div><div class='del'>-		compatible = "mediatek,mt2701-ecc";</div><div class='del'>-		reg = &lt;0 0x1100e000 0 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;pericfg CLK_PERI_NFI_ECC&gt;;</div><div class='del'>-		clock-names = "nfiecc_clk";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mxc-nand.yaml b/Documentation/devicetree/bindings/mtd/mxc-nand.yaml<br/>index 73b86f2226c7..cf4198e43d7f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mxc-nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mxc-nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mxc-nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/mxc-nand.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/mxc-nand.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale's mxc_nand binding</div><div class='add'>+title: Freescale's mxc_nand</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml"</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -37,6 +37,4 @@ examples:</div><div class='ctx'>         compatible = "fsl,imx27-nand";</div><div class='ctx'>         reg = &lt;0xd8000000 0x1000&gt;;</div><div class='ctx'>         interrupts = &lt;29&gt;;</div><div class='del'>-        nand-bus-width = &lt;8&gt;;</div><div class='del'>-        nand-ecc-mode = "hw";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml b/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml<br/>index 804479999ccb..f92e7234deab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/mxicy,nand-ecc-engine.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/mxicy,nand-ecc-engine.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Macronix NAND ECC engine device tree bindings</div><div class='add'>+title: Macronix NAND ECC engine</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/nand-chip.yaml b/Documentation/devicetree/bindings/mtd/nand-chip.yaml<br/>index 97ac3a3fbb52..609d4a4ddd80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/nand-chip.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/nand-chip.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/nand-chip.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/nand-chip.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/nand-chip.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NAND Chip and NAND Controller Generic Binding</div><div class='add'>+title: NAND Chip Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mtd.yaml#</div><div class='add'>+</div><div class='ctx'> description: |</div><div class='ctx'>   This file covers the generic description of a NAND chip. It implies that the</div><div class='ctx'>   bus interface should not be taken into account: both raw NAND devices and</div><div class='hunk'>@@ -67,4 +70,5 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+# This file can be referenced by more specific devices (like spi-nands)</div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml<br/>index 359a015d4e5a..f70a32d2d9d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/nand-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/nand-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/nand-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/nand-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/nand-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NAND Chip and NAND Controller Generic Binding</div><div class='add'>+title: NAND Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='hunk'>@@ -51,8 +51,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^nand@[a-f0-9]$":</div><div class='del'>-    type: object</div><div class='del'>-    $ref: "nand-chip.yaml#"</div><div class='add'>+    $ref: nand-chip.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='hunk'>@@ -130,6 +129,7 @@ required:</div><div class='ctx'>   - "#address-cells"</div><div class='ctx'>   - "#size-cells"</div><div class='ctx'> </div><div class='add'>+# This is a generic file other binding inherit from and extend</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partition.txt b/Documentation/devicetree/bindings/mtd/partition.txt<br/>deleted file mode 100644<br/>index ead90e8274d6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partition.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partition.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-Flash partitions in device tree</div><div class='del'>-===============================</div><div class='del'>-</div><div class='del'>-Flash devices can be partitioned into one or more functional ranges (e.g. "boot</div><div class='del'>-code", "nvram", "kernel").</div><div class='del'>-</div><div class='del'>-Different devices may be partitioned in a different ways. Some may use a fixed</div><div class='del'>-flash layout set at production time. Some may use on-flash table that describes</div><div class='del'>-the geometry and naming/purpose of each functional region. It is also possible</div><div class='del'>-to see these methods mixed.</div><div class='del'>-</div><div class='del'>-To assist system software in locating partitions, we allow describing which</div><div class='del'>-method is used for a given flash device. To describe the method there should be</div><div class='del'>-a subnode of the flash device that is named 'partitions'. It must have a</div><div class='del'>-'compatible' property, which is used to identify the method to use.</div><div class='del'>-</div><div class='del'>-When a single partition is represented with a DT node (it depends on a used</div><div class='del'>-format) it may also be described using above rules ('compatible' and optionally</div><div class='del'>-some extra properties / subnodes). It allows describing more complex,</div><div class='del'>-hierarchical (multi-level) layouts and should be used if there is some</div><div class='del'>-significant relation between partitions or some partition internally uses</div><div class='del'>-another partitioning method.</div><div class='del'>-</div><div class='del'>-Available bindings are listed in the "partitions" subdirectory.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Deprecated: partitions defined in flash node</div><div class='del'>-============================================</div><div class='del'>-</div><div class='del'>-For backwards compatibility partitions as direct subnodes of the flash device are</div><div class='del'>-supported. This use is discouraged.</div><div class='del'>-NOTE: also for backwards compatibility, direct subnodes that have a compatible</div><div class='del'>-string are not considered partitions, as they may be used for other bindings.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.txt b/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.txt<br/>deleted file mode 100644<br/>index d5c5616f6db5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-ARM AFS - ARM Firmware Suite Partitions</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-The ARM Firmware Suite is a flash partitioning system found on the</div><div class='del'>-ARM reference designs: Integrator AP, Integrator CP, Versatile AB,</div><div class='del'>-Versatile PB, the RealView family, Versatile Express and Juno.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : (required) must be "arm,arm-firmware-suite"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-flash@0 {</div><div class='del'>-	partitions {</div><div class='del'>-		compatible = "arm,arm-firmware-suite";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml b/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml<br/>new file mode 100644<br/>index 000000000000..97618847ee35<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/partitions/arm,arm-firmware-suite.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM Firmware Suite (AFS) Partitions</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The ARM Firmware Suite is a flash partitioning system found on the</div><div class='add'>+  ARM reference designs: Integrator AP, Integrator CP, Versatile AB,</div><div class='add'>+  Versatile PB, the RealView family, Versatile Express and Juno.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,arm-firmware-suite</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    partitions {</div><div class='add'>+        compatible = "arm,arm-firmware-suite";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml<br/>index 7b113e5e3421..94f0742b375c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml</a></div><div class='hunk'>@@ -17,6 +17,8 @@ description: |</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='ctx'> </div><div class='add'>+select: false</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: brcm,bcm4908-partitions</div><div class='hunk'>@@ -29,7 +31,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^partition@[0-9a-f]+$":</div><div class='del'>-    $ref: "partition.yaml#"</div><div class='add'>+    $ref: partition.yaml#</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         const: brcm,bcm4908-firmware</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml<br/>index 3484e06d6bcb..939e7b50db22 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml</a></div><div class='hunk'>@@ -35,6 +35,8 @@ description: |</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='ctx'> </div><div class='add'>+select: false</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: brcm,bcm947xx-cfe-partitions</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml<br/>index ea4cace6a955..331e564f29dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml</a></div><div class='hunk'>@@ -19,7 +19,11 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: fixed-partitions</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: fixed-partitions</div><div class='add'>+      - items:</div><div class='add'>+          - const: sercomm,sc-partitions</div><div class='add'>+          - const: fixed-partitions</div><div class='ctx'> </div><div class='ctx'>   "#address-cells": true</div><div class='ctx'> </div><div class='hunk'>@@ -27,7 +31,17 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "@[0-9a-f]+$":</div><div class='del'>-    $ref: "partition.yaml#"</div><div class='add'>+    $ref: partition.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      sercomm,scpart-id:</div><div class='add'>+        description: Partition id in Sercomm partition map. Mtd parser</div><div class='add'>+          uses this id to find a record in the partition map containing</div><div class='add'>+          offset and size of the current partition. The values from</div><div class='add'>+          partition map overrides partition offset and size defined in</div><div class='add'>+          reg property of the dts. Frequently these values are the same,</div><div class='add'>+          but may differ if device has bad eraseblocks on a flash.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#address-cells"</div><div class='hunk'>@@ -52,6 +66,7 @@ examples:</div><div class='ctx'>             reg = &lt;0x0100000 0x200000&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='ctx'>   - |</div><div class='ctx'>     partitions {</div><div class='ctx'>         compatible = "fixed-partitions";</div><div class='hunk'>@@ -62,8 +77,10 @@ examples:</div><div class='ctx'>         partition@0 {</div><div class='ctx'>             label = "filesystem";</div><div class='ctx'>             reg = &lt;0x00000000 0x1 0x00000000&gt;;</div><div class='add'>+            linux,rootfs;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='ctx'>   - |</div><div class='ctx'>     partitions {</div><div class='ctx'>         compatible = "fixed-partitions";</div><div class='hunk'>@@ -82,6 +99,7 @@ examples:</div><div class='ctx'>             reg = &lt;0x2 0x00000000 0x1 0x00000000&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='ctx'>   - |</div><div class='ctx'>     partitions {</div><div class='ctx'>         compatible = "fixed-partitions";</div><div class='hunk'>@@ -119,3 +137,30 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    partitions {</div><div class='add'>+        compatible = "sercomm,sc-partitions", "fixed-partitions";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        partition@0 {</div><div class='add'>+            label = "u-boot";</div><div class='add'>+            reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+            sercomm,scpart-id = &lt;0&gt;;</div><div class='add'>+            read-only;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        partition@100000 {</div><div class='add'>+            label = "dynamic partition map";</div><div class='add'>+            reg = &lt;0x100000 0x100000&gt;;</div><div class='add'>+            sercomm,scpart-id = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        partition@200000 {</div><div class='add'>+            label = "Factory";</div><div class='add'>+            reg = &lt;0x200000 0x100000&gt;;</div><div class='add'>+            sercomm,scpart-id = &lt;2&gt;;</div><div class='add'>+            read-only;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml<br/>index 99249cdfbfb3..c5fa78ff7125 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml</a></div><div class='hunk'>@@ -18,6 +18,8 @@ description: |</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='ctx'> </div><div class='add'>+select: false</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: linksys,ns-partitions</div><div class='hunk'>@@ -30,7 +32,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^partition@[0-9a-f]+$":</div><div class='del'>-    $ref: "partition.yaml#"</div><div class='add'>+    $ref: partition.yaml#</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml b/Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml<br/>index 5cdd2efa9132..5474d63268dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/nvmem-cells.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ maintainers:</div><div class='ctx'>   - Ansuel Smith &lt;ansuelsmth@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/mtd/partitions/partition.yaml#</div><div class='ctx'>   - $ref: /schemas/nvmem/nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -26,7 +27,7 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='del'>-additionalProperties: true</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -84,7 +85,6 @@ examples:</div><div class='ctx'>             compatible = "nvmem-cells";</div><div class='ctx'>             label = "calibration";</div><div class='ctx'>             reg = &lt;0xf00000 0x100000&gt;;</div><div class='del'>-            ranges = &lt;0 0xf00000 0x100000&gt;;</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/partition.yaml b/Documentation/devicetree/bindings/mtd/partitions/partition.yaml<br/>index e1ac08064425..cdffbb9cedc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/partition.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/partition.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/partition.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/partition.yaml</a></div><div class='hunk'>@@ -11,6 +11,17 @@ description: |</div><div class='ctx'>   relative offset and size specified. Depending on partition function extra</div><div class='ctx'>   properties can be used.</div><div class='ctx'> </div><div class='add'>+  A partition may be dynamically allocated by a specific parser at runtime.</div><div class='add'>+  In this specific case, a specific suffix is required to the node name.</div><div class='add'>+  Everything after 'partition-' will be used as the partition name to compare</div><div class='add'>+  with the one dynamically allocated by the specific parser.</div><div class='add'>+  If the partition contains invalid char a label can be provided that will</div><div class='add'>+  be used instead of the node name to make the comparison.</div><div class='add'>+  This is used to assign an OF node to the dynamiccally allocated partition</div><div class='add'>+  so that subsystem like NVMEM can provide an OF node and declare NVMEM cells.</div><div class='add'>+  The OF node will be assigned only if the partition label declared match the</div><div class='add'>+  one assigned by the parser at runtime.</div><div class='add'>+</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -41,7 +52,17 @@ properties:</div><div class='ctx'>       immune to paired-pages corruptions</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='del'>-required:</div><div class='del'>-  - reg</div><div class='add'>+  linux,rootfs:</div><div class='add'>+    description: Marks partition that contains root filesystem to mount and boot</div><div class='add'>+      user space from</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  not:</div><div class='add'>+    required: [ reg ]</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    $nodename:</div><div class='add'>+      pattern: '^partition-.*$'</div><div class='ctx'> </div><div class='add'>+# This is a generic file other binding inherit from and extend</div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/partitions.yaml<br/>new file mode 100644<br/>index 000000000000..2edc65e0e361<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/partitions.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/partitions.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/partitions/partitions.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Partitions</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding is generic and describes the content of the partitions container</div><div class='add'>+  node. All partition parsers must be referenced here.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - $ref: arm,arm-firmware-suite.yaml</div><div class='add'>+  - $ref: brcm,bcm4908-partitions.yaml</div><div class='add'>+  - $ref: brcm,bcm947xx-cfe-partitions.yaml</div><div class='add'>+  - $ref: fixed-partitions.yaml</div><div class='add'>+  - $ref: linksys,ns-partitions.yaml</div><div class='add'>+  - $ref: qcom,smem-part.yaml</div><div class='add'>+  - $ref: redboot-fis.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^partition(-.+|@[0-9a-f]+)$":</div><div class='add'>+    $ref: partition.yaml</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml b/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml<br/>index cf3f8c1e035d..1c2b4e780ca9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/qcom,smem-part.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/partitions/qcom,smem-part.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm SMEM NAND flash partition parser binding</div><div class='add'>+title: Qualcomm SMEM NAND flash partition parser</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='hunk'>@@ -15,10 +15,16 @@ description: |</div><div class='ctx'>   varies between partition table revisions. V3 supports maximum 16 partitions</div><div class='ctx'>   and V4 supports 48 partitions.</div><div class='ctx'> </div><div class='add'>+select: false</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,smem-part</div><div class='ctx'> </div><div class='add'>+patternProperties:</div><div class='add'>+  "^partition-[0-9a-z]+$":</div><div class='add'>+    $ref: nvmem-cells.yaml</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='hunk'>@@ -31,3 +37,26 @@ examples:</div><div class='ctx'>             compatible = "qcom,smem-part";</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    /* Example declaring dynamic partition */</div><div class='add'>+    flash {</div><div class='add'>+        partitions {</div><div class='add'>+            compatible = "qcom,smem-part";</div><div class='add'>+</div><div class='add'>+            partition-art {</div><div class='add'>+                compatible = "nvmem-cells";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;1&gt;;</div><div class='add'>+                label = "0:art";</div><div class='add'>+</div><div class='add'>+                macaddr_art_0: macaddr@0 {</div><div class='add'>+                    reg = &lt;0x0 0x6&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                macaddr_art_6: macaddr@6 {</div><div class='add'>+                    reg = &lt;0x6 0x6&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml b/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml<br/>index fee8d81b5276..ba7445cd69e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml</a></div><div class='hunk'>@@ -16,6 +16,8 @@ description: The FLASH Image System (FIS) directory is a flash description</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> </div><div class='add'>+select: false</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: redboot-fis</div><div class='hunk'>@@ -26,6 +28,10 @@ properties:</div><div class='ctx'>       device. On a flash memory with 32KB eraseblocks, 0 means the first</div><div class='ctx'>       eraseblock at 0x00000000, 1 means the second eraseblock at 0x00008000 and so on.</div><div class='ctx'> </div><div class='add'>+  '#address-cells': false</div><div class='add'>+</div><div class='add'>+  '#size-cells': false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - fis-index-block</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml b/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml<br/>new file mode 100644<br/>index 000000000000..a24bbaac3a90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/partitions/tplink,safeloader-partitions.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TP-Link SafeLoader partitions</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  TP-Link home routers store various data on flash (e.g. bootloader,</div><div class='add'>+  flash layout, firmware, product info, configuration, calibration</div><div class='add'>+  data). That requires flash partitioning.</div><div class='add'>+</div><div class='add'>+  Flash space layout of TP-Link devices is stored on flash itself using</div><div class='add'>+  a custom ASCII-based format. That format was first found in TP-Link</div><div class='add'>+  devices with a custom SafeLoader bootloader. Later it was adapted to</div><div class='add'>+  CFE and U-Boot bootloaders.</div><div class='add'>+</div><div class='add'>+  Partitions specified in partitions table cover whole flash space. Some</div><div class='add'>+  contain static data that shouldn't get modified (device's MAC or WiFi</div><div class='add'>+  calibration data). Others are semi-static (like kernel). Finally some</div><div class='add'>+  partitions contain fully changeable content (like rootfs).</div><div class='add'>+</div><div class='add'>+  This binding describes partitioning method and defines offset of ASCII</div><div class='add'>+  based partitions table. That offset is picked at manufacturing process</div><div class='add'>+  and doesn't change.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: tplink,safeloader-partitions</div><div class='add'>+</div><div class='add'>+  partitions-table-offset:</div><div class='add'>+    description: Flash offset of partitions table</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^partition-.*$":</div><div class='add'>+    $ref: partition.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - partitions-table-offset</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    partitions {</div><div class='add'>+        compatible = "tplink,safeloader-partitions";</div><div class='add'>+        partitions-table-offset = &lt;0x100000&gt;;</div><div class='add'>+</div><div class='add'>+        partition-file-system {</div><div class='add'>+                linux,rootfs;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml b/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml<br/>new file mode 100644<br/>index 000000000000..3c56efe48efd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/partitions/u-boot.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: U-Boot bootloader partition</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  U-Boot is a bootlodaer commonly used in embedded devices. It's almost always</div><div class='add'>+  located on some kind of flash device.</div><div class='add'>+</div><div class='add'>+  Device configuration is stored as a set of environment variables that are</div><div class='add'>+  located in a (usually standalone) block of data.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: partition.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: brcm,u-boot</div><div class='add'>+        description: |</div><div class='add'>+          Broadcom stores environment variables inside a U-Boot partition. They</div><div class='add'>+          can be identified by a custom header with magic value.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^partition-.*$":</div><div class='add'>+    $ref: partition.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    partitions {</div><div class='add'>+        compatible = "fixed-partitions";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        partition@0 {</div><div class='add'>+            compatible = "brcm,u-boot";</div><div class='add'>+            reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+            label = "u-boot";</div><div class='add'>+</div><div class='add'>+            partition-u-boot-env {</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        partition@100000 {</div><div class='add'>+            reg = &lt;0x100000 0x1ff00000&gt;;</div><div class='add'>+            label = "firmware";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml<br/>index 84ad7ff30121..00c991ffa6c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/qcom,nandc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/qcom,nandc.yaml</a></div><div class='hunk'>@@ -31,9 +31,6 @@ properties:</div><div class='ctx'>       - const: core</div><div class='ctx'>       - const: aon</div><div class='ctx'> </div><div class='del'>-  "#address-cells": true</div><div class='del'>-  "#size-cells": true</div><div class='del'>-</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^nand@[a-f0-9]$":</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -49,7 +46,7 @@ patternProperties:</div><div class='ctx'>           - 512</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml#"</div><div class='add'>+  - $ref: nand-controller.yaml#</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -102,6 +99,31 @@ allOf:</div><div class='ctx'>             - const: rx</div><div class='ctx'>             - const: cmd</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq806x-nand</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,boot-partitions:</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+          items:</div><div class='add'>+            items:</div><div class='add'>+              - description: offset</div><div class='add'>+              - description: size</div><div class='add'>+          description:</div><div class='add'>+            Boot partition use a different layout where the 4 bytes of spare</div><div class='add'>+            data are not protected by ECC. Use this to declare these special</div><div class='add'>+            partitions by defining first the offset and then the size.</div><div class='add'>+</div><div class='add'>+            It's in the form of &lt;offset1 size1 offset2 size2 offset3 ...&gt;</div><div class='add'>+            and should be declared in ascending order.</div><div class='add'>+</div><div class='add'>+            Refer to the ipq8064 example on how to use this special binding.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -114,83 +136,85 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,gcc-ipq806x.h&gt;</div><div class='ctx'>     nand-controller@1ac00000 {</div><div class='del'>-      compatible = "qcom,ipq806x-nand";</div><div class='del'>-      reg = &lt;0x1ac00000 0x800&gt;;</div><div class='add'>+        compatible = "qcom,ipq806x-nand";</div><div class='add'>+        reg = &lt;0x1ac00000 0x800&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc EBI2_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc EBI2_AON_CLK&gt;;</div><div class='add'>+        clock-names = "core", "aon";</div><div class='ctx'> </div><div class='del'>-      clocks = &lt;&amp;gcc EBI2_CLK&gt;,</div><div class='del'>-               &lt;&amp;gcc EBI2_AON_CLK&gt;;</div><div class='del'>-      clock-names = "core", "aon";</div><div class='add'>+        dmas = &lt;&amp;adm_dma 3&gt;;</div><div class='add'>+        dma-names = "rxtx";</div><div class='add'>+        qcom,cmd-crci = &lt;15&gt;;</div><div class='add'>+        qcom,data-crci = &lt;3&gt;;</div><div class='ctx'> </div><div class='del'>-      dmas = &lt;&amp;adm_dma 3&gt;;</div><div class='del'>-      dma-names = "rxtx";</div><div class='del'>-      qcom,cmd-crci = &lt;15&gt;;</div><div class='del'>-      qcom,data-crci = &lt;3&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='add'>+        nand@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-      nand@0 {</div><div class='del'>-        reg = &lt;0&gt;;</div><div class='add'>+            nand-ecc-strength = &lt;4&gt;;</div><div class='add'>+            nand-bus-width = &lt;8&gt;;</div><div class='ctx'> </div><div class='del'>-        nand-ecc-strength = &lt;4&gt;;</div><div class='del'>-        nand-bus-width = &lt;8&gt;;</div><div class='add'>+            qcom,boot-partitions = &lt;0x0 0x58a0000&gt;;</div><div class='ctx'> </div><div class='del'>-        partitions {</div><div class='del'>-          compatible = "fixed-partitions";</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;1&gt;;</div><div class='add'>+            partitions {</div><div class='add'>+                compatible = "fixed-partitions";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-          partition@0 {</div><div class='del'>-            label = "boot-nand";</div><div class='del'>-            reg = &lt;0 0x58a0000&gt;;</div><div class='del'>-          };</div><div class='add'>+                partition@0 {</div><div class='add'>+                    label = "boot-nand";</div><div class='add'>+                    reg = &lt;0 0x58a0000&gt;;</div><div class='add'>+                };</div><div class='ctx'> </div><div class='del'>-          partition@58a0000 {</div><div class='del'>-            label = "fs-nand";</div><div class='del'>-            reg = &lt;0x58a0000 0x4000000&gt;;</div><div class='del'>-          };</div><div class='add'>+                partition@58a0000 {</div><div class='add'>+                    label = "fs-nand";</div><div class='add'>+                    reg = &lt;0x58a0000 0x4000000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,gcc-ipq4019.h&gt;</div><div class='ctx'>     nand-controller@79b0000 {</div><div class='del'>-      compatible = "qcom,ipq4019-nand";</div><div class='del'>-      reg = &lt;0x79b0000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-      clocks = &lt;&amp;gcc GCC_QPIC_CLK&gt;,</div><div class='del'>-               &lt;&amp;gcc GCC_QPIC_AHB_CLK&gt;;</div><div class='del'>-      clock-names = "core", "aon";</div><div class='del'>-</div><div class='del'>-      dmas = &lt;&amp;qpicbam 0&gt;,</div><div class='del'>-             &lt;&amp;qpicbam 1&gt;,</div><div class='del'>-             &lt;&amp;qpicbam 2&gt;;</div><div class='del'>-      dma-names = "tx", "rx", "cmd";</div><div class='del'>-</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-      nand@0 {</div><div class='del'>-        reg = &lt;0&gt;;</div><div class='del'>-        nand-ecc-strength = &lt;4&gt;;</div><div class='del'>-        nand-bus-width = &lt;8&gt;;</div><div class='del'>-</div><div class='del'>-        partitions {</div><div class='del'>-          compatible = "fixed-partitions";</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-          partition@0 {</div><div class='del'>-            label = "boot-nand";</div><div class='del'>-            reg = &lt;0 0x58a0000&gt;;</div><div class='del'>-          };</div><div class='del'>-</div><div class='del'>-          partition@58a0000 {</div><div class='del'>-            label = "fs-nand";</div><div class='del'>-            reg = &lt;0x58a0000 0x4000000&gt;;</div><div class='del'>-          };</div><div class='add'>+        compatible = "qcom,ipq4019-nand";</div><div class='add'>+        reg = &lt;0x79b0000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_QPIC_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_QPIC_AHB_CLK&gt;;</div><div class='add'>+        clock-names = "core", "aon";</div><div class='add'>+</div><div class='add'>+        dmas = &lt;&amp;qpicbam 0&gt;,</div><div class='add'>+               &lt;&amp;qpicbam 1&gt;,</div><div class='add'>+               &lt;&amp;qpicbam 2&gt;;</div><div class='add'>+        dma-names = "tx", "rx", "cmd";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        nand@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            nand-ecc-strength = &lt;4&gt;;</div><div class='add'>+            nand-bus-width = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+            partitions {</div><div class='add'>+                compatible = "fixed-partitions";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                partition@0 {</div><div class='add'>+                    label = "boot-nand";</div><div class='add'>+                    reg = &lt;0 0x58a0000&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                partition@58a0000 {</div><div class='add'>+                    label = "fs-nand";</div><div class='add'>+                    reg = &lt;0x58a0000 0x4000000&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml b/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml<br/>index 2870d36361c4..cc6b8274e6a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/renesas-nandc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/renesas-nandc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/renesas-nandc.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/renesas-nandc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Renesas R-Car Gen3 &amp; RZ/N1x NAND flash controller device tree bindings</div><div class='add'>+title: Renesas R-Car Gen3 &amp; RZ/N1x NAND flash controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml"</div><div class='add'>+  - $ref: nand-controller.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -36,11 +36,15 @@ properties:</div><div class='ctx'>       - const: hclk</div><div class='ctx'>       - const: eclk</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='add'>+  - power-domains</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='hunk'>@@ -56,6 +60,7 @@ examples:</div><div class='ctx'>         interrupts = &lt;GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>         clocks = &lt;&amp;sysctrl R9A06G032_HCLK_NAND&gt;, &lt;&amp;sysctrl R9A06G032_CLK_NAND&gt;;</div><div class='ctx'>         clock-names = "hclk", "eclk";</div><div class='add'>+        power-domains = &lt;&amp;sysctrl&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml b/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml<br/>index d681a4676f06..7eb1d0a38565 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Rockchip SoCs NAND FLASH Controller (NFC)</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml#"</div><div class='add'>+  - $ref: nand-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='hunk'>@@ -19,7 +19,9 @@ properties:</div><div class='ctx'>       - const: rockchip,rk2928-nfc</div><div class='ctx'>       - const: rockchip,rv1108-nfc</div><div class='ctx'>       - items:</div><div class='del'>-          - const: rockchip,rk3036-nfc</div><div class='add'>+          - enum:</div><div class='add'>+              - rockchip,rk3036-nfc</div><div class='add'>+              - rockchip,rk3128-nfc</div><div class='ctx'>           - const: rockchip,rk2928-nfc</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: rockchip,rk3308-nfc</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/spi-nand.yaml b/Documentation/devicetree/bindings/mtd/spi-nand.yaml<br/>index 431faac518a4..77a8727c7966 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/spi-nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/spi-nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/spi-nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/spi-nand.yaml</a></div><div class='hunk'>@@ -4,13 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/spi-nand.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SPI-NAND flash device tree bindings</div><div class='add'>+title: SPI-NAND flash</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-chip.yaml#"</div><div class='add'>+  - $ref: nand-chip.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml<br/>index eab8ea3da1fa..986e85ccebc7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings</div><div class='add'>+title: STMicroelectronics Flexible Memory Controller 2 (FMC2)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Christophe Kerello &lt;christophe.kerello@foss.st.com&gt;</div><div class='hunk'>@@ -45,7 +45,7 @@ patternProperties:</div><div class='ctx'>         enum: [1, 4, 8]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nand-controller.yaml#"</div><div class='add'>+  - $ref: nand-controller.yaml#</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -101,31 +101,32 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/clock/stm32mp1-clks.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/reset/stm32mp1-resets.h&gt;</div><div class='add'>+</div><div class='ctx'>     nand-controller@58002000 {</div><div class='del'>-      compatible = "st,stm32mp15-fmc2";</div><div class='del'>-      reg = &lt;0x58002000 0x1000&gt;,</div><div class='del'>-            &lt;0x80000000 0x1000&gt;,</div><div class='del'>-            &lt;0x88010000 0x1000&gt;,</div><div class='del'>-            &lt;0x88020000 0x1000&gt;,</div><div class='del'>-            &lt;0x81000000 0x1000&gt;,</div><div class='del'>-            &lt;0x89010000 0x1000&gt;,</div><div class='del'>-            &lt;0x89020000 0x1000&gt;;</div><div class='del'>-      interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-      dmas = &lt;&amp;mdma1 20 0x2 0x12000a02 0x0 0x0&gt;,</div><div class='del'>-             &lt;&amp;mdma1 20 0x2 0x12000a08 0x0 0x0&gt;,</div><div class='del'>-             &lt;&amp;mdma1 21 0x2 0x12000a0a 0x0 0x0&gt;;</div><div class='del'>-      dma-names = "tx", "rx", "ecc";</div><div class='del'>-      clocks = &lt;&amp;rcc FMC_K&gt;;</div><div class='del'>-      resets = &lt;&amp;rcc FMC_R&gt;;</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-      nand@0 {</div><div class='del'>-        reg = &lt;0&gt;;</div><div class='del'>-        nand-on-flash-bbt;</div><div class='add'>+        compatible = "st,stm32mp15-fmc2";</div><div class='add'>+        reg = &lt;0x58002000 0x1000&gt;,</div><div class='add'>+              &lt;0x80000000 0x1000&gt;,</div><div class='add'>+              &lt;0x88010000 0x1000&gt;,</div><div class='add'>+              &lt;0x88020000 0x1000&gt;,</div><div class='add'>+              &lt;0x81000000 0x1000&gt;,</div><div class='add'>+              &lt;0x89010000 0x1000&gt;,</div><div class='add'>+              &lt;0x89020000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        dmas = &lt;&amp;mdma1 20 0x2 0x12000a02 0x0 0x0&gt;,</div><div class='add'>+               &lt;&amp;mdma1 20 0x2 0x12000a08 0x0 0x0&gt;,</div><div class='add'>+               &lt;&amp;mdma1 21 0x2 0x12000a0a 0x0 0x0&gt;;</div><div class='add'>+        dma-names = "tx", "rx", "ecc";</div><div class='add'>+        clocks = &lt;&amp;rcc FMC_K&gt;;</div><div class='add'>+        resets = &lt;&amp;rcc FMC_R&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-      };</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        nand@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            nand-on-flash-bbt;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml b/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml<br/>index 30b458c41cac..4774c92e7fc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml</a></div><div class='hunk'>@@ -44,26 +44,26 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     bus {</div><div class='del'>-      #address-cells = &lt;2&gt;;</div><div class='del'>-      #size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-      hbmc: memory-controller@47034000 {</div><div class='del'>-        compatible = "ti,am654-hbmc";</div><div class='del'>-        reg = &lt;0x0 0x47034000 0x0 0x100&gt;,</div><div class='del'>-              &lt;0x5 0x00000000 0x1 0x0000000&gt;;</div><div class='del'>-        ranges = &lt;0x0 0x0 0x5 0x00000000 0x4000000&gt;, /* CS0 - 64MB */</div><div class='del'>-                 &lt;0x1 0x0 0x5 0x04000000 0x4000000&gt;; /* CS1 - 64MB */</div><div class='del'>-        clocks = &lt;&amp;k3_clks 102 0&gt;;</div><div class='ctx'>         #address-cells = &lt;2&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        power-domains = &lt;&amp;k3_pds 55&gt;;</div><div class='del'>-        mux-controls = &lt;&amp;hbmc_mux 0&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-        flash@0,0 {</div><div class='del'>-            compatible = "cypress,hyperflash", "cfi-flash";</div><div class='del'>-            reg = &lt;0x0 0x0 0x4000000&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='add'>+        hbmc: memory-controller@47034000 {</div><div class='add'>+            compatible = "ti,am654-hbmc";</div><div class='add'>+            reg = &lt;0x0 0x47034000 0x0 0x100&gt;,</div><div class='add'>+                  &lt;0x5 0x00000000 0x1 0x0000000&gt;;</div><div class='add'>+            ranges = &lt;0x0 0x0 0x5 0x00000000 0x4000000&gt;, /* CS0 - 64MB */</div><div class='add'>+                     &lt;0x1 0x0 0x5 0x04000000 0x4000000&gt;; /* CS1 - 64MB */</div><div class='add'>+            clocks = &lt;&amp;k3_clks 102 0&gt;;</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='ctx'>             #size-cells = &lt;1&gt;;</div><div class='add'>+            power-domains = &lt;&amp;k3_pds 55&gt;;</div><div class='add'>+            mux-controls = &lt;&amp;hbmc_mux 0&gt;;</div><div class='add'>+</div><div class='add'>+            flash@0,0 {</div><div class='add'>+                compatible = "cypress,hyperflash", "cfi-flash";</div><div class='add'>+                reg = &lt;0x0 0x0 0x4000000&gt;;</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/ti,elm.yaml b/Documentation/devicetree/bindings/mtd/ti,elm.yaml<br/>new file mode 100644<br/>index 000000000000..87128c004596<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ti,elm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/ti,elm.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/mtd/ti,elm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments Error Location Module (ELM).</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Roger Quadros &lt;rogerq@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  ELM module is used together with GPMC and NAND Flash to detect</div><div class='add'>+  errors and the location of the error based on BCH algorithms</div><div class='add'>+  so they can be corrected if possible.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,am3352-elm</div><div class='add'>+      - ti,am64-elm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Functional clock.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fck</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ti,hwmods:</div><div class='add'>+    description:</div><div class='add'>+      Name of the HWMOD associated with ELM. This is for legacy</div><div class='add'>+      platforms only.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ti,am64-elm</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    elm: ecc@0 {</div><div class='add'>+        compatible = "ti,am3352-elm";</div><div class='add'>+        reg = &lt;0x0 0x2000&gt;;</div><div class='add'>+        interrupts = &lt;4&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml b/Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml<br/>index 4ac198814b7a..115682fa81b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml</a></div><div class='hunk'>@@ -63,10 +63,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "@[0-9a-f]+$":</div><div class='del'>-    $ref: "/schemas/mtd/partitions/partition.yaml"</div><div class='add'>+    $ref: /schemas/mtd/partitions/partition.yaml</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/memory-controllers/ti,gpmc-child.yaml"</div><div class='add'>+  - $ref: /schemas/memory-controllers/ti,gpmc-child.yaml</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml b/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml<br/>index a953f7397c40..7d3ace4f5505 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml</a></div><div class='hunk'>@@ -15,6 +15,9 @@ description:</div><div class='ctx'>   as child nodes of the GPMC controller.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^onenand@[0-9],[0,9]$"</div><div class='add'>+</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: ti,omap2-onenand</div><div class='ctx'> </div><div class='hunk'>@@ -33,10 +36,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "@[0-9a-f]+$":</div><div class='del'>-    $ref: "/schemas/mtd/partitions/partition.yaml"</div><div class='add'>+    $ref: /schemas/mtd/partitions/partition.yaml</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/memory-controllers/ti,gpmc-child.yaml"</div><div class='add'>+  - $ref: /schemas/memory-controllers/ti,gpmc-child.yaml</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mux/gpio-mux.yaml b/Documentation/devicetree/bindings/mux/gpio-mux.yaml<br/>index ee4de9fbaf4d..b597c1f2c577 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/gpio-mux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/gpio-mux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/gpio-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mux/gpio-mux.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mux/gpio-mux.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: GPIO-based multiplexer controller bindings</div><div class='add'>+title: GPIO-based multiplexer controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Rosin &lt;peda@axentia.se&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mux/mux-consumer.yaml b/Documentation/devicetree/bindings/mux/mux-consumer.yaml<br/>index d3d854967359..9e2d78a78e40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/mux-consumer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/mux-consumer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/mux-consumer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mux/mux-consumer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common multiplexer controller consumer bindings</div><div class='add'>+title: Common multiplexer controller consumer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Rosin &lt;peda@axentia.se&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mux/mux-controller.yaml b/Documentation/devicetree/bindings/mux/mux-controller.yaml<br/>index c855fbad3884..8b943082a241 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/mux-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/mux-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/mux-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mux/mux-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mux/mux-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common multiplexer controller provider bindings</div><div class='add'>+title: Common multiplexer controller provider</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Rosin &lt;peda@axentia.se&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/mux/reg-mux.yaml b/Documentation/devicetree/bindings/mux/reg-mux.yaml<br/>index 60d5746eb39d..dc4be092fc2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/reg-mux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/mux/reg-mux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/mux/reg-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/mux/reg-mux.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/mux/reg-mux.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic register bitfield-based multiplexer controller bindings</div><div class='add'>+title: Generic register bitfield-based multiplexer controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Peter Rosin &lt;peda@axentia.se&gt;</div><div class='hunk'>@@ -25,8 +25,12 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   mux-reg-masks:</div><div class='del'>-    description: an array of register offset and pre-shifted bitfield mask</div><div class='del'>-      pairs, each describing a single mux control.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: pre-shifted bitfield mask</div><div class='add'>+    description: Each entry pair describes a single mux control.</div><div class='ctx'> </div><div class='ctx'>   idle-states: true</div><div class='ctx'> </div><div class='hunk'>@@ -96,7 +100,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>     #include &lt;dt-bindings/mux/mux.h&gt;</div><div class='ctx'>     syscon@1000 {</div><div class='del'>-        compatible = "fsl,imx7d-iomuxc-gpr", "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd";</div><div class='ctx'>         reg = &lt;0x1000 0x100&gt;;</div><div class='ctx'> </div><div class='ctx'>         mux2: mux-controller {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/actions,owl-emac.yaml b/Documentation/devicetree/bindings/net/actions,owl-emac.yaml<br/>index d30fada2ac39..5718ab4654b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/actions,owl-emac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/actions,owl-emac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/actions,owl-emac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/actions,owl-emac.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description: |</div><div class='ctx'>   operation modes at 10/100 Mb/s data transfer rates.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml<br/>index 1129f2b58e98..929cf8c0b0fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/adi,adin.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/adi,adin.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/adi,adin.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/adi,adin.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices ADIN1200/ADIN1300 PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Alexandru Ardelean &lt;alexandru.ardelean@analog.com&gt;</div><div class='add'>+  - Alexandru Tachici &lt;alexandru.tachici@analog.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Bindings for Analog Devices Industrial Ethernet PHYs</div><div class='hunk'>@@ -36,6 +36,22 @@ properties:</div><div class='ctx'>     enum: [ 4, 8, 12, 16, 20, 24 ]</div><div class='ctx'>     default: 8</div><div class='ctx'> </div><div class='add'>+  adi,phy-output-clock:</div><div class='add'>+    description: |</div><div class='add'>+      Select clock output on GP_CLK pin. Two clocks are available:</div><div class='add'>+      A 25MHz reference and a free-running 125MHz.</div><div class='add'>+      The phy can alternatively automatically switch between the reference and</div><div class='add'>+      the 125MHz clocks based on its internal state.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - 25mhz-reference</div><div class='add'>+      - 125mhz-free-running</div><div class='add'>+      - adaptive-free-running</div><div class='add'>+</div><div class='add'>+  adi,phy-output-reference-clock:</div><div class='add'>+    description: Enable 25MHz reference clock output on CLK25_REF pin.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/adi,adin1110.yaml b/Documentation/devicetree/bindings/net/adi,adin1110.yaml<br/>new file mode 100644<br/>index 000000000000..9de865295d7a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/adi,adin1110.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/adi,adin1110.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/adi,adin1110.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ADI ADIN1110 MAC-PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandru Tachici &lt;alexandru.tachici@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The ADIN1110 is a low power single port 10BASE-T1L MAC-</div><div class='add'>+  PHY designed for industrial Ethernet applications. It integrates</div><div class='add'>+  an Ethernet PHY core with a MAC and all the associated analog</div><div class='add'>+  circuitry, input and output clock buffering.</div><div class='add'>+</div><div class='add'>+  The ADIN2111 is a low power, low complexity, two-Ethernet ports</div><div class='add'>+  switch with integrated 10BASE-T1L PHYs and one serial peripheral</div><div class='add'>+  interface (SPI) port. The device is designed for industrial Ethernet</div><div class='add'>+  applications using low power constrained nodes and is compliant</div><div class='add'>+  with the IEEE 802.3cg-2019 Ethernet standard for long reach</div><div class='add'>+  10 Mbps single pair Ethernet (SPE).</div><div class='add'>+</div><div class='add'>+  The device has a 4-wire SPI interface for communication</div><div class='add'>+  between the MAC and host processor.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,adin1110</div><div class='add'>+      - adi,adin2111</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  adi,spi-crc:</div><div class='add'>+    description: |</div><div class='add'>+      Enable CRC8 checks on SPI read/writes.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO connected to active low reset</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet@0 {</div><div class='add'>+            compatible = "adi,adin2111";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;24500000&gt;;</div><div class='add'>+</div><div class='add'>+            adi,spi-crc;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;25 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            local-mac-address = [ 00 11 22 33 44 55 ];</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml<br/>index 098b2bf7d976..eb26623dab51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/allwinner,sun4i-a10-emac.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-emac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 EMAC Ethernet Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 EMAC Ethernet Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml b/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml<br/>index 767193ec1d32..85f552b907f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/allwinner,sun4i-a10-mdio.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/allwinner,sun4i-a10-mdio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 MDIO Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 MDIO Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mdio.yaml#"</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='ctx'> </div><div class='ctx'> # Select every compatible, including the deprecated ones. This way, we</div><div class='ctx'> # will be able to report a warning when we have that compatible, since</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml<br/>index 703d0d886884..3bd912ed7c7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/allwinner,sun7i-a20-gmac.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A20 GMAC Device Tree Bindings</div><div class='add'>+title: Allwinner A20 GMAC</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: "snps,dwmac.yaml#"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml<br/>index 6a4831fd3616..47bc2057e629 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A83t EMAC Device Tree Bindings</div><div class='add'>+title: Allwinner A83t EMAC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -22,6 +22,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - allwinner,sun20i-d1-emac</div><div class='ctx'>               - allwinner,sun50i-h6-emac</div><div class='add'>+              - allwinner,sun50i-h616-emac0</div><div class='ctx'>           - const: allwinner,sun50i-a64-emac</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -39,6 +40,9 @@ properties:</div><div class='ctx'>   clock-names:</div><div class='ctx'>     const: stmmaceth</div><div class='ctx'> </div><div class='add'>+  phy-supply:</div><div class='add'>+    description: PHY regulator</div><div class='add'>+</div><div class='ctx'>   syscon:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/altera_tse.txt b/Documentation/devicetree/bindings/net/altera_tse.txt<br/>deleted file mode 100644<br/>index 0b7d4d3758ea..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/altera_tse.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/altera_tse.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,113 +0,0 @@</div><div class='del'>-* Altera Triple-Speed Ethernet MAC driver (TSE)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should</div><div class='del'>-		be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.</div><div class='del'>-		ALTR is supported for legacy device trees, but is deprecated.</div><div class='del'>-		altr should be used for all new designs.</div><div class='del'>-- reg: Address and length of the register set for the device. It contains</div><div class='del'>-  the information of registers in the same order as described by reg-names</div><div class='del'>-- reg-names: Should contain the reg names</div><div class='del'>-  "control_port": MAC configuration space region</div><div class='del'>-  "tx_csr":       xDMA Tx dispatcher control and status space region</div><div class='del'>-  "tx_desc":      MSGDMA Tx dispatcher descriptor space region</div><div class='del'>-  "rx_csr" :      xDMA Rx dispatcher control and status space region</div><div class='del'>-  "rx_desc":      MSGDMA Rx dispatcher descriptor space region</div><div class='del'>-  "rx_resp":      MSGDMA Rx dispatcher response space region</div><div class='del'>-  "s1":		  SGDMA descriptor memory</div><div class='del'>-- interrupts: Should contain the TSE interrupts and it's mode.</div><div class='del'>-- interrupt-names: Should contain the interrupt names</div><div class='del'>-  "rx_irq":       xDMA Rx dispatcher interrupt</div><div class='del'>-  "tx_irq":       xDMA Tx dispatcher interrupt</div><div class='del'>-- rx-fifo-depth: MAC receive FIFO buffer depth in bytes</div><div class='del'>-- tx-fifo-depth: MAC transmit FIFO buffer depth in bytes</div><div class='del'>-- phy-mode: See ethernet.txt in the same directory.</div><div class='del'>-- phy-handle: See ethernet.txt in the same directory.</div><div class='del'>-- phy-addr: See ethernet.txt in the same directory. A configuration should</div><div class='del'>-		include phy-handle or phy-addr.</div><div class='del'>-- altr,has-supplementary-unicast:</div><div class='del'>-		If present, TSE supports additional unicast addresses.</div><div class='del'>-		Otherwise additional unicast addresses are not supported.</div><div class='del'>-- altr,has-hash-multicast-filter:</div><div class='del'>-		If present, TSE supports a hash based multicast filter.</div><div class='del'>-		Otherwise, hash-based multicast filtering is not supported.</div><div class='del'>-</div><div class='del'>-- mdio device tree subnode: When the TSE has a phy connected to its local</div><div class='del'>-		mdio, there must be device tree subnode with the following</div><div class='del'>-		required properties:</div><div class='del'>-</div><div class='del'>-	- compatible: Must be "altr,tse-mdio".</div><div class='del'>-	- #address-cells: Must be &lt;1&gt;.</div><div class='del'>-	- #size-cells: Must be &lt;0&gt;.</div><div class='del'>-</div><div class='del'>-	For each phy on the mdio bus, there must be a node with the following</div><div class='del'>-	fields:</div><div class='del'>-</div><div class='del'>-	- reg: phy id used to communicate to phy.</div><div class='del'>-	- device_type: Must be "ethernet-phy".</div><div class='del'>-</div><div class='del'>-The MAC address will be determined using the optional properties defined in</div><div class='del'>-ethernet.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tse_sub_0_eth_tse_0: ethernet@1,00000000 {</div><div class='del'>-		compatible = "altr,tse-msgdma-1.0";</div><div class='del'>-		reg =	&lt;0x00000001 0x00000000 0x00000400&gt;,</div><div class='del'>-			&lt;0x00000001 0x00000460 0x00000020&gt;,</div><div class='del'>-			&lt;0x00000001 0x00000480 0x00000020&gt;,</div><div class='del'>-			&lt;0x00000001 0x000004A0 0x00000008&gt;,</div><div class='del'>-			&lt;0x00000001 0x00000400 0x00000020&gt;,</div><div class='del'>-			&lt;0x00000001 0x00000420 0x00000020&gt;;</div><div class='del'>-		reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";</div><div class='del'>-		interrupt-parent = &lt;&amp;hps_0_arm_gic_0&gt;;</div><div class='del'>-		interrupts = &lt;0 41 4&gt;, &lt;0 40 4&gt;;</div><div class='del'>-		interrupt-names = "rx_irq", "tx_irq";</div><div class='del'>-		rx-fifo-depth = &lt;2048&gt;;</div><div class='del'>-		tx-fifo-depth = &lt;2048&gt;;</div><div class='del'>-		address-bits = &lt;48&gt;;</div><div class='del'>-		max-frame-size = &lt;1500&gt;;</div><div class='del'>-		local-mac-address = [ 00 00 00 00 00 00 ];</div><div class='del'>-		phy-mode = "gmii";</div><div class='del'>-		altr,has-supplementary-unicast;</div><div class='del'>-		altr,has-hash-multicast-filter;</div><div class='del'>-		phy-handle = &lt;&amp;phy0&gt;;</div><div class='del'>-		mdio {</div><div class='del'>-			compatible = "altr,tse-mdio";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			phy0: ethernet-phy@0 {</div><div class='del'>-				reg = &lt;0x0&gt;;</div><div class='del'>-				device_type = "ethernet-phy";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				reg = &lt;0x1&gt;;</div><div class='del'>-				device_type = "ethernet-phy";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tse_sub_1_eth_tse_0: ethernet@1,00001000 {</div><div class='del'>-		compatible = "altr,tse-msgdma-1.0";</div><div class='del'>-		reg = 	&lt;0x00000001 0x00001000 0x00000400&gt;,</div><div class='del'>-			&lt;0x00000001 0x00001460 0x00000020&gt;,</div><div class='del'>-			&lt;0x00000001 0x00001480 0x00000020&gt;,</div><div class='del'>-			&lt;0x00000001 0x000014A0 0x00000008&gt;,</div><div class='del'>-			&lt;0x00000001 0x00001400 0x00000020&gt;,</div><div class='del'>-			&lt;0x00000001 0x00001420 0x00000020&gt;;</div><div class='del'>-		reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";</div><div class='del'>-		interrupt-parent = &lt;&amp;hps_0_arm_gic_0&gt;;</div><div class='del'>-		interrupts = &lt;0 43 4&gt;, &lt;0 42 4&gt;;</div><div class='del'>-		interrupt-names = "rx_irq", "tx_irq";</div><div class='del'>-		rx-fifo-depth = &lt;2048&gt;;</div><div class='del'>-		tx-fifo-depth = &lt;2048&gt;;</div><div class='del'>-		address-bits = &lt;48&gt;;</div><div class='del'>-		max-frame-size = &lt;1500&gt;;</div><div class='del'>-		local-mac-address = [ 00 00 00 00 00 00 ];</div><div class='del'>-		phy-mode = "gmii";</div><div class='del'>-		altr,has-supplementary-unicast;</div><div class='del'>-		altr,has-hash-multicast-filter;</div><div class='del'>-		phy-handle = &lt;&amp;phy1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/altr,tse.yaml b/Documentation/devicetree/bindings/net/altr,tse.yaml<br/>new file mode 100644<br/>index 000000000000..9d02af468906<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/altr,tse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/altr,tse.yaml</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/altr,tse.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Altera Triple Speed Ethernet MAC driver (TSE)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Maxime Chevallier &lt;maxime.chevallier@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: altr,tse-1.0</div><div class='add'>+      - const: ALTR,tse-1.0</div><div class='add'>+        deprecated: true</div><div class='add'>+      - const: altr,tse-msgdma-1.0</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx_irq</div><div class='add'>+      - const: tx_irq</div><div class='add'>+</div><div class='add'>+  rx-fifo-depth:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Depth in bytes of the RX FIFO</div><div class='add'>+</div><div class='add'>+  tx-fifo-depth:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Depth in bytes of the TX FIFO</div><div class='add'>+</div><div class='add'>+  altr,has-supplementary-unicast:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, TSE supports additional unicast addresses.</div><div class='add'>+</div><div class='add'>+  altr,has-hash-multicast-filter:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, TSE supports hash based multicast filter.</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Creates and registers an MDIO bus.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: altr,tse-mdio</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - rx-fifo-depth</div><div class='add'>+  - tx-fifo-depth</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - const: altr,tse-1.0</div><div class='add'>+              - const: ALTR,tse-1.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 4</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: control_port</div><div class='add'>+            - const: rx_csr</div><div class='add'>+            - const: tx_csr</div><div class='add'>+            - const: s1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - altr,tse-msgdma-1.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 7</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+          items:</div><div class='add'>+            - const: control_port</div><div class='add'>+            - const: rx_csr</div><div class='add'>+            - const: rx_desc</div><div class='add'>+            - const: rx_resp</div><div class='add'>+            - const: tx_csr</div><div class='add'>+            - const: tx_desc</div><div class='add'>+            - const: pcs</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    tse_sub_0: ethernet@c0100000 {</div><div class='add'>+        compatible = "altr,tse-msgdma-1.0";</div><div class='add'>+        reg = &lt;0xc0100000 0x00000400&gt;,</div><div class='add'>+              &lt;0xc0101000 0x00000020&gt;,</div><div class='add'>+              &lt;0xc0102000 0x00000020&gt;,</div><div class='add'>+              &lt;0xc0103000 0x00000008&gt;,</div><div class='add'>+              &lt;0xc0104000 0x00000020&gt;,</div><div class='add'>+              &lt;0xc0105000 0x00000020&gt;,</div><div class='add'>+              &lt;0xc0106000 0x00000100&gt;;</div><div class='add'>+        reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc", "pcs";</div><div class='add'>+        interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+        interrupts = &lt;0 44 4&gt;,&lt;0 45 4&gt;;</div><div class='add'>+        interrupt-names = "rx_irq","tx_irq";</div><div class='add'>+        rx-fifo-depth = &lt;2048&gt;;</div><div class='add'>+        tx-fifo-depth = &lt;2048&gt;;</div><div class='add'>+        max-frame-size = &lt;1500&gt;;</div><div class='add'>+        local-mac-address = [ 00 00 00 00 00 00 ];</div><div class='add'>+        altr,has-supplementary-unicast;</div><div class='add'>+        altr,has-hash-multicast-filter;</div><div class='add'>+        sfp = &lt;&amp;sfp0&gt;;</div><div class='add'>+        phy-mode = "sgmii";</div><div class='add'>+        managed = "in-band-status";</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    tse_sub_1_eth_tse_0: ethernet@1,00001000 {</div><div class='add'>+        compatible = "altr,tse-msgdma-1.0";</div><div class='add'>+        reg = &lt;0x00001000 0x00000400&gt;,</div><div class='add'>+              &lt;0x00001460 0x00000020&gt;,</div><div class='add'>+              &lt;0x00001480 0x00000020&gt;,</div><div class='add'>+              &lt;0x000014A0 0x00000008&gt;,</div><div class='add'>+              &lt;0x00001400 0x00000020&gt;,</div><div class='add'>+              &lt;0x00001420 0x00000020&gt;;</div><div class='add'>+        reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";</div><div class='add'>+        interrupt-parent = &lt;&amp;hps_0_arm_gic_0&gt;;</div><div class='add'>+        interrupts = &lt;0 43 4&gt;, &lt;0 42 4&gt;;</div><div class='add'>+        interrupt-names = "rx_irq", "tx_irq";</div><div class='add'>+        rx-fifo-depth = &lt;2048&gt;;</div><div class='add'>+        tx-fifo-depth = &lt;2048&gt;;</div><div class='add'>+        max-frame-size = &lt;1500&gt;;</div><div class='add'>+        local-mac-address = [ 00 00 00 00 00 00 ];</div><div class='add'>+        phy-mode = "gmii";</div><div class='add'>+        altr,has-supplementary-unicast;</div><div class='add'>+        altr,has-hash-multicast-filter;</div><div class='add'>+        phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+        mdio {</div><div class='add'>+            compatible = "altr,tse-mdio";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            phy1: ethernet-phy@1 {</div><div class='add'>+                reg = &lt;0x1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/amlogic,g12a-mdio-mux.yaml b/Documentation/devicetree/bindings/net/amlogic,g12a-mdio-mux.yaml<br/>new file mode 100644<br/>index 000000000000..ec5c038ce6a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/amlogic,g12a-mdio-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/amlogic,g12a-mdio-mux.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/amlogic,g12a-mdio-mux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MDIO bus multiplexer/glue of Amlogic G12a SoC family</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is a special case of a MDIO bus multiplexer. It allows to choose between</div><div class='add'>+  the internal mdio bus leading to the embedded 10/100 PHY or the external</div><div class='add'>+  MDIO bus.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mdio-mux.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amlogic,g12a-mdio-mux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: peripheral clock</div><div class='add'>+      - description: platform crytal</div><div class='add'>+      - description: SoC 50MHz MPLL</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: clkin0</div><div class='add'>+      - const: clkin1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    mdio-multiplexer@4c000 {</div><div class='add'>+        compatible = "amlogic,g12a-mdio-mux";</div><div class='add'>+        reg = &lt;0x4c000 0xa4&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_eth_phy&gt;, &lt;&amp;xtal&gt;, &lt;&amp;clkc_mpll&gt;;</div><div class='add'>+        clock-names = "pclk", "clkin0", "clkin1";</div><div class='add'>+        mdio-parent-bus = &lt;&amp;mdio0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        mdio@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdio@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ethernet-phy@8 {</div><div class='add'>+                compatible = "ethernet-phy-id0180.3301",</div><div class='add'>+                             "ethernet-phy-ieee802.3-c22";</div><div class='add'>+                interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+                reg = &lt;8&gt;;</div><div class='add'>+                max-speed = &lt;100&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml b/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml<br/>new file mode 100644<br/>index 000000000000..27ae004dbea0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/amlogic,gxl-mdio-mux.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic GXL MDIO bus multiplexer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This is a special case of a MDIO bus multiplexer. It allows to choose between</div><div class='add'>+  the internal mdio bus leading to the embedded 10/100 PHY or the external</div><div class='add'>+  MDIO bus on the Amlogic GXL SoC family.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mdio-mux.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amlogic,gxl-mdio-mux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ref</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    eth_phy_mux: mdio@558 {</div><div class='add'>+      compatible = "amlogic,gxl-mdio-mux";</div><div class='add'>+      reg = &lt;0x558 0xc&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      clocks = &lt;&amp;refclk&gt;;</div><div class='add'>+      clock-names = "ref";</div><div class='add'>+      mdio-parent-bus = &lt;&amp;mdio0&gt;;</div><div class='add'>+</div><div class='add'>+      external_mdio: mdio@0 {</div><div class='add'>+        reg = &lt;0x0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      internal_mdio: mdio@1 {</div><div class='add'>+        reg = &lt;0x1&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml<br/>index 608e1d62bed5..a2c51a84efa5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson DWMAC Ethernet controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'>   - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='ctx'> </div><div class='ctx'> # We need a select here so we don't match all nodes with 'snps,dwmac'</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/asix,ax88178.yaml b/Documentation/devicetree/bindings/net/asix,ax88178.yaml<br/>new file mode 100644<br/>index 000000000000..768504ccbf74<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/asix,ax88178.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/asix,ax88178.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/asix,ax88178.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ASIX AX88172/AX88772 USB Ethernet Controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Device tree properties for hard wired USB Ethernet devices.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - usbb95,1720   # ASIX AX88172</div><div class='add'>+          - usbb95,172a   # ASIX AX88172A</div><div class='add'>+          - usbb95,1780   # ASIX AX88178</div><div class='add'>+          - usbb95,7720   # ASIX AX88772</div><div class='add'>+          - usbb95,772a   # ASIX AX88772A</div><div class='add'>+          - usbb95,772b   # ASIX AX88772B</div><div class='add'>+          - usbb95,7e2b   # ASIX AX88772B</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  local-mac-address: true</div><div class='add'>+  mac-address: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    usb {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet@1 {</div><div class='add'>+            compatible = "usbb95,7e2b";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    usb {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        usb1@1 {</div><div class='add'>+            compatible = "usb1234,5678";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            ethernet@1 {</div><div class='add'>+               compatible = "usbb95,772b";</div><div class='add'>+               reg = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/asix,ax88796c.yaml b/Documentation/devicetree/bindings/net/asix,ax88796c.yaml<br/>index 699ebf452479..6b849a4349c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/asix,ax88796c.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/asix,ax88796c.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/asix,ax88796c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/asix,ax88796c.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: ethernet-controller.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -39,8 +40,8 @@ properties:</div><div class='ctx'>       it should be marked GPIO_ACTIVE_LOW.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  controller-data: true</div><div class='ctx'>   local-mac-address: true</div><div class='del'>-</div><div class='ctx'>   mac-address: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -57,7 +58,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml b/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml<br/>index 1c88820cbcdf..d6ef468495c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml</a></div><div class='hunk'>@@ -15,15 +15,19 @@ description: |+</div><div class='ctx'>   MAC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mdio.yaml#"</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: aspeed,ast2600-mdio</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: The register range of the MDIO controller instance</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -34,11 +38,13 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/ast2600-clock.h&gt;</div><div class='ctx'>     mdio0: mdio@1e650000 {</div><div class='ctx'>             compatible = "aspeed,ast2600-mdio";</div><div class='ctx'>             reg = &lt;0x1e650000 0x8&gt;;</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='add'>+            resets = &lt;&amp;syscon ASPEED_RESET_MII&gt;;</div><div class='ctx'> </div><div class='ctx'>             ethphy0: ethernet-phy@0 {</div><div class='ctx'>                     compatible = "ethernet-phy-ieee802.3-c22";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/bluetooth.txt b/Documentation/devicetree/bindings/net/bluetooth.txt<br/>deleted file mode 100644<br/>index 94797df751b8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/bluetooth.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/bluetooth.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,5 +0,0 @@</div><div class='del'>-The following properties are common to the Bluetooth controllers:</div><div class='del'>-</div><div class='del'>-- local-bd-address: array of 6 bytes, specifies the BD address that was</div><div class='del'>-  uniquely assigned to the Bluetooth device, formatted with least significant</div><div class='del'>-  byte first (little-endian).</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/bluetooth/bluetooth-controller.yaml b/Documentation/devicetree/bindings/net/bluetooth/bluetooth-controller.yaml<br/>new file mode 100644<br/>index 000000000000..59bb0d7e8ab3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/bluetooth/bluetooth-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/bluetooth/bluetooth-controller.yaml</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/bluetooth/bluetooth-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Bluetooth Controller Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marcel Holtmann &lt;marcel@holtmann.org&gt;</div><div class='add'>+  - Johan Hedberg &lt;johan.hedberg@gmail.com&gt;</div><div class='add'>+  - Luiz Augusto von Dentz &lt;luiz.dentz@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^bluetooth(@.*)?$"</div><div class='add'>+</div><div class='add'>+  local-bd-address:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    maxItems: 6</div><div class='add'>+    description:</div><div class='add'>+      Specifies the BD address that was uniquely assigned to the Bluetooth</div><div class='add'>+      device. Formatted with least significant byte first (little-endian), e.g.</div><div class='add'>+      in order to assign the address 00:11:22:33:44:55 this property must have</div><div class='add'>+      the value [55 44 33 22 11 00].</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml b/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml<br/>new file mode 100644<br/>index 000000000000..37cb39a3a62e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/bluetooth/brcm,bcm4377-bluetooth.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/bluetooth/brcm,bcm4377-bluetooth.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom BCM4377 family PCIe Bluetooth Chips</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sven Peter &lt;sven@svenpeter.dev&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This binding describes Broadcom BCM4377 family PCIe-attached bluetooth chips</div><div class='add'>+  usually found in Apple machines. The Wi-Fi part of the chip is described in</div><div class='add'>+  bindings/net/wireless/brcm,bcm4329-fmac.yaml.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: bluetooth-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - pci14e4,5fa0 # BCM4377</div><div class='add'>+      - pci14e4,5f69 # BCM4378</div><div class='add'>+      - pci14e4,5f71 # BCM4387</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  brcm,board-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Board type of the Bluetooth chip. This is used to decouple</div><div class='add'>+      the overall system board from the Bluetooth module and used to construct</div><div class='add'>+      firmware and calibration data filenames.</div><div class='add'>+      On Apple platforms, this should be the Apple module-instance codename</div><div class='add'>+      prefixed by "apple,", e.g. "apple,atlantisb".</div><div class='add'>+    pattern: '^apple,.*'</div><div class='add'>+</div><div class='add'>+  brcm,taurus-cal-blob:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: A per-device calibration blob for the Bluetooth radio. This</div><div class='add'>+      should be filled in by the bootloader from platform configuration</div><div class='add'>+      data, if necessary, and will be uploaded to the device.</div><div class='add'>+      This blob is used if the chip stepping of the Bluetooth module does not</div><div class='add'>+      support beamforming.</div><div class='add'>+</div><div class='add'>+  brcm,taurus-bf-cal-blob:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: A per-device calibration blob for the Bluetooth radio. This</div><div class='add'>+      should be filled in by the bootloader from platform configuration</div><div class='add'>+      data, if necessary, and will be uploaded to the device.</div><div class='add'>+      This blob is used if the chip stepping of the Bluetooth module supports</div><div class='add'>+      beamforming.</div><div class='add'>+</div><div class='add'>+  local-bd-address: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - local-bd-address</div><div class='add'>+  - brcm,board-type</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pcie@a0000000 {</div><div class='add'>+      #address-cells = &lt;3&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      reg = &lt;0xa0000000 0x1000000&gt;;</div><div class='add'>+      device_type = "pci";</div><div class='add'>+      ranges = &lt;0x43000000 0x6 0xa0000000 0xa0000000 0x0 0x20000000&gt;;</div><div class='add'>+</div><div class='add'>+      bluetooth@0,1 {</div><div class='add'>+        compatible = "pci14e4,5f69";</div><div class='add'>+        reg = &lt;0x100 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+        brcm,board-type = "apple,honshu";</div><div class='add'>+        /* To be filled by the bootloader */</div><div class='add'>+        local-bd-address = [00 00 00 00 00 00];</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml b/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml<br/>new file mode 100644<br/>index 000000000000..57e4c87cb00b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/bluetooth/nxp,88w8987-bt.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP Bluetooth chips</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This binding describes UART-attached NXP bluetooth chips. These chips</div><div class='add'>+  are dual-radio chips supporting WiFi and Bluetooth. The bluetooth</div><div class='add'>+  works on standard H4 protocol over 4-wire UART. The RTS and CTS lines</div><div class='add'>+  are used during FW download. To enable power save mode, the host</div><div class='add'>+  asserts break signal over UART-TX line to put the chip into power save</div><div class='add'>+  state. De-asserting break wakes up the BT chip.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neeraj Sanjay Kale &lt;neeraj.sanjaykale@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nxp,88w8987-bt</div><div class='add'>+      - nxp,88w8997-bt</div><div class='add'>+</div><div class='add'>+  fw-init-baudrate:</div><div class='add'>+    description:</div><div class='add'>+      Chip baudrate after FW is downloaded and initialized.</div><div class='add'>+      This property depends on the module vendor's</div><div class='add'>+      configuration. If this property is not specified,</div><div class='add'>+      115200 is set as default.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    serial {</div><div class='add'>+        bluetooth {</div><div class='add'>+            compatible = "nxp,88w8987-bt";</div><div class='add'>+            fw-init-baudrate = &lt;3000000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qualcomm-bluetooth.yaml b/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml<br/>index f93c6e7a1b59..68f78b90d23a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qualcomm-bluetooth.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qualcomm-bluetooth.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/net/qualcomm-bluetooth.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/net/bluetooth/qualcomm-bluetooth.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Bluetooth Chips</div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>       - qcom,wcn3998-bt</div><div class='ctx'>       - qcom,qca6390-bt</div><div class='ctx'>       - qcom,wcn6750-bt</div><div class='add'>+      - qcom,wcn6855-bt</div><div class='ctx'> </div><div class='ctx'>   enable-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -79,8 +80,7 @@ properties:</div><div class='ctx'>   firmware-name:</div><div class='ctx'>     description: specify the name of nvm firmware to load</div><div class='ctx'> </div><div class='del'>-  local-bd-address:</div><div class='del'>-    description: see Documentation/devicetree/bindings/net/bluetooth.txt</div><div class='add'>+  local-bd-address: true</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -89,6 +89,7 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: bluetooth-controller.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -133,6 +134,22 @@ allOf:</div><div class='ctx'>         - vddrfa1p7-supply</div><div class='ctx'>         - vddrfa1p2-supply</div><div class='ctx'>         - vddasd-supply</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,wcn6855-bt</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - enable-gpios</div><div class='add'>+        - swctrl-gpios</div><div class='add'>+        - vddio-supply</div><div class='add'>+        - vddbtcxmx-supply</div><div class='add'>+        - vddrfacmn-supply</div><div class='add'>+        - vddrfa0p8-supply</div><div class='add'>+        - vddrfa1p2-supply</div><div class='add'>+        - vddrfa1p7-supply</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/brcm,amac.yaml b/Documentation/devicetree/bindings/net/brcm,amac.yaml<br/>index 8f031932c8af..210fb29c4e7b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/brcm,amac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/brcm,amac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/brcm,amac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/brcm,amac.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/brcm,amac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom AMAC Ethernet Controller Device Tree Bindings</div><div class='add'>+title: Broadcom AMAC Ethernet Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml b/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml<br/>index e5af53508e25..0e5e5db32faf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/brcm,bcmgenet.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/brcm,bcmgenet.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM7xxx Ethernet Controller (GENET) binding</div><div class='add'>+title: Broadcom BCM7xxx Ethernet Controller (GENET)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Doug Berger &lt;opendmb@gmail.com&gt;</div><div class='hunk'>@@ -73,8 +73,6 @@ allOf:</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='del'>-  #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-</div><div class='ctx'>   - |</div><div class='ctx'>     ethernet@f0b60000 {</div><div class='ctx'>         phy-mode = "internal";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/brcm,systemport.yaml b/Documentation/devicetree/bindings/net/brcm,systemport.yaml<br/>index 5fc9c9fafd85..b40006d44791 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/brcm,systemport.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/brcm,systemport.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/brcm,systemport.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/brcm,systemport.yaml</a></div><div class='hunk'>@@ -66,7 +66,7 @@ required:</div><div class='ctx'>   - phy-mode</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml b/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml<br/>index 5aac094fd217..cc70b00c6ce5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/broadcom-bluetooth.yaml</a></div><div class='hunk'>@@ -19,10 +19,15 @@ properties:</div><div class='ctx'>       - brcm,bcm4329-bt</div><div class='ctx'>       - brcm,bcm4330-bt</div><div class='ctx'>       - brcm,bcm4334-bt</div><div class='add'>+      - brcm,bcm43430a0-bt</div><div class='add'>+      - brcm,bcm43430a1-bt</div><div class='ctx'>       - brcm,bcm43438-bt</div><div class='ctx'>       - brcm,bcm4345c5</div><div class='ctx'>       - brcm,bcm43540-bt</div><div class='ctx'>       - brcm,bcm4335a0</div><div class='add'>+      - brcm,bcm4349-bt</div><div class='add'>+      - cypress,cyw4373a0-bt</div><div class='add'>+      - infineon,cyw55572-bt</div><div class='ctx'> </div><div class='ctx'>   shutdown-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -92,6 +97,13 @@ properties:</div><div class='ctx'>        pcm-sync-mode: slave, master</div><div class='ctx'>        pcm-clock-mode: slave, master</div><div class='ctx'> </div><div class='add'>+  brcm,requires-autobaud-mode:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Set this property if autobaud mode is required. Autobaud mode is required</div><div class='add'>+      if the device's initial baud rate in normal mode is not supported by the</div><div class='add'>+      host or if the device requires autobaud mode startup before loading FW.</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Handle to the line HOST_WAKE used to wake</div><div class='hunk'>@@ -108,6 +120,22 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='add'>+dependencies:</div><div class='add'>+  brcm,requires-autobaud-mode: [ shutdown-gpios ]</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  not:</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          enum:</div><div class='add'>+            - brcm,bcm20702a1</div><div class='add'>+            - brcm,bcm4329-bt</div><div class='add'>+            - brcm,bcm4330-bt</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    reset-gpios: false</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml b/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml<br/>index 3c51b2d02957..9c494957a07a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/allwinner,sun4i-a10-can.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/can/allwinner,sun4i-a10-can.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 CAN Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 CAN Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/bosch,c_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,c_can.yaml<br/>index 8bad328b184d..4d7d67ee175a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/bosch,c_can.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/bosch,c_can.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/bosch,c_can.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/bosch,c_can.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/can/bosch,c_can.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bosch C_CAN/D_CAN controller Device Tree Bindings</div><div class='add'>+title: Bosch C_CAN/D_CAN controller</div><div class='ctx'> </div><div class='ctx'> description: Bosch C_CAN/D_CAN controller for CAN bus</div><div class='ctx'> </div><div class='hunk'>@@ -80,8 +80,6 @@ if:</div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='ctx'>     interrupts:</div><div class='del'>-      minItems: 4</div><div class='del'>-      maxItems: 4</div><div class='ctx'>       items:</div><div class='ctx'>         - description: Error and status IRQ</div><div class='ctx'>         - description: Message object IRQ</div><div class='hunk'>@@ -91,7 +89,6 @@ then:</div><div class='ctx'> else:</div><div class='ctx'>   properties:</div><div class='ctx'>     interrupts:</div><div class='del'>-      maxItems: 1</div><div class='ctx'>       items:</div><div class='ctx'>         - description: Error and status IRQ</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml b/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml<br/>index 26aa0830eea1..67879aab623b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/bosch,m_can.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/bosch,m_can.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/bosch,m_can.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/can/bosch,m_can.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bosch MCAN controller Bindings</div><div class='add'>+title: Bosch MCAN controller</div><div class='ctx'> </div><div class='ctx'> description: Bosch MCAN controller for CAN bus</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/can-controller.yaml b/Documentation/devicetree/bindings/net/can/can-controller.yaml<br/>index 1f0e98051074..217be90960e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/can-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/can-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/can-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/can-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/can/can-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: CAN Controller Generic Binding</div><div class='add'>+title: CAN Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/can-transceiver.yaml b/Documentation/devicetree/bindings/net/can/can-transceiver.yaml<br/>index d1ef1fe6ab29..d422b3921ffa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/can-transceiver.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/can-transceiver.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/can-transceiver.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/can-transceiver.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/can/can-transceiver.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: CAN transceiver Bindings</div><div class='add'>+title: CAN transceiver</div><div class='ctx'> </div><div class='ctx'> description: CAN transceiver generic properties bindings</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml b/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml<br/>new file mode 100644<br/>index 000000000000..a009a4402938<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/can/ctu,ctucanfd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: CTU CAN FD Open-source IP Core</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Open-source CAN FD IP core developed at the Czech Technical University in Prague</div><div class='add'>+</div><div class='add'>+  The core sources and documentation on project page</div><div class='add'>+    [1] sources : https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core</div><div class='add'>+    [2] datasheet : https://canbus.pages.fel.cvut.cz/ctucanfd_ip_core/doc/Datasheet.pdf</div><div class='add'>+</div><div class='add'>+  Integration in Xilinx Zynq SoC based system together with</div><div class='add'>+  OpenCores SJA1000 compatible controllers</div><div class='add'>+    [3] project : https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top</div><div class='add'>+  Martin Jerabek dimploma thesis with integration and testing</div><div class='add'>+  framework description</div><div class='add'>+    [4] PDF : https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+  - Ondrej Ille &lt;ondrej.ille@gmail.com&gt;</div><div class='add'>+  - Martin Jerabek &lt;martin.jerabek01@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: can-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: ctu,ctucanfd-2</div><div class='add'>+          - const: ctu,ctucanfd</div><div class='add'>+      - const: ctu,ctucanfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: |</div><div class='add'>+      phandle of reference clock (100 MHz is appropriate</div><div class='add'>+      for FPGA implementation on Zynq-7000 system).</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ctu_can_fd_0: can@43c30000 {</div><div class='add'>+      compatible = "ctu,ctucanfd";</div><div class='add'>+      interrupts = &lt;0 30 4&gt;;</div><div class='add'>+      clocks = &lt;&amp;clkc 15&gt;;</div><div class='add'>+      reg = &lt;0x43c30000 0x10000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml<br/>index e52db841bb8c..4162469c3c08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - enum:</div><div class='add'>+          - fsl,imx93-flexcan</div><div class='ctx'>           - fsl,imx8qm-flexcan</div><div class='ctx'>           - fsl,imx8mp-flexcan</div><div class='ctx'>           - fsl,imx6q-flexcan</div><div class='hunk'>@@ -62,6 +63,9 @@ properties:</div><div class='ctx'>       boot loader. This property should only be used the used operating system</div><div class='ctx'>       doesn't support the clocks and clock-names property.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   xceiver-supply:</div><div class='ctx'>     description: Regulator that powers the CAN transceiver.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml b/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml<br/>index b3826af6bd6e..2a98b26630cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml</a></div><div class='hunk'>@@ -4,9 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/can/microchip,mcp251xfd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title:</div><div class='del'>-  Microchip MCP2517FD and MCP2518FD stand-alone CAN controller device tree</div><div class='del'>-  bindings</div><div class='add'>+title: Microchip MCP2517FD, MCP2518FD and MCP251863 stand-alone CAN controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;</div><div class='hunk'>@@ -17,13 +15,14 @@ allOf:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: microchip,mcp2517fd</div><div class='del'>-        description: for MCP2517FD</div><div class='del'>-      - const: microchip,mcp2518fd</div><div class='del'>-        description: for MCP2518FD</div><div class='del'>-      - const: microchip,mcp251xfd</div><div class='del'>-        description: to autodetect chip variant</div><div class='del'>-</div><div class='add'>+      - enum:</div><div class='add'>+          - microchip,mcp2517fd</div><div class='add'>+          - microchip,mcp2518fd</div><div class='add'>+          - microchip,mcp251xfd</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - microchip,mcp251863</div><div class='add'>+          - const: microchip,mcp2518fd</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -63,7 +62,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml b/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml<br/>new file mode 100644<br/>index 000000000000..45aa3de7cf01<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/can/microchip,mpfs-can.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title:</div><div class='add'>+  Microchip PolarFire SoC (MPFS) can controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Conor Dooley &lt;conor.dooley@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: can-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: microchip,mpfs-can</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    can@2010c000 {</div><div class='add'>+        compatible = "microchip,mpfs-can";</div><div class='add'>+        reg = &lt;0x2010c000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkcfg 17&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;plic&gt;;</div><div class='add'>+        interrupts = &lt;56&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml b/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml<br/>new file mode 100644<br/>index 000000000000..144a3785132c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml</a></div><div class='hunk'>@@ -0,0 +1,136 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/can/nxp,sja1000.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Memory mapped SJA1000 CAN controller from NXP (formerly Philips)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Wolfgang Grandegger &lt;wg@grandegger.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nxp,sja1000</div><div class='add'>+          - technologic,sja1000</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a06g032-sja1000 # RZ/N1D</div><div class='add'>+              - renesas,r9a06g033-sja1000 # RZ/N1S</div><div class='add'>+          - const: renesas,rzn1-sja1000 # RZ/N1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg-io-width:</div><div class='add'>+    description: I/O register width (in bytes) implemented by this device</div><div class='add'>+    default: 1</div><div class='add'>+    enum: [ 1, 2, 4 ]</div><div class='add'>+</div><div class='add'>+  nxp,external-clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 16000000</div><div class='add'>+    description: |</div><div class='add'>+      Frequency of the external oscillator clock in Hz.</div><div class='add'>+      The internal clock frequency used by the SJA1000 is half of that value.</div><div class='add'>+</div><div class='add'>+  nxp,tx-output-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1, 2, 3 ]</div><div class='add'>+    default: 1</div><div class='add'>+    description: |</div><div class='add'>+      operation mode of the TX output control logic. Valid values are:</div><div class='add'>+        &lt;0&gt; : bi-phase output mode</div><div class='add'>+        &lt;1&gt; : normal output mode (default)</div><div class='add'>+        &lt;2&gt; : test output mode</div><div class='add'>+        &lt;3&gt; : clock output mode</div><div class='add'>+</div><div class='add'>+  nxp,tx-output-config:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0x02</div><div class='add'>+    description: |</div><div class='add'>+      TX output pin configuration. Valid values are any one of the below</div><div class='add'>+      or combination of TX0 and TX1:</div><div class='add'>+        &lt;0x01&gt; : TX0 invert</div><div class='add'>+        &lt;0x02&gt; : TX0 pull-down (default)</div><div class='add'>+        &lt;0x04&gt; : TX0 pull-up</div><div class='add'>+        &lt;0x06&gt; : TX0 push-pull</div><div class='add'>+        &lt;0x08&gt; : TX1 invert</div><div class='add'>+        &lt;0x10&gt; : TX1 pull-down</div><div class='add'>+        &lt;0x20&gt; : TX1 pull-up</div><div class='add'>+        &lt;0x30&gt; : TX1 push-pull</div><div class='add'>+</div><div class='add'>+  nxp,clock-out-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      clock frequency in Hz on the CLKOUT pin.</div><div class='add'>+      If not specified or if the specified value is 0, the CLKOUT pin</div><div class='add'>+      will be disabled.</div><div class='add'>+</div><div class='add'>+  nxp,no-comparator-bypass:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Allows to disable the CAN input comparator.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: can-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - technologic,sja1000</div><div class='add'>+              - renesas,rzn1-sja1000</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - reg-io-width</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,rzn1-sja1000</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    can@1a000 {</div><div class='add'>+        compatible = "technologic,sja1000";</div><div class='add'>+        reg = &lt;0x1a000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;1&gt;;</div><div class='add'>+        reg-io-width = &lt;2&gt;;</div><div class='add'>+        nxp,tx-output-config = &lt;0x06&gt;;</div><div class='add'>+        nxp,external-clock-frequency = &lt;24000000&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a06g032-sysctrl.h&gt;</div><div class='add'>+</div><div class='add'>+    can@52104000 {</div><div class='add'>+        compatible = "renesas,r9a06g032-sja1000", "renesas,rzn1-sja1000";</div><div class='add'>+        reg = &lt;0x52104000 0x800&gt;;</div><div class='add'>+        reg-io-width = &lt;4&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;sysctrl R9A06G032_HCLK_CAN0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;sysctrl&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml<br/>index f98c53dc1894..d3f45d29fa0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml</a></div><div class='hunk'>@@ -9,9 +9,6 @@ title: Renesas R-Car CAN FD Controller</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: can-controller.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -23,6 +20,7 @@ properties:</div><div class='ctx'>               - renesas,r8a774e1-canfd     # RZ/G2H</div><div class='ctx'>               - renesas,r8a7795-canfd      # R-Car H3</div><div class='ctx'>               - renesas,r8a7796-canfd      # R-Car M3-W</div><div class='add'>+              - renesas,r8a77961-canfd     # R-Car M3-W+</div><div class='ctx'>               - renesas,r8a77965-canfd     # R-Car M3-N</div><div class='ctx'>               - renesas,r8a77970-canfd     # R-Car V3M</div><div class='ctx'>               - renesas,r8a77980-canfd     # R-Car V3H</div><div class='hunk'>@@ -32,12 +30,17 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,r8a779a0-canfd     # R-Car V3U</div><div class='add'>+              - renesas,r8a779g0-canfd     # R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-canfd # R-Car Gen4</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g043-canfd    # RZ/G2UL and RZ/Five</div><div class='ctx'>               - renesas,r9a07g044-canfd    # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,r9a07g054-canfd    # RZ/V2L</div><div class='ctx'>           - const: renesas,rzg2l-canfd     # RZ/G2L family</div><div class='ctx'> </div><div class='del'>-      - const: renesas,r8a779a0-canfd      # R-Car V3U</div><div class='del'>-</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +64,7 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='ctx'>       The controller can operate in either CAN FD only mode (default) or</div><div class='del'>-      Classical CAN only mode.  The mode is global to both the channels.</div><div class='add'>+      Classical CAN only mode.  The mode is global to all channels.</div><div class='ctx'>       Specify this property to put the controller in Classical CAN only mode.</div><div class='ctx'> </div><div class='ctx'>   assigned-clocks:</div><div class='hunk'>@@ -75,17 +78,23 @@ properties:</div><div class='ctx'>     description: Maximum frequency of the CANFD clock.</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "^channel[01]$":</div><div class='add'>+  "^channel[0-7]$":</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='del'>-      The controller supports two channels and each is represented as a child</div><div class='del'>-      node.  Each child node supports the "status" property only, which</div><div class='del'>-      is used to enable/disable the respective channel.</div><div class='add'>+      The controller supports multiple channels and each is represented as a</div><div class='add'>+      child node.  Each channel can be enabled/disabled individually.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      phys:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='add'>+  - interrupt-names</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - power-domains</div><div class='hunk'>@@ -95,61 +104,73 @@ required:</div><div class='ctx'>   - channel0</div><div class='ctx'>   - channel1</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - renesas,rzg2l-canfd</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    interrupts:</div><div class='del'>-      items:</div><div class='del'>-        - description: CAN global error interrupt</div><div class='del'>-        - description: CAN receive FIFO interrupt</div><div class='del'>-        - description: CAN0 error interrupt</div><div class='del'>-        - description: CAN0 transmit interrupt</div><div class='del'>-        - description: CAN0 transmit/receive FIFO receive completion interrupt</div><div class='del'>-        - description: CAN1 error interrupt</div><div class='del'>-        - description: CAN1 transmit interrupt</div><div class='del'>-        - description: CAN1 transmit/receive FIFO receive completion interrupt</div><div class='del'>-</div><div class='del'>-    interrupt-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: g_err</div><div class='del'>-        - const: g_recc</div><div class='del'>-        - const: ch0_err</div><div class='del'>-        - const: ch0_rec</div><div class='del'>-        - const: ch0_trx</div><div class='del'>-        - const: ch1_err</div><div class='del'>-        - const: ch1_rec</div><div class='del'>-        - const: ch1_trx</div><div class='del'>-</div><div class='del'>-    resets:</div><div class='del'>-      maxItems: 2</div><div class='del'>-</div><div class='del'>-    reset-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: rstp_n</div><div class='del'>-        - const: rstc_n</div><div class='del'>-</div><div class='del'>-  required:</div><div class='del'>-    - interrupt-names</div><div class='del'>-    - reset-names</div><div class='del'>-else:</div><div class='del'>-  properties:</div><div class='del'>-    interrupts:</div><div class='del'>-      items:</div><div class='del'>-        - description: Channel interrupt</div><div class='del'>-        - description: Global interrupt</div><div class='del'>-</div><div class='del'>-    interrupt-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: ch_int</div><div class='del'>-        - const: g_int</div><div class='del'>-</div><div class='del'>-    resets:</div><div class='del'>-      maxItems: 1</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: can-controller.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,rzg2l-canfd</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: CAN global error interrupt</div><div class='add'>+            - description: CAN receive FIFO interrupt</div><div class='add'>+            - description: CAN0 error interrupt</div><div class='add'>+            - description: CAN0 transmit interrupt</div><div class='add'>+            - description: CAN0 transmit/receive FIFO receive completion interrupt</div><div class='add'>+            - description: CAN1 error interrupt</div><div class='add'>+            - description: CAN1 transmit interrupt</div><div class='add'>+            - description: CAN1 transmit/receive FIFO receive completion interrupt</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: g_err</div><div class='add'>+            - const: g_recc</div><div class='add'>+            - const: ch0_err</div><div class='add'>+            - const: ch0_rec</div><div class='add'>+            - const: ch0_trx</div><div class='add'>+            - const: ch1_err</div><div class='add'>+            - const: ch1_rec</div><div class='add'>+            - const: ch1_trx</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: rstp_n</div><div class='add'>+            - const: rstc_n</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - reset-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: Channel interrupt</div><div class='add'>+            - description: Global interrupt</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ch_int</div><div class='add'>+            - const: g_int</div><div class='add'>+</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: renesas,rcar-gen4-canfd</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^channel[2-7]$": false</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -165,6 +186,7 @@ examples:</div><div class='ctx'>             reg = &lt;0xe66c0000 0x8000&gt;;</div><div class='ctx'>             interrupts = &lt;GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'>                          &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-names = "ch_int", "g_int";</div><div class='ctx'>             clocks = &lt;&amp;cpg CPG_MOD 914&gt;,</div><div class='ctx'>                      &lt;&amp;cpg CPG_CORE R8A7795_CLK_CANFD&gt;,</div><div class='ctx'>                      &lt;&amp;can_clk&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/sja1000.txt b/Documentation/devicetree/bindings/net/can/sja1000.txt<br/>deleted file mode 100644<br/>index ac3160eca96a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/sja1000.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/sja1000.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,58 +0,0 @@</div><div class='del'>-Memory mapped SJA1000 CAN controller from NXP (formerly Philips)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be one of "nxp,sja1000", "technologic,sja1000".</div><div class='del'>-</div><div class='del'>-- reg : should specify the chip select, address offset and size required</div><div class='del'>-	to map the registers of the SJA1000. The size is usually 0x80.</div><div class='del'>-</div><div class='del'>-- interrupts: property with a value describing the interrupt source</div><div class='del'>-	(number and sensitivity) required for the SJA1000.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- reg-io-width : Specify the size (in bytes) of the IO accesses that</div><div class='del'>-	should be performed on the device.  Valid value is 1, 2 or 4.</div><div class='del'>-	This property is ignored for technologic version.</div><div class='del'>-	Default to 1 (8 bits).</div><div class='del'>-</div><div class='del'>-- nxp,external-clock-frequency : Frequency of the external oscillator</div><div class='del'>-	clock in Hz. Note that the internal clock frequency used by the</div><div class='del'>-	SJA1000 is half of that value. If not specified, a default value</div><div class='del'>-	of 16000000 (16 MHz) is used.</div><div class='del'>-</div><div class='del'>-- nxp,tx-output-mode : operation mode of the TX output control logic:</div><div class='del'>-	&lt;0x0&gt; : bi-phase output mode</div><div class='del'>-	&lt;0x1&gt; : normal output mode (default)</div><div class='del'>-	&lt;0x2&gt; : test output mode</div><div class='del'>-	&lt;0x3&gt; : clock output mode</div><div class='del'>-</div><div class='del'>-- nxp,tx-output-config : TX output pin configuration:</div><div class='del'>-	&lt;0x01&gt; : TX0 invert</div><div class='del'>-	&lt;0x02&gt; : TX0 pull-down (default)</div><div class='del'>-	&lt;0x04&gt; : TX0 pull-up</div><div class='del'>-	&lt;0x06&gt; : TX0 push-pull</div><div class='del'>-	&lt;0x08&gt; : TX1 invert</div><div class='del'>-	&lt;0x10&gt; : TX1 pull-down</div><div class='del'>-	&lt;0x20&gt; : TX1 pull-up</div><div class='del'>-	&lt;0x30&gt; : TX1 push-pull</div><div class='del'>-</div><div class='del'>-- nxp,clock-out-frequency : clock frequency in Hz on the CLKOUT pin.</div><div class='del'>-	If not specified or if the specified value is 0, the CLKOUT pin</div><div class='del'>-	will be disabled.</div><div class='del'>-</div><div class='del'>-- nxp,no-comparator-bypass : Allows to disable the CAN input comparator.</div><div class='del'>-</div><div class='del'>-For further information, please have a look to the SJA1000 data sheet.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-can@3,100 {</div><div class='del'>-	compatible = "nxp,sja1000";</div><div class='del'>-	reg = &lt;3 0x100 0x80&gt;;</div><div class='del'>-	interrupts = &lt;2 0&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;mpic&gt;;</div><div class='del'>-	nxp,external-clock-frequency = &lt;16000000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml b/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml<br/>new file mode 100644<br/>index 000000000000..769fa5c27b76<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics bxCAN controller</div><div class='add'>+</div><div class='add'>+description: STMicroelectronics BxCAN controller for CAN bus</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: can-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - st,stm32f4-bxcan</div><div class='add'>+</div><div class='add'>+  st,can-primary:</div><div class='add'>+    description:</div><div class='add'>+      Primary and secondary mode of the bxCAN peripheral is only relevant</div><div class='add'>+      if the chip has two CAN peripherals. In that case they share some</div><div class='add'>+      of the required logic.</div><div class='add'>+      To avoid misunderstandings, it should be noted that ST documentation</div><div class='add'>+      uses the terms master/slave instead of primary/secondary.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: transmit interrupt</div><div class='add'>+      - description: FIFO 0 receive interrupt</div><div class='add'>+      - description: FIFO 1 receive interrupt</div><div class='add'>+      - description: status change error interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx0</div><div class='add'>+      - const: rx1</div><div class='add'>+      - const: sce</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  st,gcan:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      The phandle to the gcan node which allows to access the 512-bytes</div><div class='add'>+      SRAM memory shared by the two bxCAN cells (CAN1 primary and CAN2</div><div class='add'>+      secondary) in dual CAN peripheral configuration.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+  - clocks</div><div class='add'>+  - st,gcan</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/stm32fx-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/stm32f4-rcc.h&gt;</div><div class='add'>+</div><div class='add'>+    can1: can@40006400 {</div><div class='add'>+        compatible = "st,stm32f4-bxcan";</div><div class='add'>+        reg = &lt;0x40006400 0x200&gt;;</div><div class='add'>+        interrupts = &lt;19&gt;, &lt;20&gt;, &lt;21&gt;, &lt;22&gt;;</div><div class='add'>+        interrupt-names = "tx", "rx0", "rx1", "sce";</div><div class='add'>+        resets = &lt;&amp;rcc STM32F4_APB1_RESET(CAN1)&gt;;</div><div class='add'>+        clocks = &lt;&amp;rcc 0 STM32F4_APB1_CLOCK(CAN1)&gt;;</div><div class='add'>+        st,can-primary;</div><div class='add'>+        st,gcan = &lt;&amp;gcan&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/can/xilinx,can.yaml b/Documentation/devicetree/bindings/net/can/xilinx,can.yaml<br/>index 65af8183cb9c..897d2cbda45b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/xilinx,can.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/can/xilinx,can.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/can/xilinx,can.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/can/xilinx,can.yaml</a></div><div class='hunk'>@@ -35,15 +35,15 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   tx-fifo-depth:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: CAN Tx fifo depth (Zynq, Axi CAN).</div><div class='ctx'> </div><div class='ctx'>   rx-fifo-depth:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: CAN Rx fifo depth (Zynq, Axi CAN, CAN FD in sequential Rx mode)</div><div class='ctx'> </div><div class='ctx'>   tx-mailbox-count:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: CAN Tx mailbox buffer count (CAN FD)</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/cdns,macb.yaml b/Documentation/devicetree/bindings/net/cdns,macb.yaml<br/>index 6cd3d853dcba..bef5e0f895be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/cdns,macb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/cdns,macb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/cdns,macb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/cdns,macb.yaml</a></div><div class='hunk'>@@ -23,11 +23,20 @@ properties:</div><div class='ctx'>               - cdns,zynq-gem         # Xilinx Zynq-7xxx SoC</div><div class='ctx'>               - cdns,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC</div><div class='ctx'>           - const: cdns,gem           # Generic</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - xlnx,versal-gem       # Xilinx Versal</div><div class='add'>+              - xlnx,zynq-gem         # Xilinx Zynq-7xxx SoC</div><div class='add'>+              - xlnx,zynqmp-gem       # Xilinx Zynq Ultrascale+ MPSoC</div><div class='add'>+          - const: cdns,gem           # Generic</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - cdns,at91sam9260-macb # Atmel at91sam9 SoCs</div><div class='ctx'>               - cdns,sam9x60-macb     # Microchip sam9x60 SoC</div><div class='add'>+              - microchip,mpfs-macb   # Microchip PolarFire SoC</div><div class='ctx'>           - const: cdns,macb          # Generic</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='hunk'>@@ -42,7 +51,6 @@ properties:</div><div class='ctx'>           - atmel,sama5d2-gem         # GEM IP (10/100) on Atmel sama5d2 SoCs</div><div class='ctx'>           - atmel,sama5d3-gem         # Gigabit IP on Atmel sama5d3 SoCs</div><div class='ctx'>           - atmel,sama5d4-gem         # GEM IP (10/100) on Atmel sama5d4 SoCs</div><div class='del'>-          - cdns,at32ap7000-macb      # Other 10/100 usage or use the generic form</div><div class='ctx'>           - cdns,np4-macb             # NP4 SoC devices</div><div class='ctx'>           - microchip,sama7g5-emac    # Microchip SAMA7G5 ethernet interface</div><div class='ctx'>           - microchip,sama7g5-gem     # Microchip SAMA7G5 gigabit ethernet interface</div><div class='hunk'>@@ -84,13 +92,6 @@ properties:</div><div class='ctx'>   phys:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  phy-names:</div><div class='del'>-    const: sgmii-phy</div><div class='del'>-    description:</div><div class='del'>-      Required with ZynqMP SoC when in SGMII mode.</div><div class='del'>-      Should reference PS-GTR generic PHY device for this controller</div><div class='del'>-      instance. See ZynqMP example.</div><div class='del'>-</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description:</div><div class='hunk'>@@ -129,6 +130,7 @@ patternProperties:</div><div class='ctx'>       reset-gpios: true</div><div class='ctx'> </div><div class='ctx'>       magic-packet:</div><div class='add'>+        type: boolean</div><div class='ctx'>         description:</div><div class='ctx'>           Indicates that the hardware supports waking up via magic packet.</div><div class='ctx'> </div><div class='hunk'>@@ -161,7 +163,7 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     macb0: ethernet@fffc4000 {</div><div class='del'>-            compatible = "cdns,at32ap7000-macb";</div><div class='add'>+            compatible = "cdns,macb";</div><div class='ctx'>             reg = &lt;0xfffc4000 0x4000&gt;;</div><div class='ctx'>             interrupts = &lt;21&gt;;</div><div class='ctx'>             phy-mode = "rmii";</div><div class='hunk'>@@ -187,7 +189,7 @@ examples:</div><div class='ctx'>             #address-cells = &lt;2&gt;;</div><div class='ctx'>             #size-cells = &lt;2&gt;;</div><div class='ctx'>             gem1: ethernet@ff0c0000 {</div><div class='del'>-                    compatible = "cdns,zynqmp-gem", "cdns,gem";</div><div class='add'>+                    compatible = "xlnx,zynqmp-gem", "cdns,gem";</div><div class='ctx'>                     interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'>                     interrupts = &lt;0 59 4&gt;, &lt;0 59 4&gt;;</div><div class='ctx'>                     reg = &lt;0x0 0xff0c0000 0x0 0x1000&gt;;</div><div class='hunk'>@@ -197,14 +199,11 @@ examples:</div><div class='ctx'>                     clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";</div><div class='ctx'>                     #address-cells = &lt;1&gt;;</div><div class='ctx'>                     #size-cells = &lt;0&gt;;</div><div class='del'>-                    #stream-id-cells = &lt;1&gt;;</div><div class='ctx'>                     iommus = &lt;&amp;smmu 0x875&gt;;</div><div class='ctx'>                     power-domains = &lt;&amp;zynqmp_firmware PD_ETH_1&gt;;</div><div class='ctx'>                     resets = &lt;&amp;zynqmp_reset ZYNQMP_RESET_GEM1&gt;;</div><div class='ctx'>                     reset-names = "gem1_rst";</div><div class='del'>-                    status = "okay";</div><div class='ctx'>                     phy-mode = "sgmii";</div><div class='del'>-                    phy-names = "sgmii-phy";</div><div class='ctx'>                     phys = &lt;&amp;psgtr 1 PHY_TYPE_SGMII 1 1&gt;;</div><div class='ctx'>                     fixed-link {</div><div class='ctx'>                             speed = &lt;1000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml b/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml<br/>index cc01b9b5752a..44fd23a5fa2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml</a></div><div class='hunk'>@@ -31,12 +31,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='del'>-#The subnodes represents the two ethernet ports in this device.</div><div class='del'>-#They are not independent of each other since they share resources</div><div class='del'>-#in the parent node, and are thus children.</div><div class='add'>+# The subnodes represents the two ethernet ports in this device.</div><div class='add'>+# They are not independent of each other since they share resources</div><div class='add'>+# in the parent node, and are thus children.</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^ethernet-port@[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     description: contains the resources for ethernet port</div><div class='ctx'>     allOf:</div><div class='ctx'>       - $ref: ethernet-controller.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/cpsw.txt b/Documentation/devicetree/bindings/net/cpsw.txt<br/>index 7c7ac5eb0313..ef655f386b2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/cpsw.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/cpsw.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/cpsw.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/cpsw.txt</a></div><div class='hunk'>@@ -20,7 +20,7 @@ Required properties:</div><div class='ctx'> - active_slave		: Specifies the slave to use for time stamping,</div><div class='ctx'> 			  ethtool and SIOCGMIIPHY</div><div class='ctx'> - cpsw-phy-sel		: Specifies the phandle to the CPSW phy mode selection</div><div class='del'>-			  device. See also cpsw-phy-sel.txt for it's binding.</div><div class='add'>+			  device. See also cpsw-phy-sel.txt for its binding.</div><div class='ctx'> 			  Note that in legacy cases cpsw-phy-sel may be</div><div class='ctx'> 			  a child device instead of a phandle</div><div class='ctx'> 			  (DEPRECATED, use phys property instead).</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/ar9331.txt b/Documentation/devicetree/bindings/net/dsa/ar9331.txt<br/>index 320607cbbb17..f824fdae0da2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/ar9331.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/ar9331.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/ar9331.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/ar9331.txt</a></div><div class='hunk'>@@ -76,7 +76,6 @@ eth1: ethernet@1a000000 {</div><div class='ctx'> </div><div class='ctx'> 				switch_port0: port@0 {</div><div class='ctx'> 					reg = &lt;0x0&gt;;</div><div class='del'>-					label = "cpu";</div><div class='ctx'> 					ethernet = &lt;&amp;eth1&gt;;</div><div class='ctx'> </div><div class='ctx'> 					phy-mode = "gmii";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml b/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml<br/>index 3f01b65f3b22..9565a7402146 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/arrow,xrs700x.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/dsa/arrow,xrs700x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Arrow SpeedChips XRS7000 Series Switch Device Tree Bindings</div><div class='add'>+title: Arrow SpeedChips XRS7000 Series Switch</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: dsa.yaml#</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - George McCollister &lt;george.mccollister@gmail.com&gt;</div><div class='hunk'>@@ -61,8 +61,9 @@ examples:</div><div class='ctx'>                 };</div><div class='ctx'>                 ethernet-port@3 {</div><div class='ctx'>                     reg = &lt;3&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     ethernet = &lt;&amp;fec1&gt;;</div><div class='add'>+                    phy-mode = "rgmii-id";</div><div class='add'>+</div><div class='ctx'>                     fixed-link {</div><div class='ctx'>                         speed = &lt;1000&gt;;</div><div class='ctx'>                         full-duplex;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml b/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml<br/>index c3c938893ad9..4c78c546343f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml</a></div><div class='hunk'>@@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Broadcom BCM53xx Ethernet switches</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: dsa.yaml#</div><div class='del'>-</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -22,6 +19,7 @@ properties:</div><div class='ctx'>       - const: brcm,bcm53115</div><div class='ctx'>       - const: brcm,bcm53125</div><div class='ctx'>       - const: brcm,bcm53128</div><div class='add'>+      - const: brcm,bcm53134</div><div class='ctx'>       - const: brcm,bcm5365</div><div class='ctx'>       - const: brcm,bcm5395</div><div class='ctx'>       - const: brcm,bcm5389</div><div class='hunk'>@@ -60,61 +58,82 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - brcm,bcm3384-switch</div><div class='add'>+              - brcm,bcm6318-switch</div><div class='ctx'>               - brcm,bcm6328-switch</div><div class='add'>+              - brcm,bcm6362-switch</div><div class='ctx'>               - brcm,bcm6368-switch</div><div class='add'>+              - brcm,bcm63268-switch</div><div class='ctx'>           - const: brcm,bcm63xx-switch</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-# BCM585xx/586xx/88312 SoCs</div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - brcm,bcm58522-srab</div><div class='del'>-          - brcm,bcm58523-srab</div><div class='del'>-          - brcm,bcm58525-srab</div><div class='del'>-          - brcm,bcm58622-srab</div><div class='del'>-          - brcm,bcm58623-srab</div><div class='del'>-          - brcm,bcm58625-srab</div><div class='del'>-          - brcm,bcm88312-srab</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    reg:</div><div class='del'>-      minItems: 3</div><div class='del'>-      maxItems: 3</div><div class='del'>-    reg-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: srab</div><div class='del'>-        - const: mux_config</div><div class='del'>-        - const: sgmii_config</div><div class='del'>-    interrupts:</div><div class='del'>-      minItems: 13</div><div class='del'>-      maxItems: 13</div><div class='del'>-    interrupt-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: link_state_p0</div><div class='del'>-        - const: link_state_p1</div><div class='del'>-        - const: link_state_p2</div><div class='del'>-        - const: link_state_p3</div><div class='del'>-        - const: link_state_p4</div><div class='del'>-        - const: link_state_p5</div><div class='del'>-        - const: link_state_p7</div><div class='del'>-        - const: link_state_p8</div><div class='del'>-        - const: phy</div><div class='del'>-        - const: ts</div><div class='del'>-        - const: imp_sleep_timer_p5</div><div class='del'>-        - const: imp_sleep_timer_p7</div><div class='del'>-        - const: imp_sleep_timer_p8</div><div class='del'>-  required:</div><div class='del'>-    - interrupts</div><div class='del'>-else:</div><div class='del'>-  properties:</div><div class='del'>-    reg:</div><div class='del'>-      maxItems: 1</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - brcm,bcm5325</div><div class='add'>+              - brcm,bcm53115</div><div class='add'>+              - brcm,bcm53125</div><div class='add'>+              - brcm,bcm53128</div><div class='add'>+              - brcm,bcm5365</div><div class='add'>+              - brcm,bcm5395</div><div class='add'>+              - brcm,bcm5397</div><div class='add'>+              - brcm,bcm5398</div><div class='add'>+    then:</div><div class='add'>+      $ref: /schemas/spi/spi-peripheral-props.yaml</div><div class='add'>+</div><div class='add'>+    # BCM585xx/586xx/88312 SoCs</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - brcm,bcm58522-srab</div><div class='add'>+              - brcm,bcm58523-srab</div><div class='add'>+              - brcm,bcm58525-srab</div><div class='add'>+              - brcm,bcm58622-srab</div><div class='add'>+              - brcm,bcm58623-srab</div><div class='add'>+              - brcm,bcm58625-srab</div><div class='add'>+              - brcm,bcm88312-srab</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: srab</div><div class='add'>+            - const: mux_config</div><div class='add'>+            - const: sgmii_config</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 13</div><div class='add'>+          maxItems: 13</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link_state_p0</div><div class='add'>+            - const: link_state_p1</div><div class='add'>+            - const: link_state_p2</div><div class='add'>+            - const: link_state_p3</div><div class='add'>+            - const: link_state_p4</div><div class='add'>+            - const: link_state_p5</div><div class='add'>+            - const: link_state_p7</div><div class='add'>+            - const: link_state_p8</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: ts</div><div class='add'>+            - const: imp_sleep_timer_p5</div><div class='add'>+            - const: imp_sleep_timer_p7</div><div class='add'>+            - const: imp_sleep_timer_p8</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -154,7 +173,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>                 port@8 {</div><div class='ctx'>                     reg = &lt;8&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     phy-mode = "rgmii-txid";</div><div class='ctx'>                     ethernet = &lt;&amp;eth0&gt;;</div><div class='ctx'>                     fixed-link {</div><div class='hunk'>@@ -237,8 +255,9 @@ examples:</div><div class='ctx'> </div><div class='ctx'>                 port@8 {</div><div class='ctx'>                     ethernet = &lt;&amp;amac2&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     reg = &lt;8&gt;;</div><div class='add'>+                    phy-mode = "internal";</div><div class='add'>+</div><div class='ctx'>                     fixed-link {</div><div class='ctx'>                         speed = &lt;1000&gt;;</div><div class='ctx'>                         full-duplex;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml b/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml<br/>index d159ac78cec1..c745407f2f68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/brcm,sf2.yaml</a></div><div class='hunk'>@@ -76,29 +76,26 @@ properties:</div><div class='ctx'>       supports reporting the number of packets in-flight in a switch queue</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='del'>-  "#address-cells":</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  "#size-cells":</div><div class='del'>-    const: 0</div><div class='del'>-</div><div class='ctx'>   ports:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='del'>-    properties:</div><div class='del'>-      brcm,use-bcm-hdr:</div><div class='del'>-        description: if present, indicates that the switch port has Broadcom</div><div class='del'>-          tags enabled (per-packet metadata)</div><div class='del'>-        type: boolean</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^port@[0-9a-f]$':</div><div class='add'>+        $ref: dsa-port.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          brcm,use-bcm-hdr:</div><div class='add'>+            description: if present, indicates that the switch port has Broadcom</div><div class='add'>+              tags enabled (per-packet metadata)</div><div class='add'>+            type: boolean</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='del'>-  - "#address-cells"</div><div class='del'>-  - "#size-cells"</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dsa.yaml#"</div><div class='add'>+  - $ref: dsa.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -140,8 +137,6 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     switch@f0b00000 {</div><div class='ctx'>             compatible = "brcm,bcm7445-switch-v4.0";</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='ctx'>             reg = &lt;0xf0b00000 0x40000&gt;,</div><div class='ctx'>                   &lt;0xf0b40000 0x110&gt;,</div><div class='ctx'>                   &lt;0xf0b40340 0x30&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml b/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml<br/>index 09317e16cb5d..480120469953 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/dsa-port.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/dsa-port.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/dsa-port.yaml</a></div><div class='hunk'>@@ -4,22 +4,24 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/dsa/dsa-port.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ethernet Switch port Device Tree Bindings</div><div class='add'>+title: Generic DSA Switch Port</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='del'>-  - Vivien Didelot &lt;vivien.didelot@gmail.com&gt;</div><div class='add'>+  - Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  Ethernet switch port Description</div><div class='add'>+  A DSA switch port is a component of a switch that manages one MAC, and can</div><div class='add'>+  pass Ethernet frames. It can act as a stanadard Ethernet switch port, or have</div><div class='add'>+  DSA-specific functionality.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/net/ethernet-controller.yaml#</div><div class='add'>+$ref: /schemas/net/ethernet-switch-port.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   reg:</div><div class='del'>-    description: Port number</div><div class='add'>+    items:</div><div class='add'>+      - description: Port number</div><div class='ctx'> </div><div class='ctx'>   label:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -57,24 +59,22 @@ properties:</div><div class='ctx'>       - rtl8_4t</div><div class='ctx'>       - seville</div><div class='ctx'> </div><div class='del'>-  phy-handle: true</div><div class='del'>-</div><div class='del'>-  phy-mode: true</div><div class='del'>-</div><div class='del'>-  fixed-link: true</div><div class='del'>-</div><div class='del'>-  mac-address: true</div><div class='del'>-</div><div class='del'>-  sfp: true</div><div class='del'>-</div><div class='del'>-  managed: true</div><div class='del'>-</div><div class='del'>-  rx-internal-delay-ps: true</div><div class='del'>-</div><div class='del'>-  tx-internal-delay-ps: true</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - reg</div><div class='add'>+# CPU and DSA ports must have phylink-compatible link descriptions</div><div class='add'>+if:</div><div class='add'>+  oneOf:</div><div class='add'>+    - required: [ ethernet ]</div><div class='add'>+    - required: [ link ]</div><div class='add'>+then:</div><div class='add'>+  allOf:</div><div class='add'>+    - required:</div><div class='add'>+        - phy-mode</div><div class='add'>+    - oneOf:</div><div class='add'>+        - required:</div><div class='add'>+            - fixed-link</div><div class='add'>+        - required:</div><div class='add'>+            - phy-handle</div><div class='add'>+        - required:</div><div class='add'>+            - managed</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.yaml b/Documentation/devicetree/bindings/net/dsa/dsa.yaml<br/>index b9d48e357e77..8d971813bab6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/dsa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/dsa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/dsa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/dsa.yaml</a></div><div class='hunk'>@@ -4,12 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/dsa/dsa.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ethernet Switch Device Tree Bindings</div><div class='add'>+title: Ethernet Switch</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='del'>-  - Vivien Didelot &lt;vivien.didelot@gmail.com&gt;</div><div class='add'>+  - Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This binding represents Ethernet Switches which have a dedicated CPU</div><div class='hunk'>@@ -18,10 +18,9 @@ description:</div><div class='ctx'> </div><div class='ctx'> select: false</div><div class='ctx'> </div><div class='del'>-properties:</div><div class='del'>-  $nodename:</div><div class='del'>-    pattern: "^(ethernet-)?switch(@.*)?$"</div><div class='add'>+$ref: /schemas/net/ethernet-switch.yaml#</div><div class='ctx'> </div><div class='add'>+properties:</div><div class='ctx'>   dsa,member:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -32,30 +31,28 @@ properties:</div><div class='ctx'>       (single device hanging off a CPU port) must not specify this property</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'> </div><div class='del'>-patternProperties:</div><div class='del'>-  "^(ethernet-)?ports$":</div><div class='del'>-    type: object</div><div class='del'>-    properties:</div><div class='del'>-      '#address-cells':</div><div class='del'>-        const: 1</div><div class='del'>-      '#size-cells':</div><div class='del'>-        const: 0</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  ethernet-ports:</div><div class='add'>+    description: A DSA switch without any extra port properties</div><div class='add'>+    $ref: '#/'</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+      "^(ethernet-)?ports$":</div><div class='ctx'>         type: object</div><div class='del'>-        description: Ethernet switch ports</div><div class='del'>-</div><div class='del'>-        $ref: dsa-port.yaml#</div><div class='del'>-</div><div class='del'>-        unevaluatedProperties: false</div><div class='del'>-</div><div class='del'>-oneOf:</div><div class='del'>-  - required:</div><div class='del'>-      - ports</div><div class='del'>-  - required:</div><div class='del'>-      - ethernet-ports</div><div class='del'>-</div><div class='del'>-additionalProperties: true</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          '#address-cells':</div><div class='add'>+            const: 1</div><div class='add'>+          '#size-cells':</div><div class='add'>+            const: 0</div><div class='add'>+</div><div class='add'>+        patternProperties:</div><div class='add'>+          "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+            description: Ethernet switch ports</div><div class='add'>+            $ref: dsa-port.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml b/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml<br/>index 5592f58fa6f0..4021b054f684 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/hirschmann,hellcreek.yaml</a></div><div class='hunk'>@@ -4,15 +4,15 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/dsa/hirschmann,hellcreek.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Hirschmann Hellcreek TSN Switch Device Tree Bindings</div><div class='add'>+title: Hirschmann Hellcreek TSN Switch</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: dsa.yaml#</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='del'>-  - Vivien Didelot &lt;vivien.didelot@gmail.com&gt;</div><div class='add'>+  - Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='ctx'>   - Kurt Kanzenbach &lt;kurt@linutronix.de&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='hunk'>@@ -48,7 +48,7 @@ properties:</div><div class='ctx'>       "^led@[01]$":</div><div class='ctx'>         type: object</div><div class='ctx'>         description: Hellcreek leds</div><div class='del'>-        $ref: ../../leds/common.yaml#</div><div class='add'>+        $ref: /schemas/leds/common.yaml#</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           reg:</div><div class='hunk'>@@ -91,8 +91,13 @@ examples:</div><div class='ctx'> </div><div class='ctx'>                 port@0 {</div><div class='ctx'>                     reg = &lt;0&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                    phy-mode = "mii";</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;100&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                    };</div><div class='ctx'>                 };</div><div class='ctx'> </div><div class='ctx'>                 port@2 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/lan9303.txt b/Documentation/devicetree/bindings/net/dsa/lan9303.txt<br/>index 464d6bf87605..46a732087f5c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/lan9303.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/lan9303.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/lan9303.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/lan9303.txt</a></div><div class='hunk'>@@ -46,7 +46,6 @@ I2C managed mode:</div><div class='ctx'> </div><div class='ctx'> 			port@0 { /* RMII fixed link to master */</div><div class='ctx'> 				reg = &lt;0&gt;;</div><div class='del'>-				label = "cpu";</div><div class='ctx'> 				ethernet = &lt;&amp;master&gt;;</div><div class='ctx'> 			};</div><div class='ctx'> </div><div class='hunk'>@@ -83,7 +82,6 @@ MDIO managed mode:</div><div class='ctx'> </div><div class='ctx'> 					port@0 {</div><div class='ctx'> 						reg = &lt;0&gt;;</div><div class='del'>-						label = "cpu";</div><div class='ctx'> 						ethernet = &lt;&amp;master&gt;;</div><div class='ctx'> 					};</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt b/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt<br/>index e3829d3e480e..8bb1eff21cb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/lantiq-gswip.txt</a></div><div class='hunk'>@@ -96,7 +96,6 @@ switch@e108000 {</div><div class='ctx'> </div><div class='ctx'> 		port@6 {</div><div class='ctx'> 			reg = &lt;0x6&gt;;</div><div class='del'>-			label = "cpu";</div><div class='ctx'> 			ethernet = &lt;&amp;eth0&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml<br/>new file mode 100644<br/>index 000000000000..e532c6b795f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml</a></div><div class='hunk'>@@ -0,0 +1,812 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/dsa/mediatek,mt7530.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek MT7530 and MT7531 Ethernet Switches</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Landen Chao &lt;Landen.Chao@mediatek.com&gt;</div><div class='add'>+  - DENG Qingfang &lt;dqfext@gmail.com&gt;</div><div class='add'>+  - Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='add'>+  - Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  There are three versions of MT7530, standalone, in a multi-chip module and</div><div class='add'>+  built-into a SoC.</div><div class='add'>+</div><div class='add'>+  MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN,</div><div class='add'>+  MT7620NN, MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs.</div><div class='add'>+</div><div class='add'>+  The MT7988 SoC comes with a built-in switch similar to MT7531 as well as four</div><div class='add'>+  Gigabit Ethernet PHYs. The switch registers are directly mapped into the SoC's</div><div class='add'>+  memory map rather than using MDIO. The switch got an internally connected 10G</div><div class='add'>+  CPU port and 4 user ports connected to the built-in Gigabit Ethernet PHYs.</div><div class='add'>+</div><div class='add'>+  MT7530 in MT7620AN, MT7620DA, MT7620DAN and MT7620NN SoCs has got 10/100 PHYs</div><div class='add'>+  and the switch registers are directly mapped into SoC's memory map rather than</div><div class='add'>+  using MDIO. The DSA driver currently doesn't support MT7620 variants.</div><div class='add'>+</div><div class='add'>+  There is only the standalone version of MT7531.</div><div class='add'>+</div><div class='add'>+  Port 5 on MT7530 has got various ways of configuration:</div><div class='add'>+</div><div class='add'>+    - Port 5 can be used as a CPU port.</div><div class='add'>+</div><div class='add'>+    - PHY 0 or 4 of the switch can be muxed to gmac5 of the switch. Therefore,</div><div class='add'>+      the gmac of the SoC which is wired to port 5 can connect to the PHY.</div><div class='add'>+      This is usually used for connecting the wan port directly to the CPU to</div><div class='add'>+      achieve 2 Gbps routing in total.</div><div class='add'>+</div><div class='add'>+      The driver looks up the reg on the ethernet-phy node, which the phy-handle</div><div class='add'>+      property on the gmac node refers to, to mux the specified phy.</div><div class='add'>+</div><div class='add'>+      The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the</div><div class='add'>+      compatible string and the reg must be 1. So, for now, only gmac1 of a</div><div class='add'>+      MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this.</div><div class='add'>+</div><div class='add'>+      For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.</div><div class='add'>+</div><div class='add'>+      Check out example 5.</div><div class='add'>+</div><div class='add'>+    - For the multi-chip module MT7530, in case of an external phy wired to</div><div class='add'>+      gmac1 of the SoC, port 5 must not be enabled.</div><div class='add'>+</div><div class='add'>+      In case of muxing PHY 0 or 4, the external phy must not be enabled.</div><div class='add'>+</div><div class='add'>+      For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.</div><div class='add'>+</div><div class='add'>+      Check out example 6.</div><div class='add'>+</div><div class='add'>+    - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave.</div><div class='add'>+</div><div class='add'>+      For the multi-chip module MT7530, the external phy must be wired TX to TX</div><div class='add'>+      to gmac1 of the SoC for this to work. Ubiquiti EdgeRouter X SFP is wired</div><div class='add'>+      this way.</div><div class='add'>+</div><div class='add'>+      For the multi-chip module MT7530, muxing PHY 0 or 4 won't work when the</div><div class='add'>+      external phy is connected TX to TX.</div><div class='add'>+</div><div class='add'>+      For the MT7621 SoCs, rgmii2 group must be claimed with gpio function.</div><div class='add'>+</div><div class='add'>+      Check out example 7.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description:</div><div class='add'>+          Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC</div><div class='add'>+        const: mediatek,mt7530</div><div class='add'>+</div><div class='add'>+      - description:</div><div class='add'>+          Standalone MT7531</div><div class='add'>+        const: mediatek,mt7531</div><div class='add'>+</div><div class='add'>+      - description:</div><div class='add'>+          Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs</div><div class='add'>+        const: mediatek,mt7621</div><div class='add'>+</div><div class='add'>+      - description:</div><div class='add'>+          Built-in switch of the MT7988 SoC</div><div class='add'>+        const: mediatek,mt7988-switch</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  core-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the regulator node necessary for the core power.</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      If defined, LED controller of the MT7530 switch will run on GPIO mode.</div><div class='add'>+</div><div class='add'>+      There are 15 controllable pins.</div><div class='add'>+      port 0 LED 0..2 as GPIO 0..2</div><div class='add'>+      port 1 LED 0..2 as GPIO 3..5</div><div class='add'>+      port 2 LED 0..2 as GPIO 6..8</div><div class='add'>+      port 3 LED 0..2 as GPIO 9..11</div><div class='add'>+      port 4 LED 0..2 as GPIO 12..14</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  io-supply:</div><div class='add'>+    description: |</div><div class='add'>+      Phandle to the regulator node necessary for the I/O power.</div><div class='add'>+      See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for</div><div class='add'>+      details for the regulator setup on these boards.</div><div class='add'>+</div><div class='add'>+  mediatek,mcm:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Used for MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs which the MT7530</div><div class='add'>+      switch is a part of the multi-chip module.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: |</div><div class='add'>+      GPIO to reset the switch. Use this if mediatek,mcm is not used.</div><div class='add'>+      This property is optional because some boards share the reset line with</div><div class='add'>+      other components which makes it impossible to probe the switch if the</div><div class='add'>+      reset line is used.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: mcm</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    description:</div><div class='add'>+      Phandle pointing to the system reset controller with line index for the</div><div class='add'>+      ethsys.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^(ethernet-)?ports$":</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+        type: object</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            description:</div><div class='add'>+              Port address described must be 5 or 6 for CPU port and from 0 to 5</div><div class='add'>+              for user ports.</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              required: [ ethernet ]</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                reg:</div><div class='add'>+                  enum:</div><div class='add'>+                    - 5</div><div class='add'>+                    - 6</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  mt7530-dsa-port:</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ethernet-)?ports$":</div><div class='add'>+        patternProperties:</div><div class='add'>+          "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+            if:</div><div class='add'>+              required: [ ethernet ]</div><div class='add'>+            then:</div><div class='add'>+              if:</div><div class='add'>+                properties:</div><div class='add'>+                  reg:</div><div class='add'>+                    const: 5</div><div class='add'>+              then:</div><div class='add'>+                properties:</div><div class='add'>+                  phy-mode:</div><div class='add'>+                    enum:</div><div class='add'>+                      - gmii</div><div class='add'>+                      - mii</div><div class='add'>+                      - rgmii</div><div class='add'>+              else:</div><div class='add'>+                properties:</div><div class='add'>+                  phy-mode:</div><div class='add'>+                    enum:</div><div class='add'>+                      - rgmii</div><div class='add'>+                      - trgmii</div><div class='add'>+</div><div class='add'>+  mt7531-dsa-port:</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ethernet-)?ports$":</div><div class='add'>+        patternProperties:</div><div class='add'>+          "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+            if:</div><div class='add'>+              required: [ ethernet ]</div><div class='add'>+            then:</div><div class='add'>+              if:</div><div class='add'>+                properties:</div><div class='add'>+                  reg:</div><div class='add'>+                    const: 5</div><div class='add'>+              then:</div><div class='add'>+                properties:</div><div class='add'>+                  phy-mode:</div><div class='add'>+                    enum:</div><div class='add'>+                      - 1000base-x</div><div class='add'>+                      - 2500base-x</div><div class='add'>+                      - rgmii</div><div class='add'>+                      - sgmii</div><div class='add'>+              else:</div><div class='add'>+                properties:</div><div class='add'>+                  phy-mode:</div><div class='add'>+                    enum:</div><div class='add'>+                      - 1000base-x</div><div class='add'>+                      - 2500base-x</div><div class='add'>+                      - sgmii</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - mediatek,mcm</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reset-gpios: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+        - reset-names</div><div class='add'>+</div><div class='add'>+  - dependencies:</div><div class='add'>+      interrupt-controller: [ interrupts ]</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: mediatek,mt7530</div><div class='add'>+    then:</div><div class='add'>+      $ref: "#/$defs/mt7530-dsa-port"</div><div class='add'>+      required:</div><div class='add'>+        - core-supply</div><div class='add'>+        - io-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: mediatek,mt7531</div><div class='add'>+    then:</div><div class='add'>+      $ref: "#/$defs/mt7531-dsa-port"</div><div class='add'>+      properties:</div><div class='add'>+        gpio-controller: false</div><div class='add'>+        mediatek,mcm: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: mediatek,mt7621</div><div class='add'>+    then:</div><div class='add'>+      $ref: "#/$defs/mt7530-dsa-port"</div><div class='add'>+      required:</div><div class='add'>+        - mediatek,mcm</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: mediatek,mt7988-switch</div><div class='add'>+    then:</div><div class='add'>+      $ref: "#/$defs/mt7530-dsa-port"</div><div class='add'>+      properties:</div><div class='add'>+        gpio-controller: false</div><div class='add'>+        mediatek,mcm: false</div><div class='add'>+        reset-names: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Example 1: Standalone MT7530</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        switch@1f {</div><div class='add'>+            compatible = "mediatek,mt7530";</div><div class='add'>+            reg = &lt;0x1f&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;pio 33 0&gt;;</div><div class='add'>+</div><div class='add'>+            core-supply = &lt;&amp;mt6323_vpa_reg&gt;;</div><div class='add'>+            io-supply = &lt;&amp;mt6323_vemc3v3_reg&gt;;</div><div class='add'>+</div><div class='add'>+            ethernet-ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    label = "lan1";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    label = "lan2";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    label = "lan3";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    label = "lan4";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    label = "wan";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@6 {</div><div class='add'>+                    reg = &lt;6&gt;;</div><div class='add'>+                    ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                    phy-mode = "rgmii";</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;1000&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example 2: MT7530 in MT7623AI SoC</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/reset/mt2701-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        switch@1f {</div><div class='add'>+            compatible = "mediatek,mt7530";</div><div class='add'>+            reg = &lt;0x1f&gt;;</div><div class='add'>+</div><div class='add'>+            mediatek,mcm;</div><div class='add'>+            resets = &lt;&amp;ethsys MT2701_ETHSYS_MCM_RST&gt;;</div><div class='add'>+            reset-names = "mcm";</div><div class='add'>+</div><div class='add'>+            core-supply = &lt;&amp;mt6323_vpa_reg&gt;;</div><div class='add'>+            io-supply = &lt;&amp;mt6323_vemc3v3_reg&gt;;</div><div class='add'>+</div><div class='add'>+            ethernet-ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    label = "lan1";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    label = "lan2";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    label = "lan3";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    label = "lan4";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    label = "wan";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@6 {</div><div class='add'>+                    reg = &lt;6&gt;;</div><div class='add'>+                    ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                    phy-mode = "trgmii";</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;1000&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example 3: Standalone MT7531</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        switch@0 {</div><div class='add'>+            compatible = "mediatek,mt7531";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;pio 54 0&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;pio&gt;;</div><div class='add'>+            interrupts = &lt;53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            ethernet-ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    label = "lan1";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    label = "lan2";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    label = "lan3";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    label = "lan4";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    label = "wan";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@6 {</div><div class='add'>+                    reg = &lt;6&gt;;</div><div class='add'>+                    ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                    phy-mode = "2500base-x";</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;2500&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example 4: MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt7621-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        switch@1f {</div><div class='add'>+            compatible = "mediatek,mt7621";</div><div class='add'>+            reg = &lt;0x1f&gt;;</div><div class='add'>+</div><div class='add'>+            mediatek,mcm;</div><div class='add'>+            resets = &lt;&amp;sysc MT7621_RST_MCM&gt;;</div><div class='add'>+            reset-names = "mcm";</div><div class='add'>+</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            ethernet-ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    label = "lan1";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    label = "lan2";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    label = "lan3";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    label = "lan4";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    label = "wan";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@6 {</div><div class='add'>+                    reg = &lt;6&gt;;</div><div class='add'>+                    ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                    phy-mode = "trgmii";</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;1000&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example 5: MT7621: mux MT7530's phy4 to SoC's gmac1</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt7621-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;rgmii2_pins&gt;;</div><div class='add'>+</div><div class='add'>+        mac@1 {</div><div class='add'>+            compatible = "mediatek,eth-mac";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            phy-mode = "rgmii";</div><div class='add'>+            phy-handle = &lt;&amp;example5_ethphy4&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            /* MT7530's phy4 */</div><div class='add'>+            example5_ethphy4: ethernet-phy@4 {</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            switch@1f {</div><div class='add'>+                compatible = "mediatek,mt7621";</div><div class='add'>+                reg = &lt;0x1f&gt;;</div><div class='add'>+</div><div class='add'>+                mediatek,mcm;</div><div class='add'>+                resets = &lt;&amp;sysc MT7621_RST_MCM&gt;;</div><div class='add'>+                reset-names = "mcm";</div><div class='add'>+</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #interrupt-cells = &lt;1&gt;;</div><div class='add'>+                interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+                ethernet-ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        label = "lan1";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        label = "lan2";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@2 {</div><div class='add'>+                        reg = &lt;2&gt;;</div><div class='add'>+                        label = "lan3";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@3 {</div><div class='add'>+                        reg = &lt;3&gt;;</div><div class='add'>+                        label = "lan4";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    /* Commented out, phy4 is connected to gmac1.</div><div class='add'>+                    port@4 {</div><div class='add'>+                        reg = &lt;4&gt;;</div><div class='add'>+                        label = "wan";</div><div class='add'>+                    };</div><div class='add'>+                    */</div><div class='add'>+</div><div class='add'>+                    port@6 {</div><div class='add'>+                        reg = &lt;6&gt;;</div><div class='add'>+                        ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                        phy-mode = "trgmii";</div><div class='add'>+</div><div class='add'>+                        fixed-link {</div><div class='add'>+                            speed = &lt;1000&gt;;</div><div class='add'>+                            full-duplex;</div><div class='add'>+                            pause;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example 6: MT7621: mux external phy to SoC's gmac1</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt7621-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;rgmii2_pins&gt;;</div><div class='add'>+</div><div class='add'>+        mac@1 {</div><div class='add'>+            compatible = "mediatek,eth-mac";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            phy-mode = "rgmii";</div><div class='add'>+            phy-handle = &lt;&amp;example6_ethphy7&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            /* External PHY */</div><div class='add'>+            example6_ethphy7: ethernet-phy@7 {</div><div class='add'>+                reg = &lt;7&gt;;</div><div class='add'>+                phy-mode = "rgmii";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            switch@1f {</div><div class='add'>+                compatible = "mediatek,mt7621";</div><div class='add'>+                reg = &lt;0x1f&gt;;</div><div class='add'>+</div><div class='add'>+                mediatek,mcm;</div><div class='add'>+                resets = &lt;&amp;sysc MT7621_RST_MCM&gt;;</div><div class='add'>+                reset-names = "mcm";</div><div class='add'>+</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #interrupt-cells = &lt;1&gt;;</div><div class='add'>+                interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+                ethernet-ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        label = "lan1";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        label = "lan2";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@2 {</div><div class='add'>+                        reg = &lt;2&gt;;</div><div class='add'>+                        label = "lan3";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@3 {</div><div class='add'>+                        reg = &lt;3&gt;;</div><div class='add'>+                        label = "lan4";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@4 {</div><div class='add'>+                        reg = &lt;4&gt;;</div><div class='add'>+                        label = "wan";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@6 {</div><div class='add'>+                        reg = &lt;6&gt;;</div><div class='add'>+                        ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                        phy-mode = "trgmii";</div><div class='add'>+</div><div class='add'>+                        fixed-link {</div><div class='add'>+                            speed = &lt;1000&gt;;</div><div class='add'>+                            full-duplex;</div><div class='add'>+                            pause;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example 7: MT7621: mux external phy to MT7530's port 5</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt7621-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;rgmii2_pins&gt;;</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            /* External PHY */</div><div class='add'>+            example7_ethphy7: ethernet-phy@7 {</div><div class='add'>+                reg = &lt;7&gt;;</div><div class='add'>+                phy-mode = "rgmii";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            switch@1f {</div><div class='add'>+                compatible = "mediatek,mt7621";</div><div class='add'>+                reg = &lt;0x1f&gt;;</div><div class='add'>+</div><div class='add'>+                mediatek,mcm;</div><div class='add'>+                resets = &lt;&amp;sysc MT7621_RST_MCM&gt;;</div><div class='add'>+                reset-names = "mcm";</div><div class='add'>+</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #interrupt-cells = &lt;1&gt;;</div><div class='add'>+                interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+                ethernet-ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        label = "lan1";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@1 {</div><div class='add'>+                        reg = &lt;1&gt;;</div><div class='add'>+                        label = "lan2";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@2 {</div><div class='add'>+                        reg = &lt;2&gt;;</div><div class='add'>+                        label = "lan3";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@3 {</div><div class='add'>+                        reg = &lt;3&gt;;</div><div class='add'>+                        label = "lan4";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@4 {</div><div class='add'>+                        reg = &lt;4&gt;;</div><div class='add'>+                        label = "wan";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@5 {</div><div class='add'>+                        reg = &lt;5&gt;;</div><div class='add'>+                        label = "extphy";</div><div class='add'>+                        phy-mode = "rgmii-txid";</div><div class='add'>+                        phy-handle = &lt;&amp;example7_ethphy7&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    port@6 {</div><div class='add'>+                        reg = &lt;6&gt;;</div><div class='add'>+                        ethernet = &lt;&amp;gmac0&gt;;</div><div class='add'>+                        phy-mode = "trgmii";</div><div class='add'>+</div><div class='add'>+                        fixed-link {</div><div class='add'>+                            speed = &lt;1000&gt;;</div><div class='add'>+                            full-duplex;</div><div class='add'>+                            pause;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml<br/>index 184152087b60..e51be1ac0362 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml</a></div><div class='hunk'>@@ -11,7 +11,8 @@ maintainers:</div><div class='ctx'>   - Woojung Huh &lt;Woojung.Huh@microchip.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: dsa.yaml#</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   # See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional</div><div class='hunk'>@@ -66,7 +67,7 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -106,8 +107,9 @@ examples:</div><div class='ctx'>                 };</div><div class='ctx'>                 port@5 {</div><div class='ctx'>                     reg = &lt;5&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     ethernet = &lt;&amp;eth0&gt;;</div><div class='add'>+                    phy-mode = "rgmii";</div><div class='add'>+</div><div class='ctx'>                     fixed-link {</div><div class='ctx'>                         speed = &lt;1000&gt;;</div><div class='ctx'>                         full-duplex;</div><div class='hunk'>@@ -143,8 +145,9 @@ examples:</div><div class='ctx'>                 };</div><div class='ctx'>                 port@6 {</div><div class='ctx'>                     reg = &lt;6&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     ethernet = &lt;&amp;eth0&gt;;</div><div class='add'>+                    phy-mode = "rgmii";</div><div class='add'>+</div><div class='ctx'>                     fixed-link {</div><div class='ctx'>                         speed = &lt;1000&gt;;</div><div class='ctx'>                         full-duplex;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml b/Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml<br/>new file mode 100644<br/>index 000000000000..8d7e878b84dc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/microchip,lan937x.yaml</a></div><div class='hunk'>@@ -0,0 +1,192 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/dsa/microchip,lan937x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: LAN937x Ethernet Switch Series</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - UNGLinuxDriver@microchip.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - microchip,lan9370</div><div class='add'>+      - microchip,lan9371</div><div class='add'>+      - microchip,lan9372</div><div class='add'>+      - microchip,lan9373</div><div class='add'>+      - microchip,lan9374</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 50000000</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Optional gpio specifier for a reset line</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: /schemas/net/mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^(ethernet-)?ports$":</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                phy-mode:</div><div class='add'>+                  contains:</div><div class='add'>+                    enum:</div><div class='add'>+                      - rgmii</div><div class='add'>+                      - rgmii-id</div><div class='add'>+                      - rgmii-txid</div><div class='add'>+                      - rgmii-rxid</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                rx-internal-delay-ps:</div><div class='add'>+                  enum: [0, 2000]</div><div class='add'>+                  default: 0</div><div class='add'>+                tx-internal-delay-ps:</div><div class='add'>+                  enum: [0, 2000]</div><div class='add'>+                  default: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    macb0 {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            fixed-link {</div><div class='add'>+                    speed = &lt;1000&gt;;</div><div class='add'>+                    full-duplex;</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    spi {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            lan9374: switch@0 {</div><div class='add'>+                    compatible = "microchip,lan9374";</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    spi-max-frequency = &lt;44000000&gt;;</div><div class='add'>+</div><div class='add'>+                    ethernet-ports {</div><div class='add'>+                            #address-cells = &lt;1&gt;;</div><div class='add'>+                            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                            port@0 {</div><div class='add'>+                                    reg = &lt;0&gt;;</div><div class='add'>+                                    label = "lan1";</div><div class='add'>+                                    phy-mode = "internal";</div><div class='add'>+                                    phy-handle = &lt;&amp;t1phy0&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            port@1 {</div><div class='add'>+                                    reg = &lt;1&gt;;</div><div class='add'>+                                    label = "lan2";</div><div class='add'>+                                    phy-mode = "internal";</div><div class='add'>+                                    phy-handle = &lt;&amp;t1phy1&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            port@2 {</div><div class='add'>+                                    reg = &lt;2&gt;;</div><div class='add'>+                                    label = "lan4";</div><div class='add'>+                                    phy-mode = "internal";</div><div class='add'>+                                    phy-handle = &lt;&amp;t1phy2&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            port@3 {</div><div class='add'>+                                    reg = &lt;3&gt;;</div><div class='add'>+                                    label = "lan6";</div><div class='add'>+                                    phy-mode = "internal";</div><div class='add'>+                                    phy-handle = &lt;&amp;t1phy3&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            port@4 {</div><div class='add'>+                                    reg = &lt;4&gt;;</div><div class='add'>+                                    phy-mode = "rgmii";</div><div class='add'>+                                    tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+                                    rx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+                                    ethernet = &lt;&amp;macb0&gt;;</div><div class='add'>+</div><div class='add'>+                                    fixed-link {</div><div class='add'>+                                            speed = &lt;1000&gt;;</div><div class='add'>+                                            full-duplex;</div><div class='add'>+                                    };</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            port@5 {</div><div class='add'>+                                    reg = &lt;5&gt;;</div><div class='add'>+                                    label = "lan7";</div><div class='add'>+                                    phy-mode = "rgmii";</div><div class='add'>+                                    tx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+                                    rx-internal-delay-ps = &lt;2000&gt;;</div><div class='add'>+</div><div class='add'>+                                    fixed-link {</div><div class='add'>+                                            speed = &lt;1000&gt;;</div><div class='add'>+                                            full-duplex;</div><div class='add'>+                                    };</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            port@6 {</div><div class='add'>+                                    reg = &lt;6&gt;;</div><div class='add'>+                                    label = "lan5";</div><div class='add'>+                                    phy-mode = "internal";</div><div class='add'>+                                    phy-handle = &lt;&amp;t1phy6&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            port@7 {</div><div class='add'>+                                    reg = &lt;7&gt;;</div><div class='add'>+                                    label = "lan3";</div><div class='add'>+                                    phy-mode = "internal";</div><div class='add'>+                                    phy-handle = &lt;&amp;t1phy7&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    mdio {</div><div class='add'>+                            #address-cells = &lt;1&gt;;</div><div class='add'>+                            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                            t1phy0: ethernet-phy@0{</div><div class='add'>+                                    reg = &lt;0x0&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            t1phy1: ethernet-phy@1{</div><div class='add'>+                                    reg = &lt;0x1&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            t1phy2: ethernet-phy@2{</div><div class='add'>+                                    reg = &lt;0x2&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            t1phy3: ethernet-phy@3{</div><div class='add'>+                                    reg = &lt;0x3&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            t1phy6: ethernet-phy@6{</div><div class='add'>+                                    reg = &lt;0x6&gt;;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            t1phy7: ethernet-phy@7{</div><div class='add'>+                                    reg = &lt;0x7&gt;;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml b/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml<br/>new file mode 100644<br/>index 000000000000..fe02d05196e4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml</a></div><div class='hunk'>@@ -0,0 +1,260 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR MIT)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/dsa/mscc,ocelot.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip Ocelot Switch Family</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;</div><div class='add'>+  - Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+  - UNGLinuxDriver@microchip.com</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  There are multiple switches which are either part of the Ocelot-1 family, or</div><div class='add'>+  derivatives of this architecture. These switches can be found embedded in</div><div class='add'>+  various SoCs and accessed using MMIO, or as discrete chips and accessed over</div><div class='add'>+  SPI or PCIe. The present DSA binding shall be used when the host controlling</div><div class='add'>+  them performs packet I/O primarily through an Ethernet port of the switch</div><div class='add'>+  (which is attached to an Ethernet port of the host), rather than through</div><div class='add'>+  Frame DMA or register-based I/O.</div><div class='add'>+</div><div class='add'>+  VSC9953 (Seville):</div><div class='add'>+</div><div class='add'>+    This is found in the NXP T1040, where it is a memory-mapped platform</div><div class='add'>+    device.</div><div class='add'>+</div><div class='add'>+    The following PHY interface types are supported:</div><div class='add'>+</div><div class='add'>+      - phy-mode = "internal": on ports 8 and 9</div><div class='add'>+      - phy-mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7</div><div class='add'>+      - phy-mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7</div><div class='add'>+      - phy-mode = "1000base-x": on ports 0, 1, 2, 3, 4, 5, 6, 7</div><div class='add'>+</div><div class='add'>+  VSC9959 (Felix):</div><div class='add'>+</div><div class='add'>+    This is found in the NXP LS1028A. It is a PCI device, part of the larger</div><div class='add'>+    enetc root complex. As a result, the ethernet-switch node is a sub-node of</div><div class='add'>+    the PCIe root complex node and its "reg" property conforms to the parent</div><div class='add'>+    node bindings, describing it as PF 5 of device 0, bus 0.</div><div class='add'>+</div><div class='add'>+    If any external switch port is enabled, the enetc PF2 (enetc_port2) should</div><div class='add'>+    be enabled as well. This is because the internal MDIO bus (exposed through</div><div class='add'>+    EA BAR 0) used to access the MAC PCS registers truly belongs to the enetc</div><div class='add'>+    port 2 and not to Felix.</div><div class='add'>+</div><div class='add'>+    The following PHY interface types are supported:</div><div class='add'>+</div><div class='add'>+      - phy-mode = "internal": on ports 4 and 5</div><div class='add'>+      - phy-mode = "sgmii": on ports 0, 1, 2, 3</div><div class='add'>+      - phy-mode = "qsgmii": on ports 0, 1, 2, 3</div><div class='add'>+      - phy-mode = "usxgmii": on ports 0, 1, 2, 3</div><div class='add'>+      - phy-mode = "1000base-x": on ports 0, 1, 2, 3</div><div class='add'>+      - phy-mode = "2500base-x": on ports 0, 1, 2, 3</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mscc,vsc9953-switch</div><div class='add'>+      - pci1957,eef0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+    description:</div><div class='add'>+      Used to signal availability of PTP TX timestamps, and state changes of</div><div class='add'>+      the MAC merge layer of ports that support Frame Preemption.</div><div class='add'>+</div><div class='add'>+  little-endian: true</div><div class='add'>+  big-endian: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: pci1957,eef0</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Felix VSC9959 (NXP LS1028A)</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pcie { /* Integrated Endpoint Root Complex */</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-switch@0,5 {</div><div class='add'>+            compatible = "pci1957,eef0";</div><div class='add'>+            reg = &lt;0x000500 0 0 0 0&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            ethernet-ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy2&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy3&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    ethernet = &lt;&amp;enetc_port2&gt;;</div><div class='add'>+                    phy-mode = "internal";</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;2500&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@5 {</div><div class='add'>+                    reg = &lt;5&gt;;</div><div class='add'>+                    ethernet = &lt;&amp;enetc_port3&gt;;</div><div class='add'>+                    phy-mode = "internal";</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;1000&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  # Seville VSC9953 (NXP T1040)</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-switch@800000 {</div><div class='add'>+            compatible = "mscc,vsc9953-switch";</div><div class='add'>+            reg = &lt;0x800000 0x290000&gt;;</div><div class='add'>+            little-endian;</div><div class='add'>+</div><div class='add'>+            ethernet-ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy2&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@3 {</div><div class='add'>+                    reg = &lt;3&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy3&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@4 {</div><div class='add'>+                    reg = &lt;4&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy4&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@5 {</div><div class='add'>+                    reg = &lt;5&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy5&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@6 {</div><div class='add'>+                    reg = &lt;6&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy6&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@7 {</div><div class='add'>+                    reg = &lt;7&gt;;</div><div class='add'>+                    phy-mode = "qsgmii";</div><div class='add'>+                    phy-handle = &lt;&amp;phy7&gt;;</div><div class='add'>+                    managed = "in-band-status";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@8 {</div><div class='add'>+                    reg = &lt;8&gt;;</div><div class='add'>+                    phy-mode = "internal";</div><div class='add'>+                    ethernet = &lt;&amp;enet0&gt;;</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;2500&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@9 {</div><div class='add'>+                    reg = &lt;9&gt;;</div><div class='add'>+                    phy-mode = "internal";</div><div class='add'>+                    ethernet = &lt;&amp;enet1&gt;;</div><div class='add'>+</div><div class='add'>+                    fixed-link {</div><div class='add'>+                        speed = &lt;2500&gt;;</div><div class='add'>+                        full-duplex;</div><div class='add'>+                        pause;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/mt7530.txt b/Documentation/devicetree/bindings/net/dsa/mt7530.txt<br/>deleted file mode 100644<br/>index 18247ebfc487..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/mt7530.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/mt7530.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,327 +0,0 @@</div><div class='del'>-Mediatek MT7530 Ethernet switch</div><div class='del'>-================================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: may be compatible = "mediatek,mt7530"</div><div class='del'>-	or compatible = "mediatek,mt7621"</div><div class='del'>-	or compatible = "mediatek,mt7531"</div><div class='del'>-- #address-cells: Must be 1.</div><div class='del'>-- #size-cells: Must be 0.</div><div class='del'>-- mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part</div><div class='del'>-	on multi-chip module belong to MT7623A has or the remotely standalone</div><div class='del'>-	chip as the function MT7623N reference board provided for.</div><div class='del'>-</div><div class='del'>-If compatible mediatek,mt7530 is set then the following properties are required</div><div class='del'>-</div><div class='del'>-- core-supply: Phandle to the regulator node necessary for the core power.</div><div class='del'>-- io-supply: Phandle to the regulator node necessary for the I/O power.</div><div class='del'>-	See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt</div><div class='del'>-	for details for the regulator setup on these boards.</div><div class='del'>-</div><div class='del'>-If the property mediatek,mcm isn't defined, following property is required</div><div class='del'>-</div><div class='del'>-- reset-gpios: Should be a gpio specifier for a reset line.</div><div class='del'>-</div><div class='del'>-Else, following properties are required</div><div class='del'>-</div><div class='del'>-- resets : Phandle pointing to the system reset controller with</div><div class='del'>-	line index for the ethsys.</div><div class='del'>-- reset-names : Should be set to "mcm".</div><div class='del'>-</div><div class='del'>-Required properties for the child nodes within ports container:</div><div class='del'>-</div><div class='del'>-- reg: Port address described must be 6 for CPU port and from 0 to 5 for</div><div class='del'>-	user ports.</div><div class='del'>-- phy-mode: String, the following values are acceptable for port labeled</div><div class='del'>-	"cpu":</div><div class='del'>-	If compatible mediatek,mt7530 or mediatek,mt7621 is set,</div><div class='del'>-	must be either "trgmii" or "rgmii"</div><div class='del'>-	If compatible mediatek,mt7531 is set,</div><div class='del'>-	must be either "sgmii", "1000base-x" or "2500base-x"</div><div class='del'>-</div><div class='del'>-Port 5 of mt7530 and mt7621 switch is muxed between:</div><div class='del'>-1. GMAC5: GMAC5 can interface with another external MAC or PHY.</div><div class='del'>-2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC</div><div class='del'>-   of the SOC. Used in many setups where port 0/4 becomes the WAN port.</div><div class='del'>-   Note: On a MT7621 SOC with integrated switch: 2nd GMAC can only connected to</div><div class='del'>-	 GMAC5 when the gpios for RGMII2 (GPIO 22-33) are not used and not</div><div class='del'>-	 connected to external component!</div><div class='del'>-</div><div class='del'>-Port 5 modes/configurations:</div><div class='del'>-1. Port 5 is disabled and isolated: An external phy can interface to the 2nd</div><div class='del'>-   GMAC of the SOC.</div><div class='del'>-   In the case of a build-in MT7530 switch, port 5 shares the RGMII bus with 2nd</div><div class='del'>-   GMAC and an optional external phy. Mind the GPIO/pinctl settings of the SOC!</div><div class='del'>-2. Port 5 is muxed to PHY of port 0/4: Port 0/4 interfaces with 2nd GMAC.</div><div class='del'>-   It is a simple MAC to PHY interface, port 5 needs to be setup for xMII mode</div><div class='del'>-   and RGMII delay.</div><div class='del'>-3. Port 5 is muxed to GMAC5 and can interface to an external phy.</div><div class='del'>-   Port 5 becomes an extra switch port.</div><div class='del'>-   Only works on platform where external phy TX&lt;-&gt;RX lines are swapped.</div><div class='del'>-   Like in the Ubiquiti ER-X-SFP.</div><div class='del'>-4. Port 5 is muxed to GMAC5 and interfaces with the 2nd GAMC as 2nd CPU port.</div><div class='del'>-   Currently a 2nd CPU port is not supported by DSA code.</div><div class='del'>-</div><div class='del'>-Depending on how the external PHY is wired:</div><div class='del'>-1. normal: The PHY can only connect to 2nd GMAC but not to the switch</div><div class='del'>-2. swapped: RGMII TX, RX are swapped; external phy interface with the switch as</div><div class='del'>-   a ethernet port. But can't interface to the 2nd GMAC.</div><div class='del'>-</div><div class='del'>-Based on the DT the port 5 mode is configured.</div><div class='del'>-</div><div class='del'>-Driver tries to lookup the phy-handle of the 2nd GMAC of the master device.</div><div class='del'>-When phy-handle matches PHY of port 0 or 4 then port 5 set-up as mode 2.</div><div class='del'>-phy-mode must be set, see also example 2 below!</div><div class='del'>- * mt7621: phy-mode = "rgmii-txid";</div><div class='del'>- * mt7623: phy-mode = "rgmii";</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- gpio-controller: Boolean; if defined, MT7530's LED controller will run on</div><div class='del'>-	GPIO mode.</div><div class='del'>-- #gpio-cells: Must be 2 if gpio-controller is defined.</div><div class='del'>-- interrupt-controller: Boolean; Enables the internal interrupt controller.</div><div class='del'>-</div><div class='del'>-If interrupt-controller is defined, the following properties are required.</div><div class='del'>-</div><div class='del'>-- #interrupt-cells: Must be 1.</div><div class='del'>-- interrupts: Parent interrupt for the interrupt controller.</div><div class='del'>-</div><div class='del'>-See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional</div><div class='del'>-required, optional properties and how the integrated switch subnodes must</div><div class='del'>-be specified.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	&amp;mdio0 {</div><div class='del'>-		switch@0 {</div><div class='del'>-			compatible = "mediatek,mt7530";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			core-supply = &lt;&amp;mt6323_vpa_reg&gt;;</div><div class='del'>-			io-supply = &lt;&amp;mt6323_vemc3v3_reg&gt;;</div><div class='del'>-			reset-gpios = &lt;&amp;pio 33 0&gt;;</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-				reg = &lt;0&gt;;</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					label = "lan0";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					label = "lan1";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					label = "lan2";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					label = "lan3";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@4 {</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-					label = "wan";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@6 {</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-					label = "cpu";</div><div class='del'>-					ethernet = &lt;&amp;gmac0&gt;;</div><div class='del'>-					phy-mode = "trgmii";</div><div class='del'>-					fixed-link {</div><div class='del'>-						speed = &lt;1000&gt;;</div><div class='del'>-						full-duplex;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 2: MT7621: Port 4 is WAN port: 2nd GMAC -&gt; Port 5 -&gt; PHY port 4.</div><div class='del'>-</div><div class='del'>-&amp;eth {</div><div class='del'>-	gmac0: mac@0 {</div><div class='del'>-		compatible = "mediatek,eth-mac";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		phy-mode = "rgmii";</div><div class='del'>-</div><div class='del'>-		fixed-link {</div><div class='del'>-			speed = &lt;1000&gt;;</div><div class='del'>-			full-duplex;</div><div class='del'>-			pause;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gmac1: mac@1 {</div><div class='del'>-		compatible = "mediatek,eth-mac";</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		phy-mode = "rgmii-txid";</div><div class='del'>-		phy-handle = &lt;&amp;phy4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mdio: mdio-bus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		/* Internal phy */</div><div class='del'>-		phy4: ethernet-phy@4 {</div><div class='del'>-			reg = &lt;4&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mt7530: switch@1f {</div><div class='del'>-			compatible = "mediatek,mt7621";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x1f&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			mediatek,mcm;</div><div class='del'>-</div><div class='del'>-			resets = &lt;&amp;rstctrl 2&gt;;</div><div class='del'>-			reset-names = "mcm";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					label = "lan0";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					label = "lan1";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					label = "lan2";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					label = "lan3";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-/* Commented out. Port 4 is handled by 2nd GMAC.</div><div class='del'>-				port@4 {</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-					label = "lan4";</div><div class='del'>-				};</div><div class='del'>-*/</div><div class='del'>-</div><div class='del'>-				cpu_port0: port@6 {</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-					label = "cpu";</div><div class='del'>-					ethernet = &lt;&amp;gmac0&gt;;</div><div class='del'>-					phy-mode = "rgmii";</div><div class='del'>-</div><div class='del'>-					fixed-link {</div><div class='del'>-						speed = &lt;1000&gt;;</div><div class='del'>-						full-duplex;</div><div class='del'>-						pause;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -&gt; external PHY.</div><div class='del'>-</div><div class='del'>-&amp;eth {</div><div class='del'>-	gmac0: mac@0 {</div><div class='del'>-		compatible = "mediatek,eth-mac";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		phy-mode = "rgmii";</div><div class='del'>-</div><div class='del'>-		fixed-link {</div><div class='del'>-			speed = &lt;1000&gt;;</div><div class='del'>-			full-duplex;</div><div class='del'>-			pause;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mdio: mdio-bus {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		/* External phy */</div><div class='del'>-		ephy5: ethernet-phy@7 {</div><div class='del'>-			reg = &lt;7&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mt7530: switch@1f {</div><div class='del'>-			compatible = "mediatek,mt7621";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			reg = &lt;0x1f&gt;;</div><div class='del'>-			pinctrl-names = "default";</div><div class='del'>-			mediatek,mcm;</div><div class='del'>-</div><div class='del'>-			resets = &lt;&amp;rstctrl 2&gt;;</div><div class='del'>-			reset-names = "mcm";</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					label = "lan0";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					label = "lan1";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					label = "lan2";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					label = "lan3";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@4 {</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-					label = "lan4";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@5 {</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-					label = "lan5";</div><div class='del'>-					phy-mode = "rgmii";</div><div class='del'>-					phy-handle = &lt;&amp;ephy5&gt;;</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				cpu_port0: port@6 {</div><div class='del'>-					reg = &lt;6&gt;;</div><div class='del'>-					label = "cpu";</div><div class='del'>-					ethernet = &lt;&amp;gmac0&gt;;</div><div class='del'>-					phy-mode = "rgmii";</div><div class='del'>-</div><div class='del'>-					fixed-link {</div><div class='del'>-						speed = &lt;1000&gt;;</div><div class='del'>-						full-duplex;</div><div class='del'>-						pause;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml b/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml<br/>index 1ea0bd490473..9a64ed658745 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/dsa/nxp,sja1105.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP SJA1105 Automotive Ethernet Switch Family Device Tree Bindings</div><div class='add'>+title: NXP SJA1105 Automotive Ethernet Switch Family</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The SJA1105 SPI interface requires a CS-to-CLK time (t2 in UM10944.pdf) of at</div><div class='hunk'>@@ -13,7 +13,8 @@ description:</div><div class='ctx'>   depends on the SPI bus master driver.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "dsa.yaml#"</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/ocelot.txt b/Documentation/devicetree/bindings/net/dsa/ocelot.txt<br/>deleted file mode 100644<br/>index 7a271d070b72..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/ocelot.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/ocelot.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,213 +0,0 @@</div><div class='del'>-Microchip Ocelot switch driver family</div><div class='del'>-=====================================</div><div class='del'>-</div><div class='del'>-Felix</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-Currently the switches supported by the felix driver are:</div><div class='del'>-</div><div class='del'>-- VSC9959 (Felix)</div><div class='del'>-- VSC9953 (Seville)</div><div class='del'>-</div><div class='del'>-The VSC9959 switch is found in the NXP LS1028A. It is a PCI device, part of the</div><div class='del'>-larger ENETC root complex. As a result, the ethernet-switch node is a sub-node</div><div class='del'>-of the PCIe root complex node and its "reg" property conforms to the parent</div><div class='del'>-node bindings:</div><div class='del'>-</div><div class='del'>-* reg: Specifies PCIe Device Number and Function Number of the endpoint device,</div><div class='del'>-  in this case for the Ethernet L2Switch it is PF5 (of device 0, bus 0).</div><div class='del'>-</div><div class='del'>-It does not require a "compatible" string.</div><div class='del'>-</div><div class='del'>-The interrupt line is used to signal availability of PTP TX timestamps and for</div><div class='del'>-TSN frame preemption.</div><div class='del'>-</div><div class='del'>-For the external switch ports, depending on board configuration, "phy-mode" and</div><div class='del'>-"phy-handle" are populated by board specific device tree instances. Ports 4 and</div><div class='del'>-5 are fixed as internal ports in the NXP LS1028A instantiation.</div><div class='del'>-</div><div class='del'>-The CPU port property ("ethernet") configures the feature called "NPI port" in</div><div class='del'>-the Ocelot hardware core. The CPU port in Ocelot is a set of queues, which are</div><div class='del'>-connected, in the Node Processor Interface (NPI) mode, to an Ethernet port.</div><div class='del'>-By default, in fsl-ls1028a.dtsi, the NPI port is assigned to the internal</div><div class='del'>-2.5Gbps port@4, but can be moved to the 1Gbps port@5, depending on the specific</div><div class='del'>-use case.  Moving the NPI port to an external switch port is hardware possible,</div><div class='del'>-but there is no platform support for the Linux system on the LS1028A chip to</div><div class='del'>-operate as an entire slave DSA chip.  NPI functionality (and therefore DSA</div><div class='del'>-tagging) is supported on a single port at a time.</div><div class='del'>-</div><div class='del'>-Any port can be disabled (and in fsl-ls1028a.dtsi, they are indeed all disabled</div><div class='del'>-by default, and should be enabled on a per-board basis). But if any external</div><div class='del'>-switch port is enabled at all, the ENETC PF2 (enetc_port2) should be enabled as</div><div class='del'>-well, regardless of whether it is configured as the DSA master or not. This is</div><div class='del'>-because the Felix PHYLINK implementation accesses the MAC PCS registers, which</div><div class='del'>-in hardware truly belong to the ENETC port #2 and not to Felix.</div><div class='del'>-</div><div class='del'>-Supported PHY interface types (appropriate SerDes protocol setting changes are</div><div class='del'>-needed in the RCW binary):</div><div class='del'>-</div><div class='del'>-* phy_mode = "internal": on ports 4 and 5</div><div class='del'>-* phy_mode = "sgmii": on ports 0, 1, 2, 3</div><div class='del'>-* phy_mode = "qsgmii": on ports 0, 1, 2, 3</div><div class='del'>-* phy_mode = "usxgmii": on ports 0, 1, 2, 3</div><div class='del'>-* phy_mode = "2500base-x": on ports 0, 1, 2, 3</div><div class='del'>-</div><div class='del'>-For the rest of the device tree binding definitions, which are standard DSA and</div><div class='del'>-PCI, refer to the following documents:</div><div class='del'>-</div><div class='del'>-Documentation/devicetree/bindings/net/dsa/dsa.txt</div><div class='del'>-Documentation/devicetree/bindings/pci/pci.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-&amp;soc {</div><div class='del'>-	pcie@1f0000000 { /* Integrated Endpoint Root Complex */</div><div class='del'>-		ethernet-switch@0,5 {</div><div class='del'>-			reg = &lt;0x000500 0 0 0 0&gt;;</div><div class='del'>-			/* IEP INT_B */</div><div class='del'>-			interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-			ports {</div><div class='del'>-				#address-cells = &lt;1&gt;;</div><div class='del'>-				#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-				/* External ports */</div><div class='del'>-				port@0 {</div><div class='del'>-					reg = &lt;0&gt;;</div><div class='del'>-					label = "swp0";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@1 {</div><div class='del'>-					reg = &lt;1&gt;;</div><div class='del'>-					label = "swp1";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@2 {</div><div class='del'>-					reg = &lt;2&gt;;</div><div class='del'>-					label = "swp2";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				port@3 {</div><div class='del'>-					reg = &lt;3&gt;;</div><div class='del'>-					label = "swp3";</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				/* Tagging CPU port */</div><div class='del'>-				port@4 {</div><div class='del'>-					reg = &lt;4&gt;;</div><div class='del'>-					ethernet = &lt;&amp;enetc_port2&gt;;</div><div class='del'>-					phy-mode = "internal";</div><div class='del'>-</div><div class='del'>-					fixed-link {</div><div class='del'>-						speed = &lt;2500&gt;;</div><div class='del'>-						full-duplex;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-</div><div class='del'>-				/* Non-tagging CPU port */</div><div class='del'>-				port@5 {</div><div class='del'>-					reg = &lt;5&gt;;</div><div class='del'>-					phy-mode = "internal";</div><div class='del'>-					status = "disabled";</div><div class='del'>-</div><div class='del'>-					fixed-link {</div><div class='del'>-						speed = &lt;1000&gt;;</div><div class='del'>-						full-duplex;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-The VSC9953 switch is found inside NXP T1040. It is a platform device with the</div><div class='del'>-following required properties:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Must be "mscc,vsc9953-switch".</div><div class='del'>-</div><div class='del'>-Supported PHY interface types (appropriate SerDes protocol setting changes are</div><div class='del'>-needed in the RCW binary):</div><div class='del'>-</div><div class='del'>-* phy_mode = "internal": on ports 8 and 9</div><div class='del'>-* phy_mode = "sgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7</div><div class='del'>-* phy_mode = "qsgmii": on ports 0, 1, 2, 3, 4, 5, 6, 7</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-&amp;soc {</div><div class='del'>-	ethernet-switch@800000 {</div><div class='del'>-		#address-cells = &lt;0x1&gt;;</div><div class='del'>-		#size-cells = &lt;0x0&gt;;</div><div class='del'>-		compatible = "mscc,vsc9953-switch";</div><div class='del'>-		little-endian;</div><div class='del'>-		reg = &lt;0x800000 0x290000&gt;;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;0x1&gt;;</div><div class='del'>-			#size-cells = &lt;0x0&gt;;</div><div class='del'>-</div><div class='del'>-			port@0 {</div><div class='del'>-				reg = &lt;0x0&gt;;</div><div class='del'>-				label = "swp0";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;0x1&gt;;</div><div class='del'>-				label = "swp1";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@2 {</div><div class='del'>-				reg = &lt;0x2&gt;;</div><div class='del'>-				label = "swp2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@3 {</div><div class='del'>-				reg = &lt;0x3&gt;;</div><div class='del'>-				label = "swp3";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@4 {</div><div class='del'>-				reg = &lt;0x4&gt;;</div><div class='del'>-				label = "swp4";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@5 {</div><div class='del'>-				reg = &lt;0x5&gt;;</div><div class='del'>-				label = "swp5";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@6 {</div><div class='del'>-				reg = &lt;0x6&gt;;</div><div class='del'>-				label = "swp6";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@7 {</div><div class='del'>-				reg = &lt;0x7&gt;;</div><div class='del'>-				label = "swp7";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@8 {</div><div class='del'>-				reg = &lt;0x8&gt;;</div><div class='del'>-				phy-mode = "internal";</div><div class='del'>-				ethernet = &lt;&amp;enet0&gt;;</div><div class='del'>-</div><div class='del'>-				fixed-link {</div><div class='del'>-					speed = &lt;2500&gt;;</div><div class='del'>-					full-duplex;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			port@9 {</div><div class='del'>-				reg = &lt;0x9&gt;;</div><div class='del'>-				phy-mode = "internal";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				fixed-link {</div><div class='del'>-					speed = &lt;2500&gt;;</div><div class='del'>-					full-duplex;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/qca8k.yaml b/Documentation/devicetree/bindings/net/dsa/qca8k.yaml<br/>index f3c88371d76c..df64eebebe18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/qca8k.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/qca8k.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/qca8k.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/qca8k.yaml</a></div><div class='hunk'>@@ -18,6 +18,8 @@ description:</div><div class='ctx'>   PHY it is connected to. In this config, an internal mdio-bus is registered and</div><div class='ctx'>   the MDIO master is used for communication. Mixed external and internal</div><div class='ctx'>   mdio-bus configurations are not supported by the hardware.</div><div class='add'>+  Each phy has at most 3 LEDs connected and can be declared</div><div class='add'>+  using the standard LEDs structure.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -66,15 +68,11 @@ properties:</div><div class='ctx'>                  With the legacy mapping the reg corresponding to the internal</div><div class='ctx'>                  mdio is the switch reg with an offset of -1.</div><div class='ctx'> </div><div class='add'>+$ref: dsa.yaml#</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^(ethernet-)?ports$":</div><div class='ctx'>     type: object</div><div class='del'>-    properties:</div><div class='del'>-      '#address-cells':</div><div class='del'>-        const: 1</div><div class='del'>-      '#size-cells':</div><div class='del'>-        const: 0</div><div class='del'>-</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^(ethernet-)?port@[0-6]$":</div><div class='ctx'>         type: object</div><div class='hunk'>@@ -116,11 +114,12 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: true</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='ctx'> </div><div class='ctx'>     mdio {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='hunk'>@@ -148,8 +147,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         switch@10 {</div><div class='ctx'>             compatible = "qca,qca8337";</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='ctx'>             reset-gpios = &lt;&amp;gpio 42 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>             reg = &lt;0x10&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -159,7 +156,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>                 port@0 {</div><div class='ctx'>                     reg = &lt;0&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     ethernet = &lt;&amp;gmac1&gt;;</div><div class='ctx'>                     phy-mode = "rgmii";</div><div class='ctx'> </div><div class='hunk'>@@ -210,8 +206,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         switch@10 {</div><div class='ctx'>             compatible = "qca,qca8337";</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='ctx'>             reset-gpios = &lt;&amp;gpio 42 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>             reg = &lt;0x10&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -221,7 +215,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>                 port@0 {</div><div class='ctx'>                     reg = &lt;0&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     ethernet = &lt;&amp;gmac1&gt;;</div><div class='ctx'>                     phy-mode = "rgmii";</div><div class='ctx'> </div><div class='hunk'>@@ -236,6 +229,25 @@ examples:</div><div class='ctx'>                     label = "lan1";</div><div class='ctx'>                     phy-mode = "internal";</div><div class='ctx'>                     phy-handle = &lt;&amp;internal_phy_port1&gt;;</div><div class='add'>+</div><div class='add'>+                    leds {</div><div class='add'>+                        #address-cells = &lt;1&gt;;</div><div class='add'>+                        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                        led@0 {</div><div class='add'>+                            reg = &lt;0&gt;;</div><div class='add'>+                            color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                            function = LED_FUNCTION_LAN;</div><div class='add'>+                            default-state = "keep";</div><div class='add'>+                        };</div><div class='add'>+</div><div class='add'>+                        led@1 {</div><div class='add'>+                            reg = &lt;1&gt;;</div><div class='add'>+                            color = &lt;LED_COLOR_ID_AMBER&gt;;</div><div class='add'>+                            function = LED_FUNCTION_LAN;</div><div class='add'>+                            default-state = "keep";</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='ctx'>                 };</div><div class='ctx'> </div><div class='ctx'>                 port@2 {</div><div class='hunk'>@@ -268,7 +280,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>                 port@6 {</div><div class='ctx'>                     reg = &lt;0&gt;;</div><div class='del'>-                    label = "cpu";</div><div class='ctx'>                     ethernet = &lt;&amp;gmac1&gt;;</div><div class='ctx'>                     phy-mode = "sgmii";</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/realtek.yaml b/Documentation/devicetree/bindings/net/dsa/realtek.yaml<br/>index 8756060895a8..cfd69c2604ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/realtek.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/realtek.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/realtek.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/realtek.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Realtek switches for unmanaged switches</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: dsa.yaml#</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='hunk'>@@ -27,32 +27,25 @@ description:</div><div class='ctx'>   The realtek-mdio driver is an MDIO driver and it must be inserted inside</div><div class='ctx'>   an MDIO node.</div><div class='ctx'> </div><div class='add'>+  The compatible string is only used to identify which (silicon) family the</div><div class='add'>+  switch belongs to. Roughly speaking, a family is any set of Realtek switches</div><div class='add'>+  whose chip identification register(s) have a common location and semantics.</div><div class='add'>+  The different models in a given family can be automatically disambiguated by</div><div class='add'>+  parsing the chip identification register(s) according to the given family,</div><div class='add'>+  avoiding the need for a unique compatible string for each model.</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - realtek,rtl8365mb</div><div class='del'>-      - realtek,rtl8366</div><div class='ctx'>       - realtek,rtl8366rb</div><div class='del'>-      - realtek,rtl8366s</div><div class='del'>-      - realtek,rtl8367</div><div class='del'>-      - realtek,rtl8367b</div><div class='del'>-      - realtek,rtl8367rb</div><div class='del'>-      - realtek,rtl8367s</div><div class='del'>-      - realtek,rtl8368s</div><div class='del'>-      - realtek,rtl8369</div><div class='del'>-      - realtek,rtl8370</div><div class='ctx'>     description: |</div><div class='del'>-      realtek,rtl8365mb: 4+1 ports</div><div class='del'>-      realtek,rtl8366: 5+1 ports</div><div class='del'>-      realtek,rtl8366rb: 5+1 ports</div><div class='del'>-      realtek,rtl8366s: 5+1 ports</div><div class='del'>-      realtek,rtl8367:</div><div class='del'>-      realtek,rtl8367b:</div><div class='del'>-      realtek,rtl8367rb: 5+2 ports</div><div class='del'>-      realtek,rtl8367s: 5+2 ports</div><div class='del'>-      realtek,rtl8368s: 8 ports</div><div class='del'>-      realtek,rtl8369: 8+1 ports</div><div class='del'>-      realtek,rtl8370: 8+2 ports</div><div class='add'>+      realtek,rtl8365mb:</div><div class='add'>+        Use with models RTL8363NB, RTL8363NB-VB, RTL8363SC, RTL8363SC-VB,</div><div class='add'>+        RTL8364NB, RTL8364NB-VB, RTL8365MB, RTL8366SC, RTL8367RB-VB, RTL8367S,</div><div class='add'>+        RTL8367SB, RTL8370MB, RTL8310SR</div><div class='add'>+      realtek,rtl8366rb:</div><div class='add'>+        Use with models RTL8366RB, RTL8366S</div><div class='ctx'> </div><div class='ctx'>   mdc-gpios:</div><div class='ctx'>     description: GPIO line for the MDC clock line.</div><div class='hunk'>@@ -115,6 +108,7 @@ if:</div><div class='ctx'>     - reg</div><div class='ctx'> </div><div class='ctx'> then:</div><div class='add'>+  $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   not:</div><div class='ctx'>     required:</div><div class='ctx'>       - mdc-gpios</div><div class='hunk'>@@ -195,7 +189,6 @@ examples:</div><div class='ctx'>                             };</div><div class='ctx'>                             port@5 {</div><div class='ctx'>                                     reg = &lt;5&gt;;</div><div class='del'>-                                    label = "cpu";</div><div class='ctx'>                                     ethernet = &lt;&amp;gmac0&gt;;</div><div class='ctx'>                                     phy-mode = "rgmii";</div><div class='ctx'>                                     fixed-link {</div><div class='hunk'>@@ -283,7 +276,6 @@ examples:</div><div class='ctx'>                             };</div><div class='ctx'>                             port@6 {</div><div class='ctx'>                                     reg = &lt;6&gt;;</div><div class='del'>-                                    label = "cpu";</div><div class='ctx'>                                     ethernet = &lt;&amp;fec1&gt;;</div><div class='ctx'>                                     phy-mode = "rgmii";</div><div class='ctx'>                                     tx-internal-delay-ps = &lt;2000&gt;;</div><div class='hunk'>@@ -335,7 +327,7 @@ examples:</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>             switch@29 {</div><div class='del'>-                    compatible = "realtek,rtl8367s";</div><div class='add'>+                    compatible = "realtek,rtl8365mb";</div><div class='ctx'>                     reg = &lt;29&gt;;</div><div class='ctx'> </div><div class='ctx'>                     reset-gpios = &lt;&amp;gpio2 20 GPIO_ACTIVE_LOW&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml b/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml<br/>new file mode 100644<br/>index 000000000000..833d2f68daa1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/renesas,rzn1-a5psw.yaml</a></div><div class='hunk'>@@ -0,0 +1,158 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/N1 Advanced 5 ports ethernet switch</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Clément Léger &lt;clement.leger@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and</div><div class='add'>+  handles 4 ports + 1 CPU management port.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dsa.yaml#/$defs/ethernet-ports</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a06g032-a5psw</div><div class='add'>+      - const: renesas,rzn1-a5psw</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Device Level Ring (DLR) interrupt</div><div class='add'>+      - description: Switch interrupt</div><div class='add'>+      - description: Parallel Redundancy Protocol (PRP) interrupt</div><div class='add'>+      - description: Integrated HUB module interrupt</div><div class='add'>+      - description: Receive Pattern Match interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dlr</div><div class='add'>+      - const: switch</div><div class='add'>+      - const: prp</div><div class='add'>+      - const: hub</div><div class='add'>+      - const: ptrn</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: /schemas/net/mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: AHB clock used for the switch register interface</div><div class='add'>+      - description: Switch system clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hclk</div><div class='add'>+      - const: clk</div><div class='add'>+</div><div class='add'>+  ethernet-ports:</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ethernet-)?port@[0-4]$":</div><div class='add'>+        type: object</div><div class='add'>+        description: Ethernet switch ports</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pcs-handle:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            description:</div><div class='add'>+              phandle pointing to a PCS sub-node compatible with</div><div class='add'>+              renesas,rzn1-miic.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a06g032-sysctrl.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    switch@44050000 {</div><div class='add'>+        compatible = "renesas,r9a06g032-a5psw", "renesas,rzn1-a5psw";</div><div class='add'>+        reg = &lt;0x44050000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;sysctrl R9A06G032_HCLK_SWITCH&gt;, &lt;&amp;sysctrl R9A06G032_CLK_SWITCH&gt;;</div><div class='add'>+        clock-names = "hclk", "clk";</div><div class='add'>+        power-domains = &lt;&amp;sysctrl&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "dlr", "switch", "prp", "hub", "ptrn";</div><div class='add'>+</div><div class='add'>+        dsa,member = &lt;0 0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                label = "lan0";</div><div class='add'>+                phy-handle = &lt;&amp;switch0phy3&gt;;</div><div class='add'>+                pcs-handle = &lt;&amp;mii_conv4&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                label = "lan1";</div><div class='add'>+                phy-handle = &lt;&amp;switch0phy1&gt;;</div><div class='add'>+                pcs-handle = &lt;&amp;mii_conv3&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@4 {</div><div class='add'>+                reg = &lt;4&gt;;</div><div class='add'>+                ethernet = &lt;&amp;gmac2&gt;;</div><div class='add'>+                phy-mode = "internal";</div><div class='add'>+</div><div class='add'>+                fixed-link {</div><div class='add'>+                  speed = &lt;1000&gt;;</div><div class='add'>+                  full-duplex;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio0a 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-delay-us = &lt;15&gt;;</div><div class='add'>+            clock-frequency = &lt;2500000&gt;;</div><div class='add'>+</div><div class='add'>+            switch0phy1: ethernet-phy@1{</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            switch0phy3: ethernet-phy@3{</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt b/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt<br/>index bbf4a13f6d75..258bef483673 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/dsa/vitesse,vsc73xx.txt</a></div><div class='hunk'>@@ -75,7 +75,6 @@ switch@0 {</div><div class='ctx'> 		};</div><div class='ctx'> 		vsc: port@6 {</div><div class='ctx'> 			reg = &lt;6&gt;;</div><div class='del'>-			label = "cpu";</div><div class='ctx'> 			ethernet = &lt;&amp;gmac1&gt;;</div><div class='ctx'> 			phy-mode = "rgmii";</div><div class='ctx'> 			fixed-link {</div><div class='hunk'>@@ -117,7 +116,6 @@ switch@2,0 {</div><div class='ctx'> 		};</div><div class='ctx'> 		vsc: port@6 {</div><div class='ctx'> 			reg = &lt;6&gt;;</div><div class='del'>-			label = "cpu";</div><div class='ctx'> 			ethernet = &lt;&amp;enet0&gt;;</div><div class='ctx'> 			phy-mode = "rgmii";</div><div class='ctx'> 			fixed-link {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/emac_rockchip.txt b/Documentation/devicetree/bindings/net/emac_rockchip.txt<br/>deleted file mode 100644<br/>index 05bd7dafce17..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/emac_rockchip.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/emac_rockchip.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,52 +0,0 @@</div><div class='del'>-* ARC EMAC 10/100 Ethernet platform driver for Rockchip RK3036/RK3066/RK3188 SoCs</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "rockchip,&lt;name&gt;-emac"</div><div class='del'>-   "rockchip,rk3036-emac": found on RK3036 SoCs</div><div class='del'>-   "rockchip,rk3066-emac": found on RK3066 SoCs</div><div class='del'>-   "rockchip,rk3188-emac": found on RK3188 SoCs</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain the EMAC interrupts</div><div class='del'>-- rockchip,grf: phandle to the syscon grf used to control speed and mode</div><div class='del'>-  for emac.</div><div class='del'>-- phy: see ethernet.txt file in the same directory.</div><div class='del'>-- phy-mode: see ethernet.txt file in the same directory.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- phy-supply: phandle to a regulator if the PHY needs one</div><div class='del'>-</div><div class='del'>-Clock handling:</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-- clock-names: Shall be "hclk" for the host clock needed to calculate and set</div><div class='del'>-  polling period of EMAC and "macref" for the reference clock needed to transfer</div><div class='del'>-  data to and from the phy.</div><div class='del'>-</div><div class='del'>-Child nodes of the driver are the individual PHY devices connected to the</div><div class='del'>-MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-ethernet@10204000 {</div><div class='del'>-	compatible = "rockchip,rk3188-emac";</div><div class='del'>-	reg = &lt;0xc0fc2000 0x3c&gt;;</div><div class='del'>-	interrupts = &lt;6&gt;;</div><div class='del'>-	mac-address = [ 00 11 22 33 44 55 ];</div><div class='del'>-</div><div class='del'>-	clocks = &lt;&amp;cru HCLK_EMAC&gt;, &lt;&amp;cru SCLK_MAC&gt;;</div><div class='del'>-	clock-names = "hclk", "macref";</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;emac_xfer&gt;, &lt;&amp;emac_mdio&gt;, &lt;&amp;phy_int&gt;;</div><div class='del'>-</div><div class='del'>-	rockchip,grf = &lt;&amp;grf&gt;;</div><div class='del'>-</div><div class='del'>-	phy = &lt;&amp;phy0&gt;;</div><div class='del'>-	phy-mode = "rmii";</div><div class='del'>-	phy-supply = &lt;&amp;vcc_rmii&gt;;</div><div class='del'>-</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	phy0: ethernet-phy@0 {</div><div class='del'>-	      reg = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/engleder,tsnep.yaml b/Documentation/devicetree/bindings/net/engleder,tsnep.yaml<br/>index d0e1476e15b5..82a5d7927ca4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/engleder,tsnep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/engleder,tsnep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/engleder,tsnep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/engleder,tsnep.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/engleder,tsnep.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TSN endpoint Ethernet MAC binding</div><div class='add'>+title: TSN endpoint Ethernet MAC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Gerhard Engleder &lt;gerhard@engleder-embedded.com&gt;</div><div class='hunk'>@@ -20,7 +20,26 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: mac</div><div class='add'>+      - const: txrx-1</div><div class='add'>+      - const: txrx-2</div><div class='add'>+      - const: txrx-3</div><div class='add'>+      - const: txrx-4</div><div class='add'>+      - const: txrx-5</div><div class='add'>+      - const: txrx-6</div><div class='add'>+      - const: txrx-7</div><div class='add'>+    description:</div><div class='add'>+      The main interrupt for basic MAC features and the first TX/RX queue pair</div><div class='add'>+      is named "mac". "txrx-[1-7]" are the interrupts for additional TX/RX</div><div class='add'>+      queue pairs.</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='ctx'> </div><div class='ctx'>   local-mac-address: true</div><div class='ctx'> </div><div class='hunk'>@@ -28,7 +47,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   nvmem-cells: true</div><div class='ctx'> </div><div class='del'>-  nvmem-cells-names: true</div><div class='add'>+  nvmem-cell-names: true</div><div class='ctx'> </div><div class='ctx'>   phy-connection-type:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -43,7 +62,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   mdio:</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "mdio.yaml#"</div><div class='add'>+    $ref: mdio.yaml#</div><div class='ctx'>     description: optional node for embedded MDIO controller</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -58,7 +77,7 @@ examples:</div><div class='ctx'>     axi {</div><div class='ctx'>         #address-cells = &lt;2&gt;;</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='del'>-        tnsep0: ethernet@a0000000 {</div><div class='add'>+        tsnep0: ethernet@a0000000 {</div><div class='ctx'>             compatible = "engleder,tsnep";</div><div class='ctx'>             reg = &lt;0x0 0xa0000000 0x0 0x10000&gt;;</div><div class='ctx'>             interrupts = &lt;0 89 1&gt;;</div><div class='hunk'>@@ -76,4 +95,24 @@ examples:</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='add'>+</div><div class='add'>+        tsnep1: ethernet@a0010000 {</div><div class='add'>+            compatible = "engleder,tsnep";</div><div class='add'>+            reg = &lt;0x0 0xa0010000 0x0 0x10000&gt;;</div><div class='add'>+            interrupts = &lt;0 93 1&gt;, &lt;0 94 1&gt;, &lt;0 95 1&gt;, &lt;0 96 1&gt;;</div><div class='add'>+            interrupt-names = "mac", "txrx-1", "txrx-2", "txrx-3";</div><div class='add'>+            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+            local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+            phy-mode = "rgmii";</div><div class='add'>+            phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+            mdio {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                suppress-preamble;</div><div class='add'>+                phy1: ethernet-phy@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    rxc-skew-ps = &lt;1080&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml<br/>index 817794e56227..6b0d359367da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ethernet-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ethernet-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ethernet-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ethernet Controller Generic Binding</div><div class='add'>+title: Ethernet Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - David S. Miller &lt;davem@davemloft.net&gt;</div><div class='hunk'>@@ -67,6 +67,7 @@ properties:</div><div class='ctx'>       - gmii</div><div class='ctx'>       - sgmii</div><div class='ctx'>       - qsgmii</div><div class='add'>+      - qusgmii</div><div class='ctx'>       - tbi</div><div class='ctx'>       - rev-mii</div><div class='ctx'>       - rmii</div><div class='hunk'>@@ -106,6 +107,18 @@ properties:</div><div class='ctx'>   phy-mode:</div><div class='ctx'>     $ref: "#/properties/phy-connection-type"</div><div class='ctx'> </div><div class='add'>+  pcs-handle:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Specifies a reference to a node representing a PCS PHY device on a MDIO</div><div class='add'>+      bus to link with an external PHY (phy-handle) if exists.</div><div class='add'>+</div><div class='add'>+  pcs-handle-names:</div><div class='add'>+    description:</div><div class='add'>+      The name of each PCS in pcs-handle.</div><div class='add'>+</div><div class='ctx'>   phy-handle:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='hunk'>@@ -127,12 +140,6 @@ properties:</div><div class='ctx'>       and is useful for determining certain configuration settings</div><div class='ctx'>       such as flow control thresholds.</div><div class='ctx'> </div><div class='del'>-  rx-internal-delay-ps:</div><div class='del'>-    description: |</div><div class='del'>-      RGMII Receive Clock Delay defined in pico seconds.</div><div class='del'>-      This is used for controllers that have configurable RX internal delays.</div><div class='del'>-      If this property is present then the MAC applies the RX delay.</div><div class='del'>-</div><div class='ctx'>   sfp:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='hunk'>@@ -144,12 +151,6 @@ properties:</div><div class='ctx'>       The size of the controller\'s transmit fifo in bytes. This</div><div class='ctx'>       is used for components that can have configurable fifo sizes.</div><div class='ctx'> </div><div class='del'>-  tx-internal-delay-ps:</div><div class='del'>-    description: |</div><div class='del'>-      RGMII Transmit Clock Delay defined in pico seconds.</div><div class='del'>-      This is used for controllers that have configurable TX internal delays.</div><div class='del'>-      If this property is present then the MAC applies the TX delay.</div><div class='del'>-</div><div class='ctx'>   managed:</div><div class='ctx'>     description:</div><div class='ctx'>       Specifies the PHY management type. If auto is set and fixed-link</div><div class='hunk'>@@ -161,70 +162,126 @@ properties:</div><div class='ctx'>       - in-band-status</div><div class='ctx'> </div><div class='ctx'>   fixed-link:</div><div class='del'>-    allOf:</div><div class='del'>-      - if:</div><div class='del'>-          type: array</div><div class='del'>-        then:</div><div class='del'>-          deprecated: true</div><div class='del'>-          items:</div><div class='del'>-            - minimum: 0</div><div class='del'>-              maximum: 31</div><div class='del'>-              description:</div><div class='del'>-                Emulated PHY ID, choose any but unique to the all</div><div class='del'>-                specified fixed-links</div><div class='del'>-</div><div class='del'>-            - enum: [0, 1]</div><div class='del'>-              description:</div><div class='del'>-                Duplex configuration. 0 for half duplex or 1 for</div><div class='del'>-                full duplex</div><div class='del'>-</div><div class='del'>-            - enum: [10, 100, 1000, 2500, 10000]</div><div class='del'>-              description:</div><div class='del'>-                Link speed in Mbits/sec.</div><div class='del'>-</div><div class='del'>-            - enum: [0, 1]</div><div class='del'>-              description:</div><div class='del'>-                Pause configuration. 0 for no pause, 1 for pause</div><div class='del'>-</div><div class='del'>-            - enum: [0, 1]</div><div class='del'>-              description:</div><div class='del'>-                Asymmetric pause configuration. 0 for no asymmetric</div><div class='del'>-                pause, 1 for asymmetric pause</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-      - if:</div><div class='del'>-          type: object</div><div class='del'>-        then:</div><div class='del'>-          properties:</div><div class='del'>-            speed:</div><div class='del'>-              description:</div><div class='del'>-                Link speed.</div><div class='del'>-              $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-              enum: [10, 100, 1000, 2500, 10000]</div><div class='del'>-</div><div class='del'>-            full-duplex:</div><div class='del'>-              $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-              description:</div><div class='del'>-                Indicates that full-duplex is used. When absent, half</div><div class='del'>-                duplex is assumed.</div><div class='del'>-</div><div class='del'>-            pause:</div><div class='del'>-              $ref: /schemas/types.yaml#definitions/flag</div><div class='del'>-              description:</div><div class='del'>-                Indicates that pause should be enabled.</div><div class='del'>-</div><div class='del'>-            asym-pause:</div><div class='del'>-              $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-              description:</div><div class='del'>-                Indicates that asym_pause should be enabled.</div><div class='del'>-</div><div class='del'>-            link-gpios:</div><div class='del'>-              maxItems: 1</div><div class='del'>-              description:</div><div class='del'>-                GPIO to determine if the link is up</div><div class='del'>-</div><div class='del'>-          required:</div><div class='del'>-            - speed</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          - minimum: 0</div><div class='add'>+            maximum: 31</div><div class='add'>+            description:</div><div class='add'>+              Emulated PHY ID, choose any but unique to the all</div><div class='add'>+              specified fixed-links</div><div class='add'>+</div><div class='add'>+          - enum: [0, 1]</div><div class='add'>+            description:</div><div class='add'>+              Duplex configuration. 0 for half duplex or 1 for</div><div class='add'>+              full duplex</div><div class='add'>+</div><div class='add'>+          - enum: [10, 100, 1000, 2500, 10000]</div><div class='add'>+            description:</div><div class='add'>+              Link speed in Mbits/sec.</div><div class='add'>+</div><div class='add'>+          - enum: [0, 1]</div><div class='add'>+            description:</div><div class='add'>+              Pause configuration. 0 for no pause, 1 for pause</div><div class='add'>+</div><div class='add'>+          - enum: [0, 1]</div><div class='add'>+            description:</div><div class='add'>+              Asymmetric pause configuration. 0 for no asymmetric</div><div class='add'>+              pause, 1 for asymmetric pause</div><div class='add'>+      - type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          speed:</div><div class='add'>+            description:</div><div class='add'>+              Link speed.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [10, 100, 1000, 2500, 10000]</div><div class='add'>+</div><div class='add'>+          full-duplex:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+            description:</div><div class='add'>+              Indicates that full-duplex is used. When absent, half</div><div class='add'>+              duplex is assumed.</div><div class='add'>+</div><div class='add'>+          pause:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+            description:</div><div class='add'>+              Indicates that pause should be enabled.</div><div class='add'>+</div><div class='add'>+          asym-pause:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+            description:</div><div class='add'>+              Indicates that asym_pause should be enabled.</div><div class='add'>+</div><div class='add'>+          link-gpios:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            description:</div><div class='add'>+              GPIO to determine if the link is up</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - speed</div><div class='add'>+</div><div class='add'>+  leds:</div><div class='add'>+    description:</div><div class='add'>+      Describes the LEDs associated by Ethernet Controller.</div><div class='add'>+      These LEDs are not integrated in the PHY and PHY doesn't have any</div><div class='add'>+      control on them. Ethernet Controller regs are used to control</div><div class='add'>+      these defined LEDs.</div><div class='add'>+</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^led@[a-f0-9]+$':</div><div class='add'>+        $ref: /schemas/leds/common.yaml#</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            description:</div><div class='add'>+              This define the LED index in the PHY or the MAC. It's really</div><div class='add'>+              driver dependent and required for ports that define multiple</div><div class='add'>+              LED for the same port.</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  pcs-handle-names: [pcs-handle]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        phy-mode:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - rgmii</div><div class='add'>+              - rgmii-rxid</div><div class='add'>+              - rgmii-txid</div><div class='add'>+              - rgmii-id</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        rx-internal-delay-ps:</div><div class='add'>+          description:</div><div class='add'>+            RGMII Receive Clock Delay defined in pico seconds.This is used for</div><div class='add'>+            controllers that have configurable RX internal delays. If this</div><div class='add'>+            property is present then the MAC applies the RX delay.</div><div class='add'>+        tx-internal-delay-ps:</div><div class='add'>+          description:</div><div class='add'>+            RGMII Transmit Clock Delay defined in pico seconds.This is used for</div><div class='add'>+            controllers that have configurable TX internal delays. If this</div><div class='add'>+            property is present then the MAC applies the TX delay.</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml<br/>index ee42328a109d..4f574532ee13 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ethernet-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ethernet-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ethernet-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ethernet PHY Generic Binding</div><div class='add'>+title: Ethernet PHY Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='hunk'>@@ -77,6 +77,15 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Maximum PHY supported speed in Mbits / seconds.</div><div class='ctx'> </div><div class='add'>+  phy-10base-t1l-2.4vpp:</div><div class='add'>+    description: |</div><div class='add'>+      tristate, request/disable 2.4 Vpp operating mode. The values are:</div><div class='add'>+      0: Disable 2.4 Vpp operating mode.</div><div class='add'>+      1: Request 2.4 Vpp operating mode from link partner.</div><div class='add'>+      Absence of this property will leave configuration to default values.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='ctx'>   broken-turn-around:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='hunk'>@@ -135,6 +144,12 @@ properties:</div><div class='ctx'>       Mark the corresponding energy efficient ethernet mode as</div><div class='ctx'>       broken and request the ethernet to stop advertising it.</div><div class='ctx'> </div><div class='add'>+  pses:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Specifies a reference to a node representing a Power Sourcing Equipment.</div><div class='add'>+</div><div class='ctx'>   phy-is-integrated:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='hunk'>@@ -182,6 +197,35 @@ properties:</div><div class='ctx'>       PHY's that have configurable TX internal delays. If this property is</div><div class='ctx'>       present then the PHY applies the TX delay.</div><div class='ctx'> </div><div class='add'>+  leds:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^led@[a-f0-9]+$':</div><div class='add'>+        $ref: /schemas/leds/common.yaml#</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            description:</div><div class='add'>+              This define the LED index in the PHY or the MAC. It's really</div><div class='add'>+              driver dependent and required for ports that define multiple</div><div class='add'>+              LED for the same port.</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='hunk'>@@ -189,6 +233,8 @@ additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/leds/common.h&gt;</div><div class='add'>+</div><div class='ctx'>     ethernet {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -204,5 +250,17 @@ examples:</div><div class='ctx'>             reset-gpios = &lt;&amp;gpio1 4 1&gt;;</div><div class='ctx'>             reset-assert-us = &lt;1000&gt;;</div><div class='ctx'>             reset-deassert-us = &lt;2000&gt;;</div><div class='add'>+</div><div class='add'>+            leds {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                led@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    color = &lt;LED_COLOR_ID_WHITE&gt;;</div><div class='add'>+                    function = LED_FUNCTION_LAN;</div><div class='add'>+                    default-state = "keep";</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ethernet-switch-port.yaml b/Documentation/devicetree/bindings/net/ethernet-switch-port.yaml<br/>new file mode 100644<br/>index 000000000000..d5cf7e40e3c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ethernet-switch-port.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ethernet-switch-port.yaml</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/ethernet-switch-port.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Generic Ethernet Switch Port</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+  - Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  An Ethernet switch port is a component of a switch that manages one MAC, and</div><div class='add'>+  can pass Ethernet frames.</div><div class='add'>+</div><div class='add'>+$ref: ethernet-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    description: Port number</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ethernet-switch.yaml b/Documentation/devicetree/bindings/net/ethernet-switch.yaml<br/>new file mode 100644<br/>index 000000000000..f1b9075dc7fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ethernet-switch.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ethernet-switch.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/ethernet-switch.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Generic Ethernet Switch</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='add'>+  - Vladimir Oltean &lt;olteanv@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Ethernet switches are multi-port Ethernet controllers. Each port has</div><div class='add'>+  its own number and is represented as its own Ethernet controller.</div><div class='add'>+  The minimum required functionality is to pass packets to software.</div><div class='add'>+  They may or may not be able to forward packets automonously between</div><div class='add'>+  ports.</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^(ethernet-)?switch(@.*)?$"</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^(ethernet-)?ports$":</div><div class='add'>+    type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+        type: object</div><div class='add'>+        description: Ethernet switch ports</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#size-cells"</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - ports</div><div class='add'>+  - required:</div><div class='add'>+      - ethernet-ports</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  base:</div><div class='add'>+    description: An ethernet switch without any extra port properties</div><div class='add'>+    $ref: '#'</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(ethernet-)?port@[0-9]+$":</div><div class='add'>+        description: Ethernet switch ports</div><div class='add'>+        $ref: ethernet-switch-port.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml<br/>index daa2f79a294f..b494e009326e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/fsl,fec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/fsl,fec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/fsl,fec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/fsl,fec.yaml</a></div><div class='hunk'>@@ -7,7 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Freescale Fast Ethernet Controller (FEC)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Joakim Zhang &lt;qiangqing.zhang@nxp.com&gt;</div><div class='add'>+  - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='add'>+  - Wei Fang &lt;wei.fang@nxp.com&gt;</div><div class='add'>+  - NXP Linux Team &lt;linux-imx@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: ethernet-controller.yaml#</div><div class='hunk'>@@ -21,6 +23,7 @@ properties:</div><div class='ctx'>           - fsl,imx28-fec</div><div class='ctx'>           - fsl,imx6q-fec</div><div class='ctx'>           - fsl,mvf600-fec</div><div class='add'>+          - fsl,s32v234-fec</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx53-fec</div><div class='hunk'>@@ -48,6 +51,7 @@ properties:</div><div class='ctx'>               - fsl,imx8mm-fec</div><div class='ctx'>               - fsl,imx8mn-fec</div><div class='ctx'>               - fsl,imx8mp-fec</div><div class='add'>+              - fsl,imx93-fec</div><div class='ctx'>           - const: fsl,imx8mq-fec</div><div class='ctx'>           - const: fsl,imx6sx-fec</div><div class='ctx'>       - items:</div><div class='hunk'>@@ -58,6 +62,11 @@ properties:</div><div class='ctx'>               - fsl,imx8qxp-fec</div><div class='ctx'>           - const: fsl,imx8qm-fec</div><div class='ctx'>           - const: fsl,imx6sx-fec</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8ulp-fec</div><div class='add'>+          - const: fsl,imx6ul-fec</div><div class='add'>+          - const: fsl,imx6q-fec</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -121,6 +130,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   mac-address: true</div><div class='ctx'> </div><div class='add'>+  nvmem-cells: true</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names: true</div><div class='add'>+</div><div class='ctx'>   tx-internal-delay-ps:</div><div class='ctx'>     enum: [0, 2000]</div><div class='ctx'> </div><div class='hunk'>@@ -131,6 +144,9 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Regulator that powers the Ethernet PHY.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   fsl,num-tx-queues:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description:</div><div class='hunk'>@@ -183,6 +199,7 @@ properties:</div><div class='ctx'>       Should specify the gpio for phy reset.</div><div class='ctx'> </div><div class='ctx'>   phy-reset-duration:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     deprecated: true</div><div class='ctx'>     description:</div><div class='ctx'>       Reset duration in milliseconds.  Should present only if property</div><div class='hunk'>@@ -191,12 +208,14 @@ properties:</div><div class='ctx'>       and 1 millisecond will be used instead.</div><div class='ctx'> </div><div class='ctx'>   phy-reset-active-high:</div><div class='add'>+    type: boolean</div><div class='ctx'>     deprecated: true</div><div class='ctx'>     description:</div><div class='ctx'>       If present then the reset sequence using the GPIO specified in the</div><div class='ctx'>       "phy-reset-gpios" property is reversed (H=reset state, L=operation state).</div><div class='ctx'> </div><div class='ctx'>   phy-reset-post-delay:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     deprecated: true</div><div class='ctx'>     description:</div><div class='ctx'>       Post reset delay in milliseconds. If present then a delay of phy-reset-post-delay</div><div class='hunk'>@@ -213,7 +232,7 @@ required:</div><div class='ctx'> # least undocumented properties. However, PHY may have a deprecated option to</div><div class='ctx'> # place PHY OF properties in the MAC node, such as Micrel PHY, and we can find</div><div class='ctx'> # these boards which is based on i.MX6QDL.</div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml b/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml<br/>new file mode 100644<br/>index 000000000000..c80c880a9dab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml</a></div><div class='hunk'>@@ -0,0 +1,172 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP FMan MAC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Madalin Bucur &lt;madalin.bucur@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Each FMan has several MACs, each implementing an Ethernet interface. Earlier</div><div class='add'>+  versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for</div><div class='add'>+  10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller</div><div class='add'>+  (10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate</div><div class='add'>+  Ethernet Media Access Controller (mEMAC) to handle all speeds.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,fman-dtsec</div><div class='add'>+      - fsl,fman-xgec</div><div class='add'>+      - fsl,fman-memac</div><div class='add'>+</div><div class='add'>+  cell-index:</div><div class='add'>+    maximum: 64</div><div class='add'>+    description: |</div><div class='add'>+      FManV2:</div><div class='add'>+      register[bit]           MAC             cell-index</div><div class='add'>+      ============================================================</div><div class='add'>+      FM_EPI[16]              XGEC            8</div><div class='add'>+      FM_EPI[16+n]            dTSECn          n-1</div><div class='add'>+      FM_NPI[11+n]            dTSECn          n-1</div><div class='add'>+              n = 1,..,5</div><div class='add'>+</div><div class='add'>+      FManV3:</div><div class='add'>+      register[bit]           MAC             cell-index</div><div class='add'>+      ============================================================</div><div class='add'>+      FM_EPI[16+n]            mEMACn          n-1</div><div class='add'>+      FM_EPI[25]              mEMAC10         9</div><div class='add'>+</div><div class='add'>+      FM_NPI[11+n]            mEMACn          n-1</div><div class='add'>+      FM_NPI[10]              mEMAC10         9</div><div class='add'>+      FM_NPI[11]              mEMAC9          8</div><div class='add'>+              n = 1,..8</div><div class='add'>+</div><div class='add'>+      FM_EPI and FM_NPI are located in the FMan memory map.</div><div class='add'>+</div><div class='add'>+      2. SoC registers:</div><div class='add'>+</div><div class='add'>+      - P2041, P3041, P4080 P5020, P5040:</div><div class='add'>+      register[bit]           FMan            MAC             cell</div><div class='add'>+                              Unit                            index</div><div class='add'>+      ============================================================</div><div class='add'>+      DCFG_DEVDISR2[7]        1               XGEC            8</div><div class='add'>+      DCFG_DEVDISR2[7+n]      1               dTSECn          n-1</div><div class='add'>+      DCFG_DEVDISR2[15]       2               XGEC            8</div><div class='add'>+      DCFG_DEVDISR2[15+n]     2               dTSECn          n-1</div><div class='add'>+              n = 1,..5</div><div class='add'>+</div><div class='add'>+      - T1040, T2080, T4240, B4860:</div><div class='add'>+      register[bit]                   FMan    MAC             cell</div><div class='add'>+                                      Unit                    index</div><div class='add'>+      ============================================================</div><div class='add'>+      DCFG_CCSR_DEVDISR2[n-1]         1       mEMACn          n-1</div><div class='add'>+      DCFG_CCSR_DEVDISR2[11+n]        2       mEMACn          n-1</div><div class='add'>+              n = 1,..6,9,10</div><div class='add'>+</div><div class='add'>+      EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in</div><div class='add'>+      the specific SoC "Device Configuration/Pin Control" Memory</div><div class='add'>+      Map.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fsl,fman-ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description: |</div><div class='add'>+      An array of two references: the first is the FMan RX port and the second</div><div class='add'>+      is the TX port used by this MAC.</div><div class='add'>+</div><div class='add'>+  ptp-timer:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: A reference to the IEEE1588 timer</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    description: A reference to the SerDes lane(s)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: serdes</div><div class='add'>+</div><div class='add'>+  pcsphy-handle:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: See pcs-handle.</div><div class='add'>+</div><div class='add'>+  pcs-handle:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+    description: |</div><div class='add'>+      A reference to the various PCSs (typically found on the SerDes). If</div><div class='add'>+      pcs-handle-names is absent, and phy-connection-type is "xgmii", then the first</div><div class='add'>+      reference will be assumed to be for "xfi". Otherwise, if pcs-handle-names is</div><div class='add'>+      absent, then the first reference will be assumed to be for "sgmii".</div><div class='add'>+</div><div class='add'>+  pcs-handle-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        - sgmii</div><div class='add'>+        - qsgmii</div><div class='add'>+        - xfi</div><div class='add'>+    description: The type of each PCS in pcsphy-handle.</div><div class='add'>+</div><div class='add'>+  tbi-handle:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: A reference to the (TBI-based) PCS</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - cell-index</div><div class='add'>+  - reg</div><div class='add'>+  - fsl,fman-ports</div><div class='add'>+  - ptp-timer</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  pcs-handle-names:</div><div class='add'>+    - pcs-handle</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,fman-dtsec</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - tbi-handle</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ethernet@e0000 {</div><div class='add'>+            compatible = "fsl,fman-dtsec";</div><div class='add'>+            cell-index = &lt;0&gt;;</div><div class='add'>+            reg = &lt;0xe0000 0x1000&gt;;</div><div class='add'>+            fsl,fman-ports = &lt;&amp;fman1_rx8 &amp;fman1_tx28&gt;;</div><div class='add'>+            ptp-timer = &lt;&amp;ptp_timer&gt;;</div><div class='add'>+            tbi-handle = &lt;&amp;tbi0&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    ethernet@e8000 {</div><div class='add'>+            cell-index = &lt;4&gt;;</div><div class='add'>+            compatible = "fsl,fman-memac";</div><div class='add'>+            reg = &lt;0xe8000 0x1000&gt;;</div><div class='add'>+            fsl,fman-ports = &lt;&amp;fman0_rx_0x0c &amp;fman0_tx_0x2c&gt;;</div><div class='add'>+            ptp-timer = &lt;&amp;ptp_timer0&gt;;</div><div class='add'>+            pcs-handle = &lt;&amp;pcsphy4&gt;, &lt;&amp;qsgmiib_pcs1&gt;;</div><div class='add'>+            pcs-handle-names = "sgmii", "qsgmii";</div><div class='add'>+            phys = &lt;&amp;serdes1 1&gt;;</div><div class='add'>+            phy-names = "serdes";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml b/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml<br/>index 7f620a71a972..a1b71b35319e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/fsl,qoriq-mc-dpmac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: DPAA2 MAC bindings</div><div class='add'>+title: DPAA2 MAC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ioana Ciornei &lt;ioana.ciornei@nxp.com&gt;</div><div class='hunk'>@@ -14,7 +14,7 @@ description:</div><div class='ctx'>   located under the 'dpmacs' node for the fsl-mc bus DTS node.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -31,7 +31,7 @@ properties:</div><div class='ctx'>   phy-mode: true</div><div class='ctx'> </div><div class='ctx'>   pcs-handle:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    maxItems: 1</div><div class='ctx'>     description:</div><div class='ctx'>       A reference to a node representing a PCS PHY device found on</div><div class='ctx'>       the internal MDIO bus.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt<br/>index 801efc7d6818..bda4b41af074 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/fsl-fman.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/fsl-fman.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/fsl-fman.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/fsl-fman.txt</a></div><div class='hunk'>@@ -232,133 +232,7 @@ port@81000 {</div><div class='ctx'> =============================================================================</div><div class='ctx'> FMan dTSEC/XGEC/mEMAC Node</div><div class='ctx'> </div><div class='del'>-DESCRIPTION</div><div class='del'>-</div><div class='del'>-mEMAC/dTSEC/XGEC are the Ethernet network interfaces</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-- compatible</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;stringlist&gt;</div><div class='del'>-		Definition: A standard property.</div><div class='del'>-		Must include one of the following:</div><div class='del'>-		- "fsl,fman-dtsec" for dTSEC MAC</div><div class='del'>-		- "fsl,fman-xgec" for XGEC MAC</div><div class='del'>-		- "fsl,fman-memac" for mEMAC MAC</div><div class='del'>-</div><div class='del'>-- cell-index</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;u32&gt;</div><div class='del'>-		Definition: Specifies the MAC id.</div><div class='del'>-</div><div class='del'>-		The cell-index value may be used by the FMan or the SoC, to</div><div class='del'>-		identify the MAC unit in the FMan (or SoC) memory map.</div><div class='del'>-		In the tables below there's a description of the cell-index</div><div class='del'>-		use, there are two tables, one describes the use of cell-index</div><div class='del'>-		by the FMan, the second describes the use by the SoC:</div><div class='del'>-</div><div class='del'>-		1. FMan Registers</div><div class='del'>-</div><div class='del'>-		FManV2:</div><div class='del'>-		register[bit]		MAC		cell-index</div><div class='del'>-		============================================================</div><div class='del'>-		FM_EPI[16]		XGEC		8</div><div class='del'>-		FM_EPI[16+n]		dTSECn		n-1</div><div class='del'>-		FM_NPI[11+n]		dTSECn		n-1</div><div class='del'>-			n = 1,..,5</div><div class='del'>-</div><div class='del'>-		FManV3:</div><div class='del'>-		register[bit]		MAC		cell-index</div><div class='del'>-		============================================================</div><div class='del'>-		FM_EPI[16+n]		mEMACn		n-1</div><div class='del'>-		FM_EPI[25]		mEMAC10		9</div><div class='del'>-</div><div class='del'>-		FM_NPI[11+n]		mEMACn		n-1</div><div class='del'>-		FM_NPI[10]		mEMAC10		9</div><div class='del'>-		FM_NPI[11]		mEMAC9		8</div><div class='del'>-			n = 1,..8</div><div class='del'>-</div><div class='del'>-		FM_EPI and FM_NPI are located in the FMan memory map.</div><div class='del'>-</div><div class='del'>-		2. SoC registers:</div><div class='del'>-</div><div class='del'>-		- P2041, P3041, P4080 P5020, P5040:</div><div class='del'>-		register[bit]		FMan		MAC		cell</div><div class='del'>-					Unit				index</div><div class='del'>-		============================================================</div><div class='del'>-		DCFG_DEVDISR2[7]	1		XGEC		8</div><div class='del'>-		DCFG_DEVDISR2[7+n]	1		dTSECn		n-1</div><div class='del'>-		DCFG_DEVDISR2[15]	2		XGEC		8</div><div class='del'>-		DCFG_DEVDISR2[15+n]	2		dTSECn		n-1</div><div class='del'>-			n = 1,..5</div><div class='del'>-</div><div class='del'>-		- T1040, T2080, T4240, B4860:</div><div class='del'>-		register[bit]			FMan	MAC		cell</div><div class='del'>-						Unit			index</div><div class='del'>-		============================================================</div><div class='del'>-		DCFG_CCSR_DEVDISR2[n-1]		1	mEMACn		n-1</div><div class='del'>-		DCFG_CCSR_DEVDISR2[11+n]	2	mEMACn		n-1</div><div class='del'>-			n = 1,..6,9,10</div><div class='del'>-</div><div class='del'>-		EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in</div><div class='del'>-		the specific SoC "Device Configuration/Pin Control" Memory</div><div class='del'>-		Map.</div><div class='del'>-</div><div class='del'>-- reg</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-		Definition: A standard property.</div><div class='del'>-</div><div class='del'>-- fsl,fman-ports</div><div class='del'>-		Usage: required</div><div class='del'>-		Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-		Definition: An array of two phandles - the first references is</div><div class='del'>-		the FMan RX port and the second is the TX port used by this</div><div class='del'>-		MAC.</div><div class='del'>-</div><div class='del'>-- ptp-timer</div><div class='del'>-		Usage required</div><div class='del'>-		Value type: &lt;phandle&gt;</div><div class='del'>-		Definition: A phandle for 1EEE1588 timer.</div><div class='del'>-</div><div class='del'>-- pcsphy-handle</div><div class='del'>-		Usage required for "fsl,fman-memac" MACs</div><div class='del'>-		Value type: &lt;phandle&gt;</div><div class='del'>-		Definition: A phandle for pcsphy.</div><div class='del'>-</div><div class='del'>-- tbi-handle</div><div class='del'>-		Usage required for "fsl,fman-dtsec" MACs</div><div class='del'>-		Value type: &lt;phandle&gt;</div><div class='del'>-		Definition: A phandle for tbiphy.</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-</div><div class='del'>-fman1_tx28: port@a8000 {</div><div class='del'>-	cell-index = &lt;0x28&gt;;</div><div class='del'>-	compatible = "fsl,fman-v2-port-tx";</div><div class='del'>-	reg = &lt;0xa8000 0x1000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-fman1_rx8: port@88000 {</div><div class='del'>-	cell-index = &lt;0x8&gt;;</div><div class='del'>-	compatible = "fsl,fman-v2-port-rx";</div><div class='del'>-	reg = &lt;0x88000 0x1000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ptp-timer: ptp_timer@fe000 {</div><div class='del'>-	compatible = "fsl,fman-ptp-timer";</div><div class='del'>-	reg = &lt;0xfe000 0x1000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ethernet@e0000 {</div><div class='del'>-	compatible = "fsl,fman-dtsec";</div><div class='del'>-	cell-index = &lt;0&gt;;</div><div class='del'>-	reg = &lt;0xe0000 0x1000&gt;;</div><div class='del'>-	fsl,fman-ports = &lt;&amp;fman1_rx8 &amp;fman1_tx28&gt;;</div><div class='del'>-	ptp-timer = &lt;&amp;ptp-timer&gt;;</div><div class='del'>-	tbi-handle = &lt;&amp;tbi0&gt;;</div><div class='del'>-};</div><div class='add'>+Refer to Documentation/devicetree/bindings/net/fsl,fman-dtsec.yaml</div><div class='ctx'> </div><div class='ctx'> ============================================================================</div><div class='ctx'> FMan IEEE 1588 Node</div><div class='hunk'>@@ -446,8 +320,9 @@ For internal PHY device on internal mdio bus, a PHY node should be created.</div><div class='ctx'> See the definition of the PHY node in booting-without-of.txt for an</div><div class='ctx'> example of how to define a PHY (Internal PHY has no interrupt line).</div><div class='ctx'> - For "fsl,fman-mdio" compatible internal mdio bus, the PHY is TBI PHY.</div><div class='del'>-- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY,</div><div class='del'>-  PCS PHY addr must be '0'.</div><div class='add'>+- For "fsl,fman-memac-mdio" compatible internal mdio bus, the PHY is PCS PHY.</div><div class='add'>+  The PCS PHY address should correspond to the value of the appropriate</div><div class='add'>+  MDEV_PORT.</div><div class='ctx'> </div><div class='ctx'> EXAMPLE</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ingenic,mac.yaml b/Documentation/devicetree/bindings/net/ingenic,mac.yaml<br/>index 8e52b2e683b8..bdea101c2f75 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ingenic,mac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ingenic,mac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ingenic,mac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ingenic,mac.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/ingenic,mac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for MAC in Ingenic SoCs</div><div class='add'>+title: MAC in Ingenic SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</div><div class='hunk'>@@ -37,6 +37,7 @@ properties:</div><div class='ctx'>     const: stmmaceth</div><div class='ctx'> </div><div class='ctx'>   mode-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: An extra syscon register that control ethernet interface and timing delay</div><div class='ctx'> </div><div class='ctx'>   rx-clk-delay-ps:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml<br/>index 52a7fa4f49a4..d23fa3771210 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel DWMAC glue layer Device Tree Bindings</div><div class='add'>+title: Intel DWMAC glue layer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vineetha G. Jaya Kumaran &lt;vineetha.g.jaya.kumaran@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml b/Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml<br/>index 8b9b3f915d92..f92730b1d2fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/intel,ixp46x-ptp-timer.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2018 Linaro Ltd.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/intel,ixp46x-ptp-timer.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/intel,ixp46x-ptp-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel IXP46x PTP Timer (TSYNC)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml b/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml<br/>index 4e1b79818aff..4fdc5328826c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/intel,ixp4xx-ethernet.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2018 Linaro Ltd.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/intel,ixp4xx-ethernet.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel IXP4xx ethernet</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='hunk'>@@ -28,7 +28,7 @@ properties:</div><div class='ctx'>     description: Ethernet MMIO address range</div><div class='ctx'> </div><div class='ctx'>   queue-rx:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the RX queue node</div><div class='hunk'>@@ -36,7 +36,7 @@ properties:</div><div class='ctx'>     description: phandle to the RX queue on the NPE</div><div class='ctx'> </div><div class='ctx'>   queue-txready:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the TX READY queue node</div><div class='hunk'>@@ -48,7 +48,7 @@ properties:</div><div class='ctx'>   phy-handle: true</div><div class='ctx'> </div><div class='ctx'>   intel,npe-handle:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the NPE this ethernet instance is using</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml b/Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml<br/>index e6329febb60c..7a405e9b37b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/intel,ixp4xx-hss.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2021 Linaro Ltd.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel IXP4xx V.35 WAN High Speed Serial Link (HSS)</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +24,7 @@ properties:</div><div class='ctx'>     description: The HSS instance</div><div class='ctx'> </div><div class='ctx'>   intel,npe-handle:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       items:</div><div class='ctx'>         - description: phandle to the NPE this HSS instance is using</div><div class='hunk'>@@ -33,7 +33,7 @@ properties:</div><div class='ctx'>       and the instance to use in the second cell</div><div class='ctx'> </div><div class='ctx'>   intel,queue-chl-rxtrig:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the RX trigger queue on the NPE</div><div class='hunk'>@@ -41,7 +41,7 @@ properties:</div><div class='ctx'>     description: phandle to the RX trigger queue on the NPE</div><div class='ctx'> </div><div class='ctx'>   intel,queue-chl-txready:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the TX ready queue on the NPE</div><div class='hunk'>@@ -49,7 +49,7 @@ properties:</div><div class='ctx'>     description: phandle to the TX ready queue on the NPE</div><div class='ctx'> </div><div class='ctx'>   intel,queue-pkt-rx:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the RX queue on the NPE</div><div class='hunk'>@@ -57,7 +57,7 @@ properties:</div><div class='ctx'>     description: phandle to the packet RX queue on the NPE</div><div class='ctx'> </div><div class='ctx'>   intel,queue-pkt-tx:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     maxItems: 4</div><div class='ctx'>     items:</div><div class='ctx'>       items:</div><div class='hunk'>@@ -66,7 +66,7 @@ properties:</div><div class='ctx'>     description: phandle to the packet TX0, TX1, TX2 and TX3 queues on the NPE</div><div class='ctx'> </div><div class='ctx'>   intel,queue-pkt-rxfree:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     maxItems: 4</div><div class='ctx'>     items:</div><div class='ctx'>       items:</div><div class='hunk'>@@ -76,7 +76,7 @@ properties:</div><div class='ctx'>       RXFREE3 queues on the NPE</div><div class='ctx'> </div><div class='ctx'>   intel,queue-pkt-txdone:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the TXDONE queue on the NPE</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell,dfx-server.yaml b/Documentation/devicetree/bindings/net/marvell,dfx-server.yaml<br/>new file mode 100644<br/>index 000000000000..8a14c919e3f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell,dfx-server.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/marvell,dfx-server.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/marvell,dfx-server.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Prestera DFX server</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: marvell,dfx-server</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: marvell,dfx-server</div><div class='add'>+      - const: simple-bus</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - ranges</div><div class='add'>+</div><div class='add'>+# The DFX server may expose clocks described as subnodes</div><div class='add'>+additionalProperties:</div><div class='add'>+  type: object</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+</div><div class='add'>+    #define MBUS_ID(target,attributes) (((target) &lt;&lt; 24) | ((attributes) &lt;&lt; 16))</div><div class='add'>+    bus@0 {</div><div class='add'>+        reg = &lt;0 0&gt;;</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        dfx-bus@ac000000 {</div><div class='add'>+            compatible = "marvell,dfx-server", "simple-bus";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            ranges = &lt;0 MBUS_ID(0x08, 0x00) 0 0x100000&gt;;</div><div class='add'>+            reg = &lt;MBUS_ID(0x08, 0x00) 0 0x100000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml<br/>index 8e288ab38fd7..3a3325168048 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell,mvusb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,mvusb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell,mvusb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/marvell,mvusb.yaml</a></div><div class='hunk'>@@ -20,7 +20,7 @@ description: |+</div><div class='ctx'>   definition.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mdio.yaml#"</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml b/Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml<br/>new file mode 100644<br/>index 000000000000..e35da8b01dc2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/marvell,orion-mdio.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/marvell,orion-mdio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell MDIO Ethernet Controller interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Ethernet controllers of the Marvel Kirkwood, Dove, Orion5x, MV78xx0,</div><div class='add'>+  Armada 370, Armada XP, Armada 7k and Armada 8k have an identical unit that</div><div class='add'>+  provides an interface with the MDIO bus. Additionally, Armada 7k and Armada</div><div class='add'>+  8k has a second unit which provides an interface with the xMDIO bus. This</div><div class='add'>+  driver handles these interfaces.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - marvell,orion-mdio</div><div class='add'>+      - marvell,xmdio</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - items:</div><div class='add'>+                - $ref: /schemas/types.yaml#/definitions/cell</div><div class='add'>+                - const: 0x84</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - items:</div><div class='add'>+                - $ref: /schemas/types.yaml#/definitions/cell</div><div class='add'>+                - enum:</div><div class='add'>+                    - 0x4</div><div class='add'>+                    - 0x10</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mdio@d0072004 {</div><div class='add'>+      compatible = "marvell,orion-mdio";</div><div class='add'>+      reg = &lt;0xd0072004 0x84&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      interrupts = &lt;30&gt;;</div><div class='add'>+</div><div class='add'>+      phy0: ethernet-phy@0 {</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      phy1: ethernet-phy@1 {</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell,pp2.yaml b/Documentation/devicetree/bindings/net/marvell,pp2.yaml<br/>new file mode 100644<br/>index 000000000000..4eadafc43d4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell,pp2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/marvell,pp2.yaml</a></div><div class='hunk'>@@ -0,0 +1,305 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/marvell,pp2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell CN913X / Marvell Armada 375, 7K, 8K Ethernet Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marcin Wojtas &lt;mw@semihalf.com&gt;</div><div class='add'>+  - Russell King &lt;linux@armlinux.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Marvell Armada 375 Ethernet Controller (PPv2.1)</div><div class='add'>+  Marvell Armada 7K/8K Ethernet Controller (PPv2.2)</div><div class='add'>+  Marvell CN913X Ethernet Controller (PPv2.3)</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - marvell,armada-375-pp2</div><div class='add'>+      - marvell,armada-7k-pp22</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: main controller clock</div><div class='add'>+      - description: GOP clock</div><div class='add'>+      - description: MG clock</div><div class='add'>+      - description: MG Core clock</div><div class='add'>+      - description: AXI clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: pp_clk</div><div class='add'>+      - const: gop_clk</div><div class='add'>+      - const: mg_clk</div><div class='add'>+      - const: mg_core_clk</div><div class='add'>+      - const: axi_clk</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  marvell,system-controller:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: a phandle to the system controller.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^(ethernet-)?port@[0-2]$':</div><div class='add'>+    type: object</div><div class='add'>+    description: subnode for each ethernet port.</div><div class='add'>+    $ref: ethernet-controller.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: ID of the port from the MAC point of view.</div><div class='add'>+        maximum: 2</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 10</div><div class='add'>+        description: interrupt(s) for the port</div><div class='add'>+</div><div class='add'>+      interrupt-names:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - const: hif0</div><div class='add'>+          - const: hif1</div><div class='add'>+          - const: hif2</div><div class='add'>+          - const: hif3</div><div class='add'>+          - const: hif4</div><div class='add'>+          - const: hif5</div><div class='add'>+          - const: hif6</div><div class='add'>+          - const: hif7</div><div class='add'>+          - const: hif8</div><div class='add'>+          - const: link</div><div class='add'>+</div><div class='add'>+        description: &gt;</div><div class='add'>+          if more than a single interrupt for is given, must be the</div><div class='add'>+          name associated to the interrupts listed. Valid names are:</div><div class='add'>+          "hifX", with X in [0..8], and "link". The names "tx-cpu0",</div><div class='add'>+          "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported</div><div class='add'>+          for backward compatibility but shouldn't be used for new</div><div class='add'>+          additions.</div><div class='add'>+</div><div class='add'>+      phys:</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 2</div><div class='add'>+        description: &gt;</div><div class='add'>+          Generic PHY, providing SerDes connectivity. For most modes,</div><div class='add'>+          one lane is sufficient, but some (e.g. RXAUI) may require two.</div><div class='add'>+</div><div class='add'>+      phy-mode:</div><div class='add'>+        enum:</div><div class='add'>+          - gmii</div><div class='add'>+          - sgmii</div><div class='add'>+          - rgmii-id</div><div class='add'>+          - 1000base-x</div><div class='add'>+          - 2500base-x</div><div class='add'>+          - 5gbase-r</div><div class='add'>+          - rxaui</div><div class='add'>+          - 10gbase-r</div><div class='add'>+</div><div class='add'>+      port-id:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        deprecated: true</div><div class='add'>+        description: &gt;</div><div class='add'>+          ID of the port from the MAC point of view.</div><div class='add'>+          Legacy binding for backward compatibility.</div><div class='add'>+</div><div class='add'>+      marvell,loopback:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description: port is loopback mode.</div><div class='add'>+</div><div class='add'>+      gop-port-id:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: &gt;</div><div class='add'>+          only for marvell,armada-7k-pp22, ID of the port from the</div><div class='add'>+          GOP (Group Of Ports) point of view. This ID is used to index the</div><div class='add'>+          per-port registers in the second register area.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - interrupts</div><div class='add'>+      - phy-mode</div><div class='add'>+      - port-id</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: marvell,armada-7k-pp22</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Packet Processor registers</div><div class='add'>+            - description: Networking interfaces registers</div><div class='add'>+            - description: CM3 address space used for TX Flow Control</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+</div><div class='add'>+      patternProperties:</div><div class='add'>+        '^(ethernet-)?port@[0-2]$':</div><div class='add'>+          required:</div><div class='add'>+            - gop-port-id</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - marvell,system-controller</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: Packet Processor registers</div><div class='add'>+            - description: LMS registers</div><div class='add'>+            - description: Register area per eth0</div><div class='add'>+            - description: Register area per eth1</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+      patternProperties:</div><div class='add'>+        '^(ethernet-)?port@[0-1]$':</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              maximum: 1</div><div class='add'>+</div><div class='add'>+            gop-port-id: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // For Armada 375 variant</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mvebu-icu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@f0000 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "marvell,armada-375-pp2";</div><div class='add'>+        reg = &lt;0xf0000 0xa000&gt;,</div><div class='add'>+              &lt;0xc0000 0x3060&gt;,</div><div class='add'>+              &lt;0xc4000 0x100&gt;,</div><div class='add'>+              &lt;0xc5000 0x100&gt;;</div><div class='add'>+        clocks = &lt;&amp;gateclk 3&gt;, &lt;&amp;gateclk 19&gt;;</div><div class='add'>+        clock-names = "pp_clk", "gop_clk";</div><div class='add'>+</div><div class='add'>+        ethernet-port@0 {</div><div class='add'>+            interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            port-id = &lt;0&gt;; /* For backward compatibility. */</div><div class='add'>+            phy = &lt;&amp;phy0&gt;;</div><div class='add'>+            phy-mode = "rgmii-id";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ethernet-port@1 {</div><div class='add'>+            interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            port-id = &lt;1&gt;; /* For backward compatibility. */</div><div class='add'>+            phy = &lt;&amp;phy3&gt;;</div><div class='add'>+            phy-mode = "gmii";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // For Armada 7k/8k and Cn913x variants</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mvebu-icu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@0 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "marvell,armada-7k-pp22";</div><div class='add'>+        reg = &lt;0x0 0x100000&gt;, &lt;0x129000 0xb000&gt;, &lt;0x220000 0x800&gt;;</div><div class='add'>+        clocks = &lt;&amp;cp0_clk 1 3&gt;, &lt;&amp;cp0_clk 1 9&gt;,</div><div class='add'>+                 &lt;&amp;cp0_clk 1 5&gt;, &lt;&amp;cp0_clk 1 6&gt;, &lt;&amp;cp0_clk 1 18&gt;;</div><div class='add'>+        clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";</div><div class='add'>+        marvell,system-controller = &lt;&amp;cp0_syscon0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-port@0 {</div><div class='add'>+            interrupts = &lt;ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",</div><div class='add'>+                              "hif5", "hif6", "hif7", "hif8", "link";</div><div class='add'>+            phy-mode = "10gbase-r";</div><div class='add'>+            phys = &lt;&amp;cp0_comphy4 0&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            port-id = &lt;0&gt;; /* For backward compatibility. */</div><div class='add'>+            gop-port-id = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ethernet-port@1 {</div><div class='add'>+            interrupts = &lt;ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",</div><div class='add'>+                              "hif5", "hif6", "hif7", "hif8", "link";</div><div class='add'>+            phy-mode = "rgmii-id";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            port-id = &lt;1&gt;; /* For backward compatibility. */</div><div class='add'>+            gop-port-id = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ethernet-port@2 {</div><div class='add'>+            interrupts = &lt;ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",</div><div class='add'>+                              "hif5", "hif6", "hif7", "hif8", "link";</div><div class='add'>+            phy-mode = "2500base-x";</div><div class='add'>+            managed = "in-band-status";</div><div class='add'>+            phys = &lt;&amp;cp0_comphy5 2&gt;;</div><div class='add'>+            sfp = &lt;&amp;sfp_eth3&gt;;</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            port-id = &lt;2&gt;; /* For backward compatibility. */</div><div class='add'>+            gop-port-id = &lt;3&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell,prestera.txt b/Documentation/devicetree/bindings/net/marvell,prestera.txt<br/>deleted file mode 100644<br/>index e28938ddfdf5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell,prestera.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell,prestera.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-Marvell Prestera Switch Chip bindings</div><div class='del'>--------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "marvell,prestera" and one of the following</div><div class='del'>-	"marvell,prestera-98dx3236",</div><div class='del'>-	"marvell,prestera-98dx3336",</div><div class='del'>-	"marvell,prestera-98dx4251",</div><div class='del'>-- reg: address and length of the register set for the device.</div><div class='del'>-- interrupts: interrupt for the device</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- dfx: phandle reference to the "DFX Server" node</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-switch {</div><div class='del'>-	compatible = "simple-bus";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;1&gt;;</div><div class='del'>-	ranges = &lt;0 MBUS_ID(0x03, 0x00) 0 0x100000&gt;;</div><div class='del'>-</div><div class='del'>-	packet-processor@0 {</div><div class='del'>-		compatible = "marvell,prestera-98dx3236", "marvell,prestera";</div><div class='del'>-		reg = &lt;0 0x4000000&gt;;</div><div class='del'>-		interrupts = &lt;33&gt;, &lt;34&gt;, &lt;35&gt;;</div><div class='del'>-		dfx = &lt;&amp;dfx&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-DFX Server bindings</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "marvell,dfx-server", "simple-bus"</div><div class='del'>-- ranges: describes the address mapping of a memory-mapped bus.</div><div class='del'>-- reg: address and length of the register set for the device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-dfx-server {</div><div class='del'>-	compatible = "marvell,dfx-server", "simple-bus";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;1&gt;;</div><div class='del'>-	ranges = &lt;0 MBUS_ID(0x08, 0x00) 0 0x100000&gt;;</div><div class='del'>-	reg = &lt;MBUS_ID(0x08, 0x00) 0 0x100000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Marvell Prestera SwitchDev bindings</div><div class='del'>------------------------------------</div><div class='del'>-Optional properties:</div><div class='del'>-- compatible: must be "marvell,prestera"</div><div class='del'>-- base-mac-provider: describes handle to node which provides base mac address,</div><div class='del'>-	might be a static base mac address or nvme cell provider.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-eeprom_mac_addr: eeprom-mac-addr {</div><div class='del'>-       compatible = "eeprom,mac-addr-cell";</div><div class='del'>-       status = "okay";</div><div class='del'>-</div><div class='del'>-       nvmem = &lt;&amp;eeprom_at24&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-prestera {</div><div class='del'>-       compatible = "marvell,prestera";</div><div class='del'>-       status = "okay";</div><div class='del'>-</div><div class='del'>-       base-mac-provider = &lt;&amp;eeprom_mac_addr&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-The current implementation of Prestera Switchdev PCI interface driver requires</div><div class='del'>-that BAR2 is assigned to 0xf6000000 as base address from the PCI IO range:</div><div class='del'>-</div><div class='del'>-&amp;cp0_pcie0 {</div><div class='del'>-	ranges = &lt;0x81000000 0x0 0xfb000000 0x0 0xfb000000 0x0 0xf0000</div><div class='del'>-		0x82000000 0x0 0xf6000000 0x0 0xf6000000 0x0 0x2000000</div><div class='del'>-		0x82000000 0x0 0xf9000000 0x0 0xf9000000 0x0 0x100000&gt;;</div><div class='del'>-	phys = &lt;&amp;cp0_comphy0 0&gt;;</div><div class='del'>-	status = "okay";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell,prestera.yaml b/Documentation/devicetree/bindings/net/marvell,prestera.yaml<br/>new file mode 100644<br/>index 000000000000..5ea8b73663a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell,prestera.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/marvell,prestera.yaml</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/marvell,prestera.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Prestera switch family</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - marvell,prestera-98dx3236</div><div class='add'>+              - marvell,prestera-98dx3336</div><div class='add'>+              - marvell,prestera-98dx4251</div><div class='add'>+          - const: marvell,prestera</div><div class='add'>+      - enum:</div><div class='add'>+          - pci11ab,c804</div><div class='add'>+          - pci11ab,c80c</div><div class='add'>+          - pci11ab,cc1e</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  dfx:</div><div class='add'>+    description: Reference to the DFX Server bus node.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  nvmem-cells: true</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names: true</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: marvell,prestera</div><div class='add'>+</div><div class='add'>+# Memory mapped AlleyCat3 family</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    nvmem-cells: false</div><div class='add'>+    nvmem-cell-names: false</div><div class='add'>+  required:</div><div class='add'>+    - interrupts</div><div class='add'>+</div><div class='add'>+# PCI Aldrin family</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    interrupts: false</div><div class='add'>+    dfx: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+# Ports can also be described</div><div class='add'>+additionalProperties:</div><div class='add'>+  type: object</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    packet-processor@0 {</div><div class='add'>+        compatible = "marvell,prestera-98dx3236", "marvell,prestera";</div><div class='add'>+        reg = &lt;0 0x4000000&gt;;</div><div class='add'>+        interrupts = &lt;33&gt;, &lt;34&gt;, &lt;35&gt;;</div><div class='add'>+        dfx = &lt;&amp;dfx&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    pcie@0 {</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+        reg = &lt;0x0 0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+        device_type = "pci";</div><div class='add'>+</div><div class='add'>+        switch@0,0 {</div><div class='add'>+            reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+            compatible = "pci11ab,c80c";</div><div class='add'>+            nvmem-cells = &lt;&amp;mac_address 0&gt;;</div><div class='add'>+            nvmem-cell-names = "mac-address";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell-bluetooth.yaml b/Documentation/devicetree/bindings/net/marvell-bluetooth.yaml<br/>index 309ef21a1e37..188a42ca6ceb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell-bluetooth.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell-bluetooth.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell-bluetooth.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/marvell-bluetooth.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/marvell-bluetooth.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/marvell-bluetooth.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Marvell Bluetooth chips</div><div class='ctx'> </div><div class='hunk'>@@ -15,11 +15,29 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mrvl,88w8897</div><div class='add'>+    enum:</div><div class='add'>+      - mrvl,88w8897</div><div class='add'>+      - mrvl,88w8997</div><div class='add'>+</div><div class='add'>+  max-speed:</div><div class='add'>+    description: see Documentation/devicetree/bindings/serial/serial.yaml</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mrvl,88w8997</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        max-speed: true</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        max-speed: false</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell-orion-mdio.txt b/Documentation/devicetree/bindings/net/marvell-orion-mdio.txt<br/>deleted file mode 100644<br/>index 3f3cfc1d8d4d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell-orion-mdio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell-orion-mdio.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,54 +0,0 @@</div><div class='del'>-* Marvell MDIO Ethernet Controller interface</div><div class='del'>-</div><div class='del'>-The Ethernet controllers of the Marvel Kirkwood, Dove, Orion5x,</div><div class='del'>-MV78xx0, Armada 370, Armada XP, Armada 7k and Armada 8k have an</div><div class='del'>-identical unit that provides an interface with the MDIO bus.</div><div class='del'>-Additionally, Armada 7k and Armada 8k has a second unit which</div><div class='del'>-provides an interface with the xMDIO bus. This driver handles</div><div class='del'>-these interfaces.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "marvell,orion-mdio" or "marvell,xmdio"</div><div class='del'>-- reg: address and length of the MDIO registers.  When an interrupt is</div><div class='del'>-  not present, the length is the size of the SMI register (4 bytes)</div><div class='del'>-  otherwise it must be 0x84 bytes to cover the interrupt control</div><div class='del'>-  registers.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts: interrupt line number for the SMI error/done interrupt</div><div class='del'>-- clocks: phandle for up to four required clocks for the MDIO instance</div><div class='del'>-</div><div class='del'>-The child nodes of the MDIO driver are the individual PHY devices</div><div class='del'>-connected to this MDIO bus. They must have a "reg" property given the</div><div class='del'>-PHY address on the MDIO bus.</div><div class='del'>-</div><div class='del'>-Example at the SoC level without an interrupt property:</div><div class='del'>-</div><div class='del'>-mdio {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	compatible = "marvell,orion-mdio";</div><div class='del'>-	reg = &lt;0xd0072004 0x4&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example with an interrupt property:</div><div class='del'>-</div><div class='del'>-mdio {</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	compatible = "marvell,orion-mdio";</div><div class='del'>-	reg = &lt;0xd0072004 0x84&gt;;</div><div class='del'>-	interrupts = &lt;30&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-And at the board level:</div><div class='del'>-</div><div class='del'>-mdio {</div><div class='del'>-	phy0: ethernet-phy@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	phy1: ethernet-phy@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/marvell-pp2.txt b/Documentation/devicetree/bindings/net/marvell-pp2.txt<br/>deleted file mode 100644<br/>index ce15c173f43f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/marvell-pp2.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/marvell-pp2.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,141 +0,0 @@</div><div class='del'>-* Marvell Armada 375 Ethernet Controller (PPv2.1)</div><div class='del'>-  Marvell Armada 7K/8K Ethernet Controller (PPv2.2)</div><div class='del'>-  Marvell CN913X Ethernet Controller (PPv2.3)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be one of:</div><div class='del'>-    "marvell,armada-375-pp2"</div><div class='del'>-    "marvell,armada-7k-pp2"</div><div class='del'>-- reg: addresses and length of the register sets for the device.</div><div class='del'>-  For "marvell,armada-375-pp2", must contain the following register</div><div class='del'>-  sets:</div><div class='del'>-	- common controller registers</div><div class='del'>-	- LMS registers</div><div class='del'>-	- one register area per Ethernet port</div><div class='del'>-  For "marvell,armada-7k-pp2" used by 7K/8K and CN913X, must contain the following register</div><div class='del'>-  sets:</div><div class='del'>-	- packet processor registers</div><div class='del'>-	- networking interfaces registers</div><div class='del'>-	- CM3 address space used for TX Flow Control</div><div class='del'>-</div><div class='del'>-- clocks: pointers to the reference clocks for this device, consequently:</div><div class='del'>-	- main controller clock (for both armada-375-pp2 and armada-7k-pp2)</div><div class='del'>-	- GOP clock (for both armada-375-pp2 and armada-7k-pp2)</div><div class='del'>-	- MG clock (only for armada-7k-pp2)</div><div class='del'>-	- MG Core clock (only for armada-7k-pp2)</div><div class='del'>-	- AXI clock (only for armada-7k-pp2)</div><div class='del'>-- clock-names: names of used clocks, must be "pp_clk", "gop_clk", "mg_clk",</div><div class='del'>-  "mg_core_clk" and "axi_clk" (the 3 latter only for armada-7k-pp2).</div><div class='del'>-</div><div class='del'>-The ethernet ports are represented by subnodes. At least one port is</div><div class='del'>-required.</div><div class='del'>-</div><div class='del'>-Required properties (port):</div><div class='del'>-</div><div class='del'>-- interrupts: interrupt(s) for the port</div><div class='del'>-- port-id: ID of the port from the MAC point of view</div><div class='del'>-- gop-port-id: only for marvell,armada-7k-pp2, ID of the port from the</div><div class='del'>-  GOP (Group Of Ports) point of view. This ID is used to index the</div><div class='del'>-  per-port registers in the second register area.</div><div class='del'>-- phy-mode: See ethernet.txt file in the same directory</div><div class='del'>-</div><div class='del'>-Optional properties (port):</div><div class='del'>-</div><div class='del'>-- marvell,loopback: port is loopback mode</div><div class='del'>-- phy: a phandle to a phy node defining the PHY address (as the reg</div><div class='del'>-  property, a single integer).</div><div class='del'>-- interrupt-names: if more than a single interrupt for is given, must be the</div><div class='del'>-                   name associated to the interrupts listed. Valid names are:</div><div class='del'>-                   "hifX", with X in [0..8], and "link". The names "tx-cpu0",</div><div class='del'>-                   "tx-cpu1", "tx-cpu2", "tx-cpu3" and "rx-shared" are supported</div><div class='del'>-                   for backward compatibility but shouldn't be used for new</div><div class='del'>-                   additions.</div><div class='del'>-- marvell,system-controller: a phandle to the system controller.</div><div class='del'>-</div><div class='del'>-Example for marvell,armada-375-pp2:</div><div class='del'>-</div><div class='del'>-ethernet@f0000 {</div><div class='del'>-	compatible = "marvell,armada-375-pp2";</div><div class='del'>-	reg = &lt;0xf0000 0xa000&gt;,</div><div class='del'>-	      &lt;0xc0000 0x3060&gt;,</div><div class='del'>-	      &lt;0xc4000 0x100&gt;,</div><div class='del'>-	      &lt;0xc5000 0x100&gt;;</div><div class='del'>-	clocks = &lt;&amp;gateclk 3&gt;, &lt;&amp;gateclk 19&gt;;</div><div class='del'>-	clock-names = "pp_clk", "gop_clk";</div><div class='del'>-</div><div class='del'>-	eth0: eth0@c4000 {</div><div class='del'>-		interrupts = &lt;GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		port-id = &lt;0&gt;;</div><div class='del'>-		phy = &lt;&amp;phy0&gt;;</div><div class='del'>-		phy-mode = "gmii";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eth1: eth1@c5000 {</div><div class='del'>-		interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		port-id = &lt;1&gt;;</div><div class='del'>-		phy = &lt;&amp;phy3&gt;;</div><div class='del'>-		phy-mode = "gmii";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example for marvell,armada-7k-pp2:</div><div class='del'>-</div><div class='del'>-cpm_ethernet: ethernet@0 {</div><div class='del'>-	compatible = "marvell,armada-7k-pp22";</div><div class='del'>-	reg = &lt;0x0 0x100000&gt;, &lt;0x129000 0xb000&gt;, &lt;0x220000 0x800&gt;;</div><div class='del'>-	clocks = &lt;&amp;cpm_syscon0 1 3&gt;, &lt;&amp;cpm_syscon0 1 9&gt;,</div><div class='del'>-		 &lt;&amp;cpm_syscon0 1 5&gt;, &lt;&amp;cpm_syscon0 1 6&gt;, &lt;&amp;cpm_syscon0 1 18&gt;;</div><div class='del'>-	clock-names = "pp_clk", "gop_clk", "mg_clk", "mg_core_clk", "axi_clk";</div><div class='del'>-</div><div class='del'>-	eth0: eth0 {</div><div class='del'>-		interrupts = &lt;ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 59 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 63 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 67 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",</div><div class='del'>-				  "hif5", "hif6", "hif7", "hif8", "link";</div><div class='del'>-		port-id = &lt;0&gt;;</div><div class='del'>-		gop-port-id = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eth1: eth1 {</div><div class='del'>-		interrupts = &lt;ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 60 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 64 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",</div><div class='del'>-				  "hif5", "hif6", "hif7", "hif8", "link";</div><div class='del'>-		port-id = &lt;1&gt;;</div><div class='del'>-		gop-port-id = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	eth2: eth2 {</div><div class='del'>-		interrupts = &lt;ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 61 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 65 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;ICU_GRP_NSR 127 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		interrupt-names = "hif0", "hif1", "hif2", "hif3", "hif4",</div><div class='del'>-				  "hif5", "hif6", "hif7", "hif8", "link";</div><div class='del'>-		port-id = &lt;2&gt;;</div><div class='del'>-		gop-port-id = &lt;3&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml b/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml<br/>new file mode 100644<br/>index 000000000000..d71fa9de2b64<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/maxlinear,gpy2xx.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/maxlinear,gpy2xx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MaxLinear GPY2xx PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='add'>+  - Michael Walle &lt;michael@walle.cc&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-phy.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  maxlinear,use-broken-interrupts:</div><div class='add'>+    description: |</div><div class='add'>+      Interrupts are broken on some GPY2xx PHYs in that they keep the</div><div class='add'>+      interrupt line asserted even after the interrupt status register is</div><div class='add'>+      cleared. Thus it is blocking the interrupt line which is usually bad</div><div class='add'>+      for shared lines. By default interrupts are disabled for this PHY and</div><div class='add'>+      polling mode is used. If one can live with the consequences, this</div><div class='add'>+      property can be used to enable interrupt handling.</div><div class='add'>+</div><div class='add'>+      Affected PHYs (as far as known) are GPY215B and GPY215C.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  maxlinear,use-broken-interrupts: [ interrupts ]</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ethernet {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-phy@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            interrupts-extended = &lt;&amp;intc 0&gt;;</div><div class='add'>+            maxlinear,use-broken-interrupts;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml b/Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml<br/>index afd11c9422fa..8438af53c5c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mctp-i2c-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/mctp-i2c-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MCTP I2C transport binding</div><div class='add'>+title: MCTP I2C transport</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Matt Johnston &lt;matt@codeconstruct.com.au&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mdio-gpio.yaml b/Documentation/devicetree/bindings/net/mdio-gpio.yaml<br/>index 1d83b8dcce2c..eb4171a1940e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mdio-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mdio-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mdio-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mdio-gpio.yaml</a></div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'>   - Russell King &lt;linux@armlinux.org.uk&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mdio.yaml#"</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -33,8 +33,8 @@ properties:</div><div class='ctx'>       - description: MDIO</div><div class='ctx'>       - description: MDO</div><div class='ctx'> </div><div class='del'>-#Note: Each gpio-mdio bus should have an alias correctly numbered in "aliases"</div><div class='del'>-#node.</div><div class='add'>+# Note: Each gpio-mdio bus should have an alias correctly numbered in "aliases"</div><div class='add'>+# node.</div><div class='ctx'> additionalProperties:</div><div class='ctx'>   type: object</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt b/Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt<br/>deleted file mode 100644<br/>index 3a96cbed9294..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mdio-mux-meson-g12a.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-Properties for the MDIO bus multiplexer/glue of Amlogic G12a SoC family.</div><div class='del'>-</div><div class='del'>-This is a special case of a MDIO bus multiplexer. It allows to choose between</div><div class='del'>-the internal mdio bus leading to the embedded 10/100 PHY or the external</div><div class='del'>-MDIO bus.</div><div class='del'>-</div><div class='del'>-Required properties in addition to the generic multiplexer properties:</div><div class='del'>-- compatible : amlogic,g12a-mdio-mux</div><div class='del'>-- reg: physical address and length of the multiplexer/glue registers</div><div class='del'>-- clocks: list of clock phandle, one for each entry clock-names.</div><div class='del'>-- clock-names: should contain the following:</div><div class='del'>-  * "pclk"   : peripheral clock.</div><div class='del'>-  * "clkin0" : platform crytal</div><div class='del'>-  * "clkin1" : SoC 50MHz MPLL</div><div class='del'>-</div><div class='del'>-Example :</div><div class='del'>-</div><div class='del'>-mdio_mux: mdio-multiplexer@4c000 {</div><div class='del'>-	compatible = "amlogic,g12a-mdio-mux";</div><div class='del'>-	reg = &lt;0x0 0x4c000 0x0 0xa4&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc CLKID_ETH_PHY&gt;,</div><div class='del'>-		 &lt;&amp;xtal&gt;,</div><div class='del'>-		 &lt;&amp;clkc CLKID_MPLL_5OM&gt;;</div><div class='del'>-	clock-names = "pclk", "clkin0", "clkin1";</div><div class='del'>-	mdio-parent-bus = &lt;&amp;mdio0&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	ext_mdio: mdio@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	int_mdio: mdio@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		internal_ephy: ethernet-phy@8 {</div><div class='del'>-			compatible = "ethernet-phy-id0180.3301",</div><div class='del'>-				     "ethernet-phy-ieee802.3-c22";</div><div class='del'>-			interrupts = &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-			reg = &lt;8&gt;;</div><div class='del'>-			max-speed = &lt;100&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mdio.yaml b/Documentation/devicetree/bindings/net/mdio.yaml<br/>index b5706d4e7e38..a266ade918ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mdio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mdio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mdio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/mdio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MDIO Bus Generic Binding</div><div class='add'>+title: MDIO Bus Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andrew Lunn &lt;andrew@lunn.ch&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt b/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt<br/>deleted file mode 100644<br/>index 358fed2fab43..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek,mt7620-gsw.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-Mediatek Gigabit Switch</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-The mediatek gigabit switch can be found on Mediatek SoCs (mt7620, mt7621).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "mediatek,mt7620-gsw" or "mediatek,mt7621-gsw"</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain the gigabit switches interrupt</div><div class='del'>-- resets: Should contain the gigabit switches resets</div><div class='del'>-- reset-names: Should contain the reset names "gsw"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-gsw@10110000 {</div><div class='del'>-	compatible = "ralink,mt7620-gsw";</div><div class='del'>-	reg = &lt;0x10110000 8000&gt;;</div><div class='del'>-</div><div class='del'>-	resets = &lt;&amp;rstctrl 23&gt;;</div><div class='del'>-	reset-names = "gsw";</div><div class='del'>-</div><div class='del'>-	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	interrupts = &lt;17&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mediatek,net.yaml b/Documentation/devicetree/bindings/net/mediatek,net.yaml<br/>new file mode 100644<br/>index 000000000000..acb2b2ac4fe1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mediatek,net.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mediatek,net.yaml</a></div><div class='hunk'>@@ -0,0 +1,489 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/mediatek,net.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Frame Engine Ethernet controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+  - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs</div><div class='add'>+  have dual GMAC ports.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt2701-eth</div><div class='add'>+      - mediatek,mt7623-eth</div><div class='add'>+      - mediatek,mt7622-eth</div><div class='add'>+      - mediatek,mt7629-eth</div><div class='add'>+      - mediatek,mt7981-eth</div><div class='add'>+      - mediatek,mt7986-eth</div><div class='add'>+      - ralink,rt5350-eth</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks: true</div><div class='add'>+  clock-names: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fe</div><div class='add'>+      - const: gmac</div><div class='add'>+      - const: ppe</div><div class='add'>+</div><div class='add'>+  mediatek,ethsys:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon node that handles the port setup.</div><div class='add'>+</div><div class='add'>+  cci-control-port: true</div><div class='add'>+</div><div class='add'>+  mediatek,hifsys:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the mediatek hifsys controller used to provide various clocks</div><div class='add'>+      and reset to the system.</div><div class='add'>+</div><div class='add'>+  mediatek,sgmiisys:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      A list of phandle to the syscon node that handles the SGMII setup which is required for</div><div class='add'>+      those SoCs equipped with SGMII.</div><div class='add'>+</div><div class='add'>+  mediatek,wed:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      List of phandles to wireless ethernet dispatch nodes.</div><div class='add'>+</div><div class='add'>+  mediatek,wed-pcie:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the mediatek wed-pcie controller.</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  mdio-bus:</div><div class='add'>+    $ref: mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt2701-eth</div><div class='add'>+              - mediatek,mt7623-eth</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ethif</div><div class='add'>+            - const: esw</div><div class='add'>+            - const: gp1</div><div class='add'>+            - const: gp2</div><div class='add'>+</div><div class='add'>+        mediatek,pctl:</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+          description:</div><div class='add'>+            Phandle to the syscon node that handles the ports slew rate and</div><div class='add'>+            driver current.</div><div class='add'>+</div><div class='add'>+        mediatek,wed: false</div><div class='add'>+</div><div class='add'>+        mediatek,wed-pcie: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt7622-eth</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 11</div><div class='add'>+          maxItems: 11</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ethif</div><div class='add'>+            - const: esw</div><div class='add'>+            - const: gp0</div><div class='add'>+            - const: gp1</div><div class='add'>+            - const: gp2</div><div class='add'>+            - const: sgmii_tx250m</div><div class='add'>+            - const: sgmii_rx250m</div><div class='add'>+            - const: sgmii_cdr_ref</div><div class='add'>+            - const: sgmii_cdr_fb</div><div class='add'>+            - const: sgmii_ck</div><div class='add'>+            - const: eth2pll</div><div class='add'>+</div><div class='add'>+        mediatek,sgmiisys:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        mediatek,pcie-mirror:</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+          description:</div><div class='add'>+            Phandle to the mediatek pcie-mirror controller.</div><div class='add'>+</div><div class='add'>+        mediatek,wed-pcie: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt7629-eth</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 17</div><div class='add'>+          maxItems: 17</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ethif</div><div class='add'>+            - const: sgmiitop</div><div class='add'>+            - const: esw</div><div class='add'>+            - const: gp0</div><div class='add'>+            - const: gp1</div><div class='add'>+            - const: gp2</div><div class='add'>+            - const: fe</div><div class='add'>+            - const: sgmii_tx250m</div><div class='add'>+            - const: sgmii_rx250m</div><div class='add'>+            - const: sgmii_cdr_ref</div><div class='add'>+            - const: sgmii_cdr_fb</div><div class='add'>+            - const: sgmii2_tx250m</div><div class='add'>+            - const: sgmii2_rx250m</div><div class='add'>+            - const: sgmii2_cdr_ref</div><div class='add'>+            - const: sgmii2_cdr_fb</div><div class='add'>+            - const: sgmii_ck</div><div class='add'>+            - const: eth2pll</div><div class='add'>+</div><div class='add'>+        mediatek,infracfg:</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+          description:</div><div class='add'>+            Phandle to the syscon node that handles the path from GMAC to</div><div class='add'>+            PHY variants.</div><div class='add'>+</div><div class='add'>+        mediatek,sgmiisys:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        mediatek,wed: false</div><div class='add'>+</div><div class='add'>+        mediatek,wed-pcie: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt7981-eth</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 4</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 15</div><div class='add'>+          maxItems: 15</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: fe</div><div class='add'>+            - const: gp2</div><div class='add'>+            - const: gp1</div><div class='add'>+            - const: wocpu0</div><div class='add'>+            - const: sgmii_ck</div><div class='add'>+            - const: sgmii_tx250m</div><div class='add'>+            - const: sgmii_rx250m</div><div class='add'>+            - const: sgmii_cdr_ref</div><div class='add'>+            - const: sgmii_cdr_fb</div><div class='add'>+            - const: sgmii2_tx250m</div><div class='add'>+            - const: sgmii2_rx250m</div><div class='add'>+            - const: sgmii2_cdr_ref</div><div class='add'>+            - const: sgmii2_cdr_fb</div><div class='add'>+            - const: netsys0</div><div class='add'>+            - const: netsys1</div><div class='add'>+</div><div class='add'>+        mediatek,sgmiisys:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt7986-eth</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 4</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 15</div><div class='add'>+          maxItems: 15</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: fe</div><div class='add'>+            - const: gp2</div><div class='add'>+            - const: gp1</div><div class='add'>+            - const: wocpu1</div><div class='add'>+            - const: wocpu0</div><div class='add'>+            - const: sgmii_tx250m</div><div class='add'>+            - const: sgmii_rx250m</div><div class='add'>+            - const: sgmii_cdr_ref</div><div class='add'>+            - const: sgmii_cdr_fb</div><div class='add'>+            - const: sgmii2_tx250m</div><div class='add'>+            - const: sgmii2_rx250m</div><div class='add'>+            - const: sgmii2_cdr_ref</div><div class='add'>+            - const: sgmii2_cdr_fb</div><div class='add'>+            - const: netsys0</div><div class='add'>+            - const: netsys1</div><div class='add'>+</div><div class='add'>+        mediatek,sgmiisys:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^mac@[0-1]$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: ethernet-controller.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Ethernet MAC node</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: mediatek,eth-mac</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      phy-handle: true</div><div class='add'>+</div><div class='add'>+      phy-mode: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - compatible</div><div class='add'>+      - phy-handle</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - mediatek,ethsys</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt7622-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt7622-power.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      ethernet: ethernet@1b100000 {</div><div class='add'>+        compatible = "mediatek,mt7622-eth";</div><div class='add'>+        reg = &lt;0 0x1b100000 0 0x20000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 223 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                     &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                     &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        clocks = &lt;&amp;topckgen CLK_TOP_ETH_SEL&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_ESW_EN&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_GP0_EN&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_GP1_EN&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_GP2_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys CLK_SGMII_TX250M_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys CLK_SGMII_RX250M_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys CLK_SGMII_CDR_REF&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys CLK_SGMII_CDR_FB&gt;,</div><div class='add'>+                 &lt;&amp;topckgen CLK_TOP_SGMIIPLL&gt;,</div><div class='add'>+                 &lt;&amp;apmixedsys CLK_APMIXED_ETH2PLL&gt;;</div><div class='add'>+        clock-names = "ethif", "esw", "gp0", "gp1", "gp2",</div><div class='add'>+                      "sgmii_tx250m", "sgmii_rx250m",</div><div class='add'>+                      "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck",</div><div class='add'>+                      "eth2pll";</div><div class='add'>+        power-domains = &lt;&amp;scpsys MT7622_POWER_DOMAIN_ETHSYS&gt;;</div><div class='add'>+        mediatek,ethsys = &lt;&amp;ethsys&gt;;</div><div class='add'>+        mediatek,sgmiisys = &lt;&amp;sgmiisys&gt;;</div><div class='add'>+        cci-control-port = &lt;&amp;cci_control2&gt;;</div><div class='add'>+        mediatek,pcie-mirror = &lt;&amp;pcie_mirror&gt;;</div><div class='add'>+        mediatek,hifsys = &lt;&amp;hifsys&gt;;</div><div class='add'>+        dma-coherent;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        mdio0: mdio-bus {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          phy0: ethernet-phy@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          phy1: ethernet-phy@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        gmac0: mac@0 {</div><div class='add'>+          compatible = "mediatek,eth-mac";</div><div class='add'>+          phy-mode = "rgmii";</div><div class='add'>+          phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        gmac1: mac@1 {</div><div class='add'>+          compatible = "mediatek,eth-mac";</div><div class='add'>+          phy-mode = "rgmii";</div><div class='add'>+          phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt7622-clk.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      eth: ethernet@15100000 {</div><div class='add'>+        #define CLK_ETH_FE_EN               0</div><div class='add'>+        #define CLK_ETH_WOCPU1_EN           3</div><div class='add'>+        #define CLK_ETH_WOCPU0_EN           4</div><div class='add'>+        #define CLK_TOP_NETSYS_SEL          43</div><div class='add'>+        #define CLK_TOP_NETSYS_500M_SEL     44</div><div class='add'>+        #define CLK_TOP_NETSYS_2X_SEL       46</div><div class='add'>+        #define CLK_TOP_SGM_325M_SEL        47</div><div class='add'>+        #define CLK_APMIXED_NET2PLL         1</div><div class='add'>+        #define CLK_APMIXED_SGMPLL          3</div><div class='add'>+</div><div class='add'>+        compatible = "mediatek,mt7986-eth";</div><div class='add'>+        reg = &lt;0 0x15100000 0 0x80000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;ethsys CLK_ETH_FE_EN&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_GP2_EN&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_GP1_EN&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_WOCPU1_EN&gt;,</div><div class='add'>+                 &lt;&amp;ethsys CLK_ETH_WOCPU0_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys0 CLK_SGMII_TX250M_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys0 CLK_SGMII_RX250M_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys0 CLK_SGMII_CDR_REF&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys0 CLK_SGMII_CDR_FB&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys1 CLK_SGMII_TX250M_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys1 CLK_SGMII_RX250M_EN&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys1 CLK_SGMII_CDR_REF&gt;,</div><div class='add'>+                 &lt;&amp;sgmiisys1 CLK_SGMII_CDR_FB&gt;,</div><div class='add'>+                 &lt;&amp;topckgen CLK_TOP_NETSYS_SEL&gt;,</div><div class='add'>+                 &lt;&amp;topckgen CLK_TOP_NETSYS_SEL&gt;;</div><div class='add'>+        clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0",</div><div class='add'>+                      "sgmii_tx250m", "sgmii_rx250m",</div><div class='add'>+                      "sgmii_cdr_ref", "sgmii_cdr_fb",</div><div class='add'>+                      "sgmii2_tx250m", "sgmii2_rx250m",</div><div class='add'>+                      "sgmii2_cdr_ref", "sgmii2_cdr_fb",</div><div class='add'>+                      "netsys0", "netsys1";</div><div class='add'>+        mediatek,ethsys = &lt;&amp;ethsys&gt;;</div><div class='add'>+        mediatek,sgmiisys = &lt;&amp;sgmiisys0&gt;, &lt;&amp;sgmiisys1&gt;;</div><div class='add'>+        assigned-clocks = &lt;&amp;topckgen CLK_TOP_NETSYS_2X_SEL&gt;,</div><div class='add'>+                          &lt;&amp;topckgen CLK_TOP_SGM_325M_SEL&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;apmixedsys CLK_APMIXED_NET2PLL&gt;,</div><div class='add'>+                                 &lt;&amp;apmixedsys CLK_APMIXED_SGMPLL&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        mdio: mdio-bus {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          phy5: ethernet-phy@0 {</div><div class='add'>+            compatible = "ethernet-phy-id67c9.de0a";</div><div class='add'>+            phy-mode = "2500base-x";</div><div class='add'>+            reset-gpios = &lt;&amp;pio 6 1&gt;;</div><div class='add'>+            reset-deassert-us = &lt;20000&gt;;</div><div class='add'>+            reg = &lt;5&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          phy6: ethernet-phy@1 {</div><div class='add'>+            compatible = "ethernet-phy-id67c9.de0a";</div><div class='add'>+            phy-mode = "2500base-x";</div><div class='add'>+            reg = &lt;6&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mac0: mac@0 {</div><div class='add'>+          compatible = "mediatek,eth-mac";</div><div class='add'>+          phy-mode = "2500base-x";</div><div class='add'>+          phy-handle = &lt;&amp;phy5&gt;;</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mac1: mac@1 {</div><div class='add'>+          compatible = "mediatek,eth-mac";</div><div class='add'>+          phy-mode = "2500base-x";</div><div class='add'>+          phy-handle = &lt;&amp;phy6&gt;;</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml b/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml<br/>index def994c9cbb4..2e889f9a563e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek,star-emac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mediatek,star-emac.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ description:</div><div class='ctx'>   modes with flow-control as well as CRC offloading and VLAN tags.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>       - mediatek,mt8516-eth</div><div class='ctx'>       - mediatek,mt8518-eth</div><div class='ctx'>       - mediatek,mt8175-eth</div><div class='add'>+      - mediatek,mt8365-eth</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -47,6 +48,22 @@ properties:</div><div class='ctx'>       Phandle to the device containing the PERICFG register range. This is used</div><div class='ctx'>       to control the MII mode.</div><div class='ctx'> </div><div class='add'>+  mediatek,rmii-rxc:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, indicates that the RMII reference clock, which is from external</div><div class='add'>+      PHYs, is connected to RXC pin. Otherwise, is connected to TXC pin.</div><div class='add'>+</div><div class='add'>+  mediatek,rxc-inverse:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, indicates that clock on RXC pad will be inversed.</div><div class='add'>+</div><div class='add'>+  mediatek,txc-inverse:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, indicates that clock on TXC pad will be inversed.</div><div class='add'>+</div><div class='ctx'>   mdio:</div><div class='ctx'>     $ref: mdio.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml<br/>index 901944683322..0fa2132fa4f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mediatek-dwmac.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ select:</div><div class='ctx'>       contains:</div><div class='ctx'>         enum:</div><div class='ctx'>           - mediatek,mt2712-gmac</div><div class='add'>+          - mediatek,mt8188-gmac</div><div class='ctx'>           - mediatek,mt8195-gmac</div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='hunk'>@@ -37,6 +38,11 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt8195-gmac</div><div class='ctx'>           - const: snps,dwmac-5.10a</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8188-gmac</div><div class='add'>+          - const: mediatek,mt8195-gmac</div><div class='add'>+          - const: snps,dwmac-5.10a</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 5</div><div class='hunk'>@@ -58,6 +64,9 @@ properties:</div><div class='ctx'>       - const: rmii_internal</div><div class='ctx'>       - const: mac_cg</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   mediatek,pericfg:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='hunk'>@@ -71,7 +80,7 @@ properties:</div><div class='ctx'>       or will round down. Range 0~31*170.</div><div class='ctx'>       For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,</div><div class='ctx'>       or will round down. Range 0~31*550.</div><div class='del'>-      For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,</div><div class='add'>+      For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple of 290,</div><div class='ctx'>       or will round down. Range 0~31*290.</div><div class='ctx'> </div><div class='ctx'>   mediatek,rx-delay-ps:</div><div class='hunk'>@@ -81,7 +90,7 @@ properties:</div><div class='ctx'>       or will round down. Range 0~31*170.</div><div class='ctx'>       For MT2712 RMII/MII interface, Allowed value need to be a multiple of 550,</div><div class='ctx'>       or will round down. Range 0~31*550.</div><div class='del'>-      For MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple</div><div class='add'>+      For MT8188/MT8195 RGMII/RMII/MII interface, Allowed value need to be a multiple</div><div class='ctx'>       of 290, or will round down. Range 0~31*290.</div><div class='ctx'> </div><div class='ctx'>   mediatek,rmii-rxc:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mediatek-net.txt b/Documentation/devicetree/bindings/net/mediatek-net.txt<br/>deleted file mode 100644<br/>index 72d03e07cf7c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mediatek-net.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mediatek-net.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,98 +0,0 @@</div><div class='del'>-MediaTek Frame Engine Ethernet controller</div><div class='del'>-=========================================</div><div class='del'>-</div><div class='del'>-The frame engine ethernet controller can be found on MediaTek SoCs. These SoCs</div><div class='del'>-have dual GMAC each represented by a child node..</div><div class='del'>-</div><div class='del'>-* Ethernet controller node</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be</div><div class='del'>-		"mediatek,mt2701-eth": for MT2701 SoC</div><div class='del'>-		"mediatek,mt7623-eth", "mediatek,mt2701-eth": for MT7623 SoC</div><div class='del'>-		"mediatek,mt7622-eth": for MT7622 SoC</div><div class='del'>-		"mediatek,mt7629-eth": for MT7629 SoC</div><div class='del'>-		"ralink,rt5350-eth": for Ralink Rt5350F and MT7628/88 SoC</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain the three frame engines interrupts in numeric</div><div class='del'>-	order. These are fe_int0, fe_int1 and fe_int2.</div><div class='del'>-- clocks: the clock used by the core</div><div class='del'>-- clock-names: the names of the clock listed in the clocks property. These are</div><div class='del'>-	"ethif", "esw", "gp2", "gp1" : For MT2701 and MT7623 SoC</div><div class='del'>-        "ethif", "esw", "gp0", "gp1", "gp2", "sgmii_tx250m", "sgmii_rx250m",</div><div class='del'>-	"sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", "eth2pll" : For MT7622 SoC</div><div class='del'>-	"ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "sgmii_tx250m",</div><div class='del'>-	"sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii2_tx250m",</div><div class='del'>-	"sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb", "sgmii_ck",</div><div class='del'>-	"eth2pll" : For MT7629 SoC.</div><div class='del'>-- power-domains: phandle to the power domain that the ethernet is part of</div><div class='del'>-- resets: Should contain phandles to the ethsys reset signals</div><div class='del'>-- reset-names: Should contain the names of reset signal listed in the resets</div><div class='del'>-		property</div><div class='del'>-		These are "fe", "gmac" and "ppe"</div><div class='del'>-- mediatek,ethsys: phandle to the syscon node that handles the port setup</div><div class='del'>-- mediatek,infracfg: phandle to the syscon node that handles the path from</div><div class='del'>-	GMAC to PHY variants, which is required for MT7629 SoC.</div><div class='del'>-- mediatek,sgmiisys: a list of phandles to the syscon node that handles the</div><div class='del'>-	SGMII setup which is required for those SoCs equipped with SGMII such</div><div class='del'>-	as MT7622 and MT7629 SoC. And MT7622 have only one set of SGMII shared</div><div class='del'>-	by GMAC1 and GMAC2; MT7629 have two independent sets of SGMII directed</div><div class='del'>-	to GMAC1 and GMAC2, respectively.</div><div class='del'>-- mediatek,pctl: phandle to the syscon node that handles the ports slew rate</div><div class='del'>-	and driver current: only for MT2701 and MT7623 SoC</div><div class='del'>-</div><div class='del'>-* Ethernet MAC node</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "mediatek,eth-mac"</div><div class='del'>-- reg: The number of the MAC</div><div class='del'>-- phy-handle: see ethernet.txt file in the same directory and</div><div class='del'>-	the phy-mode "trgmii" required being provided when reg</div><div class='del'>-	is equal to 0 and the MAC uses fixed-link to connect</div><div class='del'>-	with internal switch such as MT7530.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-eth: ethernet@1b100000 {</div><div class='del'>-	compatible = "mediatek,mt7623-eth";</div><div class='del'>-	reg = &lt;0 0x1b100000 0 0x20000&gt;;</div><div class='del'>-	clocks = &lt;&amp;topckgen CLK_TOP_ETHIF_SEL&gt;,</div><div class='del'>-		 &lt;&amp;ethsys CLK_ETHSYS_ESW&gt;,</div><div class='del'>-		 &lt;&amp;ethsys CLK_ETHSYS_GP2&gt;,</div><div class='del'>-		 &lt;&amp;ethsys CLK_ETHSYS_GP1&gt;;</div><div class='del'>-	clock-names = "ethif", "esw", "gp2", "gp1";</div><div class='del'>-	interrupts = &lt;GIC_SPI 200 IRQ_TYPE_LEVEL_LOW</div><div class='del'>-		      GIC_SPI 199 IRQ_TYPE_LEVEL_LOW</div><div class='del'>-		      GIC_SPI 198 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-	power-domains = &lt;&amp;scpsys MT2701_POWER_DOMAIN_ETH&gt;;</div><div class='del'>-	resets = &lt;&amp;ethsys MT2701_ETHSYS_ETH_RST&gt;;</div><div class='del'>-	reset-names = "eth";</div><div class='del'>-	mediatek,ethsys = &lt;&amp;ethsys&gt;;</div><div class='del'>-	mediatek,pctl = &lt;&amp;syscfg_pctl_a&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	gmac1: mac@0 {</div><div class='del'>-		compatible = "mediatek,eth-mac";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		phy-handle = &lt;&amp;phy0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	gmac2: mac@1 {</div><div class='del'>-		compatible = "mediatek,eth-mac";</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		phy-handle = &lt;&amp;phy1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	mdio-bus {</div><div class='del'>-		phy0: ethernet-phy@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		phy1: ethernet-phy@1 {</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-			phy-mode = "rgmii";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/micrel,ks8851.yaml b/Documentation/devicetree/bindings/net/micrel,ks8851.yaml<br/>index 5aa7cf2eacb1..b44d83554ef5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/micrel,ks8851.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/micrel,ks8851.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/micrel,ks8851.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/micrel,ks8851.yaml</a></div><div class='hunk'>@@ -44,6 +44,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: ethernet-controller.yaml#</div><div class='add'>+  - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt b/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt<br/>index df9e844dd6bc..2681168777a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/micrel-ksz90x1.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/micrel-ksz90x1.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/micrel-ksz90x1.txt</a></div><div class='hunk'>@@ -158,6 +158,7 @@ KSZ9031:</div><div class='ctx'>         no link will be established.</div><div class='ctx'> </div><div class='ctx'> KSZ9131:</div><div class='add'>+LAN8841:</div><div class='ctx'> </div><div class='ctx'>   All skew control options are specified in picoseconds. The increment</div><div class='ctx'>   step is 100ps. Unlike KSZ9031, the values represent picoseccond delays.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/micrel.txt b/Documentation/devicetree/bindings/net/micrel.txt<br/>index c5ab62c39133..a407dd1b4614 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/micrel.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/micrel.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/micrel.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/micrel.txt</a></div><div class='hunk'>@@ -16,6 +16,7 @@ Optional properties:</div><div class='ctx'> 	KSZ8051: register 0x1f, bits 5..4</div><div class='ctx'> 	KSZ8081: register 0x1f, bits 5..4</div><div class='ctx'> 	KSZ8091: register 0x1f, bits 5..4</div><div class='add'>+	LAN8814: register EP5.0, bit 6</div><div class='ctx'> </div><div class='ctx'> 	See the respective PHY datasheet for the mode values.</div><div class='ctx'> </div><div class='hunk'>@@ -46,19 +47,11 @@ Optional properties:</div><div class='ctx'> 	In fiber mode, auto-negotiation is disabled and the PHY can only work in</div><div class='ctx'> 	100base-fx (full and half duplex) modes.</div><div class='ctx'> </div><div class='del'>- - lan8814,ignore-ts: If present the PHY will not support timestamping.</div><div class='add'>+ - coma-mode-gpios: If present the given gpio will be deasserted when the</div><div class='add'>+		    PHY is probed.</div><div class='ctx'> </div><div class='del'>-	This option acts as check whether Timestamping is supported by</div><div class='del'>-	hardware or not. LAN8814 phy support hardware tmestamping.</div><div class='add'>+	Some PHYs have a COMA mode input pin which puts the PHY into</div><div class='add'>+	isolate and power-down mode. On some boards this input is connected</div><div class='add'>+	to a GPIO of the SoC.</div><div class='ctx'> </div><div class='del'>- - lan8814,latency_rx_10: Configures Latency value of phy in ingress at 10 Mbps.</div><div class='del'>-</div><div class='del'>- - lan8814,latency_tx_10: Configures Latency value of phy in egress at 10 Mbps.</div><div class='del'>-</div><div class='del'>- - lan8814,latency_rx_100: Configures Latency value of phy in ingress at 100 Mbps.</div><div class='del'>-</div><div class='del'>- - lan8814,latency_tx_100: Configures Latency value of phy in egress at 100 Mbps.</div><div class='del'>-</div><div class='del'>- - lan8814,latency_rx_1000: Configures Latency value of phy in ingress at 1000 Mbps.</div><div class='del'>-</div><div class='del'>- - lan8814,latency_tx_1000: Configures Latency value of phy in egress at 1000 Mbps.</div><div class='add'>+	Supported on the LAN8814.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml<br/>new file mode 100644<br/>index 000000000000..0b97e14d947f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/microchip,lan95xx.yaml</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/microchip,lan95xx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip SMSC9500/LAN9530/LAN9730 USB Ethernet Controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Device tree properties for hard wired SMSC95xx compatible USB Ethernet</div><div class='add'>+  controller.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - usb424,9500   # SMSC9500 USB Ethernet Device</div><div class='add'>+          - usb424,9505   # SMSC9505 USB Ethernet Device</div><div class='add'>+          - usb424,9530   # SMSC LAN9530 USB Ethernet Device</div><div class='add'>+          - usb424,9730   # SMSC LAN9730 USB Ethernet Device</div><div class='add'>+          - usb424,9900   # SMSC9500 USB Ethernet Device (SAL10)</div><div class='add'>+          - usb424,9901   # SMSC9505 USB Ethernet Device (SAL10)</div><div class='add'>+          - usb424,9902   # SMSC9500A USB Ethernet Device (SAL10)</div><div class='add'>+          - usb424,9903   # SMSC9505A USB Ethernet Device (SAL10)</div><div class='add'>+          - usb424,9904   # SMSC9512/9514 USB Hub &amp; Ethernet Device (SAL10)</div><div class='add'>+          - usb424,9905   # SMSC9500A USB Ethernet Device (HAL)</div><div class='add'>+          - usb424,9906   # SMSC9505A USB Ethernet Device (HAL)</div><div class='add'>+          - usb424,9907   # SMSC9500 USB Ethernet Device (Alternate ID)</div><div class='add'>+          - usb424,9908   # SMSC9500A USB Ethernet Device (Alternate ID)</div><div class='add'>+          - usb424,9909   # SMSC9512/9514 USB Hub &amp; Ethernet Devic.  ID)</div><div class='add'>+          - usb424,9e00   # SMSC9500A USB Ethernet Device</div><div class='add'>+          - usb424,9e01   # SMSC9505A USB Ethernet Device</div><div class='add'>+          - usb424,9e08   # SMSC LAN89530 USB Ethernet Device</div><div class='add'>+          - usb424,ec00   # SMSC9512/9514 USB Hub &amp; Ethernet Device</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  local-mac-address: true</div><div class='add'>+  mac-address: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    usb {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet@1 {</div><div class='add'>+            compatible = "usb424,9e00";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml b/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml<br/>index 13812768b923..306ef9ecf2b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml</a></div><div class='hunk'>@@ -39,6 +39,7 @@ properties:</div><div class='ctx'>       - description: frame dma based extraction</div><div class='ctx'>       - description: analyzer interrupt</div><div class='ctx'>       - description: ptp interrupt</div><div class='add'>+      - description: ptp external interrupt</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -47,16 +48,15 @@ properties:</div><div class='ctx'>       - const: fdma</div><div class='ctx'>       - const: ana</div><div class='ctx'>       - const: ptp</div><div class='add'>+      - const: ptp-ext</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Reset controller used for switch core reset (soft reset)</div><div class='del'>-      - description: Reset controller used for releasing the phy from reset</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: switch</div><div class='del'>-      - const: phy</div><div class='ctx'> </div><div class='ctx'>   ethernet-ports:</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -73,7 +73,7 @@ properties:</div><div class='ctx'>       "^port@[0-9a-f]+$":</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='del'>-        $ref: "/schemas/net/ethernet-controller.yaml#"</div><div class='add'>+        $ref: /schemas/net/ethernet-controller.yaml#</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='hunk'>@@ -145,8 +145,8 @@ examples:</div><div class='ctx'>       reg-names = "cpu", "gcb";</div><div class='ctx'>       interrupts = &lt;GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>       interrupt-names = "xtr";</div><div class='del'>-      resets = &lt;&amp;switch_reset 0&gt;, &lt;&amp;phy_reset 0&gt;;</div><div class='del'>-      reset-names = "switch", "phy";</div><div class='add'>+      resets = &lt;&amp;switch_reset 0&gt;;</div><div class='add'>+      reset-names = "switch";</div><div class='ctx'>       ethernet-ports {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml<br/>index 6c86d3d85e99..fcafef8d5a33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml</a></div><div class='hunk'>@@ -74,16 +74,20 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ethernet-ports:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^port@[0-9a-f]+$":</div><div class='del'>-        type: object</div><div class='add'>+        $ref: /schemas/net/ethernet-controller.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='del'>-          '#address-cells':</div><div class='del'>-            const: 1</div><div class='del'>-          '#size-cells':</div><div class='del'>-            const: 0</div><div class='del'>-</div><div class='ctx'>           reg:</div><div class='ctx'>             description: Switch port number</div><div class='ctx'> </div><div class='hunk'>@@ -93,35 +97,17 @@ properties:</div><div class='ctx'>               phandle of a Ethernet SerDes PHY.  This defines which SerDes</div><div class='ctx'>               instance will handle the Ethernet traffic.</div><div class='ctx'> </div><div class='del'>-          phy-mode:</div><div class='del'>-            description:</div><div class='del'>-              This specifies the interface used by the Ethernet SerDes towards</div><div class='del'>-              the PHY or SFP.</div><div class='del'>-</div><div class='ctx'>           microchip,bandwidth:</div><div class='ctx'>             description: Specifies bandwidth in Mbit/s allocated to the port.</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             maximum: 25000</div><div class='ctx'> </div><div class='del'>-          phy-handle:</div><div class='del'>-            description:</div><div class='del'>-              phandle of a Ethernet PHY.  This is optional and if provided it</div><div class='del'>-              points to the cuPHY used by the Ethernet SerDes.</div><div class='del'>-</div><div class='del'>-          sfp:</div><div class='del'>-            description:</div><div class='del'>-              phandle of an SFP.  This is optional and used when not specifying</div><div class='del'>-              a cuPHY.  It points to the SFP node that describes the SFP used by</div><div class='del'>-              the Ethernet SerDes.</div><div class='del'>-</div><div class='del'>-          managed: true</div><div class='del'>-</div><div class='ctx'>           microchip,sd-sgpio:</div><div class='ctx'>             description:</div><div class='ctx'>               Index of the ports Signal Detect SGPIO in the set of 384 SGPIOs</div><div class='ctx'>               This is optional, and only needed if the default used index is</div><div class='ctx'>               is not correct.</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             minimum: 0</div><div class='ctx'>             maximum: 383</div><div class='ctx'> </div><div class='hunk'>@@ -144,8 +130,6 @@ required:</div><div class='ctx'>   - reg-names</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - interrupt-names</div><div class='del'>-  - resets</div><div class='del'>-  - reset-names</div><div class='ctx'>   - ethernet-ports</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml b/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml<br/>new file mode 100644<br/>index 000000000000..157e3bbcaf6f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/motorcomm,yt8xxx.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/motorcomm,yt8xxx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MotorComm yt8xxx Ethernet PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Frank Sae &lt;frank.sae@motor-comm.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-phy.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ethernet-phy-id4f51.e91a</div><div class='add'>+      - ethernet-phy-id4f51.e91b</div><div class='add'>+</div><div class='add'>+  rx-internal-delay-ps:</div><div class='add'>+    description: |</div><div class='add'>+      RGMII RX Clock Delay used only when PHY operates in RGMII mode with</div><div class='add'>+      internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.</div><div class='add'>+    enum: [ 0, 150, 300, 450, 600, 750, 900, 1050, 1200, 1350, 1500, 1650,</div><div class='add'>+            1800, 1900, 1950, 2050, 2100, 2200, 2250, 2350, 2500, 2650, 2800,</div><div class='add'>+            2950, 3100, 3250, 3400, 3550, 3700, 3850, 4000, 4150 ]</div><div class='add'>+    default: 1950</div><div class='add'>+</div><div class='add'>+  tx-internal-delay-ps:</div><div class='add'>+    description: |</div><div class='add'>+      RGMII TX Clock Delay used only when PHY operates in RGMII mode with</div><div class='add'>+      internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.</div><div class='add'>+    enum: [ 0, 150, 300, 450, 600, 750, 900, 1050, 1200, 1350, 1500, 1650, 1800,</div><div class='add'>+            1950, 2100, 2250 ]</div><div class='add'>+    default: 1950</div><div class='add'>+</div><div class='add'>+  motorcomm,clk-out-frequency-hz:</div><div class='add'>+    description: clock output on clock output pin.</div><div class='add'>+    enum: [0, 25000000, 125000000]</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  motorcomm,keep-pll-enabled:</div><div class='add'>+    description: |</div><div class='add'>+      If set, keep the PLL enabled even if there is no link. Useful if you</div><div class='add'>+      want to use the clock output without an ethernet link.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  motorcomm,auto-sleep-disabled:</div><div class='add'>+    description: |</div><div class='add'>+      If set, PHY will not enter sleep mode and close AFE after unplug cable</div><div class='add'>+      for a timer.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  motorcomm,tx-clk-adj-enabled:</div><div class='add'>+    description: |</div><div class='add'>+      This configuration is mainly to adapt to VF2 with JH7110 SoC.</div><div class='add'>+      Useful if you want to use tx-clk-xxxx-inverted to adj the delay of tx clk.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  motorcomm,tx-clk-10-inverted:</div><div class='add'>+    description: |</div><div class='add'>+      Use original or inverted RGMII Transmit PHY Clock to drive the RGMII</div><div class='add'>+      Transmit PHY Clock delay train configuration when speed is 10Mbps.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  motorcomm,tx-clk-100-inverted:</div><div class='add'>+    description: |</div><div class='add'>+      Use original or inverted RGMII Transmit PHY Clock to drive the RGMII</div><div class='add'>+      Transmit PHY Clock delay train configuration when speed is 100Mbps.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  motorcomm,tx-clk-1000-inverted:</div><div class='add'>+    description: |</div><div class='add'>+      Use original or inverted RGMII Transmit PHY Clock to drive the RGMII</div><div class='add'>+      Transmit PHY Clock delay train configuration when speed is 1000Mbps.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        phy-mode = "rgmii-id";</div><div class='add'>+        ethernet-phy@4 {</div><div class='add'>+            /*  Only needed to make DT lint tools work. Do not copy/paste</div><div class='add'>+             *  into real DTS files.</div><div class='add'>+             */</div><div class='add'>+            compatible = "ethernet-phy-id4f51.e91a";</div><div class='add'>+</div><div class='add'>+            reg = &lt;4&gt;;</div><div class='add'>+            rx-internal-delay-ps = &lt;2100&gt;;</div><div class='add'>+            tx-internal-delay-ps = &lt;150&gt;;</div><div class='add'>+            motorcomm,clk-out-frequency-hz = &lt;0&gt;;</div><div class='add'>+            motorcomm,keep-pll-enabled;</div><div class='add'>+            motorcomm,auto-sleep-disabled;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        phy-mode = "rgmii";</div><div class='add'>+        ethernet-phy@5 {</div><div class='add'>+            /*  Only needed to make DT lint tools work. Do not copy/paste</div><div class='add'>+             *  into real DTS files.</div><div class='add'>+             */</div><div class='add'>+            compatible = "ethernet-phy-id4f51.e91a";</div><div class='add'>+</div><div class='add'>+            reg = &lt;5&gt;;</div><div class='add'>+            motorcomm,clk-out-frequency-hz = &lt;125000000&gt;;</div><div class='add'>+            motorcomm,keep-pll-enabled;</div><div class='add'>+            motorcomm,auto-sleep-disabled;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mscc,miim.yaml b/Documentation/devicetree/bindings/net/mscc,miim.yaml<br/>new file mode 100644<br/>index 000000000000..5b292e7c9e46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mscc,miim.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mscc,miim.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/mscc,miim.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microsemi MII Management Controller (MIIM)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mscc,ocelot-miim</div><div class='add'>+      - microchip,lan966x-miim</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: base address</div><div class='add'>+      - description: associated reset register for internal PHYs</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mdio@107009c {</div><div class='add'>+      compatible = "mscc,ocelot-miim";</div><div class='add'>+      reg = &lt;0x107009c 0x36&gt;, &lt;0x10700f0 0x8&gt;;</div><div class='add'>+      interrupts = &lt;14&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      phy0: ethernet-phy@0 {</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml b/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml<br/>index ee0a504bdb24..8ee2c7d7ff42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml</a></div><div class='hunk'>@@ -18,14 +18,52 @@ description: |</div><div class='ctx'>   packets using CPU. Additionally, PTP is supported as well as FDMA for faster</div><div class='ctx'>   packet extraction/injection.</div><div class='ctx'> </div><div class='del'>-properties:</div><div class='del'>-  $nodename:</div><div class='del'>-    pattern: "^switch@[0-9a-f]+$"</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: mscc,vsc7514-switch</div><div class='add'>+    then:</div><div class='add'>+      $ref: ethernet-switch.yaml#</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+        - interrupt-names</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 21</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 21</div><div class='add'>+        ethernet-ports:</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^port@[0-9a-f]+$":</div><div class='add'>+              $ref: ethernet-switch-port.yaml#</div><div class='add'>+              unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: mscc,vsc7512-switch</div><div class='add'>+    then:</div><div class='add'>+      $ref: /schemas/net/dsa/dsa.yaml#</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 20</div><div class='add'>+        reg-names:</div><div class='add'>+          maxItems: 20</div><div class='add'>+        ethernet-ports:</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^port@[0-9a-f]+$":</div><div class='add'>+              $ref: /schemas/net/dsa/dsa-port.yaml#</div><div class='add'>+              unevaluatedProperties: false</div><div class='ctx'> </div><div class='add'>+properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mscc,vsc7514-switch</div><div class='add'>+    enum:</div><div class='add'>+      - mscc,vsc7512-switch</div><div class='add'>+      - mscc,vsc7514-switch</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='add'>+    minItems: 20</div><div class='ctx'>     items:</div><div class='ctx'>       - description: system target</div><div class='ctx'>       - description: rewriter target</div><div class='hunk'>@@ -50,6 +88,7 @@ properties:</div><div class='ctx'>       - description: fdma target</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='add'>+    minItems: 20</div><div class='ctx'>     items:</div><div class='ctx'>       - const: sys</div><div class='ctx'>       - const: rew</div><div class='hunk'>@@ -87,59 +126,16 @@ properties:</div><div class='ctx'>       - const: xtr</div><div class='ctx'>       - const: fdma</div><div class='ctx'> </div><div class='del'>-  ethernet-ports:</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      '#address-cells':</div><div class='del'>-        const: 1</div><div class='del'>-      '#size-cells':</div><div class='del'>-        const: 0</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-    patternProperties:</div><div class='del'>-      "^port@[0-9a-f]+$":</div><div class='del'>-        type: object</div><div class='del'>-        description: Ethernet ports handled by the switch</div><div class='del'>-</div><div class='del'>-        $ref: ethernet-controller.yaml#</div><div class='del'>-</div><div class='del'>-        unevaluatedProperties: false</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          reg:</div><div class='del'>-            description: Switch port number</div><div class='del'>-</div><div class='del'>-          phy-handle: true</div><div class='del'>-</div><div class='del'>-          phy-mode: true</div><div class='del'>-</div><div class='del'>-          fixed-link: true</div><div class='del'>-</div><div class='del'>-          mac-address: true</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - reg</div><div class='del'>-          - phy-mode</div><div class='del'>-</div><div class='del'>-        oneOf:</div><div class='del'>-          - required:</div><div class='del'>-              - phy-handle</div><div class='del'>-          - required:</div><div class='del'>-              - fixed-link</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-names</div><div class='ctx'>   - ethernet-ports</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='add'>+  # VSC7514 (Switchdev)</div><div class='ctx'>   - |</div><div class='ctx'>     switch@1010000 {</div><div class='ctx'>       compatible = "mscc,vsc7514-switch";</div><div class='hunk'>@@ -187,5 +183,51 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='add'>+  # VSC7512 (DSA)</div><div class='add'>+  - |</div><div class='add'>+    ethernet-switch@1{</div><div class='add'>+      compatible = "mscc,vsc7512-switch";</div><div class='add'>+      reg = &lt;0x71010000 0x10000&gt;,</div><div class='add'>+            &lt;0x71030000 0x10000&gt;,</div><div class='add'>+            &lt;0x71080000 0x100&gt;,</div><div class='add'>+            &lt;0x710e0000 0x10000&gt;,</div><div class='add'>+            &lt;0x711e0000 0x100&gt;,</div><div class='add'>+            &lt;0x711f0000 0x100&gt;,</div><div class='add'>+            &lt;0x71200000 0x100&gt;,</div><div class='add'>+            &lt;0x71210000 0x100&gt;,</div><div class='add'>+            &lt;0x71220000 0x100&gt;,</div><div class='add'>+            &lt;0x71230000 0x100&gt;,</div><div class='add'>+            &lt;0x71240000 0x100&gt;,</div><div class='add'>+            &lt;0x71250000 0x100&gt;,</div><div class='add'>+            &lt;0x71260000 0x100&gt;,</div><div class='add'>+            &lt;0x71270000 0x100&gt;,</div><div class='add'>+            &lt;0x71280000 0x100&gt;,</div><div class='add'>+            &lt;0x71800000 0x80000&gt;,</div><div class='add'>+            &lt;0x71880000 0x10000&gt;,</div><div class='add'>+            &lt;0x71040000 0x10000&gt;,</div><div class='add'>+            &lt;0x71050000 0x10000&gt;,</div><div class='add'>+            &lt;0x71060000 0x10000&gt;;</div><div class='add'>+            reg-names = "sys", "rew", "qs", "ptp", "port0", "port1",</div><div class='add'>+            "port2", "port3", "port4", "port5", "port6",</div><div class='add'>+            "port7", "port8", "port9", "port10", "qsys",</div><div class='add'>+            "ana", "s0", "s1", "s2";</div><div class='add'>+</div><div class='add'>+            ethernet-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+           port@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            ethernet = &lt;&amp;mac_sw&gt;;</div><div class='add'>+            phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+            phy-mode = "internal";</div><div class='add'>+          };</div><div class='add'>+          port@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+            phy-mode = "internal";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/mscc-miim.txt b/Documentation/devicetree/bindings/net/mscc-miim.txt<br/>deleted file mode 100644<br/>index 70e0cb1ee485..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/mscc-miim.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/mscc-miim.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Microsemi MII Management Controller (MIIM) / MDIO</div><div class='del'>-=================================================</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-- compatible: must be "mscc,ocelot-miim" or "microchip,lan966x-miim"</div><div class='del'>-- reg: The base address of the MDIO bus controller register bank. Optionally, a</div><div class='del'>-  second register bank can be defined if there is an associated reset register</div><div class='del'>-  for internal PHYs</div><div class='del'>-- #address-cells: Must be &lt;1&gt;.</div><div class='del'>-- #size-cells: Must be &lt;0&gt;.  MDIO addresses have no size component.</div><div class='del'>-- interrupts: interrupt specifier (refer to the interrupt binding)</div><div class='del'>-</div><div class='del'>-Typically an MDIO bus might have several children.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	mdio@107009c {</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		compatible = "mscc,ocelot-miim";</div><div class='del'>-		reg = &lt;0x107009c 0x36&gt;, &lt;0x10700f0 0x8&gt;;</div><div class='del'>-		interrupts = &lt;14&gt;;</div><div class='del'>-</div><div class='del'>-		phy0: ethernet-phy@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml<br/>index 15a45db3899a..8e9a95f24c80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Marvell International Ltd. NCI NFC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -28,7 +28,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   reset-n-io:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: |</div><div class='ctx'>       Output GPIO pin used to reset the chip (active low)</div><div class='hunk'>@@ -58,7 +58,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   spi-cpha: true</div><div class='ctx'>   spi-cpol: true</div><div class='del'>-  spi-max-frequency: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -85,6 +84,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             const: marvell,nfc-spi</div><div class='ctx'>     then:</div><div class='add'>+      $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>       properties:</div><div class='ctx'>         break-control: false</div><div class='ctx'>         flow-control: false</div><div class='hunk'>@@ -108,7 +108,7 @@ allOf:</div><div class='ctx'>         spi-max-frequency: false</div><div class='ctx'>         reg: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -128,7 +128,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>             i2c-int-rising;</div><div class='ctx'> </div><div class='del'>-            reset-n-io = &lt;&amp;gpio3 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-n-io = &lt;&amp;gpio3 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -151,7 +151,7 @@ examples:</div><div class='ctx'>             interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='ctx'>             interrupts = &lt;17 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> </div><div class='del'>-            reset-n-io = &lt;&amp;gpio3 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-n-io = &lt;&amp;gpio3 19 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -162,7 +162,7 @@ examples:</div><div class='ctx'>         nfc {</div><div class='ctx'>             compatible = "marvell,nfc-uart";</div><div class='ctx'> </div><div class='del'>-            reset-n-io = &lt;&amp;gpio3 16 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            reset-n-io = &lt;&amp;gpio3 16 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'> </div><div class='ctx'>             hci-muxed;</div><div class='ctx'>             flow-control;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml b/Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml<br/>index 7465aea2e1c0..6924aff0b2c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/nxp,nci.yaml</a></div><div class='hunk'>@@ -7,15 +7,16 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: NXP Semiconductors NCI NFC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Charles Gorand &lt;charles.gorand@effinnov.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - const: nxp,nxp-nci-i2c</div><div class='ctx'>       - items:</div><div class='del'>-          - const: nxp,pn547</div><div class='add'>+          - enum:</div><div class='add'>+              - nxp,nq310</div><div class='add'>+              - nxp,pn547</div><div class='ctx'>           - const: nxp,nxp-nci-i2c</div><div class='ctx'> </div><div class='ctx'>   enable-gpios:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml b/Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml<br/>index d8ba5a18db98..07c67c1e985f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/nxp,pn532.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: NXP Semiconductors PN532 NFC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -31,7 +31,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='ctx'> dependencies:</div><div class='del'>-  interrupts: [ 'reg' ]</div><div class='add'>+  interrupts: [ reg ]</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml b/Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml<br/>index d520414de463..18b3a7d819df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/nxp,pn544.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: NXP Semiconductors PN544 NFC Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml<br/>index 64995cbb0f97..12baee45752c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml</a></div><div class='hunk'>@@ -8,7 +8,6 @@ title: Samsung S3FWRN5 NCI NFC Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='del'>-  - Krzysztof Opasiak &lt;k.opasiak@samsung.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -70,7 +69,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c4 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml b/Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml<br/>index a6a1bc788d29..1dcbddbc5a74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/st,st-nci.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: STMicroelectronics ST NCI NFC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,8 +30,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   uicc-present:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -55,10 +53,11 @@ then:</div><div class='ctx'>   properties:</div><div class='ctx'>     spi-max-frequency: false</div><div class='ctx'> else:</div><div class='add'>+  $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'>   required:</div><div class='ctx'>     - spi-max-frequency</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml b/Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml<br/>index 4356eacde8aa..8a7274357b46 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/st,st21nfca.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: STMicroelectronics SAS ST21NFCA NFC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml b/Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml<br/>index d3bca376039e..647569051ed8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/st,st95hf.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: STMicroelectronics ST95HF NFC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -25,8 +25,6 @@ properties:</div><div class='ctx'>   st95hfvin-supply:</div><div class='ctx'>     description: ST95HF transceiver's Vin regulator supply</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - enable-gpio</div><div class='hunk'>@@ -34,7 +32,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - spi-max-frequency</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml b/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml<br/>index 40da2ac98978..9cc236ec42f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nfc/ti,trf7970a.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Texas Instruments TRF7970A RFID/NFC/15693 Transceiver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Mark Greer &lt;mgreer@animalcreek.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -40,8 +40,6 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   ti,enable-gpios:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -65,7 +63,10 @@ required:</div><div class='ctx'>   - ti,enable-gpios</div><div class='ctx'>   - vin-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml b/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml<br/>new file mode 100644<br/>index 000000000000..2bd3efff2485<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Tegra234 MGBE Multi-Gigabit Ethernet Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;treding@nvidia.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra234-mgbe</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hypervisor</div><div class='add'>+      - const: mac</div><div class='add'>+      - const: xpcs</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: common</div><div class='add'>+      - const: macsec-ns</div><div class='add'>+      - const: macsec</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 12</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mgbe</div><div class='add'>+      - const: mac</div><div class='add'>+      - const: mac-divider</div><div class='add'>+      - const: ptp-ref</div><div class='add'>+      - const: rx-input-m</div><div class='add'>+      - const: rx-input</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: eee-pcs</div><div class='add'>+      - const: rx-pcs-input</div><div class='add'>+      - const: rx-pcs-m</div><div class='add'>+      - const: rx-pcs</div><div class='add'>+      - const: tx-pcs</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mac</div><div class='add'>+      - const: pcs</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: memory read client</div><div class='add'>+      - description: memory write client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-handle: true</div><div class='add'>+</div><div class='add'>+  phy-mode:</div><div class='add'>+    contains:</div><div class='add'>+      enum:</div><div class='add'>+        - usxgmii</div><div class='add'>+        - 10gbase-kr</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Optional node for embedded MDIO controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - phy-handle</div><div class='add'>+  - phy-mode</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra234-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra234-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra234-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@6800000 {</div><div class='add'>+        compatible = "nvidia,tegra234-mgbe";</div><div class='add'>+        reg = &lt;0x06800000 0x10000&gt;,</div><div class='add'>+              &lt;0x06810000 0x10000&gt;,</div><div class='add'>+              &lt;0x068a0000 0x10000&gt;;</div><div class='add'>+        reg-names = "hypervisor", "mac", "xpcs";</div><div class='add'>+        interrupts = &lt;GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "common";</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA234_CLK_MGBE0_APP&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_MAC&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_MAC_DIVIDER&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_PTP_REF&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_RX_INPUT_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_RX_INPUT&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_TX&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_EEE_PCS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_RX_PCS_INPUT&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_RX_PCS_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_RX_PCS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_MGBE0_TX_PCS&gt;;</div><div class='add'>+        clock-names = "mgbe", "mac", "mac-divider", "ptp-ref", "rx-input-m",</div><div class='add'>+                      "rx-input", "tx", "eee-pcs", "rx-pcs-input", "rx-pcs-m",</div><div class='add'>+                      "rx-pcs", "tx-pcs";</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA234_RESET_MGBE0_MAC&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_RESET_MGBE0_PCS&gt;;</div><div class='add'>+        reset-names = "mac", "pcs";</div><div class='add'>+        interconnects = &lt;&amp;mc TEGRA234_MEMORY_CLIENT_MGBEARD &amp;emc&gt;,</div><div class='add'>+                        &lt;&amp;mc TEGRA234_MEMORY_CLIENT_MGBEAWR &amp;emc&gt;;</div><div class='add'>+        interconnect-names = "dma-mem", "write";</div><div class='add'>+        iommus = &lt;&amp;smmu_niso0 TEGRA234_SID_MGBE&gt;;</div><div class='add'>+        power-domains = &lt;&amp;bpmp TEGRA234_POWER_DOMAIN_MGBEA&gt;;</div><div class='add'>+</div><div class='add'>+        phy-handle = &lt;&amp;mgbe0_phy&gt;;</div><div class='add'>+        phy-mode = "usxgmii";</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            mgbe0_phy: phy@0 {</div><div class='add'>+                compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+                reg = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+                #phy-cells = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml b/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml<br/>index 011363166789..63409cbff5ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nxp,dwmac-imx.yaml</a></div><div class='hunk'>@@ -4,10 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX8 DWMAC glue layer Device Tree Bindings</div><div class='add'>+title: NXP i.MX8/9 DWMAC glue layer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Joakim Zhang &lt;qiangqing.zhang@nxp.com&gt;</div><div class='add'>+  - Clark Wang &lt;xiaoning.wang@nxp.com&gt;</div><div class='add'>+  - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='add'>+  - NXP Linux Team &lt;linux-imx@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> # We need a select here so we don't match all nodes with 'snps,dwmac'</div><div class='ctx'> select:</div><div class='hunk'>@@ -17,6 +19,7 @@ select:</div><div class='ctx'>         enum:</div><div class='ctx'>           - nxp,imx8mp-dwmac-eqos</div><div class='ctx'>           - nxp,imx8dxl-dwmac-eqos</div><div class='add'>+          - nxp,imx93-dwmac-eqos</div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='ctx'> </div><div class='hunk'>@@ -30,6 +33,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - nxp,imx8mp-dwmac-eqos</div><div class='ctx'>               - nxp,imx8dxl-dwmac-eqos</div><div class='add'>+              - nxp,imx93-dwmac-eqos</div><div class='ctx'>           - const: snps,dwmac-5.10a</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -92,5 +96,4 @@ examples:</div><div class='ctx'>                      &lt;&amp;clk IMX8MP_CLK_ENET_QOS&gt;;</div><div class='ctx'>             clock-names = "stmmaceth", "pclk", "ptp_ref", "tx";</div><div class='ctx'>             phy-mode = "rgmii";</div><div class='del'>-            status = "disabled";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml<br/>index d51da24f3505..ab8867e6939b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/nxp,tja11xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/nxp,tja11xx.yaml</a></div><div class='hunk'>@@ -31,6 +31,22 @@ patternProperties:</div><div class='ctx'>         description:</div><div class='ctx'>           The ID number for the child PHY. Should be +1 of parent PHY.</div><div class='ctx'> </div><div class='add'>+      nxp,rmii-refclk-in:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: |</div><div class='add'>+          The REF_CLK is provided for both transmitted and received data</div><div class='add'>+          in RMII mode. This clock signal is provided by the PHY and is</div><div class='add'>+          typically derived from an external 25MHz crystal. Alternatively,</div><div class='add'>+          a 50MHz clock signal generated by an external oscillator can be</div><div class='add'>+          connected to pin REF_CLK. A third option is to connect a 25MHz</div><div class='add'>+          clock to pin CLK_IN_OUT. So, the REF_CLK should be configured</div><div class='add'>+          as input or output according to the actual circuit connection.</div><div class='add'>+          If present, indicates that the REF_CLK will be configured as</div><div class='add'>+          interface reference clock input when RMII mode enabled.</div><div class='add'>+          If not present, the REF_CLK will be configured as interface</div><div class='add'>+          reference clock output when RMII mode enabled.</div><div class='add'>+          Only supported on TJA1100 and TJA1101.</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='ctx'> </div><div class='hunk'>@@ -44,6 +60,7 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         tja1101_phy0: ethernet-phy@4 {</div><div class='ctx'>             reg = &lt;0x4&gt;;</div><div class='add'>+            nxp,rmii-refclk-in;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml b/Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml<br/>new file mode 100644<br/>index 000000000000..fbedf696c555<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/pcs/fsl,lynx-pcs.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/pcs/fsl,lynx-pcs.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP Lynx PCS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ioana Ciornei &lt;ioana.ciornei@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  NXP Lynx 10G and 28G SerDes have Ethernet PCS devices which can be used as</div><div class='add'>+  protocol controllers. They are accessible over the Ethernet interface's MDIO</div><div class='add'>+  bus.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,lynx-pcs</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mdio-bus {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      qsgmii_pcs1: ethernet-pcs@1 {</div><div class='add'>+        compatible = "fsl,lynx-pcs";</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml b/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml<br/>new file mode 100644<br/>index 000000000000..66a95191bd77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/pcs/mediatek,sgmiisys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek SGMIISYS Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks</div><div class='add'>+  to the ethernet subsystem to which it is attached.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt7622-sgmiisys</div><div class='add'>+          - mediatek,mt7629-sgmiisys</div><div class='add'>+          - mediatek,mt7981-sgmiisys_0</div><div class='add'>+          - mediatek,mt7981-sgmiisys_1</div><div class='add'>+          - mediatek,mt7986-sgmiisys_0</div><div class='add'>+          - mediatek,mt7986-sgmiisys_1</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  mediatek,pnswap:</div><div class='add'>+    description: Invert polarity of the SGMII data lanes</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#clock-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      sgmiisys: syscon@1b128000 {</div><div class='add'>+        compatible = "mediatek,mt7622-sgmiisys", "syscon";</div><div class='add'>+        reg = &lt;0 0x1b128000 0 0x1000&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml b/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml<br/>new file mode 100644<br/>index 000000000000..2d33bbab7163<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/N1 MII converter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Clément Léger &lt;clement.leger@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This MII converter is present on the Renesas RZ/N1 SoC family. It is</div><div class='add'>+  responsible to do MII passthrough or convert it to RMII/RGMII.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a06g032-miic</div><div class='add'>+      - const: renesas,rzn1-miic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: MII reference clock</div><div class='add'>+      - description: RGMII reference clock</div><div class='add'>+      - description: RMII reference clock</div><div class='add'>+      - description: AHB clock used for the MII converter register interface</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mii_ref</div><div class='add'>+      - const: rgmii_ref</div><div class='add'>+      - const: rmii_ref</div><div class='add'>+      - const: hclk</div><div class='add'>+</div><div class='add'>+  renesas,miic-switch-portin:</div><div class='add'>+    description: MII Switch PORTIN configuration. This value should use one of</div><div class='add'>+      the values defined in dt-bindings/net/pcs-rzn1-miic.h.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^mii-conv@[0-5]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: MII converter port</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: MII Converter port number.</div><div class='add'>+        enum: [1, 2, 3, 4, 5]</div><div class='add'>+</div><div class='add'>+      renesas,miic-input:</div><div class='add'>+        description: Converter input port configuration. This value should use</div><div class='add'>+          one of the values defined in dt-bindings/net/pcs-rzn1-miic.h.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - renesas,miic-input</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              const: 1</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            renesas,miic-input:</div><div class='add'>+              const: 0</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              const: 2</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            renesas,miic-input:</div><div class='add'>+              enum: [1, 11]</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              const: 3</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            renesas,miic-input:</div><div class='add'>+              enum: [7, 10]</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              const: 4</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            renesas,miic-input:</div><div class='add'>+              enum: [4, 6, 9, 13]</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              const: 5</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            renesas,miic-input:</div><div class='add'>+              enum: [3, 5, 8, 12]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/net/pcs-rzn1-miic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a06g032-sysctrl.h&gt;</div><div class='add'>+</div><div class='add'>+    eth-miic@44030000 {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      compatible = "renesas,r9a06g032-miic", "renesas,rzn1-miic";</div><div class='add'>+      reg = &lt;0x44030000 0x10000&gt;;</div><div class='add'>+      clocks = &lt;&amp;sysctrl R9A06G032_CLK_MII_REF&gt;,</div><div class='add'>+              &lt;&amp;sysctrl R9A06G032_CLK_RGMII_REF&gt;,</div><div class='add'>+              &lt;&amp;sysctrl R9A06G032_CLK_RMII_REF&gt;,</div><div class='add'>+              &lt;&amp;sysctrl R9A06G032_HCLK_SWITCH_RG&gt;;</div><div class='add'>+      clock-names = "mii_ref", "rgmii_ref", "rmii_ref", "hclk";</div><div class='add'>+      renesas,miic-switch-portin = &lt;MIIC_GMAC2_PORT&gt;;</div><div class='add'>+      power-domains = &lt;&amp;sysctrl&gt;;</div><div class='add'>+</div><div class='add'>+      mii_conv1: mii-conv@1 {</div><div class='add'>+        renesas,miic-input = &lt;MIIC_GMAC1_PORT&gt;;</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      mii_conv2: mii-conv@2 {</div><div class='add'>+        renesas,miic-input = &lt;MIIC_SWITCH_PORTD&gt;;</div><div class='add'>+        reg = &lt;2&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      mii_conv3: mii-conv@3 {</div><div class='add'>+        renesas,miic-input = &lt;MIIC_SWITCH_PORTC&gt;;</div><div class='add'>+        reg = &lt;3&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      mii_conv4: mii-conv@4 {</div><div class='add'>+        renesas,miic-input = &lt;MIIC_SWITCH_PORTB&gt;;</div><div class='add'>+        reg = &lt;4&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      mii_conv5: mii-conv@5 {</div><div class='add'>+        renesas,miic-input = &lt;MIIC_SWITCH_PORTA&gt;;</div><div class='add'>+        reg = &lt;5&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml b/Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..94a527e6aa1b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/pse-pd/podl-pse-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/pse-pd/podl-pse-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Regulator based Power Sourcing Equipment</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description: Regulator based PoDL PSE controller. The device must be referenced</div><div class='add'>+  by the PHY node to control power injection to the Ethernet cable.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pse-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: podl-pse-regulator</div><div class='add'>+</div><div class='add'>+  '#pse-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  pse-supply:</div><div class='add'>+    description: Power supply for the PSE controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - pse-supply</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ethernet-pse {</div><div class='add'>+      compatible = "podl-pse-regulator";</div><div class='add'>+      pse-supply = &lt;&amp;reg_t1l1&gt;;</div><div class='add'>+      #pse-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml b/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml<br/>new file mode 100644<br/>index 000000000000..b110abb42597<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/pse-pd/pse-controller.yaml</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/pse-pd/pse-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Power Sourcing Equipment (PSE).</div><div class='add'>+</div><div class='add'>+description: Binding for the Power Sourcing Equipment (PSE) as defined in the</div><div class='add'>+  IEEE 802.3 specification. It is designed for hardware which is delivering</div><div class='add'>+  power over twisted pair/ethernet cable. The ethernet-pse nodes should be</div><div class='add'>+  used to describe PSE controller and referenced by the ethernet-phy node.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^ethernet-pse(@.*)?$"</div><div class='add'>+</div><div class='add'>+  "#pse-cells":</div><div class='add'>+    description:</div><div class='add'>+      Used to uniquely identify a PSE instance within an IC. Will be</div><div class='add'>+      0 on PSE nodes with only a single output and at least 1 on nodes</div><div class='add'>+      controlling several outputs.</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#pse-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qca,ar71xx.yaml b/Documentation/devicetree/bindings/net/qca,ar71xx.yaml<br/>index 1ebf9e8c8a1d..89f94b31b546 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qca,ar71xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qca,ar71xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qca,ar71xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/qca,ar71xx.yaml</a></div><div class='hunk'>@@ -123,7 +123,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>                     switch_port0: port@0 {</div><div class='ctx'>                         reg = &lt;0x0&gt;;</div><div class='del'>-                        label = "cpu";</div><div class='ctx'>                         ethernet = &lt;&amp;eth1&gt;;</div><div class='ctx'> </div><div class='ctx'>                         phy-mode = "gmii";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml<br/>index b3d4013b7ca6..161d28919316 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qca,ar803x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qca,ar803x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qca,ar803x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/qca,ar803x.yaml</a></div><div class='hunk'>@@ -40,6 +40,14 @@ properties:</div><div class='ctx'>       Only supported on the AR8031.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  qca,disable-hibernation-mode:</div><div class='add'>+    description: |</div><div class='add'>+      Disable Atheros AR803X PHYs hibernation mode. If present, indicates</div><div class='add'>+      that the hardware of PHY will not enter power saving mode when the</div><div class='add'>+      cable is disconnected. And the RX_CLK always keeps outputting a</div><div class='add'>+      valid clock.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   qca,smarteee-tw-us-100m:</div><div class='ctx'>     description: EEE Tw parameter for 100M links.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.txt b/Documentation/devicetree/bindings/net/qcom,ethqos.txt<br/>deleted file mode 100644<br/>index 1f5746849a71..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ethqos.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ethqos.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,66 +0,0 @@</div><div class='del'>-Qualcomm Ethernet ETHQOS device</div><div class='del'>-</div><div class='del'>-This documents dwmmac based ethernet device which supports Gigabit</div><div class='del'>-ethernet for version v2.3.0 onwards.</div><div class='del'>-</div><div class='del'>-This device has following properties:</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: Should be one of:</div><div class='del'>-		"qcom,qcs404-ethqos"</div><div class='del'>-		"qcom,sm8150-ethqos"</div><div class='del'>-</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-</div><div class='del'>-- reg-names: Should contain register names "stmmaceth", "rgmii"</div><div class='del'>-</div><div class='del'>-- clocks: Should contain phandle to clocks</div><div class='del'>-</div><div class='del'>-- clock-names: Should contain clock names "stmmaceth", "pclk",</div><div class='del'>-		"ptp_ref", "rgmii"</div><div class='del'>-</div><div class='del'>-- interrupts: Should contain phandle to interrupts</div><div class='del'>-</div><div class='del'>-- interrupt-names: Should contain interrupt names "macirq", "eth_lpi"</div><div class='del'>-</div><div class='del'>-Rest of the properties are defined in stmmac.txt file in same directory</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-ethernet: ethernet@7a80000 {</div><div class='del'>-	compatible = "qcom,qcs404-ethqos";</div><div class='del'>-	reg = &lt;0x07a80000 0x10000&gt;,</div><div class='del'>-		&lt;0x07a96000 0x100&gt;;</div><div class='del'>-	reg-names = "stmmaceth", "rgmii";</div><div class='del'>-	clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";</div><div class='del'>-	clocks = &lt;&amp;gcc GCC_ETH_AXI_CLK&gt;,</div><div class='del'>-		&lt;&amp;gcc GCC_ETH_SLAVE_AHB_CLK&gt;,</div><div class='del'>-		&lt;&amp;gcc GCC_ETH_PTP_CLK&gt;,</div><div class='del'>-		&lt;&amp;gcc GCC_ETH_RGMII_CLK&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	interrupt-names = "macirq", "eth_lpi";</div><div class='del'>-	snps,reset-gpio = &lt;&amp;tlmm 60 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	snps,reset-active-low;</div><div class='del'>-</div><div class='del'>-	snps,txpbl = &lt;8&gt;;</div><div class='del'>-	snps,rxpbl = &lt;2&gt;;</div><div class='del'>-	snps,aal;</div><div class='del'>-	snps,tso;</div><div class='del'>-</div><div class='del'>-	phy-handle = &lt;&amp;phy1&gt;;</div><div class='del'>-	phy-mode = "rgmii";</div><div class='del'>-</div><div class='del'>-	mdio {</div><div class='del'>-		#address-cells = &lt;0x1&gt;;</div><div class='del'>-		#size-cells = &lt;0x0&gt;;</div><div class='del'>-		compatible = "snps,dwmac-mdio";</div><div class='del'>-		phy1: phy@4 {</div><div class='del'>-			device_type = "ethernet-phy";</div><div class='del'>-			reg = &lt;0x4&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml<br/>new file mode 100644<br/>index 000000000000..60a38044fb19<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ethqos.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/qcom,ethqos.yaml</a></div><div class='hunk'>@@ -0,0 +1,111 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/qcom,ethqos.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Ethernet ETHQOS device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  dwmmac based Qualcomm ethernet devices which support Gigabit</div><div class='add'>+  ethernet (version v2.3.0 and onwards).</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: snps,dwmac.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,qcs404-ethqos</div><div class='add'>+      - qcom,sc8280xp-ethqos</div><div class='add'>+      - qcom,sm8150-ethqos</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: stmmaceth</div><div class='add'>+      - const: rgmii</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Combined signal for various interrupt events</div><div class='add'>+      - description: The interrupt that occurs when Rx exits the LPI state</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: macirq</div><div class='add'>+      - const: eth_lpi</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: stmmaceth</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: ptp_ref</div><div class='add'>+      - const: rgmii</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-qcs404.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet: ethernet@7a80000 {</div><div class='add'>+      compatible = "qcom,qcs404-ethqos";</div><div class='add'>+      reg = &lt;0x07a80000 0x10000&gt;,</div><div class='add'>+            &lt;0x07a96000 0x100&gt;;</div><div class='add'>+      reg-names = "stmmaceth", "rgmii";</div><div class='add'>+      clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_ETH_AXI_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_ETH_SLAVE_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_ETH_PTP_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_ETH_RGMII_CLK&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "macirq", "eth_lpi";</div><div class='add'>+</div><div class='add'>+      rx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+      tx-fifo-depth = &lt;4096&gt;;</div><div class='add'>+</div><div class='add'>+      snps,tso;</div><div class='add'>+      snps,reset-gpio = &lt;&amp;tlmm 60 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      snps,reset-active-low;</div><div class='add'>+      snps,reset-delays-us = &lt;0 10000 10000&gt;;</div><div class='add'>+</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      pinctrl-0 = &lt;&amp;ethernet_defaults&gt;;</div><div class='add'>+</div><div class='add'>+      phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+      phy-mode = "rgmii";</div><div class='add'>+      mdio {</div><div class='add'>+        #address-cells = &lt;0x1&gt;;</div><div class='add'>+        #size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+        compatible = "snps,dwmac-mdio";</div><div class='add'>+        phy1: phy@4 {</div><div class='add'>+          compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+          device_type = "ethernet-phy";</div><div class='add'>+          reg = &lt;0x4&gt;;</div><div class='add'>+</div><div class='add'>+          #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml<br/>index 58ecc62adfaa..2d5e4ffb2f9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ipa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ipa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ipa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/qcom,ipa.yaml</a></div><div class='hunk'>@@ -49,6 +49,8 @@ properties:</div><div class='ctx'>       - qcom,sc7280-ipa</div><div class='ctx'>       - qcom,sdm845-ipa</div><div class='ctx'>       - qcom,sdx55-ipa</div><div class='add'>+      - qcom,sdx65-ipa</div><div class='add'>+      - qcom,sm6350-ipa</div><div class='ctx'>       - qcom,sm8350-ipa</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -124,19 +126,31 @@ properties:</div><div class='ctx'>       - const: ipa-clock-enabled-valid</div><div class='ctx'>       - const: ipa-clock-enabled</div><div class='ctx'> </div><div class='add'>+  qcom,gsi-loader:</div><div class='add'>+    enum:</div><div class='add'>+      - self</div><div class='add'>+      - modem</div><div class='add'>+      - skip</div><div class='add'>+    description:</div><div class='add'>+      Indicates how GSI firmware should be loaded.  If the AP loads</div><div class='add'>+      and validates GSI firmware, this property has value "self".</div><div class='add'>+      If the modem does this, this property has value "modem".</div><div class='add'>+      Otherwise, "skip" means GSI firmware loading is not required.</div><div class='add'>+</div><div class='ctx'>   modem-init:</div><div class='add'>+    deprecated: true</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description:</div><div class='del'>-      If present, it indicates that the modem is responsible for</div><div class='del'>-      performing early IPA initialization, including loading and</div><div class='del'>-      validating firwmare used by the GSI.</div><div class='add'>+      This is the older (deprecated) way of indicating how GSI firmware</div><div class='add'>+      should be loaded.  If present, the modem loads GSI firmware; if</div><div class='add'>+      absent, the AP loads GSI firmware.</div><div class='ctx'> </div><div class='ctx'>   memory-region:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description:</div><div class='ctx'>       If present, a phandle for a reserved memory area that holds</div><div class='ctx'>       the firmware passed to Trust Zone for authentication.  Required</div><div class='del'>-      when Trust Zone (not the modem) performs early initialization.</div><div class='add'>+      when the AP (not the modem) performs early initialization.</div><div class='ctx'> </div><div class='ctx'>   firmware-name:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='hunk'>@@ -155,22 +169,36 @@ required:</div><div class='ctx'>   - interconnects</div><div class='ctx'>   - qcom,smem-states</div><div class='ctx'> </div><div class='del'>-# Either modem-init is present, or memory-region must be present.</div><div class='del'>-oneOf:</div><div class='del'>-  - required:</div><div class='del'>-      - modem-init</div><div class='del'>-  - required:</div><div class='del'>-      - memory-region</div><div class='del'>-</div><div class='del'>-# If memory-region is present, firmware-name may optionally be present.</div><div class='del'>-# But if modem-init is present, firmware-name must not be present.</div><div class='del'>-if:</div><div class='del'>-  required:</div><div class='del'>-    - modem-init</div><div class='del'>-then:</div><div class='del'>-  not:</div><div class='del'>-    required:</div><div class='del'>-      - firmware-name</div><div class='add'>+allOf:</div><div class='add'>+  # If qcom,gsi-loader is present, modem-init must not be present</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - qcom,gsi-loader</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        modem-init: false</div><div class='add'>+</div><div class='add'>+      # If qcom,gsi-loader is "self", the AP loads GSI firmware, and</div><div class='add'>+      # memory-region must be specified</div><div class='add'>+      if:</div><div class='add'>+        properties:</div><div class='add'>+          qcom,gsi-loader:</div><div class='add'>+            contains:</div><div class='add'>+              const: self</div><div class='add'>+      then:</div><div class='add'>+        required:</div><div class='add'>+          - memory-region</div><div class='add'>+    else:</div><div class='add'>+      # If qcom,gsi-loader is not present, we use deprecated behavior.</div><div class='add'>+      # If modem-init is not present, the AP loads GSI firmware, and</div><div class='add'>+      # memory-region must be specified.</div><div class='add'>+      if:</div><div class='add'>+        not:</div><div class='add'>+          required:</div><div class='add'>+            - modem-init</div><div class='add'>+      then:</div><div class='add'>+        required:</div><div class='add'>+          - memory-region</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -182,6 +210,12 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         smp2p-mpss {</div><div class='ctx'>                 compatible = "qcom,smp2p";</div><div class='add'>+                interrupts = &lt;GIC_SPI 576 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+                mboxes = &lt;&amp;apss_shared 6&gt;;</div><div class='add'>+                qcom,smem = &lt;94&gt;, &lt;432&gt;;</div><div class='add'>+                qcom,local-pid = &lt;0&gt;;</div><div class='add'>+                qcom,remote-pid = &lt;5&gt;;</div><div class='add'>+</div><div class='ctx'>                 ipa_smp2p_out: ipa-ap-to-modem {</div><div class='ctx'>                         qcom,entry-name = "ipa";</div><div class='ctx'>                         #qcom,smem-state-cells = &lt;1&gt;;</div><div class='hunk'>@@ -193,15 +227,19 @@ examples:</div><div class='ctx'>                         #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>                 };</div><div class='ctx'>         };</div><div class='add'>+</div><div class='ctx'>         ipa@1e40000 {</div><div class='del'>-                compatible = "qcom,sdm845-ipa";</div><div class='add'>+                compatible = "qcom,sc7180-ipa";</div><div class='ctx'> </div><div class='del'>-                modem-init;</div><div class='add'>+                qcom,gsi-loader = "self";</div><div class='add'>+                memory-region = &lt;&amp;ipa_fw_mem&gt;;</div><div class='add'>+                firmware-name = "qcom/sc7180-trogdor/modem/modem.mdt";</div><div class='ctx'> </div><div class='del'>-                iommus = &lt;&amp;apps_smmu 0x720 0x3&gt;;</div><div class='add'>+                iommus = &lt;&amp;apps_smmu 0x440 0x0&gt;,</div><div class='add'>+                         &lt;&amp;apps_smmu 0x442 0x0&gt;;</div><div class='ctx'>                 reg = &lt;0x1e40000 0x7000&gt;,</div><div class='del'>-                        &lt;0x1e47000 0x2000&gt;,</div><div class='del'>-                        &lt;0x1e04000 0x2c000&gt;;</div><div class='add'>+                      &lt;0x1e47000 0x2000&gt;,</div><div class='add'>+                      &lt;0x1e04000 0x2c000&gt;;</div><div class='ctx'>                 reg-names = "ipa-reg",</div><div class='ctx'>                             "ipa-shared",</div><div class='ctx'>                             "gsi";</div><div class='hunk'>@@ -219,9 +257,9 @@ examples:</div><div class='ctx'>                 clock-names = "core";</div><div class='ctx'> </div><div class='ctx'>                 interconnects =</div><div class='del'>-                        &lt;&amp;rsc_hlos MASTER_IPA &amp;rsc_hlos SLAVE_EBI1&gt;,</div><div class='del'>-                        &lt;&amp;rsc_hlos MASTER_IPA &amp;rsc_hlos SLAVE_IMEM&gt;,</div><div class='del'>-                        &lt;&amp;rsc_hlos MASTER_APPSS_PROC &amp;rsc_hlos SLAVE_IPA_CFG&gt;;</div><div class='add'>+                        &lt;&amp;aggre2_noc MASTER_IPA 0 &amp;mc_virt SLAVE_EBI1 0&gt;,</div><div class='add'>+                        &lt;&amp;aggre2_noc MASTER_IPA 0 &amp;system_noc SLAVE_IMEM 0&gt;,</div><div class='add'>+                        &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_IPA_CFG 0&gt;;</div><div class='ctx'>                 interconnect-names = "memory",</div><div class='ctx'>                                      "imem",</div><div class='ctx'>                                      "config";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml<br/>index 2af304341772..3407e909e8a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml</a></div><div class='hunk'>@@ -4,19 +4,23 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/qcom,ipq4019-mdio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm IPQ40xx MDIO Controller Device Tree Bindings</div><div class='add'>+title: Qualcomm IPQ40xx MDIO Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Robert Marko &lt;robert.marko@sartura.hr&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "mdio.yaml#"</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,ipq4019-mdio</div><div class='del'>-      - qcom,ipq5018-mdio</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,ipq4019-mdio</div><div class='add'>+          - qcom,ipq5018-mdio</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,ipq6018-mdio</div><div class='add'>+              - qcom,ipq8074-mdio</div><div class='add'>+          - const: qcom,ipq4019-mdio</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -33,10 +37,12 @@ properties:</div><div class='ctx'>       address range is only required by the platform IPQ50xx.</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      MDIO clock source frequency fixed to 100MHZ, this clock should be specified</div><div class='del'>-      by the platform IPQ807x, IPQ60xx and IPQ50xx.</div><div class='add'>+    items:</div><div class='add'>+      - description: MDIO clock source frequency fixed to 100MHZ</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: gcc_mdio_ahb_clk</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -44,6 +50,26 @@ required:</div><div class='ctx'>   - "#address-cells"</div><div class='ctx'>   - "#size-cells"</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq5018-mdio</div><div class='add'>+              - qcom,ipq6018-mdio</div><div class='add'>+              - qcom,ipq8074-mdio</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks: false</div><div class='add'>+        clock-names: false</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml<br/>index d7748dd33199..164704338ef0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ description:</div><div class='ctx'>   used to communicate with the gmac phy connected.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mdio.yaml#"</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -53,7 +53,9 @@ examples:</div><div class='ctx'>             reg = &lt;0x10&gt;;</div><div class='ctx'> </div><div class='ctx'>             ports {</div><div class='del'>-              /* ... */</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                /* ... */</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/qcom-emac.txt b/Documentation/devicetree/bindings/net/qcom-emac.txt<br/>index 346e6c7f47b7..7ae8aa148634 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom-emac.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/qcom-emac.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/qcom-emac.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/qcom-emac.txt</a></div><div class='hunk'>@@ -14,7 +14,7 @@ MAC node:</div><div class='ctx'> - mac-address : The 6-byte MAC address. If present, it is the default</div><div class='ctx'> 	MAC address.</div><div class='ctx'> - internal-phy : phandle to the internal PHY node</div><div class='del'>-- phy-handle : phandle the the external PHY node</div><div class='add'>+- phy-handle : phandle to the external PHY node</div><div class='ctx'> </div><div class='ctx'> Internal PHY node:</div><div class='ctx'> - compatible : Should be "qcom,fsm9900-emac-sgmii" or "qcom,qdf2432-emac-sgmii".</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt b/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt<br/>deleted file mode 100644<br/>index 9fe1a0a22e44..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ralink,rt2880-net.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ralink,rt2880-net.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-Ralink Frame Engine Ethernet controller</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-The Ralink frame engine ethernet controller can be found on Ralink and</div><div class='del'>-Mediatek SoCs (RT288x, RT3x5x, RT366x, RT388x, rt5350, mt7620, mt7621, mt76x8).</div><div class='del'>-</div><div class='del'>-Depending on the SoC, there is a number of ports connected to the CPU port</div><div class='del'>-directly and/or via a (gigabit-)switch.</div><div class='del'>-</div><div class='del'>-* Ethernet controller node</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be one of "ralink,rt2880-eth", "ralink,rt3050-eth",</div><div class='del'>-  "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth",</div><div class='del'>-  "mediatek,mt7620-eth", "mediatek,mt7621-eth"</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain the frame engines interrupt</div><div class='del'>-- resets: Should contain the frame engines resets</div><div class='del'>-- reset-names: Should contain the reset names "fe". If a switch is present</div><div class='del'>-  "esw" is also required.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-* Ethernet port node</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "ralink,eth-port"</div><div class='del'>-- reg: The number of the physical port</div><div class='del'>-- phy-handle: reference to the node describing the phy</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-mdio-bus {</div><div class='del'>-	...</div><div class='del'>-	phy0: ethernet-phy@0 {</div><div class='del'>-		phy-mode = "mii";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ethernet@400000 {</div><div class='del'>-	compatible = "ralink,rt2880-eth";</div><div class='del'>-	reg = &lt;0x00400000 10000&gt;;</div><div class='del'>-</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	resets = &lt;&amp;rstctrl 18&gt;;</div><div class='del'>-	reset-names = "fe";</div><div class='del'>-</div><div class='del'>-	interrupt-parent = &lt;&amp;cpuintc&gt;;</div><div class='del'>-	interrupts = &lt;5&gt;;</div><div class='del'>-</div><div class='del'>-	port@0 {</div><div class='del'>-		compatible = "ralink,eth-port";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		phy-handle = &lt;&amp;phy0&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt b/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt<br/>deleted file mode 100644<br/>index 87e315856efa..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ralink,rt3050-esw.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-Ralink Fast Ethernet Embedded Switch</div><div class='del'>-====================================</div><div class='del'>-</div><div class='del'>-The ralink fast ethernet embedded switch can be found on Ralink and Mediatek</div><div class='del'>-SoCs (RT3x5x, RT5350, MT76x8).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "ralink,rt3050-esw"</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain the embedded switches interrupt</div><div class='del'>-- resets: Should contain the embedded switches resets</div><div class='del'>-- reset-names: Should contain the reset names "esw"</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- ralink,portmap: can be used to choose if the default switch setup is</div><div class='del'>-  llllw or wllll</div><div class='del'>-- ralink,led_polarity: override the active high/low settings of the leds</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-esw@10110000 {</div><div class='del'>-	compatible = "ralink,rt3050-esw";</div><div class='del'>-	reg = &lt;0x10110000 8000&gt;;</div><div class='del'>-</div><div class='del'>-	resets = &lt;&amp;rstctrl 23&gt;;</div><div class='del'>-	reset-names = "esw";</div><div class='del'>-</div><div class='del'>-	interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-	interrupts = &lt;17&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml b/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml<br/>index 157d606bf9cb..8cc2b9924680 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/realtek-bluetooth.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/realtek-bluetooth.yaml</a></div><div class='hunk'>@@ -4,23 +4,30 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/realtek-bluetooth.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: RTL8723BS/RTL8723CS/RTL8822CS Bluetooth Device Tree Bindings</div><div class='add'>+title: RTL8723BS/RTL8723CS/RTL8821CS/RTL8822CS Bluetooth</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vasily Khoruzhick &lt;anarsoul@gmail.com&gt;</div><div class='ctx'>   - Alistair Francis &lt;alistair@alistair23.me&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  RTL8723CS/RTL8723CS/RTL8822CS is WiFi + BT chip. WiFi part is connected over</div><div class='del'>-  SDIO, while BT is connected over serial. It speaks H5 protocol with few</div><div class='del'>-  extra commands to upload firmware and change module speed.</div><div class='add'>+  RTL8723CS/RTL8723CS/RTL8821CS/RTL8822CS is a WiFi + BT chip. WiFi part</div><div class='add'>+  is connected over SDIO, while BT is connected over serial. It speaks</div><div class='add'>+  H5 protocol with few extra commands to upload firmware and change</div><div class='add'>+  module speed.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - realtek,rtl8723bs-bt</div><div class='del'>-      - realtek,rtl8723cs-bt</div><div class='del'>-      - realtek,rtl8822cs-bt</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - realtek,rtl8723bs-bt</div><div class='add'>+          - realtek,rtl8723cs-bt</div><div class='add'>+          - realtek,rtl8723ds-bt</div><div class='add'>+          - realtek,rtl8822cs-bt</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - realtek,rtl8821cs-bt</div><div class='add'>+          - const: realtek,rtl8822cs-bt</div><div class='ctx'> </div><div class='ctx'>   device-wake-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml<br/>index ee2ccacc39ff..3f41294f5997 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/renesas,etheravb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/renesas,etheravb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/renesas,etheravb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/renesas,etheravb.yaml</a></div><div class='hunk'>@@ -40,11 +40,21 @@ properties:</div><div class='ctx'>               - renesas,etheravb-r8a77980     # R-Car V3H</div><div class='ctx'>               - renesas,etheravb-r8a77990     # R-Car E3</div><div class='ctx'>               - renesas,etheravb-r8a77995     # R-Car D3</div><div class='del'>-              - renesas,etheravb-r8a779a0     # R-Car V3U</div><div class='ctx'>           - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,etheravb-r8a779a0     # R-Car V3U</div><div class='add'>+              - renesas,etheravb-r8a779g0     # R-Car V4H</div><div class='add'>+          - const: renesas,etheravb-rcar-gen4 # R-Car Gen4</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,etheravb-r9a09g011 # RZ/V2M</div><div class='add'>+          - const: renesas,etheravb-rzv2m  # RZ/V2M compatible</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - renesas,r9a07g043-gbeth # RZ/G2UL</div><div class='ctx'>               - renesas,r9a07g044-gbeth # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,r9a07g054-gbeth # RZ/V2L</div><div class='hunk'>@@ -160,16 +170,33 @@ allOf:</div><div class='ctx'>             - const: arp_ns</div><div class='ctx'>         rx-internal-delay-ps: false</div><div class='ctx'>     else:</div><div class='del'>-      properties:</div><div class='del'>-        interrupts:</div><div class='del'>-          minItems: 25</div><div class='del'>-          maxItems: 25</div><div class='del'>-        interrupt-names:</div><div class='del'>-          items:</div><div class='del'>-            pattern: '^ch[0-9]+$'</div><div class='del'>-      required:</div><div class='del'>-        - interrupt-names</div><div class='del'>-        - rx-internal-delay-ps</div><div class='add'>+      if:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: renesas,etheravb-rzv2m</div><div class='add'>+      then:</div><div class='add'>+        properties:</div><div class='add'>+          interrupts:</div><div class='add'>+            minItems: 29</div><div class='add'>+            maxItems: 29</div><div class='add'>+          interrupt-names:</div><div class='add'>+            items:</div><div class='add'>+              pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$'</div><div class='add'>+          rx-internal-delay-ps: false</div><div class='add'>+        required:</div><div class='add'>+          - interrupt-names</div><div class='add'>+      else:</div><div class='add'>+        properties:</div><div class='add'>+          interrupts:</div><div class='add'>+            minItems: 25</div><div class='add'>+            maxItems: 25</div><div class='add'>+          interrupt-names:</div><div class='add'>+            items:</div><div class='add'>+              pattern: '^ch[0-9]+$'</div><div class='add'>+        required:</div><div class='add'>+          - interrupt-names</div><div class='add'>+          - rx-internal-delay-ps</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -185,7 +212,7 @@ allOf:</div><div class='ctx'>               - renesas,etheravb-r8a77965</div><div class='ctx'>               - renesas,etheravb-r8a77970</div><div class='ctx'>               - renesas,etheravb-r8a77980</div><div class='del'>-              - renesas,etheravb-r8a779a0</div><div class='add'>+              - renesas,etheravb-rcar-gen4</div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='ctx'>         - tx-internal-delay-ps</div><div class='hunk'>@@ -231,17 +258,35 @@ allOf:</div><div class='ctx'>             - const: chi</div><div class='ctx'>             - const: refclk</div><div class='ctx'>     else:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          minItems: 1</div><div class='del'>-          items:</div><div class='del'>-            - description: AVB functional clock</div><div class='del'>-            - description: Optional TXC reference clock</div><div class='del'>-        clock-names:</div><div class='del'>-          minItems: 1</div><div class='del'>-          items:</div><div class='del'>-            - const: fck</div><div class='del'>-            - const: refclk</div><div class='add'>+      if:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: renesas,etheravb-rzv2m</div><div class='add'>+      then:</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: Main clock</div><div class='add'>+              - description: Coherent Hub Interface clock</div><div class='add'>+              - description: gPTP reference clock</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: axi</div><div class='add'>+              - const: chi</div><div class='add'>+              - const: gptp</div><div class='add'>+      else:</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            minItems: 1</div><div class='add'>+            items:</div><div class='add'>+              - description: AVB functional clock</div><div class='add'>+              - description: Optional TXC reference clock</div><div class='add'>+          clock-names:</div><div class='add'>+            minItems: 1</div><div class='add'>+            items:</div><div class='add'>+              - const: fck</div><div class='add'>+              - const: refclk</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml b/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml<br/>new file mode 100644<br/>index 000000000000..e933a1e48d67<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml</a></div><div class='hunk'>@@ -0,0 +1,262 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/renesas,r8a779f0-ether-switch.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas Ethernet Switch</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,r8a779f0-ether-switch</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: base</div><div class='add'>+      - const: secure_base</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 47</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mfwd_error</div><div class='add'>+      - const: race_error</div><div class='add'>+      - const: coma_error</div><div class='add'>+      - const: gwca0_error</div><div class='add'>+      - const: gwca1_error</div><div class='add'>+      - const: etha0_error</div><div class='add'>+      - const: etha1_error</div><div class='add'>+      - const: etha2_error</div><div class='add'>+      - const: gptp0_status</div><div class='add'>+      - const: gptp1_status</div><div class='add'>+      - const: mfwd_status</div><div class='add'>+      - const: race_status</div><div class='add'>+      - const: coma_status</div><div class='add'>+      - const: gwca0_status</div><div class='add'>+      - const: gwca1_status</div><div class='add'>+      - const: etha0_status</div><div class='add'>+      - const: etha1_status</div><div class='add'>+      - const: etha2_status</div><div class='add'>+      - const: rmac0_status</div><div class='add'>+      - const: rmac1_status</div><div class='add'>+      - const: rmac2_status</div><div class='add'>+      - const: gwca0_rxtx0</div><div class='add'>+      - const: gwca0_rxtx1</div><div class='add'>+      - const: gwca0_rxtx2</div><div class='add'>+      - const: gwca0_rxtx3</div><div class='add'>+      - const: gwca0_rxtx4</div><div class='add'>+      - const: gwca0_rxtx5</div><div class='add'>+      - const: gwca0_rxtx6</div><div class='add'>+      - const: gwca0_rxtx7</div><div class='add'>+      - const: gwca1_rxtx0</div><div class='add'>+      - const: gwca1_rxtx1</div><div class='add'>+      - const: gwca1_rxtx2</div><div class='add'>+      - const: gwca1_rxtx3</div><div class='add'>+      - const: gwca1_rxtx4</div><div class='add'>+      - const: gwca1_rxtx5</div><div class='add'>+      - const: gwca1_rxtx6</div><div class='add'>+      - const: gwca1_rxtx7</div><div class='add'>+      - const: gwca0_rxts0</div><div class='add'>+      - const: gwca0_rxts1</div><div class='add'>+      - const: gwca1_rxts0</div><div class='add'>+      - const: gwca1_rxts1</div><div class='add'>+      - const: rmac0_mdio</div><div class='add'>+      - const: rmac1_mdio</div><div class='add'>+      - const: rmac2_mdio</div><div class='add'>+      - const: rmac0_phy</div><div class='add'>+      - const: rmac1_phy</div><div class='add'>+      - const: rmac2_phy</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 16</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ethernet-ports:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        description: Port number of ETHA (TSNA).</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port@[0-9a-f]+$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/net/ethernet-controller.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            description:</div><div class='add'>+              Port number of ETHA (TSNA).</div><div class='add'>+</div><div class='add'>+          phys:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            description:</div><div class='add'>+              Phandle of an Ethernet SERDES.</div><div class='add'>+</div><div class='add'>+          mdio:</div><div class='add'>+            $ref: /schemas/net/mdio.yaml#</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+          - phy-handle</div><div class='add'>+          - phy-mode</div><div class='add'>+          - phys</div><div class='add'>+          - mdio</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - power-domains</div><div class='add'>+  - ethernet-ports</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a779f0-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/r8a779f0-sysc.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@e6880000 {</div><div class='add'>+        compatible = "renesas,r8a779f0-ether-switch";</div><div class='add'>+        reg = &lt;0xe6880000 0x20000&gt;, &lt;0xe68c0000 0x20000&gt;;</div><div class='add'>+        reg-names = "base", "secure_base";</div><div class='add'>+        interrupts = &lt;GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "mfwd_error", "race_error",</div><div class='add'>+                          "coma_error", "gwca0_error",</div><div class='add'>+                          "gwca1_error", "etha0_error",</div><div class='add'>+                          "etha1_error", "etha2_error",</div><div class='add'>+                          "gptp0_status", "gptp1_status",</div><div class='add'>+                          "mfwd_status", "race_status",</div><div class='add'>+                          "coma_status", "gwca0_status",</div><div class='add'>+                          "gwca1_status", "etha0_status",</div><div class='add'>+                          "etha1_status", "etha2_status",</div><div class='add'>+                          "rmac0_status", "rmac1_status",</div><div class='add'>+                          "rmac2_status",</div><div class='add'>+                          "gwca0_rxtx0", "gwca0_rxtx1",</div><div class='add'>+                          "gwca0_rxtx2", "gwca0_rxtx3",</div><div class='add'>+                          "gwca0_rxtx4", "gwca0_rxtx5",</div><div class='add'>+                          "gwca0_rxtx6", "gwca0_rxtx7",</div><div class='add'>+                          "gwca1_rxtx0", "gwca1_rxtx1",</div><div class='add'>+                          "gwca1_rxtx2", "gwca1_rxtx3",</div><div class='add'>+                          "gwca1_rxtx4", "gwca1_rxtx5",</div><div class='add'>+                          "gwca1_rxtx6", "gwca1_rxtx7",</div><div class='add'>+                          "gwca0_rxts0", "gwca0_rxts1",</div><div class='add'>+                          "gwca1_rxts0", "gwca1_rxts1",</div><div class='add'>+                          "rmac0_mdio", "rmac1_mdio",</div><div class='add'>+                          "rmac2_mdio",</div><div class='add'>+                          "rmac0_phy", "rmac1_phy",</div><div class='add'>+                          "rmac2_phy";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 1505&gt;;</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A779F0_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 1505&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                phy-handle = &lt;&amp;eth_phy0&gt;;</div><div class='add'>+                phy-mode = "sgmii";</div><div class='add'>+                phys = &lt;&amp;eth_serdes 0&gt;;</div><div class='add'>+                mdio {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                phy-handle = &lt;&amp;eth_phy1&gt;;</div><div class='add'>+                phy-mode = "sgmii";</div><div class='add'>+                phys = &lt;&amp;eth_serdes 1&gt;;</div><div class='add'>+                mdio {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+            port@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                phy-handle = &lt;&amp;eth_phy2&gt;;</div><div class='add'>+                phy-mode = "sgmii";</div><div class='add'>+                phys = &lt;&amp;eth_serdes 2&gt;;</div><div class='add'>+                mdio {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/rfkill-gpio.yaml b/Documentation/devicetree/bindings/net/rfkill-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..9630c8466fac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/rfkill-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/rfkill-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/rfkill-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO controlled rfkill switch</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Johannes Berg &lt;johannes@sipsolutions.net&gt;</div><div class='add'>+  - Philipp Zabel &lt;p.zabel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rfkill-gpio</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    description: rfkill switch name, defaults to node name</div><div class='add'>+</div><div class='add'>+  radio-type:</div><div class='add'>+    description: rfkill radio type</div><div class='add'>+    enum:</div><div class='add'>+      - bluetooth</div><div class='add'>+      - fm</div><div class='add'>+      - gps</div><div class='add'>+      - nfc</div><div class='add'>+      - ultrawideband</div><div class='add'>+      - wimax</div><div class='add'>+      - wlan</div><div class='add'>+      - wwan</div><div class='add'>+</div><div class='add'>+  shutdown-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - radio-type</div><div class='add'>+  - shutdown-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    rfkill {</div><div class='add'>+        compatible = "rfkill-gpio";</div><div class='add'>+        label = "rfkill-pcie-wlan";</div><div class='add'>+        radio-type = "wlan";</div><div class='add'>+        shutdown-gpios = &lt;&amp;gpio2 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/rockchip,emac.yaml b/Documentation/devicetree/bindings/net/rockchip,emac.yaml<br/>new file mode 100644<br/>index 000000000000..364028b3bba4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/rockchip,emac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/rockchip,emac.yaml</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/rockchip,emac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3036/RK3066/RK3188 Ethernet Media Access Controller (EMAC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3036-emac</div><div class='add'>+      - rockchip,rk3066-emac</div><div class='add'>+      - rockchip,rk3188-emac</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: host clock</div><div class='add'>+      - description: reference clock</div><div class='add'>+      - description: mac TX/RX clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: hclk</div><div class='add'>+      - const: macref</div><div class='add'>+      - const: macclk</div><div class='add'>+</div><div class='add'>+  rockchip,grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the syscon GRF used to control speed and mode for the EMAC.</div><div class='add'>+</div><div class='add'>+  phy-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a regulator if the PHY needs one.</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - rockchip,grf</div><div class='add'>+  - phy</div><div class='add'>+  - phy-mode</div><div class='add'>+  - mdio</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3036-emac</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3188-cru-common.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@10204000 {</div><div class='add'>+      compatible = "rockchip,rk3188-emac";</div><div class='add'>+      reg = &lt;0xc0fc2000 0x3c&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;cru HCLK_EMAC&gt;, &lt;&amp;cru SCLK_MAC&gt;;</div><div class='add'>+      clock-names = "hclk", "macref";</div><div class='add'>+      rockchip,grf = &lt;&amp;grf&gt;;</div><div class='add'>+      pinctrl-0 = &lt;&amp;emac_xfer&gt;, &lt;&amp;emac_mdio&gt;, &lt;&amp;phy_int&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      phy = &lt;&amp;phy0&gt;;</div><div class='add'>+      phy-mode = "rmii";</div><div class='add'>+      phy-supply = &lt;&amp;vcc_rmii&gt;;</div><div class='add'>+</div><div class='add'>+      mdio {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        phy0: ethernet-phy@0 {</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml<br/>index 083623c8d718..2a21bbe02892 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/rockchip-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/rockchip-dwmac.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/rockchip-dwmac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Rockchip 10/100/1000 Ethernet driver(GMAC)</div><div class='ctx'> </div><div class='hunk'>@@ -25,7 +25,9 @@ select:</div><div class='ctx'>           - rockchip,rk3368-gmac</div><div class='ctx'>           - rockchip,rk3399-gmac</div><div class='ctx'>           - rockchip,rk3568-gmac</div><div class='add'>+          - rockchip,rk3588-gmac</div><div class='ctx'>           - rockchip,rv1108-gmac</div><div class='add'>+          - rockchip,rv1126-gmac</div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='ctx'> </div><div class='hunk'>@@ -50,6 +52,8 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - rockchip,rk3568-gmac</div><div class='add'>+              - rockchip,rk3588-gmac</div><div class='add'>+              - rockchip,rv1126-gmac</div><div class='ctx'>           - const: snps,dwmac-4.20a</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -81,6 +85,11 @@ properties:</div><div class='ctx'>     description: The phandle of the syscon node for the general register file.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='add'>+  rockchip,php-grf:</div><div class='add'>+    description:</div><div class='add'>+      The phandle of the syscon node for the peripheral general register file.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='ctx'>   tx_delay:</div><div class='ctx'>     description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/sff,sfp.txt b/Documentation/devicetree/bindings/net/sff,sfp.txt<br/>deleted file mode 100644<br/>index 832139919f20..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/sff,sfp.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/sff,sfp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,85 +0,0 @@</div><div class='del'>-Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)</div><div class='del'>-Transceiver</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : must be one of</div><div class='del'>-  "sff,sfp" for SFP modules</div><div class='del'>-  "sff,sff" for soldered down SFF modules</div><div class='del'>-</div><div class='del'>-- i2c-bus : phandle of an I2C bus controller for the SFP two wire serial</div><div class='del'>-  interface</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-</div><div class='del'>-- mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)</div><div class='del'>-  module presence input gpio signal, active (module absent) high. Must</div><div class='del'>-  not be present for SFF modules</div><div class='del'>-</div><div class='del'>-- los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal</div><div class='del'>-  Indication input gpio signal, active (signal lost) high</div><div class='del'>-</div><div class='del'>-- tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter</div><div class='del'>-  Fault input gpio signal, active (fault condition) high</div><div class='del'>-</div><div class='del'>-- tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable</div><div class='del'>-  output gpio signal, active (Tx disable) high</div><div class='del'>-</div><div class='del'>-- rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate</div><div class='del'>-  Select (AKA RS0) output gpio signal, low: low Rx rate, high: high Rx rate</div><div class='del'>-  Must not be present for SFF modules</div><div class='del'>-</div><div class='del'>-- rate-select1-gpios : GPIO phandle and a specifier of the Tx Signaling Rate</div><div class='del'>-  Select (AKA RS1) output gpio signal (SFP+ only), low: low Tx rate, high:</div><div class='del'>-  high Tx rate. Must not be present for SFF modules</div><div class='del'>-</div><div class='del'>-- maximum-power-milliwatt : Maximum module power consumption</div><div class='del'>-  Specifies the maximum power consumption allowable by a module in the</div><div class='del'>-  slot, in milli-Watts.  Presently, modules can be up to 1W, 1.5W or 2W.</div><div class='del'>-</div><div class='del'>-Example #1: Direct serdes to SFP connection</div><div class='del'>-</div><div class='del'>-sfp_eth3: sfp-eth3 {</div><div class='del'>-	compatible = "sff,sfp";</div><div class='del'>-	i2c-bus = &lt;&amp;sfp_1g_i2c&gt;;</div><div class='del'>-	los-gpios = &lt;&amp;cpm_gpio2 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	mod-def0-gpios = &lt;&amp;cpm_gpio2 21 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	maximum-power-milliwatt = &lt;1000&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;cpm_sfp_1g_pins &amp;cps_sfp_1g_pins&gt;;</div><div class='del'>-	tx-disable-gpios = &lt;&amp;cps_gpio1 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	tx-fault-gpios = &lt;&amp;cpm_gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cps_emac3 {</div><div class='del'>-	phy-names = "comphy";</div><div class='del'>-	phys = &lt;&amp;cps_comphy5 0&gt;;</div><div class='del'>-	sfp = &lt;&amp;sfp_eth3&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example #2: Serdes to PHY to SFP connection</div><div class='del'>-</div><div class='del'>-sfp_eth0: sfp-eth0 {</div><div class='del'>-	compatible = "sff,sfp";</div><div class='del'>-	i2c-bus = &lt;&amp;sfpp0_i2c&gt;;</div><div class='del'>-	los-gpios = &lt;&amp;cps_gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	mod-def0-gpios = &lt;&amp;cps_gpio1 27 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;cps_sfpp0_pins&gt;;</div><div class='del'>-	tx-disable-gpios = &lt;&amp;cps_gpio1 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	tx-fault-gpios  = &lt;&amp;cps_gpio1 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-p0_phy: ethernet-phy@0 {</div><div class='del'>-	compatible = "ethernet-phy-ieee802.3-c45";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;cpm_phy0_pins &amp;cps_phy0_pins&gt;;</div><div class='del'>-	reg = &lt;0&gt;;</div><div class='del'>-	interrupt = &lt;&amp;cpm_gpio2 18 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-	sfp = &lt;&amp;sfp_eth0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;cpm_eth0 {</div><div class='del'>-	phy = &lt;&amp;p0_phy&gt;;</div><div class='del'>-	phy-mode = "10gbase-kr";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/sff,sfp.yaml b/Documentation/devicetree/bindings/net/sff,sfp.yaml<br/>new file mode 100644<br/>index 000000000000..973e478a399d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/sff,sfp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/sff,sfp.yaml</a></div><div class='hunk'>@@ -0,0 +1,143 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/sff,sfp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)</div><div class='add'>+  Transceiver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Russell King &lt;linux@armlinux.org.uk&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - sff,sfp  # for SFP modules</div><div class='add'>+      - sff,sff  # for soldered down SFF modules</div><div class='add'>+</div><div class='add'>+  i2c-bus:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle of an I2C bus controller for the SFP two wire serial</div><div class='add'>+</div><div class='add'>+  maximum-power-milliwatt:</div><div class='add'>+    minimum: 1000</div><div class='add'>+    default: 1000</div><div class='add'>+    description:</div><div class='add'>+      Maximum module power consumption Specifies the maximum power consumption</div><div class='add'>+      allowable by a module in the slot, in milli-Watts. Presently, modules can</div><div class='add'>+      be up to 1W, 1.5W or 2W.</div><div class='add'>+</div><div class='add'>+  "mod-def0-gpios":</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS) module</div><div class='add'>+      presence input gpio signal, active (module absent) high. Must not be</div><div class='add'>+      present for SFF modules</div><div class='add'>+</div><div class='add'>+  "los-gpios":</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO phandle and a specifier of the Receiver Loss of Signal Indication</div><div class='add'>+      input gpio signal, active (signal lost) high</div><div class='add'>+</div><div class='add'>+  "tx-fault-gpios":</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO phandle and a specifier of the Module Transmitter Fault input gpio</div><div class='add'>+      signal, active (fault condition) high</div><div class='add'>+</div><div class='add'>+  "tx-disable-gpios":</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO phandle and a specifier of the Transmitter Disable output gpio</div><div class='add'>+      signal, active (Tx disable) high</div><div class='add'>+</div><div class='add'>+  "rate-select0-gpios":</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO phandle and a specifier of the Rx Signaling Rate Select (AKA RS0)</div><div class='add'>+      output gpio signal, low - low Rx rate, high - high Rx rate Must not be</div><div class='add'>+      present for SFF modules</div><div class='add'>+</div><div class='add'>+  "rate-select1-gpios":</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO phandle and a specifier of the Tx Signaling Rate Select (AKA RS1)</div><div class='add'>+      output gpio signal (SFP+ only), low - low Tx rate, high - high Tx rate. Must</div><div class='add'>+      not be present for SFF modules</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: sff,sff</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        mod-def0-gpios: false</div><div class='add'>+        rate-select0-gpios: false</div><div class='add'>+        rate-select1-gpios: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - i2c-bus</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - | # Direct serdes to SFP connection</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    sfp1: sfp {</div><div class='add'>+      compatible = "sff,sfp";</div><div class='add'>+      i2c-bus = &lt;&amp;sfp_1g_i2c&gt;;</div><div class='add'>+      los-gpios = &lt;&amp;cpm_gpio2 22 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+      mod-def0-gpios = &lt;&amp;cpm_gpio2 21 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      maximum-power-milliwatt = &lt;1000&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      pinctrl-0 = &lt;&amp;cpm_sfp_1g_pins &amp;cps_sfp_1g_pins&gt;;</div><div class='add'>+      tx-disable-gpios = &lt;&amp;cps_gpio1 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+      tx-fault-gpios = &lt;&amp;cpm_gpio2 19 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    ethernet {</div><div class='add'>+      phy-names = "comphy";</div><div class='add'>+      phys = &lt;&amp;cps_comphy5 0&gt;;</div><div class='add'>+      sfp = &lt;&amp;sfp1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - | # Serdes to PHY to SFP connection</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    sfp2: sfp {</div><div class='add'>+      compatible = "sff,sfp";</div><div class='add'>+      i2c-bus = &lt;&amp;sfp_i2c&gt;;</div><div class='add'>+      los-gpios = &lt;&amp;cps_gpio1 28 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+      mod-def0-gpios = &lt;&amp;cps_gpio1 27 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      pinctrl-0 = &lt;&amp;cps_sfpp0_pins&gt;;</div><div class='add'>+      tx-disable-gpios = &lt;&amp;cps_gpio1 29 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+      tx-fault-gpios  = &lt;&amp;cps_gpio1 26 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    mdio {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      phy: ethernet-phy@0 {</div><div class='add'>+        compatible = "ethernet-phy-ieee802.3-c45";</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;cpm_phy0_pins &amp;cps_phy0_pins&gt;;</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        interrupt = &lt;&amp;cpm_gpio2 18 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+        sfp = &lt;&amp;sfp2&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    ethernet {</div><div class='add'>+      phy = &lt;&amp;phy&gt;;</div><div class='add'>+      phy-mode = "10gbase-kr";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/smsc,lan91c111.yaml b/Documentation/devicetree/bindings/net/smsc,lan91c111.yaml<br/>new file mode 100644<br/>index 000000000000..6df533162632<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/smsc,lan91c111.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/smsc,lan91c111.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/smsc,lan91c111.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Smart Mixed-Signal Connectivity (SMSC) LAN91C9x/91C1xx Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nicolas Pitre &lt;nico@fluxnic.net&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: smsc,lan91c111</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg-shift: true</div><div class='add'>+</div><div class='add'>+  reg-io-width:</div><div class='add'>+    enum: [ 1, 2, 4 ]</div><div class='add'>+    default: 4</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: GPIO connected to control RESET pin</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-gpios:</div><div class='add'>+    description: GPIO connect to control PWRDWN pin</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  pxa-u16-align4:</div><div class='add'>+    description: put in place the workaround the force all u16 writes to be</div><div class='add'>+      32 bits aligned</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@4010000 {</div><div class='add'>+          compatible = "smsc,lan91c111";</div><div class='add'>+          reg = &lt;0x40100000 0x10000&gt;;</div><div class='add'>+          phy-mode = "mii";</div><div class='add'>+          interrupts = &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+          reg-io-width = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/smsc-lan91c111.txt b/Documentation/devicetree/bindings/net/smsc-lan91c111.txt<br/>deleted file mode 100644<br/>index 309e37eb7c7c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/smsc-lan91c111.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/smsc-lan91c111.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-SMSC LAN91c111 Ethernet mac</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible = "smsc,lan91c111";</div><div class='del'>-- reg : physical address and size of registers</div><div class='del'>-- interrupts : interrupt connection</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- phy-device : see ethernet.txt file in the same directory</div><div class='del'>-- reg-io-width : Mask of sizes (in bytes) of the IO accesses that</div><div class='del'>-  are supported on the device.  Valid value for SMSC LAN91c111 are</div><div class='del'>-  1, 2 or 4.  If it's omitted or invalid, the size would be 2 meaning</div><div class='del'>-  16-bit access only.</div><div class='del'>-- power-gpios: GPIO to control the PWRDWN pin</div><div class='del'>-- reset-gpios: GPIO to control the RESET pin</div><div class='del'>-- pxa-u16-align4 : Boolean, put in place the workaround the force all</div><div class='del'>-		   u16 writes to be 32 bits aligned</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml<br/>index 2d5248f5b919..363b3e3ea3a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/snps,dwmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/snps,dwmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/snps,dwmac.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/snps,dwmac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Synopsys DesignWare MAC Device Tree Bindings</div><div class='add'>+title: Synopsys DesignWare MAC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Torgue &lt;alexandre.torgue@foss.st.com&gt;</div><div class='hunk'>@@ -30,6 +30,7 @@ select:</div><div class='ctx'>           - snps,dwmac-4.10a</div><div class='ctx'>           - snps,dwmac-4.20a</div><div class='ctx'>           - snps,dwmac-5.10a</div><div class='add'>+          - snps,dwmac-5.20</div><div class='ctx'>           - snps,dwxgmac</div><div class='ctx'>           - snps,dwxgmac-2.10</div><div class='ctx'> </div><div class='hunk'>@@ -53,20 +54,23 @@ properties:</div><div class='ctx'>         - allwinner,sun8i-r40-gmac</div><div class='ctx'>         - allwinner,sun8i-v3s-emac</div><div class='ctx'>         - allwinner,sun50i-a64-emac</div><div class='del'>-        - loongson,ls2k-dwmac</div><div class='del'>-        - loongson,ls7a-dwmac</div><div class='ctx'>         - amlogic,meson6-dwmac</div><div class='ctx'>         - amlogic,meson8b-dwmac</div><div class='ctx'>         - amlogic,meson8m2-dwmac</div><div class='ctx'>         - amlogic,meson-gxbb-dwmac</div><div class='ctx'>         - amlogic,meson-axg-dwmac</div><div class='del'>-        - loongson,ls2k-dwmac</div><div class='del'>-        - loongson,ls7a-dwmac</div><div class='ctx'>         - ingenic,jz4775-mac</div><div class='ctx'>         - ingenic,x1000-mac</div><div class='ctx'>         - ingenic,x1600-mac</div><div class='ctx'>         - ingenic,x1830-mac</div><div class='ctx'>         - ingenic,x2000-mac</div><div class='add'>+        - loongson,ls2k-dwmac</div><div class='add'>+        - loongson,ls7a-dwmac</div><div class='add'>+        - qcom,qcs404-ethqos</div><div class='add'>+        - qcom,sc8280xp-ethqos</div><div class='add'>+        - qcom,sm8150-ethqos</div><div class='add'>+        - renesas,r9a06g032-gmac</div><div class='add'>+        - renesas,rzn1-gmac</div><div class='ctx'>         - rockchip,px30-gmac</div><div class='ctx'>         - rockchip,rk3128-gmac</div><div class='ctx'>         - rockchip,rk3228-gmac</div><div class='hunk'>@@ -74,6 +78,7 @@ properties:</div><div class='ctx'>         - rockchip,rk3328-gmac</div><div class='ctx'>         - rockchip,rk3366-gmac</div><div class='ctx'>         - rockchip,rk3368-gmac</div><div class='add'>+        - rockchip,rk3588-gmac</div><div class='ctx'>         - rockchip,rk3399-gmac</div><div class='ctx'>         - rockchip,rv1108-gmac</div><div class='ctx'>         - snps,dwmac</div><div class='hunk'>@@ -86,8 +91,10 @@ properties:</div><div class='ctx'>         - snps,dwmac-4.10a</div><div class='ctx'>         - snps,dwmac-4.20a</div><div class='ctx'>         - snps,dwmac-5.10a</div><div class='add'>+        - snps,dwmac-5.20</div><div class='ctx'>         - snps,dwxgmac</div><div class='ctx'>         - snps,dwxgmac-2.10</div><div class='add'>+        - starfive,jh7110-dwmac</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -104,7 +111,7 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: macirq</div><div class='del'>-      - const: eth_wake_irq</div><div class='add'>+      - enum: [eth_wake_irq, eth_lpi]</div><div class='ctx'>       - const: eth_lpi</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -130,12 +137,19 @@ properties:</div><div class='ctx'>         - ptp_ref</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description:</div><div class='del'>-      MAC Reset signal.</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: GMAC stmmaceth reset</div><div class='add'>+      - description: AHB reset</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='del'>-    const: stmmaceth</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: stmmaceth</div><div class='add'>+      - const: ahb</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   mac-mode:</div><div class='ctx'>     $ref: ethernet-controller.yaml#/properties/phy-connection-type</div><div class='hunk'>@@ -163,56 +177,238 @@ properties:</div><div class='ctx'>   snps,mtl-rx-config:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='del'>-      Multiple RX Queues parameters. Phandle to a node that can</div><div class='del'>-      contain the following properties</div><div class='del'>-        * snps,rx-queues-to-use, number of RX queues to be used in the</div><div class='del'>-          driver</div><div class='del'>-        * Choose one of these RX scheduling algorithms</div><div class='del'>-          * snps,rx-sched-sp, Strict priority</div><div class='del'>-          * snps,rx-sched-wsp, Weighted Strict priority</div><div class='del'>-        * For each RX queue</div><div class='del'>-          * Choose one of these modes</div><div class='del'>-            * snps,dcb-algorithm, Queue to be enabled as DCB</div><div class='del'>-            * snps,avb-algorithm, Queue to be enabled as AVB</div><div class='del'>-          * snps,map-to-dma-channel, Channel to map</div><div class='del'>-          * Specifiy specific packet routing</div><div class='del'>-            * snps,route-avcp, AV Untagged Control packets</div><div class='del'>-            * snps,route-ptp, PTP Packets</div><div class='del'>-            * snps,route-dcbcp, DCB Control Packets</div><div class='del'>-            * snps,route-up, Untagged Packets</div><div class='del'>-            * snps,route-multi-broad, Multicast &amp; Broadcast Packets</div><div class='del'>-          * snps,priority, bitmask of the tagged frames priorities assigned to</div><div class='del'>-            the queue</div><div class='add'>+      Multiple RX Queues parameters. Phandle to a node that</div><div class='add'>+      implements the 'rx-queues-config' object described in</div><div class='add'>+      this binding.</div><div class='add'>+</div><div class='add'>+  rx-queues-config:</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      snps,rx-queues-to-use:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: number of RX queues to be used in the driver</div><div class='add'>+      snps,rx-sched-sp:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Strict priority</div><div class='add'>+      snps,rx-sched-wsp:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Weighted Strict priority</div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          required:</div><div class='add'>+            - snps,rx-sched-sp</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            snps,rx-sched-wsp: false</div><div class='add'>+      - if:</div><div class='add'>+          required:</div><div class='add'>+            - snps,rx-sched-wsp</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            snps,rx-sched-sp: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^queue[0-9]$":</div><div class='add'>+        description: Each subnode represents a queue.</div><div class='add'>+        type: object</div><div class='add'>+        properties:</div><div class='add'>+          snps,dcb-algorithm:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: Queue to be enabled as DCB</div><div class='add'>+          snps,avb-algorithm:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: Queue to be enabled as AVB</div><div class='add'>+          snps,map-to-dma-channel:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: DMA channel id to map</div><div class='add'>+          snps,route-avcp:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: AV Untagged Control packets</div><div class='add'>+          snps,route-ptp:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: PTP Packets</div><div class='add'>+          snps,route-dcbcp:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: DCB Control Packets</div><div class='add'>+          snps,route-up:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: Untagged Packets</div><div class='add'>+          snps,route-multi-broad:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: Multicast &amp; Broadcast Packets</div><div class='add'>+          snps,priority:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: Bitmask of the tagged frames priorities assigned to the queue</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,dcb-algorithm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,avb-algorithm: false</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,avb-algorithm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,dcb-algorithm: false</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,route-avcp</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,route-ptp: false</div><div class='add'>+                snps,route-dcbcp: false</div><div class='add'>+                snps,route-up: false</div><div class='add'>+                snps,route-multi-broad: false</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,route-ptp</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,route-avcp: false</div><div class='add'>+                snps,route-dcbcp: false</div><div class='add'>+                snps,route-up: false</div><div class='add'>+                snps,route-multi-broad: false</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,route-dcbcp</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,route-avcp: false</div><div class='add'>+                snps,route-ptp: false</div><div class='add'>+                snps,route-up: false</div><div class='add'>+                snps,route-multi-broad: false</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,route-up</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,route-avcp: false</div><div class='add'>+                snps,route-ptp: false</div><div class='add'>+                snps,route-dcbcp: false</div><div class='add'>+                snps,route-multi-broad: false</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,route-multi-broad</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,route-avcp: false</div><div class='add'>+                snps,route-ptp: false</div><div class='add'>+                snps,route-dcbcp: false</div><div class='add'>+                snps,route-up: false</div><div class='add'>+        additionalProperties: false</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>   snps,mtl-tx-config:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='del'>-      Multiple TX Queues parameters. Phandle to a node that can</div><div class='del'>-      contain the following properties</div><div class='del'>-        * snps,tx-queues-to-use, number of TX queues to be used in the</div><div class='del'>-          driver</div><div class='del'>-        * Choose one of these TX scheduling algorithms</div><div class='del'>-          * snps,tx-sched-wrr, Weighted Round Robin</div><div class='del'>-          * snps,tx-sched-wfq, Weighted Fair Queuing</div><div class='del'>-          * snps,tx-sched-dwrr, Deficit Weighted Round Robin</div><div class='del'>-          * snps,tx-sched-sp, Strict priority</div><div class='del'>-        * For each TX queue</div><div class='del'>-          * snps,weight, TX queue weight (if using a DCB weight</div><div class='del'>-            algorithm)</div><div class='del'>-          * Choose one of these modes</div><div class='del'>-            * snps,dcb-algorithm, TX queue will be working in DCB</div><div class='del'>-            * snps,avb-algorithm, TX queue will be working in AVB</div><div class='del'>-              [Attention] Queue 0 is reserved for legacy traffic</div><div class='del'>-                          and so no AVB is available in this queue.</div><div class='del'>-          * Configure Credit Base Shaper (if AVB Mode selected)</div><div class='del'>-            * snps,send_slope, enable Low Power Interface</div><div class='del'>-            * snps,idle_slope, unlock on WoL</div><div class='del'>-            * snps,high_credit, max write outstanding req. limit</div><div class='del'>-            * snps,low_credit, max read outstanding req. limit</div><div class='del'>-          * snps,priority, bitmask of the priorities assigned to the queue.</div><div class='del'>-            When a PFC frame is received with priorities matching the bitmask,</div><div class='del'>-            the queue is blocked from transmitting for the pause time specified</div><div class='del'>-            in the PFC frame.</div><div class='add'>+      Multiple TX Queues parameters. Phandle to a node that</div><div class='add'>+      implements the 'tx-queues-config' object described in</div><div class='add'>+      this binding.</div><div class='add'>+</div><div class='add'>+  tx-queues-config:</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      snps,tx-queues-to-use:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: number of TX queues to be used in the driver</div><div class='add'>+      snps,tx-sched-wrr:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Weighted Round Robin</div><div class='add'>+      snps,tx-sched-wfq:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Weighted Fair Queuing</div><div class='add'>+      snps,tx-sched-dwrr:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Deficit Weighted Round Robin</div><div class='add'>+      snps,tx-sched-sp:</div><div class='add'>+        type: boolean</div><div class='add'>+        description: Strict priority</div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          required:</div><div class='add'>+            - snps,tx-sched-wrr</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            snps,tx-sched-wfq: false</div><div class='add'>+            snps,tx-sched-dwrr: false</div><div class='add'>+            snps,tx-sched-sp: false</div><div class='add'>+      - if:</div><div class='add'>+          required:</div><div class='add'>+            - snps,tx-sched-wfq</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            snps,tx-sched-wrr: false</div><div class='add'>+            snps,tx-sched-dwrr: false</div><div class='add'>+            snps,tx-sched-sp: false</div><div class='add'>+      - if:</div><div class='add'>+          required:</div><div class='add'>+            - snps,tx-sched-dwrr</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            snps,tx-sched-wrr: false</div><div class='add'>+            snps,tx-sched-wfq: false</div><div class='add'>+            snps,tx-sched-sp: false</div><div class='add'>+      - if:</div><div class='add'>+          required:</div><div class='add'>+            - snps,tx-sched-sp</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            snps,tx-sched-wrr: false</div><div class='add'>+            snps,tx-sched-wfq: false</div><div class='add'>+            snps,tx-sched-dwrr: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^queue[0-9]$":</div><div class='add'>+        description: Each subnode represents a queue.</div><div class='add'>+        type: object</div><div class='add'>+        properties:</div><div class='add'>+          snps,weight:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: TX queue weight (if using a DCB weight algorithm)</div><div class='add'>+          snps,dcb-algorithm:</div><div class='add'>+            type: boolean</div><div class='add'>+            description: TX queue will be working in DCB</div><div class='add'>+          snps,avb-algorithm:</div><div class='add'>+            type: boolean</div><div class='add'>+            description:</div><div class='add'>+              TX queue will be working in AVB.</div><div class='add'>+              Queue 0 is reserved for legacy traffic and so no AVB is</div><div class='add'>+              available in this queue.</div><div class='add'>+          snps,send_slope:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: enable Low Power Interface</div><div class='add'>+          snps,idle_slope:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: unlock on WoL</div><div class='add'>+          snps,high_credit:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: max write outstanding req. limit</div><div class='add'>+          snps,low_credit:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description: max read outstanding req. limit</div><div class='add'>+          snps,priority:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            description:</div><div class='add'>+              Bitmask of the tagged frames priorities assigned to the queue.</div><div class='add'>+              When a PFC frame is received with priorities matching the bitmask,</div><div class='add'>+              the queue is blocked from transmitting for the pause time specified</div><div class='add'>+              in the PFC frame.</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,dcb-algorithm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,avb-algorithm: false</div><div class='add'>+          - if:</div><div class='add'>+              required:</div><div class='add'>+                - snps,avb-algorithm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                snps,dcb-algorithm: false</div><div class='add'>+                snps,weight: false</div><div class='add'>+        additionalProperties: false</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>   snps,reset-gpio:</div><div class='ctx'>     deprecated: true</div><div class='hunk'>@@ -285,6 +481,11 @@ properties:</div><div class='ctx'>       is supported. For example, this is used in case of SGMII and</div><div class='ctx'>       MAC2MAC connection.</div><div class='ctx'> </div><div class='add'>+  snps,clk-csr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Frequency division factor for MDC clock.</div><div class='add'>+</div><div class='ctx'>   mdio:</div><div class='ctx'>     $ref: mdio.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='hunk'>@@ -298,6 +499,60 @@ properties:</div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='ctx'> </div><div class='add'>+  stmmac-axi-config:</div><div class='add'>+    type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      AXI BUS Mode parameters.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      snps,lpi_en:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          enable Low Power Interface</div><div class='add'>+</div><div class='add'>+      snps,xit_frm:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          unlock on WoL</div><div class='add'>+</div><div class='add'>+      snps,wr_osr_lmt:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          max write outstanding req. limit</div><div class='add'>+</div><div class='add'>+      snps,rd_osr_lmt:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          max read outstanding req. limit</div><div class='add'>+</div><div class='add'>+      snps,kbbe:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          do not cross 1KiB boundary.</div><div class='add'>+</div><div class='add'>+      snps,blen:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        description:</div><div class='add'>+          this is a vector of supported burst length.</div><div class='add'>+        minItems: 7</div><div class='add'>+        maxItems: 7</div><div class='add'>+</div><div class='add'>+      snps,fb:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          fixed-burst</div><div class='add'>+</div><div class='add'>+      snps,mb:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          mixed-burst</div><div class='add'>+</div><div class='add'>+      snps,rb:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          rebuild INCRx Burst</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -307,10 +562,10 @@ required:</div><div class='ctx'> </div><div class='ctx'> dependencies:</div><div class='ctx'>   snps,reset-active-low: ["snps,reset-gpio"]</div><div class='del'>-  snps,reset-delay-us: ["snps,reset-gpio"]</div><div class='add'>+  snps,reset-delays-us: ["snps,reset-gpio"]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -327,9 +582,11 @@ allOf:</div><div class='ctx'>               - ingenic,x1600-mac</div><div class='ctx'>               - ingenic,x1830-mac</div><div class='ctx'>               - ingenic,x2000-mac</div><div class='add'>+              - qcom,sc8280xp-ethqos</div><div class='ctx'>               - snps,dwmac-3.50a</div><div class='ctx'>               - snps,dwmac-4.10a</div><div class='ctx'>               - snps,dwmac-4.20a</div><div class='add'>+              - snps,dwmac-5.20</div><div class='ctx'>               - snps,dwxgmac</div><div class='ctx'>               - snps,dwxgmac-2.10</div><div class='ctx'>               - st,spear600-gmac</div><div class='hunk'>@@ -380,10 +637,14 @@ allOf:</div><div class='ctx'>               - ingenic,x1600-mac</div><div class='ctx'>               - ingenic,x1830-mac</div><div class='ctx'>               - ingenic,x2000-mac</div><div class='add'>+              - qcom,qcs404-ethqos</div><div class='add'>+              - qcom,sc8280xp-ethqos</div><div class='add'>+              - qcom,sm8150-ethqos</div><div class='ctx'>               - snps,dwmac-4.00</div><div class='ctx'>               - snps,dwmac-4.10a</div><div class='ctx'>               - snps,dwmac-4.20a</div><div class='ctx'>               - snps,dwmac-5.10a</div><div class='add'>+              - snps,dwmac-5.20</div><div class='ctx'>               - snps,dwxgmac</div><div class='ctx'>               - snps,dwxgmac-2.10</div><div class='ctx'>               - st,spear600-gmac</div><div class='hunk'>@@ -400,41 +661,6 @@ additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    stmmac_axi_setup: stmmac-axi-config {</div><div class='del'>-        snps,wr_osr_lmt = &lt;0xf&gt;;</div><div class='del'>-        snps,rd_osr_lmt = &lt;0xf&gt;;</div><div class='del'>-        snps,blen = &lt;256 128 64 32 0 0 0&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-    mtl_rx_setup: rx-queues-config {</div><div class='del'>-        snps,rx-queues-to-use = &lt;1&gt;;</div><div class='del'>-        snps,rx-sched-sp;</div><div class='del'>-        queue0 {</div><div class='del'>-            snps,dcb-algorithm;</div><div class='del'>-            snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='del'>-            snps,priority = &lt;0x0&gt;;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-    mtl_tx_setup: tx-queues-config {</div><div class='del'>-        snps,tx-queues-to-use = &lt;2&gt;;</div><div class='del'>-        snps,tx-sched-wrr;</div><div class='del'>-        queue0 {</div><div class='del'>-            snps,weight = &lt;0x10&gt;;</div><div class='del'>-            snps,dcb-algorithm;</div><div class='del'>-            snps,priority = &lt;0x0&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        queue1 {</div><div class='del'>-            snps,avb-algorithm;</div><div class='del'>-            snps,send_slope = &lt;0x1000&gt;;</div><div class='del'>-            snps,idle_slope = &lt;0x1000&gt;;</div><div class='del'>-            snps,high_credit = &lt;0x3E800&gt;;</div><div class='del'>-            snps,low_credit = &lt;0xFFC18000&gt;;</div><div class='del'>-            snps,priority = &lt;0x1&gt;;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='del'>-</div><div class='ctx'>     gmac0: ethernet@e0800000 {</div><div class='ctx'>         compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";</div><div class='ctx'>         reg = &lt;0xe0800000 0x8000&gt;;</div><div class='hunk'>@@ -453,6 +679,42 @@ examples:</div><div class='ctx'>         snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='ctx'>         snps,mtl-rx-config = &lt;&amp;mtl_rx_setup&gt;;</div><div class='ctx'>         snps,mtl-tx-config = &lt;&amp;mtl_tx_setup&gt;;</div><div class='add'>+</div><div class='add'>+        stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+            snps,wr_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+            snps,rd_osr_lmt = &lt;0xf&gt;;</div><div class='add'>+            snps,blen = &lt;256 128 64 32 0 0 0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mtl_rx_setup: rx-queues-config {</div><div class='add'>+            snps,rx-queues-to-use = &lt;1&gt;;</div><div class='add'>+            snps,rx-sched-sp;</div><div class='add'>+            queue0 {</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,map-to-dma-channel = &lt;0x0&gt;;</div><div class='add'>+                snps,priority = &lt;0x0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mtl_tx_setup: tx-queues-config {</div><div class='add'>+            snps,tx-queues-to-use = &lt;2&gt;;</div><div class='add'>+            snps,tx-sched-wrr;</div><div class='add'>+            queue0 {</div><div class='add'>+                snps,weight = &lt;0x10&gt;;</div><div class='add'>+                snps,dcb-algorithm;</div><div class='add'>+                snps,priority = &lt;0x0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            queue1 {</div><div class='add'>+                snps,avb-algorithm;</div><div class='add'>+                snps,send_slope = &lt;0x1000&gt;;</div><div class='add'>+                snps,idle_slope = &lt;0x1000&gt;;</div><div class='add'>+                snps,high_credit = &lt;0x3E800&gt;;</div><div class='add'>+                snps,low_credit = &lt;0xFFC18000&gt;;</div><div class='add'>+                snps,priority = &lt;0x1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='ctx'>         mdio0 {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml b/Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml<br/>new file mode 100644<br/>index 000000000000..a65e6aa215a7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/socionext,synquacer-netsec.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/socionext,synquacer-netsec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext NetSec Ethernet Controller IP</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jassi Brar &lt;jaswinder.singh@linaro.org&gt;</div><div class='add'>+  - Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: socionext,synquacer-netsec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: control register area</div><div class='add'>+      - description: EEPROM holding the MAC address and microengine firmware</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: phy_ref_clk</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: mdio.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - mdio</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@522d0000 {</div><div class='add'>+        compatible = "socionext,synquacer-netsec";</div><div class='add'>+        reg = &lt;0x522d0000 0x10000&gt;, &lt;0x10000000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk_netsec&gt;;</div><div class='add'>+        clock-names = "phy_ref_clk";</div><div class='add'>+        phy-mode = "rgmii";</div><div class='add'>+        max-speed = &lt;1000&gt;;</div><div class='add'>+        max-frame-size = &lt;9000&gt;;</div><div class='add'>+        phy-handle = &lt;&amp;phy1&gt;;</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            phy1: ethernet-phy@1 {</div><div class='add'>+                compatible = "ethernet-phy-ieee802.3-c22";</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml b/Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml<br/>index e602761f7b14..b0ebcef6801c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/socionext,uniphier-ave4.yaml</a></div><div class='hunk'>@@ -13,9 +13,6 @@ description: |</div><div class='ctx'>   This describes the devicetree bindings for AVE ethernet controller</div><div class='ctx'>   implemented on Socionext UniPhier SoCs.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: ethernet-controller.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -44,25 +41,13 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='del'>-  clock-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:          # for Pro4</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: ether</div><div class='del'>-          - const: ether-gb</div><div class='del'>-          - const: ether-phy</div><div class='del'>-      - const: ether    # for others</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:          # for Pro4</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: ether</div><div class='del'>-      - const: ether    # for others</div><div class='add'>+  reset-names: true</div><div class='ctx'> </div><div class='ctx'>   socionext,syscon-phy-mode:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='hunk'>@@ -78,6 +63,42 @@ properties:</div><div class='ctx'>     $ref: mdio.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pro4-ave4</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: ether</div><div class='add'>+            - const: ether-gb</div><div class='add'>+            - const: ether-phy</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: ether</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          const: ether</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          const: ether</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -90,7 +111,7 @@ required:</div><div class='ctx'>   - reset-names</div><div class='ctx'>   - mdio</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/socionext-netsec.txt b/Documentation/devicetree/bindings/net/socionext-netsec.txt<br/>deleted file mode 100644<br/>index a3c1dffaa4bb..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/socionext-netsec.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/socionext-netsec.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,56 +0,0 @@</div><div class='del'>-* Socionext NetSec Ethernet Controller IP</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "socionext,synquacer-netsec"</div><div class='del'>-- reg: Address and length of the control register area, followed by the</div><div class='del'>-       address and length of the EEPROM holding the MAC address and</div><div class='del'>-       microengine firmware</div><div class='del'>-- interrupts: Should contain ethernet controller interrupt</div><div class='del'>-- clocks: phandle to the PHY reference clock</div><div class='del'>-- clock-names: Should be "phy_ref_clk"</div><div class='del'>-- phy-mode: See ethernet.txt file in the same directory</div><div class='del'>-- phy-handle: See ethernet.txt in the same directory.</div><div class='del'>-</div><div class='del'>-- mdio device tree subnode: When the Netsec has a phy connected to its local</div><div class='del'>-		mdio, there must be device tree subnode with the following</div><div class='del'>-		required properties:</div><div class='del'>-</div><div class='del'>-	- #address-cells: Must be &lt;1&gt;.</div><div class='del'>-	- #size-cells: Must be &lt;0&gt;.</div><div class='del'>-</div><div class='del'>-	For each phy on the mdio bus, there must be a node with the following</div><div class='del'>-	fields:</div><div class='del'>-	- compatible: Refer to phy.txt</div><div class='del'>-	- reg: phy id used to communicate to phy.</div><div class='del'>-</div><div class='del'>-Optional properties: (See ethernet.txt file in the same directory)</div><div class='del'>-- dma-coherent: Boolean property, must only be present if memory</div><div class='del'>-	accesses performed by the device are cache coherent.</div><div class='del'>-- max-speed: See ethernet.txt in the same directory.</div><div class='del'>-- max-frame-size: See ethernet.txt in the same directory.</div><div class='del'>-</div><div class='del'>-The MAC address will be determined using the optional properties</div><div class='del'>-defined in ethernet.txt. The 'phy-mode' property is required, but may</div><div class='del'>-be set to the empty string if the PHY configuration is programmed by</div><div class='del'>-the firmware or set by hardware straps, and needs to be preserved.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	eth0: ethernet@522d0000 {</div><div class='del'>-		compatible = "socionext,synquacer-netsec";</div><div class='del'>-		reg = &lt;0 0x522d0000 0x0 0x10000&gt;, &lt;0 0x10000000 0x0 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk_netsec&gt;;</div><div class='del'>-		clock-names = "phy_ref_clk";</div><div class='del'>-		phy-mode = "rgmii";</div><div class='del'>-		max-speed = &lt;1000&gt;;</div><div class='del'>-		max-frame-size = &lt;9000&gt;;</div><div class='del'>-		phy-handle = &lt;&amp;phy1&gt;;</div><div class='del'>-</div><div class='del'>-		mdio {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-			phy1: ethernet-phy@1 {</div><div class='del'>-				compatible = "ethernet-phy-ieee802.3-c22";</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml<br/>new file mode 100644<br/>index 000000000000..5e7cfbbebce6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 StarFive Technology Co., Ltd.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive JH7110 DWMAC glue layer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Emil Renner Berthing &lt;kernel@esmil.dk&gt;</div><div class='add'>+  - Samin Guo &lt;samin.guo@starfivetech.com&gt;</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - starfive,jh7110-dwmac</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - starfive,jh7110-dwmac</div><div class='add'>+      - const: snps,dwmac-5.20</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: GMAC main clock</div><div class='add'>+      - description: GMAC AHB clock</div><div class='add'>+      - description: PTP clock</div><div class='add'>+      - description: TX clock</div><div class='add'>+      - description: GTX clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: stmmaceth</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: ptp_ref</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: gtx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: MAC Reset signal.</div><div class='add'>+      - description: AHB Reset signal.</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: stmmaceth</div><div class='add'>+      - const: ahb</div><div class='add'>+</div><div class='add'>+  starfive,tx-use-rgmii-clk:</div><div class='add'>+    description:</div><div class='add'>+      Tx clock is provided by external rgmii clock.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  starfive,syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to syscon that configures phy mode</div><div class='add'>+          - description: Offset of phy mode selection</div><div class='add'>+          - description: Shift of phy mode selection</div><div class='add'>+    description:</div><div class='add'>+      A phandle to syscon with two arguments that configure phy mode.</div><div class='add'>+      The argument one is the offset of phy mode selection, the</div><div class='add'>+      argument two is the shift of phy mode selection.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: snps,dwmac.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ethernet@16030000 {</div><div class='add'>+        compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";</div><div class='add'>+        reg = &lt;0x16030000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk 3&gt;, &lt;&amp;clk 2&gt;, &lt;&amp;clk 109&gt;,</div><div class='add'>+                 &lt;&amp;clk 6&gt;, &lt;&amp;clk 111&gt;;</div><div class='add'>+        clock-names = "stmmaceth", "pclk", "ptp_ref",</div><div class='add'>+                      "tx", "gtx";</div><div class='add'>+        resets = &lt;&amp;rst 1&gt;, &lt;&amp;rst 2&gt;;</div><div class='add'>+        reset-names = "stmmaceth", "ahb";</div><div class='add'>+        interrupts = &lt;7&gt;, &lt;6&gt;, &lt;5&gt;;</div><div class='add'>+        interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";</div><div class='add'>+        phy-mode = "rgmii-id";</div><div class='add'>+        snps,multicast-filter-bins = &lt;64&gt;;</div><div class='add'>+        snps,perfect-filter-entries = &lt;8&gt;;</div><div class='add'>+        rx-fifo-depth = &lt;2048&gt;;</div><div class='add'>+        tx-fifo-depth = &lt;2048&gt;;</div><div class='add'>+        snps,fixed-burst;</div><div class='add'>+        snps,no-pbl-x8;</div><div class='add'>+        snps,tso;</div><div class='add'>+        snps,force_thresh_dma_mode;</div><div class='add'>+        snps,axi-config = &lt;&amp;stmmac_axi_setup&gt;;</div><div class='add'>+        snps,en-tx-lpi-clockgating;</div><div class='add'>+        snps,txpbl = &lt;16&gt;;</div><div class='add'>+        snps,rxpbl = &lt;16&gt;;</div><div class='add'>+        starfive,syscon = &lt;&amp;aon_syscon 0xc 0x12&gt;;</div><div class='add'>+        phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "snps,dwmac-mdio";</div><div class='add'>+</div><div class='add'>+            phy0: ethernet-phy@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        stmmac_axi_setup: stmmac-axi-config {</div><div class='add'>+            snps,lpi_en;</div><div class='add'>+            snps,wr_osr_lmt = &lt;4&gt;;</div><div class='add'>+            snps,rd_osr_lmt = &lt;4&gt;;</div><div class='add'>+            snps,blen = &lt;256 128 64 32 0 0 0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/sti-dwmac.txt b/Documentation/devicetree/bindings/net/sti-dwmac.txt<br/>index 062c5174add3..42cd075456ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/sti-dwmac.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/sti-dwmac.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/sti-dwmac.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/sti-dwmac.txt</a></div><div class='hunk'>@@ -7,8 +7,7 @@ and what is needed on STi platforms to program the stmmac glue logic.</div><div class='ctx'> The device node has following properties.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>- - compatible	: Can be "st,stih415-dwmac", "st,stih416-dwmac",</div><div class='del'>-   "st,stih407-dwmac", "st,stid127-dwmac".</div><div class='add'>+ - compatible	: "st,stih407-dwmac"</div><div class='ctx'>  - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which</div><div class='ctx'>    encompases the glue register, and the offset of the control register.</div><div class='ctx'>  - st,gmac_en: this is to enable the gmac into a dedicated sysctl control</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml<br/>index 5c93167b3b41..fc8c96b08d7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/stm32-dwmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/stm32-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/stm32-dwmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/stm32-dwmac.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/stm32-dwmac.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: STMicroelectronics STM32 / MCU DWMAC glue layer controller</div><div class='ctx'> </div><div class='hunk'>@@ -26,7 +26,7 @@ select:</div><div class='ctx'>     - compatible</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "snps,dwmac.yaml#"</div><div class='add'>+  - $ref: snps,dwmac.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -73,7 +73,7 @@ properties:</div><div class='ctx'>         - ptp_ref</div><div class='ctx'> </div><div class='ctx'>   st,syscon:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: phandle to the syscon node which encompases the glue register</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml b/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml<br/>new file mode 100644<br/>index 000000000000..5b130097449b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/sunplus,sp7021-emac.yaml</a></div><div class='hunk'>@@ -0,0 +1,143 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SP7021 Dual Ethernet MAC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Wells Lu &lt;wellslutw@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Sunplus SP7021 dual 10M/100M Ethernet MAC controller.</div><div class='add'>+  Device node of the controller has following properties.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sunplus,sp7021-emac</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ethernet-ports:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description: Ethernet ports to PHY</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port@[0-1]$":</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description: Port to PHY</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          reg:</div><div class='add'>+            minimum: 0</div><div class='add'>+            maximum: 1</div><div class='add'>+</div><div class='add'>+          phy-handle:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+          phy-mode:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+          nvmem-cells:</div><div class='add'>+            items:</div><div class='add'>+              - description: nvmem cell address of MAC address</div><div class='add'>+</div><div class='add'>+          nvmem-cell-names:</div><div class='add'>+            description: names corresponding to the nvmem cells</div><div class='add'>+            items:</div><div class='add'>+              - const: mac-address</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - reg</div><div class='add'>+          - phy-handle</div><div class='add'>+          - phy-mode</div><div class='add'>+          - nvmem-cells</div><div class='add'>+          - nvmem-cell-names</div><div class='add'>+</div><div class='add'>+  mdio:</div><div class='add'>+    $ref: mdio.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - pinctrl-0</div><div class='add'>+  - pinctrl-names</div><div class='add'>+  - ethernet-ports</div><div class='add'>+  - mdio</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    ethernet@9c108000 {</div><div class='add'>+        compatible = "sunplus,sp7021-emac";</div><div class='add'>+        reg = &lt;0x9c108000 0x400&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+        interrupts = &lt;66 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc 0xa7&gt;;</div><div class='add'>+        resets = &lt;&amp;rstc 0x97&gt;;</div><div class='add'>+        pinctrl-0 = &lt;&amp;emac_demo_board_v3_pins&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+</div><div class='add'>+        ethernet-ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                phy-handle = &lt;&amp;eth_phy0&gt;;</div><div class='add'>+                phy-mode = "rmii";</div><div class='add'>+                nvmem-cells = &lt;&amp;mac_addr0&gt;;</div><div class='add'>+                nvmem-cell-names = "mac-address";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            port@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                phy-handle = &lt;&amp;eth_phy1&gt;;</div><div class='add'>+                phy-mode = "rmii";</div><div class='add'>+                nvmem-cells = &lt;&amp;mac_addr1&gt;;</div><div class='add'>+                nvmem-cell-names = "mac-address";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mdio {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            eth_phy0: ethernet-phy@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            eth_phy1: ethernet-phy@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml<br/>index 31bf825c6598..b04ac4966608 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings</div><div class='add'>+title: TI SoC Ethernet Switch Controller (CPSW)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;</div><div class='hunk'>@@ -62,10 +62,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: "rx_thresh"</div><div class='del'>-      - const: "rx"</div><div class='del'>-      - const: "tx"</div><div class='del'>-      - const: "misc"</div><div class='add'>+      - const: rx_thresh</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: misc</div><div class='ctx'> </div><div class='ctx'>   pinctrl-names: true</div><div class='ctx'> </div><div class='hunk'>@@ -77,6 +77,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ethernet-ports:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       '#address-cells':</div><div class='ctx'>         const: 1</div><div class='hunk'>@@ -89,6 +91,7 @@ properties:</div><div class='ctx'>         description: CPSW external ports</div><div class='ctx'> </div><div class='ctx'>         $ref: ethernet-controller.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           reg:</div><div class='hunk'>@@ -117,6 +120,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cpts:</div><div class='ctx'>     type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       The Common Platform Time Sync (CPTS) module</div><div class='ctx'> </div><div class='hunk'>@@ -150,7 +154,7 @@ patternProperties:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       CPSW MDIO bus.</div><div class='del'>-    $ref: "ti,davinci-mdio.yaml#"</div><div class='add'>+    $ref: ti,davinci-mdio.yaml#</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml b/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml<br/>index dbfca5ee9139..53604fab0b73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml</a></div><div class='hunk'>@@ -13,7 +13,7 @@ description:</div><div class='ctx'>   TI SoC Davinci/Keystone2 MDIO Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "mdio.yaml#"</div><div class='add'>+  - $ref: mdio.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -34,6 +34,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   bus_freq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     maximum: 2500000</div><div class='ctx'>     description: MDIO Bus frequency</div><div class='ctx'> </div><div class='hunk'>@@ -56,6 +57,7 @@ if:</div><div class='ctx'>     compatible:</div><div class='ctx'>       contains:</div><div class='ctx'>         const: ti,davinci_mdio</div><div class='add'>+then:</div><div class='ctx'>   required:</div><div class='ctx'>     - bus_freq</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml<br/>index 75e8712e903a..db74474207ed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,dp83822.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,dp83822.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,dp83822.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ti,dp83822.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/ti,dp83822.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/ti,dp83822.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI DP83822 ethernet PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It</div><div class='hunk'>@@ -21,7 +21,7 @@ description: |</div><div class='ctx'>     http://www.ti.com/lit/ds/symlink/dp83822i.pdf</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-phy.yaml#"</div><div class='add'>+  - $ref: ethernet-phy.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.yaml b/Documentation/devicetree/bindings/net/ti,dp83867.yaml<br/>index 047d757e8d82..4bc1f98fd9fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,dp83867.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,dp83867.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,dp83867.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ti,dp83867.yaml</a></div><div class='hunk'>@@ -2,16 +2,16 @@</div><div class='ctx'> # Copyright (C) 2019 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/ti,dp83867.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/ti,dp83867.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI DP83867 ethernet PHY</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-controller.yaml#"</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The DP83867 device is a robust, low power, fully featured Physical Layer</div><div class='hunk'>@@ -31,6 +31,16 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  nvmem-cells:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Nvmem data cell containing the value to write to the</div><div class='add'>+      IO_IMPEDANCE_CTRL field of the IO_MUX_CFG register.</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: io_impedance_ctrl</div><div class='add'>+</div><div class='ctx'>   ti,min-output-impedance:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -42,9 +52,11 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       MAC Interface Impedance control to set the programmable output impedance</div><div class='ctx'>       to a maximum value (70 ohms).</div><div class='del'>-      Note: ti,min-output-impedance and ti,max-output-impedance are mutually</div><div class='del'>-        exclusive. When both properties are present ti,max-output-impedance</div><div class='del'>-        takes precedence.</div><div class='add'>+      Note: Specifying an io_impedance_ctrl nvmem cell or one of the</div><div class='add'>+        ti,min-output-impedance, ti,max-output-impedance properties</div><div class='add'>+        are mutually exclusive. If more than one is present, an nvmem</div><div class='add'>+        cell takes precedence over ti,max-output-impedance, which in</div><div class='add'>+        turn takes precedence over ti,min-output-impedance.</div><div class='ctx'> </div><div class='ctx'>   tx-fifo-depth:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,dp83869.yaml b/Documentation/devicetree/bindings/net/ti,dp83869.yaml<br/>index 1b780dce61ab..fb6725df4668 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,dp83869.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,dp83869.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,dp83869.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ti,dp83869.yaml</a></div><div class='hunk'>@@ -2,16 +2,16 @@</div><div class='ctx'> # Copyright (C) 2019 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/ti,dp83869.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/ti,dp83869.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI DP83869 ethernet PHY</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "ethernet-phy.yaml#"</div><div class='add'>+  - $ref: ethernet-phy.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The DP83869HM device is a robust, fully-featured Gigabit (PHY) transceiver</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml<br/>index b8281d8be940..395a4650e285 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller) Device Tree Bindings</div><div class='add'>+title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;</div><div class='hunk'>@@ -54,9 +54,12 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - ti,am642-cpsw-nuss</div><div class='ctx'>       - ti,am654-cpsw-nuss</div><div class='add'>+      - ti,j7200-cpswxg-nuss</div><div class='ctx'>       - ti,j721e-cpsw-nuss</div><div class='del'>-      - ti,am642-cpsw-nuss</div><div class='add'>+      - ti,j721e-cpswxg-nuss</div><div class='add'>+      - ti,j784s4-cpswxg-nuss</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -110,21 +113,32 @@ properties:</div><div class='ctx'>         const: 0</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      port@[1-2]:</div><div class='add'>+      "^port@[1-8]$":</div><div class='ctx'>         type: object</div><div class='ctx'>         description: CPSWxG NUSS external ports</div><div class='ctx'> </div><div class='ctx'>         $ref: ethernet-controller.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           reg:</div><div class='ctx'>             minimum: 1</div><div class='del'>-            maximum: 2</div><div class='add'>+            maximum: 8</div><div class='ctx'>             description: CPSW port number</div><div class='ctx'> </div><div class='ctx'>           phys:</div><div class='del'>-            maxItems: 1</div><div class='del'>-            description: phandle on phy-gmii-sel PHY</div><div class='add'>+            minItems: 1</div><div class='add'>+            items:</div><div class='add'>+              - description: CPSW MAC's PHY.</div><div class='add'>+              - description: Serdes PHY. Serdes PHY is required only if</div><div class='add'>+                             the Serdes has to be configured in the</div><div class='add'>+                             Single-Link configuration.</div><div class='add'>+</div><div class='add'>+          phy-names:</div><div class='add'>+            minItems: 1</div><div class='add'>+            items:</div><div class='add'>+              - const: mac</div><div class='add'>+              - const: serdes</div><div class='ctx'> </div><div class='ctx'>           label:</div><div class='ctx'>             description: label associated with this port</div><div class='hunk'>@@ -178,11 +192,50 @@ required:</div><div class='ctx'>   - '#address-cells'</div><div class='ctx'>   - '#size-cells'</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - ti,j721e-cpswxg-nuss</div><div class='add'>+                - ti,j784s4-cpswxg-nuss</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ethernet-ports:</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^port@[5-8]$": false</div><div class='add'>+            "^port@[1-4]$":</div><div class='add'>+              properties:</div><div class='add'>+                reg:</div><div class='add'>+                  minimum: 1</div><div class='add'>+                  maximum: 4</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - ti,j7200-cpswxg-nuss</div><div class='add'>+                - ti,j721e-cpswxg-nuss</div><div class='add'>+                - ti,j784s4-cpswxg-nuss</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ethernet-ports:</div><div class='add'>+          patternProperties:</div><div class='add'>+            "^port@[3-8]$": false</div><div class='add'>+            "^port@[1-2]$":</div><div class='add'>+              properties:</div><div class='add'>+                reg:</div><div class='add'>+                  minimum: 1</div><div class='add'>+                  maximum: 2</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/k3.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/net/ti-dp83867.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml b/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml<br/>index a30419ef550a..3e910d3b24a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/ti,k3-am654-cpts.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module Device Tree Bindings</div><div class='add'>+title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;</div><div class='hunk'>@@ -93,8 +93,17 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Number of timestamp Generator function outputs (TS_GENFx)</div><div class='ctx'> </div><div class='add'>+  ti,pps:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description: |</div><div class='add'>+      The pair of HWx_TS_PUSH input and TS_GENFy output indexes used for</div><div class='add'>+      PPS events generation. Platform/board specific.</div><div class='add'>+</div><div class='ctx'>   refclk-mux:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: CPTS reference clock multiplexer clock</div><div class='ctx'>     properties:</div><div class='ctx'>       '#clock-cells':</div><div class='hunk'>@@ -142,4 +151,3 @@ examples:</div><div class='ctx'>                assigned-clock-parents = &lt;&amp;k3_clks 118 11&gt;;</div><div class='ctx'>          };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml b/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml<br/>index b12bfe61c67a..474fa8bcf302 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/toshiba,visconti-dwmac.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/toshiba,visconti-dwmac.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/toshiba,visconti-dwmac.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Toshiba Visconti DWMAC Ethernet controller</div><div class='ctx'> </div><div class='hunk'>@@ -52,6 +52,7 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/toshiba,tmpv770x.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     soc {</div><div class='hunk'>@@ -63,7 +64,7 @@ examples:</div><div class='ctx'>             reg = &lt;0 0x28000000 0 0x10000&gt;;</div><div class='ctx'>             interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>             interrupt-names = "macirq";</div><div class='del'>-            clocks = &lt;&amp;clk300mhz&gt;, &lt;&amp;clk125mhz&gt;;</div><div class='add'>+            clocks = &lt;&amp;pismu TMPV770X_CLK_PIETHER_BUS&gt;, &lt;&amp;pismu TMPV770X_CLK_PIETHER_125M&gt;;</div><div class='ctx'>             clock-names = "stmmaceth", "phy_ref_clk";</div><div class='ctx'>             snps,txpbl = &lt;4&gt;;</div><div class='ctx'>             snps,rxpbl = &lt;4&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml b/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml<br/>index 8156a9aeb589..4158673f723c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/vertexcom-mse102x.yaml</a></div><div class='hunk'>@@ -1,13 +1,13 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/net/vertexcom-mse102x.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/net/vertexcom-mse102x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: The Vertexcom MSE102x (SPI) Device Tree Bindings</div><div class='add'>+title: The Vertexcom MSE102x (SPI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Stefan Wahren &lt;stefan.wahren@in-tech.com&gt;</div><div class='add'>+  - Stefan Wahren &lt;stefan.wahren@chargebyte.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Vertexcom's MSE102x are a family of HomePlug GreenPHY chips.</div><div class='hunk'>@@ -55,7 +55,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml b/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml<br/>index c11f23b20c4c..fec1cc9b9a08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/brcm,bcm4329-fmac.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/wireless/brcm,bcm4329-fmac.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom BCM4329 family fullmac wireless SDIO devices</div><div class='add'>+title: Broadcom BCM4329 family fullmac wireless SDIO/PCIE devices</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Arend van Spriel &lt;arend@broadcom.com&gt;</div><div class='hunk'>@@ -41,11 +41,17 @@ properties:</div><div class='ctx'>               - cypress,cyw4373-fmac</div><div class='ctx'>               - cypress,cyw43012-fmac</div><div class='ctx'>           - const: brcm,bcm4329-fmac</div><div class='del'>-      - const: brcm,bcm4329-fmac</div><div class='add'>+      - enum:</div><div class='add'>+          - brcm,bcm4329-fmac</div><div class='add'>+          - pci14e4,43dc  # BCM4355</div><div class='add'>+          - pci14e4,4464  # BCM4364</div><div class='add'>+          - pci14e4,4488  # BCM4377</div><div class='add'>+          - pci14e4,4425  # BCM4378</div><div class='add'>+          - pci14e4,4433  # BCM4387</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    description: SDIO function number for the device, for most cases</div><div class='del'>-      this will be 1.</div><div class='add'>+    description: SDIO function number for the device (for most cases</div><div class='add'>+      this will be 1) or PCI device identifier.</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -75,6 +81,41 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       pattern: '^[A-Z][A-Z]-[A-Z][0-9A-Z]-[0-9]+$'</div><div class='ctx'> </div><div class='add'>+  brcm,ccode-map-trivial:</div><div class='add'>+    description: |</div><div class='add'>+      Use a trivial mapping of ISO3166 country codes to brcmfmac firmware</div><div class='add'>+      country code and revision: cc -&gt; { cc, 0 }. In other words, assume that</div><div class='add'>+      the CLM blob firmware uses ISO3166 country codes as well, and that all</div><div class='add'>+      revisions are zero. This property is mutually exclusive with</div><div class='add'>+      brcm,ccode-map. If both properties are specified, then brcm,ccode-map</div><div class='add'>+      takes precedence.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  brcm,cal-blob:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: A per-device calibration blob for the Wi-Fi radio. This</div><div class='add'>+      should be filled in by the bootloader from platform configuration</div><div class='add'>+      data, if necessary, and will be uploaded to the device if present.</div><div class='add'>+</div><div class='add'>+  brcm,board-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Overrides the board type, which is normally the compatible of</div><div class='add'>+      the root node. This can be used to decouple the overall system board or</div><div class='add'>+      device name from the board type for WiFi purposes, which is used to</div><div class='add'>+      construct firmware and NVRAM configuration filenames, allowing for</div><div class='add'>+      multiple devices that share the same module or characteristics for the</div><div class='add'>+      WiFi subsystem to share the same firmware/NVRAM files. On Apple platforms,</div><div class='add'>+      this should be the Apple module-instance codename prefixed by "apple,",</div><div class='add'>+      e.g. "apple,honshu".</div><div class='add'>+</div><div class='add'>+  apple,antenna-sku:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Antenna SKU used to identify a specific antenna configuration</div><div class='add'>+      on Apple platforms. This is use to build firmware filenames, to allow</div><div class='add'>+      platforms with different antenna configs to have different firmware and/or</div><div class='add'>+      NVRAM. This would normally be filled in by the bootloader from platform</div><div class='add'>+      configuration data.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml b/Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml<br/>index 284ef45add99..0ea84d6fe73e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/esp,esp8089.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/wireless/esp,esp8089.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Espressif ESP8089 Device Tree Bindings</div><div class='add'>+title: Espressif ESP8089</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Hans de Goede &lt;hdegoede@redhat.com&gt;</div><div class='hunk'>@@ -29,15 +29,15 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      mmc {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-          wifi@1 {</div><div class='del'>-              compatible = "esp,esp8089";</div><div class='del'>-              reg = &lt;1&gt;;</div><div class='del'>-              esp,crystal-26M-en = &lt;2&gt;;</div><div class='del'>-          };</div><div class='del'>-      };</div><div class='add'>+    mmc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        wifi@1 {</div><div class='add'>+            compatible = "esp,esp8089";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            esp,crystal-26M-en = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml b/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml<br/>index d58e1571df9b..d89f7a3f88a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/ieee80211.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/ieee80211.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/ieee80211.yaml</a></div><div class='hunk'>@@ -1,12 +1,11 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='ctx'> $id: http://devicetree.org/schemas/net/wireless/ieee80211.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common IEEE 802.11 Binding</div><div class='add'>+title: Common IEEE 802.11</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt b/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt<br/>index 9bf9bbac16e2..cdc303caf5f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/marvell-8xxx.txt</a></div><div class='hunk'>@@ -1,4 +1,4 @@</div><div class='del'>-Marvell 8787/8897/8997 (sd8787/sd8897/sd8997/pcie8997) SDIO/PCIE devices</div><div class='add'>+Marvell 8787/8897/8978/8997 (sd8787/sd8897/sd8978/sd8997/pcie8997) SDIO/PCIE devices</div><div class='ctx'> ------</div><div class='ctx'> </div><div class='ctx'> This node provides properties for controlling the Marvell SDIO/PCIE wireless device.</div><div class='hunk'>@@ -10,7 +10,9 @@ Required properties:</div><div class='ctx'>   - compatible : should be one of the following:</div><div class='ctx'> 	* "marvell,sd8787"</div><div class='ctx'> 	* "marvell,sd8897"</div><div class='add'>+	* "marvell,sd8978"</div><div class='ctx'> 	* "marvell,sd8997"</div><div class='add'>+	* "nxp,iw416"</div><div class='ctx'> 	* "pci11ab,2b42"</div><div class='ctx'> 	* "pci1b4b,2b42"</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml b/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml<br/>index 249967d8d750..67b63f119f64 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml</a></div><div class='hunk'>@@ -1,12 +1,11 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='ctx'> $id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek mt76 wireless devices Generic Binding</div><div class='add'>+title: MediaTek mt76 wireless devices</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='hunk'>@@ -51,9 +50,19 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Specify the consys reset for mt7986.</div><div class='ctx'> </div><div class='del'>-  reset-name:</div><div class='add'>+  reset-names:</div><div class='ctx'>     const: consys</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      Specify the consys clocks for mt7986.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mcu</div><div class='add'>+      - const: ap2conn</div><div class='add'>+</div><div class='ctx'>   mediatek,infracfg:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='hunk'>@@ -102,6 +111,11 @@ properties:</div><div class='ctx'>     $ref: /schemas/leds/common.yaml#</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     properties:</div><div class='add'>+      led-active-low:</div><div class='add'>+        description:</div><div class='add'>+          LED is enabled with ground signal.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='ctx'>       led-sources:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -269,5 +283,8 @@ examples:</div><div class='ctx'>               &lt;0x10003000 0x1000&gt;,</div><div class='ctx'>               &lt;0x11d10000 0x1000&gt;;</div><div class='ctx'>         interrupts = &lt;GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;topckgen 50&gt;,</div><div class='add'>+                 &lt;&amp;topckgen 62&gt;;</div><div class='add'>+        clock-names = "mcu", "ap2conn";</div><div class='ctx'>         memory-region = &lt;&amp;wmcpu_emi&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml<br/>index 60de78f1bc7b..2460ccc08237 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/wireless/microchip,wilc1000.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip WILC wireless devicetree bindings</div><div class='add'>+title: Microchip WILC wireless</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Adham Abozaeid &lt;adham.abozaeid@microchip.com&gt;</div><div class='hunk'>@@ -20,8 +20,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -51,7 +49,10 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml b/Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml<br/>index 8cd0adbf7021..0e5412cff2bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/qca,ath9k.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/net/wireless/qca,ath9k.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Atheros ath9k wireless devices Generic Binding</div><div class='add'>+title: Qualcomm Atheros ath9k wireless devices</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Kalle Valo &lt;kvalo@codeaurora.org&gt;</div><div class='add'>+  - Toke Høiland-Jørgensen &lt;toke@toke.dk&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This node provides properties for configuring the ath9k wireless device.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt<br/>deleted file mode 100644<br/>index b61c2d5a0ff7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,215 +0,0 @@</div><div class='del'>-* Qualcomm Atheros ath10k wireless devices</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be one of the following:</div><div class='del'>-	* "qcom,ath10k"</div><div class='del'>-	* "qcom,ipq4019-wifi"</div><div class='del'>-	* "qcom,wcn3990-wifi"</div><div class='del'>-</div><div class='del'>-PCI based devices uses compatible string "qcom,ath10k" and takes calibration</div><div class='del'>-data along with board specific data via "qcom,ath10k-calibration-data".</div><div class='del'>-Rest of the properties are not applicable for PCI based devices.</div><div class='del'>-</div><div class='del'>-AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"</div><div class='del'>-and also uses most of the properties defined in this doc (except</div><div class='del'>-"qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"</div><div class='del'>-to carry pre calibration data.</div><div class='del'>-</div><div class='del'>-In general, entry "qcom,ath10k-pre-calibration-data" and</div><div class='del'>-"qcom,ath10k-calibration-data" conflict with each other and only one</div><div class='del'>-can be provided per device.</div><div class='del'>-</div><div class='del'>-SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".</div><div class='del'>-</div><div class='del'>-- reg: Address and length of the register set for the device.</div><div class='del'>-- reg-names: Must include the list of following reg names,</div><div class='del'>-	     "membase"</div><div class='del'>-- interrupts: reference to the list of 17 interrupt numbers for "qcom,ipq4019-wifi"</div><div class='del'>-	      compatible target.</div><div class='del'>-	      reference to the list of 12 interrupt numbers for "qcom,wcn3990-wifi"</div><div class='del'>-	      compatible target.</div><div class='del'>-	      Must contain interrupt-names property per entry for</div><div class='del'>-	      "qcom,ath10k", "qcom,ipq4019-wifi" compatible targets.</div><div class='del'>-</div><div class='del'>-- interrupt-names: Must include the entries for MSI interrupt</div><div class='del'>-		   names ("msi0" to "msi15") and legacy interrupt</div><div class='del'>-		   name ("legacy") for "qcom,ath10k", "qcom,ipq4019-wifi"</div><div class='del'>-		   compatible targets.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-          See ../reset/reseti.txt for details.</div><div class='del'>-- reset-names: Must include the list of following reset names,</div><div class='del'>-	       "wifi_cpu_init"</div><div class='del'>-	       "wifi_radio_srif"</div><div class='del'>-	       "wifi_radio_warm"</div><div class='del'>-	       "wifi_radio_cold"</div><div class='del'>-	       "wifi_core_warm"</div><div class='del'>-	       "wifi_core_cold"</div><div class='del'>-- clocks: List of clock specifiers, must contain an entry for each required</div><div class='del'>-          entry in clock-names.</div><div class='del'>-- clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",</div><div class='del'>-	       "wifi_wcss_rtc" for "qcom,ipq4019-wifi" compatible target and</div><div class='del'>-	       "cxo_ref_clk_pin" and optionally "qdss" for "qcom,wcn3990-wifi"</div><div class='del'>-	       compatible target.</div><div class='del'>-- qcom,msi_addr: MSI interrupt address.</div><div class='del'>-- qcom,msi_base: Base value to add before writing MSI data into</div><div class='del'>-		MSI address register.</div><div class='del'>-- qcom,ath10k-calibration-variant: string to search for in the board-2.bin</div><div class='del'>-				   variant list with the same bus and device</div><div class='del'>-				   specific ids</div><div class='del'>-- qcom,ath10k-calibration-data : calibration data + board specific data</div><div class='del'>-				 as an array, the length can vary between</div><div class='del'>-				 hw versions.</div><div class='del'>-- qcom,ath10k-pre-calibration-data : pre calibration data as an array,</div><div class='del'>-				     the length can vary between hw versions.</div><div class='del'>-- &lt;supply-name&gt;-supply: handle to the regulator device tree node</div><div class='del'>-			   optional "supply-name" are "vdd-0.8-cx-mx",</div><div class='del'>-			   "vdd-1.8-xo", "vdd-1.3-rfa", "vdd-3.3-ch0",</div><div class='del'>-			   and "vdd-3.3-ch1".</div><div class='del'>-- memory-region:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the reserved-memory for the msa region</div><div class='del'>-		    used by the wifi firmware running in Q6.</div><div class='del'>-- iommus:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: A list of phandle and IOMMU specifier pairs.</div><div class='del'>-- ext-fem-name:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: string</div><div class='del'>-	Definition: Name of external front end module used. Some valid FEM names</div><div class='del'>-		    for example: "microsemi-lx5586", "sky85703-11"</div><div class='del'>-		    and "sky85803" etc.</div><div class='del'>-- qcom,snoc-host-cap-8bit-quirk:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: &lt;empty&gt;</div><div class='del'>-	Definition: Quirk specifying that the firmware expects the 8bit version</div><div class='del'>-		    of the host capability QMI request</div><div class='del'>-- qcom,xo-cal-data: xo cal offset to be configured in xo trim register.</div><div class='del'>-</div><div class='del'>-- qcom,msa-fixed-perm: Boolean context flag to disable SCM call for statically</div><div class='del'>-		       mapped msa region.</div><div class='del'>-</div><div class='del'>-- qcom,coexist-support : should contain eithr "0" or "1" to indicate coex</div><div class='del'>-			 support by the hardware.</div><div class='del'>-- qcom,coexist-gpio-pin : gpio pin number  information to support coex</div><div class='del'>-			  which will be used by wifi firmware.</div><div class='del'>-</div><div class='del'>-* Subnodes</div><div class='del'>-The ath10k wifi node can contain one optional firmware subnode.</div><div class='del'>-Firmware subnode is needed when the platform does not have TustZone.</div><div class='del'>-The firmware subnode must have:</div><div class='del'>-</div><div class='del'>-- iommus:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: A list of phandle and IOMMU specifier pairs.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example (to supply PCI based wifi block details):</div><div class='del'>-</div><div class='del'>-In this example, the node is defined as child node of the PCI controller.</div><div class='del'>-</div><div class='del'>-pci {</div><div class='del'>-	pcie@0 {</div><div class='del'>-		reg = &lt;0 0 0 0 0&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-</div><div class='del'>-		wifi@0,0 {</div><div class='del'>-			reg = &lt;0 0 0 0 0&gt;;</div><div class='del'>-			qcom,ath10k-calibration-data = [ 01 02 03 ... ];</div><div class='del'>-			ext-fem-name = "microsemi-lx5586";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example (to supply ipq4019 SoC wifi block details):</div><div class='del'>-</div><div class='del'>-wifi0: wifi@a000000 {</div><div class='del'>-	compatible = "qcom,ipq4019-wifi";</div><div class='del'>-	reg = &lt;0xa000000 0x200000&gt;;</div><div class='del'>-	resets = &lt;&amp;gcc WIFI0_CPU_INIT_RESET&gt;,</div><div class='del'>-		 &lt;&amp;gcc WIFI0_RADIO_SRIF_RESET&gt;,</div><div class='del'>-		 &lt;&amp;gcc WIFI0_RADIO_WARM_RESET&gt;,</div><div class='del'>-		 &lt;&amp;gcc WIFI0_RADIO_COLD_RESET&gt;,</div><div class='del'>-		 &lt;&amp;gcc WIFI0_CORE_WARM_RESET&gt;,</div><div class='del'>-		 &lt;&amp;gcc WIFI0_CORE_COLD_RESET&gt;;</div><div class='del'>-	reset-names = "wifi_cpu_init",</div><div class='del'>-		      "wifi_radio_srif",</div><div class='del'>-		      "wifi_radio_warm",</div><div class='del'>-		      "wifi_radio_cold",</div><div class='del'>-		      "wifi_core_warm",</div><div class='del'>-		      "wifi_core_cold";</div><div class='del'>-	clocks = &lt;&amp;gcc GCC_WCSS2G_CLK&gt;,</div><div class='del'>-		 &lt;&amp;gcc GCC_WCSS2G_REF_CLK&gt;,</div><div class='del'>-		 &lt;&amp;gcc GCC_WCSS2G_RTC_CLK&gt;;</div><div class='del'>-	clock-names = "wifi_wcss_cmd",</div><div class='del'>-		      "wifi_wcss_ref",</div><div class='del'>-		      "wifi_wcss_rtc";</div><div class='del'>-	interrupts = &lt;0 0x20 0x1&gt;,</div><div class='del'>-		     &lt;0 0x21 0x1&gt;,</div><div class='del'>-		     &lt;0 0x22 0x1&gt;,</div><div class='del'>-		     &lt;0 0x23 0x1&gt;,</div><div class='del'>-		     &lt;0 0x24 0x1&gt;,</div><div class='del'>-		     &lt;0 0x25 0x1&gt;,</div><div class='del'>-		     &lt;0 0x26 0x1&gt;,</div><div class='del'>-		     &lt;0 0x27 0x1&gt;,</div><div class='del'>-		     &lt;0 0x28 0x1&gt;,</div><div class='del'>-		     &lt;0 0x29 0x1&gt;,</div><div class='del'>-		     &lt;0 0x2a 0x1&gt;,</div><div class='del'>-		     &lt;0 0x2b 0x1&gt;,</div><div class='del'>-		     &lt;0 0x2c 0x1&gt;,</div><div class='del'>-		     &lt;0 0x2d 0x1&gt;,</div><div class='del'>-		     &lt;0 0x2e 0x1&gt;,</div><div class='del'>-		     &lt;0 0x2f 0x1&gt;,</div><div class='del'>-		     &lt;0 0xa8 0x0&gt;;</div><div class='del'>-	interrupt-names = "msi0",  "msi1",  "msi2",  "msi3",</div><div class='del'>-			  "msi4",  "msi5",  "msi6",  "msi7",</div><div class='del'>-			  "msi8",  "msi9",  "msi10", "msi11",</div><div class='del'>-			  "msi12", "msi13", "msi14", "msi15",</div><div class='del'>-			  "legacy";</div><div class='del'>-	qcom,msi_addr = &lt;0x0b006040&gt;;</div><div class='del'>-	qcom,msi_base = &lt;0x40&gt;;</div><div class='del'>-	qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];</div><div class='del'>-	qcom,coexist-support = &lt;1&gt;;</div><div class='del'>-	qcom,coexist-gpio-pin = &lt;0x33&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Example (to supply wcn3990 SoC wifi block details):</div><div class='del'>-</div><div class='del'>-wifi@18000000 {</div><div class='del'>-		compatible = "qcom,wcn3990-wifi";</div><div class='del'>-		reg = &lt;0x18800000 0x800000&gt;;</div><div class='del'>-		reg-names = "membase";</div><div class='del'>-		clocks = &lt;&amp;clock_gcc clk_rf_clk2_pin&gt;;</div><div class='del'>-		clock-names = "cxo_ref_clk_pin";</div><div class='del'>-		interrupts =</div><div class='del'>-			&lt;GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			&lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		vdd-0.8-cx-mx-supply = &lt;&amp;pm8998_l5&gt;;</div><div class='del'>-		vdd-1.8-xo-supply = &lt;&amp;vreg_l7a_1p8&gt;;</div><div class='del'>-		vdd-1.3-rfa-supply = &lt;&amp;vreg_l17a_1p3&gt;;</div><div class='del'>-		vdd-3.3-ch0-supply = &lt;&amp;vreg_l25a_3p3&gt;;</div><div class='del'>-		vdd-3.3-ch1-supply = &lt;&amp;vreg_l26a_3p3&gt;;</div><div class='del'>-		memory-region = &lt;&amp;wifi_msa_mem&gt;;</div><div class='del'>-		iommus = &lt;&amp;apps_smmu 0x0040 0x1&gt;;</div><div class='del'>-		qcom,msa-fixed-perm;</div><div class='del'>-		wifi-firmware {</div><div class='del'>-			iommus = &lt;&amp;apps_iommu 0xc22 0x1&gt;;</div><div class='del'>-		};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml<br/>new file mode 100644<br/>index 000000000000..c85ed330426d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/qcom,ath10k.yaml</a></div><div class='hunk'>@@ -0,0 +1,358 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/wireless/qcom,ath10k.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies ath10k wireless devices</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kalle Valo &lt;kvalo@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm Technologies, Inc. IEEE 802.11ac devices.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,ath10k # SDIO-based devices</div><div class='add'>+      - qcom,ipq4019-wifi</div><div class='add'>+      - qcom,wcn3990-wifi # SNoC-based devices</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: membase</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 12</div><div class='add'>+    maxItems: 17</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 12</div><div class='add'>+    maxItems: 17</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Reference to the MSA memory region used by the Wi-Fi firmware</div><div class='add'>+      running on the Q6 core.</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wifi_cpu_init</div><div class='add'>+      - const: wifi_radio_srif</div><div class='add'>+      - const: wifi_radio_warm</div><div class='add'>+      - const: wifi_radio_cold</div><div class='add'>+      - const: wifi_core_warm</div><div class='add'>+      - const: wifi_core_cold</div><div class='add'>+</div><div class='add'>+  ext-fem-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Name of external front end module used.</div><div class='add'>+    enum:</div><div class='add'>+      - microsemi-lx5586</div><div class='add'>+      - sky85703-11</div><div class='add'>+      - sky85803</div><div class='add'>+</div><div class='add'>+  wifi-firmware:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description: |</div><div class='add'>+      The ath10k Wi-Fi node can contain one optional firmware subnode.</div><div class='add'>+      Firmware subnode is needed when the platform does not have Trustzone.</div><div class='add'>+    properties:</div><div class='add'>+      iommus:</div><div class='add'>+        maxItems: 1</div><div class='add'>+    required:</div><div class='add'>+      - iommus</div><div class='add'>+</div><div class='add'>+  qcom,ath10k-calibration-data:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Calibration data + board-specific data as a byte array. The length</div><div class='add'>+      can vary between hardware versions.</div><div class='add'>+</div><div class='add'>+  qcom,ath10k-calibration-variant:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description:</div><div class='add'>+      Unique variant identifier of the calibration data in board-2.bin</div><div class='add'>+      for designs with colliding bus and device specific ids</div><div class='add'>+</div><div class='add'>+  qcom,ath10k-pre-calibration-data:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Pre-calibration data as a byte array. The length can vary between</div><div class='add'>+      hardware versions.</div><div class='add'>+</div><div class='add'>+  qcom,coexist-support:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+    description:</div><div class='add'>+      Indicate coex support by the hardware.</div><div class='add'>+</div><div class='add'>+  qcom,coexist-gpio-pin:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      COEX GPIO number provided to the Wi-Fi firmware.</div><div class='add'>+</div><div class='add'>+  qcom,msa-fixed-perm:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Whether to skip executing an SCM call that reassigns the memory</div><div class='add'>+      region ownership.</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: State bits used by the AP to signal the WLAN Q6.</div><div class='add'>+    items:</div><div class='add'>+      - description: Signal bits used to enable/disable low power mode</div><div class='add'>+                     on WCN in the case of WoW (Wake on Wireless).</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: The names of the state bits used for SMP2P output.</div><div class='add'>+    items:</div><div class='add'>+      - const: wlan-smp2p-out</div><div class='add'>+</div><div class='add'>+  qcom,snoc-host-cap-8bit-quirk:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Quirk specifying that the firmware expects the 8bit version</div><div class='add'>+      of the host capability QMI request</div><div class='add'>+</div><div class='add'>+  qcom,xo-cal-data:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      XO cal offset to be configured in XO trim register.</div><div class='add'>+</div><div class='add'>+  vdd-0.8-cx-mx-supply:</div><div class='add'>+    description: Main logic power rail</div><div class='add'>+</div><div class='add'>+  vdd-1.8-xo-supply:</div><div class='add'>+    description: Crystal oscillator supply</div><div class='add'>+</div><div class='add'>+  vdd-1.3-rfa-supply:</div><div class='add'>+    description: RFA supply</div><div class='add'>+</div><div class='add'>+  vdd-3.3-ch0-supply:</div><div class='add'>+    description: Primary Wi-Fi antenna supply</div><div class='add'>+</div><div class='add'>+  vdd-3.3-ch1-supply:</div><div class='add'>+    description: Secondary Wi-Fi antenna supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq4019-wifi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 17</div><div class='add'>+          maxItems: 17</div><div class='add'>+</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: msi0</div><div class='add'>+            - const: msi1</div><div class='add'>+            - const: msi2</div><div class='add'>+            - const: msi3</div><div class='add'>+            - const: msi4</div><div class='add'>+            - const: msi5</div><div class='add'>+            - const: msi6</div><div class='add'>+            - const: msi7</div><div class='add'>+            - const: msi8</div><div class='add'>+            - const: msi9</div><div class='add'>+            - const: msi10</div><div class='add'>+            - const: msi11</div><div class='add'>+            - const: msi12</div><div class='add'>+            - const: msi13</div><div class='add'>+            - const: msi14</div><div class='add'>+            - const: msi15</div><div class='add'>+            - const: legacy</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Wi-Fi command clock</div><div class='add'>+            - description: Wi-Fi reference clock</div><div class='add'>+            - description: Wi-Fi RTC clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: wifi_wcss_cmd</div><div class='add'>+            - const: wifi_wcss_ref</div><div class='add'>+            - const: wifi_wcss_rtc</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+        - interrupts</div><div class='add'>+        - interrupt-names</div><div class='add'>+        - resets</div><div class='add'>+        - reset-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,wcn3990-wifi</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - description: XO reference clock</div><div class='add'>+            - description: Qualcomm Debug Subsystem clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: cxo_ref_clk_pin</div><div class='add'>+            - const: qdss</div><div class='add'>+</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: CE0</div><div class='add'>+            - description: CE1</div><div class='add'>+            - description: CE2</div><div class='add'>+            - description: CE3</div><div class='add'>+            - description: CE4</div><div class='add'>+            - description: CE5</div><div class='add'>+            - description: CE6</div><div class='add'>+            - description: CE7</div><div class='add'>+            - description: CE8</div><div class='add'>+            - description: CE9</div><div class='add'>+            - description: CE10</div><div class='add'>+            - description: CE11</div><div class='add'>+</div><div class='add'>+        interrupt-names: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # SNoC</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    wifi@18800000 {</div><div class='add'>+      compatible = "qcom,wcn3990-wifi";</div><div class='add'>+      reg = &lt;0x18800000 0x800000&gt;;</div><div class='add'>+      reg-names = "membase";</div><div class='add'>+      memory-region = &lt;&amp;wlan_msa_mem&gt;;</div><div class='add'>+      clocks = &lt;&amp;rpmcc RPM_SMD_RF_CLK2_PIN&gt;;</div><div class='add'>+      clock-names = "cxo_ref_clk_pin";</div><div class='add'>+      interrupts = &lt;GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      iommus = &lt;&amp;anoc2_smmu 0x1900&gt;,</div><div class='add'>+               &lt;&amp;anoc2_smmu 0x1901&gt;;</div><div class='add'>+      qcom,snoc-host-cap-8bit-quirk;</div><div class='add'>+      vdd-0.8-cx-mx-supply = &lt;&amp;vreg_l5a_0p8&gt;;</div><div class='add'>+      vdd-1.8-xo-supply = &lt;&amp;vreg_l7a_1p8&gt;;</div><div class='add'>+      vdd-1.3-rfa-supply = &lt;&amp;vreg_l17a_1p3&gt;;</div><div class='add'>+      vdd-3.3-ch0-supply = &lt;&amp;vreg_l25a_3p3&gt;;</div><div class='add'>+      vdd-3.3-ch1-supply = &lt;&amp;vreg_l23a_3p3&gt;;</div><div class='add'>+</div><div class='add'>+      wifi-firmware {</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1c02 0x1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # AHB</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-ipq4019.h&gt;</div><div class='add'>+</div><div class='add'>+    wifi@a000000 {</div><div class='add'>+        compatible = "qcom,ipq4019-wifi";</div><div class='add'>+        reg = &lt;0xa000000 0x200000&gt;;</div><div class='add'>+        resets = &lt;&amp;gcc WIFI0_CPU_INIT_RESET&gt;,</div><div class='add'>+                 &lt;&amp;gcc WIFI0_RADIO_SRIF_RESET&gt;,</div><div class='add'>+                 &lt;&amp;gcc WIFI0_RADIO_WARM_RESET&gt;,</div><div class='add'>+                 &lt;&amp;gcc WIFI0_RADIO_COLD_RESET&gt;,</div><div class='add'>+                 &lt;&amp;gcc WIFI0_CORE_WARM_RESET&gt;,</div><div class='add'>+                 &lt;&amp;gcc WIFI0_CORE_COLD_RESET&gt;;</div><div class='add'>+        reset-names = "wifi_cpu_init",</div><div class='add'>+                      "wifi_radio_srif",</div><div class='add'>+                      "wifi_radio_warm",</div><div class='add'>+                      "wifi_radio_cold",</div><div class='add'>+                      "wifi_core_warm",</div><div class='add'>+                      "wifi_core_cold";</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_WCSS2G_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_WCSS2G_REF_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_WCSS2G_RTC_CLK&gt;;</div><div class='add'>+        clock-names = "wifi_wcss_cmd",</div><div class='add'>+                      "wifi_wcss_ref",</div><div class='add'>+                      "wifi_wcss_rtc";</div><div class='add'>+        interrupts = &lt;GIC_SPI 32 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 33 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 34 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 35 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 36 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 37 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 38 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 39 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 40 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 41 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 42 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 43 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 44 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 45 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 46 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 47 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names =  "msi0",</div><div class='add'>+                           "msi1",</div><div class='add'>+                           "msi2",</div><div class='add'>+                           "msi3",</div><div class='add'>+                           "msi4",</div><div class='add'>+                           "msi5",</div><div class='add'>+                           "msi6",</div><div class='add'>+                           "msi7",</div><div class='add'>+                           "msi8",</div><div class='add'>+                           "msi9",</div><div class='add'>+                           "msi10",</div><div class='add'>+                           "msi11",</div><div class='add'>+                           "msi12",</div><div class='add'>+                           "msi13",</div><div class='add'>+                           "msi14",</div><div class='add'>+                           "msi15",</div><div class='add'>+                           "legacy";</div><div class='add'>+      };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml<br/>new file mode 100644<br/>index 000000000000..817f02a8b481<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2023 Linaro Limited</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/wireless/qcom,ath11k-pci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies ath11k wireless devices (PCIe)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kalle Valo &lt;kvalo@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm Technologies IEEE 802.11ax PCIe devices</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - pci17cb,1103  # WCN6855</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,ath11k-calibration-variant:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      string to uniquely identify variant of the calibration data for designs</div><div class='add'>+      with colliding bus and device ids</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pcie {</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pcie@0 {</div><div class='add'>+            device_type = "pci";</div><div class='add'>+            reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+            #address-cells = &lt;3&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+</div><div class='add'>+            bus-range = &lt;0x01 0xff&gt;;</div><div class='add'>+</div><div class='add'>+            wifi@0 {</div><div class='add'>+                compatible = "pci17cb,1103";</div><div class='add'>+                reg = &lt;0x10000 0x0 0x0 0x0 0x0&gt;;</div><div class='add'>+</div><div class='add'>+                qcom,ath11k-calibration-variant = "LE_X13S";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml<br/>index cdf7b873b419..7d5f982a3d09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml</a></div><div class='hunk'>@@ -1,15 +1,14 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='ctx'> $id: http://devicetree.org/schemas/net/wireless/qcom,ath11k.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies ath11k wireless devices Generic Binding</div><div class='add'>+title: Qualcomm Technologies ath11k wireless devices</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Kalle Valo &lt;kvalo@codeaurora.org&gt;</div><div class='add'>+  - Kalle Valo &lt;kvalo@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   These are dt entries for Qualcomm Technologies, Inc. IEEE 802.11ax</div><div class='hunk'>@@ -20,120 +19,18 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,ipq8074-wifi</div><div class='ctx'>       - qcom,ipq6018-wifi</div><div class='add'>+      - qcom,wcn6750-wifi</div><div class='add'>+      - qcom,ipq5018-wifi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    items:</div><div class='del'>-      - description: misc-pulse1 interrupt events</div><div class='del'>-      - description: misc-latch interrupt events</div><div class='del'>-      - description: sw exception interrupt events</div><div class='del'>-      - description: watchdog interrupt events</div><div class='del'>-      - description: interrupt event for ring CE0</div><div class='del'>-      - description: interrupt event for ring CE1</div><div class='del'>-      - description: interrupt event for ring CE2</div><div class='del'>-      - description: interrupt event for ring CE3</div><div class='del'>-      - description: interrupt event for ring CE4</div><div class='del'>-      - description: interrupt event for ring CE5</div><div class='del'>-      - description: interrupt event for ring CE6</div><div class='del'>-      - description: interrupt event for ring CE7</div><div class='del'>-      - description: interrupt event for ring CE8</div><div class='del'>-      - description: interrupt event for ring CE9</div><div class='del'>-      - description: interrupt event for ring CE10</div><div class='del'>-      - description: interrupt event for ring CE11</div><div class='del'>-      - description: interrupt event for ring host2wbm-desc-feed</div><div class='del'>-      - description: interrupt event for ring host2reo-re-injection</div><div class='del'>-      - description: interrupt event for ring host2reo-command</div><div class='del'>-      - description: interrupt event for ring host2rxdma-monitor-ring3</div><div class='del'>-      - description: interrupt event for ring host2rxdma-monitor-ring2</div><div class='del'>-      - description: interrupt event for ring host2rxdma-monitor-ring1</div><div class='del'>-      - description: interrupt event for ring reo2ost-exception</div><div class='del'>-      - description: interrupt event for ring wbm2host-rx-release</div><div class='del'>-      - description: interrupt event for ring reo2host-status</div><div class='del'>-      - description: interrupt event for ring reo2host-destination-ring4</div><div class='del'>-      - description: interrupt event for ring reo2host-destination-ring3</div><div class='del'>-      - description: interrupt event for ring reo2host-destination-ring2</div><div class='del'>-      - description: interrupt event for ring reo2host-destination-ring1</div><div class='del'>-      - description: interrupt event for ring rxdma2host-monitor-destination-mac3</div><div class='del'>-      - description: interrupt event for ring rxdma2host-monitor-destination-mac2</div><div class='del'>-      - description: interrupt event for ring rxdma2host-monitor-destination-mac1</div><div class='del'>-      - description: interrupt event for ring ppdu-end-interrupts-mac3</div><div class='del'>-      - description: interrupt event for ring ppdu-end-interrupts-mac2</div><div class='del'>-      - description: interrupt event for ring ppdu-end-interrupts-mac1</div><div class='del'>-      - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3</div><div class='del'>-      - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2</div><div class='del'>-      - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1</div><div class='del'>-      - description: interrupt event for ring host2rxdma-host-buf-ring-mac3</div><div class='del'>-      - description: interrupt event for ring host2rxdma-host-buf-ring-mac2</div><div class='del'>-      - description: interrupt event for ring host2rxdma-host-buf-ring-mac1</div><div class='del'>-      - description: interrupt event for ring rxdma2host-destination-ring-mac3</div><div class='del'>-      - description: interrupt event for ring rxdma2host-destination-ring-mac2</div><div class='del'>-      - description: interrupt event for ring rxdma2host-destination-ring-mac1</div><div class='del'>-      - description: interrupt event for ring host2tcl-input-ring4</div><div class='del'>-      - description: interrupt event for ring host2tcl-input-ring3</div><div class='del'>-      - description: interrupt event for ring host2tcl-input-ring2</div><div class='del'>-      - description: interrupt event for ring host2tcl-input-ring1</div><div class='del'>-      - description: interrupt event for ring wbm2host-tx-completions-ring3</div><div class='del'>-      - description: interrupt event for ring wbm2host-tx-completions-ring2</div><div class='del'>-      - description: interrupt event for ring wbm2host-tx-completions-ring1</div><div class='del'>-      - description: interrupt event for ring tcl2host-status-ring</div><div class='del'>-</div><div class='add'>+    minItems: 32</div><div class='add'>+    maxItems: 52</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: misc-pulse1</div><div class='del'>-      - const: misc-latch</div><div class='del'>-      - const: sw-exception</div><div class='del'>-      - const: watchdog</div><div class='del'>-      - const: ce0</div><div class='del'>-      - const: ce1</div><div class='del'>-      - const: ce2</div><div class='del'>-      - const: ce3</div><div class='del'>-      - const: ce4</div><div class='del'>-      - const: ce5</div><div class='del'>-      - const: ce6</div><div class='del'>-      - const: ce7</div><div class='del'>-      - const: ce8</div><div class='del'>-      - const: ce9</div><div class='del'>-      - const: ce10</div><div class='del'>-      - const: ce11</div><div class='del'>-      - const: host2wbm-desc-feed</div><div class='del'>-      - const: host2reo-re-injection</div><div class='del'>-      - const: host2reo-command</div><div class='del'>-      - const: host2rxdma-monitor-ring3</div><div class='del'>-      - const: host2rxdma-monitor-ring2</div><div class='del'>-      - const: host2rxdma-monitor-ring1</div><div class='del'>-      - const: reo2ost-exception</div><div class='del'>-      - const: wbm2host-rx-release</div><div class='del'>-      - const: reo2host-status</div><div class='del'>-      - const: reo2host-destination-ring4</div><div class='del'>-      - const: reo2host-destination-ring3</div><div class='del'>-      - const: reo2host-destination-ring2</div><div class='del'>-      - const: reo2host-destination-ring1</div><div class='del'>-      - const: rxdma2host-monitor-destination-mac3</div><div class='del'>-      - const: rxdma2host-monitor-destination-mac2</div><div class='del'>-      - const: rxdma2host-monitor-destination-mac1</div><div class='del'>-      - const: ppdu-end-interrupts-mac3</div><div class='del'>-      - const: ppdu-end-interrupts-mac2</div><div class='del'>-      - const: ppdu-end-interrupts-mac1</div><div class='del'>-      - const: rxdma2host-monitor-status-ring-mac3</div><div class='del'>-      - const: rxdma2host-monitor-status-ring-mac2</div><div class='del'>-      - const: rxdma2host-monitor-status-ring-mac1</div><div class='del'>-      - const: host2rxdma-host-buf-ring-mac3</div><div class='del'>-      - const: host2rxdma-host-buf-ring-mac2</div><div class='del'>-      - const: host2rxdma-host-buf-ring-mac1</div><div class='del'>-      - const: rxdma2host-destination-ring-mac3</div><div class='del'>-      - const: rxdma2host-destination-ring-mac2</div><div class='del'>-      - const: rxdma2host-destination-ring-mac1</div><div class='del'>-      - const: host2tcl-input-ring4</div><div class='del'>-      - const: host2tcl-input-ring3</div><div class='del'>-      - const: host2tcl-input-ring2</div><div class='del'>-      - const: host2tcl-input-ring1</div><div class='del'>-      - const: wbm2host-tx-completions-ring3</div><div class='del'>-      - const: wbm2host-tx-completions-ring2</div><div class='del'>-      - const: wbm2host-tx-completions-ring1</div><div class='del'>-      - const: tcl2host-status-ring</div><div class='add'>+    maxItems: 52</div><div class='ctx'> </div><div class='ctx'>   qcom,rproc:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='hunk'>@@ -151,27 +48,224 @@ properties:</div><div class='ctx'>       board-2.bin for designs with colliding bus and device specific ids</div><div class='ctx'> </div><div class='ctx'>   memory-region:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'>     description:</div><div class='ctx'>       phandle to a node describing reserved memory (System RAM memory)</div><div class='ctx'>       used by ath11k firmware (see bindings/reserved-memory/reserved-memory.txt)</div><div class='ctx'> </div><div class='add'>+  iommus:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  wifi-firmware:</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      WCN6750 wifi node can contain one optional firmware subnode.</div><div class='add'>+      Firmware subnode is needed when the platform does not have Trustzone.</div><div class='add'>+    required:</div><div class='add'>+      - iommus</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: State bits used by the AP to signal the WLAN Q6.</div><div class='add'>+    items:</div><div class='add'>+      - description: Signal bits used to enable/disable low power mode</div><div class='add'>+                     on WCN6750 in the case of WoW (Wake on Wireless).</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: The names of the state bits used for SMP2P output.</div><div class='add'>+    items:</div><div class='add'>+      - const: wlan-smp2p-out</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='del'>-  - interrupt-names</div><div class='ctx'>   - qcom,rproc</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq8074-wifi</div><div class='add'>+              - qcom,ipq6018-wifi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: misc-pulse1 interrupt events</div><div class='add'>+            - description: misc-latch interrupt events</div><div class='add'>+            - description: sw exception interrupt events</div><div class='add'>+            - description: watchdog interrupt events</div><div class='add'>+            - description: interrupt event for ring CE0</div><div class='add'>+            - description: interrupt event for ring CE1</div><div class='add'>+            - description: interrupt event for ring CE2</div><div class='add'>+            - description: interrupt event for ring CE3</div><div class='add'>+            - description: interrupt event for ring CE4</div><div class='add'>+            - description: interrupt event for ring CE5</div><div class='add'>+            - description: interrupt event for ring CE6</div><div class='add'>+            - description: interrupt event for ring CE7</div><div class='add'>+            - description: interrupt event for ring CE8</div><div class='add'>+            - description: interrupt event for ring CE9</div><div class='add'>+            - description: interrupt event for ring CE10</div><div class='add'>+            - description: interrupt event for ring CE11</div><div class='add'>+            - description: interrupt event for ring host2wbm-desc-feed</div><div class='add'>+            - description: interrupt event for ring host2reo-re-injection</div><div class='add'>+            - description: interrupt event for ring host2reo-command</div><div class='add'>+            - description: interrupt event for ring host2rxdma-monitor-ring3</div><div class='add'>+            - description: interrupt event for ring host2rxdma-monitor-ring2</div><div class='add'>+            - description: interrupt event for ring host2rxdma-monitor-ring1</div><div class='add'>+            - description: interrupt event for ring reo2ost-exception</div><div class='add'>+            - description: interrupt event for ring wbm2host-rx-release</div><div class='add'>+            - description: interrupt event for ring reo2host-status</div><div class='add'>+            - description: interrupt event for ring reo2host-destination-ring4</div><div class='add'>+            - description: interrupt event for ring reo2host-destination-ring3</div><div class='add'>+            - description: interrupt event for ring reo2host-destination-ring2</div><div class='add'>+            - description: interrupt event for ring reo2host-destination-ring1</div><div class='add'>+            - description: interrupt event for ring rxdma2host-monitor-destination-mac3</div><div class='add'>+            - description: interrupt event for ring rxdma2host-monitor-destination-mac2</div><div class='add'>+            - description: interrupt event for ring rxdma2host-monitor-destination-mac1</div><div class='add'>+            - description: interrupt event for ring ppdu-end-interrupts-mac3</div><div class='add'>+            - description: interrupt event for ring ppdu-end-interrupts-mac2</div><div class='add'>+            - description: interrupt event for ring ppdu-end-interrupts-mac1</div><div class='add'>+            - description: interrupt event for ring rxdma2host-monitor-status-ring-mac3</div><div class='add'>+            - description: interrupt event for ring rxdma2host-monitor-status-ring-mac2</div><div class='add'>+            - description: interrupt event for ring rxdma2host-monitor-status-ring-mac1</div><div class='add'>+            - description: interrupt event for ring host2rxdma-host-buf-ring-mac3</div><div class='add'>+            - description: interrupt event for ring host2rxdma-host-buf-ring-mac2</div><div class='add'>+            - description: interrupt event for ring host2rxdma-host-buf-ring-mac1</div><div class='add'>+            - description: interrupt event for ring rxdma2host-destination-ring-mac3</div><div class='add'>+            - description: interrupt event for ring rxdma2host-destination-ring-mac2</div><div class='add'>+            - description: interrupt event for ring rxdma2host-destination-ring-mac1</div><div class='add'>+            - description: interrupt event for ring host2tcl-input-ring4</div><div class='add'>+            - description: interrupt event for ring host2tcl-input-ring3</div><div class='add'>+            - description: interrupt event for ring host2tcl-input-ring2</div><div class='add'>+            - description: interrupt event for ring host2tcl-input-ring1</div><div class='add'>+            - description: interrupt event for ring wbm2host-tx-completions-ring3</div><div class='add'>+            - description: interrupt event for ring wbm2host-tx-completions-ring2</div><div class='add'>+            - description: interrupt event for ring wbm2host-tx-completions-ring1</div><div class='add'>+            - description: interrupt event for ring tcl2host-status-ring</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: misc-pulse1</div><div class='add'>+            - const: misc-latch</div><div class='add'>+            - const: sw-exception</div><div class='add'>+            - const: watchdog</div><div class='add'>+            - const: ce0</div><div class='add'>+            - const: ce1</div><div class='add'>+            - const: ce2</div><div class='add'>+            - const: ce3</div><div class='add'>+            - const: ce4</div><div class='add'>+            - const: ce5</div><div class='add'>+            - const: ce6</div><div class='add'>+            - const: ce7</div><div class='add'>+            - const: ce8</div><div class='add'>+            - const: ce9</div><div class='add'>+            - const: ce10</div><div class='add'>+            - const: ce11</div><div class='add'>+            - const: host2wbm-desc-feed</div><div class='add'>+            - const: host2reo-re-injection</div><div class='add'>+            - const: host2reo-command</div><div class='add'>+            - const: host2rxdma-monitor-ring3</div><div class='add'>+            - const: host2rxdma-monitor-ring2</div><div class='add'>+            - const: host2rxdma-monitor-ring1</div><div class='add'>+            - const: reo2ost-exception</div><div class='add'>+            - const: wbm2host-rx-release</div><div class='add'>+            - const: reo2host-status</div><div class='add'>+            - const: reo2host-destination-ring4</div><div class='add'>+            - const: reo2host-destination-ring3</div><div class='add'>+            - const: reo2host-destination-ring2</div><div class='add'>+            - const: reo2host-destination-ring1</div><div class='add'>+            - const: rxdma2host-monitor-destination-mac3</div><div class='add'>+            - const: rxdma2host-monitor-destination-mac2</div><div class='add'>+            - const: rxdma2host-monitor-destination-mac1</div><div class='add'>+            - const: ppdu-end-interrupts-mac3</div><div class='add'>+            - const: ppdu-end-interrupts-mac2</div><div class='add'>+            - const: ppdu-end-interrupts-mac1</div><div class='add'>+            - const: rxdma2host-monitor-status-ring-mac3</div><div class='add'>+            - const: rxdma2host-monitor-status-ring-mac2</div><div class='add'>+            - const: rxdma2host-monitor-status-ring-mac1</div><div class='add'>+            - const: host2rxdma-host-buf-ring-mac3</div><div class='add'>+            - const: host2rxdma-host-buf-ring-mac2</div><div class='add'>+            - const: host2rxdma-host-buf-ring-mac1</div><div class='add'>+            - const: rxdma2host-destination-ring-mac3</div><div class='add'>+            - const: rxdma2host-destination-ring-mac2</div><div class='add'>+            - const: rxdma2host-destination-ring-mac1</div><div class='add'>+            - const: host2tcl-input-ring4</div><div class='add'>+            - const: host2tcl-input-ring3</div><div class='add'>+            - const: host2tcl-input-ring2</div><div class='add'>+            - const: host2tcl-input-ring1</div><div class='add'>+            - const: wbm2host-tx-completions-ring3</div><div class='add'>+            - const: wbm2host-tx-completions-ring2</div><div class='add'>+            - const: wbm2host-tx-completions-ring1</div><div class='add'>+            - const: tcl2host-status-ring</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq8074-wifi</div><div class='add'>+              - qcom,ipq6018-wifi</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupt-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,wcn6750-wifi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: interrupt event for ring CE1</div><div class='add'>+            - description: interrupt event for ring CE2</div><div class='add'>+            - description: interrupt event for ring CE3</div><div class='add'>+            - description: interrupt event for ring CE4</div><div class='add'>+            - description: interrupt event for ring CE5</div><div class='add'>+            - description: interrupt event for ring CE6</div><div class='add'>+            - description: interrupt event for ring CE7</div><div class='add'>+            - description: interrupt event for ring CE8</div><div class='add'>+            - description: interrupt event for ring CE9</div><div class='add'>+            - description: interrupt event for ring CE10</div><div class='add'>+            - description: interrupt event for ring DP1</div><div class='add'>+            - description: interrupt event for ring DP2</div><div class='add'>+            - description: interrupt event for ring DP3</div><div class='add'>+            - description: interrupt event for ring DP4</div><div class='add'>+            - description: interrupt event for ring DP5</div><div class='add'>+            - description: interrupt event for ring DP6</div><div class='add'>+            - description: interrupt event for ring DP7</div><div class='add'>+            - description: interrupt event for ring DP8</div><div class='add'>+            - description: interrupt event for ring DP9</div><div class='add'>+            - description: interrupt event for ring DP10</div><div class='add'>+            - description: interrupt event for ring DP11</div><div class='add'>+            - description: interrupt event for ring DP12</div><div class='add'>+            - description: interrupt event for ring DP13</div><div class='add'>+            - description: interrupt event for ring DP14</div><div class='add'>+            - description: interrupt event for ring DP15</div><div class='add'>+            - description: interrupt event for ring DP16</div><div class='add'>+            - description: interrupt event for ring DP17</div><div class='add'>+            - description: interrupt event for ring DP18</div><div class='add'>+            - description: interrupt event for ring DP19</div><div class='add'>+            - description: interrupt event for ring DP20</div><div class='add'>+            - description: interrupt event for ring DP21</div><div class='add'>+            - description: interrupt event for ring DP22</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'> </div><div class='del'>-    q6v5_wcss: q6v5_wcss@CD00000 {</div><div class='add'>+    q6v5_wcss: remoteproc@cd00000 {</div><div class='ctx'>         compatible = "qcom,ipq8074-wcss-pil";</div><div class='del'>-        reg = &lt;0xCD00000 0x4040&gt;,</div><div class='del'>-              &lt;0x4AB000 0x20&gt;;</div><div class='add'>+        reg = &lt;0xcd00000 0x4040&gt;,</div><div class='add'>+              &lt;0x4ab000 0x20&gt;;</div><div class='ctx'>         reg-names = "qdsp6",</div><div class='ctx'>                     "rmb";</div><div class='ctx'>     };</div><div class='hunk'>@@ -292,7 +386,7 @@ examples:</div><div class='ctx'>         #address-cells = &lt;2&gt;;</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-        qcn9074_0: qcn9074_0@51100000 {</div><div class='add'>+        qcn9074_0: wifi@51100000 {</div><div class='ctx'>             no-map;</div><div class='ctx'>             reg = &lt;0x0 0x51100000 0x0 0x03500000&gt;;</div><div class='ctx'>         };</div><div class='hunk'>@@ -302,10 +396,73 @@ examples:</div><div class='ctx'>         pcie0 {</div><div class='ctx'>             #size-cells = &lt;2&gt;;</div><div class='ctx'>             #address-cells = &lt;3&gt;;</div><div class='del'>- </div><div class='add'>+</div><div class='ctx'>             wifi_0: wifi@0 {</div><div class='ctx'>                 reg = &lt;0 0 0 0 0&gt;;</div><div class='ctx'>                 memory-region = &lt;&amp;qcn9074_0&gt;;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    reserved-memory {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        wlan_ce_mem: memory@4cd000 {</div><div class='add'>+            no-map;</div><div class='add'>+            reg = &lt;0x0 0x004cd000 0x0 0x1000&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        wlan_fw_mem: memory@80c00000 {</div><div class='add'>+            no-map;</div><div class='add'>+            reg = &lt;0x0 0x80c00000 0x0 0xc00000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    wifi: wifi@17a10040 {</div><div class='add'>+        compatible = "qcom,wcn6750-wifi";</div><div class='add'>+        reg = &lt;0x17a10040 0x0&gt;;</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1c00 0x1&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 768 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 769 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 770 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 771 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 772 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 773 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 774 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 775 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 776 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 777 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 778 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 779 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 780 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 781 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 782 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 783 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 784 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 785 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 786 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 787 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 788 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 789 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 790 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 791 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 792 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 793 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 794 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 795 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 796 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 797 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 798 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 799 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        qcom,rproc = &lt;&amp;remoteproc_wpss&gt;;</div><div class='add'>+        memory-region = &lt;&amp;wlan_fw_mem&gt;, &lt;&amp;wlan_ce_mem&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;wlan_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "wlan-smp2p-out";</div><div class='add'>+        wifi-firmware {</div><div class='add'>+            iommus = &lt;&amp;apps_smmu 0x1c02 0x1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/staging/net/wireless/silabs,wfx.yaml b/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml<br/>index 105725a127ab..84e5659e50ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/staging/net/wireless/silabs,wfx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/staging/net/wireless/silabs,wfx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml</a></div><div class='hunk'>@@ -2,11 +2,10 @@</div><div class='ctx'> # Copyright (c) 2020, Silicon Laboratories, Inc.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-</div><div class='del'>-$id: http://devicetree.org/schemas/staging/net/wireless/silabs,wfx.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/net/wireless/silabs,wfx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Silicon Labs WFxxx devicetree bindings</div><div class='add'>+title: Silicon Labs WFxxx</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jérôme Pouiller &lt;jerome.pouiller@silabs.com&gt;</div><div class='hunk'>@@ -29,16 +28,11 @@ description: &gt;</div><div class='ctx'>     Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml for more</div><div class='ctx'>     information.</div><div class='ctx'> </div><div class='del'>-  For SPI:</div><div class='del'>-</div><div class='del'>-    In add of the properties below, please consult</div><div class='del'>-    Documentation/devicetree/bindings/spi/spi-controller.yaml for optional SPI</div><div class='del'>-    related properties.</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - prt,prtt1c-wfm200 # Protonic PRTT1C Board</div><div class='ctx'>           - silabs,brd4001a # WGM160P Evaluation Board</div><div class='ctx'>           - silabs,brd8022a # WF200 Evaluation Board</div><div class='ctx'>           - silabs,brd8023a # WFM200 Evaluation Board</div><div class='hunk'>@@ -51,8 +45,6 @@ properties:</div><div class='ctx'>       bindings.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   interrupts:</div><div class='ctx'>     description: The interrupt line. Should be IRQ_TYPE_EDGE_RISING. When SPI is</div><div class='ctx'>       used, this property is required. When SDIO is used, the "in-band"</div><div class='hunk'>@@ -83,12 +75,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   mac-address: true</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml b/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml<br/>index 8dd164d10290..75c9489f319b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/wireless/ti,wlcore.yaml</a></div><div class='hunk'>@@ -36,8 +36,6 @@ properties:</div><div class='ctx'>       This is required when connected via SPI, and optional when connected via</div><div class='ctx'>       SDIO.</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   interrupts:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -54,9 +52,11 @@ properties:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>   ref-clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: Reference clock frequency.</div><div class='ctx'> </div><div class='ctx'>   tcxo-clock-frequency:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: TCXO clock frequency.</div><div class='ctx'> </div><div class='ctx'>   clock-xtal:</div><div class='hunk'>@@ -67,68 +67,76 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - ti,wl1271</div><div class='del'>-          - ti,wl1273</div><div class='del'>-          - ti,wl1281</div><div class='del'>-          - ti,wl1283</div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - ref-clock-frequency</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,wl1271</div><div class='add'>+              - ti,wl1273</div><div class='add'>+              - ti,wl1281</div><div class='add'>+              - ti,wl1283</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - ref-clock-frequency</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'>     // For wl12xx family:</div><div class='del'>-    spi1 {</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            wlcore1: wlcore@1 {</div><div class='del'>-                    compatible = "ti,wl1271";</div><div class='del'>-                    reg = &lt;1&gt;;</div><div class='del'>-                    spi-max-frequency = &lt;48000000&gt;;</div><div class='del'>-                    interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                    vwlan-supply = &lt;&amp;vwlan_fixed&gt;;</div><div class='del'>-                    clock-xtal;</div><div class='del'>-                    ref-clock-frequency = &lt;38400000&gt;;</div><div class='del'>-            };</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        wlcore1: wlcore@1 {</div><div class='add'>+            compatible = "ti,wl1271";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            spi-max-frequency = &lt;48000000&gt;;</div><div class='add'>+            interrupts = &lt;8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            vwlan-supply = &lt;&amp;vwlan_fixed&gt;;</div><div class='add'>+            clock-xtal;</div><div class='add'>+            ref-clock-frequency = &lt;38400000&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='ctx'>     // For wl18xx family:</div><div class='del'>-    spi2 {</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            wlcore2: wlcore@0 {</div><div class='del'>-                    compatible = "ti,wl1835";</div><div class='del'>-                    reg = &lt;0&gt;;</div><div class='del'>-                    spi-max-frequency = &lt;48000000&gt;;</div><div class='del'>-                    interrupts = &lt;27 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-                    vwlan-supply = &lt;&amp;vwlan_fixed&gt;;</div><div class='del'>-            };</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        wlcore2: wlcore@0 {</div><div class='add'>+            compatible = "ti,wl1835";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;48000000&gt;;</div><div class='add'>+            interrupts = &lt;27 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            vwlan-supply = &lt;&amp;vwlan_fixed&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='ctx'>     // SDIO example:</div><div class='ctx'>     mmc3 {</div><div class='del'>-            vmmc-supply = &lt;&amp;wlan_en_reg&gt;;</div><div class='del'>-            bus-width = &lt;4&gt;;</div><div class='del'>-            cap-power-off-card;</div><div class='del'>-            keep-power-in-suspend;</div><div class='del'>-</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            wlcore3: wlcore@2 {</div><div class='del'>-                    compatible = "ti,wl1835";</div><div class='del'>-                    reg = &lt;2&gt;;</div><div class='del'>-                    interrupts = &lt;19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            };</div><div class='add'>+        vmmc-supply = &lt;&amp;wlan_en_reg&gt;;</div><div class='add'>+        bus-width = &lt;4&gt;;</div><div class='add'>+        cap-power-off-card;</div><div class='add'>+        keep-power-in-suspend;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        wlcore3: wlcore@2 {</div><div class='add'>+            compatible = "ti,wl1835";</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            interrupts = &lt;19 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt<br/>index b8e4894bc634..80e505a2fda1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/xilinx_axienet.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/net/xilinx_axienet.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/xilinx_axienet.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/xilinx_axienet.txt</a></div><div class='hunk'>@@ -26,7 +26,8 @@ Required properties:</div><div class='ctx'> 		  specified, the TX/RX DMA interrupts should be on that node</div><div class='ctx'> 		  instead, and only the Ethernet core interrupt is optionally</div><div class='ctx'> 		  specified here.</div><div class='del'>-- phy-handle	: Should point to the external phy device.</div><div class='add'>+- phy-handle	: Should point to the external phy device if exists. Pointing</div><div class='add'>+		  this to the PCS/PMA PHY is deprecated and should be avoided.</div><div class='ctx'> 		  See ethernet.txt file in the same directory.</div><div class='ctx'> - xlnx,rxmem	: Set to allocated memory buffer for Rx/Tx in the hardware</div><div class='ctx'> </div><div class='hunk'>@@ -67,6 +68,13 @@ Optional properties:</div><div class='ctx'>  - mdio		: Child node for MDIO bus. Must be defined if PHY access is</div><div class='ctx'> 		  required through the core's MDIO interface (i.e. always,</div><div class='ctx'> 		  unless the PHY is accessed through a different bus).</div><div class='add'>+		  Non-standard MDIO bus frequency is supported via</div><div class='add'>+		  "clock-frequency", see mdio.yaml.</div><div class='add'>+</div><div class='add'>+ - pcs-handle: 	  Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X</div><div class='add'>+		  modes, where "pcs-handle" should be used to point</div><div class='add'>+		  to the PCS/PMA PHY, and "phy-handle" should point to an</div><div class='add'>+		  external PHY if exists.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> 	axi_ethernet_eth: ethernet@40c00000 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml b/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml<br/>new file mode 100644<br/>index 000000000000..92d8ade988f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/net/xlnx,emaclite.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/net/xlnx,emaclite.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/net/xlnx,emaclite.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx Emaclite Ethernet controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Radhey Shyam Pandey &lt;radhey.shyam.pandey@amd.com&gt;</div><div class='add'>+  - Harini Katakam &lt;harini.katakam@amd.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ethernet-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,opb-ethernetlite-1.01.a</div><div class='add'>+      - xlnx,opb-ethernetlite-1.01.b</div><div class='add'>+      - xlnx,xps-ethernetlite-1.00.a</div><div class='add'>+      - xlnx,xps-ethernetlite-2.00.a</div><div class='add'>+      - xlnx,xps-ethernetlite-2.01.a</div><div class='add'>+      - xlnx,xps-ethernetlite-3.00.a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-handle: true</div><div class='add'>+</div><div class='add'>+  local-mac-address: true</div><div class='add'>+</div><div class='add'>+  xlnx,tx-ping-pong:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: hardware supports tx ping pong buffer.</div><div class='add'>+</div><div class='add'>+  xlnx,rx-ping-pong:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: hardware supports rx ping pong buffer.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - phy-handle</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    axi_ethernetlite_1: ethernet@40e00000 {</div><div class='add'>+        compatible = "xlnx,xps-ethernetlite-3.00.a";</div><div class='add'>+        reg = &lt;0x40e00000 0x10000&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;axi_intc_1&gt;;</div><div class='add'>+        interrupts = &lt;1&gt;;</div><div class='add'>+        local-mac-address = [00 00 00 00 00 00];</div><div class='add'>+        phy-handle = &lt;&amp;phy0&gt;;</div><div class='add'>+        xlnx,rx-ping-pong;</div><div class='add'>+        xlnx,tx-ping-pong;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml<br/>new file mode 100644<br/>index 000000000000..fc6555724e18<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvme/apple,nvme-ans.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Apple ANS NVM Express host controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sven Peter &lt;sven@svenpeter.dev&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - apple,t8103-nvme-ans2</div><div class='add'>+          - apple,t8112-nvme-ans2</div><div class='add'>+          - apple,t6000-nvme-ans2</div><div class='add'>+      - const: apple,nvme-ans2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: NVMe and NVMMU registers</div><div class='add'>+      - description: ANS2 co-processor control registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: nvme</div><div class='add'>+      - const: ans</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    # two domains for t8103, three for t6000</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: power domain for the NVMe controller.</div><div class='add'>+      - description: power domain for the first PCIe bus connecting the NVMe</div><div class='add'>+          controller to the storage modules.</div><div class='add'>+      - description: optional power domain for the second PCIe bus</div><div class='add'>+          connecting the NVMe controller to the storage modules.</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: ans</div><div class='add'>+      - const: apcie0</div><div class='add'>+      - const: apcie1</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Mailbox of the ANS2 co-processor</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  apple,sart:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      Reference to the SART address filter.</div><div class='add'>+</div><div class='add'>+      The SART address filter is documented in iommu/apple,sart.yaml.</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - apple,t8103-nvme-ans2</div><div class='add'>+          - apple,t8112-nvme-ans2</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    power-domains:</div><div class='add'>+      maxItems: 2</div><div class='add'>+    power-domain-names:</div><div class='add'>+      maxItems: 2</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    power-domains:</div><div class='add'>+      minItems: 3</div><div class='add'>+    power-domain-names:</div><div class='add'>+      minItems: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - resets</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - mboxes</div><div class='add'>+  - interrupts</div><div class='add'>+  - apple,sart</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/apple-aic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    nvme@7bcc0000 {</div><div class='add'>+      compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2";</div><div class='add'>+      reg = &lt;0x7bcc0000 0x40000&gt;, &lt;0x77400000 0x4000&gt;;</div><div class='add'>+      reg-names = "nvme", "ans";</div><div class='add'>+      interrupts = &lt;AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      mboxes = &lt;&amp;ans&gt;;</div><div class='add'>+      apple,sart = &lt;&amp;sart&gt;;</div><div class='add'>+      power-domains = &lt;&amp;ps_ans2&gt;, &lt;&amp;ps_apcie_st&gt;;</div><div class='add'>+      power-domain-names = "ans", "apcie0";</div><div class='add'>+      resets = &lt;&amp;ps_ans2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml b/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml<br/>index e558587ff885..296001e7f498 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/allwinner,sun4i-a10-sid.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/allwinner,sun4i-a10-sid.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Security ID Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Security ID</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/amlogic,meson-gxbb-efuse.yaml b/Documentation/devicetree/bindings/nvmem/amlogic,meson-gxbb-efuse.yaml<br/>new file mode 100644<br/>index 000000000000..e49c2754ff55<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/amlogic,meson-gxbb-efuse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/amlogic,meson-gxbb-efuse.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/amlogic,meson-gxbb-efuse.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson GX eFuse</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: amlogic,meson-gxbb-efuse</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson-gx-efuse</div><div class='add'>+          - const: amlogic,meson-gxbb-efuse</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  secure-monitor:</div><div class='add'>+    description: phandle to the secure-monitor node</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - secure-monitor</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    efuse: efuse {</div><div class='add'>+        compatible = "amlogic,meson-gxbb-efuse";</div><div class='add'>+        clocks = &lt;&amp;clk_efuse&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        secure-monitor = &lt;&amp;sm&gt;;</div><div class='add'>+</div><div class='add'>+        sn: sn@14 {</div><div class='add'>+            reg = &lt;0x14 0x10&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        eth_mac: mac@34 {</div><div class='add'>+            reg = &lt;0x34 0x10&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        bid: bid@46 {</div><div class='add'>+            reg = &lt;0x46 0x30&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml b/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml<br/>new file mode 100644<br/>index 000000000000..84b3dfd21e09<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/amlogic,meson6-efuse.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/amlogic,meson6-efuse.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson6 eFuse</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+  - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson6-efuse</div><div class='add'>+      - amlogic,meson8-efuse</div><div class='add'>+      - amlogic,meson8b-efuse</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    efuse: efuse@0 {</div><div class='add'>+        compatible = "amlogic,meson6-efuse";</div><div class='add'>+        reg = &lt;0x0 0x2000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk_efuse&gt;;</div><div class='add'>+        clock-names = "core";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet_mac_address: mac@1b4 {</div><div class='add'>+            reg = &lt;0x1b4 0x6&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        temperature_calib: calib@1f4 {</div><div class='add'>+             reg = &lt;0x1f4 0x4&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt b/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt<br/>deleted file mode 100644<br/>index f7b3ed74db54..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/amlogic-efuse.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-= Amlogic Meson GX eFuse device tree bindings =</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "amlogic,meson-gxbb-efuse"</div><div class='del'>-- clocks: phandle to the efuse peripheral clock provided by the</div><div class='del'>-	  clock controller.</div><div class='del'>-- secure-monitor: phandle to the secure-monitor node</div><div class='del'>-</div><div class='del'>-= Data cells =</div><div class='del'>-Are child nodes of eFuse, bindings of which as described in</div><div class='del'>-bindings/nvmem/nvmem.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	efuse: efuse {</div><div class='del'>-		compatible = "amlogic,meson-gxbb-efuse";</div><div class='del'>-		clocks = &lt;&amp;clkc CLKID_EFUSE&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		secure-monitor = &lt;&amp;sm&gt;;</div><div class='del'>-</div><div class='del'>-		sn: sn@14 {</div><div class='del'>-			reg = &lt;0x14 0x10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		eth_mac: eth_mac@34 {</div><div class='del'>-			reg = &lt;0x34 0x10&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		bid: bid@46 {</div><div class='del'>-			reg = &lt;0x46 0x30&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sm: secure-monitor {</div><div class='del'>-		compatible = "amlogic,meson-gxbb-sm";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-= Data consumers =</div><div class='del'>-Are device nodes which consume nvmem data cells.</div><div class='del'>-</div><div class='del'>-For example:</div><div class='del'>-</div><div class='del'>-	eth_mac {</div><div class='del'>-		...</div><div class='del'>-		nvmem-cells = &lt;&amp;eth_mac&gt;;</div><div class='del'>-		nvmem-cell-names = "eth_mac";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt b/Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt<br/>deleted file mode 100644<br/>index a3c63954a1a4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/amlogic-meson-mx-efuse.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-Amlogic Meson6/Meson8/Meson8b efuse</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: depending on the SoC this should be one of:</div><div class='del'>-	- "amlogic,meson6-efuse"</div><div class='del'>-	- "amlogic,meson8-efuse"</div><div class='del'>-	- "amlogic,meson8b-efuse"</div><div class='del'>-- reg: base address and size of the efuse registers</div><div class='del'>-- clocks: a reference to the efuse core gate clock</div><div class='del'>-- clock-names: must be "core"</div><div class='del'>-</div><div class='del'>-All properties and sub-nodes as well as the consumer bindings</div><div class='del'>-defined in nvmem.txt in this directory are also supported.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	efuse: nvmem@0 {</div><div class='del'>-		compatible = "amlogic,meson8-efuse";</div><div class='del'>-		reg = &lt;0x0 0x2000&gt;;</div><div class='del'>-		clocks = &lt;&amp;clkc CLKID_EFUSE&gt;;</div><div class='del'>-		clock-names = "core";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/apple,efuses.yaml b/Documentation/devicetree/bindings/nvmem/apple,efuses.yaml<br/>new file mode 100644<br/>index 000000000000..e0860b6b85f3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/apple,efuses.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/apple,efuses.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/apple,efuses.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Apple SoC eFuse-based NVMEM</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store</div><div class='add'>+  calibration data for the PCIe and the Type-C PHY or unique chip identifiers</div><div class='add'>+  such as the ECID.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sven Peter &lt;sven@svenpeter.dev&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - apple,t8103-efuses</div><div class='add'>+          - apple,t6000-efuses</div><div class='add'>+      - const: apple,efuses</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    efuse@3d2bc000 {</div><div class='add'>+        compatible = "apple,t8103-efuses", "apple,efuses";</div><div class='add'>+        reg = &lt;0x3d2bc000 0x1000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        ecid: efuse@500 {</div><div class='add'>+            reg = &lt;0x500 0x8&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml b/Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml<br/>index 25033de3ef6b..36def7128fca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/brcm,nvram.yaml</a></div><div class='hunk'>@@ -20,7 +20,7 @@ maintainers:</div><div class='ctx'>   - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml<br/>index 80914b93638e..70fb2ad25103 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml</a></div><div class='hunk'>@@ -10,29 +10,53 @@ maintainers:</div><div class='ctx'>   - Michael Walle &lt;michael@walle.cc&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  SFP is the security fuse processor which among other things provide a</div><div class='add'>+  SFP is the security fuse processor which among other things provides a</div><div class='ctx'>   unique identifier per part.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - fsl,ls1028a-sfp</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Trust architecture 2.1 SFP</div><div class='add'>+        items:</div><div class='add'>+          - const: fsl,ls1021a-sfp</div><div class='add'>+      - description: Trust architecture 3.0 SFP</div><div class='add'>+        items:</div><div class='add'>+          - const: fsl,ls1028a-sfp</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      The SFP clock. Typically, this is the platform clock divided by 4.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: sfp</div><div class='add'>+</div><div class='add'>+  ta-prog-sfp-supply:</div><div class='add'>+    description:</div><div class='add'>+      The regulator for the TA_PROG_SFP pin. It will be enabled for programming</div><div class='add'>+      and disabled for reading.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/fsl,qoriq-clockgen.h&gt;</div><div class='ctx'>     efuse@1e80000 {</div><div class='ctx'>         compatible = "fsl,ls1028a-sfp";</div><div class='ctx'>         reg = &lt;0x1e80000 0x8000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clockgen QORIQ_CLK_PLATFORM_PLL</div><div class='add'>+                            QORIQ_CLK_PLL_DIV(4)&gt;;</div><div class='add'>+        clock-names = "sfp";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/fsl,scu-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,scu-ocotp.yaml<br/>new file mode 100644<br/>index 000000000000..f0a49283649d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/fsl,scu-ocotp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/fsl,scu-ocotp.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/fsl,scu-ocotp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - OCOTP Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8qm-scu-ocotp</div><div class='add'>+      - fsl,imx8qxp-scu-ocotp</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^mac@[0-9a-f]*$':</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      MAC address.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description:</div><div class='add'>+          Byte offset within OCOTP where the MAC address is stored</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ocotp {</div><div class='add'>+        compatible = "fsl,imx8qxp-scu-ocotp";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        fec_mac0: mac@2c4 {</div><div class='add'>+            reg = &lt;0x2c4 6&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/imx-iim.yaml b/Documentation/devicetree/bindings/nvmem/imx-iim.yaml<br/>index 9cc43e7a4b38..e9d9d8df4811 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/imx-iim.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/imx-iim.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/imx-iim.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/imx-iim.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/imx-iim.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale i.MX IC Identification Module (IIM) device tree bindings</div><div class='add'>+title: Freescale i.MX IC Identification Module (IIM)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='hunk'>@@ -14,7 +14,7 @@ description: |</div><div class='ctx'>   i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 and i.MX53 SoCs.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml<br/>index 8a43dc1283fe..9876243ff1e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings</div><div class='add'>+title: Freescale i.MX6 On-Chip OTP Controller (OCOTP)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='hunk'>@@ -15,7 +15,7 @@ description: |</div><div class='ctx'>   i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM, i.MX8MN and i.MX8MP SoCs.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml b/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml<br/>index bf84768228f5..e89fd879c968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/ingenic,jz4780-efuse.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/ingenic,jz4780-efuse.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic JZ EFUSE driver bindings</div><div class='add'>+title: Ingenic JZ EFUSE driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - PrasannaKumar Muralidharan &lt;prasannatsmkumar@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml b/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml<br/>new file mode 100644<br/>index 000000000000..c713e23819f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/layouts/kontron,sl28-vpd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVMEM layout of the Kontron SMARC-sAL28 vital product data</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Michael Walle &lt;michael@walle.cc&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The vital product data (VPD) of the sl28 boards contains a serial</div><div class='add'>+  number and a base MAC address. The actual MAC addresses for the</div><div class='add'>+  on-board ethernet devices are derived from this base MAC address by</div><div class='add'>+  adding an offset.</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: kontron,sl28-vpd</div><div class='add'>+</div><div class='add'>+  serial-number:</div><div class='add'>+    type: object</div><div class='add'>+    description: The board's serial number</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  base-mac-address:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Base MAC address for all on-module network interfaces. The first</div><div class='add'>+      argument of the phandle will be treated as an offset.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#nvmem-cell-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+      otp-1 {</div><div class='add'>+          compatible = "user-otp";</div><div class='add'>+</div><div class='add'>+          nvmem-layout {</div><div class='add'>+              compatible = "kontron,sl28-vpd";</div><div class='add'>+</div><div class='add'>+              serial_number: serial-number {</div><div class='add'>+              };</div><div class='add'>+</div><div class='add'>+              base_mac_address: base-mac-address {</div><div class='add'>+                  #nvmem-cell-cells = &lt;1&gt;;</div><div class='add'>+              };</div><div class='add'>+          };</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml<br/>new file mode 100644<br/>index 000000000000..8512ee538c4c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/layouts/nvmem-layout.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVMEM (Non Volatile Memory) layouts</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+  - Michael Walle &lt;michael@walle.cc&gt;</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Most NVMEM layouts are static and thus do not require additional description</div><div class='add'>+  besides the bytes/bits offset and length. Other layouts can be less statically</div><div class='add'>+  define and might require dynamic reading of the NVMEM device in order to</div><div class='add'>+  perform their parsing. The nvmem-layout container is here to describe these.</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - $ref: kontron,sl28-vpd.yaml</div><div class='add'>+  - $ref: onie,tlv-layout.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible: true</div><div class='add'>+</div><div class='add'>+  '#address-cells': false</div><div class='add'>+</div><div class='add'>+  '#size-cells': false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml b/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml<br/>new file mode 100644<br/>index 000000000000..714a6538cc7c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/layouts/onie,tlv-layout.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVMEM layout of the ONIE tlv table</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Modern networking hardware implementing the Open Compute Project ONIE</div><div class='add'>+  infrastructure shall provide a non-volatile memory with a table whose the</div><div class='add'>+  content is well specified and gives many information about the manufacturer</div><div class='add'>+  (name, country of manufacture, etc) as well as device caracteristics (serial</div><div class='add'>+  number, hardware version, mac addresses, etc). The underlaying device type</div><div class='add'>+  (flash, EEPROM,...) is not specified. The exact location of each value is also</div><div class='add'>+  dynamic and should be discovered at run time because it depends on the</div><div class='add'>+  parameters the manufacturer decided to embed.</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: onie,tlv-layout</div><div class='add'>+</div><div class='add'>+  product-name:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  part-number:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  serial-number:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  mac-address:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Base MAC address for all on-module network interfaces. The first</div><div class='add'>+      argument of the phandle will be treated as an offset.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      "#nvmem-cell-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  manufacture-date:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  device-version:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  label-revision:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  platform-name:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  onie-version:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  num-macs:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  manufacturer:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  country-code:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  vendor:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  diag-version:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  service-tag:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+  vendor-extension:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        eeprom@56 {</div><div class='add'>+            compatible = "atmel,24c64";</div><div class='add'>+            read-only;</div><div class='add'>+            reg = &lt;0x56&gt;;</div><div class='add'>+</div><div class='add'>+            nvmem-layout {</div><div class='add'>+                compatible = "onie,tlv-layout";</div><div class='add'>+</div><div class='add'>+                serial-number {</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+            compatible = "m25p80", "jedec,spi-nor";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            otp {</div><div class='add'>+                compatible = "user-otp";</div><div class='add'>+</div><div class='add'>+                nvmem-layout {</div><div class='add'>+                    compatible = "onie,tlv-layout";</div><div class='add'>+</div><div class='add'>+                    mac-address {</div><div class='add'>+                        #nvmem-cell-cells = &lt;1&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml b/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml<br/>new file mode 100644<br/>index 000000000000..d16d42fb98b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/mediatek,efuse.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek efuse</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek's efuse is used for storing calibration data, it can be accessed</div><div class='add'>+  on ARM devices usiong I/O mapped memory.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andrew-CT Chen &lt;andrew-ct.chen@mediatek.com&gt;</div><div class='add'>+  - Lala Lin &lt;lala.lin@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^efuse@[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt7622-efuse</div><div class='add'>+              - mediatek,mt7623-efuse</div><div class='add'>+              - mediatek,mt8173-efuse</div><div class='add'>+              - mediatek,mt8183-efuse</div><div class='add'>+              - mediatek,mt8186-efuse</div><div class='add'>+              - mediatek,mt8188-efuse</div><div class='add'>+              - mediatek,mt8192-efuse</div><div class='add'>+              - mediatek,mt8195-efuse</div><div class='add'>+              - mediatek,mt8516-efuse</div><div class='add'>+          - const: mediatek,efuse</div><div class='add'>+      - const: mediatek,mt8173-efuse</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    efuse@11c10000 {</div><div class='add'>+        compatible = "mediatek,mt8195-efuse", "mediatek,efuse";</div><div class='add'>+        reg = &lt;0x11c10000 0x1000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        u3_tx_imp_p0: usb3-tx-imp@184,1 {</div><div class='add'>+            reg = &lt;0x184 0x1&gt;;</div><div class='add'>+            bits = &lt;0 5&gt;;</div><div class='add'>+        };</div><div class='add'>+        u3_rx_imp_p0: usb3-rx-imp@184,2 {</div><div class='add'>+            reg = &lt;0x184 0x2&gt;;</div><div class='add'>+            bits = &lt;5 5&gt;;</div><div class='add'>+        };</div><div class='add'>+        u3_intr_p0: usb3-intr@185 {</div><div class='add'>+            reg = &lt;0x185 0x1&gt;;</div><div class='add'>+            bits = &lt;2 6&gt;;</div><div class='add'>+        };</div><div class='add'>+        comb_tx_imp_p1: usb3-tx-imp@186,1 {</div><div class='add'>+            reg = &lt;0x186 0x1&gt;;</div><div class='add'>+            bits = &lt;0 5&gt;;</div><div class='add'>+        };</div><div class='add'>+        comb_rx_imp_p1: usb3-rx-imp@186,2 {</div><div class='add'>+            reg = &lt;0x186 0x2&gt;;</div><div class='add'>+            bits = &lt;5 5&gt;;</div><div class='add'>+        };</div><div class='add'>+        comb_intr_p1: usb3-intr@187 {</div><div class='add'>+            reg = &lt;0x187 0x1&gt;;</div><div class='add'>+            bits = &lt;2 6&gt;;</div><div class='add'>+        };</div><div class='add'>+        u2_intr_p0: usb2-intr-p0@188,1 {</div><div class='add'>+            reg = &lt;0x188 0x1&gt;;</div><div class='add'>+            bits = &lt;0 5&gt;;</div><div class='add'>+        };</div><div class='add'>+        u2_intr_p1: usb2-intr-p1@188,2 {</div><div class='add'>+            reg = &lt;0x188 0x2&gt;;</div><div class='add'>+            bits = &lt;5 5&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml<br/>new file mode 100644<br/>index 000000000000..f97c6beb4766<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/microchip,lan9662-otpc.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/microchip,lan9662-otpc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip LAN9662 OTP Controller (OTPC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  OTP controller drives a NVMEM memory where system specific data</div><div class='add'>+  (e.g. hardware configuration settings, chip identifiers) or</div><div class='add'>+  user specific data could be stored.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: microchip,lan9668-otpc</div><div class='add'>+          - const: microchip,lan9662-otpc</div><div class='add'>+      - enum:</div><div class='add'>+          - microchip,lan9662-otpc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    otpc: otp@e0021000 {</div><div class='add'>+        compatible = "microchip,lan9662-otpc";</div><div class='add'>+        reg = &lt;0xe0021000 0x300&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml<br/>new file mode 100644<br/>index 000000000000..a296d348adb4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/nvmem/microchip,sama7g5-otpc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip SAMA7G5 OTP Controller (OTPC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  OTP controller drives a NVMEM memory where system specific data</div><div class='add'>+  (e.g. calibration data for analog cells, hardware configuration</div><div class='add'>+  settings, chip identifiers) or user specific data could be stored.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: microchip,sama7g5-otpc</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/nvmem/microchip,sama7g5-otpc.h&gt;</div><div class='add'>+</div><div class='add'>+    otpc: efuse@e8c00000 {</div><div class='add'>+        compatible = "microchip,sama7g5-otpc", "syscon";</div><div class='add'>+        reg = &lt;0xe8c00000 0xec&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        temperature_calib: calib@1 {</div><div class='add'>+            reg = &lt;OTP_PKT(1) 76&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt b/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt<br/>deleted file mode 100644<br/>index 39d529599444..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/mtk-efuse.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/mtk-efuse.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-= Mediatek MTK-EFUSE device tree bindings =</div><div class='del'>-</div><div class='del'>-This binding is intended to represent MTK-EFUSE which is found in most Mediatek SOCs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be</div><div class='del'>-	      "mediatek,mt7622-efuse", "mediatek,efuse": for MT7622</div><div class='del'>-	      "mediatek,mt7623-efuse", "mediatek,efuse": for MT7623</div><div class='del'>-	      "mediatek,mt8173-efuse" or "mediatek,efuse": for MT8173</div><div class='del'>-	      "mediatek,mt8192-efuse", "mediatek,efuse": for MT8192</div><div class='del'>-	      "mediatek,mt8195-efuse", "mediatek,efuse": for MT8195</div><div class='del'>-	      "mediatek,mt8516-efuse", "mediatek,efuse": for MT8516</div><div class='del'>-- reg: Should contain registers location and length</div><div class='del'>-- bits: contain the bits range by offset and size</div><div class='del'>-</div><div class='del'>-= Data cells =</div><div class='del'>-Are child nodes of MTK-EFUSE, bindings of which as described in</div><div class='del'>-bindings/nvmem/nvmem.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	efuse: efuse@10206000 {</div><div class='del'>-		compatible = "mediatek,mt8173-efuse";</div><div class='del'>-		reg	   = &lt;0 0x10206000 0 0x1000&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		/* Data cells */</div><div class='del'>-		thermal_calibration: calib@528 {</div><div class='del'>-			reg = &lt;0x528 0xc&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-= Data consumers =</div><div class='del'>-Are device nodes which consume nvmem data cells.</div><div class='del'>-</div><div class='del'>-For example:</div><div class='del'>-</div><div class='del'>-	thermal {</div><div class='del'>-		...</div><div class='del'>-		nvmem-cells = &lt;&amp;thermal_calibration&gt;;</div><div class='del'>-		nvmem-cell-names = "calibration";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml<br/>index ff317fd7c15b..8938eec22b52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml b/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml<br/>index dbe4ffdd644c..6c26800f8b79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/nintendo-otp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/nintendo-otp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Nintendo Wii and Wii U OTP Device Tree Bindings</div><div class='add'>+title: Nintendo Wii and Wii U OTP</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This binding represents the OTP memory as found on a Nintendo Wii or Wii U,</div><div class='hunk'>@@ -17,7 +17,7 @@ maintainers:</div><div class='ctx'>   - Emmanuel Gil Peyrot &lt;linkmauve@linkmauve.fr&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml b/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml<br/>index b1da238c8bcb..a26633bf52db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/base.yaml#</div><div class='ctx'> </div><div class='del'>-title: NVMEM (Non Volatile Memory) Consumer Device Tree Bindings</div><div class='add'>+title: NVMEM (Non Volatile Memory) Consumer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml<br/>index 3bb349c634cb..75bb93dda9df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/nvmem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/nvmem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/nvmem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/nvmem.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/nvmem.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NVMEM (Non Volatile Memory) Device Tree Bindings</div><div class='add'>+title: NVMEM (Non Volatile Memory)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -39,6 +39,13 @@ properties:</div><div class='ctx'>       when it's driven low (logical '0') to allow writing.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  nvmem-layout:</div><div class='add'>+    $ref: /schemas/nvmem/layouts/nvmem-layout.yaml</div><div class='add'>+    description:</div><div class='add'>+      Alternative to the statically defined nvmem cells, this</div><div class='add'>+      container may reference more advanced (dynamic) layout</div><div class='add'>+      parsers.</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "@[0-9a-f]+(,[0-7])?$":</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -67,6 +74,7 @@ examples:</div><div class='ctx'>       #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'>       qfprom: eeprom@700000 {</div><div class='add'>+          compatible = "qcom,msm8974-qfprom", "qcom,qfprom";</div><div class='ctx'>           #address-cells = &lt;1&gt;;</div><div class='ctx'>           #size-cells = &lt;1&gt;;</div><div class='ctx'>           reg = &lt;0x00700000 0x100000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml<br/>index dede8892ee01..8d8503dd934b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies Inc, QFPROM Efuse bindings</div><div class='add'>+title: Qualcomm Technologies Inc, QFPROM Efuse</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -18,14 +18,24 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - qcom,apq8064-qfprom</div><div class='ctx'>           - qcom,apq8084-qfprom</div><div class='del'>-          - qcom,msm8974-qfprom</div><div class='add'>+          - qcom,ipq8064-qfprom</div><div class='add'>+          - qcom,ipq8074-qfprom</div><div class='ctx'>           - qcom,msm8916-qfprom</div><div class='add'>+          - qcom,msm8974-qfprom</div><div class='add'>+          - qcom,msm8976-qfprom</div><div class='ctx'>           - qcom,msm8996-qfprom</div><div class='ctx'>           - qcom,msm8998-qfprom</div><div class='ctx'>           - qcom,qcs404-qfprom</div><div class='ctx'>           - qcom,sc7180-qfprom</div><div class='ctx'>           - qcom,sc7280-qfprom</div><div class='add'>+          - qcom,sdm630-qfprom</div><div class='add'>+          - qcom,sdm670-qfprom</div><div class='ctx'>           - qcom,sdm845-qfprom</div><div class='add'>+          - qcom,sm6115-qfprom</div><div class='add'>+          - qcom,sm6350-qfprom</div><div class='add'>+          - qcom,sm6375-qfprom</div><div class='add'>+          - qcom,sm8150-qfprom</div><div class='add'>+          - qcom,sm8250-qfprom</div><div class='ctx'>       - const: qcom,qfprom</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml<br/>index ee79e13b5fe0..dce0c7d84ce7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/qcom,spmi-sdam.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies, Inc. SPMI SDAM DT bindings</div><div class='add'>+title: Qualcomm Technologies, Inc. SPMI SDAM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Shyam Kumar Thella &lt;sthella@codeaurora.org&gt;</div><div class='hunk'>@@ -15,7 +15,7 @@ description: |</div><div class='ctx'>   to/from the PBUS.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -42,17 +42,22 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      sdam_1: nvram@b000 {</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;1&gt;;</div><div class='del'>-          compatible = "qcom,spmi-sdam";</div><div class='del'>-          reg = &lt;0xb000 0x100&gt;;</div><div class='del'>-          ranges = &lt;0 0xb000 0x100&gt;;</div><div class='del'>-</div><div class='del'>-          /* Data cells */</div><div class='del'>-          restart_reason: restart@50 {</div><div class='del'>-              reg = &lt;0x50 0x1&gt;;</div><div class='del'>-              bits = &lt;6 2&gt;;</div><div class='del'>-          };</div><div class='del'>-      };</div><div class='add'>+    pmic {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        sdam_1: nvram@b000 {</div><div class='add'>+            compatible = "qcom,spmi-sdam";</div><div class='add'>+            reg = &lt;0xb000&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            ranges = &lt;0 0xb000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+            /* Data cells */</div><div class='add'>+            restart_reason: restart@50 {</div><div class='add'>+                reg = &lt;0x50 0x1&gt;;</div><div class='add'>+                bits = &lt;6 2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/rmem.yaml b/Documentation/devicetree/bindings/nvmem/rmem.yaml<br/>index a4a755dcfc43..38a39c9b8c1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/rmem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/rmem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/rmem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/rmem.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Nicolas Saenz Julienne &lt;nsaenzjulienne@suse.de&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml<br/>index 104dd508565e..c5403e149080 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/rockchip-efuse.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip eFuse device tree bindings</div><div class='add'>+title: Rockchip eFuse</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml<br/>index c819f0e90320..ec20e33d9b8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml</a></div><div class='hunk'>@@ -11,10 +11,18 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - fsl,imx6q-snvs-lpgpr</div><div class='del'>-      - fsl,imx6ul-snvs-lpgpr</div><div class='del'>-      - fsl,imx7d-snvs-lpgpr</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mm-snvs-lpgpr</div><div class='add'>+              - fsl,imx8mn-snvs-lpgpr</div><div class='add'>+              - fsl,imx8mp-snvs-lpgpr</div><div class='add'>+              - fsl,imx8mq-snvs-lpgpr</div><div class='add'>+          - const: fsl,imx7d-snvs-lpgpr</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx6q-snvs-lpgpr</div><div class='add'>+          - fsl,imx6ul-snvs-lpgpr</div><div class='add'>+          - fsl,imx7d-snvs-lpgpr</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml b/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml<br/>index 2578e39deda9..b8bca0599c45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/socionext,uniphier-efuse.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Socionext UniPhier eFuse bindings</div><div class='add'>+title: Socionext UniPhier eFuse</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Keiji Hayashibara &lt;hayashibara.keiji@socionext.com&gt;</div><div class='ctx'>   - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   "#address-cells": true</div><div class='hunk'>@@ -31,65 +31,56 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    // The UniPhier eFuse should be a subnode of a "soc-glue" node.</div><div class='add'>+    efuse@100 {</div><div class='add'>+        compatible = "socionext,uniphier-efuse";</div><div class='add'>+        reg = &lt;0x100 0x28&gt;;</div><div class='add'>+    };</div><div class='ctx'> </div><div class='del'>-    soc-glue@5f900000 {</div><div class='del'>-        compatible = "simple-mfd";</div><div class='add'>+    efuse@200 {</div><div class='add'>+        compatible = "socionext,uniphier-efuse";</div><div class='add'>+        reg = &lt;0x200 0x68&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0x0 0x5f900000 0x2000&gt;;</div><div class='ctx'> </div><div class='del'>-        efuse@100 {</div><div class='del'>-            compatible = "socionext,uniphier-efuse";</div><div class='del'>-            reg = &lt;0x100 0x28&gt;;</div><div class='add'>+        /* Data cells */</div><div class='add'>+        usb_rterm0: trim@54,4 {</div><div class='add'>+            reg = &lt;0x54 1&gt;;</div><div class='add'>+            bits = &lt;4 2&gt;;</div><div class='ctx'>         };</div><div class='del'>-</div><div class='del'>-        efuse@200 {</div><div class='del'>-            compatible = "socionext,uniphier-efuse";</div><div class='del'>-            reg = &lt;0x200 0x68&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-            /* Data cells */</div><div class='del'>-            usb_rterm0: trim@54,4 {</div><div class='del'>-                reg = &lt;0x54 1&gt;;</div><div class='del'>-                bits = &lt;4 2&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_rterm1: trim@55,4 {</div><div class='del'>-                reg = &lt;0x55 1&gt;;</div><div class='del'>-                bits = &lt;4 2&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_rterm2: trim@58,4 {</div><div class='del'>-                reg = &lt;0x58 1&gt;;</div><div class='del'>-                bits = &lt;4 2&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_rterm3: trim@59,4 {</div><div class='del'>-                reg = &lt;0x59 1&gt;;</div><div class='del'>-                bits = &lt;4 2&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_sel_t0: trim@54,0 {</div><div class='del'>-                reg = &lt;0x54 1&gt;;</div><div class='del'>-                bits = &lt;0 4&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_sel_t1: trim@55,0 {</div><div class='del'>-                reg = &lt;0x55 1&gt;;</div><div class='del'>-                bits = &lt;0 4&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_sel_t2: trim@58,0 {</div><div class='del'>-                reg = &lt;0x58 1&gt;;</div><div class='del'>-                bits = &lt;0 4&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_sel_t3: trim@59,0 {</div><div class='del'>-                reg = &lt;0x59 1&gt;;</div><div class='del'>-                bits = &lt;0 4&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_hs_i0: trim@56,0 {</div><div class='del'>-                reg = &lt;0x56 1&gt;;</div><div class='del'>-                bits = &lt;0 4&gt;;</div><div class='del'>-            };</div><div class='del'>-            usb_hs_i2: trim@5a,0 {</div><div class='del'>-                reg = &lt;0x5a 1&gt;;</div><div class='del'>-                bits = &lt;0 4&gt;;</div><div class='del'>-            };</div><div class='add'>+        usb_rterm1: trim@55,4 {</div><div class='add'>+            reg = &lt;0x55 1&gt;;</div><div class='add'>+            bits = &lt;4 2&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_rterm2: trim@58,4 {</div><div class='add'>+            reg = &lt;0x58 1&gt;;</div><div class='add'>+            bits = &lt;4 2&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_rterm3: trim@59,4 {</div><div class='add'>+            reg = &lt;0x59 1&gt;;</div><div class='add'>+            bits = &lt;4 2&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_sel_t0: trim@54,0 {</div><div class='add'>+            reg = &lt;0x54 1&gt;;</div><div class='add'>+            bits = &lt;0 4&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_sel_t1: trim@55,0 {</div><div class='add'>+            reg = &lt;0x55 1&gt;;</div><div class='add'>+            bits = &lt;0 4&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_sel_t2: trim@58,0 {</div><div class='add'>+            reg = &lt;0x58 1&gt;;</div><div class='add'>+            bits = &lt;0 4&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_sel_t3: trim@59,0 {</div><div class='add'>+            reg = &lt;0x59 1&gt;;</div><div class='add'>+            bits = &lt;0 4&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_hs_i0: trim@56,0 {</div><div class='add'>+            reg = &lt;0x56 1&gt;;</div><div class='add'>+            bits = &lt;0 4&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb_hs_i2: trim@5a,0 {</div><div class='add'>+            reg = &lt;0x5a 1&gt;;</div><div class='add'>+            bits = &lt;0 4&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml b/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml<br/>index 448a2678dc62..a69de3e92282 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/nvmem/st,stm32-romem.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Factory-programmed data bindings</div><div class='add'>+title: STMicroelectronics STM32 Factory-programmed data</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This represents STM32 Factory-programmed read only non-volatile area: locked</div><div class='hunk'>@@ -16,12 +16,13 @@ maintainers:</div><div class='ctx'>   - Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - st,stm32f4-otp</div><div class='add'>+      - st,stm32mp13-bsec</div><div class='ctx'>       - st,stm32mp15-bsec</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml<br/>index a7644ebbc2ca..8877c2283e9e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/sunplus,sp7021-ocotp.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - Vincent Shih &lt;vincent.sunplus@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "nvmem.yaml#"</div><div class='add'>+  - $ref: nvmem.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml b/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml<br/>index e70b2a60cb9a..36d97fb87865 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/nvmem/u-boot,env.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/nvmem/u-boot,env.yaml</a></div><div class='hunk'>@@ -24,6 +24,8 @@ description: |</div><div class='ctx'>   Right now only flash partition case is covered but it may be extended to e.g.</div><div class='ctx'>   UBI volumes in the future.</div><div class='ctx'> </div><div class='add'>+  Variables can be defined as NVMEM device subnodes.</div><div class='add'>+</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -36,10 +38,24 @@ properties:</div><div class='ctx'>         const: u-boot,env-redundant-bool</div><div class='ctx'>       - description: Two redundant blocks with active having higher counter</div><div class='ctx'>         const: u-boot,env-redundant-count</div><div class='add'>+      - description: Broadcom's variant with custom header</div><div class='add'>+        const: brcm,env</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  bootcmd:</div><div class='add'>+    type: object</div><div class='add'>+    description: Command to use for automatic booting</div><div class='add'>+</div><div class='add'>+  ethaddr:</div><div class='add'>+    type: object</div><div class='add'>+    description: Ethernet interfaces base MAC address.</div><div class='add'>+    properties:</div><div class='add'>+      "#nvmem-cell-cells":</div><div class='add'>+        description: The first argument is a MAC address offset.</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -58,5 +74,28 @@ examples:</div><div class='ctx'>         env: partition@40000 {</div><div class='ctx'>             compatible = "u-boot,env";</div><div class='ctx'>             reg = &lt;0x40000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+            mac: ethaddr {</div><div class='add'>+                #nvmem-cell-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    partitions {</div><div class='add'>+        compatible = "fixed-partitions";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        partition@0 {</div><div class='add'>+            reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+            compatible = "brcm,u-boot";</div><div class='add'>+            label = "u-boot";</div><div class='add'>+</div><div class='add'>+            partition-u-boot-env {</div><div class='add'>+                compatible = "brcm,env";</div><div class='add'>+</div><div class='add'>+                ethaddr {</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml<br/>index 729ae97b63d9..51f62c3ae194 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/opp/allwinner,sun50i-h6-operating-points.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner H6 CPU OPP Device Tree Bindings</div><div class='add'>+title: Allwinner H6 CPU OPP</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -41,7 +41,7 @@ required:</div><div class='ctx'>   - nvmem-cells</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "opp-[0-9]+":</div><div class='add'>+  "^opp-[0-9]+$":</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='hunk'>@@ -49,7 +49,7 @@ patternProperties:</div><div class='ctx'>       clock-latency-ns: true</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      "opp-microvolt-.*": true</div><div class='add'>+      "^opp-microvolt-speed[0-9]$": true</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - opp-hz</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/opp-v1.yaml b/Documentation/devicetree/bindings/opp/opp-v1.yaml<br/>index d585d536a3fb..07e26c267815 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v1.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v1.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/opp/opp-v1.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/opp/opp-v1.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic OPP (Operating Performance Points) v1 Bindings</div><div class='add'>+title: Generic OPP (Operating Performance Points) v1</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Viresh Kumar &lt;viresh.kumar@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/opp-v2-base.yaml b/Documentation/devicetree/bindings/opp/opp-v2-base.yaml<br/>index 76c8acd981b3..47e6f36b7637 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2-base.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2-base.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2-base.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/opp/opp-v2-base.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic OPP (Operating Performance Points) Common Binding</div><div class='add'>+title: Generic OPP (Operating Performance Points) Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Viresh Kumar &lt;viresh.kumar@linaro.org&gt;</div><div class='hunk'>@@ -50,6 +50,16 @@ patternProperties:</div><div class='ctx'>           property to uniquely identify the OPP nodes exists. Devices like power</div><div class='ctx'>           domains must have another (implementation dependent) property.</div><div class='ctx'> </div><div class='add'>+          Entries for multiple clocks shall be provided in the same field, as</div><div class='add'>+          array of frequencies.  The OPP binding doesn't provide any provisions</div><div class='add'>+          to relate the values to their clocks or the order in which the clocks</div><div class='add'>+          need to be configured and that is left for the implementation</div><div class='add'>+          specific binding.</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 16</div><div class='add'>+        items:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'>       opp-microvolt:</div><div class='ctx'>         description: |</div><div class='ctx'>           Voltage for the OPP</div><div class='hunk'>@@ -98,7 +108,7 @@ patternProperties:</div><div class='ctx'>           The power for the OPP in micro-Watts.</div><div class='ctx'> </div><div class='ctx'>           Entries for multiple regulators shall be provided in the same field</div><div class='del'>-          separated by angular brackets &lt;&gt;. If current values aren't required</div><div class='add'>+          separated by angular brackets &lt;&gt;. If power values aren't required</div><div class='ctx'>           for a regulator, then it shall be filled with 0. If power values</div><div class='ctx'>           aren't required for any of the regulators, then this field is not</div><div class='ctx'>           required. The OPP binding doesn't provide any provisions to relate the</div><div class='hunk'>@@ -220,9 +230,9 @@ patternProperties:</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 8   # Should be enough regulators</div><div class='ctx'> </div><div class='del'>-      '^opp-microwatt':</div><div class='add'>+      '^opp-microwatt-':</div><div class='ctx'>         description:</div><div class='del'>-          Named opp-microwatt property. Similar to opp-microamp property,</div><div class='add'>+          Named opp-microwatt property. Similar to opp-microamp-&lt;name&gt; property,</div><div class='ctx'>           but for microwatt instead.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>         minItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml<br/>index 8c2e9ac5f68d..bbbad31ae4ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies, Inc. NVMEM OPP bindings</div><div class='add'>+title: Qualcomm Technologies, Inc. NVMEM OPP</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ilia Lin &lt;ilia.lin@kernel.org&gt;</div><div class='hunk'>@@ -17,10 +17,10 @@ description: |</div><div class='ctx'>   the CPU frequencies subset and voltage value of each OPP varies based on</div><div class='ctx'>   the silicon variant in use.</div><div class='ctx'>   Qualcomm Technologies, Inc. Process Voltage Scaling Tables</div><div class='del'>-  defines the voltage and frequency value based on the msm-id in SMEM</div><div class='del'>-  and speedbin blown in the efuse combination.</div><div class='del'>-  The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC</div><div class='del'>-  to provide the OPP framework with required information (existing HW bitmap).</div><div class='add'>+  defines the voltage and frequency value based on the speedbin blown in</div><div class='add'>+  the efuse combination.</div><div class='add'>+  The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide</div><div class='add'>+  the OPP framework with required information (existing HW bitmap).</div><div class='ctx'>   This is used to determine the voltage and frequency value for each OPP of</div><div class='ctx'>   operating-points-v2 table when it is parsed by the OPP framework.</div><div class='ctx'> </div><div class='hunk'>@@ -40,6 +40,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^opp-?[0-9]+$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       opp-hz: true</div><div class='hunk'>@@ -49,16 +50,22 @@ patternProperties:</div><div class='ctx'>       opp-supported-hw:</div><div class='ctx'>         description: |</div><div class='ctx'>           A single 32 bit bitmap value, representing compatible HW.</div><div class='del'>-          Bitmap:</div><div class='del'>-          0:  MSM8996 V3, speedbin 0</div><div class='del'>-          1:  MSM8996 V3, speedbin 1</div><div class='del'>-          2:  MSM8996 V3, speedbin 2</div><div class='del'>-          3:  unused</div><div class='del'>-          4:  MSM8996 SG, speedbin 0</div><div class='del'>-          5:  MSM8996 SG, speedbin 1</div><div class='del'>-          6:  MSM8996 SG, speedbin 2</div><div class='add'>+          Bitmap for MSM8996 format:</div><div class='add'>+          0:  MSM8996, speedbin 0</div><div class='add'>+          1:  MSM8996, speedbin 1</div><div class='add'>+          2:  MSM8996, speedbin 2</div><div class='add'>+          3:  MSM8996, speedbin 3</div><div class='add'>+          4-31:  unused</div><div class='add'>+</div><div class='add'>+          Bitmap for MSM8996SG format (speedbin shifted of 4 left):</div><div class='add'>+          0-3:  unused</div><div class='add'>+          4:  MSM8996SG, speedbin 0</div><div class='add'>+          5:  MSM8996SG, speedbin 1</div><div class='add'>+          6:  MSM8996SG, speedbin 2</div><div class='ctx'>           7-31:  unused</div><div class='del'>-        maximum: 0x77</div><div class='add'>+        enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,</div><div class='add'>+               0x9, 0xd, 0xe, 0xf,</div><div class='add'>+               0x10, 0x20, 0x30, 0x70]</div><div class='ctx'> </div><div class='ctx'>       clock-latency-ns: true</div><div class='ctx'> </div><div class='hunk'>@@ -102,11 +109,14 @@ examples:</div><div class='ctx'>                 capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'>                 clocks = &lt;&amp;kryocc 0&gt;;</div><div class='ctx'>                 operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+                power-domains = &lt;&amp;cpr&gt;;</div><div class='add'>+                power-domain-names = "cpr";</div><div class='ctx'>                 #cooling-cells = &lt;2&gt;;</div><div class='ctx'>                 next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='ctx'>                 L2_0: l2-cache {</div><div class='ctx'>                     compatible = "cache";</div><div class='ctx'>                     cache-level = &lt;2&gt;;</div><div class='add'>+                    cache-unified;</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='hunk'>@@ -119,6 +129,8 @@ examples:</div><div class='ctx'>                 capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'>                 clocks = &lt;&amp;kryocc 0&gt;;</div><div class='ctx'>                 operating-points-v2 = &lt;&amp;cluster0_opp&gt;;</div><div class='add'>+                power-domains = &lt;&amp;cpr&gt;;</div><div class='add'>+                power-domain-names = "cpr";</div><div class='ctx'>                 #cooling-cells = &lt;2&gt;;</div><div class='ctx'>                 next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='ctx'>             };</div><div class='hunk'>@@ -132,11 +144,14 @@ examples:</div><div class='ctx'>                 capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'>                 clocks = &lt;&amp;kryocc 1&gt;;</div><div class='ctx'>                 operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='add'>+                power-domains = &lt;&amp;cpr&gt;;</div><div class='add'>+                power-domain-names = "cpr";</div><div class='ctx'>                 #cooling-cells = &lt;2&gt;;</div><div class='ctx'>                 next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='ctx'>                 L2_1: l2-cache {</div><div class='ctx'>                     compatible = "cache";</div><div class='ctx'>                     cache-level = &lt;2&gt;;</div><div class='add'>+                    cache-unified;</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='hunk'>@@ -149,6 +164,8 @@ examples:</div><div class='ctx'>                 capacity-dmips-mhz = &lt;1024&gt;;</div><div class='ctx'>                 clocks = &lt;&amp;kryocc 1&gt;;</div><div class='ctx'>                 operating-points-v2 = &lt;&amp;cluster1_opp&gt;;</div><div class='add'>+                power-domains = &lt;&amp;cpr&gt;;</div><div class='add'>+                power-domain-names = "cpr";</div><div class='ctx'>                 #cooling-cells = &lt;2&gt;;</div><div class='ctx'>                 next-level-cache = &lt;&amp;L2_1&gt;;</div><div class='ctx'>             };</div><div class='hunk'>@@ -184,20 +201,23 @@ examples:</div><div class='ctx'>             opp-307200000 {</div><div class='ctx'>                 opp-hz = /bits/ 64 &lt;307200000&gt;;</div><div class='ctx'>                 opp-microvolt = &lt;905000 905000 1140000&gt;;</div><div class='del'>-                opp-supported-hw = &lt;0x77&gt;;</div><div class='add'>+                opp-supported-hw = &lt;0x7&gt;;</div><div class='ctx'>                 clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;cpr_opp1&gt;;</div><div class='ctx'>             };</div><div class='del'>-            opp-1593600000 {</div><div class='del'>-                opp-hz = /bits/ 64 &lt;1593600000&gt;;</div><div class='add'>+            opp-1401600000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;1401600000&gt;;</div><div class='ctx'>                 opp-microvolt = &lt;1140000 905000 1140000&gt;;</div><div class='del'>-                opp-supported-hw = &lt;0x71&gt;;</div><div class='add'>+                opp-supported-hw = &lt;0x5&gt;;</div><div class='ctx'>                 clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;cpr_opp2&gt;;</div><div class='ctx'>             };</div><div class='del'>-            opp-2188800000 {</div><div class='del'>-                opp-hz = /bits/ 64 &lt;2188800000&gt;;</div><div class='add'>+            opp-1593600000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;1593600000&gt;;</div><div class='ctx'>                 opp-microvolt = &lt;1140000 905000 1140000&gt;;</div><div class='del'>-                opp-supported-hw = &lt;0x10&gt;;</div><div class='add'>+                opp-supported-hw = &lt;0x1&gt;;</div><div class='ctx'>                 clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;cpr_opp3&gt;;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='hunk'>@@ -209,26 +229,30 @@ examples:</div><div class='ctx'>             opp-307200000 {</div><div class='ctx'>                 opp-hz = /bits/ 64 &lt;307200000&gt;;</div><div class='ctx'>                 opp-microvolt = &lt;905000 905000 1140000&gt;;</div><div class='del'>-                opp-supported-hw = &lt;0x77&gt;;</div><div class='add'>+                opp-supported-hw = &lt;0x7&gt;;</div><div class='ctx'>                 clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;cpr_opp1&gt;;</div><div class='ctx'>             };</div><div class='del'>-            opp-1593600000 {</div><div class='del'>-                opp-hz = /bits/ 64 &lt;1593600000&gt;;</div><div class='add'>+            opp-1804800000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;1804800000&gt;;</div><div class='ctx'>                 opp-microvolt = &lt;1140000 905000 1140000&gt;;</div><div class='del'>-                opp-supported-hw = &lt;0x70&gt;;</div><div class='add'>+                opp-supported-hw = &lt;0x6&gt;;</div><div class='ctx'>                 clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;cpr_opp4&gt;;</div><div class='ctx'>             };</div><div class='del'>-            opp-2150400000 {</div><div class='del'>-                opp-hz = /bits/ 64 &lt;2150400000&gt;;</div><div class='add'>+            opp-1900800000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;1900800000&gt;;</div><div class='ctx'>                 opp-microvolt = &lt;1140000 905000 1140000&gt;;</div><div class='del'>-                opp-supported-hw = &lt;0x31&gt;;</div><div class='add'>+                opp-supported-hw = &lt;0x4&gt;;</div><div class='ctx'>                 clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;cpr_opp5&gt;;</div><div class='ctx'>             };</div><div class='del'>-            opp-2342400000 {</div><div class='del'>-                opp-hz = /bits/ 64 &lt;2342400000&gt;;</div><div class='add'>+            opp-2150400000 {</div><div class='add'>+                opp-hz = /bits/ 64 &lt;2150400000&gt;;</div><div class='ctx'>                 opp-microvolt = &lt;1140000 905000 1140000&gt;;</div><div class='del'>-                opp-supported-hw = &lt;0x10&gt;;</div><div class='add'>+                opp-supported-hw = &lt;0x1&gt;;</div><div class='ctx'>                 clock-latency-ns = &lt;200000&gt;;</div><div class='add'>+                required-opps = &lt;&amp;cpr_opp6&gt;;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml<br/>index 14a7a689ad6d..a30ef93213c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/opp/opp-v2-qcom-level.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/opp/opp-v2-qcom-level.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm OPP bindings to describe OPP nodes.</div><div class='add'>+title: Qualcomm OPP</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Niklas Cassel &lt;nks@flawful.org&gt;</div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^opp-?[0-9]+$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       opp-level: true</div><div class='hunk'>@@ -29,7 +30,9 @@ patternProperties:</div><div class='ctx'>           this OPP node. Sometimes several corners/levels shares a certain fuse</div><div class='ctx'>           corner/level. A fuse corner/level contains e.g. ref uV, min uV,</div><div class='ctx'>           and max uV.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 2</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - opp-level</div><div class='head'>diff --git a/Documentation/devicetree/bindings/opp/opp-v2.yaml b/Documentation/devicetree/bindings/opp/opp-v2.yaml<br/>index eaf8fba2c691..6972d76233aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/opp/opp-v2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/opp/opp-v2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/opp/opp-v2.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/opp/opp-v2.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic OPP (Operating Performance Points) Bindings</div><div class='add'>+title: Generic OPP (Operating Performance Points)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Viresh Kumar &lt;viresh.kumar@linaro.org&gt;</div><div class='hunk'>@@ -155,7 +155,7 @@ examples:</div><div class='ctx'>             opp-hz = /bits/ 64 &lt;1200000000&gt;;</div><div class='ctx'>             opp-microvolt = &lt;1025000&gt;;</div><div class='ctx'>             opp-microamp = &lt;90000&gt;;</div><div class='del'>-            lock-latency-ns = &lt;290000&gt;;</div><div class='add'>+            clock-latency-ns = &lt;290000&gt;;</div><div class='ctx'>             turbo-mode;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml b/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml<br/>new file mode 100644<br/>index 000000000000..a5bd90bc0712<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/amlogic,axg-pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/amlogic,axg-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson AXG DWC PCIe SoC controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#</div><div class='add'>+</div><div class='add'>+# We need a select here so we don't match all nodes with 'snps,dw-pcie'</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      enum:</div><div class='add'>+        - amlogic,axg-pcie</div><div class='add'>+        - amlogic,g12a-pcie</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - amlogic,axg-pcie</div><div class='add'>+          - amlogic,g12a-pcie</div><div class='add'>+      - const: snps,dw-pcie</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: External local bus interface registers</div><div class='add'>+      - description: Meson designed configuration registers</div><div class='add'>+      - description: PCIe configuration space</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: elbi</div><div class='add'>+      - const: cfg</div><div class='add'>+      - const: config</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: PCIe GEN 100M PLL clock</div><div class='add'>+      - description: PCIe RC clock gate</div><div class='add'>+      - description: PCIe PHY clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: port</div><div class='add'>+      - const: general</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: pcie</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: Port Reset</div><div class='add'>+      - description: Shared APB reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: port</div><div class='add'>+      - const: apb</div><div class='add'>+</div><div class='add'>+  num-lanes:</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - interrupt-map-mask</div><div class='add'>+  - ranges</div><div class='add'>+  - bus-range</div><div class='add'>+  - device_type</div><div class='add'>+  - num-lanes</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pcie: pcie@f9800000 {</div><div class='add'>+        compatible = "amlogic,axg-pcie", "snps,dw-pcie";</div><div class='add'>+        reg = &lt;0xf9800000 0x400000&gt;, &lt;0xff646000 0x2000&gt;, &lt;0xf9f00000 0x100000&gt;;</div><div class='add'>+        reg-names = "elbi", "cfg", "config";</div><div class='add'>+        interrupts = &lt;GIC_SPI 177 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        clocks = &lt;&amp;pclk&gt;, &lt;&amp;clk_port&gt;, &lt;&amp;clk_phy&gt;;</div><div class='add'>+        clock-names = "pclk", "port", "general";</div><div class='add'>+        resets = &lt;&amp;reset_pcie_port&gt;, &lt;&amp;reset_pcie_apb&gt;;</div><div class='add'>+        reset-names = "port", "apb";</div><div class='add'>+        phys = &lt;&amp;pcie_phy&gt;;</div><div class='add'>+        phy-names = "pcie";</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='add'>+        interrupt-map = &lt;0 0 0 0 &amp;gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        device_type = "pci";</div><div class='add'>+        num-lanes = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x82000000 0 0 0xf9c00000 0 0x00300000&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt b/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt<br/>deleted file mode 100644<br/>index c3a75ac6e59d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/amlogic,meson-pcie.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,70 +0,0 @@</div><div class='del'>-Amlogic Meson AXG DWC PCIE SoC controller</div><div class='del'>-</div><div class='del'>-Amlogic Meson PCIe host controller is based on the Synopsys DesignWare PCI core.</div><div class='del'>-It shares common functions with the PCIe DesignWare core driver and</div><div class='del'>-inherits common properties defined in</div><div class='del'>-Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.</div><div class='del'>-</div><div class='del'>-Additional properties are described here:</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:</div><div class='del'>-	should contain :</div><div class='del'>-	- "amlogic,axg-pcie" for AXG SoC Family</div><div class='del'>-	- "amlogic,g12a-pcie" for G12A SoC Family</div><div class='del'>-	to identify the core.</div><div class='del'>-- reg:</div><div class='del'>-	should contain the configuration address space.</div><div class='del'>-- reg-names: Must be</div><div class='del'>-	- "elbi"	External local bus interface registers</div><div class='del'>-	- "cfg"		Meson specific registers</div><div class='del'>-	- "config"	PCIe configuration space</div><div class='del'>-- reset-gpios: The GPIO to generate PCIe PERST# assert and deassert signal.</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-- clock-names: Must include the following entries:</div><div class='del'>-	- "pclk"       PCIe GEN 100M PLL clock</div><div class='del'>-	- "port"       PCIe_x(A or B) RC clock gate</div><div class='del'>-	- "general"    PCIe Phy clock</div><div class='del'>-- resets: phandle to the reset lines.</div><div class='del'>-- reset-names: must contain "port" and "apb"</div><div class='del'>-       - "port"        Port A or B reset</div><div class='del'>-       - "apb"         Share APB reset</div><div class='del'>-- phys: should contain a phandle to the PCIE phy</div><div class='del'>-- phy-names: must contain "pcie"</div><div class='del'>-</div><div class='del'>-- device_type:</div><div class='del'>-	should be "pci". As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example configuration:</div><div class='del'>-</div><div class='del'>-	pcie: pcie@f9800000 {</div><div class='del'>-			compatible = "amlogic,axg-pcie", "snps,dw-pcie";</div><div class='del'>-			reg = &lt;0x0 0xf9800000 0x0 0x400000</div><div class='del'>-					0x0 0xff646000 0x0 0x2000</div><div class='del'>-					0x0 0xf9f00000 0x0 0x100000&gt;;</div><div class='del'>-			reg-names = "elbi", "cfg", "config";</div><div class='del'>-			reset-gpios = &lt;&amp;gpio GPIOX_19 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-			interrupts = &lt;GIC_SPI 177 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='del'>-			interrupt-map = &lt;0 0 0 0 &amp;gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-			bus-range = &lt;0x0 0xff&gt;;</div><div class='del'>-			#address-cells = &lt;3&gt;;</div><div class='del'>-			#size-cells = &lt;2&gt;;</div><div class='del'>-			device_type = "pci";</div><div class='del'>-			ranges = &lt;0x82000000 0 0 0x0 0xf9c00000 0 0x00300000&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;clkc CLKID_USB</div><div class='del'>-					&amp;clkc CLKID_PCIE_A</div><div class='del'>-					&amp;clkc CLKID_PCIE_CML_EN0&gt;;</div><div class='del'>-			clock-names = "general",</div><div class='del'>-					"pclk",</div><div class='del'>-					"port";</div><div class='del'>-			resets = &lt;&amp;reset RESET_PCIE_A&gt;,</div><div class='del'>-				&lt;&amp;reset RESET_PCIE_APB&gt;;</div><div class='del'>-			reset-names = "port",</div><div class='del'>-					"apb";</div><div class='del'>-			phys = &lt;&amp;pcie_phy&gt;;</div><div class='del'>-			phy-names = "pcie";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml<br/>index 7f01e15fc81c..215ff9a9c835 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/apple,pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/apple,pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/apple,pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/apple,pcie.yaml</a></div><div class='hunk'>@@ -33,6 +33,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,t8103-pcie</div><div class='add'>+          - apple,t8112-pcie</div><div class='ctx'>           - apple,t6000-pcie</div><div class='ctx'>       - const: apple,pcie</div><div class='ctx'> </div><div class='hunk'>@@ -68,6 +69,9 @@ properties:</div><div class='ctx'>   iommu-map: true</div><div class='ctx'>   iommu-map-mask: true</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -134,7 +138,7 @@ examples:</div><div class='ctx'>         ranges = &lt;0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000&gt;,</div><div class='ctx'>                  &lt;0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000&gt;;</div><div class='ctx'> </div><div class='del'>-        power-domains = &lt;&amp;ps_apcie&gt;, &lt;&amp;ps_apcie_gp&gt;, &lt;&amp;ps_pcie_ref&gt;;</div><div class='add'>+        power-domains = &lt;&amp;ps_apcie_gp&gt;;</div><div class='ctx'>         pinctrl-0 = &lt;&amp;pcie_pins&gt;;</div><div class='ctx'>         pinctrl-names = "default";</div><div class='ctx'> </div><div class='hunk'>@@ -142,7 +146,6 @@ examples:</div><div class='ctx'>           device_type = "pci";</div><div class='ctx'>           reg = &lt;0x0 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'>           reset-gpios = &lt;&amp;pinctrl_ap 152 0&gt;;</div><div class='del'>-          max-link-speed = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>           #address-cells = &lt;3&gt;;</div><div class='ctx'>           #size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -153,7 +156,6 @@ examples:</div><div class='ctx'>           device_type = "pci";</div><div class='ctx'>           reg = &lt;0x800 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'>           reset-gpios = &lt;&amp;pinctrl_ap 153 0&gt;;</div><div class='del'>-          max-link-speed = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>           #address-cells = &lt;3&gt;;</div><div class='ctx'>           #size-cells = &lt;2&gt;;</div><div class='hunk'>@@ -164,7 +166,6 @@ examples:</div><div class='ctx'>           device_type = "pci";</div><div class='ctx'>           reg = &lt;0x1000 0x0 0x0 0x0 0x0&gt;;</div><div class='ctx'>           reset-gpios = &lt;&amp;pinctrl_ap 33 0&gt;;</div><div class='del'>-          max-link-speed = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'>           #address-cells = &lt;3&gt;;</div><div class='ctx'>           #size-cells = &lt;2&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml b/Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml<br/>new file mode 100644<br/>index 000000000000..8eaa07ae9774<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/baikal,bt1-pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Baikal-T1 PCIe Root Port Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Serge Semin &lt;fancer.lancer@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Embedded into Baikal-T1 SoC Root Complex controller with a single port</div><div class='add'>+  activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured</div><div class='add'>+  to have just a single Root Port function and is capable of establishing the</div><div class='add'>+  link up to Gen.3 speed on x4 lanes. It doesn't have embedded clock and reset</div><div class='add'>+  control module, so the proper interface initialization is supposed to be</div><div class='add'>+  performed by software. There four in- and four outbound iATU regions</div><div class='add'>+  which can be used to emit all required TLP types on the PCIe bus.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: baikal,bt1-pcie</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      DBI, DBI2 and at least 4KB outbound iATU-capable region for the</div><div class='add'>+      peripheral devices CFG-space access.</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dbi</div><div class='add'>+      - const: dbi2</div><div class='add'>+      - const: config</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      MSI, AER, PME, Hot-plug, Link Bandwidth Management, Link Equalization</div><div class='add'>+      request and eight Read/Write eDMA IRQ lines are available.</div><div class='add'>+    maxItems: 14</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma0</div><div class='add'>+      - const: dma1</div><div class='add'>+      - const: dma2</div><div class='add'>+      - const: dma3</div><div class='add'>+      - const: dma4</div><div class='add'>+      - const: dma5</div><div class='add'>+      - const: dma6</div><div class='add'>+      - const: dma7</div><div class='add'>+      - const: msi</div><div class='add'>+      - const: aer</div><div class='add'>+      - const: pme</div><div class='add'>+      - const: hp</div><div class='add'>+      - const: bw_mg</div><div class='add'>+      - const: l_eq</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      DBI (attached to the APB bus), AXI-bus master and slave interfaces</div><div class='add'>+      are fed up by the dedicated application clocks. A common reference</div><div class='add'>+      clock signal is supposed to be attached to the corresponding Ref-pad</div><div class='add'>+      of the SoC. It will be redistributed amongst the controller core</div><div class='add'>+      sub-modules (pipe, core, aux, etc).</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dbi</div><div class='add'>+      - const: mstr</div><div class='add'>+      - const: slv</div><div class='add'>+      - const: ref</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    description:</div><div class='add'>+      A comprehensive controller reset logic is supposed to be implemented</div><div class='add'>+      by software, so almost all the possible application and core reset</div><div class='add'>+      signals are exposed via the system CCU module.</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mstr</div><div class='add'>+      - const: slv</div><div class='add'>+      - const: pwr</div><div class='add'>+      - const: hot</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: core</div><div class='add'>+      - const: pipe</div><div class='add'>+      - const: sticky</div><div class='add'>+      - const: non-sticky</div><div class='add'>+</div><div class='add'>+  baikal,bt1-syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the Baikal-T1 System Controller DT node. It's required to</div><div class='add'>+      access some additional PM, Reset-related and LTSSM signals.</div><div class='add'>+</div><div class='add'>+  num-lanes:</div><div class='add'>+    maximum: 4</div><div class='add'>+</div><div class='add'>+  max-link-speed:</div><div class='add'>+    maximum: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/mips-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    pcie@1f052000 {</div><div class='add'>+      compatible = "baikal,bt1-pcie";</div><div class='add'>+      device_type = "pci";</div><div class='add'>+      reg = &lt;0x1f052000 0x1000&gt;, &lt;0x1f053000 0x1000&gt;, &lt;0x1bdbf000 0x1000&gt;;</div><div class='add'>+      reg-names = "dbi", "dbi2", "config";</div><div class='add'>+      #address-cells = &lt;3&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      ranges = &lt;0x81000000 0 0x00000000 0x1bdb0000 0 0x00008000&gt;,</div><div class='add'>+               &lt;0x82000000 0 0x20000000 0x08000000 0 0x13db0000&gt;;</div><div class='add'>+      bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;GIC_SHARED 80 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 81 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 82 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 83 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 84 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 87 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 91 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 92 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;GIC_SHARED 93 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "dma0", "dma1", "dma2", "dma3",</div><div class='add'>+                        "dma4", "dma5", "dma6", "dma7",</div><div class='add'>+                        "msi", "aer", "pme", "hp", "bw_mg",</div><div class='add'>+                        "l_eq";</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;ccu_sys 1&gt;, &lt;&amp;ccu_axi 6&gt;, &lt;&amp;ccu_axi 7&gt;, &lt;&amp;clk_pcie&gt;;</div><div class='add'>+      clock-names = "dbi", "mstr", "slv", "ref";</div><div class='add'>+</div><div class='add'>+      resets = &lt;&amp;ccu_axi 6&gt;, &lt;&amp;ccu_axi 7&gt;, &lt;&amp;ccu_sys 7&gt;, &lt;&amp;ccu_sys 10&gt;,</div><div class='add'>+               &lt;&amp;ccu_sys 4&gt;, &lt;&amp;ccu_sys 6&gt;, &lt;&amp;ccu_sys 5&gt;, &lt;&amp;ccu_sys 8&gt;,</div><div class='add'>+               &lt;&amp;ccu_sys 9&gt;;</div><div class='add'>+      reset-names = "mstr", "slv", "pwr", "hot", "phy", "core", "pipe",</div><div class='add'>+                    "sticky", "non-sticky";</div><div class='add'>+</div><div class='add'>+      reset-gpios = &lt;&amp;port0 0 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+      num-lanes = &lt;4&gt;;</div><div class='add'>+      max-link-speed = &lt;3&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml<br/>index 0f064e4222f3..7e15aae7d69e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Brcmstb PCIe Host Controller Device Tree Bindings</div><div class='add'>+title: Brcmstb PCIe Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nicolas Saenz Julienne &lt;nsaenzjulienne@suse.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml<br/>index e6ef1012a580..98651ab22103 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Tom Joseph &lt;tjoseph@cadence.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "cdns-pcie-ep.yaml#"</div><div class='add'>+  - $ref: cdns-pcie-ep.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml<br/>index 293b8ec318bc..bc3c48f60fff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/pci/pci-bus.yaml#</div><div class='del'>-  - $ref: "cdns-pcie-host.yaml#"</div><div class='add'>+  - $ref: cdns-pcie-host.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml<br/>index baeafda36ebe..47a302ba4ac9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Cadence PCIe Device</div><div class='ctx'> </div><div class='hunk'>@@ -10,8 +10,8 @@ maintainers:</div><div class='ctx'>   - Tom Joseph &lt;tjoseph@cadence.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "cdns-pcie.yaml#"</div><div class='del'>-  - $ref: "pci-ep.yaml#"</div><div class='add'>+  - $ref: cdns-pcie.yaml#</div><div class='add'>+  - $ref: pci-ep.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   cdns,max-outbound-regions:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml<br/>index a944f9bfffff..a6b494401ebb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/pci/cdns-pcie-host.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/pci/cdns-pcie-host.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Cadence PCIe Host</div><div class='ctx'> </div><div class='hunk'>@@ -10,8 +10,8 @@ maintainers:</div><div class='ctx'>   - Tom Joseph &lt;tjoseph@cadence.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/pci/pci-bus.yaml#"</div><div class='del'>-  - $ref: "cdns-pcie.yaml#"</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+  - $ref: cdns-pcie.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   cdns,max-outbound-regions:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml<br/>index df4fe28222b0..2e14f422e829 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/cdns-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/cdns-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/cdns-pcie.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/pci/cdns-pcie.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/pci/cdns-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Cadence PCIe Core</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml<br/>new file mode 100644<br/>index 000000000000..d91b639ae7ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,270 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX6 PCIe RC/EP controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lucas Stach &lt;l.stach@pengutronix.de&gt;</div><div class='add'>+  - Richard Zhu &lt;hongxing.zhu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Generic Freescale i.MX PCIe Root Port and Endpoint controller</div><div class='add'>+  properties.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  num-lanes:</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  fsl,imx7d-pcie-phy:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: A phandle to an fsl,imx7d-pcie-phy node. Additional</div><div class='add'>+      required properties for imx7d-pcie, imx7d-pcie-ep, imx8mq-pcie,</div><div class='add'>+      and imx8mq-pcie-ep.</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: The phandle pointing to the DISPLAY domain for</div><div class='add'>+          imx6sx-pcie, imx6sx-pcie-ep, to PCIE_PHY power domain for</div><div class='add'>+          imx7d-pcie, imx7d-pcie-ep, imx8mq-pcie and imx8mq-pcie-ep.</div><div class='add'>+      - description: The phandle pointing to the PCIE_PHY power domains</div><div class='add'>+          for imx6sx-pcie and imx6sx-pcie-ep.</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: pcie</div><div class='add'>+      - const: pcie_phy</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+    description: Phandles to PCIe-related reset lines exposed by SRC</div><div class='add'>+      IP block. Additional required by imx7d-pcie, imx7d-pcie-ep,</div><div class='add'>+      imx8mq-pcie, and imx8mq-pcie-ep.</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  fsl,tx-deemph-gen1:</div><div class='add'>+    description: Gen1 De-emphasis value (optional required).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  fsl,tx-deemph-gen2-3p5db:</div><div class='add'>+    description: Gen2 (3.5db) De-emphasis value (optional required).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  fsl,tx-deemph-gen2-6db:</div><div class='add'>+    description: Gen2 (6db) De-emphasis value (optional required).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 20</div><div class='add'>+</div><div class='add'>+  fsl,tx-swing-full:</div><div class='add'>+    description: Gen2 TX SWING FULL value (optional required).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 127</div><div class='add'>+</div><div class='add'>+  fsl,tx-swing-low:</div><div class='add'>+    description: TX launch amplitude swing_low value (optional required).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 127</div><div class='add'>+</div><div class='add'>+  fsl,max-link-speed:</div><div class='add'>+    description: Specify PCI Gen for link capability (optional required).</div><div class='add'>+      Note that the IMX6 LVDS clock outputs do not meet gen2 jitter</div><div class='add'>+      requirements and thus for gen2 capability a gen2 compliant clock</div><div class='add'>+      generator should be used and configured.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [1, 2, 3, 4]</div><div class='add'>+    default: 1</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: pcie-phy</div><div class='add'>+</div><div class='add'>+  vpcie-supply:</div><div class='add'>+    description: Should specify the regulator in charge of PCIe port power.</div><div class='add'>+      The regulator will be enabled when initializing the PCIe host and</div><div class='add'>+      disabled either as part of the init process or when shutting down</div><div class='add'>+      the host (optional required).</div><div class='add'>+</div><div class='add'>+  vph-supply:</div><div class='add'>+    description: Should specify the regulator in charge of VPH one of</div><div class='add'>+      the three PCIe PHY powers. This regulator can be supplied by both</div><div class='add'>+      1.8v and 3.3v voltage supplies (optional required).</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - num-lanes</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx6sx-pcie</div><div class='add'>+              - fsl,imx6sx-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - {}</div><div class='add'>+            - {}</div><div class='add'>+            - const: pcie_phy</div><div class='add'>+            - const: pcie_inbound_axi</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 2</div><div class='add'>+        power-domain-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx8mq-pcie</div><div class='add'>+              - fsl,imx8mq-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - {}</div><div class='add'>+            - {}</div><div class='add'>+            - const: pcie_phy</div><div class='add'>+            - const: pcie_aux</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          not:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - fsl,imx6sx-pcie</div><div class='add'>+                - fsl,imx8mq-pcie</div><div class='add'>+                - fsl,imx6sx-pcie-ep</div><div class='add'>+                - fsl,imx8mq-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx6q-pcie</div><div class='add'>+              - fsl,imx6qp-pcie</div><div class='add'>+              - fsl,imx7d-pcie</div><div class='add'>+              - fsl,imx6q-pcie-ep</div><div class='add'>+              - fsl,imx6qp-pcie-ep</div><div class='add'>+              - fsl,imx7d-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 3</div><div class='add'>+          contains:</div><div class='add'>+            const: pcie_phy</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx8mm-pcie</div><div class='add'>+              - fsl,imx8mp-pcie</div><div class='add'>+              - fsl,imx8mm-pcie-ep</div><div class='add'>+              - fsl,imx8mp-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 3</div><div class='add'>+          contains:</div><div class='add'>+            const: pcie_aux</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx6q-pcie</div><div class='add'>+              - fsl,imx6qp-pcie</div><div class='add'>+              - fsl,imx6q-pcie-ep</div><div class='add'>+              - fsl,imx6qp-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains: false</div><div class='add'>+        power-domain-names: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - fsl,imx6sx-pcie</div><div class='add'>+                - fsl,imx6q-pcie</div><div class='add'>+                - fsl,imx6qp-pcie</div><div class='add'>+                - fsl,imx6sx-pcie-ep</div><div class='add'>+                - fsl,imx6q-pcie-ep</div><div class='add'>+                - fsl,imx6qp-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        power-domain-names: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - fsl,imx6q-pcie</div><div class='add'>+              - fsl,imx6sx-pcie</div><div class='add'>+              - fsl,imx6qp-pcie</div><div class='add'>+              - fsl,imx7d-pcie</div><div class='add'>+              - fsl,imx8mq-pcie</div><div class='add'>+              - fsl,imx6q-pcie-ep</div><div class='add'>+              - fsl,imx6sx-pcie-ep</div><div class='add'>+              - fsl,imx6qp-pcie-ep</div><div class='add'>+              - fsl,imx7d-pcie-ep</div><div class='add'>+              - fsl,imx8mq-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 3</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pciephy</div><div class='add'>+            - const: apps</div><div class='add'>+            - const: turnoff</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: apps</div><div class='add'>+            - const: turnoff</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml<br/>new file mode 100644<br/>index 000000000000..ee155ed5f181<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX6 PCIe Endpoint controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lucas Stach &lt;l.stach@pengutronix.de&gt;</div><div class='add'>+  - Richard Zhu &lt;hongxing.zhu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  This PCIe controller is based on the Synopsys DesignWare PCIe IP and</div><div class='add'>+  thus inherits all the common properties defined in snps,dw-pcie-ep.yaml.</div><div class='add'>+  The controller instances are dual mode where in they can work either in</div><div class='add'>+  Root Port mode or Endpoint mode but one at a time.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8mm-pcie-ep</div><div class='add'>+      - fsl,imx8mq-pcie-ep</div><div class='add'>+      - fsl,imx8mp-pcie-ep</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dbi</div><div class='add'>+      - const: addr_space</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    items:</div><div class='add'>+      - description: PCIe bridge clock.</div><div class='add'>+      - description: PCIe bus clock.</div><div class='add'>+      - description: PCIe PHY clock.</div><div class='add'>+      - description: Additional required clock entry for imx6sx-pcie,</div><div class='add'>+           imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: builtin eDMA interrupter.</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#</div><div class='add'>+  - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - fsl,imx8mq-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pcie</div><div class='add'>+            - const: pcie_bus</div><div class='add'>+            - const: pcie_phy</div><div class='add'>+            - const: pcie_aux</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pcie</div><div class='add'>+            - const: pcie_bus</div><div class='add'>+            - const: pcie_aux</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/imx8mp-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/imx8mp-reset.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pcie_ep: pcie-ep@33800000 {</div><div class='add'>+      compatible = "fsl,imx8mp-pcie-ep";</div><div class='add'>+      reg = &lt;0x33800000 0x000400000&gt;, &lt;0x18000000 0x08000000&gt;;</div><div class='add'>+      reg-names = "dbi", "addr_space";</div><div class='add'>+      clocks = &lt;&amp;clk IMX8MP_CLK_HSIO_ROOT&gt;,</div><div class='add'>+               &lt;&amp;clk IMX8MP_CLK_HSIO_AXI&gt;,</div><div class='add'>+               &lt;&amp;clk IMX8MP_CLK_PCIE_ROOT&gt;;</div><div class='add'>+      clock-names = "pcie", "pcie_bus", "pcie_aux";</div><div class='add'>+      assigned-clocks = &lt;&amp;clk IMX8MP_CLK_PCIE_AUX&gt;;</div><div class='add'>+      assigned-clock-rates = &lt;10000000&gt;;</div><div class='add'>+      assigned-clock-parents = &lt;&amp;clk IMX8MP_SYS_PLL2_50M&gt;;</div><div class='add'>+      num-lanes = &lt;1&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH&gt;; /* eDMA */</div><div class='add'>+      interrupt-names = "dma";</div><div class='add'>+      fsl,max-link-speed = &lt;3&gt;;</div><div class='add'>+      power-domains = &lt;&amp;hsio_blk_ctrl IMX8MP_HSIOBLK_PD_PCIE&gt;;</div><div class='add'>+      resets = &lt;&amp;src IMX8MP_RESET_PCIE_CTRL_APPS_EN&gt;,</div><div class='add'>+               &lt;&amp;src IMX8MP_RESET_PCIE_CTRL_APPS_TURNOFF&gt;;</div><div class='add'>+      reset-names = "apps", "turnoff";</div><div class='add'>+      phys = &lt;&amp;pcie_phy&gt;;</div><div class='add'>+      phy-names = "pcie-phy";</div><div class='add'>+      num-ib-windows = &lt;4&gt;;</div><div class='add'>+      num-ob-windows = &lt;4&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml<br/>index 252e5b72aee0..81bbb8728f0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml</a></div><div class='hunk'>@@ -13,9 +13,11 @@ maintainers:</div><div class='ctx'> description: |+</div><div class='ctx'>   This PCIe host controller is based on the Synopsys DesignWare PCIe IP</div><div class='ctx'>   and thus inherits all the common properties defined in snps,dw-pcie.yaml.</div><div class='add'>+  The controller instances are dual mode where in they can work either in</div><div class='add'>+  Root Port mode or Endpoint mode but one at a time.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/pci/snps,dw-pcie.yaml#</div><div class='add'>+  See fsl,imx6q-pcie-ep.yaml for details on the Endpoint mode device tree</div><div class='add'>+  bindings.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -38,14 +40,6 @@ properties:</div><div class='ctx'>       - const: dbi</div><div class='ctx'>       - const: config</div><div class='ctx'> </div><div class='del'>-  interrupts:</div><div class='del'>-    items:</div><div class='del'>-      - description: builtin MSI controller.</div><div class='del'>-</div><div class='del'>-  interrupt-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: msi</div><div class='del'>-</div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 3</div><div class='ctx'>     items:</div><div class='hunk'>@@ -53,87 +47,19 @@ properties:</div><div class='ctx'>       - description: PCIe bus clock.</div><div class='ctx'>       - description: PCIe PHY clock.</div><div class='ctx'>       - description: Additional required clock entry for imx6sx-pcie,</div><div class='del'>-          imx8mq-pcie.</div><div class='add'>+           imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 3</div><div class='del'>-    items:</div><div class='del'>-      - const: pcie</div><div class='del'>-      - const: pcie_bus</div><div class='del'>-      - const: pcie_phy</div><div class='del'>-      - const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie</div><div class='del'>-</div><div class='del'>-  num-lanes:</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='del'>-  fsl,imx7d-pcie-phy:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    description: A phandle to an fsl,imx7d-pcie-phy node. Additional</div><div class='del'>-      required properties for imx7d-pcie and imx8mq-pcie.</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='del'>-  power-domains:</div><div class='del'>-    items:</div><div class='del'>-      - description: The phandle pointing to the DISPLAY domain for</div><div class='del'>-          imx6sx-pcie, to PCIE_PHY power domain for imx7d-pcie and</div><div class='del'>-          imx8mq-pcie.</div><div class='del'>-      - description: The phandle pointing to the PCIE_PHY power domains</div><div class='del'>-          for imx6sx-pcie.</div><div class='del'>-</div><div class='del'>-  power-domain-names:</div><div class='add'>+  interrupts:</div><div class='ctx'>     items:</div><div class='del'>-      - const: pcie</div><div class='del'>-      - const: pcie_phy</div><div class='del'>-</div><div class='del'>-  resets:</div><div class='del'>-    maxItems: 3</div><div class='del'>-    description: Phandles to PCIe-related reset lines exposed by SRC</div><div class='del'>-      IP block. Additional required by imx7d-pcie and imx8mq-pcie.</div><div class='add'>+      - description: builtin MSI controller.</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='add'>+  interrupt-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: pciephy</div><div class='del'>-      - const: apps</div><div class='del'>-      - const: turnoff</div><div class='del'>-</div><div class='del'>-  fsl,tx-deemph-gen1:</div><div class='del'>-    description: Gen1 De-emphasis value (optional required).</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    default: 0</div><div class='del'>-</div><div class='del'>-  fsl,tx-deemph-gen2-3p5db:</div><div class='del'>-    description: Gen2 (3.5db) De-emphasis value (optional required).</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    default: 0</div><div class='del'>-</div><div class='del'>-  fsl,tx-deemph-gen2-6db:</div><div class='del'>-    description: Gen2 (6db) De-emphasis value (optional required).</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    default: 20</div><div class='del'>-</div><div class='del'>-  fsl,tx-swing-full:</div><div class='del'>-    description: Gen2 TX SWING FULL value (optional required).</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    default: 127</div><div class='del'>-</div><div class='del'>-  fsl,tx-swing-low:</div><div class='del'>-    description: TX launch amplitude swing_low value (optional required).</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    default: 127</div><div class='del'>-</div><div class='del'>-  fsl,max-link-speed:</div><div class='del'>-    description: Specify PCI Gen for link capability (optional required).</div><div class='del'>-      Note that the IMX6 LVDS clock outputs do not meet gen2 jitter</div><div class='del'>-      requirements and thus for gen2 capability a gen2 compliant clock</div><div class='del'>-      generator should be used and configured.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    enum: [1, 2, 3, 4]</div><div class='del'>-    default: 1</div><div class='del'>-</div><div class='del'>-  phys:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  phy-names:</div><div class='del'>-    const: pcie-phy</div><div class='add'>+      - const: msi</div><div class='ctx'> </div><div class='ctx'>   reset-gpio:</div><div class='ctx'>     description: Should specify the GPIO for controlling the PCI bus device</div><div class='hunk'>@@ -144,17 +70,7 @@ properties:</div><div class='ctx'>     description: If present then the reset sequence using the GPIO</div><div class='ctx'>       specified in the "reset-gpio" property is reversed (H=reset state,</div><div class='ctx'>       L=operation state) (optional required).</div><div class='del'>-</div><div class='del'>-  vpcie-supply:</div><div class='del'>-    description: Should specify the regulator in charge of PCIe port power.</div><div class='del'>-      The regulator will be enabled when initializing the PCIe host and</div><div class='del'>-      disabled either as part of the init process or when shutting down</div><div class='del'>-      the host (optional required).</div><div class='del'>-</div><div class='del'>-  vph-supply:</div><div class='del'>-    description: Should specify the regulator in charge of VPH one of</div><div class='del'>-      the three PCIe PHY powers. This regulator can be supplied by both</div><div class='del'>-      1.8v and 3.3v voltage supplies (optional required).</div><div class='add'>+    type: boolean</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -165,14 +81,79 @@ required:</div><div class='ctx'>   - device_type</div><div class='ctx'>   - bus-range</div><div class='ctx'>   - ranges</div><div class='del'>-  - num-lanes</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - interrupt-names</div><div class='ctx'>   - "#interrupt-cells"</div><div class='ctx'>   - interrupt-map-mask</div><div class='ctx'>   - interrupt-map</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie.yaml#</div><div class='add'>+  - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - fsl,imx6sx-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pcie</div><div class='add'>+            - const: pcie_bus</div><div class='add'>+            - const: pcie_phy</div><div class='add'>+            - const: pcie_inbound_axi</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - fsl,imx8mq-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pcie</div><div class='add'>+            - const: pcie_bus</div><div class='add'>+            - const: pcie_phy</div><div class='add'>+            - const: pcie_aux</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - fsl,imx6q-pcie</div><div class='add'>+            - fsl,imx6qp-pcie</div><div class='add'>+            - fsl,imx7d-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pcie</div><div class='add'>+            - const: pcie_bus</div><div class='add'>+            - const: pcie_phy</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - fsl,imx8mm-pcie</div><div class='add'>+            - fsl,imx8mp-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pcie</div><div class='add'>+            - const: pcie_bus</div><div class='add'>+            - const: pcie_aux</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml<br/>index 6bcaa8f2c3cf..d25423aa7167 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/host-generic-pci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/host-generic-pci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/host-generic-pci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/host-generic-pci.yaml</a></div><div class='hunk'>@@ -106,6 +106,9 @@ properties:</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   dma-coherent: true</div><div class='add'>+  iommu-map: true</div><div class='add'>+  iommu-map-mask: true</div><div class='add'>+  msi-parent: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml<br/>index e87ff27526ff..730e63fd7669 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/intel,keembay-pcie-ep.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/pci/intel,keembay-pcie-ep.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/pci/intel,keembay-pcie-ep.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel Keem Bay PCIe controller Endpoint mode</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml b/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml<br/>index ed4400c9ac09..505acc4f3efc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/intel,keembay-pcie.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/pci/intel,keembay-pcie.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/pci/intel,keembay-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel Keem Bay PCIe controller Root Complex mode</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt<br/>index f36efa73a470..ee8a4791a78b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/layerscape-pci.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/layerscape-pci.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/layerscape-pci.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/layerscape-pci.txt</a></div><div class='hunk'>@@ -23,6 +23,7 @@ Required properties:</div><div class='ctx'>         "fsl,ls1012a-pcie"</div><div class='ctx'>         "fsl,ls1028a-pcie"</div><div class='ctx'>   EP mode:</div><div class='add'>+	"fsl,ls1028a-pcie-ep", "fsl,ls-pcie-ep"</div><div class='ctx'> 	"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"</div><div class='ctx'> 	"fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"</div><div class='ctx'> 	"fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep"</div><div class='hunk'>@@ -30,39 +31,49 @@ Required properties:</div><div class='ctx'> - reg: base addresses and lengths of the PCIe controller register blocks.</div><div class='ctx'> - interrupts: A list of interrupt outputs of the controller. Must contain an</div><div class='ctx'>   entry for each entry in the interrupt-names property.</div><div class='del'>-- interrupt-names: Must include the following entries:</div><div class='del'>-  "intr": The interrupt that is asserted for controller interrupts</div><div class='add'>+- interrupt-names: It could include the following entries:</div><div class='add'>+  "aer": Used for interrupt line which reports AER events when</div><div class='add'>+	 non MSI/MSI-X/INTx mode is used</div><div class='add'>+  "pme": Used for interrupt line which reports PME events when</div><div class='add'>+	 non MSI/MSI-X/INTx mode is used</div><div class='add'>+  "intr": Used for SoCs(like ls2080a, lx2160a, ls2080a, ls2088a, ls1088a)</div><div class='add'>+	  which has a single interrupt line for miscellaneous controller</div><div class='add'>+	  events(could include AER and PME events).</div><div class='ctx'> - fsl,pcie-scfg: Must include two entries.</div><div class='ctx'>   The first entry must be a link to the SCFG device node</div><div class='del'>-  The second entry must be '0' or '1' based on physical PCIe controller index.</div><div class='add'>+  The second entry is the physical PCIe controller index starting from '0'.</div><div class='ctx'>   This is used to get SCFG PEXN registers</div><div class='ctx'> - dma-coherent: Indicates that the hardware IP block can ensure the coherency</div><div class='ctx'>   of the data transferred from/to the IP block. This can avoid the software</div><div class='ctx'>   cache flush/invalid actions, and improve the performance significantly.</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+- big-endian: If the PEX_LUT and PF register block is in big-endian, specify</div><div class='add'>+  this property.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='del'>-	pcie@3400000 {</div><div class='del'>-		compatible = "fsl,ls1021a-pcie";</div><div class='del'>-		reg = &lt;0x00 0x03400000 0x0 0x00010000   /* controller registers */</div><div class='del'>-		       0x40 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='del'>-		reg-names = "regs", "config";</div><div class='del'>-		interrupts = &lt;GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH&gt;; /* controller interrupt */</div><div class='del'>-		interrupt-names = "intr";</div><div class='del'>-		fsl,pcie-scfg = &lt;&amp;scfg 0&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		dma-coherent;</div><div class='del'>-		num-lanes = &lt;4&gt;;</div><div class='del'>-		bus-range = &lt;0x0 0xff&gt;;</div><div class='del'>-		ranges = &lt;0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */</div><div class='del'>-			  0xc2000000 0x0 0x20000000 0x40 0x20000000 0x0 0x20000000   /* prefetchable memory */</div><div class='del'>-			  0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000&gt;; /* non-prefetchable memory */</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='del'>-		interrupt-map = &lt;0000 0 0 1 &amp;gic GIC_SPI 91  IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0000 0 0 2 &amp;gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0000 0 0 3 &amp;gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-				&lt;0000 0 0 4 &amp;gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	};</div><div class='add'>+        pcie@3400000 {</div><div class='add'>+                compatible = "fsl,ls1088a-pcie";</div><div class='add'>+                reg = &lt;0x00 0x03400000 0x0 0x00100000&gt;, /* controller registers */</div><div class='add'>+                      &lt;0x20 0x00000000 0x0 0x00002000&gt;; /* configuration space */</div><div class='add'>+                reg-names = "regs", "config";</div><div class='add'>+                interrupts = &lt;0 108 IRQ_TYPE_LEVEL_HIGH&gt;; /* aer interrupt */</div><div class='add'>+                interrupt-names = "aer";</div><div class='add'>+                #address-cells = &lt;3&gt;;</div><div class='add'>+                #size-cells = &lt;2&gt;;</div><div class='add'>+                device_type = "pci";</div><div class='add'>+                dma-coherent;</div><div class='add'>+                num-viewport = &lt;256&gt;;</div><div class='add'>+                bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+                ranges = &lt;0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000   /* downstream I/O */</div><div class='add'>+                          0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000&gt;; /* non-prefetchable memory */</div><div class='add'>+                msi-parent = &lt;&amp;its&gt;;</div><div class='add'>+                #interrupt-cells = &lt;1&gt;;</div><div class='add'>+                interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+                interrupt-map = &lt;0000 0 0 1 &amp;gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                                &lt;0000 0 0 2 &amp;gic 0 0 0 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                                &lt;0000 0 0 3 &amp;gic 0 0 0 111 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                                &lt;0000 0 0 4 &amp;gic 0 0 0 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+                iommu-map = &lt;0 &amp;smmu 0 1&gt;; /* Fixed-up by bootloader */</div><div class='add'>+        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml b/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml<br/>index d60f43fd9c5a..e63e6458cea8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml</a></div><div class='hunk'>@@ -31,7 +31,7 @@ properties:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  'pcie@[0-2],0':</div><div class='add'>+  '^pcie@[0-2],0$':</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: /schemas/pci/pci-bus.yaml#</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml<br/>index 0499b94627ae..7e8c7a2a5f9b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml</a></div><div class='hunk'>@@ -43,12 +43,16 @@ description: |+</div><div class='ctx'>   each set has its own address for MSI message, and supports 32 MSI vectors</div><div class='ctx'>   to generate interrupt.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mediatek,mt8192-pcie</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt7986-pcie</div><div class='add'>+              - mediatek,mt8188-pcie</div><div class='add'>+              - mediatek,mt8195-pcie</div><div class='add'>+          - const: mediatek,mt8192-pcie</div><div class='add'>+      - const: mediatek,mt8192-pcie</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -64,27 +68,29 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 8</div><div class='ctx'> </div><div class='add'>+  iommu-map:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommu-map-mask:</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='ctx'>     minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'>     items:</div><div class='del'>-      - const: phy</div><div class='del'>-      - const: mac</div><div class='add'>+      enum: [ phy, mac ]</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 4</div><div class='ctx'>     maxItems: 6</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: pl_250m</div><div class='del'>-      - const: tl_26m</div><div class='del'>-      - const: tl_96m</div><div class='del'>-      - const: tl_32k</div><div class='del'>-      - const: peri_26m</div><div class='del'>-      - const: top_133m</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 6</div><div class='ctx'> </div><div class='ctx'>   assigned-clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -99,6 +105,9 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: pcie-phy</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   '#interrupt-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -126,9 +135,58 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - ranges</div><div class='ctx'>   - clocks</div><div class='add'>+  - clock-names</div><div class='ctx'>   - '#interrupt-cells'</div><div class='ctx'>   - interrupt-controller</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: mediatek,mt8192-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pl_250m</div><div class='add'>+            - const: tl_26m</div><div class='add'>+            - const: tl_96m</div><div class='add'>+            - const: tl_32k</div><div class='add'>+            - const: peri_26m</div><div class='add'>+            - const: top_133m</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt8188-pcie</div><div class='add'>+              - mediatek,mt8195-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pl_250m</div><div class='add'>+            - const: tl_26m</div><div class='add'>+            - const: tl_96m</div><div class='add'>+            - const: tl_32k</div><div class='add'>+            - const: peri_26m</div><div class='add'>+            - const: peri_mem</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt7986-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pl_250m</div><div class='add'>+            - const: tl_26m</div><div class='add'>+            - const: peri_26m</div><div class='add'>+            - const: top_133m</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie.txt b/Documentation/devicetree/bindings/pci/mediatek-pcie.txt<br/>index 57ae73462272..684227522267 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/mediatek-pcie.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/mediatek-pcie.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/mediatek-pcie.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/mediatek-pcie.txt</a></div><div class='hunk'>@@ -7,6 +7,7 @@ Required properties:</div><div class='ctx'> 	"mediatek,mt7622-pcie"</div><div class='ctx'> 	"mediatek,mt7623-pcie"</div><div class='ctx'> 	"mediatek,mt7629-pcie"</div><div class='add'>+	"airoha,en7523-pcie"</div><div class='ctx'> - device_type: Must be "pci"</div><div class='ctx'> - reg: Base addresses and lengths of the root ports.</div><div class='ctx'> - reg-names: Names of the above areas to use during resource lookup.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml b/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml<br/>index edb4f81253c8..f7a3c2636355 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip PCIe Root Port Bridge Controller Device Tree Bindings</div><div class='add'>+title: Microchip PCIe Root Port Bridge Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daire McNamara &lt;daire.mcnamara@microchip.com&gt;</div><div class='hunk'>@@ -25,6 +25,33 @@ properties:</div><div class='ctx'>       - const: cfg</div><div class='ctx'>       - const: apb</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      Fabric Interface Controllers, FICs, are the interface between the FPGA</div><div class='add'>+      fabric and the core complex on PolarFire SoC. The FICs require two clocks,</div><div class='add'>+      one from each side of the interface. The "FIC clocks" described by this</div><div class='add'>+      property are on the core complex side &amp; communication through a FIC is not</div><div class='add'>+      possible unless it's corresponding clock is enabled. A clock must be</div><div class='add'>+      enabled for each of the interfaces the root port is connected through.</div><div class='add'>+      This could in theory be all 4 interfaces, one interface or any combination</div><div class='add'>+      in between.</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: FIC0's clock</div><div class='add'>+      - description: FIC1's clock</div><div class='add'>+      - description: FIC2's clock</div><div class='add'>+      - description: FIC3's clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    description:</div><div class='add'>+      As any FIC connection combination is possible, the names should match the</div><div class='add'>+      order in the clocks property and take the form "ficN" where N is a number</div><div class='add'>+      0-3</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      pattern: '^fic[0-3]$'</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     items:</div><div class='hunk'>@@ -40,6 +67,10 @@ properties:</div><div class='ctx'>   ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  dma-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='ctx'>   msi-controller:</div><div class='ctx'>     description: Identifies the node as an MSI controller.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml<br/>new file mode 100644<br/>index 000000000000..a24fb8307d29<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie-ep.yaml</a></div><div class='hunk'>@@ -0,0 +1,319 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra194 (and later) PCIe Endpoint controller (Synopsys DesignWare Core based)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Vidya Sagar &lt;vidyas@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This PCIe controller is based on the Synopsys DesignWare PCIe IP and thus</div><div class='add'>+  inherits all the common properties defined in snps,dw-pcie-ep.yaml.  Some</div><div class='add'>+  of the controller instances are dual mode; they can work either in Root</div><div class='add'>+  Port mode or Endpoint mode but one at a time.</div><div class='add'>+</div><div class='add'>+  On Tegra194, controllers C0, C4 and C5 support Endpoint mode.</div><div class='add'>+  On Tegra234, controllers C5, C6, C7 and C10 support Endpoint mode.</div><div class='add'>+</div><div class='add'>+  Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to</div><div class='add'>+  operate in the Endpoint mode because of the way the platform is designed.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-pcie-ep</div><div class='add'>+      - nvidia,tegra234-pcie-ep</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: controller's application logic registers</div><div class='add'>+      - description: iATU and DMA registers. This is where the iATU (internal</div><div class='add'>+          Address Translation Unit) registers of the PCIe core are made</div><div class='add'>+          available for software access.</div><div class='add'>+      - description: aperture where the Root Port's own configuration</div><div class='add'>+          registers are available.</div><div class='add'>+      - description: aperture used to map the remote Root Complex address space</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: appl</div><div class='add'>+      - const: atu_dma</div><div class='add'>+      - const: dbi</div><div class='add'>+      - const: addr_space</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: controller interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: intr</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: APB bus interface reset</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: Must contain a phandle to a GPIO controller followed by GPIO</div><div class='add'>+      that is being used as PERST input signal. Please refer to pci.txt.</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: p2u-0</div><div class='add'>+      - const: p2u-1</div><div class='add'>+      - const: p2u-2</div><div class='add'>+      - const: p2u-3</div><div class='add'>+      - const: p2u-4</div><div class='add'>+      - const: p2u-5</div><div class='add'>+      - const: p2u-6</div><div class='add'>+      - const: p2u-7</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+      A phandle to the node that controls power to the respective PCIe</div><div class='add'>+      controller and a specifier name for the PCIe controller.</div><div class='add'>+</div><div class='add'>+      Tegra194 specifiers are defined in "include/dt-bindings/power/tegra194-powergate.h"</div><div class='add'>+      Tegra234 specifiers are defined in "include/dt-bindings/power/tegra234-powergate.h"</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: memory read client</div><div class='add'>+      - description: memory write client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  nvidia,bpmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: |</div><div class='add'>+      Must contain a pair of phandles to BPMP controller node followed by</div><div class='add'>+      controller ID. Following are the controller IDs for each controller:</div><div class='add'>+</div><div class='add'>+      Tegra194</div><div class='add'>+</div><div class='add'>+        0: C0</div><div class='add'>+        1: C1</div><div class='add'>+        2: C2</div><div class='add'>+        3: C3</div><div class='add'>+        4: C4</div><div class='add'>+        5: C5</div><div class='add'>+</div><div class='add'>+      Tegra234</div><div class='add'>+</div><div class='add'>+        0 : C0</div><div class='add'>+        1 : C1</div><div class='add'>+        2 : C2</div><div class='add'>+        3 : C3</div><div class='add'>+        4 : C4</div><div class='add'>+        5 : C5</div><div class='add'>+        6 : C6</div><div class='add'>+        7 : C7</div><div class='add'>+        8 : C8</div><div class='add'>+        9 : C9</div><div class='add'>+        10: C10</div><div class='add'>+</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to BPMP controller node</div><div class='add'>+          - description: PCIe controller ID</div><div class='add'>+            maximum: 10</div><div class='add'>+</div><div class='add'>+  nvidia,aspm-cmrt-us:</div><div class='add'>+    description: Common Mode Restore Time for proper operation of ASPM to be</div><div class='add'>+      specified in microseconds</div><div class='add'>+</div><div class='add'>+  nvidia,aspm-pwr-on-t-us:</div><div class='add'>+    description: Power On time for proper operation of ASPM to be specified in</div><div class='add'>+      microseconds</div><div class='add'>+</div><div class='add'>+  nvidia,aspm-l0s-entrance-latency-us:</div><div class='add'>+    description: ASPM L0s entrance latency to be specified in microseconds</div><div class='add'>+</div><div class='add'>+  vddio-pex-ctl-supply:</div><div class='add'>+    description: A phandle to the regulator supply for PCIe side band signals</div><div class='add'>+</div><div class='add'>+  nvidia,refclk-select-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO used to enable REFCLK to controller from the host</div><div class='add'>+</div><div class='add'>+  nvidia,enable-ext-refclk:</div><div class='add'>+    description: |</div><div class='add'>+      This boolean property needs to be present if the controller is configured</div><div class='add'>+      to receive Reference Clock from the host.</div><div class='add'>+      NOTE: This is applicable only for Tegra234.</div><div class='add'>+</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  nvidia,enable-srns:</div><div class='add'>+    description: |</div><div class='add'>+      This boolean property needs to be present if the controller is</div><div class='add'>+      configured to operate in SRNS (Separate Reference Clocks with No</div><div class='add'>+      Spread-Spectrum Clocking).  NOTE: This is applicable only for</div><div class='add'>+      Tegra234.</div><div class='add'>+</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - vddio-pex-ctl-supply</div><div class='add'>+  - num-lanes</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - nvidia,bpmp</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra194-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra194-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra194-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra194-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    bus@0 {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0x0 0x8 0x0&gt;;</div><div class='add'>+</div><div class='add'>+        pcie-ep@141a0000 {</div><div class='add'>+            compatible = "nvidia,tegra194-pcie-ep";</div><div class='add'>+            reg = &lt;0x00 0x141a0000 0x0 0x00020000&gt;, /* appl registers (128K) */</div><div class='add'>+                  &lt;0x00 0x3a040000 0x0 0x00040000&gt;, /* iATU_DMA reg space (256K)  */</div><div class='add'>+                  &lt;0x00 0x3a080000 0x0 0x00040000&gt;, /* DBI reg space (256K) */</div><div class='add'>+                  &lt;0x1c 0x00000000 0x4 0x00000000&gt;; /* Address Space (16G) */</div><div class='add'>+            reg-names = "appl", "atu_dma", "dbi", "addr_space";</div><div class='add'>+            interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;; /* controller interrupt */</div><div class='add'>+            interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA194_CLK_PEX1_CORE_5&gt;;</div><div class='add'>+            clock-names = "core";</div><div class='add'>+</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA194_RESET_PEX1_CORE_5_APB&gt;,</div><div class='add'>+                     &lt;&amp;bpmp TEGRA194_RESET_PEX1_CORE_5&gt;;</div><div class='add'>+            reset-names = "apb", "core";</div><div class='add'>+</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_PCIEX8A&gt;;</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;clkreq_c5_bi_dir_state&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,bpmp = &lt;&amp;bpmp 5&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,aspm-cmrt-us = &lt;60&gt;;</div><div class='add'>+            nvidia,aspm-pwr-on-t-us = &lt;20&gt;;</div><div class='add'>+            nvidia,aspm-l0s-entrance-latency-us = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+            vddio-pex-ctl-supply = &lt;&amp;vdd_1v8ao&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,refclk-select-gpios = &lt;&amp;gpio_aon TEGRA194_AON_GPIO(AA, 5)</div><div class='add'>+                                          GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            num-lanes = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='add'>+                   &lt;&amp;p2u_nvhs_3&gt;, &lt;&amp;p2u_nvhs_4&gt;, &lt;&amp;p2u_nvhs_5&gt;,</div><div class='add'>+                   &lt;&amp;p2u_nvhs_6&gt;, &lt;&amp;p2u_nvhs_7&gt;;</div><div class='add'>+</div><div class='add'>+            phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",</div><div class='add'>+                        "p2u-5", "p2u-6", "p2u-7";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra234-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra234-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra234-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    bus@0 {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0x0 0x8 0x0&gt;;</div><div class='add'>+</div><div class='add'>+        pcie-ep@141a0000 {</div><div class='add'>+            compatible = "nvidia,tegra234-pcie-ep";</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA234_POWER_DOMAIN_PCIEX8A&gt;;</div><div class='add'>+            reg = &lt;0x00 0x141a0000 0x0 0x00020000&gt;, /* appl registers (128K)      */</div><div class='add'>+                  &lt;0x00 0x3a040000 0x0 0x00040000&gt;, /* iATU_DMA reg space (256K)  */</div><div class='add'>+                  &lt;0x00 0x3a080000 0x0 0x00040000&gt;, /* DBI reg space (256K)       */</div><div class='add'>+                  &lt;0x27 0x40000000 0x4 0x00000000&gt;; /* Address Space (16G)        */</div><div class='add'>+            reg-names = "appl", "atu_dma", "dbi", "addr_space";</div><div class='add'>+</div><div class='add'>+            interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;; /* controller interrupt */</div><div class='add'>+            interrupt-names = "intr";</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA234_CLK_PEX1_C5_CORE&gt;;</div><div class='add'>+            clock-names = "core";</div><div class='add'>+</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA234_RESET_PEX1_CORE_5_APB&gt;,</div><div class='add'>+                     &lt;&amp;bpmp TEGRA234_RESET_PEX1_CORE_5&gt;;</div><div class='add'>+            reset-names = "apb", "core";</div><div class='add'>+</div><div class='add'>+            nvidia,bpmp = &lt;&amp;bpmp 5&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,enable-ext-refclk;</div><div class='add'>+            nvidia,aspm-cmrt-us = &lt;60&gt;;</div><div class='add'>+            nvidia,aspm-pwr-on-t-us = &lt;20&gt;;</div><div class='add'>+            nvidia,aspm-l0s-entrance-latency-us = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+            vddio-pex-ctl-supply = &lt;&amp;p3701_vdd_1v8_ls&gt;;</div><div class='add'>+</div><div class='add'>+            reset-gpios = &lt;&amp;gpio TEGRA234_MAIN_GPIO(AF, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,refclk-select-gpios = &lt;&amp;gpio_aon</div><div class='add'>+                                          TEGRA234_AON_GPIO(AA, 4)</div><div class='add'>+                                          GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            num-lanes = &lt;8&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='add'>+                   &lt;&amp;p2u_nvhs_3&gt;, &lt;&amp;p2u_nvhs_4&gt;, &lt;&amp;p2u_nvhs_5&gt;,</div><div class='add'>+                   &lt;&amp;p2u_nvhs_6&gt;, &lt;&amp;p2u_nvhs_7&gt;;</div><div class='add'>+</div><div class='add'>+            phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",</div><div class='add'>+                        "p2u-5", "p2u-6", "p2u-7";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt<br/>deleted file mode 100644<br/>index 8e4f9bfb316d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,245 +0,0 @@</div><div class='del'>-NVIDIA Tegra PCIe controller (Synopsys DesignWare Core based)</div><div class='del'>-</div><div class='del'>-This PCIe controller is based on the Synopsis Designware PCIe IP</div><div class='del'>-and thus inherits all the common properties defined in snps,dw-pcie.yaml and</div><div class='del'>-snps,dw-pcie-ep.yaml.</div><div class='del'>-Some of the controller instances are dual mode where in they can work either</div><div class='del'>-in root port mode or endpoint mode but one at a time.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- power-domains: A phandle to the node that controls power to the respective</div><div class='del'>-  PCIe controller and a specifier name for the PCIe controller. Following are</div><div class='del'>-  the specifiers for the different PCIe controllers</div><div class='del'>-    TEGRA194_POWER_DOMAIN_PCIEX8B: C0</div><div class='del'>-    TEGRA194_POWER_DOMAIN_PCIEX1A: C1</div><div class='del'>-    TEGRA194_POWER_DOMAIN_PCIEX1A: C2</div><div class='del'>-    TEGRA194_POWER_DOMAIN_PCIEX1A: C3</div><div class='del'>-    TEGRA194_POWER_DOMAIN_PCIEX4A: C4</div><div class='del'>-    TEGRA194_POWER_DOMAIN_PCIEX8A: C5</div><div class='del'>-  these specifiers are defined in</div><div class='del'>-  "include/dt-bindings/power/tegra194-powergate.h" file.</div><div class='del'>-- reg: A list of physical base address and length pairs for each set of</div><div class='del'>-  controller registers. Must contain an entry for each entry in the reg-names</div><div class='del'>-  property.</div><div class='del'>-- reg-names: Must include the following entries:</div><div class='del'>-  "appl": Controller's application logic registers</div><div class='del'>-  "config": As per the definition in snps,dw-pcie.yaml</div><div class='del'>-  "atu_dma": iATU and DMA registers. This is where the iATU (internal Address</div><div class='del'>-             Translation Unit) registers of the PCIe core are made available</div><div class='del'>-             for SW access.</div><div class='del'>-  "dbi": The aperture where root port's own configuration registers are</div><div class='del'>-         available</div><div class='del'>-- interrupts: A list of interrupt outputs of the controller. Must contain an</div><div class='del'>-  entry for each entry in the interrupt-names property.</div><div class='del'>-- interrupt-names: Must include the following entries:</div><div class='del'>-  "intr": The Tegra interrupt that is asserted for controller interrupts</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names: Must include the following entries:</div><div class='del'>-  - core</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-- reset-names: Must include the following entries:</div><div class='del'>-  - apb</div><div class='del'>-  - core</div><div class='del'>-- phys: Must contain a phandle to P2U PHY for each entry in phy-names.</div><div class='del'>-- phy-names: Must include an entry for each active lane.</div><div class='del'>-  "p2u-N": where N ranges from 0 to one less than the total number of lanes</div><div class='del'>-- nvidia,bpmp: Must contain a pair of phandle to BPMP controller node followed</div><div class='del'>-  by controller-id. Following are the controller ids for each controller.</div><div class='del'>-    0: C0</div><div class='del'>-    1: C1</div><div class='del'>-    2: C2</div><div class='del'>-    3: C3</div><div class='del'>-    4: C4</div><div class='del'>-    5: C5</div><div class='del'>-- vddio-pex-ctl-supply: Regulator supply for PCIe side band signals</div><div class='del'>-</div><div class='del'>-RC mode:</div><div class='del'>-- compatible: Tegra19x must contain  "nvidia,tegra194-pcie"</div><div class='del'>-- device_type: Must be "pci" for RC mode</div><div class='del'>-- interrupt-names: Must include the following entries:</div><div class='del'>-  "msi": The Tegra interrupt that is asserted when an MSI is received</div><div class='del'>-- bus-range: Range of bus numbers associated with this controller</div><div class='del'>-- #address-cells: Address representation for root ports (must be 3)</div><div class='del'>-  - cell 0 specifies the bus and device numbers of the root port:</div><div class='del'>-    [23:16]: bus number</div><div class='del'>-    [15:11]: device number</div><div class='del'>-  - cell 1 denotes the upper 32 address bits and should be 0</div><div class='del'>-  - cell 2 contains the lower 32 address bits and is used to translate to the</div><div class='del'>-    CPU address space</div><div class='del'>-- #size-cells: Size representation for root ports (must be 2)</div><div class='del'>-- ranges: Describes the translation of addresses for root ports and standard</div><div class='del'>-  PCI regions. The entries must be 7 cells each, where the first three cells</div><div class='del'>-  correspond to the address as described for the #address-cells property</div><div class='del'>-  above, the fourth and fifth cells are for the physical CPU address to</div><div class='del'>-  translate to and the sixth and seventh cells are as described for the</div><div class='del'>-  #size-cells property above.</div><div class='del'>-  - Entries setup the mapping for the standard I/O, memory and</div><div class='del'>-    prefetchable PCI regions. The first cell determines the type of region</div><div class='del'>-    that is setup:</div><div class='del'>-    - 0x81000000: I/O memory region</div><div class='del'>-    - 0x82000000: non-prefetchable memory region</div><div class='del'>-    - 0xc2000000: prefetchable memory region</div><div class='del'>-  Please refer to the standard PCI bus binding document for a more detailed</div><div class='del'>-  explanation.</div><div class='del'>-- #interrupt-cells: Size representation for interrupts (must be 1)</div><div class='del'>-- interrupt-map-mask and interrupt-map: Standard PCI IRQ mapping properties</div><div class='del'>-  Please refer to the standard PCI bus binding document for a more detailed</div><div class='del'>-  explanation.</div><div class='del'>-</div><div class='del'>-EP mode:</div><div class='del'>-In Tegra194, Only controllers C0, C4 &amp; C5 support EP mode.</div><div class='del'>-- compatible: Tegra19x must contain "nvidia,tegra194-pcie-ep"</div><div class='del'>-- reg-names: Must include the following entries:</div><div class='del'>-  "addr_space": Used to map remote RC address space</div><div class='del'>-- reset-gpios: Must contain a phandle to a GPIO controller followed by</div><div class='del'>-  GPIO that is being used as PERST input signal. Please refer to pci.txt</div><div class='del'>-  document.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- pinctrl-names: A list of pinctrl state names.</div><div class='del'>-  It is mandatory for C5 controller and optional for other controllers.</div><div class='del'>-  - "default": Configures PCIe I/O for proper operation.</div><div class='del'>-- pinctrl-0: phandle for the 'default' state of pin configuration.</div><div class='del'>-  It is mandatory for C5 controller and optional for other controllers.</div><div class='del'>-- supports-clkreq: Refer to Documentation/devicetree/bindings/pci/pci.txt</div><div class='del'>-- nvidia,update-fc-fixup: This is a boolean property and needs to be present to</div><div class='del'>-    improve performance when a platform is designed in such a way that it</div><div class='del'>-    satisfies at least one of the following conditions thereby enabling root</div><div class='del'>-    port to exchange optimum number of FC (Flow Control) credits with</div><div class='del'>-    downstream devices</div><div class='del'>-    1. If C0/C4/C5 run at x1/x2 link widths (irrespective of speed and MPS)</div><div class='del'>-    2. If C0/C1/C2/C3/C4/C5 operate at their respective max link widths and</div><div class='del'>-       a) speed is Gen-2 and MPS is 256B</div><div class='del'>-       b) speed is &gt;= Gen-3 with any MPS</div><div class='del'>-- nvidia,aspm-cmrt-us: Common Mode Restore Time for proper operation of ASPM</div><div class='del'>-   to be specified in microseconds</div><div class='del'>-- nvidia,aspm-pwr-on-t-us: Power On time for proper operation of ASPM to be</div><div class='del'>-   specified in microseconds</div><div class='del'>-- nvidia,aspm-l0s-entrance-latency-us: ASPM L0s entrance latency to be</div><div class='del'>-   specified in microseconds</div><div class='del'>-</div><div class='del'>-RC mode:</div><div class='del'>-- vpcie3v3-supply: A phandle to the regulator node that supplies 3.3V to the slot</div><div class='del'>-  if the platform has one such slot. (Ex:- x16 slot owned by C5 controller</div><div class='del'>-  in p2972-0000 platform).</div><div class='del'>-- vpcie12v-supply: A phandle to the regulator node that supplies 12V to the slot</div><div class='del'>-  if the platform has one such slot. (Ex:- x16 slot owned by C5 controller</div><div class='del'>-  in p2972-0000 platform).</div><div class='del'>-</div><div class='del'>-EP mode:</div><div class='del'>-- nvidia,refclk-select-gpios: Must contain a phandle to a GPIO controller</div><div class='del'>-  followed by GPIO that is being used to enable REFCLK to controller from host</div><div class='del'>-</div><div class='del'>-NOTE:- On Tegra194's P2972-0000 platform, only C5 controller can be enabled to</div><div class='del'>-operate in the endpoint mode because of the way the platform is designed.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-=========</div><div class='del'>-</div><div class='del'>-Tegra194 RC mode:</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-	pcie@14180000 {</div><div class='del'>-		compatible = "nvidia,tegra194-pcie";</div><div class='del'>-		power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_PCIEX8B&gt;;</div><div class='del'>-		reg = &lt;0x00 0x14180000 0x0 0x00020000   /* appl registers (128K)      */</div><div class='del'>-		       0x00 0x38000000 0x0 0x00040000   /* configuration space (256K) */</div><div class='del'>-		       0x00 0x38040000 0x0 0x00040000&gt;; /* iATU_DMA reg space (256K)  */</div><div class='del'>-		reg-names = "appl", "config", "atu_dma";</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		num-lanes = &lt;8&gt;;</div><div class='del'>-		linux,pci-domain = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pex_rst_c5_out_state&gt;, &lt;&amp;clkreq_c5_bi_dir_state&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;bpmp TEGRA194_CLK_PEX0_CORE_0&gt;;</div><div class='del'>-		clock-names = "core";</div><div class='del'>-</div><div class='del'>-		resets = &lt;&amp;bpmp TEGRA194_RESET_PEX0_CORE_0_APB&gt;,</div><div class='del'>-			 &lt;&amp;bpmp TEGRA194_RESET_PEX0_CORE_0&gt;;</div><div class='del'>-		reset-names = "apb", "core";</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,	/* controller interrupt */</div><div class='del'>-			     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;;	/* MSI interrupt */</div><div class='del'>-		interrupt-names = "intr", "msi";</div><div class='del'>-</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='del'>-		interrupt-map = &lt;0 0 0 0 &amp;gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		nvidia,bpmp = &lt;&amp;bpmp 0&gt;;</div><div class='del'>-</div><div class='del'>-		supports-clkreq;</div><div class='del'>-		nvidia,aspm-cmrt-us = &lt;60&gt;;</div><div class='del'>-		nvidia,aspm-pwr-on-t-us = &lt;20&gt;;</div><div class='del'>-		nvidia,aspm-l0s-entrance-latency-us = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-		bus-range = &lt;0x0 0xff&gt;;</div><div class='del'>-		ranges = &lt;0x81000000 0x0  0x38100000 0x0  0x38100000 0x0 0x00100000    /* downstream I/O (1MB) */</div><div class='del'>-			  0x82000000 0x0  0x38200000 0x0  0x38200000 0x0 0x01E00000    /* non-prefetchable memory (30MB) */</div><div class='del'>-			  0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000&gt;;  /* prefetchable memory (16GB) */</div><div class='del'>-</div><div class='del'>-		vddio-pex-ctl-supply = &lt;&amp;vdd_1v8ao&gt;;</div><div class='del'>-		vpcie3v3-supply = &lt;&amp;vdd_3v3_pcie&gt;;</div><div class='del'>-		vpcie12v-supply = &lt;&amp;vdd_12v_pcie&gt;;</div><div class='del'>-</div><div class='del'>-		phys = &lt;&amp;p2u_hsio_2&gt;, &lt;&amp;p2u_hsio_3&gt;, &lt;&amp;p2u_hsio_4&gt;,</div><div class='del'>-		       &lt;&amp;p2u_hsio_5&gt;;</div><div class='del'>-		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Tegra194 EP mode:</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-	pcie-ep@141a0000 {</div><div class='del'>-		compatible = "nvidia,tegra194-pcie-ep", "snps,dw-pcie-ep";</div><div class='del'>-		power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_PCIEX8A&gt;;</div><div class='del'>-		reg = &lt;0x00 0x141a0000 0x0 0x00020000   /* appl registers (128K)      */</div><div class='del'>-		       0x00 0x3a040000 0x0 0x00040000   /* iATU_DMA reg space (256K)  */</div><div class='del'>-		       0x00 0x3a080000 0x0 0x00040000   /* DBI reg space (256K)       */</div><div class='del'>-		       0x1c 0x00000000 0x4 0x00000000&gt;; /* Address Space (16G)        */</div><div class='del'>-		reg-names = "appl", "atu_dma", "dbi", "addr_space";</div><div class='del'>-</div><div class='del'>-		num-lanes = &lt;8&gt;;</div><div class='del'>-		num-ib-windows = &lt;2&gt;;</div><div class='del'>-		num-ob-windows = &lt;8&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;clkreq_c5_bi_dir_state&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;bpmp TEGRA194_CLK_PEX1_CORE_5&gt;;</div><div class='del'>-		clock-names = "core";</div><div class='del'>-</div><div class='del'>-		resets = &lt;&amp;bpmp TEGRA194_RESET_PEX1_CORE_5_APB&gt;,</div><div class='del'>-			 &lt;&amp;bpmp TEGRA194_RESET_PEX1_CORE_5&gt;;</div><div class='del'>-		reset-names = "apb", "core";</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH&gt;;	/* controller interrupt */</div><div class='del'>-		interrupt-names = "intr";</div><div class='del'>-</div><div class='del'>-		nvidia,bpmp = &lt;&amp;bpmp 5&gt;;</div><div class='del'>-</div><div class='del'>-		nvidia,aspm-cmrt-us = &lt;60&gt;;</div><div class='del'>-		nvidia,aspm-pwr-on-t-us = &lt;20&gt;;</div><div class='del'>-		nvidia,aspm-l0s-entrance-latency-us = &lt;3&gt;;</div><div class='del'>-</div><div class='del'>-		vddio-pex-ctl-supply = &lt;&amp;vdd_1v8ao&gt;;</div><div class='del'>-</div><div class='del'>-		reset-gpios = &lt;&amp;gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-		nvidia,refclk-select-gpios = &lt;&amp;gpio_aon TEGRA194_AON_GPIO(AA, 5)</div><div class='del'>-					      GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		phys = &lt;&amp;p2u_nvhs_0&gt;, &lt;&amp;p2u_nvhs_1&gt;, &lt;&amp;p2u_nvhs_2&gt;,</div><div class='del'>-		       &lt;&amp;p2u_nvhs_3&gt;, &lt;&amp;p2u_nvhs_4&gt;, &lt;&amp;p2u_nvhs_5&gt;,</div><div class='del'>-		       &lt;&amp;p2u_nvhs_6&gt;, &lt;&amp;p2u_nvhs_7&gt;;</div><div class='del'>-</div><div class='del'>-		phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",</div><div class='del'>-			    "p2u-5", "p2u-6", "p2u-7";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml<br/>new file mode 100644<br/>index 000000000000..fe81d52c7277<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,380 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra194 (and later) PCIe controller (Synopsys DesignWare Core based)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Vidya Sagar &lt;vidyas@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This PCIe controller is based on the Synopsys DesignWare PCIe IP and thus</div><div class='add'>+  inherits all the common properties defined in snps,dw-pcie.yaml. Some of</div><div class='add'>+  the controller instances are dual mode where in they can work either in</div><div class='add'>+  Root Port mode or Endpoint mode but one at a time.</div><div class='add'>+</div><div class='add'>+  See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device</div><div class='add'>+  tree bindings.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-pcie</div><div class='add'>+      - nvidia,tegra234-pcie</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 4</div><div class='add'>+    items:</div><div class='add'>+      - description: controller's application logic registers</div><div class='add'>+      - description: configuration registers</div><div class='add'>+      - description: iATU and DMA registers. This is where the iATU (internal</div><div class='add'>+          Address Translation Unit) registers of the PCIe core are made</div><div class='add'>+          available for software access.</div><div class='add'>+      - description: aperture where the Root Port's own configuration</div><div class='add'>+          registers are available.</div><div class='add'>+      - description: aperture to access the configuration space through ECAM.</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 4</div><div class='add'>+    items:</div><div class='add'>+      - const: appl</div><div class='add'>+      - const: config</div><div class='add'>+      - const: atu_dma</div><div class='add'>+      - const: dbi</div><div class='add'>+      - const: ecam</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: controller interrupt</div><div class='add'>+      - description: MSI interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: intr</div><div class='add'>+      - const: msi</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: module clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: APB bus interface reset</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: p2u-0</div><div class='add'>+      - const: p2u-1</div><div class='add'>+      - const: p2u-2</div><div class='add'>+      - const: p2u-3</div><div class='add'>+      - const: p2u-4</div><div class='add'>+      - const: p2u-5</div><div class='add'>+      - const: p2u-6</div><div class='add'>+      - const: p2u-7</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+      A phandle to the node that controls power to the respective PCIe</div><div class='add'>+      controller and a specifier name for the PCIe controller.</div><div class='add'>+</div><div class='add'>+      Tegra194 specifiers defined in "include/dt-bindings/power/tegra194-powergate.h"</div><div class='add'>+      Tegra234 specifiers defined in "include/dt-bindings/power/tegra234-powergate.h"</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: memory read client</div><div class='add'>+      - description: memory write client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  nvidia,bpmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: |</div><div class='add'>+      Must contain a pair of phandles to BPMP controller node followed by</div><div class='add'>+      controller ID. Following are the controller IDs for each controller:</div><div class='add'>+</div><div class='add'>+      Tegra194</div><div class='add'>+</div><div class='add'>+        0: C0</div><div class='add'>+        1: C1</div><div class='add'>+        2: C2</div><div class='add'>+        3: C3</div><div class='add'>+        4: C4</div><div class='add'>+        5: C5</div><div class='add'>+</div><div class='add'>+      Tegra234</div><div class='add'>+</div><div class='add'>+        0 : C0</div><div class='add'>+        1 : C1</div><div class='add'>+        2 : C2</div><div class='add'>+        3 : C3</div><div class='add'>+        4 : C4</div><div class='add'>+        5 : C5</div><div class='add'>+        6 : C6</div><div class='add'>+        7 : C7</div><div class='add'>+        8 : C8</div><div class='add'>+        9 : C9</div><div class='add'>+        10: C10</div><div class='add'>+</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to BPMP controller node</div><div class='add'>+          - description: PCIe controller ID</div><div class='add'>+            maximum: 10</div><div class='add'>+</div><div class='add'>+  nvidia,update-fc-fixup:</div><div class='add'>+    description: |</div><div class='add'>+      This is a boolean property and needs to be present to improve performance</div><div class='add'>+      when a platform is designed in such a way that it satisfies at least one</div><div class='add'>+      of the following conditions thereby enabling Root Port to exchange</div><div class='add'>+      optimum number of FC (Flow Control) credits with downstream devices:</div><div class='add'>+</div><div class='add'>+      NOTE: This is applicable only for Tegra194.</div><div class='add'>+</div><div class='add'>+        1. If C0/C4/C5 run at x1/x2 link widths (irrespective of speed and MPS)</div><div class='add'>+        2. If C0/C1/C2/C3/C4/C5 operate at their respective max link widths and</div><div class='add'>+          a) speed is Gen-2 and MPS is 256B</div><div class='add'>+          b) speed is &gt;= Gen-3 with any MPS</div><div class='add'>+</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  nvidia,aspm-cmrt-us:</div><div class='add'>+    description: Common Mode Restore Time for proper operation of ASPM to be</div><div class='add'>+      specified in microseconds</div><div class='add'>+</div><div class='add'>+  nvidia,aspm-pwr-on-t-us:</div><div class='add'>+    description: Power On time for proper operation of ASPM to be specified in</div><div class='add'>+      microseconds</div><div class='add'>+</div><div class='add'>+  nvidia,aspm-l0s-entrance-latency-us:</div><div class='add'>+    description: ASPM L0s entrance latency to be specified in microseconds</div><div class='add'>+</div><div class='add'>+  vddio-pex-ctl-supply:</div><div class='add'>+    description: A phandle to the regulator supply for PCIe side band signals.</div><div class='add'>+</div><div class='add'>+  vpcie3v3-supply:</div><div class='add'>+    description: A phandle to the regulator node that supplies 3.3V to the slot</div><div class='add'>+      if the platform has one such slot, e.g., x16 slot owned by C5 controller</div><div class='add'>+      in p2972-0000 platform.</div><div class='add'>+</div><div class='add'>+  vpcie12v-supply:</div><div class='add'>+    description: A phandle to the regulator node that supplies 12V to the slot</div><div class='add'>+      if the platform has one such slot, e.g., x16 slot owned by C5 controller</div><div class='add'>+      in p2972-0000 platform.</div><div class='add'>+</div><div class='add'>+  nvidia,enable-srns:</div><div class='add'>+    description: |</div><div class='add'>+      This boolean property needs to be present if the controller is</div><div class='add'>+      configured to operate in SRNS (Separate Reference Clocks with No</div><div class='add'>+      Spread-Spectrum Clocking).  NOTE: This is applicable only for</div><div class='add'>+      Tegra234.</div><div class='add'>+</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+  nvidia,enable-ext-refclk:</div><div class='add'>+    description: |</div><div class='add'>+      This boolean property needs to be present if the controller is</div><div class='add'>+      configured to use the reference clocking coming in from an external</div><div class='add'>+      clock source instead of using the internal clock source.</div><div class='add'>+</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra194-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        reg-names:</div><div class='add'>+          maxItems: 4</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra234-pcie</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 5</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - interrupt-map-mask</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - vddio-pex-ctl-supply</div><div class='add'>+  - num-lanes</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - nvidia,bpmp</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra194-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra194-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra194-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    bus@0 {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0x0 0x8 0x0&gt;;</div><div class='add'>+</div><div class='add'>+        pcie@14180000 {</div><div class='add'>+            compatible = "nvidia,tegra194-pcie";</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_PCIEX8B&gt;;</div><div class='add'>+            reg = &lt;0x0 0x14180000 0x0 0x00020000&gt;, /* appl registers (128K)      */</div><div class='add'>+                  &lt;0x0 0x38000000 0x0 0x00040000&gt;, /* configuration space (256K) */</div><div class='add'>+                  &lt;0x0 0x38040000 0x0 0x00040000&gt;, /* iATU_DMA reg space (256K)  */</div><div class='add'>+                  &lt;0x0 0x38080000 0x0 0x00040000&gt;; /* DBI reg space (256K)       */</div><div class='add'>+            reg-names = "appl", "config", "atu_dma", "dbi";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;3&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            device_type = "pci";</div><div class='add'>+            num-lanes = &lt;8&gt;;</div><div class='add'>+            linux,pci-domain = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pex_rst_c5_out_state&gt;, &lt;&amp;clkreq_c5_bi_dir_state&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA194_CLK_PEX0_CORE_0&gt;;</div><div class='add'>+            clock-names = "core";</div><div class='add'>+</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA194_RESET_PEX0_CORE_0_APB&gt;,</div><div class='add'>+                     &lt;&amp;bpmp TEGRA194_RESET_PEX0_CORE_0&gt;;</div><div class='add'>+            reset-names = "apb", "core";</div><div class='add'>+</div><div class='add'>+            interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;, /* controller interrupt */</div><div class='add'>+                         &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;; /* MSI interrupt */</div><div class='add'>+            interrupt-names = "intr", "msi";</div><div class='add'>+</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='add'>+            interrupt-map = &lt;0 0 0 0 &amp;gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,bpmp = &lt;&amp;bpmp 0&gt;;</div><div class='add'>+</div><div class='add'>+            supports-clkreq;</div><div class='add'>+            nvidia,aspm-cmrt-us = &lt;60&gt;;</div><div class='add'>+            nvidia,aspm-pwr-on-t-us = &lt;20&gt;;</div><div class='add'>+            nvidia,aspm-l0s-entrance-latency-us = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+            bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+            ranges = &lt;0x81000000 0x0  0x38100000 0x0  0x38100000 0x0 0x00100000&gt;, /* downstream I/O */</div><div class='add'>+                     &lt;0x82000000 0x0  0x38200000 0x0  0x38200000 0x0 0x01e00000&gt;, /* non-prefetch memory */</div><div class='add'>+                     &lt;0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000&gt;; /* prefetchable memory */</div><div class='add'>+</div><div class='add'>+            vddio-pex-ctl-supply = &lt;&amp;vdd_1v8ao&gt;;</div><div class='add'>+            vpcie3v3-supply = &lt;&amp;vdd_3v3_pcie&gt;;</div><div class='add'>+            vpcie12v-supply = &lt;&amp;vdd_12v_pcie&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;p2u_hsio_2&gt;, &lt;&amp;p2u_hsio_3&gt;, &lt;&amp;p2u_hsio_4&gt;,</div><div class='add'>+                   &lt;&amp;p2u_hsio_5&gt;;</div><div class='add'>+            phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra234-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra234-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    bus@0 {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0x0 0x8 0x0&gt;;</div><div class='add'>+</div><div class='add'>+        pcie@14160000 {</div><div class='add'>+            compatible = "nvidia,tegra234-pcie";</div><div class='add'>+            power-domains = &lt;&amp;bpmp TEGRA234_POWER_DOMAIN_PCIEX4BB&gt;;</div><div class='add'>+            reg = &lt;0x00 0x14160000 0x0 0x00020000&gt;, /* appl registers (128K)      */</div><div class='add'>+                  &lt;0x00 0x36000000 0x0 0x00040000&gt;, /* configuration space (256K) */</div><div class='add'>+                  &lt;0x00 0x36040000 0x0 0x00040000&gt;, /* iATU_DMA reg space (256K)  */</div><div class='add'>+                  &lt;0x00 0x36080000 0x0 0x00040000&gt;, /* DBI reg space (256K)       */</div><div class='add'>+                  &lt;0x24 0x30000000 0x0 0x10000000&gt;; /* ECAM (256MB)               */</div><div class='add'>+            reg-names = "appl", "config", "atu_dma", "dbi", "ecam";</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;3&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            device_type = "pci";</div><div class='add'>+            num-lanes = &lt;4&gt;;</div><div class='add'>+            num-viewport = &lt;8&gt;;</div><div class='add'>+            linux,pci-domain = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;bpmp TEGRA234_CLK_PEX0_C4_CORE&gt;;</div><div class='add'>+            clock-names = "core";</div><div class='add'>+</div><div class='add'>+            resets = &lt;&amp;bpmp TEGRA234_RESET_PEX0_CORE_4_APB&gt;,</div><div class='add'>+                     &lt;&amp;bpmp TEGRA234_RESET_PEX0_CORE_4&gt;;</div><div class='add'>+            reset-names = "apb", "core";</div><div class='add'>+</div><div class='add'>+            interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;, /* controller interrupt */</div><div class='add'>+                         &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;; /* MSI interrupt */</div><div class='add'>+            interrupt-names = "intr", "msi";</div><div class='add'>+</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            interrupt-map-mask = &lt;0 0 0 0&gt;;</div><div class='add'>+            interrupt-map = &lt;0 0 0 0 &amp;gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,bpmp = &lt;&amp;bpmp 4&gt;;</div><div class='add'>+</div><div class='add'>+            nvidia,aspm-cmrt-us = &lt;60&gt;;</div><div class='add'>+            nvidia,aspm-pwr-on-t-us = &lt;20&gt;;</div><div class='add'>+            nvidia,aspm-l0s-entrance-latency-us = &lt;3&gt;;</div><div class='add'>+</div><div class='add'>+            bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+            ranges = &lt;0x43000000 0x21 0x40000000 0x21 0x40000000 0x2 0xe8000000&gt;, /* prefetchable */</div><div class='add'>+                     &lt;0x02000000 0x0  0x40000000 0x24 0x28000000 0x0 0x08000000&gt;, /* non-prefetchable */</div><div class='add'>+                     &lt;0x01000000 0x0  0x36100000 0x00 0x36100000 0x0 0x00100000&gt;; /* downstream I/O */</div><div class='add'>+</div><div class='add'>+            vddio-pex-ctl-supply = &lt;&amp;p3701_vdd_AO_1v8&gt;;</div><div class='add'>+</div><div class='add'>+            phys = &lt;&amp;p2u_hsio_4&gt;, &lt;&amp;p2u_hsio_5&gt;, &lt;&amp;p2u_hsio_6&gt;,</div><div class='add'>+                   &lt;&amp;p2u_hsio_7&gt;;</div><div class='add'>+            phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml<br/>index ccec51ab5247..d1eef4825207 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/pci-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/pci-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/pci-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/pci-ep.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pci/pci-ep.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: PCI Endpoint Controller Schema</div><div class='add'>+title: PCI Endpoint Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Common properties for PCI Endpoint Controller Nodes.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt<br/>deleted file mode 100644<br/>index aeba38f0a387..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,84 +0,0 @@</div><div class='del'>-Renesas AHB to PCI bridge</div><div class='del'>--------------------------</div><div class='del'>-</div><div class='del'>-This is the bridge used internally to connect the USB controllers to the</div><div class='del'>-AHB. There is one bridge instance per USB port connected to the internal</div><div class='del'>-OHCI and EHCI controllers.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "renesas,pci-r8a7742" for the R8A7742 SoC;</div><div class='del'>-	      "renesas,pci-r8a7743" for the R8A7743 SoC;</div><div class='del'>-	      "renesas,pci-r8a7744" for the R8A7744 SoC;</div><div class='del'>-	      "renesas,pci-r8a7745" for the R8A7745 SoC;</div><div class='del'>-	      "renesas,pci-r8a7790" for the R8A7790 SoC;</div><div class='del'>-	      "renesas,pci-r8a7791" for the R8A7791 SoC;</div><div class='del'>-	      "renesas,pci-r8a7793" for the R8A7793 SoC;</div><div class='del'>-	      "renesas,pci-r8a7794" for the R8A7794 SoC;</div><div class='del'>-	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 or</div><div class='del'>-				      RZ/G1 compatible device.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-	      When compatible with the generic version, nodes must list the</div><div class='del'>-	      SoC-specific version corresponding to the platform first</div><div class='del'>-	      followed by the generic version.</div><div class='del'>-</div><div class='del'>-- reg:	A list of physical regions to access the device: the first is</div><div class='del'>-	the operational registers for the OHCI/EHCI controllers and the</div><div class='del'>-	second is for the bridge configuration and control registers.</div><div class='del'>-- interrupts: interrupt for the device.</div><div class='del'>-- clocks: The reference to the device clock.</div><div class='del'>-- bus-range: The PCI bus number range; as this is a single bus, the range</div><div class='del'>-	     should be specified as the same value twice.</div><div class='del'>-- #address-cells: must be 3.</div><div class='del'>-- #size-cells: must be 2.</div><div class='del'>-- #interrupt-cells: must be 1.</div><div class='del'>-- interrupt-map: standard property used to define the mapping of the PCI</div><div class='del'>-  interrupts to the GIC interrupts.</div><div class='del'>-- interrupt-map-mask: standard property that helps to define the interrupt</div><div class='del'>-  mapping.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- dma-ranges: a single range for the inbound memory region. If not supplied,</div><div class='del'>-  defaults to 1GiB at 0x40000000. Note there are hardware restrictions on the</div><div class='del'>-  allowed combinations of address and size.</div><div class='del'>-</div><div class='del'>-Example SoC configuration:</div><div class='del'>-</div><div class='del'>-	pci0: pci@ee090000  {</div><div class='del'>-		compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";</div><div class='del'>-		clocks = &lt;&amp;mstp7_clks R8A7790_CLK_EHCI&gt;;</div><div class='del'>-		reg = &lt;0x0 0xee090000 0x0 0xc00&gt;,</div><div class='del'>-		      &lt;0x0 0xee080000 0x0 0x1100&gt;;</div><div class='del'>-		interrupts = &lt;0 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		bus-range = &lt;0 0&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		dma-ranges = &lt;0x42000000 0 0x40000000 0 0x40000000 0 0x40000000&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0xff00 0 0 0x7&gt;;</div><div class='del'>-		interrupt-map = &lt;0x0000 0 0 1 &amp;gic 0 108 IRQ_TYPE_LEVEL_HIGH</div><div class='del'>-				 0x0800 0 0 1 &amp;gic 0 108 IRQ_TYPE_LEVEL_HIGH</div><div class='del'>-				 0x1000 0 0 2 &amp;gic 0 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		usb@1,0 {</div><div class='del'>-			reg = &lt;0x800 0 0 0 0&gt;;</div><div class='del'>-			phys = &lt;&amp;usb0 0&gt;;</div><div class='del'>-			phy-names = "usb";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		usb@2,0 {</div><div class='del'>-			reg = &lt;0x1000 0 0 0 0&gt;;</div><div class='del'>-			phys = &lt;&amp;usb0 0&gt;;</div><div class='del'>-			phy-names = "usb";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example board setup:</div><div class='del'>-</div><div class='del'>-&amp;pci0 {</div><div class='del'>-	status = "okay";</div><div class='del'>-	pinctrl-0 = &lt;&amp;usb0_pins&gt;;</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml<br/>index 3d23599e5e91..b3c22ebd156c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml</a></div><div class='hunk'>@@ -4,17 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm PCIe Endpoint Controller binding</div><div class='add'>+title: Qualcomm PCIe Endpoint Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pci-ep.yaml#"</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,sdx55-pcie-ep</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sdx55-pcie-ep</div><div class='add'>+      - qcom,sm8450-pcie-ep</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -35,33 +34,23 @@ properties:</div><div class='ctx'>       - const: mmio</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: PCIe Auxiliary clock</div><div class='del'>-      - description: PCIe CFG AHB clock</div><div class='del'>-      - description: PCIe Master AXI clock</div><div class='del'>-      - description: PCIe Slave AXI clock</div><div class='del'>-      - description: PCIe Slave Q2A AXI clock</div><div class='del'>-      - description: PCIe Sleep clock</div><div class='del'>-      - description: PCIe Reference clock</div><div class='add'>+    minItems: 7</div><div class='add'>+    maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: aux</div><div class='del'>-      - const: cfg</div><div class='del'>-      - const: bus_master</div><div class='del'>-      - const: bus_slave</div><div class='del'>-      - const: slave_q2a</div><div class='del'>-      - const: sleep</div><div class='del'>-      - const: ref</div><div class='add'>+    minItems: 7</div><div class='add'>+    maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   qcom,perst-regs:</div><div class='ctx'>     description: Reference to a syscon representing TCSR followed by the two</div><div class='ctx'>                  offsets within syscon for Perst enable and Perst separation</div><div class='ctx'>                  enable registers</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='del'>-      minItems: 3</div><div class='del'>-      maxItems: 3</div><div class='add'>+      - items:</div><div class='add'>+          - description: Syscon to TCSR system registers</div><div class='add'>+          - description: Perst enable offset</div><div class='add'>+          - description: Perst separation enable offset</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -105,7 +94,6 @@ required:</div><div class='ctx'>   - reg-names</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - qcom,perst-regs</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - interrupt-names</div><div class='ctx'>   - reset-gpios</div><div class='hunk'>@@ -113,6 +101,64 @@ required:</div><div class='ctx'>   - reset-names</div><div class='ctx'>   - power-domains</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pci-ep.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdx55-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: PCIe Auxiliary clock</div><div class='add'>+            - description: PCIe CFG AHB clock</div><div class='add'>+            - description: PCIe Master AXI clock</div><div class='add'>+            - description: PCIe Slave AXI clock</div><div class='add'>+            - description: PCIe Slave Q2A AXI clock</div><div class='add'>+            - description: PCIe Sleep clock</div><div class='add'>+            - description: PCIe Reference clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg</div><div class='add'>+            - const: bus_master</div><div class='add'>+            - const: bus_slave</div><div class='add'>+            - const: slave_q2a</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: ref</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8450-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: PCIe Auxiliary clock</div><div class='add'>+            - description: PCIe CFG AHB clock</div><div class='add'>+            - description: PCIe Master AXI clock</div><div class='add'>+            - description: PCIe Slave AXI clock</div><div class='add'>+            - description: PCIe Slave Q2A AXI clock</div><div class='add'>+            - description: PCIe Reference clock</div><div class='add'>+            - description: PCIe DDRSS SF TBU clock</div><div class='add'>+            - description: PCIe AGGRE NOC AXI clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg</div><div class='add'>+            - const: bus_master</div><div class='add'>+            - const: bus_slave</div><div class='add'>+            - const: slave_q2a</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: ddrss_sf_tbu</div><div class='add'>+            - const: aggre_noc_axi</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -120,7 +166,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,gcc-sdx55.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    pcie_ep: pcie-ep@40000000 {</div><div class='add'>+    pcie_ep: pcie-ep@1c00000 {</div><div class='ctx'>         compatible = "qcom,sdx55-pcie-ep";</div><div class='ctx'>         reg = &lt;0x01c00000 0x3000&gt;,</div><div class='ctx'>               &lt;0x40000000 0xf1d&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt<br/>deleted file mode 100644<br/>index 0adb56d5645e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/qcom,pcie.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/qcom,pcie.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,397 +0,0 @@</div><div class='del'>-* Qualcomm PCI express root complex</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Value should contain</div><div class='del'>-			- "qcom,pcie-ipq8064" for ipq8064</div><div class='del'>-			- "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065</div><div class='del'>-			- "qcom,pcie-apq8064" for apq8064</div><div class='del'>-			- "qcom,pcie-apq8084" for apq8084</div><div class='del'>-			- "qcom,pcie-msm8996" for msm8996 or apq8096</div><div class='del'>-			- "qcom,pcie-ipq4019" for ipq4019</div><div class='del'>-			- "qcom,pcie-ipq8074" for ipq8074</div><div class='del'>-			- "qcom,pcie-qcs404" for qcs404</div><div class='del'>-			- "qcom,pcie-sc8180x" for sc8180x</div><div class='del'>-			- "qcom,pcie-sdm845" for sdm845</div><div class='del'>-			- "qcom,pcie-sm8250" for sm8250</div><div class='del'>-			- "qcom,pcie-sm8450-pcie0" for PCIe0 on sm8450</div><div class='del'>-			- "qcom,pcie-sm8450-pcie1" for PCIe1 on sm8450</div><div class='del'>-			- "qcom,pcie-ipq6018" for ipq6018</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: Register ranges as listed in the reg-names property</div><div class='del'>-</div><div class='del'>-- reg-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Must include the following entries</div><div class='del'>-			- "parf"   Qualcomm specific registers</div><div class='del'>-			- "dbi"	   DesignWare PCIe registers</div><div class='del'>-			- "elbi"   External local bus interface registers</div><div class='del'>-			- "config" PCIe configuration space</div><div class='del'>-			- "atu"    ATU address space (optional)</div><div class='del'>-</div><div class='del'>-- device_type:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Should be "pci". As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-- #address-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Should be 3. As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-- #size-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Should be 2. As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-- ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: MSI interrupt</div><div class='del'>-</div><div class='del'>-- interrupt-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain "msi"</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Should be 1. As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-- interrupt-map-mask:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-- interrupt-map:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: As specified in snps,dw-pcie.yaml</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: List of phandle and clock specifier pairs as listed</div><div class='del'>-		    in clock-names property</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "iface"	Configuration AHB clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for ipq/apq8064</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "core"	Clocks the pcie hw block</div><div class='del'>-			- "phy"		Clocks the pcie PHY block</div><div class='del'>-			- "aux" 	Clocks the pcie AUX block</div><div class='del'>-			- "ref" 	Clocks the pcie ref block</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for apq8084/ipq4019</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "aux"		Auxiliary (AUX) clock</div><div class='del'>-			- "bus_master"	Master AXI clock</div><div class='del'>-			- "bus_slave"	Slave AXI clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for msm8996/apq8096</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "pipe"	Pipe Clock driving internal logic</div><div class='del'>-			- "aux"		Auxiliary (AUX) clock</div><div class='del'>-			- "cfg"		Configuration clock</div><div class='del'>-			- "bus_master"	Master AXI clock</div><div class='del'>-			- "bus_slave"	Slave AXI clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for ipq8074</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "iface"	PCIe to SysNOC BIU clock</div><div class='del'>-			- "axi_m"	AXI Master clock</div><div class='del'>-			- "axi_s"	AXI Slave clock</div><div class='del'>-			- "ahb"		AHB clock</div><div class='del'>-			- "aux"		Auxiliary clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for ipq6018</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "iface"	PCIe to SysNOC BIU clock</div><div class='del'>-			- "axi_m"	AXI Master clock</div><div class='del'>-			- "axi_s"	AXI Slave clock</div><div class='del'>-			- "axi_bridge"	AXI bridge clock</div><div class='del'>-			- "rchng"</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for qcs404</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "iface"	AHB clock</div><div class='del'>-			- "aux"		Auxiliary clock</div><div class='del'>-			- "master_bus"	AXI Master clock</div><div class='del'>-			- "slave_bus"	AXI Slave clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for sdm845</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "aux"		Auxiliary clock</div><div class='del'>-			- "cfg"		Configuration clock</div><div class='del'>-			- "bus_master"	Master AXI clock</div><div class='del'>-			- "bus_slave"	Slave AXI clock</div><div class='del'>-			- "slave_q2a"	Slave Q2A clock</div><div class='del'>-			- "tbu"		PCIe TBU clock</div><div class='del'>-			- "pipe"	PIPE clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for sc8180x and sm8250</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "aux"		Auxiliary clock</div><div class='del'>-			- "cfg"		Configuration clock</div><div class='del'>-			- "bus_master"	Master AXI clock</div><div class='del'>-			- "bus_slave"	Slave AXI clock</div><div class='del'>-			- "slave_q2a"	Slave Q2A clock</div><div class='del'>-			- "tbu"		PCIe TBU clock</div><div class='del'>-			- "ddrss_sf_tbu" PCIe SF TBU clock</div><div class='del'>-			- "pipe"	PIPE clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required for sm8450-pcie0 and sm8450-pcie1</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "aux"         Auxiliary clock</div><div class='del'>-			- "cfg"         Configuration clock</div><div class='del'>-			- "bus_master"  Master AXI clock</div><div class='del'>-			- "bus_slave"   Slave AXI clock</div><div class='del'>-			- "slave_q2a"   Slave Q2A clock</div><div class='del'>-			- "tbu"         PCIe TBU clock</div><div class='del'>-			- "ddrss_sf_tbu" PCIe SF TBU clock</div><div class='del'>-			- "pipe"        PIPE clock</div><div class='del'>-			- "pipe_mux"    PIPE MUX</div><div class='del'>-			- "phy_pipe"    PIPE output clock</div><div class='del'>-			- "ref"         REFERENCE clock</div><div class='del'>-			- "aggre0"	Aggre NoC PCIe0 AXI clock, only for sm8450-pcie0</div><div class='del'>-			- "aggre1"	Aggre NoC PCIe1 AXI clock</div><div class='del'>-</div><div class='del'>-- resets:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: List of phandle and reset specifier pairs as listed</div><div class='del'>-		    in reset-names property</div><div class='del'>-</div><div class='del'>-- reset-names:</div><div class='del'>-	Usage: required for ipq/apq8064</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "axi"  AXI reset</div><div class='del'>-			- "ahb"  AHB reset</div><div class='del'>-			- "por"  POR reset</div><div class='del'>-			- "pci"  PCI reset</div><div class='del'>-			- "phy"  PHY reset</div><div class='del'>-</div><div class='del'>-- reset-names:</div><div class='del'>-	Usage: required for apq8084</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "core" Core reset</div><div class='del'>-</div><div class='del'>-- reset-names:</div><div class='del'>-	Usage: required for ipq/apq8064</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "axi_m"		AXI master reset</div><div class='del'>-			- "axi_s"		AXI slave reset</div><div class='del'>-			- "pipe"		PIPE reset</div><div class='del'>-			- "axi_m_vmid"		VMID reset</div><div class='del'>-			- "axi_s_xpu"		XPU reset</div><div class='del'>-			- "parf"		PARF reset</div><div class='del'>-			- "phy"			PHY reset</div><div class='del'>-			- "axi_m_sticky"	AXI sticky reset</div><div class='del'>-			- "pipe_sticky"		PIPE sticky reset</div><div class='del'>-			- "pwr"			PWR reset</div><div class='del'>-			- "ahb"			AHB reset</div><div class='del'>-			- "phy_ahb"		PHY AHB reset</div><div class='del'>-			- "ext"			EXT reset</div><div class='del'>-</div><div class='del'>-- reset-names:</div><div class='del'>-	Usage: required for ipq8074</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "pipe"		PIPE reset</div><div class='del'>-			- "sleep"		Sleep reset</div><div class='del'>-			- "sticky"		Core Sticky reset</div><div class='del'>-			- "axi_m"		AXI Master reset</div><div class='del'>-			- "axi_s"		AXI Slave reset</div><div class='del'>-			- "ahb"			AHB Reset</div><div class='del'>-			- "axi_m_sticky"	AXI Master Sticky reset</div><div class='del'>-</div><div class='del'>-- reset-names:</div><div class='del'>-	Usage: required for ipq6018</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "pipe"		PIPE reset</div><div class='del'>-			- "sleep"		Sleep reset</div><div class='del'>-			- "sticky"		Core Sticky reset</div><div class='del'>-			- "axi_m"		AXI Master reset</div><div class='del'>-			- "axi_s"		AXI Slave reset</div><div class='del'>-			- "ahb"			AHB Reset</div><div class='del'>-			- "axi_m_sticky"	AXI Master Sticky reset</div><div class='del'>-			- "axi_s_sticky"	AXI Slave Sticky reset</div><div class='del'>-</div><div class='del'>-- reset-names:</div><div class='del'>-	Usage: required for qcs404</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "axi_m"		AXI Master reset</div><div class='del'>-			- "axi_s"		AXI Slave reset</div><div class='del'>-			- "axi_m_sticky"	AXI Master Sticky reset</div><div class='del'>-			- "pipe_sticky"		PIPE sticky reset</div><div class='del'>-			- "pwr"			PWR reset</div><div class='del'>-			- "ahb"			AHB reset</div><div class='del'>-</div><div class='del'>-- reset-names:</div><div class='del'>-	Usage: required for sc8180x, sdm845, sm8250 and sm8450</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain the following entries</div><div class='del'>-			- "pci"			PCIe core reset</div><div class='del'>-</div><div class='del'>-- power-domains:</div><div class='del'>-	Usage: required for apq8084 and msm8996/apq8096</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: A phandle and power domain specifier pair to the</div><div class='del'>-		    power domain which is responsible for collapsing</div><div class='del'>-		    and restoring power to the peripheral</div><div class='del'>-</div><div class='del'>-- vdda-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: A phandle to the core analog power supply</div><div class='del'>-</div><div class='del'>-- vdda_phy-supply:</div><div class='del'>-	Usage: required for ipq/apq8064</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: A phandle to the analog power supply for PHY</div><div class='del'>-</div><div class='del'>-- vdda_refclk-supply:</div><div class='del'>-	Usage: required for ipq/apq8064</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: A phandle to the analog power supply for IC which generates</div><div class='del'>-		    reference clock</div><div class='del'>-- vddpe-3v3-supply:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: A phandle to the PCIe endpoint power supply</div><div class='del'>-</div><div class='del'>-- phys:</div><div class='del'>-	Usage: required for apq8084 and qcs404</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: List of phandle(s) as listed in phy-names property</div><div class='del'>-</div><div class='del'>-- phy-names:</div><div class='del'>-	Usage: required for apq8084 and qcs404</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: Should contain "pciephy"</div><div class='del'>-</div><div class='del'>-- &lt;name&gt;-gpios:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: List of phandle and GPIO specifier pairs. Should contain</div><div class='del'>-			- "perst-gpios"	PCIe endpoint reset signal line</div><div class='del'>-			- "wake-gpios"	PCIe endpoint wake signal line</div><div class='del'>-</div><div class='del'>-* Example for ipq/apq8064</div><div class='del'>-	pcie@1b500000 {</div><div class='del'>-		compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie";</div><div class='del'>-		reg = &lt;0x1b500000 0x1000</div><div class='del'>-		       0x1b502000 0x80</div><div class='del'>-		       0x1b600000 0x100</div><div class='del'>-		       0x0ff00000 0x100000&gt;;</div><div class='del'>-		reg-names = "dbi", "elbi", "parf", "config";</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		linux,pci-domain = &lt;0&gt;;</div><div class='del'>-		bus-range = &lt;0x00 0xff&gt;;</div><div class='del'>-		num-lanes = &lt;1&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges = &lt;0x81000000 0 0 0x0fe00000 0 0x00100000   /* I/O */</div><div class='del'>-			  0x82000000 0 0 0x08000000 0 0x07e00000&gt;; /* memory */</div><div class='del'>-		interrupts = &lt;GIC_SPI 238 IRQ_TYPE_NONE&gt;;</div><div class='del'>-		interrupt-names = "msi";</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-		interrupt-map = &lt;0 0 0 1 &amp;intc 0 36 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-				&lt;0 0 0 2 &amp;intc 0 37 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-				&lt;0 0 0 3 &amp;intc 0 38 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-				&lt;0 0 0 4 &amp;intc 0 39 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='del'>-		clocks = &lt;&amp;gcc PCIE_A_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_H_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_PHY_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_AUX_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_ALT_REF_CLK&gt;;</div><div class='del'>-		clock-names = "core", "iface", "phy", "aux", "ref";</div><div class='del'>-		resets = &lt;&amp;gcc PCIE_ACLK_RESET&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_HCLK_RESET&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_POR_RESET&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_PCI_RESET&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_PHY_RESET&gt;,</div><div class='del'>-			 &lt;&amp;gcc PCIE_EXT_RESET&gt;;</div><div class='del'>-		reset-names = "axi", "ahb", "por", "pci", "phy", "ext";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pcie_pins_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-* Example for apq8084</div><div class='del'>-	pcie0@fc520000 {</div><div class='del'>-		compatible = "qcom,pcie-apq8084", "snps,dw-pcie";</div><div class='del'>-		reg = &lt;0xfc520000 0x2000&gt;,</div><div class='del'>-		      &lt;0xff000000 0x1000&gt;,</div><div class='del'>-		      &lt;0xff001000 0x1000&gt;,</div><div class='del'>-		      &lt;0xff002000 0x2000&gt;;</div><div class='del'>-		reg-names = "parf", "dbi", "elbi", "config";</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		linux,pci-domain = &lt;0&gt;;</div><div class='del'>-		bus-range = &lt;0x00 0xff&gt;;</div><div class='del'>-		num-lanes = &lt;1&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		ranges = &lt;0x81000000 0 0          0xff200000 0 0x00100000   /* I/O */</div><div class='del'>-			  0x82000000 0 0x00300000 0xff300000 0 0x00d00000&gt;; /* memory */</div><div class='del'>-		interrupts = &lt;GIC_SPI 243 IRQ_TYPE_NONE&gt;;</div><div class='del'>-		interrupt-names = "msi";</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='del'>-		interrupt-map = &lt;0 0 0 1 &amp;intc 0 244 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_a */</div><div class='del'>-				&lt;0 0 0 2 &amp;intc 0 245 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_b */</div><div class='del'>-				&lt;0 0 0 3 &amp;intc 0 247 IRQ_TYPE_LEVEL_HIGH&gt;, /* int_c */</div><div class='del'>-				&lt;0 0 0 4 &amp;intc 0 248 IRQ_TYPE_LEVEL_HIGH&gt;; /* int_d */</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_PCIE_0_CFG_AHB_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_PCIE_0_MSTR_AXI_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_PCIE_0_SLV_AXI_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_PCIE_0_AUX_CLK&gt;;</div><div class='del'>-		clock-names = "iface", "master_bus", "slave_bus", "aux";</div><div class='del'>-		resets = &lt;&amp;gcc GCC_PCIE_0_BCR&gt;;</div><div class='del'>-		reset-names = "core";</div><div class='del'>-		power-domains = &lt;&amp;gcc PCIE0_GDSC&gt;;</div><div class='del'>-		vdda-supply = &lt;&amp;pma8084_l3&gt;;</div><div class='del'>-		phys = &lt;&amp;pciephy0&gt;;</div><div class='del'>-		phy-names = "pciephy";</div><div class='del'>-		perst-gpio = &lt;&amp;tlmm 70 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		pinctrl-0 = &lt;&amp;pcie0_pins_default&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml<br/>new file mode 100644<br/>index 000000000000..81971be4e554<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/qcom,pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/qcom,pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,953 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/qcom,pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm PCI express root complex</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm PCIe root complex controller is based on the Synopsys DesignWare</div><div class='add'>+  PCIe IP.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,pcie-apq8064</div><div class='add'>+          - qcom,pcie-apq8084</div><div class='add'>+          - qcom,pcie-ipq4019</div><div class='add'>+          - qcom,pcie-ipq6018</div><div class='add'>+          - qcom,pcie-ipq8064</div><div class='add'>+          - qcom,pcie-ipq8064-v2</div><div class='add'>+          - qcom,pcie-ipq8074</div><div class='add'>+          - qcom,pcie-ipq8074-gen3</div><div class='add'>+          - qcom,pcie-msm8996</div><div class='add'>+          - qcom,pcie-qcs404</div><div class='add'>+          - qcom,pcie-sa8540p</div><div class='add'>+          - qcom,pcie-sc7280</div><div class='add'>+          - qcom,pcie-sc8180x</div><div class='add'>+          - qcom,pcie-sc8280xp</div><div class='add'>+          - qcom,pcie-sdm845</div><div class='add'>+          - qcom,pcie-sdx55</div><div class='add'>+          - qcom,pcie-sm8150</div><div class='add'>+          - qcom,pcie-sm8250</div><div class='add'>+          - qcom,pcie-sm8350</div><div class='add'>+          - qcom,pcie-sm8450-pcie0</div><div class='add'>+          - qcom,pcie-sm8450-pcie1</div><div class='add'>+          - qcom,pcie-sm8550</div><div class='add'>+      - items:</div><div class='add'>+          - const: qcom,pcie-msm8998</div><div class='add'>+          - const: qcom,pcie-msm8996</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  iommu-map:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  # Common definitions for clocks, clock-names and reset.</div><div class='add'>+  # Platform constraints are described later.</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 13</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 13</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pcie-mem</div><div class='add'>+      - const: cpu-pcie</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 12</div><div class='add'>+</div><div class='add'>+  resets-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 12</div><div class='add'>+</div><div class='add'>+  vdda-supply:</div><div class='add'>+    description: A phandle to the core analog power supply</div><div class='add'>+</div><div class='add'>+  vdda_phy-supply:</div><div class='add'>+    description: A phandle to the core analog power supply for PHY</div><div class='add'>+</div><div class='add'>+  vdda_refclk-supply:</div><div class='add'>+    description: A phandle to the core analog power supply for IC which generates reference clock</div><div class='add'>+</div><div class='add'>+  vddpe-3v3-supply:</div><div class='add'>+    description: A phandle to the PCIe endpoint power supply</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pciephy</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  perst-gpios:</div><div class='add'>+    description: GPIO controlled connection to PERST# signal</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wake-gpios:</div><div class='add'>+    description: GPIO controlled connection to WAKE# signal</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupt-map-mask</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+anyOf:</div><div class='add'>+  - required:</div><div class='add'>+      - interrupts</div><div class='add'>+      - interrupt-names</div><div class='add'>+      - "#interrupt-cells"</div><div class='add'>+  - required:</div><div class='add'>+      - msi-map</div><div class='add'>+      - msi-map-mask</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-apq8064</div><div class='add'>+              - qcom,pcie-ipq4019</div><div class='add'>+              - qcom,pcie-ipq8064</div><div class='add'>+              - qcom,pcie-ipq8064v2</div><div class='add'>+              - qcom,pcie-ipq8074</div><div class='add'>+              - qcom,pcie-qcs404</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: dbi # DesignWare PCIe registers</div><div class='add'>+            - const: elbi # External local bus interface registers</div><div class='add'>+            - const: parf # Qualcomm specific registers</div><div class='add'>+            - const: config # PCIe configuration space</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-ipq6018</div><div class='add'>+              - qcom,pcie-ipq8074-gen3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: dbi # DesignWare PCIe registers</div><div class='add'>+            - const: elbi # External local bus interface registers</div><div class='add'>+            - const: atu # ATU address space</div><div class='add'>+            - const: parf # Qualcomm specific registers</div><div class='add'>+            - const: config # PCIe configuration space</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-apq8084</div><div class='add'>+              - qcom,pcie-msm8996</div><div class='add'>+              - qcom,pcie-sdm845</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 5</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 4</div><div class='add'>+          items:</div><div class='add'>+            - const: parf # Qualcomm specific registers</div><div class='add'>+            - const: dbi # DesignWare PCIe registers</div><div class='add'>+            - const: elbi # External local bus interface registers</div><div class='add'>+            - const: config # PCIe configuration space</div><div class='add'>+            - const: mhi # MHI registers</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sc7280</div><div class='add'>+              - qcom,pcie-sc8180x</div><div class='add'>+              - qcom,pcie-sc8280xp</div><div class='add'>+              - qcom,pcie-sdx55</div><div class='add'>+              - qcom,pcie-sm8250</div><div class='add'>+              - qcom,pcie-sm8350</div><div class='add'>+              - qcom,pcie-sm8450-pcie0</div><div class='add'>+              - qcom,pcie-sm8450-pcie1</div><div class='add'>+              - qcom,pcie-sm8550</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 6</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+          items:</div><div class='add'>+            - const: parf # Qualcomm specific registers</div><div class='add'>+            - const: dbi # DesignWare PCIe registers</div><div class='add'>+            - const: elbi # External local bus interface registers</div><div class='add'>+            - const: atu # ATU address space</div><div class='add'>+            - const: config # PCIe configuration space</div><div class='add'>+            - const: mhi # MHI registers</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-apq8064</div><div class='add'>+              - qcom,pcie-ipq8064</div><div class='add'>+              - qcom,pcie-ipq8064v2</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+          items:</div><div class='add'>+            - const: core # Clocks the pcie hw block</div><div class='add'>+            - const: iface # Configuration AHB clock</div><div class='add'>+            - const: phy # Clocks the pcie PHY block</div><div class='add'>+            - const: aux # Clocks the pcie AUX block, not on apq8064</div><div class='add'>+            - const: ref # Clocks the pcie ref block, not on apq8064</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 6</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+          items:</div><div class='add'>+            - const: axi # AXI reset</div><div class='add'>+            - const: ahb # AHB reset</div><div class='add'>+            - const: por # POR reset</div><div class='add'>+            - const: pci # PCI reset</div><div class='add'>+            - const: phy # PHY reset</div><div class='add'>+            - const: ext # EXT reset, not on apq8064</div><div class='add'>+      required:</div><div class='add'>+        - vdda-supply</div><div class='add'>+        - vdda_phy-supply</div><div class='add'>+        - vdda_refclk-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-apq8084</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface # Configuration AHB clock</div><div class='add'>+            - const: master_bus # Master AXI clock</div><div class='add'>+            - const: slave_bus # Slave AXI clock</div><div class='add'>+            - const: aux # Auxiliary (AUX) clock</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core # Core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-ipq4019</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux # Auxiliary (AUX) clock</div><div class='add'>+            - const: master_bus # Master AXI clock</div><div class='add'>+            - const: slave_bus # Slave AXI clock</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 12</div><div class='add'>+          maxItems: 12</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: axi_m # AXI master reset</div><div class='add'>+            - const: axi_s # AXI slave reset</div><div class='add'>+            - const: pipe # PIPE reset</div><div class='add'>+            - const: axi_m_vmid # VMID reset</div><div class='add'>+            - const: axi_s_xpu # XPU reset</div><div class='add'>+            - const: parf # PARF reset</div><div class='add'>+            - const: phy # PHY reset</div><div class='add'>+            - const: axi_m_sticky # AXI sticky reset</div><div class='add'>+            - const: pipe_sticky # PIPE sticky reset</div><div class='add'>+            - const: pwr # PWR reset</div><div class='add'>+            - const: ahb # AHB reset</div><div class='add'>+            - const: phy_ahb # PHY AHB reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-msm8996</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pipe # Pipe Clock driving internal logic</div><div class='add'>+            - const: aux # Auxiliary (AUX) clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+        resets: false</div><div class='add'>+        reset-names: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-ipq8074</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface # PCIe to SysNOC BIU clock</div><div class='add'>+            - const: axi_m # AXI Master clock</div><div class='add'>+            - const: axi_s # AXI Slave clock</div><div class='add'>+            - const: ahb # AHB clock</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 7</div><div class='add'>+          maxItems: 7</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pipe # PIPE reset</div><div class='add'>+            - const: sleep # Sleep reset</div><div class='add'>+            - const: sticky # Core Sticky reset</div><div class='add'>+            - const: axi_m # AXI Master reset</div><div class='add'>+            - const: axi_s # AXI Slave reset</div><div class='add'>+            - const: ahb # AHB Reset</div><div class='add'>+            - const: axi_m_sticky # AXI Master Sticky reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-ipq6018</div><div class='add'>+              - qcom,pcie-ipq8074-gen3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface # PCIe to SysNOC BIU clock</div><div class='add'>+            - const: axi_m # AXI Master clock</div><div class='add'>+            - const: axi_s # AXI Slave clock</div><div class='add'>+            - const: axi_bridge # AXI bridge clock</div><div class='add'>+            - const: rchng</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 8</div><div class='add'>+          maxItems: 8</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pipe # PIPE reset</div><div class='add'>+            - const: sleep # Sleep reset</div><div class='add'>+            - const: sticky # Core Sticky reset</div><div class='add'>+            - const: axi_m # AXI Master reset</div><div class='add'>+            - const: axi_s # AXI Slave reset</div><div class='add'>+            - const: ahb # AHB Reset</div><div class='add'>+            - const: axi_m_sticky # AXI Master Sticky reset</div><div class='add'>+            - const: axi_s_sticky # AXI Slave Sticky reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-qcs404</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface # AHB clock</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: master_bus # AXI Master clock</div><div class='add'>+            - const: slave_bus # AXI Slave clock</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: axi_m # AXI Master reset</div><div class='add'>+            - const: axi_s # AXI Slave reset</div><div class='add'>+            - const: axi_m_sticky # AXI Master Sticky reset</div><div class='add'>+            - const: pipe_sticky # PIPE sticky reset</div><div class='add'>+            - const: pwr # PWR reset</div><div class='add'>+            - const: ahb # AHB reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sc7280</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 13</div><div class='add'>+          maxItems: 13</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pipe # PIPE clock</div><div class='add'>+            - const: pipe_mux # PIPE MUX</div><div class='add'>+            - const: phy_pipe # PIPE output clock</div><div class='add'>+            - const: ref # REFERENCE clock</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+            - const: slave_q2a # Slave Q2A clock</div><div class='add'>+            - const: tbu # PCIe TBU clock</div><div class='add'>+            - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+            - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock</div><div class='add'>+            - const: aggre1 # Aggre NoC PCIe1 AXI clock</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sdm845</div><div class='add'>+    then:</div><div class='add'>+      oneOf:</div><div class='add'>+          # Unfortunately the "optional" ref clock is used in the middle of the list</div><div class='add'>+        - properties:</div><div class='add'>+            clocks:</div><div class='add'>+              minItems: 8</div><div class='add'>+              maxItems: 8</div><div class='add'>+            clock-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: pipe # PIPE clock</div><div class='add'>+                - const: aux # Auxiliary clock</div><div class='add'>+                - const: cfg # Configuration clock</div><div class='add'>+                - const: bus_master # Master AXI clock</div><div class='add'>+                - const: bus_slave # Slave AXI clock</div><div class='add'>+                - const: slave_q2a # Slave Q2A clock</div><div class='add'>+                - const: ref # REFERENCE clock</div><div class='add'>+                - const: tbu # PCIe TBU clock</div><div class='add'>+        - properties:</div><div class='add'>+            clocks:</div><div class='add'>+              minItems: 7</div><div class='add'>+              maxItems: 7</div><div class='add'>+            clock-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: pipe # PIPE clock</div><div class='add'>+                - const: aux # Auxiliary clock</div><div class='add'>+                - const: cfg # Configuration clock</div><div class='add'>+                - const: bus_master # Master AXI clock</div><div class='add'>+                - const: bus_slave # Slave AXI clock</div><div class='add'>+                - const: slave_q2a # Slave Q2A clock</div><div class='add'>+                - const: tbu # PCIe TBU clock</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sc8180x</div><div class='add'>+              - qcom,pcie-sm8150</div><div class='add'>+              - qcom,pcie-sm8250</div><div class='add'>+    then:</div><div class='add'>+      oneOf:</div><div class='add'>+          # Unfortunately the "optional" ref clock is used in the middle of the list</div><div class='add'>+        - properties:</div><div class='add'>+            clocks:</div><div class='add'>+              minItems: 9</div><div class='add'>+              maxItems: 9</div><div class='add'>+            clock-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: pipe # PIPE clock</div><div class='add'>+                - const: aux # Auxiliary clock</div><div class='add'>+                - const: cfg # Configuration clock</div><div class='add'>+                - const: bus_master # Master AXI clock</div><div class='add'>+                - const: bus_slave # Slave AXI clock</div><div class='add'>+                - const: slave_q2a # Slave Q2A clock</div><div class='add'>+                - const: ref # REFERENCE clock</div><div class='add'>+                - const: tbu # PCIe TBU clock</div><div class='add'>+                - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+        - properties:</div><div class='add'>+            clocks:</div><div class='add'>+              minItems: 8</div><div class='add'>+              maxItems: 8</div><div class='add'>+            clock-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: pipe # PIPE clock</div><div class='add'>+                - const: aux # Auxiliary clock</div><div class='add'>+                - const: cfg # Configuration clock</div><div class='add'>+                - const: bus_master # Master AXI clock</div><div class='add'>+                - const: bus_slave # Slave AXI clock</div><div class='add'>+                - const: slave_q2a # Slave Q2A clock</div><div class='add'>+                - const: tbu # PCIe TBU clock</div><div class='add'>+                - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sm8350</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 8</div><div class='add'>+          maxItems: 9</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 8</div><div class='add'>+          items:</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+            - const: slave_q2a # Slave Q2A clock</div><div class='add'>+            - const: tbu # PCIe TBU clock</div><div class='add'>+            - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+            - const: aggre1 # Aggre NoC PCIe1 AXI clock</div><div class='add'>+            - const: aggre0 # Aggre NoC PCIe0 AXI clock</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sm8450-pcie0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 12</div><div class='add'>+          maxItems: 12</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pipe # PIPE clock</div><div class='add'>+            - const: pipe_mux # PIPE MUX</div><div class='add'>+            - const: phy_pipe # PIPE output clock</div><div class='add'>+            - const: ref # REFERENCE clock</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+            - const: slave_q2a # Slave Q2A clock</div><div class='add'>+            - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+            - const: aggre0 # Aggre NoC PCIe0 AXI clock</div><div class='add'>+            - const: aggre1 # Aggre NoC PCIe1 AXI clock</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sm8450-pcie1</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 11</div><div class='add'>+          maxItems: 11</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pipe # PIPE clock</div><div class='add'>+            - const: pipe_mux # PIPE MUX</div><div class='add'>+            - const: phy_pipe # PIPE output clock</div><div class='add'>+            - const: ref # REFERENCE clock</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+            - const: slave_q2a # Slave Q2A clock</div><div class='add'>+            - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+            - const: aggre1 # Aggre NoC PCIe1 AXI clock</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sm8550</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 7</div><div class='add'>+          maxItems: 8</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 7</div><div class='add'>+          items:</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+            - const: slave_q2a # Slave Q2A clock</div><div class='add'>+            - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+            - const: noc_aggr # Aggre NoC PCIe AXI clock</div><div class='add'>+            - const: cnoc_sf_axi # Config NoC PCIe1 AXI clock</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+            - const: link_down # PCIe link down reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sa8540p</div><div class='add'>+              - qcom,pcie-sc8280xp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 8</div><div class='add'>+          maxItems: 9</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 8</div><div class='add'>+          items:</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+            - const: slave_q2a # Slave Q2A clock</div><div class='add'>+            - const: ddrss_sf_tbu # PCIe SF TBU clock</div><div class='add'>+            - const: noc_aggr_4 # NoC aggregate 4 clock</div><div class='add'>+            - const: noc_aggr_south_sf # NoC aggregate South SF clock</div><div class='add'>+            - const: cnoc_qx # Configuration NoC QX clock</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sdx55</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 7</div><div class='add'>+          maxItems: 7</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pipe # PIPE clock</div><div class='add'>+            - const: aux # Auxiliary clock</div><div class='add'>+            - const: cfg # Configuration clock</div><div class='add'>+            - const: bus_master # Master AXI clock</div><div class='add'>+            - const: bus_slave # Slave AXI clock</div><div class='add'>+            - const: slave_q2a # Slave Q2A clock</div><div class='add'>+            - const: sleep # PCIe Sleep clock</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pci # PCIe core reset</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sa8540p</div><div class='add'>+              - qcom,pcie-sc8280xp</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interconnects</div><div class='add'>+        - interconnect-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - qcom,pcie-apq8064</div><div class='add'>+                - qcom,pcie-ipq4019</div><div class='add'>+                - qcom,pcie-ipq8064</div><div class='add'>+                - qcom,pcie-ipq8064v2</div><div class='add'>+                - qcom,pcie-ipq8074</div><div class='add'>+                - qcom,pcie-ipq8074-gen3</div><div class='add'>+                - qcom,pcie-qcs404</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - qcom,pcie-msm8996</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+        - reset-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-msm8996</div><div class='add'>+              - qcom,pcie-sc7280</div><div class='add'>+              - qcom,pcie-sc8180x</div><div class='add'>+              - qcom,pcie-sdm845</div><div class='add'>+              - qcom,pcie-sm8150</div><div class='add'>+              - qcom,pcie-sm8250</div><div class='add'>+              - qcom,pcie-sm8350</div><div class='add'>+              - qcom,pcie-sm8450-pcie0</div><div class='add'>+              - qcom,pcie-sm8450-pcie1</div><div class='add'>+              - qcom,pcie-sm8550</div><div class='add'>+    then:</div><div class='add'>+      oneOf:</div><div class='add'>+        - properties:</div><div class='add'>+            interrupts:</div><div class='add'>+              maxItems: 1</div><div class='add'>+            interrupt-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: msi</div><div class='add'>+        - properties:</div><div class='add'>+            interrupts:</div><div class='add'>+              minItems: 8</div><div class='add'>+            interrupt-names:</div><div class='add'>+              items:</div><div class='add'>+                - const: msi0</div><div class='add'>+                - const: msi1</div><div class='add'>+                - const: msi2</div><div class='add'>+                - const: msi3</div><div class='add'>+                - const: msi4</div><div class='add'>+                - const: msi5</div><div class='add'>+                - const: msi6</div><div class='add'>+                - const: msi7</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-sc8280xp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: msi0</div><div class='add'>+            - const: msi1</div><div class='add'>+            - const: msi2</div><div class='add'>+            - const: msi3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pcie-apq8064</div><div class='add'>+              - qcom,pcie-apq8084</div><div class='add'>+              - qcom,pcie-ipq4019</div><div class='add'>+              - qcom,pcie-ipq6018</div><div class='add'>+              - qcom,pcie-ipq8064</div><div class='add'>+              - qcom,pcie-ipq8064-v2</div><div class='add'>+              - qcom,pcie-ipq8074</div><div class='add'>+              - qcom,pcie-ipq8074-gen3</div><div class='add'>+              - qcom,pcie-qcs404</div><div class='add'>+              - qcom,pcie-sa8540p</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: msi</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pcie@1b500000 {</div><div class='add'>+      compatible = "qcom,pcie-ipq8064";</div><div class='add'>+      reg = &lt;0x1b500000 0x1000&gt;,</div><div class='add'>+            &lt;0x1b502000 0x80&gt;,</div><div class='add'>+            &lt;0x1b600000 0x100&gt;,</div><div class='add'>+            &lt;0x0ff00000 0x100000&gt;;</div><div class='add'>+      reg-names = "dbi", "elbi", "parf", "config";</div><div class='add'>+      device_type = "pci";</div><div class='add'>+      linux,pci-domain = &lt;0&gt;;</div><div class='add'>+      bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+      num-lanes = &lt;1&gt;;</div><div class='add'>+      #address-cells = &lt;3&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      ranges = &lt;0x81000000 0 0 0x0fe00000 0 0x00100000&gt;,</div><div class='add'>+               &lt;0x82000000 0 0 0x08000000 0 0x07e00000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "msi";</div><div class='add'>+      #interrupt-cells = &lt;1&gt;;</div><div class='add'>+      interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+      interrupt-map = &lt;0 0 0 1 &amp;intc 0 36 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                      &lt;0 0 0 2 &amp;intc 0 37 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                      &lt;0 0 0 3 &amp;intc 0 38 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                      &lt;0 0 0 4 &amp;intc 0 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc 41&gt;,</div><div class='add'>+               &lt;&amp;gcc 43&gt;,</div><div class='add'>+               &lt;&amp;gcc 44&gt;,</div><div class='add'>+               &lt;&amp;gcc 42&gt;,</div><div class='add'>+               &lt;&amp;gcc 248&gt;;</div><div class='add'>+      clock-names = "core", "iface", "phy", "aux", "ref";</div><div class='add'>+      resets = &lt;&amp;gcc 27&gt;,</div><div class='add'>+               &lt;&amp;gcc 26&gt;,</div><div class='add'>+               &lt;&amp;gcc 25&gt;,</div><div class='add'>+               &lt;&amp;gcc 24&gt;,</div><div class='add'>+               &lt;&amp;gcc 23&gt;,</div><div class='add'>+               &lt;&amp;gcc 22&gt;;</div><div class='add'>+      reset-names = "axi", "ahb", "por", "pci", "phy", "ext";</div><div class='add'>+      pinctrl-0 = &lt;&amp;pcie_pins_default&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      vdda-supply = &lt;&amp;pm8921_s3&gt;;</div><div class='add'>+      vdda_phy-supply = &lt;&amp;pm8921_lvs6&gt;;</div><div class='add'>+      vdda_refclk-supply = &lt;&amp;ext_3p3v&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    pcie@fc520000 {</div><div class='add'>+      compatible = "qcom,pcie-apq8084";</div><div class='add'>+      reg = &lt;0xfc520000 0x2000&gt;,</div><div class='add'>+            &lt;0xff000000 0x1000&gt;,</div><div class='add'>+            &lt;0xff001000 0x1000&gt;,</div><div class='add'>+            &lt;0xff002000 0x2000&gt;;</div><div class='add'>+      reg-names = "parf", "dbi", "elbi", "config";</div><div class='add'>+      device_type = "pci";</div><div class='add'>+      linux,pci-domain = &lt;0&gt;;</div><div class='add'>+      bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+      num-lanes = &lt;1&gt;;</div><div class='add'>+      #address-cells = &lt;3&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      ranges = &lt;0x81000000 0 0          0xff200000 0 0x00100000&gt;,</div><div class='add'>+               &lt;0x82000000 0 0x00300000 0xff300000 0 0x00d00000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "msi";</div><div class='add'>+      #interrupt-cells = &lt;1&gt;;</div><div class='add'>+      interrupt-map-mask = &lt;0 0 0 0x7&gt;;</div><div class='add'>+      interrupt-map = &lt;0 0 0 1 &amp;intc 0 244 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                      &lt;0 0 0 2 &amp;intc 0 245 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                      &lt;0 0 0 3 &amp;intc 0 247 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                      &lt;0 0 0 4 &amp;intc 0 248 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc 324&gt;,</div><div class='add'>+               &lt;&amp;gcc 325&gt;,</div><div class='add'>+               &lt;&amp;gcc 327&gt;,</div><div class='add'>+               &lt;&amp;gcc 323&gt;;</div><div class='add'>+      clock-names = "iface", "master_bus", "slave_bus", "aux";</div><div class='add'>+      resets = &lt;&amp;gcc 81&gt;;</div><div class='add'>+      reset-names = "core";</div><div class='add'>+      power-domains = &lt;&amp;gcc 1&gt;;</div><div class='add'>+      vdda-supply = &lt;&amp;pma8084_l3&gt;;</div><div class='add'>+      phys = &lt;&amp;pciephy0&gt;;</div><div class='add'>+      phy-names = "pciephy";</div><div class='add'>+      perst-gpios = &lt;&amp;tlmm 70 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      pinctrl-0 = &lt;&amp;pcie0_pins_default&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml b/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml<br/>new file mode 100644<br/>index 000000000000..5a0d64d3ae6b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/renesas,pci-rcar-gen2.yaml</a></div><div class='hunk'>@@ -0,0 +1,186 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/renesas,pci-rcar-gen2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas AHB to PCI bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;</div><div class='add'>+  - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This is the bridge used internally to connect the USB controllers to the</div><div class='add'>+  AHB. There is one bridge instance per USB port connected to the internal</div><div class='add'>+  OHCI and EHCI controllers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,pci-r8a7742      # RZ/G1H</div><div class='add'>+              - renesas,pci-r8a7743      # RZ/G1M</div><div class='add'>+              - renesas,pci-r8a7744      # RZ/G1N</div><div class='add'>+              - renesas,pci-r8a7745      # RZ/G1E</div><div class='add'>+              - renesas,pci-r8a7790      # R-Car H2</div><div class='add'>+              - renesas,pci-r8a7791      # R-Car M2-W</div><div class='add'>+              - renesas,pci-r8a7793      # R-Car M2-N</div><div class='add'>+              - renesas,pci-r8a7794      # R-Car E2</div><div class='add'>+          - const: renesas,pci-rcar-gen2 # R-Car Gen2 and RZ/G1</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,pci-r9a06g032     # RZ/N1D</div><div class='add'>+          - const: renesas,pci-rzn1       # RZ/N1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Operational registers for the OHCI/EHCI controllers.</div><div class='add'>+      - description: Bridge configuration and control registers.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks: true</div><div class='add'>+</div><div class='add'>+  clock-names: true</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  bus-range:</div><div class='add'>+    description: |</div><div class='add'>+      The PCI bus number range; as this is a single bus, the range</div><div class='add'>+      should be specified as the same value twice.</div><div class='add'>+</div><div class='add'>+  dma-ranges:</div><div class='add'>+    description: |</div><div class='add'>+      A single range for the inbound memory region. If not supplied,</div><div class='add'>+      defaults to 1GiB at 0x40000000. Note there are hardware restrictions on</div><div class='add'>+      the allowed combinations of address and size.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^usb@[0-1],0$':</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    description:</div><div class='add'>+      This a USB controller PCI device</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description:</div><div class='add'>+          Identify the correct bus, device and function number in the</div><div class='add'>+          form &lt;bdf 0 0 0 0&gt;.</div><div class='add'>+</div><div class='add'>+        items:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+</div><div class='add'>+      phys:</div><div class='add'>+        description:</div><div class='add'>+          Reference to the USB phy</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      phy-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - phys</div><div class='add'>+      - phy-names</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - interrupt-map-mask</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - bus-range</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,pci-rzn1</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Internal bus clock (AHB) for HOST</div><div class='add'>+            - description: Internal bus clock (AHB) Power Management</div><div class='add'>+            - description: PCI clock for USB subsystem</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hclkh</div><div class='add'>+            - const: hclkpm</div><div class='add'>+            - const: pciclk</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Device clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pclk</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a7790-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/r8a7790-sysc.h&gt;</div><div class='add'>+</div><div class='add'>+    pci@ee090000  {</div><div class='add'>+        compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";</div><div class='add'>+        device_type = "pci";</div><div class='add'>+        reg = &lt;0xee090000 0xc00&gt;,</div><div class='add'>+              &lt;0xee080000 0x1100&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 703&gt;;</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 703&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        bus-range = &lt;0 0&gt;;</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x02000000 0 0xee080000 0xee080000 0 0x00010000&gt;;</div><div class='add'>+        dma-ranges = &lt;0x42000000 0 0x40000000 0x40000000 0 0x40000000&gt;;</div><div class='add'>+        interrupt-map-mask = &lt;0xf800 0 0 0x7&gt;;</div><div class='add'>+        interrupt-map = &lt;0x0000 0 0 1 &amp;gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                        &lt;0x0800 0 0 1 &amp;gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                        &lt;0x1000 0 0 2 &amp;gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        usb@1,0 {</div><div class='add'>+            reg = &lt;0x800 0 0 0 0&gt;;</div><div class='add'>+            phys = &lt;&amp;usb0 0&gt;;</div><div class='add'>+            phy-names = "usb";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        usb@2,0 {</div><div class='add'>+            reg = &lt;0x1000 0 0 0 0&gt;;</div><div class='add'>+            phys = &lt;&amp;usb0 0&gt;;</div><div class='add'>+            phy-names = "usb";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml<br/>new file mode 100644<br/>index 000000000000..a8574f8a84a3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip AXI PCIe Bridge Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shawn Lin &lt;shawn.lin@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aclk</div><div class='add'>+      - const: aclk-perf</div><div class='add'>+      - const: hclk</div><div class='add'>+      - const: pm</div><div class='add'>+</div><div class='add'>+  num-lanes:</div><div class='add'>+    maximum: 4</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    oneOf:</div><div class='add'>+      - maxItems: 1</div><div class='add'>+      - maxItems: 4</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: pcie-phy</div><div class='add'>+      - items:</div><div class='add'>+          - const: pcie-phy-0</div><div class='add'>+          - const: pcie-phy-1</div><div class='add'>+          - const: pcie-phy-2</div><div class='add'>+          - const: pcie-phy-3</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: mgmt</div><div class='add'>+      - const: mgmt-sticky</div><div class='add'>+      - const: pipe</div><div class='add'>+      - const: pm</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: aclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml<br/>new file mode 100644<br/>index 000000000000..88386a6d7011<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip AXI PCIe Endpoint</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shawn Lin &lt;shawn.lin@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-ep.yaml#</div><div class='add'>+  - $ref: rockchip,rk3399-pcie-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rockchip,rk3399-pcie-ep</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb-base</div><div class='add'>+      - const: mem-base</div><div class='add'>+</div><div class='add'>+  rockchip,max-outbound-regions:</div><div class='add'>+    description: Maximum number of outbound regions</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 32</div><div class='add'>+    default: 32</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - rockchip,max-outbound-regions</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pcie-ep@f8000000 {</div><div class='add'>+            compatible = "rockchip,rk3399-pcie-ep";</div><div class='add'>+            reg = &lt;0x0 0xfd000000 0x0 0x1000000&gt;, &lt;0x0 0x80000000 0x0 0x20000&gt;;</div><div class='add'>+            reg-names = "apb-base", "mem-base";</div><div class='add'>+            clocks = &lt;&amp;cru ACLK_PCIE&gt;, &lt;&amp;cru ACLK_PERF_PCIE&gt;,</div><div class='add'>+              &lt;&amp;cru PCLK_PCIE&gt;, &lt;&amp;cru SCLK_PCIE_PM&gt;;</div><div class='add'>+            clock-names = "aclk", "aclk-perf",</div><div class='add'>+                    "hclk", "pm";</div><div class='add'>+            max-functions = /bits/ 8 &lt;8&gt;;</div><div class='add'>+            num-lanes = &lt;4&gt;;</div><div class='add'>+            resets = &lt;&amp;cru SRST_PCIE_CORE&gt;, &lt;&amp;cru SRST_PCIE_MGMT&gt;,</div><div class='add'>+              &lt;&amp;cru SRST_PCIE_MGMT_STICKY&gt;, &lt;&amp;cru SRST_PCIE_PIPE&gt; ,</div><div class='add'>+              &lt;&amp;cru SRST_PCIE_PM&gt;, &lt;&amp;cru SRST_P_PCIE&gt;, &lt;&amp;cru SRST_A_PCIE&gt;;</div><div class='add'>+            reset-names = "core", "mgmt", "mgmt-sticky", "pipe",</div><div class='add'>+                    "pm", "pclk", "aclk";</div><div class='add'>+            phys = &lt;&amp;pcie_phy 0&gt;, &lt;&amp;pcie_phy 1&gt;, &lt;&amp;pcie_phy 2&gt;, &lt;&amp;pcie_phy 3&gt;;</div><div class='add'>+            phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3";</div><div class='add'>+            rockchip,max-outbound-regions = &lt;16&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml<br/>new file mode 100644<br/>index 000000000000..531008f0b6ac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip AXI PCIe Root Port Bridge Host</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shawn Lin &lt;shawn.lin@rock-chips.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+  - $ref: rockchip,rk3399-pcie-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rockchip,rk3399-pcie</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: axi-base</div><div class='add'>+      - const: apb-base</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: sys</div><div class='add'>+      - const: legacy</div><div class='add'>+      - const: client</div><div class='add'>+</div><div class='add'>+  aspm-no-l0s:</div><div class='add'>+    description: This property is needed if using 24MHz OSC for RC's PHY.</div><div class='add'>+</div><div class='add'>+  ep-gpios:</div><div class='add'>+    description: pre-reset GPIO</div><div class='add'>+</div><div class='add'>+  vpcie12v-supply:</div><div class='add'>+    description: The 12v regulator to use for PCIe.</div><div class='add'>+</div><div class='add'>+  vpcie3v3-supply:</div><div class='add'>+    description: The 3.3v regulator to use for PCIe.</div><div class='add'>+</div><div class='add'>+  vpcie1v8-supply:</div><div class='add'>+    description: The 1.8v regulator to use for PCIe.</div><div class='add'>+</div><div class='add'>+  vpcie0v9-supply:</div><div class='add'>+    description: The 0.9v regulator to use for PCIe.</div><div class='add'>+</div><div class='add'>+  interrupt-controller:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      '#interrupt-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      interrupt-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - ranges</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - interrupt-map-mask</div><div class='add'>+  - msi-map</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pcie@f8000000 {</div><div class='add'>+            compatible = "rockchip,rk3399-pcie";</div><div class='add'>+            device_type = "pci";</div><div class='add'>+            #address-cells = &lt;3&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            clocks = &lt;&amp;cru ACLK_PCIE&gt;, &lt;&amp;cru ACLK_PERF_PCIE&gt;,</div><div class='add'>+              &lt;&amp;cru PCLK_PCIE&gt;, &lt;&amp;cru SCLK_PCIE_PM&gt;;</div><div class='add'>+            clock-names = "aclk", "aclk-perf",</div><div class='add'>+                    "hclk", "pm";</div><div class='add'>+            interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+                  &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='add'>+                  &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+            interrupt-names = "sys", "legacy", "client";</div><div class='add'>+            ep-gpios = &lt;&amp;gpio3 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            ranges = &lt;0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000</div><div class='add'>+                0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000&gt;;</div><div class='add'>+            num-lanes = &lt;4&gt;;</div><div class='add'>+            msi-map = &lt;0x0 &amp;its 0x0 0x1000&gt;;</div><div class='add'>+            reg = &lt;0x0 0xf8000000 0x0 0x2000000&gt;, &lt;0x0 0xfd000000 0x0 0x1000000&gt;;</div><div class='add'>+            reg-names = "axi-base", "apb-base";</div><div class='add'>+            resets = &lt;&amp;cru SRST_PCIE_CORE&gt;, &lt;&amp;cru SRST_PCIE_MGMT&gt;,</div><div class='add'>+              &lt;&amp;cru SRST_PCIE_MGMT_STICKY&gt;, &lt;&amp;cru SRST_PCIE_PIPE&gt; ,</div><div class='add'>+              &lt;&amp;cru SRST_PCIE_PM&gt;, &lt;&amp;cru SRST_P_PCIE&gt;, &lt;&amp;cru SRST_A_PCIE&gt;;</div><div class='add'>+            reset-names = "core", "mgmt", "mgmt-sticky", "pipe",</div><div class='add'>+                    "pm", "pclk", "aclk";</div><div class='add'>+            /* deprecated legacy PHY model */</div><div class='add'>+            phys = &lt;&amp;pcie_phy&gt;;</div><div class='add'>+            phy-names = "pcie-phy";</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;pcie_clkreq&gt;;</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+            interrupt-map = &lt;0 0 0 1 &amp;pcie0_intc 0&gt;,</div><div class='add'>+                &lt;0 0 0 2 &amp;pcie0_intc 1&gt;,</div><div class='add'>+                &lt;0 0 0 3 &amp;pcie0_intc 2&gt;,</div><div class='add'>+                &lt;0 0 0 4 &amp;pcie0_intc 3&gt;;</div><div class='add'>+</div><div class='add'>+            pcie0_intc: interrupt-controller {</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #address-cells = &lt;0&gt;;</div><div class='add'>+                #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml<br/>index 142bbe577763..24c88942e59e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml</a></div><div class='hunk'>@@ -14,25 +14,19 @@ maintainers:</div><div class='ctx'> description: |+</div><div class='ctx'>   RK3568 SoC PCIe host controller is based on the Synopsys DesignWare</div><div class='ctx'>   PCIe IP and thus inherits all the common properties defined in</div><div class='del'>-  designware-pcie.txt.</div><div class='add'>+  snps,dw-pcie.yaml.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='del'>-</div><div class='del'>-# We need a select here so we don't match all nodes with 'snps,dw-pcie'</div><div class='del'>-select:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: rockchip,rk3568-pcie</div><div class='del'>-  required:</div><div class='del'>-    - compatible</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='add'>+    oneOf:</div><div class='ctx'>       - const: rockchip,rk3568-pcie</div><div class='del'>-      - const: snps,dw-pcie</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - rockchip,rk3588-pcie</div><div class='add'>+          - const: rockchip,rk3568-pcie</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -110,7 +104,7 @@ examples:</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>         pcie3x2: pcie@fe280000 {</div><div class='del'>-            compatible = "rockchip,rk3568-pcie", "snps,dw-pcie";</div><div class='add'>+            compatible = "rockchip,rk3568-pcie";</div><div class='ctx'>             reg = &lt;0x3 0xc0800000 0x0 0x390000&gt;,</div><div class='ctx'>                   &lt;0x0 0xfe280000 0x0 0x10000&gt;,</div><div class='ctx'>                   &lt;0x3 0x80000000 0x0 0x100000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt<br/>deleted file mode 100644<br/>index 778467307a93..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,62 +0,0 @@</div><div class='del'>-* Rockchip AXI PCIe Endpoint Controller DT description</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should contain "rockchip,rk3399-pcie-ep"</div><div class='del'>-- reg: Two register ranges as listed in the reg-names property</div><div class='del'>-- reg-names: Must include the following names</div><div class='del'>-	- "apb-base"</div><div class='del'>-	- "mem-base"</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-		See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names: Must include the following entries:</div><div class='del'>-	- "aclk"</div><div class='del'>-	- "aclk-perf"</div><div class='del'>-	- "hclk"</div><div class='del'>-	- "pm"</div><div class='del'>-- resets: Must contain seven entries for each entry in reset-names.</div><div class='del'>-	   See ../reset/reset.txt for details.</div><div class='del'>-- reset-names: Must include the following names</div><div class='del'>-	- "core"</div><div class='del'>-	- "mgmt"</div><div class='del'>-	- "mgmt-sticky"</div><div class='del'>-	- "pipe"</div><div class='del'>-	- "pm"</div><div class='del'>-	- "aclk"</div><div class='del'>-	- "pclk"</div><div class='del'>-- pinctrl-names : The pin control state names</div><div class='del'>-- pinctrl-0: The "default" pinctrl state</div><div class='del'>-- phys: Must contain an phandle to a PHY for each entry in phy-names.</div><div class='del'>-- phy-names: Must include 4 entries for all 4 lanes even if some of</div><div class='del'>-  them won't be used for your cases. Entries are of the form "pcie-phy-N":</div><div class='del'>-  where N ranges from 0 to 3.</div><div class='del'>-  (see example below and you MUST also refer to ../phy/rockchip-pcie-phy.txt</div><div class='del'>-  for changing the #phy-cells of phy node to support it)</div><div class='del'>-- rockchip,max-outbound-regions: Maximum number of outbound regions</div><div class='del'>-</div><div class='del'>-Optional Property:</div><div class='del'>-- num-lanes: number of lanes to use</div><div class='del'>-- max-functions: Maximum number of functions that can be configured (default 1).</div><div class='del'>-</div><div class='del'>-pcie0-ep: pcie@f8000000 {</div><div class='del'>-	compatible = "rockchip,rk3399-pcie-ep";</div><div class='del'>-	#address-cells = &lt;3&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='del'>-	rockchip,max-outbound-regions = &lt;16&gt;;</div><div class='del'>-	clocks = &lt;&amp;cru ACLK_PCIE&gt;, &lt;&amp;cru ACLK_PERF_PCIE&gt;,</div><div class='del'>-		 &lt;&amp;cru PCLK_PCIE&gt;, &lt;&amp;cru SCLK_PCIE_PM&gt;;</div><div class='del'>-	clock-names = "aclk", "aclk-perf",</div><div class='del'>-		      "hclk", "pm";</div><div class='del'>-	max-functions = /bits/ 8 &lt;8&gt;;</div><div class='del'>-	num-lanes = &lt;4&gt;;</div><div class='del'>-	reg = &lt;0x0 0xfd000000 0x0 0x1000000&gt;, &lt;0x0 0x80000000 0x0 0x20000&gt;;</div><div class='del'>-	reg-names = "apb-base", "mem-base";</div><div class='del'>-	resets = &lt;&amp;cru SRST_PCIE_CORE&gt;, &lt;&amp;cru SRST_PCIE_MGMT&gt;,</div><div class='del'>-		 &lt;&amp;cru SRST_PCIE_MGMT_STICKY&gt;, &lt;&amp;cru SRST_PCIE_PIPE&gt; ,</div><div class='del'>-		 &lt;&amp;cru SRST_PCIE_PM&gt;, &lt;&amp;cru SRST_P_PCIE&gt;, &lt;&amp;cru SRST_A_PCIE&gt;;</div><div class='del'>-	reset-names = "core", "mgmt", "mgmt-sticky", "pipe",</div><div class='del'>-		      "pm", "pclk", "aclk";</div><div class='del'>-	phys = &lt;&amp;pcie_phy 0&gt;, &lt;&amp;pcie_phy 1&gt;, &lt;&amp;pcie_phy 2&gt;, &lt;&amp;pcie_phy 3&gt;;</div><div class='del'>-	phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie_clkreq&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt<br/>deleted file mode 100644<br/>index af34c65773fd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,135 +0,0 @@</div><div class='del'>-* Rockchip AXI PCIe Root Port Bridge DT description</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- #address-cells: Address representation for root ports, set to &lt;3&gt;</div><div class='del'>-- #size-cells: Size representation for root ports, set to &lt;2&gt;</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-		interrupt source. The value must be 1.</div><div class='del'>-- compatible: Should contain "rockchip,rk3399-pcie"</div><div class='del'>-- reg: Two register ranges as listed in the reg-names property</div><div class='del'>-- reg-names: Must include the following names</div><div class='del'>-	- "axi-base"</div><div class='del'>-	- "apb-base"</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-		See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names: Must include the following entries:</div><div class='del'>-	- "aclk"</div><div class='del'>-	- "aclk-perf"</div><div class='del'>-	- "hclk"</div><div class='del'>-	- "pm"</div><div class='del'>-- msi-map: Maps a Requester ID to an MSI controller and associated</div><div class='del'>-	msi-specifier data. See ./pci-msi.txt</div><div class='del'>-- interrupts: Three interrupt entries must be specified.</div><div class='del'>-- interrupt-names: Must include the following names</div><div class='del'>-	- "sys"</div><div class='del'>-	- "legacy"</div><div class='del'>-	- "client"</div><div class='del'>-- resets: Must contain seven entries for each entry in reset-names.</div><div class='del'>-	   See ../reset/reset.txt for details.</div><div class='del'>-- reset-names: Must include the following names</div><div class='del'>-	- "core"</div><div class='del'>-	- "mgmt"</div><div class='del'>-	- "mgmt-sticky"</div><div class='del'>-	- "pipe"</div><div class='del'>-	- "pm"</div><div class='del'>-	- "aclk"</div><div class='del'>-	- "pclk"</div><div class='del'>-- pinctrl-names : The pin control state names</div><div class='del'>-- pinctrl-0: The "default" pinctrl state</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-	interrupt source. The value must be 1.</div><div class='del'>-- interrupt-map-mask and interrupt-map: standard PCI properties</div><div class='del'>-</div><div class='del'>-Required properties for legacy PHY model (deprecated):</div><div class='del'>-- phys: From PHY bindings: Phandle for the Generic PHY for PCIe.</div><div class='del'>-- phy-names:  MUST be "pcie-phy".</div><div class='del'>-</div><div class='del'>-Required properties for per-lane PHY model (preferred):</div><div class='del'>-- phys: Must contain an phandle to a PHY for each entry in phy-names.</div><div class='del'>-- phy-names: Must include 4 entries for all 4 lanes even if some of</div><div class='del'>-  them won't be used for your cases. Entries are of the form "pcie-phy-N":</div><div class='del'>-  where N ranges from 0 to 3.</div><div class='del'>-  (see example below and you MUST also refer to ../phy/rockchip-pcie-phy.txt</div><div class='del'>-  for changing the #phy-cells of phy node to support it)</div><div class='del'>-</div><div class='del'>-Optional Property:</div><div class='del'>-- aspm-no-l0s: RC won't support ASPM L0s. This property is needed if</div><div class='del'>-	using 24MHz OSC for RC's PHY.</div><div class='del'>-- ep-gpios: contain the entry for pre-reset GPIO</div><div class='del'>-- num-lanes: number of lanes to use</div><div class='del'>-- vpcie12v-supply: The phandle to the 12v regulator to use for PCIe.</div><div class='del'>-- vpcie3v3-supply: The phandle to the 3.3v regulator to use for PCIe.</div><div class='del'>-- vpcie1v8-supply: The phandle to the 1.8v regulator to use for PCIe.</div><div class='del'>-- vpcie0v9-supply: The phandle to the 0.9v regulator to use for PCIe.</div><div class='del'>-</div><div class='del'>-*Interrupt controller child node*</div><div class='del'>-The core controller provides a single interrupt for legacy INTx. The PCIe node</div><div class='del'>-should contain an interrupt controller node as a target for the PCI</div><div class='del'>-'interrupt-map' property. This node represents the domain at which the four</div><div class='del'>-INTx interrupts are decoded and routed.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Required properties for Interrupt controller child node:</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #address-cells: specifies the number of cells needed to encode an</div><div class='del'>-	address. The value must be 0.</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-	interrupt source. The value must be 1.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-pcie0: pcie@f8000000 {</div><div class='del'>-	compatible = "rockchip,rk3399-pcie";</div><div class='del'>-	#address-cells = &lt;3&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='del'>-	clocks = &lt;&amp;cru ACLK_PCIE&gt;, &lt;&amp;cru ACLK_PERF_PCIE&gt;,</div><div class='del'>-		 &lt;&amp;cru PCLK_PCIE&gt;, &lt;&amp;cru SCLK_PCIE_PM&gt;;</div><div class='del'>-	clock-names = "aclk", "aclk-perf",</div><div class='del'>-		      "hclk", "pm";</div><div class='del'>-	bus-range = &lt;0x0 0x1&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-		     &lt;GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0&gt;,</div><div class='del'>-		     &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-	interrupt-names = "sys", "legacy", "client";</div><div class='del'>-	assigned-clocks = &lt;&amp;cru SCLK_PCIEPHY_REF&gt;;</div><div class='del'>-	assigned-clock-parents = &lt;&amp;cru SCLK_PCIEPHY_REF100M&gt;;</div><div class='del'>-	assigned-clock-rates = &lt;100000000&gt;;</div><div class='del'>-	ep-gpios = &lt;&amp;gpio3 13 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	ranges = &lt;0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000</div><div class='del'>-		  0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000&gt;;</div><div class='del'>-	num-lanes = &lt;4&gt;;</div><div class='del'>-	msi-map = &lt;0x0 &amp;its 0x0 0x1000&gt;;</div><div class='del'>-	reg = &lt;0x0 0xf8000000 0x0 0x2000000&gt;, &lt;0x0 0xfd000000 0x0 0x1000000&gt;;</div><div class='del'>-	reg-names = "axi-base", "apb-base";</div><div class='del'>-	resets = &lt;&amp;cru SRST_PCIE_CORE&gt;, &lt;&amp;cru SRST_PCIE_MGMT&gt;,</div><div class='del'>-		 &lt;&amp;cru SRST_PCIE_MGMT_STICKY&gt;, &lt;&amp;cru SRST_PCIE_PIPE&gt; ,</div><div class='del'>-		 &lt;&amp;cru SRST_PCIE_PM&gt;, &lt;&amp;cru SRST_P_PCIE&gt;, &lt;&amp;cru SRST_A_PCIE&gt;;</div><div class='del'>-	reset-names = "core", "mgmt", "mgmt-sticky", "pipe",</div><div class='del'>-		      "pm", "pclk", "aclk";</div><div class='del'>-	/* deprecated legacy PHY model */</div><div class='del'>-	phys = &lt;&amp;pcie_phy&gt;;</div><div class='del'>-	phy-names = "pcie-phy";</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pcie_clkreq&gt;;</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='del'>-	interrupt-map = &lt;0 0 0 1 &amp;pcie0_intc 0&gt;,</div><div class='del'>-			&lt;0 0 0 2 &amp;pcie0_intc 1&gt;,</div><div class='del'>-			&lt;0 0 0 3 &amp;pcie0_intc 2&gt;,</div><div class='del'>-			&lt;0 0 0 4 &amp;pcie0_intc 3&gt;;</div><div class='del'>-	pcie0_intc: interrupt-controller {</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-pcie0: pcie@f8000000 {</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	/* preferred per-lane PHY model */</div><div class='del'>-	phys = &lt;&amp;pcie_phy 0&gt;, &lt;&amp;pcie_phy 1&gt;, &lt;&amp;pcie_phy 2&gt;, &lt;&amp;pcie_phy 3&gt;;</div><div class='del'>-	phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3";</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml b/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml<br/>index 445eed94b53f..f20ed7e709f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/samsung,exynos-pcie.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Samsung SoC series PCIe Host Controller Device Tree Bindings</div><div class='add'>+title: Samsung SoC series PCIe Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml b/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml<br/>index 195e6afeb169..844fc7142302 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/sifive,fu740-pcie.yaml</a></div><div class='hunk'>@@ -51,6 +51,12 @@ properties:</div><div class='ctx'>     description: A phandle to the PCIe power up reset line.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: pcie_aux</div><div class='add'>+</div><div class='ctx'>   pwren-gpios:</div><div class='ctx'>     description: Should specify the GPIO for controlling the PCI bus device power on.</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -66,6 +72,7 @@ required:</div><div class='ctx'>   - interrupt-map-mask</div><div class='ctx'>   - interrupt-map</div><div class='ctx'>   - clocks</div><div class='add'>+  - clock-names</div><div class='ctx'>   - resets</div><div class='ctx'>   - pwren-gpios</div><div class='ctx'>   - reset-gpios</div><div class='hunk'>@@ -104,6 +111,7 @@ examples:</div><div class='ctx'>                             &lt;0x0 0x0 0x0 0x2 &amp;plic0 58&gt;,</div><div class='ctx'>                             &lt;0x0 0x0 0x0 0x3 &amp;plic0 59&gt;,</div><div class='ctx'>                             &lt;0x0 0x0 0x0 0x4 &amp;plic0 60&gt;;</div><div class='add'>+            clock-names = "pcie_aux";</div><div class='ctx'>             clocks = &lt;&amp;prci FU740_PRCI_CLK_PCIE_AUX&gt;;</div><div class='ctx'>             resets = &lt;&amp;prci 4&gt;;</div><div class='ctx'>             pwren-gpios = &lt;&amp;gpio 5 0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml<br/>new file mode 100644<br/>index 000000000000..d87e13496834<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,266 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys DWC PCIe RP/EP controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jingoo Han &lt;jingoohan1@gmail.com&gt;</div><div class='add'>+  - Gustavo Pimentel &lt;gustavo.pimentel@synopsys.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Generic Synopsys DesignWare PCIe Root Port and Endpoint controller</div><div class='add'>+  properties.</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      DWC PCIe CSR space is normally accessed over the dedicated Data Bus</div><div class='add'>+      Interface - DBI. In accordance with the reference manual the register</div><div class='add'>+      configuration space belongs to the Configuration-Dependent Module (CDM)</div><div class='add'>+      and is split up into several sub-parts Standard PCIe configuration</div><div class='add'>+      space, Port Logic Registers (PL), Shadow Config-space Registers,</div><div class='add'>+      iATU/eDMA registers. The particular sub-space is selected by the</div><div class='add'>+      CDM/ELBI (dbi_cs) and CS2 (dbi_cs2) signals (selector bits). Such</div><div class='add'>+      configuration provides a flexible interface for the system engineers to</div><div class='add'>+      either map the particular space at a desired MMIO address or just leave</div><div class='add'>+      them in a contiguous memory space if pure Native or AXI Bridge DBI access</div><div class='add'>+      is selected. Note the PCIe CFG-space, PL and Shadow registers are</div><div class='add'>+      specific for each activated function, while the rest of the sub-spaces</div><div class='add'>+      are common for all of them (if there are more than one).</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      There are two main sub-blocks which are normally capable of</div><div class='add'>+      generating interrupts. It's System Information Interface and MSI</div><div class='add'>+      interface. While the former one has some common for the Host and</div><div class='add'>+      Endpoint controllers IRQ-signals, the later interface is obviously</div><div class='add'>+      Root Complex specific since it's responsible for the incoming MSI</div><div class='add'>+      messages signalling. The System Information IRQ signals are mainly</div><div class='add'>+      responsible for reporting the generic PCIe hierarchy and Root</div><div class='add'>+      Complex events like VPD IO request, general AER, PME, Hot-plug, link</div><div class='add'>+      bandwidth change, link equalization request, INTx asserted/deasserted</div><div class='add'>+      Message detection, embedded DMA Tx/Rx/Error.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 26</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 26</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description:</div><div class='add'>+      DWC PCIe reference manual explicitly defines a set of the clocks required</div><div class='add'>+      to get the controller working correctly. In general all of them can</div><div class='add'>+      be divided into two groups':' application and core clocks. Note the</div><div class='add'>+      platforms may have some of the clock sources unspecified in case if the</div><div class='add'>+      corresponding domains are fed up from a common clock source.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - description:</div><div class='add'>+            Data Bus Interface (DBI) clock. Clock signal for the AXI-bus</div><div class='add'>+            interface of the Configuration-Dependent Module, which is</div><div class='add'>+            basically the set of the controller CSRs.</div><div class='add'>+          const: dbi</div><div class='add'>+        - description:</div><div class='add'>+            Application AXI-bus Master interface clock. Basically this is</div><div class='add'>+            a clock for the controller DMA interface (PCI-to-CPU).</div><div class='add'>+          const: mstr</div><div class='add'>+        - description:</div><div class='add'>+            Application AXI-bus Slave interface clock. This is a clock for</div><div class='add'>+            the CPU-to-PCI memory IO interface.</div><div class='add'>+          const: slv</div><div class='add'>+        - description:</div><div class='add'>+            Controller Core-PCS PIPE interface clock. It's normally</div><div class='add'>+            supplied by an external PCS-PHY.</div><div class='add'>+          const: pipe</div><div class='add'>+        - description:</div><div class='add'>+            Controller Primary clock. It's assumed that all controller input</div><div class='add'>+            signals (except resets) are synchronous to this clock.</div><div class='add'>+          const: core</div><div class='add'>+        - description:</div><div class='add'>+            Auxiliary clock for the controller PMC domain. The controller</div><div class='add'>+            partitioning implies having some parts to operate with this</div><div class='add'>+            clock in some power management states.</div><div class='add'>+          const: aux</div><div class='add'>+        - description:</div><div class='add'>+            Generic reference clock. In case if there are several</div><div class='add'>+            interfaces fed up with a common clock source it's advisable to</div><div class='add'>+            define it with this name (for instance pipe, core and aux can</div><div class='add'>+            be connected to a single source of the periodic signal).</div><div class='add'>+          const: ref</div><div class='add'>+        - description:</div><div class='add'>+            Clock for the PHY registers interface. Originally this is</div><div class='add'>+            a PHY-viewport-based interface, but some platform may have</div><div class='add'>+            specifically designed one.</div><div class='add'>+          const: phy_reg</div><div class='add'>+        - description:</div><div class='add'>+            Vendor-specific clock names. Consider using the generic names</div><div class='add'>+            above for new bindings.</div><div class='add'>+          oneOf:</div><div class='add'>+            - description: See native 'dbi' clock for details</div><div class='add'>+              enum: [ pcie, pcie_apb_sys, aclk_dbi ]</div><div class='add'>+            - description: See native 'mstr/slv' clock for details</div><div class='add'>+              enum: [ pcie_bus, pcie_inbound_axi, pcie_aclk, aclk_mst, aclk_slv ]</div><div class='add'>+            - description: See native 'pipe' clock for details</div><div class='add'>+              enum: [ pcie_phy, pcie_phy_ref, link ]</div><div class='add'>+            - description: See native 'aux' clock for details</div><div class='add'>+              enum: [ pcie_aux ]</div><div class='add'>+            - description: See native 'ref' clock for details.</div><div class='add'>+              enum: [ gio ]</div><div class='add'>+            - description: See nativs 'phy_reg' clock for details</div><div class='add'>+              enum: [ pcie_apb_phy, pclk ]</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    description:</div><div class='add'>+      DWC PCIe reference manual explicitly defines a set of the reset</div><div class='add'>+      signals required to be de-asserted to properly activate the controller</div><div class='add'>+      sub-parts. All of these signals can be divided into two sub-groups':'</div><div class='add'>+      application and core resets with respect to the main sub-domains they</div><div class='add'>+      are supposed to reset. Note the platforms may have some of these signals</div><div class='add'>+      unspecified in case if they are automatically handled or aggregated into</div><div class='add'>+      a comprehensive control module.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 10</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 10</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - description: Data Bus Interface (DBI) domain reset</div><div class='add'>+          const: dbi</div><div class='add'>+        - description: AXI-bus Master interface reset</div><div class='add'>+          const: mstr</div><div class='add'>+        - description: AXI-bus Slave interface reset</div><div class='add'>+          const: slv</div><div class='add'>+        - description: Application-dependent interface reset</div><div class='add'>+          const: app</div><div class='add'>+        - description: Controller Non-sticky CSR flags reset</div><div class='add'>+          const: non-sticky</div><div class='add'>+        - description: Controller sticky CSR flags reset</div><div class='add'>+          const: sticky</div><div class='add'>+        - description: PIPE-interface (Core-PCS) logic reset</div><div class='add'>+          const: pipe</div><div class='add'>+        - description:</div><div class='add'>+            Controller primary reset (resets everything except PMC module)</div><div class='add'>+          const: core</div><div class='add'>+        - description: PCS/PHY block reset</div><div class='add'>+          const: phy</div><div class='add'>+        - description: PMC hot reset signal</div><div class='add'>+          const: hot</div><div class='add'>+        - description: Cold reset signal</div><div class='add'>+          const: pwr</div><div class='add'>+        - description:</div><div class='add'>+            Vendor-specific reset names. Consider using the generic names</div><div class='add'>+            above for new bindings.</div><div class='add'>+          oneOf:</div><div class='add'>+            - description: See native 'app' reset for details</div><div class='add'>+              enum: [ apps, gio, apb ]</div><div class='add'>+            - description: See native 'phy' reset for details</div><div class='add'>+              enum: [ pciephy, link ]</div><div class='add'>+            - description: See native 'pwr' reset for details</div><div class='add'>+              enum: [ turnoff ]</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    description:</div><div class='add'>+      There can be up to the number of possible lanes PHYs specified placed in</div><div class='add'>+      the phandle array in the line-based order. Obviously each the specified</div><div class='add'>+      PHYs are supposed to be able to work in the PCIe mode with a speed</div><div class='add'>+      implied by the DWC PCIe controller they are attached to.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Generic PHY names</div><div class='add'>+        items:</div><div class='add'>+          pattern: '^pcie[0-9]+$'</div><div class='add'>+      - description:</div><div class='add'>+          Vendor-specific PHY names. Consider using the generic</div><div class='add'>+          names above for new bindings.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: '^pcie(-?phy[0-9]*)?$'</div><div class='add'>+            - pattern: '^p2u-[0-7]$'</div><div class='add'>+</div><div class='add'>+  reset-gpio:</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      Reference to the GPIO-controlled PERST# signal. It is used to reset all</div><div class='add'>+      the peripheral devices available on the PCIe bus.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      Reference to the GPIO-controlled PERST# signal. It is used to reset all</div><div class='add'>+      the peripheral devices available on the PCIe bus.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  max-link-speed:</div><div class='add'>+    maximum: 5</div><div class='add'>+</div><div class='add'>+  num-lanes:</div><div class='add'>+    description:</div><div class='add'>+      Number of PCIe link lanes to use. Can be omitted if the already brought</div><div class='add'>+      up link is supposed to be preserved.</div><div class='add'>+    maximum: 16</div><div class='add'>+</div><div class='add'>+  num-ob-windows:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      Number of outbound address translation windows. This parameter can be</div><div class='add'>+      auto-detected based on the iATU memory writability. So there is no</div><div class='add'>+      point in having a dedicated DT-property for it.</div><div class='add'>+    maximum: 256</div><div class='add'>+</div><div class='add'>+  num-ib-windows:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      Number of inbound address translation windows. In the same way as</div><div class='add'>+      for the outbound AT windows, this parameter can be auto-detected based</div><div class='add'>+      on the iATU memory writability. There is no point having a dedicated</div><div class='add'>+      DT-property for it either.</div><div class='add'>+    maximum: 256</div><div class='add'>+</div><div class='add'>+  num-viewport:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      Number of outbound view ports configured in hardware. It's the same as</div><div class='add'>+      the number of outbound AT windows.</div><div class='add'>+    maximum: 256</div><div class='add'>+</div><div class='add'>+  snps,enable-cdm-check:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      Enable automatic checking of CDM (Configuration Dependent Module)</div><div class='add'>+      registers for data corruption. CDM registers include standard PCIe</div><div class='add'>+      configuration space registers, Port Logic registers, DMA and iATU</div><div class='add'>+      registers. This feature has been available since DWC PCIe v4.80a.</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml<br/>index e59059ab5be0..8fc2151691a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml</a></div><div class='hunk'>@@ -13,74 +13,182 @@ maintainers:</div><div class='ctx'> description: |</div><div class='ctx'>   Synopsys DesignWare PCIe host controller endpoint</div><div class='ctx'> </div><div class='add'>+# Please create a separate DT-schema for your DWC PCIe Endpoint controller</div><div class='add'>+# and make sure it's assigned with the vendor-specific compatible string.</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      const: snps,dw-pcie-ep</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/pci/pci-ep.yaml#</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='del'>-  compatible:</div><div class='del'>-    anyOf:</div><div class='del'>-      - {}</div><div class='del'>-      - const: snps,dw-pcie-ep</div><div class='del'>-</div><div class='ctx'>   reg:</div><div class='del'>-    description: |</div><div class='del'>-      It should contain Data Bus Interface (dbi) and config registers for all</div><div class='del'>-      versions.</div><div class='del'>-      For designware core version &gt;= 4.80, it may contain ATU address space.</div><div class='add'>+    description:</div><div class='add'>+      DBI, DBI2 reg-spaces and outbound memory window are required for the</div><div class='add'>+      normal controller functioning. iATU memory IO region is also required</div><div class='add'>+      if the space is unrolled (IP-core version &gt;= 4.80a).</div><div class='ctx'>     minItems: 2</div><div class='del'>-    maxItems: 4</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    maxItems: 4</div><div class='add'>+    maxItems: 5</div><div class='ctx'>     items:</div><div class='del'>-      enum: [dbi, dbi2, config, atu, addr_space, link, atu_dma, appl]</div><div class='del'>-</div><div class='del'>-  reset-gpio:</div><div class='del'>-    description: GPIO pin number of PERST# signal</div><div class='del'>-    maxItems: 1</div><div class='del'>-    deprecated: true</div><div class='del'>-</div><div class='del'>-  reset-gpios:</div><div class='del'>-    description: GPIO controlled connection to PERST# signal</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  snps,enable-cdm-check:</div><div class='del'>-    type: boolean</div><div class='del'>-    description: |</div><div class='del'>-      This is a boolean property and if present enables</div><div class='del'>-      automatic checking of CDM (Configuration Dependent Module) registers</div><div class='del'>-      for data corruption. CDM registers include standard PCIe configuration</div><div class='del'>-      space registers, Port Logic registers, DMA and iATU (internal Address</div><div class='del'>-      Translation Unit) registers.</div><div class='del'>-</div><div class='del'>-  num-ib-windows:</div><div class='del'>-    description: number of inbound address translation windows</div><div class='del'>-    maxItems: 1</div><div class='del'>-    deprecated: true</div><div class='del'>-</div><div class='del'>-  num-ob-windows:</div><div class='del'>-    description: number of outbound address translation windows</div><div class='del'>-    maxItems: 1</div><div class='del'>-    deprecated: true</div><div class='add'>+      oneOf:</div><div class='add'>+        - description:</div><div class='add'>+            Basic DWC PCIe controller configuration-space accessible over</div><div class='add'>+            the DBI interface. This memory space is either activated with</div><div class='add'>+            CDM/ELBI = 0 and CS2 = 0 or is a contiguous memory region</div><div class='add'>+            with all spaces. Note iATU/eDMA CSRs are indirectly accessible</div><div class='add'>+            via the PL viewports on the DWC PCIe controllers older than</div><div class='add'>+            v4.80a.</div><div class='add'>+          const: dbi</div><div class='add'>+        - description:</div><div class='add'>+            Shadow DWC PCIe config-space registers. This space is selected</div><div class='add'>+            by setting CDM/ELBI = 0 and CS2 = 1. This is an intermix of</div><div class='add'>+            the PCI-SIG PCIe CFG-space with the shadow registers for some</div><div class='add'>+            PCI Header space, PCI Standard and Extended Structures. It's</div><div class='add'>+            mainly relevant for the end-point controller configuration,</div><div class='add'>+            but still there are some shadow registers available for the</div><div class='add'>+            Root Port mode too.</div><div class='add'>+          const: dbi2</div><div class='add'>+        - description:</div><div class='add'>+            External Local Bus registers. It's an application-dependent</div><div class='add'>+            registers normally defined by the platform engineers. The space</div><div class='add'>+            can be selected by setting CDM/ELBI = 1 and CS2 = 0 wires or can</div><div class='add'>+            be accessed over some platform-specific means (for instance</div><div class='add'>+            as a part of a system controller).</div><div class='add'>+          enum: [ elbi, app ]</div><div class='add'>+        - description:</div><div class='add'>+            iATU/eDMA registers common for all device functions. It's an</div><div class='add'>+            unrolled memory space with the internal Address Translation</div><div class='add'>+            Unit and Enhanced DMA, which is selected by setting CDM/ELBI = 1</div><div class='add'>+            and CS2 = 1. For IP-core releases prior v4.80a, these registers</div><div class='add'>+            have been programmed via an indirect addressing scheme using a</div><div class='add'>+            set of viewport CSRs mapped into the PL space. Note iATU is</div><div class='add'>+            normally mapped to the 0x0 address of this region, while eDMA</div><div class='add'>+            is available at 0x80000 base address.</div><div class='add'>+          const: atu</div><div class='add'>+        - description:</div><div class='add'>+            Platform-specific eDMA registers. Some platforms may have eDMA</div><div class='add'>+            CSRs mapped in a non-standard base address. The registers offset</div><div class='add'>+            can be changed or the MS/LS-bits of the address can be attached</div><div class='add'>+            in an additional RTL block before the MEM-IO transactions reach</div><div class='add'>+            the DW PCIe slave interface.</div><div class='add'>+          const: dma</div><div class='add'>+        - description:</div><div class='add'>+            PHY/PCS configuration registers. Some platforms can have the</div><div class='add'>+            PCS and PHY CSRs accessible over a dedicated memory mapped</div><div class='add'>+            region, but mainly these registers are indirectly accessible</div><div class='add'>+            either by means of the embedded PHY viewport schema or by some</div><div class='add'>+            platform-specific method.</div><div class='add'>+          const: phy</div><div class='add'>+        - description:</div><div class='add'>+            Outbound iATU-capable memory-region which will be used to</div><div class='add'>+            generate various application-specific traffic on the PCIe bus</div><div class='add'>+            hierarchy. It's usage scenario depends on the endpoint</div><div class='add'>+            functionality, for instance it can be used to create MSI(X)</div><div class='add'>+            messages.</div><div class='add'>+          const: addr_space</div><div class='add'>+        - description:</div><div class='add'>+            Vendor-specific CSR names. Consider using the generic names above</div><div class='add'>+            for new bindings.</div><div class='add'>+          oneOf:</div><div class='add'>+            - description: See native 'elbi/app' CSR region for details.</div><div class='add'>+              enum: [ link, appl ]</div><div class='add'>+            - description: See native 'atu' CSR region for details.</div><div class='add'>+              enum: [ atu_dma ]</div><div class='add'>+    allOf:</div><div class='add'>+      - contains:</div><div class='add'>+          const: dbi</div><div class='add'>+      - contains:</div><div class='add'>+          const: addr_space</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      There is no mandatory IRQ signals for the normal controller functioning,</div><div class='add'>+      but in addition to the native set the platforms may have a link- or</div><div class='add'>+      PM-related IRQs specified.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 20</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 20</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - description:</div><div class='add'>+            Controller request to read or write virtual product data</div><div class='add'>+            from/to the VPD capability registers.</div><div class='add'>+          const: vpd</div><div class='add'>+        - description:</div><div class='add'>+            Link Equalization Request flag is set in the Link Status 2</div><div class='add'>+            register (applicable if the corresponding IRQ is enabled in</div><div class='add'>+            the Link Control 3 register).</div><div class='add'>+          const: l_eq</div><div class='add'>+        - description:</div><div class='add'>+            Indicates that the eDMA Tx/Rx transfer is complete or that an</div><div class='add'>+            error has occurred on the corresponding channel. eDMA can have</div><div class='add'>+            eight Tx (Write) and Rx (Read) eDMA channels thus supporting up</div><div class='add'>+            to 16 IRQ signals all together. Write eDMA channels shall go</div><div class='add'>+            first in the ordered row as per default edma_int[*] bus setup.</div><div class='add'>+          pattern: '^dma([0-9]|1[0-5])?$'</div><div class='add'>+        - description:</div><div class='add'>+            PCIe protocol correctable error or a Data Path protection</div><div class='add'>+            correctable error is detected by the automotive/safety</div><div class='add'>+            feature.</div><div class='add'>+          const: sft_ce</div><div class='add'>+        - description:</div><div class='add'>+            Indicates that the internal safety mechanism has detected an</div><div class='add'>+            uncorrectable error.</div><div class='add'>+          const: sft_ue</div><div class='add'>+        - description:</div><div class='add'>+            Application-specific IRQ raised depending on the vendor-specific</div><div class='add'>+            events basis.</div><div class='add'>+          const: app</div><div class='add'>+        - description:</div><div class='add'>+            Vendor-specific IRQ names. Consider using the generic names above</div><div class='add'>+            for new bindings.</div><div class='add'>+          oneOf:</div><div class='add'>+            - description: See native "app" IRQ for details</div><div class='add'>+              enum: [ intr ]</div><div class='add'>+</div><div class='add'>+  max-functions:</div><div class='add'>+    maximum: 32</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='add'>+  - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - compatible</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    bus {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;1&gt;;</div><div class='del'>-      pcie-ep@dfd00000 {</div><div class='del'>-        compatible = "snps,dw-pcie-ep";</div><div class='del'>-        reg = &lt;0xdfc00000 0x0001000&gt;, /* IP registers 1 */</div><div class='del'>-              &lt;0xdfc01000 0x0001000&gt;, /* IP registers 2 */</div><div class='del'>-              &lt;0xd0000000 0x2000000&gt;; /* Configuration space */</div><div class='del'>-        reg-names = "dbi", "dbi2", "addr_space";</div><div class='del'>-      };</div><div class='add'>+    pcie-ep@dfd00000 {</div><div class='add'>+      compatible = "snps,dw-pcie-ep";</div><div class='add'>+      reg = &lt;0xdfc00000 0x0001000&gt;, /* IP registers 1 */</div><div class='add'>+            &lt;0xdfc01000 0x0001000&gt;, /* IP registers 2 */</div><div class='add'>+            &lt;0xd0000000 0x2000000&gt;; /* Configuration space */</div><div class='add'>+      reg-names = "dbi", "dbi2", "addr_space";</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;23&gt;, &lt;24&gt;;</div><div class='add'>+      interrupt-names = "dma0", "dma1";</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;sys_clk 12&gt;, &lt;&amp;sys_clk 24&gt;;</div><div class='add'>+      clock-names = "dbi", "ref";</div><div class='add'>+</div><div class='add'>+      resets = &lt;&amp;sys_rst 12&gt;, &lt;&amp;sys_rst 24&gt;;</div><div class='add'>+      reset-names = "dbi", "phy";</div><div class='add'>+</div><div class='add'>+      phys = &lt;&amp;pcie_phy0&gt;, &lt;&amp;pcie_phy1&gt;, &lt;&amp;pcie_phy2&gt;, &lt;&amp;pcie_phy3&gt;;</div><div class='add'>+      phy-names = "pcie0", "pcie1", "pcie2", "pcie3";</div><div class='add'>+</div><div class='add'>+      max-link-speed = &lt;3&gt;;</div><div class='add'>+      max-functions = /bits/ 8 &lt;4&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml<br/>index a5345c494744..1a83f0f65f19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml</a></div><div class='hunk'>@@ -13,20 +13,25 @@ maintainers:</div><div class='ctx'> description: |</div><div class='ctx'>   Synopsys DesignWare PCIe host controller</div><div class='ctx'> </div><div class='add'>+# Please create a separate DT-schema for your DWC PCIe Root Port controller</div><div class='add'>+# and make sure it's assigned with the vendor-specific compatible string.</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      const: snps,dw-pcie</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='del'>-  compatible:</div><div class='del'>-    anyOf:</div><div class='del'>-      - {}</div><div class='del'>-      - const: snps,dw-pcie</div><div class='del'>-</div><div class='ctx'>   reg:</div><div class='del'>-    description: |</div><div class='del'>-      It should contain Data Bus Interface (dbi) and config registers for all</div><div class='del'>-      versions.</div><div class='del'>-      For designware core version &gt;= 4.80, it may contain ATU address space.</div><div class='add'>+    description:</div><div class='add'>+      At least DBI reg-space and peripheral devices CFG-space outbound window</div><div class='add'>+      are required for the normal controller work. iATU memory IO region is</div><div class='add'>+      also required if the space is unrolled (IP-core version &gt;= 4.80a).</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 5</div><div class='ctx'> </div><div class='hunk'>@@ -34,69 +39,194 @@ properties:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 5</div><div class='ctx'>     items:</div><div class='del'>-      enum: [ dbi, dbi2, config, atu, app, elbi, mgmt, ctrl, parf, cfg, link,</div><div class='del'>-              ulreg, smu, mpu, apb, phy ]</div><div class='del'>-</div><div class='del'>-  num-lanes:</div><div class='del'>-    description: |</div><div class='del'>-      number of lanes to use (this property should be specified unless</div><div class='del'>-      the link is brought already up in firmware)</div><div class='del'>-    maximum: 16</div><div class='del'>-</div><div class='del'>-  reset-gpio:</div><div class='del'>-    description: GPIO pin number of PERST# signal</div><div class='del'>-    maxItems: 1</div><div class='del'>-    deprecated: true</div><div class='del'>-</div><div class='del'>-  reset-gpios:</div><div class='del'>-    description: GPIO controlled connection to PERST# signal</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts: true</div><div class='del'>-</div><div class='del'>-  interrupt-names: true</div><div class='del'>-</div><div class='del'>-  clocks: true</div><div class='del'>-</div><div class='del'>-  snps,enable-cdm-check:</div><div class='del'>-    type: boolean</div><div class='del'>-    description: |</div><div class='del'>-      This is a boolean property and if present enables</div><div class='del'>-      automatic checking of CDM (Configuration Dependent Module) registers</div><div class='del'>-      for data corruption. CDM registers include standard PCIe configuration</div><div class='del'>-      space registers, Port Logic registers, DMA and iATU (internal Address</div><div class='del'>-      Translation Unit) registers.</div><div class='del'>-</div><div class='del'>-  num-viewport:</div><div class='del'>-    description: |</div><div class='del'>-      number of view ports configured in hardware. If a platform</div><div class='del'>-      does not specify it, the driver autodetects it.</div><div class='del'>-    deprecated: true</div><div class='add'>+      oneOf:</div><div class='add'>+        - description:</div><div class='add'>+            Basic DWC PCIe controller configuration-space accessible over</div><div class='add'>+            the DBI interface. This memory space is either activated with</div><div class='add'>+            CDM/ELBI = 0 and CS2 = 0 or is a contiguous memory region</div><div class='add'>+            with all spaces. Note iATU/eDMA CSRs are indirectly accessible</div><div class='add'>+            via the PL viewports on the DWC PCIe controllers older than</div><div class='add'>+            v4.80a.</div><div class='add'>+          const: dbi</div><div class='add'>+        - description:</div><div class='add'>+            Shadow DWC PCIe config-space registers. This space is selected</div><div class='add'>+            by setting CDM/ELBI = 0 and CS2 = 1. This is an intermix of</div><div class='add'>+            the PCI-SIG PCIe CFG-space with the shadow registers for some</div><div class='add'>+            PCI Header space, PCI Standard and Extended Structures. It's</div><div class='add'>+            mainly relevant for the end-point controller configuration,</div><div class='add'>+            but still there are some shadow registers available for the</div><div class='add'>+            Root Port mode too.</div><div class='add'>+          const: dbi2</div><div class='add'>+        - description:</div><div class='add'>+            External Local Bus registers. It's an application-dependent</div><div class='add'>+            registers normally defined by the platform engineers. The space</div><div class='add'>+            can be selected by setting CDM/ELBI = 1 and CS2 = 0 wires or can</div><div class='add'>+            be accessed over some platform-specific means (for instance</div><div class='add'>+            as a part of a system controller).</div><div class='add'>+          enum: [ elbi, app ]</div><div class='add'>+        - description:</div><div class='add'>+            iATU/eDMA registers common for all device functions. It's an</div><div class='add'>+            unrolled memory space with the internal Address Translation</div><div class='add'>+            Unit and Enhanced DMA, which is selected by setting CDM/ELBI = 1</div><div class='add'>+            and CS2 = 1. For IP-core releases prior v4.80a, these registers</div><div class='add'>+            have been programmed via an indirect addressing scheme using a</div><div class='add'>+            set of viewport CSRs mapped into the PL space. Note iATU is</div><div class='add'>+            normally mapped to the 0x0 address of this region, while eDMA</div><div class='add'>+            is available at 0x80000 base address.</div><div class='add'>+          const: atu</div><div class='add'>+        - description:</div><div class='add'>+            Platform-specific eDMA registers. Some platforms may have eDMA</div><div class='add'>+            CSRs mapped in a non-standard base address. The registers offset</div><div class='add'>+            can be changed or the MS/LS-bits of the address can be attached</div><div class='add'>+            in an additional RTL block before the MEM-IO transactions reach</div><div class='add'>+            the DW PCIe slave interface.</div><div class='add'>+          const: dma</div><div class='add'>+        - description:</div><div class='add'>+            PHY/PCS configuration registers. Some platforms can have the</div><div class='add'>+            PCS and PHY CSRs accessible over a dedicated memory mapped</div><div class='add'>+            region, but mainly these registers are indirectly accessible</div><div class='add'>+            either by means of the embedded PHY viewport schema or by some</div><div class='add'>+            platform-specific method.</div><div class='add'>+          const: phy</div><div class='add'>+        - description:</div><div class='add'>+            Outbound iATU-capable memory-region which will be used to access</div><div class='add'>+            the peripheral PCIe devices configuration space.</div><div class='add'>+          const: config</div><div class='add'>+        - description:</div><div class='add'>+            Vendor-specific CSR names. Consider using the generic names above</div><div class='add'>+            for new bindings.</div><div class='add'>+          oneOf:</div><div class='add'>+            - description: See native 'elbi/app' CSR region for details.</div><div class='add'>+              enum: [ apb, mgmt, link, ulreg, appl ]</div><div class='add'>+            - description: See native 'atu' CSR region for details.</div><div class='add'>+              enum: [ atu_dma ]</div><div class='add'>+            - description: Syscon-related CSR regions.</div><div class='add'>+              enum: [ smu, mpu ]</div><div class='add'>+            - description: Tegra234 aperture</div><div class='add'>+              enum: [ ecam ]</div><div class='add'>+    allOf:</div><div class='add'>+      - contains:</div><div class='add'>+          const: dbi</div><div class='add'>+      - contains:</div><div class='add'>+          const: config</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      DWC PCIe Root Port/Complex specific IRQ signals. At least MSI interrupt</div><div class='add'>+      signal is supposed to be specified for the host controller.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 26</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 26</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - description:</div><div class='add'>+            Controller request to read or write virtual product data</div><div class='add'>+            from/to the VPD capability registers.</div><div class='add'>+          const: vpd</div><div class='add'>+        - description:</div><div class='add'>+            Link Equalization Request flag is set in the Link Status 2</div><div class='add'>+            register (applicable if the corresponding IRQ is enabled in</div><div class='add'>+            the Link Control 3 register).</div><div class='add'>+          const: l_eq</div><div class='add'>+        - description:</div><div class='add'>+            Indicates that the eDMA Tx/Rx transfer is complete or that an</div><div class='add'>+            error has occurred on the corresponding channel. eDMA can have</div><div class='add'>+            eight Tx (Write) and Rx (Read) eDMA channels thus supporting up</div><div class='add'>+            to 16 IRQ signals all together. Write eDMA channels shall go</div><div class='add'>+            first in the ordered row as per default edma_int[*] bus setup.</div><div class='add'>+          pattern: '^dma([0-9]|1[0-5])?$'</div><div class='add'>+        - description:</div><div class='add'>+            PCIe protocol correctable error or a Data Path protection</div><div class='add'>+            correctable error is detected by the automotive/safety</div><div class='add'>+            feature.</div><div class='add'>+          const: sft_ce</div><div class='add'>+        - description:</div><div class='add'>+            Indicates that the internal safety mechanism has detected an</div><div class='add'>+            uncorrectable error.</div><div class='add'>+          const: sft_ue</div><div class='add'>+        - description:</div><div class='add'>+            Application-specific IRQ raised depending on the vendor-specific</div><div class='add'>+            events basis.</div><div class='add'>+          const: app</div><div class='add'>+        - description:</div><div class='add'>+            DSP AXI MSI Interrupt detected. It gets de-asserted when there is</div><div class='add'>+            no more MSI interrupt pending. The interrupt is relevant to the</div><div class='add'>+            iMSI-RX - Integrated MSI Receiver (AXI bridge).</div><div class='add'>+          const: msi</div><div class='add'>+        - description:</div><div class='add'>+            Legacy A/B/C/D interrupt signal. Basically it's triggered by</div><div class='add'>+            receiving a Assert_INT{A,B,C,D}/Desassert_INT{A,B,C,D} message</div><div class='add'>+            from the downstream device.</div><div class='add'>+          pattern: "^int(a|b|c|d)$"</div><div class='add'>+        - description:</div><div class='add'>+            Error condition detected and a flag is set in the Root Error Status</div><div class='add'>+            register of the AER capability. It's asserted when the RC</div><div class='add'>+            internally generated an error or an error message is received by</div><div class='add'>+            the RC.</div><div class='add'>+          const: aer</div><div class='add'>+        - description:</div><div class='add'>+            PME message is received by the port. That means having the PME</div><div class='add'>+            status bit set in the Root Status register (the event is</div><div class='add'>+            supposed to be unmasked in the Root Control register).</div><div class='add'>+          const: pme</div><div class='add'>+        - description:</div><div class='add'>+            Hot-plug event is detected. That is a bit has been set in the</div><div class='add'>+            Slot Status register and the corresponding event is enabled in</div><div class='add'>+            the Slot Control register.</div><div class='add'>+          const: hp</div><div class='add'>+        - description:</div><div class='add'>+            Link Autonomous Bandwidth Status flag has been set in the Link</div><div class='add'>+            Status register (the event is supposed to be unmasked in the</div><div class='add'>+            Link Control register).</div><div class='add'>+          const: bw_au</div><div class='add'>+        - description:</div><div class='add'>+            Bandwidth Management Status flag has been set in the Link</div><div class='add'>+            Status register (the event is supposed to be unmasked in the</div><div class='add'>+            Link Control register).</div><div class='add'>+          const: bw_mg</div><div class='add'>+        - description:</div><div class='add'>+            Vendor-specific IRQ names. Consider using the generic names above</div><div class='add'>+            for new bindings.</div><div class='add'>+          oneOf:</div><div class='add'>+            - description: See native "app" IRQ for details</div><div class='add'>+              enum: [ intr ]</div><div class='add'>+    allOf:</div><div class='add'>+      - contains:</div><div class='add'>+          const: msi</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='add'>+  - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - compatible</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    bus {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;1&gt;;</div><div class='del'>-      pcie@dfc00000 {</div><div class='del'>-        device_type = "pci";</div><div class='del'>-        compatible = "snps,dw-pcie";</div><div class='del'>-        reg = &lt;0xdfc00000 0x0001000&gt;, /* IP registers */</div><div class='del'>-              &lt;0xd0000000 0x0002000&gt;; /* Configuration space */</div><div class='del'>-        reg-names = "dbi", "config";</div><div class='del'>-        #address-cells = &lt;3&gt;;</div><div class='del'>-        #size-cells = &lt;2&gt;;</div><div class='del'>-        ranges = &lt;0x81000000 0 0x00000000 0xde000000 0 0x00010000&gt;,</div><div class='del'>-                 &lt;0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000&gt;;</div><div class='del'>-        interrupts = &lt;25&gt;, &lt;24&gt;;</div><div class='del'>-        #interrupt-cells = &lt;1&gt;;</div><div class='del'>-        num-lanes = &lt;1&gt;;</div><div class='del'>-      };</div><div class='add'>+    pcie@dfc00000 {</div><div class='add'>+      compatible = "snps,dw-pcie";</div><div class='add'>+      device_type = "pci";</div><div class='add'>+      reg = &lt;0xdfc00000 0x0001000&gt;, /* IP registers */</div><div class='add'>+            &lt;0xd0000000 0x0002000&gt;; /* Configuration space */</div><div class='add'>+      reg-names = "dbi", "config";</div><div class='add'>+      #address-cells = &lt;3&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      ranges = &lt;0x81000000 0 0x00000000 0xde000000 0 0x00010000&gt;,</div><div class='add'>+               &lt;0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000&gt;;</div><div class='add'>+      bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;25&gt;, &lt;24&gt;;</div><div class='add'>+      interrupt-names = "msi", "hp";</div><div class='add'>+      #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+      reset-gpios = &lt;&amp;port0 0 1&gt;;</div><div class='add'>+</div><div class='add'>+      phys = &lt;&amp;pcie_phy&gt;;</div><div class='add'>+      phy-names = "pcie";</div><div class='add'>+</div><div class='add'>+      num-lanes = &lt;1&gt;;</div><div class='add'>+      max-link-speed = &lt;3&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml<br/>index 437e61618d06..f0d8e486a07d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml</a></div><div class='hunk'>@@ -15,9 +15,6 @@ description: |</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -29,40 +26,25 @@ properties:</div><div class='ctx'>     maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: dbi</div><div class='del'>-          - const: dbi2</div><div class='del'>-          - const: link</div><div class='del'>-          - const: addr_space</div><div class='del'>-      - items:</div><div class='del'>-          - const: dbi</div><div class='del'>-          - const: dbi2</div><div class='del'>-          - const: link</div><div class='del'>-          - const: addr_space</div><div class='del'>-          - const: atu</div><div class='add'>+    minItems: 4</div><div class='add'>+    items:</div><div class='add'>+      - const: dbi</div><div class='add'>+      - const: dbi2</div><div class='add'>+      - const: link</div><div class='add'>+      - const: addr_space</div><div class='add'>+      - const: atu</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  clock-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:              # for Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - const: link         # for NX1</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:              # for Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - const: link         # for NX1</div><div class='add'>+  reset-names: true</div><div class='ctx'> </div><div class='ctx'>   num-ib-windows:</div><div class='ctx'>     const: 16</div><div class='hunk'>@@ -78,6 +60,46 @@ properties:</div><div class='ctx'>   phy-names:</div><div class='ctx'>     const: pcie-phy</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pro5-pcie-ep</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        reg-names:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 5</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          const: link</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          const: link</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml<br/>new file mode 100644<br/>index 000000000000..638b99db0433<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier PCIe host controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  UniPhier PCIe host controller is based on the Synopsys DesignWare</div><div class='add'>+  PCI core. It shares common features with the PCIe DesignWare core and</div><div class='add'>+  inherits common properties defined in</div><div class='add'>+  Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/snps,dw-pcie.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - socionext,uniphier-pcie</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    items:</div><div class='add'>+      - const: dbi</div><div class='add'>+      - const: link</div><div class='add'>+      - const: config</div><div class='add'>+      - const: atu</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  num-viewport: true</div><div class='add'>+</div><div class='add'>+  num-lanes: true</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: pcie-phy</div><div class='add'>+</div><div class='add'>+  interrupt-controller:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      interrupt-controller: true</div><div class='add'>+</div><div class='add'>+      '#interrupt-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    bus {</div><div class='add'>+        gic: interrupt-controller {</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;3&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    pcie: pcie@66000000 {</div><div class='add'>+        compatible = "socionext,uniphier-pcie";</div><div class='add'>+        reg-names = "dbi", "link", "config";</div><div class='add'>+        reg = &lt;0x66000000 0x1000&gt;, &lt;0x66010000 0x10000&gt;, &lt;0x2fff0000 0x10000&gt;;</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        clocks = &lt;&amp;sys_clk 24&gt;;</div><div class='add'>+        resets = &lt;&amp;sys_rst 24&gt;;</div><div class='add'>+        num-lanes = &lt;1&gt;;</div><div class='add'>+        num-viewport = &lt;1&gt;;</div><div class='add'>+        bus-range = &lt;0x0 0xff&gt;;</div><div class='add'>+        device_type = "pci";</div><div class='add'>+        ranges = &lt;0x81000000 0 0x00000000  0x2ffe0000  0 0x00010000&gt;,</div><div class='add'>+                 &lt;0x82000000 0 0x00000000  0x20000000  0 0x0ffe0000&gt;;</div><div class='add'>+        phy-names = "pcie-phy";</div><div class='add'>+        phys = &lt;&amp;pcie_phy&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        interrupt-names = "dma", "msi";</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        interrupts = &lt;0 224 4&gt;, &lt;0 225 4&gt;;</div><div class='add'>+        interrupt-map-mask = &lt;0 0 0  7&gt;;</div><div class='add'>+        interrupt-map = &lt;0 0 0  1  &amp;pcie_intc 0&gt;,</div><div class='add'>+                        &lt;0 0 0  2  &amp;pcie_intc 1&gt;,</div><div class='add'>+                        &lt;0 0 0  3  &amp;pcie_intc 2&gt;,</div><div class='add'>+                        &lt;0 0 0  4  &amp;pcie_intc 3&gt;;</div><div class='add'>+</div><div class='add'>+        pcie_intc: interrupt-controller {</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+            interrupts = &lt;0 226 4&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml<br/>index aed437dac363..62292185fe2e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/pci/ti,j721e-pci-ep.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI J721E PCI EP (PCIe Wrapper)</div><div class='ctx'> </div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - Kishon Vijay Abraham I &lt;kishon@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "cdns-pcie-ep.yaml#"</div><div class='add'>+  - $ref: cdns-pcie-ep.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -58,6 +58,13 @@ properties:</div><div class='ctx'>   dma-coherent:</div><div class='ctx'>     description: Indicates that the PCIe IP block can ensure the coherency</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: link_state</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml<br/>index 2115d5a3f0e1..a2c5eaea57f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI J721E PCI Host (PCIe Wrapper)</div><div class='ctx'> </div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - Kishon Vijay Abraham I &lt;kishon@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "cdns-pcie-host.yaml#"</div><div class='add'>+  - $ref: cdns-pcie-host.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -66,16 +66,34 @@ properties:</div><div class='ctx'>     const: 0x104c</div><div class='ctx'> </div><div class='ctx'>   device-id:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: 0xb00d</div><div class='del'>-      - items:</div><div class='del'>-          - const: 0xb00f</div><div class='del'>-      - items:</div><div class='del'>-          - const: 0xb010</div><div class='add'>+    enum:</div><div class='add'>+      - 0xb00d</div><div class='add'>+      - 0xb00f</div><div class='add'>+      - 0xb010</div><div class='add'>+      - 0xb013</div><div class='ctx'> </div><div class='ctx'>   msi-map: true</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: link_state</div><div class='add'>+</div><div class='add'>+  interrupt-controller:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      interrupt-controller: true</div><div class='add'>+</div><div class='add'>+      '#interrupt-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml b/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml<br/>index 30b6396d83c8..53da2edd7c9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/toshiba,visconti-pcie.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pci/toshiba,visconti-pcie.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Toshiba Visconti5 SoC PCIe Host Controller Device Tree Bindings</div><div class='add'>+title: Toshiba Visconti5 SoC PCIe Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nobuhiro Iwamatsu &lt;nobuhiro1.iwamatsu@toshiba.co.jp&gt;</div><div class='hunk'>@@ -36,7 +36,7 @@ properties:</div><div class='ctx'>       - const: mpu</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -94,8 +94,9 @@ examples:</div><div class='ctx'>             #interrupt-cells = &lt;1&gt;;</div><div class='ctx'>             ranges = &lt;0x81000000 0 0x40000000 0 0x40000000 0 0x00010000&gt;,</div><div class='ctx'>                      &lt;0x82000000 0 0x50000000 0 0x50000000 0 0x20000000&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            interrupt-names = "intr";</div><div class='add'>+            interrupts = &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-names = "msi", "intr";</div><div class='ctx'>             interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='ctx'>             interrupt-map =</div><div class='ctx'>                 &lt;0 0 0 1 &amp;gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt<br/>deleted file mode 100644<br/>index 359585db049f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/uniphier-pcie.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/uniphier-pcie.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,82 +0,0 @@</div><div class='del'>-Socionext UniPhier PCIe host controller bindings</div><div class='del'>-</div><div class='del'>-This describes the devicetree bindings for PCIe host controller implemented</div><div class='del'>-on Socionext UniPhier SoCs.</div><div class='del'>-</div><div class='del'>-UniPhier PCIe host controller is based on the Synopsys DesignWare PCI core.</div><div class='del'>-It shares common functions with the PCIe DesignWare core driver and inherits</div><div class='del'>-common properties defined in</div><div class='del'>-Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "socionext,uniphier-pcie".</div><div class='del'>-- reg: Specifies offset and length of the register set for the device.</div><div class='del'>-	According to the reg-names, appropriate register sets are required.</div><div class='del'>-- reg-names: Must include the following entries:</div><div class='del'>-    "dbi"    - controller configuration registers</div><div class='del'>-    "link"   - SoC-specific glue layer registers</div><div class='del'>-    "config" - PCIe configuration space</div><div class='del'>-    "atu"    - iATU registers for DWC version 4.80 or later</div><div class='del'>-- clocks: A phandle to the clock gate for PCIe glue layer including</div><div class='del'>-	the host controller.</div><div class='del'>-- resets: A phandle to the reset line for PCIe glue layer including</div><div class='del'>-	the host controller.</div><div class='del'>-- interrupts: A list of interrupt specifiers. According to the</div><div class='del'>-	interrupt-names, appropriate interrupts are required.</div><div class='del'>-- interrupt-names: Must include the following entries:</div><div class='del'>-    "dma" - DMA interrupt</div><div class='del'>-    "msi" - MSI interrupt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- phys: A phandle to generic PCIe PHY. According to the phy-names, appropriate</div><div class='del'>-	phys are required.</div><div class='del'>-- phy-names: Must be "pcie-phy".</div><div class='del'>-</div><div class='del'>-Required sub-node:</div><div class='del'>-- legacy-interrupt-controller: Specifies interrupt controller for legacy PCI</div><div class='del'>-	interrupts.</div><div class='del'>-</div><div class='del'>-Required properties for legacy-interrupt-controller:</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-	interrupt source. The value must be 1.</div><div class='del'>-- interrupt-parent: Phandle to the parent interrupt controller.</div><div class='del'>-- interrupts: An interrupt specifier for legacy interrupt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pcie: pcie@66000000 {</div><div class='del'>-		compatible = "socionext,uniphier-pcie", "snps,dw-pcie";</div><div class='del'>-		status = "disabled";</div><div class='del'>-		reg-names = "dbi", "link", "config";</div><div class='del'>-		reg = &lt;0x66000000 0x1000&gt;, &lt;0x66010000 0x10000&gt;,</div><div class='del'>-		      &lt;0x2fff0000 0x10000&gt;;</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		clocks = &lt;&amp;sys_clk 24&gt;;</div><div class='del'>-		resets = &lt;&amp;sys_rst 24&gt;;</div><div class='del'>-		num-lanes = &lt;1&gt;;</div><div class='del'>-		num-viewport = &lt;1&gt;;</div><div class='del'>-		bus-range = &lt;0x0 0xff&gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		ranges =</div><div class='del'>-		/* downstream I/O */</div><div class='del'>-			&lt;0x81000000 0 0x00000000  0x2ffe0000  0 0x00010000</div><div class='del'>-		/* non-prefetchable memory */</div><div class='del'>-			 0x82000000 0 0x00000000  0x20000000  0 0x0ffe0000&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		interrupt-names = "dma", "msi";</div><div class='del'>-		interrupts = &lt;0 224 4&gt;, &lt;0 225 4&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 0  7&gt;;</div><div class='del'>-		interrupt-map = &lt;0 0 0  1  &amp;pcie_intc 0&gt;,	/* INTA */</div><div class='del'>-				&lt;0 0 0  2  &amp;pcie_intc 1&gt;,	/* INTB */</div><div class='del'>-				&lt;0 0 0  3  &amp;pcie_intc 2&gt;,	/* INTC */</div><div class='del'>-				&lt;0 0 0  4  &amp;pcie_intc 3&gt;;	/* INTD */</div><div class='del'>-</div><div class='del'>-		pcie_intc: legacy-interrupt-controller {</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-			interrupts = &lt;0 226 4&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt<br/>deleted file mode 100644<br/>index f56f8c58c5d9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xilinx-nwl-pcie.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,73 +0,0 @@</div><div class='del'>-* Xilinx NWL PCIe Root Port Bridge DT description</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should contain "xlnx,nwl-pcie-2.11"</div><div class='del'>-- #address-cells: Address representation for root ports, set to &lt;3&gt;</div><div class='del'>-- #size-cells: Size representation for root ports, set to &lt;2&gt;</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-	interrupt source. The value must be 1.</div><div class='del'>-- reg: Should contain Bridge, PCIe Controller registers location,</div><div class='del'>-	configuration space, and length</div><div class='del'>-- reg-names: Must include the following entries:</div><div class='del'>-	"breg": bridge registers</div><div class='del'>-	"pcireg": PCIe controller registers</div><div class='del'>-	"cfg": configuration space region</div><div class='del'>-- device_type: must be "pci"</div><div class='del'>-- interrupts: Should contain NWL PCIe interrupt</div><div class='del'>-- interrupt-names: Must include the following entries:</div><div class='del'>-	"msi1, msi0": interrupt asserted when an MSI is received</div><div class='del'>-	"intx": interrupt asserted when a legacy interrupt is received</div><div class='del'>-	"misc": interrupt asserted when miscellaneous interrupt is received</div><div class='del'>-- interrupt-map-mask and interrupt-map: standard PCI properties to define the</div><div class='del'>-	mapping of the PCI interface to interrupt numbers.</div><div class='del'>-- ranges: ranges for the PCI memory regions (I/O space region is not</div><div class='del'>-	supported by hardware)</div><div class='del'>-	Please refer to the standard PCI bus binding document for a more</div><div class='del'>-	detailed explanation</div><div class='del'>-- msi-controller: indicates that this is MSI controller node</div><div class='del'>-- msi-parent:  MSI parent of the root complex itself</div><div class='del'>-- legacy-interrupt-controller: Interrupt controller device node for Legacy</div><div class='del'>-	interrupts</div><div class='del'>-	- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-	- #interrupt-cells: should be set to 1</div><div class='del'>-	- #address-cells: specifies the number of cells needed to encode an</div><div class='del'>-		address. The value must be 0.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- dma-coherent: present if DMA operations are coherent</div><div class='del'>-- clocks: Input clock specifier. Refer to common clock bindings</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-++++++++</div><div class='del'>-</div><div class='del'>-nwl_pcie: pcie@fd0e0000 {</div><div class='del'>-	#address-cells = &lt;3&gt;;</div><div class='del'>-	#size-cells = &lt;2&gt;;</div><div class='del'>-	compatible = "xlnx,nwl-pcie-2.11";</div><div class='del'>-	#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	msi-controller;</div><div class='del'>-	device_type = "pci";</div><div class='del'>-	interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-	interrupts = &lt;0 114 4&gt;, &lt;0 115 4&gt;, &lt;0 116 4&gt;, &lt;0 117 4&gt;, &lt;0 118 4&gt;;</div><div class='del'>-	interrupt-names = "msi0", "msi1", "intx", "dummy", "misc";</div><div class='del'>-	interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='del'>-	interrupt-map = &lt;0x0 0x0 0x0 0x1 &amp;pcie_intc 0x1&gt;,</div><div class='del'>-			&lt;0x0 0x0 0x0 0x2 &amp;pcie_intc 0x2&gt;,</div><div class='del'>-			&lt;0x0 0x0 0x0 0x3 &amp;pcie_intc 0x3&gt;,</div><div class='del'>-			&lt;0x0 0x0 0x0 0x4 &amp;pcie_intc 0x4&gt;;</div><div class='del'>-</div><div class='del'>-	msi-parent = &lt;&amp;nwl_pcie&gt;;</div><div class='del'>-	reg = &lt;0x0 0xfd0e0000 0x0 0x1000&gt;,</div><div class='del'>-	      &lt;0x0 0xfd480000 0x0 0x1000&gt;,</div><div class='del'>-	      &lt;0x80 0x00000000 0x0 0x1000000&gt;;</div><div class='del'>-	reg-names = "breg", "pcireg", "cfg";</div><div class='del'>-	ranges = &lt;0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000  /* non-prefetchable memory */</div><div class='del'>-		  0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000&gt;;/* prefetchable memory */</div><div class='del'>-</div><div class='del'>-	pcie_intc: legacy-interrupt-controller {</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#address-cells = &lt;0&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/xilinx-pcie.txt b/Documentation/devicetree/bindings/pci/xilinx-pcie.txt<br/>deleted file mode 100644<br/>index fd57a81180a4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/xilinx-pcie.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xilinx-pcie.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,88 +0,0 @@</div><div class='del'>-* Xilinx AXI PCIe Root Port Bridge DT description</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- #address-cells: Address representation for root ports, set to &lt;3&gt;</div><div class='del'>-- #size-cells: Size representation for root ports, set to &lt;2&gt;</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-	interrupt source. The value must be 1.</div><div class='del'>-- compatible: Should contain "xlnx,axi-pcie-host-1.00.a"</div><div class='del'>-- reg: Should contain AXI PCIe registers location and length</div><div class='del'>-- device_type: must be "pci"</div><div class='del'>-- interrupts: Should contain AXI PCIe interrupt</div><div class='del'>-- interrupt-map-mask,</div><div class='del'>-  interrupt-map: standard PCI properties to define the mapping of the</div><div class='del'>-	PCI interface to interrupt numbers.</div><div class='del'>-- ranges: ranges for the PCI memory regions (I/O space region is not</div><div class='del'>-	supported by hardware)</div><div class='del'>-	Please refer to the standard PCI bus binding document for a more</div><div class='del'>-	detailed explanation</div><div class='del'>-</div><div class='del'>-Optional properties for Zynq/Microblaze:</div><div class='del'>-- bus-range: PCI bus numbers covered</div><div class='del'>-</div><div class='del'>-Interrupt controller child node</div><div class='del'>-+++++++++++++++++++++++++++++++</div><div class='del'>-Required properties:</div><div class='del'>-- interrupt-controller: identifies the node as an interrupt controller</div><div class='del'>-- #address-cells: specifies the number of cells needed to encode an</div><div class='del'>-	address. The value must be 0.</div><div class='del'>-- #interrupt-cells: specifies the number of cells needed to encode an</div><div class='del'>-	interrupt source. The value must be 1.</div><div class='del'>-</div><div class='del'>-NOTE:</div><div class='del'>-The core provides a single interrupt for both INTx/MSI messages. So,</div><div class='del'>-created a interrupt controller node to support 'interrupt-map' DT</div><div class='del'>-functionality.  The driver will create an IRQ domain for this map, decode</div><div class='del'>-the four INTx interrupts in ISR and route them to this domain.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-++++++++</div><div class='del'>-Zynq:</div><div class='del'>-	pci_express: axi-pcie@50000000 {</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "xlnx,axi-pcie-host-1.00.a";</div><div class='del'>-		reg = &lt; 0x50000000 0x1000000 &gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		interrupts = &lt; 0 52 4 &gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='del'>-		interrupt-map = &lt;0 0 0 1 &amp;pcie_intc 1&gt;,</div><div class='del'>-				&lt;0 0 0 2 &amp;pcie_intc 2&gt;,</div><div class='del'>-				&lt;0 0 0 3 &amp;pcie_intc 3&gt;,</div><div class='del'>-				&lt;0 0 0 4 &amp;pcie_intc 4&gt;;</div><div class='del'>-		ranges = &lt; 0x02000000 0 0x60000000 0x60000000 0 0x10000000 &gt;;</div><div class='del'>-</div><div class='del'>-		pcie_intc: interrupt-controller {</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#address-cells = &lt;0&gt;;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Microblaze:</div><div class='del'>-	pci_express: axi-pcie@10000000 {</div><div class='del'>-		#address-cells = &lt;3&gt;;</div><div class='del'>-		#size-cells = &lt;2&gt;;</div><div class='del'>-		#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "xlnx,axi-pcie-host-1.00.a";</div><div class='del'>-		reg = &lt;0x10000000 0x4000000&gt;;</div><div class='del'>-		device_type = "pci";</div><div class='del'>-		interrupt-parent = &lt;&amp;microblaze_0_intc&gt;;</div><div class='del'>-		interrupts = &lt;1 2&gt;;</div><div class='del'>-		interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='del'>-		interrupt-map = &lt;0 0 0 1 &amp;pcie_intc 1&gt;,</div><div class='del'>-				&lt;0 0 0 2 &amp;pcie_intc 2&gt;,</div><div class='del'>-				&lt;0 0 0 3 &amp;pcie_intc 3&gt;,</div><div class='del'>-				&lt;0 0 0 4 &amp;pcie_intc 4&gt;;</div><div class='del'>-		ranges = &lt;0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x10000000&gt;;</div><div class='del'>-</div><div class='del'>-		pcie_intc: interrupt-controller {</div><div class='del'>-			interrupt-controller;</div><div class='del'>-			#address-cells = &lt;0&gt;;</div><div class='del'>-			#interrupt-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml<br/>index 32f4641085bc..24ddc2855b94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml</a></div><div class='hunk'>@@ -14,17 +14,23 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: xlnx,versal-cpm-host-1.00</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,versal-cpm-host-1.00</div><div class='add'>+      - xlnx,versal-cpm5-host</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='del'>-      - description: Configuration space region and bridge registers.</div><div class='ctx'>       - description: CPM system level control and status registers.</div><div class='add'>+      - description: Configuration space region and bridge registers.</div><div class='add'>+      - description: CPM5 control and status registers.</div><div class='add'>+    minItems: 2</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: cfg</div><div class='ctx'>       - const: cpm_slcr</div><div class='add'>+      - const: cfg</div><div class='add'>+      - const: cpm_csr</div><div class='add'>+    minItems: 2</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -86,13 +92,43 @@ examples:</div><div class='ctx'>                        ranges = &lt;0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000&gt;,</div><div class='ctx'>                                 &lt;0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000&gt;;</div><div class='ctx'>                        msi-map = &lt;0x0 &amp;its_gic 0x0 0x10000&gt;;</div><div class='del'>-                       reg = &lt;0x6 0x00000000 0x0 0x10000000&gt;,</div><div class='del'>-                             &lt;0x0 0xfca10000 0x0 0x1000&gt;;</div><div class='del'>-                       reg-names = "cfg", "cpm_slcr";</div><div class='add'>+                       reg = &lt;0x0 0xfca10000 0x0 0x1000&gt;,</div><div class='add'>+                             &lt;0x6 0x00000000 0x0 0x10000000&gt;;</div><div class='add'>+                       reg-names = "cpm_slcr", "cfg";</div><div class='ctx'>                        pcie_intc_0: interrupt-controller {</div><div class='ctx'>                                #address-cells = &lt;0&gt;;</div><div class='ctx'>                                #interrupt-cells = &lt;1&gt;;</div><div class='ctx'>                                interrupt-controller;</div><div class='ctx'>                        };</div><div class='ctx'>                };</div><div class='add'>+</div><div class='add'>+               cpm5_pcie: pcie@fcdd0000 {</div><div class='add'>+                       compatible = "xlnx,versal-cpm5-host";</div><div class='add'>+                       device_type = "pci";</div><div class='add'>+                       #address-cells = &lt;3&gt;;</div><div class='add'>+                       #interrupt-cells = &lt;1&gt;;</div><div class='add'>+                       #size-cells = &lt;2&gt;;</div><div class='add'>+                       interrupts = &lt;0 72 4&gt;;</div><div class='add'>+                       interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+                       interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+                       interrupt-map = &lt;0 0 0 1 &amp;pcie_intc_1 0&gt;,</div><div class='add'>+                                       &lt;0 0 0 2 &amp;pcie_intc_1 1&gt;,</div><div class='add'>+                                       &lt;0 0 0 3 &amp;pcie_intc_1 2&gt;,</div><div class='add'>+                                       &lt;0 0 0 4 &amp;pcie_intc_1 3&gt;;</div><div class='add'>+                       bus-range = &lt;0x00 0xff&gt;;</div><div class='add'>+                       ranges = &lt;0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000&gt;,</div><div class='add'>+                                &lt;0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000&gt;;</div><div class='add'>+                       msi-map = &lt;0x0 &amp;its_gic 0x0 0x10000&gt;;</div><div class='add'>+                       reg = &lt;0x00 0xfcdd0000 0x00 0x1000&gt;,</div><div class='add'>+                             &lt;0x06 0x00000000 0x00 0x1000000&gt;,</div><div class='add'>+                             &lt;0x00 0xfce20000 0x00 0x1000000&gt;;</div><div class='add'>+                       reg-names = "cpm_slcr", "cfg", "cpm_csr";</div><div class='add'>+</div><div class='add'>+                       pcie_intc_1: interrupt-controller {</div><div class='add'>+                               #address-cells = &lt;0&gt;;</div><div class='add'>+                               #interrupt-cells = &lt;1&gt;;</div><div class='add'>+                               interrupt-controller;</div><div class='add'>+                       };</div><div class='add'>+               };</div><div class='add'>+</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml b/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml<br/>new file mode 100644<br/>index 000000000000..69b7decabd45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/xlnx,axi-pcie-host.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/xlnx,axi-pcie-host.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx AXI PCIe Root Port Bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thippeswamy Havalige &lt;thippeswamy.havalige@amd.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xlnx,axi-pcie-host-1.00.a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges:</div><div class='add'>+    items:</div><div class='add'>+      - description: |</div><div class='add'>+          ranges for the PCI memory regions (I/O space region is not</div><div class='add'>+          supported by hardware)</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller:</div><div class='add'>+    description: identifies the node as an interrupt controller</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      interrupt-controller: true</div><div class='add'>+</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      "#interrupt-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - interrupt-controller</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#interrupt-cells"</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - ranges</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupt-controller</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    pcie@50000000 {</div><div class='add'>+        compatible = "xlnx,axi-pcie-host-1.00.a";</div><div class='add'>+        reg = &lt;0x50000000 0x1000000&gt;;</div><div class='add'>+        #address-cells = &lt;3&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        device_type = "pci";</div><div class='add'>+        interrupts = &lt;GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-map-mask = &lt;0 0 0 7&gt;;</div><div class='add'>+        interrupt-map = &lt;0 0 0 1 &amp;pcie_intc 1&gt;,</div><div class='add'>+                        &lt;0 0 0 2 &amp;pcie_intc 2&gt;,</div><div class='add'>+                        &lt;0 0 0 3 &amp;pcie_intc 3&gt;,</div><div class='add'>+                        &lt;0 0 0 4 &amp;pcie_intc 4&gt;;</div><div class='add'>+        ranges = &lt;0x02000000 0 0x60000000 0x60000000 0 0x10000000&gt;;</div><div class='add'>+        pcie_intc: interrupt-controller {</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #address-cells = &lt;0&gt;;</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml<br/>new file mode 100644<br/>index 000000000000..897602559b37<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml</a></div><div class='hunk'>@@ -0,0 +1,149 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pci/xlnx,nwl-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx NWL PCIe Root Port Bridge</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thippeswamy Havalige &lt;thippeswamy.havalige@amd.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pci/pci-bus.yaml#</div><div class='add'>+  - $ref: /schemas/interrupt-controller/msi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xlnx,nwl-pcie-2.11</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: PCIe bridge registers location.</div><div class='add'>+      - description: PCIe Controller registers location.</div><div class='add'>+      - description: PCIe Configuration space region.</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: breg</div><div class='add'>+      - const: pcireg</div><div class='add'>+      - const: cfg</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: interrupt asserted when miscellaneous interrupt is received</div><div class='add'>+      - description: unused interrupt(dummy)</div><div class='add'>+      - description: interrupt asserted when a legacy interrupt is received</div><div class='add'>+      - description: msi1 interrupt asserted when an MSI is received</div><div class='add'>+      - description: msi0 interrupt asserted when an MSI is received</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: misc</div><div class='add'>+      - const: dummy</div><div class='add'>+      - const: intx</div><div class='add'>+      - const: msi1</div><div class='add'>+      - const: msi0</div><div class='add'>+</div><div class='add'>+  interrupt-map-mask:</div><div class='add'>+    items:</div><div class='add'>+      - const: 0</div><div class='add'>+      - const: 0</div><div class='add'>+      - const: 0</div><div class='add'>+      - const: 7</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  msi-parent:</div><div class='add'>+    description: MSI controller the device is capable of using.</div><div class='add'>+</div><div class='add'>+  interrupt-map:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-coherent:</div><div class='add'>+    description: optional, only needed if DMA operations are coherent.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: optional, input clock specifier.</div><div class='add'>+</div><div class='add'>+  legacy-interrupt-controller:</div><div class='add'>+    description: Interrupt controller node for handling legacy PCI interrupts.</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      "#interrupt-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "interrupt-controller": true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - "#address-cells"</div><div class='add'>+      - "#interrupt-cells"</div><div class='add'>+      - interrupt-controller</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#interrupt-cells"</div><div class='add'>+  - interrupt-map</div><div class='add'>+  - interrupt-map-mask</div><div class='add'>+  - msi-controller</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/xlnx-zynqmp-power.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        nwl_pcie: pcie@fd0e0000 {</div><div class='add'>+            compatible = "xlnx,nwl-pcie-2.11";</div><div class='add'>+            reg = &lt;0x0 0xfd0e0000 0x0 0x1000&gt;,</div><div class='add'>+                  &lt;0x0 0xfd480000 0x0 0x1000&gt;,</div><div class='add'>+                  &lt;0x80 0x00000000 0x0 0x1000000&gt;;</div><div class='add'>+            reg-names = "breg", "pcireg", "cfg";</div><div class='add'>+            ranges = &lt;0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000&gt;,</div><div class='add'>+                     &lt;0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0&gt;;</div><div class='add'>+            #address-cells = &lt;3&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            msi-controller;</div><div class='add'>+            device_type = "pci";</div><div class='add'>+            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;, &lt;GIC_SPI 116 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                         &lt;GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH&gt;, &lt;GIC_SPI 115 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                         &lt;GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            interrupt-names = "misc", "dummy", "intx", "msi1", "msi0";</div><div class='add'>+            interrupt-map-mask = &lt;0x0 0x0 0x0 0x7&gt;;</div><div class='add'>+            interrupt-map = &lt;0x0 0x0 0x0 0x1 &amp;pcie_intc 0x1&gt;,</div><div class='add'>+                            &lt;0x0 0x0 0x0 0x2 &amp;pcie_intc 0x2&gt;,</div><div class='add'>+                            &lt;0x0 0x0 0x0 0x3 &amp;pcie_intc 0x3&gt;,</div><div class='add'>+                            &lt;0x0 0x0 0x0 0x4 &amp;pcie_intc 0x4&gt;;</div><div class='add'>+            msi-parent = &lt;&amp;nwl_pcie&gt;;</div><div class='add'>+            power-domains = &lt;&amp;zynqmp_firmware PD_PCIE&gt;;</div><div class='add'>+            iommus = &lt;&amp;smmu 0x4d0&gt;;</div><div class='add'>+            pcie_intc: legacy-interrupt-controller {</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #address-cells = &lt;0&gt;;</div><div class='add'>+                #interrupt-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/peci/peci-aspeed.yaml b/Documentation/devicetree/bindings/peci/peci-aspeed.yaml<br/>index 1e68a801a92a..b01e0c8b963d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/peci/peci-aspeed.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/peci/peci-aspeed.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/peci/peci-aspeed.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/peci/peci-aspeed.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/peci/peci-aspeed.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Aspeed PECI Bus Device Tree Bindings</div><div class='add'>+title: Aspeed PECI Bus</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/peci/peci-controller.yaml b/Documentation/devicetree/bindings/peci/peci-controller.yaml<br/>index bbc3d3f3a929..d7853291b060 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/peci/peci-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/peci/peci-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/peci/peci-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/peci/peci-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/peci/peci-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic Device Tree Bindings for PECI</div><div class='add'>+title: Generic for PECI</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml b/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml<br/>new file mode 100644<br/>index 000000000000..50f46a6898b1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic G12 DDR performance monitor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jiucheng Xu &lt;jiucheng.xu@amlogic.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Amlogic G12 series SoC integrate DDR bandwidth monitor.</div><div class='add'>+  A timer is inside and can generate interrupt when timeout.</div><div class='add'>+  The bandwidth is counted in the timer ISR. Different platform</div><div class='add'>+  has different subset of event format attribute.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,g12a-ddr-pmu</div><div class='add'>+      - amlogic,g12b-ddr-pmu</div><div class='add'>+      - amlogic,sm1-ddr-pmu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMC bandwidth register space.</div><div class='add'>+      - description: DMC PLL register space.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: The IRQ of the inside timer timeout.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pmu {</div><div class='add'>+        #address-cells=&lt;2&gt;;</div><div class='add'>+        #size-cells=&lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pmu@ff638000 {</div><div class='add'>+            compatible = "amlogic,g12a-ddr-pmu";</div><div class='add'>+            reg = &lt;0x0 0xff638000 0x0 0x100&gt;,</div><div class='add'>+                  &lt;0x0 0xff638c00 0x0 0x100&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 52 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/perf/arm,ccn.yaml b/Documentation/devicetree/bindings/perf/arm,ccn.yaml<br/>new file mode 100644<br/>index 000000000000..0b0bb2091016<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/arm,ccn.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/perf/arm,ccn.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/perf/arm,ccn.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARM CCN (Cache Coherent Network) Performance Monitors</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Robin Murphy &lt;robin.murphy@arm.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - arm,ccn-502</div><div class='add'>+      - arm,ccn-504</div><div class='add'>+      - arm,ccn-508</div><div class='add'>+      - arm,ccn-512</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ccn@20000000 {</div><div class='add'>+        compatible = "arm,ccn-504";</div><div class='add'>+        reg = &lt;0x20000000 0x1000000&gt;;</div><div class='add'>+        interrupts = &lt;0 181 4&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/perf/arm,cmn.yaml b/Documentation/devicetree/bindings/perf/arm,cmn.yaml<br/>index 2d4219ec7eda..2e51072e794a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/arm,cmn.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/arm,cmn.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/arm,cmn.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/perf/arm,cmn.yaml</a></div><div class='hunk'>@@ -14,6 +14,8 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - arm,cmn-600</div><div class='add'>+      - arm,cmn-650</div><div class='add'>+      - arm,cmn-700</div><div class='ctx'>       - arm,ci-700</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml b/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml<br/>index c87821be158b..a740378ed592 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/perf/arm,dsu-pmu.yaml</a></div><div class='hunk'>@@ -32,11 +32,8 @@ properties:</div><div class='ctx'>       - description: nCLUSTERPMUIRQ interrupt</div><div class='ctx'> </div><div class='ctx'>   cpus:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 12</div><div class='del'>-    items:</div><div class='del'>-      maxItems: 1</div><div class='ctx'>     description: List of phandles for the CPUs connected to this DSU instance.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/perf/arm-ccn.txt b/Documentation/devicetree/bindings/perf/arm-ccn.txt<br/>deleted file mode 100644<br/>index 1c53b5aa3317..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/arm-ccn.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/perf/arm-ccn.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-* ARM CCN (Cache Coherent Network)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: (standard compatible string) should be one of:</div><div class='del'>-	"arm,ccn-502"</div><div class='del'>-	"arm,ccn-504"</div><div class='del'>-	"arm,ccn-508"</div><div class='del'>-	"arm,ccn-512"</div><div class='del'>-</div><div class='del'>-- reg: (standard registers property) physical address and size</div><div class='del'>-	(16MB) of the configuration registers block</div><div class='del'>-</div><div class='del'>-- interrupts: (standard interrupt property) single interrupt</div><div class='del'>-	generated by the control block</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	ccn@2000000000 {</div><div class='del'>-		compatible = "arm,ccn-504";</div><div class='del'>-		reg = &lt;0x20 0x00000000 0 0x1000000&gt;;</div><div class='del'>-		interrupts = &lt;0 181 4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/perf/riscv,pmu.yaml b/Documentation/devicetree/bindings/perf/riscv,pmu.yaml<br/>new file mode 100644<br/>index 000000000000..c8448de2f2a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/riscv,pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/perf/riscv,pmu.yaml</a></div><div class='hunk'>@@ -0,0 +1,160 @@</div><div class='add'>+# SPDX-License-Identifier: BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/perf/riscv,pmu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RISC-V SBI PMU events</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Atish Patra &lt;atishp@rivosinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The SBI PMU extension allows supervisor software to configure, start and</div><div class='add'>+  stop any performance counter at anytime. Thus, a user can leverage all</div><div class='add'>+  capabilities of performance analysis tools, such as perf, if the SBI PMU</div><div class='add'>+  extension is enabled. The following constraints apply:</div><div class='add'>+</div><div class='add'>+    The platform must provide information about PMU event to counter mappings</div><div class='add'>+    either via device tree or another way, specific to the platform.</div><div class='add'>+    Without the event to counter mappings, the SBI PMU extension cannot be used.</div><div class='add'>+</div><div class='add'>+    Platforms should provide information about the PMU event selector values</div><div class='add'>+    that should be encoded in the expected value of MHPMEVENTx while configuring</div><div class='add'>+    MHPMCOUNTERx for that specific event. The can either be done via device tree</div><div class='add'>+    or another way, specific to the platform.</div><div class='add'>+    The exact value to be written to MHPMEVENTx is completely dependent on the</div><div class='add'>+    platform.</div><div class='add'>+</div><div class='add'>+    For information on the SBI specification see the section "Performance</div><div class='add'>+    Monitoring Unit Extension" of:</div><div class='add'>+      https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: riscv,pmu</div><div class='add'>+</div><div class='add'>+  riscv,event-to-mhpmevent:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    description:</div><div class='add'>+      Represents an ONE-to-ONE mapping between a PMU event and the event</div><div class='add'>+      selector value that the platform expects to be written to the MHPMEVENTx</div><div class='add'>+      CSR for that event.</div><div class='add'>+      The mapping is encoded in an matrix format where each element represents</div><div class='add'>+      an event.</div><div class='add'>+      This property shouldn't encode any raw hardware event.</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: event_idx, a 20-bit wide encoding of the event type and</div><div class='add'>+            code. Refer to the SBI specification for a complete description of</div><div class='add'>+            the event types and codes.</div><div class='add'>+        - description: upper 32 bits of the event selector value for MHPMEVENTx</div><div class='add'>+        - description: lower 32 bits of the event selector value for MHPMEVENTx</div><div class='add'>+</div><div class='add'>+  riscv,event-to-mhpmcounters:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    description:</div><div class='add'>+      Represents a MANY-to-MANY mapping between a range of events and all the</div><div class='add'>+      MHPMCOUNTERx in a bitmap format that can be used to monitor these range</div><div class='add'>+      of events. The information is encoded in an matrix format where each</div><div class='add'>+      element represents a certain range of events and corresponding counters.</div><div class='add'>+      This property shouldn't encode any raw event.</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: first event_idx of the range of events</div><div class='add'>+        - description: last event_idx of the range of events</div><div class='add'>+        - description: bitmap of MHPMCOUNTERx for this event</div><div class='add'>+</div><div class='add'>+  riscv,raw-event-to-mhpmcounters:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    description:</div><div class='add'>+      Represents an ONE-to-MANY or MANY-to-MANY mapping between the rawevent(s)</div><div class='add'>+      and all the MHPMCOUNTERx in a bitmap format that can be used to monitor</div><div class='add'>+      that raw event.</div><div class='add'>+      The encoding of the raw events are platform specific. The information is</div><div class='add'>+      encoded in a matrix format where each element represents the specific raw</div><div class='add'>+      event(s).</div><div class='add'>+      If a platform directly encodes each raw PMU event as a unique ID, the</div><div class='add'>+      value of variant must be 0xffffffff_ffffffff.</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description:</div><div class='add'>+            upper 32 invariant bits for the range of events</div><div class='add'>+        - description:</div><div class='add'>+            lower 32 invariant bits for the range of events</div><div class='add'>+        - description:</div><div class='add'>+            upper 32 bits of the variant bit mask for the range of events</div><div class='add'>+        - description:</div><div class='add'>+            lower 32 bits of the variant bit mask for the range of events</div><div class='add'>+        - description:</div><div class='add'>+            bitmap of all MHPMCOUNTERx that can monitor the range of events</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  "riscv,event-to-mhpmevent": [ "riscv,event-to-mhpmcounters" ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pmu {</div><div class='add'>+        compatible = "riscv,pmu";</div><div class='add'>+        riscv,event-to-mhpmevent = &lt;0x0000B 0x0000 0x0001&gt;;</div><div class='add'>+        riscv,event-to-mhpmcounters = &lt;0x00001 0x00001 0x00000001&gt;,</div><div class='add'>+                                      &lt;0x00002 0x00002 0x00000004&gt;,</div><div class='add'>+                                      &lt;0x00003 0x0000A 0x00000ff8&gt;,</div><div class='add'>+                                      &lt;0x10000 0x10033 0x000ff000&gt;;</div><div class='add'>+        riscv,raw-event-to-mhpmcounters =</div><div class='add'>+            /* For event ID 0x0002 */</div><div class='add'>+            &lt;0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8&gt;,</div><div class='add'>+            /* For event ID 0-4 */</div><div class='add'>+            &lt;0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0&gt;,</div><div class='add'>+            /* For event ID 0xffffffff0000000f - 0xffffffff000000ff */</div><div class='add'>+            &lt;0xffffffff 0x0 0xffffffff 0xffffff0f 0x00000ff0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    /*</div><div class='add'>+     * For HiFive Unmatched board the encodings can be found here</div><div class='add'>+     * https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16acba_fu740-c000-manual-v1p6.pdf</div><div class='add'>+     *</div><div class='add'>+     * This example also binds standard SBI PMU hardware IDs to U74 PMU event</div><div class='add'>+     * codes, U74 uses a bitfield for events encoding, so several U74 events</div><div class='add'>+     * can be bound to a single perf ID.</div><div class='add'>+     * See SBI PMU hardware IDs in arch/riscv/include/asm/sbi.h</div><div class='add'>+     */</div><div class='add'>+    pmu {</div><div class='add'>+          compatible = "riscv,pmu";</div><div class='add'>+          riscv,event-to-mhpmevent =</div><div class='add'>+              /* SBI_PMU_HW_CACHE_REFERENCES -&gt; Instruction or Data cache/ITIM busy */</div><div class='add'>+              &lt;0x00003 0x00000000 0x1801&gt;,</div><div class='add'>+              /* SBI_PMU_HW_CACHE_MISSES -&gt; Instruction or Data cache miss or MMIO access */</div><div class='add'>+              &lt;0x00004 0x00000000 0x0302&gt;,</div><div class='add'>+              /* SBI_PMU_HW_BRANCH_INSTRUCTIONS -&gt; Conditional branch retired */</div><div class='add'>+              &lt;0x00005 0x00000000 0x4000&gt;,</div><div class='add'>+              /* SBI_PMU_HW_BRANCH_MISSES -&gt; Branch or jump misprediction */</div><div class='add'>+              &lt;0x00006 0x00000000 0x6001&gt;,</div><div class='add'>+              /* L1D_READ_MISS -&gt; Data cache miss or MMIO access */</div><div class='add'>+              &lt;0x10001 0x00000000 0x0202&gt;,</div><div class='add'>+              /* L1D_WRITE_ACCESS -&gt; Data cache write-back */</div><div class='add'>+              &lt;0x10002 0x00000000 0x0402&gt;,</div><div class='add'>+              /* L1I_READ_ACCESS -&gt; Instruction cache miss */</div><div class='add'>+              &lt;0x10009 0x00000000 0x0102&gt;,</div><div class='add'>+              /* LL_READ_MISS -&gt; UTLB miss */</div><div class='add'>+              &lt;0x10011 0x00000000 0x2002&gt;,</div><div class='add'>+              /* DTLB_READ_MISS -&gt; Data TLB miss */</div><div class='add'>+              &lt;0x10019 0x00000000 0x1002&gt;,</div><div class='add'>+              /* ITLB_READ_MISS-&gt; Instruction TLB miss */</div><div class='add'>+              &lt;0x10021 0x00000000 0x0802&gt;;</div><div class='add'>+          riscv,event-to-mhpmcounters = &lt;0x00003 0x00006 0x18&gt;,</div><div class='add'>+                                        &lt;0x10001 0x10002 0x18&gt;,</div><div class='add'>+                                        &lt;0x10009 0x10009 0x18&gt;,</div><div class='add'>+                                        &lt;0x10011 0x10011 0x18&gt;,</div><div class='add'>+                                        &lt;0x10019 0x10019 0x18&gt;,</div><div class='add'>+                                        &lt;0x10021 0x10021 0x18&gt;;</div><div class='add'>+          riscv,raw-event-to-mhpmcounters = &lt;0x0 0x0 0xffffffff 0xfc0000ff 0x18&gt;,</div><div class='add'>+                                            &lt;0x0 0x1 0xffffffff 0xfff800ff 0x18&gt;,</div><div class='add'>+                                            &lt;0x0 0x2 0xffffffff 0xffffe0ff 0x18&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/perf/spe-pmu.yaml b/Documentation/devicetree/bindings/perf/spe-pmu.yaml<br/>new file mode 100644<br/>index 000000000000..7d74152f437e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/perf/spe-pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/perf/spe-pmu.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/perf/spe-pmu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Will Deacon &lt;will@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  ARMv8.2 introduces the optional Statistical Profiling Extension for collecting</div><div class='add'>+  performance sample data using an in-memory trace buffer.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: arm,statistical-profiling-extension-v1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+      The PPI to signal SPE events. For heterogeneous systems where SPE is only</div><div class='add'>+      supported on a subset of the CPUs, please consult the arm,gic-v3 binding</div><div class='add'>+      for details on describing a PPI partition.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    spe-pmu {</div><div class='add'>+        compatible = "arm,statistical-profiling-extension-v1";</div><div class='add'>+        interrupts = &lt;GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml<br/>index 77606c899fe2..4fff091bd534 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A10 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml<br/>index 0fa4b32b097e..f557feca9763 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun50i-a64-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A64 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A64 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml<br/>index e632140722a2..4480fdedd669 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner H6 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner H6 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml<br/>index c03b83103e87..cf4eed230565 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb3-phy.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Ondrej Jirman &lt;megous@megous.com&gt;</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/allwinner,sun50i-h6-usb3-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Allwinner H6 USB3 PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml<br/>index 5bad9b06e2e7..1563e3df3052 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun5i-a13-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A13 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A13 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml<br/>index d0b541a461f3..6a4fd4929959 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 MIPI D-PHY Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A31 MIPI D-PHY Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -17,13 +17,20 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - const: allwinner,sun6i-a31-mipi-dphy</div><div class='add'>+      - const: allwinner,sun50i-a100-mipi-dphy</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: allwinner,sun50i-a64-mipi-dphy</div><div class='ctx'>           - const: allwinner,sun6i-a31-mipi-dphy</div><div class='add'>+      - items:</div><div class='add'>+          - const: allwinner,sun20i-d1-mipi-dphy</div><div class='add'>+          - const: allwinner,sun50i-a100-mipi-dphy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Bus Clock</div><div class='hunk'>@@ -37,10 +44,23 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  allwinner,direction:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      Direction of the D-PHY:</div><div class='add'>+      - "rx" for receiving (e.g. when used with MIPI CSI-2);</div><div class='add'>+      - "tx" for transmitting (e.g. when used with MIPI DSI).</div><div class='add'>+</div><div class='add'>+    enum:</div><div class='add'>+      - tx</div><div class='add'>+      - rx</div><div class='add'>+    default: tx</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - "#phy-cells"</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - interrupts</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - resets</div><div class='hunk'>@@ -49,9 +69,12 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='ctx'>     dphy0: d-phy@1ca1000 {</div><div class='ctx'>         compatible = "allwinner,sun6i-a31-mipi-dphy";</div><div class='ctx'>         reg = &lt;0x01ca1000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>         clocks = &lt;&amp;ccu 23&gt;, &lt;&amp;ccu 97&gt;;</div><div class='ctx'>         clock-names = "bus", "mod";</div><div class='ctx'>         resets = &lt;&amp;ccu 4&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml<br/>index 922b4665e00d..4897a3d2fbc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A31 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml<br/>index a94019efc2f3..99de9c6889a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a23-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A23 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A23 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml<br/>index 33f3ddc0492d..73438d84de50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A83t USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A83t USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml<br/>index e288450e0844..2df012d13655 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun8i-h3-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner H3 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner H3 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -36,18 +36,22 @@ properties:</div><div class='ctx'>       - const: pmu3</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 4</div><div class='ctx'>     items:</div><div class='ctx'>       - description: USB OTG PHY bus clock</div><div class='ctx'>       - description: USB Host 0 PHY bus clock</div><div class='ctx'>       - description: USB Host 1 PHY bus clock</div><div class='ctx'>       - description: USB Host 2 PHY bus clock</div><div class='add'>+      - description: PMU clock for host port 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 4</div><div class='ctx'>     items:</div><div class='ctx'>       - const: usb0_phy</div><div class='ctx'>       - const: usb1_phy</div><div class='ctx'>       - const: usb2_phy</div><div class='ctx'>       - const: usb3_phy</div><div class='add'>+      - const: pmu2_clk</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -96,6 +100,28 @@ required:</div><div class='ctx'>   - resets</div><div class='ctx'>   - reset-names</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - allwinner,sun50i-h616-usb-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 4</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml<br/>index d947e50a49d2..2dd31630c13e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner R40 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner R40 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml<br/>index a2836c296cc4..395d33855d48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun8i-v3s-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner V3s USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner V3s USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml<br/>index 2eb493fa64fd..bd9445f6f130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/allwinner,sun9i-a80-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A80 USB PHY Device Tree Bindings</div><div class='add'>+title: Allwinner A80 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml<br/>new file mode 100644<br/>index 000000000000..948839499235<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/allwinner,suniv-f1c100s-usb-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/allwinner,suniv-f1c100s-usb-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner F1C100s USB PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+  - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    const: allwinner,suniv-f1c100s-usb-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: PHY Control registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    const: phy_ctrl</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: USB OTG PHY bus clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: usb0_phy</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: USB OTG reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: usb0_reset</div><div class='add'>+</div><div class='add'>+  usb0_id_det-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO to the USB OTG ID pin</div><div class='add'>+</div><div class='add'>+  usb0_vbus_det-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: GPIO to the USB OTG VBUS detect pin</div><div class='add'>+</div><div class='add'>+  usb0_vbus_power-supply:</div><div class='add'>+    description: Power supply to detect the USB OTG VBUS</div><div class='add'>+</div><div class='add'>+  usb0_vbus-supply:</div><div class='add'>+    description: Regulator controlling USB OTG VBUS</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/suniv-ccu-f1c100s.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/suniv-ccu-f1c100s.h&gt;</div><div class='add'>+</div><div class='add'>+    phy@1c13400 {</div><div class='add'>+        compatible = "allwinner,suniv-f1c100s-usb-phy";</div><div class='add'>+        reg = &lt;0x01c13400 0x10&gt;;</div><div class='add'>+        reg-names = "phy_ctrl";</div><div class='add'>+        clocks = &lt;&amp;ccu CLK_USB_PHY0&gt;;</div><div class='add'>+        clock-names = "usb0_phy";</div><div class='add'>+        resets = &lt;&amp;ccu RST_USB_PHY0&gt;;</div><div class='add'>+        reset-names = "usb0_reset";</div><div class='add'>+        #phy-cells = &lt;1&gt;;</div><div class='add'>+        usb0_id_det-gpios = &lt;&amp;pio 4 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml b/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml<br/>index be485f500887..64795f170f32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,axg-mipi-dphy.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2020 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/amlogic,axg-mipi-dphy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,axg-mipi-dphy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic AXG MIPI D-PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml<br/>new file mode 100644<br/>index 000000000000..c8c83acfb871<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,g12a-mipi-dphy-analog.yaml</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,g12a-mipi-dphy-analog.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic G12A MIPI analog PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amlogic,g12a-mipi-dphy-analog</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    phy@0 {</div><div class='add'>+          compatible = "amlogic,g12a-mipi-dphy-analog";</div><div class='add'>+          reg = &lt;0x0 0xc&gt;;</div><div class='add'>+          #phy-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,g12a-usb2-phy.yaml<br/>index 399ebde45409..0031fb6a4e76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,g12a-usb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,g12a-usb2-phy.yaml</a></div><div class='hunk'>@@ -2,19 +2,19 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb2-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,g12a-usb2-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic G12A USB2 PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='del'>-      - amlogic,meson-g12a-usb2-phy</div><div class='del'>-      - amlogic,meson-a1-usb2-phy</div><div class='add'>+      - amlogic,g12a-usb2-phy</div><div class='add'>+      - amlogic,a1-usb2-phy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -68,7 +68,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     phy@36000 {</div><div class='del'>-          compatible = "amlogic,meson-g12a-usb2-phy";</div><div class='add'>+          compatible = "amlogic,g12a-usb2-phy";</div><div class='ctx'>           reg = &lt;0x36000 0x2000&gt;;</div><div class='ctx'>           clocks = &lt;&amp;xtal&gt;;</div><div class='ctx'>           clock-names = "xtal";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,g12a-usb3-pcie-phy.yaml<br/>index 453c083cf44c..1a5a12adb72b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,g12a-usb3-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,g12a-usb3-pcie-phy.yaml</a></div><div class='hunk'>@@ -2,18 +2,18 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,g12a-usb3-pcie-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic G12A USB3 + PCIE Combo PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='del'>-      - amlogic,meson-g12a-usb3-pcie-phy</div><div class='add'>+      - amlogic,g12a-usb3-pcie-phy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -35,6 +35,11 @@ properties:</div><div class='ctx'>   "#phy-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  phy-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to a regulator that provides power to the PHY. This</div><div class='add'>+      regulator will be managed during the PHY power on/off sequence.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -49,7 +54,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     phy@46000 {</div><div class='del'>-          compatible = "amlogic,meson-g12a-usb3-pcie-phy";</div><div class='add'>+          compatible = "amlogic,g12a-usb3-pcie-phy";</div><div class='ctx'>           reg = &lt;0x46000 0x2000&gt;;</div><div class='ctx'>           clocks = &lt;&amp;ref_clk&gt;;</div><div class='ctx'>           clock-names = "ref_clk";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml<br/>index 4d01f3124e1c..009a39808318 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/amlogic,meson-axg-mipi-pcie-analog.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,meson-axg-mipi-pcie-analog.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic AXG shared MIPI/PCIE analog PHY</div><div class='ctx'> </div><div class='hunk'>@@ -16,7 +16,7 @@ description: |+</div><div class='ctx'>   - compatible: Should be the following:</div><div class='ctx'>                 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"</div><div class='ctx'> </div><div class='del'>-  Refer to the the bindings described in</div><div class='add'>+  Refer to the bindings described in</div><div class='ctx'>   Documentation/devicetree/bindings/mfd/syscon.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml<br/>index 45f3d72b1cca..40fbf8ac3271 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/amlogic,meson-axg-pcie.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,meson-axg-pcie.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic AXG PCIE PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-gxl-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-gxl-usb2-phy.yaml<br/>new file mode 100644<br/>index 000000000000..c2f5c9d2fce6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson-gxl-usb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,meson-gxl-usb2-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,meson-gxl-usb2-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson GXL USB2 PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amlogic,meson-gxl-usb2-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  phy-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    phy@78000 {</div><div class='add'>+        compatible = "amlogic,meson-gxl-usb2-phy";</div><div class='add'>+        reg = &lt;0x78000 0x20&gt;;</div><div class='add'>+        clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+        clock-names = "phy";</div><div class='add'>+        resets = &lt;&amp;phy_reset&gt;;</div><div class='add'>+        reset-names = "phy";</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        phy-supply = &lt;&amp;usb2_supply&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml<br/>index 1f085cdd1c85..6f9fd1c953f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml<br/>index 03c4809dbe8d..df68bfe5f407 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/amlogic,meson8b-usb2-phy.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/amlogic,meson8b-usb2-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/amlogic,meson8b-usb2-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml<br/>index 0f0bcde9eb88..bd527f566c3b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/brcm,bcm63xx-usbh-phy.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/brcm,bcm63xx-usbh-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/brcm,bcm63xx-usbh-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: BCM63xx USBH PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml<br/>index 045699c65779..808e90b2465d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml</a></div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^pcie-phy@[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: &gt;</div><div class='ctx'>       PCIe PHY child nodes</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml<br/>index 70eb48b391c9..527010702f5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/brcm,ns2-pcie-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/brcm,ns2-pcie-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom NS2 PCIe PHY binding document</div><div class='add'>+title: Broadcom NS2 PCIe PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ray Jui &lt;ray.jui@broadcom.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml<br/>index cb1aa325336f..8467c8e6368c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/brcm,sata-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/brcm,sata-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Broadcom SATA3 PHY</div><div class='ctx'> </div><div class='hunk'>@@ -102,19 +102,17 @@ if:</div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='ctx'>     reg:</div><div class='del'>-      maxItems: 2</div><div class='add'>+      minItems: 2</div><div class='add'>+</div><div class='ctx'>     reg-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: "phy"</div><div class='del'>-        - const: "phy-ctrl"</div><div class='add'>+      minItems: 2</div><div class='ctx'> else:</div><div class='ctx'>   properties:</div><div class='ctx'>     reg:</div><div class='ctx'>       maxItems: 1</div><div class='add'>+</div><div class='ctx'>     reg-names:</div><div class='ctx'>       maxItems: 1</div><div class='del'>-      items:</div><div class='del'>-        - const: "phy"</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml b/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml<br/>index 41ee16e21f8d..d05a7c793035 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/calxeda-combophy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/calxeda-combophy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/calxeda-combophy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Calxeda Highbank Combination PHYs binding for SATA</div><div class='add'>+title: Calxeda Highbank Combination PHYs for SATA</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Calxeda Combination PHYs connect the SoC to the internal fabric</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml b/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml<br/>index 07be031d82e6..6fdd46ad5a78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/cdns,dphy-rx.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/cdns,dphy-rx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence DPHY Rx Device Tree Bindings</div><div class='add'>+title: Cadence DPHY Rx</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Pratyush Yadav &lt;p.yadav@ti.com&gt;</div><div class='add'>+  - Pratyush Yadav &lt;pratyush@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/cdns,dphy.yaml b/Documentation/devicetree/bindings/phy/cdns,dphy.yaml<br/>index c50629bd1b51..6cd9b0f388a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/cdns,dphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/cdns,dphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/cdns,dphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/cdns,dphy.yaml</a></div><div class='hunk'>@@ -4,15 +4,16 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/cdns,dphy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence DPHY Device Tree Bindings</div><div class='add'>+title: Cadence DPHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Pratyush Yadav &lt;p.yadav@ti.com&gt;</div><div class='add'>+  - Pratyush Yadav &lt;pratyush@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - const: cdns,dphy</div><div class='add'>+    enum:</div><div class='add'>+      - cdns,dphy</div><div class='add'>+      - ti,j721e-dphy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml b/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml<br/>index 3a07285b5470..c9e65a2facd5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/cdns,salvo-phy.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (c) 2020 NXP</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/cdns,salvo-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/cdns,salvo-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Cadence SALVO PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml<br/>index b6421eedece3..182a219387b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale i.MX8 SoC series PCIe PHY Device Tree Bindings</div><div class='add'>+title: Freescale i.MX8 SoC series PCIe PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Richard Zhu &lt;hongxing.zhu@nxp.com&gt;</div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - fsl,imx8mm-pcie-phy</div><div class='add'>+      - fsl,imx8mp-pcie-phy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -28,11 +29,16 @@ properties:</div><div class='ctx'>       - const: ref</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: pciephy</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:          # for iMX8MM</div><div class='add'>+          - const: pciephy</div><div class='add'>+      - items:          # for IMX8MP</div><div class='add'>+          - const: pciephy</div><div class='add'>+          - const: perst</div><div class='ctx'> </div><div class='ctx'>   fsl,refclk-pad-mode:</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -60,6 +66,10 @@ properties:</div><div class='ctx'>     description: A boolean property indicating the CLKREQ# signal is</div><div class='ctx'>       not supported in the board design (optional)</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    description: PCIe PHY  power domain (optional).</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - "#phy-cells"</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml<br/>index 2936f3510a6a..e6f9f5540cc3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale i.MX8MQ USB3 PHY binding</div><div class='add'>+title: Freescale i.MX8MQ USB3 PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Li Jun &lt;jun.li@nxp.com&gt;</div><div class='hunk'>@@ -28,6 +28,9 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: phy</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   vbus-supply:</div><div class='ctx'>     description:</div><div class='ctx'>       A phandle to the regulator for USB VBUS.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8qm-lvds-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8qm-lvds-phy.yaml<br/>new file mode 100644<br/>index 000000000000..8767e48c71a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/fsl,imx8qm-lvds-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/fsl,imx8qm-lvds-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/fsl,imx8qm-lvds-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mixel LVDS PHY for Freescale i.MX8qm SoC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Liu Ying &lt;victor.liu@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Mixel LVDS PHY IP block is found on Freescale i.MX8qm SoC.</div><div class='add'>+  It converts two groups of four 7/10 bits of CMOS data into two</div><div class='add'>+  groups of four data lanes of LVDS data streams. A phase-locked</div><div class='add'>+  transmit clock is transmitted in parallel with each group of</div><div class='add'>+  data streams over a fifth LVDS link. Every cycle of the transmit</div><div class='add'>+  clock, 56/80 bits of input data are sampled and transmitted</div><div class='add'>+  through the two groups of LVDS data streams. Together with the</div><div class='add'>+  transmit clocks, the two groups of LVDS data streams form two</div><div class='add'>+  LVDS channels.</div><div class='add'>+</div><div class='add'>+  The Mixel LVDS PHY found on Freescale i.MX8qm SoC is controlled</div><div class='add'>+  by Control and Status Registers(CSR) module in the SoC. The CSR</div><div class='add'>+  module, as a system controller, contains the PHY's registers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8qm-lvds-phy</div><div class='add'>+      - mixel,28fdsoi-lvds-1250-8ch-tx-pll</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 1</div><div class='add'>+    description: |</div><div class='add'>+      Cell allows setting the LVDS channel index of the PHY.</div><div class='add'>+      Index 0 is for LVDS channel0 and index 1 is for LVDS channel1.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/firmware/imx/rsrc.h&gt;</div><div class='add'>+    phy {</div><div class='add'>+        compatible = "fsl,imx8qm-lvds-phy";</div><div class='add'>+        #phy-cells = &lt;1&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_PHY&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pd IMX_SC_R_LVDS_0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml b/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml<br/>index 4d91e2f4f247..ff9f9ca0f19c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/fsl,lynx-28g.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale Lynx 28G SerDes PHY binding</div><div class='add'>+title: Freescale Lynx 28G SerDes PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ioana Ciornei &lt;ioana.ciornei@nxp.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml<br/>index c2e073e26190..405c6b0b88c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml</a></div><div class='hunk'>@@ -19,15 +19,16 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   hisilicon,pericrg-syscon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle of syscon used to control iso refclk.</div><div class='ctx'> </div><div class='ctx'>   hisilicon,pctrl-syscon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle of syscon used to control usb tcxo.</div><div class='ctx'> </div><div class='ctx'>   hisilicon,eye-diagram-param:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 1</div><div class='ctx'>     description: Eye diagram for phy.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -41,20 +42,10 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    bus {</div><div class='del'>-      #address-cells = &lt;2&gt;;</div><div class='del'>-      #size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-      usb3_otg_bc: usb3_otg_bc@ff200000 {</div><div class='del'>-        compatible = "syscon", "simple-mfd";</div><div class='del'>-        reg = &lt;0x0 0xff200000 0x0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-        usb-phy {</div><div class='del'>-          compatible = "hisilicon,hi3660-usb-phy";</div><div class='del'>-          #phy-cells = &lt;0&gt;;</div><div class='del'>-          hisilicon,pericrg-syscon = &lt;&amp;crg_ctrl&gt;;</div><div class='del'>-          hisilicon,pctrl-syscon = &lt;&amp;pctrl&gt;;</div><div class='del'>-          hisilicon,eye-diagram-param = &lt;0x22466e4&gt;;</div><div class='del'>-        };</div><div class='del'>-      };</div><div class='add'>+    usb-phy {</div><div class='add'>+        compatible = "hisilicon,hi3660-usb-phy";</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        hisilicon,pericrg-syscon = &lt;&amp;crg_ctrl&gt;;</div><div class='add'>+        hisilicon,pctrl-syscon = &lt;&amp;pctrl&gt;;</div><div class='add'>+        hisilicon,eye-diagram-param = &lt;0x22466e4&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml<br/>index ebd78acfe2de..a1a8a84dfc54 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml</a></div><div class='hunk'>@@ -20,19 +20,20 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   hisilicon,pericrg-syscon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle of syscon used to control iso refclk.</div><div class='ctx'> </div><div class='ctx'>   hisilicon,pctrl-syscon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle of syscon used to control usb tcxo.</div><div class='ctx'> </div><div class='ctx'>   hisilicon,sctrl-syscon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle of syscon used to control phy deep sleep.</div><div class='ctx'> </div><div class='ctx'>   hisilicon,eye-diagram-param:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 1</div><div class='ctx'>     description: Eye diagram for phy.</div><div class='ctx'> </div><div class='ctx'>   hisilicon,tx-vboost-lvl:</div><div class='hunk'>@@ -52,22 +53,12 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    bus {</div><div class='del'>-      #address-cells = &lt;2&gt;;</div><div class='del'>-      #size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-      usb3_otg_bc: usb3_otg_bc@ff200000 {</div><div class='del'>-        compatible = "syscon", "simple-mfd";</div><div class='del'>-        reg = &lt;0x0 0xff200000 0x0 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-        usb_phy {</div><div class='del'>-          compatible = "hisilicon,hi3670-usb-phy";</div><div class='del'>-          #phy-cells = &lt;0&gt;;</div><div class='del'>-          hisilicon,pericrg-syscon = &lt;&amp;crg_ctrl&gt;;</div><div class='del'>-          hisilicon,pctrl-syscon = &lt;&amp;pctrl&gt;;</div><div class='del'>-          hisilicon,sctrl-syscon = &lt;&amp;sctrl&gt;;</div><div class='del'>-          hisilicon,eye-diagram-param = &lt;0xfdfee4&gt;;</div><div class='del'>-          hisilicon,tx-vboost-lvl = &lt;0x5&gt;;</div><div class='del'>-        };</div><div class='del'>-      };</div><div class='add'>+    usb-phy {</div><div class='add'>+        compatible = "hisilicon,hi3670-usb-phy";</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        hisilicon,pericrg-syscon = &lt;&amp;crg_ctrl&gt;;</div><div class='add'>+        hisilicon,pctrl-syscon = &lt;&amp;pctrl&gt;;</div><div class='add'>+        hisilicon,sctrl-syscon = &lt;&amp;sctrl&gt;;</div><div class='add'>+        hisilicon,eye-diagram-param = &lt;0xfdfee4&gt;;</div><div class='add'>+        hisilicon,tx-vboost-lvl = &lt;0x5&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml b/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml<br/>index 5cab21648632..30b42008db06 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/ingenic,phy-usb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/ingenic,phy-usb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs USB PHY devicetree bindings</div><div class='add'>+title: Ingenic SoCs USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml b/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml<br/>index 52815b6c2b88..5cee4c85ff8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/intel,keembay-phy-usb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/intel,keembay-phy-usb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Keem Bay USB PHY bindings</div><div class='add'>+title: Intel Keem Bay USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Wan Ahmad Zainie &lt;wan.ahmad.zainie.wan.mohamad@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml<br/>index 954e67571dfd..ca818f83579b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings</div><div class='add'>+title: Intel Lightning Mountain(LGM) eMMC PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ramuthevar Vadivel Murugan &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml<br/>index ce62c0b94daf..653a12286637 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/intel,lgm-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel LGM USB PHY Device Tree Bindings</div><div class='add'>+title: Intel LGM USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vadivel Murugan Ramuthevar &lt;vadivel.muruganx.ramuthevar@linux.intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml b/Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml<br/>deleted file mode 100644<br/>index 34bdb5c4cae8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/intel,phy-thunderbay-emmc.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/phy/intel,phy-thunderbay-emmc.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Intel Thunder Bay eMMC PHY bindings</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Srikandan Nandhini &lt;nandhini.srikandan@intel.com&gt;</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: intel,thunderbay-emmc-phy</div><div class='del'>-</div><div class='del'>-  "#phy-cells":</div><div class='del'>-    const: 0</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: emmcclk</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - "#phy-cells"</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - clocks</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-     mmc_phy@80440800 {</div><div class='del'>-     #phy-cells = &lt;0x0&gt;;</div><div class='del'>-     compatible = "intel,thunderbay-emmc-phy";</div><div class='del'>-     status = "okay";</div><div class='del'>-     reg = &lt;0x80440800 0x100&gt;;</div><div class='del'>-     clocks = &lt;&amp;emmc&gt;;</div><div class='del'>-     clock-names = "emmcclk";</div><div class='del'>-     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml<br/>index a97482179cf5..711de06bb0fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Lantiq VRX200 and ARX300 PCIe PHY Device Tree Bindings</div><div class='add'>+title: Lantiq VRX200 and ARX300 PCIe PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml b/Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml<br/>index 2437c3683326..3aa1a46796dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/marvell,armada-3700-utmi-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/marvell,armada-3700-utmi-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Marvell Armada UTMI/UTMI+ PHY</div><div class='ctx'> </div><div class='hunk'>@@ -45,7 +45,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     usb2_utmi_host_phy: phy@5f000 {</div><div class='del'>-      compatible = "marvell,armada-3700-utmi-host-phy";</div><div class='add'>+      compatible = "marvell,a3700-utmi-host-phy";</div><div class='ctx'>       reg = &lt;0x5f000 0x800&gt;;</div><div class='ctx'>       marvell,usb-misc-reg = &lt;&amp;usb2_syscon&gt;;</div><div class='ctx'>       #phy-cells = &lt;0&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml b/Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml<br/>index 30f3b5f32a95..9ce7b4c6d208 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/marvell,armada-cp110-utmi-phy.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/marvell,armada-cp110-utmi-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Marvell Armada CP110/CP115 UTMI PHY</div><div class='ctx'> </div><div class='hunk'>@@ -41,7 +41,7 @@ properties:</div><div class='ctx'>       Phandle to the system controller node</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='del'>-#Required child nodes:</div><div class='add'>+# Required child nodes:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^usb-phy@[0|1]$":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml b/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml<br/>index ff255aa4cc10..bd3bd2f8b1cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/marvell,mmp3-hsic-phy.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/marvell,mmp3-hsic-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/marvell,mmp3-hsic-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Marvell MMP3 HSIC PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml b/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml<br/>index c97043eaa8fb..be13113f7b47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/marvell,mmp3-usb-phy.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/marvell,mmp3-usb-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell MMP3 USB PHY bindings</div><div class='add'>+title: Marvell MMP3 USB PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml<br/>index 6e4d795f9b02..26f2b887cfc1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek MIPI Display Serial Interface (DSI) PHY binding</div><div class='add'>+title: MediaTek MIPI Display Serial Interface (DSI) PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;</div><div class='hunk'>@@ -24,6 +24,10 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt7623-mipi-tx</div><div class='ctx'>           - const: mediatek,mt2701-mipi-tx</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8365-mipi-tx</div><div class='add'>+          - const: mediatek,mt8183-mipi-tx</div><div class='ctx'>       - const: mediatek,mt2701-mipi-tx</div><div class='ctx'>       - const: mediatek,mt8173-mipi-tx</div><div class='ctx'>       - const: mediatek,mt8183-mipi-tx</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml<br/>index 0d94950b84ca..f3a8b0b745d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding</div><div class='add'>+title: MediaTek High Definition Multimedia Interface (HDMI) PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chun-Kuang Hu &lt;chunkuang.hu@kernel.org&gt;</div><div class='hunk'>@@ -28,6 +28,7 @@ properties:</div><div class='ctx'>           - const: mediatek,mt2701-hdmi-phy</div><div class='ctx'>       - const: mediatek,mt2701-hdmi-phy</div><div class='ctx'>       - const: mediatek,mt8173-hdmi-phy</div><div class='add'>+      - const: mediatek,mt8195-hdmi-phy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml<br/>index 29d4123323c2..b35c4d256e40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/mediatek,mt7621-pci-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/mediatek,mt7621-pci-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek Mt7621 PCIe PHY Device Tree Bindings</div><div class='add'>+title: Mediatek Mt7621 PCIe PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml<br/>new file mode 100644<br/>index 000000000000..422750cc4121<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek PCIe PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jianjun Wang &lt;jianjun.wang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The PCIe PHY supports physical layer functionality for PCIe Gen3 port.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8195-pcie-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: sif</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  nvmem-cells:</div><div class='add'>+    maxItems: 7</div><div class='add'>+    description:</div><div class='add'>+      Phandles to nvmem cell that contains the efuse data, if unspecified,</div><div class='add'>+      default value is used.</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: glb_intr</div><div class='add'>+      - const: tx_ln0_pmos</div><div class='add'>+      - const: tx_ln0_nmos</div><div class='add'>+      - const: rx_ln0</div><div class='add'>+      - const: tx_ln1_pmos</div><div class='add'>+      - const: tx_ln1_nmos</div><div class='add'>+      - const: rx_ln1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    phy@11e80000 {</div><div class='add'>+        compatible = "mediatek,mt8195-pcie-phy";</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x11e80000 0x10000&gt;;</div><div class='add'>+        reg-names = "sif";</div><div class='add'>+        nvmem-cells = &lt;&amp;pciephy_glb_intr&gt;,</div><div class='add'>+                      &lt;&amp;pciephy_tx_ln0_pmos&gt;,</div><div class='add'>+                      &lt;&amp;pciephy_tx_ln0_nmos&gt;,</div><div class='add'>+                      &lt;&amp;pciephy_rx_ln0&gt;,</div><div class='add'>+                      &lt;&amp;pciephy_tx_ln1_pmos&gt;,</div><div class='add'>+                      &lt;&amp;pciephy_tx_ln1_nmos&gt;,</div><div class='add'>+                      &lt;&amp;pciephy_rx_ln1&gt;;</div><div class='add'>+        nvmem-cell-names = "glb_intr", "tx_ln0_pmos",</div><div class='add'>+                           "tx_ln0_nmos", "rx_ln0",</div><div class='add'>+                           "tx_ln1_pmos", "tx_ln1_nmos",</div><div class='add'>+                           "rx_ln1";</div><div class='add'>+        power-domains = &lt;&amp;spm 2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml<br/>index 7b2e1bc119be..230a17f24966 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,tphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,tphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mediatek,tphy.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/mediatek,tphy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek T-PHY Controller Device Tree Bindings</div><div class='add'>+title: MediaTek T-PHY Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;</div><div class='hunk'>@@ -79,12 +79,15 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt2712-tphy</div><div class='ctx'>               - mediatek,mt7629-tphy</div><div class='add'>+              - mediatek,mt7986-tphy</div><div class='ctx'>               - mediatek,mt8183-tphy</div><div class='ctx'>               - mediatek,mt8186-tphy</div><div class='ctx'>               - mediatek,mt8192-tphy</div><div class='add'>+              - mediatek,mt8365-tphy</div><div class='ctx'>           - const: mediatek,generic-tphy-v2</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - mediatek,mt8188-tphy</div><div class='ctx'>               - mediatek,mt8195-tphy</div><div class='ctx'>           - const: mediatek,generic-tphy-v3</div><div class='ctx'>       - const: mediatek,mt2701-u3phy</div><div class='hunk'>@@ -161,6 +164,7 @@ patternProperties:</div><div class='ctx'>                 - PHY_TYPE_USB3</div><div class='ctx'>                 - PHY_TYPE_PCIE</div><div class='ctx'>                 - PHY_TYPE_SATA</div><div class='add'>+                - PHY_TYPE_SGMII</div><div class='ctx'> </div><div class='ctx'>       nvmem-cells:</div><div class='ctx'>         items:</div><div class='hunk'>@@ -216,6 +220,16 @@ patternProperties:</div><div class='ctx'>         minimum: 1</div><div class='ctx'>         maximum: 15</div><div class='ctx'> </div><div class='add'>+      mediatek,pre-emphasis:</div><div class='add'>+        description:</div><div class='add'>+          The level of pre-emphasis which used to widen the eye opening and</div><div class='add'>+          boost eye swing, the unit step is about 4.16% increment; e.g. the</div><div class='add'>+          level 1 means amplitude increases about 4.16%, the level 2 is about</div><div class='add'>+          8.3% etc. (U2 phy)</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 1</div><div class='add'>+        maximum: 3</div><div class='add'>+</div><div class='ctx'>       mediatek,bc12:</div><div class='ctx'>         description:</div><div class='ctx'>           Specify the flag to enable BC1.2 if support it</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml<br/>index 74cc32c1d2e8..3e62b5d4da61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek Universal Flash Storage (UFS) M-PHY binding</div><div class='add'>+title: MediaTek Universal Flash Storage (UFS) M-PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Stanley Chu &lt;stanley.chu@mediatek.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml<br/>index 598fd2b95c29..a9e3139fd421 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/mediatek,xsphy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek XS-PHY Controller Device Tree Bindings</div><div class='add'>+title: MediaTek XS-PHY Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt b/Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt<br/>deleted file mode 100644<br/>index b84a02ebffdf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/meson-gxl-usb2-phy.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-* Amlogic Meson GXL and GXM USB2 PHY binding</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:	Should be "amlogic,meson-gxl-usb2-phy"</div><div class='del'>-- reg:		The base address and length of the registers</div><div class='del'>-- #phys-cells:	must be 0 (see phy-bindings.txt in this directory)</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks:	a phandle to the clock of this PHY</div><div class='del'>-- clock-names:	must be "phy"</div><div class='del'>-- resets:	a phandle to the reset line of this PHY</div><div class='del'>-- reset-names:	must be "phy"</div><div class='del'>-- phy-supply:	see phy-bindings.txt in this directory</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	usb2_phy0: phy@78000 {</div><div class='del'>-		compatible = "amlogic,meson-gxl-usb2-phy";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0x0 0x78000 0x0 0x20&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt<br/>deleted file mode 100644<br/>index 9b23407233c0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-Mixel DSI PHY for i.MX8</div><div class='del'>-</div><div class='del'>-The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the</div><div class='del'>-MIPI-DSI IP from Northwest Logic). It represents the physical layer for the</div><div class='del'>-electrical signals for DSI.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Must be:</div><div class='del'>-  - "fsl,imx8mq-mipi-dphy"</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-- clock-names: Must contain the following entries:</div><div class='del'>-  - "phy_ref": phandle and specifier referring to the DPHY ref clock</div><div class='del'>-- reg: the register range of the PHY controller</div><div class='del'>-- #phy-cells: number of cells in PHY, as defined in</div><div class='del'>-  Documentation/devicetree/bindings/phy/phy-bindings.txt</div><div class='del'>-  this must be &lt;0&gt;</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- power-domains: phandle to power domain</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	dphy: dphy@30a0030 {</div><div class='del'>-		compatible = "fsl,imx8mq-mipi-dphy";</div><div class='del'>-		clocks = &lt;&amp;clk IMX8MQ_CLK_DSI_PHY_REF&gt;;</div><div class='del'>-		clock-names = "phy_ref";</div><div class='del'>-		reg = &lt;0x30a00300 0x100&gt;;</div><div class='del'>-		power-domains = &lt;&amp;pd_mipi0&gt;;</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml<br/>new file mode 100644<br/>index 000000000000..786cfd71cb7e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mixel DSI PHY for i.MX8</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Guido Günther &lt;agx@sigxcpu.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the</div><div class='add'>+  MIPI-DSI IP from Northwest Logic). It represents the physical layer for the</div><div class='add'>+  electrical signals for DSI.</div><div class='add'>+</div><div class='add'>+  The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work</div><div class='add'>+  in either MIPI-DSI PHY mode or LVDS PHY mode.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8mq-mipi-dphy</div><div class='add'>+      - fsl,imx8qxp-mipi-dphy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: phy_ref</div><div class='add'>+</div><div class='add'>+  assigned-clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  assigned-clock-parents:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  assigned-clock-rates:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  fsl,syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      A phandle which points to Control and Status Registers(CSR) module.</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8mq-mipi-dphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        fsl,syscon: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - assigned-clocks</div><div class='add'>+        - assigned-clock-parents</div><div class='add'>+        - assigned-clock-rates</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8qxp-mipi-dphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        assigned-clocks: false</div><div class='add'>+        assigned-clock-parents: false</div><div class='add'>+        assigned-clock-rates: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - fsl,syscon</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mq-clock.h&gt;</div><div class='add'>+    dphy: dphy@30a0030 {</div><div class='add'>+        compatible = "fsl,imx8mq-mipi-dphy";</div><div class='add'>+        reg = &lt;0x30a00300 0x100&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MQ_CLK_DSI_PHY_REF&gt;;</div><div class='add'>+        clock-names = "phy_ref";</div><div class='add'>+        assigned-clocks = &lt;&amp;clk IMX8MQ_CLK_DSI_PHY_REF&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;clk IMX8MQ_VIDEO_PLL1_OUT&gt;;</div><div class='add'>+        assigned-clock-rates = &lt;24000000&gt;;</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;pgc_mipi&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml b/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml<br/>new file mode 100644<br/>index 000000000000..3169b873231e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mscc,vsc7514-serdes.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/mscc,vsc7514-serdes.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microsemi Ocelot SerDes muxing</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+  - UNGLinuxDriver@microchip.com</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  On Microsemi Ocelot, there is a handful of registers in HSIO address</div><div class='add'>+  space for setting up the SerDes to switch port muxing.</div><div class='add'>+</div><div class='add'>+  A SerDes X can be "muxed" to work with switch port Y or Z for example.</div><div class='add'>+  One specific SerDes can also be used as a PCIe interface.</div><div class='add'>+</div><div class='add'>+  Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.</div><div class='add'>+</div><div class='add'>+  There are two kinds of SerDes: SERDES1G supports 10/100Mbps in</div><div class='add'>+  half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports</div><div class='add'>+  10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.</div><div class='add'>+</div><div class='add'>+  Also, SERDES6G number (aka "macro") 0 is the only interface supporting</div><div class='add'>+  QSGMII.</div><div class='add'>+</div><div class='add'>+  This is a child of the HSIO syscon ("mscc,ocelot-hsio", see</div><div class='add'>+  Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mscc,vsc7514-serdes</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 2</div><div class='add'>+    description: |</div><div class='add'>+      The first number defines the input port to use for a given SerDes macro.</div><div class='add'>+      The second defines the macro to use. They are defined in</div><div class='add'>+      dt-bindings/phy/phy-ocelot-serdes.h</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties:</div><div class='add'>+  false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    serdes: serdes {</div><div class='add'>+      compatible = "mscc,vsc7514-serdes";</div><div class='add'>+      #phy-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt b/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt<br/>index c9f5c0caf8a9..70c813b0755f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/mxs-usb-phy.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/mxs-usb-phy.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/mxs-usb-phy.txt</a></div><div class='hunk'>@@ -8,16 +8,17 @@ Required properties:</div><div class='ctx'> 	* "fsl,vf610-usbphy" for Vybrid vf610</div><div class='ctx'> 	* "fsl,imx6sx-usbphy" for imx6sx</div><div class='ctx'> 	* "fsl,imx7ulp-usbphy" for imx7ulp</div><div class='add'>+	* "fsl,imx8dxl-usbphy" for imx8dxl</div><div class='ctx'>   "fsl,imx23-usbphy" is still a fallback for other strings</div><div class='ctx'> - reg: Should contain registers location and length</div><div class='ctx'> - interrupts: Should contain phy interrupt</div><div class='ctx'> - fsl,anatop: phandle for anatop register, it is only for imx6 SoC series</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='del'>-- fsl,tx-cal-45-dn-ohms: Integer [30-55]. Resistance (in ohms) of switchable</div><div class='add'>+- fsl,tx-cal-45-dn-ohms: Integer [35-54]. Resistance (in ohms) of switchable</div><div class='ctx'>   high-speed trimming resistor connected in parallel with the 45 ohm resistor</div><div class='ctx'>   that terminates the DN output signal. Default: 45</div><div class='del'>-- fsl,tx-cal-45-dp-ohms: Integer [30-55]. Resistance (in ohms) of switchable</div><div class='add'>+- fsl,tx-cal-45-dp-ohms: Integer [35-54]. Resistance (in ohms) of switchable</div><div class='ctx'>   high-speed trimming resistor connected in parallel with the 45 ohm resistor</div><div class='ctx'>   that terminates the DP output signal. Default: 45</div><div class='ctx'> - fsl,tx-d-cal: Integer [79-119]. Current trimming value (as a percentage) of</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt<br/>deleted file mode 100644<br/>index b62397d2bb0c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,779 +0,0 @@</div><div class='del'>-Device tree binding for NVIDIA Tegra XUSB pad controller</div><div class='del'>-========================================================</div><div class='del'>-</div><div class='del'>-The Tegra XUSB pad controller manages a set of I/O lanes (with differential</div><div class='del'>-signals) which connect directly to pins/pads on the SoC package. Each lane</div><div class='del'>-is controlled by a HW block referred to as a "pad" in the Tegra hardware</div><div class='del'>-documentation. Each such "pad" may control either one or multiple lanes,</div><div class='del'>-and thus contains any logic common to all its lanes. Each lane can be</div><div class='del'>-separately configured and powered up.</div><div class='del'>-</div><div class='del'>-Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or</div><div class='del'>-super-speed USB. Other lanes are for various types of low-speed, full-speed</div><div class='del'>-or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller</div><div class='del'>-contains a software-configurable mux that sits between the I/O controller</div><div class='del'>-ports (e.g. PCIe) and the lanes.</div><div class='del'>-</div><div class='del'>-In addition to per-lane configuration, USB 3.0 ports may require additional</div><div class='del'>-settings on a per-board basis.</div><div class='del'>-</div><div class='del'>-Pads will be represented as children of the top-level XUSB pad controller</div><div class='del'>-device tree node. Each lane exposed by the pad will be represented by its</div><div class='del'>-own subnode and can be referenced by users of the lane using the standard</div><div class='del'>-PHY bindings, as described by the phy-bindings.txt file in this directory.</div><div class='del'>-</div><div class='del'>-The Tegra hardware documentation refers to the connection between the XUSB</div><div class='del'>-pad controller and the XUSB controller as "ports". This is confusing since</div><div class='del'>-"port" is typically used to denote the physical USB receptacle. The device</div><div class='del'>-tree binding in this document uses the term "port" to refer to the logical</div><div class='del'>-abstraction of the signals that are routed to a USB receptacle (i.e. a PHY</div><div class='del'>-for the USB signal, the VBUS power supply, the USB 2.0 companion port for</div><div class='del'>-USB 3.0 receptacles, ...).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- compatible: Must be:</div><div class='del'>-  - Tegra124: "nvidia,tegra124-xusb-padctl"</div><div class='del'>-  - Tegra132: "nvidia,tegra132-xusb-padctl", "nvidia,tegra124-xusb-padctl"</div><div class='del'>-  - Tegra210: "nvidia,tegra210-xusb-padctl"</div><div class='del'>-  - Tegra186: "nvidia,tegra186-xusb-padctl"</div><div class='del'>-  - Tegra194: "nvidia,tegra194-xusb-padctl"</div><div class='del'>-- reg: Physical base address and length of the controller's registers.</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-- reset-names: Must include the following entries:</div><div class='del'>-  - "padctl"</div><div class='del'>-</div><div class='del'>-For Tegra124:</div><div class='del'>-- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.</div><div class='del'>-- avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='del'>-- avdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='del'>-- hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.</div><div class='del'>-</div><div class='del'>-For Tegra210:</div><div class='del'>-- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.</div><div class='del'>-- avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='del'>-- dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='del'>-- hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.</div><div class='del'>-- nvidia,pmc: phandle and specifier referring to the Tegra210 PMC node.</div><div class='del'>-</div><div class='del'>-For Tegra186:</div><div class='del'>-- avdd-pll-erefeut-supply: UPHY brick and reference clock as well as UTMI PHY</div><div class='del'>-  power supply. Must supply 1.8 V.</div><div class='del'>-- avdd-usb-supply: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must supply</div><div class='del'>-  3.3 V.</div><div class='del'>-- vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.</div><div class='del'>-- vddio-hsic-supply: HSIC PHY power supply. Must supply 1.2 V.</div><div class='del'>-</div><div class='del'>-For Tegra194:</div><div class='del'>-- avdd-usb-supply: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must supply</div><div class='del'>-  3.3 V.</div><div class='del'>-- vclamp-usb-supply: Bias rail for USB pad. Must supply 1.8 V.</div><div class='del'>-</div><div class='del'>-Pad nodes:</div><div class='del'>-==========</div><div class='del'>-</div><div class='del'>-A required child node named "pads" contains a list of subnodes, one for each</div><div class='del'>-of the pads exposed by the XUSB pad controller. Each pad may need additional</div><div class='del'>-resources that can be referenced in its pad node.</div><div class='del'>-</div><div class='del'>-The "status" property is used to enable or disable the use of a pad. If set</div><div class='del'>-to "disabled", the pad will not be used on the given board. In order to use</div><div class='del'>-the pad and any of its lanes, this property must be set to "okay".</div><div class='del'>-</div><div class='del'>-For Tegra124 and Tegra132, the following pads exist: usb2, ulpi, hsic, pcie</div><div class='del'>-and sata. No extra resources are required for operation of these pads.</div><div class='del'>-</div><div class='del'>-For Tegra210, the following pads exist: usb2, hsic, pcie and sata. Below is</div><div class='del'>-a description of the properties of each pad.</div><div class='del'>-</div><div class='del'>-UTMI pad:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-- clock-names: Must contain the following entries:</div><div class='del'>-  - "trk": phandle and specifier referring to the USB2 tracking clock</div><div class='del'>-</div><div class='del'>-HSIC pad:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-- clock-names: Must contain the following entries:</div><div class='del'>-  - "trk": phandle and specifier referring to the HSIC tracking clock</div><div class='del'>-</div><div class='del'>-PCIe pad:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-- clock-names: Must contain the following entries:</div><div class='del'>-  - "pll": phandle and specifier referring to the PLLE</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-- reset-names: Must contain the following entries:</div><div class='del'>-  - "phy": reset for the PCIe UPHY block</div><div class='del'>-</div><div class='del'>-SATA pad:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-- reset-names: Must contain the following entries:</div><div class='del'>-  - "phy": reset for the SATA UPHY block</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PHY nodes:</div><div class='del'>-==========</div><div class='del'>-</div><div class='del'>-Each pad node has a child named "lanes" that contains one or more children of</div><div class='del'>-its own, each representing one of the lanes controlled by the pad.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- status: Defines the operation status of the PHY. Valid values are:</div><div class='del'>-  - "disabled": the PHY is disabled</div><div class='del'>-  - "okay": the PHY is enabled</div><div class='del'>-- #phy-cells: Should be 0. Since each lane represents a single PHY, there is</div><div class='del'>-  no need for an additional specifier.</div><div class='del'>-- nvidia,function: The output function of the PHY. See below for a list of</div><div class='del'>-  valid functions per SoC generation.</div><div class='del'>-</div><div class='del'>-For Tegra124 and Tegra132, the list of valid PHY nodes is given below:</div><div class='del'>-- usb2: usb2-0, usb2-1, usb2-2</div><div class='del'>-  - functions: "snps", "xusb", "uart"</div><div class='del'>-- ulpi: ulpi-0</div><div class='del'>-  - functions: "snps", "xusb"</div><div class='del'>-- hsic: hsic-0, hsic-1</div><div class='del'>-  - functions: "snps", "xusb"</div><div class='del'>-- pcie: pcie-0, pcie-1, pcie-2, pcie-3, pcie-4</div><div class='del'>-  - functions: "pcie", "usb3-ss"</div><div class='del'>-- sata: sata-0</div><div class='del'>-  - functions: "usb3-ss", "sata"</div><div class='del'>-</div><div class='del'>-For Tegra210, the list of valid PHY nodes is given below:</div><div class='del'>-- usb2: usb2-0, usb2-1, usb2-2, usb2-3</div><div class='del'>-  - functions: "snps", "xusb", "uart"</div><div class='del'>-- hsic: hsic-0, hsic-1</div><div class='del'>-  - functions: "snps", "xusb"</div><div class='del'>-- pcie: pcie-0, pcie-1, pcie-2, pcie-3, pcie-4, pcie-5, pcie-6</div><div class='del'>-  - functions: "pcie-x1", "usb3-ss", "pcie-x4"</div><div class='del'>-- sata: sata-0</div><div class='del'>-  - functions: "usb3-ss", "sata"</div><div class='del'>-</div><div class='del'>-For Tegra194, the list of valid PHY nodes is given below:</div><div class='del'>-- usb2: usb2-0, usb2-1, usb2-2, usb2-3</div><div class='del'>-  - functions: "xusb"</div><div class='del'>-- usb3: usb3-0, usb3-1, usb3-2, usb3-3</div><div class='del'>-  - functions: "xusb"</div><div class='del'>-</div><div class='del'>-Port nodes:</div><div class='del'>-===========</div><div class='del'>-</div><div class='del'>-A required child node named "ports" contains a list of all the ports exposed</div><div class='del'>-by the XUSB pad controller. Per-port configuration is only required for USB.</div><div class='del'>-</div><div class='del'>-USB2 ports:</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- status: Defines the operation status of the port. Valid values are:</div><div class='del'>-  - "disabled": the port is disabled</div><div class='del'>-  - "okay": the port is enabled</div><div class='del'>-- mode: A string that determines the mode in which to run the port. Valid</div><div class='del'>-  values are:</div><div class='del'>-  - "host": for USB host mode</div><div class='del'>-  - "device": for USB device mode</div><div class='del'>-  - "otg": for USB OTG mode</div><div class='del'>-</div><div class='del'>-Required properties for OTG/Peripheral capable USB2 ports:</div><div class='del'>-- usb-role-switch: Boolean property to indicate that the port support OTG or</div><div class='del'>-  peripheral mode. If present, the port supports switching between USB host</div><div class='del'>-  and peripheral roles. Connector should be added as subnode.</div><div class='del'>-  See usb/usb-conn-gpio.txt.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- nvidia,internal: A boolean property whose presence determines that a port</div><div class='del'>-  is internal. In the absence of this property the port is considered to be</div><div class='del'>-  external.</div><div class='del'>-- vbus-supply: phandle to a regulator supplying the VBUS voltage.</div><div class='del'>-</div><div class='del'>-ULPI ports:</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- status: Defines the operation status of the port. Valid values are:</div><div class='del'>-  - "disabled": the port is disabled</div><div class='del'>-  - "okay": the port is enabled</div><div class='del'>-- nvidia,internal: A boolean property whose presence determines that a port</div><div class='del'>-  is internal. In the absence of this property the port is considered to be</div><div class='del'>-  external.</div><div class='del'>-- vbus-supply: phandle to a regulator supplying the VBUS voltage.</div><div class='del'>-</div><div class='del'>-HSIC ports:</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- status: Defines the operation status of the port. Valid values are:</div><div class='del'>-  - "disabled": the port is disabled</div><div class='del'>-  - "okay": the port is enabled</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- vbus-supply: phandle to a regulator supplying the VBUS voltage.</div><div class='del'>-</div><div class='del'>-Super-speed USB ports:</div><div class='del'>-----------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- status: Defines the operation status of the port. Valid values are:</div><div class='del'>-  - "disabled": the port is disabled</div><div class='del'>-  - "okay": the port is enabled</div><div class='del'>-- nvidia,usb2-companion: A single cell that specifies the physical port number</div><div class='del'>-  to map this super-speed USB port to. The range of valid port numbers varies</div><div class='del'>-  with the SoC generation:</div><div class='del'>-  - 0-2: for Tegra124 and Tegra132</div><div class='del'>-  - 0-3: for Tegra210</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- nvidia,internal: A boolean property whose presence determines that a port</div><div class='del'>-  is internal. In the absence of this property the port is considered to be</div><div class='del'>-  external.</div><div class='del'>-</div><div class='del'>-- maximum-speed: Only for Tegra194. A string property that specifies maximum</div><div class='del'>-  supported speed of a usb3 port. Valid values are:</div><div class='del'>-  - "super-speed-plus": default, the usb3 port supports USB 3.1 Gen 2 speed.</div><div class='del'>-  - "super-speed": the usb3 port supports USB 3.1 Gen 1 speed only.</div><div class='del'>-</div><div class='del'>-For Tegra124 and Tegra132, the XUSB pad controller exposes the following</div><div class='del'>-ports:</div><div class='del'>-- 3x USB2: usb2-0, usb2-1, usb2-2</div><div class='del'>-- 1x ULPI: ulpi-0</div><div class='del'>-- 2x HSIC: hsic-0, hsic-1</div><div class='del'>-- 2x super-speed USB: usb3-0, usb3-1</div><div class='del'>-</div><div class='del'>-For Tegra210, the XUSB pad controller exposes the following ports:</div><div class='del'>-- 4x USB2: usb2-0, usb2-1, usb2-2, usb2-3</div><div class='del'>-- 2x HSIC: hsic-0, hsic-1</div><div class='del'>-- 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3</div><div class='del'>-</div><div class='del'>-For Tegra194, the XUSB pad controller exposes the following ports:</div><div class='del'>-- 4x USB2: usb2-0, usb2-1, usb2-2, usb2-3</div><div class='del'>-- 4x super-speed USB: usb3-0, usb3-1, usb3-2, usb3-3</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-=========</div><div class='del'>-</div><div class='del'>-Tegra124 and Tegra132:</div><div class='del'>-----------------------</div><div class='del'>-</div><div class='del'>-SoC include:</div><div class='del'>-</div><div class='del'>-	padctl@7009f000 {</div><div class='del'>-		/* for Tegra124 */</div><div class='del'>-		compatible = "nvidia,tegra124-xusb-padctl";</div><div class='del'>-		/* for Tegra132 */</div><div class='del'>-		compatible = "nvidia,tegra132-xusb-padctl",</div><div class='del'>-			     "nvidia,tegra124-xusb-padctl";</div><div class='del'>-		reg = &lt;0x0 0x7009f000 0x0 0x1000&gt;;</div><div class='del'>-		resets = &lt;&amp;tegra_car 142&gt;;</div><div class='del'>-		reset-names = "padctl";</div><div class='del'>-</div><div class='del'>-		pads {</div><div class='del'>-			usb2 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					usb2-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-1 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-2 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ulpi {</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					ulpi-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			hsic {</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					hsic-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					hsic-1 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pcie {</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					pcie-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-1 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-2 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-3 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-4 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sata {</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					sata-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			usb2-0 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-1 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-2 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			ulpi-0 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			hsic-0 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			hsic-1 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-0 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-1 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Board file:</div><div class='del'>-</div><div class='del'>-	padctl@7009f000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		pads {</div><div class='del'>-			usb2 {</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					usb2-0 {</div><div class='del'>-						nvidia,function = "xusb";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-1 {</div><div class='del'>-						nvidia,function = "xusb";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-2 {</div><div class='del'>-						nvidia,function = "xusb";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pcie {</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					pcie-0 {</div><div class='del'>-						nvidia,function = "usb3-ss";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-2 {</div><div class='del'>-						nvidia,function = "pcie";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-4 {</div><div class='del'>-						nvidia,function = "pcie";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sata {</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					sata-0 {</div><div class='del'>-						nvidia,function = "sata";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			/* Micro A/B */</div><div class='del'>-			usb2-0 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				mode = "otg";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			/* Mini PCIe */</div><div class='del'>-			usb2-1 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				mode = "host";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			/* USB3 */</div><div class='del'>-			usb2-2 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				mode = "host";</div><div class='del'>-</div><div class='del'>-				vbus-supply = &lt;&amp;vdd_usb3_vbus&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-0 {</div><div class='del'>-				nvidia,port = &lt;2&gt;;</div><div class='del'>-				status = "okay";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Tegra210:</div><div class='del'>----------</div><div class='del'>-</div><div class='del'>-SoC include:</div><div class='del'>-</div><div class='del'>-	padctl@7009f000 {</div><div class='del'>-		compatible = "nvidia,tegra210-xusb-padctl";</div><div class='del'>-		reg = &lt;0x0 0x7009f000 0x0 0x1000&gt;;</div><div class='del'>-		resets = &lt;&amp;tegra_car 142&gt;;</div><div class='del'>-		reset-names = "padctl";</div><div class='del'>-</div><div class='del'>-		status = "disabled";</div><div class='del'>-</div><div class='del'>-		pads {</div><div class='del'>-			usb2 {</div><div class='del'>-				clocks = &lt;&amp;tegra_car TEGRA210_CLK_USB2_TRK&gt;;</div><div class='del'>-				clock-names = "trk";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					usb2-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-1 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-2 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-3 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			hsic {</div><div class='del'>-				clocks = &lt;&amp;tegra_car TEGRA210_CLK_HSIC_TRK&gt;;</div><div class='del'>-				clock-names = "trk";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					hsic-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					hsic-1 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pcie {</div><div class='del'>-				clocks = &lt;&amp;tegra_car TEGRA210_CLK_PLL_E&gt;;</div><div class='del'>-				clock-names = "pll";</div><div class='del'>-				resets = &lt;&amp;tegra_car 205&gt;;</div><div class='del'>-				reset-names = "phy";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					pcie-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-1 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-2 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-3 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-4 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-5 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-6 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sata {</div><div class='del'>-				clocks = &lt;&amp;tegra_car TEGRA210_CLK_PLL_E&gt;;</div><div class='del'>-				clock-names = "pll";</div><div class='del'>-				resets = &lt;&amp;tegra_car 204&gt;;</div><div class='del'>-				reset-names = "phy";</div><div class='del'>-				status = "disabled";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					sata-0 {</div><div class='del'>-						status = "disabled";</div><div class='del'>-						#phy-cells = &lt;0&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			usb2-0 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-1 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-2 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-3 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			hsic-0 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			hsic-1 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-0 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-1 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-2 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-3 {</div><div class='del'>-				status = "disabled";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Board file:</div><div class='del'>-</div><div class='del'>-	padctl@7009f000 {</div><div class='del'>-		status = "okay";</div><div class='del'>-</div><div class='del'>-		pads {</div><div class='del'>-			usb2 {</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					usb2-0 {</div><div class='del'>-						nvidia,function = "xusb";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-1 {</div><div class='del'>-						nvidia,function = "xusb";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-2 {</div><div class='del'>-						nvidia,function = "xusb";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					usb2-3 {</div><div class='del'>-						nvidia,function = "xusb";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			pcie {</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					pcie-0 {</div><div class='del'>-						nvidia,function = "pcie-x1";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-1 {</div><div class='del'>-						nvidia,function = "pcie-x4";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-2 {</div><div class='del'>-						nvidia,function = "pcie-x4";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-3 {</div><div class='del'>-						nvidia,function = "pcie-x4";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-4 {</div><div class='del'>-						nvidia,function = "pcie-x4";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-5 {</div><div class='del'>-						nvidia,function = "usb3-ss";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					pcie-6 {</div><div class='del'>-						nvidia,function = "usb3-ss";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sata {</div><div class='del'>-				status = "okay";</div><div class='del'>-</div><div class='del'>-				lanes {</div><div class='del'>-					sata-0 {</div><div class='del'>-						nvidia,function = "sata";</div><div class='del'>-						status = "okay";</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			usb2-0 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				mode = "otg";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-1 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				vbus-supply = &lt;&amp;vdd_5v0_rtl&gt;;</div><div class='del'>-				mode = "host";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-2 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				vbus-supply = &lt;&amp;vdd_usb_vbus&gt;;</div><div class='del'>-				mode = "host";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb2-3 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				mode = "host";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-0 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				nvidia,lanes = "pcie-6";</div><div class='del'>-				nvidia,port = &lt;1&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			usb3-1 {</div><div class='del'>-				status = "okay";</div><div class='del'>-				nvidia,lanes = "pcie-5";</div><div class='del'>-				nvidia,port = &lt;2&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.yaml<br/>new file mode 100644<br/>index 000000000000..33b41b6b2fd5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.yaml</a></div><div class='hunk'>@@ -0,0 +1,654 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra124 XUSB pad controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Tegra XUSB pad controller manages a set of I/O lanes (with differential</div><div class='add'>+  signals) which connect directly to pins/pads on the SoC package. Each lane</div><div class='add'>+  is controlled by a HW block referred to as a "pad" in the Tegra hardware</div><div class='add'>+  documentation. Each such "pad" may control either one or multiple lanes,</div><div class='add'>+  and thus contains any logic common to all its lanes. Each lane can be</div><div class='add'>+  separately configured and powered up.</div><div class='add'>+</div><div class='add'>+  Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or</div><div class='add'>+  super-speed USB. Other lanes are for various types of low-speed, full-speed</div><div class='add'>+  or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller</div><div class='add'>+  contains a software-configurable mux that sits between the I/O controller</div><div class='add'>+  ports (e.g. PCIe) and the lanes.</div><div class='add'>+</div><div class='add'>+  In addition to per-lane configuration, USB 3.0 ports may require additional</div><div class='add'>+  settings on a per-board basis.</div><div class='add'>+</div><div class='add'>+  Pads will be represented as children of the top-level XUSB pad controller</div><div class='add'>+  device tree node. Each lane exposed by the pad will be represented by its</div><div class='add'>+  own subnode and can be referenced by users of the lane using the standard</div><div class='add'>+  PHY bindings, as described by the phy-bindings.txt file in this directory.</div><div class='add'>+</div><div class='add'>+  The Tegra hardware documentation refers to the connection between the XUSB</div><div class='add'>+  pad controller and the XUSB controller as "ports". This is confusing since</div><div class='add'>+  "port" is typically used to denote the physical USB receptacle. The device</div><div class='add'>+  tree binding in this document uses the term "port" to refer to the logical</div><div class='add'>+  abstraction of the signals that are routed to a USB receptacle (i.e. a PHY</div><div class='add'>+  for the USB signal, the VBUS power supply, the USB 2.0 companion port for</div><div class='add'>+  USB 3.0 receptacles, ...).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra124-xusb-padctl</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-xusb-padctl</div><div class='add'>+          - const: nvidia,tegra124-xusb-padctl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB pad controller interrupt</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad controller reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: padctl</div><div class='add'>+</div><div class='add'>+  avdd-pll-utmip-supply:</div><div class='add'>+    description: UTMI PLL power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-erefe-supply:</div><div class='add'>+    description: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  avdd-pex-pll-supply:</div><div class='add'>+    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvdd-pex-pll-e-supply:</div><div class='add'>+    description: High-voltage PLLE power supply. Must supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  pads:</div><div class='add'>+    description: A required child node named "pads" contains a list of</div><div class='add'>+      subnodes, one for each of the pads exposed by the XUSB pad controller.</div><div class='add'>+      Each pad may need additional resources that can be referenced in its</div><div class='add'>+      pad node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a pad.</div><div class='add'>+      If set to "disabled", the pad will not be used on the given board. In</div><div class='add'>+      order to use the pad and any of its lanes, this property must be set</div><div class='add'>+      to "okay" or be absent.</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: USB2 tracking clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: trk</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              usb2-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb, uart ]</div><div class='add'>+</div><div class='add'>+              usb2-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb, uart ]</div><div class='add'>+</div><div class='add'>+              usb2-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb, uart ]</div><div class='add'>+</div><div class='add'>+      ulpi:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              ulpi-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb ]</div><div class='add'>+</div><div class='add'>+      hsic:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: HSIC tracking clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: trk</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              hsic-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb ]</div><div class='add'>+</div><div class='add'>+              hsic-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb ]</div><div class='add'>+</div><div class='add'>+      pcie:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: PLLE clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: pll</div><div class='add'>+</div><div class='add'>+          resets:</div><div class='add'>+            items:</div><div class='add'>+              - description: reset for the PCIe UPHY block</div><div class='add'>+</div><div class='add'>+          reset-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: phy</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              pcie-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie, usb3-ss ]</div><div class='add'>+</div><div class='add'>+              pcie-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie, usb3-ss ]</div><div class='add'>+</div><div class='add'>+              pcie-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie, usb3-ss ]</div><div class='add'>+</div><div class='add'>+              pcie-3:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie, usb3-ss ]</div><div class='add'>+</div><div class='add'>+              pcie-4:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie, usb3-ss ]</div><div class='add'>+</div><div class='add'>+      sata:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          resets:</div><div class='add'>+            items:</div><div class='add'>+              - description: reset for the SATA UPHY block</div><div class='add'>+</div><div class='add'>+          reset-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: phy</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              sata-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ sata, usb3-ss ]</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    description: A required child node named "ports" contains a list of</div><div class='add'>+      subnodes, one for each of the ports exposed by the XUSB pad controller.</div><div class='add'>+      Each port may need additional resources that can be referenced in its</div><div class='add'>+      port node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a port.</div><div class='add'>+      If set to "disabled", the port will not be used on the given board. In</div><div class='add'>+      order to use the port, this property must be set to "okay".</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb2-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb2-2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      ulpi-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      hsic-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      hsic-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - avdd-pll-utmip-supply</div><div class='add'>+  - avdd-pll-erefe-supply</div><div class='add'>+  - avdd-pex-pll-supply</div><div class='add'>+  - hvdd-pex-pll-e-supply</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Tegra124 and Tegra132</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    padctl@7009f000 {</div><div class='add'>+        compatible = "nvidia,tegra124-xusb-padctl";</div><div class='add'>+        reg = &lt;0x7009f000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 142&gt;;</div><div class='add'>+        reset-names = "padctl";</div><div class='add'>+</div><div class='add'>+        avdd-pll-utmip-supply = &lt;&amp;vddio_1v8&gt;;</div><div class='add'>+        avdd-pll-erefe-supply = &lt;&amp;avdd_1v05_run&gt;;</div><div class='add'>+        avdd-pex-pll-supply = &lt;&amp;vdd_1v05_run&gt;;</div><div class='add'>+        hvdd-pex-pll-e-supply = &lt;&amp;vdd_3v3_lp0&gt;;</div><div class='add'>+</div><div class='add'>+        pads {</div><div class='add'>+            usb2 {</div><div class='add'>+                lanes {</div><div class='add'>+                    usb2-0 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-1 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-2 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            ulpi {</div><div class='add'>+                lanes {</div><div class='add'>+                    ulpi-0 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic {</div><div class='add'>+                lanes {</div><div class='add'>+                    hsic-0 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    hsic-1 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            pcie {</div><div class='add'>+                lanes {</div><div class='add'>+                    pcie-0 {</div><div class='add'>+                        nvidia,function = "usb3-ss";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-1 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-2 {</div><div class='add'>+                        nvidia,function = "pcie";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-3 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-4 {</div><div class='add'>+                        nvidia,function = "pcie";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            sata {</div><div class='add'>+                lanes {</div><div class='add'>+                    sata-0 {</div><div class='add'>+                        nvidia,function = "sata";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            /* Micro A/B */</div><div class='add'>+            usb2-0 {</div><div class='add'>+                mode = "otg";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            /* Mini PCIe */</div><div class='add'>+            usb2-1 {</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            /* USB3 */</div><div class='add'>+            usb2-2 {</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_usb3_vbus&gt;;</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            ulpi-0 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic-0 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic-1 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-0 {</div><div class='add'>+                nvidia,usb2-companion = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-1 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra186-xusb-padctl.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra186-xusb-padctl.yaml<br/>new file mode 100644<br/>index 000000000000..8b1d5a8529e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/nvidia,tegra186-xusb-padctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/nvidia,tegra186-xusb-padctl.yaml</a></div><div class='hunk'>@@ -0,0 +1,544 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra186 XUSB pad controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Tegra XUSB pad controller manages a set of I/O lanes (with differential</div><div class='add'>+  signals) which connect directly to pins/pads on the SoC package. Each lane</div><div class='add'>+  is controlled by a HW block referred to as a "pad" in the Tegra hardware</div><div class='add'>+  documentation. Each such "pad" may control either one or multiple lanes,</div><div class='add'>+  and thus contains any logic common to all its lanes. Each lane can be</div><div class='add'>+  separately configured and powered up.</div><div class='add'>+</div><div class='add'>+  Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or</div><div class='add'>+  super-speed USB. Other lanes are for various types of low-speed, full-speed</div><div class='add'>+  or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller</div><div class='add'>+  contains a software-configurable mux that sits between the I/O controller</div><div class='add'>+  ports (e.g. PCIe) and the lanes.</div><div class='add'>+</div><div class='add'>+  In addition to per-lane configuration, USB 3.0 ports may require additional</div><div class='add'>+  settings on a per-board basis.</div><div class='add'>+</div><div class='add'>+  Pads will be represented as children of the top-level XUSB pad controller</div><div class='add'>+  device tree node. Each lane exposed by the pad will be represented by its</div><div class='add'>+  own subnode and can be referenced by users of the lane using the standard</div><div class='add'>+  PHY bindings, as described by the phy-bindings.txt file in this directory.</div><div class='add'>+</div><div class='add'>+  The Tegra hardware documentation refers to the connection between the XUSB</div><div class='add'>+  pad controller and the XUSB controller as "ports". This is confusing since</div><div class='add'>+  "port" is typically used to denote the physical USB receptacle. The device</div><div class='add'>+  tree binding in this document uses the term "port" to refer to the logical</div><div class='add'>+  abstraction of the signals that are routed to a USB receptacle (i.e. a PHY</div><div class='add'>+  for the USB signal, the VBUS power supply, the USB 2.0 companion port for</div><div class='add'>+  USB 3.0 receptacles, ...).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra186-xusb-padctl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad controller registers</div><div class='add'>+      - description: AO registers</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB pad controller interrupt</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: padctl</div><div class='add'>+      - const: ao</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad controller reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: padctl</div><div class='add'>+</div><div class='add'>+  avdd-pll-erefeut-supply:</div><div class='add'>+    description: UPHY brick and reference clock as well as UTMI PHY</div><div class='add'>+      power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-usb-supply:</div><div class='add'>+    description: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must</div><div class='add'>+      supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  vclamp-usb-supply:</div><div class='add'>+    description: Bias rail for USB pad. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  vddio-hsic-supply:</div><div class='add'>+    description: HSIC PHY power supply. Must supply 1.2 V.</div><div class='add'>+</div><div class='add'>+  pads:</div><div class='add'>+    description: A required child node named "pads" contains a list of</div><div class='add'>+      subnodes, one for each of the pads exposed by the XUSB pad controller.</div><div class='add'>+      Each pad may need additional resources that can be referenced in its</div><div class='add'>+      pad node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a pad.</div><div class='add'>+      If set to "disabled", the pad will not be used on the given board. In</div><div class='add'>+      order to use the pad and any of its lanes, this property must be set</div><div class='add'>+      to "okay" or be absent.</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: USB2 tracking clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: trk</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              usb2-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb2-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb2-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+      hsic:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: HSIC tracking clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: trk</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              hsic-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+      usb3:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              usb3-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb3-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb3-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    description: A required child node named "ports" contains a list of</div><div class='add'>+      subnodes, one for each of the ports exposed by the XUSB pad controller.</div><div class='add'>+      Each port may need additional resources that can be referenced in its</div><div class='add'>+      port node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a port.</div><div class='add'>+      If set to "disabled", the port will not be used on the given board. In</div><div class='add'>+      order to use the port, this property must be set to "okay".</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      hsic-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+      usb3-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - avdd-pll-erefeut-supply</div><div class='add'>+  - avdd-usb-supply</div><div class='add'>+  - vclamp-usb-supply</div><div class='add'>+  - vddio-hsic-supply</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra186-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra186-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra186-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    padctl@3520000 {</div><div class='add'>+        compatible = "nvidia,tegra186-xusb-padctl";</div><div class='add'>+        reg = &lt;0x03520000 0x1000&gt;,</div><div class='add'>+              &lt;0x03540000 0x1000&gt;;</div><div class='add'>+        reg-names = "padctl", "ao";</div><div class='add'>+        interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA186_RESET_XUSB_PADCTL&gt;;</div><div class='add'>+        reset-names = "padctl";</div><div class='add'>+</div><div class='add'>+        avdd-pll-erefeut-supply = &lt;&amp;vdd_1v8_pll&gt;;</div><div class='add'>+        avdd-usb-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+        vclamp-usb-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+        vddio-hsic-supply = &lt;&amp;gnd&gt;;</div><div class='add'>+</div><div class='add'>+        pads {</div><div class='add'>+            usb2 {</div><div class='add'>+                clocks = &lt;&amp;bpmp TEGRA186_CLK_USB2_TRK&gt;;</div><div class='add'>+                clock-names = "trk";</div><div class='add'>+</div><div class='add'>+                lanes {</div><div class='add'>+                    usb2-0 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-1 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-2 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic {</div><div class='add'>+                clocks = &lt;&amp;bpmp TEGRA186_CLK_HSIC_TRK&gt;;</div><div class='add'>+                clock-names = "trk";</div><div class='add'>+                status = "disabled";</div><div class='add'>+</div><div class='add'>+                lanes {</div><div class='add'>+                    hsic-0 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3 {</div><div class='add'>+                lanes {</div><div class='add'>+                    usb3-0 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb3-1 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb3-2 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            usb2-0 {</div><div class='add'>+                mode = "otg";</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_usb0&gt;;</div><div class='add'>+                usb-role-switch;</div><div class='add'>+</div><div class='add'>+                connector {</div><div class='add'>+                    compatible = "gpio-usb-b-connector",</div><div class='add'>+                                 "usb-b-connector";</div><div class='add'>+                    label = "micro-USB";</div><div class='add'>+                    type = "micro";</div><div class='add'>+                    vbus-gpios = &lt;&amp;gpio TEGRA186_MAIN_GPIO(X, 7) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+                    id-gpios = &lt;&amp;pmic 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-1 {</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_usb1&gt;;</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-2 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic-0 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-0 {</div><div class='add'>+                nvidia,usb2-companion = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-1 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-2 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml<br/>new file mode 100644<br/>index 000000000000..6e3398399628<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/nvidia,tegra194-xusb-padctl.yaml</a></div><div class='hunk'>@@ -0,0 +1,632 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra194 XUSB pad controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Tegra XUSB pad controller manages a set of I/O lanes (with differential</div><div class='add'>+  signals) which connect directly to pins/pads on the SoC package. Each lane</div><div class='add'>+  is controlled by a HW block referred to as a "pad" in the Tegra hardware</div><div class='add'>+  documentation. Each such "pad" may control either one or multiple lanes,</div><div class='add'>+  and thus contains any logic common to all its lanes. Each lane can be</div><div class='add'>+  separately configured and powered up.</div><div class='add'>+</div><div class='add'>+  Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or</div><div class='add'>+  super-speed USB. Other lanes are for various types of low-speed, full-speed</div><div class='add'>+  or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller</div><div class='add'>+  contains a software-configurable mux that sits between the I/O controller</div><div class='add'>+  ports (e.g. PCIe) and the lanes.</div><div class='add'>+</div><div class='add'>+  In addition to per-lane configuration, USB 3.0 ports may require additional</div><div class='add'>+  settings on a per-board basis.</div><div class='add'>+</div><div class='add'>+  Pads will be represented as children of the top-level XUSB pad controller</div><div class='add'>+  device tree node. Each lane exposed by the pad will be represented by its</div><div class='add'>+  own subnode and can be referenced by users of the lane using the standard</div><div class='add'>+  PHY bindings, as described by the phy-bindings.txt file in this directory.</div><div class='add'>+</div><div class='add'>+  The Tegra hardware documentation refers to the connection between the XUSB</div><div class='add'>+  pad controller and the XUSB controller as "ports". This is confusing since</div><div class='add'>+  "port" is typically used to denote the physical USB receptacle. The device</div><div class='add'>+  tree binding in this document uses the term "port" to refer to the logical</div><div class='add'>+  abstraction of the signals that are routed to a USB receptacle (i.e. a PHY</div><div class='add'>+  for the USB signal, the VBUS power supply, the USB 2.0 companion port for</div><div class='add'>+  USB 3.0 receptacles, ...).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-xusb-padctl</div><div class='add'>+      - nvidia,tegra234-xusb-padctl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad controller registers</div><div class='add'>+      - description: AO registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: padctl</div><div class='add'>+      - const: ao</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB pad controller interrupt</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad controller reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: padctl</div><div class='add'>+</div><div class='add'>+  avdd-usb-supply:</div><div class='add'>+    description: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must</div><div class='add'>+      supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  vclamp-usb-supply:</div><div class='add'>+    description: Bias rail for USB pad. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  pads:</div><div class='add'>+    description: A required child node named "pads" contains a list of</div><div class='add'>+      subnodes, one for each of the pads exposed by the XUSB pad controller.</div><div class='add'>+      Each pad may need additional resources that can be referenced in its</div><div class='add'>+      pad node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a pad.</div><div class='add'>+      If set to "disabled", the pad will not be used on the given board. In</div><div class='add'>+      order to use the pad and any of its lanes, this property must be set</div><div class='add'>+      to "okay" or absent.</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: USB2 tracking clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: trk</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              usb2-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb2-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb2-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb2-3:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+      usb3:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              usb3-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb3-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb3-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+              usb3-3:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ xusb ]</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    description: A required child node named "ports" contains a list of</div><div class='add'>+      subnodes, one for each of the ports exposed by the XUSB pad controller.</div><div class='add'>+      Each port may need additional resources that can be referenced in its</div><div class='add'>+      port node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a port.</div><div class='add'>+      If set to "disabled", the port will not be used on the given board. In</div><div class='add'>+      order to use the port, this property must be set to "okay".</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-3:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb3-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          maximum-speed:</div><div class='add'>+            description: A string property that specifies the maximum</div><div class='add'>+              supported speed of a USB3 port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            oneOf:</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 2 speed.</div><div class='add'>+                  This is the default.</div><div class='add'>+                const: super-speed-plus</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 1 speed</div><div class='add'>+                  only.</div><div class='add'>+                const: super-speed</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          maximum-speed:</div><div class='add'>+            description: A string property that specifies the maximum</div><div class='add'>+              supported speed of a USB3 port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            oneOf:</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 2 speed.</div><div class='add'>+                  This is the default.</div><div class='add'>+                const: super-speed-plus</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 1 speed</div><div class='add'>+                  only.</div><div class='add'>+                const: super-speed</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          maximum-speed:</div><div class='add'>+            description: A string property that specifies the maximum</div><div class='add'>+              supported speed of a USB3 port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            oneOf:</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 2 speed.</div><div class='add'>+                  This is the default.</div><div class='add'>+                const: super-speed-plus</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 1 speed</div><div class='add'>+                  only.</div><div class='add'>+                const: super-speed</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-3:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          maximum-speed:</div><div class='add'>+            description: A string property that specifies the maximum</div><div class='add'>+              supported speed of a USB3 port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            oneOf:</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 2 speed.</div><div class='add'>+                  This is the default.</div><div class='add'>+                const: super-speed-plus</div><div class='add'>+              - description: The USB3 port supports USB 3.1 Gen 1 speed</div><div class='add'>+                  only.</div><div class='add'>+                const: super-speed</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - avdd-usb-supply</div><div class='add'>+  - vclamp-usb-supply</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra194-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra194-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra194-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    padctl@3520000 {</div><div class='add'>+        compatible = "nvidia,tegra194-xusb-padctl";</div><div class='add'>+        reg = &lt;0x03520000 0x1000&gt;,</div><div class='add'>+              &lt;0x03540000 0x1000&gt;;</div><div class='add'>+        reg-names = "padctl", "ao";</div><div class='add'>+        interrupts = &lt;GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;bpmp TEGRA194_RESET_XUSB_PADCTL&gt;;</div><div class='add'>+        reset-names = "padctl";</div><div class='add'>+</div><div class='add'>+        avdd-usb-supply = &lt;&amp;vdd_usb_3v3&gt;;</div><div class='add'>+        vclamp-usb-supply = &lt;&amp;vdd_1v8ao&gt;;</div><div class='add'>+</div><div class='add'>+        pads {</div><div class='add'>+            usb2 {</div><div class='add'>+                clocks = &lt;&amp;bpmp TEGRA194_CLK_USB2_TRK&gt;;</div><div class='add'>+                clock-names = "trk";</div><div class='add'>+</div><div class='add'>+                lanes {</div><div class='add'>+                    usb2-0 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-1 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-2 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-3 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3 {</div><div class='add'>+                lanes {</div><div class='add'>+                    usb3-0 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb3-1 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb3-2 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb3-3 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            usb2-0 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-1 {</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-2 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-3 {</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_5v_sata&gt;;</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-0 {</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+                nvidia,usb2-companion = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-1 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-2 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-3 {</div><div class='add'>+                maximum-speed = "super-speed";</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_5v0_sys&gt;;</div><div class='add'>+                nvidia,usb2-companion = &lt;3&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml<br/>index dfde0eaf66e1..d61585c96e31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml</a></div><div class='hunk'>@@ -275,17 +275,17 @@ allOf:</div><div class='ctx'>           - nvidia,hssquelch-level</div><div class='ctx'>           - nvidia,hsdiscon-level</div><div class='ctx'> </div><div class='del'>-        else:</div><div class='del'>-          properties:</div><div class='del'>-            clocks:</div><div class='del'>-              maxItems: 4</div><div class='add'>+      else:</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            maxItems: 4</div><div class='ctx'> </div><div class='del'>-            clock-names:</div><div class='del'>-              items:</div><div class='del'>-                - const: reg</div><div class='del'>-                - const: pll_u</div><div class='del'>-                - const: timer</div><div class='del'>-                - const: utmi-pads</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: reg</div><div class='add'>+              - const: pll_u</div><div class='add'>+              - const: timer</div><div class='add'>+              - const: utmi-pads</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml<br/>new file mode 100644<br/>index 000000000000..d16bd6e47f90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/nvidia,tegra210-xusb-padctl.yaml</a></div><div class='hunk'>@@ -0,0 +1,786 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra210 XUSB pad controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Tegra XUSB pad controller manages a set of I/O lanes (with differential</div><div class='add'>+  signals) which connect directly to pins/pads on the SoC package. Each lane</div><div class='add'>+  is controlled by a HW block referred to as a "pad" in the Tegra hardware</div><div class='add'>+  documentation. Each such "pad" may control either one or multiple lanes,</div><div class='add'>+  and thus contains any logic common to all its lanes. Each lane can be</div><div class='add'>+  separately configured and powered up.</div><div class='add'>+</div><div class='add'>+  Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or</div><div class='add'>+  super-speed USB. Other lanes are for various types of low-speed, full-speed</div><div class='add'>+  or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller</div><div class='add'>+  contains a software-configurable mux that sits between the I/O controller</div><div class='add'>+  ports (e.g. PCIe) and the lanes.</div><div class='add'>+</div><div class='add'>+  In addition to per-lane configuration, USB 3.0 ports may require additional</div><div class='add'>+  settings on a per-board basis.</div><div class='add'>+</div><div class='add'>+  Pads will be represented as children of the top-level XUSB pad controller</div><div class='add'>+  device tree node. Each lane exposed by the pad will be represented by its</div><div class='add'>+  own subnode and can be referenced by users of the lane using the standard</div><div class='add'>+  PHY bindings, as described by the phy-bindings.txt file in this directory.</div><div class='add'>+</div><div class='add'>+  The Tegra hardware documentation refers to the connection between the XUSB</div><div class='add'>+  pad controller and the XUSB controller as "ports". This is confusing since</div><div class='add'>+  "port" is typically used to denote the physical USB receptacle. The device</div><div class='add'>+  tree binding in this document uses the term "port" to refer to the logical</div><div class='add'>+  abstraction of the signals that are routed to a USB receptacle (i.e. a PHY</div><div class='add'>+  for the USB signal, the VBUS power supply, the USB 2.0 companion port for</div><div class='add'>+  USB 3.0 receptacles, ...).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra210-xusb-padctl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad controller reset</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB pad controller interrupt</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: padctl</div><div class='add'>+</div><div class='add'>+  avdd-pll-utmip-supply:</div><div class='add'>+    description: UTMI PLL power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-uerefe-supply:</div><div class='add'>+    description: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  dvdd-pex-pll-supply:</div><div class='add'>+    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvdd-pex-pll-e-supply:</div><div class='add'>+    description: High-voltage PLLE power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  nvidia,pmc:</div><div class='add'>+    description: phandle to the Tegra Power Management Controller (PMC) node</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  pads:</div><div class='add'>+    description: A required child node named "pads" contains a list of</div><div class='add'>+      subnodes, one for each of the pads exposed by the XUSB pad controller.</div><div class='add'>+      Each pad may need additional resources that can be referenced in its</div><div class='add'>+      pad node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a pad.</div><div class='add'>+      If set to "disabled", the pad will not be used on the given board. In</div><div class='add'>+      order to use the pad and any of its lanes, this property must be set</div><div class='add'>+      to "okay" or be absent.</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: USB2 tracking clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: trk</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              usb2-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb, uart ]</div><div class='add'>+</div><div class='add'>+              usb2-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb, uart ]</div><div class='add'>+</div><div class='add'>+              usb2-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb, uart ]</div><div class='add'>+</div><div class='add'>+              usb2-3:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb, uart ]</div><div class='add'>+</div><div class='add'>+      hsic:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: HSIC tracking clock</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: trk</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              hsic-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb ]</div><div class='add'>+</div><div class='add'>+              hsic-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ snps, xusb ]</div><div class='add'>+</div><div class='add'>+      pcie:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: PCIe PLL clock source</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: pll</div><div class='add'>+</div><div class='add'>+          resets:</div><div class='add'>+            items:</div><div class='add'>+              - description: PCIe PHY reset</div><div class='add'>+</div><div class='add'>+          reset-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: phy</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              pcie-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie-x1, usb3-ss, pcie-x4 ]</div><div class='add'>+</div><div class='add'>+              pcie-1:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie-x1, usb3-ss, pcie-x4 ]</div><div class='add'>+</div><div class='add'>+              pcie-2:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie-x1, usb3-ss, pcie-x4 ]</div><div class='add'>+</div><div class='add'>+              pcie-3:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie-x1, usb3-ss, pcie-x4 ]</div><div class='add'>+</div><div class='add'>+              pcie-4:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie-x1, usb3-ss, pcie-x4 ]</div><div class='add'>+</div><div class='add'>+              pcie-5:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie-x1, usb3-ss, pcie-x4 ]</div><div class='add'>+</div><div class='add'>+              pcie-6:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ pcie-x1, usb3-ss, pcie-x4 ]</div><div class='add'>+</div><div class='add'>+      sata:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          clocks:</div><div class='add'>+            items:</div><div class='add'>+              - description: SATA PLL clock source</div><div class='add'>+</div><div class='add'>+          clock-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: pll</div><div class='add'>+</div><div class='add'>+          resets:</div><div class='add'>+            items:</div><div class='add'>+              - description: SATA PHY reset</div><div class='add'>+</div><div class='add'>+          reset-names:</div><div class='add'>+            items:</div><div class='add'>+              - const: phy</div><div class='add'>+</div><div class='add'>+          lanes:</div><div class='add'>+            type: object</div><div class='add'>+            additionalProperties: false</div><div class='add'>+            properties:</div><div class='add'>+              sata-0:</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: false</div><div class='add'>+                properties:</div><div class='add'>+                  "#phy-cells":</div><div class='add'>+                    const: 0</div><div class='add'>+</div><div class='add'>+                  nvidia,function:</div><div class='add'>+                    description: Function selection for this lane.</div><div class='add'>+                    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+                    enum: [ usb3-ss, sata ]</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    description: A required child node named "ports" contains a list of</div><div class='add'>+      subnodes, one for each of the ports exposed by the XUSB pad controller.</div><div class='add'>+      Each port may need additional resources that can be referenced in its</div><div class='add'>+      port node.</div><div class='add'>+</div><div class='add'>+      The "status" property is used to enable or disable the use of a port.</div><div class='add'>+      If set to "disabled", the port will not be used on the given board. In</div><div class='add'>+      order to use the port, this property must be set to "okay".</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      usb2-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      usb2-3:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          # no need to further describe this because the connector will</div><div class='add'>+          # match on gpio-usb-b-connector or usb-b-connector and cause</div><div class='add'>+          # that binding to be selected for the subnode</div><div class='add'>+          connector:</div><div class='add'>+            type: object</div><div class='add'>+</div><div class='add'>+          mode:</div><div class='add'>+            description: A string that determines the mode in which to</div><div class='add'>+              run the port.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+            enum: [ host, peripheral, otg ]</div><div class='add'>+</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          usb-role-switch:</div><div class='add'>+            description: |</div><div class='add'>+              A boolean property whole presence indicates that the port</div><div class='add'>+              supports OTG or peripheral mode. If present, the port</div><div class='add'>+              supports switching between USB host and peripheral roles.</div><div class='add'>+              A connector must be added as a subnode in that case.</div><div class='add'>+</div><div class='add'>+              See ../connector/usb-connector.yaml.</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+        dependencies:</div><div class='add'>+          usb-role-switch: [ connector ]</div><div class='add'>+</div><div class='add'>+      hsic-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      hsic-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-0:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-1:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-2:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+      usb3-3:</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          nvidia,internal:</div><div class='add'>+            description: A boolean property whose presence determines</div><div class='add'>+              that a port is internal. In the absence of this property</div><div class='add'>+              the port is considered to be external.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+          nvidia,usb2-companion:</div><div class='add'>+            description: A single cell that specifies the physical port</div><div class='add'>+              number to map this super-speed USB port to. The range of</div><div class='add'>+              valid port numbers varies with the SoC generation.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+          vbus-supply:</div><div class='add'>+            description: A phandle to the regulator supplying the VBUS</div><div class='add'>+              voltage.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - avdd-pll-utmip-supply</div><div class='add'>+  - avdd-pll-uerefe-supply</div><div class='add'>+  - dvdd-pex-pll-supply</div><div class='add'>+  - hvdd-pex-pll-e-supply</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra210-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    padctl@7009f000 {</div><div class='add'>+        compatible = "nvidia,tegra210-xusb-padctl";</div><div class='add'>+        reg = &lt;0x7009f000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 142&gt;;</div><div class='add'>+        reset-names = "padctl";</div><div class='add'>+</div><div class='add'>+        avdd-pll-utmip-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+        avdd-pll-uerefe-supply = &lt;&amp;vdd_pex_1v05&gt;;</div><div class='add'>+        dvdd-pex-pll-supply = &lt;&amp;vdd_pex_1v05&gt;;</div><div class='add'>+        hvdd-pex-pll-e-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+</div><div class='add'>+        pads {</div><div class='add'>+            usb2 {</div><div class='add'>+                clocks = &lt;&amp;tegra_car TEGRA210_CLK_USB2_TRK&gt;;</div><div class='add'>+                clock-names = "trk";</div><div class='add'>+</div><div class='add'>+                lanes {</div><div class='add'>+                    usb2-0 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-1 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-2 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    usb2-3 {</div><div class='add'>+                        nvidia,function = "xusb";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic {</div><div class='add'>+                clocks = &lt;&amp;tegra_car TEGRA210_CLK_HSIC_TRK&gt;;</div><div class='add'>+                clock-names = "trk";</div><div class='add'>+                status = "disabled";</div><div class='add'>+</div><div class='add'>+                lanes {</div><div class='add'>+                    hsic-0 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    hsic-1 {</div><div class='add'>+                        status = "disabled";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            pcie {</div><div class='add'>+                clocks = &lt;&amp;tegra_car TEGRA210_CLK_PLL_E&gt;;</div><div class='add'>+                clock-names = "pll";</div><div class='add'>+                resets = &lt;&amp;tegra_car 205&gt;;</div><div class='add'>+                reset-names = "phy";</div><div class='add'>+</div><div class='add'>+                lanes {</div><div class='add'>+                    pcie-0 {</div><div class='add'>+                        nvidia,function = "pcie-x1";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-1 {</div><div class='add'>+                        nvidia,function = "pcie-x4";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-2 {</div><div class='add'>+                        nvidia,function = "pcie-x4";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-3 {</div><div class='add'>+                        nvidia,function = "pcie-x4";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-4 {</div><div class='add'>+                        nvidia,function = "pcie-x4";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-5 {</div><div class='add'>+                        nvidia,function = "usb3-ss";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    pcie-6 {</div><div class='add'>+                        nvidia,function = "usb3-ss";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            sata {</div><div class='add'>+                clocks = &lt;&amp;tegra_car TEGRA210_CLK_PLL_E&gt;;</div><div class='add'>+                clock-names = "pll";</div><div class='add'>+                resets = &lt;&amp;tegra_car 204&gt;;</div><div class='add'>+                reset-names = "phy";</div><div class='add'>+</div><div class='add'>+                lanes {</div><div class='add'>+                    sata-0 {</div><div class='add'>+                        nvidia,function = "sata";</div><div class='add'>+                        #phy-cells = &lt;0&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ports {</div><div class='add'>+            usb2-0 {</div><div class='add'>+                mode = "peripheral";</div><div class='add'>+                usb-role-switch;</div><div class='add'>+</div><div class='add'>+                connector {</div><div class='add'>+                    compatible = "gpio-usb-b-connector",</div><div class='add'>+                                 "usb-b-connector";</div><div class='add'>+                    label = "micro-USB";</div><div class='add'>+                    type = "micro";</div><div class='add'>+                    vbus-gpios = &lt;&amp;gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-1 {</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_5v0_rtl&gt;;</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-2 {</div><div class='add'>+                vbus-supply = &lt;&amp;vdd_usb_vbus&gt;;</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb2-3 {</div><div class='add'>+                mode = "host";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic-0 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            hsic-1 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-0 {</div><div class='add'>+                nvidia,usb2-companion = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-1 {</div><div class='add'>+                nvidia,usb2-companion = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-2 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            usb3-3 {</div><div class='add'>+                status = "disabled";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml<br/>index a9e227d8b076..37f028f7a095 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/phy-cadence-sierra.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/phy-cadence-sierra.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence Sierra PHY binding</div><div class='add'>+title: Cadence Sierra PHY</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the Cadence Sierra PHY. Sierra PHY supports multilink</div><div class='hunk'>@@ -61,14 +61,6 @@ properties:</div><div class='ctx'>       - const: pll0_refclk</div><div class='ctx'>       - const: pll1_refclk</div><div class='ctx'> </div><div class='del'>-  assigned-clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='ctx'>   cdns,autoconf:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml<br/>index 2fec9e54ad0e..dfb31314face 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence Torrent SD0801 PHY binding</div><div class='add'>+title: Cadence Torrent SD0801 PHY</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)</div><div class='hunk'>@@ -44,12 +44,6 @@ properties:</div><div class='ctx'>       - const: refclk</div><div class='ctx'>       - const: phy_en_refclk</div><div class='ctx'> </div><div class='del'>-  assigned-clocks:</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt b/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt<br/>deleted file mode 100644<br/>index 332219860187..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-ocelot-serdes.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-Microsemi Ocelot SerDes muxing driver</div><div class='del'>--------------------------------------</div><div class='del'>-</div><div class='del'>-On Microsemi Ocelot, there is a handful of registers in HSIO address</div><div class='del'>-space for setting up the SerDes to switch port muxing.</div><div class='del'>-</div><div class='del'>-A SerDes X can be "muxed" to work with switch port Y or Z for example.</div><div class='del'>-One specific SerDes can also be used as a PCIe interface.</div><div class='del'>-</div><div class='del'>-Hence, a SerDes represents an interface, be it an Ethernet or a PCIe one.</div><div class='del'>-</div><div class='del'>-There are two kinds of SerDes: SERDES1G supports 10/100Mbps in</div><div class='del'>-half/full-duplex and 1000Mbps in full-duplex mode while SERDES6G supports</div><div class='del'>-10/100Mbps in half/full-duplex and 1000/2500Mbps in full-duplex mode.</div><div class='del'>-</div><div class='del'>-Also, SERDES6G number (aka "macro") 0 is the only interface supporting</div><div class='del'>-QSGMII.</div><div class='del'>-</div><div class='del'>-This is a child of the HSIO syscon ("mscc,ocelot-hsio", see</div><div class='del'>-Documentation/devicetree/bindings/mips/mscc.txt) on the Microsemi Ocelot.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "mscc,vsc7514-serdes"</div><div class='del'>-- #phy-cells : from the generic phy bindings, must be 2.</div><div class='del'>-	       The first number defines the input port to use for a given</div><div class='del'>-	       SerDes macro. The second defines the macro to use. They are</div><div class='del'>-	       defined in dt-bindings/phy/phy-ocelot-serdes.h</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	serdes: serdes {</div><div class='del'>-		compatible = "mscc,vsc7514-serdes";</div><div class='del'>-		#phy-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ethernet {</div><div class='del'>-		port1 {</div><div class='del'>-			phy-handle = &lt;&amp;phy_foo&gt;;</div><div class='del'>-			/* Link SERDES1G_5 to port1 */</div><div class='del'>-			phys = &lt;&amp;serdes 1 SERDES1G_5&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml b/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml<br/>index f14454401419..9ae514fa7533 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/phy-rockchip-naneng-combphy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip SoC Naneng Combo Phy Device Tree Bindings</div><div class='add'>+title: Rockchip SoC Naneng Combo Phy</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='hunk'>@@ -13,6 +13,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - rockchip,rk3568-naneng-combphy</div><div class='add'>+      - rockchip,rk3588-naneng-combphy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt b/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt<br/>index de6a706abcdb..35f03df00130 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-stih407-usb.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-stih407-usb.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/phy-stih407-usb.txt</a></div><div class='hunk'>@@ -9,7 +9,7 @@ Required properties:</div><div class='ctx'> - resets		: list of phandle and reset specifier pairs. There should be two entries, one</div><div class='ctx'> 			  for the whole phy and one for the port</div><div class='ctx'> - reset-names		: list of reset signal names. Should be "global" and "port"</div><div class='del'>-See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt</div><div class='add'>+See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml</div><div class='ctx'> See: Documentation/devicetree/bindings/reset/reset.txt</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml b/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml<br/>index dc287d428e49..24a3dbde223b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/phy-stm32-usbphyc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/phy-stm32-usbphyc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 USB HS PHY controller binding</div><div class='add'>+title: STMicroelectronics STM32 USB HS PHY controller</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'> </div><div class='hunk'>@@ -55,7 +55,7 @@ properties:</div><div class='ctx'>     description: number of clock cells for ck_usbo_48m consumer</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='del'>-#Required child nodes:</div><div class='add'>+# Required child nodes:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^usb-phy@[0|1]$":</div><div class='hunk'>@@ -77,6 +77,8 @@ patternProperties:</div><div class='ctx'>       connector:</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: /schemas/connector/usb-connector.yaml</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           vbus-supply: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml<br/>index 9a89d05efbda..4790c6238a40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/phy-tegra194-p2u.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/phy-tegra194-p2u.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NVIDIA Tegra194 P2U binding</div><div class='add'>+title: NVIDIA Tegra194 &amp; Tegra234 P2U</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Thierry Reding &lt;treding@nvidia.com&gt;</div><div class='hunk'>@@ -12,13 +12,17 @@ maintainers:</div><div class='ctx'> description: &gt;</div><div class='ctx'>   Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High</div><div class='ctx'>   Speed) each interfacing with 12 and 8 P2U instances respectively.</div><div class='add'>+  Tegra234 has three PHY bricks namely HSIO, NVHS and GBE (Gigabit Ethernet)</div><div class='add'>+  each interfacing with 8, 8 and 8 P2U instances respectively.</div><div class='ctx'>   A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE</div><div class='del'>-  interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe</div><div class='del'>-  lane.</div><div class='add'>+  interface and PHY of HSIO/NVHS/GBE bricks. Each P2U instance represents one</div><div class='add'>+  PCIe lane.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: nvidia,tegra194-p2u</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-p2u</div><div class='add'>+      - nvidia,tegra234-p2u</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -28,6 +32,11 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: ctl</div><div class='ctx'> </div><div class='add'>+  nvidia,skip-sz-protect-en:</div><div class='add'>+    description: Should be present if two PCIe retimers are present between</div><div class='add'>+      the root port and its immediate downstream device.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   '#phy-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml<br/>index a5850ff529f8..c4f8e6ffa5c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,edp-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm eDP PHY</div><div class='ctx'> </div><div class='hunk'>@@ -19,6 +19,8 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,sc7280-edp-phy</div><div class='ctx'>       - qcom,sc8180x-edp-phy</div><div class='add'>+      - qcom,sc8280xp-dp-phy</div><div class='add'>+      - qcom,sc8280xp-edp-phy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -41,6 +43,9 @@ properties:</div><div class='ctx'>   "#phy-cells":</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -65,5 +70,8 @@ examples:</div><div class='ctx'> </div><div class='ctx'>       #clock-cells = &lt;1&gt;;</div><div class='ctx'>       #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      vdda-phy-supply = &lt;&amp;vdd_a_edp_0_1p2&gt;;</div><div class='add'>+      vdda-pll-supply = &lt;&amp;vdd_a_edp_0_0p9&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-other.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-other.yaml<br/>new file mode 100644<br/>index 000000000000..0c8f03b78608<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-other.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,hdmi-phy-other.yaml</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-other.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Adreno/Snapdragon HDMI phy</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,hdmi-phy-8660</div><div class='add'>+      - qcom,hdmi-phy-8960</div><div class='add'>+      - qcom,hdmi-phy-8974</div><div class='add'>+      - qcom,hdmi-phy-8084</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hdmi_phy</div><div class='add'>+      - const: hdmi_pll</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  core-vdda-supply:</div><div class='add'>+    description: phandle to VDDA supply regulator</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: phandle to VDD I/O supply regulator</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#phy-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,hdmi-phy-8660</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: slave_iface</div><div class='add'>+        vddio-supply: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,hdmi-phy-8960</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: slave_iface</div><div class='add'>+            - const: pxo</div><div class='add'>+        vddio-supply: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,hdmi-phy-8084</div><div class='add'>+              - qcom,hdmi-phy-8974</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: alt_iface</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - '#phy-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    hdmi_phy: phy@4a00400 {</div><div class='add'>+      compatible = "qcom,hdmi-phy-8960";</div><div class='add'>+      reg-names = "hdmi_phy",</div><div class='add'>+                  "hdmi_pll";</div><div class='add'>+      reg = &lt;0x4a00400 0x60&gt;,</div><div class='add'>+            &lt;0x4a00500 0x100&gt;;</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+      power-domains = &lt;&amp;mmcc 1&gt;;</div><div class='add'>+      clock-names = "slave_iface", "pxo";</div><div class='add'>+      clocks = &lt;&amp;clk 21&gt;, &lt;&amp;pxo_board&gt;;</div><div class='add'>+      core-vdda-supply = &lt;&amp;pm8921_hdmi_mvs&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml b/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml<br/>new file mode 100644<br/>index 000000000000..83fe4b39b56f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,hdmi-phy-qmp.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,hdmi-phy-qmp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Adreno/Snapdragon QMP HDMI phy</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Clark &lt;robdclark@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,hdmi-phy-8996</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hdmi_pll</div><div class='add'>+      - const: hdmi_tx_l0</div><div class='add'>+      - const: hdmi_tx_l1</div><div class='add'>+      - const: hdmi_tx_l2</div><div class='add'>+      - const: hdmi_tx_l3</div><div class='add'>+      - const: hdmi_phy</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: ref</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vcca-supply:</div><div class='add'>+    description: phandle to VCCA supply regulator</div><div class='add'>+</div><div class='add'>+  vddio-supply:</div><div class='add'>+    description: phandle to VDD I/O supply regulator</div><div class='add'>+</div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#phy-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - '#phy-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    hdmi-phy@9a0600 {</div><div class='add'>+      compatible = "qcom,hdmi-phy-8996";</div><div class='add'>+      reg = &lt;0x009a0600 0x1c4&gt;,</div><div class='add'>+            &lt;0x009a0a00 0x124&gt;,</div><div class='add'>+            &lt;0x009a0c00 0x124&gt;,</div><div class='add'>+            &lt;0x009a0e00 0x124&gt;,</div><div class='add'>+            &lt;0x009a1000 0x124&gt;,</div><div class='add'>+            &lt;0x009a1200 0x0c8&gt;;</div><div class='add'>+      reg-names = "hdmi_pll",</div><div class='add'>+                  "hdmi_tx_l0",</div><div class='add'>+                  "hdmi_tx_l1",</div><div class='add'>+                  "hdmi_tx_l2",</div><div class='add'>+                  "hdmi_tx_l3",</div><div class='add'>+                  "hdmi_phy";</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;mmcc 116&gt;,</div><div class='add'>+               &lt;&amp;gcc 214&gt;,</div><div class='add'>+               &lt;&amp;xo_board&gt;;</div><div class='add'>+      clock-names = "iface",</div><div class='add'>+                    "ref",</div><div class='add'>+                    "xo";</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      vddio-supply = &lt;&amp;vreg_l12a_1p8&gt;;</div><div class='add'>+      vcca-supply = &lt;&amp;vreg_l28a_0p925&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml<br/>new file mode 100644<br/>index 000000000000..62045dcfb20c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,299 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,ipq8074-qmp-pcie-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP PHY controller (PCIe, IPQ8074)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='add'>+</div><div class='add'>+  Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see</div><div class='add'>+  qcom,sc8280xp-qmp-pcie-phy.yaml.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,ipq6018-qmp-pcie-phy</div><div class='add'>+      - qcom,ipq8074-qmp-gen3-pcie-phy</div><div class='add'>+      - qcom,ipq8074-qmp-pcie-phy</div><div class='add'>+      - qcom,msm8998-qmp-pcie-phy</div><div class='add'>+      - qcom,sc8180x-qmp-pcie-phy</div><div class='add'>+      - qcom,sdm845-qhp-pcie-phy</div><div class='add'>+      - qcom,sdm845-qmp-pcie-phy</div><div class='add'>+      - qcom,sdx55-qmp-pcie-phy</div><div class='add'>+      - qcom,sm8250-qmp-gen3x1-pcie-phy</div><div class='add'>+      - qcom,sm8250-qmp-gen3x2-pcie-phy</div><div class='add'>+      - qcom,sm8250-qmp-modem-pcie-phy</div><div class='add'>+      - qcom,sm8450-qmp-gen3x1-pcie-phy</div><div class='add'>+      - qcom,sm8450-qmp-gen4x2-pcie-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: serdes</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  vddp-ref-clk-supply: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description: single PHY-provider child node</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 6</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        items:</div><div class='add'>+          - description: PIPE clock</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          - const: pipe0</div><div class='add'>+</div><div class='add'>+      "#clock-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      clock-output-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      "#phy-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - clocks</div><div class='add'>+      - "#clock-cells"</div><div class='add'>+      - clock-output-names</div><div class='add'>+      - "#phy-cells"</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - ranges</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8998-qmp-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+            - const: ref</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: common</div><div class='add'>+      required:</div><div class='add'>+        - vdda-phy-supply</div><div class='add'>+        - vdda-pll-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq6018-qmp-pcie-phy</div><div class='add'>+              - qcom,ipq8074-qmp-gen3-pcie-phy</div><div class='add'>+              - qcom,ipq8074-qmp-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: common</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8180x-qmp-pcie-phy</div><div class='add'>+              - qcom,sdm845-qhp-pcie-phy</div><div class='add'>+              - qcom,sdm845-qmp-pcie-phy</div><div class='add'>+              - qcom,sdx55-qmp-pcie-phy</div><div class='add'>+              - qcom,sm8250-qmp-gen3x1-pcie-phy</div><div class='add'>+              - qcom,sm8250-qmp-gen3x2-pcie-phy</div><div class='add'>+              - qcom,sm8250-qmp-modem-pcie-phy</div><div class='add'>+              - qcom,sm8450-qmp-gen3x1-pcie-phy</div><div class='add'>+              - qcom,sm8450-qmp-gen4x2-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: refgen</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+      required:</div><div class='add'>+        - vdda-phy-supply</div><div class='add'>+        - vdda-pll-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8250-qmp-gen3x2-pcie-phy</div><div class='add'>+              - qcom,sm8250-qmp-modem-pcie-phy</div><div class='add'>+              - qcom,sm8450-qmp-gen4x2-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX lane 1</div><div class='add'>+                - description: RX lane 1</div><div class='add'>+                - description: PCS</div><div class='add'>+                - description: TX lane 2</div><div class='add'>+                - description: RX lane 2</div><div class='add'>+                - description: PCS_MISC</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8180x-qmp-pcie-phy</div><div class='add'>+              - qcom,sdm845-qmp-pcie-phy</div><div class='add'>+              - qcom,sdx55-qmp-pcie-phy</div><div class='add'>+              - qcom,sm8250-qmp-gen3x1-pcie-phy</div><div class='add'>+              - qcom,sm8450-qmp-gen3x1-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX</div><div class='add'>+                - description: RX</div><div class='add'>+                - description: PCS</div><div class='add'>+                - description: PCS_MISC</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq6018-qmp-pcie-phy</div><div class='add'>+              - qcom,ipq8074-qmp-pcie-phy</div><div class='add'>+              - qcom,msm8998-qmp-pcie-phy</div><div class='add'>+              - qcom,sdm845-qhp-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX</div><div class='add'>+                - description: RX</div><div class='add'>+                - description: PCS</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='add'>+    phy-wrapper@1c0e000 {</div><div class='add'>+        compatible = "qcom,sm8250-qmp-gen3x2-pcie-phy";</div><div class='add'>+        reg = &lt;0x01c0e000 0x1c0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x01c0e000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_PCIE_PHY_AUX_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PCIE_1_CFG_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PCIE_WIGIG_CLKREF_EN&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PCIE1_PHY_REFGEN_CLK&gt;;</div><div class='add'>+        clock-names = "aux", "cfg_ahb", "ref", "refgen";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;gcc GCC_PCIE_1_PHY_BCR&gt;;</div><div class='add'>+        reset-names = "phy";</div><div class='add'>+</div><div class='add'>+        vdda-phy-supply = &lt;&amp;vreg_l10c_0p88&gt;;</div><div class='add'>+        vdda-pll-supply = &lt;&amp;vreg_l6b_1p2&gt;;</div><div class='add'>+</div><div class='add'>+        phy@200 {</div><div class='add'>+            reg = &lt;0x200 0x170&gt;,</div><div class='add'>+                  &lt;0x400 0x200&gt;,</div><div class='add'>+                  &lt;0xa00 0x1f0&gt;,</div><div class='add'>+                  &lt;0x600 0x170&gt;,</div><div class='add'>+                  &lt;0x800 0x200&gt;,</div><div class='add'>+                  &lt;0xe00 0xf4&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;;</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+            clock-output-names = "pcie_1_pipe_clk";</div><div class='add'>+</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml<br/>new file mode 100644<br/>index 000000000000..4e710ef75523<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,189 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-pcie-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP PHY controller (MSM8996 PCIe)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8996-qmp-pcie-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: serdes</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aux</div><div class='add'>+      - const: cfg_ahb</div><div class='add'>+      - const: ref</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: common</div><div class='add'>+      - const: cfg</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  vddp-ref-clk-supply: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description: one child node per PHY provided by this block</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        items:</div><div class='add'>+          - description: TX</div><div class='add'>+          - description: RX</div><div class='add'>+          - description: PCS</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        items:</div><div class='add'>+          - description: PIPE clock</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - pipe0</div><div class='add'>+              - pipe1</div><div class='add'>+              - pipe2</div><div class='add'>+</div><div class='add'>+      resets:</div><div class='add'>+        items:</div><div class='add'>+          - description: PHY reset</div><div class='add'>+</div><div class='add'>+      reset-names:</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - lane0</div><div class='add'>+              - lane1</div><div class='add'>+              - lane2</div><div class='add'>+</div><div class='add'>+      "#clock-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      clock-output-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      "#phy-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - clocks</div><div class='add'>+      - resets</div><div class='add'>+      - "#clock-cells"</div><div class='add'>+      - clock-output-names</div><div class='add'>+      - "#phy-cells"</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - ranges</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - vdda-phy-supply</div><div class='add'>+  - vdda-pll-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8996.h&gt;</div><div class='add'>+    pcie_phy: phy-wrapper@34000 {</div><div class='add'>+        compatible = "qcom,msm8996-qmp-pcie-phy";</div><div class='add'>+        reg = &lt;0x34000 0x488&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x34000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_PCIE_PHY_AUX_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PCIE_PHY_CFG_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PCIE_CLKREF_CLK&gt;;</div><div class='add'>+        clock-names = "aux", "cfg_ahb", "ref";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;gcc GCC_PCIE_PHY_BCR&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PCIE_PHY_COM_BCR&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PCIE_PHY_COM_NOCSR_BCR&gt;;</div><div class='add'>+        reset-names = "phy", "common", "cfg";</div><div class='add'>+</div><div class='add'>+        vdda-phy-supply = &lt;&amp;vreg_l28a_0p925&gt;;</div><div class='add'>+        vdda-pll-supply = &lt;&amp;vreg_l12a_1p8&gt;;</div><div class='add'>+</div><div class='add'>+        pciephy_0: phy@1000 {</div><div class='add'>+            reg = &lt;0x1000 0x130&gt;,</div><div class='add'>+                  &lt;0x1200 0x200&gt;,</div><div class='add'>+                  &lt;0x1400 0x1dc&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;;</div><div class='add'>+            resets = &lt;&amp;gcc GCC_PCIE_0_PHY_BCR&gt;;</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+            clock-output-names = "pcie_0_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pciephy_1: phy@2000 {</div><div class='add'>+            reg = &lt;0x2000 0x130&gt;,</div><div class='add'>+                  &lt;0x2200 0x200&gt;,</div><div class='add'>+                  &lt;0x2400 0x1dc&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_PCIE_1_PIPE_CLK&gt;;</div><div class='add'>+            resets = &lt;&amp;gcc GCC_PCIE_1_PHY_BCR&gt;;</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+            clock-output-names = "pcie_1_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pciephy_2: phy@3000 {</div><div class='add'>+            reg = &lt;0x3000 0x130&gt;,</div><div class='add'>+                  &lt;0x3200 0x200&gt;,</div><div class='add'>+                  &lt;0x3400 0x1dc&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;gcc GCC_PCIE_2_PIPE_CLK&gt;;</div><div class='add'>+            resets = &lt;&amp;gcc GCC_PCIE_2_PHY_BCR&gt;;</div><div class='add'>+</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+            clock-output-names = "pcie_2_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml<br/>new file mode 100644<br/>index 000000000000..80a5348dbfde<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-ufs-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,244 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-ufs-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP PHY controller (UFS, MSM8996)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='add'>+</div><div class='add'>+  Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see</div><div class='add'>+  qcom,sc8280xp-qmp-ufs-phy.yaml.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,msm8996-qmp-ufs-phy</div><div class='add'>+      - qcom,msm8998-qmp-ufs-phy</div><div class='add'>+      - qcom,sc8180x-qmp-ufs-phy</div><div class='add'>+      - qcom,sdm845-qmp-ufs-phy</div><div class='add'>+      - qcom,sm6115-qmp-ufs-phy</div><div class='add'>+      - qcom,sm6350-qmp-ufs-phy</div><div class='add'>+      - qcom,sm8150-qmp-ufs-phy</div><div class='add'>+      - qcom,sm8250-qmp-ufs-phy</div><div class='add'>+      - qcom,sm8350-qmp-ufs-phy</div><div class='add'>+      - qcom,sm8450-qmp-ufs-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: serdes</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ufsphy</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  vddp-ref-clk-supply: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description: single PHY-provider child node</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 6</div><div class='add'>+</div><div class='add'>+      "#clock-cells":</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      "#phy-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - "#phy-cells"</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - ranges</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - vdda-phy-supply</div><div class='add'>+  - vdda-pll-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8996-qmp-ufs-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ref</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8998-qmp-ufs-phy</div><div class='add'>+              - qcom,sc8180x-qmp-ufs-phy</div><div class='add'>+              - qcom,sdm845-qmp-ufs-phy</div><div class='add'>+              - qcom,sm6115-qmp-ufs-phy</div><div class='add'>+              - qcom,sm6350-qmp-ufs-phy</div><div class='add'>+              - qcom,sm8150-qmp-ufs-phy</div><div class='add'>+              - qcom,sm8250-qmp-ufs-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: ref_aux</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8450-qmp-ufs-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: ref_aux</div><div class='add'>+            - const: qref</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8998-qmp-ufs-phy</div><div class='add'>+              - qcom,sdm845-qmp-ufs-phy</div><div class='add'>+              - qcom,sm6350-qmp-ufs-phy</div><div class='add'>+              - qcom,sm8150-qmp-ufs-phy</div><div class='add'>+              - qcom,sm8250-qmp-ufs-phy</div><div class='add'>+              - qcom,sm8350-qmp-ufs-phy</div><div class='add'>+              - qcom,sm8450-qmp-ufs-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX lane 1</div><div class='add'>+                - description: RX lane 1</div><div class='add'>+                - description: PCS</div><div class='add'>+                - description: TX lane 2</div><div class='add'>+                - description: RX lane 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8180x-qmp-ufs-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX</div><div class='add'>+                - description: RX</div><div class='add'>+                - description: PCS</div><div class='add'>+                - description: PCS_MISC</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8996-qmp-ufs-phy</div><div class='add'>+              - qcom,sm6115-qmp-ufs-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX</div><div class='add'>+                - description: RX</div><div class='add'>+                - description: PCS</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sm8250.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+</div><div class='add'>+    phy-wrapper@1d87000 {</div><div class='add'>+        compatible = "qcom,sm8250-qmp-ufs-phy";</div><div class='add'>+        reg = &lt;0x01d87000 0x1c0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x01d87000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;, &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;;</div><div class='add'>+        clock-names = "ref", "ref_aux";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;ufs_mem_hc 0&gt;;</div><div class='add'>+        reset-names = "ufsphy";</div><div class='add'>+</div><div class='add'>+        vdda-phy-supply = &lt;&amp;vreg_l6b&gt;;</div><div class='add'>+        vdda-pll-supply = &lt;&amp;vreg_l3b&gt;;</div><div class='add'>+</div><div class='add'>+        phy@400 {</div><div class='add'>+            reg = &lt;0x400 0x108&gt;,</div><div class='add'>+                  &lt;0x600 0x1e0&gt;,</div><div class='add'>+                  &lt;0xc00 0x1dc&gt;,</div><div class='add'>+                  &lt;0x800 0x108&gt;,</div><div class='add'>+                  &lt;0xa00 0x1e0&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml<br/>new file mode 100644<br/>index 000000000000..e81a38281f8c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,394 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,msm8996-qmp-usb3-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP PHY controller (USB, MSM8996)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='add'>+</div><div class='add'>+  Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see</div><div class='add'>+  qcom,sc8280xp-qmp-usb3-uni-phy.yaml.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,ipq6018-qmp-usb3-phy</div><div class='add'>+      - qcom,ipq8074-qmp-usb3-phy</div><div class='add'>+      - qcom,msm8996-qmp-usb3-phy</div><div class='add'>+      - qcom,msm8998-qmp-usb3-phy</div><div class='add'>+      - qcom,qcm2290-qmp-usb3-phy</div><div class='add'>+      - qcom,sc7180-qmp-usb3-phy</div><div class='add'>+      - qcom,sc8180x-qmp-usb3-phy</div><div class='add'>+      - qcom,sdm845-qmp-usb3-phy</div><div class='add'>+      - qcom,sdm845-qmp-usb3-uni-phy</div><div class='add'>+      - qcom,sdx55-qmp-usb3-uni-phy</div><div class='add'>+      - qcom,sdx65-qmp-usb3-uni-phy</div><div class='add'>+      - qcom,sm6115-qmp-usb3-phy</div><div class='add'>+      - qcom,sm8150-qmp-usb3-phy</div><div class='add'>+      - qcom,sm8150-qmp-usb3-uni-phy</div><div class='add'>+      - qcom,sm8250-qmp-usb3-phy</div><div class='add'>+      - qcom,sm8250-qmp-usb3-uni-phy</div><div class='add'>+      - qcom,sm8350-qmp-usb3-phy</div><div class='add'>+      - qcom,sm8350-qmp-usb3-uni-phy</div><div class='add'>+      - qcom,sm8450-qmp-usb3-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: serdes</div><div class='add'>+      - description: DP_COM</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  vddp-ref-clk-supply: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description: single PHY-provider child node</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minItems: 3</div><div class='add'>+        maxItems: 6</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        items:</div><div class='add'>+          - description: PIPE clock</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        deprecated: true</div><div class='add'>+        items:</div><div class='add'>+          - const: pipe0</div><div class='add'>+</div><div class='add'>+      "#clock-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      clock-output-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      "#phy-cells":</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - clocks</div><div class='add'>+      - "#clock-cells"</div><div class='add'>+      - clock-output-names</div><div class='add'>+      - "#phy-cells"</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - ranges</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - vdda-phy-supply</div><div class='add'>+  - vdda-pll-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7180-qmp-usb3-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: com_aux</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm845-qmp-usb3-uni-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: com_aux</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: common</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq8074-qmp-usb3-phy</div><div class='add'>+              - qcom,msm8996-qmp-usb3-phy</div><div class='add'>+              - qcom,msm8998-qmp-usb3-phy</div><div class='add'>+              - qcom,sdx55-qmp-usb3-uni-phy</div><div class='add'>+              - qcom,sdx65-qmp-usb3-uni-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+            - const: ref</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: common</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8150-qmp-usb3-phy</div><div class='add'>+              - qcom,sm8150-qmp-usb3-uni-phy</div><div class='add'>+              - qcom,sm8250-qmp-usb3-uni-phy</div><div class='add'>+              - qcom,sm8350-qmp-usb3-uni-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: ref_clk_src</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: com_aux</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: common</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8250-qmp-usb3-phy</div><div class='add'>+              - qcom,sm8350-qmp-usb3-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: ref_clk_src</div><div class='add'>+            - const: com_aux</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: common</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,qcm2290-qmp-usb3-phy</div><div class='add'>+              - qcom,sm6115-qmp-usb3-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: com_aux</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: phy_phy</div><div class='add'>+            - const: phy</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm845-qmp-usb3-phy</div><div class='add'>+              - qcom,sm8150-qmp-usb3-phy</div><div class='add'>+              - qcom,sm8350-qmp-usb3-phy</div><div class='add'>+              - qcom,sm8450-qmp-usb3-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX lane 1</div><div class='add'>+                - description: RX lane 1</div><div class='add'>+                - description: PCS</div><div class='add'>+                - description: TX lane 2</div><div class='add'>+                - description: RX lane 2</div><div class='add'>+                - description: PCS_MISC</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8998-qmp-usb3-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX lane 1</div><div class='add'>+                - description: RX lane 1</div><div class='add'>+                - description: PCS</div><div class='add'>+                - description: TX lane 2</div><div class='add'>+                - description: RX lane 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq6018-qmp-usb3-phy</div><div class='add'>+              - qcom,ipq8074-qmp-usb3-phy</div><div class='add'>+              - qcom,qcm2290-qmp-usb3-phy</div><div class='add'>+              - qcom,sc7180-qmp-usb3-phy</div><div class='add'>+              - qcom,sc8180x-qmp-usb3-phy</div><div class='add'>+              - qcom,sdx55-qmp-usb3-uni-phy</div><div class='add'>+              - qcom,sdx65-qmp-usb3-uni-phy</div><div class='add'>+              - qcom,sm6115-qmp-usb3-phy</div><div class='add'>+              - qcom,sm8150-qmp-usb3-uni-phy</div><div class='add'>+              - qcom,sm8250-qmp-usb3-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX</div><div class='add'>+                - description: RX</div><div class='add'>+                - description: PCS</div><div class='add'>+                - description: PCS_MISC</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8996-qmp-usb3-phy</div><div class='add'>+              - qcom,sm8250-qmp-usb3-uni-phy</div><div class='add'>+              - qcom,sm8350-qmp-usb3-uni-phy</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^phy@[0-9a-f]+$":</div><div class='add'>+          properties:</div><div class='add'>+            reg:</div><div class='add'>+              items:</div><div class='add'>+                - description: TX</div><div class='add'>+                - description: RX</div><div class='add'>+                - description: PCS</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='add'>+    usb_2_qmpphy: phy-wrapper@88eb000 {</div><div class='add'>+        compatible = "qcom,sdm845-qmp-usb3-uni-phy";</div><div class='add'>+        reg = &lt;0x088eb000 0x18c&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x088eb000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_USB3_SEC_PHY_AUX_CLK &gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_USB_PHY_CFG_AHB2PHY_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_USB3_SEC_CLKREF_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_USB3_SEC_PHY_COM_AUX_CLK&gt;;</div><div class='add'>+        clock-names = "aux", "cfg_ahb", "ref", "com_aux";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;gcc GCC_USB3PHY_PHY_SEC_BCR&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_USB3_PHY_SEC_BCR&gt;;</div><div class='add'>+        reset-names = "phy", "common";</div><div class='add'>+</div><div class='add'>+        vdda-phy-supply = &lt;&amp;vdda_usb2_ss_1p2&gt;;</div><div class='add'>+        vdda-pll-supply = &lt;&amp;vdda_usb2_ss_core&gt;;</div><div class='add'>+</div><div class='add'>+        usb_2_ssphy: phy@200 {</div><div class='add'>+                reg = &lt;0x200 0x128&gt;,</div><div class='add'>+                      &lt;0x400 0x1fc&gt;,</div><div class='add'>+                      &lt;0x800 0x218&gt;,</div><div class='add'>+                      &lt;0x600 0x70&gt;;</div><div class='add'>+</div><div class='add'>+                clocks = &lt;&amp;gcc GCC_USB3_SEC_PHY_PIPE_CLK&gt;;</div><div class='add'>+</div><div class='add'>+                #clock-cells = &lt;0&gt;;</div><div class='add'>+                clock-output-names = "usb3_uni_phy_pipe_clk_src";</div><div class='add'>+</div><div class='add'>+                #phy-cells = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml<br/>new file mode 100644<br/>index 000000000000..dbc4a4c71f05<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,pcie2-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,pcie2-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm PCIe2 PHY controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm</div><div class='add'>+  platforms.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: qcom,qcs404-pcie2-phy</div><div class='add'>+      - const: qcom,pcie2-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: PHY register set</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: a clock-specifier pair for the "pipe" clock</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  vdda-vp-supply:</div><div class='add'>+    description: low voltage regulator</div><div class='add'>+</div><div class='add'>+  vdda-vph-supply:</div><div class='add'>+    description: high voltage regulator</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: pipe</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-output-names</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+  - vdda-vp-supply</div><div class='add'>+  - vdda-vph-supply</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-qcs404.h&gt;</div><div class='add'>+    phy@7786000 {</div><div class='add'>+      compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy";</div><div class='add'>+      reg = &lt;0x07786000 0xb8&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;;</div><div class='add'>+      resets = &lt;&amp;gcc GCC_PCIEPHY_0_PHY_BCR&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_0_PIPE_ARES&gt;;</div><div class='add'>+      reset-names = "phy", "pipe";</div><div class='add'>+</div><div class='add'>+      vdda-vp-supply = &lt;&amp;vreg_l3_1p05&gt;;</div><div class='add'>+      vdda-vph-supply = &lt;&amp;vreg_l5_1p8&gt;;</div><div class='add'>+</div><div class='add'>+      clock-output-names = "pcie_0_pipe_clk";</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml<br/>deleted file mode 100644<br/>index e20d9b087bb8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,496 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='del'>-</div><div class='del'>-title: Qualcomm QMP PHY controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  QMP phy controller supports physical layer functionality for a number of</div><div class='del'>-  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,ipq6018-qmp-pcie-phy</div><div class='del'>-      - qcom,ipq6018-qmp-usb3-phy</div><div class='del'>-      - qcom,ipq8074-qmp-pcie-phy</div><div class='del'>-      - qcom,ipq8074-qmp-usb3-phy</div><div class='del'>-      - qcom,msm8996-qmp-pcie-phy</div><div class='del'>-      - qcom,msm8996-qmp-ufs-phy</div><div class='del'>-      - qcom,msm8996-qmp-usb3-phy</div><div class='del'>-      - qcom,msm8998-qmp-pcie-phy</div><div class='del'>-      - qcom,msm8998-qmp-ufs-phy</div><div class='del'>-      - qcom,msm8998-qmp-usb3-phy</div><div class='del'>-      - qcom,qcm2290-qmp-usb3-phy</div><div class='del'>-      - qcom,sc7180-qmp-usb3-phy</div><div class='del'>-      - qcom,sc8180x-qmp-pcie-phy</div><div class='del'>-      - qcom,sc8180x-qmp-ufs-phy</div><div class='del'>-      - qcom,sc8180x-qmp-usb3-phy</div><div class='del'>-      - qcom,sc8280xp-qmp-ufs-phy</div><div class='del'>-      - qcom,sdm845-qhp-pcie-phy</div><div class='del'>-      - qcom,sdm845-qmp-pcie-phy</div><div class='del'>-      - qcom,sdm845-qmp-ufs-phy</div><div class='del'>-      - qcom,sdm845-qmp-usb3-phy</div><div class='del'>-      - qcom,sdm845-qmp-usb3-uni-phy</div><div class='del'>-      - qcom,sm6115-qmp-ufs-phy</div><div class='del'>-      - qcom,sm8150-qmp-ufs-phy</div><div class='del'>-      - qcom,sm8150-qmp-usb3-phy</div><div class='del'>-      - qcom,sm8150-qmp-usb3-uni-phy</div><div class='del'>-      - qcom,sm8250-qmp-ufs-phy</div><div class='del'>-      - qcom,sm8250-qmp-gen3x1-pcie-phy</div><div class='del'>-      - qcom,sm8250-qmp-gen3x2-pcie-phy</div><div class='del'>-      - qcom,sm8250-qmp-modem-pcie-phy</div><div class='del'>-      - qcom,sm8250-qmp-usb3-phy</div><div class='del'>-      - qcom,sm8250-qmp-usb3-uni-phy</div><div class='del'>-      - qcom,sm8350-qmp-ufs-phy</div><div class='del'>-      - qcom,sm8350-qmp-usb3-phy</div><div class='del'>-      - qcom,sm8350-qmp-usb3-uni-phy</div><div class='del'>-      - qcom,sm8450-qmp-gen3x1-pcie-phy</div><div class='del'>-      - qcom,sm8450-qmp-gen4x2-pcie-phy</div><div class='del'>-      - qcom,sm8450-qmp-ufs-phy</div><div class='del'>-      - qcom,sm8450-qmp-usb3-phy</div><div class='del'>-      - qcom,sdx55-qmp-pcie-phy</div><div class='del'>-      - qcom,sdx55-qmp-usb3-uni-phy</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    minItems: 1</div><div class='del'>-    items:</div><div class='del'>-      - description: Address and length of PHY's common serdes block.</div><div class='del'>-      - description: Address and length of PHY's DP_COM control block.</div><div class='del'>-</div><div class='del'>-  "#clock-cells":</div><div class='del'>-    enum: [ 1, 2 ]</div><div class='del'>-</div><div class='del'>-  "#address-cells":</div><div class='del'>-    enum: [ 1, 2 ]</div><div class='del'>-</div><div class='del'>-  "#size-cells":</div><div class='del'>-    enum: [ 1, 2 ]</div><div class='del'>-</div><div class='del'>-  ranges: true</div><div class='del'>-</div><div class='del'>-  clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 4</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 4</div><div class='del'>-</div><div class='del'>-  resets:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='del'>-  reset-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='del'>-  vdda-phy-supply:</div><div class='del'>-    description:</div><div class='del'>-      Phandle to a regulator supply to PHY core block.</div><div class='del'>-</div><div class='del'>-  vdda-pll-supply:</div><div class='del'>-    description:</div><div class='del'>-      Phandle to 1.8V regulator supply to PHY refclk pll block.</div><div class='del'>-</div><div class='del'>-  vddp-ref-clk-supply:</div><div class='del'>-    description:</div><div class='del'>-      Phandle to a regulator supply to any specific refclk pll block.</div><div class='del'>-</div><div class='del'>-#Required nodes:</div><div class='del'>-patternProperties:</div><div class='del'>-  "^phy@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Each device node of QMP phy is required to have as many child nodes as</div><div class='del'>-      the number of lanes the PHY has.</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - "#clock-cells"</div><div class='del'>-  - "#address-cells"</div><div class='del'>-  - "#size-cells"</div><div class='del'>-  - ranges</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='del'>-  - resets</div><div class='del'>-  - reset-names</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sdm845-qmp-usb3-uni-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: Phy config clock.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-            - description: Phy common block aux clock.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: cfg_ahb</div><div class='del'>-            - const: ref</div><div class='del'>-            - const: com_aux</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-            - description: phy common block reset.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-            - const: common</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sdx55-qmp-usb3-uni-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: Phy config clock.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: cfg_ahb</div><div class='del'>-            - const: ref</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-            - description: phy common block reset.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-            - const: common</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,msm8996-qmp-pcie-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: Phy config clock.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: cfg_ahb</div><div class='del'>-            - const: ref</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-            - description: phy common block reset.</div><div class='del'>-            - description: phy's ahb cfg block reset.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-            - const: common</div><div class='del'>-            - const: cfg</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,ipq8074-qmp-usb3-phy</div><div class='del'>-              - qcom,msm8996-qmp-usb3-phy</div><div class='del'>-              - qcom,msm8998-qmp-pcie-phy</div><div class='del'>-              - qcom,msm8998-qmp-usb3-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: Phy config clock.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: cfg_ahb</div><div class='del'>-            - const: ref</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-            - description: phy common block reset.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-            - const: common</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,msm8996-qmp-ufs-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: ref</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: PHY reset in the UFS controller.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: ufsphy</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,msm8998-qmp-ufs-phy</div><div class='del'>-              - qcom,sdm845-qmp-ufs-phy</div><div class='del'>-              - qcom,sm8150-qmp-ufs-phy</div><div class='del'>-              - qcom,sm8250-qmp-ufs-phy</div><div class='del'>-              - qcom,sc8180x-qmp-ufs-phy</div><div class='del'>-              - qcom,sc8280xp-qmp-ufs-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-            - description: Phy reference aux clock.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: ref</div><div class='del'>-            - const: ref_aux</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: PHY reset in the UFS controller.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: ufsphy</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,ipq6018-qmp-pcie-phy</div><div class='del'>-              - qcom,ipq8074-qmp-pcie-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: Phy config clock.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: cfg_ahb</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-            - description: phy common block reset.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-            - const: common</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sc8180x-qmp-pcie-phy</div><div class='del'>-              - qcom,sdm845-qhp-pcie-phy</div><div class='del'>-              - qcom,sdm845-qmp-pcie-phy</div><div class='del'>-              - qcom,sdx55-qmp-pcie-phy</div><div class='del'>-              - qcom,sm8250-qmp-gen3x1-pcie-phy</div><div class='del'>-              - qcom,sm8250-qmp-gen3x2-pcie-phy</div><div class='del'>-              - qcom,sm8250-qmp-modem-pcie-phy</div><div class='del'>-              - qcom,sm8450-qmp-gen3x1-pcie-phy</div><div class='del'>-              - qcom,sm8450-qmp-gen4x2-pcie-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: Phy config clock.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-            - description: Phy refgen clk.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: cfg_ahb</div><div class='del'>-            - const: ref</div><div class='del'>-            - const: refgen</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sm8150-qmp-usb3-phy</div><div class='del'>-              - qcom,sm8150-qmp-usb3-uni-phy</div><div class='del'>-              - qcom,sm8250-qmp-usb3-uni-phy</div><div class='del'>-              - qcom,sm8350-qmp-usb3-uni-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: 19.2 MHz ref clk source.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-            - description: Phy common block aux clock.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: ref_clk_src</div><div class='del'>-            - const: ref</div><div class='del'>-            - const: com_aux</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-            - description: phy common block reset.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-            - const: common</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sm8250-qmp-usb3-phy</div><div class='del'>-              - qcom,sm8350-qmp-usb3-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy aux clock.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-            - description: Phy common block aux clock.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: aux</div><div class='del'>-            - const: ref_clk_src</div><div class='del'>-            - const: com_aux</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-            - description: phy common block reset.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy</div><div class='del'>-            - const: common</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,qcm2290-qmp-usb3-phy</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Phy config clock.</div><div class='del'>-            - description: 19.2 MHz ref clk.</div><div class='del'>-            - description: Phy common block aux clock.</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: cfg_ahb</div><div class='del'>-            - const: ref</div><div class='del'>-            - const: com_aux</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: phy_phy reset.</div><div class='del'>-            - description: reset of phy block.</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: phy_phy</div><div class='del'>-            - const: phy</div><div class='del'>-      required:</div><div class='del'>-        - vdda-phy-supply</div><div class='del'>-        - vdda-pll-supply</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='del'>-    usb_2_qmpphy: phy-wrapper@88eb000 {</div><div class='del'>-        compatible = "qcom,sdm845-qmp-usb3-uni-phy";</div><div class='del'>-        reg = &lt;0x088eb000 0x18c&gt;;</div><div class='del'>-        #clock-cells = &lt;1&gt;;</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0x0 0x088eb000 0x2000&gt;;</div><div class='del'>-</div><div class='del'>-        clocks = &lt;&amp;gcc GCC_USB3_SEC_PHY_AUX_CLK &gt;,</div><div class='del'>-                 &lt;&amp;gcc GCC_USB_PHY_CFG_AHB2PHY_CLK&gt;,</div><div class='del'>-                 &lt;&amp;gcc GCC_USB3_SEC_CLKREF_CLK&gt;,</div><div class='del'>-                 &lt;&amp;gcc GCC_USB3_SEC_PHY_COM_AUX_CLK&gt;;</div><div class='del'>-        clock-names = "aux", "cfg_ahb", "ref", "com_aux";</div><div class='del'>-</div><div class='del'>-        resets = &lt;&amp;gcc GCC_USB3PHY_PHY_SEC_BCR&gt;,</div><div class='del'>-                 &lt;&amp;gcc GCC_USB3_PHY_SEC_BCR&gt;;</div><div class='del'>-        reset-names = "phy", "common";</div><div class='del'>-</div><div class='del'>-        vdda-phy-supply = &lt;&amp;vdda_usb2_ss_1p2&gt;;</div><div class='del'>-        vdda-pll-supply = &lt;&amp;vdda_usb2_ss_core&gt;;</div><div class='del'>-</div><div class='del'>-        usb_2_ssphy: phy@200 {</div><div class='del'>-                reg = &lt;0x200 0x128&gt;,</div><div class='del'>-                      &lt;0x400 0x1fc&gt;,</div><div class='del'>-                      &lt;0x800 0x218&gt;,</div><div class='del'>-                      &lt;0x600 0x70&gt;;</div><div class='del'>-                #clock-cells = &lt;0&gt;;</div><div class='del'>-                #phy-cells = &lt;0&gt;;</div><div class='del'>-                clocks = &lt;&amp;gcc GCC_USB3_SEC_PHY_PIPE_CLK&gt;;</div><div class='del'>-                clock-names = "pipe0";</div><div class='del'>-                clock-output-names = "usb3_uni_phy_pipe_clk_src";</div><div class='del'>-            };</div><div class='del'>-        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml<br/>index 0ab3dad3f121..543c1a2811a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm QUSB2 phy controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Manu Gautam &lt;mgautam@codeaurora.org&gt;</div><div class='add'>+  - Wesley Cheng &lt;quic_wcheng@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.</div><div class='hunk'>@@ -30,6 +30,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,sc7180-qusb2-phy</div><div class='add'>+              - qcom,sdm670-qusb2-phy</div><div class='ctx'>               - qcom,sdm845-qusb2-phy</div><div class='ctx'>               - qcom,sm6350-qusb2-phy</div><div class='ctx'>           - const: qcom,qusb2-v2-phy</div><div class='hunk'>@@ -81,81 +82,74 @@ properties:</div><div class='ctx'>       Phandle to TCSR syscon register region.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: qcom,qusb2-v2-phy</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    qcom,imp-res-offset-value:</div><div class='del'>-      description:</div><div class='del'>-        It is a 6 bit value that specifies offset to be</div><div class='del'>-        added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY</div><div class='del'>-        tuning parameter that may vary for different boards of same SOC.</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 63</div><div class='del'>-      default: 0</div><div class='del'>-</div><div class='del'>-    qcom,bias-ctrl-value:</div><div class='del'>-      description:</div><div class='del'>-        It is a 6 bit value that specifies bias-ctrl-value. It is a PHY</div><div class='del'>-        tuning parameter that may vary for different boards of same SOC.</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 63</div><div class='del'>-      default: 32</div><div class='del'>-</div><div class='del'>-    qcom,charge-ctrl-value:</div><div class='del'>-      description:</div><div class='del'>-        It is a 2 bit value that specifies charge-ctrl-value. It is a PHY</div><div class='del'>-        tuning parameter that may vary for different boards of same SOC.</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 3</div><div class='del'>-      default: 0</div><div class='del'>-</div><div class='del'>-    qcom,hstx-trim-value:</div><div class='del'>-      description:</div><div class='del'>-        It is a 4 bit value that specifies tuning for HSTX</div><div class='del'>-        output current.</div><div class='del'>-        Possible range is - 15mA to 24mA (stepsize of 600 uA).</div><div class='del'>-        See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 15</div><div class='del'>-      default: 3</div><div class='del'>-</div><div class='del'>-    qcom,preemphasis-level:</div><div class='del'>-      description:</div><div class='del'>-        It is a 2 bit value that specifies pre-emphasis level.</div><div class='del'>-        Possible range is 0 to 15% (stepsize of 5%).</div><div class='del'>-        See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 3</div><div class='del'>-      default: 2</div><div class='del'>-</div><div class='del'>-    qcom,preemphasis-width:</div><div class='del'>-      description:</div><div class='del'>-        It is a 1 bit value that specifies how long the HSTX</div><div class='del'>-        pre-emphasis (specified using qcom,preemphasis-level) must be in</div><div class='del'>-        effect. Duration could be half-bit of full-bit.</div><div class='del'>-        See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 1</div><div class='del'>-      default: 0</div><div class='del'>-</div><div class='del'>-    qcom,hsdisc-trim-value:</div><div class='del'>-      description:</div><div class='del'>-        It is a 2 bit value tuning parameter that control disconnect</div><div class='del'>-        threshold and may vary for different boards of same SOC.</div><div class='del'>-      $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-      minimum: 0</div><div class='del'>-      maximum: 3</div><div class='del'>-      default: 0</div><div class='add'>+  qcom,imp-res-offset-value:</div><div class='add'>+    description:</div><div class='add'>+      It is a 6 bit value that specifies offset to be</div><div class='add'>+      added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY</div><div class='add'>+      tuning parameter that may vary for different boards of same SOC.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 63</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  qcom,bias-ctrl-value:</div><div class='add'>+    description:</div><div class='add'>+      It is a 6 bit value that specifies bias-ctrl-value. It is a PHY</div><div class='add'>+      tuning parameter that may vary for different boards of same SOC.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 63</div><div class='add'>+    default: 32</div><div class='add'>+</div><div class='add'>+  qcom,charge-ctrl-value:</div><div class='add'>+    description:</div><div class='add'>+      It is a 2 bit value that specifies charge-ctrl-value. It is a PHY</div><div class='add'>+      tuning parameter that may vary for different boards of same SOC.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  qcom,hstx-trim-value:</div><div class='add'>+    description:</div><div class='add'>+      It is a 4 bit value that specifies tuning for HSTX</div><div class='add'>+      output current.</div><div class='add'>+      Possible range is - 15mA to 24mA (stepsize of 600 uA).</div><div class='add'>+      See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    default: 3</div><div class='add'>+</div><div class='add'>+  qcom,preemphasis-level:</div><div class='add'>+    description:</div><div class='add'>+      It is a 2 bit value that specifies pre-emphasis level.</div><div class='add'>+      Possible range is 0 to 15% (stepsize of 5%).</div><div class='add'>+      See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+    default: 2</div><div class='add'>+</div><div class='add'>+  qcom,preemphasis-width:</div><div class='add'>+    description:</div><div class='add'>+      It is a 1 bit value that specifies how long the HSTX</div><div class='add'>+      pre-emphasis (specified using qcom,preemphasis-level) must be in</div><div class='add'>+      effect. Duration could be half-bit of full-bit.</div><div class='add'>+      See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  qcom,hsdisc-trim-value:</div><div class='add'>+    description:</div><div class='add'>+      It is a 2 bit value tuning parameter that control disconnect</div><div class='add'>+      threshold and may vary for different boards of same SOC.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+    default: 0</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -168,6 +162,23 @@ required:</div><div class='ctx'>   - vdda-phy-dpdm-supply</div><div class='ctx'>   - resets</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: qcom,qusb2-v2-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,imp-res-offset-value: false</div><div class='add'>+        qcom,bias-ctrl-value: false</div><div class='add'>+        qcom,charge-ctrl-value: false</div><div class='add'>+        qcom,hstx-trim-value: false</div><div class='add'>+        qcom,preemphasis-level: false</div><div class='add'>+        qcom,preemphasis-width: false</div><div class='add'>+        qcom,hsdisc-trim-value: false</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml<br/>index 60dc27834e1d..0ef2c9b9d466 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml</a></div><div class='hunk'>@@ -2,22 +2,34 @@</div><div class='ctx'> </div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom,qmp-usb3-dp-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm QMP USB3 DP PHY controller</div><div class='add'>+title: Qualcomm QMP USB3 DP PHY controller (SC7180)</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.</div><div class='add'>+</div><div class='add'>+  Note that these bindings are for SoCs up to SC8180X. For newer SoCs, see</div><div class='add'>+  qcom,sc8280xp-qmp-usb43dp-phy.yaml.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Manu Gautam &lt;mgautam@codeaurora.org&gt;</div><div class='add'>+  - Wesley Cheng &lt;quic_wcheng@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,sc7180-qmp-usb3-dp-phy</div><div class='del'>-      - qcom,sc7280-qmp-usb3-dp-phy</div><div class='del'>-      - qcom,sc8180x-qmp-usb3-dp-phy</div><div class='del'>-      - qcom,sdm845-qmp-usb3-dp-phy</div><div class='del'>-      - qcom,sm8250-qmp-usb3-dp-phy</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sc7180-qmp-usb3-dp-phy</div><div class='add'>+          - qcom,sc8180x-qmp-usb3-dp-phy</div><div class='add'>+          - qcom,sdm845-qmp-usb3-dp-phy</div><div class='add'>+          - qcom,sm8250-qmp-usb3-dp-phy</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7280-qmp-usb3-dp-phy</div><div class='add'>+          - const: qcom,sm8250-qmp-usb3-dp-phy</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: Address and length of PHY's USB serdes block.</div><div class='hunk'>@@ -30,9 +42,6 @@ properties:</div><div class='ctx'>       - const: dp_com</div><div class='ctx'>       - const: dp</div><div class='ctx'> </div><div class='del'>-  "#clock-cells":</div><div class='del'>-    enum: [ 1, 2 ]</div><div class='del'>-</div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     enum: [ 1, 2 ]</div><div class='ctx'> </div><div class='hunk'>@@ -42,18 +51,15 @@ properties:</div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Phy aux clock.</div><div class='del'>-      - description: Phy config clock.</div><div class='del'>-      - description: 19.2 MHz ref clk.</div><div class='del'>-      - description: Phy common block aux clock.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: aux</div><div class='del'>-      - const: cfg_ahb</div><div class='del'>-      - const: ref</div><div class='del'>-      - const: com_aux</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -77,10 +83,11 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Phandle to a regulator supply to any specific refclk pll block.</div><div class='ctx'> </div><div class='del'>-#Required nodes:</div><div class='add'>+# Required nodes:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^usb3-phy@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       The USB3 PHY.</div><div class='ctx'> </div><div class='hunk'>@@ -99,6 +106,7 @@ patternProperties:</div><div class='ctx'>           - description: pipe clock</div><div class='ctx'> </div><div class='ctx'>       clock-names:</div><div class='add'>+        deprecated: true</div><div class='ctx'>         items:</div><div class='ctx'>           - const: pipe0</div><div class='ctx'> </div><div class='hunk'>@@ -115,12 +123,12 @@ patternProperties:</div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='ctx'>       - clocks</div><div class='del'>-      - clock-names</div><div class='ctx'>       - '#clock-cells'</div><div class='ctx'>       - '#phy-cells'</div><div class='ctx'> </div><div class='ctx'>   "^dp-phy@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       The DP PHY.</div><div class='ctx'> </div><div class='hunk'>@@ -147,7 +155,6 @@ patternProperties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - "#clock-cells"</div><div class='ctx'>   - "#address-cells"</div><div class='ctx'>   - "#size-cells"</div><div class='ctx'>   - ranges</div><div class='hunk'>@@ -158,6 +165,64 @@ required:</div><div class='ctx'>   - vdda-phy-supply</div><div class='ctx'>   - vdda-pll-supply</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc7180-qmp-usb3-dp-phy</div><div class='add'>+            - qcom,sdm845-qmp-usb3-dp-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Phy aux clock</div><div class='add'>+            - description: Phy config clock</div><div class='add'>+            - description: 19.2 MHz ref clk</div><div class='add'>+            - description: Phy common block aux clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: cfg_ahb</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: com_aux</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc8180x-qmp-usb3-dp-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Phy aux clock</div><div class='add'>+            - description: 19.2 MHz ref clk</div><div class='add'>+            - description: Phy common block aux clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: ref</div><div class='add'>+            - const: com_aux</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8250-qmp-usb3-dp-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Phy aux clock</div><div class='add'>+            - description: Board XO source</div><div class='add'>+            - description: Phy common block aux clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: aux</div><div class='add'>+            - const: ref_clk_src</div><div class='add'>+            - const: com_aux</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -169,7 +234,6 @@ examples:</div><div class='ctx'>               &lt;0x088e8000 0x10&gt;,</div><div class='ctx'>               &lt;0x088ea000 0x40&gt;;</div><div class='ctx'>         reg-names = "usb", "dp_com", "dp";</div><div class='del'>-        #clock-cells = &lt;1&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;1&gt;;</div><div class='ctx'>         ranges = &lt;0x0 0x088e9000 0x2000&gt;;</div><div class='hunk'>@@ -197,7 +261,6 @@ examples:</div><div class='ctx'>             #clock-cells = &lt;0&gt;;</div><div class='ctx'>             #phy-cells = &lt;0&gt;;</div><div class='ctx'>             clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_PIPE_CLK&gt;;</div><div class='del'>-            clock-names = "pipe0";</div><div class='ctx'>             clock-output-names = "usb3_phy_pipe_clk_src";</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml<br/>new file mode 100644<br/>index 000000000000..a0407fc79563<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-pcie-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP PHY controller (PCIe, SC8280XP)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc8280xp-qmp-gen3x1-pcie-phy</div><div class='add'>+      - qcom,sc8280xp-qmp-gen3x2-pcie-phy</div><div class='add'>+      - qcom,sc8280xp-qmp-gen3x4-pcie-phy</div><div class='add'>+      - qcom,sdx65-qmp-gen4x2-pcie-phy</div><div class='add'>+      - qcom,sm8350-qmp-gen3x1-pcie-phy</div><div class='add'>+      - qcom,sm8550-qmp-gen3x2-pcie-phy</div><div class='add'>+      - qcom,sm8550-qmp-gen4x2-pcie-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 5</div><div class='add'>+    maxItems: 6</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 5</div><div class='add'>+    items:</div><div class='add'>+      - const: aux</div><div class='add'>+      - const: cfg_ahb</div><div class='add'>+      - const: ref</div><div class='add'>+      - const: rchng</div><div class='add'>+      - const: pipe</div><div class='add'>+      - const: pipediv2</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: phy_nocsr</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-qref-supply: true</div><div class='add'>+</div><div class='add'>+  qcom,4ln-config-sel:</div><div class='add'>+    description: PCIe 4-lane configuration</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle of TCSR syscon</div><div class='add'>+          - description: offset of PCIe 4-lane configuration register</div><div class='add'>+          - description: offset of configuration bit for this PHY</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - vdda-phy-supply</div><div class='add'>+  - vdda-pll-supply</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - clock-output-names</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8280xp-qmp-gen3x4-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          items:</div><div class='add'>+            - description: port a</div><div class='add'>+            - description: port b</div><div class='add'>+      required:</div><div class='add'>+        - qcom,4ln-config-sel</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8350-qmp-gen3x1-pcie-phy</div><div class='add'>+              - qcom,sm8550-qmp-gen3x2-pcie-phy</div><div class='add'>+              - qcom,sm8550-qmp-gen4x2-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8550-qmp-gen4x2-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc8280xp.h&gt;</div><div class='add'>+</div><div class='add'>+    pcie2b_phy: phy@1c18000 {</div><div class='add'>+      compatible = "qcom,sc8280xp-qmp-gen3x2-pcie-phy";</div><div class='add'>+      reg = &lt;0x01c18000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_PCIE_2B_AUX_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2B_CFG_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2A2B_CLKREF_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE2B_PHY_RCHNG_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2B_PIPE_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2B_PIPEDIV2_CLK&gt;;</div><div class='add'>+      clock-names = "aux", "cfg_ahb", "ref", "rchng",</div><div class='add'>+                    "pipe", "pipediv2";</div><div class='add'>+</div><div class='add'>+      power-domains = &lt;&amp;gcc PCIE_2B_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+      resets = &lt;&amp;gcc GCC_PCIE_2B_PHY_BCR&gt;;</div><div class='add'>+      reset-names = "phy";</div><div class='add'>+</div><div class='add'>+      vdda-phy-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+      vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+      clock-output-names = "pcie_2b_pipe_clk";</div><div class='add'>+</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    pcie2a_phy: phy@1c24000 {</div><div class='add'>+      compatible = "qcom,sc8280xp-qmp-gen3x4-pcie-phy";</div><div class='add'>+      reg = &lt;0x01c24000 0x2000&gt;, &lt;0x01c26000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_PCIE_2A_AUX_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2A_CFG_AHB_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2A2B_CLKREF_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE2A_PHY_RCHNG_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2A_PIPE_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_PCIE_2A_PIPEDIV2_CLK&gt;;</div><div class='add'>+      clock-names = "aux", "cfg_ahb", "ref", "rchng",</div><div class='add'>+                    "pipe", "pipediv2";</div><div class='add'>+</div><div class='add'>+      power-domains = &lt;&amp;gcc PCIE_2A_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+      resets = &lt;&amp;gcc GCC_PCIE_2A_PHY_BCR&gt;;</div><div class='add'>+      reset-names = "phy";</div><div class='add'>+</div><div class='add'>+      vdda-phy-supply = &lt;&amp;vreg_l6d&gt;;</div><div class='add'>+      vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+      qcom,4ln-config-sel = &lt;&amp;tcsr 0xa044 0&gt;;</div><div class='add'>+</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+      clock-output-names = "pcie_2a_pipe_clk";</div><div class='add'>+</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml<br/>new file mode 100644<br/>index 000000000000..94c0fab065a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,113 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-ufs-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP PHY controller (UFS, SC8280XP)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sa8775p-qmp-ufs-phy</div><div class='add'>+      - qcom,sc8280xp-qmp-ufs-phy</div><div class='add'>+      - qcom,sm6125-qmp-ufs-phy</div><div class='add'>+      - qcom,sm7150-qmp-ufs-phy</div><div class='add'>+      - qcom,sm8550-qmp-ufs-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: ref</div><div class='add'>+      - const: ref_aux</div><div class='add'>+      - const: qref</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ufsphy</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - vdda-phy-supply</div><div class='add'>+  - vdda-pll-supply</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sa8775p-qmp-ufs-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 3</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc8280xp.h&gt;</div><div class='add'>+</div><div class='add'>+    ufs_mem_phy: phy@1d87000 {</div><div class='add'>+        compatible = "qcom,sc8280xp-qmp-ufs-phy";</div><div class='add'>+        reg = &lt;0x01d87000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_UFS_REF_CLKREF_CLK&gt;, &lt;&amp;gcc GCC_UFS_PHY_PHY_AUX_CLK&gt;;</div><div class='add'>+        clock-names = "ref", "ref_aux";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;gcc UFS_PHY_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;ufs_mem_hc 0&gt;;</div><div class='add'>+        reset-names = "ufsphy";</div><div class='add'>+</div><div class='add'>+        vdda-phy-supply = &lt;&amp;vreg_l6b&gt;;</div><div class='add'>+        vdda-pll-supply = &lt;&amp;vreg_l3b&gt;;</div><div class='add'>+</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml<br/>new file mode 100644<br/>index 000000000000..16fce1038285<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP PHY controller (USB, SC8280XP)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc8280xp-qmp-usb3-uni-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aux</div><div class='add'>+      - const: ref</div><div class='add'>+      - const: com_aux</div><div class='add'>+      - const: pipe</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: phy_phy</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - vdda-phy-supply</div><div class='add'>+  - vdda-pll-supply</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - clock-output-names</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc8280xp.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+</div><div class='add'>+    phy@88ef000 {</div><div class='add'>+      compatible = "qcom,sc8280xp-qmp-usb3-uni-phy";</div><div class='add'>+      reg = &lt;0x088ef000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_USB3_MP_PHY_AUX_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB3_MP0_CLKREF_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB3_MP_PHY_COM_AUX_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB3_MP_PHY_PIPE_0_CLK&gt;;</div><div class='add'>+      clock-names = "aux", "ref", "com_aux", "pipe";</div><div class='add'>+</div><div class='add'>+      power-domains = &lt;&amp;gcc USB30_MP_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+      resets = &lt;&amp;gcc GCC_USB3_UNIPHY_MP0_BCR&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB3UNIPHY_PHY_MP0_BCR&gt;;</div><div class='add'>+      reset-names = "phy", "phy_phy";</div><div class='add'>+</div><div class='add'>+      vdda-phy-supply = &lt;&amp;vreg_l3a&gt;;</div><div class='add'>+      vdda-pll-supply = &lt;&amp;vreg_l5a&gt;;</div><div class='add'>+</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+      clock-output-names = "usb2_phy0_pipe_clk";</div><div class='add'>+</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml<br/>new file mode 100644<br/>index 000000000000..3cd5fc3e8fab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QMP PHY controller supports physical layer functionality for a number of</div><div class='add'>+  controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc8280xp-qmp-usb43dp-phy</div><div class='add'>+      - qcom,sm6350-qmp-usb3-dp-phy</div><div class='add'>+      - qcom,sm8350-qmp-usb3-dp-phy</div><div class='add'>+      - qcom,sm8450-qmp-usb3-dp-phy</div><div class='add'>+      - qcom,sm8550-qmp-usb3-dp-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aux</div><div class='add'>+      - const: ref</div><div class='add'>+      - const: com_aux</div><div class='add'>+      - const: usb3_pipe</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: common</div><div class='add'>+</div><div class='add'>+  vdda-phy-supply: true</div><div class='add'>+</div><div class='add'>+  vdda-pll-supply: true</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 1</div><div class='add'>+    description:</div><div class='add'>+      See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - vdda-phy-supply</div><div class='add'>+  - vdda-pll-supply</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc8280xp.h&gt;</div><div class='add'>+</div><div class='add'>+    phy@88eb000 {</div><div class='add'>+      compatible = "qcom,sc8280xp-qmp-usb43dp-phy";</div><div class='add'>+      reg = &lt;0x088eb000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;gcc GCC_USB3_PRIM_PHY_AUX_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB4_EUD_CLKREF_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB3_PRIM_PHY_PIPE_CLK&gt;;</div><div class='add'>+      clock-names = "aux", "ref", "com_aux", "usb3_pipe";</div><div class='add'>+</div><div class='add'>+      power-domains = &lt;&amp;gcc USB30_PRIM_GDSC&gt;;</div><div class='add'>+</div><div class='add'>+      resets = &lt;&amp;gcc GCC_USB3_PHY_PRIM_BCR&gt;,</div><div class='add'>+               &lt;&amp;gcc GCC_USB4_DP_PHY_PRIM_BCR&gt;;</div><div class='add'>+      reset-names = "phy", "common";</div><div class='add'>+</div><div class='add'>+      vdda-phy-supply = &lt;&amp;vreg_l9d&gt;;</div><div class='add'>+      vdda-pll-supply = &lt;&amp;vreg_l4d&gt;;</div><div class='add'>+</div><div class='add'>+      #clock-cells = &lt;1&gt;;</div><div class='add'>+      #phy-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml<br/>new file mode 100644<br/>index 000000000000..c53bab107b6d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,snps-eusb2-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SNPS eUSB2 phy controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Abel Vesa &lt;abel.vesa@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  eUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8550-snps-eusb2-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: ref</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ref</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Phandle to eUSB2 to USB 2.0 repeater</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to 0.88V regulator supply to PHY digital circuit.</div><div class='add'>+</div><div class='add'>+  vdda12-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to 1.2V regulator supply to PHY refclk pll block.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - vdda12-supply</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-gcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8550-tcsr.h&gt;</div><div class='add'>+</div><div class='add'>+    usb_1_hsphy: phy@88e3000 {</div><div class='add'>+        compatible = "qcom,sm8550-snps-eusb2-phy";</div><div class='add'>+        reg = &lt;0x88e3000 0x154&gt;;</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;tcsrcc TCSR_USB2_CLKREF_EN&gt;;</div><div class='add'>+        clock-names = "ref";</div><div class='add'>+</div><div class='add'>+        vdd-supply = &lt;&amp;vreg_l1e_0p88&gt;;</div><div class='add'>+        vdda12-supply = &lt;&amp;vreg_l3e_1p2&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;gcc GCC_QUSB2PHY_PRIM_BCR&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml b/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml<br/>new file mode 100644<br/>index 000000000000..083fda530b48<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,snps-eusb2-repeater.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Synopsis eUSB2 to USB 2.0 repeater</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Abel Vesa &lt;abel.vesa@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  eUSB2 repeater converts between eUSB2 and USB 2.0 signaling levels and</div><div class='add'>+  allows a eUSB2 PHY to connect to legacy USB 2.0 products</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,pm8550b-eusb2-repeater</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  vdd18-supply: true</div><div class='add'>+</div><div class='add'>+  vdd3-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+    pmic@7 {</div><div class='add'>+      reg = &lt;0x7 SPMI_USID&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pm8550b_eusb2_repeater: phy@fd00 {</div><div class='add'>+        compatible = "qcom,pm8550b-eusb2-repeater";</div><div class='add'>+        reg = &lt;0xfd00&gt;;</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml<br/>index abcc4373f39e..6c99e02b2b4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY</div><div class='ctx'> </div><div class='hunk'>@@ -16,7 +16,6 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,usb-hs-28nm-femtophy</div><div class='del'>-      - qcom,usb-hs-28nm-mdm9607</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml<br/>index e23e5590eaa3..aa97478dd016 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/qcom,usb-hs-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm's USB HS PHY binding description</div><div class='add'>+title: Qualcomm's USB HS PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='hunk'>@@ -14,24 +14,24 @@ if:</div><div class='ctx'>     compatible:</div><div class='ctx'>       contains:</div><div class='ctx'>         const: qcom,usb-hs-phy-apq8064</div><div class='del'>-  then:</div><div class='del'>-    properties:</div><div class='del'>-      resets:</div><div class='del'>-        maxItems: 1</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    resets:</div><div class='add'>+      maxItems: 1</div><div class='ctx'> </div><div class='del'>-      reset-names:</div><div class='del'>-        const: por</div><div class='add'>+    reset-names:</div><div class='add'>+      const: por</div><div class='ctx'> </div><div class='del'>-  else:</div><div class='del'>-    properties:</div><div class='del'>-      resets:</div><div class='del'>-        minItems: 2</div><div class='del'>-        maxItems: 2</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    resets:</div><div class='add'>+      minItems: 2</div><div class='add'>+      maxItems: 2</div><div class='ctx'> </div><div class='del'>-      reset-names:</div><div class='del'>-        items:</div><div class='del'>-          - const: phy</div><div class='del'>-          - const: por</div><div class='add'>+    reset-names:</div><div class='add'>+      items:</div><div class='add'>+        - const: phy</div><div class='add'>+        - const: por</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -92,6 +92,8 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     otg: usb-controller {</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='ctx'>       ulpi {</div><div class='ctx'>         phy {</div><div class='ctx'>           compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt<br/>deleted file mode 100644<br/>index 3c7cb2be4b12..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,65 +0,0 @@</div><div class='del'>-Qualcomm's USB HSIC PHY</div><div class='del'>-</div><div class='del'>-PROPERTIES</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-    Usage: required</div><div class='del'>-    Value type: &lt;string&gt;</div><div class='del'>-    Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the</div><div class='del'>-		following:</div><div class='del'>-</div><div class='del'>-			"qcom,usb-hsic-phy-mdm9615"</div><div class='del'>-			"qcom,usb-hsic-phy-msm8974"</div><div class='del'>-</div><div class='del'>-- #phy-cells:</div><div class='del'>-    Usage: required</div><div class='del'>-    Value type: &lt;u32&gt;</div><div class='del'>-    Definition: Should contain 0</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-    Usage: required</div><div class='del'>-    Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-    Definition: Should contain clock specifier for phy, calibration and</div><div class='del'>-                a calibration sleep clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-    Usage: required</div><div class='del'>-    Value type: &lt;stringlist&gt;</div><div class='del'>-    Definition: Should contain "phy, "cal" and "cal_sleep"</div><div class='del'>-</div><div class='del'>-- pinctrl-names:</div><div class='del'>-    Usage: required</div><div class='del'>-    Value type: &lt;stringlist&gt;</div><div class='del'>-    Definition: Should contain "init" and "default" in that order</div><div class='del'>-</div><div class='del'>-- pinctrl-0:</div><div class='del'>-    Usage: required</div><div class='del'>-    Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-    Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch</div><div class='del'>-                free state</div><div class='del'>-</div><div class='del'>-- pinctrl-1:</div><div class='del'>-    Usage: required</div><div class='del'>-    Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-    Definition: List of pinctrl settings to apply to mux out the HSIC pins</div><div class='del'>-</div><div class='del'>-EXAMPLE</div><div class='del'>-</div><div class='del'>-usb-controller {</div><div class='del'>-	ulpi {</div><div class='del'>-		phy {</div><div class='del'>-			compatible = "qcom,usb-hsic-phy-msm8974",</div><div class='del'>-				     "qcom,usb-hsic-phy";</div><div class='del'>-			#phy-cells = &lt;0&gt;;</div><div class='del'>-			pinctrl-names = "init", "default";</div><div class='del'>-			pinctrl-0 = &lt;&amp;hsic_sleep&gt;;</div><div class='del'>-			pinctrl-1 = &lt;&amp;hsic_default&gt;;</div><div class='del'>-			clocks = &lt;&amp;gcc GCC_USB_HSIC_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB_HSIC_IO_CAL_CLK&gt;,</div><div class='del'>-				 &lt;&amp;gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK&gt;;</div><div class='del'>-			clock-names = "phy", "cal", "cal_sleep";</div><div class='del'>-			assigned-clocks = &lt;&amp;gcc GCC_USB_HSIC_IO_CAL_CLK&gt;;</div><div class='del'>-			assigned-clock-rates = &lt;960000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.yaml<br/>new file mode 100644<br/>index 000000000000..077e13a94448<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,usb-hsic-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm USB HSIC PHY Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,usb-hsic-phy-mdm9615</div><div class='add'>+          - qcom,usb-hsic-phy-msm8974</div><div class='add'>+      - const: qcom,usb-hsic-phy</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: cal</div><div class='add'>+      - const: cal_sleep</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  pinctrl-0: true</div><div class='add'>+  pinctrl-1: true</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: init</div><div class='add'>+      - const: default</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+  - pinctrl-0</div><div class='add'>+  - pinctrl-1</div><div class='add'>+  - pinctrl-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8974.h&gt;</div><div class='add'>+</div><div class='add'>+    phy {</div><div class='add'>+        compatible = "qcom,usb-hsic-phy-msm8974",</div><div class='add'>+                     "qcom,usb-hsic-phy";</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_USB_HSIC_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_USB_HSIC_IO_CAL_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK&gt;;</div><div class='add'>+        clock-names = "phy", "cal", "cal_sleep";</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        pinctrl-names = "init", "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;hsic_sleep&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;hsic_default&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml<br/>index 1ce251de0855..a26524b7e7b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml</a></div><div class='hunk'>@@ -1,30 +1,38 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Synopsys Femto High-Speed USB PHY V2</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Wesley Cheng &lt;wcheng@codeaurora.org&gt;</div><div class='add'>+  - Wesley Cheng &lt;quic_wcheng@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Qualcomm High-Speed USB PHY</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,usb-snps-hs-5nm-phy</div><div class='del'>-      - qcom,usb-snps-hs-7nm-phy</div><div class='del'>-      - qcom,sc7280-usb-hs-phy</div><div class='del'>-      - qcom,sc8180x-usb-hs-phy</div><div class='del'>-      - qcom,sc8280xp-usb-hs-phy</div><div class='del'>-      - qcom,sm8150-usb-hs-phy</div><div class='del'>-      - qcom,sm8250-usb-hs-phy</div><div class='del'>-      - qcom,sm8350-usb-hs-phy</div><div class='del'>-      - qcom,sm8450-usb-hs-phy</div><div class='del'>-      - qcom,usb-snps-femto-v2-phy</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sc8180x-usb-hs-phy</div><div class='add'>+          - qcom,usb-snps-femto-v2-phy</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc8280xp-usb-hs-phy</div><div class='add'>+          - const: qcom,usb-snps-hs-5nm-phy</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,sc7280-usb-hs-phy</div><div class='add'>+              - qcom,sdx55-usb-hs-phy</div><div class='add'>+              - qcom,sdx65-usb-hs-phy</div><div class='add'>+              - qcom,sm6375-usb-hs-phy</div><div class='add'>+              - qcom,sm8150-usb-hs-phy</div><div class='add'>+              - qcom,sm8250-usb-hs-phy</div><div class='add'>+              - qcom,sm8350-usb-hs-phy</div><div class='add'>+              - qcom,sm8450-usb-hs-phy</div><div class='add'>+          - const: qcom,usb-snps-hs-7nm-phy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -53,6 +61,94 @@ properties:</div><div class='ctx'>   vdda33-supply:</div><div class='ctx'>     description: phandle to the regulator 3.3V supply node.</div><div class='ctx'> </div><div class='add'>+  qcom,hs-disconnect-bp:</div><div class='add'>+    description:</div><div class='add'>+      This adjusts the voltage level for the threshold used to</div><div class='add'>+      detect a disconnect event at the host.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: -272</div><div class='add'>+    maximum: 2156</div><div class='add'>+</div><div class='add'>+  qcom,squelch-detector-bp:</div><div class='add'>+    description:</div><div class='add'>+      This adjusts the voltage level for the threshold used to</div><div class='add'>+      detect valid high-speed data.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: -2090</div><div class='add'>+    maximum: 1590</div><div class='add'>+</div><div class='add'>+  qcom,hs-amplitude-bp:</div><div class='add'>+    description:</div><div class='add'>+      This adjusts the high-speed DC level voltage.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: -660</div><div class='add'>+    maximum: 2670</div><div class='add'>+</div><div class='add'>+  qcom,pre-emphasis-duration-bp:</div><div class='add'>+    description:</div><div class='add'>+      This signal controls the duration for which the</div><div class='add'>+      HS pre-emphasis current is sourced onto DP&lt;#&gt; or DM&lt;#&gt;.</div><div class='add'>+      The HS Transmitter pre-emphasis duration is defined in terms of</div><div class='add'>+      unit amounts. One unit of pre-emphasis duration is approximately</div><div class='add'>+      650 ps and is defined as 1X pre-emphasis duration.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: 10000</div><div class='add'>+    maximum: 20000</div><div class='add'>+</div><div class='add'>+  qcom,pre-emphasis-amplitude-bp:</div><div class='add'>+    description:</div><div class='add'>+      This signal controls the amount of current sourced to</div><div class='add'>+      DP&lt;#&gt; and DM&lt;#&gt; after a J-to-K or K-to-J transition.</div><div class='add'>+      The HS Transmitter pre-emphasis current is defined in terms of unit</div><div class='add'>+      amounts. One unit amount is approximately 2 mA and is defined as</div><div class='add'>+      1X pre-emphasis current.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: 10000</div><div class='add'>+    maximum: 40000</div><div class='add'>+</div><div class='add'>+  qcom,hs-rise-fall-time-bp:</div><div class='add'>+    description:</div><div class='add'>+      This adjusts the rise/fall times of the high-speed waveform.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: -4100</div><div class='add'>+    maximum: 5430</div><div class='add'>+</div><div class='add'>+  qcom,hs-crossover-voltage-microvolt:</div><div class='add'>+    description:</div><div class='add'>+      This adjusts the voltage at which the DP&lt;#&gt; and DM&lt;#&gt;</div><div class='add'>+      signals cross while transmitting in HS mode.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: -31000</div><div class='add'>+    maximum: 28000</div><div class='add'>+</div><div class='add'>+  qcom,hs-output-impedance-micro-ohms:</div><div class='add'>+    description:</div><div class='add'>+      In some applications, there can be significant series resistance</div><div class='add'>+      on the D+ and D- paths between the transceiver and cable. This adjusts</div><div class='add'>+      the driver source impedance to compensate for added series</div><div class='add'>+      resistance on the USB. The hardware accepts only discrete values. The</div><div class='add'>+      value closest to the provided input will be chosen as the override value</div><div class='add'>+      for this param.</div><div class='add'>+    minimum: -2300000</div><div class='add'>+    maximum: 6100000</div><div class='add'>+</div><div class='add'>+  qcom,ls-fs-output-impedance-bp:</div><div class='add'>+    description:</div><div class='add'>+      This adjusts the low- and full-speed single-ended source</div><div class='add'>+      impedance while driving high. The following adjustment values are based</div><div class='add'>+      on nominal process, voltage, and temperature.</div><div class='add'>+      The hardware accepts only discrete values. The value closest to the</div><div class='add'>+      provided input will be chosen as the override value for this param.</div><div class='add'>+    minimum: -1053</div><div class='add'>+    maximum: 1310</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -71,7 +167,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,gcc-sm8150.h&gt;</div><div class='ctx'>     phy@88e2000 {</div><div class='del'>-        compatible = "qcom,sm8150-usb-hs-phy";</div><div class='add'>+        compatible = "qcom,sm8150-usb-hs-phy", "qcom,usb-snps-hs-7nm-phy";</div><div class='ctx'>         reg = &lt;0x088e2000 0x400&gt;;</div><div class='ctx'>         #phy-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml<br/>index bd1388d62ce0..6e4254ff1cd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom,usb-ss.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom,usb-ss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt b/Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt<br/>deleted file mode 100644<br/>index 30064253f290..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom-pcie2-phy.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-Qualcomm PCIe2 PHY controller</div><div class='del'>-=============================</div><div class='del'>-</div><div class='del'>-The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm</div><div class='del'>-platforms.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: compatible list, should be:</div><div class='del'>-	       "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy"</div><div class='del'>-</div><div class='del'>- - reg: offset and length of the PHY register set.</div><div class='del'>- - #phy-cells: must be 0.</div><div class='del'>-</div><div class='del'>- - clocks: a clock-specifier pair for the "pipe" clock</div><div class='del'>-</div><div class='del'>- - vdda-vp-supply: phandle to low voltage regulator</div><div class='del'>- - vdda-vph-supply: phandle to high voltage regulator</div><div class='del'>-</div><div class='del'>- - resets: reset-specifier pairs for the "phy" and "pipe" resets</div><div class='del'>- - reset-names: list of resets, should contain:</div><div class='del'>-		"phy" and "pipe"</div><div class='del'>-</div><div class='del'>- - clock-output-names: name of the outgoing clock signal from the PHY PLL</div><div class='del'>- - #clock-cells: must be 0</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>- phy@7786000 {</div><div class='del'>-	compatible = "qcom,qcs404-pcie2-phy", "qcom,pcie2-phy";</div><div class='del'>-	reg = &lt;0x07786000 0xb8&gt;;</div><div class='del'>-</div><div class='del'>-	clocks = &lt;&amp;gcc GCC_PCIE_0_PIPE_CLK&gt;;</div><div class='del'>-	resets = &lt;&amp;gcc GCC_PCIEPHY_0_PHY_BCR&gt;,</div><div class='del'>-	         &lt;&amp;gcc GCC_PCIE_0_PIPE_ARES&gt;;</div><div class='del'>-	reset-names = "phy", "pipe";</div><div class='del'>-</div><div class='del'>-	vdda-vp-supply = &lt;&amp;vreg_l3_1p05&gt;;</div><div class='del'>-	vdda-vph-supply = &lt;&amp;vreg_l5_1p8&gt;;</div><div class='del'>-</div><div class='del'>-	clock-output-names = "pcie_0_pipe_clk";</div><div class='del'>-	#clock-cells = &lt;0&gt;;</div><div class='del'>-	#phy-cells = &lt;0&gt;;</div><div class='del'>- };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml b/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml<br/>index 3e7191b168fb..09c614952fea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/qcom-usb-ipq4019-phy.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/qcom-usb-ipq4019-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcom IPQ40xx Dakota HS/SS USB PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt b/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt<br/>deleted file mode 100644<br/>index a3bd1c4499b7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,112 +0,0 @@</div><div class='del'>-* Renesas R-Car generation 2 USB PHY</div><div class='del'>-</div><div class='del'>-This file provides information on what the device node for the R-Car generation</div><div class='del'>-2 USB PHY contains.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "renesas,usb-phy-r8a7742" if the device is a part of R8A7742 SoC.</div><div class='del'>-	      "renesas,usb-phy-r8a7743" if the device is a part of R8A7743 SoC.</div><div class='del'>-	      "renesas,usb-phy-r8a7744" if the device is a part of R8A7744 SoC.</div><div class='del'>-	      "renesas,usb-phy-r8a7745" if the device is a part of R8A7745 SoC.</div><div class='del'>-	      "renesas,usb-phy-r8a77470" if the device is a part of R8A77470 SoC.</div><div class='del'>-	      "renesas,usb-phy-r8a7790" if the device is a part of R8A7790 SoC.</div><div class='del'>-	      "renesas,usb-phy-r8a7791" if the device is a part of R8A7791 SoC.</div><div class='del'>-	      "renesas,usb-phy-r8a7794" if the device is a part of R8A7794 SoC.</div><div class='del'>-	      "renesas,rcar-gen2-usb-phy" for a generic R-Car Gen2 or</div><div class='del'>-					  RZ/G1 compatible device.</div><div class='del'>-</div><div class='del'>-	      When compatible with the generic version, nodes must list the</div><div class='del'>-	      SoC-specific version corresponding to the platform first</div><div class='del'>-	      followed by the generic version.</div><div class='del'>-</div><div class='del'>-- reg: offset and length of the register block.</div><div class='del'>-- #address-cells: number of address cells for the USB channel subnodes, must</div><div class='del'>-		  be &lt;1&gt;.</div><div class='del'>-- #size-cells: number of size cells for the USB channel subnodes, must be &lt;0&gt;.</div><div class='del'>-- clocks: clock phandle and specifier pair.</div><div class='del'>-- clock-names: string, clock input name, must be "usbhs".</div><div class='del'>-</div><div class='del'>-The USB PHY device tree node should have the subnodes corresponding to the USB</div><div class='del'>-channels. These subnodes must contain the following properties:</div><div class='del'>-- reg: the USB controller selector; see the table below for the values.</div><div class='del'>-- #phy-cells: see phy-bindings.txt in the same directory, must be &lt;1&gt;.</div><div class='del'>-</div><div class='del'>-The phandle's argument in the PHY specifier is the USB controller selector for</div><div class='del'>-the USB channel other than r8a77470 SoC; see the selector meanings below:</div><div class='del'>-</div><div class='del'>-+-----------+---------------+---------------+</div><div class='del'>-|\ Selector |               |               |</div><div class='del'>-+ --------- +       0       |       1       |</div><div class='del'>-| Channel  \|               |               |</div><div class='del'>-+-----------+---------------+---------------+</div><div class='del'>-| 0         | PCI EHCI/OHCI | HS-USB        |</div><div class='del'>-| 2         | PCI EHCI/OHCI | xHCI          |</div><div class='del'>-+-----------+---------------+---------------+</div><div class='del'>-</div><div class='del'>-For r8a77470 SoC;see the selector meaning below:</div><div class='del'>-</div><div class='del'>-+-----------+---------------+---------------+</div><div class='del'>-|\ Selector |               |               |</div><div class='del'>-+ --------- +       0       |       1       |</div><div class='del'>-| Channel  \|               |               |</div><div class='del'>-+-----------+---------------+---------------+</div><div class='del'>-| 0         | EHCI/OHCI     | HS-USB        |</div><div class='del'>-+-----------+---------------+---------------+</div><div class='del'>-</div><div class='del'>-Example (Lager board):</div><div class='del'>-</div><div class='del'>-	usb-phy@e6590100 {</div><div class='del'>-		compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";</div><div class='del'>-		reg = &lt;0 0xe6590100 0 0x100&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;cpg CPG_MOD 704&gt;;</div><div class='del'>-		clock-names = "usbhs";</div><div class='del'>-		power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='del'>-		resets = &lt;&amp;cpg 704&gt;;</div><div class='del'>-</div><div class='del'>-		usb0: usb-channel@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-		usb2: usb-channel@2 {</div><div class='del'>-			reg = &lt;2&gt;;</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example (iWave RZ/G1C sbc):</div><div class='del'>-</div><div class='del'>-	usbphy0: usb-phy0@e6590100 {</div><div class='del'>-		compatible = "renesas,usb-phy-r8a77470",</div><div class='del'>-			     "renesas,rcar-gen2-usb-phy";</div><div class='del'>-		reg = &lt;0 0xe6590100 0 0x100&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;cpg CPG_MOD 704&gt;;</div><div class='del'>-		clock-names = "usbhs";</div><div class='del'>-		power-domains = &lt;&amp;sysc R8A77470_PD_ALWAYS_ON&gt;;</div><div class='del'>-		resets = &lt;&amp;cpg 704&gt;;</div><div class='del'>-</div><div class='del'>-		usb0: usb-channel@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usbphy1: usb-phy@e6598100 {</div><div class='del'>-		compatible = "renesas,usb-phy-r8a77470",</div><div class='del'>-			     "renesas,rcar-gen2-usb-phy";</div><div class='del'>-		reg = &lt;0 0xe6598100 0 0x100&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;cpg CPG_MOD 706&gt;;</div><div class='del'>-		clock-names = "usbhs";</div><div class='del'>-		power-domains = &lt;&amp;sysc R8A77470_PD_ALWAYS_ON&gt;;</div><div class='del'>-		resets = &lt;&amp;cpg 706&gt;;</div><div class='del'>-</div><div class='del'>-		usb1: usb-channel@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			#phy-cells = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/renesas,r8a779f0-ether-serdes.yaml b/Documentation/devicetree/bindings/phy/renesas,r8a779f0-ether-serdes.yaml<br/>new file mode 100644<br/>index 000000000000..93ab72874228<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/renesas,r8a779f0-ether-serdes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/renesas,r8a779f0-ether-serdes.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/renesas,r8a779f0-ether-serdes.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas Ethernet SERDES</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,r8a779f0-ether-serdes</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#phy-cells':</div><div class='add'>+    description: Port number of SERDES.</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - power-domains</div><div class='add'>+  - '#phy-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a779f0-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/r8a779f0-sysc.h&gt;</div><div class='add'>+</div><div class='add'>+    phy@e6444000 {</div><div class='add'>+        compatible = "renesas,r8a779f0-ether-serdes";</div><div class='add'>+        reg = &lt;0xe6444000 0xc00&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 1506&gt;;</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A779F0_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 1506&gt;;</div><div class='add'>+        #phy-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml<br/>new file mode 100644<br/>index 000000000000..afc09f39b02b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/renesas,rcar-gen2-usb-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/renesas,rcar-gen2-usb-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas R-Car Gen2 USB PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,usb-phy-r8a7742      # RZ/G1H</div><div class='add'>+          - renesas,usb-phy-r8a7743      # RZ/G1M</div><div class='add'>+          - renesas,usb-phy-r8a7744      # RZ/G1N</div><div class='add'>+          - renesas,usb-phy-r8a7745      # RZ/G1E</div><div class='add'>+          - renesas,usb-phy-r8a77470     # RZ/G1C</div><div class='add'>+          - renesas,usb-phy-r8a7790      # R-Car H2</div><div class='add'>+          - renesas,usb-phy-r8a7791      # R-Car M2-W</div><div class='add'>+          - renesas,usb-phy-r8a7794      # R-Car E2</div><div class='add'>+      - const: renesas,rcar-gen2-usb-phy # R-Car Gen2 or RZ/G1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: usbhs</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^usb-phy@[02]$":</div><div class='add'>+    type: object</div><div class='add'>+    description: Subnode corresponding to a USB channel.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        description: FIXME RZ/G1C supports channel 0 only</div><div class='add'>+        enum: [0, 2]</div><div class='add'>+</div><div class='add'>+      '#phy-cells':</div><div class='add'>+        description: |</div><div class='add'>+          The phandle's argument in the PHY specifier is the USB controller</div><div class='add'>+          selector for the USB channel.</div><div class='add'>+          For RZ/G1C:</div><div class='add'>+            - 0 for EHCI/OHCI</div><div class='add'>+            - 1 for HS-USB</div><div class='add'>+          For all other SoCS:</div><div class='add'>+            - 0 for PCI EHCI/OHCI</div><div class='add'>+            - 1 for HS-USB (channel 0) or xHCI (channel 2)</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - '#phy-cells'</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - power-domains</div><div class='add'>+  - usb-phy@0</div><div class='add'>+</div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: renesas,usb-phy-r8a77470</div><div class='add'>+then:</div><div class='add'>+  properties:</div><div class='add'>+    usb-phy@2: false</div><div class='add'>+else:</div><div class='add'>+  required:</div><div class='add'>+    - usb-phy@2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a7790-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/r8a7790-sysc.h&gt;</div><div class='add'>+    usb-phy-controller@e6590100 {</div><div class='add'>+        compatible = "renesas,usb-phy-r8a7790", "renesas,rcar-gen2-usb-phy";</div><div class='add'>+        reg = &lt;0xe6590100 0x100&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 704&gt;;</div><div class='add'>+        clock-names = "usbhs";</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 704&gt;;</div><div class='add'>+</div><div class='add'>+        usb0: usb-phy@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #phy-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+        usb2: usb-phy@2 {</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            #phy-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml<br/>index 16807bbbdcb1..f82649a55e91 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml</a></div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,usb2-phy-r9a07g043 # RZ/G2UL</div><div class='ctx'>               - renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,usb2-phy-r9a07g054 # RZ/V2L</div><div class='ctx'>           - const: renesas,rzg2l-usb2-phy</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml b/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml<br/>index b8483f9edbfc..fe57c5373d18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/renesas,usb3-phy.yaml</a></div><div class='hunk'>@@ -34,7 +34,7 @@ properties:</div><div class='ctx'>     # must not be 0.</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     items:</div><div class='del'>-      - const: usb3-if # The funcional clock</div><div class='add'>+      - const: usb3-if # The functional clock</div><div class='ctx'>       - const: usb3s_clk # The usb3's external clock</div><div class='ctx'>       - const: usb_extal # The usb2's external clock</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml<br/>index 4b75289735eb..0d6b8c28be07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/phy/phy-rockchip-inno-usb2.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/phy/rockchip,inno-usb2phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Rockchip USB2.0 phy with inno IP block</div><div class='hunk'>@@ -13,6 +13,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - rockchip,px30-usb2phy</div><div class='add'>+      - rockchip,rk3128-usb2phy</div><div class='ctx'>       - rockchip,rk3228-usb2phy</div><div class='ctx'>       - rockchip,rk3308-usb2phy</div><div class='ctx'>       - rockchip,rk3328-usb2phy</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml<br/>new file mode 100644<br/>index 000000000000..9f2d8d2cc7a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/rockchip,pcie3-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/rockchip,pcie3-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip PCIe v3 phy</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - rockchip,rk3568-pcie3-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: refclk_m</div><div class='add'>+      - const: refclk_n</div><div class='add'>+      - const: pclk</div><div class='add'>+</div><div class='add'>+  data-lanes:</div><div class='add'>+    description: which lanes (by position) should be mapped to which</div><div class='add'>+      controller (value). 0 means lane disabled, higher value means used.</div><div class='add'>+      (controller-number +1 )</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 16</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 16</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: phy</div><div class='add'>+</div><div class='add'>+  rockchip,phy-grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the syscon managing the phy "general register files"</div><div class='add'>+</div><div class='add'>+  rockchip,pipe-grf:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the syscon managing the pipe "general register files"</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - rockchip,phy-grf</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3568-cru.h&gt;</div><div class='add'>+    pcie30phy: phy@fe8c0000 {</div><div class='add'>+      compatible = "rockchip,rk3568-pcie3-phy";</div><div class='add'>+      reg = &lt;0xfe8c0000 0x20000&gt;;</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+      clocks = &lt;&amp;pmucru CLK_PCIE30PHY_REF_M&gt;,</div><div class='add'>+               &lt;&amp;pmucru CLK_PCIE30PHY_REF_N&gt;,</div><div class='add'>+               &lt;&amp;cru PCLK_PCIE30PHY&gt;;</div><div class='add'>+      clock-names = "refclk_m", "refclk_n", "pclk";</div><div class='add'>+      resets = &lt;&amp;cru SRST_PCIE30PHY&gt;;</div><div class='add'>+      reset-names = "phy";</div><div class='add'>+      rockchip,phy-grf = &lt;&amp;pcie30_phy_grf&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml<br/>index 8a3032a3bd73..5c35e5ceec0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml</a></div><div class='hunk'>@@ -18,6 +18,7 @@ properties:</div><div class='ctx'>       - rockchip,px30-dsi-dphy</div><div class='ctx'>       - rockchip,rk3128-dsi-dphy</div><div class='ctx'>       - rockchip,rk3368-dsi-dphy</div><div class='add'>+      - rockchip,rk3568-dsi-dphy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml<br/>new file mode 100644<br/>index 000000000000..2538235c5ac6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/rockchip,rk3288-dp-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/rockchip,rk3288-dp-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip specific extensions to the Analogix Display Port PHY</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rockchip,rk3288-dp-phy</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: 24m</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3288-cru.h&gt;</div><div class='add'>+    edp-phy {</div><div class='add'>+      compatible = "rockchip,rk3288-dp-phy";</div><div class='add'>+      clocks = &lt;&amp;cru SCLK_EDP_24M&gt;;</div><div class='add'>+      clock-names = "24m";</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt<br/>deleted file mode 100644<br/>index e3b4809fbe82..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Rockchip specific extensions to the Analogix Display Port PHY</div><div class='del'>-------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : should be one of the following supported values:</div><div class='del'>-	 - "rockchip.rk3288-dp-phy"</div><div class='del'>-- clocks: from common clock binding: handle to dp clock.</div><div class='del'>-	of memory mapped region.</div><div class='del'>-- clock-names: from common clock binding:</div><div class='del'>-	Required elements: "24m"</div><div class='del'>-- #phy-cells : from the generic PHY bindings, must be 0;</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-grf: syscon@ff770000 {</div><div class='del'>-	compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";</div><div class='del'>-</div><div class='del'>-...</div><div class='del'>-</div><div class='del'>-	edp_phy: edp-phy {</div><div class='del'>-		compatible = "rockchip,rk3288-dp-phy";</div><div class='del'>-		clocks = &lt;&amp;cru SCLK_EDP_24M&gt;;</div><div class='del'>-		clock-names = "24m";</div><div class='del'>-		#phy-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml<br/>index bb4a2e4b8ab0..0e6505e9da50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/rockchip-inno-csi-dphy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/rockchip-inno-csi-dphy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings</div><div class='add'>+title: Rockchip SoC MIPI RX0 D-PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>       - rockchip,rk1808-csi-dphy</div><div class='ctx'>       - rockchip,rk3326-csi-dphy</div><div class='ctx'>       - rockchip,rk3368-csi-dphy</div><div class='add'>+      - rockchip,rk3568-csi-dphy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml b/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml<br/>index 7d888d358823..5114e99b0035 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip SoC MIPI RX0 D-PHY Device Tree Bindings</div><div class='add'>+title: Rockchip SoC MIPI RX0 D-PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Helen Koike &lt;helen.koike@collabora.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml<br/>index 838c6d480ce6..3bee3f8733f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,dp-video-phy.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC DisplayPort PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -22,13 +22,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   samsung,pmu-syscon:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    deprecated: true</div><div class='ctx'>     description:</div><div class='del'>-      Phandle to PMU system controller interface.</div><div class='add'>+      Phandle to PMU system controller interface (if not a child of PMU).</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - "#phy-cells"</div><div class='del'>-  - samsung,pmu-syscon</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -36,6 +36,5 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     phy {</div><div class='ctx'>         compatible = "samsung,exynos5420-dp-video-phy";</div><div class='del'>-        samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='ctx'>         #phy-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml<br/>index c61574e10b2a..efc679c385ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,exynos-hdmi-phy.yaml</a></div><div class='hunk'>@@ -8,10 +8,9 @@ title: Samsung Exynos SoC HDMI PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Inki Dae &lt;inki.dae@samsung.com&gt;</div><div class='del'>-  - Joonyoung Shim &lt;jy0922.shim@samsung.com&gt;</div><div class='ctx'>   - Seung-Woo Kim &lt;sw0312.kim@samsung.com&gt;</div><div class='ctx'>   - Kyungmin Park &lt;kyungmin.park@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml<br/>index ac0af40be52d..41df8bb08ff7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/samsung,exynos-pcie-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Samsung SoC series PCIe PHY Device Tree Bindings</div><div class='add'>+title: Samsung SoC series PCIe PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='hunk'>@@ -21,12 +21,12 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   samsung,pmu-syscon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle for PMU system controller interface, used to</div><div class='ctx'>                  control PMU registers bits for PCIe PHY</div><div class='ctx'> </div><div class='ctx'>   samsung,fsys-sysreg:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle for FSYS sysreg interface, used to control</div><div class='ctx'>                  sysreg registers bits for PCIe PHY</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml<br/>index 62b39bb46585..8751e559484f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,exynos5250-sata-phy.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos5250 SoC SATA PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml<br/>index 54aa056b224d..b2250e4a6b1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,mipi-video-phy.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S5P/Exynos SoC MIPI CSIS/DSIM DPHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -35,15 +35,18 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   syscon:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    deprecated: true</div><div class='ctx'>     description:</div><div class='ctx'>       Phandle to PMU system controller interface, valid only for</div><div class='del'>-      samsung,s5pv210-mipi-video-phy and samsung,exynos5420-mipi-video-phy.</div><div class='add'>+      samsung,s5pv210-mipi-video-phy and samsung,exynos5420-mipi-video-phy (if</div><div class='add'>+      not a child of PMU).</div><div class='ctx'> </div><div class='ctx'>   samsung,pmu-syscon:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    deprecated: true</div><div class='ctx'>     description:</div><div class='ctx'>       Phandle to PMU system controller interface, valid for</div><div class='del'>-      samsung,exynos5433-mipi-video-phy.</div><div class='add'>+      samsung,exynos5433-mipi-video-phy (if not a child of PMU).</div><div class='ctx'> </div><div class='ctx'>   samsung,disp-sysreg:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='hunk'>@@ -81,13 +84,10 @@ allOf:</div><div class='ctx'>         samsung,disp-sysreg: false</div><div class='ctx'>         samsung,cam0-sysreg: false</div><div class='ctx'>         samsung,cam1-sysreg: false</div><div class='del'>-      required:</div><div class='del'>-        - syscon</div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='ctx'>         syscon: false</div><div class='ctx'>       required:</div><div class='del'>-        - samsung,pmu-syscon</div><div class='ctx'>         - samsung,disp-sysreg</div><div class='ctx'>         - samsung,cam0-sysreg</div><div class='ctx'>         - samsung,cam1-sysreg</div><div class='hunk'>@@ -99,7 +99,6 @@ examples:</div><div class='ctx'>     phy {</div><div class='ctx'>         compatible = "samsung,exynos5433-mipi-video-phy";</div><div class='ctx'>         #phy-cells = &lt;1&gt;;</div><div class='del'>-        samsung,pmu-syscon = &lt;&amp;pmu_system_controller&gt;;</div><div class='ctx'>         samsung,cam0-sysreg = &lt;&amp;syscon_cam0&gt;;</div><div class='ctx'>         samsung,cam1-sysreg = &lt;&amp;syscon_cam1&gt;;</div><div class='ctx'>         samsung,disp-sysreg = &lt;&amp;syscon_disp&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml<br/>index f6ed1a005e7a..782f975b43ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Samsung SoC series UFS PHY Device Tree Bindings</div><div class='add'>+title: Samsung SoC series UFS PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alim Akhtar &lt;alim.akhtar@samsung.com&gt;</div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - samsung,exynos7-ufs-phy</div><div class='ctx'>       - samsung,exynosautov9-ufs-phy</div><div class='add'>+      - tesla,fsd-ufs-phy</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -26,23 +27,25 @@ properties:</div><div class='ctx'>       - const: phy-pma</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: PLL reference clock</div><div class='del'>-      - description: symbol clock for input symbol ( rx0-ch0 symbol clock)</div><div class='del'>-      - description: symbol clock for input symbol ( rx1-ch1 symbol clock)</div><div class='del'>-      - description: symbol clock for output symbol ( tx0 symbol clock)</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: ref_clk</div><div class='del'>-      - const: rx1_symbol_clk</div><div class='del'>-      - const: rx0_symbol_clk</div><div class='del'>-      - const: tx0_symbol_clk</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   samsung,pmu-syscon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='del'>-    description: phandle for PMU system controller interface, used to</div><div class='del'>-                 control pmu registers bits for ufs m-phy</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    maxItems: 1</div><div class='add'>+    items:</div><div class='add'>+      minItems: 1</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle for PMU system controller interface, used to</div><div class='add'>+                       control pmu registers bits for ufs m-phy</div><div class='add'>+        - description: offset of the pmu control register</div><div class='add'>+    description:</div><div class='add'>+      It can be phandle/offset pair. The second cell which can represent an</div><div class='add'>+      offset is optional.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#phy-cells"</div><div class='hunk'>@@ -53,6 +56,39 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - samsung,pmu-syscon</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos7-ufs-phy</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: PLL reference clock</div><div class='add'>+            - description: symbol clock for input symbol (rx0-ch0 symbol clock)</div><div class='add'>+            - description: symbol clock for input symbol (rx1-ch1 symbol clock)</div><div class='add'>+            - description: symbol clock for output symbol (tx0 symbol clock)</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ref_clk</div><div class='add'>+            - const: rx1_symbol_clk</div><div class='add'>+            - const: rx0_symbol_clk</div><div class='add'>+            - const: tx0_symbol_clk</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: PLL reference clock</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ref_clk</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml<br/>index 056e270a4e88..d9f22a801cbf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,usb2-phy.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S5P/Exynos SoC USB 2.0 PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml<br/>index f83f0f8135b9..5ba55f9f20cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml<br/>index 3b400a85b44a..de3cffc850bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml</a></div><div class='hunk'>@@ -30,32 +30,79 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  clock-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:          # for PXs2</div><div class='del'>-          - const: link</div><div class='del'>-      - items:          # for Pro4</div><div class='del'>-          - const: link</div><div class='del'>-          - const: gio</div><div class='del'>-      - items:          # for others</div><div class='del'>-          - const: link</div><div class='del'>-          - const: phy</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 2</div><div class='del'>-    maxItems: 5</div><div class='add'>+    maxItems: 6</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:          # for Pro4</div><div class='del'>-          - const: link</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: pm</div><div class='del'>-          - const: tx</div><div class='del'>-          - const: rx</div><div class='del'>-      - items:          # for others</div><div class='del'>-          - const: link</div><div class='del'>-          - const: phy</div><div class='add'>+  reset-names: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pro4-ahci-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: gio</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: pm</div><div class='add'>+            - const: tx</div><div class='add'>+            - const: rx</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pxs2-ahci-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          const: link</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pxs3-ahci-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -70,20 +117,12 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    ahci-glue@65700000 {</div><div class='del'>-        compatible = "socionext,uniphier-pxs3-ahci-glue",</div><div class='del'>-                     "simple-mfd";</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0 0x65700000 0x100&gt;;</div><div class='del'>-</div><div class='del'>-        ahci_phy: phy@10 {</div><div class='del'>-            compatible = "socionext,uniphier-pxs3-ahci-phy";</div><div class='del'>-            reg = &lt;0x10 0x10&gt;;</div><div class='del'>-            #phy-cells = &lt;0&gt;;</div><div class='del'>-            clock-names = "link", "phy";</div><div class='del'>-            clocks = &lt;&amp;sys_clk 28&gt;, &lt;&amp;sys_clk 30&gt;;</div><div class='del'>-            reset-names = "link", "phy";</div><div class='del'>-            resets = &lt;&amp;sys_rst 28&gt;, &lt;&amp;sys_rst 30&gt;;</div><div class='del'>-        };</div><div class='add'>+    ahci_phy: phy@10 {</div><div class='add'>+        compatible = "socionext,uniphier-pxs3-ahci-phy";</div><div class='add'>+        reg = &lt;0x10 0x10&gt;;</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        clock-names = "link", "phy";</div><div class='add'>+        clocks = &lt;&amp;sys_clk 28&gt;, &lt;&amp;sys_clk 30&gt;;</div><div class='add'>+        reset-names = "link", "phy";</div><div class='add'>+        resets = &lt;&amp;sys_rst 28&gt;, &lt;&amp;sys_rst 30&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml<br/>index fbb71d6dd531..b3ed2f74a414 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml</a></div><div class='hunk'>@@ -31,28 +31,51 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  clock-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:            # for Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - const: link       # for others</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:            # for Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - const: link       # for others</div><div class='add'>+  reset-names: true</div><div class='ctx'> </div><div class='ctx'>   socionext,syscon:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: A phandle to system control to set configurations for phy</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pro5-pcie-phy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          const: link</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          const: link</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml<br/>index 479b203f7aa6..19522c54f448 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml</a></div><div class='hunk'>@@ -43,6 +43,9 @@ patternProperties:</div><div class='ctx'>       "#phy-cells":</div><div class='ctx'>         const: 0</div><div class='ctx'> </div><div class='add'>+      vbus-supply:</div><div class='add'>+        description: A phandle to the regulator for USB VBUS, only for USB host</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='ctx'>       - "#phy-cells"</div><div class='hunk'>@@ -58,28 +61,23 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     // The UniPhier usb2-phy should be a subnode of a "syscon" compatible node.</div><div class='ctx'> </div><div class='del'>-    soc-glue@5f800000 {</div><div class='del'>-        compatible = "socionext,uniphier-ld11-soc-glue", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x5f800000 0x2000&gt;;</div><div class='del'>-</div><div class='del'>-        usb-controller {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-usb2-phy";</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            usb_phy0: phy@0 {</div><div class='del'>-                reg = &lt;0&gt;;</div><div class='del'>-                #phy-cells = &lt;0&gt;;</div><div class='del'>-            };</div><div class='del'>-</div><div class='del'>-            usb_phy1: phy@1 {</div><div class='del'>-                reg = &lt;1&gt;;</div><div class='del'>-                #phy-cells = &lt;0&gt;;</div><div class='del'>-            };</div><div class='del'>-</div><div class='del'>-            usb_phy2: phy@2 {</div><div class='del'>-                reg = &lt;2&gt;;</div><div class='del'>-                #phy-cells = &lt;0&gt;;</div><div class='del'>-            };</div><div class='add'>+    usb-hub {</div><div class='add'>+        compatible = "socionext,uniphier-ld11-usb2-phy";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        usb_phy0: phy@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        usb_phy1: phy@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        usb_phy2: phy@2 {</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml<br/>index 33946efcac5e..2107d98ace15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml</a></div><div class='hunk'>@@ -31,27 +31,15 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 1</div><div class='add'>+    minItems: 2</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='del'>-  clock-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - const: link          # for PXs2</div><div class='del'>-      - items:               # for PXs3 with phy-ext</div><div class='del'>-          - const: link</div><div class='del'>-          - const: phy</div><div class='del'>-          - const: phy-ext</div><div class='del'>-      - items:               # for others</div><div class='del'>-          - const: link</div><div class='del'>-          - const: phy</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: link</div><div class='del'>-      - const: phy</div><div class='add'>+  reset-names: true</div><div class='ctx'> </div><div class='ctx'>   vbus-supply:</div><div class='ctx'>     description: A phandle to the regulator for USB VBUS</div><div class='hunk'>@@ -74,6 +62,77 @@ properties:</div><div class='ctx'>       required for each port, if any one is omitted, the trimming data</div><div class='ctx'>       of the port will not be set at all.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-pro5-usb3-hsphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - socionext,uniphier-pxs2-usb3-hsphy</div><div class='add'>+              - socionext,uniphier-ld20-usb3-hsphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - socionext,uniphier-pxs3-usb3-hsphy</div><div class='add'>+              - socionext,uniphier-nx1-usb3-hsphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: phy-ext</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -87,22 +146,15 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    usb-glue@65b00000 {</div><div class='del'>-        compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0 0x65b00000 0x400&gt;;</div><div class='del'>-</div><div class='del'>-        usb_hsphy0: hs-phy@200 {</div><div class='del'>-            compatible = "socionext,uniphier-ld20-usb3-hsphy";</div><div class='del'>-            reg = &lt;0x200 0x10&gt;;</div><div class='del'>-            #phy-cells = &lt;0&gt;;</div><div class='del'>-            clock-names = "link", "phy";</div><div class='del'>-            clocks = &lt;&amp;sys_clk 14&gt;, &lt;&amp;sys_clk 16&gt;;</div><div class='del'>-            reset-names = "link", "phy";</div><div class='del'>-            resets = &lt;&amp;sys_rst 14&gt;, &lt;&amp;sys_rst 16&gt;;</div><div class='del'>-            vbus-supply = &lt;&amp;usb_vbus0&gt;;</div><div class='del'>-            nvmem-cell-names = "rterm", "sel_t", "hs_i";</div><div class='del'>-            nvmem-cells = &lt;&amp;usb_rterm0&gt;, &lt;&amp;usb_sel_t0&gt;, &lt;&amp;usb_hs_i0&gt;;</div><div class='del'>-        };</div><div class='add'>+    usb_hsphy0: phy@200 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-usb3-hsphy";</div><div class='add'>+        reg = &lt;0x200 0x10&gt;;</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        clock-names = "link", "phy";</div><div class='add'>+        clocks = &lt;&amp;sys_clk 14&gt;, &lt;&amp;sys_clk 16&gt;;</div><div class='add'>+        reset-names = "link", "phy";</div><div class='add'>+        resets = &lt;&amp;sys_rst 14&gt;, &lt;&amp;sys_rst 16&gt;;</div><div class='add'>+        vbus-supply = &lt;&amp;usb_vbus0&gt;;</div><div class='add'>+        nvmem-cell-names = "rterm", "sel_t", "hs_i";</div><div class='add'>+        nvmem-cells = &lt;&amp;usb_rterm0&gt;, &lt;&amp;usb_sel_t0&gt;, &lt;&amp;usb_hs_i0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml<br/>index 92d46eb913a3..8f5aa6238bf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml</a></div><div class='hunk'>@@ -35,33 +35,88 @@ properties:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='del'>-  clock-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:             # for Pro4, Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - items:             # for PXs3 with phy-ext</div><div class='del'>-          - const: link</div><div class='del'>-          - const: phy</div><div class='del'>-          - const: phy-ext</div><div class='del'>-      - items:             # for others</div><div class='del'>-          - const: link</div><div class='del'>-          - const: phy</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:              # for Pro4,Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - items:              # for others</div><div class='del'>-          - const: link</div><div class='del'>-          - const: phy</div><div class='add'>+  reset-names: true</div><div class='ctx'> </div><div class='ctx'>   vbus-supply:</div><div class='del'>-    description: A phandle to the regulator for USB VBUS</div><div class='add'>+    description: A phandle to the regulator for USB VBUS, only for USB host</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - socionext,uniphier-pro4-usb3-ssphy</div><div class='add'>+              - socionext,uniphier-pro5-usb3-ssphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - socionext,uniphier-pxs2-usb3-ssphy</div><div class='add'>+              - socionext,uniphier-ld20-usb3-ssphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - socionext,uniphier-pxs3-usb3-ssphy</div><div class='add'>+              - socionext,uniphier-nx1-usb3-ssphy</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='add'>+            - const: phy-ext</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: link</div><div class='add'>+            - const: phy</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -71,27 +126,18 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - resets</div><div class='ctx'>   - reset-names</div><div class='del'>-  - vbus-supply</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    usb-glue@65b00000 {</div><div class='del'>-        compatible = "socionext,uniphier-ld20-dwc3-glue",</div><div class='del'>-                     "simple-mfd";</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0 0x65b00000 0x400&gt;;</div><div class='del'>-</div><div class='del'>-        usb_ssphy0: ss-phy@300 {</div><div class='del'>-            compatible = "socionext,uniphier-ld20-usb3-ssphy";</div><div class='del'>-            reg = &lt;0x300 0x10&gt;;</div><div class='del'>-            #phy-cells = &lt;0&gt;;</div><div class='del'>-            clock-names = "link", "phy";</div><div class='del'>-            clocks = &lt;&amp;sys_clk 14&gt;, &lt;&amp;sys_clk 16&gt;;</div><div class='del'>-            reset-names = "link", "phy";</div><div class='del'>-            resets = &lt;&amp;sys_rst 14&gt;, &lt;&amp;sys_rst 16&gt;;</div><div class='del'>-            vbus-supply = &lt;&amp;usb_vbus0&gt;;</div><div class='del'>-        };</div><div class='add'>+    usb_ssphy0: phy@300 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-usb3-ssphy";</div><div class='add'>+        reg = &lt;0x300 0x10&gt;;</div><div class='add'>+        #phy-cells = &lt;0&gt;;</div><div class='add'>+        clock-names = "link", "phy";</div><div class='add'>+        clocks = &lt;&amp;sys_clk 14&gt;, &lt;&amp;sys_clk 16&gt;;</div><div class='add'>+        reset-names = "link", "phy";</div><div class='add'>+        resets = &lt;&amp;sys_rst 14&gt;, &lt;&amp;sys_rst 16&gt;;</div><div class='add'>+        vbus-supply = &lt;&amp;usb_vbus0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml<br/>new file mode 100644<br/>index 000000000000..57914f214e06<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/sunplus,sp7021-usb2-phy.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/phy/sunplus,sp7021-usb2-phy.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SP7021 USB 2.0 PHY Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vincent Shih &lt;vincent.sunplus@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sunplus,sp7021-usb2-phy</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: UPHY register region</div><div class='add'>+      - description: MOON4 register region</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: phy</div><div class='add'>+      - const: moon4</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#phy-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    description: names corresponding to the nvmem cells of disconnect voltage</div><div class='add'>+    const: disc_vol</div><div class='add'>+</div><div class='add'>+  nvmem-cells:</div><div class='add'>+    description: nvmem cell address of disconnect voltage</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  sunplus,disc-vol-addr-off:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: the otp address offset of disconnect voltage</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - "#phy-cells"</div><div class='add'>+  - nvmem-cell-names</div><div class='add'>+  - nvmem-cells</div><div class='add'>+  - sunplus,disc-vol-addr-off</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sp_uphy0: usb-phy@9c004a80 {</div><div class='add'>+      compatible = "sunplus,sp7021-usb2-phy";</div><div class='add'>+      reg = &lt;0x9c004a80 0x80&gt;, &lt;0x9c000248 0x10&gt;;</div><div class='add'>+      reg-names = "phy", "moon4";</div><div class='add'>+      clocks = &lt;&amp;clkc 0x3d&gt;;</div><div class='add'>+      resets = &lt;&amp;rstc 0x2d&gt;;</div><div class='add'>+      #phy-cells = &lt;0&gt;;</div><div class='add'>+      nvmem-cell-names = "disc_vol";</div><div class='add'>+      nvmem-cells = &lt;&amp;disc_vol&gt;;</div><div class='add'>+      sunplus,disc-vol-addr-off = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml b/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml<br/>index 62dcb84c08aa..854e554eae67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI AM654 SERDES binding</div><div class='add'>+title: TI AM654 SERDES</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This binding describes the TI AM654 SERDES. AM654 SERDES can be configured</div><div class='hunk'>@@ -34,11 +34,6 @@ properties:</div><div class='ctx'>       Three input clocks referring to left input reference clock, refclk and right input reference</div><div class='ctx'>       clock.</div><div class='ctx'> </div><div class='del'>-  assigned-clocks:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='del'>-</div><div class='ctx'>   '#phy-cells':</div><div class='ctx'>     const: 2</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml b/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml<br/>index ff8a6d9eb153..be41b4547ec6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: CPSW Port's Interface Mode Selection PHY Tree Bindings</div><div class='add'>+title: CPSW Port's Interface Mode Selection PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kishon Vijay Abraham I &lt;kishon@ti.com&gt;</div><div class='hunk'>@@ -53,12 +53,30 @@ properties:</div><div class='ctx'>       - ti,am43xx-phy-gmii-sel</div><div class='ctx'>       - ti,dm814-phy-gmii-sel</div><div class='ctx'>       - ti,am654-phy-gmii-sel</div><div class='add'>+      - ti,j7200-cpsw5g-phy-gmii-sel</div><div class='add'>+      - ti,j721e-cpsw9g-phy-gmii-sel</div><div class='add'>+      - ti,j784s4-cpsw9g-phy-gmii-sel</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   '#phy-cells': true</div><div class='ctx'> </div><div class='add'>+  ti,qsgmii-main-ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description: |</div><div class='add'>+      Required only for QSGMII mode. Array to select the port/s for QSGMII</div><div class='add'>+      main mode. The size of the array corresponds to the number of QSGMII</div><div class='add'>+      interfaces and thus, the number of distinct QSGMII main ports,</div><div class='add'>+      supported by the device. If the device supports two QSGMII interfaces</div><div class='add'>+      but only one QSGMII interface is desired, repeat the QSGMII main port</div><div class='add'>+      value corresponding to the QSGMII interface in the array.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      minimum: 1</div><div class='add'>+      maximum: 8</div><div class='add'>+</div><div class='ctx'> allOf:</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -68,11 +86,58 @@ allOf:</div><div class='ctx'>               - ti,dra7xx-phy-gmii-sel</div><div class='ctx'>               - ti,dm814-phy-gmii-sel</div><div class='ctx'>               - ti,am654-phy-gmii-sel</div><div class='add'>+              - ti,j7200-cpsw5g-phy-gmii-sel</div><div class='add'>+              - ti,j721e-cpsw9g-phy-gmii-sel</div><div class='add'>+              - ti,j784s4-cpsw9g-phy-gmii-sel</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         '#phy-cells':</div><div class='ctx'>           const: 1</div><div class='ctx'>           description: CPSW port number (starting from 1)</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,j7200-cpsw5g-phy-gmii-sel</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,qsgmii-main-ports:</div><div class='add'>+          maxItems: 1</div><div class='add'>+          items:</div><div class='add'>+            minimum: 1</div><div class='add'>+            maximum: 4</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,j721e-cpsw9g-phy-gmii-sel</div><div class='add'>+              - ti,j784s4-cpsw9g-phy-gmii-sel</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,qsgmii-main-ports:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+          items:</div><div class='add'>+            minimum: 1</div><div class='add'>+            maximum: 8</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - ti,j7200-cpsw5g-phy-gmii-sel</div><div class='add'>+                - ti,j721e-cpsw9g-phy-gmii-sel</div><div class='add'>+                - ti,j784s4-cpsw9g-phy-gmii-sel</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,qsgmii-main-ports: false</div><div class='add'>+</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -97,7 +162,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    phy_gmii_sel: phy-gmii-sel@650 {</div><div class='add'>+    phy_gmii_sel: phy@650 {</div><div class='ctx'>         compatible = "ti,am3352-phy-gmii-sel";</div><div class='ctx'>         reg = &lt;0x650 0x4&gt;;</div><div class='ctx'>         #phy-cells = &lt;2&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml<br/>index dcd63908aeae..9ea30eaba314 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI J721E WIZ (SERDES Wrapper)</div><div class='ctx'> </div><div class='hunk'>@@ -15,20 +15,26 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - ti,j721e-wiz-16g</div><div class='ctx'>       - ti,j721e-wiz-10g</div><div class='add'>+      - ti,j721s2-wiz-10g</div><div class='ctx'>       - ti,am64-wiz-10g</div><div class='add'>+      - ti,j7200-wiz-10g</div><div class='add'>+      - ti,j784s4-wiz-10g</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 3</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 4</div><div class='ctx'>     description: clock-specifier to represent input to the WIZ</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 3</div><div class='ctx'>     items:</div><div class='ctx'>       - const: fck</div><div class='ctx'>       - const: core_ref_clk</div><div class='ctx'>       - const: ext_ref_clk</div><div class='add'>+      - const: core_ref1_clk</div><div class='ctx'> </div><div class='ctx'>   num-lanes:</div><div class='ctx'>     minimum: 1</div><div class='hunk'>@@ -48,18 +54,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='del'>-  assigned-clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='del'>-  assigned-clock-rates:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='ctx'>   typec-dir-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description:</div><div class='hunk'>@@ -79,10 +73,12 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   refclk-dig:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       WIZ node should have subnode for refclk_dig to select the reference</div><div class='ctx'>       clock source for the reference clock used in the PHY and PMA digital</div><div class='ctx'>       logic.</div><div class='add'>+    deprecated: true</div><div class='ctx'>     properties:</div><div class='ctx'>       clocks:</div><div class='ctx'>         minItems: 2</div><div class='hunk'>@@ -93,6 +89,9 @@ properties:</div><div class='ctx'>       "#clock-cells":</div><div class='ctx'>         const: 0</div><div class='ctx'> </div><div class='add'>+      clock-output-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='ctx'>       assigned-clocks:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -105,12 +104,19 @@ properties:</div><div class='ctx'>       - assigned-clocks</div><div class='ctx'>       - assigned-clock-parents</div><div class='ctx'> </div><div class='add'>+  ti,scm:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      phandle to System Control Module for syscon regmap access.</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^pll[0|1]-refclk$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       WIZ node should have subnodes for each of the PLLs present in</div><div class='ctx'>       the SERDES.</div><div class='add'>+    deprecated: true</div><div class='ctx'>     properties:</div><div class='ctx'>       clocks:</div><div class='ctx'>         maxItems: 2</div><div class='hunk'>@@ -119,6 +125,9 @@ patternProperties:</div><div class='ctx'>       "#clock-cells":</div><div class='ctx'>         const: 0</div><div class='ctx'> </div><div class='add'>+      clock-output-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='ctx'>       assigned-clocks:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -133,9 +142,11 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^cmn-refclk1?-dig-div$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       WIZ node should have subnodes for each of the PMA common refclock</div><div class='ctx'>       provided by the SERDES.</div><div class='add'>+    deprecated: true</div><div class='ctx'>     properties:</div><div class='ctx'>       clocks:</div><div class='ctx'>         maxItems: 1</div><div class='hunk'>@@ -145,6 +156,9 @@ patternProperties:</div><div class='ctx'>       "#clock-cells":</div><div class='ctx'>         const: 0</div><div class='ctx'> </div><div class='add'>+      clock-output-names:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - clocks</div><div class='ctx'>       - "#clock-cells"</div><div class='hunk'>@@ -170,6 +184,16 @@ required:</div><div class='ctx'>   - "#reset-cells"</div><div class='ctx'>   - ranges</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ti,j7200-wiz-10g</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - ti,scm</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml b/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml<br/>index 02b76f15e717..79dad3e89aa6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/phy/ti,tcan104x-can.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/phy/ti,tcan104x-can.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TCAN104x CAN TRANSCEIVER PHY</div><div class='ctx'> </div><div class='hunk'>@@ -15,6 +15,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - nxp,tjr1443</div><div class='ctx'>       - ti,tcan1042</div><div class='ctx'>       - ti,tcan1043</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml b/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml<br/>index 51492fe738ec..617f3c0b3dfb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/transmit-amplitude.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/transmit-amplitude.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/transmit-amplitude.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Common PHY and network PCS transmit amplitude property binding</div><div class='add'>+title: Common PHY and network PCS transmit amplitude property</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Binding describing the peak-to-peak transmit amplitude for common PHYs</div><div class='head'>diff --git a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml<br/>index 79906519c652..cefbc8b53a83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/phy/xlnx,zynqmp-psgtr.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx ZynqMP Gigabit Transceiver PHY Device Tree Bindings</div><div class='add'>+title: Xilinx ZynqMP Gigabit Transceiver PHY</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml<br/>index fb0f69ce9c16..7cb8a747feee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml</a></div><div class='hunk'>@@ -185,7 +185,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml<br/>index bfce850c2035..467016cbb037 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Pin Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -46,6 +46,7 @@ properties:</div><div class='ctx'>       - allwinner,sun8i-v3s-pinctrl</div><div class='ctx'>       - allwinner,sun9i-a80-pinctrl</div><div class='ctx'>       - allwinner,sun9i-a80-r-pinctrl</div><div class='add'>+      - allwinner,sun20i-d1-pinctrl</div><div class='ctx'>       - allwinner,sun50i-a64-pinctrl</div><div class='ctx'>       - allwinner,sun50i-a64-r-pinctrl</div><div class='ctx'>       - allwinner,sun50i-a100-pinctrl</div><div class='hunk'>@@ -80,9 +81,6 @@ properties:</div><div class='ctx'>       - const: hosc</div><div class='ctx'>       - const: losc</div><div class='ctx'> </div><div class='del'>-  resets:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'>   gpio-line-names: true</div><div class='hunk'>@@ -127,27 +125,37 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-  "^vcc-p[a-hlm]-supply$":</div><div class='add'>+  "^vcc-p[a-ilm]-supply$":</div><div class='ctx'>     description:</div><div class='ctx'>       Power supplies for pin banks.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#gpio-cells"</div><div class='del'>-  - "#interrupt-cells"</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - gpio-controller</div><div class='del'>-  - interrupt-controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   # FIXME: We should have the pin bank supplies here, but not a lot of</div><div class='ctx'>   # boards are defining it at the moment so it would generate a lot of</div><div class='ctx'>   # warnings.</div><div class='ctx'> </div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            enum:</div><div class='add'>+              - allwinner,sun50i-h616-r-pinctrl</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - "#interrupt-cells"</div><div class='add'>+        - interrupts</div><div class='add'>+        - interrupt-controller</div><div class='add'>+</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -175,6 +183,18 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           enum:</div><div class='add'>+            - allwinner,sun20i-d1-pinctrl</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='ctx'>             - allwinner,sun9i-a80-pinctrl</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml<br/>new file mode 100644<br/>index 000000000000..99080c9eaac3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-a1.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-a1.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson A1 pinmux controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: amlogic,meson-pinctrl-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson-a1-periphs-pinctrl</div><div class='add'>+      - amlogic,meson-s4-periphs-pinctrl</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^bank@[0-9a-z]+$":</div><div class='add'>+    $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 2</div><div class='add'>+</div><div class='add'>+      reg-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: mux</div><div class='add'>+          - const: gpio</div><div class='add'>+</div><div class='add'>+unevaluatedProperties:</div><div class='add'>+  type: object</div><div class='add'>+  $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    periphs_pinctrl: pinctrl {</div><div class='add'>+      compatible = "amlogic,meson-a1-periphs-pinctrl";</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;1&gt;;</div><div class='add'>+      ranges;</div><div class='add'>+</div><div class='add'>+      bank@400 {</div><div class='add'>+        reg = &lt;0x0400 0x003c&gt;,</div><div class='add'>+              &lt;0x0480 0x0118&gt;;</div><div class='add'>+        reg-names = "mux", "gpio";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;periphs_pinctrl 0 0 62&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cec_ao_a_h_pins: cec_ao_a_h {</div><div class='add'>+        mux {</div><div class='add'>+          groups = "cec_ao_a_h";</div><div class='add'>+          function = "cec_ao_a_h";</div><div class='add'>+          bias-disable;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml<br/>new file mode 100644<br/>index 000000000000..a7b29ef0bab6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson pinmux controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    enum: [1, 2]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - ranges</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  meson-gpio:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      gpio-controller: true</div><div class='add'>+</div><div class='add'>+      "#gpio-cells":</div><div class='add'>+        const: 2</div><div class='add'>+</div><div class='add'>+      gpio-ranges:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - reg-names</div><div class='add'>+      - gpio-controller</div><div class='add'>+      - "#gpio-cells"</div><div class='add'>+      - gpio-ranges</div><div class='add'>+</div><div class='add'>+  meson-pins:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties:</div><div class='add'>+      type: object</div><div class='add'>+      allOf:</div><div class='add'>+        - $ref: pincfg-node.yaml#</div><div class='add'>+        - $ref: pinmux-node.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml<br/>new file mode 100644<br/>index 000000000000..7c9c94ec5b7b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-g12a-aobus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson G12 AOBUS pinmux controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: amlogic,meson-pinctrl-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson-g12a-aobus-pinctrl</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^bank@[0-9a-z]+$":</div><div class='add'>+    $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 3</div><div class='add'>+</div><div class='add'>+      reg-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: mux</div><div class='add'>+          - const: ds</div><div class='add'>+          - const: gpio</div><div class='add'>+</div><div class='add'>+unevaluatedProperties:</div><div class='add'>+  type: object</div><div class='add'>+  $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ao_pinctrl: pinctrl {</div><div class='add'>+      compatible = "amlogic,meson-g12a-aobus-pinctrl";</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;1&gt;;</div><div class='add'>+      ranges;</div><div class='add'>+</div><div class='add'>+      bank@14 {</div><div class='add'>+        reg = &lt;0x14 0x8&gt;,</div><div class='add'>+              &lt;0x1c 0x8&gt;,</div><div class='add'>+              &lt;0x24 0x14&gt;;</div><div class='add'>+        reg-names = "mux", "ds", "gpio";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;ao_pinctrl 0 0 15&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cec_ao_a_h_pins: cec_ao_a_h {</div><div class='add'>+        mux {</div><div class='add'>+          groups = "cec_ao_a_h";</div><div class='add'>+          function = "cec_ao_a_h";</div><div class='add'>+          bias-disable;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml<br/>new file mode 100644<br/>index 000000000000..4bcb8b60420f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/amlogic,meson-pinctrl-g12a-periphs.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson G12 PERIPHS pinmux controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: amlogic,meson-pinctrl-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson-g12a-periphs-pinctrl</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^bank@[0-9a-z]+$":</div><div class='add'>+    $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 5</div><div class='add'>+</div><div class='add'>+      reg-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: gpio</div><div class='add'>+          - const: pull</div><div class='add'>+          - const: pull-enable</div><div class='add'>+          - const: mux</div><div class='add'>+          - const: ds</div><div class='add'>+</div><div class='add'>+unevaluatedProperties:</div><div class='add'>+  type: object</div><div class='add'>+  $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    periphs_pinctrl: pinctrl {</div><div class='add'>+      compatible = "amlogic,meson-g12a-periphs-pinctrl";</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;1&gt;;</div><div class='add'>+      ranges;</div><div class='add'>+</div><div class='add'>+      bank@40 {</div><div class='add'>+        reg = &lt;0x40  0x4c&gt;,</div><div class='add'>+              &lt;0xe8  0x18&gt;,</div><div class='add'>+              &lt;0x120 0x18&gt;,</div><div class='add'>+              &lt;0x2c0 0x40&gt;,</div><div class='add'>+              &lt;0x340 0x1c&gt;;</div><div class='add'>+        reg-names = "gpio", "pull", "pull-enable", "mux", "ds";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;periphs_pinctrl 0 0 86&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cec_ao_a_h_pins: cec_ao_a_h {</div><div class='add'>+        mux {</div><div class='add'>+          groups = "cec_ao_a_h";</div><div class='add'>+          function = "cec_ao_a_h";</div><div class='add'>+          bias-disable;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml<br/>new file mode 100644<br/>index 000000000000..32d99c9b6afc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-aobus.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/amlogic,meson8-pinctrl-aobus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson8 AOBUS pinmux controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: amlogic,meson-pinctrl-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - amlogic,meson8-aobus-pinctrl</div><div class='add'>+          - amlogic,meson8b-aobus-pinctrl</div><div class='add'>+          - amlogic,meson-gxbb-aobus-pinctrl</div><div class='add'>+          - amlogic,meson-gxl-aobus-pinctrl</div><div class='add'>+          - amlogic,meson-axg-aobus-pinctrl</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson8m2-aobus-pinctrl</div><div class='add'>+          - const: amlogic,meson8-aobus-pinctrl</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^bank@[0-9a-z]+$":</div><div class='add'>+    $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 3</div><div class='add'>+</div><div class='add'>+      reg-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: mux</div><div class='add'>+          - const: pull</div><div class='add'>+          - const: gpio</div><div class='add'>+</div><div class='add'>+unevaluatedProperties:</div><div class='add'>+  type: object</div><div class='add'>+  $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl_aobus: pinctrl {</div><div class='add'>+      compatible = "amlogic,meson8-aobus-pinctrl";</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;1&gt;;</div><div class='add'>+      ranges;</div><div class='add'>+</div><div class='add'>+      bank@14 {</div><div class='add'>+        reg = &lt;0x14 0x4&gt;,</div><div class='add'>+              &lt;0x2c 0x4&gt;,</div><div class='add'>+              &lt;0x24 0x8&gt;;</div><div class='add'>+        reg-names = "mux", "pull", "gpio";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;pinctrl_aobus 0 0 16&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cec_ao_a_h_pins: cec_ao_a_h {</div><div class='add'>+        mux {</div><div class='add'>+          groups = "cec_ao_a_h";</div><div class='add'>+          function = "cec_ao_a_h";</div><div class='add'>+          bias-disable;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml b/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml<br/>new file mode 100644<br/>index 000000000000..d0441051f34a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/amlogic,meson8-pinctrl-cbus.yaml</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/amlogic,meson8-pinctrl-cbus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson8 CBUS pinmux controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: amlogic,meson-pinctrl-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - amlogic,meson8-cbus-pinctrl</div><div class='add'>+          - amlogic,meson8b-cbus-pinctrl</div><div class='add'>+          - amlogic,meson-gxbb-periphs-pinctrl</div><div class='add'>+          - amlogic,meson-gxl-periphs-pinctrl</div><div class='add'>+          - amlogic,meson-axg-periphs-pinctrl</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson8m2-cbus-pinctrl</div><div class='add'>+          - const: amlogic,meson8-cbus-pinctrl</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^bank@[0-9a-z]+$":</div><div class='add'>+    $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-gpio</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 4</div><div class='add'>+</div><div class='add'>+      reg-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: mux</div><div class='add'>+          - const: pull</div><div class='add'>+          - const: pull-enable</div><div class='add'>+          - const: gpio</div><div class='add'>+</div><div class='add'>+unevaluatedProperties:</div><div class='add'>+  type: object</div><div class='add'>+  $ref: amlogic,meson-pinctrl-common.yaml#/$defs/meson-pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl_cbus: pinctrl {</div><div class='add'>+      compatible = "amlogic,meson8-cbus-pinctrl";</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;1&gt;;</div><div class='add'>+      ranges;</div><div class='add'>+</div><div class='add'>+      bank@80b0 {</div><div class='add'>+        reg = &lt;0x80b0 0x28&gt;,</div><div class='add'>+              &lt;0x80e8 0x18&gt;,</div><div class='add'>+              &lt;0x8120 0x18&gt;,</div><div class='add'>+              &lt;0x8030 0x30&gt;;</div><div class='add'>+        reg-names = "mux", "pull", "pull-enable", "gpio";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;pinctrl_cbus 0 0 120&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      cec_ao_a_h_pins: cec_ao_a_h {</div><div class='add'>+        mux {</div><div class='add'>+          groups = "cec_ao_a_h";</div><div class='add'>+          function = "cec_ao_a_h";</div><div class='add'>+          bias-disable;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml<br/>index d3b11351ca45..9c07935919ea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,t8103-pinctrl</div><div class='add'>+          - apple,t8112-pinctrl</div><div class='ctx'>           - apple,t6000-pinctrl</div><div class='ctx'>       - const: apple,pinctrl</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +74,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml<br/>index c689bea7ce6e..bef85c25cdef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description: |+</div><div class='ctx'>   - compatible:     Should be one of the following:</div><div class='ctx'>                     "aspeed,ast2400-scu", "syscon", "simple-mfd"</div><div class='ctx'> </div><div class='del'>-  Refer to the the bindings described in</div><div class='add'>+  Refer to the bindings described in</div><div class='ctx'>   Documentation/devicetree/bindings/mfd/syscon.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -32,7 +32,7 @@ patternProperties:</div><div class='ctx'>     then:</div><div class='ctx'>       patternProperties:</div><div class='ctx'>         "^function|groups$":</div><div class='del'>-          $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>           enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,</div><div class='ctx'>                   ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,</div><div class='ctx'>                   EXTRST, FLACK, FLBUSY, FLWP, GPID, GPID0, GPID2, GPID4, GPID6, GPIE0,</div><div class='hunk'>@@ -51,7 +51,7 @@ patternProperties:</div><div class='ctx'>                   VGAHS, VGAVS, VPI18, VPI24, VPI30, VPO12, VPO24, WDTRST1, WDTRST2]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -63,6 +63,12 @@ examples:</div><div class='ctx'>     syscon: scu@1e6e2000 {</div><div class='ctx'>         compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";</div><div class='ctx'>         reg = &lt;0x1e6e2000 0x1a8&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x1e6e2000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'>         pinctrl: pinctrl {</div><div class='ctx'>             compatible = "aspeed,ast2400-pinctrl";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml<br/>index 7c25c8d51116..14c391f16899 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml</a></div><div class='hunk'>@@ -17,7 +17,7 @@ description: |+</div><div class='ctx'>   			"aspeed,ast2500-scu", "syscon", "simple-mfd"</div><div class='ctx'>   			"aspeed,g5-scu", "syscon", "simple-mfd"</div><div class='ctx'> </div><div class='del'>-  Refer to the the bindings described in</div><div class='add'>+  Refer to the bindings described in</div><div class='ctx'>   Documentation/devicetree/bindings/mfd/syscon.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -44,7 +44,7 @@ patternProperties:</div><div class='ctx'>     then:</div><div class='ctx'>       patternProperties:</div><div class='ctx'>         "^function|groups$":</div><div class='del'>-          $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>           enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,</div><div class='ctx'>                   ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,</div><div class='ctx'>                   ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2,</div><div class='hunk'>@@ -65,7 +65,7 @@ patternProperties:</div><div class='ctx'>                   VGAVS, VPI24, VPO, WDTRST1, WDTRST2]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -76,73 +76,28 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/aspeed-clock.h&gt;</div><div class='del'>-    apb {</div><div class='del'>-        compatible = "simple-bus";</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges;</div><div class='del'>-</div><div class='del'>-        syscon: scu@1e6e2000 {</div><div class='del'>-            compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";</div><div class='del'>-            reg = &lt;0x1e6e2000 0x1a8&gt;;</div><div class='del'>-            #clock-cells = &lt;1&gt;;</div><div class='del'>-            #reset-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-            pinctrl: pinctrl {</div><div class='del'>-                compatible = "aspeed,ast2500-pinctrl";</div><div class='del'>-                aspeed,external-nodes = &lt;&amp;gfx&gt;, &lt;&amp;lhc&gt;;</div><div class='del'>-</div><div class='del'>-                pinctrl_i2c3_default: i2c3_default {</div><div class='del'>-                    function = "I2C3";</div><div class='del'>-                    groups = "I2C3";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                pinctrl_gpioh0_unbiased_default: gpioh0 {</div><div class='del'>-                    pins = "A18";</div><div class='del'>-                    bias-disable;</div><div class='del'>-                };</div><div class='del'>-            };</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        gfx: display@1e6e6000 {</div><div class='del'>-            compatible = "aspeed,ast2500-gfx", "syscon";</div><div class='del'>-            reg = &lt;0x1e6e6000 0x1000&gt;;</div><div class='del'>-            reg-io-width = &lt;4&gt;;</div><div class='del'>-            clocks = &lt;&amp;syscon ASPEED_CLK_GATE_D1CLK&gt;;</div><div class='del'>-            resets = &lt;&amp;syscon ASPEED_RESET_CRT1&gt;;</div><div class='del'>-            interrupts = &lt;0x19&gt;;</div><div class='del'>-            syscon = &lt;&amp;syscon&gt;;</div><div class='del'>-            memory-region = &lt;&amp;gfx_memory&gt;;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-    lpc: lpc@1e789000 {</div><div class='del'>-        compatible = "aspeed,ast2500-lpc", "simple-mfd";</div><div class='del'>-        reg = &lt;0x1e789000 0x1000&gt;;</div><div class='add'>+    scu@1e6e2000 {</div><div class='add'>+        compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";</div><div class='add'>+        reg = &lt;0x1e6e2000 0x1a8&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0x0 0x1e789000 0x1000&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x1e6e2000 0x1000&gt;;</div><div class='ctx'> </div><div class='del'>-        lpc_host: lpc-host@80 {</div><div class='del'>-            compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";</div><div class='del'>-            reg = &lt;0x80 0x1e0&gt;;</div><div class='del'>-            reg-io-width = &lt;4&gt;;</div><div class='add'>+        pinctrl: pinctrl {</div><div class='add'>+            compatible = "aspeed,ast2500-pinctrl";</div><div class='add'>+            aspeed,external-nodes = &lt;&amp;gfx&gt;, &lt;&amp;lhc&gt;;</div><div class='ctx'> </div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;1&gt;;</div><div class='del'>-            ranges = &lt;0x0 0x80 0x1e0&gt;;</div><div class='add'>+            pinctrl_i2c3_default: i2c3_default {</div><div class='add'>+                function = "I2C3";</div><div class='add'>+                groups = "I2C3";</div><div class='add'>+            };</div><div class='ctx'> </div><div class='del'>-            lhc: lhc@20 {</div><div class='del'>-                   compatible = "aspeed,ast2500-lhc";</div><div class='del'>-                   reg = &lt;0x20 0x24&gt;, &lt;0x48 0x8&gt;;</div><div class='add'>+            pinctrl_gpioh0_unbiased_default: gpioh0 {</div><div class='add'>+                pins = "A18";</div><div class='add'>+                bias-disable;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='del'>-    gfx_memory: framebuffer {</div><div class='del'>-        size = &lt;0x01000000&gt;;</div><div class='del'>-        alignment = &lt;0x01000000&gt;;</div><div class='del'>-        compatible = "shared-dma-pool";</div><div class='del'>-        reusable;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml<br/>index 57b68d6c7c70..859a1889dc1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description: |+</div><div class='ctx'>   - compatible: Should be one of the following:</div><div class='ctx'>                 "aspeed,ast2600-scu", "syscon", "simple-mfd"</div><div class='ctx'> </div><div class='del'>-  Refer to the the bindings described in</div><div class='add'>+  Refer to the bindings described in</div><div class='ctx'>   Documentation/devicetree/bindings/mfd/syscon.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -30,10 +30,10 @@ patternProperties:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         function:</div><div class='del'>-          $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>           enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, ADC2,</div><div class='ctx'>                   ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMC, ESPI, ESPIALT,</div><div class='del'>-                  FSI1, FSI2, FWSPIABR, FWSPID, FWSPIWP, GPIT0, GPIT1, GPIT2, GPIT3,</div><div class='add'>+                  FSI1, FSI2, FWQSPI, FWSPIABR, FWSPID, FWSPIWP, GPIT0, GPIT1, GPIT2, GPIT3,</div><div class='ctx'>                   GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1, GPIU2, GPIU3, GPIU4, GPIU5,</div><div class='ctx'>                   GPIU6, GPIU7, I2C1, I2C10, I2C11, I2C12, I2C13, I2C14, I2C15, I2C16,</div><div class='ctx'>                   I2C2, I2C3, I2C4, I2C5, I2C6, I2C7, I2C8, I2C9, I3C3, I3C4, I3C5,</div><div class='hunk'>@@ -55,10 +55,10 @@ patternProperties:</div><div class='ctx'>                   USB2BD, USB2BH, VB, VGAHS, VGAVS, WDTRST1, WDTRST2, WDTRST3, WDTRST4 ]</div><div class='ctx'> </div><div class='ctx'>         groups:</div><div class='del'>-          $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>           enum: [ ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, ADC2,</div><div class='ctx'>                   ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, EMMCG1, EMMCG4,</div><div class='del'>-                  EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWSPIABR, FWSPID, FWQSPID, FWSPIWP,</div><div class='add'>+                  EMMCG8, ESPI, ESPIALT, FSI1, FSI2, FWQSPI, FWSPIABR, FWSPID, FWSPIWP,</div><div class='ctx'>                   GPIT0, GPIT1, GPIT2, GPIT3, GPIT4, GPIT5, GPIT6, GPIT7, GPIU0, GPIU1,</div><div class='ctx'>                   GPIU2, GPIU3, GPIU4, GPIU5, GPIU6, GPIU7, HVI3C3, HVI3C4, I2C1, I2C10,</div><div class='ctx'>                   I2C11, I2C12, I2C13, I2C14, I2C15, I2C16, I2C2, I2C3, I2C4, I2C5,</div><div class='hunk'>@@ -84,7 +84,7 @@ patternProperties:</div><div class='ctx'>                   WDTRST3, WDTRST4]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -96,6 +96,12 @@ examples:</div><div class='ctx'>     syscon: scu@1e6e2000 {</div><div class='ctx'>         compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";</div><div class='ctx'>         reg = &lt;0x1e6e2000 0xf6c&gt;;</div><div class='add'>+        #clock-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x1e6e2000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'>         pinctrl: pinctrl {</div><div class='ctx'>             compatible = "aspeed,ast2600-pinctrl";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml<br/>index 175a992f15e1..8a9fb9b433ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,bcm4908-pinctrl.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ patternProperties:</div><div class='ctx'>   '-pins$':</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: pinmux-node.yaml#</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       function:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml<br/>index ab019a1998e8..4478a76171f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.yaml</a></div><div class='hunk'>@@ -38,7 +38,7 @@ patternProperties:</div><div class='ctx'>                 gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio40 ]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml<br/>index 8c9d4668c8c4..73e1caa7c011 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.yaml</a></div><div class='hunk'>@@ -42,7 +42,7 @@ patternProperties:</div><div class='ctx'>                 vdsl_phy_override_3_grp, dsl_gpio8, dsl_gpio9 ]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml<br/>index a8e22ec02215..2750ba42aeb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.yaml</a></div><div class='hunk'>@@ -37,7 +37,7 @@ patternProperties:</div><div class='ctx'>                 usb_port1 ]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml<br/>index 35867355a47a..2f6c540498bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.yaml</a></div><div class='hunk'>@@ -35,7 +35,7 @@ patternProperties:</div><div class='ctx'>                 led_grp, spi_cs_grp, utopia_grp, pwm_syn_clk, sys_irq_grp ]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml<br/>index b584d4b27223..b3044f805753 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.yaml</a></div><div class='hunk'>@@ -42,7 +42,7 @@ patternProperties:</div><div class='ctx'>                 gpio22, gpio23, gpio24, gpio25, gpio26, gpio27, nand_grp ]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml<br/>index 229323d9237d..3236871827df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml</a></div><div class='hunk'>@@ -43,7 +43,7 @@ patternProperties:</div><div class='ctx'>                 gpio31, uart1_grp ]</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml<br/>index 8d1e5b1cdd5f..0a39dd26ee1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/brcm,ns-pinmux.yaml</a></div><div class='hunk'>@@ -53,7 +53,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml b/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml<br/>index 53e963e090f2..7f4f36a58e56 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/canaan,k210-fpioa.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/canaan,k210-fpioa.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Canaan Kendryte K210 FPIOA Device Tree Bindings</div><div class='add'>+title: Canaan Kendryte K210 FPIOA</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</div><div class='hunk'>@@ -120,6 +120,7 @@ patternProperties:</div><div class='ctx'>       input-schmitt-disable: true</div><div class='ctx'> </div><div class='ctx'>       input-polarity-invert:</div><div class='add'>+        type: boolean</div><div class='ctx'>         description:</div><div class='ctx'>           Enable or disable pin input polarity inversion.</div><div class='ctx'> </div><div class='hunk'>@@ -132,6 +133,7 @@ patternProperties:</div><div class='ctx'>       output-low: true</div><div class='ctx'> </div><div class='ctx'>       output-polarity-invert:</div><div class='add'>+        type: boolean</div><div class='ctx'>         description:</div><div class='ctx'>           Enable or disable pin output polarity inversion.</div><div class='ctx'> </div><div class='hunk'>@@ -142,7 +144,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml<br/>index 5cd512b7d5ba..5e000b3fadde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml</a></div><div class='hunk'>@@ -173,7 +173,7 @@ properties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml<br/>index 8a90d8273767..bb61a30321a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml</a></div><div class='hunk'>@@ -40,21 +40,20 @@ properties:</div><div class='ctx'>       '-pins$':</div><div class='ctx'>         type: object</div><div class='ctx'>         allOf:</div><div class='del'>-          - $ref: "pincfg-node.yaml#"</div><div class='del'>-          - $ref: "pinmux-node.yaml#"</div><div class='add'>+          - $ref: pincfg-node.yaml#</div><div class='add'>+          - $ref: pinmux-node.yaml#</div><div class='ctx'>         properties:</div><div class='ctx'>           groups:</div><div class='ctx'>             description:</div><div class='ctx'>               Name of one pin group to configure.</div><div class='ctx'>             enum: [ aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1,</div><div class='ctx'>                     pdmspk2, dmic4, dmic5, dmic6, gpio1, gpio2, gpio3,</div><div class='del'>-                    gpio4, gpio5, gpio6, gpio7, gpio7, gpio8, gpio9,</div><div class='add'>+                    gpio4, gpio5, gpio6, gpio7, gpio8, gpio9,</div><div class='ctx'>                     gpio10, gpio11, gpio12, gpio13, gpio14, gpio15,</div><div class='del'>-                    gpio16, gpio17, gpio17, gpio18, gpio19, gpio20,</div><div class='del'>-                    gpio21, gpio22, gpio23, gpio24, gpio25, gpio26,</div><div class='del'>-                    gpio27, gpio27, gpio28, gpio29, gpio30, gpio31,</div><div class='del'>-                    gpio32, gpio33, gpio34, gpio35, gpio36, gpio37,</div><div class='del'>-                    gpio37, gpio38, gpio39 ]</div><div class='add'>+                    gpio16, gpio17, gpio18, gpio19, gpio20, gpio21,</div><div class='add'>+                    gpio22, gpio23, gpio24, gpio25, gpio26, gpio27,</div><div class='add'>+                    gpio28, gpio29, gpio30, gpio31, gpio32, gpio33,</div><div class='add'>+                    gpio34, gpio35, gpio36, gpio37, gpio38, gpio39 ]</div><div class='ctx'> </div><div class='ctx'>           function:</div><div class='ctx'>             description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml b/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml<br/>new file mode 100644<br/>index 000000000000..222d57541b65<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/cypress,cy8c95x0.yaml</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/cypress,cy8c95x0.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cypress CY8C95X0 I2C GPIO expander</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This supports the 20/40/60 pin Cypress CYC95x0 GPIO I2C expanders.</div><div class='add'>+  Pin function configuration is performed on a per-pin basis.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - cypress,cy8c9520</div><div class='add'>+      - cypress,cy8c9540</div><div class='add'>+      - cypress,cy8c9560</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    description:</div><div class='add'>+      The first cell is the GPIO number and the second cell specifies GPIO</div><div class='add'>+      flags, as defined in &lt;dt-bindings/gpio/gpio.h&gt;.</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      Optional power supply.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: pincfg-node.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: '^gp([0-7][0-7])$'</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 60</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+        enum: [ gpio, pwm ]</div><div class='add'>+</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+</div><div class='add'>+      bias-disable: true</div><div class='add'>+</div><div class='add'>+      output-high: true</div><div class='add'>+</div><div class='add'>+      output-low: true</div><div class='add'>+</div><div class='add'>+      drive-push-pull: true</div><div class='add'>+</div><div class='add'>+      drive-open-drain: true</div><div class='add'>+</div><div class='add'>+      drive-open-source: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+      - function</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pinctrl@20 {</div><div class='add'>+        compatible = "cypress,cy8c9520";</div><div class='add'>+        reg = &lt;0x20&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        vdd-supply = &lt;&amp;p3v3&gt;;</div><div class='add'>+        gpio-reserved-ranges = &lt;5 1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt<br/>deleted file mode 100644<br/>index bfab5ca49fd1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,87 +0,0 @@</div><div class='del'>-* Freescale i.MX7 Dual IOMUX Controller</div><div class='del'>-</div><div class='del'>-iMX7D supports two iomuxc controllers, fsl,imx7d-iomuxc controller is similar</div><div class='del'>-as previous iMX SoC generation and fsl,imx7d-iomuxc-lpsr which provides low</div><div class='del'>-power state retention capabilities on gpios that are part of iomuxc-lpsr</div><div class='del'>-(GPIO1_IO7..GPIO1_IO0). While iomuxc-lpsr provides its own set of registers for</div><div class='del'>-mux and pad control settings, it shares the input select register from main</div><div class='del'>-iomuxc controller for daisy chain settings, the fsl,input-sel property extends</div><div class='del'>-fsl,imx-pinctrl driver to support iomuxc-lpsr controller.</div><div class='del'>-</div><div class='del'>-iomuxc_lpsr: iomuxc-lpsr@302c0000 {</div><div class='del'>-	compatible = "fsl,imx7d-iomuxc-lpsr";</div><div class='del'>-	reg = &lt;0x302c0000 0x10000&gt;;</div><div class='del'>-	fsl,input-sel = &lt;&amp;iomuxc&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-iomuxc: iomuxc@30330000 {</div><div class='del'>-	compatible = "fsl,imx7d-iomuxc";</div><div class='del'>-	reg = &lt;0x30330000 0x10000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Peripherals using pads from iomuxc-lpsr support low state retention power</div><div class='del'>-state, under LPSR mode GPIO's state of pads are retain.</div><div class='del'>-</div><div class='del'>-Please refer to fsl,imx-pinctrl.txt in this directory for common binding part</div><div class='del'>-and usage.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "fsl,imx7d-iomuxc" for main IOMUXC controller, or</div><div class='del'>-  "fsl,imx7d-iomuxc-lpsr" for Low Power State Retention IOMUXC controller.</div><div class='del'>-- fsl,pins: each entry consists of 6 integers and represents the mux and config</div><div class='del'>-  setting for one pin.  The first 5 integers &lt;mux_reg conf_reg input_reg mux_val</div><div class='del'>-  input_val&gt; are specified using a PIN_FUNC_ID macro, which can be found in</div><div class='del'>-  imx7d-pinfunc.h under device tree source folder.  The last integer CONFIG is</div><div class='del'>-  the pad setting value like pull-up on this pin.  Please refer to i.MX7 Dual</div><div class='del'>-  Reference Manual for detailed CONFIG settings.</div><div class='del'>-- fsl,input-sel: required property for iomuxc-lpsr controller, this property is</div><div class='del'>-  a phandle for main iomuxc controller which shares the input select register for</div><div class='del'>-  daisy chain settings.</div><div class='del'>-</div><div class='del'>-CONFIG bits definition:</div><div class='del'>-PAD_CTL_PUS_100K_DOWN           (0 &lt;&lt; 5)</div><div class='del'>-PAD_CTL_PUS_5K_UP               (1 &lt;&lt; 5)</div><div class='del'>-PAD_CTL_PUS_47K_UP              (2 &lt;&lt; 5)</div><div class='del'>-PAD_CTL_PUS_100K_UP             (3 &lt;&lt; 5)</div><div class='del'>-PAD_CTL_PUE                     (1 &lt;&lt; 4)</div><div class='del'>-PAD_CTL_HYS                     (1 &lt;&lt; 3)</div><div class='del'>-PAD_CTL_SRE_SLOW                (1 &lt;&lt; 2)</div><div class='del'>-PAD_CTL_SRE_FAST                (0 &lt;&lt; 2)</div><div class='del'>-PAD_CTL_DSE_X1                  (0 &lt;&lt; 0)</div><div class='del'>-PAD_CTL_DSE_X4                  (1 &lt;&lt; 0)</div><div class='del'>-PAD_CTL_DSE_X2                  (2 &lt;&lt; 0)</div><div class='del'>-PAD_CTL_DSE_X6                  (3 &lt;&lt; 0)</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-While iomuxc-lpsr is intended to be used by dedicated peripherals to take</div><div class='del'>-advantages of LPSR power mode, is also possible that an IP to use pads from</div><div class='del'>-any of the iomux controllers. For example the I2C1 IP can use SCL pad from</div><div class='del'>-iomuxc-lpsr controller and SDA pad from iomuxc controller as:</div><div class='del'>-</div><div class='del'>-i2c1: i2c@30a20000 {</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pinctrl_i2c1_1&gt;, &lt;&amp;pinctrl_i2c1_2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-iomuxc-lpsr@302c0000 {</div><div class='del'>-	compatible = "fsl,imx7d-iomuxc-lpsr";</div><div class='del'>-	reg = &lt;0x302c0000 0x10000&gt;;</div><div class='del'>-	fsl,input-sel = &lt;&amp;iomuxc&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl_i2c1_1: i2c1grp-1 {</div><div class='del'>-		fsl,pins = &lt;</div><div class='del'>-			MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x4000007f</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-iomuxc@30330000 {</div><div class='del'>-	compatible = "fsl,imx7d-iomuxc";</div><div class='del'>-	reg = &lt;0x30330000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl_i2c1_2: i2c1grp-2 {</div><div class='del'>-		fsl,pins = &lt;</div><div class='del'>-			MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f</div><div class='del'>-		&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml<br/>index d4a8ea5551a5..7bd723ab1281 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml</a></div><div class='hunk'>@@ -1,13 +1,13 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mq-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/fsl,imx7d-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale IMX8MQ IOMUX Controller</div><div class='add'>+title: Freescale IMX7D IOMUX Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory</div><div class='hunk'>@@ -15,11 +15,20 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: fsl,imx8mq-iomuxc</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx7d-iomuxc</div><div class='add'>+          - fsl,imx7d-iomuxc-lpsr</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  fsl,input-sel:</div><div class='add'>+    description:</div><div class='add'>+      phandle for main iomuxc controller which shares the input select</div><div class='add'>+      register for daisy chain settings.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='ctx'> # Client device subnode's properties</div><div class='ctx'> patternProperties:</div><div class='ctx'>   'grp$':</div><div class='hunk'>@@ -34,9 +43,9 @@ patternProperties:</div><div class='ctx'>           each entry consists of 6 integers and represents the mux and config</div><div class='ctx'>           setting for one pin. The first 5 integers &lt;mux_reg conf_reg input_reg</div><div class='ctx'>           mux_val input_val&gt; are specified using a PIN_FUNC_ID macro, which can</div><div class='del'>-          be found in &lt;arch/arm64/boot/dts/freescale/imx8mq-pinfunc.h&gt;. The last</div><div class='del'>-          integer CONFIG is the pad setting value like pull-up on this pin. Please</div><div class='del'>-          refer to i.MX8M Quad Reference Manual for detailed CONFIG settings.</div><div class='add'>+          be found in &lt;arch/arm/boot/dts/imx7d-pinfunc.h&gt;. The last integer</div><div class='add'>+          CONFIG is the pad setting value like pull-up on this pin. Please</div><div class='add'>+          refer to i.MX7D Reference Manual for detailed CONFIG settings.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'>         items:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -59,26 +68,46 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - fsl,imx7d-iomuxc-lpsr</div><div class='add'>+</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - fsl,input-sel</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='del'>-  # Pinmux controller node</div><div class='ctx'>   - |</div><div class='ctx'>     iomuxc: pinctrl@30330000 {</div><div class='del'>-        compatible = "fsl,imx8mq-iomuxc";</div><div class='del'>-        reg = &lt;0x30330000 0x10000&gt;;</div><div class='add'>+      compatible = "fsl,imx7d-iomuxc";</div><div class='add'>+      reg = &lt;0x30330000 0x10000&gt;;</div><div class='ctx'> </div><div class='del'>-        pinctrl_uart1: uart1grp {</div><div class='del'>-            fsl,pins =</div><div class='del'>-                &lt;0x234 0x49C 0x4F4 0x0 0x0	0x49&gt;,</div><div class='del'>-                &lt;0x238 0x4A0 0x4F4 0x0 0x0	0x49&gt;;</div><div class='del'>-        };</div><div class='add'>+      pinctrl_uart5: uart5grp {</div><div class='add'>+        fsl,pins =</div><div class='add'>+          &lt;0x0160 0x03D0 0x0714 0x1 0x0	0x7e&gt;,</div><div class='add'>+          &lt;0x0164 0x03D4 0x0000 0x1 0x0	0x76&gt;;</div><div class='add'>+      };</div><div class='ctx'>     };</div><div class='add'>+  - |</div><div class='add'>+    iomuxc_lpsr: pinctrl@302c0000 {</div><div class='add'>+      compatible = "fsl,imx7d-iomuxc-lpsr";</div><div class='add'>+      reg = &lt;0x302c0000 0x10000&gt;;</div><div class='add'>+      fsl,input-sel = &lt;&amp;iomuxc&gt;;</div><div class='ctx'> </div><div class='del'>-...</div><div class='add'>+      pinctrl_gpio_lpsr: gpio1-grp {</div><div class='add'>+          fsl,pins =</div><div class='add'>+            &lt;0x0008 0x0038 0x0000 0x0 0x0	0x59&gt;,</div><div class='add'>+            &lt;0x000C 0x003C 0x0000 0x0 0x0	0x59&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8m-pinctrl.yaml<br/>index 6717f163390b..6068be11dfe2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8m-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/fsl,imx8m-pinctrl.yaml</a></div><div class='hunk'>@@ -1,13 +1,13 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/fsl,imx8m-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale IMX8MM IOMUX Controller</div><div class='add'>+title: Freescale IMX8M IOMUX Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory</div><div class='hunk'>@@ -15,7 +15,11 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: fsl,imx8mm-iomuxc</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8mm-iomuxc</div><div class='add'>+      - fsl,imx8mn-iomuxc</div><div class='add'>+      - fsl,imx8mp-iomuxc</div><div class='add'>+      - fsl,imx8mq-iomuxc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -34,9 +38,10 @@ patternProperties:</div><div class='ctx'>           each entry consists of 6 integers and represents the mux and config</div><div class='ctx'>           setting for one pin. The first 5 integers &lt;mux_reg conf_reg input_reg</div><div class='ctx'>           mux_val input_val&gt; are specified using a PIN_FUNC_ID macro, which can</div><div class='del'>-          be found in &lt;arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h&gt;. The last</div><div class='del'>-          integer CONFIG is the pad setting value like pull-up on this pin. Please</div><div class='del'>-          refer to i.MX8M Mini Reference Manual for detailed CONFIG settings.</div><div class='add'>+          be found in &lt;arch/arm64/boot/dts/freescale/imx8m[m,n,p,q]-pinfunc.h&gt;.</div><div class='add'>+          The last integer CONFIG is the pad setting value like pull-up on this</div><div class='add'>+          pin. Please refer to i.MX8M Mini/Nano/Plus/Quad Reference Manual for</div><div class='add'>+          detailed CONFIG settings.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'>         items:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -51,7 +56,8 @@ patternProperties:</div><div class='ctx'>             - description: |</div><div class='ctx'>                 "input_val" indicates the select input value to be applied.</div><div class='ctx'>             - description: |</div><div class='del'>-                "pad_setting" indicates the pad configuration value to be applied.</div><div class='add'>+                "pad_setting" indicates the pad configuration value to be</div><div class='add'>+                applied.</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - fsl,pins</div><div class='hunk'>@@ -59,7 +65,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml<br/>deleted file mode 100644<br/>index 4eed3a4e153a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8mp-pinctrl.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,84 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mp-pinctrl.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Freescale IMX8MP IOMUX Controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory</div><div class='del'>-  for common binding part and usage.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: fsl,imx8mp-iomuxc</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-# Client device subnode's properties</div><div class='del'>-patternProperties:</div><div class='del'>-  'grp$':</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='del'>-      Client device subnodes use below standard properties.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      fsl,pins:</div><div class='del'>-        description:</div><div class='del'>-          each entry consists of 6 integers and represents the mux and config</div><div class='del'>-          setting for one pin. The first 5 integers &lt;mux_reg conf_reg input_reg</div><div class='del'>-          mux_val input_val&gt; are specified using a PIN_FUNC_ID macro, which can</div><div class='del'>-          be found in &lt;arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h&gt;. The last</div><div class='del'>-          integer CONFIG is the pad setting value like pull-up on this pin. Please</div><div class='del'>-          refer to i.MX8M Plus Reference Manual for detailed CONFIG settings.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='del'>-        items:</div><div class='del'>-          items:</div><div class='del'>-            - description: |</div><div class='del'>-                "mux_reg" indicates the offset of mux register.</div><div class='del'>-            - description: |</div><div class='del'>-                "conf_reg" indicates the offset of pad configuration register.</div><div class='del'>-            - description: |</div><div class='del'>-                "input_reg" indicates the offset of select input register.</div><div class='del'>-            - description: |</div><div class='del'>-                "mux_val" indicates the mux value to be applied.</div><div class='del'>-            - description: |</div><div class='del'>-                "input_val" indicates the select input value to be applied.</div><div class='del'>-            - description: |</div><div class='del'>-                "pad_setting" indicates the pad configuration value to be applied.</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - fsl,pins</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  # Pinmux controller node</div><div class='del'>-  - |</div><div class='del'>-    iomuxc: pinctrl@30330000 {</div><div class='del'>-        compatible = "fsl,imx8mp-iomuxc";</div><div class='del'>-        reg = &lt;0x30330000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-        pinctrl_uart2: uart2grp {</div><div class='del'>-            fsl,pins =</div><div class='del'>-                &lt;0x228 0x488 0x5F0 0x0 0x6	0x49&gt;,</div><div class='del'>-                &lt;0x228 0x488 0x000 0x0 0x0	0x49&gt;;</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml<br/>index 693398d88223..7dcf681271d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/fsl,imx8ulp-pinctrl.yaml</a></div><div class='hunk'>@@ -57,7 +57,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml<br/>index 66baa6082a4f..2f2405102996 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/fsl,imx93-pinctrl.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ description:</div><div class='ctx'>   for common binding part and usage.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml<br/>index 1278f7293560..db5fe66ad873 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/fsl,imxrt1050.yaml</a></div><div class='hunk'>@@ -35,7 +35,7 @@ patternProperties:</div><div class='ctx'>           each entry consists of 6 integers and represents the mux and config</div><div class='ctx'>           setting for one pin. The first 5 integers &lt;mux_reg conf_reg input_reg</div><div class='ctx'>           mux_val input_val&gt; are specified using a PIN_FUNC_ID macro, which can</div><div class='del'>-          be found in &lt;include/dt-bindings/pinctrl/pins-imxrt1050.h&gt;. The last</div><div class='add'>+          be found in &lt;arch/arm/boot/dts/imxrt1050-pinfunc.h&gt;. The last</div><div class='ctx'>           integer CONFIG is the pad setting value like pull-up on this pin. Please</div><div class='ctx'>           refer to i.MXRT1050 Reference Manual for detailed CONFIG settings.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml<br/>index b1cdbb56d4e4..2e880b3e537c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/fsl,imx8mn-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml</a></div><div class='hunk'>@@ -1,13 +1,14 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mn-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1170.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Freescale IMX8MN IOMUX Controller</div><div class='add'>+title: Freescale i.MXRT1170 IOMUX Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='add'>+  - Giulio Benetti &lt;giulio.benetti@benettiengineering.com&gt;</div><div class='add'>+  - Jesse Taube &lt;Mr.Bossman075@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory</div><div class='hunk'>@@ -15,7 +16,7 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: fsl,imx8mn-iomuxc</div><div class='add'>+    const: fsl,imxrt1170-iomuxc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -34,9 +35,9 @@ patternProperties:</div><div class='ctx'>           each entry consists of 6 integers and represents the mux and config</div><div class='ctx'>           setting for one pin. The first 5 integers &lt;mux_reg conf_reg input_reg</div><div class='ctx'>           mux_val input_val&gt; are specified using a PIN_FUNC_ID macro, which can</div><div class='del'>-          be found in &lt;arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h&gt;. The last</div><div class='add'>+          be found in &lt;arch/arm/boot/dts/imxrt1170-pinfunc.h&gt;. The last</div><div class='ctx'>           integer CONFIG is the pad setting value like pull-up on this pin. Please</div><div class='del'>-          refer to i.MX8M Nano Reference Manual for detailed CONFIG settings.</div><div class='add'>+          refer to i.MXRT1170 Reference Manual for detailed CONFIG settings.</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'>         items:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -52,15 +53,11 @@ patternProperties:</div><div class='ctx'>                 "input_val" indicates the select input value to be applied.</div><div class='ctx'>             - description: |</div><div class='ctx'>                 "pad_setting" indicates the pad configuration value to be applied.</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - fsl,pins</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -68,17 +65,13 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='del'>-  # Pinmux controller node</div><div class='ctx'>   - |</div><div class='del'>-    iomuxc: pinctrl@30330000 {</div><div class='del'>-        compatible = "fsl,imx8mn-iomuxc";</div><div class='del'>-        reg = &lt;0x30330000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-        pinctrl_uart2: uart2grp {</div><div class='add'>+    iomuxc: iomuxc@400e8000 {</div><div class='add'>+        compatible = "fsl,imxrt1170-iomuxc";</div><div class='add'>+        reg = &lt;0x400e8000 0x4000&gt;;</div><div class='add'>+        pinctrl_lpuart1: lpuart1grp {</div><div class='ctx'>             fsl,pins =</div><div class='del'>-                &lt;0x23C 0x4A4 0x4FC 0x0 0x0	0x140&gt;,</div><div class='del'>-                &lt;0x240 0x4A8 0x000 0x0 0x0	0x140&gt;;</div><div class='add'>+              &lt;0x16C 0x3B0 0x620 0x0 0x0  0xf1&gt;,</div><div class='add'>+              &lt;0x170 0x3B4 0x61C 0x0 0x0	0xf1&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..fcd729afeee1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/fsl,scu-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - Pinctrl Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+  This binding uses the i.MX common pinctrl binding.</div><div class='add'>+  (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt)</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8qm-iomuxc</div><div class='add'>+      - fsl,imx8qxp-iomuxc</div><div class='add'>+      - fsl,imx8dxl-iomuxc</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  'grp$':</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      fsl,pins:</div><div class='add'>+        description:</div><div class='add'>+          each entry consists of 3 integers and represents the pin ID, the mux value</div><div class='add'>+          and pad setting for the pin. The first 2 integers - pin_id and mux_val - are</div><div class='add'>+          specified using a PIN_FUNC_ID macro, which can be found in</div><div class='add'>+          &lt;include/dt-bindings/pinctrl/pads-imx8qxp.h&gt;. The last integer is</div><div class='add'>+          the pad setting value like pull-up on this pin. Please refer to the</div><div class='add'>+          appropriate i.MX8 Reference Manual for detailed pad CONFIG settings.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+        items:</div><div class='add'>+          items:</div><div class='add'>+            - description: |</div><div class='add'>+                "pin_id" indicates the pin ID</div><div class='add'>+            - description: |</div><div class='add'>+                "mux_val" indicates the mux value to be applied.</div><div class='add'>+            - description: |</div><div class='add'>+                "pad_setting" indicates the pad configuration value to be applied.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - fsl,pins</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+        compatible = "fsl,imx8qxp-iomuxc";</div><div class='add'>+</div><div class='add'>+        pinctrl_lpuart0: lpuart0grp {</div><div class='add'>+            fsl,pins = &lt;</div><div class='add'>+                111 0 0x06000020</div><div class='add'>+                112 0 0x06000020</div><div class='add'>+            &gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml<br/>index c2c370448b81..35723966b70a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs pin controller devicetree bindings</div><div class='add'>+title: Ingenic SoCs pin controller</div><div class='ctx'> </div><div class='ctx'> description: &gt;</div><div class='ctx'>   Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='hunk'>@@ -119,7 +119,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml b/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml<br/>index b42548350188..1144ca2896e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/intel,lgm-io.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/intel,lgm-io.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Lightning Mountain SoC pinmux &amp; GPIO controller binding</div><div class='add'>+title: Intel Lightning Mountain SoC pinmux &amp; GPIO controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rahul Tanwar &lt;rahul.tanwar@linux.intel.com&gt;</div><div class='hunk'>@@ -48,7 +48,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml<br/>index 5e99d79499b4..005d95a9e4d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Keem Bay pin controller Device Tree Bindings</div><div class='add'>+title: Intel Keem Bay pin controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lakshmi Sowjanya D &lt;lakshmi.sowjanya.d@intel.com&gt;</div><div class='hunk'>@@ -44,6 +44,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^gpio@[0-9a-f]*$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     description:</div><div class='ctx'>       Child nodes can be specified to contain pin configuration information,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml b/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml<br/>deleted file mode 100644<br/>index 0ec476248f21..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/intel,pinctrl-thunderbay.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,119 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-thunderbay.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Intel Thunder Bay pin controller Device Tree Bindings</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Lakshmi Sowjanya D &lt;lakshmi.sowjanya.d@intel.com&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  Intel Thunder Bay SoC integrates a pin controller which enables control</div><div class='del'>-  of pin directions, input/output values and configuration</div><div class='del'>-  for a total of 67 pins.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: intel,thunderbay-pinctrl</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  gpio-controller: true</div><div class='del'>-</div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    description:</div><div class='del'>-      Specifies the interrupt lines to be used by the controller.</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  '^gpio@[0-9a-f]*$':</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    description:</div><div class='del'>-      Child nodes can be specified to contain pin configuration information,</div><div class='del'>-      which can then be utilized by pinctrl client devices.</div><div class='del'>-      The following properties are supported.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      pins:</div><div class='del'>-        description: |</div><div class='del'>-          The name(s) of the pins to be configured in the child node.</div><div class='del'>-          Supported pin names are "GPIO0" up to "GPIO66".</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      drive-strength:</div><div class='del'>-        description: Drive strength for the pad.</div><div class='del'>-        enum: [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]</div><div class='del'>-</div><div class='del'>-      bias-bus-hold:</div><div class='del'>-        type: boolean</div><div class='del'>-</div><div class='del'>-      input-schmitt-enable:</div><div class='del'>-        type: boolean</div><div class='del'>-</div><div class='del'>-      slew-rate:</div><div class='del'>-        description: GPIO slew rate control.</div><div class='del'>-                      0 - Slow</div><div class='del'>-                      1 - Fast</div><div class='del'>-        enum: [0, 1]</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    // Example 1</div><div class='del'>-    pinctrl0: gpio@0 {</div><div class='del'>-        compatible = "intel,thunderbay-pinctrl";</div><div class='del'>-        reg = &lt;0x600b0000 0x88&gt;;</div><div class='del'>-        gpio-controller;</div><div class='del'>-        #gpio-cells = &lt;0x2&gt;;</div><div class='del'>-        gpio-ranges = &lt;&amp;pinctrl0 0 0 67&gt;;</div><div class='del'>-        interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                     &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        interrupt-controller;</div><div class='del'>-        #interrupt-cells = &lt;2&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-    // Example 2</div><div class='del'>-    pinctrl1: gpio@1 {</div><div class='del'>-        compatible = "intel,thunderbay-pinctrl";</div><div class='del'>-        reg = &lt;0x600c0000 0x88&gt;;</div><div class='del'>-        gpio-controller;</div><div class='del'>-        #gpio-cells = &lt;0x2&gt;;</div><div class='del'>-        gpio-ranges = &lt;&amp;pinctrl1 0 0 53&gt;;</div><div class='del'>-        interrupts = &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                     &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        interrupt-controller;</div><div class='del'>-        #interrupt-cells = &lt;2&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt b/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt<br/>index 4658f105fa09..6bd9bc61becb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/lantiq,pinctrl-xway.txt</a></div><div class='hunk'>@@ -1,11 +1,7 @@</div><div class='ctx'> Lantiq XWAY pinmux controller</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>-- compatible: "lantiq,pinctrl-xway", (DEPRECATED: Use "lantiq,pinctrl-danube")</div><div class='del'>-	      "lantiq,pinctrl-xr9", (DEPRECATED: Use "lantiq,xrx100-pinctrl" or</div><div class='del'>-					"lantiq,xrx200-pinctrl")</div><div class='del'>-	      "lantiq,pinctrl-ase", (DEPRECATED: Use "lantiq,ase-pinctrl")</div><div class='del'>-	      "lantiq,&lt;chip&gt;-pinctrl", where &lt;chip&gt; is:</div><div class='add'>+- compatible:	"lantiq,&lt;chip&gt;-pinctrl", where &lt;chip&gt; is:</div><div class='ctx'> 		"ase" (XWAY AMAZON Family)</div><div class='ctx'> 		"danube" (XWAY DANUBE Family)</div><div class='ctx'> 		"xrx100" (XWAY xRX100 Family)</div><div class='hunk'>@@ -45,29 +41,6 @@ Required subnode-properties:</div><div class='ctx'> </div><div class='ctx'> Valid values for group and function names:</div><div class='ctx'> </div><div class='del'>-XWAY: (DEPRECATED: Use DANUBE)</div><div class='del'>-  mux groups:</div><div class='del'>-    exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,</div><div class='del'>-    ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3,</div><div class='del'>-    spi_cs4, spi_cs5, spi_cs6, asc0, asc0 cts rts, stp, nmi, gpt1, gpt2,</div><div class='del'>-    gpt3, clkout0, clkout1, clkout2, clkout3, gnt1, gnt2, gnt3, req1, req2,</div><div class='del'>-    req3</div><div class='del'>-</div><div class='del'>-  functions:</div><div class='del'>-    spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu</div><div class='del'>-</div><div class='del'>-XR9: ( DEPRECATED: Use xRX100/xRX200)</div><div class='del'>-  mux groups:</div><div class='del'>-    exin0, exin1, exin2, exin3, exin4, jtag, ebu a23, ebu a24, ebu a25,</div><div class='del'>-    ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy,</div><div class='del'>-    nand rd, spi, spi_cs1, spi_cs2, spi_cs3, spi_cs4, spi_cs5, spi_cs6,</div><div class='del'>-    asc0, asc0 cts rts, stp, nmi, gpt1, gpt2, gpt3, clkout0, clkout1,</div><div class='del'>-    clkout2, clkout3, gnt1, gnt2, gnt3, gnt4, req1, req2, req3, req4, mdio,</div><div class='del'>-    gphy0 led0, gphy0 led1, gphy0 led2, gphy1 led0, gphy1 led1, gphy1 led2</div><div class='del'>-</div><div class='del'>-  functions:</div><div class='del'>-    spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, mdio, gphy</div><div class='del'>-</div><div class='ctx'> AMAZON:</div><div class='ctx'>   mux groups:</div><div class='ctx'>     exin0, exin1, exin2, jtag, spi_di, spi_do, spi_clk, spi_cs1, spi_cs2,</div><div class='hunk'>@@ -139,12 +112,6 @@ Optional subnode-properties:</div><div class='ctx'>     0: none, 1: down, 2: up.</div><div class='ctx'> - lantiq,open-drain: Boolean, enables open-drain on the defined pin.</div><div class='ctx'> </div><div class='del'>-Valid values for XWAY pin names: (DEPRECATED: Use DANUBE)</div><div class='del'>-  Pinconf pins can be referenced via the names io0-io31.</div><div class='del'>-</div><div class='del'>-Valid values for XR9 pin names: (DEPRECATED: Use xrX100/xRX200)</div><div class='del'>-  Pinconf pins can be referenced via the names io0-io55.</div><div class='del'>-</div><div class='ctx'> Valid values for AMAZON pin names:</div><div class='ctx'>   Pinconf pins can be referenced via the names io0-io31.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..bd8a45843566<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/loongson,ls2k-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/loongson,ls2k-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Loongson-2 SoC Pinctrl Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - zhanghongchen &lt;zhanghongchen@loongson.cn&gt;</div><div class='add'>+  - Yinbo Zhu &lt;zhuyinbo@loongson.cn&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: loongson,ls2k-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      'pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              One or more groups of pins to mux to a certain function</div><div class='add'>+            items:</div><div class='add'>+              enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,</div><div class='add'>+                     nand, sata_led, i2s, hda]</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              The function that a group of pins is muxed to</div><div class='add'>+            enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,</div><div class='add'>+                   nand, sata_led, i2s, hda]</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pctrl: pinctrl@1fe00420 {</div><div class='add'>+        compatible = "loongson,ls2k-pinctrl";</div><div class='add'>+        reg = &lt;0x1fe00420 0x18&gt;;</div><div class='add'>+        sdio_pins_default: sdio-pins {</div><div class='add'>+            sdio-pinmux {</div><div class='add'>+                groups = "sdio";</div><div class='add'>+                function = "sdio";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            sdio-det-pinmux {</div><div class='add'>+                groups = "pwm2";</div><div class='add'>+                function = "gpio";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pwm1_pins_default: pwm1-pins {</div><div class='add'>+            pinmux {</div><div class='add'>+                groups = "pwm1";</div><div class='add'>+                function = "pwm1";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pwm0_pins_default: pwm0-pins {</div><div class='add'>+            pinmux {</div><div class='add'>+                groups = "pwm0";</div><div class='add'>+                function = "pwm0";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        i2c1_pins_default: i2c1-pins {</div><div class='add'>+            pinmux {</div><div class='add'>+                groups = "i2c1";</div><div class='add'>+                function = "i2c1";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        i2c0_pins_default: i2c0-pins {</div><div class='add'>+            pinmux {</div><div class='add'>+                groups = "i2c0";</div><div class='add'>+                function = "i2c0";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        nand_pins_default: nand-pins {</div><div class='add'>+            pinmux {</div><div class='add'>+                groups = "nand";</div><div class='add'>+                function = "nand";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hda_pins_default: hda-pins {</div><div class='add'>+            grp0-pinmux {</div><div class='add'>+                groups = "hda";</div><div class='add'>+                function = "hda";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            grp1-pinmux {</div><div class='add'>+                groups = "i2s";</div><div class='add'>+                function = "gpio";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..afea9424c7e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/marvell,ac5-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell AC5 pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Bindings for Marvell's AC5 memory-mapped pin controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: marvell,ac5-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: pinmux-node.yaml#</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      marvell,function:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        description:</div><div class='add'>+          Indicates the function to select.</div><div class='add'>+        enum: [ dev_init_done, ge, gpio, i2c0, i2c1, int_out, led, nand, pcie, ptp, sdio,</div><div class='add'>+                spi0, spi1, synce, tsen_int, uart0, uart1, uart2, uart3, uartsd, wd_int, xg ]</div><div class='add'>+</div><div class='add'>+      marvell,pins:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+        description:</div><div class='add'>+          Array of MPP pins to be used for the given function.</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9,</div><div class='add'>+                  mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, mpp19,</div><div class='add'>+                  mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, mpp28, mpp29,</div><div class='add'>+                  mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, mpp37, mpp38, mpp39,</div><div class='add'>+                  mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl@80020100 {</div><div class='add'>+      compatible = "marvell,ac5-pinctrl";</div><div class='add'>+      reg = &lt;0x80020100 0x20&gt;;</div><div class='add'>+</div><div class='add'>+      i2c0_pins: i2c0-pins {</div><div class='add'>+        marvell,pins = "mpp26", "mpp27";</div><div class='add'>+        marvell,function = "i2c0";</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      i2c0_gpio: i2c0-gpio-pins {</div><div class='add'>+        marvell,pins = "mpp26", "mpp27";</div><div class='add'>+        marvell,function = "gpio";</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml<br/>index 161088a8be33..bccff08a5ba3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT65xx Pin Controller Device Tree Bindings</div><div class='add'>+title: MediaTek MT65xx Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sean Wang &lt;sean.wang@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |+</div><div class='del'>-  The Mediatek's Pin controller is used to control SoC pins.</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT65xx Pin controller is used to control SoC pins.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,17 +30,18 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   pins-are-numbered:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-    description: |</div><div class='del'>-      Specify the subnodes are using numbered pinmux to specify pins.</div><div class='add'>+    description:</div><div class='add'>+      Specify the subnodes are using numbered pinmux to specify pins. (UNUSED)</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     const: 2</div><div class='del'>-    description: |</div><div class='del'>-      Number of cells in GPIO specifier. Since the generic GPIO</div><div class='del'>-      binding is used, the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='ctx'> </div><div class='ctx'>   mediatek,pctl-regmap:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='hunk'>@@ -48,7 +49,7 @@ properties:</div><div class='ctx'>       maxItems: 1</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='del'>-    description: |</div><div class='add'>+    description:</div><div class='ctx'>       Should be phandles of the syscfg node.</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='hunk'>@@ -62,40 +63,39 @@ properties:</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - pins-are-numbered</div><div class='ctx'>   - gpio-controller</div><div class='ctx'>   - "#gpio-cells"</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-[0-9]+$':</div><div class='add'>+  'pins$':</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     patternProperties:</div><div class='del'>-      'pins':</div><div class='add'>+      '(^pins|pins?$)':</div><div class='ctx'>         type: object</div><div class='ctx'>         additionalProperties: false</div><div class='del'>-        description: |</div><div class='add'>+        description:</div><div class='ctx'>           A pinctrl node should contain at least one subnodes representing the</div><div class='ctx'>           pinctrl groups available on the machine. Each subnode will list the</div><div class='ctx'>           pins it needs, and how they should be configured, with regard to muxer</div><div class='ctx'>           configuration, pullups, drive strength, input enable/disable and input</div><div class='ctx'>           schmitt.</div><div class='del'>-        $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           pinmux:</div><div class='ctx'>             description:</div><div class='del'>-              integer array, represents gpio pin number and mux setting.</div><div class='add'>+              Integer array, represents gpio pin number and mux setting.</div><div class='ctx'>               Supported pin number and mux varies for different SoCs, and are</div><div class='del'>-              defined as macros in &lt;soc&gt;-pinfunc.h directly.</div><div class='add'>+              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h directly.</div><div class='ctx'> </div><div class='ctx'>           bias-disable: true</div><div class='ctx'> </div><div class='ctx'>           bias-pull-up:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               Besides generic pinconfig options, it can be used as the pull up</div><div class='ctx'>               settings for 2 pull resistors, R0 and R1. User can configure those</div><div class='ctx'>               special pins. Some macros have been defined for this usage, such</div><div class='hunk'>@@ -117,7 +117,7 @@ patternProperties:</div><div class='ctx'>           input-schmitt-disable: true</div><div class='ctx'> </div><div class='ctx'>           drive-strength:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               Can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA,</div><div class='ctx'>               etc. See dt-bindings/pinctrl/mt65xx.h for valid arguments.</div><div class='ctx'> </div><div class='hunk'>@@ -150,7 +150,6 @@ examples:</div><div class='ctx'>           compatible = "mediatek,mt8135-pinctrl";</div><div class='ctx'>           reg = &lt;0 0x1000B000 0 0x1000&gt;;</div><div class='ctx'>           mediatek,pctl-regmap = &lt;&amp;syscfg_pctl_a&gt;, &lt;&amp;syscfg_pctl_b&gt;;</div><div class='del'>-          pins-are-numbered;</div><div class='ctx'>           gpio-controller;</div><div class='ctx'>           #gpio-cells = &lt;2&gt;;</div><div class='ctx'>           interrupt-controller;</div><div class='hunk'>@@ -159,7 +158,7 @@ examples:</div><div class='ctx'>               &lt;GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'>               &lt;GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'> </div><div class='del'>-          i2c0_pins_a: i2c0-0 {</div><div class='add'>+          i2c0_pins_a: i2c0-pins {</div><div class='ctx'>             pins1 {</div><div class='ctx'>               pinmux = &lt;MT8135_PIN_100_SDA0__FUNC_SDA0&gt;,</div><div class='ctx'>                 &lt;MT8135_PIN_101_SCL0__FUNC_SCL0&gt;;</div><div class='hunk'>@@ -167,7 +166,7 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='del'>-          i2c1_pins_a: i2c1-0 {</div><div class='add'>+          i2c1_pins_a: i2c1-pins {</div><div class='ctx'>             pins {</div><div class='ctx'>               pinmux = &lt;MT8135_PIN_195_SDA1__FUNC_SDA1&gt;,</div><div class='ctx'>                 &lt;MT8135_PIN_196_SCL1__FUNC_SCL1&gt;;</div><div class='hunk'>@@ -175,7 +174,7 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='del'>-          i2c2_pins_a: i2c2-0 {</div><div class='add'>+          i2c2_pins_a: i2c2-pins {</div><div class='ctx'>             pins1 {</div><div class='ctx'>               pinmux = &lt;MT8135_PIN_193_SDA2__FUNC_SDA2&gt;;</div><div class='ctx'>               bias-pull-down;</div><div class='hunk'>@@ -187,7 +186,7 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='del'>-          i2c3_pins_a: i2c3-0 {</div><div class='add'>+          i2c3_pins_a: i2c3-pins {</div><div class='ctx'>             pins1 {</div><div class='ctx'>               pinmux = &lt;MT8135_PIN_40_DAC_CLK__FUNC_GPIO40&gt;,</div><div class='ctx'>                 &lt;MT8135_PIN_41_DAC_WS__FUNC_GPIO41&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml<br/>index e7601c0f5a69..7f0e2d6cd6d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml</a></div><div class='hunk'>@@ -4,94 +4,134 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT6779 Pin Controller Device Tree Bindings</div><div class='add'>+title: MediaTek MT6779 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andy Teng &lt;andy.teng@mediatek.com&gt;</div><div class='add'>+  - Sean Wang &lt;sean.wang@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |+</div><div class='del'>-  The pin controller node should be the child of a syscon node with the</div><div class='del'>-  required property:</div><div class='del'>-  - compatible: "syscon"</div><div class='add'>+description:</div><div class='add'>+  The MediaTek pin controller on MT6779 is used to control pin functions, pull</div><div class='add'>+  up/down resistance and drive strength options.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mediatek,mt6779-pinctrl</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt6779-pinctrl</div><div class='add'>+      - mediatek,mt6797-pinctrl</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 9</div><div class='del'>-    maxItems: 9</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: "gpio"</div><div class='del'>-      - const: "iocfg_rm"</div><div class='del'>-      - const: "iocfg_br"</div><div class='del'>-      - const: "iocfg_lm"</div><div class='del'>-      - const: "iocfg_lb"</div><div class='del'>-      - const: "iocfg_rt"</div><div class='del'>-      - const: "iocfg_lt"</div><div class='del'>-      - const: "iocfg_tl"</div><div class='del'>-      - const: "eint"</div><div class='add'>+    description: Physical addresses for GPIO base(s) and EINT registers.</div><div class='add'>+</div><div class='add'>+  reg-names: true</div><div class='ctx'> </div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     const: 2</div><div class='del'>-    description: |</div><div class='del'>-      Number of cells in GPIO specifier. Since the generic GPIO</div><div class='del'>-      binding is used, the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='ctx'> </div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 5</div><div class='del'>-    description: |</div><div class='add'>+    description:</div><div class='ctx'>       GPIO valid number range.</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='del'>-    description: |</div><div class='add'>+    description:</div><div class='ctx'>       Specifies the summary IRQ.</div><div class='ctx'> </div><div class='ctx'>   "#interrupt-cells":</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='ctx'>   - gpio-controller</div><div class='ctx'>   - "#gpio-cells"</div><div class='del'>-  - gpio-ranges</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - interrupts</div><div class='del'>-  - "#interrupt-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt6779-pinctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 9</div><div class='add'>+          maxItems: 9</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gpio</div><div class='add'>+            - const: iocfg_rm</div><div class='add'>+            - const: iocfg_br</div><div class='add'>+            - const: iocfg_lm</div><div class='add'>+            - const: iocfg_lb</div><div class='add'>+            - const: iocfg_rt</div><div class='add'>+            - const: iocfg_lt</div><div class='add'>+            - const: iocfg_tl</div><div class='add'>+            - const: eint</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt6797-pinctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gpio</div><div class='add'>+            - const: iocfgl</div><div class='add'>+            - const: iocfgb</div><div class='add'>+            - const: iocfgr</div><div class='add'>+            - const: iocfgt</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        reg-names:</div><div class='add'>+          contains:</div><div class='add'>+            const: eint</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+        - interrupt-controller</div><div class='add'>+        - "#interrupt-cells"</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   '-[0-9]*$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       '-pins*$':</div><div class='ctx'>         type: object</div><div class='del'>-        description: |</div><div class='add'>+        description:</div><div class='ctx'>           A pinctrl node should contain at least one subnodes representing the</div><div class='ctx'>           pinctrl groups available on the machine. Each subnode will list the</div><div class='ctx'>           pins it needs, and how they should be configured, with regard to muxer</div><div class='del'>-          configuration, pullups, drive strength, input enable/disable and input schmitt.</div><div class='del'>-        $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+          configuration, pullups, drive strength, input enable/disable and input</div><div class='add'>+          schmitt.</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           pinmux:</div><div class='ctx'>             description:</div><div class='del'>-              integer array, represents gpio pin number and mux setting.</div><div class='del'>-              Supported pin number and mux varies for different SoCs, and are defined</div><div class='del'>-              as macros in boot/dts/&lt;soc&gt;-pinfunc.h directly.</div><div class='add'>+              Integer array, represents gpio pin number and mux setting.</div><div class='add'>+              Supported pin number and mux varies for different SoCs, and are</div><div class='add'>+              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h directly.</div><div class='ctx'> </div><div class='ctx'>           bias-disable: true</div><div class='ctx'> </div><div class='hunk'>@@ -111,10 +151,17 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>           input-schmitt-disable: true</div><div class='ctx'> </div><div class='add'>+          drive-strength:</div><div class='add'>+            enum: [2, 4, 8, 12, 16]</div><div class='add'>+</div><div class='add'>+          slew-rate:</div><div class='add'>+            enum: [0, 1]</div><div class='add'>+</div><div class='ctx'>           mediatek,pull-up-adv:</div><div class='ctx'>             description: |</div><div class='ctx'>               Pull up setings for 2 pull resistors, R0 and R1. User can</div><div class='del'>-              configure those special pins. Valid arguments are described as below:</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='ctx'>               0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='ctx'>               1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='ctx'>               2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='hunk'>@@ -125,7 +172,8 @@ patternProperties:</div><div class='ctx'>           mediatek,pull-down-adv:</div><div class='ctx'>             description: |</div><div class='ctx'>               Pull down settings for 2 pull resistors, R0 and R1. User can</div><div class='del'>-              configure those special pins. Valid arguments are described as below:</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='ctx'>               0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='ctx'>               1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='ctx'>               2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..601d86aecdd4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,228 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT6795 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+  - Sean Wang &lt;sean.wang@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT6795 Pin controller is used to control SoC pins.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt6795-pinctrl</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    description: GPIO valid number range.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      Physical address base for GPIO base and eint registers.</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: base</div><div class='add'>+      - const: eint</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: Interrupt outputs to the system interrupt controller (sysirq).</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: EINT interrupt</div><div class='add'>+      - description: EINT event_b interrupt</div><div class='add'>+</div><div class='add'>+# PIN CONFIGURATION NODES</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^pins':</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description: |</div><div class='add'>+          A pinctrl node should contain at least one subnodes representing the</div><div class='add'>+          pinctrl groups available on the machine. Each subnode will list the</div><div class='add'>+          pins it needs, and how they should be configured, with regard to muxer</div><div class='add'>+          configuration, pullups, drive strength, input enable/disable and input</div><div class='add'>+          schmitt.</div><div class='add'>+          An example of using macro:</div><div class='add'>+          pincontroller {</div><div class='add'>+            /* GPIO0 set as multifunction GPIO0 */</div><div class='add'>+            gpio-pins {</div><div class='add'>+              pins {</div><div class='add'>+                pinmux = &lt;PINMUX_GPIO0__FUNC_GPIO0&gt;;</div><div class='add'>+              }</div><div class='add'>+            };</div><div class='add'>+            /* GPIO45 set as multifunction SDA0 */</div><div class='add'>+            i2c0-pins {</div><div class='add'>+              pins {</div><div class='add'>+                pinmux = &lt;PINMUX_GPIO45__FUNC_SDA0&gt;;</div><div class='add'>+              }</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        $ref: pinmux-node.yaml</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pinmux:</div><div class='add'>+            description:</div><div class='add'>+              Integer array, represents gpio pin number and mux setting.</div><div class='add'>+              Supported pin number and mux varies for different SoCs, and are</div><div class='add'>+              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h directly.</div><div class='add'>+</div><div class='add'>+          drive-strength:</div><div class='add'>+            enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: mt6795 pull down PUPD/R0/R1 type define value.</div><div class='add'>+            description:</div><div class='add'>+              For normal pull down type, it is not necessary to specify R1R0</div><div class='add'>+              values; When pull down type is PUPD/R0/R1, adding R1R0 defines</div><div class='add'>+              will set different resistance values.</div><div class='add'>+</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: mt6795 pull up PUPD/R0/R1 type define value.</div><div class='add'>+            description:</div><div class='add'>+              For normal pull up type, it is not necessary to specify R1R0</div><div class='add'>+              values; When pull up type is PUPD/R0/R1, adding R1R0 defines will</div><div class='add'>+              set different resistance values.</div><div class='add'>+</div><div class='add'>+          bias-disable: true</div><div class='add'>+</div><div class='add'>+          output-high: true</div><div class='add'>+</div><div class='add'>+          output-low: true</div><div class='add'>+</div><div class='add'>+          input-enable: true</div><div class='add'>+</div><div class='add'>+          input-disable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-enable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-disable: true</div><div class='add'>+</div><div class='add'>+          mediatek,pull-up-adv:</div><div class='add'>+            description: |</div><div class='add'>+              Pull up setings for 2 pull resistors, R0 and R1. User can</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='add'>+              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+          mediatek,pull-down-adv:</div><div class='add'>+            description: |</div><div class='add'>+              Pull down settings for 2 pull resistors, R0 and R1. User can</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='add'>+              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - pinmux</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/mt6795-pinfunc.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pio: pinctrl@10005000 {</div><div class='add'>+            compatible = "mediatek,mt6795-pinctrl";</div><div class='add'>+            reg = &lt;0 0x10005000 0 0x1000&gt;, &lt;0 0x1000b000 0 0x1000&gt;;</div><div class='add'>+            reg-names = "base", "eint";</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            gpio-ranges = &lt;&amp;pio 0 0 196&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            interrupts = &lt;GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            i2c0-pins {</div><div class='add'>+                pins-sda-scl {</div><div class='add'>+                    pinmux = &lt;PINMUX_GPIO45__FUNC_SDA0&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO46__FUNC_SCL0&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mmc0-pins {</div><div class='add'>+                pins-cmd-dat {</div><div class='add'>+                    pinmux = &lt;PINMUX_GPIO154__FUNC_MSDC0_DAT0&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO155__FUNC_MSDC0_DAT1&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO156__FUNC_MSDC0_DAT2&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO157__FUNC_MSDC0_DAT3&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO158__FUNC_MSDC0_DAT4&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO159__FUNC_MSDC0_DAT5&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO160__FUNC_MSDC0_DAT6&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO161__FUNC_MSDC0_DAT7&gt;,</div><div class='add'>+                             &lt;PINMUX_GPIO162__FUNC_MSDC0_CMD&gt;;</div><div class='add'>+                    input-enable;</div><div class='add'>+                    bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                pins-clk {</div><div class='add'>+                    pinmux = &lt;PINMUX_GPIO163__FUNC_MSDC0_CLK&gt;;</div><div class='add'>+                    bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                pins-rst {</div><div class='add'>+                    pinmux = &lt;PINMUX_GPIO165__FUNC_MSDC0_RSTB&gt;;</div><div class='add'>+                    bias-pull-up = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml<br/>deleted file mode 100644<br/>index d42215f59afd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt6797-pinctrl.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,176 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/mediatek,mt6797-pinctrl.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Mediatek MT6797 Pin Controller Device Tree Bindings</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Sean Wang &lt;sean.wang@kernel.org&gt;</div><div class='del'>-</div><div class='del'>-description: |+</div><div class='del'>-  The MediaTek's MT6797 Pin controller is used to control SoC pins.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: mediatek,mt6797-pinctrl</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    minItems: 5</div><div class='del'>-    maxItems: 5</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: gpio</div><div class='del'>-      - const: iocfgl</div><div class='del'>-      - const: iocfgb</div><div class='del'>-      - const: iocfgr</div><div class='del'>-      - const: iocfgt</div><div class='del'>-</div><div class='del'>-  gpio-controller: true</div><div class='del'>-</div><div class='del'>-  "#gpio-cells":</div><div class='del'>-    const: 2</div><div class='del'>-    description: |</div><div class='del'>-      Number of cells in GPIO specifier. Since the generic GPIO</div><div class='del'>-      binding is used, the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  "#interrupt-cells":</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - "#gpio-cells"</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  '-[0-9]+$':</div><div class='del'>-    type: object</div><div class='del'>-    additionalProperties: false</div><div class='del'>-    patternProperties:</div><div class='del'>-      'pins':</div><div class='del'>-        type: object</div><div class='del'>-        additionalProperties: false</div><div class='del'>-        description: |</div><div class='del'>-          A pinctrl node should contain at least one subnodes representing the</div><div class='del'>-          pinctrl groups available on the machine. Each subnode will list the</div><div class='del'>-          pins it needs, and how they should be configured, with regard to muxer</div><div class='del'>-          configuration, pullups, drive strength, input enable/disable and input</div><div class='del'>-          schmitt.</div><div class='del'>-        $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          pinmux:</div><div class='del'>-            description:</div><div class='del'>-              integer array, represents gpio pin number and mux setting.</div><div class='del'>-              Supported pin number and mux varies for different SoCs, and are</div><div class='del'>-              defined as macros in &lt;soc&gt;-pinfunc.h directly.</div><div class='del'>-</div><div class='del'>-          bias-disable: true</div><div class='del'>-</div><div class='del'>-          bias-pull-up: true</div><div class='del'>-</div><div class='del'>-          bias-pull-down: true</div><div class='del'>-</div><div class='del'>-          input-enable: true</div><div class='del'>-</div><div class='del'>-          input-disable: true</div><div class='del'>-</div><div class='del'>-          output-enable: true</div><div class='del'>-</div><div class='del'>-          output-low: true</div><div class='del'>-</div><div class='del'>-          output-high: true</div><div class='del'>-</div><div class='del'>-          input-schmitt-enable: true</div><div class='del'>-</div><div class='del'>-          input-schmitt-disable: true</div><div class='del'>-</div><div class='del'>-          drive-strength:</div><div class='del'>-            enum: [2, 4, 8, 12, 16]</div><div class='del'>-</div><div class='del'>-          slew-rate:</div><div class='del'>-            enum: [0, 1]</div><div class='del'>-</div><div class='del'>-          mediatek,pull-up-adv:</div><div class='del'>-            description: |</div><div class='del'>-              Pull up setings for 2 pull resistors, R0 and R1. User can</div><div class='del'>-              configure those special pins. Valid arguments are described as below:</div><div class='del'>-              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='del'>-              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='del'>-              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='del'>-              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            enum: [0, 1, 2, 3]</div><div class='del'>-</div><div class='del'>-          mediatek,pull-down-adv:</div><div class='del'>-            description: |</div><div class='del'>-              Pull down settings for 2 pull resistors, R0 and R1. User can</div><div class='del'>-              configure those special pins. Valid arguments are described as below:</div><div class='del'>-              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='del'>-              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='del'>-              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='del'>-              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            enum: [0, 1, 2, 3]</div><div class='del'>-</div><div class='del'>-          mediatek,tdsel:</div><div class='del'>-            description: |</div><div class='del'>-              An integer describing the steps for output level shifter duty</div><div class='del'>-              cycle when asserted (high pulse width adjustment). Valid arguments</div><div class='del'>-              are from 0 to 15.</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-</div><div class='del'>-          mediatek,rdsel:</div><div class='del'>-            description: |</div><div class='del'>-              An integer describing the steps for input level shifter duty cycle</div><div class='del'>-              when asserted (high pulse width adjustment). Valid arguments are</div><div class='del'>-              from 0 to 63.</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - pinmux</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/mt6797-pinfunc.h&gt;</div><div class='del'>-</div><div class='del'>-    soc {</div><div class='del'>-        #address-cells = &lt;2&gt;;</div><div class='del'>-        #size-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-        pio: pinctrl@10005000 {</div><div class='del'>-            compatible = "mediatek,mt6797-pinctrl";</div><div class='del'>-            reg = &lt;0 0x10005000 0 0x1000&gt;,</div><div class='del'>-                  &lt;0 0x10002000 0 0x400&gt;,</div><div class='del'>-                  &lt;0 0x10002400 0 0x400&gt;,</div><div class='del'>-                  &lt;0 0x10002800 0 0x400&gt;,</div><div class='del'>-                  &lt;0 0x10002C00 0 0x400&gt;;</div><div class='del'>-            reg-names = "gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt";</div><div class='del'>-            gpio-controller;</div><div class='del'>-            #gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-            uart_pins_a: uart-0 {</div><div class='del'>-                pins1 {</div><div class='del'>-                    pinmux = &lt;MT6797_GPIO232__FUNC_URXD1&gt;,</div><div class='del'>-                            &lt;MT6797_GPIO233__FUNC_UTXD1&gt;;</div><div class='del'>-                };</div><div class='del'>-            };</div><div class='del'>-        };</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..591bc0664ec6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,298 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT7620 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek MT7620 pin controller for MT7620 SoC.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,mt7620-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand,</div><div class='add'>+                   pa, pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf,</div><div class='add'>+                   refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite,</div><div class='add'>+                   wdt refclk, wdt rst, wled]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: ephy</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [ephy]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi,</div><div class='add'>+                         spi refclk, uartf, uartlite, wdt, wled]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2s uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: mdio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [mdio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: nand</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [nd_sd]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pa</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pa]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcie refclk</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pcie]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcie rst</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pcie]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: refclk</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [mdio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: rgmii1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [rgmii1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: rgmii2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [rgmii2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sd</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [nd_sd]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi refclk</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi refclk]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartlite</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wdt refclk</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wdt]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wdt rst</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wdt]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wled</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wled]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,mt7620-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..e568b9c13727<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,261 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT7621 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek MT7621 pin controller for MT7621 SoC.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,mt7621-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [gpio, i2c, i2s, jtag, mdio, nand1, nand2, pcie refclk,</div><div class='add'>+                   pcie rst, pcm, rgmii1, rgmii2, sdhci, spdif2, spdif3, spi,</div><div class='add'>+                   uart1, uart2, uart3, wdt refclk, wdt rst]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c, jtag, mdio, pcie, rgmii1, rgmii2, sdhci, spi,</div><div class='add'>+                         uart1, uart2, uart3, wdt]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart3]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [jtag]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: mdio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [mdio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: nand1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: nand2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [sdhci]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcie refclk</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pcie]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcie rst</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pcie]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: rgmii1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [rgmii1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: rgmii2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [rgmii2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sdhci</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [sdhci]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spdif2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spdif3</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart3]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uart1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uart2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uart3</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart3]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wdt refclk</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wdt]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wdt rst</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wdt]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,mt7621-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml<br/>index 78a0175cecc7..bd72a326e6e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml</a></div><div class='hunk'>@@ -4,12 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT7622 Pin Controller Device Tree Bindings</div><div class='add'>+title: MediaTek MT7622 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sean Wang &lt;sean.wang@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |+</div><div class='add'>+description:</div><div class='ctx'>   The MediaTek's MT7622 Pin controller is used to control SoC pins.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -29,10 +29,10 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     const: 2</div><div class='del'>-    description: |</div><div class='del'>-      Number of cells in GPIO specifier. Since the generic GPIO</div><div class='del'>-      binding is used, the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='hunk'>@@ -43,7 +43,7 @@ properties:</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -61,25 +61,25 @@ then:</div><div class='ctx'>     - "#interrupt-cells"</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-[0-9]+$':</div><div class='add'>+  '-pins(-[a-z]+)?$':</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     patternProperties:</div><div class='del'>-      'mux':</div><div class='add'>+      '^mux(-|$)':</div><div class='ctx'>         type: object</div><div class='ctx'>         additionalProperties: false</div><div class='del'>-        description: |</div><div class='add'>+        description:</div><div class='ctx'>           pinmux configuration nodes.</div><div class='del'>-        $ref: "/schemas/pinctrl/pinmux-node.yaml"</div><div class='add'>+        $ref: /schemas/pinctrl/pinmux-node.yaml</div><div class='ctx'>         properties:</div><div class='ctx'>           function:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               A string containing the name of the function to mux to the group.</div><div class='ctx'>             enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd,</div><div class='ctx'>                    spi, tdm, uart, watchdog, wifi]</div><div class='ctx'> </div><div class='ctx'>           groups:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An array of strings. Each string contains the name of a group.</div><div class='ctx'> </div><div class='ctx'>           drive-strength:</div><div class='hunk'>@@ -244,21 +244,21 @@ patternProperties:</div><div class='ctx'>                 groups:</div><div class='ctx'>                   enum: [wf0_2g, wf0_5g]</div><div class='ctx'> </div><div class='del'>-      'conf':</div><div class='add'>+      '^conf(-|$)':</div><div class='ctx'>         type: object</div><div class='ctx'>         additionalProperties: false</div><div class='del'>-        description: |</div><div class='add'>+        description:</div><div class='ctx'>           pinconf configuration nodes.</div><div class='del'>-        $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           groups:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An array of strings. Each string contains the name of a group.</div><div class='ctx'>               Valid values are the same as the pinmux node.</div><div class='ctx'> </div><div class='ctx'>           pins:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An array of strings. Each string contains the name of a pin.</div><div class='ctx'>             enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0,</div><div class='ctx'>                    RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS,</div><div class='hunk'>@@ -315,14 +315,14 @@ patternProperties:</div><div class='ctx'>             enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>           mediatek,tdsel:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An integer describing the steps for output level shifter duty</div><div class='ctx'>               cycle when asserted (high pulse width adjustment). Valid arguments</div><div class='ctx'>               are from 0 to 15.</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>           mediatek,rdsel:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An integer describing the steps for input level shifter duty cycle</div><div class='ctx'>               when asserted (high pulse width adjustment). Valid arguments are</div><div class='ctx'>               from 0 to 63.</div><div class='hunk'>@@ -348,7 +348,7 @@ examples:</div><div class='ctx'>           gpio-controller;</div><div class='ctx'>           #gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-          pinctrl_eth_default: eth-0 {</div><div class='add'>+          pinctrl_eth_default: eth-pins {</div><div class='ctx'>             mux-mdio {</div><div class='ctx'>               groups = "mdc_mdio";</div><div class='ctx'>               function = "eth";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..31849dd5940b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt76x8-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,450 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt76x8-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT76X8 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek MT76X8 pin controller for MT7628 and MT7688 SoCs.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,mt76x8-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn,</div><div class='add'>+                   p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn,</div><div class='add'>+                   p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1,</div><div class='add'>+                   pwm_uart2, refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7,</div><div class='add'>+                   spi, spi cs1, spis, sw_r, uart0, uart1, uart2, utif, wdt,</div><div class='add'>+                   wled_an, wled_kn, -]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: antenna</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2s]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: debug</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn,</div><div class='add'>+                         p2led_an, p2led_kn, p3led_an, p3led_kn, p4led_an,</div><div class='add'>+                         p4led_kn, perst, pwm0, pwm1, refclk, sdmode, spi,</div><div class='add'>+                         spi cs1, spis, uart0, uart1, uart2, wdt, wled_an,</div><div class='add'>+                         wled_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2s]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an,</div><div class='add'>+                         p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn,</div><div class='add'>+                         sdmode]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p0led_an</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p0led_an]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p0led_kn</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p0led_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p1led_an</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p1led_an]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p1led_kn</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p1led_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p2led_an</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p2led_an]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p2led_kn</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p2led_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p3led_an</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p3led_an]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p3led_kn</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p3led_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p4led_an</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p4led_an]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: p4led_kn</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p4led_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcie</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [gpio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2s]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: perst</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [perst]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pwm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart1, uart2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pwm0</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pwm0]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pwm1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pwm1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pwm_uart2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spis]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: refclk</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [gpio, refclk, spi cs1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: rsvd</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p0led_an, p0led_kn, wled_an, wled_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sdxc</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [sdmode]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sdxc d5 d4</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sdxc d6</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pwm1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sdxc d7</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pwm0]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi cs1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi cs1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spis</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spis]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sw_r</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uart0</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart0]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uart1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uart2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uart2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: utif</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an,</div><div class='add'>+                         p3led_kn, p4led_an, p4led_kn, pwm0, pwm1, sdmode, spis]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wdt</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wdt]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wled_an</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wled_an]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wled_kn</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wled_kn]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: "-"</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c, spi cs1, uart0]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,mt76x8-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..10717cee9058<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,480 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT7981 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Daniel Golle &lt;daniel@makrotopia.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT7981 Pin controller is used to control SoC pins.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt7981-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 9</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: gpio</div><div class='add'>+      - const: iocfg_rt</div><div class='add'>+      - const: iocfg_rm</div><div class='add'>+      - const: iocfg_rb</div><div class='add'>+      - const: iocfg_lb</div><div class='add'>+      - const: iocfg_bl</div><div class='add'>+      - const: iocfg_tm</div><div class='add'>+      - const: iocfg_tl</div><div class='add'>+      - const: eint</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+    description: GPIO valid number range.</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^.*mux.*$':</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description: |</div><div class='add'>+          pinmux configuration nodes.</div><div class='add'>+</div><div class='add'>+          The following table shows the effective values of "group", "function"</div><div class='add'>+          properties and chip pinout pins</div><div class='add'>+</div><div class='add'>+          groups                 function    pins (in pin#)</div><div class='add'>+          ---------------------------------------------------------------------</div><div class='add'>+          "wa_aice1"             "wa_aice"   0, 1</div><div class='add'>+          "wa_aice2"             "wa_aice"   0, 1</div><div class='add'>+          "wm_uart_0"            "uart"      0, 1</div><div class='add'>+          "dfd"                  "dfd"       0, 1, 4, 5</div><div class='add'>+          "watchdog"             "watchdog"  2</div><div class='add'>+          "pcie_pereset"         "pcie"      3</div><div class='add'>+          "jtag"                 "jtag"      4, 5, 6, 7, 8</div><div class='add'>+          "wm_jtag_0"            "jtag"      4, 5, 6, 7, 8</div><div class='add'>+          "wo0_jtag_0"           "jtag"      9, 10, 11, 12, 13</div><div class='add'>+          "uart2_0"              "uart"      4, 5, 6, 7</div><div class='add'>+          "gbe_led0"             "led"       8</div><div class='add'>+          "pta_ext_0"            "pta"       4, 5, 6</div><div class='add'>+          "pwm2"                 "pwm"       7</div><div class='add'>+          "net_wo0_uart_txd_0"   "uart"      8</div><div class='add'>+          "spi1_0"               "spi"       4, 5, 6, 7</div><div class='add'>+          "i2c0_0"               "i2c"       6, 7</div><div class='add'>+          "dfd_ntrst"            "dfd"       8</div><div class='add'>+          "wm_aice1"             "wa_aice"   9, 10</div><div class='add'>+          "pwm0_0"               "pwm"       13</div><div class='add'>+          "pwm0_1"               "pwm"       15</div><div class='add'>+          "pwm1_0"               "pwm"       14</div><div class='add'>+          "pwm1_1"               "pwm"       15</div><div class='add'>+          "net_wo0_uart_txd_1"   "uart"      14</div><div class='add'>+          "net_wo0_uart_txd_2"   "uart"      15</div><div class='add'>+          "gbe_led1"             "led"       13</div><div class='add'>+          "pcm"                  "pcm"       9, 10, 11, 12, 13, 25</div><div class='add'>+          "watchdog1"            "watchdog"  13</div><div class='add'>+          "udi"                  "udi"       9, 10, 11, 12, 13</div><div class='add'>+          "drv_vbus"             "usb"       14</div><div class='add'>+          "emmc_45"              "flash"     15, 16, 17, 18, 19, 20, 21, 22, 23,</div><div class='add'>+                                             24, 25</div><div class='add'>+</div><div class='add'>+          "snfi"                 "flash"     16, 17, 18, 19, 20, 21</div><div class='add'>+          "spi0"                 "spi"       16, 17, 18, 19</div><div class='add'>+          "spi0_wp_hold"         "spi"       20, 21</div><div class='add'>+          "spi1_1"               "spi"       22, 23, 24, 25</div><div class='add'>+          "spi2"                 "spi"       26, 27, 28, 29</div><div class='add'>+          "spi2_wp_hold"         "spi"       30, 31</div><div class='add'>+          "uart1_0"              "uart"      16, 17, 18, 19</div><div class='add'>+          "uart1_1"              "uart"      26, 27, 28, 29</div><div class='add'>+          "uart2_1"              "uart"      22, 23, 24, 25</div><div class='add'>+          "pta_ext_1"            "pta"       22, 23, 24</div><div class='add'>+          "wm_aurt_1"            "uart"      20, 21</div><div class='add'>+          "wm_aurt_2"            "uart"      30, 31</div><div class='add'>+          "wm_jtag_1"            "jtag"      20, 21, 22, 23, 24</div><div class='add'>+          "wo0_jtag_1"           "jtag"      25, 26, 27, 28, 29</div><div class='add'>+          "wa_aice3"             "wa_aice"   28, 20</div><div class='add'>+          "wm_aice2"             "wa_aice"   30, 31</div><div class='add'>+          "i2c0_1"               "i2c"       30, 31</div><div class='add'>+          "u2_phy_i2c"           "i2c"       30, 31</div><div class='add'>+          "uart0"                "uart"      32, 33</div><div class='add'>+          "sgmii1_phy_i2c"       "i2c"       32, 33</div><div class='add'>+          "u3_phy_i2c"           "i2c"       32, 33</div><div class='add'>+          "sgmii0_phy_i2c"       "i2c"       32, 33</div><div class='add'>+          "pcie_clk"             "pcie"      34</div><div class='add'>+          "pcie_wake"            "pcie"      35</div><div class='add'>+          "i2c0_2"               "i2c"       36, 37</div><div class='add'>+          "smi_mdc_mdio"         "eth"       36, 37</div><div class='add'>+          "gbe_ext_mdc_mdio"     "eth"       36, 37</div><div class='add'>+          "wf0_mode1"            "eth"       40, 41, 42, 43, 44, 45, 46, 47, 48,</div><div class='add'>+                                             49, 50, 51, 52, 53, 54, 55, 56</div><div class='add'>+</div><div class='add'>+          "wf0_mode3"            "eth"       45, 46, 47, 48, 49, 51</div><div class='add'>+          "wf2g_led0"            "led"       30</div><div class='add'>+          "wf2g_led1"            "led"       34</div><div class='add'>+          "wf5g_led0"            "led"       31</div><div class='add'>+          "wf5g_led1"            "led"       35</div><div class='add'>+          "mt7531_int"           "eth"       38</div><div class='add'>+          "ant_sel"              "ant"       14, 15, 16, 17, 18, 19, 20, 21, 22,</div><div class='add'>+                                             23, 24, 25, 34, 35</div><div class='add'>+</div><div class='add'>+        $ref: /schemas/pinctrl/pinmux-node.yaml</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [wa_aice, dfd, jtag, pta, pcm, udi, usb, ant, eth, i2c, led,</div><div class='add'>+                   pwm, spi, uart, watchdog, flash, pcie]</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - function</div><div class='add'>+          - groups</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wa_aice</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [wa_aice1, wa_aice2, wm_aice1_1, wa_aice3, wm_aice1_2]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: dfd</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [dfd, dfd_ntrst]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [jtag, wm_jtag_0, wo0_jtag_0, wo0_jtag_1, wm_jtag_1]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pta</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pta_ext_0, pta_ext_1]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pcm]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: udi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [udi]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: usb</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [drv_vbus]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: ant</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [ant_sel]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: eth</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [smi_mdc_mdio, gbe_ext_mdc_mdio, wf0_mode1, wf0_mode3,</div><div class='add'>+                         mt7531_int]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c0_0, i2c0_1, u2_phy_i2c, sgmii1_phy_i2c, u3_phy_i2c,</div><div class='add'>+                         sgmii0_phy_i2c, i2c0_2]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: led</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [gbe_led0, gbe_led1, wf2g_led0, wf2g_led1, wf5g_led0,</div><div class='add'>+                         wf5g_led1]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pwm</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [pwm2, pwm0_0, pwm0_1, pwm1_0, pwm1_1]</div><div class='add'>+                  maxItems: 3</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [spi1_0, spi0, spi0_wp_hold, spi1_1, spi2,</div><div class='add'>+                           spi2_wp_hold]</div><div class='add'>+                  maxItems: 4</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uart</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [wm_uart_0, uart2_0, net_wo0_uart_txd_0,</div><div class='add'>+                           net_wo0_uart_txd_1, net_wo0_uart_txd_2, uart1_0,</div><div class='add'>+                           uart1_1, uart2_1, wm_aurt_1, wm_aurt_2, uart0]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: watchdog</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [watchdog]</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: flash</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [emmc_45, snfi]</div><div class='add'>+                  maxItems: 1</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcie</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [pcie_clk, pcie_wake, pcie_pereset]</div><div class='add'>+                  maxItems: 3</div><div class='add'>+</div><div class='add'>+      '^.*conf.*$':</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description: pinconf configuration nodes.</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pins:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a pin.</div><div class='add'>+            items:</div><div class='add'>+              enum: [GPIO_WPS, GPIO_RESET, SYS_WATCHDOG, PCIE_PERESET_N,</div><div class='add'>+                     JTAG_JTDO, JTAG_JTDI, JTAG_JTMS, JTAG_JTCLK, JTAG_JTRST_N,</div><div class='add'>+                     WO_JTAG_JTDO, WO_JTAG_JTDI, WO_JTAG_JTMS, WO_JTAG_JTCLK,</div><div class='add'>+                     WO_JTAG_JTRST_N, USB_VBUS, PWM0, SPI0_CLK, SPI0_MOSI,</div><div class='add'>+                     SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,</div><div class='add'>+                     SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,</div><div class='add'>+                     SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,</div><div class='add'>+                     UART0_TXD, PCIE_CLK_REQ, PCIE_WAKE_N, SMI_MDC, SMI_MDIO,</div><div class='add'>+                     GBE_INT, GBE_RESET, WF_DIG_RESETB, WF_CBA_RESETB,</div><div class='add'>+                     WF_XO_REQ, WF_TOP_CLK, WF_TOP_DATA, WF_HB1, WF_HB2, WF_HB3,</div><div class='add'>+                     WF_HB4, WF_HB0, WF_HB0_B, WF_HB5, WF_HB6, WF_HB7, WF_HB8,</div><div class='add'>+                     WF_HB9, WF_HB10]</div><div class='add'>+            maxItems: 57</div><div class='add'>+</div><div class='add'>+          bias-disable: true</div><div class='add'>+</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+                description: normal pull up.</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description:</div><div class='add'>+                  PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in</div><div class='add'>+                  dt-bindings/pinctrl/mt65xx.h.</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+                description: normal pull down.</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description:</div><div class='add'>+                  PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in</div><div class='add'>+                  dt-bindings/pinctrl/mt65xx.h.</div><div class='add'>+</div><div class='add'>+          input-enable: true</div><div class='add'>+</div><div class='add'>+          input-disable: true</div><div class='add'>+</div><div class='add'>+          output-enable: true</div><div class='add'>+</div><div class='add'>+          output-low: true</div><div class='add'>+</div><div class='add'>+          output-high: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-enable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-disable: true</div><div class='add'>+</div><div class='add'>+          drive-strength:</div><div class='add'>+            enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+</div><div class='add'>+          mediatek,pull-up-adv:</div><div class='add'>+            description: |</div><div class='add'>+              Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'</div><div class='add'>+              Pull up setings for 2 pull resistors, R0 and R1. Valid arguments</div><div class='add'>+              are described as below:</div><div class='add'>+              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+          mediatek,pull-down-adv:</div><div class='add'>+            description: |</div><div class='add'>+              Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'</div><div class='add'>+              Pull down setings for 2 pull resistors, R0 and R1. Valid arguments</div><div class='add'>+              are described as below:</div><div class='add'>+              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - pins</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/mt65xx.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      pio: pinctrl@11d00000 {</div><div class='add'>+        compatible = "mediatek,mt7981-pinctrl";</div><div class='add'>+        reg = &lt;0 0x11d00000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x11c00000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x11c10000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x11d20000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x11e00000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x11e20000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x11f00000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x11f10000 0 0x1000&gt;,</div><div class='add'>+              &lt;0 0x1000b000 0 0x1000&gt;;</div><div class='add'>+        reg-names = "gpio", "iocfg_rt", "iocfg_rm",</div><div class='add'>+                    "iocfg_rb", "iocfg_lb", "iocfg_bl",</div><div class='add'>+                    "iocfg_tm", "iocfg_tl", "eint";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;pio 0 0 56&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        interrupts = &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        mdio_pins: mdio-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "eth";</div><div class='add'>+            groups = "smi_mdc_mdio";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        spi0_flash_pins: spi0-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "spi";</div><div class='add'>+            groups = "spi0", "spi0_wp_hold";</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          conf-pu {</div><div class='add'>+            pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";</div><div class='add'>+            drive-strength = &lt;MTK_DRIVE_8mA&gt;;</div><div class='add'>+            bias-pull-up = &lt;MTK_PUPD_SET_R1R0_11&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          conf-pd {</div><div class='add'>+            pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";</div><div class='add'>+            drive-strength = &lt;MTK_DRIVE_8mA&gt;;</div><div class='add'>+            bias-pull-down = &lt;MTK_PUPD_SET_R1R0_11&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pcie_pins: pcie-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "pcie";</div><div class='add'>+            groups = "pcie_clk", "pcie_wake", "pcie_pereset";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml<br/>index 4eadea55df10..0f615ada290a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml</a></div><div class='hunk'>@@ -4,12 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT7986 Pin Controller Device Tree Bindings</div><div class='add'>+title: MediaTek MT7986 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sean Wang &lt;sean.wang@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |+</div><div class='add'>+description:</div><div class='ctx'>   The MediaTek's MT7986 Pin controller is used to control SoC pins.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -37,15 +37,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     const: 2</div><div class='del'>-    description: |</div><div class='del'>-      Number of cells in GPIO specifier. Since the generic GPIO</div><div class='del'>-      binding is used, the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='ctx'> </div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 5</div><div class='del'>-    description: |</div><div class='add'>+    description:</div><div class='ctx'>       GPIO valid number range.</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='hunk'>@@ -57,7 +57,7 @@ properties:</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -72,7 +72,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      '.*mux.*':</div><div class='add'>+      '^.*mux.*$':</div><div class='ctx'>         type: object</div><div class='ctx'>         additionalProperties: false</div><div class='ctx'>         description: |</div><div class='hunk'>@@ -81,12 +81,14 @@ patternProperties:</div><div class='ctx'>           The following table shows the effective values of "group", "function"</div><div class='ctx'>           properties and chip pinout pins</div><div class='ctx'> </div><div class='del'>-          groups	    function    pins (in pin#)</div><div class='add'>+          groups            function    pins (in pin#)</div><div class='ctx'>           ---------------------------------------------------------------------</div><div class='ctx'>           "watchdog"        "watchdog"  0</div><div class='ctx'>           "wifi_led"        "led"       1, 2</div><div class='ctx'>           "i2c"             "i2c"       3, 4</div><div class='ctx'>           "uart1_0"         "uart"      7, 8, 9, 10</div><div class='add'>+          "uart1_rx_tx"     "uart"      42, 43</div><div class='add'>+          "uart1_cts_rts"   "uart"      44, 45</div><div class='ctx'>           "pcie_clk"        "pcie"      9</div><div class='ctx'>           "pcie_wake"       "pcie"      10</div><div class='ctx'>           "spi1_0"          "spi"       11, 12, 13, 14</div><div class='hunk'>@@ -95,12 +97,15 @@ patternProperties:</div><div class='ctx'>           "pwm1_0"          "pwm"       22,</div><div class='ctx'>           "snfi"            "flash"     23, 24, 25, 26, 27, 28</div><div class='ctx'>           "spi1_2"          "spi"       29, 30, 31, 32</div><div class='del'>-          "emmc_45"         "emmc"      22, 23, 24, 25, 26, 27, 28, 29, 30,</div><div class='del'>-                                        31, 32</div><div class='add'>+          "emmc_45"         "emmc"      22, 23, 24, 25, 26, 27, 28, 29, 30, 31,</div><div class='add'>+                                        32</div><div class='add'>+</div><div class='ctx'>           "spi1_1"          "spi"       23, 24, 25, 26</div><div class='del'>-          "uart1_2"         "uart"      29, 30, 31, 32</div><div class='add'>+          "uart1_2_rx_tx"   "uart"      29, 30</div><div class='add'>+          "uart1_2_cts_rts" "uart"      31, 32</div><div class='ctx'>           "uart1_1"         "uart"      23, 24, 25, 26</div><div class='del'>-          "uart2_0"         "uart"      29, 30, 31, 32</div><div class='add'>+          "uart2_0_rx_tx"   "uart"      29, 30</div><div class='add'>+          "uart2_0_cts_rts" "uart"      31, 32</div><div class='ctx'>           "spi0"            "spi"       33, 34, 35, 36</div><div class='ctx'>           "spi0_wp_hold"    "spi"       37, 38</div><div class='ctx'>           "uart1_3_rx_tx"   "uart"      35, 36</div><div class='hunk'>@@ -111,28 +116,32 @@ patternProperties:</div><div class='ctx'>           "pcie_pereset"    "pcie"      41</div><div class='ctx'>           "uart1"           "uart"      42, 43, 44, 45</div><div class='ctx'>           "uart2"           "uart"      46, 47, 48, 49</div><div class='del'>-          "emmc_51"         "emmc"      50, 51, 52, 53, 54, 55, 56, 57, 57,</div><div class='del'>-                                        59, 60, 61</div><div class='add'>+          "emmc_51"         "emmc"      50, 51, 52, 53, 54, 55, 56, 57, 58, 59,</div><div class='add'>+                                        60, 61</div><div class='add'>+</div><div class='ctx'>           "pcm"             "audio"     62, 63, 64, 65</div><div class='ctx'>           "i2s"             "audio"     62, 63, 64, 65</div><div class='ctx'>           "switch_int"      "eth"       66</div><div class='ctx'>           "mdc_mdio"        "eth"       67</div><div class='add'>+          "wf_2g"           "wifi"      74, 75, 76, 77, 78, 79, 80, 81, 82, 83</div><div class='add'>+          "wf_5g"           "wifi"      91, 92, 93, 94, 95, 96, 97, 98, 99, 100</div><div class='add'>+          "wf_dbdc"         "wifi"      74, 75, 76, 77, 78, 79, 80, 81, 82, 83,</div><div class='add'>+                                        84, 85</div><div class='ctx'> </div><div class='del'>-        $ref: "/schemas/pinctrl/pinmux-node.yaml"</div><div class='add'>+        $ref: /schemas/pinctrl/pinmux-node.yaml</div><div class='ctx'>         properties:</div><div class='ctx'>           function:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               A string containing the name of the function to mux to the group.</div><div class='ctx'>               There is no "audio", "pcie" functions on mt7986b, you can only use</div><div class='ctx'>               those functions on mt7986a.</div><div class='ctx'>             enum: [audio, emmc, eth, i2c, led, flash, pcie, pwm, spi, uart,</div><div class='ctx'>                    watchdog, wifi]</div><div class='ctx'>           groups:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An array of strings. Each string contains the name of a group.</div><div class='del'>-              There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm",</div><div class='del'>-              and "i2s" groups on mt7986b, you can only use those groups on</div><div class='del'>-              mt7986a.</div><div class='add'>+              There is no "pcie_pereset", "uart1", "uart2" "emmc_51", "pcm", and</div><div class='add'>+              "i2s" groups on mt7986b, you can only use those groups on mt7986a.</div><div class='ctx'>         required:</div><div class='ctx'>           - function</div><div class='ctx'>           - groups</div><div class='hunk'>@@ -153,7 +162,7 @@ patternProperties:</div><div class='ctx'>             then:</div><div class='ctx'>               properties:</div><div class='ctx'>                 groups:</div><div class='del'>-                  enum: [emmc, emmc_rst]</div><div class='add'>+                  enum: [emmc_45, emmc_51]</div><div class='ctx'>           - if:</div><div class='ctx'>               properties:</div><div class='ctx'>                 function:</div><div class='hunk'>@@ -193,7 +202,9 @@ patternProperties:</div><div class='ctx'>             then:</div><div class='ctx'>               properties:</div><div class='ctx'>                 groups:</div><div class='del'>-                  enum: [pcie_clk, pcie_wake, pcie_pereset]</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [pcie_clk, pcie_wake, pcie_pereset]</div><div class='add'>+                  maxItems: 3</div><div class='ctx'>           - if:</div><div class='ctx'>               properties:</div><div class='ctx'>                 function:</div><div class='hunk'>@@ -201,7 +212,9 @@ patternProperties:</div><div class='ctx'>             then:</div><div class='ctx'>               properties:</div><div class='ctx'>                 groups:</div><div class='del'>-                  enum: [pwm0, pwm1_0, pwm1_1]</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [pwm0, pwm1_0, pwm1_1]</div><div class='add'>+                  maxItems: 2</div><div class='ctx'>           - if:</div><div class='ctx'>               properties:</div><div class='ctx'>                 function:</div><div class='hunk'>@@ -209,7 +222,9 @@ patternProperties:</div><div class='ctx'>             then:</div><div class='ctx'>               properties:</div><div class='ctx'>                 groups:</div><div class='del'>-                  enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3]</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3]</div><div class='add'>+                  maxItems: 2</div><div class='ctx'>           - if:</div><div class='ctx'>               properties:</div><div class='ctx'>                 function:</div><div class='hunk'>@@ -217,8 +232,12 @@ patternProperties:</div><div class='ctx'>             then:</div><div class='ctx'>               properties:</div><div class='ctx'>                 groups:</div><div class='del'>-                  enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx,</div><div class='del'>-                         uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2]</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1,</div><div class='add'>+                           uart1_2_rx_tx, uart1_2_cts_rts, uart1_3_rx_tx,</div><div class='add'>+                           uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts,</div><div class='add'>+                           uart2_1, uart0, uart1, uart2]</div><div class='add'>+                  maxItems: 2</div><div class='ctx'>           - if:</div><div class='ctx'>               properties:</div><div class='ctx'>                 function:</div><div class='hunk'>@@ -234,45 +253,64 @@ patternProperties:</div><div class='ctx'>             then:</div><div class='ctx'>               properties:</div><div class='ctx'>                 groups:</div><div class='del'>-                  enum: [wf_2g, wf_5g, wf_dbdc]</div><div class='del'>-      '.*conf.*':</div><div class='add'>+                  items:</div><div class='add'>+                    enum: [wf_2g, wf_5g, wf_dbdc]</div><div class='add'>+                  maxItems: 3</div><div class='add'>+      '^.*conf.*$':</div><div class='ctx'>         type: object</div><div class='ctx'>         additionalProperties: false</div><div class='del'>-        description: |</div><div class='add'>+        description:</div><div class='ctx'>           pinconf configuration nodes.</div><div class='del'>-        $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           pins:</div><div class='del'>-            description: |</div><div class='del'>-              An array of strings. Each string contains the name of a pin.</div><div class='del'>-              There is no PIN 41 to PIN 65 above on mt7686b, you can only use</div><div class='del'>-              those pins on mt7986a.</div><div class='del'>-            enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,</div><div class='del'>-                   GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,</div><div class='del'>-                   GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13, GPIO_14,</div><div class='del'>-                   GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI, SPI0_MISO, SPI0_CS,</div><div class='del'>-                   SPI0_HOLD, SPI0_WP, SPI1_CLK, SPI1_MOSI, SPI1_MISO, SPI1_CS,</div><div class='del'>-                   SPI2_CLK, SPI2_MOSI, SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP,</div><div class='del'>-                   UART0_RXD, UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD,</div><div class='del'>-                   UART1_CTS, UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS,</div><div class='del'>-                   UART2_RTS, EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2,</div><div class='del'>-                   EMMC_DATA_3, EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6,</div><div class='del'>-                   EMMC_DATA_7, EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX,</div><div class='del'>-                   PCM_DRX, PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,</div><div class='del'>-                   WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,</div><div class='del'>-                   WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,</div><div class='del'>-                   WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,</div><div class='del'>-                   WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,</div><div class='del'>-                   WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,</div><div class='del'>-                   WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,</div><div class='del'>-                   WF1_HB8]</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a pin. There</div><div class='add'>+              is no PIN 41 to PIN 65 above on mt7686b, you can only use those</div><div class='add'>+              pins on mt7986a.</div><div class='add'>+            items:</div><div class='add'>+              enum: [SYS_WATCHDOG, WF2G_LED, WF5G_LED, I2C_SCL, I2C_SDA, GPIO_0,</div><div class='add'>+                     GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, GPIO_6, GPIO_7,</div><div class='add'>+                     GPIO_8, GPIO_9, GPIO_10, GPIO_11, GPIO_12, GPIO_13,</div><div class='add'>+                     GPIO_14, GPIO_15, PWM0, PWM1, SPI0_CLK, SPI0_MOSI,</div><div class='add'>+                     SPI0_MISO, SPI0_CS, SPI0_HOLD, SPI0_WP, SPI1_CLK,</div><div class='add'>+                     SPI1_MOSI, SPI1_MISO, SPI1_CS, SPI2_CLK, SPI2_MOSI,</div><div class='add'>+                     SPI2_MISO, SPI2_CS, SPI2_HOLD, SPI2_WP, UART0_RXD,</div><div class='add'>+                     UART0_TXD, PCIE_PERESET_N, UART1_RXD, UART1_TXD, UART1_CTS,</div><div class='add'>+                     UART1_RTS, UART2_RXD, UART2_TXD, UART2_CTS, UART2_RTS,</div><div class='add'>+                     EMMC_DATA_0, EMMC_DATA_1, EMMC_DATA_2, EMMC_DATA_3,</div><div class='add'>+                     EMMC_DATA_4, EMMC_DATA_5, EMMC_DATA_6, EMMC_DATA_7,</div><div class='add'>+                     EMMC_CMD, EMMC_CK, EMMC_DSL, EMMC_RSTB, PCM_DTX, PCM_DRX,</div><div class='add'>+                     PCM_CLK, PCM_FS, MT7531_INT, SMI_MDC, SMI_MDIO,</div><div class='add'>+                     WF0_DIG_RESETB, WF0_CBA_RESETB, WF0_XO_REQ, WF0_TOP_CLK,</div><div class='add'>+                     WF0_TOP_DATA, WF0_HB1, WF0_HB2, WF0_HB3, WF0_HB4, WF0_HB0,</div><div class='add'>+                     WF0_HB0_B, WF0_HB5, WF0_HB6, WF0_HB7, WF0_HB8, WF0_HB9,</div><div class='add'>+                     WF0_HB10, WF1_DIG_RESETB, WF1_CBA_RESETB, WF1_XO_REQ,</div><div class='add'>+                     WF1_TOP_CLK, WF1_TOP_DATA, WF1_HB1, WF1_HB2, WF1_HB3,</div><div class='add'>+                     WF1_HB4, WF1_HB0, WF1_HB0_B, WF1_HB5, WF1_HB6, WF1_HB7,</div><div class='add'>+                     WF1_HB8]</div><div class='add'>+            maxItems: 101</div><div class='ctx'> </div><div class='ctx'>           bias-disable: true</div><div class='ctx'> </div><div class='del'>-          bias-pull-up: true</div><div class='del'>-</div><div class='del'>-          bias-pull-down: true</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+                description: normal pull up.</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description:</div><div class='add'>+                  PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in</div><div class='add'>+                  dt-bindings/pinctrl/mt65xx.h.</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+                description: normal pull down.</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description:</div><div class='add'>+                  PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in</div><div class='add'>+                  dt-bindings/pinctrl/mt65xx.h.</div><div class='ctx'> </div><div class='ctx'>           input-enable: true</div><div class='ctx'> </div><div class='hunk'>@@ -324,6 +362,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/mt65xx.h&gt;</div><div class='ctx'> </div><div class='ctx'>     soc {</div><div class='ctx'>       #address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -348,6 +387,27 @@ examples:</div><div class='ctx'>         interrupt-parent = &lt;&amp;gic&gt;;</div><div class='ctx'>         #interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='add'>+        pcie_pins: pcie-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "pcie";</div><div class='add'>+            groups = "pcie_clk", "pcie_wake", "pcie_pereset";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pwm_pins: pwm-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "pwm";</div><div class='add'>+            groups = "pwm0", "pwm1_0";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        spi0_pins: spi0-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "spi";</div><div class='add'>+            groups = "spi0", "spi0_wp_hold";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='ctx'>         uart1_pins: uart1-pins {</div><div class='ctx'>           mux {</div><div class='ctx'>             function = "uart";</div><div class='hunk'>@@ -355,6 +415,13 @@ examples:</div><div class='ctx'>           };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='add'>+        uart1_3_pins: uart1-3-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "uart";</div><div class='add'>+            groups = "uart1_3_rx_tx", "uart1_3_cts_rts";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='ctx'>         uart2_pins: uart2-pins {</div><div class='ctx'>           mux {</div><div class='ctx'>             function = "uart";</div><div class='hunk'>@@ -362,5 +429,34 @@ examples:</div><div class='ctx'>           };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='add'>+        mmc0_pins_default: mmc0-pins {</div><div class='add'>+          mux {</div><div class='add'>+            function = "emmc";</div><div class='add'>+            groups = "emmc_51";</div><div class='add'>+          };</div><div class='add'>+          conf-cmd-dat {</div><div class='add'>+            pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",</div><div class='add'>+                   "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",</div><div class='add'>+                   "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";</div><div class='add'>+            input-enable;</div><div class='add'>+            drive-strength = &lt;4&gt;;</div><div class='add'>+            bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;; /* pull-up 10K */</div><div class='add'>+          };</div><div class='add'>+          conf-clk {</div><div class='add'>+            pins = "EMMC_CK";</div><div class='add'>+            drive-strength = &lt;6&gt;;</div><div class='add'>+            bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;; /* pull-down 50K */</div><div class='add'>+          };</div><div class='add'>+          conf-ds {</div><div class='add'>+            pins = "EMMC_DSL";</div><div class='add'>+            bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;; /* pull-down 50K */</div><div class='add'>+          };</div><div class='add'>+          conf-rst {</div><div class='add'>+            pins = "EMMC_RSTB";</div><div class='add'>+            drive-strength = &lt;4&gt;;</div><div class='add'>+            bias-pull-up = &lt;MTK_PUPD_SET_R1R0_01&gt;; /* pull-up 10K */</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml<br/>index 2d13a57b8961..ff24cf29eea7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml</a></div><div class='hunk'>@@ -4,12 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT8183 Pin Controller Device Tree Bindings</div><div class='add'>+title: MediaTek MT8183 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sean Wang &lt;sean.wang@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |+</div><div class='add'>+description:</div><div class='ctx'>   The MediaTek's MT8183 Pin controller is used to control SoC pins.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -37,15 +37,15 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   "#gpio-cells":</div><div class='ctx'>     const: 2</div><div class='del'>-    description: |</div><div class='del'>-      Number of cells in GPIO specifier. Since the generic GPIO</div><div class='del'>-      binding is used, the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='ctx'> </div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 5</div><div class='del'>-    description: |</div><div class='add'>+    description:</div><div class='ctx'>       GPIO valid number range.</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='hunk'>@@ -57,7 +57,7 @@ properties:</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -67,25 +67,25 @@ required:</div><div class='ctx'>   - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-[0-9]+$':</div><div class='add'>+  '-pins(-[a-z]+)?$':</div><div class='ctx'>     type: object</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'>     patternProperties:</div><div class='del'>-      'pins':</div><div class='add'>+      '^pins':</div><div class='ctx'>         type: object</div><div class='ctx'>         additionalProperties: false</div><div class='del'>-        description: |</div><div class='add'>+        description:</div><div class='ctx'>           A pinctrl node should contain at least one subnodes representing the</div><div class='ctx'>           pinctrl groups available on the machine. Each subnode will list the</div><div class='ctx'>           pins it needs, and how they should be configured, with regard to muxer</div><div class='ctx'>           configuration, pullups, drive strength, input enable/disable and input</div><div class='ctx'>           schmitt.</div><div class='del'>-        $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           pinmux:</div><div class='ctx'>             description:</div><div class='del'>-              integer array, represents gpio pin number and mux setting.</div><div class='add'>+              Integer array, represents gpio pin number and mux setting.</div><div class='ctx'>               Supported pin number and mux varies for different SoCs, and are</div><div class='ctx'>               defined as macros in &lt;soc&gt;-pinfunc.h directly.</div><div class='ctx'> </div><div class='hunk'>@@ -110,8 +110,13 @@ patternProperties:</div><div class='ctx'>           drive-strength:</div><div class='ctx'>             enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='ctx'> </div><div class='add'>+          drive-strength-microamp:</div><div class='add'>+            enum: [125, 250, 500, 1000]</div><div class='add'>+</div><div class='ctx'>           mediatek,drive-strength-adv:</div><div class='add'>+            deprecated: true</div><div class='ctx'>             description: |</div><div class='add'>+              DEPRECATED: Please use drive-strength-microamp instead.</div><div class='ctx'>               Describe the specific driving setup property.</div><div class='ctx'>               For I2C pins, the existing generic driving setup can only support</div><div class='ctx'>               2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they</div><div class='hunk'>@@ -139,7 +144,8 @@ patternProperties:</div><div class='ctx'>           mediatek,pull-up-adv:</div><div class='ctx'>             description: |</div><div class='ctx'>               Pull up setings for 2 pull resistors, R0 and R1. User can</div><div class='del'>-              configure those special pins. Valid arguments are described as below:</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='ctx'>               0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='ctx'>               1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='ctx'>               2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='hunk'>@@ -150,7 +156,8 @@ patternProperties:</div><div class='ctx'>           mediatek,pull-down-adv:</div><div class='ctx'>             description: |</div><div class='ctx'>               Pull down settings for 2 pull resistors, R0 and R1. User can</div><div class='del'>-              configure those special pins. Valid arguments are described as below:</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='ctx'>               0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='ctx'>               1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='ctx'>               2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='hunk'>@@ -159,14 +166,14 @@ patternProperties:</div><div class='ctx'>             enum: [0, 1, 2, 3]</div><div class='ctx'> </div><div class='ctx'>           mediatek,tdsel:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An integer describing the steps for output level shifter duty</div><div class='ctx'>               cycle when asserted (high pulse width adjustment). Valid arguments</div><div class='ctx'>               are from 0 to 15.</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>           mediatek,rdsel:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               An integer describing the steps for input level shifter duty cycle</div><div class='ctx'>               when asserted (high pulse width adjustment). Valid arguments are</div><div class='ctx'>               from 0 to 63.</div><div class='hunk'>@@ -210,21 +217,20 @@ examples:</div><div class='ctx'>           interrupts = &lt;GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>           #interrupt-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-          i2c0_pins_a: i2c-0 {</div><div class='add'>+          i2c0_pins_a: i2c0-pins {</div><div class='ctx'>             pins1 {</div><div class='ctx'>               pinmux = &lt;PINMUX_GPIO48__FUNC_SCL5&gt;,</div><div class='ctx'>                 &lt;PINMUX_GPIO49__FUNC_SDA5&gt;;</div><div class='ctx'>               mediatek,pull-up-adv = &lt;3&gt;;</div><div class='del'>-              mediatek,drive-strength-adv = &lt;7&gt;;</div><div class='add'>+              drive-strength-microamp = &lt;1000&gt;;</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='del'>-          i2c1_pins_a: i2c-1 {</div><div class='add'>+          i2c1_pins_a: i2c1-pins {</div><div class='ctx'>             pins {</div><div class='ctx'>               pinmux = &lt;PINMUX_GPIO50__FUNC_SCL3&gt;,</div><div class='ctx'>                 &lt;PINMUX_GPIO51__FUNC_SDA3&gt;;</div><div class='ctx'>               mediatek,pull-down-adv = &lt;2&gt;;</div><div class='del'>-              mediatek,drive-strength-adv = &lt;4&gt;;</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml<br/>index 8a2bb8608291..69136ddd0bbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml</a></div><div class='hunk'>@@ -1,16 +1,16 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8186.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT8186 Pin Controller</div><div class='add'>+title: MediaTek MT8186 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  The Mediatek's Pin controller is used to control SoC pins.</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT8186 Pin controller is used to control SoC pins.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -19,32 +19,34 @@ properties:</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='ctx'>   '#gpio-cells':</div><div class='del'>-    description: |</div><div class='add'>+    description:</div><div class='ctx'>       Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='del'>-      the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='del'>-    description: |</div><div class='del'>-      Physical address base for gpio base registers. There are 8 different GPIO</div><div class='add'>+    description:</div><div class='add'>+      Physical address base for GPIO base registers. There are 8 different GPIO</div><div class='ctx'>       physical address base in mt8186.</div><div class='ctx'>     maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='del'>-    description: |</div><div class='del'>-      Gpio base register names.</div><div class='add'>+    description:</div><div class='add'>+      GPIO base register names.</div><div class='ctx'>     items:</div><div class='ctx'>       - const: iocfg0</div><div class='del'>-      - const: iocfg_bm</div><div class='del'>-      - const: iocfg_bl</div><div class='del'>-      - const: iocfg_br</div><div class='add'>+      - const: iocfg_lt</div><div class='ctx'>       - const: iocfg_lm</div><div class='add'>+      - const: iocfg_lb</div><div class='add'>+      - const: iocfg_bl</div><div class='ctx'>       - const: iocfg_rb</div><div class='del'>-      - const: iocfg_tl</div><div class='add'>+      - const: iocfg_rt</div><div class='ctx'>       - const: eint</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='hunk'>@@ -58,9 +60,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   mediatek,rsel-resistance-in-si-unit:</div><div class='ctx'>     type: boolean</div><div class='del'>-    description: |</div><div class='del'>-      Identifying i2c pins pull up/down type which is RSEL. It can support</div><div class='del'>-      RSEL define or si unit value(ohm) to set different resistance.</div><div class='add'>+    description:</div><div class='add'>+      Identifying i2c pins pull up/down type which is RSEL. It can support RSEL</div><div class='add'>+      define or si unit value(ohm) to set different resistance.</div><div class='ctx'> </div><div class='ctx'> # PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='hunk'>@@ -75,8 +77,8 @@ patternProperties:</div><div class='ctx'>           A pinctrl node should contain at least one subnodes representing the</div><div class='ctx'>           pinctrl groups available on the machine. Each subnode will list the</div><div class='ctx'>           pins it needs, and how they should be configured, with regard to muxer</div><div class='del'>-          configuration, pullups, drive strength, input enable/disable and</div><div class='del'>-          input schmitt.</div><div class='add'>+          configuration, pullups, drive strength, input enable/disable and input</div><div class='add'>+          schmitt.</div><div class='ctx'>           An example of using macro:</div><div class='ctx'>           pincontroller {</div><div class='ctx'>             /* GPIO0 set as multifunction GPIO0 */</div><div class='hunk'>@@ -92,44 +94,20 @@ patternProperties:</div><div class='ctx'>               }</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='del'>-        $ref: "pinmux-node.yaml"</div><div class='add'>+        $ref: pinmux-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           pinmux:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               Integer array, represents gpio pin number and mux setting.</div><div class='ctx'>               Supported pin number and mux varies for different SoCs, and are</div><div class='del'>-              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h</div><div class='del'>-              directly.</div><div class='add'>+              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h directly.</div><div class='ctx'> </div><div class='ctx'>           drive-strength:</div><div class='ctx'>             enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='ctx'> </div><div class='del'>-          mediatek,drive-strength-adv:</div><div class='del'>-            description: |</div><div class='del'>-              Describe the specific driving setup property.</div><div class='del'>-              For I2C pins, the existing generic driving setup can only support</div><div class='del'>-              2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they</div><div class='del'>-              can support 0.125/0.25/0.5/1mA adjustment. If we enable specific</div><div class='del'>-              driving setup, the existing generic setup will be disabled.</div><div class='del'>-              The specific driving setup is controlled by E1E0EN.</div><div class='del'>-              When E1=0/E0=0, the strength is 0.125mA.</div><div class='del'>-              When E1=0/E0=1, the strength is 0.25mA.</div><div class='del'>-              When E1=1/E0=0, the strength is 0.5mA.</div><div class='del'>-              When E1=1/E0=1, the strength is 1mA.</div><div class='del'>-              EN is used to enable or disable the specific driving setup.</div><div class='del'>-              Valid arguments are described as below:</div><div class='del'>-              0: (E1, E0, EN) = (0, 0, 0)</div><div class='del'>-              1: (E1, E0, EN) = (0, 0, 1)</div><div class='del'>-              2: (E1, E0, EN) = (0, 1, 0)</div><div class='del'>-              3: (E1, E0, EN) = (0, 1, 1)</div><div class='del'>-              4: (E1, E0, EN) = (1, 0, 0)</div><div class='del'>-              5: (E1, E0, EN) = (1, 0, 1)</div><div class='del'>-              6: (E1, E0, EN) = (1, 1, 0)</div><div class='del'>-              7: (E1, E0, EN) = (1, 1, 1)</div><div class='del'>-              So the valid arguments are from 0 to 7.</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            enum: [0, 1, 2, 3, 4, 5, 6, 7]</div><div class='add'>+          drive-strength-microamp:</div><div class='add'>+            enum: [125, 250, 500, 1000]</div><div class='ctx'> </div><div class='ctx'>           bias-pull-down:</div><div class='ctx'>             oneOf:</div><div class='hunk'>@@ -150,10 +128,10 @@ patternProperties:</div><div class='ctx'>               For pull down type is RSEL, it can add RSEL define &amp; resistance</div><div class='ctx'>               value(ohm) to set different resistance by identifying property</div><div class='ctx'>               "mediatek,rsel-resistance-in-si-unit".</div><div class='del'>-              It can support "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001"</div><div class='del'>-              &amp; "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011"</div><div class='del'>-              define in mt8186. It can also support resistance value(ohm)</div><div class='del'>-              "75000" &amp; "5000" in mt8186.</div><div class='add'>+              It can support "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011" define in</div><div class='add'>+              mt8186. It can also support resistance value(ohm) "75000" &amp; "5000"</div><div class='add'>+              in mt8186.</div><div class='ctx'>               An example of using RSEL define:</div><div class='ctx'>               pincontroller {</div><div class='ctx'>                 i2c0_pin {</div><div class='hunk'>@@ -195,10 +173,10 @@ patternProperties:</div><div class='ctx'>               For pull up type is RSEL, it can add RSEL define &amp; resistance</div><div class='ctx'>               value(ohm) to set different resistance by identifying property</div><div class='ctx'>               "mediatek,rsel-resistance-in-si-unit".</div><div class='del'>-              It can support "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001"</div><div class='del'>-              &amp; "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011"</div><div class='del'>-              define in mt8186. It can also support resistance value(ohm)</div><div class='del'>-              "1000" &amp; "5000" &amp; "10000" &amp; "75000" in mt8186.</div><div class='add'>+              It can support "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011" define in</div><div class='add'>+              mt8186. It can also support resistance value(ohm) "1000" &amp; "5000"</div><div class='add'>+              &amp; "10000" &amp; "75000" in mt8186.</div><div class='ctx'>               An example of using si unit resistance value(ohm):</div><div class='ctx'>               &amp;pio {</div><div class='ctx'>                 mediatek,rsel-resistance-in-si-unit;</div><div class='hunk'>@@ -256,9 +234,9 @@ examples:</div><div class='ctx'>             &lt;0x10002A00 0x0200&gt;,</div><div class='ctx'>             &lt;0x10002c00 0x0200&gt;,</div><div class='ctx'>             &lt;0x1000b000 0x1000&gt;;</div><div class='del'>-      reg-names = "iocfg0", "iocfg_bm", "iocfg_bl",</div><div class='del'>-                  "iocfg_br", "iocfg_lm", "iocfg_rb",</div><div class='del'>-                  "iocfg_tl", "eint";</div><div class='add'>+      reg-names = "iocfg0", "iocfg_lt", "iocfg_lm",</div><div class='add'>+                  "iocfg_lb", "iocfg_bl", "iocfg_rb",</div><div class='add'>+                  "iocfg_rt", "eint";</div><div class='ctx'>       gpio-controller;</div><div class='ctx'>       #gpio-cells = &lt;2&gt;;</div><div class='ctx'>       gpio-ranges = &lt;&amp;pio 0 0 185&gt;;</div><div class='hunk'>@@ -291,7 +269,7 @@ examples:</div><div class='ctx'>           pinmux = &lt;PINMUX_GPIO127__FUNC_SCL0&gt;,</div><div class='ctx'>                    &lt;PINMUX_GPIO128__FUNC_SDA0&gt;;</div><div class='ctx'>           bias-pull-up = &lt;MTK_PULL_SET_RSEL_001&gt;;</div><div class='del'>-          mediatek,drive-strength-adv = &lt;7&gt;;</div><div class='add'>+          drive-strength-microamp = &lt;1000&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..e994b0c70dbf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,232 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT8188 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hui Liu &lt;hui.liu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT8188 Pin controller is used to control SoC pins.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8188-pinctrl</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier, should be two. The first cell is the</div><div class='add'>+      pin number, the second cell is used to specify optional parameters which</div><div class='add'>+      are defined in &lt;dt-bindings/gpio/gpio.h&gt;.</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: gpio registers base address</div><div class='add'>+      - description: rm group io configuration registers base address</div><div class='add'>+      - description: lt group io configuration registers base address</div><div class='add'>+      - description: lm group io configuration registers base address</div><div class='add'>+      - description: rt group io configuration registers base address</div><div class='add'>+      - description: eint registers base address</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iocfg0</div><div class='add'>+      - const: iocfg_rm</div><div class='add'>+      - const: iocfg_lt</div><div class='add'>+      - const: iocfg_lm</div><div class='add'>+      - const: iocfg_rt</div><div class='add'>+      - const: eint</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: The interrupt outputs to sysirq.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,rsel-resistance-in-si-unit:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      We provide two methods to select the resistance for I2C when pull up or</div><div class='add'>+      pull down. The first is by RSEL definition value, another one is by</div><div class='add'>+      resistance value(ohm). This flag is used to identify if the method is</div><div class='add'>+      resistance(si unit) value.</div><div class='add'>+</div><div class='add'>+# PIN CONFIGURATION NODES</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^pins':</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description:</div><div class='add'>+          A pinctrl node should contain at least one subnode representing the</div><div class='add'>+          pinctrl groups available on the machine. Each subnode will list the</div><div class='add'>+          pins it needs, and how they should be configured, with regard to muxer</div><div class='add'>+          configuration, pullups, drive strength, input enable/disable and input</div><div class='add'>+          schmitt.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pinmux:</div><div class='add'>+            description:</div><div class='add'>+              Integer array, represents gpio pin number and mux setting.</div><div class='add'>+              Supported pin number and mux varies for different SoCs, and are</div><div class='add'>+              defined as macros in dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h</div><div class='add'>+              directly, for this SoC.</div><div class='add'>+</div><div class='add'>+          drive-strength:</div><div class='add'>+            enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+</div><div class='add'>+          drive-strength-microamp:</div><div class='add'>+            enum: [125, 250, 500, 1000]</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: mt8188 pull down PUPD/R0/R1 type define value.</div><div class='add'>+              - enum: [200, 201, 202, 203, 204, 205, 206, 207]</div><div class='add'>+                description: mt8188 pull down RSEL type define value.</div><div class='add'>+              - enum: [75000, 5000]</div><div class='add'>+                description: mt8188 pull down RSEL type si unit value(ohm).</div><div class='add'>+            description: |</div><div class='add'>+              For pull down type is normal, it doesn't need add RSEL &amp; R1R0</div><div class='add'>+              define and resistance value.</div><div class='add'>+              For pull down type is PUPD/R0/R1 type, it can add R1R0 define to</div><div class='add'>+              set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &amp;</div><div class='add'>+              "MTK_PUPD_SET_R1R0_01" &amp; "MTK_PUPD_SET_R1R0_10" &amp;</div><div class='add'>+              "MTK_PUPD_SET_R1R0_11" define in mt8188.</div><div class='add'>+              For pull down type is RSEL, it can add RSEL define &amp; resistance</div><div class='add'>+              value(ohm) to set different resistance by identifying property</div><div class='add'>+              "mediatek,rsel-resistance-in-si-unit". It can support</div><div class='add'>+              "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_100" &amp; "MTK_PULL_SET_RSEL_101" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_110" &amp; "MTK_PULL_SET_RSEL_111" define in</div><div class='add'>+              mt8188. It can also support resistance value(ohm) "75000" &amp; "5000"</div><div class='add'>+              in mt8188.</div><div class='add'>+</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: mt8188 pull up PUPD/R0/R1 type define value.</div><div class='add'>+              - enum: [200, 201, 202, 203, 204, 205, 206, 207]</div><div class='add'>+                description: mt8188 pull up RSEL type define value.</div><div class='add'>+              - enum: [1000, 1500, 2000, 3000, 4000, 5000, 10000, 75000]</div><div class='add'>+                description: mt8188 pull up RSEL type si unit value(ohm).</div><div class='add'>+            description: |</div><div class='add'>+              For pull up type is normal, it don't need add RSEL &amp; R1R0 define</div><div class='add'>+              and resistance value.</div><div class='add'>+              For pull up type is PUPD/R0/R1 type, it can add R1R0 define to set</div><div class='add'>+              different resistance. It can support "MTK_PUPD_SET_R1R0_00" &amp;</div><div class='add'>+              "MTK_PUPD_SET_R1R0_01" &amp; "MTK_PUPD_SET_R1R0_10" &amp;</div><div class='add'>+              "MTK_PUPD_SET_R1R0_11" define in mt8188.</div><div class='add'>+              For pull up type is RSEL, it can add RSEL define &amp; resistance</div><div class='add'>+              value(ohm) to set different resistance by identifying property</div><div class='add'>+              "mediatek,rsel-resistance-in-si-unit". It can support</div><div class='add'>+              "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_100" &amp; "MTK_PULL_SET_RSEL_101" &amp;</div><div class='add'>+              "MTK_PULL_SET_RSEL_110" &amp; "MTK_PULL_SET_RSEL_111" define in</div><div class='add'>+              mt8188. It can also support resistance value(ohm) "1000" &amp; "1500"</div><div class='add'>+              &amp; "2000" &amp; "3000" &amp; "4000" &amp; "5000" &amp; "10000" &amp; "75000" in mt8188.</div><div class='add'>+</div><div class='add'>+          bias-disable: true</div><div class='add'>+</div><div class='add'>+          output-high: true</div><div class='add'>+</div><div class='add'>+          output-low: true</div><div class='add'>+</div><div class='add'>+          input-enable: true</div><div class='add'>+</div><div class='add'>+          input-disable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-enable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-disable: true</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - pinmux</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pio: pinctrl@10005000 {</div><div class='add'>+        compatible = "mediatek,mt8188-pinctrl";</div><div class='add'>+        reg = &lt;0x10005000 0x1000&gt;,</div><div class='add'>+              &lt;0x11c00000 0x1000&gt;,</div><div class='add'>+              &lt;0x11e10000 0x1000&gt;,</div><div class='add'>+              &lt;0x11e20000 0x1000&gt;,</div><div class='add'>+              &lt;0x11ea0000 0x1000&gt;,</div><div class='add'>+              &lt;0x1000b000 0x1000&gt;;</div><div class='add'>+        reg-names = "iocfg0", "iocfg_rm",</div><div class='add'>+                    "iocfg_lt", "iocfg_lm", "iocfg_rt",</div><div class='add'>+                    "eint";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;pio 0 0 176&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        interrupts = &lt;GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pio-pins {</div><div class='add'>+            pins {</div><div class='add'>+                pinmux = &lt;PINMUX_GPIO0__FUNC_B_GPIO0&gt;;</div><div class='add'>+                output-low;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        spi0-pins {</div><div class='add'>+            pins-spi {</div><div class='add'>+                pinmux = &lt;PINMUX_GPIO75__FUNC_O_SPIM1_CSB&gt;,</div><div class='add'>+                         &lt;PINMUX_GPIO76__FUNC_O_SPIM1_CLK&gt;,</div><div class='add'>+                         &lt;PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI&gt;;</div><div class='add'>+                drive-strength = &lt;6&gt;;</div><div class='add'>+            };</div><div class='add'>+            pins-spi-mi {</div><div class='add'>+                pinmux = &lt;PINMUX_GPIO78__FUNC_B0_SPIM1_MISO&gt;;</div><div class='add'>+                bias-pull-down = &lt;MTK_PUPD_SET_R1R0_10&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        i2c0-pins {</div><div class='add'>+            pins {</div><div class='add'>+                pinmux = &lt;PINMUX_GPIO55__FUNC_B1_SCL0&gt;,</div><div class='add'>+                         &lt;PINMUX_GPIO56__FUNC_B1_SDA0&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+                drive-strength-microamp = &lt;1000&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..1686427eb854<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,184 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT8192 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT8192 Pin controller is used to control SoC pins.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8192-pinctrl</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    description: GPIO valid number range.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      Physical address base for GPIO base registers. There are 11 GPIO physical</div><div class='add'>+      address base in mt8192.</div><div class='add'>+    maxItems: 11</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    description:</div><div class='add'>+      GPIO base register names.</div><div class='add'>+    maxItems: 11</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: The interrupt outputs to sysirq.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+# PIN CONFIGURATION NODES</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^pins':</div><div class='add'>+        type: object</div><div class='add'>+        description:</div><div class='add'>+          A pinctrl node should contain at least one subnodes representing the</div><div class='add'>+          pinctrl groups available on the machine. Each subnode will list the</div><div class='add'>+          pins it needs, and how they should be configured, with regard to muxer</div><div class='add'>+          configuration, pullups, drive strength, input enable/disable and input</div><div class='add'>+          schmitt.</div><div class='add'>+        $ref: pinmux-node.yaml</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pinmux:</div><div class='add'>+            description:</div><div class='add'>+              Integer array, represents gpio pin number and mux setting.</div><div class='add'>+              Supported pin number and mux varies for different SoCs, and are</div><div class='add'>+              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h directly.</div><div class='add'>+</div><div class='add'>+          drive-strength:</div><div class='add'>+            description:</div><div class='add'>+              It can support some arguments, such as MTK_DRIVE_4mA,</div><div class='add'>+              MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h. It can only</div><div class='add'>+              support 2/4/6/8/10/12/14/16mA in mt8192.</div><div class='add'>+            enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+</div><div class='add'>+          drive-strength-microamp:</div><div class='add'>+            enum: [125, 250, 500, 1000]</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+                description: normal pull down.</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_</div><div class='add'>+                  defines in dt-bindings/pinctrl/mt65xx.h.</div><div class='add'>+              - enum: [200, 201, 202, 203]</div><div class='add'>+                description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines</div><div class='add'>+                  in dt-bindings/pinctrl/mt65xx.h.</div><div class='add'>+</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+                description: normal pull up.</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_</div><div class='add'>+                  defines in dt-bindings/pinctrl/mt65xx.h.</div><div class='add'>+              - enum: [200, 201, 202, 203]</div><div class='add'>+                description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines</div><div class='add'>+                  in dt-bindings/pinctrl/mt65xx.h.</div><div class='add'>+</div><div class='add'>+          bias-disable: true</div><div class='add'>+</div><div class='add'>+          output-high: true</div><div class='add'>+</div><div class='add'>+          output-low: true</div><div class='add'>+</div><div class='add'>+          input-enable: true</div><div class='add'>+</div><div class='add'>+          input-disable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-enable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-disable: true</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - pinmux</div><div class='add'>+</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+            #include &lt;dt-bindings/pinctrl/mt8192-pinfunc.h&gt;</div><div class='add'>+            #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+            pio: pinctrl@10005000 {</div><div class='add'>+                    compatible = "mediatek,mt8192-pinctrl";</div><div class='add'>+                    reg = &lt;0x10005000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11c20000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11d10000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11d30000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11d40000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11e20000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11e70000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11ea0000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11f20000 0x1000&gt;,</div><div class='add'>+                          &lt;0x11f30000 0x1000&gt;,</div><div class='add'>+                          &lt;0x1000b000 0x1000&gt;;</div><div class='add'>+                    reg-names = "iocfg0", "iocfg_rm", "iocfg_bm",</div><div class='add'>+                          "iocfg_bl", "iocfg_br", "iocfg_lm",</div><div class='add'>+                          "iocfg_lb", "iocfg_rt", "iocfg_lt",</div><div class='add'>+                          "iocfg_tl", "eint";</div><div class='add'>+                    gpio-controller;</div><div class='add'>+                    #gpio-cells = &lt;2&gt;;</div><div class='add'>+                    gpio-ranges = &lt;&amp;pio 0 0 220&gt;;</div><div class='add'>+                    interrupt-controller;</div><div class='add'>+                    interrupts = &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+                    #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                    spi1-default-pins {</div><div class='add'>+                            pins-cs-mosi-clk {</div><div class='add'>+                                    pinmux = &lt;PINMUX_GPIO157__FUNC_SPI1_A_CSB&gt;,</div><div class='add'>+                                             &lt;PINMUX_GPIO159__FUNC_SPI1_A_MO&gt;,</div><div class='add'>+                                             &lt;PINMUX_GPIO156__FUNC_SPI1_A_CLK&gt;;</div><div class='add'>+                                    bias-disable;</div><div class='add'>+                            };</div><div class='add'>+</div><div class='add'>+                            pins-miso {</div><div class='add'>+                                    pinmux = &lt;PINMUX_GPIO158__FUNC_SPI1_A_MI&gt;;</div><div class='add'>+                                    bias-pull-down;</div><div class='add'>+                            };</div><div class='add'>+                    };</div><div class='add'>+            };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml<br/>index c5b755514c46..33cb71775db9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml</a></div><div class='hunk'>@@ -1,16 +1,16 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8195.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT8195 Pin Controller</div><div class='add'>+title: MediaTek MT8195 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  The Mediatek's Pin controller is used to control SoC pins.</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT8195 Pin controller is used to control SoC pins.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -19,25 +19,27 @@ properties:</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='ctx'>   '#gpio-cells':</div><div class='del'>-    description: |</div><div class='add'>+    description:</div><div class='ctx'>       Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='del'>-      the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='ctx'>   gpio-ranges:</div><div class='del'>-    description: gpio valid number range.</div><div class='add'>+    description: GPIO valid number range.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  gpio-line-names: true</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='del'>-    description: |</div><div class='del'>-      Physical address base for gpio base registers. There are 8 GPIO</div><div class='del'>-      physical address base in mt8195.</div><div class='add'>+    description:</div><div class='add'>+      Physical address base for GPIO base registers. There are 8 GPIO physical</div><div class='add'>+      address base in mt8195.</div><div class='ctx'>     maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='del'>-    description: |</div><div class='del'>-      Gpio base register names.</div><div class='add'>+    description:</div><div class='add'>+      GPIO base register names.</div><div class='ctx'>     maxItems: 8</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='hunk'>@@ -49,11 +51,11 @@ properties:</div><div class='ctx'>     description: The interrupt outputs to sysirq.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  mediatek,rsel_resistance_in_si_unit:</div><div class='add'>+  mediatek,rsel-resistance-in-si-unit:</div><div class='ctx'>     type: boolean</div><div class='del'>-    description: |</div><div class='del'>-      Identifying i2c pins pull up/down type which is RSEL. It can support</div><div class='del'>-      RSEL define or si unit value(ohm) to set different resistance.</div><div class='add'>+    description:</div><div class='add'>+      Identifying i2c pins pull up/down type which is RSEL. It can support RSEL</div><div class='add'>+      define or si unit value(ohm) to set different resistance.</div><div class='ctx'> </div><div class='ctx'> # PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='hunk'>@@ -68,8 +70,8 @@ patternProperties:</div><div class='ctx'>           A pinctrl node should contain at least one subnodes representing the</div><div class='ctx'>           pinctrl groups available on the machine. Each subnode will list the</div><div class='ctx'>           pins it needs, and how they should be configured, with regard to muxer</div><div class='del'>-          configuration, pullups, drive strength, input enable/disable and</div><div class='del'>-          input schmitt.</div><div class='add'>+          configuration, pullups, drive strength, input enable/disable and input</div><div class='add'>+          schmitt.</div><div class='ctx'>           An example of using macro:</div><div class='ctx'>           pincontroller {</div><div class='ctx'>             /* GPIO0 set as multifunction GPIO0 */</div><div class='hunk'>@@ -85,44 +87,20 @@ patternProperties:</div><div class='ctx'>               }</div><div class='ctx'>             };</div><div class='ctx'>           };</div><div class='del'>-        $ref: "pinmux-node.yaml"</div><div class='add'>+        $ref: pinmux-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           pinmux:</div><div class='del'>-            description: |</div><div class='add'>+            description:</div><div class='ctx'>               Integer array, represents gpio pin number and mux setting.</div><div class='ctx'>               Supported pin number and mux varies for different SoCs, and are</div><div class='del'>-              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h</div><div class='del'>-              directly.</div><div class='add'>+              defined as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h directly.</div><div class='ctx'> </div><div class='ctx'>           drive-strength:</div><div class='ctx'>             enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='ctx'> </div><div class='del'>-          mediatek,drive-strength-adv:</div><div class='del'>-            description: |</div><div class='del'>-              Describe the specific driving setup property.</div><div class='del'>-              For I2C pins, the existing generic driving setup can only support</div><div class='del'>-              2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they</div><div class='del'>-              can support 0.125/0.25/0.5/1mA adjustment. If we enable specific</div><div class='del'>-              driving setup, the existing generic setup will be disabled.</div><div class='del'>-              The specific driving setup is controlled by E1E0EN.</div><div class='del'>-              When E1=0/E0=0, the strength is 0.125mA.</div><div class='del'>-              When E1=0/E0=1, the strength is 0.25mA.</div><div class='del'>-              When E1=1/E0=0, the strength is 0.5mA.</div><div class='del'>-              When E1=1/E0=1, the strength is 1mA.</div><div class='del'>-              EN is used to enable or disable the specific driving setup.</div><div class='del'>-              Valid arguments are described as below:</div><div class='del'>-              0: (E1, E0, EN) = (0, 0, 0)</div><div class='del'>-              1: (E1, E0, EN) = (0, 0, 1)</div><div class='del'>-              2: (E1, E0, EN) = (0, 1, 0)</div><div class='del'>-              3: (E1, E0, EN) = (0, 1, 1)</div><div class='del'>-              4: (E1, E0, EN) = (1, 0, 0)</div><div class='del'>-              5: (E1, E0, EN) = (1, 0, 1)</div><div class='del'>-              6: (E1, E0, EN) = (1, 1, 0)</div><div class='del'>-              7: (E1, E0, EN) = (1, 1, 1)</div><div class='del'>-              So the valid arguments are from 0 to 7.</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-            enum: [0, 1, 2, 3, 4, 5, 6, 7]</div><div class='add'>+          drive-strength-microamp:</div><div class='add'>+            enum: [125, 250, 500, 1000]</div><div class='ctx'> </div><div class='ctx'>           bias-pull-down:</div><div class='ctx'>             oneOf:</div><div class='hunk'>@@ -142,7 +120,7 @@ patternProperties:</div><div class='ctx'>               "MTK_PUPD_SET_R1R0_11" define in mt8195.</div><div class='ctx'>               For pull down type is RSEL, it can add RSEL define &amp; resistance</div><div class='ctx'>               value(ohm) to set different resistance by identifying property</div><div class='del'>-              "mediatek,rsel_resistance_in_si_unit".</div><div class='add'>+              "mediatek,rsel-resistance-in-si-unit".</div><div class='ctx'>               It can support "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001"</div><div class='ctx'>               &amp; "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011"</div><div class='ctx'>               &amp; "MTK_PULL_SET_RSEL_100" &amp; "MTK_PULL_SET_RSEL_101"</div><div class='hunk'>@@ -161,7 +139,7 @@ patternProperties:</div><div class='ctx'>               };</div><div class='ctx'>               An example of using si unit resistance value(ohm):</div><div class='ctx'>               &amp;pio {</div><div class='del'>-                mediatek,rsel_resistance_in_si_unit;</div><div class='add'>+                mediatek,rsel-resistance-in-si-unit;</div><div class='ctx'>               }</div><div class='ctx'>               pincontroller {</div><div class='ctx'>                 i2c0_pin {</div><div class='hunk'>@@ -190,14 +168,14 @@ patternProperties:</div><div class='ctx'>               "MTK_PUPD_SET_R1R0_11" define in mt8195.</div><div class='ctx'>               For pull up type is RSEL, it can add RSEL define &amp; resistance</div><div class='ctx'>               value(ohm) to set different resistance by identifying property</div><div class='del'>-              "mediatek,rsel_resistance_in_si_unit".</div><div class='add'>+              "mediatek,rsel-resistance-in-si-unit".</div><div class='ctx'>               It can support "MTK_PULL_SET_RSEL_000" &amp; "MTK_PULL_SET_RSEL_001"</div><div class='ctx'>               &amp; "MTK_PULL_SET_RSEL_010" &amp; "MTK_PULL_SET_RSEL_011"</div><div class='ctx'>               &amp; "MTK_PULL_SET_RSEL_100" &amp; "MTK_PULL_SET_RSEL_101"</div><div class='ctx'>               &amp; "MTK_PULL_SET_RSEL_110" &amp; "MTK_PULL_SET_RSEL_111"</div><div class='del'>-              define in mt8195. It can also support resistance value(ohm)</div><div class='del'>-              "1000" &amp; "1500" &amp; "2000" &amp; "3000" &amp; "4000" &amp; "5000" &amp; "10000" &amp;</div><div class='del'>-              "75000" in mt8195.</div><div class='add'>+              define in mt8195. It can also support resistance value(ohm) "1000"</div><div class='add'>+              &amp; "1500" &amp; "2000" &amp; "3000" &amp; "4000" &amp; "5000" &amp; "10000" &amp; "75000"</div><div class='add'>+              in mt8195.</div><div class='ctx'>               An example of using RSEL define:</div><div class='ctx'>               pincontroller {</div><div class='ctx'>                 i2c0-pins {</div><div class='hunk'>@@ -209,7 +187,7 @@ patternProperties:</div><div class='ctx'>               };</div><div class='ctx'>               An example of using si unit resistance value(ohm):</div><div class='ctx'>               &amp;pio {</div><div class='del'>-                mediatek,rsel_resistance_in_si_unit;</div><div class='add'>+                mediatek,rsel-resistance-in-si-unit;</div><div class='ctx'>               }</div><div class='ctx'>               pincontroller {</div><div class='ctx'>                 i2c0-pins {</div><div class='hunk'>@@ -238,7 +216,7 @@ patternProperties:</div><div class='ctx'>           - pinmux</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -302,7 +280,7 @@ examples:</div><div class='ctx'>           pinmux = &lt;PINMUX_GPIO8__FUNC_SDA0&gt;,</div><div class='ctx'>                    &lt;PINMUX_GPIO9__FUNC_SCL0&gt;;</div><div class='ctx'>           bias-disable;</div><div class='del'>-          mediatek,drive-strength-adv = &lt;7&gt;;</div><div class='add'>+          drive-strength-microamp = &lt;1000&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..61b33b5416f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,230 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT8365 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Zhiyong Tao &lt;zhiyong.tao@mediatek.com&gt;</div><div class='add'>+  - Bernhard Rosenkränzer &lt;bero@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek's MT8365 Pin controller is used to control SoC pins.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8365-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,pctl-regmap:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      Should be phandles of the syscfg node.</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    const: 2</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='add'>+      the amount of cells must be specified as 2. See the below mentioned gpio</div><div class='add'>+      binding representation for description of particular cells.</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-pins$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "pins$":</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description:</div><div class='add'>+          A pinctrl node should contain at least one subnode representing the</div><div class='add'>+          pinctrl groups available on the machine. Each subnode will list the</div><div class='add'>+          pins it needs, and how they should be configured, with regard to muxer</div><div class='add'>+          configuration, pullups, drive strength, input enable/disable and input</div><div class='add'>+          schmitt.</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pinmux:</div><div class='add'>+            description:</div><div class='add'>+              Integer array, represents gpio pin number and mux setting.</div><div class='add'>+              Supported pin number and mux varies for different SoCs, and are</div><div class='add'>+              defined as macros in &lt;soc&gt;-pinfunc.h directly.</div><div class='add'>+</div><div class='add'>+          bias-disable: true</div><div class='add'>+</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: Pull up R1/R0 type define value.</div><div class='add'>+            description: |</div><div class='add'>+              For pull up type is normal, it don't need add R1/R0 define.</div><div class='add'>+              For pull up type is R1/R0 type, it can add value to set different</div><div class='add'>+              resistance. Valid arguments are described as below:</div><div class='add'>+              100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: boolean</div><div class='add'>+              - enum: [100, 101, 102, 103]</div><div class='add'>+                description: Pull down R1/R0 type define value.</div><div class='add'>+            description: |</div><div class='add'>+              For pull down type is normal, it don't need add R1/R0 define.</div><div class='add'>+              For pull down type is R1/R0 type, it can add value to set</div><div class='add'>+              different resistance. Valid arguments are described as below:</div><div class='add'>+              100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+</div><div class='add'>+          drive-strength:</div><div class='add'>+            enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+</div><div class='add'>+          input-enable: true</div><div class='add'>+</div><div class='add'>+          input-disable: true</div><div class='add'>+</div><div class='add'>+          output-low: true</div><div class='add'>+</div><div class='add'>+          output-high: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-enable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-disable: true</div><div class='add'>+</div><div class='add'>+          drive-strength-microamp:</div><div class='add'>+            enum: [125, 250, 500, 1000]</div><div class='add'>+</div><div class='add'>+          mediatek,drive-strength-adv:</div><div class='add'>+            deprecated: true</div><div class='add'>+            description: |</div><div class='add'>+              DEPRECATED: Please use drive-strength-microamp instead.</div><div class='add'>+              Describe the specific driving setup property.</div><div class='add'>+              For I2C pins, the existing generic driving setup can only support</div><div class='add'>+              2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they</div><div class='add'>+              can support 0.125/0.25/0.5/1mA adjustment. If we enable specific</div><div class='add'>+              driving setup, the existing generic setup will be disabled.</div><div class='add'>+              The specific driving setup is controlled by E1E0EN.</div><div class='add'>+              When E1=0/E0=0, the strength is 0.125mA.</div><div class='add'>+              When E1=0/E0=1, the strength is 0.25mA.</div><div class='add'>+              When E1=1/E0=0, the strength is 0.5mA.</div><div class='add'>+              When E1=1/E0=1, the strength is 1mA.</div><div class='add'>+              EN is used to enable or disable the specific driving setup.</div><div class='add'>+              Valid arguments are described as below:</div><div class='add'>+              0: (E1, E0, EN) = (0, 0, 0)</div><div class='add'>+              1: (E1, E0, EN) = (0, 0, 1)</div><div class='add'>+              2: (E1, E0, EN) = (0, 1, 0)</div><div class='add'>+              3: (E1, E0, EN) = (0, 1, 1)</div><div class='add'>+              4: (E1, E0, EN) = (1, 0, 0)</div><div class='add'>+              5: (E1, E0, EN) = (1, 0, 1)</div><div class='add'>+              6: (E1, E0, EN) = (1, 1, 0)</div><div class='add'>+              7: (E1, E0, EN) = (1, 1, 1)</div><div class='add'>+              So the valid arguments are from 0 to 7.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [0, 1, 2, 3, 4, 5, 6, 7]</div><div class='add'>+</div><div class='add'>+          mediatek,pull-up-adv:</div><div class='add'>+            deprecated: true</div><div class='add'>+            description: |</div><div class='add'>+              DEPRECATED: Please use bias-pull-up instead.</div><div class='add'>+              Pull up setings for 2 pull resistors, R0 and R1. User can</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='add'>+              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+          mediatek,pull-down-adv:</div><div class='add'>+            deprecated: true</div><div class='add'>+            description: |</div><div class='add'>+              DEPRECATED: Please use bias-pull-down instead.</div><div class='add'>+              Pull down settings for 2 pull resistors, R0 and R1. User can</div><div class='add'>+              configure those special pins. Valid arguments are described as</div><div class='add'>+              below:</div><div class='add'>+              0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.</div><div class='add'>+              1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.</div><div class='add'>+              2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.</div><div class='add'>+              3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+            enum: [0, 1, 2, 3]</div><div class='add'>+</div><div class='add'>+          mediatek,tdsel:</div><div class='add'>+            description:</div><div class='add'>+              An integer describing the steps for output level shifter duty</div><div class='add'>+              cycle when asserted (high pulse width adjustment). Valid arguments</div><div class='add'>+              are from 0 to 15.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+          mediatek,rdsel:</div><div class='add'>+            description:</div><div class='add'>+              An integer describing the steps for input level shifter duty cycle</div><div class='add'>+              when asserted (high pulse width adjustment). Valid arguments are</div><div class='add'>+              from 0 to 63.</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - pinmux</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/mt8365-pinfunc.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      pio: pinctrl@1000b000 {</div><div class='add'>+        compatible = "mediatek,mt8365-pinctrl";</div><div class='add'>+        reg = &lt;0 0x1000b000 0 0x1000&gt;;</div><div class='add'>+        mediatek,pctl-regmap = &lt;&amp;syscfg_pctl&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        pio-pins {</div><div class='add'>+          pins {</div><div class='add'>+            pinmux = &lt;MT8365_PIN_59_SDA1__FUNC_SDA1_0&gt;, &lt;MT8365_PIN_60_SCL1__FUNC_SCL1_0&gt;;</div><div class='add'>+            mediatek,pull-up-adv = &lt;3&gt;;</div><div class='add'>+            bias-pull-up;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt<br/>deleted file mode 100644<br/>index 8146193bd8ac..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,94 +0,0 @@</div><div class='del'>-== Amlogic Meson pinmux controller ==</div><div class='del'>-</div><div class='del'>-Required properties for the root node:</div><div class='del'>- - compatible: one of "amlogic,meson8-cbus-pinctrl"</div><div class='del'>-		      "amlogic,meson8b-cbus-pinctrl"</div><div class='del'>-		      "amlogic,meson8m2-cbus-pinctrl"</div><div class='del'>-		      "amlogic,meson8-aobus-pinctrl"</div><div class='del'>-		      "amlogic,meson8b-aobus-pinctrl"</div><div class='del'>-		      "amlogic,meson8m2-aobus-pinctrl"</div><div class='del'>-		      "amlogic,meson-gxbb-periphs-pinctrl"</div><div class='del'>-		      "amlogic,meson-gxbb-aobus-pinctrl"</div><div class='del'>-		      "amlogic,meson-gxl-periphs-pinctrl"</div><div class='del'>-		      "amlogic,meson-gxl-aobus-pinctrl"</div><div class='del'>-		      "amlogic,meson-axg-periphs-pinctrl"</div><div class='del'>-		      "amlogic,meson-axg-aobus-pinctrl"</div><div class='del'>-		      "amlogic,meson-g12a-periphs-pinctrl"</div><div class='del'>-		      "amlogic,meson-g12a-aobus-pinctrl"</div><div class='del'>-		      "amlogic,meson-a1-periphs-pinctrl"</div><div class='del'>-		      "amlogic,meson-s4-periphs-pinctrl"</div><div class='del'>- - reg: address and size of registers controlling irq functionality</div><div class='del'>-</div><div class='del'>-=== GPIO sub-nodes ===</div><div class='del'>-</div><div class='del'>-The GPIO bank for the controller is represented as a sub-node and it acts as a</div><div class='del'>-GPIO controller.</div><div class='del'>-</div><div class='del'>-Required properties for sub-nodes are:</div><div class='del'>- - reg: should contain a list of address and size, one tuple for each entry</div><div class='del'>-   in reg-names.</div><div class='del'>- - reg-names: an array of strings describing the "reg" entries.</div><div class='del'>-   Must contain "mux" and "gpio".</div><div class='del'>-   May contain "pull", "pull-enable" and "ds" when appropriate.</div><div class='del'>- - gpio-controller: identifies the node as a gpio controller</div><div class='del'>- - #gpio-cells: must be 2</div><div class='del'>-</div><div class='del'>-=== Other sub-nodes ===</div><div class='del'>-</div><div class='del'>-Child nodes without the "gpio-controller" represent some desired</div><div class='del'>-configuration for a pin or a group. Those nodes can be pinmux nodes or</div><div class='del'>-configuration nodes.</div><div class='del'>-</div><div class='del'>-Required properties for pinmux nodes are:</div><div class='del'>- - groups: a list of pinmux groups. The list of all available groups</div><div class='del'>-   depends on the SoC and can be found in driver sources.</div><div class='del'>- - function: the name of a function to activate for the specified set</div><div class='del'>-   of groups. The list of all available functions depends on the SoC</div><div class='del'>-   and can be found in driver sources.</div><div class='del'>-</div><div class='del'>-Required properties for configuration nodes:</div><div class='del'>- - pins: a list of pin names</div><div class='del'>-</div><div class='del'>-Configuration nodes support the following generic properties, as</div><div class='del'>-described in file pinctrl-bindings.txt:</div><div class='del'>- - "bias-disable"</div><div class='del'>- - "bias-pull-up"</div><div class='del'>- - "bias-pull-down"</div><div class='del'>- - "output-enable"</div><div class='del'>- - "output-disable"</div><div class='del'>- - "output-low"</div><div class='del'>- - "output-high"</div><div class='del'>-</div><div class='del'>-Optional properties :</div><div class='del'>- - drive-strength-microamp: Drive strength for the specified pins in uA.</div><div class='del'>-			    This property is only valid for G12A and newer.</div><div class='del'>-</div><div class='del'>-=== Example ===</div><div class='del'>-</div><div class='del'>-	pinctrl: pinctrl@c1109880 {</div><div class='del'>-		compatible = "amlogic,meson8-cbus-pinctrl";</div><div class='del'>-		reg = &lt;0xc1109880 0x10&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-</div><div class='del'>-		gpio: banks@c11080b0 {</div><div class='del'>-			reg = &lt;0xc11080b0 0x28&gt;,</div><div class='del'>-			      &lt;0xc11080e8 0x18&gt;,</div><div class='del'>-			      &lt;0xc1108120 0x18&gt;,</div><div class='del'>-			      &lt;0xc1108030 0x30&gt;;</div><div class='del'>-			reg-names = "mux", "pull", "pull-enable", "gpio";</div><div class='del'>-			gpio-controller;</div><div class='del'>-			#gpio-cells = &lt;2&gt;;</div><div class='del'>-               };</div><div class='del'>-</div><div class='del'>-		nand {</div><div class='del'>-			mux {</div><div class='del'>-				groups = "nand_io", "nand_io_ce0", "nand_io_ce1",</div><div class='del'>-					 "nand_io_rb0", "nand_ale", "nand_cle",</div><div class='del'>-					 "nand_wen_clk", "nand_ren_clk", "nand_dqs",</div><div class='del'>-					 "nand_ce2", "nand_ce3";</div><div class='del'>-				function = "nand";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt<br/>deleted file mode 100644<br/>index 5d84fd299ccf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-Microsemi Ocelot pin controller Device Tree Bindings</div><div class='del'>-----------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible		: Should be "mscc,ocelot-pinctrl",</div><div class='del'>-			  "mscc,jaguar2-pinctrl", "microchip,sparx5-pinctrl",</div><div class='del'>-			  "mscc,luton-pinctrl", "mscc,serval-pinctrl",</div><div class='del'>-			  "microchip,lan966x-pinctrl" or "mscc,servalt-pinctrl"</div><div class='del'>- - reg			: Address and length of the register set for the device</div><div class='del'>- - gpio-controller	: Indicates this device is a GPIO controller</div><div class='del'>- - #gpio-cells		: Must be 2.</div><div class='del'>-			  The first cell is the pin number and the</div><div class='del'>-			  second cell specifies GPIO flags, as defined in</div><div class='del'>-			  &lt;dt-bindings/gpio/gpio.h&gt;.</div><div class='del'>- - gpio-ranges		: Range of pins managed by the GPIO controller.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin</div><div class='del'>-configuration documented in pinctrl-bindings.txt.</div><div class='del'>-</div><div class='del'>-The following generic properties are supported:</div><div class='del'>- - function</div><div class='del'>- - pins</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	gpio: pinctrl@71070034 {</div><div class='del'>-		compatible = "mscc,ocelot-pinctrl";</div><div class='del'>-		reg = &lt;0x71070034 0x28&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;gpio 0 0 22&gt;;</div><div class='del'>-</div><div class='del'>-		uart_pins: uart-pins {</div><div class='del'>-				pins = "GPIO_6", "GPIO_7";</div><div class='del'>-				function = "uart";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart2_pins: uart2-pins {</div><div class='del'>-				pins = "GPIO_12", "GPIO_13";</div><div class='del'>-				function = "uart2";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..dbb3e1bd58c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microsemi Ocelot pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+  - Lars Povlsen &lt;lars.povlsen@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - microchip,lan966x-pinctrl</div><div class='add'>+      - microchip,sparx5-pinctrl</div><div class='add'>+      - mscc,jaguar2-pinctrl</div><div class='add'>+      - mscc,luton-pinctrl</div><div class='add'>+      - mscc,ocelot-pinctrl</div><div class='add'>+      - mscc,serval-pinctrl</div><div class='add'>+      - mscc,servalt-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Base address</div><div class='add'>+      - description: Extended pin configuration registers</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  "#interrupt-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    description: Optional shared switch reset.</div><div class='add'>+    items:</div><div class='add'>+      - const: switch</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: pinmux-node.yaml</div><div class='add'>+      - $ref: pincfg-node.yaml</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      function: true</div><div class='add'>+      pins: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+      drive-strength: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - function</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - microchip,lan966x-pinctrl</div><div class='add'>+              - microchip,sparx5-pinctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    gpio: pinctrl@71070034 {</div><div class='add'>+        compatible = "mscc,ocelot-pinctrl";</div><div class='add'>+        reg = &lt;0x71070034 0x28&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;gpio 0 0 22&gt;;</div><div class='add'>+</div><div class='add'>+        uart_pins: uart-pins {</div><div class='add'>+            pins = "GPIO_6", "GPIO_7";</div><div class='add'>+            function = "uart";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart2_pins: uart2-pins {</div><div class='add'>+            pins = "GPIO_12", "GPIO_13";</div><div class='add'>+            function = "uart2";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml<br/>index 47a56b83a610..7b7f840ffc4c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml</a></div><div class='hunk'>@@ -30,6 +30,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^gpio@[0-7]$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     description:</div><div class='ctx'>       Eight GPIO banks (gpio@0 to gpio@7), that each contain between 14 and 18</div><div class='hunk'>@@ -152,7 +153,7 @@ examples:</div><div class='ctx'>       pinctrl-names = "default";</div><div class='ctx'>       pinctrl-0 = &lt;&amp;pinctrl_uid&gt;, &lt;&amp;pinmux_uid&gt;;</div><div class='ctx'> </div><div class='del'>-      uid {</div><div class='add'>+      button-uid {</div><div class='ctx'>         label = "UID";</div><div class='ctx'>         linux,code = &lt;102&gt;;</div><div class='ctx'>         gpios = &lt;&amp;gpio0 14 GPIO_ACTIVE_HIGH&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra-pinmux-common.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra-pinmux-common.yaml<br/>new file mode 100644<br/>index 000000000000..96c608bcb87e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra-pinmux-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra-pinmux-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra Pinmux Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jonathan Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='add'>+  common pinctrl bindings used by client devices, including the meaning of</div><div class='add'>+  the phrase "pin configuration node".</div><div class='add'>+</div><div class='add'>+  Tegra's pin configuration nodes act as a container for an arbitrary number</div><div class='add'>+  of subnodes. Each of these subnodes represents some desired configuration</div><div class='add'>+  for a pin, a group, or a list of pins or groups. This configuration can</div><div class='add'>+  include the mux function to select on those pin(s)/ group(s), and various</div><div class='add'>+  pin configuration parameters, such as pull-up, tristate, drive strength,</div><div class='add'>+  etc.</div><div class='add'>+</div><div class='add'>+  The name of each subnode is not important; all subnodes should be</div><div class='add'>+  enumerated and processed purely based on their content.</div><div class='add'>+</div><div class='add'>+  Each subnode only affects those parameters that are explicitly listed. In</div><div class='add'>+  other words, a subnode that lists a mux function but no pin configuration</div><div class='add'>+  parameters implies no information about any pin configuration parameters.</div><div class='add'>+</div><div class='add'>+  Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='add'>+  information about e.g.  the mux function or tristate parameter. For this</div><div class='add'>+  reason, even seemingly boolean values are actually tristates in this</div><div class='add'>+  binding: unspecified, off, or on. Unspecified is represented as an absent</div><div class='add'>+  property, and off/on are represented as integer values 0 and 1.</div><div class='add'>+</div><div class='add'>+  Note that many of these properties are only valid for certain specific pins</div><div class='add'>+  or groups. See the Tegra TRM and various pinmux spreadsheets for complete</div><div class='add'>+  details regarding which groups support which functionality. The Linux</div><div class='add'>+  pinctrl driver may also be a useful reference, since it consolidates,</div><div class='add'>+  disambiguates, and corrects data from all those sources.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  nvidia,pins:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description: An array of strings. Each string contains the name of a pin</div><div class='add'>+      or group.  Valid values for these names are listed below.</div><div class='add'>+</div><div class='add'>+  nvidia,function:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: A string containing the name of the function to mux to the</div><div class='add'>+      pin or group. Valid values for function names are listed below. See the</div><div class='add'>+      Tegra TRM to determine which are valid for each pin or group.</div><div class='add'>+</div><div class='add'>+  nvidia,pull:</div><div class='add'>+    description: Pull-down/up setting to apply to the pin.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: none</div><div class='add'>+        const: 0</div><div class='add'>+      - description: down</div><div class='add'>+        const: 1</div><div class='add'>+      - description: up</div><div class='add'>+        const: 2</div><div class='add'>+</div><div class='add'>+  nvidia,tristate:</div><div class='add'>+    description: Tristate setting to apply to the pin.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: drive</div><div class='add'>+        const: 0</div><div class='add'>+      - description: tristate</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,schmitt:</div><div class='add'>+    description: Enable Schmitt trigger on the input.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: disable Schmitt trigger on the input</div><div class='add'>+        const: 0</div><div class='add'>+      - description: enable Schmitt trigger on the input</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,pull-down-strength:</div><div class='add'>+    description: Controls drive strength. 0 is weakest. The range of valid</div><div class='add'>+      values depends on the pingroup. See "CAL_DRVDN" in the Tegra TRM.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  nvidia,pull-up-strength:</div><div class='add'>+    description: Controls drive strength. 0 is weakest. The range of valid</div><div class='add'>+      values depends on the pingroup. See "CAL_DRVUP" in the Tegra TRM.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  nvidia,high-speed-mode:</div><div class='add'>+    description: Enable high speed mode the pins.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: normal speed mode</div><div class='add'>+        const: 0</div><div class='add'>+      - description: high speed mode</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,low-power-mode:</div><div class='add'>+    description: Controls the drive power or current. Valid values are from 0</div><div class='add'>+      through 3, where 0 specifies the least power and 3 specifies the most</div><div class='add'>+      power. See "Low Power Mode" or "LPMD1" and "LPMD0" in the Tegra TRM.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+  nvidia,enable-input:</div><div class='add'>+    description: Enable the pin's input path.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: disable input (i.e. output only)</div><div class='add'>+        const: 0</div><div class='add'>+      - description: enable input</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,open-drain:</div><div class='add'>+    description: Open-drain configuration for the pin.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: disable open-drain</div><div class='add'>+        const: 0</div><div class='add'>+      - description: enable open-drain</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,lock:</div><div class='add'>+    description: Lock the pin configuration against further changes until</div><div class='add'>+      reset.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: disable pin configuration lock</div><div class='add'>+        const: 0</div><div class='add'>+      - description: enable pin configuration lock</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,io-reset:</div><div class='add'>+    description: reset the I/O path</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1 ]</div><div class='add'>+</div><div class='add'>+  nvidia,rcv-sel:</div><div class='add'>+    description: select VIL/VIH receivers</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: normal receivers</div><div class='add'>+        const: 0</div><div class='add'>+      - description: high-voltage receivers</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,drive-type:</div><div class='add'>+    description: Drive type to configure for the pin.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1, 2, 3 ]</div><div class='add'>+</div><div class='add'>+  nvidia,io-hv:</div><div class='add'>+    description: Select high-voltage receivers.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Use normal receivers.</div><div class='add'>+        const: 0</div><div class='add'>+      - description: Use high-voltage receivers.</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+  nvidia,slew-rate-rising:</div><div class='add'>+    description: Controls rising signal slew rate. 0 is fastest. The range of</div><div class='add'>+      valid values depends on the pingroup. See "DRVDN_SLWR" in the Tegra TRM.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  nvidia,slew-rate-falling:</div><div class='add'>+    description: Controls falling signal slew rate. 0 is fastest. The range of</div><div class='add'>+      valid values depends on the pingroup. See "DRVUP_SLWF" in the Tegra TRM.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt<br/>deleted file mode 100644<br/>index fb70856c5b51..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,131 +0,0 @@</div><div class='del'>-NVIDIA Tegra114 pinmux controller</div><div class='del'>-</div><div class='del'>-The Tegra114 pinctrl binding is very similar to the Tegra20 and Tegra30</div><div class='del'>-pinctrl binding, as described in nvidia,tegra20-pinmux.txt and</div><div class='del'>-nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as</div><div class='del'>-a baseline, and only documents the differences between the two bindings.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nvidia,tegra114-pinmux"</div><div class='del'>-- reg: Should contain the register physical address and length for each of</div><div class='del'>-  the pad control and mux registers. The first bank of address must be the</div><div class='del'>-  driver strength pad control register address and second bank address must</div><div class='del'>-  be pinmux register address.</div><div class='del'>-</div><div class='del'>-Tegra114 adds the following optional properties for pin configuration subnodes:</div><div class='del'>-- nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes.</div><div class='del'>-- nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes.</div><div class='del'>-- nvidia,lock: Integer. Lock the pin configuration against further changes</div><div class='del'>-    until reset. 0: no, 1: yes.</div><div class='del'>-- nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.</div><div class='del'>-- nvidia,rcv-sel: Integer. Select VIL/VIH receivers. 0: normal, 1: high.</div><div class='del'>-- nvidia,drive-type: Integer. Valid range 0...3.</div><div class='del'>-</div><div class='del'>-As with Tegra20 and Terga30, see the Tegra TRM for complete details regarding</div><div class='del'>-which groups support which functionality.</div><div class='del'>-</div><div class='del'>-Valid values for pin and group names are:</div><div class='del'>-</div><div class='del'>-  per-pin mux groups:</div><div class='del'>-</div><div class='del'>-    These all support nvidia,function, nvidia,tristate, nvidia,pull,</div><div class='del'>-    nvidia,enable-input, nvidia,lock. Some support nvidia,open-drain,</div><div class='del'>-    nvidia,io-reset and nvidia,rcv-sel.</div><div class='del'>-</div><div class='del'>-    ulpi_data0_po1, ulpi_data1_po2, ulpi_data2_po3, ulpi_data3_po4,</div><div class='del'>-    ulpi_data4_po5, ulpi_data5_po6, ulpi_data6_po7, ulpi_data7_po0,</div><div class='del'>-    ulpi_clk_py0, ulpi_dir_py1, ulpi_nxt_py2, ulpi_stp_py3, dap3_fs_pp0,</div><div class='del'>-    dap3_din_pp1, dap3_dout_pp2, dap3_sclk_pp3, pv0, pv1, sdmmc1_clk_pz0,</div><div class='del'>-    sdmmc1_cmd_pz1, sdmmc1_dat3_py4, sdmmc1_dat2_py5, sdmmc1_dat1_py6,</div><div class='del'>-    sdmmc1_dat0_py7, clk2_out_pw5, clk2_req_pcc5, hdmi_int_pn7, ddc_scl_pv4,</div><div class='del'>-    ddc_sda_pv5, uart2_rxd_pc3, uart2_txd_pc2, uart2_rts_n_pj6,</div><div class='del'>-    uart2_cts_n_pj5, uart3_txd_pw6, uart3_rxd_pw7, uart3_cts_n_pa1,</div><div class='del'>-    uart3_rts_n_pc0, pu0, pu1, pu2, pu3, pu4, pu5, pu6, gen1_i2c_sda_pc5,</div><div class='del'>-    gen1_i2c_scl_pc4, dap4_fs_pp4, dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7,</div><div class='del'>-    clk3_out_pee0, clk3_req_pee1, gmi_wp_n_pc7, gmi_iordy_pi5, gmi_wait_pi7,</div><div class='del'>-    gmi_adv_n_pk0, gmi_clk_pk1, gmi_cs0_n_pj0, gmi_cs1_n_pj2, gmi_cs2_n_pk3,</div><div class='del'>-    gmi_cs3_n_pk4, gmi_cs4_n_pk2, gmi_cs6_n_pi3, gmi_cs7_n_pi6, gmi_ad0_pg0,</div><div class='del'>-    gmi_ad1_pg1, gmi_ad2_pg2, gmi_ad3_pg3, gmi_ad4_pg4, gmi_ad5_pg5,</div><div class='del'>-    gmi_ad6_pg6, gmi_ad7_pg7, gmi_ad8_ph0, gmi_ad9_ph1, gmi_ad10_ph2,</div><div class='del'>-    gmi_ad11_ph3, gmi_ad12_ph4, gmi_ad13_ph5, gmi_ad14_ph6, gmi_ad15_ph7,</div><div class='del'>-    gmi_a16_pj7, gmi_a17_pb0, gmi_a18_pb1, gmi_a19_pk7, gmi_wr_n_pi0,</div><div class='del'>-    gmi_oe_n_pi1, gmi_dqs_p_pj3, gmi_rst_n_pi4, gen2_i2c_scl_pt5,</div><div class='del'>-    gen2_i2c_sda_pt6, sdmmc4_clk_pcc4, sdmmc4_cmd_pt7, sdmmc4_dat0_paa0,</div><div class='del'>-    sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3, sdmmc4_dat4_paa4,</div><div class='del'>-    sdmmc4_dat5_paa5, sdmmc4_dat6_paa6, sdmmc4_dat7_paa7, cam_mclk_pcc0,</div><div class='del'>-    pcc1, pbb0, cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6,</div><div class='del'>-    pbb7, pcc2, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, kb_row0_pr0, kb_row1_pr1,</div><div class='del'>-    kb_row2_pr2, kb_row3_pr3, kb_row4_pr4, kb_row5_pr5, kb_row6_pr6,</div><div class='del'>-    kb_row7_pr7, kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_col0_pq0,</div><div class='del'>-    kb_col1_pq1, kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5,</div><div class='del'>-    kb_col6_pq6, kb_col7_pq7, clk_32k_out_pa0, sys_clk_req_pz5, core_pwr_req,</div><div class='del'>-    cpu_pwr_req, pwr_int_n, owr, dap1_fs_pn0, dap1_din_pn1, dap1_dout_pn2,</div><div class='del'>-    dap1_sclk_pn3, clk1_req_pee2, clk1_out_pw4, spdif_in_pk6, spdif_out_pk5,</div><div class='del'>-    dap2_fs_pa2, dap2_din_pa4, dap2_dout_pa5, dap2_sclk_pa3, dvfs_pwm_px0,</div><div class='del'>-    gpio_x1_aud_px1, gpio_x3_aud_px3, dvfs_clk_px2, gpio_x4_aud_px4,</div><div class='del'>-    gpio_x5_aud_px5, gpio_x6_aud_px6, gpio_x7_aud_px7, sdmmc3_clk_pa6,</div><div class='del'>-    sdmmc3_cmd_pa7, sdmmc3_dat0_pb7, sdmmc3_dat1_pb6, sdmmc3_dat2_pb5,</div><div class='del'>-    sdmmc3_dat3_pb4, hdmi_cec_pee3, sdmmc1_wp_n_pv3, sdmmc3_cd_n_pv2,</div><div class='del'>-    gpio_w2_aud_pw2, gpio_w3_aud_pw3, usb_vbus_en0_pn4, usb_vbus_en1_pn5,</div><div class='del'>-    sdmmc3_clk_lb_in_pee5, sdmmc3_clk_lb_out_pee4, reset_out_n.</div><div class='del'>-</div><div class='del'>-  drive groups:</div><div class='del'>-</div><div class='del'>-    These all support nvidia,pull-down-strength, nvidia,pull-up-strength,</div><div class='del'>-    nvidia,slew-rate-rising, nvidia,slew-rate-falling. Most but not all</div><div class='del'>-    support nvidia,high-speed-mode, nvidia,schmitt, nvidia,low-power-mode</div><div class='del'>-    and nvidia,drive-type.</div><div class='del'>-</div><div class='del'>-    ao1, ao2, at1, at2, at3, at4, at5, cdev1, cdev2, dap1, dap2, dap3, dap4,</div><div class='del'>-    dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg,</div><div class='del'>-    gmh, owr, uda.</div><div class='del'>-</div><div class='del'>-Valid values for nvidia,functions are:</div><div class='del'>-</div><div class='del'>-  blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3, displaya,</div><div class='del'>-  displaya_alt, displayb, dtv, emc_dll, extperiph1, extperiph2,</div><div class='del'>-  extperiph3, gmi, gmi_alt, hda, hsi, i2c1, i2c2, i2c3, i2c4, i2cpwr,</div><div class='del'>-  i2s0, i2s1, i2s2, i2s3, i2s4, irda, kbc, nand, nand_alt, owr, pmi,</div><div class='del'>-  pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1, rsvd2, rsvd3,</div><div class='del'>-  rsvd4, sdmmc1, sdmmc2, sdmmc3, sdmmc4, soc, spdif, spi1, spi2, spi3,</div><div class='del'>-  spi4, spi5, spi6, sysclk, trace, uarta, uartb, uartc, uartd, ulpi,</div><div class='del'>-  usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vi, vi_alt1, vi_alt3</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pinmux: pinmux {</div><div class='del'>-		compatible = "nvidia,tegra114-pinmux";</div><div class='del'>-		reg = &lt;0x70000868 0x148		/* Pad control registers */</div><div class='del'>-		       0x70003000 0x40c&gt;;	/* PinMux registers */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example board file extract:</div><div class='del'>-</div><div class='del'>-	pinctrl {</div><div class='del'>-		sdmmc4_default: pinmux {</div><div class='del'>-			sdmmc4_clk_pcc4 {</div><div class='del'>-				nvidia,pins = "sdmmc4_clk_pcc4",</div><div class='del'>-				nvidia,function = "sdmmc4";</div><div class='del'>-				nvidia,pull = &lt;0&gt;;</div><div class='del'>-				nvidia,tristate = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-			sdmmc4_dat0_paa0 {</div><div class='del'>-				nvidia,pins = "sdmmc4_dat0_paa0",</div><div class='del'>-						"sdmmc4_dat1_paa1",</div><div class='del'>-						"sdmmc4_dat2_paa2",</div><div class='del'>-						"sdmmc4_dat3_paa3",</div><div class='del'>-						"sdmmc4_dat4_paa4",</div><div class='del'>-						"sdmmc4_dat5_paa5",</div><div class='del'>-						"sdmmc4_dat6_paa6",</div><div class='del'>-						"sdmmc4_dat7_paa7";</div><div class='del'>-				nvidia,function = "sdmmc4";</div><div class='del'>-				nvidia,pull = &lt;2&gt;;</div><div class='del'>-				nvidia,tristate = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@78000400 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdmmc4_default&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml<br/>new file mode 100644<br/>index 000000000000..065dedb3573a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra114-pinmux.yaml</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra114-pinmux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra114 pinmux Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra114-pinmux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad control registers</div><div class='add'>+      - description: mux registers</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      phandle: true</div><div class='add'>+</div><div class='add'>+    # pin groups</div><div class='add'>+    additionalProperties:</div><div class='add'>+      $ref: nvidia,tegra-pinmux-common.yaml</div><div class='add'>+      additionalProperties: false</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,pins:</div><div class='add'>+          items:</div><div class='add'>+            enum: [ ulpi_data0_po1, ulpi_data1_po2, ulpi_data2_po3,</div><div class='add'>+                    ulpi_data3_po4, ulpi_data4_po5, ulpi_data5_po6,</div><div class='add'>+                    ulpi_data6_po7, ulpi_data7_po0, ulpi_clk_py0, ulpi_dir_py1,</div><div class='add'>+                    ulpi_nxt_py2, ulpi_stp_py3, dap3_fs_pp0, dap3_din_pp1,</div><div class='add'>+                    dap3_dout_pp2, dap3_sclk_pp3, pv0, pv1, sdmmc1_clk_pz0,</div><div class='add'>+                    sdmmc1_cmd_pz1, sdmmc1_dat3_py4, sdmmc1_dat2_py5,</div><div class='add'>+                    sdmmc1_dat1_py6, sdmmc1_dat0_py7, clk2_out_pw5,</div><div class='add'>+                    clk2_req_pcc5, hdmi_int_pn7, ddc_scl_pv4, ddc_sda_pv5,</div><div class='add'>+                    uart2_rxd_pc3, uart2_txd_pc2, uart2_rts_n_pj6,</div><div class='add'>+                    uart2_cts_n_pj5, uart3_txd_pw6, uart3_rxd_pw7,</div><div class='add'>+                    uart3_cts_n_pa1, uart3_rts_n_pc0, pu0, pu1, pu2, pu3, pu4,</div><div class='add'>+                    pu5, pu6, gen1_i2c_sda_pc5, gen1_i2c_scl_pc4, dap4_fs_pp4,</div><div class='add'>+                    dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7, clk3_out_pee0,</div><div class='add'>+                    clk3_req_pee1, gmi_wp_n_pc7, gmi_iordy_pi5, gmi_wait_pi7,</div><div class='add'>+                    gmi_adv_n_pk0, gmi_clk_pk1, gmi_cs0_n_pj0, gmi_cs1_n_pj2,</div><div class='add'>+                    gmi_cs2_n_pk3, gmi_cs3_n_pk4, gmi_cs4_n_pk2, gmi_cs6_n_pi3,</div><div class='add'>+                    gmi_cs7_n_pi6, gmi_ad0_pg0, gmi_ad1_pg1, gmi_ad2_pg2,</div><div class='add'>+                    gmi_ad3_pg3, gmi_ad4_pg4, gmi_ad5_pg5, gmi_ad6_pg6,</div><div class='add'>+                    gmi_ad7_pg7, gmi_ad8_ph0, gmi_ad9_ph1, gmi_ad10_ph2,</div><div class='add'>+                    gmi_ad11_ph3, gmi_ad12_ph4, gmi_ad13_ph5, gmi_ad14_ph6,</div><div class='add'>+                    gmi_ad15_ph7, gmi_a16_pj7, gmi_a17_pb0, gmi_a18_pb1,</div><div class='add'>+                    gmi_a19_pk7, gmi_wr_n_pi0, gmi_oe_n_pi1, gmi_dqs_p_pj3,</div><div class='add'>+                    gmi_rst_n_pi4, gen2_i2c_scl_pt5, gen2_i2c_sda_pt6,</div><div class='add'>+                    sdmmc4_clk_pcc4, sdmmc4_cmd_pt7, sdmmc4_dat0_paa0,</div><div class='add'>+                    sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3,</div><div class='add'>+                    sdmmc4_dat4_paa4, sdmmc4_dat5_paa5, sdmmc4_dat6_paa6,</div><div class='add'>+                    sdmmc4_dat7_paa7, cam_mclk_pcc0, pcc1, pbb0,</div><div class='add'>+                    cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6,</div><div class='add'>+                    pbb7, pcc2, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, kb_row0_pr0,</div><div class='add'>+                    kb_row1_pr1, kb_row2_pr2, kb_row3_pr3, kb_row4_pr4,</div><div class='add'>+                    kb_row5_pr5, kb_row6_pr6, kb_row7_pr7, kb_row8_ps0,</div><div class='add'>+                    kb_row9_ps1, kb_row10_ps2, kb_col0_pq0, kb_col1_pq1,</div><div class='add'>+                    kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5,</div><div class='add'>+                    kb_col6_pq6, kb_col7_pq7, clk_32k_out_pa0, sys_clk_req_pz5,</div><div class='add'>+                    core_pwr_req, cpu_pwr_req, pwr_int_n, owr, dap1_fs_pn0,</div><div class='add'>+                    dap1_din_pn1, dap1_dout_pn2, dap1_sclk_pn3, clk1_req_pee2,</div><div class='add'>+                    clk1_out_pw4, spdif_in_pk6, spdif_out_pk5, dap2_fs_pa2,</div><div class='add'>+                    dap2_din_pa4, dap2_dout_pa5, dap2_sclk_pa3, dvfs_pwm_px0,</div><div class='add'>+                    gpio_x1_aud_px1, gpio_x3_aud_px3, dvfs_clk_px2,</div><div class='add'>+                    gpio_x4_aud_px4, gpio_x5_aud_px5, gpio_x6_aud_px6,</div><div class='add'>+                    gpio_x7_aud_px7, sdmmc3_clk_pa6, sdmmc3_cmd_pa7,</div><div class='add'>+                    sdmmc3_dat0_pb7, sdmmc3_dat1_pb6, sdmmc3_dat2_pb5,</div><div class='add'>+                    sdmmc3_dat3_pb4, hdmi_cec_pee3, sdmmc1_wp_n_pv3,</div><div class='add'>+                    sdmmc3_cd_n_pv2, gpio_w2_aud_pw2, gpio_w3_aud_pw3,</div><div class='add'>+                    usb_vbus_en0_pn4, usb_vbus_en1_pn5, sdmmc3_clk_lb_in_pee5,</div><div class='add'>+                    sdmmc3_clk_lb_out_pee4, reset_out_n,</div><div class='add'>+                    # drive groups</div><div class='add'>+                    drive_ao1, drive_ao2, drive_at1, drive_at2, drive_at3,</div><div class='add'>+                    drive_at4, drive_at5, drive_cdev1, drive_cdev2, drive_dap1,</div><div class='add'>+                    drive_dap2, drive_dap3, drive_dap4, drive_dbg, drive_sdio3,</div><div class='add'>+                    drive_spi, drive_uaa, drive_uab, drive_uart2, drive_uart3,</div><div class='add'>+                    drive_sdio1, drive_ddc, drive_gma, drive_gme, drive_gmf,</div><div class='add'>+                    drive_gmg, drive_gmh, drive_owr, drive_uda ]</div><div class='add'>+</div><div class='add'>+        nvidia,function:</div><div class='add'>+          enum: [ blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3,</div><div class='add'>+                  displaya, displaya_alt, displayb, dtv, emc_dll, extperiph1,</div><div class='add'>+                  extperiph2, extperiph3, gmi, gmi_alt, hda, hsi, i2c1, i2c2,</div><div class='add'>+                  i2c3, i2c4, i2cpwr, i2s0, i2s1, i2s2, i2s3, i2s4, irda, kbc,</div><div class='add'>+                  nand, nand_alt, owr, pmi, pwm0, pwm1, pwm2, pwm3, pwron,</div><div class='add'>+                  reset_out_n, rsvd1, rsvd2, rsvd3, rsvd4, sdmmc1, sdmmc2,</div><div class='add'>+                  sdmmc3, sdmmc4, soc, spdif, spi1, spi2, spi3, spi4, spi5,</div><div class='add'>+                  spi6, sysclk, trace, uarta, uartb, uartc, uartd, ulpi, usb,</div><div class='add'>+                  vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vi, vi_alt1, vi_alt3 ]</div><div class='add'>+</div><div class='add'>+        nvidia,pull: true</div><div class='add'>+        nvidia,tristate: true</div><div class='add'>+        nvidia,schmitt: true</div><div class='add'>+        nvidia,pull-down-strength: true</div><div class='add'>+        nvidia,pull-up-strength: true</div><div class='add'>+        nvidia,high-speed-mode: true</div><div class='add'>+        nvidia,low-power-mode: true</div><div class='add'>+        nvidia,enable-input: true</div><div class='add'>+        nvidia,open-drain: true</div><div class='add'>+        nvidia,lock: true</div><div class='add'>+        nvidia,io-reset: true</div><div class='add'>+        nvidia,rcv-sel: true</div><div class='add'>+        nvidia,drive-type: true</div><div class='add'>+        nvidia,slew-rate-rising: true</div><div class='add'>+        nvidia,slew-rate-falling: true</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,pins</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinmux@70000868 {</div><div class='add'>+        compatible = "nvidia,tegra114-pinmux";</div><div class='add'>+        reg = &lt;0x70000868 0x148&gt;, /* Pad control registers */</div><div class='add'>+              &lt;0x70003000 0x40c&gt;; /* PinMux registers */</div><div class='add'>+</div><div class='add'>+        pinmux {</div><div class='add'>+            sdmmc4_clk_pcc4 {</div><div class='add'>+                nvidia,pins = "sdmmc4_clk_pcc4";</div><div class='add'>+                nvidia,function = "sdmmc4";</div><div class='add'>+                nvidia,pull = &lt;0&gt;;</div><div class='add'>+                nvidia,tristate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            sdmmc4_dat0_paa0 {</div><div class='add'>+                nvidia,pins = "sdmmc4_dat0_paa0",</div><div class='add'>+                              "sdmmc4_dat1_paa1",</div><div class='add'>+                              "sdmmc4_dat2_paa2",</div><div class='add'>+                              "sdmmc4_dat3_paa3",</div><div class='add'>+                              "sdmmc4_dat4_paa4",</div><div class='add'>+                              "sdmmc4_dat5_paa5",</div><div class='add'>+                              "sdmmc4_dat6_paa6",</div><div class='add'>+                              "sdmmc4_dat7_paa7";</div><div class='add'>+                nvidia,function = "sdmmc4";</div><div class='add'>+                nvidia,pull = &lt;2&gt;;</div><div class='add'>+                nvidia,tristate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-dpaux-padctl.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-dpaux-padctl.txt<br/>deleted file mode 100644<br/>index e0e886b73527..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-dpaux-padctl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-dpaux-padctl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-Device tree binding for NVIDIA Tegra DPAUX pad controller</div><div class='del'>-========================================================</div><div class='del'>-</div><div class='del'>-The Tegra Display Port Auxiliary (DPAUX) pad controller manages two pins</div><div class='del'>-which can be assigned to either the DPAUX channel or to an I2C</div><div class='del'>-controller.</div><div class='del'>-</div><div class='del'>-This document defines the device-specific binding for the DPAUX pad</div><div class='del'>-controller. Refer to pinctrl-bindings.txt in this directory for generic</div><div class='del'>-information about pin controller device tree bindings. Please refer to</div><div class='del'>-the binding document ../display/tegra/nvidia,tegra20-host1x.txt for more</div><div class='del'>-details on the DPAUX binding.</div><div class='del'>-</div><div class='del'>-Pin muxing:</div><div class='del'>------------</div><div class='del'>-</div><div class='del'>-Child nodes contain the pinmux configurations following the conventions</div><div class='del'>-from the pinctrl-bindings.txt document.</div><div class='del'>-</div><div class='del'>-Since only three configurations are possible, only three child nodes are</div><div class='del'>-needed to describe the pin mux'ing options for the DPAUX pads.</div><div class='del'>-Furthermore, given that the pad functions are only applicable to a</div><div class='del'>-single set of pads, the child nodes only need to describe the pad group</div><div class='del'>-the functions are being applied to rather than the individual pads.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- groups: Must be "dpaux-io"</div><div class='del'>-- function: Must be either "aux", "i2c" or "off".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-	dpaux@545c0000 {</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-		state_dpaux_aux: pinmux-aux {</div><div class='del'>-			groups = "dpaux-io";</div><div class='del'>-			function = "aux";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		state_dpaux_i2c: pinmux-i2c {</div><div class='del'>-			groups = "dpaux-io";</div><div class='del'>-			function = "i2c";</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		state_dpaux_off: pinmux-off {</div><div class='del'>-			groups = "dpaux-io";</div><div class='del'>-			function = "off";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	i2c@7000d100 {</div><div class='del'>-		...</div><div class='del'>-		pinctrl-0 = &lt;&amp;state_dpaux_i2c&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;state_dpaux_off&gt;;</div><div class='del'>-		pinctrl-names = "default", "idle";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt<br/>deleted file mode 100644<br/>index f4d06bb0b55a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,153 +0,0 @@</div><div class='del'>-NVIDIA Tegra124 pinmux controller</div><div class='del'>-</div><div class='del'>-The Tegra124 pinctrl binding is very similar to the Tegra20 and Tegra30</div><div class='del'>-pinctrl binding, as described in nvidia,tegra20-pinmux.txt and</div><div class='del'>-nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as</div><div class='del'>-a baseline, and only documents the differences between the two bindings.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: For Tegra124, must contain "nvidia,tegra124-pinmux".  For</div><div class='del'>-  Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'.</div><div class='del'>-- reg: Should contain a list of base address and size pairs for:</div><div class='del'>-    -- first entry - the drive strength and pad control registers.</div><div class='del'>-    -- second entry - the pinmux registers</div><div class='del'>-    -- third entry - the MIPI_PAD_CTRL register</div><div class='del'>-</div><div class='del'>-Tegra124 adds the following optional properties for pin configuration subnodes.</div><div class='del'>-The macros for options are defined in the</div><div class='del'>-	include/dt-binding/pinctrl/pinctrl-tegra.h.</div><div class='del'>-- nvidia,enable-input: Integer. Enable the pin's input path.</div><div class='del'>-		enable :TEGRA_PIN_ENABLE and</div><div class='del'>-		disable or output only: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,open-drain: Integer.</div><div class='del'>-		enable: TEGRA_PIN_ENABLE.</div><div class='del'>-		disable: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,lock: Integer. Lock the pin configuration against further changes</div><div class='del'>-    until reset.</div><div class='del'>-		enable: TEGRA_PIN_ENABLE.</div><div class='del'>-		disable: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,io-reset: Integer. Reset the IO path.</div><div class='del'>-		enable: TEGRA_PIN_ENABLE.</div><div class='del'>-		disable: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,rcv-sel: Integer. Select VIL/VIH receivers.</div><div class='del'>-		normal: TEGRA_PIN_DISABLE</div><div class='del'>-		high: TEGRA_PIN_ENABLE</div><div class='del'>-</div><div class='del'>-Please refer the Tegra TRM for complete details regarding which groups</div><div class='del'>-support which functionality.</div><div class='del'>-</div><div class='del'>-Valid values for pin and group names are:</div><div class='del'>-</div><div class='del'>-  per-pin mux groups:</div><div class='del'>-</div><div class='del'>-    These all support nvidia,function, nvidia,tristate, nvidia,pull,</div><div class='del'>-    nvidia,enable-input. Some support nvidia,lock nvidia,open-drain,</div><div class='del'>-    nvidia,io-reset and nvidia,rcv-sel.</div><div class='del'>-</div><div class='del'>-	ulpi_data0_po1, ulpi_data1_po2, ulpi_data2_po3, ulpi_data3_po4,</div><div class='del'>-	ulpi_data4_po5, ulpi_data5_po6, ulpi_data6_po7, ulpi_data7_po0,</div><div class='del'>-	ulpi_clk_py0, ulpi_dir_py1, ulpi_nxt_py2, ulpi_stp_py3, dap3_fs_pp0,</div><div class='del'>-	dap3_din_pp1, dap3_dout_pp2, dap3_sclk_pp3, pv0, pv1, sdmmc1_clk_pz0,</div><div class='del'>-	sdmmc1_cmd_pz1, sdmmc1_dat3_py4, sdmmc1_dat2_py5, sdmmc1_dat1_py6,</div><div class='del'>-	sdmmc1_dat0_py7, clk2_out_pw5, clk2_req_pcc5, hdmi_int_pn7, ddc_scl_pv4,</div><div class='del'>-	ddc_sda_pv5, uart2_rxd_pc3, uart2_txd_pc2, uart2_rts_n_pj6,</div><div class='del'>-	uart2_cts_n_pj5, uart3_txd_pw6, uart3_rxd_pw7, uart3_cts_n_pa1,</div><div class='del'>-	uart3_rts_n_pc0, pu0, pu1, pu2, pu3, pu4, pu5, pu6, gen1_i2c_scl_pc4,</div><div class='del'>-	gen1_i2c_sda_pc5, dap4_fs_pp4, dap4_din_pp5, dap4_dout_pp6,</div><div class='del'>-	dap4_sclk_pp7, clk3_out_pee0, clk3_req_pee1, pc7, pi5, pi7, pk0, pk1,</div><div class='del'>-	pj0, pj2, pk3, pk4, pk2, pi3, pi6, pg0, pg1, pg2, pg3, pg4, pg5, pg6,</div><div class='del'>-	pg7, ph0, ph1, ph2, ph3, ph4, ph5, ph6, ph7, pj7, pb0, pb1, pk7, pi0,</div><div class='del'>-	pi1, pi2, pi4, gen2_i2c_scl_pt5, gen2_i2c_sda_pt6, sdmmc4_clk_pcc4,</div><div class='del'>-	sdmmc4_cmd_pt7, sdmmc4_dat0_paa0, sdmmc4_dat1_paa1, sdmmc4_dat2_paa2,</div><div class='del'>-	sdmmc4_dat3_paa3, sdmmc4_dat4_paa4, sdmmc4_dat5_paa5, sdmmc4_dat6_paa6,</div><div class='del'>-	sdmmc4_dat7_paa7, cam_mclk_pcc0, pcc1, pbb0, cam_i2c_scl_pbb1,</div><div class='del'>-	cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6, pbb7, pcc2, jtag_rtck,</div><div class='del'>-	pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, kb_row0_pr0, kb_row1_pr1, kb_row2_pr2,</div><div class='del'>-	kb_row3_pr3, kb_row4_pr4, kb_row5_pr5, kb_row6_pr6, kb_row7_pr7,</div><div class='del'>-	kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_row11_ps3, kb_row12_ps4,</div><div class='del'>-	kb_row13_ps5, kb_row14_ps6, kb_row15_ps7, kb_col0_pq0, kb_col1_pq1,</div><div class='del'>-	kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5, kb_col6_pq6,</div><div class='del'>-	kb_col7_pq7, clk_32k_out_pa0, core_pwr_req, cpu_pwr_req, pwr_int_n,</div><div class='del'>-	clk_32k_in, owr, dap1_fs_pn0, dap1_din_pn1, dap1_dout_pn2,</div><div class='del'>-	dap1_sclk_pn3, dap_mclk1_req_pee2, dap_mclk1_pw4, spdif_in_pk6,</div><div class='del'>-	spdif_out_pk5, dap2_fs_pa2, dap2_din_pa4, dap2_dout_pa5, dap2_sclk_pa3,</div><div class='del'>-	dvfs_pwm_px0, gpio_x1_aud_px1, gpio_x3_aud_px3, dvfs_clk_px2,</div><div class='del'>-	gpio_x4_aud_px4, gpio_x5_aud_px5, gpio_x6_aud_px6, gpio_x7_aud_px7,</div><div class='del'>-	sdmmc3_clk_pa6, sdmmc3_cmd_pa7, sdmmc3_dat0_pb7, sdmmc3_dat1_pb6,</div><div class='del'>-	sdmmc3_dat2_pb5, sdmmc3_dat3_pb4, pex_l0_rst_n_pdd1,</div><div class='del'>-	pex_l0_clkreq_n_pdd2, pex_wake_n_pdd3, pex_l1_rst_n_pdd5,</div><div class='del'>-	pex_l1_clkreq_n_pdd6, hdmi_cec_pee3, sdmmc1_wp_n_pv3,</div><div class='del'>-	sdmmc3_cd_n_pv2, gpio_w2_aud_pw2, gpio_w3_aud_pw3, usb_vbus_en0_pn4,</div><div class='del'>-	usb_vbus_en1_pn5, sdmmc3_clk_lb_out_pee4, sdmmc3_clk_lb_in_pee5,</div><div class='del'>-	gmi_clk_lb, reset_out_n, kb_row16_pt0, kb_row17_pt1, usb_vbus_en2_pff1,</div><div class='del'>-	pff2, dp_hpd_pff0,</div><div class='del'>-</div><div class='del'>-  drive groups:</div><div class='del'>-</div><div class='del'>-    These all support nvidia,pull-down-strength, nvidia,pull-up-strength,</div><div class='del'>-    nvidia,slew-rate-rising, nvidia,slew-rate-falling. Most but not all</div><div class='del'>-    support nvidia,high-speed-mode, nvidia,schmitt, nvidia,low-power-mode</div><div class='del'>-    and nvidia,drive-type.</div><div class='del'>-</div><div class='del'>-    ao1, ao2, at1, at2, at3, at4, at5, cdev1, cdev2, dap1, dap2, dap3, dap4,</div><div class='del'>-    dbg, sdio3, spi, uaa, uab, uart2, uart3, sdio1, ddc, gma, gme, gmf, gmg,</div><div class='del'>-    gmh, owr, uda, gpv, dev3, cec, usb_vbus_en, ao3, ao0, hv0, sdio4, ao4.</div><div class='del'>-</div><div class='del'>-  MIPI pad control groups:</div><div class='del'>-</div><div class='del'>-    These support only the nvidia,function property.</div><div class='del'>-</div><div class='del'>-    dsi_b</div><div class='del'>-</div><div class='del'>-Valid values for nvidia,functions are:</div><div class='del'>-</div><div class='del'>-  blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3, displaya,</div><div class='del'>-  displaya_alt, displayb, dtv, extperiph1, extperiph2, extperiph3,</div><div class='del'>-  gmi, gmi_alt, hda, hsi, i2c1, i2c2, i2c3, i2c4, i2cpwr, i2s0,</div><div class='del'>-  i2s1, i2s2, i2s3, i2s4, irda, kbc, owr, pmi, pwm0, pwm1, pwm2, pwm3,</div><div class='del'>-  pwron, reset_out_n, rsvd1, rsvd2, rsvd3, rsvd4, sdmmc1, sdmmc2, sdmmc3,</div><div class='del'>-  sdmmc4, soc, spdif, spi1, spi2, spi3, spi4, spi5, spi6, trace, uarta,</div><div class='del'>-  uartb, uartc, uartd, ulpi, usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6,</div><div class='del'>-  vi, vi_alt1, vi_alt3, vimclk2, vimclk2_alt, sata, ccla, pe0, pe, pe1,</div><div class='del'>-  dp, rtck, sys, clk tmds, csi, dsi_b</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pinmux: pinmux {</div><div class='del'>-		compatible = "nvidia,tegra124-pinmux";</div><div class='del'>-		reg = &lt;0x0 0x70000868 0x0 0x164&gt;, /* Pad control registers */</div><div class='del'>-		      &lt;0x0 0x70003000 0x0 0x434&gt;, /* Mux registers */</div><div class='del'>-		      &lt;0x0 0x70000820 0x0 0x8&gt;;   /* MIPI pad control */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example pinmux entries:</div><div class='del'>-</div><div class='del'>-	pinctrl {</div><div class='del'>-		sdmmc4_default: pinmux {</div><div class='del'>-			sdmmc4_clk_pcc4 {</div><div class='del'>-				nvidia,pins = "sdmmc4_clk_pcc4",</div><div class='del'>-				nvidia,function = "sdmmc4";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			sdmmc4_dat0_paa0 {</div><div class='del'>-				nvidia,pins = "sdmmc4_dat0_paa0",</div><div class='del'>-						"sdmmc4_dat1_paa1",</div><div class='del'>-						"sdmmc4_dat2_paa2",</div><div class='del'>-						"sdmmc4_dat3_paa3",</div><div class='del'>-						"sdmmc4_dat4_paa4",</div><div class='del'>-						"sdmmc4_dat5_paa5",</div><div class='del'>-						"sdmmc4_dat6_paa6",</div><div class='del'>-						"sdmmc4_dat7_paa7";</div><div class='del'>-				nvidia,function = "sdmmc4";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@78000400 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdmmc4_default&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml<br/>new file mode 100644<br/>index 000000000000..f924652bef0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml</a></div><div class='hunk'>@@ -0,0 +1,176 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra124 Pinmux Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: The Tegra124 pinctrl binding is very similar to the Tegra20 and</div><div class='add'>+  Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and</div><div class='add'>+  nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a</div><div class='add'>+  baseline, and only documents the differences between the two bindings.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra124-pinmux</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra132-pinmux</div><div class='add'>+          - const: nvidia,tegra124-pinmux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: driver strength and pad control registers</div><div class='add'>+      - description: pinmux registers</div><div class='add'>+      - description: MIPI_PAD_CTRL registers</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      phandle: true</div><div class='add'>+</div><div class='add'>+    # pin groups</div><div class='add'>+    additionalProperties:</div><div class='add'>+      $ref: nvidia,tegra-pinmux-common.yaml</div><div class='add'>+      additionalProperties: false</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,pins:</div><div class='add'>+          $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+          items:</div><div class='add'>+            enum: [ ulpi_data0_po1, ulpi_data1_po2, ulpi_data2_po3,</div><div class='add'>+                    ulpi_data3_po4, ulpi_data4_po5, ulpi_data5_po6,</div><div class='add'>+                    ulpi_data6_po7, ulpi_data7_po0, ulpi_clk_py0, ulpi_dir_py1,</div><div class='add'>+                    ulpi_nxt_py2, ulpi_stp_py3, dap3_fs_pp0, dap3_din_pp1,</div><div class='add'>+                    dap3_dout_pp2, dap3_sclk_pp3, pv0, pv1, sdmmc1_clk_pz0,</div><div class='add'>+                    sdmmc1_cmd_pz1, sdmmc1_dat3_py4, sdmmc1_dat2_py5,</div><div class='add'>+                    sdmmc1_dat1_py6, sdmmc1_dat0_py7, clk2_out_pw5,</div><div class='add'>+                    clk2_req_pcc5, hdmi_int_pn7, ddc_scl_pv4, ddc_sda_pv5,</div><div class='add'>+                    uart2_rxd_pc3, uart2_txd_pc2, uart2_rts_n_pj6,</div><div class='add'>+                    uart2_cts_n_pj5, uart3_txd_pw6, uart3_rxd_pw7,</div><div class='add'>+                    uart3_cts_n_pa1, uart3_rts_n_pc0, pu0, pu1, pu2, pu3, pu4,</div><div class='add'>+                    pu5, pu6, gen1_i2c_scl_pc4, gen1_i2c_sda_pc5, dap4_fs_pp4,</div><div class='add'>+                    dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7, clk3_out_pee0,</div><div class='add'>+                    clk3_req_pee1, pc7, pi5, pi7, pk0, pk1, pj0, pj2, pk3, pk4,</div><div class='add'>+                    pk2, pi3, pi6, pg0, pg1, pg2, pg3, pg4, pg5, pg6, pg7, ph0,</div><div class='add'>+                    ph1, ph2, ph3, ph4, ph5, ph6, ph7, pj7, pb0, pb1, pk7, pi0,</div><div class='add'>+                    pi1, pi2, pi4, gen2_i2c_scl_pt5, gen2_i2c_sda_pt6,</div><div class='add'>+                    sdmmc4_clk_pcc4, sdmmc4_cmd_pt7, sdmmc4_dat0_paa0,</div><div class='add'>+                    sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3,</div><div class='add'>+                    sdmmc4_dat4_paa4, sdmmc4_dat5_paa5, sdmmc4_dat6_paa6,</div><div class='add'>+                    sdmmc4_dat7_paa7, cam_mclk_pcc0, pcc1, pbb0,</div><div class='add'>+                    cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6,</div><div class='add'>+                    pbb7, pcc2, jtag_rtck, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7,</div><div class='add'>+                    kb_row0_pr0, kb_row1_pr1, kb_row2_pr2, kb_row3_pr3,</div><div class='add'>+                    kb_row4_pr4, kb_row5_pr5, kb_row6_pr6, kb_row7_pr7,</div><div class='add'>+                    kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_row11_ps3,</div><div class='add'>+                    kb_row12_ps4, kb_row13_ps5, kb_row14_ps6, kb_row15_ps7,</div><div class='add'>+                    kb_col0_pq0, kb_col1_pq1, kb_col2_pq2, kb_col3_pq3,</div><div class='add'>+                    kb_col4_pq4, kb_col5_pq5, kb_col6_pq6, kb_col7_pq7,</div><div class='add'>+                    clk_32k_out_pa0, core_pwr_req, cpu_pwr_req, pwr_int_n,</div><div class='add'>+                    clk_32k_in, owr, dap1_fs_pn0, dap1_din_pn1, dap1_dout_pn2,</div><div class='add'>+                    dap1_sclk_pn3, dap_mclk1_req_pee2, dap_mclk1_pw4,</div><div class='add'>+                    spdif_in_pk6, spdif_out_pk5, dap2_fs_pa2, dap2_din_pa4,</div><div class='add'>+                    dap2_dout_pa5, dap2_sclk_pa3, dvfs_pwm_px0,</div><div class='add'>+                    gpio_x1_aud_px1, gpio_x3_aud_px3, dvfs_clk_px2,</div><div class='add'>+                    gpio_x4_aud_px4, gpio_x5_aud_px5, gpio_x6_aud_px6,</div><div class='add'>+                    gpio_x7_aud_px7, sdmmc3_clk_pa6, sdmmc3_cmd_pa7,</div><div class='add'>+                    sdmmc3_dat0_pb7, sdmmc3_dat1_pb6, sdmmc3_dat2_pb5,</div><div class='add'>+                    sdmmc3_dat3_pb4, pex_l0_rst_n_pdd1, pex_l0_clkreq_n_pdd2,</div><div class='add'>+                    pex_wake_n_pdd3, pex_l1_rst_n_pdd5, pex_l1_clkreq_n_pdd6,</div><div class='add'>+                    hdmi_cec_pee3, sdmmc1_wp_n_pv3, sdmmc3_cd_n_pv2,</div><div class='add'>+                    gpio_w2_aud_pw2, gpio_w3_aud_pw3, usb_vbus_en0_pn4,</div><div class='add'>+                    usb_vbus_en1_pn5, sdmmc3_clk_lb_out_pee4,</div><div class='add'>+                    sdmmc3_clk_lb_in_pee5, gmi_clk_lb, reset_out_n,</div><div class='add'>+                    kb_row16_pt0, kb_row17_pt1, usb_vbus_en2_pff1, pff2,</div><div class='add'>+                    dp_hpd_pff0,</div><div class='add'>+                    # drive groups</div><div class='add'>+                    drive_ao1, drive_ao2, drive_at1, drive_at2, drive_at3,</div><div class='add'>+                    drive_at4, drive_at5, drive_cdev1, drive_cdev2, drive_dap1,</div><div class='add'>+                    drive_dap2, drive_dap3, drive_dap4, drive_dbg, drive_sdio3,</div><div class='add'>+                    drive_spi, drive_uaa, drive_uab, drive_uart2, drive_uart3,</div><div class='add'>+                    drive_sdio1, drive_ddc, drive_gma, drive_gme, drive_gmf,</div><div class='add'>+                    drive_gmg, drive_gmh, drive_owr, drive_uda, drive_gpv,</div><div class='add'>+                    drive_dev3, drive_cec, drive_usb_vbus_en, drive_ao3,</div><div class='add'>+                    drive_ao0, drive_hv0, drive_sdio4, drive_ao4,</div><div class='add'>+                    # MIPI pad control groups</div><div class='add'>+                    mipi_pad_ctrl_dsi_b ]</div><div class='add'>+</div><div class='add'>+        nvidia,function:</div><div class='add'>+          enum: [ blink, cec, cldvfs, clk12, cpu, dap, dap1, dap2, dev3,</div><div class='add'>+                  displaya, displaya_alt, displayb, dtv, extperiph1,</div><div class='add'>+                  extperiph2, extperiph3, gmi, gmi_alt, hda, hsi, i2c1, i2c2,</div><div class='add'>+                  i2c3, i2c4, i2cpwr, i2s0, i2s1, i2s2, i2s3, i2s4, irda, kbc,</div><div class='add'>+                  owr, pmi, pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1,</div><div class='add'>+                  rsvd2, rsvd3, rsvd4, sdmmc1, sdmmc2, sdmmc3, sdmmc4, soc,</div><div class='add'>+                  spdif, spi1, spi2, spi3, spi4, spi5, spi6, trace, uarta,</div><div class='add'>+                  uartb, uartc, uartd, ulpi, usb, vgp1, vgp2, vgp3, vgp4, vgp5,</div><div class='add'>+                  vgp6, vi, vi_alt1, vi_alt3, vimclk2, vimclk2_alt, sata, ccla,</div><div class='add'>+                  pe0, pe, pe1, dp, rtck, sys, clk, tmds, csi, dsi_b ]</div><div class='add'>+</div><div class='add'>+        nvidia,pull: true</div><div class='add'>+        nvidia,tristate: true</div><div class='add'>+        nvidia,schmitt: true</div><div class='add'>+        nvidia,pull-down-strength: true</div><div class='add'>+        nvidia,pull-up-strength: true</div><div class='add'>+        nvidia,high-speed-mode: true</div><div class='add'>+        nvidia,low-power-mode: true</div><div class='add'>+        nvidia,enable-input: true</div><div class='add'>+        nvidia,open-drain: true</div><div class='add'>+        nvidia,lock: true</div><div class='add'>+        nvidia,io-reset: true</div><div class='add'>+        nvidia,rcv-sel: true</div><div class='add'>+        nvidia,drive-type: true</div><div class='add'>+        nvidia,slew-rate-rising: true</div><div class='add'>+        nvidia,slew-rate-falling: true</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,pins</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra124-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/pinctrl-tegra.h&gt;</div><div class='add'>+</div><div class='add'>+    pinmux@70000868 {</div><div class='add'>+        compatible = "nvidia,tegra124-pinmux";</div><div class='add'>+        reg = &lt;0x70000868 0x164&gt;, /* Pad control registers */</div><div class='add'>+              &lt;0x70003000 0x434&gt;, /* Mux registers */</div><div class='add'>+              &lt;0x70000820 0x8&gt;;   /* MIPI pad control */</div><div class='add'>+</div><div class='add'>+        sdmmc4_default: pinmux {</div><div class='add'>+            sdmmc4_clk_pcc4 {</div><div class='add'>+                nvidia,pins = "sdmmc4_clk_pcc4";</div><div class='add'>+                nvidia,function = "sdmmc4";</div><div class='add'>+                nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+                nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            sdmmc4_dat0_paa0 {</div><div class='add'>+                nvidia,pins = "sdmmc4_dat0_paa0",</div><div class='add'>+                              "sdmmc4_dat1_paa1",</div><div class='add'>+                              "sdmmc4_dat2_paa2",</div><div class='add'>+                              "sdmmc4_dat3_paa3",</div><div class='add'>+                              "sdmmc4_dat4_paa4",</div><div class='add'>+                              "sdmmc4_dat5_paa5",</div><div class='add'>+                              "sdmmc4_dat6_paa6",</div><div class='add'>+                              "sdmmc4_dat7_paa7";</div><div class='add'>+                nvidia,function = "sdmmc4";</div><div class='add'>+                nvidia,pull = &lt;TEGRA_PIN_PULL_UP&gt;;</div><div class='add'>+                nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.txt<br/>deleted file mode 100644<br/>index 90d38f710635..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,107 +0,0 @@</div><div class='del'>-NVIDIA Tegra194 pinmux controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nvidia,tegra194-pinmux"</div><div class='del'>-- reg: Should contain a list of base address and size pairs for:</div><div class='del'>-  - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)</div><div class='del'>-  - second entry: The PINMUX_AUX_* registers (pinmux)</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-Tegra's pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, tristate, drive strength, etc.</div><div class='del'>-</div><div class='del'>-See the TRM to determine which properties and values apply to each pin/group.</div><div class='del'>-Macro values for property values are defined in</div><div class='del'>-include/dt-binding/pinctrl/pinctrl-tegra.h.</div><div class='del'>-</div><div class='del'>-Required subnode-properties:</div><div class='del'>-- nvidia,pins : An array of strings. Each string contains the name of a pin or</div><div class='del'>-    group. Valid values for these names are listed below.</div><div class='del'>-</div><div class='del'>-Optional subnode-properties:</div><div class='del'>-- nvidia,function: A string containing the name of the function to mux to the</div><div class='del'>-    pin or group.</div><div class='del'>-- nvidia,pull: Integer, representing the pull-down/up to apply to the pin.</div><div class='del'>-    0: none, 1: down, 2: up.</div><div class='del'>-- nvidia,tristate: Integer.</div><div class='del'>-    0: drive, 1: tristate.</div><div class='del'>-- nvidia,enable-input: Integer. Enable the pin's input path.</div><div class='del'>-    enable :TEGRA_PIN_ENABLE and</div><div class='del'>-    disable or output only: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,open-drain: Integer.</div><div class='del'>-    enable: TEGRA_PIN_ENABLE.</div><div class='del'>-    disable: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,lock: Integer. Lock the pin configuration against further changes</div><div class='del'>-    until reset.</div><div class='del'>-    enable: TEGRA_PIN_ENABLE.</div><div class='del'>-    disable: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,io-hv: Integer. Select high-voltage receivers.</div><div class='del'>-    normal: TEGRA_PIN_DISABLE</div><div class='del'>-    high: TEGRA_PIN_ENABLE</div><div class='del'>-- nvidia,schmitt: Integer. Enables Schmitt Trigger on the input.</div><div class='del'>-    normal: TEGRA_PIN_DISABLE</div><div class='del'>-    high: TEGRA_PIN_ENABLE</div><div class='del'>-- nvidia,drive-type: Integer. Valid range 0...3.</div><div class='del'>-- nvidia,pull-down-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='del'>-    The range of valid values depends on the pingroup. See "CAL_DRVDN" in the</div><div class='del'>-    Tegra TRM.</div><div class='del'>-- nvidia,pull-up-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='del'>-    The range of valid values depends on the pingroup. See "CAL_DRVUP" in the</div><div class='del'>-    Tegra TRM.</div><div class='del'>-</div><div class='del'>-Valid values for pin and group names (nvidia,pin) are:</div><div class='del'>-</div><div class='del'>-    These correspond to Tegra PADCTL_* (pinmux) registers.</div><div class='del'>-</div><div class='del'>-  Mux groups:</div><div class='del'>-</div><div class='del'>-    These correspond to Tegra PADCTL_* (pinmux) registers. Any property</div><div class='del'>-    that exists in those registers may be set for the following pin names.</div><div class='del'>-</div><div class='del'>-    pex_l5_clkreq_n_pgg0, pex_l5_rst_n_pgg1</div><div class='del'>-</div><div class='del'>-  Drive groups:</div><div class='del'>-</div><div class='del'>-    These registers controls a single pin for which a mux group exists.</div><div class='del'>-    See the list above for the pin name to use when configuring the pinmux.</div><div class='del'>-</div><div class='del'>-    pex_l5_clkreq_n_pgg0, pex_l5_rst_n_pgg1</div><div class='del'>-</div><div class='del'>-Valid values for nvidia,functions are:</div><div class='del'>-</div><div class='del'>-    pe5</div><div class='del'>-</div><div class='del'>-Power Domain:</div><div class='del'>-    pex_l5_clkreq_n_pgg0 and pex_l5_rst_n_pgg1 are part of PCIE C5 power</div><div class='del'>-    partition. Client devices must enable this partition before accessing</div><div class='del'>-    these pins here.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-		tegra_pinctrl: pinmux: pinmux@2430000 {</div><div class='del'>-			compatible = "nvidia,tegra194-pinmux";</div><div class='del'>-			reg = &lt;0x2430000 0x17000</div><div class='del'>-			       0xc300000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-			pinctrl-names = "pex_rst";</div><div class='del'>-			pinctrl-0 = &lt;&amp;pex_rst_c5_out_state&gt;;</div><div class='del'>-</div><div class='del'>-			pex_rst_c5_out_state: pex_rst_c5_out {</div><div class='del'>-				pex_rst {</div><div class='del'>-					nvidia,pins = "pex_l5_rst_n_pgg1";</div><div class='del'>-					nvidia,schmitt = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-					nvidia,lpdr = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-					nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-					nvidia,io-hv = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-					nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-					nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml<br/>new file mode 100644<br/>index 000000000000..60a4bdf01bf2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra194-pinmux.yaml</a></div><div class='hunk'>@@ -0,0 +1,284 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra194 Pinmux Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-pinmux</div><div class='add'>+      - nvidia,tegra194-pinmux-aon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: pinmux registers</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      phandle: true</div><div class='add'>+</div><div class='add'>+    # pin groups</div><div class='add'>+    additionalProperties:</div><div class='add'>+      $ref: nvidia,tegra-pinmux-common.yaml</div><div class='add'>+      unevaluatedProperties: false</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,function:</div><div class='add'>+          enum: [ aud, can0, can1, ccla, dca, dcb, dgpu, directdc, directdc1,</div><div class='add'>+                  displaya, displayb, dmic1, dmic2, dmic3, dmic4, dmic5, dp,</div><div class='add'>+                  dspk0, dspk1, eqos, extperiph1, extperiph2, extperiph3,</div><div class='add'>+                  extperiph4, gp, gpio, hdmi, i2c1, i2c2, i2c3, i2c5, i2c8,</div><div class='add'>+                  i2s1, i2s2, i2s3, i2s4, i2s5, i2s6, igpu, iqc1, iqc2, mipi,</div><div class='add'>+                  nv, pe0, pe1, pe2, pe3, pe4, pe5, qspi, qspi0, qspi1, rsvd0,</div><div class='add'>+                  rsvd1, rsvd2, rsvd3, sata, sce, sdmmc1, sdmmc3, sdmmc4, slvs,</div><div class='add'>+                  soc, spdif, spi1, spi2, spi3, touch, uarta, uartb, uartc,</div><div class='add'>+                  uartd, uarte, uartg, ufs0, usb, vgp1, vgp2, vgp3, vgp4, vgp5,</div><div class='add'>+                  vgp6, wdt ]</div><div class='add'>+</div><div class='add'>+        nvidia,pull: true</div><div class='add'>+        nvidia,tristate: true</div><div class='add'>+        nvidia,schmitt: true</div><div class='add'>+        nvidia,enable-input: true</div><div class='add'>+        nvidia,open-drain: true</div><div class='add'>+        nvidia,lock: true</div><div class='add'>+        nvidia,drive-type: true</div><div class='add'>+        nvidia,io-hv: true</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,pins</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: nvidia,tegra194-pinmux</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+          type: object</div><div class='add'>+          additionalProperties:</div><div class='add'>+            properties:</div><div class='add'>+              nvidia,pins:</div><div class='add'>+                description: An array of strings. Each string contains the name</div><div class='add'>+                  of a pin or group. Valid values for these names are listed</div><div class='add'>+                  below.</div><div class='add'>+</div><div class='add'>+                  Note that the pex_l5_clkreq_n_pgg0 and pex_l5_rst_n_pgg1 pins</div><div class='add'>+                  are part of PCIE C5 power partition. Client devices must</div><div class='add'>+                  enable this partition before accessing the configuration for</div><div class='add'>+                  these pins.</div><div class='add'>+                items:</div><div class='add'>+                  enum: [ dap6_sclk_pa0, dap6_dout_pa1, dap6_din_pa2,</div><div class='add'>+                          dap6_fs_pa3, dap4_sclk_pa4, dap4_dout_pa5,</div><div class='add'>+                          dap4_din_pa6, dap4_fs_pa7, cpu_pwr_req_0_pb0,</div><div class='add'>+                          cpu_pwr_req_1_pb1, qspi0_sck_pc0, qspi0_cs_n_pc1,</div><div class='add'>+                          qspi0_io0_pc2, qspi0_io1_pc3, qspi0_io2_pc4,</div><div class='add'>+                          qspi0_io3_pc5, qspi1_sck_pc6, qspi1_cs_n_pc7,</div><div class='add'>+                          qspi1_io0_pd0, qspi1_io1_pd1, qspi1_io2_pd2,</div><div class='add'>+                          qspi1_io3_pd3, eqos_txc_pe0, eqos_td0_pe1,</div><div class='add'>+                          eqos_td1_pe2, eqos_td2_pe3, eqos_td3_pe4,</div><div class='add'>+                          eqos_tx_ctl_pe5, eqos_rd0_pe6, eqos_rd1_pe7,</div><div class='add'>+                          eqos_rd2_pf0, eqos_rd3_pf1, eqos_rx_ctl_pf2,</div><div class='add'>+                          eqos_rxc_pf3, eqos_sma_mdio_pf4, eqos_sma_mdc_pf5,</div><div class='add'>+                          soc_gpio00_pg0, soc_gpio01_pg1, soc_gpio02_pg2,</div><div class='add'>+                          soc_gpio03_pg3, soc_gpio08_pg4, soc_gpio09_pg5,</div><div class='add'>+                          soc_gpio10_pg6, soc_gpio11_pg7, soc_gpio12_ph0,</div><div class='add'>+                          soc_gpio13_ph1, soc_gpio14_ph2, uart4_tx_ph3,</div><div class='add'>+                          uart4_rx_ph4, uart4_rts_ph5, uart4_cts_ph6,</div><div class='add'>+                          dap2_sclk_ph7, dap2_dout_pi0, dap2_din_pi1,</div><div class='add'>+                          dap2_fs_pi2, gen1_i2c_scl_pi3, gen1_i2c_sda_pi4,</div><div class='add'>+                          sdmmc1_clk_pj0, sdmmc1_cmd_pj1, sdmmc1_dat0_pj2,</div><div class='add'>+                          sdmmc1_dat1_pj3, sdmmc1_dat2_pj4, sdmmc1_dat3_pj5,</div><div class='add'>+                          pex_l0_clkreq_n_pk0, pex_l0_rst_n_pk1,</div><div class='add'>+                          pex_l1_clkreq_n_pk2, pex_l1_rst_n_pk3,</div><div class='add'>+                          pex_l2_clkreq_n_pk4, pex_l2_rst_n_pk5,</div><div class='add'>+                          pex_l3_clkreq_n_pk6, pex_l3_rst_n_pk7,</div><div class='add'>+                          pex_l4_clkreq_n_pl0, pex_l4_rst_n_pl1,</div><div class='add'>+                          pex_wake_n_pl2, sata_dev_slp_pl3, dp_aux_ch0_hpd_pm0,</div><div class='add'>+                          dp_aux_ch1_hpd_pm1, dp_aux_ch2_hpd_pm2,</div><div class='add'>+                          dp_aux_ch3_hpd_pm3, hdmi_cec_pm4, soc_gpio50_pm5,</div><div class='add'>+                          soc_gpio51_pm6, soc_gpio52_pm7, soc_gpio53_pn0,</div><div class='add'>+                          soc_gpio54_pn1, soc_gpio55_pn2, sdmmc3_clk_po0,</div><div class='add'>+                          sdmmc3_cmd_po1, sdmmc3_dat0_po2, sdmmc3_dat1_po3,</div><div class='add'>+                          sdmmc3_dat2_po4, sdmmc3_dat3_po5, extperiph1_clk_pp0,</div><div class='add'>+                          extperiph2_clk_pp1, cam_i2c_scl_pp2, cam_i2c_sda_pp3,</div><div class='add'>+                          soc_gpio04_pp4, soc_gpio05_pp5, soc_gpio06_pp6,</div><div class='add'>+                          soc_gpio07_pp7, soc_gpio20_pq0, soc_gpio21_pq1,</div><div class='add'>+                          soc_gpio22_pq2, soc_gpio23_pq3, soc_gpio40_pq4,</div><div class='add'>+                          soc_gpio41_pq5, soc_gpio42_pq6, soc_gpio43_pq7,</div><div class='add'>+                          soc_gpio44_pr0, soc_gpio45_pr1, uart1_tx_pr2,</div><div class='add'>+                          uart1_rx_pr3, uart1_rts_pr4, uart1_cts_pr5,</div><div class='add'>+                          dap1_sclk_ps0, dap1_dout_ps1, dap1_din_ps2,</div><div class='add'>+                          dap1_fs_ps3, aud_mclk_ps4, soc_gpio30_ps5,</div><div class='add'>+                          soc_gpio31_ps6, soc_gpio32_ps7, soc_gpio33_pt0,</div><div class='add'>+                          dap3_sclk_pt1, dap3_dout_pt2, dap3_din_pt3,</div><div class='add'>+                          dap3_fs_pt4, dap5_sclk_pt5, dap5_dout_pt6,</div><div class='add'>+                          dap5_din_pt7, dap5_fs_pu0, directdc1_clk_pv0,</div><div class='add'>+                          directdc1_in_pv1, directdc1_out0_pv2,</div><div class='add'>+                          directdc1_out1_pv3, directdc1_out2_pv4,</div><div class='add'>+                          directdc1_out3_pv5, directdc1_out4_pv6,</div><div class='add'>+                          directdc1_out5_pv7, directdc1_out6_pw0,</div><div class='add'>+                          directdc1_out7_pw1, gpu_pwr_req_px0, cv_pwr_req_px1,</div><div class='add'>+                          gp_pwm2_px2, gp_pwm3_px3, uart2_tx_px4, uart2_rx_px5,</div><div class='add'>+                          uart2_rts_px6, uart2_cts_px7, spi3_sck_py0,</div><div class='add'>+                          spi3_miso_py1, spi3_mosi_py2, spi3_cs0_py3,</div><div class='add'>+                          spi3_cs1_py4, uart5_tx_py5, uart5_rx_py6,</div><div class='add'>+                          uart5_rts_py7, uart5_cts_pz0, usb_vbus_en0_pz1,</div><div class='add'>+                          usb_vbus_en1_pz2, spi1_sck_pz3, spi1_miso_pz4,</div><div class='add'>+                          spi1_mosi_pz5, spi1_cs0_pz6, spi1_cs1_pz7,</div><div class='add'>+                          ufs0_ref_clk_pff0, ufs0_rst_pff1,</div><div class='add'>+                          pex_l5_clkreq_n_pgg0, pex_l5_rst_n_pgg1,</div><div class='add'>+                          directdc_comp, sdmmc4_clk, sdmmc4_cmd, sdmmc4_dqs,</div><div class='add'>+                          sdmmc4_dat7, sdmmc4_dat6, sdmmc4_dat5, sdmmc4_dat4,</div><div class='add'>+                          sdmmc4_dat3, sdmmc4_dat2, sdmmc4_dat1, sdmmc4_dat0,</div><div class='add'>+                          sdmmc1_comp, sdmmc1_hv_trim, sdmmc3_comp,</div><div class='add'>+                          sdmmc3_hv_trim, eqos_comp, qspi_comp,</div><div class='add'>+                          # drive groups</div><div class='add'>+                          drive_soc_gpio33_pt0, drive_soc_gpio32_ps7,</div><div class='add'>+                          drive_soc_gpio31_ps6, drive_soc_gpio30_ps5,</div><div class='add'>+                          drive_aud_mclk_ps4, drive_dap1_fs_ps3,</div><div class='add'>+                          drive_dap1_din_ps2, drive_dap1_dout_ps1,</div><div class='add'>+                          drive_dap1_sclk_ps0, drive_dap3_fs_pt4,</div><div class='add'>+                          drive_dap3_din_pt3, drive_dap3_dout_pt2,</div><div class='add'>+                          drive_dap3_sclk_pt1, drive_dap5_fs_pu0,</div><div class='add'>+                          drive_dap5_din_pt7, drive_dap5_dout_pt6,</div><div class='add'>+                          drive_dap5_sclk_pt5, drive_dap6_fs_pa3,</div><div class='add'>+                          drive_dap6_din_pa2, drive_dap6_dout_pa1,</div><div class='add'>+                          drive_dap6_sclk_pa0, drive_dap4_fs_pa7,</div><div class='add'>+                          drive_dap4_din_pa6, drive_dap4_dout_pa5,</div><div class='add'>+                          drive_dap4_sclk_pa4, drive_extperiph2_clk_pp1,</div><div class='add'>+                          drive_extperiph1_clk_pp0, drive_cam_i2c_sda_pp3,</div><div class='add'>+                          drive_cam_i2c_scl_pp2, drive_soc_gpio40_pq4,</div><div class='add'>+                          drive_soc_gpio41_pq5, drive_soc_gpio42_pq6,</div><div class='add'>+                          drive_soc_gpio43_pq7, drive_soc_gpio44_pr0,</div><div class='add'>+                          drive_soc_gpio45_pr1, drive_soc_gpio20_pq0,</div><div class='add'>+                          drive_soc_gpio21_pq1, drive_soc_gpio22_pq2,</div><div class='add'>+                          drive_soc_gpio23_pq3, drive_soc_gpio04_pp4,</div><div class='add'>+                          drive_soc_gpio05_pp5, drive_soc_gpio06_pp6,</div><div class='add'>+                          drive_soc_gpio07_pp7, drive_uart1_cts_pr5,</div><div class='add'>+                          drive_uart1_rts_pr4, drive_uart1_rx_pr3,</div><div class='add'>+                          drive_uart1_tx_pr2, drive_dap2_din_pi1,</div><div class='add'>+                          drive_dap2_dout_pi0, drive_dap2_fs_pi2,</div><div class='add'>+                          drive_dap2_sclk_ph7, drive_uart4_cts_ph6,</div><div class='add'>+                          drive_uart4_rts_ph5, drive_uart4_rx_ph4,</div><div class='add'>+                          drive_uart4_tx_ph3, drive_soc_gpio03_pg3,</div><div class='add'>+                          drive_soc_gpio02_pg2, drive_soc_gpio01_pg1,</div><div class='add'>+                          drive_soc_gpio00_pg0, drive_gen1_i2c_scl_pi3,</div><div class='add'>+                          drive_gen1_i2c_sda_pi4, drive_soc_gpio08_pg4,</div><div class='add'>+                          drive_soc_gpio09_pg5, drive_soc_gpio10_pg6,</div><div class='add'>+                          drive_soc_gpio11_pg7, drive_soc_gpio12_ph0,</div><div class='add'>+                          drive_soc_gpio13_ph1, drive_soc_gpio14_ph2,</div><div class='add'>+                          drive_soc_gpio50_pm5, drive_soc_gpio51_pm6,</div><div class='add'>+                          drive_soc_gpio52_pm7, drive_soc_gpio53_pn0,</div><div class='add'>+                          drive_soc_gpio54_pn1, drive_soc_gpio55_pn2,</div><div class='add'>+                          drive_dp_aux_ch0_hpd_pm0, drive_dp_aux_ch1_hpd_pm1,</div><div class='add'>+                          drive_dp_aux_ch2_hpd_pm2, drive_dp_aux_ch3_hpd_pm3,</div><div class='add'>+                          drive_hdmi_cec_pm4, drive_pex_l2_clkreq_n_pk4,</div><div class='add'>+                          drive_pex_wake_n_pl2, drive_pex_l1_clkreq_n_pk2,</div><div class='add'>+                          drive_pex_l1_rst_n_pk3, drive_pex_l0_clkreq_n_pk0,</div><div class='add'>+                          drive_pex_l0_rst_n_pk1, drive_pex_l2_rst_n_pk5,</div><div class='add'>+                          drive_pex_l3_clkreq_n_pk6, drive_pex_l3_rst_n_pk7,</div><div class='add'>+                          drive_pex_l4_clkreq_n_pl0, drive_pex_l4_rst_n_pl1,</div><div class='add'>+                          drive_sata_dev_slp_pl3, drive_pex_l5_clkreq_n_pgg0,</div><div class='add'>+                          drive_pex_l5_rst_n_pgg1, drive_cpu_pwr_req_1_pb1,</div><div class='add'>+                          drive_cpu_pwr_req_0_pb0, drive_sdmmc1_clk_pj0,</div><div class='add'>+                          drive_sdmmc1_cmd_pj1, drive_sdmmc1_dat3_pj5,</div><div class='add'>+                          drive_sdmmc1_dat2_pj4, drive_sdmmc1_dat1_pj3,</div><div class='add'>+                          drive_sdmmc1_dat0_pj2, drive_sdmmc3_dat3_po5,</div><div class='add'>+                          drive_sdmmc3_dat2_po4, drive_sdmmc3_dat1_po3,</div><div class='add'>+                          drive_sdmmc3_dat0_po2, drive_sdmmc3_cmd_po1,</div><div class='add'>+                          drive_sdmmc3_clk_po0, drive_gpu_pwr_req_px0,</div><div class='add'>+                          drive_spi3_miso_py1, drive_spi1_cs0_pz6,</div><div class='add'>+                          drive_spi3_cs0_py3, drive_spi1_miso_pz4,</div><div class='add'>+                          drive_spi3_cs1_py4, drive_gp_pwm3_px3,</div><div class='add'>+                          drive_gp_pwm2_px2, drive_spi1_sck_pz3,</div><div class='add'>+                          drive_spi3_sck_py0, drive_spi1_cs1_pz7,</div><div class='add'>+                          drive_spi1_mosi_pz5, drive_spi3_mosi_py2,</div><div class='add'>+                          drive_cv_pwr_req_px1, drive_uart2_tx_px4,</div><div class='add'>+                          drive_uart2_rx_px5, drive_uart2_rts_px6,</div><div class='add'>+                          drive_uart2_cts_px7, drive_uart5_rx_py6,</div><div class='add'>+                          drive_uart5_tx_py5, drive_uart5_rts_py7,</div><div class='add'>+                          drive_uart5_cts_pz0, drive_usb_vbus_en0_pz1,</div><div class='add'>+                          drive_usb_vbus_en1_pz2, drive_ufs0_rst_pff1,</div><div class='add'>+                          drive_ufs0_ref_clk_pff0 ]</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: nvidia,tegra194-pinmux-aon</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+          type: object</div><div class='add'>+          additionalProperties:</div><div class='add'>+            properties:</div><div class='add'>+              nvidia,pins:</div><div class='add'>+                items:</div><div class='add'>+                  enum: [ can1_dout_paa0, can1_din_paa1, can0_dout_paa2,</div><div class='add'>+                          can0_din_paa3, can0_stb_paa4, can0_en_paa5,</div><div class='add'>+                          can0_wake_paa6, can0_err_paa7, can1_stb_pbb0,</div><div class='add'>+                          can1_en_pbb1, can1_wake_pbb2, can1_err_pbb3,</div><div class='add'>+                          spi2_sck_pcc0, spi2_miso_pcc1, spi2_mosi_pcc2,</div><div class='add'>+                          spi2_cs0_pcc3, touch_clk_pcc4, uart3_tx_pcc5,</div><div class='add'>+                          uart3_rx_pcc6, gen2_i2c_scl_pcc7, gen2_i2c_sda_pdd0,</div><div class='add'>+                          gen8_i2c_scl_pdd1, gen8_i2c_sda_pdd2,</div><div class='add'>+                          safe_state_pee0, vcomp_alert_pee1,</div><div class='add'>+                          ao_retention_n_pee2, batt_oc_pee3, power_on_pee4,</div><div class='add'>+                          pwr_i2c_scl_pee5, pwr_i2c_sda_pee6, sys_reset_n,</div><div class='add'>+                          shutdown_n, pmu_int_n, soc_pwr_req, clk_32k_in,</div><div class='add'>+                          # drive groups</div><div class='add'>+                          drive_shutdown_n, drive_pmu_int_n,</div><div class='add'>+                          drive_safe_state_pee0, drive_vcomp_alert_pee1,</div><div class='add'>+                          drive_soc_pwr_req, drive_batt_oc_pee3,</div><div class='add'>+                          drive_clk_32k_in, drive_power_on_pee4,</div><div class='add'>+                          drive_pwr_i2c_scl_pee5, drive_pwr_i2c_sda_pee6,</div><div class='add'>+                          drive_ao_retention_n_pee2, drive_touch_clk_pcc4,</div><div class='add'>+                          drive_uart3_rx_pcc6, drive_uart3_tx_pcc5,</div><div class='add'>+                          drive_gen8_i2c_sda_pdd2, drive_gen8_i2c_scl_pdd1,</div><div class='add'>+                          drive_spi2_mosi_pcc2, drive_gen2_i2c_scl_pcc7,</div><div class='add'>+                          drive_spi2_cs0_pcc3, drive_gen2_i2c_sda_pdd0,</div><div class='add'>+                          drive_spi2_sck_pcc0, drive_spi2_miso_pcc1,</div><div class='add'>+                          drive_can1_dout_paa0, drive_can1_din_paa1,</div><div class='add'>+                          drive_can0_dout_paa2, drive_can0_din_paa3,</div><div class='add'>+                          drive_can0_stb_paa4, drive_can0_en_paa5,</div><div class='add'>+                          drive_can0_wake_paa6, drive_can0_err_paa7,</div><div class='add'>+                          drive_can1_stb_pbb0, drive_can1_en_pbb1,</div><div class='add'>+                          drive_can1_wake_pbb2, drive_can1_err_pbb3 ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/pinctrl-tegra.h&gt;</div><div class='add'>+</div><div class='add'>+    pinmux@2430000 {</div><div class='add'>+        compatible = "nvidia,tegra194-pinmux";</div><div class='add'>+        reg = &lt;0x2430000 0x17000&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "pex_rst";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pex_rst_c5_out_state&gt;;</div><div class='add'>+</div><div class='add'>+        pex_rst_c5_out_state: pinmux-pex-rst-c5-out {</div><div class='add'>+            pex_rst {</div><div class='add'>+                nvidia,pins = "pex_l5_rst_n_pgg1";</div><div class='add'>+                nvidia,schmitt = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+                nvidia,enable-input = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+                nvidia,io-hv = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+                nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+                nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt<br/>deleted file mode 100644<br/>index 3c8ce28baad6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,143 +0,0 @@</div><div class='del'>-NVIDIA Tegra20 pinmux controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nvidia,tegra20-pinmux"</div><div class='del'>-- reg: Should contain the register physical address and length for each of</div><div class='del'>-  the tri-state, mux, pull-up/down, and pad control register sets.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-Tegra's pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, tristate, drive strength, etc.</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function or tristate parameter. For this</div><div class='del'>-reason, even seemingly boolean values are actually tristates in this binding:</div><div class='del'>-unspecified, off, or on. Unspecified is represented as an absent property,</div><div class='del'>-and off/on are represented as integer values 0 and 1.</div><div class='del'>-</div><div class='del'>-Required subnode-properties:</div><div class='del'>-- nvidia,pins : An array of strings. Each string contains the name of a pin or</div><div class='del'>-    group. Valid values for these names are listed below.</div><div class='del'>-</div><div class='del'>-Optional subnode-properties:</div><div class='del'>-- nvidia,function: A string containing the name of the function to mux to the</div><div class='del'>-  pin or group. Valid values for function names are listed below. See the Tegra</div><div class='del'>-  TRM to determine which are valid for each pin or group.</div><div class='del'>-- nvidia,pull: Integer, representing the pull-down/up to apply to the pin.</div><div class='del'>-    0: none, 1: down, 2: up.</div><div class='del'>-- nvidia,tristate: Integer.</div><div class='del'>-    0: drive, 1: tristate.</div><div class='del'>-- nvidia,high-speed-mode: Integer. Enable high speed mode the pins.</div><div class='del'>-    0: no, 1: yes.</div><div class='del'>-- nvidia,schmitt: Integer. Enables Schmitt Trigger on the input.</div><div class='del'>-    0: no, 1: yes.</div><div class='del'>-- nvidia,low-power-mode: Integer. Valid values 0-3. 0 is least power, 3 is</div><div class='del'>-    most power. Controls the drive power or current. See "Low Power Mode"</div><div class='del'>-    or "LPMD1" and "LPMD0" in the Tegra TRM.</div><div class='del'>-- nvidia,pull-down-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='del'>-    The range of valid values depends on the pingroup. See "CAL_DRVDN" in the</div><div class='del'>-    Tegra TRM.</div><div class='del'>-- nvidia,pull-up-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='del'>-    The range of valid values depends on the pingroup. See "CAL_DRVUP" in the</div><div class='del'>-    Tegra TRM.</div><div class='del'>-- nvidia,slew-rate-rising: Integer. Controls rising signal slew rate. 0 is</div><div class='del'>-    fastest. The range of valid values depends on the pingroup. See</div><div class='del'>-    "DRVDN_SLWR" in the Tegra TRM.</div><div class='del'>-- nvidia,slew-rate-falling: Integer. Controls falling signal slew rate. 0 is</div><div class='del'>-    fastest. The range of valid values depends on the pingroup. See</div><div class='del'>-    "DRVUP_SLWF" in the Tegra TRM.</div><div class='del'>-</div><div class='del'>-Note that many of these properties are only valid for certain specific pins</div><div class='del'>-or groups. See the Tegra TRM and various pinmux spreadsheets for complete</div><div class='del'>-details regarding which groups support which functionality. The Linux pinctrl</div><div class='del'>-driver may also be a useful reference, since it consolidates, disambiguates,</div><div class='del'>-and corrects data from all those sources.</div><div class='del'>-</div><div class='del'>-Valid values for pin and group names are:</div><div class='del'>-</div><div class='del'>-  mux groups:</div><div class='del'>-</div><div class='del'>-    These all support nvidia,function, nvidia,tristate, and many support</div><div class='del'>-    nvidia,pull.</div><div class='del'>-</div><div class='del'>-    ata, atb, atc, atd, ate, cdev1, cdev2, crtp, csus, dap1, dap2, dap3, dap4,</div><div class='del'>-    ddc, dta, dtb, dtc, dtd, dte, dtf, gma, gmb, gmc, gmd, gme, gpu, gpu7,</div><div class='del'>-    gpv, hdint, i2cp, irrx, irtx, kbca, kbcb, kbcc, kbcd, kbce, kbcf, lcsn,</div><div class='del'>-    ld0, ld1, ld2, ld3, ld4, ld5, ld6, ld7, ld8, ld9, ld10, ld11, ld12, ld13,</div><div class='del'>-    ld14, ld15, ld16, ld17, ldc, ldi, lhp0, lhp1, lhp2, lhs, lm0, lm1, lpp,</div><div class='del'>-    lpw0, lpw1, lpw2, lsc0, lsc1, lsck, lsda, lsdi, lspi, lvp0, lvp1, lvs,</div><div class='del'>-    owc, pmc, pta, rm, sdb, sdc, sdd, sdio1, slxa, slxc, slxd, slxk, spdi,</div><div class='del'>-    spdo, spia, spib, spic, spid, spie, spif, spig, spih, uaa, uab, uac, uad,</div><div class='del'>-    uca, ucb, uda.</div><div class='del'>-</div><div class='del'>-  tristate groups:</div><div class='del'>-</div><div class='del'>-    These only support nvidia,pull.</div><div class='del'>-</div><div class='del'>-    ck32, ddrc, pmca, pmcb, pmcc, pmcd, pmce, xm2c, xm2d, ls, lc, ld17_0,</div><div class='del'>-    ld19_18, ld21_20, ld23_22.</div><div class='del'>-</div><div class='del'>-  drive groups:</div><div class='del'>-</div><div class='del'>-    With some exceptions, these support nvidia,high-speed-mode,</div><div class='del'>-    nvidia,schmitt, nvidia,low-power-mode, nvidia,pull-down-strength,</div><div class='del'>-    nvidia,pull-up-strength, nvidia,slew-rate-rising, nvidia,slew-rate-falling.</div><div class='del'>-</div><div class='del'>-    drive_ao1, drive_ao2, drive_at1, drive_at2, drive_cdev1, drive_cdev2,</div><div class='del'>-    drive_csus, drive_dap1, drive_dap2, drive_dap3, drive_dap4, drive_dbg,</div><div class='del'>-    drive_lcd1, drive_lcd2, drive_sdmmc2, drive_sdmmc3, drive_spi, drive_uaa,</div><div class='del'>-    drive_uab, drive_uart2, drive_uart3, drive_vi1, drive_vi2, drive_xm2a,</div><div class='del'>-    drive_xm2c, drive_xm2d, drive_xm2clk, drive_sdio1, drive_crt, drive_ddc,</div><div class='del'>-    drive_gma, drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_owr,</div><div class='del'>-    drive_uda.</div><div class='del'>-</div><div class='del'>-Valid values for nvidia,functions are:</div><div class='del'>-</div><div class='del'>-  ahb_clk, apb_clk, audio_sync, crt, dap1, dap2, dap3, dap4, dap5,</div><div class='del'>-  displaya, displayb, emc_test0_dll, emc_test1_dll, gmi, gmi_int,</div><div class='del'>-  hdmi, i2cp, i2c1, i2c2, i2c3, ide, irda, kbc, mio, mipi_hs, nand,</div><div class='del'>-  osc, owr, pcie, plla_out, pllc_out1, pllm_out1, pllp_out2, pllp_out3,</div><div class='del'>-  pllp_out4, pwm, pwr_intr, pwr_on, rsvd1, rsvd2, rsvd3, rsvd4, rtck,</div><div class='del'>-  sdio1, sdio2, sdio3, sdio4, sflash, spdif, spi1, spi2, spi2_alt,</div><div class='del'>-  spi3, spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,</div><div class='del'>-  vi, vi_sensor_clk, xio</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pinctrl@70000000 {</div><div class='del'>-		compatible = "nvidia,tegra20-pinmux";</div><div class='del'>-		reg = &lt; 0x70000014 0x10    /* Tri-state registers */</div><div class='del'>-			0x70000080 0x20    /* Mux registers */</div><div class='del'>-			0x700000a0 0x14    /* Pull-up/down registers */</div><div class='del'>-			0x70000868 0xa8 &gt;; /* Pad control registers */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example board file extract:</div><div class='del'>-</div><div class='del'>-	pinctrl@70000000 {</div><div class='del'>-		sdio4_default: sdio4_default {</div><div class='del'>-			atb {</div><div class='del'>-				nvidia,pins = "atb", "gma", "gme";</div><div class='del'>-				nvidia,function = "sdio4";</div><div class='del'>-				nvidia,pull = &lt;0&gt;;</div><div class='del'>-				nvidia,tristate = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@c8000600 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdio4_default&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml<br/>new file mode 100644<br/>index 000000000000..432ea40209a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra20-pinmux.yaml</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra20-pinmux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra20 Pinmux Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra20-pinmux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: tri-state registers</div><div class='add'>+      - description: mux register</div><div class='add'>+      - description: pull-up/down registers</div><div class='add'>+      - description: pad control registers</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      phandle: true</div><div class='add'>+</div><div class='add'>+    # pin groups</div><div class='add'>+    additionalProperties:</div><div class='add'>+      $ref: nvidia,tegra-pinmux-common.yaml</div><div class='add'>+      additionalProperties: false</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,pins:</div><div class='add'>+          items:</div><div class='add'>+            enum: [ ata, atb, atc, atd, ate, cdev1, cdev2, crtp, csus, dap1,</div><div class='add'>+                    dap2, dap3, dap4, ddc, dta, dtb, dtc, dtd, dte, dtf, gma,</div><div class='add'>+                    gmb, gmc, gmd, gme, gpu, gpu7, gpv, hdint, i2cp, irrx,</div><div class='add'>+                    irtx, kbca, kbcb, kbcc, kbcd, kbce, kbcf, lcsn, ld0, ld1,</div><div class='add'>+                    ld2, ld3, ld4, ld5, ld6, ld7, ld8, ld9, ld10, ld11, ld12,</div><div class='add'>+                    ld13, ld14, ld15, ld16, ld17, ldc, ldi, lhp0, lhp1, lhp2,</div><div class='add'>+                    lhs, lm0, lm1, lpp, lpw0, lpw1, lpw2, lsc0, lsc1, lsck,</div><div class='add'>+                    lsda, lsdi, lspi, lvp0, lvp1, lvs, owc, pmc, pta, rm, sdb,</div><div class='add'>+                    sdc, sdd, sdio1, slxa, slxc, slxd, slxk, spdi, spdo, spia,</div><div class='add'>+                    spib, spic, spid, spie, spif, spig, spih, uaa, uab, uac,</div><div class='add'>+                    uad, uca, ucb, uda,</div><div class='add'>+                    # tristate groups</div><div class='add'>+                    ck32, ddrc, pmca, pmcb, pmcc, pmcd, pmce, xm2c, xm2d, ls,</div><div class='add'>+                    lc, ld17_0, ld19_18, ld21_20, ld23_22,</div><div class='add'>+                    # drive groups</div><div class='add'>+                    drive_ao1, drive_ao2, drive_at1, drive_at2, drive_cdev1,</div><div class='add'>+                    drive_cdev2, drive_csus, drive_dap1, drive_dap2,</div><div class='add'>+                    drive_dap3, drive_dap4, drive_dbg, drive_lcd1, drive_lcd2,</div><div class='add'>+                    drive_sdmmc2, drive_sdmmc3, drive_spi, drive_uaa,</div><div class='add'>+                    drive_uab, drive_uart2, drive_uart3, drive_vi1, drive_vi2,</div><div class='add'>+                    drive_xm2a, drive_xm2c, drive_xm2d, drive_xm2clk,</div><div class='add'>+                    drive_sdio1, drive_crt, drive_ddc, drive_gma, drive_gmb,</div><div class='add'>+                    drive_gmc, drive_gmd, drive_gme, drive_owr, drive_uda ]</div><div class='add'>+</div><div class='add'>+        nvidia,function:</div><div class='add'>+          enum: [ ahb_clk, apb_clk, audio_sync, crt, dap1, dap2, dap3, dap4,</div><div class='add'>+                  dap5, displaya, displayb, emc_test0_dll, emc_test1_dll, gmi,</div><div class='add'>+                  gmi_int, hdmi, i2cp, i2c1, i2c2, i2c3, ide, irda, kbc, mio,</div><div class='add'>+                  mipi_hs, nand, osc, owr, pcie, plla_out, pllc_out1,</div><div class='add'>+                  pllm_out1, pllp_out2, pllp_out3, pllp_out4, pwm, pwr_intr,</div><div class='add'>+                  pwr_on, rsvd1, rsvd2, rsvd3, rsvd4, rtck, sdio1, sdio2,</div><div class='add'>+                  sdio3, sdio4, sflash, spdif, spi1, spi2, spi2_alt, spi3,</div><div class='add'>+                  spi4, trace, twc, uarta, uartb, uartc, uartd, uarte, ulpi,</div><div class='add'>+                  vi, vi_sensor_clk, xio ]</div><div class='add'>+</div><div class='add'>+        nvidia,pull: true</div><div class='add'>+        nvidia,tristate: true</div><div class='add'>+        nvidia,schmitt: true</div><div class='add'>+        nvidia,pull-down-strength: true</div><div class='add'>+        nvidia,pull-up-strength: true</div><div class='add'>+        nvidia,high-speed-mode: true</div><div class='add'>+        nvidia,low-power-mode: true</div><div class='add'>+        nvidia,slew-rate-rising: true</div><div class='add'>+        nvidia,slew-rate-falling: true</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,pins</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pinctrl@70000000 {</div><div class='add'>+        compatible = "nvidia,tegra20-pinmux";</div><div class='add'>+        reg = &lt;0x70000014 0x10&gt;, /* Tri-state registers */</div><div class='add'>+              &lt;0x70000080 0x20&gt;, /* Mux registers */</div><div class='add'>+              &lt;0x700000a0 0x14&gt;, /* Pull-up/down registers */</div><div class='add'>+              &lt;0x70000868 0xa8&gt;; /* Pad control registers */</div><div class='add'>+</div><div class='add'>+        pinmux {</div><div class='add'>+            atb {</div><div class='add'>+                nvidia,pins = "atb", "gma", "gme";</div><div class='add'>+                nvidia,function = "sdio4";</div><div class='add'>+                nvidia,pull = &lt;0&gt;;</div><div class='add'>+                nvidia,tristate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt<br/>deleted file mode 100644<br/>index 85f211436b8e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,166 +0,0 @@</div><div class='del'>-NVIDIA Tegra210 pinmux controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nvidia,tegra210-pinmux"</div><div class='del'>-- reg: Should contain a list of base address and size pairs for:</div><div class='del'>-  - first entry: The APB_MISC_GP_*_PADCTRL registers (pad control)</div><div class='del'>-  - second entry: The PINMUX_AUX_* registers (pinmux)</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-Tegra's pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, tristate, drive strength, etc.</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function or tristate parameter. For this</div><div class='del'>-reason, even seemingly boolean values are actually tristates in this binding:</div><div class='del'>-unspecified, off, or on. Unspecified is represented as an absent property,</div><div class='del'>-and off/on are represented as integer values 0 and 1.</div><div class='del'>-</div><div class='del'>-See the TRM to determine which properties and values apply to each pin/group.</div><div class='del'>-Macro values for property values are defined in</div><div class='del'>-include/dt-binding/pinctrl/pinctrl-tegra.h.</div><div class='del'>-</div><div class='del'>-Required subnode-properties:</div><div class='del'>-- nvidia,pins : An array of strings. Each string contains the name of a pin or</div><div class='del'>-    group. Valid values for these names are listed below.</div><div class='del'>-</div><div class='del'>-Optional subnode-properties:</div><div class='del'>-- nvidia,function: A string containing the name of the function to mux to the</div><div class='del'>-    pin or group.</div><div class='del'>-- nvidia,pull: Integer, representing the pull-down/up to apply to the pin.</div><div class='del'>-    0: none, 1: down, 2: up.</div><div class='del'>-- nvidia,tristate: Integer.</div><div class='del'>-    0: drive, 1: tristate.</div><div class='del'>-- nvidia,enable-input: Integer. Enable the pin's input path.</div><div class='del'>-    enable :TEGRA_PIN_ENABLE and</div><div class='del'>-    disable or output only: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,open-drain: Integer.</div><div class='del'>-    enable: TEGRA_PIN_ENABLE.</div><div class='del'>-    disable: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,lock: Integer. Lock the pin configuration against further changes</div><div class='del'>-    until reset.</div><div class='del'>-    enable: TEGRA_PIN_ENABLE.</div><div class='del'>-    disable: TEGRA_PIN_DISABLE.</div><div class='del'>-- nvidia,io-hv: Integer. Select high-voltage receivers.</div><div class='del'>-    normal: TEGRA_PIN_DISABLE</div><div class='del'>-    high: TEGRA_PIN_ENABLE</div><div class='del'>-- nvidia,high-speed-mode: Integer. Enable high speed mode the pins.</div><div class='del'>-    normal: TEGRA_PIN_DISABLE</div><div class='del'>-    high: TEGRA_PIN_ENABLE</div><div class='del'>-- nvidia,schmitt: Integer. Enables Schmitt Trigger on the input.</div><div class='del'>-    normal: TEGRA_PIN_DISABLE</div><div class='del'>-    high: TEGRA_PIN_ENABLE</div><div class='del'>-- nvidia,drive-type: Integer. Valid range 0...3.</div><div class='del'>-- nvidia,pull-down-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='del'>-    The range of valid values depends on the pingroup. See "CAL_DRVDN" in the</div><div class='del'>-    Tegra TRM.</div><div class='del'>-- nvidia,pull-up-strength: Integer. Controls drive strength. 0 is weakest.</div><div class='del'>-    The range of valid values depends on the pingroup. See "CAL_DRVUP" in the</div><div class='del'>-    Tegra TRM.</div><div class='del'>-- nvidia,slew-rate-rising: Integer. Controls rising signal slew rate. 0 is</div><div class='del'>-    fastest. The range of valid values depends on the pingroup. See</div><div class='del'>-    "DRVDN_SLWR" in the Tegra TRM.</div><div class='del'>-- nvidia,slew-rate-falling: Integer. Controls falling signal slew rate. 0 is</div><div class='del'>-    fastest. The range of valid values depends on the pingroup. See</div><div class='del'>-    "DRVUP_SLWF" in the Tegra TRM.</div><div class='del'>-</div><div class='del'>-Valid values for pin and group names (nvidia,pin) are:</div><div class='del'>-</div><div class='del'>-  Mux groups:</div><div class='del'>-</div><div class='del'>-    These correspond to Tegra PINMUX_AUX_* (pinmux) registers. Any property</div><div class='del'>-    that exists in those registers may be set for the following pin names.</div><div class='del'>-</div><div class='del'>-    In Tegra210, many pins also have a dedicated APB_MISC_GP_*_PADCTRL</div><div class='del'>-    register. Where that is true, and property that exists in that register</div><div class='del'>-    may also be set on the following pin names.</div><div class='del'>-</div><div class='del'>-    als_prox_int_px3, ap_ready_pv5, ap_wake_bt_ph3, ap_wake_nfc_ph7,</div><div class='del'>-    aud_mclk_pbb0, batt_bcl, bt_rst_ph4, bt_wake_ap_ph5, button_home_py1,</div><div class='del'>-    button_power_on_px5, button_slide_sw_py0, button_vol_down_px7,</div><div class='del'>-    button_vol_up_px6, cam1_mclk_ps0, cam1_pwdn_ps7, cam1_strobe_pt1,</div><div class='del'>-    cam2_mclk_ps1, cam2_pwdn_pt0, cam_af_en_ps5, cam_flash_en_ps6,</div><div class='del'>-    cam_i2c_scl_ps2, cam_i2c_sda_ps3, cam_rst_ps4cam_rst_ps4, clk_32k_in,</div><div class='del'>-    clk_32k_out_py5, clk_req, core_pwr_req, cpu_pwr_req, dap1_din_pb1,</div><div class='del'>-    dap1_dout_pb2, dap1_fs_pb0, dap1_sclk_pb3, dap2_din_paa2, dap2_dout_paa3,</div><div class='del'>-    dap2_fs_paa0, dap2_sclk_paa1, dap4_din_pj5, dap4_dout_pj6, dap4_fs_pj4,</div><div class='del'>-    dap4_sclk_pj7, dmic1_clk_pe0, dmic1_dat_pe1, dmic2_clk_pe2, dmic2_dat_pe3,</div><div class='del'>-    dmic3_clk_pe4, dmic3_dat_pe5, dp_hpd0_pcc6, dvfs_clk_pbb2, dvfs_pwm_pbb1,</div><div class='del'>-    gen1_i2c_scl_pj1, gen1_i2c_sda_pj0, gen2_i2c_scl_pj2, gen2_i2c_sda_pj3,</div><div class='del'>-    gen3_i2c_scl_pf0, gen3_i2c_sda_pf1, gpio_x1_aud_pbb3, gpio_x3_aud_pbb4,</div><div class='del'>-    gps_en_pi2, gps_rst_pi3, hdmi_cec_pcc0, hdmi_int_dp_hpd_pcc1, jtag_rtck,</div><div class='del'>-    lcd_bl_en_pv1, lcd_bl_pwm_pv0, lcd_gpio1_pv3, lcd_gpio2_pv4, lcd_rst_pv2,</div><div class='del'>-    lcd_te_py2, modem_wake_ap_px0, motion_int_px2, nfc_en_pi0, nfc_int_pi1,</div><div class='del'>-    pa6, pcc7, pe6, pe7, pex_l0_clkreq_n_pa1, pex_l0_rst_n_pa0,</div><div class='del'>-    pex_l1_clkreq_n_pa4, pex_l1_rst_n_pa3, pex_wake_n_pa2, ph6, pk0, pk1, pk2,</div><div class='del'>-    pk3, pk4, pk5, pk6, pk7, pl0, pl1, pwr_i2c_scl_py3, pwr_i2c_sda_py4,</div><div class='del'>-    pwr_int_n, pz0, pz1, pz2, pz3, pz4, pz5, qspi_cs_n_pee1, qspi_io0_pee2,</div><div class='del'>-    qspi_io1_pee3, qspi_io2_pee4, qspi_io3_pee5, qspi_sck_pee0,</div><div class='del'>-    sata_led_active_pa5, sdmmc1_clk_pm0, sdmmc1_cmd_pm1, sdmmc1_dat0_pm5,</div><div class='del'>-    sdmmc1_dat1_pm4, sdmmc1_dat2_pm3, sdmmc1_dat3_pm2, sdmmc3_clk_pp0,</div><div class='del'>-    sdmmc3_cmd_pp1, sdmmc3_dat0_pp5, sdmmc3_dat1_pp4, sdmmc3_dat2_pp3,</div><div class='del'>-    sdmmc3_dat3_pp2, shutdown, spdif_in_pcc3, spdif_out_pcc2, spi1_cs0_pc3,</div><div class='del'>-    spi1_cs1_pc4, spi1_miso_pc1, spi1_mosi_pc0, spi1_sck_pc2, spi2_cs0_pb7,</div><div class='del'>-    spi2_cs1_pdd0, spi2_miso_pb5, spi2_mosi_pb4, spi2_sck_pb6, spi4_cs0_pc6,</div><div class='del'>-    spi4_miso_pd0, spi4_mosi_pc7, spi4_sck_pc5, temp_alert_px4, touch_clk_pv7,</div><div class='del'>-    touch_int_px1, touch_rst_pv6, uart1_cts_pu3, uart1_rts_pu2, uart1_rx_pu1,</div><div class='del'>-    uart1_tx_pu0, uart2_cts_pg3, uart2_rts_pg2, uart2_rx_pg1, uart2_tx_pg0,</div><div class='del'>-    uart3_cts_pd4, uart3_rts_pd3, uart3_rx_pd2, uart3_tx_pd1, uart4_cts_pi7,</div><div class='del'>-    uart4_rts_pi6, uart4_rx_pi5, uart4_tx_pi4, usb_vbus_en0_pcc4,</div><div class='del'>-    usb_vbus_en1_pcc5, wifi_en_ph0, wifi_rst_ph1, wifi_wake_ap_ph2</div><div class='del'>-</div><div class='del'>-  Drive groups:</div><div class='del'>-</div><div class='del'>-    These correspond to the Tegra APB_MISC_GP_*_PADCTRL (pad control)</div><div class='del'>-    registers. Note that where one of these registers controls a single pin</div><div class='del'>-    for which a PINMUX_AUX_* exists, see the list above for the pin name to</div><div class='del'>-    use when configuring the pinmux.</div><div class='del'>-</div><div class='del'>-    pa6, pcc7, pe6, pe7, ph6, pk0, pk1, pk2, pk3, pk4, pk5, pk6, pk7, pl0, pl1,</div><div class='del'>-    pz0, pz1, pz2, pz3, pz4, pz5, sdmmc1, sdmmc2, sdmmc3, sdmmc4</div><div class='del'>-</div><div class='del'>-Valid values for nvidia,functions are:</div><div class='del'>-</div><div class='del'>-    aud, bcl, blink, ccla, cec, cldvfs, clk, core, cpu, displaya, displayb,</div><div class='del'>-    dmic1, dmic2, dmic3, dp, dtv, extperiph3, i2c1, i2c2, i2c3, i2cpmu, i2cvi,</div><div class='del'>-    i2s1, i2s2, i2s3, i2s4a, i2s4b, i2s5a, i2s5b, iqc0, iqc1, jtag, pe, pe0,</div><div class='del'>-    pe1, pmi, pwm0, pwm1, pwm2, pwm3, qspi, rsvd0, rsvd1, rsvd2, rsvd3, sata,</div><div class='del'>-    sdmmc1, sdmmc3, shutdown, soc, sor0, sor1, spdif, spi1, spi2, spi3, spi4,</div><div class='del'>-    sys, touch, uart, uarta, uartb, uartc, uartd, usb, vgp1, vgp2, vgp3, vgp4,</div><div class='del'>-    vgp5, vgp6, vimclk, vimclk2</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pinmux: pinmux@70000800 {</div><div class='del'>-		compatible = "nvidia,tegra210-pinmux";</div><div class='del'>-		reg = &lt;0x0 0x700008d4 0x0 0x2a8&gt;, /* Pad control registers */</div><div class='del'>-		      &lt;0x0 0x70003000 0x0 0x1000&gt;; /* Mux registers */</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "boot";</div><div class='del'>-		pinctrl-0 = &lt;&amp;state_boot&gt;;</div><div class='del'>-</div><div class='del'>-		state_boot: pinmux {</div><div class='del'>-			gen1_i2c_scl_pj1 {</div><div class='del'>-				nvidia,pins = "gen1_i2c_scl_pj1",</div><div class='del'>-				nvidia,function = "i2c1";</div><div class='del'>-				nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='del'>-				nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-				nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-				nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-				nvidia,io-hv = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml<br/>new file mode 100644<br/>index 000000000000..28ae2e6d0cbc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.yaml</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra210 Pinmux Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra210-pinmux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: APB_MISC_GP_*_PADCTRL register (pad control)</div><div class='add'>+      - description: PINMUX_AUX_* registers (pinmux)</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      phandle: true</div><div class='add'>+</div><div class='add'>+    # pin groups</div><div class='add'>+    additionalProperties:</div><div class='add'>+      $ref: nvidia,tegra-pinmux-common.yaml</div><div class='add'>+      additionalProperties: false</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,pins:</div><div class='add'>+          items:</div><div class='add'>+            enum: [ als_prox_int_px3, ap_ready_pv5, ap_wake_bt_ph3,</div><div class='add'>+                    ap_wake_nfc_ph7, aud_mclk_pbb0, batt_bcl, bt_rst_ph4,</div><div class='add'>+                    bt_wake_ap_ph5, button_home_py1, button_power_on_px5,</div><div class='add'>+                    button_slide_sw_py0, button_vol_down_px7,</div><div class='add'>+                    button_vol_up_px6, cam1_mclk_ps0, cam1_pwdn_ps7,</div><div class='add'>+                    cam1_strobe_pt1, cam2_mclk_ps1, cam2_pwdn_pt0,</div><div class='add'>+                    cam_af_en_ps5, cam_flash_en_ps6, cam_i2c_scl_ps2,</div><div class='add'>+                    cam_i2c_sda_ps3, cam_rst_ps4, clk_32k_in, clk_32k_out_py5,</div><div class='add'>+                    clk_req, core_pwr_req, cpu_pwr_req, dap1_din_pb1,</div><div class='add'>+                    dap1_dout_pb2, dap1_fs_pb0, dap1_sclk_pb3, dap2_din_paa2,</div><div class='add'>+                    dap2_dout_paa3, dap2_fs_paa0, dap2_sclk_paa1, dap4_din_pj5,</div><div class='add'>+                    dap4_dout_pj6, dap4_fs_pj4, dap4_sclk_pj7, dmic1_clk_pe0,</div><div class='add'>+                    dmic1_dat_pe1, dmic2_clk_pe2, dmic2_dat_pe3, dmic3_clk_pe4,</div><div class='add'>+                    dmic3_dat_pe5, dp_hpd0_pcc6, dvfs_clk_pbb2, dvfs_pwm_pbb1,</div><div class='add'>+                    gen1_i2c_scl_pj1, gen1_i2c_sda_pj0, gen2_i2c_scl_pj2,</div><div class='add'>+                    gen2_i2c_sda_pj3, gen3_i2c_scl_pf0, gen3_i2c_sda_pf1,</div><div class='add'>+                    gpio_x1_aud_pbb3, gpio_x3_aud_pbb4, gps_en_pi2,</div><div class='add'>+                    gps_rst_pi3, hdmi_cec_pcc0, hdmi_int_dp_hpd_pcc1,</div><div class='add'>+                    jtag_rtck, lcd_bl_en_pv1, lcd_bl_pwm_pv0, lcd_gpio1_pv3,</div><div class='add'>+                    lcd_gpio2_pv4, lcd_rst_pv2, lcd_te_py2, modem_wake_ap_px0,</div><div class='add'>+                    motion_int_px2, nfc_en_pi0, nfc_int_pi1, pa6, pcc7, pe6,</div><div class='add'>+                    pe7, pex_l0_clkreq_n_pa1, pex_l0_rst_n_pa0,</div><div class='add'>+                    pex_l1_clkreq_n_pa4, pex_l1_rst_n_pa3, pex_wake_n_pa2, ph6,</div><div class='add'>+                    pk0, pk1, pk2, pk3, pk4, pk5, pk6, pk7, pl0, pl1,</div><div class='add'>+                    pwr_i2c_scl_py3, pwr_i2c_sda_py4, pwr_int_n, pz0, pz1, pz2,</div><div class='add'>+                    pz3, pz4, pz5, qspi_cs_n_pee1, qspi_io0_pee2,</div><div class='add'>+                    qspi_io1_pee3, qspi_io2_pee4, qspi_io3_pee5, qspi_sck_pee0,</div><div class='add'>+                    sata_led_active_pa5, sdmmc1_clk_pm0, sdmmc1_cmd_pm1,</div><div class='add'>+                    sdmmc1_dat0_pm5, sdmmc1_dat1_pm4, sdmmc1_dat2_pm3,</div><div class='add'>+                    sdmmc1_dat3_pm2, sdmmc3_clk_pp0, sdmmc3_cmd_pp1,</div><div class='add'>+                    sdmmc3_dat0_pp5, sdmmc3_dat1_pp4, sdmmc3_dat2_pp3,</div><div class='add'>+                    sdmmc3_dat3_pp2, shutdown, spdif_in_pcc3, spdif_out_pcc2,</div><div class='add'>+                    spi1_cs0_pc3, spi1_cs1_pc4, spi1_miso_pc1, spi1_mosi_pc0,</div><div class='add'>+                    spi1_sck_pc2, spi2_cs0_pb7, spi2_cs1_pdd0, spi2_miso_pb5,</div><div class='add'>+                    spi2_mosi_pb4, spi2_sck_pb6, spi4_cs0_pc6, spi4_miso_pd0,</div><div class='add'>+                    spi4_mosi_pc7, spi4_sck_pc5, temp_alert_px4, touch_clk_pv7,</div><div class='add'>+                    touch_int_px1, touch_rst_pv6, uart1_cts_pu3, uart1_rts_pu2,</div><div class='add'>+                    uart1_rx_pu1, uart1_tx_pu0, uart2_cts_pg3, uart2_rts_pg2,</div><div class='add'>+                    uart2_rx_pg1, uart2_tx_pg0, uart3_cts_pd4, uart3_rts_pd3,</div><div class='add'>+                    uart3_rx_pd2, uart3_tx_pd1, uart4_cts_pi7, uart4_rts_pi6,</div><div class='add'>+                    uart4_rx_pi5, uart4_tx_pi4, usb_vbus_en0_pcc4,</div><div class='add'>+                    usb_vbus_en1_pcc5, wifi_en_ph0, wifi_rst_ph1,</div><div class='add'>+                    wifi_wake_ap_ph2,</div><div class='add'>+                    # drive groups</div><div class='add'>+                    drive_pa6, drive_pcc7, drive_pe6, drive_pe7, drive_ph6,</div><div class='add'>+                    drive_pk0, drive_pk1, drive_pk2, drive_pk3, drive_pk4,</div><div class='add'>+                    drive_pk5, drive_pk6, drive_pk7, drive_pl0, drive_pl1,</div><div class='add'>+                    drive_pz0, drive_pz1, drive_pz2, drive_pz3, drive_pz4,</div><div class='add'>+                    drive_pz5, drive_sdmmc1, drive_sdmmc2, drive_sdmmc3,</div><div class='add'>+                    drive_sdmmc4 ]</div><div class='add'>+</div><div class='add'>+        nvidia,function:</div><div class='add'>+          enum: [ aud, bcl, blink, ccla, cec, cldvfs, clk, core, cpu, displaya,</div><div class='add'>+                  displayb, dmic1, dmic2, dmic3, dp, dtv, extperiph3, i2c1,</div><div class='add'>+                  i2c2, i2c3, i2cpmu, i2cvi, i2s1, i2s2, i2s3, i2s4a, i2s4b,</div><div class='add'>+                  i2s5a, i2s5b, iqc0, iqc1, jtag, pe, pe0, pe1, pmi, pwm0,</div><div class='add'>+                  pwm1, pwm2, pwm3, qspi, rsvd0, rsvd1, rsvd2, rsvd3, sata,</div><div class='add'>+                  sdmmc1, sdmmc3, shutdown, soc, sor0, sor1, spdif, spi1, spi2,</div><div class='add'>+                  spi3, spi4, sys, touch, uart, uarta, uartb, uartc, uartd,</div><div class='add'>+                  usb, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6, vimclk, vimclk2 ]</div><div class='add'>+</div><div class='add'>+        nvidia,pull: true</div><div class='add'>+        nvidia,tristate: true</div><div class='add'>+        nvidia,pull-down-strength: true</div><div class='add'>+        nvidia,pull-up-strength: true</div><div class='add'>+        nvidia,high-speed-mode: true</div><div class='add'>+        nvidia,enable-input: true</div><div class='add'>+        nvidia,open-drain: true</div><div class='add'>+        nvidia,lock: true</div><div class='add'>+        nvidia,drive-type: true</div><div class='add'>+        nvidia,io-hv: true</div><div class='add'>+        nvidia,slew-rate-rising: true</div><div class='add'>+        nvidia,slew-rate-falling: true</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,pins</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/pinctrl-tegra.h&gt;</div><div class='add'>+</div><div class='add'>+    pinmux: pinmux@70000800 {</div><div class='add'>+        compatible = "nvidia,tegra210-pinmux";</div><div class='add'>+        reg = &lt;0x700008d4 0x02a8&gt;, /* Pad control registers */</div><div class='add'>+              &lt;0x70003000 0x1000&gt;; /* Mux registers */</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "boot";</div><div class='add'>+        pinctrl-0 = &lt;&amp;state_boot&gt;;</div><div class='add'>+</div><div class='add'>+        state_boot: pinmux {</div><div class='add'>+            gen1_i2c_scl_pj1 {</div><div class='add'>+                nvidia,pins = "gen1_i2c_scl_pj1";</div><div class='add'>+                nvidia,function = "i2c1";</div><div class='add'>+                nvidia,pull = &lt;TEGRA_PIN_PULL_NONE&gt;;</div><div class='add'>+                nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='add'>+                nvidia,enable-input = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+                nvidia,open-drain = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+                nvidia,io-hv = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt<br/>deleted file mode 100644<br/>index 0e6354c11e6d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,144 +0,0 @@</div><div class='del'>-NVIDIA Tegra30 pinmux controller</div><div class='del'>-</div><div class='del'>-The Tegra30 pinctrl binding is very similar to the Tegra20 pinctrl binding,</div><div class='del'>-as described in nvidia,tegra20-pinmux.txt. In fact, this document assumes</div><div class='del'>-that binding as a baseline, and only documents the differences between the</div><div class='del'>-two bindings.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nvidia,tegra30-pinmux"</div><div class='del'>-- reg: Should contain the register physical address and length for each of</div><div class='del'>-  the pad control and mux registers.</div><div class='del'>-</div><div class='del'>-Tegra30 adds the following optional properties for pin configuration subnodes:</div><div class='del'>-- nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes.</div><div class='del'>-- nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes.</div><div class='del'>-- nvidia,lock: Integer. Lock the pin configuration against further changes</div><div class='del'>-    until reset. 0: no, 1: yes.</div><div class='del'>-- nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes.</div><div class='del'>-</div><div class='del'>-As with Tegra20, see the Tegra TRM for complete details regarding which groups</div><div class='del'>-support which functionality.</div><div class='del'>-</div><div class='del'>-Valid values for pin and group names are:</div><div class='del'>-</div><div class='del'>-  per-pin mux groups:</div><div class='del'>-</div><div class='del'>-    These all support nvidia,function, nvidia,tristate, nvidia,pull,</div><div class='del'>-    nvidia,enable-input, nvidia,lock. Some support nvidia,open-drain,</div><div class='del'>-    nvidia,io-reset.</div><div class='del'>-</div><div class='del'>-    clk_32k_out_pa0, uart3_cts_n_pa1, dap2_fs_pa2, dap2_sclk_pa3,</div><div class='del'>-    dap2_din_pa4, dap2_dout_pa5, sdmmc3_clk_pa6, sdmmc3_cmd_pa7, gmi_a17_pb0,</div><div class='del'>-    gmi_a18_pb1, lcd_pwr0_pb2, lcd_pclk_pb3, sdmmc3_dat3_pb4, sdmmc3_dat2_pb5,</div><div class='del'>-    sdmmc3_dat1_pb6, sdmmc3_dat0_pb7, uart3_rts_n_pc0, lcd_pwr1_pc1,</div><div class='del'>-    uart2_txd_pc2, uart2_rxd_pc3, gen1_i2c_scl_pc4, gen1_i2c_sda_pc5,</div><div class='del'>-    lcd_pwr2_pc6, gmi_wp_n_pc7, sdmmc3_dat5_pd0, sdmmc3_dat4_pd1, lcd_dc1_pd2,</div><div class='del'>-    sdmmc3_dat6_pd3, sdmmc3_dat7_pd4, vi_d1_pd5, vi_vsync_pd6, vi_hsync_pd7,</div><div class='del'>-    lcd_d0_pe0, lcd_d1_pe1, lcd_d2_pe2, lcd_d3_pe3, lcd_d4_pe4, lcd_d5_pe5,</div><div class='del'>-    lcd_d6_pe6, lcd_d7_pe7, lcd_d8_pf0, lcd_d9_pf1, lcd_d10_pf2, lcd_d11_pf3,</div><div class='del'>-    lcd_d12_pf4, lcd_d13_pf5, lcd_d14_pf6, lcd_d15_pf7, gmi_ad0_pg0,</div><div class='del'>-    gmi_ad1_pg1, gmi_ad2_pg2, gmi_ad3_pg3, gmi_ad4_pg4, gmi_ad5_pg5,</div><div class='del'>-    gmi_ad6_pg6, gmi_ad7_pg7, gmi_ad8_ph0, gmi_ad9_ph1, gmi_ad10_ph2,</div><div class='del'>-    gmi_ad11_ph3, gmi_ad12_ph4, gmi_ad13_ph5, gmi_ad14_ph6, gmi_ad15_ph7,</div><div class='del'>-    gmi_wr_n_pi0, gmi_oe_n_pi1, gmi_dqs_pi2, gmi_cs6_n_pi3, gmi_rst_n_pi4,</div><div class='del'>-    gmi_iordy_pi5, gmi_cs7_n_pi6, gmi_wait_pi7, gmi_cs0_n_pj0, lcd_de_pj1,</div><div class='del'>-    gmi_cs1_n_pj2, lcd_hsync_pj3, lcd_vsync_pj4, uart2_cts_n_pj5,</div><div class='del'>-    uart2_rts_n_pj6, gmi_a16_pj7, gmi_adv_n_pk0, gmi_clk_pk1, gmi_cs4_n_pk2,</div><div class='del'>-    gmi_cs2_n_pk3, gmi_cs3_n_pk4, spdif_out_pk5, spdif_in_pk6, gmi_a19_pk7,</div><div class='del'>-    vi_d2_pl0, vi_d3_pl1, vi_d4_pl2, vi_d5_pl3, vi_d6_pl4, vi_d7_pl5,</div><div class='del'>-    vi_d8_pl6, vi_d9_pl7, lcd_d16_pm0, lcd_d17_pm1, lcd_d18_pm2, lcd_d19_pm3,</div><div class='del'>-    lcd_d20_pm4, lcd_d21_pm5, lcd_d22_pm6, lcd_d23_pm7, dap1_fs_pn0,</div><div class='del'>-    dap1_din_pn1, dap1_dout_pn2, dap1_sclk_pn3, lcd_cs0_n_pn4, lcd_sdout_pn5,</div><div class='del'>-    lcd_dc0_pn6, hdmi_int_pn7, ulpi_data7_po0, ulpi_data0_po1, ulpi_data1_po2,</div><div class='del'>-    ulpi_data2_po3, ulpi_data3_po4, ulpi_data4_po5, ulpi_data5_po6,</div><div class='del'>-    ulpi_data6_po7, dap3_fs_pp0, dap3_din_pp1, dap3_dout_pp2, dap3_sclk_pp3,</div><div class='del'>-    dap4_fs_pp4, dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7, kb_col0_pq0,</div><div class='del'>-    kb_col1_pq1, kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5,</div><div class='del'>-    kb_col6_pq6, kb_col7_pq7, kb_row0_pr0, kb_row1_pr1, kb_row2_pr2,</div><div class='del'>-    kb_row3_pr3, kb_row4_pr4, kb_row5_pr5, kb_row6_pr6, kb_row7_pr7,</div><div class='del'>-    kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_row11_ps3, kb_row12_ps4,</div><div class='del'>-    kb_row13_ps5, kb_row14_ps6, kb_row15_ps7, vi_pclk_pt0, vi_mclk_pt1,</div><div class='del'>-    vi_d10_pt2, vi_d11_pt3, vi_d0_pt4, gen2_i2c_scl_pt5, gen2_i2c_sda_pt6,</div><div class='del'>-    sdmmc4_cmd_pt7, pu0, pu1, pu2, pu3, pu4, pu5, pu6, jtag_rtck_pu7, pv0,</div><div class='del'>-    pv1, pv2, pv3, ddc_scl_pv4, ddc_sda_pv5, crt_hsync_pv6, crt_vsync_pv7,</div><div class='del'>-    lcd_cs1_n_pw0, lcd_m1_pw1, spi2_cs1_n_pw2, spi2_cs2_n_pw3, clk1_out_pw4,</div><div class='del'>-    clk2_out_pw5, uart3_txd_pw6, uart3_rxd_pw7, spi2_mosi_px0, spi2_miso_px1,</div><div class='del'>-    spi2_sck_px2, spi2_cs0_n_px3, spi1_mosi_px4, spi1_sck_px5, spi1_cs0_n_px6,</div><div class='del'>-    spi1_miso_px7, ulpi_clk_py0, ulpi_dir_py1, ulpi_nxt_py2, ulpi_stp_py3,</div><div class='del'>-    sdmmc1_dat3_py4, sdmmc1_dat2_py5, sdmmc1_dat1_py6, sdmmc1_dat0_py7,</div><div class='del'>-    sdmmc1_clk_pz0, sdmmc1_cmd_pz1, lcd_sdin_pz2, lcd_wr_n_pz3, lcd_sck_pz4,</div><div class='del'>-    sys_clk_req_pz5, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7, sdmmc4_dat0_paa0,</div><div class='del'>-    sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3, sdmmc4_dat4_paa4,</div><div class='del'>-    sdmmc4_dat5_paa5, sdmmc4_dat6_paa6, sdmmc4_dat7_paa7, pbb0,</div><div class='del'>-    cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6, pbb7,</div><div class='del'>-    cam_mclk_pcc0, pcc1, pcc2, sdmmc4_rst_n_pcc3, sdmmc4_clk_pcc4,</div><div class='del'>-    clk2_req_pcc5, pex_l2_rst_n_pcc6, pex_l2_clkreq_n_pcc7,</div><div class='del'>-    pex_l0_prsnt_n_pdd0, pex_l0_rst_n_pdd1, pex_l0_clkreq_n_pdd2,</div><div class='del'>-    pex_wake_n_pdd3, pex_l1_prsnt_n_pdd4, pex_l1_rst_n_pdd5,</div><div class='del'>-    pex_l1_clkreq_n_pdd6, pex_l2_prsnt_n_pdd7, clk3_out_pee0, clk3_req_pee1,</div><div class='del'>-    clk1_req_pee2, hdmi_cec_pee3, clk_32k_in, core_pwr_req, cpu_pwr_req, owr,</div><div class='del'>-    pwr_int_n.</div><div class='del'>-</div><div class='del'>-  drive groups:</div><div class='del'>-</div><div class='del'>-    These all support nvidia,pull-down-strength, nvidia,pull-up-strength,</div><div class='del'>-    nvidia,slew-rate-rising, nvidia,slew-rate-falling. Most but not all</div><div class='del'>-    support nvidia,high-speed-mode, nvidia,schmitt, nvidia,low-power-mode.</div><div class='del'>-</div><div class='del'>-    ao1, ao2, at1, at2, at3, at4, at5, cdev1, cdev2, cec, crt, csus, dap1,</div><div class='del'>-    dap2, dap3, dap4, dbg, ddc, dev3, gma, gmb, gmc, gmd, gme, gmf, gmg,</div><div class='del'>-    gmh, gpv, lcd1, lcd2, owr, sdio1, sdio2, sdio3, spi, uaa, uab, uart2,</div><div class='del'>-    uart3, uda, vi1.</div><div class='del'>-</div><div class='del'>-Valid values for nvidia,functions are:</div><div class='del'>-</div><div class='del'>-  blink, cec, clk_12m_out, clk_32k_in, core_pwr_req, cpu_pwr_req, crt,</div><div class='del'>-  dap, ddr, dev3, displaya, displayb, dtv, extperiph1, extperiph2,</div><div class='del'>-  extperiph3, gmi, gmi_alt, hda, hdcp, hdmi, hsi, i2c1, i2c2, i2c3,</div><div class='del'>-  i2c4, i2cpwr, i2s0, i2s1, i2s2, i2s3, i2s4, invalid, kbc, mio, nand,</div><div class='del'>-  nand_alt, owr, pcie, pwm0, pwm1, pwm2, pwm3, pwr_int_n, rsvd1, rsvd2,</div><div class='del'>-  rsvd3, rsvd4, rtck, sata, sdmmc1, sdmmc2, sdmmc3, sdmmc4, spdif, spi1,</div><div class='del'>-  spi2, spi2_alt, spi3, spi4, spi5, spi6, sysclk, test, trace, uarta,</div><div class='del'>-  uartb, uartc, uartd, uarte, ulpi, vgp1, vgp2, vgp3, vgp4, vgp5, vgp6,</div><div class='del'>-  vi, vi_alt1, vi_alt2, vi_alt3</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pinctrl@70000000 {</div><div class='del'>-		compatible = "nvidia,tegra30-pinmux";</div><div class='del'>-		reg = &lt; 0x70000868 0xd0     /* Pad control registers */</div><div class='del'>-			0x70003000 0x3e0 &gt;; /* Mux registers */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example board file extract:</div><div class='del'>-</div><div class='del'>-	pinctrl@70000000 {</div><div class='del'>-		sdmmc4_default: pinmux {</div><div class='del'>-			sdmmc4_clk_pcc4 {</div><div class='del'>-				nvidia,pins =	"sdmmc4_clk_pcc4",</div><div class='del'>-						"sdmmc4_rst_n_pcc3";</div><div class='del'>-				nvidia,function = "sdmmc4";</div><div class='del'>-				nvidia,pull = &lt;0&gt;;</div><div class='del'>-				nvidia,tristate = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-			sdmmc4_dat0_paa0 {</div><div class='del'>-				nvidia,pins =	"sdmmc4_dat0_paa0",</div><div class='del'>-						"sdmmc4_dat1_paa1",</div><div class='del'>-						"sdmmc4_dat2_paa2",</div><div class='del'>-						"sdmmc4_dat3_paa3",</div><div class='del'>-						"sdmmc4_dat4_paa4",</div><div class='del'>-						"sdmmc4_dat5_paa5",</div><div class='del'>-						"sdmmc4_dat6_paa6",</div><div class='del'>-						"sdmmc4_dat7_paa7";</div><div class='del'>-				nvidia,function = "sdmmc4";</div><div class='del'>-				nvidia,pull = &lt;2&gt;;</div><div class='del'>-				nvidia,tristate = &lt;0&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	sdhci@78000400 {</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;sdmmc4_default&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml<br/>new file mode 100644<br/>index 000000000000..c0eda7848767<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nvidia,tegra30-pinmux.yaml</a></div><div class='hunk'>@@ -0,0 +1,176 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra30-pinmux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra30 pinmux Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra30-pinmux</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: pad control registers</div><div class='add'>+      - description: mux registers</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pinmux(-[a-z0-9-_]+)?$":</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      phandle: true</div><div class='add'>+</div><div class='add'>+    # pin groups</div><div class='add'>+    additionalProperties:</div><div class='add'>+      $ref: nvidia,tegra-pinmux-common.yaml</div><div class='add'>+      additionalProperties: false</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,pins:</div><div class='add'>+          items:</div><div class='add'>+            enum: [ clk_32k_out_pa0, uart3_cts_n_pa1, dap2_fs_pa2,</div><div class='add'>+                    dap2_sclk_pa3, dap2_din_pa4, dap2_dout_pa5, sdmmc3_clk_pa6,</div><div class='add'>+                    sdmmc3_cmd_pa7, gmi_a17_pb0, gmi_a18_pb1, lcd_pwr0_pb2,</div><div class='add'>+                    lcd_pclk_pb3, sdmmc3_dat3_pb4, sdmmc3_dat2_pb5,</div><div class='add'>+                    sdmmc3_dat1_pb6, sdmmc3_dat0_pb7, uart3_rts_n_pc0,</div><div class='add'>+                    lcd_pwr1_pc1, uart2_txd_pc2, uart2_rxd_pc3,</div><div class='add'>+                    gen1_i2c_scl_pc4, gen1_i2c_sda_pc5, lcd_pwr2_pc6,</div><div class='add'>+                    gmi_wp_n_pc7, sdmmc3_dat5_pd0, sdmmc3_dat4_pd1,</div><div class='add'>+                    lcd_dc1_pd2, sdmmc3_dat6_pd3, sdmmc3_dat7_pd4, vi_d1_pd5,</div><div class='add'>+                    vi_vsync_pd6, vi_hsync_pd7, lcd_d0_pe0, lcd_d1_pe1,</div><div class='add'>+                    lcd_d2_pe2, lcd_d3_pe3, lcd_d4_pe4, lcd_d5_pe5, lcd_d6_pe6,</div><div class='add'>+                    lcd_d7_pe7, lcd_d8_pf0, lcd_d9_pf1, lcd_d10_pf2,</div><div class='add'>+                    lcd_d11_pf3, lcd_d12_pf4, lcd_d13_pf5, lcd_d14_pf6,</div><div class='add'>+                    lcd_d15_pf7, gmi_ad0_pg0, gmi_ad1_pg1, gmi_ad2_pg2,</div><div class='add'>+                    gmi_ad3_pg3, gmi_ad4_pg4, gmi_ad5_pg5, gmi_ad6_pg6,</div><div class='add'>+                    gmi_ad7_pg7, gmi_ad8_ph0, gmi_ad9_ph1, gmi_ad10_ph2,</div><div class='add'>+                    gmi_ad11_ph3, gmi_ad12_ph4, gmi_ad13_ph5, gmi_ad14_ph6,</div><div class='add'>+                    gmi_ad15_ph7, gmi_wr_n_pi0, gmi_oe_n_pi1, gmi_dqs_pi2,</div><div class='add'>+                    gmi_cs6_n_pi3, gmi_rst_n_pi4, gmi_iordy_pi5, gmi_cs7_n_pi6,</div><div class='add'>+                    gmi_wait_pi7, gmi_cs0_n_pj0, lcd_de_pj1, gmi_cs1_n_pj2,</div><div class='add'>+                    lcd_hsync_pj3, lcd_vsync_pj4, uart2_cts_n_pj5,</div><div class='add'>+                    uart2_rts_n_pj6, gmi_a16_pj7, gmi_adv_n_pk0, gmi_clk_pk1,</div><div class='add'>+                    gmi_cs4_n_pk2, gmi_cs2_n_pk3, gmi_cs3_n_pk4, spdif_out_pk5,</div><div class='add'>+                    spdif_in_pk6, gmi_a19_pk7, vi_d2_pl0, vi_d3_pl1, vi_d4_pl2,</div><div class='add'>+                    vi_d5_pl3, vi_d6_pl4, vi_d7_pl5, vi_d8_pl6, vi_d9_pl7,</div><div class='add'>+                    lcd_d16_pm0, lcd_d17_pm1, lcd_d18_pm2, lcd_d19_pm3,</div><div class='add'>+                    lcd_d20_pm4, lcd_d21_pm5, lcd_d22_pm6, lcd_d23_pm7,</div><div class='add'>+                    dap1_fs_pn0, dap1_din_pn1, dap1_dout_pn2, dap1_sclk_pn3,</div><div class='add'>+                    lcd_cs0_n_pn4, lcd_sdout_pn5, lcd_dc0_pn6, hdmi_int_pn7,</div><div class='add'>+                    ulpi_data7_po0, ulpi_data0_po1, ulpi_data1_po2,</div><div class='add'>+                    ulpi_data2_po3, ulpi_data3_po4, ulpi_data4_po5,</div><div class='add'>+                    ulpi_data5_po6, ulpi_data6_po7, dap3_fs_pp0, dap3_din_pp1,</div><div class='add'>+                    dap3_dout_pp2, dap3_sclk_pp3, dap4_fs_pp4, dap4_din_pp5,</div><div class='add'>+                    dap4_dout_pp6, dap4_sclk_pp7, kb_col0_pq0, kb_col1_pq1,</div><div class='add'>+                    kb_col2_pq2, kb_col3_pq3, kb_col4_pq4, kb_col5_pq5,</div><div class='add'>+                    kb_col6_pq6, kb_col7_pq7, kb_row0_pr0, kb_row1_pr1,</div><div class='add'>+                    kb_row2_pr2, kb_row3_pr3, kb_row4_pr4, kb_row5_pr5,</div><div class='add'>+                    kb_row6_pr6, kb_row7_pr7, kb_row8_ps0, kb_row9_ps1,</div><div class='add'>+                    kb_row10_ps2, kb_row11_ps3, kb_row12_ps4, kb_row13_ps5,</div><div class='add'>+                    kb_row14_ps6, kb_row15_ps7, vi_pclk_pt0, vi_mclk_pt1,</div><div class='add'>+                    vi_d10_pt2, vi_d11_pt3, vi_d0_pt4, gen2_i2c_scl_pt5,</div><div class='add'>+                    gen2_i2c_sda_pt6, sdmmc4_cmd_pt7, pu0, pu1, pu2, pu3, pu4,</div><div class='add'>+                    pu5, pu6, jtag_rtck_pu7, pv0, pv1, pv2, pv3, ddc_scl_pv4,</div><div class='add'>+                    ddc_sda_pv5, crt_hsync_pv6, crt_vsync_pv7, lcd_cs1_n_pw0,</div><div class='add'>+                    lcd_m1_pw1, spi2_cs1_n_pw2, spi2_cs2_n_pw3, clk1_out_pw4,</div><div class='add'>+                    clk2_out_pw5, uart3_txd_pw6, uart3_rxd_pw7, spi2_mosi_px0,</div><div class='add'>+                    spi2_miso_px1, spi2_sck_px2, spi2_cs0_n_px3, spi1_mosi_px4,</div><div class='add'>+                    spi1_sck_px5, spi1_cs0_n_px6, spi1_miso_px7, ulpi_clk_py0,</div><div class='add'>+                    ulpi_dir_py1, ulpi_nxt_py2, ulpi_stp_py3, sdmmc1_dat3_py4,</div><div class='add'>+                    sdmmc1_dat2_py5, sdmmc1_dat1_py6, sdmmc1_dat0_py7,</div><div class='add'>+                    sdmmc1_clk_pz0, sdmmc1_cmd_pz1, lcd_sdin_pz2, lcd_wr_n_pz3,</div><div class='add'>+                    lcd_sck_pz4, sys_clk_req_pz5, pwr_i2c_scl_pz6,</div><div class='add'>+                    pwr_i2c_sda_pz7, sdmmc4_dat0_paa0, sdmmc4_dat1_paa1,</div><div class='add'>+                    sdmmc4_dat2_paa2, sdmmc4_dat3_paa3, sdmmc4_dat4_paa4,</div><div class='add'>+                    sdmmc4_dat5_paa5, sdmmc4_dat6_paa6, sdmmc4_dat7_paa7, pbb0,</div><div class='add'>+                    cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6,</div><div class='add'>+                    pbb7, cam_mclk_pcc0, pcc1, pcc2, sdmmc4_rst_n_pcc3,</div><div class='add'>+                    sdmmc4_clk_pcc4, clk2_req_pcc5, pex_l2_rst_n_pcc6,</div><div class='add'>+                    pex_l2_clkreq_n_pcc7, pex_l0_prsnt_n_pdd0,</div><div class='add'>+                    pex_l0_rst_n_pdd1, pex_l0_clkreq_n_pdd2, pex_wake_n_pdd3,</div><div class='add'>+                    pex_l1_prsnt_n_pdd4, pex_l1_rst_n_pdd5,</div><div class='add'>+                    pex_l1_clkreq_n_pdd6, pex_l2_prsnt_n_pdd7, clk3_out_pee0,</div><div class='add'>+                    clk3_req_pee1, clk1_req_pee2, hdmi_cec_pee3, clk_32k_in,</div><div class='add'>+                    core_pwr_req, cpu_pwr_req, owr, pwr_int_n,</div><div class='add'>+                    # drive groups</div><div class='add'>+                    drive_ao1, drive_ao2, drive_at1, drive_at2, drive_at3,</div><div class='add'>+                    drive_at4, drive_at5, drive_cdev1, drive_cdev2, drive_cec,</div><div class='add'>+                    drive_crt, drive_csus, drive_dap1, drive_dap2, drive_dap3,</div><div class='add'>+                    drive_dap4, drive_dbg, drive_ddc, drive_dev3, drive_gma,</div><div class='add'>+                    drive_gmb, drive_gmc, drive_gmd, drive_gme, drive_gmf,</div><div class='add'>+                    drive_gmg, drive_gmh, drive_gpv, drive_lcd1, drive_lcd2,</div><div class='add'>+                    drive_owr, drive_sdio1, drive_sdio2, drive_sdio3,</div><div class='add'>+                    drive_spi, drive_uaa, drive_uab, drive_uart2, drive_uart3,</div><div class='add'>+                    drive_uda, drive_vi1 ]</div><div class='add'>+</div><div class='add'>+        nvidia,function:</div><div class='add'>+          enum: [ blink, cec, clk_12m_out, clk_32k_in, core_pwr_req,</div><div class='add'>+                  cpu_pwr_req, crt, dap, ddr, dev3, displaya, displayb, dtv,</div><div class='add'>+                  extperiph1, extperiph2, extperiph3, gmi, gmi_alt, hda, hdcp,</div><div class='add'>+                  hdmi, hsi, i2c1, i2c2, i2c3, i2c4, i2cpwr, i2s0, i2s1, i2s2,</div><div class='add'>+                  i2s3, i2s4, invalid, kbc, mio, nand, nand_alt, owr, pcie,</div><div class='add'>+                  pwm0, pwm1, pwm2, pwm3, pwr_int_n, rsvd1, rsvd2, rsvd3,</div><div class='add'>+                  rsvd4, rtck, sata, sdmmc1, sdmmc2, sdmmc3, sdmmc4, spdif,</div><div class='add'>+                  spi1, spi2, spi2_alt, spi3, spi4, spi5, spi6, sysclk, test,</div><div class='add'>+                  trace, uarta, uartb, uartc, uartd, uarte, ulpi, vgp1, vgp2,</div><div class='add'>+                  vgp3, vgp4, vgp5, vgp6, vi, vi_alt1, vi_alt2, vi_alt3 ]</div><div class='add'>+</div><div class='add'>+        nvidia,pull: true</div><div class='add'>+        nvidia,tristate: true</div><div class='add'>+        nvidia,schmitt: true</div><div class='add'>+        nvidia,pull-down-strength: true</div><div class='add'>+        nvidia,pull-up-strength: true</div><div class='add'>+        nvidia,high-speed-mode: true</div><div class='add'>+        nvidia,low-power-mode: true</div><div class='add'>+        nvidia,enable-input: true</div><div class='add'>+        nvidia,open-drain: true</div><div class='add'>+        nvidia,lock: true</div><div class='add'>+        nvidia,io-reset: true</div><div class='add'>+        nvidia,slew-rate-rising: true</div><div class='add'>+        nvidia,slew-rate-falling: true</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,pins</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl@70000000 {</div><div class='add'>+        compatible = "nvidia,tegra30-pinmux";</div><div class='add'>+        reg = &lt;0x70000868 0x0d0&gt;, /* Pad control registers */</div><div class='add'>+              &lt;0x70003000 0x3e0&gt;; /* Mux registers */</div><div class='add'>+</div><div class='add'>+        pinmux {</div><div class='add'>+            sdmmc4_clk_pcc4 {</div><div class='add'>+                nvidia,pins = "sdmmc4_clk_pcc4",</div><div class='add'>+                              "sdmmc4_rst_n_pcc3";</div><div class='add'>+                nvidia,function = "sdmmc4";</div><div class='add'>+                nvidia,pull = &lt;0&gt;;</div><div class='add'>+                nvidia,tristate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            sdmmc4_dat0_paa0 {</div><div class='add'>+                nvidia,pins = "sdmmc4_dat0_paa0",</div><div class='add'>+                              "sdmmc4_dat1_paa1",</div><div class='add'>+                              "sdmmc4_dat2_paa2",</div><div class='add'>+                              "sdmmc4_dat3_paa3",</div><div class='add'>+                              "sdmmc4_dat4_paa4",</div><div class='add'>+                              "sdmmc4_dat5_paa5",</div><div class='add'>+                              "sdmmc4_dat6_paa6",</div><div class='add'>+                              "sdmmc4_dat7_paa7";</div><div class='add'>+                nvidia,function = "sdmmc4";</div><div class='add'>+                nvidia,pull = &lt;2&gt;;</div><div class='add'>+                nvidia,tristate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..d49aafd8c5f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,123 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 NXP</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul2-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP S32G2 pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ghennadi Procopciuc &lt;Ghennadi.Procopciuc@oss.nxp.com&gt;</div><div class='add'>+  - Chester Lin &lt;clin@suse.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  S32G2 pinmux is implemented in SIUL2 (System Integration Unit Lite2),</div><div class='add'>+  whose memory map is split into two regions:</div><div class='add'>+    SIUL2_0 @ 0x4009c000</div><div class='add'>+    SIUL2_1 @ 0x44010000</div><div class='add'>+</div><div class='add'>+  Every SIUL2 region has multiple register types, and here only MSCR and</div><div class='add'>+  IMCR registers need to be revealed for kernel to configure pinmux.</div><div class='add'>+</div><div class='add'>+  Please note that some register indexes are reserved in S32G2, such as</div><div class='add'>+  MSCR102-MSCR111, MSCR123-MSCR143, IMCR84-IMCR118 and IMCR398-IMCR429.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nxp,s32g2-siul2-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: |</div><div class='add'>+      A list of MSCR/IMCR register regions to be reserved.</div><div class='add'>+      - MSCR (Multiplexed Signal Configuration Register)</div><div class='add'>+        An MSCR register can configure the associated pin as either a GPIO pin</div><div class='add'>+        or a function output pin depends on the selected signal source.</div><div class='add'>+      - IMCR (Input Multiplexed Signal Configuration Register)</div><div class='add'>+        An IMCR register can configure the associated pin as function input</div><div class='add'>+        pin depends on the selected signal source.</div><div class='add'>+    items:</div><div class='add'>+      - description: MSCR registers group 0 in SIUL2_0</div><div class='add'>+      - description: MSCR registers group 1 in SIUL2_1</div><div class='add'>+      - description: MSCR registers group 2 in SIUL2_1</div><div class='add'>+      - description: IMCR registers group 0 in SIUL2_0</div><div class='add'>+      - description: IMCR registers group 1 in SIUL2_1</div><div class='add'>+      - description: IMCR registers group 2 in SIUL2_1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '-grp[0-9]$':</div><div class='add'>+        type: object</div><div class='add'>+        allOf:</div><div class='add'>+          - $ref: pinmux-node.yaml#</div><div class='add'>+          - $ref: pincfg-node.yaml#</div><div class='add'>+        description: |</div><div class='add'>+          Pinctrl node's client devices specify pin muxes using subnodes,</div><div class='add'>+          which in turn use the standard properties below.</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          bias-disable: true</div><div class='add'>+          bias-high-impedance: true</div><div class='add'>+          bias-pull-up: true</div><div class='add'>+          bias-pull-down: true</div><div class='add'>+          drive-open-drain: true</div><div class='add'>+          input-enable: true</div><div class='add'>+          output-enable: true</div><div class='add'>+</div><div class='add'>+          pinmux:</div><div class='add'>+            description: |</div><div class='add'>+              An integer array for representing pinmux configurations of</div><div class='add'>+              a device. Each integer consists of a PIN_ID and a 4-bit</div><div class='add'>+              selected signal source(SSS) as IOMUX setting, which is</div><div class='add'>+              calculated as: pinmux = (PIN_ID &lt;&lt; 4 | SSS)</div><div class='add'>+</div><div class='add'>+          slew-rate:</div><div class='add'>+            description: Supported slew rate based on Fmax values (MHz)</div><div class='add'>+            enum: [83, 133, 150, 166, 208]</div><div class='add'>+</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl@4009c240 {</div><div class='add'>+        compatible = "nxp,s32g2-siul2-pinctrl";</div><div class='add'>+</div><div class='add'>+              /* MSCR0-MSCR101 registers on siul2_0 */</div><div class='add'>+        reg = &lt;0x4009c240 0x198&gt;,</div><div class='add'>+              /* MSCR112-MSCR122 registers on siul2_1 */</div><div class='add'>+              &lt;0x44010400 0x2c&gt;,</div><div class='add'>+              /* MSCR144-MSCR190 registers on siul2_1 */</div><div class='add'>+              &lt;0x44010480 0xbc&gt;,</div><div class='add'>+              /* IMCR0-IMCR83 registers on siul2_0 */</div><div class='add'>+              &lt;0x4009ca40 0x150&gt;,</div><div class='add'>+              /* IMCR119-IMCR397 registers on siul2_1 */</div><div class='add'>+              &lt;0x44010c1c 0x45c&gt;,</div><div class='add'>+              /* IMCR430-IMCR495 registers on siul2_1 */</div><div class='add'>+              &lt;0x440110f8 0x108&gt;;</div><div class='add'>+</div><div class='add'>+        llce-can0-pins {</div><div class='add'>+            llce-can0-grp0 {</div><div class='add'>+                pinmux = &lt;0x2b0&gt;;</div><div class='add'>+                input-enable;</div><div class='add'>+                slew-rate = &lt;208&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            llce-can0-grp1 {</div><div class='add'>+                pinmux = &lt;0x2c2&gt;;</div><div class='add'>+                output-enable;</div><div class='add'>+                slew-rate = &lt;208&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml<br/>index 4b22a9e3a447..be81ed22a036 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic pin configuration node schema</div><div class='add'>+title: Generic Pin Configuration Node</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='hunk'>@@ -52,11 +52,19 @@ properties:</div><div class='ctx'>       hardware supporting it the pull strength in Ohm.</div><div class='ctx'> </div><div class='ctx'>   drive-push-pull:</div><div class='del'>-    type: boolean</div><div class='add'>+    oneOf:</div><div class='add'>+      - type: boolean</div><div class='add'>+      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [ 0, 1 ]</div><div class='add'>+        deprecated: true</div><div class='ctx'>     description: drive actively high and low</div><div class='ctx'> </div><div class='ctx'>   drive-open-drain:</div><div class='del'>-    type: boolean</div><div class='add'>+    oneOf:</div><div class='add'>+      - type: boolean</div><div class='add'>+      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        const: 1    # No known cases of 0</div><div class='add'>+        deprecated: true</div><div class='ctx'>     description: drive with open drain</div><div class='ctx'> </div><div class='ctx'>   drive-open-source:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml<br/>deleted file mode 100644<br/>index 3c84676a167d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,158 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Mediatek MT8192 Pin Controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Sean Wang &lt;sean.wang@mediatek.com&gt;</div><div class='del'>-</div><div class='del'>-description: |</div><div class='del'>-  The Mediatek's Pin controller is used to control SoC pins.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: mediatek,mt8192-pinctrl</div><div class='del'>-</div><div class='del'>-  gpio-controller: true</div><div class='del'>-</div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: |</div><div class='del'>-      Number of cells in GPIO specifier. Since the generic GPIO binding is used,</div><div class='del'>-      the amount of cells must be specified as 2. See the below</div><div class='del'>-      mentioned gpio binding representation for description of particular cells.</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    description: gpio valid number range.</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    description: |</div><div class='del'>-      Physical address base for gpio base registers. There are 11 GPIO</div><div class='del'>-      physical address base in mt8192.</div><div class='del'>-    maxItems: 11</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    description: |</div><div class='del'>-      Gpio base register names.</div><div class='del'>-    maxItems: 11</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    description: The interrupt outputs to sysirq.</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='del'>-patternProperties:</div><div class='del'>-  '^pins':</div><div class='del'>-    type: object</div><div class='del'>-    description: |</div><div class='del'>-      A pinctrl node should contain at least one subnodes representing the</div><div class='del'>-      pinctrl groups available on the machine. Each subnode will list the</div><div class='del'>-      pins it needs, and how they should be configured, with regard to muxer</div><div class='del'>-      configuration, pullups, drive strength, input enable/disable and</div><div class='del'>-      input schmitt.</div><div class='del'>-      An example of using macro:</div><div class='del'>-      pincontroller {</div><div class='del'>-        /* GPIO0 set as multifunction GPIO0 */</div><div class='del'>-        state_0_node_a {</div><div class='del'>-          pinmux = &lt;PINMUX_GPIO0__FUNC_GPIO0&gt;;</div><div class='del'>-        };</div><div class='del'>-        /* GPIO1 set as multifunction PWM */</div><div class='del'>-        state_0_node_b {</div><div class='del'>-          pinmux = &lt;PINMUX_GPIO1__FUNC_PWM_1&gt;;</div><div class='del'>-        };</div><div class='del'>-      };</div><div class='del'>-    $ref: "pinmux-node.yaml"</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      pinmux:</div><div class='del'>-        description: |</div><div class='del'>-          Integer array, represents gpio pin number and mux setting.</div><div class='del'>-          Supported pin number and mux varies for different SoCs, and are defined</div><div class='del'>-          as macros in dt-bindings/pinctrl/&lt;soc&gt;-pinfunc.h directly.</div><div class='del'>-</div><div class='del'>-      drive-strength:</div><div class='del'>-        description: |</div><div class='del'>-          It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See</div><div class='del'>-          dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192.</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='del'>-      input-enable: true</div><div class='del'>-</div><div class='del'>-      input-disable: true</div><div class='del'>-</div><div class='del'>-      input-schmitt-enable: true</div><div class='del'>-</div><div class='del'>-      input-schmitt-disable: true</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - pinmux</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-            #include &lt;dt-bindings/pinctrl/mt8192-pinfunc.h&gt;</div><div class='del'>-            #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-            pio: pinctrl@10005000 {</div><div class='del'>-                    compatible = "mediatek,mt8192-pinctrl";</div><div class='del'>-                    reg = &lt;0x10005000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11c20000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11d10000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11d30000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11d40000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11e20000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11e70000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11ea0000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11f20000 0x1000&gt;,</div><div class='del'>-                          &lt;0x11f30000 0x1000&gt;,</div><div class='del'>-                          &lt;0x1000b000 0x1000&gt;;</div><div class='del'>-                    reg-names = "iocfg0", "iocfg_rm", "iocfg_bm",</div><div class='del'>-                          "iocfg_bl", "iocfg_br", "iocfg_lm",</div><div class='del'>-                          "iocfg_lb", "iocfg_rt", "iocfg_lt",</div><div class='del'>-                          "iocfg_tl", "eint";</div><div class='del'>-                    gpio-controller;</div><div class='del'>-                    #gpio-cells = &lt;2&gt;;</div><div class='del'>-                    gpio-ranges = &lt;&amp;pio 0 0 220&gt;;</div><div class='del'>-                    interrupt-controller;</div><div class='del'>-                    interrupts = &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='del'>-                    #interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-                    pins {</div><div class='del'>-                      pinmux = &lt;PINMUX_GPIO0__FUNC_GPIO0&gt;;</div><div class='del'>-                      output-low;</div><div class='del'>-                    };</div><div class='del'>-            };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt<br/>index cbcbd31e3ce8..939cb5b6ffea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt</a></div><div class='hunk'>@@ -27,7 +27,7 @@ Required properties:</div><div class='ctx'> - pins: List of pins. Valid values of pins properties are: gpio0, gpio1.</div><div class='ctx'> </div><div class='ctx'> First 2 properties must be added in the RK805 PMIC node, documented in</div><div class='del'>-Documentation/devicetree/bindings/mfd/rk808.txt</div><div class='add'>+Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> -------------------</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt<br/>deleted file mode 100644<br/>index 4023bad2fe39..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinctrl-sx150x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,72 +0,0 @@</div><div class='del'>-SEMTECH SX150x GPIO expander bindings</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and</div><div class='del'>-../interrupt-controller/interrupts.txt for generic information regarding</div><div class='del'>-pin controller, GPIO, and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of :</div><div class='del'>-			"semtech,sx1501q",</div><div class='del'>-			"semtech,sx1502q",</div><div class='del'>-			"semtech,sx1503q",</div><div class='del'>-			"semtech,sx1504q",</div><div class='del'>-			"semtech,sx1505q",</div><div class='del'>-			"semtech,sx1506q",</div><div class='del'>-			"semtech,sx1507q",</div><div class='del'>-			"semtech,sx1508q",</div><div class='del'>-			"semtech,sx1509q".</div><div class='del'>-</div><div class='del'>-- reg: The I2C slave address for this device.</div><div class='del'>-</div><div class='del'>-- #gpio-cells: Should be 2. The first cell is the GPIO number and the</div><div class='del'>-		second cell is used to specify optional parameters:</div><div class='del'>-		bit 0: polarity (0: normal, 1: inverted)</div><div class='del'>-</div><div class='del'>-- gpio-controller: Marks the device as a GPIO controller.</div><div class='del'>-</div><div class='del'>-Optional properties :</div><div class='del'>-- interrupts: Interrupt specifier for the controllers interrupt.</div><div class='del'>-</div><div class='del'>-- interrupt-controller: Marks the device as a interrupt controller.</div><div class='del'>-</div><div class='del'>-- semtech,probe-reset: Will trigger a reset of the GPIO expander on probe,</div><div class='del'>-		only for sx1507q, sx1508q and sx1509q</div><div class='del'>-</div><div class='del'>-The GPIO expander can optionally be used as an interrupt controller, in</div><div class='del'>-which case it uses the default two cell specifier.</div><div class='del'>-</div><div class='del'>-Required properties for pin configuration sub-nodes:</div><div class='del'>- - pins: List of pins to which the configuration applies.</div><div class='del'>-</div><div class='del'>-Optional properties for pin configuration sub-nodes:</div><div class='del'>-----------------------------------------------------</div><div class='del'>- - bias-disable: disable any pin bias, except the OSCIO pin</div><div class='del'>- - bias-pull-up: pull up the pin, except the OSCIO pin</div><div class='del'>- - bias-pull-down: pull down the pin, except the OSCIO pin</div><div class='del'>- - bias-pull-pin-default: use pin-default pull state, except the OSCIO pin</div><div class='del'>- - drive-push-pull: drive actively high and low</div><div class='del'>- - drive-open-drain: drive with open drain only for sx1507q, sx1508q and sx1509q and except the OSCIO pin</div><div class='del'>- - output-low: set the pin to output mode with low level</div><div class='del'>- - output-high: set the pin to output mode with high level</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	i2c0gpio-expander@20{</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		compatible = "semtech,sx1506q";</div><div class='del'>-		reg = &lt;0x20&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio_1&gt;;</div><div class='del'>-		interrupts = &lt;16 0&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;gpio1_cfg_pins&gt;;</div><div class='del'>-</div><div class='del'>-		gpio1_cfg_pins: gpio1-cfg {</div><div class='del'>-			pins = "gpio1";</div><div class='del'>-			bias-pull-up;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml b/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml<br/>index 551df3d9b809..ca9d246d46fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/pinmux-node.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic pin multiplexing node schema</div><div class='add'>+title: Generic Pin Multiplexing Node</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='hunk'>@@ -31,7 +31,7 @@ description: |</div><div class='ctx'>     };</div><div class='ctx'>   };</div><div class='ctx'>   state_1_node_a {</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>       function = "spi0";</div><div class='ctx'>       groups = "spi0pins";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..3d3086ae1ba6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,ipq5332-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5332-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm IPQ5332 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm IPQ5332 SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,ipq5332-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 27</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 53</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-ipq5332-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-ipq5332-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-ipq5332-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: "^gpio([0-9]|[1-4][0-9]|5[0-2])$"</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3,</div><div class='add'>+                atest_tic, audio_pri, audio_pri0, audio_pri1, audio_sec,</div><div class='add'>+                audio_sec0, audio_sec1, blsp0_i2c, blsp0_spi, blsp0_uart0,</div><div class='add'>+                blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1,</div><div class='add'>+                blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1,</div><div class='add'>+                blsp2_spi, blsp2_spi0, blsp2_spi1, core_voltage, cri_trng0,</div><div class='add'>+                cri_trng1, cri_trng2, cri_trng3, cxc_clk, cxc_data, dbg_out,</div><div class='add'>+                gcc_plltest, gcc_tlmm, gpio, lock_det, mac0, mac1, mdc0, mdc1,</div><div class='add'>+                mdio0, mdio1, pc, pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake,</div><div class='add'>+                pcie2_clk, pcie2_wake, pll_test, prng_rosc0, prng_rosc1,</div><div class='add'>+                prng_rosc2, prng_rosc3, pta, pwm0, pwm1, pwm2, pwm3,</div><div class='add'>+                qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0,</div><div class='add'>+                qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,</div><div class='add'>+                qdss_cti_trig_out_a1, qdss_cti_trig_out_b0,</div><div class='add'>+                qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b,</div><div class='add'>+                qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,</div><div class='add'>+                qdss_tracedata_b, qspi_data, qspi_clk, qspi_cs, resout, rx0,</div><div class='add'>+                rx1, sdc_data, sdc_clk, sdc_cmd, tsens_max, wci_txd, wci_rxd,</div><div class='add'>+                wsi_clk, wsi_clk3, wsi_data, wsi_data3, wsis_reset, xfem ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,ipq5332-tlmm";</div><div class='add'>+        reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;0x2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 53&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+        serial0-state {</div><div class='add'>+            pins = "gpio18", "gpio19";</div><div class='add'>+            function = "blsp0_uart0";</div><div class='add'>+            drive-strength = &lt;8&gt;;</div><div class='add'>+            bias-pull-up;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml<br/>index b83c7f476e19..7c3e5e043f07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml</a></div><div class='hunk'>@@ -7,11 +7,10 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Technologies, Inc. IPQ6018 TLMM block</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sricharan R &lt;sricharan@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  IPQ6018 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm IPQ6018 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -21,35 +20,30 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    description: Specifies the TLMM summary IRQ</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description:</div><div class='del'>-      Specifies the PIN numbers and Flags, as defined in defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='ctx'> </div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-pinmux$':</div><div class='del'>-    type: object</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-ipq6018-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-ipq6018-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-ipq6018-tlmm-state:</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -63,7 +57,7 @@ patternProperties:</div><div class='ctx'>                       sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,</div><div class='ctx'>                       qdsd_data3 ]</div><div class='ctx'>         minItems: 1</div><div class='del'>-        maxItems: 4</div><div class='add'>+        maxItems: 16</div><div class='ctx'> </div><div class='ctx'>       function:</div><div class='ctx'>         description:</div><div class='hunk'>@@ -72,12 +66,12 @@ patternProperties:</div><div class='ctx'>         enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,</div><div class='ctx'>                 atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,</div><div class='ctx'>                 atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,</div><div class='del'>-                atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp1_i2c,</div><div class='del'>-                blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp6_i2c, blsp1_spi,</div><div class='add'>+                atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp0_i2c, blsp1_i2c,</div><div class='add'>+                blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp0_spi, blsp1_spi,</div><div class='ctx'>                 blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,</div><div class='ctx'>                 blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,</div><div class='ctx'>                 blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,</div><div class='del'>-                blsp6_spi, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,</div><div class='add'>+                blsp0_uart, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,</div><div class='ctx'>                 cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,</div><div class='ctx'>                 cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,</div><div class='ctx'>                 dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass,</div><div class='hunk'>@@ -92,64 +86,39 @@ patternProperties:</div><div class='ctx'>                 qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,</div><div class='ctx'>                 qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,</div><div class='ctx'>                 qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,</div><div class='del'>-                qdss_tracedata_a, qdss_tracedata_b, reset_n, sd_card, sd_write,</div><div class='del'>-                sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3,</div><div class='del'>-                uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]</div><div class='del'>-</div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='add'>+                qdss_tracedata_a, qdss_tracedata_b, qpic_pad, reset_n, sd_card,</div><div class='add'>+                sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2,</div><div class='add'>+                uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        tlmm: pinctrl@1000000 {</div><div class='del'>-              compatible = "qcom,ipq6018-pinctrl";</div><div class='del'>-              reg = &lt;0x01000000 0x300000&gt;;</div><div class='del'>-              interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-              interrupt-controller;</div><div class='del'>-              #interrupt-cells = &lt;2&gt;;</div><div class='del'>-              gpio-controller;</div><div class='del'>-              #gpio-cells = &lt;2&gt;;</div><div class='del'>-              gpio-ranges = &lt;&amp;tlmm 0 80&gt;;</div><div class='del'>-</div><div class='del'>-              serial3-pinmux {</div><div class='del'>-                      pins = "gpio44", "gpio45";</div><div class='del'>-                      function = "blsp2_uart";</div><div class='del'>-                      drive-strength = &lt;8&gt;;</div><div class='del'>-                      bias-pull-down;</div><div class='del'>-              };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,ipq6018-pinctrl";</div><div class='add'>+        reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 80&gt;;</div><div class='add'>+</div><div class='add'>+        serial3-state {</div><div class='add'>+            pins = "gpio44", "gpio45";</div><div class='add'>+            function = "blsp2_uart";</div><div class='add'>+            drive-strength = &lt;8&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.txt<br/>deleted file mode 100644<br/>index 7b151894f5a0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,181 +0,0 @@</div><div class='del'>-Qualcomm Technologies, Inc. IPQ8074 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-IPQ8074 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,ipq8074-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.  Valid pins are:</div><div class='del'>-		    gpio0-gpio69</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-		    atest_char, atest_char0, atest_char1, atest_char2,</div><div class='del'>-		    atest_char3, audio_rxbclk, audio_rxd, audio_rxfsync,</div><div class='del'>-		    audio_rxmclk, audio_txbclk, audio_txd, audio_txfsync,</div><div class='del'>-		    audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart, blsp1_i2c,</div><div class='del'>-		    blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi, blsp2_uart,</div><div class='del'>-		    blsp3_i2c, blsp3_spi, blsp3_spi0, blsp3_spi1, blsp3_spi2,</div><div class='del'>-		    blsp3_spi3, blsp3_uart, blsp4_i2c0, blsp4_i2c1, blsp4_spi0,</div><div class='del'>-		    blsp4_spi1, blsp4_uart0, blsp4_uart1, blsp5_i2c, blsp5_spi,</div><div class='del'>-		    blsp5_uart, burn0, burn1, cri_trng, cri_trng0, cri_trng1,</div><div class='del'>-		    cxc0, cxc1, dbg_out, gcc_plltest, gcc_tlmm, gpio, ldo_en,</div><div class='del'>-		    ldo_update, led0, led1, led2, mac0_sa0, mac0_sa1, mac1_sa0,</div><div class='del'>-		    mac1_sa1, mac1_sa2, mac1_sa3, mac2_sa0, mac2_sa1, mdc,</div><div class='del'>-		    mdio, pcie0_clk, pcie0_rst, pcie0_wake, pcie1_clk,</div><div class='del'>-		    pcie1_rst, pcie1_wake, pcm_drx, pcm_dtx, pcm_fsync,</div><div class='del'>-		    pcm_pclk, pcm_zsi0, pcm_zsi1, prng_rosc, pta1_0, pta1_1,</div><div class='del'>-		    pta1_2, pta2_0, pta2_1, pta2_2, pwm0, pwm1, pwm2, pwm3,</div><div class='del'>-		    qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,</div><div class='del'>-		    qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,</div><div class='del'>-		    qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,</div><div class='del'>-		    qdss_cti_trig_out_b0, qdss_cti_trig_out_b1,</div><div class='del'>-		    qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,</div><div class='del'>-		    qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b,</div><div class='del'>-		    qpic, rx0, rx1, rx2, sd_card, sd_write, tsens_max, wci2a,</div><div class='del'>-		    wci2b, wci2c, wci2d</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@1000000 {</div><div class='del'>-		compatible = "qcom,ipq8074-pinctrl";</div><div class='del'>-		reg = &lt;0x1000000 0x300000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 70&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		uart2: uart2-default {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio23", "gpio24";</div><div class='del'>-				function = "blsp4_uart1";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rx {</div><div class='del'>-				pins = "gpio23";</div><div class='del'>-				drive-strength = &lt;4&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tx {</div><div class='del'>-				pins = "gpio24";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-pull-up;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..e053fbd588b5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,ipq8074-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq8074-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm IPQ8074 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm IPQ8074 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,ipq8074-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 35</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 70</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-ipq8074-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-ipq8074-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-ipq8074-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: "^gpio([0-9]|[1-6][0-9]|70)$"</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, atest_char, atest_char0, atest_char1, atest_char2,</div><div class='add'>+                atest_char3, audio_rxbclk, audio_rxd, audio_rxfsync,</div><div class='add'>+                audio_rxmclk, audio_txbclk, audio_txd, audio_txfsync,</div><div class='add'>+                audio_txmclk, blsp0_i2c, blsp0_spi, blsp0_uart, blsp1_i2c,</div><div class='add'>+                blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi, blsp2_uart,</div><div class='add'>+                blsp3_i2c, blsp3_spi, blsp3_spi0, blsp3_spi1, blsp3_spi2,</div><div class='add'>+                blsp3_spi3, blsp3_uart, blsp4_i2c0, blsp4_i2c1, blsp4_spi0,</div><div class='add'>+                blsp4_spi1, blsp4_uart0, blsp4_uart1, blsp5_i2c, blsp5_spi,</div><div class='add'>+                blsp5_uart, burn0, burn1, cri_trng, cri_trng0, cri_trng1, cxc0,</div><div class='add'>+                cxc1, dbg_out, gcc_plltest, gcc_tlmm, ldo_en, ldo_update, led0,</div><div class='add'>+                led1, led2, mac0_sa0, mac0_sa1, mac1_sa0, mac1_sa1, mac1_sa2,</div><div class='add'>+                mac1_sa3, mac2_sa0, mac2_sa1, mdc, mdio, pcie0_clk, pcie0_rst,</div><div class='add'>+                pcie0_wake, pcie1_clk, pcie1_rst, pcie1_wake, pcm_drx, pcm_dtx,</div><div class='add'>+                pcm_fsync, pcm_pclk, pcm_zsi0, pcm_zsi1, prng_rosc, pta1_0,</div><div class='add'>+                pta1_1, pta1_2, pta2_0, pta2_1, pta2_2, pwm0, pwm1, pwm2, pwm3,</div><div class='add'>+                qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0,</div><div class='add'>+                qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,</div><div class='add'>+                qdss_cti_trig_out_a1, qdss_cti_trig_out_b0,</div><div class='add'>+                qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b,</div><div class='add'>+                qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,</div><div class='add'>+                qdss_tracedata_b, qpic, rx0, rx1, rx2, sd_card, sd_write,</div><div class='add'>+                tsens_max, wci2a, wci2b, wci2c, wci2d ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,ipq8074-pinctrl";</div><div class='add'>+        reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;0x2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 70&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;0x2&gt;;</div><div class='add'>+</div><div class='add'>+        serial4-state {</div><div class='add'>+            pins = "gpio23", "gpio24";</div><div class='add'>+            function = "blsp4_uart1";</div><div class='add'>+            drive-strength = &lt;8&gt;;</div><div class='add'>+            bias-disable;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..673713debac2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,130 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq9574-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. IPQ9574 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm IPQ9574 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,ipq9574-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 33</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 65</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-ipq9574-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-ipq9574-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-ipq9574-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: "^gpio([0-9]|[1-5][0-9]|6[0-4])$"</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 8</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3,</div><div class='add'>+                audio_pdm0, audio_pdm1, audio_pri, audio_sec, blsp0_spi, blsp0_uart,</div><div class='add'>+                blsp1_i2c, blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi,</div><div class='add'>+                blsp2_uart, blsp3_i2c, blsp3_spi, blsp3_uart, blsp4_i2c,</div><div class='add'>+                blsp4_spi, blsp4_uart, blsp5_i2c, blsp5_uart, cri_trng0,</div><div class='add'>+                cri_trng1, cri_trng2, cri_trng3, cxc0, cxc1, dbg_out, dwc_ddrphy,</div><div class='add'>+                gcc_plltest, gcc_tlmm, gpio, mac, mdc, mdio, pcie0_clk, pcie0_wake,</div><div class='add'>+                pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, pcie3_clk, pcie3_wake,</div><div class='add'>+                prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, pta, pwm,</div><div class='add'>+                qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0,</div><div class='add'>+                qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,</div><div class='add'>+                qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,</div><div class='add'>+                qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,</div><div class='add'>+                qdss_tracedata_b, qspi_clk, qspi_cs, qspi_data,</div><div class='add'>+                rx0, rx1, sdc_clk, sdc_cmd, sdc_data, sdc_rclk, tsens_max,</div><div class='add'>+                wci20, wci21, wsa_swrm ]</div><div class='add'>+</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+      bias-disable: true</div><div class='add'>+      drive-strength: true</div><div class='add'>+      input-enable: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,ipq9574-tlmm";</div><div class='add'>+        reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 65&gt;;</div><div class='add'>+</div><div class='add'>+        uart2-state {</div><div class='add'>+            pins = "gpio34", "gpio35";</div><div class='add'>+            function = "blsp2_uart";</div><div class='add'>+            drive-strength = &lt;8&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml<br/>index f7bd4be1739e..2aedb7e7bc8b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9607-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9607-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. MDM9607 TLMM block</div><div class='hunk'>@@ -9,12 +9,10 @@ title: Qualcomm Technologies, Inc. MDM9607 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  MDM9607 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MDM9607 SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='ctx'>   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -24,12 +22,14 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-  '#interrupt-cells': true</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'>   gpio-reserved-ranges: true</div><div class='del'>-  '#gpio-cells': true</div><div class='add'>+  "#gpio-cells": true</div><div class='ctx'>   gpio-ranges: true</div><div class='ctx'>   wakeup-parent: true</div><div class='ctx'> </div><div class='hunk'>@@ -40,20 +40,21 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-mdm9607-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='ctx'>           ".*":</div><div class='ctx'>             $ref: "#/$defs/qcom-mdm9607-tlmm-state"</div><div class='ctx'> </div><div class='del'>-'$defs':</div><div class='add'>+$defs:</div><div class='ctx'>   qcom-mdm9607-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -105,30 +106,19 @@ patternProperties:</div><div class='ctx'>                 uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,</div><div class='ctx'>                 uim2_data, uim2_present, uim2_reset, uim_batt, wlan_en1, ]</div><div class='ctx'> </div><div class='del'>-      bias-disable: true</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-      drive-strength: true</div><div class='del'>-      input-enable: true</div><div class='del'>-      output-high: true</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        tlmm: pinctrl@1000000 {</div><div class='del'>-          compatible = "qcom,mdm9607-tlmm";</div><div class='del'>-          reg = &lt;0x01000000 0x300000&gt;;</div><div class='del'>-          interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-          gpio-controller;</div><div class='del'>-          gpio-ranges = &lt;&amp;msmgpio 0 0 80&gt;;</div><div class='del'>-          #gpio-cells = &lt;2&gt;;</div><div class='del'>-          interrupt-controller;</div><div class='del'>-          #interrupt-cells = &lt;2&gt;;</div><div class='del'>-        };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,mdm9607-tlmm";</div><div class='add'>+        reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;msmgpio 0 0 80&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt<br/>deleted file mode 100644<br/>index d46973968873..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,161 +0,0 @@</div><div class='del'>-Qualcomm MDM9615 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-MDM9615 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,mdm9615-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.  Valid pins are:</div><div class='del'>-		    gpio0-gpio87</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-		    gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,</div><div class='del'>-		    sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio,</div><div class='del'>-		    cdc_mclk</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	msmgpio: pinctrl@800000 {</div><div class='del'>-		compatible = "qcom,mdm9615-pinctrl";</div><div class='del'>-		reg = &lt;0x800000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;msmgpio 0 0 88&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;0 16 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		gsbi8_uart: gsbi8-uart {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio34", "gpio35";</div><div class='del'>-				function = "gsbi8";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tx {</div><div class='del'>-				pins = "gpio34";</div><div class='del'>-				drive-strength = &lt;4&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rx {</div><div class='del'>-				pins = "gpio35";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-pull-up;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..5885aee95c98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,mdm9615-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,mdm9615-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. MDM9615 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: Top Level Mode Multiplexer pin controller in Qualcomm MDM9615 SoC.</div><div class='add'>+</div><div class='add'>+$ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,mdm9615-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  '#interrupt-cells': true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  '#gpio-cells': true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-mdm9615-pinctrl-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-mdm9615-pinctrl-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-mdm9615-pinctrl-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: "^gpio([0-9]|[1-7][0-9]|8[0-7])$"</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 16</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, gsbi2_i2c, gsbi3, gsbi4, gsbi5_i2c, gsbi5_uart,</div><div class='add'>+                sdc2, ebi2_lcdc, ps_hold, prim_audio, sec_audio, cdc_mclk, ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+      compatible = "qcom,mdm9615-pinctrl";</div><div class='add'>+      reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      gpio-controller;</div><div class='add'>+      gpio-ranges = &lt;&amp;msmgpio 0 0 88&gt;;</div><div class='add'>+      #gpio-cells = &lt;2&gt;;</div><div class='add'>+      interrupt-controller;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      gsbi3-state {</div><div class='add'>+        pins = "gpio8", "gpio9", "gpio10", "gpio11";</div><div class='add'>+        function = "gsbi3";</div><div class='add'>+        drive-strength = &lt;8&gt;;</div><div class='add'>+        bias-disable;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      gsbi5-i2c-state {</div><div class='add'>+        sda-pins {</div><div class='add'>+          pins = "gpio16";</div><div class='add'>+          function = "gsbi5_i2c";</div><div class='add'>+          drive-strength = &lt;8&gt;;</div><div class='add'>+          bias-disable;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        scl-pins {</div><div class='add'>+          pins = "gpio17";</div><div class='add'>+          function = "gsbi5_i2c";</div><div class='add'>+          drive-strength = &lt;2&gt;;</div><div class='add'>+          bias-disable;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml<br/>index ab4a2b4cfda2..9efb76509580 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml</a></div><div class='hunk'>@@ -9,9 +9,8 @@ title: Qualcomm Technologies, Inc. MSM8226 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  MSM8226 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8226 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -22,37 +21,34 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    description: Specifies the TLMM summary IRQ</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description: Specifies the PIN numbers and Flags, as defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='del'>-</div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='ctx'> </div><div class='ctx'>   gpio-reserved-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-pins$':</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8226-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8226-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8226-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -61,7 +57,7 @@ patternProperties:</div><div class='ctx'>           subnode.</div><div class='ctx'>         items:</div><div class='ctx'>           oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-6])$"</div><div class='ctx'>             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 36</div><div class='hunk'>@@ -71,65 +67,41 @@ patternProperties:</div><div class='ctx'>           Specify the alternative function to be configured for the specified</div><div class='ctx'>           pins. Functions are only valid for gpio pins.</div><div class='ctx'>         enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5,</div><div class='del'>-                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1,</div><div class='add'>+                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_spi1,</div><div class='ctx'>                 blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2,</div><div class='del'>-                blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ]</div><div class='del'>-</div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='add'>+                blsp_uart3, blsp_uart4, blsp_uart5, cam_mclk0, cam_mclk1,</div><div class='add'>+                gp0_clk, gp1_clk, sdc3, wlan ]</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        msmgpio: pinctrl@fd510000 {</div><div class='del'>-                compatible = "qcom,msm8226-pinctrl";</div><div class='del'>-                reg = &lt;0xfd510000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;msmgpio 0 0 117&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-                serial-pins {</div><div class='del'>-                        pins = "gpio8", "gpio9";</div><div class='del'>-                        function = "blsp_uart3";</div><div class='del'>-                        drive-strength = &lt;8&gt;;</div><div class='del'>-                        bias-disable;</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    msmgpio: pinctrl@fd510000 {</div><div class='add'>+        compatible = "qcom,msm8226-pinctrl";</div><div class='add'>+        reg = &lt;0xfd510000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;msmgpio 0 0 117&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        serial-state {</div><div class='add'>+            pins = "gpio8", "gpio9";</div><div class='add'>+            function = "blsp_uart3";</div><div class='add'>+            drive-strength = &lt;8&gt;;</div><div class='add'>+            bias-disable;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt<br/>deleted file mode 100644<br/>index f095209848c8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,96 +0,0 @@</div><div class='del'>-Qualcomm MSM8660 TLMM block</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "qcom,msm8660-pinctrl"</div><div class='del'>-- reg: Should be the base address and length of the TLMM block.</div><div class='del'>-- interrupts: Should be the parent IRQ of the TLMM block.</div><div class='del'>-- interrupt-controller: Marks the device node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: Should be two.</div><div class='del'>-- gpio-controller: Marks the device node as a GPIO controller.</div><div class='del'>-- #gpio-cells : Should be two.</div><div class='del'>-                The first cell is the gpio pin number and the</div><div class='del'>-                second cell is used for optional parameters.</div><div class='del'>-- gpio-ranges: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-Qualcomm's pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>- pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-strength,</div><div class='del'>- output-low, output-high.</div><div class='del'>-</div><div class='del'>-Non-empty subnodes must specify the 'pins' property.</div><div class='del'>-</div><div class='del'>-Valid values for pins are:</div><div class='del'>-  gpio0-gpio172, sdc3_clk, sdc3_cmd, sdc3_data sdc4_clk, sdc4_cmd, sdc4_data</div><div class='del'>-</div><div class='del'>-Valid values for function are:</div><div class='del'>-  gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a, gp_clk_1b,</div><div class='del'>-  gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n,</div><div class='del'>-  gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n,</div><div class='del'>-  gsbi2_spi_cs3_n, gsbi3, gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n,</div><div class='del'>-  gsbi4, gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12, hdmi, i2s,</div><div class='del'>-  lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2, sdc5, tsif1, tsif2, usb_fs1,</div><div class='del'>-  usb_fs1_oe_n, usb_fs2, usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	msmgpio: pinctrl@800000 {</div><div class='del'>-		compatible = "qcom,msm8660-pinctrl";</div><div class='del'>-		reg = &lt;0x800000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;msmgpio 0 0 173&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;0 16 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;gsbi12_uart&gt;;</div><div class='del'>-</div><div class='del'>-		gsbi12_uart: gsbi12-uart {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio117", "gpio118";</div><div class='del'>-				function = "gsbi12";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tx {</div><div class='del'>-				pins = "gpio118";</div><div class='del'>-				drive-strength = &lt;8&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rx {</div><div class='del'>-				pins = "gpio117";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-pull-up;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..a05971611780<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8660-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8660-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8660 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8660 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8660-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 86</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 173</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8660-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8660-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8660-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-2])$"</div><div class='add'>+            - enum: [ sdc3_clk, sdc3_cmd, sdc3_data, sdc4_clk, sdc4_cmd, sdc4_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, cam_mclk, dsub, ext_gps, gp_clk_0a, gp_clk_0b, gp_clk_1a,</div><div class='add'>+                gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gsbi1, gsbi1_spi_cs1_n,</div><div class='add'>+                gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n, gsbi1_spi_cs3_n, gsbi2,</div><div class='add'>+                gsbi2_spi_cs1_n, gsbi2_spi_cs2_n, gsbi2_spi_cs3_n, gsbi3,</div><div class='add'>+                gsbi3_spi_cs1_n, gsbi3_spi_cs2_n, gsbi3_spi_cs3_n, gsbi4,</div><div class='add'>+                gsbi5, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11, gsbi12,</div><div class='add'>+                hdmi, i2s, lcdc, mdp_vsync, mi2s, pcm, ps_hold, sdc1, sdc2,</div><div class='add'>+                sdc5, tsif1, tsif2, usb_fs1, usb_fs1_oe_n, usb_fs2,</div><div class='add'>+                usb_fs2_oe_n, vfe, vsens_alarm, ebi2, ebi2cs ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@800000 {</div><div class='add'>+        compatible = "qcom,msm8660-pinctrl";</div><div class='add'>+        reg = &lt;0x800000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 173&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;0 16 0x4&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        gsbi3-i2c-state {</div><div class='add'>+            pins = "gpio43", "gpio44";</div><div class='add'>+            function = "gsbi3";</div><div class='add'>+            drive-strength = &lt;8&gt;;</div><div class='add'>+            bias-disable;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..5095e86fe9a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8909-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. MSM8909 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephan Gerhold &lt;stephan@gerhold.net&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8909 SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8909-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  gpio-reserved-ranges: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8909-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8909-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8909-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"</div><div class='add'>+            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,</div><div class='add'>+                      sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,</div><div class='add'>+                      qdsd_data2, qdsd_data3 ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 16</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+        enum: [ adsp_ext, atest_bbrx0, atest_bbrx1, atest_char, atest_char0,</div><div class='add'>+                atest_char1, atest_char2, atest_char3, atest_combodac,</div><div class='add'>+                atest_gpsadc0, atest_gpsadc1, atest_wlan0, atest_wlan1,</div><div class='add'>+                bimc_dte0, bimc_dte1, blsp_i2c1, blsp_i2c2, blsp_i2c3,</div><div class='add'>+                blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_spi1, blsp_spi1_cs1,</div><div class='add'>+                blsp_spi1_cs2, blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1,</div><div class='add'>+                blsp_spi2_cs2, blsp_spi2_cs3, blsp_spi3, blsp_spi3_cs1,</div><div class='add'>+                blsp_spi3_cs2, blsp_spi3_cs3, blsp_spi4, blsp_spi5, blsp_spi6,</div><div class='add'>+                blsp_uart1, blsp_uart2, blsp_uim1, blsp_uim2, cam_mclk,</div><div class='add'>+                cci_async, cci_timer0, cci_timer1, cci_timer2, cdc_pdm0,</div><div class='add'>+                dbg_out, dmic0_clk, dmic0_data, ebi0_wrcdc, ebi2_a, ebi2_lcd,</div><div class='add'>+                ext_lpass, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,</div><div class='add'>+                gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gcc_plltest, gpio,</div><div class='add'>+                gsm0_tx, ldo_en, ldo_update, m_voc, mdp_vsync, modem_tsync,</div><div class='add'>+                nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2,</div><div class='add'>+                pri_mi2s_data0_a, pri_mi2s_data0_b, pri_mi2s_data1_a,</div><div class='add'>+                pri_mi2s_data1_b, pri_mi2s_mclk_a, pri_mi2s_mclk_b,</div><div class='add'>+                pri_mi2s_sck_a, pri_mi2s_sck_b, pri_mi2s_ws_a, pri_mi2s_ws_b,</div><div class='add'>+                prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b,</div><div class='add'>+                pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,</div><div class='add'>+                pwr_nav_enabled_b, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,</div><div class='add'>+                qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,</div><div class='add'>+                qdss_cti_trig_out_a1, qdss_cti_trig_out_b0,</div><div class='add'>+                qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_tracectl_a,</div><div class='add'>+                qdss_tracedata_a, qdss_tracedata_b, sd_write, sec_mi2s,</div><div class='add'>+                smb_int, ssbi0, ssbi1, uim1_clk, uim1_data, uim1_present,</div><div class='add'>+                uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset,</div><div class='add'>+                uim3_clk, uim3_data, uim3_present, uim3_reset, uim_batt,</div><div class='add'>+                wcss_bt, wcss_fm, wcss_wlan ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,msm8909-tlmm";</div><div class='add'>+        reg = &lt;0x1000000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 113&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-wo-subnode-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-subnodes-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio4";</div><div class='add'>+                function = "blsp_uart1";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio5";</div><div class='add'>+                function = "blsp_uart1";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt<br/>deleted file mode 100644<br/>index 3354a63296d9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,195 +0,0 @@</div><div class='del'>-Qualcomm MSM8916 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-MSM8916 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,msm8916-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.  Valid pins are:</div><div class='del'>-		    gpio0-gpio121,</div><div class='del'>-		    sdc1_clk,</div><div class='del'>-		    sdc1_cmd,</div><div class='del'>-		    sdc1_data</div><div class='del'>-		    sdc2_clk,</div><div class='del'>-		    sdc2_cmd,</div><div class='del'>-		    sdc2_data,</div><div class='del'>-		    qdsd_cmd,</div><div class='del'>-		    qdsd_data0,</div><div class='del'>-		    qdsd_data1,</div><div class='del'>-		    qdsd_data2,</div><div class='del'>-		    qdsd_data3</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-	adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, atest_char0,</div><div class='del'>-	atest_char1, atest_char2, atest_char3, atest_combodac, atest_gpsadc0,</div><div class='del'>-	atest_gpsadc1, atest_tsens, atest_wlan0, atest_wlan1, backlight_en,</div><div class='del'>-	bimc_dte0,bimc_dte1, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4,</div><div class='del'>-	blsp_i2c5, blsp_i2c6, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2,</div><div class='del'>-	blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3,</div><div class='del'>-	blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2, blsp_spi3_cs3, blsp_spi4,</div><div class='del'>-	blsp_spi5, blsp_spi6, blsp_uart1, blsp_uart2, blsp_uim1, blsp_uim2,</div><div class='del'>-	cam1_rst, cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c,</div><div class='del'>-	cci_timer0, cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out,</div><div class='del'>-	display_5v, dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us,</div><div class='del'>-	ext_lpass, flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,</div><div class='del'>-	gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0, gsm0_tx1,</div><div class='del'>-	gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2, ldo_en,</div><div class='del'>-	ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc, nav_pps, nav_tsync,</div><div class='del'>-	pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, pri_mi2s_ws, prng_rosc,</div><div class='del'>-	pwr_crypto_enabled_a, pwr_crypto_enabled_b, pwr_modem_enabled_a,</div><div class='del'>-	pwr_modem_enabled_b, pwr_nav_enabled_a, pwr_nav_enabled_b,</div><div class='del'>-	qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, qdss_ctitrig_in_b0,</div><div class='del'>-	qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, qdss_ctitrig_out_a1,</div><div class='del'>-	qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, qdss_traceclk_a,</div><div class='del'>-	qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,</div><div class='del'>-	qdss_tracedata_b, reset_n, sd_card, sd_write, sec_mi2s, smb_int,</div><div class='del'>-	ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm,</div><div class='del'>-	wcss_wlan, webcam1_rst</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@1000000 {</div><div class='del'>-		compatible = "qcom,msm8916-pinctrl";</div><div class='del'>-		reg = &lt;0x1000000 0x300000&gt;;</div><div class='del'>-		interrupts = &lt;0 208 0&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 122&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		uart2: uart2-default {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "blsp_uart2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tx {</div><div class='del'>-				pins = "gpio4";</div><div class='del'>-				drive-strength = &lt;4&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rx {</div><div class='del'>-				pins = "gpio5";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-pull-up;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..063d004967bb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8916-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8916 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8916 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8916-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 61</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 122</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8916-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8916-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8916-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[01])$"</div><div class='add'>+            - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,</div><div class='add'>+                      qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,</div><div class='add'>+                atest_char0, atest_char1, atest_char2, atest_char3,</div><div class='add'>+                atest_combodac, atest_gpsadc0, atest_gpsadc1, atest_tsens,</div><div class='add'>+                atest_wlan0, atest_wlan1, backlight_en, bimc_dte0, bimc_dte1,</div><div class='add'>+                blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5,</div><div class='add'>+                blsp_i2c6, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2,</div><div class='add'>+                blsp_spi1_cs3, blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2,</div><div class='add'>+                blsp_spi2_cs3, blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2,</div><div class='add'>+                blsp_spi3_cs3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_uart1,</div><div class='add'>+                blsp_uart2, blsp_uim1, blsp_uim2, cam1_rst, cam1_standby,</div><div class='add'>+                cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,</div><div class='add'>+                cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out,</div><div class='add'>+                display_5v, dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc,</div><div class='add'>+                euro_us, ext_lpass, flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b,</div><div class='add'>+                gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b,</div><div class='add'>+                gsm0_tx0, gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0,</div><div class='add'>+                kpsns1, kpsns2, ldo_en, ldo_update, mag_int, mdp_vsync,</div><div class='add'>+                modem_tsync, m_voc, nav_pps, nav_tsync, pa_indicator, pbs0,</div><div class='add'>+                pbs1, pbs2, pri_mi2s, pri_mi2s_ws, prng_rosc,</div><div class='add'>+                pwr_crypto_enabled_a, pwr_crypto_enabled_b,</div><div class='add'>+                pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,</div><div class='add'>+                pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1,</div><div class='add'>+                qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,</div><div class='add'>+                qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,</div><div class='add'>+                qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,</div><div class='add'>+                qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, reset_n,</div><div class='add'>+                sd_card, sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1,</div><div class='add'>+                uim1, uim2, uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan,</div><div class='add'>+                webcam1_rst ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    msmgpio: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,msm8916-pinctrl";</div><div class='add'>+        reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;msmgpio 0 0 122&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        blsp1-uart2-sleep-state {</div><div class='add'>+            pins = "gpio4", "gpio5";</div><div class='add'>+            function = "gpio";</div><div class='add'>+</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        spi1-default-state {</div><div class='add'>+            spi-pins {</div><div class='add'>+                pins = "gpio0", "gpio1", "gpio3";</div><div class='add'>+                function = "blsp_spi1";</div><div class='add'>+</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cs-pins {</div><div class='add'>+                pins = "gpio2";</div><div class='add'>+                function = "gpio";</div><div class='add'>+</div><div class='add'>+                drive-strength = &lt;16&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+                output-high;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml<br/>index d4da558cde54..798aac9e6e31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml</a></div><div class='hunk'>@@ -9,9 +9,8 @@ title: Qualcomm Technologies, Inc. MSM8953 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  MSM8953 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8953 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -21,37 +20,32 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    description: Specifies the TLMM summary IRQ</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description:</div><div class='del'>-      Specifies the PIN numbers and Flags, as defined in defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='del'>-</div><div class='ctx'>   gpio-reserved-ranges: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='ctx'> </div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-pins$':</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8953-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8953-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8953-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -60,7 +54,7 @@ patternProperties:</div><div class='ctx'>           subnode.</div><div class='ctx'>         items:</div><div class='ctx'>           oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[01])$"</div><div class='ctx'>             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,</div><div class='ctx'>                       sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0,</div><div class='ctx'>                       qdsd_data1, qdsd_data2, qdsd_data3 ]</div><div class='hunk'>@@ -113,60 +107,35 @@ patternProperties:</div><div class='ctx'>                 uim_batt, us_emitter, us_euro, wcss_bt, wcss_fm, wcss_wlan,</div><div class='ctx'>                 wcss_wlan0, wcss_wlan1, wcss_wlan2, wsa_en, wsa_io, wsa_irq ]</div><div class='ctx'> </div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        tlmm: pinctrl@1000000 {</div><div class='del'>-              compatible = "qcom,msm8953-pinctrl";</div><div class='del'>-              reg = &lt;0x01000000 0x300000&gt;;</div><div class='del'>-              interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-              interrupt-controller;</div><div class='del'>-              #interrupt-cells = &lt;2&gt;;</div><div class='del'>-              gpio-controller;</div><div class='del'>-              #gpio-cells = &lt;2&gt;;</div><div class='del'>-              gpio-ranges = &lt;&amp;tlmm 0 0 142&gt;;</div><div class='del'>-</div><div class='del'>-              serial_default: serial-pins {</div><div class='del'>-                    pins = "gpio4", "gpio5";</div><div class='del'>-                    function = "blsp_uart2";</div><div class='del'>-                    drive-strength = &lt;2&gt;;</div><div class='del'>-                    bias-disable;</div><div class='del'>-              };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,msm8953-pinctrl";</div><div class='add'>+        reg = &lt;0x01000000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 142&gt;;</div><div class='add'>+</div><div class='add'>+        serial_default: serial-state {</div><div class='add'>+            pins = "gpio4", "gpio5";</div><div class='add'>+            function = "blsp_uart2";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-disable;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt<br/>deleted file mode 100644<br/>index a7dd213c77c6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,190 +0,0 @@</div><div class='del'>-Qualcomm MSM8960 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-MSM8960 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,msm8960-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.  Valid pins are:</div><div class='del'>-		    gpio0-gpio151,</div><div class='del'>-		    sdc1_clk,</div><div class='del'>-		    sdc1_cmd,</div><div class='del'>-		    sdc1_data</div><div class='del'>-		    sdc3_clk,</div><div class='del'>-		    sdc3_cmd,</div><div class='del'>-		    sdc3_data</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-		    audio_pcm, bt, cam_mclk0, cam_mclk1, cam_mclk2,</div><div class='del'>-		    codec_mic_i2s, codec_spkr_i2s, ext_gps, fm, gps_blanking,</div><div class='del'>-		    gps_pps_in, gps_pps_out, gp_clk_0a, gp_clk_0b, gp_clk_1a,</div><div class='del'>-		    gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gp_pdm_0a,</div><div class='del'>-		    gp_pdm_0b, gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gpio,</div><div class='del'>-		    gsbi1, gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n,</div><div class='del'>-		    gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n,</div><div class='del'>-		    gsbi2_spi_cs3_n, gsbi3, gsbi4, gsbi4_3d_cam_i2c_l,</div><div class='del'>-		    gsbi4_3d_cam_i2c_r, gsbi5, gsbi5_3d_cam_i2c_l,</div><div class='del'>-		    gsbi5_3d_cam_i2c_r, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10,</div><div class='del'>-		    gsbi11, gsbi11_spi_cs1a_n, gsbi11_spi_cs1b_n,</div><div class='del'>-		    gsbi11_spi_cs2a_n, gsbi11_spi_cs2b_n, gsbi11_spi_cs3_n,</div><div class='del'>-		    gsbi12, hdmi_cec, hdmi_ddc_clock, hdmi_ddc_data,</div><div class='del'>-		    hdmi_hot_plug_detect, hsic, mdp_vsync, mi2s, mic_i2s,</div><div class='del'>-		    pmb_clk, pmb_ext_ctrl, ps_hold, rpm_wdog, sdc2, sdc4, sdc5,</div><div class='del'>-		    slimbus1, slimbus2, spkr_i2s, ssbi1, ssbi2, ssbi_ext_gps,</div><div class='del'>-		    ssbi_pmic2, ssbi_qpa1, ssbi_ts, tsif1, tsif2, ts_eoc,</div><div class='del'>-		    usb_fs1, usb_fs1_oe, usb_fs1_oe_n, usb_fs2, usb_fs2_oe,</div><div class='del'>-		    usb_fs2_oe_n, vfe_camif_timer1_a, vfe_camif_timer1_b,</div><div class='del'>-		    vfe_camif_timer2, vfe_camif_timer3_a, vfe_camif_timer3_b,</div><div class='del'>-		    vfe_camif_timer4_a, vfe_camif_timer4_b, vfe_camif_timer4_c,</div><div class='del'>-		    vfe_camif_timer5_a, vfe_camif_timer5_b, vfe_camif_timer6_a,</div><div class='del'>-		    vfe_camif_timer6_b, vfe_camif_timer6_c, vfe_camif_timer7_a,</div><div class='del'>-		    vfe_camif_timer7_b, vfe_camif_timer7_c, wlan</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	msmgpio: pinctrl@800000 {</div><div class='del'>-		compatible = "qcom,msm8960-pinctrl";</div><div class='del'>-		reg = &lt;0x800000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;msmgpio 0 0 152&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;0 16 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		gsbi8_uart: gsbi8-uart {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio34", "gpio35";</div><div class='del'>-				function = "gsbi8";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tx {</div><div class='del'>-				pins = "gpio34";</div><div class='del'>-				drive-strength = &lt;4&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rx {</div><div class='del'>-				pins = "gpio35";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-pull-up;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..9172b50f7a98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8960-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,157 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8960-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8960 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8960 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8960-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 76</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 152</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8960-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8960-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8960-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-1])$"</div><div class='add'>+            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc3_clk, sdc3_cmd,</div><div class='add'>+                      sdc3_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, audio_pcm, bt, cam_mclk0, cam_mclk1, cam_mclk2,</div><div class='add'>+                codec_mic_i2s, codec_spkr_i2s, ext_gps, fm, gps_blanking,</div><div class='add'>+                gps_pps_in, gps_pps_out, gp_clk_0a, gp_clk_0b, gp_clk_1a,</div><div class='add'>+                gp_clk_1b, gp_clk_2a, gp_clk_2b, gp_mn, gp_pdm_0a, gp_pdm_0b,</div><div class='add'>+                gp_pdm_1a, gp_pdm_1b, gp_pdm_2a, gp_pdm_2b, gsbi1,</div><div class='add'>+                gsbi1_spi_cs1_n, gsbi1_spi_cs2a_n, gsbi1_spi_cs2b_n,</div><div class='add'>+                gsbi1_spi_cs3_n, gsbi2, gsbi2_spi_cs1_n, gsbi2_spi_cs2_n,</div><div class='add'>+                gsbi2_spi_cs3_n, gsbi3, gsbi4, gsbi4_3d_cam_i2c_l,</div><div class='add'>+                gsbi4_3d_cam_i2c_r, gsbi5, gsbi5_3d_cam_i2c_l,</div><div class='add'>+                gsbi5_3d_cam_i2c_r, gsbi6, gsbi7, gsbi8, gsbi9, gsbi10, gsbi11,</div><div class='add'>+                gsbi11_spi_cs1a_n, gsbi11_spi_cs1b_n, gsbi11_spi_cs2a_n,</div><div class='add'>+                gsbi11_spi_cs2b_n, gsbi11_spi_cs3_n, gsbi12, hdmi_cec,</div><div class='add'>+                hdmi_ddc_clock, hdmi_ddc_data, hdmi_hot_plug_detect, hsic,</div><div class='add'>+                mdp_vsync, mi2s, mic_i2s, pmb_clk, pmb_ext_ctrl, ps_hold,</div><div class='add'>+                rpm_wdog, sdc2, sdc4, sdc5, slimbus1, slimbus2, spkr_i2s,</div><div class='add'>+                ssbi1, ssbi2, ssbi_ext_gps, ssbi_pmic2, ssbi_qpa1, ssbi_ts,</div><div class='add'>+                tsif1, tsif2, ts_eoc, usb_fs1, usb_fs1_oe, usb_fs1_oe_n,</div><div class='add'>+                usb_fs2, usb_fs2_oe, usb_fs2_oe_n, vfe_camif_timer1_a,</div><div class='add'>+                vfe_camif_timer1_b, vfe_camif_timer2, vfe_camif_timer3_a,</div><div class='add'>+                vfe_camif_timer3_b, vfe_camif_timer4_a, vfe_camif_timer4_b,</div><div class='add'>+                vfe_camif_timer4_c, vfe_camif_timer5_a, vfe_camif_timer5_b,</div><div class='add'>+                vfe_camif_timer6_a, vfe_camif_timer6_b, vfe_camif_timer6_c,</div><div class='add'>+                vfe_camif_timer7_a, vfe_camif_timer7_b, vfe_camif_timer7_c,</div><div class='add'>+                wlan ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    msmgpio: pinctrl@800000 {</div><div class='add'>+        compatible = "qcom,msm8960-pinctrl";</div><div class='add'>+        reg = &lt;0x800000 0x4000&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;msmgpio 0 0 152&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        spi1-default-state {</div><div class='add'>+            mosi-pins {</div><div class='add'>+                pins = "gpio6";</div><div class='add'>+                function = "gsbi1";</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            miso-pins {</div><div class='add'>+                pins = "gpio7";</div><div class='add'>+                function = "gsbi1";</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cs-pins {</div><div class='add'>+                pins = "gpio8";</div><div class='add'>+                function = "gpio";</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+                output-low;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            clk-pins {</div><div class='add'>+                pins = "gpio9";</div><div class='add'>+                function = "gsbi1";</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt<br/>deleted file mode 100644<br/>index 004056506679..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,121 +0,0 @@</div><div class='del'>-Qualcomm MSM8974 TLMM block</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "qcom,msm8974-pinctrl"</div><div class='del'>-- reg: Should be the base address and length of the TLMM block.</div><div class='del'>-- interrupts: Should be the parent IRQ of the TLMM block.</div><div class='del'>-- interrupt-controller: Marks the device node as an interrupt controller.</div><div class='del'>-- #interrupt-cells: Should be two.</div><div class='del'>-- gpio-controller: Marks the device node as a GPIO controller.</div><div class='del'>-- #gpio-cells : Should be two.</div><div class='del'>-                The first cell is the gpio pin number and the</div><div class='del'>-                second cell is used for optional parameters.</div><div class='del'>-- gpio-ranges: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-Qualcomm's pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>- pins, function, bias-disable, bias-pull-down, bias-pull-up, drive-strength.</div><div class='del'>-</div><div class='del'>-Non-empty subnodes must specify the 'pins' property.</div><div class='del'>-Note that not all properties are valid for all pins.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Valid values for pins are:</div><div class='del'>-  gpio0-gpio145</div><div class='del'>-    Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-  sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data</div><div class='del'>-    Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-  hsic_data, hsic_strobe</div><div class='del'>-    Supports only mux</div><div class='del'>-</div><div class='del'>-Valid values for function are:</div><div class='del'>-  cci_i2c0, cci_i2c1, uim1, uim2, uim_batt_alarm,</div><div class='del'>-  blsp_uim1, blsp_uart1, blsp_i2c1, blsp_spi1,</div><div class='del'>-  blsp_uim2, blsp_uart2, blsp_i2c2, blsp_spi2,</div><div class='del'>-  blsp_uim3, blsp_uart3, blsp_i2c3, blsp_spi3,</div><div class='del'>-  blsp_uim4, blsp_uart4, blsp_i2c4, blsp_spi4,</div><div class='del'>-  blsp_uim5, blsp_uart5, blsp_i2c5, blsp_spi5,</div><div class='del'>-  blsp_uim6, blsp_uart6, blsp_i2c6, blsp_spi6,</div><div class='del'>-  blsp_uim7, blsp_uart7, blsp_i2c7, blsp_spi7,</div><div class='del'>-  blsp_uim8, blsp_uart8, blsp_i2c8, blsp_spi8,</div><div class='del'>-  blsp_uim9, blsp_uart9, blsp_i2c9, blsp_spi9,</div><div class='del'>-  blsp_uim10, blsp_uart10, blsp_i2c10, blsp_spi10,</div><div class='del'>-  blsp_uim11, blsp_uart11, blsp_i2c11, blsp_spi11,</div><div class='del'>-  blsp_uim12, blsp_uart12, blsp_i2c12, blsp_spi12,</div><div class='del'>-  blsp_spi1_cs1, blsp_spi2_cs2, blsp_spi_cs3, blsp_spi2_cs1, blsp_spi2_cs2</div><div class='del'>-  blsp_spi2_cs3, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,</div><div class='del'>-  sdc3, sdc4, gcc_gp_clk1, gcc_gp_clk2, gcc_gp_clk3, cci_timer0, cci_timer1,</div><div class='del'>-  cci_timer2, cci_timer3, cci_async_in0, cci_async_in1, cci_async_in2,</div><div class='del'>-  cam_mckl0, cam_mclk1, cam_mclk2, cam_mclk3, mdp_vsync, hdmi_cec, hdmi_ddc,</div><div class='del'>-  hdmi_hpd, edp_hpd, gp_pdm0, gp_pdm1, gp_pdm2, gp_pdm3, gp0_clk, gp1_clk,</div><div class='del'>-  gp_mn, tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s, spkr_mi2s,</div><div class='del'>-  ter_mi2s, sec_mi2s, bt, fm, wlan, slimbus, hsic_ctl, gpio</div><div class='del'>-</div><div class='del'>-  (Note that this is not yet the complete list of functions)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	msmgpio: pinctrl@fd510000 {</div><div class='del'>-		compatible = "qcom,msm8974-pinctrl";</div><div class='del'>-		reg = &lt;0xfd510000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;msmgpio 0 0 146&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-		interrupts = &lt;0 208 0&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;uart2_default&gt;;</div><div class='del'>-</div><div class='del'>-		uart2_default: uart2_default {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "blsp_uart2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			tx {</div><div class='del'>-				pins = "gpio4";</div><div class='del'>-				drive-strength = &lt;4&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			rx {</div><div class='del'>-				pins = "gpio5";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-pull-up;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..8a3be65c51ed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8974-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,172 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8974 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8974-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 73</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 146</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8974-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8974-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8974-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"</div><div class='add'>+            - enum: [ hsic_data, hsic_strobe, sdc1_clk, sdc1_cmd, sdc1_data,</div><div class='add'>+                      sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, cci_i2c0, cci_i2c1, uim1, uim2, uim_batt_alarm,</div><div class='add'>+                blsp_uim1, blsp_uart1, blsp_i2c1, blsp_spi1, blsp_uim2,</div><div class='add'>+                blsp_uart2, blsp_i2c2, blsp_spi2, blsp_uim3, blsp_uart3,</div><div class='add'>+                blsp_i2c3, blsp_spi3, blsp_uim4, blsp_uart4, blsp_i2c4,</div><div class='add'>+                blsp_spi4, blsp_uim5, blsp_uart5, blsp_i2c5, blsp_spi5,</div><div class='add'>+                blsp_uim6, blsp_uart6, blsp_i2c6, blsp_spi6, blsp_uim7,</div><div class='add'>+                blsp_uart7, blsp_i2c7, blsp_spi7, blsp_uim8, blsp_uart8,</div><div class='add'>+                blsp_i2c8, blsp_spi8, blsp_uim9, blsp_uart9, blsp_i2c9,</div><div class='add'>+                blsp_spi9, blsp_uim10, blsp_uart10, blsp_i2c10, blsp_spi10,</div><div class='add'>+                blsp_uim11, blsp_uart11, blsp_i2c11, blsp_spi11, blsp_uim12,</div><div class='add'>+                blsp_uart12, blsp_i2c12, blsp_spi12, blsp_spi1_cs1,</div><div class='add'>+                blsp_spi2_cs2, blsp_spi_cs3, blsp_spi2_cs1, blsp_spi2_cs2</div><div class='add'>+                blsp_spi2_cs3, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3,</div><div class='add'>+                sdc3, sdc4, gcc_gp_clk1, gcc_gp_clk2, gcc_gp_clk3, cci_timer0,</div><div class='add'>+                cci_timer1, cci_timer2, cci_timer3, cci_async_in0,</div><div class='add'>+                cci_async_in1, cci_async_in2, cam_mckl0, cam_mclk1, cam_mclk2,</div><div class='add'>+                cam_mclk3, mdp_vsync, hdmi_cec, hdmi_ddc, hdmi_hpd, edp_hpd,</div><div class='add'>+                gp_pdm0, gp_pdm1, gp_pdm2, gp_pdm3, gp0_clk, gp1_clk, gp_mn,</div><div class='add'>+                tsif1, tsif2, hsic, grfc, audio_ref_clk, qua_mi2s, pri_mi2s,</div><div class='add'>+                spkr_mi2s, ter_mi2s, sec_mi2s, bt, fm, wlan, slimbus, hsic_ctl ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+    allOf:</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              contains:</div><div class='add'>+                enum:</div><div class='add'>+                  - hsic_data</div><div class='add'>+                  - hsic_strobe</div><div class='add'>+          required:</div><div class='add'>+            - pins</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            bias-pull-down: false</div><div class='add'>+            bias-pull-up: false</div><div class='add'>+            bias-disable: false</div><div class='add'>+            drive-strength: false</div><div class='add'>+            input-enable: false</div><div class='add'>+            output-high: false</div><div class='add'>+            output-low: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@fd510000 {</div><div class='add'>+        compatible = "qcom,msm8974-pinctrl";</div><div class='add'>+        reg = &lt;0xfd510000 0x4000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 146&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        sdc1-off-state {</div><div class='add'>+            clk-pins {</div><div class='add'>+                pins = "sdc1_clk";</div><div class='add'>+                bias-disable;</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cmd-pins {</div><div class='add'>+                pins = "sdc1_cmd";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            data-pins {</div><div class='add'>+                pins = "sdc1_data";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        blsp2-uart1-sleep-state {</div><div class='add'>+            pins = "gpio41", "gpio42", "gpio43", "gpio44";</div><div class='add'>+            function = "gpio";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        hsic-state {</div><div class='add'>+            pins = "hsic_data", "hsic_strobe";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt<br/>deleted file mode 100644<br/>index 70d04d12f136..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,183 +0,0 @@</div><div class='del'>-Qualcomm MSM8976 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-MSM8956 and MSM8976 platforms.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,msm8976-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio145</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc1_clk, sdc1_cmd, sdc1_data,</div><div class='del'>-		      sdc2_clk, sdc2_cmd, sdc2_data,</div><div class='del'>-		      sdc3_clk, sdc3_cmd, sdc3_data</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2,</div><div class='del'>-		    blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3,</div><div class='del'>-		    qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b,</div><div class='del'>-		    blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5,</div><div class='del'>-		    qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a,</div><div class='del'>-		    qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b,</div><div class='del'>-		    blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a,</div><div class='del'>-		    sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi,</div><div class='del'>-		    blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a,</div><div class='del'>-		    uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset,</div><div class='del'>-		    uim1_present, uim2_data, uim2_clk, uim2_reset,</div><div class='del'>-		    uim2_present, ts_xvdd, mipi_dsi0, us_euro, ts_resout,</div><div class='del'>-		    ts_sample, sec_mi2s_mclk_b, pri_mi2s, codec_reset,</div><div class='del'>-		    cdc_pdm0, us_emitter, pri_mi2s_mclk_b, pri_mi2s_mclk_c,</div><div class='del'>-		    lpass_slimbus, lpass_slimbus0, lpass_slimbus1, codec_int1,</div><div class='del'>-		    codec_int2, wcss_bt, sdc3, wcss_wlan2, wcss_wlan1,</div><div class='del'>-		    wcss_wlan0, wcss_wlan, wcss_fm, key_volp, key_snapshot,</div><div class='del'>-		    key_focus, key_home, pwr_down, dmic0_clk, hdmi_int,</div><div class='del'>-		    dmic0_data, wsa_vi, wsa_en, blsp_spi8, wsa_irq, blsp_i2c8,</div><div class='del'>-		    pa_indicator, modem_tsync, ssbi_wtr1, gsm1_tx, gsm0_tx,</div><div class='del'>-		    sdcard_det, sec_mi2s, ss_switch,</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@1000000 {</div><div class='del'>-		compatible = "qcom,msm8976-pinctrl";</div><div class='del'>-		reg = &lt;0x1000000 0x300000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 145&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		blsp1_uart2_active: blsp1_uart2_active {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio4", "gpio5", "gpio6", "gpio7";</div><div class='del'>-				function = "blsp_uart2";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			config {</div><div class='del'>-				pins = "gpio4", "gpio5", "gpio6", "gpio7";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..ca95de0b87a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8976-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8976 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8976 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8976-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 73</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 145</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8976-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8976-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8976-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Desired pin configuration for a device or its specific state (like sleep</div><div class='add'>+      or active).</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this state.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-4])$"</div><div class='add'>+            - enum: [ qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,</div><div class='add'>+                      qdsd_data3, sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk,</div><div class='add'>+                      sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, blsp_uart1, blsp_spi1, smb_int, blsp_i2c1, blsp_spi2,</div><div class='add'>+                blsp_uart2, blsp_i2c2, gcc_gp1_clk_b, blsp_spi3,</div><div class='add'>+                qdss_tracedata_b, blsp_i2c3, gcc_gp2_clk_b, gcc_gp3_clk_b,</div><div class='add'>+                blsp_spi4, cap_int, blsp_i2c4, blsp_spi5, blsp_uart5,</div><div class='add'>+                qdss_traceclk_a, m_voc, blsp_i2c5, qdss_tracectl_a,</div><div class='add'>+                qdss_tracedata_a, blsp_spi6, blsp_uart6, qdss_tracectl_b,</div><div class='add'>+                blsp_i2c6, qdss_traceclk_b, mdp_vsync, pri_mi2s_mclk_a,</div><div class='add'>+                sec_mi2s_mclk_a, cam_mclk, cci0_i2c, cci1_i2c, blsp1_spi,</div><div class='add'>+                blsp3_spi, gcc_gp1_clk_a, gcc_gp2_clk_a, gcc_gp3_clk_a,</div><div class='add'>+                uim_batt, sd_write, uim1_data, uim1_clk, uim1_reset,</div><div class='add'>+                uim1_present, uim2_data, uim2_clk, uim2_reset, uim2_present,</div><div class='add'>+                ts_xvdd, mipi_dsi0, us_euro, ts_resout, ts_sample,</div><div class='add'>+                sec_mi2s_mclk_b, pri_mi2s, codec_reset, cdc_pdm0, us_emitter,</div><div class='add'>+                pri_mi2s_mclk_b, pri_mi2s_mclk_c, lpass_slimbus,</div><div class='add'>+                lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2,</div><div class='add'>+                wcss_bt, sdc3, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,</div><div class='add'>+                wcss_fm, key_volp, key_snapshot, key_focus, key_home, pwr_down,</div><div class='add'>+                dmic0_clk, hdmi_int, dmic0_data, wsa_vi, wsa_en, blsp_spi8,</div><div class='add'>+                wsa_irq, blsp_i2c8, pa_indicator, modem_tsync, ssbi_wtr1,</div><div class='add'>+                gsm1_tx, gsm0_tx, sdcard_det, sec_mi2s, ss_switch ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,msm8976-pinctrl";</div><div class='add'>+        reg = &lt;0x1000000 0x300000&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 145&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        blsp1-uart2-active-state {</div><div class='add'>+            pins = "gpio4", "gpio5", "gpio6", "gpio7";</div><div class='add'>+            function = "blsp_uart2";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-disable;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.txt<br/>deleted file mode 100644<br/>index da52df6273bc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,186 +0,0 @@</div><div class='del'>-Qualcomm MSM8994 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-MSM8994 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Should contain one of:</div><div class='del'>-		    "qcom,msm8992-pinctrl",</div><div class='del'>-		    "qcom,msm8994-pinctrl".</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio145</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc1_clk, sdc1_cmd, sdc1_data sdc1_rclk, sdc2_clk,</div><div class='del'>-		      sdc2_cmd, sdc2_data</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    audio_ref_clk,  blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5,</div><div class='del'>-		    blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_i2c9, blsp_i2c10, blsp_i2c11,</div><div class='del'>-		    blsp_i2c12, blsp_spi1, blsp_spi1_cs1, blsp_spi1_cs2, blsp_spi1_cs3,</div><div class='del'>-		    blsp_spi2, blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3, blsp_spi3,</div><div class='del'>-		    blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, blsp_spi8, blsp_spi9,</div><div class='del'>-		    blsp_spi10, blsp_spi10_cs1, blsp_spi10_cs2, blsp_spi10_cs3, blsp_spi11,</div><div class='del'>-		    blsp_spi12, blsp_uart1, blsp_uart2, blsp_uart3, blsp_uart4, blsp_uart5,</div><div class='del'>-		    blsp_uart6, blsp_uart7, blsp_uart8, blsp_uart9, blsp_uart10, blsp_uart11,</div><div class='del'>-		    blsp_uart12, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim4, blsp_uim5,</div><div class='del'>-		    blsp_uim6, blsp_uim7, blsp_uim8, blsp_uim9, blsp_uim10, blsp_uim11,</div><div class='del'>-		    blsp_uim12, blsp11_i2c_scl_b, blsp11_i2c_sda_b, blsp11_uart_rx_b,</div><div class='del'>-		    blsp11_uart_tx_b, cam_mclk0, cam_mclk1, cam_mclk2, cam_mclk3,</div><div class='del'>-		    cci_async_in0, cci_async_in1, cci_async_in2, cci_i2c0, cci_i2c1,</div><div class='del'>-		    cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,</div><div class='del'>-		    gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a,</div><div class='del'>-		    gcc_gp3_clk_b, gp_mn, gp_pdm0, gp_pdm1, gp_pdm2, gp0_clk,</div><div class='del'>-		    gp1_clk, gps_tx, gsm_tx, hdmi_cec, hdmi_ddc, hdmi_hpd, hdmi_rcv,</div><div class='del'>-		    mdp_vsync, mss_lte, nav_pps, nav_tsync, qdss_cti_trig_in_a,</div><div class='del'>-		    qdss_cti_trig_in_b, qdss_cti_trig_in_c, qdss_cti_trig_in_d,</div><div class='del'>-		    qdss_cti_trig_out_a, qdss_cti_trig_out_b, qdss_cti_trig_out_c,</div><div class='del'>-		    qdss_cti_trig_out_d, qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a,</div><div class='del'>-		    qdss_tracectl_b, qdss_tracedata_a, qdss_tracedata_b, qua_mi2s, pci_e0,</div><div class='del'>-		    pci_e1, pri_mi2s, sdc4, sec_mi2s, slimbus, spkr_i2s, ter_mi2s, tsif1,</div><div class='del'>-		    tsif2, uim_batt_alarm, uim1, uim2, uim3, uim4, gpio</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	msmgpio: pinctrl@fd510000 {</div><div class='del'>-		compatible = "qcom,msm8994-pinctrl";</div><div class='del'>-		reg = &lt;0xfd510000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;msmgpio 0 0 146&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		blsp1_uart2_default: blsp1_uart2_default {</div><div class='del'>-			pinmux {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "blsp_uart2";</div><div class='del'>-			};</div><div class='del'>-			pinconf {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				drive-strength = &lt;16&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..41525ecfa8e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8994-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8994 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8994 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,msm8992-pinctrl</div><div class='add'>+      - qcom,msm8994-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 73</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 146</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8994-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8994-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8994-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"</div><div class='add'>+            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data, sdc3_clk, sdc3_cmd, sdc3_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, audio_ref_clk, blsp_i2c1, blsp_i2c2, blsp_i2c3,</div><div class='add'>+                blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8,</div><div class='add'>+                blsp_i2c9, blsp_i2c10, blsp_i2c11, blsp_i2c12, blsp_spi1,</div><div class='add'>+                blsp_spi1_cs1, blsp_spi1_cs2, blsp_spi1_cs3, blsp_spi2,</div><div class='add'>+                blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3, blsp_spi3,</div><div class='add'>+                blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, blsp_spi8,</div><div class='add'>+                blsp_spi9, blsp_spi10, blsp_spi10_cs1, blsp_spi10_cs2,</div><div class='add'>+                blsp_spi10_cs3, blsp_spi11, blsp_spi12, blsp_uart1, blsp_uart2,</div><div class='add'>+                blsp_uart3, blsp_uart4, blsp_uart5, blsp_uart6, blsp_uart7,</div><div class='add'>+                blsp_uart8, blsp_uart9, blsp_uart10, blsp_uart11, blsp_uart12,</div><div class='add'>+                blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim4, blsp_uim5,</div><div class='add'>+                blsp_uim6, blsp_uim7, blsp_uim8, blsp_uim9, blsp_uim10,</div><div class='add'>+                blsp_uim11, blsp_uim12, blsp11_i2c_scl_b, blsp11_i2c_sda_b,</div><div class='add'>+                blsp11_uart_rx_b, blsp11_uart_tx_b, cam_mclk0, cam_mclk1,</div><div class='add'>+                cam_mclk2, cam_mclk3, cci_async_in0, cci_async_in1,</div><div class='add'>+                cci_async_in2, cci_i2c0, cci_i2c1, cci_timer0, cci_timer1,</div><div class='add'>+                cci_timer2, cci_timer3, cci_timer4, gcc_gp1_clk_a,</div><div class='add'>+                gcc_gp1_clk_b, gcc_gp2_clk_a, gcc_gp2_clk_b, gcc_gp3_clk_a,</div><div class='add'>+                gcc_gp3_clk_b, gp_mn, gp_pdm0, gp_pdm1, gp_pdm2, gp0_clk,</div><div class='add'>+                gp1_clk, gps_tx, gsm_tx, hdmi_cec, hdmi_ddc, hdmi_hpd,</div><div class='add'>+                hdmi_rcv, mdp_vsync, mss_lte, nav_pps, nav_tsync,</div><div class='add'>+                qdss_cti_trig_in_a, qdss_cti_trig_in_b, qdss_cti_trig_in_c,</div><div class='add'>+                qdss_cti_trig_in_d, qdss_cti_trig_out_a, qdss_cti_trig_out_b,</div><div class='add'>+                qdss_cti_trig_out_c, qdss_cti_trig_out_d, qdss_traceclk_a,</div><div class='add'>+                qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,</div><div class='add'>+                qdss_tracedata_a, qdss_tracedata_b, qua_mi2s, pci_e0, pci_e1,</div><div class='add'>+                pri_mi2s, sdc4, sec_mi2s, slimbus, spkr_i2s, ter_mi2s, tsif1,</div><div class='add'>+                tsif2, uim_batt_alarm, uim1, uim2, uim3, uim4 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@fd510000 {</div><div class='add'>+        compatible = "qcom,msm8994-pinctrl";</div><div class='add'>+        reg = &lt;0xfd510000 0x4000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 146&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        blsp1-uart2-default-state {</div><div class='add'>+            function = "blsp_uart2";</div><div class='add'>+            pins = "gpio4", "gpio5";</div><div class='add'>+            drive-strength = &lt;16&gt;;</div><div class='add'>+            bias-disable;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        blsp1-spi1-default-state {</div><div class='add'>+            default-pins {</div><div class='add'>+                pins = "gpio0", "gpio1", "gpio3";</div><div class='add'>+                function = "blsp_spi1";</div><div class='add'>+                drive-strength = &lt;10&gt;;</div><div class='add'>+                bias-pull-down;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cs-pins {</div><div class='add'>+                pins = "gpio8";</div><div class='add'>+                function = "gpio";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt<br/>deleted file mode 100644<br/>index a56cb882830c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,208 +0,0 @@</div><div class='del'>-Qualcomm MSM8996 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-MSM8996 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,msm8996-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio149</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,</div><div class='del'>-		      sdc2_data sdc1_rclk</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens,</div><div class='del'>-		    bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8,</div><div class='del'>-		    qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b,</div><div class='del'>-		    dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10,</div><div class='del'>-		    blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12,</div><div class='del'>-		    mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11,</div><div class='del'>-		    atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio, atest_char,</div><div class='del'>-		    cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8, qdss_tracedata_b,</div><div class='del'>-		    pll_reset, qdss_stm6, qdss_stm5, qdss_stm4, atest_usb2, cci_i2c,</div><div class='del'>-		    qdss_stm3, dac_calib3, atest_usb23, atest_char3, dac_calib4,</div><div class='del'>-		    qdss_stm2, atest_usb22, atest_char2, qdss_stm1, dac_calib5,</div><div class='del'>-		    atest_usb21, atest_char1, dbg_out, qdss_stm0, dac_calib6,</div><div class='del'>-		    atest_usb20, atest_char0, dac_calib10, qdss_stm10,</div><div class='del'>-		    qdss_cti_trig_in_a, cci_timer4, blsp_spi6, blsp_uart6, blsp_uim6,</div><div class='del'>-		    blsp2_spi, qdss_stm9, qdss_cti_trig_out_a, dac_calib11,</div><div class='del'>-		    qdss_stm8, cci_timer0, qdss_stm13, dac_calib7, cci_timer1,</div><div class='del'>-		    qdss_stm12, dac_calib8, cci_timer2, blsp1_spi, qdss_stm11,</div><div class='del'>-		    dac_calib9, cci_timer3, cci_async, dac_calib12, blsp_i2c6,</div><div class='del'>-		    qdss_tracectl_a, dac_calib13, qdss_traceclk_a, dac_calib14,</div><div class='del'>-		    dac_calib15, hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem,</div><div class='del'>-		    dac_calib17, hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto,</div><div class='del'>-		    dac_calib19, hdmi_hot, dac_calib20, dac_calib21, pci_e0,</div><div class='del'>-		    dac_calib22, dac_calib23, dac_calib24, tsif1_sync, dac_calib25,</div><div class='del'>-		    sd_write, tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2,</div><div class='del'>-		    qdss_cti, blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3,</div><div class='del'>-		    uim3, blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9,</div><div class='del'>-		    blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7,</div><div class='del'>-		    qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11, blsp_uart11,</div><div class='del'>-		    blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a, blsp_i2c11, cri_trng0,</div><div class='del'>-		    cri_trng1, cri_trng, qdss_stm18, pri_mi2s, qdss_stm17, blsp_spi4,</div><div class='del'>-		    blsp_uart4, blsp_uim4, qdss_stm16, qdss_stm15, blsp_i2c4,</div><div class='del'>-		    qdss_stm14, dac_calib26, spkr_i2s, audio_ref, lpass_slimbus,</div><div class='del'>-		    isense_dbg, tsense_pwm1, tsense_pwm2, btfm_slimbus, ter_mi2s,</div><div class='del'>-		    qdss_stm22, qdss_stm21, qdss_stm20, qdss_stm19, gcc_gp1_clk_b,</div><div class='del'>-		    sec_mi2s, blsp_spi5, blsp_uart5, blsp_uim5, gcc_gp2_clk_b,</div><div class='del'>-		    gcc_gp3_clk_b, blsp_i2c5, blsp_spi12, blsp_uart12, blsp_uim12,</div><div class='del'>-		    qdss_stm25, qdss_stm31, blsp_i2c12, qdss_stm30, qdss_stm29,</div><div class='del'>-		    tsif1_clk, qdss_stm28, tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27,</div><div class='del'>-		    qdss_traceclk_b, tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk,</div><div class='del'>-		    sdc4_clk, qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b,</div><div class='del'>-		    sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b,</div><div class='del'>-		    ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b, blsp11_uart_rx_b,</div><div class='del'>-		    blsp11_i2c_sda_b, prng_rosc, blsp11_i2c_scl_b, uim2, uim1, uim_batt,</div><div class='del'>-		    pci_e2, pa_indicator, adsp_ext, ddr_bist, qdss_tracedata_11,</div><div class='del'>-		    qdss_tracedata_12, modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx,</div><div class='del'>-		    qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3,</div><div class='del'>-		    gpio</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@1010000 {</div><div class='del'>-		compatible = "qcom,msm8996-pinctrl";</div><div class='del'>-		reg = &lt;0x01010000 0x300000&gt;;</div><div class='del'>-		interrupts = &lt;0 208 0&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 150&gt;;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		uart_console_active: uart_console_active {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "blsp_uart8";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			config {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..59d406b60957<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8996-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8996-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8996 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8996 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8996-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 75</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 150</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8996-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8996-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8996-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"</div><div class='add'>+            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, blsp_uart1, blsp_spi1, blsp_i2c1, blsp_uim1, atest_tsens,</div><div class='add'>+                bimc_dte1, dac_calib0, blsp_spi8, blsp_uart8, blsp_uim8,</div><div class='add'>+                qdss_cti_trig_out_b, bimc_dte0, dac_calib1, qdss_cti_trig_in_b,</div><div class='add'>+                dac_calib2, atest_tsens2, atest_usb1, blsp_spi10, blsp_uart10,</div><div class='add'>+                blsp_uim10, atest_bbrx1, atest_usb13, atest_bbrx0, atest_usb12,</div><div class='add'>+                mdp_vsync, edp_lcd, blsp_i2c10, atest_gpsadc1, atest_usb11,</div><div class='add'>+                atest_gpsadc0, edp_hot, atest_usb10, m_voc, dac_gpio,</div><div class='add'>+                atest_char, cam_mclk, pll_bypassnl, qdss_stm7, blsp_i2c8,</div><div class='add'>+                qdss_tracedata_b, pll_reset, qdss_stm6, qdss_stm5, qdss_stm4,</div><div class='add'>+                atest_usb2, cci_i2c, qdss_stm3, dac_calib3, atest_usb23,</div><div class='add'>+                atest_char3, dac_calib4, qdss_stm2, atest_usb22, atest_char2,</div><div class='add'>+                qdss_stm1, dac_calib5, atest_usb21, atest_char1, dbg_out,</div><div class='add'>+                qdss_stm0, dac_calib6, atest_usb20, atest_char0, dac_calib10,</div><div class='add'>+                qdss_stm10, qdss_cti_trig_in_a, cci_timer4, blsp_spi6,</div><div class='add'>+                blsp_uart6, blsp_uim6, blsp2_spi, qdss_stm9,</div><div class='add'>+                qdss_cti_trig_out_a, dac_calib11, qdss_stm8, cci_timer0,</div><div class='add'>+                qdss_stm13, dac_calib7, cci_timer1, qdss_stm12, dac_calib8,</div><div class='add'>+                cci_timer2, blsp1_spi, qdss_stm11, dac_calib9, cci_timer3,</div><div class='add'>+                cci_async, dac_calib12, blsp_i2c6, qdss_tracectl_a,</div><div class='add'>+                dac_calib13, qdss_traceclk_a, dac_calib14, dac_calib15,</div><div class='add'>+                hdmi_rcv, dac_calib16, hdmi_cec, pwr_modem, dac_calib17,</div><div class='add'>+                hdmi_ddc, pwr_nav, dac_calib18, pwr_crypto, dac_calib19,</div><div class='add'>+                hdmi_hot, dac_calib20, dac_calib21, pci_e0, dac_calib22,</div><div class='add'>+                dac_calib23, dac_calib24, tsif1_sync, dac_calib25, sd_write,</div><div class='add'>+                tsif1_error, blsp_spi2, blsp_uart2, blsp_uim2, qdss_cti,</div><div class='add'>+                blsp_i2c2, blsp_spi3, blsp_uart3, blsp_uim3, blsp_i2c3, uim3,</div><div class='add'>+                blsp_spi9, blsp_uart9, blsp_uim9, blsp10_spi, blsp_i2c9,</div><div class='add'>+                blsp_spi7, blsp_uart7, blsp_uim7, qdss_tracedata_a, blsp_i2c7,</div><div class='add'>+                qua_mi2s, gcc_gp1_clk_a, ssc_irq, uim4, blsp_spi11,</div><div class='add'>+                blsp_uart11, blsp_uim11, gcc_gp2_clk_a, gcc_gp3_clk_a,</div><div class='add'>+                blsp_i2c11, cri_trng0, cri_trng1, cri_trng, qdss_stm18,</div><div class='add'>+                pri_mi2s, qdss_stm17, blsp_spi4, blsp_uart4, blsp_uim4,</div><div class='add'>+                qdss_stm16, qdss_stm15, blsp_i2c4, qdss_stm14, dac_calib26,</div><div class='add'>+                spkr_i2s, audio_ref, lpass_slimbus, isense_dbg, tsense_pwm1,</div><div class='add'>+                tsense_pwm2, btfm_slimbus, ter_mi2s, qdss_stm22, qdss_stm21,</div><div class='add'>+                qdss_stm20, qdss_stm19, gcc_gp1_clk_b, sec_mi2s, blsp_spi5,</div><div class='add'>+                blsp_uart5, blsp_uim5, gcc_gp2_clk_b, gcc_gp3_clk_b, blsp_i2c5,</div><div class='add'>+                blsp_spi12, blsp_uart12, blsp_uim12, qdss_stm25, qdss_stm31,</div><div class='add'>+                blsp_i2c12, qdss_stm30, qdss_stm29, tsif1_clk, qdss_stm28,</div><div class='add'>+                tsif1_en, tsif1_data, sdc4_cmd, qdss_stm27, qdss_traceclk_b,</div><div class='add'>+                tsif2_error, sdc43, vfr_1, qdss_stm26, tsif2_clk, sdc4_clk,</div><div class='add'>+                qdss_stm24, tsif2_en, sdc42, qdss_stm23, qdss_tracectl_b,</div><div class='add'>+                sd_card, tsif2_data, sdc41, tsif2_sync, sdc40, mdp_vsync_p_b,</div><div class='add'>+                ldo_en, mdp_vsync_s_b, ldo_update, blsp11_uart_tx_b,</div><div class='add'>+                blsp11_uart_rx_b, blsp11_i2c_sda_b, prng_rosc,</div><div class='add'>+                blsp11_i2c_scl_b, uim2, uim1, uim_batt, pci_e2, pa_indicator,</div><div class='add'>+                adsp_ext, ddr_bist, qdss_tracedata_11, qdss_tracedata_12,</div><div class='add'>+                modem_tsync, nav_dr, nav_pps, pci_e1, gsm_tx, qspi_cs, ssbi2,</div><div class='add'>+                ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@1010000 {</div><div class='add'>+        compatible = "qcom,msm8996-pinctrl";</div><div class='add'>+        reg = &lt;0x01010000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 150&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        blsp1-spi1-default-state {</div><div class='add'>+            spi-pins {</div><div class='add'>+                pins = "gpio0", "gpio1", "gpio3";</div><div class='add'>+                function = "blsp_spi1";</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cs-pins {</div><div class='add'>+                pins = "gpio2";</div><div class='add'>+                function = "gpio";</div><div class='add'>+                drive-strength = &lt;16&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+                output-high;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        blsp1-spi1-sleep-state {</div><div class='add'>+            pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+            function = "gpio";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt<br/>deleted file mode 100644<br/>index c4de930f2406..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,202 +0,0 @@</div><div class='del'>-Qualcomm MSM8998 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-MSM8998 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,msm8998-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio149</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc2_clk, sdc2_cmd, sdc2_data</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      ufs_reset</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    gpio, adsp_ext, agera_pll, atest_char, atest_gpsadc0,</div><div class='del'>-		    atest_gpsadc1, atest_tsens, atest_tsens2, atest_usb1,</div><div class='del'>-		    atest_usb10, atest_usb11, atest_usb12, atest_usb13,</div><div class='del'>-		    audio_ref, bimc_dte0, bimc_dte1, blsp10_spi, blsp10_spi_a,</div><div class='del'>-		    blsp10_spi_b, blsp11_i2c, blsp1_spi, blsp1_spi_a,</div><div class='del'>-		    blsp1_spi_b, blsp2_spi, blsp9_spi, blsp_i2c1, blsp_i2c2,</div><div class='del'>-		    blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7,</div><div class='del'>-		    blsp_i2c8, blsp_i2c9, blsp_i2c10, blsp_i2c11, blsp_i2c12,</div><div class='del'>-		    blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi4, blsp_spi5,</div><div class='del'>-		    blsp_spi6, blsp_spi7, blsp_spi8, blsp_spi9, blsp_spi10,</div><div class='del'>-		    blsp_spi11, blsp_spi12, blsp_uart1_a, blsp_uart1_b,</div><div class='del'>-		    blsp_uart2_a, blsp_uart2_b, blsp_uart3_a, blsp_uart3_b,</div><div class='del'>-		    blsp_uart7_a, blsp_uart7_b, blsp_uart8, blsp_uart8_a,</div><div class='del'>-		    blsp_uart8_b, blsp_uart9_a, blsp_uart9_b, blsp_uim1_a,</div><div class='del'>-		    blsp_uim1_b, blsp_uim2_a, blsp_uim2_b, blsp_uim3_a,</div><div class='del'>-		    blsp_uim3_b, blsp_uim7_a, blsp_uim7_b, blsp_uim8_a,</div><div class='del'>-		    blsp_uim8_b, blsp_uim9_a, blsp_uim9_b, bt_reset,</div><div class='del'>-		    btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,</div><div class='del'>-		    cci_timer1, cci_timer2, cci_timer3, cci_timer4, cri_trng,</div><div class='del'>-		    cri_trng0, cri_trng1, dbg_out, ddr_bist, edp_hot, edp_lcd,</div><div class='del'>-		    gcc_gp1_a, gcc_gp1_b, gcc_gp2_a, gcc_gp2_b, gcc_gp3_a,</div><div class='del'>-		    gcc_gp3_b, hdmi_cec, hdmi_ddc, hdmi_hot, hdmi_rcv,</div><div class='del'>-		    isense_dbg, jitter_bist, ldo_en, ldo_update, lpass_slimbus,</div><div class='del'>-		    m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,</div><div class='del'>-		    mdp_vsync3, mdp_vsync_a, mdp_vsync_b, modem_tsync, mss_lte,</div><div class='del'>-		    nav_dr, nav_pps, pa_indicator, pci_e0, phase_flag,</div><div class='del'>-		    pll_bypassnl, pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc,</div><div class='del'>-		    pwr_crypto, pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b,</div><div class='del'>-		    qdss_cti1_a, qdss_cti1_b, qdss, qlink_enable,</div><div class='del'>-		    qlink_request, qua_mi2s, sd_card, sd_write, sdc40, sdc41,</div><div class='del'>-		    sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu,</div><div class='del'>-		    spkr_i2s, ssbi1, ssc_irq, ter_mi2s, tgu_ch0, tgu_ch1,</div><div class='del'>-		    tsense_pwm1, tsense_pwm2, tsif0, tsif1,</div><div class='del'>-		    uim1_clk, uim1_data, uim1_present,</div><div class='del'>-		    uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset,</div><div class='del'>-		    uim_batt, usb_phy, vfr_1, vsense_clkout, vsense_data0,</div><div class='del'>-		    vsense_data1, vsense_mode, wlan1_adc0, wlan1_adc1,</div><div class='del'>-		    wlan2_adc0, wlan2_adc1,</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@03400000 {</div><div class='del'>-		compatible = "qcom,msm8998-pinctrl";</div><div class='del'>-		reg = &lt;0x03400000 0xc00000&gt;;</div><div class='del'>-		interrupts = &lt;0 208 0&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 175&gt;;</div><div class='del'>-		gpio-reserved-ranges = &lt;0 4&gt;, &lt;81 4&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		uart_console_active: uart_console_active {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "blsp_uart8_a";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			config {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..bd6d7caf499a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,msm8998-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,164 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,msm8998-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8998 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm MSM8998 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm8998-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 75</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 150</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-msm8998-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-msm8998-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-msm8998-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"</div><div class='add'>+            - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, adsp_ext, agera_pll, atest_char, atest_gpsadc0,</div><div class='add'>+                atest_gpsadc1, atest_tsens, atest_tsens2, atest_usb1,</div><div class='add'>+                atest_usb10, atest_usb11, atest_usb12, atest_usb13, audio_ref,</div><div class='add'>+                bimc_dte0, bimc_dte1, blsp10_spi, blsp10_spi_a, blsp10_spi_b,</div><div class='add'>+                blsp11_i2c, blsp1_spi, blsp1_spi_a, blsp1_spi_b, blsp2_spi,</div><div class='add'>+                blsp9_spi, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4,</div><div class='add'>+                blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8, blsp_i2c9,</div><div class='add'>+                blsp_i2c10, blsp_i2c11, blsp_i2c12, blsp_spi1, blsp_spi2,</div><div class='add'>+                blsp_spi3, blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7,</div><div class='add'>+                blsp_spi8, blsp_spi9, blsp_spi10, blsp_spi11, blsp_spi12,</div><div class='add'>+                blsp_uart1_a, blsp_uart1_b, blsp_uart2_a, blsp_uart2_b,</div><div class='add'>+                blsp_uart3_a, blsp_uart3_b, blsp_uart7_a, blsp_uart7_b,</div><div class='add'>+                blsp_uart8, blsp_uart8_a, blsp_uart8_b, blsp_uart9_a,</div><div class='add'>+                blsp_uart9_b, blsp_uim1_a, blsp_uim1_b, blsp_uim2_a,</div><div class='add'>+                blsp_uim2_b, blsp_uim3_a, blsp_uim3_b, blsp_uim7_a,</div><div class='add'>+                blsp_uim7_b, blsp_uim8_a, blsp_uim8_b, blsp_uim9_a,</div><div class='add'>+                blsp_uim9_b, bt_reset, btfm_slimbus, cam_mclk, cci_async,</div><div class='add'>+                cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3,</div><div class='add'>+                cci_timer4, cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist,</div><div class='add'>+                edp_hot, edp_lcd, gcc_gp1_a, gcc_gp1_b, gcc_gp2_a, gcc_gp2_b,</div><div class='add'>+                gcc_gp3_a, gcc_gp3_b, hdmi_cec, hdmi_ddc, hdmi_hot, hdmi_rcv,</div><div class='add'>+                isense_dbg, jitter_bist, ldo_en, ldo_update, lpass_slimbus,</div><div class='add'>+                m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,</div><div class='add'>+                mdp_vsync3, mdp_vsync_a, mdp_vsync_b, modem_tsync, mss_lte,</div><div class='add'>+                nav_dr, nav_pps, pa_indicator, pci_e0, phase_flag,</div><div class='add'>+                pll_bypassnl, pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc,</div><div class='add'>+                pwr_crypto, pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b,</div><div class='add'>+                qdss_cti1_a, qdss_cti1_b, qdss, qlink_enable, qlink_request,</div><div class='add'>+                qua_mi2s, sd_card, sd_write, sdc40, sdc41, sdc42, sdc43,</div><div class='add'>+                sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, spkr_i2s, ssbi1, ssc_irq,</div><div class='add'>+                ter_mi2s, tgu_ch0, tgu_ch1, tsense_pwm1, tsense_pwm2, tsif0,</div><div class='add'>+                tsif1, uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,</div><div class='add'>+                uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy, vfr_1,</div><div class='add'>+                vsense_clkout, vsense_data0, vsense_data1, vsense_mode,</div><div class='add'>+                wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@3400000 {</div><div class='add'>+        compatible = "qcom,msm8998-pinctrl";</div><div class='add'>+        reg = &lt;0x03400000 0xc00000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 150&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-reserved-ranges = &lt;0 4&gt;, &lt;81 4&gt;;</div><div class='add'>+</div><div class='add'>+        sdc2-off-state {</div><div class='add'>+            clk-pins {</div><div class='add'>+                pins = "sdc2_clk";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cmd-pins {</div><div class='add'>+                pins = "sdc2_cmd";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            data-pins {</div><div class='add'>+                pins = "sdc2_data";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        sdc2-cd-state {</div><div class='add'>+            pins = "gpio95";</div><div class='add'>+            function = "gpio";</div><div class='add'>+            bias-pull-up;</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml<br/>index fe2bcf0694d9..eaadd5a9a445 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.yaml</a></div><div class='hunk'>@@ -20,9 +20,11 @@ properties:</div><div class='ctx'>           - qcom,pm2250-gpio</div><div class='ctx'>           - qcom,pm660-gpio</div><div class='ctx'>           - qcom,pm660l-gpio</div><div class='add'>+          - qcom,pm6125-gpio</div><div class='ctx'>           - qcom,pm6150-gpio</div><div class='ctx'>           - qcom,pm6150l-gpio</div><div class='ctx'>           - qcom,pm6350-gpio</div><div class='add'>+          - qcom,pm7250b-gpio</div><div class='ctx'>           - qcom,pm7325-gpio</div><div class='ctx'>           - qcom,pm8005-gpio</div><div class='ctx'>           - qcom,pm8008-gpio</div><div class='hunk'>@@ -32,11 +34,16 @@ properties:</div><div class='ctx'>           - qcom,pm8058-gpio</div><div class='ctx'>           - qcom,pm8150-gpio</div><div class='ctx'>           - qcom,pm8150b-gpio</div><div class='add'>+          - qcom,pm8150l-gpio</div><div class='ctx'>           - qcom,pm8226-gpio</div><div class='ctx'>           - qcom,pm8350-gpio</div><div class='ctx'>           - qcom,pm8350b-gpio</div><div class='ctx'>           - qcom,pm8350c-gpio</div><div class='ctx'>           - qcom,pm8450-gpio</div><div class='add'>+          - qcom,pm8550-gpio</div><div class='add'>+          - qcom,pm8550b-gpio</div><div class='add'>+          - qcom,pm8550ve-gpio</div><div class='add'>+          - qcom,pm8550vs-gpio</div><div class='ctx'>           - qcom,pm8916-gpio</div><div class='ctx'>           - qcom,pm8917-gpio</div><div class='ctx'>           - qcom,pm8921-gpio</div><div class='hunk'>@@ -45,14 +52,21 @@ properties:</div><div class='ctx'>           - qcom,pm8994-gpio</div><div class='ctx'>           - qcom,pm8998-gpio</div><div class='ctx'>           - qcom,pma8084-gpio</div><div class='add'>+          - qcom,pmi632-gpio</div><div class='ctx'>           - qcom,pmi8950-gpio</div><div class='ctx'>           - qcom,pmi8994-gpio</div><div class='ctx'>           - qcom,pmi8998-gpio</div><div class='ctx'>           - qcom,pmk8350-gpio</div><div class='add'>+          - qcom,pmk8550-gpio</div><div class='add'>+          - qcom,pmm8155au-gpio</div><div class='add'>+          - qcom,pmm8654au-gpio</div><div class='add'>+          - qcom,pmp8074-gpio</div><div class='ctx'>           - qcom,pmr735a-gpio</div><div class='ctx'>           - qcom,pmr735b-gpio</div><div class='add'>+          - qcom,pmr735d-gpio</div><div class='ctx'>           - qcom,pms405-gpio</div><div class='ctx'>           - qcom,pmx55-gpio</div><div class='add'>+          - qcom,pmx65-gpio</div><div class='ctx'> </div><div class='ctx'>       - enum:</div><div class='ctx'>           - qcom,spmi-gpio</div><div class='hunk'>@@ -71,6 +85,16 @@ properties:</div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  gpio-line-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 44</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    # maxItems as half of total number of GPIOs, as there has to be at</div><div class='add'>+    # least one usable GPIO between each reserved range.</div><div class='add'>+    maxItems: 22</div><div class='add'>+</div><div class='ctx'>   '#gpio-cells':</div><div class='ctx'>     const: 2</div><div class='ctx'>     description:</div><div class='hunk'>@@ -87,28 +111,305 @@ required:</div><div class='ctx'>   - gpio-ranges</div><div class='ctx'>   - interrupt-controller</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8008-gpio</div><div class='add'>+              - qcom,pmi8950-gpio</div><div class='add'>+              - qcom,pmr735d-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8005-gpio</div><div class='add'>+              - qcom,pm8450-gpio</div><div class='add'>+              - qcom,pm8916-gpio</div><div class='add'>+              - qcom,pmk8350-gpio</div><div class='add'>+              - qcom,pmr735a-gpio</div><div class='add'>+              - qcom,pmr735b-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8018-gpio</div><div class='add'>+              - qcom,pm8019-gpio</div><div class='add'>+              - qcom,pm8550vs-gpio</div><div class='add'>+              - qcom,pmk8550-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8226-gpio</div><div class='add'>+              - qcom,pm8350b-gpio</div><div class='add'>+              - qcom,pm8550ve-gpio</div><div class='add'>+              - qcom,pm8950-gpio</div><div class='add'>+              - qcom,pmi632-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 8</div><div class='add'>+          maxItems: 8</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 4</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm6350-gpio</div><div class='add'>+              - qcom,pm8350c-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 9</div><div class='add'>+          maxItems: 9</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 5</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm2250-gpio</div><div class='add'>+              - qcom,pm6150-gpio</div><div class='add'>+              - qcom,pm7325-gpio</div><div class='add'>+              - qcom,pm8150-gpio</div><div class='add'>+              - qcom,pm8350-gpio</div><div class='add'>+              - qcom,pmc8180-gpio</div><div class='add'>+              - qcom,pmi8994-gpio</div><div class='add'>+              - qcom,pmm8155au-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 10</div><div class='add'>+          maxItems: 10</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 5</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pmx55-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 11</div><div class='add'>+          maxItems: 11</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm660l-gpio</div><div class='add'>+              - qcom,pm6150l-gpio</div><div class='add'>+              - qcom,pm7250b-gpio</div><div class='add'>+              - qcom,pm8038-gpio</div><div class='add'>+              - qcom,pm8150b-gpio</div><div class='add'>+              - qcom,pm8150l-gpio</div><div class='add'>+              - qcom,pm8550-gpio</div><div class='add'>+              - qcom,pm8550b-gpio</div><div class='add'>+              - qcom,pmc8180c-gpio</div><div class='add'>+              - qcom,pmp8074-gpio</div><div class='add'>+              - qcom,pms405-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 12</div><div class='add'>+          maxItems: 12</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm660-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 13</div><div class='add'>+          maxItems: 13</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 7</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pmi8998-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 14</div><div class='add'>+          maxItems: 14</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 7</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pmx65-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 16</div><div class='add'>+          maxItems: 16</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 8</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8994-gpio</div><div class='add'>+              - qcom,pma8084-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 22</div><div class='add'>+          maxItems: 22</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 11</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8998-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 26</div><div class='add'>+          maxItems: 26</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 13</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8941-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 36</div><div class='add'>+          maxItems: 36</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 18</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8917-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 38</div><div class='add'>+          maxItems: 38</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 19</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8058-gpio</div><div class='add'>+              - qcom,pm8921-gpio</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpio-line-names:</div><div class='add'>+          minItems: 44</div><div class='add'>+          maxItems: 44</div><div class='add'>+        gpio-reserved-ranges:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 22</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '-state$':</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-pmic-gpio-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "(pinconf|-pins)$":</div><div class='ctx'>             $ref: "#/$defs/qcom-pmic-gpio-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='ctx'>   qcom-pmic-gpio-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     allOf:</div><div class='del'>-      - $ref: "pinmux-node.yaml"</div><div class='del'>-      - $ref: "pincfg-node.yaml"</div><div class='add'>+      - $ref: pinmux-node.yaml</div><div class='add'>+      - $ref: pincfg-node.yaml</div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='ctx'>         description:</div><div class='ctx'>           List of gpio pins affected by the properties specified in</div><div class='ctx'>           this subnode.  Valid pins are</div><div class='add'>+                 - gpio1-gpio9 for pm6125</div><div class='ctx'>                  - gpio1-gpio10 for pm6150</div><div class='ctx'>                  - gpio1-gpio12 for pm6150l</div><div class='ctx'>                  - gpio1-gpio9 for pm6350</div><div class='add'>+                 - gpio1-gpio12 for pm7250b</div><div class='ctx'>                  - gpio1-gpio10 for pm7325</div><div class='ctx'>                  - gpio1-gpio4 for pm8005</div><div class='ctx'>                  - gpio1-gpio2 for pm8008</div><div class='hunk'>@@ -124,6 +425,11 @@ $defs:</div><div class='ctx'>                  - gpio1-gpio10 for pm8350</div><div class='ctx'>                  - gpio1-gpio8 for pm8350b</div><div class='ctx'>                  - gpio1-gpio9 for pm8350c</div><div class='add'>+                 - gpio1-gpio4 for pm8450</div><div class='add'>+                 - gpio1-gpio12 for pm8550</div><div class='add'>+                 - gpio1-gpio12 for pm8550b</div><div class='add'>+                 - gpio1-gpio8 for pm8550ve</div><div class='add'>+                 - gpio1-gpio6 for pm8550vs</div><div class='ctx'>                  - gpio1-gpio38 for pm8917</div><div class='ctx'>                  - gpio1-gpio44 for pm8921</div><div class='ctx'>                  - gpio1-gpio36 for pm8941</div><div class='hunk'>@@ -131,15 +437,22 @@ $defs:</div><div class='ctx'>                  - gpio1-gpio22 for pm8994</div><div class='ctx'>                  - gpio1-gpio26 for pm8998</div><div class='ctx'>                  - gpio1-gpio22 for pma8084</div><div class='add'>+                 - gpio1-gpio8 for pmi632</div><div class='ctx'>                  - gpio1-gpio2 for pmi8950</div><div class='ctx'>                  - gpio1-gpio10 for pmi8994</div><div class='ctx'>                  - gpio1-gpio4 for pmk8350</div><div class='add'>+                 - gpio1-gpio6 for pmk8550</div><div class='add'>+                 - gpio1-gpio10 for pmm8155au</div><div class='add'>+                 - gpio1-gpio12 for pmm8654au</div><div class='add'>+                 - gpio1-gpio12 for pmp8074 (holes on gpio1 and gpio12)</div><div class='ctx'>                  - gpio1-gpio4 for pmr735a</div><div class='ctx'>                  - gpio1-gpio4 for pmr735b</div><div class='add'>+                 - gpio1-gpio2 for pmr735d</div><div class='ctx'>                  - gpio1-gpio12 for pms405 (holes on gpio1, gpio9</div><div class='ctx'>                                             and gpio10)</div><div class='ctx'>                  - gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10</div><div class='ctx'>                                             and gpio11)</div><div class='add'>+                 - gpio1-gpio16 for pmx65</div><div class='ctx'> </div><div class='ctx'>         items:</div><div class='ctx'>           pattern: "^gpio([0-9]+)$"</div><div class='hunk'>@@ -174,6 +487,7 @@ $defs:</div><div class='ctx'> </div><div class='ctx'>       bias-high-impedance: true</div><div class='ctx'>       input-enable: true</div><div class='add'>+      input-disable: true</div><div class='ctx'>       output-high: true</div><div class='ctx'>       output-low: true</div><div class='ctx'>       output-enable: true</div><div class='hunk'>@@ -232,7 +546,7 @@ examples:</div><div class='ctx'>       #gpio-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>       pm8921_gpio_keys: gpio-keys-state {</div><div class='del'>-        volume-keys {</div><div class='add'>+        volume-keys-pins {</div><div class='ctx'>           pins = "gpio20", "gpio21";</div><div class='ctx'>           function = "normal";</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml<br/>index df79274d0ec3..c91d3e3a094b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.yaml</a></div><div class='hunk'>@@ -15,28 +15,29 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - qcom,pm8018-mpp</div><div class='del'>-          - qcom,pm8019-mpp</div><div class='del'>-          - qcom,pm8038-mpp</div><div class='del'>-          - qcom,pm8058-mpp</div><div class='del'>-          - qcom,pm8226-mpp</div><div class='del'>-          - qcom,pm8821-mpp</div><div class='del'>-          - qcom,pm8841-mpp</div><div class='del'>-          - qcom,pm8916-mpp</div><div class='del'>-          - qcom,pm8917-mpp</div><div class='del'>-          - qcom,pm8921-mpp</div><div class='del'>-          - qcom,pm8941-mpp</div><div class='del'>-          - qcom,pm8950-mpp</div><div class='del'>-          - qcom,pmi8950-mpp</div><div class='del'>-          - qcom,pm8994-mpp</div><div class='del'>-          - qcom,pma8084-mpp</div><div class='del'>-          - qcom,pmi8994-mpp</div><div class='del'>-</div><div class='del'>-      - enum:</div><div class='del'>-          - qcom,spmi-mpp</div><div class='del'>-          - qcom,ssbi-mpp</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,pm8019-mpp</div><div class='add'>+              - qcom,pm8226-mpp</div><div class='add'>+              - qcom,pm8841-mpp</div><div class='add'>+              - qcom,pm8916-mpp</div><div class='add'>+              - qcom,pm8941-mpp</div><div class='add'>+              - qcom,pm8950-mpp</div><div class='add'>+              - qcom,pmi8950-mpp</div><div class='add'>+              - qcom,pm8994-mpp</div><div class='add'>+              - qcom,pma8084-mpp</div><div class='add'>+              - qcom,pmi8994-mpp</div><div class='add'>+          - const: qcom,spmi-mpp</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,pm8018-mpp</div><div class='add'>+              - qcom,pm8038-mpp</div><div class='add'>+              - qcom,pm8058-mpp</div><div class='add'>+              - qcom,pm8821-mpp</div><div class='add'>+              - qcom,pm8917-mpp</div><div class='add'>+              - qcom,pm8921-mpp</div><div class='add'>+          - const: qcom,ssbi-mpp</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -73,7 +74,7 @@ patternProperties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-pmic-mpp-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          "mpp":</div><div class='add'>+          '-pins$':</div><div class='ctx'>             $ref: "#/$defs/qcom-pmic-mpp-state"</div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -81,8 +82,8 @@ $defs:</div><div class='ctx'>   qcom-pmic-mpp-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     allOf:</div><div class='del'>-      - $ref: "pinmux-node.yaml"</div><div class='del'>-      - $ref: "pincfg-node.yaml"</div><div class='add'>+      - $ref: pinmux-node.yaml</div><div class='add'>+      - $ref: pincfg-node.yaml</div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='ctx'>         description:</div><div class='hunk'>@@ -178,7 +179,7 @@ examples:</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='ctx'>       default-state {</div><div class='del'>-        gpio-mpp {</div><div class='add'>+        gpio-pins {</div><div class='ctx'>           pins = "mpp1", "mpp2", "mpp3", "mpp4";</div><div class='ctx'>           function = "digital";</div><div class='ctx'>           input-enable;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml<br/>index 206f4f238736..032763649336 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,qcm2290-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,qcm2290-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,qcm2290-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. QCM2290 TLMM block</div><div class='hunk'>@@ -10,8 +10,7 @@ maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawn.guo@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  QCM2290 platform.</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm QCM2290 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -21,46 +20,31 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    description: Specifies the TLMM summary IRQ</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description:</div><div class='del'>-      Specifies the PIN numbers and Flags, as defined in defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='ctx'> </div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  wakeup-parent:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-qcm2290-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-qcm2290-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='del'>-'$defs':</div><div class='add'>+$defs:</div><div class='ctx'>   qcom-qcm2290-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -97,20 +81,12 @@ patternProperties:</div><div class='ctx'>                 uim2_data, uim2_present, uim2_reset, usb_phy, vfr_1,</div><div class='ctx'>                 vsense_trigger, wlan1_adc0, wlan1_adc1 ]</div><div class='ctx'> </div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='ctx'>       bias-pull-down: true</div><div class='del'>-</div><div class='ctx'>       bias-pull-up: true</div><div class='del'>-</div><div class='ctx'>       bias-disable: true</div><div class='del'>-</div><div class='add'>+      drive-strength: true</div><div class='add'>+      input-enable: true</div><div class='ctx'>       output-high: true</div><div class='del'>-</div><div class='ctx'>       output-low: true</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='hunk'>@@ -119,17 +95,11 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -147,19 +117,19 @@ examples:</div><div class='ctx'>         gpio-ranges = &lt;&amp;tlmm 0 0 127&gt;;</div><div class='ctx'> </div><div class='ctx'>         sdc2_on_state: sdc2-on-state {</div><div class='del'>-            clk {</div><div class='add'>+            clk-pins {</div><div class='ctx'>                 pins = "sdc2_clk";</div><div class='ctx'>                 bias-disable;</div><div class='ctx'>                 drive-strength = &lt;16&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='del'>-            cmd {</div><div class='add'>+            cmd-pins {</div><div class='ctx'>                 pins = "sdc2_cmd";</div><div class='ctx'>                 bias-pull-up;</div><div class='ctx'>                 drive-strength = &lt;10&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='del'>-            data {</div><div class='add'>+            data-pins {</div><div class='ctx'>                 pins = "sdc2_data";</div><div class='ctx'>                 bias-pull-up;</div><div class='ctx'>                 drive-strength = &lt;10&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt<br/>deleted file mode 100644<br/>index a50e74684195..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,199 +0,0 @@</div><div class='del'>-Qualcomm QCS404 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-QCS404 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,qcs404-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the north, south and east TLMM</div><div class='del'>-		    tiles.</div><div class='del'>-</div><div class='del'>-- reg-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Defintiion: names for the cells of reg, must contain "north", "south"</div><div class='del'>-		    and "east".</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio119</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,</div><div class='del'>-		      sdc2_data</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      ufs_reset</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    gpio, hdmi_tx, hdmi_ddc, blsp_uart_tx_a2, blsp_spi2, m_voc,</div><div class='del'>-		    qdss_cti_trig_in_a0, blsp_uart_rx_a2, qdss_tracectl_a,</div><div class='del'>-		    blsp_uart2, aud_cdc, blsp_i2c_sda_a2, qdss_tracedata_a,</div><div class='del'>-		    blsp_i2c_scl_a2, qdss_tracectl_b, qdss_cti_trig_in_b0,</div><div class='del'>-		    blsp_uart1, blsp_spi_mosi_a1, blsp_spi_miso_a1,</div><div class='del'>-		    qdss_tracedata_b, blsp_i2c1, blsp_spi_cs_n_a1, gcc_plltest,</div><div class='del'>-		    blsp_spi_clk_a1, rgb_data0, blsp_uart5, blsp_spi5,</div><div class='del'>-		    adsp_ext, rgb_data1, prng_rosc, rgb_data2, blsp_i2c5,</div><div class='del'>-		    gcc_gp1_clk_b, rgb_data3, gcc_gp2_clk_b, blsp_spi0,</div><div class='del'>-		    blsp_uart0, gcc_gp3_clk_b, blsp_i2c0, qdss_traceclk_b,</div><div class='del'>-		    pcie_clk, nfc_irq, blsp_spi4, nfc_dwl, audio_ts, rgb_data4,</div><div class='del'>-		    spi_lcd, blsp_uart_tx_b2, gcc_gp3_clk_a, rgb_data5,</div><div class='del'>-		    blsp_uart_rx_b2, blsp_i2c_sda_b2, blsp_i2c_scl_b2,</div><div class='del'>-		    pwm_led11, i2s_3_data0_a, ebi2_lcd, i2s_3_data1_a,</div><div class='del'>-		    i2s_3_data2_a, atest_char, pwm_led3, i2s_3_data3_a,</div><div class='del'>-		    pwm_led4, i2s_4, ebi2_a, dsd_clk_b, pwm_led5, pwm_led6,</div><div class='del'>-		    pwm_led7, pwm_led8, pwm_led24, spkr_dac0, blsp_i2c4,</div><div class='del'>-		    pwm_led9, pwm_led10, spdifrx_opt, pwm_led12, pwm_led13,</div><div class='del'>-		    pwm_led14, wlan1_adc1, rgb_data_b0, pwm_led15,</div><div class='del'>-		    blsp_spi_mosi_b1, wlan1_adc0, rgb_data_b1, pwm_led16,</div><div class='del'>-		    blsp_spi_miso_b1, qdss_cti_trig_out_b0, wlan2_adc1,</div><div class='del'>-		    rgb_data_b2, pwm_led17, blsp_spi_cs_n_b1, wlan2_adc0,</div><div class='del'>-		    rgb_data_b3, pwm_led18, blsp_spi_clk_b1, rgb_data_b4,</div><div class='del'>-		    pwm_led19, ext_mclk1_b, qdss_traceclk_a, rgb_data_b5,</div><div class='del'>-		    pwm_led20, atest_char3, i2s_3_sck_b, ldo_update, bimc_dte0,</div><div class='del'>-		    rgb_hsync, pwm_led21, i2s_3_ws_b, dbg_out, rgb_vsync,</div><div class='del'>-		    i2s_3_data0_b, ldo_en, hdmi_dtest, rgb_de, i2s_3_data1_b,</div><div class='del'>-		    hdmi_lbk9, rgb_clk, atest_char1, i2s_3_data2_b, ebi_cdc,</div><div class='del'>-		    hdmi_lbk8, rgb_mdp, atest_char0, i2s_3_data3_b, hdmi_lbk7,</div><div class='del'>-		    rgb_data_b6, rgb_data_b7, hdmi_lbk6, rgmii_int, cri_trng1,</div><div class='del'>-		    rgmii_wol, cri_trng0, gcc_tlmm, rgmii_ck, rgmii_tx,</div><div class='del'>-		    hdmi_lbk5, hdmi_pixel, hdmi_rcv, hdmi_lbk4, rgmii_ctl,</div><div class='del'>-		    ext_lpass, rgmii_rx, cri_trng, hdmi_lbk3, hdmi_lbk2,</div><div class='del'>-		    qdss_cti_trig_out_b1, rgmii_mdio, hdmi_lbk1, rgmii_mdc,</div><div class='del'>-		    hdmi_lbk0, ir_in, wsa_en, rgb_data6, rgb_data7,</div><div class='del'>-		    atest_char2, ebi_ch0, blsp_uart3, blsp_spi3, sd_write,</div><div class='del'>-		    blsp_i2c3, gcc_gp1_clk_a, qdss_cti_trig_in_b1,</div><div class='del'>-		    gcc_gp2_clk_a, ext_mclk0, mclk_in1, i2s_1, dsd_clk_a,</div><div class='del'>-		    qdss_cti_trig_in_a1, rgmi_dll1, pwm_led22, pwm_led23,</div><div class='del'>-		    qdss_cti_trig_out_a0, rgmi_dll2, pwm_led1,</div><div class='del'>-		    qdss_cti_trig_out_a1, pwm_led2, i2s_2, pll_bist,</div><div class='del'>-		    ext_mclk1_a, mclk_in2, bimc_dte1, i2s_3_sck_a, i2s_3_ws_a</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@1000000 {</div><div class='del'>-		compatible = "qcom,qcs404-pinctrl";</div><div class='del'>-		reg = &lt;0x01000000 0x200000&gt;,</div><div class='del'>-		      &lt;0x01300000 0x200000&gt;,</div><div class='del'>-		      &lt;0x07b00000 0x200000&gt;;</div><div class='del'>-		reg-names = "south", "north", "east";</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 120&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..b1b9cd319e50<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,qcs404-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,qcs404-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QCS404 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm QCS404 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,qcs404-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: south</div><div class='add'>+      - const: north</div><div class='add'>+      - const: east</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 60</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 120</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-qcs404-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-qcs404-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-qcs404-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9])$"</div><div class='add'>+            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, adsp_ext, atest_char, atest_char0, atest_char1,</div><div class='add'>+                atest_char2, atest_char3, aud_cdc, audio_ts, bimc_dte0,</div><div class='add'>+                bimc_dte1, blsp_i2c0, blsp_i2c1, blsp_i2c3, blsp_i2c4,</div><div class='add'>+                blsp_i2c5, blsp_i2c_scl_a2, blsp_i2c_scl_b2, blsp_i2c_sda_a2,</div><div class='add'>+                blsp_i2c_sda_b2, blsp_spi0, blsp_spi2, blsp_spi3, blsp_spi4,</div><div class='add'>+                blsp_spi5, blsp_spi_clk_a1, blsp_spi_clk_b1, blsp_spi_cs_n_a1,</div><div class='add'>+                blsp_spi_cs_n_b1, blsp_spi_miso_a1, blsp_spi_miso_b1,</div><div class='add'>+                blsp_spi_mosi_a1, blsp_spi_mosi_b1, blsp_uart0, blsp_uart1,</div><div class='add'>+                blsp_uart2, blsp_uart3, blsp_uart5, blsp_uart_rx_a2,</div><div class='add'>+                blsp_uart_rx_b2, blsp_uart_tx_a2, blsp_uart_tx_b2, cri_trng,</div><div class='add'>+                cri_trng0, cri_trng1, dbg_out, dsd_clk_a, dsd_clk_b, ebi2_a,</div><div class='add'>+                ebi2_lcd, ebi_cdc, ebi_ch0, ext_lpass, ext_mclk0, ext_mclk1_a,</div><div class='add'>+                ext_mclk1_b, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,</div><div class='add'>+                gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gcc_plltest,</div><div class='add'>+                gcc_tlmm, hdmi_ddc, hdmi_dtest, hdmi_lbk0, hdmi_lbk1,</div><div class='add'>+                hdmi_lbk2, hdmi_lbk3, hdmi_lbk4, hdmi_lbk5, hdmi_lbk6,</div><div class='add'>+                hdmi_lbk7, hdmi_lbk8, hdmi_lbk9, hdmi_pixel, hdmi_rcv, hdmi_tx,</div><div class='add'>+                i2s_1, i2s_2, i2s_3_data0_a, i2s_3_data0_b, i2s_3_data1_a,</div><div class='add'>+                i2s_3_data1_b, i2s_3_data2_a, i2s_3_data2_b, i2s_3_data3_a,</div><div class='add'>+                i2s_3_data3_b, i2s_3_sck_a, i2s_3_sck_b, i2s_3_ws_a,</div><div class='add'>+                i2s_3_ws_b, i2s_4, ir_in, ldo_en, ldo_update, mclk_in1,</div><div class='add'>+                mclk_in2, m_voc, nfc_dwl, nfc_irq, pcie_clk, pll_bist,</div><div class='add'>+                prng_rosc, pwm_led1, pwm_led10, pwm_led11, pwm_led12,</div><div class='add'>+                pwm_led13, pwm_led14, pwm_led15, pwm_led16, pwm_led17,</div><div class='add'>+                pwm_led18, pwm_led19, pwm_led2, pwm_led20, pwm_led21,</div><div class='add'>+                pwm_led22, pwm_led23, pwm_led24, pwm_led3, pwm_led4, pwm_led5,</div><div class='add'>+                pwm_led6, pwm_led7, pwm_led8, pwm_led9, qdss_cti_trig_in_a0,</div><div class='add'>+                qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, qdss_cti_trig_in_b1,</div><div class='add'>+                qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,</div><div class='add'>+                qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,</div><div class='add'>+                qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,</div><div class='add'>+                qdss_tracedata_a, qdss_tracedata_b, rgb_clk, rgb_data0,</div><div class='add'>+                rgb_data1, rgb_data2, rgb_data3, rgb_data4, rgb_data5,</div><div class='add'>+                rgb_data6, rgb_data7, rgb_data_b0, rgb_data_b1, rgb_data_b2,</div><div class='add'>+                rgb_data_b3, rgb_data_b4, rgb_data_b5, rgb_data_b6,</div><div class='add'>+                rgb_data_b7, rgb_de, rgb_hsync, rgb_mdp, rgb_vsync, rgmi_dll1,</div><div class='add'>+                rgmi_dll2, rgmii_ck, rgmii_ctl, rgmii_int, rgmii_mdc,</div><div class='add'>+                rgmii_mdio, rgmii_rx, rgmii_tx, rgmii_wol, sd_write,</div><div class='add'>+                spdifrx_opt, spi_lcd, spkr_dac0, wlan1_adc0, wlan1_adc1,</div><div class='add'>+                wlan2_adc0, wlan2_adc1, wsa_en ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@1000000 {</div><div class='add'>+        compatible = "qcom,qcs404-pinctrl";</div><div class='add'>+        reg = &lt;0x01000000 0x200000&gt;,</div><div class='add'>+              &lt;0x01300000 0x200000&gt;,</div><div class='add'>+              &lt;0x07b00000 0x200000&gt;;</div><div class='add'>+        reg-names = "south", "north", "east";</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 120&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+        blsp1-i2c1-default-state {</div><div class='add'>+            pins = "gpio24", "gpio25";</div><div class='add'>+            function = "blsp_i2c1";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        blsp1-i2c2-default-state {</div><div class='add'>+            sda-pins {</div><div class='add'>+                pins = "gpio19";</div><div class='add'>+                function = "blsp_i2c_sda_a2";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            scl-pins {</div><div class='add'>+                pins = "gpio20";</div><div class='add'>+                function = "blsp_i2c_scl_a2";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..237cac4f6ce1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,qdu1000-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,125 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,qdu1000-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. QDU1000/QRU1000 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Melody Olvera &lt;quic_molvera@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Top Level Mode Multiplexer pin controller found in the QDU1000 and</div><div class='add'>+  QRU1000 SoCs.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,qdu1000-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts: true</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 76</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 151</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-qdu1000-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-qdu1000-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-qdu1000-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|150)$"</div><div class='add'>+            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+        enum: [ atest_char, atest_usb, char_exec, CMO_PRI, cmu_rng,</div><div class='add'>+                dbg_out_clk, ddr_bist, ddr_pxi1, ddr_pxi2, ddr_pxi3, ddr_pxi4,</div><div class='add'>+                ddr_pxi5, ddr_pxi6, ddr_pxi7, eth012_int_n, eth345_int_n,</div><div class='add'>+                gcc_gp1, gcc_gp2, gcc_gp3, gpio, gps_pps_in, hardsync_pps_in,</div><div class='add'>+                intr_c, jitter_bist_ref, pcie_clkreqn, phase_flag, pll_bist,</div><div class='add'>+                pll_clk, prng_rosc, qdss_cti, qdss_gpio, qlink0_enable,</div><div class='add'>+                qlink0_request, qlink0_wmss, qlink1_enable, qlink1_request,</div><div class='add'>+                qlink1_wmss, qlink2_enable, qlink2_request, qlink2_wmss,</div><div class='add'>+                qlink3_enable, qlink3_request, qlink3_wmss, qlink4_enable,</div><div class='add'>+                qlink4_request, qlink4_wmss, qlink5_enable, qlink5_request,</div><div class='add'>+                qlink5_wmss, qlink6_enable, qlink6_request, qlink6_wmss,</div><div class='add'>+                qlink7_enable, qlink7_request, qlink7_wmss, qspi_clk, qspi_cs,</div><div class='add'>+                qspi0, qspi1, qspi2, qspi3, qup00, qup01, qup02, qup03, qup04,</div><div class='add'>+                qup05, qup06, qup07, qup08, qup10, qup11, qup12, qup13, qup14,</div><div class='add'>+                qup15, qup16, qup17, qup20, qup21, qup22, SI5518_INT, smb_alert,</div><div class='add'>+                smb_clk, smb_dat, tb_trig, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3,</div><div class='add'>+                tgu_ch4, tgu_ch5, tgu_ch6, tgu_ch7, tmess_prng0, tmess_prng1,</div><div class='add'>+                tmess_prng2, tmess_prng3, tod_pps_in, tsense_pwm1, tsense_pwm2,</div><div class='add'>+                usb2phy_ac, usb_con_det, usb_dfp_en, usb_phy, vfr_0, vfr_1,</div><div class='add'>+                vsense_trigger ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pinctrl@f000000 {</div><div class='add'>+        compatible = "qcom,qdu1000-tlmm";</div><div class='add'>+        reg = &lt;0xf000000 0x1000000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 151&gt;;</div><div class='add'>+        wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+        uart0-default-state {</div><div class='add'>+            pins = "gpio6", "gpio7", "gpio8", "gpio9";</div><div class='add'>+            function = "qup00";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..e608a4f1bcae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sa8775p-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. SA8775P TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SA8775P SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sa8775p-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts: true</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 74</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 148</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sa8775p-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sa8775p-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sa8775p-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-7])$"</div><div class='add'>+            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 16</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ atest_char, atest_usb2, audio_ref, cam_mclk, cci_async, cci_i2c,</div><div class='add'>+                cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,</div><div class='add'>+                cci_timer5, cci_timer6, cci_timer7, cci_timer8, cci_timer9,</div><div class='add'>+                cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,</div><div class='add'>+                ddr_pxi1, ddr_pxi2, ddr_pxi3, ddr_pxi4, ddr_pxi5, edp0_hot,</div><div class='add'>+                edp0_lcd, edp1_hot, edp1_lcd, edp2_hot, edp2_lcd, edp3_hot,</div><div class='add'>+                edp3_lcd, emac0_mcg0, emac0_mcg1, emac0_mcg2, emac0_mcg3,</div><div class='add'>+                emac0_mdc, emac0_mdio, emac0_ptp_aux, emac0_ptp_pps, emac1_mcg0,</div><div class='add'>+                emac1_mcg1, emac1_mcg2, emac1_mcg3, emac1_mdc, emac1_mdio,</div><div class='add'>+                emac1_ptp_aux, emac1_ptp_pps, gcc_gp1, gcc_gp2, gcc_gp3,</div><div class='add'>+                gcc_gp4, gcc_gp5, hs0_mi2s, hs1_mi2s, hs2_mi2s, ibi_i3c,</div><div class='add'>+                jitter_bist, mdp0_vsync0, mdp0_vsync1, mdp0_vsync2, mdp0_vsync3,</div><div class='add'>+                mdp0_vsync4, mdp0_vsync5, mdp0_vsync6, mdp0_vsync7, mdp0_vsync8,</div><div class='add'>+                mdp1_vsync0, mdp1_vsync1, mdp1_vsync2, mdp1_vsync3, mdp1_vsync4,</div><div class='add'>+                mdp1_vsync5, mdp1_vsync6, mdp1_vsync7, mdp1_vsync8, mdp_vsync,</div><div class='add'>+                mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws, mi2s2_data0,</div><div class='add'>+                mi2s2_data1, mi2s2_sck, mi2s2_ws, mi2s_mclk0, mi2s_mclk1,</div><div class='add'>+                pcie0_clkreq, pcie1_clkreq, phase_flag, pll_bist, pll_clk,</div><div class='add'>+                prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, qdss_cti,</div><div class='add'>+                qdss_gpio, qup0_se0, qup0_se1, qup0_se2, qup0_se3, qup0_se4,</div><div class='add'>+                qup0_se5, qup1_se0, qup1_se1, qup1_se2, qup1_se3, qup1_se4,</div><div class='add'>+                qup1_se5, qup1_se6, qup2_se0, qup2_se1, qup2_se2, qup2_se3,</div><div class='add'>+                qup2_se4, qup2_se5, qup2_se6, qup3_se0, sailss_emac0,</div><div class='add'>+                sailss_ospi, sail_top, sgmii_phy, tb_trig, tgu_ch0, tgu_ch1,</div><div class='add'>+                tgu_ch2, tgu_ch3, tgu_ch4, tgu_ch5, tsense_pwm1, tsense_pwm2,</div><div class='add'>+                tsense_pwm3, tsense_pwm4, usb2phy_ac, vsense_trigger ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@f000000 {</div><div class='add'>+        compatible = "qcom,sa8775p-tlmm";</div><div class='add'>+        reg = &lt;0xf000000 0x1000000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 148&gt;;</div><div class='add'>+</div><div class='add'>+        qup-uart10-state {</div><div class='add'>+            pins = "gpio46", "gpio47";</div><div class='add'>+            function = "qup1_se3";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt<br/>deleted file mode 100644<br/>index 6ffeac9801df..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,187 +0,0 @@</div><div class='del'>-Qualcomm Technologies, Inc. SC7180 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-SC7180 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,sc7180-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the north, south and west</div><div class='del'>-		    TLMM tiles</div><div class='del'>-</div><div class='del'>-- reg-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: names for the cells of reg, must contain "north", "south"</div><div class='del'>-		    and "west".</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio118</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,</div><div class='del'>-		      sdc2_data sdc1_rclk</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      ufs_reset</div><div class='del'>-			Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    adsp_ext, agera_pll, aoss_cti, atest_char, atest_char0,</div><div class='del'>-		    atest_char1, atest_char2, atest_char3, atest_tsens,</div><div class='del'>-		    atest_tsens2, atest_usb1, atest_usb10, atest_usb11,</div><div class='del'>-		    atest_usb12, atest_usb13, atest_usb2, atest_usb20,</div><div class='del'>-		    atest_usb21, atest_usb22, atest_usb23, audio_ref,</div><div class='del'>-		    btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,</div><div class='del'>-		    cci_timer1, cci_timer2, cci_timer3, cci_timer4,</div><div class='del'>-		    cri_trng, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,</div><div class='del'>-		    ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd, gcc_gp1, gcc_gp2,</div><div class='del'>-		    gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gps_tx,</div><div class='del'>-		    jitter_bist, ldo_en, ldo_update, lpass_ext, mdp_vsync,</div><div class='del'>-		    mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0,</div><div class='del'>-		    mi2s_1, mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag,</div><div class='del'>-		    PLL_BIST, pll_bypassnl, pll_reset, prng_rosc, qdss,</div><div class='del'>-		    qdss_cti, qlink_enable, qlink_request, qspi_clk, qspi_cs,</div><div class='del'>-		    qspi_data, qup00, qup01, qup02_i2c, qup02_uart, qup03,</div><div class='del'>-		    qup04_i2c, qup04_uart, qup05, qup10, qup11_i2c, qup11_uart,</div><div class='del'>-		    qup12, qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb,</div><div class='del'>-		    sdc2_tb, sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2,</div><div class='del'>-		    tgu_ch3, tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt,</div><div class='del'>-		    usb_phy, vfr_1, _V_GPIO, _V_PPS_IN, _V_PPS_OUT,</div><div class='del'>-		    vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0,</div><div class='del'>-		    wlan2_adc1,</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@3500000 {</div><div class='del'>-		compatible = "qcom,sc7180-pinctrl";</div><div class='del'>-		reg = &lt;0x3500000 0x300000&gt;,</div><div class='del'>-		      &lt;0x3900000 0x300000&gt;,</div><div class='del'>-		      &lt;0x3D00000 0x300000&gt;;</div><div class='del'>-		reg-names = "west", "north", "south";</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 119&gt;;</div><div class='del'>-		gpio-reserved-ranges = &lt;0 4&gt;, &lt;106 4&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..573e459b1c44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,151 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sc7180-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7180 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SC7180 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc7180-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: west</div><div class='add'>+      - const: north</div><div class='add'>+      - const: south</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 60</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 119</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sc7180-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sc7180-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sc7180-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"</div><div class='add'>+            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ adsp_ext, agera_pll, aoss_cti, atest_char, atest_char0,</div><div class='add'>+                atest_char1, atest_char2, atest_char3, atest_tsens,</div><div class='add'>+                atest_tsens2, atest_usb1, atest_usb10, atest_usb11,</div><div class='add'>+                atest_usb12, atest_usb13, atest_usb2, atest_usb20, atest_usb21,</div><div class='add'>+                atest_usb22, atest_usb23, audio_ref, btfm_slimbus, cam_mclk,</div><div class='add'>+                cci_async, cci_i2c, cci_timer0, cci_timer1, cci_timer2,</div><div class='add'>+                cci_timer3, cci_timer4, cri_trng, dbg_out, ddr_bist, ddr_pxi0,</div><div class='add'>+                ddr_pxi1, ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd, gcc_gp1,</div><div class='add'>+                gcc_gp2, gcc_gp3, gpio, gp_pdm0, gp_pdm1, gp_pdm2, gps_tx,</div><div class='add'>+                jitter_bist, ldo_en, ldo_update, lpass_ext, mdp_vsync,</div><div class='add'>+                mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0, mi2s_1,</div><div class='add'>+                mi2s_2, mss_lte, m_voc, pa_indicator, phase_flag, PLL_BIST,</div><div class='add'>+                pll_bypassnl, pll_reset, prng_rosc, qdss, qdss_cti,</div><div class='add'>+                qlink_enable, qlink_request, qspi_clk, qspi_cs, qspi_data,</div><div class='add'>+                qup00, qup01, qup02_i2c, qup02_uart, qup03, qup04_i2c,</div><div class='add'>+                qup04_uart, qup05, qup10, qup11_i2c, qup11_uart, qup12,</div><div class='add'>+                qup13_i2c, qup13_uart, qup14, qup15, sdc1_tb, sdc2_tb,</div><div class='add'>+                sd_write, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3,</div><div class='add'>+                tsense_pwm1, tsense_pwm2, uim1, uim2, uim_batt, usb_phy, vfr_1,</div><div class='add'>+                _V_GPIO, _V_PPS_IN, _V_PPS_OUT, vsense_trigger, wlan1_adc0,</div><div class='add'>+                wlan1_adc1, wlan2_adc0, wlan2_adc1 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@3500000 {</div><div class='add'>+        compatible = "qcom,sc7180-pinctrl";</div><div class='add'>+        reg = &lt;0x03500000 0x300000&gt;,</div><div class='add'>+              &lt;0x03900000 0x300000&gt;,</div><div class='add'>+              &lt;0x03d00000 0x300000&gt;;</div><div class='add'>+        reg-names = "west", "north", "south";</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 120&gt;;</div><div class='add'>+        wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+        dp_hot_plug_det: dp-hot-plug-det-state {</div><div class='add'>+            pins = "gpio117";</div><div class='add'>+            function = "dp_hot";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        qup_spi11_cs_gpio: qup-spi11-cs-gpio-state {</div><div class='add'>+            spi-pins {</div><div class='add'>+                pins = "gpio53", "gpio54", "gpio55";</div><div class='add'>+                function = "qup15";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cs-pins {</div><div class='add'>+                pins = "gpio56";</div><div class='add'>+                function = "gpio";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..fa51fa9536f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7280 SoC LPASS LPI TLMM</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem</div><div class='add'>+  (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc7280-lpass-lpi-pinctrl</div><div class='add'>+</div><div class='add'>+  qcom,adsp-bypass-mode:</div><div class='add'>+    description:</div><div class='add'>+      Tells ADSP is in bypass mode.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    description: Specifying the pin number and flags, as defined in</div><div class='add'>+      include/dt-bindings/gpio/gpio.h</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sc7280-lpass-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sc7280-lpass-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sc7280-lpass-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|1[0-4])$"</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 15</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        enum: [ gpio, swr_tx_clk, qua_mi2s_sclk, swr_tx_data, qua_mi2s_ws,</div><div class='add'>+                qua_mi2s_data, swr_rx_clk, swr_rx_data, dmic1_clk, i2s1_clk,</div><div class='add'>+                dmic1_data, i2s1_ws, dmic2_clk, dmic2_data, i2s1_data,</div><div class='add'>+                i2s2_clk, wsa_swr_clk, i2s2_ws, wsa_swr_data, dmic3_clk,</div><div class='add'>+                dmic3_data, i2s2_data ]</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+      drive-strength:</div><div class='add'>+        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+        default: 2</div><div class='add'>+        description:</div><div class='add'>+          Selects the drive strength for the specified pins, in mA.</div><div class='add'>+</div><div class='add'>+      slew-rate:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        default: 0</div><div class='add'>+        description: |</div><div class='add'>+            0: No adjustments</div><div class='add'>+            1: Higher Slew rate (faster edges)</div><div class='add'>+            2: Lower Slew rate (slower edges)</div><div class='add'>+            3: Reserved (No adjustments)</div><div class='add'>+</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+      bias-bus-hold: true</div><div class='add'>+      bias-disable: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+      - function</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    lpass_tlmm: pinctrl@33c0000 {</div><div class='add'>+        compatible = "qcom,sc7280-lpass-lpi-pinctrl";</div><div class='add'>+        reg = &lt;0x33c0000 0x20000&gt;,</div><div class='add'>+              &lt;0x3550000 0x10000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;lpass_tlmm 0 0 15&gt;;</div><div class='add'>+</div><div class='add'>+        dmic01-state {</div><div class='add'>+            dmic01-clk-pins {</div><div class='add'>+                pins = "gpio6";</div><div class='add'>+                function = "dmic1_clk";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dmic01-clk-sleep-pins {</div><div class='add'>+                pins = "gpio6";</div><div class='add'>+                function = "dmic1_clk";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        tx-swr-data-sleep-state {</div><div class='add'>+            pins = "gpio1", "gpio2", "gpio14";</div><div class='add'>+            function = "swr_tx_data";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml<br/>index 6c7c3f6a140e..368d44ff5468 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml</a></div><div class='hunk'>@@ -7,11 +7,10 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Technologies, Inc. SC7280 TLMM block</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Rajendra Nayak &lt;rnayak@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  SC7280 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SC7280 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -42,17 +41,28 @@ properties:</div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  wakeup-parent:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 175</div><div class='add'>+</div><div class='add'>+  wakeup-parent: true</div><div class='ctx'> </div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-pins$':</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sc7280-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sc7280-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sc7280-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -61,7 +71,7 @@ patternProperties:</div><div class='ctx'>           subnode.</div><div class='ctx'>         items:</div><div class='ctx'>           oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-4])$"</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"</div><div class='ctx'>             - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,</div><div class='ctx'>                       sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='ctx'>         minItems: 1</div><div class='hunk'>@@ -101,30 +111,11 @@ patternProperties:</div><div class='ctx'>                 uim1_clk, uim1_data, uim1_present, uim1_reset, usb2phy_ac,</div><div class='ctx'>                 usb_phy, vfr_0, vfr_1, vsense_trigger ]</div><div class='ctx'> </div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -140,22 +131,22 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        tlmm: pinctrl@f000000 {</div><div class='del'>-                compatible = "qcom,sc7280-pinctrl";</div><div class='del'>-                reg = &lt;0xf000000 0x1000000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 175&gt;;</div><div class='del'>-                wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='del'>-</div><div class='del'>-                qup_uart5_default: qup-uart5-pins {</div><div class='del'>-                        pins = "gpio46", "gpio47";</div><div class='del'>-                        function = "qup13";</div><div class='del'>-                        drive-strength = &lt;2&gt;;</div><div class='del'>-                        bias-disable;</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@f000000 {</div><div class='add'>+        compatible = "qcom,sc7280-pinctrl";</div><div class='add'>+        reg = &lt;0xf000000 0x1000000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 175&gt;;</div><div class='add'>+        wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+        qup_uart5_default: qup-uart5-state {</div><div class='add'>+            pins = "gpio46", "gpio47";</div><div class='add'>+            function = "qup13";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-disable;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml<br/>index 86509172603d..b086a5184235 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sc8180x-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sc8180x-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sc8180x-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. SC8180X TLMM block</div><div class='hunk'>@@ -9,12 +9,10 @@ title: Qualcomm Technologies, Inc. SC8180X TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  SC8180X platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SC8180X SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='ctx'>   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -26,11 +24,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: "west"</div><div class='del'>-      - const: "east"</div><div class='del'>-      - const: "south"</div><div class='add'>+      - const: west</div><div class='add'>+      - const: east</div><div class='add'>+      - const: south</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'>   '#interrupt-cells': true</div><div class='ctx'>   gpio-controller: true</div><div class='hunk'>@@ -47,20 +47,22 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-sc8180x-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-sc8180x-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='del'>-'$defs':</div><div class='add'>+$defs:</div><div class='ctx'>   qcom-sc8180x-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -101,53 +103,42 @@ patternProperties:</div><div class='ctx'>                 usb0_phy, usb1_phy, usb2phy_ac, vfr_1, vsense_trigger,</div><div class='ctx'>                 wlan1_adc, wlan2_adc, wmss_reset ]</div><div class='ctx'> </div><div class='del'>-      bias-disable: true</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-      drive-strength: true</div><div class='del'>-      input-enable: true</div><div class='del'>-      output-high: true</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        pinctrl@3100000 {</div><div class='del'>-                compatible = "qcom,sc8180x-tlmm";</div><div class='del'>-                reg = &lt;0x03100000 0x300000&gt;,</div><div class='del'>-                      &lt;0x03500000 0x700000&gt;,</div><div class='del'>-                      &lt;0x03d00000 0x300000&gt;;</div><div class='del'>-                reg-names = "west", "east", "south";</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 190&gt;;</div><div class='del'>-</div><div class='del'>-                gpio-wo-subnode-state {</div><div class='del'>-                        pins = "gpio1";</div><div class='del'>-                        function = "gpio";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                uart-w-subnodes-state {</div><div class='del'>-                        rx {</div><div class='del'>-                                pins = "gpio4";</div><div class='del'>-                                function = "qup6";</div><div class='del'>-                                bias-pull-up;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        tx {</div><div class='del'>-                                pins = "gpio5";</div><div class='del'>-                                function = "qup6";</div><div class='del'>-                                bias-disable;</div><div class='del'>-                        };</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@3100000 {</div><div class='add'>+        compatible = "qcom,sc8180x-tlmm";</div><div class='add'>+        reg = &lt;0x03100000 0x300000&gt;,</div><div class='add'>+              &lt;0x03500000 0x700000&gt;,</div><div class='add'>+              &lt;0x03d00000 0x300000&gt;;</div><div class='add'>+        reg-names = "west", "east", "south";</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 190&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-wo-subnode-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-subnodes-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio4";</div><div class='add'>+                function = "qup6";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio5";</div><div class='add'>+                function = "qup6";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..a9167dac9ab5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,155 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC8280XP SoC LPASS LPI TLMM</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem</div><div class='add'>+  (LPASS) Low Power Island (LPI) of Qualcomm SC8280XP SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sc8280xp-lpass-lpi-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: LPASS LPI TLMM Control and Status registers</div><div class='add'>+      - description: LPASS LPI MCC registers</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: LPASS Core voting clock</div><div class='add'>+      - description: LPASS Audio voting clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: audio</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    description: Specifying the pin number and flags, as defined in</div><div class='add'>+      include/dt-bindings/gpio/gpio.h</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sc8280xp-lpass-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sc8280xp-lpass-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sc8280xp-lpass-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: "^gpio([0-9]|1[0-8])$"</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,</div><div class='add'>+                dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk,</div><div class='add'>+                dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data,</div><div class='add'>+                qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws,</div><div class='add'>+                i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk,</div><div class='add'>+                wsa2_swr_data, i2s2_data, i2s3_clk, i2s3_ws, i2s3_data,</div><div class='add'>+                ext_mclk1_c, ext_mclk1_b, ext_mclk1_a ]</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+      drive-strength:</div><div class='add'>+        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+        default: 2</div><div class='add'>+        description:</div><div class='add'>+          Selects the drive strength for the specified pins, in mA.</div><div class='add'>+</div><div class='add'>+      slew-rate:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        default: 0</div><div class='add'>+        description: |</div><div class='add'>+          0: No adjustments</div><div class='add'>+          1: Higher Slew rate (faster edges)</div><div class='add'>+          2: Lower Slew rate (slower edges)</div><div class='add'>+          3: Reserved (No adjustments)</div><div class='add'>+</div><div class='add'>+      bias-bus-hold: true</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+      bias-disable: true</div><div class='add'>+      input-enable: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+      - function</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+    pinctrl@33c0000 {</div><div class='add'>+        compatible = "qcom,sc8280xp-lpass-lpi-pinctrl";</div><div class='add'>+        reg = &lt;0x33c0000 0x20000&gt;,</div><div class='add'>+              &lt;0x3550000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+                 &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+        clock-names = "core", "audio";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;lpi_tlmm 0 0 19&gt;;</div><div class='add'>+</div><div class='add'>+        dmic01-state {</div><div class='add'>+            dmic01-clk-pins {</div><div class='add'>+                pins = "gpio16";</div><div class='add'>+                function = "dmic1_clk";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dmic01-clk-sleep-pins {</div><div class='add'>+                pins = "gpio16";</div><div class='add'>+                function = "dmic1_clk";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        tx-swr-data-sleep-state {</div><div class='add'>+            pins = "gpio0", "gpio1";</div><div class='add'>+            function = "swr_tx_data";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml<br/>index 87a381c9a19d..4ae39fc7894a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. SC8280XP TLMM block</div><div class='hunk'>@@ -10,8 +10,7 @@ maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  SC8280XP platform.</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SC8280XP SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='hunk'>@@ -23,12 +22,14 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-  '#interrupt-cells': true</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'>   gpio-reserved-ranges: true</div><div class='del'>-  '#gpio-cells': true</div><div class='add'>+  "#gpio-cells": true</div><div class='ctx'>   gpio-ranges: true</div><div class='ctx'>   wakeup-parent: true</div><div class='ctx'> </div><div class='hunk'>@@ -39,20 +40,21 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-sc8280xp-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-sc8280xp-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='del'>-'$defs':</div><div class='add'>+$defs:</div><div class='ctx'>   qcom-sc8280xp-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -102,6 +104,7 @@ patternProperties:</div><div class='ctx'>                 usb1_phy, usb1_sbrx, usb1_sbtx, usb1_usb4, usb2phy_ac,</div><div class='ctx'>                 vsense_trigger ]</div><div class='ctx'> </div><div class='add'>+      bias-bus-hold: true</div><div class='ctx'>       bias-disable: true</div><div class='ctx'>       bias-pull-down: true</div><div class='ctx'>       bias-pull-up: true</div><div class='hunk'>@@ -112,40 +115,39 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        pinctrl@f100000 {</div><div class='del'>-                compatible = "qcom,sc8280xp-tlmm";</div><div class='del'>-                reg = &lt;0x0f100000 0x300000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 230&gt;;</div><div class='del'>-</div><div class='del'>-                gpio-wo-subnode-state {</div><div class='del'>-                        pins = "gpio1";</div><div class='del'>-                        function = "gpio";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                uart-w-subnodes-state {</div><div class='del'>-                        rx {</div><div class='del'>-                                pins = "gpio4";</div><div class='del'>-                                function = "qup14";</div><div class='del'>-                                bias-pull-up;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        tx {</div><div class='del'>-                                pins = "gpio5";</div><div class='del'>-                                function = "qup14";</div><div class='del'>-                                bias-disable;</div><div class='del'>-                        };</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@f100000 {</div><div class='add'>+        compatible = "qcom,sc8280xp-tlmm";</div><div class='add'>+        reg = &lt;0x0f100000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 230&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-wo-subnode-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-subnodes-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio4";</div><div class='add'>+                function = "qup14";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio5";</div><div class='add'>+                function = "qup14";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..508e0633b253<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sdm630-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,181 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sdm630-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SDM630 and SDM660 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SDM630 and SDM660 SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sdm630-pinctrl</div><div class='add'>+      - qcom,sdm660-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: south</div><div class='add'>+      - const: center</div><div class='add'>+      - const: north</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 57</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 114</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sdm630-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sdm630-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sdm630-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-3])$"</div><div class='add'>+            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+        enum: [ adsp_ext, agera_pll, atest_char, atest_char0, atest_char1,</div><div class='add'>+                atest_char2, atest_char3, atest_gpsadc0, atest_gpsadc1,</div><div class='add'>+                atest_tsens, atest_tsens2, atest_usb1, atest_usb10,</div><div class='add'>+                atest_usb11, atest_usb12, atest_usb13, atest_usb2, atest_usb20,</div><div class='add'>+                atest_usb21, atest_usb22, atest_usb23, audio_ref, bimc_dte0,</div><div class='add'>+                bimc_dte1, blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c4,</div><div class='add'>+                blsp_i2c5, blsp_i2c6, blsp_i2c7, blsp_i2c8_a, blsp_i2c8_b,</div><div class='add'>+                blsp_spi1, blsp_spi2, blsp_spi3, blsp_spi3_cs1, blsp_spi3_cs2,</div><div class='add'>+                blsp_spi4, blsp_spi5, blsp_spi6, blsp_spi7, blsp_spi8_a,</div><div class='add'>+                blsp_spi8_b, blsp_spi8_cs1, blsp_spi8_cs2, blsp_uart1,</div><div class='add'>+                blsp_uart2, blsp_uart5, blsp_uart6_a, blsp_uart6_b, blsp_uim1,</div><div class='add'>+                blsp_uim2, blsp_uim5, blsp_uim6, cam_mclk, cci_async, cci_i2c,</div><div class='add'>+                cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, gcc_gp1,</div><div class='add'>+                gcc_gp2, gcc_gp3, gpio, gps_tx_a, gps_tx_b, gps_tx_c,</div><div class='add'>+                isense_dbg, jitter_bist, ldo_en, ldo_update, m_voc, mdp_vsync,</div><div class='add'>+                mdss_vsync0, mdss_vsync1, mdss_vsync2, mdss_vsync3, mss_lte,</div><div class='add'>+                nav_pps_a, nav_pps_b, nav_pps_c, pa_indicator, phase_flag0,</div><div class='add'>+                phase_flag1, phase_flag10, phase_flag11, phase_flag12,</div><div class='add'>+                phase_flag13, phase_flag14, phase_flag15, phase_flag16,</div><div class='add'>+                phase_flag17, phase_flag18, phase_flag19, phase_flag2,</div><div class='add'>+                phase_flag20, phase_flag21, phase_flag22, phase_flag23,</div><div class='add'>+                phase_flag24, phase_flag25, phase_flag26, phase_flag27,</div><div class='add'>+                phase_flag28, phase_flag29, phase_flag3, phase_flag30,</div><div class='add'>+                phase_flag31, phase_flag4, phase_flag5, phase_flag6,</div><div class='add'>+                phase_flag7, phase_flag8, phase_flag9, pll_bypassnl, pll_reset,</div><div class='add'>+                pri_mi2s, pri_mi2s_ws, prng_rosc, pwr_crypto, pwr_modem,</div><div class='add'>+                pwr_nav, qdss_cti0_a, qdss_cti0_b, qdss_cti1_a, qdss_cti1_b,</div><div class='add'>+                qdss_gpio, qdss_gpio0, qdss_gpio1, qdss_gpio10, qdss_gpio11,</div><div class='add'>+                qdss_gpio12, qdss_gpio13, qdss_gpio14, qdss_gpio15, qdss_gpio2,</div><div class='add'>+                qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6, qdss_gpio7,</div><div class='add'>+                qdss_gpio8, qdss_gpio9, qlink_enable, qlink_request, qspi_clk,</div><div class='add'>+                qspi_cs, qspi_data0, qspi_data1, qspi_data2, qspi_data3,</div><div class='add'>+                qspi_resetn, sec_mi2s, sndwire_clk, sndwire_data, sp_cmu,</div><div class='add'>+                ssc_irq, tgu_ch0, tgu_ch1, tsense_pwm1, tsense_pwm2, uim1_clk,</div><div class='add'>+                uim1_data, uim1_present, uim1_reset, uim2_clk, uim2_data,</div><div class='add'>+                uim2_present, uim2_reset, uim_batt, vfr_1, vsense_clkout,</div><div class='add'>+                vsense_data0, vsense_data1, vsense_mode, wlan1_adc0,</div><div class='add'>+                wlan1_adc1, wlan2_adc0, wlan2_adc1 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@3100000 {</div><div class='add'>+        compatible = "qcom,sdm630-pinctrl";</div><div class='add'>+        reg = &lt;0x03100000 0x400000&gt;,</div><div class='add'>+              &lt;0x03500000 0x400000&gt;,</div><div class='add'>+              &lt;0x03900000 0x400000&gt;;</div><div class='add'>+        reg-names = "south", "center", "north";</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 114&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        blsp1-uart1-default-state {</div><div class='add'>+            pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+            function = "gpio";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-disable;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        blsp2_uart1_default: blsp2-uart1-active-state {</div><div class='add'>+            tx-rts-pins {</div><div class='add'>+                pins = "gpio16", "gpio19";</div><div class='add'>+                function = "blsp_uart5";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio17";</div><div class='add'>+                function = "blsp_uart5";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cts-pins {</div><div class='add'>+                pins = "gpio18";</div><div class='add'>+                function = "blsp_uart5";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-down;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt<br/>deleted file mode 100644<br/>index be034d329e10..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdm660-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,191 +0,0 @@</div><div class='del'>-Qualcomm Technologies, Inc. SDM660 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-SDM660 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,sdm660-pinctrl" or</div><div class='del'>-		    "qcom,sdm630-pinctrl".</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the north, center and south</div><div class='del'>-		    TLMM tiles.</div><div class='del'>-</div><div class='del'>-- reg-names:</div><div class='del'>-       Usage: required</div><div class='del'>-       Value type: &lt;stringlist&gt;</div><div class='del'>-       Definition: names for the cells of reg, must contain "north", "center"</div><div class='del'>-                   and "south".</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: Specifies the mapping between gpio controller and</div><div class='del'>-		    pin-controller pins.</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.  Valid pins are:</div><div class='del'>-		    gpio0-gpio113,</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-		    sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd, sdc2_data sdc1_rclk,</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-		    adsp_ext, agera_pll, atest_char, atest_char0, atest_char1,</div><div class='del'>-		    atest_char2, atest_char3, atest_gpsadc0, atest_gpsadc1,</div><div class='del'>-		    atest_tsens, atest_tsens2, atest_usb1, atest_usb10,</div><div class='del'>-		    atest_usb11, atest_usb12, atest_usb13, atest_usb2,</div><div class='del'>-		    atest_usb20, atest_usb21, atest_usb22, atest_usb23,</div><div class='del'>-		    audio_ref, bimc_dte0, bimc_dte1, blsp_i2c1, blsp_i2c2,</div><div class='del'>-		    blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_i2c7,</div><div class='del'>-		    blsp_i2c8_a, blsp_i2c8_b, blsp_spi1, blsp_spi2, blsp_spi3,</div><div class='del'>-		    blsp_spi3_cs1, blsp_spi3_cs2, blsp_spi4, blsp_spi5,</div><div class='del'>-		    blsp_spi6, blsp_spi7, blsp_spi8_a, blsp_spi8_b,</div><div class='del'>-		    blsp_spi8_cs1, blsp_spi8_cs2, blsp_uart1, blsp_uart2,</div><div class='del'>-		    blsp_uart5, blsp_uart6_a, blsp_uart6_b, blsp_uim1,</div><div class='del'>-		    blsp_uim2, blsp_uim5, blsp_uim6, cam_mclk, cci_async,</div><div class='del'>-		    cci_i2c, cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist,</div><div class='del'>-		    gcc_gp1, gcc_gp2, gcc_gp3, gpio, gps_tx_a, gps_tx_b, gps_tx_c,</div><div class='del'>-		    isense_dbg, jitter_bist, ldo_en, ldo_update, m_voc, mdp_vsync,</div><div class='del'>-		    mdss_vsync0, mdss_vsync1, mdss_vsync2, mdss_vsync3, mss_lte,</div><div class='del'>-		    nav_pps_a, nav_pps_b, nav_pps_c, pa_indicator, phase_flag0,</div><div class='del'>-		    phase_flag1, phase_flag10, phase_flag11, phase_flag12,</div><div class='del'>-		    phase_flag13, phase_flag14, phase_flag15, phase_flag16,</div><div class='del'>-		    phase_flag17, phase_flag18, phase_flag19, phase_flag2,</div><div class='del'>-		    phase_flag20, phase_flag21, phase_flag22, phase_flag23,</div><div class='del'>-		    phase_flag24, phase_flag25, phase_flag26, phase_flag27,</div><div class='del'>-		    phase_flag28, phase_flag29, phase_flag3, phase_flag30,</div><div class='del'>-		    phase_flag31, phase_flag4, phase_flag5, phase_flag6,</div><div class='del'>-		    phase_flag7, phase_flag8, phase_flag9, pll_bypassnl,</div><div class='del'>-		    pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc, pwr_crypto,</div><div class='del'>-		    pwr_modem, pwr_nav, qdss_cti0_a, qdss_cti0_b, qdss_cti1_a,</div><div class='del'>-		    qdss_cti1_b, qdss_gpio, qdss_gpio0, qdss_gpio1, qdss_gpio10,</div><div class='del'>-		    qdss_gpio11, qdss_gpio12, qdss_gpio13, qdss_gpio14, qdss_gpio15,</div><div class='del'>-		    qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6,</div><div class='del'>-		    qdss_gpio7, qdss_gpio8, qdss_gpio9, qlink_enable, qlink_request,</div><div class='del'>-		    qspi_clk, qspi_cs, qspi_data0, qspi_data1, qspi_data2,</div><div class='del'>-		    qspi_data3, qspi_resetn, sec_mi2s, sndwire_clk, sndwire_data,</div><div class='del'>-		    sp_cmu, ssc_irq, tgu_ch0, tgu_ch1, tsense_pwm1, tsense_pwm2,</div><div class='del'>-		    uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,</div><div class='del'>-		    uim2_data, uim2_present, uim2_reset, uim_batt, vfr_1,</div><div class='del'>-		    vsense_clkout, vsense_data0, vsense_data1, vsense_mode,</div><div class='del'>-		    wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@3100000 {</div><div class='del'>-		compatible = "qcom,sdm660-pinctrl";</div><div class='del'>-		reg = &lt;0x3100000 0x200000&gt;,</div><div class='del'>-		      &lt;0x3500000 0x200000&gt;,</div><div class='del'>-		      &lt;0x3900000 0x200000&gt;;</div><div class='del'>-		reg-names = "south", "center", "north";</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 114&gt;;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..84a15f77e710<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,119 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sdm670-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. SDM670 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Richard Acayan &lt;mailingradian@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Top Level Mode Multiplexer (TLMM) block found in the SDM670 platform.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sdm670-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 75</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sdm670-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sdm670-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sdm670-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"</div><div class='add'>+            - enum: [ ufs_reset, sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,</div><div class='add'>+                      sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ adsp_ext, agera_pll, atest_char, atest_tsens, atest_tsens2, atest_usb1, atest_usb10,</div><div class='add'>+                atest_usb11, atest_usb12, atest_usb13, atest_usb2, atest_usb20, atest_usb21,</div><div class='add'>+                atest_usb22, atest_usb23, cam_mclk, cci_async, cci_i2c, cci_timer0, cci_timer1,</div><div class='add'>+                cci_timer2, cci_timer3, cci_timer4, copy_gp, copy_phase, dbg_out, ddr_bist,</div><div class='add'>+                ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, edp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3,</div><div class='add'>+                gp_pdm0, gp_pdm1, gp_pdm2, gpio, gps_tx, jitter_bist, ldo_en, ldo_update,</div><div class='add'>+                lpass_slimbus, m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3,</div><div class='add'>+                mss_lte, nav_pps, pa_indicator, pci_e0, pci_e1, phase_flag, pll_bist, pll_bypassnl,</div><div class='add'>+                pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc, qdss_cti, qdss, qlink_enable,</div><div class='add'>+                qlink_request, qua_mi2s, qup0, qup1, qup10, qup11, qup12, qup13, qup14, qup15, qup2,</div><div class='add'>+                qup3, qup4, qup5, qup6, qup7, qup8, qup9, qup_l4, qup_l5, qup_l6, sdc4_clk,</div><div class='add'>+                sdc4_cmd, sdc4_data, sd_write, sec_mi2s, ter_mi2s, tgu_ch0, tgu_ch1, tgu_ch2,</div><div class='add'>+                tgu_ch3, tsif1_clk, tsif1_data, tsif1_en, tsif1_error, tsif1_sync, tsif2_clk,</div><div class='add'>+                tsif2_data, tsif2_en, tsif2_error, tsif2_sync, uim1_clk, uim1_data, uim1_present,</div><div class='add'>+                uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy, vfr_1,</div><div class='add'>+                vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk, wsa_data, ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@3400000 {</div><div class='add'>+        compatible = "qcom,sdm670-tlmm";</div><div class='add'>+        reg = &lt;0x03400000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 151&gt;;</div><div class='add'>+</div><div class='add'>+        qup-i2c9-state {</div><div class='add'>+            pins = "gpio6", "gpio7";</div><div class='add'>+            function = "qup9";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt<br/>deleted file mode 100644<br/>index 7462e3743c68..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,176 +0,0 @@</div><div class='del'>-Qualcomm SDM845 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-SDM845 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,sdm845-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the TLMM register space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio149</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    gpio, adsp_ext, agera_pll, atest_char, atest_tsens,</div><div class='del'>-		    atest_tsens2, atest_usb1, atest_usb10, atest_usb11,</div><div class='del'>-		    atest_usb12, atest_usb13, atest_usb2, atest_usb20,</div><div class='del'>-		    atest_usb21, atest_usb22, atest_usb23, audio_ref,</div><div class='del'>-		    btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,</div><div class='del'>-		    cci_timer1, cci_timer2, cci_timer3, cci_timer4, cri_trng,</div><div class='del'>-		    cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,</div><div class='del'>-		    ddr_pxi1, ddr_pxi2, ddr_pxi3, edp_hot, edp_lcd, gcc_gp1,</div><div class='del'>-		    gcc_gp2, gcc_gp3, jitter_bist, ldo_en, ldo_update,</div><div class='del'>-		    lpass_slimbus, m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1,</div><div class='del'>-		    mdp_vsync2, mdp_vsync3, mss_lte, nav_pps, pa_indicator,</div><div class='del'>-		    pci_e0, pci_e1, phase_flag, pll_bist, pll_bypassnl,</div><div class='del'>-		    pll_reset, pri_mi2s, pri_mi2s_ws, prng_rosc, qdss_cti,</div><div class='del'>-		    qdss, qlink_enable, qlink_request, qua_mi2s, qup0, qup1,</div><div class='del'>-		    qup10, qup11, qup12, qup13, qup14, qup15, qup2, qup3, qup4,</div><div class='del'>-		    qup5, qup6, qup7, qup8, qup9, qup_l4, qup_l5, qup_l6,</div><div class='del'>-		    qspi_clk, qspi_cs, qspi_data, sd_write, sdc4_clk, sdc4_cmd,</div><div class='del'>-		    sdc4_data, sec_mi2s, sp_cmu, spkr_i2s, ter_mi2s, tgu_ch0,</div><div class='del'>-		    tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1, tsense_pwm2,</div><div class='del'>-		    tsif1_clk, tsif1_data, tsif1_en, tsif1_error, tsif1_sync,</div><div class='del'>-		    tsif2_clk, tsif2_data, tsif2_en, tsif2_error, tsif2_sync,</div><div class='del'>-		    uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk,</div><div class='del'>-		    uim2_data, uim2_present, uim2_reset, uim_batt, usb_phy,</div><div class='del'>-		    vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1, wlan2_adc0,</div><div class='del'>-		    wlan2_adc1,</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configured as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@3400000 {</div><div class='del'>-		compatible = "qcom,sdm845-pinctrl";</div><div class='del'>-		reg = &lt;0x03400000 0xc00000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 0&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		qup9_active: qup9-active {</div><div class='del'>-			mux {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				function = "qup9";</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			config {</div><div class='del'>-				pins = "gpio4", "gpio5";</div><div class='del'>-				drive-strength = &lt;2&gt;;</div><div class='del'>-				bias-disable;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..d301881ddfa8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sdm845-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SDM845 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SDM845 SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sdm845-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 75</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 150</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sdm845-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sdm845-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+  "-hog(-[0-9]+)?$":</div><div class='add'>+    required:</div><div class='add'>+      - gpio-hog</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sdm845-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"</div><div class='add'>+            - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+        enum: [ adsp_ext, agera_pll, atest_char, atest_tsens, atest_tsens2,</div><div class='add'>+                atest_usb1, atest_usb10, atest_usb11, atest_usb12, atest_usb13,</div><div class='add'>+                atest_usb2, atest_usb20, atest_usb21, atest_usb22, atest_usb23,</div><div class='add'>+                audio_ref, btfm_slimbus, cam_mclk, cci_async, cci_i2c,</div><div class='add'>+                cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,</div><div class='add'>+                cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,</div><div class='add'>+                ddr_pxi1, ddr_pxi2, ddr_pxi3, edp_hot, edp_lcd, gcc_gp1,</div><div class='add'>+                gcc_gp2, gcc_gp3, gpio, jitter_bist, ldo_en, ldo_update,</div><div class='add'>+                lpass_slimbus, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,</div><div class='add'>+                mdp_vsync3, mss_lte, m_voc, nav_pps, pa_indicator, pci_e0,</div><div class='add'>+                pci_e1, phase_flag, pll_bist, pll_bypassnl, pll_reset,</div><div class='add'>+                pri_mi2s, pri_mi2s_ws, prng_rosc, qdss, qdss_cti, qlink_enable,</div><div class='add'>+                qlink_request, qspi_clk, qspi_cs, qspi_data, qua_mi2s, qup0,</div><div class='add'>+                qup1, qup10, qup11, qup12, qup13, qup14, qup15, qup2, qup3,</div><div class='add'>+                qup4, qup5, qup6, qup7, qup8, qup9, qup_l4, qup_l5, qup_l6,</div><div class='add'>+                sdc4_clk, sdc4_cmd, sdc4_data, sd_write, sec_mi2s, sp_cmu,</div><div class='add'>+                spkr_i2s, ter_mi2s, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3,</div><div class='add'>+                tsense_pwm1, tsense_pwm2, tsif1_clk, tsif1_data, tsif1_en,</div><div class='add'>+                tsif1_error, tsif1_sync, tsif2_clk, tsif2_data, tsif2_en,</div><div class='add'>+                tsif2_error, tsif2_sync, uim1_clk, uim1_data, uim1_present,</div><div class='add'>+                uim1_reset, uim2_clk, uim2_data, uim2_present, uim2_reset,</div><div class='add'>+                uim_batt, usb_phy, vfr_1, vsense_trigger, wlan1_adc0,</div><div class='add'>+                wlan1_adc1, wlan2_adc0, wlan2_adc1]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pinctrl@3400000 {</div><div class='add'>+        compatible = "qcom,sdm845-pinctrl";</div><div class='add'>+        reg = &lt;0x03400000 0xc00000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 151&gt;;</div><div class='add'>+        wakeup-parent = &lt;&amp;pdc_intc&gt;;</div><div class='add'>+</div><div class='add'>+        ap-suspend-l-hog {</div><div class='add'>+            gpio-hog;</div><div class='add'>+            gpios = &lt;126 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            output-low;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        cci0-default-state {</div><div class='add'>+            pins = "gpio17", "gpio18";</div><div class='add'>+            function = "cci_i2c";</div><div class='add'>+</div><div class='add'>+            bias-pull-up;</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        cam0-default-state {</div><div class='add'>+            rst-pins {</div><div class='add'>+                pins = "gpio9";</div><div class='add'>+                function = "gpio";</div><div class='add'>+</div><div class='add'>+                drive-strength = &lt;16&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            mclk0-pins {</div><div class='add'>+                pins = "gpio13";</div><div class='add'>+                function = "cam_mclk";</div><div class='add'>+</div><div class='add'>+                drive-strength = &lt;16&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml<br/>index a38090b14aab..67af99dd8f14 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml</a></div><div class='hunk'>@@ -9,9 +9,8 @@ title: Qualcomm Technologies, Inc. SDX55 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  SDX55 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SDX55 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -22,37 +21,34 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    description: Specifies the TLMM summary IRQ</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description: Specifies the PIN numbers and Flags, as defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='del'>-</div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='ctx'> </div><div class='ctx'>   gpio-reserved-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-pins$':</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sdx55-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sdx55-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sdx55-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -60,7 +56,7 @@ patternProperties:</div><div class='ctx'>           List of gpio pins affected by the properties specified in this subnode.</div><div class='ctx'>         items:</div><div class='ctx'>           oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$"</div><div class='ctx'>             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 36</div><div class='hunk'>@@ -96,62 +92,37 @@ patternProperties:</div><div class='ctx'>                 uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present,</div><div class='ctx'>                 uim2_reset, usb2phy_ac, vsense_trigger ]</div><div class='ctx'> </div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        tlmm: pinctrl@1f00000 {</div><div class='del'>-                compatible = "qcom,sdx55-pinctrl";</div><div class='del'>-                reg = &lt;0x0f100000 0x300000&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 108&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-                serial-pins {</div><div class='del'>-                        pins = "gpio8", "gpio9";</div><div class='del'>-                        function = "blsp_uart3";</div><div class='del'>-                        drive-strength = &lt;8&gt;;</div><div class='del'>-                        bias-disable;</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@1f00000 {</div><div class='add'>+        compatible = "qcom,sdx55-pinctrl";</div><div class='add'>+        reg = &lt;0x0f100000 0x300000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 108&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        serial-state {</div><div class='add'>+            pins = "gpio8", "gpio9";</div><div class='add'>+            function = "blsp_uart3";</div><div class='add'>+            drive-strength = &lt;8&gt;;</div><div class='add'>+            bias-disable;</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml<br/>index cdfcf29dffee..2ef793ae4038 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sdx65-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sdx65-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sdx65-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. SDX65 TLMM block</div><div class='hunk'>@@ -10,8 +10,7 @@ maintainers:</div><div class='ctx'>   - Vamsi krishna Lanka &lt;quic_vamslank@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  SDX65 platform.</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SDX65 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -24,40 +23,31 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description: Specifies the PIN numbers and Flags, as defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='del'>-</div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='ctx'> </div><div class='ctx'>   gpio-reserved-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-sdx65-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-sdx65-tlmm-state"</div><div class='del'>-'$defs':</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='ctx'>   qcom-sdx65-tlmm-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -122,37 +112,15 @@ patternProperties:</div><div class='ctx'>                 qspi_cs, ssbi2, ssbi1, mss_lte, qspi_clk, qspi0, qspi1, qspi2, qspi3,</div><div class='ctx'>                 gpio ]</div><div class='ctx'> </div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='ctx'> </div><div class='del'>-    additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -175,13 +143,13 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         uart-w-subnodes-state {</div><div class='del'>-            rx {</div><div class='add'>+            rx-pins {</div><div class='ctx'>                 pins = "gpio4";</div><div class='ctx'>                 function = "blsp_uart1";</div><div class='ctx'>                 bias-pull-up;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='del'>-            tx {</div><div class='add'>+            tx-pins {</div><div class='ctx'>                 pins = "gpio5";</div><div class='ctx'>                 function = "blsp_uart1";</div><div class='ctx'>                 bias-disable;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml<br/>deleted file mode 100644<br/>index cfcde405d30a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6115-pinctrl.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,182 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-pinctrl.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Iskren Chernev &lt;iskren.chernev@gmail.com&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  SM4250/6115 platforms.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: qcom,sm6115-tlmm</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    minItems: 3</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='del'>-  reg-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: west</div><div class='del'>-      - const: south</div><div class='del'>-      - const: east</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    description: Specifies the TLMM summary IRQ</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description:</div><div class='del'>-      Specifies the PIN numbers and Flags, as defined in defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-controller: true</div><div class='del'>-</div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  wakeup-parent:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='del'>-patternProperties:</div><div class='del'>-  '-state$':</div><div class='del'>-    oneOf:</div><div class='del'>-      - $ref: "#/$defs/qcom-sm6115-tlmm-state"</div><div class='del'>-      - patternProperties:</div><div class='del'>-          ".*":</div><div class='del'>-            $ref: "#/$defs/qcom-sm6115-tlmm-state"</div><div class='del'>-</div><div class='del'>-'$defs':</div><div class='del'>-  qcom-sm6115-tlmm-state:</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='del'>-      Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      pins:</div><div class='del'>-        description:</div><div class='del'>-          List of gpio pins affected by the properties specified in this</div><div class='del'>-          subnode.</div><div class='del'>-        items:</div><div class='del'>-          oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"</div><div class='del'>-            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,</div><div class='del'>-                      sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='del'>-        minItems: 1</div><div class='del'>-        maxItems: 36</div><div class='del'>-</div><div class='del'>-      function:</div><div class='del'>-        description:</div><div class='del'>-          Specify the alternative function to be configured for the specified</div><div class='del'>-          pins.</div><div class='del'>-</div><div class='del'>-        enum: [ adsp_ext, agera_pll, atest, cam_mclk, cci_async, cci_i2c,</div><div class='del'>-                cci_timer, cri_trng, dac_calib, dbg_out, ddr_bist, ddr_pxi0,</div><div class='del'>-                ddr_pxi1, ddr_pxi2, ddr_pxi3, gcc_gp1, gcc_gp2, gcc_gp3, gpio,</div><div class='del'>-                gp_pdm0, gp_pdm1, gp_pdm2, gsm0_tx, gsm1_tx, jitter_bist,</div><div class='del'>-                mdp_vsync, mdp_vsync_out_0, mdp_vsync_out_1, mpm_pwr, mss_lte,</div><div class='del'>-                m_voc, nav_gpio, pa_indicator, pbs, pbs_out, phase_flag,</div><div class='del'>-                pll_bist, pll_bypassnl, pll_reset, prng_rosc, qdss_cti,</div><div class='del'>-                qdss_gpio, qup0, qup1, qup2, qup3, qup4, qup5, sdc1_tb,</div><div class='del'>-                sdc2_tb, sd_write, ssbi_wtr1, tgu, tsense_pwm, uim1_clk,</div><div class='del'>-                uim1_data, uim1_present, uim1_reset, uim2_clk, uim2_data,</div><div class='del'>-                uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger,</div><div class='del'>-                wlan1_adc0, elan1_adc1 ]</div><div class='del'>-</div><div class='del'>-      drive-strength:</div><div class='del'>-        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-        default: 2</div><div class='del'>-        description:</div><div class='del'>-          Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-</div><div class='del'>-      output-high: true</div><div class='del'>-</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - pins</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - reg</div><div class='del'>-  - reg-names</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        tlmm: pinctrl@500000 {</div><div class='del'>-                compatible = "qcom,sm6115-tlmm";</div><div class='del'>-                reg = &lt;0x500000 0x400000&gt;,</div><div class='del'>-                        &lt;0x900000 0x400000&gt;,</div><div class='del'>-                        &lt;0xd00000 0x400000&gt;;</div><div class='del'>-                reg-names = "west", "south", "east";</div><div class='del'>-                interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 114&gt;;</div><div class='del'>-</div><div class='del'>-                sdc2_on_state: sdc2-on-state {</div><div class='del'>-                        clk {</div><div class='del'>-                                pins = "sdc2_clk";</div><div class='del'>-                                bias-disable;</div><div class='del'>-                                drive-strength = &lt;16&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        cmd {</div><div class='del'>-                                pins = "sdc2_cmd";</div><div class='del'>-                                bias-pull-up;</div><div class='del'>-                                drive-strength = &lt;10&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        data {</div><div class='del'>-                                pins = "sdc2_data";</div><div class='del'>-                                bias-pull-up;</div><div class='del'>-                                drive-strength = &lt;10&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        sd-cd {</div><div class='del'>-                                pins = "gpio88";</div><div class='del'>-                                function = "gpio";</div><div class='del'>-                                bias-pull-up;</div><div class='del'>-                                drive-strength = &lt;2&gt;;</div><div class='del'>-                        };</div><div class='del'>-                };</div><div class='del'>-        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..871df54f69a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,144 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. SM6115, SM4250 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Iskren Chernev &lt;iskren.chernev@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM4250 and SM6115</div><div class='add'>+  SoCs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm6115-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: west</div><div class='add'>+      - const: south</div><div class='add'>+      - const: east</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  gpio-reserved-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm6115-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm6115-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm6115-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"</div><div class='add'>+            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data,</div><div class='add'>+                      sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ adsp_ext, agera_pll, atest, cam_mclk, cci_async, cci_i2c,</div><div class='add'>+                cci_timer, cri_trng, dac_calib, dbg_out, ddr_bist, ddr_pxi0,</div><div class='add'>+                ddr_pxi1, ddr_pxi2, ddr_pxi3, gcc_gp1, gcc_gp2, gcc_gp3, gpio,</div><div class='add'>+                gp_pdm0, gp_pdm1, gp_pdm2, gsm0_tx, gsm1_tx, jitter_bist,</div><div class='add'>+                mdp_vsync, mdp_vsync_out_0, mdp_vsync_out_1, mpm_pwr, mss_lte,</div><div class='add'>+                m_voc, nav_gpio, pa_indicator, pbs, pbs_out, phase_flag,</div><div class='add'>+                pll_bist, pll_bypassnl, pll_reset, prng_rosc, qdss_cti,</div><div class='add'>+                qdss_gpio, qup0, qup1, qup2, qup3, qup4, qup5, sdc1_tb,</div><div class='add'>+                sdc2_tb, sd_write, ssbi_wtr1, tgu, tsense_pwm, uim1_clk,</div><div class='add'>+                uim1_data, uim1_present, uim1_reset, uim2_clk, uim2_data,</div><div class='add'>+                uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger,</div><div class='add'>+                wlan1_adc0, elan1_adc1 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@500000 {</div><div class='add'>+        compatible = "qcom,sm6115-tlmm";</div><div class='add'>+        reg = &lt;0x500000 0x400000&gt;,</div><div class='add'>+              &lt;0x900000 0x400000&gt;,</div><div class='add'>+              &lt;0xd00000 0x400000&gt;;</div><div class='add'>+        reg-names = "west", "south", "east";</div><div class='add'>+        interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 114&gt;;</div><div class='add'>+</div><div class='add'>+        sdc2_on_state: sdc2-on-state {</div><div class='add'>+            clk-pins {</div><div class='add'>+                pins = "sdc2_clk";</div><div class='add'>+                bias-disable;</div><div class='add'>+                drive-strength = &lt;16&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cmd-pins {</div><div class='add'>+                pins = "sdc2_cmd";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+                drive-strength = &lt;10&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            data-pins {</div><div class='add'>+                pins = "sdc2_data";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+                drive-strength = &lt;10&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            sd-cd-pins {</div><div class='add'>+                pins = "gpio88";</div><div class='add'>+                function = "gpio";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml<br/>index c8eec845ade9..8d77707b02b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6125-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml</a></div><div class='hunk'>@@ -1,19 +1,17 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sm6125-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm6125-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Technologies, Inc. SM6125 TLMM block</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Martin Botka &lt;martin.botka@somainline.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer (TLMM) block found</div><div class='del'>-  in the SM6125 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM6125 SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='ctx'>   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -21,21 +19,22 @@ properties:</div><div class='ctx'>     const: qcom,sm6125-tlmm</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 3</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: "west"</div><div class='del'>-      - const: "south"</div><div class='del'>-      - const: "east"</div><div class='add'>+      - const: west</div><div class='add'>+      - const: south</div><div class='add'>+      - const: east</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-  '#interrupt-cells': true</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='ctx'>   gpio-reserved-ranges: true</div><div class='del'>-  '#gpio-cells': true</div><div class='add'>+  "#gpio-cells": true</div><div class='ctx'>   gpio-ranges: true</div><div class='ctx'>   wakeup-parent: true</div><div class='ctx'> </div><div class='hunk'>@@ -47,12 +46,13 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-sm6125-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-sm6125-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='ctx'>   qcom-sm6125-tlmm-state:</div><div class='hunk'>@@ -60,7 +60,8 @@ $defs:</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -101,33 +102,42 @@ $defs:</div><div class='ctx'>                 wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk, wsa_data ]</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-      bias-disable: true</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-      drive-strength: true</div><div class='del'>-      input-enable: true</div><div class='del'>-      output-high: true</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        pinctrl@500000 {</div><div class='del'>-                compatible = "qcom,sm6125-tlmm";</div><div class='del'>-                reg = &lt;0x00500000 0x400000&gt;,</div><div class='del'>-                    &lt;0x00900000 0x400000&gt;,</div><div class='del'>-                    &lt;0x00d00000 0x400000&gt;;</div><div class='del'>-                reg-names = "west", "south", "east";</div><div class='del'>-                interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 134&gt;;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@500000 {</div><div class='add'>+        compatible = "qcom,sm6125-tlmm";</div><div class='add'>+        reg = &lt;0x00500000 0x400000&gt;,</div><div class='add'>+              &lt;0x00900000 0x400000&gt;,</div><div class='add'>+              &lt;0x00d00000 0x400000&gt;;</div><div class='add'>+        reg-names = "west", "south", "east";</div><div class='add'>+        interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 134&gt;;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        sdc2-off-state {</div><div class='add'>+            clk-pins {</div><div class='add'>+                pins = "sdc2_clk";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cmd-pins {</div><div class='add'>+                pins = "sdc2_cmd";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            data-pins {</div><div class='add'>+                pins = "sdc2_data";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml<br/>index 898608671c4b..27af379cf791 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm6350-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. SM6350 TLMM block</div><div class='hunk'>@@ -9,12 +9,10 @@ title: Qualcomm Technologies, Inc. SM6350 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer (TLMM) block found</div><div class='del'>-  in the SM6350 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM6350 SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='ctx'>   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -24,12 +22,22 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 9</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-  '#interrupt-cells': true</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='del'>-  gpio-reserved-ranges: true</div><div class='del'>-  '#gpio-cells': true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 78</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 156</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='ctx'>   gpio-ranges: true</div><div class='ctx'>   wakeup-parent: true</div><div class='ctx'> </div><div class='hunk'>@@ -40,12 +48,13 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-sm6350-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-sm6350-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='ctx'>   qcom-sm6350-tlmm-state:</div><div class='hunk'>@@ -53,7 +62,8 @@ $defs:</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -62,7 +72,7 @@ $defs:</div><div class='ctx'>           subnode.</div><div class='ctx'>         items:</div><div class='ctx'>           oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-7])$"</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"</div><div class='ctx'>             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 36</div><div class='hunk'>@@ -99,51 +109,48 @@ $defs:</div><div class='ctx'>                 uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,</div><div class='ctx'>                 wlan2_adc0, wlan2_adc1, ]</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-      drive-strength: true</div><div class='del'>-      input-enable: true</div><div class='del'>-      output-high: true</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        pinctrl@f100000 {</div><div class='del'>-                compatible = "qcom,sm6350-tlmm";</div><div class='del'>-                reg = &lt;0x0f100000 0x300000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 157&gt;;</div><div class='del'>-</div><div class='del'>-                gpio-wo-subnode-state {</div><div class='del'>-                        pins = "gpio1";</div><div class='del'>-                        function = "gpio";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                uart-w-subnodes-state {</div><div class='del'>-                        rx {</div><div class='del'>-                                pins = "gpio25";</div><div class='del'>-                                function = "qup13_f2";</div><div class='del'>-                                bias-disable;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        tx {</div><div class='del'>-                                pins = "gpio26";</div><div class='del'>-                                function = "qup13_f2";</div><div class='del'>-                                bias-disable;</div><div class='del'>-                        };</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@f100000 {</div><div class='add'>+        compatible = "qcom,sm6350-tlmm";</div><div class='add'>+        reg = &lt;0x0f100000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 157&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-wo-subnode-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-subnodes-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio25";</div><div class='add'>+                function = "qup13_f2";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio26";</div><div class='add'>+                function = "qup13_f2";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..6e02ba24825f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,148 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm6375-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. SM6375 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Konrad Dybcio &lt;konrad.dybcio@somainline.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM6375 SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm6375-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  gpio-reserved-ranges: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm6375-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm6375-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm6375-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"</div><div class='add'>+            - enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ adsp_ext, agera_pll, atest_char, atest_char0, atest_char1,</div><div class='add'>+                atest_char2, atest_char3, atest_tsens, atest_tsens2,</div><div class='add'>+                atest_usb1, atest_usb10, atest_usb11, atest_usb12,</div><div class='add'>+                atest_usb13, atest_usb2, atest_usb20, atest_usb21,</div><div class='add'>+                atest_usb22, atest_usb23, audio_ref, btfm_slimbus, cam_mclk,</div><div class='add'>+                cci_async, cci_i2c, cci_timer0, cci_timer1, cci_timer2,</div><div class='add'>+                cci_timer3, cci_timer4, cri_trng, dbg_out, ddr_bist,</div><div class='add'>+                ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, dp_hot, edp_lcd,</div><div class='add'>+                gcc_gp1, gcc_gp2, gcc_gp3, gp_pdm0, gp_pdm1, gp_pdm2, gpio,</div><div class='add'>+                gps_tx, ibi_i3c, jitter_bist, ldo_en, ldo_update, lpass_ext,</div><div class='add'>+                m_voc, mclk, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,</div><div class='add'>+                mdp_vsync3, mi2s_0, mi2s_1, mi2s_2, mss_lte, nav_gpio,</div><div class='add'>+                nav_pps, pa_indicator, phase_flag0, phase_flag1, phase_flag10,</div><div class='add'>+                phase_flag11, phase_flag12, phase_flag13, phase_flag14,</div><div class='add'>+                phase_flag15, phase_flag16, phase_flag17, phase_flag18,</div><div class='add'>+                phase_flag19, phase_flag2, phase_flag20, phase_flag21,</div><div class='add'>+                phase_flag22, phase_flag23, phase_flag24, phase_flag25,</div><div class='add'>+                phase_flag26, phase_flag27, phase_flag28, phase_flag29,</div><div class='add'>+                phase_flag3, phase_flag30, phase_flag31, phase_flag4,</div><div class='add'>+                phase_flag5, phase_flag6, phase_flag7, phase_flag8,</div><div class='add'>+                phase_flag9, pll_bist, pll_bypassnl, pll_clk, pll_reset,</div><div class='add'>+                prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, qdss_cti,</div><div class='add'>+                qdss_gpio, qdss_gpio0, qdss_gpio1, qdss_gpio10, qdss_gpio11,</div><div class='add'>+                qdss_gpio12, qdss_gpio13, qdss_gpio14, qdss_gpio15,</div><div class='add'>+                qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6,</div><div class='add'>+                qdss_gpio7, qdss_gpio8, qdss_gpio9, qlink0_enable,</div><div class='add'>+                qlink0_request, qlink0_wmss, qlink1_enable, qlink1_request,</div><div class='add'>+                qlink1_wmss, qup00, qup01, qup02, qup10, qup11_f1, qup11_f2,</div><div class='add'>+                qup12, qup13_f1, qup13_f2, qup14, sd_write, sdc1_tb, sdc2_tb,</div><div class='add'>+                sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1,</div><div class='add'>+                tsense_pwm2, uim1_clk, uim1_data, uim1_present, uim1_reset,</div><div class='add'>+                uim2_clk, uim2_data, uim2_present, uim2_reset, usb2phy_ac,</div><div class='add'>+                usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,</div><div class='add'>+                wlan2_adc0, wlan2_adc1 ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@500000 {</div><div class='add'>+        compatible = "qcom,sm6375-tlmm";</div><div class='add'>+        reg = &lt;0x00500000 0x800000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 157&gt;; /* GPIOs + ufs_reset */</div><div class='add'>+</div><div class='add'>+        gpio-wo-subnode-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-subnodes-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio18";</div><div class='add'>+                function = "qup13_f2";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio19";</div><div class='add'>+                function = "qup13_f2";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..a57d44efe5bd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm7150-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm7150-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM7150 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Danila Tikhonov &lt;danila@jiaxyga.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM7150 SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm7150-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: west</div><div class='add'>+      - const: north</div><div class='add'>+      - const: south</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 60</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 119</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm7150-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm7150-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm7150-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-8])$"</div><div class='add'>+            - enum: [ sdc1_rclk, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,</div><div class='add'>+                      sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ gpio, adsp_ext, agera_pll, aoss_cti, atest_char, atest_tsens,</div><div class='add'>+                atest_tsens2, atest_usb1, atest_usb2, cam_mclk, cci_async,</div><div class='add'>+                cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3,</div><div class='add'>+                cci_timer4, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, ddr_pxi2,</div><div class='add'>+                ddr_pxi3, edp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, gp_pdm0,</div><div class='add'>+                gp_pdm1, gp_pdm2, gps_tx, jitter_bist, ldo_en, ldo_update,</div><div class='add'>+                m_voc, mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2,</div><div class='add'>+                mdp_vsync3, mss_lte, nav_pps_in, nav_pps_out, pa_indicator,</div><div class='add'>+                pci_e, phase_flag, pll_bist, pll_bypassnl, pll_reset, pri_mi2s,</div><div class='add'>+                pri_mi2s_ws, prng_rosc, qdss, qdss_cti, qlink_enable,</div><div class='add'>+                qlink_request, qua_mi2s, qup00, qup01, qup02, qup03, qup04,</div><div class='add'>+                qup10, qup11, qup12, qup13, qup14, qup15, sd_write, sdc40,</div><div class='add'>+                sdc41, sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, ter_mi2s,</div><div class='add'>+                tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsif1_clk, tsif1_data,</div><div class='add'>+                tsif1_en, tsif1_error, tsif1_sync, tsif2_clk, tsif2_data,</div><div class='add'>+                tsif2_en, tsif2_error, tsif2_sync, uim1_clk, uim1_data,</div><div class='add'>+                uim1_present, uim1_reset, uim2_clk, uim2_data, uim2_present,</div><div class='add'>+                uim2_reset, uim_batt, usb_phy, vfr_1, vsense_trigger,</div><div class='add'>+                wlan1_adc0, wlan1_adc1, wlan2_adc0, wlan2_adc1, wsa_clk,</div><div class='add'>+                wsa_data ]</div><div class='add'>+</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+      bias-disable: true</div><div class='add'>+      drive-strength: true</div><div class='add'>+      input-enable: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@3500000 {</div><div class='add'>+        compatible = "qcom,sm7150-tlmm";</div><div class='add'>+        reg = &lt;0x03500000 0x300000&gt;,</div><div class='add'>+              &lt;0x03900000 0x300000&gt;,</div><div class='add'>+              &lt;0x03d00000 0x300000&gt;;</div><div class='add'>+        reg-names = "west", "north", "south";</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 120&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-wo-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio44";</div><div class='add'>+                function = "qup12";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio45";</div><div class='add'>+                function = "qup12";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.txt<br/>deleted file mode 100644<br/>index fa37733e5102..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,190 +0,0 @@</div><div class='del'>-Qualcomm SM8150 TLMM block</div><div class='del'>-</div><div class='del'>-This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-QCS404 platform.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be "qcom,sm8150-pinctrl"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of the north, south, west</div><div class='del'>-		    and east TLMM tiles.</div><div class='del'>-</div><div class='del'>-- reg-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Defintiion: names for the cells of reg, must contain "north", "south"</div><div class='del'>-		    "west" and "east".</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the TLMM summary IRQ.</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as an interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: identifies this node as a gpio controller</div><div class='del'>-</div><div class='del'>-- #gpio-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2. Specifying the pin number and flags, as defined</div><div class='del'>-		    in &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-- gpio-ranges:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition:  see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-- gpio-reserved-ranges:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: see ../gpio/gpio.txt</div><div class='del'>-</div><div class='del'>-Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for</div><div class='del'>-a general description of GPIO and interrupt bindings.</div><div class='del'>-</div><div class='del'>-Please refer to pinctrl-bindings.txt in this directory for details of the</div><div class='del'>-common pinctrl bindings used by client devices, including the meaning of the</div><div class='del'>-phrase "pin configuration node".</div><div class='del'>-</div><div class='del'>-The pin configuration nodes act as a container for an arbitrary number of</div><div class='del'>-subnodes. Each of these subnodes represents some desired configuration for a</div><div class='del'>-pin, a group, or a list of pins or groups. This configuration can include the</div><div class='del'>-mux function to select on those pin(s)/group(s), and various pin configuration</div><div class='del'>-parameters, such as pull-up, drive strength, etc.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-PIN CONFIGURATION NODES:</div><div class='del'>-</div><div class='del'>-The name of each subnode is not important; all subnodes should be enumerated</div><div class='del'>-and processed purely based on their content.</div><div class='del'>-</div><div class='del'>-Each subnode only affects those parameters that are explicitly listed. In</div><div class='del'>-other words, a subnode that lists a mux function but no pin configuration</div><div class='del'>-parameters implies no information about any pin configuration parameters.</div><div class='del'>-Similarly, a pin subnode that describes a pullup parameter implies no</div><div class='del'>-information about e.g. the mux function.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The following generic properties as defined in pinctrl-bindings.txt are valid</div><div class='del'>-to specify in a pin configuration subnode:</div><div class='del'>-</div><div class='del'>-- pins:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of gpio pins affected by the properties specified in</div><div class='del'>-		    this subnode.</div><div class='del'>-</div><div class='del'>-		    Valid pins are:</div><div class='del'>-		      gpio0-gpio149</div><div class='del'>-		        Supports mux, bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      sdc1_clk, sdc1_cmd, sdc1_data sdc2_clk, sdc2_cmd,</div><div class='del'>-		      sdc2_data sdc1_rclk</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-		      ufs_reset</div><div class='del'>-		        Supports bias and drive-strength</div><div class='del'>-</div><div class='del'>-- function:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Specify the alternative function to be configured for the</div><div class='del'>-		    specified pins. Functions are only valid for gpio pins.</div><div class='del'>-		    Valid values are:</div><div class='del'>-</div><div class='del'>-		    adsp_ext, agera_pll, aoss_cti, ddr_pxi2, atest_char,</div><div class='del'>-		    atest_char0, atest_char1, atest_char2, atest_char3,</div><div class='del'>-		    audio_ref, atest_usb1, atest_usb2, atest_usb10,</div><div class='del'>-		    atest_usb11, atest_usb12, atest_usb13, atest_usb20,</div><div class='del'>-		    atest_usb21, atest_usb22, atest_usb2, atest_usb23,</div><div class='del'>-		    btfm_slimbus, cam_mclk, cci_async, cci_i2c, cci_timer0,</div><div class='del'>-		    cci_timer1, cci_timer2, cci_timer3, cci_timer4,</div><div class='del'>-		    cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist,</div><div class='del'>-		    ddr_pxi0, ddr_pxi1, ddr_pxi3, edp_hot, edp_lcd,</div><div class='del'>-		    emac_phy, emac_pps, gcc_gp1, gcc_gp2, gcc_gp3, gpio,</div><div class='del'>-		    hs1_mi2s, hs2_mi2s, hs3_mi2s, jitter_bist,</div><div class='del'>-		    lpass_slimbus, mdp_vsync, mdp_vsync0, mdp_vsync1,</div><div class='del'>-		    mdp_vsync2, mdp_vsync3, mss_lte, m_voc, nav_pps,</div><div class='del'>-		    pa_indicator, pci_e0, phase_flag, pll_bypassnl,</div><div class='del'>-		    pll_bist, pci_e1, pll_reset, pri_mi2s, pri_mi2s_ws,</div><div class='del'>-		    prng_rosc, qdss, qdss_cti, qlink_request, qlink_enable,</div><div class='del'>-		    qspi0, qspi1, qspi2, qspi3, qspi_clk, qspi_cs, qua_mi2s,</div><div class='del'>-		    qup0, qup1, qup2, qup3, qup4, qup5, qup6, qup7, qup8,</div><div class='del'>-		    qup9, qup10, qup11, qup12, qup13, qup14, qup15, qup16,</div><div class='del'>-		    qup17, qup18, qup19, qup_l4, qup_l5, qup_l6, rgmii,</div><div class='del'>-		    sdc4, sd_write, sec_mi2s, spkr_i2s, sp_cmu, ter_mi2s,</div><div class='del'>-		    tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1,</div><div class='del'>-		    tsense_pwm2, tsif1, tsif2, uim1, uim2, uim_batt,</div><div class='del'>-		    usb2phy_ac, usb_phy, vfr_1, vsense_trigger, wlan1_adc0,</div><div class='del'>-		    wlan1_adc1, wlan2_adc0, wlan2_adc1, wmss_reset</div><div class='del'>-</div><div class='del'>-- bias-disable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configued as no pull.</div><div class='del'>-</div><div class='del'>-- bias-pull-down:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configued as pull down.</div><div class='del'>-</div><div class='del'>-- bias-pull-up:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins should be configued as pull up.</div><div class='del'>-</div><div class='del'>-- output-high:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    high.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- output-low:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;none&gt;</div><div class='del'>-	Definition: The specified pins are configured in output mode, driven</div><div class='del'>-		    low.</div><div class='del'>-		    Not valid for sdc pins.</div><div class='del'>-</div><div class='del'>-- drive-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Selects the drive strength for the specified pins, in mA.</div><div class='del'>-		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	tlmm: pinctrl@3000000 {</div><div class='del'>-		compatible = "qcom,sm8150-pinctrl";</div><div class='del'>-		reg = &lt;0x03100000 0x300000&gt;,</div><div class='del'>-		      &lt;0x03500000 0x300000&gt;,</div><div class='del'>-		      &lt;0x03900000 0x300000&gt;,</div><div class='del'>-		      &lt;0x03D00000 0x300000&gt;;</div><div class='del'>-		reg-names = "west", "east", "north", "south";</div><div class='del'>-		interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		gpio-controller;</div><div class='del'>-		#gpio-cells = &lt;2&gt;;</div><div class='del'>-		gpio-ranges = &lt;&amp;tlmm 0 0 175&gt;;</div><div class='del'>-		gpio-reserved-ranges = &lt;0 4&gt;, &lt;126 4&gt;;</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..c6439626464e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,166 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8150-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8150 TLMM pin controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM8150 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8150-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: west</div><div class='add'>+      - const: east</div><div class='add'>+      - const: north</div><div class='add'>+      - const: south</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 88</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 175</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm8150-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm8150-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm8150-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-6][0-9]|17[0-4])$"</div><div class='add'>+            - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ adsp_ext, agera_pll, aoss_cti, ddr_pxi2, atest_char,</div><div class='add'>+                atest_char0, atest_char1, atest_char2, atest_char3, audio_ref,</div><div class='add'>+                atest_usb1, atest_usb2, atest_usb10, atest_usb11, atest_usb12,</div><div class='add'>+                atest_usb13, atest_usb20, atest_usb21, atest_usb22,</div><div class='add'>+                atest_usb23, btfm_slimbus, cam_mclk, cci_async, cci_i2c,</div><div class='add'>+                cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4,</div><div class='add'>+                cri_trng, cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,</div><div class='add'>+                ddr_pxi1, ddr_pxi3, edp_hot, edp_lcd, emac_phy, emac_pps,</div><div class='add'>+                gcc_gp1, gcc_gp2, gcc_gp3, gpio, hs1_mi2s, hs2_mi2s, hs3_mi2s,</div><div class='add'>+                jitter_bist, lpass_slimbus, mdp_vsync, mdp_vsync0, mdp_vsync1,</div><div class='add'>+                mdp_vsync2, mdp_vsync3, mss_lte, m_voc, nav_pps, pa_indicator,</div><div class='add'>+                pci_e0, phase_flag, pll_bypassnl, pll_bist, pci_e1, pll_reset,</div><div class='add'>+                pri_mi2s, pri_mi2s_ws, prng_rosc, qdss, qdss_cti,</div><div class='add'>+                qlink_request, qlink_enable, qspi0, qspi1, qspi2, qspi3,</div><div class='add'>+                qspi_clk, qspi_cs, qua_mi2s, qup0, qup1, qup2, qup3, qup4,</div><div class='add'>+                qup5, qup6, qup7, qup8, qup9, qup10, qup11, qup12, qup13,</div><div class='add'>+                qup14, qup15, qup16, qup17, qup18, qup19, qup_l4, qup_l5,</div><div class='add'>+                qup_l6, rgmii, sdc4, sd_write, sec_mi2s, spkr_i2s, sp_cmu,</div><div class='add'>+                ter_mi2s, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1,</div><div class='add'>+                tsense_pwm2, tsif1, tsif2, uim1, uim2, uim_batt, usb2phy_ac,</div><div class='add'>+                usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,</div><div class='add'>+                wlan2_adc0, wlan2_adc1, wmss_reset ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    tlmm: pinctrl@3100000 {</div><div class='add'>+        compatible = "qcom,sm8150-pinctrl";</div><div class='add'>+        reg = &lt;0x03100000 0x300000&gt;,</div><div class='add'>+              &lt;0x03500000 0x300000&gt;,</div><div class='add'>+              &lt;0x03900000 0x300000&gt;,</div><div class='add'>+              &lt;0x03d00000 0x300000&gt;;</div><div class='add'>+        reg-names = "west", "east", "north", "south";</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 176&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+</div><div class='add'>+        qup-spi0-default-state {</div><div class='add'>+            pins = "gpio0", "gpio1", "gpio2", "gpio3";</div><div class='add'>+            function = "qup0";</div><div class='add'>+            drive-strength = &lt;6&gt;;</div><div class='add'>+            bias-disable;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pcie1-default-state {</div><div class='add'>+            perst-pins {</div><div class='add'>+                pins = "gpio102";</div><div class='add'>+                function = "gpio";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-down;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            clkreq-pins {</div><div class='add'>+                pins = "gpio103";</div><div class='add'>+                function = "pci_e1";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            wake-pins {</div><div class='add'>+                pins = "gpio104";</div><div class='add'>+                function = "gpio";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml<br/>index 5c5542f1627c..4b4be7efc150 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml</a></div><div class='hunk'>@@ -1,25 +1,23 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)</div><div class='del'>-  Low Power Island (LPI) TLMM block</div><div class='add'>+title: Qualcomm SM8250 SoC LPASS LPI TLMM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  LPASS LPI IP on most Qualcomm SoCs</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem</div><div class='add'>+  (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sm8250-lpass-lpi-pinctrl</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -34,7 +32,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   gpio-controller: true</div><div class='ctx'> </div><div class='del'>-  '#gpio-cells':</div><div class='add'>+  "#gpio-cells":</div><div class='ctx'>     description: Specifying the pin number and flags, as defined in</div><div class='ctx'>       include/dt-bindings/gpio/gpio.h</div><div class='ctx'>     const: 2</div><div class='hunk'>@@ -42,14 +40,22 @@ properties:</div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '-pins$':</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm8250-lpass-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm8250-lpass-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm8250-lpass-state:</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+    $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -58,7 +64,7 @@ patternProperties:</div><div class='ctx'>           subnode.</div><div class='ctx'>         items:</div><div class='ctx'>           oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9])$"</div><div class='add'>+            - pattern: "^gpio([0-9]|1[0-3])$"</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 14</div><div class='ctx'> </div><div class='hunk'>@@ -88,13 +94,11 @@ patternProperties:</div><div class='ctx'>             3: Reserved (No adjustments)</div><div class='ctx'> </div><div class='ctx'>       bias-pull-down: true</div><div class='del'>-</div><div class='ctx'>       bias-pull-up: true</div><div class='del'>-</div><div class='add'>+      bias-bus-hold: true</div><div class='ctx'>       bias-disable: true</div><div class='del'>-</div><div class='add'>+      input-enable: true</div><div class='ctx'>       output-high: true</div><div class='del'>-</div><div class='ctx'>       output-low: true</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='hunk'>@@ -104,7 +108,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -112,7 +116,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='add'>+  - "#gpio-cells"</div><div class='ctx'>   - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='hunk'>@@ -130,4 +134,28 @@ examples:</div><div class='ctx'>         gpio-controller;</div><div class='ctx'>         #gpio-cells = &lt;2&gt;;</div><div class='ctx'>         gpio-ranges = &lt;&amp;lpi_tlmm 0 0 14&gt;;</div><div class='add'>+</div><div class='add'>+        wsa-swr-active-state {</div><div class='add'>+            clk-pins {</div><div class='add'>+                pins = "gpio10";</div><div class='add'>+                function = "wsa_swr_clk";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                slew-rate = &lt;1&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            data-pins {</div><div class='add'>+                pins = "gpio11";</div><div class='add'>+                function = "wsa_swr_data";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                slew-rate = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        tx-swr-sleep-clk-state {</div><div class='add'>+            pins = "gpio0";</div><div class='add'>+            function = "swr_tx_clk";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml<br/>index cfa2c50fdb93..021c54708524 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8250-pinctrl.yaml</a></div><div class='hunk'>@@ -9,142 +9,119 @@ title: Qualcomm Technologies, Inc. SM8250 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer block found in the</div><div class='del'>-  SM8250 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in the Qualcomm SM8250 SoC.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,sm8250-pinctrl</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 3</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: "west"</div><div class='del'>-      - const: "south"</div><div class='del'>-      - const: "north"</div><div class='add'>+      - const: west</div><div class='add'>+      - const: south</div><div class='add'>+      - const: north</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    description: Specifies the TLMM summary IRQ</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-</div><div class='del'>-  '#interrupt-cells':</div><div class='del'>-    description:</div><div class='del'>-      Specifies the PIN numbers and Flags, as defined in defined in</div><div class='del'>-      include/dt-bindings/interrupt-controller/irq.h</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='ctx'> </div><div class='del'>-  '#gpio-cells':</div><div class='del'>-    description: Specifying the pin number and flags, as defined in</div><div class='del'>-      include/dt-bindings/gpio/gpio.h</div><div class='del'>-    const: 2</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 90</div><div class='ctx'> </div><div class='del'>-  gpio-ranges:</div><div class='del'>-    maxItems: 1</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 180</div><div class='ctx'> </div><div class='del'>-  wakeup-parent:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-#PIN CONFIGURATION NODES</div><div class='ctx'> patternProperties:</div><div class='del'>-  '^.*$':</div><div class='del'>-    if:</div><div class='del'>-      type: object</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        pins:</div><div class='del'>-          description:</div><div class='del'>-            List of gpio pins affected by the properties specified in this</div><div class='del'>-            subnode.</div><div class='del'>-          items:</div><div class='del'>-            oneOf:</div><div class='del'>-              - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"</div><div class='del'>-              - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='del'>-          minItems: 1</div><div class='del'>-          maxItems: 36</div><div class='del'>-</div><div class='del'>-        function:</div><div class='del'>-          description:</div><div class='del'>-            Specify the alternative function to be configured for the specified</div><div class='del'>-            pins.</div><div class='del'>-</div><div class='del'>-          enum: [ aoss_cti, atest, audio_ref, cam_mclk, cci_async, cci_i2c,</div><div class='del'>-                  cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, cri_trng,</div><div class='del'>-                  cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,</div><div class='del'>-                  ddr_pxi2, ddr_pxi3, dp_hot, dp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, gpio,</div><div class='del'>-                  ibi_i3c, jitter_bist, lpass_slimbus, mdp_vsync, mdp_vsync0,</div><div class='del'>-                  mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s0_data0, mi2s0_data1,</div><div class='del'>-                  mi2s0_sck, mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,</div><div class='del'>-                  mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, pci_e0, pci_e1,</div><div class='del'>-                  pci_e2, phase_flag, pll_bist, pll_bypassnl, pll_clk, pll_reset,</div><div class='del'>-                  pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, qspi0, qspi1, qspi2, qspi3,</div><div class='del'>-                  qspi_clk, qspi_cs, qup0, qup1, qup10, qup11, qup12, qup13, qup14,</div><div class='del'>-                  qup15, qup16, qup17, qup18, qup19, qup2, qup3, qup4, qup5, qup6,</div><div class='del'>-                  qup7, qup8, qup9, qup_l4, qup_l5, qup_l6, sd_write, sdc40, sdc41,</div><div class='del'>-                  sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, tgu_ch0, tgu_ch1,</div><div class='del'>-                  tgu_ch2, tgu_ch3, tsense_pwm1, tsense_pwm2, tsif0_clk, tsif0_data,</div><div class='del'>-                  tsif0_en, tsif0_error, tsif0_sync, tsif1_clk, tsif1_data, tsif1_en,</div><div class='del'>-                  tsif1_error, tsif1_sync, usb2phy_ac, usb_phy, vsense_trigger ]</div><div class='del'>-</div><div class='del'>-        drive-strength:</div><div class='del'>-          enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='del'>-          default: 2</div><div class='del'>-          description:</div><div class='del'>-            Selects the drive strength for the specified pins, in mA.</div><div class='del'>-</div><div class='del'>-        bias-pull-down: true</div><div class='del'>-</div><div class='del'>-        bias-pull-up: true</div><div class='del'>-</div><div class='del'>-        bias-disable: true</div><div class='del'>-</div><div class='del'>-        output-high: true</div><div class='del'>-</div><div class='del'>-        output-low: true</div><div class='del'>-</div><div class='del'>-      required:</div><div class='del'>-        - pins</div><div class='del'>-        - function</div><div class='del'>-</div><div class='del'>-      additionalProperties: false</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm8250-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm8250-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm8250-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"</div><div class='add'>+            - enum: [ sdc2_clk, sdc2_cmd, sdc2_data, ufs_reset ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+        enum: [ aoss_cti, atest, audio_ref, cam_mclk, cci_async, cci_i2c,</div><div class='add'>+                cci_timer0, cci_timer1, cci_timer2, cci_timer3, cci_timer4, cri_trng,</div><div class='add'>+                cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1,</div><div class='add'>+                ddr_pxi2, ddr_pxi3, dp_hot, dp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, gpio,</div><div class='add'>+                ibi_i3c, jitter_bist, lpass_slimbus, mdp_vsync, mdp_vsync0,</div><div class='add'>+                mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s0_data0, mi2s0_data1,</div><div class='add'>+                mi2s0_sck, mi2s0_ws, mi2s1_data0, mi2s1_data1, mi2s1_sck, mi2s1_ws,</div><div class='add'>+                mi2s2_data0, mi2s2_data1, mi2s2_sck, mi2s2_ws, pci_e0, pci_e1,</div><div class='add'>+                pci_e2, phase_flag, pll_bist, pll_bypassnl, pll_clk, pll_reset,</div><div class='add'>+                pri_mi2s, prng_rosc, qdss_cti, qdss_gpio, qspi0, qspi1, qspi2, qspi3,</div><div class='add'>+                qspi_clk, qspi_cs, qup0, qup1, qup10, qup11, qup12, qup13, qup14,</div><div class='add'>+                qup15, qup16, qup17, qup18, qup19, qup2, qup3, qup4, qup5, qup6,</div><div class='add'>+                qup7, qup8, qup9, qup_l4, qup_l5, qup_l6, sd_write, sdc40, sdc41,</div><div class='add'>+                sdc42, sdc43, sdc4_clk, sdc4_cmd, sec_mi2s, sp_cmu, tgu_ch0, tgu_ch1,</div><div class='add'>+                tgu_ch2, tgu_ch3, tsense_pwm1, tsense_pwm2, tsif0_clk, tsif0_data,</div><div class='add'>+                tsif0_en, tsif0_error, tsif0_sync, tsif1_clk, tsif1_data, tsif1_en,</div><div class='add'>+                tsif1_error, tsif1_sync, usb2phy_ac, usb_phy, vsense_trigger ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - '#interrupt-cells'</div><div class='del'>-  - gpio-controller</div><div class='del'>-  - '#gpio-cells'</div><div class='del'>-  - gpio-ranges</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        pinctrl@1f00000 {</div><div class='del'>-                compatible = "qcom,sm8250-pinctrl";</div><div class='del'>-                reg = &lt;0x0f100000 0x300000&gt;,</div><div class='del'>-                      &lt;0x0f500000 0x300000&gt;,</div><div class='del'>-                      &lt;0x0f900000 0x300000&gt;;</div><div class='del'>-                reg-names = "west", "south", "north";</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 180&gt;;</div><div class='del'>-                wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='del'>-        };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@1f00000 {</div><div class='add'>+        compatible = "qcom,sm8250-pinctrl";</div><div class='add'>+        reg = &lt;0x0f100000 0x300000&gt;,</div><div class='add'>+              &lt;0x0f500000 0x300000&gt;,</div><div class='add'>+              &lt;0x0f900000 0x300000&gt;;</div><div class='add'>+        reg-names = "west", "south", "north";</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 181&gt;; /* GPIOs + ufs_reset */</div><div class='add'>+        wakeup-parent = &lt;&amp;pdc&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml<br/>index 6b7789db2f75..6e8f41ff0a76 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8350-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8350-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. SM8350 TLMM block</div><div class='hunk'>@@ -9,12 +9,10 @@ title: Qualcomm Technologies, Inc. SM8350 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer (TLMM) block found</div><div class='del'>-  in the SM8350 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM8350 SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='ctx'>   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -24,12 +22,21 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-  '#interrupt-cells': true</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='del'>-  gpio-reserved-ranges: true</div><div class='del'>-  '#gpio-cells': true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 102</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 203</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='ctx'>   gpio-ranges: true</div><div class='ctx'>   wakeup-parent: true</div><div class='ctx'> </div><div class='hunk'>@@ -40,12 +47,13 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-sm8350-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-sm8350-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='ctx'>   qcom-sm8350-tlmm-state:</div><div class='hunk'>@@ -53,7 +61,8 @@ $defs:</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -62,7 +71,7 @@ $defs:</div><div class='ctx'>           subnode.</div><div class='ctx'>         items:</div><div class='ctx'>           oneOf:</div><div class='del'>-            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-2])$"</div><div class='ctx'>             - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 36</div><div class='hunk'>@@ -96,51 +105,39 @@ $defs:</div><div class='ctx'>                 uim0_present, uim0_reset, uim1_clk, uim1_data, uim1_present,</div><div class='ctx'>                 uim1_reset, usb2phy_ac, usb_phy, vfr_0, vfr_1, vsense_trigger ]</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-      bias-disable: true</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-      drive-strength: true</div><div class='del'>-      input-enable: true</div><div class='del'>-      output-high: true</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        pinctrl@f100000 {</div><div class='del'>-                compatible = "qcom,sm8350-tlmm";</div><div class='del'>-                reg = &lt;0x0f100000 0x300000&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 203&gt;;</div><div class='del'>-</div><div class='del'>-                gpio-wo-subnode-state {</div><div class='del'>-                        pins = "gpio1";</div><div class='del'>-                        function = "gpio";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                uart-w-subnodes-state {</div><div class='del'>-                        rx {</div><div class='del'>-                                pins = "gpio18";</div><div class='del'>-                                function = "qup3";</div><div class='del'>-                                bias-pull-up;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        tx {</div><div class='del'>-                                pins = "gpio19";</div><div class='del'>-                                function = "qup3";</div><div class='del'>-                                bias-disable;</div><div class='del'>-                        };</div><div class='del'>-                };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@f100000 {</div><div class='add'>+        compatible = "qcom,sm8350-tlmm";</div><div class='add'>+        reg = &lt;0x0f100000 0x300000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 204&gt;; /* GPIOs + ufs_reset */</div><div class='add'>+</div><div class='add'>+        gpio-wo-subnode-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-subnodes-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio18";</div><div class='add'>+                function = "qup3";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio19";</div><div class='add'>+                function = "qup3";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..1eefa9aa6a86<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,164 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8450 SoC LPASS LPI TLMM</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem</div><div class='add'>+  (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8450-lpass-lpi-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: LPASS LPI TLMM Control and Status registers</div><div class='add'>+      - description: LPASS LPI MCC registers</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: LPASS Core voting clock</div><div class='add'>+      - description: LPASS Audio voting clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: audio</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    description: Specifying the pin number and flags, as defined in</div><div class='add'>+      include/dt-bindings/gpio/gpio.h</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm8450-lpass-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm8450-lpass-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm8450-lpass-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        enum: [ swr_tx_clk, swr_tx_data, swr_rx_clk, swr_rx_data,</div><div class='add'>+                dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic4_clk,</div><div class='add'>+                dmic4_data, i2s2_clk, i2s2_ws, dmic3_clk, dmic3_data,</div><div class='add'>+                qua_mi2s_sclk, qua_mi2s_ws, qua_mi2s_data, i2s1_clk, i2s1_ws,</div><div class='add'>+                i2s1_data, wsa_swr_clk, wsa_swr_data, wsa2_swr_clk,</div><div class='add'>+                wsa2_swr_data, i2s2_data, i2s4_ws, i2s4_clk, i2s4_data,</div><div class='add'>+                slimbus_clk, i2s3_clk, i2s3_ws, i2s3_data, slimbus_data,</div><div class='add'>+                ext_mclk1_c, ext_mclk1_b, ext_mclk1_a, ext_mclk1_d,</div><div class='add'>+                ext_mclk1_e ]</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+      drive-strength:</div><div class='add'>+        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+        default: 2</div><div class='add'>+        description:</div><div class='add'>+          Selects the drive strength for the specified pins, in mA.</div><div class='add'>+</div><div class='add'>+      slew-rate:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        default: 0</div><div class='add'>+        description: |</div><div class='add'>+          0: No adjustments</div><div class='add'>+          1: Higher Slew rate (faster edges)</div><div class='add'>+          2: Lower Slew rate (slower edges)</div><div class='add'>+          3: Reserved (No adjustments)</div><div class='add'>+</div><div class='add'>+      bias-bus-hold: true</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+      bias-disable: true</div><div class='add'>+      input-enable: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+      - function</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+    pinctrl@3440000 {</div><div class='add'>+        compatible = "qcom,sm8450-lpass-lpi-pinctrl";</div><div class='add'>+        reg = &lt;0x3440000 0x20000&gt;,</div><div class='add'>+              &lt;0x34d0000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+                 &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+        clock-names = "core", "audio";</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;lpi_tlmm 0 0 23&gt;;</div><div class='add'>+</div><div class='add'>+        wsa-swr-active-state {</div><div class='add'>+            clk-pins {</div><div class='add'>+                pins = "gpio10";</div><div class='add'>+                function = "wsa_swr_clk";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                slew-rate = &lt;1&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            data-pins {</div><div class='add'>+                pins = "gpio11";</div><div class='add'>+                function = "wsa_swr_data";</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                slew-rate = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        tx-swr-sleep-clk-state {</div><div class='add'>+            pins = "gpio0";</div><div class='add'>+            function = "swr_tx_clk";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml<br/>index 9c891246245b..5163fe3f5365 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,sm8450-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-pinctrl.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-tlmm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Technologies, Inc. SM8450 TLMM block</div><div class='hunk'>@@ -9,9 +9,8 @@ title: Qualcomm Technologies, Inc. SM8450 TLMM block</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vinod Koul &lt;vkoul@kernel.org&gt;</div><div class='ctx'> </div><div class='del'>-description: |</div><div class='del'>-  This binding describes the Top Level Mode Multiplexer (TLMM) block found</div><div class='del'>-  in the SM8450 platform.</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM8450 SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='hunk'>@@ -23,12 +22,21 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   interrupt-controller: true</div><div class='del'>-  '#interrupt-cells': true</div><div class='add'>+  "#interrupt-cells": true</div><div class='ctx'>   gpio-controller: true</div><div class='del'>-  gpio-reserved-ranges: true</div><div class='del'>-  '#gpio-cells': true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 105</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 210</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='ctx'>   gpio-ranges: true</div><div class='ctx'>   wakeup-parent: true</div><div class='ctx'> </div><div class='hunk'>@@ -39,12 +47,13 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  '-state$':</div><div class='add'>+  "-state$":</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - $ref: "#/$defs/qcom-sm8450-tlmm-state"</div><div class='ctx'>       - patternProperties:</div><div class='del'>-          ".*":</div><div class='add'>+          "-pins$":</div><div class='ctx'>             $ref: "#/$defs/qcom-sm8450-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='ctx'>   qcom-sm8450-tlmm-state:</div><div class='hunk'>@@ -52,7 +61,8 @@ $defs:</div><div class='ctx'>     description:</div><div class='ctx'>       Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='ctx'>       Client device subnodes use below standard properties.</div><div class='del'>-    $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       pins:</div><div class='hunk'>@@ -94,50 +104,39 @@ $defs:</div><div class='ctx'>                 uim0_reset, uim1_clk, uim1_data, uim1_present, uim1_reset,</div><div class='ctx'>                 usb2phy_ac, usb_phy, vfr_0, vfr_1, vsense_trigger ]</div><div class='ctx'> </div><div class='del'>-      bias-disable: true</div><div class='del'>-      bias-pull-down: true</div><div class='del'>-      bias-pull-up: true</div><div class='del'>-      drive-strength: true</div><div class='del'>-      input-enable: true</div><div class='del'>-      output-high: true</div><div class='del'>-      output-low: true</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - pins</div><div class='del'>-      - function</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-        #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-        pinctrl@f100000 {</div><div class='del'>-                compatible = "qcom,sm8450-tlmm";</div><div class='del'>-                reg = &lt;0x0f100000 0x300000&gt;;</div><div class='del'>-                gpio-controller;</div><div class='del'>-                #gpio-cells = &lt;2&gt;;</div><div class='del'>-                gpio-ranges = &lt;&amp;tlmm 0 0 211&gt;;</div><div class='del'>-                interrupt-controller;</div><div class='del'>-                #interrupt-cells = &lt;2&gt;;</div><div class='del'>-                interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-                gpio-wo-subnode-state {</div><div class='del'>-                        pins = "gpio1";</div><div class='del'>-                        function = "gpio";</div><div class='del'>-                };</div><div class='del'>-</div><div class='del'>-                uart-w-subnodes-state {</div><div class='del'>-                    rx {</div><div class='del'>-                            pins = "gpio26";</div><div class='del'>-                            function = "qup7";</div><div class='del'>-                            bias-pull-up;</div><div class='del'>-                    };</div><div class='del'>-</div><div class='del'>-                    tx {</div><div class='del'>-                            pins = "gpio27";</div><div class='del'>-                            function = "qup7";</div><div class='del'>-                            bias-disable;</div><div class='del'>-                    };</div><div class='del'>-               };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pinctrl@f100000 {</div><div class='add'>+        compatible = "qcom,sm8450-tlmm";</div><div class='add'>+        reg = &lt;0x0f100000 0x300000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 211&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-wo-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio26";</div><div class='add'>+                function = "qup7";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio27";</div><div class='add'>+                function = "qup7";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..ef9743246849<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,150 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8550 SoC LPASS LPI TLMM</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in the Low Power Audio SubSystem</div><div class='add'>+  (LPASS) Low Power Island (LPI) of Qualcomm SM8550 SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8550-lpass-lpi-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: LPASS LPI TLMM Control and Status registers</div><div class='add'>+      - description: LPASS LPI MCC registers</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: LPASS Core voting clock</div><div class='add'>+      - description: LPASS Audio voting clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: audio</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  "#gpio-cells":</div><div class='add'>+    description: Specifying the pin number and flags, as defined in</div><div class='add'>+      include/dt-bindings/gpio/gpio.h</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm8550-lpass-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm8550-lpass-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm8550-lpass-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          pattern: "^gpio([0-9]|1[0-9]|2[0-2])$"</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        enum: [ dmic1_clk, dmic1_data, dmic2_clk, dmic2_data, dmic3_clk,</div><div class='add'>+                dmic3_data, dmic4_clk, dmic4_data, ext_mclk1_a, ext_mclk1_b,</div><div class='add'>+                ext_mclk1_c, ext_mclk1_d, ext_mclk1_e, gpio, i2s0_clk,</div><div class='add'>+                i2s0_data, i2s0_ws, i2s1_clk, i2s1_data, i2s1_ws, i2s2_clk,</div><div class='add'>+                i2s2_data, i2s2_ws, i2s3_clk, i2s3_data, i2s3_ws, i2s4_clk,</div><div class='add'>+                i2s4_data, i2s4_ws, slimbus_clk, slimbus_data, swr_rx_clk,</div><div class='add'>+                swr_rx_data, swr_tx_clk, swr_tx_data, wsa_swr_clk,</div><div class='add'>+                wsa_swr_data, wsa2_swr_clk, wsa2_swr_data ]</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+</div><div class='add'>+      drive-strength:</div><div class='add'>+        enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='add'>+        default: 2</div><div class='add'>+        description:</div><div class='add'>+          Selects the drive strength for the specified pins, in mA.</div><div class='add'>+</div><div class='add'>+      slew-rate:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        default: 0</div><div class='add'>+        description: |</div><div class='add'>+          0: No adjustments</div><div class='add'>+          1: Higher Slew rate (faster edges)</div><div class='add'>+          2: Lower Slew rate (slower edges)</div><div class='add'>+          3: Reserved (No adjustments)</div><div class='add'>+</div><div class='add'>+      bias-bus-hold: true</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+      bias-disable: true</div><div class='add'>+      input-enable: true</div><div class='add'>+      output-high: true</div><div class='add'>+      output-low: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+      - function</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - "#gpio-cells"</div><div class='add'>+  - gpio-ranges</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='add'>+</div><div class='add'>+    lpass_tlmm: pinctrl@6e80000 {</div><div class='add'>+        compatible = "qcom,sm8550-lpass-lpi-pinctrl";</div><div class='add'>+        reg = &lt;0x06e80000 0x20000&gt;,</div><div class='add'>+              &lt;0x0725a000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+                 &lt;&amp;q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='add'>+        clock-names = "core", "audio";</div><div class='add'>+</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;lpass_tlmm 0 0 23&gt;;</div><div class='add'>+</div><div class='add'>+        tx-swr-sleep-clk-state {</div><div class='add'>+            pins = "gpio0";</div><div class='add'>+            function = "swr_tx_clk";</div><div class='add'>+            drive-strength = &lt;2&gt;;</div><div class='add'>+            bias-pull-down;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml<br/>new file mode 100644<br/>index 000000000000..f789c7753a92<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml</a></div><div class='hunk'>@@ -0,0 +1,154 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-tlmm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Technologies, Inc. SM8550 TLMM block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Abel Vesa &lt;abel.vesa@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Top Level Mode Multiplexer pin controller in Qualcomm SM8550 SoC.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,sm8550-tlmm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts: true</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  "#interrupt-cells": true</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  gpio-reserved-ranges:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 105</div><div class='add'>+</div><div class='add'>+  gpio-line-names:</div><div class='add'>+    maxItems: 210</div><div class='add'>+</div><div class='add'>+  "#gpio-cells": true</div><div class='add'>+  gpio-ranges: true</div><div class='add'>+  wakeup-parent: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "-state$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: "#/$defs/qcom-sm8550-tlmm-state"</div><div class='add'>+      - patternProperties:</div><div class='add'>+          "-pins$":</div><div class='add'>+            $ref: "#/$defs/qcom-sm8550-tlmm-state"</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  qcom-sm8550-tlmm-state:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Pinctrl node's client devices use subnodes for desired pin configuration.</div><div class='add'>+      Client device subnodes use below standard properties.</div><div class='add'>+    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      pins:</div><div class='add'>+        description:</div><div class='add'>+          List of gpio pins affected by the properties specified in this</div><div class='add'>+          subnode.</div><div class='add'>+        items:</div><div class='add'>+          oneOf:</div><div class='add'>+            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-9])$"</div><div class='add'>+            - enum: [ ufs_reset, sdc2_clk, sdc2_cmd, sdc2_data ]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 36</div><div class='add'>+</div><div class='add'>+      function:</div><div class='add'>+        description:</div><div class='add'>+          Specify the alternative function to be configured for the specified</div><div class='add'>+          pins.</div><div class='add'>+        enum: [ aon_cci, aoss_cti, atest_char, atest_usb,</div><div class='add'>+                audio_ext_mclk0, audio_ext_mclk1, audio_ref_clk,</div><div class='add'>+                cam_aon_mclk4, cam_mclk, cci_async_in, cci_i2c_scl,</div><div class='add'>+                cci_i2c_sda, cci_timer, cmu_rng, coex_uart1_rx,</div><div class='add'>+                coex_uart1_tx, coex_uart2_rx, coex_uart2_tx,</div><div class='add'>+                cri_trng, dbg_out_clk, ddr_bist_complete,</div><div class='add'>+                ddr_bist_fail, ddr_bist_start, ddr_bist_stop,</div><div class='add'>+                ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3, dp_hot,</div><div class='add'>+                gcc_gp1, gcc_gp2, gcc_gp3, gpio, i2chub0_se0,</div><div class='add'>+                i2chub0_se1, i2chub0_se2, i2chub0_se3, i2chub0_se4,</div><div class='add'>+                i2chub0_se5, i2chub0_se6, i2chub0_se7, i2chub0_se8,</div><div class='add'>+                i2chub0_se9, i2s0_data0, i2s0_data1, i2s0_sck,</div><div class='add'>+                i2s0_ws, i2s1_data0, i2s1_data1, i2s1_sck, i2s1_ws,</div><div class='add'>+                ibi_i3c, jitter_bist, mdp_vsync, mdp_vsync0_out,</div><div class='add'>+                mdp_vsync1_out, mdp_vsync2_out, mdp_vsync3_out,</div><div class='add'>+                mdp_vsync_e, nav_gpio0, nav_gpio1, nav_gpio2,</div><div class='add'>+                pcie0_clk_req_n, pcie1_clk_req_n, phase_flag,</div><div class='add'>+                pll_bist_sync, pll_clk_aux, prng_rosc0, prng_rosc1,</div><div class='add'>+                prng_rosc2, prng_rosc3, qdss_cti, qdss_gpio,</div><div class='add'>+                qlink0_enable, qlink0_request, qlink0_wmss,</div><div class='add'>+                qlink1_enable, qlink1_request, qlink1_wmss,</div><div class='add'>+                qlink2_enable, qlink2_request, qlink2_wmss,</div><div class='add'>+                qspi0, qspi1, qspi2, qspi3, qspi_clk, qspi_cs,</div><div class='add'>+                qup1_se0, qup1_se1, qup1_se2, qup1_se3, qup1_se4,</div><div class='add'>+                qup1_se5, qup1_se6, qup1_se7, qup2_se0,</div><div class='add'>+                qup2_se0_l0_mira, qup2_se0_l0_mirb, qup2_se0_l1_mira,</div><div class='add'>+                qup2_se0_l1_mirb, qup2_se0_l2_mira, qup2_se0_l2_mirb,</div><div class='add'>+                qup2_se0_l3_mira, qup2_se0_l3_mirb, qup2_se1,</div><div class='add'>+                qup2_se2, qup2_se3, qup2_se4, qup2_se5, qup2_se6,</div><div class='add'>+                qup2_se7, sd_write_protect, sdc40, sdc41, sdc42,</div><div class='add'>+                sdc43, sdc4_clk, sdc4_cmd, tb_trig_sdc2, tb_trig_sdc4,</div><div class='add'>+                tgu_ch0_trigout, tgu_ch1_trigout, tgu_ch2_trigout,</div><div class='add'>+                tgu_ch3_trigout, tmess_prng0, tmess_prng1, tmess_prng2,</div><div class='add'>+                tmess_prng3, tsense_pwm1, tsense_pwm2, tsense_pwm3,</div><div class='add'>+                uim0_clk, uim0_data, uim0_present, uim0_reset,</div><div class='add'>+                uim1_clk, uim1_data, uim1_present, uim1_reset,</div><div class='add'>+                usb1_hs, usb_phy, vfr_0, vfr_1, vsense_trigger_mirnat ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    tlmm: pinctrl@f100000 {</div><div class='add'>+        compatible = "qcom,sm8550-tlmm";</div><div class='add'>+        reg = &lt;0x0f100000 0x300000&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+        gpio-ranges = &lt;&amp;tlmm 0 0 211&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        gpio-wo-state {</div><div class='add'>+            pins = "gpio1";</div><div class='add'>+            function = "gpio";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        uart-w-state {</div><div class='add'>+            rx-pins {</div><div class='add'>+                pins = "gpio26";</div><div class='add'>+                function = "qup2_se7";</div><div class='add'>+                bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            tx-pins {</div><div class='add'>+                pins = "gpio27";</div><div class='add'>+                function = "qup2_se7";</div><div class='add'>+                bias-disable;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml<br/>index 780f15bb5e40..aae3dcf6cac8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/qcom,tlmm-common.yaml</a></div><div class='hunk'>@@ -16,8 +16,9 @@ description:</div><div class='ctx'> properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     description:</div><div class='del'>-      Specifies the TLMM summary IRQ</div><div class='del'>-    maxItems: 1</div><div class='add'>+      TLMM summary IRQ and dirconn interrupts.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='ctx'> </div><div class='ctx'>   interrupt-controller: true</div><div class='ctx'> </div><div class='hunk'>@@ -42,7 +43,6 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Specifying the interrupt-controller used to wake up the system when the</div><div class='ctx'>       TLMM block has been powered down.</div><div class='del'>-    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   gpio-reserved-ranges:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -52,7 +52,7 @@ properties:</div><div class='ctx'>       information.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - interrupts</div><div class='hunk'>@@ -66,10 +66,6 @@ additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='ctx'>   qcom-tlmm-state:</div><div class='del'>-    allOf:</div><div class='del'>-      - $ref: pincfg-node.yaml#</div><div class='del'>-      - $ref: pinmux-node.yaml#</div><div class='del'>-</div><div class='ctx'>     properties:</div><div class='ctx'>       drive-strength:</div><div class='ctx'>         enum: [2, 4, 6, 8, 10, 12, 14, 16]</div><div class='hunk'>@@ -79,9 +75,27 @@ $defs:</div><div class='ctx'>       bias-pull-down: true</div><div class='ctx'>       bias-pull-up: true</div><div class='ctx'>       bias-disable: true</div><div class='del'>-      input-enable: true</div><div class='add'>+      input-enable: false</div><div class='add'>+      output-disable: true</div><div class='add'>+      output-enable: true</div><div class='ctx'>       output-high: true</div><div class='ctx'>       output-low: true</div><div class='ctx'> </div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: pincfg-node.yaml#</div><div class='add'>+      - $ref: pinmux-node.yaml#</div><div class='add'>+</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              items:</div><div class='add'>+                pattern: "^gpio"</div><div class='add'>+        then:</div><div class='add'>+          required:</div><div class='add'>+            - function</div><div class='add'>+        else:</div><div class='add'>+          properties:</div><div class='add'>+            function: false</div><div class='add'>+</div><div class='ctx'>     additionalProperties: true</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..43b33dbf115b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/ralink,rt2880-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ralink RT2880 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Ralink RT2880 pin controller for RT2880 SoC.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,rt2880-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [gpio, i2c, spi, uartlite, jtag, mdio, sdram, pci]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c, spi, uartlite, jtag, mdio, sdram, pci]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartlite</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [jtag]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: mdio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [mdio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sdram</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [sdram]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pci</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pci]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,rt2880-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml<br/>deleted file mode 100644<br/>index 9de8b0c075e2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/ralink,rt2880-pinmux.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,68 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/pinctrl/ralink,rt2880-pinmux.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Ralink rt2880 pinmux controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  The rt2880 pinmux can only set the muxing of pin groups. Muxing indiviual pins</div><div class='del'>-  is not supported. There is no pinconf support.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: ralink,rt2880-pinmux</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  '-pins$':</div><div class='del'>-    type: object</div><div class='del'>-    patternProperties:</div><div class='del'>-      '^(.*-)?pinmux$':</div><div class='del'>-        type: object</div><div class='del'>-        description: node for pinctrl.</div><div class='del'>-        $ref: pinmux-node.yaml#</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-          groups:</div><div class='del'>-            description: Name of the pin group to use for the functions.</div><div class='del'>-            enum: [i2c, jtag, mdio, pcie, rgmii1, rgmii2, sdhci, spi,</div><div class='del'>-                   uart1, uart2, uart3, wdt]</div><div class='del'>-          function:</div><div class='del'>-            description: The mux function to select</div><div class='del'>-            enum: [gpio, i2c, i2s, jtag, mdio, nand1, nand2, pcie refclk,</div><div class='del'>-                   pcie rst, pcm, rgmii1, rgmii2, sdhci, spdif2, spdif3,</div><div class='del'>-                   spi, uart1, uart2, uart3, wdt refclk, wdt rst]</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - groups</div><div class='del'>-          - function</div><div class='del'>-</div><div class='del'>-        additionalProperties: false</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  # Pinmux controller node</div><div class='del'>-  - |</div><div class='del'>-    pinctrl {</div><div class='del'>-      compatible = "ralink,rt2880-pinmux";</div><div class='del'>-</div><div class='del'>-      i2c_pins: i2c0-pins {</div><div class='del'>-        pinmux {</div><div class='del'>-          groups = "i2c";</div><div class='del'>-          function = "i2c";</div><div class='del'>-        };</div><div class='del'>-      };</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..95a904273009<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,206 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/ralink,rt305x-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ralink RT305X Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Ralink RT305X pin controller for RT3050, RT3052, and RT3350 SoCs.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,rt305x-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio,</div><div class='add'>+                   pcm gpio, pcm i2s, pcm uartf, rgmii, sdram, spi, uartf,</div><div class='add'>+                   uartlite]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2s uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [jtag]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: mdio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [mdio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: rgmii</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [rgmii]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: sdram</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [sdram]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartlite</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartlite]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,rt305x-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..c9bc6cfd834c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/ralink,rt3352-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,243 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/ralink,rt3352-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ralink RT3352 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Ralink RT3352 pin controller for RT3352 SoC.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,rt3352-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, lna,</div><div class='add'>+                   mdio, pa, pcm gpio, pcm i2s, pcm uartf, rgmii, spi, spi_cs1,</div><div class='add'>+                   uartf, uartlite, wdg_cs1]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1,</div><div class='add'>+                         uartf, uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2s uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [jtag]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: led</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [led]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: lna</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [lna]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: mdio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [mdio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pa</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pa]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: rgmii</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [rgmii]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi_cs1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi_cs1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartlite</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wdg_cs1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi_cs1]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,rt3352-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..8d14e525b25e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/ralink,rt3883-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,261 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/ralink,rt3883-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ralink RT3883 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Ralink RT3883 pin controller for RT3883 SoC.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,rt3883-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [ge1, ge2, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag,</div><div class='add'>+                   lna a, lna g, mdio, pci-dev, pci-fnc, pci-host1, pci-host2,</div><div class='add'>+                   pcm gpio, pcm i2s, pcm uartf, spi, uartf, uartlite]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: ge1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [ge1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: ge2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [ge2]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [ge1, ge2, i2c, jtag, lna a, lna g, mdio, pci, spi,</div><div class='add'>+                         uartf, uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2s uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [jtag]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: lna a</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [lna a]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: lna g</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [lna g]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: mdio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [mdio]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pci-dev</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pci]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pci-fnc</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pci]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pci-host1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pci]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pci-host2</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [pci]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartlite</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartlite]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,rt3883-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..f248202ce866<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/ralink,rt5350-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,206 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/ralink,rt5350-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ralink RT5350 Pin Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arınç ÜNAL &lt;arinc.unal@arinc9.com&gt;</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Ralink RT5350 pin controller for RT5350 SoC.</div><div class='add'>+  The pin controller can only set the muxing of pin groups. Muxing individual</div><div class='add'>+  pins is not supported. There is no pinconf support.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,rt5350-pinctrl</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-pins$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^(.*-)?pinmux$':</div><div class='add'>+        type: object</div><div class='add'>+        description: node for pinctrl.</div><div class='add'>+        $ref: pinmux-node.yaml#</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          function:</div><div class='add'>+            description:</div><div class='add'>+              A string containing the name of the function to mux to the group.</div><div class='add'>+            enum: [gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led,</div><div class='add'>+                   pcm gpio, pcm i2s, pcm uartf, spi, spi_cs1, uartf, uartlite,</div><div class='add'>+                   wdg_cs1]</div><div class='add'>+</div><div class='add'>+          groups:</div><div class='add'>+            description:</div><div class='add'>+              An array of strings. Each string contains the name of a group.</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - groups</div><div class='add'>+          - function</div><div class='add'>+</div><div class='add'>+        allOf:</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c, jtag, led, spi, spi_cs1, uartf, uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: gpio uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2c</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [i2c]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: i2s uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: jtag</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [jtag]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: led</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [led]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm gpio</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm i2s</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: pcm uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: spi_cs1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi_cs1]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartf</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartf]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: uartlite</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [uartlite]</div><div class='add'>+</div><div class='add'>+          - if:</div><div class='add'>+              properties:</div><div class='add'>+                function:</div><div class='add'>+                  const: wdg_cs1</div><div class='add'>+            then:</div><div class='add'>+              properties:</div><div class='add'>+                groups:</div><div class='add'>+                  enum: [spi_cs1]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl {</div><div class='add'>+      compatible = "ralink,rt5350-pinctrl";</div><div class='add'>+</div><div class='add'>+      i2c_pins: i2c0-pins {</div><div class='add'>+        pinmux {</div><div class='add'>+          groups = "i2c";</div><div class='add'>+          function = "i2c";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml<br/>index 2a57df75d832..0fc3c0f52c19 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml</a></div><div class='hunk'>@@ -45,6 +45,7 @@ properties:</div><div class='ctx'>       - renesas,pfc-r8a77995    # R-Car D3</div><div class='ctx'>       - renesas,pfc-r8a779a0    # R-Car V3U</div><div class='ctx'>       - renesas,pfc-r8a779f0    # R-Car S4-8</div><div class='add'>+      - renesas,pfc-r8a779g0    # R-Car V4H</div><div class='ctx'>       - renesas,pfc-sh73a0      # SH-Mobile AG5</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -72,7 +73,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml<br/>index 8ed4b98a1628..83800fcf0ce4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml</a></div><div class='hunk'>@@ -32,7 +32,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -41,6 +41,7 @@ required:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^gpio-[0-9]*$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     description:</div><div class='ctx'>       Each port of the r7s72100 pin controller hardware is itself a GPIO</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml<br/>index d761fddc2206..37173a64fed2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml</a></div><div class='hunk'>@@ -73,7 +73,7 @@ patternProperties:</div><div class='ctx'>       additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml<br/>index 9ccf54870aa4..9ce1a07fc015 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml</a></div><div class='hunk'>@@ -11,8 +11,8 @@ maintainers:</div><div class='ctx'>   - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  The Renesas SoCs of the RZ/{G2L,V2L} series feature a combined Pin and GPIO</div><div class='del'>-  controller.</div><div class='add'>+  The Renesas SoCs of the RZ/{G2L,V2L} alike series feature a combined Pin and</div><div class='add'>+  GPIO controller.</div><div class='ctx'>   Pin multiplexing and GPIO configuration is performed on a per-pin basis.</div><div class='ctx'>   Each port features up to 8 pins, each of them configurable for GPIO function</div><div class='ctx'>   (port mode) or in alternate function mode.</div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five</div><div class='ctx'>               - renesas,r9a07g044-pinctrl # RZ/G2{L,LC}</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='hunk'>@@ -46,6 +47,17 @@ properties:</div><div class='ctx'>   gpio-ranges:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+    description:</div><div class='add'>+      The first cell contains the global GPIO port index, constructed using the</div><div class='add'>+      RZG2L_GPIO() helper macro in &lt;dt-bindings/pinctrl/rzg2l-pinctrl.h&gt; and the</div><div class='add'>+      second cell is used to specify the flag.</div><div class='add'>+      E.g. "interrupts = &lt;RZG2L_GPIO(43, 0) IRQ_TYPE_EDGE_FALLING&gt;;" if P43_0 is</div><div class='add'>+      being used as an interrupt.</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -101,7 +113,7 @@ additionalProperties:</div><div class='ctx'>         $ref: "#/additionalProperties/anyOf/0"</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -109,6 +121,8 @@ required:</div><div class='ctx'>   - gpio-controller</div><div class='ctx'>   - '#gpio-cells'</div><div class='ctx'>   - gpio-ranges</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='ctx'>   - clocks</div><div class='ctx'>   - power-domains</div><div class='ctx'>   - resets</div><div class='hunk'>@@ -125,6 +139,8 @@ examples:</div><div class='ctx'>             gpio-controller;</div><div class='ctx'>             #gpio-cells = &lt;2&gt;;</div><div class='ctx'>             gpio-ranges = &lt;&amp;pinctrl 0 0 392&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='ctx'>             clocks = &lt;&amp;cpg CPG_MOD R9A07G044_GPIO_HCLK&gt;;</div><div class='ctx'>             resets = &lt;&amp;cpg R9A07G044_GPIO_RSTN&gt;,</div><div class='ctx'>                      &lt;&amp;cpg R9A07G044_GPIO_PORT_RESETN&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml<br/>new file mode 100644<br/>index 000000000000..ab2d456c93e4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-poeg.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-poeg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/G2L Port Output Enable for GPT (POEG)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The output pins(GTIOCxA and GTIOCxB) of the general PWM timer (GPT) can be</div><div class='add'>+  disabled by using the port output enabling function for the GPT (POEG).</div><div class='add'>+  Specifically, either of the following ways can be used.</div><div class='add'>+  * Input level detection of the GTETRGA to GTETRGD pins.</div><div class='add'>+  * Output-disable request from the GPT.</div><div class='add'>+  * SSF bit setting(ie, by setting POEGGn.SSF to 1)</div><div class='add'>+</div><div class='add'>+  The state of the GTIOCxA and the GTIOCxB pins when the output is disabled,</div><div class='add'>+  are controlled by the GPT module.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-poeg  # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-poeg  # RZ/V2L</div><div class='add'>+      - const: renesas,rzg2l-poeg</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  renesas,gpt:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to gpt instance that serves the pwm operation.</div><div class='add'>+</div><div class='add'>+  renesas,poeg-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1, 2, 3 ]</div><div class='add'>+    description: |</div><div class='add'>+      POEG group index. Valid values are:</div><div class='add'>+        &lt;0&gt; : POEG group A</div><div class='add'>+        &lt;1&gt; : POEG group B</div><div class='add'>+        &lt;2&gt; : POEG group C</div><div class='add'>+        &lt;3&gt; : POEG group D</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - renesas,poeg-id</div><div class='add'>+  - renesas,gpt</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a07g044-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    poeggd: poeg@10049400 {</div><div class='add'>+        compatible = "renesas,r9a07g044-poeg", "renesas,rzg2l-poeg";</div><div class='add'>+        reg = &lt;0x10049400 0x400&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A07G044_POEG_D_CLKP&gt;;</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg R9A07G044_POEG_D_RST&gt;;</div><div class='add'>+        renesas,poeg-id = &lt;3&gt;;</div><div class='add'>+        renesas,gpt = &lt;&amp;gpt&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml<br/>index 70b1788ab594..19d4d2facfb4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Renesas RZ/N1 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Gareth Williams &lt;gareth.williams.jx@renesas.com&gt;</div><div class='add'>+  - Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -32,7 +32,7 @@ properties:</div><div class='ctx'>       The bus clock, sometimes described as pclk, for register accesses.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..c87161f2954f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/renesas,rzv2m-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,170 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/renesas,rzv2m-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/V2M combined Pin and GPIO controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</div><div class='add'>+  - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Renesas RZ/V2M SoC features a combined Pin and GPIO controller.</div><div class='add'>+  Pin multiplexing and GPIO configuration is performed on a per-pin basis.</div><div class='add'>+  Each port features up to 16 pins, each of them configurable for GPIO function</div><div class='add'>+  (port mode) or in alternate function mode.</div><div class='add'>+  Up to 8 different alternate function modes exist for each single pin.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,r9a09g011-pinctrl # RZ/V2M</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+    description:</div><div class='add'>+      The first cell contains the global GPIO port index, constructed using the</div><div class='add'>+      RZV2M_GPIO() helper macro in &lt;dt-bindings/pinctrl/rzv2m-pinctrl.h&gt; and the</div><div class='add'>+      second cell represents consumer flag as mentioned in ../gpio/gpio.txt</div><div class='add'>+      E.g. "RZV2M_GPIO(8, 1)" for P8_1.</div><div class='add'>+</div><div class='add'>+  gpio-ranges:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: INEXINT[0..38] corresponding to individual pin inputs.</div><div class='add'>+    maxItems: 39</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+additionalProperties:</div><div class='add'>+  anyOf:</div><div class='add'>+    - type: object</div><div class='add'>+      allOf:</div><div class='add'>+        - $ref: pincfg-node.yaml#</div><div class='add'>+        - $ref: pinmux-node.yaml#</div><div class='add'>+</div><div class='add'>+      description:</div><div class='add'>+        Pin controller client devices use pin configuration subnodes (children</div><div class='add'>+        and grandchildren) for desired pin configuration.</div><div class='add'>+        Client device subnodes use below standard properties.</div><div class='add'>+</div><div class='add'>+      properties:</div><div class='add'>+        phandle: true</div><div class='add'>+        pinmux:</div><div class='add'>+          description:</div><div class='add'>+            Values are constructed from GPIO port number, pin number, and</div><div class='add'>+            alternate function configuration number using the RZV2M_PORT_PINMUX()</div><div class='add'>+            helper macro in &lt;dt-bindings/pinctrl/rzv2m-pinctrl.h&gt;.</div><div class='add'>+        pins: true</div><div class='add'>+        bias-disable: true</div><div class='add'>+        bias-pull-down: true</div><div class='add'>+        bias-pull-up: true</div><div class='add'>+        drive-strength-microamp:</div><div class='add'>+          # Superset of supported values</div><div class='add'>+          enum: [ 1600, 1800, 2000, 3200, 3800, 4000, 6400, 7800, 8000,</div><div class='add'>+                  9000, 9600, 11000, 12000, 13000, 18000 ]</div><div class='add'>+        slew-rate:</div><div class='add'>+          description: 0 is slow slew rate, 1 is fast slew rate</div><div class='add'>+          enum: [ 0, 1 ]</div><div class='add'>+        gpio-hog: true</div><div class='add'>+        gpios: true</div><div class='add'>+        output-high: true</div><div class='add'>+        output-low: true</div><div class='add'>+        line-name: true</div><div class='add'>+</div><div class='add'>+    - type: object</div><div class='add'>+      properties:</div><div class='add'>+        phandle: true</div><div class='add'>+</div><div class='add'>+      additionalProperties:</div><div class='add'>+        $ref: "#/additionalProperties/anyOf/0"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-ranges</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/rzv2m-pinctrl.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a09g011-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pinctrl: pinctrl@b6250000 {</div><div class='add'>+            compatible = "renesas,r9a09g011-pinctrl";</div><div class='add'>+            reg = &lt;0xb6250000 0x800&gt;;</div><div class='add'>+</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            gpio-ranges = &lt;&amp;pinctrl 0 0 352&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                         &lt;GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;cpg CPG_MOD R9A09G011_PFC_PCLK&gt;;</div><div class='add'>+            resets = &lt;&amp;cpg R9A09G011_PFC_PRESETN&gt;;</div><div class='add'>+            power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+</div><div class='add'>+            i2c2_pins: i2c2 {</div><div class='add'>+                    pinmux = &lt;RZV2M_PORT_PINMUX(3, 8, 2)&gt;, /* SDA */</div><div class='add'>+                             &lt;RZV2M_PORT_PINMUX(3, 9, 2)&gt;; /* SCL */</div><div class='add'>+            };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml<br/>index b0eae3a67ab1..10c335efe619 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml</a></div><div class='hunk'>@@ -33,6 +33,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - rockchip,px30-pinctrl</div><div class='ctx'>       - rockchip,rk2928-pinctrl</div><div class='add'>+      - rockchip,rk3036-pinctrl</div><div class='ctx'>       - rockchip,rk3066a-pinctrl</div><div class='ctx'>       - rockchip,rk3066b-pinctrl</div><div class='ctx'>       - rockchip,rk3128-pinctrl</div><div class='hunk'>@@ -44,15 +45,17 @@ properties:</div><div class='ctx'>       - rockchip,rk3368-pinctrl</div><div class='ctx'>       - rockchip,rk3399-pinctrl</div><div class='ctx'>       - rockchip,rk3568-pinctrl</div><div class='add'>+      - rockchip,rk3588-pinctrl</div><div class='ctx'>       - rockchip,rv1108-pinctrl</div><div class='add'>+      - rockchip,rv1126-pinctrl</div><div class='ctx'> </div><div class='ctx'>   rockchip,grf:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='ctx'>       The phandle of the syscon node for the GRF registers.</div><div class='ctx'> </div><div class='ctx'>   rockchip,pmu:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='ctx'>       The phandle of the syscon node for the PMU registers,</div><div class='ctx'>       as some SoCs carry parts of the iomux controller registers there.</div><div class='hunk'>@@ -68,20 +71,18 @@ properties:</div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - rockchip,grf</div><div class='del'>-  - "#address-cells"</div><div class='del'>-  - "#size-cells"</div><div class='del'>-  - ranges</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "gpio@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='del'>-    $ref: "/schemas/gpio/rockchip,gpio-bank.yaml#"</div><div class='add'>+    $ref: /schemas/gpio/rockchip,gpio-bank.yaml#</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -116,7 +117,7 @@ additionalProperties:</div><div class='ctx'>     type: object</div><div class='ctx'>     properties:</div><div class='ctx'>       rockchip,pins:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32-matrix"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         items:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -129,7 +130,7 @@ additionalProperties:</div><div class='ctx'>               description:</div><div class='ctx'>                 Pin bank index.</div><div class='ctx'>             - minimum: 0</div><div class='del'>-              maximum: 6</div><div class='add'>+              maximum: 13</div><div class='ctx'>               description:</div><div class='ctx'>                 Mux 0 means GPIO and mux 1 to N means</div><div class='ctx'>                 the specific device function.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml<br/>index f73348c54748..8cf3c47ab86b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml<br/>index c71939ac8b63..f796f27bf0e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -20,7 +20,6 @@ description: |</div><div class='ctx'>   The values used for config properties should be derived from the hardware</div><div class='ctx'>   manual and these values are programmed as-is into the pin pull up/down and</div><div class='ctx'>   driver strength register of the pin-controller.</div><div class='del'>-  See also include/dt-bindings/pinctrl/samsung.h with useful constants.</div><div class='ctx'> </div><div class='ctx'>   See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for</div><div class='ctx'>   additional information and example.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml<br/>index a822f70f5702..1de91a51234d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S3C/S5P/Exynos SoC pin controller - wake-up interrupt controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml<br/>index 989e48c051cf..26614621774a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S3C/S5P/Exynos SoC pin controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'>   - Tomasz Figa &lt;tomasz.figa@gmail.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -15,9 +15,6 @@ description: |</div><div class='ctx'>   This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin</div><div class='ctx'>   controller.</div><div class='ctx'> </div><div class='del'>-  Pin group settings (like drive strength, pull up/down) are available as</div><div class='del'>-  macros in include/dt-bindings/pinctrl/samsung.h.</div><div class='del'>-</div><div class='ctx'>   All the pin controller nodes should be represented in the aliases node using</div><div class='ctx'>   the following format 'pinctrl{n}' where n is a unique number for the alias.</div><div class='ctx'> </div><div class='hunk'>@@ -97,6 +94,9 @@ patternProperties:</div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>   "^(initial|sleep)-state$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^(pin-[a-z0-9-]+|[a-z0-9-]+-pin)$":</div><div class='ctx'>         $ref: samsung,pinctrl-pins-cfg.yaml</div><div class='hunk'>@@ -117,7 +117,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -138,8 +138,6 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/samsung.h&gt;</div><div class='del'>-</div><div class='ctx'>     pinctrl@7f008000 {</div><div class='ctx'>         compatible = "samsung,s3c64xx-pinctrl";</div><div class='ctx'>         reg = &lt;0x7f008000 0x1000&gt;;</div><div class='hunk'>@@ -166,8 +164,8 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         uart0-data-pins {</div><div class='ctx'>             samsung,pins = "gpa-0", "gpa-1";</div><div class='del'>-            samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='del'>-            samsung,pin-pud = &lt;S3C64XX_PIN_PULL_NONE&gt;;</div><div class='add'>+            samsung,pin-function = &lt;2&gt;;</div><div class='add'>+            samsung,pin-pud = &lt;0&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         // ...</div><div class='hunk'>@@ -175,7 +173,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/samsung.h&gt;</div><div class='ctx'> </div><div class='ctx'>     pinctrl@11400000 {</div><div class='ctx'>         compatible = "samsung,exynos4210-pinctrl";</div><div class='hunk'>@@ -197,9 +194,9 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         uart0-data-pins {</div><div class='ctx'>             samsung,pins = "gpa0-0", "gpa0-1";</div><div class='del'>-            samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='del'>-            samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='del'>-            samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV1&gt;;</div><div class='add'>+            samsung,pin-function = &lt;2&gt;;</div><div class='add'>+            samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+            samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         // ...</div><div class='hunk'>@@ -207,14 +204,14 @@ examples:</div><div class='ctx'>         sleep0: sleep-state {</div><div class='ctx'>             gpa0-0-pin {</div><div class='ctx'>                 samsung,pins = "gpa0-0";</div><div class='del'>-                samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_INPUT&gt;;</div><div class='del'>-                samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+                samsung,pin-con-pdn = &lt;2&gt;;</div><div class='add'>+                samsung,pin-pud-pdn = &lt;0&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             gpa0-1-pin {</div><div class='ctx'>                 samsung,pins = "gpa0-1";</div><div class='del'>-                samsung,pin-con-pdn = &lt;EXYNOS_PIN_PDN_OUT0&gt;;</div><div class='del'>-                samsung,pin-pud-pdn = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='add'>+                samsung,pin-con-pdn = &lt;0&gt;;</div><div class='add'>+                samsung,pin-pud-pdn = &lt;0&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             // ...</div><div class='hunk'>@@ -223,7 +220,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/samsung.h&gt;</div><div class='ctx'> </div><div class='ctx'>     pinctrl@11000000 {</div><div class='ctx'>         compatible = "samsung,exynos4210-pinctrl";</div><div class='hunk'>@@ -272,26 +268,26 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         sd0-clk-pins {</div><div class='ctx'>             samsung,pins = "gpk0-0";</div><div class='del'>-            samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='del'>-            samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='del'>-            samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV4&gt;;</div><div class='add'>+            samsung,pin-function = &lt;2&gt;;</div><div class='add'>+            samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+            samsung,pin-drv = &lt;3&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         sd4-bus-width8-pins {</div><div class='ctx'>             part-1-pins {</div><div class='ctx'>                 samsung,pins = "gpk0-3", "gpk0-4",</div><div class='ctx'>                                "gpk0-5", "gpk0-6";</div><div class='del'>-                samsung,pin-function = &lt;EXYNOS_PIN_FUNC_3&gt;;</div><div class='del'>-                samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='del'>-                samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV4&gt;;</div><div class='add'>+                samsung,pin-function = &lt;3&gt;;</div><div class='add'>+                samsung,pin-pud = &lt;3&gt;;</div><div class='add'>+                samsung,pin-drv = &lt;3&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             part-2-pins {</div><div class='ctx'>                 samsung,pins = "gpk1-3", "gpk1-4",</div><div class='ctx'>                                "gpk1-5", "gpk1-6";</div><div class='del'>-                samsung,pin-function = &lt;EXYNOS_PIN_FUNC_4&gt;;</div><div class='del'>-                samsung,pin-pud = &lt;EXYNOS_PIN_PULL_UP&gt;;</div><div class='del'>-                samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV4&gt;;</div><div class='add'>+                samsung,pin-function = &lt;4&gt;;</div><div class='add'>+                samsung,pin-pud = &lt;3&gt;;</div><div class='add'>+                samsung,pin-drv = &lt;3&gt;;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='hunk'>@@ -299,16 +295,15 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         otg-gp-pins {</div><div class='ctx'>             samsung,pins = "gpx3-3";</div><div class='del'>-            samsung,pin-function = &lt;EXYNOS_PIN_FUNC_OUTPUT&gt;;</div><div class='del'>-            samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='del'>-            samsung,pin-drv = &lt;EXYNOS4_PIN_DRV_LV1&gt;;</div><div class='add'>+            samsung,pin-function = &lt;1&gt;;</div><div class='add'>+            samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+            samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'>             samsung,pin-val = &lt;0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/samsung.h&gt;</div><div class='ctx'> </div><div class='ctx'>     pinctrl@10580000 {</div><div class='ctx'>         compatible = "samsung,exynos5433-pinctrl";</div><div class='hunk'>@@ -352,9 +347,9 @@ examples:</div><div class='ctx'>         initial_alive: initial-state {</div><div class='ctx'>             gpa0-0-pin {</div><div class='ctx'>                 samsung,pins = "gpa0-0";</div><div class='del'>-                samsung,pin-function = &lt;EXYNOS_PIN_FUNC_INPUT&gt;;</div><div class='del'>-                samsung,pin-pud = &lt;EXYNOS_PIN_PULL_DOWN&gt;;</div><div class='del'>-                samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+                samsung,pin-function = &lt;0&gt;;</div><div class='add'>+                samsung,pin-pud = &lt;1&gt;;</div><div class='add'>+                samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>             // ...</div><div class='hunk'>@@ -363,7 +358,6 @@ examples:</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/samsung.h&gt;</div><div class='ctx'> </div><div class='ctx'>     pinctrl@114b0000 {</div><div class='ctx'>         compatible = "samsung,exynos5433-pinctrl";</div><div class='hunk'>@@ -384,9 +378,9 @@ examples:</div><div class='ctx'>         i2s0-bus-pins {</div><div class='ctx'>             samsung,pins = "gpz0-0", "gpz0-1", "gpz0-2", "gpz0-3",</div><div class='ctx'>                            "gpz0-4", "gpz0-5", "gpz0-6";</div><div class='del'>-            samsung,pin-function = &lt;EXYNOS_PIN_FUNC_2&gt;;</div><div class='del'>-            samsung,pin-pud = &lt;EXYNOS_PIN_PULL_NONE&gt;;</div><div class='del'>-            samsung,pin-drv = &lt;EXYNOS5433_PIN_DRV_FAST_SR1&gt;;</div><div class='add'>+            samsung,pin-function = &lt;2&gt;;</div><div class='add'>+            samsung,pin-pud = &lt;0&gt;;</div><div class='add'>+            samsung,pin-drv = &lt;0&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         // ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml b/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml<br/>new file mode 100644<br/>index 000000000000..4214d7311f6b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/semtech,sx1501q.yaml</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Linaro Ltd.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/semtech,sx1501q.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Semtech SX150x GPIO expander</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - semtech,sx1501q</div><div class='add'>+      - semtech,sx1502q</div><div class='add'>+      - semtech,sx1503q</div><div class='add'>+      - semtech,sx1504q</div><div class='add'>+      - semtech,sx1505q</div><div class='add'>+      - semtech,sx1506q</div><div class='add'>+      - semtech,sx1507q</div><div class='add'>+      - semtech,sx1508q</div><div class='add'>+      - semtech,sx1509q</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  semtech,probe-reset:</div><div class='add'>+    description: Will trigger a reset of the GPIO expander on probe</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-cfg$':</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      pins: true</div><div class='add'>+</div><div class='add'>+      bias-disable: true</div><div class='add'>+      bias-pull-up: true</div><div class='add'>+      bias-pull-down: true</div><div class='add'>+      bias-pull-pin-default: true</div><div class='add'>+      drive-push-pull: true</div><div class='add'>+      output-low: true</div><div class='add'>+      output-high: true</div><div class='add'>+      drive-open-drain: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - pins</div><div class='add'>+</div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: pincfg-node.yaml#</div><div class='add'>+      - $ref: pinmux-node.yaml#</div><div class='add'>+      - if:</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              contains:</div><div class='add'>+                const: oscio</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            bias-disable: false</div><div class='add'>+            bias-pull-up: false</div><div class='add'>+            bias-pull-down: false</div><div class='add'>+            bias-pull-pin-default: false</div><div class='add'>+            drive-open-drain: false</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - semtech,sx1507q</div><div class='add'>+                - semtech,sx1508q</div><div class='add'>+                - semtech,sx1509q</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        semtech,probe-reset: false</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - semtech,sx1501q</div><div class='add'>+              - semtech,sx1504q</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '-cfg$':</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              items:</div><div class='add'>+                pattern: '^gpio[0-3]$'</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - semtech,sx1502q</div><div class='add'>+              - semtech,sx1505q</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '-cfg$':</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              items:</div><div class='add'>+                pattern: '^gpio[0-7]$'</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - semtech,sx1503q</div><div class='add'>+              - semtech,sx1506q</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '-cfg$':</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              items:</div><div class='add'>+                pattern: '^(gpio[0-9]|gpio1[0-5])$'</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: semtech,sx1507q</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '-cfg$':</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              items:</div><div class='add'>+                pattern: '^(oscio|gpio[0-3])$'</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: semtech,sx1508q</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '-cfg$':</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              items:</div><div class='add'>+                pattern: '^(oscio|gpio[0-7])$'</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: semtech,sx1509q</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        '-cfg$':</div><div class='add'>+          properties:</div><div class='add'>+            pins:</div><div class='add'>+              items:</div><div class='add'>+                pattern: '^(oscio|gpio[0-9]|gpio1[0-5])$'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c@1000 {</div><div class='add'>+        reg = &lt;0x1000 0x80&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl@20 {</div><div class='add'>+            compatible = "semtech,sx1501q";</div><div class='add'>+            reg = &lt;0x20&gt;;</div><div class='add'>+</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            interrupts = &lt;16 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+            gpio-controller;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+</div><div class='add'>+            gpio1-cfg {</div><div class='add'>+                  pins = "gpio1";</div><div class='add'>+                  bias-pull-up;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml<br/>index 14a8c0215cc6..a6f34df82e90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/socionext,uniphier-pinctrl.yaml#</div><div class='hunk'>@@ -60,7 +61,7 @@ additionalProperties:</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -69,11 +70,17 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     // The UniPhier pinctrl should be a subnode of a "syscon" compatible node.</div><div class='ctx'> </div><div class='del'>-    soc-glue@5f800000 {</div><div class='del'>-        compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x5f800000 0x2000&gt;;</div><div class='add'>+    pinctrl {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-pinctrl";</div><div class='add'>+</div><div class='add'>+        pinctrl_ether_rgmii: ether-rgmii {</div><div class='add'>+            groups = "ether_rgmii";</div><div class='add'>+            function = "ether_rgmii";</div><div class='ctx'> </div><div class='del'>-        pinctrl: pinctrl {</div><div class='del'>-            compatible = "socionext,uniphier-pro4-pinctrl";</div><div class='add'>+            tx {</div><div class='add'>+                pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1",</div><div class='add'>+                       "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL";</div><div class='add'>+                drive-strength = &lt;9&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml<br/>index 335ffc1353b5..1ab0f8dde477 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml</a></div><div class='hunk'>@@ -34,7 +34,9 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   ranges: true</div><div class='del'>-  pins-are-numbered: true</div><div class='add'>+  pins-are-numbered:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    deprecated: true</div><div class='ctx'>   hwlocks: true</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='hunk'>@@ -42,7 +44,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   st,syscfg:</div><div class='ctx'>     description: Phandle+args to the syscon node which includes IRQ mux selection.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: syscon node which includes IRQ mux selection</div><div class='hunk'>@@ -59,18 +61,22 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^gpio@[0-9a-f]*$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       gpio-controller: true</div><div class='ctx'>       '#gpio-cells':</div><div class='ctx'>         const: 2</div><div class='add'>+      interrupt-controller: true</div><div class='add'>+      '#interrupt-cells':</div><div class='add'>+        const: 2</div><div class='ctx'> </div><div class='ctx'>       reg:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'>       clocks:</div><div class='ctx'>         maxItems: 1</div><div class='del'>-      reset:</div><div class='del'>-        minItems: 1</div><div class='add'>+      resets:</div><div class='ctx'>         maxItems: 1</div><div class='add'>+      gpio-line-names: true</div><div class='ctx'>       gpio-ranges:</div><div class='ctx'>         minItems: 1</div><div class='ctx'>         maxItems: 16</div><div class='hunk'>@@ -83,7 +89,7 @@ patternProperties:</div><div class='ctx'>       st,bank-name:</div><div class='ctx'>         description:</div><div class='ctx'>           Should be a name string for this bank as specified in the datasheet.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         enum:</div><div class='ctx'>           - GPIOA</div><div class='ctx'>           - GPIOB</div><div class='hunk'>@@ -102,10 +108,16 @@ patternProperties:</div><div class='ctx'>         description:</div><div class='ctx'>           Should correspond to the EXTI IOport selection (EXTI line used</div><div class='ctx'>           to select GPIOs as interrupts).</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 11</div><div class='ctx'> </div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(.+-hog(-[0-9]+)?)$":</div><div class='add'>+        type: object</div><div class='add'>+        required:</div><div class='add'>+          - gpio-hog</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - gpio-controller</div><div class='ctx'>       - '#gpio-cells'</div><div class='hunk'>@@ -115,9 +127,12 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   '-[0-9]*$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       '^pins':</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description: |</div><div class='ctx'>           A pinctrl node should contain at least one subnode representing the</div><div class='ctx'>           pinctrl group available on the machine. Each subnode will list the</div><div class='hunk'>@@ -125,7 +140,7 @@ patternProperties:</div><div class='ctx'>           configuration, pullups, drive, output high/low and output speed.</div><div class='ctx'>         properties:</div><div class='ctx'>           pinmux:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32-array"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>             description: |</div><div class='ctx'>               Integer array, represents gpio pin number and mux setting.</div><div class='ctx'>               Supported pin number and mux varies for different SoCs, and are</div><div class='hunk'>@@ -186,14 +201,13 @@ patternProperties:</div><div class='ctx'>           - pinmux</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - '#address-cells'</div><div class='ctx'>   - '#size-cells'</div><div class='ctx'>   - ranges</div><div class='del'>-  - pins-are-numbered</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -207,7 +221,6 @@ examples:</div><div class='ctx'>               #size-cells = &lt;1&gt;;</div><div class='ctx'>               compatible = "st,stm32f429-pinctrl";</div><div class='ctx'>               ranges = &lt;0 0x40020000 0x3000&gt;;</div><div class='del'>-              pins-are-numbered;</div><div class='ctx'> </div><div class='ctx'>               gpioa: gpio@0 {</div><div class='ctx'>                       gpio-controller;</div><div class='hunk'>@@ -225,7 +238,6 @@ examples:</div><div class='ctx'>               #size-cells = &lt;1&gt;;</div><div class='ctx'>               compatible = "st,stm32f429-pinctrl";</div><div class='ctx'>               ranges = &lt;0 0x50020000 0x3000&gt;;</div><div class='del'>-              pins-are-numbered;</div><div class='ctx'> </div><div class='ctx'>               gpiob: gpio@1000 {</div><div class='ctx'>                       gpio-controller;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml<br/>index 92963604422f..f3258f2fd3a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/starfive,jh7100-pinctrl.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/starfive,jh7100-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: StarFive JH7100 Pin Controller Device Tree Bindings</div><div class='add'>+title: StarFive JH7100 Pin Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Bindings for the JH7100 RISC-V SoC from StarFive Ltd.</div><div class='hunk'>@@ -111,7 +111,7 @@ patternProperties:</div><div class='ctx'>           pins it needs, and how they should be configured, with regard to</div><div class='ctx'>           muxer configuration, bias, input enable/disable, input schmitt</div><div class='ctx'>           trigger enable/disable, slew-rate and drive strength.</div><div class='del'>-        $ref: "/schemas/pinctrl/pincfg-node.yaml"</div><div class='add'>+        $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           pins:</div><div class='hunk'>@@ -120,14 +120,14 @@ patternProperties:</div><div class='ctx'>               This should be set using either the PAD_GPIO or PAD_FUNC_SHARE</div><div class='ctx'>               macros.</div><div class='ctx'>               Either this or "pinmux" has to be specified, but not both.</div><div class='del'>-            $ref: "/schemas/pinctrl/pinmux-node.yaml#/properties/pins"</div><div class='add'>+            $ref: /schemas/pinctrl/pinmux-node.yaml#/properties/pins</div><div class='ctx'> </div><div class='ctx'>           pinmux:</div><div class='ctx'>             description: |</div><div class='ctx'>               The list of GPIOs and their mux settings that properties in the</div><div class='ctx'>               node apply to. This should be set using the GPIOMUX macro.</div><div class='ctx'>               Either this or "pins" has to be specified, but not both.</div><div class='del'>-            $ref: "/schemas/pinctrl/pinmux-node.yaml#/properties/pinmux"</div><div class='add'>+            $ref: /schemas/pinctrl/pinmux-node.yaml#/properties/pinmux</div><div class='ctx'> </div><div class='ctx'>           bias-disable: true</div><div class='ctx'> </div><div class='hunk'>@@ -165,7 +165,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/starfive-jh7100.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/reset/starfive-jh7100.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/pinctrl/pinctrl-starfive.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/pinctrl-starfive-jh7100.h&gt;</div><div class='ctx'> </div><div class='ctx'>     soc {</div><div class='ctx'>         #address-cells = &lt;2&gt;;</div><div class='hunk'>@@ -293,7 +293,7 @@ examples:</div><div class='ctx'>             pinctrl-names = "default";</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        i2c0 {</div><div class='add'>+        i2c {</div><div class='ctx'>             pinctrl-0 = &lt;&amp;i2c0_pins_default&gt;;</div><div class='ctx'>             pinctrl-names = "default";</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..b470901f5f56<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/starfive,jh7110-aon-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-aon-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive JH7110 AON Pin Controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.</div><div class='add'>+</div><div class='add'>+  Out of the SoC's many pins only the ones named PAD_RGPIO0 to PAD_RGPIO3</div><div class='add'>+  can be multiplexed and have configurable bias, drive strength,</div><div class='add'>+  schmitt trigger etc.</div><div class='add'>+  Some peripherals such as PWM have their I/O go through the 4 "GPIOs".</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: starfive,jh7110-aon-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-[0-9]+$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      '-pins$':</div><div class='add'>+        type: object</div><div class='add'>+        description: |</div><div class='add'>+          A pinctrl node should contain at least one subnode representing the</div><div class='add'>+          pinctrl groups available on the machine. Each subnode will list the</div><div class='add'>+          pins it needs, and how they should be configured, with regard to</div><div class='add'>+          muxer configuration, bias, input enable/disable, input schmitt</div><div class='add'>+          trigger enable/disable, slew-rate and drive strength.</div><div class='add'>+        allOf:</div><div class='add'>+          - $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+          - $ref: /schemas/pinctrl/pinmux-node.yaml</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pinmux:</div><div class='add'>+            description: |</div><div class='add'>+              The list of GPIOs and their mux settings that properties in the</div><div class='add'>+              node apply to. This should be set using the GPIOMUX macro.</div><div class='add'>+</div><div class='add'>+          bias-disable: true</div><div class='add'>+</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            type: boolean</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            type: boolean</div><div class='add'>+</div><div class='add'>+          drive-strength:</div><div class='add'>+            enum: [ 2, 4, 8, 12 ]</div><div class='add'>+</div><div class='add'>+          input-enable: true</div><div class='add'>+</div><div class='add'>+          input-disable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-enable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-disable: true</div><div class='add'>+</div><div class='add'>+          slew-rate:</div><div class='add'>+            maximum: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl@17020000 {</div><div class='add'>+        compatible = "starfive,jh7110-aon-pinctrl";</div><div class='add'>+        reg = &lt;0x17020000 0x10000&gt;;</div><div class='add'>+        resets = &lt;&amp;aoncrg 2&gt;;</div><div class='add'>+        interrupts = &lt;85&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pwm-0 {</div><div class='add'>+            pwm-pins {</div><div class='add'>+                pinmux = &lt;0xff030802&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                input-disable;</div><div class='add'>+                input-schmitt-disable;</div><div class='add'>+                slew-rate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml<br/>new file mode 100644<br/>index 000000000000..222b9e240f8a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-sys-pinctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive JH7110 SYS Pin Controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.</div><div class='add'>+</div><div class='add'>+  Out of the SoC's many pins only the ones named PAD_GPIO0 to PAD_GPIO63</div><div class='add'>+  can be multiplexed and have configurable bias, drive strength,</div><div class='add'>+  schmitt trigger etc.</div><div class='add'>+  Some peripherals have their I/O go through the 64 "GPIOs". This also</div><div class='add'>+  includes a number of other UARTs, I2Cs, SPIs, PWMs etc.</div><div class='add'>+  All these peripherals are connected to all 64 GPIOs such that</div><div class='add'>+  any GPIO can be set up to be controlled by any of the peripherals.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jianlong Huang &lt;jianlong.huang@starfivetech.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: starfive,jh7110-sys-pinctrl</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '-[0-9]+$':</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      '-pins$':</div><div class='add'>+        type: object</div><div class='add'>+        description: |</div><div class='add'>+          A pinctrl node should contain at least one subnode representing the</div><div class='add'>+          pinctrl groups available on the machine. Each subnode will list the</div><div class='add'>+          pins it needs, and how they should be configured, with regard to</div><div class='add'>+          muxer configuration, bias, input enable/disable, input schmitt</div><div class='add'>+          trigger enable/disable, slew-rate and drive strength.</div><div class='add'>+        allOf:</div><div class='add'>+          - $ref: /schemas/pinctrl/pincfg-node.yaml</div><div class='add'>+          - $ref: /schemas/pinctrl/pinmux-node.yaml</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          pinmux:</div><div class='add'>+            description: |</div><div class='add'>+              The list of GPIOs and their mux settings that properties in the</div><div class='add'>+              node apply to. This should be set using the GPIOMUX or PINMUX</div><div class='add'>+              macros.</div><div class='add'>+</div><div class='add'>+          bias-disable: true</div><div class='add'>+</div><div class='add'>+          bias-pull-up:</div><div class='add'>+            type: boolean</div><div class='add'>+</div><div class='add'>+          bias-pull-down:</div><div class='add'>+            type: boolean</div><div class='add'>+</div><div class='add'>+          drive-strength:</div><div class='add'>+            enum: [ 2, 4, 8, 12 ]</div><div class='add'>+</div><div class='add'>+          input-enable: true</div><div class='add'>+</div><div class='add'>+          input-disable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-enable: true</div><div class='add'>+</div><div class='add'>+          input-schmitt-disable: true</div><div class='add'>+</div><div class='add'>+          slew-rate:</div><div class='add'>+            maximum: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-controller</div><div class='add'>+  - '#interrupt-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pinctrl@13040000 {</div><div class='add'>+        compatible = "starfive,jh7110-sys-pinctrl";</div><div class='add'>+        reg = &lt;0x13040000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscrg 112&gt;;</div><div class='add'>+        resets = &lt;&amp;syscrg 2&gt;;</div><div class='add'>+        interrupts = &lt;86&gt;;</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        gpio-controller;</div><div class='add'>+        #gpio-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        uart0-0 {</div><div class='add'>+            tx-pins {</div><div class='add'>+                pinmux = &lt;0xff140005&gt;;</div><div class='add'>+                bias-disable;</div><div class='add'>+                drive-strength = &lt;12&gt;;</div><div class='add'>+                input-disable;</div><div class='add'>+                input-schmitt-disable;</div><div class='add'>+                slew-rate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            rx-pins {</div><div class='add'>+                pinmux = &lt;0x0E000406&gt;;</div><div class='add'>+                bias-pull-up;</div><div class='add'>+                drive-strength = &lt;2&gt;;</div><div class='add'>+                input-enable;</div><div class='add'>+                input-schmitt-enable;</div><div class='add'>+                slew-rate = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml<br/>index d8e75b3e64f1..94b868c7ceb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/sunplus,sp7021-pinctrl.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pinctrl/sunplus,sp7021-pinctrl.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Sunplus SP7021 Pin Controller Device Tree Bindings</div><div class='add'>+title: Sunplus SP7021 Pin Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dvorkin Dmitry &lt;dvorkin@tibbo.com&gt;</div><div class='hunk'>@@ -138,7 +138,7 @@ patternProperties:</div><div class='ctx'>         description: |</div><div class='ctx'>           Define pin-function which is used by pinctrl node's client device.</div><div class='ctx'>           The name should be one of string in the following enumeration.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         enum: [ SPI_FLASH, SPI_FLASH_4BIT, SPI_NAND, CARD0_EMMC, SD_CARD,</div><div class='ctx'>                 UA0, FPGA_IFX, HDMI_TX, LCDIF, USB0_OTG, USB1_OTG ]</div><div class='ctx'> </div><div class='hunk'>@@ -146,7 +146,7 @@ patternProperties:</div><div class='ctx'>         description: |</div><div class='ctx'>           Define pin-group in a specified pin-function.</div><div class='ctx'>           The name should be one of string in the following enumeration.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         enum: [ SPI_FLASH1, SPI_FLASH2, SPI_FLASH_4BIT1, SPI_FLASH_4BIT2,</div><div class='ctx'>                 SPI_NAND, CARD0_EMMC, SD_CARD, UA0, FPGA_IFX, HDMI_TX1,</div><div class='ctx'>                 HDMI_TX2, HDMI_TX3, LCDIF, USB0_OTG, USB1_OTG ]</div><div class='hunk'>@@ -288,11 +288,14 @@ required:</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/pinctrl/sppctl-sp7021.h&gt;</div><div class='ctx'> </div><div class='del'>-    pinctl@9c000100 {</div><div class='add'>+    pinctrl@9c000100 {</div><div class='ctx'>         compatible = "sunplus,sp7021-pctl";</div><div class='ctx'>         reg = &lt;0x9c000100 0x100&gt;, &lt;0x9c000300 0x100&gt;,</div><div class='ctx'>               &lt;0x9c0032e4 0x1c&gt;, &lt;0x9c000080 0x20&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml<br/>index 306524885a2b..19d47fd414bc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml</a></div><div class='hunk'>@@ -21,7 +21,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -35,13 +35,14 @@ patternProperties:</div><div class='ctx'>       pinctrl groups available on the machine. Each subnode will list the</div><div class='ctx'>       pins it needs, and how they should be configured, with regard to muxer</div><div class='ctx'>       configuration, pullups, drive strength.</div><div class='del'>-    $ref: "pinmux-node.yaml"</div><div class='add'>+    $ref: pinmux-node.yaml</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       function:</div><div class='ctx'>         description:</div><div class='ctx'>           Function to mux.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8,</div><div class='ctx'>                spi0, spi1, spi2, spi3, spi4, spi5, spi6,</div><div class='ctx'>                uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in]</div><div class='hunk'>@@ -49,7 +50,7 @@ patternProperties:</div><div class='ctx'>       groups:</div><div class='ctx'>         description:</div><div class='ctx'>           Name of the pin group to use for the functions.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>         enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp,</div><div class='ctx'>                i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp,</div><div class='ctx'>                spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml<br/>index cfd0cc549a7b..598a042850b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pinctrl/xlnx,zynq-pinctrl.yaml</a></div><div class='hunk'>@@ -168,7 +168,7 @@ patternProperties:</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "pinctrl.yaml#"</div><div class='add'>+  - $ref: pinctrl.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml b/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml<br/>new file mode 100644<br/>index 000000000000..46e2647a5d72<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/allwinner,sun20i-d1-ppu.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/allwinner,sun20i-d1-ppu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner SoCs PPU power domain controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Samuel Holland &lt;samuel@sholland.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  D1 and related SoCs contain a power domain controller for the CPUs, GPU, and</div><div class='add'>+  video-related hardware.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - allwinner,sun20i-d1-ppu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Bus Clock</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/sun20i-d1-r-ccu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/sun20i-d1-r-ccu.h&gt;</div><div class='add'>+</div><div class='add'>+    ppu: power-controller@7001000 {</div><div class='add'>+        compatible = "allwinner,sun20i-d1-ppu";</div><div class='add'>+        reg = &lt;0x7001000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;r_ccu CLK_BUS_R_PPU&gt;;</div><div class='add'>+        resets = &lt;&amp;r_ccu RST_BUS_R_PPU&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml<br/>index f005abac7079..43a932237a92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/amlogic,meson-ee-pwrc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson Everything-Else Power Domains</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |+</div><div class='ctx'>   The Everything-Else Power Domains node should be the child of a syscon</div><div class='hunk'>@@ -17,7 +17,7 @@ description: |+</div><div class='ctx'>   - compatible: Should be the following:</div><div class='ctx'>                 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon"</div><div class='ctx'> </div><div class='del'>-  Refer to the the bindings described in</div><div class='add'>+  Refer to the bindings described in</div><div class='ctx'>   Documentation/devicetree/bindings/mfd/syscon.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt b/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt<br/>index 99b5b10cda31..ba5865ae6bfe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/amlogic,meson-gx-pwrc.txt</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-Amlogic Meson Power Controller</div><div class='del'>-==============================</div><div class='add'>+Amlogic Meson Power Controller (deprecated)</div><div class='add'>+===========================================</div><div class='ctx'> </div><div class='ctx'> The Amlogic Meson SoCs embeds an internal Power domain controller.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml<br/>index 7657721a4e96..eab21bb2050a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml</a></div><div class='hunk'>@@ -3,8 +3,8 @@</div><div class='ctx'> # Author: Jianxin Pan &lt;jianxin.pan@amlogic.com&gt;</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/amlogic,meson-sec-pwrc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson Secure Power Domains</div><div class='ctx'> </div><div class='hunk'>@@ -40,4 +40,3 @@ examples:</div><div class='ctx'>             #power-domain-cells = &lt;1&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml<br/>index 19a194980142..59a6af735a21 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Hector Martin &lt;marcan@marcan.st&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "power-domain.yaml#"</div><div class='add'>+  - $ref: power-domain.yaml#</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Apple SoCs include PMGR blocks responsible for power management,</div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,t8103-pmgr-pwrstate</div><div class='add'>+          - apple,t8112-pmgr-pwrstate</div><div class='ctx'>           - apple,t6000-pmgr-pwrstate</div><div class='ctx'>       - const: apple,pmgr-pwrstate</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml b/Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml<br/>index 3301fa0c2653..2fd2178d1fa5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/power/avs/qcom,cpr.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Core Power Reduction (CPR) bindings</div><div class='add'>+title: Qualcomm Core Power Reduction (CPR)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Niklas Cassel &lt;nks@flawful.org&gt;</div><div class='hunk'>@@ -51,6 +51,7 @@ properties:</div><div class='ctx'>       supported by the CPR power domain.</div><div class='ctx'> </div><div class='ctx'>   acc-syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: A phandle to the syscon used for writing ACC settings.</div><div class='ctx'> </div><div class='ctx'>   nvmem-cells:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml b/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml<br/>index 63b15ac6dde4..d867bd6976d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: BCM63xx power domain driver</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.yaml b/Documentation/devicetree/bindings/power/domain-idle-state.yaml<br/>index 6a12efdf436a..ec1f6f669e50 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/domain-idle-state.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/domain-idle-state.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/domain-idle-state.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/domain-idle-state.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: PM Domain Idle States binding description</div><div class='add'>+title: PM Domain Idle States</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ulf Hansson &lt;ulf.hansson@linaro.org&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^(cpu|cluster|domain)-":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       Each state node represents a domain idle state description.</div><div class='ctx'> </div><div class='hunk'>@@ -44,6 +45,15 @@ patternProperties:</div><div class='ctx'>           state will yield power benefits, after overcoming the overhead while</div><div class='ctx'>           entering the idle state.</div><div class='ctx'> </div><div class='add'>+      arm,psci-suspend-param:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: |</div><div class='add'>+          power_state parameter to pass to the ARM PSCI suspend call.</div><div class='add'>+</div><div class='add'>+          Device tree nodes that require usage of PSCI CPU_SUSPEND function</div><div class='add'>+          (i.e. idle states node with entry-method property is set to "psci")</div><div class='add'>+          must specify this property.</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='ctx'>       - entry-latency-us</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml<br/>index a055b3e819d8..c21a66422d4f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml</a></div><div class='hunk'>@@ -23,11 +23,16 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - fsl,imx6q-gpc</div><div class='del'>-      - fsl,imx6qp-gpc</div><div class='del'>-      - fsl,imx6sl-gpc</div><div class='del'>-      - fsl,imx6sx-gpc</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx6q-gpc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6qp-gpc</div><div class='add'>+              - fsl,imx6sl-gpc</div><div class='add'>+              - fsl,imx6sx-gpc</div><div class='add'>+              - fsl,imx6ul-gpc</div><div class='add'>+          - const: fsl,imx6q-gpc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -35,6 +40,10 @@ properties:</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  interrupt-controller: true</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -43,11 +52,21 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   pgc:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: list of power domains provided by this controller.</div><div class='ctx'> </div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "power-domain@[0-9]$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'> </div><div class='ctx'>           '#power-domain-cells':</div><div class='hunk'>@@ -78,6 +97,10 @@ properties:</div><div class='ctx'>           - '#power-domain-cells'</div><div class='ctx'>           - reg</div><div class='ctx'> </div><div class='add'>+    required:</div><div class='add'>+      - '#address-cells'</div><div class='add'>+      - '#size-cells'</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml<br/>index 747622bdc57b..dfdb8dfb6b65 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml</a></div><div class='hunk'>@@ -42,11 +42,21 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   pgc:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: list of power domains provided by this controller.</div><div class='ctx'> </div><div class='add'>+    properties:</div><div class='add'>+      '#address-cells':</div><div class='add'>+        const: 1</div><div class='add'>+</div><div class='add'>+      '#size-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='ctx'>     patternProperties:</div><div class='del'>-      "power-domain@[0-9]$":</div><div class='add'>+      "power-domain@[0-9a-f]+$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'> </div><div class='ctx'>           '#power-domain-cells':</div><div class='hunk'>@@ -71,6 +81,9 @@ properties:</div><div class='ctx'> </div><div class='ctx'>           power-supply: true</div><div class='ctx'> </div><div class='add'>+          power-domains:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='ctx'>           resets:</div><div class='ctx'>             description: |</div><div class='ctx'>               A number of phandles to resets that need to be asserted during</div><div class='hunk'>@@ -85,6 +98,10 @@ properties:</div><div class='ctx'>           - '#power-domain-cells'</div><div class='ctx'>           - reg</div><div class='ctx'> </div><div class='add'>+    required:</div><div class='add'>+      - '#address-cells'</div><div class='add'>+      - '#size-cells'</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/fsl,scu-pd.yaml b/Documentation/devicetree/bindings/power/fsl,scu-pd.yaml<br/>new file mode 100644<br/>index 000000000000..407b7cfec783<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/fsl,scu-pd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/fsl,scu-pd.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/fsl,scu-pd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - Power Domain Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+  Power domain bindings based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: power-domain.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx8qm-scu-pd</div><div class='add'>+          - fsl,imx8qxp-scu-pd</div><div class='add'>+      - const: fsl,scu-pd</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    power-controller {</div><div class='add'>+        compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml<br/>index 135c6f722091..c9acef80f452 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/mediatek,power-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/mediatek,power-controller.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Mediatek Power Domains Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Weiyi Lu &lt;weiyi.lu@mediatek.com&gt;</div><div class='add'>+  - MandyJH Liu &lt;mandyjh.liu@mediatek.com&gt;</div><div class='ctx'>   - Matthias Brugger &lt;mbrugger@suse.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='hunk'>@@ -19,14 +19,16 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='del'>-    const: power-controller</div><div class='add'>+    pattern: '^power-controller(@[0-9a-f]+)?$'</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - mediatek,mt6795-power-controller</div><div class='ctx'>       - mediatek,mt8167-power-controller</div><div class='ctx'>       - mediatek,mt8173-power-controller</div><div class='ctx'>       - mediatek,mt8183-power-controller</div><div class='ctx'>       - mediatek,mt8186-power-controller</div><div class='add'>+      - mediatek,mt8188-power-controller</div><div class='ctx'>       - mediatek,mt8192-power-controller</div><div class='ctx'>       - mediatek,mt8195-power-controller</div><div class='ctx'> </div><div class='hunk'>@@ -41,6 +43,23 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^power-domain@[0-9a-f]+$":</div><div class='add'>+    $ref: "#/$defs/power-domain-node"</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^power-domain@[0-9a-f]+$":</div><div class='add'>+        $ref: "#/$defs/power-domain-node"</div><div class='add'>+        patternProperties:</div><div class='add'>+          "^power-domain@[0-9a-f]+$":</div><div class='add'>+            $ref: "#/$defs/power-domain-node"</div><div class='add'>+            patternProperties:</div><div class='add'>+              "^power-domain@[0-9a-f]+$":</div><div class='add'>+                $ref: "#/$defs/power-domain-node"</div><div class='add'>+                unevaluatedProperties: false</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+  power-domain-node:</div><div class='ctx'>     type: object</div><div class='ctx'>     description: |</div><div class='ctx'>       Represents the power domains within the power controller node as documented</div><div class='hunk'>@@ -62,9 +81,11 @@ patternProperties:</div><div class='ctx'>       reg:</div><div class='ctx'>         description: |</div><div class='ctx'>           Power domain index. Valid values are defined in:</div><div class='add'>+              "include/dt-bindings/power/mt6795-power.h" - for MT8167 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8167-power.h" - for MT8167 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8173-power.h" - for MT8173 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8183-power.h" - for MT8183 type power domain.</div><div class='add'>+              "include/dt-bindings/power/mediatek,mt8188-power.h" - for MT8188 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.</div><div class='ctx'>               "include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.</div><div class='ctx'>         maxItems: 1</div><div class='hunk'>@@ -98,123 +119,9 @@ patternProperties:</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>         description: phandle to the device containing the SMI register range.</div><div class='ctx'> </div><div class='del'>-    patternProperties:</div><div class='del'>-      "^power-domain@[0-9a-f]+$":</div><div class='del'>-        type: object</div><div class='del'>-        description: |</div><div class='del'>-          Represents a power domain child within a power domain parent node.</div><div class='del'>-</div><div class='del'>-        properties:</div><div class='del'>-</div><div class='del'>-          '#power-domain-cells':</div><div class='del'>-            description:</div><div class='del'>-              Must be 0 for nodes representing a single PM domain and 1 for nodes</div><div class='del'>-              providing multiple PM domains.</div><div class='del'>-</div><div class='del'>-          '#address-cells':</div><div class='del'>-            const: 1</div><div class='del'>-</div><div class='del'>-          '#size-cells':</div><div class='del'>-            const: 0</div><div class='del'>-</div><div class='del'>-          reg:</div><div class='del'>-            maxItems: 1</div><div class='del'>-</div><div class='del'>-          clocks:</div><div class='del'>-            description: |</div><div class='del'>-              A number of phandles to clocks that need to be enabled during domain</div><div class='del'>-              power-up sequencing.</div><div class='del'>-</div><div class='del'>-          clock-names:</div><div class='del'>-            description: |</div><div class='del'>-              List of names of clocks, in order to match the power-up sequencing</div><div class='del'>-              for each power domain we need to group the clocks by name. BASIC</div><div class='del'>-              clocks need to be enabled before enabling the corresponding power</div><div class='del'>-              domain, and should not have a '-' in their name (i.e mm, mfg, venc).</div><div class='del'>-              SUSBYS clocks need to be enabled before releasing the bus protection,</div><div class='del'>-              and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).</div><div class='del'>-</div><div class='del'>-              In order to follow properly the power-up sequencing, the clocks must</div><div class='del'>-              be specified by order, adding first the BASIC clocks followed by the</div><div class='del'>-              SUSBSYS clocks.</div><div class='del'>-</div><div class='del'>-          domain-supply:</div><div class='del'>-            description: domain regulator supply.</div><div class='del'>-</div><div class='del'>-          mediatek,infracfg:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-            description: phandle to the device containing the INFRACFG register range.</div><div class='del'>-</div><div class='del'>-          mediatek,smi:</div><div class='del'>-            $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-            description: phandle to the device containing the SMI register range.</div><div class='del'>-</div><div class='del'>-        patternProperties:</div><div class='del'>-          "^power-domain@[0-9a-f]+$":</div><div class='del'>-            type: object</div><div class='del'>-            description: |</div><div class='del'>-              Represents a power domain child within a power domain parent node.</div><div class='del'>-</div><div class='del'>-            properties:</div><div class='del'>-</div><div class='del'>-              '#power-domain-cells':</div><div class='del'>-                description:</div><div class='del'>-                  Must be 0 for nodes representing a single PM domain and 1 for nodes</div><div class='del'>-                  providing multiple PM domains.</div><div class='del'>-</div><div class='del'>-              '#address-cells':</div><div class='del'>-                const: 1</div><div class='del'>-</div><div class='del'>-              '#size-cells':</div><div class='del'>-                const: 0</div><div class='del'>-</div><div class='del'>-              reg:</div><div class='del'>-                maxItems: 1</div><div class='del'>-</div><div class='del'>-              clocks:</div><div class='del'>-                description: |</div><div class='del'>-                  A number of phandles to clocks that need to be enabled during domain</div><div class='del'>-                  power-up sequencing.</div><div class='del'>-</div><div class='del'>-              clock-names:</div><div class='del'>-                description: |</div><div class='del'>-                  List of names of clocks, in order to match the power-up sequencing</div><div class='del'>-                  for each power domain we need to group the clocks by name. BASIC</div><div class='del'>-                  clocks need to be enabled before enabling the corresponding power</div><div class='del'>-                  domain, and should not have a '-' in their name (i.e mm, mfg, venc).</div><div class='del'>-                  SUSBYS clocks need to be enabled before releasing the bus protection,</div><div class='del'>-                  and should contain a '-' in their name (i.e mm-0, isp-0, cam-0).</div><div class='del'>-</div><div class='del'>-                  In order to follow properly the power-up sequencing, the clocks must</div><div class='del'>-                  be specified by order, adding first the BASIC clocks followed by the</div><div class='del'>-                  SUSBSYS clocks.</div><div class='del'>-</div><div class='del'>-              domain-supply:</div><div class='del'>-                description: domain regulator supply.</div><div class='del'>-</div><div class='del'>-              mediatek,infracfg:</div><div class='del'>-                $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-                description: phandle to the device containing the INFRACFG register range.</div><div class='del'>-</div><div class='del'>-              mediatek,smi:</div><div class='del'>-                $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-                description: phandle to the device containing the SMI register range.</div><div class='del'>-</div><div class='del'>-            required:</div><div class='del'>-              - reg</div><div class='del'>-</div><div class='del'>-            additionalProperties: false</div><div class='del'>-</div><div class='del'>-        required:</div><div class='del'>-          - reg</div><div class='del'>-</div><div class='del'>-        additionalProperties: false</div><div class='del'>-</div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='ctx'> </div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='hunk'>@@ -230,7 +137,7 @@ examples:</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>         scpsys: syscon@10006000 {</div><div class='del'>-            compatible = "syscon", "simple-mfd";</div><div class='add'>+            compatible = "mediatek,mt8173-scpsys", "syscon", "simple-mfd";</div><div class='ctx'>             reg = &lt;0 0x10006000 0 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'>             spm: power-controller {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml<br/>index 889091b9814f..d1235e562041 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/power-domain.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/power-domain.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/power-domain.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/power-domain.yaml</a></div><div class='hunk'>@@ -43,9 +43,6 @@ properties:</div><div class='ctx'>       domain would be considered as capable of being powered-on or powered-off.</div><div class='ctx'> </div><div class='ctx'>   operating-points-v2:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='del'>-    items:</div><div class='del'>-      maxItems: 1</div><div class='ctx'>     description:</div><div class='ctx'>       Phandles to the OPP tables of power domains provided by a power domain</div><div class='ctx'>       provider. If the provider provides a single power domain only or all</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/qcom,kpss-acc-v2.yaml b/Documentation/devicetree/bindings/power/qcom,kpss-acc-v2.yaml<br/>new file mode 100644<br/>index 000000000000..202a5d51ee88<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/qcom,kpss-acc-v2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/qcom,kpss-acc-v2.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/qcom,kpss-acc-v2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Krait Processor Sub-system (KPSS) Application Clock Controller (ACC) v2</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Christian Marangi &lt;ansuelsmth@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The KPSS ACC provides clock, power manager, and reset control to a Krait CPU.</div><div class='add'>+  There is one ACC register region per CPU within the KPSS remapped region as</div><div class='add'>+  well as an alias register region that remaps accesses to the ACC associated</div><div class='add'>+  with the CPU accessing the region. ACC v2 is currently used as a</div><div class='add'>+  power-manager for enabling the cpu.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,kpss-acc-v2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Base address and size of the register region</div><div class='add'>+      - description: Optional base address and size of the alias register region</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    power-manager@f9088000 {</div><div class='add'>+      compatible = "qcom,kpss-acc-v2";</div><div class='add'>+      reg = &lt;0xf9088000 0x1000&gt;,</div><div class='add'>+            &lt;0xf9008000 0x1000&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml<br/>index 940e97b565bf..afad3135ed67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/qcom,rpmpd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/qcom,rpmpd.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm RPM/RPMh Power domains</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Rajendra Nayak &lt;rnayak@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh</div><div class='hunk'>@@ -18,6 +18,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,mdm9607-rpmpd</div><div class='ctx'>       - qcom,msm8226-rpmpd</div><div class='add'>+      - qcom,msm8909-rpmpd</div><div class='ctx'>       - qcom,msm8916-rpmpd</div><div class='ctx'>       - qcom,msm8939-rpmpd</div><div class='ctx'>       - qcom,msm8953-rpmpd</div><div class='hunk'>@@ -27,19 +28,27 @@ properties:</div><div class='ctx'>       - qcom,msm8998-rpmpd</div><div class='ctx'>       - qcom,qcm2290-rpmpd</div><div class='ctx'>       - qcom,qcs404-rpmpd</div><div class='add'>+      - qcom,qdu1000-rpmhpd</div><div class='add'>+      - qcom,sa8540p-rpmhpd</div><div class='add'>+      - qcom,sa8775p-rpmhpd</div><div class='ctx'>       - qcom,sdm660-rpmpd</div><div class='ctx'>       - qcom,sc7180-rpmhpd</div><div class='ctx'>       - qcom,sc7280-rpmhpd</div><div class='ctx'>       - qcom,sc8180x-rpmhpd</div><div class='add'>+      - qcom,sc8280xp-rpmhpd</div><div class='add'>+      - qcom,sdm670-rpmhpd</div><div class='ctx'>       - qcom,sdm845-rpmhpd</div><div class='ctx'>       - qcom,sdx55-rpmhpd</div><div class='add'>+      - qcom,sdx65-rpmhpd</div><div class='ctx'>       - qcom,sm6115-rpmpd</div><div class='ctx'>       - qcom,sm6125-rpmpd</div><div class='ctx'>       - qcom,sm6350-rpmhpd</div><div class='add'>+      - qcom,sm6375-rpmpd</div><div class='ctx'>       - qcom,sm8150-rpmhpd</div><div class='ctx'>       - qcom,sm8250-rpmhpd</div><div class='ctx'>       - qcom,sm8350-rpmhpd</div><div class='ctx'>       - qcom,sm8450-rpmhpd</div><div class='add'>+      - qcom,sm8550-rpmhpd</div><div class='ctx'> </div><div class='ctx'>   '#power-domain-cells':</div><div class='ctx'>     const: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/renesas,apmu.yaml b/Documentation/devicetree/bindings/power/renesas,apmu.yaml<br/>index 4d293b2b2f84..2b4d802ef4b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/renesas,apmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/renesas,apmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/renesas,apmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/renesas,apmu.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/renesas,apmu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/renesas,apmu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas Advanced Power Management Unit</div><div class='ctx'> </div><div class='hunk'>@@ -34,9 +34,8 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   cpus:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='del'>-    items:</div><div class='del'>-      maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'>     description: |</div><div class='ctx'>       Array of phandles pointing to CPU cores, which should match the order of</div><div class='ctx'>       CPU cores used by the WUPCR and PSTR registers in the Advanced Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml<br/>index 62a49ca319ec..0720b54881c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/renesas,rcar-sysc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/renesas,rcar-sysc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas R-Car and RZ/G System Controller</div><div class='ctx'> </div><div class='hunk'>@@ -10,9 +10,11 @@ maintainers:</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='ctx'>   - Magnus Damm &lt;magnus.damm@gmail.com&gt;</div><div class='ctx'> </div><div class='del'>-description:</div><div class='add'>+description: |</div><div class='ctx'>   The R-Car (RZ/G) System Controller provides power management for the CPU</div><div class='ctx'>   cores and various coprocessors.</div><div class='add'>+  The power domain IDs for consumers are defined in header files::</div><div class='add'>+  include/dt-bindings/power/r8*-sysc.h</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -42,6 +44,7 @@ properties:</div><div class='ctx'>       - renesas,r8a77995-sysc # R-Car D3</div><div class='ctx'>       - renesas,r8a779a0-sysc # R-Car V3U</div><div class='ctx'>       - renesas,r8a779f0-sysc # R-Car S4-8</div><div class='add'>+      - renesas,r8a779g0-sysc # R-Car V4H</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -64,14 +67,3 @@ examples:</div><div class='ctx'>             reg = &lt;0xe6180000 0x0200&gt;;</div><div class='ctx'>             #power-domain-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    // Power Domain consumers</div><div class='del'>-    #include &lt;dt-bindings/power/r8a7791-sysc.h&gt;</div><div class='del'>-</div><div class='del'>-    cache-controller-0 {</div><div class='del'>-            compatible = "cache";</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A7791_PD_CA15_SCU&gt;;</div><div class='del'>-            cache-unified;</div><div class='del'>-            cache-level = &lt;2&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml b/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml<br/>index a72d5c721516..d3d18e0f5db3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/gpio-restart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/gpio-restart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/reset/gpio-restart.yaml</a></div><div class='hunk'>@@ -25,6 +25,9 @@ description: &gt;</div><div class='ctx'>   inactive-delay, the GPIO is driven active again.  After a delay specified by wait-delay, the</div><div class='ctx'>   restart handler completes allowing other restart handlers to be attempted.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: restart-handler.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: gpio-restart</div><div class='hunk'>@@ -41,16 +44,6 @@ properties:</div><div class='ctx'>       in its inactive state.</div><div class='ctx'> </div><div class='ctx'>   priority:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: |</div><div class='del'>-      A priority ranging from 0 to 255 (default 129) according to the following guidelines:</div><div class='del'>-</div><div class='del'>-        0:   Restart handler of last resort, with limited restart capabilities.</div><div class='del'>-        128: Default restart handler; use if no other restart handler is expected to be available,</div><div class='del'>-             and/or if restart functionality is sufficient to restart the entire system.</div><div class='del'>-        255: Highest priority restart handler, will preempt all other restart handlers.</div><div class='del'>-    minimum: 0</div><div class='del'>-    maximum: 255</div><div class='ctx'>     default: 129</div><div class='ctx'> </div><div class='ctx'>   active-delay:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/msm-poweroff.txt b/Documentation/devicetree/bindings/power/reset/msm-poweroff.txt<br/>deleted file mode 100644<br/>index ce44ad357565..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/msm-poweroff.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/msm-poweroff.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-MSM Restart Driver</div><div class='del'>-</div><div class='del'>-A power supply hold (ps-hold) bit is set to power the msm chipsets.</div><div class='del'>-Clearing that bit allows us to restart/poweroff. The difference</div><div class='del'>-between poweroff and restart is determined by unique power manager IC</div><div class='del'>-settings.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>--compatible: "qcom,pshold"</div><div class='del'>--reg: Specifies the physical address of the ps-hold register</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	restart@fc4ab000 {</div><div class='del'>-		compatible = "qcom,pshold";</div><div class='del'>-		reg = &lt;0xfc4ab000 0x4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml b/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml<br/>index 353f155df0f4..d96170eecbd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/qcom,pon.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/qcom,pon.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/reset/qcom,pon.yaml</a></div><div class='hunk'>@@ -15,26 +15,39 @@ description: |</div><div class='ctx'> </div><div class='ctx'>   This DT node has pwrkey and resin as sub nodes.</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: reboot-mode.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,pm8916-pon</div><div class='ctx'>       - qcom,pms405-pon</div><div class='ctx'>       - qcom,pm8998-pon</div><div class='add'>+      - qcom,pmk8350-pon</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the SPMI base address for the PON (power-on) peripheral.  For</div><div class='add'>+      PMICs that have the PON peripheral (GEN3) split into PON_HLOS and PON_PBS</div><div class='add'>+      (e.g. PMK8350), this can hold addresses of both PON_HLOS and PON_PBS</div><div class='add'>+      peripherals.  In that case, the PON_PBS address needs to be specified to</div><div class='add'>+      facilitate software debouncing on some PMIC.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   pwrkey:</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "../../input/qcom,pm8941-pwrkey.yaml#"</div><div class='add'>+    $ref: /schemas/input/qcom,pm8941-pwrkey.yaml#</div><div class='ctx'> </div><div class='ctx'>   resin:</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "../../input/qcom,pm8941-pwrkey.yaml#"</div><div class='add'>+    $ref: /schemas/input/qcom,pm8941-pwrkey.yaml#</div><div class='add'>+</div><div class='add'>+  watchdog:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/watchdog/qcom,pm8916-wdt.yaml</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -42,6 +55,39 @@ required:</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: reboot-mode.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8916-pon</div><div class='add'>+              - qcom,pms405-pon</div><div class='add'>+              - qcom,pm8998-pon</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pon</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,pmk8350-pon</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: hlos</div><div class='add'>+            - const: pbs</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/qcom,pshold.yaml b/Documentation/devicetree/bindings/power/reset/qcom,pshold.yaml<br/>new file mode 100644<br/>index 000000000000..527962d54a8f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/qcom,pshold.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/reset/qcom,pshold.yaml</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/reset/qcom,pshold.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SoC restart and power off</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  A power supply hold (ps-hold) bit is set to power the Qualcomm chipsets.</div><div class='add'>+  Clearing that bit allows us to restart/power off. The difference between</div><div class='add'>+  power off and restart is determined by unique power manager IC settings.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,pshold</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    reset-controller@fc4ab000 {</div><div class='add'>+        compatible = "qcom,pshold";</div><div class='add'>+        reg = &lt;0xfc4ab000 0x4&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml b/Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml<br/>index 03bd1fa5a623..e9417557cd30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/reset/regulator-poweroff.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: "regulator-poweroff"</div><div class='add'>+    const: regulator-poweroff</div><div class='ctx'> </div><div class='ctx'>   cpu-supply:</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/restart-handler.yaml b/Documentation/devicetree/bindings/power/reset/restart-handler.yaml<br/>new file mode 100644<br/>index 000000000000..1f9a2aac53c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/restart-handler.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/reset/restart-handler.yaml</a></div><div class='hunk'>@@ -0,0 +1,30 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/reset/restart-handler.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Restart and shutdown handler generic binding</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Restart and shutdown handler device is responsible for powering off the</div><div class='add'>+  system, e.g. my cutting off the power.  System might have several restart</div><div class='add'>+  handlers, which usually are tried from most precise to last resort.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  priority:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      A priority ranging from 0 to 255 according to the following guidelines::</div><div class='add'>+        0::   Restart handler of last resort, with limited restart capabilities.</div><div class='add'>+        128:: Typical, default restart handler; use if no other restart handler</div><div class='add'>+              is expected to be available, and/or if restart functionality is</div><div class='add'>+              sufficient to restart the entire system.</div><div class='add'>+        255:: Highest priority restart handler, will preempt all other restart handlers.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 255</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml b/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml<br/>index da2509724812..75061124d9a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml</a></div><div class='hunk'>@@ -42,6 +42,9 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: The reset value written to the reboot register (32 bit access).</div><div class='ctx'> </div><div class='add'>+  priority:</div><div class='add'>+    default: 192</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - offset</div><div class='hunk'>@@ -49,6 +52,7 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: restart-handler.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       not:</div><div class='ctx'>         required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml b/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml<br/>index 68d7c14a7163..11f1f98c1cdc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/reset/xlnx,zynqmp-power.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/power/reset/xlnx,zynqmp-power.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx Zynq MPSoC Power Management Device Tree Bindings</div><div class='add'>+title: Xilinx Zynq MPSoC Power Management</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='hunk'>@@ -15,7 +15,7 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: "xlnx,zynqmp-power"</div><div class='add'>+    const: xlnx,zynqmp-power</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml<br/>index 3deb0fc8dfd3..0d5e999a58f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/rockchip,power-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/rockchip,power-controller.yaml</a></div><div class='hunk'>@@ -41,6 +41,8 @@ properties:</div><div class='ctx'>       - rockchip,rk3368-power-controller</div><div class='ctx'>       - rockchip,rk3399-power-controller</div><div class='ctx'>       - rockchip,rk3568-power-controller</div><div class='add'>+      - rockchip,rk3588-power-controller</div><div class='add'>+      - rockchip,rv1126-power-controller</div><div class='ctx'> </div><div class='ctx'>   "#power-domain-cells":</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -119,6 +121,8 @@ $defs:</div><div class='ctx'>           "include/dt-bindings/power/rk3368-power.h"</div><div class='ctx'>           "include/dt-bindings/power/rk3399-power.h"</div><div class='ctx'>           "include/dt-bindings/power/rk3568-power.h"</div><div class='add'>+          "include/dt-bindings/power/rk3588-power.h"</div><div class='add'>+          "include/dt-bindings/power/rockchip,rv1126-power.h"</div><div class='ctx'> </div><div class='ctx'>       clocks:</div><div class='ctx'>         minItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml b/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml<br/>index 1727bf108979..d71fc72d4464 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/rockchip-io-domain.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/rockchip-io-domain.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/rockchip-io-domain.yaml</a></div><div class='hunk'>@@ -58,6 +58,7 @@ properties:</div><div class='ctx'>       - rockchip,rk3568-pmu-io-voltage-domain</div><div class='ctx'>       - rockchip,rv1108-io-voltage-domain</div><div class='ctx'>       - rockchip,rv1108-pmu-io-voltage-domain</div><div class='add'>+      - rockchip,rv1126-pmu-io-voltage-domain</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -78,6 +79,7 @@ allOf:</div><div class='ctx'>   - $ref: "#/$defs/rk3568-pmu"</div><div class='ctx'>   - $ref: "#/$defs/rv1108"</div><div class='ctx'>   - $ref: "#/$defs/rv1108-pmu"</div><div class='add'>+  - $ref: "#/$defs/rv1126-pmu"</div><div class='ctx'> </div><div class='ctx'> $defs:</div><div class='ctx'>   px30:</div><div class='hunk'>@@ -344,6 +346,34 @@ $defs:</div><div class='ctx'>         pmu-supply:</div><div class='ctx'>           description: The supply connected to PMUIO_VDD.</div><div class='ctx'> </div><div class='add'>+  rv1126-pmu:</div><div class='add'>+    if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rv1126-pmu-io-voltage-domain</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vccio1-supply:</div><div class='add'>+          description: The supply connected to VCCIO1.</div><div class='add'>+        vccio2-supply:</div><div class='add'>+          description: The supply connected to VCCIO2.</div><div class='add'>+        vccio3-supply:</div><div class='add'>+          description: The supply connected to VCCIO3.</div><div class='add'>+        vccio4-supply:</div><div class='add'>+          description: The supply connected to VCCIO4.</div><div class='add'>+        vccio5-supply:</div><div class='add'>+          description: The supply connected to VCCIO5.</div><div class='add'>+        vccio6-supply:</div><div class='add'>+          description: The supply connected to VCCIO6.</div><div class='add'>+        vccio7-supply:</div><div class='add'>+          description: The supply connected to VCCIO7.</div><div class='add'>+        pmuio0-supply:</div><div class='add'>+          description: The supply connected to PMUIO0.</div><div class='add'>+        pmuio1-supply:</div><div class='add'>+          description: The supply connected to PMUIO1.</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     io-domains {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml<br/>new file mode 100644<br/>index 000000000000..98eb8b4110e7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive JH7110 Power Management Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Walker Chen &lt;walker.chen@starfivetech.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  StarFive JH7110 SoC includes support for multiple power domains which can be</div><div class='add'>+  powered on/off by software based on different application scenes to save power.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - starfive,jh7110-pmu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#power-domain-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#power-domain-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwrc: power-controller@17030000 {</div><div class='add'>+        compatible = "starfive,jh7110-pmu";</div><div class='add'>+        reg = &lt;0x17030000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;111&gt;;</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml b/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml<br/>index 3f74bc19415d..5220d9cb16d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/active-semi,act8945a-charger.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/active-semi,act8945a-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/active-semi,act8945a-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Active-semi ACT8945A Charger Function</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/adc-battery.yaml b/Documentation/devicetree/bindings/power/supply/adc-battery.yaml<br/>new file mode 100644<br/>index 000000000000..ed9702caedff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/adc-battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/adc-battery.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/adc-battery.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ADC battery</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Basic battery capacity meter, which only reports basic battery data</div><div class='add'>+  via ADC channels and optionally indicate that the battery is full by</div><div class='add'>+  polling a GPIO line.</div><div class='add'>+</div><div class='add'>+  The voltage is expected to be measured between the battery terminals</div><div class='add'>+  and mandatory. The optional current/power channel is expected to</div><div class='add'>+  monitor the current/power flowing out of the battery. Last but not</div><div class='add'>+  least the temperature channel is supposed to measure the battery</div><div class='add'>+  temperature.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: power-supply.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: adc-battery</div><div class='add'>+</div><div class='add'>+  charged-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO which signals that the battery is fully charged. The GPIO is</div><div class='add'>+      often provided by charger ICs, that are not software controllable.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  io-channels:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  io-channel-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: voltage</div><div class='add'>+      - enum: [ current, power, temperature ]</div><div class='add'>+      - enum: [ power, temperature ]</div><div class='add'>+      - const: temperature</div><div class='add'>+</div><div class='add'>+  monitored-battery: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - io-channels</div><div class='add'>+  - io-channel-names</div><div class='add'>+  - monitored-battery</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    fuel-gauge {</div><div class='add'>+        compatible = "adc-battery";</div><div class='add'>+        charged-gpios = &lt;&amp;gpio 42 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        io-channels = &lt;&amp;adc 13&gt;, &lt;&amp;adc 37&gt;;</div><div class='add'>+        io-channel-names = "voltage", "current";</div><div class='add'>+</div><div class='add'>+        power-supplies = &lt;&amp;charger&gt;;</div><div class='add'>+        monitored-battery = &lt;&amp;battery&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/battery.yaml b/Documentation/devicetree/bindings/power/supply/battery.yaml<br/>index d56ac484fec5..491488e7b970 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/battery.yaml</a></div><div class='hunk'>@@ -85,8 +85,13 @@ properties:</div><div class='ctx'>     description: battery factory internal resistance</div><div class='ctx'> </div><div class='ctx'>   resistance-temp-table:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: the temperature in degree Celsius</div><div class='add'>+        - description: battery internal resistance percent</div><div class='ctx'>     description: |</div><div class='del'>-      An array providing the temperature in degree Celsius</div><div class='add'>+      A table providing the temperature in degree Celsius</div><div class='ctx'>       and corresponding battery internal resistance percent, which is used to</div><div class='ctx'>       look up the resistance percent according to current temperature to get an</div><div class='ctx'>       accurate batterty internal resistance in different temperatures.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq2415x.yaml b/Documentation/devicetree/bindings/power/supply/bq2415x.yaml<br/>index f8461f06e6f4..13822346e708 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq2415x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq2415x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq2415x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq2415x.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq2415x.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq2415x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for TI bq2415x Li-Ion Charger</div><div class='add'>+title: TI bq2415x Li-Ion Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -17,7 +17,6 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - ti,bq24150</div><div class='del'>-      - ti,bq24150</div><div class='ctx'>       - ti,bq24150a</div><div class='ctx'>       - ti,bq24151</div><div class='ctx'>       - ti,bq24151a</div><div class='hunk'>@@ -78,7 +77,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq24190.yaml b/Documentation/devicetree/bindings/power/supply/bq24190.yaml<br/>index 0d7cbbdf808b..d3ebc9de8c0b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq24190.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq24190.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq24190.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq24190.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq24190.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq24190.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for TI BQ2419x Li-Ion Battery Charger</div><div class='add'>+title: TI BQ2419x Li-Ion Battery Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -28,7 +28,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   usb-otg-vbus:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: /schemas/regulator/regulator.yaml#</div><div class='ctx'>     description: |</div><div class='ctx'>       Regulator that is used to control the VBUS voltage direction for</div><div class='ctx'>       either USB host mode or for charging on the OTG port</div><div class='hunk'>@@ -75,7 +75,7 @@ examples:</div><div class='ctx'>       charge-term-current-microamp = &lt;128000&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq24257.yaml b/Documentation/devicetree/bindings/power/supply/bq24257.yaml<br/>index 3a0f6cd9015a..eb064bbf876c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq24257.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq24257.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq24257.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq24257.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq24257.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq24257.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for bq24250, bq24251 and bq24257 Li-Ion Charger</div><div class='add'>+title: Bq24250, bq24251 and bq24257 Li-Ion Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -84,7 +84,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -104,7 +104,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq24735.yaml b/Documentation/devicetree/bindings/power/supply/bq24735.yaml<br/>index 131be6782c4b..af41e7ccd784 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq24735.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq24735.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq24735.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq24735.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq24735.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq24735.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for TI BQ24735 Li-Ion Battery Charger</div><div class='add'>+title: TI BQ24735 Li-Ion Battery Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -77,7 +77,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq2515x.yaml b/Documentation/devicetree/bindings/power/supply/bq2515x.yaml<br/>index 813d6afde606..845822c87f2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq2515x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq2515x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq2515x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq2515x.yaml</a></div><div class='hunk'>@@ -2,14 +2,13 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq2515x.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq2515x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI bq2515x 500-mA Linear charger family</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='del'>-  - Ricardo Rivera-Matos &lt;r-rivera-matos@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The BQ2515x family is a highly integrated battery charge management IC that</div><div class='hunk'>@@ -74,7 +73,7 @@ examples:</div><div class='ctx'>       constant-charge-voltage-max-microvolt = &lt;4000000&gt;;</div><div class='ctx'>     };</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq256xx.yaml b/Documentation/devicetree/bindings/power/supply/bq256xx.yaml<br/>index 92ec7ed25668..82f382a7ffb3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq256xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq256xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq256xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq256xx.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq256xx.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq256xx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI bq256xx Switch Mode Buck Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Ricardo Rivera-Matos &lt;r-rivera-matos@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The bq256xx devices are a family of highly-integrated battery charge</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq25890.yaml b/Documentation/devicetree/bindings/power/supply/bq25890.yaml<br/>index bf823b615439..0ad302ab2bcc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq25890.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq25890.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq25890.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq25890.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq25890.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq25890.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for bq25890, bq25892, bq25895 and bq25896 Li-Ion Charger</div><div class='add'>+title: Bq25890, bq25892, bq25895 and bq25896 Li-Ion Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -15,11 +15,15 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - ti,bq25890</div><div class='del'>-      - ti,bq25892</div><div class='del'>-      - ti,bq25895</div><div class='del'>-      - ti,bq25896</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - ti,bq25890</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,bq25892</div><div class='add'>+              - ti,bq25895</div><div class='add'>+              - ti,bq25896</div><div class='add'>+          - const: ti,bq25890</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -93,12 +97,12 @@ required:</div><div class='ctx'>   - ti,boost-voltage</div><div class='ctx'>   - ti,boost-max-current</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq25980.yaml b/Documentation/devicetree/bindings/power/supply/bq25980.yaml<br/>index 8367a1fd4057..b70ce8d7f86c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq25980.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq25980.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq25980.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq25980.yaml</a></div><div class='hunk'>@@ -2,14 +2,13 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq25980.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq25980.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI BQ25980 Flash Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='del'>-  - Ricardo Rivera-Matos &lt;r-rivera-matos@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The BQ25980, BQ25975, and BQ25960 are a series of flash chargers intended</div><div class='hunk'>@@ -96,7 +95,7 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml<br/>index 6af41da3e055..309ea33b5b25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/bq27xxx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/bq27xxx.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2020 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/bq27xxx.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/bq27xxx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TI BQ27XXX fuel gauge family</div><div class='ctx'> </div><div class='hunk'>@@ -60,13 +60,11 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   monitored-battery:</div><div class='ctx'>     description: |</div><div class='del'>-       phandle of battery characteristics node.</div><div class='ctx'>        The fuel gauge uses the following battery properties:</div><div class='ctx'>        - energy-full-design-microwatt-hours</div><div class='ctx'>        - charge-full-design-microamp-hours</div><div class='ctx'>        - voltage-min-design-microvolt</div><div class='ctx'>        Both or neither of the *-full-design-*-hours properties must be set.</div><div class='del'>-       See Documentation/devicetree/bindings/power/supply/battery.yaml</div><div class='ctx'> </div><div class='ctx'>   power-supplies: true</div><div class='ctx'> </div><div class='hunk'>@@ -77,15 +75,16 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    bat: battery {</div><div class='add'>+      compatible = "simple-battery";</div><div class='add'>+      voltage-min-design-microvolt = &lt;3200000&gt;;</div><div class='add'>+      energy-full-design-microwatt-hours = &lt;5290000&gt;;</div><div class='add'>+      charge-full-design-microamp-hours = &lt;1430000&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='del'>-      bat: battery {</div><div class='del'>-        compatible = "simple-battery";</div><div class='del'>-        voltage-min-design-microvolt = &lt;3200000&gt;;</div><div class='del'>-        energy-full-design-microwatt-hours = &lt;5290000&gt;;</div><div class='del'>-        charge-full-design-microamp-hours = &lt;1430000&gt;;</div><div class='del'>-      };</div><div class='ctx'> </div><div class='ctx'>       bq27510g3: fuel-gauge@55 {</div><div class='ctx'>         compatible = "ti,bq27510g3";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/charger-manager.yaml b/Documentation/devicetree/bindings/power/supply/charger-manager.yaml<br/>index c863cfa67865..5af1e0beaf29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/charger-manager.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/charger-manager.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/charger-manager.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/charger-manager.yaml</a></div><div class='hunk'>@@ -36,6 +36,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cm-poll-mode:</div><div class='ctx'>     description: polling mode</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     default: 0</div><div class='ctx'>     enum:</div><div class='ctx'>       - 0 # disabled</div><div class='hunk'>@@ -49,6 +50,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cm-battery-stat:</div><div class='ctx'>     description: battery status</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum:</div><div class='ctx'>       - 0 # battery always present</div><div class='ctx'>       - 1 # no battery</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml b/Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml<br/>index 7153fd4ce55f..694bfdb5815c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/cpcap-battery.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/cpcap-battery.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/cpcap-battery.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Motorola CPCAP PMIC battery</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml b/Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml<br/>index cb6353683d7b..7e6bf30a0107 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/cpcap-charger.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/cpcap-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/cpcap-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Motorola CPCAP PMIC charger</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml b/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml<br/>index 2dda91587dc3..dc697b6147b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml</a></div><div class='hunk'>@@ -78,4 +78,3 @@ examples:</div><div class='ctx'>            power-supplies = &lt;&amp;mains_charger&gt;, &lt;&amp;usb_charger&gt;;</div><div class='ctx'>        };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml b/Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml<br/>index 96336b05d76d..85bebebb285b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/dlg,da9150-charger.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/dlg,da9150-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/dlg,da9150-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Dialog Semiconductor DA9150 Charger Power Supply bindings</div><div class='add'>+title: Dialog Semiconductor DA9150 Charger Power Supply</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml b/Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml<br/>index 30c2fff7cf92..7cc94b872937 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/dlg,da9150-fuel-gauge.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/dlg,da9150-fuel-gauge.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/dlg,da9150-fuel-gauge.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Dialog Semiconductor DA9150 Fuel-Gauge Power Supply bindings</div><div class='add'>+title: Dialog Semiconductor DA9150 Fuel-Gauge Power Supply</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml<br/>index 76c227a7cd5c..741022b4449d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml</a></div><div class='hunk'>@@ -2,14 +2,16 @@</div><div class='ctx'> # Copyright 2019-2020 Artur Rojek</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/ingenic,battery.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/ingenic,battery.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic JZ47xx battery bindings</div><div class='add'>+title: Ingenic JZ47xx battery</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Artur Rojek &lt;contact@artur-rojek.eu&gt;</div><div class='ctx'> </div><div class='add'>+$ref: power-supply.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -28,8 +30,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   monitored-battery:</div><div class='ctx'>     description: &gt;</div><div class='del'>-      phandle to a "simple-battery" compatible node.</div><div class='del'>-</div><div class='ctx'>       This property must be a phandle to a node using the format described</div><div class='ctx'>       in battery.yaml, with the following properties being required:</div><div class='ctx'>       - voltage-min-design-microvolt: drained battery voltage,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/isp1704.yaml b/Documentation/devicetree/bindings/power/supply/isp1704.yaml<br/>index 4c91da70011d..fb3a812aa5a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/isp1704.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/isp1704.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/isp1704.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/isp1704.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/isp1704.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/isp1704.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for NXP ISP1704 USB Charger Detection</div><div class='add'>+title: NXP ISP1704 USB Charger Detection</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml b/Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml<br/>index 518eabb63588..a99d989f1450 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/lego,ev3-battery.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/lego,ev3-battery.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/lego,ev3-battery.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: LEGO MINDSTORMS EV3 Battery</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml b/Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml<br/>index e2d8d2aebb73..d26ed5eabe28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/lltc,lt3651-charger.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/lltc,lt3651-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/lltc,lt3651-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Analog Devices LT3651 Charger Power Supply bindings</div><div class='add'>+title: Analog Devices LT3651 Charger Power Supply</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml b/Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml<br/>index 043bf378040f..e68a97cb49fe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/lltc,ltc294x.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/lltc,ltc294x.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/lltc,ltc294x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for LTC2941, LTC2942, LTC2943 and LTC2944 battery fuel gauges</div><div class='add'>+title: LTC2941, LTC2942, LTC2943 and LTC2944 battery fuel gauges</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   All chips measure battery capacity.</div><div class='hunk'>@@ -54,7 +54,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'>       battery@64 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml b/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml<br/>index 6d7aa97a6475..29d536541152 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/ltc4162-l.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2020 Topic Embedded Products</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/ltc4162-l.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/ltc4162-l.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Linear Technology (Analog Devices) LTC4162-L Charger</div><div class='ctx'> </div><div class='hunk'>@@ -54,7 +54,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'>       charger: battery-charger@68 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml b/Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml<br/>index 818647edf63d..5faa2418fe2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,ds2760.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/maxim,ds2760.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/maxim,ds2760.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Maxim DS2760 DT bindings</div><div class='add'>+title: Maxim DS2760</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml<br/>index 3978b48299de..4d3a1d09036f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,max14577.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml<br/>index 0a41078ebd99..b444b799848e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,max14656.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/maxim,max14656.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/maxim,max14656.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Maxim MAX14656 DT bindings</div><div class='add'>+title: Maxim MAX14656</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -32,7 +32,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml<br/>index 6b4588a3253b..2627cd3eed83 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,max17040.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/maxim,max17040.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/maxim,max17040.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Maxim 17040 fuel gauge series</div><div class='ctx'> </div><div class='hunk'>@@ -68,7 +68,7 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -82,7 +82,7 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml<br/>index 971b53c58cc6..085e2504d0dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,max17042.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/maxim,max17042.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/maxim,max17042.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Maxim 17042 fuel gauge series</div><div class='ctx'> </div><div class='hunk'>@@ -59,6 +59,8 @@ properties:</div><div class='ctx'>       Voltage threshold to report battery as over voltage (in mV).</div><div class='ctx'>       Default is not to report over-voltage events.</div><div class='ctx'> </div><div class='add'>+  power-supplies: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -67,7 +69,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml<br/>index a21dc1a8890f..f5fd53debbc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,max77693.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX77693 MicroUSB and Companion Power Management IC Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml<br/>index 675b9b26d233..f23dcc50793e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim Integrated MAX77976 Battery charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Luca Ceresoli &lt;luca@lucaceresoli.net&gt;</div><div class='add'>+  - Luca Ceresoli &lt;luca.ceresoli@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Maxim MAX77976 is a 19Vin / 5.5A, 1-Cell Li+ battery charger</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml b/Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml<br/>index 4828ca0842ae..a8d625f285f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/maxim,max8903.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/maxim,max8903.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/maxim,max8903.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Maxim Semiconductor MAX8903 Battery Charger</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml b/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml<br/>new file mode 100644<br/>index 000000000000..fd491c598a00<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/mediatek,mt6370-charger.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/mediatek,mt6370-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT6370 Battery Charger</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiaEn Wu &lt;chiaen_wu@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This module is part of the MT6370 MFD device.</div><div class='add'>+  Provides Battery Charger, Boost for OTG devices and BC1.2 detection.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt6370-charger</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: |</div><div class='add'>+      Specify what irqs are needed to be handled by MT6370 Charger driver.</div><div class='add'>+      We need to use the IRQ "MT6370_IRQ_OVPCTRL_UVP_D" to know when USB</div><div class='add'>+      is plugged in, and then the driver will enable BC1.2 detection.</div><div class='add'>+      After the hardware of MT6370 completes the BC1.2 detection,</div><div class='add'>+      IRQ "MT6370_IRQ_ATTACH" will be triggered, and the driver will know</div><div class='add'>+      the result of BC1.2 detection.</div><div class='add'>+      When the IRQ "MT6370_IRQ_CHG_MIVR" is triggered, it means that the</div><div class='add'>+      hardware enters the "Minimum Input Voltage Regulation loop" and</div><div class='add'>+      a workaround needs to be applied at this time.</div><div class='add'>+      In summary, "MT6370_IRQ_OVPCTRL_UVP_D", "MT6370_IRQ_ATTACH" and</div><div class='add'>+      "MT6370_IRQ_CHG_MIVR" are required in this charger driver.</div><div class='add'>+    items:</div><div class='add'>+      - description: irq of "USB is plugged in"</div><div class='add'>+      - description: irq of "BC1.2 is done"</div><div class='add'>+      - description: irq of "Minimum Input Voltage Regulation loop is active"</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: uvp_d_evt</div><div class='add'>+      - const: attach_i</div><div class='add'>+      - const: mivr</div><div class='add'>+</div><div class='add'>+  io-channels:</div><div class='add'>+    description: |</div><div class='add'>+      Use ADC channel to read VBUS, IBUS, IBAT, etc., info.</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: |</div><div class='add'>+          VBUS voltage with lower accuracy (+-75mV) but higher measure</div><div class='add'>+          range (1~22V)</div><div class='add'>+      - description: |</div><div class='add'>+          VBUS voltage with higher accuracy (+-30mV) but lower measure</div><div class='add'>+          range (1~9.76V)</div><div class='add'>+      - description: the main system input voltage</div><div class='add'>+      - description: battery voltage</div><div class='add'>+      - description: battery temperature-sense input voltage</div><div class='add'>+      - description: IBUS current (required)</div><div class='add'>+      - description: battery current</div><div class='add'>+      - description: |</div><div class='add'>+          regulated output voltage to supply for the PWM low-side gate driver</div><div class='add'>+          and the bootstrap capacitor</div><div class='add'>+      - description: IC junction temperature</div><div class='add'>+</div><div class='add'>+  io-channel-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: vbusdiv5</div><div class='add'>+      - const: vbusdiv2</div><div class='add'>+      - const: vsys</div><div class='add'>+      - const: vbat</div><div class='add'>+      - const: ts_bat</div><div class='add'>+      - const: ibus</div><div class='add'>+      - const: ibat</div><div class='add'>+      - const: chg_vddp</div><div class='add'>+      - const: temp_jc</div><div class='add'>+</div><div class='add'>+  usb-otg-vbus-regulator:</div><div class='add'>+    type: object</div><div class='add'>+    description: OTG boost regulator.</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      enable-gpios:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - io-channels</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml b/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml<br/>index b89b15a5bfa4..4c74cc78729e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/mt6360_charger.yaml</a></div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>     type: object</div><div class='ctx'>     description: OTG boost regulator.</div><div class='ctx'>     $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -39,7 +40,6 @@ examples:</div><div class='ctx'>       richtek,vinovp-microvolt = &lt;14500000&gt;;</div><div class='ctx'> </div><div class='ctx'>       otg_vbus_regulator: usb-otg-vbus-regulator {</div><div class='del'>-        regulator-compatible = "usb-otg-vbus";</div><div class='ctx'>         regulator-name = "usb-otg-vbus";</div><div class='ctx'>         regulator-min-microvolt = &lt;4425000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;5825000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml b/Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml<br/>index 4a1489f2b28d..5178e6207271 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/nokia,n900-battery.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/nokia,n900-battery.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/nokia,n900-battery.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Nokia N900 battery</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/olpc-battery.yaml b/Documentation/devicetree/bindings/power/supply/olpc-battery.yaml<br/>index 0bd7bf3b8e1b..dd89e2532a07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/olpc-battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/olpc-battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/olpc-battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/olpc-battery.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/olpc-battery.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/olpc-battery.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: OLPC Battery</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/power-supply.yaml b/Documentation/devicetree/bindings/power/supply/power-supply.yaml<br/>index 531b67225c74..4e54c937973e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/power-supply.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/power-supply.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/power-supply.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/power-supply.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/power-supply.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/power-supply.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Power Supply Core Support</div><div class='ctx'> </div><div class='hunk'>@@ -18,5 +18,10 @@ properties:</div><div class='ctx'>       This property is added to a supply in order to list the devices which</div><div class='ctx'>       supply it power, referenced by their phandles.</div><div class='ctx'> </div><div class='del'>-additionalProperties: true</div><div class='add'>+  monitored-battery:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      The battery (with "simple-battery" compatible) being monitored by this</div><div class='add'>+      power supply.</div><div class='ctx'> </div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml b/Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml<br/>index caeff68c66d5..cbac55d3cb92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/qcom,pm8941-charger.yaml</a></div><div class='hunk'>@@ -117,11 +117,18 @@ properties:</div><div class='ctx'>       be done externally to fully comply with the JEITA safety guidelines if this flag</div><div class='ctx'>       is set.</div><div class='ctx'> </div><div class='add'>+  usb-charge-current-limit:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 100000</div><div class='add'>+    maximum: 2500000</div><div class='add'>+    description: |</div><div class='add'>+      Default USB charge current limit in uA.</div><div class='add'>+</div><div class='ctx'>   usb-otg-in-supply:</div><div class='ctx'>     description: Reference to the regulator supplying power to the USB_OTG_IN pin.</div><div class='ctx'> </div><div class='ctx'>   otg-vbus:</div><div class='del'>-    type: object</div><div class='add'>+    $ref: /schemas/regulator/regulator.yaml#</div><div class='ctx'>     description: |</div><div class='ctx'>       This node defines a regulator used to control the direction of VBUS voltage.</div><div class='ctx'>       Specifically whether to supply voltage to VBUS for host mode operation of the OTG port,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml b/Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml<br/>index 0450f4dd4e51..1d2405bea109 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/qcom,pm8941-coincell.yaml</a></div><div class='hunk'>@@ -16,18 +16,30 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,pm8941-coincell</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,pm8998-coincell</div><div class='add'>+          - const: qcom,pm8941-coincell</div><div class='add'>+</div><div class='add'>+      - const: qcom,pm8941-coincell</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   qcom,rset-ohms:</div><div class='del'>-    description: resistance (in ohms) for current-limiting resistor</div><div class='add'>+    description: |</div><div class='add'>+      Resistance (in ohms) for current-limiting resistor. If unspecified,</div><div class='add'>+      inherit the previous configuration (e.g. from bootloader or hardware</div><div class='add'>+      default value).</div><div class='ctx'>     enum: [ 800, 1200, 1700, 2100 ]</div><div class='ctx'> </div><div class='ctx'>   qcom,vset-millivolts:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: voltage (in millivolts) to apply for charging</div><div class='add'>+    description: |</div><div class='add'>+      Voltage (in millivolts) to apply for charging. If unspecified, inherit</div><div class='add'>+      the previous configuration (e.g. from bootloader or hardware default</div><div class='add'>+      value).</div><div class='ctx'>     enum: [ 2500, 3000, 3100, 3200 ]</div><div class='ctx'> </div><div class='ctx'>   qcom,charger-disable:</div><div class='hunk'>@@ -37,8 +49,6 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - qcom,rset-ohms</div><div class='del'>-  - qcom,vset-millivolts</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml b/Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml<br/>index ae647d3355a2..756c16d1727d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/richtek,rt5033-battery.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/richtek,rt5033-battery.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/richtek,rt5033-battery.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Richtek RT5033 PMIC Fuel Gauge</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml b/Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml<br/>index e1c233462f29..07e38be39f1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/richtek,rt9455.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/richtek,rt9455.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/richtek,rt9455.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for Richtek rt9455 battery charger</div><div class='add'>+title: Richtek rt9455 battery charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -68,7 +68,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/richtek,rt9467.yaml b/Documentation/devicetree/bindings/power/supply/richtek,rt9467.yaml<br/>new file mode 100644<br/>index 000000000000..3723717dc1f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/richtek,rt9467.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/richtek,rt9467.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/richtek,rt9467.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT9467 Switching Battery Charger with Power Path Management</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+  - ChiaEn Wu &lt;chiaen_wu@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RT9467 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for</div><div class='add'>+  portable applications. It integrates a synchronous PWM controller, power</div><div class='add'>+  MOSFETs, input current sensing and regulation, high-accuracy voltage</div><div class='add'>+  regulation, and charge termination. The charge current is regulated through</div><div class='add'>+  integrated sensing resistors.</div><div class='add'>+</div><div class='add'>+  The RT9467 also features USB On-The-Go (OTG) support. It also integrates</div><div class='add'>+  D+/D- pin for USB host/charging port detection.</div><div class='add'>+</div><div class='add'>+  Datasheet is available at</div><div class='add'>+  https://www.richtek.com/assets/product_file/RT9467/DS9467-01.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: richtek,rt9467</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  charge-enable-gpios:</div><div class='add'>+    description: GPIO is used to turn on and off charging.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  usb-otg-vbus-regulator:</div><div class='add'>+    type: object</div><div class='add'>+    description: OTG boost regulator.</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      enable-gpios: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - wakeup-source</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      charger@5b {</div><div class='add'>+        compatible = "richtek,rt9467";</div><div class='add'>+        reg = &lt;0x5b&gt;;</div><div class='add'>+        wakeup-source;</div><div class='add'>+        interrupts-extended = &lt;&amp;gpio_intc 32 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        charge-enable-gpios = &lt;&amp;gpio26 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+        rt9467_otg_vbus: usb-otg-vbus-regulator {</div><div class='add'>+          regulator-name = "rt9467-usb-otg-vbus";</div><div class='add'>+          regulator-min-microvolt = &lt;4425000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;5825000&gt;;</div><div class='add'>+          regulator-min-microamp = &lt;500000&gt;;</div><div class='add'>+          regulator-max-microamp = &lt;3000000&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/richtek,rt9471.yaml b/Documentation/devicetree/bindings/power/supply/richtek,rt9471.yaml<br/>new file mode 100644<br/>index 000000000000..fbb54cfeca08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/richtek,rt9471.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/richtek,rt9471.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/richtek,rt9471.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT9471 3A Single Cell Switching Battery charger</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alina Yu &lt;alina_yu@richtek.com&gt;</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RT9471 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for</div><div class='add'>+  portable applications. It supports USB BC1.2 port detection, current and</div><div class='add'>+  voltage regulations in both charging and boost mode.</div><div class='add'>+</div><div class='add'>+  Datasheet is available at</div><div class='add'>+  https://www.richtek.com/assets/product_file/RT9471=RT9471D/DS9471D-02.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: richtek,rt9471</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  charge-enable-gpios:</div><div class='add'>+    description: GPIO used to turn on and off charging.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  usb-otg-vbus-regulator:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - wakeup-source</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      charger@53 {</div><div class='add'>+        compatible = "richtek,rt9471";</div><div class='add'>+        reg = &lt;0x53&gt;;</div><div class='add'>+        charge-enable-gpios = &lt;&amp;gpio26 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        wakeup-source;</div><div class='add'>+        interrupts-extended = &lt;&amp;gpio_intc 32 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+</div><div class='add'>+        usb-otg-vbus-regulator {</div><div class='add'>+          regulator-name = "usb-otg-vbus";</div><div class='add'>+          regulator-min-microvolt = &lt;4850000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;5300000&gt;;</div><div class='add'>+          regulator-min-microamp = &lt;500000&gt;;</div><div class='add'>+          regulator-max-microamp = &lt;1200000&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml b/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml<br/>index 24b06957b4ca..b2c229ed2423 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ROHM BD99954 Battery charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'>   - Markus Laine &lt;markus.laine@fi.rohmeurope.com&gt;</div><div class='ctx'>   - Mikko Mutanen &lt;mikko.mutanen@fi.rohmeurope.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -18,6 +18,7 @@ description: |</div><div class='ctx'>   provides a Dual-source Battery Charger, two port BC1.2 detection and a</div><div class='ctx'>   Battery Monitor.</div><div class='ctx'> </div><div class='add'>+$ref: power-supply.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml b/Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml<br/>index b62c2431f94e..a846a4d14ca9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/sc2731-charger.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/sc2731-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/sc2731-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Spreadtrum SC2731 PMICs battery charger binding</div><div class='add'>+title: Spreadtrum SC2731 PMICs battery charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -28,7 +28,6 @@ properties:</div><div class='ctx'>       The charger uses the following battery properties</div><div class='ctx'>       - charge-term-current-microamp: current for charge termination phase.</div><div class='ctx'>       - constant-charge-voltage-max-microvolt: maximum constant input voltage.</div><div class='del'>-      See Documentation/devicetree/bindings/power/supply/battery.yaml</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml b/Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml<br/>index e019cffd1f38..de43e45a43b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/sc27xx-fg.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/sc27xx-fg.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/sc27xx-fg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Spreadtrum SC27XX PMICs Fuel Gauge Unit Power Supply Bindings</div><div class='add'>+title: Spreadtrum SC27XX PMICs Fuel Gauge Unit Power Supply</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml b/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml<br/>index 4b8a00cec39c..525abdfb3e2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-btemp.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/stericsson,ab8500-btemp.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/stericsson,ab8500-btemp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AB8500 Battery Temperature Monitor</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml b/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml<br/>index 6799224f7fb4..10bbdcfc87b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-chargalg.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/stericsson,ab8500-chargalg.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/stericsson,ab8500-chargalg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AB8500 Charging Algorithm</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml b/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml<br/>index 9518eb7289d0..e33329b3af61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-charger.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/stericsson,ab8500-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/stericsson,ab8500-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AB8500 Charger</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml b/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml<br/>index 2ce408a7c0ae..6a724ca90e99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/stericsson,ab8500-fg.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright (C) 2021 Sebastian Reichel</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/stericsson,ab8500-fg.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/stericsson,ab8500-fg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AB8500 Fuel Gauge</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml<br/>index 20862cdfc116..2d552becbfe6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Battery charger driver for SMB345, SMB347 and SMB358</div><div class='ctx'> </div><div class='hunk'>@@ -82,7 +82,7 @@ properties:</div><div class='ctx'>       - 1 # SMB3XX_SYSOK_INOK_ACTIVE_HIGH</div><div class='ctx'> </div><div class='ctx'>   usb-vbus:</div><div class='del'>-    $ref: "../../regulator/regulator.yaml#"</div><div class='add'>+    $ref: /schemas/regulator/regulator.yaml#</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml b/Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml<br/>index a23f6653f332..069422a8c90c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/ti,lp8727.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/power/supply/ti,lp8727.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for TI/National Semiconductor LP8727 Charger</div><div class='add'>+title: TI/National Semiconductor LP8727 Charger</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Reichel &lt;sre@kernel.org&gt;</div><div class='hunk'>@@ -28,6 +28,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^(ac|usb)$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: USB/AC charging parameters</div><div class='ctx'>     properties:</div><div class='ctx'>       charger-type:</div><div class='hunk'>@@ -61,7 +62,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -87,4 +88,3 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml b/Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml<br/>index f2dd38bf078c..586745426341 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/tps65090-charger.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/tps65090-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/tps65090-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TPS65090 Frontend PMU with Switchmode Charger</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml b/Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml<br/>index a33408c3a407..7ccf0cdffd3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/tps65217-charger.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/tps65217-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/tps65217-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TPS65217 Charger</div><div class='ctx'> </div><div class='hunk'>@@ -24,7 +24,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: USB</div><div class='ctx'>       - const: AC</div><div class='del'>-      </div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - interrupts</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml b/Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml<br/>index fe3f32a0ea79..d8d3154f9cb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/twl4030-charger.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/twl4030-charger.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/twl4030-charger.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: TWL4030 BCI (Battery Charger Interface)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml b/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml<br/>index de6a23aee977..5c8369fd3ef7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-ac-power-supply.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/x-powers,axp20x-ac-power-supply.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/x-powers,axp20x-ac-power-supply.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AXP20x AC power-supply</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml b/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml<br/>index d055428ae39f..e0b95ecbbebd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-battery-power-supply.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/x-powers,axp20x-battery-power-supply.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/x-powers,axp20x-battery-power-supply.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AXP20x Battery power-supply</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml b/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml<br/>index 0c371b55c9e1..3ce648dd91bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/supply/x-powers,axp20x-usb-power-supply.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/supply/x-powers,axp20x-usb-power-supply.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/power/supply/x-powers,axp20x-usb-power-supply.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: AXP20x USB power-supply</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/wakeup-source.txt b/Documentation/devicetree/bindings/power/wakeup-source.txt<br/>index cfd74659fbed..697333a56d5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/wakeup-source.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/wakeup-source.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/wakeup-source.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/power/wakeup-source.txt</a></div><div class='hunk'>@@ -17,15 +17,14 @@ interrupt.</div><div class='ctx'> List of legacy properties and respective binding document</div><div class='ctx'> ---------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-1. "enable-sdio-wakeup"		Documentation/devicetree/bindings/mmc/mmc.txt</div><div class='del'>-2. "gpio-key,wakeup"		Documentation/devicetree/bindings/input/gpio-keys{,-polled}.txt</div><div class='del'>-3. "has-tpo"			Documentation/devicetree/bindings/rtc/rtc-opal.txt</div><div class='del'>-4. "linux,wakeup"		Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt</div><div class='add'>+1. "gpio-key,wakeup"		Documentation/devicetree/bindings/input/gpio-keys{,-polled}.txt</div><div class='add'>+2. "has-tpo"			Documentation/devicetree/bindings/rtc/rtc-opal.txt</div><div class='add'>+3. "linux,wakeup"		Documentation/devicetree/bindings/input/gpio-matrix-keypad.txt</div><div class='ctx'> 				Documentation/devicetree/bindings/mfd/tc3589x.txt</div><div class='ctx'> 				Documentation/devicetree/bindings/input/touchscreen/ads7846.txt</div><div class='del'>-5. "linux,keypad-wakeup"	Documentation/devicetree/bindings/input/qcom,pm8xxx-keypad.txt</div><div class='del'>-6. "linux,input-wakeup"		Documentation/devicetree/bindings/input/samsung-keypad.txt</div><div class='del'>-7. "nvidia,wakeup-source"	Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt</div><div class='add'>+4. "linux,keypad-wakeup"	Documentation/devicetree/bindings/input/qcom,pm8xxx-keypad.txt</div><div class='add'>+5. "linux,input-wakeup"		Documentation/devicetree/bindings/input/samsung-keypad.txt</div><div class='add'>+6. "nvidia,wakeup-source"	Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt</div><div class='ctx'> </div><div class='ctx'> Examples</div><div class='ctx'> --------</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cache_sram.txt b/Documentation/devicetree/bindings/powerpc/fsl/cache_sram.txt<br/>deleted file mode 100644<br/>index 781955f5217d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/fsl/cache_sram.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/fsl/cache_sram.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-* Freescale PQ3 and QorIQ based Cache SRAM</div><div class='del'>-</div><div class='del'>-Freescale's mpc85xx and some QorIQ platforms provide an</div><div class='del'>-option of configuring a part of (or full) cache memory</div><div class='del'>-as SRAM. This cache SRAM representation in the device</div><div class='del'>-tree should be done as under:-</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "fsl,p2020-cache-sram"</div><div class='del'>-- fsl,cache-sram-ctlr-handle : points to the L2 controller</div><div class='del'>-- reg : offset and length of the cache-sram.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-cache-sram@fff00000 {</div><div class='del'>-	fsl,cache-sram-ctlr-handle = &lt;&amp;L2&gt;;</div><div class='del'>-	reg = &lt;0 0xfff00000 0 0x10000&gt;;</div><div class='del'>-	compatible = "fsl,p2020-cache-sram";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt<br/>index d63ab1dec16d..801c66069121 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/fsl/cpus.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/powerpc/fsl/cpus.txt</a></div><div class='hunk'>@@ -5,7 +5,7 @@ Copyright 2013 Freescale Semiconductor Inc.</div><div class='ctx'> Power Architecture CPUs in Freescale SOCs are represented in device trees as</div><div class='ctx'> per the definition in the Devicetree Specification.</div><div class='ctx'> </div><div class='del'>-In addition to the the Devicetree Specification definitions, the properties</div><div class='add'>+In addition to the Devicetree Specification definitions, the properties</div><div class='ctx'> defined below may be present on CPU nodes.</div><div class='ctx'> </div><div class='ctx'> PROPERTIES</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt b/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt<br/>index d096cf461d81..4571c857dbe5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/powerpc/fsl/mpc5200.txt</a></div><div class='hunk'>@@ -172,7 +172,7 @@ Interrupt controller (fsl,mpc5200-pic) node</div><div class='ctx'> The mpc5200 pic binding splits hardware IRQ numbers into two levels.  The</div><div class='ctx'> split reflects the layout of the PIC hardware itself, which groups</div><div class='ctx'> interrupts into one of three groups; CRIT, MAIN or PERP.  Also, the</div><div class='del'>-Bestcomm dma engine has it's own set of interrupt sources which are</div><div class='add'>+Bestcomm dma engine has its own set of interrupt sources which are</div><div class='ctx'> cascaded off of peripheral interrupt 0, which the driver interprets as a</div><div class='ctx'> fourth group, SDMA.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt b/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt<br/>index c4d78f28d23c..3ff6ebbb4998 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/nintendo/wii.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/nintendo/wii.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/powerpc/nintendo/wii.txt</a></div><div class='hunk'>@@ -97,16 +97,6 @@ Nintendo Wii device tree</div><div class='ctx'>    - reg : should contain the EXI registers location and length</div><div class='ctx'>    - interrupts : should contain the EXI interrupt</div><div class='ctx'> </div><div class='del'>-1.g) The Open Host Controller Interface (OHCI) nodes</div><div class='del'>-</div><div class='del'>-  Represent the USB 1.x Open Host Controller Interfaces.</div><div class='del'>-</div><div class='del'>-  Required properties:</div><div class='del'>-</div><div class='del'>-   - compatible : should be "nintendo,hollywood-usb-ohci","usb-ohci"</div><div class='del'>-   - reg : should contain the OHCI registers location and length</div><div class='del'>-   - interrupts : should contain the OHCI interrupt</div><div class='del'>-</div><div class='ctx'> 1.h) The Enhanced Host Controller Interface (EHCI) node</div><div class='ctx'> </div><div class='ctx'>   Represents the USB 2.0 Enhanced Host Controller Interface.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt b/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt<br/>index 9d619e955576..d6658d3dd15e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/powerpc/opal/power-mgt.txt</a></div><div class='hunk'>@@ -39,7 +39,7 @@ otherwise. The length of all the property arrays must be the same.</div><div class='ctx'> </div><div class='ctx'> - ibm,cpu-idle-state-flags:</div><div class='ctx'> 	Array of unsigned 32-bit values containing the values of the</div><div class='del'>-	flags associated with the the aforementioned idle-states. The</div><div class='add'>+	flags associated with the aforementioned idle-states. The</div><div class='ctx'> 	flag bits are as follows:</div><div class='ctx'> 		0x00000001 /* Decrementer would stop */</div><div class='ctx'> 		0x00000002 /* Needs timebase restore */</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml b/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml<br/>index 9bc664f414a1..51381e4cbb1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ptp/ptp-idt82p33.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/ptp/ptp-idt82p33.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: IDT 82P33 PTP Clock Device Tree Bindings</div><div class='add'>+title: IDT 82P33 PTP Clock</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   IDT 82P33XXX Synchronization Management Unit (SMU) based PTP clock</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml b/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml<br/>index 658cec67743e..7cf32663c806 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/ptp/ptp-idtcm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: IDT ClockMatrix (TM) PTP Clock Device Tree Bindings</div><div class='add'>+title: IDT ClockMatrix (TM) PTP Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vincent Cheng &lt;vincent.cheng.xh@renesas.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml<br/>index e93e935564fb..66e400f2a3a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 PWM Device Tree Bindings</div><div class='add'>+title: Allwinner A10 PWM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -25,7 +25,9 @@ properties:</div><div class='ctx'>           - const: allwinner,sun8i-a83t-pwm</div><div class='ctx'>           - const: allwinner,sun8i-h3-pwm</div><div class='ctx'>       - items:</div><div class='del'>-          - const: allwinner,sun8i-v3s-pwm</div><div class='add'>+          - enum:</div><div class='add'>+              - allwinner,suniv-f1c100s-pwm</div><div class='add'>+              - allwinner,sun8i-v3s-pwm</div><div class='ctx'>           - const: allwinner,sun7i-a20-pwm</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: allwinner,sun50i-a64-pwm</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml b/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml<br/>new file mode 100644<br/>index 000000000000..142157bff0cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/apple,s5l-fpwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/apple,s5l-fpwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Apple FPWM controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - asahi@lists.linux.dev</div><div class='add'>+  - Sasha Finkelstein &lt;fnkl.kernel@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: PWM controller used for keyboard backlight on ARM Macs</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - apple,t8103-fpwm</div><div class='add'>+          - apple,t6000-fpwm</div><div class='add'>+          - apple,t8112-fpwm</div><div class='add'>+      - const: apple,s5l-fpwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm@235044000 {</div><div class='add'>+      compatible = "apple,t8103-fpwm", "apple,s5l-fpwm";</div><div class='add'>+      reg = &lt;0x35044000 0x4000&gt;;</div><div class='add'>+      power-domains = &lt;&amp;ps_fpwm1&gt;;</div><div class='add'>+      clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+      #pwm-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml b/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml<br/>new file mode 100644<br/>index 000000000000..ab45df80345d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/atmel,at91sam-pwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/atmel,at91sam-pwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel/Microchip PWM controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: "pwm.yaml#"</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - atmel,at91sam9rl-pwm</div><div class='add'>+              - atmel,sama5d3-pwm</div><div class='add'>+              - atmel,sama5d2-pwm</div><div class='add'>+              - microchip,sam9x60-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - const: microchip,sama7g5-pwm</div><div class='add'>+          - const: atmel,sama5d2-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm0: pwm@f8034000 {</div><div class='add'>+        compatible = "atmel,at91sam9rl-pwm";</div><div class='add'>+        reg = &lt;0xf8034000 0x400&gt;;</div><div class='add'>+        #pwm-cells = &lt;3&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/atmel-pwm.txt b/Documentation/devicetree/bindings/pwm/atmel-pwm.txt<br/>deleted file mode 100644<br/>index fbb5325be1f0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/atmel-pwm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/atmel-pwm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-Atmel PWM controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: should be one of:</div><div class='del'>-    - "atmel,at91sam9rl-pwm"</div><div class='del'>-    - "atmel,sama5d3-pwm"</div><div class='del'>-    - "atmel,sama5d2-pwm"</div><div class='del'>-    - "microchip,sam9x60-pwm"</div><div class='del'>-  - reg: physical base address and length of the controller's registers</div><div class='del'>-  - #pwm-cells: Should be 3. See pwm.yaml in this directory for a</div><div class='del'>-    description of the cells format.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pwm0: pwm@f8034000 {</div><div class='del'>-		compatible = "atmel,at91sam9rl-pwm";</div><div class='del'>-		reg = &lt;0xf8034000 0x400&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pwmleds {</div><div class='del'>-		compatible = "pwm-leds";</div><div class='del'>-</div><div class='del'>-		d1 {</div><div class='del'>-			label = "d1";</div><div class='del'>-			pwms = &lt;&amp;pwm0 3 5000 0&gt;</div><div class='del'>-			max-brightness = &lt;255&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		d2 {</div><div class='del'>-			label = "d2";</div><div class='del'>-			pwms = &lt;&amp;pwm0 1 5000 1&gt;</div><div class='del'>-			max-brightness = &lt;255&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/clk-pwm.yaml b/Documentation/devicetree/bindings/pwm/clk-pwm.yaml<br/>new file mode 100644<br/>index 000000000000..ec1768291503<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/clk-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/clk-pwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/clk-pwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Clock based PWM controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nikita Travkin &lt;nikita@trvn.ru&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Some systems have clocks that can be exposed to external devices.</div><div class='add'>+  (e.g. by muxing them to GPIO pins)</div><div class='add'>+  It's often possible to control duty-cycle of such clocks which makes them</div><div class='add'>+  suitable for generating PWM signal.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: clk-pwm</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Clock used to generate the signal.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm {</div><div class='add'>+      compatible = "clk-pwm";</div><div class='add'>+      #pwm-cells = &lt;2&gt;;</div><div class='add'>+      clocks = &lt;&amp;gcc 0&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      pinctrl-0 = &lt;&amp;pwm_clk_flash_default&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml<br/>index 7ab6912a845f..3afe1480df52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml</a></div><div class='hunk'>@@ -21,7 +21,14 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: google,cros-ec-pwm</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: PWM controlled using EC_PWM_TYPE_GENERIC channels.</div><div class='add'>+        items:</div><div class='add'>+          - const: google,cros-ec-pwm</div><div class='add'>+      - description: PWM controlled using CROS_EC_PWM_DT_&lt;...&gt; types.</div><div class='add'>+        items:</div><div class='add'>+          - const: google,cros-ec-pwm-type</div><div class='add'>+</div><div class='ctx'>   "#pwm-cells":</div><div class='ctx'>     description: The cell specifies the PWM index.</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -41,6 +48,7 @@ examples:</div><div class='ctx'>         cros-ec@0 {</div><div class='ctx'>             compatible = "google,cros-ec-spi";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='add'>+            interrupts = &lt;101 0&gt;;</div><div class='ctx'> </div><div class='ctx'>             cros_ec_pwm: pwm {</div><div class='ctx'>                 compatible = "google,cros-ec-pwm";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml b/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml<br/>index ec9f6bab798c..5b18a5913ed1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/intel,keembay-pwm.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pwm/intel,keembay-pwm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel Keem Bay PWM Device Tree Bindings</div><div class='add'>+title: Intel Keem Bay PWM</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vijayakannan Ayyathurai &lt;vijayakannan.ayyathurai@intel.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml b/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml<br/>new file mode 100644<br/>index 000000000000..8e176ba7a525<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/mediatek,mt2712-pwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/mediatek,mt2712-pwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek PWM Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - John Crispin &lt;john@phrozen.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2712-pwm</div><div class='add'>+          - mediatek,mt6795-pwm</div><div class='add'>+          - mediatek,mt7622-pwm</div><div class='add'>+          - mediatek,mt7623-pwm</div><div class='add'>+          - mediatek,mt7628-pwm</div><div class='add'>+          - mediatek,mt7629-pwm</div><div class='add'>+          - mediatek,mt7986-pwm</div><div class='add'>+          - mediatek,mt8183-pwm</div><div class='add'>+          - mediatek,mt8365-pwm</div><div class='add'>+          - mediatek,mt8516-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8195-pwm</div><div class='add'>+          - const: mediatek,mt8183-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 10</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    description:</div><div class='add'>+      This controller needs two input clocks for its core and one</div><div class='add'>+      clock for each PWM output.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: top</div><div class='add'>+      - const: main</div><div class='add'>+      - const: pwm1</div><div class='add'>+      - const: pwm2</div><div class='add'>+      - const: pwm3</div><div class='add'>+      - const: pwm4</div><div class='add'>+      - const: pwm5</div><div class='add'>+      - const: pwm6</div><div class='add'>+      - const: pwm7</div><div class='add'>+      - const: pwm8</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#pwm-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt2712-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    pwm0: pwm@11006000 {</div><div class='add'>+        compatible = "mediatek,mt2712-pwm";</div><div class='add'>+        reg = &lt;0x11006000 0x1000&gt;;</div><div class='add'>+        #pwm-cells = &lt;2&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        clocks = &lt;&amp;topckgen CLK_TOP_PWM_SEL&gt;, &lt;&amp;pericfg CLK_PERI_PWM&gt;,</div><div class='add'>+                 &lt;&amp;pericfg CLK_PERI_PWM0&gt;, &lt;&amp;pericfg CLK_PERI_PWM1&gt;,</div><div class='add'>+                 &lt;&amp;pericfg CLK_PERI_PWM2&gt;, &lt;&amp;pericfg CLK_PERI_PWM3&gt;,</div><div class='add'>+                 &lt;&amp;pericfg CLK_PERI_PWM4&gt;, &lt;&amp;pericfg CLK_PERI_PWM5&gt;,</div><div class='add'>+                 &lt;&amp;pericfg CLK_PERI_PWM6&gt;, &lt;&amp;pericfg CLK_PERI_PWM7&gt;;</div><div class='add'>+        clock-names = "top", "main",</div><div class='add'>+                      "pwm1", "pwm2",</div><div class='add'>+                      "pwm3", "pwm4",</div><div class='add'>+                      "pwm5", "pwm6",</div><div class='add'>+                      "pwm7", "pwm8";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml b/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml<br/>new file mode 100644<br/>index 000000000000..0088bc8e7c54<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml</a></div><div class='hunk'>@@ -0,0 +1,76 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek DISP_PWM Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jitao Shi &lt;jitao.shi@mediatek.com&gt;</div><div class='add'>+  - Xinlei Lee &lt;xinlei.lee@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2701-disp-pwm</div><div class='add'>+          - mediatek,mt6595-disp-pwm</div><div class='add'>+          - mediatek,mt8173-disp-pwm</div><div class='add'>+          - mediatek,mt8183-disp-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - const: mediatek,mt8167-disp-pwm</div><div class='add'>+          - const: mediatek,mt8173-disp-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8186-disp-pwm</div><div class='add'>+              - mediatek,mt8188-disp-pwm</div><div class='add'>+              - mediatek,mt8192-disp-pwm</div><div class='add'>+              - mediatek,mt8195-disp-pwm</div><div class='add'>+          - const: mediatek,mt8183-disp-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Main Clock</div><div class='add'>+      - description: Mm Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: main</div><div class='add'>+      - const: mm</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#pwm-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8173-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    pwm0: pwm@1401e000 {</div><div class='add'>+        compatible = "mediatek,mt8173-disp-pwm";</div><div class='add'>+        reg = &lt;0x1401e000 0x1000&gt;;</div><div class='add'>+        #pwm-cells = &lt;2&gt;;</div><div class='add'>+        clocks = &lt;&amp;mmsys CLK_MM_DISP_PWM026M&gt;,</div><div class='add'>+                 &lt;&amp;mmsys CLK_MM_DISP_PWM0MM&gt;;</div><div class='add'>+        clock-names = "main", "mm";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml<br/>index a7fae1772a81..70d563d44c35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/pwm/microchip,corepwm.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip IP corePWM controller bindings</div><div class='add'>+title: Microchip IP corePWM controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Conor Dooley &lt;conor.dooley@microchip.com&gt;</div><div class='hunk'>@@ -30,7 +30,9 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   "#pwm-cells":</div><div class='del'>-    const: 2</div><div class='add'>+    enum: [2, 3]</div><div class='add'>+    description:</div><div class='add'>+      The only flag supported by the controller is PWM_POLARITY_INVERTED.</div><div class='ctx'> </div><div class='ctx'>   microchip,sync-update-mask:</div><div class='ctx'>     description: |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt<br/>deleted file mode 100644<br/>index 74c41e34c3b6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,77 +0,0 @@</div><div class='del'>-Tegra SoC PWFM controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Must be:</div><div class='del'>-  - "nvidia,tegra20-pwm": for Tegra20</div><div class='del'>-  - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30</div><div class='del'>-  - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114</div><div class='del'>-  - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124</div><div class='del'>-  - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132</div><div class='del'>-  - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210</div><div class='del'>-  - "nvidia,tegra186-pwm": for Tegra186</div><div class='del'>-  - "nvidia,tegra194-pwm": for Tegra194</div><div class='del'>-- reg: physical base address and length of the controller's registers</div><div class='del'>-- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of</div><div class='del'>-  the cells format.</div><div class='del'>-- clocks: Must contain one entry, for the module clock.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-- reset-names: Must include the following entries:</div><div class='del'>-  - pwm</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-============================</div><div class='del'>-In some of the interface like PWM based regulator device, it is required</div><div class='del'>-to configure the pins differently in different states, especially in suspend</div><div class='del'>-state of the system. The configuration of pin is provided via the pinctrl</div><div class='del'>-DT node as detailed in the pinctrl DT binding document</div><div class='del'>-	Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt</div><div class='del'>-</div><div class='del'>-The PWM node will have following optional properties.</div><div class='del'>-pinctrl-names:	Pin state names. Must be "default" and "sleep".</div><div class='del'>-pinctrl-0:	phandle for the default/active state of pin configurations.</div><div class='del'>-pinctrl-1:	phandle for the sleep state of pin configurations.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pwm: pwm@7000a000 {</div><div class='del'>-		compatible = "nvidia,tegra20-pwm";</div><div class='del'>-		reg = &lt;0x7000a000 0x100&gt;;</div><div class='del'>-		#pwm-cells = &lt;2&gt;;</div><div class='del'>-		clocks = &lt;&amp;tegra_car 17&gt;;</div><div class='del'>-		resets = &lt;&amp;tegra_car 17&gt;;</div><div class='del'>-		reset-names = "pwm";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example with the pin configuration for suspend and resume:</div><div class='del'>-=========================================================</div><div class='del'>-Suppose pin PE7 (On Tegra210) interfaced with the regulator device and</div><div class='del'>-it requires PWM output to be tristated when system enters suspend.</div><div class='del'>-Following will be DT binding to achieve this:</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/pinctrl/pinctrl-tegra.h&gt;</div><div class='del'>-</div><div class='del'>-	pinmux@700008d4 {</div><div class='del'>-		pwm_active_state: pwm_active_state {</div><div class='del'>-                        pe7 {</div><div class='del'>-                                nvidia,pins = "pe7";</div><div class='del'>-                                nvidia,tristate = &lt;TEGRA_PIN_DISABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		pwm_sleep_state: pwm_sleep_state {</div><div class='del'>-                        pe7 {</div><div class='del'>-                                nvidia,pins = "pe7";</div><div class='del'>-                                nvidia,tristate = &lt;TEGRA_PIN_ENABLE&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pwm@7000a000 {</div><div class='del'>-		/* Mandatory PWM properties */</div><div class='del'>-		pinctrl-names = "default", "sleep";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pwm_active_state&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;pwm_sleep_state&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml<br/>new file mode 100644<br/>index 000000000000..41cea4979132<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/nvidia,tegra20-pwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra PWFM controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - nvidia,tegra20-pwm</div><div class='add'>+          - nvidia,tegra186-pwm</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra30-pwm</div><div class='add'>+              - nvidia,tegra114-pwm</div><div class='add'>+              - nvidia,tegra124-pwm</div><div class='add'>+              - nvidia,tegra132-pwm</div><div class='add'>+              - nvidia,tegra210-pwm</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra20-pwm</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra194-pwm</div><div class='add'>+          - const: nvidia,tegra186-pwm</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: nvidia,tegra234-pwm</div><div class='add'>+          - const: nvidia,tegra194-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: module reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pwm</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+  pinctrl-0:</div><div class='add'>+    description: configuration for the default/active state</div><div class='add'>+</div><div class='add'>+  pinctrl-1:</div><div class='add'>+    description: configuration for the sleep state</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to the core power domain</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra20-car.h&gt;</div><div class='add'>+</div><div class='add'>+    pwm: pwm@7000a000 {</div><div class='add'>+        compatible = "nvidia,tegra20-pwm";</div><div class='add'>+        reg = &lt;0x7000a000 0x100&gt;;</div><div class='add'>+        #pwm-cells = &lt;2&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA20_CLK_PWM&gt;;</div><div class='add'>+        resets = &lt;&amp;tegra_car 17&gt;;</div><div class='add'>+        reset-names = "pwm";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml<br/>new file mode 100644<br/>index 000000000000..527864a4d855<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/pwm-amlogic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic PWM</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Heiner Kallweit &lt;hkallweit1@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - amlogic,meson8b-pwm</div><div class='add'>+          - amlogic,meson-gxbb-pwm</div><div class='add'>+          - amlogic,meson-gxbb-ao-pwm</div><div class='add'>+          - amlogic,meson-axg-ee-pwm</div><div class='add'>+          - amlogic,meson-axg-ao-pwm</div><div class='add'>+          - amlogic,meson-g12a-ee-pwm</div><div class='add'>+          - amlogic,meson-g12a-ao-pwm-ab</div><div class='add'>+          - amlogic,meson-g12a-ao-pwm-cd</div><div class='add'>+          - amlogic,meson-s4-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson-gx-pwm</div><div class='add'>+          - const: amlogic,meson-gxbb-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson-gx-ao-pwm</div><div class='add'>+          - const: amlogic,meson-gxbb-ao-pwm</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson8-pwm</div><div class='add'>+          - const: amlogic,meson8b-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum: [clkin0, clkin1]</div><div class='add'>+      - items:</div><div class='add'>+          - const: clkin0</div><div class='add'>+          - const: clkin1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm@8550 {</div><div class='add'>+      compatible = "amlogic,meson-gxbb-pwm";</div><div class='add'>+      reg = &lt;0x08550 0x10&gt;;</div><div class='add'>+      clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='add'>+      clock-names = "clkin0", "clkin1";</div><div class='add'>+      #pwm-cells = &lt;3&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt<br/>deleted file mode 100644<br/>index 25ed214473d7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-mediatek.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,48 +0,0 @@</div><div class='del'>-MediaTek PWM controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: should be "mediatek,&lt;name&gt;-pwm":</div><div class='del'>-   - "mediatek,mt2712-pwm": found on mt2712 SoC.</div><div class='del'>-   - "mediatek,mt7622-pwm": found on mt7622 SoC.</div><div class='del'>-   - "mediatek,mt7623-pwm": found on mt7623 SoC.</div><div class='del'>-   - "mediatek,mt7628-pwm": found on mt7628 SoC.</div><div class='del'>-   - "mediatek,mt7629-pwm": found on mt7629 SoC.</div><div class='del'>-   - "mediatek,mt8183-pwm": found on mt8183 SoC.</div><div class='del'>-   - "mediatek,mt8516-pwm": found on mt8516 SoC.</div><div class='del'>- - reg: physical base address and length of the controller's registers.</div><div class='del'>- - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of</div><div class='del'>-   the cell format.</div><div class='del'>- - clocks: phandle and clock specifier of the PWM reference clock.</div><div class='del'>- - clock-names: must contain the following, except for MT7628 which</div><div class='del'>-                has no clocks</div><div class='del'>-   - "top": the top clock generator</div><div class='del'>-   - "main": clock used by the PWM core</div><div class='del'>-   - "pwm1-8": the eight per PWM clocks for mt2712</div><div class='del'>-   - "pwm1-6": the six per PWM clocks for mt7622</div><div class='del'>-   - "pwm1-5": the five per PWM clocks for mt7623</div><div class='del'>-   - "pwm1"  : the PWM1 clock for mt7629</div><div class='del'>- - pinctrl-names: Must contain a "default" entry.</div><div class='del'>- - pinctrl-0: One property must exist for each entry in pinctrl-names.</div><div class='del'>-   See pinctrl/pinctrl-bindings.txt for details of the property values.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- assigned-clocks: Reference to the PWM clock entries.</div><div class='del'>-- assigned-clock-parents: The phandle of the parent clock of PWM clock.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	pwm0: pwm@11006000 {</div><div class='del'>-		compatible = "mediatek,mt7623-pwm";</div><div class='del'>-		reg = &lt;0 0x11006000 0 0x1000&gt;;</div><div class='del'>-		#pwm-cells = &lt;2&gt;;</div><div class='del'>-		clocks = &lt;&amp;topckgen CLK_TOP_PWM_SEL&gt;,</div><div class='del'>-			 &lt;&amp;pericfg CLK_PERI_PWM&gt;,</div><div class='del'>-			 &lt;&amp;pericfg CLK_PERI_PWM1&gt;,</div><div class='del'>-			 &lt;&amp;pericfg CLK_PERI_PWM2&gt;,</div><div class='del'>-			 &lt;&amp;pericfg CLK_PERI_PWM3&gt;,</div><div class='del'>-			 &lt;&amp;pericfg CLK_PERI_PWM4&gt;,</div><div class='del'>-			 &lt;&amp;pericfg CLK_PERI_PWM5&gt;;</div><div class='del'>-		clock-names = "top", "main", "pwm1", "pwm2",</div><div class='del'>-			      "pwm3", "pwm4", "pwm5";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pwm0_pins&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-meson.txt b/Documentation/devicetree/bindings/pwm/pwm-meson.txt<br/>deleted file mode 100644<br/>index bd02b0a1496f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-meson.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-meson.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-Amlogic Meson PWM Controller</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Shall contain "amlogic,meson8b-pwm"</div><div class='del'>-                         or "amlogic,meson-gxbb-pwm"</div><div class='del'>-                         or "amlogic,meson-gxbb-ao-pwm"</div><div class='del'>-                         or "amlogic,meson-axg-ee-pwm"</div><div class='del'>-                         or "amlogic,meson-axg-ao-pwm"</div><div class='del'>-                         or "amlogic,meson-g12a-ee-pwm"</div><div class='del'>-                         or "amlogic,meson-g12a-ao-pwm-ab"</div><div class='del'>-                         or "amlogic,meson-g12a-ao-pwm-cd"</div><div class='del'>-- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of</div><div class='del'>-  the cells format.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks: Could contain one or two parents clocks phandle for each of the two</div><div class='del'>-  PWM channels.</div><div class='del'>-- clock-names: Could contain at least the "clkin0" and/or "clkin1" names.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pwm_ab: pwm@8550 {</div><div class='del'>-		compatible = "amlogic,meson-gxbb-pwm";</div><div class='del'>-		reg = &lt;0x0 0x08550 0x0 0x10&gt;;</div><div class='del'>-		#pwm-cells = &lt;3&gt;;</div><div class='del'>-		clocks = &lt;&amp;xtal&gt;, &lt;&amp;xtal&gt;;</div><div class='del'>-		clock-names = "clkin0", "clkin1";</div><div class='del'>-	}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt<br/>deleted file mode 100644<br/>index 691e58b6c223..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,45 +0,0 @@</div><div class='del'>-MediaTek display PWM controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: should be "mediatek,&lt;name&gt;-disp-pwm":</div><div class='del'>-   - "mediatek,mt2701-disp-pwm": found on mt2701 SoC.</div><div class='del'>-   - "mediatek,mt6595-disp-pwm": found on mt6595 SoC.</div><div class='del'>-   - "mediatek,mt8167-disp-pwm", "mediatek,mt8173-disp-pwm": found on mt8167 SoC.</div><div class='del'>-   - "mediatek,mt8173-disp-pwm": found on mt8173 SoC.</div><div class='del'>-   - "mediatek,mt8183-disp-pwm": found on mt8183 SoC.$</div><div class='del'>- - reg: physical base address and length of the controller's registers.</div><div class='del'>- - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of</div><div class='del'>-   the cell format.</div><div class='del'>- - clocks: phandle and clock specifier of the PWM reference clock.</div><div class='del'>- - clock-names: must contain the following:</div><div class='del'>-   - "main": clock used to generate PWM signals.</div><div class='del'>-   - "mm": sync signals from the modules of mmsys.</div><div class='del'>- - pinctrl-names: Must contain a "default" entry.</div><div class='del'>- - pinctrl-0: One property must exist for each entry in pinctrl-names.</div><div class='del'>-   See pinctrl/pinctrl-bindings.txt for details of the property values.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	pwm0: pwm@1401e000 {</div><div class='del'>-		compatible = "mediatek,mt8173-disp-pwm",</div><div class='del'>-			     "mediatek,mt6595-disp-pwm";</div><div class='del'>-		reg = &lt;0 0x1401e000 0 0x1000&gt;;</div><div class='del'>-		#pwm-cells = &lt;2&gt;;</div><div class='del'>-		clocks = &lt;&amp;mmsys CLK_MM_DISP_PWM026M&gt;,</div><div class='del'>-			 &lt;&amp;mmsys CLK_MM_DISP_PWM0MM&gt;;</div><div class='del'>-		clock-names = "main", "mm";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;disp_pwm0_pins&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	backlight_lcd: backlight_lcd {</div><div class='del'>-		compatible = "pwm-backlight";</div><div class='del'>-		pwms = &lt;&amp;pwm0 0 1000000&gt;;</div><div class='del'>-		brightness-levels = &lt;</div><div class='del'>-			  0  16  32  48  64  80  96 112</div><div class='del'>-			128 144 160 176 192 208 224 240</div><div class='del'>-			255</div><div class='del'>-		&gt;;</div><div class='del'>-		default-brightness-level = &lt;9&gt;;</div><div class='del'>-		power-supply = &lt;&amp;mt6397_vio18_reg&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;pio 95 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt b/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt<br/>index d722ae3be363..25ecfe14c698 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/pwm-omap-dmtimer.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible: Shall contain "ti,omap-dmtimer-pwm".</div><div class='del'>-- ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer.txt for info</div><div class='add'>+- ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer-dm.yaml for info</div><div class='ctx'>   about these timers.</div><div class='ctx'> - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of</div><div class='ctx'>   the cells format.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml b/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml<br/>index a336ff9364a9..f2d1dc7e7b3f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/pwm-rockchip.yaml</a></div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>           - const: rockchip,rk2928-pwm</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - rockchip,rk3128-pwm</div><div class='ctx'>               - rockchip,rk3368-pwm</div><div class='ctx'>               - rockchip,rk3399-pwm</div><div class='ctx'>               - rockchip,rv1108-pwm</div><div class='hunk'>@@ -30,6 +31,7 @@ properties:</div><div class='ctx'>               - rockchip,px30-pwm</div><div class='ctx'>               - rockchip,rk3308-pwm</div><div class='ctx'>               - rockchip,rk3568-pwm</div><div class='add'>+              - rockchip,rk3588-pwm</div><div class='ctx'>           - const: rockchip,rk3328-pwm</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml<br/>index 605c1766dba8..bae993128981 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/pwm-sifive.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/pwm-sifive.yaml</a></div><div class='hunk'>@@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: SiFive PWM controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sagar Kadam &lt;sagar.kadam@sifive.com&gt;</div><div class='ctx'>   - Paul Walmsley &lt;paul.walmsley@sifive.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml<br/>index 1c94acbc2b4a..4c8097010687 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml</a></div><div class='hunk'>@@ -35,6 +35,7 @@ properties:</div><div class='ctx'>           - renesas,pwm-r8a77980  # R-Car V3H</div><div class='ctx'>           - renesas,pwm-r8a77990  # R-Car E3</div><div class='ctx'>           - renesas,pwm-r8a77995  # R-Car D3</div><div class='add'>+          - renesas,pwm-r8a779g0  # R-Car V4H</div><div class='ctx'>       - const: renesas,pwm-rcar</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml<br/>index c6b2ab56b7fe..a3e52b22dd18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml</a></div><div class='hunk'>@@ -40,6 +40,7 @@ properties:</div><div class='ctx'>           - renesas,tpu-r8a77970  # R-Car V3M</div><div class='ctx'>           - renesas,tpu-r8a77980  # R-Car V3H</div><div class='ctx'>           - renesas,tpu-r8a779a0  # R-Car V3U</div><div class='add'>+          - renesas,tpu-r8a779g0  # R-Car V4H</div><div class='ctx'>       - const: renesas,tpu</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml b/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml<br/>new file mode 100644<br/>index 000000000000..9aabdb373afa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/snps,dw-apb-timers-pwm2.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 SiFive, Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/snps,dw-apb-timers-pwm2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Synopsys DW-APB timers PWM controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ben Dooks &lt;ben.dooks@sifive.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This describes the DesignWare APB timers module when used in the PWM</div><div class='add'>+  mode. The IP core can be generated with various options which can</div><div class='add'>+  control the functionality, the number of PWMs available and other</div><div class='add'>+  internal controls the designer requires.</div><div class='add'>+</div><div class='add'>+  The IP block has a version register so this can be used for detection</div><div class='add'>+  instead of having to encode the IP version number in the device tree</div><div class='add'>+  comaptible.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,dw-apb-timers-pwm2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 3</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Interface bus clock</div><div class='add'>+      - description: PWM reference clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: timer</div><div class='add'>+</div><div class='add'>+  snps,pwm-number:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: The number of PWM channels configured for this instance</div><div class='add'>+    enum: [1, 2, 3, 4, 5, 6, 7, 8]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#pwm-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm: pwm@180000 {</div><div class='add'>+      compatible = "snps,dw-apb-timers-pwm2";</div><div class='add'>+      reg = &lt;0x180000 0x200&gt;;</div><div class='add'>+      #pwm-cells = &lt;3&gt;;</div><div class='add'>+      clocks = &lt;&amp;bus&gt;, &lt;&amp;timer&gt;;</div><div class='add'>+      clock-names = "bus", "timer";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/pwm/sunplus,sp7021-pwm.yaml b/Documentation/devicetree/bindings/pwm/sunplus,sp7021-pwm.yaml<br/>new file mode 100644<br/>index 000000000000..d4fc9e8db1d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/pwm/sunplus,sp7021-pwm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/pwm/sunplus,sp7021-pwm.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/pwm/sunplus,sp7021-pwm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SoC SP7021 PWM Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Hammer Hsieh &lt;hammerh0314@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: pwm.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sunplus,sp7021-pwm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#pwm-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwm: pwm@9c007a00 {</div><div class='add'>+      compatible = "sunplus,sp7021-pwm";</div><div class='add'>+      reg = &lt;0x9c007a00 0x80&gt;;</div><div class='add'>+      clocks = &lt;&amp;clkc 0xa2&gt;;</div><div class='add'>+      #pwm-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/act8865-regulator.txt b/Documentation/devicetree/bindings/regulator/act8865-regulator.txt<br/>deleted file mode 100644<br/>index b9f58e480349..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/act8865-regulator.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/act8865-regulator.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,117 +0,0 @@</div><div class='del'>-ACT88xx regulators</div><div class='del'>--------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "active-semi,act8846" or "active-semi,act8865" or "active-semi,act8600"</div><div class='del'>-- reg: I2C slave address</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- system-power-controller: Telling whether or not this pmic is controlling</div><div class='del'>-  the system power. See Documentation/devicetree/bindings/power/power-controller.txt .</div><div class='del'>-- active-semi,vsel-high: Indicates the VSEL pin is high.</div><div class='del'>-  If this property is missing, assume the VSEL pin is low(0).</div><div class='del'>-</div><div class='del'>-Optional input supply properties:</div><div class='del'>-- for act8600:</div><div class='del'>-  - vp1-supply: The input supply for DCDC_REG1</div><div class='del'>-  - vp2-supply: The input supply for DCDC_REG2</div><div class='del'>-  - vp3-supply: The input supply for DCDC_REG3</div><div class='del'>-  - inl-supply: The input supply for LDO_REG5, LDO_REG6, LDO_REG7 and LDO_REG8</div><div class='del'>-  SUDCDC_REG4, LDO_REG9 and LDO_REG10 do not have separate supplies.</div><div class='del'>-- for act8846:</div><div class='del'>-  - vp1-supply: The input supply for REG1</div><div class='del'>-  - vp2-supply: The input supply for REG2</div><div class='del'>-  - vp3-supply: The input supply for REG3</div><div class='del'>-  - vp4-supply: The input supply for REG4</div><div class='del'>-  - inl1-supply: The input supply for REG5, REG6 and REG7</div><div class='del'>-  - inl2-supply: The input supply for REG8 and LDO_REG9</div><div class='del'>-  - inl3-supply: The input supply for REG10, REG11 and REG12</div><div class='del'>-- for act8865:</div><div class='del'>-  - vp1-supply: The input supply for DCDC_REG1</div><div class='del'>-  - vp2-supply: The input supply for DCDC_REG2</div><div class='del'>-  - vp3-supply: The input supply for DCDC_REG3</div><div class='del'>-  - inl45-supply: The input supply for LDO_REG1 and LDO_REG2</div><div class='del'>-  - inl67-supply: The input supply for LDO_REG3 and LDO_REG4</div><div class='del'>-</div><div class='del'>-Any standard regulator properties can be used to configure the single regulator.</div><div class='del'>-regulator-initial-mode, regulator-allowed-modes and regulator-mode could be specified</div><div class='del'>-for act8865 using mode values from dt-bindings/regulator/active-semi,8865-regulator.h</div><div class='del'>-file.</div><div class='del'>-</div><div class='del'>-The valid names for regulators are:</div><div class='del'>-	- for act8846:</div><div class='del'>-	REG1, REG2, REG3, REG4, REG5, REG6, REG7, REG8, REG9, REG10, REG11, REG12</div><div class='del'>-	- for act8865:</div><div class='del'>-	DCDC_REG1, DCDC_REG2, DCDC_REG3, LDO_REG1, LDO_REG2, LDO_REG3, LDO_REG4.</div><div class='del'>-	- for act8600:</div><div class='del'>-	DCDC_REG1, DCDC_REG2, DCDC_REG3, SUDCDC_REG4, LDO_REG5, LDO_REG6, LDO_REG7,</div><div class='del'>-	LDO_REG8, LDO_REG9, LDO_REG10,</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/regulator/active-semi,8865-regulator.h&gt;</div><div class='del'>-</div><div class='del'>-		i2c1: i2c@f0018000 {</div><div class='del'>-			pmic: act8865@5b {</div><div class='del'>-				compatible = "active-semi,act8865";</div><div class='del'>-				reg = &lt;0x5b&gt;;</div><div class='del'>-				active-semi,vsel-high;</div><div class='del'>-</div><div class='del'>-				regulators {</div><div class='del'>-					vcc_1v8_reg: DCDC_REG1 {</div><div class='del'>-						regulator-name = "VCC_1V8";</div><div class='del'>-						regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vcc_1v2_reg: DCDC_REG2 {</div><div class='del'>-						regulator-name = "VCC_1V2";</div><div class='del'>-						regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-</div><div class='del'>-						regulator-allowed-modes = &lt;ACT8865_REGULATOR_MODE_FIXED&gt;,</div><div class='del'>-									  &lt;ACT8865_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='del'>-						regulator-initial-mode = &lt;ACT8865_REGULATOR_MODE_FIXED&gt;;</div><div class='del'>-</div><div class='del'>-						regulator-state-mem {</div><div class='del'>-							regulator-on-in-suspend;</div><div class='del'>-							regulator-suspend-min-microvolt = &lt;1150000&gt;;</div><div class='del'>-							regulator-suspend-max-microvolt = &lt;1150000&gt;;</div><div class='del'>-							regulator-changeable-in-suspend;</div><div class='del'>-							regulator-mode = &lt;ACT8865_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vcc_3v3_reg: DCDC_REG3 {</div><div class='del'>-						regulator-name = "VCC_3V3";</div><div class='del'>-						regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vddana_reg: LDO_REG1 {</div><div class='del'>-						regulator-name = "VDDANA";</div><div class='del'>-						regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-						regulator-always-on;</div><div class='del'>-</div><div class='del'>-						regulator-allowed-modes = &lt;ACT8865_REGULATOR_MODE_NORMAL&gt;,</div><div class='del'>-									  &lt;ACT8865_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='del'>-						regulator-initial-mode = &lt;ACT8865_REGULATOR_MODE_NORMAL&gt;;</div><div class='del'>-</div><div class='del'>-						regulator-state-mem {</div><div class='del'>-							regulator-off-in-suspend;</div><div class='del'>-						};</div><div class='del'>-					};</div><div class='del'>-</div><div class='del'>-					vddfuse_reg: LDO_REG2 {</div><div class='del'>-						regulator-name = "FUSE_2V5";</div><div class='del'>-						regulator-min-microvolt = &lt;2500000&gt;;</div><div class='del'>-						regulator-max-microvolt = &lt;2500000&gt;;</div><div class='del'>-					};</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/act8945a-regulator.txt b/Documentation/devicetree/bindings/regulator/act8945a-regulator.txt<br/>deleted file mode 100644<br/>index 4017527619ab..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/act8945a-regulator.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/act8945a-regulator.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,113 +0,0 @@</div><div class='del'>-Device-Tree bindings for regulators of Active-semi ACT8945A Multi-Function Device</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible: "active-semi,act8945a", please refer to ../mfd/act8945a.txt.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- active-semi,vsel-high: Indicates if the VSEL pin is set to logic-high.</div><div class='del'>-  If this property is missing, assume the VSEL pin is set to logic-low.</div><div class='del'>-</div><div class='del'>-Optional input supply properties:</div><div class='del'>-  - vp1-supply: The input supply for REG_DCDC1</div><div class='del'>-  - vp2-supply: The input supply for REG_DCDC2</div><div class='del'>-  - vp3-supply: The input supply for REG_DCDC3</div><div class='del'>-  - inl45-supply: The input supply for REG_LDO1 and REG_LDO2</div><div class='del'>-  - inl67-supply: The input supply for REG_LDO3 and REG_LDO4</div><div class='del'>-</div><div class='del'>-Any standard regulator properties can be used to configure the single regulator.</div><div class='del'>-regulator-initial-mode, regulator-allowed-modes and regulator-mode could be</div><div class='del'>-specified using mode values from dt-bindings/regulator/active-semi,8945a-regulator.h</div><div class='del'>-file.</div><div class='del'>-</div><div class='del'>-The valid names for regulators are:</div><div class='del'>-	REG_DCDC1, REG_DCDC2, REG_DCDC3, REG_LDO1, REG_LDO2, REG_LDO3, REG_LDO4.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/regulator/active-semi,8945a-regulator.h&gt;</div><div class='del'>-</div><div class='del'>-	pmic@5b {</div><div class='del'>-		compatible = "active-semi,act8945a";</div><div class='del'>-		reg = &lt;0x5b&gt;;</div><div class='del'>-</div><div class='del'>-		active-semi,vsel-high;</div><div class='del'>-</div><div class='del'>-		regulators {</div><div class='del'>-			vdd_1v35_reg: REG_DCDC1 {</div><div class='del'>-				regulator-name = "VDD_1V35";</div><div class='del'>-				regulator-min-microvolt = &lt;1350000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1350000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-</div><div class='del'>-				regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;,</div><div class='del'>-							  &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='del'>-				regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-on-in-suspend;</div><div class='del'>-					regulator-suspend-min-microvolt=&lt;1400000&gt;;</div><div class='del'>-					regulator-suspend-max-microvolt=&lt;1400000&gt;;</div><div class='del'>-					regulator-changeable-in-suspend;</div><div class='del'>-					regulator-mode=&lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_1v2_reg: REG_DCDC2 {</div><div class='del'>-				regulator-name = "VDD_1V2";</div><div class='del'>-				regulator-min-microvolt = &lt;1100000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-</div><div class='del'>-				regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;,</div><div class='del'>-							  &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='del'>-				regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_3v3_reg: REG_DCDC3 {</div><div class='del'>-				regulator-name = "VDD_3V3";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_fuse_reg: REG_LDO1 {</div><div class='del'>-				regulator-name = "VDD_FUSE";</div><div class='del'>-				regulator-min-microvolt = &lt;2500000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;2500000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-</div><div class='del'>-				regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;,</div><div class='del'>-							  &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='del'>-				regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;;</div><div class='del'>-</div><div class='del'>-				regulator-state-mem {</div><div class='del'>-					regulator-off-in-suspend;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_3v3_lp_reg: REG_LDO2 {</div><div class='del'>-				regulator-name = "VDD_3V3_LP";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_led_reg: REG_LDO3 {</div><div class='del'>-				regulator-name = "VDD_LED";</div><div class='del'>-				regulator-min-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;3300000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			vdd_sdhc_1v8_reg: REG_LDO4 {</div><div class='del'>-				regulator-name = "VDD_SDHC_1V8";</div><div class='del'>-				regulator-min-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-				regulator-always-on;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/active-semi,act8600.yaml b/Documentation/devicetree/bindings/regulator/active-semi,act8600.yaml<br/>new file mode 100644<br/>index 000000000000..b8ca967bc83d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/active-semi,act8600.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/active-semi,act8600.yaml</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/active-semi,act8600.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Active-semi ACT8600 regulator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: active-semi,act8600</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  system-power-controller:</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the ACT8600 is responsible for powering OFF</div><div class='add'>+      the system.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  active-semi,vsel-high:</div><div class='add'>+    description:</div><div class='add'>+      Indicates the VSEL pin is high. If this property is missing,</div><div class='add'>+      the VSEL pin is assumed to be low.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      DCDC1:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp1-supply:</div><div class='add'>+            description: Handle to the VP1 input supply</div><div class='add'>+</div><div class='add'>+      DCDC2:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp2-supply:</div><div class='add'>+            description: Handle to the VP2 input supply</div><div class='add'>+</div><div class='add'>+      DCDC3:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp3-supply:</div><div class='add'>+            description: Handle to the VP3 input supply</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^(SUDCDC_REG4|LDO_REG9|LDO_REG10)$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+      "^LDO[5-8]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl-supply:</div><div class='add'>+            description: Handle to the INL input supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - compatible</div><div class='add'>+  - regulators</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pmic@5a {</div><div class='add'>+        compatible = "active-semi,act8600";</div><div class='add'>+        reg = &lt;0x5a&gt;;</div><div class='add'>+</div><div class='add'>+        regulators {</div><div class='add'>+          SUDCDC_REG4 {</div><div class='add'>+            regulator-min-microvolt = &lt;5300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;5300000&gt;;</div><div class='add'>+            inl-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO5 {</div><div class='add'>+            regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+            inl-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO6 {</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            inl-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO7 {</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            inl-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO8 {</div><div class='add'>+            regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+            inl-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO_REG9 {</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+            inl-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO_REG10 {</div><div class='add'>+            inl-supply = &lt;&amp;vcc&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml b/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml<br/>new file mode 100644<br/>index 000000000000..3725348bb235<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/active-semi,act8846.yaml</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/active-semi,act8846.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Active-semi ACT8846 regulator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: active-semi,act8846</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  system-power-controller:</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the ACT8846 is responsible for powering OFF</div><div class='add'>+      the system.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  active-semi,vsel-high:</div><div class='add'>+    description:</div><div class='add'>+      Indicates the VSEL pin is high. If this property is missing,</div><div class='add'>+      the VSEL pin is assumed to be low.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      REG1:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp1-supply:</div><div class='add'>+            description: Handle to the VP1 input supply</div><div class='add'>+</div><div class='add'>+      REG2:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp2-supply:</div><div class='add'>+            description: Handle to the VP2 input supply</div><div class='add'>+</div><div class='add'>+      REG3:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp3-supply:</div><div class='add'>+            description: Handle to the VP3 input supply</div><div class='add'>+</div><div class='add'>+      REG4:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp4-supply:</div><div class='add'>+            description: Handle to the VP4 input supply</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^REG[5-7]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl1-supply:</div><div class='add'>+            description: Handle to the INL1 input supply</div><div class='add'>+</div><div class='add'>+      "^REG[8-9]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl2-supply:</div><div class='add'>+            description: Handle to the INL2 input supply</div><div class='add'>+</div><div class='add'>+      "^REG1[0-2]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl3-supply:</div><div class='add'>+            description: Handle to the INL3 input supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - compatible</div><div class='add'>+  - regulators</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pmic@5a {</div><div class='add'>+        compatible = "active-semi,act8846";</div><div class='add'>+        reg = &lt;0x5a&gt;;</div><div class='add'>+</div><div class='add'>+        system-power-controller;</div><div class='add'>+</div><div class='add'>+        regulators {</div><div class='add'>+          REG1 {</div><div class='add'>+            regulator-name = "VCC_DDR";</div><div class='add'>+            regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG2 {</div><div class='add'>+            regulator-name = "VCC_IO";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG3 {</div><div class='add'>+            regulator-name = "VDD_LOG";</div><div class='add'>+            regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG4 {</div><div class='add'>+            regulator-name = "VCC_20";</div><div class='add'>+            regulator-min-microvolt = &lt;2000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;2000000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG5 {</div><div class='add'>+            regulator-name = "VCCIO_SD";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG6 {</div><div class='add'>+            regulator-name = "VDD10_LCD";</div><div class='add'>+            regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG7 {</div><div class='add'>+            regulator-name = "VCC_WL";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG8 {</div><div class='add'>+            regulator-name = "VCCA_33";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG9 {</div><div class='add'>+            regulator-name = "VCC_LAN";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG10 {</div><div class='add'>+            regulator-name = "VDD_10";</div><div class='add'>+            regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG11 {</div><div class='add'>+            regulator-name = "VCC_18";</div><div class='add'>+            regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG12 {</div><div class='add'>+            regulator-name = "VCC18_LCD";</div><div class='add'>+            regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/active-semi,act8865.yaml b/Documentation/devicetree/bindings/regulator/active-semi,act8865.yaml<br/>new file mode 100644<br/>index 000000000000..afe1abc2d727<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/active-semi,act8865.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/active-semi,act8865.yaml</a></div><div class='hunk'>@@ -0,0 +1,158 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/active-semi,act8865.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Active-semi ACT8865 regulator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: active-semi,act8865</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  system-power-controller:</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the ACT8865 is responsible for powering OFF</div><div class='add'>+      the system.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  active-semi,vsel-high:</div><div class='add'>+    description:</div><div class='add'>+      Indicates the VSEL pin is high. If this property is missing,</div><div class='add'>+      the VSEL pin is assumed to be low.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      DCDC_REG1:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp1-supply:</div><div class='add'>+            description: Handle to the VP1 input supply</div><div class='add'>+</div><div class='add'>+      DCDC_REG2:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp2-supply:</div><div class='add'>+            description: Handle to the VP2 input supply</div><div class='add'>+</div><div class='add'>+      DCDC_REG3:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp3-supply:</div><div class='add'>+            description: Handle to the VP3 input supply</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^LDO_REG[1-2]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl45-supply:</div><div class='add'>+            description: Handle to the INL45 input supply</div><div class='add'>+</div><div class='add'>+      "^LDO_REG[3-4]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl67-supply:</div><div class='add'>+            description: Handle to the INL67 input supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - compatible</div><div class='add'>+  - regulators</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/regulator/active-semi,8865-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pmic@5b {</div><div class='add'>+        compatible = "active-semi,act8865";</div><div class='add'>+        reg = &lt;0x5b&gt;;</div><div class='add'>+        active-semi,vsel-high;</div><div class='add'>+</div><div class='add'>+        regulators {</div><div class='add'>+          DCDC_REG1 {</div><div class='add'>+            regulator-name = "VCC_1V8";</div><div class='add'>+            regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          DCDC_REG2 {</div><div class='add'>+            regulator-name = "VCC_1V2";</div><div class='add'>+            regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8865_REGULATOR_MODE_FIXED&gt;,</div><div class='add'>+                                      &lt;ACT8865_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8865_REGULATOR_MODE_FIXED&gt;;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-on-in-suspend;</div><div class='add'>+              regulator-suspend-min-microvolt = &lt;1150000&gt;;</div><div class='add'>+              regulator-suspend-max-microvolt = &lt;1150000&gt;;</div><div class='add'>+              regulator-changeable-in-suspend;</div><div class='add'>+              regulator-mode = &lt;ACT8865_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          DCDC_REG3 {</div><div class='add'>+            regulator-name = "VCC_3V3";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO_REG1 {</div><div class='add'>+            regulator-name = "VDDANA";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8865_REGULATOR_MODE_NORMAL&gt;,</div><div class='add'>+                                      &lt;ACT8865_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8865_REGULATOR_MODE_NORMAL&gt;;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-off-in-suspend;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          LDO_REG2 {</div><div class='add'>+            regulator-name = "FUSE_2V5";</div><div class='add'>+            regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml b/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml<br/>new file mode 100644<br/>index 000000000000..bdf3f7d34ef5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/active-semi,act8945a.yaml</a></div><div class='hunk'>@@ -0,0 +1,258 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/active-semi,act8945a.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Active-semi ACT8945a regulator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: active-semi,act8945a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  system-power-controller:</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the ACT8945a is responsible for powering OFF</div><div class='add'>+      the system.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  active-semi,vsel-high:</div><div class='add'>+    description:</div><div class='add'>+      Indicates the VSEL pin is high. If this property is missing,</div><div class='add'>+      the VSEL pin is assumed to be low.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      REG_DCDC1:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp1-supply:</div><div class='add'>+            description: Handle to the VP1 input supply</div><div class='add'>+</div><div class='add'>+      REG_DCDC2:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp2-supply:</div><div class='add'>+            description: Handle to the VP2 input supply</div><div class='add'>+</div><div class='add'>+      REG_DCDC3:</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          vp3-supply:</div><div class='add'>+            description: Handle to the VP3 input supply</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^REG_LDO[1-2]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl45-supply:</div><div class='add'>+            description: Handle to the INL45 input supply</div><div class='add'>+</div><div class='add'>+      "^REG_LDO[3-4]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/regulator/regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          inl67-supply:</div><div class='add'>+            description: Handle to the INL67 input supply</div><div class='add'>+</div><div class='add'>+  charger:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: active-semi,act8945a-charger</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      active-semi,chglev-gpios:</div><div class='add'>+        description: CGHLEV GPIO</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      active-semi,lbo-gpios:</div><div class='add'>+        description: LBO GPIO</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      active-semi,input-voltage-threshold-microvolt:</div><div class='add'>+        description: Input voltage threshold</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      active-semi,precondition-timeout:</div><div class='add'>+        description: Precondition timeout</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+      active-semi,total-timeout:</div><div class='add'>+        description: Total timeout</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - compatible</div><div class='add'>+  - regulators</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/atmel-flexcom.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/regulator/active-semi,8945a-regulator.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pmic@5b {</div><div class='add'>+        compatible = "active-semi,act8945a";</div><div class='add'>+        reg = &lt;0x5b&gt;;</div><div class='add'>+        active-semi,vsel-high;</div><div class='add'>+</div><div class='add'>+        regulators {</div><div class='add'>+          REG_DCDC1 {</div><div class='add'>+            regulator-name = "VDD_1V35";</div><div class='add'>+            regulator-min-microvolt = &lt;1350000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1350000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;,</div><div class='add'>+                                      &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-on-in-suspend;</div><div class='add'>+              regulator-suspend-min-microvolt = &lt;1400000&gt;;</div><div class='add'>+              regulator-suspend-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+              regulator-changeable-in-suspend;</div><div class='add'>+              regulator-mode = &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG_DCDC2 {</div><div class='add'>+            regulator-name = "VDD_1V2";</div><div class='add'>+            regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;,</div><div class='add'>+                                      &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-off-in-suspend;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG_DCDC3 {</div><div class='add'>+            regulator-name = "VDD_3V3";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;,</div><div class='add'>+                                      &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_FIXED&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-off-in-suspend;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG_LDO1 {</div><div class='add'>+            regulator-name = "VDD_FUSE";</div><div class='add'>+            regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;2500000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;,</div><div class='add'>+                                      &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-off-in-suspend;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG_LDO2 {</div><div class='add'>+            regulator-name = "VDD_3V3_LP";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;,</div><div class='add'>+                                      &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-off-in-suspend;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG_LDO3 {</div><div class='add'>+            regulator-name = "VDD_LED";</div><div class='add'>+            regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;,</div><div class='add'>+                                      &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-off-in-suspend;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          REG_LDO4 {</div><div class='add'>+            regulator-name = "VDD_SDHC_1V8";</div><div class='add'>+            regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;,</div><div class='add'>+                                      &lt;ACT8945A_REGULATOR_MODE_LOWPOWER&gt;;</div><div class='add'>+            regulator-initial-mode = &lt;ACT8945A_REGULATOR_MODE_NORMAL&gt;;</div><div class='add'>+            regulator-always-on;</div><div class='add'>+</div><div class='add'>+            regulator-state-mem {</div><div class='add'>+              regulator-off-in-suspend;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        charger {</div><div class='add'>+          compatible = "active-semi,act8945a-charger";</div><div class='add'>+          pinctrl-names = "default";</div><div class='add'>+          pinctrl-0 = &lt;&amp;pinctrl_charger_chglev &amp;pinctrl_charger_lbo &amp;pinctrl_charger_irq&gt;;</div><div class='add'>+          interrupt-parent = &lt;&amp;pioA&gt;;</div><div class='add'>+          interrupts = &lt;45 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+          active-semi,chglev-gpios = &lt;&amp;pioA 12 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+          active-semi,lbo-gpios = &lt;&amp;pioA 72 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+          active-semi,input-voltage-threshold-microvolt = &lt;6600&gt;;</div><div class='add'>+          active-semi,precondition-timeout = &lt;40&gt;;</div><div class='add'>+          active-semi,total-timeout = &lt;3&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml b/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml<br/>index 0a66338c7e5a..17250378542a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/anatop-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/anatop-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/anatop-regulator.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Ying-Chun Liu (PaulLiu) &lt;paul.liu@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -19,43 +19,43 @@ properties:</div><div class='ctx'>   regulator-name: true</div><div class='ctx'> </div><div class='ctx'>   anatop-reg-offset:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the anatop MFD register offset.</div><div class='ctx'> </div><div class='ctx'>   anatop-vol-bit-shift:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the bit shift for the register.</div><div class='ctx'> </div><div class='ctx'>   anatop-vol-bit-width:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the number of bits used in the register.</div><div class='ctx'> </div><div class='ctx'>   anatop-min-bit-val:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the minimum value of this register.</div><div class='ctx'> </div><div class='ctx'>   anatop-min-voltage:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the minimum voltage of this regulator.</div><div class='ctx'> </div><div class='ctx'>   anatop-max-voltage:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the maximum voltage of this regulator.</div><div class='ctx'> </div><div class='ctx'>   anatop-delay-reg-offset:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the anatop MFD step time register offset.</div><div class='ctx'> </div><div class='ctx'>   anatop-delay-bit-shift:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the bit shift for the step time register.</div><div class='ctx'> </div><div class='ctx'>   anatop-delay-bit-width:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing the number of bits used in the step time register.</div><div class='ctx'> </div><div class='ctx'>   anatop-enable-bit:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: u32 value representing regulator enable bit offset.</div><div class='ctx'> </div><div class='ctx'>   vin-supply:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml b/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml<br/>index 24ace6e1e5ec..dc626517c2ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/dlg,da9121.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/dlg,da9121.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/dlg,da9121.yaml</a></div><div class='hunk'>@@ -83,6 +83,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   regulators:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |</div><div class='ctx'>       List of regulators provided by the device</div><div class='ctx'> </div><div class='hunk'>@@ -108,7 +109,7 @@ properties:</div><div class='ctx'>             description: Specify a valid GPIO for platform control of the regulator</div><div class='ctx'> </div><div class='ctx'>           dlg,ripple-cancel:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             enum: [ 0, 1, 2, 3 ]</div><div class='ctx'>             description: |</div><div class='ctx'>               Defined in include/dt-bindings/regulator/dlg,da9121-regulator.h</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/fan53555.txt b/Documentation/devicetree/bindings/regulator/fan53555.txt<br/>deleted file mode 100644<br/>index 013f096ac0aa..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/fan53555.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/fan53555.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-Binding for Fairchild FAN53555 regulators</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-  - compatible: one of "fcs,fan53555", "fcs,fan53526", "silergy,syr827",</div><div class='del'>-		"silergy,syr828" or "tcs,tcs4525".</div><div class='del'>-  - reg: I2C address</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - fcs,suspend-voltage-selector: declare which of the two available</div><div class='del'>-		voltage selector registers should be used for the suspend</div><div class='del'>-		voltage. The other one is used for the runtime voltage setting</div><div class='del'>-		Possible values are either &lt;0&gt; or &lt;1&gt;</div><div class='del'>-  - vin-supply: regulator supplying the vin pin</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	regulator@40 {</div><div class='del'>-		compatible = "fcs,fan53555";</div><div class='del'>-		regulator-name = "fan53555";</div><div class='del'>-		regulator-min-microvolt = &lt;1000000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1800000&gt;;</div><div class='del'>-		vin-supply = &lt;&amp;parent_reg&gt;;</div><div class='del'>-		fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/fcs,fan53555.yaml b/Documentation/devicetree/bindings/regulator/fcs,fan53555.yaml<br/>new file mode 100644<br/>index 000000000000..69bae90fc4b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/fcs,fan53555.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/fcs,fan53555.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/fcs,fan53555.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Fairchild FAN53555 regulators</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fcs,fan53555</div><div class='add'>+          - fcs,fan53526</div><div class='add'>+          - rockchip,rk8600</div><div class='add'>+          - rockchip,rk8602</div><div class='add'>+          - silergy,syr827</div><div class='add'>+          - silergy,syr828</div><div class='add'>+          - tcs,tcs4525</div><div class='add'>+      - items:</div><div class='add'>+          - const: rockchip,rk8601</div><div class='add'>+          - const: rockchip,rk8600</div><div class='add'>+      - items:</div><div class='add'>+          - const: rockchip,rk8603</div><div class='add'>+          - const: rockchip,rk8602</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  fcs,suspend-voltage-selector:</div><div class='add'>+    description: Declares which of the two available voltage selector</div><div class='add'>+      registers should be used for the suspend voltage. The other one is used</div><div class='add'>+      for the runtime voltage setting.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1 ]</div><div class='add'>+</div><div class='add'>+  vin-supply:</div><div class='add'>+    description: Supply for the vin pin</div><div class='add'>+</div><div class='add'>+  vsel-gpios:</div><div class='add'>+    description: Voltage Select. When this pin is LOW, VOUT is set by the</div><div class='add'>+      VSEL0 register. When this pin is HIGH, VOUT is set by the VSEL1 register.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        regulator@40 {</div><div class='add'>+            compatible = "fcs,fan53555";</div><div class='add'>+            reg = &lt;0x40&gt;;</div><div class='add'>+            regulator-name = "fan53555";</div><div class='add'>+            regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+            vin-supply = &lt;&amp;parent_reg&gt;;</div><div class='add'>+            fcs,suspend-voltage-selector = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml<br/>index 9b131c6facbc..ac0281b1cceb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/fixed-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/fixed-regulator.yaml</a></div><div class='hunk'>@@ -17,24 +17,28 @@ description:</div><div class='ctx'>   to be the same.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='del'>-</div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: regulator-fixed-clock</div><div class='del'>-  required:</div><div class='del'>-    - clocks</div><div class='del'>-else:</div><div class='del'>-  if:</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        contains:</div><div class='del'>-          const: regulator-fixed-domain</div><div class='del'>-    required:</div><div class='del'>-      - power-domains</div><div class='del'>-      - required-opps</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: regulator-fixed-clock</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: regulator-fixed-domain</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+        - required-opps</div><div class='add'>+  - not:</div><div class='add'>+      required:</div><div class='add'>+        - gpio</div><div class='add'>+        - gpios</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -49,6 +53,9 @@ properties:</div><div class='ctx'>     description: gpio to use for enable control</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     description:</div><div class='ctx'>       clock to use for enable control. This binding is only available if</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml b/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml<br/>index 69e5402da761..5a6491a81fda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ description:</div><div class='ctx'>   regulator.yaml, can also be used.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -32,7 +32,7 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -41,6 +41,7 @@ examples:</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='add'>+            interrupts = &lt;99 0&gt;;</div><div class='ctx'> </div><div class='ctx'>             regulator@0 {</div><div class='ctx'>                 compatible = "google,cros-ec-regulator";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml b/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml<br/>index f7e3d8fd3bf3..f4c1f36e52e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/gpio-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/gpio-regulator.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ description:</div><div class='ctx'>   regulator.txt, can also be used.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -85,6 +85,9 @@ properties:</div><div class='ctx'>       - current</div><div class='ctx'>     default: voltage</div><div class='ctx'> </div><div class='add'>+  vin-supply:</div><div class='add'>+    description: Input supply phandle.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - regulator-name</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml b/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml<br/>index ce0a4021ae7f..27d5e9c2bb93 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/max77650-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/max77650-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/max77650-regulator.yaml</a></div><div class='hunk'>@@ -25,7 +25,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^regulator-(ldo|sbb[0-2])$":</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/max8660.yaml b/Documentation/devicetree/bindings/regulator/max8660.yaml<br/>index 9c038698f880..f05f4644c8ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/max8660.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/max8660.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/max8660.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/max8660.yaml</a></div><div class='hunk'>@@ -24,8 +24,9 @@ properties:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      "regulator-.+":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+      "^regulator-.+$":</div><div class='add'>+        $ref: regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -43,31 +44,26 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         regulators {</div><div class='ctx'>           regulator-V3 {</div><div class='del'>-            regulator-compatible= "V3(DCDC)";</div><div class='ctx'>             regulator-min-microvolt = &lt;725000&gt;;</div><div class='ctx'>             regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='ctx'>           regulator-V4 {</div><div class='del'>-            regulator-compatible= "V4(DCDC)";</div><div class='ctx'>             regulator-min-microvolt = &lt;725000&gt;;</div><div class='ctx'>             regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='ctx'>           regulator-V5 {</div><div class='del'>-            regulator-compatible= "V5(LDO)";</div><div class='ctx'>             regulator-min-microvolt = &lt;1700000&gt;;</div><div class='ctx'>             regulator-max-microvolt = &lt;2000000&gt;;</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='ctx'>           regulator-V6 {</div><div class='del'>-            regulator-compatible= "V6(LDO)";</div><div class='ctx'>             regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>             regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'>           };</div><div class='ctx'> </div><div class='ctx'>           regulator-V7 {</div><div class='del'>-            regulator-compatible= "V7(LDO)";</div><div class='ctx'>             regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>             regulator-max-microvolt = &lt;3300000&gt;;</div><div class='ctx'>           };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/max8893.yaml b/Documentation/devicetree/bindings/regulator/max8893.yaml<br/>index 2b5e977bf409..e40ee798e198 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/max8893.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/max8893.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/max8893.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/max8893.yaml</a></div><div class='hunk'>@@ -25,7 +25,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^(ldo[1-5]|buck)$":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max14577.yaml b/Documentation/devicetree/bindings/regulator/maxim,max14577.yaml<br/>index 16f01886a601..285dc7122977 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max14577.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max14577.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max14577.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max14577.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX14577/MAX77836 MicroUSB and Companion Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX14577/MAX77836 MicroUSB</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max20411.yaml b/Documentation/devicetree/bindings/regulator/maxim,max20411.yaml<br/>new file mode 100644<br/>index 000000000000..5b3a42d24e51<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max20411.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max20411.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/maxim,max20411.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX20411 Step-Down DC-DC Converter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MAX20411 is a high-efficiency, DC-DC step-down converter. It provides</div><div class='add'>+  configurable output voltage in the range of 0.5V to 1.275V, configurable over</div><div class='add'>+  I2C.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max20411</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: GPIO connected to the EN pin, active high</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: Input supply for the device (VDD pin, 3.0V to 5.5V)</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - enable-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        regulator@39 {</div><div class='add'>+            compatible = "maxim,max20411";</div><div class='add'>+            reg = &lt;0x39&gt;;</div><div class='add'>+</div><div class='add'>+            enable-gpios = &lt;&amp;gpio 2 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            regulator-min-microvolt = &lt;800000&gt;;</div><div class='add'>+            regulator-max-microvolt = &lt;1000000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77686.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77686.yaml<br/>index bb64b679f765..0e7cd4b3ace0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77686.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77686.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77686.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max77686.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Maxim MAX77686 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77686 Power Management</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77693.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77693.yaml<br/>index 20d8559bdc2b..945a539749e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77693.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77693.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77693.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max77693.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Maxim MAX77693 MicroUSB and Companion Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chanwoo Choi &lt;cw00.choi@samsung.com&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77693 MicroUSB Integrated</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml<br/>index f2b4dd15a0f3..b704f05ea454 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77802.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77802.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max77802.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Maxim MAX77802 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Javier Martinez Canillas &lt;javier@dowhile0.org&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77802 Power Management</div><div class='hunk'>@@ -77,8 +77,9 @@ patternProperties:</div><div class='ctx'>       regulator-initial-mode: false</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      regulator-state-(standby|mem|disk):</div><div class='add'>+      "^regulator-state-(standby|mem|disk)$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: true</div><div class='ctx'>         properties:</div><div class='ctx'>           regulator-mode: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77843.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77843.yaml<br/>index a963025e96c1..9695e7242882 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77843.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max77843.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max77843.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max77843.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX77843 MicroUSB and Companion Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for Maxim MAX77843 MicroUSB Integrated</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max8952.yaml b/Documentation/devicetree/bindings/regulator/maxim,max8952.yaml<br/>index e4e8c58f6046..3ff0d7d980e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max8952.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max8952.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max8952.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max8952.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX8952 voltage regulator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: regulator.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max8973.yaml b/Documentation/devicetree/bindings/regulator/maxim,max8973.yaml<br/>index 5898dcf10f06..b92eef68c19f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max8973.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max8973.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max8973.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max8973.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX8973/MAX77621 voltage regulator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: regulator.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml b/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml<br/>index d5a44ca3df04..2b266ea43716 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/maxim,max8997.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/maxim,max8997.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/maxim,max8997.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim MAX8997 Power Management IC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Maxim MAX8997 is a Power Management IC which includes voltage and current</div><div class='hunk'>@@ -111,6 +111,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   regulators:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       List of child nodes that specify the regulators.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..79e5198e1c73<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mediatek,mt6331-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,273 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/mediatek,mt6331-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MT6331 Regulator from MediaTek Integrated</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MT6331 PMIC provides 6 BUCK and 21 LDO (Low Dropout) regulators</div><div class='add'>+  and nodes are named according to the regulator type:</div><div class='add'>+  buck-&lt;name&gt; and ldo-&lt;name&gt;.</div><div class='add'>+  MT6331 regulators node should be sub node of the MT6397 MFD node.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^buck-v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^v(core2|io18|dvfs11|dvfs12|dvfs13|dvfs14)$"</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  "^ldo-v(avdd32aud|auxa32)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^v(avdd32aud|auxa32)$"</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  "^ldo-v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^v(dig18|emc33|ibr|mc|mch|mipi|rtc|sram|usb10)$"</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  "^ldo-vcam(a|af|d|io)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^vcam(a|af|d|io)$"</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  "^ldo-vtcxo[12]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^vtcxo[12]$"</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  "^ldo-vgp[1234]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^vgp[12]$"</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pmic {</div><div class='add'>+      regulators {</div><div class='add'>+        mt6331_vdvfs11_reg: buck-vdvfs11 {</div><div class='add'>+          regulator-name = "vdvfs11";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1493750&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;1&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vdvfs12_reg: buck-vdvfs12 {</div><div class='add'>+          regulator-name = "vdvfs12";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1493750&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;1&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vdvfs13_reg: buck-vdvfs13 {</div><div class='add'>+          regulator-name = "vdvfs13";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1493750&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;1&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vdvfs14_reg: buck-vdvfs14 {</div><div class='add'>+          regulator-name = "vdvfs14";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1493750&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;1&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vcore2_reg: buck-vcore2 {</div><div class='add'>+          regulator-name = "vcore2";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1493750&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;1&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vio18_reg: buck-vio18 {</div><div class='add'>+          regulator-name = "vio18";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;0&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vtcxo1_reg: ldo-vtcxo1 {</div><div class='add'>+          regulator-name = "vtcxo1";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+          regulator-boot-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vtcxo2_reg: ldo-vtcxo2 {</div><div class='add'>+          regulator-name = "vtcxo2";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+          regulator-boot-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_avdd32_aud_reg: ldo-avdd32aud {</div><div class='add'>+          regulator-name = "avdd32_aud";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vauxa32_reg: ldo-vauxa32 {</div><div class='add'>+          regulator-name = "vauxa32";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vcama_reg: ldo-vcama {</div><div class='add'>+          regulator-name = "vcama";</div><div class='add'>+          regulator-min-microvolt = &lt;1500000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vio28_reg: ldo-vio28 {</div><div class='add'>+          regulator-name = "vio28";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+          regulator-boot-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vcamaf_reg: ldo-vcamaf {</div><div class='add'>+          regulator-name = "vcam_af";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vmc_reg: ldo-vmc {</div><div class='add'>+          regulator-name = "vmc";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vmch_reg: ldo-vmch {</div><div class='add'>+          regulator-name = "vmch";</div><div class='add'>+          regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vemc33_reg: ldo-vemc33 {</div><div class='add'>+          regulator-name = "vemc33";</div><div class='add'>+          regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vgp1_reg: ldo-vgp1 {</div><div class='add'>+          regulator-name = "vgp1";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vsim1_reg: ldo-vsim1 {</div><div class='add'>+          regulator-name = "vsim1";</div><div class='add'>+          regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vsim2_reg: ldo-vsim2 {</div><div class='add'>+          regulator-name = "vsim2";</div><div class='add'>+          regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vmipi_reg: ldo-vmipi {</div><div class='add'>+          regulator-name = "vmipi";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vibr_reg: ldo-vibr {</div><div class='add'>+          regulator-name = "vibr";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vgp4_reg: ldo-vgp4 {</div><div class='add'>+          regulator-name = "vgp4";</div><div class='add'>+          regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vcamd_reg: ldo-vcamd {</div><div class='add'>+          regulator-name = "vcamd";</div><div class='add'>+          regulator-min-microvolt = &lt;900000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vusb10_reg: ldo-vusb10 {</div><div class='add'>+          regulator-name = "vusb";</div><div class='add'>+          regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+          regulator-boot-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vcamio_reg: ldo-vcamio {</div><div class='add'>+          regulator-name = "vcam_io";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vsram_reg: ldo-vsram {</div><div class='add'>+          regulator-name = "vsram";</div><div class='add'>+          regulator-min-microvolt = &lt;1012500&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1012500&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+          regulator-boot-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vgp2_reg: ldo-vgp2 {</div><div class='add'>+          regulator-name = "vgp2";</div><div class='add'>+          regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1500000&gt;;</div><div class='add'>+          regulator-boot-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vgp3_reg: ldo-vgp3 {</div><div class='add'>+          regulator-name = "vgp3";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vrtc_reg: ldo-vrtc {</div><div class='add'>+          regulator-name = "vrtc";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6331_vdig18_reg: ldo-vdig18 {</div><div class='add'>+          regulator-name = "dvdd18_dig";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..2eb512c29a0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mediatek,mt6332-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/mediatek,mt6332-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MT6332 Regulator from MediaTek Integrated</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MT6332 Companion PMIC provides 6 BUCK and 4 LDO (Low Dropout)</div><div class='add'>+  regulators and nodes are named according to the regulator type:</div><div class='add'>+  buck-&lt;name&gt; and ldo-&lt;name&gt;.</div><div class='add'>+  MT6332 regulators node should be sub node of the MT6397 MFD node.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^buck-v(dram|dvfs2|pa|rf18a|rf18b|sbst)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^v(dram|dvfs2|pa|rf18a|rf18b|sbst)$"</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  "^ldo-v(bif28|dig18|sram|usb33)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      regulator-name:</div><div class='add'>+        pattern: "^v(bif28|dig18|sram|usb33)$"</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pmic {</div><div class='add'>+      regulators {</div><div class='add'>+        mt6332_vdram_reg: buck-vdram {</div><div class='add'>+          regulator-name = "vdram";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1493750&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vdvfs2_reg: buck-vdvfs2 {</div><div class='add'>+          regulator-name = "vdvfs2";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1312500&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;1&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vpa_reg: buck-vpa {</div><div class='add'>+          regulator-name = "vpa";</div><div class='add'>+          regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3400000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vrf18a_reg: buck-vrf18a {</div><div class='add'>+          regulator-name = "vrf18a";</div><div class='add'>+          regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2240625&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vrf18b_reg: buck-vrf18b {</div><div class='add'>+          regulator-name = "vrf18b";</div><div class='add'>+          regulator-min-microvolt = &lt;1050000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2240625&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vsbst_reg: buck-vsbst {</div><div class='add'>+          regulator-name = "vsbst";</div><div class='add'>+          regulator-min-microvolt = &lt;3500000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;7468750&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vauxb32_reg: ldo-vauxb32 {</div><div class='add'>+          regulator-name = "vauxb32";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3200000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vbif28_reg: ldo-vbif28 {</div><div class='add'>+          regulator-name = "vbif28";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vdig18_reg: ldo-vdig18 {</div><div class='add'>+          regulator-name = "vdig18";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vsram_reg: ldo-vsram {</div><div class='add'>+          regulator-name = "vauxa32";</div><div class='add'>+          regulator-min-microvolt = &lt;700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1493750&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6332_vusb33_reg: ldo-vusb33 {</div><div class='add'>+          regulator-name = "vusb33";</div><div class='add'>+          regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml b/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..6327bb2f6ee0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mediatek,mt6357-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/mediatek,mt6357-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT6357 Regulators</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chen Zhong &lt;chen.zhong@mediatek.com&gt;</div><div class='add'>+  - Fabien Parent &lt;fabien.parent@linaro.org&gt;</div><div class='add'>+  - Alexandre Mergnat &lt;amergnat@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MT6357 PMIC provides 5 BUCK and 29 LDO.</div><div class='add'>+  Regulators and nodes are named according to the regulator type:</div><div class='add'>+  - buck-&lt;name&gt;</div><div class='add'>+  - ldo-&lt;name&gt;.</div><div class='add'>+  MT6357 regulators node should be sub node of the MT6397 MFD node.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^buck-v(core|modem|pa|proc|s1)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for single BUCK regulator.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+      - regulator-min-microvolt</div><div class='add'>+      - regulator-max-microvolt</div><div class='add'>+</div><div class='add'>+  "^ldo-v(camio18|aud28|aux18|io18|io28|rf12|rf18|cn18|cn28|fe28)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: fixed-regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for single fixed LDO regulator.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+      - regulator-min-microvolt</div><div class='add'>+      - regulator-max-microvolt</div><div class='add'>+</div><div class='add'>+  "^ldo-v(efuse|ibr|ldo28|mch|cama|camd|cn33-bt|cn33-wifi)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for single LDO regulator.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+      - regulator-min-microvolt</div><div class='add'>+      - regulator-max-microvolt</div><div class='add'>+</div><div class='add'>+  "^ldo-v(xo22|emc|mc|sim1|sim2|sram-others|sram-proc|dram|usb33)$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for single LDO regulator.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+      - regulator-min-microvolt</div><div class='add'>+      - regulator-max-microvolt</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pmic {</div><div class='add'>+      regulators {</div><div class='add'>+        mt6357_vproc_reg: buck-vproc {</div><div class='add'>+          regulator-name = "vproc";</div><div class='add'>+          regulator-min-microvolt = &lt;518750&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1312500&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;220&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcore_reg: buck-vcore {</div><div class='add'>+          regulator-name = "vcore";</div><div class='add'>+          regulator-min-microvolt = &lt;518750&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1312500&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;220&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vmodem_reg: buck-vmodem {</div><div class='add'>+          regulator-name = "vmodem";</div><div class='add'>+          regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1193750&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;220&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vs1_reg: buck-vs1 {</div><div class='add'>+          regulator-name = "vs1";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2200000&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;12500&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;220&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vpa_reg: buck-vpa {</div><div class='add'>+          regulator-name = "vpa";</div><div class='add'>+          regulator-min-microvolt = &lt;500000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3650000&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;50000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;220&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vfe28_reg: ldo-vfe28 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vfe28";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vxo22_reg: ldo-vxo22 {</div><div class='add'>+          regulator-name = "vxo22";</div><div class='add'>+          regulator-min-microvolt = &lt;2200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2400000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;110&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vrf18_reg: ldo-vrf18 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vrf18";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;110&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vrf12_reg: ldo-vrf12 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vrf12";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;110&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vefuse_reg: ldo-vefuse {</div><div class='add'>+          regulator-name = "vefuse";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcn33_bt_reg: ldo-vcn33-bt {</div><div class='add'>+          regulator-name = "vcn33-bt";</div><div class='add'>+          regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3500000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcn33_wifi_reg: ldo-vcn33-wifi {</div><div class='add'>+          regulator-name = "vcn33-wifi";</div><div class='add'>+          regulator-min-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3500000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcn28_reg: ldo-vcn28 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vcn28";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcn18_reg: ldo-vcn18 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vcn18";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcama_reg: ldo-vcama {</div><div class='add'>+          regulator-name = "vcama";</div><div class='add'>+          regulator-min-microvolt = &lt;2500000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcamd_reg: ldo-vcamd {</div><div class='add'>+          regulator-name = "vcamd";</div><div class='add'>+          regulator-min-microvolt = &lt;1000000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vcamio_reg: ldo-vcamio18 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vcamio";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vldo28_reg: ldo-vldo28 {</div><div class='add'>+          regulator-name = "vldo28";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3000000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vsram_others_reg: ldo-vsram-others {</div><div class='add'>+          regulator-name = "vsram-others";</div><div class='add'>+          regulator-min-microvolt = &lt;518750&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1312500&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;110&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vsram_proc_reg: ldo-vsram-proc {</div><div class='add'>+          regulator-name = "vsram-proc";</div><div class='add'>+          regulator-min-microvolt = &lt;518750&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1312500&gt;;</div><div class='add'>+          regulator-ramp-delay = &lt;6250&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;110&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vaux18_reg: ldo-vaux18 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vaux18";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vaud28_reg: ldo-vaud28 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vaud28";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vio28_reg: ldo-vio28 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vio28";</div><div class='add'>+          regulator-min-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;2800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vio18_reg: ldo-vio18 {</div><div class='add'>+          compatible = "regulator-fixed";</div><div class='add'>+          regulator-name = "vio18";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vdram_reg: ldo-vdram {</div><div class='add'>+          regulator-name = "vdram";</div><div class='add'>+          regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;3300&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vmc_reg: ldo-vmc {</div><div class='add'>+          regulator-name = "vmc";</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;44&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vmch_reg: ldo-vmch {</div><div class='add'>+          regulator-name = "vmch";</div><div class='add'>+          regulator-min-microvolt = &lt;2900000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;44&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vemc_reg: ldo-vemc {</div><div class='add'>+          regulator-name = "vemc";</div><div class='add'>+          regulator-min-microvolt = &lt;2900000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;44&gt;;</div><div class='add'>+          regulator-always-on;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vsim1_reg: ldo-vsim1 {</div><div class='add'>+          regulator-name = "vsim1";</div><div class='add'>+          regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vsim2_reg: ldo-vsim2 {</div><div class='add'>+          regulator-name = "vsim2";</div><div class='add'>+          regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vibr_reg: ldo-vibr {</div><div class='add'>+          regulator-name = "vibr";</div><div class='add'>+          regulator-min-microvolt = &lt;1200000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3300000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;44&gt;;</div><div class='add'>+        };</div><div class='add'>+        mt6357_vusb33_reg: ldo-vusb33 {</div><div class='add'>+          regulator-name = "vusb33";</div><div class='add'>+          regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;3100000&gt;;</div><div class='add'>+          regulator-enable-ramp-delay = &lt;264&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml b/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml<br/>index 90727fdc1283..2e720d152890 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mps,mp5416.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mps,mp5416.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mps,mp5416.yaml</a></div><div class='hunk'>@@ -15,6 +15,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - mps,mp5416</div><div class='add'>+      - mps,mp5496</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -27,11 +28,11 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^buck[1-4]$":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='ctx'>       "^ldo[1-4]$":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml b/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml<br/>index 9245b7199439..374a4f6b1e23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mps,mp886x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mps,mp886x.yaml</a></div><div class='hunk'>@@ -28,7 +28,7 @@ properties:</div><div class='ctx'>   mps,fb-voltage-divider:</div><div class='ctx'>     description: An array of two integers containing the resistor</div><div class='ctx'>       values R1 and R2 of the feedback voltage divider in kilo ohms.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   mps,switch-frequency-hz:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml b/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml<br/>index c2e8c54e5311..f3fcfc8be72f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mps,mpq7920.yaml</a></div><div class='hunk'>@@ -29,7 +29,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       mps,switch-freq:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint8"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>         enum: [0, 1, 2, 3]</div><div class='ctx'>         default: 2</div><div class='ctx'>         description: |</div><div class='hunk'>@@ -51,14 +51,14 @@ properties:</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           mps,buck-softstart:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint8"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>             enum: [0, 1, 2, 3]</div><div class='ctx'>             description: |</div><div class='ctx'>               defines the soft start time of this buck, must be one of the following</div><div class='ctx'>               corresponding values 150us, 300us, 610us, 920us</div><div class='ctx'> </div><div class='ctx'>           mps,buck-phase-delay:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint8"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>             enum: [0, 1, 2, 3]</div><div class='ctx'>             description: |</div><div class='ctx'>               defines the phase delay of this buck, must be one of the following</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml b/Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml<br/>new file mode 100644<br/>index 000000000000..2185cd011c46<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/mps,mpq7932.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Monolithic Power System MPQ7932 PMIC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Saravanan Sekar &lt;saravanan@linumiz.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mps,mpq7932</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      list of regulators provided by this controller, must be named</div><div class='add'>+      after their hardware counterparts BUCK[1-6]</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^buck[1-6]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - regulators</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pmic@3 {</div><div class='add'>+            compatible = "mps,mpq7932";</div><div class='add'>+            reg = &lt;0x3&gt;;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                buck1 {</div><div class='add'>+                    regulator-name = "buck1";</div><div class='add'>+                    regulator-min-microvolt = &lt;1600000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                buck2 {</div><div class='add'>+                    regulator-name = "buck2";</div><div class='add'>+                    regulator-min-microvolt = &lt;1700000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml b/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml<br/>index 61dd5af80db6..6317daf76d1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml</a></div><div class='hunk'>@@ -28,10 +28,11 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^vbuck[1-4]$":</div><div class='ctx'>         type: object</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='del'>-          regulator-name:</div><div class='add'>+          regulator-compatible:</div><div class='ctx'>             pattern: "^vbuck[1-4]$"</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='hunk'>@@ -55,7 +56,7 @@ examples:</div><div class='ctx'>           regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1193750&gt;;</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='del'>-          regulator-allowed-modes = &lt;0 1 2 4&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1 2&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         vbuck3 {</div><div class='hunk'>@@ -63,7 +64,7 @@ examples:</div><div class='ctx'>           regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'>           regulator-max-microvolt = &lt;1193750&gt;;</div><div class='ctx'>           regulator-enable-ramp-delay = &lt;256&gt;;</div><div class='del'>-          regulator-allowed-modes = &lt;0 1 2 4&gt;;</div><div class='add'>+          regulator-allowed-modes = &lt;0 1 2&gt;;</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml b/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml<br/>index 8cc413eb482d..d6b3b5a5c0b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml</a></div><div class='hunk'>@@ -17,7 +17,7 @@ description: |</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^buck_v(s1|gpu11|modem|pu|core|s2|pa|proc2|proc1|core_sshub)$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -27,7 +27,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo_v(ibr|rf12|usb|camio|efuse|xo22)$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -37,7 +37,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo_v(rfck|emc|a12|a09|ufs|bbck)$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -47,7 +47,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo_vcn(18|13|33_1_bt|13_1_wifi|33_2_bt|33_2_wifi)$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -57,7 +57,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo_vsram_(proc2|others|md|proc1|others_sshub)$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -67,7 +67,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo_v(fe|bif|io)28$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -77,7 +77,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo_v(aud|io|aux|rf|m)18$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -87,7 +87,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^ldo_vsim[12]$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml b/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml<br/>index a462d99a25cc..9c879bc3c360 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml</a></div><div class='hunk'>@@ -26,10 +26,12 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^buck[12]$":</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>   "^ldo[123567]$":</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -44,7 +46,6 @@ examples:</div><div class='ctx'>       compatible = "mediatek,mt6360-regulator";</div><div class='ctx'>       LDO_VIN3-supply = &lt;&amp;BUCK2&gt;;</div><div class='ctx'>       buck1 {</div><div class='del'>-        regulator-compatible = "BUCK1";</div><div class='ctx'>         regulator-name = "mt6360,buck1";</div><div class='ctx'>         regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;1300000&gt;;</div><div class='hunk'>@@ -53,7 +54,6 @@ examples:</div><div class='ctx'>              MT6360_OPMODE_ULP&gt;;</div><div class='ctx'>       };</div><div class='ctx'>       BUCK2: buck2 {</div><div class='del'>-        regulator-compatible = "BUCK2";</div><div class='ctx'>         regulator-name = "mt6360,buck2";</div><div class='ctx'>         regulator-min-microvolt = &lt;300000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;1300000&gt;;</div><div class='hunk'>@@ -62,7 +62,6 @@ examples:</div><div class='ctx'>              MT6360_OPMODE_ULP&gt;;</div><div class='ctx'>       };</div><div class='ctx'>       ldo6 {</div><div class='del'>-        regulator-compatible = "LDO6";</div><div class='ctx'>         regulator-name = "mt6360,ldo6";</div><div class='ctx'>         regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;2100000&gt;;</div><div class='hunk'>@@ -70,7 +69,6 @@ examples:</div><div class='ctx'>              MT6360_OPMODE_LP&gt;;</div><div class='ctx'>       };</div><div class='ctx'>       ldo7 {</div><div class='del'>-        regulator-compatible = "LDO7";</div><div class='ctx'>         regulator-name = "mt6360,ldo7";</div><div class='ctx'>         regulator-min-microvolt = &lt;500000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;2100000&gt;;</div><div class='hunk'>@@ -78,15 +76,13 @@ examples:</div><div class='ctx'>              MT6360_OPMODE_LP&gt;;</div><div class='ctx'>       };</div><div class='ctx'>       ldo1 {</div><div class='del'>-        regulator-compatible = "LDO1";</div><div class='ctx'>         regulator-name = "mt6360,ldo1";</div><div class='ctx'>         regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;3600000&gt;;</div><div class='ctx'>         regulator-allowed-modes = &lt;MT6360_OPMODE_NORMAL</div><div class='ctx'>              MT6360_OPMODE_LP&gt;;</div><div class='ctx'>       };</div><div class='del'>-        ldo2 {</div><div class='del'>-        regulator-compatible = "LDO2";</div><div class='add'>+      ldo2 {</div><div class='ctx'>         regulator-name = "mt6360,ldo2";</div><div class='ctx'>         regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;3600000&gt;;</div><div class='hunk'>@@ -94,7 +90,6 @@ examples:</div><div class='ctx'>              MT6360_OPMODE_LP&gt;;</div><div class='ctx'>       };</div><div class='ctx'>       ldo3 {</div><div class='del'>-        regulator-compatible = "LDO3";</div><div class='ctx'>         regulator-name = "mt6360,ldo3";</div><div class='ctx'>         regulator-min-microvolt = &lt;1200000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;3600000&gt;;</div><div class='hunk'>@@ -102,7 +97,6 @@ examples:</div><div class='ctx'>              MT6360_OPMODE_LP&gt;;</div><div class='ctx'>       };</div><div class='ctx'>       ldo5 {</div><div class='del'>-        regulator-compatible = "LDO5";</div><div class='ctx'>         regulator-name = "mt6360,ldo5";</div><div class='ctx'>         regulator-min-microvolt = &lt;2700000&gt;;</div><div class='ctx'>         regulator-max-microvolt = &lt;3600000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml b/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml<br/>index f70f2e758a00..3d469b8e9774 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/nxp,pca9450-regulator.yaml</a></div><div class='hunk'>@@ -17,10 +17,10 @@ description: |</div><div class='ctx'>   Datasheet is available at</div><div class='ctx'>   https://www.nxp.com/docs/en/data-sheet/PCA9450DS.pdf</div><div class='ctx'> </div><div class='del'>-#The valid names for PCA9450 regulator nodes are:</div><div class='del'>-#BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6,</div><div class='del'>-#LDO1, LDO2, LDO3, LDO4, LDO5</div><div class='del'>-#Note: Buck3 removed on PCA9450B and connect with Buck1 on PCA9450C.</div><div class='add'>+# The valid names for PCA9450 regulator nodes are:</div><div class='add'>+# BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6,</div><div class='add'>+# LDO1, LDO2, LDO3, LDO4, LDO5</div><div class='add'>+# Note: Buck3 removed on PCA9450B and connect with Buck1 on PCA9450C.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -47,12 +47,6 @@ properties:</div><div class='ctx'>         description:</div><div class='ctx'>           Properties for single LDO regulator.</div><div class='ctx'> </div><div class='del'>-        properties:</div><div class='del'>-          regulator-name:</div><div class='del'>-            pattern: "^LDO[1-5]$"</div><div class='del'>-            description:</div><div class='del'>-              should be "LDO1", ..., "LDO5"</div><div class='del'>-</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       "^BUCK[1-6]$":</div><div class='hunk'>@@ -62,13 +56,8 @@ properties:</div><div class='ctx'>           Properties for single BUCK regulator.</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='del'>-          regulator-name:</div><div class='del'>-            pattern: "^BUCK[1-6]$"</div><div class='del'>-            description:</div><div class='del'>-              should be "BUCK1", ..., "BUCK6"</div><div class='del'>-</div><div class='ctx'>           nxp,dvs-run-voltage:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             minimum: 600000</div><div class='ctx'>             maximum: 2187500</div><div class='ctx'>             description:</div><div class='hunk'>@@ -76,7 +65,7 @@ properties:</div><div class='ctx'>               dvs(dynamic voltage scaling) property.</div><div class='ctx'> </div><div class='ctx'>           nxp,dvs-standby-voltage:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             minimum: 600000</div><div class='ctx'>             maximum: 2187500</div><div class='ctx'>             description:</div><div class='hunk'>@@ -92,6 +81,17 @@ properties:</div><div class='ctx'>       LDO5CTRL_L or LDO5CTRL_H register. Use this if the SD_VSEL signal is</div><div class='ctx'>       connected to a host GPIO.</div><div class='ctx'> </div><div class='add'>+  nxp,i2c-lt-enable:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates that the I2C Level Translator is used.</div><div class='add'>+</div><div class='add'>+  nxp,wdog_b-warm-reset:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      When WDOG_B signal is asserted a warm reset will be done instead of cold</div><div class='add'>+      reset.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml b/Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml<br/>index aabf50f5b39e..894bdbca78a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/nxp,pf8x00-regulator.yaml</a></div><div class='hunk'>@@ -38,12 +38,6 @@ properties:</div><div class='ctx'>         description:</div><div class='ctx'>           Properties for single LDO regulator.</div><div class='ctx'> </div><div class='del'>-        properties:</div><div class='del'>-          regulator-name:</div><div class='del'>-            pattern: "^ldo[1-4]$"</div><div class='del'>-            description:</div><div class='del'>-              should be "ldo1", ..., "ldo4"</div><div class='del'>-</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>       "^buck[1-7]$":</div><div class='hunk'>@@ -53,13 +47,8 @@ properties:</div><div class='ctx'>           Properties for single BUCK regulator.</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='del'>-          regulator-name:</div><div class='del'>-            pattern: "^buck[1-7]$"</div><div class='del'>-            description:</div><div class='del'>-              should be "buck1", ..., "buck7"</div><div class='del'>-</div><div class='ctx'>           nxp,ilim-ma:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             minimum: 2100</div><div class='ctx'>             maximum: 4500</div><div class='ctx'>             deprecated: true</div><div class='hunk'>@@ -75,7 +64,7 @@ properties:</div><div class='ctx'>               4500</div><div class='ctx'> </div><div class='ctx'>           nxp,phase-shift:</div><div class='del'>-            $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>             default: 0</div><div class='ctx'>             enum: [ 0, 45, 90, 135, 180, 225, 270, 315 ]</div><div class='ctx'>             description:</div><div class='hunk'>@@ -90,12 +79,6 @@ properties:</div><div class='ctx'>         description:</div><div class='ctx'>           Properties for single VSNVS regulator.</div><div class='ctx'> </div><div class='del'>-        properties:</div><div class='del'>-          regulator-name:</div><div class='del'>-            pattern: "^vsnvs$"</div><div class='del'>-            description:</div><div class='del'>-              should be "vsnvs"</div><div class='del'>-</div><div class='ctx'>         unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='hunk'>@@ -109,7 +92,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c1 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.yaml b/Documentation/devicetree/bindings/regulator/pfuze100.yaml<br/>index a26bbd68b729..67a30b23b92c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/pfuze100.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/pfuze100.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/pfuze100.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/pfuze100.yaml</a></div><div class='hunk'>@@ -63,19 +63,19 @@ properties:</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^sw([1-4]|[1-4][a-c]|[1-4][a-c][a-c])$":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='ctx'>       "^vgen[1-6]$":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='ctx'>       "^vldo[1-4]$":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='ctx'>       "^(vsnvs|vref|vrefddr|swbst|coin|v33|vccsd)$":</div><div class='del'>-        $ref: "regulator.yaml#"</div><div class='add'>+        $ref: regulator.yaml#</div><div class='ctx'>         type: object</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/pwm-regulator.txt b/Documentation/devicetree/bindings/regulator/pwm-regulator.txt<br/>deleted file mode 100644<br/>index 3d78d507e29f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/pwm-regulator.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/pwm-regulator.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,92 +0,0 @@</div><div class='del'>-Bindings for the Generic PWM Regulator</div><div class='del'>-======================================</div><div class='del'>-</div><div class='del'>-Currently supports 2 modes of operation:</div><div class='del'>-</div><div class='del'>-Voltage Table:		When in this mode, a voltage table (See below) of</div><div class='del'>-			predefined voltage &lt;=&gt; duty-cycle values must be</div><div class='del'>-			provided via DT. Limitations are that the regulator can</div><div class='del'>-			only operate at the voltages supplied in the table.</div><div class='del'>-			Intermediary duty-cycle values which would normally</div><div class='del'>-			allow finer grained voltage selection are ignored and</div><div class='del'>-			rendered useless.  Although more control is given to</div><div class='del'>-			the user if the assumptions made in continuous-voltage</div><div class='del'>-			mode do not reign true.</div><div class='del'>-</div><div class='del'>-Continuous Voltage:	This mode uses the regulator's maximum and minimum</div><div class='del'>-			supplied voltages specified in the</div><div class='del'>-			regulator-{min,max}-microvolt properties to calculate</div><div class='del'>-			appropriate duty-cycle values.  This allows for a much</div><div class='del'>-			more fine grained solution when compared with</div><div class='del'>-			voltage-table mode above.  This solution does make an</div><div class='del'>-			assumption that a %50 duty-cycle value will cause the</div><div class='del'>-			regulator voltage to run at half way between the</div><div class='del'>-			supplied max_uV and min_uV values.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- compatible:		Should be "pwm-regulator"</div><div class='del'>-</div><div class='del'>-- pwms:			PWM specification (See: ../pwm/pwm.txt)</div><div class='del'>-</div><div class='del'>-Only required for Voltage Table Mode:</div><div class='del'>-- voltage-table: 	Voltage and Duty-Cycle table consisting of 2 cells</div><div class='del'>-			    First cell is voltage in microvolts (uV)</div><div class='del'>-			    Second cell is duty-cycle in percent (%)</div><div class='del'>-</div><div class='del'>-Optional properties for Continuous mode:</div><div class='del'>-- pwm-dutycycle-unit:	Integer value encoding the duty cycle unit. If not</div><div class='del'>-			defined, &lt;100&gt; is assumed, meaning that</div><div class='del'>-			pwm-dutycycle-range contains values expressed in</div><div class='del'>-			percent.</div><div class='del'>-</div><div class='del'>-- pwm-dutycycle-range:	Should contain 2 entries. The first entry is encoding</div><div class='del'>-			the dutycycle for regulator-min-microvolt and the</div><div class='del'>-			second one the dutycycle for regulator-max-microvolt.</div><div class='del'>-			Duty cycle values are expressed in pwm-dutycycle-unit.</div><div class='del'>-			If not defined, &lt;0 100&gt; is assumed.</div><div class='del'>-</div><div class='del'>-NB: To be clear, if voltage-table is provided, then the device will be used</div><div class='del'>-in Voltage Table Mode.  If no voltage-table is provided, then the device will</div><div class='del'>-be used in Continuous Voltage Mode.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>---------------------</div><div class='del'>-- enable-gpios:		GPIO to use to enable/disable the regulator</div><div class='del'>-</div><div class='del'>-Any property defined as part of the core regulator binding can also be used.</div><div class='del'>-(See: ../regulator/regulator.txt)</div><div class='del'>-</div><div class='del'>-Continuous Voltage With Enable GPIO Example:</div><div class='del'>-	pwm_regulator {</div><div class='del'>-		compatible = "pwm-regulator";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 8448 0&gt;;</div><div class='del'>-		enable-gpios = &lt;&amp;gpio0 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		regulator-min-microvolt = &lt;1016000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1114000&gt;;</div><div class='del'>-		regulator-name = "vdd_logic";</div><div class='del'>-		/* unit == per-mille */</div><div class='del'>-		pwm-dutycycle-unit = &lt;1000&gt;;</div><div class='del'>-		/*</div><div class='del'>-		 * Inverted PWM logic, and the duty cycle range is limited</div><div class='del'>-		 * to 30%-70%.</div><div class='del'>-		 */</div><div class='del'>-		pwm-dutycycle-range = &lt;700 300&gt;; /* */</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Voltage Table Example:</div><div class='del'>-	pwm_regulator {</div><div class='del'>-		compatible = "pwm-regulator";</div><div class='del'>-		pwms = &lt;&amp;pwm1 0 8448 0&gt;;</div><div class='del'>-		regulator-min-microvolt = &lt;1016000&gt;;</div><div class='del'>-		regulator-max-microvolt = &lt;1114000&gt;;</div><div class='del'>-		regulator-name = "vdd_logic";</div><div class='del'>-</div><div class='del'>-			      /* Voltage Duty-Cycle */</div><div class='del'>-		voltage-table = &lt;1114000 0&gt;,</div><div class='del'>-				&lt;1095000 10&gt;,</div><div class='del'>-				&lt;1076000 20&gt;,</div><div class='del'>-				&lt;1056000 30&gt;,</div><div class='del'>-				&lt;1036000 40&gt;,</div><div class='del'>-				&lt;1016000 50&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/pwm-regulator.yaml b/Documentation/devicetree/bindings/regulator/pwm-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..7e58471097f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/pwm-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/pwm-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,126 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/pwm-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Generic PWM Regulator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Brian Norris &lt;briannorris@chromium.org&gt;</div><div class='add'>+  - Lee Jones &lt;lee@kernel.org&gt;</div><div class='add'>+  - Alexandre Courbot &lt;acourbot@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Currently supports 2 modes of operation:</div><div class='add'>+</div><div class='add'>+  Voltage Table:</div><div class='add'>+    When in this mode, a voltage table (See below) of predefined voltage &lt;=&gt;</div><div class='add'>+    duty-cycle values must be provided via DT. Limitations are that the</div><div class='add'>+    regulator can only operate at the voltages supplied in the table.</div><div class='add'>+    Intermediary duty-cycle values which would normally allow finer grained</div><div class='add'>+    voltage selection are ignored and rendered useless.  Although more control</div><div class='add'>+    is given to the user if the assumptions made in continuous-voltage mode do</div><div class='add'>+    not reign true.</div><div class='add'>+</div><div class='add'>+  Continuous Voltage:</div><div class='add'>+    This mode uses the regulator's maximum and minimum supplied voltages</div><div class='add'>+    specified in the regulator-{min,max}-microvolt properties to calculate</div><div class='add'>+    appropriate duty-cycle values.  This allows for a much more fine grained</div><div class='add'>+    solution when compared with voltage-table mode above.  This solution does</div><div class='add'>+    make an assumption that a %50 duty-cycle value will cause the regulator</div><div class='add'>+    voltage to run at half way between the supplied max_uV and min_uV values.</div><div class='add'>+</div><div class='add'>+  If voltage-table is provided, then the device will be used in Voltage Table</div><div class='add'>+  Mode.  If no voltage-table is provided, then the device will be used in</div><div class='add'>+  Continuous Voltage Mode.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: pwm-regulator</div><div class='add'>+</div><div class='add'>+  pwms:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  voltage-table:</div><div class='add'>+    description: Voltage and Duty-Cycle table.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: voltage in microvolts (uV)</div><div class='add'>+        - description: duty-cycle in percent (%)</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: Regulator enable GPIO</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+   # Optional properties for Continuous mode:</div><div class='add'>+  pwm-dutycycle-unit:</div><div class='add'>+    description:</div><div class='add'>+      Integer value encoding the duty cycle unit. If not</div><div class='add'>+        defined, &lt;100&gt; is assumed, meaning that</div><div class='add'>+        pwm-dutycycle-range contains values expressed in</div><div class='add'>+        percent.</div><div class='add'>+    default: 100</div><div class='add'>+</div><div class='add'>+  pwm-dutycycle-range:</div><div class='add'>+    description:</div><div class='add'>+      Should contain 2 entries. The first entry is encoding</div><div class='add'>+        the dutycycle for regulator-min-microvolt and the</div><div class='add'>+        second one the dutycycle for regulator-max-microvolt.</div><div class='add'>+        Duty cycle values are expressed in pwm-dutycycle-unit.</div><div class='add'>+        If not defined, &lt;0 100&gt; is assumed.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      - description: the dutycycle for regulator-min-microvolt</div><div class='add'>+      - description: the dutycycle for regulator-max-microvolt</div><div class='add'>+    default: [ 0 100 ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - pwms</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    // Continuous Voltage With Enable GPIO Example:</div><div class='add'>+    regulator {</div><div class='add'>+        compatible = "pwm-regulator";</div><div class='add'>+        pwms = &lt;&amp;pwm1 0 8448 0&gt;;</div><div class='add'>+        enable-gpios = &lt;&amp;gpio0 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        regulator-min-microvolt = &lt;1016000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;1114000&gt;;</div><div class='add'>+        regulator-name = "vdd_logic";</div><div class='add'>+        /* unit == per-mille */</div><div class='add'>+        pwm-dutycycle-unit = &lt;1000&gt;;</div><div class='add'>+        /*</div><div class='add'>+        * Inverted PWM logic, and the duty cycle range is limited</div><div class='add'>+        * to 30%-70%.</div><div class='add'>+        */</div><div class='add'>+        pwm-dutycycle-range = &lt;700 300&gt;; /* */</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // Voltage Table Example:</div><div class='add'>+    regulator {</div><div class='add'>+        compatible = "pwm-regulator";</div><div class='add'>+        pwms = &lt;&amp;pwm1 0 8448 0&gt;;</div><div class='add'>+        regulator-min-microvolt = &lt;1016000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;1114000&gt;;</div><div class='add'>+        regulator-name = "vdd_logic";</div><div class='add'>+</div><div class='add'>+                /* Voltage Duty-Cycle */</div><div class='add'>+        voltage-table = &lt;1114000 0&gt;,</div><div class='add'>+            &lt;1095000 10&gt;,</div><div class='add'>+            &lt;1076000 20&gt;,</div><div class='add'>+            &lt;1056000 30&gt;,</div><div class='add'>+            &lt;1036000 40&gt;,</div><div class='add'>+            &lt;1016000 50&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..8a08698e3484<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/qcom,rpm-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,128 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/qcom,rpm-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPM regulator</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Qualcomm RPM regulator is modelled as a subdevice of the RPM.</div><div class='add'>+</div><div class='add'>+  Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml</div><div class='add'>+  for information regarding the RPM node.</div><div class='add'>+</div><div class='add'>+  The regulator node houses sub-nodes for each regulator within the device.</div><div class='add'>+  Each sub-node is identified using the node's name, with valid values listed</div><div class='add'>+  for each of the pmics below.</div><div class='add'>+</div><div class='add'>+  For pm8058 l0, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15,</div><div class='add'>+  l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, s0, s1, s2, s3, s4,</div><div class='add'>+  lvs0, lvs1, ncp</div><div class='add'>+</div><div class='add'>+  For pm8901 l0, l1, l2, l3, l4, l5, l6, s0, s1, s2, s3, s4, lvs0, lvs1, lvs2, lvs3,</div><div class='add'>+  mvs</div><div class='add'>+</div><div class='add'>+  For pm8921 s1, s2, s3, s4, s7, s8, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='add'>+  l12, l14, l15, l16, l17, l18, l21, l22, l23, l24, l25, l26, l27, l28,</div><div class='add'>+  l29, lvs1, lvs2, lvs3, lvs4, lvs5, lvs6, lvs7, usb-switch, hdmi-switch,</div><div class='add'>+  ncp</div><div class='add'>+</div><div class='add'>+  For pm8018 s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='add'>+  l12, l14, lvs1</div><div class='add'>+</div><div class='add'>+  For smb208 s1a, s1b, s2a, s2b</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,rpm-pm8058-regulators</div><div class='add'>+      - qcom,rpm-pm8901-regulators</div><div class='add'>+      - qcom,rpm-pm8921-regulators</div><div class='add'>+      - qcom,rpm-pm8018-regulators</div><div class='add'>+      - qcom,rpm-smb208-regulators</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  ".*-supply$":</div><div class='add'>+    description: Input supply phandle(s) for this node</div><div class='add'>+</div><div class='add'>+  "^((s|l|lvs)[0-9]*)|(s[1-2][a-b])|(ncp)|(mvs)|(usb-switch)|(hdmi-switch)$":</div><div class='add'>+    description: List of regulators and its properties</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      bias-pull-down:</div><div class='add'>+        description: enable pull down of the regulator when inactive</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+      qcom,switch-mode-frequency:</div><div class='add'>+        description: Frequency (Hz) of the switch-mode power supply</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum:</div><div class='add'>+          - 19200000</div><div class='add'>+          - 9600000</div><div class='add'>+          - 6400000</div><div class='add'>+          - 4800000</div><div class='add'>+          - 3840000</div><div class='add'>+          - 3200000</div><div class='add'>+          - 2740000</div><div class='add'>+          - 2400000</div><div class='add'>+          - 2130000</div><div class='add'>+          - 1920000</div><div class='add'>+          - 1750000</div><div class='add'>+          - 1600000</div><div class='add'>+          - 1480000</div><div class='add'>+          - 1370000</div><div class='add'>+          - 1280000</div><div class='add'>+          - 1200000</div><div class='add'>+</div><div class='add'>+      qcom,force-mode:</div><div class='add'>+        description: Indicates that the regulator should be forced to a particular mode</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum:</div><div class='add'>+          - 0 # QCOM_RPM_FORCE_MODE_NONE do not force any mode</div><div class='add'>+          - 1 # QCOM_RPM_FORCE_MODE_LPM force into low power mode</div><div class='add'>+          - 2 # QCOM_RPM_FORCE_MODE_HPM force into high power mode</div><div class='add'>+          - 3 # QCOM_RPM_FORCE_MODE_AUTO allow regulator to automatically select its own mode</div><div class='add'>+              # based on realtime current draw, only for pm8921 smps and ftsmps</div><div class='add'>+</div><div class='add'>+      qcom,power-mode-hysteretic:</div><div class='add'>+        description: select that the power supply should operate in hysteretic mode,</div><div class='add'>+          instead of the default pwm mode</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/mfd/qcom-rpm.h&gt;</div><div class='add'>+    regulators {</div><div class='add'>+      compatible = "qcom,rpm-pm8921-regulators";</div><div class='add'>+      vdd_l1_l2_l12_l18-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+</div><div class='add'>+      s1 {</div><div class='add'>+        regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+</div><div class='add'>+        bias-pull-down;</div><div class='add'>+</div><div class='add'>+        qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      pm8921_s4: s4 {</div><div class='add'>+        regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+        bias-pull-down;</div><div class='add'>+</div><div class='add'>+        qcom,force-mode = &lt;QCOM_RPM_FORCE_MODE_AUTO&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml<br/>index e28ee9e46788..b9498504ad79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml</a></div><div class='hunk'>@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm Technologies, Inc. RPMh Regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - David Collins &lt;collinsd@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>     rpmh-regulator devices support PMIC regulator management via the Voltage</div><div class='hunk'>@@ -36,6 +37,8 @@ description: |</div><div class='ctx'>       For PM6150, smps1 - smps5, ldo1 - ldo19</div><div class='ctx'>       For PM6150L, smps1 - smps8, ldo1 - ldo11, bob</div><div class='ctx'>       For PM6350, smps1 - smps5, ldo1 - ldo22</div><div class='add'>+      For PM660, smps1 - smps6, ldo1 - ldo3, ldo5 - ldo19</div><div class='add'>+      For PM660L, smps1 - smps3, smps5, ldo1 - ldo8, bob</div><div class='ctx'>       For PM7325, smps1 - smps8, ldo1 - ldo19</div><div class='ctx'>       For PM8005, smps1 - smps4</div><div class='ctx'>       For PM8009, smps1 - smps2, ldo1 - ldo7</div><div class='hunk'>@@ -44,6 +47,7 @@ description: |</div><div class='ctx'>       For PM8350, smps1 - smps12, ldo1 - ldo10</div><div class='ctx'>       For PM8350C, smps1 - smps10, ldo1 - ldo13, bob</div><div class='ctx'>       For PM8450, smps1 - smps6, ldo1 - ldo4</div><div class='add'>+      For PM8550, smps1 - smps6, ldo1 - ldo17, bob1 - bob2</div><div class='ctx'>       For PM8998, smps1 - smps13, ldo1 - ldo28, lvs1 - lvs2</div><div class='ctx'>       For PMI8998, bob</div><div class='ctx'>       For PMR735A, smps1 - smps3, ldo1 - ldo7</div><div class='hunk'>@@ -56,6 +60,8 @@ properties:</div><div class='ctx'>       - qcom,pm6150-rpmh-regulators</div><div class='ctx'>       - qcom,pm6150l-rpmh-regulators</div><div class='ctx'>       - qcom,pm6350-rpmh-regulators</div><div class='add'>+      - qcom,pm660-rpmh-regulators</div><div class='add'>+      - qcom,pm660l-rpmh-regulators</div><div class='ctx'>       - qcom,pm7325-rpmh-regulators</div><div class='ctx'>       - qcom,pm8005-rpmh-regulators</div><div class='ctx'>       - qcom,pm8009-rpmh-regulators</div><div class='hunk'>@@ -65,10 +71,16 @@ properties:</div><div class='ctx'>       - qcom,pm8350-rpmh-regulators</div><div class='ctx'>       - qcom,pm8350c-rpmh-regulators</div><div class='ctx'>       - qcom,pm8450-rpmh-regulators</div><div class='add'>+      - qcom,pm8550-rpmh-regulators</div><div class='add'>+      - qcom,pm8550ve-rpmh-regulators</div><div class='add'>+      - qcom,pm8550vs-rpmh-regulators</div><div class='ctx'>       - qcom,pm8998-rpmh-regulators</div><div class='add'>+      - qcom,pmc8180-rpmh-regulators</div><div class='add'>+      - qcom,pmc8180c-rpmh-regulators</div><div class='ctx'>       - qcom,pmg1110-rpmh-regulators</div><div class='ctx'>       - qcom,pmi8998-rpmh-regulators</div><div class='ctx'>       - qcom,pmm8155au-rpmh-regulators</div><div class='add'>+      - qcom,pmm8654au-rpmh-regulators</div><div class='ctx'>       - qcom,pmr735a-rpmh-regulators</div><div class='ctx'>       - qcom,pmx55-rpmh-regulators</div><div class='ctx'>       - qcom,pmx65-rpmh-regulators</div><div class='hunk'>@@ -78,7 +90,7 @@ properties:</div><div class='ctx'>         RPMh resource name suffix used for the regulators found</div><div class='ctx'>         on this PMIC.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='del'>-    enum: [a, b, c, d, e, f]</div><div class='add'>+    enum: [a, b, c, d, e, f, g, h, k]</div><div class='ctx'> </div><div class='ctx'>   qcom,always-wait-for-ack:</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -94,35 +106,330 @@ properties:</div><div class='ctx'>   vdd-rgb-supply:</div><div class='ctx'>     description: Input supply phandle of rgb.</div><div class='ctx'> </div><div class='del'>-  vin-lvs-1-2-supply:</div><div class='del'>-    description: Input supply phandle of one or more regulators.</div><div class='del'>-</div><div class='del'>-  vdd-bob-supply:</div><div class='del'>-    description: BOB regulator parent supply phandle.</div><div class='del'>-</div><div class='ctx'>   bob:</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'>     description: BOB regulator node.</div><div class='add'>+    dependencies:</div><div class='add'>+      regulator-allow-set-load: [ regulator-allowed-modes ]</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "^vdd-s([0-9]+)-supply$":</div><div class='del'>-    description: Input supply phandle(s) of one or more regulators.</div><div class='del'>-</div><div class='del'>-  "^vdd-(l[0-9]+[-]){1,5}supply$":</div><div class='del'>-    description: Input supply phandle(s) of one or more regulators.</div><div class='del'>-</div><div class='del'>-  "^(smps|ldo|lvs)[0-9]+$":</div><div class='add'>+  "^(smps|ldo|lvs|bob)[0-9]+$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'>     description: smps/ldo regulator nodes(s).</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='add'>+    dependencies:</div><div class='add'>+      regulator-allow-set-load: [ regulator-allowed-modes ]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - qcom,pmic-id</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm6150-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l2-l3-supply: true</div><div class='add'>+        vdd-l4-l7-l8-supply: true</div><div class='add'>+        vdd-l5-l16-l17-l18-l19-supply: true</div><div class='add'>+        vdd-l10-l14-l15-supply: true</div><div class='add'>+        vdd-l11-l12-l13-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l[169]-supply$": true</div><div class='add'>+        "^vdd-s[1-5]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm6150l-rpmh-regulators</div><div class='add'>+            - qcom,pm8150l-rpmh-regulators</div><div class='add'>+            - qcom,pmc8180c-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-bob-supply:</div><div class='add'>+          description: BOB regulator parent supply phandle.</div><div class='add'>+        vdd-l1-l8-supply: true</div><div class='add'>+        vdd-l2-l3-supply: true</div><div class='add'>+        vdd-l4-l5-l6-supply: true</div><div class='add'>+        vdd-l7-l11-supply: true</div><div class='add'>+        vdd-l9-l10-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s[1-8]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm660-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l6-l7-supply: true</div><div class='add'>+        vdd-l2-l3-supply: true</div><div class='add'>+        vdd-l5-supply: true</div><div class='add'>+        vdd-l8-l9-l10-l11-l12-l13-l14-supply: true</div><div class='add'>+        vdd-l15-l16-l17-l18-l19-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s[1-6]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm660l-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-bob-supply:</div><div class='add'>+          description: BOB regulator parent supply phandle.</div><div class='add'>+        vdd-l1-l9-l10-supply: true</div><div class='add'>+        vdd-l2-supply: true</div><div class='add'>+        vdd-l3-l5-l7-l8-supply: true</div><div class='add'>+        vdd-l4-l6-supply: true</div><div class='add'>+        vdd-s3-s4-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s[125]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm7325-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l4-l12-l15-supply: true</div><div class='add'>+        vdd-l2-l7-supply: true</div><div class='add'>+        vdd-l6-l9-l10-supply: true</div><div class='add'>+        vdd-l11-l17-l18-l19-supply: true</div><div class='add'>+        vdd-l13-supply: true</div><div class='add'>+        vdd-l14-l16-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l[358]-supply$": true</div><div class='add'>+        "^vdd-s[1-8]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8005-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s[1-4]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8009-rpmh-regulators</div><div class='add'>+            - qcom,pm8009-1-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l5-l6-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l[1-47]-supply$": true</div><div class='add'>+        "^vdd-s[1-2]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8150-rpmh-regulators</div><div class='add'>+            - qcom,pmc8180-rpmh-regulators</div><div class='add'>+            - qcom,pmm8155au-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l8-l11-supply: true</div><div class='add'>+        vdd-l2-l10-supply: true</div><div class='add'>+        vdd-l3-l4-l5-l18-supply: true</div><div class='add'>+        vdd-l6-l9-supply: true</div><div class='add'>+        vdd-l7-l12-l14-l15-supply: true</div><div class='add'>+        vdd-l13-l16-l17-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s([1-9]|10)-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pmm8654au-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-supply: true</div><div class='add'>+        vdd-l2-l3-supply: true</div><div class='add'>+        vdd-l4-supply: true</div><div class='add'>+        vdd-l5-supply: true</div><div class='add'>+        vdd-l6-l7-supply: true</div><div class='add'>+        vdd-l8-l9-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s[1-9]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8350-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l4-supply: true</div><div class='add'>+        vdd-l2-l7-supply: true</div><div class='add'>+        vdd-l3-l5-supply: true</div><div class='add'>+        vdd-l6-l9-l10-supply: true</div><div class='add'>+        vdd-l8-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s([1-9]|1[0-2])-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8350c-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-bob-supply:</div><div class='add'>+          description: BOB regulator parent supply phandle.</div><div class='add'>+        vdd-l1-l12-supply: true</div><div class='add'>+        vdd-l2-l8-supply: true</div><div class='add'>+        vdd-l3-l4-l5-l7-l13-supply: true</div><div class='add'>+        vdd-l6-l9-l11-supply: true</div><div class='add'>+        vdd-l10-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s([1-9]|10)-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8450-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l[1-4]-supply$": true</div><div class='add'>+        "^vdd-s[1-6]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8550-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l4-l10-supply: true</div><div class='add'>+        vdd-l2-l13-l14-supply: true</div><div class='add'>+        vdd-l5-l16-supply: true</div><div class='add'>+        vdd-l6-l7-supply: true</div><div class='add'>+        vdd-l8-l9-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l(3|1[1-7])-supply$": true</div><div class='add'>+        "^vdd-s[1-6]-supply$": true</div><div class='add'>+        "^vdd-bob[1-2]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8550ve-rpmh-regulators</div><div class='add'>+            - qcom,pm8550vs-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l[1-3]-supply$": true</div><div class='add'>+        "^vdd-s[1-6]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pm8998-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l27-supply: true</div><div class='add'>+        vdd-l2-l8-l17-supply: true</div><div class='add'>+        vdd-l3-l11-supply: true</div><div class='add'>+        vdd-l4-l5-supply: true</div><div class='add'>+        vdd-l6-supply: true</div><div class='add'>+        vdd-l7-l12-l14-l15-supply: true</div><div class='add'>+        vdd-l9-supply: true</div><div class='add'>+        vdd-l10-l23-l25-supply: true</div><div class='add'>+        vdd-l13-l19-l21-supply: true</div><div class='add'>+        vdd-l16-l28-supply: true</div><div class='add'>+        vdd-l18-l22-supply: true</div><div class='add'>+        vdd-l20-l24-supply: true</div><div class='add'>+        vdd-l26-supply: true</div><div class='add'>+        vin-lvs-1-2-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s([1-9]|1[0-3])-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pmg1110-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-s1-supply: true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pmi8998-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-bob-supply:</div><div class='add'>+          description: BOB regulator parent supply phandle.</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pmr735a-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l2-supply: true</div><div class='add'>+        vdd-l3-supply: true</div><div class='add'>+        vdd-l4-supply: true</div><div class='add'>+        vdd-l5-l6-supply: true</div><div class='add'>+        vdd-l7-bob-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-s[1-3]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pmx55-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l1-l2-supply: true</div><div class='add'>+        vdd-l3-l9-supply: true</div><div class='add'>+        vdd-l4-l12-supply: true</div><div class='add'>+        vdd-l5-l6-supply: true</div><div class='add'>+        vdd-l7-l8-supply: true</div><div class='add'>+        vdd-l10-l11-l13-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l1[4-6]-supply$": true</div><div class='add'>+        "^vdd-s[1-7]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,pmx65-rpmh-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd-l2-l18-supply: true</div><div class='add'>+        vdd-l5-l6-l16-supply: true</div><div class='add'>+        vdd-l8-l9-supply: true</div><div class='add'>+        vdd-l11-l13-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd-l[1347]-supply$": true</div><div class='add'>+        "^vdd-l1[0245789]-supply$": true</div><div class='add'>+        "^vdd-l2[01]-supply$": true</div><div class='add'>+        "^vdd-s[1-8]-supply$": true</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/regulator/qcom,rpmh-regulator.h&gt;</div><div class='hunk'>@@ -142,9 +449,8 @@ examples:</div><div class='ctx'>             regulator-min-microvolt = &lt;1800000&gt;;</div><div class='ctx'>             regulator-max-microvolt = &lt;1800000&gt;;</div><div class='ctx'>             regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='del'>-            regulator-allowed-modes =</div><div class='del'>-                &lt;RPMH_REGULATOR_MODE_LPM</div><div class='del'>-                 RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_LPM</div><div class='add'>+                                       RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'>             regulator-allow-set-load;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='hunk'>@@ -161,9 +467,8 @@ examples:</div><div class='ctx'>         bob {</div><div class='ctx'>             regulator-min-microvolt = &lt;3312000&gt;;</div><div class='ctx'>             regulator-max-microvolt = &lt;3600000&gt;;</div><div class='del'>-            regulator-allowed-modes =</div><div class='del'>-                &lt;RPMH_REGULATOR_MODE_AUTO</div><div class='del'>-                 RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='add'>+            regulator-allowed-modes = &lt;RPMH_REGULATOR_MODE_AUTO</div><div class='add'>+                                       RPMH_REGULATOR_MODE_HPM&gt;;</div><div class='ctx'>             regulator-initial-mode = &lt;RPMH_REGULATOR_MODE_AUTO&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml<br/>index f052e03be402..a8ca8e0b27f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml</a></div><div class='hunk'>@@ -12,7 +12,7 @@ description:</div><div class='ctx'>   resides as a subnode of the SMD.  As such, the SMD-RPM regulator requires</div><div class='ctx'>   that the SMD and RPM nodes be present.</div><div class='ctx'> </div><div class='del'>-  Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt for</div><div class='add'>+  Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml for</div><div class='ctx'>   information pertaining to the SMD node.</div><div class='ctx'> </div><div class='ctx'>   Please refer to Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml</div><div class='hunk'>@@ -22,7 +22,18 @@ description:</div><div class='ctx'>   Each sub-node is identified using the node's name, with valid values listed</div><div class='ctx'>   for each of the pmics below.</div><div class='ctx'> </div><div class='del'>-  For mp5496, s2</div><div class='add'>+  For mp5496, s1, s2</div><div class='add'>+</div><div class='add'>+  For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='add'>+  l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22</div><div class='add'>+</div><div class='add'>+  For pm6125 s1, s2, s3, s4, s5, s6, s7, s8, l1, l2, l3, l5, l6, l7, l8, l9,</div><div class='add'>+  l10, l22, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24</div><div class='add'>+</div><div class='add'>+  For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22,</div><div class='add'>+  l12, l13, l14, l15, l16, l17, l18, l19</div><div class='add'>+</div><div class='add'>+  For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob</div><div class='ctx'> </div><div class='ctx'>   For pm8226, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10,</div><div class='ctx'>   l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25,</div><div class='hunk'>@@ -30,6 +41,9 @@ description:</div><div class='ctx'> </div><div class='ctx'>   For pm8841, s1, s2, s3, s4, s5, s6, s7, s8</div><div class='ctx'> </div><div class='add'>+  For pm8909, s1, s2, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,</div><div class='add'>+  l14, l15, l17, l18</div><div class='add'>+</div><div class='ctx'>   For pm8916, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='ctx'>   l12, l13, l14, l15, l16, l17, l18</div><div class='ctx'> </div><div class='hunk'>@@ -49,11 +63,6 @@ description:</div><div class='ctx'>   l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19,</div><div class='ctx'>   l20, l21, l22, l23, l24, l25, l26, l27, l28, lvs1, lvs2</div><div class='ctx'> </div><div class='del'>-  For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22,</div><div class='del'>-  l12, l13, l14, l15, l16, l17, l18, l19</div><div class='del'>-</div><div class='del'>-  For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob</div><div class='del'>-</div><div class='ctx'>   For pma8084, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3,</div><div class='ctx'>   l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19,</div><div class='ctx'>   l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1</div><div class='hunk'>@@ -62,34 +71,37 @@ description:</div><div class='ctx'> </div><div class='ctx'>   For pmi8998, bob</div><div class='ctx'> </div><div class='add'>+  For pmr735a, s1, s2, s3, l1, l2, l3, l4, l5, l6, l7</div><div class='add'>+</div><div class='ctx'>   For pms405, s1, s2, s3, s4, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='ctx'>   l12, l13</div><div class='ctx'> </div><div class='del'>-  For pm2250, s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11,</div><div class='del'>-  l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22</div><div class='del'>-</div><div class='ctx'> maintainers:</div><div class='del'>-  - Kathiravan T &lt;kathirav@codeaurora.org&gt;</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,rpm-mp5496-regulators</div><div class='add'>+      - qcom,rpm-pm2250-regulators</div><div class='add'>+      - qcom,rpm-pm6125-regulators</div><div class='add'>+      - qcom,rpm-pm660-regulators</div><div class='add'>+      - qcom,rpm-pm660l-regulators</div><div class='ctx'>       - qcom,rpm-pm8226-regulators</div><div class='ctx'>       - qcom,rpm-pm8841-regulators</div><div class='add'>+      - qcom,rpm-pm8909-regulators</div><div class='ctx'>       - qcom,rpm-pm8916-regulators</div><div class='ctx'>       - qcom,rpm-pm8941-regulators</div><div class='ctx'>       - qcom,rpm-pm8950-regulators</div><div class='ctx'>       - qcom,rpm-pm8953-regulators</div><div class='ctx'>       - qcom,rpm-pm8994-regulators</div><div class='ctx'>       - qcom,rpm-pm8998-regulators</div><div class='del'>-      - qcom,rpm-pm660-regulators</div><div class='del'>-      - qcom,rpm-pm660l-regulators</div><div class='ctx'>       - qcom,rpm-pma8084-regulators</div><div class='ctx'>       - qcom,rpm-pmi8994-regulators</div><div class='ctx'>       - qcom,rpm-pmi8998-regulators</div><div class='add'>+      - qcom,rpm-pmr735a-regulators</div><div class='ctx'>       - qcom,rpm-pms405-regulators</div><div class='del'>-      - qcom,rpm-pm2250-regulators</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   ".*-supply$":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt<br/>deleted file mode 100644<br/>index c2a39b121b1b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,347 +0,0 @@</div><div class='del'>-Qualcomm SPMI Regulators</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-			"qcom,pm8004-regulators"</div><div class='del'>-			"qcom,pm8005-regulators"</div><div class='del'>-			"qcom,pm8226-regulators"</div><div class='del'>-			"qcom,pm8841-regulators"</div><div class='del'>-			"qcom,pm8916-regulators"</div><div class='del'>-			"qcom,pm8941-regulators"</div><div class='del'>-			"qcom,pm8950-regulators"</div><div class='del'>-			"qcom,pm8994-regulators"</div><div class='del'>-			"qcom,pmi8994-regulators"</div><div class='del'>-			"qcom,pm660-regulators"</div><div class='del'>-			"qcom,pm660l-regulators"</div><div class='del'>-			"qcom,pms405-regulators"</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: List of OCP interrupts.</div><div class='del'>-</div><div class='del'>-- interrupt-names:</div><div class='del'>-	Usage: required if 'interrupts' property present</div><div class='del'>-	Value type: &lt;string-array&gt;</div><div class='del'>-	Definition: List of strings defining the names of the</div><div class='del'>-		    interrupts in the 'interrupts' property 1-to-1.</div><div class='del'>-		    Supported values are "ocp-&lt;regulator_name&gt;", where</div><div class='del'>-		    &lt;regulator_name&gt; corresponds to a voltage switch</div><div class='del'>-		    type regulator.</div><div class='del'>-</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_s5-supply:</div><div class='del'>-- vdd_s6-supply:</div><div class='del'>-- vdd_s7-supply:</div><div class='del'>-- vdd_s8-supply:</div><div class='del'>-	Usage: optional (pm8841 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_l1_l3-supply:</div><div class='del'>-- vdd_l2-supply:</div><div class='del'>-- vdd_l4_l5_l6-supply:</div><div class='del'>-- vdd_l7-supply:</div><div class='del'>-- vdd_l8_l11_l14_l15_l16-supply:</div><div class='del'>-- vdd_l9_l10_l12_l13_l17_l18-supply:</div><div class='del'>-	Usage: optional (pm8916 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_l1_l3-supply:</div><div class='del'>-- vdd_l2_lvs_1_2_3-supply:</div><div class='del'>-- vdd_l4_l11-supply:</div><div class='del'>-- vdd_l5_l7-supply:</div><div class='del'>-- vdd_l6_l12_l14_l15-supply:</div><div class='del'>-- vdd_l8_l16_l18_19-supply:</div><div class='del'>-- vdd_l9_l10_l17_l22-supply:</div><div class='del'>-- vdd_l13_l20_l23_l24-supply:</div><div class='del'>-- vdd_l21-supply:</div><div class='del'>-- vin_5vs-supply:</div><div class='del'>-	Usage: optional (pm8941 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_s5-supply:</div><div class='del'>-- vdd_s6-supply:</div><div class='del'>-- vdd_l1_l19-supply:</div><div class='del'>-- vdd_l2_l23-supply:</div><div class='del'>-- vdd_l3-supply:</div><div class='del'>-- vdd_l4_l5_l6_l7_l16-supply:</div><div class='del'>-- vdd_l8_l11_l12_l17_l22-supply:</div><div class='del'>-- vdd_l9_l10_l13_l14_l15_l18-supply:</div><div class='del'>-- vdd_l20-supply:</div><div class='del'>-- vdd_l21-supply:</div><div class='del'>-	Usage: optional (pm8950 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet</div><div class='del'>-</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_s5-supply:</div><div class='del'>-- vdd_s6-supply:</div><div class='del'>-- vdd_s7-supply:</div><div class='del'>-- vdd_s8-supply:</div><div class='del'>-- vdd_s9-supply:</div><div class='del'>-- vdd_s10-supply:</div><div class='del'>-- vdd_s11-supply:</div><div class='del'>-- vdd_s12-supply:</div><div class='del'>-- vdd_l1-supply:</div><div class='del'>-- vdd_l2_l26_l28-supply:</div><div class='del'>-- vdd_l3_l11-supply:</div><div class='del'>-- vdd_l4_l27_l31-supply:</div><div class='del'>-- vdd_l5_l7-supply:</div><div class='del'>-- vdd_l6_l12_l32-supply:</div><div class='del'>-- vdd_l8_l16_l30-supply:</div><div class='del'>-- vdd_l9_l10_l18_l22-supply:</div><div class='del'>-- vdd_l13_l19_l23_l24-supply:</div><div class='del'>-- vdd_l14_l15-supply:</div><div class='del'>-- vdd_l17_l29-supply:</div><div class='del'>-- vdd_l20_l21-supply:</div><div class='del'>-- vdd_l25-supply:</div><div class='del'>-- vdd_lvs_1_2-supply:</div><div class='del'>-	Usage: optional (pm8994 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_l1-supply:</div><div class='del'>-	Usage: optional (pmi8994 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- vdd_l1_l6_l7-supply:</div><div class='del'>-- vdd_l2_l3-supply:</div><div class='del'>-- vdd_l5-supply:</div><div class='del'>-- vdd_l8_l9_l10_l11_l12_l13_l14-supply:</div><div class='del'>-- vdd_l15_l16_l17_l18_l19-supply:</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s5-supply:</div><div class='del'>-- vdd_s6-supply:</div><div class='del'>-	Usage: optional (pm660 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- vdd_l1_l9_l10-supply:</div><div class='del'>-- vdd_l2-supply:</div><div class='del'>-- vdd_l3_l5_l7_l8-supply:</div><div class='del'>-- vdd_l4_l6-supply:</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_s5-supply:</div><div class='del'>-	Usage: optional (pm660l only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- vdd_l1_l2-supply:</div><div class='del'>-- vdd_l3_l8-supply:</div><div class='del'>-- vdd_l4-supply:</div><div class='del'>-- vdd_l5_l6-supply:</div><div class='del'>-- vdd_l10_l11_l12_l13-supply:</div><div class='del'>-- vdd_l7-supply:</div><div class='del'>-- vdd_l9-supply:</div><div class='del'>-- vdd_s1-supply:</div><div class='del'>-- vdd_s2-supply:</div><div class='del'>-- vdd_s3-supply:</div><div class='del'>-- vdd_s4-supply:</div><div class='del'>-- vdd_s5-supply</div><div class='del'>-	Usage: optional (pms405 only)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Reference to regulator supplying the input pin, as</div><div class='del'>-		    described in the data sheet.</div><div class='del'>-</div><div class='del'>-- qcom,saw-reg:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Description: Reference to syscon node defining the SAW registers.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The regulator node houses sub-nodes for each regulator within the device. Each</div><div class='del'>-sub-node is identified using the node's name, with valid values listed for each</div><div class='del'>-of the PMICs below.</div><div class='del'>-</div><div class='del'>-pm8004:</div><div class='del'>-	s2, s5</div><div class='del'>-</div><div class='del'>-pm8005:</div><div class='del'>-	s1, s2, s3, s4</div><div class='del'>-</div><div class='del'>-pm8841:</div><div class='del'>-	s1, s2, s3, s4, s5, s6, s7, s8</div><div class='del'>-</div><div class='del'>-pm8916:</div><div class='del'>-	s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,</div><div class='del'>-	l14, l15, l16, l17, l18</div><div class='del'>-</div><div class='del'>-pm8941:</div><div class='del'>-	s1, s2, s3, s4, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13,</div><div class='del'>-	l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3,</div><div class='del'>-	5vs1, 5vs2</div><div class='del'>-</div><div class='del'>-pm8994:</div><div class='del'>-	s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5,</div><div class='del'>-	l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20,</div><div class='del'>-	l21, l22, l23, l24, l25, l26, l27, l28, l29, l30, l31, l32, lvs1, lvs2</div><div class='del'>-</div><div class='del'>-pmi8994:</div><div class='del'>-	s1, s2, s3, l1</div><div class='del'>-</div><div class='del'>-The content of each sub-node is defined by the standard binding for regulators -</div><div class='del'>-see regulator.txt - with additional custom properties described below:</div><div class='del'>-</div><div class='del'>-- regulator-initial-mode:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Description: 2 = Set initial mode to auto mode (automatically select</div><div class='del'>-		    between HPM and LPM); not available on boost type</div><div class='del'>-		    regulators.</div><div class='del'>-</div><div class='del'>-		    1 = Set initial mode to high power mode (HPM), also referred</div><div class='del'>-		    to as NPM. HPM consumes more ground current than LPM, but</div><div class='del'>-		    it can source significantly higher load current. HPM is not</div><div class='del'>-		    available on boost type regulators. For voltage switch type</div><div class='del'>-		    regulators, HPM implies that over current protection and</div><div class='del'>-		    soft start are active all the time.</div><div class='del'>-</div><div class='del'>-		    0 = Set initial mode to low power mode (LPM).</div><div class='del'>-</div><div class='del'>-- qcom,ocp-max-retries:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Description: Maximum number of times to try toggling a voltage switch</div><div class='del'>-		     off and back on as a result of consecutive over current</div><div class='del'>-		     events.</div><div class='del'>-</div><div class='del'>-- qcom,ocp-retry-delay:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Description: Time to delay in milliseconds between each voltage switch</div><div class='del'>-		     toggle after an over current event takes place.</div><div class='del'>-</div><div class='del'>-- qcom,pin-ctrl-enable:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Description: Bit mask specifying which hardware pins should be used to</div><div class='del'>-		     enable the regulator, if any; supported bits are:</div><div class='del'>-			0 = ignore all hardware enable signals</div><div class='del'>-			BIT(0) = follow HW0_EN signal</div><div class='del'>-			BIT(1) = follow HW1_EN signal</div><div class='del'>-			BIT(2) = follow HW2_EN signal</div><div class='del'>-			BIT(3) = follow HW3_EN signal</div><div class='del'>-</div><div class='del'>-- qcom,pin-ctrl-hpm:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Description: Bit mask specifying which hardware pins should be used to</div><div class='del'>-		     force the regulator into high power mode, if any;</div><div class='del'>-		     supported bits are:</div><div class='del'>-			0 = ignore all hardware enable signals</div><div class='del'>-			BIT(0) = follow HW0_EN signal</div><div class='del'>-			BIT(1) = follow HW1_EN signal</div><div class='del'>-			BIT(2) = follow HW2_EN signal</div><div class='del'>-			BIT(3) = follow HW3_EN signal</div><div class='del'>-			BIT(4) = follow PMIC awake state</div><div class='del'>-</div><div class='del'>-- qcom,vs-soft-start-strength:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Description: This property sets the soft start strength for voltage</div><div class='del'>-		     switch type regulators; supported values are:</div><div class='del'>-			0 = 0.05 uA</div><div class='del'>-			1 = 0.25 uA</div><div class='del'>-			2 = 0.55 uA</div><div class='del'>-			3 = 0.75 uA</div><div class='del'>-</div><div class='del'>-- qcom,saw-slave:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;boo&gt;</div><div class='del'>-	Description: SAW controlled gang slave. Will not be configured.</div><div class='del'>-</div><div class='del'>-- qcom,saw-leader:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;boo&gt;</div><div class='del'>-	Description: SAW controlled gang leader. Will be configured as</div><div class='del'>-		     SAW regulator.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	regulators {</div><div class='del'>-		compatible = "qcom,pm8941-regulators";</div><div class='del'>-		vdd_l1_l3-supply = &lt;&amp;s1&gt;;</div><div class='del'>-</div><div class='del'>-		s1: s1 {</div><div class='del'>-			regulator-min-microvolt = &lt;1300000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1400000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-		l1: l1 {</div><div class='del'>-			regulator-min-microvolt = &lt;1225000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1300000&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		....</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 2:</div><div class='del'>-</div><div class='del'>-	saw3: syscon@9A10000 {</div><div class='del'>-		compatible = "syscon";</div><div class='del'>-		reg = &lt;0x9A10000 0x1000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	spm-regulators {</div><div class='del'>-		compatible = "qcom,pm8994-regulators";</div><div class='del'>-		qcom,saw-reg = &lt;&amp;saw3&gt;;</div><div class='del'>-		s8 {</div><div class='del'>-			qcom,saw-slave;</div><div class='del'>-		};</div><div class='del'>-		s9 {</div><div class='del'>-			qcom,saw-slave;</div><div class='del'>-		};</div><div class='del'>-		s10 {</div><div class='del'>-			qcom,saw-slave;</div><div class='del'>-		};</div><div class='del'>-		pm8994_s11_saw: s11 {</div><div class='del'>-			qcom,saw-leader;</div><div class='del'>-			regulator-always-on;</div><div class='del'>-			regulator-min-microvolt = &lt;900000&gt;;</div><div class='del'>-			regulator-max-microvolt = &lt;1140000&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..bdf34c2de96b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,354 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/qcom,spmi-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SPMI Regulators</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Robert Marko &lt;robimarko@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,pm6125-regulators</div><div class='add'>+      - qcom,pm660-regulators</div><div class='add'>+      - qcom,pm660l-regulators</div><div class='add'>+      - qcom,pm8004-regulators</div><div class='add'>+      - qcom,pm8005-regulators</div><div class='add'>+      - qcom,pm8226-regulators</div><div class='add'>+      - qcom,pm8841-regulators</div><div class='add'>+      - qcom,pm8916-regulators</div><div class='add'>+      - qcom,pm8941-regulators</div><div class='add'>+      - qcom,pm8950-regulators</div><div class='add'>+      - qcom,pm8994-regulators</div><div class='add'>+      - qcom,pmi8994-regulators</div><div class='add'>+      - qcom,pmp8074-regulators</div><div class='add'>+      - qcom,pms405-regulators</div><div class='add'>+</div><div class='add'>+  qcom,saw-reg:</div><div class='add'>+    description: Reference to syscon node defining the SAW registers</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^(5vs[1-2]|(l|s)[1-9][0-9]?|lvs[1-3])$":</div><div class='add'>+    description: List of regulators and its properties</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      qcom,ocp-max-retries:</div><div class='add'>+        description:</div><div class='add'>+          Maximum number of times to try toggling a voltage switch off and</div><div class='add'>+          back on as a result of consecutive over current events</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+      qcom,ocp-retry-delay:</div><div class='add'>+        description:</div><div class='add'>+          Time to delay in milliseconds between each voltage switch toggle</div><div class='add'>+          after an over current event takes place</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+      qcom,pin-ctrl-enable:</div><div class='add'>+        description:</div><div class='add'>+          Bit mask specifying which hardware pins should be used to enable the</div><div class='add'>+          regulator, if any.</div><div class='add'>+          Supported bits are</div><div class='add'>+          0 = ignore all hardware enable signals</div><div class='add'>+          BIT(0) = follow HW0_EN signal</div><div class='add'>+          BIT(1) = follow HW1_EN signal</div><div class='add'>+          BIT(2) = follow HW2_EN signal</div><div class='add'>+          BIT(3) = follow HW3_EN signal</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 15</div><div class='add'>+</div><div class='add'>+      qcom,pin-ctrl-hpm:</div><div class='add'>+        description:</div><div class='add'>+          Bit mask specifying which hardware pins should be used to force the</div><div class='add'>+          regulator into high power mode, if any.</div><div class='add'>+          Supported bits are</div><div class='add'>+          0 = ignore all hardware enable signals</div><div class='add'>+          BIT(0) = follow HW0_EN signal</div><div class='add'>+          BIT(1) = follow HW1_EN signal</div><div class='add'>+          BIT(2) = follow HW2_EN signal</div><div class='add'>+          BIT(3) = follow HW3_EN signal</div><div class='add'>+          BIT(4) = follow PMIC awake state</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 31</div><div class='add'>+</div><div class='add'>+      qcom,vs-soft-start-strength:</div><div class='add'>+        description:</div><div class='add'>+          This property sets the soft start strength for voltage switch type</div><div class='add'>+          regulators.</div><div class='add'>+          Supported values are</div><div class='add'>+          0 = 0.05 uA</div><div class='add'>+          1 = 0.25 uA</div><div class='add'>+          2 = 0.55 uA</div><div class='add'>+          3 = 0.75 uA</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 3</div><div class='add'>+</div><div class='add'>+      qcom,saw-slave:</div><div class='add'>+        description: SAW controlled gang slave. Will not be configured.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+      qcom,saw-leader:</div><div class='add'>+        description:</div><div class='add'>+          SAW controlled gang leader. Will be configured as SAW regulator.</div><div class='add'>+        type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm6125-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l1_l7_l17_l18-supply: true</div><div class='add'>+        vdd_l2_l3_l4-supply: true</div><div class='add'>+        vdd_l5_l15_l19_l20_l21_l22-supply: true</div><div class='add'>+        vdd_l6_l8-supply: true</div><div class='add'>+        vdd_l9_l11-supply: true</div><div class='add'>+        vdd_l10_l13_l14-supply: true</div><div class='add'>+        vdd_l12_l16-supply: true</div><div class='add'>+        vdd_l23_l24-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-8]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm660-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l15_l16_l17_l18_l19-supply: true</div><div class='add'>+        vdd_l1_l6_l7-supply: true</div><div class='add'>+        vdd_l2_l3-supply: true</div><div class='add'>+        vdd_l5-supply: true</div><div class='add'>+        vdd_l8_l9_l10_l11_l12_l13_l14-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-6]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm660l-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l1_l9_l10-supply: true</div><div class='add'>+        vdd_l2-supply: true</div><div class='add'>+        vdd_l3_l5_l7_l8-supply: true</div><div class='add'>+        vdd_l4_l6-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-5]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8004-regulators</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[25]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8005-regulators</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-4]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8226-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l10_l11_l13-supply: true</div><div class='add'>+        vdd_l12_l14-supply: true</div><div class='add'>+        vdd_l15_l16_l17_l18-supply: true</div><div class='add'>+        vdd_l19_l20_l21_l22_l23_l28-supply: true</div><div class='add'>+        vdd_l1_l2_l4_l5-supply: true</div><div class='add'>+        vdd_l25-supply: true</div><div class='add'>+        vdd_l3_l24_l26-supply: true</div><div class='add'>+        vdd_l6_l7_l8_l9_l27-supply: true</div><div class='add'>+        vdd_lvs1-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-5]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8841-regulators</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-8]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8916-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l1_l3-supply: true</div><div class='add'>+        vdd_l4_l5_l6-supply: true</div><div class='add'>+        vdd_l8_l11_l14_l15_l16-supply: true</div><div class='add'>+        vdd_l9_l10_l12_l13_l17_l18-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_l[27]-supply$": true</div><div class='add'>+        "^vdd_s[1-4]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8941-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: Over-current protection interrupt for 5V S1</div><div class='add'>+            - description: Over-current protection interrupt for 5V S2</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: ocp-5vs1</div><div class='add'>+            - const: ocp-5vs2</div><div class='add'>+        vdd_l13_l20_l23_l24-supply: true</div><div class='add'>+        vdd_l1_l3-supply: true</div><div class='add'>+        vdd_l21-supply: true</div><div class='add'>+        vdd_l2_lvs_1_2_3-supply: true</div><div class='add'>+        vdd_l4_l11-supply: true</div><div class='add'>+        vdd_l5_l7-supply: true</div><div class='add'>+        vdd_l6_l12_l14_l15-supply: true</div><div class='add'>+        vdd_l8_l16_l18_19-supply: true</div><div class='add'>+        vdd_l9_l10_l17_l22-supply: true</div><div class='add'>+        vin_5vs-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-3]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8950-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l1_l19-supply: true</div><div class='add'>+        vdd_l20-supply: true</div><div class='add'>+        vdd_l21-supply: true</div><div class='add'>+        vdd_l2_l23-supply: true</div><div class='add'>+        vdd_l3-supply: true</div><div class='add'>+        vdd_l4_l5_l6_l7_l16-supply: true</div><div class='add'>+        vdd_l8_l11_l12_l17_l22-supply: true</div><div class='add'>+        vdd_l9_l10_l13_l14_l15_l18-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-6]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pm8994-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l1-supply: true</div><div class='add'>+        vdd_l13_l19_l23_l24-supply: true</div><div class='add'>+        vdd_l14_l15-supply: true</div><div class='add'>+        vdd_l17_l29-supply: true</div><div class='add'>+        vdd_l20_l21-supply: true</div><div class='add'>+        vdd_l25-supply: true</div><div class='add'>+        vdd_l2_l26_l28-supply: true</div><div class='add'>+        vdd_l3_l11-supply: true</div><div class='add'>+        vdd_l4_l27_l31-supply: true</div><div class='add'>+        vdd_l5_l7-supply: true</div><div class='add'>+        vdd_l6_l12_l32-supply: true</div><div class='add'>+        vdd_l8_l16_l30-supply: true</div><div class='add'>+        vdd_l9_l10_l18_l22-supply: true</div><div class='add'>+        vdd_lvs_1_2-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-9][0-2]?-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pmi8994-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l1-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_s[1-3]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pmp8074-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_l10_l11_l12_l13-supply: true</div><div class='add'>+        vdd_l1_l2-supply: true</div><div class='add'>+        vdd_l3_l8-supply: true</div><div class='add'>+        vdd_l5_l6_l15-supply: true</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^vdd_l[479]-supply$": true</div><div class='add'>+        "^vdd_s[1-5]-supply$": true</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pms405-regulators</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vdd_s3-supply: true</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    regulators {</div><div class='add'>+      compatible = "qcom,pm8941-regulators";</div><div class='add'>+      vdd_l1_l3-supply = &lt;&amp;s1&gt;;</div><div class='add'>+</div><div class='add'>+      s1: s1 {</div><div class='add'>+        regulator-min-microvolt = &lt;1300000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;1400000&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      l1: l1 {</div><div class='add'>+        regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml<br/>index 12ed98c28aaa..b1cff3adb21b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: The Qualcomm PMIC VBUS output regulator driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Wesley Cheng &lt;wcheng@codeaurora.org&gt;</div><div class='add'>+  - Wesley Cheng &lt;quic_wcheng@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This regulator driver controls the VBUS output by the Qualcomm PMIC.  This</div><div class='hunk'>@@ -33,7 +33,7 @@ examples:</div><div class='ctx'>      pm8150b {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='del'>-        pm8150b_vbus: dcdc@1100 {</div><div class='add'>+        pm8150b_vbus: usb-vbus-regulator@1100 {</div><div class='ctx'>             compatible = "qcom,pm8150b-vbus-reg";</div><div class='ctx'>             reg = &lt;0x1100&gt;;</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml<br/>index 1ddc1efd19e2..e987c39b223e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml</a></div><div class='hunk'>@@ -20,6 +20,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   lab:</div><div class='ctx'>     type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       qcom,soft-start-us:</div><div class='hunk'>@@ -33,11 +35,20 @@ properties:</div><div class='ctx'>         description:</div><div class='ctx'>           Short-circuit and over-current interrupts for lab.</div><div class='ctx'> </div><div class='add'>+      interrupt-names:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - const: sc-err</div><div class='add'>+          - const: ocp</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - interrupts</div><div class='add'>+      - interrupt-names</div><div class='ctx'> </div><div class='ctx'>   ibb:</div><div class='ctx'>     type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       qcom,discharge-resistor-kohms:</div><div class='hunk'>@@ -52,8 +63,15 @@ properties:</div><div class='ctx'>         description:</div><div class='ctx'>           Short-circuit and over-current interrupts for ibb.</div><div class='ctx'> </div><div class='add'>+      interrupt-names:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - const: sc-err</div><div class='add'>+          - const: ocp</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - interrupts</div><div class='add'>+      - interrupt-names</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml<br/>index 0ae25d119b6f..41678400e63f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ description: |</div><div class='ctx'>   and control the backlight.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/regulator-output.yaml b/Documentation/devicetree/bindings/regulator/regulator-output.yaml<br/>new file mode 100644<br/>index 000000000000..078b37a1a71a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/regulator-output.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/regulator-output.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/regulator-output.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Regulator output connector</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Zev Weiss &lt;zev@bewilderbeest.net&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This describes a power output connector supplied by a regulator,</div><div class='add'>+  such as a power outlet on a power distribution unit (PDU).  The</div><div class='add'>+  connector may be standalone or merely one channel or set of pins</div><div class='add'>+  within a ganged physical connector carrying multiple independent</div><div class='add'>+  power outputs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: regulator-output</div><div class='add'>+</div><div class='add'>+  vout-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle of the regulator supplying the output.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - vout-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+      output {</div><div class='add'>+          compatible = "regulator-output";</div><div class='add'>+          vout-supply = &lt;&amp;output_reg&gt;;</div><div class='add'>+      };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/regulator.yaml b/Documentation/devicetree/bindings/regulator/regulator.yaml<br/>index a9b66ececccf..e158c2d3d3f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/regulator.yaml</a></div><div class='hunk'>@@ -13,7 +13,7 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   regulator-name:</div><div class='ctx'>     description: A string used as a descriptive name for regulator outputs</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/string"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'> </div><div class='ctx'>   regulator-min-microvolt:</div><div class='ctx'>     description: smallest voltage consumers may set</div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   regulator-microvolt-offset:</div><div class='ctx'>     description: Offset applied to voltages to compensate for voltage drops</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   regulator-min-microamp:</div><div class='ctx'>     description: smallest current consumers may set</div><div class='hunk'>@@ -58,7 +59,7 @@ properties:</div><div class='ctx'>     description: ramp delay for regulator(in uV/us) For hardware which supports</div><div class='ctx'>       disabling ramp rate, it should be explicitly initialised to zero (regulator-ramp-delay</div><div class='ctx'>       = &lt;0&gt;) for disabling ramp delay.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   regulator-enable-ramp-delay:</div><div class='ctx'>     description: The time taken, in microseconds, for the supply rail to</div><div class='hunk'>@@ -67,7 +68,7 @@ properties:</div><div class='ctx'>       required due to the combination of internal ramping of the regulator</div><div class='ctx'>       itself, and board design issues such as trace capacitance and load</div><div class='ctx'>       on the supply.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   regulator-settling-time-us:</div><div class='ctx'>     description: Settling time, in microseconds, for voltage change if regulator</div><div class='hunk'>@@ -94,7 +95,7 @@ properties:</div><div class='ctx'>     description: initial operating mode. The set of possible operating modes</div><div class='ctx'>       depends on the capabilities of every hardware so each device binding</div><div class='ctx'>       documentation explains which values the regulator supports.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   regulator-allowed-modes:</div><div class='ctx'>     description: list of operating modes that software is allowed to configure</div><div class='hunk'>@@ -102,12 +103,12 @@ properties:</div><div class='ctx'>       The set of possible operating modes depends on the capabilities of</div><div class='ctx'>       every hardware so each device binding document explains which values</div><div class='ctx'>       the regulator supports.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'> </div><div class='ctx'>   regulator-system-load:</div><div class='ctx'>     description: Load in uA present on regulator that is not captured by</div><div class='ctx'>       any consumer request.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   regulator-pull-down:</div><div class='ctx'>     description: Enable pull down resistor when the regulator is disabled.</div><div class='hunk'>@@ -205,14 +206,14 @@ properties:</div><div class='ctx'>       0: Disable active discharge.</div><div class='ctx'>       1: Enable active discharge.</div><div class='ctx'>       Absence of this property will leave configuration to default.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   regulator-coupled-with:</div><div class='ctx'>     description: Regulators with which the regulator is coupled. The linkage</div><div class='ctx'>       is 2-way - all coupled regulators should be linked with each other.</div><div class='ctx'>       A regulator should not be coupled with its supplier.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -220,7 +221,7 @@ properties:</div><div class='ctx'>     description: Array of maximum spread between voltages of coupled regulators</div><div class='ctx'>       in microvolts, each value in the array relates to the corresponding</div><div class='ctx'>       couple specified by the regulator-coupled-with property.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'> </div><div class='ctx'>   regulator-max-step-microvolt:</div><div class='ctx'>     description: Maximum difference between current and target voltages</div><div class='hunk'>@@ -230,7 +231,7 @@ patternProperties:</div><div class='ctx'>   ".*-supply$":</div><div class='ctx'>     description: Input supply phandle(s) for this node</div><div class='ctx'> </div><div class='del'>-  regulator-state-(standby|mem|disk):</div><div class='add'>+  "^regulator-state-(standby|mem|disk)$":</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       sub-nodes for regulator state in Standby, Suspend-to-RAM, and</div><div class='hunk'>@@ -268,7 +269,7 @@ patternProperties:</div><div class='ctx'>           of possible operating modes depends on the capabilities of every</div><div class='ctx'>           hardware so the valid modes are documented on each regulator device</div><div class='ctx'>           tree binding document.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml<br/>index 4a4dfa7d9d09..4a8a221bc902 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml</a></div><div class='hunk'>@@ -32,16 +32,28 @@ properties:</div><div class='ctx'>       If only one gpio is specified, only one gpio used to control ENP/ENM.</div><div class='ctx'>       Else if both are specified, DSVP/DSVN could be controlled individually.</div><div class='ctx'>       If this property not specified, treat both as always-on regulators.</div><div class='add'>+</div><div class='add'>+      Property is deprecated. Use enable-gpios in each regulator.</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^DSV(P|N)$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       Properties for single display bias regulator.</div><div class='ctx'> </div><div class='add'>+    properties:</div><div class='add'>+      enable-gpios:</div><div class='add'>+        description:</div><div class='add'>+          GPIO to use to enable DSVP/DSVN regulator. One GPIO can be configured</div><div class='add'>+          for controlling both regulators.  If this property not specified for</div><div class='add'>+          any regulator, treat both as always-on regulators.</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -57,19 +69,20 @@ examples:</div><div class='ctx'>         rt4801@73 {</div><div class='ctx'>             compatible = "richtek,rt4801";</div><div class='ctx'>             reg = &lt;0x73&gt;;</div><div class='del'>-            enable-gpios = &lt;&amp;gpio26 2 0&gt;, &lt;&amp;gpio26 3 0&gt;;</div><div class='ctx'> </div><div class='ctx'>             dsvp: DSVP {</div><div class='ctx'>                 regulator-name = "rt4801,dsvp";</div><div class='ctx'>                 regulator-min-microvolt = &lt;4000000&gt;;</div><div class='ctx'>                 regulator-max-microvolt = &lt;6000000&gt;;</div><div class='ctx'>                 regulator-boot-on;</div><div class='add'>+                enable-gpios = &lt;&amp;gpio26 2 0&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             dsvn: DSVN {</div><div class='ctx'>                 regulator-name = "rt4801,dsvn";</div><div class='ctx'>                 regulator-min-microvolt = &lt;4000000&gt;;</div><div class='ctx'>                 regulator-max-microvolt = &lt;6000000&gt;;</div><div class='ctx'>                 regulator-boot-on;</div><div class='add'>+                enable-gpios = &lt;&amp;gpio26 3 0&gt;;</div><div class='ctx'>             };</div><div class='ctx'> </div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt4803.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt4803.yaml<br/>new file mode 100644<br/>index 000000000000..6ceba022e550<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt4803.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/richtek,rt4803.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/richtek,rt4803.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT4803 Boost Regulator</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  RT4803 is a boost regulator that's designed to provide the minimum output</div><div class='add'>+  voltage, even if the input voltage is lower than the required voltage. It</div><div class='add'>+  supports boost and auto bypass mode that depends on the difference between the</div><div class='add'>+  input and output voltage. If the input is lower than the output, mode will</div><div class='add'>+  transform to boost mode. Otherwise, turn on bypass switch to enter bypass mode.</div><div class='add'>+</div><div class='add'>+  Datasheet is available at</div><div class='add'>+  https://www.richtek.com/assets/product_file/RT4803/DS4803-03.pdf</div><div class='add'>+  https://www.richtek.com/assets/product_file/RT4803A/DS4803A-06.pdf</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - richtek,rt4803</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  richtek,vsel-active-high:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Specify the VSEL register group is using when system is active</div><div class='add'>+</div><div class='add'>+  regulator-allowed-modes:</div><div class='add'>+    description: |</div><div class='add'>+      Available operating mode</div><div class='add'>+        1: Auto PFM/PWM</div><div class='add'>+        2: Force PWM</div><div class='add'>+    items:</div><div class='add'>+      enum: [1, 2]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      regulator@75 {</div><div class='add'>+        compatible = "richtek,rt4803";</div><div class='add'>+        reg = &lt;0x75&gt;;</div><div class='add'>+        richtek,vsel-active-high;</div><div class='add'>+        regulator-name = "rt4803-regulator";</div><div class='add'>+        regulator-min-microvolt = &lt;2850000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;4400000&gt;;</div><div class='add'>+        regulator-allowed-modes = &lt;1 2&gt;;</div><div class='add'>+        regulator-always-on;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml<br/>index 28725c5467fc..edb411be0390 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/richtek,rt5190a-regulator.yaml</a></div><div class='hunk'>@@ -58,7 +58,7 @@ properties:</div><div class='ctx'>         type: object</div><div class='ctx'>         $ref: regulator.yaml#</div><div class='ctx'>         description: |</div><div class='del'>-          regulator description for buck1 and buck4.</div><div class='add'>+          regulator description for buck1 to buck4, and ldo.</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           regulator-allowed-modes:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml<br/>new file mode 100644<br/>index 000000000000..358297dd3fb7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/richtek,rt5739.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/richtek,rt5739.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT5739 Step-Down Buck Converter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RT5739 is a step-down switching buck converter that can deliver the</div><div class='add'>+  programmable output voltage from 300mV to 1300mV with wide input voltage</div><div class='add'>+  supply of 2.5V to 5.5V. It can provide up to 3.5A continuous current</div><div class='add'>+  capability at over 80% high efficiency.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - richtek,rt5739</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  richtek,vsel-active-high:</div><div class='add'>+    description: |</div><div class='add'>+      If property is present, use the 'VSEL1' register group for buck control.</div><div class='add'>+      Else, use the 'VSEL0' register group. This depends on external hardware</div><div class='add'>+      'VSEL' pin connection.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  regulator-allowed-modes:</div><div class='add'>+    description: |</div><div class='add'>+      buck allowed operating mode</div><div class='add'>+        0: Auto PFM/PWM mode</div><div class='add'>+        1: Forced PWM mode</div><div class='add'>+    items:</div><div class='add'>+      enum: [0, 1]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      regulator@50 {</div><div class='add'>+        compatible = "richtek,rt5739";</div><div class='add'>+        reg = &lt;0x50&gt;;</div><div class='add'>+        enable-gpios = &lt;&amp;gpio26 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        richtek,vsel-active-high;</div><div class='add'>+        regulator-name = "richtek,rt5739-buck";</div><div class='add'>+        regulator-min-microvolt = &lt;300000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;1300000&gt;;</div><div class='add'>+        regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+        regulator-boot-on;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml<br/>new file mode 100644<br/>index 000000000000..29f7d3d5d658<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/richtek,rt6190.yaml</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/richtek,rt6190.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT6190 4-Switch BuckBoost controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RT6190 is 4-Switch BuckBoost controller designed for converting input</div><div class='add'>+  voltage to output voltage that can be equal to, higher or lower than input</div><div class='add'>+  voltage. It operates with wide input voltage range from 4.5V to 36V, and</div><div class='add'>+  the output voltage can be set from 3V to 36V by external FB pin. It's commonly</div><div class='add'>+  used for the application like as BuckBoost bus supply, docking station and USB</div><div class='add'>+  power delivery product.</div><div class='add'>+</div><div class='add'>+  Datasheet is available at</div><div class='add'>+  https://www.richtek.com/assets/product_file/RT6190/DS6190-02.pdf</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - richtek,rt6190</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  regulator-allowed-modes:</div><div class='add'>+    description: |</div><div class='add'>+      buck allowed operating mode</div><div class='add'>+        0: PSM mode (light load Power Saving Mode)</div><div class='add'>+        1: FCCM mode (Forced-CCM mode)</div><div class='add'>+    maxItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum: [0, 1]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      regulator@2c {</div><div class='add'>+        compatible = "richtek,rt6190";</div><div class='add'>+        reg = &lt;0x2c&gt;;</div><div class='add'>+        wakeup-source;</div><div class='add'>+        interrupts-extended = &lt;&amp;gpio26 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        enable-gpios = &lt;&amp;gpio26 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        regulator-name = "richtek,rt6190-buckboost";</div><div class='add'>+        regulator-min-microvolt = &lt;3000000&gt;;</div><div class='add'>+        regulator-max-microvolt = &lt;32000000&gt;;</div><div class='add'>+        regulator-min-microamp = &lt;306000&gt;;</div><div class='add'>+        regulator-max-microamp = &lt;12114000&gt;;</div><div class='add'>+        regulator-allowed-modes = &lt;0 1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml<br/>index e983d0e70c9b..b73762e151bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/richtek,rt6245-regulator.yaml</a></div><div class='hunk'>@@ -32,7 +32,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   richtek,oc-level-select:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint8"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>     enum: [0, 1, 2, 3]</div><div class='ctx'>     description: |</div><div class='ctx'>       Over current level selection. Each respective value means the current</div><div class='hunk'>@@ -40,7 +40,7 @@ properties:</div><div class='ctx'>       in chip default.</div><div class='ctx'> </div><div class='ctx'>   richtek,ot-level-select:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint8"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>     enum: [0, 1, 2]</div><div class='ctx'>     description: |</div><div class='ctx'>       Over temperature level selection. Each respective value means the degree</div><div class='hunk'>@@ -48,7 +48,7 @@ properties:</div><div class='ctx'>       default.</div><div class='ctx'> </div><div class='ctx'>   richtek,pgdly-time-select:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint8"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>     enum: [0, 1, 2, 3]</div><div class='ctx'>     description: |</div><div class='ctx'>       Power good signal delay time selection. Each respective value means the</div><div class='hunk'>@@ -57,7 +57,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'>   richtek,switch-freq-select:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint8"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='ctx'>     enum: [0, 1, 2]</div><div class='ctx'>     description: |</div><div class='ctx'>       Buck switch frequency selection. Each respective value means 400KHz,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml<br/>index a8ccb5cb8d77..446ec5127d1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml</a></div><div class='hunk'>@@ -120,7 +120,7 @@ properties:</div><div class='ctx'>   lsw:</div><div class='ctx'>     description: load switch current regulator description.</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml<br/>index 7d0adb74a396..cc4ceb32e9d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/rohm,bd71815-regulator.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ROHM BD71815 Power Management Integrated Circuit regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This module is part of the ROHM BD718215 MFD device. For more details</div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       properties for wled regulator</div><div class='ctx'>     $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       regulator-name:</div><div class='hunk'>@@ -55,7 +56,7 @@ patternProperties:</div><div class='ctx'>           PMIC "RUN" state voltage in uV when PMIC HW states are used. See</div><div class='ctx'>           comments below for bucks/LDOs which support this. 0 means</div><div class='ctx'>           regulator should be disabled at RUN state.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='hunk'>@@ -66,7 +67,7 @@ patternProperties:</div><div class='ctx'>           keeps regulator enabled. BD71815 does not change voltage level</div><div class='ctx'>           when PMIC transitions to SNVS.SNVS voltage depends on the previous</div><div class='ctx'>           state (from which the PMIC transitioned to SNVS).</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='hunk'>@@ -75,7 +76,7 @@ patternProperties:</div><div class='ctx'>           PMIC "SUSPEND" state voltage in uV when PMIC HW states are used. See</div><div class='ctx'>           comments below for bucks/LDOs which support this. 0 means</div><div class='ctx'>           regulator should be disabled at SUSPEND state.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='hunk'>@@ -84,7 +85,7 @@ patternProperties:</div><div class='ctx'>           PMIC "LPSR" state voltage in uV when PMIC HW states are used. See</div><div class='ctx'>           comments below for bucks/LDOs which support this. 0 means</div><div class='ctx'>           regulator should be disabled at LPSR state.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml<br/>index 5ce587fff961..d898800d6bca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/rohm,bd71828-regulator.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ROHM BD71828 Power Management Integrated Circuit regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This module is part of the ROHM BD71828 MFD device. For more details</div><div class='hunk'>@@ -52,7 +52,7 @@ patternProperties:</div><div class='ctx'>         description:</div><div class='ctx'>           PMIC default "RUN" state voltage in uV. See below table for</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +60,7 @@ patternProperties:</div><div class='ctx'>         description:</div><div class='ctx'>           PMIC default "IDLE" state voltage in uV. See below table for</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='hunk'>@@ -68,7 +68,7 @@ patternProperties:</div><div class='ctx'>         description:</div><div class='ctx'>           PMIC default "SUSPEND" state voltage in uV. See below table for</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='hunk'>@@ -76,26 +76,26 @@ patternProperties:</div><div class='ctx'>         description:</div><div class='ctx'>           PMIC default "LPSR" state voltage in uV. See below table for</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3300000</div><div class='ctx'> </div><div class='ctx'>         # Supported default DVS states:</div><div class='ctx'>         #     buck       |    run     |   idle    | suspend  | lpsr</div><div class='del'>-        #--------------------------------------------------------------</div><div class='add'>+        # --------------------------------------------------------------</div><div class='ctx'>         # 1, 2, 6, and 7 | supported  | supported | supported (*)</div><div class='del'>-        #--------------------------------------------------------------</div><div class='add'>+        # --------------------------------------------------------------</div><div class='ctx'>         # 3, 4, and 5    |                    supported (**)</div><div class='del'>-        #--------------------------------------------------------------</div><div class='add'>+        # --------------------------------------------------------------</div><div class='ctx'>         #</div><div class='del'>-        #(*)  LPSR and SUSPEND states use same voltage but both states have own</div><div class='del'>-        #     enable /</div><div class='del'>-        #     disable settings. Voltage 0 can be specified for a state to make</div><div class='del'>-        #     regulator disabled on that state.</div><div class='add'>+        # (*)  LPSR and SUSPEND states use same voltage but both states have own</div><div class='add'>+        #      enable /</div><div class='add'>+        #      disable settings. Voltage 0 can be specified for a state to make</div><div class='add'>+        #      regulator disabled on that state.</div><div class='ctx'>         #</div><div class='del'>-        #(**) All states use same voltage but have own enable / disable</div><div class='del'>-        #     settings. Voltage 0 can be specified for a state to make</div><div class='del'>-        #     regulator disabled on that state.</div><div class='add'>+        # (**) All states use same voltage but have own enable / disable</div><div class='add'>+        #      settings. Voltage 0 can be specified for a state to make</div><div class='add'>+        #      regulator disabled on that state.</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - regulator-name</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml<br/>index 1941b36cf1ef..29b350a4f88a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ROHM BD71837 Power Management Integrated Circuit regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   List of regulators provided by this controller. BD71837 regulators node</div><div class='hunk'>@@ -23,9 +23,9 @@ description: |</div><div class='ctx'>   if they are disabled at startup the voltage monitoring for LDO5/LDO6 will</div><div class='ctx'>   cause PMIC to reset.</div><div class='ctx'> </div><div class='del'>-#The valid names for BD71837 regulator nodes are:</div><div class='del'>-#BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7, BUCK8</div><div class='del'>-#LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7</div><div class='add'>+# The valid names for BD71837 regulator nodes are:</div><div class='add'>+# BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6, BUCK7, BUCK8</div><div class='add'>+# LDO1, LDO2, LDO3, LDO4, LDO5, LDO6, LDO7</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^LDO[1-7]$":</div><div class='hunk'>@@ -55,7 +55,7 @@ patternProperties:</div><div class='ctx'>           should be "buck1", ..., "buck8"</div><div class='ctx'> </div><div class='ctx'>       rohm,dvs-run-voltage:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 1300000</div><div class='ctx'>         description:</div><div class='hunk'>@@ -63,7 +63,7 @@ patternProperties:</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='ctx'> </div><div class='ctx'>       rohm,dvs-idle-voltage:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 1300000</div><div class='ctx'>         description:</div><div class='hunk'>@@ -71,7 +71,7 @@ patternProperties:</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='ctx'> </div><div class='ctx'>       rohm,dvs-suspend-voltage:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 1300000</div><div class='ctx'>         description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml<br/>index a1b806373853..7ba4ccf723d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ROHM BD71847 and BD71850 Power Management Integrated Circuit regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   List of regulators provided by this controller. BD71847 regulators node</div><div class='hunk'>@@ -22,9 +22,9 @@ description: |</div><div class='ctx'>   not be disabled by driver at startup. If BUCK5 is disabled at startup the</div><div class='ctx'>   voltage monitoring for LDO5/LDO6 can cause PMIC to reset.</div><div class='ctx'> </div><div class='del'>-#The valid names for BD71847 regulator nodes are:</div><div class='del'>-#BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6</div><div class='del'>-#LDO1, LDO2, LDO3, LDO4, LDO5, LDO6</div><div class='add'>+# The valid names for BD71847 regulator nodes are:</div><div class='add'>+# BUCK1, BUCK2, BUCK3, BUCK4, BUCK5, BUCK6</div><div class='add'>+# LDO1, LDO2, LDO3, LDO4, LDO5, LDO6</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^LDO[1-6]$":</div><div class='hunk'>@@ -54,7 +54,7 @@ patternProperties:</div><div class='ctx'>           should be "buck1", ..., "buck6"</div><div class='ctx'> </div><div class='ctx'>       rohm,dvs-run-voltage:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 1300000</div><div class='ctx'>         description:</div><div class='hunk'>@@ -62,7 +62,7 @@ patternProperties:</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='ctx'> </div><div class='ctx'>       rohm,dvs-idle-voltage:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 1300000</div><div class='ctx'>         description:</div><div class='hunk'>@@ -70,7 +70,7 @@ patternProperties:</div><div class='ctx'>           bucks which support this. 0 means disabled.</div><div class='ctx'> </div><div class='ctx'>       rohm,dvs-suspend-voltage:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 1300000</div><div class='ctx'>         description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml<br/>index 7cb74cc8c5d9..f573128da06f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ROHM BD9576 and BD9573 Power Management Integrated Circuit regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Matti Vaittinen &lt;matti.vaittinen@fi.rohmeurope.com&gt;</div><div class='add'>+  - Matti Vaittinen &lt;mazziesaccount@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This module is part of the ROHM BD9576 MFD device. For more details</div><div class='hunk'>@@ -21,11 +21,11 @@ description: |</div><div class='ctx'>   regulator-voutl1, regulator-vouts1</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "regulator-.+":</div><div class='add'>+  "^regulator-.+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Properties for single regulator.</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       rohm,ocw-fet-ron-micro-ohms:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml<br/>index 0627dec513da..0f9eb317ba9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/samsung,s2mpa01.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPA01 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml<br/>index e3b780715f44..f1c50dcd0b04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/samsung,s2mps11.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPS11 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml<br/>index 579d77aefc3f..53b105a4ead1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/samsung,s2mps13.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPS13 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml<br/>index fdea290b3e94..a7feb497eb89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/samsung,s2mps14.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPS14 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='hunk'>@@ -19,8 +19,8 @@ description: |</div><div class='ctx'>   additional information and example.</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  # 25 LDOs</div><div class='del'>-  "^LDO([1-9]|[1][0-9]|2[0-5])$":</div><div class='add'>+  # 25 LDOs, without LDO10-12</div><div class='add'>+  "^LDO([1-9]|1[3-9]|2[0-5])$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: regulator.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='hunk'>@@ -30,6 +30,23 @@ patternProperties:</div><div class='ctx'>     required:</div><div class='ctx'>       - regulator-name</div><div class='ctx'> </div><div class='add'>+  "^LDO(1[0-2])$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for single LDO regulator.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      samsung,ext-control-gpios:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description:</div><div class='add'>+          LDO10, LDO11 and LDO12 can be configured to external control over</div><div class='add'>+          GPIO.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - regulator-name</div><div class='add'>+</div><div class='ctx'>   # 5 bucks</div><div class='ctx'>   "^BUCK[1-5]$":</div><div class='ctx'>     type: object</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml<br/>index b3a883c94628..9576c2df45a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/samsung,s2mps15.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPS15 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml b/Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml<br/>index 0ded6953e3b6..39b652c3c3c4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/samsung,s2mpu02.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S2MPU02 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml b/Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml<br/>index 3c1617b66861..172631ca3c25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/samsung,s5m8767.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S5M8767 Power Management IC regulators</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This is a part of device tree bindings for S2M and S5M family of Power</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml b/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml<br/>index a52a67c869b5..c3a902e11b5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/silergy,sy8106a.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/regulator/silergy,sy8106a.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Silergy SY8106A Voltage Regulator Device Tree Bindings</div><div class='add'>+title: Silergy SY8106A Voltage Regulator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Ondrej Jirman &lt;megous@megous.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml b/Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml<br/>new file mode 100644<br/>index 000000000000..9d84117530ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/siliconmitus,sm5703-regulator.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/siliconmitus,sm5703-regulator.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Silicon Mitus SM5703 multi function device regulators</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Markuss Broks &lt;markuss.broks@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  SM5703 regulators node should be a sub node of the SM5703 MFD node. See SM5703 MFD</div><div class='add'>+  bindings at Documentation/devicetree/bindings/mfd/siliconmitus,sm5703.yaml</div><div class='add'>+  Regulator nodes should be named as USBLDO_&lt;number&gt;, BUCK, VBUS, LDO_&lt;number&gt;.</div><div class='add'>+  The definition for each of these nodes is defined using the standard</div><div class='add'>+  binding for regulators at Documentation/devicetree/bindings/regulator/regulator.txt.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  buck:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for the BUCK regulator.</div><div class='add'>+</div><div class='add'>+  vbus:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for the VBUS regulator.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^ldo[1-3]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for single LDO regulator.</div><div class='add'>+</div><div class='add'>+  "^usbldo[1-2]$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Properties for a single USBLDO regulator.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml b/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml<br/>index cc40cf72a149..ddaa112252e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml</a></div><div class='hunk'>@@ -42,7 +42,7 @@ properties:</div><div class='ctx'>   reset-names: true</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -77,7 +77,7 @@ allOf:</div><div class='ctx'>         reset-names:</div><div class='ctx'>           const: link</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -89,19 +89,11 @@ required:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    usb-glue@65b00000 {</div><div class='del'>-        compatible = "simple-mfd";</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0 0x65b00000 0x400&gt;;</div><div class='del'>-</div><div class='del'>-        usb_vbus0: regulators@100 {</div><div class='del'>-            compatible = "socionext,uniphier-ld20-usb3-regulator";</div><div class='del'>-            reg = &lt;0x100 0x10&gt;;</div><div class='del'>-            clock-names = "link";</div><div class='del'>-            clocks = &lt;&amp;sys_clk 14&gt;;</div><div class='del'>-            reset-names = "link";</div><div class='del'>-            resets = &lt;&amp;sys_rst 14&gt;;</div><div class='del'>-        };</div><div class='add'>+    usb_vbus0: regulators@100 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-usb3-regulator";</div><div class='add'>+        reg = &lt;0x100 0x10&gt;;</div><div class='add'>+        clock-names = "link";</div><div class='add'>+        clocks = &lt;&amp;sys_clk 14&gt;;</div><div class='add'>+        reset-names = "link";</div><div class='add'>+        resets = &lt;&amp;sys_rst 14&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml b/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml<br/>index 38bdaef4fa39..c863100f6e7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/regulator/st,stm32-booster.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 booster for ADC analog input switches bindings</div><div class='add'>+title: STMicroelectronics STM32 booster for ADC analog input switches</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;</div><div class='hunk'>@@ -14,7 +14,7 @@ description: |</div><div class='ctx'>   to supply ADC analog input switches.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -23,7 +23,7 @@ properties:</div><div class='ctx'>       - st,stm32mp1-booster</div><div class='ctx'> </div><div class='ctx'>   st,syscfg:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: phandle to system configuration controller.</div><div class='ctx'> </div><div class='ctx'>   vdda-supply:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml<br/>index 836d4156d54c..05f4ad2c7d3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/regulator/st,stm32-vrefbuf.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Voltage reference buffer bindings</div><div class='add'>+title: STMicroelectronics STM32 Voltage reference buffer</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Some STM32 devices embed a voltage reference buffer which can be used as</div><div class='hunk'>@@ -15,7 +15,7 @@ maintainers:</div><div class='ctx'>   - Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -51,4 +51,3 @@ examples:</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml b/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml<br/>index bd07b9c81570..7d53cfa2c288 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/st,stm32mp1-pwr-reg.yaml</a></div><div class='hunk'>@@ -26,7 +26,7 @@ patternProperties:</div><div class='ctx'>   "^(reg11|reg18|usb33)$":</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml b/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml<br/>index 12aeddedde05..90c39275c150 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/ti,tps62360.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/ti,tps62360.yaml</a></div><div class='hunk'>@@ -19,7 +19,7 @@ description: |</div><div class='ctx'>   https://www.ti.com/lit/gpn/tps62360</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml b/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml<br/>new file mode 100644<br/>index 000000000000..78e64521d401<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/ti,tps65219.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/ti,tps65219.yaml</a></div><div class='hunk'>@@ -0,0 +1,173 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/regulator/ti,tps65219.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI tps65219 Power Management Integrated Circuit regulators</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Neanne &lt;jerome.neanne@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Regulator nodes should be named to buck&lt;number&gt; and ldo&lt;number&gt;.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,tps65219</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  system-power-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Optional property that indicates that this device is</div><div class='add'>+      controlling system power.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: Short-circuit, over-current, under-voltage for regulators, PB interrupts.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    description: Specifies the PIN numbers and Flags, as defined in</div><div class='add'>+      include/dt-bindings/interrupt-controller/irq.h</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ti,power-button:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      Optional property that sets the EN/PB/VSENSE pin to be a</div><div class='add'>+      power-button.</div><div class='add'>+      TPS65219 has a multipurpose pin called EN/PB/VSENSE that can be either</div><div class='add'>+      1. EN in which case it functions as an enable pin.</div><div class='add'>+      2. VSENSE which compares the voltages and triggers an automatic</div><div class='add'>+      on/off request.</div><div class='add'>+      3. PB in which case it can be configured to trigger an interrupt</div><div class='add'>+      to the SoC.</div><div class='add'>+      ti,power-button reflects the last one of those options</div><div class='add'>+      where the board has a button wired to the pin and triggers</div><div class='add'>+      an interrupt on pressing it.</div><div class='add'>+</div><div class='add'>+  regulators:</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      list of regulators provided by this controller</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^ldo[1-4]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: regulator.yaml#</div><div class='add'>+        description:</div><div class='add'>+          Properties for single LDO regulator.</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+      "^buck[1-3]$":</div><div class='add'>+        type: object</div><div class='add'>+        $ref: regulator.yaml#</div><div class='add'>+        description:</div><div class='add'>+          Properties for single BUCK regulator.</div><div class='add'>+</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^buck[1-3]-supply$":</div><div class='add'>+    description: Input supply phandle of one regulator.</div><div class='add'>+</div><div class='add'>+  "^ldo[1-4]-supply$":</div><div class='add'>+    description: Input supply phandle of one regulator.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - regulators</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        tps65219: pmic@30 {</div><div class='add'>+            compatible = "ti,tps65219";</div><div class='add'>+            reg = &lt;0x30&gt;;</div><div class='add'>+            buck1-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+            buck2-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+            buck3-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+            ldo1-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+            ldo2-supply = &lt;&amp;buck2_reg&gt;;</div><div class='add'>+            ldo3-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+            ldo4-supply = &lt;&amp;vcc_3v3_sys&gt;;</div><div class='add'>+</div><div class='add'>+            pinctrl-0 = &lt;&amp;pmic_irq_pins_default&gt;;</div><div class='add'>+</div><div class='add'>+            interrupt-parent = &lt;&amp;gic500&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            ti,power-button;</div><div class='add'>+</div><div class='add'>+            regulators {</div><div class='add'>+                buck1_reg: buck1 {</div><div class='add'>+                    regulator-name = "VDD_CORE";</div><div class='add'>+                    regulator-min-microvolt = &lt;750000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;750000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                buck2_reg: buck2 {</div><div class='add'>+                    regulator-name = "VCC1V8";</div><div class='add'>+                    regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                buck3_reg: buck3 {</div><div class='add'>+                    regulator-name = "VDD_LPDDR4";</div><div class='add'>+                    regulator-min-microvolt = &lt;1100000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;1100000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                ldo1_reg: ldo1 {</div><div class='add'>+                    regulator-name = "VDDSHV_SD_IO_PMIC";</div><div class='add'>+                    regulator-min-microvolt = &lt;33000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;33000000&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                ldo2_reg: ldo2 {</div><div class='add'>+                    regulator-name = "VDDAR_CORE";</div><div class='add'>+                    regulator-min-microvolt = &lt;850000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;850000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                ldo3_reg: ldo3 {</div><div class='add'>+                    regulator-name = "VDDA_1V8";</div><div class='add'>+                    regulator-min-microvolt = &lt;18000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;18000000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                ldo4_reg: ldo4 {</div><div class='add'>+                    regulator-name = "VDD_PHY_2V5";</div><div class='add'>+                    regulator-min-microvolt = &lt;25000000&gt;;</div><div class='add'>+                    regulator-max-microvolt = &lt;25000000&gt;;</div><div class='add'>+                    regulator-boot-on;</div><div class='add'>+                    regulator-always-on;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/vexpress.txt b/Documentation/devicetree/bindings/regulator/vexpress.txt<br/>index d775f72487aa..1c2e92c7831e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/vexpress.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/vexpress.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/vexpress.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/vexpress.txt</a></div><div class='hunk'>@@ -4,7 +4,7 @@ Versatile Express voltage regulators</div><div class='ctx'> Requires node properties:</div><div class='ctx'> - "compatible" value: "arm,vexpress-volt"</div><div class='ctx'> - "arm,vexpress-sysreg,func" when controlled via vexpress-sysreg</div><div class='del'>-  (see Documentation/devicetree/bindings/arm/vexpress-sysreg.txt</div><div class='add'>+  (see Documentation/devicetree/bindings/arm/vexpress-config.yaml</div><div class='ctx'>   for more details)</div><div class='ctx'> </div><div class='ctx'> Required regulator properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml b/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml<br/>index dd7a2f92634c..3b16a25ba3b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ description: |</div><div class='ctx'>   controller is also embedded.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "regulator.yaml#"</div><div class='add'>+  - $ref: regulator.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml<br/>index 7b4ae5d23351..011819c10988 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/regulator/wlf,arizona.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/regulator/wlf,arizona.yaml</a></div><div class='hunk'>@@ -21,19 +21,19 @@ properties:</div><div class='ctx'>   wlf,ldoena:</div><div class='ctx'>     description:</div><div class='ctx'>       GPIO specifier for the GPIO controlling LDOENA.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   ldo1:</div><div class='ctx'>     description:</div><div class='ctx'>       Initial data for the LDO1 regulator.</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>   micvdd:</div><div class='ctx'>     description:</div><div class='ctx'>       Initial data for the MICVDD regulator.</div><div class='del'>-    $ref: "regulator.yaml#"</div><div class='add'>+    $ref: regulator.yaml#</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml b/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml<br/>index d892d29a656b..3100cb870170 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/amlogic,meson-mx-ao-arc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/remoteproc/amlogic,meson-mx-ao-arc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/amlogic,meson-mx-ao-arc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Amlogic Meson AO ARC Remote Processor bindings</div><div class='add'>+title: Amlogic Meson AO ARC Remote Processor</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Amlogic Meson6, Meson8, Meson8b and Meson8m2 SoCs embed an ARC core</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml<br/>index fc16d903353e..0c3910f152d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/fsl,imx-rproc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX Co-Processor Bindings</div><div class='add'>+title: NXP i.MX Co-Processor</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.</div><div class='hunk'>@@ -15,14 +15,17 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='del'>-      - fsl,imx8mq-cm4</div><div class='add'>+      - fsl,imx6sx-cm4</div><div class='add'>+      - fsl,imx7d-cm4</div><div class='add'>+      - fsl,imx7ulp-cm4</div><div class='ctx'>       - fsl,imx8mm-cm4</div><div class='ctx'>       - fsl,imx8mn-cm7</div><div class='ctx'>       - fsl,imx8mp-cm7</div><div class='add'>+      - fsl,imx8mq-cm4</div><div class='add'>+      - fsl,imx8qm-cm4</div><div class='add'>+      - fsl,imx8qxp-cm4</div><div class='ctx'>       - fsl,imx8ulp-cm33</div><div class='del'>-      - fsl,imx7d-cm4</div><div class='del'>-      - fsl,imx7ulp-cm4</div><div class='del'>-      - fsl,imx6sx-cm4</div><div class='add'>+      - fsl,imx93-cm33</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -53,12 +56,26 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 32</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='ctx'>   fsl,auto-boot:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='ctx'>       Indicate whether need to load the default firmware and start the remote</div><div class='ctx'>       processor automatically.</div><div class='ctx'> </div><div class='add'>+  fsl,entry-address:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Specify CPU entry address for SCU enabled processor.</div><div class='add'>+</div><div class='add'>+  fsl,resource-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      This property is to specify the resource id of the remote processor in SoC</div><div class='add'>+      which supports SCFW</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml b/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml<br/>index aaaaabad46ea..8b55dbd909b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/remoteproc/ingenic,vpu.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/ingenic,vpu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic Video Processing Unit bindings</div><div class='add'>+title: Ingenic Video Processing Unit</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Inside the Video Processing Unit (VPU) of the recent JZ47xx SoCs from</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml b/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml<br/>index 5b693a2d049c..895415772d1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/mtk,scp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/remoteproc/mtk,scp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek SCP Bindings</div><div class='add'>+title: Mediatek SCP</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Tinghan Shen &lt;tinghan.shen@mediatek.com&gt;</div><div class='hunk'>@@ -18,16 +18,19 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - mediatek,mt8183-scp</div><div class='ctx'>       - mediatek,mt8186-scp</div><div class='add'>+      - mediatek,mt8188-scp</div><div class='ctx'>       - mediatek,mt8192-scp</div><div class='ctx'>       - mediatek,mt8195-scp</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description:</div><div class='del'>-      Should contain the address ranges for memory regions SRAM, CFG, and</div><div class='del'>-      L1TCM.</div><div class='add'>+      Should contain the address ranges for memory regions SRAM, CFG, and,</div><div class='add'>+      on some platforms, L1TCM.</div><div class='add'>+    minItems: 2</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='add'>+    minItems: 2</div><div class='ctx'>     items:</div><div class='ctx'>       - const: sram</div><div class='ctx'>       - const: cfg</div><div class='hunk'>@@ -42,21 +45,49 @@ properties:</div><div class='ctx'>   clock-names:</div><div class='ctx'>     const: main</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description:</div><div class='add'>+      If present, name (or relative path) of the file within the</div><div class='add'>+      firmware search path containing the firmware image used when</div><div class='add'>+      initializing SCP.</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - reg-names</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      enum:</div><div class='del'>-        - mediatek,mt8183-scp</div><div class='del'>-        - mediatek,mt8192-scp</div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - clocks</div><div class='del'>-    - clock-names</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - mediatek,mt8183-scp</div><div class='add'>+            - mediatek,mt8192-scp</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - mediatek,mt8183-scp</div><div class='add'>+            - mediatek,mt8186-scp</div><div class='add'>+            - mediatek,mt8188-scp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reg-names:</div><div class='add'>+          maxItems: 2</div><div class='ctx'> </div><div class='ctx'> additionalProperties:</div><div class='ctx'>   type: object</div><div class='hunk'>@@ -76,10 +107,10 @@ additionalProperties:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8192-clk.h&gt;</div><div class='ctx'> </div><div class='ctx'>     scp@10500000 {</div><div class='del'>-        compatible = "mediatek,mt8183-scp";</div><div class='add'>+        compatible = "mediatek,mt8192-scp";</div><div class='ctx'>         reg = &lt;0x10500000 0x80000&gt;,</div><div class='ctx'>               &lt;0x10700000 0x8000&gt;,</div><div class='ctx'>               &lt;0x10720000 0xe0000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml<br/>index a4409c398193..643ee787a81f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/remoteproc/qcom,adsp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm ADSP Peripheral Image Loader binding</div><div class='add'>+title: Qualcomm ADSP Peripheral Image Loader</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='hunk'>@@ -16,179 +16,53 @@ description:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - qcom,msm8226-adsp-pil</div><div class='add'>+      - qcom,msm8953-adsp-pil</div><div class='ctx'>       - qcom,msm8974-adsp-pil</div><div class='ctx'>       - qcom,msm8996-adsp-pil</div><div class='ctx'>       - qcom,msm8996-slpi-pil</div><div class='ctx'>       - qcom,msm8998-adsp-pas</div><div class='ctx'>       - qcom,msm8998-slpi-pas</div><div class='del'>-      - qcom,qcs404-adsp-pas</div><div class='del'>-      - qcom,qcs404-cdsp-pas</div><div class='del'>-      - qcom,qcs404-wcss-pas</div><div class='del'>-      - qcom,sc7180-mpss-pas</div><div class='del'>-      - qcom,sc7280-mpss-pas</div><div class='del'>-      - qcom,sc8180x-adsp-pas</div><div class='del'>-      - qcom,sc8180x-cdsp-pas</div><div class='del'>-      - qcom,sc8180x-mpss-pas</div><div class='ctx'>       - qcom,sdm660-adsp-pas</div><div class='ctx'>       - qcom,sdm845-adsp-pas</div><div class='ctx'>       - qcom,sdm845-cdsp-pas</div><div class='del'>-      - qcom,sdx55-mpss-pas</div><div class='del'>-      - qcom,sm6350-adsp-pas</div><div class='del'>-      - qcom,sm6350-cdsp-pas</div><div class='del'>-      - qcom,sm6350-mpss-pas</div><div class='del'>-      - qcom,sm8150-adsp-pas</div><div class='del'>-      - qcom,sm8150-cdsp-pas</div><div class='del'>-      - qcom,sm8150-mpss-pas</div><div class='del'>-      - qcom,sm8150-slpi-pas</div><div class='del'>-      - qcom,sm8250-adsp-pas</div><div class='del'>-      - qcom,sm8250-cdsp-pas</div><div class='del'>-      - qcom,sm8250-slpi-pas</div><div class='del'>-      - qcom,sm8350-adsp-pas</div><div class='del'>-      - qcom,sm8350-cdsp-pas</div><div class='del'>-      - qcom,sm8350-slpi-pas</div><div class='del'>-      - qcom,sm8350-mpss-pas</div><div class='del'>-      - qcom,sm8450-adsp-pas</div><div class='del'>-      - qcom,sm8450-cdsp-pas</div><div class='del'>-      - qcom,sm8450-mpss-pas</div><div class='del'>-      - qcom,sm8450-slpi-pas</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 8</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 8</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    minItems: 5</div><div class='del'>-    maxItems: 6</div><div class='del'>-</div><div class='del'>-  interrupt-names:</div><div class='del'>-    minItems: 5</div><div class='del'>-    maxItems: 6</div><div class='del'>-</div><div class='del'>-  resets:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='del'>-  reset-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='ctx'>   cx-supply:</div><div class='ctx'>     description: Phandle to the CX regulator</div><div class='ctx'> </div><div class='ctx'>   px-supply:</div><div class='ctx'>     description: Phandle to the PX regulator</div><div class='ctx'> </div><div class='del'>-  power-domains:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='del'>-  power-domain-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 3</div><div class='del'>-</div><div class='del'>-  firmware-name:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/string</div><div class='del'>-    description: Firmware name for the Hexagon core</div><div class='del'>-</div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description: Reference to the reserved-memory for the Hexagon core</div><div class='del'>-</div><div class='ctx'>   qcom,qmp:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: Reference to the AOSS side-channel message RAM.</div><div class='ctx'> </div><div class='del'>-  qcom,smem-states:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='del'>-    description: States used by the AP to signal the Hexagon core</div><div class='del'>-    items:</div><div class='del'>-      - description: Stop the modem</div><div class='del'>-</div><div class='del'>-  qcom,smem-state-names:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='del'>-    description: The names of the state bits used for SMP2P output</div><div class='del'>-    items:</div><div class='del'>-      - const: stop</div><div class='del'>-</div><div class='del'>-  qcom,halt-regs:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='del'>-    items:</div><div class='del'>-      - items:</div><div class='del'>-          - description: Phandle reference to a syscon representing TCSR</div><div class='del'>-          - description: offsets within syscon for q6 halt registers</div><div class='del'>-          - description: offsets within syscon for modem halt registers</div><div class='del'>-          - description: offsets within syscon for nc halt registers</div><div class='del'>-    description:</div><div class='del'>-      Phandle reference to a syscon representing TCSR followed by the</div><div class='del'>-      three offsets within syscon for q6, modem and nc halt registers.</div><div class='del'>-</div><div class='del'>-  smd-edge:</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Qualcomm Shared Memory subnode which represents communication edge,</div><div class='del'>-      channels and devices related to the ADSP.</div><div class='del'>-</div><div class='del'>-  glink-edge:</div><div class='del'>-    type: object</div><div class='del'>-    description:</div><div class='del'>-      Qualcomm G-Link subnode which represents communication edge, channels</div><div class='del'>-      and devices related to the ADSP.</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - clocks</div><div class='del'>-  - clock-names</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-names</div><div class='del'>-  - memory-region</div><div class='del'>-  - qcom,smem-states</div><div class='del'>-  - qcom,smem-state-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - qcom,msm8226-adsp-pil</div><div class='add'>+              - qcom,msm8953-adsp-pil</div><div class='ctx'>               - qcom,msm8974-adsp-pil</div><div class='ctx'>               - qcom,msm8996-adsp-pil</div><div class='del'>-              - qcom,msm8996-slpi-pil</div><div class='ctx'>               - qcom,msm8998-adsp-pas</div><div class='del'>-              - qcom,qcs404-adsp-pas</div><div class='del'>-              - qcom,qcs404-wcss-pas</div><div class='del'>-              - qcom,sc7280-mpss-pas</div><div class='del'>-              - qcom,sc8180x-adsp-pas</div><div class='del'>-              - qcom,sc8180x-cdsp-pas</div><div class='del'>-              - qcom,sc8180x-mpss-pas</div><div class='ctx'>               - qcom,sdm845-adsp-pas</div><div class='ctx'>               - qcom,sdm845-cdsp-pas</div><div class='del'>-              - qcom,sm6350-adsp-pas</div><div class='del'>-              - qcom,sm6350-cdsp-pas</div><div class='del'>-              - qcom,sm6350-mpss-pas</div><div class='del'>-              - qcom,sm8150-adsp-pas</div><div class='del'>-              - qcom,sm8150-cdsp-pas</div><div class='del'>-              - qcom,sm8150-mpss-pas</div><div class='del'>-              - qcom,sm8150-slpi-pas</div><div class='del'>-              - qcom,sm8250-adsp-pas</div><div class='del'>-              - qcom,sm8250-cdsp-pas</div><div class='del'>-              - qcom,sm8250-slpi-pas</div><div class='del'>-              - qcom,sm8350-adsp-pas</div><div class='del'>-              - qcom,sm8350-cdsp-pas</div><div class='del'>-              - qcom,sm8350-slpi-pas</div><div class='del'>-              - qcom,sm8350-mpss-pas</div><div class='del'>-              - qcom,sm8450-adsp-pas</div><div class='del'>-              - qcom,sm8450-cdsp-pas</div><div class='del'>-              - qcom,sm8450-slpi-pas</div><div class='del'>-              - qcom,sm8450-mpss-pas</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='hunk'>@@ -203,6 +77,7 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - qcom,msm8996-slpi-pil</div><div class='ctx'>               - qcom,msm8998-slpi-pas</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -220,134 +95,21 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='del'>-              - qcom,qcs404-cdsp-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: XO clock</div><div class='del'>-            - description: SWAY clock</div><div class='del'>-            - description: TBU clock</div><div class='del'>-            - description: BIMC clock</div><div class='del'>-            - description: AHB AON clock</div><div class='del'>-            - description: Q6SS SLAVE clock</div><div class='del'>-            - description: Q6SS MASTER clock</div><div class='del'>-            - description: Q6 AXIM clock</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: xo</div><div class='del'>-            - const: sway</div><div class='del'>-            - const: tbu</div><div class='del'>-            - const: bimc</div><div class='del'>-            - const: ahb_aon</div><div class='del'>-            - const: q6ss_slave</div><div class='del'>-            - const: q6ss_master</div><div class='del'>-            - const: q6_axim</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sc7180-mpss-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: XO clock</div><div class='del'>-            - description: IFACE clock</div><div class='del'>-            - description: BUS clock</div><div class='del'>-            - description: NAC clock</div><div class='del'>-            - description: SNOC AXI clock</div><div class='del'>-            - description: MNOC AXI clock</div><div class='del'>-        clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: xo</div><div class='del'>-            - const: iface</div><div class='del'>-            - const: bus</div><div class='del'>-            - const: nav</div><div class='del'>-            - const: snoc_axi</div><div class='del'>-            - const: mnoc_axi</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='add'>+              - qcom,msm8226-adsp-pil</div><div class='add'>+              - qcom,msm8953-adsp-pil</div><div class='ctx'>               - qcom,msm8974-adsp-pil</div><div class='ctx'>               - qcom,msm8996-adsp-pil</div><div class='ctx'>               - qcom,msm8996-slpi-pil</div><div class='ctx'>               - qcom,msm8998-adsp-pas</div><div class='ctx'>               - qcom,msm8998-slpi-pas</div><div class='del'>-              - qcom,qcs404-adsp-pas</div><div class='del'>-              - qcom,qcs404-cdsp-pas</div><div class='del'>-              - qcom,qcs404-wcss-pas</div><div class='del'>-              - qcom,sc8180x-adsp-pas</div><div class='del'>-              - qcom,sc8180x-cdsp-pas</div><div class='ctx'>               - qcom,sdm845-adsp-pas</div><div class='ctx'>               - qcom,sdm845-cdsp-pas</div><div class='del'>-              - qcom,sm6350-adsp-pas</div><div class='del'>-              - qcom,sm6350-cdsp-pas</div><div class='del'>-              - qcom,sm8150-adsp-pas</div><div class='del'>-              - qcom,sm8150-cdsp-pas</div><div class='del'>-              - qcom,sm8150-slpi-pas</div><div class='del'>-              - qcom,sm8250-adsp-pas</div><div class='del'>-              - qcom,sm8250-cdsp-pas</div><div class='del'>-              - qcom,sm8250-slpi-pas</div><div class='del'>-              - qcom,sm8350-adsp-pas</div><div class='del'>-              - qcom,sm8350-cdsp-pas</div><div class='del'>-              - qcom,sm8350-slpi-pas</div><div class='del'>-              - qcom,sm8450-adsp-pas</div><div class='del'>-              - qcom,sm8450-cdsp-pas</div><div class='del'>-              - qcom,sm8450-slpi-pas</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='del'>-          items:</div><div class='del'>-            - description: Watchdog interrupt</div><div class='del'>-            - description: Fatal interrupt</div><div class='del'>-            - description: Ready interrupt</div><div class='del'>-            - description: Handover interrupt</div><div class='del'>-            - description: Stop acknowledge interrupt</div><div class='add'>+          maxItems: 5</div><div class='ctx'>         interrupt-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: wdog</div><div class='del'>-            - const: fatal</div><div class='del'>-            - const: ready</div><div class='del'>-            - const: handover</div><div class='del'>-            - const: stop-ack</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sc7180-mpss-pas</div><div class='del'>-              - qcom,sc7280-mpss-pas</div><div class='del'>-              - qcom,sc8180x-mpss-pas</div><div class='del'>-              - qcom,sdx55-mpss-pas</div><div class='del'>-              - qcom,sm6350-mpss-pas</div><div class='del'>-              - qcom,sm8150-mpss-pas</div><div class='del'>-              - qcom,sm8350-mpss-pas</div><div class='del'>-              - qcom,sm8450-mpss-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        interrupts:</div><div class='del'>-          items:</div><div class='del'>-            - description: Watchdog interrupt</div><div class='del'>-            - description: Fatal interrupt</div><div class='del'>-            - description: Ready interrupt</div><div class='del'>-            - description: Handover interrupt</div><div class='del'>-            - description: Stop acknowledge interrupt</div><div class='del'>-            - description: Shutdown acknowledge interrupt</div><div class='del'>-        interrupt-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: wdog</div><div class='del'>-            - const: fatal</div><div class='del'>-            - const: ready</div><div class='del'>-            - const: handover</div><div class='del'>-            - const: stop-ack</div><div class='del'>-            - const: shutdown-ack</div><div class='add'>+          maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -364,6 +126,8 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - qcom,msm8226-adsp-pil</div><div class='add'>+              - qcom,msm8953-adsp-pil</div><div class='ctx'>               - qcom,msm8996-adsp-pil</div><div class='ctx'>               - qcom,msm8998-adsp-pas</div><div class='ctx'>     then:</div><div class='hunk'>@@ -398,164 +162,14 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='del'>-              - qcom,sc7180-mpss-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        power-domains:</div><div class='del'>-          items:</div><div class='del'>-            - description: CX power domain</div><div class='del'>-            - description: MX power domain</div><div class='del'>-            - description: MSS power domain</div><div class='del'>-        power-domain-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: cx</div><div class='del'>-            - const: mx</div><div class='del'>-            - const: mss</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sm6350-cdsp-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        power-domains:</div><div class='del'>-          items:</div><div class='del'>-            - description: CX power domain</div><div class='del'>-            - description: MX power domain</div><div class='del'>-        power-domain-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: cx</div><div class='del'>-            - const: mx</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sm8150-adsp-pas</div><div class='del'>-              - qcom,sm8150-cdsp-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        power-domains:</div><div class='del'>-          items:</div><div class='del'>-            - description: CX power domain</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sc7280-mpss-pas</div><div class='del'>-              - qcom,sdx55-mpss-pas</div><div class='del'>-              - qcom,sm6350-mpss-pas</div><div class='del'>-              - qcom,sm8150-mpss-pas</div><div class='del'>-              - qcom,sm8350-mpss-pas</div><div class='del'>-              - qcom,sm8450-mpss-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        power-domains:</div><div class='del'>-          items:</div><div class='del'>-            - description: CX power domain</div><div class='del'>-            - description: MSS power domain</div><div class='del'>-        power-domain-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: cx</div><div class='del'>-            - const: mss</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sc8180x-adsp-pas</div><div class='del'>-              - qcom,sc8180x-cdsp-pas</div><div class='del'>-              - qcom,sm6350-adsp-pas</div><div class='del'>-              - qcom,sm8150-slpi-pas</div><div class='del'>-              - qcom,sm8250-adsp-pas</div><div class='del'>-              - qcom,sm8250-slpi-pas</div><div class='del'>-              - qcom,sm8350-adsp-pas</div><div class='del'>-              - qcom,sm8350-slpi-pas</div><div class='del'>-              - qcom,sm8450-adsp-pas</div><div class='del'>-              - qcom,sm8450-slpi-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        power-domains:</div><div class='del'>-          items:</div><div class='del'>-            - description: LCX power domain</div><div class='del'>-            - description: LMX power domain</div><div class='del'>-        power-domain-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: lcx</div><div class='del'>-            - const: lmx</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sm8350-cdsp-pas</div><div class='del'>-              - qcom,sm8450-cdsp-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        power-domains:</div><div class='del'>-          items:</div><div class='del'>-            - description: CX power domain</div><div class='del'>-            - description: MXC power domain</div><div class='del'>-        power-domain-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: cx</div><div class='del'>-            - const: mxc</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,qcs404-cdsp-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: CDSP restart</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: restart</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - qcom,sc7180-mpss-pas</div><div class='del'>-              - qcom,sc7280-mpss-pas</div><div class='del'>-    then:</div><div class='del'>-      properties:</div><div class='del'>-        resets:</div><div class='del'>-          items:</div><div class='del'>-            - description: MSS restart</div><div class='del'>-            - description: PDC reset</div><div class='del'>-        reset-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: mss_restart</div><div class='del'>-            - const: pdc_reset</div><div class='del'>-</div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='add'>+              - qcom,msm8226-adsp-pil</div><div class='add'>+              - qcom,msm8953-adsp-pil</div><div class='ctx'>               - qcom,msm8974-adsp-pil</div><div class='ctx'>               - qcom,msm8996-adsp-pil</div><div class='ctx'>               - qcom,msm8996-slpi-pil</div><div class='ctx'>               - qcom,msm8998-adsp-pas</div><div class='ctx'>               - qcom,msm8998-slpi-pas</div><div class='del'>-              - qcom,qcs404-adsp-pas</div><div class='del'>-              - qcom,qcs404-cdsp-pas</div><div class='del'>-              - qcom,qcs404-wcss-pas</div><div class='ctx'>               - qcom,sdm660-adsp-pas</div><div class='del'>-              - qcom,sdx55-mpss-pas</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         qcom,qmp: false</div><div class='hunk'>@@ -563,11 +177,12 @@ allOf:</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     adsp {</div><div class='ctx'>         compatible = "qcom,msm8974-adsp-pil";</div><div class='ctx'> </div><div class='del'>-        interrupts-extended = &lt;&amp;intc 0 162 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'>                       &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'>                       &lt;&amp;adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='ctx'>                       &lt;&amp;adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='hunk'>@@ -589,7 +204,7 @@ examples:</div><div class='ctx'>         qcom,smem-state-names = "stop";</div><div class='ctx'> </div><div class='ctx'>         smd-edge {</div><div class='del'>-            interrupts = &lt;0 156 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 156 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='ctx'> </div><div class='ctx'>             qcom,ipc = &lt;&amp;apcs 8 8&gt;;</div><div class='ctx'>             qcom,smd-edge = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml<br/>new file mode 100644<br/>index 000000000000..7b43ad3daa56<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,glink-edge.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm G-Link Edge communication channel nodes</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm G-Link subnode represents communication edge, channels and devices</div><div class='add'>+  related to the remote processor.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: glink-edge</div><div class='add'>+</div><div class='add'>+  apr:</div><div class='add'>+    $ref: /schemas/soc/qcom/qcom,apr.yaml#</div><div class='add'>+    required:</div><div class='add'>+      - qcom,glink-channels</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm APR (Asynchronous Packet Router)</div><div class='add'>+</div><div class='add'>+  fastrpc:</div><div class='add'>+    $ref: /schemas/misc/qcom,fastrpc.yaml#</div><div class='add'>+    required:</div><div class='add'>+      - qcom,glink-channels</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm FastRPC</div><div class='add'>+</div><div class='add'>+  gpr:</div><div class='add'>+    $ref: /schemas/soc/qcom/qcom,apr.yaml#</div><div class='add'>+    required:</div><div class='add'>+      - qcom,glink-channels</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm GPR (Generic Packet Router)</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    description:</div><div class='add'>+      Name of the edge, used for debugging and identification purposes. The</div><div class='add'>+      node name will be used if this is not present.</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,remote-pid:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      ID of the shared memory used by GLINK for communication with remote</div><div class='add'>+      processor.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - interrupts</div><div class='add'>+  - label</div><div class='add'>+  - mboxes</div><div class='add'>+  - qcom,remote-pid</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - apr</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        gpr: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - gpr</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        apr: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@8a00000 {</div><div class='add'>+        reg = &lt;0x08a00000 0x10000&gt;;</div><div class='add'>+        // ...</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_WPSS</div><div class='add'>+                                         IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                         IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipcc IPCC_CLIENT_WPSS</div><div class='add'>+                            IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+            label = "wpss";</div><div class='add'>+            qcom,remote-pid = &lt;13&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml<br/>new file mode 100644<br/>index 000000000000..f5a044e20c4e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,glink-rpm-edge.yaml</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,glink-rpm-edge.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm G-Link RPM edge</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource</div><div class='add'>+  Power Manager (RPM) on various Qualcomm platforms.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,glink-rpm</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description:</div><div class='add'>+      Name of the edge, used for debugging and identification purposes. The</div><div class='add'>+      node name will be used if this is not present.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    items:</div><div class='add'>+      - description: rpm_hlos mailbox in APCS</div><div class='add'>+</div><div class='add'>+  qcom,remote-pid:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The identifier for the remote processor as known by the rest of the</div><div class='add'>+      system.</div><div class='add'>+</div><div class='add'>+  qcom,rpm-msg-ram:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      RPM message memory resource (compatible: qcom,rpm-msg-ram).</div><div class='add'>+</div><div class='add'>+  rpm-requests:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/soc/qcom/qcom,smd-rpm.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm Resource Power Manager (RPM) over G-Link</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      qcom,intents:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 32</div><div class='add'>+        items:</div><div class='add'>+          items:</div><div class='add'>+            - description: size of each intent to preallocate</div><div class='add'>+            - description: amount of intents to preallocate</div><div class='add'>+              minimum: 1</div><div class='add'>+        description:</div><div class='add'>+          List of (size, amount) pairs describing what intents should be</div><div class='add'>+          preallocated for this virtual channel. This can be used to tweak the</div><div class='add'>+          default intents available for the channel to meet expectations of the</div><div class='add'>+          remote.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - qcom,glink-channels</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - mboxes</div><div class='add'>+</div><div class='add'>+anyOf:</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,remote-pid</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,rpm-msg-ram</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    rpm-glink {</div><div class='add'>+        compatible = "qcom,glink-rpm";</div><div class='add'>+        interrupts = &lt;GIC_SPI 168 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        mboxes = &lt;&amp;apcs_glb 0&gt;;</div><div class='add'>+        qcom,rpm-msg-ram = &lt;&amp;rpm_msg_ram&gt;;</div><div class='add'>+</div><div class='add'>+        rpm-requests {</div><div class='add'>+            compatible = "qcom,rpm-msm8996";</div><div class='add'>+            qcom,glink-channels = "rpm_requests";</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml<br/>new file mode 100644<br/>index 000000000000..588b010b2a9e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,msm8916-mss-pil.yaml</a></div><div class='hunk'>@@ -0,0 +1,291 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,msm8916-mss-pil.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8916 MSS Peripheral Image Loader (and similar)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephan Gerhold &lt;stephan@gerhold.net&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document describes the hardware for a component that loads and boots</div><div class='add'>+  firmware on the Qualcomm MSM8916 Modem Hexagon Core (and similar).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,msm8909-mss-pil</div><div class='add'>+          - qcom,msm8916-mss-pil</div><div class='add'>+          - qcom,msm8953-mss-pil</div><div class='add'>+          - qcom,msm8974-mss-pil</div><div class='add'>+</div><div class='add'>+      - const: qcom,q6v5-pil</div><div class='add'>+        description: Deprecated, prefer using qcom,msm8916-mss-pil</div><div class='add'>+        deprecated: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSS QDSP6 registers</div><div class='add'>+      - description: RMB registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: qdsp6</div><div class='add'>+      - const: rmb</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Watchdog interrupt</div><div class='add'>+      - description: Fatal interrupt</div><div class='add'>+      - description: Ready interrupt</div><div class='add'>+      - description: Handover interrupt</div><div class='add'>+      - description: Stop acknowledge interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wdog</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: handover</div><div class='add'>+      - const: stop-ack</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Configuration interface (AXI) clock</div><div class='add'>+      - description: Configuration bus (AHB) clock</div><div class='add'>+      - description: Boot ROM (AHB) clock</div><div class='add'>+      - description: XO proxy clock (control handed over after startup)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: mem</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: CX proxy power domain (control handed over after startup)</div><div class='add'>+      - description: MX proxy power domain (control handed over after startup)</div><div class='add'>+      - description: MSS proxy power domain (control handed over after startup)</div><div class='add'>+                     (only valid for qcom,msm8953-mss-pil)</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cx</div><div class='add'>+      - const: mx</div><div class='add'>+      - const: mss # only valid for qcom,msm8953-mss-pil</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  pll-supply:</div><div class='add'>+    description: PLL proxy supply (control handed over after startup)</div><div class='add'>+</div><div class='add'>+  mss-supply:</div><div class='add'>+    description: MSS power domain supply (only valid for qcom,msm8974-mss-pil)</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSS restart control</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mss_restart</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: States used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - description: Stop modem</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: Names of the states used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - const: stop</div><div class='add'>+</div><div class='add'>+  qcom,halt-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Halt registers are used to halt transactions of various sub-components</div><div class='add'>+      within MSS.</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR syscon region</div><div class='add'>+          - description: offset to the Q6 halt register</div><div class='add'>+          - description: offset to the modem halt register</div><div class='add'>+          - description: offset to the nc halt register</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: MBA reserved region</div><div class='add'>+      - description: MPSS reserved region</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    items:</div><div class='add'>+      - description: Name of MBA firmware</div><div class='add'>+      - description: Name of modem firmware</div><div class='add'>+</div><div class='add'>+  bam-dmux:</div><div class='add'>+    $ref: /schemas/net/qcom,bam-dmux.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm BAM Data Multiplexer (provides network interface to the modem)</div><div class='add'>+</div><div class='add'>+  smd-edge:</div><div class='add'>+    $ref: qcom,smd-edge.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm SMD subnode which represents communication edge, channels</div><div class='add'>+      and devices related to the DSP.</div><div class='add'>+    properties:</div><div class='add'>+      label:</div><div class='add'>+        enum:</div><div class='add'>+          - modem</div><div class='add'>+          - hexagon</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  # Deprecated properties</div><div class='add'>+  cx-supply:</div><div class='add'>+    description: CX power domain regulator supply (prefer using power-domains)</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  mx-supply:</div><div class='add'>+    description: MX power domain regulator supply (prefer using power-domains)</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  mba:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      MBA reserved region (prefer using memory-region with two items)</div><div class='add'>+    properties:</div><div class='add'>+      memory-region: true</div><div class='add'>+    required:</div><div class='add'>+      - memory-region</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  mpss:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      MPSS reserved region (prefer using memory-region with two items)</div><div class='add'>+    properties:</div><div class='add'>+      memory-region: true</div><div class='add'>+    required:</div><div class='add'>+      - memory-region</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - pll-supply</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - qcom,halt-regs</div><div class='add'>+  - qcom,smem-states</div><div class='add'>+  - qcom,smem-state-names</div><div class='add'>+  - smd-edge</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: qcom,msm8953-mss-pil</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 3</div><div class='add'>+        power-domain-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+        - power-domain-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        power-domain-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: qcom,msm8974-mss-pil</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - mss-supply</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        mss-supply: false</div><div class='add'>+</div><div class='add'>+  # Fallbacks for deprecated properties</div><div class='add'>+  - oneOf:</div><div class='add'>+      - required:</div><div class='add'>+          - memory-region</div><div class='add'>+      - required:</div><div class='add'>+          - mba</div><div class='add'>+          - mpss</div><div class='add'>+  - oneOf:</div><div class='add'>+      - required:</div><div class='add'>+          - power-domains</div><div class='add'>+          - power-domain-names</div><div class='add'>+      - required:</div><div class='add'>+          - cx-supply</div><div class='add'>+          - mx-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8916.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc_mpss: remoteproc@4080000 {</div><div class='add'>+        compatible = "qcom,msm8916-mss-pil";</div><div class='add'>+        reg = &lt;0x04080000 0x100&gt;, &lt;0x04020000 0x40&gt;;</div><div class='add'>+        reg-names = "qdsp6", "rmb";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 24 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;hexagon_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;hexagon_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;hexagon_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;hexagon_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;hexagon_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+        qcom,halt-regs = &lt;&amp;tcsr 0x18000 0x19000 0x1a000&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_Q6_BIMC_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_BOOT_ROM_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;xo_board&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "mem", "xo";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmpd MSM8916_VDDCX&gt;, &lt;&amp;rpmpd MSM8916_VDDMX&gt;;</div><div class='add'>+        power-domain-names = "cx", "mx";</div><div class='add'>+        pll-supply = &lt;&amp;pm8916_l7&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;scm 0&gt;;</div><div class='add'>+        reset-names = "mss_restart";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;mba_mem&gt;, &lt;&amp;mpss_mem&gt;;</div><div class='add'>+</div><div class='add'>+        smd-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 25 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+            qcom,smd-edge = &lt;0&gt;;</div><div class='add'>+            qcom,ipc = &lt;&amp;apcs 8 12&gt;;</div><div class='add'>+            qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            label = "hexagon";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml<br/>new file mode 100644<br/>index 000000000000..c1ac6ca1e759<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,msm8996-mss-pil.yaml</a></div><div class='hunk'>@@ -0,0 +1,393 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM8996 MSS Peripheral Image Loader (and similar)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Sibi Sankar &lt;quic_sibis@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  MSS Peripheral Image Loader loads and boots firmware on the</div><div class='add'>+  Qualcomm Technology Inc. MSM8996 Modem Hexagon Core (and similar).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,msm8996-mss-pil</div><div class='add'>+      - qcom,msm8998-mss-pil</div><div class='add'>+      - qcom,sdm845-mss-pil</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSS QDSP6 registers</div><div class='add'>+      - description: RMB registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: qdsp6</div><div class='add'>+      - const: rmb</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSA Stream 1</div><div class='add'>+      - description: MSA Stream 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Watchdog interrupt</div><div class='add'>+      - description: Fatal interrupt</div><div class='add'>+      - description: Ready interrupt</div><div class='add'>+      - description: Handover interrupt</div><div class='add'>+      - description: Stop acknowledge interrupt</div><div class='add'>+      - description: Shutdown acknowledge interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wdog</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: handover</div><div class='add'>+      - const: stop-ack</div><div class='add'>+      - const: shutdown-ack</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 8</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 8</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: CX power domain</div><div class='add'>+      - description: MX power domain</div><div class='add'>+      - description: MSS power domain (only valid for qcom,sdm845-mss-pil)</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cx</div><div class='add'>+      - const: mx</div><div class='add'>+      - const: mss # only valid for qcom,sdm845-mss-pil</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  pll-supply:</div><div class='add'>+    description: PLL supply</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: AOSS restart</div><div class='add'>+      - description: PDC reset (only valid for qcom,sdm845-mss-pil)</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mss_restart</div><div class='add'>+      - const: pdc_reset # only valid for qcom,sdm845-mss-pil</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: States used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - description: Stop modem</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: Names of the states used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - const: stop</div><div class='add'>+</div><div class='add'>+  qcom,halt-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Halt registers are used to halt transactions of various sub-components</div><div class='add'>+      within MSS.</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR syscon region</div><div class='add'>+          - description: offset to the Q6 halt register</div><div class='add'>+          - description: offset to the modem halt register</div><div class='add'>+          - description: offset to the nc halt register</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: MBA reserved region</div><div class='add'>+      - description: Modem reserved region</div><div class='add'>+      - description: Metadata reserved region</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    items:</div><div class='add'>+      - description: Name of MBA firmware</div><div class='add'>+      - description: Name of modem firmware</div><div class='add'>+</div><div class='add'>+  smd-edge:</div><div class='add'>+    $ref: /schemas/remoteproc/qcom,smd-edge.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm Shared Memory subnode which represents communication edge,</div><div class='add'>+      channels and devices related to the Modem.</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  glink-edge:</div><div class='add'>+    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm G-Link subnode which represents communication edge, channels</div><div class='add'>+      and devices related to the Modem.</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  # Deprecated properties</div><div class='add'>+  mba:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      MBA reserved region</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      memory-region: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - memory-region</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  mpss:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      MPSS reserved region</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      memory-region: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - memory-region</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  metadata:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Metadata reserved region</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      memory-region: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - memory-region</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - qcom,halt-regs</div><div class='add'>+  - qcom,smem-states</div><div class='add'>+  - qcom,smem-state-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: qcom,msm8996-mss-pil</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GCC MSS IFACE clock</div><div class='add'>+            - description: GCC MSS BUS clock</div><div class='add'>+            - description: GCC MSS MEM clock</div><div class='add'>+            - description: RPMH XO clock</div><div class='add'>+            - description: GCC MSS GPLL0 clock</div><div class='add'>+            - description: GCC MSS SNOC_AXI clock</div><div class='add'>+            - description: GCC MSS MNOC_AXI clock</div><div class='add'>+            - description: RPMH PNOC clock</div><div class='add'>+            - description: GCC MSS PRNG clock</div><div class='add'>+            - description: RPMH QDSS clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: mem</div><div class='add'>+            - const: xo</div><div class='add'>+            - const: gpll0_mss</div><div class='add'>+            - const: snoc_axi</div><div class='add'>+            - const: mnoc_axi</div><div class='add'>+            - const: pnoc</div><div class='add'>+            - const: qdss</div><div class='add'>+        glink-edge: false</div><div class='add'>+      required:</div><div class='add'>+        - pll-supply</div><div class='add'>+        - smd-edge</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        pll-supply: false</div><div class='add'>+        smd-edge: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: qcom,msm8998-mss-pil</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GCC MSS IFACE clock</div><div class='add'>+            - description: GCC MSS BUS clock</div><div class='add'>+            - description: GCC MSS MEM clock</div><div class='add'>+            - description: GCC MSS GPLL0 clock</div><div class='add'>+            - description: GCC MSS SNOC_AXI clock</div><div class='add'>+            - description: GCC MSS MNOC_AXI clock</div><div class='add'>+            - description: RPMH QDSS clock</div><div class='add'>+            - description: RPMH XO clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: mem</div><div class='add'>+            - const: gpll0_mss</div><div class='add'>+            - const: snoc_axi</div><div class='add'>+            - const: mnoc_axi</div><div class='add'>+            - const: qdss</div><div class='add'>+            - const: xo</div><div class='add'>+      required:</div><div class='add'>+        - glink-edge</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: qcom,sdm845-mss-pil</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 3</div><div class='add'>+        power-domain-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: GCC MSS IFACE clock</div><div class='add'>+            - description: GCC MSS BUS clock</div><div class='add'>+            - description: GCC MSS MEM clock</div><div class='add'>+            - description: GCC MSS GPLL0 clock</div><div class='add'>+            - description: GCC MSS SNOC_AXI clock</div><div class='add'>+            - description: GCC MSS MNOC_AXI clock</div><div class='add'>+            - description: GCC MSS PRNG clock</div><div class='add'>+            - description: RPMH XO clock</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: mem</div><div class='add'>+            - const: gpll0_mss</div><div class='add'>+            - const: snoc_axi</div><div class='add'>+            - const: mnoc_axi</div><div class='add'>+            - const: prng</div><div class='add'>+            - const: xo</div><div class='add'>+      required:</div><div class='add'>+        - qcom,qmp</div><div class='add'>+        - glink-edge</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        iommus: false</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        power-domain-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        qcom,qmp: false</div><div class='add'>+</div><div class='add'>+  # Fallbacks for deprecated properties</div><div class='add'>+  - oneOf:</div><div class='add'>+      - required:</div><div class='add'>+          - memory-region</div><div class='add'>+      - required:</div><div class='add'>+          - mba</div><div class='add'>+          - mpss</div><div class='add'>+          - metadata</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sdm845.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-aoss.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-pdc.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@4080000 {</div><div class='add'>+        compatible = "qcom,sdm845-mss-pil";</div><div class='add'>+        reg = &lt;0x04080000 0x408&gt;, &lt;0x04180000 0x48&gt;;</div><div class='add'>+        reg-names = "qdsp6", "rmb";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack",</div><div class='add'>+                          "shutdown-ack";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_Q6_MEMNOC_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_BOOT_ROM_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_GPLL0_DIV_CLK_SRC&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_SNOC_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_MFAB_AXIS_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_PRNG_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "mem", "gpll0_mss",</div><div class='add'>+                      "snoc_axi", "mnoc_axi", "prng", "xo";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SDM845_CX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SDM845_MX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SDM845_MSS&gt;;</div><div class='add'>+        power-domain-names = "cx", "mx", "mss";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;mba_mem&gt;, &lt;&amp;mpss_mem&gt;, &lt;&amp;mdata_mem&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;aoss_reset AOSS_CC_MSS_RESTART&gt;,</div><div class='add'>+                 &lt;&amp;pdc_reset PDC_MODEM_SYNC_RESET&gt;;</div><div class='add'>+        reset-names = "mss_restart", "pdc_reset";</div><div class='add'>+</div><div class='add'>+        qcom,halt-regs = &lt;&amp;tcsr_regs_1 0x3000 0x5000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;modem_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 449 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            label = "modem";</div><div class='add'>+            qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+            mboxes = &lt;&amp;apss_shared 12&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml<br/>new file mode 100644<br/>index 000000000000..171ef85de193<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,pas-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,89 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Peripheral Authentication Service Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Common properties of Qualcomm SoCs Peripheral Authentication Service.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 5</div><div class='add'>+    items:</div><div class='add'>+      - description: Watchdog interrupt</div><div class='add'>+      - description: Fatal interrupt</div><div class='add'>+      - description: Ready interrupt</div><div class='add'>+      - description: Handover interrupt</div><div class='add'>+      - description: Stop acknowledge interrupt</div><div class='add'>+      - description: Shutdown acknowledge interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 5</div><div class='add'>+    items:</div><div class='add'>+      - const: wdog</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: handover</div><div class='add'>+      - const: stop-ack</div><div class='add'>+      - const: shutdown-ack</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: States used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - description: Stop the modem</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: The names of the state bits used for SMP2P output</div><div class='add'>+    items:</div><div class='add'>+      - const: stop</div><div class='add'>+</div><div class='add'>+  smd-edge:</div><div class='add'>+    $ref: /schemas/remoteproc/qcom,smd-edge.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm Shared Memory subnode which represents communication edge,</div><div class='add'>+      channels and devices related to the ADSP.</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  glink-edge:</div><div class='add'>+    $ref: /schemas/remoteproc/qcom,glink-edge.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm G-Link subnode which represents communication edge, channels</div><div class='add'>+      and devices related to the ADSP.</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - memory-region</div><div class='add'>+  - qcom,smem-states</div><div class='add'>+  - qcom,smem-state-names</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml<br/>index 9282837d64ba..22219d16df20 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/remoteproc/qcom,pil-info.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm peripheral image loader relocation info binding</div><div class='add'>+title: Qualcomm peripheral image loader relocation info</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='hunk'>@@ -30,7 +30,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     imem@146bf000 {</div><div class='del'>-      compatible = "syscon", "simple-mfd";</div><div class='add'>+      compatible = "qcom,sdm630-imem", "syscon", "simple-mfd";</div><div class='ctx'>       reg = &lt;0x146bf000 0x1000&gt;;</div><div class='ctx'> </div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt<br/>index 8f1507052afd..573a88b60677 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt</a></div><div class='hunk'>@@ -7,16 +7,8 @@ on the Qualcomm Hexagon core.</div><div class='ctx'> 	Usage: required</div><div class='ctx'> 	Value type: &lt;string&gt;</div><div class='ctx'> 	Definition: must be one of:</div><div class='del'>-		    "qcom,q6v5-pil",</div><div class='ctx'> 		    "qcom,ipq8074-wcss-pil"</div><div class='ctx'> 		    "qcom,qcs404-wcss-pil"</div><div class='del'>-		    "qcom,msm8916-mss-pil",</div><div class='del'>-		    "qcom,msm8974-mss-pil"</div><div class='del'>-		    "qcom,msm8996-mss-pil"</div><div class='del'>-		    "qcom,msm8998-mss-pil"</div><div class='del'>-		    "qcom,sc7180-mss-pil"</div><div class='del'>-		    "qcom,sc7280-mss-pil"</div><div class='del'>-		    "qcom,sdm845-mss-pil"</div><div class='ctx'> </div><div class='ctx'> - reg:</div><div class='ctx'> 	Usage: required</div><div class='hunk'>@@ -37,28 +29,7 @@ on the Qualcomm Hexagon core.</div><div class='ctx'> - interrupt-names:</div><div class='ctx'> 	Usage: required</div><div class='ctx'> 	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: The interrupts needed depends on the the compatible</div><div class='del'>-		    string:</div><div class='del'>-	qcom,q6v5-pil:</div><div class='del'>-	qcom,ipq8074-wcss-pil:</div><div class='del'>-	qcom,qcs404-wcss-pil:</div><div class='del'>-	qcom,msm8916-mss-pil:</div><div class='del'>-	qcom,msm8974-mss-pil:</div><div class='del'>-		    must be "wdog", "fatal", "ready", "handover", "stop-ack"</div><div class='del'>-	qcom,msm8996-mss-pil:</div><div class='del'>-	qcom,msm8998-mss-pil:</div><div class='del'>-	qcom,sc7180-mss-pil:</div><div class='del'>-	qcom,sc7280-mss-pil:</div><div class='del'>-	qcom,sdm845-mss-pil:</div><div class='del'>-		    must be "wdog", "fatal", "ready", "handover", "stop-ack",</div><div class='del'>-		    "shutdown-ack"</div><div class='del'>-</div><div class='del'>-- firmware-name:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must list the relative firmware image paths for mba and</div><div class='del'>-		    modem. They are used for booting and authenticating the</div><div class='del'>-		    Hexagon core.</div><div class='add'>+	Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"</div><div class='ctx'> </div><div class='ctx'> - clocks:</div><div class='ctx'> 	Usage: required</div><div class='hunk'>@@ -76,72 +47,23 @@ on the Qualcomm Hexagon core.</div><div class='ctx'> 		    "gcc_axim_cbcr", "lcc_ahbfabric_cbc", "tcsr_lcc_cbc",</div><div class='ctx'> 		    "lcc_abhs_cbc", "lcc_tcm_slave_cbc", "lcc_abhm_cbc",</div><div class='ctx'> 		    "lcc_axim_cbc", "lcc_bcr_sleep"</div><div class='del'>-	qcom,q6v5-pil:</div><div class='del'>-	qcom,msm8916-mss-pil:</div><div class='del'>-	qcom,msm8974-mss-pil:</div><div class='del'>-		    must be "iface", "bus", "mem", "xo"</div><div class='del'>-	qcom,msm8996-mss-pil:</div><div class='del'>-		    must be "iface", "bus", "mem", "xo", "gpll0_mss",</div><div class='del'>-		    "snoc_axi", "mnoc_axi", "pnoc", "qdss"</div><div class='del'>-	qcom,msm8998-mss-pil:</div><div class='del'>-		    must be "iface", "bus", "mem", "xo", "gpll0_mss",</div><div class='del'>-		    "snoc_axi", "mnoc_axi", "qdss"</div><div class='del'>-	qcom,sc7180-mss-pil:</div><div class='del'>-		    must be "iface", "bus", "xo", "snoc_axi", "mnoc_axi",</div><div class='del'>-		    "nav"</div><div class='del'>-	qcom,sc7280-mss-pil:</div><div class='del'>-		    must be "iface", "xo", "snoc_axi", "offline", "pka"</div><div class='del'>-	qcom,sdm845-mss-pil:</div><div class='del'>-		    must be "iface", "bus", "mem", "xo", "gpll0_mss",</div><div class='del'>-		    "snoc_axi", "mnoc_axi", "prng"</div><div class='ctx'> </div><div class='ctx'> - resets:</div><div class='ctx'> 	Usage: required</div><div class='ctx'> 	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the reset-controller for the modem sub-system</div><div class='del'>-		    reference to the list of 3 reset-controllers for the</div><div class='add'>+	Definition: reference to the list of 3 reset-controllers for the</div><div class='ctx'> 		    wcss sub-system</div><div class='del'>-		    reference to the list of 2 reset-controllers for the modem</div><div class='del'>-		    sub-system on SC7180, SC7280, SDM845 SoCs</div><div class='ctx'> </div><div class='ctx'> - reset-names:</div><div class='ctx'> 	Usage: required</div><div class='ctx'> 	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "mss_restart" for the modem sub-system</div><div class='del'>-		    must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"</div><div class='add'>+	Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset"</div><div class='ctx'> 		    for the wcss sub-system</div><div class='del'>-		    must be "mss_restart", "pdc_reset" for the modem</div><div class='del'>-		    sub-system on SC7180, SC7280, SDM845 SoCs</div><div class='ctx'> </div><div class='del'>-For devices where the mba and mpss sub-nodes are not specified, mba/mpss region</div><div class='del'>-should be referenced as follows:</div><div class='ctx'> - memory-region:</div><div class='ctx'> 	Usage: required</div><div class='ctx'> 	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the reserved-memory for the mba region followed</div><div class='del'>-		    by the mpss region</div><div class='del'>-</div><div class='del'>-For the compatible strings below the following supplies are required:</div><div class='del'>-  "qcom,q6v5-pil"</div><div class='del'>-  "qcom,msm8916-mss-pil",</div><div class='del'>-- cx-supply: (deprecated, use power domain instead)</div><div class='del'>-- mx-supply: (deprecated, use power domain instead)</div><div class='del'>-- pll-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the regulators to be held on behalf of the</div><div class='del'>-		    booting of the Hexagon core</div><div class='del'>-</div><div class='del'>-For the compatible string below the following supplies are required:</div><div class='del'>-  "qcom,msm8974-mss-pil"</div><div class='del'>-- cx-supply: (deprecated, use power domain instead)</div><div class='del'>-- mss-supply:</div><div class='del'>-- mx-supply: (deprecated, use power domain instead)</div><div class='del'>-- pll-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the regulators to be held on behalf of the</div><div class='del'>-		    booting of the Hexagon core</div><div class='add'>+	Definition: reference to wcss reserved-memory region.</div><div class='ctx'> </div><div class='ctx'> For the compatible string below the following supplies are required:</div><div class='ctx'>   "qcom,qcs404-wcss-pil"</div><div class='hunk'>@@ -151,43 +73,6 @@ For the compatible string below the following supplies are required:</div><div class='ctx'> 	Definition: reference to the regulators to be held on behalf of the</div><div class='ctx'> 		    booting of the Hexagon core</div><div class='ctx'> </div><div class='del'>-For the compatible string below the following supplies are required:</div><div class='del'>-  "qcom,msm8996-mss-pil"</div><div class='del'>-- pll-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the regulators to be held on behalf of the</div><div class='del'>-		    booting of the Hexagon core</div><div class='del'>-</div><div class='del'>-- power-domains:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to power-domains that match power-domain-names</div><div class='del'>-</div><div class='del'>-- power-domain-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: The power-domains needed depend on the compatible string:</div><div class='del'>-	qcom,ipq8074-wcss-pil:</div><div class='del'>-		    no power-domain names required</div><div class='del'>-	qcom,q6v5-pil:</div><div class='del'>-	qcom,msm8916-mss-pil:</div><div class='del'>-	qcom,msm8974-mss-pil:</div><div class='del'>-	qcom,msm8996-mss-pil:</div><div class='del'>-	qcom,msm8998-mss-pil:</div><div class='del'>-		    must be "cx", "mx"</div><div class='del'>-	qcom,sc7180-mss-pil:</div><div class='del'>-		    must be "cx", "mx", "mss"</div><div class='del'>-	qcom,sc7280-mss-pil:</div><div class='del'>-		    must be "cx", "mss"</div><div class='del'>-	qcom,sdm845-mss-pil:</div><div class='del'>-		    must be "cx", "mx", "mss"</div><div class='del'>-</div><div class='del'>-- qcom,qmp:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the AOSS side-channel message RAM.</div><div class='del'>-</div><div class='ctx'> - qcom,smem-states:</div><div class='ctx'> 	Usage: required</div><div class='ctx'> 	Value type: &lt;phandle&gt;</div><div class='hunk'>@@ -203,45 +88,8 @@ For the compatible string below the following supplies are required:</div><div class='ctx'> 	Usage: required</div><div class='ctx'> 	Value type: &lt;prop-encoded-array&gt;</div><div class='ctx'> 	Definition: a phandle reference to a syscon representing TCSR followed</div><div class='del'>-		    by the three offsets within syscon for q6, modem and nc</div><div class='add'>+		    by the three offsets within syscon for q6, wcss and nc</div><div class='ctx'> 		    halt registers.</div><div class='del'>-		    a phandle reference to a syscon representing TCSR followed</div><div class='del'>-		    by the four offsets within syscon for q6, modem, nc and vq6</div><div class='del'>-		    halt registers on SC7280 SoCs.</div><div class='del'>-</div><div class='del'>-For the compatible strings below the following phandle references are required:</div><div class='del'>-  "qcom,sc7180-mss-pil"</div><div class='del'>-- qcom,spare-regs:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: a phandle reference to a syscon representing TCSR followed</div><div class='del'>-		    by the offset within syscon for conn_box_spare0 register</div><div class='del'>-		    used by the modem sub-system running on SC7180 SoC.</div><div class='del'>-</div><div class='del'>-For the compatible strings below the following phandle references are required:</div><div class='del'>-  "qcom,sc7280-mss-pil"</div><div class='del'>-- qcom,ext-regs:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: two phandle references to syscons representing TCSR_REG and</div><div class='del'>-		    TCSR register space followed by the two offsets within the syscon</div><div class='del'>-		    to force_clk_en/rscc_disable and axim1_clk_off/crypto_clk_off</div><div class='del'>-		    registers respectively.</div><div class='del'>-</div><div class='del'>-- qcom,qaccept-regs:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: a phandle reference to a syscon representing TCSR followed</div><div class='del'>-		    by the three offsets within syscon for mdm, cx and axi</div><div class='del'>-		    qaccept registers used by the modem sub-system running on</div><div class='del'>-		    SC7280 SoC.</div><div class='del'>-</div><div class='del'>-The Hexagon node must contain iommus property as described in ../iommu/iommu.txt</div><div class='del'>-on platforms which do not have TrustZone.</div><div class='del'>-</div><div class='del'>-= SUBNODES:</div><div class='del'>-The Hexagon node must contain two subnodes, named "mba" and "mpss" representing</div><div class='del'>-the memory regions used by the Hexagon firmware. Each sub-node must contain:</div><div class='ctx'> </div><div class='ctx'> - memory-region:</div><div class='ctx'> 	Usage: required</div><div class='hunk'>@@ -250,53 +98,5 @@ the memory regions used by the Hexagon firmware. Each sub-node must contain:</div><div class='ctx'> </div><div class='ctx'> The Hexagon node may also have an subnode named either "smd-edge" or</div><div class='ctx'> "glink-edge" that describes the communication edge, channels and devices</div><div class='del'>-related to the Hexagon.  See ../soc/qcom/qcom,smd.txt and</div><div class='add'>+related to the Hexagon.  See ../soc/qcom/qcom,smd.yaml and</div><div class='ctx'> ../soc/qcom/qcom,glink.txt for details on how to describe these.</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-The following example describes the resources needed to boot control the</div><div class='del'>-Hexagon, as it is found on MSM8974 boards.</div><div class='del'>-</div><div class='del'>-	modem-rproc@fc880000 {</div><div class='del'>-		compatible = "qcom,q6v5-pil";</div><div class='del'>-		reg = &lt;0xfc880000 0x100&gt;,</div><div class='del'>-		      &lt;0xfc820000 0x020&gt;;</div><div class='del'>-		reg-names = "qdsp6", "rmb";</div><div class='del'>-</div><div class='del'>-		interrupts-extended = &lt;&amp;intc 0 24 1&gt;,</div><div class='del'>-				      &lt;&amp;modem_smp2p_in 0 0&gt;,</div><div class='del'>-				      &lt;&amp;modem_smp2p_in 1 0&gt;,</div><div class='del'>-				      &lt;&amp;modem_smp2p_in 2 0&gt;,</div><div class='del'>-				      &lt;&amp;modem_smp2p_in 3 0&gt;;</div><div class='del'>-		interrupt-names = "wdog",</div><div class='del'>-				  "fatal",</div><div class='del'>-				  "ready",</div><div class='del'>-				  "handover",</div><div class='del'>-				  "stop-ack";</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_MSS_Q6_BIMC_AXI_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='del'>-			 &lt;&amp;gcc GCC_BOOT_ROM_AHB_CLK&gt;;</div><div class='del'>-		clock-names = "iface", "bus", "mem";</div><div class='del'>-</div><div class='del'>-		qcom,halt-regs = &lt;&amp;tcsr_mutex_block 0x1180 0x1200 0x1280&gt;;</div><div class='del'>-</div><div class='del'>-		resets = &lt;&amp;gcc GCC_MSS_RESTART&gt;;</div><div class='del'>-		reset-names = "mss_restart";</div><div class='del'>-</div><div class='del'>-		cx-supply = &lt;&amp;pm8841_s2&gt;;</div><div class='del'>-		mss-supply = &lt;&amp;pm8841_s3&gt;;</div><div class='del'>-		mx-supply = &lt;&amp;pm8841_s1&gt;;</div><div class='del'>-		pll-supply = &lt;&amp;pm8941_l12&gt;;</div><div class='del'>-</div><div class='del'>-		qcom,smem-states = &lt;&amp;modem_smp2p_out 0&gt;;</div><div class='del'>-		qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-		mba {</div><div class='del'>-			memory-region = &lt;&amp;mba_region&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		mpss {</div><div class='del'>-			memory-region = &lt;&amp;mpss_region&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml<br/>index 31413cfe10db..06f5f93f62a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,qcs404-cdsp-pil.yaml</a></div><div class='hunk'>@@ -90,7 +90,6 @@ properties:</div><div class='ctx'>       - description: Stop the modem</div><div class='ctx'> </div><div class='ctx'>   qcom,smem-state-names:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     description: The names of the state bits used for SMP2P output</div><div class='ctx'>     items:</div><div class='ctx'>       - const: stop</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml<br/>new file mode 100644<br/>index 000000000000..5efa0e5c0439<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,qcs404-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,qcs404-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QCS404 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm QCS404 SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,qcs404-adsp-pas</div><div class='add'>+      - qcom,qcs404-cdsp-pas</div><div class='add'>+      - qcom,qcs404-wcss-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  power-domains: false</div><div class='add'>+  power-domain-names: false</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@c700000 {</div><div class='add'>+        compatible = "qcom,qcs404-adsp-pas";</div><div class='add'>+        reg = &lt;0x0c700000 0x4040&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 293 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                          "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;adsp_fw_mem&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;adsp_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 289 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+            mboxes = &lt;&amp;apcs_glb 8&gt;;</div><div class='add'>+</div><div class='add'>+            label = "adsp";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml<br/>new file mode 100644<br/>index 000000000000..b1402bef0ebe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sc7180-mss-pil.yaml</a></div><div class='hunk'>@@ -0,0 +1,247 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7180 MSS Peripheral Image Loader</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sibi Sankar &lt;quic_sibis@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document describes the hardware for a component that loads and boots firmware</div><div class='add'>+  on the Qualcomm Technology Inc. SC7180 Modem Hexagon Core.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc7180-mss-pil</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSS QDSP6 registers</div><div class='add'>+      - description: RMB registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: qdsp6</div><div class='add'>+      - const: rmb</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSA Stream 1</div><div class='add'>+      - description: MSA Stream 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Watchdog interrupt</div><div class='add'>+      - description: Fatal interrupt</div><div class='add'>+      - description: Ready interrupt</div><div class='add'>+      - description: Handover interrupt</div><div class='add'>+      - description: Stop acknowledge interrupt</div><div class='add'>+      - description: Shutdown acknowledge interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wdog</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: handover</div><div class='add'>+      - const: stop-ack</div><div class='add'>+      - const: shutdown-ack</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: GCC MSS IFACE clock</div><div class='add'>+      - description: GCC MSS BUS clock</div><div class='add'>+      - description: GCC MSS NAV clock</div><div class='add'>+      - description: GCC MSS SNOC_AXI clock</div><div class='add'>+      - description: GCC MSS MFAB_AXIS clock</div><div class='add'>+      - description: RPMH XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: nav</div><div class='add'>+      - const: snoc_axi</div><div class='add'>+      - const: mnoc_axi</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: CX power domain</div><div class='add'>+      - description: MX power domain</div><div class='add'>+      - description: MSS power domain</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cx</div><div class='add'>+      - const: mx</div><div class='add'>+      - const: mss</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: AOSS restart</div><div class='add'>+      - description: PDC reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mss_restart</div><div class='add'>+      - const: pdc_reset</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: MBA reserved region</div><div class='add'>+      - description: modem reserved region</div><div class='add'>+      - description: metadata reserved region</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    items:</div><div class='add'>+      - description: Name of MBA firmware</div><div class='add'>+      - description: Name of modem firmware</div><div class='add'>+</div><div class='add'>+  qcom,halt-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Halt registers are used to halt transactions of various sub-components</div><div class='add'>+      within MSS.</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR_MUTEX registers</div><div class='add'>+          - description: offset to the Q6 halt register</div><div class='add'>+          - description: offset to the modem halt register</div><div class='add'>+          - description: offset to the nc halt register</div><div class='add'>+</div><div class='add'>+  qcom,spare-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Spare registers are multipurpose registers used for errata</div><div class='add'>+      handling.</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR_MUTEX registers</div><div class='add'>+          - description: offset to the conn_box_spare0 register</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: States used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - description: Stop the modem</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: The names of the state bits used for SMP2P output</div><div class='add'>+    const: stop</div><div class='add'>+</div><div class='add'>+  glink-edge:</div><div class='add'>+    $ref: qcom,glink-edge.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm G-Link subnode which represents communication edge, channels</div><div class='add'>+      and devices related to the DSP.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      interrupts:</div><div class='add'>+        items:</div><div class='add'>+          - description: IRQ from MSS to GLINK</div><div class='add'>+</div><div class='add'>+      mboxes:</div><div class='add'>+        items:</div><div class='add'>+          - description: Mailbox for communication between APPS and MSS</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        const: modem</div><div class='add'>+</div><div class='add'>+      apr: false</div><div class='add'>+      fastrpc: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - iommus</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - qcom,halt-regs</div><div class='add'>+  - qcom,spare-regs</div><div class='add'>+  - memory-region</div><div class='add'>+  - qcom,qmp</div><div class='add'>+  - qcom,smem-states</div><div class='add'>+  - qcom,smem-state-names</div><div class='add'>+  - glink-edge</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-aoss.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-pdc.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc_mpss: remoteproc@4080000 {</div><div class='add'>+        compatible = "qcom,sc7180-mss-pil";</div><div class='add'>+        reg = &lt;0x04080000 0x10000&gt;, &lt;0x04180000 0x48&gt;;</div><div class='add'>+        reg-names = "qdsp6", "rmb";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x461 0x0&gt;, &lt;&amp;apps_smmu 0x444 0x3&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready", "handover",</div><div class='add'>+                          "stop-ack", "shutdown-ack";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_Q6_MEMNOC_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_NAV_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_SNOC_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_MFAB_AXIS_CLK&gt;,</div><div class='add'>+                 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "bus", "nav", "snoc_axi",</div><div class='add'>+                      "mnoc_axi", "xo";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SC7180_MX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SC7180_MSS&gt;;</div><div class='add'>+        power-domain-names = "cx", "mx", "mss";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;mba_mem&gt;, &lt;&amp;mpss_mem&gt;, &lt;&amp;mdata_mem&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;modem_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;aoss_reset AOSS_CC_MSS_RESTART&gt;,</div><div class='add'>+                 &lt;&amp;pdc_reset PDC_MODEM_SYNC_RESET&gt;;</div><div class='add'>+        reset-names = "mss_restart", "pdc_reset";</div><div class='add'>+</div><div class='add'>+        qcom,halt-regs = &lt;&amp;tcsr_mutex_regs 0x23000 0x25000 0x24000&gt;;</div><div class='add'>+        qcom,spare-regs = &lt;&amp;tcsr_regs 0xb3e4&gt;;</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 449 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;apss_shared 12&gt;;</div><div class='add'>+            qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+            label = "modem";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml<br/>new file mode 100644<br/>index 000000000000..5cefd2c58593<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sc7180-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,133 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7180/SC7280 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SC7180/SC7280 SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc7180-mpss-pas</div><div class='add'>+      - qcom,sc7280-mpss-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 6</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 6</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: CX power domain</div><div class='add'>+      - description: MX power domain</div><div class='add'>+      - description: MSS power domain</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: cx</div><div class='add'>+      - const: mx</div><div class='add'>+      - const: mss</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc7180-mpss-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          minItems: 3</div><div class='add'>+        power-domain-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        power-domain-names:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@4080000 {</div><div class='add'>+        compatible = "qcom,sc7180-mpss-pas";</div><div class='add'>+        reg = &lt;0x04080000 0x4040&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready", "handover",</div><div class='add'>+                          "stop-ack", "shutdown-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;mpss_mem&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SC7180_MX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SC7180_MSS&gt;;</div><div class='add'>+        power-domain-names = "cx", "mx", "mss";</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;modem_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 449 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            label = "modem";</div><div class='add'>+            qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+            mboxes = &lt;&amp;apss_shared 12&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml<br/>new file mode 100644<br/>index 000000000000..94ca7a0cc203<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sc7280-adsp-pil.yaml</a></div><div class='hunk'>@@ -0,0 +1,195 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7280 ADSP Peripheral Image Loader</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document describes the hardware for a component that loads and boots firmware</div><div class='add'>+  on the Qualcomm Technology Inc. ADSP.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc7280-adsp-pil</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: qdsp6ss register</div><div class='add'>+      - description: efuse q6ss register</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    items:</div><div class='add'>+      - description: Phandle to apps_smmu node with sid mask</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Watchdog interrupt</div><div class='add'>+      - description: Fatal interrupt</div><div class='add'>+      - description: Ready interrupt</div><div class='add'>+      - description: Handover interrupt</div><div class='add'>+      - description: Stop acknowledge interrupt</div><div class='add'>+      - description: Shutdown acknowledge interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wdog</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: handover</div><div class='add'>+      - const: stop-ack</div><div class='add'>+      - const: shutdown-ack</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+      - description: GCC CFG NOC LPASS clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+      - const: gcc_cfg_noc_lpass</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: LCX power domain</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: PDC AUDIO SYNC RESET</div><div class='add'>+      - description: CC LPASS restart</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pdc_sync</div><div class='add'>+      - const: cc_lpass</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  qcom,halt-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Phandle reference to a syscon representing TCSR followed by the</div><div class='add'>+      four offsets within syscon for q6, modem, nc and qv6 halt registers.</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR_MUTEX registers</div><div class='add'>+          - description: offset to the Q6 halt register</div><div class='add'>+          - description: offset to the modem halt register</div><div class='add'>+          - description: offset to the nc halt register</div><div class='add'>+          - description: offset to the vq6 halt register</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: States used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - description: Stop the modem</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: The names of the state bits used for SMP2P output</div><div class='add'>+    const: stop</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  glink-edge:</div><div class='add'>+    $ref: qcom,glink-edge.yaml#</div><div class='add'>+    type: object</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: |</div><div class='add'>+      Qualcomm G-Link subnode which represents communication edge, channels</div><div class='add'>+      and devices related to the ADSP.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      label:</div><div class='add'>+        const: lpass</div><div class='add'>+</div><div class='add'>+      gpr: true</div><div class='add'>+      apr: false</div><div class='add'>+      fastrpc: false</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - label</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - qcom,halt-regs</div><div class='add'>+  - memory-region</div><div class='add'>+  - qcom,smem-states</div><div class='add'>+  - qcom,smem-state-names</div><div class='add'>+  - qcom,qmp</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpass-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-aoss.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-pdc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@3000000 {</div><div class='add'>+        compatible = "qcom,sc7280-adsp-pil";</div><div class='add'>+        reg = &lt;0x03000000 0x5000&gt;,</div><div class='add'>+              &lt;0x0355b000 0x10&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;pdc 162 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                &lt;&amp;adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                &lt;&amp;adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                &lt;&amp;adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                &lt;&amp;adsp_smp2p_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                "handover", "stop-ack", "shutdown-ack";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_CFG_NOC_LPASS_CLK&gt;;</div><div class='add'>+        clock-names = "xo", "gcc_cfg_noc_lpass";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7280_LCX&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;pdc_reset PDC_AUDIO_SYNC_RESET&gt;,</div><div class='add'>+                 &lt;&amp;aoss_reset AOSS_CC_LPASS_RESTART&gt;;</div><div class='add'>+        reset-names = "pdc_sync", "cc_lpass";</div><div class='add'>+</div><div class='add'>+        qcom,halt-regs = &lt;&amp;tcsr_mutex 0x23000 0x25000 0x28000 0x33000&gt;;</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;adsp_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                                         IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                         IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                            IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+            label = "lpass";</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml<br/>new file mode 100644<br/>index 000000000000..005cb21732af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sc7280-mss-pil.yaml</a></div><div class='hunk'>@@ -0,0 +1,268 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC7280 MSS Peripheral Image Loader</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sibi Sankar &lt;quic_sibis@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document describes the hardware for a component that loads and boots firmware</div><div class='add'>+  on the Qualcomm Technology Inc. SC7280 Modem Hexagon Core.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc7280-mss-pil</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSS QDSP6 registers</div><div class='add'>+      - description: RMB registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: qdsp6</div><div class='add'>+      - const: rmb</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    items:</div><div class='add'>+      - description: MSA Stream 1</div><div class='add'>+      - description: MSA Stream 2</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: Path leading to system memory</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Watchdog interrupt</div><div class='add'>+      - description: Fatal interrupt</div><div class='add'>+      - description: Ready interrupt</div><div class='add'>+      - description: Handover interrupt</div><div class='add'>+      - description: Stop acknowledge interrupt</div><div class='add'>+      - description: Shutdown acknowledge interrupt</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wdog</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: handover</div><div class='add'>+      - const: stop-ack</div><div class='add'>+      - const: shutdown-ack</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: GCC MSS IFACE clock</div><div class='add'>+      - description: GCC MSS OFFLINE clock</div><div class='add'>+      - description: GCC MSS SNOC_AXI clock</div><div class='add'>+      - description: RPMH PKA clock</div><div class='add'>+      - description: RPMH XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: offline</div><div class='add'>+      - const: snoc_axi</div><div class='add'>+      - const: pka</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: CX power domain</div><div class='add'>+      - description: MSS power domain</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cx</div><div class='add'>+      - const: mss</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: AOSS restart</div><div class='add'>+      - description: PDC reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mss_restart</div><div class='add'>+      - const: pdc_reset</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    items:</div><div class='add'>+      - description: MBA reserved region</div><div class='add'>+      - description: modem reserved region</div><div class='add'>+      - description: metadata reserved region</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    items:</div><div class='add'>+      - description: Name of MBA firmware</div><div class='add'>+      - description: Name of modem firmware</div><div class='add'>+</div><div class='add'>+  qcom,halt-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Halt registers are used to halt transactions of various sub-components</div><div class='add'>+      within MSS.</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR_MUTEX registers</div><div class='add'>+          - description: offset to the Q6 halt register</div><div class='add'>+          - description: offset to the modem halt register</div><div class='add'>+          - description: offset to the nc halt register</div><div class='add'>+          - description: offset to the vq6 halt register</div><div class='add'>+</div><div class='add'>+  qcom,ext-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: EXT registers are used for various power related functionality</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR_REG registers</div><div class='add'>+          - description: offset to the force_clk_en register</div><div class='add'>+          - description: offset to the rscc_disable register</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR_MUTEX registers</div><div class='add'>+          - description: offset to the axim1_clk_off register</div><div class='add'>+          - description: offset to the crypto_clk_off register</div><div class='add'>+</div><div class='add'>+  qcom,qaccept-regs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: QACCEPT registers are used to bring up/down Q-channels</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TCSR_MUTEX registers</div><div class='add'>+          - description: offset to the mdm qaccept register</div><div class='add'>+          - description: offset to the cx qaccept register</div><div class='add'>+          - description: offset to the axi qaccept register</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: States used by the AP to signal the Hexagon core</div><div class='add'>+    items:</div><div class='add'>+      - description: Stop the modem</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: The names of the state bits used for SMP2P output</div><div class='add'>+    const: stop</div><div class='add'>+</div><div class='add'>+  glink-edge:</div><div class='add'>+    $ref: qcom,glink-edge.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm G-Link subnode which represents communication edge, channels</div><div class='add'>+      and devices related to the DSP.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      interrupts:</div><div class='add'>+        items:</div><div class='add'>+          - description: IRQ from MSS to GLINK</div><div class='add'>+</div><div class='add'>+      mboxes:</div><div class='add'>+        items:</div><div class='add'>+          - description: Mailbox for communication between APPS and MSS</div><div class='add'>+</div><div class='add'>+      label:</div><div class='add'>+        const: modem</div><div class='add'>+</div><div class='add'>+      apr: false</div><div class='add'>+      fastrpc: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - iommus</div><div class='add'>+  - interconnects</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - qcom,halt-regs</div><div class='add'>+  - qcom,ext-regs</div><div class='add'>+  - qcom,qaccept-regs</div><div class='add'>+  - memory-region</div><div class='add'>+  - qcom,qmp</div><div class='add'>+  - qcom,smem-states</div><div class='add'>+  - qcom,smem-state-names</div><div class='add'>+  - glink-edge</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc7280.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-aoss.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/qcom,sdm845-pdc.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc_mpss: remoteproc@4080000 {</div><div class='add'>+        compatible = "qcom,sc7280-mss-pil";</div><div class='add'>+        reg = &lt;0x04080000 0x10000&gt;, &lt;0x04180000 0x48&gt;;</div><div class='add'>+        reg-names = "qdsp6", "rmb";</div><div class='add'>+</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x124 0x0&gt;, &lt;&amp;apps_smmu 0x488 0x7&gt;;</div><div class='add'>+</div><div class='add'>+        interconnects = &lt;&amp;mc_virt MASTER_LLCC 0 &amp;mc_virt SLAVE_EBI1 0&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready", "handover",</div><div class='add'>+                          "stop-ack", "shutdown-ack";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_MSS_CFG_AHB_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_OFFLINE_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_MSS_SNOC_AXI_CLK&gt;,</div><div class='add'>+                 &lt;&amp;rpmhcc RPMH_PKA_CLK&gt;,</div><div class='add'>+                 &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "iface", "offline", "snoc_axi", "pka", "xo";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7280_CX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SC7280_MSS&gt;;</div><div class='add'>+        power-domain-names = "cx", "mss";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;mba_mem&gt;, &lt;&amp;mpss_mem&gt;, &lt;&amp;mdata_mem&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;modem_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;aoss_reset AOSS_CC_MSS_RESTART&gt;,</div><div class='add'>+                 &lt;&amp;pdc_reset PDC_MODEM_SYNC_RESET&gt;;</div><div class='add'>+        reset-names = "mss_restart", "pdc_reset";</div><div class='add'>+</div><div class='add'>+        qcom,halt-regs = &lt;&amp;tcsr_mutex 0x23000 0x25000 0x28000 0x33000&gt;;</div><div class='add'>+        qcom,ext-regs = &lt;&amp;tcsr 0x10000 0x10004&gt;, &lt;&amp;tcsr_mutex 0x26004 0x26008&gt;;</div><div class='add'>+        qcom,qaccept-regs = &lt;&amp;tcsr_mutex 0x23030 0x23040 0x23020&gt;;</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_MPSS</div><div class='add'>+                                   IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                   IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipcc IPCC_CLIENT_MPSS</div><div class='add'>+                      IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+            label = "modem";</div><div class='add'>+            qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml<br/>index 2424de733ee4..b6bd33438584 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sc7280-wpss-pil.yaml</a></div><div class='hunk'>@@ -76,7 +76,7 @@ properties:</div><div class='ctx'>       - const: pdc_sync</div><div class='ctx'> </div><div class='ctx'>   memory-region:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    maxItems: 1</div><div class='ctx'>     description: Reference to the reserved-memory for the Hexagon core</div><div class='ctx'> </div><div class='ctx'>   firmware-name:</div><div class='hunk'>@@ -102,14 +102,13 @@ properties:</div><div class='ctx'>       - description: Stop the modem</div><div class='ctx'> </div><div class='ctx'>   qcom,smem-state-names:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     description: The names of the state bits used for SMP2P output</div><div class='del'>-    items:</div><div class='del'>-      - const: stop</div><div class='add'>+    const: stop</div><div class='ctx'> </div><div class='ctx'>   glink-edge:</div><div class='del'>-    type: object</div><div class='del'>-    description: |</div><div class='add'>+    $ref: qcom,glink-edge.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='ctx'>       Qualcomm G-Link subnode which represents communication edge, channels</div><div class='ctx'>       and devices related to the ADSP.</div><div class='ctx'> </div><div class='hunk'>@@ -123,22 +122,11 @@ properties:</div><div class='ctx'>           - description: Mailbox for communication between APPS and WPSS</div><div class='ctx'> </div><div class='ctx'>       label:</div><div class='del'>-        description: The names of the state bits used for SMP2P output</div><div class='ctx'>         items:</div><div class='ctx'>           - const: wpss</div><div class='ctx'> </div><div class='del'>-      qcom,remote-pid:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        description: ID of the shared memory used by GLINK for communication with WPSS</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - interrupts</div><div class='del'>-      - mboxes</div><div class='del'>-      - label</div><div class='del'>-      - qcom,remote-pid</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='add'>+      apr: false</div><div class='add'>+      fastrpc: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml<br/>new file mode 100644<br/>index 000000000000..c1f8dd8d0e4c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sc8180x-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sc8180x-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC8180X Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SC8180X SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc8180x-adsp-pas</div><div class='add'>+      - qcom,sc8180x-cdsp-pas</div><div class='add'>+      - qcom,sc8180x-mpss-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc8180x-adsp-pas</div><div class='add'>+            - qcom,sc8180x-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc8180x-adsp-pas</div><div class='add'>+            - qcom,sc8180x-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: LCX power domain</div><div class='add'>+            - description: LMX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='add'>+            - const: lmx</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        # TODO: incomplete</div><div class='add'>+        power-domains: false</div><div class='add'>+        power-domain-names: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml<br/>new file mode 100644<br/>index 000000000000..f6fbc531dc28<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sc8280xp-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sc8280xp-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SC8280XP Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SC8280XP SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sc8280xp-adsp-pas</div><div class='add'>+      - qcom,sc8280xp-nsp0-pas</div><div class='add'>+      - qcom,sc8280xp-nsp1-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc8280xp-nsp0-pas</div><div class='add'>+            - qcom,sc8280xp-nsp1-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc8280xp-adsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: LCX power domain</div><div class='add'>+            - description: LMX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='add'>+            - const: lmx</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: NSP power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: nsp</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@3000000 {</div><div class='add'>+        compatible = "qcom,sc8280xp-adsp-pas";</div><div class='add'>+        reg = &lt;0x03000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                          "handover", "stop-ack", "shutdown-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;pil_adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC8280XP_LCX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SC8280XP_LMX&gt;;</div><div class='add'>+        power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                                         IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                         IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                            IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+            label = "lpass";</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml<br/>index 1535bbbe25da..20df83a96ef3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sdm845-adsp-pil.yaml</a></div><div class='hunk'>@@ -90,7 +90,6 @@ properties:</div><div class='ctx'>       - description: Stop the modem</div><div class='ctx'> </div><div class='ctx'>   qcom,smem-state-names:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     description: The names of the state bits used for SMP2P output</div><div class='ctx'>     items:</div><div class='ctx'>       - const: stop</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml<br/>new file mode 100644<br/>index 000000000000..c66e298462c7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sdx55-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sdx55-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SDX55 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SDX55 SoC Peripheral Authentication Service loads and boots firmware</div><div class='add'>+  on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sdx55-mpss-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 6</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 6</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: CX power domain</div><div class='add'>+      - description: MSS power domain</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cx</div><div class='add'>+      - const: mss</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@4080000 {</div><div class='add'>+        compatible = "qcom,sdx55-mpss-pas";</div><div class='add'>+        reg = &lt;0x04080000 0x4040&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 250 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready", "handover",</div><div class='add'>+                          "stop-ack", "shutdown-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;mpss_adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SDX55_CX&gt;, &lt;&amp;rpmhpd SDX55_MSS&gt;;</div><div class='add'>+        power-domain-names = "cx", "mss";</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;modem_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 114 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            label = "mpss";</div><div class='add'>+            mboxes = &lt;&amp;apcs 15&gt;;</div><div class='add'>+            qcom,remote-pid = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml<br/>new file mode 100644<br/>index 000000000000..f5d1fa9f45f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sm6115-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,143 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sm6115-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM6115 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SM6115 SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm6115-adsp-pas</div><div class='add'>+      - qcom,sm6115-cdsp-pas</div><div class='add'>+      - qcom,sm6115-mpss-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm6115-adsp-pas</div><div class='add'>+            - qcom,sm6115-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm6115-cdsp-pas</div><div class='add'>+            - qcom,sm6115-mpss-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm6115-adsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: LPI CX power domain</div><div class='add'>+            - description: LPI MX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='add'>+            - const: lmx</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@ab00000 {</div><div class='add'>+        compatible = "qcom,sm6115-adsp-pas";</div><div class='add'>+        reg = &lt;0x0ab00000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmcc RPM_SMD_XO_CLK_SRC&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        firmware-name = "qcom/sm6115/adsp.mdt";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 282 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                          "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;pil_adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmpd SM6115_VDD_LPI_CX&gt;,</div><div class='add'>+                        &lt;&amp;rpmpd SM6115_VDD_LPI_MX&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;adsp_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 277 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            label = "lpass";</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+            mboxes = &lt;&amp;apcs_glb 8&gt;;</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml<br/>new file mode 100644<br/>index 000000000000..fee02fa800b5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sm6350-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,167 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM6350 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm6350-adsp-pas</div><div class='add'>+      - qcom,sm6350-cdsp-pas</div><div class='add'>+      - qcom,sm6350-mpss-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm6350-adsp-pas</div><div class='add'>+            - qcom,sm6350-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm6350-adsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: LCX power domain</div><div class='add'>+            - description: LMX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='add'>+            - const: lmx</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm6350-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+            - description: MX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+            - const: mx</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm6350-mpss-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+            - description: MSS power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+            - const: mss</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@3000000 {</div><div class='add'>+        compatible = "qcom,sm6350-adsp-pas";</div><div class='add'>+        reg = &lt;0x03000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                          "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;pil_adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM6350_LCX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SM6350_LMX&gt;;</div><div class='add'>+        power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                                         IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                         IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                            IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+            label = "lpass";</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml<br/>new file mode 100644<br/>index 000000000000..2c085ac2c3fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,174 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sm8150-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8150/SM8250 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SM8150/SM8250 SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm8150-adsp-pas</div><div class='add'>+      - qcom,sm8150-cdsp-pas</div><div class='add'>+      - qcom,sm8150-mpss-pas</div><div class='add'>+      - qcom,sm8150-slpi-pas</div><div class='add'>+      - qcom,sm8250-adsp-pas</div><div class='add'>+      - qcom,sm8250-cdsp-pas</div><div class='add'>+      - qcom,sm8250-slpi-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8150-adsp-pas</div><div class='add'>+            - qcom,sm8150-cdsp-pas</div><div class='add'>+            - qcom,sm8150-slpi-pas</div><div class='add'>+            - qcom,sm8250-adsp-pas</div><div class='add'>+            - qcom,sm8250-cdsp-pas</div><div class='add'>+            - qcom,sm8250-slpi-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8150-adsp-pas</div><div class='add'>+            - qcom,sm8150-cdsp-pas</div><div class='add'>+            - qcom,sm8250-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8150-mpss-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+            - description: MSS power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+            - const: mss</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8150-slpi-pas</div><div class='add'>+            - qcom,sm8250-adsp-pas</div><div class='add'>+            - qcom,sm8250-slpi-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: LCX power domain</div><div class='add'>+            - description: LMX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='add'>+            - const: lmx</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@17300000 {</div><div class='add'>+        compatible = "qcom,sm8150-adsp-pas";</div><div class='add'>+        reg = &lt;0x17300000 0x4040&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        firmware-name = "qcom/sm8150/adsp.mbn";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                          "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM8150_CX&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;adsp_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 156 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            label = "lpass";</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+            mboxes = &lt;&amp;apss_shared 8&gt;;</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml<br/>new file mode 100644<br/>index 000000000000..af24f9a3cdf1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sm8350-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,182 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sm8350-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8350/SM8450 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SM8350/SM8450 SoC Peripheral Authentication Service loads and boots</div><div class='add'>+  firmware on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm8350-adsp-pas</div><div class='add'>+      - qcom,sm8350-cdsp-pas</div><div class='add'>+      - qcom,sm8350-slpi-pas</div><div class='add'>+      - qcom,sm8350-mpss-pas</div><div class='add'>+      - qcom,sm8450-adsp-pas</div><div class='add'>+      - qcom,sm8450-cdsp-pas</div><div class='add'>+      - qcom,sm8450-mpss-pas</div><div class='add'>+      - qcom,sm8450-slpi-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description: Reference to the reserved-memory for the Hexagon core</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: Firmware name for the Hexagon core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8350-adsp-pas</div><div class='add'>+            - qcom,sm8350-cdsp-pas</div><div class='add'>+            - qcom,sm8350-slpi-pas</div><div class='add'>+            - qcom,sm8450-adsp-pas</div><div class='add'>+            - qcom,sm8450-cdsp-pas</div><div class='add'>+            - qcom,sm8450-slpi-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8350-mpss-pas</div><div class='add'>+            - qcom,sm8450-mpss-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+            - description: MSS power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+            - const: mss</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8350-adsp-pas</div><div class='add'>+            - qcom,sm8350-slpi-pas</div><div class='add'>+            - qcom,sm8450-adsp-pas</div><div class='add'>+            - qcom,sm8450-slpi-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: LCX power domain</div><div class='add'>+            - description: LMX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='add'>+            - const: lmx</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8350-cdsp-pas</div><div class='add'>+            - qcom,sm8450-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+            - description: MXC power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+            - const: mxc</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@30000000 {</div><div class='add'>+        compatible = "qcom,sm8450-adsp-pas";</div><div class='add'>+        reg = &lt;0x030000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        firmware-name = "qcom/sm8450/adsp.mbn";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                          "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SM8450_LCX&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd SM8450_LMX&gt;;</div><div class='add'>+        power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                                         IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                         IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+            label = "lpass";</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml<br/>new file mode 100644<br/>index 000000000000..fe216aa531ed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml</a></div><div class='hunk'>@@ -0,0 +1,178 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SM8550 Peripheral Authentication Service</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware</div><div class='add'>+  on the Qualcomm DSP Hexagon cores.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,sm8550-adsp-pas</div><div class='add'>+      - qcom,sm8550-cdsp-pas</div><div class='add'>+      - qcom,sm8550-mpss-pas</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XO clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xo</div><div class='add'>+</div><div class='add'>+  qcom,qmp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: Reference to the AOSS side-channel message RAM.</div><div class='add'>+</div><div class='add'>+  smd-edge: false</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    items:</div><div class='add'>+      - description: Firmware name of the Hexagon core</div><div class='add'>+      - description: Firmware name of the Hexagon Devicetree</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: Memory region for main Firmware authentication</div><div class='add'>+      - description: Memory region for Devicetree Firmware authentication</div><div class='add'>+      - description: DSM Memory region</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8550-adsp-pas</div><div class='add'>+            - qcom,sm8550-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        interrupt-names:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        memory-region:</div><div class='add'>+          maxItems: 2</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 6</div><div class='add'>+        memory-region:</div><div class='add'>+          minItems: 3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8550-adsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: LCX power domain</div><div class='add'>+            - description: LMX power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='add'>+            - const: lmx</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8550-mpss-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+            - description: MSS power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+            - const: mss</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8550-cdsp-pas</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: CX power domain</div><div class='add'>+            - description: MXC power domain</div><div class='add'>+            - description: NSP power domain</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cx</div><div class='add'>+            - const: mxc</div><div class='add'>+            - const: nsp</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmh.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc@30000000 {</div><div class='add'>+        compatible = "qcom,sm8550-adsp-pas";</div><div class='add'>+        reg = &lt;0x030000000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;rpmhcc RPMH_CXO_CLK&gt;;</div><div class='add'>+        clock-names = "xo";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;pdc 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready",</div><div class='add'>+                          "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;adsp_mem&gt;, &lt;&amp;dtb_adsp_mem&gt;;</div><div class='add'>+</div><div class='add'>+        firmware-name = "qcom/sm8550/adsp.mbn",</div><div class='add'>+                        "qcom/sm8550/adsp_dtb.mbn";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd_sm8550_lcx&gt;,</div><div class='add'>+                        &lt;&amp;rpmhpd_sm8550_lmx&gt;;</div><div class='add'>+        power-domain-names = "lcx", "lmx";</div><div class='add'>+</div><div class='add'>+        qcom,qmp = &lt;&amp;aoss_qmp&gt;;</div><div class='add'>+        qcom,smem-states = &lt;&amp;smp2p_adsp_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        glink-edge {</div><div class='add'>+            interrupts-extended = &lt;&amp;ipcc IPCC_CLIENT_LPASS</div><div class='add'>+                                         IPCC_MPROC_SIGNAL_GLINK_QMP</div><div class='add'>+                                         IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP&gt;;</div><div class='add'>+</div><div class='add'>+            label = "lpass";</div><div class='add'>+            qcom,remote-pid = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+            /* ... */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml<br/>new file mode 100644<br/>index 000000000000..02c85b420c1a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,smd-edge.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,smd-edge.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SMD Edge communication channel nodes</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm SMD subnode represents a remote subsystem or a remote processor of</div><div class='add'>+  some sort - or in SMD language an "edge". The name of the edges are not</div><div class='add'>+  important.</div><div class='add'>+</div><div class='add'>+  In turn, subnodes of the "edges" represent devices tied to SMD channels on</div><div class='add'>+  that "edge". The names of the devices are not important. The properties of</div><div class='add'>+  these nodes are defined by the individual bindings for the SMD devices.</div><div class='add'>+  See also Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: smd-edge</div><div class='add'>+</div><div class='add'>+  apr:</div><div class='add'>+    $ref: /schemas/soc/qcom/qcom,apr.yaml#</div><div class='add'>+    required:</div><div class='add'>+      - qcom,smd-channels</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm APR/GPR (Asynchronous/Generic Packet Router)</div><div class='add'>+</div><div class='add'>+  fastrpc:</div><div class='add'>+    $ref: /schemas/misc/qcom,fastrpc.yaml#</div><div class='add'>+    required:</div><div class='add'>+      - qcom,smd-channels</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm FastRPC</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    description:</div><div class='add'>+      Name of the edge, used for debugging and identification purposes. The</div><div class='add'>+      node name will be used if this is not present.</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Reference to the mailbox representing the outgoing doorbell in APCS for</div><div class='add'>+      this client.</div><div class='add'>+</div><div class='add'>+  qcom,ipc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to a syscon node representing the APCS registers</div><div class='add'>+          - description: u32 representing offset to the register within the syscon</div><div class='add'>+          - description: u32 representing the ipc bit within the register</div><div class='add'>+    description:</div><div class='add'>+      Three entries specifying the outgoing ipc bit used for signaling the</div><div class='add'>+      remote processor.</div><div class='add'>+</div><div class='add'>+  qcom,smd-edge:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The identifier of the remote processor in the smd channel allocation</div><div class='add'>+      table.</div><div class='add'>+</div><div class='add'>+  qcom,remote-pid:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The identifier for the remote processor as known by the rest of the</div><div class='add'>+      system.</div><div class='add'>+</div><div class='add'>+  rpm-requests:</div><div class='add'>+    $ref: /schemas/soc/qcom/qcom,smd-rpm.yaml#</div><div class='add'>+    required:</div><div class='add'>+      - qcom,smd-channels</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm Resource Power Manager (RPM) over SMD.</div><div class='add'>+</div><div class='add'>+  wcnss:</div><div class='add'>+    $ref: /schemas/soc/qcom/qcom,wcnss.yaml</div><div class='add'>+    required:</div><div class='add'>+      - qcom,smd-channels</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm WCNSS for Bluetooth, WiFi and FM radio.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - interrupts</div><div class='add'>+  - qcom,smd-edge</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - mboxes</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,ipc</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mailbox/qcom-ipcc.h&gt;</div><div class='add'>+</div><div class='add'>+    remoteproc {</div><div class='add'>+        // ...</div><div class='add'>+</div><div class='add'>+        smd-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 156 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+            qcom,ipc = &lt;&amp;apcs 8 8&gt;;</div><div class='add'>+            qcom,smd-edge = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt<br/>deleted file mode 100644<br/>index a83080b8905c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,177 +0,0 @@</div><div class='del'>-Qualcomm WCNSS Peripheral Image Loader</div><div class='del'>-</div><div class='del'>-This document defines the binding for a component that loads and boots firmware</div><div class='del'>-on the Qualcomm WCNSS core.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,riva-pil",</div><div class='del'>-		    "qcom,pronto-v1-pil",</div><div class='del'>-		    "qcom,pronto-v2-pil"</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: must specify the base address and size of the CCU, DXE and</div><div class='del'>-		    PMU register blocks</div><div class='del'>-</div><div class='del'>-- reg-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "ccu", "dxe", "pmu"</div><div class='del'>-</div><div class='del'>-- interrupts-extended:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: must list the watchdog and fatal IRQs and may specify the</div><div class='del'>-		    ready, handover and stop-ack IRQs</div><div class='del'>-</div><div class='del'>-- interrupt-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: should be "wdog", "fatal", optionally followed by "ready",</div><div class='del'>-		    "handover", "stop-ack"</div><div class='del'>-</div><div class='del'>-- firmware-name:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must list the relative firmware image path for the</div><div class='del'>-		    WCNSS core. Defaults to "wcnss.mdt".</div><div class='del'>-</div><div class='del'>-- vddmx-supply: (deprecated for qcom,pronto-v1/2-pil)</div><div class='del'>-- vddcx-supply: (deprecated for qcom,pronto-v1/2-pil)</div><div class='del'>-- vddpx-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the regulators to be held on behalf of the</div><div class='del'>-		    booting of the WCNSS core</div><div class='del'>-</div><div class='del'>-- power-domains:</div><div class='del'>-	Usage: required (for qcom,pronto-v1/2-pil)</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the power domains to be held on behalf of the</div><div class='del'>-		    booting of the WCNSS core</div><div class='del'>-</div><div class='del'>-- power-domain-names:</div><div class='del'>-	Usage: required (for qcom,pronto-v1/2-pil)</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "cx", "mx"</div><div class='del'>-</div><div class='del'>-- qcom,smem-states:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to the SMEM state used to indicate to WCNSS that</div><div class='del'>-		    it should shut down</div><div class='del'>-</div><div class='del'>-- qcom,smem-state-names:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: should be "stop"</div><div class='del'>-</div><div class='del'>-- memory-region:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to reserved-memory node for the remote processor</div><div class='del'>-		    see ../reserved-memory/reserved-memory.txt</div><div class='del'>-</div><div class='del'>-= SUBNODES</div><div class='del'>-A required subnode of the WCNSS PIL is used to describe the attached rf module</div><div class='del'>-and its resource dependencies. It is described by the following properties:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,wcn3620",</div><div class='del'>-		    "qcom,wcn3660",</div><div class='del'>-		    "qcom,wcn3660b",</div><div class='del'>-		    "qcom,wcn3680"</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the xo clock and optionally the rf clock</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: should be "xo", optionally followed by "rf"</div><div class='del'>-</div><div class='del'>-- vddxo-supply:</div><div class='del'>-- vddrfa-supply:</div><div class='del'>-- vddpa-supply:</div><div class='del'>-- vdddig-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: reference to the regulators to be held on behalf of the</div><div class='del'>-		    booting of the WCNSS core</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-The wcnss node can also have an subnode named "smd-edge" that describes the SMD</div><div class='del'>-edge, channels and devices related to the WCNSS.</div><div class='del'>-See ../soc/qcom/qcom,smd.txt for details on how to describe the SMD edge.</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-The following example describes the resources needed to boot control the WCNSS,</div><div class='del'>-with attached WCN3680, as it is commonly found on MSM8974 boards.</div><div class='del'>-</div><div class='del'>-pronto@fb204000 {</div><div class='del'>-	compatible = "qcom,pronto-v2-pil";</div><div class='del'>-	reg = &lt;0xfb204000 0x2000&gt;, &lt;0xfb202000 0x1000&gt;, &lt;0xfb21b000 0x3000&gt;;</div><div class='del'>-	reg-names = "ccu", "dxe", "pmu";</div><div class='del'>-</div><div class='del'>-	interrupts-extended = &lt;&amp;intc 0 149 1&gt;,</div><div class='del'>-			      &lt;&amp;wcnss_smp2p_slave 0 0&gt;,</div><div class='del'>-			      &lt;&amp;wcnss_smp2p_slave 1 0&gt;,</div><div class='del'>-			      &lt;&amp;wcnss_smp2p_slave 2 0&gt;,</div><div class='del'>-			      &lt;&amp;wcnss_smp2p_slave 3 0&gt;;</div><div class='del'>-	interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";</div><div class='del'>-</div><div class='del'>-	power-domains = &lt;&amp;rpmpd MSM8974_VDDCX&gt;, &lt;&amp;rpmpd MSM8974_VDDMX&gt;;</div><div class='del'>-	power-domain-names = "cx", "mx";</div><div class='del'>-</div><div class='del'>-	vddpx-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='del'>-</div><div class='del'>-	qcom,smem-states = &lt;&amp;wcnss_smp2p_out 0&gt;;</div><div class='del'>-	qcom,smem-state-names = "stop";</div><div class='del'>-</div><div class='del'>-	memory-region = &lt;&amp;wcnss_region&gt;;</div><div class='del'>-</div><div class='del'>-	pinctrl-names = "default";</div><div class='del'>-	pinctrl-0 = &lt;&amp;wcnss_pin_a&gt;;</div><div class='del'>-</div><div class='del'>-	iris {</div><div class='del'>-		compatible = "qcom,wcn3680";</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;rpmcc RPM_CXO_CLK_SRC&gt;, &lt;&amp;rpmcc RPM_CXO_A2&gt;;</div><div class='del'>-		clock-names = "xo", "rf";</div><div class='del'>-</div><div class='del'>-		vddxo-supply = &lt;&amp;pm8941_l6&gt;;</div><div class='del'>-		vddrfa-supply = &lt;&amp;pm8941_l11&gt;;</div><div class='del'>-		vddpa-supply = &lt;&amp;pm8941_l19&gt;;</div><div class='del'>-		vdddig-supply = &lt;&amp;pm8941_s3&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	smd-edge {</div><div class='del'>-		interrupts = &lt;0 142 1&gt;;</div><div class='del'>-</div><div class='del'>-		qcom,ipc = &lt;&amp;apcs 8 17&gt;;</div><div class='del'>-		qcom,smd-edge = &lt;6&gt;;</div><div class='del'>-		qcom,remote-pid = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-		label = "pronto";</div><div class='del'>-</div><div class='del'>-		wcnss {</div><div class='del'>-			compatible = "qcom,wcnss";</div><div class='del'>-			qcom,smd-channels = "WCNSS_CTRL";</div><div class='del'>-</div><div class='del'>-			qcom,mmio = &lt;&amp;pronto&gt;;</div><div class='del'>-</div><div class='del'>-			bt {</div><div class='del'>-				compatible = "qcom,wcnss-bt";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml<br/>new file mode 100644<br/>index 000000000000..45eb42bd3c2c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/qcom,wcnss-pil.yaml</a></div><div class='hunk'>@@ -0,0 +1,294 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/qcom,wcnss-pil.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm WCNSS Peripheral Image Loader</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This document defines the binding for a component that loads and boots</div><div class='add'>+  firmware on the Qualcomm WCNSS core.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    description:</div><div class='add'>+      Append "qcom,pronto" if the device is actually pronto, and not riva</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,pronto-v1-pil</div><div class='add'>+              - qcom,pronto-v2-pil</div><div class='add'>+              - qcom,pronto-v3-pil</div><div class='add'>+          - const: qcom,pronto</div><div class='add'>+      - const: qcom,riva-pil</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 3</div><div class='add'>+    description:</div><div class='add'>+      The base address and size of the CCU, DXE and PMU register blocks</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ccu</div><div class='add'>+      - const: dxe</div><div class='add'>+      - const: pmu</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: wdog</div><div class='add'>+      - const: fatal</div><div class='add'>+      - const: ready</div><div class='add'>+      - const: handover</div><div class='add'>+      - const: stop-ack</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description:</div><div class='add'>+      Relative firmware image path for the WCNSS core. Defaults to</div><div class='add'>+      "wcnss.mdt".</div><div class='add'>+</div><div class='add'>+  vddpx-supply:</div><div class='add'>+    description:</div><div class='add'>+      PX regulator to be held on behalf of the booting of the WCNSS core</div><div class='add'>+</div><div class='add'>+  vddmx-supply:</div><div class='add'>+    description:</div><div class='add'>+      MX regulator to be held on behalf of the booting of the WCNSS core.</div><div class='add'>+</div><div class='add'>+  vddcx-supply:</div><div class='add'>+    description:</div><div class='add'>+      CX regulator to be held on behalf of the booting of the WCNSS core.</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: cx</div><div class='add'>+      - const: mx</div><div class='add'>+</div><div class='add'>+  qcom,smem-states:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      States used by the AP to signal the WCNSS core that it should shutdown</div><div class='add'>+    items:</div><div class='add'>+      - description: Stop the modem</div><div class='add'>+</div><div class='add'>+  qcom,smem-state-names:</div><div class='add'>+    description: The names of the state bits used for SMP2P output</div><div class='add'>+    items:</div><div class='add'>+      - const: stop</div><div class='add'>+</div><div class='add'>+  memory-region:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: reserved-memory for the WCNSS core</div><div class='add'>+</div><div class='add'>+  smd-edge:</div><div class='add'>+    $ref: /schemas/remoteproc/qcom,smd-edge.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Qualcomm Shared Memory subnode which represents communication edge,</div><div class='add'>+      channels and devices related to the ADSP.</div><div class='add'>+</div><div class='add'>+  iris:</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      The iris subnode of the WCNSS PIL is used to describe the attached RF module</div><div class='add'>+      and its resource dependencies.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,wcn3620</div><div class='add'>+          - qcom,wcn3660</div><div class='add'>+          - qcom,wcn3660b</div><div class='add'>+          - qcom,wcn3680</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - description: XO clock</div><div class='add'>+          - description: RF clock</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - const: xo</div><div class='add'>+          - const: rf</div><div class='add'>+</div><div class='add'>+      vddxo-supply:</div><div class='add'>+        description:</div><div class='add'>+          Reference to the regulator to be held on behalf of the booting WCNSS</div><div class='add'>+          core</div><div class='add'>+</div><div class='add'>+      vddrfa-supply:</div><div class='add'>+        description:</div><div class='add'>+          Reference to the regulator to be held on behalf of the booting WCNSS</div><div class='add'>+          core</div><div class='add'>+</div><div class='add'>+      vddpa-supply:</div><div class='add'>+        description:</div><div class='add'>+          Reference to the regulator to be held on behalf of the booting WCNSS</div><div class='add'>+          core</div><div class='add'>+</div><div class='add'>+      vdddig-supply:</div><div class='add'>+        description:</div><div class='add'>+          Reference to the regulator to be held on behalf of the booting WCNSS</div><div class='add'>+          core</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - clocks</div><div class='add'>+      - clock-names</div><div class='add'>+      - vddxo-supply</div><div class='add'>+      - vddrfa-supply</div><div class='add'>+      - vddpa-supply</div><div class='add'>+      - vdddig-supply</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - iris</div><div class='add'>+  - vddpx-supply</div><div class='add'>+  - memory-region</div><div class='add'>+  - smd-edge</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,riva-pil</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - vddcx-supply</div><div class='add'>+        - vddmx-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pronto-v1-pil</div><div class='add'>+              - qcom,pronto-v2-pil</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vddmx-supply:</div><div class='add'>+          deprecated: true</div><div class='add'>+          description: Deprecated for qcom,pronto-v1/2-pil</div><div class='add'>+</div><div class='add'>+        vddcx-supply:</div><div class='add'>+          deprecated: true</div><div class='add'>+          description: Deprecated for qcom,pronto-v1/2-pil</div><div class='add'>+</div><div class='add'>+      oneOf:</div><div class='add'>+        - required:</div><div class='add'>+            - power-domains</div><div class='add'>+            - power-domain-names</div><div class='add'>+        - required:</div><div class='add'>+            - vddmx-supply</div><div class='add'>+            - vddcx-supply</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,pronto-v3-pil</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        vddmx-supply: false</div><div class='add'>+        vddcx-supply: false</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+        - power-domain-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+    pronto@a21b000 {</div><div class='add'>+        compatible = "qcom,pronto-v2-pil", "qcom,pronto";</div><div class='add'>+        reg = &lt;0x0a204000 0x2000&gt;, &lt;0x0a202000 0x1000&gt;, &lt;0x0a21b000 0x3000&gt;;</div><div class='add'>+        reg-names = "ccu", "dxe", "pmu";</div><div class='add'>+</div><div class='add'>+        interrupts-extended = &lt;&amp;intc GIC_SPI 149 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;wcnss_smp2p_in 0 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;wcnss_smp2p_in 1 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;wcnss_smp2p_in 2 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                              &lt;&amp;wcnss_smp2p_in 3 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;rpmpd MSM8916_VDDCX&gt;, &lt;&amp;rpmpd MSM8916_VDDMX&gt;;</div><div class='add'>+        power-domain-names = "cx", "mx";</div><div class='add'>+</div><div class='add'>+        vddpx-supply = &lt;&amp;pm8916_l7&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,smem-states = &lt;&amp;wcnss_smp2p_out 0&gt;;</div><div class='add'>+        qcom,smem-state-names = "stop";</div><div class='add'>+</div><div class='add'>+        memory-region = &lt;&amp;wcnss_region&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;wcnss_pin_a&gt;;</div><div class='add'>+</div><div class='add'>+        iris {</div><div class='add'>+            compatible = "qcom,wcn3620";</div><div class='add'>+            vddxo-supply = &lt;&amp;pm8916_l7&gt;;</div><div class='add'>+            vddrfa-supply = &lt;&amp;pm8916_s3&gt;;</div><div class='add'>+            vddpa-supply = &lt;&amp;pm8916_l9&gt;;</div><div class='add'>+            vdddig-supply = &lt;&amp;pm8916_l5&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;rpmcc RPM_SMD_RF_CLK2&gt;;</div><div class='add'>+            clock-names = "xo";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        smd-edge {</div><div class='add'>+            interrupts = &lt;GIC_SPI 142 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+            qcom,ipc = &lt;&amp;apcs 8 17&gt;;</div><div class='add'>+            qcom,smd-edge = &lt;6&gt;;</div><div class='add'>+            qcom,remote-pid = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+            label = "pronto";</div><div class='add'>+</div><div class='add'>+            wcnss_ctrl: wcnss {</div><div class='add'>+                compatible = "qcom,wcnss";</div><div class='add'>+                qcom,smd-channels = "WCNSS_CTRL";</div><div class='add'>+</div><div class='add'>+                qcom,mmio = &lt;&amp;pronto&gt;;</div><div class='add'>+</div><div class='add'>+                bluetooth {</div><div class='add'>+                    compatible = "qcom,wcnss-bt";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                wifi {</div><div class='add'>+                    compatible = "qcom,wcnss-wlan";</div><div class='add'>+</div><div class='add'>+                    interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                                 &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+                    interrupt-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+                    qcom,smem-states = &lt;&amp;apps_smsm 10&gt;, &lt;&amp;apps_smsm 9&gt;;</div><div class='add'>+                    qcom,smem-state-names = "tx-enable", "tx-rings-empty";</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml<br/>index a7d25fa920e5..4bea679a0f61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/renesas,rcar-rproc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/remoteproc/renesas,rcar-rproc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/renesas,rcar-rproc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Renesas R-Car remote processor controller bindings</div><div class='add'>+title: Renesas R-Car remote processor controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Julien Massot &lt;julien.massot@iot.bzh&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml<br/>index be3d9b0e876b..959a56f1b6c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 remote processor controller bindings</div><div class='add'>+title: STMicroelectronics STM32 remote processor controller</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   This document defines the binding for the remoteproc component that loads and</div><div class='hunk'>@@ -29,7 +29,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   st,syscfg-holdboot:</div><div class='ctx'>     description: remote processor reset hold boot</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: Phandle of syscon block</div><div class='hunk'>@@ -39,12 +39,12 @@ properties:</div><div class='ctx'>   st,syscfg-tz:</div><div class='ctx'>     description:</div><div class='ctx'>       Reference to the system configuration which holds the RCC trust zone mode</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: Phandle of syscon block</div><div class='del'>-          - description: FIXME</div><div class='del'>-          - description: FIXME</div><div class='add'>+          - description: The offset of the trust zone setting register</div><div class='add'>+          - description: The field mask of the trust zone state</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     description: Should contain the WWDG1 watchdog reset interrupt</div><div class='hunk'>@@ -72,9 +72,9 @@ properties:</div><div class='ctx'>               ready for shutdown</div><div class='ctx'>       - description: |</div><div class='ctx'>           A channel (d) used by the local proc to notify the remote proc that it</div><div class='del'>-          has to stop interprocessor communnication.</div><div class='add'>+          has to stop interprocessor communication.</div><div class='ctx'>           Unidirectional channel:</div><div class='del'>-            - from local to remote, where ACK from the remote means that communnication</div><div class='add'>+            - from local to remote, where ACK from the remote means that communication</div><div class='ctx'>               as been stopped on the remote side.</div><div class='ctx'>     minItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -95,35 +95,35 @@ properties:</div><div class='ctx'>       (see ../reserved-memory/reserved-memory.txt)</div><div class='ctx'> </div><div class='ctx'>   st,syscfg-pdds:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     description: |</div><div class='ctx'>       Reference to the system configuration which holds the remote</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: Phandle of syscon block</div><div class='del'>-          - description: FIXME</div><div class='del'>-          - description: FIXME</div><div class='add'>+          - description: The offset of the power setting register</div><div class='add'>+          - description: The field mask of the PDDS selection</div><div class='ctx'> </div><div class='ctx'>   st,syscfg-m4-state:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     description: |</div><div class='ctx'>       Reference to the tamp register which exposes the Cortex-M4 state.</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: Phandle of syscon block with the tamp register</div><div class='del'>-          - description: FIXME</div><div class='del'>-          - description: FIXME</div><div class='add'>+          - description: The offset of the tamp register</div><div class='add'>+          - description: The field mask of the Cortex-M4 state</div><div class='ctx'> </div><div class='ctx'>   st,syscfg-rsc-tbl:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     description: |</div><div class='ctx'>       Reference to the tamp register which references the Cortex-M4</div><div class='ctx'>       resource table address.</div><div class='ctx'>     items:</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: Phandle of syscon block with the tamp register</div><div class='del'>-          - description: FIXME</div><div class='del'>-          - description: FIXME</div><div class='add'>+          - description: The offset of the tamp register</div><div class='add'>+          - description: The field mask of the Cortex-M4 resource table address</div><div class='ctx'> </div><div class='ctx'>   st,auto-boot:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml<br/>index cedbc5efdc56..f16e90380df1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/ti,k3-dsp-rproc.yaml</a></div><div class='hunk'>@@ -31,10 +31,12 @@ allOf:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - ti,am62a-c7xv-dsp</div><div class='ctx'>       - ti,j721e-c66-dsp</div><div class='ctx'>       - ti,j721e-c71-dsp</div><div class='ctx'>       - ti,j721s2-c71-dsp</div><div class='ctx'>     description:</div><div class='add'>+      Use "ti,am62a-c7xv-dsp" for AM62A Deep learning DSPs on K3 AM62A SoCs</div><div class='ctx'>       Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs</div><div class='ctx'>       Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs</div><div class='ctx'>       Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs</div><div class='hunk'>@@ -109,6 +111,7 @@ else:</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='add'>+          - ti,am62a-c7xv-dsp</div><div class='ctx'>           - ti,j721e-c71-dsp</div><div class='ctx'>           - ti,j721s2-c71-dsp</div><div class='ctx'>   then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml<br/>index fb9605f0655b..fcc3db97fe8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml</a></div><div class='hunk'>@@ -21,6 +21,9 @@ description: |</div><div class='ctx'>   called "Single-CPU" mode, where only Core0 is used, but with ability to use</div><div class='ctx'>   Core1's TCMs as well.</div><div class='ctx'> </div><div class='add'>+  AM62 SoC family support a single R5F core only which runs Device Manager</div><div class='add'>+  firmware and can also be used as a remote processor with IPC communication.</div><div class='add'>+</div><div class='ctx'>   Each Dual-Core R5F sub-system is represented as a single DTS node</div><div class='ctx'>   representing the cluster, with a pair of child DT nodes representing</div><div class='ctx'>   the individual R5F cores. Each node has a number of required or optional</div><div class='hunk'>@@ -34,10 +37,11 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - ti,am62-r5fss</div><div class='add'>+      - ti,am64-r5fss</div><div class='ctx'>       - ti,am654-r5fss</div><div class='del'>-      - ti,j721e-r5fss</div><div class='ctx'>       - ti,j7200-r5fss</div><div class='del'>-      - ti,am64-r5fss</div><div class='add'>+      - ti,j721e-r5fss</div><div class='ctx'>       - ti,j721s2-r5fss</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='hunk'>@@ -64,10 +68,17 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='ctx'>       Configuration Mode for the Dual R5F cores within the R5F cluster.</div><div class='del'>-      Should be either a value of 1 (LockStep mode) or 0 (Split mode) on</div><div class='add'>+      For most SoCs (AM65x, J721E, J7200, J721s2),</div><div class='add'>+      It should be either a value of 1 (LockStep mode) or 0 (Split mode) on</div><div class='ctx'>       most SoCs (AM65x, J721E, J7200, J721s2), default is LockStep mode if</div><div class='del'>-      omitted; and should be either a value of 0 (Split mode) or 2</div><div class='del'>-      (Single-CPU mode) on AM64x SoCs, default is Split mode if omitted.</div><div class='add'>+      omitted.</div><div class='add'>+      For AM64x SoCs,</div><div class='add'>+      It  should be either a value of 0 (Split mode) or 2 (Single-CPU mode) and</div><div class='add'>+      default is Split mode if omitted.</div><div class='add'>+      For AM62x SoCs,</div><div class='add'>+      It should be set as 3 (Single-Core mode) which is also the default if</div><div class='add'>+      omitted.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> # R5F Processor Child Nodes:</div><div class='ctx'> # ==========================</div><div class='hunk'>@@ -80,7 +91,9 @@ patternProperties:</div><div class='ctx'>       node representing a TI instantiation of the Arm Cortex R5F core. There</div><div class='ctx'>       are some specific integration differences for the IP like the usage of</div><div class='ctx'>       a Region Address Translator (RAT) for translating the larger SoC bus</div><div class='del'>-      addresses into a 32-bit address space for the processor.</div><div class='add'>+      addresses into a 32-bit address space for the processor. For AM62x,</div><div class='add'>+      the R5F Sub-System device node should only define one R5F child node</div><div class='add'>+      as it has only one core available.</div><div class='ctx'> </div><div class='ctx'>       Each R5F core has an associated 64 KB of Tightly-Coupled Memory (TCM)</div><div class='ctx'>       internal memories split between two banks - TCMA and TCMB (further</div><div class='hunk'>@@ -100,10 +113,11 @@ patternProperties:</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         enum:</div><div class='add'>+          - ti,am62-r5f</div><div class='add'>+          - ti,am64-r5f</div><div class='ctx'>           - ti,am654-r5f</div><div class='del'>-          - ti,j721e-r5f</div><div class='ctx'>           - ti,j7200-r5f</div><div class='del'>-          - ti,am64-r5f</div><div class='add'>+          - ti,j721e-r5f</div><div class='ctx'>           - ti,j721s2-r5f</div><div class='ctx'> </div><div class='ctx'>       reg:</div><div class='hunk'>@@ -208,19 +222,39 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      enum:</div><div class='del'>-        - ti,am64-r5fss</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    ti,cluster-mode:</div><div class='del'>-      enum: [0, 2]</div><div class='del'>-else:</div><div class='del'>-  properties:</div><div class='del'>-    ti,cluster-mode:</div><div class='del'>-      enum: [0, 1]</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - ti,am64-r5fss</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,cluster-mode:</div><div class='add'>+          enum: [0, 2]</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - ti,am654-r5fss</div><div class='add'>+            - ti,j7200-r5fss</div><div class='add'>+            - ti,j721e-r5fss</div><div class='add'>+            - ti,j721s2-r5fss</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,cluster-mode:</div><div class='add'>+          enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - ti,am62-r5fss</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,cluster-mode:</div><div class='add'>+          enum: [3]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml b/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml<br/>new file mode 100644<br/>index 000000000000..c6d86964b72a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/ti,pru-consumer.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/ti,pru-consumer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Common TI PRU Consumer Binding</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Suman Anna &lt;s-anna@ti.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  A PRU application/consumer/user node typically uses one or more PRU device</div><div class='add'>+  nodes to implement a PRU application/functionality. Each application/client</div><div class='add'>+  node would need a reference to at least a PRU node, and optionally define</div><div class='add'>+  some properties needed for hardware/firmware configuration. The below</div><div class='add'>+  properties are a list of common properties supported by the PRU remoteproc</div><div class='add'>+  infrastructure.</div><div class='add'>+</div><div class='add'>+  The application nodes shall define their own bindings like regular platform</div><div class='add'>+  devices, so below are in addition to each node's bindings.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  ti,prus:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: phandles to the PRU, RTU or Tx_PRU nodes used</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 6</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 1</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 6</div><div class='add'>+    description: |</div><div class='add'>+      firmwares for the PRU cores, the default firmware for the core from</div><div class='add'>+      the PRU node will be used if not provided. The firmware names should</div><div class='add'>+      correspond to the PRU cores listed in the 'ti,prus' property</div><div class='add'>+</div><div class='add'>+  ti,pruss-gp-mux-sel:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 6</div><div class='add'>+    items:</div><div class='add'>+      enum: [0, 1, 2, 3, 4]</div><div class='add'>+    description: |</div><div class='add'>+      array of values for the GP_MUX_SEL under PRUSS_GPCFG register for a PRU.</div><div class='add'>+      This selects the internal muxing scheme for the PRU instance. Values</div><div class='add'>+      should correspond to the PRU cores listed in the 'ti,prus' property. The</div><div class='add'>+      GP_MUX_SEL setting is a per-slice setting (one setting for PRU0, RTU0,</div><div class='add'>+      and Tx_PRU0 on K3 SoCs). Use the same value for all cores within the</div><div class='add'>+      same slice in the associative array. If the array size is smaller than</div><div class='add'>+      the size of 'ti,prus' property, the default out-of-reset value (0) for the</div><div class='add'>+      PRU core is used.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - ti,prus</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml<br/>index d7c3a78e37e6..cd55d80137f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.yaml</a></div><div class='hunk'>@@ -36,17 +36,18 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - ti,am3356-pru   # for AM335x SoC family (AM3356+ SoCs only)</div><div class='ctx'>       - ti,am4376-pru   # for AM437x SoC family (AM4376+ SoCs only)</div><div class='add'>+      - ti,am5728-pru   # for AM57xx SoC family</div><div class='add'>+      - ti,am625-pru    # for PRUs in K3 AM62x SoC family</div><div class='ctx'>       - ti,am642-pru    # for PRUs in K3 AM64x SoC family</div><div class='ctx'>       - ti,am642-rtu    # for RTUs in K3 AM64x SoC family</div><div class='ctx'>       - ti,am642-tx-pru # for Tx_PRUs in K3 AM64x SoC family</div><div class='del'>-      - ti,am5728-pru   # for AM57xx SoC family</div><div class='del'>-      - ti,k2g-pru      # for 66AK2G SoC family</div><div class='ctx'>       - ti,am654-pru    # for PRUs in K3 AM65x SoC family</div><div class='ctx'>       - ti,am654-rtu    # for RTUs in K3 AM65x SoC family</div><div class='ctx'>       - ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs</div><div class='ctx'>       - ti,j721e-pru    # for PRUs in K3 J721E SoC family</div><div class='ctx'>       - ti,j721e-rtu    # for RTUs in K3 J721E SoC family</div><div class='ctx'>       - ti,j721e-tx-pru # for Tx_PRUs in K3 J721E SoC family</div><div class='add'>+      - ti,k2g-pru      # for 66AK2G SoC family</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml<br/>new file mode 100644<br/>index 000000000000..9f677367dd9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml</a></div><div class='hunk'>@@ -0,0 +1,135 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx R5F processor subsystem</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ben Levinsky &lt;ben.levinsky@amd.com&gt;</div><div class='add'>+  - Tanmay Shah &lt;tanmay.shah@amd.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for</div><div class='add'>+  real-time processing based on the Cortex-R5F processor core from ARM.</div><div class='add'>+  The Cortex-R5F processor implements the Arm v7-R architecture and includes a</div><div class='add'>+  floating-point unit that implements the Arm VFPv3 instruction set.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: xlnx,zynqmp-r5fss</div><div class='add'>+</div><div class='add'>+  xlnx,cluster-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1, 2]</div><div class='add'>+    description: |</div><div class='add'>+      The RPU MPCore can operate in split mode (Dual-processor performance), Safety</div><div class='add'>+      lock-step mode(Both RPU cores execute the same code in lock-step,</div><div class='add'>+      clock-for-clock) or Single CPU mode (RPU core 0 is held in reset while</div><div class='add'>+      core 1 runs normally). The processor does not support dynamic configuration.</div><div class='add'>+      Switching between modes is only permitted immediately after a processor reset.</div><div class='add'>+      If set to  1 then lockstep mode and if 0 then split mode.</div><div class='add'>+      If set to  2 then single CPU mode. When not defined, default will be lockstep mode.</div><div class='add'>+      In summary,</div><div class='add'>+      0: split mode</div><div class='add'>+      1: lockstep mode (default)</div><div class='add'>+      2: single cpu mode</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^r5f-[a-f0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      The RPU is located in the Low Power Domain of the Processor Subsystem.</div><div class='add'>+      Each processor includes separate L1 instruction and data caches and</div><div class='add'>+      tightly coupled memories (TCM). System memory is cacheable, but the TCM</div><div class='add'>+      memory space is non-cacheable.</div><div class='add'>+</div><div class='add'>+      Each RPU contains one 64KB memory and two 32KB memories that</div><div class='add'>+      are accessed via the TCM A and B port interfaces, for a total of 128KB</div><div class='add'>+      per processor. In lock-step mode, the processor has access to 256KB of</div><div class='add'>+      TCM memory.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: xlnx,zynqmp-r5f</div><div class='add'>+</div><div class='add'>+      power-domains:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      mboxes:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - description: mailbox channel to send data to RPU</div><div class='add'>+          - description: mailbox channel to receive data from RPU</div><div class='add'>+</div><div class='add'>+      mbox-names:</div><div class='add'>+        minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - const: tx</div><div class='add'>+          - const: rx</div><div class='add'>+</div><div class='add'>+      sram:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 8</div><div class='add'>+        items:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        description: |</div><div class='add'>+          phandles to one or more reserved on-chip SRAM regions. Other than TCM,</div><div class='add'>+          the RPU can execute instructions and access data from the OCM memory,</div><div class='add'>+          the main DDR memory, and other system memories.</div><div class='add'>+</div><div class='add'>+          The regions should be defined as child nodes of the respective SRAM</div><div class='add'>+          node, and should be defined as per the generic bindings in</div><div class='add'>+          Documentation/devicetree/bindings/sram/sram.yaml</div><div class='add'>+</div><div class='add'>+      memory-region:</div><div class='add'>+        description: |</div><div class='add'>+          List of phandles to the reserved memory regions associated with the</div><div class='add'>+          remoteproc device. This is variable and describes the memories shared with</div><div class='add'>+          the remote processor (e.g. remoteproc firmware and carveouts, rpmsg</div><div class='add'>+          vrings, ...). This reserved memory region will be allocated in DDR memory.</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 8</div><div class='add'>+        items:</div><div class='add'>+          - description: region used for RPU firmware image section</div><div class='add'>+          - description: vdev buffer</div><div class='add'>+          - description: vring0</div><div class='add'>+          - description: vring1</div><div class='add'>+        additionalItems: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - power-domains</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    remoteproc {</div><div class='add'>+        compatible = "xlnx,zynqmp-r5fss";</div><div class='add'>+        xlnx,cluster-mode = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        r5f-0 {</div><div class='add'>+            compatible = "xlnx,zynqmp-r5f";</div><div class='add'>+            power-domains = &lt;&amp;zynqmp_firmware 0x7&gt;;</div><div class='add'>+            memory-region = &lt;&amp;rproc_0_fw_image&gt;, &lt;&amp;rpu0vdev0buffer&gt;, &lt;&amp;rpu0vdev0vring0&gt;, &lt;&amp;rpu0vdev0vring1&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipi_mailbox_rpu0 0&gt;, &lt;&amp;ipi_mailbox_rpu0 1&gt;;</div><div class='add'>+            mbox-names = "tx", "rx";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        r5f-1 {</div><div class='add'>+            compatible = "xlnx,zynqmp-r5f";</div><div class='add'>+            power-domains = &lt;&amp;zynqmp_firmware 0x8&gt;;</div><div class='add'>+            memory-region = &lt;&amp;rproc_1_fw_image&gt;, &lt;&amp;rpu1vdev0buffer&gt;, &lt;&amp;rpu1vdev0vring0&gt;, &lt;&amp;rpu1vdev0vring1&gt;;</div><div class='add'>+            mboxes = &lt;&amp;ipi_mailbox_rpu1 0&gt;, &lt;&amp;ipi_mailbox_rpu1 1&gt;;</div><div class='add'>+            mbox-names = "tx", "rx";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/framebuffer.yaml b/Documentation/devicetree/bindings/reserved-memory/framebuffer.yaml<br/>new file mode 100644<br/>index 000000000000..05b6648b3458<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/framebuffer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/framebuffer.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reserved-memory/framebuffer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: /reserved-memory framebuffer node bindings</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - devicetree-spec@vger.kernel.org</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: framebuffer</div><div class='add'>+    description: &gt;</div><div class='add'>+      This indicates a region of memory meant to be used as a framebuffer for</div><div class='add'>+      a set of display devices. It can be used by an operating system to keep</div><div class='add'>+      the framebuffer from being overwritten and use it as the backing memory</div><div class='add'>+      for a display device (such as simple-framebuffer).</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    / {</div><div class='add'>+        compatible = "foo";</div><div class='add'>+        model = "foo";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        chosen {</div><div class='add'>+            framebuffer {</div><div class='add'>+                compatible = "simple-framebuffer";</div><div class='add'>+                memory-region = &lt;&amp;fb&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        reserved-memory {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+</div><div class='add'>+            fb: framebuffer@80000000 {</div><div class='add'>+                compatible = "framebuffer";</div><div class='add'>+                reg = &lt;0x80000000 0x007e9000&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml b/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml<br/>index 257a0b51994a..c591ec37d7e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/google,open-dice.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reserved-memory/google,open-dice.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Open Profile for DICE Device Tree Bindings</div><div class='add'>+title: Open Profile for DICE</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This binding represents a reserved memory region containing data</div><div class='hunk'>@@ -16,7 +16,7 @@ maintainers:</div><div class='ctx'>   - David Brazdil &lt;dbrazdil@google.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "reserved-memory.yaml"</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml b/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml<br/>index 83dfe499a259..592f180e6b0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/memory-region.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/memory-region.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/memory-region.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reserved-memory/memory-region.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Reserved Memory Region Device Tree Binding</div><div class='add'>+title: Reserved Memory Region</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - devicetree-spec@vger.kernel.org</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml b/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml<br/>index 035a50fe3ee4..e2ace3df942a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/nvidia,tegra210-emc-table.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra210-emc-table.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NVIDIA Tegra210 EMC Frequency Table Device Tree Bindings</div><div class='add'>+title: NVIDIA Tegra210 EMC Frequency Table</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='hunk'>@@ -14,7 +14,7 @@ description: On Tegra210, firmware passes a binary representation of the</div><div class='ctx'>   EMC frequency table via a reserved memory region.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "reserved-memory.yaml"</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/phram.yaml b/Documentation/devicetree/bindings/reserved-memory/phram.yaml<br/>new file mode 100644<br/>index 000000000000..65c7cacf9be4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/phram.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/phram.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reserved-memory/phram.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MTD/block device in RAM</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Specifies that the reserved memory region can be used as an MTD or block</div><div class='add'>+  device.</div><div class='add'>+</div><div class='add'>+  The "phram" node is named after the "MTD in PHysical RAM" driver which</div><div class='add'>+  provides an implementation of this functionality in Linux.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Vincent Whitchurch &lt;vincent.whitchurch@axis.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='add'>+  - $ref: /schemas/mtd/mtd.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: phram</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: region of memory that can be used as an MTD/block device</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    reserved-memory {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        phram: flash@12340000 {</div><div class='add'>+            compatible = "phram";</div><div class='add'>+            label = "rootfs";</div><div class='add'>+            reg = &lt;0x12340000 0x00800000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml b/Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml<br/>index df1b5e0ed3f4..610f8ef37e8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/qcom,cmd-db.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reserved-memory/qcom,cmd-db.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reserved-memory/qcom,cmd-db.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Command DB</div><div class='ctx'> </div><div class='hunk'>@@ -20,7 +20,7 @@ maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "reserved-memory.yaml"</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml b/Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml<br/>index 2998f1c8f0db..bab982f00485 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/qcom,rmtfs-mem.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reserved-memory/qcom,rmtfs-mem.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reserved-memory/qcom,rmtfs-mem.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Remote File System Memory</div><div class='ctx'> </div><div class='hunk'>@@ -15,7 +15,7 @@ maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "reserved-memory.yaml"</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -27,9 +27,11 @@ properties:</div><div class='ctx'>       identifier of the client to use this region for buffers</div><div class='ctx'> </div><div class='ctx'>   qcom,vmid:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     description: &gt;</div><div class='del'>-      vmid of the remote processor, to set up memory protection</div><div class='add'>+      Array of vmids of the remote processors, to set up memory protection</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - qcom,client-id</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/ramoops.yaml b/Documentation/devicetree/bindings/reserved-memory/ramoops.yaml<br/>index f4c351a69542..45cc39ecc9f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/ramoops.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/ramoops.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/ramoops.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/ramoops.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reserved-memory/ramoops.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reserved-memory/ramoops.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Ramoops oops/panic logger</div><div class='ctx'> </div><div class='hunk'>@@ -27,7 +27,7 @@ maintainers:</div><div class='ctx'>   - Kees Cook &lt;keescook@chromium.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "reserved-memory.yaml"</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -142,4 +142,3 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml<br/>index 7a0744052ff6..c680e397cfd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reserved-memory/reserved-memory.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: /reserved-memory Child Node Common Device Tree Bindings</div><div class='add'>+title: /reserved-memory Child Node Common</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - devicetree-spec@vger.kernel.org</div><div class='hunk'>@@ -31,17 +31,17 @@ properties:</div><div class='ctx'>   reg: true</div><div class='ctx'> </div><div class='ctx'>   size:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+      - $ref: /schemas/types.yaml#/definitions/uint64</div><div class='ctx'>     description: &gt;</div><div class='ctx'>       Length based on parent's \#size-cells. Size in bytes of memory to</div><div class='ctx'>       reserve.</div><div class='ctx'> </div><div class='ctx'>   alignment:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+      - $ref: /schemas/types.yaml#/definitions/uint64</div><div class='ctx'>     description: &gt;</div><div class='ctx'>       Length based on parent's \#size-cells. Address boundary for</div><div class='ctx'>       alignment of allocation.</div><div class='hunk'>@@ -52,6 +52,30 @@ properties:</div><div class='ctx'>       Address and Length pairs. Specifies regions of memory that are</div><div class='ctx'>       acceptable to allocate from.</div><div class='ctx'> </div><div class='add'>+  iommu-addresses:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: &gt;</div><div class='add'>+      A list of phandle and specifier pairs that describe static IO virtual</div><div class='add'>+      address space mappings and carveouts associated with a given reserved</div><div class='add'>+      memory region. The phandle in the first cell refers to the device for</div><div class='add'>+      which the mapping or carveout is to be created.</div><div class='add'>+</div><div class='add'>+      The specifier consists of an address/size pair and denotes the IO</div><div class='add'>+      virtual address range of the region for the given device. The exact</div><div class='add'>+      format depends on the values of the "#address-cells" and "#size-cells"</div><div class='add'>+      properties of the device referenced via the phandle.</div><div class='add'>+</div><div class='add'>+      When used in combination with a "reg" property, an IOVA mapping is to</div><div class='add'>+      be established for this memory region. One example where this can be</div><div class='add'>+      useful is to create an identity mapping for physical memory that the</div><div class='add'>+      firmware has configured some hardware to access (such as a bootsplash</div><div class='add'>+      framebuffer).</div><div class='add'>+</div><div class='add'>+      If no "reg" property is specified, the "iommu-addresses" property</div><div class='add'>+      defines carveout regions in the IOVA space for the given device. This</div><div class='add'>+      can be useful if a certain memory region should not be mapped through</div><div class='add'>+      the IOMMU.</div><div class='add'>+</div><div class='ctx'>   no-map:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description: &gt;</div><div class='hunk'>@@ -89,12 +113,69 @@ allOf:</div><div class='ctx'>           - no-map</div><div class='ctx'> </div><div class='ctx'> oneOf:</div><div class='del'>-  - required:</div><div class='del'>-      - reg</div><div class='add'>+  - oneOf:</div><div class='add'>+      - required:</div><div class='add'>+          - reg</div><div class='add'>+</div><div class='add'>+      - required:</div><div class='add'>+          - size</div><div class='add'>+</div><div class='add'>+  - oneOf:</div><div class='add'>+      # IOMMU reservations</div><div class='add'>+      - required:</div><div class='add'>+          - iommu-addresses</div><div class='ctx'> </div><div class='del'>-  - required:</div><div class='del'>-      - size</div><div class='add'>+      # IOMMU mappings</div><div class='add'>+      - required:</div><div class='add'>+          - reg</div><div class='add'>+          - iommu-addresses</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    / {</div><div class='add'>+      compatible = "foo";</div><div class='add'>+      model = "foo";</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      reserved-memory {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        adsp_resv: reservation-adsp {</div><div class='add'>+          /*</div><div class='add'>+           * Restrict IOVA mappings for ADSP buffers to the 512 MiB region</div><div class='add'>+           * from 0x40000000 - 0x5fffffff. Anything outside is reserved by</div><div class='add'>+           * the ADSP for I/O memory and private memory allocations.</div><div class='add'>+           */</div><div class='add'>+          iommu-addresses = &lt;&amp;adsp 0x0 0x00000000 0x00 0x40000000&gt;,</div><div class='add'>+                            &lt;&amp;adsp 0x0 0x60000000 0xff 0xa0000000&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        fb: framebuffer@90000000 {</div><div class='add'>+          reg = &lt;0x0 0x90000000 0x0 0x00800000&gt;;</div><div class='add'>+          iommu-addresses = &lt;&amp;dc0 0x0 0x90000000 0x0 0x00800000&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      bus@0 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x0 0x0 0x0 0x40000000&gt;;</div><div class='add'>+</div><div class='add'>+        adsp: adsp@2990000 {</div><div class='add'>+          reg = &lt;0x2990000 0x2000&gt;;</div><div class='add'>+          memory-region = &lt;&amp;adsp_resv&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dc0: display@15200000 {</div><div class='add'>+          reg = &lt;0x15200000 0x10000&gt;;</div><div class='add'>+          memory-region = &lt;&amp;fb&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml b/Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml<br/>index 618105f079be..457de0920cd1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reserved-memory/shared-dma-pool.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reserved-memory/shared-dma-pool.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: /reserved-memory DMA pool node bindings</div><div class='add'>+title: /reserved-memory DMA pool</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - devicetree-spec@vger.kernel.org</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "reserved-memory.yaml"</div><div class='add'>+  - $ref: reserved-memory.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml b/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml<br/>index 001c0d2a8c1f..2a248e511c18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/allwinner,sun6i-a31-clock-reset.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reset/allwinner,sun6i-a31-clock-reset.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 Peripheral Reset Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A31 Peripheral Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml b/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml<br/>new file mode 100644<br/>index 000000000000..4379cec6b35a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/altr,rst-mgr.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Altera SOCFPGA Reset Manager</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dinh Nguyen &lt;dinguyen@altera.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Cyclone5/Arria5/Arria10</div><div class='add'>+        const: altr,rst-mgr</div><div class='add'>+      - description: Stratix10 ARM64 SoC</div><div class='add'>+        items:</div><div class='add'>+          - const: altr,stratix10-rst-mgr</div><div class='add'>+          - const: altr,rst-mgr</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  altr,modrst-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Offset of the first modrst register</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - altr,modrst-offset</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rstmgr@ffd05000 {</div><div class='add'>+        compatible = "altr,rst-mgr";</div><div class='add'>+        reg = &lt;0xffd05000 0x1000&gt;;</div><div class='add'>+        altr,modrst-offset = &lt;0x10&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt<br/>deleted file mode 100644<br/>index 43e580ef64ba..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-* Amlogic audio memory arbiter controller</div><div class='del'>-</div><div class='del'>-The Amlogic Audio ARB is a simple device which enables or</div><div class='del'>-disables the access of Audio FIFOs to DDR on AXG based SoC.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: 'amlogic,meson-axg-audio-arb' or</div><div class='del'>-	      'amlogic,meson-sm1-audio-arb'</div><div class='del'>-- reg: physical base address of the controller and length of memory</div><div class='del'>-       mapped region.</div><div class='del'>-- clocks: phandle to the fifo peripheral clock provided by the audio</div><div class='del'>-	  clock controller.</div><div class='del'>-- #reset-cells: must be 1.</div><div class='del'>-</div><div class='del'>-Example on the A113 SoC:</div><div class='del'>-</div><div class='del'>-arb: reset-controller@280 {</div><div class='del'>-	compatible = "amlogic,meson-axg-audio-arb";</div><div class='del'>-	reg = &lt;0x0 0x280 0x0 0x4&gt;;</div><div class='del'>-	#reset-cells = &lt;1&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc_audio AUD_CLKID_DDR_ARB&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml<br/>new file mode 100644<br/>index 000000000000..bc1d284785e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2019 BayLibre, SAS</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/amlogic,meson-axg-audio-arb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic audio memory arbiter controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: The Amlogic Audio ARB is a simple device which enables or disables</div><div class='add'>+  the access of Audio FIFOs to DDR on AXG based SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson-axg-audio-arb</div><div class='add'>+      - amlogic,meson-sm1-audio-arb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: |</div><div class='add'>+      phandle to the fifo peripheral clock provided by the audio clock</div><div class='add'>+      controller.</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // on the A113 SoC:</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-audio-clkc.h&gt;</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        arb: reset-controller@280 {</div><div class='add'>+            compatible = "amlogic,meson-axg-audio-arb";</div><div class='add'>+            reg = &lt;0x0 0x280 0x0 0x4&gt;;</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+            clocks = &lt;&amp;clkc_audio AUD_CLKID_DDR_ARB&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml<br/>index 92922d3afd14..d3fdee89d4f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reset/amlogic,meson-reset.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reset/amlogic,meson-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson SoC Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>       - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs</div><div class='ctx'>       - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs</div><div class='ctx'>       - amlogic,meson-a1-reset # Reset Controller on A1 and compatible SoCs</div><div class='add'>+      - amlogic,meson-s4-reset # Reset Controller on S4 and compatible SoCs</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/ath79-reset.txt b/Documentation/devicetree/bindings/reset/ath79-reset.txt<br/>deleted file mode 100644<br/>index 4c56330bf398..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/ath79-reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/ath79-reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-Binding for Qualcomm Atheros AR7xxx/AR9XXX reset controller</div><div class='del'>-</div><div class='del'>-Please also refer to reset.txt in this directory for common reset</div><div class='del'>-controller binding usage.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: has to be "qca,&lt;soctype&gt;-reset", "qca,ar7100-reset"</div><div class='del'>-              as fallback</div><div class='del'>-- reg: Base address and size of the controllers memory area</div><div class='del'>-- #reset-cells : Specifies the number of cells needed to encode reset</div><div class='del'>-                 line, should be 1</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	reset-controller@1806001c {</div><div class='del'>-		compatible = "qca,ar9132-reset", "qca,ar7100-reset";</div><div class='del'>-		reg = &lt;0x1806001c 0x4&gt;;</div><div class='del'>-</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml<br/>new file mode 100644<br/>index 000000000000..98465d26949e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/atmel,at91sam9260-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel/Microchip System Reset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The system reset controller can be used to reset the CPU. In case of</div><div class='add'>+  SAMA7G5 it can also reset some devices (e.g. USB PHYs).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - atmel,at91sam9260-rstc</div><div class='add'>+              - atmel,at91sam9g45-rstc</div><div class='add'>+              - atmel,sama5d3-rstc</div><div class='add'>+              - microchip,sam9x60-rstc</div><div class='add'>+              - microchip,sama7g5-rstc</div><div class='add'>+      - items:</div><div class='add'>+          - const: atmel,sama5d3-rstc</div><div class='add'>+          - const: atmel,at91sam9g45-rstc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: base registers for system reset control</div><div class='add'>+      - description: registers for device specific reset control</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - microchip,sama7g5-rstc</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/at91.h&gt;</div><div class='add'>+</div><div class='add'>+    reset-controller@fffffd00 {</div><div class='add'>+        compatible = "atmel,at91sam9260-rstc";</div><div class='add'>+        reg = &lt;0xfffffd00 0x10&gt;;</div><div class='add'>+        clocks = &lt;&amp;pmc PMC_TYPE_CORE PMC_SLOW&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/berlin,reset.txt b/Documentation/devicetree/bindings/reset/berlin,reset.txt<br/>deleted file mode 100644<br/>index 514fee098b4b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/berlin,reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/berlin,reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-Marvell Berlin reset controller</div><div class='del'>-===============================</div><div class='del'>-</div><div class='del'>-Please also refer to reset.txt in this directory for common reset</div><div class='del'>-controller binding usage.</div><div class='del'>-</div><div class='del'>-The reset controller node must be a sub-node of the chip controller</div><div class='del'>-node on Berlin SoCs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "marvell,berlin2-reset"</div><div class='del'>-- #reset-cells: must be set to 2</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-chip_rst: reset {</div><div class='del'>-	compatible = "marvell,berlin2-reset";</div><div class='del'>-	#reset-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usb_phy0 {</div><div class='del'>-	resets = &lt;&amp;chip_rst 0x104 12&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt<br/>deleted file mode 100644<br/>index a6f8455ae6c4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Bitmain BM1880 SoC Reset Controller</div><div class='del'>-===================================</div><div class='del'>-</div><div class='del'>-Please also refer to reset.txt in this directory for common reset</div><div class='del'>-controller binding usage.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:   Should be "bitmain,bm1880-reset"</div><div class='del'>-- reg:          Offset and length of reset controller space in SCTRL.</div><div class='del'>-- #reset-cells: Must be 1.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-        rst: reset-controller@c00 {</div><div class='del'>-                compatible = "bitmain,bm1880-reset";</div><div class='del'>-                reg = &lt;0xc00 0x8&gt;;</div><div class='del'>-                #reset-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml b/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml<br/>new file mode 100644<br/>index 000000000000..1f40b654f6a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/bitmain,bm1880-reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2019 Manivannan Sadhasivam &lt;mani@kernel.org&gt;</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/bitmain,bm1880-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Bitmain BM1880 SoC Reset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;mani@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: bitmain,bm1880-reset</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rst: reset-controller@c00 {</div><div class='add'>+        compatible = "bitmain,bm1880-reset";</div><div class='add'>+        reg = &lt;0xc00 0x8&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml<br/>index 560cf6522cb8..00150b93fca0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reset/brcm,bcm6345-reset.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reset/brcm,bcm6345-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: BCM6345 reset controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml b/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml<br/>index dfce6738b033..34cfc642d808 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/brcm,bcm7216-pcie-sata-rescal.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2020 Broadcom</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reset/brcm,bcm7216-pcie-sata-rescal.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reset/brcm,bcm7216-pcie-sata-rescal.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: BCM7216 RESCAL reset controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml<br/>index e00efa88a198..b115b86e2fe6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reset/brcm,brcmstb-reset.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reset/brcm,brcmstb-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Broadcom STB SW_INIT-style reset controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml b/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml<br/>index 53e4ede9c0bd..ee8a2dcf5dfa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/canaan,k210-rst.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reset/canaan,k210-rst.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Canaan Kendryte K210 Reset Controller Device Tree Bindings</div><div class='add'>+title: Canaan Kendryte K210 Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Damien Le Moal &lt;damien.lemoal@wdc.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml<br/>index b0c41ab1a746..cdfcf32c53fa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.yaml</a></div><div class='hunk'>@@ -24,6 +24,11 @@ properties:</div><div class='ctx'>           - const: hisilicon,hi3670-reset</div><div class='ctx'>           - const: hisilicon,hi3660-reset</div><div class='ctx'> </div><div class='add'>+  hisi,rst-syscon:</div><div class='add'>+    deprecated: true</div><div class='add'>+    description: phandle of the reset's syscon, use hisilicon,rst-syscon instead</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='ctx'>   hisilicon,rst-syscon:</div><div class='ctx'>     description: phandle of the reset's syscon.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt<br/>deleted file mode 100644<br/>index ea0a6a9734c1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,37 +0,0 @@</div><div class='del'>-Hisilicon System Reset Controller</div><div class='del'>-======================================</div><div class='del'>-</div><div class='del'>-Please also refer to reset.txt in this directory for common reset</div><div class='del'>-controller binding usage.</div><div class='del'>-</div><div class='del'>-The reset controller registers are part of the system-ctl block on</div><div class='del'>-hi6220 SoC.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of the following:</div><div class='del'>-  - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.</div><div class='del'>-  - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.</div><div class='del'>-  - "hisilicon,hi6220-aoctrl", "syscon" : For ao reset controller.</div><div class='del'>-- reg: should be register base and length as documented in the</div><div class='del'>-  datasheet</div><div class='del'>-- #reset-cells: 1, see below</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-sys_ctrl: sys_ctrl@f7030000 {</div><div class='del'>-	compatible = "hisilicon,hi6220-sysctrl", "syscon";</div><div class='del'>-	reg = &lt;0x0 0xf7030000 0x0 0x2000&gt;;</div><div class='del'>-	#clock-cells = &lt;1&gt;;</div><div class='del'>-	#reset-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Specifying reset lines connected to IP modules</div><div class='del'>-==============================================</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-        uart1: serial@..... {</div><div class='del'>-                ...</div><div class='del'>-                resets = &lt;&amp;sys_ctrl PERIPH_RSTEN3_UART1&gt;;</div><div class='del'>-                ...</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-The index could be found in &lt;dt-bindings/reset/hisi,hi6220-resets.h&gt;.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.txt b/Documentation/devicetree/bindings/reset/lantiq,reset.txt<br/>deleted file mode 100644<br/>index c6aef36b7d15..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/lantiq,reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/lantiq,reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-Lantiq XWAY SoC RCU reset controller binding</div><div class='del'>-============================================</div><div class='del'>-</div><div class='del'>-This binding describes a reset-controller found on the RCU module on Lantiq</div><div class='del'>-XWAY SoCs.</div><div class='del'>-</div><div class='del'>-This node has to be a sub node of the Lantiq RCU block.</div><div class='del'>-</div><div class='del'>--------------------------------------------------------------------------------</div><div class='del'>-Required properties:</div><div class='del'>-- compatible		: Should be one of</div><div class='del'>-				"lantiq,danube-reset"</div><div class='del'>-				"lantiq,xrx200-reset"</div><div class='del'>-- reg			: Defines the following sets of registers in the parent</div><div class='del'>-			  syscon device</div><div class='del'>-			- Offset of the reset set register</div><div class='del'>-			- Offset of the reset status register</div><div class='del'>-- #reset-cells		: Specifies the number of cells needed to encode the</div><div class='del'>-			  reset line, should be 2.</div><div class='del'>-			  The first cell takes the reset set bit and the</div><div class='del'>-			  second cell takes the status bit.</div><div class='del'>-</div><div class='del'>--------------------------------------------------------------------------------</div><div class='del'>-Example for the reset-controllers on the xRX200 SoCs:</div><div class='del'>-	reset0: reset-controller@10 {</div><div class='del'>-		compatible = "lantiq,xrx200-reset";</div><div class='del'>-		reg &lt;0x10 0x04&gt;, &lt;0x14 0x04&gt;;</div><div class='del'>-</div><div class='del'>-		#reset-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.yaml b/Documentation/devicetree/bindings/reset/lantiq,reset.yaml<br/>new file mode 100644<br/>index 000000000000..15d65a5dd631<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/lantiq,reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/lantiq,reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/lantiq,reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Lantiq XWAY SoC RCU reset controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes a reset-controller found on the RCU module on Lantiq</div><div class='add'>+  XWAY SoCs. This node has to be a sub node of the Lantiq RCU block.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - lantiq,danube-reset</div><div class='add'>+      - lantiq,xrx200-reset</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: |</div><div class='add'>+      Defines the following sets of registers in the parent syscon device</div><div class='add'>+      Offset of the reset set register</div><div class='add'>+      Offset of the reset status register</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    description: |</div><div class='add'>+      The first cell takes the reset set bit and the second cell takes the</div><div class='add'>+      status bit.</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // On the xRX200 SoCs:</div><div class='add'>+    reset0: reset-controller@10 {</div><div class='add'>+        compatible = "lantiq,xrx200-reset";</div><div class='add'>+        reg = &lt;0x10 0x04&gt;, &lt;0x14 0x04&gt;;</div><div class='add'>+        #reset-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml b/Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml<br/>new file mode 100644<br/>index 000000000000..dc86568bfd75<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/marvell,berlin2-reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2015 Antoine Tenart &lt;atenart@kernel.org&gt;</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/marvell,berlin2-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Marvell Berlin reset controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Antoine Tenart &lt;atenart@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: The reset controller node must be a sub-node of the chip</div><div class='add'>+  controller node on Berlin SoCs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: marvell,berlin2-reset</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    chip: chip-control@ea0000 {</div><div class='add'>+        reg = &lt;0xea0000 0x400&gt;;</div><div class='add'>+</div><div class='add'>+        chip_rst: reset {</div><div class='add'>+            compatible = "marvell,berlin2-reset";</div><div class='add'>+            #reset-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/microchip,rst.yaml b/Documentation/devicetree/bindings/reset/microchip,rst.yaml<br/>index 578bfa529b16..f2da0693b05a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/microchip,rst.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/microchip,rst.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/microchip,rst.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/microchip,rst.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reset/microchip,rst.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reset/microchip,rst.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microchip Sparx5 Switch Reset Controller</div><div class='ctx'> </div><div class='hunk'>@@ -36,7 +36,7 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   cpu-syscon:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: syscon used to access CPU reset</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -57,4 +57,3 @@ examples:</div><div class='ctx'>         #reset-cells = &lt;1&gt;;</div><div class='ctx'>         cpu-syscon = &lt;&amp;cpu_ctrl&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt<br/>deleted file mode 100644<br/>index 17b7a6a43a29..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-Nuvoton NPCM Reset controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "nuvoton,npcm750-reset" for NPCM7XX BMC</div><div class='del'>-- reg : specifies physical base address and size of the register.</div><div class='del'>-- #reset-cells: must be set to 2</div><div class='del'>-</div><div class='del'>-Optional property:</div><div class='del'>-- nuvoton,sw-reset-number - Contains the software reset number to restart the SoC.</div><div class='del'>-  NPCM7xx contain four software reset that represent numbers 1 to 4.</div><div class='del'>-</div><div class='del'>-  If 'nuvoton,sw-reset-number' is not specified software reset is disabled.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	rstc: rstc@f0801000 {</div><div class='del'>-		compatible = "nuvoton,npcm750-reset";</div><div class='del'>-		reg = &lt;0xf0801000 0x70&gt;;</div><div class='del'>-		#reset-cells = &lt;2&gt;;</div><div class='del'>-		nuvoton,sw-reset-number = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Specifying reset lines connected to IP NPCM7XX modules</div><div class='del'>-======================================================</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-        spi0: spi@..... {</div><div class='del'>-                ...</div><div class='del'>-                resets = &lt;&amp;rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1&gt;;</div><div class='del'>-                ...</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-The index could be found in &lt;dt-bindings/reset/nuvoton,npcm7xx-reset.h&gt;.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml<br/>new file mode 100644<br/>index 000000000000..d82e65e37cc0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/nuvoton,npcm750-reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/nuvoton,npcm750-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Nuvoton NPCM Reset controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tomer Maimon &lt;tmaimon77@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nuvoton,npcm750-reset        # Poleg NPCM7XX SoC</div><div class='add'>+      - nuvoton,npcm845-reset        # Arbel NPCM8XX SoC</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  nuvoton,sysgcr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: a phandle to access GCR registers.</div><div class='add'>+</div><div class='add'>+  nuvoton,sw-reset-number:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 4</div><div class='add'>+    description: |</div><div class='add'>+      Contains the software reset number to restart the SoC.</div><div class='add'>+      If not specified, software reset is disabled.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+  - nuvoton,sysgcr</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/reset/nuvoton,npcm7xx-reset.h&gt;</div><div class='add'>+    rstc: rstc@f0801000 {</div><div class='add'>+        compatible = "nuvoton,npcm750-reset";</div><div class='add'>+        reg = &lt;0xf0801000 0x70&gt;;</div><div class='add'>+        #reset-cells = &lt;2&gt;;</div><div class='add'>+        nuvoton,sysgcr = &lt;&amp;gcr&gt;;</div><div class='add'>+        nuvoton,sw-reset-number = &lt;2&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    // Specifying reset lines connected to IP NPCM7XX modules</div><div class='add'>+    spi0: spi {</div><div class='add'>+        resets = &lt;&amp;rstc NPCM7XX_RESET_IPSRST2 NPCM7XX_RESET_PSPI1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml b/Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml<br/>new file mode 100644<br/>index 000000000000..47f8525a9b38<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/qca,ar7100-reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2015 Alban Bedel &lt;albeu@free.fr&gt;</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/qca,ar7100-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Atheros AR7xxx/AR9XXX reset controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alban Bedel &lt;albeu@free.fr&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qca,ar9132-reset</div><div class='add'>+          - qca,ar9331-reset</div><div class='add'>+      - const: qca,ar7100-reset</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    reset-controller@1806001c {</div><div class='add'>+          compatible = "qca,ar9132-reset", "qca,ar7100-reset";</div><div class='add'>+          reg = &lt;0x1806001c 0x4&gt;;</div><div class='add'>+          #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml<br/>index a054757f4d9f..d92e2b3cc83f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm AOSS Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sibi Sankar &lt;sibis@codeaurora.org&gt;</div><div class='add'>+  - Sibi Sankar &lt;quic_sibis@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The bindings describe the reset-controller found on AOSS-CC (always on</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml b/Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml<br/>index 831ea8d5d83f..ca5d79332189 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm PDC Global</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sibi Sankar &lt;sibis@codeaurora.org&gt;</div><div class='add'>+  - Sibi Sankar &lt;quic_sibis@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The bindings describes the reset-controller found on PDC-Global (Power Domain</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.yaml b/Documentation/devicetree/bindings/reset/renesas,rst.yaml<br/>index bbe313bf1796..e7e487247751 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/renesas,rst.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/renesas,rst.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/renesas,rst.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/renesas,rst.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/reset/renesas,rst.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/reset/renesas,rst.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas R-Car and RZ/G Reset Controller</div><div class='ctx'> </div><div class='hunk'>@@ -49,6 +49,7 @@ properties:</div><div class='ctx'>       - renesas,r8a77995-rst      # R-Car D3</div><div class='ctx'>       - renesas,r8a779a0-rst      # R-Car V3U</div><div class='ctx'>       - renesas,r8a779f0-rst      # R-Car S4-8</div><div class='add'>+      - renesas,r8a779g0-rst      # R-Car V4H</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml<br/>index 86c2569ced97..731b8ce01525 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml</a></div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL</div><div class='ctx'>           - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}</div><div class='ctx'>           - renesas,r9a07g054-usbphy-ctrl # RZ/V2L</div><div class='ctx'>       - const: renesas,rzg2l-usbphy-ctrl</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt b/Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt<br/>deleted file mode 100644<br/>index 32d8435a41df..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-Binding for the AXS10x reset controller</div><div class='del'>-</div><div class='del'>-This binding describes the ARC AXS10x boards custom IP-block which allows</div><div class='del'>-to control reset signals of selected peripherals. For example DW GMAC, etc...</div><div class='del'>-This block is controlled via memory-mapped register (AKA CREG) which</div><div class='del'>-represents up-to 32 reset lines.</div><div class='del'>-</div><div class='del'>-As of today only the following lines are used:</div><div class='del'>- - DW GMAC - line 5</div><div class='del'>-</div><div class='del'>-This binding uses the common reset binding[1].</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/reset/reset.txt</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "snps,axs10x-reset".</div><div class='del'>-- reg: should always contain pair address - length: for creg reset</div><div class='del'>-  bits register.</div><div class='del'>-- #reset-cells: from common reset binding; Should always be set to 1.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	reset: reset-controller@11220 {</div><div class='del'>-		compatible = "snps,axs10x-reset";</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-		reg = &lt;0x11220 0x4&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Specifying reset lines connected to IP modules:</div><div class='del'>-	ethernet@.... {</div><div class='del'>-		....</div><div class='del'>-		resets = &lt;&amp;reset 5&gt;;</div><div class='del'>-		....</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml b/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml<br/>new file mode 100644<br/>index 000000000000..a75db3d405af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/snps,axs10x-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: AXS10x reset controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Eugeniy Paltsev &lt;Eugeniy.Paltsev@synopsys.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes the ARC AXS10x boards custom IP-block which allows</div><div class='add'>+  to control reset signals of selected peripherals. For example DW GMAC, etc...</div><div class='add'>+  This block is controlled via memory-mapped register (AKA CREG) which</div><div class='add'>+  represents up-to 32 reset lines.</div><div class='add'>+  As of today only the following lines are used:</div><div class='add'>+   - DW GMAC - line 5</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: snps,axs10x-reset</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    reset: reset-controller@11220 {</div><div class='add'>+        compatible = "snps,axs10x-reset";</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+        reg = &lt;0x11220 0x4&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    // Specifying reset lines connected to IP modules:</div><div class='add'>+    ethernet {</div><div class='add'>+        resets = &lt;&amp;reset 5&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/socfpga-reset.txt b/Documentation/devicetree/bindings/reset/socfpga-reset.txt<br/>deleted file mode 100644<br/>index 38fe34fd8b8a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/socfpga-reset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/socfpga-reset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-Altera SOCFPGA Reset Manager</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "altr,rst-mgr" for (Cyclone5/Arria5/Arria10)</div><div class='del'>-	       "altr,stratix10-rst-mgr","altr,rst-mgr" for Stratix10 ARM64 SoC</div><div class='del'>-- reg : Should contain 1 register ranges(address and length)</div><div class='del'>-- altr,modrst-offset : Should contain the offset of the first modrst register.</div><div class='del'>-- #reset-cells: 1</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	 rstmgr@ffd05000 {</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-		compatible = "altr,rst-mgr";</div><div class='del'>-		reg = &lt;0xffd05000 0x1000&gt;;</div><div class='del'>-		altr,modrst-offset = &lt;0x10&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml b/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml<br/>index bfbd3e9b4186..fa253c518d79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml</a></div><div class='hunk'>@@ -38,25 +38,49 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  clock-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:           # for Pro4, Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - items:           # for others</div><div class='del'>-          - const: link</div><div class='add'>+  clock-names: true</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  reset-names:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:           # for Pro4, Pro5</div><div class='del'>-          - const: gio</div><div class='del'>-          - const: link</div><div class='del'>-      - items:           # for others</div><div class='del'>-          - const: link</div><div class='add'>+  reset-names: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - socionext,uniphier-pro4-usb3-reset</div><div class='add'>+              - socionext,uniphier-pro5-usb3-reset</div><div class='add'>+              - socionext,uniphier-pro4-ahci-reset</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: gio</div><div class='add'>+            - const: link</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          const: link</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          const: link</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -71,19 +95,12 @@ required:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    usb-glue@65b00000 {</div><div class='del'>-        compatible = "simple-mfd";</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges = &lt;0 0x65b00000 0x400&gt;;</div><div class='del'>-</div><div class='del'>-        usb_rst: reset@0 {</div><div class='del'>-            compatible = "socionext,uniphier-ld20-usb3-reset";</div><div class='del'>-            reg = &lt;0x0 0x4&gt;;</div><div class='del'>-            #reset-cells = &lt;1&gt;;</div><div class='del'>-            clock-names = "link";</div><div class='del'>-            clocks = &lt;&amp;sys_clk 14&gt;;</div><div class='del'>-            reset-names = "link";</div><div class='del'>-            resets = &lt;&amp;sys_rst 14&gt;;</div><div class='del'>-        };</div><div class='add'>+    usb_rst: reset-controller@0 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-usb3-reset";</div><div class='add'>+        reg = &lt;0x0 0x4&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+        clock-names = "link";</div><div class='add'>+        clocks = &lt;&amp;sys_clk 14&gt;;</div><div class='add'>+        reset-names = "link";</div><div class='add'>+        resets = &lt;&amp;sys_rst 14&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml b/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml<br/>index 377a7d242323..033b252a3dfe 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml</a></div><div class='hunk'>@@ -55,6 +55,9 @@ properties:</div><div class='ctx'>   "#reset-cells":</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -63,53 +66,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    sysctrl@61840000 {</div><div class='del'>-        compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x61840000 0x4000&gt;;</div><div class='del'>-</div><div class='del'>-        reset {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-reset";</div><div class='del'>-            #reset-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        // other nodes ...</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    mioctrl@59810000 {</div><div class='del'>-        compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x59810000 0x800&gt;;</div><div class='del'>-</div><div class='del'>-        reset {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-mio-reset";</div><div class='del'>-            #reset-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        // other nodes ...</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    perictrl@59820000 {</div><div class='del'>-        compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x59820000 0x200&gt;;</div><div class='del'>-</div><div class='del'>-        reset {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-peri-reset";</div><div class='del'>-            #reset-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        // other nodes ...</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    adamv@57920000 {</div><div class='del'>-        compatible = "socionext,uniphier-ld11-adamv", "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x57920000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-        reset {</div><div class='del'>-            compatible = "socionext,uniphier-ld11-adamv-reset";</div><div class='del'>-            #reset-cells = &lt;1&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        // other nodes ...</div><div class='add'>+    reset-controller {</div><div class='add'>+        compatible = "socionext,uniphier-ld11-reset";</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt b/Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt<br/>deleted file mode 100644<br/>index 9ca27761f811..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/st,sti-picophyreset.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-STMicroelectronics STi family Sysconfig Picophy SoftReset Controller</div><div class='del'>-=============================================================================</div><div class='del'>-</div><div class='del'>-This binding describes a reset controller device that is used to enable and</div><div class='del'>-disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in</div><div class='del'>-the STi family SoC system configuration registers.</div><div class='del'>-</div><div class='del'>-The actual action taken when softreset is asserted is hardware dependent.</div><div class='del'>-However, when asserted it may not be possible to access the hardware's</div><div class='del'>-registers and after an assert/deassert sequence the hardware's previous state</div><div class='del'>-may no longer be valid.</div><div class='del'>-</div><div class='del'>-Please refer to Documentation/devicetree/bindings/reset/reset.txt</div><div class='del'>-for common reset controller binding usage.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "st,stih407-picophyreset"</div><div class='del'>-- #reset-cells: 1, see below</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	picophyreset: picophyreset-controller {</div><div class='del'>-		compatible = "st,stih407-picophyreset";</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Specifying picophyreset control of devices</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-Device nodes should specify the reset channel required in their "resets"</div><div class='del'>-property, containing a phandle to the picophyreset device node and an</div><div class='del'>-index specifying which channel to use, as described in</div><div class='del'>-Documentation/devicetree/bindings/reset/reset.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	usb2_picophy0: usbpicophy@0 {</div><div class='del'>-		resets = &lt;&amp;picophyreset STIH407_PICOPHY0_RESET&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Macro definitions for the supported reset channels can be found in:</div><div class='del'>-include/dt-bindings/reset/stih407-resets.h</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt b/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt<br/>deleted file mode 100644<br/>index 92527138bc93..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/st,sti-powerdown.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/st,sti-powerdown.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,45 +0,0 @@</div><div class='del'>-STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller</div><div class='del'>-=============================================================================</div><div class='del'>-</div><div class='del'>-This binding describes a reset controller device that is used to enable and</div><div class='del'>-disable on-chip peripheral controllers such as USB and SATA, using</div><div class='del'>-"powerdown" control bits found in the STi family SoC system configuration</div><div class='del'>-registers. These have been grouped together into a single reset controller</div><div class='del'>-device for convenience.</div><div class='del'>-</div><div class='del'>-The actual action taken when powerdown is asserted is hardware dependent.</div><div class='del'>-However, when asserted it may not be possible to access the hardware's</div><div class='del'>-registers and after an assert/deassert sequence the hardware's previous state</div><div class='del'>-may no longer be valid.</div><div class='del'>-</div><div class='del'>-Please refer to reset.txt in this directory for common reset</div><div class='del'>-controller binding usage.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be "st,stih407-powerdown"</div><div class='del'>-- #reset-cells: 1, see below</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-	powerdown: powerdown-controller {</div><div class='del'>-		compatible = "st,stih407-powerdown";</div><div class='del'>-		#reset-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Specifying powerdown control of devices</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-Device nodes should specify the reset channel required in their "resets"</div><div class='del'>-property, containing a phandle to the powerdown device node and an</div><div class='del'>-index specifying which channel to use, as described in reset.txt</div><div class='del'>-</div><div class='del'>-example:</div><div class='del'>-</div><div class='del'>-	st_dwc3: dwc3@8f94000 {</div><div class='del'>-		resets          = &lt;&amp;powerdown STIH407_USB3_POWERDOWN&gt;,</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Macro definitions for the supported reset channels can be found in:</div><div class='del'>-</div><div class='del'>-include/dt-bindings/reset/stih407-resets.h</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml b/Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml<br/>new file mode 100644<br/>index 000000000000..329ae4ae1a10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/st,stih407-picophyreset.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/st,stih407-picophyreset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics STi family Sysconfig Picophy SoftReset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Peter Griffin &lt;peter.griffin@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes a reset controller device that is used to enable and</div><div class='add'>+  disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in</div><div class='add'>+  the STi family SoC system configuration registers.</div><div class='add'>+</div><div class='add'>+  The actual action taken when softreset is asserted is hardware dependent.</div><div class='add'>+  However, when asserted it may not be possible to access the hardware's</div><div class='add'>+  registers and after an assert/deassert sequence the hardware's previous state</div><div class='add'>+  may no longer be valid.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stih407-picophyreset</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/reset/stih407-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    picophyreset: picophyreset-controller {</div><div class='add'>+        compatible = "st,stih407-picophyreset";</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    // Specifying picophyreset control of devices</div><div class='add'>+    usb2_picophy0: usbpicophy {</div><div class='add'>+        resets = &lt;&amp;picophyreset STIH407_PICOPHY0_RESET&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml b/Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml<br/>new file mode 100644<br/>index 000000000000..d3790e602659<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/st,stih407-powerdown.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@st.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes a reset controller device that is used to enable and</div><div class='add'>+  disable on-chip peripheral controllers such as USB and SATA, using</div><div class='add'>+  "powerdown" control bits found in the STi family SoC system configuration</div><div class='add'>+  registers. These have been grouped together into a single reset controller</div><div class='add'>+  device for convenience.</div><div class='add'>+</div><div class='add'>+  The actual action taken when powerdown is asserted is hardware dependent.</div><div class='add'>+  However, when asserted it may not be possible to access the hardware's</div><div class='add'>+  registers and after an assert/deassert sequence the hardware's previous state</div><div class='add'>+  may no longer be valid.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stih407-powerdown</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#reset-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/reset/stih407-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    powerdown: powerdown-controller {</div><div class='add'>+        compatible = "st,stih407-powerdown";</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    // Specifying powerdown control of devices:</div><div class='add'>+    st_dwc3: dwc3 {</div><div class='add'>+        resets = &lt;&amp;powerdown STIH407_USB3_POWERDOWN&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml b/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml<br/>index 300359a5e14b..2f5bd616b7ae 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reset/starfive,jh7100-reset.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: StarFive JH7100 SoC Reset Controller Device Tree Bindings</div><div class='add'>+title: StarFive JH7100 SoC Reset Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Emil Renner Berthing &lt;kernel@esmil.dk&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/sunplus,reset.yaml b/Documentation/devicetree/bindings/reset/sunplus,reset.yaml<br/>new file mode 100644<br/>index 000000000000..205918ce324c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/sunplus,reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/sunplus,reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/sunplus,reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SoC Reset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Qin Jian &lt;qinjian@cqplus1.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sunplus,sp7021-reset</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rstc: reset@9c000054 {</div><div class='add'>+      compatible = "sunplus,sp7021-reset";</div><div class='add'>+      reg = &lt;0x9c000054 0x28&gt;;</div><div class='add'>+      #reset-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml b/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml<br/>index 4639d2cec557..dcf9206e12be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/reset/ti,sci-reset.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/ti,sci-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/ti,sci-reset.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/reset/ti,sci-reset.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI-SCI reset controller node bindings</div><div class='add'>+title: TI-SCI reset controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nishanth Menon &lt;nm@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml b/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml<br/>new file mode 100644<br/>index 000000000000..f436f2cf1df7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/reset/ti,tps380x-reset.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/reset/ti,tps380x-reset.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI TPS380x reset controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Marco Felsch &lt;kernel@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The TPS380x family [1] of supervisory circuits monitor supply voltages to</div><div class='add'>+  provide circuit initialization and timing supervision. The devices assert a</div><div class='add'>+  RESET signal if the voltage drops below a preset threshold or upon a manual</div><div class='add'>+  reset input (MR). The RESET output remains asserted for the factory</div><div class='add'>+  programmed delay after the voltage return above its threshold or after the</div><div class='add'>+  manual reset input is released.</div><div class='add'>+</div><div class='add'>+  [1] https://www.ti.com/product/TPS3801</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,tps3801</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Reference to the GPIO connected to the MR pin.</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    reset: reset-controller {</div><div class='add'>+        compatible = "ti,tps3801";</div><div class='add'>+        #reset-cells = &lt;0&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio3 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml<br/>index d632ac76532e..3d2934b15e80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/cpus.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/cpus.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/cpus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/riscv/cpus.yaml</a></div><div class='hunk'>@@ -4,11 +4,12 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/riscv/cpus.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: RISC-V bindings for 'cpus' DT nodes</div><div class='add'>+title: RISC-V CPUs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Walmsley &lt;paul.walmsley@sifive.com&gt;</div><div class='ctx'>   - Palmer Dabbelt &lt;palmer@sifive.com&gt;</div><div class='add'>+  - Conor Dooley &lt;conor@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This document uses some terminology common to the RISC-V community</div><div class='hunk'>@@ -27,17 +28,21 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - sifive,rocket0</div><div class='add'>+              - andestech,ax45mp</div><div class='add'>+              - canaan,k210</div><div class='ctx'>               - sifive,bullet0</div><div class='ctx'>               - sifive,e5</div><div class='ctx'>               - sifive,e7</div><div class='ctx'>               - sifive,e71</div><div class='del'>-              - sifive,u74-mc</div><div class='del'>-              - sifive,u54</div><div class='del'>-              - sifive,u74</div><div class='add'>+              - sifive,rocket0</div><div class='add'>+              - sifive,s7</div><div class='ctx'>               - sifive,u5</div><div class='add'>+              - sifive,u54</div><div class='ctx'>               - sifive,u7</div><div class='del'>-              - canaan,k210</div><div class='add'>+              - sifive,u74</div><div class='add'>+              - sifive,u74-mc</div><div class='add'>+              - thead,c906</div><div class='add'>+              - thead,c910</div><div class='ctx'>           - const: riscv</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -61,8 +66,19 @@ properties:</div><div class='ctx'>       - riscv,sv32</div><div class='ctx'>       - riscv,sv39</div><div class='ctx'>       - riscv,sv48</div><div class='add'>+      - riscv,sv57</div><div class='ctx'>       - riscv,none</div><div class='ctx'> </div><div class='add'>+  riscv,cbom-block-size:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The blocksize in bytes for the Zicbom cache operations.</div><div class='add'>+</div><div class='add'>+  riscv,cboz-block-size:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The blocksize in bytes for the Zicboz cache operations.</div><div class='add'>+</div><div class='ctx'>   riscv,isa:</div><div class='ctx'>     description:</div><div class='ctx'>       Identifies the specific RISC-V instruction set architecture</div><div class='hunk'>@@ -70,13 +86,17 @@ properties:</div><div class='ctx'>       User-Level ISA document, available from</div><div class='ctx'>       https://riscv.org/specifications/</div><div class='ctx'> </div><div class='add'>+      Due to revisions of the ISA specification, some deviations</div><div class='add'>+      have arisen over time.</div><div class='add'>+      Notably, riscv,isa was defined prior to the creation of the</div><div class='add'>+      Zicsr and Zifencei extensions and thus "i" implies</div><div class='add'>+      "zicsr_zifencei".</div><div class='add'>+</div><div class='ctx'>       While the isa strings in ISA specification are case</div><div class='ctx'>       insensitive, letters in the riscv,isa string must be all</div><div class='ctx'>       lowercase to simplify parsing.</div><div class='ctx'>     $ref: "/schemas/types.yaml#/definitions/string"</div><div class='del'>-    enum:</div><div class='del'>-      - rv64imac</div><div class='del'>-      - rv64imafdc</div><div class='add'>+    pattern: ^rv(?:64|32)imaf?d?q?c?b?k?j?p?v?h?(?:[hsxz](?:[a-z])+)?(?:_[hsxz](?:[a-z])+)*$</div><div class='ctx'> </div><div class='ctx'>   # RISC-V requires 'timebase-frequency' in /cpus, so disallow it here</div><div class='ctx'>   timebase-frequency: false</div><div class='hunk'>@@ -107,6 +127,12 @@ properties:</div><div class='ctx'>       List of phandles to idle state nodes supported</div><div class='ctx'>       by this hart (see ./idle-states.yaml).</div><div class='ctx'> </div><div class='add'>+  capacity-dmips-mhz:</div><div class='add'>+    description:</div><div class='add'>+      u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in</div><div class='add'>+      DMIPS/MHz, relative to highest capacity-dmips-mhz</div><div class='add'>+      in the system.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - riscv,isa</div><div class='ctx'>   - interrupt-controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml<br/>index 3f981e897126..4a29c890619a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/microchip.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/microchip.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/microchip.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/riscv/microchip.yaml</a></div><div class='hunk'>@@ -4,11 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/riscv/microchip.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip PolarFire SoC-based boards device tree bindings</div><div class='add'>+title: Microchip PolarFire SoC-based boards</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Cyril Jean &lt;Cyril.Jean@microchip.com&gt;</div><div class='del'>-  - Lewis Hanly &lt;lewis.hanly@microchip.com&gt;</div><div class='add'>+  - Conor Dooley &lt;conor.dooley@microchip.com&gt;</div><div class='add'>+  - Daire McNamara &lt;daire.mcnamara@microchip.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   Microchip PolarFire SoC-based boards</div><div class='hunk'>@@ -17,10 +17,21 @@ properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     const: '/'</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - microchip,mpfs-icicle-kit</div><div class='del'>-      - const: microchip,mpfs</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - microchip,mpfs-icicle-reference-rtlv2203</div><div class='add'>+              - microchip,mpfs-icicle-reference-rtlv2210</div><div class='add'>+          - const: microchip,mpfs-icicle-kit</div><div class='add'>+          - const: microchip,mpfs</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - aldec,tysom-m-mpfs250t-rev2</div><div class='add'>+              - aries,m100pfsevp</div><div class='add'>+              - microchip,mpfs-sev-kit</div><div class='add'>+              - sundance,polarberry</div><div class='add'>+          - const: microchip,mpfs</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml<br/>deleted file mode 100644<br/>index e2d330bd4608..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,123 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-# Copyright (C) 2020 SiFive, Inc.</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: SiFive L2 Cache Controller</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Sagar Kadam &lt;sagar.kadam@sifive.com&gt;</div><div class='del'>-  - Paul Walmsley  &lt;paul.walmsley@sifive.com&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  The SiFive Level 2 Cache Controller is used to provide access to fast copies</div><div class='del'>-  of memory for masters in a Core Complex. The Level 2 Cache Controller also</div><div class='del'>-  acts as directory-based coherency manager.</div><div class='del'>-  All the properties in ePAPR/DeviceTree specification applies for this platform.</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/cache-controller.yaml#</div><div class='del'>-</div><div class='del'>-select:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - sifive,fu540-c000-ccache</div><div class='del'>-          - sifive,fu740-c000-ccache</div><div class='del'>-</div><div class='del'>-  required:</div><div class='del'>-    - compatible</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - sifive,fu540-c000-ccache</div><div class='del'>-          - sifive,fu740-c000-ccache</div><div class='del'>-      - const: cache</div><div class='del'>-</div><div class='del'>-  cache-block-size:</div><div class='del'>-    const: 64</div><div class='del'>-</div><div class='del'>-  cache-level:</div><div class='del'>-    const: 2</div><div class='del'>-</div><div class='del'>-  cache-sets:</div><div class='del'>-    const: 1024</div><div class='del'>-</div><div class='del'>-  cache-size:</div><div class='del'>-    const: 2097152</div><div class='del'>-</div><div class='del'>-  cache-unified: true</div><div class='del'>-</div><div class='del'>-  interrupts:</div><div class='del'>-    minItems: 3</div><div class='del'>-    items:</div><div class='del'>-      - description: DirError interrupt</div><div class='del'>-      - description: DataError interrupt</div><div class='del'>-      - description: DataFail interrupt</div><div class='del'>-      - description: DirFail interrupt</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  next-level-cache: true</div><div class='del'>-</div><div class='del'>-  memory-region:</div><div class='del'>-    maxItems: 1</div><div class='del'>-    description: |</div><div class='del'>-      The reference to the reserved-memory for the L2 Loosely Integrated Memory region.</div><div class='del'>-      The reserved memory node should be defined as per the bindings in reserved-memory.txt.</div><div class='del'>-</div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: sifive,fu540-c000-ccache</div><div class='del'>-</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    interrupts:</div><div class='del'>-      description: |</div><div class='del'>-        Must contain entries for DirError, DataError and DataFail signals.</div><div class='del'>-      maxItems: 3</div><div class='del'>-</div><div class='del'>-else:</div><div class='del'>-  properties:</div><div class='del'>-    interrupts:</div><div class='del'>-      description: |</div><div class='del'>-        Must contain entries for DirError, DataError, DataFail, DirFail signals.</div><div class='del'>-      minItems: 4</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - cache-block-size</div><div class='del'>-  - cache-level</div><div class='del'>-  - cache-sets</div><div class='del'>-  - cache-size</div><div class='del'>-  - cache-unified</div><div class='del'>-  - interrupts</div><div class='del'>-  - reg</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-    cache-controller@2010000 {</div><div class='del'>-        compatible = "sifive,fu540-c000-ccache", "cache";</div><div class='del'>-        cache-block-size = &lt;64&gt;;</div><div class='del'>-        cache-level = &lt;2&gt;;</div><div class='del'>-        cache-sets = &lt;1024&gt;;</div><div class='del'>-        cache-size = &lt;2097152&gt;;</div><div class='del'>-        cache-unified;</div><div class='del'>-        reg = &lt;0x2010000 0x1000&gt;;</div><div class='del'>-        interrupt-parent = &lt;&amp;plic0&gt;;</div><div class='del'>-        interrupts = &lt;1&gt;,</div><div class='del'>-                     &lt;2&gt;,</div><div class='del'>-                     &lt;3&gt;;</div><div class='del'>-        next-level-cache = &lt;&amp;L25&gt;;</div><div class='del'>-        memory-region = &lt;&amp;l2_lim&gt;;</div><div class='del'>-    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/riscv/starfive.yaml b/Documentation/devicetree/bindings/riscv/starfive.yaml<br/>index 5b36243fd674..cc4d92f0a1bf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/starfive.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/riscv/starfive.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/starfive.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/riscv/starfive.yaml</a></div><div class='hunk'>@@ -19,9 +19,17 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='del'>-          - const: beagle,beaglev-starlight-jh7100-r0</div><div class='add'>+          - enum:</div><div class='add'>+              - beagle,beaglev-starlight-jh7100-r0</div><div class='add'>+              - starfive,visionfive-v1</div><div class='ctx'>           - const: starfive,jh7100</div><div class='ctx'> </div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - starfive,visionfive-2-v1.2a</div><div class='add'>+              - starfive,visionfive-2-v1.3b</div><div class='add'>+          - const: starfive,jh7110</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/riscv/sunxi.yaml b/Documentation/devicetree/bindings/riscv/sunxi.yaml<br/>new file mode 100644<br/>index 000000000000..b36e313e13a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/riscv/sunxi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/riscv/sunxi.yaml</a></div><div class='hunk'>@@ -0,0 +1,74 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/riscv/sunxi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner RISC-V SoC-based boards</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='add'>+  - Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;</div><div class='add'>+  - Samuel Holland &lt;samuel@sholland.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Allwinner RISC-V SoC-based boards</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    const: '/'</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: Dongshan Nezha STU SoM</div><div class='add'>+        items:</div><div class='add'>+          - const: 100ask,dongshan-nezha-stu</div><div class='add'>+          - const: allwinner,sun20i-d1</div><div class='add'>+</div><div class='add'>+      - description: D1 Nezha board</div><div class='add'>+        items:</div><div class='add'>+          - const: allwinner,d1-nezha</div><div class='add'>+          - const: allwinner,sun20i-d1</div><div class='add'>+</div><div class='add'>+      - description: ClockworkPi R-01 SoM and v3.14 board</div><div class='add'>+        items:</div><div class='add'>+          - const: clockwork,r-01-clockworkpi-v3.14</div><div class='add'>+          - const: allwinner,sun20i-d1</div><div class='add'>+</div><div class='add'>+      - description: ClockworkPi R-01 SoM, v3.14 board, and DevTerm expansion</div><div class='add'>+        items:</div><div class='add'>+          - const: clockwork,r-01-devterm-v3.14</div><div class='add'>+          - const: clockwork,r-01-clockworkpi-v3.14</div><div class='add'>+          - const: allwinner,sun20i-d1</div><div class='add'>+</div><div class='add'>+      - description: Lichee RV SoM</div><div class='add'>+        items:</div><div class='add'>+          - const: sipeed,lichee-rv</div><div class='add'>+          - const: allwinner,sun20i-d1</div><div class='add'>+</div><div class='add'>+      - description: Carrier boards for the Lichee RV SoM</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sipeed,lichee-rv-86-panel-480p</div><div class='add'>+              - sipeed,lichee-rv-86-panel-720p</div><div class='add'>+              - sipeed,lichee-rv-dock</div><div class='add'>+          - const: sipeed,lichee-rv</div><div class='add'>+          - const: allwinner,sun20i-d1</div><div class='add'>+</div><div class='add'>+      - description: MangoPi MQ board</div><div class='add'>+        items:</div><div class='add'>+          - const: widora,mangopi-mq</div><div class='add'>+          - const: allwinner,sun20i-d1s</div><div class='add'>+</div><div class='add'>+      - description: MangoPi MQ Pro board</div><div class='add'>+        items:</div><div class='add'>+          - const: widora,mangopi-mq-pro</div><div class='add'>+          - const: allwinner,sun20i-d1</div><div class='add'>+</div><div class='add'>+      - description: MangoPi MQ-R board</div><div class='add'>+        items:</div><div class='add'>+          - const: widora,mangopi-mq-r-f133</div><div class='add'>+          - const: allwinner,sun20i-d1s</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml<br/>index 444be32a8a29..457a6e43d810 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/rng/amlogic,meson-rng.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/rng/amlogic,meson-rng.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson Random number generator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml b/Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml<br/>index a00e9bc8b609..827983008ecf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/brcm,iproc-rng200.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/rng/brcm,iproc-rng200.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/rng/brcm,iproc-rng200.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: HWRNG support for the iproc-rng200 driver</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/ingenic,rng.yaml b/Documentation/devicetree/bindings/rng/ingenic,rng.yaml<br/>index b2e4a6a7f93a..79a023cbfdba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/ingenic,rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/ingenic,rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/ingenic,rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/ingenic,rng.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rng/ingenic,rng.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for RNG in Ingenic SoCs</div><div class='add'>+title: RNG in Ingenic SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/ingenic,trng.yaml b/Documentation/devicetree/bindings/rng/ingenic,trng.yaml<br/>index 044d9a065650..acaeb63caf24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/ingenic,trng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/ingenic,trng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/ingenic,trng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/ingenic,trng.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rng/ingenic,trng.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for DTRNG in Ingenic SoCs</div><div class='add'>+title: DTRNG in Ingenic SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml b/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml<br/>index 61963fa9347e..9f7590ce6b3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/intel,ixp46x-rng.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rng/intel,ixp46x-rng.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel IXP46x RNG bindings</div><div class='add'>+title: Intel IXP46x RNG</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Intel IXP46x has a random number generator at a fixed physical</div><div class='hunk'>@@ -33,4 +33,3 @@ examples:</div><div class='ctx'>       compatible = "intel,ixp46x-rng";</div><div class='ctx'>       reg = &lt;0x70002100 4&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/mtk-rng.yaml b/Documentation/devicetree/bindings/rng/mtk-rng.yaml<br/>index bb32491ee8ae..7e8dc62e5d3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/mtk-rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/mtk-rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/mtk-rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/mtk-rng.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/rng/mtk-rng.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/rng/mtk-rng.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek Random number generator</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml b/Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml<br/>index abd134c9d400..e8e4ab1e5b95 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/nuvoton,npcm-rng.yaml</a></div><div class='hunk'>@@ -16,7 +16,9 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: nuvoton,npcm750-rng</div><div class='add'>+    enum:</div><div class='add'>+      - nuvoton,npcm750-rng</div><div class='add'>+      - nuvoton,npcm845-rng</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/omap_rng.yaml b/Documentation/devicetree/bindings/rng/omap_rng.yaml<br/>index 010188cdbec8..ccf54fae8302 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/omap_rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/omap_rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/omap_rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/omap_rng.yaml</a></div><div class='hunk'>@@ -53,17 +53,6 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - interrupts</div><div class='ctx'> </div><div class='del'>-  - if:</div><div class='del'>-      properties:</div><div class='del'>-        compatible:</div><div class='del'>-          contains:</div><div class='del'>-            enum:</div><div class='del'>-              - inside-secure,safexcel-eip76</div><div class='del'>-</div><div class='del'>-    then:</div><div class='del'>-      required:</div><div class='del'>-        - clocks</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml b/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml<br/>index a50c34d5d199..765d9f9edd6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/samsung,exynos5250-trng.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC True Random Number Generator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Łukasz Stelmach &lt;l.stelmach@samsung.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml b/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml<br/>index 48ab82abf50e..4673d6160ad9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/silex-insight,ba431-rng.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rng/silex-insight,ba431-rng.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Silex Insight BA431 RNG bindings</div><div class='add'>+title: Silex Insight BA431 RNG</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The BA431 hardware random number generator is an IP that is FIPS-140-2/3</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml b/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml<br/>index 9a6e4eaf4d3c..187b172d0cca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/st,stm32-rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/st,stm32-rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/st,stm32-rng.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rng/st,stm32-rng.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 RNG bindings</div><div class='add'>+title: STMicroelectronics STM32 RNG</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The STM32 hardware random number generator is a simple fixed purpose</div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clock-error-detect:</div><div class='add'>+    type: boolean</div><div class='ctx'>     description: If set enable the clock detection management</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml b/Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml<br/>new file mode 100644<br/>index 000000000000..2b76ce25acc4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/starfive,jh7110-trng.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rng/starfive,jh7110-trng.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive SoC TRNG Module</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jia Jie Ho &lt;jiajie.ho@starfivetech.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: starfive,jh7110-trng</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Hardware reference clock</div><div class='add'>+      - description: AHB reference clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hclk</div><div class='add'>+      - const: ahb</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rng: rng@1600C000 {</div><div class='add'>+        compatible = "starfive,jh7110-trng";</div><div class='add'>+        reg = &lt;0x1600C000 0x4000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk 15&gt;, &lt;&amp;clk 16&gt;;</div><div class='add'>+        clock-names = "hclk", "ahb";</div><div class='add'>+        resets = &lt;&amp;reset 3&gt;;</div><div class='add'>+        interrupts = &lt;30&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml b/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml<br/>index e749818fc193..06a6791b3356 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/ti,keystone-rng.yaml</a></div><div class='hunk'>@@ -25,7 +25,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   ti,syscon-sa-cfg:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: |</div><div class='ctx'>       Phandle to syscon node of the SA configuration registers.  These</div><div class='ctx'>       registers are shared between HWRNG and crypto drivers.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml b/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml<br/>index 84bf518a5549..4754174e9849 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/timeriomem_rng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/timeriomem_rng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/timeriomem_rng.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: TimerIO Random Number Generator</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml b/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml<br/>index 1e17e55762f1..d83132291170 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rng/xiphera,xip8001b-trng.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rng/xiphera,xip8001b-trng.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xiphera XIP8001B-trng bindings</div><div class='add'>+title: Xiphera XIP8001B-trng</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Atte Tommiska &lt;atte.tommiska@xiphera.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml<br/>index 478b0234e8fa..054e1e397fc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/allwinner,sun4i-a10-rtc.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/allwinner,sun4i-a10-rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 RTC Device Tree Bindings</div><div class='add'>+title: Allwinner A10 RTC</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml<br/>index 0b767fec39d8..4531eec568a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/allwinner,sun6i-a31-rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 RTC Device Tree Bindings</div><div class='add'>+title: Allwinner A31 RTC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -61,7 +61,7 @@ properties:</div><div class='ctx'>         - the Internal Oscillator, at index 2.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -71,7 +71,6 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clock-output-names:</div><div class='del'>-          minItems: 1</div><div class='ctx'>           maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='hunk'>@@ -102,7 +101,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clock-output-names:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -113,16 +111,12 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='del'>-          minItems: 3</div><div class='del'>-          maxItems: 3</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Bus clock for register access</div><div class='ctx'>             - description: 24 MHz oscillator</div><div class='ctx'>             - description: 32 kHz clock from the CCU</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='del'>-          minItems: 3</div><div class='del'>-          maxItems: 3</div><div class='ctx'>           items:</div><div class='ctx'>             - const: bus</div><div class='ctx'>             - const: hosc</div><div class='hunk'>@@ -142,7 +136,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - description: Bus clock for register access</div><div class='ctx'>             - description: 24 MHz oscillator</div><div class='hunk'>@@ -151,7 +144,6 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 3</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - const: bus</div><div class='ctx'>             - const: hosc</div><div class='hunk'>@@ -174,14 +166,12 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='del'>-          minItems: 1</div><div class='ctx'>           maxItems: 1</div><div class='ctx'> </div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#clock-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/amlogic,meson-vrtc.yaml b/Documentation/devicetree/bindings/rtc/amlogic,meson-vrtc.yaml<br/>new file mode 100644<br/>index 000000000000..a89865fa676a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/amlogic,meson-vrtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/amlogic,meson-vrtc.yaml</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/amlogic,meson-vrtc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Virtual RTC (VRTC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This is a Linux interface to an RTC managed by firmware, hence it's</div><div class='add'>+  virtual from a Linux perspective.  The interface is 1 register where</div><div class='add'>+  an alarm time (in seconds) is to be written.</div><div class='add'>+  The alarm register is a simple scratch register shared between the</div><div class='add'>+  application processors (AP) and the secure co-processor (SCP.)  When</div><div class='add'>+  the AP suspends, the SCP will use the value of this register to</div><div class='add'>+  program an always-on timer before going sleep. When the timer expires,</div><div class='add'>+  the SCP will wake up and will then wake the AP.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson-vrtc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rtc@a8 {</div><div class='add'>+      compatible = "amlogic,meson-vrtc";</div><div class='add'>+      reg = &lt;0x000a8 0x4&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/amlogic,meson6-rtc.yaml b/Documentation/devicetree/bindings/rtc/amlogic,meson6-rtc.yaml<br/>new file mode 100644<br/>index 000000000000..8bf7d3a9be98<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/amlogic,meson6-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/amlogic,meson6-rtc.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/amlogic,meson6-rtc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson6, Meson8, Meson8b and Meson8m2 RTC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+  - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+  - $ref: /schemas/nvmem/nvmem.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson6-rtc</div><div class='add'>+      - amlogic,meson8-rtc</div><div class='add'>+      - amlogic,meson8b-rtc</div><div class='add'>+      - amlogic,meson8m2-rtc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    rtc: rtc@740 {</div><div class='add'>+        compatible = "amlogic,meson6-rtc";</div><div class='add'>+        reg = &lt;0x740 0x14&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 72 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        clocks = &lt;&amp;rtc32k_xtal&gt;;</div><div class='add'>+        vdd-supply = &lt;&amp;rtc_vdd&gt;;</div><div class='add'>+        resets = &lt;&amp;reset_rtc&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        mac@0 {</div><div class='add'>+            reg = &lt;0 6&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml<br/>index 994de43d17fa..4d2bef15fb7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/atmel,at91rm9200-rtc.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/atmel,at91rm9200-rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Atmel AT91 RTC Device Tree Bindings</div><div class='add'>+title: Atmel AT91 RTC</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml<br/>index 0ef1b7ff4a77..b80b85c394ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml</a></div><div class='hunk'>@@ -5,10 +5,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Atmel AT91 RTT Device Tree Bindings</div><div class='add'>+title: Atmel AT91 RTT</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml b/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml<br/>index 9fe079917a98..c5e5c5aec74e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/brcm,brcmstb-waketimer.yaml</a></div><div class='hunk'>@@ -11,10 +11,11 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the</div><div class='del'>-  ability to wake up the system from low-power suspend/standby modes.</div><div class='add'>+  ability to wake up the system from low-power suspend/standby modes and</div><div class='add'>+  optionally generate RTC alarm interrupts.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -24,8 +25,14 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    description: the TIMER interrupt</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: the TIMER interrupt</div><div class='add'>+      - description: the ALARM interrupt</div><div class='add'>+    description:</div><div class='add'>+      The TIMER interrupt wakes the system from low-power suspend/standby modes.</div><div class='add'>+      An ALARM interrupt may be specified to interrupt the CPU when an RTC alarm</div><div class='add'>+      is enabled.</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     description: clock reference in the 27MHz domain</div><div class='hunk'>@@ -35,10 +42,10 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    rtc@f0411580 {</div><div class='add'>+    rtc@f041a080 {</div><div class='ctx'>         compatible = "brcm,brcmstb-waketimer";</div><div class='del'>-        reg = &lt;0xf0411580 0x14&gt;;</div><div class='del'>-        interrupts = &lt;0x3&gt;;</div><div class='del'>-        interrupt-parent = &lt;&amp;aon_pm_l2_intc&gt;;</div><div class='add'>+        reg = &lt;0xf041a080 0x14&gt;;</div><div class='add'>+        interrupts-extended = &lt;&amp;aon_pm_l2_intc 0x04&gt;,</div><div class='add'>+                              &lt;&amp;upg_aux_aon_intr2_intc 0x08&gt;;</div><div class='ctx'>         clocks = &lt;&amp;upg_fixed&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/epson,rx8900.yaml b/Documentation/devicetree/bindings/rtc/epson,rx8900.yaml<br/>index d12855e7ffd7..1df7c45d95c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/epson,rx8900.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/epson,rx8900.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/epson,rx8900.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/epson,rx8900.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/epson,rx8900.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: EPSON RX8900 / Microcrystal RV8803 Real-Time Clock DT bindings</div><div class='add'>+title: EPSON RX8900 / Microcrystal RV8803 Real-Time Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marek Vasut &lt;marex@denx.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml b/Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml<br/>index 056d42daae06..b1c1a0e21318 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml</a></div><div class='hunk'>@@ -38,8 +38,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: "PCLK"</div><div class='del'>-      - const: "EXTCLK"</div><div class='add'>+      - const: PCLK</div><div class='add'>+      - const: EXTCLK</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/fsl,scu-rtc.yaml b/Documentation/devicetree/bindings/rtc/fsl,scu-rtc.yaml<br/>new file mode 100644<br/>index 000000000000..dd1b1abf1e1b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/fsl,scu-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/fsl,scu-rtc.yaml</a></div><div class='hunk'>@@ -0,0 +1,31 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/fsl,scu-rtc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - RTC Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,imx8qxp-sc-rtc</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    rtc {</div><div class='add'>+        compatible = "fsl,imx8qxp-sc-rtc";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt b/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt<br/>deleted file mode 100644<br/>index a8934fe2ab4c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/haoyu,hym8563.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-Haoyu Microelectronics HYM8563 Real Time Clock</div><div class='del'>-</div><div class='del'>-The HYM8563 provides basic rtc and alarm functionality</div><div class='del'>-as well as a clock output of up to 32kHz.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be: "haoyu,hym8563"</div><div class='del'>-- reg: i2c address</div><div class='del'>-- #clock-cells: the value should be 0</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clock-output-names: From common clock binding</div><div class='del'>-- interrupts: rtc alarm/event interrupt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-hym8563: hym8563@51 {</div><div class='del'>-	compatible = "haoyu,hym8563";</div><div class='del'>-	reg = &lt;0x51&gt;;</div><div class='del'>-</div><div class='del'>-	interrupts = &lt;13 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-</div><div class='del'>-	#clock-cells = &lt;0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-device {</div><div class='del'>-...</div><div class='del'>-	clocks = &lt;&amp;hym8563&gt;;</div><div class='del'>-...</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/haoyu,hym8563.yaml b/Documentation/devicetree/bindings/rtc/haoyu,hym8563.yaml<br/>new file mode 100644<br/>index 000000000000..0b9f39ef0edc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/haoyu,hym8563.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/haoyu,hym8563.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/haoyu,hym8563.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Haoyu Microelectronics HYM8563 RTC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: haoyu,hym8563</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description: From common clock binding to override the default output clock name.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    description: Enables wake up of host system on alarm.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#clock-cells"</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rtc@51 {</div><div class='add'>+            compatible = "haoyu,hym8563";</div><div class='add'>+            reg = &lt;0x51&gt;;</div><div class='add'>+            interrupts = &lt;13 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml b/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml<br/>index b235b2441997..de9879bdb317 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/ingenic,rtc.yaml</a></div><div class='hunk'>@@ -4,13 +4,24 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/ingenic,rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs Real-Time Clock DT bindings</div><div class='add'>+title: Ingenic SoCs Real-Time Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: rtc.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - ingenic,jz4770-rtc</div><div class='add'>+                - ingenic,jz4780-rtc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        "#clock-cells": false</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -39,6 +50,9 @@ properties:</div><div class='ctx'>   clock-names:</div><div class='ctx'>     const: rtc</div><div class='ctx'> </div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   system-power-controller:</div><div class='ctx'>     description: |</div><div class='ctx'>       Indicates that the RTC is responsible for powering OFF</div><div class='hunk'>@@ -83,3 +97,18 @@ examples:</div><div class='ctx'>       clocks = &lt;&amp;cgu JZ4740_CLK_RTC&gt;;</div><div class='ctx'>       clock-names = "rtc";</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/ingenic,jz4780-cgu.h&gt;</div><div class='add'>+    rtc: rtc@10003000 {</div><div class='add'>+      compatible = "ingenic,jz4780-rtc", "ingenic,jz4760-rtc";</div><div class='add'>+      reg = &lt;0x10003000 0x4c&gt;;</div><div class='add'>+</div><div class='add'>+      interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+      interrupts = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;cgu JZ4780_CLK_RTCLK&gt;;</div><div class='add'>+      clock-names = "rtc";</div><div class='add'>+</div><div class='add'>+      #clock-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml b/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml<br/>index a2e984ea3553..7742465b9383 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/microchip,mfps-rtc.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@ $id: http://devicetree.org/schemas/rtc/microchip,mfps-rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip PolarFire Soc (MPFS) RTC Device Tree Bindings</div><div class='add'>+title: Microchip PolarFire Soc (MPFS) RTC</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: rtc.yaml#</div><div class='hunk'>@@ -31,11 +31,19 @@ properties:</div><div class='ctx'>           to that of the RTC's count register.</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: |</div><div class='add'>+          AHB clock</div><div class='add'>+      - description: |</div><div class='add'>+          Reference clock: divided by the prescaler to create a time-based</div><div class='add'>+          strobe (typically 1 Hz) for the calendar counter. By default, the rtc</div><div class='add'>+          on the PolarFire SoC shares it's reference with MTIMER so this will</div><div class='add'>+          be a 1 MHz clock.</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: rtc</div><div class='add'>+      - const: rtcref</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -48,11 +56,12 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include "dt-bindings/clock/microchip,mpfs-clock.h"</div><div class='ctx'>     rtc@20124000 {</div><div class='ctx'>         compatible = "microchip,mpfs-rtc";</div><div class='ctx'>         reg = &lt;0x20124000 0x1000&gt;;</div><div class='del'>-        clocks = &lt;&amp;clkcfg 21&gt;;</div><div class='del'>-        clock-names = "rtc";</div><div class='add'>+        clocks = &lt;&amp;clkcfg CLK_RTC&gt;, &lt;&amp;clkcfg CLK_RTCREF&gt;;</div><div class='add'>+        clock-names = "rtc", "rtcref";</div><div class='ctx'>         interrupts = &lt;80&gt;, &lt;81&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml b/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml<br/>new file mode 100644<br/>index 000000000000..5ade5dfad048<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/microcrystal,rv3028.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/microcrystal,rv3028.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip RV-3028 RTC</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: microcrystal,rv3028</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  trickle-resistor-ohms:</div><div class='add'>+    enum:</div><div class='add'>+      - 3000</div><div class='add'>+      - 5000</div><div class='add'>+      - 9000</div><div class='add'>+      - 15000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rtc@51 {</div><div class='add'>+            compatible = "microcrystal,rv3028";</div><div class='add'>+            reg = &lt;0x51&gt;;</div><div class='add'>+            pinctrl-0 = &lt;&amp;rtc_nint_pins&gt;;</div><div class='add'>+            interrupts-extended = &lt;&amp;gpio1 16 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            trickle-resistor-ohms = &lt;3000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml b/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml<br/>index 9593840a4a2b..27a9de10f0af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/microcrystal,rv3032.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/microcrystal,rv3032.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip RV-3032 RTC Device Tree Bindings</div><div class='add'>+title: Microchip RV-3032 RTC</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='hunk'>@@ -32,6 +32,7 @@ properties:</div><div class='ctx'>       - 11000</div><div class='ctx'> </div><div class='ctx'>   trickle-voltage-millivolt:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum:</div><div class='ctx'>       - 1750</div><div class='ctx'>       - 3000</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt b/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt<br/>index c9d3ac1477fe..1374df7bf9d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/moxa,moxart-rtc.txt</a></div><div class='hunk'>@@ -3,15 +3,15 @@ MOXA ART real-time clock</div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='ctx'> - compatible : Should be "moxa,moxart-rtc"</div><div class='del'>-- gpio-rtc-sclk : RTC sclk gpio, with zero flags</div><div class='del'>-- gpio-rtc-data : RTC data gpio, with zero flags</div><div class='del'>-- gpio-rtc-reset : RTC reset gpio, with zero flags</div><div class='add'>+- rtc-sclk-gpios : RTC sclk gpio, with zero flags</div><div class='add'>+- rtc-data-gpios : RTC data gpio, with zero flags</div><div class='add'>+- rtc-reset-gpios : RTC reset gpio, with zero flags</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	rtc: rtc {</div><div class='ctx'> 		compatible = "moxa,moxart-rtc";</div><div class='del'>-		gpio-rtc-sclk = &lt;&amp;gpio 5 0&gt;;</div><div class='del'>-		gpio-rtc-data = &lt;&amp;gpio 6 0&gt;;</div><div class='del'>-		gpio-rtc-reset = &lt;&amp;gpio 7 0&gt;;</div><div class='add'>+		rtc-sclk-gpios = &lt;&amp;gpio 5 0&gt;;</div><div class='add'>+		rtc-data-gpios = &lt;&amp;gpio 6 0&gt;;</div><div class='add'>+		rtc-reset-gpios = &lt;&amp;gpio 7 0&gt;;</div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml b/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml<br/>index 114199cf4d28..af4a31cd0954 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/mstar,msc313-rtc.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/mstar,msc313-rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mstar MSC313e RTC Device Tree Bindings</div><div class='add'>+title: Mstar MSC313e RTC</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Palmer &lt;daniel@0x0f.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml b/Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml<br/>new file mode 100644<br/>index 000000000000..4f9b5604acd9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/nuvoton,nct3018y.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NUVOTON NCT3018Y Real Time Clock</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Medad CChien &lt;ctcchien@nuvoton.com&gt;</div><div class='add'>+  - Mia Lin &lt;mimi05633@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nuvoton,nct3018y</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  start-year: true</div><div class='add'>+</div><div class='add'>+  reset-source: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rtc@6f {</div><div class='add'>+            compatible = "nuvoton,nct3018y";</div><div class='add'>+            reg = &lt;0x6f&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml<br/>index cde7b1675ead..bcb230027622 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml</a></div><div class='hunk'>@@ -7,14 +7,17 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: NXP PCF2127 Real Time Clock</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: nxp,pcf2127</div><div class='add'>+    enum:</div><div class='add'>+      - nxp,pca2129</div><div class='add'>+      - nxp,pcf2127</div><div class='add'>+      - nxp,pcf2129</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt b/Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt<br/>deleted file mode 100644<br/>index 6439682c9319..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf85063.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-* NXP PCF85063 Real Time Clock</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should one of contain:</div><div class='del'>-	"nxp,pcf85063",</div><div class='del'>-	"nxp,pcf85063a",</div><div class='del'>-	"nxp,pcf85063tp",</div><div class='del'>-	"microcrystal,rv8263"</div><div class='del'>-- reg: I2C address for chip.</div><div class='del'>-</div><div class='del'>-Optional property:</div><div class='del'>-- quartz-load-femtofarads: The capacitive load of the quartz(x-tal),</div><div class='del'>-  expressed in femto Farad (fF). Valid values are 7000 and 12500.</div><div class='del'>-  Default value (if no value is specified) is 7000fF.</div><div class='del'>-</div><div class='del'>-Optional child node:</div><div class='del'>-- clock: Provide this if the square wave pin is used as boot-enabled fixed clock.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-pcf85063: rtc@51 {</div><div class='del'>-	compatible = "nxp,pcf85063";</div><div class='del'>-	reg = &lt;0x51&gt;;</div><div class='del'>-	quartz-load-femtofarads = &lt;12500&gt;;</div><div class='del'>-</div><div class='del'>-		clock {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='del'>-		};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml<br/>new file mode 100644<br/>index 000000000000..2f892f8640d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/nxp,pcf85063.yaml</a></div><div class='hunk'>@@ -0,0 +1,92 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/nxp,pcf85063.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP PCF85063 Real Time Clock</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - microcrystal,rv8263</div><div class='add'>+      - nxp,pcf85063</div><div class='add'>+      - nxp,pcf85063a</div><div class='add'>+      - nxp,pcf85063tp</div><div class='add'>+      - nxp,pca85073a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  quartz-load-femtofarads:</div><div class='add'>+    description:</div><div class='add'>+      The capacitive load of the quartz(x-tal).</div><div class='add'>+    enum: [7000, 12500]</div><div class='add'>+    default: 7000</div><div class='add'>+</div><div class='add'>+  clock:</div><div class='add'>+    $ref: /schemas/clock/fixed-clock.yaml</div><div class='add'>+    description:</div><div class='add'>+      Provide this if the square wave pin is used as boot-enabled</div><div class='add'>+      fixed clock.</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - microcrystal,rv8263</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        quartz-load-femtofarads: false</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nxp,pcf85063</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        quartz-load-femtofarads:</div><div class='add'>+          const: 7000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rtc@51 {</div><div class='add'>+          compatible = "nxp,pcf85063a";</div><div class='add'>+          reg = &lt;0x51&gt;;</div><div class='add'>+          quartz-load-femtofarads = &lt;12500&gt;;</div><div class='add'>+</div><div class='add'>+          clock {</div><div class='add'>+            compatible = "fixed-clock";</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+            clock-frequency = &lt;32768&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf85363.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf85363.yaml<br/>new file mode 100644<br/>index 000000000000..52aa3e2091e9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nxp,pcf85363.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/nxp,pcf85363.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/nxp,pcf85363.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Philips PCF85263/PCF85363 Real Time Clock</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nxp,pcf85263</div><div class='add'>+      - nxp,pcf85363</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  quartz-load-femtofarads:</div><div class='add'>+    description:</div><div class='add'>+      The capacitive load of the quartz(x-tal).</div><div class='add'>+    enum: [6000, 7000, 12500]</div><div class='add'>+    default: 7000</div><div class='add'>+</div><div class='add'>+  start-year: true</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        rtc@51 {</div><div class='add'>+            compatible = "nxp,pcf85363";</div><div class='add'>+            reg = &lt;0x51&gt;;</div><div class='add'>+            #clock-cells = &lt;0&gt;;</div><div class='add'>+            quartz-load-femtofarads = &lt;12500&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml b/Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml<br/>index a98b72752349..22909a96123e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/nxp,pcf8563.yaml</a></div><div class='hunk'>@@ -19,8 +19,6 @@ properties:</div><div class='ctx'>       - microcrystal,rv8564</div><div class='ctx'>       - nxp,pca8565</div><div class='ctx'>       - nxp,pcf8563</div><div class='del'>-      - nxp,pcf85263</div><div class='del'>-      - nxp,pcf85363</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml b/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml<br/>index 6fa7d9fc2dc7..b95a69cc9ae0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml</a></div><div class='hunk'>@@ -7,16 +7,20 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm PM8xxx PMIC RTC device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Satya Priya &lt;skakit@codeaurora.org&gt;</div><div class='add'>+  - Satya Priya &lt;quic_c_skakit@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,pm8058-rtc</div><div class='del'>-      - qcom,pm8921-rtc</div><div class='del'>-      - qcom,pm8941-rtc</div><div class='del'>-      - qcom,pm8018-rtc</div><div class='del'>-      - qcom,pmk8350-rtc</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,pm8058-rtc</div><div class='add'>+          - qcom,pm8921-rtc</div><div class='add'>+          - qcom,pm8941-rtc</div><div class='add'>+          - qcom,pmk8350-rtc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,pm8018-rtc</div><div class='add'>+          - const: qcom,pm8921-rtc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -36,6 +40,18 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Indicates that the setting of RTC time is allowed by the host CPU.</div><div class='ctx'> </div><div class='add'>+  nvmem-cells:</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          four-byte nvmem cell holding a little-endian offset from the Unix</div><div class='add'>+          epoch representing the time when the RTC timer was last reset</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: offset</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -63,6 +79,8 @@ examples:</div><div class='ctx'>           compatible = "qcom,pm8921-rtc";</div><div class='ctx'>           reg = &lt;0x11d&gt;;</div><div class='ctx'>           interrupts = &lt;0x27 0&gt;;</div><div class='add'>+          nvmem-cells = &lt;&amp;rtc_offset&gt;;</div><div class='add'>+          nvmem-cell-names = "offset";</div><div class='ctx'>         };</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml b/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml<br/>new file mode 100644<br/>index 000000000000..f6e0c613af67<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/renesas,rzn1-rtc.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/renesas,rzn1-rtc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/N1 SoCs Real-Time Clock</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a06g032-rtc</div><div class='add'>+      - const: renesas,rzn1-rtc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: alarm</div><div class='add'>+      - const: timer</div><div class='add'>+      - const: pps</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: hclk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a06g032-sysctrl.h&gt;</div><div class='add'>+    rtc@40006000 {</div><div class='add'>+       compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc";</div><div class='add'>+       reg = &lt;0x40006000 0x1000&gt;;</div><div class='add'>+       interrupts = &lt;GIC_SPI 66 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                    &lt;GIC_SPI 67 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                    &lt;GIC_SPI 68 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+       interrupt-names = "alarm", "timer", "pps";</div><div class='add'>+       clocks = &lt;&amp;sysctrl R9A06G032_HCLK_RTC&gt;;</div><div class='add'>+       clock-names = "hclk";</div><div class='add'>+       power-domains = &lt;&amp;sysctrl&gt;;</div><div class='add'>+       start-year = &lt;2000&gt;;</div><div class='add'>+     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt b/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt<br/>deleted file mode 100644<br/>index 36f610bb051e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-ds1307.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-ds1307.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,52 +0,0 @@</div><div class='del'>-Dallas DS1307 and compatible RTC</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of:</div><div class='del'>-	"dallas,ds1307",</div><div class='del'>-	"dallas,ds1308",</div><div class='del'>-	"dallas,ds1337",</div><div class='del'>-	"dallas,ds1338",</div><div class='del'>-	"dallas,ds1339",</div><div class='del'>-	"dallas,ds1388",</div><div class='del'>-	"dallas,ds1340",</div><div class='del'>-	"dallas,ds1341",</div><div class='del'>-	"maxim,ds3231",</div><div class='del'>-	"st,m41t0",</div><div class='del'>-	"st,m41t00",</div><div class='del'>-	"st,m41t11",</div><div class='del'>-	"microchip,mcp7940x",</div><div class='del'>-	"microchip,mcp7941x",</div><div class='del'>-	"pericom,pt7c4338",</div><div class='del'>-	"epson,rx8025",</div><div class='del'>-	"isil,isl12057"</div><div class='del'>-	"epson,rx8130"</div><div class='del'>-- reg: I2C bus address of the device</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts: rtc alarm interrupt.</div><div class='del'>-- clock-output-names: From common clock binding to override the default output</div><div class='del'>-                      clock name</div><div class='del'>-- wakeup-source: Enables wake up of host system on alarm</div><div class='del'>-- trickle-resistor-ohms : ds1339, ds1340 and ds 1388 only</div><div class='del'>-	Selected resistor for trickle charger</div><div class='del'>-	Possible values are 250, 2000, 4000</div><div class='del'>-	Should be given if trickle charger should be enabled</div><div class='del'>-- aux-voltage-chargeable: ds1339, ds1340, ds1388 and rx8130 only</div><div class='del'>-	Tells whether the battery/supercap of the RTC (if any) is</div><div class='del'>-	chargeable or not.</div><div class='del'>-	Possible values are 0 (not chargeable), 1 (chargeable)</div><div class='del'>-</div><div class='del'>-Deprecated properties:</div><div class='del'>-- trickle-diode-disable : ds1339, ds1340 and ds1388 only</div><div class='del'>-	Do not use internal trickle charger diode</div><div class='del'>-	Should be given if internal trickle charger diode should be disabled</div><div class='del'>-	(superseded by aux-voltage-chargeable)</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	ds1339: rtc@68 {</div><div class='del'>-		compatible = "dallas,ds1339";</div><div class='del'>-		reg = &lt;0x68&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='del'>-		interrupts = &lt;20 0&gt;;</div><div class='del'>-		trickle-resistor-ohms = &lt;250&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml b/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml<br/>new file mode 100644<br/>index 000000000000..98d10e680144<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/rtc-ds1307.yaml</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/rtc-ds1307.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Dallas DS1307 and compatible RTC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - dallas,ds1307</div><div class='add'>+          - dallas,ds1308</div><div class='add'>+          - dallas,ds1337</div><div class='add'>+          - dallas,ds1338</div><div class='add'>+          - dallas,ds1339</div><div class='add'>+          - dallas,ds1388</div><div class='add'>+          - dallas,ds1340</div><div class='add'>+          - dallas,ds1341</div><div class='add'>+          - maxim,ds3231</div><div class='add'>+          - st,m41t0</div><div class='add'>+          - st,m41t00</div><div class='add'>+          - st,m41t11</div><div class='add'>+          - microchip,mcp7940x</div><div class='add'>+          - microchip,mcp7941x</div><div class='add'>+          - pericom,pt7c4338</div><div class='add'>+          - epson,rx8025</div><div class='add'>+          - isil,isl12057</div><div class='add'>+          - epson,rx8130</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - st,m41t00</div><div class='add'>+          - const: dallas,ds1338</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    description: From common clock binding to override the default output clock name.</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    description: Enables wake up of host system on alarm.</div><div class='add'>+</div><div class='add'>+  vcc-supply: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - dallas,ds1339</div><div class='add'>+              - dallas,ds1340</div><div class='add'>+              - dallas,ds1388</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        trickle-resistor-ohms:</div><div class='add'>+          description: Selected resistor for trickle charger. Should be specified if trickle</div><div class='add'>+            charger should be enabled.</div><div class='add'>+          enum: [ 250, 2000, 4000 ]</div><div class='add'>+</div><div class='add'>+        trickle-diode-disable:</div><div class='add'>+          description: Do not use internal trickle charger diode. Should be given if internal</div><div class='add'>+            trickle charger diode should be disabled (superseded by aux-voltage-chargeable)</div><div class='add'>+          deprecated: true</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      rtc@68 {</div><div class='add'>+        compatible = "dallas,ds1337";</div><div class='add'>+        reg = &lt;0x68&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio4&gt;;</div><div class='add'>+        interrupts = &lt;20 0&gt;;</div><div class='add'>+        trickle-resistor-ohms = &lt;250&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-m41t80.txt b/Documentation/devicetree/bindings/rtc/rtc-m41t80.txt<br/>deleted file mode 100644<br/>index cdd196b1e9bd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-m41t80.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-m41t80.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-ST M41T80 family of RTC and compatible</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of:</div><div class='del'>-	"st,m41t62",</div><div class='del'>-	"st,m41t65",</div><div class='del'>-	"st,m41t80",</div><div class='del'>-	"st,m41t81",</div><div class='del'>-	"st,m41t81s",</div><div class='del'>-	"st,m41t82",</div><div class='del'>-	"st,m41t83",</div><div class='del'>-	"st,m41t84",</div><div class='del'>-	"st,m41t85",</div><div class='del'>-	"st,m41t87",</div><div class='del'>-	"microcrystal,rv4162",</div><div class='del'>-- reg: I2C bus address of the device</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts: rtc alarm interrupt.</div><div class='del'>-- clock-output-names: From common clock binding to override the default output</div><div class='del'>-                      clock name</div><div class='del'>-- wakeup-source: Enables wake up of host system on alarm</div><div class='del'>-</div><div class='del'>-Optional child node:</div><div class='del'>-- clock: Provide this if the square wave pin is used as boot-enabled fixed clock.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	rtc@68 {</div><div class='del'>-		compatible = "st,m41t80";</div><div class='del'>-		reg = &lt;0x68&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;UIC0&gt;;</div><div class='del'>-		interrupts = &lt;0x9 0x8&gt;;</div><div class='del'>-</div><div class='del'>-		clock {</div><div class='del'>-			compatible = "fixed-clock";</div><div class='del'>-			#clock-cells = &lt;0&gt;;</div><div class='del'>-			clock-frequency = &lt;32768&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-meson-vrtc.txt b/Documentation/devicetree/bindings/rtc/rtc-meson-vrtc.txt<br/>deleted file mode 100644<br/>index c014f54a9853..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-meson-vrtc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-meson-vrtc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-* Amlogic Virtual RTC (VRTC)</div><div class='del'>-</div><div class='del'>-This is a Linux interface to an RTC managed by firmware, hence it's</div><div class='del'>-virtual from a Linux perspective.  The interface is 1 register where</div><div class='del'>-an alarm time (in seconds) is to be written.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "amlogic,meson-vrtc"</div><div class='del'>-- reg: physical address for the alarm register</div><div class='del'>-</div><div class='del'>-The alarm register is a simple scratch register shared between the</div><div class='del'>-application processors (AP) and the secure co-processor (SCP.)  When</div><div class='del'>-the AP suspends, the SCP will use the value of this register to</div><div class='del'>-program an always-on timer before going sleep. When the timer expires,</div><div class='del'>-the SCP will wake up and will then wake the AP.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	vrtc: rtc@0a8 {</div><div class='del'>-		compatible = "amlogic,meson-vrtc";</div><div class='del'>-		reg = &lt;0x0 0x000a8 0x0 0x4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-meson.txt b/Documentation/devicetree/bindings/rtc/rtc-meson.txt<br/>deleted file mode 100644<br/>index e921fe66a362..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-meson.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-meson.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-* Amlogic Meson6, Meson8, Meson8b and Meson8m2 RTC</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of the following describing the hardware:</div><div class='del'>-	* "amlogic,meson6-rtc"</div><div class='del'>-	* "amlogic,meson8-rtc"</div><div class='del'>-	* "amlogic,meson8b-rtc"</div><div class='del'>-	* "amlogic,meson8m2-rtc"</div><div class='del'>-</div><div class='del'>-- reg: physical register space for the controller's memory mapped registers.</div><div class='del'>-- interrupts: the interrupt line of the RTC block.</div><div class='del'>-- clocks: reference to the external 32.768kHz crystal oscillator.</div><div class='del'>-- vdd-supply: reference to the power supply of the RTC block.</div><div class='del'>-- resets: reset controller reference to allow reset of the controller</div><div class='del'>-</div><div class='del'>-Optional properties for the battery-backed non-volatile memory:</div><div class='del'>-- #address-cells: should be 1 to address the battery-backed non-volatile memory</div><div class='del'>-- #size-cells: should be 1 to reference the battery-backed non-volatile memory</div><div class='del'>-</div><div class='del'>-Optional child nodes:</div><div class='del'>-- see ../nvmem/nvmem.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	rtc: rtc@740 {</div><div class='del'>-		compatible = "amlogic,meson6-rtc";</div><div class='del'>-		reg = &lt;0x740 0x14&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 72 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		clocks = &lt;&amp;rtc32k_xtal&gt;;</div><div class='del'>-		vdd-supply = &lt;&amp;rtc_vdd&gt;;</div><div class='del'>-		resets = &lt;&amp;reset RESET_RTC&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt b/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt<br/>index 55a0c8874c03..7212076a8f1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-mt6397.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-mt6397.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/rtc-mt6397.txt</a></div><div class='hunk'>@@ -14,6 +14,8 @@ For MediaTek PMIC wrapper bus bindings, see:</div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible: Should be one of follows</div><div class='ctx'>        "mediatek,mt6323-rtc": for MT6323 PMIC</div><div class='add'>+       "mediatek,mt6358-rtc": for MT6358 PMIC</div><div class='add'>+       "mediatek,mt6366-rtc", "mediatek,mt6358-rtc": for MT6366 PMIC</div><div class='ctx'>        "mediatek,mt6397-rtc": for MT6397 PMIC</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml b/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml<br/>index 4f263fa6fd0d..a14b52178c4b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-mxc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-mxc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/rtc-mxc.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Real Time Clock of the i.MX SoCs</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Philippe Reynes &lt;tremyfr@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml b/Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml<br/>index 2d1a30663d72..e50131c26dc6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/rtc-mxc_v2.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: i.MX53 Secure Real Time Clock (SRTC)</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Patrick Bruenn &lt;p.bruenn@beckhoff.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc.txt b/Documentation/devicetree/bindings/rtc/rtc.txt<br/>deleted file mode 100644<br/>index b8d36fce5e2d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-This file has been moved to rtc.yaml.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/rtc.yaml b/Documentation/devicetree/bindings/rtc/rtc.yaml<br/>index 0ec3551f12dd..c6fff5486fe6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/rtc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: RTC Generic Binding</div><div class='add'>+title: Real Time Clock Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml b/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml<br/>index 482e5af215b3..a16c355dcd11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/sa1100-rtc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/sa1100-rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell Real Time Clock controller bindings</div><div class='add'>+title: Marvell Real Time Clock controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: rtc.yaml#</div><div class='hunk'>@@ -34,8 +34,8 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     items:</div><div class='del'>-      - const: 'rtc 1Hz'</div><div class='del'>-      - const: 'rtc alarm'</div><div class='add'>+      - const: rtc 1Hz</div><div class='add'>+      - const: rtc alarm</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/snvs-rtc.txt b/Documentation/devicetree/bindings/rtc/snvs-rtc.txt<br/>deleted file mode 100644<br/>index fb61ed77ada3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/snvs-rtc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/snvs-rtc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1 +0,0 @@</div><div class='del'>-See Documentation/devicetree/bindings/crypto/fsl-sec4.txt for details.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/st,m41t80.yaml b/Documentation/devicetree/bindings/rtc/st,m41t80.yaml<br/>new file mode 100644<br/>index 000000000000..fc9c6da6483f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/st,m41t80.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/st,m41t80.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/st,m41t80.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ST M41T80 family of RTC and compatible</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - st,m41t62</div><div class='add'>+      - st,m41t65</div><div class='add'>+      - st,m41t80</div><div class='add'>+      - st,m41t81</div><div class='add'>+      - st,m41t81s</div><div class='add'>+      - st,m41t82</div><div class='add'>+      - st,m41t83</div><div class='add'>+      - st,m41t84</div><div class='add'>+      - st,m41t85</div><div class='add'>+      - st,m41t87</div><div class='add'>+      - microcrystal,rv4162</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#clock-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clock-output-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: From common clock binding to override the default output clock name.</div><div class='add'>+</div><div class='add'>+  clock:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/clock/fixed-clock.yaml#</div><div class='add'>+    properties:</div><div class='add'>+      clock-frequency:</div><div class='add'>+        const: 32768</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      rtc@68 {</div><div class='add'>+        compatible = "st,m41t80";</div><div class='add'>+        reg = &lt;0x68&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;UIC0&gt;;</div><div class='add'>+        interrupts = &lt;0x9 0x8&gt;;</div><div class='add'>+</div><div class='add'>+        clock {</div><div class='add'>+          compatible = "fixed-clock";</div><div class='add'>+          #clock-cells = &lt;0&gt;;</div><div class='add'>+          clock-frequency = &lt;32768&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml b/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml<br/>index 764717ce1873..4703083d1f11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/st,stm32-rtc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Real Time Clock Bindings</div><div class='add'>+title: STMicroelectronics STM32 Real Time Clock</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Gabriel Fernandez &lt;gabriel.fernandez@foss.st.com&gt;</div><div class='hunk'>@@ -32,7 +32,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   st,syscfg:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     items:</div><div class='ctx'>       minItems: 3</div><div class='ctx'>       maxItems: 3</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml b/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml<br/>new file mode 100644<br/>index 000000000000..df5b4f77f6fb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/ti,k3-rtc.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/rtc/ti,k3-rtc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments K3 Real Time Clock</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nishanth Menon &lt;nm@ti.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This RTC appears in the AM62x family of SoCs.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,am62-rtc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: VBUS Interface clock</div><div class='add'>+      - description: 32k Clock source (external or internal).</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: vbus</div><div class='add'>+      - const: osc32k</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    rtc@2b1f0000 {</div><div class='add'>+        compatible = "ti,am62-rtc";</div><div class='add'>+        reg = &lt;0x2b1f0000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        power-domains = &lt;&amp;bar 0&gt;;</div><div class='add'>+        clocks = &lt;&amp;foo 0&gt;, &lt;&amp;foo 1&gt;;</div><div class='add'>+        clock-names = "vbus", "osc32k";</div><div class='add'>+        wakeup-source;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml b/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml<br/>index 13925bb78ec7..a3603e638c37 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/trivial-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/trivial-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/trivial-rtc.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ description: |</div><div class='ctx'>   possibly an interrupt line.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rtc.yaml#"</div><div class='add'>+  - $ref: rtc.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,6 +30,8 @@ properties:</div><div class='ctx'>       - dallas,ds1672</div><div class='ctx'>       # Extremely Accurate I²C RTC with Integrated Crystal and SRAM</div><div class='ctx'>       - dallas,ds3232</div><div class='add'>+      # EM Microelectronic EM3027 RTC</div><div class='add'>+      - emmicro,em3027</div><div class='ctx'>       # I2C-BUS INTERFACE REAL TIME CLOCK MODULE</div><div class='ctx'>       - epson,rx8010</div><div class='ctx'>       # I2C-BUS INTERFACE REAL TIME CLOCK MODULE</div><div class='hunk'>@@ -45,14 +47,12 @@ properties:</div><div class='ctx'>       - isil,isl1218</div><div class='ctx'>       # Intersil ISL12022 Real-time Clock</div><div class='ctx'>       - isil,isl12022</div><div class='del'>-      # Real Time Clock Module with I2C-Bus</div><div class='del'>-      - microcrystal,rv3028</div><div class='add'>+      # Loongson-2K Socs/LS7A bridge Real-time Clock</div><div class='add'>+      - loongson,ls2x-rtc</div><div class='ctx'>       # Real Time Clock Module with I2C-Bus</div><div class='ctx'>       - microcrystal,rv3029</div><div class='ctx'>       # Real Time Clock</div><div class='ctx'>       - microcrystal,rv8523</div><div class='del'>-      - nxp,pca2129</div><div class='del'>-      - nxp,pcf2129</div><div class='ctx'>       # Real-time Clock Module</div><div class='ctx'>       - pericom,pt7c4338</div><div class='ctx'>       # I2C bus SERIAL INTERFACE REAL-TIME CLOCK IC</div><div class='head'>diff --git a/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml b/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml<br/>index bdb72d3ddf2a..7ed0230f6c67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/rtc/xlnx,zynqmp-rtc.yaml</a></div><div class='hunk'>@@ -23,8 +23,15 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rtc</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='del'>-    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -39,6 +46,7 @@ properties:</div><div class='ctx'>     minimum: 0x1</div><div class='ctx'>     maximum: 0x1FFFFF</div><div class='ctx'>     default: 0x198233</div><div class='add'>+    deprecated: true</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -61,5 +69,7 @@ examples:</div><div class='ctx'>         interrupts = &lt;0 26 4&gt;, &lt;0 27 4&gt;;</div><div class='ctx'>         interrupt-names = "alarm", "sec";</div><div class='ctx'>         calibration = &lt;0x198233&gt;;</div><div class='add'>+        clock-names = "rtc";</div><div class='add'>+        clocks = &lt;&amp;rtc_clk&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml<br/>index 3bab2f27b970..692aa05500fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/8250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/8250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/8250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/8250.yaml</a></div><div class='hunk'>@@ -4,13 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/serial/8250.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: UART (Universal Asynchronous Receiver/Transmitter) bindings</div><div class='add'>+title: UART (Universal Asynchronous Receiver/Transmitter)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - devicetree@vger.kernel.org</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: serial.yaml#</div><div class='add'>+  - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       anyOf:</div><div class='ctx'>         - required:</div><div class='hunk'>@@ -93,6 +94,10 @@ properties:</div><div class='ctx'>               - ns16550a</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - nuvoton,npcm845-uart</div><div class='add'>+          - const: nuvoton,npcm750-uart</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='ctx'>               - ralink,mt7620a-uart</div><div class='ctx'>               - ralink,rt3052-uart</div><div class='ctx'>               - ralink,rt3883-uart</div><div class='hunk'>@@ -138,6 +143,7 @@ properties:</div><div class='ctx'>     description: The current active speed of the UART.</div><div class='ctx'> </div><div class='ctx'>   reg-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='ctx'>       Offset to apply to the mapbase from the start of the registers.</div><div class='ctx'> </div><div class='hunk'>@@ -198,12 +204,13 @@ properties:</div><div class='ctx'>     deprecated: true</div><div class='ctx'> </div><div class='ctx'>   aspeed,lpc-io-reg:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 1</div><div class='ctx'>     description: |</div><div class='ctx'>       The VUART LPC address.  Only applicable to aspeed,ast2500-vuart.</div><div class='ctx'> </div><div class='ctx'>   aspeed,lpc-interrupts:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32-array"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'>     description: |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/8250_omap.yaml b/Documentation/devicetree/bindings/serial/8250_omap.yaml<br/>index 7b34ec8fa90e..eb3488d8f9ee 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/8250_omap.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/8250_omap.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/8250_omap.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/8250_omap.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/serial/8250_omap.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for 8250 compliant UARTs on TI's OMAP2+ and K3 SoCs</div><div class='add'>+title: 8250 compliant UARTs on TI's OMAP2+ and K3 SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vignesh Raghavendra &lt;vigneshr@ti.com&gt;</div><div class='hunk'>@@ -70,11 +70,6 @@ properties:</div><div class='ctx'>   dsr-gpios: true</div><div class='ctx'>   rng-gpios: true</div><div class='ctx'>   dcd-gpios: true</div><div class='del'>-  rs485-rts-delay: true</div><div class='del'>-  rs485-rts-active-low: true</div><div class='del'>-  rs485-rx-during-tx: true</div><div class='del'>-  rs485-rts-active-high: true</div><div class='del'>-  linux,rs485-enabled-at-boot-time: true</div><div class='ctx'>   rts-gpio: true</div><div class='ctx'>   power-domains: true</div><div class='ctx'>   clock-frequency: true</div><div class='hunk'>@@ -109,12 +104,12 @@ else:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-          serial@49042000 {</div><div class='del'>-            compatible = "ti,omap3-uart";</div><div class='del'>-            reg = &lt;0x49042000 0x400&gt;;</div><div class='del'>-            interrupts = &lt;80&gt;;</div><div class='del'>-            dmas = &lt;&amp;sdma 81 &amp;sdma 82&gt;;</div><div class='del'>-            dma-names = "tx", "rx";</div><div class='del'>-            ti,hwmods = "uart4";</div><div class='del'>-            clock-frequency = &lt;48000000&gt;;</div><div class='del'>-          };</div><div class='add'>+    serial@49042000 {</div><div class='add'>+        compatible = "ti,omap3-uart";</div><div class='add'>+        reg = &lt;0x49042000 0x400&gt;;</div><div class='add'>+        interrupts = &lt;80&gt;;</div><div class='add'>+        dmas = &lt;&amp;sdma 81 &amp;sdma 82&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        ti,hwmods = "uart4";</div><div class='add'>+        clock-frequency = &lt;48000000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml<br/>index 72e8868db3e0..01ec45b3b406 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson SoC UART Serial Interface</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Amlogic Meson SoC UART Serial Interface is present on a large range</div><div class='hunk'>@@ -19,6 +19,9 @@ description: |</div><div class='ctx'>   is active since power-on and does not need any clock gating and is usable</div><div class='ctx'>   as very early serial console.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: serial.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -31,6 +34,11 @@ properties:</div><div class='ctx'>               - amlogic,meson-gx-uart</div><div class='ctx'>               - amlogic,meson-s4-uart</div><div class='ctx'>           - const: amlogic,meson-ao-uart</div><div class='add'>+      - description: Always-on power domain UART controller on G12A SoCs</div><div class='add'>+        items:</div><div class='add'>+          - const: amlogic,meson-g12a-uart</div><div class='add'>+          - const: amlogic,meson-gx-uart</div><div class='add'>+          - const: amlogic,meson-ao-uart</div><div class='ctx'>       - description: Everything-Else power domain UART controller</div><div class='ctx'>         enum:</div><div class='ctx'>           - amlogic,meson6-uart</div><div class='hunk'>@@ -38,6 +46,10 @@ properties:</div><div class='ctx'>           - amlogic,meson8b-uart</div><div class='ctx'>           - amlogic,meson-gx-uart</div><div class='ctx'>           - amlogic,meson-s4-uart</div><div class='add'>+      - description: Everything-Else power domain UART controller on G12A SoCs</div><div class='add'>+        items:</div><div class='add'>+          - const: amlogic,meson-g12a-uart</div><div class='add'>+          - const: amlogic,meson-gx-uart</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -69,14 +81,14 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     serial@84c0 {</div><div class='del'>-          compatible = "amlogic,meson-gx-uart";</div><div class='del'>-          reg = &lt;0x84c0 0x14&gt;;</div><div class='del'>-          interrupts = &lt;26&gt;;</div><div class='del'>-          clocks = &lt;&amp;xtal&gt;, &lt;&amp;pclk&gt;, &lt;&amp;xtal&gt;;</div><div class='del'>-          clock-names = "xtal", "pclk", "baud";</div><div class='add'>+        compatible = "amlogic,meson-gx-uart";</div><div class='add'>+        reg = &lt;0x84c0 0x14&gt;;</div><div class='add'>+        interrupts = &lt;26&gt;;</div><div class='add'>+        clocks = &lt;&amp;xtal&gt;, &lt;&amp;pclk&gt;, &lt;&amp;xtal&gt;;</div><div class='add'>+        clock-names = "xtal", "pclk", "baud";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml b/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml<br/>new file mode 100644<br/>index 000000000000..30b2131b5860<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml</a></div><div class='hunk'>@@ -0,0 +1,190 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Richard Genoud &lt;richard.genoud@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - atmel,at91rm9200-usart</div><div class='add'>+          - atmel,at91sam9260-usart</div><div class='add'>+          - microchip,sam9x60-usart</div><div class='add'>+      - items:</div><div class='add'>+          - const: atmel,at91rm9200-dbgu</div><div class='add'>+          - const: atmel,at91rm9200-usart</div><div class='add'>+      - items:</div><div class='add'>+          - const: atmel,at91sam9260-dbgu</div><div class='add'>+          - const: atmel,at91sam9260-usart</div><div class='add'>+      - items:</div><div class='add'>+          - const: microchip,sam9x60-dbgu</div><div class='add'>+          - const: microchip,sam9x60-usart</div><div class='add'>+          - const: atmel,at91sam9260-dbgu</div><div class='add'>+          - const: atmel,at91sam9260-usart</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: usart</div><div class='add'>+      - const: gclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: USART Peripheral Clock</div><div class='add'>+      - description: USART Generic Clock</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: TX DMA Channel</div><div class='add'>+      - description: RX DMA Channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  atmel,usart-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Must be either &lt;AT91_USART_MODE_SPI&gt; for SPI or</div><div class='add'>+      &lt;AT91_USART_MODE_SERIAL&gt; for USART (found in dt-bindings/mfd/at91-usart.h).</div><div class='add'>+    enum: [ 0, 1 ]</div><div class='add'>+</div><div class='add'>+  atmel,use-dma-rx:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: use of PDC or DMA for receiving data</div><div class='add'>+</div><div class='add'>+  atmel,use-dma-tx:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: use of PDC or DMA for transmitting data</div><div class='add'>+</div><div class='add'>+  atmel,fifo-size:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Maximum number of data the RX and TX FIFOs can store for FIFO</div><div class='add'>+      capable USARTS.</div><div class='add'>+    enum: [ 16, 32 ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - atmel,usart-mode</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        atmel,usart-mode:</div><div class='add'>+          const: 1</div><div class='add'>+    then:</div><div class='add'>+      allOf:</div><div class='add'>+        - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+      properties:</div><div class='add'>+        atmel,use-dma-rx: false</div><div class='add'>+</div><div class='add'>+        atmel,use-dma-tx: false</div><div class='add'>+</div><div class='add'>+        atmel,fifo-size: false</div><div class='add'>+</div><div class='add'>+        "#size-cells":</div><div class='add'>+          const: 0</div><div class='add'>+</div><div class='add'>+        "#address-cells":</div><div class='add'>+          const: 1</div><div class='add'>+</div><div class='add'>+      required:</div><div class='add'>+        - "#size-cells"</div><div class='add'>+        - "#address-cells"</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      allOf:</div><div class='add'>+        - $ref: /schemas/serial/serial.yaml#</div><div class='add'>+        - $ref: /schemas/serial/rs485.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/at91-usart.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+</div><div class='add'>+    /* use PDC */</div><div class='add'>+    usart0: serial@fff8c000 {</div><div class='add'>+        compatible = "atmel,at91sam9260-usart";</div><div class='add'>+        reg = &lt;0xfff8c000 0x4000&gt;;</div><div class='add'>+        atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+        interrupts = &lt;7&gt;;</div><div class='add'>+        clocks = &lt;&amp;usart0_clk&gt;;</div><div class='add'>+        clock-names = "usart";</div><div class='add'>+        atmel,use-dma-rx;</div><div class='add'>+        atmel,use-dma-tx;</div><div class='add'>+        rts-gpios = &lt;&amp;pioD 15 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        cts-gpios = &lt;&amp;pioD 16 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        dtr-gpios = &lt;&amp;pioD 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        dsr-gpios = &lt;&amp;pioD 18 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        dcd-gpios = &lt;&amp;pioD 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        rng-gpios = &lt;&amp;pioD 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/at91-usart.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+</div><div class='add'>+    /* use DMA */</div><div class='add'>+    usart1: serial@f001c000 {</div><div class='add'>+        compatible = "atmel,at91sam9260-usart";</div><div class='add'>+        reg = &lt;0xf001c000 0x100&gt;;</div><div class='add'>+        atmel,usart-mode = &lt;AT91_USART_MODE_SERIAL&gt;;</div><div class='add'>+        interrupts = &lt;12 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+        clocks = &lt;&amp;usart0_clk&gt;;</div><div class='add'>+        clock-names = "usart";</div><div class='add'>+        atmel,use-dma-rx;</div><div class='add'>+        atmel,use-dma-tx;</div><div class='add'>+        dmas = &lt;&amp;dma0 2 AT91_DMA_CFG_PER_ID(3)&gt;,</div><div class='add'>+               &lt;&amp;dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/at91-usart.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+</div><div class='add'>+    /* SPI mode */</div><div class='add'>+    spi0: spi@f001c000 {</div><div class='add'>+        compatible = "atmel,at91sam9260-usart";</div><div class='add'>+        reg = &lt;0xf001c000 0x100&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        atmel,usart-mode = &lt;AT91_USART_MODE_SPI&gt;;</div><div class='add'>+        interrupts = &lt;12 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+        clocks = &lt;&amp;usart0_clk&gt;;</div><div class='add'>+        clock-names = "usart";</div><div class='add'>+        dmas = &lt;&amp;dma0 2 AT91_DMA_CFG_PER_ID(3)&gt;,</div><div class='add'>+               &lt;&amp;dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        cs-gpios = &lt;&amp;pioB 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml b/Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml<br/>index 6d176588df47..89c462653e2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom 8250 based serial port devicetree bindings</div><div class='add'>+title: Broadcom 8250 based serial port</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Al Cooper &lt;alcooperx@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/cdns,uart.yaml b/Documentation/devicetree/bindings/serial/cdns,uart.yaml<br/>index fcdbe6f87e98..a8b323d7bf94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/cdns,uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/cdns,uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/cdns,uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/cdns,uart.yaml</a></div><div class='hunk'>@@ -4,14 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/serial/cdns,uart.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence UART Controller Device Tree Bindings</div><div class='add'>+title: Cadence UART Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/serial.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -46,6 +43,9 @@ properties:</div><div class='ctx'>       port does not use this pin.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -53,14 +53,25 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: serial.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: cdns,uart-r1p8</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains: false</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     uart0: serial@e0000000 {</div><div class='del'>-      compatible = "xlnx,xuartps", "cdns,uart-r1p8";</div><div class='del'>-      clocks = &lt;&amp;clkc 23&gt;, &lt;&amp;clkc 40&gt;;</div><div class='del'>-      clock-names = "uart_clk", "pclk";</div><div class='del'>-      reg = &lt;0xE0000000 0x1000&gt;;</div><div class='del'>-      interrupts = &lt;0 27 4&gt;;</div><div class='add'>+        compatible = "xlnx,xuartps", "cdns,uart-r1p8";</div><div class='add'>+        clocks = &lt;&amp;clkc 23&gt;, &lt;&amp;clkc 40&gt;;</div><div class='add'>+        clock-names = "uart_clk", "pclk";</div><div class='add'>+        reg = &lt;0xe0000000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;0 27 4&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/efm32-uart.txt b/Documentation/devicetree/bindings/serial/efm32-uart.txt<br/>deleted file mode 100644<br/>index 4f8d8fde0c1c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/efm32-uart.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/efm32-uart.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-* Energymicro efm32 UART</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : Should be "energymicro,efm32-uart"</div><div class='del'>-- reg : Address and length of the register set</div><div class='del'>-- interrupts : Should contain uart interrupt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- energymicro,location : Decides the location of the USART I/O pins.</div><div class='del'>-  Allowed range : [0 .. 5]</div><div class='del'>-  Default: 0</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-uart@4000c400 {</div><div class='del'>-	compatible = "energymicro,efm32-uart";</div><div class='del'>-	reg = &lt;0x4000c400 0x400&gt;;</div><div class='del'>-	interrupts = &lt;15&gt;;</div><div class='del'>-	energymicro,location = &lt;0&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml b/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml<br/>index 8b643bae3c7b..920539926d7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/fsl,s32-linflexuart.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ maintainers:</div><div class='ctx'>   - Chester Lin &lt;clin@suse.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "serial.yaml"</div><div class='add'>+  - $ref: serial.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml<br/>index 9d949296a142..40414247d61a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml</a></div><div class='hunk'>@@ -10,8 +10,8 @@ maintainers:</div><div class='ctx'>   - Fabio Estevam &lt;festevam@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "serial.yaml"</div><div class='del'>-  - $ref: "rs485.yaml"</div><div class='add'>+  - $ref: serial.yaml#</div><div class='add'>+  - $ref: rs485.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -49,6 +49,24 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg</div><div class='add'>+      - const: per</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMA controller phandle and request line for RX</div><div class='add'>+      - description: DMA controller phandle and request line for TX</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -83,22 +101,19 @@ properties:</div><div class='ctx'>       are sensible for most use cases. If you need low latency processing on</div><div class='ctx'>       slow connections this needs to be configured appropriately.</div><div class='ctx'> </div><div class='del'>-  uart-has-rtscts: true</div><div class='del'>-</div><div class='del'>-  rs485-rts-delay: true</div><div class='del'>-  rs485-rts-active-low: true</div><div class='del'>-  rs485-rx-during-tx: true</div><div class='del'>-  linux,rs485-enabled-at-boot-time: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx5-clock.h&gt;</div><div class='add'>+</div><div class='ctx'>     aliases {</div><div class='ctx'>         serial0 = &amp;uart1;</div><div class='ctx'>     };</div><div class='hunk'>@@ -107,6 +122,11 @@ examples:</div><div class='ctx'>         compatible = "fsl,imx51-uart", "fsl,imx21-uart";</div><div class='ctx'>         reg = &lt;0x73fbc000 0x4000&gt;;</div><div class='ctx'>         interrupts = &lt;31&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX5_CLK_UART1_IPG_GATE&gt;,</div><div class='add'>+                 &lt;&amp;clks IMX5_CLK_UART1_PER_GATE&gt;;</div><div class='add'>+        clock-names = "ipg", "per";</div><div class='add'>+        dmas = &lt;&amp;sdma 18 4 1&gt;, &lt;&amp;sdma 19 4 2&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='ctx'>         uart-has-rtscts;</div><div class='ctx'>         fsl,dte-mode;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml b/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml<br/>index ff364bd0fbac..93062403276b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl-lpuart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl-lpuart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/fsl-lpuart.yaml</a></div><div class='hunk'>@@ -10,7 +10,8 @@ maintainers:</div><div class='ctx'>   - Fugang Duan &lt;fugang.duan@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "rs485.yaml"</div><div class='add'>+  - $ref: rs485.yaml#</div><div class='add'>+  - $ref: serial.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -23,13 +24,18 @@ properties:</div><div class='ctx'>           - fsl,imx8qxp-lpuart</div><div class='ctx'>           - fsl,imxrt1050-lpuart</div><div class='ctx'>       - items:</div><div class='del'>-          - const: fsl,imx8ulp-lpuart</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx93-lpuart</div><div class='add'>+              - fsl,imx8ulp-lpuart</div><div class='ctx'>           - const: fsl,imx7ulp-lpuart</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx8qm-lpuart</div><div class='ctx'>               - fsl,imx8dxl-lpuart</div><div class='ctx'>           - const: fsl,imx8qxp-lpuart</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imxrt1050-lpuart</div><div class='add'>+          - const: fsl,imxrt1170-lpuart</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -59,8 +65,8 @@ properties:</div><div class='ctx'>       - const: rx</div><div class='ctx'>       - const: tx</div><div class='ctx'> </div><div class='del'>-  rs485-rts-active-low: true</div><div class='del'>-  linux,rs485-enabled-at-boot-time: true</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml b/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml<br/>index 14c7594c88c6..6a400a5e6fc7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/fsl-mxs-auart.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Fabio Estevam &lt;festevam@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "serial.yaml"</div><div class='add'>+  - $ref: serial.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/ingenic,uart.yaml b/Documentation/devicetree/bindings/serial/ingenic,uart.yaml<br/>index 9ca7a18ecd8b..d5f153bdeb0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/ingenic,uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/ingenic,uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/ingenic,uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/ingenic,uart.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/serial/ingenic,uart.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs UART controller devicetree bindings</div><div class='add'>+title: Ingenic SoCs UART controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - ingenic,jz4740-uart</div><div class='add'>+          - ingenic,jz4750-uart</div><div class='ctx'>           - ingenic,jz4760-uart</div><div class='ctx'>           - ingenic,jz4780-uart</div><div class='ctx'>           - ingenic,x1000-uart</div><div class='hunk'>@@ -31,6 +32,9 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: ingenic,jz4725b-uart</div><div class='ctx'>           - const: ingenic,jz4740-uart</div><div class='add'>+      - items:</div><div class='add'>+          - const: ingenic,jz4755-uart</div><div class='add'>+          - const: ingenic,jz4750-uart</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/mediatek,uart.yaml b/Documentation/devicetree/bindings/serial/mediatek,uart.yaml<br/>new file mode 100644<br/>index 000000000000..303d02ca4e1b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/mediatek,uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/mediatek,uart.yaml</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Universal Asynchronous Receiver/Transmitter (UART)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: serial.yaml#</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MediaTek UART is based on the basic 8250 UART and compatible</div><div class='add'>+  with 16550A, with enhancements for high speed baud rates and</div><div class='add'>+  support for DMA.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: mediatek,mt6577-uart</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2701-uart</div><div class='add'>+              - mediatek,mt2712-uart</div><div class='add'>+              - mediatek,mt6580-uart</div><div class='add'>+              - mediatek,mt6582-uart</div><div class='add'>+              - mediatek,mt6589-uart</div><div class='add'>+              - mediatek,mt6755-uart</div><div class='add'>+              - mediatek,mt6765-uart</div><div class='add'>+              - mediatek,mt6779-uart</div><div class='add'>+              - mediatek,mt6795-uart</div><div class='add'>+              - mediatek,mt6797-uart</div><div class='add'>+              - mediatek,mt7622-uart</div><div class='add'>+              - mediatek,mt7623-uart</div><div class='add'>+              - mediatek,mt7629-uart</div><div class='add'>+              - mediatek,mt7986-uart</div><div class='add'>+              - mediatek,mt8127-uart</div><div class='add'>+              - mediatek,mt8135-uart</div><div class='add'>+              - mediatek,mt8173-uart</div><div class='add'>+              - mediatek,mt8183-uart</div><div class='add'>+              - mediatek,mt8186-uart</div><div class='add'>+              - mediatek,mt8188-uart</div><div class='add'>+              - mediatek,mt8192-uart</div><div class='add'>+              - mediatek,mt8195-uart</div><div class='add'>+              - mediatek,mt8365-uart</div><div class='add'>+              - mediatek,mt8516-uart</div><div class='add'>+          - const: mediatek,mt6577-uart</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: The base address of the UART register bank</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: The clock the baudrate is derived from</div><div class='add'>+      - description: The bus clock for register accesses</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: baud</div><div class='add'>+      - const: bus</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to TX DMA</div><div class='add'>+      - description: phandle to RX DMA</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    description:</div><div class='add'>+      The UART interrupt and optionally the RX in-band wakeup interrupt.</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: uart</div><div class='add'>+      - const: wakeup</div><div class='add'>+</div><div class='add'>+  pinctrl-0: true</div><div class='add'>+  pinctrl-1: true</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    serial@11006000 {</div><div class='add'>+        compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";</div><div class='add'>+        reg = &lt;0x11006000 0x400&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='add'>+                     &lt;GIC_SPI 52 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+        interrupt-names = "uart", "wakeup";</div><div class='add'>+        clocks = &lt;&amp;uart_clk&gt;, &lt;&amp;bus_clk&gt;;</div><div class='add'>+        clock-names = "baud", "bus";</div><div class='add'>+        pinctrl-0 = &lt;&amp;uart_pin&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;uart_pin_sleep&gt;;</div><div class='add'>+        pinctrl-names = "default", "sleep";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt<br/>deleted file mode 100644<br/>index 113b5d6a2245..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/mtk-uart.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/mtk-uart.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-* MediaTek Universal Asynchronous Receiver/Transmitter (UART)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible should contain:</div><div class='del'>-  * "mediatek,mt2701-uart" for MT2701 compatible UARTS</div><div class='del'>-  * "mediatek,mt2712-uart" for MT2712 compatible UARTS</div><div class='del'>-  * "mediatek,mt6580-uart" for MT6580 compatible UARTS</div><div class='del'>-  * "mediatek,mt6582-uart" for MT6582 compatible UARTS</div><div class='del'>-  * "mediatek,mt6589-uart" for MT6589 compatible UARTS</div><div class='del'>-  * "mediatek,mt6755-uart" for MT6755 compatible UARTS</div><div class='del'>-  * "mediatek,mt6765-uart" for MT6765 compatible UARTS</div><div class='del'>-  * "mediatek,mt6779-uart" for MT6779 compatible UARTS</div><div class='del'>-  * "mediatek,mt6795-uart" for MT6795 compatible UARTS</div><div class='del'>-  * "mediatek,mt6797-uart" for MT6797 compatible UARTS</div><div class='del'>-  * "mediatek,mt7622-uart" for MT7622 compatible UARTS</div><div class='del'>-  * "mediatek,mt7623-uart" for MT7623 compatible UARTS</div><div class='del'>-  * "mediatek,mt7629-uart" for MT7629 compatible UARTS</div><div class='del'>-  * "mediatek,mt7986-uart", "mediatek,mt6577-uart" for MT7986 compatible UARTS</div><div class='del'>-  * "mediatek,mt8127-uart" for MT8127 compatible UARTS</div><div class='del'>-  * "mediatek,mt8135-uart" for MT8135 compatible UARTS</div><div class='del'>-  * "mediatek,mt8173-uart" for MT8173 compatible UARTS</div><div class='del'>-  * "mediatek,mt8183-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS</div><div class='del'>-  * "mediatek,mt8186-uart", "mediatek,mt6577-uart" for MT8183 compatible UARTS</div><div class='del'>-  * "mediatek,mt8192-uart", "mediatek,mt6577-uart" for MT8192 compatible UARTS</div><div class='del'>-  * "mediatek,mt8195-uart", "mediatek,mt6577-uart" for MT8195 compatible UARTS</div><div class='del'>-  * "mediatek,mt8516-uart" for MT8516 compatible UARTS</div><div class='del'>-  * "mediatek,mt6577-uart" for MT6577 and all of the above</div><div class='del'>-</div><div class='del'>-- reg: The base address of the UART register bank.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-  index 0: an interrupt specifier for the UART controller itself</div><div class='del'>-  index 1: optional, an interrupt specifier with edge sensitivity on Rx pin to</div><div class='del'>-           support Rx in-band wake up. If one would like to use this feature,</div><div class='del'>-           one must create an addtional pinctrl to reconfigure Rx pin to normal</div><div class='del'>-           GPIO before suspend.</div><div class='del'>-</div><div class='del'>-- clocks : Must contain an entry for each entry in clock-names.</div><div class='del'>-  See ../clocks/clock-bindings.txt for details.</div><div class='del'>-- clock-names:</div><div class='del'>-  - "baud": The clock the baudrate is derived from</div><div class='del'>-  - "bus": The bus clock for register accesses (optional)</div><div class='del'>-</div><div class='del'>-For compatibility with older device trees an unnamed clock is used for the</div><div class='del'>-baud clock if the baudclk does not exist. Do not use this for new designs.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	uart0: serial@11006000 {</div><div class='del'>-		compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";</div><div class='del'>-		reg = &lt;0x11006000 0x400&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 51 IRQ_TYPE_LEVEL_LOW&gt;,</div><div class='del'>-			     &lt;GIC_SPI 52 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		clocks = &lt;&amp;uart_clk&gt;, &lt;&amp;bus_clk&gt;;</div><div class='del'>-		clock-names = "baud", "bus";</div><div class='del'>-		pinctrl-names = "default", "sleep";</div><div class='del'>-		pinctrl-0 = &lt;&amp;uart_pin&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;uart_pin_sleep&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/pl011.yaml b/Documentation/devicetree/bindings/serial/pl011.yaml<br/>index d8aed84abcd3..9571041030b7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/pl011.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/pl011.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/pl011.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/pl011.yaml</a></div><div class='hunk'>@@ -10,6 +10,7 @@ maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: /schemas/arm/primecell.yaml#</div><div class='ctx'>   - $ref: serial.yaml#</div><div class='ctx'> </div><div class='ctx'> # Need a custom select here or 'arm,primecell' will match on lots of nodes</div><div class='hunk'>@@ -94,6 +95,12 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  reg-io-width:</div><div class='add'>+    description:</div><div class='add'>+      The size (in bytes) of the IO accesses that should be performed</div><div class='add'>+      on the device.</div><div class='add'>+    enum: [1, 4]</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt<br/>deleted file mode 100644<br/>index ce8c90161959..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/qcom,msm-uart.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/qcom,msm-uart.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-* MSM Serial UART</div><div class='del'>-</div><div class='del'>-The MSM serial UART hardware is designed for low-speed use cases where a</div><div class='del'>-dma-engine isn't needed. From a software perspective it's mostly compatible</div><div class='del'>-with the MSM serial UARTDM except that it only supports reading and writing one</div><div class='del'>-character at a time.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should contain "qcom,msm-uart"</div><div class='del'>-- reg: Should contain UART register location and length.</div><div class='del'>-- interrupts: Should contain UART interrupt.</div><div class='del'>-- clocks: Should contain the core clock.</div><div class='del'>-- clock-names: Should be "core".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-A uart device at 0xa9c00000 with interrupt 11.</div><div class='del'>-</div><div class='del'>-serial@a9c00000 {</div><div class='del'>-	compatible = "qcom,msm-uart";</div><div class='del'>-	reg = &lt;0xa9c00000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;11&gt;;</div><div class='del'>-	clocks = &lt;&amp;uart_cxc&gt;;</div><div class='del'>-	clock-names = "core";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml b/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml<br/>new file mode 100644<br/>index 000000000000..a052aaef21f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/qcom,msm-uart.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/serial/qcom,msm-uart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM SoC Serial UART</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MSM serial UART hardware is designed for low-speed use cases where a</div><div class='add'>+  dma-engine isn't needed. From a software perspective it's mostly compatible</div><div class='add'>+  with the MSM serial UARTDM except that it only supports reading and writing</div><div class='add'>+  one character at a time.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,msm-uart</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/serial/serial.yaml#</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    serial@a9c00000 {</div><div class='add'>+        compatible = "qcom,msm-uart";</div><div class='add'>+        reg = &lt;0xa9c00000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;11&gt;;</div><div class='add'>+        clocks = &lt;&amp;uart_cxc&gt;;</div><div class='add'>+        clock-names = "core";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt<br/>deleted file mode 100644<br/>index 9d098cf73b53..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,81 +0,0 @@</div><div class='del'>-* MSM Serial UARTDM</div><div class='del'>-</div><div class='del'>-The MSM serial UARTDM hardware is designed for high-speed use cases where the</div><div class='del'>-transmit and/or receive channels can be offloaded to a dma-engine. From a</div><div class='del'>-software perspective it's mostly compatible with the MSM serial UART except</div><div class='del'>-that it supports reading and writing multiple characters at a time.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should contain at least "qcom,msm-uartdm".</div><div class='del'>-              A more specific property should be specified as follows depending</div><div class='del'>-	      on the version:</div><div class='del'>-		"qcom,msm-uartdm-v1.1"</div><div class='del'>-		"qcom,msm-uartdm-v1.2"</div><div class='del'>-		"qcom,msm-uartdm-v1.3"</div><div class='del'>-		"qcom,msm-uartdm-v1.4"</div><div class='del'>-- reg: Should contain UART register locations and lengths. The first</div><div class='del'>-       register shall specify the main control registers. An optional second</div><div class='del'>-       register location shall specify the GSBI control region.</div><div class='del'>-       "qcom,msm-uartdm-v1.3" is the only compatible value that might</div><div class='del'>-       need the GSBI control region.</div><div class='del'>-- interrupts: Should contain UART interrupt.</div><div class='del'>-- clocks: Should contain the core clock and the AHB clock.</div><div class='del'>-- clock-names: Should be "core" for the core clock and "iface" for the</div><div class='del'>-	       AHB clock.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- dmas: Should contain dma specifiers for transmit and receive channels</div><div class='del'>-- dma-names: Should contain "tx" for transmit and "rx" for receive channels</div><div class='del'>-- qcom,tx-crci: Identificator &lt;u32&gt; for Client Rate Control Interface to be</div><div class='del'>-           used with TX DMA channel. Required when using DMA for transmission</div><div class='del'>-           with UARTDM v1.3 and below.</div><div class='del'>-- qcom,rx-crci: Identificator &lt;u32&gt; for Client Rate Control Interface to be</div><div class='del'>-           used with RX DMA channel. Required when using DMA for reception</div><div class='del'>-           with UARTDM v1.3 and below.</div><div class='del'>-</div><div class='del'>-Note: Aliases may be defined to ensure the correct ordering of the UARTs.</div><div class='del'>-The alias serialN will result in the UART being assigned port N.  If any</div><div class='del'>-serialN alias exists, then an alias must exist for each enabled UART.  The</div><div class='del'>-serialN aliases should be in a .dts file instead of in a .dtsi file.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-- A uartdm v1.4 device with dma capabilities.</div><div class='del'>-</div><div class='del'>-	serial@f991e000 {</div><div class='del'>-		compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";</div><div class='del'>-		reg = &lt;0xf991e000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 108 0x0&gt;;</div><div class='del'>-		clocks = &lt;&amp;blsp1_uart2_apps_cxc&gt;, &lt;&amp;blsp1_ahb_cxc&gt;;</div><div class='del'>-		clock-names = "core", "iface";</div><div class='del'>-		dmas = &lt;&amp;dma0 0&gt;, &lt;&amp;dma0 1&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- A uartdm v1.3 device without dma capabilities and part of a GSBI complex.</div><div class='del'>-</div><div class='del'>-	serial@19c40000 {</div><div class='del'>-		compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";</div><div class='del'>-		reg = &lt;0x19c40000 0x1000&gt;,</div><div class='del'>-		&lt;0x19c00000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 195 0x0&gt;;</div><div class='del'>-		clocks = &lt;&amp;gsbi5_uart_cxc&gt;, &lt;&amp;gsbi5_ahb_cxc&gt;;</div><div class='del'>-		clock-names = "core", "iface";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-- serialN alias.</div><div class='del'>-</div><div class='del'>-	aliases {</div><div class='del'>-		serial0 = &amp;uarta;</div><div class='del'>-		serial1 = &amp;uartc;</div><div class='del'>-		serial2 = &amp;uartb;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uarta: serial@12490000 {</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uartb: serial@16340000 {</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	uartc: serial@1a240000 {</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml<br/>new file mode 100644<br/>index 000000000000..484b9a51f6a9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/serial/qcom,msm-uartdm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm MSM Serial UARTDM</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MSM serial UARTDM hardware is designed for high-speed use cases where the</div><div class='add'>+  transmit and/or receive channels can be offloaded to a dma-engine. From a</div><div class='add'>+  software perspective it's mostly compatible with the MSM serial UART except</div><div class='add'>+  that it supports reading and writing multiple characters at a time.</div><div class='add'>+</div><div class='add'>+  Note:: Aliases may be defined to ensure the correct ordering of the UARTs.</div><div class='add'>+  The alias serialN will result in the UART being assigned port N.  If any</div><div class='add'>+  serialN alias exists, then an alias must exist for each enabled UART.  The</div><div class='add'>+  serialN aliases should be in a .dts file instead of in a .dtsi file.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,msm-uartdm-v1.1</div><div class='add'>+          - qcom,msm-uartdm-v1.2</div><div class='add'>+          - qcom,msm-uartdm-v1.3</div><div class='add'>+          - qcom,msm-uartdm-v1.4</div><div class='add'>+      - const: qcom,msm-uartdm</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: iface</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,rx-crci:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Identificator for Client Rate Control Interface to be used with RX DMA</div><div class='add'>+      channel. Required when using DMA for reception with UARTDM v1.3 and</div><div class='add'>+      below.</div><div class='add'>+</div><div class='add'>+  qcom,tx-crci:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Identificator for Client Rate Control Interface to be used with TX DMA</div><div class='add'>+      channel. Required when using DMA for transmission with UARTDM v1.3 and</div><div class='add'>+      below.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Main control registers</div><div class='add'>+      - description: An optional second register location shall specify the GSBI control region.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/serial/serial.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,msm-uartdm-v1.3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    serial@f991e000 {</div><div class='add'>+        compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";</div><div class='add'>+        reg = &lt;0xf991e000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;blsp1_uart2_apps_cxc&gt;, &lt;&amp;blsp1_ahb_cxc&gt;;</div><div class='add'>+        clock-names = "core", "iface";</div><div class='add'>+        dmas = &lt;&amp;dma0 0&gt;, &lt;&amp;dma0 1&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml b/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml<br/>new file mode 100644<br/>index 000000000000..dd33794b3534<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Geni based QUP UART interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/serial/serial.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,geni-uart</div><div class='add'>+      - qcom,geni-debug-uart</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: se</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: qup-core</div><div class='add'>+      - const: qup-config</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: UART core irq</div><div class='add'>+      - description: Wakeup irq (RX GPIO)</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  pinctrl-0: true</div><div class='add'>+  pinctrl-1: true</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: default</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc7180.h&gt;</div><div class='add'>+</div><div class='add'>+    serial@a88000 {</div><div class='add'>+        compatible = "qcom,geni-uart";</div><div class='add'>+        reg = &lt;0xa88000 0x7000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clock-names = "se";</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+        pinctrl-0 = &lt;&amp;qup_uart0_default&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='add'>+                        &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;;</div><div class='add'>+        interconnect-names = "qup-core", "qup-config";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml b/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml<br/>index e98ec48fee46..3fc2601f1338 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,em-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,em-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/renesas,em-uart.yaml</a></div><div class='hunk'>@@ -1,20 +1,24 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/renesas,em-uart.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/renesas,em-uart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas EMMA Mobile UART Interface</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Magnus Damm &lt;magnus.damm@gmail.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: serial.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: renesas,em-uart</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a09g011-uart    # RZ/V2M</div><div class='add'>+          - const: renesas,em-uart        # generic EMMA Mobile compatible UART</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - const: renesas,em-uart        # generic EMMA Mobile compatible UART</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -23,10 +27,31 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: UART functional clock</div><div class='add'>+      - description: Internal clock to access the registers</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    const: sclk</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: sclk</div><div class='add'>+      - const: pclk</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: serial.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,r9a09g011-uart</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -41,9 +66,9 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     uart0: serial@e1020000 {</div><div class='del'>-            compatible = "renesas,em-uart";</div><div class='del'>-            reg = &lt;0xe1020000 0x38&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;usia_u0_sclk&gt;;</div><div class='del'>-            clock-names = "sclk";</div><div class='add'>+        compatible = "renesas,em-uart";</div><div class='add'>+        reg = &lt;0xe1020000 0x38&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;usia_u0_sclk&gt;;</div><div class='add'>+        clock-names = "sclk";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/renesas,hscif.yaml b/Documentation/devicetree/bindings/serial/renesas,hscif.yaml<br/>index ee9804cd49bb..1c7f1276aed6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,hscif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,hscif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,hscif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/renesas,hscif.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/renesas,hscif.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/renesas,hscif.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas High Speed Serial Communication Interface with FIFO (HSCIF)</div><div class='ctx'> </div><div class='hunk'>@@ -51,10 +51,17 @@ properties:</div><div class='ctx'>               - renesas,hscif-r8a77980     # R-Car V3H</div><div class='ctx'>               - renesas,hscif-r8a77990     # R-Car E3</div><div class='ctx'>               - renesas,hscif-r8a77995     # R-Car D3</div><div class='del'>-              - renesas,hscif-r8a779a0     # R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2</div><div class='ctx'>           - const: renesas,hscif           # generic HSCIF compatible UART</div><div class='ctx'> </div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,hscif-r8a779a0     # R-Car V3U</div><div class='add'>+              - renesas,hscif-r8a779f0     # R-Car S4-8</div><div class='add'>+              - renesas,hscif-r8a779g0     # R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-hscif # R-Car Gen4</div><div class='add'>+          - const: renesas,hscif           # generic HSCIF compatible UART</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -113,6 +120,7 @@ if:</div><div class='ctx'>         enum:</div><div class='ctx'>           - renesas,rcar-gen2-hscif</div><div class='ctx'>           - renesas,rcar-gen3-hscif</div><div class='add'>+          - renesas,rcar-gen4-hscif</div><div class='ctx'> then:</div><div class='ctx'>   required:</div><div class='ctx'>     - resets</div><div class='hunk'>@@ -123,20 +131,20 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/r8a7795-sysc.h&gt;</div><div class='ctx'>     aliases {</div><div class='del'>-            serial1 = &amp;hscif1;</div><div class='add'>+        serial1 = &amp;hscif1;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     hscif1: serial@e6550000 {</div><div class='del'>-            compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",</div><div class='del'>-                         "renesas,hscif";</div><div class='del'>-            reg = &lt;0xe6550000 96&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD 519&gt;, &lt;&amp;cpg CPG_CORE R8A7795_CLK_S3D1&gt;,</div><div class='del'>-                     &lt;&amp;scif_clk&gt;;</div><div class='del'>-            clock-names = "fck", "brg_int", "scif_clk";</div><div class='del'>-            dmas = &lt;&amp;dmac1 0x33&gt;, &lt;&amp;dmac1 0x32&gt;, &lt;&amp;dmac2 0x33&gt;, &lt;&amp;dmac2 0x32&gt;;</div><div class='del'>-            dma-names = "tx", "rx", "tx", "rx";</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A7795_PD_ALWAYS_ON&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg 519&gt;;</div><div class='del'>-            uart-has-rtscts;</div><div class='add'>+        compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",</div><div class='add'>+                     "renesas,hscif";</div><div class='add'>+        reg = &lt;0xe6550000 96&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 519&gt;, &lt;&amp;cpg CPG_CORE R8A7795_CLK_S3D1&gt;,</div><div class='add'>+                 &lt;&amp;scif_clk&gt;;</div><div class='add'>+        clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+        dmas = &lt;&amp;dmac1 0x33&gt;, &lt;&amp;dmac1 0x32&gt;, &lt;&amp;dmac2 0x33&gt;, &lt;&amp;dmac2 0x32&gt;;</div><div class='add'>+        dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7795_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 519&gt;;</div><div class='add'>+        uart-has-rtscts;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/renesas,sci.yaml b/Documentation/devicetree/bindings/serial/renesas,sci.yaml<br/>index bf7708a7a2c0..9f7305200c47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,sci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,sci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,sci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/renesas,sci.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/renesas,sci.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/renesas,sci.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas Serial Communication Interface</div><div class='ctx'> </div><div class='hunk'>@@ -91,19 +91,19 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     aliases {</div><div class='del'>-            serial0 = &amp;sci0;</div><div class='add'>+        serial0 = &amp;sci0;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     sci0: serial@1004d000 {</div><div class='del'>-            compatible = "renesas,r9a07g044-sci", "renesas,sci";</div><div class='del'>-            reg = &lt;0x1004d000 0x400&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD R9A07G044_SCI0_CLKP&gt;;</div><div class='del'>-            clock-names = "fck";</div><div class='del'>-            power-domains = &lt;&amp;cpg&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg R9A07G044_SCI0_RST&gt;;</div><div class='add'>+        compatible = "renesas,r9a07g044-sci", "renesas,sci";</div><div class='add'>+        reg = &lt;0x1004d000 0x400&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "eri", "rxi", "txi", "tei";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A07G044_SCI0_CLKP&gt;;</div><div class='add'>+        clock-names = "fck";</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg R9A07G044_SCI0_RST&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml<br/>index 5d37f8f189fb..99030fc18c45 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,scif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,scif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,scif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/renesas,scif.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/renesas,scif.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/renesas,scif.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas Serial Communication Interface with FIFO (SCIF)</div><div class='ctx'> </div><div class='hunk'>@@ -60,13 +60,14 @@ properties:</div><div class='ctx'>               - renesas,scif-r8a77980     # R-Car V3H</div><div class='ctx'>               - renesas,scif-r8a77990     # R-Car E3</div><div class='ctx'>               - renesas,scif-r8a77995     # R-Car D3</div><div class='del'>-              - renesas,scif-r8a779a0     # R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2</div><div class='ctx'>           - const: renesas,scif           # generic SCIF compatible UART</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,scif-r8a779a0     # R-Car V3U</div><div class='ctx'>               - renesas,scif-r8a779f0     # R-Car S4-8</div><div class='add'>+              - renesas,scif-r8a779g0     # R-Car V4H</div><div class='ctx'>           - const: renesas,rcar-gen4-scif # R-Car Gen4</div><div class='ctx'>           - const: renesas,scif           # generic SCIF compatible UART</div><div class='ctx'> </div><div class='hunk'>@@ -76,7 +77,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - renesas,scif-r9a07g043      # RZ/G2UL</div><div class='add'>+              - renesas,scif-r9a07g043      # RZ/G2UL and RZ/Five</div><div class='ctx'>               - renesas,scif-r9a07g054      # RZ/V2L</div><div class='ctx'>           - const: renesas,scif-r9a07g044   # RZ/G2{L,LC} fallback</div><div class='ctx'> </div><div class='hunk'>@@ -91,7 +92,7 @@ properties:</div><div class='ctx'>           - description: Error interrupt</div><div class='ctx'>           - description: Receive buffer full interrupt</div><div class='ctx'>           - description: Transmit buffer empty interrupt</div><div class='del'>-          - description: Transmit End interrupt</div><div class='add'>+          - description: Break interrupt</div><div class='ctx'>       - items:</div><div class='ctx'>           - description: Error interrupt</div><div class='ctx'>           - description: Receive buffer full interrupt</div><div class='hunk'>@@ -106,7 +107,7 @@ properties:</div><div class='ctx'>           - const: eri</div><div class='ctx'>           - const: rxi</div><div class='ctx'>           - const: txi</div><div class='del'>-          - const: tei</div><div class='add'>+          - const: bri</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: eri</div><div class='ctx'>           - const: rxi</div><div class='hunk'>@@ -179,19 +180,19 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/r8a7791-sysc.h&gt;</div><div class='ctx'>     aliases {</div><div class='del'>-            serial0 = &amp;scif0;</div><div class='add'>+        serial0 = &amp;scif0;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     scif0: serial@e6e60000 {</div><div class='del'>-            compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",</div><div class='del'>-                         "renesas,scif";</div><div class='del'>-            reg = &lt;0xe6e60000 64&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD 721&gt;, &lt;&amp;cpg CPG_CORE R8A7791_CLK_ZS&gt;,</div><div class='del'>-                     &lt;&amp;scif_clk&gt;;</div><div class='del'>-            clock-names = "fck", "brg_int", "scif_clk";</div><div class='del'>-            dmas = &lt;&amp;dmac0 0x29&gt;, &lt;&amp;dmac0 0x2a&gt;, &lt;&amp;dmac1 0x29&gt;, &lt;&amp;dmac1 0x2a&gt;;</div><div class='del'>-            dma-names = "tx", "rx", "tx", "rx";</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg 721&gt;;</div><div class='add'>+        compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",</div><div class='add'>+                     "renesas,scif";</div><div class='add'>+        reg = &lt;0xe6e60000 64&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 721&gt;, &lt;&amp;cpg CPG_CORE R8A7791_CLK_ZS&gt;,</div><div class='add'>+                 &lt;&amp;scif_clk&gt;;</div><div class='add'>+        clock-names = "fck", "brg_int", "scif_clk";</div><div class='add'>+        dmas = &lt;&amp;dmac0 0x29&gt;, &lt;&amp;dmac0 0x2a&gt;, &lt;&amp;dmac1 0x29&gt;, &lt;&amp;dmac1 0x2a&gt;;</div><div class='add'>+        dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 721&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/renesas,scifa.yaml b/Documentation/devicetree/bindings/serial/renesas,scifa.yaml<br/>index 3c67d3202e1b..499507678cdf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,scifa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,scifa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,scifa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/renesas,scifa.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/renesas,scifa.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/renesas,scifa.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas Serial Communications Interface with FIFO A (SCIFA)</div><div class='ctx'> </div><div class='hunk'>@@ -95,18 +95,18 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/r8a7790-sysc.h&gt;</div><div class='ctx'>     aliases {</div><div class='del'>-            serial0 = &amp;scifa0;</div><div class='add'>+        serial0 = &amp;scifa0;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>     scifa0: serial@e6c40000 {</div><div class='del'>-            compatible = "renesas,scifa-r8a7790", "renesas,rcar-gen2-scifa",</div><div class='del'>-                         "renesas,scifa";</div><div class='del'>-            reg = &lt;0xe6c40000 64&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD 204&gt;;</div><div class='del'>-            clock-names = "fck";</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg 204&gt;;</div><div class='del'>-            dmas = &lt;&amp;dmac0 0x21&gt;, &lt;&amp;dmac0 0x22&gt;, &lt;&amp;dmac1 0x21&gt;, &lt;&amp;dmac1 0x22&gt;;</div><div class='del'>-            dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+        compatible = "renesas,scifa-r8a7790", "renesas,rcar-gen2-scifa",</div><div class='add'>+                     "renesas,scifa";</div><div class='add'>+        reg = &lt;0xe6c40000 64&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 204&gt;;</div><div class='add'>+        clock-names = "fck";</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 204&gt;;</div><div class='add'>+        dmas = &lt;&amp;dmac0 0x21&gt;, &lt;&amp;dmac0 0x22&gt;, &lt;&amp;dmac1 0x21&gt;, &lt;&amp;dmac1 0x22&gt;;</div><div class='add'>+        dma-names = "tx", "rx", "tx", "rx";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/renesas,scifb.yaml b/Documentation/devicetree/bindings/serial/renesas,scifb.yaml<br/>index d5571c7a4424..810d8a991fdd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,scifb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/renesas,scifb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/renesas,scifb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/renesas,scifb.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/renesas,scifb.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/renesas,scifb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Renesas Serial Communications Interface with FIFO B (SCIFB)</div><div class='ctx'> </div><div class='hunk'>@@ -94,10 +94,10 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/r8a7740-clock.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     scifb: serial@e6c30000 {</div><div class='del'>-            compatible = "renesas,scifb-r8a7740", "renesas,scifb";</div><div class='del'>-            reg = &lt;0xe6c30000 0x100&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;mstp2_clks R8A7740_CLK_SCIFB&gt;;</div><div class='del'>-            clock-names = "fck";</div><div class='del'>-            power-domains = &lt;&amp;pd_a3sp&gt;;</div><div class='add'>+        compatible = "renesas,scifb-r8a7740", "renesas,scifb";</div><div class='add'>+        reg = &lt;0xe6c30000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;mstp2_clks R8A7740_CLK_SCIFB&gt;;</div><div class='add'>+        clock-names = "fck";</div><div class='add'>+        power-domains = &lt;&amp;pd_a3sp&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml<br/>index 0c9fa694f85c..303a443d9e29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/rs485.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/rs485.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/rs485.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/rs485.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/serial/rs485.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: RS485 serial communications Bindings</div><div class='add'>+title: RS485 serial communications</div><div class='ctx'> </div><div class='ctx'> description: The RTS signal is capable of automatically controlling line</div><div class='ctx'>   direction for the built-in half-duplex mode. The properties described</div><div class='hunk'>@@ -22,17 +22,22 @@ properties:</div><div class='ctx'>         - description: Delay between rts signal and beginning of data sent in</div><div class='ctx'>             milliseconds. It corresponds to the delay before sending data.</div><div class='ctx'>           default: 0</div><div class='del'>-          maximum: 1000</div><div class='add'>+          maximum: 100</div><div class='ctx'>         - description: Delay between end of data sent and rts signal in milliseconds.</div><div class='ctx'>             It corresponds to the delay after sending data and actual release</div><div class='ctx'>             of the line.</div><div class='ctx'>           default: 0</div><div class='del'>-          maximum: 1000</div><div class='add'>+          maximum: 100</div><div class='ctx'> </div><div class='ctx'>   rs485-rts-active-low:</div><div class='ctx'>     description: drive RTS low when sending (default is high).</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'> </div><div class='add'>+  rs485-rx-active-high:</div><div class='add'>+    description: Polarity of receiver enable signal (when separate from RTS).</div><div class='add'>+      True indicates active high (default is low).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='ctx'>   linux,rs485-enabled-at-boot-time:</div><div class='ctx'>     description: enables the rs485 feature at boot time. It can be disabled</div><div class='ctx'>       later with proper ioctl.</div><div class='hunk'>@@ -46,6 +51,12 @@ properties:</div><div class='ctx'>     description: GPIO pin to enable RS485 bus termination.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  rs485-rx-during-tx-gpios:</div><div class='add'>+    description: Output GPIO pin that sets the state of rs485-rx-during-tx. This</div><div class='add'>+      signal can be used to control the RX part of an RS485 transceiver. Thereby</div><div class='add'>+      the active state enables RX during TX.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/samsung_uart.yaml b/Documentation/devicetree/bindings/serial/samsung_uart.yaml<br/>index d4688e317fc5..8bd88d5cbb11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/samsung_uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/samsung_uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/samsung_uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/samsung_uart.yaml</a></div><div class='hunk'>@@ -17,7 +17,10 @@ description: |+</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: samsung,exynosautov9-uart</div><div class='add'>+          - const: samsung,exynos850-uart</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,s5l-uart</div><div class='ctx'>           - axis,artpec8-uart</div><div class='hunk'>@@ -37,7 +40,6 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       The size (in bytes) of the IO accesses that should be performed</div><div class='ctx'>       on the device.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [ 1, 4 ]</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='hunk'>@@ -69,6 +71,9 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   samsung,uart-fifosize:</div><div class='ctx'>     description: The fifo size supported by the UART channel.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='hunk'>@@ -100,7 +105,6 @@ allOf:</div><div class='ctx'>           maxItems: 3</div><div class='ctx'>         clock-names:</div><div class='ctx'>           minItems: 2</div><div class='del'>-          maxItems: 3</div><div class='ctx'>           items:</div><div class='ctx'>             - const: uart</div><div class='ctx'>             - pattern: '^clk_uart_baud[0-1]$'</div><div class='hunk'>@@ -118,11 +122,8 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='del'>-          minItems: 2</div><div class='ctx'>           maxItems: 2</div><div class='ctx'>         clock-names:</div><div class='del'>-          minItems: 2</div><div class='del'>-          maxItems: 2</div><div class='ctx'>           items:</div><div class='ctx'>             - const: uart</div><div class='ctx'>             - const: clk_uart_baud0</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml<br/>index c75ba3fb6465..ea277560a596 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/serial.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/serial.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/serial.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/serial.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/serial.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/serial.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Serial Interface Generic DT Bindings</div><div class='add'>+title: Serial Interface Generic</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='hunk'>@@ -96,7 +96,7 @@ then:</div><div class='ctx'>     rts-gpios: false</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  ".*":</div><div class='add'>+  "^bluetooth|gnss|gps|mcu$":</div><div class='ctx'>     if:</div><div class='ctx'>       type: object</div><div class='ctx'>     then:</div><div class='hunk'>@@ -141,13 +141,13 @@ additionalProperties: true</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     serial@1234 {</div><div class='del'>-            compatible = "ns16550a";</div><div class='del'>-            reg = &lt;0x1234 0x20&gt;;</div><div class='del'>-            interrupts = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-            bluetooth {</div><div class='del'>-                    compatible = "brcm,bcm4330-bt";</div><div class='del'>-                    interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-                    interrupts = &lt;10&gt;;</div><div class='del'>-            };</div><div class='add'>+        compatible = "ns16550a";</div><div class='add'>+        reg = &lt;0x1234 0x20&gt;;</div><div class='add'>+        interrupts = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        bluetooth {</div><div class='add'>+            compatible = "brcm,bcm4330-bt";</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+            interrupts = &lt;10&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.yaml b/Documentation/devicetree/bindings/serial/sifive-serial.yaml<br/>index b0a8871e3641..b0df1cac4968 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/sifive-serial.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/sifive-serial.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/sifive-serial.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/sifive-serial.yaml</a></div><div class='hunk'>@@ -53,13 +53,13 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      #include &lt;dt-bindings/clock/sifive-fu540-prci.h&gt;</div><div class='del'>-      serial@10010000 {</div><div class='add'>+    #include &lt;dt-bindings/clock/sifive-fu540-prci.h&gt;</div><div class='add'>+    serial@10010000 {</div><div class='ctx'>         compatible = "sifive,fu540-c000-uart", "sifive,uart0";</div><div class='ctx'>         interrupt-parent = &lt;&amp;plic0&gt;;</div><div class='ctx'>         interrupts = &lt;80&gt;;</div><div class='ctx'>         reg = &lt;0x10010000 0x1000&gt;;</div><div class='ctx'>         clocks = &lt;&amp;prci FU540_PRCI_CLK_TLCLK&gt;;</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml<br/>index 12137fe80acf..3862411c77b5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml</a></div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>               - rockchip,rk1808-uart</div><div class='ctx'>               - rockchip,rk3036-uart</div><div class='ctx'>               - rockchip,rk3066-uart</div><div class='add'>+              - rockchip,rk3128-uart</div><div class='ctx'>               - rockchip,rk3188-uart</div><div class='ctx'>               - rockchip,rk3288-uart</div><div class='ctx'>               - rockchip,rk3308-uart</div><div class='hunk'>@@ -33,7 +34,9 @@ properties:</div><div class='ctx'>               - rockchip,rk3368-uart</div><div class='ctx'>               - rockchip,rk3399-uart</div><div class='ctx'>               - rockchip,rk3568-uart</div><div class='add'>+              - rockchip,rk3588-uart</div><div class='ctx'>               - rockchip,rv1108-uart</div><div class='add'>+              - rockchip,rv1126-uart</div><div class='ctx'>           - const: snps,dw-apb-uart</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -64,6 +67,14 @@ properties:</div><div class='ctx'>       - const: baudclk</div><div class='ctx'>       - const: apb_pclk</div><div class='ctx'> </div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='ctx'>   snps,uart-16550-compatible:</div><div class='ctx'>     description: reflects the value of UART_16550_COMPATIBLE configuration</div><div class='ctx'>       parameter. Define this if your UART does not implement the busy functionality.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml b/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml<br/>index d490c7c4b967..3d01cc355778 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml</a></div><div class='hunk'>@@ -20,7 +20,10 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 1</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   auto-flow-control:</div><div class='ctx'>     description: enable automatic flow control support.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/sprd-uart.yaml b/Documentation/devicetree/bindings/serial/sprd-uart.yaml<br/>index a444bebd2c1a..28ff77aa86c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/sprd-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/sprd-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/sprd-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/sprd-uart.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2019 Unisoc Inc.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/sprd-uart.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/sprd-uart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Spreadtrum serial UART</div><div class='ctx'> </div><div class='hunk'>@@ -35,7 +35,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     description: |</div><div class='del'>-      "enable" for UART module enable clock, "uart" for UART clock, "source" </div><div class='add'>+      "enable" for UART module enable clock, "uart" for UART clock, "source"</div><div class='ctx'>       for UART source (parent) clock.</div><div class='ctx'>     items:</div><div class='ctx'>       - const: enable</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml b/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml<br/>index 333dc42722d2..1df8ffe95fc6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/st,stm32-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/st,stm32-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/st,stm32-uart.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Erwan Le Ray &lt;erwan.leray@foss.st.com&gt;</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 USART bindings</div><div class='add'>+title: STMicroelectronics STM32 USART</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -35,8 +35,6 @@ properties:</div><div class='ctx'>     description: enable hardware flow control (deprecated)</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'> </div><div class='del'>-  uart-has-rtscts: true</div><div class='del'>-</div><div class='ctx'>   rx-tx-swap: true</div><div class='ctx'> </div><div class='ctx'>   dmas:</div><div class='hunk'>@@ -60,11 +58,6 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   wakeup-source: true</div><div class='ctx'> </div><div class='del'>-  rs485-rts-delay: true</div><div class='del'>-  rs485-rts-active-low: true</div><div class='del'>-  linux,rs485-enabled-at-boot-time: true</div><div class='del'>-  rs485-rx-during-tx: true</div><div class='del'>-</div><div class='ctx'>   rx-threshold:</div><div class='ctx'>     description:</div><div class='ctx'>       If value is set to 1, RX FIFO threshold is disabled.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml b/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml<br/>index 2e9b64abde70..7d0a4bcb88e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/sunplus,sp7021-uart.yaml</a></div><div class='hunk'>@@ -2,10 +2,10 @@</div><div class='ctx'> # Copyright (C) Sunplus Co., Ltd. 2021</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/serial/sunplus,sp7021-uart.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/serial/sunplus,sp7021-uart.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Sunplus SoC SP7021 UART Controller Device Tree Bindings</div><div class='add'>+title: Sunplus SoC SP7021 UART Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Hammer Hsieh &lt;hammerh0314@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml<br/>index f7617b88c7c3..08dcb275d8e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml</a></div><div class='hunk'>@@ -63,12 +63,11 @@ required:</div><div class='ctx'>   - xlnx,use-parity</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: /schemas/serial.yaml#</div><div class='add'>+  - $ref: serial.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         xlnx,use-parity:</div><div class='del'>-          contains:</div><div class='del'>-            const: 1</div><div class='add'>+          const: 1</div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='ctx'>         - xlnx,odd-parity</div><div class='hunk'>@@ -77,7 +76,7 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      serial@800c0000 {</div><div class='add'>+    serial@800c0000 {</div><div class='ctx'>         compatible = "xlnx,xps-uartlite-1.00.a";</div><div class='ctx'>         reg = &lt;0x800c0000 0x10000&gt;;</div><div class='ctx'>         interrupts = &lt;0x0 0x6e 0x1&gt;;</div><div class='hunk'>@@ -85,5 +84,5 @@ examples:</div><div class='ctx'>         current-speed = &lt;115200&gt;;</div><div class='ctx'>         xlnx,data-bits = &lt;8&gt;;</div><div class='ctx'>         xlnx,use-parity = &lt;0&gt;;</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml b/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml<br/>index 2ecab8ed702a..7fa70fd1f291 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serio/allwinner,sun4i-a10-ps2.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/serio/allwinner,sun4i-a10-ps2.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 PS2 Host Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 PS2 Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serio/arm,pl050.yaml b/Documentation/devicetree/bindings/serio/arm,pl050.yaml<br/>new file mode 100644<br/>index 000000000000..d80f58d15497<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serio/arm,pl050.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serio/arm,pl050.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/serio/arm,pl050.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm Ltd. PrimeCell PL050 PS/2 Keyboard/Mouse Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Arm PrimeCell PS2 Keyboard/Mouse Interface (KMI) is an AMBA compliant</div><div class='add'>+  peripheral that can be used to implement a keyboard or mouse interface that</div><div class='add'>+  is IBM PS2 or AT compatible.</div><div class='add'>+</div><div class='add'>+# We need a select here so we don't match all nodes with 'arm,primecell'</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,pl050</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,pl050</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: KMI reference clock, used to generate the bus timing</div><div class='add'>+      - description: APB register access clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: KMIREFCLK</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    serio@70000 {</div><div class='add'>+        compatible = "arm,pl050", "arm,primecell";</div><div class='add'>+        reg = &lt;0x070000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;8&gt;;</div><div class='add'>+        clocks = &lt;&amp;mb_clk24mhz&gt;, &lt;&amp;soc_smc50mhz&gt;;</div><div class='add'>+        clock-names = "KMIREFCLK", "apb_pclk";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serio/ps2-gpio.txt b/Documentation/devicetree/bindings/serio/ps2-gpio.txt<br/>deleted file mode 100644<br/>index 7b7bc9cdf986..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serio/ps2-gpio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/serio/ps2-gpio.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,23 +0,0 @@</div><div class='del'>-Device-Tree binding for ps/2 gpio device</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible = "ps2-gpio"</div><div class='del'>-	- data-gpios: the data pin</div><div class='del'>-	- clk-gpios: the clock pin</div><div class='del'>-	- interrupts: Should trigger on the falling edge of the clock line.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- write-enable: Indicates whether write function is provided</div><div class='del'>-	to serio device. Possibly providing the write fn will not work, because</div><div class='del'>-	of the tough timing requirements.</div><div class='del'>-</div><div class='del'>-Example nodes:</div><div class='del'>-</div><div class='del'>-ps2@0 {</div><div class='del'>-	compatible = "ps2-gpio";</div><div class='del'>-	interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-	interrupts = &lt;23 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-	data-gpios = &lt;&amp;gpio 24 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	clk-gpios = &lt;&amp;gpio 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-	write-enable;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/serio/ps2-gpio.yaml b/Documentation/devicetree/bindings/serio/ps2-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..99848bc34f6e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/serio/ps2-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/serio/ps2-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/serio/ps2-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO based PS/2</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Danilo Krummrich &lt;danilokrummrich@dk-develop.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ps2-gpio</div><div class='add'>+</div><div class='add'>+  data-gpios:</div><div class='add'>+    description:</div><div class='add'>+      the gpio used for the data signal - this should be flagged as</div><div class='add'>+      active high using open drain with (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)</div><div class='add'>+      from &lt;dt-bindings/gpio/gpio.h&gt; since the signal is open drain by</div><div class='add'>+      definition</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clk-gpios:</div><div class='add'>+    description:</div><div class='add'>+      the gpio used for the clock signal - this should be flagged as</div><div class='add'>+      active high using open drain with (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)</div><div class='add'>+      from &lt;dt-bindings/gpio/gpio.h&gt; since the signal is open drain by</div><div class='add'>+      definition</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      The given interrupt should trigger on the falling edge of the clock line.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  write-enable:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Indicates whether write function is provided to serio device. Possibly</div><div class='add'>+      providing the write function will not work, because of the tough timing</div><div class='add'>+      requirements.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - data-gpios</div><div class='add'>+  - clk-gpios</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    ps2 {</div><div class='add'>+        compatible = "ps2-gpio";</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='add'>+        interrupts = &lt;23 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+        data-gpios = &lt;&amp;gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+        clk-gpios = &lt;&amp;gpio 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)&gt;;</div><div class='add'>+        write-enable;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/slimbus/bus.txt b/Documentation/devicetree/bindings/slimbus/bus.txt<br/>deleted file mode 100644<br/>index bbe871f82a8b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/slimbus/bus.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/bus.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,60 +0,0 @@</div><div class='del'>-SLIM(Serial Low Power Interchip Media Bus) bus</div><div class='del'>-</div><div class='del'>-SLIMbus is a 2-wire bus, and is used to communicate with peripheral</div><div class='del'>-components like audio-codec.</div><div class='del'>-</div><div class='del'>-Required property for SLIMbus controller node:</div><div class='del'>-- compatible	- name of SLIMbus controller</div><div class='del'>-</div><div class='del'>-Child nodes:</div><div class='del'>-Every SLIMbus controller node can contain zero or more child nodes</div><div class='del'>-representing slave devices on the bus. Every SLIMbus slave device is</div><div class='del'>-uniquely determined by the enumeration address containing 4 fields:</div><div class='del'>-Manufacturer ID, Product code, Device index, and Instance value for</div><div class='del'>-the device.</div><div class='del'>-If child node is not present and it is instantiated after device</div><div class='del'>-discovery (slave device reporting itself present).</div><div class='del'>-</div><div class='del'>-In some cases it may be necessary to describe non-probeable device</div><div class='del'>-details such as non-standard ways of powering up a device. In</div><div class='del'>-such cases, child nodes for those devices will be present as</div><div class='del'>-slaves of the SLIMbus controller, as detailed below.</div><div class='del'>-</div><div class='del'>-Required property for SLIMbus child node if it is present:</div><div class='del'>-- reg		- Should be ('Device index', 'Instance ID') from SLIMbus</div><div class='del'>-		  Enumeration  Address.</div><div class='del'>-		  Device Index Uniquely identifies multiple Devices within</div><div class='del'>-		  a single Component.</div><div class='del'>-		  Instance ID Is for the cases where multiple Devices of the</div><div class='del'>-		  same type or Class are attached to the bus.</div><div class='del'>-</div><div class='del'>-- compatible	-"slimMID,PID". The textual representation of Manufacturer ID,</div><div class='del'>-	 	  Product Code, shall be in lower case hexadecimal with leading</div><div class='del'>-		  zeroes suppressed</div><div class='del'>-</div><div class='del'>-Optional property for SLIMbus child node if it is present:</div><div class='del'>-- slim-ifc-dev	- Should be phandle to SLIMBus Interface device.</div><div class='del'>-		  Required for devices which deal with streams.</div><div class='del'>-</div><div class='del'>-SLIMbus example for Qualcomm's slimbus manager component:</div><div class='del'>-</div><div class='del'>-	slim@28080000 {</div><div class='del'>-		compatible = "qcom,apq8064-slim", "qcom,slim";</div><div class='del'>-		reg = &lt;0x28080000 0x2000&gt;,</div><div class='del'>-		interrupts = &lt;0 33 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;lcc SLIMBUS_SRC&gt;, &lt;&amp;lcc AUDIO_SLIMBUS_CLK&gt;;</div><div class='del'>-		clock-names = "iface", "core";</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cell = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		codec_ifd: ifd@0,0{</div><div class='del'>-			compatible = "slim217,60";</div><div class='del'>-			reg = &lt;0 0&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		codec: wcd9310@1,0{</div><div class='del'>-			compatible = "slim217,60";</div><div class='del'>-			reg = &lt;1 0&gt;;</div><div class='del'>-			slim-ifc-dev  = &lt;&amp;codec_ifd&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml b/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml<br/>new file mode 100644<br/>index 000000000000..abf61c15246e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/slimbus/qcom,slim-ngd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SoC SLIMBus Non Generic Device (NGD) Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SLIMBus NGD controller is a light-weight driver responsible for communicating</div><div class='add'>+  with SLIMBus slaves directly over the bus using messaging interface and</div><div class='add'>+  communicating with master component residing on ADSP for bandwidth and</div><div class='add'>+  data-channel management</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,slim-ngd-v1.5.0        # for MSM8996</div><div class='add'>+      - qcom,slim-ngd-v2.1.0        # for SDM845</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^slim@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: slimbus.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Each subnode represents an instance of NGD</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    slim-ngd@171c0000 {</div><div class='add'>+        compatible = "qcom,slim-ngd-v2.1.0";</div><div class='add'>+        reg = &lt;0x171c0000 0x2c000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        dmas = &lt;&amp;slimbam 3&gt;, &lt;&amp;slimbam 4&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1806 0x0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        slim@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            codec@1,0 {</div><div class='add'>+                compatible = "slim217,250";</div><div class='add'>+                reg = &lt;1 0&gt;;</div><div class='add'>+                slim-ifc-dev = &lt;&amp;wcd9340_ifd&gt;;</div><div class='add'>+</div><div class='add'>+                #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                interrupts-extended = &lt;&amp;tlmm 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+                interrupt-controller;</div><div class='add'>+                #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                #clock-cells = &lt;0&gt;;</div><div class='add'>+                clock-frequency = &lt;9600000&gt;;</div><div class='add'>+                clock-output-names = "mclk";</div><div class='add'>+                qcom,micbias1-microvolt = &lt;1800000&gt;;</div><div class='add'>+                qcom,micbias2-microvolt = &lt;1800000&gt;;</div><div class='add'>+                qcom,micbias3-microvolt = &lt;1800000&gt;;</div><div class='add'>+                qcom,micbias4-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                reset-gpios = &lt;&amp;tlmm 64 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+                /* Rest of the WCD9340 codec */</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/slimbus/qcom,slim.yaml b/Documentation/devicetree/bindings/slimbus/qcom,slim.yaml<br/>new file mode 100644<br/>index 000000000000..883bda58ca97<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/slimbus/qcom,slim.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/slimbus/qcom,slim.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/slimbus/qcom,slim.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SoC SLIMbus controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SLIMbus controller used when applications processor controls SLIMbus master</div><div class='add'>+  component.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: slimbus.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,apq8064-slim</div><div class='add'>+      - const: qcom,slim</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Physical address of controller register blocks</div><div class='add'>+      - description: SLEW RATE register</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ctrl</div><div class='add'>+      - const: slew</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Interface clock for this controller</div><div class='add'>+      - description: Interrupt for controller core's BAM</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8960.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lcc-msm8960.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        slim@28080000 {</div><div class='add'>+            compatible = "qcom,apq8064-slim", "qcom,slim";</div><div class='add'>+            reg = &lt;0x28080000 0x2000&gt;, &lt;0x80207c 4&gt;;</div><div class='add'>+            reg-names = "ctrl", "slew";</div><div class='add'>+            interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;lcc SLIMBUS_SRC&gt;, &lt;&amp;lcc AUDIO_SLIMBUS_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "core";</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            audio-codec@1,0 {</div><div class='add'>+                compatible = "slim217,60";</div><div class='add'>+                reg = &lt;1 0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt b/Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt<br/>deleted file mode 100644<br/>index e94a2ad3a710..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,84 +0,0 @@</div><div class='del'>-Qualcomm SLIMBus Non Generic Device (NGD) Controller binding</div><div class='del'>-</div><div class='del'>-SLIMBus NGD controller is a light-weight driver responsible for communicating</div><div class='del'>-with SLIMBus slaves directly over the bus using messaging interface and</div><div class='del'>-communicating with master component residing on ADSP for bandwidth and</div><div class='del'>-data-channel management</div><div class='del'>-</div><div class='del'>-Please refer to slimbus/bus.txt for details of the common SLIMBus bindings.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,slim-ngd-v&lt;MAJOR&gt;.&lt;MINOR&gt;.&lt;STEP&gt;"</div><div class='del'>-	must be one of the following.</div><div class='del'>-	"qcom,slim-ngd-v1.5.0" for MSM8996</div><div class='del'>-	"qcom,slim-ngd-v2.1.0" for SDM845</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: must specify the base address and size of the controller</div><div class='del'>-		    register space.</div><div class='del'>-- dmas</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;array of phandles&gt;</div><div class='del'>-	Definition: List of rx and tx dma channels</div><div class='del'>-</div><div class='del'>-- dma-names</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "rx" and "tx".</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: must list controller IRQ.</div><div class='del'>-</div><div class='del'>-#address-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Should be 1, reflecting the instance id of ngd.</div><div class='del'>-</div><div class='del'>-#size-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Should be 0</div><div class='del'>-</div><div class='del'>-= NGD Devices</div><div class='del'>-Each subnode represents an instance of NGD, must contain the following</div><div class='del'>-properties:</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Should be instance id of ngd.</div><div class='del'>-</div><div class='del'>-#address-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Refer to slimbus/bus.txt for details of the common SLIMBus bindings.</div><div class='del'>-</div><div class='del'>-#size-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Refer to slimbus/bus.txt for details of the common SLIMBus bindings.</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-</div><div class='del'>-slim@91c0000 {</div><div class='del'>-	compatible = "qcom,slim-ngd-v1.5.0";</div><div class='del'>-	reg = &lt;0x91c0000 0x2c000&gt;;</div><div class='del'>-	interrupts = &lt;0 163 0&gt;;</div><div class='del'>-	dmas =	&lt;&amp;slimbam 3&gt;, &lt;&amp;slimbam 4&gt;;</div><div class='del'>-	dma-names = "rx", "tx";</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	ngd@1 {</div><div class='del'>-		reg = &lt;1&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		codec@1 {</div><div class='del'>-			compatible = "slim217,1a0";</div><div class='del'>-			reg  = &lt;1 0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt b/Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt<br/>deleted file mode 100644<br/>index 922dcb8ff24a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-Qualcomm SLIMbus controller</div><div class='del'>-This controller is used if applications processor driver controls SLIMbus</div><div class='del'>-master component.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>- - #address-cells - refer to Documentation/devicetree/bindings/slimbus/bus.txt</div><div class='del'>- - #size-cells	- refer to Documentation/devicetree/bindings/slimbus/bus.txt</div><div class='del'>-</div><div class='del'>- - reg : Offset and length of the register region(s) for the device</div><div class='del'>- - reg-names : Register region name(s) referenced in reg above</div><div class='del'>-	 Required register resource entries are:</div><div class='del'>-	 "ctrl": Physical address of controller register blocks</div><div class='del'>- 	 "slew": required for "qcom,apq8064-slim" SOC.</div><div class='del'>- - compatible : should be "qcom,&lt;SOC-NAME&gt;-slim" for SOC specific compatible</div><div class='del'>- 		followed by "qcom,slim" for fallback.</div><div class='del'>- - interrupts : Interrupt number used by this controller</div><div class='del'>- - clocks : Interface and core clocks used by this SLIMbus controller</div><div class='del'>- - clock-names : Required clock-name entries are:</div><div class='del'>-	"iface" : Interface clock for this controller</div><div class='del'>-	"core" : Interrupt for controller core's BAM</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	slim@28080000 {</div><div class='del'>-		compatible = "qcom,apq8064-slim", "qcom,slim";</div><div class='del'>-		reg = &lt;0x28080000 0x2000&gt;, &lt;0x80207C 4&gt;;</div><div class='del'>-		reg-names = "ctrl", "slew";</div><div class='del'>-		interrupts = &lt;0 33 0&gt;;</div><div class='del'>-		clocks = &lt;&amp;lcc SLIMBUS_SRC&gt;, &lt;&amp;lcc AUDIO_SLIMBUS_CLK&gt;;</div><div class='del'>-		clock-names = "iface", "core";</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cell = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		wcd9310: audio-codec@1,0{</div><div class='del'>-			compatible = "slim217,60";</div><div class='del'>-			reg = &lt;1 0&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/slimbus/slimbus.yaml b/Documentation/devicetree/bindings/slimbus/slimbus.yaml<br/>new file mode 100644<br/>index 000000000000..22513fb7c59a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/slimbus/slimbus.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/slimbus/slimbus.yaml</a></div><div class='hunk'>@@ -0,0 +1,95 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/slimbus/slimbus.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SLIM (Serial Low Power Interchip Media) bus</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SLIMbus is a 2-wire bus, and is used to communicate with peripheral</div><div class='add'>+  components like audio-codec.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^slim(@.*|-[0-9a-f])*$"</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^.*@[0-9a-f]+,[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description: |</div><div class='add'>+      Every SLIMbus controller node can contain zero or more child nodes</div><div class='add'>+      representing slave devices on the bus. Every SLIMbus slave device is</div><div class='add'>+      uniquely determined by the enumeration address containing 4 fields::</div><div class='add'>+      Manufacturer ID, Product code, Device index, and Instance value for the</div><div class='add'>+      device.</div><div class='add'>+</div><div class='add'>+      If child node is not present and it is instantiated after device</div><div class='add'>+      discovery (slave device reporting itself present).</div><div class='add'>+</div><div class='add'>+      In some cases it may be necessary to describe non-probeable device</div><div class='add'>+      details such as non-standard ways of powering up a device. In such cases,</div><div class='add'>+      child nodes for those devices will be present as slaves of the SLIMbus</div><div class='add'>+      controller.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        pattern: "^slim[0-9a-f]+,[0-9a-f]+$"</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description: |</div><div class='add'>+          Pair of (device index, instande ID), where::</div><div class='add'>+           - Device index, which uniquely identifies multiple devices within a</div><div class='add'>+             single component.</div><div class='add'>+           - Instance ID, can be used for the cases where multiple devices of</div><div class='add'>+             the same type or class are attached to the bus.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    additionalProperties: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8960.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lcc-msm8960.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        slim@28080000 {</div><div class='add'>+            compatible = "qcom,apq8064-slim", "qcom,slim";</div><div class='add'>+            reg = &lt;0x28080000 0x2000&gt;, &lt;0x80207c 4&gt;;</div><div class='add'>+            reg-names = "ctrl", "slew";</div><div class='add'>+            interrupts = &lt;GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;lcc SLIMBUS_SRC&gt;, &lt;&amp;lcc AUDIO_SLIMBUS_CLK&gt;;</div><div class='add'>+            clock-names = "iface", "core";</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            audio-codec@1,0 {</div><div class='add'>+                compatible = "slim217,60";</div><div class='add'>+                reg = &lt;1 0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml<br/>index 02b2d5ba01d6..cd06865e1f2a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/amlogic/amlogic,canvas.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/amlogic/amlogic,canvas.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/amlogic/amlogic,canvas.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Canvas Video Lookup Table</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'>   - Maxime Jourdan &lt;mjourdan@baylibre.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='hunk'>@@ -48,4 +48,3 @@ examples:</div><div class='ctx'>         compatible = "amlogic,canvas";</div><div class='ctx'>         reg = &lt;0x48 0x14&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml<br/>new file mode 100644<br/>index 000000000000..77c281153010<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/amlogic/amlogic,meson-gx-clk-measure.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Internal Clock Measurer</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Amlogic SoCs contains an IP to measure the internal clocks.</div><div class='add'>+  The precision is multiple of MHz, useful to debug the clock states.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,meson-gx-clk-measure</div><div class='add'>+      - amlogic,meson8-clk-measure</div><div class='add'>+      - amlogic,meson8b-clk-measure</div><div class='add'>+      - amlogic,meson-axg-clk-measure</div><div class='add'>+      - amlogic,meson-g12a-clk-measure</div><div class='add'>+      - amlogic,meson-sm1-clk-measure</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    clock-measure@8758 {</div><div class='add'>+        compatible = "amlogic,meson-gx-clk-measure";</div><div class='add'>+        reg = &lt;0x8758 0x10&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt b/Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt<br/>deleted file mode 100644<br/>index 3dd563cec794..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/amlogic/clk-measure.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-Amlogic Internal Clock Measurer</div><div class='del'>-===============================</div><div class='del'>-</div><div class='del'>-The Amlogic SoCs contains an IP to measure the internal clocks.</div><div class='del'>-The precision is multiple of MHz, useful to debug the clock states.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Shall contain one of the following :</div><div class='del'>-			"amlogic,meson-gx-clk-measure" for GX SoCs</div><div class='del'>-			"amlogic,meson8-clk-measure" for Meson8 SoCs</div><div class='del'>-			"amlogic,meson8b-clk-measure" for Meson8b SoCs</div><div class='del'>-			"amlogic,meson-axg-clk-measure" for AXG SoCs</div><div class='del'>-			"amlogic,meson-g12a-clk-measure" for G12a SoCs</div><div class='del'>-			"amlogic,meson-sm1-clk-measure" for SM1 SoCs</div><div class='del'>-- reg: base address and size of the Clock Measurer register space.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	clock-measure@8758 {</div><div class='del'>-		compatible = "amlogic,meson-gx-clk-measure";</div><div class='del'>-		reg = &lt;0x0 0x8758 0x0 0x10&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.txt b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.txt<br/>deleted file mode 100644<br/>index 72ff033565e5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-BCM2835 PM (Power domains, watchdog)</div><div class='del'>-</div><div class='del'>-The PM block controls power domains and some reset lines, and includes</div><div class='del'>-a watchdog timer.  This binding supersedes the brcm,bcm2835-pm-wdt</div><div class='del'>-binding which covered some of PM's register range and functionality.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible:		Should be "brcm,bcm2835-pm"</div><div class='del'>-- reg:			Specifies base physical address and size of the two</div><div class='del'>-			  register ranges ("PM" and "ASYNC_BRIDGE" in that</div><div class='del'>-			  order)</div><div class='del'>-- clocks:		a) v3d: The V3D clock from CPRMAN</div><div class='del'>-			b) peri_image: The PERI_IMAGE clock from CPRMAN</div><div class='del'>-			c) h264: The H264 clock from CPRMAN</div><div class='del'>-			d) isp: The ISP clock from CPRMAN</div><div class='del'>-- #reset-cells: 	Should be 1.  This property follows the reset controller</div><div class='del'>-			  bindings[1].</div><div class='del'>-- #power-domain-cells:	Should be 1.  This property follows the power domain</div><div class='del'>-			  bindings[2].</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- timeout-sec:		Contains the watchdog timeout in seconds</div><div class='del'>-- system-power-controller: Whether the watchdog is controlling the</div><div class='del'>-    system power.  This node follows the power controller bindings[3].</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/reset/reset.txt</div><div class='del'>-[2] Documentation/devicetree/bindings/power/power-domain.yaml</div><div class='del'>-[3] Documentation/devicetree/bindings/power/power-controller.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-pm {</div><div class='del'>-	compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";</div><div class='del'>-	#power-domain-cells = &lt;1&gt;;</div><div class='del'>-	#reset-cells = &lt;1&gt;;</div><div class='del'>-	reg = &lt;0x7e100000 0x114&gt;,</div><div class='del'>-	      &lt;0x7e00a000 0x24&gt;;</div><div class='del'>-	clocks = &lt;&amp;clocks BCM2835_CLOCK_V3D&gt;,</div><div class='del'>-		 &lt;&amp;clocks BCM2835_CLOCK_PERI_IMAGE&gt;,</div><div class='del'>-		 &lt;&amp;clocks BCM2835_CLOCK_H264&gt;,</div><div class='del'>-		 &lt;&amp;clocks BCM2835_CLOCK_ISP&gt;;</div><div class='del'>-	clock-names = "v3d", "peri_image", "h264", "isp";</div><div class='del'>-	system-power-controller;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml b/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml<br/>new file mode 100644<br/>index 000000000000..e28ef198a801<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-pm.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/bcm/brcm,bcm2835-pm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: BCM2835 PM (Power domains, watchdog)</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The PM block controls power domains and some reset lines, and includes a</div><div class='add'>+  watchdog timer.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nicolas Saenz Julienne &lt;nsaenz@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/watchdog/watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - brcm,bcm2835-pm</div><div class='add'>+          - brcm,bcm2711-pm</div><div class='add'>+      - const: brcm,bcm2835-pm-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: pm</div><div class='add'>+      - const: asb</div><div class='add'>+      - const: rpivid_asb</div><div class='add'>+</div><div class='add'>+  "#power-domain-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: v3d</div><div class='add'>+      - const: peri_image</div><div class='add'>+      - const: h264</div><div class='add'>+      - const: isp</div><div class='add'>+</div><div class='add'>+  system-power-controller:</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  timeout-sec: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#power-domain-cells"</div><div class='add'>+  - "#reset-cells"</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/bcm2835.h&gt;</div><div class='add'>+</div><div class='add'>+    watchdog@7e100000 {</div><div class='add'>+        compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+        #reset-cells = &lt;1&gt;;</div><div class='add'>+        reg = &lt;0x7e100000 0x114&gt;,</div><div class='add'>+              &lt;0x7e00a000 0x24&gt;;</div><div class='add'>+        reg-names = "pm", "asb";</div><div class='add'>+        clocks = &lt;&amp;clocks BCM2835_CLOCK_V3D&gt;,</div><div class='add'>+               &lt;&amp;clocks BCM2835_CLOCK_PERI_IMAGE&gt;,</div><div class='add'>+               &lt;&amp;clocks BCM2835_CLOCK_H264&gt;,</div><div class='add'>+               &lt;&amp;clocks BCM2835_CLOCK_ISP&gt;;</div><div class='add'>+        clock-names = "v3d", "peri_image", "h264", "isp";</div><div class='add'>+        system-power-controller;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml<br/>new file mode 100644<br/>index 000000000000..ec888f48cac8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,162 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: PowerQUICC CPM QUICC Multichannel Controller (QMC)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Herve Codina &lt;herve.codina@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one</div><div class='add'>+  serial controller using the same TDM physical interface routed from TSA.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,mpc885-scc-qmc</div><div class='add'>+          - fsl,mpc866-scc-qmc</div><div class='add'>+      - const: fsl,cpm1-scc-qmc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: SCC (Serial communication controller) register base</div><div class='add'>+      - description: SCC parameter ram base</div><div class='add'>+      - description: Dual port ram base</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: scc_regs</div><div class='add'>+      - const: scc_pram</div><div class='add'>+      - const: dpram</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: SCC interrupt line in the CPM interrupt controller</div><div class='add'>+</div><div class='add'>+  fsl,tsa-serial:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to TSA node</div><div class='add'>+          - enum: [1, 2, 3]</div><div class='add'>+            description: |</div><div class='add'>+              TSA serial interface (dt-bindings/soc/cpm1-fsl,tsa.h defines these</div><div class='add'>+              values)</div><div class='add'>+               - 1: SCC2</div><div class='add'>+               - 2: SCC3</div><div class='add'>+               - 3: SCC4</div><div class='add'>+    description:</div><div class='add'>+      Should be a phandle/number pair. The phandle to TSA node and the TSA</div><div class='add'>+      serial interface to use.</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^channel@([0-9]|[1-5][0-9]|6[0-3])$':</div><div class='add'>+    description:</div><div class='add'>+      A channel managed by this controller</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 63</div><div class='add'>+        description:</div><div class='add'>+          The channel number</div><div class='add'>+</div><div class='add'>+      fsl,operational-mode:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        enum: [transparent, hdlc]</div><div class='add'>+        default: transparent</div><div class='add'>+        description: |</div><div class='add'>+          The channel operational mode</div><div class='add'>+            - hdlc: The channel handles HDLC frames</div><div class='add'>+            - transparent: The channel handles raw data without any processing</div><div class='add'>+</div><div class='add'>+      fsl,reverse-data:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          The bit order as seen on the channels is reversed,</div><div class='add'>+          transmitting/receiving the MSB of each octet first.</div><div class='add'>+          This flag is used only in 'transparent' mode.</div><div class='add'>+</div><div class='add'>+      fsl,tx-ts-mask:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint64</div><div class='add'>+        description:</div><div class='add'>+          Channel assigned Tx time-slots within the Tx time-slots routed by the</div><div class='add'>+          TSA to this cell.</div><div class='add'>+</div><div class='add'>+      fsl,rx-ts-mask:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint64</div><div class='add'>+        description:</div><div class='add'>+          Channel assigned Rx time-slots within the Rx time-slots routed by the</div><div class='add'>+          TSA to this cell.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - fsl,tx-ts-mask</div><div class='add'>+      - fsl,rx-ts-mask</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - fsl,tsa-serial</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/cpm1-fsl,tsa.h&gt;</div><div class='add'>+</div><div class='add'>+    qmc@a60 {</div><div class='add'>+        compatible = "fsl,mpc885-scc-qmc", "fsl,cpm1-scc-qmc";</div><div class='add'>+        reg = &lt;0xa60 0x20&gt;,</div><div class='add'>+              &lt;0x3f00 0xc0&gt;,</div><div class='add'>+              &lt;0x2000 0x1000&gt;;</div><div class='add'>+        reg-names = "scc_regs", "scc_pram", "dpram";</div><div class='add'>+        interrupts = &lt;27&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;CPM_PIC&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        fsl,tsa-serial = &lt;&amp;tsa FSL_CPM_TSA_SCC4&gt;;</div><div class='add'>+</div><div class='add'>+        channel@16 {</div><div class='add'>+            /* Ch16 : First 4 even TS from all routed from TSA */</div><div class='add'>+            reg = &lt;16&gt;;</div><div class='add'>+            fsl,mode = "transparent";</div><div class='add'>+            fsl,reverse-data;</div><div class='add'>+            fsl,tx-ts-mask = &lt;0x00000000 0x000000aa&gt;;</div><div class='add'>+            fsl,rx-ts-mask = &lt;0x00000000 0x000000aa&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@17 {</div><div class='add'>+            /* Ch17 : First 4 odd TS from all routed from TSA */</div><div class='add'>+            reg = &lt;17&gt;;</div><div class='add'>+            fsl,mode = "transparent";</div><div class='add'>+            fsl,reverse-data;</div><div class='add'>+            fsl,tx-ts-mask = &lt;0x00000000 0x00000055&gt;;</div><div class='add'>+            fsl,rx-ts-mask = &lt;0x00000000 0x00000055&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        channel@19 {</div><div class='add'>+            /* Ch19 : 8 TS (TS 8..15) from all routed from TSA */</div><div class='add'>+            reg = &lt;19&gt;;</div><div class='add'>+            fsl,mode = "hdlc";</div><div class='add'>+            fsl,tx-ts-mask = &lt;0x00000000 0x0000ff00&gt;;</div><div class='add'>+            fsl,rx-ts-mask = &lt;0x00000000 0x0000ff00&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml b/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml<br/>new file mode 100644<br/>index 000000000000..7e51c639a79a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml</a></div><div class='hunk'>@@ -0,0 +1,205 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: PowerQUICC CPM Time-slot assigner (TSA) controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Herve Codina &lt;herve.codina@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.</div><div class='add'>+  Its purpose is to route some TDM time-slots to other internal serial</div><div class='add'>+  controllers.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,mpc885-tsa</div><div class='add'>+          - fsl,mpc866-tsa</div><div class='add'>+      - const: fsl,cpm1-tsa</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: SI (Serial Interface) register base</div><div class='add'>+      - description: SI RAM base</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: si_regs</div><div class='add'>+      - const: si_ram</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^tdm@[0-1]$':</div><div class='add'>+    description:</div><div class='add'>+      The TDM managed by this controller</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        description:</div><div class='add'>+          The TDM number for this TDM, 0 for TDMa and 1 for TDMb</div><div class='add'>+</div><div class='add'>+      fsl,common-rxtx-pins:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          The hardware can use four dedicated pins for Tx clock, Tx sync, Rx</div><div class='add'>+          clock and Rx sync or use only two pins, Tx/Rx clock and Tx/Rx sync.</div><div class='add'>+          Without the 'fsl,common-rxtx-pins' property, the four pins are used.</div><div class='add'>+          With the 'fsl,common-rxtx-pins' property, two pins are used.</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        minItems: 2</div><div class='add'>+        items:</div><div class='add'>+          - description: External clock connected to L1RSYNC pin</div><div class='add'>+          - description: External clock connected to L1RCLK pin</div><div class='add'>+          - description: External clock connected to L1TSYNC pin</div><div class='add'>+          - description: External clock connected to L1TCLK pin</div><div class='add'>+</div><div class='add'>+      clock-names:</div><div class='add'>+        minItems: 2</div><div class='add'>+        items:</div><div class='add'>+          - const: l1rsync</div><div class='add'>+          - const: l1rclk</div><div class='add'>+          - const: l1tsync</div><div class='add'>+          - const: l1tclk</div><div class='add'>+</div><div class='add'>+      fsl,rx-frame-sync-delay-bits:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        default: 0</div><div class='add'>+        description: |</div><div class='add'>+          Receive frame sync delay in number of bits.</div><div class='add'>+          Indicates the delay between the Rx sync and the first bit of the Rx</div><div class='add'>+          frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.</div><div class='add'>+</div><div class='add'>+      fsl,tx-frame-sync-delay-bits:</div><div class='add'>+        enum: [0, 1, 2, 3]</div><div class='add'>+        default: 0</div><div class='add'>+        description: |</div><div class='add'>+          Transmit frame sync delay in number of bits.</div><div class='add'>+          Indicates the delay between the Tx sync and the first bit of the Tx</div><div class='add'>+          frame. 0 for no bit delay. 1, 2 or 3 for 1, 2 or 3 bits delay.</div><div class='add'>+</div><div class='add'>+      fsl,clock-falling-edge:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          Data is sent on falling edge of the clock (and received on the rising</div><div class='add'>+          edge). If 'clock-falling-edge' is not present, data is sent on the</div><div class='add'>+          rising edge (and received on the falling edge).</div><div class='add'>+</div><div class='add'>+      fsl,fsync-rising-edge:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          Frame sync pulses are sampled with the rising edge of the channel</div><div class='add'>+          clock. If 'fsync-rising-edge' is not present, pulses are sampled with</div><div class='add'>+          the falling edge.</div><div class='add'>+</div><div class='add'>+      fsl,double-speed-clock:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          The channel clock is twice the data rate.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^fsl,[rt]x-ts-routes$':</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+        description: |</div><div class='add'>+          A list of tuple that indicates the Tx or Rx time-slots routes.</div><div class='add'>+        items:</div><div class='add'>+          items:</div><div class='add'>+            - description:</div><div class='add'>+                The number of time-slots</div><div class='add'>+              minimum: 1</div><div class='add'>+              maximum: 64</div><div class='add'>+            - description: |</div><div class='add'>+                The source (Tx) or destination (Rx) serial interface</div><div class='add'>+                (dt-bindings/soc/cpm1-fsl,tsa.h defines these values)</div><div class='add'>+                 - 0: No destination</div><div class='add'>+                 - 1: SCC2</div><div class='add'>+                 - 2: SCC3</div><div class='add'>+                 - 3: SCC4</div><div class='add'>+                 - 4: SMC1</div><div class='add'>+                 - 5: SMC2</div><div class='add'>+              enum: [0, 1, 2, 3, 4, 5]</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 64</div><div class='add'>+</div><div class='add'>+    allOf:</div><div class='add'>+      # If fsl,common-rxtx-pins is present, only 2 clocks are needed.</div><div class='add'>+      # Else, the 4 clocks must be present.</div><div class='add'>+      - if:</div><div class='add'>+          required:</div><div class='add'>+            - fsl,common-rxtx-pins</div><div class='add'>+        then:</div><div class='add'>+          properties:</div><div class='add'>+            clocks:</div><div class='add'>+              maxItems: 2</div><div class='add'>+            clock-names:</div><div class='add'>+              maxItems: 2</div><div class='add'>+        else:</div><div class='add'>+          properties:</div><div class='add'>+            clocks:</div><div class='add'>+              minItems: 4</div><div class='add'>+            clock-names:</div><div class='add'>+              minItems: 4</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - clocks</div><div class='add'>+      - clock-names</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/cpm1-fsl,tsa.h&gt;</div><div class='add'>+</div><div class='add'>+    tsa@ae0 {</div><div class='add'>+        compatible = "fsl,mpc885-tsa", "fsl,cpm1-tsa";</div><div class='add'>+        reg = &lt;0xae0 0x10&gt;,</div><div class='add'>+              &lt;0xc00 0x200&gt;;</div><div class='add'>+        reg-names = "si_regs", "si_ram";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        tdm@0 {</div><div class='add'>+            /* TDMa */</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            clocks = &lt;&amp;clk_l1rsynca&gt;, &lt;&amp;clk_l1rclka&gt;;</div><div class='add'>+            clock-names = "l1rsync", "l1rclk";</div><div class='add'>+</div><div class='add'>+            fsl,common-rxtx-pins;</div><div class='add'>+            fsl,fsync-rising-edge;</div><div class='add'>+</div><div class='add'>+            fsl,tx-ts-routes = &lt;2 0&gt;,             /* TS 0..1 */</div><div class='add'>+                           &lt;24 FSL_CPM_TSA_SCC4&gt;, /* TS 2..25 */</div><div class='add'>+                           &lt;1 0&gt;,                 /* TS 26 */</div><div class='add'>+                           &lt;5 FSL_CPM_TSA_SCC3&gt;;  /* TS 27..31 */</div><div class='add'>+</div><div class='add'>+            fsl,rx-ts-routes = &lt;2 0&gt;,             /* TS 0..1 */</div><div class='add'>+                           &lt;24 FSL_CPM_TSA_SCC4&gt;, /* 2..25 */</div><div class='add'>+                           &lt;1 0&gt;,                 /* TS 26 */</div><div class='add'>+                           &lt;5 FSL_CPM_TSA_SCC3&gt;;  /* TS 27..31 */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-dcfg.yaml b/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-dcfg.yaml<br/>new file mode 100644<br/>index 000000000000..397f75909b20<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-dcfg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-dcfg.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/fsl/fsl,layerscape-dcfg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Layerscape Device Configuration Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='add'>+  - Li Yang &lt;leoyang.li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  DCFG is the device configuration unit, that provides general purpose</div><div class='add'>+  configuration and status for the device. Such as setting the secondary</div><div class='add'>+  core start address and release the secondary core from holdoff and</div><div class='add'>+  startup.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,ls1012a-dcfg</div><div class='add'>+              - fsl,ls1021a-dcfg</div><div class='add'>+              - fsl,ls1043a-dcfg</div><div class='add'>+              - fsl,ls1046a-dcfg</div><div class='add'>+              - fsl,ls1088a-dcfg</div><div class='add'>+              - fsl,ls2080a-dcfg</div><div class='add'>+              - fsl,lx2160a-dcfg</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,ls1028a-dcfg</div><div class='add'>+          - const: syscon</div><div class='add'>+          - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  little-endian: true</div><div class='add'>+  big-endian: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^clock-controller@[0-9a-z]+$":</div><div class='add'>+    $ref: /schemas/clock/fsl,flexspi-clock.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@1ee0000 {</div><div class='add'>+        compatible = "fsl,ls1021a-dcfg", "syscon";</div><div class='add'>+        reg = &lt;0x1ee0000 0x10000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-scfg.yaml b/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-scfg.yaml<br/>new file mode 100644<br/>index 000000000000..8d088b5fe823<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-scfg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/fsl/fsl,layerscape-scfg.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/fsl/fsl,layerscape-scfg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Layerscape Supplemental Configuration Unit</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='add'>+  - Li Yang &lt;leoyang.li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  SCFG is the supplemental configuration unit, that provides SoC specific</div><div class='add'>+  configuration and status registers for the chip. Such as getting PEX port</div><div class='add'>+  status.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,ls1012a-scfg</div><div class='add'>+          - fsl,ls1021a-scfg</div><div class='add'>+          - fsl,ls1028a-scfg</div><div class='add'>+          - fsl,ls1043a-scfg</div><div class='add'>+          - fsl,ls1046a-scfg</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  little-endian: true</div><div class='add'>+  big-endian: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^interrupt-controller@[a-z0-9]+$":</div><div class='add'>+    $ref: /schemas/interrupt-controller/fsl,ls-extirq.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@1570000 {</div><div class='add'>+        compatible = "fsl,ls1021a-scfg", "syscon";</div><div class='add'>+        reg = &lt;0x1570000 0x10000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml<br/>new file mode 100644<br/>index 000000000000..1da1b758b4ae<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx-iomuxc-gpr.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale IOMUX Controller General Purpose Registers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  i.MX Processors have an IOMUXC General Purpose Register group for</div><div class='add'>+  various System Settings</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx8mq-iomuxc-gpr</div><div class='add'>+          - const: syscon</div><div class='add'>+          - const: simple-mfd</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mm-iomuxc-gpr</div><div class='add'>+              - fsl,imx8mn-iomuxc-gpr</div><div class='add'>+              - fsl,imx8mp-iomuxc-gpr</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mux-controller:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/mux/reg-mux.yaml</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # Pinmux controller node</div><div class='add'>+  - |</div><div class='add'>+    iomuxc_gpr: syscon@30340000 {</div><div class='add'>+        compatible = "fsl,imx8mq-iomuxc-gpr", "syscon", "simple-mfd";</div><div class='add'>+        reg = &lt;0x30340000 0x10000&gt;;</div><div class='add'>+</div><div class='add'>+        mux: mux-controller {</div><div class='add'>+            compatible = "mmio-mux";</div><div class='add'>+            #mux-control-cells = &lt;1&gt;;</div><div class='add'>+            mux-reg-masks = &lt;0x34 0x00000004&gt;; /* MIPI_MUX_SEL */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml<br/>index ecd86cfb3da4..a02a09d574a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml</a></div><div class='hunk'>@@ -70,7 +70,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/imx8mm-clock.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/imx8mm-power.h&gt;</div><div class='ctx'> </div><div class='del'>-    disp_blk_ctl: blk_ctrl@32e28000 {</div><div class='add'>+    blk-ctrl@32e28000 {</div><div class='ctx'>       compatible = "fsl,imx8mm-disp-blk-ctrl", "syscon";</div><div class='ctx'>       reg = &lt;0x32e28000 0x100&gt;;</div><div class='ctx'>       power-domains = &lt;&amp;pgc_dispmix&gt;, &lt;&amp;pgc_dispmix&gt;, &lt;&amp;pgc_dispmix&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml<br/>index 26487daa64d9..25109376d7d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml</a></div><div class='hunk'>@@ -27,25 +27,22 @@ properties:</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='del'>-    minItems: 4</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   power-domain-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: bus</div><div class='del'>-      - const: g1</div><div class='del'>-      - const: g2</div><div class='del'>-      - const: h1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 3</div><div class='ctx'>     maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: g1</div><div class='del'>-      - const: g2</div><div class='del'>-      - const: h1</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -55,6 +52,97 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8mm-vpu-blk-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: bus power domain</div><div class='add'>+            - description: G1 decoder power domain</div><div class='add'>+            - description: G2 decoder power domain</div><div class='add'>+            - description: H1 encoder power domain</div><div class='add'>+</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: g1</div><div class='add'>+            - const: g2</div><div class='add'>+            - const: h1</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: G1 decoder clk</div><div class='add'>+            - description: G2 decoder clk</div><div class='add'>+            - description: H1 encoder clk</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: g1</div><div class='add'>+            - const: g2</div><div class='add'>+            - const: h1</div><div class='add'>+</div><div class='add'>+        interconnects:</div><div class='add'>+          items:</div><div class='add'>+            - description: G1 decoder interconnect</div><div class='add'>+            - description: G2 decoder interconnect</div><div class='add'>+            - description: H1 encoder power domain</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: g1</div><div class='add'>+            - const: g2</div><div class='add'>+            - const: h1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: fsl,imx8mp-vpu-blk-ctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        power-domains:</div><div class='add'>+          items:</div><div class='add'>+            - description: bus power domain</div><div class='add'>+            - description: G1 decoder power domain</div><div class='add'>+            - description: G2 decoder power domain</div><div class='add'>+            - description: VC8000E encoder power domain</div><div class='add'>+</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: bus</div><div class='add'>+            - const: g1</div><div class='add'>+            - const: g2</div><div class='add'>+            - const: vc8000e</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: G1 decoder clk</div><div class='add'>+            - description: G2 decoder clk</div><div class='add'>+            - description: VC8000E encoder clk</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: g1</div><div class='add'>+            - const: g2</div><div class='add'>+            - const: vc8000e</div><div class='add'>+</div><div class='add'>+        interconnects:</div><div class='add'>+          items:</div><div class='add'>+            - description: G1 decoder interconnect</div><div class='add'>+            - description: G2 decoder interconnect</div><div class='add'>+            - description: VC8000E encoder interconnect</div><div class='add'>+</div><div class='add'>+        interconnect-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: g1</div><div class='add'>+            - const: g2</div><div class='add'>+            - const: vc8000e</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -62,7 +150,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/imx8mm-clock.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/imx8mm-power.h&gt;</div><div class='ctx'> </div><div class='del'>-    vpu_blk_ctrl: blk-ctrl@38330000 {</div><div class='add'>+    blk-ctrl@38330000 {</div><div class='ctx'>       compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";</div><div class='ctx'>       reg = &lt;0x38330000 0x100&gt;;</div><div class='ctx'>       power-domains = &lt;&amp;pgc_vpumix&gt;, &lt;&amp;pgc_vpu_g1&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml<br/>index fbeaac399c50..eeec9965b091 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml</a></div><div class='hunk'>@@ -71,7 +71,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/imx8mn-clock.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/imx8mn-power.h&gt;</div><div class='ctx'> </div><div class='del'>-    disp_blk_ctl: blk_ctrl@32e28000 {</div><div class='add'>+    blk-ctrl@32e28000 {</div><div class='ctx'>       compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";</div><div class='ctx'>       reg = &lt;0x32e28000 0x100&gt;;</div><div class='ctx'>       power-domains = &lt;&amp;pgc_dispmix&gt;, &lt;&amp;pgc_dispmix&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml<br/>new file mode 100644<br/>index 000000000000..1be4ce2a45e8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,93 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX8MP HDMI blk-ctrl</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lucas Stach &lt;l.stach@pengutronix.de&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to</div><div class='add'>+  the NoC and ensuring proper power sequencing of the display pipeline</div><div class='add'>+  peripherals located in the HDMI domain of the SoC.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx8mp-hdmi-blk-ctrl</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 8</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: irqsteer</div><div class='add'>+      - const: lcdif</div><div class='add'>+      - const: pai</div><div class='add'>+      - const: pvi</div><div class='add'>+      - const: trng</div><div class='add'>+      - const: hdmi-tx</div><div class='add'>+      - const: hdmi-tx-phy</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: ref_266m</div><div class='add'>+      - const: ref_24m</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hrv</div><div class='add'>+      - const: lcdif-hdmi</div><div class='add'>+      - const: hdcp</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/imx8mp-power.h&gt;</div><div class='add'>+</div><div class='add'>+    blk-ctrl@32fc0000 {</div><div class='add'>+        compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";</div><div class='add'>+        reg = &lt;0x32fc0000 0x23c&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MP_CLK_HDMI_APB&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_HDMI_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_HDMI_REF_266M&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_HDMI_24M&gt;;</div><div class='add'>+        clock-names = "apb", "axi", "ref_266m", "ref_24m";</div><div class='add'>+        power-domains = &lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;,</div><div class='add'>+                        &lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmimix&gt;,</div><div class='add'>+                        &lt;&amp;pgc_hdmimix&gt;, &lt;&amp;pgc_hdmi_phy&gt;;</div><div class='add'>+        power-domain-names = "bus", "irqsteer", "lcdif", "pai", "pvi", "trng",</div><div class='add'>+                             "hdmi-tx", "hdmi-tx-phy";</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml<br/>index c1e29d94f40e..4214c1ab4971 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml</a></div><div class='hunk'>@@ -39,6 +39,9 @@ properties:</div><div class='ctx'>       - const: pcie</div><div class='ctx'>       - const: pcie-phy</div><div class='ctx'> </div><div class='add'>+  '#clock-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -48,6 +51,16 @@ properties:</div><div class='ctx'>       - const: usb</div><div class='ctx'>       - const: pcie</div><div class='ctx'> </div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: noc-pcie</div><div class='add'>+      - const: usb1</div><div class='add'>+      - const: usb2</div><div class='add'>+      - const: pcie</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -63,7 +76,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/imx8mp-power.h&gt;</div><div class='ctx'> </div><div class='del'>-    hsio_blk_ctrl: blk-ctrl@32f10000 {</div><div class='add'>+    blk-ctrl@32f10000 {</div><div class='ctx'>         compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";</div><div class='ctx'>         reg = &lt;0x32f10000 0x24&gt;;</div><div class='ctx'>         clocks = &lt;&amp;clk IMX8MP_CLK_USB_ROOT&gt;,</div><div class='hunk'>@@ -75,4 +88,5 @@ examples:</div><div class='ctx'>         power-domain-names = "bus", "usb", "usb-phy1",</div><div class='ctx'>                              "usb-phy2", "pcie", "pcie-phy";</div><div class='ctx'>         #power-domain-cells = &lt;1&gt;;</div><div class='add'>+        #clock-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml<br/>new file mode 100644<br/>index 000000000000..ea9aa876ed13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,169 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX8MP Media Block Control</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Paul Elder &lt;paul.elder@ideasonboard.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral</div><div class='add'>+  providing access to the NoC and ensuring proper power sequencing of the</div><div class='add'>+  peripherals within the MEDIAMIX domain.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx8mp-media-blk-ctrl</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 10</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: mipi-dsi1</div><div class='add'>+      - const: mipi-csi1</div><div class='add'>+      - const: lcdif1</div><div class='add'>+      - const: isi</div><div class='add'>+      - const: mipi-csi2</div><div class='add'>+      - const: lcdif2</div><div class='add'>+      - const: isp</div><div class='add'>+      - const: dwe</div><div class='add'>+      - const: mipi-dsi2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The APB clock</div><div class='add'>+      - description: The AXI clock</div><div class='add'>+      - description: The pixel clock for the first CSI2 receiver (aclk)</div><div class='add'>+      - description: The pixel clock for the second CSI2 receiver (aclk)</div><div class='add'>+      - description: The pixel clock for the first LCDIF (pix_clk)</div><div class='add'>+      - description: The pixel clock for the second LCDIF (pix_clk)</div><div class='add'>+      - description: The core clock for the ISP (clk)</div><div class='add'>+      - description: The MIPI-PHY reference clock used by DSI</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: cam1</div><div class='add'>+      - const: cam2</div><div class='add'>+      - const: disp1</div><div class='add'>+      - const: disp2</div><div class='add'>+      - const: isp</div><div class='add'>+      - const: phy</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: lcdif-rd</div><div class='add'>+      - const: lcdif-wr</div><div class='add'>+      - const: isi0</div><div class='add'>+      - const: isi1</div><div class='add'>+      - const: isi2</div><div class='add'>+      - const: isp0</div><div class='add'>+      - const: isp1</div><div class='add'>+      - const: dwe</div><div class='add'>+</div><div class='add'>+  bridge@5c:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/display/bridge/fsl,ldb.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - '#power-domain-cells'</div><div class='add'>+  - power-domains</div><div class='add'>+  - power-domain-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/imx8mp-power.h&gt;</div><div class='add'>+</div><div class='add'>+    blk-ctrl@32ec0000 {</div><div class='add'>+        compatible = "fsl,imx8mp-media-blk-ctrl", "syscon";</div><div class='add'>+        reg = &lt;0x32ec0000 0x138&gt;;</div><div class='add'>+        power-domains = &lt;&amp;mediamix_pd&gt;, &lt;&amp;mipi_phy1_pd&gt;, &lt;&amp;mipi_phy1_pd&gt;,</div><div class='add'>+                        &lt;&amp;mediamix_pd&gt;, &lt;&amp;mediamix_pd&gt;, &lt;&amp;mipi_phy2_pd&gt;,</div><div class='add'>+                        &lt;&amp;mediamix_pd&gt;, &lt;&amp;ispdwp_pd&gt;, &lt;&amp;ispdwp_pd&gt;,</div><div class='add'>+                        &lt;&amp;mipi_phy2_pd&gt;;</div><div class='add'>+        power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", "lcdif1", "isi",</div><div class='add'>+                             "mipi-csi2", "lcdif2", "isp", "dwe", "mipi-dsi2";</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_APB_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_AXI_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_ISP_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT&gt;;</div><div class='add'>+        clock-names = "apb", "axi", "cam1", "cam2", "disp1", "disp2",</div><div class='add'>+                      "isp", "phy";</div><div class='add'>+        #power-domain-cells = &lt;1&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        bridge@5c {</div><div class='add'>+            compatible = "fsl,imx8mp-ldb";</div><div class='add'>+            reg = &lt;0x5c 0x4&gt;, &lt;0x128 0x4&gt;;</div><div class='add'>+            reg-names = "ldb", "lvds";</div><div class='add'>+            clocks = &lt;&amp;clk IMX8MP_CLK_MEDIA_LDB&gt;;</div><div class='add'>+            clock-names = "ldb";</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    ldb_from_lcdif2: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;lcdif2_to_ldb&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                    ldb_lvds_ch0: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;ldb_to_lvdsx4panel&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+                    ldb_lvds_ch1: endpoint {</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml<br/>index 7263ebedf09f..ea5c90c6a1b6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml</a></div><div class='hunk'>@@ -59,7 +59,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/imx8mq-clock.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/imx8mq-power.h&gt;</div><div class='ctx'> </div><div class='del'>-    vpu_blk_ctrl: blk-ctrl@38320000 {</div><div class='add'>+    blk-ctrl@38320000 {</div><div class='ctx'>       compatible = "fsl,imx8mq-vpu-blk-ctrl";</div><div class='ctx'>       reg = &lt;0x38320000 0x100&gt;;</div><div class='ctx'>       power-domains = &lt;&amp;pgc_vpu&gt;, &lt;&amp;pgc_vpu&gt;, &lt;&amp;pgc_vpu&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml<br/>new file mode 100644<br/>index 000000000000..b3554e7f9e76<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX93 Media blk-ctrl</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The i.MX93 MEDIAMIX domain contains control and status registers known</div><div class='add'>+  as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include</div><div class='add'>+  clocking, reset, and miscellaneous top-level controls for peripherals</div><div class='add'>+  within the MEDIAMIX domain</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx93-media-blk-ctrl</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#power-domain-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 10</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: nic</div><div class='add'>+      - const: disp</div><div class='add'>+      - const: cam</div><div class='add'>+      - const: pxp</div><div class='add'>+      - const: lcdif</div><div class='add'>+      - const: isi</div><div class='add'>+      - const: csi</div><div class='add'>+      - const: dsi</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx93-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/fsl,imx93-power.h&gt;</div><div class='add'>+</div><div class='add'>+    system-controller@4ac10000 {</div><div class='add'>+      compatible = "fsl,imx93-media-blk-ctrl", "syscon";</div><div class='add'>+      reg = &lt;0x4ac10000 0x10000&gt;;</div><div class='add'>+      power-domains = &lt;&amp;mediamix&gt;;</div><div class='add'>+      clocks = &lt;&amp;clk IMX93_CLK_MEDIA_APB&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_MEDIA_AXI&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_NIC_MEDIA_GATE&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_MEDIA_DISP_PIX&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_CAM_PIX&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_PXP_GATE&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_LCDIF_GATE&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_ISI_GATE&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_MIPI_CSI_GATE&gt;,</div><div class='add'>+               &lt;&amp;clk IMX93_CLK_MIPI_DSI_GATE&gt;;</div><div class='add'>+               clock-names = "apb", "axi", "nic", "disp", "cam",</div><div class='add'>+                             "pxp", "lcdif", "isi", "csi", "dsi";</div><div class='add'>+      #power-domain-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml<br/>new file mode 100644<br/>index 000000000000..9ce8d8b427fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP i.MX93 System Reset Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The System Reset Controller (SRC) is responsible for the generation of</div><div class='add'>+  all the system reset signals and boot argument latching.</div><div class='add'>+</div><div class='add'>+  Its main functions are as follows,</div><div class='add'>+  - Deals with all global system reset sources from other modules,</div><div class='add'>+    and generates global system reset.</div><div class='add'>+  - Responsible for power gating of MIXs (Slices) and their memory</div><div class='add'>+    low power control.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx93-src</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "power-domain@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        items:</div><div class='add'>+          - const: fsl,imx93-src-slice</div><div class='add'>+</div><div class='add'>+      '#power-domain-cells':</div><div class='add'>+        const: 0</div><div class='add'>+</div><div class='add'>+      reg:</div><div class='add'>+        items:</div><div class='add'>+          - description: mix slice register region</div><div class='add'>+          - description: mem slice register region</div><div class='add'>+</div><div class='add'>+      clocks:</div><div class='add'>+        description: |</div><div class='add'>+          A number of phandles to clocks that need to be enabled</div><div class='add'>+          during domain power-up sequencing to ensure reset</div><div class='add'>+          propagation into devices located inside this power domain.</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 5</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - '#power-domain-cells'</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - ranges</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx93-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    system-controller@44460000 {</div><div class='add'>+        compatible = "fsl,imx93-src", "syscon";</div><div class='add'>+        reg = &lt;0x44460000 0x10000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        mediamix: power-domain@0 {</div><div class='add'>+            compatible = "fsl,imx93-src-slice";</div><div class='add'>+            reg = &lt;0x44462400 0x400&gt;, &lt;0x44465800 0x400&gt;;</div><div class='add'>+            #power-domain-cells = &lt;0&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk IMX93_CLK_MEDIA_AXI&gt;,</div><div class='add'>+                     &lt;&amp;clk IMX93_CLK_MEDIA_APB&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml b/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml<br/>new file mode 100644<br/>index 000000000000..8634865015cd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022, Intel Corporation</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: "http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml#"</div><div class='add'>+$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+</div><div class='add'>+title: Intel HPS Copy Engine</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthew Gerlach &lt;matthew.gerlach@linux.intel.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy</div><div class='add'>+  a bootable image from host memory to HPS DDR.  Additionally, there is a</div><div class='add'>+  register the HPS can use to indicate the state of booting the copied image as</div><div class='add'>+  well as a keep-a-live indication to the host.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: intel,hps-copy-engine</div><div class='add'>+</div><div class='add'>+  '#dma-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    bus@80000000 {</div><div class='add'>+        compatible = "simple-bus";</div><div class='add'>+        reg = &lt;0x80000000 0x60000000&gt;,</div><div class='add'>+              &lt;0xf9000000 0x00100000&gt;;</div><div class='add'>+        reg-names = "axi_h2f", "axi_h2f_lw";</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0x00000000 0x00000000 0xf9000000 0x00001000&gt;;</div><div class='add'>+</div><div class='add'>+        dma-controller@0 {</div><div class='add'>+            compatible = "intel,hps-copy-engine";</div><div class='add'>+            reg = &lt;0x00000000 0x00000000 0x00001000&gt;;</div><div class='add'>+            #dma-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml b/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml<br/>index 31e4d3c339bf..99e2caafeadf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/devapc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/devapc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/mediatek/devapc.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # # Copyright 2020 MediaTek Inc.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/mediatek/devapc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/mediatek/devapc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: MediaTek Device Access Permission Control driver</div><div class='ctx'> </div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - mediatek,mt6779-devapc</div><div class='add'>+      - mediatek,mt8186-devapc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description: The base address of devapc register bank</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml<br/>new file mode 100644<br/>index 000000000000..4380b98b0dfe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,ccorr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek color correction</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+  - Moudy Ho &lt;moudy.ho@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek color correction with 3X3 matrix.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8183-mdp3-ccorr</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle of GCE</div><div class='add'>+        - description: GCE subsys id</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: register size</div><div class='add'>+    description: The register of client driver can be configured by gce with</div><div class='add'>+      4 arguments defined in this property. Each GCE subsys id is mapping to</div><div class='add'>+      a client defined in the header include/dt-bindings/gce/&lt;chip&gt;-gce.h.</div><div class='add'>+</div><div class='add'>+  mediatek,gce-events:</div><div class='add'>+    description:</div><div class='add'>+      The event id which is mapping to the specific hardware event signal</div><div class='add'>+      to gce. The event id is defined in the gce header</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h of each chips.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - mediatek,gce-client-reg</div><div class='add'>+  - mediatek,gce-events</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8183-gce.h&gt;</div><div class='add'>+</div><div class='add'>+    mdp3_ccorr: mdp3-ccorr@1401c000 {</div><div class='add'>+      compatible = "mediatek,mt8183-mdp3-ccorr";</div><div class='add'>+      reg = &lt;0x1401c000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1401XXXX 0xc000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-events = &lt;CMDQ_EVENT_MDP_CCORR_SOF&gt;,</div><div class='add'>+                            &lt;CMDQ_EVENT_MDP_CCORR_EOF&gt;;</div><div class='add'>+      clocks = &lt;&amp;mmsys CLK_MM_MDP_CCORR&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml<br/>new file mode 100644<br/>index 000000000000..8e6ba2ec8a43<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/mediatek/mediatek,mt7986-wo-ccif.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt7986-wo-ccif.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Wireless Ethernet Dispatch (WED) WO controller interface for MT7986</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lorenzo Bianconi &lt;lorenzo@kernel.org&gt;</div><div class='add'>+  - Felix Fietkau &lt;nbd@nbd.name&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MediaTek wo-ccif provides a configuration interface for WED WO</div><div class='add'>+  controller used to perfrom offload rx packet processing (e.g. 802.11</div><div class='add'>+  aggregation packet reordering or rx header translation) on MT7986 soc.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt7986-wo-ccif</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      syscon@151a5000 {</div><div class='add'>+        compatible = "mediatek,mt7986-wo-ccif", "syscon";</div><div class='add'>+        reg = &lt;0 0x151a5000 0 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml<br/>index 00e6a1041a9b..ba2014a8725c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/display/mediatek/mediatek,mutex.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mutex.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Mediatek mutex</div><div class='hunk'>@@ -23,21 +23,21 @@ description: |</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    oneOf:</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt2701-disp-mutex</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt2712-disp-mutex</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8167-disp-mutex</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8173-disp-mutex</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8183-disp-mutex</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8192-disp-mutex</div><div class='del'>-      - items:</div><div class='del'>-          - const: mediatek,mt8195-disp-mutex</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt2701-disp-mutex</div><div class='add'>+      - mediatek,mt2712-disp-mutex</div><div class='add'>+      - mediatek,mt6795-disp-mutex</div><div class='add'>+      - mediatek,mt8167-disp-mutex</div><div class='add'>+      - mediatek,mt8173-disp-mutex</div><div class='add'>+      - mediatek,mt8183-disp-mutex</div><div class='add'>+      - mediatek,mt8186-disp-mutex</div><div class='add'>+      - mediatek,mt8186-mdp3-mutex</div><div class='add'>+      - mediatek,mt8188-disp-mutex</div><div class='add'>+      - mediatek,mt8192-disp-mutex</div><div class='add'>+      - mediatek,mt8195-disp-mutex</div><div class='add'>+      - mediatek,mt8195-vpp-mutex</div><div class='add'>+      - mediatek,mt8365-disp-mutex</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -60,12 +60,42 @@ properties:</div><div class='ctx'>       include/dt-bindings/gce/&lt;chip&gt;-gce.h of each chips.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'> </div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle of GCE</div><div class='add'>+        - description: GCE subsys id</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: register size</div><div class='add'>+    description: The register of client driver can be configured by gce with</div><div class='add'>+      4 arguments defined in this property. Each GCE subsys id is mapping to</div><div class='add'>+      a client defined in the header include/dt-bindings/gce/&lt;chip&gt;-gce.h.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt2701-disp-mutex</div><div class='add'>+              - mediatek,mt2712-disp-mutex</div><div class='add'>+              - mediatek,mt6795-disp-mutex</div><div class='add'>+              - mediatek,mt8173-disp-mutex</div><div class='add'>+              - mediatek,mt8186-disp-mutex</div><div class='add'>+              - mediatek,mt8186-mdp3-mutex</div><div class='add'>+              - mediatek,mt8192-disp-mutex</div><div class='add'>+              - mediatek,mt8195-disp-mutex</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - power-domains</div><div class='del'>-  - clocks</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml<br/>new file mode 100644<br/>index 000000000000..3fefd634bc69<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml</a></div><div class='hunk'>@@ -0,0 +1,147 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek PMIC Wrapper</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Flora Fu &lt;flora.fu@mediatek.com&gt;</div><div class='add'>+  - Alexandre Mergnat &lt;amergnat@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface</div><div class='add'>+  is not directly visible to the CPU, but only through the PMIC wrapper</div><div class='add'>+  inside the SoC. The communication between the SoC and the PMIC can</div><div class='add'>+  optionally be encrypted. Also a non standard Dual IO SPI mode can be</div><div class='add'>+  used to increase speed.</div><div class='add'>+</div><div class='add'>+  IP Pairing</div><div class='add'>+</div><div class='add'>+  On MT8135 the pins of some SoC internal peripherals can be on the PMIC.</div><div class='add'>+  The signals of these pins are routed over the SPI bus using the pwrap</div><div class='add'>+  bridge. In the binding description below the properties needed for bridging</div><div class='add'>+  are marked with "IP Pairing". These are optional on SoCs which do not support</div><div class='add'>+  IP Pairing</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2701-pwrap</div><div class='add'>+              - mediatek,mt6765-pwrap</div><div class='add'>+              - mediatek,mt6779-pwrap</div><div class='add'>+              - mediatek,mt6797-pwrap</div><div class='add'>+              - mediatek,mt6873-pwrap</div><div class='add'>+              - mediatek,mt7622-pwrap</div><div class='add'>+              - mediatek,mt8135-pwrap</div><div class='add'>+              - mediatek,mt8173-pwrap</div><div class='add'>+              - mediatek,mt8183-pwrap</div><div class='add'>+              - mediatek,mt8186-pwrap</div><div class='add'>+              - mediatek,mt8188-pwrap</div><div class='add'>+              - mediatek,mt8195-pwrap</div><div class='add'>+              - mediatek,mt8365-pwrap</div><div class='add'>+              - mediatek,mt8516-pwrap</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8186-pwrap</div><div class='add'>+              - mediatek,mt8195-pwrap</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: PMIC wrapper registers</div><div class='add'>+      - description: IP pairing registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: pwrap</div><div class='add'>+      - const: pwrap-bridge</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: SPI bus clock</div><div class='add'>+      - description: Main module clock</div><div class='add'>+      - description: System module clock</div><div class='add'>+      - description: Timer module clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: spi</div><div class='add'>+      - const: wrap</div><div class='add'>+      - const: sys</div><div class='add'>+      - const: tmr</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: PMIC wrapper reset</div><div class='add'>+      - description: IP pairing reset</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: pwrap</div><div class='add'>+      - const: pwrap-bridge</div><div class='add'>+</div><div class='add'>+  pmic:</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+dependentRequired:</div><div class='add'>+  resets: [reset-names]</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: mediatek,mt8365-pwrap</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 4</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt8135-resets.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+        pwrap@1000f000 {</div><div class='add'>+            compatible = "mediatek,mt8135-pwrap";</div><div class='add'>+            reg = &lt;0 0x1000f000 0 0x1000&gt;,</div><div class='add'>+                  &lt;0 0x11017000 0 0x1000&gt;;</div><div class='add'>+            reg-names = "pwrap", "pwrap-bridge";</div><div class='add'>+            interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk26m&gt;, &lt;&amp;clk26m&gt;;</div><div class='add'>+            clock-names = "spi", "wrap";</div><div class='add'>+            resets = &lt;&amp;infracfg MT8135_INFRA_PMIC_WRAP_RST&gt;,</div><div class='add'>+                     &lt;&amp;pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST&gt;;</div><div class='add'>+            reset-names = "pwrap", "pwrap-bridge";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml<br/>new file mode 100644<br/>index 000000000000..69afb329e5f4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/mediatek/mediatek,wdma.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Write Direct Memory Access</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+  - Moudy Ho &lt;moudy.ho@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek Write Direct Memory Access(WDMA) component used to write</div><div class='add'>+  the data into DMA.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8183-mdp3-wdma</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,gce-client-reg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: phandle of GCE</div><div class='add'>+        - description: GCE subsys id</div><div class='add'>+        - description: register offset</div><div class='add'>+        - description: register size</div><div class='add'>+    description: The register of client driver can be configured by gce with</div><div class='add'>+      4 arguments defined in this property. Each GCE subsys id is mapping to</div><div class='add'>+      a client defined in the header include/dt-bindings/gce/&lt;chip&gt;-gce.h.</div><div class='add'>+</div><div class='add'>+  mediatek,gce-events:</div><div class='add'>+    description:</div><div class='add'>+      The event id which is mapping to the specific hardware event signal</div><div class='add'>+      to gce. The event id is defined in the gce header</div><div class='add'>+      include/dt-bindings/gce/&lt;chip&gt;-gce.h of each chips.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - mediatek,gce-client-reg</div><div class='add'>+  - mediatek,gce-events</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - iommus</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gce/mt8183-gce.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/mt8183-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/mt8183-larb-port.h&gt;</div><div class='add'>+</div><div class='add'>+    mdp3_wdma: mdp3-wdma@14006000 {</div><div class='add'>+      compatible = "mediatek,mt8183-mdp3-wdma";</div><div class='add'>+      reg = &lt;0x14006000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-client-reg = &lt;&amp;gce SUBSYS_1400XXXX 0x6000 0x1000&gt;;</div><div class='add'>+      mediatek,gce-events = &lt;CMDQ_EVENT_MDP_WDMA0_SOF&gt;,</div><div class='add'>+                            &lt;CMDQ_EVENT_MDP_WDMA0_EOF&gt;;</div><div class='add'>+      power-domains = &lt;&amp;spm MT8183_POWER_DOMAIN_DISP&gt;;</div><div class='add'>+      clocks = &lt;&amp;mmsys CLK_MM_MDP_WDMA0&gt;;</div><div class='add'>+      iommus = &lt;&amp;iommu&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml b/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml<br/>new file mode 100644<br/>index 000000000000..f21eb907ee90<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/mediatek/mtk-svs.yaml</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek Smart Voltage Scaling (SVS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Roger Lu &lt;roger.lu@mediatek.com&gt;</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+  - Kevin Hilman &lt;khilman@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The SVS engine is a piece of hardware which has several</div><div class='add'>+  controllers(banks) for calculating suitable voltage to</div><div class='add'>+  different power domains(CPU/GPU/CCI) according to</div><div class='add'>+  chip process corner, temperatures and other factors. Then DVFS</div><div class='add'>+  driver could apply SVS bank voltage to PMIC/Buck.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8183-svs</div><div class='add'>+      - mediatek,mt8192-svs</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Address range of the MTK SVS controller.</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Main clock for MTK SVS controller to work.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: main</div><div class='add'>+</div><div class='add'>+  nvmem-cells:</div><div class='add'>+    minItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Phandle to the calibration data provided by a nvmem device.</div><div class='add'>+    items:</div><div class='add'>+      - description: SVS efuse for SVS controller</div><div class='add'>+      - description: Thermal efuse for SVS controller</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: svs-calibration-data</div><div class='add'>+      - const: t-calibration-data</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: svs_rst</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - nvmem-cells</div><div class='add'>+  - nvmem-cell-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8183-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        svs@1100b000 {</div><div class='add'>+            compatible = "mediatek,mt8183-svs";</div><div class='add'>+            reg = &lt;0 0x1100b000 0 0x1000&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 127 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            clocks = &lt;&amp;infracfg CLK_INFRA_THERM&gt;;</div><div class='add'>+            clock-names = "main";</div><div class='add'>+            nvmem-cells = &lt;&amp;svs_calibration&gt;, &lt;&amp;thermal_calibration&gt;;</div><div class='add'>+            nvmem-cell-names = "svs-calibration-data", "t-calibration-data";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt<br/>deleted file mode 100644<br/>index 214a34633824..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/mediatek/pwrap.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,71 +0,0 @@</div><div class='del'>-MediaTek PMIC Wrapper Driver</div><div class='del'>-</div><div class='del'>-This document describes the binding for the MediaTek PMIC wrapper.</div><div class='del'>-</div><div class='del'>-On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface</div><div class='del'>-is not directly visible to the CPU, but only through the PMIC wrapper</div><div class='del'>-inside the SoC. The communication between the SoC and the PMIC can</div><div class='del'>-optionally be encrypted. Also a non standard Dual IO SPI mode can be</div><div class='del'>-used to increase speed.</div><div class='del'>-</div><div class='del'>-IP Pairing</div><div class='del'>-</div><div class='del'>-on MT8135 the pins of some SoC internal peripherals can be on the PMIC.</div><div class='del'>-The signals of these pins are routed over the SPI bus using the pwrap</div><div class='del'>-bridge. In the binding description below the properties needed for bridging</div><div class='del'>-are marked with "IP Pairing". These are optional on SoCs which do not support</div><div class='del'>-IP Pairing</div><div class='del'>-</div><div class='del'>-Required properties in pwrap device node.</div><div class='del'>-- compatible:</div><div class='del'>-	"mediatek,mt2701-pwrap" for MT2701/7623 SoCs</div><div class='del'>-	"mediatek,mt6765-pwrap" for MT6765 SoCs</div><div class='del'>-	"mediatek,mt6779-pwrap" for MT6779 SoCs</div><div class='del'>-	"mediatek,mt6797-pwrap" for MT6797 SoCs</div><div class='del'>-	"mediatek,mt6873-pwrap" for MT6873/8192 SoCs</div><div class='del'>-	"mediatek,mt7622-pwrap" for MT7622 SoCs</div><div class='del'>-	"mediatek,mt8135-pwrap" for MT8135 SoCs</div><div class='del'>-	"mediatek,mt8173-pwrap" for MT8173 SoCs</div><div class='del'>-	"mediatek,mt8183-pwrap" for MT8183 SoCs</div><div class='del'>-	"mediatek,mt8186-pwrap" for MT8186 SoCs</div><div class='del'>-	"mediatek,mt8195-pwrap" for MT8195 SoCs</div><div class='del'>-	"mediatek,mt8516-pwrap" for MT8516 SoCs</div><div class='del'>-- interrupts: IRQ for pwrap in SOC</div><div class='del'>-- reg-names: Must include the following entries:</div><div class='del'>-  "pwrap": Main registers base</div><div class='del'>-  "pwrap-bridge": bridge base (IP Pairing)</div><div class='del'>-- reg: Must contain an entry for each entry in reg-names.</div><div class='del'>-- reset-names: Must include the following entries:</div><div class='del'>-  "pwrap"</div><div class='del'>-  "pwrap-bridge" (IP Pairing)</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-- clock-names: Must include the following entries:</div><div class='del'>-  "spi": SPI bus clock</div><div class='del'>-  "wrap": Main module clock</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-</div><div class='del'>-Optional properities:</div><div class='del'>-- pmic: Using either MediaTek PMIC MFD as the child device of pwrap</div><div class='del'>-  See the following for child node definitions:</div><div class='del'>-  Documentation/devicetree/bindings/mfd/mt6397.txt</div><div class='del'>-  or the regulator-only device as the child device of pwrap, such as MT6380.</div><div class='del'>-  See the following definitions for such kinds of devices.</div><div class='del'>-  Documentation/devicetree/bindings/regulator/mt6380-regulator.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	pwrap: pwrap@1000f000 {</div><div class='del'>-		compatible = "mediatek,mt8135-pwrap";</div><div class='del'>-		reg = &lt;0 0x1000f000 0 0x1000&gt;,</div><div class='del'>-			&lt;0 0x11017000 0 0x1000&gt;;</div><div class='del'>-		reg-names = "pwrap", "pwrap-bridge";</div><div class='del'>-		interrupts = &lt;GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		resets = &lt;&amp;infracfg MT8135_INFRA_PMIC_WRAP_RST&gt;,</div><div class='del'>-				&lt;&amp;pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST&gt;;</div><div class='del'>-		reset-names = "pwrap", "pwrap-bridge";</div><div class='del'>-		clocks = &lt;&amp;clk26m&gt;, &lt;&amp;clk26m&gt;;</div><div class='del'>-		clock-names = "spi", "wrap";</div><div class='del'>-</div><div class='del'>-		pmic {</div><div class='del'>-			compatible = "mediatek,mt6397";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml<br/>index 597d67fba92f..a46411149571 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Atmel Timer Counter Block</div><div class='ctx'> </div><div class='hunk'>@@ -54,6 +54,7 @@ patternProperties:</div><div class='ctx'>   "^timer@[0-2]$":</div><div class='ctx'>     description: The timer block channels that are used as timers or counters.</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         items:</div><div class='hunk'>@@ -75,7 +76,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^pwm@[0-2]$":</div><div class='ctx'>     description: The timer block channels that are used as PWMs.</div><div class='del'>-    $ref: ../../pwm/pwm.yaml#</div><div class='add'>+    $ref: /schemas/pwm/pwm.yaml#</div><div class='ctx'>     type: object</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml<br/>index b0dae51e1d42..04ffee3a7c59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-sys-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) system controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml<br/>index e2e173dfada7..798f15588ee2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Always-On Subsystem side channel binding</div><div class='add'>+title: Qualcomm Always-On Subsystem side channel</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='hunk'>@@ -13,7 +13,7 @@ description:</div><div class='ctx'>   This binding describes the hardware component responsible for side channel</div><div class='ctx'>   requests to the always-on subsystem (AOSS), used for certain power management</div><div class='ctx'>   requests that is not handled by the standard RPMh interface. Each client in the</div><div class='del'>-  SoC has it's own block of message RAM and IRQ for communication with the AOSS.</div><div class='add'>+  SoC has its own block of message RAM and IRQ for communication with the AOSS.</div><div class='ctx'>   The protocol used to communicate in the message RAM is known as Qualcomm</div><div class='ctx'>   Messaging Protocol (QMP)</div><div class='ctx'> </div><div class='hunk'>@@ -25,14 +25,18 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - qcom,qdu1000-aoss-qmp</div><div class='ctx'>           - qcom,sc7180-aoss-qmp</div><div class='ctx'>           - qcom,sc7280-aoss-qmp</div><div class='ctx'>           - qcom,sc8180x-aoss-qmp</div><div class='add'>+          - qcom,sc8280xp-aoss-qmp</div><div class='ctx'>           - qcom,sdm845-aoss-qmp</div><div class='ctx'>           - qcom,sm6350-aoss-qmp</div><div class='ctx'>           - qcom,sm8150-aoss-qmp</div><div class='ctx'>           - qcom,sm8250-aoss-qmp</div><div class='ctx'>           - qcom,sm8350-aoss-qmp</div><div class='add'>+          - qcom,sm8450-aoss-qmp</div><div class='add'>+          - qcom,sm8550-aoss-qmp</div><div class='ctx'>       - const: qcom,aoss-qmp</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml<br/>new file mode 100644<br/>index 000000000000..bdf482db32aa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,apr-services.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,apr-services.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm APR/GPR services shared parts</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Common parts of a static service in Qualcomm APR/GPR (Asynchronous/Generic</div><div class='add'>+  Packet Router).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  reg:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 13</div><div class='add'>+    description: |</div><div class='add'>+      APR Service ID</div><div class='add'>+        3 = DSP Core Service</div><div class='add'>+        4 = Audio  Front End Service.</div><div class='add'>+        5 = Voice Stream Manager Service.</div><div class='add'>+        6 = Voice processing manager.</div><div class='add'>+        7 = Audio Stream Manager Service.</div><div class='add'>+        8 = Audio Device Manager Service.</div><div class='add'>+        9 = Multimode voice manager.</div><div class='add'>+        10 = Core voice stream.</div><div class='add'>+        11 = Core voice processor.</div><div class='add'>+        12 = Ultrasound stream manager.</div><div class='add'>+        13 = Listen stream manager.</div><div class='add'>+      GPR Service ID</div><div class='add'>+        1 = Audio Process Manager Service</div><div class='add'>+        2 = Proxy Resource Manager Service.</div><div class='add'>+        3 = AMDB Service.</div><div class='add'>+        4 = Voice processing manager.</div><div class='add'>+</div><div class='add'>+  qcom,protection-domain:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description: |</div><div class='add'>+      Protection domain service name and path for APR service (if supported).</div><div class='add'>+      Possible values are::</div><div class='add'>+      "avs/audio", "msm/adsp/audio_pd".</div><div class='add'>+      "kernel/elf_loader", "msm/modem/wlan_pd".</div><div class='add'>+      "tms/servreg", "msm/adsp/audio_pd".</div><div class='add'>+      "tms/servreg", "msm/modem/wlan_pd".</div><div class='add'>+      "tms/servreg", "msm/slpi/sensor_pd".</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml<br/>index 028c5d105adb..e51acdcaafaf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/qcom/qcom,apr.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,apr.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm APR/GPR (Asynchronous/Generic Packet Router) binding</div><div class='add'>+title: Qualcomm APR/GPR (Asynchronous/Generic Packet Router)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -17,9 +17,13 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - qcom,apr</div><div class='ctx'>       - qcom,apr-v2</div><div class='ctx'>       - qcom,gpr</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   qcom,apr-domain:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [1, 2, 3, 4, 5, 6, 7]</div><div class='hunk'>@@ -52,18 +56,45 @@ properties:</div><div class='ctx'>         2 = Audio DSP Domain</div><div class='ctx'>         3 = Application Processor Domain</div><div class='ctx'> </div><div class='add'>+  qcom,glink-channels:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description: Channel name used for the communication</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  qcom,intents:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 32</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: size of each intent to preallocate</div><div class='add'>+        - description: amount of intents to preallocate</div><div class='add'>+          minimum: 1</div><div class='add'>+    description:</div><div class='add'>+      List of (size, amount) pairs describing what intents should be</div><div class='add'>+      preallocated for this virtual channel. This can be used to tweak the</div><div class='add'>+      default intents available for the channel to meet expectations of the</div><div class='add'>+      remote.</div><div class='add'>+</div><div class='add'>+  qcom,smd-channels:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description: Channel name used for the communication</div><div class='add'>+    items:</div><div class='add'>+      - const: apr_audio_svc</div><div class='add'>+</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='ctx'>   '#size-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='del'>-#APR/GPR Services</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^service@[1-9a-d]$":</div><div class='ctx'>     type: object</div><div class='add'>+    $ref: /schemas/soc/qcom/qcom,apr-services.yaml</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     description:</div><div class='del'>-      APR/GPR node's client devices use subnodes for desired static port services.</div><div class='add'>+      APR/GPR static port services.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -75,56 +106,42 @@ patternProperties:</div><div class='ctx'>           - qcom,q6apm</div><div class='ctx'>           - qcom,q6prm</div><div class='ctx'> </div><div class='del'>-      reg:</div><div class='del'>-        minimum: 1</div><div class='del'>-        maximum: 13</div><div class='del'>-        description:</div><div class='del'>-          APR Service ID</div><div class='del'>-            3 = DSP Core Service</div><div class='del'>-            4 = Audio  Front End Service.</div><div class='del'>-            5 = Voice Stream Manager Service.</div><div class='del'>-            6 = Voice processing manager.</div><div class='del'>-            7 = Audio Stream Manager Service.</div><div class='del'>-            8 = Audio Device Manager Service.</div><div class='del'>-            9 = Multimode voice manager.</div><div class='del'>-            10 = Core voice stream.</div><div class='del'>-            11 = Core voice processor.</div><div class='del'>-            12 = Ultrasound stream manager.</div><div class='del'>-            13 = Listen stream manager.</div><div class='del'>-          GPR Service ID</div><div class='del'>-            1 = Audio Process Manager Service</div><div class='del'>-            2 = Proxy Resource Manager Service.</div><div class='del'>-            3 = AMDB Service.</div><div class='del'>-            4 = Voice processing manager.</div><div class='del'>-</div><div class='del'>-      qcom,protection-domain:</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/string-array</div><div class='del'>-        description: protection domain service name and path for apr service</div><div class='del'>-          possible values are</div><div class='del'>-          "avs/audio", "msm/adsp/audio_pd".</div><div class='del'>-          "kernel/elf_loader", "msm/modem/wlan_pd".</div><div class='del'>-          "tms/servreg", "msm/adsp/audio_pd".</div><div class='del'>-          "tms/servreg", "msm/modem/wlan_pd".</div><div class='del'>-          "tms/servreg", "msm/slpi/sensor_pd".</div><div class='del'>-</div><div class='del'>-      '#address-cells':</div><div class='del'>-        const: 1</div><div class='del'>-</div><div class='del'>-      '#size-cells':</div><div class='del'>-        const: 0</div><div class='del'>-</div><div class='del'>-    patternProperties:</div><div class='del'>-      "^.*@[0-9a-f]+$":</div><div class='del'>-        type: object</div><div class='del'>-        description:</div><div class='del'>-          Service based devices like clock controllers or digital audio interfaces.</div><div class='del'>-</div><div class='del'>-    additionalProperties: false</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - qcom,domain</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,gpr</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,glink-channels:</div><div class='add'>+          items:</div><div class='add'>+            - const: adsp_apps</div><div class='add'>+        power-domains: false</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,glink-channels:</div><div class='add'>+          items:</div><div class='add'>+            - const: apr_audio_svc</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - qcom,glink-channels</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,smd-channels: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - qcom,smd-channels</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,glink-channels: false</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -133,31 +150,35 @@ examples:</div><div class='ctx'>     apr {</div><div class='ctx'>         compatible = "qcom,apr-v2";</div><div class='ctx'>         qcom,domain = &lt;APR_DOMAIN_ADSP&gt;;</div><div class='add'>+        qcom,glink-channels = "apr_audio_svc";</div><div class='add'>+        qcom,intents = &lt;512 20&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         q6core: service@3 {</div><div class='del'>-          compatible = "qcom,q6core";</div><div class='del'>-          reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='del'>-          qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        q6afe: service@4 {</div><div class='del'>-          compatible = "qcom,q6afe";</div><div class='del'>-          reg = &lt;APR_SVC_AFE&gt;;</div><div class='del'>-          qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        q6asm: service@7 {</div><div class='del'>-          compatible = "qcom,q6asm";</div><div class='del'>-          reg = &lt;APR_SVC_ASM&gt;;</div><div class='del'>-          qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+            compatible = "qcom,q6core";</div><div class='add'>+            reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='del'>-        q6adm: service@8 {</div><div class='del'>-          compatible = "qcom,q6adm";</div><div class='del'>-          reg = &lt;APR_SVC_ADM&gt;;</div><div class='del'>-          qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+        service@4 {</div><div class='add'>+            compatible = "qcom,q6afe";</div><div class='add'>+            reg = &lt;APR_SVC_AFE&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+            clock-controller {</div><div class='add'>+                compatible = "qcom,q6afe-clocks";</div><div class='add'>+                #clock-cells = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dais {</div><div class='add'>+                compatible = "qcom,q6afe-dais";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+                /* ... */</div><div class='add'>+            };</div><div class='add'>+            /* ... */</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -166,12 +187,25 @@ examples:</div><div class='ctx'>     gpr {</div><div class='ctx'>         compatible = "qcom,gpr";</div><div class='ctx'>         qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='add'>+        qcom,glink-channels = "adsp_apps";</div><div class='add'>+        qcom,intents = &lt;512 20&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         service@1 {</div><div class='del'>-          compatible = "qcom,q6apm";</div><div class='del'>-          reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='del'>-          qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+            compatible = "qcom,q6apm";</div><div class='add'>+            reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+            dais {</div><div class='add'>+                compatible = "qcom,q6apm-dais";</div><div class='add'>+                iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            bedais {</div><div class='add'>+                compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+                #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,dcc.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,dcc.yaml<br/>new file mode 100644<br/>index 000000000000..ce7e20dd22c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,dcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,dcc.yaml</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,dcc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Data Capture and Compare</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Souradeep Chowdhury &lt;quic_schowdhu@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+    DCC (Data Capture and Compare) is a DMA engine which is used to save</div><div class='add'>+    configuration data or system memory contents during catastrophic failure</div><div class='add'>+    or SW trigger. DCC is used to capture and store data for debugging purpose</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sm8150-dcc</div><div class='add'>+          - qcom,sc7280-dcc</div><div class='add'>+          - qcom,sc7180-dcc</div><div class='add'>+          - qcom,sdm845-dcc</div><div class='add'>+      - const: qcom,dcc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: DCC base</div><div class='add'>+      - description: DCC RAM base</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    dma@10a2000{</div><div class='add'>+        compatible = "qcom,sm8150-dcc", "qcom,dcc";</div><div class='add'>+        reg = &lt;0x010a2000 0x1000&gt;,</div><div class='add'>+              &lt;0x010ad000 0x2000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml<br/>index c98aab209bc5..14dd29471c80 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/qcom/qcom,eud.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,eud.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Embedded USB Debugger</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml<br/>index 95fcb43675d6..8a4b7ba3aaf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml</a></div><div class='hunk'>@@ -1,14 +1,13 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: GENI Serial Engine QUP Wrapper Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mukesh Savaliya &lt;msavaliy@codeaurora.org&gt;</div><div class='del'>-  - Akash Asthana &lt;akashast@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>  Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper</div><div class='hunk'>@@ -22,20 +21,19 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,geni-se-qup</div><div class='add'>+      - qcom,geni-se-i2c-master-hub</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description: QUP wrapper common register address and length.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: m-ahb</div><div class='del'>-      - const: s-ahb</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    items:</div><div class='del'>-      - description: Master AHB Clock</div><div class='del'>-      - description: Slave AHB Clock</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     const: 2</div><div class='hunk'>@@ -64,116 +62,56 @@ required:</div><div class='ctx'>   - ranges</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "^.*@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='del'>-    description: Common properties for GENI Serial Engine based I2C, SPI and</div><div class='del'>-                 UART controller.</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      reg:</div><div class='del'>-        description: GENI Serial Engine register address and length.</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      clock-names:</div><div class='del'>-        const: se</div><div class='del'>-</div><div class='del'>-      clocks:</div><div class='del'>-        description: Serial engine core clock needed by the device.</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      interconnects:</div><div class='del'>-        minItems: 2</div><div class='del'>-        maxItems: 3</div><div class='del'>-</div><div class='del'>-      interconnect-names:</div><div class='del'>-        minItems: 2</div><div class='del'>-        items:</div><div class='del'>-          - const: qup-core</div><div class='del'>-          - const: qup-config</div><div class='del'>-          - const: qup-memory</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - reg</div><div class='del'>-      - clock-names</div><div class='del'>-      - clocks</div><div class='del'>-</div><div class='ctx'>   "spi@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     description: GENI serial engine based SPI controller. SPI in master mode</div><div class='ctx'>                  supports up to 50MHz, up to four chip selects, programmable</div><div class='ctx'>                  data path from 4 bits to 32 bits and numerous protocol</div><div class='ctx'>                  variants.</div><div class='del'>-    $ref: /schemas/spi/spi-controller.yaml#</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        enum:</div><div class='del'>-          - qcom,geni-spi</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      "#address-cells":</div><div class='del'>-        const: 1</div><div class='del'>-</div><div class='del'>-      "#size-cells":</div><div class='del'>-        const: 0</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - interrupts</div><div class='del'>-      - "#address-cells"</div><div class='del'>-      - "#size-cells"</div><div class='add'>+    $ref: /schemas/spi/qcom,spi-geni-qcom.yaml#</div><div class='ctx'> </div><div class='ctx'>   "i2c@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     description: GENI serial engine based I2C controller.</div><div class='del'>-    $ref: /schemas/i2c/i2c-controller.yaml#</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        enum:</div><div class='del'>-          - qcom,geni-i2c</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        maxItems: 1</div><div class='del'>-</div><div class='del'>-      "#address-cells":</div><div class='del'>-        const: 1</div><div class='del'>-</div><div class='del'>-      "#size-cells":</div><div class='del'>-        const: 0</div><div class='del'>-</div><div class='del'>-      clock-frequency:</div><div class='del'>-        description: Desired I2C bus clock frequency in Hz.</div><div class='del'>-        default: 100000</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - interrupts</div><div class='del'>-      - "#address-cells"</div><div class='del'>-      - "#size-cells"</div><div class='add'>+    $ref: /schemas/i2c/qcom,i2c-geni-qcom.yaml#</div><div class='ctx'> </div><div class='ctx'>   "serial@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     description: GENI Serial Engine based UART Controller.</div><div class='del'>-    $ref: /schemas/serial.yaml#</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        enum:</div><div class='del'>-          - qcom,geni-uart</div><div class='del'>-          - qcom,geni-debug-uart</div><div class='del'>-</div><div class='del'>-      interrupts:</div><div class='del'>-        minItems: 1</div><div class='del'>-        items:</div><div class='del'>-          - description: UART core irq</div><div class='del'>-          - description: Wakeup irq (RX GPIO)</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - compatible</div><div class='del'>-      - interrupts</div><div class='add'>+    $ref: /schemas/serial/qcom,serial-geni-qcom.yaml#</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,geni-se-i2c-master-hub</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: s-ahb</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Slave AHB Clock</div><div class='add'>+</div><div class='add'>+        iommus: false</div><div class='add'>+</div><div class='add'>+      patternProperties:</div><div class='add'>+        "spi@[0-9a-f]+$": false</div><div class='add'>+        "serial@[0-9a-f]+$": false</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: m-ahb</div><div class='add'>+            - const: s-ahb</div><div class='add'>+</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Master AHB Clock</div><div class='add'>+            - description: Slave AHB Clock</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt<br/>deleted file mode 100644<br/>index 1214192847ac..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,glink.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,94 +0,0 @@</div><div class='del'>-Qualcomm GLINK edge binding</div><div class='del'>-</div><div class='del'>-This binding describes a Qualcomm GLINK edge, a fifo based mechanism for</div><div class='del'>-communication between subsystem-pairs on various Qualcomm platforms. Two types</div><div class='del'>-of edges can be described by the binding; the GLINK RPM edge and a SMEM based</div><div class='del'>-edge.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required for glink-rpm</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,glink-rpm"</div><div class='del'>-</div><div class='del'>-- label:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: should specify the subsystem name this edge corresponds to.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the IRQ used by the remote processor to</div><div class='del'>-		    signal this processor about communication related events</div><div class='del'>-</div><div class='del'>-- qcom,remote-pid:</div><div class='del'>-	Usage: required for glink-smem</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: specifies the identifier of the remote endpoint of this edge</div><div class='del'>-</div><div class='del'>-- qcom,rpm-msg-ram:</div><div class='del'>-	Usage: required for glink-rpm</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: handle to RPM message memory resource</div><div class='del'>-</div><div class='del'>-- mboxes:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to the "rpm_hlos" mailbox in APCS, as described</div><div class='del'>-		    in mailbox/mailbox.txt</div><div class='del'>-</div><div class='del'>-= GLINK DEVICES</div><div class='del'>-Each subnode of the GLINK node represent function tied to a virtual</div><div class='del'>-communication channel. The name of the nodes are not important. The properties</div><div class='del'>-of these nodes are defined by the individual bindings for the specific function</div><div class='del'>-- but must contain the following property:</div><div class='del'>-</div><div class='del'>-- qcom,glink-channels:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: a list of channels tied to this function, used for matching</div><div class='del'>-		    the function to a set of virtual channels</div><div class='del'>-</div><div class='del'>-- qcom,intents:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: a list of size,amount pairs describing what intents should</div><div class='del'>-		    be preallocated for this virtual channel. This can be used</div><div class='del'>-		    to tweak the default intents available for the channel to</div><div class='del'>-		    meet expectations of the remote.</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-The following example represents the GLINK RPM node on a MSM8996 device, with</div><div class='del'>-the function for the "rpm_request" channel defined, which is used for</div><div class='del'>-regulators and root clocks.</div><div class='del'>-</div><div class='del'>-	apcs_glb: mailbox@9820000 {</div><div class='del'>-		compatible = "qcom,msm8996-apcs-hmss-global";</div><div class='del'>-		reg = &lt;0x9820000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		#mbox-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rpm_msg_ram: memory@68000 {</div><div class='del'>-		compatible = "qcom,rpm-msg-ram";</div><div class='del'>-		reg = &lt;0x68000 0x6000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	rpm-glink {</div><div class='del'>-		compatible = "qcom,glink-rpm";</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;GIC_SPI 168 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-</div><div class='del'>-		qcom,rpm-msg-ram = &lt;&amp;rpm_msg_ram&gt;;</div><div class='del'>-</div><div class='del'>-		mboxes = &lt;&amp;apcs_glb 0&gt;;</div><div class='del'>-</div><div class='del'>-		rpm-requests {</div><div class='del'>-			compatible = "qcom,rpm-msm8996";</div><div class='del'>-			qcom,glink-channels = "rpm_requests";</div><div class='del'>-</div><div class='del'>-			qcom,intents = &lt;0x400 5</div><div class='del'>-					0x800 1&gt;;</div><div class='del'>-			...</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt<br/>deleted file mode 100644<br/>index fe1855f09dcc..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,87 +0,0 @@</div><div class='del'>-QCOM GSBI (General Serial Bus Interface) Driver</div><div class='del'>-</div><div class='del'>-The GSBI controller is modeled as a node with zero or more child nodes, each</div><div class='del'>-representing a serial sub-node device that is mux'd as part of the GSBI</div><div class='del'>-configuration settings.  The mode setting will govern the input/output mode of</div><div class='del'>-the 4 GSBI IOs.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:	Should contain "qcom,gsbi-v1.0.0"</div><div class='del'>-- cell-index:	Should contain the GSBI index</div><div class='del'>-- reg: Address range for GSBI registers</div><div class='del'>-- clocks: required clock</div><div class='del'>-- clock-names: must contain "iface" entry</div><div class='del'>-- qcom,mode : indicates MUX value for configuration of the serial interface.</div><div class='del'>-  Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- qcom,crci : indicates CRCI MUX value for QUP CRCI ports.  Please reference</div><div class='del'>-  dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values.</div><div class='del'>-- syscon-tcsr: indicates phandle of TCSR syscon node.  Required if child uses</div><div class='del'>-  dma.</div><div class='del'>-</div><div class='del'>-Required properties if child node exists:</div><div class='del'>-- #address-cells: Must be 1</div><div class='del'>-- #size-cells: Must be 1</div><div class='del'>-- ranges: Must be present</div><div class='del'>-</div><div class='del'>-Properties for children:</div><div class='del'>-</div><div class='del'>-A GSBI controller node can contain 0 or more child nodes representing serial</div><div class='del'>-devices.  These serial devices can be a QCOM UART, I2C controller, spi</div><div class='del'>-controller, or some combination of aforementioned devices.</div><div class='del'>-</div><div class='del'>-See the following for child node definitions:</div><div class='del'>-Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt</div><div class='del'>-Documentation/devicetree/bindings/spi/qcom,spi-qup.txt</div><div class='del'>-Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt</div><div class='del'>-</div><div class='del'>-Example for APQ8064:</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/soc/qcom,gsbi.h&gt;</div><div class='del'>-</div><div class='del'>-	gsbi4@16300000 {</div><div class='del'>-		compatible = "qcom,gsbi-v1.0.0";</div><div class='del'>-		cell-index = &lt;4&gt;;</div><div class='del'>-		reg = &lt;0x16300000 0x100&gt;;</div><div class='del'>-		clocks = &lt;&amp;gcc GSBI4_H_CLK&gt;;</div><div class='del'>-		clock-names = "iface";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;1&gt;;</div><div class='del'>-		ranges;</div><div class='del'>-		qcom,mode = &lt;GSBI_PROT_I2C_UART&gt;;</div><div class='del'>-		qcom,crci = &lt;GSBI_CRCI_QUP&gt;;</div><div class='del'>-</div><div class='del'>-		syscon-tcsr = &lt;&amp;tcsr&gt;;</div><div class='del'>-</div><div class='del'>-		/* child nodes go under here */</div><div class='del'>-</div><div class='del'>-		i2c_qup4: i2c@16380000 {</div><div class='del'>-			compatible = "qcom,i2c-qup-v1.1.1";</div><div class='del'>-			reg = &lt;0x16380000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;0 153 0&gt;;</div><div class='del'>-</div><div class='del'>-			clocks = &lt;&amp;gcc GSBI4_QUP_CLK&gt;, &lt;&amp;gcc GSBI4_H_CLK&gt;;</div><div class='del'>-			clock-names = "core", "iface";</div><div class='del'>-</div><div class='del'>-			clock-frequency = &lt;200000&gt;;</div><div class='del'>-</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		uart4:	serial@16340000 {</div><div class='del'>-			compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";</div><div class='del'>-			reg = &lt;0x16340000 0x1000&gt;,</div><div class='del'>-				&lt;0x16300000 0x1000&gt;;</div><div class='del'>-			interrupts = &lt;0 152 0x0&gt;;</div><div class='del'>-			clocks = &lt;&amp;gcc GSBI4_UART_CLK&gt;, &lt;&amp;gcc GSBI4_H_CLK&gt;;</div><div class='del'>-			clock-names = "core", "iface";</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	tcsr: syscon@1a400000 {</div><div class='del'>-		compatible = "qcom,apq8064-tcsr", "syscon";</div><div class='del'>-		reg = &lt;0x1a400000 0x100&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml<br/>new file mode 100644<br/>index 000000000000..c33704333e49<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,gsbi.yaml</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm General Serial Bus Interface (GSBI)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The GSBI controller is modeled as a node with zero or more child nodes, each</div><div class='add'>+  representing a serial sub-node device that is mux'd as part of the GSBI</div><div class='add'>+  configuration settings.  The mode setting will govern the input/output mode</div><div class='add'>+  of the 4 GSBI IOs.</div><div class='add'>+</div><div class='add'>+  A GSBI controller node can contain 0 or more child nodes representing serial</div><div class='add'>+  devices.  These serial devices can be a QCOM UART, I2C controller, spi</div><div class='add'>+  controller, or some combination of aforementioned devices.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,gsbi-v1.0.0</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  cell-index:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The GSBI index.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: iface</div><div class='add'>+</div><div class='add'>+  qcom,crci:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      CRCI MUX value for QUP CRCI ports.  Please reference</div><div class='add'>+      include/dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values.</div><div class='add'>+</div><div class='add'>+  qcom,mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      MUX value for configuration of the serial interface.  Please reference</div><div class='add'>+      include/dt-bindings/soc/qcom,gsbi.h for valid mux values.</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  syscon-tcsr:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      Phandle of TCSR syscon node.Required if child uses dma.</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "spi@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/spi/qcom,spi-qup.yaml#</div><div class='add'>+</div><div class='add'>+  "i2c@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/i2c/qcom,i2c-qup.yaml#</div><div class='add'>+</div><div class='add'>+  "serial@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/serial/qcom,msm-uartdm.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - cell-index</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - qcom,mode</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8960.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,gsbi.h&gt;</div><div class='add'>+</div><div class='add'>+    gsbi@12440000 {</div><div class='add'>+        compatible = "qcom,gsbi-v1.0.0";</div><div class='add'>+        reg = &lt;0x12440000 0x100&gt;;</div><div class='add'>+        cell-index = &lt;1&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GSBI1_H_CLK&gt;;</div><div class='add'>+        clock-names = "iface";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+</div><div class='add'>+        syscon-tcsr = &lt;&amp;tcsr&gt;;</div><div class='add'>+        qcom,mode = &lt;GSBI_PROT_I2C_UART&gt;;</div><div class='add'>+</div><div class='add'>+        serial@12450000 {</div><div class='add'>+            compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";</div><div class='add'>+            reg = &lt;0x12450000 0x100&gt;,</div><div class='add'>+                  &lt;0x12400000 0x03&gt;;</div><div class='add'>+            interrupts = &lt;0 193 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;gcc GSBI1_UART_CLK&gt;, &lt;&amp;gcc GSBI1_H_CLK&gt;;</div><div class='add'>+            clock-names = "core", "iface";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        i2c@12460000 {</div><div class='add'>+            compatible = "qcom,i2c-qup-v1.1.1";</div><div class='add'>+            reg = &lt;0x12460000 0x1000&gt;;</div><div class='add'>+            pinctrl-0 = &lt;&amp;i2c1_pins&gt;;</div><div class='add'>+            pinctrl-1 = &lt;&amp;i2c1_pins_sleep&gt;;</div><div class='add'>+            pinctrl-names = "default", "sleep";</div><div class='add'>+            interrupts = &lt;0 194 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;gcc GSBI1_QUP_CLK&gt;, &lt;&amp;gcc GSBI1_H_CLK&gt;;</div><div class='add'>+            clock-names = "core", "iface";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            status = "disabled"; /* UART chosen */</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,msm8976-ramp-controller.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,msm8976-ramp-controller.yaml<br/>new file mode 100644<br/>index 000000000000..aae9cf7b8caf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,msm8976-ramp-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,msm8976-ramp-controller.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,msm8976-ramp-controller.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Ramp Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Ramp Controller is used to program the sequence ID for pulse</div><div class='add'>+  swallowing, enable sequences and link Sequence IDs (SIDs) for the</div><div class='add'>+  CPU cores on some Qualcomm SoCs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,msm8976-ramp-controller</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    cpu-power-controller@b014000 {</div><div class='add'>+        compatible = "qcom,msm8976-ramp-controller";</div><div class='add'>+        reg = &lt;0x0b014000 0x68&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml<br/>new file mode 100644<br/>index 000000000000..6440dc801387<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,pmic-glink.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm PMIC GLINK firmware interface for battery management, USB</div><div class='add'>+  Type-C and other things.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The PMIC GLINK service, running on a coprocessor on some modern Qualcomm</div><div class='add'>+  platforms and implement USB Type-C handling and battery management. This</div><div class='add'>+  binding describes the component in the OS used to communicate with the</div><div class='add'>+  firmware and connect it's resources to those described in the Devicetree,</div><div class='add'>+  particularly the USB Type-C controllers relationship with USB and DisplayPort</div><div class='add'>+  components.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,sc8180x-pmic-glink</div><div class='add'>+          - qcom,sc8280xp-pmic-glink</div><div class='add'>+          - qcom,sm8350-pmic-glink</div><div class='add'>+          - qcom,sm8450-pmic-glink</div><div class='add'>+          - qcom,sm8550-pmic-glink</div><div class='add'>+      - const: qcom,pmic-glink</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^connector@\d$':</div><div class='add'>+    $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |+</div><div class='add'>+    pmic-glink {</div><div class='add'>+        compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        connector@0 {</div><div class='add'>+            compatible = "usb-c-connector";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            power-role = "dual";</div><div class='add'>+            data-role = "dual";</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;usb_role&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;ss_phy_out&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;sbu_mux&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml<br/>new file mode 100644<br/>index 000000000000..b00be9e01206<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,rpm.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,rpm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Resource Power Manager (RPM)</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This driver is used to interface with the Resource Power Manager (RPM) found</div><div class='add'>+  in various Qualcomm platforms. The RPM allows each component in the system</div><div class='add'>+  to vote for state of the system resources, such as clocks, regulators and bus</div><div class='add'>+  frequencies.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,rpm-apq8064</div><div class='add'>+      - qcom,rpm-msm8660</div><div class='add'>+      - qcom,rpm-msm8960</div><div class='add'>+      - qcom,rpm-ipq8064</div><div class='add'>+      - qcom,rpm-mdm9615</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ack</div><div class='add'>+      - const: err</div><div class='add'>+      - const: wakeup</div><div class='add'>+</div><div class='add'>+  qcom,ipc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to a syscon node representing the APCS registers</div><div class='add'>+          - description: u32 representing offset to the register within the syscon</div><div class='add'>+          - description: u32 representing the ipc bit within the register</div><div class='add'>+    description:</div><div class='add'>+      Three entries specifying the outgoing ipc bit used for signaling the RPM.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^regulators(-[01])?$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/regulator/qcom,rpm-regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - qcom,ipc</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/qcom-rpm.h&gt;</div><div class='add'>+</div><div class='add'>+    rpm@108000 {</div><div class='add'>+      compatible = "qcom,rpm-msm8960";</div><div class='add'>+      reg = &lt;0x108000 0x1000&gt;;</div><div class='add'>+      qcom,ipc = &lt;&amp;apcs 0x8 2&gt;;</div><div class='add'>+</div><div class='add'>+      interrupts = &lt;GIC_SPI 19 IRQ_TYPE_NONE&gt;, &lt;GIC_SPI 21 IRQ_TYPE_NONE&gt;, &lt;GIC_SPI 22 IRQ_TYPE_NONE&gt;;</div><div class='add'>+      interrupt-names = "ack", "err", "wakeup";</div><div class='add'>+</div><div class='add'>+      regulators {</div><div class='add'>+        compatible = "qcom,rpm-pm8921-regulators";</div><div class='add'>+        vdd_l1_l2_l12_l18-supply = &lt;&amp;pm8921_s4&gt;;</div><div class='add'>+</div><div class='add'>+        s1 {</div><div class='add'>+          regulator-min-microvolt = &lt;1225000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1225000&gt;;</div><div class='add'>+</div><div class='add'>+          bias-pull-down;</div><div class='add'>+</div><div class='add'>+          qcom,switch-mode-frequency = &lt;3200000&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pm8921_s4: s4 {</div><div class='add'>+          regulator-min-microvolt = &lt;1800000&gt;;</div><div class='add'>+          regulator-max-microvolt = &lt;1800000&gt;;</div><div class='add'>+</div><div class='add'>+          qcom,switch-mode-frequency = &lt;1600000&gt;;</div><div class='add'>+          bias-pull-down;</div><div class='add'>+</div><div class='add'>+          qcom,force-mode = &lt;QCOM_RPM_FORCE_MODE_AUTO&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml<br/>new file mode 100644<br/>index 000000000000..a4046ba60846<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,rpmh-rsc.yaml</a></div><div class='hunk'>@@ -0,0 +1,267 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm RPMH RSC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Resource Power Manager Hardened (RPMH) is the mechanism for communicating</div><div class='add'>+  with the hardened resource accelerators on Qualcomm SoCs. Requests to the</div><div class='add'>+  resources can be written to the Trigger Command Set (TCS)  registers and</div><div class='add'>+  using a (addr, val) pair and triggered. Messages in the TCS are then sent in</div><div class='add'>+  sequence over an internal bus.</div><div class='add'>+</div><div class='add'>+  The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity</div><div class='add'>+  (Resource State Coordinator a.k.a RSC) that can handle multiple sleep and</div><div class='add'>+  active/wake resource requests. Multiple such DRVs can exist in a SoC and can</div><div class='add'>+  be written to from Linux. The structure of each DRV follows the same template</div><div class='add'>+  with a few variations that are captured by the properties here.</div><div class='add'>+</div><div class='add'>+  A TCS may be triggered from Linux or triggered by the F/W after all the CPUs</div><div class='add'>+  have powered off to facilitate idle power saving. TCS could be classified as::</div><div class='add'>+    ACTIVE  - Triggered by Linux</div><div class='add'>+    SLEEP   - Triggered by F/W</div><div class='add'>+    WAKE    - Triggered by F/W</div><div class='add'>+    CONTROL - Triggered by F/W</div><div class='add'>+  See also:: &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+</div><div class='add'>+  The order in which they are described in the DT, should match the hardware</div><div class='add'>+  configuration.</div><div class='add'>+</div><div class='add'>+  Requests can be made for the state of a resource, when the subsystem is</div><div class='add'>+  active or idle. When all subsystems like Modem, GPU, CPU are idle, the</div><div class='add'>+  resource state will be an aggregate of the sleep votes from each of those</div><div class='add'>+  subsystems. Clients may request a sleep value for their shared resources in</div><div class='add'>+  addition to the active mode requests.</div><div class='add'>+</div><div class='add'>+  Drivers that want to use the RSC to communicate with RPMH must specify their</div><div class='add'>+  bindings as child nodes of the RSC controllers they wish to communicate with.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,rpmh-rsc</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+    description:</div><div class='add'>+      The interrupt that trips when a message complete/response is received for</div><div class='add'>+      this DRV from the accelerators.</div><div class='add'>+      Number of interrupts must match number of DRV blocks.</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    description:</div><div class='add'>+      Name for the RSC. The name would be used in trace logs.</div><div class='add'>+</div><div class='add'>+  qcom,drv-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The ID of the DRV in the RSC block that will be used by this controller.</div><div class='add'>+</div><div class='add'>+  qcom,tcs-config:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 4</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: |</div><div class='add'>+            TCS type::</div><div class='add'>+             - ACTIVE_TCS</div><div class='add'>+             - SLEEP_TCS</div><div class='add'>+             - WAKE_TCS</div><div class='add'>+             - CONTROL_TCS</div><div class='add'>+          enum: [ 0, 1, 2, 3 ]</div><div class='add'>+        - description: Number of TCS</div><div class='add'>+    description: |</div><div class='add'>+      The tuple defining the configuration of TCS. Must have two cells which</div><div class='add'>+      describe each TCS type.  The order of the TCS must match the hardware</div><div class='add'>+      configuration.</div><div class='add'>+</div><div class='add'>+  qcom,tcs-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The offset of the TCS blocks.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: drv-0</div><div class='add'>+      - const: drv-1</div><div class='add'>+      - const: drv-2</div><div class='add'>+      - const: drv-3</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  bcm-voter:</div><div class='add'>+    $ref: /schemas/interconnect/qcom,bcm-voter.yaml#</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/clock/qcom,rpmhcc.yaml#</div><div class='add'>+</div><div class='add'>+  power-controller:</div><div class='add'>+    $ref: /schemas/power/qcom,rpmpd.yaml#</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^regulators(-[0-9])?$':</div><div class='add'>+    $ref: /schemas/regulator/qcom,rpmh-regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - qcom,drv-id</div><div class='add'>+  - qcom,tcs-config</div><div class='add'>+  - qcom,tcs-offset</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    // For a TCS whose RSC base address is 0x179C0000 and is at a DRV id of</div><div class='add'>+    // 2, the register offsets for DRV2 start at 0D00, the register</div><div class='add'>+    // calculations are like this::</div><div class='add'>+    // DRV0: 0x179C0000</div><div class='add'>+    // DRV2: 0x179C0000 + 0x10000 = 0x179D0000</div><div class='add'>+    // DRV2: 0x179C0000 + 0x10000 * 2 = 0x179E0000</div><div class='add'>+    // TCS-OFFSET: 0xD00</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+</div><div class='add'>+    rsc@179c0000 {</div><div class='add'>+        compatible = "qcom,rpmh-rsc";</div><div class='add'>+        reg = &lt;0x179c0000 0x10000&gt;,</div><div class='add'>+              &lt;0x179d0000 0x10000&gt;,</div><div class='add'>+              &lt;0x179e0000 0x10000&gt;;</div><div class='add'>+        reg-names = "drv-0", "drv-1", "drv-2";</div><div class='add'>+        interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        label = "apps_rsc";</div><div class='add'>+        qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='add'>+        qcom,drv-id = &lt;2&gt;;</div><div class='add'>+        qcom,tcs-config = &lt;ACTIVE_TCS  2&gt;,</div><div class='add'>+                          &lt;SLEEP_TCS   3&gt;,</div><div class='add'>+                          &lt;WAKE_TCS    3&gt;,</div><div class='add'>+                          &lt;CONTROL_TCS 1&gt;;</div><div class='add'>+        power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    // For a TCS whose RSC base address is 0xAF20000 and is at DRV id of 0, the</div><div class='add'>+    // register offsets for DRV0 start at 01C00, the register calculations are</div><div class='add'>+    // like this::</div><div class='add'>+    // DRV0: 0xAF20000</div><div class='add'>+    // TCS-OFFSET: 0x1C00</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+</div><div class='add'>+    rsc@af20000 {</div><div class='add'>+        compatible = "qcom,rpmh-rsc";</div><div class='add'>+        reg = &lt;0xaf20000 0x10000&gt;;</div><div class='add'>+        reg-names = "drv-0";</div><div class='add'>+        interrupts = &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        label = "disp_rsc";</div><div class='add'>+        qcom,tcs-offset = &lt;0x1c00&gt;;</div><div class='add'>+        qcom,drv-id = &lt;0&gt;;</div><div class='add'>+        qcom,tcs-config = &lt;ACTIVE_TCS  0&gt;,</div><div class='add'>+                          &lt;SLEEP_TCS   1&gt;,</div><div class='add'>+                          &lt;WAKE_TCS    1&gt;,</div><div class='add'>+                          &lt;CONTROL_TCS 0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,rpmh-rsc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    rsc@18200000 {</div><div class='add'>+        compatible = "qcom,rpmh-rsc";</div><div class='add'>+        reg = &lt;0x18200000 0x10000&gt;,</div><div class='add'>+              &lt;0x18210000 0x10000&gt;,</div><div class='add'>+              &lt;0x18220000 0x10000&gt;;</div><div class='add'>+        reg-names = "drv-0", "drv-1", "drv-2";</div><div class='add'>+        interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        label = "apps_rsc";</div><div class='add'>+        qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='add'>+        qcom,drv-id = &lt;2&gt;;</div><div class='add'>+        qcom,tcs-config = &lt;ACTIVE_TCS  2&gt;,</div><div class='add'>+                          &lt;SLEEP_TCS   3&gt;,</div><div class='add'>+                          &lt;WAKE_TCS    3&gt;,</div><div class='add'>+                          &lt;CONTROL_TCS 0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;CLUSTER_PD&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller {</div><div class='add'>+            compatible = "qcom,sm8350-rpmh-clk";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+            clock-names = "xo";</div><div class='add'>+            clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        power-controller {</div><div class='add'>+            compatible = "qcom,sm8350-rpmhpd";</div><div class='add'>+            #power-domain-cells = &lt;1&gt;;</div><div class='add'>+            operating-points-v2 = &lt;&amp;rpmhpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+            rpmhpd_opp_table: opp-table {</div><div class='add'>+                compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_ret: opp1 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_RETENTION&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_min_svs: opp2 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_MIN_SVS&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_low_svs: opp3 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_LOW_SVS&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_svs: opp4 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_svs_l1: opp5 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_SVS_L1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_nom: opp6 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_nom_l1: opp7 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_nom_l2: opp8 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_NOM_L2&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_turbo: opp9 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                rpmhpd_opp_turbo_l1: opp10 {</div><div class='add'>+                    opp-level = &lt;RPMH_REGULATOR_LEVEL_TURBO_L1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        bcm-voter {</div><div class='add'>+            compatible = "qcom,bcm-voter";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml<br/>index b32457c2fc0b..ea86569a40d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,smd-rpm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Resource Power Manager (RPM) over SMD</div><div class='add'>+title: Qualcomm Resource Power Manager (RPM) over SMD/GLINK</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   This driver is used to interface with the Resource Power Manager (RPM) found</div><div class='hunk'>@@ -12,9 +12,9 @@ description: |</div><div class='ctx'>   to vote for state of the system resources, such as clocks, regulators and bus</div><div class='ctx'>   frequencies.</div><div class='ctx'> </div><div class='del'>-  The SMD information for the RPM edge should be filled out.  See qcom,smd.txt</div><div class='del'>-  for the required edge properties.  All SMD related properties will reside</div><div class='del'>-  within the RPM node itself.</div><div class='add'>+  The SMD or GLINK information for the RPM edge should be filled out.  See</div><div class='add'>+  qcom,smd.yaml for the required edge properties.  All SMD/GLINK related</div><div class='add'>+  properties will reside within the RPM node itself.</div><div class='ctx'> </div><div class='ctx'>   The RPM exposes resources to its subnodes.  The rpm_requests node must be</div><div class='ctx'>   present and this subnode may contain children that designate regulator</div><div class='hunk'>@@ -25,32 +25,56 @@ description: |</div><div class='ctx'>   rpm_requests.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Kathiravan T &lt;kathirav@codeaurora.org&gt;</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,rpm-apq8084</div><div class='ctx'>       - qcom,rpm-ipq6018</div><div class='add'>+      - qcom,rpm-ipq9574</div><div class='ctx'>       - qcom,rpm-msm8226</div><div class='add'>+      - qcom,rpm-msm8909</div><div class='ctx'>       - qcom,rpm-msm8916</div><div class='add'>+      - qcom,rpm-msm8936</div><div class='ctx'>       - qcom,rpm-msm8953</div><div class='ctx'>       - qcom,rpm-msm8974</div><div class='ctx'>       - qcom,rpm-msm8976</div><div class='add'>+      - qcom,rpm-msm8994</div><div class='ctx'>       - qcom,rpm-msm8996</div><div class='ctx'>       - qcom,rpm-msm8998</div><div class='ctx'>       - qcom,rpm-sdm660</div><div class='ctx'>       - qcom,rpm-sm6115</div><div class='ctx'>       - qcom,rpm-sm6125</div><div class='add'>+      - qcom,rpm-sm6375</div><div class='ctx'>       - qcom,rpm-qcm2290</div><div class='ctx'>       - qcom,rpm-qcs404</div><div class='ctx'> </div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/clock/qcom,rpmcc.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  power-controller:</div><div class='add'>+    $ref: /schemas/power/qcom,rpmpd.yaml#</div><div class='add'>+</div><div class='add'>+  qcom,glink-channels:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description: Channel name used for the RPM communication</div><div class='add'>+    items:</div><div class='add'>+      - const: rpm_requests</div><div class='add'>+</div><div class='ctx'>   qcom,smd-channels:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string-array</div><div class='ctx'>     description: Channel name used for the RPM communication</div><div class='ctx'>     items:</div><div class='ctx'>       - const: rpm_requests</div><div class='ctx'> </div><div class='add'>+patternProperties:</div><div class='add'>+  "^regulators(-[01])?$":</div><div class='add'>+    $ref: /schemas/regulator/qcom,smd-rpm-regulator.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> if:</div><div class='ctx'>   properties:</div><div class='ctx'>     compatible:</div><div class='hunk'>@@ -58,11 +82,21 @@ if:</div><div class='ctx'>         enum:</div><div class='ctx'>           - qcom,rpm-apq8084</div><div class='ctx'>           - qcom,rpm-msm8916</div><div class='add'>+          - qcom,rpm-msm8936</div><div class='ctx'>           - qcom,rpm-msm8974</div><div class='add'>+          - qcom,rpm-msm8976</div><div class='ctx'>           - qcom,rpm-msm8953</div><div class='add'>+          - qcom,rpm-msm8994</div><div class='ctx'> then:</div><div class='add'>+  properties:</div><div class='add'>+    qcom,glink-channels: false</div><div class='ctx'>   required:</div><div class='ctx'>     - qcom,smd-channels</div><div class='add'>+else:</div><div class='add'>+  properties:</div><div class='add'>+    qcom,smd-channels: false</div><div class='add'>+  required:</div><div class='add'>+    - qcom,glink-channels</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -82,12 +116,33 @@ examples:</div><div class='ctx'>             qcom,ipc = &lt;&amp;apcs 8 0&gt;;</div><div class='ctx'>             qcom,smd-edge = &lt;15&gt;;</div><div class='ctx'> </div><div class='del'>-                rpm_requests {</div><div class='del'>-                        compatible = "qcom,rpm-msm8974";</div><div class='del'>-                        qcom,smd-channels = "rpm_requests";</div><div class='add'>+            rpm-requests {</div><div class='add'>+                compatible = "qcom,rpm-msm8916";</div><div class='add'>+                qcom,smd-channels = "rpm_requests";</div><div class='add'>+</div><div class='add'>+                clock-controller {</div><div class='add'>+                    compatible = "qcom,rpmcc-msm8916", "qcom,rpmcc";</div><div class='add'>+                    #clock-cells = &lt;1&gt;;</div><div class='add'>+                    clocks = &lt;&amp;xo_board&gt;;</div><div class='add'>+                    clock-names = "xo";</div><div class='add'>+                };</div><div class='ctx'> </div><div class='del'>-                        /* Regulator nodes to follow */</div><div class='add'>+                power-controller {</div><div class='add'>+                    compatible = "qcom,msm8916-rpmpd";</div><div class='add'>+                    #power-domain-cells = &lt;1&gt;;</div><div class='add'>+                    operating-points-v2 = &lt;&amp;rpmpd_opp_table&gt;;</div><div class='add'>+</div><div class='add'>+                    rpmpd_opp_table: opp-table {</div><div class='add'>+                        compatible = "operating-points-v2";</div><div class='add'>+</div><div class='add'>+                        opp-1 {</div><div class='add'>+                            opp-level = &lt;1&gt;;</div><div class='add'>+                        };</div><div class='add'>+                        opp-2 {</div><div class='add'>+                            opp-level = &lt;2&gt;;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='del'>-     };</div><div class='del'>-...</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt<br/>deleted file mode 100644<br/>index 234ae2256501..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smd.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,98 +0,0 @@</div><div class='del'>-Qualcomm Shared Memory Driver (SMD) binding</div><div class='del'>-</div><div class='del'>-This binding describes the Qualcomm Shared Memory Driver, a fifo based</div><div class='del'>-communication channel for sending data between the various subsystems in</div><div class='del'>-Qualcomm platforms.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,smd"</div><div class='del'>-</div><div class='del'>-= EDGES</div><div class='del'>-</div><div class='del'>-Each subnode of the SMD node represents a remote subsystem or a remote</div><div class='del'>-processor of some sort - or in SMD language an "edge". The name of the edges</div><div class='del'>-are not important.</div><div class='del'>-The edge is described by the following properties:</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the IRQ used by the remote processor to</div><div class='del'>-		    signal this processor about communication related updates</div><div class='del'>-</div><div class='del'>-- mboxes:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to the associated doorbell in APCS, as described</div><div class='del'>-		    in mailbox/mailbox.txt</div><div class='del'>-</div><div class='del'>-- qcom,ipc:</div><div class='del'>-	Usage: required, unless mboxes is specified</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: three entries specifying the outgoing ipc bit used for</div><div class='del'>-		    signaling the remote processor:</div><div class='del'>-		    - phandle to a syscon node representing the apcs registers</div><div class='del'>-		    - u32 representing offset to the register within the syscon</div><div class='del'>-		    - u32 representing the ipc bit within the register</div><div class='del'>-</div><div class='del'>-- qcom,smd-edge:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: the identifier of the remote processor in the smd channel</div><div class='del'>-		    allocation table</div><div class='del'>-</div><div class='del'>-- qcom,remote-pid:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: the identifier for the remote processor as known by the rest</div><div class='del'>-		    of the system.</div><div class='del'>-</div><div class='del'>-- label:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: name of the edge, used for debugging and identification</div><div class='del'>-		    purposes. The node name will be used if this is not</div><div class='del'>-		    present.</div><div class='del'>-</div><div class='del'>-= SMD DEVICES</div><div class='del'>-</div><div class='del'>-In turn, subnodes of the "edges" represent devices tied to SMD channels on that</div><div class='del'>-"edge". The names of the devices are not important. The properties of these</div><div class='del'>-nodes are defined by the individual bindings for the SMD devices - but must</div><div class='del'>-contain the following property:</div><div class='del'>-</div><div class='del'>-- qcom,smd-channels:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: a list of channels tied to this device, used for matching</div><div class='del'>-		    the device to channels</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-</div><div class='del'>-The following example represents a smd node, with one edge representing the</div><div class='del'>-"rpm" subsystem. For the "rpm" subsystem we have a device tied to the</div><div class='del'>-"rpm_request" channel.</div><div class='del'>-</div><div class='del'>-	apcs: syscon@f9011000 {</div><div class='del'>-		compatible = "syscon";</div><div class='del'>-		reg = &lt;0xf9011000 0x1000&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	smd {</div><div class='del'>-		compatible = "qcom,smd";</div><div class='del'>-</div><div class='del'>-		rpm {</div><div class='del'>-			interrupts = &lt;0 168 1&gt;;</div><div class='del'>-			qcom,ipc = &lt;&amp;apcs 8 0&gt;;</div><div class='del'>-			qcom,smd-edge = &lt;15&gt;;</div><div class='del'>-</div><div class='del'>-			rpm_requests {</div><div class='del'>-				compatible = "qcom,rpm-msm8974";</div><div class='del'>-				qcom,smd-channels = "rpm_requests";</div><div class='del'>-</div><div class='del'>-				...</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml<br/>new file mode 100644<br/>index 000000000000..063e595c12f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,smd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Shared Memory Driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Qualcomm Shared Memory Driver is a FIFO based communication channel for</div><div class='add'>+  sending data between the various subsystems in Qualcomm platforms.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,smd</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^smd-edge|rpm$":</div><div class='add'>+    $ref: /schemas/remoteproc/qcom,smd-edge.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Each subnode of the SMD node represents a remote subsystem or a remote</div><div class='add'>+      processor of some sort - or in SMD language an "edge". The name of the</div><div class='add'>+      edges are not important.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # The following example represents a smd node, with one edge representing the</div><div class='add'>+  # "rpm" subsystem. For the "rpm" subsystem we have a device tied to the</div><div class='add'>+  # "rpm_request" channel.</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    shared-memory {</div><div class='add'>+        compatible = "qcom,smd";</div><div class='add'>+</div><div class='add'>+        rpm {</div><div class='add'>+            interrupts = &lt;GIC_SPI 168 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            qcom,ipc = &lt;&amp;apcs 8 0&gt;;</div><div class='add'>+            qcom,smd-edge = &lt;15&gt;;</div><div class='add'>+</div><div class='add'>+            rpm-requests {</div><div class='add'>+                compatible = "qcom,rpm-msm8974";</div><div class='add'>+                qcom,smd-channels = "rpm_requests";</div><div class='add'>+</div><div class='add'>+                clock-controller {</div><div class='add'>+                    compatible = "qcom,rpmcc-msm8974", "qcom,rpmcc";</div><div class='add'>+                    #clock-cells = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml<br/>index 4149cf2b66be..bc7815d985e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,smem.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/qcom/qcom,smem.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,smem.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Shared Memory Manager binding</div><div class='add'>+title: Qualcomm Shared Memory Manager</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andy Gross &lt;agross@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt<br/>deleted file mode 100644<br/>index 49e1d72d3648..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,110 +0,0 @@</div><div class='del'>-Qualcomm Shared Memory Point 2 Point binding</div><div class='del'>-</div><div class='del'>-The Shared Memory Point to Point (SMP2P) protocol facilitates communication of</div><div class='del'>-a single 32-bit value between two processors.  Each value has a single writer</div><div class='del'>-(the local side) and a single reader (the remote side).  Values are uniquely</div><div class='del'>-identified in the system by the directed edge (local processor ID to remote</div><div class='del'>-processor ID) and a string identifier.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,smp2p"</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: one entry specifying the smp2p notification interrupt</div><div class='del'>-</div><div class='del'>-- mboxes:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to the associated doorbell in APCS, as described</div><div class='del'>-		    in mailbox/mailbox.txt</div><div class='del'>-</div><div class='del'>-- qcom,ipc:</div><div class='del'>-	Usage: required, unless mboxes is specified</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: three entries specifying the outgoing ipc bit used for</div><div class='del'>-		    signaling the remote end of the smp2p edge:</div><div class='del'>-		    - phandle to a syscon node representing the apcs registers</div><div class='del'>-		    - u32 representing offset to the register within the syscon</div><div class='del'>-		    - u32 representing the ipc bit within the register</div><div class='del'>-</div><div class='del'>-- qcom,smem:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32 array&gt;</div><div class='del'>-	Definition: two identifiers of the inbound and outbound smem items used</div><div class='del'>-		    for this edge</div><div class='del'>-</div><div class='del'>-- qcom,local-pid:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: specifies the identifier of the local endpoint of this edge</div><div class='del'>-</div><div class='del'>-- qcom,remote-pid:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: specifies the identifier of the remote endpoint of this edge</div><div class='del'>-</div><div class='del'>-= SUBNODES</div><div class='del'>-Each SMP2P pair contain a set of inbound and outbound entries, these are</div><div class='del'>-described in subnodes of the smp2p device node. The node names are not</div><div class='del'>-important.</div><div class='del'>-</div><div class='del'>-- qcom,entry-name:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: specifies the name of this entry, for inbound entries this</div><div class='del'>-		    will be used to match against the remotely allocated entry</div><div class='del'>-		    and for outbound entries this name is used for allocating</div><div class='del'>-		    entries</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required for incoming entries</div><div class='del'>-	Value type: &lt;empty&gt;</div><div class='del'>-	Definition: marks the entry as inbound; the node should be specified</div><div class='del'>-		    as a two cell interrupt-controller as defined in</div><div class='del'>-		    "../interrupt-controller/interrupts.txt"</div><div class='del'>-		    If not specified this node will denote the outgoing entry</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required for incoming entries</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2 - denoting the bit in the entry and IRQ flags</div><div class='del'>-</div><div class='del'>-- #qcom,smem-state-cells:</div><div class='del'>-	Usage: required for outgoing entries</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 1 - denoting the bit in the entry</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-The following example shows the SMP2P setup with the wireless processor,</div><div class='del'>-defined from the 8974 apps processor's point-of-view. It encompasses one</div><div class='del'>-inbound and one outbound entry:</div><div class='del'>-</div><div class='del'>-wcnss-smp2p {</div><div class='del'>-	compatible = "qcom,smp2p";</div><div class='del'>-	qcom,smem = &lt;431&gt;, &lt;451&gt;;</div><div class='del'>-</div><div class='del'>-	interrupts = &lt;0 143 1&gt;;</div><div class='del'>-</div><div class='del'>-	qcom,ipc = &lt;&amp;apcs 8 18&gt;;</div><div class='del'>-</div><div class='del'>-	qcom,local-pid = &lt;0&gt;;</div><div class='del'>-	qcom,remote-pid = &lt;4&gt;;</div><div class='del'>-</div><div class='del'>-	wcnss_smp2p_out: master-kernel {</div><div class='del'>-		qcom,entry-name = "master-kernel";</div><div class='del'>-</div><div class='del'>-		#qcom,smem-state-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wcnss_smp2p_in: slave-kernel {</div><div class='del'>-		qcom,entry-name = "slave-kernel";</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml<br/>new file mode 100644<br/>index 000000000000..58500529b90f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,smp2p.yaml</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,smp2p.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Shared Memory Point 2 Point</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Shared Memory Point to Point (SMP2P) protocol facilitates communication</div><div class='add'>+  of a single 32-bit value between two processors.  Each value has a single</div><div class='add'>+  writer (the local side) and a single reader (the remote side).  Values are</div><div class='add'>+  uniquely identified in the system by the directed edge (local processor ID to</div><div class='add'>+  remote processor ID) and a string identifier.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,smp2p</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Reference to the mailbox representing the outgoing doorbell in APCS for</div><div class='add'>+      this client.</div><div class='add'>+</div><div class='add'>+  qcom,ipc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to a syscon node representing the APCS registers</div><div class='add'>+          - description: u32 representing offset to the register within the syscon</div><div class='add'>+          - description: u32 representing the ipc bit within the register</div><div class='add'>+    description:</div><div class='add'>+      Three entries specifying the outgoing ipc bit used for signaling the</div><div class='add'>+      remote end of the smp2p edge.</div><div class='add'>+</div><div class='add'>+  qcom,local-pid:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The identifier of the local endpoint of this edge.</div><div class='add'>+</div><div class='add'>+  qcom,remote-pid:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The identifier of the remote endpoint of this edge.</div><div class='add'>+</div><div class='add'>+  qcom,smem:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    items:</div><div class='add'>+      maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      Two identifiers of the inbound and outbound smem items used for this edge.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^master-kernel|slave-kernel|ipa-ap-to-modem|ipa-modem-to-ap|wlan-ap-to-wpss|wlan-wpss-to-ap$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Each SMP2P pair contain a set of inbound and outbound entries, these are</div><div class='add'>+      described in subnodes of the smp2p device node. The node names are not</div><div class='add'>+      important.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      interrupt-controller:</div><div class='add'>+        description:</div><div class='add'>+          Marks the entry as inbound; the node should be specified as a two</div><div class='add'>+          cell interrupt-controller.  If not specified this node will denote</div><div class='add'>+          the outgoing entry.</div><div class='add'>+</div><div class='add'>+      '#interrupt-cells':</div><div class='add'>+        const: 2</div><div class='add'>+</div><div class='add'>+      qcom,entry-name:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        description:</div><div class='add'>+          The name of this entry, for inbound entries this will be used to</div><div class='add'>+          match against the remotely allocated entry and for outbound entries</div><div class='add'>+          this name is used for allocating entries.</div><div class='add'>+</div><div class='add'>+      '#qcom,smem-state-cells':</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        const: 1</div><div class='add'>+        description:</div><div class='add'>+          Required for outgoing entries.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - qcom,entry-name</div><div class='add'>+</div><div class='add'>+    oneOf:</div><div class='add'>+      - required:</div><div class='add'>+          - interrupt-controller</div><div class='add'>+          - '#interrupt-cells'</div><div class='add'>+      - required:</div><div class='add'>+          - '#qcom,smem-state-cells'</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - qcom,local-pid</div><div class='add'>+  - qcom,remote-pid</div><div class='add'>+  - qcom,smem</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - mboxes</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,ipc</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # The following example shows the SMP2P setup with the wireless processor,</div><div class='add'>+  # defined from the 8974 apps processor's point-of-view. It encompasses one</div><div class='add'>+  # inbound and one outbound entry.</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    shared-memory {</div><div class='add'>+        compatible = "qcom,smp2p";</div><div class='add'>+        qcom,smem = &lt;431&gt;, &lt;451&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 143 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        qcom,ipc = &lt;&amp;apcs 8 18&gt;;</div><div class='add'>+        qcom,local-pid = &lt;0&gt;;</div><div class='add'>+        qcom,remote-pid = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+        wcnss_smp2p_out: master-kernel {</div><div class='add'>+            qcom,entry-name = "master-kernel";</div><div class='add'>+            #qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        wcnss_smp2p_in: slave-kernel {</div><div class='add'>+            qcom,entry-name = "slave-kernel";</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt<br/>deleted file mode 100644<br/>index 2993b5a97dd6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,smsm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,104 +0,0 @@</div><div class='del'>-Qualcomm Shared Memory State Machine</div><div class='del'>-</div><div class='del'>-The Shared Memory State Machine facilitates broadcasting of single bit state</div><div class='del'>-information between the processors in a Qualcomm SoC. Each processor is</div><div class='del'>-assigned 32 bits of state that can be modified. A processor can through a</div><div class='del'>-matrix of bitmaps signal subscription of notifications upon changes to a</div><div class='del'>-certain bit owned by a certain remote processor.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,smsm"</div><div class='del'>-</div><div class='del'>-- qcom,ipc-N:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: three entries specifying the outgoing ipc bit used for</div><div class='del'>-		    signaling the N:th remote processor</div><div class='del'>-		    - phandle to a syscon node representing the apcs registers</div><div class='del'>-		    - u32 representing offset to the register within the syscon</div><div class='del'>-		    - u32 representing the ipc bit within the register</div><div class='del'>-</div><div class='del'>-- qcom,local-host:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: identifier of the local processor in the list of hosts, or</div><div class='del'>-		    in other words specifier of the column in the subscription</div><div class='del'>-		    matrix representing the local processor</div><div class='del'>-		    defaults to host 0</div><div class='del'>-</div><div class='del'>-- #address-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 1</div><div class='del'>-</div><div class='del'>-- #size-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 0</div><div class='del'>-</div><div class='del'>-= SUBNODES</div><div class='del'>-Each processor's state bits are described by a subnode of the smsm device node.</div><div class='del'>-Nodes can either be flagged as an interrupt-controller to denote a remote</div><div class='del'>-processor's state bits or the local processors bits.  The node names are not</div><div class='del'>-important.</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: specifies the offset, in words, of the first bit for this</div><div class='del'>-		    entry</div><div class='del'>-</div><div class='del'>-- #qcom,smem-state-cells:</div><div class='del'>-	Usage: required for local entry</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 1 - denotes bit number</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required for remote entries</div><div class='del'>-	Value type: &lt;empty&gt;</div><div class='del'>-	Definition: marks the entry as a interrupt-controller and the state bits</div><div class='del'>-		    to belong to a remote processor</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required for remote entries</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 2 - denotes bit number and IRQ flags</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required for remote entries</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: one entry specifying remote IRQ used by the remote processor</div><div class='del'>-		    to signal changes of its state bits</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-The following example shows the SMEM setup for controlling properties of the</div><div class='del'>-wireless processor, defined from the 8974 apps processor's point-of-view. It</div><div class='del'>-encompasses one outbound entry and the outgoing interrupt for the wireless</div><div class='del'>-processor.</div><div class='del'>-</div><div class='del'>-smsm {</div><div class='del'>-	compatible = "qcom,smsm";</div><div class='del'>-</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-	qcom,ipc-3 = &lt;&amp;apcs 8 19&gt;;</div><div class='del'>-</div><div class='del'>-	apps_smsm: apps@0 {</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		#qcom,smem-state-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	wcnss_smsm: wcnss@7 {</div><div class='del'>-		reg = &lt;7&gt;;</div><div class='del'>-		interrupts = &lt;0 144 1&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;2&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml<br/>new file mode 100644<br/>index 000000000000..db67cf043256<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,smsm.yaml</a></div><div class='hunk'>@@ -0,0 +1,138 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,smsm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Shared Memory State Machine</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Shared Memory State Machine facilitates broadcasting of single bit state</div><div class='add'>+  information between the processors in a Qualcomm SoC. Each processor is</div><div class='add'>+  assigned 32 bits of state that can be modified. A processor can through a</div><div class='add'>+  matrix of bitmaps signal subscription of notifications upon changes to a</div><div class='add'>+  certain bit owned by a certain remote processor.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,smsm</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  qcom,local-host:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      Identifier of the local processor in the list of hosts, or in other words</div><div class='add'>+      specifier of the column in the subscription matrix representing the local</div><div class='add'>+      processor.</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^qcom,ipc-[1-4]$":</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to a syscon node representing the APCS registers</div><div class='add'>+          - description: u32 representing offset to the register within the syscon</div><div class='add'>+          - description: u32 representing the ipc bit within the register</div><div class='add'>+    description:</div><div class='add'>+      Three entries specifying the outgoing ipc bit used for signaling the N:th</div><div class='add'>+      remote processor.</div><div class='add'>+</div><div class='add'>+  "@[0-9a-f]$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Each processor's state bits are described by a subnode of the SMSM device</div><div class='add'>+      node.  Nodes can either be flagged as an interrupt-controller to denote a</div><div class='add'>+      remote processor's state bits or the local processors bits.  The node</div><div class='add'>+      names are not important.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      interrupt-controller:</div><div class='add'>+        description:</div><div class='add'>+          Marks the entry as a interrupt-controller and the state bits to</div><div class='add'>+          belong to a remote processor.</div><div class='add'>+</div><div class='add'>+      '#interrupt-cells':</div><div class='add'>+        const: 2</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description:</div><div class='add'>+          One entry specifying remote IRQ used by the remote processor to</div><div class='add'>+          signal changes of its state bits.</div><div class='add'>+</div><div class='add'>+      '#qcom,smem-state-cells':</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        const: 1</div><div class='add'>+        description:</div><div class='add'>+          Required for local entry. Denotes bit number.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    oneOf:</div><div class='add'>+      - required:</div><div class='add'>+          - '#qcom,smem-state-cells'</div><div class='add'>+      - required:</div><div class='add'>+          - interrupt-controller</div><div class='add'>+          - '#interrupt-cells'</div><div class='add'>+          - interrupts</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+</div><div class='add'>+anyOf:</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,ipc-1</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,ipc-2</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,ipc-3</div><div class='add'>+  - required:</div><div class='add'>+      - qcom,ipc-4</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  # The following example shows the SMEM setup for controlling properties of</div><div class='add'>+  # the wireless processor, defined from the 8974 apps processor's</div><div class='add'>+  # point-of-view. It encompasses one outbound entry and the outgoing interrupt</div><div class='add'>+  # for the wireless processor.</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    shared-memory {</div><div class='add'>+        compatible = "qcom,smsm";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        qcom,ipc-3 = &lt;&amp;apcs 8 19&gt;;</div><div class='add'>+</div><div class='add'>+        apps_smsm: apps@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            #qcom,smem-state-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        wcnss_smsm: wcnss@7 {</div><div class='add'>+            reg = &lt;7&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 144 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-controller;</div><div class='add'>+            #interrupt-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml<br/>index 07d2d5398345..20c8cd38ff0d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/soc/qcom/qcom,spm.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,spm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Subsystem Power Manager binding</div><div class='add'>+title: Qualcomm Subsystem Power Manager</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Andy Gross &lt;agross@kernel.org&gt;</div><div class='hunk'>@@ -22,9 +22,13 @@ properties:</div><div class='ctx'>           - qcom,sdm660-silver-saw2-v4.1-l2</div><div class='ctx'>           - qcom,msm8998-gold-saw2-v4.1-l2</div><div class='ctx'>           - qcom,msm8998-silver-saw2-v4.1-l2</div><div class='add'>+          - qcom,msm8909-saw2-v3.0-cpu</div><div class='ctx'>           - qcom,msm8916-saw2-v3.0-cpu</div><div class='add'>+          - qcom,msm8939-saw2-v3.0-cpu</div><div class='ctx'>           - qcom,msm8226-saw2-v2.1-cpu</div><div class='ctx'>           - qcom,msm8974-saw2-v2.1-cpu</div><div class='add'>+          - qcom,msm8976-gold-saw2-v2.3-l2</div><div class='add'>+          - qcom,msm8976-silver-saw2-v2.3-l2</div><div class='ctx'>           - qcom,apq8084-saw2-v2.1-cpu</div><div class='ctx'>           - qcom,apq8064-saw2-v1.1-cpu</div><div class='ctx'>       - const: qcom,saw2</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.txt<br/>deleted file mode 100644<br/>index 1382b64e1381..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,131 +0,0 @@</div><div class='del'>-Qualcomm WCNSS Binding</div><div class='del'>-</div><div class='del'>-This binding describes the Qualcomm WCNSS hardware. It consists of control</div><div class='del'>-block and a BT, WiFi and FM radio block, all using SMD as command channels.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be: "qcom,wcnss",</div><div class='del'>-</div><div class='del'>-- qcom,smd-channel:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: standard SMD property specifying the SMD channel used for</div><div class='del'>-		    communication with the WiFi firmware.</div><div class='del'>-		    Should be "WCNSS_CTRL".</div><div class='del'>-</div><div class='del'>-- qcom,mmio:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: reference to a node specifying the wcnss "ccu" and "dxe"</div><div class='del'>-		    register blocks. The node must be compatible with one of</div><div class='del'>-		    the following:</div><div class='del'>-		    "qcom,riva",</div><div class='del'>-		    "qcom,pronto"</div><div class='del'>-</div><div class='del'>-- firmware-name:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: specifies the relative firmware image path for the WLAN NV</div><div class='del'>-		    blob. Defaults to "wlan/prima/WCNSS_qcom_wlan_nv.bin" if</div><div class='del'>-		    not specified.</div><div class='del'>-</div><div class='del'>-= SUBNODES</div><div class='del'>-The subnodes of the wcnss node are optional and describe the individual blocks in</div><div class='del'>-the WCNSS.</div><div class='del'>-</div><div class='del'>-== Bluetooth</div><div class='del'>-The following properties are defined to the bluetooth node:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be:</div><div class='del'>-		    "qcom,wcnss-bt"</div><div class='del'>-</div><div class='del'>-- local-bd-address:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;u8 array&gt;</div><div class='del'>-	Definition: see Documentation/devicetree/bindings/net/bluetooth.txt</div><div class='del'>-</div><div class='del'>-== WiFi</div><div class='del'>-The following properties are defined to the WiFi node:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: must be one of:</div><div class='del'>-		    "qcom,wcnss-wlan",</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the "rx" and "tx" interrupts</div><div class='del'>-</div><div class='del'>-- interrupt-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must contain "rx" and "tx"</div><div class='del'>-</div><div class='del'>-- qcom,smem-state:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should reference the tx-enable and tx-rings-empty SMEM states</div><div class='del'>-</div><div class='del'>-- qcom,smem-state-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must contain "tx-enable" and "tx-rings-empty"</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-The following example represents a SMD node, with one edge representing the</div><div class='del'>-"pronto" subsystem, with the wcnss device and its wcn3680 BT and WiFi blocks</div><div class='del'>-described; as found on the 8974 platform.</div><div class='del'>-</div><div class='del'>-smd {</div><div class='del'>-	compatible = "qcom,smd";</div><div class='del'>-</div><div class='del'>-	pronto-edge {</div><div class='del'>-		interrupts = &lt;0 142 1&gt;;</div><div class='del'>-</div><div class='del'>-		qcom,ipc = &lt;&amp;apcs 8 17&gt;;</div><div class='del'>-		qcom,smd-edge = &lt;6&gt;;</div><div class='del'>-</div><div class='del'>-		wcnss {</div><div class='del'>-			compatible = "qcom,wcnss";</div><div class='del'>-			qcom,smd-channels = "WCNSS_CTRL";</div><div class='del'>-</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-			qcom,mmio = &lt;&amp;pronto&gt;;</div><div class='del'>-</div><div class='del'>-			bt {</div><div class='del'>-				compatible = "qcom,wcnss-bt";</div><div class='del'>-</div><div class='del'>-				/* BD address 00:11:22:33:44:55 */</div><div class='del'>-				local-bd-address = [ 55 44 33 22 11 00 ];</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			wlan {</div><div class='del'>-				compatible = "qcom,wcnss-wlan";</div><div class='del'>-</div><div class='del'>-				interrupts = &lt;0 145 0&gt;, &lt;0 146 0&gt;;</div><div class='del'>-				interrupt-names = "tx", "rx";</div><div class='del'>-</div><div class='del'>-				qcom,smem-state = &lt;&amp;apps_smsm 10&gt;, &lt;&amp;apps_smsm 9&gt;;</div><div class='del'>-				qcom,smem-state-names = "tx-enable", "tx-rings-empty";</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-soc {</div><div class='del'>-	pronto: pronto {</div><div class='del'>-		compatible = "qcom,pronto";</div><div class='del'>-</div><div class='del'>-		reg = &lt;0xfb204000 0x2000&gt;, &lt;0xfb202000 0x1000&gt;, &lt;0xfb21b000 0x3000&gt;;</div><div class='del'>-		reg-names = "ccu", "dxe", "pmu";</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml<br/>new file mode 100644<br/>index 000000000000..74bb92e31554<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom,wcnss.yaml</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/qcom/qcom,wcnss.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm WCNSS</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Qualcomm WCNSS hardware consists of control block and a BT, WiFi and FM</div><div class='add'>+  radio block, all using SMD as command channels.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,wcnss</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    default: wlan/prima/WCNSS_qcom_wlan_nv.bin</div><div class='add'>+    description:</div><div class='add'>+      Relative firmware image path for the WLAN NV blob.</div><div class='add'>+</div><div class='add'>+  qcom,mmio:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: |</div><div class='add'>+      Reference to a node specifying the wcnss "ccu" and "dxe" register blocks.</div><div class='add'>+      The node must be compatible with one of the following::</div><div class='add'>+           - qcom,riva"</div><div class='add'>+           - qcom,pronto"</div><div class='add'>+</div><div class='add'>+  qcom,smd-channels:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    const: WCNSS_CTRL</div><div class='add'>+    description:</div><div class='add'>+      Standard SMD property specifying the SMD channel used for communication</div><div class='add'>+      with the WiFi firmware.</div><div class='add'>+</div><div class='add'>+  bluetooth:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    allOf:</div><div class='add'>+      - $ref: /schemas/net/bluetooth/bluetooth-controller.yaml#</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,wcnss-bt</div><div class='add'>+</div><div class='add'>+      local-bd-address: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='add'>+  wifi:</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    type: object</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: qcom,wcnss-wlan</div><div class='add'>+</div><div class='add'>+      interrupts:</div><div class='add'>+        maxItems: 2</div><div class='add'>+</div><div class='add'>+      interrupt-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: tx</div><div class='add'>+          - const: rx</div><div class='add'>+</div><div class='add'>+      qcom,smem-states:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+        maxItems: 2</div><div class='add'>+        description:</div><div class='add'>+          Should reference the tx-enable and tx-rings-empty SMEM states.</div><div class='add'>+</div><div class='add'>+      qcom,smem-state-names:</div><div class='add'>+        items:</div><div class='add'>+          - const: tx-enable</div><div class='add'>+          - const: tx-rings-empty</div><div class='add'>+        description:</div><div class='add'>+          Names of SMEM states.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+      - interrupts</div><div class='add'>+      - interrupt-names</div><div class='add'>+      - qcom,smem-states</div><div class='add'>+      - qcom,smem-state-names</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - qcom,mmio</div><div class='add'>+  - qcom,smd-channels</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    smd-edge {</div><div class='add'>+        interrupts = &lt;GIC_SPI 142 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,ipc = &lt;&amp;apcs 8 17&gt;;</div><div class='add'>+        qcom,smd-edge = &lt;6&gt;;</div><div class='add'>+        qcom,remote-pid = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+        label = "pronto";</div><div class='add'>+</div><div class='add'>+        wcnss {</div><div class='add'>+            compatible = "qcom,wcnss";</div><div class='add'>+            qcom,smd-channels = "WCNSS_CTRL";</div><div class='add'>+</div><div class='add'>+            qcom,mmio = &lt;&amp;pronto&gt;;</div><div class='add'>+</div><div class='add'>+            bluetooth {</div><div class='add'>+                compatible = "qcom,wcnss-bt";</div><div class='add'>+                /* BD address 00:11:22:33:44:55 */</div><div class='add'>+                local-bd-address = [ 55 44 33 22 11 00 ];</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            wifi {</div><div class='add'>+                compatible = "qcom,wcnss-wlan";</div><div class='add'>+</div><div class='add'>+                interrupts = &lt;GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                             &lt;GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+                interrupt-names = "tx", "rx";</div><div class='add'>+</div><div class='add'>+                qcom,smem-states = &lt;&amp;apps_smsm 10&gt;, &lt;&amp;apps_smsm 9&gt;;</div><div class='add'>+                qcom,smem-state-names = "tx-enable", "tx-rings-empty";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml<br/>index 473adca4e973..7ab8cfff18c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/qcom/qcom-stats.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/soc/qcom/qcom-stats.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies, Inc. (QTI) Stats bindings</div><div class='add'>+title: Qualcomm Technologies, Inc. (QTI) Stats</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Maulik Shah &lt;mkshah@codeaurora.org&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,rpmh-stats</div><div class='add'>+      - qcom,sdm845-rpmh-stats</div><div class='ctx'>       - qcom,rpm-stats</div><div class='ctx'>       # For older RPM firmware versions with fixed offset for the sleep stats</div><div class='ctx'>       - qcom,apq8084-rpm-stats</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt b/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt<br/>deleted file mode 100644<br/>index 9b86d1eff219..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,137 +0,0 @@</div><div class='del'>-RPMH RSC:</div><div class='del'>-------------</div><div class='del'>-</div><div class='del'>-Resource Power Manager Hardened (RPMH) is the mechanism for communicating with</div><div class='del'>-the hardened resource accelerators on Qualcomm SoCs. Requests to the resources</div><div class='del'>-can be written to the Trigger Command Set (TCS)  registers and using a (addr,</div><div class='del'>-val) pair and triggered. Messages in the TCS are then sent in sequence over an</div><div class='del'>-internal bus.</div><div class='del'>-</div><div class='del'>-The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity</div><div class='del'>-(Resource State Coordinator a.k.a RSC) that can handle multiple sleep and</div><div class='del'>-active/wake resource requests. Multiple such DRVs can exist in a SoC and can</div><div class='del'>-be written to from Linux. The structure of each DRV follows the same template</div><div class='del'>-with a few variations that are captured by the properties here.</div><div class='del'>-</div><div class='del'>-A TCS may be triggered from Linux or triggered by the F/W after all the CPUs</div><div class='del'>-have powered off to facilitate idle power saving. TCS could be classified as -</div><div class='del'>-</div><div class='del'>-	ACTIVE  /* Triggered by Linux */</div><div class='del'>-	SLEEP   /* Triggered by F/W */</div><div class='del'>-	WAKE    /* Triggered by F/W */</div><div class='del'>-	CONTROL /* Triggered by F/W */</div><div class='del'>-</div><div class='del'>-The order in which they are described in the DT, should match the hardware</div><div class='del'>-configuration.</div><div class='del'>-</div><div class='del'>-Requests can be made for the state of a resource, when the subsystem is active</div><div class='del'>-or idle. When all subsystems like Modem, GPU, CPU are idle, the resource state</div><div class='del'>-will be an aggregate of the sleep votes from each of those subsystems. Clients</div><div class='del'>-may request a sleep value for their shared resources in addition to the active</div><div class='del'>-mode requests.</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Should be "qcom,rpmh-rsc".</div><div class='del'>-</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: The first register specifies the base address of the</div><div class='del'>-		    DRV(s). The number of DRVs in the dependent on the RSC.</div><div class='del'>-	            The tcs-offset specifies the start address of the</div><div class='del'>-	            TCS in the DRVs.</div><div class='del'>-</div><div class='del'>-- reg-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Maps the register specified in the reg property. Must be</div><div class='del'>-	            "drv-0", "drv-1", "drv-2" etc and "tcs-offset". The</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-interrupt&gt;</div><div class='del'>-	Definition: The interrupt that trips when a message complete/response</div><div class='del'>-	           is received for this DRV from the accelerators.</div><div class='del'>-</div><div class='del'>-- qcom,drv-id:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: The id of the DRV in the RSC block that will be used by</div><div class='del'>-		    this controller.</div><div class='del'>-</div><div class='del'>-- qcom,tcs-config:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: The tuple defining the configuration of TCS.</div><div class='del'>-	            Must have 2 cells which describe each TCS type.</div><div class='del'>-	            &lt;type number_of_tcs&gt;.</div><div class='del'>-	            The order of the TCS must match the hardware</div><div class='del'>-	            configuration.</div><div class='del'>-	- Cell #1 (TCS Type): TCS types to be specified -</div><div class='del'>-	            ACTIVE_TCS</div><div class='del'>-	            SLEEP_TCS</div><div class='del'>-	            WAKE_TCS</div><div class='del'>-	            CONTROL_TCS</div><div class='del'>-	- Cell #2 (Number of TCS): &lt;u32&gt;</div><div class='del'>-</div><div class='del'>-- label:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Name for the RSC. The name would be used in trace logs.</div><div class='del'>-</div><div class='del'>-Drivers that want to use the RSC to communicate with RPMH must specify their</div><div class='del'>-bindings as child nodes of the RSC controllers they wish to communicate with.</div><div class='del'>-</div><div class='del'>-Example 1:</div><div class='del'>-</div><div class='del'>-For a TCS whose RSC base address is is 0x179C0000 and is at a DRV id of 2, the</div><div class='del'>-register offsets for DRV2 start at 0D00, the register calculations are like</div><div class='del'>-this -</div><div class='del'>-DRV0: 0x179C0000</div><div class='del'>-DRV2: 0x179C0000 + 0x10000 = 0x179D0000</div><div class='del'>-DRV2: 0x179C0000 + 0x10000 * 2 = 0x179E0000</div><div class='del'>-TCS-OFFSET: 0xD00</div><div class='del'>-</div><div class='del'>-	apps_rsc: rsc@179c0000 {</div><div class='del'>-		label = "apps_rsc";</div><div class='del'>-		compatible = "qcom,rpmh-rsc";</div><div class='del'>-		reg = &lt;0x179c0000 0x10000&gt;,</div><div class='del'>-		      &lt;0x179d0000 0x10000&gt;,</div><div class='del'>-		      &lt;0x179e0000 0x10000&gt;;</div><div class='del'>-		reg-names = "drv-0", "drv-1", "drv-2";</div><div class='del'>-		interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		qcom,tcs-offset = &lt;0xd00&gt;;</div><div class='del'>-		qcom,drv-id = &lt;2&gt;;</div><div class='del'>-		qcom,tcs-config = &lt;ACTIVE_TCS  2&gt;,</div><div class='del'>-				  &lt;SLEEP_TCS   3&gt;,</div><div class='del'>-				  &lt;WAKE_TCS    3&gt;,</div><div class='del'>-				  &lt;CONTROL_TCS 1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example 2:</div><div class='del'>-</div><div class='del'>-For a TCS whose RSC base address is 0xAF20000 and is at DRV id of 0, the</div><div class='del'>-register offsets for DRV0 start at 01C00, the register calculations are like</div><div class='del'>-this -</div><div class='del'>-DRV0: 0xAF20000</div><div class='del'>-TCS-OFFSET: 0x1C00</div><div class='del'>-</div><div class='del'>-	disp_rsc: rsc@af20000 {</div><div class='del'>-		label = "disp_rsc";</div><div class='del'>-		compatible = "qcom,rpmh-rsc";</div><div class='del'>-		reg = &lt;0xaf20000 0x10000&gt;;</div><div class='del'>-		reg-names = "drv-0";</div><div class='del'>-		interrupts = &lt;GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		qcom,tcs-offset = &lt;0x1c00&gt;;</div><div class='del'>-		qcom,drv-id = &lt;0&gt;;</div><div class='del'>-		qcom,tcs-config = &lt;ACTIVE_TCS  0&gt;,</div><div class='del'>-				  &lt;SLEEP_TCS   1&gt;,</div><div class='del'>-				  &lt;WAKE_TCS    1&gt;,</div><div class='del'>-				  &lt;CONTROL_TCS 0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml<br/>new file mode 100644<br/>index 000000000000..1cac3cb5226c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g011-sys.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/V2M System Configuration (SYS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The RZ/V2M-alike SYS (System Configuration) controls the overall</div><div class='add'>+  configuration of the LSI and supports the following functions,</div><div class='add'>+  - Bank address settings for DMAC</div><div class='add'>+  - Bank address settings of the units for ICB</div><div class='add'>+  - ETHER AxCACHE[1] (C bit) control function</div><div class='add'>+  - RAMA initialization control</div><div class='add'>+  - MD[7:0] pin monitoring</div><div class='add'>+  - LSI version</div><div class='add'>+  - PCIe related settings</div><div class='add'>+  - WDT stop control</div><div class='add'>+  - Temperature sensor (TSU) monitor</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,r9a09g011-sys</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sys: system-controller@a3f03000 {</div><div class='add'>+      compatible = "renesas,r9a09g011-sys";</div><div class='add'>+      reg = &lt;0xa3f03000 0x400&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml<br/>index bb433e75a0ee..398663d21ab1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/power/renesas,rzg2l-sysc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/renesas/renesas,rzg2l-sysc.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/power/renesas,rzg2l-sysc.yaml#"</div><div class='add'>+$id: "http://devicetree.org/schemas/soc/renesas/renesas,rzg2l-sysc.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='ctx'> title: Renesas RZ/{G2L,V2L} System Controller (SYSC)</div><div class='hunk'>@@ -10,8 +10,8 @@ maintainers:</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  The RZ/{G2L,V2L} System Controller (SYSC) performs system control of the LSI</div><div class='del'>-  and supports following functions,</div><div class='add'>+  The RZ/{G2L,V2L}-alike System Controller (SYSC) performs system control of</div><div class='add'>+  the LSI and supports following functions,</div><div class='ctx'>   - External terminal state capture function</div><div class='ctx'>   - 34-bit address space access function</div><div class='ctx'>   - Low power consumption control</div><div class='hunk'>@@ -20,6 +20,7 @@ description:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - renesas,r9a07g043-sysc # RZ/G2UL and RZ/Five</div><div class='ctx'>       - renesas,r9a07g044-sysc # RZ/G2{L,LC}</div><div class='ctx'>       - renesas,r9a07g054-sysc # RZ/V2L</div><div class='ctx'> </div><div class='hunk'>@@ -43,8 +44,6 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-names</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml<br/>new file mode 100644<br/>index 000000000000..12df33f58484<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/V2M External Power Sequence Controller (PWC)</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The PWC IP found in the RZ/V2M family of chips comes with the below</div><div class='add'>+  capabilities</div><div class='add'>+    - external power supply on/off sequence generation</div><div class='add'>+    - on/off signal generation for the LPDDR4 core power supply (LPVDD)</div><div class='add'>+    - key input signals processing</div><div class='add'>+    - general-purpose output pins</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a09g011-pwc # RZ/V2M</div><div class='add'>+          - renesas,r9a09g055-pwc # RZ/V2MA</div><div class='add'>+      - const: renesas,rzv2m-pwc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  renesas,rzv2m-pwc-power:</div><div class='add'>+    description: The PWC is used to control the system power supplies.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    pwc: pwc@a3700000 {</div><div class='add'>+      compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";</div><div class='add'>+      reg = &lt;0xa3700000 0x800&gt;;</div><div class='add'>+      gpio-controller;</div><div class='add'>+      #gpio-cells = &lt;2&gt;;</div><div class='add'>+      renesas,rzv2m-pwc-power;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas.yaml<br/>index fa435d6fda77..53b95f348f8e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/arm/renesas.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/arm/renesas.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/renesas/renesas.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/renesas/renesas.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/arm/renesas.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/soc/renesas/renesas.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings</div><div class='add'>+title: Renesas SH-Mobile, R-Mobile, and R-Car Platform</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='hunk'>@@ -111,7 +111,7 @@ properties:</div><div class='ctx'>       - description: RZ/G1C (R8A77470)</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-              - iwave,g23s #iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)</div><div class='add'>+              - iwave,g23s # iWave Systems RZ/G1C Single Board Computer (iW-RainboW-G23S)</div><div class='ctx'>           - const: renesas,r8a77470</div><div class='ctx'> </div><div class='ctx'>       - description: RZ/G2M (R8A774A1)</div><div class='hunk'>@@ -212,12 +212,12 @@ properties:</div><div class='ctx'>               - renesas,silk # SILK (RTP0RC7794LCB00011S)</div><div class='ctx'>           - const: renesas,r8a7794</div><div class='ctx'> </div><div class='del'>-      - description: R-Car H3 (R8A77950)</div><div class='add'>+      # Note: R-Car H3 ES1.* (R8A77950) is not supported upstream anymore!</div><div class='add'>+</div><div class='add'>+      - description: R-Car H3 ES2.0 and later (R8A77951)</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='del'>-                # H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))</div><div class='del'>-                # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))</div><div class='del'>-              - renesas,h3ulcb</div><div class='add'>+              - renesas,h3ulcb # H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))</div><div class='ctx'>               - renesas,salvator-x # Salvator-X (RTP0RC7795SIPB0010S)</div><div class='ctx'>               - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)</div><div class='ctx'>           - const: renesas,r8a7795</div><div class='hunk'>@@ -264,6 +264,7 @@ properties:</div><div class='ctx'>                   - renesas,r8a779m4</div><div class='ctx'>                   - renesas,r8a779m5</div><div class='ctx'>                   - renesas,r8a779m8</div><div class='add'>+                  - renesas,r8a779mb</div><div class='ctx'>               - enum:</div><div class='ctx'>                   - renesas,r8a7795</div><div class='ctx'>                   - renesas,r8a77961</div><div class='hunk'>@@ -291,6 +292,13 @@ properties:</div><div class='ctx'>               - renesas,v3hsk # V3HSK (Y-ASK-RCAR-V3H-WS10)</div><div class='ctx'>           - const: renesas,r8a77980</div><div class='ctx'> </div><div class='add'>+      - description: R-Car V3H2 (R8A77980A)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,condor-i # Condor-I (RTP0RC77980SEBS012SA01)</div><div class='add'>+          - const: renesas,r8a77980a</div><div class='add'>+          - const: renesas,r8a77980</div><div class='add'>+</div><div class='ctx'>       - description: R-Car E3 (R8A77990)</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -327,6 +335,18 @@ properties:</div><div class='ctx'>           - const: renesas,spider-cpu</div><div class='ctx'>           - const: renesas,r8a779f0</div><div class='ctx'> </div><div class='add'>+      - description: R-Car V4H (R8A779G0)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,white-hawk-cpu # White Hawk CPU board (RTP8A779G0ASKB0FC0SA000)</div><div class='add'>+          - const: renesas,r8a779g0</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,white-hawk-breakout # White Hawk BreakOut board (RTP8A779G0ASKB0SB0SA000)</div><div class='add'>+          - const: renesas,white-hawk-cpu</div><div class='add'>+          - const: renesas,r8a779g0</div><div class='add'>+</div><div class='ctx'>       - description: R-Car H3e (R8A779M0)</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -397,15 +417,33 @@ properties:</div><div class='ctx'>           - const: renesas,r8a779m8</div><div class='ctx'>           - const: renesas,r8a7795</div><div class='ctx'> </div><div class='add'>+      - description: R-Car H3Ne-1.7G (R8A779MB)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,h3ulcb      # H3ULCB (R-Car Starter Kit Premier)</div><div class='add'>+              - renesas,salvator-xs # Salvator-XS (Salvator-X 2nd version)</div><div class='add'>+          - const: renesas,r8a779mb</div><div class='add'>+          - const: renesas,r8a7795</div><div class='add'>+</div><div class='ctx'>       - description: RZ/N1D (R9A06G032)</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package)</div><div class='ctx'>           - const: renesas,r9a06g032</div><div class='ctx'> </div><div class='del'>-      - description: RZ/G2UL (R9A07G043)</div><div class='add'>+      - description: RZ/N1{D,S} EB</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,rzn1d400-eb # RZN1D-EB (Expansion Board when using a RZN1D-DB)</div><div class='add'>+          - const: renesas,rzn1d400-db</div><div class='add'>+          - const: renesas,r9a06g032</div><div class='add'>+</div><div class='add'>+      - description: RZ/Five and RZ/G2UL (R9A07G043)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,smarc-evk # SMARC EVK</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g043f01 # RZ/Five</div><div class='ctx'>               - renesas,r9a07g043u11 # RZ/G2UL Type-1</div><div class='ctx'>               - renesas,r9a07g043u12 # RZ/G2UL Type-2</div><div class='ctx'>           - const: renesas,r9a07g043</div><div class='hunk'>@@ -430,6 +468,12 @@ properties:</div><div class='ctx'>               - renesas,r9a07g054l2 # Dual Cortex-A55 RZ/V2L</div><div class='ctx'>           - const: renesas,r9a07g054</div><div class='ctx'> </div><div class='add'>+      - description: RZ/V2M (R9A09G011)</div><div class='add'>+        items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,rzv2mevk2   # RZ/V2M Eval Board v2.0</div><div class='add'>+          - const: renesas,r9a09g011</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml<br/>index b2ba7bed89b2..65a2d5a4f28d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/rockchip/grf.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/rockchip/grf.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/rockchip/grf.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/rockchip/grf.yaml</a></div><div class='hunk'>@@ -15,7 +15,18 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - rockchip,rk3288-sgrf</div><div class='add'>+              - rockchip,rk3566-pipe-grf</div><div class='add'>+              - rockchip,rk3568-pcie3-phy-grf</div><div class='add'>+              - rockchip,rk3568-pipe-grf</div><div class='add'>+              - rockchip,rk3568-pipe-phy-grf</div><div class='ctx'>               - rockchip,rk3568-usb2phy-grf</div><div class='add'>+              - rockchip,rk3588-bigcore0-grf</div><div class='add'>+              - rockchip,rk3588-bigcore1-grf</div><div class='add'>+              - rockchip,rk3588-ioc</div><div class='add'>+              - rockchip,rk3588-php-grf</div><div class='add'>+              - rockchip,rk3588-sys-grf</div><div class='add'>+              - rockchip,rk3588-pcie3-phy-grf</div><div class='add'>+              - rockchip,rk3588-pcie3-pipe-grf</div><div class='ctx'>               - rockchip,rv1108-usbgrf</div><div class='ctx'>           - const: syscon</div><div class='ctx'>       - items:</div><div class='hunk'>@@ -25,6 +36,7 @@ properties:</div><div class='ctx'>               - rockchip,px30-usb2phy-grf</div><div class='ctx'>               - rockchip,rk3036-grf</div><div class='ctx'>               - rockchip,rk3066-grf</div><div class='add'>+              - rockchip,rk3128-grf</div><div class='ctx'>               - rockchip,rk3188-grf</div><div class='ctx'>               - rockchip,rk3228-grf</div><div class='ctx'>               - rockchip,rk3288-grf</div><div class='hunk'>@@ -42,6 +54,8 @@ properties:</div><div class='ctx'>               - rockchip,rk3568-pmugrf</div><div class='ctx'>               - rockchip,rv1108-grf</div><div class='ctx'>               - rockchip,rv1108-pmugrf</div><div class='add'>+              - rockchip,rv1126-grf</div><div class='add'>+              - rockchip,rv1126-pmugrf</div><div class='ctx'>           - const: syscon</div><div class='ctx'>           - const: simple-mfd</div><div class='ctx'> </div><div class='hunk'>@@ -66,13 +80,17 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: rockchip,px30-grf</div><div class='add'>+            enum:</div><div class='add'>+              - rockchip,px30-grf</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         lvds:</div><div class='del'>-          description:</div><div class='del'>-            Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt</div><div class='add'>+          type: object</div><div class='add'>+</div><div class='add'>+          $ref: /schemas/display/rockchip/rockchip,lvds.yaml#</div><div class='add'>+</div><div class='add'>+          unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -83,8 +101,9 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         edp-phy:</div><div class='del'>-          description:</div><div class='del'>-            Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt</div><div class='add'>+          type: object</div><div class='add'>+          $ref: /schemas/phy/rockchip,rk3288-dp-phy.yaml#</div><div class='add'>+          unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='hunk'>@@ -175,6 +194,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - rockchip,px30-usb2phy-grf</div><div class='add'>+              - rockchip,rk3128-grf</div><div class='ctx'>               - rockchip,rk3228-grf</div><div class='ctx'>               - rockchip,rk3308-usb2phy-grf</div><div class='ctx'>               - rockchip,rk3328-usb2phy-grf</div><div class='hunk'>@@ -190,7 +210,7 @@ allOf:</div><div class='ctx'>         "usb2phy@[0-9a-f]+$":</div><div class='ctx'>           type: object</div><div class='ctx'> </div><div class='del'>-          $ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#"</div><div class='add'>+          $ref: /schemas/phy/rockchip,inno-usb2phy.yaml#</div><div class='ctx'> </div><div class='ctx'>           unevaluatedProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml<br/>index c30a6437030d..5d8d9497f18e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/samsung/exynos-pmu.yaml</a></div><div class='hunk'>@@ -31,27 +31,35 @@ select:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - samsung,exynos3250-pmu</div><div class='del'>-          - samsung,exynos4210-pmu</div><div class='del'>-          - samsung,exynos4412-pmu</div><div class='del'>-          - samsung,exynos5250-pmu</div><div class='del'>-          - samsung,exynos5260-pmu</div><div class='del'>-          - samsung,exynos5410-pmu</div><div class='del'>-          - samsung,exynos5420-pmu</div><div class='del'>-          - samsung,exynos5433-pmu</div><div class='del'>-          - samsung,exynos7-pmu</div><div class='del'>-          - samsung,exynos850-pmu</div><div class='del'>-          - samsung-s5pv210-pmu</div><div class='del'>-      - const: syscon</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynos3250-pmu</div><div class='add'>+              - samsung,exynos4210-pmu</div><div class='add'>+              - samsung,exynos4412-pmu</div><div class='add'>+              - samsung,exynos5250-pmu</div><div class='add'>+              - samsung,exynos5260-pmu</div><div class='add'>+              - samsung,exynos5410-pmu</div><div class='add'>+              - samsung,exynos5420-pmu</div><div class='add'>+              - samsung,exynos5433-pmu</div><div class='add'>+              - samsung,exynos7-pmu</div><div class='add'>+              - samsung,exynos850-pmu</div><div class='add'>+              - samsung-s5pv210-pmu</div><div class='add'>+          - const: syscon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynos3250-pmu</div><div class='add'>+              - samsung,exynos4210-pmu</div><div class='add'>+              - samsung,exynos4412-pmu</div><div class='add'>+              - samsung,exynos5250-pmu</div><div class='add'>+              - samsung,exynos5420-pmu</div><div class='add'>+              - samsung,exynos5433-pmu</div><div class='add'>+          - const: simple-mfd</div><div class='add'>+          - const: syscon</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  assigned-clock-parents: true</div><div class='del'>-  assigned-clocks: true</div><div class='del'>-</div><div class='ctx'>   '#clock-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -67,6 +75,10 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 32</div><div class='ctx'> </div><div class='add'>+  dp-phy:</div><div class='add'>+    $ref: /schemas/phy/samsung,dp-video-phy.yaml</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>   interrupt-controller:</div><div class='ctx'>     description:</div><div class='ctx'>       Some PMUs are capable of behaving as an interrupt controller (mostly</div><div class='hunk'>@@ -77,14 +89,24 @@ properties:</div><div class='ctx'>       Must be identical to the that of the parent interrupt controller.</div><div class='ctx'>     const: 3</div><div class='ctx'> </div><div class='add'>+  mipi-phy:</div><div class='add'>+    $ref: /schemas/phy/samsung,mipi-video-phy.yaml</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  reboot-mode:</div><div class='add'>+    $ref: /schemas/power/reset/syscon-reboot-mode.yaml</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Reboot mode to alter bootloader behavior for the next boot</div><div class='add'>+</div><div class='ctx'>   syscon-poweroff:</div><div class='del'>-    $ref: "../../power/reset/syscon-poweroff.yaml#"</div><div class='add'>+    $ref: /schemas/power/reset/syscon-poweroff.yaml#</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Node for power off method</div><div class='ctx'> </div><div class='ctx'>   syscon-reboot:</div><div class='del'>-    $ref: "../../power/reset/syscon-reboot.yaml#"</div><div class='add'>+    $ref: /schemas/power/reset/syscon-reboot.yaml#</div><div class='ctx'>     type: object</div><div class='ctx'>     description:</div><div class='ctx'>       Node for reboot method</div><div class='hunk'>@@ -114,6 +136,39 @@ allOf:</div><div class='ctx'>         - clock-names</div><div class='ctx'>         - clocks</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos3250-pmu</div><div class='add'>+              - samsung,exynos4210-pmu</div><div class='add'>+              - samsung,exynos4412-pmu</div><div class='add'>+              - samsung,exynos5250-pmu</div><div class='add'>+              - samsung,exynos5420-pmu</div><div class='add'>+              - samsung,exynos5433-pmu</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        mipi-phy: true</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        mipi-phy: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos5250-pmu</div><div class='add'>+              - samsung,exynos5420-pmu</div><div class='add'>+              - samsung,exynos5433-pmu</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        dp-phy: true</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        dp-phy: false</div><div class='add'>+</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/exynos5250.h&gt;</div><div class='hunk'>@@ -127,4 +182,14 @@ examples:</div><div class='ctx'>         #clock-cells = &lt;1&gt;;</div><div class='ctx'>         clock-names = "clkout16";</div><div class='ctx'>         clocks = &lt;&amp;clock CLK_FIN_PLL&gt;;</div><div class='add'>+</div><div class='add'>+        dp-phy {</div><div class='add'>+            compatible = "samsung,exynos5250-dp-video-phy";</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        mipi-phy {</div><div class='add'>+            compatible = "samsung,s5pv210-mipi-video-phy";</div><div class='add'>+            #phy-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml b/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml<br/>index a98ed66d092e..a6836904a4f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml</a></div><div class='hunk'>@@ -4,11 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/soc/samsung/exynos-usi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Samsung's Exynos USI (Universal Serial Interface) binding</div><div class='add'>+title: Samsung's Exynos USI (Universal Serial Interface)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sam Protsenko &lt;semen.protsenko@linaro.org&gt;</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   USI IP-core provides selectable serial protocol (UART, SPI or High-Speed I2C).</div><div class='hunk'>@@ -22,8 +22,12 @@ properties:</div><div class='ctx'>     pattern: "^usi@[0-9a-f]+$"</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - samsung,exynos850-usi   # for USIv2 (Exynos850, ExynosAutoV9)</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: samsung,exynosautov9-usi</div><div class='add'>+          - const: samsung,exynos850-usi</div><div class='add'>+      - enum:</div><div class='add'>+          - samsung,exynos850-usi</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'> </div><div class='hunk'>@@ -77,7 +81,7 @@ patternProperties:</div><div class='ctx'>     description: Child node describing underlying UART/serial</div><div class='ctx'> </div><div class='ctx'>   "^spi@[0-9a-f]+$":</div><div class='del'>-    type: object</div><div class='add'>+    $ref: /schemas/spi/samsung,spi.yaml</div><div class='ctx'>     description: Child node describing underlying SPI</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml<br/>new file mode 100644<br/>index 000000000000..163e912e9cad<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/samsung/samsung,exynos-sysreg.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Samsung Exynos SoC series System Registers (SYSREG)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynos3-sysreg</div><div class='add'>+              - samsung,exynos4-sysreg</div><div class='add'>+              - samsung,exynos5-sysreg</div><div class='add'>+              - tesla,fsd-cam-sysreg</div><div class='add'>+              - tesla,fsd-fsys0-sysreg</div><div class='add'>+              - tesla,fsd-fsys1-sysreg</div><div class='add'>+              - tesla,fsd-peric-sysreg</div><div class='add'>+          - const: syscon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynos5433-cam0-sysreg</div><div class='add'>+              - samsung,exynos5433-cam1-sysreg</div><div class='add'>+              - samsung,exynos5433-disp-sysreg</div><div class='add'>+              - samsung,exynos5433-fsys-sysreg</div><div class='add'>+          - const: samsung,exynos5433-sysreg</div><div class='add'>+          - const: syscon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynos5433-sysreg</div><div class='add'>+              - samsung,exynos850-sysreg</div><div class='add'>+              - samsung,exynosautov9-sysreg</div><div class='add'>+          - const: syscon</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynos850-cmgp-sysreg</div><div class='add'>+              - samsung,exynos850-peri-sysreg</div><div class='add'>+          - const: samsung,exynos850-sysreg</div><div class='add'>+          - const: syscon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - samsung,exynosautov9-fsys2-sysreg</div><div class='add'>+              - samsung,exynosautov9-peric0-sysreg</div><div class='add'>+              - samsung,exynosautov9-peric1-sysreg</div><div class='add'>+          - const: samsung,exynosautov9-sysreg</div><div class='add'>+          - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos850-cmgp-sysreg</div><div class='add'>+              - samsung,exynos850-peri-sysreg</div><div class='add'>+              - samsung,exynos850-sysreg</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    system-controller@10010000 {</div><div class='add'>+        compatible = "samsung,exynos4-sysreg", "syscon";</div><div class='add'>+        reg = &lt;0x10010000 0x400&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml<br/>new file mode 100644<br/>index 000000000000..32d9cc2d72a8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-adamv.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier ADAMV block</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  ADAMV block implemented on Socionext UniPhier SoCs is an analog signal</div><div class='add'>+  amplifier that is a part of the external video and audio I/O system.</div><div class='add'>+</div><div class='add'>+  This block is defined for controlling audio I/O reset only.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-ld11-adamv</div><div class='add'>+          - socionext,uniphier-ld20-adamv</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-controller:</div><div class='add'>+    $ref: /schemas/reset/socionext,uniphier-reset.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@57920000 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-adamv",</div><div class='add'>+                     "simple-mfd", "syscon";</div><div class='add'>+        reg = &lt;0x57920000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        reset-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-adamv-reset";</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml<br/>new file mode 100644<br/>index 000000000000..09f861cc068f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier SoC AHCI glue layer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband</div><div class='add'>+  logic handling signals to AHCI host controller inside AHCI component.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-pro4-ahci-glue</div><div class='add'>+          - socionext,uniphier-pxs2-ahci-glue</div><div class='add'>+          - socionext,uniphier-pxs3-ahci-glue</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^reset-controller@[0-9a-f]+$":</div><div class='add'>+    $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#</div><div class='add'>+</div><div class='add'>+  "phy@[0-9a-f]+$":</div><div class='add'>+    $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sata-controller@65700000 {</div><div class='add'>+        compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd";</div><div class='add'>+        reg = &lt;0x65b00000 0x400&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0 0x65700000 0x100&gt;;</div><div class='add'>+</div><div class='add'>+        reset-controller@0 {</div><div class='add'>+            compatible = "socionext,uniphier-pxs3-ahci-reset";</div><div class='add'>+            reg = &lt;0x0 0x4&gt;;</div><div class='add'>+            clock-names = "link";</div><div class='add'>+            clocks = &lt;&amp;sys_clk 28&gt;;</div><div class='add'>+            reset-names = "link";</div><div class='add'>+            resets = &lt;&amp;sys_rst 28&gt;;</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        phy@10 {</div><div class='add'>+            compatible = "socionext,uniphier-pxs3-ahci-phy";</div><div class='add'>+            reg = &lt;0x10 0x10&gt;;</div><div class='add'>+            clock-names = "link", "phy";</div><div class='add'>+            clocks = &lt;&amp;sys_clk 28&gt;, &lt;&amp;sys_clk 30&gt;;</div><div class='add'>+            reset-names = "link", "phy";</div><div class='add'>+            resets = &lt;&amp;sys_rst 28&gt;, &lt;&amp;sys_rst 30&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml<br/>new file mode 100644<br/>index 000000000000..bd0def7236b5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml</a></div><div class='hunk'>@@ -0,0 +1,106 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier SoC DWC3 USB3.0 glue layer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is</div><div class='add'>+  a sideband logic handling signals to DWC3 host controller inside</div><div class='add'>+  USB3.0 component.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-pro4-dwc3-glue</div><div class='add'>+          - socionext,uniphier-pro5-dwc3-glue</div><div class='add'>+          - socionext,uniphier-pxs2-dwc3-glue</div><div class='add'>+          - socionext,uniphier-ld20-dwc3-glue</div><div class='add'>+          - socionext,uniphier-pxs3-dwc3-glue</div><div class='add'>+          - socionext,uniphier-nx1-dwc3-glue</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^reset-controller@[0-9a-f]+$":</div><div class='add'>+    $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml#</div><div class='add'>+</div><div class='add'>+  "^regulator@[0-9a-f]+$":</div><div class='add'>+    $ref: /schemas/regulator/socionext,uniphier-regulator.yaml#</div><div class='add'>+</div><div class='add'>+  "^phy@[0-9a-f]+$":</div><div class='add'>+    oneOf:</div><div class='add'>+      - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml#</div><div class='add'>+      - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    usb@65b00000 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd";</div><div class='add'>+        reg = &lt;0x65b00000 0x400&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0 0x65b00000 0x400&gt;;</div><div class='add'>+</div><div class='add'>+        reset-controller@0 {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-usb3-reset";</div><div class='add'>+            reg = &lt;0x0 0x4&gt;;</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+            clock-names = "link";</div><div class='add'>+            clocks = &lt;&amp;sys_clk 14&gt;;</div><div class='add'>+            reset-names = "link";</div><div class='add'>+            resets = &lt;&amp;sys_rst 14&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        regulator@100 {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-usb3-regulator";</div><div class='add'>+            reg = &lt;0x100 0x10&gt;;</div><div class='add'>+            clock-names = "link";</div><div class='add'>+            clocks = &lt;&amp;sys_clk 14&gt;;</div><div class='add'>+            reset-names = "link";</div><div class='add'>+            resets = &lt;&amp;sys_rst 14&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        phy@200 {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-usb3-hsphy";</div><div class='add'>+            reg = &lt;0x200 0x10&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+            clock-names = "link", "phy";</div><div class='add'>+            clocks = &lt;&amp;sys_clk 14&gt;, &lt;&amp;sys_clk 16&gt;;</div><div class='add'>+            reset-names = "link", "phy";</div><div class='add'>+            resets = &lt;&amp;sys_rst 14&gt;, &lt;&amp;sys_rst 16&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        phy@300 {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-usb3-ssphy";</div><div class='add'>+            reg = &lt;0x300 0x10&gt;;</div><div class='add'>+            #phy-cells = &lt;0&gt;;</div><div class='add'>+            clock-names = "link", "phy";</div><div class='add'>+            clocks = &lt;&amp;sys_clk 14&gt;, &lt;&amp;sys_clk 18&gt;;</div><div class='add'>+            reset-names = "link", "phy";</div><div class='add'>+            resets = &lt;&amp;sys_rst 14&gt;, &lt;&amp;sys_rst 18&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml<br/>new file mode 100644<br/>index 000000000000..2cc38bb5038e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,65 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-mioctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier media I/O block (MIO) controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  Media I/O block implemented on Socionext UniPhier SoCs is a legacy</div><div class='add'>+  integrated component of the stream type peripherals including USB2.0,</div><div class='add'>+  SD/eMMC, and MIO-DMAC.</div><div class='add'>+  Media I/O block has a common logic to control the component.</div><div class='add'>+</div><div class='add'>+  Recent SoCs have SD interface logic specialized only for SD functions</div><div class='add'>+  as a subset of media I/O block. See socionext,uniphier-sdctrl.yaml.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-ld4-mioctrl</div><div class='add'>+          - socionext,uniphier-pro4-mioctrl</div><div class='add'>+          - socionext,uniphier-sld8-mioctrl</div><div class='add'>+          - socionext,uniphier-ld11-mioctrl</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/clock/socionext,uniphier-clock.yaml#</div><div class='add'>+</div><div class='add'>+  reset-controller:</div><div class='add'>+    $ref: /schemas/reset/socionext,uniphier-reset.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@5b3e0000 {</div><div class='add'>+        compatible = "socionext,uniphier-ld11-mioctrl",</div><div class='add'>+                     "simple-mfd", "syscon";</div><div class='add'>+        reg = &lt;0x5b3e0000 0x800&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld11-mio-clock";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        reset-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld11-mio-reset";</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+            resets = &lt;&amp;sys_rst 7&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml<br/>new file mode 100644<br/>index 000000000000..0adcffe859ab<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier peripheral block controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  Peripheral block implemented on Socionext UniPhier SoCs is an integrated</div><div class='add'>+  component of the peripherals including UART, I2C/FI2C, and SCSSI.</div><div class='add'>+  Peripheral block controller is a logic to control the component.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-ld4-perictrl</div><div class='add'>+          - socionext,uniphier-pro4-perictrl</div><div class='add'>+          - socionext,uniphier-pro5-perictrl</div><div class='add'>+          - socionext,uniphier-pxs2-perictrl</div><div class='add'>+          - socionext,uniphier-sld8-perictrl</div><div class='add'>+          - socionext,uniphier-ld11-perictrl</div><div class='add'>+          - socionext,uniphier-ld20-perictrl</div><div class='add'>+          - socionext,uniphier-pxs3-perictrl</div><div class='add'>+          - socionext,uniphier-nx1-perictrl</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/clock/socionext,uniphier-clock.yaml#</div><div class='add'>+</div><div class='add'>+  reset-controller:</div><div class='add'>+    $ref: /schemas/reset/socionext,uniphier-reset.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@59820000 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-perictrl",</div><div class='add'>+                     "simple-mfd", "syscon";</div><div class='add'>+        reg = &lt;0x59820000 0x200&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-peri-clock";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        reset-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-peri-reset";</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml<br/>new file mode 100644<br/>index 000000000000..cb3b0d42739f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sdctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier SD interface logic</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  SD interface logic implemented on Socionext UniPhier SoCs is</div><div class='add'>+  attached outside SDHC, and has some SD related functions such as</div><div class='add'>+  clock control, reset control, mode switch, and so on.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-pro5-sdctrl</div><div class='add'>+          - socionext,uniphier-pxs2-sdctrl</div><div class='add'>+          - socionext,uniphier-ld11-sdctrl</div><div class='add'>+          - socionext,uniphier-ld20-sdctrl</div><div class='add'>+          - socionext,uniphier-pxs3-sdctrl</div><div class='add'>+          - socionext,uniphier-nx1-sdctrl</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/clock/socionext,uniphier-clock.yaml#</div><div class='add'>+</div><div class='add'>+  reset-controller:</div><div class='add'>+    $ref: /schemas/reset/socionext,uniphier-reset.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@59810000 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-sdctrl",</div><div class='add'>+                     "simple-mfd", "syscon";</div><div class='add'>+        reg = &lt;0x59810000 0x400&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-sd-clock";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        reset-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-sd-reset";</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml<br/>new file mode 100644<br/>index 000000000000..1341544d1df5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue-debug.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier SoC-glue logic debug part</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  SoC-glue logic debug part implemented on Socionext UniPhier SoCs is</div><div class='add'>+  a collection of miscellaneous function registers handling signals outside</div><div class='add'>+  system components for debug and monitor use.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-ld4-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-pro4-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-pro5-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-pxs2-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-sld8-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-ld11-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-ld20-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-pxs3-soc-glue-debug</div><div class='add'>+          - socionext,uniphier-nx1-soc-glue-debug</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^efuse@[0-9a-f]+$":</div><div class='add'>+    $ref: /schemas/nvmem/socionext,uniphier-efuse.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@5f900000 {</div><div class='add'>+        compatible = "socionext,uniphier-pxs2-soc-glue-debug",</div><div class='add'>+                     "simple-mfd", "syscon";</div><div class='add'>+        reg = &lt;0x5f900000 0x2000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+        ranges = &lt;0 0x5f900000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+        efuse@100 {</div><div class='add'>+            compatible = "socionext,uniphier-efuse";</div><div class='add'>+            reg = &lt;0x100 0x28&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml<br/>new file mode 100644<br/>index 000000000000..7845dcfca986<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml</a></div><div class='hunk'>@@ -0,0 +1,114 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier SoC-glue logic</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  SoC-glue logic implemented on Socionext UniPhier SoCs is a collection of</div><div class='add'>+  miscellaneous function registers handling signals outside system components.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-ld4-soc-glue</div><div class='add'>+          - socionext,uniphier-pro4-soc-glue</div><div class='add'>+          - socionext,uniphier-pro5-soc-glue</div><div class='add'>+          - socionext,uniphier-pxs2-soc-glue</div><div class='add'>+          - socionext,uniphier-sld8-soc-glue</div><div class='add'>+          - socionext,uniphier-ld11-soc-glue</div><div class='add'>+          - socionext,uniphier-ld20-soc-glue</div><div class='add'>+          - socionext,uniphier-pxs3-soc-glue</div><div class='add'>+          - socionext,uniphier-nx1-soc-glue</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  pinctrl:</div><div class='add'>+    $ref: /schemas/pinctrl/socionext,uniphier-pinctrl.yaml#</div><div class='add'>+</div><div class='add'>+  usb-hub:</div><div class='add'>+    $ref: /schemas/phy/socionext,uniphier-usb2-phy.yaml#</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/clock/socionext,uniphier-clock.yaml#</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - socionext,uniphier-pro4-soc-glue</div><div class='add'>+                - socionext,uniphier-ld11-soc-glue</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        usb-hub: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: socionext,uniphier-pro4-soc-glue</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-controller: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    syscon@5f800000 {</div><div class='add'>+        compatible = "socionext,uniphier-pro4-soc-glue",</div><div class='add'>+                     "simple-mfd", "syscon";</div><div class='add'>+        reg = &lt;0x5f800000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+        pinctrl {</div><div class='add'>+            compatible = "socionext,uniphier-pro4-pinctrl";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        usb-hub {</div><div class='add'>+            compatible = "socionext,uniphier-pro4-usb2-phy";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            phy@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                #phy-cells = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phy@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                #phy-cells = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phy@2 {</div><div class='add'>+                reg = &lt;2&gt;;</div><div class='add'>+                #phy-cells = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            phy@3 {</div><div class='add'>+                reg = &lt;3&gt;;</div><div class='add'>+                #phy-cells = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        clock-controller {</div><div class='add'>+            compatible = "socionext,uniphier-pro4-sg-clock";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml<br/>new file mode 100644<br/>index 000000000000..3acb14201d1a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml</a></div><div class='hunk'>@@ -0,0 +1,104 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext UniPhier system controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  System controller implemented on Socionext UniPhier SoCs has multiple</div><div class='add'>+  functions such as clock control, reset control, internal watchdog timer,</div><div class='add'>+  thermal management, and so on.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - socionext,uniphier-ld4-sysctrl</div><div class='add'>+          - socionext,uniphier-pro4-sysctrl</div><div class='add'>+          - socionext,uniphier-pro5-sysctrl</div><div class='add'>+          - socionext,uniphier-pxs2-sysctrl</div><div class='add'>+          - socionext,uniphier-sld8-sysctrl</div><div class='add'>+          - socionext,uniphier-ld11-sysctrl</div><div class='add'>+          - socionext,uniphier-ld20-sysctrl</div><div class='add'>+          - socionext,uniphier-pxs3-sysctrl</div><div class='add'>+          - socionext,uniphier-nx1-sysctrl</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+      - const: syscon</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/clock/socionext,uniphier-clock.yaml#</div><div class='add'>+</div><div class='add'>+  reset-controller:</div><div class='add'>+    $ref: /schemas/reset/socionext,uniphier-reset.yaml#</div><div class='add'>+</div><div class='add'>+  watchdog:</div><div class='add'>+    $ref: /schemas/watchdog/socionext,uniphier-wdt.yaml#</div><div class='add'>+</div><div class='add'>+  thermal-sensor:</div><div class='add'>+    $ref: /schemas/thermal/socionext,uniphier-thermal.yaml#</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: socionext,uniphier-ld4-sysctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        watchdog: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - socionext,uniphier-ld4-sysctrl</div><div class='add'>+              - socionext,uniphier-pro4-sysctrl</div><div class='add'>+              - socionext,uniphier-sld8-sysctrl</div><div class='add'>+              - socionext,uniphier-ld11-sysctrl</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        thermal-sensor: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    syscon@61840000 {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-sysctrl",</div><div class='add'>+                     "simple-mfd", "syscon";</div><div class='add'>+        reg = &lt;0x61840000 0x4000&gt;;</div><div class='add'>+</div><div class='add'>+        clock-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-clock";</div><div class='add'>+            #clock-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        reset-controller {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-reset";</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        watchdog {</div><div class='add'>+            compatible = "socionext,uniphier-wdt";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        thermal-sensor {</div><div class='add'>+            compatible = "socionext,uniphier-ld20-thermal";</div><div class='add'>+            interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml<br/>index ddea3d41971d..22cf9002fee7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml</a></div><div class='hunk'>@@ -25,6 +25,9 @@ description: |</div><div class='ctx'>   The Ring Accelerator is a hardware module that is responsible for accelerating</div><div class='ctx'>   management of the packet queues. The K3 SoCs can have more than one RA instances</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -54,14 +57,6 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: TI-SCI RM subtype for GP ring range</div><div class='ctx'> </div><div class='del'>-  ti,sci:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='del'>-    description: phandle on TI-SCI compatible System controller node</div><div class='del'>-</div><div class='del'>-  ti,sci-dev-id:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    description: TI-SCI device id of the ring accelerator</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -72,7 +67,7 @@ required:</div><div class='ctx'>   - ti,sci</div><div class='ctx'>   - ti,sci-dev-id</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml b/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml<br/>index 9e6cb4ee9755..5df7688a1e1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/soc/ti/sci-pm-domain.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: TI-SCI generic power domain node bindings</div><div class='add'>+title: TI-SCI generic power domain</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nishanth Menon &lt;nm@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml b/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml<br/>index 64461d432004..c402cb2928e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml</a></div><div class='hunk'>@@ -65,10 +65,11 @@ properties:</div><div class='ctx'>       - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0</div><div class='ctx'>       - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1</div><div class='ctx'>       - ti,am5728-pruss  # for AM57xx SoC family</div><div class='del'>-      - ti,k2g-pruss     # for 66AK2G SoC family</div><div class='add'>+      - ti,am625-pruss   # for K3 AM62x SoC family</div><div class='add'>+      - ti,am642-icssg   # for K3 AM64x SoC family</div><div class='ctx'>       - ti,am654-icssg   # for K3 AM65x SoC family</div><div class='ctx'>       - ti,j721e-icssg   # for K3 J721E SoC family</div><div class='del'>-      - ti,am642-icssg   # for K3 AM64x SoC family</div><div class='add'>+      - ti,k2g-pruss     # for 66AK2G SoC family</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -129,6 +130,7 @@ patternProperties:</div><div class='ctx'>       PRU-ICSS configuration space. CFG sub-module represented as a SysCon.</div><div class='ctx'> </div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -312,7 +314,7 @@ additionalProperties: false</div><div class='ctx'> # Due to inability of correctly verifying sub-nodes with an @address through</div><div class='ctx'> # the "required" list, the required sub-nodes below are commented out for now.</div><div class='ctx'> </div><div class='del'>-#required:</div><div class='add'>+# required:</div><div class='ctx'> # - memories</div><div class='ctx'> # - interrupt-controller</div><div class='ctx'> # - pru</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml b/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml<br/>new file mode 100644<br/>index 000000000000..0df41c4f60c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soc/ti/wkup-m3-ipc.yaml</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wakeup M3 IPC device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dave Gerlach &lt;d-gerlach@ti.com&gt;</div><div class='add'>+  - Drew Fustini &lt;dfustini@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor</div><div class='add'>+  (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks</div><div class='add'>+  that cannot be controlled from the MPU, like suspend/resume and certain deep</div><div class='add'>+  C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver</div><div class='add'>+  to boot the wkup_m3, it handles communication with the CM3 using IPC registers</div><div class='add'>+  present in the SoC's control module and a mailbox. The wkup_m3_ipc exposes an</div><div class='add'>+  API to allow the SoC PM code to execute specific PM tasks.</div><div class='add'>+</div><div class='add'>+  Wkup M3 Device Node</div><div class='add'>+  ====================</div><div class='add'>+  A wkup_m3_ipc device node is used to represent the IPC registers within an</div><div class='add'>+  SoC.</div><div class='add'>+</div><div class='add'>+  Support for VTT Toggle with GPIO pin</div><div class='add'>+  ====================================</div><div class='add'>+  On some boards like the AM335x EVM-SK and the AM437x GP EVM, a GPIO pin is</div><div class='add'>+  connected to the enable pin on the DDR VTT regulator. This allows the</div><div class='add'>+  regulator to be disabled upon suspend and enabled upon resume. Please note</div><div class='add'>+  that the GPIO pin must be part of the GPIO0 module as only this GPIO module</div><div class='add'>+  is in the wakeup power domain.</div><div class='add'>+</div><div class='add'>+  Support for IO Isolation</div><div class='add'>+  ========================</div><div class='add'>+  On AM437x SoCs, certain pins can be forced into an alternate state when IO</div><div class='add'>+  isolation is activated. Those pins have pad control registers prefixed by</div><div class='add'>+  'CTRL_CONF_' that contain DS0 (e.g. deep sleep) configuration bits that can</div><div class='add'>+  override the pin's existing bias (pull-up/pull-down) and value (high/low) when</div><div class='add'>+  IO isolation is active.</div><div class='add'>+</div><div class='add'>+  Support for I2C PMIC Voltage Scaling</div><div class='add'>+  ====================================</div><div class='add'>+  It is possible to pass the name of a binary file to load into the CM3 memory.</div><div class='add'>+  The binary data is the I2C sequences for the CM3 to send out to the PMIC</div><div class='add'>+  during low power mode entry.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,am3352-wkup-m3-ipc # for AM33xx SoCs</div><div class='add'>+      - ti,am4372-wkup-m3-ipc # for AM43xx SoCs</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      The IPC register address space to communicate with the Wakeup M3 processor</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: wkup_m3 interrupt that signals the MPU</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ti,rproc:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle to the wkup_m3 rproc node so the IPC driver can boot it</div><div class='add'>+</div><div class='add'>+  mboxes:</div><div class='add'>+    description:</div><div class='add'>+      phandles used by IPC framework to get correct mbox</div><div class='add'>+      channel for communication. Must point to appropriate</div><div class='add'>+      mbox_wkupm3 child node.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    description:</div><div class='add'>+      Name of binary file with I2C sequences for PMIC voltage scaling</div><div class='add'>+</div><div class='add'>+  ti,vtt-gpio-pin:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: GPIO pin connected to enable pin on VTT regulator</div><div class='add'>+</div><div class='add'>+  ti,set-io-isolation:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If this property is present, then the wkup_m3_ipc driver will instruct</div><div class='add'>+      the CM3 firmware to activate IO isolation when suspending to deep sleep.</div><div class='add'>+      This can be leveraged by a board design to put other devices on the board</div><div class='add'>+      into a low power state.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          not:</div><div class='add'>+            contains:</div><div class='add'>+              const: ti,am4372-wkup-m3-ipc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,set-io-isolation: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - ti,rproc</div><div class='add'>+  - mboxes</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    /* Example for AM335x SoC */</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        am335x_mailbox: mailbox {</div><div class='add'>+            #mbox-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        wkup_m3_ipc@1324 {</div><div class='add'>+           compatible = "ti,am3352-wkup-m3-ipc";</div><div class='add'>+           reg = &lt;0x1324 0x24&gt;;</div><div class='add'>+           interrupts = &lt;78&gt;;</div><div class='add'>+           ti,rproc = &lt;&amp;wkup_m3&gt;;</div><div class='add'>+           mboxes = &lt;&amp;am335x_mailbox &amp;mbox_wkupm3&gt;;</div><div class='add'>+           ti,vtt-gpio-pin = &lt;7&gt;;</div><div class='add'>+           firmware-name = "am335x-evm-scale-data.bin";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    /*</div><div class='add'>+     * Example for AM473x SoC:</div><div class='add'>+     * On the AM437x-GP-EVM board, gpio5_7 is wired to enable pin of the DDR VTT</div><div class='add'>+     * regulator. The 'ddr_vtt_toggle_default' pinmux node configures gpio5_7</div><div class='add'>+     * for pull-up during normal system operation. However, the DS0 (deep sleep)</div><div class='add'>+     * state of the pin is configured for pull-down and thus the VTT regulator</div><div class='add'>+     * will be disabled to save power when IO isolation is active. Note that</div><div class='add'>+     * this method is an alternative to using the 'ti,vtt-gpio-pin' property.</div><div class='add'>+     */</div><div class='add'>+    #include &lt;dt-bindings/pinctrl/am43xx.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        am437x_mailbox: mailbox {</div><div class='add'>+            #mbox-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        am43xx_pinmux {</div><div class='add'>+            pinctrl-names = "default";</div><div class='add'>+            pinctrl-0 = &lt;&amp;ddr3_vtt_toggle_default&gt;;</div><div class='add'>+</div><div class='add'>+            ddr3_vtt_toggle_default: ddr_vtt_toggle_default {</div><div class='add'>+                 pinctrl-single,pins = &lt;</div><div class='add'>+                    0x25C (DS0_PULL_UP_DOWN_EN | PIN_OUTPUT_PULLUP | DS0_FORCE_OFF_MODE | MUX_MODE7)</div><div class='add'>+                 &gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        wkup_m3_ipc@1324 {</div><div class='add'>+           compatible = "ti,am4372-wkup-m3-ipc";</div><div class='add'>+           reg = &lt;0x1324 0x24&gt;;</div><div class='add'>+           interrupts = &lt;78&gt;;</div><div class='add'>+           ti,rproc = &lt;&amp;wkup_m3&gt;;</div><div class='add'>+           mboxes = &lt;&amp;am437x_mailbox &amp;mbox_wkupm3&gt;;</div><div class='add'>+           ti,set-io-isolation;</div><div class='add'>+           firmware-name = "am43x-evm-scale-data.bin";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt b/Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt<br/>deleted file mode 100644<br/>index 401550487ed6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soc/ti/wkup_m3_ipc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,57 +0,0 @@</div><div class='del'>-Wakeup M3 IPC Driver</div><div class='del'>-=====================</div><div class='del'>-</div><div class='del'>-The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor</div><div class='del'>-(commonly referred to as Wakeup M3 or CM3) to help with various low power tasks</div><div class='del'>-that cannot be controlled from the MPU, like suspend/resume and certain deep</div><div class='del'>-C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver</div><div class='del'>-to boot the wkup_m3, it handles communication with the CM3 using IPC registers</div><div class='del'>-present in the SoC's control module and a mailbox. The wkup_m3_ipc exposes an</div><div class='del'>-API to allow the SoC PM code to execute specific PM tasks.</div><div class='del'>-</div><div class='del'>-Wkup M3 Device Node:</div><div class='del'>-====================</div><div class='del'>-A wkup_m3_ipc device node is used to represent the IPC registers within an</div><div class='del'>-SoC.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- compatible:		Should be,</div><div class='del'>-				"ti,am3352-wkup-m3-ipc" for AM33xx SoCs</div><div class='del'>-				"ti,am4372-wkup-m3-ipc" for AM43xx SoCs</div><div class='del'>-- reg:			Contains the IPC register address space to communicate</div><div class='del'>-			with the Wakeup M3 processor</div><div class='del'>-- interrupts:		Contains the interrupt information for the wkup_m3</div><div class='del'>-			interrupt that signals the MPU.</div><div class='del'>-- ti,rproc:		phandle to the wkup_m3 rproc node so the IPC driver</div><div class='del'>-			can boot it.</div><div class='del'>-- mboxes:		phandles used by IPC framework to get correct mbox</div><div class='del'>-			channel for communication. Must point to appropriate</div><div class='del'>-			mbox_wkupm3 child node.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>---------</div><div class='del'>-/* AM33xx */</div><div class='del'>-	l4_wkup: l4_wkup@44c00000 {</div><div class='del'>-		...</div><div class='del'>-</div><div class='del'>-		scm: scm@210000 {</div><div class='del'>-			compatible = "ti,am3-scm", "simple-bus";</div><div class='del'>-			reg = &lt;0x210000 0x2000&gt;;</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			ranges = &lt;0 0x210000 0x2000&gt;;</div><div class='del'>-</div><div class='del'>-			...</div><div class='del'>-</div><div class='del'>-			wkup_m3_ipc: wkup_m3_ipc@1324 {</div><div class='del'>-				compatible = "ti,am3352-wkup-m3-ipc";</div><div class='del'>-				reg = &lt;0x1324 0x24&gt;;</div><div class='del'>-				interrupts = &lt;78&gt;;</div><div class='del'>-				ti,rproc = &lt;&amp;wkup_m3&gt;;</div><div class='del'>-				mboxes = &lt;&amp;mailbox &amp;mbox_wkupm3&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-			...</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,adau1372.yaml b/Documentation/devicetree/bindings/sound/adi,adau1372.yaml<br/>index 701449311fec..ea62e51aba90 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau1372.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau1372.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau1372.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/adi,adau1372.yaml</a></div><div class='hunk'>@@ -8,12 +8,15 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Analog Devices ADAU1372 CODEC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Alexandre Belloni &lt;alexandre.belloni@bootlin.om&gt;</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Analog Devices ADAU1372 four inputs and two outputs codec.</div><div class='ctx'>   https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU1372.pdf</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -29,7 +32,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    const: "mclk"</div><div class='add'>+    const: mclk</div><div class='ctx'> </div><div class='ctx'>   powerdown-gpios:</div><div class='ctx'>     description: GPIO used for hardware power-down.</div><div class='hunk'>@@ -42,7 +45,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -64,4 +67,3 @@ examples:</div><div class='ctx'>         clock-frequency = &lt;12288000&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,adau17x1.txt b/Documentation/devicetree/bindings/sound/adi,adau17x1.txt<br/>deleted file mode 100644<br/>index 1447dec28125..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau17x1.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau17x1.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-Analog Devices ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>- - compatible:		Should contain one of the following:</div><div class='del'>-			"adi,adau1361"</div><div class='del'>-			"adi,adau1461"</div><div class='del'>-			"adi,adau1761"</div><div class='del'>-			"adi,adau1961"</div><div class='del'>-			"adi,adau1381"</div><div class='del'>-			"adi,adau1781"</div><div class='del'>-</div><div class='del'>- - reg:			The i2c address. Value depends on the state of ADDR0</div><div class='del'>-			and ADDR1, as wired in hardware.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>- - clock-names:		If provided must be "mclk".</div><div class='del'>- - clocks:		phandle + clock-specifiers for the clock that provides</div><div class='del'>-			the audio master clock for the device.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-#include &lt;dt-bindings/sound/adau17x1.h&gt;</div><div class='del'>-</div><div class='del'>-	i2c_bus {</div><div class='del'>-		adau1361@38 {</div><div class='del'>-			compatible = "adi,adau1761";</div><div class='del'>-			reg = &lt;0x38&gt;;</div><div class='del'>-</div><div class='del'>-			clock-names = "mclk";</div><div class='del'>-			clocks = &lt;&amp;audio_clock&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,adau17x1.yaml b/Documentation/devicetree/bindings/sound/adi,adau17x1.yaml<br/>new file mode 100644<br/>index 000000000000..8ef1e7f6ec91<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau17x1.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/adi,adau17x1.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/adi,adau17x1.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices ADAU1361/ADAU1461/ADAU1761/ADAU1961/ADAU1381/ADAU1781 Codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Lars-Peter Clausen &lt;lars@metafoo.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,adau1361</div><div class='add'>+      - adi,adau1381</div><div class='add'>+      - adi,adau1461</div><div class='add'>+      - adi,adau1761</div><div class='add'>+      - adi,adau1781</div><div class='add'>+      - adi,adau1961</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      The i2c address. Value depends on the state of ADDR0 and ADDR1,</div><div class='add'>+      as wired in hardware.</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: mclk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: provides the audio master clock for the device.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      audio-codec@38 {</div><div class='add'>+        compatible = "adi,adau1761";</div><div class='add'>+        reg = &lt;0x38&gt;;</div><div class='add'>+        clock-names = "mclk";</div><div class='add'>+        clocks = &lt;&amp;audio_clock&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,adau1977.yaml b/Documentation/devicetree/bindings/sound/adi,adau1977.yaml<br/>index b80454ad97da..dba3023a45e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau1977.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau1977.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau1977.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/adi,adau1977.yaml</a></div><div class='hunk'>@@ -32,8 +32,6 @@ properties:</div><div class='ctx'>   reset-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  spi-max-frequency: true</div><div class='del'>-</div><div class='ctx'>   AVDD-supply:</div><div class='ctx'>     description: Analog power support for the device.</div><div class='ctx'> </div><div class='hunk'>@@ -52,7 +50,11 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - AVDD-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,adau7002.txt b/Documentation/devicetree/bindings/sound/adi,adau7002.txt<br/>deleted file mode 100644<br/>index f144ee1abf85..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau7002.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau7002.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,19 +0,0 @@</div><div class='del'>-Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>- - compatible: Must be "adi,adau7002"</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>- - IOVDD-supply: Phandle and specifier for the power supply providing the IOVDD</div><div class='del'>-	supply as covered in Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='del'>-</div><div class='del'>-	If this property is not present it is assumed that the supply pin is</div><div class='del'>-	hardwired to always on.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	adau7002: pdm-to-i2s {</div><div class='del'>-		compatible = "adi,adau7002";</div><div class='del'>-		IOVDD-supply = &lt;&amp;supply&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,adau7002.yaml b/Documentation/devicetree/bindings/sound/adi,adau7002.yaml<br/>new file mode 100644<br/>index 000000000000..fcca0fde7d86<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau7002.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/adi,adau7002.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/adi,adau7002.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices ADAU7002 Stereo PDM-to-I2S/TDM Converter</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: adi,adau7002</div><div class='add'>+</div><div class='add'>+  IOVDD-supply:</div><div class='add'>+    description:</div><div class='add'>+      IOVDD power supply, if skipped then it is assumed that the supply pin is</div><div class='add'>+      hardwired to always on.</div><div class='add'>+</div><div class='add'>+  wakeup-delay-ms:</div><div class='add'>+    description:</div><div class='add'>+      Delay after power up needed for device to settle.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    audio-codec {</div><div class='add'>+        compatible = "adi,adau7002";</div><div class='add'>+        IOVDD-supply = &lt;&amp;pp1800_l15a&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        wakeup-delay-ms = &lt;80&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,adau7118.yaml b/Documentation/devicetree/bindings/sound/adi,adau7118.yaml<br/>index fb78967ee17b..12f60507aed7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau7118.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/adi,adau7118.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,adau7118.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/adi,adau7118.yaml</a></div><div class='hunk'>@@ -15,6 +15,9 @@ description: |</div><div class='ctx'>   standalone mode.</div><div class='ctx'>   https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU7118.pdf</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -57,7 +60,7 @@ required:</div><div class='ctx'>   - iovdd-supply</div><div class='ctx'>   - dvdd-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,max98363.yaml b/Documentation/devicetree/bindings/sound/adi,max98363.yaml<br/>new file mode 100644<br/>index 000000000000..a844b63f3930<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,max98363.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/adi,max98363.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/adi,max98363.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices MAX98363 SoundWire Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ryan Lee &lt;ryans.lee@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MAX98363 is a SoundWire input Class D mono amplifier that</div><div class='add'>+  supports MIPI SoundWire v1.2-compatible digital interface for</div><div class='add'>+  audio and control data.</div><div class='add'>+  SoundWire peripheral device ID of MAX98363 is 0x3*019f836300</div><div class='add'>+  where * is the peripheral device unique ID decoded from pin.</div><div class='add'>+  It supports up to 10 peripheral devices(0x0 to 0x9).</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sdw3019f836300</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soundwire-controller@3250000 {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x3250000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+        speaker@0,0 {</div><div class='add'>+            compatible = "sdw3019f836300";</div><div class='add'>+            reg = &lt;0 0&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            sound-name-prefix = "Speaker Left";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        speaker@0,1 {</div><div class='add'>+            compatible = "sdw3019f836300";</div><div class='add'>+            reg = &lt;0 1&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            sound-name-prefix = "Speaker Right";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/adi,max98396.yaml b/Documentation/devicetree/bindings/sound/adi,max98396.yaml<br/>new file mode 100644<br/>index 000000000000..bdc10d4204ec<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/adi,max98396.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/adi,max98396.yaml</a></div><div class='hunk'>@@ -0,0 +1,141 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/adi,max98396.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analog Devices MAX98396 Speaker Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ryan Lee &lt;ryans.lee@analog.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The MAX98396 is a mono Class-DG speaker amplifier with I/V sense.</div><div class='add'>+  The device provides a PCM interface for audio data and a standard</div><div class='add'>+  I2C interface for control data communication.</div><div class='add'>+  The MAX98397 is a variant of MAX98396 with wide input supply range.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - adi,max98396</div><div class='add'>+      - adi,max98397</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: I2C address of the device.</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: A 1.8V supply that powers up the AVDD pin.</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: A 1.2V supply that powers up the DVDD pin.</div><div class='add'>+</div><div class='add'>+  dvddio-supply:</div><div class='add'>+    description: A 1.2V or 1.8V supply that powers up the VDDIO pin.</div><div class='add'>+</div><div class='add'>+  pvdd-supply:</div><div class='add'>+    description: A 3.0V to 20V supply that powers up the PVDD pin.</div><div class='add'>+</div><div class='add'>+  vbat-supply:</div><div class='add'>+    description: A 3.3V to 5.5V supply that powers up the VBAT pin.</div><div class='add'>+</div><div class='add'>+  adi,vmon-slot-no:</div><div class='add'>+    description: slot number of the voltage sense monitor</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,imon-slot-no:</div><div class='add'>+    description: slot number of the current sense monitor</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    default: 1</div><div class='add'>+</div><div class='add'>+  adi,spkfb-slot-no:</div><div class='add'>+    description: slot number of speaker DSP monitor</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    default: 2</div><div class='add'>+</div><div class='add'>+  adi,bypass-slot-no:</div><div class='add'>+    description:</div><div class='add'>+      Selects the PCM data input channel that is routed to the speaker</div><div class='add'>+      audio processing bypass path.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 15</div><div class='add'>+    default: 0</div><div class='add'>+</div><div class='add'>+  adi,interleave-mode:</div><div class='add'>+    description:</div><div class='add'>+      For cases where a single combined channel for the I/V sense data</div><div class='add'>+      is not sufficient, the device can also be configured to share</div><div class='add'>+      a single data output channel on alternating frames.</div><div class='add'>+      In this configuration, the current and voltage data will be frame</div><div class='add'>+      interleaved on a single output channel.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  adi,dmon-stuck-enable:</div><div class='add'>+    description:</div><div class='add'>+      Enables the "data monitor stuck" feature. Once the data monitor is</div><div class='add'>+      enabled, it actively monitors the selected input data (from DIN) to the</div><div class='add'>+      speaker amplifier. Once a data error is detected, the data monitor</div><div class='add'>+      automatically places the device into software shutdown.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  adi,dmon-stuck-threshold-bits:</div><div class='add'>+    description:</div><div class='add'>+      Sets the threshold for the "data monitor stuck" feature, in bits.</div><div class='add'>+    enum: [9, 11, 13, 15]</div><div class='add'>+    default: 15</div><div class='add'>+</div><div class='add'>+  adi,dmon-magnitude-enable:</div><div class='add'>+    description:</div><div class='add'>+      Enables the "data monitor magnitude" feature. Once the data monitor is</div><div class='add'>+      enabled, it actively monitors the selected input data (from DIN) to the</div><div class='add'>+      speaker amplifier. Once a data error is detected, the data monitor</div><div class='add'>+      automatically places the device into software shutdown.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  adi,dmon-magnitude-threshold-bits:</div><div class='add'>+    description:</div><div class='add'>+      Sets the threshold for the "data monitor magnitude" feature, in bits.</div><div class='add'>+    enum: [2, 3, 4, 5]</div><div class='add'>+    default: 5</div><div class='add'>+</div><div class='add'>+  adi,dmon-duration-ms:</div><div class='add'>+    description:</div><div class='add'>+      Sets the duration for the "data monitor" feature, in milliseconds.</div><div class='add'>+    enum: [64, 256, 1024, 4096]</div><div class='add'>+    default: 64</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        max98396: amplifier@39 {</div><div class='add'>+            compatible = "adi,max98396";</div><div class='add'>+            reg = &lt;0x39&gt;;</div><div class='add'>+            dvdd-supply = &lt;&amp;regulator_1v2&gt;;</div><div class='add'>+            dvddio-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+            avdd-supply = &lt;&amp;regulator_1v8&gt;;</div><div class='add'>+            pvdd-supply = &lt;&amp;regulator_pvdd&gt;;</div><div class='add'>+            adi,vmon-slot-no = &lt;0&gt;;</div><div class='add'>+            adi,imon-slot-no = &lt;1&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ak4375.yaml b/Documentation/devicetree/bindings/sound/ak4375.yaml<br/>index f1d5074a024d..587598e122c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak4375.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4375.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak4375.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ak4375.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/ak4375.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: AK4375 DAC and headphones amplifier Device Tree Bindings</div><div class='add'>+title: AK4375 DAC and headphones amplifier</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vincent Knecht &lt;vincent.knecht@mailoo.org&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: asahi-kasei,ak4375</div><div class='hunk'>@@ -35,7 +38,7 @@ required:</div><div class='ctx'>   - avdd-supply</div><div class='ctx'>   - tvdd-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ak4458.txt b/Documentation/devicetree/bindings/sound/ak4458.txt<br/>deleted file mode 100644<br/>index 0416c14895d6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak4458.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4458.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-AK4458 audio DAC</div><div class='del'>-</div><div class='del'>-This device supports I2C mode.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : "asahi-kasei,ak4458" or "asahi-kasei,ak4497"</div><div class='del'>-- reg : The I2C address of the device for I2C</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- reset-gpios: A GPIO specifier for the power down &amp; reset pin</div><div class='del'>-- mute-gpios: A GPIO specifier for the soft mute pin</div><div class='del'>-- AVDD-supply: Analog power supply</div><div class='del'>-- DVDD-supply: Digital power supply</div><div class='del'>-- dsd-path: Select DSD input pins for ak4497</div><div class='del'>-            0: select #16, #17, #19 pins</div><div class='del'>-            1: select #3, #4, #5 pins</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-&amp;i2c {</div><div class='del'>-	ak4458: dac@10 {</div><div class='del'>-		compatible = "asahi-kasei,ak4458";</div><div class='del'>-		reg = &lt;0x10&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;</div><div class='del'>-		mute-gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_HIGH&gt;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ak4613.yaml b/Documentation/devicetree/bindings/sound/ak4613.yaml<br/>index ef4055ef0ccd..75e13414d6eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak4613.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4613.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak4613.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ak4613.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/ak4613.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: AK4613 I2C transmitter Device Tree Bindings</div><div class='add'>+title: AK4613 I2C transmitter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: asahi-kasei,ak4613</div><div class='hunk'>@@ -22,6 +25,13 @@ properties:</div><div class='ctx'>   "#sound-dai-cells":</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='add'>+  ports:</div><div class='add'>+    $ref: audio-graph-port.yaml#/definitions/ports</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^asahi-kasei,in[1-2]-single-end$":</div><div class='ctx'>     description: Input Pin 1 - 2.</div><div class='hunk'>@@ -35,7 +45,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ak4642.yaml b/Documentation/devicetree/bindings/sound/ak4642.yaml<br/>index 1e2caa29790e..437fe5d7cae1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak4642.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak4642.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak4642.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ak4642.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/ak4642.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: AK4642 I2C transmitter Device Tree Bindings</div><div class='add'>+title: AK4642 I2C transmitter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -37,7 +40,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ak5558.txt b/Documentation/devicetree/bindings/sound/ak5558.txt<br/>deleted file mode 100644<br/>index e28708db6686..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ak5558.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ak5558.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-AK5558 8 channel differential 32-bit delta-sigma ADC</div><div class='del'>-</div><div class='del'>-This device supports I2C mode only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : "asahi-kasei,ak5558" or "asahi-kasei,ak5552".</div><div class='del'>-- reg : The I2C address of the device.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- reset-gpios: A GPIO specifier for the power down &amp; reset pin.</div><div class='del'>-- AVDD-supply: Analog power supply</div><div class='del'>-- DVDD-supply: Digital power supply</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-&amp;i2c {</div><div class='del'>-	ak5558: adc@10 {</div><div class='del'>-		compatible = "asahi-kasei,ak5558";</div><div class='del'>-		reg = &lt;0x10&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/alc5632.txt b/Documentation/devicetree/bindings/sound/alc5632.txt<br/>deleted file mode 100644<br/>index ffd886d110bd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/alc5632.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/alc5632.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,43 +0,0 @@</div><div class='del'>-ALC5632 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports I2C only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "realtek,alc5632"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device.</div><div class='del'>-</div><div class='del'>-  - gpio-controller : Indicates this device is a GPIO controller.</div><div class='del'>-</div><div class='del'>-  - #gpio-cells : Should be two. The first cell is the pin number and the</div><div class='del'>-    second cell is used to specify optional parameters (currently unused).</div><div class='del'>-</div><div class='del'>-Pins on the device (for linking into audio routes):</div><div class='del'>-</div><div class='del'>-  * SPK_OUTP</div><div class='del'>-  * SPK_OUTN</div><div class='del'>-  * HP_OUT_L</div><div class='del'>-  * HP_OUT_R</div><div class='del'>-  * AUX_OUT_P</div><div class='del'>-  * AUX_OUT_N</div><div class='del'>-  * LINE_IN_L</div><div class='del'>-  * LINE_IN_R</div><div class='del'>-  * PHONE_P</div><div class='del'>-  * PHONE_N</div><div class='del'>-  * MIC1_P</div><div class='del'>-  * MIC1_N</div><div class='del'>-  * MIC2_P</div><div class='del'>-  * MIC2_N</div><div class='del'>-  * MICBIAS1</div><div class='del'>-  * DMICDAT</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-alc5632: alc5632@1e {</div><div class='del'>-	compatible = "realtek,alc5632";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-</div><div class='del'>-	gpio-controller;</div><div class='del'>-	#gpio-cells = &lt;2&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml<br/>index 559aff13ae23..78273647f766 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-codec.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Codec Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -102,6 +102,7 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -228,7 +229,7 @@ allOf:</div><div class='ctx'>               - Mic</div><div class='ctx'>               - Speaker</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml<br/>index c21c807b667c..739114fb6549 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 I2S Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 I2S Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -61,6 +61,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -89,7 +90,6 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         dmas:</div><div class='ctx'>           minItems: 1</div><div class='del'>-          maxItems: 2</div><div class='ctx'>           items:</div><div class='ctx'>             - description: RX DMA Channel</div><div class='ctx'>             - description: TX DMA Channel</div><div class='hunk'>@@ -129,7 +129,7 @@ required:</div><div class='ctx'>   - dmas</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml<br/>index 444a432912bb..8108c564dd78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-spdif.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-spdif.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 S/PDIF Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 S/PDIF Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -54,6 +54,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -104,7 +105,7 @@ required:</div><div class='ctx'>   - dmas</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml<br/>index 3b764415c9ab..5800de63fc84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/allwinner,sun50i-a64-codec-analog.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/allwinner,sun50i-a64-codec-analog.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A64 Analog Codec Device Tree Bindings</div><div class='add'>+title: Allwinner A64 Analog Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -21,6 +21,11 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Regulator for the headphone amplifier</div><div class='ctx'> </div><div class='add'>+  allwinner,internal-bias-resistor:</div><div class='add'>+    description:</div><div class='add'>+      Enable the internal 2.2K bias resistor between HBIAS and MICDET pins</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml<br/>new file mode 100644<br/>index 000000000000..763b876047c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/allwinner,sun50i-h6-dmic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Allwinner H6 DMIC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ban Tao &lt;fengzheng923@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - allwinner,sun20i-d1-dmic</div><div class='add'>+          - const: allwinner,sun50i-h6-dmic</div><div class='add'>+      - const: allwinner,sun50i-h6-dmic</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Bus Clock</div><div class='add'>+      - description: Module Clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: bus</div><div class='add'>+      - const: mod</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: RX DMA Channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    #include &lt;dt-bindings/clock/sun50i-h6-ccu.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/sun50i-h6-ccu.h&gt;</div><div class='add'>+</div><div class='add'>+    dmic: dmic@5095000 {</div><div class='add'>+      #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+      compatible = "allwinner,sun50i-h6-dmic";</div><div class='add'>+      reg = &lt;0x05095000 0x400&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;ccu CLK_BUS_DMIC&gt;, &lt;&amp;ccu CLK_DMIC&gt;;</div><div class='add'>+      clock-names = "bus", "mod";</div><div class='add'>+      dmas = &lt;&amp;dma 7&gt;;</div><div class='add'>+      dma-names = "rx";</div><div class='add'>+      resets = &lt;&amp;ccu RST_BUS_DMIC&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml<br/>index 26eca21e1f0f..1c21a1b390c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/allwinner,sun8i-a23-codec-analog.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A23 Analog Codec Device Tree Bindings</div><div class='add'>+title: Allwinner A23 Analog Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml b/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml<br/>index 19f111f40225..63eadc4200ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml</a></div><div class='hunk'>@@ -4,12 +4,15 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/allwinner,sun8i-a33-codec.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A33 Codec Device Tree Bindings</div><div class='add'>+title: Allwinner A33 Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='ctx'>   - Maxime Ripard &lt;mripard@kernel.org&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   "#sound-dai-cells":</div><div class='ctx'>     minimum: 0</div><div class='hunk'>@@ -49,7 +52,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml b/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml<br/>index 0705f91199a0..6350dfc0a926 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,aiu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,aiu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,aiu.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt<br/>deleted file mode 100644<br/>index fa4545ed81ca..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-fifo.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,34 +0,0 @@</div><div class='del'>-* Amlogic Audio FIFO controllers</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: 'amlogic,axg-toddr' or</div><div class='del'>-	      'amlogic,axg-toddr' or</div><div class='del'>-	      'amlogic,g12a-frddr' or</div><div class='del'>-	      'amlogic,g12a-toddr' or</div><div class='del'>-	      'amlogic,sm1-frddr' or</div><div class='del'>-	      'amlogic,sm1-toddr'</div><div class='del'>-- reg: physical base address of the controller and length of memory</div><div class='del'>-       mapped region.</div><div class='del'>-- interrupts: interrupt specifier for the fifo.</div><div class='del'>-- clocks: phandle to the fifo peripheral clock provided by the audio</div><div class='del'>-	  clock controller.</div><div class='del'>-- resets: list of reset phandle, one for each entry reset-names.</div><div class='del'>-- reset-names: should contain the following:</div><div class='del'>-  * "arb" : memory ARB line (required)</div><div class='del'>-  * "rst" : dedicated device reset line (optional)</div><div class='del'>-- #sound-dai-cells: must be 0.</div><div class='del'>-- amlogic,fifo-depth: The size of the controller's fifo in bytes. This</div><div class='del'>-  		      is useful for determining certain configuration such</div><div class='del'>-		      as the flush threshold of the fifo</div><div class='del'>-</div><div class='del'>-Example of FRDDR A on the A113 SoC:</div><div class='del'>-</div><div class='del'>-frddr_a: audio-controller@1c0 {</div><div class='del'>-	compatible = "amlogic,axg-frddr";</div><div class='del'>-	reg = &lt;0x0 0x1c0 0x0 0x1c&gt;;</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 88 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc_audio AUD_CLKID_FRDDR_A&gt;;</div><div class='del'>-	resets = &lt;&amp;arb AXG_ARB_FRDDR_A&gt;;</div><div class='del'>-	fifo-depth = &lt;512&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml<br/>new file mode 100644<br/>index 000000000000..b1b48d683101<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,axg-fifo.yaml</a></div><div class='hunk'>@@ -0,0 +1,112 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/amlogic,axg-fifo.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic AXG Audio FIFO controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - amlogic,axg-toddr</div><div class='add'>+          - amlogic,axg-frddr</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amlogic,g12a-toddr</div><div class='add'>+              - amlogic,sm1-toddr</div><div class='add'>+          - const: amlogic,axg-toddr</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amlogic,g12a-frddr</div><div class='add'>+              - amlogic,sm1-frddr</div><div class='add'>+          - const: amlogic,axg-frddr</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral clock</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  amlogic,fifo-depth:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Size of the controller's fifo in bytes</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+  - amlogic,fifo-depth</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - amlogic,g12a-toddr</div><div class='add'>+              - amlogic,sm1-toddr</div><div class='add'>+              - amlogic,g12a-frddr</div><div class='add'>+              - amlogic,sm1-frddr</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+        reset-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: arb</div><div class='add'>+            - const: rst</div><div class='add'>+      required:</div><div class='add'>+        - reset-names</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reset-names:</div><div class='add'>+          const: arb</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-audio-clkc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/amlogic,meson-axg-audio-arb.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/amlogic,meson-g12a-audio-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    audio-controller@1c0 {</div><div class='add'>+        compatible = "amlogic,g12a-frddr", "amlogic,axg-frddr";</div><div class='add'>+        reg = &lt;0x1c0 0x1c&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_audio AUD_CLKID_FRDDR_A&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 88 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        resets = &lt;&amp;arb&gt;, &lt;&amp;clkc_audio AUD_RESET_FRDDR_A&gt;;</div><div class='add'>+        reset-names = "arb", "rst";</div><div class='add'>+        amlogic,fifo-depth = &lt;512&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt<br/>deleted file mode 100644<br/>index 716878107a24..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-pdm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,29 +0,0 @@</div><div class='del'>-* Amlogic Audio PDM input</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: 'amlogic,axg-pdm' or</div><div class='del'>-	      'amlogic,g12a-pdm' or</div><div class='del'>-	      'amlogic,sm1-pdm'</div><div class='del'>-- reg: physical base address of the controller and length of memory</div><div class='del'>-       mapped region.</div><div class='del'>-- clocks: list of clock phandle, one for each entry clock-names.</div><div class='del'>-- clock-names: should contain the following:</div><div class='del'>-  * "pclk"   : peripheral clock.</div><div class='del'>-  * "dclk"   : pdm digital clock</div><div class='del'>-  * "sysclk" : dsp system clock</div><div class='del'>-- #sound-dai-cells: must be 0.</div><div class='del'>-</div><div class='del'>-Optional property:</div><div class='del'>-- resets: phandle to the dedicated reset line of the pdm input.</div><div class='del'>-</div><div class='del'>-Example of PDM on the A113 SoC:</div><div class='del'>-</div><div class='del'>-pdm: audio-controller@ff632000 {</div><div class='del'>-	compatible = "amlogic,axg-pdm";</div><div class='del'>-	reg = &lt;0x0 0xff632000 0x0 0x34&gt;;</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc_audio AUD_CLKID_PDM&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_PDM_DCLK&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_PDM_SYSCLK&gt;;</div><div class='del'>-	clock-names = "pclk", "dclk", "sysclk";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml<br/>new file mode 100644<br/>index 000000000000..df21dd72fc65<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,axg-pdm.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/amlogic,axg-pdm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Audio AXG PDM input</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amlogic,g12a-pdm</div><div class='add'>+              - amlogic,sm1-pdm</div><div class='add'>+          - const: amlogic,axg-pdm</div><div class='add'>+      - const: amlogic,axg-pdm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral clock</div><div class='add'>+      - description: PDM digital clock</div><div class='add'>+      - description: DSP system clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: dclk</div><div class='add'>+      - const: sysclk</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - amlogic,g12a-pdm</div><div class='add'>+              - amlogic,sm1-pdm</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-audio-clkc.h&gt;</div><div class='add'>+</div><div class='add'>+    audio-controller@ff632000 {</div><div class='add'>+        compatible = "amlogic,axg-pdm";</div><div class='add'>+        reg = &lt;0xff632000 0x34&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_audio AUD_CLKID_PDM&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_PDM_DCLK&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_PDM_SYSCLK&gt;;</div><div class='add'>+        clock-names = "pclk", "dclk", "sysclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt<br/>deleted file mode 100644<br/>index 80b411296480..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,124 +0,0 @@</div><div class='del'>-Amlogic AXG sound card:</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: "amlogic,axg-sound-card"</div><div class='del'>-- model : User specified audio sound card name, one string</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- audio-aux-devs : List of phandles pointing to auxiliary devices</div><div class='del'>-- audio-widgets : Please refer to widgets.txt.</div><div class='del'>-- audio-routing : A list of the connections between audio components.</div><div class='del'>-</div><div class='del'>-Subnodes:</div><div class='del'>-</div><div class='del'>-- dai-link: Container for dai-link level properties and the CODEC</div><div class='del'>-	    sub-nodes. There should be at least one (and probably more)</div><div class='del'>-	    subnode of this type.</div><div class='del'>-</div><div class='del'>-Required dai-link properties:</div><div class='del'>-</div><div class='del'>-- sound-dai: phandle and port of the CPU DAI.</div><div class='del'>-</div><div class='del'>-Required TDM Backend dai-link properties:</div><div class='del'>-- dai-format : CPU/CODEC common audio format</div><div class='del'>-</div><div class='del'>-Optional TDM Backend dai-link properties:</div><div class='del'>-- dai-tdm-slot-rx-mask-{0,1,2,3}: Receive direction slot masks</div><div class='del'>-- dai-tdm-slot-tx-mask-{0,1,2,3}: Transmit direction slot masks</div><div class='del'>-				  When omitted, mask is assumed to have to no</div><div class='del'>-				  slots. A valid must have at one slot, so at</div><div class='del'>-				  least one these mask should be provided with</div><div class='del'>-				  an enabled slot.</div><div class='del'>-- dai-tdm-slot-num : Please refer to tdm-slot.txt.</div><div class='del'>-		     If omitted, slot number is set to accommodate the largest</div><div class='del'>-		     mask provided.</div><div class='del'>-- dai-tdm-slot-width : Please refer to tdm-slot.txt. default to 32 if omitted.</div><div class='del'>-- mclk-fs : Multiplication factor between stream rate and mclk</div><div class='del'>-</div><div class='del'>-Backend dai-link subnodes:</div><div class='del'>-</div><div class='del'>-- codec: dai-link representing backend links should have at least one subnode.</div><div class='del'>-	 One subnode for each codec of the dai-link.</div><div class='del'>-	 dai-link representing frontend links have no codec, therefore have no</div><div class='del'>-	 subnodes</div><div class='del'>-</div><div class='del'>-Required codec subnodes properties:</div><div class='del'>-</div><div class='del'>-- sound-dai: phandle and port of the CODEC DAI.</div><div class='del'>-</div><div class='del'>-Optional codec subnodes properties:</div><div class='del'>-</div><div class='del'>-- dai-tdm-slot-tx-mask : Please refer to tdm-slot.txt.</div><div class='del'>-- dai-tdm-slot-rx-mask : Please refer to tdm-slot.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-sound {</div><div class='del'>-	compatible = "amlogic,axg-sound-card";</div><div class='del'>-	model = "AXG-S420";</div><div class='del'>-	audio-aux-devs = &lt;&amp;tdmin_a&gt;, &lt;&amp;tdmout_c&gt;;</div><div class='del'>-	audio-widgets = "Line", "Lineout",</div><div class='del'>-			"Line", "Linein",</div><div class='del'>-			"Speaker", "Speaker1 Left",</div><div class='del'>-			"Speaker", "Speaker1 Right";</div><div class='del'>-			"Speaker", "Speaker2 Left",</div><div class='del'>-			"Speaker", "Speaker2 Right";</div><div class='del'>-	audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",</div><div class='del'>-			"SPDIFOUT IN 0", "FRDDR_A OUT 3",</div><div class='del'>-			"TDM_C Playback", "TDMOUT_C OUT",</div><div class='del'>-			"TDMIN_A IN 2", "TDM_C Capture",</div><div class='del'>-			"TDMIN_A IN 5", "TDM_C Loopback",</div><div class='del'>-			"TODDR_A IN 0", "TDMIN_A OUT",</div><div class='del'>-			"Lineout", "Lineout AOUTL",</div><div class='del'>-			"Lineout", "Lineout AOUTR",</div><div class='del'>-			"Speaker1 Left", "SPK1 OUT_A",</div><div class='del'>-			"Speaker2 Left", "SPK2 OUT_A",</div><div class='del'>-			"Speaker1 Right", "SPK1 OUT_B",</div><div class='del'>-			"Speaker2 Right", "SPK2 OUT_B",</div><div class='del'>-			"Linein AINL", "Linein",</div><div class='del'>-			"Linein AINR", "Linein";</div><div class='del'>-</div><div class='del'>-	dai-link@0 {</div><div class='del'>-		sound-dai = &lt;&amp;frddr_a&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dai-link@1 {</div><div class='del'>-		sound-dai = &lt;&amp;toddr_a&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dai-link@2 {</div><div class='del'>-		sound-dai = &lt;&amp;tdmif_c&gt;;</div><div class='del'>-		dai-format = "i2s";</div><div class='del'>-		dai-tdm-slot-tx-mask-2 = &lt;1 1&gt;;</div><div class='del'>-		dai-tdm-slot-tx-mask-3 = &lt;1 1&gt;;</div><div class='del'>-		dai-tdm-slot-rx-mask-1 = &lt;1 1&gt;;</div><div class='del'>-		mclk-fs = &lt;256&gt;;</div><div class='del'>-</div><div class='del'>-		codec@0 {</div><div class='del'>-			sound-dai = &lt;&amp;lineout&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		codec@1 {</div><div class='del'>-			sound-dai = &lt;&amp;speaker_amp1&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		codec@2 {</div><div class='del'>-			sound-dai = &lt;&amp;speaker_amp2&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		codec@3 {</div><div class='del'>-			sound-dai = &lt;&amp;linein&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	dai-link@3 {</div><div class='del'>-		sound-dai = &lt;&amp;spdifout&gt;;</div><div class='del'>-</div><div class='del'>-		codec {</div><div class='del'>-			sound-dai = &lt;&amp;spdif_dit&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml<br/>new file mode 100644<br/>index 000000000000..bf1234550343<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,axg-sound-card.yaml</a></div><div class='hunk'>@@ -0,0 +1,183 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/amlogic,axg-sound-card.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic AXG sound card</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amlogic,axg-sound-card</div><div class='add'>+</div><div class='add'>+  audio-aux-devs:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description: list of auxiliary devices</div><div class='add'>+</div><div class='add'>+  audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      pair of strings, the first being the connection's sink, the second</div><div class='add'>+      being the connection's source.</div><div class='add'>+</div><div class='add'>+  audio-widgets:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description:</div><div class='add'>+      A list off component DAPM widget. Each entry is a pair of strings,</div><div class='add'>+      the first being the widget type, the second being the widget name</div><div class='add'>+</div><div class='add'>+  model:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: User specified audio sound card name</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^dai-link-[0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    description:</div><div class='add'>+      Container for dai-link level properties and the CODEC sub-nodes.</div><div class='add'>+      There should be at least one (and probably more) subnode of this type</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      dai-format:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+        enum: [ i2s, left-j, dsp_a ]</div><div class='add'>+</div><div class='add'>+      dai-tdm-slot-num:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          Number of slots in use. If omitted, slot number is set to</div><div class='add'>+          accommodate the largest mask provided.</div><div class='add'>+        maximum: 32</div><div class='add'>+</div><div class='add'>+      dai-tdm-slot-width:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: Width in bits for each slot</div><div class='add'>+        enum: [ 8, 16, 20, 24, 32 ]</div><div class='add'>+        default: 32</div><div class='add'>+</div><div class='add'>+      mclk-fs:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description:</div><div class='add'>+          Multiplication factor between the frame rate and master clock</div><div class='add'>+          rate</div><div class='add'>+</div><div class='add'>+      sound-dai:</div><div class='add'>+        maxItems: 1</div><div class='add'>+        description: phandle of the CPU DAI</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^dai-tdm-slot-(t|r)x-mask-[0-3]$":</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 32</div><div class='add'>+        description:</div><div class='add'>+          Transmit and receive cpu slot masks of each TDM lane</div><div class='add'>+          When omitted, mask is assumed to have to no slots. A valid</div><div class='add'>+          interface must have at least one slot, so at least one these</div><div class='add'>+          mask should be provided with an enabled slot.</div><div class='add'>+</div><div class='add'>+      "^codec(-[0-9]+)?$":</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        description:</div><div class='add'>+          dai-link representing backend links should have at least one subnode.</div><div class='add'>+          One subnode for each codec of the dai-link. dai-link representing</div><div class='add'>+          frontend links have no codec, therefore have no subnodes</div><div class='add'>+</div><div class='add'>+        properties:</div><div class='add'>+          sound-dai:</div><div class='add'>+            maxItems: 1</div><div class='add'>+            description: phandle of the codec DAI</div><div class='add'>+</div><div class='add'>+        patternProperties:</div><div class='add'>+          "^dai-tdm-slot-(t|r)x-mask$":</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 32</div><div class='add'>+            description: Transmit and receive codec slot masks</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - sound-dai</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - sound-dai</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - model</div><div class='add'>+  - dai-link-0</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sound {</div><div class='add'>+        compatible = "amlogic,axg-sound-card";</div><div class='add'>+        model = "AXG-S420";</div><div class='add'>+        audio-aux-devs = &lt;&amp;tdmin_a&gt;, &lt;&amp;tdmout_c&gt;;</div><div class='add'>+        audio-widgets = "Line", "Lineout",</div><div class='add'>+                        "Line", "Linein",</div><div class='add'>+                        "Speaker", "Speaker1 Left",</div><div class='add'>+                        "Speaker", "Speaker1 Right",</div><div class='add'>+                        "Speaker", "Speaker2 Left",</div><div class='add'>+                        "Speaker", "Speaker2 Right";</div><div class='add'>+        audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2",</div><div class='add'>+                        "SPDIFOUT IN 0", "FRDDR_A OUT 3",</div><div class='add'>+                        "TDM_C Playback", "TDMOUT_C OUT",</div><div class='add'>+                        "TDMIN_A IN 2", "TDM_C Capture",</div><div class='add'>+                        "TDMIN_A IN 5", "TDM_C Loopback",</div><div class='add'>+                        "TODDR_A IN 0", "TDMIN_A OUT",</div><div class='add'>+                        "Lineout", "Lineout AOUTL",</div><div class='add'>+                        "Lineout", "Lineout AOUTR",</div><div class='add'>+                        "Speaker1 Left", "SPK1 OUT_A",</div><div class='add'>+                        "Speaker2 Left", "SPK2 OUT_A",</div><div class='add'>+                        "Speaker1 Right", "SPK1 OUT_B",</div><div class='add'>+                        "Speaker2 Right", "SPK2 OUT_B",</div><div class='add'>+                        "Linein AINL", "Linein",</div><div class='add'>+                        "Linein AINR", "Linein";</div><div class='add'>+</div><div class='add'>+        dai-link-0 {</div><div class='add'>+            sound-dai = &lt;&amp;frddr_a&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dai-link-1 {</div><div class='add'>+            sound-dai = &lt;&amp;toddr_a&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dai-link-2 {</div><div class='add'>+            sound-dai = &lt;&amp;tdmif_c&gt;;</div><div class='add'>+            dai-format = "i2s";</div><div class='add'>+            dai-tdm-slot-tx-mask-2 = &lt;1 1&gt;;</div><div class='add'>+            dai-tdm-slot-tx-mask-3 = &lt;1 1&gt;;</div><div class='add'>+            dai-tdm-slot-rx-mask-1 = &lt;1 1&gt;;</div><div class='add'>+            mclk-fs = &lt;256&gt;;</div><div class='add'>+</div><div class='add'>+            codec-0 {</div><div class='add'>+                sound-dai = &lt;&amp;lineout&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            codec-1 {</div><div class='add'>+                sound-dai = &lt;&amp;speaker_amp1&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            codec-2 {</div><div class='add'>+                sound-dai = &lt;&amp;speaker_amp2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            codec-3 {</div><div class='add'>+                sound-dai = &lt;&amp;linein&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dai-link-3 {</div><div class='add'>+            sound-dai = &lt;&amp;spdifout&gt;;</div><div class='add'>+</div><div class='add'>+            codec {</div><div class='add'>+                sound-dai = &lt;&amp;spdif_dit&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt<br/>deleted file mode 100644<br/>index df92a4ecf288..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-* Amlogic Audio SPDIF Input</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: 'amlogic,axg-spdifin' or</div><div class='del'>-	      'amlogic,g12a-spdifin' or</div><div class='del'>-	      'amlogic,sm1-spdifin'</div><div class='del'>-- interrupts: interrupt specifier for the spdif input.</div><div class='del'>-- clocks: list of clock phandle, one for each entry clock-names.</div><div class='del'>-- clock-names: should contain the following:</div><div class='del'>-  * "pclk" : peripheral clock.</div><div class='del'>-  * "refclk" : spdif input reference clock</div><div class='del'>-- #sound-dai-cells: must be 0.</div><div class='del'>-</div><div class='del'>-Optional property:</div><div class='del'>-- resets: phandle to the dedicated reset line of the spdif input.</div><div class='del'>-</div><div class='del'>-Example on the A113 SoC:</div><div class='del'>-</div><div class='del'>-spdifin: audio-controller@400 {</div><div class='del'>-	compatible = "amlogic,axg-spdifin";</div><div class='del'>-	reg = &lt;0x0 0x400 0x0 0x30&gt;;</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 87 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc_audio AUD_CLKID_SPDIFIN&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_SPDIFIN_CLK&gt;;</div><div class='del'>-	clock-names = "pclk", "refclk";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml<br/>new file mode 100644<br/>index 000000000000..a0bd7a5fb9b3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifin.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/amlogic,axg-spdifin.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Audio AXG SPDIF Input</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: amlogic,axg-spdifin</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amlogic,g12a-spdifin</div><div class='add'>+              - amlogic,sm1-spdifin</div><div class='add'>+          - const: amlogic,axg-spdifin</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral clock</div><div class='add'>+      - description: SPDIF input reference clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: refclk</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - amlogic,g12a-spdifin</div><div class='add'>+              - amlogic,sm1-spdifin</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-audio-clkc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    audio-controller@400 {</div><div class='add'>+        compatible = "amlogic,axg-spdifin";</div><div class='add'>+        reg = &lt;0x400 0x30&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 87 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_audio AUD_CLKID_SPDIFIN&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_SPDIFIN_CLK&gt;;</div><div class='add'>+        clock-names = "pclk", "refclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt<br/>deleted file mode 100644<br/>index 28381dd1f633..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-* Amlogic Audio SPDIF Output</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: 'amlogic,axg-spdifout' or</div><div class='del'>-	      'amlogic,g12a-spdifout' or</div><div class='del'>-	      'amlogic,sm1-spdifout'</div><div class='del'>-- clocks: list of clock phandle, one for each entry clock-names.</div><div class='del'>-- clock-names: should contain the following:</div><div class='del'>-  * "pclk" : peripheral clock.</div><div class='del'>-  * "mclk" : master clock</div><div class='del'>-- #sound-dai-cells: must be 0.</div><div class='del'>-</div><div class='del'>-Optional property:</div><div class='del'>-- resets: phandle to the dedicated reset line of the spdif output.</div><div class='del'>-</div><div class='del'>-Example on the A113 SoC:</div><div class='del'>-</div><div class='del'>-spdifout: audio-controller@480 {</div><div class='del'>-	compatible = "amlogic,axg-spdifout";</div><div class='del'>-	reg = &lt;0x0 0x480 0x0 0x50&gt;;</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc_audio AUD_CLKID_SPDIFOUT&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_SPDIFOUT_CLK&gt;;</div><div class='del'>-	clock-names = "pclk", "mclk";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml<br/>new file mode 100644<br/>index 000000000000..15be8dae9398<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,axg-spdifout.yaml</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/amlogic,axg-spdifout.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Audio AXG SPDIF Output</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: amlogic,axg-spdifout</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - amlogic,g12a-spdifout</div><div class='add'>+              - amlogic,sm1-spdifout</div><div class='add'>+          - const: amlogic,axg-spdifout</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral clock</div><div class='add'>+      - description: SPDIF output master clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - amlogic,g12a-spdifout</div><div class='add'>+              - amlogic,sm1-spdifout</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-audio-clkc.h&gt;</div><div class='add'>+</div><div class='add'>+    audio-controller@480 {</div><div class='add'>+        compatible = "amlogic,axg-spdifout";</div><div class='add'>+        reg = &lt;0x480 0x50&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_audio AUD_CLKID_SPDIFOUT&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_SPDIFOUT_CLK&gt;;</div><div class='add'>+        clock-names = "pclk", "mclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt<br/>deleted file mode 100644<br/>index 5996c0cd89c2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-* Amlogic Audio TDM formatters</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: 'amlogic,axg-tdmin' or</div><div class='del'>-	      'amlogic,axg-tdmout' or</div><div class='del'>-	      'amlogic,g12a-tdmin' or</div><div class='del'>-	      'amlogic,g12a-tdmout' or</div><div class='del'>-	      'amlogic,sm1-tdmin' or</div><div class='del'>-	      'amlogic,sm1-tdmout</div><div class='del'>-- reg: physical base address of the controller and length of memory</div><div class='del'>-       mapped region.</div><div class='del'>-- clocks: list of clock phandle, one for each entry clock-names.</div><div class='del'>-- clock-names: should contain the following:</div><div class='del'>-  * "pclk"     : peripheral clock.</div><div class='del'>-  * "sclk"     : bit clock.</div><div class='del'>-  * "sclk_sel" : bit clock input multiplexer.</div><div class='del'>-  * "lrclk"    : sample clock</div><div class='del'>-  * "lrclk_sel": sample clock input multiplexer</div><div class='del'>-</div><div class='del'>-Optional property:</div><div class='del'>-- resets: phandle to the dedicated reset line of the tdm formatter.</div><div class='del'>-</div><div class='del'>-Example of TDMOUT_A on the S905X2 SoC:</div><div class='del'>-</div><div class='del'>-tdmout_a: audio-controller@500 {</div><div class='del'>-	compatible = "amlogic,axg-tdmout";</div><div class='del'>-	reg = &lt;0x0 0x500 0x0 0x40&gt;;</div><div class='del'>-	resets = &lt;&amp;clkc_audio AUD_RESET_TDMOUT_A&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_SCLK&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_LRCLK&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_LRCLK&gt;;</div><div class='del'>-	clock-names = "pclk", "sclk", "sclk_sel",</div><div class='del'>-		      "lrclk", "lrclk_sel";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml<br/>new file mode 100644<br/>index 000000000000..719ca8fc98c7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Audio AXG TDM formatters</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,g12a-tdmout</div><div class='add'>+      - amlogic,sm1-tdmout</div><div class='add'>+      - amlogic,axg-tdmout</div><div class='add'>+      - amlogic,g12a-tdmin</div><div class='add'>+      - amlogic,sm1-tdmin</div><div class='add'>+      - amlogic,axg-tdmin</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral clock</div><div class='add'>+      - description: Bit clock</div><div class='add'>+      - description: Bit clock input multiplexer</div><div class='add'>+      - description: Sample clock</div><div class='add'>+      - description: Sample clock input multiplexer</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: sclk</div><div class='add'>+      - const: sclk_sel</div><div class='add'>+      - const: lrclk</div><div class='add'>+      - const: lrclk_sel</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: component-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - amlogic,g12a-tdmin</div><div class='add'>+              - amlogic,sm1-tdmin</div><div class='add'>+              - amlogic,g12a-tdmout</div><div class='add'>+              - amlogic,sm1-tdmout</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-audio-clkc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/amlogic,meson-g12a-audio-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    audio-controller@500 {</div><div class='add'>+        compatible = "amlogic,g12a-tdmout";</div><div class='add'>+        reg = &lt;0x500 0x40&gt;;</div><div class='add'>+        resets = &lt;&amp;clkc_audio AUD_RESET_TDMOUT_A&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_SCLK&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_LRCLK&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_TDMOUT_A_LRCLK&gt;;</div><div class='add'>+        clock-names = "pclk", "sclk", "sclk_sel",</div><div class='add'>+                      "lrclk", "lrclk_sel";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt<br/>deleted file mode 100644<br/>index cabfb26a5f22..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-* Amlogic Audio TDM Interfaces</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: 'amlogic,axg-tdm-iface'</div><div class='del'>-- clocks: list of clock phandle, one for each entry clock-names.</div><div class='del'>-- clock-names: should contain the following:</div><div class='del'>-  * "sclk" : bit clock.</div><div class='del'>-  * "lrclk": sample clock</div><div class='del'>-  * "mclk" : master clock</div><div class='del'>-	     -&gt; optional if the interface is in clock slave mode.</div><div class='del'>-- #sound-dai-cells: must be 0.</div><div class='del'>-</div><div class='del'>-Example of TDM_A on the A113 SoC:</div><div class='del'>-</div><div class='del'>-tdmif_a: audio-controller@0 {</div><div class='del'>-	compatible = "amlogic,axg-tdm-iface";</div><div class='del'>-	#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	clocks = &lt;&amp;clkc_audio AUD_CLKID_MST_A_MCLK&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_MST_A_SCLK&gt;,</div><div class='del'>-		 &lt;&amp;clkc_audio AUD_CLKID_MST_A_LRCLK&gt;;</div><div class='del'>-	clock-names = "mclk", "sclk", "lrclk";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml<br/>new file mode 100644<br/>index 000000000000..45955d8a26d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,axg-tdm-iface.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-iface.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Audio TDM Interfaces</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amlogic,axg-tdm-iface</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - description: Bit clock</div><div class='add'>+      - description: Sample clock</div><div class='add'>+      - description: Master clock # optional</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: sclk</div><div class='add'>+      - const: lrclk</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/axg-audio-clkc.h&gt;</div><div class='add'>+</div><div class='add'>+    audio-controller {</div><div class='add'>+        compatible = "amlogic,axg-tdm-iface";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_audio AUD_CLKID_MST_A_SCLK&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_MST_A_LRCLK&gt;,</div><div class='add'>+                 &lt;&amp;clkc_audio AUD_CLKID_MST_A_MCLK&gt;;</div><div class='add'>+        clock-names = "sclk", "lrclk", "mclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml b/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml<br/>index 77469a45bb7a..23f82bb89750 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,g12a-toacodec.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml b/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml<br/>index 8b5be4b92f35..b358fd601ed3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,gx-sound-card.yaml</a></div><div class='hunk'>@@ -40,6 +40,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^dai-link-[0-9]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: |-</div><div class='ctx'>       dai-link child nodes:</div><div class='ctx'>         Container for dai-link level properties and the CODEC sub-nodes.</div><div class='hunk'>@@ -61,8 +62,9 @@ patternProperties:</div><div class='ctx'>         description: phandle of the CPU DAI</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      "^codec-[0-9]+$":</div><div class='add'>+      "^codec(-[0-9]+)?$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description: |-</div><div class='ctx'>           Codecs:</div><div class='ctx'>           dai-link representing backend links should have at least one subnode.</div><div class='hunk'>@@ -112,4 +114,3 @@ examples:</div><div class='ctx'>                 };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml b/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml<br/>index 580a3d040abc..5f5cccdbeb34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/amlogic,t9015.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/amlogic,t9015.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/amlogic,t9015.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/apple,mca.yaml b/Documentation/devicetree/bindings/sound/apple,mca.yaml<br/>new file mode 100644<br/>index 000000000000..5c6ec08c7d24<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/apple,mca.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/apple,mca.yaml</a></div><div class='hunk'>@@ -0,0 +1,135 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/apple,mca.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Apple MCA I2S transceiver</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MCA is an I2S transceiver peripheral found on M1 and other Apple chips. It is</div><div class='add'>+  composed of a number of identical clusters which can operate independently</div><div class='add'>+  or in an interlinked fashion. Up to 6 clusters have been seen on an MCA.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Martin Povišer &lt;povik+lin@cutebit.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - apple,t6000-mca</div><div class='add'>+          - apple,t8103-mca</div><div class='add'>+          - apple,t8112-mca</div><div class='add'>+      - const: apple,mca</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: Register region of the MCA clusters proper</div><div class='add'>+      - description: Register region of the DMA glue and its FIFOs</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 6</div><div class='add'>+    description:</div><div class='add'>+      One interrupt per each cluster</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    minItems: 16</div><div class='add'>+    maxItems: 24</div><div class='add'>+    description:</div><div class='add'>+      DMA channels corresponding to the SERDES units in the peripheral. They are</div><div class='add'>+      listed in groups of four per cluster, and within the group they are given</div><div class='add'>+      as associated to the TXA, RXA, TXB, RXB units.</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    minItems: 16</div><div class='add'>+    items:</div><div class='add'>+      - const: tx0a</div><div class='add'>+      - const: rx0a</div><div class='add'>+      - const: tx0b</div><div class='add'>+      - const: rx0b</div><div class='add'>+      - const: tx1a</div><div class='add'>+      - const: rx1a</div><div class='add'>+      - const: tx1b</div><div class='add'>+      - const: rx1b</div><div class='add'>+      - const: tx2a</div><div class='add'>+      - const: rx2a</div><div class='add'>+      - const: tx2b</div><div class='add'>+      - const: rx2b</div><div class='add'>+      - const: tx3a</div><div class='add'>+      - const: rx3a</div><div class='add'>+      - const: tx3b</div><div class='add'>+      - const: rx3b</div><div class='add'>+      - const: tx4a</div><div class='add'>+      - const: rx4a</div><div class='add'>+      - const: tx4b</div><div class='add'>+      - const: rx4b</div><div class='add'>+      - const: tx5a</div><div class='add'>+      - const: rx5a</div><div class='add'>+      - const: tx5b</div><div class='add'>+      - const: rx5b</div><div class='add'>+    description: |</div><div class='add'>+      Names for the DMA channels: 'tx'/'rx', then cluster number, then 'a'/'b'</div><div class='add'>+      based on the associated SERDES unit.</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 6</div><div class='add'>+    description:</div><div class='add'>+      Clusters' input reference clock.</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    minItems: 5</div><div class='add'>+    maxItems: 7</div><div class='add'>+    description:</div><div class='add'>+      First a general power domain for register access, then the power</div><div class='add'>+      domains of individual clusters for their operation.</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    mca: i2s@9b600000 {</div><div class='add'>+      compatible = "apple,t6000-mca", "apple,mca";</div><div class='add'>+      reg = &lt;0x9b600000 0x10000&gt;,</div><div class='add'>+            &lt;0x9b200000 0x20000&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;nco 0&gt;, &lt;&amp;nco 1&gt;, &lt;&amp;nco 2&gt;, &lt;&amp;nco 3&gt;;</div><div class='add'>+      power-domains = &lt;&amp;ps_audio_p&gt;, &lt;&amp;ps_mca0&gt;, &lt;&amp;ps_mca1&gt;,</div><div class='add'>+                      &lt;&amp;ps_mca2&gt;, &lt;&amp;ps_mca3&gt;;</div><div class='add'>+      dmas = &lt;&amp;admac 0&gt;, &lt;&amp;admac 1&gt;, &lt;&amp;admac 2&gt;, &lt;&amp;admac 3&gt;,</div><div class='add'>+             &lt;&amp;admac 4&gt;, &lt;&amp;admac 5&gt;, &lt;&amp;admac 6&gt;, &lt;&amp;admac 7&gt;,</div><div class='add'>+             &lt;&amp;admac 8&gt;, &lt;&amp;admac 9&gt;, &lt;&amp;admac 10&gt;, &lt;&amp;admac 11&gt;,</div><div class='add'>+             &lt;&amp;admac 12&gt;, &lt;&amp;admac 13&gt;, &lt;&amp;admac 14&gt;, &lt;&amp;admac 15&gt;;</div><div class='add'>+      dma-names = "tx0a", "rx0a", "tx0b", "rx0b",</div><div class='add'>+                  "tx1a", "rx1a", "tx1b", "rx1b",</div><div class='add'>+                  "tx2a", "rx2a", "tx2b", "rx2b",</div><div class='add'>+                  "tx3a", "rx3a", "tx3b", "rx3b";</div><div class='add'>+</div><div class='add'>+      #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/arm,pl041.yaml b/Documentation/devicetree/bindings/sound/arm,pl041.yaml<br/>new file mode 100644<br/>index 000000000000..7896b8150cf0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/arm,pl041.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/arm,pl041.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/arm,pl041.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Arm Ltd. PrimeCell PL041 AACI sound interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andre Przywara &lt;andre.przywara@arm.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Arm PrimeCell Advanced Audio CODEC Interface (AACI) is an AMBA compliant</div><div class='add'>+  peripheral that provides communication with an audio CODEC using the AC-link</div><div class='add'>+  protocol.</div><div class='add'>+</div><div class='add'>+# We need a select here so we don't match all nodes with 'arm,primecell'</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        const: arm,pl041</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: arm,pl041</div><div class='add'>+      - const: arm,primecell</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: APB register access clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: apb_pclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    audio-controller@40000 {</div><div class='add'>+        compatible = "arm,pl041", "arm,primecell";</div><div class='add'>+        reg = &lt;0x040000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;11&gt;;</div><div class='add'>+        clocks = &lt;&amp;v2m_clk24mhz&gt;;</div><div class='add'>+        clock-names = "apb_pclk";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml b/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml<br/>new file mode 100644<br/>index 000000000000..4477f84b7acc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/asahi-kasei,ak4458.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/asahi-kasei,ak4458.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: AK4458 audio DAC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - asahi-kasei,ak4458</div><div class='add'>+      - asahi-kasei,ak4497</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: Analog power supply</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: Digital power supply</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mute-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO used to mute all the outputs</div><div class='add'>+</div><div class='add'>+  dsd-path:</div><div class='add'>+    description: Select DSD input pins for ak4497</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: 0</div><div class='add'>+        description: "select #16, #17, #19 pins"</div><div class='add'>+      - const: 1</div><div class='add'>+        description: "select #3, #4, #5 pins"</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: asahi-kasei,ak4458</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        dsd-path: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@10 {</div><div class='add'>+            compatible = "asahi-kasei,ak4458";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            mute-gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml b/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml<br/>new file mode 100644<br/>index 000000000000..d3d494ae8abf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/asahi-kasei,ak5558.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/asahi-kasei,ak5558.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: AK5558 8 channel differential 32-bit delta-sigma ADC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Junichi Wakasugi &lt;wakasugi.jb@om.asahi-kasei.co.jp&gt;</div><div class='add'>+  - Mihai Serban &lt;mihai.serban@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - asahi-kasei,ak5552</div><div class='add'>+      - asahi-kasei,ak5558</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  avdd-supply:</div><div class='add'>+    description: A 1.8V supply that powers up the AVDD pin.</div><div class='add'>+</div><div class='add'>+  dvdd-supply:</div><div class='add'>+    description: A 1.2V supply that powers up the DVDD pin.</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        ak5558: codec@10 {</div><div class='add'>+            compatible = "asahi-kasei,ak5558";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio1 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/atmel,sama5d2-classd.yaml b/Documentation/devicetree/bindings/sound/atmel,sama5d2-classd.yaml<br/>new file mode 100644<br/>index 000000000000..43d04702ac2d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel,sama5d2-classd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/atmel,sama5d2-classd.yaml</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/atmel,sama5d2-classd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel ClassD Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+  - Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Audio Class D Amplifier (CLASSD) is a digital input, Pulse Width</div><div class='add'>+  Modulated (PWM) output stereo Class D amplifier.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: atmel,sama5d2-classd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    const: tx</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: gclk</div><div class='add'>+</div><div class='add'>+  atmel,model:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    default: CLASSD</div><div class='add'>+    description: The user-visible name of this sound complex.</div><div class='add'>+</div><div class='add'>+  atmel,pwm-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - single</div><div class='add'>+      - diff</div><div class='add'>+    default: single</div><div class='add'>+    description: PWM modulation type.</div><div class='add'>+</div><div class='add'>+  atmel,non-overlap-time:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum:</div><div class='add'>+      - 5</div><div class='add'>+      - 10</div><div class='add'>+      - 15</div><div class='add'>+      - 20</div><div class='add'>+    default: 10</div><div class='add'>+    description:</div><div class='add'>+      Set non-overlapping time, the unit is nanosecond(ns).</div><div class='add'>+      Non-overlapping will be disabled if not specified.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    classd: sound@fc048000 {</div><div class='add'>+        compatible = "atmel,sama5d2-classd";</div><div class='add'>+        reg = &lt;0xfc048000 0x100&gt;;</div><div class='add'>+        interrupts = &lt;59 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+        dmas = &lt;&amp;dma0</div><div class='add'>+            (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+            | AT91_XDMAC_DT_PERID(47))&gt;;</div><div class='add'>+        dma-names = "tx";</div><div class='add'>+        clocks = &lt;&amp;classd_clk&gt;, &lt;&amp;classd_gclk&gt;;</div><div class='add'>+        clock-names = "pclk", "gclk";</div><div class='add'>+        assigned-clocks = &lt;&amp;classd_gclk&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_classd_default&gt;;</div><div class='add'>+        atmel,model = "classd @ SAMA5D2-Xplained";</div><div class='add'>+        atmel,pwm-type = "diff";</div><div class='add'>+        atmel,non-overlap-time = &lt;10&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/atmel,sama5d2-i2s.yaml b/Documentation/devicetree/bindings/sound/atmel,sama5d2-i2s.yaml<br/>new file mode 100644<br/>index 000000000000..0cd1ff89baed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel,sama5d2-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/atmel,sama5d2-i2s.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/atmel,sama5d2-i2s.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel I2S controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;</div><div class='add'>+  - Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;</div><div class='add'>+  - Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Atmel I2S (Inter-IC Sound Controller) bus is the standard</div><div class='add'>+  interface for connecting audio devices, such as audio codecs.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: atmel,sama5d2-i2s</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral clock</div><div class='add'>+      - description: Generated clock (Optional)</div><div class='add'>+      - description: I2S mux clock (Optional). Set</div><div class='add'>+          with gclk when Master Mode is required.</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: gclk</div><div class='add'>+      - const: muxclk</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: TX DMA Channel</div><div class='add'>+      - description: RX DMA Channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    i2s@f8050000 {</div><div class='add'>+        compatible = "atmel,sama5d2-i2s";</div><div class='add'>+        reg = &lt;0xf8050000 0x300&gt;;</div><div class='add'>+        interrupts = &lt;54 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+        dmas = &lt;&amp;dma0</div><div class='add'>+                (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+                AT91_XDMAC_DT_PERID(31))&gt;,</div><div class='add'>+               &lt;&amp;dma0</div><div class='add'>+                (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='add'>+                AT91_XDMAC_DT_PERID(32))&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        clocks = &lt;&amp;i2s0_clk&gt;, &lt;&amp;i2s0_gclk&gt;, &lt;&amp;i2s0muxck&gt;;</div><div class='add'>+        clock-names = "pclk", "gclk", "muxclk";</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_i2s0_default&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/atmel,sama5d2-pdmic.yaml b/Documentation/devicetree/bindings/sound/atmel,sama5d2-pdmic.yaml<br/>new file mode 100644<br/>index 000000000000..f320b561f24c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel,sama5d2-pdmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/atmel,sama5d2-pdmic.yaml</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/atmel,sama5d2-pdmic.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel PDMIC decoder</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Atmel Pulse Density Modulation Interface Controller</div><div class='add'>+  (PDMIC) peripheral is a mono PDM decoder module</div><div class='add'>+  that decodes an incoming PDM sample stream.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: atmel,sama5d2-pdmic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: peripheral clock</div><div class='add'>+      - description: generated clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: gclk</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    const: rx</div><div class='add'>+</div><div class='add'>+  atmel,mic-min-freq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The minimal frequency that the microphone supports.</div><div class='add'>+</div><div class='add'>+  atmel,mic-max-freq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      The maximal frequency that the microphone supports.</div><div class='add'>+</div><div class='add'>+  atmel,model:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    default: PDMIC</div><div class='add'>+    description: The user-visible name of this sound card.</div><div class='add'>+</div><div class='add'>+  atmel,mic-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/int32</div><div class='add'>+    default: 0</div><div class='add'>+    description: The offset that should be added.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+  - atmel,mic-min-freq</div><div class='add'>+  - atmel,mic-max-freq</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/dma/at91.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pdmic: sound@f8018000 {</div><div class='add'>+        compatible = "atmel,sama5d2-pdmic";</div><div class='add'>+        reg = &lt;0xf8018000 0x124&gt;;</div><div class='add'>+        interrupts = &lt;48 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+        dmas = &lt;&amp;dma0</div><div class='add'>+                (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='add'>+                | AT91_XDMAC_DT_PERID(50))&gt;;</div><div class='add'>+        dma-names = "rx";</div><div class='add'>+        clocks = &lt;&amp;pdmic_clk&gt;, &lt;&amp;pdmic_gclk&gt;;</div><div class='add'>+        clock-names = "pclk", "gclk";</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_pdmic_default&gt;;</div><div class='add'>+        atmel,model = "PDMIC@sama5d2_xplained";</div><div class='add'>+        atmel,mic-min-freq = &lt;1000000&gt;;</div><div class='add'>+        atmel,mic-max-freq = &lt;3246000&gt;;</div><div class='add'>+        atmel,mic-offset = &lt;0x0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/atmel-classd.txt b/Documentation/devicetree/bindings/sound/atmel-classd.txt<br/>deleted file mode 100644<br/>index 898551076382..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel-classd.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel-classd.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,55 +0,0 @@</div><div class='del'>-* Atmel ClassD driver under ALSA SoC architecture</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible</div><div class='del'>-	Should be "atmel,sama5d2-classd".</div><div class='del'>-- reg</div><div class='del'>-	Should contain ClassD registers location and length.</div><div class='del'>-- interrupts</div><div class='del'>-	Should contain the IRQ line for the ClassD.</div><div class='del'>-- dmas</div><div class='del'>-	One DMA specifiers as described in atmel-dma.txt and dma.txt files.</div><div class='del'>-- dma-names</div><div class='del'>-	Must be "tx".</div><div class='del'>-- clock-names</div><div class='del'>-	Tuple listing input clock names.</div><div class='del'>-	Required elements: "pclk" and "gclk".</div><div class='del'>-- clocks</div><div class='del'>-	Please refer to clock-bindings.txt.</div><div class='del'>-- assigned-clocks</div><div class='del'>-	Should be &lt;&amp;classd_gclk&gt;.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- pinctrl-names, pinctrl-0</div><div class='del'>-	Please refer to pinctrl-bindings.txt.</div><div class='del'>-- atmel,model</div><div class='del'>-	The user-visible name of this sound complex.</div><div class='del'>-	The default value is "CLASSD".</div><div class='del'>-- atmel,pwm-type</div><div class='del'>-	PWM modulation type, "single" or "diff".</div><div class='del'>-	The default value is "single".</div><div class='del'>-- atmel,non-overlap-time</div><div class='del'>-	Set non-overlapping time, the unit is nanosecond(ns).</div><div class='del'>-	There are four values,</div><div class='del'>-	&lt;5&gt;, &lt;10&gt;, &lt;15&gt;, &lt;20&gt;, the default value is &lt;10&gt;.</div><div class='del'>-	Non-overlapping will be disabled if not specified.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-classd: classd@fc048000 {</div><div class='del'>-		compatible = "atmel,sama5d2-classd";</div><div class='del'>-		reg = &lt;0xfc048000 0x100&gt;;</div><div class='del'>-		interrupts = &lt;59 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='del'>-		dmas = &lt;&amp;dma0</div><div class='del'>-			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='del'>-			| AT91_XDMAC_DT_PERID(47))&gt;;</div><div class='del'>-		dma-names = "tx";</div><div class='del'>-		clocks = &lt;&amp;classd_clk&gt;, &lt;&amp;classd_gclk&gt;;</div><div class='del'>-		clock-names = "pclk", "gclk";</div><div class='del'>-		assigned-clocks = &lt;&amp;classd_gclk&gt;;</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_classd_default&gt;;</div><div class='del'>-		atmel,model = "classd @ SAMA5D2-Xplained";</div><div class='del'>-		atmel,pwm-type = "diff";</div><div class='del'>-		atmel,non-overlap-time = &lt;10&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/atmel-i2s.txt b/Documentation/devicetree/bindings/sound/atmel-i2s.txt<br/>deleted file mode 100644<br/>index 40549f496a81..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel-i2s.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel-i2s.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,46 +0,0 @@</div><div class='del'>-* Atmel I2S controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:     Should be "atmel,sama5d2-i2s".</div><div class='del'>-- reg:            Should be the physical base address of the controller and the</div><div class='del'>-                  length of memory mapped region.</div><div class='del'>-- interrupts:     Should contain the interrupt for the controller.</div><div class='del'>-- dmas:           Should be one per channel name listed in the dma-names property,</div><div class='del'>-                  as described in atmel-dma.txt and dma.txt files.</div><div class='del'>-- dma-names:      Two dmas have to be defined, "tx" and "rx".</div><div class='del'>-                  This IP also supports one shared channel for both rx and tx;</div><div class='del'>-                  if this mode is used, one "rx-tx" name must be used.</div><div class='del'>-- clocks:         Must contain an entry for each entry in clock-names.</div><div class='del'>-                  Please refer to clock-bindings.txt.</div><div class='del'>-- clock-names:    Should be one of each entry matching the clocks phandles list:</div><div class='del'>-                  - "pclk" (peripheral clock) Required.</div><div class='del'>-                  - "gclk" (generated clock) Optional (1).</div><div class='del'>-                  - "muxclk" (I2S mux clock) Optional (1).</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- pinctrl-0:      Should specify pin control groups used for this controller.</div><div class='del'>-- princtrl-names: Should contain only one value - "default".</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-(1) : Only the peripheral clock is required. The generated clock and the I2S</div><div class='del'>-      mux clock are optional and should only be set together, when Master Mode</div><div class='del'>-      is required.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	i2s@f8050000 {</div><div class='del'>-		compatible = "atmel,sama5d2-i2s";</div><div class='del'>-		reg = &lt;0xf8050000 0x300&gt;;</div><div class='del'>-		interrupts = &lt;54 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='del'>-		dmas = &lt;&amp;dma0</div><div class='del'>-			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='del'>-			 AT91_XDMAC_DT_PERID(31))&gt;,</div><div class='del'>-		       &lt;&amp;dma0</div><div class='del'>-			(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |</div><div class='del'>-			 AT91_XDMAC_DT_PERID(32))&gt;;</div><div class='del'>-		dma-names = "tx", "rx";</div><div class='del'>-		clocks = &lt;&amp;i2s0_clk&gt;, &lt;&amp;i2s0_gclk&gt;, &lt;&amp;i2s0muxck&gt;;</div><div class='del'>-		clock-names = "pclk", "gclk", "muxclk";</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_i2s0_default&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/atmel-pdmic.txt b/Documentation/devicetree/bindings/sound/atmel-pdmic.txt<br/>deleted file mode 100644<br/>index e0875f17c229..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel-pdmic.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel-pdmic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,55 +0,0 @@</div><div class='del'>-* Atmel PDMIC driver under ALSA SoC architecture</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible</div><div class='del'>-	Should be "atmel,sama5d2-pdmic".</div><div class='del'>-- reg</div><div class='del'>-	Should contain PDMIC registers location and length.</div><div class='del'>-- interrupts</div><div class='del'>-	Should contain the IRQ line for the PDMIC.</div><div class='del'>-- dmas</div><div class='del'>-	One DMA specifiers as described in atmel-dma.txt and dma.txt files.</div><div class='del'>-- dma-names</div><div class='del'>-	Must be "rx".</div><div class='del'>-- clock-names</div><div class='del'>-	Required elements:</div><div class='del'>-	- "pclk"	peripheral clock</div><div class='del'>-	- "gclk"	generated clock</div><div class='del'>-- clocks</div><div class='del'>-	Must contain an entry for each required entry in clock-names.</div><div class='del'>-	Please refer to clock-bindings.txt.</div><div class='del'>-- atmel,mic-min-freq</div><div class='del'>-	The minimal frequency that the micphone supports.</div><div class='del'>-- atmel,mic-max-freq</div><div class='del'>-	The maximal frequency that the micphone supports.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- pinctrl-names, pinctrl-0</div><div class='del'>-	Please refer to pinctrl-bindings.txt.</div><div class='del'>-- atmel,model</div><div class='del'>-	The user-visible name of this sound card.</div><div class='del'>-	The default value is "PDMIC".</div><div class='del'>-- atmel,mic-offset</div><div class='del'>-	The offset that should be added.</div><div class='del'>-	The range is from -32768 to 32767.</div><div class='del'>-	The default value is 0.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	pdmic@f8018000 {</div><div class='del'>-				compatible = "atmel,sama5d2-pdmic";</div><div class='del'>-				reg = &lt;0xf8018000 0x124&gt;;</div><div class='del'>-				interrupts = &lt;48 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='del'>-				dmas = &lt;&amp;dma0</div><div class='del'>-					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)</div><div class='del'>-					| AT91_XDMAC_DT_PERID(50))&gt;;</div><div class='del'>-				dma-names = "rx";</div><div class='del'>-				clocks = &lt;&amp;pdmic_clk&gt;, &lt;&amp;pdmic_gclk&gt;;</div><div class='del'>-				clock-names = "pclk", "gclk";</div><div class='del'>-</div><div class='del'>-				pinctrl-names = "default";</div><div class='del'>-				pinctrl-0 = &lt;&amp;pinctrl_pdmic_default&gt;;</div><div class='del'>-				atmel,model = "PDMIC @ sama5d2_xplained";</div><div class='del'>-				atmel,mic-min-freq = &lt;1000000&gt;;</div><div class='del'>-				atmel,mic-max-freq = &lt;3246000&gt;;</div><div class='del'>-				atmel,mic-offset = &lt;0x0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt b/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt<br/>index 0720857089a7..8facbce53db8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/atmel-sam9x5-wm8731-audio.txt</a></div><div class='hunk'>@@ -16,7 +16,7 @@ Board connectors:</div><div class='ctx'>  * Line In Jack</div><div class='ctx'> </div><div class='ctx'> wm8731 pins:</div><div class='del'>-cf Documentation/devicetree/bindings/sound/wm8731.txt</div><div class='add'>+cf Documentation/devicetree/bindings/sound/wlf,wm8731.yaml</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> sound {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/audio-graph-card.yaml b/Documentation/devicetree/bindings/sound/audio-graph-card.yaml<br/>index 109e55f9e597..274092ef36c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph-card.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph-card.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph-card.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/audio-graph-card.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/audio-graph-card.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Audio Graph Card Device Tree Bindings</div><div class='add'>+title: Audio Graph Card</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml b/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml<br/>index f7e94b1e0e4b..3de7b36829da 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph-card2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph-card2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/audio-graph-card2.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/audio-graph-card2.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Audio Graph Card2 Device Tree Bindings</div><div class='add'>+title: Audio Graph Card2</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='hunk'>@@ -24,10 +24,13 @@ properties:</div><div class='ctx'>       connection's sink, the second being the connection's source.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='ctx'>   multi:</div><div class='add'>+    type: object</div><div class='ctx'>     description: Multi-CPU/Codec node</div><div class='ctx'>   dpcm:</div><div class='add'>+    type: object</div><div class='ctx'>     description: DPCM node</div><div class='ctx'>   codec2codec:</div><div class='add'>+    type: object</div><div class='ctx'>     description: Codec to Codec node</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/audio-graph-port.yaml b/Documentation/devicetree/bindings/sound/audio-graph-port.yaml<br/>index 5c368674d11a..fa9f9a853365 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph-port.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph-port.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph-port.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/audio-graph-port.yaml</a></div><div class='hunk'>@@ -4,36 +4,31 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Audio Graph Card 'port' Node Bindings</div><div class='add'>+title: Audio Graph Card 'port'</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='ctx'> </div><div class='ctx'> select: false</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+definitions:</div><div class='add'>+  port-base:</div><div class='add'>+    $ref: /schemas/graph.yaml#/$defs/port-base</div><div class='add'>+    properties:</div><div class='add'>+      convert-rate:</div><div class='add'>+        $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate</div><div class='add'>+      convert-channels:</div><div class='add'>+        $ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels</div><div class='add'>+      convert-sample-format:</div><div class='add'>+        $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format</div><div class='add'>+      mclk-fs:</div><div class='add'>+        $ref: simple-card.yaml#/definitions/mclk-fs</div><div class='ctx'> </div><div class='del'>-properties:</div><div class='del'>-  prefix:</div><div class='del'>-    description: "device name prefix"</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/string</div><div class='del'>-  convert-rate:</div><div class='del'>-    description: CPU to Codec rate convert.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-  convert-channels:</div><div class='del'>-    description: CPU to Codec rate channels.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-patternProperties:</div><div class='del'>-  "^endpoint(@[0-9a-f]+)?":</div><div class='add'>+  endpoint-base:</div><div class='ctx'>     $ref: /schemas/graph.yaml#/$defs/endpoint-base</div><div class='ctx'>     properties:</div><div class='ctx'>       mclk-fs:</div><div class='del'>-        description: |</div><div class='del'>-          Multiplication factor between stream rate and codec mclk.</div><div class='del'>-          When defined, mclk-fs property defined in dai-link sub nodes are</div><div class='del'>-          ignored.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        $ref: simple-card.yaml#/definitions/mclk-fs</div><div class='ctx'>       frame-inversion:</div><div class='ctx'>         description: dai-link uses frame clock inversion</div><div class='ctx'>         $ref: /schemas/types.yaml#/definitions/flag</div><div class='hunk'>@@ -50,6 +45,15 @@ patternProperties:</div><div class='ctx'>         oneOf:</div><div class='ctx'>           - $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>           - $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+      clocks:</div><div class='add'>+        description: Indicates system clock</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+      system-clock-frequency:</div><div class='add'>+        $ref: simple-card.yaml#/definitions/system-clock-frequency</div><div class='add'>+      system-clock-direction-out:</div><div class='add'>+        $ref: simple-card.yaml#/definitions/system-clock-direction-out</div><div class='add'>+      system-clock-fixed:</div><div class='add'>+        $ref: simple-card.yaml#/definitions/system-clock-fixed</div><div class='ctx'> </div><div class='ctx'>       dai-format:</div><div class='ctx'>         description: audio format.</div><div class='hunk'>@@ -65,12 +69,18 @@ patternProperties:</div><div class='ctx'>             - msb</div><div class='ctx'>             - lsb</div><div class='ctx'>       convert-rate:</div><div class='del'>-        description: CPU to Codec rate convert.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate</div><div class='ctx'>       convert-channels:</div><div class='del'>-        description: CPU to Codec rate channels.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        $ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels</div><div class='add'>+      convert-sample-format:</div><div class='add'>+        $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format</div><div class='ctx'> </div><div class='add'>+      dai-tdm-slot-num:</div><div class='add'>+        description: Number of slots in use.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+      dai-tdm-slot-width:</div><div class='add'>+        description: Width in bits for each slot.</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>       dai-tdm-slot-width-map:</div><div class='ctx'>         description: Mapping of sample widths to slot widths. For hardware</div><div class='ctx'>           that cannot support a fixed slot width or a slot width always</div><div class='hunk'>@@ -91,4 +101,24 @@ patternProperties:</div><div class='ctx'>               minimum: 1</div><div class='ctx'>               maximum: 64</div><div class='ctx'> </div><div class='add'>+  ports:</div><div class='add'>+    $ref: "#/definitions/port-base"</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^port(@[0-9a-f]+)?$":</div><div class='add'>+        $ref: "#/definitions/port-base"</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        patternProperties:</div><div class='add'>+          "^endpoint(@[0-9a-f]+)?":</div><div class='add'>+            $ref: "#/definitions/endpoint-base"</div><div class='add'>+            unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: "#/definitions/port-base"</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^endpoint(@[0-9a-f]+)?":</div><div class='add'>+    $ref: "#/definitions/endpoint-base"</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/audio-graph.yaml b/Documentation/devicetree/bindings/sound/audio-graph.yaml<br/>index 4b46794e5153..c87eb91de159 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/audio-graph.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/audio-graph.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/audio-graph.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/audio-graph.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Audio Graph Device Tree Bindings</div><div class='add'>+title: Audio Graph</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='hunk'>@@ -15,7 +15,7 @@ properties:</div><div class='ctx'>   label:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>   prefix:</div><div class='del'>-    description: "device name prefix"</div><div class='add'>+    description: device name prefix</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>   routing:</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -27,11 +27,12 @@ properties:</div><div class='ctx'>     description: User specified audio sound widgets.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='ctx'>   convert-rate:</div><div class='del'>-    description: CPU to Codec rate convert.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-rate</div><div class='ctx'>   convert-channels:</div><div class='del'>-    description: CPU to Codec rate channels.</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    $ref: /schemas/sound/dai-params.yaml#/$defs/dai-channels</div><div class='add'>+  convert-sample-format:</div><div class='add'>+    $ref: /schemas/sound/dai-params.yaml#/$defs/dai-sample-format</div><div class='add'>+</div><div class='ctx'>   pa-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>   hp-det-gpio:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/awinic,aw8738.yaml b/Documentation/devicetree/bindings/sound/awinic,aw8738.yaml<br/>index dce86dafe382..bc6c6b172238 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/awinic,aw8738.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/awinic,aw8738.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/awinic,aw8738.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/awinic,aw8738.yaml</a></div><div class='hunk'>@@ -15,7 +15,7 @@ description:</div><div class='ctx'>   function (primarily the power limit for the amplifier).</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml b/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml<br/>new file mode 100644<br/>index 000000000000..35eef7d818a2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/awinic,aw88395.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/awinic,aw88395.yaml</a></div><div class='hunk'>@@ -0,0 +1,53 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/awinic,aw88395.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Awinic AW88395 Smart Audio Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Weidong Wang &lt;wangweidong.a@awinic.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Awinic AW88395 is an I2S/TDM input, high efficiency</div><div class='add'>+  digital Smart K audio amplifier with an integrated 10.25V</div><div class='add'>+  smart boost convert.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: awinic,aw88395</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+  - reset-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        audio-codec@34 {</div><div class='add'>+            compatible = "awinic,aw88395";</div><div class='add'>+            reg = &lt;0x34&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml<br/>index 3235702ce402..14dea1feefc5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/cirrus,cs35l41.yaml</a></div><div class='hunk'>@@ -22,6 +22,9 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     description:</div><div class='ctx'>       The first cell indicating the audio interface.</div><div class='hunk'>@@ -42,7 +45,7 @@ properties:</div><div class='ctx'>       Configures the peak current by monitoring the current through the boost FET.</div><div class='ctx'>       Range starts at 1600 mA and goes to a maximum of 4500 mA with increments</div><div class='ctx'>       of 50 mA. See section 4.3.6 of the datasheet for details.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 1600</div><div class='ctx'>     maximum: 4500</div><div class='ctx'>     default: 4500</div><div class='hunk'>@@ -51,7 +54,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Boost inductor value, expressed in nH. Valid</div><div class='ctx'>       values include 1000, 1200, 1500 and 2200.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 1000</div><div class='ctx'>     maximum: 2200</div><div class='ctx'> </div><div class='hunk'>@@ -60,7 +63,7 @@ properties:</div><div class='ctx'>       Total equivalent boost capacitance on the VBST</div><div class='ctx'>       and VAMP pins, derated at 11 volts DC. The value must be rounded to the</div><div class='ctx'>       nearest integer and expressed in uF.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   cirrus,asp-sdout-hiz:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -70,11 +73,32 @@ properties:</div><div class='ctx'>       1 = Hi-Z during unused slots but logic 0 while all transmit channels disabled</div><div class='ctx'>       2 = (Default) Logic 0 during unused slots, but Hi-Z while all transmit channels disabled</div><div class='ctx'>       3 = Hi-Z during unused slots and while all transmit channels disabled</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 3</div><div class='ctx'>     default: 2</div><div class='ctx'> </div><div class='add'>+  cirrus,boost-type:</div><div class='add'>+    description:</div><div class='add'>+      Configures the type of Boost being used.</div><div class='add'>+      Internal boost requires boost-peak-milliamp, boost-ind-nanohenry and</div><div class='add'>+      boost-cap-microfarad.</div><div class='add'>+      External Boost must have GPIO1 as GPIO output. GPIO1 will be set high to</div><div class='add'>+      enable boost voltage.</div><div class='add'>+      Shared boost allows two amplifiers to share a single boost circuit by</div><div class='add'>+      communicating on the MDSYNC bus. The active amplifier controls the boost</div><div class='add'>+      circuit using combined data from both amplifiers. GPIO1 should be</div><div class='add'>+      configured for Sync when shared boost is used. Shared boost is not</div><div class='add'>+      compatible with External boost. Active amplifier requires</div><div class='add'>+      boost-peak-milliamp, boost-ind-nanohenry and boost-cap-microfarad.</div><div class='add'>+      0 = Internal Boost</div><div class='add'>+      1 = External Boost</div><div class='add'>+      2 = Shared Boost Active</div><div class='add'>+      3 = Shared Boost Passive</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+</div><div class='ctx'>   cirrus,gpio1-polarity-invert:</div><div class='ctx'>     description:</div><div class='ctx'>       Boolean which specifies whether the GPIO1</div><div class='hunk'>@@ -96,7 +120,7 @@ properties:</div><div class='ctx'>       1 = GPIO</div><div class='ctx'>       2 = Sync</div><div class='ctx'>       3 = MCLK input</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 3</div><div class='ctx'> </div><div class='hunk'>@@ -123,7 +147,7 @@ properties:</div><div class='ctx'>       3 = MCLK input</div><div class='ctx'>       4 = Push-pull INTB (active low)</div><div class='ctx'>       5 = Push-pull INT (active high)</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 5</div><div class='ctx'> </div><div class='hunk'>@@ -131,27 +155,55 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='del'>-  - cirrus,boost-peak-milliamp</div><div class='del'>-  - cirrus,boost-ind-nanohenry</div><div class='del'>-  - cirrus,boost-cap-microfarad</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        cirrus,boost-type:</div><div class='add'>+          const: 0</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - cirrus,boost-peak-milliamp</div><div class='add'>+        - cirrus,boost-ind-nanohenry</div><div class='add'>+        - cirrus,boost-cap-microfarad</div><div class='add'>+    else:</div><div class='add'>+      if:</div><div class='add'>+        properties:</div><div class='add'>+          cirrus,boost-type:</div><div class='add'>+            const: 1</div><div class='add'>+      then:</div><div class='add'>+        required:</div><div class='add'>+          - cirrus,gpio1-output-enable</div><div class='add'>+          - cirrus,gpio1-src-select</div><div class='add'>+        properties:</div><div class='add'>+          cirrus,boost-peak-milliamp: false</div><div class='add'>+          cirrus,boost-ind-nanohenry: false</div><div class='add'>+          cirrus,boost-cap-microfarad: false</div><div class='add'>+          cirrus,gpio1-src-select:</div><div class='add'>+            enum: [1]</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='ctx'>     spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='del'>-        cs35l41: cs35l41@2 {</div><div class='del'>-          #sound-dai-cells = &lt;1&gt;;</div><div class='del'>-          compatible = "cirrus,cs35l41";</div><div class='del'>-          reg = &lt;2&gt;;</div><div class='del'>-          VA-supply = &lt;&amp;dummy_vreg&gt;;</div><div class='del'>-          VP-supply = &lt;&amp;dummy_vreg&gt;;</div><div class='del'>-          reset-gpios = &lt;&amp;gpio 110 0&gt;;</div><div class='del'>-          cirrus,boost-peak-milliamp = &lt;4500&gt;;</div><div class='del'>-          cirrus,boost-ind-nanohenry = &lt;1000&gt;;</div><div class='del'>-          cirrus,boost-cap-microfarad = &lt;15&gt;;</div><div class='add'>+        cs35l41: speaker-amp@2 {</div><div class='add'>+            #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+            compatible = "cirrus,cs35l41";</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            VA-supply = &lt;&amp;dummy_vreg&gt;;</div><div class='add'>+            VP-supply = &lt;&amp;dummy_vreg&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 110 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+            cirrus,boost-type = &lt;0&gt;;</div><div class='add'>+            cirrus,boost-peak-milliamp = &lt;4500&gt;;</div><div class='add'>+            cirrus,boost-ind-nanohenry = &lt;1000&gt;;</div><div class='add'>+            cirrus,boost-cap-microfarad = &lt;15&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml<br/>new file mode 100644<br/>index 000000000000..2ab74f995685<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/cirrus,cs35l45.yaml</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/cirrus,cs35l45.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cirrus Logic CS35L45 Speaker Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ricardo Rivera-Matos &lt;rriveram@opensource.cirrus.com&gt;</div><div class='add'>+  - Richard Fitzgerald &lt;rf@opensource.cirrus.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  CS35L45 is a Boosted Mono Class D Amplifier with DSP</div><div class='add'>+  Speaker Protection and Adaptive Battery Management.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - cirrus,cs35l45</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-a-supply:</div><div class='add'>+    description: voltage regulator phandle for the VDD_A supply</div><div class='add'>+</div><div class='add'>+  vdd-batt-supply:</div><div class='add'>+    description: voltage regulator phandle for the VDD_BATT supply</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 5000000</div><div class='add'>+</div><div class='add'>+  cirrus,asp-sdout-hiz-ctrl:</div><div class='add'>+    description:</div><div class='add'>+      Audio serial port SDOUT Hi-Z control. Sets the Hi-Z</div><div class='add'>+      configuration for SDOUT pin of amplifier. Logical OR of</div><div class='add'>+      CS35L45_ASP_TX_HIZ_xxx values.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 3</div><div class='add'>+    default: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^cirrus,gpio-ctrl[1-3]$":</div><div class='add'>+    description:</div><div class='add'>+      GPIO pins configuration.</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      gpio-dir:</div><div class='add'>+        description:</div><div class='add'>+          GPIO pin direction. Valid only when 'gpio-ctrl' is 1</div><div class='add'>+            0 = Output</div><div class='add'>+            1 = Input</div><div class='add'>+        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 1</div><div class='add'>+      gpio-lvl:</div><div class='add'>+        description:</div><div class='add'>+          GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0</div><div class='add'>+            0 = Low</div><div class='add'>+            1 = High</div><div class='add'>+        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+      gpio-op-cfg:</div><div class='add'>+        description:</div><div class='add'>+          GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0</div><div class='add'>+            0 = CMOS</div><div class='add'>+            1 = Open Drain</div><div class='add'>+        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+      gpio-pol:</div><div class='add'>+        description:</div><div class='add'>+          GPIO output polarity select. Valid only when 'gpio-ctrl' is 1</div><div class='add'>+          and 'gpio-dir' is 0</div><div class='add'>+            0 = Non-inverted, Active High</div><div class='add'>+            1 = Inverted, Active Low</div><div class='add'>+        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 1</div><div class='add'>+        default: 0</div><div class='add'>+      gpio-ctrl:</div><div class='add'>+        description:</div><div class='add'>+          Defines the function of the GPIO pin.</div><div class='add'>+          GPIO1</div><div class='add'>+            0 = High impedance input</div><div class='add'>+            1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'</div><div class='add'>+            2 = Pin acts as MDSYNC, direction controlled by MDSYNC</div><div class='add'>+            3-7 = Reserved</div><div class='add'>+          GPIO2</div><div class='add'>+            0 = High impedance input</div><div class='add'>+            1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'</div><div class='add'>+            2 = Pin acts as open drain INT</div><div class='add'>+            3 = Reserved</div><div class='add'>+            4 = Pin acts as push-pull output INT. Active low.</div><div class='add'>+            5 = Pin acts as push-pull output INT. Active high.</div><div class='add'>+            6,7 = Reserved</div><div class='add'>+          GPIO3</div><div class='add'>+            0 = High impedance input</div><div class='add'>+            1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'</div><div class='add'>+            2-7 = Reserved</div><div class='add'>+        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 7</div><div class='add'>+        default: 0</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/sound/cs35l45.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        cs35l45: cs35l45@2 {</div><div class='add'>+          #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+          compatible = "cirrus,cs35l45";</div><div class='add'>+          reg = &lt;2&gt;;</div><div class='add'>+          spi-max-frequency = &lt;5000000&gt;;</div><div class='add'>+          vdd-a-supply = &lt;&amp;dummy_vreg&gt;;</div><div class='add'>+          vdd-batt-supply = &lt;&amp;dummy_vreg&gt;;</div><div class='add'>+          reset-gpios = &lt;&amp;gpio 110 0&gt;;</div><div class='add'>+          cirrus,asp-sdout-hiz-ctrl = &lt;(CS35L45_ASP_TX_HIZ_UNUSED |</div><div class='add'>+                                        CS35L45_ASP_TX_HIZ_DISABLED)&gt;;</div><div class='add'>+          cirrus,gpio-ctrl1 {</div><div class='add'>+             gpio-ctrl = &lt;0x2&gt;;</div><div class='add'>+          };</div><div class='add'>+          cirrus,gpio-ctrl2 {</div><div class='add'>+             gpio-ctrl = &lt;0x2&gt;;</div><div class='add'>+          };</div><div class='add'>+          cirrus,gpio-ctrl3 {</div><div class='add'>+             gpio-ctrl = &lt;0x1&gt;;</div><div class='add'>+             gpio-dir = &lt;0x1&gt;;</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml<br/>index 31800f70e9d9..af599d8735e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/cirrus,cs42l42.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - cirrus,cs42l42</div><div class='add'>+      - cirrus,cs42l83</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -67,7 +68,7 @@ properties:</div><div class='ctx'>       This is "normal tip sense (TS)" in the datasheet.</div><div class='ctx'> </div><div class='ctx'>       The CS42L42_TS_INV_* defines are available for this.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 1</div><div class='ctx'> </div><div class='hunk'>@@ -86,7 +87,7 @@ properties:</div><div class='ctx'>       7 - 1.5s</div><div class='ctx'> </div><div class='ctx'>       The CS42L42_TS_DBNCE_* defines are available for this.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 7</div><div class='ctx'> </div><div class='hunk'>@@ -105,7 +106,7 @@ properties:</div><div class='ctx'>       7 - 1.5s</div><div class='ctx'> </div><div class='ctx'>       The CS42L42_TS_DBNCE_* defines are available for this.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 7</div><div class='ctx'> </div><div class='hunk'>@@ -119,7 +120,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       0ms - 200ms,</div><div class='ctx'>       Default = 100ms</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 200</div><div class='ctx'> </div><div class='hunk'>@@ -132,7 +133,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       0ms - 20ms,</div><div class='ctx'>       Default = 10ms</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 20</div><div class='ctx'> </div><div class='hunk'>@@ -168,7 +169,7 @@ properties:</div><div class='ctx'>       3 - Slowest</div><div class='ctx'> </div><div class='ctx'>       The CS42L42_HSBIAS_RAMP_* defines are available for this.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     minimum: 0</div><div class='ctx'>     maximum: 3</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml b/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml<br/>index 963a871e74da..670b67ec0b61 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/cirrus,cs42l51.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/cirrus,cs42l51.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: CS42L51 audio codec DT bindings</div><div class='add'>+title: CS42L51 audio codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Olivier Moysan &lt;olivier.moysan@foss.st.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: cirrus,cs42l51</div><div class='hunk'>@@ -46,7 +49,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,ep9301-i2s.yaml b/Documentation/devicetree/bindings/sound/cirrus,ep9301-i2s.yaml<br/>new file mode 100644<br/>index 000000000000..453d493c941f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,ep9301-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/cirrus,ep9301-i2s.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/cirrus,ep9301-i2s.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cirrus EP93xx I2S Controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The I2S controller is used to stream serial audio data between the external</div><div class='add'>+  I2S CODECs’, ADCs/DACs, and the ARM Core. The controller supports I2S, Left-</div><div class='add'>+  and Right-Justified DSP formats.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Sverdlin &lt;alexander.sverdlin@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cirrus,ep9301-i2s</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+      - const: sclk</div><div class='add'>+      - const: lrclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2s: i2s@80820000 {</div><div class='add'>+        compatible = "cirrus,ep9301-i2s";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x80820000 0x100&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='add'>+        interrupts = &lt;28&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscon 29&gt;,</div><div class='add'>+                 &lt;&amp;syscon 30&gt;,</div><div class='add'>+                 &lt;&amp;syscon 31&gt;;</div><div class='add'>+        clock-names = "mclk", "sclk", "lrclk";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml<br/>index cea612d3d4a7..52f024f5302a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/cirrus,lochnagar.yaml</a></div><div class='hunk'>@@ -24,6 +24,9 @@ description: |</div><div class='ctx'>   This binding must be part of the Lochnagar MFD binding:</div><div class='ctx'>     [1] ../mfd/cirrus,lochnagar.yaml</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -49,4 +52,4 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/cirrus,madera.yaml b/Documentation/devicetree/bindings/sound/cirrus,madera.yaml<br/>index 23138ddcb62d..014d4eaa8793 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,madera.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/cirrus,madera.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/cirrus,madera.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/cirrus,madera.yaml</a></div><div class='hunk'>@@ -22,6 +22,9 @@ description: |</div><div class='ctx'> </div><div class='ctx'>   The properties are all contained in the parent MFD node.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/name-prefix.yaml b/Documentation/devicetree/bindings/sound/component-common.yaml<br/>index 2fe57f87ac52..37766c5f3974 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/name-prefix.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/name-prefix.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/component-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/component-common.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/sound/name-prefix.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/sound/component-common.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Component sound name prefix</div><div class='add'>+title: Audio Component Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/da9055.txt b/Documentation/devicetree/bindings/sound/da9055.txt<br/>index ed1b7cc6f249..75c6338b6ae2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/da9055.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/da9055.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/da9055.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/da9055.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@</div><div class='ctx'> </div><div class='ctx'> DA9055 provides Audio CODEC support (I2C only).</div><div class='ctx'> </div><div class='del'>-The Audio CODEC device in DA9055 has it's own I2C address which is configurable,</div><div class='add'>+The Audio CODEC device in DA9055 has its own I2C address which is configurable,</div><div class='ctx'> so the device is instantiated separately from the PMIC (MFD) device.</div><div class='ctx'> </div><div class='ctx'> For details on accompanying PMIC I2C device, see the following:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/dai-common.yaml b/Documentation/devicetree/bindings/sound/dai-common.yaml<br/>new file mode 100644<br/>index 000000000000..1aed2f0f1775<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/dai-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/dai-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,18 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/dai-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Digital Audio Interface Common Properties</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: component-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  '#sound-dai-cells': true</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/dai-params.yaml b/Documentation/devicetree/bindings/sound/dai-params.yaml<br/>new file mode 100644<br/>index 000000000000..f5fb71f9b603<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/dai-params.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/dai-params.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/dai-params.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Digital Audio Interface (DAI) Stream Parameters</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+select: false</div><div class='add'>+</div><div class='add'>+$defs:</div><div class='add'>+</div><div class='add'>+  dai-channels:</div><div class='add'>+    description: Number of audio channels used by DAI</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 32</div><div class='add'>+</div><div class='add'>+  dai-sample-format:</div><div class='add'>+    description: Audio sample format used by DAI</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum:</div><div class='add'>+      - s8</div><div class='add'>+      - s16_le</div><div class='add'>+      - s24_le</div><div class='add'>+      - s24_3le</div><div class='add'>+      - s32_le</div><div class='add'>+</div><div class='add'>+  dai-sample-rate:</div><div class='add'>+    description: Audio sample rate used by DAI</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 8000</div><div class='add'>+    maximum: 192000</div><div class='add'>+</div><div class='add'>+properties: {}</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml<br/>index f46c66bc6b2d..7735e08d35ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/davinci-mcasp-audio.yaml</a></div><div class='hunk'>@@ -167,6 +167,7 @@ required:</div><div class='ctx'>   - interrupt-names</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         opmode:</div><div class='hunk'>@@ -177,7 +178,7 @@ allOf:</div><div class='ctx'>       required:</div><div class='ctx'>         - tdm-slots</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/designware-i2s.txt b/Documentation/devicetree/bindings/sound/designware-i2s.txt<br/>deleted file mode 100644<br/>index 6a536d570e29..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/designware-i2s.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/designware-i2s.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-DesignWare I2S controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>- - compatible : Must be "snps,designware-i2s"</div><div class='del'>- - reg : Must contain the I2S core's registers location and length</div><div class='del'>- - clocks : Pairs of phandle and specifier referencing the controller's</div><div class='del'>-   clocks. The controller expects one clock: the clock used as the sampling</div><div class='del'>-   rate reference clock sample.</div><div class='del'>- - clock-names : "i2sclk" for the sample rate reference clock.</div><div class='del'>- - dmas: Pairs of phandle and specifier for the DMA channels that are used by</div><div class='del'>-   the core. The core expects one or two dma channels: one for transmit and</div><div class='del'>-   one for receive.</div><div class='del'>- - dma-names : "tx" for the transmit channel, "rx" for the receive channel.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>- - interrupts: The interrupt line number for the I2S controller. Add this</div><div class='del'>-   parameter if the I2S controller that you are using does not support DMA.</div><div class='del'>-</div><div class='del'>-For more details on the 'dma', 'dma-names', 'clock' and 'clock-names'</div><div class='del'>-properties please check:</div><div class='del'>-	* resource-names.txt</div><div class='del'>-	* clock/clock-bindings.txt</div><div class='del'>-	* dma/dma.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	soc_i2s: i2s@7ff90000 {</div><div class='del'>-		compatible = "snps,designware-i2s";</div><div class='del'>-		reg = &lt;0x0 0x7ff90000 0x0 0x1000&gt;;</div><div class='del'>-		clocks = &lt;&amp;scpi_i2sclk 0&gt;;</div><div class='del'>-		clock-names = "i2sclk";</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		dmas = &lt;&amp;dma0 5&gt;;</div><div class='del'>-		dma-names = "tx";</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/dmic-codec.yaml b/Documentation/devicetree/bindings/sound/dmic-codec.yaml<br/>new file mode 100644<br/>index 000000000000..59ef0cf6b6e5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/dmic-codec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/dmic-codec.yaml</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/dmic-codec.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Generic PDM Digital microphone (DMIC) codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Arnaud Pouliquen &lt;arnaud.pouliquen@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: dmic-codec</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  dmicen-gpios:</div><div class='add'>+    description: GPIO specifier for DMIC to control start and stop</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  num-channels:</div><div class='add'>+    description: Number of microphones on this DAI</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 8</div><div class='add'>+    default: 8</div><div class='add'>+</div><div class='add'>+  modeswitch-delay-ms:</div><div class='add'>+    description: Delay (in ms) to complete DMIC mode switch</div><div class='add'>+</div><div class='add'>+  wakeup-delay-ms:</div><div class='add'>+    description: Delay (in ms) after enabling the DMIC</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    dmic {</div><div class='add'>+        compatible = "dmic-codec";</div><div class='add'>+        dmicen-gpios = &lt;&amp;gpio4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        num-channels = &lt;1&gt;;</div><div class='add'>+        wakeup-delay-ms = &lt;50&gt;;</div><div class='add'>+        modeswitch-delay-ms = &lt;35&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/dmic.txt b/Documentation/devicetree/bindings/sound/dmic.txt<br/>deleted file mode 100644<br/>index 32e871037269..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/dmic.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/dmic.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-Device-Tree bindings for Digital microphone (DMIC) codec</div><div class='del'>-</div><div class='del'>-This device support generic PDM digital microphone.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-	- compatible: should be "dmic-codec".</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-	- dmicen-gpios: GPIO specifier for dmic to control start and stop</div><div class='del'>-	- num-channels: Number of microphones on this DAI</div><div class='del'>-	- wakeup-delay-ms: Delay (in ms) after enabling the DMIC</div><div class='del'>-	- modeswitch-delay-ms: Delay (in ms) to complete DMIC mode switch</div><div class='del'>-</div><div class='del'>-Example node:</div><div class='del'>-</div><div class='del'>-	dmic_codec: dmic@0 {</div><div class='del'>-		compatible = "dmic-codec";</div><div class='del'>-		dmicen-gpios = &lt;&amp;gpio4 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='del'>-		num-channels = &lt;1&gt;;</div><div class='del'>-		wakeup-delay-ms &lt;50&gt;;</div><div class='del'>-		modeswitch-delay-ms &lt;35&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/everest,es8316.yaml b/Documentation/devicetree/bindings/sound/everest,es8316.yaml<br/>index 3b752bba748b..b6079b3c440d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/everest,es8316.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/everest,es8316.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/everest,es8316.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/everest,es8316.yaml</a></div><div class='hunk'>@@ -10,6 +10,9 @@ maintainers:</div><div class='ctx'>   - Daniel Drake &lt;drake@endlessm.com&gt;</div><div class='ctx'>   - Katsuhiro Suzuki &lt;katsuhiro@katsuster.net&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: everest,es8316</div><div class='hunk'>@@ -25,6 +28,10 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: mclk</div><div class='ctx'> </div><div class='add'>+  port:</div><div class='add'>+    $ref: audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>   "#sound-dai-cells":</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='hunk'>@@ -33,11 +40,11 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'>       es8316: codec@11 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/everest,es8326.yaml b/Documentation/devicetree/bindings/sound/everest,es8326.yaml<br/>new file mode 100644<br/>index 000000000000..07781408e788<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/everest,es8326.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/everest,es8326.yaml</a></div><div class='hunk'>@@ -0,0 +1,116 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/everest,es8326.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Everest ES8326 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - David Yang &lt;yangxiaohua@everest-semi.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: everest,es8326</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: clock for master clock (MCLK)</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  everest,jack-pol:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+      just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.</div><div class='add'>+      Bit(2) decides whether the button on the headset is inverted.</div><div class='add'>+      Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.</div><div class='add'>+    minimum: 0x00</div><div class='add'>+    maximum: 0x0f</div><div class='add'>+    default: 0x0f</div><div class='add'>+</div><div class='add'>+  everest,mic1-src:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description:</div><div class='add'>+      the value of reg 2A when headset plugged.</div><div class='add'>+    minimum: 0x00</div><div class='add'>+    maximum: 0x77</div><div class='add'>+    default: 0x22</div><div class='add'>+</div><div class='add'>+  everest,mic2-src:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description:</div><div class='add'>+      the value of reg 2A when headset unplugged.</div><div class='add'>+    minimum: 0x00</div><div class='add'>+    maximum: 0x77</div><div class='add'>+    default: 0x44</div><div class='add'>+</div><div class='add'>+  everest,jack-detect-inverted:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      Defined to invert the jack detection.</div><div class='add'>+</div><div class='add'>+  everest,interrupt-src:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+      value of reg 0x58, Defines the interrupt source.</div><div class='add'>+      Bit(2) 1 means button press triggers irq, 0 means not.</div><div class='add'>+      Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,</div><div class='add'>+      bias change on PIN9 do not triggers irq.</div><div class='add'>+      Bit(4) 1 means PIN27 is the irq source for jack detection.</div><div class='add'>+      Bit(5) 1 means PIN9 is the irq source after MIC detect.</div><div class='add'>+      Bit(6) 1 means PIN27 is the irq source after MIC detect.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 0x3c</div><div class='add'>+    default: 0x08</div><div class='add'>+</div><div class='add'>+  everest,interrupt-clk:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8</div><div class='add'>+    description: |</div><div class='add'>+     value of reg 0x59, Defines the interrupt output behavior.</div><div class='add'>+     Bit(0-3) 0 means irq pulse equals 512*internal clock</div><div class='add'>+       1 means irq pulse equals 1024*internal clock</div><div class='add'>+       2 means ...</div><div class='add'>+       7 means irq pulse equals 65536*internal clock</div><div class='add'>+       8 means irq mutes PA</div><div class='add'>+       9 means irq mutes PA and DAC output</div><div class='add'>+     Bit(4) 1 means we invert the interrupt output.</div><div class='add'>+     Bit(6) 1 means the chip do not detect jack type after button released.</div><div class='add'>+       0 means the chip detect jack type again after button released.</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 0x7f</div><div class='add'>+    default: 0x45</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      es8326: codec@19 {</div><div class='add'>+        compatible = "everest,es8326";</div><div class='add'>+        reg = &lt;0x19&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks 10&gt;;</div><div class='add'>+        clock-names = "mclk";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        everest,mic1-src = [22];</div><div class='add'>+        everest,mic2-src = [44];</div><div class='add'>+        everest,jack-pol = [0e];</div><div class='add'>+        everest,interrupt-src = [08];</div><div class='add'>+        everest,interrupt-clk = [45];</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,micfil.txt b/Documentation/devicetree/bindings/sound/fsl,micfil.txt<br/>deleted file mode 100644<br/>index 53e227b15277..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,micfil.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,micfil.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,32 +0,0 @@</div><div class='del'>-NXP MICFIL Digital Audio Interface (MICFIL).</div><div class='del'>-</div><div class='del'>-The MICFIL digital interface provides a 16-bit audio signal from a PDM</div><div class='del'>-microphone bitstream in a configurable output sampling rate.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible		: Compatible list, contains "fsl,imx8mm-micfil"</div><div class='del'>-</div><div class='del'>-  - reg			: Offset and length of the register set for the device.</div><div class='del'>-</div><div class='del'>-  - interrupts		: Contains the micfil interrupts.</div><div class='del'>-</div><div class='del'>-  - clocks		: Must contain an entry for each entry in clock-names.</div><div class='del'>-</div><div class='del'>-  - clock-names		: Must include the "ipg_clk" for register access and</div><div class='del'>-			  "ipg_clk_app" for internal micfil clock.</div><div class='del'>-</div><div class='del'>-  - dmas		: Generic dma devicetree binding as described in</div><div class='del'>-			  Documentation/devicetree/bindings/dma/dma.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-micfil: micfil@30080000 {</div><div class='del'>-	compatible = "fsl,imx8mm-micfil";</div><div class='del'>-	reg = &lt;0x0 0x30080000 0x0 0x10000&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-		     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clocks = &lt;&amp;clk IMX8MM_CLK_PDM_IPG&gt;,</div><div class='del'>-		 &lt;&amp;clk IMX8MM_CLK_PDM_ROOT&gt;;</div><div class='del'>-	clock-names = "ipg_clk", "ipg_clk_app";</div><div class='del'>-	dmas = &lt;&amp;sdma2 24 26 0x80000000&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,micfil.yaml b/Documentation/devicetree/bindings/sound/fsl,micfil.yaml<br/>new file mode 100644<br/>index 000000000000..4b99a18c79a0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,micfil.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/fsl,micfil.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl,micfil.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP MICFIL Digital Audio Interface (MICFIL)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The MICFIL digital interface provides a 16-bit or 24-bit audio signal</div><div class='add'>+  from a PDM microphone bitstream in a configurable output sampling rate.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fsl,imx8mm-micfil</div><div class='add'>+      - fsl,imx8mp-micfil</div><div class='add'>+      - fsl,imx93-micfil</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Digital Microphone interface interrupt</div><div class='add'>+      - description: Digital Microphone interface error interrupt</div><div class='add'>+      - description: voice activity detector event interrupt</div><div class='add'>+      - description: voice activity detector error interrupt</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMA controller phandle and request line for RX</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The ipg clock for register access</div><div class='add'>+      - description: internal micfil clock</div><div class='add'>+      - description: PLL clock source for 8kHz series</div><div class='add'>+      - description: PLL clock source for 11kHz series</div><div class='add'>+      - description: External clock 3</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ipg_clk</div><div class='add'>+      - const: ipg_clk_app</div><div class='add'>+      - const: pll8k</div><div class='add'>+      - const: pll11k</div><div class='add'>+      - const: clkext3</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mm-clock.h&gt;</div><div class='add'>+    micfil: audio-controller@30080000 {</div><div class='add'>+        compatible = "fsl,imx8mm-micfil";</div><div class='add'>+        reg = &lt;0x30080000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MM_CLK_PDM_IPG&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_CLK_PDM_ROOT&gt;;</div><div class='add'>+        clock-names = "ipg_clk", "ipg_clk_app";</div><div class='add'>+        dmas = &lt;&amp;sdma2 24 25 0&gt;;</div><div class='add'>+        dma-names = "rx";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.txt b/Documentation/devicetree/bindings/sound/fsl,mqs.txt<br/>index 40353fc30255..d66284b8bef2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,mqs.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,mqs.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,mqs.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/fsl,mqs.txt</a></div><div class='hunk'>@@ -2,7 +2,7 @@ fsl,mqs audio CODEC</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'>   - compatible : Must contain one of "fsl,imx6sx-mqs", "fsl,codec-mqs"</div><div class='del'>-		"fsl,imx8qm-mqs", "fsl,imx8qxp-mqs".</div><div class='add'>+		"fsl,imx8qm-mqs", "fsl,imx8qxp-mqs", "fsl,imx93-mqs".</div><div class='ctx'>   - clocks : A list of phandles + clock-specifiers, one for each entry in</div><div class='ctx'> 	     clock-names</div><div class='ctx'>   - clock-names : "mclk" - must required.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml b/Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml<br/>new file mode 100644<br/>index 000000000000..ff5cd9241941<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/fsl,qmc-audio.yaml</a></div><div class='hunk'>@@ -0,0 +1,117 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl,qmc-audio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: QMC audio</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Herve Codina &lt;herve.codina@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The QMC audio is an ASoC component which uses QMC (QUICC Multichannel</div><div class='add'>+  Controller) channels to transfer the audio data.</div><div class='add'>+  It provides as many DAI as the number of QMC channel used.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fsl,qmc-audio</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^dai@([0-9]|[1-5][0-9]|6[0-3])$':</div><div class='add'>+    description:</div><div class='add'>+      A DAI managed by this controller</div><div class='add'>+    type: object</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        minimum: 0</div><div class='add'>+        maximum: 63</div><div class='add'>+        description:</div><div class='add'>+          The DAI number</div><div class='add'>+</div><div class='add'>+      fsl,qmc-chan:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+        items:</div><div class='add'>+          - items:</div><div class='add'>+              - description: phandle to QMC node</div><div class='add'>+              - description: Channel number</div><div class='add'>+        description:</div><div class='add'>+          Should be a phandle/number pair. The phandle to QMC node and the QMC</div><div class='add'>+          channel to use for this DAI.</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+      - fsl,qmc-chan</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    audio_controller: audio-controller {</div><div class='add'>+        compatible = "fsl,qmc-audio";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+        dai@16 {</div><div class='add'>+            reg = &lt;16&gt;;</div><div class='add'>+            fsl,qmc-chan = &lt;&amp;qmc 16&gt;;</div><div class='add'>+        };</div><div class='add'>+        dai@17 {</div><div class='add'>+            reg = &lt;17&gt;;</div><div class='add'>+            fsl,qmc-chan = &lt;&amp;qmc 17&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    sound {</div><div class='add'>+        compatible = "simple-audio-card";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        simple-audio-card,dai-link@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            format = "dsp_b";</div><div class='add'>+            cpu {</div><div class='add'>+                sound-dai = &lt;&amp;audio_controller 16&gt;;</div><div class='add'>+            };</div><div class='add'>+            codec {</div><div class='add'>+                sound-dai = &lt;&amp;codec1&gt;;</div><div class='add'>+                dai-tdm-slot-num = &lt;4&gt;;</div><div class='add'>+                dai-tdm-slot-width = &lt;8&gt;;</div><div class='add'>+                /* TS 3, 5, 7, 9 */</div><div class='add'>+                dai-tdm-slot-tx-mask = &lt;0 0 0 1 0 1 0 1 0 1&gt;;</div><div class='add'>+                dai-tdm-slot-rx-mask = &lt;0 0 0 1 0 1 0 1 0 1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+        simple-audio-card,dai-link@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            format = "dsp_b";</div><div class='add'>+            cpu {</div><div class='add'>+                sound-dai = &lt;&amp;audio_controller 17&gt;;</div><div class='add'>+            };</div><div class='add'>+            codec {</div><div class='add'>+                sound-dai = &lt;&amp;codec2&gt;;</div><div class='add'>+                dai-tdm-slot-num = &lt;4&gt;;</div><div class='add'>+                dai-tdm-slot-width = &lt;8&gt;;</div><div class='add'>+                /* TS 2, 4, 6, 8 */</div><div class='add'>+                dai-tdm-slot-tx-mask = &lt;0 0 1 0 1 0 1 0 1&gt;;</div><div class='add'>+                dai-tdm-slot-rx-mask = &lt;0 0 1 0 1 0 1 0 1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml b/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml<br/>index d370c98a62c7..e847611a85f7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/fsl,rpmsg.yaml</a></div><div class='hunk'>@@ -11,8 +11,11 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   fsl_rpmsg is a virtual audio device. Mapping to real hardware devices</div><div class='del'>-  are SAI, DMA controlled by Cortex M core. What we see from Linux</div><div class='del'>-  side is a device which provides audio service by rpmsg channel.</div><div class='add'>+  are SAI, MICFIL, DMA controlled by Cortex M core. What we see from</div><div class='add'>+  Linux side is a device which provides audio service by rpmsg channel.</div><div class='add'>+  We can create different sound cards which access different hardwares</div><div class='add'>+  such as SAI, MICFIL, .etc through building rpmsg channels between</div><div class='add'>+  Cortex-A and Cortex-M.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -85,6 +88,16 @@ properties:</div><div class='ctx'>       This is a boolean property. If present, the receiving function</div><div class='ctx'>       will be enabled.</div><div class='ctx'> </div><div class='add'>+  fsl,rpmsg-channel-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      A string property to assign rpmsg channel this sound card sits on.</div><div class='add'>+      This property can be omitted if there is only one sound card and it sits</div><div class='add'>+      on "rpmsg-audio-channel".</div><div class='add'>+    enum:</div><div class='add'>+      - rpmsg-audio-channel</div><div class='add'>+      - rpmsg-micfil-channel</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - model</div><div class='hunk'>@@ -107,3 +120,22 @@ examples:</div><div class='ctx'>                  &lt;&amp;clk IMX8MN_AUDIO_PLL2_OUT&gt;;</div><div class='ctx'>         clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k";</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mm-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    rpmsg_micfil: audio-controller {</div><div class='add'>+        compatible = "fsl,imx8mm-rpmsg-audio";</div><div class='add'>+        model = "micfil-audio";</div><div class='add'>+        fsl,rpmsg-channel-name = "rpmsg-micfil-channel";</div><div class='add'>+        fsl,enable-lpa;</div><div class='add'>+        fsl,rpmsg-in;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MM_CLK_PDM_IPG&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_CLK_PDM_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_CLK_SDMA3_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_AUDIO_PLL1_OUT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_AUDIO_PLL2_OUT&gt;;</div><div class='add'>+        clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml<br/>new file mode 100644<br/>index 000000000000..088c26b001cc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,sai.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/fsl,sai.yaml</a></div><div class='hunk'>@@ -0,0 +1,203 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/fsl,sai.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale Synchronous Audio Interface (SAI).</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shengjiu Wang &lt;shengjiu.wang@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The SAI is based on I2S module that used communicating with audio codecs,</div><div class='add'>+  which provides a synchronous audio interface that supports fullduplex</div><div class='add'>+  serial interfaces with frame synchronization such as I2S, AC97, TDM, and</div><div class='add'>+  codec/DSP interfaces.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6ul-sai</div><div class='add'>+              - fsl,imx7d-sai</div><div class='add'>+          - const: fsl,imx6sx-sai</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mm-sai</div><div class='add'>+              - fsl,imx8mn-sai</div><div class='add'>+              - fsl,imx8mp-sai</div><div class='add'>+          - const: fsl,imx8mq-sai</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6sx-sai</div><div class='add'>+              - fsl,imx7ulp-sai</div><div class='add'>+              - fsl,imx8mq-sai</div><div class='add'>+              - fsl,imx8qm-sai</div><div class='add'>+              - fsl,imx8ulp-sai</div><div class='add'>+              - fsl,imx93-sai</div><div class='add'>+              - fsl,vf610-sai</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: The ipg clock for register access</div><div class='add'>+      - description: master clock source 0 (obsoleted)</div><div class='add'>+      - description: master clock source 1</div><div class='add'>+      - description: master clock source 2</div><div class='add'>+      - description: master clock source 3</div><div class='add'>+      - description: PLL clock source for 8kHz series</div><div class='add'>+      - description: PLL clock source for 11kHz series</div><div class='add'>+    minItems: 4</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: bus</div><div class='add'>+          - const: mclk0</div><div class='add'>+          - const: mclk1</div><div class='add'>+          - const: mclk2</div><div class='add'>+          - const: mclk3</div><div class='add'>+          - const: pll8k</div><div class='add'>+          - const: pll11k</div><div class='add'>+        minItems: 5</div><div class='add'>+      - items:</div><div class='add'>+          - const: bus</div><div class='add'>+          - const: mclk1</div><div class='add'>+          - const: mclk2</div><div class='add'>+          - const: mclk3</div><div class='add'>+          - const: pll8k</div><div class='add'>+          - const: pll11k</div><div class='add'>+        minItems: 4</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: DMA controller phandle and request line for RX</div><div class='add'>+      - description: DMA controller phandle and request line for TX</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: rx</div><div class='add'>+      - const: tx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: receive and transmit interrupt</div><div class='add'>+</div><div class='add'>+  big-endian:</div><div class='add'>+    description: |</div><div class='add'>+      required if all the SAI registers are big-endian rather than little-endian.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  fsl,dataline:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='add'>+    description: |</div><div class='add'>+      Configure the dataline. It has 3 value for each configuration</div><div class='add'>+    maxItems: 16</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: format Default(0), I2S(1) or PDM(2)</div><div class='add'>+          enum: [0, 1, 2]</div><div class='add'>+        - description: dataline mask for 'rx'</div><div class='add'>+        - description: dataline mask for 'tx'</div><div class='add'>+</div><div class='add'>+  fsl,sai-mclk-direction-output:</div><div class='add'>+    description: SAI will output the SAI MCLK clock.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  fsl,sai-synchronous-rx:</div><div class='add'>+    description: |</div><div class='add'>+      SAI will work in the synchronous mode (sync Tx with Rx) which means</div><div class='add'>+      both the transmitter and the receiver will send and receive data by</div><div class='add'>+      following receiver's bit clocks and frame sync clocks.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  fsl,sai-asynchronous:</div><div class='add'>+    description: |</div><div class='add'>+      SAI will work in the asynchronous mode, which means both transmitter</div><div class='add'>+      and receiver will send and receive data by following their own bit clocks</div><div class='add'>+      and frame sync clocks separately.</div><div class='add'>+      If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the</div><div class='add'>+      default synchronous mode (sync Rx with Tx) will be used, which means both</div><div class='add'>+      transmitter and receiver will send and receive data by following clocks</div><div class='add'>+      of transmitter.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  fsl,shared-interrupt:</div><div class='add'>+    description: Interrupt is shared with other modules.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  lsb-first:</div><div class='add'>+    description: |</div><div class='add'>+      Configures whether the LSB or the MSB is transmitted</div><div class='add'>+      first for the fifo data. If this property is absent,</div><div class='add'>+      the MSB is transmitted first as default, or the LSB</div><div class='add'>+      is transmitted first.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+    description: optional, some dts node didn't add it.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - fsl,sai-asynchronous</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        fsl,sai-synchronous-rx: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - dmas</div><div class='add'>+  - dma-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/vf610-clock.h&gt;</div><div class='add'>+    sai2: sai@40031000 {</div><div class='add'>+        compatible = "fsl,vf610-sai";</div><div class='add'>+        reg = &lt;0x40031000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;86 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_sai2_1&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks VF610_CLK_PLATFORM_BUS&gt;,</div><div class='add'>+                 &lt;&amp;clks VF610_CLK_SAI2&gt;,</div><div class='add'>+                 &lt;&amp;clks 0&gt;, &lt;&amp;clks 0&gt;;</div><div class='add'>+        clock-names = "bus", "mclk1", "mclk2", "mclk3";</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+        dmas = &lt;&amp;edma0 0 20&gt;, &lt;&amp;edma0 0 21&gt;;</div><div class='add'>+        big-endian;</div><div class='add'>+        lsb-first;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mm-clock.h&gt;</div><div class='add'>+    sai1: sai@30010000 {</div><div class='add'>+        compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";</div><div class='add'>+        reg = &lt;0x30010000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MM_CLK_SAI1_IPG&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_CLK_SAI1_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;, &lt;&amp;clk IMX8MM_CLK_DUMMY&gt;;</div><div class='add'>+        clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";</div><div class='add'>+        dmas = &lt;&amp;sdma2 0 2 0&gt;, &lt;&amp;sdma2 1 2 0&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+        fsl,dataline = &lt;1 0xff 0xff 2 0xff 0x11&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,spdif.yaml b/Documentation/devicetree/bindings/sound/fsl,spdif.yaml<br/>index f226ec13167a..1d64e8337aa4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,spdif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,spdif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,spdif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/fsl,spdif.yaml</a></div><div class='hunk'>@@ -58,6 +58,8 @@ properties:</div><div class='ctx'>           slave of the Shared Peripheral Bus and when two or more bus masters</div><div class='ctx'>           (CPU, DMA or DSP) try to access it. This property is optional depending</div><div class='ctx'>           on the SoC design.</div><div class='add'>+      - description: PLL clock source for 8kHz series rate, optional.</div><div class='add'>+      - description: PLL clock source for 11khz series rate, optional.</div><div class='ctx'>     minItems: 9</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='hunk'>@@ -72,6 +74,8 @@ properties:</div><div class='ctx'>       - const: rxtx6</div><div class='ctx'>       - const: rxtx7</div><div class='ctx'>       - const: spba</div><div class='add'>+      - const: pll8k</div><div class='add'>+      - const: pll11k</div><div class='ctx'>     minItems: 9</div><div class='ctx'> </div><div class='ctx'>   big-endian:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml<br/>index 223b8ea693dc..799b362ba498 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl,xcvr.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/fsl,xcvr.yaml</a></div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - fsl,imx8mp-xcvr</div><div class='add'>+      - fsl,imx93-xcvr</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt b/Documentation/devicetree/bindings/sound/fsl-sai.txt<br/>deleted file mode 100644<br/>index c71c5861d787..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/fsl-sai.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/fsl-sai.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,84 +0,0 @@</div><div class='del'>-Freescale Synchronous Audio Interface (SAI).</div><div class='del'>-</div><div class='del'>-The SAI is based on I2S module that used communicating with audio codecs,</div><div class='del'>-which provides a synchronous audio interface that supports fullduplex</div><div class='del'>-serial interfaces with frame synchronization such as I2S, AC97, TDM, and</div><div class='del'>-codec/DSP interfaces.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible		: Compatible list, contains "fsl,vf610-sai",</div><div class='del'>-			  "fsl,imx6sx-sai", "fsl,imx6ul-sai",</div><div class='del'>-			  "fsl,imx7ulp-sai", "fsl,imx8mq-sai",</div><div class='del'>-			  "fsl,imx8qm-sai", "fsl,imx8mm-sai",</div><div class='del'>-			  "fsl,imx8mn-sai", "fsl,imx8mp-sai", or</div><div class='del'>-			  "fsl,imx8ulp-sai".</div><div class='del'>-</div><div class='del'>-  - reg			: Offset and length of the register set for the device.</div><div class='del'>-</div><div class='del'>-  - clocks		: Must contain an entry for each entry in clock-names.</div><div class='del'>-</div><div class='del'>-  - clock-names		: Must include the "bus" for register access and</div><div class='del'>-			  "mclk1", "mclk2", "mclk3" for bit clock and frame</div><div class='del'>-			  clock providing.</div><div class='del'>-  - dmas		: Generic dma devicetree binding as described in</div><div class='del'>-			  Documentation/devicetree/bindings/dma/dma.txt.</div><div class='del'>-</div><div class='del'>-  - dma-names		: Two dmas have to be defined, "tx" and "rx".</div><div class='del'>-</div><div class='del'>-  - pinctrl-names	: Must contain a "default" entry.</div><div class='del'>-</div><div class='del'>-  - pinctrl-NNN		: One property must exist for each entry in</div><div class='del'>-			  pinctrl-names. See ../pinctrl/pinctrl-bindings.txt</div><div class='del'>-			  for details of the property values.</div><div class='del'>-</div><div class='del'>-  - lsb-first		: Configures whether the LSB or the MSB is transmitted</div><div class='del'>-			  first for the fifo data. If this property is absent,</div><div class='del'>-			  the MSB is transmitted first as default, or the LSB</div><div class='del'>-			  is transmitted first.</div><div class='del'>-</div><div class='del'>-  - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating</div><div class='del'>-			  that SAI will work in the synchronous mode (sync Tx</div><div class='del'>-			  with Rx) which means both the transmitter and the</div><div class='del'>-			  receiver will send and receive data by following</div><div class='del'>-			  receiver's bit clocks and frame sync clocks.</div><div class='del'>-</div><div class='del'>-  - fsl,sai-asynchronous: This is a boolean property. If present, indicating</div><div class='del'>-			  that SAI will work in the asynchronous mode, which</div><div class='del'>-			  means both transmitter and receiver will send and</div><div class='del'>-			  receive data by following their own bit clocks and</div><div class='del'>-			  frame sync clocks separately.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-  - big-endian		: Boolean property, required if all the SAI</div><div class='del'>-			  registers are big-endian rather than little-endian.</div><div class='del'>-</div><div class='del'>-Optional properties (for mx6ul):</div><div class='del'>-</div><div class='del'>-  - fsl,sai-mclk-direction-output: This is a boolean property. If present,</div><div class='del'>-			 indicates that SAI will output the SAI MCLK clock.</div><div class='del'>-</div><div class='del'>-Note:</div><div class='del'>-- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the</div><div class='del'>-  default synchronous mode (sync Rx with Tx) will be used, which means both</div><div class='del'>-  transmitter and receiver will send and receive data by following clocks</div><div class='del'>-  of transmitter.</div><div class='del'>-- fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-sai2: sai@40031000 {</div><div class='del'>-	      compatible = "fsl,vf610-sai";</div><div class='del'>-	      reg = &lt;0x40031000 0x1000&gt;;</div><div class='del'>-	      pinctrl-names = "default";</div><div class='del'>-	      pinctrl-0 = &lt;&amp;pinctrl_sai2_1&gt;;</div><div class='del'>-	      clocks = &lt;&amp;clks VF610_CLK_PLATFORM_BUS&gt;,</div><div class='del'>-		     &lt;&amp;clks VF610_CLK_SAI2&gt;,</div><div class='del'>-		     &lt;&amp;clks 0&gt;, &lt;&amp;clks 0&gt;;</div><div class='del'>-	      clock-names = "bus", "mclk1", "mclk2", "mclk3";</div><div class='del'>-	      dma-names = "tx", "rx";</div><div class='del'>-	      dmas = &lt;&amp;edma0 0 VF610_EDMA_MUXID0_SAI2_TX&gt;,</div><div class='del'>-		   &lt;&amp;edma0 0 VF610_EDMA_MUXID0_SAI2_RX&gt;;</div><div class='del'>-	      big-endian;</div><div class='del'>-	      lsb-first;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml b/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml<br/>index c3e9f3485449..1434f4433738 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/google,cros-ec-codec.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ title: Audio codec controlled by ChromeOS EC</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Cheng-Yi Chiang &lt;cychiang@chromium.org&gt;</div><div class='del'>-  - Tzung-Bi Shih &lt;tzungbi@google.com&gt;</div><div class='add'>+  - Tzung-Bi Shih &lt;tzungbi@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Google's ChromeOS EC codec is a digital mic codec provided by the</div><div class='hunk'>@@ -17,6 +17,9 @@ description: |</div><div class='ctx'>   subnode of a cros-ec node.</div><div class='ctx'>   (see Documentation/devicetree/bindings/mfd/google,cros-ec.yaml).</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: google,cros-ec-codec</div><div class='hunk'>@@ -42,7 +45,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - '#sound-dai-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -57,6 +60,7 @@ examples:</div><div class='ctx'>         cros-ec@0 {</div><div class='ctx'>             compatible = "google,cros-ec-spi";</div><div class='ctx'>             reg = &lt;0&gt;;</div><div class='add'>+            interrupts = &lt;93 0&gt;;</div><div class='ctx'> </div><div class='ctx'>             codecs {</div><div class='ctx'>                 #address-cells = &lt;2&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml b/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml<br/>index 233caa0ade87..67ccddd44489 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml</a></div><div class='hunk'>@@ -61,6 +61,8 @@ patternProperties:</div><div class='ctx'>       cpu:</div><div class='ctx'>         description: Holds subnode which indicates cpu dai.</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           sound-dai:</div><div class='ctx'>             maxItems: 1</div><div class='hunk'>@@ -68,6 +70,8 @@ patternProperties:</div><div class='ctx'>       codec:</div><div class='ctx'>         description: Holds subnode which indicates codec dai.</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           sound-dai:</div><div class='ctx'>             maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml b/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml<br/>index 869b40363af8..0b1a01a4c14e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/google,sc7280-herobrine.yaml</a></div><div class='hunk'>@@ -75,6 +75,18 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>         additionalProperties: false</div><div class='ctx'> </div><div class='add'>+      platform:</div><div class='add'>+        description: Holds subnode which includes the phandle of q6apm platform device.</div><div class='add'>+        type: object</div><div class='add'>+        properties:</div><div class='add'>+          sound-dai:</div><div class='add'>+            maxItems: 1</div><div class='add'>+</div><div class='add'>+        required:</div><div class='add'>+          - sound-dai</div><div class='add'>+</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - link-name</div><div class='ctx'>       - cpu</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/imx-audio-card.yaml b/Documentation/devicetree/bindings/sound/imx-audio-card.yaml<br/>index bb3a435722c7..b6f5d486600e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/imx-audio-card.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/imx-audio-card.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/imx-audio-card.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/imx-audio-card.yaml</a></div><div class='hunk'>@@ -58,6 +58,7 @@ patternProperties:</div><div class='ctx'>       cpu:</div><div class='ctx'>         description: Holds subnode which indicates cpu dai.</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         properties:</div><div class='ctx'>           sound-dai:</div><div class='ctx'>             maxItems: 1</div><div class='hunk'>@@ -65,6 +66,7 @@ patternProperties:</div><div class='ctx'>       codec:</div><div class='ctx'>         description: Holds subnode which indicates codec dai.</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         properties:</div><div class='ctx'>           sound-dai:</div><div class='ctx'>             minItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml b/Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml<br/>index d5474f83ac2c..e7e7bb65c366 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/imx-audio-hdmi.yaml</a></div><div class='hunk'>@@ -20,9 +20,11 @@ properties:</div><div class='ctx'>     description: User specified audio sound card name</div><div class='ctx'> </div><div class='ctx'>   audio-cpu:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of an CPU DAI controller</div><div class='ctx'> </div><div class='ctx'>   hdmi-out:</div><div class='add'>+    type: boolean</div><div class='ctx'>     description: |</div><div class='ctx'>       This is a boolean property. If present, the transmitting function</div><div class='ctx'>       of HDMI will be enabled, indicating there's a physical HDMI out</div><div class='hunk'>@@ -30,6 +32,7 @@ properties:</div><div class='ctx'>       block, such as an HDMI encoder or display-controller.</div><div class='ctx'> </div><div class='ctx'>   hdmi-in:</div><div class='add'>+    type: boolean</div><div class='ctx'>     description: |</div><div class='ctx'>       This is a boolean property. If present, the receiving function of</div><div class='ctx'>       HDMI will be enabled, indicating there is a physical HDMI in</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/infineon,peb2466.yaml b/Documentation/devicetree/bindings/sound/infineon,peb2466.yaml<br/>new file mode 100644<br/>index 000000000000..66993d378aaf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/infineon,peb2466.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/infineon,peb2466.yaml</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/infineon,peb2466.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Infineon PEB2466 codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Herve Codina &lt;herve.codina@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Infineon PEB2466 codec is a programmable DSP-based four channels codec</div><div class='add'>+  with filters capabilities.</div><div class='add'>+</div><div class='add'>+  The time-slots used by the codec must be set and so, the properties</div><div class='add'>+  'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and</div><div class='add'>+  'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes</div><div class='add'>+  that involve the codec. The codec uses one 8bit time-slot per channel.</div><div class='add'>+  'dai-tdm-tdm-slot-with' must be set to 8.</div><div class='add'>+</div><div class='add'>+  The PEB2466 codec also supports 28 gpios (signaling pins).</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: infineon,peb2466</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      SPI device address.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Master clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 8192000</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description:</div><div class='add'>+      GPIO used to reset the device.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description:</div><div class='add'>+      Filters coefficients file to load. If this property is omitted, internal</div><div class='add'>+      filters are disabled.</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        audio-codec@0 {</div><div class='add'>+            compatible = "infineon,peb2466";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;8192000&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 10 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ingenic,aic.yaml b/Documentation/devicetree/bindings/sound/ingenic,aic.yaml<br/>index d607325f2f15..c59a7cd9eaa9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ingenic,aic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ingenic,aic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ingenic,aic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ingenic,aic.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/ingenic,aic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs AC97 / I2S Controller (AIC) DT bindings</div><div class='add'>+title: Ingenic SoCs AC97 / I2S Controller (AIC)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     pattern: '^audio-controller@'</div><div class='hunk'>@@ -37,15 +40,11 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: AIC clock</div><div class='ctx'>       - description: I2S clock</div><div class='del'>-      - description: EXT clock</div><div class='del'>-      - description: PLL/2 clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: aic</div><div class='ctx'>       - const: i2s</div><div class='del'>-      - const: ext</div><div class='del'>-      - const: pll half</div><div class='ctx'> </div><div class='ctx'>   dmas:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -57,7 +56,7 @@ properties:</div><div class='ctx'>       - const: rx</div><div class='ctx'>       - const: tx</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -82,10 +81,8 @@ examples:</div><div class='ctx'>       interrupts = &lt;18&gt;;</div><div class='ctx'> </div><div class='ctx'>       clocks = &lt;&amp;cgu JZ4740_CLK_AIC&gt;,</div><div class='del'>-               &lt;&amp;cgu JZ4740_CLK_I2S&gt;,</div><div class='del'>-               &lt;&amp;cgu JZ4740_CLK_EXT&gt;,</div><div class='del'>-               &lt;&amp;cgu JZ4740_CLK_PLL_HALF&gt;;</div><div class='del'>-      clock-names = "aic", "i2s", "ext", "pll half";</div><div class='add'>+               &lt;&amp;cgu JZ4740_CLK_I2S&gt;;</div><div class='add'>+      clock-names = "aic", "i2s";</div><div class='ctx'> </div><div class='ctx'>       dmas = &lt;&amp;dmac 25 0xffffffff&gt;, &lt;&amp;dmac 24 0xffffffff&gt;;</div><div class='ctx'>       dma-names = "rx", "tx";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ingenic,codec.yaml b/Documentation/devicetree/bindings/sound/ingenic,codec.yaml<br/>index 48aae54dd643..b58b90850e35 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ingenic,codec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ingenic,codec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ingenic,codec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ingenic,codec.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/ingenic,codec.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic JZ47xx internal codec DT bindings</div><div class='add'>+title: Ingenic JZ47xx internal codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     pattern: '^audio-codec@.*'</div><div class='hunk'>@@ -37,7 +40,7 @@ properties:</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml b/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml<br/>index 803627e984f6..76b6f2cf25df 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/intel,keembay-i2s.yaml</a></div><div class='hunk'>@@ -5,14 +5,18 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Intel KeemBay I2S Device Tree Bindings</div><div class='add'>+title: Intel KeemBay I2S</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Sia, Jee Heng &lt;jee.heng.sia@intel.com&gt;</div><div class='add'>+  - Daniele Alessandrelli &lt;daniele.alessandrelli@intel.com&gt;</div><div class='add'>+  - Paul J. Murphy &lt;paul.j.murphy@intel.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>  Intel KeemBay I2S</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -64,7 +68,7 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml b/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml<br/>new file mode 100644<br/>index 000000000000..b36c35e5da1a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/irondevice,sma1303.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/irondevice,sma1303.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Iron Device SMA1303 Audio Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kiseok Jo &lt;kiseok.jo@irondevice.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SMA1303 digital class-D audio amplifier</div><div class='add'>+  with an integrated boost converter.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - irondevice,sma1303</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        amplifier@1e {</div><div class='add'>+            compatible = "irondevice,sma1303";</div><div class='add'>+            reg = &lt;0x1e&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml b/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml<br/>index e3a1f485f664..a67b79cbe006 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/linux,bt-sco.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/linux,bt-sco.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/linux,bt-sco.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/linux,bt-sco.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bluetooth SCO Audio Codec Device Tree Bindings</div><div class='add'>+title: Bluetooth SCO Audio Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mark Brown &lt;broonie@kernel.org&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -26,7 +29,7 @@ required:</div><div class='ctx'>   - '#sound-dai-cells'</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml b/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml<br/>index a4f9257e313d..fe5f0756af2f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/linux,spdif-dit.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/linux,spdif-dit.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Dummy SPDIF Transmitter Device Tree Bindings</div><div class='add'>+title: Dummy SPDIF Transmitter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mark Brown &lt;broonie@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml b/Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml<br/>index 81f266d66ec5..4193d17d1c62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/marvell,mmp-sspa.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/marvell,mmp-sspa.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvel SSPA Digital Audio Interface Bindings</div><div class='add'>+title: Marvel SSPA Digital Audio Interface</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     pattern: "^audio-controller(@.*)?$"</div><div class='hunk'>@@ -57,6 +60,7 @@ properties:</div><div class='ctx'>     properties:</div><div class='ctx'>       endpoint:</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: true</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='ctx'>           dai-format:</div><div class='hunk'>@@ -73,7 +77,7 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'>   - port</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/max98090.txt b/Documentation/devicetree/bindings/sound/max98090.txt<br/>deleted file mode 100644<br/>index 39d640294c62..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/max98090.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98090.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,59 +0,0 @@</div><div class='del'>-MAX98090 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports I2C only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : "maxim,max98090" or "maxim,max98091".</div><div class='del'>-</div><div class='del'>-- reg : The I2C address of the device.</div><div class='del'>-</div><div class='del'>-- interrupts : The CODEC's interrupt output.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- clocks: The phandle of the master clock to the CODEC</div><div class='del'>-</div><div class='del'>-- clock-names: Should be "mclk"</div><div class='del'>-</div><div class='del'>-- #sound-dai-cells : should be 0.</div><div class='del'>-</div><div class='del'>-- maxim,dmic-freq: Frequency at which to clock DMIC</div><div class='del'>-</div><div class='del'>-- maxim,micbias: Micbias voltage applies to the analog mic, valid voltages value are:</div><div class='del'>-	0 - 2.2v</div><div class='del'>-	1 - 2.55v</div><div class='del'>-	2 - 2.4v</div><div class='del'>-	3 - 2.8v</div><div class='del'>-</div><div class='del'>-Pins on the device (for linking into audio routes):</div><div class='del'>-</div><div class='del'>-  * MIC1</div><div class='del'>-  * MIC2</div><div class='del'>-  * DMICL</div><div class='del'>-  * DMICR</div><div class='del'>-  * IN1</div><div class='del'>-  * IN2</div><div class='del'>-  * IN3</div><div class='del'>-  * IN4</div><div class='del'>-  * IN5</div><div class='del'>-  * IN6</div><div class='del'>-  * IN12</div><div class='del'>-  * IN34</div><div class='del'>-  * IN56</div><div class='del'>-  * HPL</div><div class='del'>-  * HPR</div><div class='del'>-  * SPKL</div><div class='del'>-  * SPKR</div><div class='del'>-  * RCVL</div><div class='del'>-  * RCVR</div><div class='del'>-  * MICBIAS</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-audio-codec@10 {</div><div class='del'>-	compatible = "maxim,max98090";</div><div class='del'>-	reg = &lt;0x10&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-	interrupts = &lt;TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/max98095.txt b/Documentation/devicetree/bindings/sound/max98095.txt<br/>deleted file mode 100644<br/>index 318a4c82f17f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/max98095.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98095.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-MAX98095 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports I2C only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : "maxim,max98095".</div><div class='del'>-</div><div class='del'>-- reg : The I2C address of the device.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- clocks: The phandle of the master clock to the CODEC</div><div class='del'>-</div><div class='del'>-- clock-names: Should be "mclk"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-max98095: codec@11 {</div><div class='del'>-	compatible = "maxim,max98095";</div><div class='del'>-	reg = &lt;0x11&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/max98357a.txt b/Documentation/devicetree/bindings/sound/max98357a.txt<br/>deleted file mode 100644<br/>index 75db84d06240..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/max98357a.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98357a.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-Maxim MAX98357A/MAX98360A audio DAC</div><div class='del'>-</div><div class='del'>-This node models the Maxim MAX98357A/MAX98360A DAC.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible   : "maxim,max98357a" for MAX98357A.</div><div class='del'>-                 "maxim,max98360a" for MAX98360A.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- sdmode-gpios : GPIO specifier for the chip's SD_MODE pin.</div><div class='del'>-        If this option is not specified then driver does not manage</div><div class='del'>-        the pin state (e.g. chip is always on).</div><div class='del'>-- sdmode-delay : specify delay time for SD_MODE pin.</div><div class='del'>-        If this option is specified, which means it's required i2s clocks</div><div class='del'>-        ready before SD_MODE is unmuted in order to avoid the speaker pop noise.</div><div class='del'>-        It's observed that 5ms is sufficient.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-max98357a {</div><div class='del'>-	compatible = "maxim,max98357a";</div><div class='del'>-	sdmode-gpios = &lt;&amp;qcom_pinmux 25 0&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-max98360a {</div><div class='del'>-	compatible = "maxim,max98360a";</div><div class='del'>-	sdmode-gpios = &lt;&amp;qcom_pinmux 25 0&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/max98371.txt b/Documentation/devicetree/bindings/sound/max98371.txt<br/>deleted file mode 100644<br/>index 8b2b2704b574..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/max98371.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98371.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-max98371 codec</div><div class='del'>-</div><div class='del'>-This device supports I2C mode only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : "maxim,max98371"</div><div class='del'>-- reg : The chip select number on the I2C bus</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-&amp;i2c {</div><div class='del'>-	max98371: max98371@31 {</div><div class='del'>-		compatible = "maxim,max98371";</div><div class='del'>-		reg = &lt;0x31&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/max98504.txt b/Documentation/devicetree/bindings/sound/max98504.txt<br/>deleted file mode 100644<br/>index 583ed5fdfb28..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/max98504.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max98504.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-Maxim MAX98504 class D mono speaker amplifier</div><div class='del'>-</div><div class='del'>-This device supports I2C control interface and an IRQ output signal. It features</div><div class='del'>-a PCM and PDM digital audio interface (DAI) and a differential analog input.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>- - compatible : "maxim,max98504"</div><div class='del'>- - reg : should contain the I2C slave device address</div><div class='del'>- - DVDD-supply, DIOVDD-supply, PVDD-supply: power supplies for the device,</div><div class='del'>-   as covered in ../regulator/regulator.txt</div><div class='del'>- - interrupts : should specify the interrupt line the device is connected to,</div><div class='del'>-   as described in ../interrupt-controller/interrupts.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>- - maxim,brownout-threshold - the PVDD brownout threshold, the value must be</div><div class='del'>-   from 0, 1...21 range, corresponding to 2.6V, 2.65V...3.65V voltage range</div><div class='del'>- - maxim,brownout-attenuation - the brownout attenuation to the speaker gain</div><div class='del'>-   applied during the "attack hold" and "timed hold" phase, the value must be</div><div class='del'>-   from 0...6 (dB) range</div><div class='del'>- - maxim,brownout-attack-hold-ms - the brownout attack hold phase time in ms,</div><div class='del'>-   0...255 (VBATBROWN_ATTK_HOLD, register 0x0018)</div><div class='del'>- - maxim,brownout-timed-hold-ms - the brownout timed hold phase time in ms,</div><div class='del'>-   0...255 (VBATBROWN_TIME_HOLD, register 0x0019)</div><div class='del'>- - maxim,brownout-release-rate-ms - the brownout release phase step time in ms,</div><div class='del'>-   0...255 (VBATBROWN_RELEASE, register 0x001A)</div><div class='del'>-</div><div class='del'>-The default value when the above properties are not specified is 0,</div><div class='del'>-the maxim,brownout-threshold property must be specified to actually enable</div><div class='del'>-the PVDD brownout protection.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>- max98504@31 {</div><div class='del'>-	compatible = "maxim,max98504";</div><div class='del'>-	reg = &lt;0x31&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;gpio_bank_0&gt;;</div><div class='del'>-	interrupts = &lt;2 0&gt;;</div><div class='del'>-</div><div class='del'>-	DVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	DIOVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	PVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/max9867.txt b/Documentation/devicetree/bindings/sound/max9867.txt<br/>deleted file mode 100644<br/>index b8bd914ee697..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/max9867.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/max9867.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-max9867 codec</div><div class='del'>-</div><div class='del'>-This device supports I2C mode only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : "maxim,max9867"</div><div class='del'>-- reg : The chip select number on the I2C bus</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-&amp;i2c {</div><div class='del'>-	max9867: max9867@18 {</div><div class='del'>-		compatible = "maxim,max9867";</div><div class='del'>-		reg = &lt;0x18&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max9759.txt b/Documentation/devicetree/bindings/sound/maxim,max9759.txt<br/>deleted file mode 100644<br/>index 737a996374d3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max9759.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max9759.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Maxim MAX9759 Speaker Amplifier</div><div class='del'>-===============================</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : "maxim,max9759"</div><div class='del'>-- shutdown-gpios : the gpio connected to the shutdown pin</div><div class='del'>-- mute-gpios : the gpio connected to the mute pin</div><div class='del'>-- gain-gpios : the 2 gpios connected to the g1 and g2 pins</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-max9759: analog-amplifier {</div><div class='del'>-	compatible = "maxim,max9759";</div><div class='del'>-	shutdown-gpios = &lt;&amp;gpio3 20 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	mute-gpios = &lt;&amp;gpio3 19 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	gain-gpios = &lt;&amp;gpio3 23 GPIO_ACTIVE_LOW&gt;,</div><div class='del'>-		     &lt;&amp;gpio3 25 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max9759.yaml b/Documentation/devicetree/bindings/sound/maxim,max9759.yaml<br/>new file mode 100644<br/>index 000000000000..a76ee6a635af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max9759.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max9759.yaml</a></div><div class='hunk'>@@ -0,0 +1,45 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/maxim,max9759.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim MAX9759 Speaker Amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Otabek Nazrullaev &lt;otabeknazrullaev1998@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max9759</div><div class='add'>+</div><div class='add'>+  shutdown-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: the gpio connected to the shutdown pin</div><div class='add'>+</div><div class='add'>+  mute-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: the gpio connected to the mute pin</div><div class='add'>+</div><div class='add'>+  gain-gpios:</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description: the 2 gpios connected to the g1 and g2 pins</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - shutdown-gpios</div><div class='add'>+  - mute-gpios</div><div class='add'>+  - gain-gpios</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    amplifier {</div><div class='add'>+      compatible = "maxim,max9759";</div><div class='add'>+      shutdown-gpios = &lt;&amp;gpio3 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      mute-gpios = &lt;&amp;gpio3 19 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      gain-gpios = &lt;&amp;gpio3 23 GPIO_ACTIVE_LOW&gt;,</div><div class='add'>+             &lt;&amp;gpio3 25 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98090.yaml b/Documentation/devicetree/bindings/sound/maxim,max98090.yaml<br/>new file mode 100644<br/>index 000000000000..65e4c516912f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98090.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max98090.yaml</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/maxim,max98090.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX98090/MAX98091 audio codecs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Pins on the device (for linking into audio routes):</div><div class='add'>+  MIC1, MIC2, DMICL, DMICR, IN1, IN2, IN3, IN4, IN5, IN6, IN12, IN34, IN56,</div><div class='add'>+  HPL, HPR, SPKL, SPKR, RCVL, RCVR, MICBIAS</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,max98090</div><div class='add'>+      - maxim,max98091</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: master clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  maxim,dmic-freq:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    default: 2500000</div><div class='add'>+    description:</div><div class='add'>+      DMIC clock frequency</div><div class='add'>+</div><div class='add'>+  maxim,micbias:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1, 2, 3 ]</div><div class='add'>+    default: 3</div><div class='add'>+    description: |</div><div class='add'>+      Micbias voltage applied to the analog mic, valid voltages value are:</div><div class='add'>+        0 - 2.2v</div><div class='add'>+        1 - 2.55v</div><div class='add'>+        2 - 2.4v</div><div class='add'>+        3 - 2.8v</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        audio-codec@10 {</div><div class='add'>+            compatible = "maxim,max98090";</div><div class='add'>+            reg = &lt;0x10&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpx3&gt;;</div><div class='add'>+            interrupts = &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            clocks = &lt;&amp;i2s0 0&gt;;</div><div class='add'>+            clock-names = "mclk";</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98095.yaml b/Documentation/devicetree/bindings/sound/maxim,max98095.yaml<br/>new file mode 100644<br/>index 000000000000..77544a9e1587<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98095.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max98095.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/maxim,max98095.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX98095 audio codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,max98095</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: master clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        audio-codec@11 {</div><div class='add'>+            compatible = "maxim,max98095";</div><div class='add'>+            reg = &lt;0x11&gt;;</div><div class='add'>+            clocks = &lt;&amp;i2s0 0&gt;;</div><div class='add'>+            clock-names = "mclk";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98357a.yaml b/Documentation/devicetree/bindings/sound/maxim,max98357a.yaml<br/>new file mode 100644<br/>index 000000000000..83ba8666fbb4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98357a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max98357a.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/maxim,max98357a.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX98357A/MAX98360A amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tzung-Bi Shih &lt;tzungbi@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Maxim Integrated MAX98357A/MAX98360A is a digital pulse-code modulation (PCM)</div><div class='add'>+  input Class D amplifier.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,max98357a</div><div class='add'>+      - maxim,max98360a</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  sdmode-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Chip's SD_MODE pin.  If missing the chip is always on.</div><div class='add'>+</div><div class='add'>+  sdmode-delay:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Delay time for SD_MODE pin changes intended to make I2S clocks ready</div><div class='add'>+      before SD_MODE is unmuted in order to avoid the speaker pop noise.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    amplifier {</div><div class='add'>+        compatible = "maxim,max98360a";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        sdmode-gpios = &lt;&amp;qcom_pinmux 25 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98371.yaml b/Documentation/devicetree/bindings/sound/maxim,max98371.yaml<br/>new file mode 100644<br/>index 000000000000..14fba34ef81a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98371.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max98371.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/maxim,max98371.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim MAX98371 audio codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - anish kumar &lt;yesanishhere@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max98371</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@31 {</div><div class='add'>+            compatible = "maxim,max98371";</div><div class='add'>+            reg = &lt;0x31&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98390.yaml b/Documentation/devicetree/bindings/sound/maxim,max98390.yaml<br/>index fea9a1b6619a..deaa6886c42f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98390.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98390.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98390.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max98390.yaml</a></div><div class='hunk'>@@ -29,6 +29,9 @@ properties:</div><div class='ctx'>     minimum: 1</div><div class='ctx'>     maximum: 8388607</div><div class='ctx'> </div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -37,6 +40,7 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>     i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='hunk'>@@ -45,5 +49,6 @@ examples:</div><div class='ctx'>         reg = &lt;0x38&gt;;</div><div class='ctx'>         maxim,temperature_calib = &lt;1024&gt;;</div><div class='ctx'>         maxim,r0_calib = &lt;100232&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio 9 GPIO_ACTIVE_LOW&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98504.yaml b/Documentation/devicetree/bindings/sound/maxim,max98504.yaml<br/>new file mode 100644<br/>index 000000000000..23f19a9d2c06<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98504.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max98504.yaml</a></div><div class='hunk'>@@ -0,0 +1,86 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/maxim,max98504.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX98504 class D mono speaker amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Maxim Integrated MAX98504 speaker amplifier supports I2C control interface</div><div class='add'>+  with an IRQ output signal, PCM and PDM digital audio interface (DAI) and a</div><div class='add'>+  differential analog input.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: maxim,max98504</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  DIOVDD-supply: true</div><div class='add'>+  DVDD-supply: true</div><div class='add'>+  PVDD-supply: true</div><div class='add'>+</div><div class='add'>+  maxim,brownout-threshold:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 21</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      PVDD brownout threshold, where values correspond to 2.6V, 2.65V...3.65V</div><div class='add'>+      voltage range.  Property also enables the PVDD brownout protection.</div><div class='add'>+</div><div class='add'>+  maxim,brownout-attenuation:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    maximum: 6</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      Brownout attenuation to the speaker gain applied during the "attack hold"</div><div class='add'>+      and "timed hold" phase, the value must be from 0...6 (dB) range.</div><div class='add'>+</div><div class='add'>+  maxim,brownout-attack-hold-ms:</div><div class='add'>+    maximum: 255</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      Brownout attack hold phase time in ms, VBATBROWN_ATTK_HOLD, register 0x0018.</div><div class='add'>+</div><div class='add'>+  maxim,brownout-timed-hold-ms:</div><div class='add'>+    maximum: 255</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      Brownout timed hold phase time in ms, VBATBROWN_TIME_HOLD, register 0x0019.</div><div class='add'>+</div><div class='add'>+  maxim,brownout-release-rate-ms:</div><div class='add'>+    maximum: 255</div><div class='add'>+    default: 0</div><div class='add'>+    description:</div><div class='add'>+      Brownout release phase step time in ms, VBATBROWN_RELEASE, register 0x001A.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        amplifier@31 {</div><div class='add'>+            compatible = "maxim,max98504";</div><div class='add'>+            reg = &lt;0x31&gt;;</div><div class='add'>+</div><div class='add'>+            DIOVDD-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+            DVDD-supply = &lt;&amp;ldo3_reg&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max98520.yaml b/Documentation/devicetree/bindings/sound/maxim,max98520.yaml<br/>index b6509cb2c8e0..3f88c7d61e34 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98520.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/maxim,max98520.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max98520.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max98520.yaml</a></div><div class='hunk'>@@ -33,4 +33,3 @@ examples:</div><div class='ctx'>         reg = &lt;0x38&gt;;</div><div class='ctx'>       };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/maxim,max9867.yaml b/Documentation/devicetree/bindings/sound/maxim,max9867.yaml<br/>new file mode 100644<br/>index 000000000000..0b9a84d33b6c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/maxim,max9867.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/maxim,max9867.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/maxim,max9867.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim Integrated MAX9867 CODEC</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This device supports I2C only.</div><div class='add'>+  Pins on the device (for linking into audio routes):</div><div class='add'>+      * LOUT</div><div class='add'>+      * ROUT</div><div class='add'>+      * LINL</div><div class='add'>+      * LINR</div><div class='add'>+      * MICL</div><div class='add'>+      * MICR</div><div class='add'>+      * DMICL</div><div class='add'>+      * DMICR</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Ladislav Michl &lt;ladis@linux-mips.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,max9867</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@18 {</div><div class='add'>+            compatible = "maxim,max9867";</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            reg = &lt;0x18&gt;;</div><div class='add'>+            clocks = &lt;&amp;codec_clk&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml<br/>new file mode 100644<br/>index 000000000000..82ccb32f08f2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml</a></div><div class='hunk'>@@ -0,0 +1,208 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek AFE PCM controller for mt8188</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Trevor Wu &lt;trevor.wu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8188-afe</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: audiosys</div><div class='add'>+</div><div class='add'>+  mediatek,topckgen:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of the mediatek topckgen controller</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: 26M clock</div><div class='add'>+      - description: audio pll1 clock</div><div class='add'>+      - description: audio pll2 clock</div><div class='add'>+      - description: clock divider for i2si1_mck</div><div class='add'>+      - description: clock divider for i2si2_mck</div><div class='add'>+      - description: clock divider for i2so1_mck</div><div class='add'>+      - description: clock divider for i2so2_mck</div><div class='add'>+      - description: clock divider for dptx_mck</div><div class='add'>+      - description: a1sys hoping clock</div><div class='add'>+      - description: audio intbus clock</div><div class='add'>+      - description: audio hires clock</div><div class='add'>+      - description: audio local bus clock</div><div class='add'>+      - description: mux for dptx_mck</div><div class='add'>+      - description: mux for i2so1_mck</div><div class='add'>+      - description: mux for i2so2_mck</div><div class='add'>+      - description: mux for i2si1_mck</div><div class='add'>+      - description: mux for i2si2_mck</div><div class='add'>+      - description: audio 26m clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: clk26m</div><div class='add'>+      - const: apll1</div><div class='add'>+      - const: apll2</div><div class='add'>+      - const: apll12_div0</div><div class='add'>+      - const: apll12_div1</div><div class='add'>+      - const: apll12_div2</div><div class='add'>+      - const: apll12_div3</div><div class='add'>+      - const: apll12_div9</div><div class='add'>+      - const: a1sys_hp_sel</div><div class='add'>+      - const: aud_intbus_sel</div><div class='add'>+      - const: audio_h_sel</div><div class='add'>+      - const: audio_local_bus_sel</div><div class='add'>+      - const: dptx_m_sel</div><div class='add'>+      - const: i2so1_m_sel</div><div class='add'>+      - const: i2so2_m_sel</div><div class='add'>+      - const: i2si1_m_sel</div><div class='add'>+      - const: i2si2_m_sel</div><div class='add'>+      - const: adsp_audio_26m</div><div class='add'>+</div><div class='add'>+  mediatek,etdm-in1-cowork-source:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      etdm modules can share the same external clock pin. Specify</div><div class='add'>+      which etdm clock source is required by this etdm in module.</div><div class='add'>+    enum:</div><div class='add'>+      - 1 # etdm2_in</div><div class='add'>+      - 2 # etdm1_out</div><div class='add'>+      - 3 # etdm2_out</div><div class='add'>+</div><div class='add'>+  mediatek,etdm-in2-cowork-source:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      etdm modules can share the same external clock pin. Specify</div><div class='add'>+      which etdm clock source is required by this etdm in module.</div><div class='add'>+    enum:</div><div class='add'>+      - 0 # etdm1_in</div><div class='add'>+      - 2 # etdm1_out</div><div class='add'>+      - 3 # etdm2_out</div><div class='add'>+</div><div class='add'>+  mediatek,etdm-out1-cowork-source:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      etdm modules can share the same external clock pin. Specify</div><div class='add'>+      which etdm clock source is required by this etdm out module.</div><div class='add'>+    enum:</div><div class='add'>+      - 0 # etdm1_in</div><div class='add'>+      - 1 # etdm2_in</div><div class='add'>+      - 3 # etdm2_out</div><div class='add'>+</div><div class='add'>+  mediatek,etdm-out2-cowork-source:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      etdm modules can share the same external clock pin. Specify</div><div class='add'>+      which etdm clock source is required by this etdm out module.</div><div class='add'>+    enum:</div><div class='add'>+      - 0 # etdm1_in</div><div class='add'>+      - 1 # etdm2_in</div><div class='add'>+      - 2 # etdm1_out</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^mediatek,etdm-in[1-2]-chn-disabled$":</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16</div><div class='add'>+    description:</div><div class='add'>+      This is a list of channel IDs which should be disabled.</div><div class='add'>+      By default, all data received from ETDM pins will be outputed to</div><div class='add'>+      memory. etdm in supports disable_out in direct mode(w/o interconn),</div><div class='add'>+      so user can disable the specified channels by the property.</div><div class='add'>+    uniqueItems: true</div><div class='add'>+    items:</div><div class='add'>+      minimum: 0</div><div class='add'>+      maximum: 15</div><div class='add'>+</div><div class='add'>+  "^mediatek,etdm-in[1-2]-multi-pin-mode$":</div><div class='add'>+    type: boolean</div><div class='add'>+    description: if present, the etdm data mode is I2S.</div><div class='add'>+</div><div class='add'>+  "^mediatek,etdm-out[1-3]-multi-pin-mode$":</div><div class='add'>+    type: boolean</div><div class='add'>+    description: if present, the etdm data mode is I2S.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - mediatek,topckgen</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    afe@10b10000 {</div><div class='add'>+        compatible = "mediatek,mt8188-afe";</div><div class='add'>+        reg = &lt;0x10b10000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 822 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+        resets = &lt;&amp;watchdog 14&gt;;</div><div class='add'>+        reset-names = "audiosys";</div><div class='add'>+        mediatek,topckgen = &lt;&amp;topckgen&gt;;</div><div class='add'>+        power-domains = &lt;&amp;spm 13&gt;; //MT8188_POWER_DOMAIN_AUDIO</div><div class='add'>+        mediatek,etdm-in2-cowork-source = &lt;2&gt;;</div><div class='add'>+        mediatek,etdm-out2-cowork-source = &lt;0&gt;;</div><div class='add'>+        mediatek,etdm-in1-multi-pin-mode;</div><div class='add'>+        mediatek,etdm-in1-chn-disabled = /bits/ 8 &lt;0x0 0x2&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk26m&gt;,</div><div class='add'>+                 &lt;&amp;apmixedsys 9&gt;, //CLK_APMIXED_APLL1</div><div class='add'>+                 &lt;&amp;apmixedsys 10&gt;, //CLK_APMIXED_APLL2</div><div class='add'>+                 &lt;&amp;topckgen 186&gt;, //CLK_TOP_APLL12_CK_DIV0</div><div class='add'>+                 &lt;&amp;topckgen 187&gt;, //CLK_TOP_APLL12_CK_DIV1</div><div class='add'>+                 &lt;&amp;topckgen 188&gt;, //CLK_TOP_APLL12_CK_DIV2</div><div class='add'>+                 &lt;&amp;topckgen 189&gt;, //CLK_TOP_APLL12_CK_DIV3</div><div class='add'>+                 &lt;&amp;topckgen 191&gt;, //CLK_TOP_APLL12_CK_DIV9</div><div class='add'>+                 &lt;&amp;topckgen 83&gt;, //CLK_TOP_A1SYS_HP</div><div class='add'>+                 &lt;&amp;topckgen 31&gt;, //CLK_TOP_AUD_INTBUS</div><div class='add'>+                 &lt;&amp;topckgen 32&gt;, //CLK_TOP_AUDIO_H</div><div class='add'>+                 &lt;&amp;topckgen 69&gt;, //CLK_TOP_AUDIO_LOCAL_BUS</div><div class='add'>+                 &lt;&amp;topckgen 81&gt;, //CLK_TOP_DPTX</div><div class='add'>+                 &lt;&amp;topckgen 77&gt;, //CLK_TOP_I2SO1</div><div class='add'>+                 &lt;&amp;topckgen 78&gt;, //CLK_TOP_I2SO2</div><div class='add'>+                 &lt;&amp;topckgen 79&gt;, //CLK_TOP_I2SI1</div><div class='add'>+                 &lt;&amp;topckgen 80&gt;, //CLK_TOP_I2SI2</div><div class='add'>+                 &lt;&amp;adsp_audio26m 0&gt;; //CLK_AUDIODSP_AUDIO26M</div><div class='add'>+        clock-names = "clk26m",</div><div class='add'>+                      "apll1",</div><div class='add'>+                      "apll2",</div><div class='add'>+                      "apll12_div0",</div><div class='add'>+                      "apll12_div1",</div><div class='add'>+                      "apll12_div2",</div><div class='add'>+                      "apll12_div3",</div><div class='add'>+                      "apll12_div9",</div><div class='add'>+                      "a1sys_hp_sel",</div><div class='add'>+                      "aud_intbus_sel",</div><div class='add'>+                      "audio_h_sel",</div><div class='add'>+                      "audio_local_bus_sel",</div><div class='add'>+                      "dptx_m_sel",</div><div class='add'>+                      "i2so1_m_sel",</div><div class='add'>+                      "i2so2_m_sel",</div><div class='add'>+                      "i2si1_m_sel",</div><div class='add'>+                      "i2si2_m_sel",</div><div class='add'>+                      "adsp_audio_26m";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml b/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml<br/>new file mode 100644<br/>index 000000000000..6640272b3f4f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mediatek,mt8188-mt6359.yaml</a></div><div class='hunk'>@@ -0,0 +1,97 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/mediatek,mt8188-mt6359.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek MT8188 ASoC sound card</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Trevor Wu &lt;trevor.wu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8188-mt6359-evb</div><div class='add'>+</div><div class='add'>+  model:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: User specified audio sound card name</div><div class='add'>+</div><div class='add'>+  audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the connections between audio components. Each entry is a</div><div class='add'>+      sink/source pair of strings. Valid names could be the input or output</div><div class='add'>+      widgets of audio components, power supplies, MicBias of codec and the</div><div class='add'>+      software switch.</div><div class='add'>+</div><div class='add'>+  mediatek,platform:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of MT8188 ASoC platform.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^dai-link-[0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Container for dai-link level properties and CODEC sub-nodes.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      link-name:</div><div class='add'>+        description:</div><div class='add'>+          This property corresponds to the name of the BE dai-link to which</div><div class='add'>+          we are going to update parameters in this node.</div><div class='add'>+        items:</div><div class='add'>+          enum:</div><div class='add'>+            - ADDA_BE</div><div class='add'>+            - DPTX_BE</div><div class='add'>+            - ETDM1_IN_BE</div><div class='add'>+            - ETDM2_IN_BE</div><div class='add'>+            - ETDM1_OUT_BE</div><div class='add'>+            - ETDM2_OUT_BE</div><div class='add'>+            - ETDM3_OUT_BE</div><div class='add'>+            - PCM1_BE</div><div class='add'>+</div><div class='add'>+      codec:</div><div class='add'>+        description: Holds subnode which indicates codec dai.</div><div class='add'>+        type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+        properties:</div><div class='add'>+          sound-dai:</div><div class='add'>+            minItems: 1</div><div class='add'>+            maxItems: 2</div><div class='add'>+        required:</div><div class='add'>+          - sound-dai</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - link-name</div><div class='add'>+      - codec</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - mediatek,platform</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    sound {</div><div class='add'>+        compatible = "mediatek,mt8188-mt6359-evb";</div><div class='add'>+        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;aud_pins_default&gt;;</div><div class='add'>+        audio-routing =</div><div class='add'>+            "Headphone", "Headphone L",</div><div class='add'>+            "Headphone", "Headphone R",</div><div class='add'>+            "AIN1", "Headset Mic";</div><div class='add'>+        dai-link-0 {</div><div class='add'>+            link-name = "ETDM3_OUT_BE";</div><div class='add'>+</div><div class='add'>+            codec {</div><div class='add'>+                sound-dai = &lt;&amp;hdmi0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smcc.yaml<br/>index 0481315cb5f2..651f61c7c25a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mchp,i2s-mcc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smcc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/microchip,sama7g5-i2smcc.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microchip I2S Multi-Channel Controller</div><div class='hunk'>@@ -66,13 +66,15 @@ properties:</div><div class='ctx'>     enum: [0, 1, 2, 3]</div><div class='ctx'>     default: 0</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      const: microchip,sam9x60-i2smcc</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    microchip,tdm-data-pair: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          const: microchip,sam9x60-i2smcc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        microchip,tdm-data-pair: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='hunk'>@@ -84,7 +86,7 @@ required:</div><div class='ctx'>   - dmas</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/microchip,pdmc.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml<br/>index 04414eb4ada9..9b40268537cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/microchip,pdmc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/microchip,pdmc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/microchip,sama7g5-pdmc.yaml</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/sound/microchip,pdmc.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/sound/microchip,sama7g5-pdmc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Microchip Pulse Density Microphone Controller</div><div class='hunk'>@@ -13,6 +13,9 @@ description:</div><div class='ctx'>   The Microchip Pulse Density Microphone Controller (PDMC) interfaces up to 4</div><div class='ctx'>   digital microphones having Pulse Density Modulated (PDM) outputs.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: microchip,sama7g5-pdmc</div><div class='hunk'>@@ -64,6 +67,12 @@ properties:</div><div class='ctx'>     maxItems: 4</div><div class='ctx'>     uniqueItems: true</div><div class='ctx'> </div><div class='add'>+  microchip,startup-delay-us:</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the delay in microseconds that needs to be applied after</div><div class='add'>+      enabling the PDMC microphones to avoid unwanted noise due to microphones</div><div class='add'>+      not being ready.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -75,7 +84,7 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'>   - microchip,mic-pos</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdifrx.yaml<br/>index 4a2129005c0f..2f43c684ab88 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mchp,spdifrx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdifrx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/microchip,sama7g5-spdifrx.yaml</a></div><div class='hunk'>@@ -1,16 +1,16 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/sound/mchp,spdifrx.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/sound/microchip,sama7g5-spdifrx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip S/PDIF Rx Controller Device Tree Bindings</div><div class='add'>+title: Microchip S/PDIF Rx Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Codrin Ciubotariu &lt;codrin.ciubotariu@microchip.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  The Microchip Sony/Philips Digital Interface Receiver is a serial port </div><div class='add'>+  The Microchip Sony/Philips Digital Interface Receiver is a serial port</div><div class='ctx'>   compliant with the IEC-60958 standard.</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml b/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdiftx.yaml<br/>index bdfb63387c53..4702c528700d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mchp,spdiftx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/microchip,sama7g5-spdiftx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/microchip,sama7g5-spdiftx.yaml</a></div><div class='hunk'>@@ -1,18 +1,21 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/sound/mchp,spdiftx.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/sound/microchip,sama7g5-spdiftx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip S/PDIF Tx Controller Device Tree Bindings</div><div class='add'>+title: Microchip S/PDIF Tx Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Codrin Ciubotariu &lt;codrin.ciubotariu@microchip.com&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  The Microchip Sony/Philips Digital Interface Transmitter is a serial port </div><div class='add'>+  The Microchip Sony/Philips Digital Interface Transmitter is a serial port</div><div class='ctx'>   compliant with the IEC-60958 standard.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   "#sound-dai-cells":</div><div class='ctx'>     const: 0</div><div class='hunk'>@@ -53,7 +56,7 @@ required:</div><div class='ctx'>   - dmas</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt6358.txt b/Documentation/devicetree/bindings/sound/mt6358.txt<br/>index 59a73ffdf1d3..fbe9e55c68f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt6358.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt6358.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt6358.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt6358.txt</a></div><div class='hunk'>@@ -7,7 +7,9 @@ Must be a child node of PMIC wrapper.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='del'>-- compatible : "mediatek,mt6358-sound".</div><div class='add'>+- compatible - "string" - One of:</div><div class='add'>+    "mediatek,mt6358-sound"</div><div class='add'>+    "mediatek,mt6366-sound"</div><div class='ctx'> - Avdd-supply : power source of AVDD</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt6359.yaml b/Documentation/devicetree/bindings/sound/mt6359.yaml<br/>index a54f466f769d..23d411fc4200 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt6359.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt6359.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt6359.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt6359.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/mt6359.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT6359 Codec Device Tree Bindings</div><div class='add'>+title: Mediatek MT6359 Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Eason Yen &lt;eason.yen@mediatek.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml<br/>new file mode 100644<br/>index 000000000000..7fe85b08f9df<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt8186-afe-pcm.yaml</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/mt8186-afe-pcm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek AFE PCM controller for mt8186</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jiaxin Yu &lt;jiaxin.yu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt8186-sound</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: audiosys</div><div class='add'>+</div><div class='add'>+  mediatek,apmixedsys:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of the mediatek apmixedsys controller</div><div class='add'>+</div><div class='add'>+  mediatek,infracfg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of the mediatek infracfg controller</div><div class='add'>+</div><div class='add'>+  mediatek,topckgen:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of the mediatek topckgen controller</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: audio infra sys clock</div><div class='add'>+      - description: audio infra 26M clock</div><div class='add'>+      - description: audio top mux</div><div class='add'>+      - description: audio intbus mux</div><div class='add'>+      - description: mainpll 136.5M clock</div><div class='add'>+      - description: faud1 mux</div><div class='add'>+      - description: apll1 clock</div><div class='add'>+      - description: faud2 mux</div><div class='add'>+      - description: apll2 clock</div><div class='add'>+      - description: audio engen1 mux</div><div class='add'>+      - description: apll1_d8 22.5792M clock</div><div class='add'>+      - description: audio engen2 mux</div><div class='add'>+      - description: apll2_d8 24.576M clock</div><div class='add'>+      - description: i2s0 mclk mux</div><div class='add'>+      - description: i2s1 mclk mux</div><div class='add'>+      - description: i2s2 mclk mux</div><div class='add'>+      - description: i2s4 mclk mux</div><div class='add'>+      - description: tdm mclk mux</div><div class='add'>+      - description: i2s0_mck divider</div><div class='add'>+      - description: i2s1_mck divider</div><div class='add'>+      - description: i2s2_mck divider</div><div class='add'>+      - description: i2s4_mck divider</div><div class='add'>+      - description: tdm_mck divider</div><div class='add'>+      - description: audio hires mux</div><div class='add'>+      - description: 26M clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: aud_infra_clk</div><div class='add'>+      - const: mtkaif_26m_clk</div><div class='add'>+      - const: top_mux_audio</div><div class='add'>+      - const: top_mux_audio_int</div><div class='add'>+      - const: top_mainpll_d2_d4</div><div class='add'>+      - const: top_mux_aud_1</div><div class='add'>+      - const: top_apll1_ck</div><div class='add'>+      - const: top_mux_aud_2</div><div class='add'>+      - const: top_apll2_ck</div><div class='add'>+      - const: top_mux_aud_eng1</div><div class='add'>+      - const: top_apll1_d8</div><div class='add'>+      - const: top_mux_aud_eng2</div><div class='add'>+      - const: top_apll2_d8</div><div class='add'>+      - const: top_i2s0_m_sel</div><div class='add'>+      - const: top_i2s1_m_sel</div><div class='add'>+      - const: top_i2s2_m_sel</div><div class='add'>+      - const: top_i2s4_m_sel</div><div class='add'>+      - const: top_tdm_m_sel</div><div class='add'>+      - const: top_apll12_div0</div><div class='add'>+      - const: top_apll12_div1</div><div class='add'>+      - const: top_apll12_div2</div><div class='add'>+      - const: top_apll12_div4</div><div class='add'>+      - const: top_apll12_div_tdm</div><div class='add'>+      - const: top_mux_audio_h</div><div class='add'>+      - const: top_clk26m_clk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - mediatek,apmixedsys</div><div class='add'>+  - mediatek,infracfg</div><div class='add'>+  - mediatek,topckgen</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    afe: mt8186-afe-pcm@11210000 {</div><div class='add'>+        compatible = "mediatek,mt8186-sound";</div><div class='add'>+        reg = &lt;0x11210000 0x2000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        resets = &lt;&amp;watchdog 17&gt;; //MT8186_TOPRGU_AUDIO_SW_RST</div><div class='add'>+        reset-names = "audiosys";</div><div class='add'>+        mediatek,apmixedsys = &lt;&amp;apmixedsys&gt;;</div><div class='add'>+        mediatek,infracfg = &lt;&amp;infracfg&gt;;</div><div class='add'>+        mediatek,topckgen = &lt;&amp;topckgen&gt;;</div><div class='add'>+        clocks = &lt;&amp;infracfg_ao 44&gt;, //CLK_INFRA_AO_AUDIO</div><div class='add'>+                 &lt;&amp;infracfg_ao 54&gt;, //CLK_INFRA_AO_AUDIO_26M_BCLK</div><div class='add'>+                 &lt;&amp;topckgen 15&gt;, //CLK_TOP_AUDIO</div><div class='add'>+                 &lt;&amp;topckgen 16&gt;, //CLK_TOP_AUD_INTBUS</div><div class='add'>+                 &lt;&amp;topckgen 70&gt;, //CLK_TOP_MAINPLL_D2_D4</div><div class='add'>+                 &lt;&amp;topckgen 17&gt;, //CLK_TOP_AUD_1</div><div class='add'>+                 &lt;&amp;apmixedsys 12&gt;, //CLK_APMIXED_APLL1</div><div class='add'>+                 &lt;&amp;topckgen 18&gt;, //CLK_TOP_AUD_2</div><div class='add'>+                 &lt;&amp;apmixedsys 13&gt;, //CLK_APMIXED_APLL2</div><div class='add'>+                 &lt;&amp;topckgen 19&gt;, //CLK_TOP_AUD_ENGEN1</div><div class='add'>+                 &lt;&amp;topckgen 101&gt;, //CLK_TOP_APLL1_D8</div><div class='add'>+                 &lt;&amp;topckgen 20&gt;, //CLK_TOP_AUD_ENGEN2</div><div class='add'>+                 &lt;&amp;topckgen 104&gt;, //CLK_TOP_APLL2_D8</div><div class='add'>+                 &lt;&amp;topckgen 63&gt;, //CLK_TOP_APLL_I2S0_MCK_SEL</div><div class='add'>+                 &lt;&amp;topckgen 64&gt;, //CLK_TOP_APLL_I2S1_MCK_SEL</div><div class='add'>+                 &lt;&amp;topckgen 65&gt;, //CLK_TOP_APLL_I2S2_MCK_SEL</div><div class='add'>+                 &lt;&amp;topckgen 66&gt;, //CLK_TOP_APLL_I2S4_MCK_SEL</div><div class='add'>+                 &lt;&amp;topckgen 67&gt;, //CLK_TOP_APLL_TDMOUT_MCK_SEL</div><div class='add'>+                 &lt;&amp;topckgen 131&gt;, //CLK_TOP_APLL12_CK_DIV0</div><div class='add'>+                 &lt;&amp;topckgen 132&gt;, //CLK_TOP_APLL12_CK_DIV1</div><div class='add'>+                 &lt;&amp;topckgen 133&gt;, //CLK_TOP_APLL12_CK_DIV2</div><div class='add'>+                 &lt;&amp;topckgen 134&gt;, //CLK_TOP_APLL12_CK_DIV4</div><div class='add'>+                 &lt;&amp;topckgen 135&gt;, //CLK_TOP_APLL12_CK_DIV_TDMOUT_M</div><div class='add'>+                 &lt;&amp;topckgen 44&gt;, //CLK_TOP_AUDIO_H</div><div class='add'>+                 &lt;&amp;clk26m&gt;;</div><div class='add'>+        clock-names = "aud_infra_clk",</div><div class='add'>+                      "mtkaif_26m_clk",</div><div class='add'>+                      "top_mux_audio",</div><div class='add'>+                      "top_mux_audio_int",</div><div class='add'>+                      "top_mainpll_d2_d4",</div><div class='add'>+                      "top_mux_aud_1",</div><div class='add'>+                      "top_apll1_ck",</div><div class='add'>+                      "top_mux_aud_2",</div><div class='add'>+                      "top_apll2_ck",</div><div class='add'>+                      "top_mux_aud_eng1",</div><div class='add'>+                      "top_apll1_d8",</div><div class='add'>+                      "top_mux_aud_eng2",</div><div class='add'>+                      "top_apll2_d8",</div><div class='add'>+                      "top_i2s0_m_sel",</div><div class='add'>+                      "top_i2s1_m_sel",</div><div class='add'>+                      "top_i2s2_m_sel",</div><div class='add'>+                      "top_i2s4_m_sel",</div><div class='add'>+                      "top_tdm_m_sel",</div><div class='add'>+                      "top_apll12_div0",</div><div class='add'>+                      "top_apll12_div1",</div><div class='add'>+                      "top_apll12_div2",</div><div class='add'>+                      "top_apll12_div4",</div><div class='add'>+                      "top_apll12_div_tdm",</div><div class='add'>+                      "top_mux_audio_h",</div><div class='add'>+                      "top_clk26m_clk";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml<br/>new file mode 100644<br/>index 000000000000..9853c11a1330<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt8186-mt6366-da7219-max98357.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/mt8186-mt6366-da7219-max98357.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek MT8186 with MT6366, DA7219 and MAX98357 ASoC sound card driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jiaxin Yu &lt;jiaxin.yu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This binding describes the MT8186 sound card.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8186-mt6366-da7219-max98357-sound</div><div class='add'>+</div><div class='add'>+  mediatek,platform:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of MT8186 ASoC platform.</div><div class='add'>+</div><div class='add'>+  headset-codec:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      sound-dai:</div><div class='add'>+        maxItems: 1</div><div class='add'>+    required:</div><div class='add'>+      - sound-dai</div><div class='add'>+</div><div class='add'>+  playback-codecs:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      sound-dai:</div><div class='add'>+        items:</div><div class='add'>+          - description: phandle of dp codec</div><div class='add'>+          - description: phandle of l channel speaker codec</div><div class='add'>+          - description: phandle of r channel speaker codec</div><div class='add'>+        minItems: 2</div><div class='add'>+    required:</div><div class='add'>+      - sound-dai</div><div class='add'>+</div><div class='add'>+  mediatek,adsp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of MT8186 ADSP platform.</div><div class='add'>+</div><div class='add'>+  mediatek,dai-link:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the desired dai-links in the sound card. Each entry is a</div><div class='add'>+      name defined in the machine driver.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - mediatek,platform</div><div class='add'>+  - headset-codec</div><div class='add'>+  - playback-codecs</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+</div><div class='add'>+    sound: mt8186-sound {</div><div class='add'>+        compatible = "mediatek,mt8186-mt6366-da7219-max98357-sound";</div><div class='add'>+        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+        pinctrl-names = "aud_clk_mosi_off",</div><div class='add'>+                        "aud_clk_mosi_on";</div><div class='add'>+        pinctrl-0 = &lt;&amp;aud_clk_mosi_off&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;aud_clk_mosi_on&gt;;</div><div class='add'>+</div><div class='add'>+        headset-codec {</div><div class='add'>+            sound-dai = &lt;&amp;da7219&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        playback-codecs {</div><div class='add'>+            sound-dai = &lt;&amp;anx_bridge_dp&gt;,</div><div class='add'>+                        &lt;&amp;max98357a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml b/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml<br/>new file mode 100644<br/>index 000000000000..d80083df03eb<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt8186-mt6366-rt1019-rt5682s.yaml</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/mt8186-mt6366-rt1019-rt5682s.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Mediatek MT8186 with MT6366, RT1019 and RT5682S ASoC sound card driver</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jiaxin Yu &lt;jiaxin.yu@mediatek.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  This binding describes the MT8186 sound card.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8186-mt6366-rt1019-rt5682s-sound</div><div class='add'>+      - mediatek,mt8186-mt6366-rt5682s-max98360-sound</div><div class='add'>+</div><div class='add'>+  mediatek,platform:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of MT8186 ASoC platform.</div><div class='add'>+</div><div class='add'>+  dmic-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      dmic-gpios optional prop for switching between two DMICs.</div><div class='add'>+      Ex, the GPIO can control a MUX HW component to select</div><div class='add'>+      dmic clk and data form a Front or Rear dmic.</div><div class='add'>+</div><div class='add'>+  headset-codec:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      sound-dai:</div><div class='add'>+        maxItems: 1</div><div class='add'>+    required:</div><div class='add'>+      - sound-dai</div><div class='add'>+</div><div class='add'>+  playback-codecs:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      sound-dai:</div><div class='add'>+        items:</div><div class='add'>+          - description: phandle of dp codec</div><div class='add'>+          - description: phandle of l channel speaker codec</div><div class='add'>+          - description: phandle of r channel speaker codec</div><div class='add'>+        minItems: 2</div><div class='add'>+    required:</div><div class='add'>+      - sound-dai</div><div class='add'>+</div><div class='add'>+  mediatek,adsp:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: The phandle of MT8186 ADSP platform.</div><div class='add'>+</div><div class='add'>+  mediatek,dai-link:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description:</div><div class='add'>+      A list of the desired dai-links in the sound card. Each entry is a</div><div class='add'>+      name defined in the machine driver.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - mediatek,platform</div><div class='add'>+  - headset-codec</div><div class='add'>+  - playback-codecs</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    sound: mt8186-sound {</div><div class='add'>+        compatible = "mediatek,mt8186-mt6366-rt1019-rt5682s-sound";</div><div class='add'>+        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='add'>+        pinctrl-names = "aud_clk_mosi_off",</div><div class='add'>+                        "aud_clk_mosi_on",</div><div class='add'>+                        "aud_gpio_dmic_sec";</div><div class='add'>+        pinctrl-0 = &lt;&amp;aud_clk_mosi_off&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;aud_clk_mosi_on&gt;;</div><div class='add'>+        pinctrl-2 = &lt;&amp;aud_gpio_dmic_sec&gt;;</div><div class='add'>+</div><div class='add'>+        dmic-gpios = &lt;&amp;pio 23 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        headset-codec {</div><div class='add'>+            sound-dai = &lt;&amp;rt5682s&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        playback-codecs {</div><div class='add'>+             sound-dai = &lt;&amp;it6505dptx&gt;,</div><div class='add'>+                         &lt;&amp;rt1019p&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml<br/>index 7a25bc9b8060..064ef172bef4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt8192-afe-pcm.yaml</a></div><div class='hunk'>@@ -24,15 +24,15 @@ properties:</div><div class='ctx'>     const: audiosys</div><div class='ctx'> </div><div class='ctx'>   mediatek,apmixedsys:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of the mediatek apmixedsys controller</div><div class='ctx'> </div><div class='ctx'>   mediatek,infracfg:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of the mediatek infracfg controller</div><div class='ctx'> </div><div class='ctx'>   mediatek,topckgen:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of the mediatek topckgen controller</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml b/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml<br/>index 5a5b765b859a..7e50f5d65c8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt8192-mt6359-rt1015-rt5682.yaml</a></div><div class='hunk'>@@ -18,20 +18,46 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - mediatek,mt8192_mt6359_rt1015_rt5682</div><div class='ctx'>       - mediatek,mt8192_mt6359_rt1015p_rt5682</div><div class='add'>+      - mediatek,mt8192_mt6359_rt1015p_rt5682s</div><div class='ctx'> </div><div class='ctx'>   mediatek,platform:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8192 ASoC platform.</div><div class='ctx'> </div><div class='ctx'>   mediatek,hdmi-codec:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of HDMI codec.</div><div class='ctx'> </div><div class='add'>+  headset-codec:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      sound-dai:</div><div class='add'>+        maxItems: 1</div><div class='add'>+    required:</div><div class='add'>+      - sound-dai</div><div class='add'>+</div><div class='add'>+  speaker-codecs:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      sound-dai:</div><div class='add'>+        minItems: 1</div><div class='add'>+        maxItems: 2</div><div class='add'>+        items:</div><div class='add'>+          maxItems: 1</div><div class='add'>+    required:</div><div class='add'>+      - sound-dai</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - mediatek,platform</div><div class='add'>+  - headset-codec</div><div class='add'>+  - speaker-codecs</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -44,6 +70,15 @@ examples:</div><div class='ctx'>                         "aud_clk_mosi_on";</div><div class='ctx'>         pinctrl-0 = &lt;&amp;aud_clk_mosi_off&gt;;</div><div class='ctx'>         pinctrl-1 = &lt;&amp;aud_clk_mosi_on&gt;;</div><div class='add'>+</div><div class='add'>+        headset-codec {</div><div class='add'>+            sound-dai = &lt;&amp;rt5682&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        speaker-codecs {</div><div class='add'>+            sound-dai = &lt;&amp;rt1015_l&gt;,</div><div class='add'>+                        &lt;&amp;rt1015_r&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml b/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml<br/>index 4452a4070eff..d5adf07d46e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt8195-afe-pcm.yaml</a></div><div class='hunk'>@@ -32,7 +32,7 @@ properties:</div><div class='ctx'>       See ../reserved-memory/reserved-memory.txt for details.</div><div class='ctx'> </div><div class='ctx'>   mediatek,topckgen:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of the mediatek topckgen controller</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1011-rt5682.yaml b/Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1011-rt5682.yaml<br/>deleted file mode 100644<br/>index cf6ad7933e23..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1011-rt5682.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1011-rt5682.yaml</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-%YAML 1.2</div><div class='del'>----</div><div class='del'>-$id: http://devicetree.org/schemas/sound/mt8195-mt6359-rt1011-rt5682.yaml#</div><div class='del'>-$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='del'>-</div><div class='del'>-title: Mediatek MT8195 with MT6359, RT1011 and RT5682 ASoC sound card driver</div><div class='del'>-</div><div class='del'>-maintainers:</div><div class='del'>-  - Trevor Wu &lt;trevor.wu@mediatek.com&gt;</div><div class='del'>-</div><div class='del'>-description:</div><div class='del'>-  This binding describes the MT8195 sound card with RT1011 and RT5682.</div><div class='del'>-</div><div class='del'>-properties:</div><div class='del'>-  compatible:</div><div class='del'>-    const: mediatek,mt8195_mt6359_rt1011_rt5682</div><div class='del'>-</div><div class='del'>-  model:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/string</div><div class='del'>-    description: User specified audio sound card name</div><div class='del'>-</div><div class='del'>-  mediatek,platform:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='del'>-    description: The phandle of MT8195 ASoC platform.</div><div class='del'>-</div><div class='del'>-  mediatek,dptx-codec:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='del'>-    description: The phandle of MT8195 Display Port Tx codec node.</div><div class='del'>-</div><div class='del'>-  mediatek,hdmi-codec:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='del'>-    description: The phandle of MT8195 HDMI codec node.</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='del'>-</div><div class='del'>-required:</div><div class='del'>-  - compatible</div><div class='del'>-  - mediatek,platform</div><div class='del'>-</div><div class='del'>-examples:</div><div class='del'>-  - |</div><div class='del'>-</div><div class='del'>-    sound: mt8195-sound {</div><div class='del'>-        compatible = "mediatek,mt8195_mt6359_rt1011_rt5682";</div><div class='del'>-        mediatek,platform = &lt;&amp;afe&gt;;</div><div class='del'>-        pinctrl-names = "default";</div><div class='del'>-        pinctrl-0 = &lt;&amp;aud_pins_default&gt;;</div><div class='del'>-    };</div><div class='del'>-</div><div class='del'>-...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml b/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml<br/>index 8f177e02ad35..c1ddbf672ca3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mt8195-mt6359-rt1019-rt5682.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mt8195-mt6359.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: http://devicetree.org/schemas/sound/mt8195-mt6359-rt1019-rt5682.yaml#</div><div class='add'>+$id: http://devicetree.org/schemas/sound/mt8195-mt6359.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT8195 with MT6359, RT1019 and RT5682 ASoC sound card driver</div><div class='add'>+title: MediaTek MT8195 ASoC sound card driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Trevor Wu &lt;trevor.wu@mediatek.com&gt;</div><div class='hunk'>@@ -14,26 +14,29 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: mediatek,mt8195_mt6359_rt1019_rt5682</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8195_mt6359_rt1019_rt5682</div><div class='add'>+      - mediatek,mt8195_mt6359_rt1011_rt5682</div><div class='add'>+      - mediatek,mt8195_mt6359_max98390_rt5682</div><div class='ctx'> </div><div class='ctx'>   model:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     description: User specified audio sound card name</div><div class='ctx'> </div><div class='ctx'>   mediatek,platform:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8195 ASoC platform.</div><div class='ctx'> </div><div class='ctx'>   mediatek,dptx-codec:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8195 Display Port Tx codec node.</div><div class='ctx'> </div><div class='ctx'>   mediatek,hdmi-codec:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8195 HDMI codec node.</div><div class='ctx'> </div><div class='ctx'>   mediatek,adsp:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: The phandle of MT8195 ADSP platform.</div><div class='ctx'> </div><div class='ctx'>   mediatek,dai-link:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/mvebu-audio.txt b/Documentation/devicetree/bindings/sound/mvebu-audio.txt<br/>index cb8c07c81ce4..4f5dec5cb3c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mvebu-audio.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/mvebu-audio.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/mvebu-audio.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/mvebu-audio.txt</a></div><div class='hunk'>@@ -6,9 +6,14 @@ Required properties:</div><div class='ctx'>   "marvell,kirkwood-audio" for Kirkwood platforms</div><div class='ctx'>   "marvell,dove-audio" for Dove platforms</div><div class='ctx'>   "marvell,armada370-audio" for Armada 370 platforms</div><div class='add'>+  "marvell,armada-380-audio" for Armada 38x platforms</div><div class='ctx'> </div><div class='ctx'> - reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='add'>+  region (named "i2s_regs").</div><div class='add'>+  With "marvell,armada-380-audio" two other regions are required:</div><div class='add'>+  first of those is dedicated for Audio PLL Configuration registers</div><div class='add'>+  (named "pll_regs") and the second one ("soc_ctrl") - for register</div><div class='add'>+  where one of exceptive I/O types (I2S or S/PDIF) is set.</div><div class='ctx'> </div><div class='ctx'> - interrupts:</div><div class='ctx'>   with "marvell,kirkwood-audio", the audio interrupt</div><div class='hunk'>@@ -23,6 +28,13 @@ Required properties:</div><div class='ctx'> 	"internal" for the internal clock</div><div class='ctx'> 	"extclk" for the external clock</div><div class='ctx'> </div><div class='add'>+Optional properties:</div><div class='add'>+</div><div class='add'>+- spdif-mode:</div><div class='add'>+  Enable S/PDIF mode on Armada 38x SoC. Using this property</div><div class='add'>+  disables standard I2S I/O. Valid only with "marvell,armada-380-audio"</div><div class='add'>+  compatible string.</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> i2s1: audio-controller@b4000 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nau8315.txt b/Documentation/devicetree/bindings/sound/nau8315.txt<br/>index 6eaec46f384c..1cd94517d45e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nau8315.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8315.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nau8315.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nau8315.txt</a></div><div class='hunk'>@@ -2,6 +2,7 @@ Nuvoton NAU8315 Mono Class-D Amplifier</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible   : "nuvoton,nau8315"</div><div class='add'>+                 "nuvoton,nau8318"</div><div class='ctx'> </div><div class='ctx'> Optional properties:</div><div class='ctx'> - enable-gpios : GPIO specifier for the chip's device enable input(EN) pin.</div><div class='hunk'>@@ -16,3 +17,8 @@ nau8315 {</div><div class='ctx'> 	compatible = "nuvoton,nau8315";</div><div class='ctx'> 	enable-gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='ctx'> };</div><div class='add'>+</div><div class='add'>+nau8318 {</div><div class='add'>+	compatible = "nuvoton,nau8318";</div><div class='add'>+	enable-gpios = &lt;&amp;gpio1 5 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nau8821.txt b/Documentation/devicetree/bindings/sound/nau8821.txt<br/>index 6c3baf7a5f21..7c84e7c7327a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nau8821.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8821.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nau8821.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nau8821.txt</a></div><div class='hunk'>@@ -34,7 +34,7 @@ Optional properties:</div><div class='ctx'>   - nuvoton,jack-eject-debounce: number from 0 to 7 that sets debounce time to 2^(n+2) ms</div><div class='ctx'> </div><div class='ctx'>   - nuvoton,dmic-clk-threshold: the ADC threshold of DMIC clock.</div><div class='del'>-</div><div class='add'>+  - nuvoton,key_enable: Headset button detection switch.</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nau8822.txt b/Documentation/devicetree/bindings/sound/nau8822.txt<br/>deleted file mode 100644<br/>index a471d162d4e5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nau8822.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8822.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-NAU8822 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports I2C only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "nuvoton,nau8822"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-codec: nau8822@1a {</div><div class='del'>-	compatible = "nuvoton,nau8822";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nau8825.txt b/Documentation/devicetree/bindings/sound/nau8825.txt<br/>index 388a7bc60b1f..a9c34526f4cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nau8825.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nau8825.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nau8825.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nau8825.txt</a></div><div class='hunk'>@@ -71,6 +71,12 @@ Optional properties:</div><div class='ctx'> </div><div class='ctx'>   - nuvoton,crosstalk-enable: make crosstalk function enable if set.</div><div class='ctx'> </div><div class='add'>+  - nuvoton,adcout-drive-strong: make the drive strength of ADCOUT IO PIN strong if set.</div><div class='add'>+      Otherwise, the drive keeps normal strength.</div><div class='add'>+</div><div class='add'>+  - nuvoton,adc-delay-ms: Delay (in ms) to make input path stable and avoid pop noise. The</div><div class='add'>+      default value is 125 and range between 125 to 500 ms.</div><div class='add'>+</div><div class='ctx'>   - clocks: list of phandle and clock specifier pairs according to common clock bindings for the</div><div class='ctx'>       clocks described in clock-names</div><div class='ctx'>   - clock-names: should include "mclk" for the MCLK master clock</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml b/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml<br/>new file mode 100644<br/>index 000000000000..65105402a53d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nuvoton,nau8822.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nuvoton,nau8822.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NAU8822 audio CODEC</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  24 bit stereo audio codec with speaker driver.</div><div class='add'>+  This device supports I2C/SPI.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - David Lin &lt;CTLIN0@nuvoton.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nuvoton,nau8822</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nuvoton,spk-btl:</div><div class='add'>+    description:</div><div class='add'>+      If set, configure the two loudspeaker outputs as a Bridge Tied Load output</div><div class='add'>+      to drive a high power external loudspeaker.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "nuvoton,nau8822";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml<br/>index 7ef774910e5c..96f2f927a6f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.yaml</a></div><div class='hunk'>@@ -31,10 +31,10 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headset Stereophone"</div><div class='del'>-        - "Int Spk"</div><div class='del'>-        - "Headset Mic"</div><div class='del'>-        - "Digital Mic"</div><div class='add'>+        - Headset Stereophone</div><div class='add'>+        - Int Spk</div><div class='add'>+        - Headset Mic</div><div class='add'>+        - Digital Mic</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - SPKOUT</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml<br/>index 82801b4f46dd..7c1e9895ce85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-common.yaml</a></div><div class='hunk'>@@ -80,4 +80,8 @@ properties:</div><div class='ctx'>     type: boolean</div><div class='ctx'>     description: The Mic Jack represents state of the headset microphone pin</div><div class='ctx'> </div><div class='add'>+  nvidia,coupled-mic-hp-det:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: The Mic detect GPIO is viable only if HP detect GPIO is active</div><div class='add'>+</div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml<br/>new file mode 100644<br/>index 000000000000..fc89dbd6bf24<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max9808x.yaml</a></div><div class='hunk'>@@ -0,0 +1,90 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-max9808x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra audio complex with MAX9808x CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvidia,tegra-audio-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - pattern: '^[a-z0-9]+,tegra-audio-max98088(-[a-z0-9]+)+$'</div><div class='add'>+          - const: nvidia,tegra-audio-max98088</div><div class='add'>+      - items:</div><div class='add'>+          - pattern: '^[a-z0-9]+,tegra-audio-max98089(-[a-z0-9]+)+$'</div><div class='add'>+          - const: nvidia,tegra-audio-max98089</div><div class='add'>+</div><div class='add'>+  nvidia,audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description: |</div><div class='add'>+      A list of the connections between audio components.</div><div class='add'>+      Each entry is a pair of strings, the first being the connection's sink,</div><div class='add'>+      the second being the connection's source. Valid names for sources and</div><div class='add'>+      sinks are the pins (documented in the binding document),</div><div class='add'>+      and the jacks on the board.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        # Board Connectors</div><div class='add'>+        - "Int Spk"</div><div class='add'>+        - "Headphone Jack"</div><div class='add'>+        - "Earpiece"</div><div class='add'>+        - "Headset Mic"</div><div class='add'>+        - "Internal Mic 1"</div><div class='add'>+        - "Internal Mic 2"</div><div class='add'>+</div><div class='add'>+        # CODEC Pins</div><div class='add'>+        - HPL</div><div class='add'>+        - HPR</div><div class='add'>+        - SPKL</div><div class='add'>+        - SPKR</div><div class='add'>+        - RECL</div><div class='add'>+        - RECR</div><div class='add'>+        - INA1</div><div class='add'>+        - INA2</div><div class='add'>+        - INB1</div><div class='add'>+        - INB2</div><div class='add'>+        - MIC1</div><div class='add'>+        - MIC2</div><div class='add'>+        - MICBIAS</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra30-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/soc/tegra-pmc.h&gt;</div><div class='add'>+    sound {</div><div class='add'>+        compatible = "lge,tegra-audio-max98089-p895",</div><div class='add'>+                     "nvidia,tegra-audio-max98089";</div><div class='add'>+        nvidia,model = "LG Optimus Vu MAX98089";</div><div class='add'>+</div><div class='add'>+        nvidia,audio-routing =</div><div class='add'>+            "Headphone Jack", "HPL",</div><div class='add'>+            "Headphone Jack", "HPR",</div><div class='add'>+            "Int Spk", "SPKL",</div><div class='add'>+            "Int Spk", "SPKR",</div><div class='add'>+            "Earpiece", "RECL",</div><div class='add'>+            "Earpiece", "RECR",</div><div class='add'>+            "INA1", "Headset Mic",</div><div class='add'>+            "MIC1", "MICBIAS",</div><div class='add'>+            "MICBIAS", "Internal Mic 1",</div><div class='add'>+            "MIC2", "Internal Mic 2";</div><div class='add'>+</div><div class='add'>+        nvidia,i2s-controller = &lt;&amp;tegra_i2s0&gt;;</div><div class='add'>+        nvidia,audio-codec = &lt;&amp;codec&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA30_CLK_PLL_A&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA30_CLK_PLL_A_OUT0&gt;,</div><div class='add'>+                 &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+        clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml<br/>index ccc2ee77ca30..4d912458b18b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-max98090.yaml</a></div><div class='hunk'>@@ -38,10 +38,10 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headphones"</div><div class='del'>-        - "Speakers"</div><div class='del'>-        - "Mic Jack"</div><div class='del'>-        - "Int Mic"</div><div class='add'>+        - Headphones</div><div class='add'>+        - Speakers</div><div class='add'>+        - Mic Jack</div><div class='add'>+        - Int Mic</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - MIC1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml<br/>new file mode 100644<br/>index 000000000000..a04487002e88<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5631.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5631.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra audio complex with RT5631 CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: nvidia,tegra-audio-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - pattern: '^[a-z0-9]+,tegra-audio-rt5631(-[a-z0-9]+)+$'</div><div class='add'>+      - const: nvidia,tegra-audio-rt5631</div><div class='add'>+</div><div class='add'>+  nvidia,audio-routing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='add'>+    description: |</div><div class='add'>+      A list of the connections between audio components.</div><div class='add'>+      Each entry is a pair of strings, the first being the connection's sink,</div><div class='add'>+      the second being the connection's source. Valid names for sources and</div><div class='add'>+      sinks are the pins (documented in the binding document),</div><div class='add'>+      and the jacks on the board.</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        # Board Connectors</div><div class='add'>+        - "Int Spk"</div><div class='add'>+        - "Headphone Jack"</div><div class='add'>+        - "Mic Jack"</div><div class='add'>+        - "Int Mic"</div><div class='add'>+</div><div class='add'>+        # CODEC Pins</div><div class='add'>+        - MIC1</div><div class='add'>+        - MIC2</div><div class='add'>+        - AXIL</div><div class='add'>+        - AXIR</div><div class='add'>+        - MONOIN_RXN</div><div class='add'>+        - MONOIN_RXP</div><div class='add'>+        - DMIC</div><div class='add'>+        - MIC Bias1</div><div class='add'>+        - MIC Bias2</div><div class='add'>+        - MONO_IN</div><div class='add'>+        - AUXO1</div><div class='add'>+        - AUXO2</div><div class='add'>+        - SPOL</div><div class='add'>+        - SPOR</div><div class='add'>+        - HPOL</div><div class='add'>+        - HPOR</div><div class='add'>+        - MONO</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra30-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/soc/tegra-pmc.h&gt;</div><div class='add'>+    sound {</div><div class='add'>+        compatible = "asus,tegra-audio-rt5631-tf700t",</div><div class='add'>+                     "nvidia,tegra-audio-rt5631";</div><div class='add'>+        nvidia,model = "Asus Transformer Infinity TF700T RT5631";</div><div class='add'>+</div><div class='add'>+        nvidia,audio-routing =</div><div class='add'>+                "Headphone Jack", "HPOL",</div><div class='add'>+                "Headphone Jack", "HPOR",</div><div class='add'>+                "Int Spk", "SPOL",</div><div class='add'>+                "Int Spk", "SPOR",</div><div class='add'>+                "MIC1", "MIC Bias1",</div><div class='add'>+                "MIC Bias1", "Mic Jack",</div><div class='add'>+                "DMIC", "Int Mic";</div><div class='add'>+</div><div class='add'>+        nvidia,i2s-controller = &lt;&amp;tegra_i2s1&gt;;</div><div class='add'>+        nvidia,audio-codec = &lt;&amp;rt5631&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA30_CLK_PLL_A&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA30_CLK_PLL_A_OUT0&gt;,</div><div class='add'>+                 &lt;&amp;tegra_pmc TEGRA_PMC_CLK_OUT_1&gt;;</div><div class='add'>+        clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml<br/>index e768fb0e9a59..2638592435b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5640.yaml</a></div><div class='hunk'>@@ -31,9 +31,9 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headphones"</div><div class='del'>-        - "Speakers"</div><div class='del'>-        - "Mic Jack"</div><div class='add'>+        - Headphones</div><div class='add'>+        - Speakers</div><div class='add'>+        - Mic Jack</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - DMIC1</div><div class='hunk'>@@ -82,4 +82,3 @@ examples:</div><div class='ctx'>         clocks = &lt;&amp;clk 216&gt;, &lt;&amp;clk 217&gt;, &lt;&amp;clk 120&gt;;</div><div class='ctx'>         clock-names = "pll_a", "pll_a_out0", "mclk";</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml<br/>index a49997d6028b..09e1d0b18d27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-rt5677.yaml</a></div><div class='hunk'>@@ -31,11 +31,11 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headphone"</div><div class='del'>-        - "Speaker"</div><div class='del'>-        - "Headset Mic"</div><div class='del'>-        - "Internal Mic 1"</div><div class='del'>-        - "Internal Mic 2"</div><div class='add'>+        - Headphone</div><div class='add'>+        - Speaker</div><div class='add'>+        - Headset Mic</div><div class='add'>+        - Internal Mic 1</div><div class='add'>+        - Internal Mic 2</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - IN1P</div><div class='hunk'>@@ -47,14 +47,14 @@ properties:</div><div class='ctx'>         - DMIC2</div><div class='ctx'>         - DMIC3</div><div class='ctx'>         - DMIC4</div><div class='del'>-        - "DMIC L1"</div><div class='del'>-        - "DMIC L2"</div><div class='del'>-        - "DMIC L3"</div><div class='del'>-        - "DMIC L4"</div><div class='del'>-        - "DMIC R1"</div><div class='del'>-        - "DMIC R2"</div><div class='del'>-        - "DMIC R3"</div><div class='del'>-        - "DMIC R4"</div><div class='add'>+        - DMIC L1</div><div class='add'>+        - DMIC L2</div><div class='add'>+        - DMIC L3</div><div class='add'>+        - DMIC L4</div><div class='add'>+        - DMIC R1</div><div class='add'>+        - DMIC R2</div><div class='add'>+        - DMIC R3</div><div class='add'>+        - DMIC R4</div><div class='ctx'>         - LOUT1</div><div class='ctx'>         - LOUT2</div><div class='ctx'>         - LOUT3</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml<br/>index 943e7c01741c..e5bc6a6ade24 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-sgtl5000.yaml</a></div><div class='hunk'>@@ -31,9 +31,9 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headphone Jack"</div><div class='del'>-        - "Line In Jack"</div><div class='del'>-        - "Mic Jack"</div><div class='add'>+        - Headphone Jack</div><div class='add'>+        - Line In Jack</div><div class='add'>+        - Mic Jack</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - HP_OUT</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml<br/>index a5b431d7d0c2..3323d6a438f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.yaml</a></div><div class='hunk'>@@ -31,8 +31,8 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headphone Jack"</div><div class='del'>-        - "Mic Jack"</div><div class='add'>+        - Headphone Jack</div><div class='add'>+        - Mic Jack</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - LOUT1</div><div class='hunk'>@@ -53,7 +53,7 @@ properties:</div><div class='ctx'>         - MIC1</div><div class='ctx'>         - MIC2N</div><div class='ctx'>         - MIC2</div><div class='del'>-        - "Mic Bias"</div><div class='add'>+        - Mic Bias</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - nvidia,i2s-controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml<br/>index 1b836acab980..1be25ce4514b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.yaml</a></div><div class='hunk'>@@ -35,10 +35,10 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headphone Jack"</div><div class='del'>-        - "Int Spk"</div><div class='del'>-        - "Mic Jack"</div><div class='del'>-        - "Int Mic"</div><div class='add'>+        - Headphone Jack</div><div class='add'>+        - Int Spk</div><div class='add'>+        - Mic Jack</div><div class='add'>+        - Int Mic</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - IN1L</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml<br/>index a1448283344b..397306b8800d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm9712.yaml</a></div><div class='hunk'>@@ -31,9 +31,9 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       enum:</div><div class='ctx'>         # Board Connectors</div><div class='del'>-        - "Headphone"</div><div class='del'>-        - "LineIn"</div><div class='del'>-        - "Mic"</div><div class='add'>+        - Headphone</div><div class='add'>+        - LineIn</div><div class='add'>+        - Mic</div><div class='ctx'> </div><div class='ctx'>         # CODEC Pins</div><div class='ctx'>         - MONOOUT</div><div class='hunk'>@@ -48,7 +48,7 @@ properties:</div><div class='ctx'>         - PCBEEP</div><div class='ctx'>         - MIC1</div><div class='ctx'>         - MIC2</div><div class='del'>-        - "Mic Bias"</div><div class='add'>+        - Mic Bias</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - nvidia,ac97-controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml<br/>new file mode 100644<br/>index 000000000000..e15f387c4c29<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra186-asrc.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra186-asrc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Tegra186 ASRC</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Asynchronous Sample Rate Converter (ASRC) converts the sampling frequency</div><div class='add'>+  of the input signal from one frequency to another. It can handle over a</div><div class='add'>+  wide range of sample rate ratios (freq_in/freq_out) from 1:24 to 24:1.</div><div class='add'>+  ASRC has two modes of operation. One where ratio can be programmed in SW</div><div class='add'>+  and the other where it gets the information from ratio estimator module.</div><div class='add'>+</div><div class='add'>+  It supports  sample rate conversions in the range of 8 to 192 kHz and</div><div class='add'>+  supports 6 streams upto 12 total channels. The input data size can be</div><div class='add'>+  16, 24 and 32 bits.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Mohan Kumar &lt;mkumard@nvidia.com&gt;</div><div class='add'>+  - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^asrc@[0-9a-f]*$"</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra186-asrc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra234-asrc</div><div class='add'>+              - nvidia,tegra194-asrc</div><div class='add'>+          - const: nvidia,tegra186-asrc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  sound-name-prefix:</div><div class='add'>+    pattern: "^ASRC[1-9]$"</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    description: |</div><div class='add'>+      ASRC has seven input ports and six output ports. Accordingly ACIF</div><div class='add'>+      (Audio Client Interfaces) port nodes are defined to represent the</div><div class='add'>+      ASRC inputs (port 0 to 6) and outputs (port 7 to 12). These are</div><div class='add'>+      connected to corresponding ports on AHUB (Audio Hub). Additional</div><div class='add'>+      input (port 6) is for receiving ratio information from estimator.</div><div class='add'>+</div><div class='add'>+    patternProperties:</div><div class='add'>+      '^port@[0-6]':</div><div class='add'>+        $ref: audio-graph-port.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: ASRC ACIF input ports</div><div class='add'>+      '^port@[7-9]|1[1-2]':</div><div class='add'>+        $ref: audio-graph-port.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description: ASRC ACIF output ports</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+</div><div class='add'>+    asrc@2910000 {</div><div class='add'>+        compatible = "nvidia,tegra186-asrc";</div><div class='add'>+        reg = &lt;0x2910000 0x2000&gt;;</div><div class='add'>+        sound-name-prefix = "ASRC1";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml<br/>index 73b98b2f3543..e1362c77472b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra186-dspk.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra186-dspk.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra186 DSPK Controller Device Tree Bindings</div><div class='add'>+title: Tegra186 DSPK Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Digital Speaker Controller (DSPK) can be viewed as a Pulse</div><div class='hunk'>@@ -18,7 +18,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml<br/>index 60a368a132b8..dc76a4dc0ed2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml</a></div><div class='hunk'>@@ -16,6 +16,9 @@ maintainers:</div><div class='ctx'>   - Thierry Reding &lt;treding@nvidia.com&gt;</div><div class='ctx'>   - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: nvidia,tegra20-spdif</div><div class='hunk'>@@ -66,7 +69,7 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml<br/>index 372043edd98f..15ab40aeab1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 ADMAIF Device Tree Bindings</div><div class='add'>+title: Tegra210 ADMAIF</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   ADMAIF is the interface between ADMA and AHUB. Each ADMA channel</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml<br/>index 8d8dc7fb3f0c..e4c871797fa6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-adx.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-adx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 ADX Device Tree Bindings</div><div class='add'>+title: Tegra210 ADX</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Audio Demultiplexer (ADX) block takes an input stream with up to</div><div class='hunk'>@@ -19,7 +19,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml<br/>index 4727f1e42c53..c4abac81f207 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ahub.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 AHUB Device Tree Bindings</div><div class='add'>+title: Tegra210 AHUB</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Audio Hub (AHUB) comprises a collection of hardware accelerators</div><div class='hunk'>@@ -50,10 +50,10 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   "#address-cells":</div><div class='del'>-    const: 1</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='ctx'> </div><div class='ctx'>   "#size-cells":</div><div class='del'>-    const: 1</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='ctx'> </div><div class='ctx'>   ranges: true</div><div class='ctx'> </div><div class='hunk'>@@ -106,6 +106,14 @@ patternProperties:</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: nvidia,tegra210-mixer.yaml#</div><div class='ctx'> </div><div class='add'>+  '^asrc@[0-9a-f]+$':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: nvidia,tegra186-asrc.yaml#</div><div class='add'>+</div><div class='add'>+  '^processing-engine@[0-9a-f]+$':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: nvidia,tegra210-ope.yaml#</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml<br/>index f9e4fc6e0c47..021b72546ba4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-amx.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-amx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 AMX Device Tree Bindings</div><div class='add'>+title: Tegra210 AMX</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Audio Multiplexer (AMX) block can multiplex up to four input streams</div><div class='hunk'>@@ -18,7 +18,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml<br/>index bcb496d3ace5..bff551c35da7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-dmic.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-dmic.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 DMIC Controller Device Tree Bindings</div><div class='add'>+title: Tegra210 DMIC Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Digital MIC (DMIC) Controller is used to interface with Pulse</div><div class='hunk'>@@ -17,7 +17,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml<br/>index 6188f561f878..a82f11fb6c9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-i2s.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 I2S Controller Device Tree Bindings</div><div class='add'>+title: Tegra210 I2S Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Inter-IC Sound (I2S) controller implements full-duplex,</div><div class='hunk'>@@ -17,7 +17,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml<br/>new file mode 100644<br/>index 000000000000..5b9198602fc6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mbdrc.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra210-mbdrc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Tegra210 MBDRC</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Multi Band Dynamic Range Compressor (MBDRC) is part of Output</div><div class='add'>+  Processing Engine (OPE) which interfaces with Audio Hub (AHUB) via</div><div class='add'>+  Audio Client Interface (ACIF). MBDRC can be used as a traditional</div><div class='add'>+  single full band or a dual band or a multi band dynamic processor.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Mohan Kumar &lt;mkumard@nvidia.com&gt;</div><div class='add'>+  - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra210-mbdrc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra234-mbdrc</div><div class='add'>+              - nvidia,tegra194-mbdrc</div><div class='add'>+              - nvidia,tegra186-mbdrc</div><div class='add'>+          - const: nvidia,tegra210-mbdrc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    dynamic-range-compressor@702d8200 {</div><div class='add'>+        compatible = "nvidia,tegra210-mbdrc";</div><div class='add'>+        reg = &lt;0x702d8200 0x200&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml<br/>index ee1e1d2da79a..049898f02e85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mixer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mixer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 Mixer Device Tree Bindings</div><div class='add'>+title: Tegra210 Mixer</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Mixer supports mixing of up to ten 7.1 audio input streams and</div><div class='hunk'>@@ -17,7 +17,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml<br/>index c9888c553e78..d0280d8aa3af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-mvc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-mvc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 MVC Device Tree Bindings</div><div class='add'>+title: Tegra210 MVC</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Master Volume Control (MVC) provides gain or attenuation to a digital</div><div class='hunk'>@@ -20,7 +20,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml<br/>new file mode 100644<br/>index 000000000000..9017fb6d575d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-ope.yaml</a></div><div class='hunk'>@@ -0,0 +1,87 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ope.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Tegra210 OPE</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Output Processing Engine (OPE) is one of the AHUB client. It has</div><div class='add'>+  PEQ (Parametric Equalizer) and MBDRC (Multi Band Dynamic Range Compressor)</div><div class='add'>+  sub blocks for data processing.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Mohan Kumar &lt;mkumard@nvidia.com&gt;</div><div class='add'>+  - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra210-ope</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra234-ope</div><div class='add'>+              - nvidia,tegra194-ope</div><div class='add'>+              - nvidia,tegra186-ope</div><div class='add'>+          - const: nvidia,tegra210-ope</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  sound-name-prefix:</div><div class='add'>+    pattern: "^OPE[1-9]$"</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: audio-graph-port.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description:</div><div class='add'>+          OPE ACIF (Audio Client Interface) input port. This is connected</div><div class='add'>+          to corresponding ACIF output port on AHUB (Audio Hub).</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: audio-graph-port.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+        description:</div><div class='add'>+          OPE ACIF output port. This is connected to corresponding ACIF</div><div class='add'>+          input port on AHUB.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^equalizer@[0-9a-f]+$':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: nvidia,tegra210-peq.yaml#</div><div class='add'>+</div><div class='add'>+  '^dynamic-range-compressor@[0-9a-f]+$':</div><div class='add'>+    type: object</div><div class='add'>+    $ref: nvidia,tegra210-mbdrc.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    processing-engine@702d8000 {</div><div class='add'>+        compatible = "nvidia,tegra210-ope";</div><div class='add'>+        reg = &lt;0x702d8000 0x100&gt;;</div><div class='add'>+        sound-name-prefix = "OPE1";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml<br/>new file mode 100644<br/>index 000000000000..1e373c49d639<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-peq.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/nvidia,tegra210-peq.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Tegra210 PEQ</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Parametric Equalizer (PEQ) is a cascade of biquad filters with</div><div class='add'>+  each filter tuned based on certain parameters. It can be used to</div><div class='add'>+  equalize the irregularities in the speaker frequency response.</div><div class='add'>+  PEQ sits inside Output Processing Engine (OPE) which interfaces</div><div class='add'>+  with Audio Hub (AHUB) via Audio Client Interface (ACIF).</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+  - Mohan Kumar &lt;mkumard@nvidia.com&gt;</div><div class='add'>+  - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra210-peq</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra234-peq</div><div class='add'>+              - nvidia,tegra194-peq</div><div class='add'>+              - nvidia,tegra186-peq</div><div class='add'>+          - const: nvidia,tegra210-peq</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    equalizer@702d8100 {</div><div class='add'>+        compatible = "nvidia,tegra210-peq";</div><div class='add'>+        reg = &lt;0x702d8100 0x100&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml<br/>index 8579306fc56f..185ca0be4f02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nvidia,tegra210-sfc.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/nvidia,tegra210-sfc.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Tegra210 SFC Device Tree Bindings</div><div class='add'>+title: Tegra210 SFC</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Sampling Frequency Converter (SFC) converts the sampling frequency</div><div class='hunk'>@@ -17,7 +17,7 @@ maintainers:</div><div class='ctx'>   - Sameer Pujar &lt;spujar@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml b/Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml<br/>index b9b1dba40856..fd2415e231eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/nxp,tfa989x.yaml</a></div><div class='hunk'>@@ -10,11 +10,12 @@ maintainers:</div><div class='ctx'>   - Stephan Gerhold &lt;stephan@gerhold.net&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - nxp,tfa9890</div><div class='ctx'>       - nxp,tfa9895</div><div class='ctx'>       - nxp,tfa9897</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml<br/>index 2c81efb5fa37..6cc8f86c7531 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Technologies Inc. LPASS CPU dai driver bindings</div><div class='add'>+title: Qualcomm Technologies Inc. LPASS CPU dai driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -25,29 +25,29 @@ properties:</div><div class='ctx'>       - qcom,sc7280-lpass-cpu</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='del'>-    minItems: 2</div><div class='add'>+    minItems: 1</div><div class='ctx'>     maxItems: 6</div><div class='ctx'>     description: LPAIF core registers</div><div class='ctx'> </div><div class='ctx'>   reg-names:</div><div class='del'>-    minItems: 2</div><div class='add'>+    minItems: 1</div><div class='ctx'>     maxItems: 6</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 3</div><div class='del'>-    maxItems: 7</div><div class='add'>+    maxItems: 10</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    minItems: 3</div><div class='del'>-    maxItems: 7</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 10</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    minItems: 2</div><div class='add'>+    minItems: 1</div><div class='ctx'>     maxItems: 4</div><div class='ctx'>     description: LPAIF DMA buffer interrupt</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='del'>-    minItems: 2</div><div class='add'>+    minItems: 1</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   qcom,adsp:</div><div class='hunk'>@@ -62,6 +62,12 @@ properties:</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  power-domain-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  required-opps:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     const: 1</div><div class='ctx'> </div><div class='hunk'>@@ -72,7 +78,7 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "^dai-link@[0-9a-f]$":</div><div class='add'>+  "^dai-link@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     description: |</div><div class='ctx'>       LPASS CPU dai node for each I2S device or Soundwire device. Bindings of each node</div><div class='hunk'>@@ -106,9 +112,10 @@ required:</div><div class='ctx'>   - interrupt-names</div><div class='ctx'>   - '#sound-dai-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -117,6 +124,8 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='ctx'>         clock-names:</div><div class='ctx'>           items:</div><div class='ctx'>             - const: ahbix-clk</div><div class='hunk'>@@ -131,6 +140,9 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 7</div><div class='add'>+          maxItems: 7</div><div class='ctx'>         clock-names:</div><div class='ctx'>           items:</div><div class='ctx'>             - const: ahbix-clk</div><div class='hunk'>@@ -149,33 +161,31 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='ctx'>         clock-names:</div><div class='del'>-          oneOf:</div><div class='del'>-            - items:   #for I2S</div><div class='del'>-                - const: pcnoc-sway-clk</div><div class='del'>-                - const: audio-core</div><div class='del'>-                - const: mclk0</div><div class='del'>-                - const: pcnoc-mport-clk</div><div class='del'>-                - const: mi2s-bit-clk0</div><div class='del'>-                - const: mi2s-bit-clk1</div><div class='del'>-            - items:   #for HDMI</div><div class='del'>-                - const: pcnoc-sway-clk</div><div class='del'>-                - const: audio-core</div><div class='del'>-                - const: pcnoc-mport-clk</div><div class='add'>+          items:</div><div class='add'>+            - const: pcnoc-sway-clk</div><div class='add'>+            - const: audio-core</div><div class='add'>+            - const: mclk0</div><div class='add'>+            - const: pcnoc-mport-clk</div><div class='add'>+            - const: mi2s-bit-clk0</div><div class='add'>+            - const: mi2s-bit-clk1</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='ctx'>         reg-names:</div><div class='del'>-          anyOf:</div><div class='del'>-            - items:   #for I2S</div><div class='del'>-                - const: lpass-lpaif</div><div class='del'>-            - items:   #for I2S and HDMI</div><div class='del'>-                - const: lpass-hdmiif</div><div class='del'>-                - const: lpass-lpaif</div><div class='add'>+          items:</div><div class='add'>+            - const: lpass-hdmiif</div><div class='add'>+            - const: lpass-lpaif</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='ctx'>         interrupt-names:</div><div class='del'>-          anyOf:</div><div class='del'>-            - items:   #for I2S</div><div class='del'>-                - const: lpass-irq-lpaif</div><div class='del'>-            - items:   #for I2S and HDMI</div><div class='del'>-                - const: lpass-irq-lpaif</div><div class='del'>-                - const: lpass-irq-hdmi</div><div class='add'>+          items:</div><div class='add'>+            - const: lpass-irq-lpaif</div><div class='add'>+            - const: lpass-irq-hdmi</div><div class='ctx'>       required:</div><div class='ctx'>         - iommus</div><div class='ctx'>         - power-domains</div><div class='hunk'>@@ -188,46 +198,44 @@ allOf:</div><div class='ctx'> </div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 10</div><div class='add'>+          maxItems: 10</div><div class='ctx'>         clock-names:</div><div class='del'>-          oneOf:</div><div class='del'>-            - items:   #for I2S</div><div class='del'>-                - const: aon_cc_audio_hm_h</div><div class='del'>-                - const: core_cc_sysnoc_mport_core</div><div class='del'>-                - const: core_cc_ext_if1_ibit</div><div class='del'>-            - items:   #for Soundwire</div><div class='del'>-                - const: aon_cc_audio_hm_h</div><div class='del'>-                - const: audio_cc_codec_mem0</div><div class='del'>-                - const: audio_cc_codec_mem1</div><div class='del'>-                - const: audio_cc_codec_mem2</div><div class='del'>-            - items:   #for HDMI</div><div class='del'>-                - const: aon_cc_audio_hm_h</div><div class='del'>-</div><div class='add'>+          items:</div><div class='add'>+            - const: aon_cc_audio_hm_h</div><div class='add'>+            - const: audio_cc_ext_mclk0</div><div class='add'>+            - const: core_cc_sysnoc_mport_core</div><div class='add'>+            - const: core_cc_ext_if0_ibit</div><div class='add'>+            - const: core_cc_ext_if1_ibit</div><div class='add'>+            - const: audio_cc_codec_mem</div><div class='add'>+            - const: audio_cc_codec_mem0</div><div class='add'>+            - const: audio_cc_codec_mem1</div><div class='add'>+            - const: audio_cc_codec_mem2</div><div class='add'>+            - const: aon_cc_va_mem0</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='ctx'>         reg-names:</div><div class='del'>-          anyOf:</div><div class='del'>-            - items:   #for I2S</div><div class='del'>-                - const: lpass-lpaif</div><div class='del'>-            - items:   #for I2S and HDMI</div><div class='del'>-                - const: lpass-hdmiif</div><div class='del'>-                - const: lpass-lpaif</div><div class='del'>-            - items:   #for I2S, soundwire and HDMI</div><div class='del'>-                - const: lpass-hdmiif</div><div class='del'>-                - const: lpass-lpaif</div><div class='del'>-                - const: lpass-rxtx-cdc-dma-lpm</div><div class='del'>-                - const: lpass-rxtx-lpaif</div><div class='del'>-                - const: lpass-va-lpaif</div><div class='del'>-                - const: lpass-va-cdc-dma-lpm</div><div class='add'>+          items:</div><div class='add'>+            - const: lpass-hdmiif</div><div class='add'>+            - const: lpass-lpaif</div><div class='add'>+            - const: lpass-rxtx-cdc-dma-lpm</div><div class='add'>+            - const: lpass-rxtx-lpaif</div><div class='add'>+            - const: lpass-va-lpaif</div><div class='add'>+            - const: lpass-va-cdc-dma-lpm</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='ctx'>         interrupt-names:</div><div class='del'>-          anyOf:</div><div class='del'>-            - items:   #for I2S</div><div class='del'>-                - const: lpass-irq-lpaif</div><div class='del'>-            - items:   #for I2S and HDMI</div><div class='del'>-                - const: lpass-irq-lpaif</div><div class='del'>-                - const: lpass-irq-hdmi</div><div class='del'>-            - items:   #for I2S, soundwire and HDMI</div><div class='del'>-                - const: lpass-irq-lpaif</div><div class='del'>-                - const: lpass-irq-hdmi</div><div class='del'>-                - const: lpass-irq-vaif</div><div class='del'>-                - const: lpass-irq-rxtxif</div><div class='add'>+          items:</div><div class='add'>+            - const: lpass-irq-lpaif</div><div class='add'>+            - const: lpass-irq-hdmi</div><div class='add'>+            - const: lpass-irq-vaif</div><div class='add'>+            - const: lpass-irq-rxtxif</div><div class='add'>+        power-domain-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: lcx</div><div class='ctx'> </div><div class='ctx'>       required:</div><div class='ctx'>         - iommus</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml<br/>index 6127df5836c2..ec4b0ac8ad68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,lpass-rx-macro.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,lpass-rx-macro.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: LPASS(Low Power Audio Subsystem) RX Macro audio codec DT bindings</div><div class='add'>+title: LPASS(Low Power Audio Subsystem) RX Macro audio codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -14,6 +14,9 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,sc7280-lpass-rx-macro</div><div class='ctx'>       - qcom,sm8250-lpass-rx-macro</div><div class='add'>+      - qcom,sm8450-lpass-rx-macro</div><div class='add'>+      - qcom,sm8550-lpass-rx-macro</div><div class='add'>+      - qcom,sc8280xp-lpass-rx-macro</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -25,19 +28,15 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 3</div><div class='ctx'>     maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: mclk</div><div class='del'>-      - const: npl</div><div class='del'>-      - const: macro</div><div class='del'>-      - const: dcodec</div><div class='del'>-      - const: fsgen</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   clock-output-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: mclk</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -52,7 +51,66 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc7280-lpass-rx-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          oneOf:</div><div class='add'>+            - items:   # for ADSP based platforms</div><div class='add'>+                - const: mclk</div><div class='add'>+                - const: npl</div><div class='add'>+                - const: macro</div><div class='add'>+                - const: dcodec</div><div class='add'>+                - const: fsgen</div><div class='add'>+            - items:   # for ADSP bypass based platforms</div><div class='add'>+                - const: mclk</div><div class='add'>+                - const: npl</div><div class='add'>+                - const: fsgen</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc8280xp-lpass-rx-macro</div><div class='add'>+            - qcom,sm8250-lpass-rx-macro</div><div class='add'>+            - qcom,sm8450-lpass-rx-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: npl</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: fsgen</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8550-lpass-rx-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: fsgen</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml<br/>index 3f0f99cb18ca..4156981fe02b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,lpass-tx-macro.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,lpass-tx-macro.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: LPASS(Low Power Audio Subsystem) TX Macro audio codec DT bindings</div><div class='add'>+title: LPASS(Low Power Audio Subsystem) TX Macro audio codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -14,6 +14,9 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,sc7280-lpass-tx-macro</div><div class='ctx'>       - qcom,sm8250-lpass-tx-macro</div><div class='add'>+      - qcom,sm8450-lpass-tx-macro</div><div class='add'>+      - qcom,sm8550-lpass-tx-macro</div><div class='add'>+      - qcom,sc8280xp-lpass-tx-macro</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -25,19 +28,15 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 3</div><div class='ctx'>     maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: mclk</div><div class='del'>-      - const: npl</div><div class='del'>-      - const: macro</div><div class='del'>-      - const: dcodec</div><div class='del'>-      - const: fsgen</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 5</div><div class='ctx'> </div><div class='ctx'>   clock-output-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: mclk</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -56,7 +55,66 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc7280-lpass-tx-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          oneOf:</div><div class='add'>+            - items:   # for ADSP based platforms</div><div class='add'>+                - const: mclk</div><div class='add'>+                - const: npl</div><div class='add'>+                - const: macro</div><div class='add'>+                - const: dcodec</div><div class='add'>+                - const: fsgen</div><div class='add'>+            - items:   # for ADSP bypass based platforms</div><div class='add'>+                - const: mclk</div><div class='add'>+                - const: npl</div><div class='add'>+                - const: fsgen</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc8280xp-lpass-tx-macro</div><div class='add'>+            - qcom,sm8250-lpass-tx-macro</div><div class='add'>+            - qcom,sm8450-lpass-tx-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: npl</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: fsgen</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8550-lpass-tx-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: fsgen</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml<br/>index 9868a5ebe27e..4a56108c444b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,lpass-va-macro.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,lpass-va-macro.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: LPASS(Low Power Audio Subsystem) VA Macro audio codec DT bindings</div><div class='add'>+title: LPASS(Low Power Audio Subsystem) VA Macro audio codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -14,6 +14,9 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,sc7280-lpass-va-macro</div><div class='ctx'>       - qcom,sm8250-lpass-va-macro</div><div class='add'>+      - qcom,sm8450-lpass-va-macro</div><div class='add'>+      - qcom,sm8550-lpass-va-macro</div><div class='add'>+      - qcom,sc8280xp-lpass-va-macro</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -25,17 +28,15 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 3</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: mclk</div><div class='del'>-      - const: core</div><div class='del'>-      - const: dcodec</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   clock-output-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: fsgen</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -56,8 +57,78 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,sc7280-lpass-va-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,sm8250-lpass-va-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8280xp-lpass-va-macro</div><div class='add'>+              - qcom,sm8450-lpass-va-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: npl</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8550-lpass-va-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -70,7 +141,7 @@ examples:</div><div class='ctx'>       clocks = &lt;&amp;aoncc 0&gt;,</div><div class='ctx'>                &lt;&amp;q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='ctx'>                &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;;</div><div class='del'>-      clock-names = "mclk", "core", "dcodec";</div><div class='add'>+      clock-names = "mclk", "macro", "dcodec";</div><div class='ctx'>       clock-output-names = "fsgen";</div><div class='ctx'>       qcom,dmic-sample-rate = &lt;600000&gt;;</div><div class='ctx'>       vdd-micb-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml<br/>index 13cdb8a10687..eea7609d1b33 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,lpass-wsa-macro.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,lpass-wsa-macro.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: LPASS(Low Power Audio Subsystem) VA Macro audio codec DT bindings</div><div class='add'>+title: LPASS(Low Power Audio Subsystem) VA Macro audio codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -14,6 +14,9 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,sc7280-lpass-wsa-macro</div><div class='ctx'>       - qcom,sm8250-lpass-wsa-macro</div><div class='add'>+      - qcom,sm8450-lpass-wsa-macro</div><div class='add'>+      - qcom,sm8550-lpass-wsa-macro</div><div class='add'>+      - qcom,sc8280xp-lpass-wsa-macro</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -25,19 +28,15 @@ properties:</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 5</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 6</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: mclk</div><div class='del'>-      - const: npl</div><div class='del'>-      - const: macro</div><div class='del'>-      - const: dcodec</div><div class='del'>-      - const: fsgen</div><div class='add'>+    minItems: 4</div><div class='add'>+    maxItems: 6</div><div class='ctx'> </div><div class='ctx'>   clock-output-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: mclk</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   qcom,dmic-sample-rate:</div><div class='ctx'>     description: dmic sample rate</div><div class='hunk'>@@ -51,10 +50,69 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sc7280-lpass-wsa-macro</div><div class='add'>+            - qcom,sm8450-lpass-wsa-macro</div><div class='add'>+            - qcom,sc8280xp-lpass-wsa-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: npl</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: fsgen</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8250-lpass-wsa-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: npl</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: va</div><div class='add'>+            - const: fsgen</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,sm8550-lpass-wsa-macro</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 4</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: mclk</div><div class='add'>+            - const: macro</div><div class='add'>+            - const: dcodec</div><div class='add'>+            - const: fsgen</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,sm8250-lpass-aoncc.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='ctx'>     codec@3240000 {</div><div class='ctx'>       compatible = "qcom,sm8250-lpass-wsa-macro";</div><div class='hunk'>@@ -65,7 +123,8 @@ examples:</div><div class='ctx'>                &lt;&amp;audiocc 0&gt;,</div><div class='ctx'>                &lt;&amp;q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='ctx'>                &lt;&amp;q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO&gt;,</div><div class='add'>+               &lt;&amp;aoncc LPASS_CDC_VA_MCLK&gt;,</div><div class='ctx'>                &lt;&amp;vamacro&gt;;</div><div class='del'>-      clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";</div><div class='add'>+      clock-names = "mclk", "npl", "macro", "dcodec", "va", "fsgen";</div><div class='ctx'>       clock-output-names = "mclk";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml b/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml<br/>new file mode 100644<br/>index 000000000000..3f11d2e183e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6adm-routing.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6adm-routing.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Audio Device Manager (Q6ADM) routing</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm Audio Device Manager (Q6ADM) routing node represents routing</div><div class='add'>+  specific configuration.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6adm-routing</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    routing {</div><div class='add'>+        compatible = "qcom,q6adm-routing";</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6adm.txt b/Documentation/devicetree/bindings/sound/qcom,q6adm.txt<br/>deleted file mode 100644<br/>index 15c353a20de8..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6adm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6adm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-Qualcomm Audio Device Manager (Q6ADM) binding</div><div class='del'>-</div><div class='del'>-Q6ADM is one of the APR audio service on Q6DSP.</div><div class='del'>-Please refer to qcom,apr.txt for details of the coommon apr service bindings</div><div class='del'>-used by the apr service device.</div><div class='del'>-</div><div class='del'>-- but must contain the following property:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,q6adm-v&lt;MAJOR-NUMBER&gt;.&lt;MINOR-NUMBER&gt;".</div><div class='del'>-		   Or "qcom,q6adm" where the version number can be queried</div><div class='del'>-		   from DSP.</div><div class='del'>-		   example "qcom,q6adm-v2.0"</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-= ADM routing</div><div class='del'>-"routing" subnode of the ADM node represents adm routing specific configuration</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,q6adm-routing".</div><div class='del'>-</div><div class='del'>-- #sound-dai-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Must be 0</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-apr-service@8 {</div><div class='del'>-	compatible = "qcom,q6adm";</div><div class='del'>-	reg = &lt;APR_SVC_ADM&gt;;</div><div class='del'>-	q6routing: routing {</div><div class='del'>-		compatible = "qcom,q6adm-routing";</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml<br/>new file mode 100644<br/>index 000000000000..fe14a97ea616<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6adm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6adm.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6adm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Audio Device Manager (Q6ADM)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6adm</div><div class='add'>+</div><div class='add'>+  routing:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/sound/qcom,q6adm-routing.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Qualcomm DSP LPASS audio routing</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - routing</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='add'>+</div><div class='add'>+    apr {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        service@8 {</div><div class='add'>+            compatible = "qcom,q6adm";</div><div class='add'>+            reg = &lt;APR_SVC_ADM&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+            routing {</div><div class='add'>+                compatible = "qcom,q6adm-routing";</div><div class='add'>+                #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6afe.txt b/Documentation/devicetree/bindings/sound/qcom,q6afe.txt<br/>deleted file mode 100644<br/>index bc6b5f1fe4f1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6afe.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6afe.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-Qualcomm Audio Front End (Q6AFE) binding</div><div class='del'>-</div><div class='del'>-AFE is one of the APR audio service on Q6DSP</div><div class='del'>-Please refer to qcom,apr.txt for details of the common apr service bindings</div><div class='del'>-used by all apr services. Must contain the following properties.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,q6afe-v&lt;MAJOR-NUMBER&gt;.&lt;MINOR-NUMBER&gt;"</div><div class='del'>-		  Or "qcom,q6afe" where the version number can be queried</div><div class='del'>-		  from DSP.</div><div class='del'>-		  example "qcom,q6afe"</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-</div><div class='del'>-apr-service@4 {</div><div class='del'>-	compatible = "qcom,q6afe";</div><div class='del'>-	reg = &lt;APR_SVC_AFE&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml b/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml<br/>new file mode 100644<br/>index 000000000000..297aa362aa54<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6afe.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6afe.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6afe.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Audio FrontEnd (Q6AFE)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6afe</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/sound/qcom,q6dsp-lpass-clocks.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Qualcomm DSP LPASS clock controller</div><div class='add'>+</div><div class='add'>+  dais:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/sound/qcom,q6dsp-lpass-ports.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Qualcomm DSP audio ports</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - dais</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='add'>+    apr {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        service@4 {</div><div class='add'>+            compatible = "qcom,q6afe";</div><div class='add'>+            reg = &lt;APR_SVC_AFE&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+            clock-controller {</div><div class='add'>+                compatible = "qcom,q6afe-clocks";</div><div class='add'>+                #clock-cells = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            dais {</div><div class='add'>+                compatible = "qcom,q6afe-dais";</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                dai@22 {</div><div class='add'>+                    reg = &lt;QUATERNARY_MI2S_RX&gt;;</div><div class='add'>+                    qcom,sd-lines = &lt;0 1 2 3&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml<br/>index 5d972784321d..cdbb4096fa44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6apm-dai.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/sound/qcom,q6apm-dai.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: Qualcomm Audio Process Manager Digital Audio Interfaces binding</div><div class='add'>+title: Qualcomm Audio Process Manager Digital Audio Interfaces</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -16,38 +16,19 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: qcom,q6apm-dais</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   iommus:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - iommus</div><div class='del'>-  - reg</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='del'>-    gpr {</div><div class='del'>-        compatible = "qcom,gpr";</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-        qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='del'>-        service@1 {</div><div class='del'>-          compatible = "qcom,q6apm";</div><div class='del'>-          reg = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-          apm-dai@1 {</div><div class='del'>-            compatible = "qcom,q6apm-dais";</div><div class='del'>-            iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='del'>-            reg = &lt;1&gt;;</div><div class='del'>-          };</div><div class='del'>-        };</div><div class='add'>+    dais {</div><div class='add'>+        compatible = "qcom,q6apm-dais";</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml<br/>new file mode 100644<br/>index 000000000000..894e653d37d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6apm-lpass-dais.yaml</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6apm-lpass-dais.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm DSP LPASS (Low Power Audio SubSystem) Audio Ports</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6apm-lpass-dais</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    dais {</div><div class='add'>+        compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+        #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml<br/>new file mode 100644<br/>index 000000000000..ef1965aca254<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6apm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6apm.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6apm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Audio Process Manager (Q6APM)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6apm</div><div class='add'>+</div><div class='add'>+  bedais:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/sound/qcom,q6apm-lpass-dais.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Qualcomm DSP audio ports</div><div class='add'>+</div><div class='add'>+  dais:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/sound/qcom,q6apm-dai.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Qualcomm DSP audio ports</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - bedais</div><div class='add'>+  - dais</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='add'>+</div><div class='add'>+    gpr {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        service@1 {</div><div class='add'>+            reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='add'>+            compatible = "qcom,q6apm";</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+            dais {</div><div class='add'>+                compatible = "qcom,q6apm-dais";</div><div class='add'>+                iommus = &lt;&amp;apps_smmu 0x1801 0x0&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            bedais {</div><div class='add'>+                compatible = "qcom,q6apm-lpass-dais";</div><div class='add'>+                #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml b/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml<br/>new file mode 100644<br/>index 000000000000..ce811942a9f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6asm-dais.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6asm-dais.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Audio Stream Manager (Q6ASM)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Q6ASM is one of the APR audio services on Q6DSP. Each of its subnodes</div><div class='add'>+  represent a dai with board specific configuration.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6asm-dais</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#address-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  "#size-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^dai@[0-9]+$":</div><div class='add'>+    type: object</div><div class='add'>+    description:</div><div class='add'>+      Q6ASM Digital Audio Interface</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+      direction:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        enum: [0, 1, 2]</div><div class='add'>+        description: |</div><div class='add'>+          The direction of the dai stream::</div><div class='add'>+           - Q6ASM_DAI_TX_RX (0) for both tx and rx</div><div class='add'>+           - Q6ASM_DAI_TX (1) for only tx (Capture/Encode)</div><div class='add'>+           - Q6ASM_DAI_RX (2) for only rx (Playback/Decode)</div><div class='add'>+</div><div class='add'>+      is-compress-dai:</div><div class='add'>+        type: boolean</div><div class='add'>+        description:</div><div class='add'>+          Compress offload dai.</div><div class='add'>+</div><div class='add'>+    dependencies:</div><div class='add'>+      is-compress-dai: [ direction ]</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - reg</div><div class='add'>+</div><div class='add'>+    additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    dais {</div><div class='add'>+        compatible = "qcom,q6asm-dais";</div><div class='add'>+        iommus = &lt;&amp;apps_smmu 0x1821 0x0&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        dai@0 {</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dai@1 {</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        dai@2 {</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            is-compress-dai;</div><div class='add'>+            direction = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm.txt b/Documentation/devicetree/bindings/sound/qcom,q6asm.txt<br/>deleted file mode 100644<br/>index 0d0075125243..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6asm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6asm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,70 +0,0 @@</div><div class='del'>-Qualcomm Audio Stream Manager (Q6ASM) binding</div><div class='del'>-</div><div class='del'>-Q6ASM is one of the APR audio service on Q6DSP.</div><div class='del'>-Please refer to qcom,apr.txt for details of the common apr service bindings</div><div class='del'>-used by the apr service device.</div><div class='del'>-</div><div class='del'>-- but must contain the following property:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,q6asm-v&lt;MAJOR-NUMBER&gt;.&lt;MINOR-NUMBER&gt;".</div><div class='del'>-		    Or "qcom,q6asm" where the version number can be queried</div><div class='del'>-		    from DSP.</div><div class='del'>-		    example "qcom,q6asm-v2.0"</div><div class='del'>-</div><div class='del'>-= ASM DAIs (Digital Audio Interface)</div><div class='del'>-"dais" subnode of the ASM node represents dai specific configuration</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,q6asm-dais".</div><div class='del'>-</div><div class='del'>-- #sound-dai-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Must be 1</div><div class='del'>-</div><div class='del'>-== ASM DAI is subnode of "dais" and represent a dai, it includes board specific</div><div class='del'>-configuration of each dai. Must contain the following properties.</div><div class='del'>-</div><div class='del'>-- reg</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Must be dai id</div><div class='del'>-</div><div class='del'>-- direction:</div><div class='del'>-	Usage: Required for Compress offload dais</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Specifies the direction of the dai stream</div><div class='del'>-			Q6ASM_DAI_TX_RX (0) for both tx and rx</div><div class='del'>-			Q6ASM_DAI_TX (1) for only tx (Capture/Encode)</div><div class='del'>-			Q6ASM_DAI_RX (2) for only rx (Playback/Decode)</div><div class='del'>-</div><div class='del'>-- is-compress-dai:</div><div class='del'>-	Usage: Required for Compress offload dais</div><div class='del'>-	Value type: &lt;boolean&gt;</div><div class='del'>-	Definition: present for Compress offload dais</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-#include &lt;dt-bindings/sound/qcom,q6asm.h&gt;</div><div class='del'>-</div><div class='del'>-apr-service@7 {</div><div class='del'>-	compatible = "qcom,q6asm";</div><div class='del'>-	reg = &lt;APR_SVC_ASM&gt;;</div><div class='del'>-	q6asmdai: dais {</div><div class='del'>-		compatible = "qcom,q6asm-dais";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-		dai@0 {</div><div class='del'>-			reg = &lt;0&gt;;</div><div class='del'>-			direction = &lt;Q6ASM_DAI_RX&gt;;</div><div class='del'>-			is-compress-dai;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml<br/>new file mode 100644<br/>index 000000000000..cb49f9667cca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6asm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6asm.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6asm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Audio Stream Manager (Q6ASM)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6asm</div><div class='add'>+</div><div class='add'>+  dais:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/sound/qcom,q6asm-dais.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Qualcomm DSP audio ports</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - dais</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='add'>+</div><div class='add'>+    apr {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        service@7 {</div><div class='add'>+            compatible = "qcom,q6asm";</div><div class='add'>+            reg = &lt;APR_SVC_ASM&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+            dais {</div><div class='add'>+                compatible = "qcom,q6asm-dais";</div><div class='add'>+                iommus = &lt;&amp;apps_smmu 0x1821 0x0&gt;;</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+                #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+                dai@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                dai@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                dai@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    is-compress-dai;</div><div class='add'>+                    direction = &lt;1&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6core.txt b/Documentation/devicetree/bindings/sound/qcom,q6core.txt<br/>deleted file mode 100644<br/>index 5cd4cc9b1fde..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6core.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6core.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-Qualcomm ADSP Core service binding</div><div class='del'>-</div><div class='del'>-Q6CORE is one of the APR audio service on Q6DSP.</div><div class='del'>-Please refer to qcom,apr.txt for details of the common apr service bindings</div><div class='del'>-used by the apr service device.</div><div class='del'>-</div><div class='del'>-- but must contain the following property:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,q6core-v&lt;MAJOR-NUMBER&gt;.&lt;MINOR-NUMBER&gt;".</div><div class='del'>-		   Or "qcom,q6core" where the version number can be queried</div><div class='del'>-		   from DSP.</div><div class='del'>-		   example "qcom,q6core-v2.0"</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-apr-service@3 {</div><div class='del'>-	compatible = "qcom,q6core";</div><div class='del'>-	reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6core.yaml b/Documentation/devicetree/bindings/sound/qcom,q6core.yaml<br/>new file mode 100644<br/>index 000000000000..e240712de9ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6core.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6core.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6core.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Audio Core (Q6Core)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6core</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='add'>+</div><div class='add'>+    apr {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        service@3 {</div><div class='add'>+            compatible = "qcom,q6core";</div><div class='add'>+            reg = &lt;APR_SVC_ADSP_CORE&gt;;</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml<br/>index f83f00737a2f..1168410f6fbd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-clocks.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-clocks.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: Qualcomm DSP LPASS Clock Controller binding</div><div class='add'>+title: Qualcomm DSP LPASS Clock Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -18,9 +18,6 @@ properties:</div><div class='ctx'>       - qcom,q6afe-clocks</div><div class='ctx'>       - qcom,q6prm-lpass-clocks</div><div class='ctx'> </div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   '#clock-cells':</div><div class='ctx'>     const: 2</div><div class='ctx'>     description:</div><div class='hunk'>@@ -32,46 +29,13 @@ properties:</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='ctx'>   - "#clock-cells"</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='del'>-    apr {</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-        apr-service@4 {</div><div class='del'>-            reg = &lt;APR_SVC_AFE&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-            clock-controller@2 {</div><div class='del'>-              compatible = "qcom,q6afe-clocks";</div><div class='del'>-              reg = &lt;2&gt;;</div><div class='del'>-              #clock-cells = &lt;2&gt;;</div><div class='del'>-            };</div><div class='del'>-        };</div><div class='del'>-      };</div><div class='del'>-</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='del'>-    gpr {</div><div class='del'>-        compatible = "qcom,gpr";</div><div class='del'>-        qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-        service@2 {</div><div class='del'>-            reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='del'>-            compatible = "qcom,q6prm";</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-            clock-controller@2 {</div><div class='del'>-              compatible = "qcom,q6prm-lpass-clocks";</div><div class='del'>-              reg = &lt;2&gt;;</div><div class='del'>-              #clock-cells = &lt;2&gt;;</div><div class='del'>-            };</div><div class='del'>-        };</div><div class='del'>-      };</div><div class='add'>+    clock-controller {</div><div class='add'>+        compatible = "qcom,q6afe-clocks";</div><div class='add'>+        #clock-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml b/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml<br/>index dc7fba7b92d5..044e77718a1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6dsp-lpass-ports.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: "http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-ports.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: Qualcomm DSP LPASS(Low Power Audio SubSystem) Audio Ports binding</div><div class='add'>+title: Qualcomm DSP LPASS(Low Power Audio SubSystem) Audio Ports</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -16,10 +16,6 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - qcom,q6afe-dais</div><div class='del'>-      - qcom,q6apm-lpass-dais</div><div class='del'>-</div><div class='del'>-  reg:</div><div class='del'>-    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -30,7 +26,7 @@ properties:</div><div class='ctx'>   '#size-cells':</div><div class='ctx'>     const: 0</div><div class='ctx'> </div><div class='del'>-#Digital Audio Interfaces</div><div class='add'>+# Digital Audio Interfaces</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^dai@[0-9]+$':</div><div class='ctx'>     type: object</div><div class='hunk'>@@ -145,7 +141,6 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='del'>-  - reg</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'>   - "#address-cells"</div><div class='ctx'>   - "#size-cells"</div><div class='hunk'>@@ -154,52 +149,16 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/soc/qcom,apr.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/sound/qcom,q6afe.h&gt;</div><div class='del'>-    apr {</div><div class='del'>-        #address-cells = &lt;1&gt;;</div><div class='del'>-        #size-cells = &lt;0&gt;;</div><div class='del'>-        apr-service@4 {</div><div class='del'>-            reg = &lt;APR_SVC_AFE&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-            q6afedai@1 {</div><div class='del'>-              compatible = "qcom,q6afe-dais";</div><div class='del'>-              reg = &lt;1&gt;;</div><div class='del'>-              #address-cells = &lt;1&gt;;</div><div class='del'>-              #size-cells = &lt;0&gt;;</div><div class='del'>-              #sound-dai-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-              dai@22 {</div><div class='del'>-                reg = &lt;QUATERNARY_MI2S_RX&gt;;</div><div class='del'>-                qcom,sd-lines = &lt;0 1 2 3&gt;;</div><div class='del'>-              };</div><div class='del'>-            };</div><div class='del'>-        };</div><div class='del'>-      };</div><div class='del'>-  - |</div><div class='del'>-    #include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='del'>-    gpr {</div><div class='del'>-        compatible = "qcom,gpr";</div><div class='add'>+    #include &lt;dt-bindings/sound/qcom,q6dsp-lpass-ports.h&gt;</div><div class='add'>+</div><div class='add'>+    dais {</div><div class='add'>+        compatible = "qcom,q6afe-dais";</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='del'>-        qcom,domain = &lt;GPR_DOMAIN_ID_ADSP&gt;;</div><div class='del'>-        service@1 {</div><div class='del'>-            compatible = "qcom,q6apm";</div><div class='del'>-            reg = &lt;GPR_APM_MODULE_IID&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-            q6apmdai@1 {</div><div class='del'>-              compatible = "qcom,q6apm-lpass-dais";</div><div class='del'>-              reg = &lt;1&gt;;</div><div class='del'>-              #address-cells = &lt;1&gt;;</div><div class='del'>-              #size-cells = &lt;0&gt;;</div><div class='del'>-              #sound-dai-cells = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-              dai@22 {</div><div class='del'>-                reg = &lt;QUATERNARY_MI2S_RX&gt;;</div><div class='del'>-                qcom,sd-lines = &lt;0 1 2 3&gt;;</div><div class='del'>-              };</div><div class='del'>-            };</div><div class='add'>+        #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        dai@22 {</div><div class='add'>+            reg = &lt;QUATERNARY_MI2S_RX&gt;;</div><div class='add'>+            qcom,sd-lines = &lt;0 1 2 3&gt;;</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml b/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml<br/>new file mode 100644<br/>index 000000000000..f6dbb1267bfe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,q6prm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,q6prm.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,q6prm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Proxy Resource Manager (Q6PRM)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/soc/qcom/qcom,apr-services.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,q6prm</div><div class='add'>+</div><div class='add'>+  clock-controller:</div><div class='add'>+    $ref: /schemas/sound/qcom,q6dsp-lpass-clocks.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    description: Qualcomm DSP LPASS clock controller</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clock-controller</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/qcom,gpr.h&gt;</div><div class='add'>+</div><div class='add'>+    gpr {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        service@2 {</div><div class='add'>+            reg = &lt;GPR_PRM_MODULE_IID&gt;;</div><div class='add'>+            compatible = "qcom,q6prm";</div><div class='add'>+            qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";</div><div class='add'>+</div><div class='add'>+            clock-controller {</div><div class='add'>+                compatible = "qcom,q6prm-lpass-clocks";</div><div class='add'>+                #clock-cells = &lt;2&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,sdm845.txt b/Documentation/devicetree/bindings/sound/qcom,sdm845.txt<br/>deleted file mode 100644<br/>index de4c604641da..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,sdm845.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,sdm845.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,91 +0,0 @@</div><div class='del'>-* Qualcomm Technologies Inc. SDM845 ASoC sound card driver</div><div class='del'>-</div><div class='del'>-This binding describes the SDM845 sound card, which uses qdsp for audio.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be one of this</div><div class='del'>-			"qcom,sdm845-sndcard"</div><div class='del'>-			"qcom,db845c-sndcard"</div><div class='del'>-			"lenovo,yoga-c630-sndcard"</div><div class='del'>-</div><div class='del'>-- audio-routing:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition:  A list of the connections between audio components.</div><div class='del'>-		  Each entry is a pair of strings, the first being the</div><div class='del'>-		  connection's sink, the second being the connection's</div><div class='del'>-		  source. Valid names could be power supplies, MicBias</div><div class='del'>-		  of codec and the jacks on the board.</div><div class='del'>-</div><div class='del'>-- model:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: The user-visible name of this sound card.</div><div class='del'>-</div><div class='del'>-- aux-devs</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;array of phandles&gt;</div><div class='del'>-	Definition: A list of phandles for auxiliary devices (e.g. analog</div><div class='del'>-		    amplifiers) that do not appear directly within the DAI</div><div class='del'>-		    links. Should be connected to another audio component</div><div class='del'>-		    using "audio-routing".</div><div class='del'>-</div><div class='del'>-= dailinks</div><div class='del'>-Each subnode of sndcard represents either a dailink, and subnodes of each</div><div class='del'>-dailinks would be cpu/codec/platform dais.</div><div class='del'>-</div><div class='del'>-- link-name:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: User friendly name for dai link</div><div class='del'>-</div><div class='del'>-= CPU, PLATFORM, CODEC dais subnodes</div><div class='del'>-- cpu:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;subnode&gt;</div><div class='del'>-	Definition: cpu dai sub-node</div><div class='del'>-</div><div class='del'>-- codec:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;subnode&gt;</div><div class='del'>-	Definition: codec dai sub-node</div><div class='del'>-</div><div class='del'>-- platform:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: &lt;subnode&gt;</div><div class='del'>-	Definition: platform dai sub-node</div><div class='del'>-</div><div class='del'>-- sound-dai:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: dai phandle/s and port of CPU/CODEC/PLATFORM node.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-audio {</div><div class='del'>-	compatible = "qcom,sdm845-sndcard";</div><div class='del'>-	model = "sdm845-snd-card";</div><div class='del'>-	pinctrl-names = "default", "sleep";</div><div class='del'>-	pinctrl-0 = &lt;&amp;pri_mi2s_active &amp;pri_mi2s_ws_active&gt;;</div><div class='del'>-	pinctrl-1 = &lt;&amp;pri_mi2s_sleep &amp;pri_mi2s_ws_sleep&gt;;</div><div class='del'>-</div><div class='del'>-	mm1-dai-link {</div><div class='del'>-		link-name = "MultiMedia1";</div><div class='del'>-		cpu {</div><div class='del'>-			sound-dai = &lt;&amp;q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	pri-mi2s-dai-link {</div><div class='del'>-		link-name = "PRI MI2S Playback";</div><div class='del'>-		cpu {</div><div class='del'>-			sound-dai = &lt;&amp;q6afedai PRIMARY_MI2S_RX&gt;;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		platform {</div><div class='del'>-			sound-dai = &lt;&amp;q6routing&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml b/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml<br/>index 4ecd4080bb96..262de7a60a73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,sm8250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,sm8250.yaml</a></div><div class='hunk'>@@ -15,11 +15,20 @@ description:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,apq8016-sbc-sndcard</div><div class='del'>-      - qcom,msm8916-qdsp6-sndcard</div><div class='del'>-      - qcom,sm8250-sndcard</div><div class='del'>-      - qcom,qrb5165-rb5-sndcard</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - lenovo,yoga-c630-sndcard</div><div class='add'>+              - qcom,db845c-sndcard</div><div class='add'>+          - const: qcom,sdm845-sndcard</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,apq8016-sbc-sndcard</div><div class='add'>+          - qcom,msm8916-qdsp6-sndcard</div><div class='add'>+          - qcom,qrb5165-rb5-sndcard</div><div class='add'>+          - qcom,sc8280xp-sndcard</div><div class='add'>+          - qcom,sdm845-sndcard</div><div class='add'>+          - qcom,sm8250-sndcard</div><div class='add'>+          - qcom,sm8450-sndcard</div><div class='ctx'> </div><div class='ctx'>   audio-routing:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='hunk'>@@ -68,6 +77,8 @@ patternProperties:</div><div class='ctx'>       cpu:</div><div class='ctx'>         description: Holds subnode which indicates cpu dai.</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           sound-dai:</div><div class='ctx'>             maxItems: 1</div><div class='hunk'>@@ -75,6 +86,8 @@ patternProperties:</div><div class='ctx'>       platform:</div><div class='ctx'>         description: Holds subnode which indicates platform dai.</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           sound-dai:</div><div class='ctx'>             maxItems: 1</div><div class='hunk'>@@ -82,6 +95,8 @@ patternProperties:</div><div class='ctx'>       codec:</div><div class='ctx'>         description: Holds subnode which indicates codec dai.</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           sound-dai:</div><div class='ctx'>             minItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt b/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt<br/>deleted file mode 100644<br/>index 5d6ea66a863f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd9335.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd9335.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,123 +0,0 @@</div><div class='del'>-QCOM WCD9335 Codec</div><div class='del'>-</div><div class='del'>-Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC, supports</div><div class='del'>-Qualcomm Technologies, Inc. (QTI) multimedia solutions, including</div><div class='del'>-the MSM8996, MSM8976, and MSM8956 chipsets. It has in-built</div><div class='del'>-Soundwire controller, interrupt mux. It supports both I2S/I2C and</div><div class='del'>-SLIMbus audio interfaces.</div><div class='del'>-</div><div class='del'>-Required properties with SLIMbus Interface:</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: For SLIMbus interface it should be "slimMID,PID",</div><div class='del'>-		    textual representation of Manufacturer ID, Product Code,</div><div class='del'>-		    shall be in lower case hexadecimal with leading zeroes</div><div class='del'>-		    suppressed.  Refer to slimbus/bus.txt for details.</div><div class='del'>-		    Should be:</div><div class='del'>-		    "slim217,1a0" for MSM8996 and APQ8096 SoCs with SLIMbus.</div><div class='del'>-</div><div class='del'>-- reg</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32 u32&gt;</div><div class='del'>-	Definition: Should be ('Device index', 'Instance ID')</div><div class='del'>-</div><div class='del'>-- interrupts</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: Interrupts via WCD INTR1 and INTR2 pins</div><div class='del'>-</div><div class='del'>-- interrupt-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;String array&gt;</div><div class='del'>-	Definition: Interrupt names of WCD INTR1 and INTR2</div><div class='del'>-	Should be: "intr1", "intr2"</div><div class='del'>-</div><div class='del'>-- reset-gpios:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;String Array&gt;</div><div class='del'>-	Definition: Reset gpio line</div><div class='del'>-</div><div class='del'>-- slim-ifc-dev:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: SLIM interface device</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: See clock-bindings.txt section "consumers". List of</div><div class='del'>-                three clock specifiers for mclk, mclk2 and slimbus clock.</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;string&gt;</div><div class='del'>-	Definition: Must contain "mclk", "mclk2" and "slimbus" strings.</div><div class='del'>-</div><div class='del'>-- vdd-buck-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Should contain a reference to the 1.8V buck supply</div><div class='del'>-</div><div class='del'>-- vdd-buck-sido-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Should contain a reference to the 1.8V SIDO buck supply</div><div class='del'>-</div><div class='del'>-- vdd-rx-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Should contain a reference to the 1.8V rx supply</div><div class='del'>-</div><div class='del'>-- vdd-tx-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Should contain a reference to the 1.8V tx supply</div><div class='del'>-</div><div class='del'>-- vdd-vbat-supply:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Should contain a reference to the vbat supply</div><div class='del'>-</div><div class='del'>-- vdd-micbias-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Should contain a reference to the micbias supply</div><div class='del'>-</div><div class='del'>-- vdd-io-supply:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;phandle&gt;</div><div class='del'>-	Definition: Should contain a reference to the 1.8V io supply</div><div class='del'>-</div><div class='del'>-- interrupt-controller:</div><div class='del'>-	Usage: required</div><div class='del'>-	Definition: Indicating that this is a interrupt controller</div><div class='del'>-</div><div class='del'>-- #interrupt-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;int&gt;</div><div class='del'>-	Definition: should be 1</div><div class='del'>-</div><div class='del'>-#sound-dai-cells</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: Must be 1</div><div class='del'>-</div><div class='del'>-audio-codec@1{</div><div class='del'>-	compatible = "slim217,1a0";</div><div class='del'>-	reg  = &lt;1 0&gt;;</div><div class='del'>-	interrupts = &lt;&amp;msmgpio 54 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	interrupt-names = "intr2"</div><div class='del'>-	reset-gpios = &lt;&amp;msmgpio 64 0&gt;;</div><div class='del'>-	slim-ifc-dev  = &lt;&amp;wc9335_ifd&gt;;</div><div class='del'>-	clock-names = "mclk", "native";</div><div class='del'>-	clocks = &lt;&amp;rpmcc RPM_SMD_DIV_CLK1&gt;,</div><div class='del'>-		 &lt;&amp;rpmcc RPM_SMD_BB_CLK1&gt;;</div><div class='del'>-	vdd-buck-supply = &lt;&amp;pm8994_s4&gt;;</div><div class='del'>-	vdd-rx-supply = &lt;&amp;pm8994_s4&gt;;</div><div class='del'>-	vdd-buck-sido-supply = &lt;&amp;pm8994_s4&gt;;</div><div class='del'>-	vdd-tx-supply = &lt;&amp;pm8994_s4&gt;;</div><div class='del'>-	vdd-io-supply = &lt;&amp;pm8994_s4&gt;;</div><div class='del'>-	#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-}</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd9335.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd9335.yaml<br/>new file mode 100644<br/>index 000000000000..34f8fe4da9d4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd9335.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,wcd9335.yaml</a></div><div class='hunk'>@@ -0,0 +1,156 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,wcd9335.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm WCD9335 Audio Codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC with in-built</div><div class='add'>+  Soundwire controller and interrupt mux. It supports both I2S/I2C and SLIMbus</div><div class='add'>+  audio interfaces.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: slim217,1a0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+      - const: slimbus</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: intr1</div><div class='add'>+      - const: intr2</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  slim-ifc-dev:</div><div class='add'>+    description: SLIM IFC device interface</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  vdd-buck-supply:</div><div class='add'>+    description: 1.8V buck supply</div><div class='add'>+</div><div class='add'>+  vdd-buck-sido-supply:</div><div class='add'>+    description: 1.8V SIDO buck supply</div><div class='add'>+</div><div class='add'>+  vdd-io-supply:</div><div class='add'>+    description: 1.8V I/O supply</div><div class='add'>+</div><div class='add'>+  vdd-micbias-supply:</div><div class='add'>+    description: micbias supply</div><div class='add'>+</div><div class='add'>+  vdd-rx-supply:</div><div class='add'>+    description: 1.8V rx supply</div><div class='add'>+</div><div class='add'>+  vdd-tx-supply:</div><div class='add'>+    description: 1.8V tx supply</div><div class='add'>+</div><div class='add'>+  vdd-vbat-supply:</div><div class='add'>+    description: vbat supply</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - slim-ifc-dev</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+        - clock-names</div><div class='add'>+        - interrupts</div><div class='add'>+        - interrupt-names</div><div class='add'>+        - interrupt-controller</div><div class='add'>+        - '#interrupt-cells'</div><div class='add'>+        - reset-gpios</div><div class='add'>+        - slim-ifc-dev</div><div class='add'>+        - '#sound-dai-cells'</div><div class='add'>+        - vdd-buck-supply</div><div class='add'>+        - vdd-buck-sido-supply</div><div class='add'>+        - vdd-io-supply</div><div class='add'>+        - vdd-rx-supply</div><div class='add'>+        - vdd-tx-supply</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks: false</div><div class='add'>+        clock-names: false</div><div class='add'>+        interrupts: false</div><div class='add'>+        interrupt-names: false</div><div class='add'>+        interrupt-controller: false</div><div class='add'>+        '#interrupt-cells': false</div><div class='add'>+        reset-gpios: false</div><div class='add'>+        slim-ifc-dev: false</div><div class='add'>+        '#sound-dai-cells': false</div><div class='add'>+        vdd-buck-supply: false</div><div class='add'>+        vdd-buck-sido-supply: false</div><div class='add'>+        vdd-io-supply: false</div><div class='add'>+        vdd-micbias-supply: false</div><div class='add'>+        vdd-rx-supply: false</div><div class='add'>+        vdd-tx-supply: false</div><div class='add'>+        vdd-vbat-supply: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    tasha_ifd: codec@0,0 {</div><div class='add'>+        compatible = "slim217,1a0";</div><div class='add'>+        reg = &lt;0 0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    codec@1,0 {</div><div class='add'>+        compatible = "slim217,1a0";</div><div class='add'>+        reg = &lt;1 0&gt;;</div><div class='add'>+</div><div class='add'>+        clock-names = "mclk", "slimbus";</div><div class='add'>+        clocks = &lt;&amp;div1_mclk&gt;, &lt;&amp;rpmcc RPM_SMD_BB_CLK1&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-parent = &lt;&amp;tlmm&gt;;</div><div class='add'>+        interrupts = &lt;54 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;53 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "intr1", "intr2";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        reset-gpios = &lt;&amp;tlmm 64 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        slim-ifc-dev = &lt;&amp;tasha_ifd&gt;;</div><div class='add'>+        #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        vdd-buck-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+        vdd-buck-sido-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+        vdd-tx-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+        vdd-rx-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+        vdd-io-supply = &lt;&amp;vreg_s4a_1p8&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml<br/>index 9b225dbf8b79..4df59f3b7b01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,wcd934x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for Qualcomm WCD9340/WCD9341 Audio Codec</div><div class='add'>+title: Qualcomm WCD9340/WCD9341 Audio Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -28,7 +28,9 @@ properties:</div><div class='ctx'>     description: GPIO spec for reset line to use</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  slim-ifc-dev: true</div><div class='add'>+  slim-ifc-dev:</div><div class='add'>+    description: IFC device interface</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -127,11 +129,12 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   gpio@42:</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: ../gpio/qcom,wcd934x-gpio.yaml#</div><div class='add'>+    $ref: /schemas/gpio/qcom,wcd934x-gpio.yaml#</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     description: |</div><div class='ctx'>       WCD934x subnode for each slave devices. Bindings of each subnodes</div><div class='ctx'>       depends on the specific driver providing the functionality and</div><div class='hunk'>@@ -147,21 +150,50 @@ patternProperties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - reset-gpios</div><div class='del'>-  - slim-ifc-dev</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-controller</div><div class='del'>-  - clock-frequency</div><div class='del'>-  - clock-output-names</div><div class='del'>-  - qcom,micbias1-microvolt</div><div class='del'>-  - qcom,micbias2-microvolt</div><div class='del'>-  - qcom,micbias3-microvolt</div><div class='del'>-  - qcom,micbias4-microvolt</div><div class='del'>-  - "#interrupt-cells"</div><div class='del'>-  - "#clock-cells"</div><div class='del'>-  - "#sound-dai-cells"</div><div class='del'>-  - "#address-cells"</div><div class='del'>-  - "#size-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - slim-ifc-dev</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - reset-gpios</div><div class='add'>+        - slim-ifc-dev</div><div class='add'>+        - interrupt-controller</div><div class='add'>+        - clock-frequency</div><div class='add'>+        - clock-output-names</div><div class='add'>+        - qcom,micbias1-microvolt</div><div class='add'>+        - qcom,micbias2-microvolt</div><div class='add'>+        - qcom,micbias3-microvolt</div><div class='add'>+        - qcom,micbias4-microvolt</div><div class='add'>+        - "#interrupt-cells"</div><div class='add'>+        - "#clock-cells"</div><div class='add'>+        - "#sound-dai-cells"</div><div class='add'>+        - "#address-cells"</div><div class='add'>+        - "#size-cells"</div><div class='add'>+      oneOf:</div><div class='add'>+        - required:</div><div class='add'>+            - interrupts-extended</div><div class='add'>+        - required:</div><div class='add'>+            - interrupts</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reset-gpios: false</div><div class='add'>+        slim-ifc-dev: false</div><div class='add'>+        interrupts: false</div><div class='add'>+        interrupt-controller: false</div><div class='add'>+        clock-frequency: false</div><div class='add'>+        clock-output-names: false</div><div class='add'>+        qcom,micbias1-microvolt: false</div><div class='add'>+        qcom,micbias2-microvolt: false</div><div class='add'>+        qcom,micbias3-microvolt: false</div><div class='add'>+        qcom,micbias4-microvolt: false</div><div class='add'>+        "#interrupt-cells": false</div><div class='add'>+        "#clock-cells": false</div><div class='add'>+        "#sound-dai-cells": false</div><div class='add'>+        "#address-cells": false</div><div class='add'>+        "#size-cells": false</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml<br/>index 49a267b306f6..b430dd3e1841 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,wcd938x-sdw.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,wcd938x-sdw.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for Qualcomm SoundWire Slave devices on WCD9380/WCD9385</div><div class='add'>+title: Qualcomm SoundWire Slave devices on WCD9380/WCD9385</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml b/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml<br/>index 7bf1a5fffcd2..018565793a3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,wcd938x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for Qualcomm WCD9380/WCD9385 Audio Codec</div><div class='add'>+title: Qualcomm WCD9380/WCD9385 Audio Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -13,6 +13,9 @@ description: |</div><div class='ctx'>   Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.</div><div class='ctx'>   It has RX and TX Soundwire slave devices.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -36,6 +39,9 @@ properties:</div><div class='ctx'>   vdd-io-supply:</div><div class='ctx'>     description: A reference to the 1.8V I/O supply</div><div class='ctx'> </div><div class='add'>+  vdd-mic-bias-supply:</div><div class='add'>+    description: A reference to the 3.8V mic bias supply</div><div class='add'>+</div><div class='ctx'>   qcom,tx-device:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='ctx'>     description: A reference to Soundwire tx device phandle</div><div class='hunk'>@@ -103,7 +109,7 @@ required:</div><div class='ctx'>   - qcom,micbias4-microvolt</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml b/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml<br/>index ea44d03e58ca..ac03672ebf6d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,wsa881x.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/qcom,wsa881x.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for Qualcomm WSA8810/WSA8815 Class-D Smart Speaker Amplifier</div><div class='add'>+title: Qualcomm WSA8810/WSA8815 Class-D Smart Speaker Amplifier</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='hunk'>@@ -15,6 +15,9 @@ description: |</div><div class='ctx'>   Their primary operating mode uses a SoundWire digital audio</div><div class='ctx'>   interface. This binding is for SoundWire interface.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: sdw10217201000</div><div class='hunk'>@@ -39,7 +42,7 @@ required:</div><div class='ctx'>   - "#thermal-sensor-cells"</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml b/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml<br/>new file mode 100644<br/>index 000000000000..ba572a7f4f3c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/qcom,wsa883x.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/qcom,wsa883x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm WSA8830/WSA8832/WSA8835</div><div class='add'>+  smart speaker amplifier</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  WSA883X is the Qualcomm Aqstic smart speaker amplifier</div><div class='add'>+  Their primary operating mode uses a SoundWire digital audio</div><div class='add'>+  interface. This binding is for SoundWire interface.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sdw10217020200</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  powerdown-gpios:</div><div class='add'>+    description: GPIO spec for Powerdown/Shutdown line to use (pin SD_N)</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: VDD Supply for the Codec</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - powerdown-gpios</div><div class='add'>+  - "#thermal-sensor-cells"</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    soundwire-controller@3250000 {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0x3250000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+        speaker@0,1 {</div><div class='add'>+            compatible = "sdw10217020200";</div><div class='add'>+            reg = &lt;0 1&gt;;</div><div class='add'>+            powerdown-gpios = &lt;&amp;tlmm 1 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vreg_s10b_1p8&gt;;</div><div class='add'>+            #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            sound-name-prefix = "SpkrLeft";</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        speaker@0,2 {</div><div class='add'>+            compatible = "sdw10217020200";</div><div class='add'>+            reg = &lt;0 2&gt;;</div><div class='add'>+            powerdown-gpios = &lt;&amp;tlmm 89 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vreg_s10b_1p8&gt;;</div><div class='add'>+            #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            sound-name-prefix = "SpkrRight";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/realtek,alc5632.yaml b/Documentation/devicetree/bindings/sound/realtek,alc5632.yaml<br/>new file mode 100644<br/>index 000000000000..fb05988ff7ea<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/realtek,alc5632.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/realtek,alc5632.yaml</a></div><div class='hunk'>@@ -0,0 +1,63 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/realtek,alc5632.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ALC5632 audio CODEC</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Pins on the device (for linking into audio routes):</div><div class='add'>+      * SPK_OUTP</div><div class='add'>+      * SPK_OUTN</div><div class='add'>+      * HP_OUT_L</div><div class='add'>+      * HP_OUT_R</div><div class='add'>+      * AUX_OUT_P</div><div class='add'>+      * AUX_OUT_N</div><div class='add'>+      * LINE_IN_L</div><div class='add'>+      * LINE_IN_R</div><div class='add'>+      * PHONE_P</div><div class='add'>+      * PHONE_N</div><div class='add'>+      * MIC1_P</div><div class='add'>+      * MIC1_N</div><div class='add'>+      * MIC2_P</div><div class='add'>+      * MIC2_N</div><div class='add'>+      * MICBIAS1</div><div class='add'>+      * DMICDAT</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Leon Romanovsky &lt;leon@leon.nu&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: realtek,alc5632</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "realtek,alc5632";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml b/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml<br/>index fdb7f295ef2d..7dac9e6f7f08 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/realtek,rt1015p.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/realtek,rt1015p.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Realtek rt1015p codec devicetree bindings</div><div class='add'>+title: Realtek rt1015p codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Tzung-Bi Shih &lt;tzungbi@google.com&gt;</div><div class='add'>+  - Tzung-Bi Shih &lt;tzungbi@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   Rt1015p is a rt1015 variant which does not support I2C and</div><div class='hunk'>@@ -25,6 +25,9 @@ properties:</div><div class='ctx'>       0 means shut down; 1 means power on.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml b/Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml<br/>index ca5b8987b749..ecfa7a576866 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/realtek,rt5682s.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/realtek,rt5682s.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Realtek rt5682s codec devicetree bindings</div><div class='add'>+title: Realtek rt5682s codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Derek Fang &lt;derek.fang@realtek.com&gt;</div><div class='hunk'>@@ -12,6 +12,9 @@ maintainers:</div><div class='ctx'> description: |</div><div class='ctx'>   Rt5682s(ALC5682I-VS) is a rt5682i variant which supports I2C only.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: realtek,rt5682s</div><div class='hunk'>@@ -87,11 +90,32 @@ properties:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'>     description: Name given for DAI word clock and bit clock outputs.</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  AVDD-supply:</div><div class='add'>+    description: Regulator supplying analog power through the AVDD pin.</div><div class='add'>+</div><div class='add'>+  MICVDD-supply:</div><div class='add'>+    description: Regulator supplying power for the microphone bias through the</div><div class='add'>+      MICVDD pin.</div><div class='add'>+</div><div class='add'>+  DBVDD-supply:</div><div class='add'>+    description: Regulator supplying I/O power through the DBVDD pin.</div><div class='add'>+</div><div class='add'>+  LDO1-IN-supply:</div><div class='add'>+    description: Regulator supplying power to the digital core and charge pump</div><div class='add'>+      through the LDO1_IN pin.</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - AVDD-supply</div><div class='add'>+  - MICVDD-supply</div><div class='add'>+  - DBVDD-supply</div><div class='add'>+  - LDO1-IN-supply</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -117,5 +141,10 @@ examples:</div><div class='ctx'> </div><div class='ctx'>             clocks = &lt;&amp;osc&gt;;</div><div class='ctx'>             clock-names = "mclk";</div><div class='add'>+</div><div class='add'>+            AVDD-supply = &lt;&amp;avdd_reg&gt;;</div><div class='add'>+            MICVDD-supply = &lt;&amp;micvdd_reg&gt;;</div><div class='add'>+            DBVDD-supply = &lt;&amp;dbvdd_reg&gt;;</div><div class='add'>+            LDO1-IN-supply = &lt;&amp;ldo1_in_reg&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/renesas,fsi.yaml b/Documentation/devicetree/bindings/sound/renesas,fsi.yaml<br/>index 0dd3f7361399..df91991699a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/renesas,fsi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/renesas,fsi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/renesas,fsi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/renesas,fsi.yaml</a></div><div class='hunk'>@@ -9,6 +9,9 @@ title: Renesas FIFO-buffered Serial Interface (FSI)</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='ctx'>     pattern: "^sound@.*"</div><div class='hunk'>@@ -64,7 +67,7 @@ required:</div><div class='ctx'>   - power-domains</div><div class='ctx'>   - '#sound-dai-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/renesas,idt821034.yaml b/Documentation/devicetree/bindings/sound/renesas,idt821034.yaml<br/>new file mode 100644<br/>index 000000000000..a2b92dba5529<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/renesas,idt821034.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/renesas,idt821034.yaml</a></div><div class='hunk'>@@ -0,0 +1,75 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/renesas,idt821034.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas IDT821034 codec device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Herve Codina &lt;herve.codina@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The IDT821034 codec is a four channel PCM codec with onchip filters and</div><div class='add'>+  programmable gain setting.</div><div class='add'>+</div><div class='add'>+  The time-slots used by the codec must be set and so, the properties</div><div class='add'>+  'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and</div><div class='add'>+  'dai-tdm-slot-rx-mask' must be present in the ALSA sound card node for</div><div class='add'>+  sub-nodes that involve the codec. The codec uses one 8bit time-slot per</div><div class='add'>+  channel.</div><div class='add'>+  'dai-tdm-tdm-slot-with' must be set to 8.</div><div class='add'>+</div><div class='add'>+  The IDT821034 codec also supports 5 gpios (SLIC signals) per channel.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,idt821034</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description:</div><div class='add'>+      SPI device address.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 8192000</div><div class='add'>+</div><div class='add'>+  spi-cpha: true</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - spi-cpha</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+  - gpio-controller</div><div class='add'>+  - '#gpio-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        audio-codec@0 {</div><div class='add'>+            compatible = "renesas,idt821034";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;8192000&gt;;</div><div class='add'>+            spi-cpha;</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            gpio-controller;</div><div class='add'>+            #gpio-cells = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml b/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml<br/>index e17c0245f77a..8a821dec9526 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/renesas,rsnd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/renesas,rsnd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/renesas,rsnd.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/renesas,rsnd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Renesas R-Car Sound Driver Device Tree Bindings</div><div class='add'>+title: Renesas R-Car Sound Driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='hunk'>@@ -18,8 +18,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - renesas,rcar_sound-r8a7778   # R-Car M1A</div><div class='ctx'>               - renesas,rcar_sound-r8a7779   # R-Car H1</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,rcar_sound-gen1</div><div class='add'>+          - const: renesas,rcar_sound-gen1</div><div class='ctx'>       # for Gen2 SoC</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -32,8 +31,7 @@ properties:</div><div class='ctx'>               - renesas,rcar_sound-r8a7791   # R-Car M2-W</div><div class='ctx'>               - renesas,rcar_sound-r8a7793   # R-Car M2-N</div><div class='ctx'>               - renesas,rcar_sound-r8a7794   # R-Car E2</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,rcar_sound-gen2</div><div class='add'>+          - const: renesas,rcar_sound-gen2</div><div class='ctx'>       # for Gen3 SoC</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -47,14 +45,16 @@ properties:</div><div class='ctx'>               - renesas,rcar_sound-r8a77965  # R-Car M3-N</div><div class='ctx'>               - renesas,rcar_sound-r8a77990  # R-Car E3</div><div class='ctx'>               - renesas,rcar_sound-r8a77995  # R-Car D3</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,rcar_sound-gen3</div><div class='del'>-      # for Generic</div><div class='add'>+          - const: renesas,rcar_sound-gen3</div><div class='add'>+      # for Gen4 SoC</div><div class='ctx'>       - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - renesas,rcar_sound-gen1</div><div class='del'>-              - renesas,rcar_sound-gen2</div><div class='del'>-              - renesas,rcar_sound-gen3</div><div class='add'>+          - const: renesas,rcar_sound-r8a779g0  # R-Car V4H</div><div class='add'>+          - const: renesas,rcar_sound-gen4</div><div class='add'>+      # for Generic</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,rcar_sound-gen1</div><div class='add'>+          - renesas,rcar_sound-gen2</div><div class='add'>+          - renesas,rcar_sound-gen3</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -68,6 +68,7 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       it must be 0 if your system is using single DAI</div><div class='ctx'>       it must be 1 if your system is using multi  DAIs</div><div class='add'>+      This is used on simple-audio-card</div><div class='ctx'>     enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>   "#clock-cells":</div><div class='hunk'>@@ -100,28 +101,37 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     description: List of necessary clock names.</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 31</div><div class='del'>-    items:</div><div class='del'>-      oneOf:</div><div class='del'>-        - const: ssi-all</div><div class='del'>-        - pattern: '^ssi\.[0-9]$'</div><div class='del'>-        - pattern: '^src\.[0-9]$'</div><div class='del'>-        - pattern: '^mix\.[0-1]$'</div><div class='del'>-        - pattern: '^ctu\.[0-1]$'</div><div class='del'>-        - pattern: '^dvc\.[0-1]$'</div><div class='del'>-        - pattern: '^clk_(a|b|c|i)$'</div><div class='add'>+    # details are defined below</div><div class='ctx'> </div><div class='ctx'>   ports:</div><div class='del'>-    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    $ref: audio-graph-port.yaml#/definitions/port-base</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     patternProperties:</div><div class='del'>-      port(@[0-9a-f]+)?:</div><div class='del'>-        $ref: audio-graph-port.yaml#</div><div class='add'>+      '^port(@[0-9a-f]+)?$':</div><div class='add'>+        $ref: audio-graph-port.yaml#/definitions/port-base</div><div class='ctx'>         unevaluatedProperties: false</div><div class='add'>+        patternProperties:</div><div class='add'>+          "^endpoint(@[0-9a-f]+)?":</div><div class='add'>+            $ref: audio-graph-port.yaml#/definitions/endpoint-base</div><div class='add'>+            properties:</div><div class='add'>+              playback:</div><div class='add'>+                $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+              capture:</div><div class='add'>+                $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+            unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>   port:</div><div class='del'>-    $ref: audio-graph-port.yaml#</div><div class='add'>+    $ref: audio-graph-port.yaml#/definitions/port-base</div><div class='ctx'>     unevaluatedProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^endpoint(@[0-9a-f]+)?":</div><div class='add'>+        $ref: audio-graph-port.yaml#/definitions/endpoint-base</div><div class='add'>+        properties:</div><div class='add'>+          playback:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+          capture:</div><div class='add'>+            $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+        unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>   rcar_sound,dvc:</div><div class='ctx'>     description: DVC subnode.</div><div class='hunk'>@@ -129,11 +139,13 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^dvc-[0-1]$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           dmas:</div><div class='ctx'>             maxItems: 1</div><div class='ctx'>           dma-names:</div><div class='del'>-            const: "tx"</div><div class='add'>+            const: tx</div><div class='ctx'>         required:</div><div class='ctx'>           - dmas</div><div class='ctx'>           - dma-names</div><div class='hunk'>@@ -145,7 +157,7 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^mix-[0-1]$":</div><div class='ctx'>         type: object</div><div class='del'>-        # no properties</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>   rcar_sound,ctu:</div><div class='hunk'>@@ -154,7 +166,7 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^ctu-[0-7]$":</div><div class='ctx'>         type: object</div><div class='del'>-        # no properties</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>   rcar_sound,src:</div><div class='hunk'>@@ -163,6 +175,8 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^src-[0-9]$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           interrupts:</div><div class='ctx'>             maxItems: 1</div><div class='hunk'>@@ -174,10 +188,6 @@ properties:</div><div class='ctx'>                   enum:</div><div class='ctx'>                     - tx</div><div class='ctx'>                     - rx</div><div class='del'>-        required:</div><div class='del'>-          - interrupts</div><div class='del'>-          - dmas</div><div class='del'>-          - dma-names</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>   rcar_sound,ssiu:</div><div class='hunk'>@@ -186,6 +196,8 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^ssiu-[0-9]+$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           dmas:</div><div class='ctx'>             maxItems: 2</div><div class='hunk'>@@ -206,6 +218,8 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^ssi-[0-9]$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           interrupts:</div><div class='ctx'>             maxItems: 1</div><div class='hunk'>@@ -232,8 +246,6 @@ properties:</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>         required:</div><div class='ctx'>           - interrupts</div><div class='del'>-          - dmas</div><div class='del'>-          - dma-names</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>   # For DAI base</div><div class='hunk'>@@ -243,6 +255,8 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^dai([0-9]+)?$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='add'>+</div><div class='ctx'>         properties:</div><div class='ctx'>           playback:</div><div class='ctx'>             $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='hunk'>@@ -261,9 +275,14 @@ required:</div><div class='ctx'>   - reg-names</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='del'>-  - "#sound-dai-cells"</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+  # --------------------</div><div class='add'>+  # reg/reg-names</div><div class='add'>+  # --------------------</div><div class='add'>+  # for Gen1</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -274,18 +293,24 @@ allOf:</div><div class='ctx'>         reg:</div><div class='ctx'>           maxItems: 3</div><div class='ctx'>         reg-names:</div><div class='del'>-          maxItems: 3</div><div class='ctx'>           items:</div><div class='ctx'>             enum:</div><div class='ctx'>               - scu</div><div class='ctx'>               - ssi</div><div class='ctx'>               - adg</div><div class='del'>-    else:</div><div class='add'>+  # for Gen2/Gen3</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,rcar_sound-gen2</div><div class='add'>+              - renesas,rcar_sound-gen3</div><div class='add'>+    then:</div><div class='ctx'>       properties:</div><div class='ctx'>         reg:</div><div class='del'>-          maxItems: 5</div><div class='add'>+          minItems: 5</div><div class='ctx'>         reg-names:</div><div class='del'>-          maxItems: 5</div><div class='ctx'>           items:</div><div class='ctx'>             enum:</div><div class='ctx'>               - scu</div><div class='hunk'>@@ -293,35 +318,87 @@ allOf:</div><div class='ctx'>               - ssiu</div><div class='ctx'>               - ssi</div><div class='ctx'>               - audmapp</div><div class='add'>+  # for Gen4</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,rcar_sound-gen4</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        reg-names:</div><div class='add'>+          items:</div><div class='add'>+            enum:</div><div class='add'>+              - adg</div><div class='add'>+              - ssiu</div><div class='add'>+              - ssi</div><div class='add'>+              - sdmc</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+  # --------------------</div><div class='add'>+  # clock-names</div><div class='add'>+  # --------------------</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: renesas,rcar_sound-gen4</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 3</div><div class='add'>+          items:</div><div class='add'>+            enum:</div><div class='add'>+              - ssi.0</div><div class='add'>+              - ssiu.0</div><div class='add'>+              - clkin</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 31</div><div class='add'>+          items:</div><div class='add'>+            oneOf:</div><div class='add'>+              - const: ssi-all</div><div class='add'>+              - pattern: '^ssi\.[0-9]$'</div><div class='add'>+              - pattern: '^src\.[0-9]$'</div><div class='add'>+              - pattern: '^mix\.[0-1]$'</div><div class='add'>+              - pattern: '^ctu\.[0-1]$'</div><div class='add'>+              - pattern: '^dvc\.[0-1]$'</div><div class='add'>+              - pattern: '^clk_(a|b|c|i)$'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a7790-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/r8a7790-sysc.h&gt;</div><div class='ctx'>     rcar_sound: sound@ec500000 {</div><div class='ctx'>         #sound-dai-cells = &lt;1&gt;;</div><div class='ctx'>         compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";</div><div class='ctx'>         reg = &lt;0xec500000 0x1000&gt;, /* SCU  */</div><div class='ctx'>               &lt;0xec5a0000 0x100&gt;,  /* ADG  */</div><div class='ctx'>               &lt;0xec540000 0x1000&gt;, /* SSIU */</div><div class='del'>-              &lt;0xec541000 0x1280&gt;, /* SSI  */</div><div class='add'>+              &lt;0xec541000 0x280&gt;,  /* SSI  */</div><div class='ctx'>               &lt;0xec740000 0x200&gt;;  /* Audio DMAC peri peri*/</div><div class='ctx'>         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";</div><div class='ctx'> </div><div class='del'>-        clocks = &lt;&amp;mstp10_clks 1005&gt;,                      /* SSI-ALL    */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1006&gt;, &lt;&amp;mstp10_clks 1007&gt;, /* SSI9, SSI8 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1008&gt;, &lt;&amp;mstp10_clks 1009&gt;, /* SSI7, SSI6 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1010&gt;, &lt;&amp;mstp10_clks 1011&gt;, /* SSI5, SSI4 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1012&gt;, &lt;&amp;mstp10_clks 1013&gt;, /* SSI3, SSI2 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1014&gt;, &lt;&amp;mstp10_clks 1015&gt;, /* SSI1, SSI0 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1022&gt;, &lt;&amp;mstp10_clks 1023&gt;, /* SRC9, SRC8 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1024&gt;, &lt;&amp;mstp10_clks 1025&gt;, /* SRC7, SRC6 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1026&gt;, &lt;&amp;mstp10_clks 1027&gt;, /* SRC5, SRC4 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1028&gt;, &lt;&amp;mstp10_clks 1029&gt;, /* SRC3, SRC2 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1030&gt;, &lt;&amp;mstp10_clks 1031&gt;, /* SRC1, SRC0 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1020&gt;, &lt;&amp;mstp10_clks 1021&gt;, /* MIX1, MIX0 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1020&gt;, &lt;&amp;mstp10_clks 1021&gt;, /* CTU1, CTU0 */</div><div class='del'>-                 &lt;&amp;mstp10_clks 1019&gt;, &lt;&amp;mstp10_clks 1018&gt;, /* DVC0, DVC1 */</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 1005&gt;,                      /* SSI-ALL    */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1006&gt;, &lt;&amp;cpg CPG_MOD 1007&gt;, /* SSI9, SSI8 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1008&gt;, &lt;&amp;cpg CPG_MOD 1009&gt;, /* SSI7, SSI6 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1010&gt;, &lt;&amp;cpg CPG_MOD 1011&gt;, /* SSI5, SSI4 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1012&gt;, &lt;&amp;cpg CPG_MOD 1013&gt;, /* SSI3, SSI2 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1014&gt;, &lt;&amp;cpg CPG_MOD 1015&gt;, /* SSI1, SSI0 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1022&gt;, &lt;&amp;cpg CPG_MOD 1023&gt;, /* SRC9, SRC8 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1024&gt;, &lt;&amp;cpg CPG_MOD 1025&gt;, /* SRC7, SRC6 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1026&gt;, &lt;&amp;cpg CPG_MOD 1027&gt;, /* SRC5, SRC4 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1028&gt;, &lt;&amp;cpg CPG_MOD 1029&gt;, /* SRC3, SRC2 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1030&gt;, &lt;&amp;cpg CPG_MOD 1031&gt;, /* SRC1, SRC0 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1020&gt;, &lt;&amp;cpg CPG_MOD 1021&gt;, /* MIX1, MIX0 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1020&gt;, &lt;&amp;cpg CPG_MOD 1021&gt;, /* CTU1, CTU0 */</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD 1019&gt;, &lt;&amp;cpg CPG_MOD 1018&gt;, /* DVC0, DVC1 */</div><div class='ctx'>                  &lt;&amp;audio_clk_a&gt;, &lt;&amp;audio_clk_b&gt;,           /* CLKA, CLKB */</div><div class='ctx'>                  &lt;&amp;audio_clk_c&gt;, &lt;&amp;audio_clk_i&gt;;           /* CLKC, CLKI */</div><div class='ctx'> </div><div class='hunk'>@@ -342,6 +419,17 @@ examples:</div><div class='ctx'>                       "clk_a", "clk_b",</div><div class='ctx'>                       "clk_c", "clk_i";</div><div class='ctx'> </div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7790_PD_ALWAYS_ON&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;cpg 1005&gt;,</div><div class='add'>+                 &lt;&amp;cpg 1006&gt;, &lt;&amp;cpg 1007&gt;, &lt;&amp;cpg 1008&gt;, &lt;&amp;cpg 1009&gt;,</div><div class='add'>+                 &lt;&amp;cpg 1010&gt;, &lt;&amp;cpg 1011&gt;, &lt;&amp;cpg 1012&gt;, &lt;&amp;cpg 1013&gt;,</div><div class='add'>+                 &lt;&amp;cpg 1014&gt;, &lt;&amp;cpg 1015&gt;;</div><div class='add'>+        reset-names = "ssi-all",</div><div class='add'>+                      "ssi.9", "ssi.8", "ssi.7", "ssi.6",</div><div class='add'>+                      "ssi.5", "ssi.4", "ssi.3", "ssi.2",</div><div class='add'>+                      "ssi.1", "ssi.0";</div><div class='add'>+</div><div class='ctx'>         rcar_sound,dvc {</div><div class='ctx'>                dvc0: dvc-0 {</div><div class='ctx'>                     dmas = &lt;&amp;audma0 0xbc&gt;;</div><div class='hunk'>@@ -374,7 +462,7 @@ examples:</div><div class='ctx'>                 status = "disabled";</div><div class='ctx'>             };</div><div class='ctx'>             src1: src-1 {</div><div class='del'>-                interrupts = &lt;0 353 0&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>                 dmas = &lt;&amp;audma0 0x87&gt;, &lt;&amp;audma1 0x9c&gt;;</div><div class='ctx'>                 dma-names = "rx", "tx";</div><div class='ctx'>             };</div><div class='hunk'>@@ -395,12 +483,12 @@ examples:</div><div class='ctx'> </div><div class='ctx'>         rcar_sound,ssi {</div><div class='ctx'>             ssi0: ssi-0 {</div><div class='del'>-                interrupts = &lt;0 370 1&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>                 dmas = &lt;&amp;audma0 0x01&gt;, &lt;&amp;audma1 0x02&gt;;</div><div class='ctx'>                 dma-names = "rx", "tx";</div><div class='ctx'>             };</div><div class='ctx'>             ssi1: ssi-1 {</div><div class='del'>-                interrupts = &lt;0 371 1&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>                 dmas = &lt;&amp;audma0 0x03&gt;, &lt;&amp;audma1 0x04&gt;;</div><div class='ctx'>                 dma-names = "rx", "tx";</div><div class='ctx'>             };</div><div class='hunk'>@@ -442,7 +530,6 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'>     /* assume audio-graph */</div><div class='ctx'>     codec {</div><div class='ctx'>         port {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml b/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml<br/>index 7e8d252f7bca..3b5ae45eee4a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml</a></div><div class='hunk'>@@ -9,10 +9,14 @@ title: Renesas RZ/{G2L,V2L} ASoC Sound Serial Interface (SSIF-2)</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - renesas,r9a07g043-ssi  # RZ/G2UL</div><div class='ctx'>           - renesas,r9a07g044-ssi  # RZ/G2{L,LC}</div><div class='ctx'>           - renesas,r9a07g054-ssi  # RZ/V2L</div><div class='ctx'>       - const: renesas,rz-ssi</div><div class='hunk'>@@ -21,14 +25,18 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    maxItems: 4</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: int_req</div><div class='del'>-      - const: dma_rx</div><div class='del'>-      - const: dma_tx</div><div class='del'>-      - const: dma_rt</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: int_req</div><div class='add'>+          - const: dma_rx</div><div class='add'>+          - const: dma_tx</div><div class='add'>+      - items:</div><div class='add'>+          - const: int_req</div><div class='add'>+          - const: dma_rt</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 4</div><div class='hunk'>@@ -50,7 +58,7 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'>     description:</div><div class='del'>-      The first cell represents a phandle to dmac</div><div class='add'>+      The first cell represents a phandle to dmac.</div><div class='ctx'>       The second cell specifies the encoded MID/RID values of the SSI port</div><div class='ctx'>       connected to the DMA client and the slave channel configuration</div><div class='ctx'>       parameters.</div><div class='hunk'>@@ -89,7 +97,7 @@ required:</div><div class='ctx'>   - resets</div><div class='ctx'>   - '#sound-dai-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='hunk'>@@ -102,9 +110,8 @@ examples:</div><div class='ctx'>             reg = &lt;0x10049c00 0x400&gt;;</div><div class='ctx'>             interrupts = &lt;GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='ctx'>                          &lt;GIC_SPI 327 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-                         &lt;GIC_SPI 328 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-                         &lt;GIC_SPI 329 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-            interrupt-names = "int_req", "dma_rx", "dma_tx", "dma_rt";</div><div class='add'>+                         &lt;GIC_SPI 328 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            interrupt-names = "int_req", "dma_rx", "dma_tx";</div><div class='ctx'>             clocks = &lt;&amp;cpg CPG_MOD R9A07G044_SSI0_PCLK2&gt;,</div><div class='ctx'>                      &lt;&amp;cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR&gt;,</div><div class='ctx'>                      &lt;&amp;audio_clk1&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/richtek,rt9120.yaml b/Documentation/devicetree/bindings/sound/richtek,rt9120.yaml<br/>index 5655ca568240..a1242e8e0687 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/richtek,rt9120.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/richtek,rt9120.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/richtek,rt9120.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/richtek,rt9120.yaml</a></div><div class='hunk'>@@ -16,6 +16,9 @@ description: |</div><div class='ctx'>   applications like as TV, monitors. home entertainment, electronic music</div><div class='ctx'>   equipment.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -42,7 +45,7 @@ required:</div><div class='ctx'>   - dvdd-supply</div><div class='ctx'>   - '#sound-dai-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml<br/>index 6a7c004bef17..7bb6c5dff786 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml</a></div><div class='hunk'>@@ -14,6 +14,9 @@ description:</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Nicolas Frattaroli &lt;frattaroli.nicolas@gmail.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -21,6 +24,7 @@ properties:</div><div class='ctx'>       - rockchip,rk1808-i2s-tdm</div><div class='ctx'>       - rockchip,rk3308-i2s-tdm</div><div class='ctx'>       - rockchip,rk3568-i2s-tdm</div><div class='add'>+      - rockchip,rk3588-i2s-tdm</div><div class='ctx'>       - rockchip,rv1126-i2s-tdm</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -82,6 +86,13 @@ properties:</div><div class='ctx'>         - tx-m</div><div class='ctx'>         - rx-m</div><div class='ctx'> </div><div class='add'>+  port:</div><div class='add'>+    $ref: audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   rockchip,grf:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='hunk'>@@ -135,10 +146,9 @@ required:</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - resets</div><div class='ctx'>   - reset-names</div><div class='del'>-  - rockchip,grf</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rockchip,pdm.yaml b/Documentation/devicetree/bindings/sound/rockchip,pdm.yaml<br/>index 22e1cf6c0592..ff9e400494f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip,pdm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip,pdm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip,pdm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rockchip,pdm.yaml</a></div><div class='hunk'>@@ -16,6 +16,9 @@ description:</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -83,7 +86,7 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml b/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml<br/>index 75b3b33b5f1f..5cdb8bcc687b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rockchip,rk3328-codec.yaml</a></div><div class='hunk'>@@ -8,6 +8,9 @@ title: Rockchip rk3328 internal codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -53,7 +56,7 @@ required:</div><div class='ctx'>   - rockchip,grf</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml b/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml<br/>index 5ea16b8ef93f..fcb01abffa97 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rockchip-i2s.yaml</a></div><div class='hunk'>@@ -13,6 +13,9 @@ description:</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -31,6 +34,7 @@ properties:</div><div class='ctx'>               - rockchip,rk3366-i2s</div><div class='ctx'>               - rockchip,rk3368-i2s</div><div class='ctx'>               - rockchip,rk3399-i2s</div><div class='add'>+              - rockchip,rk3588-i2s</div><div class='ctx'>               - rockchip,rv1126-i2s</div><div class='ctx'>           - const: rockchip,rk3066-i2s</div><div class='ctx'> </div><div class='hunk'>@@ -61,6 +65,13 @@ properties:</div><div class='ctx'>           - const: tx</div><div class='ctx'>           - const: rx</div><div class='ctx'> </div><div class='add'>+  pinctrl-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: default</div><div class='add'>+      - items:</div><div class='add'>+          - const: bclk_on</div><div class='add'>+          - const: bclk_off</div><div class='add'>+</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -72,6 +83,10 @@ properties:</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='add'>+  port:</div><div class='add'>+    $ref: audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>   rockchip,capture-channels:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     default: 2</div><div class='hunk'>@@ -104,7 +119,7 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml b/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml<br/>index d0a24bf928d6..4f51b2fa82db 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rockchip-spdif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rockchip-spdif.yaml</a></div><div class='hunk'>@@ -75,17 +75,18 @@ required:</div><div class='ctx'>   - dma-names</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        const: rockchip,rk3288-spdif</div><div class='del'>-</div><div class='del'>-then:</div><div class='del'>-  required:</div><div class='del'>-    - rockchip,grf</div><div class='del'>-</div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: rockchip,rk3288-spdif</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - rockchip,grf</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rohm,bd28623.yaml b/Documentation/devicetree/bindings/sound/rohm,bd28623.yaml<br/>index 859ce64da152..5abcf92bc484 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rohm,bd28623.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rohm,bd28623.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rohm,bd28623.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rohm,bd28623.yaml</a></div><div class='hunk'>@@ -14,6 +14,9 @@ description:</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Katsuhiro Suzuki &lt;katsuhiro@katsuster.net&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: rohm,bd28623</div><div class='hunk'>@@ -50,7 +53,7 @@ required:</div><div class='ctx'>   - VCCP2-supply</div><div class='ctx'>   - "#sound-dai-cells"</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rt5640.txt b/Documentation/devicetree/bindings/sound/rt5640.txt<br/>index ff1228713f7e..0c398581d52b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rt5640.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rt5640.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rt5640.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rt5640.txt</a></div><div class='hunk'>@@ -20,6 +20,9 @@ Optional properties:</div><div class='ctx'> - realtek,in3-differential</div><div class='ctx'>   Boolean. Indicate MIC1/2/3 input are differential, rather than single-ended.</div><div class='ctx'> </div><div class='add'>+- realtek,lout-differential</div><div class='add'>+  Boolean. Indicate LOUT output is differential, rather than stereo.</div><div class='add'>+</div><div class='ctx'> - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.</div><div class='ctx'> </div><div class='ctx'> - realtek,dmic1-data-pin</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rt5659.txt b/Documentation/devicetree/bindings/sound/rt5659.txt<br/>index 013f534fa059..8f3f62c0226a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rt5659.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rt5659.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rt5659.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rt5659.txt</a></div><div class='hunk'>@@ -42,7 +42,7 @@ Optional properties:</div><div class='ctx'> - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.</div><div class='ctx'> - realtek,reset-gpios : The GPIO that controls the CODEC's RESET pin.</div><div class='ctx'> </div><div class='del'>-- sound-name-prefix: Please refer to name-prefix.yaml</div><div class='add'>+- sound-name-prefix: Please refer to dai-common.yaml</div><div class='ctx'> </div><div class='ctx'> - ports: A Codec may have a single or multiple I2S interfaces. These</div><div class='ctx'>   interfaces on Codec side can be described under 'ports' or 'port'.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/rt5682.txt b/Documentation/devicetree/bindings/sound/rt5682.txt<br/>index cd8c53d8497e..5e1d08de18a5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rt5682.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/rt5682.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/rt5682.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/rt5682.txt</a></div><div class='hunk'>@@ -8,6 +8,21 @@ Required properties:</div><div class='ctx'> </div><div class='ctx'> - reg : The I2C address of the device.</div><div class='ctx'> </div><div class='add'>+- AVDD-supply: phandle to the regulator supplying analog power through the</div><div class='add'>+  AVDD pin</div><div class='add'>+</div><div class='add'>+- MICVDD-supply: phandle to the regulator supplying power for the microphone</div><div class='add'>+  bias through the MICVDD pin. Either MICVDD or VBAT should be present.</div><div class='add'>+</div><div class='add'>+- VBAT-supply: phandle to the regulator supplying battery power through the</div><div class='add'>+  VBAT pin. Either MICVDD or VBAT should be present.</div><div class='add'>+</div><div class='add'>+- DBVDD-supply: phandle to the regulator supplying I/O power through the DBVDD</div><div class='add'>+  pin.</div><div class='add'>+</div><div class='add'>+- LDO1-IN-supply: phandle to the regulator supplying power to the digital core</div><div class='add'>+  and charge pump through the LDO1_IN pin.</div><div class='add'>+</div><div class='ctx'> Optional properties:</div><div class='ctx'> </div><div class='ctx'> - interrupts : The CODEC's interrupt output.</div><div class='hunk'>@@ -46,6 +61,8 @@ Optional properties:</div><div class='ctx'> </div><div class='ctx'> - realtek,dmic-clk-driving-high : Set the high driving of the DMIC clock out.</div><div class='ctx'> </div><div class='add'>+- #sound-dai-cells: Should be set to '&lt;1&gt;'.</div><div class='add'>+</div><div class='ctx'> Pins on the device (for linking into audio routes) for RT5682:</div><div class='ctx'> </div><div class='ctx'>   * DMIC L1</div><div class='hunk'>@@ -73,4 +90,9 @@ rt5682 {</div><div class='ctx'> </div><div class='ctx'> 	clocks = &lt;&amp;osc&gt;;</div><div class='ctx'> 	clock-names = "mclk";</div><div class='add'>+</div><div class='add'>+	AVDD-supply = &lt;&amp;avdd_reg&gt;;</div><div class='add'>+	MICVDD-supply = &lt;&amp;micvdd_reg&gt;;</div><div class='add'>+	DBVDD-supply = &lt;&amp;dbvdd_reg&gt;;</div><div class='add'>+	LDO1-IN-supply = &lt;&amp;ldo1_in_reg&gt;;</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml b/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml<br/>index 97f83eeaf091..447e013f6e17 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cpu:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='ctx'>         minItems: 2</div><div class='hunk'>@@ -34,6 +35,7 @@ properties:</div><div class='ctx'>       - sound-dai</div><div class='ctx'> </div><div class='ctx'>   codec:</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     type: object</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='hunk'>@@ -149,4 +151,3 @@ examples:</div><div class='ctx'>             sound-dai = &lt;&amp;wm8994&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung,arndale.yaml b/Documentation/devicetree/bindings/sound/samsung,arndale.yaml<br/>index cea2bf3544f0..9bc4585bb6e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,arndale.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,arndale.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,arndale.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung,arndale.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Insignal Arndale boards audio complex</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml b/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml<br/>index ec50bcb4af5f..31095913e330 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cpu:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='ctx'>         maxItems: 1</div><div class='hunk'>@@ -28,6 +29,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   codec:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='ctx'>         maxItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung,odroid.yaml b/Documentation/devicetree/bindings/sound/samsung,odroid.yaml<br/>index db2513f3e168..c6751c40e63f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,odroid.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,odroid.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,odroid.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung,odroid.yaml</a></div><div class='hunk'>@@ -35,17 +35,20 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cpu:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='ctx'>         description: phandles to the I2S controllers</div><div class='ctx'> </div><div class='ctx'>   codec:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='add'>+        minItems: 1</div><div class='ctx'>         items:</div><div class='del'>-          - description: phandle of the MAX98090 CODEC</div><div class='ctx'>           - description: phandle of the HDMI IP block node</div><div class='add'>+          - description: phandle of the MAX98090 CODEC</div><div class='ctx'> </div><div class='ctx'>   samsung,audio-routing:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/non-unique-string-array</div><div class='hunk'>@@ -92,4 +95,3 @@ examples:</div><div class='ctx'>             sound-dai = &lt;&amp;hdmi&gt;, &lt;&amp;max98090&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml b/Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml<br/>index cb51af90435e..ac151d3c1d77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung,smdk5250.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung SMDK5250 audio complex with WM8994 codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung,snow.yaml b/Documentation/devicetree/bindings/sound/samsung,snow.yaml<br/>index 0c3b3302b842..3d49aa4c9be2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,snow.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,snow.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,snow.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung,snow.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Google Snow audio complex with MAX9809x codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   codec:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='ctx'>         description: List of phandles to the CODEC and HDMI IP nodes.</div><div class='hunk'>@@ -30,6 +31,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   cpu:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     properties:</div><div class='ctx'>       sound-dai:</div><div class='ctx'>         description: Phandle to the Samsung I2S controller.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung,tm2.yaml b/Documentation/devicetree/bindings/sound/samsung,tm2.yaml<br/>index 74712d6f3ef4..491e08019c04 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,tm2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung,tm2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung,tm2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung,tm2.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos5433 TM2(E) audio complex with WM5110 codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml<br/>index 84c4d6cba521..30b3b6e9824b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung-i2s.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/samsung-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/samsung-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/samsung-i2s.yaml</a></div><div class='hunk'>@@ -10,6 +10,9 @@ maintainers:</div><div class='ctx'>   - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'>   - Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -34,12 +37,20 @@ properties:</div><div class='ctx'>       samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports</div><div class='ctx'>       stereo channels. Exynos7 I2S1 upgraded to 5.1 multichannel with</div><div class='ctx'>       slightly modified bit offsets.</div><div class='add'>+</div><div class='add'>+      tesla,fsd-i2s: for 8/16/24bit stereo channel I2S for playback and</div><div class='add'>+      capture, secondary FIFO using external DMA, s/w reset control,</div><div class='add'>+      internal mux for root clock source with all root clock sampling</div><div class='add'>+      frequencies supported by Exynos7 I2S and 7.1 channel TDM support</div><div class='add'>+      for playback and capture TDM (Time division multiplexing) to allow</div><div class='add'>+      transfer of multiple channel audio data on single data line.</div><div class='ctx'>     enum:</div><div class='ctx'>       - samsung,s3c6410-i2s</div><div class='ctx'>       - samsung,s5pv210-i2s</div><div class='ctx'>       - samsung,exynos5420-i2s</div><div class='ctx'>       - samsung,exynos7-i2s</div><div class='ctx'>       - samsung,exynos7-i2s1</div><div class='add'>+      - tesla,fsd-i2s</div><div class='ctx'> </div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -64,9 +75,6 @@ properties:</div><div class='ctx'>           - const: rx</div><div class='ctx'>           - const: tx-sec</div><div class='ctx'> </div><div class='del'>-  assigned-clock-parents: true</div><div class='del'>-  assigned-clocks: true</div><div class='del'>-</div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 3</div><div class='hunk'>@@ -124,7 +132,7 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/serial-midi.yaml b/Documentation/devicetree/bindings/sound/serial-midi.yaml<br/>new file mode 100644<br/>index 000000000000..4afc29376efc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/serial-midi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/serial-midi.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/serial-midi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Generic Serial MIDI Interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Daniel Kaehn &lt;kaehndan@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Generic MIDI interface using a serial device. This denotes that a serial device is</div><div class='add'>+  dedicated to MIDI communication, either to an external MIDI device through a DIN5</div><div class='add'>+  or other connector, or to a known hardwired MIDI controller. This device must be a</div><div class='add'>+  child node of a serial node.</div><div class='add'>+</div><div class='add'>+  Can only be set to use standard baud rates corresponding to supported rates of the</div><div class='add'>+  parent serial device. If the standard MIDI baud of 31.25 kBaud is needed</div><div class='add'>+  (as would be the case if interfacing with arbitrary external MIDI devices),</div><div class='add'>+  configure the clocks of the parent serial device so that a requested baud of 38.4 kBaud</div><div class='add'>+  resuts in the standard MIDI baud rate, and set the 'current-speed' property to 38400 (default)</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: serial-midi</div><div class='add'>+</div><div class='add'>+  current-speed:</div><div class='add'>+    description: Baudrate to set the serial port to when this MIDI device is opened.</div><div class='add'>+    default: 38400</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    serial {</div><div class='add'>+        midi {</div><div class='add'>+            compatible = "serial-midi";</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    serial {</div><div class='add'>+        midi {</div><div class='add'>+            compatible = "serial-midi";</div><div class='add'>+            current-speed = &lt;115200&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/sgtl5000.yaml b/Documentation/devicetree/bindings/sound/sgtl5000.yaml<br/>index e762c320b574..1353c051488f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/sgtl5000.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/sgtl5000.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/sgtl5000.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/sgtl5000.yaml</a></div><div class='hunk'>@@ -9,6 +9,9 @@ title: Freescale SGTL5000 Stereo Codec</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabio Estevam &lt;festevam@gmail.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: fsl,sgtl5000</div><div class='hunk'>@@ -47,6 +50,7 @@ properties:</div><div class='ctx'>     description: The bias voltage to be used in mVolts. The voltage can take</div><div class='ctx'>       values from 1.25V to 3V by 250mV steps. If this node is not mentioned</div><div class='ctx'>       or the value is unknown, then the value is set to 1.25V.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [ 1250, 1500, 1750, 2000, 2250, 2500, 2750, 3000 ]</div><div class='ctx'> </div><div class='ctx'>   lrclk-strength:</div><div class='hunk'>@@ -59,7 +63,7 @@ properties:</div><div class='ctx'>         1 =		1.66 mA		2.87 mA		4.02  mA</div><div class='ctx'>         2 =		3.33 mA		5.74 mA		8.03  mA</div><div class='ctx'>         3 =		4.99 mA		8.61 mA		12.05 mA</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [ 0, 1, 2, 3 ]</div><div class='ctx'> </div><div class='ctx'>   sclk-strength:</div><div class='hunk'>@@ -72,7 +76,7 @@ properties:</div><div class='ctx'>         1 =		1.66 mA		2.87 mA		4.02  mA</div><div class='ctx'>         2 =		3.33 mA		5.74 mA		8.03  mA</div><div class='ctx'>         3 =		4.99 mA		8.61 mA		12.05 mA</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [ 0, 1, 2, 3 ]</div><div class='ctx'> </div><div class='ctx'>   port:</div><div class='hunk'>@@ -87,7 +91,7 @@ required:</div><div class='ctx'>   - VDDA-supply</div><div class='ctx'>   - VDDIO-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml b/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml<br/>index 8327846356d3..5db1f989d050 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/simple-audio-amplifier.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/simple-audio-amplifier.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Simple Audio Amplifier Device Tree Bindings</div><div class='add'>+title: Simple Audio Amplifier</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jerome Brunet &lt;jbrunet@baylibre.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/simple-audio-mux.yaml b/Documentation/devicetree/bindings/sound/simple-audio-mux.yaml<br/>index b5fc35ee9b65..9f319caf3db7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/simple-audio-mux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/simple-audio-mux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/simple-audio-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/simple-audio-mux.yaml</a></div><div class='hunk'>@@ -14,7 +14,7 @@ description: |</div><div class='ctx'>   their input line is connected to the output line.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: name-prefix.yaml#</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/simple-card.yaml b/Documentation/devicetree/bindings/sound/simple-card.yaml<br/>index b261d49b9ddb..b05e05c81cc4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/simple-card.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/simple-card.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/simple-card.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/simple-card.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/simple-card.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Simple Audio Card Driver Device Tree Bindings</div><div class='add'>+title: Simple Audio Card Driver</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='hunk'>@@ -78,7 +78,7 @@ definitions:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   prefix:</div><div class='del'>-    description: "device name prefix"</div><div class='add'>+    description: device name prefix</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'> </div><div class='ctx'>   label:</div><div class='hunk'>@@ -205,6 +205,8 @@ patternProperties:</div><div class='ctx'>     $ref: "#/definitions/dai"</div><div class='ctx'>   "^simple-audio-card,codec(@[0-9a-f]+)?$":</div><div class='ctx'>     $ref: "#/definitions/dai"</div><div class='add'>+  "^simple-audio-card,plat(@[0-9a-f]+)?$":</div><div class='add'>+    $ref: "#/definitions/dai"</div><div class='ctx'> </div><div class='ctx'>   "^simple-audio-card,dai-link(@[0-9a-f]+)?$":</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -215,6 +217,10 @@ patternProperties:</div><div class='ctx'>       reg:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='add'>+      "#address-cells":</div><div class='add'>+        const: 1</div><div class='add'>+      "#size-cells":</div><div class='add'>+        const: 0</div><div class='ctx'>       # common properties</div><div class='ctx'>       frame-master:</div><div class='ctx'>         $ref: "#/definitions/frame-master"</div><div class='hunk'>@@ -244,9 +250,9 @@ patternProperties:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='del'>-      "^cpu(@[0-9a-f]+)?":</div><div class='add'>+      "^cpu(-[0-9]+)?$":</div><div class='ctx'>         $ref: "#/definitions/dai"</div><div class='del'>-      "^codec(@[0-9a-f]+)?":</div><div class='add'>+      "^codec(-[0-9]+)?$":</div><div class='ctx'>         $ref: "#/definitions/dai"</div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -256,9 +262,9 @@ required:</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'> # single DAI link</div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'>   - |</div><div class='ctx'>     sound {</div><div class='ctx'>         compatible = "simple-audio-card";</div><div class='hunk'>@@ -285,9 +291,9 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'> # Multi DAI links</div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'>   - |</div><div class='ctx'>     sound {</div><div class='ctx'>         compatible = "simple-audio-card";</div><div class='hunk'>@@ -328,10 +334,10 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'> # route audio from IMX6 SSI2 through TLV320DAC3100 codec</div><div class='ctx'> # through TPA6130A2 amplifier to headphones:</div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'>   - |</div><div class='ctx'>     sound {</div><div class='ctx'>         compatible = "simple-audio-card";</div><div class='hunk'>@@ -353,9 +359,9 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'> # Sampling Rate Conversion</div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'>   - |</div><div class='ctx'>     sound {</div><div class='ctx'>         compatible = "simple-audio-card";</div><div class='hunk'>@@ -381,9 +387,9 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'> # 2 CPU 1 Codec (Mixing)</div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'>   - |</div><div class='ctx'>     sound {</div><div class='ctx'>         compatible = "simple-audio-card";</div><div class='hunk'>@@ -418,7 +424,7 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'> # Multi DAI links with DPCM:</div><div class='ctx'> #</div><div class='ctx'> # CPU0 ------ ak4613</div><div class='hunk'>@@ -427,7 +433,7 @@ examples:</div><div class='ctx'> # CPU3 --/                /* DPCM 5ch/6ch */</div><div class='ctx'> # CPU4 --/                /* DPCM 7ch/8ch */</div><div class='ctx'> # CPU5 ------ PCM3168A-c</div><div class='del'>-#--------------------</div><div class='add'>+# --------------------</div><div class='ctx'>   - |</div><div class='ctx'>     sound {</div><div class='ctx'>         compatible = "simple-audio-card";</div><div class='hunk'>@@ -462,16 +468,16 @@ examples:</div><div class='ctx'> </div><div class='ctx'>             convert-channels = &lt;8&gt;; /* TDM Split */</div><div class='ctx'> </div><div class='del'>-            sndcpu1: cpu0 {</div><div class='add'>+            sndcpu1: cpu-0 {</div><div class='ctx'>                 sound-dai = &lt;&amp;rcar_sound 1&gt;;</div><div class='ctx'>             };</div><div class='del'>-            cpu1 {</div><div class='add'>+            cpu-1 {</div><div class='ctx'>                 sound-dai = &lt;&amp;rcar_sound 2&gt;;</div><div class='ctx'>             };</div><div class='del'>-            cpu2 {</div><div class='add'>+            cpu-2 {</div><div class='ctx'>                 sound-dai = &lt;&amp;rcar_sound 3&gt;;</div><div class='ctx'>             };</div><div class='del'>-            cpu3 {</div><div class='add'>+            cpu-3 {</div><div class='ctx'>                 sound-dai = &lt;&amp;rcar_sound 4&gt;;</div><div class='ctx'>             };</div><div class='ctx'>             codec {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml b/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml<br/>new file mode 100644<br/>index 000000000000..56e623d4e168<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/snps,designware-i2s.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/snps,designware-i2s.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: DesignWare I2S controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jose Abreu &lt;joabreu@synopsys.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: canaan,k210-i2s</div><div class='add'>+          - const: snps,designware-i2s</div><div class='add'>+      - enum:</div><div class='add'>+          - snps,designware-i2s</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description: |</div><div class='add'>+      The interrupt line number for the I2S controller. Add this</div><div class='add'>+      parameter if the I2S controller that you are using does not</div><div class='add'>+      support DMA.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Sampling rate reference clock</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: i2sclk</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: TX DMA Channel</div><div class='add'>+      - description: RX DMA Channel</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: canaan,k210-i2s</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        "#sound-dai-cells":</div><div class='add'>+          const: 1</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        "#sound-dai-cells":</div><div class='add'>+          const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+oneOf:</div><div class='add'>+  - required:</div><div class='add'>+      - dmas</div><div class='add'>+      - dma-names</div><div class='add'>+  - required:</div><div class='add'>+      - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc_i2s: i2s@7ff90000 {</div><div class='add'>+      compatible = "snps,designware-i2s";</div><div class='add'>+      reg = &lt;0x7ff90000 0x1000&gt;;</div><div class='add'>+      clocks = &lt;&amp;scpi_i2sclk 0&gt;;</div><div class='add'>+      clock-names = "i2sclk";</div><div class='add'>+      #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+      dmas = &lt;&amp;dma0 5&gt;;</div><div class='add'>+      dma-names = "tx";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml b/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml<br/>index 70f62ecd6eb2..8600520d7c47 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/socionext,uniphier-aio.yaml</a></div><div class='hunk'>@@ -9,6 +9,9 @@ title: UniPhier AIO audio system</div><div class='ctx'> maintainers:</div><div class='ctx'>   - &lt;alsa-devel@alsa-project.org&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -39,7 +42,7 @@ properties:</div><div class='ctx'>       Specifies a phandle to soc-glue, which is used for changing mode of S/PDIF</div><div class='ctx'>       signal pin to output from Hi-Z. This property is optional if you use I2S</div><div class='ctx'>       signal pins only.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/phandle"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>   "#sound-dai-cells":</div><div class='ctx'>     const: 1</div><div class='hunk'>@@ -70,7 +73,7 @@ patternProperties:</div><div class='ctx'>     $ref: audio-graph-port.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml b/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml<br/>index be6acfda9999..985277648de1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/socionext,uniphier-evea.yaml</a></div><div class='hunk'>@@ -9,6 +9,9 @@ title: UniPhier EVEA SoC-internal sound codec</div><div class='ctx'> maintainers:</div><div class='ctx'>   - &lt;alsa-devel@alsa-project.org&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: socionext,uniphier-evea</div><div class='hunk'>@@ -48,7 +51,7 @@ patternProperties:</div><div class='ctx'>     $ref: audio-graph-port.yaml#</div><div class='ctx'>     unevaluatedProperties: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/sound-dai.yaml b/Documentation/devicetree/bindings/sound/sound-dai.yaml<br/>index 61c6f7abc4e7..ff9036e43c44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/sound-dai.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/sound-dai.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/sound-dai.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/sound-dai.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/sound-dai.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Digital Audio Interface consumer Device Tree Bindings</div><div class='add'>+title: Digital Audio Interface consumer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml b/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml<br/>index d3966ae04ad0..a040d4d31412 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/st,stm32-i2s.yaml</a></div><div class='hunk'>@@ -13,6 +13,9 @@ description:</div><div class='ctx'>   The SPI/I2S block supports I2S/PCM protocols when configured on I2S mode.</div><div class='ctx'>   Only some SPI instances support I2S.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -68,7 +71,7 @@ required:</div><div class='ctx'>   - dmas</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml b/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml<br/>index b3dbcba33e41..56d206f97a96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/st,stm32-sai.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/st,stm32-sai.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/st,stm32-sai.yaml</a></div><div class='hunk'>@@ -60,6 +60,7 @@ required:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^audio-controller@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       Two subnodes corresponding to SAI sub-block instances A et B</div><div class='ctx'>       can be defined. Subnode can be omitted for unsused sub-block.</div><div class='hunk'>@@ -121,6 +122,10 @@ patternProperties:</div><div class='ctx'>         description: Configure the SAI device as master clock provider.</div><div class='ctx'>         const: 0</div><div class='ctx'> </div><div class='add'>+      port:</div><div class='add'>+        $ref: audio-graph-port.yaml#</div><div class='add'>+        unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='ctx'>       - "#sound-dai-cells"</div><div class='hunk'>@@ -136,8 +141,7 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             const: st,stm32f4-sai</div><div class='del'>-</div><div class='del'>-  - then:</div><div class='add'>+    then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           items:</div><div class='hunk'>@@ -148,8 +152,7 @@ allOf:</div><div class='ctx'>           items:</div><div class='ctx'>             - const: x8k</div><div class='ctx'>             - const: x11k</div><div class='del'>-</div><div class='del'>-  - else:</div><div class='add'>+    else:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='ctx'>           items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml b/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml<br/>index 837e830c47ac..bc48151b9adb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/st,stm32-spdifrx.yaml</a></div><div class='hunk'>@@ -13,6 +13,9 @@ description: |</div><div class='ctx'>   The SPDIFRX peripheral, is designed to receive an S/PDIF flow compliant with</div><div class='ctx'>   IEC-60958 and IEC-61937.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -57,7 +60,7 @@ required:</div><div class='ctx'>   - dmas</div><div class='ctx'>   - dma-names</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tas2562.yaml b/Documentation/devicetree/bindings/sound/tas2562.yaml<br/>index acd4bbe69731..a5bb561bfcfb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas2562.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas2562.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas2562.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/tas2562.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> title: Texas Instruments TAS2562 Smart PA</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The TAS2562 is a mono, digital input Class-D audio amplifier optimized for</div><div class='hunk'>@@ -22,6 +22,9 @@ description: |</div><div class='ctx'>     https://www.ti.com/lit/gpn/tas2564</div><div class='ctx'>     https://www.ti.com/lit/gpn/tas2110</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -58,12 +61,12 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-   i2c0 {</div><div class='add'>+   i2c {</div><div class='ctx'>      #address-cells = &lt;1&gt;;</div><div class='ctx'>      #size-cells = &lt;0&gt;;</div><div class='ctx'>      codec: codec@4c {</div><div class='hunk'>@@ -76,4 +79,3 @@ examples:</div><div class='ctx'>        ti,imon-slot-no = &lt;0&gt;;</div><div class='ctx'>      };</div><div class='ctx'>    };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tas2770.yaml b/Documentation/devicetree/bindings/sound/tas2770.yaml<br/>index 027bebf4e8cf..26088adb9dc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas2770.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas2770.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas2770.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/tas2770.yaml</a></div><div class='hunk'>@@ -16,6 +16,9 @@ description: |</div><div class='ctx'>   Integrated speaker voltage and current sense provides for</div><div class='ctx'>   real time monitoring of loudspeaker behavior.</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -60,12 +63,12 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-   i2c0 {</div><div class='add'>+   i2c {</div><div class='ctx'>      #address-cells = &lt;1&gt;;</div><div class='ctx'>      #size-cells = &lt;0&gt;;</div><div class='ctx'>      codec: codec@41 {</div><div class='hunk'>@@ -80,4 +83,3 @@ examples:</div><div class='ctx'>        ti,vmon-slot-no = &lt;2&gt;;</div><div class='ctx'>      };</div><div class='ctx'>    };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tas2764.yaml b/Documentation/devicetree/bindings/sound/tas27xx.yaml<br/>index 5bf8c76ecda1..8cba01316855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas2764.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas2764.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas27xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/tas27xx.yaml</a></div><div class='hunk'>@@ -1,25 +1,29 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-# Copyright (C) 2020 Texas Instruments Incorporated</div><div class='add'>+# Copyright (C) 2020-2022 Texas Instruments Incorporated</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/sound/tas2764.yaml#"</div><div class='add'>+$id: "http://devicetree.org/schemas/sound/tas27xx.yaml#"</div><div class='ctx'> $schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments TAS2764 Smart PA</div><div class='add'>+title: Texas Instruments TAS2764/TAS2780 Smart PA</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Shenghao Ding &lt;shenghao-ding@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='del'>-  The TAS2764 is a mono, digital input Class-D audio amplifier optimized for</div><div class='del'>-  efficiently driving high peak power into small loudspeakers.</div><div class='del'>-  Integrated speaker voltage and current sense provides for</div><div class='del'>-  real time monitoring of loudspeaker behavior.</div><div class='add'>+  The TAS2764/TAS2780 is a mono, digital input Class-D audio amplifier</div><div class='add'>+  optimized for efficiently driving high peak power into small</div><div class='add'>+  loudspeakers. Integrated speaker voltage and current sense provides</div><div class='add'>+  for real time monitoring of loudspeaker behavior.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - ti,tas2764</div><div class='add'>+      - ti,tas2780</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -52,12 +56,12 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-   i2c0 {</div><div class='add'>+   i2c {</div><div class='ctx'>      #address-cells = &lt;1&gt;;</div><div class='ctx'>      #size-cells = &lt;0&gt;;</div><div class='ctx'>      codec: codec@38 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tas571x.txt b/Documentation/devicetree/bindings/sound/tas571x.txt<br/>index 7c8fd37c2f9e..1addc75989d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas571x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas571x.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas571x.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/tas571x.txt</a></div><div class='hunk'>@@ -12,6 +12,7 @@ Required properties:</div><div class='ctx'>   - "ti,tas5717",</div><div class='ctx'>   - "ti,tas5719",</div><div class='ctx'>   - "ti,tas5721"</div><div class='add'>+  - "ti,tas5733"</div><div class='ctx'> - reg: The I2C address of the device</div><div class='ctx'> - #sound-dai-cells: must be equal to 0</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tas5720.txt b/Documentation/devicetree/bindings/sound/tas5720.txt<br/>index df99ca9451b0..7d851ae2bba2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas5720.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas5720.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas5720.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/tas5720.txt</a></div><div class='hunk'>@@ -6,11 +6,13 @@ audio playback. For more product information please see the links below:</div><div class='ctx'> </div><div class='ctx'> https://www.ti.com/product/TAS5720L</div><div class='ctx'> https://www.ti.com/product/TAS5720M</div><div class='add'>+https://www.ti.com/product/TAS5720A-Q1</div><div class='ctx'> https://www.ti.com/product/TAS5722L</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> </div><div class='ctx'> - compatible : "ti,tas5720",</div><div class='add'>+               "ti,tas5720a-q1",</div><div class='ctx'>                "ti,tas5722"</div><div class='ctx'> - reg : I2C slave address</div><div class='ctx'> - dvdd-supply : phandle to a 3.3-V supply for the digital circuitry</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tas5805m.yaml b/Documentation/devicetree/bindings/sound/tas5805m.yaml<br/>index 3aade02d8a96..63edf52f061c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas5805m.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tas5805m.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tas5805m.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/tas5805m.yaml</a></div><div class='hunk'>@@ -39,7 +39,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>         tas5805m: tas5805m@2c {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/test-component.yaml b/Documentation/devicetree/bindings/sound/test-component.yaml<br/>index 17fdb4317239..9c40a2122dfd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/test-component.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/test-component.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/test-component.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/test-component.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/test-component.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Test Component Device Tree Bindings</div><div class='add'>+title: Test Component</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml<br/>index 6806f53a4aed..20ea5883b7ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml</a></div><div class='hunk'>@@ -80,7 +80,6 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='del'>-          minItems: 6</div><div class='ctx'>           items:</div><div class='ctx'>             - description: AUXCLK clock for McASP used by CPB audio</div><div class='ctx'>             - description: Parent for CPB_McASP auxclk (for 48KHz)</div><div class='hunk'>@@ -107,7 +106,6 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='del'>-          maxItems: 4</div><div class='ctx'>           items:</div><div class='ctx'>             - description: AUXCLK clock for McASP used by CPB audio</div><div class='ctx'>             - description: Parent for CPB_McASP auxclk (for 48KHz)</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,pcm3168a.txt b/Documentation/devicetree/bindings/sound/ti,pcm3168a.txt<br/>deleted file mode 100644<br/>index a02ecaab5183..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,pcm3168a.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,pcm3168a.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,56 +0,0 @@</div><div class='del'>-Texas Instruments pcm3168a DT bindings</div><div class='del'>-</div><div class='del'>-This driver supports both SPI and I2C bus access for this codec</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible: "ti,pcm3168a"</div><div class='del'>-</div><div class='del'>-  - clocks : Contains an entry for each entry in clock-names</div><div class='del'>-</div><div class='del'>-  - clock-names : Includes the following entries:</div><div class='del'>-	"scki"	The system clock</div><div class='del'>-</div><div class='del'>-  - VDD1-supply : Digital power supply regulator 1 (+3.3V)</div><div class='del'>-</div><div class='del'>-  - VDD2-supply : Digital power supply regulator 2 (+3.3V)</div><div class='del'>-</div><div class='del'>-  - VCCAD1-supply : ADC power supply regulator 1 (+5V)</div><div class='del'>-</div><div class='del'>-  - VCCAD2-supply : ADC power supply regulator 2 (+5V)</div><div class='del'>-</div><div class='del'>-  - VCCDA1-supply : DAC power supply regulator 1 (+5V)</div><div class='del'>-</div><div class='del'>-  - VCCDA2-supply : DAC power supply regulator 2 (+5V)</div><div class='del'>-</div><div class='del'>-For required properties on SPI/I2C, consult SPI/I2C device tree documentation</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-  - reset-gpios : Optional reset gpio line connected to RST pin of the codec.</div><div class='del'>-		  The RST line is low active:</div><div class='del'>-		  RST = low: device power-down</div><div class='del'>-		  RST = high: device is enabled</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-i2c0: i2c0@0 {</div><div class='del'>-</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	pcm3168a: audio-codec@44 {</div><div class='del'>-		compatible = "ti,pcm3168a";</div><div class='del'>-		reg = &lt;0x44&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk_core CLK_AUDIO&gt;;</div><div class='del'>-		clock-names = "scki";</div><div class='del'>-		VDD1-supply = &lt;&amp;supply3v3&gt;;</div><div class='del'>-		VDD2-supply = &lt;&amp;supply3v3&gt;;</div><div class='del'>-		VCCAD1-supply = &lt;&amp;supply5v0&gt;;</div><div class='del'>-		VCCAD2-supply = &lt;&amp;supply5v0&gt;;</div><div class='del'>-		VCCDA1-supply = &lt;&amp;supply5v0&gt;;</div><div class='del'>-		VCCDA2-supply = &lt;&amp;supply5v0&gt;;</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;dac_clk_pin&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,pcm3168a.yaml b/Documentation/devicetree/bindings/sound/ti,pcm3168a.yaml<br/>new file mode 100644<br/>index 000000000000..b6a4360ab845<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,pcm3168a.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ti,pcm3168a.yaml</a></div><div class='hunk'>@@ -0,0 +1,107 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/ti,pcm3168a.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments PCM3168A Audio Codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Damien Horsley &lt;Damien.Horsley@imgtec.com&gt;</div><div class='add'>+  - Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;</div><div class='add'>+  - Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Texas Instruments PCM3168A is a 24-bit Multi-channel Audio CODEC with</div><div class='add'>+  96/192kHz sampling rate, supporting both SPI and I2C bus access.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,pcm3168a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: System clock input</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: scki</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    items:</div><div class='add'>+      - description: |</div><div class='add'>+          GPIO line connected to the active-low RST pin of the codec.</div><div class='add'>+            RST = low: device power-down</div><div class='add'>+            RST = high: device is enabled</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+</div><div class='add'>+  VDD1-supply:</div><div class='add'>+    description: Digital power supply regulator 1 (+3.3V)</div><div class='add'>+</div><div class='add'>+  VDD2-supply:</div><div class='add'>+    description: Digital power supply regulator 2 (+3.3V)</div><div class='add'>+</div><div class='add'>+  VCCAD1-supply:</div><div class='add'>+    description: ADC power supply regulator 1 (+5V)</div><div class='add'>+</div><div class='add'>+  VCCAD2-supply:</div><div class='add'>+    description: ADC power supply regulator 2 (+5V)</div><div class='add'>+</div><div class='add'>+  VCCDA1-supply:</div><div class='add'>+    description: DAC power supply regulator 1 (+5V)</div><div class='add'>+</div><div class='add'>+  VCCDA2-supply:</div><div class='add'>+    description: DAC power supply regulator 2 (+5V)</div><div class='add'>+</div><div class='add'>+  ports:</div><div class='add'>+    $ref: audio-graph-port.yaml#/definitions/port-base</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: audio-graph-port.yaml#</div><div class='add'>+        description: Audio input port.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: audio-graph-port.yaml#</div><div class='add'>+        description: Audio output port.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - VDD1-supply</div><div class='add'>+  - VDD2-supply</div><div class='add'>+  - VCCAD1-supply</div><div class='add'>+  - VCCAD2-supply</div><div class='add'>+  - VCCDA1-supply</div><div class='add'>+  - VCCDA2-supply</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pcm3168a: audio-codec@44 {</div><div class='add'>+            compatible = "ti,pcm3168a";</div><div class='add'>+            reg = &lt;0x44&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio0 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+            clocks = &lt;&amp;clk_core 42&gt;;</div><div class='add'>+            clock-names = "scki";</div><div class='add'>+            VDD1-supply = &lt;&amp;supply3v3&gt;;</div><div class='add'>+            VDD2-supply = &lt;&amp;supply3v3&gt;;</div><div class='add'>+            VCCAD1-supply = &lt;&amp;supply5v0&gt;;</div><div class='add'>+            VCCAD2-supply = &lt;&amp;supply5v0&gt;;</div><div class='add'>+            VCCDA1-supply = &lt;&amp;supply5v0&gt;;</div><div class='add'>+            VCCDA2-supply = &lt;&amp;supply5v0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,src4xxx.yaml b/Documentation/devicetree/bindings/sound/ti,src4xxx.yaml<br/>new file mode 100644<br/>index 000000000000..27230c682d10<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,src4xxx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ti,src4xxx.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/ti,src4xxx.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments SRC4392</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The SRC4392 is a digital audio codec that can be connected via</div><div class='add'>+  I2C or SPI. Currently, only I2C bus is supported.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matt Flax &lt;flatmax@flatmax.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,src4392</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#sound-dai-cells"</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        audio-codec@70 {</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "ti,src4392";</div><div class='add'>+            reg = &lt;0x70&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml<br/>index 83936f594d1a..ede14ca2c07a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml</a></div><div class='hunk'>@@ -14,6 +14,9 @@ description: |</div><div class='ctx'>   https://www.ti.com/product/TLV320ADC3001</div><div class='ctx'>   https://www.ti.com/product/TLV320ADC3101</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='hunk'>@@ -106,7 +109,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml<br/>new file mode 100644<br/>index 000000000000..e8ca9f3369f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ti,tlv320aic3x.yaml</a></div><div class='hunk'>@@ -0,0 +1,165 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+# Copyright (C) 2022 Texas Instruments Incorporated</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/ti,tlv320aic3x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments TLV320AIC3x Codec</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  TLV320AIC3x are a series of low-power stereo audio codecs with stereo</div><div class='add'>+  headphone amplifier, as well as multiple inputs and outputs programmable in</div><div class='add'>+  single-ended or fully differential configurations.</div><div class='add'>+</div><div class='add'>+  The serial control bus supports SPI or I2C protocols, while the serial audio</div><div class='add'>+  data bus is programmable for I2S, left/right-justified, DSP, or TDM modes.</div><div class='add'>+</div><div class='add'>+  The following pins can be referred in the sound node's audio routing property:</div><div class='add'>+</div><div class='add'>+  CODEC output pins:</div><div class='add'>+     LLOUT</div><div class='add'>+     RLOUT</div><div class='add'>+     MONO_LOUT</div><div class='add'>+     HPLOUT</div><div class='add'>+     HPROUT</div><div class='add'>+     HPLCOM</div><div class='add'>+     HPRCOM</div><div class='add'>+</div><div class='add'>+  CODEC input pins for TLV320AIC3104:</div><div class='add'>+     MIC2L</div><div class='add'>+     MIC2R</div><div class='add'>+     LINE1L</div><div class='add'>+     LINE1R</div><div class='add'>+</div><div class='add'>+  CODEC input pins for other compatible codecs:</div><div class='add'>+     MIC3L</div><div class='add'>+     MIC3R</div><div class='add'>+     LINE1L</div><div class='add'>+     LINE2L</div><div class='add'>+     LINE1R</div><div class='add'>+     LINE2R</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jai Luthra &lt;j-luthra@ti.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,tlv320aic3x</div><div class='add'>+      - ti,tlv320aic33</div><div class='add'>+      - ti,tlv320aic3007</div><div class='add'>+      - ti,tlv320aic3106</div><div class='add'>+      - ti,tlv320aic3104</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO specification for the active low RESET input.</div><div class='add'>+</div><div class='add'>+  gpio-reset:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Deprecated, please use reset-gpios instead.</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  ai3x-gpio-func:</div><div class='add'>+    description: AIC3X_GPIO1 &amp; AIC3X_GPIO2 Functionality</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  ai3x-micbias-vg:</div><div class='add'>+    description: MicBias required voltage. If node is omitted then MicBias is powered down.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: 1</div><div class='add'>+        description: MICBIAS output is powered to 2.0V.</div><div class='add'>+      - const: 2</div><div class='add'>+        description: MICBIAS output is powered to 2.5V.</div><div class='add'>+      - const: 3</div><div class='add'>+        description: MICBIAS output is connected to AVDD.</div><div class='add'>+</div><div class='add'>+  ai3x-ocmv:</div><div class='add'>+    description: Output Common-Mode Voltage selection.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: 0</div><div class='add'>+        description: 1.35V</div><div class='add'>+      - const: 1</div><div class='add'>+        description: 1.5V</div><div class='add'>+      - const: 2</div><div class='add'>+        description: 1.65V</div><div class='add'>+      - const: 3</div><div class='add'>+        description: 1.8V</div><div class='add'>+</div><div class='add'>+  AVDD-supply:</div><div class='add'>+    description: Analog DAC voltage.</div><div class='add'>+</div><div class='add'>+  IOVDD-supply:</div><div class='add'>+    description: I/O voltage.</div><div class='add'>+</div><div class='add'>+  DRVDD-supply:</div><div class='add'>+    description: ADC analog and output driver voltage.</div><div class='add'>+</div><div class='add'>+  DVDD-supply:</div><div class='add'>+    description: Digital core voltage.</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: audio-graph-port.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      tlv320aic3x_i2c: audio-codec@1b {</div><div class='add'>+        compatible = "ti,tlv320aic3x";</div><div class='add'>+        reg = &lt;0x1b&gt;;</div><div class='add'>+</div><div class='add'>+        reset-gpios = &lt;&amp;gpio1 17 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+</div><div class='add'>+        AVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        IOVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        DRVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        DVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    spi {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      tlv320aic3x_spi: audio-codec@0 {</div><div class='add'>+        compatible = "ti,tlv320aic3x";</div><div class='add'>+        reg = &lt;0&gt;; /* CS number */</div><div class='add'>+        #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        AVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        IOVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        DRVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        DVDD-supply = &lt;&amp;regulator&gt;;</div><div class='add'>+        ai3x-ocmv = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml b/Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml<br/>new file mode 100644<br/>index 000000000000..785930658029<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/ti,ts3a227e.yaml</a></div><div class='hunk'>@@ -0,0 +1,94 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/ti,ts3a227e.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments TS3A227E</div><div class='add'>+  Autonomous Audio Accessory Detection and Configuration Switch</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dylan Reid &lt;dgreid@chromium.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The TS3A227E detect headsets of 3-ring and 4-ring standards and</div><div class='add'>+  switches automatically to route the microphone correctly. It also</div><div class='add'>+  handles key press detection in accordance with the Android audio</div><div class='add'>+  headset specification v1.0.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,ts3a227e</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    const: 0x3b</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ti,micbias:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Intended MICBIAS voltage (datasheet section 9.6.7).</div><div class='add'>+    enum:</div><div class='add'>+      - 0 # 2.1 V</div><div class='add'>+      - 1 # 2.2 V</div><div class='add'>+      - 2 # 2.3 V</div><div class='add'>+      - 3 # 2.4 V</div><div class='add'>+      - 4 # 2.5 V</div><div class='add'>+      - 5 # 2.6 V</div><div class='add'>+      - 6 # 2.7 V</div><div class='add'>+      - 7 # 2.8 V</div><div class='add'>+    default: 1</div><div class='add'>+</div><div class='add'>+  ti,debounce-release-ms:</div><div class='add'>+    description: key release debounce time in ms (datasheet section 9.6.7).</div><div class='add'>+    enum:</div><div class='add'>+      - 0</div><div class='add'>+      - 20</div><div class='add'>+    default: 20</div><div class='add'>+</div><div class='add'>+  ti,debounce-press-ms:</div><div class='add'>+    description: key press debounce time in ms (datasheet section 9.6.7).</div><div class='add'>+    enum:</div><div class='add'>+      - 2</div><div class='add'>+      - 40</div><div class='add'>+      - 80</div><div class='add'>+      - 120</div><div class='add'>+    default: 80</div><div class='add'>+</div><div class='add'>+  ti,debounce-insertion-ms:</div><div class='add'>+    description: headset insertion debounce time in ms (datasheet section 9.6.5).</div><div class='add'>+    enum:</div><div class='add'>+      - 2</div><div class='add'>+      - 30</div><div class='add'>+      - 60</div><div class='add'>+      - 90</div><div class='add'>+      - 120</div><div class='add'>+      - 150</div><div class='add'>+      - 1000</div><div class='add'>+      - 2000</div><div class='add'>+    default: 90</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec: audio-controller@3b {</div><div class='add'>+            compatible = "ti,ts3a227e";</div><div class='add'>+            reg = &lt;0x3b&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio1&gt;;</div><div class='add'>+            interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml b/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml<br/>index 2ad17b361db0..c16e1760cf85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tlv320adcx140.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tlv320adcx140.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/tlv320adcx140.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Dan Murphy &lt;dmurphy@ti.com&gt;</div><div class='add'>+  - Andrew Davis &lt;afd@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital</div><div class='hunk'>@@ -68,9 +68,9 @@ properties:</div><div class='ctx'>        array is defined as &lt;PDMIN1 PDMIN2 PDMIN3 PDMIN4&gt;.</div><div class='ctx'> </div><div class='ctx'>        0 - (default) Odd channel is latched on the negative edge and even</div><div class='del'>-       channel is latched on the the positive edge.</div><div class='add'>+       channel is latched on the positive edge.</div><div class='ctx'>        1 - Odd channel is latched on the positive edge and even channel is</div><div class='del'>-       latched on the the negative edge.</div><div class='add'>+       latched on the negative edge.</div><div class='ctx'> </div><div class='ctx'>        PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data</div><div class='ctx'>        PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data</div><div class='hunk'>@@ -109,38 +109,6 @@ properties:</div><div class='ctx'>       maximum: 7</div><div class='ctx'>     default: [0, 0, 0, 0]</div><div class='ctx'> </div><div class='del'>-  ti,asi-tx-drive:</div><div class='del'>-    type: boolean</div><div class='del'>-    description: |</div><div class='del'>-      When set the device will set the Tx ASI output to a Hi-Z state for unused</div><div class='del'>-      data cycles. Default is to drive the output low on unused ASI cycles.</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  '^ti,gpo-config-[1-4]$':</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='del'>-    description: |</div><div class='del'>-       Defines the configuration and output driver for the general purpose</div><div class='del'>-       output pins (GPO).  These values are pairs, the first value is for the</div><div class='del'>-       configuration type and the second value is for the output drive type.</div><div class='del'>-       The array is defined as &lt;GPO_CFG GPO_DRV&gt;</div><div class='del'>-</div><div class='del'>-       GPO output configuration can be one of the following:</div><div class='del'>-</div><div class='del'>-       0 - (default) disabled</div><div class='del'>-       1 - GPOX is configured as a general-purpose output (GPO)</div><div class='del'>-       2 - GPOX is configured as a device interrupt output (IRQ)</div><div class='del'>-       3 - GPOX is configured as a secondary ASI output (SDOUT2)</div><div class='del'>-       4 - GPOX is configured as a PDM clock output (PDMCLK)</div><div class='del'>-</div><div class='del'>-       GPO output drive configuration for the GPO pins can be one of the following:</div><div class='del'>-</div><div class='del'>-       0d - (default) Hi-Z output</div><div class='del'>-       1d - Drive active low and active high</div><div class='del'>-       2d - Drive active low and weak high</div><div class='del'>-       3d - Drive active low and Hi-Z</div><div class='del'>-       4d - Drive weak low and active high</div><div class='del'>-       5d - Drive Hi-Z and active high</div><div class='del'>-</div><div class='ctx'>   ti,gpio-config:</div><div class='ctx'>     description: |</div><div class='ctx'>        Defines the configuration and output drive for the General Purpose</div><div class='hunk'>@@ -183,6 +151,38 @@ patternProperties:</div><div class='ctx'>       maximum: 15</div><div class='ctx'>     default: [2, 2]</div><div class='ctx'> </div><div class='add'>+  ti,asi-tx-drive:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      When set the device will set the Tx ASI output to a Hi-Z state for unused</div><div class='add'>+      data cycles. Default is to drive the output low on unused ASI cycles.</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^ti,gpo-config-[1-4]$':</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    description: |</div><div class='add'>+       Defines the configuration and output driver for the general purpose</div><div class='add'>+       output pins (GPO).  These values are pairs, the first value is for the</div><div class='add'>+       configuration type and the second value is for the output drive type.</div><div class='add'>+       The array is defined as &lt;GPO_CFG GPO_DRV&gt;</div><div class='add'>+</div><div class='add'>+       GPO output configuration can be one of the following:</div><div class='add'>+</div><div class='add'>+       0 - (default) disabled</div><div class='add'>+       1 - GPOX is configured as a general-purpose output (GPO)</div><div class='add'>+       2 - GPOX is configured as a device interrupt output (IRQ)</div><div class='add'>+       3 - GPOX is configured as a secondary ASI output (SDOUT2)</div><div class='add'>+       4 - GPOX is configured as a PDM clock output (PDMCLK)</div><div class='add'>+</div><div class='add'>+       GPO output drive configuration for the GPO pins can be one of the following:</div><div class='add'>+</div><div class='add'>+       0d - (default) Hi-Z output</div><div class='add'>+       1d - Drive active low and active high</div><div class='add'>+       2d - Drive active low and weak high</div><div class='add'>+       3d - Drive active low and Hi-Z</div><div class='add'>+       4d - Drive weak low and active high</div><div class='add'>+       5d - Drive Hi-Z and active high</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -192,7 +192,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'>       codec: codec@4c {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/tlv320aic3x.txt b/Documentation/devicetree/bindings/sound/tlv320aic3x.txt<br/>deleted file mode 100644<br/>index 20931a63fd64..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/tlv320aic3x.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/tlv320aic3x.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,97 +0,0 @@</div><div class='del'>-Texas Instruments - tlv320aic3x Codec module</div><div class='del'>-</div><div class='del'>-The tlv320aic3x serial control bus communicates through both I2C and SPI bus protocols</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible - "string" - One of:</div><div class='del'>-    "ti,tlv320aic3x" - Generic TLV320AIC3x device</div><div class='del'>-    "ti,tlv320aic33" - TLV320AIC33</div><div class='del'>-    "ti,tlv320aic3007" - TLV320AIC3007</div><div class='del'>-    "ti,tlv320aic3106" - TLV320AIC3106</div><div class='del'>-    "ti,tlv320aic3104" - TLV320AIC3104</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-- reg - &lt;int&gt; -  I2C slave address</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- reset-gpios - GPIO specification for the active low RESET input.</div><div class='del'>-- ai3x-gpio-func - &lt;array of 2 int&gt; - AIC3X_GPIO1 &amp; AIC3X_GPIO2 Functionality</div><div class='del'>-				    - Not supported on tlv320aic3104</div><div class='del'>-- ai3x-micbias-vg - MicBias Voltage required.</div><div class='del'>-	1 - MICBIAS output is powered to 2.0V,</div><div class='del'>-	2 - MICBIAS output is powered to 2.5V,</div><div class='del'>-	3 - MICBIAS output is connected to AVDD,</div><div class='del'>-	If this node is not mentioned or if the value is incorrect, then MicBias</div><div class='del'>-	is powered down.</div><div class='del'>-- ai3x-ocmv - Output Common-Mode Voltage selection:</div><div class='del'>-	0 - 1.35V,</div><div class='del'>-	1 - 1.5V,</div><div class='del'>-	2 - 1.65V,</div><div class='del'>-	3 - 1.8V</div><div class='del'>-- AVDD-supply, IOVDD-supply, DRVDD-supply, DVDD-supply : power supplies for the</div><div class='del'>-  device as covered in Documentation/devicetree/bindings/regulator/regulator.txt</div><div class='del'>-</div><div class='del'>-Deprecated properties:</div><div class='del'>-</div><div class='del'>-- gpio-reset - gpio pin number used for codec reset</div><div class='del'>-</div><div class='del'>-CODEC output pins:</div><div class='del'>-  * LLOUT</div><div class='del'>-  * RLOUT</div><div class='del'>-  * MONO_LOUT</div><div class='del'>-  * HPLOUT</div><div class='del'>-  * HPROUT</div><div class='del'>-  * HPLCOM</div><div class='del'>-  * HPRCOM</div><div class='del'>-</div><div class='del'>-CODEC input pins for TLV320AIC3104:</div><div class='del'>-  * MIC2L</div><div class='del'>-  * MIC2R</div><div class='del'>-  * LINE1L</div><div class='del'>-  * LINE1R</div><div class='del'>-</div><div class='del'>-CODEC input pins for other compatible codecs:</div><div class='del'>-  * MIC3L</div><div class='del'>-  * MIC3R</div><div class='del'>-  * LINE1L</div><div class='del'>-  * LINE2L</div><div class='del'>-  * LINE1R</div><div class='del'>-  * LINE2R</div><div class='del'>-</div><div class='del'>-The pins can be used in referring sound node's audio-routing property.</div><div class='del'>-</div><div class='del'>-I2C example:</div><div class='del'>-</div><div class='del'>-#include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-</div><div class='del'>-tlv320aic3x: tlv320aic3x@1b {</div><div class='del'>-	compatible = "ti,tlv320aic3x";</div><div class='del'>-	reg = &lt;0x1b&gt;;</div><div class='del'>-</div><div class='del'>-	reset-gpios = &lt;&amp;gpio1 17 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	AVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	IOVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	DRVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	DVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-SPI example:</div><div class='del'>-</div><div class='del'>-spi0: spi@f0000000 {</div><div class='del'>-	tlv320aic3x: codec@0 {</div><div class='del'>-		compatible = "ti,tlv320aic3x";</div><div class='del'>-		reg = &lt;0&gt;; /* CS number */</div><div class='del'>-		#sound-dai-cells = &lt;0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-</div><div class='del'>-		AVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-		IOVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-		DRVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-		DVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-		ai3x-ocmv = &lt;0&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/ts3a227e.txt b/Documentation/devicetree/bindings/sound/ts3a227e.txt<br/>deleted file mode 100644<br/>index 21ab45bc7e8f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/ts3a227e.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/ts3a227e.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,30 +0,0 @@</div><div class='del'>-Texas Instruments TS3A227E</div><div class='del'>-Autonomous Audio Accessory Detection and Configuration Switch</div><div class='del'>-</div><div class='del'>-The TS3A227E detect headsets of 3-ring and 4-ring standards and</div><div class='del'>-switches automatically to route the microphone correctly.  It also</div><div class='del'>-handles key press detection in accordance with the Android audio</div><div class='del'>-headset specification v1.0.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>- - compatible:		Should contain "ti,ts3a227e".</div><div class='del'>- - reg:			The i2c address. Should contain &lt;0x3b&gt;.</div><div class='del'>- - interrupts:		Interrupt number for /INT pin from the 227e</div><div class='del'>-</div><div class='del'>-Optional properies:</div><div class='del'>- - ti,micbias:   Intended MICBIAS voltage (datasheet section 9.6.7).</div><div class='del'>-      Select 0/1/2/3/4/5/6/7 to specify MICBIAS voltage</div><div class='del'>-      2.1V/2.2V/2.3V/2.4V/2.5V/2.6V/2.7V/2.8V</div><div class='del'>-      Default value is "1" (2.2V).</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-</div><div class='del'>-	i2c {</div><div class='del'>-		ts3a227e@3b {</div><div class='del'>-			compatible = "ti,ts3a227e";</div><div class='del'>-			reg = &lt;0x3b&gt;;</div><div class='del'>-			interrupt-parent = &lt;&amp;gpio&gt;;</div><div class='del'>-			interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,arizona.yaml b/Documentation/devicetree/bindings/sound/wlf,arizona.yaml<br/>index 1627c0bb69be..8156f30eadd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,arizona.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,arizona.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,arizona.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,arizona.yaml</a></div><div class='hunk'>@@ -16,6 +16,9 @@ description: |</div><div class='ctx'>   This document lists sound specific bindings, see the primary binding</div><div class='ctx'>   document ../mfd/arizona.yaml</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8510.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8510.yaml<br/>new file mode 100644<br/>index 000000000000..6d12b0ac37e2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8510.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8510.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8510.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8510 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8510</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8510";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8523.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8523.yaml<br/>new file mode 100644<br/>index 000000000000..decc395bb873<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8523.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8523.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8523.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8523 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8523</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8523";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };        </div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8524.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8524.yaml<br/>new file mode 100644<br/>index 000000000000..4d951ece394e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8524.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8524.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8524.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wolfson WM8524 24-bit 192KHz Stereo DAC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8524</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  wlf,mute-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      a GPIO spec for the MUTE pin.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - wlf,mute-gpios</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    wm8524: codec {</div><div class='add'>+        compatible = "wlf,wm8524";</div><div class='add'>+        wlf,mute-gpios = &lt;&amp;gpio1 8 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8580.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8580.yaml<br/>new file mode 100644<br/>index 000000000000..2f27852cdc20<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8580.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8580.yaml</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8580.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8580 and WM8581 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - wlf,wm8580</div><div class='add'>+      - wlf,wm8581</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8580";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8711.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8711.yaml<br/>new file mode 100644<br/>index 000000000000..ecaac2818b44<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8711.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8711.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8711.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8711 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8711</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8711";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8728.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8728.yaml<br/>new file mode 100644<br/>index 000000000000..fc89475a051e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8728.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8728.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8728.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8728 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8728</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8728";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8731.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8731.yaml<br/>new file mode 100644<br/>index 000000000000..858c0f689581<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8731.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8731.yaml</a></div><div class='hunk'>@@ -0,0 +1,99 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8731.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wolfson Microelectromics WM8731 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Wolfson Microelectronics WM8731 audio CODEC</div><div class='add'>+</div><div class='add'>+  Pins on the device (for linking into audio routes):</div><div class='add'>+    * LOUT: Left Channel Line Output</div><div class='add'>+    * ROUT: Right Channel Line Output</div><div class='add'>+    * LHPOUT: Left Channel Headphone Output</div><div class='add'>+    * RHPOUT: Right Channel Headphone Output</div><div class='add'>+    * LLINEIN: Left Channel Line Input</div><div class='add'>+    * RLINEIN: Right Channel Line Input</div><div class='add'>+    * MICIN: Microphone Input</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - wlf,wm8731</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Clock provider for MCLK pin.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  AVDD-supply:</div><div class='add'>+    description: Analog power supply regulator on the AVDD pin.</div><div class='add'>+</div><div class='add'>+  HPVDD-supply:</div><div class='add'>+    description: Headphone power supply regulator on the HPVDD pin.</div><div class='add'>+</div><div class='add'>+  DBVDD-supply:</div><div class='add'>+    description: Digital buffer supply regulator for the DBVDD pin.</div><div class='add'>+</div><div class='add'>+  DCVDD-supply:</div><div class='add'>+    description: Digital core supply regulator for the DCVDD pin.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+  - compatible</div><div class='add'>+  - AVDD-supply</div><div class='add'>+  - HPVDD-supply</div><div class='add'>+  - DBVDD-supply</div><div class='add'>+  - DCVDD-supply</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        wm8731_i2c: codec@0 {</div><div class='add'>+            compatible = "wlf,wm8731";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;12500000&gt;;</div><div class='add'>+</div><div class='add'>+            AVDD-supply = &lt;&amp;avdd_reg&gt;;</div><div class='add'>+            HPVDD-supply = &lt;&amp;hpvdd_reg&gt;;</div><div class='add'>+            DCVDD-supply = &lt;&amp;dcvdd_reg&gt;;</div><div class='add'>+            DBVDD-supply = &lt;&amp;dbvdd_reg&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        wm8731_spi: codec@1b {</div><div class='add'>+            compatible = "wlf,wm8731";</div><div class='add'>+            reg = &lt;0x1b&gt;;</div><div class='add'>+</div><div class='add'>+            AVDD-supply = &lt;&amp;avdd_reg&gt;;</div><div class='add'>+            HPVDD-supply = &lt;&amp;hpvdd_reg&gt;;</div><div class='add'>+            DCVDD-supply = &lt;&amp;dcvdd_reg&gt;;</div><div class='add'>+            DBVDD-supply = &lt;&amp;dbvdd_reg&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8737.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8737.yaml<br/>new file mode 100644<br/>index 000000000000..12d8765726d8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8737.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8737.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8737.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8737 audio CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8737</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8737";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8753.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8753.yaml<br/>new file mode 100644<br/>index 000000000000..9eebe7d7f0b7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8753.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8753.yaml</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8753.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: WM8753 audio CODEC</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Pins on the device (for linking into audio routes):</div><div class='add'>+      * LOUT1</div><div class='add'>+      * LOUT2</div><div class='add'>+      * ROUT1</div><div class='add'>+      * ROUT2</div><div class='add'>+      * MONO1</div><div class='add'>+      * MONO2</div><div class='add'>+      * OUT3</div><div class='add'>+      * OUT4</div><div class='add'>+      * LINE1</div><div class='add'>+      * LINE2</div><div class='add'>+      * RXP</div><div class='add'>+      * RXN</div><div class='add'>+      * ACIN</div><div class='add'>+      * ACOP</div><div class='add'>+      * MIC1N</div><div class='add'>+      * MIC1</div><div class='add'>+      * MIC2N</div><div class='add'>+      * MIC2</div><div class='add'>+      * Mic Bias</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8753</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#sound-dai-cells":</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        codec@1a {</div><div class='add'>+            compatible = "wlf,wm8753";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml<br/>new file mode 100644<br/>index 000000000000..3e809217c4ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8940.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8940.yaml</a></div><div class='hunk'>@@ -0,0 +1,60 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8940.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wolfson WM8940 Codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8940</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  spi-max-frequency:</div><div class='add'>+    maximum: 526000</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@0 {</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "wlf,wm8940";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;500000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@1a {</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            compatible = "wlf,wm8940";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml<br/>new file mode 100644<br/>index 000000000000..ee8eba7f0104<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8960.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8960.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8960.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wolfson WM8960 audio codec</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8960</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mclk</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  wlf,capless:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, OUT3 pin will be enabled and disabled together with HP_L and</div><div class='add'>+      HP_R pins in response to jack detect events.</div><div class='add'>+</div><div class='add'>+  wlf,gpio-cfg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description: |</div><div class='add'>+      A list of GPIO configuration register values.</div><div class='add'>+       - gpio-cfg[0]: ALRCGPIO of R9 (Audio interface)</div><div class='add'>+       - gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).</div><div class='add'>+</div><div class='add'>+  wlf,hp-cfg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 3</div><div class='add'>+    description: |</div><div class='add'>+      A list of headphone jack detect configuration register values:</div><div class='add'>+       - hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).</div><div class='add'>+       - hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).</div><div class='add'>+       - hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).</div><div class='add'>+</div><div class='add'>+  wlf,shared-lrclk:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, the LRCM bit of R24 (Additional control 2) gets set,</div><div class='add'>+      indicating that ADCLRC and DACLRC pins will be disabled only when ADC</div><div class='add'>+      (Left and Right) and DAC (Left and Right) are disabled.</div><div class='add'>+      When WM8960 works on synchronize mode and DACLRC pin is used to supply</div><div class='add'>+      frame clock, it will no frame clock for captrue unless enable DAC to</div><div class='add'>+      enable DACLRC pin. If shared-lrclk is present, no need to enable DAC for</div><div class='add'>+      captrue.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        audio-codec@1a {</div><div class='add'>+            compatible = "wlf,wm8960";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+            clocks = &lt;&amp;clks 0&gt;;</div><div class='add'>+            clock-names = "mclk";</div><div class='add'>+            #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+            wlf,hp-cfg = &lt;3 2 3&gt;;</div><div class='add'>+            wlf,gpio-cfg = &lt;1 3&gt;;</div><div class='add'>+            wlf,shared-lrclk;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8961.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8961.yaml<br/>new file mode 100644<br/>index 000000000000..f58078545569<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8961.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8961.yaml</a></div><div class='hunk'>@@ -0,0 +1,43 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8961.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wolfson WM8961 Ultra-Low Power Stereo CODEC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: wlf,wm8961</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          wm8961: codec@4a {</div><div class='add'>+                  compatible = "wlf,wm8961";</div><div class='add'>+                  reg = &lt;0x4a&gt;;</div><div class='add'>+                  #sound-dai-cells = &lt;0&gt;;</div><div class='add'>+          };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8962.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8962.yaml<br/>index 5e172e9462b9..5fe0b2c9f99f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8962.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8962.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8962.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8962.yaml</a></div><div class='hunk'>@@ -9,6 +9,9 @@ title: Wolfson WM8962 Ultra-Low Power Stereo CODEC</div><div class='ctx'> maintainers:</div><div class='ctx'>   - patches@opensource.cirrus.com</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: wlf,wm8962</div><div class='hunk'>@@ -87,7 +90,7 @@ required:</div><div class='ctx'>   - SPKVDD1-supply</div><div class='ctx'>   - SPKVDD2-supply</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml<br/>index 96cf9fc9c8b0..efb5f9f6cc7a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wlf,wm8978.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8978.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8978.yaml</a></div><div class='hunk'>@@ -4,11 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sound/wlf,wm8978.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Wolfson WM8978 Codec Device Tree Bindings</div><div class='add'>+title: Wolfson WM8978 Codec</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - patches@opensource.cirrus.com</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   '#sound-dai-cells':</div><div class='ctx'>     const: 0</div><div class='hunk'>@@ -27,7 +30,7 @@ required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml b/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml<br/>new file mode 100644<br/>index 000000000000..8f045de02850<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wlf,wm8994.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/wlf,wm8994.yaml</a></div><div class='hunk'>@@ -0,0 +1,194 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sound/wlf,wm8994.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Wolfson WM1811/WM8994/WM8958 audio codecs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+  - patches@opensource.cirrus.com</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  These devices support both I2C and SPI (configured with pin strapping on the</div><div class='add'>+  board).</div><div class='add'>+</div><div class='add'>+  Pins on the device (for linking into audio routes):</div><div class='add'>+  IN1LN, IN1LP, IN2LN, IN2LP:VXRN, IN1RN, IN1RP, IN2RN, IN2RP:VXRP, SPKOUTLP,</div><div class='add'>+  SPKOUTLN, SPKOUTRP, SPKOUTRN, HPOUT1L, HPOUT1R, HPOUT2P, HPOUT2N, LINEOUT1P,</div><div class='add'>+  LINEOUT1N, LINEOUT2P, LINEOUT2N.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - wlf,wm1811</div><div class='add'>+      - wlf,wm8994</div><div class='add'>+      - wlf,wm8958</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: MCLK1</div><div class='add'>+      - const: MCLK2</div><div class='add'>+</div><div class='add'>+  gpio-controller: true</div><div class='add'>+</div><div class='add'>+  '#gpio-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 2</div><div class='add'>+    description:</div><div class='add'>+      The first cell is the IRQ number. The second cell is the flags, encoded</div><div class='add'>+      as the trigger masks.</div><div class='add'>+</div><div class='add'>+  AVDD1-supply: true</div><div class='add'>+  AVDD2-supply: true</div><div class='add'>+  CPVDD-supply: true</div><div class='add'>+  DBVDD-supply: true</div><div class='add'>+  DBVDD1-supply: true</div><div class='add'>+  DBVDD2-supply: true</div><div class='add'>+  DBVDD3-supply: true</div><div class='add'>+  DCVDD-supply: true</div><div class='add'>+  LDO1VDD-supply: true</div><div class='add'>+  LDO2VDD-supply: true</div><div class='add'>+  SPKVDD1-supply: true</div><div class='add'>+  SPKVDD2-supply: true</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  wlf,gpio-cfg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 11</div><div class='add'>+    description:</div><div class='add'>+      A list of GPIO configuration register values. If absent, no configuration</div><div class='add'>+      of these registers is performed. If any value is over 0xffff then the</div><div class='add'>+      register will be left as default. If present 11 values must be supplied.</div><div class='add'>+</div><div class='add'>+  wlf,micbias-cfg:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    maxItems: 2</div><div class='add'>+    description:</div><div class='add'>+      Two MICBIAS register values for WM1811 or WM8958.  If absent the register</div><div class='add'>+      defaults will be used.</div><div class='add'>+</div><div class='add'>+  wlf,ldo1ena-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Control of LDO1ENA input to device.</div><div class='add'>+</div><div class='add'>+  wlf,ldo2ena-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      Control of LDO2ENA input to device.</div><div class='add'>+</div><div class='add'>+  wlf,lineout1-se:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      LINEOUT1 is in single ended mode.</div><div class='add'>+</div><div class='add'>+  wlf,lineout2-se:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      INEOUT2 is in single ended mode.</div><div class='add'>+</div><div class='add'>+  wlf,lineout1-feedback:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      LINEOUT1 has common mode feedback connected.</div><div class='add'>+</div><div class='add'>+  wlf,lineout2-feedback:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      LINEOUT2 has common mode feedback connected.</div><div class='add'>+</div><div class='add'>+  wlf,ldoena-always-driven:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      LDOENA is always driven.</div><div class='add'>+</div><div class='add'>+  wlf,spkmode-pu:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Enable the internal pull-up resistor on the SPKMODE pin.</div><div class='add'>+</div><div class='add'>+  wlf,csnaddr-pd:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Enable the internal pull-down resistor on the CS/ADDR pin.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - AVDD2-supply</div><div class='add'>+  - CPVDD-supply</div><div class='add'>+  - SPKVDD1-supply</div><div class='add'>+  - SPKVDD2-supply</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - wlf,wm1811</div><div class='add'>+            - wlf,wm8958</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        DBVDD-supply: false</div><div class='add'>+        LDO2VDD-supply: false</div><div class='add'>+      required:</div><div class='add'>+        - DBVDD1-supply</div><div class='add'>+        - DBVDD2-supply</div><div class='add'>+        - DBVDD3-supply</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        DBVDD1-supply: false</div><div class='add'>+        DBVDD2-supply: false</div><div class='add'>+        DBVDD3-supply: false</div><div class='add'>+      required:</div><div class='add'>+        - DBVDD-supply</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        audio-codec@1a {</div><div class='add'>+            compatible = "wlf,wm1811";</div><div class='add'>+            reg = &lt;0x1a&gt;;</div><div class='add'>+            clocks = &lt;&amp;i2s0 0&gt;;</div><div class='add'>+            clock-names = "MCLK1";</div><div class='add'>+</div><div class='add'>+            AVDD2-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+            CPVDD-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+            DBVDD1-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+            DBVDD2-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+            DBVDD3-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+            LDO1VDD-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+            SPKVDD1-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+            SPKVDD2-supply = &lt;&amp;main_dc_reg&gt;;</div><div class='add'>+</div><div class='add'>+            wlf,ldo1ena-gpios = &lt;&amp;gpb0 0 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+            wlf,ldo2ena-gpios = &lt;&amp;gpb0 1 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8510.txt b/Documentation/devicetree/bindings/sound/wm8510.txt<br/>deleted file mode 100644<br/>index e6b6cc041f89..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8510.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8510.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-WM8510 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8510"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8510: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8510";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8523.txt b/Documentation/devicetree/bindings/sound/wm8523.txt<br/>deleted file mode 100644<br/>index f3a6485f4b8a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8523.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8523.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-WM8523 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports I2C only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8523"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8523: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8523";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8524.txt b/Documentation/devicetree/bindings/sound/wm8524.txt<br/>deleted file mode 100644<br/>index f6c0c263b135..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8524.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8524.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-WM8524 audio CODEC</div><div class='del'>-</div><div class='del'>-This device does not use I2C or SPI but a simple Hardware Control Interface.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8524"</div><div class='del'>-</div><div class='del'>-  - wlf,mute-gpios: a GPIO spec for the MUTE pin.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8524: codec {</div><div class='del'>-	compatible = "wlf,wm8524";</div><div class='del'>-	wlf,mute-gpios = &lt;&amp;gpio1 8 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8580.txt b/Documentation/devicetree/bindings/sound/wm8580.txt<br/>deleted file mode 100644<br/>index ff3f9f5f2111..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8580.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8580.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,16 +0,0 @@</div><div class='del'>-WM8580 and WM8581 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports I2C only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8580", "wlf,wm8581"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8580: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8580";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8711.txt b/Documentation/devicetree/bindings/sound/wm8711.txt<br/>deleted file mode 100644<br/>index c30a1387c4bf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8711.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8711.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-WM8711 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8711"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8711: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8711";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8728.txt b/Documentation/devicetree/bindings/sound/wm8728.txt<br/>deleted file mode 100644<br/>index a3608b4c78b9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8728.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8728.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-WM8728 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8728"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8728: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8728";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8731.txt b/Documentation/devicetree/bindings/sound/wm8731.txt<br/>deleted file mode 100644<br/>index f660d9bb0e69..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8731.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8731.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-WM8731 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8731"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8731: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8731";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-Available audio endpoints for an audio-routing table:</div><div class='del'>- * LOUT: Left Channel Line Output</div><div class='del'>- * ROUT: Right Channel Line Output</div><div class='del'>- * LHPOUT: Left Channel Headphone Output</div><div class='del'>- * RHPOUT: Right Channel Headphone Output</div><div class='del'>- * LLINEIN: Left Channel Line Input</div><div class='del'>- * RLINEIN: Right Channel Line Input</div><div class='del'>- * MICIN: Microphone Input</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8737.txt b/Documentation/devicetree/bindings/sound/wm8737.txt<br/>deleted file mode 100644<br/>index eda1ec6a7563..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8737.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8737.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-WM8737 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8737"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8737: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8737";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8753.txt b/Documentation/devicetree/bindings/sound/wm8753.txt<br/>deleted file mode 100644<br/>index eca9e5a825a9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8753.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8753.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,40 +0,0 @@</div><div class='del'>-WM8753 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8753"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-Pins on the device (for linking into audio routes):</div><div class='del'>-</div><div class='del'>-  * LOUT1</div><div class='del'>-  * LOUT2</div><div class='del'>-  * ROUT1</div><div class='del'>-  * ROUT2</div><div class='del'>-  * MONO1</div><div class='del'>-  * MONO2</div><div class='del'>-  * OUT3</div><div class='del'>-  * OUT4</div><div class='del'>-  * LINE1</div><div class='del'>-  * LINE2</div><div class='del'>-  * RXP</div><div class='del'>-  * RXN</div><div class='del'>-  * ACIN</div><div class='del'>-  * ACOP</div><div class='del'>-  * MIC1N</div><div class='del'>-  * MIC1</div><div class='del'>-  * MIC2N</div><div class='del'>-  * MIC2</div><div class='del'>-  * Mic Bias</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8753: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8753";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8960.txt b/Documentation/devicetree/bindings/sound/wm8960.txt<br/>deleted file mode 100644<br/>index 85d3b287108c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8960.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8960.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,42 +0,0 @@</div><div class='del'>-WM8960 audio CODEC</div><div class='del'>-</div><div class='del'>-This device supports I2C only.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : "wlf,wm8960"</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-  - wlf,shared-lrclk: This is a boolean property. If present, the LRCM bit of</div><div class='del'>-	R24 (Additional control 2) gets set, indicating that ADCLRC and DACLRC pins</div><div class='del'>-	will be disabled only when ADC (Left and Right) and DAC (Left and Right)</div><div class='del'>-	are disabled.</div><div class='del'>-	When wm8960 works on synchronize mode and DACLRC pin is used to supply</div><div class='del'>-	frame clock, it will no frame clock for captrue unless enable DAC to enable</div><div class='del'>-	DACLRC pin. If shared-lrclk is present, no need to enable DAC for captrue.</div><div class='del'>-</div><div class='del'>-  - wlf,capless: This is a boolean property. If present, OUT3 pin will be</div><div class='del'>-	enabled and disabled together with HP_L and HP_R pins in response to jack</div><div class='del'>-	detect events.</div><div class='del'>-</div><div class='del'>-  - wlf,hp-cfg: A list of headphone jack detect configuration register values.</div><div class='del'>-		The list must be 3 entries long.</div><div class='del'>-		hp-cfg[0]: HPSEL[1:0] of R48 (Additional Control 4).</div><div class='del'>-		hp-cfg[1]: {HPSWEN:HPSWPOL} of R24 (Additional Control 2).</div><div class='del'>-		hp-cfg[2]: {TOCLKSEL:TOEN} of R23 (Additional Control 1).</div><div class='del'>-</div><div class='del'>-  - wlf,gpio-cfg: A list of GPIO configuration register values.</div><div class='del'>-		  The list must be 2 entries long.</div><div class='del'>-		  gpio-cfg[0]: ALRCGPIO of R9 (Audio interface)</div><div class='del'>-		  gpio-cfg[1]: {GPIOPOL:GPIOSEL[2:0]} of R48 (Additional Control 4).</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8960: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8960";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-</div><div class='del'>-	wlf,shared-lrclk;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/wm8994.txt b/Documentation/devicetree/bindings/sound/wm8994.txt<br/>deleted file mode 100644<br/>index 8fa947509c10..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/wm8994.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/wm8994.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,112 +0,0 @@</div><div class='del'>-WM1811/WM8994/WM8958 audio CODEC</div><div class='del'>-</div><div class='del'>-These devices support both I2C and SPI (configured with pin strapping</div><div class='del'>-on the board).</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-  - compatible : One of "wlf,wm1811", "wlf,wm8994" or "wlf,wm8958".</div><div class='del'>-</div><div class='del'>-  - reg : the I2C address of the device for I2C, the chip select</div><div class='del'>-          number for SPI.</div><div class='del'>-</div><div class='del'>-  - gpio-controller : Indicates this device is a GPIO controller.</div><div class='del'>-  - #gpio-cells : Must be 2. The first cell is the pin number and the</div><div class='del'>-    second cell is used to specify optional parameters (currently unused).</div><div class='del'>-</div><div class='del'>-  - power supplies for the device, as covered in</div><div class='del'>-    Documentation/devicetree/bindings/regulator/regulator.txt, depending</div><div class='del'>-    on compatible:</div><div class='del'>-    - for wlf,wm1811 and wlf,wm8958:</div><div class='del'>-      AVDD1-supply, AVDD2-supply, DBVDD1-supply, DBVDD2-supply, DBVDD3-supply,</div><div class='del'>-      DCVDD-supply, CPVDD-supply, SPKVDD1-supply, SPKVDD2-supply</div><div class='del'>-    - for wlf,wm8994:</div><div class='del'>-      AVDD1-supply, AVDD2-supply, DBVDD-supply, DCVDD-supply, CPVDD-supply,</div><div class='del'>-      SPKVDD1-supply, SPKVDD2-supply</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-  - interrupts : The interrupt line the IRQ signal for the device is</div><div class='del'>-    connected to.  This is optional, if it is not connected then none</div><div class='del'>-    of the interrupt related properties should be specified.</div><div class='del'>-  - interrupt-controller : These devices contain interrupt controllers</div><div class='del'>-    and may provide interrupt services to other devices if they have an</div><div class='del'>-    interrupt line connected.</div><div class='del'>-  - #interrupt-cells: the number of cells to describe an IRQ, this should be 2.</div><div class='del'>-    The first cell is the IRQ number.</div><div class='del'>-    The second cell is the flags, encoded as the trigger masks from</div><div class='del'>-    Documentation/devicetree/bindings/interrupt-controller/interrupts.txt</div><div class='del'>-</div><div class='del'>-  - clocks : A list of up to two phandle and clock specifier pairs</div><div class='del'>-  - clock-names : A list of clock names sorted in the same order as clocks.</div><div class='del'>-                  Valid clock names are "MCLK1" and "MCLK2".</div><div class='del'>-</div><div class='del'>-  - wlf,gpio-cfg : A list of GPIO configuration register values. If absent,</div><div class='del'>-    no configuration of these registers is performed. If any value is</div><div class='del'>-    over 0xffff then the register will be left as default. If present 11</div><div class='del'>-    values must be supplied.</div><div class='del'>-</div><div class='del'>-  - wlf,micbias-cfg : Two MICBIAS register values for WM1811 or</div><div class='del'>-    WM8958.  If absent the register defaults will be used.</div><div class='del'>-</div><div class='del'>-  - wlf,ldo1ena : GPIO specifier for control of LDO1ENA input to device.</div><div class='del'>-  - wlf,ldo2ena : GPIO specifier for control of LDO2ENA input to device.</div><div class='del'>-</div><div class='del'>-  - wlf,lineout1-se : If present LINEOUT1 is in single ended mode.</div><div class='del'>-  - wlf,lineout2-se : If present LINEOUT2 is in single ended mode.</div><div class='del'>-</div><div class='del'>-  - wlf,lineout1-feedback : If present LINEOUT1 has common mode feedback</div><div class='del'>-    connected.</div><div class='del'>-  - wlf,lineout2-feedback : If present LINEOUT2 has common mode feedback</div><div class='del'>-    connected.</div><div class='del'>-</div><div class='del'>-  - wlf,ldoena-always-driven : If present LDOENA is always driven.</div><div class='del'>-</div><div class='del'>-  - wlf,spkmode-pu : If present enable the internal pull-up resistor on</div><div class='del'>-    the SPKMODE pin.</div><div class='del'>-</div><div class='del'>-  - wlf,csnaddr-pd : If present enable the internal pull-down resistor on</div><div class='del'>-    the CS/ADDR pin.</div><div class='del'>-</div><div class='del'>-Pins on the device (for linking into audio routes):</div><div class='del'>-</div><div class='del'>-  * IN1LN</div><div class='del'>-  * IN1LP</div><div class='del'>-  * IN2LN</div><div class='del'>-  * IN2LP:VXRN</div><div class='del'>-  * IN1RN</div><div class='del'>-  * IN1RP</div><div class='del'>-  * IN2RN</div><div class='del'>-  * IN2RP:VXRP</div><div class='del'>-  * SPKOUTLP</div><div class='del'>-  * SPKOUTLN</div><div class='del'>-  * SPKOUTRP</div><div class='del'>-  * SPKOUTRN</div><div class='del'>-  * HPOUT1L</div><div class='del'>-  * HPOUT1R</div><div class='del'>-  * HPOUT2P</div><div class='del'>-  * HPOUT2N</div><div class='del'>-  * LINEOUT1P</div><div class='del'>-  * LINEOUT1N</div><div class='del'>-  * LINEOUT2P</div><div class='del'>-  * LINEOUT2N</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wm8994: codec@1a {</div><div class='del'>-	compatible = "wlf,wm8994";</div><div class='del'>-	reg = &lt;0x1a&gt;;</div><div class='del'>-</div><div class='del'>-	gpio-controller;</div><div class='del'>-	#gpio-cells = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-	lineout1-se;</div><div class='del'>-</div><div class='del'>-	AVDD1-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	AVDD2-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	CPVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	DBVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	DCVDD-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	SPKVDD1-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-	SPKVDD2-supply = &lt;&amp;regulator&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sound/zl38060.yaml b/Documentation/devicetree/bindings/sound/zl38060.yaml<br/>index 338e2a13c775..8bd201e573aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/zl38060.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sound/zl38060.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sound/zl38060.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sound/zl38060.yaml</a></div><div class='hunk'>@@ -15,6 +15,9 @@ maintainers:</div><div class='ctx'>   - Jaroslav Kysela &lt;perex@perex.cz&gt;</div><div class='ctx'>   - Takashi Iwai &lt;tiwai@suse.com&gt;</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: dai-common.yaml#</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     const: mscc,zl38060</div><div class='hunk'>@@ -48,12 +51,12 @@ required:</div><div class='ctx'>   - gpio-controller</div><div class='ctx'>   - '#sound-dai-cells'</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='del'>-    spi0 {</div><div class='add'>+    spi {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt<br/>deleted file mode 100644<br/>index 51ddbc509382..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soundwire/qcom,sdw.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,200 +0,0 @@</div><div class='del'>-Qualcomm SoundWire Controller Bindings</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-This binding describes the Qualcomm SoundWire Controller along with its</div><div class='del'>-board specific bus parameters.</div><div class='del'>-</div><div class='del'>-- compatible:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: must be "qcom,soundwire-v&lt;MAJOR&gt;.&lt;MINOR&gt;.&lt;STEP&gt;",</div><div class='del'>-		    Example:</div><div class='del'>-			"qcom,soundwire-v1.3.0"</div><div class='del'>-			"qcom,soundwire-v1.5.0"</div><div class='del'>-			"qcom,soundwire-v1.5.1"</div><div class='del'>-			"qcom,soundwire-v1.6.0"</div><div class='del'>-- reg:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: the base address and size of SoundWire controller</div><div class='del'>-		    address space.</div><div class='del'>-</div><div class='del'>-- interrupts:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the SoundWire Controller core and optional</div><div class='del'>-		    wake IRQ</div><div class='del'>-</div><div class='del'>-- interrupt-names:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: boolean</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: should be "core" for core and "wakeup" for wake interrupt.</div><div class='del'>-</div><div class='del'>-- wakeup-source:</div><div class='del'>-	Usage: Optional</div><div class='del'>-	Value type: boolean</div><div class='del'>-	Definition: should specify if SoundWire Controller is wake up capable.</div><div class='del'>-</div><div class='del'>-- clock-names:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;stringlist&gt;</div><div class='del'>-	Definition: should be "iface" for SoundWire Controller interface clock</div><div class='del'>-</div><div class='del'>-- clocks:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify the SoundWire Controller interface clock</div><div class='del'>-</div><div class='del'>-- #sound-dai-cells:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be 1 for digital audio interfaces on the controller.</div><div class='del'>-</div><div class='del'>-- qcom,dout-ports:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be count of data out ports</div><div class='del'>-</div><div class='del'>-- qcom,din-ports:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;u32&gt;</div><div class='del'>-	Definition: must be count of data in ports</div><div class='del'>-</div><div class='del'>-- qcom,ports-offset1:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify payload transport window offset1 of each</div><div class='del'>-		    data port. Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-offset2:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should specify payload transport window offset2 of each</div><div class='del'>-		    data port. Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-sinterval-low:</div><div class='del'>-	Usage: required</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be sample interval low of each data port.</div><div class='del'>-		    Out ports followed by In ports. Used for Sample Interval</div><div class='del'>-		    calculation.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-word-length:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be size of payload channel sample.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-block-pack-mode:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be 0 or 1 to indicate the block packing mode.</div><div class='del'>-		    0 to indicate Blocks are per Channel</div><div class='del'>-		    1 to indicate Blocks are per Port.</div><div class='del'>-		    Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-block-group-count:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be in range 1 to 4 to indicate how many sample</div><div class='del'>-		    intervals are combined into a payload.</div><div class='del'>-		    Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-lane-control:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be in range 0 to 7 to identify which	data lane</div><div class='del'>-		    the data port uses.</div><div class='del'>-		    Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-hstart:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be number identifying lowerst numbered coloum in</div><div class='del'>-		    SoundWire Frame, i.e. left edge of the Transport sub-frame</div><div class='del'>-		    for each port. Values between 0 and 15 are valid.</div><div class='del'>-		    Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,ports-hstop:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be number identifying highest numbered coloum in</div><div class='del'>-		    SoundWire Frame, i.e. the right edge of the Transport</div><div class='del'>-		    sub-frame for each port. Values between 0 and 15 are valid.</div><div class='del'>-		    Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-- qcom,dports-type:</div><div class='del'>-	Usage: optional</div><div class='del'>-	Value type: &lt;prop-encoded-array&gt;</div><div class='del'>-	Definition: should be one of the following types</div><div class='del'>-		    0 for reduced port</div><div class='del'>-		    1 for simple ports</div><div class='del'>-		    2 for full port</div><div class='del'>-		    Out ports followed by In ports.</div><div class='del'>-		    Value of 0xFF indicates that this option is not implemented</div><div class='del'>-		    or applicable for the respective data port.</div><div class='del'>-		    More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-Note:</div><div class='del'>-	More Information on detail of encoding of these fields can be</div><div class='del'>-found in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='del'>-</div><div class='del'>-= SoundWire devices</div><div class='del'>-Each subnode of the bus represents SoundWire device attached to it.</div><div class='del'>-The properties of these nodes are defined by the individual bindings.</div><div class='del'>-</div><div class='del'>-= EXAMPLE</div><div class='del'>-The following example represents a SoundWire controller on DB845c board</div><div class='del'>-which has controller integrated inside WCD934x codec on SDM845 SoC.</div><div class='del'>-</div><div class='del'>-soundwire: soundwire@c85 {</div><div class='del'>-	compatible = "qcom,soundwire-v1.3.0";</div><div class='del'>-	reg = &lt;0xc85 0x20&gt;;</div><div class='del'>-	interrupts = &lt;20 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	clocks = &lt;&amp;wcc&gt;;</div><div class='del'>-	clock-names = "iface";</div><div class='del'>-	#sound-dai-cells = &lt;1&gt;;</div><div class='del'>-	qcom,dports-type = &lt;0&gt;;</div><div class='del'>-	qcom,dout-ports	= &lt;6&gt;;</div><div class='del'>-	qcom,din-ports	= &lt;2&gt;;</div><div class='del'>-	qcom,ports-sinterval-low = /bits/ 8  &lt;0x07 0x1F 0x3F 0x7 0x1F 0x3F 0x0F 0x0F&gt;;</div><div class='del'>-	qcom,ports-offset1 = /bits/ 8 &lt;0x01 0x02 0x0C 0x6 0x12 0x0D 0x07 0x0A &gt;;</div><div class='del'>-	qcom,ports-offset2 = /bits/ 8 &lt;0x00 0x00 0x1F 0x00 0x00 0x1F 0x00 0x00&gt;;</div><div class='del'>-</div><div class='del'>-	/* Left Speaker */</div><div class='del'>-	left{</div><div class='del'>-		....</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/* Right Speaker */</div><div class='del'>-	right{</div><div class='del'>-		....</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml b/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml<br/>new file mode 100644<br/>index 000000000000..e4dba825ab11<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soundwire/qcom,soundwire.yaml</a></div><div class='hunk'>@@ -0,0 +1,271 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/soundwire/qcom,soundwire.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SoundWire Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='add'>+  - Srinivasa Rao Mandadapu &lt;quic_srivasam@quicinc.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Qualcomm SoundWire controller along with its board specific bus parameters.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,soundwire-v1.3.0</div><div class='add'>+      - qcom,soundwire-v1.5.0</div><div class='add'>+      - qcom,soundwire-v1.5.1</div><div class='add'>+      - qcom,soundwire-v1.6.0</div><div class='add'>+      - qcom,soundwire-v1.7.0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: specify the SoundWire controller core.</div><div class='add'>+      - description: specify the Soundwire controller wake IRQ.</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: wakeup</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: iface clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: iface</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: SWR_AUDIO_CGCR RESET</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: swr_audio_cgcr</div><div class='add'>+</div><div class='add'>+  '#sound-dai-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  qcom,din-ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: count of data in ports</div><div class='add'>+</div><div class='add'>+  qcom,dout-ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: count of data out ports</div><div class='add'>+</div><div class='add'>+  qcom,ports-word-length:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Size of payload channel sample.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  qcom,ports-sinterval-low:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Sample interval low of each data port.</div><div class='add'>+      Out ports followed by In ports. Used for Sample Interval calculation.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  qcom,ports-offset1:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Payload transport window offset1 of each data port.</div><div class='add'>+      Out ports followed by In ports.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  qcom,ports-offset2:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Payload transport window offset2 of each data port.</div><div class='add'>+      Out ports followed by In ports.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  qcom,ports-lane-control:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Identify which data lane the data port uses.</div><div class='add'>+      Out ports followed by In ports.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  qcom,ports-block-pack-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Indicate the block packing mode.</div><div class='add'>+      0 to indicate Blocks are per Channel</div><div class='add'>+      1 to indicate Blocks are per Port.</div><div class='add'>+      Out ports followed by In ports.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - minimum: 0</div><div class='add'>+          maximum: 1</div><div class='add'>+        - const: 0xff</div><div class='add'>+</div><div class='add'>+  qcom,ports-hstart:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Identifying lowerst numbered coloum in SoundWire Frame,</div><div class='add'>+      i.e. left edge of the Transport sub-frame for each port.</div><div class='add'>+      Out ports followed by In ports.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - minimum: 0</div><div class='add'>+          maximum: 15</div><div class='add'>+        - const: 0xff</div><div class='add'>+</div><div class='add'>+  qcom,ports-hstop:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      Identifying highest numbered coloum in SoundWire Frame,</div><div class='add'>+      i.e. the right edge of the Transport</div><div class='add'>+      sub-frame for each port. Out ports followed by In ports.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - minimum: 0</div><div class='add'>+          maximum: 15</div><div class='add'>+        - const: 0xff</div><div class='add'>+</div><div class='add'>+  qcom,ports-block-group-count:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description:</div><div class='add'>+      In range 1 to 4 to indicate how many sample intervals are combined</div><div class='add'>+      into a payload. Out ports followed by In ports.</div><div class='add'>+      Value of 0xff indicates that this option is not implemented</div><div class='add'>+      or applicable for the respective data port.</div><div class='add'>+      More info in MIPI Alliance SoundWire 1.0 Specifications.</div><div class='add'>+    minItems: 3</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      oneOf:</div><div class='add'>+        - minimum: 0</div><div class='add'>+          maximum: 4</div><div class='add'>+        - const: 0xff</div><div class='add'>+</div><div class='add'>+  label:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^.*@[0-9a-f],[0-9a-f]$":</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: true</div><div class='add'>+    description:</div><div class='add'>+      Child nodes for a standalone audio codec or speaker amplifier IC.</div><div class='add'>+      It has RX and TX Soundwire secondary devices.</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        pattern: "^sdw[0-9a-f]{1}[0-9a-f]{4}[0-9a-f]{4}[0-9a-f]{2}$"</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - '#sound-dai-cells'</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - qcom,dout-ports</div><div class='add'>+  - qcom,din-ports</div><div class='add'>+  - qcom,ports-sinterval-low</div><div class='add'>+  - qcom,ports-offset1</div><div class='add'>+  - qcom,ports-offset2</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,lpassaudiocc-sc7280.h&gt;</div><div class='add'>+</div><div class='add'>+    soundwire@3210000 {</div><div class='add'>+        compatible = "qcom,soundwire-v1.6.0";</div><div class='add'>+        reg = &lt;0x03210000 0x2000&gt;;</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;&amp;pdc 130 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-names = "core", "wakeup";</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;lpass_rx_macro&gt;;</div><div class='add'>+        clock-names = "iface";</div><div class='add'>+</div><div class='add'>+        qcom,din-ports = &lt;0&gt;;</div><div class='add'>+        qcom,dout-ports = &lt;5&gt;;</div><div class='add'>+</div><div class='add'>+        resets = &lt;&amp;lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR&gt;;</div><div class='add'>+        reset-names = "swr_audio_cgcr";</div><div class='add'>+</div><div class='add'>+        qcom,ports-word-length =        /bits/ 8 &lt;0x01 0x07 0x04 0xff 0xff&gt;;</div><div class='add'>+        qcom,ports-sinterval-low =      /bits/ 8 &lt;0x03 0x3f 0x1f 0x03 0x03&gt;;</div><div class='add'>+        qcom,ports-offset1 =            /bits/ 8 &lt;0x00 0x00 0x0b 0x01 0x01&gt;;</div><div class='add'>+        qcom,ports-offset2 =            /bits/ 8 &lt;0x00 0x00 0x0b 0x00 0x00&gt;;</div><div class='add'>+        qcom,ports-lane-control =       /bits/ 8 &lt;0x01 0x00 0x00 0x00 0x00&gt;;</div><div class='add'>+        qcom,ports-block-pack-mode =    /bits/ 8 &lt;0xff 0x00 0x01 0xff 0xff&gt;;</div><div class='add'>+        qcom,ports-hstart =             /bits/ 8 &lt;0xff 0x03 0xff 0xff 0xff&gt;;</div><div class='add'>+        qcom,ports-hstop =              /bits/ 8 &lt;0xff 0x06 0xff 0xff 0xff&gt;;</div><div class='add'>+        qcom,ports-block-group-count =  /bits/ 8 &lt;0xff 0xff 0xff 0xff 0x00&gt;;</div><div class='add'>+</div><div class='add'>+        #sound-dai-cells = &lt;1&gt;;</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        codec@0,4 {</div><div class='add'>+            compatible = "sdw20217010d00";</div><div class='add'>+            reg = &lt;0 4&gt;;</div><div class='add'>+            qcom,rx-port-mapping = &lt;1 2 3 4 5&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml b/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml<br/>index 4aad121eff3f..fdeb8af417d7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/soundwire/soundwire-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/soundwire/soundwire-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SoundWire Controller Generic Binding</div><div class='add'>+title: SoundWire Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml<br/>index 8036499112f5..2155478bfc4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/allwinner,sun4i-a10-spi.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/allwinner,sun4i-a10-spi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 SPI Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 SPI Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml"</div><div class='add'>+  - $ref: spi-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -51,6 +51,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-9a-f]+":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml<br/>index 908248260afa..de36c6a34a0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A31 SPI Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A31 SPI Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml"</div><div class='add'>+  - $ref: spi-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -26,6 +26,7 @@ properties:</div><div class='ctx'>               - allwinner,sun8i-r40-spi</div><div class='ctx'>               - allwinner,sun50i-h6-spi</div><div class='ctx'>               - allwinner,sun50i-h616-spi</div><div class='add'>+              - allwinner,suniv-f1c100s-spi</div><div class='ctx'>           - const: allwinner,sun8i-h3-spi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -62,6 +63,7 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-9a-f]+":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: true</div><div class='ctx'>     properties:</div><div class='ctx'>       reg:</div><div class='ctx'>         items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/amlogic,a1-spifc.yaml b/Documentation/devicetree/bindings/spi/amlogic,a1-spifc.yaml<br/>new file mode 100644<br/>index 000000000000..ea47d30eef43<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/amlogic,a1-spifc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/amlogic,a1-spifc.yaml</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/amlogic,a1-spifc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic A1 SPI Flash Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Martin Kurbanov &lt;mmkurbanov@sberdevices.ru&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - amlogic,a1-spifc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi@fd000400 {</div><div class='add'>+        compatible = "amlogic,a1-spifc";</div><div class='add'>+        reg = &lt;0xfd000400 0x290&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc_clkid_spifc&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml<br/>index 4d46c49ec32b..4e28e6e9d8e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml</a></div><div class='hunk'>@@ -2,16 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/spi/amlogic,meson-gx-spicc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/spi/amlogic,meson-gx-spicc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson SPI Communication Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Meson SPICC is a generic SPI controller for general purpose Full-Duplex</div><div class='hunk'>@@ -43,31 +40,53 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - amlogic,meson-g12a-spicc</div><div class='del'>-</div><div class='del'>-then:</div><div class='del'>-  properties:</div><div class='del'>-    clocks:</div><div class='del'>-      minItems: 2</div><div class='del'>-</div><div class='del'>-    clock-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: core</div><div class='del'>-        - const: pclk</div><div class='del'>-</div><div class='del'>-else:</div><div class='del'>-  properties:</div><div class='del'>-    clocks:</div><div class='del'>-      maxItems: 1</div><div class='del'>-</div><div class='del'>-    clock-names:</div><div class='del'>-      items:</div><div class='del'>-        - const: core</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - amlogic,meson-g12a-spicc</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+            - const: pclk</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - amlogic,meson-gx-spicc</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        pinctrl-0: true</div><div class='add'>+        pinctrl-1: true</div><div class='add'>+        pinctrl-2: true</div><div class='add'>+</div><div class='add'>+        pinctrl-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: default</div><div class='add'>+            - const: idle-high</div><div class='add'>+            - const: idle-low</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -81,18 +100,17 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi@c1108d80 {</div><div class='del'>-          compatible = "amlogic,meson-gx-spicc";</div><div class='del'>-          reg = &lt;0xc1108d80 0x80&gt;;</div><div class='del'>-          interrupts = &lt;112&gt;;</div><div class='del'>-          clocks = &lt;&amp;clk81&gt;;</div><div class='del'>-          clock-names = "core";</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-          display@0 {</div><div class='del'>-              compatible = "lg,lg4573";</div><div class='del'>-              spi-max-frequency = &lt;1000000&gt;;</div><div class='del'>-              reg = &lt;0&gt;;</div><div class='del'>-          };</div><div class='add'>+        compatible = "amlogic,meson-gx-spicc";</div><div class='add'>+        reg = &lt;0xc1108d80 0x80&gt;;</div><div class='add'>+        interrupts = &lt;112&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk81&gt;;</div><div class='add'>+        clock-names = "core";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        display@0 {</div><div class='add'>+            compatible = "lg,lg4573";</div><div class='add'>+            spi-max-frequency = &lt;1000000&gt;;</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml<br/>index 54b6f15eca18..8e769ccda97f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml</a></div><div class='hunk'>@@ -2,16 +2,16 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson SPI Flash Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Meson SPIFC is a controller optimized for communication with SPI</div><div class='hunk'>@@ -40,16 +40,15 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     spi@c1108c80 {</div><div class='del'>-          compatible = "amlogic,meson6-spifc";</div><div class='del'>-          reg = &lt;0xc1108c80 0x80&gt;;</div><div class='del'>-          clocks = &lt;&amp;clk81&gt;;</div><div class='del'>-          #address-cells = &lt;1&gt;;</div><div class='del'>-          #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-          flash: flash@0 {</div><div class='del'>-              compatible = "spansion,m25p80", "jedec,spi-nor";</div><div class='del'>-              reg = &lt;0&gt;;</div><div class='del'>-              spi-max-frequency = &lt;40000000&gt;;</div><div class='del'>-          };</div><div class='add'>+        compatible = "amlogic,meson6-spifc";</div><div class='add'>+        reg = &lt;0xc1108c80 0x80&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk81&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        flash: flash@0 {</div><div class='add'>+            compatible = "spansion,m25p80", "jedec,spi-nor";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;40000000&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml b/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml<br/>new file mode 100644<br/>index 000000000000..57d932af4506<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/aspeed,ast2600-fmc.yaml</a></div><div class='hunk'>@@ -0,0 +1,82 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Aspeed SMC controllers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chin-Ting Kuo &lt;chin-ting_kuo@aspeedtech.com&gt;</div><div class='add'>+  - Cédric Le Goater &lt;clg@kaod.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This binding describes the Aspeed Static Memory Controllers (FMC and</div><div class='add'>+  SPI) of the AST2400, AST2500 and AST2600 SOCs.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - aspeed,ast2600-fmc</div><div class='add'>+      - aspeed,ast2600-spi</div><div class='add'>+      - aspeed,ast2500-fmc</div><div class='add'>+      - aspeed,ast2500-spi</div><div class='add'>+      - aspeed,ast2400-fmc</div><div class='add'>+      - aspeed,ast2400-spi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: registers</div><div class='add'>+      - description: memory mapping</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/aspeed-scu-ic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/ast2600-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@1e620000 {</div><div class='add'>+        reg = &lt;0x1e620000 0xc4&gt;, &lt;0x20000000 0x10000000&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "aspeed,ast2600-fmc";</div><div class='add'>+        clocks = &lt;&amp;syscon ASPEED_CLK_AHB&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+            reg = &lt; 0 &gt;;</div><div class='add'>+            compatible = "jedec,spi-nor";</div><div class='add'>+            spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+            spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        flash@1 {</div><div class='add'>+            reg = &lt; 1 &gt;;</div><div class='add'>+            compatible = "jedec,spi-nor";</div><div class='add'>+            spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+            spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        flash@2 {</div><div class='add'>+            reg = &lt; 2 &gt;;</div><div class='add'>+            compatible = "jedec,spi-nor";</div><div class='add'>+            spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+            spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml b/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml<br/>new file mode 100644<br/>index 000000000000..6c57dd6c3a36<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/atmel,at91rm9200-spi.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/atmel,at91rm9200-spi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel SPI device</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: atmel,at91rm9200-spi</div><div class='add'>+      - items:</div><div class='add'>+          - const: microchip,sam9x60-spi</div><div class='add'>+          - const: atmel,at91rm9200-spi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    contains:</div><div class='add'>+      const: spi_clk</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: TX DMA Channel</div><div class='add'>+      - description: RX DMA Channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  atmel,fifo-size:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: |</div><div class='add'>+      Maximum number of data the RX and TX FIFOs can store for FIFO</div><div class='add'>+      capable SPI controllers.</div><div class='add'>+    enum: [ 16, 32 ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    spi1: spi@fffcc000 {</div><div class='add'>+        compatible = "atmel,at91rm9200-spi";</div><div class='add'>+        reg = &lt;0xfffcc000 0x4000&gt;;</div><div class='add'>+        interrupts = &lt;13 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;spi1_clk&gt;;</div><div class='add'>+        clock-names = "spi_clk";</div><div class='add'>+        cs-gpios = &lt;&amp;pioB 3 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+        atmel,fifo-size = &lt;32&gt;;</div><div class='add'>+</div><div class='add'>+        mmc@0 {</div><div class='add'>+            compatible = "mmc-spi-slot";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            gpios = &lt;&amp;pioC 4 GPIO_ACTIVE_HIGH&gt;;    /* CD */</div><div class='add'>+            spi-max-frequency = &lt;25000000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml b/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml<br/>index 1d493add4053..b0d99bc10535 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/atmel,quadspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/atmel,quadspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/atmel,quadspi.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Atmel Quad Serial Peripheral Interface (QSPI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Tudor Ambarus &lt;tudor.ambarus@microchip.com&gt;</div><div class='add'>+  - Tudor Ambarus &lt;tudor.ambarus@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: spi-controller.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml b/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml<br/>new file mode 100644<br/>index 000000000000..6554978583f8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml</a></div><div class='hunk'>@@ -0,0 +1,134 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom Broadband SoC High Speed SPI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - William Zhang &lt;william.zhang@broadcom.com&gt;</div><div class='add'>+  - Kursad Oney &lt;kursad.oney@broadcom.com&gt;</div><div class='add'>+  - Jonas Gorski &lt;jonas.gorski@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  Broadcom Broadband SoC supports High Speed SPI master controller since the</div><div class='add'>+  early MIPS based chips such as BCM6328 and BCM63268.  This initial rev 1.0</div><div class='add'>+  controller was carried over to recent ARM based chips, such as BCM63138,</div><div class='add'>+  BCM4908 and BCM6858. The old MIPS based chip should continue to use the</div><div class='add'>+  brcm,bcm6328-hsspi compatible string. The recent ARM based chip is required to</div><div class='add'>+  use the brcm,bcmbca-hsspi-v1.0 as part of its compatible string list as</div><div class='add'>+  defined below to match the specific chip along with ip revision info.</div><div class='add'>+</div><div class='add'>+  This rev 1.0 controller has a limitation that can not keep the chip select line</div><div class='add'>+  active between the SPI transfers within the same SPI message. This can</div><div class='add'>+  terminate the transaction to some SPI devices prematurely. The issue can be</div><div class='add'>+  worked around by either the controller's prepend mode or using the dummy chip</div><div class='add'>+  select workaround. Driver automatically picks the suitable mode based on</div><div class='add'>+  transfer type so it is transparent to the user.</div><div class='add'>+</div><div class='add'>+  The newer SoCs such as BCM6756, BCM4912 and BCM6855 include an updated SPI</div><div class='add'>+  controller rev 1.1 that add the capability to allow the driver to control chip</div><div class='add'>+  select explicitly. This solves the issue in the old controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: brcm,bcm6328-hsspi</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm47622-hsspi</div><div class='add'>+              - brcm,bcm4908-hsspi</div><div class='add'>+              - brcm,bcm63138-hsspi</div><div class='add'>+              - brcm,bcm63146-hsspi</div><div class='add'>+              - brcm,bcm63148-hsspi</div><div class='add'>+              - brcm,bcm63158-hsspi</div><div class='add'>+              - brcm,bcm63178-hsspi</div><div class='add'>+              - brcm,bcm6846-hsspi</div><div class='add'>+              - brcm,bcm6856-hsspi</div><div class='add'>+              - brcm,bcm6858-hsspi</div><div class='add'>+              - brcm,bcm6878-hsspi</div><div class='add'>+          - const: brcm,bcmbca-hsspi-v1.0</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - brcm,bcm4912-hsspi</div><div class='add'>+              - brcm,bcm6756-hsspi</div><div class='add'>+              - brcm,bcm6813-hsspi</div><div class='add'>+              - brcm,bcm6855-hsspi</div><div class='add'>+          - const: brcm,bcmbca-hsspi-v1.1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: main registers</div><div class='add'>+      - description: miscellaneous control registers</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hsspi</div><div class='add'>+      - const: spim-ctrl</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: SPI master reference clock</div><div class='add'>+      - description: SPI master pll clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hsspi</div><div class='add'>+      - const: pll</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - brcm,bcm6328-hsspi</div><div class='add'>+              - brcm,bcmbca-hsspi-v1.0</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        reg-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+        reg-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 2</div><div class='add'>+      required:</div><div class='add'>+        - reg-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    spi@ff801000 {</div><div class='add'>+        compatible = "brcm,bcm6756-hsspi", "brcm,bcmbca-hsspi-v1.1";</div><div class='add'>+        reg = &lt;0xff801000 0x1000&gt;,</div><div class='add'>+              &lt;0xff802610 0x4&gt;;</div><div class='add'>+        reg-names = "hsspi", "spim-ctrl";</div><div class='add'>+        interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;hsspi&gt;, &lt;&amp;hsspi_pll&gt;;</div><div class='add'>+        clock-names = "hsspi", "pll";</div><div class='add'>+        num-cs = &lt;8&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml b/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml<br/>index ec5873919170..28222aae3077 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml</a></div><div class='hunk'>@@ -99,98 +99,98 @@ required:</div><div class='ctx'> examples:</div><div class='ctx'>   - | # BRCMSTB SoC: SPI Master (MSPI+BSPI) for SPI-NOR access</div><div class='ctx'>     spi@f03e3400 {</div><div class='del'>-            compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi";</div><div class='del'>-            reg = &lt;0xf03e3400 0x188&gt;, &lt;0xf03e3200 0x50&gt;, &lt;0xf03e0920 0x4&gt;;</div><div class='del'>-            reg-names = "mspi", "bspi", "cs_reg";</div><div class='del'>-            interrupts = &lt;0x5&gt;, &lt;0x6&gt;, &lt;0x1&gt;, &lt;0x2&gt;, &lt;0x3&gt;, &lt;0x4&gt;, &lt;0x0&gt;;</div><div class='del'>-            interrupt-parent = &lt;&amp;gic&gt;;</div><div class='del'>-            interrupt-names = "mspi_done",</div><div class='del'>-                              "mspi_halted",</div><div class='del'>-                              "spi_lr_fullness_reached",</div><div class='del'>-                              "spi_lr_session_aborted",</div><div class='del'>-                              "spi_lr_impatient",</div><div class='del'>-                              "spi_lr_session_done",</div><div class='del'>-                              "spi_lr_overread";</div><div class='del'>-            clocks = &lt;&amp;hif_spi&gt;;</div><div class='del'>-            #address-cells = &lt;0x1&gt;;</div><div class='del'>-            #size-cells = &lt;0x0&gt;;</div><div class='del'>-</div><div class='del'>-            flash@0 {</div><div class='del'>-                    #size-cells = &lt;0x2&gt;;</div><div class='del'>-                    #address-cells = &lt;0x2&gt;;</div><div class='del'>-                    compatible = "m25p80";</div><div class='del'>-                    reg = &lt;0x0&gt;;</div><div class='del'>-                    spi-max-frequency = &lt;0x2625a00&gt;;</div><div class='del'>-                    spi-cpol;</div><div class='del'>-                    spi-cpha;</div><div class='del'>-            };</div><div class='add'>+        compatible = "brcm,spi-brcmstb-qspi", "brcm,spi-bcm-qspi";</div><div class='add'>+        reg = &lt;0xf03e3400 0x188&gt;, &lt;0xf03e3200 0x50&gt;, &lt;0xf03e0920 0x4&gt;;</div><div class='add'>+        reg-names = "mspi", "bspi", "cs_reg";</div><div class='add'>+        interrupts = &lt;0x5&gt;, &lt;0x6&gt;, &lt;0x1&gt;, &lt;0x2&gt;, &lt;0x3&gt;, &lt;0x4&gt;, &lt;0x0&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gic&gt;;</div><div class='add'>+        interrupt-names = "mspi_done",</div><div class='add'>+                          "mspi_halted",</div><div class='add'>+                          "spi_lr_fullness_reached",</div><div class='add'>+                          "spi_lr_session_aborted",</div><div class='add'>+                          "spi_lr_impatient",</div><div class='add'>+                          "spi_lr_session_done",</div><div class='add'>+                          "spi_lr_overread";</div><div class='add'>+        clocks = &lt;&amp;hif_spi&gt;;</div><div class='add'>+        #address-cells = &lt;0x1&gt;;</div><div class='add'>+        #size-cells = &lt;0x0&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+            #size-cells = &lt;0x2&gt;;</div><div class='add'>+            #address-cells = &lt;0x2&gt;;</div><div class='add'>+            compatible = "m25p80";</div><div class='add'>+            reg = &lt;0x0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;0x2625a00&gt;;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-cpha;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='ctx'>   - | # BRCMSTB SoC: MSPI master for any SPI device</div><div class='ctx'>     spi@f0416000 {</div><div class='del'>-            clocks = &lt;&amp;upg_fixed&gt;;</div><div class='del'>-            compatible = "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi";</div><div class='del'>-            reg = &lt;0xf0416000 0x180&gt;;</div><div class='del'>-            reg-names = "mspi";</div><div class='del'>-            interrupts = &lt;0x14&gt;;</div><div class='del'>-            interrupt-parent = &lt;&amp;irq0_aon_intc&gt;;</div><div class='del'>-            interrupt-names = "mspi_done";</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;upg_fixed&gt;;</div><div class='add'>+        compatible = "brcm,spi-brcmstb-mspi", "brcm,spi-bcm-qspi";</div><div class='add'>+        reg = &lt;0xf0416000 0x180&gt;;</div><div class='add'>+        reg-names = "mspi";</div><div class='add'>+        interrupts = &lt;0x14&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;irq0_aon_intc&gt;;</div><div class='add'>+        interrupt-names = "mspi_done";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='ctx'>   - | # iProc SoC</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     spi@18027200 {</div><div class='del'>-            compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";</div><div class='del'>-            reg = &lt;0x18027200 0x184&gt;,</div><div class='del'>-                  &lt;0x18027000 0x124&gt;,</div><div class='del'>-                  &lt;0x1811c408 0x004&gt;,</div><div class='del'>-                  &lt;0x180273a0 0x01c&gt;;</div><div class='del'>-            reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";</div><div class='del'>-            interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-                         &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            interrupt-names = "mspi_done",</div><div class='del'>-                              "mspi_halted",</div><div class='del'>-                              "spi_lr_fullness_reached",</div><div class='del'>-                              "spi_lr_session_aborted",</div><div class='del'>-                              "spi_lr_impatient",</div><div class='del'>-                              "spi_lr_session_done";</div><div class='del'>-            clocks = &lt;&amp;iprocmed&gt;;</div><div class='del'>-            num-cs = &lt;2&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";</div><div class='add'>+        reg = &lt;0x18027200 0x184&gt;,</div><div class='add'>+              &lt;0x18027000 0x124&gt;,</div><div class='add'>+              &lt;0x1811c408 0x004&gt;,</div><div class='add'>+              &lt;0x180273a0 0x01c&gt;;</div><div class='add'>+        reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";</div><div class='add'>+        interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "mspi_done",</div><div class='add'>+                          "mspi_halted",</div><div class='add'>+                          "spi_lr_fullness_reached",</div><div class='add'>+                          "spi_lr_session_aborted",</div><div class='add'>+                          "spi_lr_impatient",</div><div class='add'>+                          "spi_lr_session_done";</div><div class='add'>+        clocks = &lt;&amp;iprocmed&gt;;</div><div class='add'>+        num-cs = &lt;2&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='ctx'>   - | # NS2 SoC</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     spi@66470200 {</div><div class='del'>-            compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";</div><div class='del'>-            reg = &lt;0x66470200 0x184&gt;,</div><div class='del'>-                  &lt;0x66470000 0x124&gt;,</div><div class='del'>-                  &lt;0x67017408 0x004&gt;,</div><div class='del'>-                  &lt;0x664703a0 0x01c&gt;;</div><div class='del'>-            reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";</div><div class='del'>-            interrupts = &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            interrupt-names = "spi_l1_intr";</div><div class='del'>-            clocks = &lt;&amp;iprocmed&gt;;</div><div class='del'>-            num-cs = &lt;2&gt;;</div><div class='add'>+        compatible = "brcm,spi-ns2-qspi", "brcm,spi-bcm-qspi";</div><div class='add'>+        reg = &lt;0x66470200 0x184&gt;,</div><div class='add'>+              &lt;0x66470000 0x124&gt;,</div><div class='add'>+              &lt;0x67017408 0x004&gt;,</div><div class='add'>+              &lt;0x664703a0 0x01c&gt;;</div><div class='add'>+        reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";</div><div class='add'>+        interrupts = &lt;GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "spi_l1_intr";</div><div class='add'>+        clocks = &lt;&amp;iprocmed&gt;;</div><div class='add'>+        num-cs = &lt;2&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-            flash@0 {</div><div class='del'>-                    #address-cells = &lt;1&gt;;</div><div class='del'>-                    #size-cells = &lt;1&gt;;</div><div class='del'>-                    compatible = "m25p80";</div><div class='del'>-                    reg = &lt;0x0&gt;;</div><div class='del'>-                    spi-max-frequency = &lt;12500000&gt;;</div><div class='del'>-                    spi-cpol;</div><div class='del'>-                    spi-cpha;</div><div class='del'>-            };</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+            compatible = "m25p80";</div><div class='add'>+            reg = &lt;0x0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;12500000&gt;;</div><div class='add'>+            spi-cpol;</div><div class='add'>+            spi-cpha;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml<br/>index 553601a441a7..510b82c177c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/cdns,qspi-nor-peripheral-props.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ description:</div><div class='ctx'>   See spi-peripheral-props.yaml for more info.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Pratyush Yadav &lt;p.yadav@ti.com&gt;</div><div class='add'>+  - Vaishnav Achath &lt;vaishnav.a@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   # cdns,qspi-nor.yaml</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml<br/>index 0a537fa3a641..b310069762dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Cadence Quad SPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Pratyush Yadav &lt;p.yadav@ti.com&gt;</div><div class='add'>+  - Vaishnav Achath &lt;vaishnav.a@ti.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: spi-controller.yaml#</div><div class='hunk'>@@ -19,6 +19,33 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='ctx'>         - power-domains</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: starfive,jh7110-qspi</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 3</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+          maxItems: 3</div><div class='add'>+          items:</div><div class='add'>+            enum: [ qspi, qspi-ocp, rstc_ref ]</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        resets:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+        reset-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+          items:</div><div class='add'>+            enum: [ qspi, qspi-ocp ]</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -30,6 +57,7 @@ properties:</div><div class='ctx'>               - intel,lgm-qspi</div><div class='ctx'>               - xlnx,versal-ospi-1.0</div><div class='ctx'>               - intel,socfpga-qspi</div><div class='add'>+              - starfive,jh7110-qspi</div><div class='ctx'>           - const: cdns,qspi-nor</div><div class='ctx'>       - const: cdns,qspi-nor</div><div class='ctx'> </div><div class='hunk'>@@ -47,7 +75,7 @@ properties:</div><div class='ctx'>   cdns,fifo-depth:</div><div class='ctx'>     description:</div><div class='ctx'>       Size of the data FIFO in words.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [ 128, 256 ]</div><div class='ctx'>     default: 128</div><div class='ctx'> </div><div class='hunk'>@@ -79,13 +107,14 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   resets:</div><div class='del'>-    maxItems: 2</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   reset-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='ctx'>     items:</div><div class='del'>-      enum: [ qspi, qspi-ocp ]</div><div class='add'>+      enum: [ qspi, qspi-ocp, rstc_ref ]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -103,21 +132,21 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     qspi: spi@ff705000 {</div><div class='del'>-      compatible = "cdns,qspi-nor";</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-      reg = &lt;0xff705000 0x1000&gt;,</div><div class='del'>-            &lt;0xffa00000 0x1000&gt;;</div><div class='del'>-      interrupts = &lt;0 151 4&gt;;</div><div class='del'>-      clocks = &lt;&amp;qspi_clk&gt;;</div><div class='del'>-      cdns,fifo-depth = &lt;128&gt;;</div><div class='del'>-      cdns,fifo-width = &lt;4&gt;;</div><div class='del'>-      cdns,trigger-address = &lt;0x00000000&gt;;</div><div class='del'>-      resets = &lt;&amp;rst 0x1&gt;, &lt;&amp;rst 0x2&gt;;</div><div class='del'>-      reset-names = "qspi", "qspi-ocp";</div><div class='del'>-</div><div class='del'>-      flash@0 {</div><div class='del'>-              compatible = "jedec,spi-nor";</div><div class='del'>-              reg = &lt;0x0&gt;;</div><div class='del'>-      };</div><div class='add'>+        compatible = "cdns,qspi-nor";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        reg = &lt;0xff705000 0x1000&gt;,</div><div class='add'>+              &lt;0xffa00000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;0 151 4&gt;;</div><div class='add'>+        clocks = &lt;&amp;qspi_clk&gt;;</div><div class='add'>+        cdns,fifo-depth = &lt;128&gt;;</div><div class='add'>+        cdns,fifo-width = &lt;4&gt;;</div><div class='add'>+        cdns,trigger-address = &lt;0x00000000&gt;;</div><div class='add'>+        resets = &lt;&amp;rst 0x1&gt;, &lt;&amp;rst 0x2&gt;;</div><div class='add'>+        reset-names = "qspi", "qspi-ocp";</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+            compatible = "jedec,spi-nor";</div><div class='add'>+            reg = &lt;0x0&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/cdns,xspi.yaml b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml<br/>index b8bb8a3dbf54..eb0f92468185 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/cdns,xspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/cdns,xspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/cdns,xspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/cdns,xspi.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2020-21 Cadence</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/spi/cdns,xspi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Cadence XSPI Controller</div><div class='ctx'> </div><div class='hunk'>@@ -16,7 +16,7 @@ description: |</div><div class='ctx'>   read/write access to slaves such as SPI-NOR flash.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/efm32-spi.txt b/Documentation/devicetree/bindings/spi/efm32-spi.txt<br/>deleted file mode 100644<br/>index e0fa61a1be0c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/efm32-spi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/efm32-spi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-* Energy Micro EFM32 SPI</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- #address-cells: see spi-bus.txt</div><div class='del'>-- #size-cells: see spi-bus.txt</div><div class='del'>-- compatible: should be "energymicro,efm32-spi"</div><div class='del'>-- reg: Offset and length of the register set for the controller</div><div class='del'>-- interrupts: pair specifying rx and tx irq</div><div class='del'>-- clocks: phandle to the spi clock</div><div class='del'>-- cs-gpios: see spi-bus.txt</div><div class='del'>-</div><div class='del'>-Recommended properties :</div><div class='del'>-- energymicro,location: Value to write to the ROUTE register's LOCATION</div><div class='del'>-                        bitfield to configure the pinmux for the device, see</div><div class='del'>-                        datasheet for values.</div><div class='del'>-                        If this property is not provided, keeping what is</div><div class='del'>-                        already configured in the hardware, so its either the</div><div class='del'>-                        reset default 0 or whatever the bootloader did.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-spi1: spi@4000c400 { /* USART1 */</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	compatible = "energymicro,efm32-spi";</div><div class='del'>-	reg = &lt;0x4000c400 0x400&gt;;</div><div class='del'>-	interrupts = &lt;15 16&gt;;</div><div class='del'>-	clocks = &lt;&amp;cmu 20&gt;;</div><div class='del'>-	cs-gpios = &lt;&amp;gpio 51 1&gt;; // D3</div><div class='del'>-	energymicro,location = &lt;1&gt;;</div><div class='del'>-</div><div class='del'>-	ks8851@0 {</div><div class='del'>-		compatible = "ks8851";</div><div class='del'>-		spi-max-frequency = &lt;6000000&gt;;</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;boardfpga&gt;;</div><div class='del'>-		interrupts = &lt;4&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml b/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml<br/>index e58644558412..f2dd20370dbb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/fsl,spi-fsl-qspi.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Han Xu &lt;han.xu@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml b/Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml<br/>index 50df1a40bbe3..2f593c7225e5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -23,6 +23,9 @@ properties:</div><div class='ctx'>       - const: fsl,imx51-ecspi</div><div class='ctx'>       - const: fsl,imx53-ecspi</div><div class='ctx'>       - items:</div><div class='add'>+          - const: fsl,imx8mp-ecspi</div><div class='add'>+          - const: fsl,imx6ul-ecspi</div><div class='add'>+      - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx50-ecspi</div><div class='ctx'>               - fsl,imx6q-ecspi</div><div class='hunk'>@@ -34,7 +37,6 @@ properties:</div><div class='ctx'>               - fsl,imx8mq-ecspi</div><div class='ctx'>               - fsl,imx8mm-ecspi</div><div class='ctx'>               - fsl,imx8mn-ecspi</div><div class='del'>-              - fsl,imx8mp-ecspi</div><div class='ctx'>           - const: fsl,imx51-ecspi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml b/Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml<br/>new file mode 100644<br/>index 000000000000..7797c3123b7e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/hpe,gxp-spifi.yaml</a></div><div class='hunk'>@@ -0,0 +1,56 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/hpe,gxp-spifi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HPE GXP spi controller flash interface</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nick Hawkins &lt;nick.hawkins@hpe.com&gt;</div><div class='add'>+  - Jean-Marie Verdun &lt;verdun@hpe.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: hpe,gxp-spifi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: cfg registers</div><div class='add'>+      - description: data registers</div><div class='add'>+      - description: mapped memory</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+</div><div class='add'>+    spi@200 {</div><div class='add'>+      compatible = "hpe,gxp-spifi";</div><div class='add'>+      reg = &lt;0x200 0x80&gt;, &lt;0xc000 0x100&gt;, &lt;0x38000000 0x800000&gt;;</div><div class='add'>+      interrupts = &lt;20&gt;;</div><div class='add'>+      interrupt-parent = &lt;&amp;vic0&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      flash@0 {</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+        compatible = "jedec,spi-nor";</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      flash@1 {</div><div class='add'>+        reg = &lt;1&gt;;</div><div class='add'>+        compatible = "jedec,spi-nor";</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/ingenic,spi.yaml b/Documentation/devicetree/bindings/spi/ingenic,spi.yaml<br/>index 5b1c7a2a6a31..c08d55b900bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/ingenic,spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/ingenic,spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/ingenic,spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/ingenic,spi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/ingenic,spi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs SPI controller devicetree bindings</div><div class='add'>+title: Ingenic SoCs SPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Artur Rojek &lt;contact@artur-rojek.eu&gt;</div><div class='hunk'>@@ -18,7 +18,10 @@ properties:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - ingenic,jz4750-spi</div><div class='add'>+          - ingenic,jz4775-spi</div><div class='ctx'>           - ingenic,jz4780-spi</div><div class='add'>+          - ingenic,x1000-spi</div><div class='add'>+          - ingenic,x2000-spi</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - ingenic,jz4760-spi</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml b/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml<br/>index 0abcac385e7c..5f4f6b5615d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: PXA2xx SSP SPI Controller bindings</div><div class='add'>+title: PXA2xx SSP SPI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml<br/>index 818130b11bb9..b6249880c3f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/mediatek,spi-mt65xx.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Leilk Liu &lt;leilk.liu@mediatek.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -18,6 +18,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt7629-spi</div><div class='add'>+              - mediatek,mt8365-spi</div><div class='ctx'>           - const: mediatek,mt7622-spi</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -33,6 +34,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt7986-spi-ipm</div><div class='add'>+              - mediatek,mt8188-spi-ipm</div><div class='ctx'>           - const: mediatek,spi-ipm</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -53,16 +55,20 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='add'>+    minItems: 3</div><div class='ctx'>     items:</div><div class='ctx'>       - description: clock used for the parent clock</div><div class='ctx'>       - description: clock used for the muxes clock</div><div class='ctx'>       - description: clock used for the clock gate</div><div class='add'>+      - description: clock used for the AHB bus, this clock is optional</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='add'>+    minItems: 3</div><div class='ctx'>     items:</div><div class='ctx'>       - const: parent-clk</div><div class='ctx'>       - const: sel-clk</div><div class='ctx'>       - const: spi-clk</div><div class='add'>+      - const: hclk</div><div class='ctx'> </div><div class='ctx'>   mediatek,pad-select:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml<br/>index 41e60fe4b09f..a453996c13f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml</a></div><div class='hunk'>@@ -23,6 +23,10 @@ allOf:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt8173-nor</div><div class='add'>+          - mediatek,mt8186-nor</div><div class='add'>+          - mediatek,mt8192-nor</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - mediatek,mt2701-nor</div><div class='hunk'>@@ -30,13 +34,13 @@ properties:</div><div class='ctx'>               - mediatek,mt7622-nor</div><div class='ctx'>               - mediatek,mt7623-nor</div><div class='ctx'>               - mediatek,mt7629-nor</div><div class='del'>-              - mediatek,mt8186-nor</div><div class='del'>-              - mediatek,mt8192-nor</div><div class='ctx'>               - mediatek,mt8195-nor</div><div class='del'>-          - enum:</div><div class='del'>-              - mediatek,mt8173-nor</div><div class='del'>-      - items:</div><div class='ctx'>           - const: mediatek,mt8173-nor</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt8188-nor</div><div class='add'>+          - const: mediatek,mt8186-nor</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -64,7 +68,6 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'> </div><div class='hunk'>@@ -82,8 +85,9 @@ examples:</div><div class='ctx'>         compatible = "mediatek,mt8173-nor";</div><div class='ctx'>         reg = &lt;0 0x1100d000 0 0xe0&gt;;</div><div class='ctx'>         interrupts = &lt;1&gt;;</div><div class='del'>-        clocks = &lt;&amp;pericfg CLK_PERI_SPI&gt;, &lt;&amp;topckgen CLK_TOP_SPINFI_IFR_SEL&gt;;</div><div class='del'>-        clock-names = "spi", "sf";</div><div class='add'>+        clocks = &lt;&amp;pericfg CLK_PERI_SPI&gt;, &lt;&amp;topckgen CLK_TOP_SPINFI_IFR_SEL&gt;,</div><div class='add'>+                 &lt;&amp;pericfg CLK_PERI_NFI&gt;;</div><div class='add'>+        clock-names = "spi", "sf", "axi";</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml<br/>new file mode 100644<br/>index 000000000000..1e5e89a693c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: SPI-NAND flash controller for MediaTek ARM SoCs</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Chuanhong Guo &lt;gch981213@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Mediatek SPI-NAND flash controller is an extended version of</div><div class='add'>+  the Mediatek NAND flash controller. It can perform standard SPI</div><div class='add'>+  instructions with one continuous write and one read for up-to 0xa0</div><div class='add'>+  bytes. It also supports typical SPI-NAND page cache operations</div><div class='add'>+  in single, dual or quad IO mode with pipelined ECC encoding/decoding</div><div class='add'>+  using the accompanying ECC engine. There should be only one spi</div><div class='add'>+  slave device following generic spi bindings.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt7622-snand</div><div class='add'>+      - mediatek,mt7629-snand</div><div class='add'>+      - mediatek,mt7986-snand</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: core registers</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: NFI interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  nand-ecc-engine:</div><div class='add'>+    description: device-tree node of the accompanying ECC engine.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  mediatek,rx-latch-latency-ns:</div><div class='add'>+    description: Data read latch latency, unit is nanoseconds.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - nand-ecc-engine</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - mediatek,mt7622-snand</div><div class='add'>+            - mediatek,mt7629-snand</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: clock used for the controller</div><div class='add'>+            - description: clock used for the SPI bus</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: nfi_clk</div><div class='add'>+            - const: pad_clk</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          enum:</div><div class='add'>+            - mediatek,mt7986-snand</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: clock used for the controller</div><div class='add'>+            - description: clock used for the SPI bus</div><div class='add'>+            - description: clock used for the AHB bus</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: nfi_clk</div><div class='add'>+            - const: pad_clk</div><div class='add'>+            - const: nfi_hclk</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt7622-clk.h&gt;</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+      snfi: spi@1100d000 {</div><div class='add'>+        compatible = "mediatek,mt7622-snand";</div><div class='add'>+        reg = &lt;0 0x1100d000 0 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 96 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        clocks = &lt;&amp;pericfg CLK_PERI_NFI_PD&gt;, &lt;&amp;pericfg CLK_PERI_SNFI_PD&gt;;</div><div class='add'>+        clock-names = "nfi_clk", "pad_clk";</div><div class='add'>+        nand-ecc-engine = &lt;&amp;bch&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+          compatible = "spi-nand";</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          spi-tx-bus-width = &lt;4&gt;;</div><div class='add'>+          spi-rx-bus-width = &lt;4&gt;;</div><div class='add'>+          nand-ecc-engine = &lt;&amp;snfi&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml<br/>index 7977799a8ee1..d19c9f73978f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/mediatek,spi-slave-mt27xx.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Leilk Liu &lt;leilk.liu@mediatek.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml b/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml<br/>index ece261b8e963..74a817cc7d94 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml</a></div><div class='hunk'>@@ -4,7 +4,11 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/microchip,mpfs-spi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip MPFS {Q,}SPI Controller Device Tree Bindings</div><div class='add'>+title: Microchip FPGA {Q,}SPI Controllers</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  SPI and QSPI controllers on Microchip PolarFire SoC and the "soft"/</div><div class='add'>+  fabric IP cores they are based on</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Conor Dooley &lt;conor.dooley@microchip.com&gt;</div><div class='hunk'>@@ -14,9 +18,12 @@ allOf:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - microchip,mpfs-spi</div><div class='del'>-      - microchip,mpfs-qspi</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: microchip,mpfs-qspi</div><div class='add'>+          - const: microchip,coreqspi-rtl-v2</div><div class='add'>+      - const: microchip,coreqspi-rtl-v2 # FPGA QSPI</div><div class='add'>+      - const: microchip,mpfs-spi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -47,6 +54,5 @@ examples:</div><div class='ctx'>         clocks = &lt;&amp;clkcfg CLK_SPI0&gt;;</div><div class='ctx'>         interrupt-parent = &lt;&amp;plic&gt;;</div><div class='ctx'>         interrupts = &lt;54&gt;;</div><div class='del'>-        spi-max-frequency = &lt;25000000&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml b/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml<br/>index 3fd0a8adfe9a..303f6dca89c0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/mikrotik,rb4xx-spi.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - Bert Vermeulen &lt;bert@biot.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml b/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml<br/>index 9202c44b4478..221fe6e2ef53 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/mxicy,mx25f0a-spi.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/mxicy,mx25f0a-spi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Macronix SPI controller device tree bindings</div><div class='add'>+title: Macronix SPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Miquel Raynal &lt;miquel.raynal@bootlin.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/mxs-spi.yaml b/Documentation/devicetree/bindings/spi/mxs-spi.yaml<br/>index 51f8c664323e..e2512166c1cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mxs-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/mxs-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/mxs-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/mxs-spi.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Marek Vasut &lt;marex@denx.de&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt<br/>index a388005842ad..fb38e96d395f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt</a></div><div class='hunk'>@@ -6,8 +6,13 @@ The NPCM7XX supports three FIU modules,</div><div class='ctx'> FIU0 and FIUx supports two chip selects,</div><div class='ctx'> FIU3 support four chip select.</div><div class='ctx'> </div><div class='add'>+The NPCM8XX supports four FIU modules,</div><div class='add'>+FIU0 and FIUx supports two chip selects,</div><div class='add'>+FIU1 and FIU3 supports four chip selects.</div><div class='add'>+</div><div class='ctx'> Required properties:</div><div class='del'>-  - compatible : "nuvoton,npcm750-fiu" for the NPCM7XX BMC</div><div class='add'>+  - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC</div><div class='add'>+			     "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC</div><div class='ctx'>   - #address-cells : should be 1.</div><div class='ctx'>   - #size-cells : should be 0.</div><div class='ctx'>   - reg : the first contains the register location and length,</div><div class='hunk'>@@ -30,6 +35,12 @@ Aliases:</div><div class='ctx'>   		fiu1 represent fiu 3 controller</div><div class='ctx'>   		fiu2 represent fiu x controller</div><div class='ctx'> </div><div class='add'>+  In the NPCM8XX BMC:</div><div class='add'>+  		fiu0 represent fiu 0 controller</div><div class='add'>+  		fiu1 represent fiu 1 controller</div><div class='add'>+  		fiu2 represent fiu 3 controller</div><div class='add'>+  		fiu3 represent fiu x controller</div><div class='add'>+</div><div class='ctx'> Example:</div><div class='ctx'> fiu3: spi@c00000000 {</div><div class='ctx'> 	compatible = "nuvoton,npcm750-fiu";</div><div class='hunk'>@@ -40,7 +51,7 @@ fiu3: spi@c00000000 {</div><div class='ctx'> 	clocks = &lt;&amp;clk NPCM7XX_CLK_AHB&gt;;</div><div class='ctx'> 	pinctrl-names = "default";</div><div class='ctx'> 	pinctrl-0 = &lt;&amp;spi3_pins&gt;;</div><div class='del'>-	spi-nor@0 {</div><div class='add'>+	flash@0 {</div><div class='ctx'> 			...</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt b/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt<br/>index b98203ca656d..a4e72e52af59 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/nuvoton,npcm-pspi.txt</a></div><div class='hunk'>@@ -3,7 +3,8 @@ Nuvoton NPCM Peripheral Serial Peripheral Interface(PSPI) controller driver</div><div class='ctx'> Nuvoton NPCM7xx SOC support two PSPI channels.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='del'>- - compatible : "nuvoton,npcm750-pspi" for NPCM7XX BMC</div><div class='add'>+ - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.</div><div class='add'>+				"nuvoton,npcm845-pspi" for Arbel NPCM8XX.</div><div class='ctx'>  - #address-cells : should be 1. see spi-bus.txt</div><div class='ctx'>  - #size-cells : should be 0. see spi-bus.txt</div><div class='ctx'>  - specifies physical base address and size of the register.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml b/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml<br/>new file mode 100644<br/>index 000000000000..4e0d391e1d69<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/nuvoton,wpcm450-fiu.yaml</a></div><div class='hunk'>@@ -0,0 +1,66 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/nuvoton,wpcm450-fiu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Nuvoton WPCM450 Flash Interface Unit (FIU)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nuvoton,wpcm450-fiu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: FIU registers</div><div class='add'>+      - description: Memory-mapped flash contents</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: control</div><div class='add'>+      - const: memory</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nuvoton,shm:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: a phandle to the SHM block (see ../arm/nuvoton,shm.yaml)</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spi@c8000000 {</div><div class='add'>+      compatible = "nuvoton,wpcm450-fiu";</div><div class='add'>+      reg = &lt;0xc8000000 0x1000&gt;, &lt;0xc0000000 0x4000000&gt;;</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      reg-names = "control", "memory";</div><div class='add'>+      clocks = &lt;&amp;clk 0&gt;;</div><div class='add'>+      nuvoton,shm = &lt;&amp;shm&gt;;</div><div class='add'>+</div><div class='add'>+      flash@0 {</div><div class='add'>+        compatible = "jedec,spi-nor";</div><div class='add'>+        reg = &lt;0&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    shm: syscon@c8001000 {</div><div class='add'>+      compatible = "nuvoton,wpcm450-shm", "syscon";</div><div class='add'>+      reg = &lt;0xc8001000 0x1000&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml<br/>new file mode 100644<br/>index 000000000000..2c3cada75339<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad-peripheral-props.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Peripheral properties for Tegra Quad SPI Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jonathan Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  nvidia,tx-clk-tap-delay:</div><div class='add'>+    description:</div><div class='add'>+      Delays the clock going out to device with this tap value.</div><div class='add'>+      Tap value varies based on platform design trace lengths from Tegra</div><div class='add'>+      QSPI to corresponding slave device.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 31</div><div class='add'>+</div><div class='add'>+  nvidia,rx-clk-tap-delay:</div><div class='add'>+    description:</div><div class='add'>+      Delays the clock coming in from the device with this tap value.</div><div class='add'>+      Tap value varies based on platform design trace lengths from Tegra</div><div class='add'>+      QSPI to corresponding slave device.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 255</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml b/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml<br/>index 0296edd1de22..9ae1611175f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/nvidia,tegra210-quad.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - Jonathan Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>       - nvidia,tegra186-qspi</div><div class='ctx'>       - nvidia,tegra194-qspi</div><div class='ctx'>       - nvidia,tegra234-qspi</div><div class='add'>+      - nvidia,tegra241-qspi</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -47,7 +48,7 @@ properties:</div><div class='ctx'>       - const: tx</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='del'>-  "@[0-9a-f]+":</div><div class='add'>+  "@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='hunk'>@@ -57,27 +58,6 @@ patternProperties:</div><div class='ctx'>       spi-tx-bus-width:</div><div class='ctx'>         enum: [1, 2, 4]</div><div class='ctx'> </div><div class='del'>-      nvidia,tx-clk-tap-delay:</div><div class='del'>-        description:</div><div class='del'>-          Delays the clock going out to device with this tap value.</div><div class='del'>-          Tap value varies based on platform design trace lengths from Tegra</div><div class='del'>-          QSPI to corresponding slave device.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        minimum: 0</div><div class='del'>-        maximum: 31</div><div class='del'>-</div><div class='del'>-      nvidia,rx-clk-tap-delay:</div><div class='del'>-        description:</div><div class='del'>-          Delays the clock coming in from the device with this tap value.</div><div class='del'>-          Tap value varies based on platform design trace lengths from Tegra</div><div class='del'>-          QSPI to corresponding slave device.</div><div class='del'>-        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-        minimum: 0</div><div class='del'>-        maximum: 255</div><div class='del'>-</div><div class='del'>-    required:</div><div class='del'>-      - reg</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -94,25 +74,25 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/reset/tegra210-car.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     spi@70410000 {</div><div class='del'>-            compatible = "nvidia,tegra210-qspi";</div><div class='del'>-            reg = &lt;0x70410000 0x1000&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='del'>-            clocks = &lt;&amp;tegra_car TEGRA210_CLK_QSPI&gt;,</div><div class='del'>-                     &lt;&amp;tegra_car TEGRA210_CLK_QSPI_PM&gt;;</div><div class='del'>-            clock-names = "qspi", "qspi_out";</div><div class='del'>-            resets = &lt;&amp;tegra_car 211&gt;;</div><div class='del'>-            dmas = &lt;&amp;apbdma 5&gt;, &lt;&amp;apbdma 5&gt;;</div><div class='del'>-            dma-names = "rx", "tx";</div><div class='del'>-</div><div class='del'>-            flash@0 {</div><div class='del'>-                    compatible = "jedec,spi-nor";</div><div class='del'>-                    reg = &lt;0&gt;;</div><div class='del'>-                    spi-max-frequency = &lt;104000000&gt;;</div><div class='del'>-                    spi-tx-bus-width = &lt;2&gt;;</div><div class='del'>-                    spi-rx-bus-width = &lt;2&gt;;</div><div class='del'>-                    nvidia,tx-clk-tap-delay = &lt;0&gt;;</div><div class='del'>-                    nvidia,rx-clk-tap-delay = &lt;0&gt;;</div><div class='del'>-            };</div><div class='add'>+        compatible = "nvidia,tegra210-qspi";</div><div class='add'>+        reg = &lt;0x70410000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA210_CLK_QSPI&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_QSPI_PM&gt;;</div><div class='add'>+        clock-names = "qspi", "qspi_out";</div><div class='add'>+        resets = &lt;&amp;tegra_car 211&gt;;</div><div class='add'>+        dmas = &lt;&amp;apbdma 5&gt;, &lt;&amp;apbdma 5&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+            compatible = "jedec,spi-nor";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;104000000&gt;;</div><div class='add'>+            spi-tx-bus-width = &lt;2&gt;;</div><div class='add'>+            spi-rx-bus-width = &lt;2&gt;;</div><div class='add'>+            nvidia,tx-clk-tap-delay = &lt;0&gt;;</div><div class='add'>+            nvidia,rx-clk-tap-delay = &lt;0&gt;;</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/omap-spi.yaml b/Documentation/devicetree/bindings/spi/omap-spi.yaml<br/>index 9952199cae11..352affa4b7f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/omap-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/omap-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/omap-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/omap-spi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/omap-spi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SPI controller bindings for OMAP and K3 SoCs</div><div class='add'>+title: SPI Controller on OMAP and K3 SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Aswath Govindraju &lt;a-govindraju@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt<br/>deleted file mode 100644<br/>index c8c1e913f4e7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)</div><div class='del'>-</div><div class='del'>-The QUP v3 core is a GENI based AHB slave that provides a common data path</div><div class='del'>-(an output FIFO and an input FIFO) for serial peripheral interface (SPI)</div><div class='del'>-mini-core.</div><div class='del'>-</div><div class='del'>-SPI in master mode supports up to 50MHz, up to four chip selects, programmable</div><div class='del'>-data path from 4 bits to 32 bits and numerous protocol variants.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Must contain "qcom,geni-spi".</div><div class='del'>-- reg:			Must contain SPI register location and length.</div><div class='del'>-- interrupts:		Must contain SPI controller interrupts.</div><div class='del'>-- clock-names:		Must contain "se".</div><div class='del'>-- clocks:		Serial engine core clock needed by the device.</div><div class='del'>-- #address-cells:	Must be &lt;1&gt; to define a chip select address on</div><div class='del'>-			the SPI bus.</div><div class='del'>-- #size-cells:		Must be &lt;0&gt;.</div><div class='del'>-</div><div class='del'>-SPI Controller nodes must be child of GENI based Qualcomm Universal</div><div class='del'>-Peripharal. Please refer GENI based QUP wrapper controller node bindings</div><div class='del'>-described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml.</div><div class='del'>-</div><div class='del'>-SPI slave nodes must be children of the SPI master node and conform to SPI bus</div><div class='del'>-binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	spi0: spi@a84000 {</div><div class='del'>-		compatible = "qcom,geni-spi";</div><div class='del'>-		reg = &lt;0xa84000 0x4000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clock-names = "se";</div><div class='del'>-		clocks = &lt;&amp;clock_gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='del'>-		pinctrl-names = "default", "sleep";</div><div class='del'>-		pinctrl-0 = &lt;&amp;qup_1_spi_2_active&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;qup_1_spi_2_sleep&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml<br/>new file mode 100644<br/>index 000000000000..2e20ca313ec1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/qcom,spi-geni-qcom.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GENI based Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QUP v3 core is a GENI based AHB slave that provides a common data path</div><div class='add'>+  (an output FIFO and an input FIFO) for serial peripheral interface (SPI)</div><div class='add'>+  mini-core.</div><div class='add'>+</div><div class='add'>+  SPI in master mode supports up to 50MHz, up to four chip selects,</div><div class='add'>+  programmable data path from 4 bits to 32 bits and numerous protocol variants.</div><div class='add'>+</div><div class='add'>+  SPI Controller nodes must be child of GENI based Qualcomm Universal</div><div class='add'>+  Peripharal. Please refer GENI based QUP wrapper controller node bindings</div><div class='add'>+  described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,geni-spi</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: se</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    minItems: 2</div><div class='add'>+    items:</div><div class='add'>+      - const: qup-core</div><div class='add'>+      - const: qup-config</div><div class='add'>+      - const: qup-memory</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interconnect/qcom,sc7180.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/qcom-rpmpd.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@880000 {</div><div class='add'>+        compatible = "qcom,geni-spi";</div><div class='add'>+        reg = &lt;0x00880000 0x4000&gt;;</div><div class='add'>+        clock-names = "se";</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S0_CLK&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;qup_spi0_default&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        power-domains = &lt;&amp;rpmhpd SC7180_CX&gt;;</div><div class='add'>+        operating-points-v2 = &lt;&amp;qup_opp_table&gt;;</div><div class='add'>+        interconnects = &lt;&amp;qup_virt MASTER_QUP_CORE_0 0 &amp;qup_virt SLAVE_QUP_CORE_0 0&gt;,</div><div class='add'>+                        &lt;&amp;gem_noc MASTER_APPSS_PROC 0 &amp;config_noc SLAVE_QUP_0 0&gt;;</div><div class='add'>+        interconnect-names = "qup-core", "qup-config";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/dma/qcom-gpi.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@884000 {</div><div class='add'>+        compatible = "qcom,geni-spi";</div><div class='add'>+        reg = &lt;0x00884000 0x4000&gt;;</div><div class='add'>+        clock-names = "se";</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_QUPV3_WRAP0_S1_CLK&gt;;</div><div class='add'>+        dmas = &lt;&amp;gpi_dma0 0 1 QCOM_GPI_SPI&gt;,</div><div class='add'>+               &lt;&amp;gpi_dma0 1 1 QCOM_GPI_SPI&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;qup_spi1_default&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml<br/>index 5a60fba14bba..ee8f7ea907b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/qcom,spi-qcom-qspi.yaml</a></div><div class='hunk'>@@ -1,15 +1,13 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Qualcomm Quad Serial Peripheral Interface (QSPI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Mukesh Savaliya &lt;msavaliy@codeaurora.org&gt;</div><div class='del'>-  - Akash Asthana &lt;akashast@codeaurora.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: The QSPI controller allows SPI protocol communication in single,</div><div class='ctx'>   dual, or quad wire transmission modes for read/write access to slaves such</div><div class='hunk'>@@ -49,10 +47,16 @@ properties:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   interconnect-names:</div><div class='add'>+    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: qspi-config</div><div class='ctx'>       - const: qspi-memory</div><div class='ctx'> </div><div class='add'>+  operating-points-v2: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -88,7 +92,6 @@ examples:</div><div class='ctx'>                 spi-tx-bus-width = &lt;2&gt;;</div><div class='ctx'>                 spi-rx-bus-width = &lt;2&gt;;</div><div class='ctx'>             };</div><div class='del'>-</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt<br/>deleted file mode 100644<br/>index 5c090771c016..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/qcom,spi-qup.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,103 +0,0 @@</div><div class='del'>-Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)</div><div class='del'>-</div><div class='del'>-The QUP core is an AHB slave that provides a common data path (an output FIFO</div><div class='del'>-and an input FIFO) for serial peripheral interface (SPI) mini-core.</div><div class='del'>-</div><div class='del'>-SPI in master mode supports up to 50MHz, up to four chip selects, programmable</div><div class='del'>-data path from 4 bits to 32 bits and numerous protocol variants.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:     Should contain:</div><div class='del'>-		  "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.</div><div class='del'>-		  "qcom,spi-qup-v2.1.1" for 8974 and later</div><div class='del'>-		  "qcom,spi-qup-v2.2.1" for 8974 v2 and later.</div><div class='del'>-</div><div class='del'>-- reg:            Should contain base register location and length</div><div class='del'>-- interrupts:     Interrupt number used by this controller</div><div class='del'>-</div><div class='del'>-- clocks:         Should contain the core clock and the AHB clock.</div><div class='del'>-- clock-names:    Should be "core" for the core clock and "iface" for the</div><div class='del'>-                  AHB clock.</div><div class='del'>-</div><div class='del'>-- #address-cells: Number of cells required to define a chip select</div><div class='del'>-                  address on the SPI bus. Should be set to 1.</div><div class='del'>-- #size-cells:    Should be zero.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- spi-max-frequency: Specifies maximum SPI clock frequency,</div><div class='del'>-                     Units - Hz. Definition as per</div><div class='del'>-                     Documentation/devicetree/bindings/spi/spi-bus.txt</div><div class='del'>-- num-cs:	total number of chipselects</div><div class='del'>-- cs-gpios:	should specify GPIOs used for chipselects.</div><div class='del'>-		The gpios will be referred to as reg = &lt;index&gt; in the SPI child</div><div class='del'>-		nodes.  If unspecified, a single SPI device without a chip</div><div class='del'>-		select can be used.</div><div class='del'>-</div><div class='del'>-- dmas:         Two DMA channel specifiers following the convention outlined</div><div class='del'>-                in bindings/dma/dma.txt</div><div class='del'>-- dma-names:    Names for the dma channels, if present. There must be at</div><div class='del'>-                least one channel named "tx" for transmit and named "rx" for</div><div class='del'>-                receive.</div><div class='del'>-</div><div class='del'>-SPI slave nodes must be children of the SPI master node and can contain</div><div class='del'>-properties described in Documentation/devicetree/bindings/spi/spi-bus.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	spi_8: spi@f9964000 { /* BLSP2 QUP2 */</div><div class='del'>-</div><div class='del'>-		compatible = "qcom,spi-qup-v2";</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-		reg = &lt;0xf9964000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 102 0&gt;;</div><div class='del'>-		spi-max-frequency = &lt;19200000&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;gcc GCC_BLSP2_QUP2_SPI_APPS_CLK&gt;, &lt;&amp;gcc GCC_BLSP2_AHB_CLK&gt;;</div><div class='del'>-		clock-names = "core", "iface";</div><div class='del'>-</div><div class='del'>-		dmas = &lt;&amp;blsp1_bam 13&gt;, &lt;&amp;blsp1_bam 12&gt;;</div><div class='del'>-		dma-names = "rx", "tx";</div><div class='del'>-</div><div class='del'>-		pinctrl-names = "default";</div><div class='del'>-		pinctrl-0 = &lt;&amp;spi8_default&gt;;</div><div class='del'>-</div><div class='del'>-		device@0 {</div><div class='del'>-			compatible = "arm,pl022-dummy";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;0&gt;; /* Chip select 0 */</div><div class='del'>-			spi-max-frequency = &lt;19200000&gt;;</div><div class='del'>-			spi-cpol;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		device@1 {</div><div class='del'>-			compatible = "arm,pl022-dummy";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;1&gt;; /* Chip select 1 */</div><div class='del'>-			spi-max-frequency = &lt;9600000&gt;;</div><div class='del'>-			spi-cpha;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		device@2 {</div><div class='del'>-			compatible = "arm,pl022-dummy";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;2&gt;; /* Chip select 2 */</div><div class='del'>-			spi-max-frequency = &lt;19200000&gt;;</div><div class='del'>-			spi-cpol;</div><div class='del'>-			spi-cpha;</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		device@3 {</div><div class='del'>-			compatible = "arm,pl022-dummy";</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;1&gt;;</div><div class='del'>-			reg = &lt;3&gt;; /* Chip select 3 */</div><div class='del'>-			spi-max-frequency = &lt;19200000&gt;;</div><div class='del'>-			spi-cpol;</div><div class='del'>-			spi-cpha;</div><div class='del'>-			spi-cs-high;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml<br/>new file mode 100644<br/>index 000000000000..93f14dd01afc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/qcom,spi-qup.yaml</a></div><div class='hunk'>@@ -0,0 +1,81 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/qcom,spi-qup.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Andy Gross &lt;agross@kernel.org&gt;</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The QUP core is an AHB slave that provides a common data path (an output FIFO</div><div class='add'>+  and an input FIFO) for serial peripheral interface (SPI) mini-core.</div><div class='add'>+</div><div class='add'>+  SPI in master mode supports up to 50MHz, up to four chip selects,</div><div class='add'>+  programmable data path from 4 bits to 32 bits and numerous protocol variants.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,spi-qup-v1.1.1 # for 8660, 8960 and 8064</div><div class='add'>+      - qcom,spi-qup-v2.1.1 # for 8974 and later</div><div class='add'>+      - qcom,spi-qup-v2.2.1 # for 8974 v2 and later</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: core</div><div class='add'>+      - const: iface</div><div class='add'>+</div><div class='add'>+  dmas:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,gcc-msm8996.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@7575000 {</div><div class='add'>+        compatible = "qcom,spi-qup-v2.2.1";</div><div class='add'>+        reg = &lt;0x07575000 0x600&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;gcc GCC_BLSP1_QUP1_SPI_APPS_CLK&gt;,</div><div class='add'>+                 &lt;&amp;gcc GCC_BLSP1_AHB_CLK&gt;;</div><div class='add'>+        clock-names = "core", "iface";</div><div class='add'>+        pinctrl-names = "default", "sleep";</div><div class='add'>+        pinctrl-0 = &lt;&amp;blsp1_spi1_default&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;blsp1_spi1_sleep&gt;;</div><div class='add'>+        dmas = &lt;&amp;blsp1_dma 12&gt;, &lt;&amp;blsp1_dma 13&gt;;</div><div class='add'>+        dma-names = "tx", "rx";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml b/Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml<br/>new file mode 100644<br/>index 000000000000..22879f7dcb77<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/ralink,mt7621-spi.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/ralink,mt7621-spi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+title: Mediatek MT7621/MT7628 SPI controller</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,mt7621-spi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: spi</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: spi</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - resets</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/mt7621-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt7621-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@b00 {</div><div class='add'>+      compatible = "ralink,mt7621-spi";</div><div class='add'>+      reg = &lt;0xb00 0x100&gt;;</div><div class='add'>+      clocks = &lt;&amp;sysc MT7621_CLK_SPI&gt;;</div><div class='add'>+      clock-names = "spi";</div><div class='add'>+      resets = &lt;&amp;sysc MT7621_RST_SPI&gt;;</div><div class='add'>+      reset-names = "spi";</div><div class='add'>+</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      pinctrl-0 = &lt;&amp;spi_pins&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml b/Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml<br/>index 2f938c293f70..70330d945a70 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/realtek,rtl-spi.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - Birger Koblitz &lt;mail@birger-koblitz.de&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/renesas,hspi.yaml b/Documentation/devicetree/bindings/spi/renesas,hspi.yaml<br/>index c0eccf703039..bab5d4b7fc3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/renesas,hspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/renesas,hspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/renesas,hspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/renesas,hspi.yaml</a></div><div class='hunk'>@@ -56,4 +56,3 @@ examples:</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/renesas,rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rspi.yaml<br/>index 2c3c6bd6ec45..4d8ec69214c9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/renesas,rspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/renesas,rspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/renesas,rspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/renesas,rspi.yaml</a></div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - renesas,rspi-r7s72100  # RZ/A1H</div><div class='ctx'>               - renesas,rspi-r7s9210   # RZ/A2</div><div class='add'>+              - renesas,r9a07g043-rspi # RZ/G2UL</div><div class='ctx'>               - renesas,r9a07g044-rspi # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,r9a07g054-rspi # RZ/V2L</div><div class='ctx'>           - const: renesas,rspi-rz</div><div class='hunk'>@@ -124,6 +125,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - renesas,qspi</div><div class='add'>+              - renesas,r9a07g043-rspi</div><div class='ctx'>               - renesas,r9a07g044-rspi</div><div class='ctx'>               - renesas,r9a07g054-rspi</div><div class='ctx'>     then:</div><div class='hunk'>@@ -139,15 +141,15 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/power/r8a7791-sysc.h&gt;</div><div class='ctx'> </div><div class='ctx'>     qspi: spi@e6b10000 {</div><div class='del'>-            compatible = "renesas,qspi-r8a7791", "renesas,qspi";</div><div class='del'>-            reg = &lt;0xe6b10000 0x2c&gt;;</div><div class='del'>-            interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD 917&gt;;</div><div class='del'>-            dmas = &lt;&amp;dmac0 0x17&gt;, &lt;&amp;dmac0 0x18&gt;, &lt;&amp;dmac1 0x17&gt;, &lt;&amp;dmac1 0x18&gt;;</div><div class='del'>-            dma-names = "tx", "rx", "tx", "rx";</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg 917&gt;;</div><div class='del'>-            num-cs = &lt;1&gt;;</div><div class='del'>-            #address-cells = &lt;1&gt;;</div><div class='del'>-            #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "renesas,qspi-r8a7791", "renesas,qspi";</div><div class='add'>+        reg = &lt;0xe6b10000 0x2c&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 917&gt;;</div><div class='add'>+        dmas = &lt;&amp;dmac0 0x17&gt;, &lt;&amp;dmac0 0x18&gt;, &lt;&amp;dmac1 0x17&gt;, &lt;&amp;dmac1 0x18&gt;;</div><div class='add'>+        dma-names = "tx", "rx", "tx", "rx";</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 917&gt;;</div><div class='add'>+        num-cs = &lt;1&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml b/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml<br/>index b104899205f6..00acbbb0f65d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/renesas,sh-msiof.yaml</a></div><div class='hunk'>@@ -47,10 +47,16 @@ properties:</div><div class='ctx'>               - renesas,msiof-r8a77980      # R-Car V3H</div><div class='ctx'>               - renesas,msiof-r8a77990      # R-Car E3</div><div class='ctx'>               - renesas,msiof-r8a77995      # R-Car D3</div><div class='del'>-              - renesas,msiof-r8a779a0      # R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-msiof  # generic R-Car Gen3 and RZ/G2</div><div class='ctx'>                                             # compatible device</div><div class='ctx'>       - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,msiof-r8a779a0      # R-Car V3U</div><div class='add'>+              - renesas,msiof-r8a779f0      # R-Car S4-8</div><div class='add'>+              - renesas,msiof-r8a779g0      # R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-msiof  # generic R-Car Gen4</div><div class='add'>+                                            # compatible device</div><div class='add'>+      - items:</div><div class='ctx'>           - const: renesas,sh-msiof  # deprecated</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -69,6 +75,12 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   num-cs:</div><div class='ctx'>     description: |</div><div class='ctx'>       Total number of chip selects (default is 1).</div><div class='hunk'>@@ -124,7 +136,6 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       Override the default TX fifo size.  Unit is words.  Ignored if 0.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    maxItems: 1</div><div class='ctx'>     default: 64</div><div class='ctx'> </div><div class='ctx'>   renesas,rx-fifo-size:</div><div class='hunk'>@@ -132,30 +143,44 @@ properties:</div><div class='ctx'>     description: |</div><div class='ctx'>       Override the default RX fifo size.  Unit is words.  Ignored if 0.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='del'>-    maxItems: 1</div><div class='ctx'>     default: 64</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='ctx'>   - '#address-cells'</div><div class='ctx'>   - '#size-cells'</div><div class='ctx'> </div><div class='add'>+if:</div><div class='add'>+  not:</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          const: renesas,sh-mobile-msiof</div><div class='add'>+then:</div><div class='add'>+  required:</div><div class='add'>+    - resets</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/clock/r8a7791-clock.h&gt;</div><div class='del'>-    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a7791-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/r8a7791-sysc.h&gt;</div><div class='ctx'> </div><div class='ctx'>     msiof0: spi@e6e20000 {</div><div class='ctx'>         compatible = "renesas,msiof-r8a7791", "renesas,rcar-gen2-msiof";</div><div class='ctx'>         reg = &lt;0xe6e20000 0x0064&gt;;</div><div class='del'>-        interrupts = &lt;0 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        clocks = &lt;&amp;mstp0_clks R8A7791_CLK_MSIOF0&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 000&gt;;</div><div class='ctx'>         dmas = &lt;&amp;dmac0 0x51&gt;, &lt;&amp;dmac0 0x52&gt;;</div><div class='ctx'>         dma-names = "tx", "rx";</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7791_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 0&gt;;</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml<br/>index f0db3fb3d688..25b1b6c12d4d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/samsung,spi-peripheral-props.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Peripheral-specific properties for Samsung S3C/S5P/Exynos SoC SPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   See spi-peripheral-props.yaml for more info.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/samsung,spi.yaml b/Documentation/devicetree/bindings/spi/samsung,spi.yaml<br/>index bf9a76d931d2..e0a465d70b0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/samsung,spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/samsung,spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/samsung,spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/samsung,spi.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung S3C/S5P/Exynos SoC SPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   All the SPI controller nodes should be represented in the aliases node using</div><div class='hunk'>@@ -20,7 +20,9 @@ properties:</div><div class='ctx'>           - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450</div><div class='ctx'>           - samsung,s3c6410-spi</div><div class='ctx'>           - samsung,s5pv210-spi # for S5PV210 and S5PC110</div><div class='add'>+          - samsung,exynos4210-spi</div><div class='ctx'>           - samsung,exynos5433-spi</div><div class='add'>+          - samsung,exynosautov9-spi</div><div class='ctx'>           - tesla,fsd-spi</div><div class='ctx'>       - const: samsung,exynos7-spi</div><div class='ctx'>         deprecated: true</div><div class='hunk'>@@ -85,7 +87,9 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='del'>-            const: samsung,exynos5433-spi</div><div class='add'>+            enum:</div><div class='add'>+              - samsung,exynos5433-spi</div><div class='add'>+              - samsung,exynosautov9-spi</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml<br/>index d7e08b03e204..12ca108864c6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Mark Brown &lt;broonie@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -37,6 +37,17 @@ allOf:</div><div class='ctx'>     else:</div><div class='ctx'>       required:</div><div class='ctx'>         - interrupts</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: amd,pensando-elba-spi</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - amd,pensando-elba-syscon</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        amd,pensando-elba-syscon: false</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -61,6 +72,10 @@ properties:</div><div class='ctx'>           - const: snps,dw-apb-ssi</div><div class='ctx'>       - description: Intel Keem Bay SPI Controller</div><div class='ctx'>         const: intel,keembay-ssi</div><div class='add'>+      - description: Intel Thunder Bay SPI Controller</div><div class='add'>+        const: intel,thunderbay-ssi</div><div class='add'>+      - description: AMD Pensando Elba SoC SPI Controller</div><div class='add'>+        const: amd,pensando-elba-spi</div><div class='ctx'>       - description: Baikal-T1 SPI Controller</div><div class='ctx'>         const: baikal,bt1-ssi</div><div class='ctx'>       - description: Baikal-T1 System Boot SPI Controller</div><div class='hunk'>@@ -102,7 +117,6 @@ properties:</div><div class='ctx'>     const: spi</div><div class='ctx'> </div><div class='ctx'>   reg-io-width:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: I/O register width (in bytes) implemented by this device</div><div class='ctx'>     default: 4</div><div class='ctx'>     enum: [ 2, 4 ]</div><div class='hunk'>@@ -124,9 +138,22 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   rx-sample-delay-ns:</div><div class='ctx'>     default: 0</div><div class='del'>-    description: Default value of the rx-sample-delay-ns property.</div><div class='add'>+    description: |</div><div class='add'>+      Default value of the rx-sample-delay-ns property.</div><div class='ctx'>       This value will be used if the property is not explicitly defined</div><div class='del'>-      for a SPI slave device. See below.</div><div class='add'>+      for a SPI slave device.</div><div class='add'>+</div><div class='add'>+      SPI Rx sample delay offset, unit is nanoseconds.</div><div class='add'>+      The delay from the default sample time before the actual sample of the</div><div class='add'>+      rxd input signal occurs. The "rx_sample_delay" is an optional feature</div><div class='add'>+      of the designware controller, and the upper limit is also subject to</div><div class='add'>+      controller configuration.</div><div class='add'>+</div><div class='add'>+  amd,pensando-elba-syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      Block address to control SPI chip-selects. The Elba SoC system controller</div><div class='add'>+      provides an interface to override the native DWC SSI CS control.</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^.*@[0-9a-f]+$":</div><div class='hunk'>@@ -136,19 +163,6 @@ patternProperties:</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 3</div><div class='ctx'> </div><div class='del'>-      spi-rx-bus-width:</div><div class='del'>-        const: 1</div><div class='del'>-</div><div class='del'>-      spi-tx-bus-width:</div><div class='del'>-        const: 1</div><div class='del'>-</div><div class='del'>-      rx-sample-delay-ns:</div><div class='del'>-        description: SPI Rx sample delay offset, unit is nanoseconds.</div><div class='del'>-          The delay from the default sample time before the actual</div><div class='del'>-          sample of the rxd input signal occurs. The "rx_sample_delay"</div><div class='del'>-          is an optional feature of the designware controller, and the</div><div class='del'>-          upper limit is also subject to controller configuration.</div><div class='del'>-</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/socionext,f-ospi.yaml b/Documentation/devicetree/bindings/spi/socionext,f-ospi.yaml<br/>new file mode 100644<br/>index 000000000000..9878d1446552<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/socionext,f-ospi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/socionext,f-ospi.yaml</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/socionext,f-ospi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext F_OSPI controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Socionext F_OSPI is a controller used to interface with flash</div><div class='add'>+  memories using the SPI communication interface.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: socionext,f-ospi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  num-cs:</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 4</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - "#address-cells"</div><div class='add'>+  - "#size-cells"</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    ospi0: spi@80000000 {</div><div class='add'>+        compatible = "socionext,f-ospi";</div><div class='add'>+        reg = &lt;0x80000000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks 0&gt;;</div><div class='add'>+        num-cs = &lt;1&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        flash@0 {</div><div class='add'>+            compatible = "spansion,s25fl128s", "jedec,spi-nor";</div><div class='add'>+            reg = &lt;0&gt;;</div><div class='add'>+            spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml b/Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml<br/>new file mode 100644<br/>index 000000000000..45cbe744c7ff<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml</a></div><div class='hunk'>@@ -0,0 +1,73 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/socionext,synquacer-spi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Socionext SynQuacer HS-SPI Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Masahisa Kojima &lt;masahisa.kojima@linaro.org&gt;</div><div class='add'>+  - Jassi Brar &lt;jaswinder.singh@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: socionext,synquacer-spi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: core clock</div><div class='add'>+      - description: rate clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: iHCLK</div><div class='add'>+      - const: iPCLK</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Receive Interrupt</div><div class='add'>+      - description: Transmit Interrupt</div><div class='add'>+      - description: Fault Interrupt</div><div class='add'>+</div><div class='add'>+  socionext,use-rtm:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Enable using "retimed clock" for RX</div><div class='add'>+</div><div class='add'>+  socionext,set-aces:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Enable same active clock edges field to be set</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    spi@ff110000 {</div><div class='add'>+        compatible = "socionext,synquacer-spi";</div><div class='add'>+        reg = &lt;0xff110000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+               &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+               &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk_hsspi&gt;;</div><div class='add'>+        clock-names = "iHCLK";</div><div class='add'>+        socionext,use-rtm;</div><div class='add'>+        socionext,set-aces;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt b/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt<br/>deleted file mode 100644<br/>index 37b29ee13860..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-bcm63xx-hsspi.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,33 +0,0 @@</div><div class='del'>-Binding for Broadcom BCM6328 High Speed SPI controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must contain of "brcm,bcm6328-hsspi".</div><div class='del'>-- reg: Base address and size of the controllers memory area.</div><div class='del'>-- interrupts: Interrupt for the SPI block.</div><div class='del'>-- clocks: phandles of the SPI clock and the PLL clock.</div><div class='del'>-- clock-names: must be "hsspi", "pll".</div><div class='del'>-- #address-cells: &lt;1&gt;, as required by generic SPI binding.</div><div class='del'>-- #size-cells: &lt;0&gt;, also as required by generic SPI binding.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- num-cs: some controllers have less than 8 cs signals. Defaults to 8</div><div class='del'>-  if absent.</div><div class='del'>-</div><div class='del'>-Child nodes as per the generic SPI binding.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	spi@10001000 {</div><div class='del'>-		compatible = "brcm,bcm6328-hsspi";</div><div class='del'>-		reg = &lt;0x10001000 0x600&gt;;</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;29&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;clkctl 9&gt;, &lt;&amp;hsspi_pll&gt;;</div><div class='del'>-		clock-names = "hsspi", "pll";</div><div class='del'>-</div><div class='del'>-		num-cs = &lt;2&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.yaml b/Documentation/devicetree/bindings/spi/spi-cadence.yaml<br/>index 9787be21318e..b0f83b5c2cdd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-cadence.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-cadence.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-cadence.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-cadence.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/spi-cadence.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence SPI controller Device Tree Bindings</div><div class='add'>+title: Cadence SPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -49,6 +49,13 @@ properties:</div><div class='ctx'>     enum: [ 0, 1 ]</div><div class='ctx'>     default: 0</div><div class='ctx'> </div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml<br/>index ebb4d5f1cf4f..90945f59b7e8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-controller.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-controller.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-controller.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-controller.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/spi-controller.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SPI Controller Generic Binding</div><div class='add'>+title: SPI Controller Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mark Brown &lt;broonie@kernel.org&gt;</div><div class='hunk'>@@ -94,6 +94,23 @@ patternProperties:</div><div class='ctx'>   "^.*@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: spi-peripheral-props.yaml</div><div class='add'>+    additionalProperties: true</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      spi-3wire:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          The device requires 3-wire mode.</div><div class='add'>+</div><div class='add'>+      spi-cpha:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          The device requires shifted clock phase (CPHA) mode.</div><div class='add'>+</div><div class='add'>+      spi-cpol:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+        description:</div><div class='add'>+          The device requires inverse clock polarity (CPOL) mode.</div><div class='ctx'> </div><div class='ctx'>     required:</div><div class='ctx'>       - compatible</div><div class='hunk'>@@ -139,9 +156,9 @@ examples:</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         flash@2 {</div><div class='del'>-          compatible = "jedec,spi-nor";</div><div class='del'>-          spi-max-frequency = &lt;50000000&gt;;</div><div class='del'>-          reg = &lt;2&gt;, &lt;3&gt;;</div><div class='del'>-          stacked-memories = /bits/ 64 &lt;0x10000000 0x10000000&gt;;</div><div class='add'>+            compatible = "jedec,spi-nor";</div><div class='add'>+            spi-max-frequency = &lt;50000000&gt;;</div><div class='add'>+            reg = &lt;2&gt;, &lt;3&gt;;</div><div class='add'>+            stacked-memories = /bits/ 64 &lt;0x10000000 0x10000000&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt<br/>index 200c7fc7b089..f012888656ec 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-davinci.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-davinci.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-davinci.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-davinci.txt</a></div><div class='hunk'>@@ -78,7 +78,7 @@ spi0:spi@20bf0000 {</div><div class='ctx'> 	interrupts			= &lt;338&gt;;</div><div class='ctx'> 	clocks				= &lt;&amp;clkspi&gt;;</div><div class='ctx'> </div><div class='del'>-	flash: n25q032@0 {</div><div class='add'>+	flash: flash@0 {</div><div class='ctx'> 		#address-cells = &lt;1&gt;;</div><div class='ctx'> 		#size-cells = &lt;1&gt;;</div><div class='ctx'> 		compatible = "st,m25p32";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml b/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml<br/>index 1d46877fe46a..e91425012319 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-fsl-lpspi.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -19,7 +19,9 @@ properties:</div><div class='ctx'>           - fsl,imx7ulp-spi</div><div class='ctx'>           - fsl,imx8qxp-spi</div><div class='ctx'>       - items:</div><div class='del'>-          - const: fsl,imx8ulp-spi</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8ulp-spi</div><div class='add'>+              - fsl,imx93-spi</div><div class='ctx'>           - const: fsl,imx7ulp-spi</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -37,6 +39,16 @@ properties:</div><div class='ctx'>       - const: per</div><div class='ctx'>       - const: ipg</div><div class='ctx'> </div><div class='add'>+  dmas:</div><div class='add'>+    items:</div><div class='add'>+      - description: TX DMA Channel</div><div class='add'>+      - description: RX DMA Channel</div><div class='add'>+</div><div class='add'>+  dma-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tx</div><div class='add'>+      - const: rx</div><div class='add'>+</div><div class='ctx'>   fsl,spi-only-use-cs1-sel:</div><div class='ctx'>     description:</div><div class='ctx'>       spi common code does not support use of CS signals discontinuously.</div><div class='hunk'>@@ -44,6 +56,13 @@ properties:</div><div class='ctx'>       this property to re-config the chipselect value in the LPSPI driver.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  num-cs:</div><div class='add'>+    description:</div><div class='add'>+      number of chip selects.</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 2</div><div class='add'>+    default: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -68,4 +87,5 @@ examples:</div><div class='ctx'>         clock-names = "per", "ipg";</div><div class='ctx'>         spi-slave;</div><div class='ctx'>         fsl,spi-only-use-cs1-sel;</div><div class='add'>+        num-cs = &lt;2&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-gpio.yaml b/Documentation/devicetree/bindings/spi/spi-gpio.yaml<br/>index 0d0b6d9dad1c..9ce1df93d4c3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-gpio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SPI-GPIO devicetree bindings</div><div class='add'>+title: SPI-GPIO</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='hunk'>@@ -14,7 +14,7 @@ description:</div><div class='ctx'>   dedicated GPIO lines.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -41,7 +41,7 @@ properties:</div><div class='ctx'>   num-chipselects:</div><div class='ctx'>     description: Number of chipselect lines. Should be &lt;0&gt; if a single device</div><div class='ctx'>       with no chip select is connected.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   # Deprecated properties</div><div class='ctx'>   gpio-sck: false</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-mt7621.txt b/Documentation/devicetree/bindings/spi/spi-mt7621.txt<br/>deleted file mode 100644<br/>index d5baec0fa56e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-mt7621.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-mt7621.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Binding for MTK SPI controller (MT7621 MIPS)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: Should be one of the following:</div><div class='del'>-  - "ralink,mt7621-spi": for mt7621/mt7628/mt7688 platforms</div><div class='del'>-- #address-cells: should be 1.</div><div class='del'>-- #size-cells: should be 0.</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- resets: phandle to the reset controller asserting this device in</div><div class='del'>-          reset</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- cs-gpios: see spi-bus.txt.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-- SoC Specific Portion:</div><div class='del'>-spi0: spi@b00 {</div><div class='del'>-	compatible = "ralink,mt7621-spi";</div><div class='del'>-	reg = &lt;0xb00 0x100&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	resets = &lt;&amp;rstctrl 18&gt;;</div><div class='del'>-	reset-names = "spi";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-mux.yaml b/Documentation/devicetree/bindings/spi/spi-mux.yaml<br/>index 7ea79f6d33f3..fb2a6039928c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-mux.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-mux.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-mux.yaml</a></div><div class='hunk'>@@ -30,8 +30,8 @@ description: |</div><div class='ctx'>       +------------+</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "/schemas/spi/spi-controller.yaml#"</div><div class='del'>-  - $ref: "/schemas/spi/spi-peripheral-props.yaml#"</div><div class='add'>+  - $ref: /schemas/spi/spi-controller.yaml#</div><div class='add'>+  - $ref: /schemas/spi/spi-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml b/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml<br/>index 1b552c298277..a813c971ecf6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-nxp-fspi.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ maintainers:</div><div class='ctx'>   - Kuldeep Singh &lt;singh.kuldeep87k@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml<br/>index 5e32928c4fc3..782a014b63a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description:</div><div class='ctx'>   their own separate schema that should be referenced from here.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Pratyush Yadav &lt;p.yadav@ti.com&gt;</div><div class='add'>+  - Mark Brown &lt;broonie@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   reg:</div><div class='hunk'>@@ -29,21 +29,6 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Chip select used by the device.</div><div class='ctx'> </div><div class='del'>-  spi-3wire:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-    description:</div><div class='del'>-      The device requires 3-wire mode.</div><div class='del'>-</div><div class='del'>-  spi-cpha:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-    description:</div><div class='del'>-      The device requires shifted clock phase (CPHA) mode.</div><div class='del'>-</div><div class='del'>-  spi-cpol:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-    description:</div><div class='del'>-      The device requires inverse clock polarity (CPOL) mode.</div><div class='del'>-</div><div class='ctx'>   spi-cs-high:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='ctx'>     description:</div><div class='hunk'>@@ -59,6 +44,21 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Maximum SPI clocking speed of the device in Hz.</div><div class='ctx'> </div><div class='add'>+  spi-cs-setup-delay-ns:</div><div class='add'>+    description:</div><div class='add'>+      Delay in nanoseconds to be introduced by the controller after CS is</div><div class='add'>+      asserted.</div><div class='add'>+</div><div class='add'>+  spi-cs-hold-delay-ns:</div><div class='add'>+    description:</div><div class='add'>+      Delay in nanoseconds to be introduced by the controller before CS is</div><div class='add'>+      de-asserted.</div><div class='add'>+</div><div class='add'>+  spi-cs-inactive-delay-ns:</div><div class='add'>+    description:</div><div class='add'>+      Delay in nanoseconds to be introduced by the controller after CS is</div><div class='add'>+      de-asserted.</div><div class='add'>+</div><div class='ctx'>   spi-rx-bus-width:</div><div class='ctx'>     description:</div><div class='ctx'>       Bus width to the SPI bus used for read transfers.</div><div class='hunk'>@@ -71,6 +71,11 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Delay, in microseconds, after a read transfer.</div><div class='ctx'> </div><div class='add'>+  rx-sample-delay-ns:</div><div class='add'>+    description: SPI Rx sample delay offset, unit is nanoseconds.</div><div class='add'>+      The delay from the default sample time before the actual</div><div class='add'>+      sample of the rxd input signal occurs.</div><div class='add'>+</div><div class='ctx'>   spi-tx-bus-width:</div><div class='ctx'>     description:</div><div class='ctx'>       Bus width to the SPI bus used for write transfers.</div><div class='hunk'>@@ -112,5 +117,6 @@ properties:</div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: cdns,qspi-nor-peripheral-props.yaml#</div><div class='ctx'>   - $ref: samsung,spi-peripheral-props.yaml#</div><div class='add'>+  - $ref: nvidia,tegra210-quad-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml<br/>index bda45ff3d294..91e540a92faf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-pl022.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-pl022.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-pl022.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-pl022.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> # We need a select here so we don't match all nodes with 'arm,primecell'</div><div class='ctx'> select:</div><div class='hunk'>@@ -45,7 +45,7 @@ properties:</div><div class='ctx'>     description: delay in ms following transfer completion before the</div><div class='ctx'>       runtime power management system suspends the device. A setting of 0</div><div class='ctx'>       indicates no delay and the device will be suspended immediately.</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'> </div><div class='ctx'>   pl022,rt:</div><div class='ctx'>     description: indicates the controller should run the message pump with realtime</div><div class='hunk'>@@ -81,7 +81,7 @@ patternProperties:</div><div class='ctx'>     properties:</div><div class='ctx'>       pl022,interface:</div><div class='ctx'>         description: SPI interface type</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         enum:</div><div class='ctx'>           - 0      # SPI</div><div class='ctx'>           - 1      # Texas Instruments Synchronous Serial Frame Format</div><div class='hunk'>@@ -89,7 +89,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>       pl022,com-mode:</div><div class='ctx'>         description: Specifies the transfer mode</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         enum:</div><div class='ctx'>           - 0      # interrupt mode</div><div class='ctx'>           - 1      # polling mode</div><div class='hunk'>@@ -98,30 +98,30 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>       pl022,rx-level-trig:</div><div class='ctx'>         description: Rx FIFO watermark level</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 4</div><div class='ctx'> </div><div class='ctx'>       pl022,tx-level-trig:</div><div class='ctx'>         description: Tx FIFO watermark level</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 4</div><div class='ctx'> </div><div class='ctx'>       pl022,ctrl-len:</div><div class='ctx'>         description: Microwire interface - Control length</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0x03</div><div class='ctx'>         maximum: 0x1f</div><div class='ctx'> </div><div class='ctx'>       pl022,wait-state:</div><div class='ctx'>         description: Microwire interface - Wait state</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'>       pl022,duplex:</div><div class='ctx'>         description: Microwire interface - Full/Half duplex</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         enum: [0, 1]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='hunk'>@@ -143,7 +143,7 @@ examples:</div><div class='ctx'>         &lt;&amp;dma_controller 24 0&gt;;</div><div class='ctx'>       dma-names = "rx", "tx";</div><div class='ctx'> </div><div class='del'>-      m25p80@1 {</div><div class='add'>+      flash@1 {</div><div class='ctx'>         compatible = "st,m25p80";</div><div class='ctx'>         reg = &lt;1&gt;;</div><div class='ctx'>         spi-max-frequency = &lt;12000000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.yaml b/Documentation/devicetree/bindings/spi/spi-rockchip.yaml<br/>index 52a78a2e362e..e4941e9212d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-rockchip.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-rockchip.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-rockchip.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-rockchip.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ description:</div><div class='ctx'>   as flash and display controllers using the SPI communication interface.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - rockchip,px30-spi</div><div class='add'>+              - rockchip,rk3128-spi</div><div class='ctx'>               - rockchip,rk3188-spi</div><div class='ctx'>               - rockchip,rk3288-spi</div><div class='ctx'>               - rockchip,rk3308-spi</div><div class='hunk'>@@ -34,6 +35,7 @@ properties:</div><div class='ctx'>               - rockchip,rk3368-spi</div><div class='ctx'>               - rockchip,rk3399-spi</div><div class='ctx'>               - rockchip,rk3568-spi</div><div class='add'>+              - rockchip,rk3588-spi</div><div class='ctx'>               - rockchip,rv1126-spi</div><div class='ctx'>           - const: rockchip,rk3066-spi</div><div class='ctx'> </div><div class='hunk'>@@ -80,6 +82,9 @@ properties:</div><div class='ctx'>       where the "sleep" configuration may describe the state</div><div class='ctx'>       the pins should be in during system suspend.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml<br/>index 6e7e394fc1e4..5bffefb9c7eb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-sifive.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-sifive.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-sifive.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-sifive.yaml</a></div><div class='hunk'>@@ -12,7 +12,7 @@ maintainers:</div><div class='ctx'>   - Palmer Dabbelt &lt;palmer@sifive.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -51,14 +51,14 @@ properties:</div><div class='ctx'>   sifive,fifo-depth:</div><div class='ctx'>     description:</div><div class='ctx'>       Depth of hardware queues; defaults to 8</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [8]</div><div class='ctx'>     default: 8</div><div class='ctx'> </div><div class='ctx'>   sifive,max-bits-per-word:</div><div class='ctx'>     description:</div><div class='ctx'>       Maximum bits per word; defaults to 8</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     enum: [0, 1, 2, 3, 4, 5, 6, 7, 8]</div><div class='ctx'>     default: 8</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-st-ssc.txt b/Documentation/devicetree/bindings/spi/spi-st-ssc.txt<br/>deleted file mode 100644<br/>index 1bdc4709e474..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-st-ssc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-st-ssc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,40 +0,0 @@</div><div class='del'>-STMicroelectronics SSC (SPI) Controller</div><div class='del'>----------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible	: "st,comms-ssc4-spi"</div><div class='del'>-- reg		: Offset and length of the device's register set</div><div class='del'>-- interrupts	: The interrupt specifier</div><div class='del'>-- clock-names	: Must contain "ssc"</div><div class='del'>-- clocks	: Must contain an entry for each name in clock-names</div><div class='del'>-		    See ../clk/*</div><div class='del'>-- pinctrl-names	: Uses "default", can use "sleep" if provided</div><div class='del'>-		    See ../pinctrl/pinctrl-bindings.txt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- cs-gpios	: List of GPIO chip selects</div><div class='del'>-		    See ../spi/spi-bus.txt</div><div class='del'>-</div><div class='del'>-Child nodes represent devices on the SPI bus</div><div class='del'>-  See ../spi/spi-bus.txt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	spi@9840000 {</div><div class='del'>-		compatible	= "st,comms-ssc4-spi";</div><div class='del'>-		reg		= &lt;0x9840000 0x110&gt;;</div><div class='del'>-		interrupts	= &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks		= &lt;&amp;clk_s_c0_flexgen CLK_EXT2F_A9&gt;;</div><div class='del'>-		clock-names	= "ssc";</div><div class='del'>-		pinctrl-0	= &lt;&amp;pinctrl_spi0_default&gt;;</div><div class='del'>-		pinctrl-names	= "default";</div><div class='del'>-		cs-gpios	= &lt;&amp;pio17 5 0&gt;;</div><div class='del'>-		#address-cells	= &lt;1&gt;;</div><div class='del'>-		#size-cells	= &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		st95hf@0{</div><div class='del'>-			compatible		= "st,st95hf";</div><div class='del'>-			reg			= &lt;0&gt;;</div><div class='del'>-			spi-max-frequency	= &lt;1000000&gt;;</div><div class='del'>-			interrupts		= &lt;2 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml b/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml<br/>index 3a58cf0f1ec8..edb5ba71af3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml</a></div><div class='hunk'>@@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Sunplus sp7021 SPI controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml"</div><div class='add'>+  - $ref: spi-controller.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Li-hao Kuo &lt;lhjeff911@gmail.com&gt;</div><div class='hunk'>@@ -59,9 +59,9 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    spi@9C002D80 {</div><div class='add'>+    spi@9c002d80 {</div><div class='ctx'>         compatible = "sunplus,sp7021-spi";</div><div class='del'>-        reg = &lt;0x9C002D80 0x80&gt;, &lt;0x9C002E00 0x80&gt;;</div><div class='add'>+        reg = &lt;0x9c002d80 0x80&gt;, &lt;0x9c002e00 0x80&gt;;</div><div class='ctx'>         reg-names = "master", "slave";</div><div class='ctx'>         interrupt-parent = &lt;&amp;intc&gt;;</div><div class='ctx'>         interrupt-names = "dma_w",</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-synquacer.txt b/Documentation/devicetree/bindings/spi/spi-synquacer.txt<br/>deleted file mode 100644<br/>index 291dfa692d0a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-synquacer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-synquacer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,27 +0,0 @@</div><div class='del'>-* Socionext Synquacer HS-SPI bindings</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: should be "socionext,synquacer-spi"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-       region.</div><div class='del'>-- interrupts: should contain the "spi_rx", "spi_tx" and "spi_fault" interrupts.</div><div class='del'>-- clocks: core clock iHCLK. Optional rate clock iPCLK (default is iHCLK)</div><div class='del'>-- clock-names: Shall be "iHCLK" and "iPCLK" respectively</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- socionext,use-rtm: boolean, if required to use "retimed clock" for RX</div><div class='del'>-- socionext,set-aces: boolean, if same active clock edges field to be set.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	spi0: spi@ff110000 {</div><div class='del'>-		compatible = "socionext,synquacer-spi";</div><div class='del'>-		reg = &lt;0xff110000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk_hsspi&gt;;</div><div class='del'>-		clock-names = "iHCLK";</div><div class='del'>-		socionext,use-rtm;</div><div class='del'>-		socionext,set-aces;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.yaml b/Documentation/devicetree/bindings/spi/spi-xilinx.yaml<br/>index 03e5dca7e933..6bd83836eded 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-xilinx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-xilinx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-xilinx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-xilinx.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/spi-xilinx.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx SPI controller Device Tree Bindings</div><div class='add'>+title: Xilinx SPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml<br/>index ea72c8001256..20f77246d365 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml</a></div><div class='hunk'>@@ -4,17 +4,19 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/spi-zynqmp-qspi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Xilinx Zynq UltraScale+ MPSoC GQSPI controller Device Tree Bindings</div><div class='add'>+title: Xilinx Zynq UltraScale+ MPSoC GQSPI controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: xlnx,zynqmp-qspi-1.0</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,versal-qspi-1.0</div><div class='add'>+      - xlnx,zynqmp-qspi-1.0</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -30,6 +32,13 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clock-names</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/spi_atmel.txt b/Documentation/devicetree/bindings/spi/spi_atmel.txt<br/>deleted file mode 100644<br/>index 5bb4a8f1df7a..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/spi_atmel.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/spi_atmel.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,36 +0,0 @@</div><div class='del'>-Atmel SPI device</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : should be "atmel,at91rm9200-spi" or "microchip,sam9x60-spi".</div><div class='del'>-- reg: Address and length of the register set for the device</div><div class='del'>-- interrupts: Should contain spi interrupt</div><div class='del'>-- cs-gpios: chipselects (optional for SPI controller version &gt;= 2 with the</div><div class='del'>-  Chip Select Active After Transfer feature).</div><div class='del'>-- clock-names: tuple listing input clock names.</div><div class='del'>-	Required elements: "spi_clk"</div><div class='del'>-- clocks: phandles to input clocks.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO</div><div class='del'>-  capable SPI controllers.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-spi1: spi@fffcc000 {</div><div class='del'>-	compatible = "atmel,at91rm9200-spi";</div><div class='del'>-	reg = &lt;0xfffcc000 0x4000&gt;;</div><div class='del'>-	interrupts = &lt;13 4 5&gt;;</div><div class='del'>-	#address-cells = &lt;1&gt;;</div><div class='del'>-	#size-cells = &lt;0&gt;;</div><div class='del'>-	clocks = &lt;&amp;spi1_clk&gt;;</div><div class='del'>-	clock-names = "spi_clk";</div><div class='del'>-	cs-gpios = &lt;&amp;pioB 3 0&gt;;</div><div class='del'>-	atmel,fifo-size = &lt;32&gt;;</div><div class='del'>-</div><div class='del'>-	mmc-slot@0 {</div><div class='del'>-		compatible = "mmc-spi-slot";</div><div class='del'>-		reg = &lt;0&gt;;</div><div class='del'>-		gpios = &lt;&amp;pioC 4 0&gt;;	/* CD */</div><div class='del'>-		spi-max-frequency = &lt;25000000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml b/Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml<br/>index a3ab1a1f1eb4..903b06f88b1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/sprd,spi-adi.yaml</a></div><div class='hunk'>@@ -1,9 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='del'>-</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Spreadtrum ADI controller</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/st,ssc-spi.yaml b/Documentation/devicetree/bindings/spi/st,ssc-spi.yaml<br/>new file mode 100644<br/>index 000000000000..6a77cd3f5d6e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/st,ssc-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/st,ssc-spi.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spi/st,ssc-spi.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics SSC SPI Controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The STMicroelectronics SSC SPI controller can be found on STi platforms</div><div class='add'>+  and it used to communicate with external devices using the</div><div class='add'>+  Serial Peripheral Interface.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,comms-ssc4-spi</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: ssc</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/stih407-clks.h&gt;</div><div class='add'>+    spi@9840000 {</div><div class='add'>+      compatible = "st,comms-ssc4-spi";</div><div class='add'>+      reg = &lt;0x9840000 0x110&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      clocks = &lt;&amp;clk_s_c0_flexgen CLK_EXT2F_A9&gt;;</div><div class='add'>+      clock-names = "ssc";</div><div class='add'>+      pinctrl-0 = &lt;&amp;pinctrl_spi0_default&gt;;</div><div class='add'>+      pinctrl-names = "default";</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml<br/>index 6ec6f556182f..8bba965a9ae6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings</div><div class='add'>+title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Christophe Kerello &lt;christophe.kerello@foss.st.com&gt;</div><div class='ctx'>   - Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml<br/>index 3d64bed266ac..9ca1a843c820 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/st,stm32-spi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/st,stm32-spi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/st,stm32-spi.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 SPI Controller bindings</div><div class='add'>+title: STMicroelectronics STM32 SPI Controller</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The STM32 SPI controller is used to communicate with external devices using</div><div class='hunk'>@@ -17,7 +17,7 @@ maintainers:</div><div class='ctx'>   - Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -84,18 +84,17 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/stm32mp1-clks.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/reset/stm32mp1-resets.h&gt;</div><div class='ctx'>     spi@4000b000 {</div><div class='del'>-      #address-cells = &lt;1&gt;;</div><div class='del'>-      #size-cells = &lt;0&gt;;</div><div class='del'>-      compatible = "st,stm32h7-spi";</div><div class='del'>-      reg = &lt;0x4000b000 0x400&gt;;</div><div class='del'>-      interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-      clocks = &lt;&amp;rcc SPI2_K&gt;;</div><div class='del'>-      resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='del'>-      dmas = &lt;&amp;dmamux1 0 39 0x400 0x05&gt;,</div><div class='del'>-             &lt;&amp;dmamux1 1 40 0x400 0x05&gt;;</div><div class='del'>-      dma-names = "rx", "tx";</div><div class='del'>-      cs-gpios = &lt;&amp;gpioa 11 0&gt;;</div><div class='del'>-</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        compatible = "st,stm32h7-spi";</div><div class='add'>+        reg = &lt;0x4000b000 0x400&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;rcc SPI2_K&gt;;</div><div class='add'>+        resets = &lt;&amp;rcc SPI2_R&gt;;</div><div class='add'>+        dmas = &lt;&amp;dmamux1 0 39 0x400 0x05&gt;,</div><div class='add'>+               &lt;&amp;dmamux1 1 40 0x400 0x05&gt;;</div><div class='add'>+        dma-names = "rx", "tx";</div><div class='add'>+        cs-gpios = &lt;&amp;gpioa 11 0&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml b/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml<br/>index 1f1c40a9f320..83e8fb4a548d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spi/xlnx,zynq-qspi.yaml</a></div><div class='hunk'>@@ -11,7 +11,7 @@ description:</div><div class='ctx'>   memory devices.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "spi-controller.yaml#"</div><div class='add'>+  - $ref: spi-controller.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Michal Simek &lt;michal.simek@xilinx.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml b/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml<br/>index 2445c5e0b0ef..abcbbe13723f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spmi/mtk,spmi-mtk-pmif.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek SPMI Controller Device Tree Bindings</div><div class='add'>+title: Mediatek SPMI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Hsin-Hsiung Wang &lt;hsin-hsiung.wang@mediatek.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt<br/>deleted file mode 100644<br/>index ca645e21fe47..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,65 +0,0 @@</div><div class='del'>-Qualcomm SPMI Controller (PMIC Arbiter)</div><div class='del'>-</div><div class='del'>-The SPMI PMIC Arbiter is found on Snapdragon chipsets.  It is an SPMI</div><div class='del'>-controller with wrapping arbitration logic to allow for multiple on-chip</div><div class='del'>-devices to control a single SPMI master.</div><div class='del'>-</div><div class='del'>-The PMIC Arbiter can also act as an interrupt controller, providing interrupts</div><div class='del'>-to slave devices.</div><div class='del'>-</div><div class='del'>-See Documentation/devicetree/bindings/spmi/spmi.yaml for the generic SPMI</div><div class='del'>-controller binding requirements for child nodes.</div><div class='del'>-</div><div class='del'>-See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for</div><div class='del'>-generic interrupt controller binding documentation.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : should be "qcom,spmi-pmic-arb".</div><div class='del'>-- reg-names  : must contain:</div><div class='del'>-     "core" - core registers</div><div class='del'>-     "intr" - interrupt controller registers</div><div class='del'>-     "cnfg" - configuration registers</div><div class='del'>-   Registers used only for V2 PMIC Arbiter:</div><div class='del'>-     "chnls"  - tx-channel per virtual slave registers.</div><div class='del'>-     "obsrvr" - rx-channel (called observer) per virtual slave registers.</div><div class='del'>-</div><div class='del'>-- reg : address + size pairs describing the PMIC arb register sets; order must</div><div class='del'>-        correspond with the order of entries in reg-names</div><div class='del'>-- #address-cells : must be set to 2</div><div class='del'>-- #size-cells : must be set to 0</div><div class='del'>-- qcom,ee : indicates the active Execution Environment identifier (0-5)</div><div class='del'>-- qcom,channel : which of the PMIC Arb provided channels to use for accesses (0-5)</div><div class='del'>-- interrupts : interrupt list for the PMIC Arb controller, must contain a</div><div class='del'>-               single interrupt entry for the peripheral interrupt</div><div class='del'>-- interrupt-names : corresponding interrupt names for the interrupts</div><div class='del'>-                    listed in the 'interrupts' property, must contain:</div><div class='del'>-     "periph_irq" - summary interrupt for PMIC peripherals</div><div class='del'>-- interrupt-controller : boolean indicator that the PMIC arbiter is an interrupt controller</div><div class='del'>-- #interrupt-cells :  must be set to 4. Interrupts are specified as a 4-tuple:</div><div class='del'>-    cell 1: slave ID for the requested interrupt (0-15)</div><div class='del'>-    cell 2: peripheral ID for requested interrupt (0-255)</div><div class='del'>-    cell 3: the requested peripheral interrupt (0-7)</div><div class='del'>-    cell 4: interrupt flags indicating level-sense information, as defined in</div><div class='del'>-            dt-bindings/interrupt-controller/irq.h</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	spmi {</div><div class='del'>-		compatible = "qcom,spmi-pmic-arb";</div><div class='del'>-		reg-names = "core", "intr", "cnfg";</div><div class='del'>-		reg = &lt;0xfc4cf000 0x1000&gt;,</div><div class='del'>-		      &lt;0xfc4cb000 0x1000&gt;,</div><div class='del'>-		      &lt;0xfc4ca000 0x1000&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-names = "periph_irq";</div><div class='del'>-		interrupts = &lt;0 190 0&gt;;</div><div class='del'>-</div><div class='del'>-		qcom,ee = &lt;0&gt;;</div><div class='del'>-		qcom,channel = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		#address-cells = &lt;2&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-controller;</div><div class='del'>-		#interrupt-cells = &lt;4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml b/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml<br/>new file mode 100644<br/>index 000000000000..f983b4af6db9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm SPMI Controller (PMIC Arbiter)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stephen Boyd &lt;sboyd@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI</div><div class='add'>+  controller with wrapping arbitration logic to allow for multiple on-chip</div><div class='add'>+  devices to control a single SPMI master.</div><div class='add'>+</div><div class='add'>+  The PMIC Arbiter can also act as an interrupt controller, providing interrupts</div><div class='add'>+  to slave devices.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: spmi.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,spmi-pmic-arb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items: # V1</div><div class='add'>+          - description: core registers</div><div class='add'>+          - description: interrupt controller registers</div><div class='add'>+          - description: configuration registers</div><div class='add'>+      - items: # V2</div><div class='add'>+          - description: core registers</div><div class='add'>+          - description: tx-channel per virtual slave regosters</div><div class='add'>+          - description: rx-channel (called observer) per virtual slave registers</div><div class='add'>+          - description: interrupt controller registers</div><div class='add'>+          - description: configuration registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: core</div><div class='add'>+          - const: intr</div><div class='add'>+          - const: cnfg</div><div class='add'>+      - items:</div><div class='add'>+          - const: core</div><div class='add'>+          - const: chnls</div><div class='add'>+          - const: obsrvr</div><div class='add'>+          - const: intr</div><div class='add'>+          - const: cnfg</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    const: periph_irq</div><div class='add'>+</div><div class='add'>+  interrupt-controller: true</div><div class='add'>+</div><div class='add'>+  '#address-cells': true</div><div class='add'>+</div><div class='add'>+  '#interrupt-cells':</div><div class='add'>+    const: 4</div><div class='add'>+    description: |</div><div class='add'>+      cell 1: slave ID for the requested interrupt (0-15)</div><div class='add'>+      cell 2: peripheral ID for requested interrupt (0-255)</div><div class='add'>+      cell 3: the requested peripheral interrupt (0-7)</div><div class='add'>+      cell 4: interrupt flags indicating level-sense information,</div><div class='add'>+              as defined in dt-bindings/interrupt-controller/irq.h</div><div class='add'>+</div><div class='add'>+  '#size-cells': true</div><div class='add'>+</div><div class='add'>+  qcom,ee:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 5</div><div class='add'>+    description: &gt;</div><div class='add'>+      indicates the active Execution Environment identifier</div><div class='add'>+</div><div class='add'>+  qcom,channel:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 5</div><div class='add'>+    description: &gt;</div><div class='add'>+      which of the PMIC Arb provided channels to use for accesses</div><div class='add'>+</div><div class='add'>+  qcom,bus-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0</div><div class='add'>+    maximum: 1</div><div class='add'>+    description: &gt;</div><div class='add'>+      SPMI bus instance. only applicable to PMIC arbiter version 7 and beyond.</div><div class='add'>+      Supported values, 0 = primary bus, 1 = secondary bus</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg-names</div><div class='add'>+  - qcom,ee</div><div class='add'>+  - qcom,channel</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    spmi@fc4cf000 {</div><div class='add'>+        compatible = "qcom,spmi-pmic-arb";</div><div class='add'>+        reg-names = "core", "intr", "cnfg";</div><div class='add'>+        reg = &lt;0xfc4cf000 0x1000&gt;,</div><div class='add'>+              &lt;0xfc4cb000 0x1000&gt;,</div><div class='add'>+              &lt;0xfc4ca000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-names = "periph_irq";</div><div class='add'>+        interrupts = &lt;0 190 0&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,ee = &lt;0&gt;;</div><div class='add'>+        qcom,channel = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;4&gt;;</div><div class='add'>+</div><div class='add'>+        qcom,bus-id = &lt;0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml b/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml<br/>index 1c426c211e36..a1c96985951f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sram/allwinner,sun4i-a10-system-control.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 System Control Device Tree Bindings</div><div class='add'>+title: Allwinner A10 System Control</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -24,32 +24,31 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: allwinner,sun4i-a10-sram-controller</div><div class='add'>+      - enum:</div><div class='add'>+          - allwinner,sun4i-a10-sram-controller</div><div class='add'>+          - allwinner,sun50i-a64-sram-controller</div><div class='ctx'>         deprecated: true</div><div class='del'>-      - const: allwinner,sun4i-a10-system-control</div><div class='del'>-      - const: allwinner,sun5i-a13-system-control</div><div class='add'>+      - enum:</div><div class='add'>+          - allwinner,sun4i-a10-system-control</div><div class='add'>+          - allwinner,sun5i-a13-system-control</div><div class='add'>+          - allwinner,sun8i-a23-system-control</div><div class='add'>+          - allwinner,sun8i-h3-system-control</div><div class='add'>+          - allwinner,sun20i-d1-system-control</div><div class='add'>+          - allwinner,sun50i-a64-system-control</div><div class='add'>+          - allwinner,sun50i-h5-system-control</div><div class='add'>+          - allwinner,sun50i-h616-system-control</div><div class='ctx'>       - items:</div><div class='del'>-          - const: allwinner,sun7i-a20-system-control</div><div class='add'>+          - enum:</div><div class='add'>+              - allwinner,suniv-f1c100s-system-control</div><div class='add'>+              - allwinner,sun7i-a20-system-control</div><div class='add'>+              - allwinner,sun8i-r40-system-control</div><div class='ctx'>           - const: allwinner,sun4i-a10-system-control</div><div class='del'>-      - const: allwinner,sun8i-a23-system-control</div><div class='del'>-      - const: allwinner,sun8i-h3-system-control</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: allwinner,sun8i-v3s-system-control</div><div class='ctx'>           - const: allwinner,sun8i-h3-system-control</div><div class='ctx'>       - items:</div><div class='del'>-          - const: allwinner,sun8i-r40-system-control</div><div class='del'>-          - const: allwinner,sun4i-a10-system-control</div><div class='del'>-      - const: allwinner,sun50i-a64-sram-controller</div><div class='del'>-        deprecated: true</div><div class='del'>-      - const: allwinner,sun50i-a64-system-control</div><div class='del'>-      - const: allwinner,sun50i-h5-system-control</div><div class='del'>-      - items:</div><div class='ctx'>           - const: allwinner,sun50i-h6-system-control</div><div class='ctx'>           - const: allwinner,sun50i-a64-system-control</div><div class='del'>-      - items:</div><div class='del'>-          - const: allwinner,suniv-f1c100s-system-control</div><div class='del'>-          - const: allwinner,sun4i-a10-system-control</div><div class='del'>-      - const: allwinner,sun50i-h616-system-control</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -58,17 +57,17 @@ properties:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^sram@[a-z0-9]+":</div><div class='del'>-    type: object</div><div class='del'>-</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        const: mmio-sram</div><div class='add'>+    $ref: /schemas/sram/sram.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     patternProperties:</div><div class='ctx'>       "^sram-section?@[a-f0-9]+$":</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='add'>+          reg: true</div><div class='add'>+</div><div class='ctx'>           compatible:</div><div class='ctx'>             oneOf:</div><div class='ctx'>               - const: allwinner,sun4i-a10-sram-a3-a4</div><div class='hunk'>@@ -76,43 +75,26 @@ patternProperties:</div><div class='ctx'>               - const: allwinner,sun4i-a10-sram-d</div><div class='ctx'>               - const: allwinner,sun50i-a64-sram-c</div><div class='ctx'>               - items:</div><div class='del'>-                  - const: allwinner,sun5i-a13-sram-a3-a4</div><div class='add'>+                  - enum:</div><div class='add'>+                      - allwinner,sun5i-a13-sram-a3-a4</div><div class='add'>+                      - allwinner,sun7i-a20-sram-a3-a4</div><div class='ctx'>                   - const: allwinner,sun4i-a10-sram-a3-a4</div><div class='ctx'>               - items:</div><div class='del'>-                  - const: allwinner,sun7i-a20-sram-a3-a4</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-a3-a4</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun5i-a13-sram-c1</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-c1</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun7i-a20-sram-c1</div><div class='add'>+                  - enum:</div><div class='add'>+                      - allwinner,sun5i-a13-sram-c1</div><div class='add'>+                      - allwinner,sun7i-a20-sram-c1</div><div class='add'>+                      - allwinner,sun8i-a23-sram-c1</div><div class='add'>+                      - allwinner,sun8i-h3-sram-c1</div><div class='add'>+                      - allwinner,sun8i-r40-sram-c1</div><div class='add'>+                      - allwinner,sun50i-a64-sram-c1</div><div class='add'>+                      - allwinner,sun50i-h5-sram-c1</div><div class='add'>+                      - allwinner,sun50i-h6-sram-c1</div><div class='ctx'>                   - const: allwinner,sun4i-a10-sram-c1</div><div class='ctx'>               - items:</div><div class='del'>-                  - const: allwinner,sun8i-a23-sram-c1</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-c1</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun8i-h3-sram-c1</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-c1</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun8i-r40-sram-c1</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-c1</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun50i-a64-sram-c1</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-c1</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun50i-h5-sram-c1</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-c1</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun50i-h6-sram-c1</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-c1</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun5i-a13-sram-d</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-d</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,sun7i-a20-sram-d</div><div class='del'>-                  - const: allwinner,sun4i-a10-sram-d</div><div class='del'>-              - items:</div><div class='del'>-                  - const: allwinner,suniv-f1c100s-sram-d</div><div class='add'>+                  - enum:</div><div class='add'>+                      - allwinner,suniv-f1c100s-sram-d</div><div class='add'>+                      - allwinner,sun5i-a13-sram-d</div><div class='add'>+                      - allwinner,sun7i-a20-sram-d</div><div class='ctx'>                   - const: allwinner,sun4i-a10-sram-d</div><div class='ctx'>               - items:</div><div class='ctx'>                   - const: allwinner,sun50i-h6-sram-c</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml<br/>new file mode 100644<br/>index 000000000000..0548e8e0d30b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sram/qcom,imem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sram/qcom,imem.yaml</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/sram/qcom,imem.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm IMEM memory region</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Qualcomm IMEM is dedicated memory region for various debug features and DMA</div><div class='add'>+  transactions.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - qcom,apq8064-imem</div><div class='add'>+          - qcom,msm8974-imem</div><div class='add'>+          - qcom,qcs404-imem</div><div class='add'>+          - qcom,sc7180-imem</div><div class='add'>+          - qcom,sc7280-imem</div><div class='add'>+          - qcom,sdm630-imem</div><div class='add'>+          - qcom,sdm845-imem</div><div class='add'>+          - qcom,sdx55-imem</div><div class='add'>+          - qcom,sdx65-imem</div><div class='add'>+          - qcom,sm6375-imem</div><div class='add'>+          - qcom,sm8450-imem</div><div class='add'>+      - const: syscon</div><div class='add'>+      - const: simple-mfd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  reboot-mode:</div><div class='add'>+    $ref: /schemas/power/reset/syscon-reboot-mode.yaml#</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^pil-reloc@[0-9a-f]+$":</div><div class='add'>+    $ref: /schemas/remoteproc/qcom,pil-info.yaml#</div><div class='add'>+    description: Peripheral image loader relocation region</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        sram@146bf000 {</div><div class='add'>+            compatible = "qcom,sdm845-imem", "syscon", "simple-mfd";</div><div class='add'>+            reg = &lt;0 0x146bf000 0 0x1000&gt;;</div><div class='add'>+            ranges = &lt;0 0 0x146bf000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            pil-reloc@94c {</div><div class='add'>+                compatible = "qcom,pil-reloc-info";</div><div class='add'>+                reg = &lt;0x94c 0xc8&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml<br/>index 930188bc5e6a..4bbf6db0b6bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sram/qcom,ocmem.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sram/qcom,ocmem.yaml</a></div><div class='hunk'>@@ -61,6 +61,7 @@ additionalProperties: false</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "-sram@[0-9a-f]+$":</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: A region of reserved memory.</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='hunk'>@@ -72,10 +73,10 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-      #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='del'>-      #include &lt;dt-bindings/clock/qcom,mmcc-msm8974.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,rpmcc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/qcom,mmcc-msm8974.h&gt;</div><div class='ctx'> </div><div class='del'>-      ocmem: ocmem@fdd00000 {</div><div class='add'>+    sram@fdd00000 {</div><div class='ctx'>         compatible = "qcom,msm8974-ocmem";</div><div class='ctx'> </div><div class='ctx'>         reg = &lt;0xfdd00000 0x2000&gt;,</div><div class='hunk'>@@ -93,6 +94,6 @@ examples:</div><div class='ctx'>         ranges = &lt;0 0xfec00000 0x100000&gt;;</div><div class='ctx'> </div><div class='ctx'>         gmu-sram@0 {</div><div class='del'>-                reg = &lt;0x0 0x100000&gt;;</div><div class='add'>+            reg = &lt;0x0 0x100000&gt;;</div><div class='ctx'>         };</div><div class='del'>-      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml<br/>index 668a9a41a775..993430be355b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sram/sram.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/sram/sram.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/sram/sram.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/sram/sram.yaml</a></div><div class='hunk'>@@ -136,14 +136,14 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> if:</div><div class='del'>-  properties:</div><div class='del'>-    compatible:</div><div class='del'>-      contains:</div><div class='del'>-        enum:</div><div class='del'>-          - qcom,rpm-msg-ram</div><div class='del'>-          - rockchip,rk3288-pmu-sram</div><div class='del'>-</div><div class='del'>-else:</div><div class='add'>+  not:</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        contains:</div><div class='add'>+          enum:</div><div class='add'>+            - qcom,rpm-msg-ram</div><div class='add'>+            - rockchip,rk3288-pmu-sram</div><div class='add'>+then:</div><div class='ctx'>   required:</div><div class='ctx'>     - "#address-cells"</div><div class='ctx'>     - "#size-cells"</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml b/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml<br/>index 6e0b110153b0..fbd4212285e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner SUN8I Thermal Controller Device Tree Bindings</div><div class='add'>+title: Allwinner SUN8I Thermal Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Vasily Khoruzhick &lt;anarsoul@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml<br/>index 999c6b365f1d..20f8f9b3b971 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml</a></div><div class='hunk'>@@ -30,7 +30,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   amlogic,ao-secure:</div><div class='ctx'>     description: phandle to the ao-secure syscon</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='ctx'>   '#thermal-sensor-cells':</div><div class='ctx'>     const: 0</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml b/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml<br/>index 1ab5070c751d..89a2c32c0ab2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/brcm,avs-ro-thermal.yaml</a></div><div class='hunk'>@@ -16,7 +16,7 @@ description: |+</div><div class='ctx'>   - compatible: Should be one of the following:</div><div class='ctx'>                 "brcm,bcm2711-avs-monitor", "syscon", "simple-mfd"</div><div class='ctx'> </div><div class='del'>-  Refer to the the bindings described in</div><div class='add'>+  Refer to the bindings described in</div><div class='ctx'>   Documentation/devicetree/bindings/mfd/syscon.yaml</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml b/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml<br/>new file mode 100644<br/>index 000000000000..3721c8c8ec64<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/fsl,scu-thermal.yaml</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/thermal/fsl,scu-thermal.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - Thermal Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: thermal-sensor.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx8qxp-sc-thermal</div><div class='add'>+      - const: fsl,imx-sc-thermal</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#thermal-sensor-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    thermal-sensor {</div><div class='add'>+        compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";</div><div class='add'>+        #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/generic-adc-thermal.yaml b/Documentation/devicetree/bindings/thermal/generic-adc-thermal.yaml<br/>new file mode 100644<br/>index 000000000000..f1fc3b0d8608<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/generic-adc-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/generic-adc-thermal.yaml</a></div><div class='hunk'>@@ -0,0 +1,84 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/thermal/generic-adc-thermal.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: General Purpose Analog To Digital Converter (ADC) based thermal sensor</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Laxman Dewangan &lt;ldewangan@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  On some of platforms, thermal sensor like thermistors are connected to</div><div class='add'>+  one of ADC channel and sensor resistance is read via voltage across the</div><div class='add'>+  sensor resistor. The voltage read across the sensor is mapped to</div><div class='add'>+  temperature using voltage-temperature lookup table.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: generic-adc-thermal</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  io-channels:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  io-channel-names:</div><div class='add'>+    const: sensor-channel</div><div class='add'>+</div><div class='add'>+  temperature-lookup-table:</div><div class='add'>+    description: |</div><div class='add'>+      Lookup table to map the relation between ADC value and temperature.</div><div class='add'>+      When ADC is read, the value is looked up on the table to get the</div><div class='add'>+      equivalent temperature.</div><div class='add'>+</div><div class='add'>+      If not specified, driver assumes the ADC channel gives milliCelsius</div><div class='add'>+      directly.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/int32-matrix</div><div class='add'>+    items:</div><div class='add'>+      items:</div><div class='add'>+        - description: Temperature in milliCelsius</div><div class='add'>+        - description: ADC read value</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#thermal-sensor-cells'</div><div class='add'>+  - io-channels</div><div class='add'>+  - io-channel-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+</div><div class='add'>+    thermal-sensor {</div><div class='add'>+        compatible = "generic-adc-thermal";</div><div class='add'>+        #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+        io-channels = &lt;&amp;ads1015 1&gt;;</div><div class='add'>+        io-channel-names = "sensor-channel";</div><div class='add'>+        temperature-lookup-table = &lt;</div><div class='add'>+              (-40000) 2578</div><div class='add'>+              (-39000) 2577</div><div class='add'>+              (-38000) 2576</div><div class='add'>+              (-37000) 2575</div><div class='add'>+              (-36000) 2574</div><div class='add'>+              (-35000) 2573</div><div class='add'>+              (-34000) 2572</div><div class='add'>+              (-33000) 2571</div><div class='add'>+              (-32000) 2569</div><div class='add'>+              (-31000) 2568</div><div class='add'>+              (-30000) 2567</div><div class='add'>+              /* skip */</div><div class='add'>+              118000 254</div><div class='add'>+              119000 247</div><div class='add'>+              120000 240</div><div class='add'>+              121000 233</div><div class='add'>+              122000 226</div><div class='add'>+              123000 220</div><div class='add'>+              124000 214</div><div class='add'>+              125000 208&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/imx-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx-thermal.yaml<br/>index 16b57f57d103..3aecea77869f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/imx-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/imx-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/imx-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/imx-thermal.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX Thermal Binding</div><div class='add'>+title: NXP i.MX Thermal</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Shawn Guo &lt;shawnguo@kernel.org&gt;</div><div class='hunk'>@@ -12,10 +12,16 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - fsl,imx6q-tempmon</div><div class='del'>-      - fsl,imx6sx-tempmon</div><div class='del'>-      - fsl,imx7d-tempmon</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx6q-tempmon</div><div class='add'>+          - fsl,imx6sx-tempmon</div><div class='add'>+          - fsl,imx7d-tempmon</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6sll-tempmon</div><div class='add'>+              - fsl,imx6ul-tempmon</div><div class='add'>+          - const: fsl,imx6sx-tempmon</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -40,11 +46,11 @@ properties:</div><div class='ctx'>       - const: temp_grade</div><div class='ctx'> </div><div class='ctx'>   fsl,tempmon:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: Phandle to anatop system controller node.</div><div class='ctx'> </div><div class='ctx'>   fsl,tempmon-data:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description: |</div><div class='ctx'>       Deprecated property, phandle pointer to fuse controller that contains</div><div class='ctx'>       TEMPMON calibration data, e.g. OCOTP on imx6q. The details about</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml<br/>index 89c54e08ee61..d2c1e4573c32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/imx8mm-thermal.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP i.MX8M Mini Thermal Binding</div><div class='add'>+title: NXP i.MX8M Mini Thermal</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='hunk'>@@ -32,6 +32,13 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  nvmem-cells:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: Phandle to the calibration data provided by ocotp</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    const: calib</div><div class='add'>+</div><div class='ctx'>   "#thermal-sensor-cells":</div><div class='ctx'>     description: |</div><div class='ctx'>       Number of cells required to uniquely identify the thermal</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml<br/>new file mode 100644<br/>index 000000000000..fe9ae4c425c0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml</a></div><div class='hunk'>@@ -0,0 +1,142 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Balsam CHIHI &lt;bchihi@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  LVTS is a thermal management architecture composed of three subsystems,</div><div class='add'>+  a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),</div><div class='add'>+  a Converter - Low Voltage Thermal Sensor converter (LVTS), and</div><div class='add'>+  a Digital controller (LVTS_CTRL).</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt8192-lvts-ap</div><div class='add'>+      - mediatek,mt8192-lvts-mcu</div><div class='add'>+      - mediatek,mt8195-lvts-ap</div><div class='add'>+      - mediatek,mt8195-lvts-mcu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: LVTS reset for clearing temporary data on AP/MCU.</div><div class='add'>+</div><div class='add'>+  nvmem-cells:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Calibration eFuse data 1 for LVTS</div><div class='add'>+      - description: Calibration eFuse data 2 for LVTS</div><div class='add'>+</div><div class='add'>+  nvmem-cell-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: lvts-calib-data-1</div><div class='add'>+      - const: lvts-calib-data-2</div><div class='add'>+</div><div class='add'>+  "#thermal-sensor-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: thermal-sensor.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt8192-lvts-ap</div><div class='add'>+              - mediatek,mt8192-lvts-mcu</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        nvmem-cells:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+        nvmem-cell-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - mediatek,mt8195-lvts-ap</div><div class='add'>+              - mediatek,mt8195-lvts-mcu</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        nvmem-cells:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+        nvmem-cell-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+  - nvmem-cells</div><div class='add'>+  - nvmem-cell-names</div><div class='add'>+  - "#thermal-sensor-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/mt8195-clk.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/mt8195-resets.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/thermal/mediatek,lvts-thermal.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      lvts_mcu: thermal-sensor@11278000 {</div><div class='add'>+        compatible = "mediatek,mt8195-lvts-mcu";</div><div class='add'>+        reg = &lt;0 0x11278000 0 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+        clocks = &lt;&amp;infracfg_ao CLK_INFRA_AO_THERM&gt;;</div><div class='add'>+        resets = &lt;&amp;infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST&gt;;</div><div class='add'>+        nvmem-cells = &lt;&amp;lvts_efuse_data1 &amp;lvts_efuse_data2&gt;;</div><div class='add'>+        nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";</div><div class='add'>+        #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    thermal_zones: thermal-zones {</div><div class='add'>+      cpu0-thermal {</div><div class='add'>+        polling-delay = &lt;1000&gt;;</div><div class='add'>+        polling-delay-passive = &lt;250&gt;;</div><div class='add'>+        thermal-sensors = &lt;&amp;lvts_mcu MT8195_MCU_LITTLE_CPU0&gt;;</div><div class='add'>+</div><div class='add'>+        trips {</div><div class='add'>+          cpu0_alert: trip-alert {</div><div class='add'>+            temperature = &lt;85000&gt;;</div><div class='add'>+            hysteresis = &lt;2000&gt;;</div><div class='add'>+            type = "passive";</div><div class='add'>+          };</div><div class='add'>+</div><div class='add'>+          cpu0_crit: trip-crit {</div><div class='add'>+            temperature = &lt;100000&gt;;</div><div class='add'>+            hysteresis = &lt;2000&gt;;</div><div class='add'>+            type = "critical";</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt b/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt<br/>index 5c7e7bdd029a..ac39c7156fde 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/mediatek-thermal.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/mediatek-thermal.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/mediatek-thermal.txt</a></div><div class='hunk'>@@ -13,7 +13,10 @@ Required properties:</div><div class='ctx'>   - "mediatek,mt2701-thermal" : For MT2701 family of SoCs</div><div class='ctx'>   - "mediatek,mt2712-thermal" : For MT2712 family of SoCs</div><div class='ctx'>   - "mediatek,mt7622-thermal" : For MT7622 SoC</div><div class='add'>+  - "mediatek,mt7981-thermal", "mediatek,mt7986-thermal" : For MT7981 SoC</div><div class='add'>+  - "mediatek,mt7986-thermal" : For MT7986 SoC</div><div class='ctx'>   - "mediatek,mt8183-thermal" : For MT8183 family of SoCs</div><div class='add'>+  - "mediatek,mt8365-thermal" : For MT8365 family of SoCs</div><div class='ctx'>   - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs</div><div class='ctx'> - reg: Address range of the thermal controller</div><div class='ctx'> - interrupts: IRQ for the thermal controller</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt<br/>index db880e7ed713..aea4a2a178b9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.txt</a></div><div class='hunk'>@@ -96,7 +96,7 @@ critical trip point is reported back to the thermal framework to implement</div><div class='ctx'> software shutdown.</div><div class='ctx'> </div><div class='ctx'> - the "hot" type trip points will be set to SOC_THERM hardware as the throttle</div><div class='del'>-temperature. Once the the temperature of this thermal zone is higher</div><div class='add'>+temperature. Once the temperature of this thermal zone is higher</div><div class='ctx'> than it, it will trigger the HW throttle event.</div><div class='ctx'> </div><div class='ctx'> Example :</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml b/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml<br/>new file mode 100644<br/>index 000000000000..5f08b6e59b8a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/qcom,spmi-temp-alarm.yaml</a></div><div class='hunk'>@@ -0,0 +1,85 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm QPNP PMIC Temperature Alarm</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips</div><div class='add'>+  that utilize the Qualcomm SPMI implementation. These peripherals provide an</div><div class='add'>+  interrupt signal and status register to identify high PMIC die temperature.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: thermal-sensor.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,spmi-temp-alarm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  io-channels:</div><div class='add'>+    items:</div><div class='add'>+      - description: ADC channel, which reports chip die temperature</div><div class='add'>+</div><div class='add'>+  io-channel-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: thermal</div><div class='add'>+</div><div class='add'>+  '#thermal-sensor-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - '#thermal-sensor-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    pmic {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pm8350_temp_alarm: temperature-sensor@a00 {</div><div class='add'>+            compatible = "qcom,spmi-temp-alarm";</div><div class='add'>+            reg = &lt;0xa00&gt;;</div><div class='add'>+            interrupts = &lt;0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH&gt;;</div><div class='add'>+            #thermal-sensor-cells = &lt;0&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    thermal-zones {</div><div class='add'>+        pm8350_thermal: pm8350c-thermal {</div><div class='add'>+            polling-delay-passive = &lt;100&gt;;</div><div class='add'>+            polling-delay = &lt;0&gt;;</div><div class='add'>+            thermal-sensors = &lt;&amp;pm8350_temp_alarm&gt;;</div><div class='add'>+</div><div class='add'>+            trips {</div><div class='add'>+                pm8350_trip0: trip0 {</div><div class='add'>+                    temperature = &lt;95000&gt;;</div><div class='add'>+                    hysteresis = &lt;0&gt;;</div><div class='add'>+                    type = "passive";</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                pm8350_crit: pm8350c-crit {</div><div class='add'>+                    temperature = &lt;115000&gt;;</div><div class='add'>+                    hysteresis = &lt;0&gt;;</div><div class='add'>+                    type = "critical";</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml b/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml<br/>index a9b7388ca9ac..92762efc2120 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-lmh.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-lmh.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/qcom-lmh.yaml</a></div><div class='hunk'>@@ -18,6 +18,7 @@ description:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='add'>+      - qcom,sc8180x-lmh</div><div class='ctx'>       - qcom,sdm845-lmh</div><div class='ctx'>       - qcom,sm8150-lmh</div><div class='ctx'> </div><div class='hunk'>@@ -36,7 +37,7 @@ properties:</div><div class='ctx'>   cpus:</div><div class='ctx'>     description:</div><div class='ctx'>       phandle of the first cpu in the LMh cluster</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   qcom,lmh-temp-arm-millicelsius:</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml<br/>index 8273ac55b63f..01253d58bf9f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm-hc.yaml</a></div><div class='hunk'>@@ -124,8 +124,8 @@ examples:</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'>             #io-channel-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-            /* Other propreties are omitted */</div><div class='del'>-            adc-chan@4c {</div><div class='add'>+            /* Other properties are omitted */</div><div class='add'>+            channel@4c {</div><div class='ctx'>                 reg = &lt;ADC5_XO_THERM_100K_PU&gt;;</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml<br/>index 3ea8c0c1f45f..3c81def03c84 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml</a></div><div class='hunk'>@@ -10,7 +10,10 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    const: qcom,spmi-adc-tm5</div><div class='add'>+    enum:</div><div class='add'>+      - qcom,spmi-adc-tm5</div><div class='add'>+      - qcom,spmi-adc-tm5-gen2</div><div class='add'>+      - qcom,adc-tm7 # Incomplete / subject to change</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -33,6 +36,7 @@ properties:</div><div class='ctx'>   qcom,avg-samples:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: Number of samples to be used for measurement.</div><div class='add'>+            Not applicable for Gen2 ADC_TM peripheral.</div><div class='ctx'>     enum:</div><div class='ctx'>       - 1</div><div class='ctx'>       - 2</div><div class='hunk'>@@ -45,6 +49,7 @@ properties:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: This parameter is used to decrease ADC sampling rate.</div><div class='ctx'>             Quicker measurements can be made by reducing decimation ratio.</div><div class='add'>+            Not applicable for Gen2 ADC_TM peripheral.</div><div class='ctx'>     enum:</div><div class='ctx'>       - 250</div><div class='ctx'>       - 420</div><div class='hunk'>@@ -93,6 +98,29 @@ patternProperties:</div><div class='ctx'>           - const: 1</div><div class='ctx'>           - enum: [ 1, 3, 4, 6, 20, 8, 10 ]</div><div class='ctx'> </div><div class='add'>+      qcom,avg-samples:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: Number of samples to be used for measurement.</div><div class='add'>+          This property in child node is applicable only for Gen2 ADC_TM peripheral.</div><div class='add'>+        enum:</div><div class='add'>+          - 1</div><div class='add'>+          - 2</div><div class='add'>+          - 4</div><div class='add'>+          - 8</div><div class='add'>+          - 16</div><div class='add'>+        default: 1</div><div class='add'>+</div><div class='add'>+      qcom,decimation:</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+        description: This parameter is used to decrease ADC sampling rate.</div><div class='add'>+          Quicker measurements can be made by reducing decimation ratio.</div><div class='add'>+          This property in child node is applicable only for Gen2 ADC_TM peripheral.</div><div class='add'>+        enum:</div><div class='add'>+          - 85</div><div class='add'>+          - 340</div><div class='add'>+          - 1360</div><div class='add'>+        default: 1360</div><div class='add'>+</div><div class='ctx'>     required:</div><div class='ctx'>       - reg</div><div class='ctx'>       - io-channels</div><div class='hunk'>@@ -100,6 +128,31 @@ patternProperties:</div><div class='ctx'>     additionalProperties:</div><div class='ctx'>       false</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,spmi-adc-tm5</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      patternProperties:</div><div class='add'>+        "^([-a-z0-9]*)@[0-7]$":</div><div class='add'>+          properties:</div><div class='add'>+            qcom,decimation: false</div><div class='add'>+            qcom,avg-samples: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,spmi-adc-tm5-gen2</div><div class='add'>+</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        qcom,avg-samples: false</div><div class='add'>+        qcom,decimation: false</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -124,11 +177,12 @@ examples:</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'>             #io-channel-cells = &lt;1&gt;;</div><div class='ctx'> </div><div class='del'>-            /* Other propreties are omitted */</div><div class='del'>-            conn-therm@4f {</div><div class='add'>+            /* Other properties are omitted */</div><div class='add'>+            channel@4f {</div><div class='ctx'>                 reg = &lt;ADC5_AMUX_THM3_100K_PU&gt;;</div><div class='ctx'>                 qcom,ratiometric;</div><div class='ctx'>                 qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+                label = "conn_therm";</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='hunk'>@@ -148,4 +202,60 @@ examples:</div><div class='ctx'>             };</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/iio/qcom,spmi-adc7-pmk8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/iio/qcom,spmi-adc7-pm8350.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    spmi_bus {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        pmk8350_vadc: adc@3100 {</div><div class='add'>+            reg = &lt;0x3100&gt;;</div><div class='add'>+            compatible = "qcom,spmi-adc7";</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            #io-channel-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+            /* Other properties are omitted */</div><div class='add'>+            channel@44 {</div><div class='add'>+                reg = &lt;PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+                label = "xo_therm";</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            channel@147 {</div><div class='add'>+                reg = &lt;PM8350_ADC7_AMUX_THM4_100K_PU(1)&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time = &lt;200&gt;;</div><div class='add'>+                label = "conn_therm";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pmk8350_adc_tm: adc-tm@3400 {</div><div class='add'>+            compatible = "qcom,spmi-adc-tm5-gen2";</div><div class='add'>+            reg = &lt;0x3400&gt;;</div><div class='add'>+            interrupts = &lt;0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+            #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            pmk8350-xo-therm@0 {</div><div class='add'>+                reg = &lt;0&gt;;</div><div class='add'>+                io-channels = &lt;&amp;pmk8350_vadc PMK8350_ADC7_AMUX_THM1_100K_PU&gt;;</div><div class='add'>+                qcom,decimation = &lt;340&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            conn-therm@1 {</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+                io-channels = &lt;&amp;pmk8350_vadc PM8350_ADC7_AMUX_THM4_100K_PU(1)&gt;;</div><div class='add'>+                qcom,avg-samples = &lt;2&gt;;</div><div class='add'>+                qcom,ratiometric;</div><div class='add'>+                qcom,hw-settle-time-us = &lt;200&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt b/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt<br/>deleted file mode 100644<br/>index 2d5b2ad03314..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-spmi-temp-alarm.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-Qualcomm QPNP PMIC Temperature Alarm</div><div class='del'>-</div><div class='del'>-QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips</div><div class='del'>-that utilize the Qualcomm SPMI implementation. These peripherals provide an</div><div class='del'>-interrupt signal and status register to identify high PMIC die temperature.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:      Should contain "qcom,spmi-temp-alarm".</div><div class='del'>-- reg:             Specifies the SPMI address.</div><div class='del'>-- interrupts:      PMIC temperature alarm interrupt.</div><div class='del'>-- #thermal-sensor-cells: Should be 0. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- io-channels:     Should contain IIO channel specifier for the ADC channel,</div><div class='del'>-                   which report chip die temperature.</div><div class='del'>-- io-channel-names: Should contain "thermal".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pm8941_temp: thermal-alarm@2400 {</div><div class='del'>-		compatible = "qcom,spmi-temp-alarm";</div><div class='del'>-		reg = &lt;0x2400&gt;;</div><div class='del'>-		interrupts = &lt;0 0x24 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-		#thermal-sensor-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		io-channels = &lt;&amp;pm8941_vadc VADC_DIE_TEMP&gt;;</div><div class='del'>-		io-channel-names = "thermal";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	thermal-zones {</div><div class='del'>-		pm8941 {</div><div class='del'>-			polling-delay-passive = &lt;250&gt;;</div><div class='del'>-			polling-delay = &lt;1000&gt;;</div><div class='del'>-</div><div class='del'>-			thermal-sensors = &lt;&amp;pm8941_temp&gt;;</div><div class='del'>-</div><div class='del'>-			trips {</div><div class='del'>-				stage1 {</div><div class='del'>-					temperature = &lt;105000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "passive";</div><div class='del'>-				};</div><div class='del'>-				stage2 {</div><div class='del'>-					temperature = &lt;125000&gt;;</div><div class='del'>-					hysteresis = &lt;2000&gt;;</div><div class='del'>-					type = "critical";</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml<br/>index b6406bcc683f..d1ec963a6834 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qcom-tsens.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/qcom-tsens.yaml</a></div><div class='hunk'>@@ -19,10 +19,11 @@ description: |</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - description: msm9860 TSENS based</div><div class='add'>+      - description: msm8960 TSENS based</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - qcom,ipq8064-tsens</div><div class='add'>+              - qcom,msm8960-tsens</div><div class='ctx'> </div><div class='ctx'>       - description: v0.1 of TSENS</div><div class='ctx'>         items:</div><div class='hunk'>@@ -36,6 +37,7 @@ properties:</div><div class='ctx'>       - description: v1 of TSENS</div><div class='ctx'>         items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - qcom,msm8956-tsens</div><div class='ctx'>               - qcom,msm8976-tsens</div><div class='ctx'>               - qcom,qcs404-tsens</div><div class='ctx'>           - const: qcom,tsens-v1</div><div class='hunk'>@@ -49,13 +51,22 @@ properties:</div><div class='ctx'>               - qcom,sc7180-tsens</div><div class='ctx'>               - qcom,sc7280-tsens</div><div class='ctx'>               - qcom,sc8180x-tsens</div><div class='add'>+              - qcom,sc8280xp-tsens</div><div class='ctx'>               - qcom,sdm630-tsens</div><div class='ctx'>               - qcom,sdm845-tsens</div><div class='add'>+              - qcom,sm6115-tsens</div><div class='add'>+              - qcom,sm6350-tsens</div><div class='ctx'>               - qcom,sm8150-tsens</div><div class='ctx'>               - qcom,sm8250-tsens</div><div class='ctx'>               - qcom,sm8350-tsens</div><div class='add'>+              - qcom,sm8450-tsens</div><div class='add'>+              - qcom,sm8550-tsens</div><div class='ctx'>           - const: qcom,tsens-v2</div><div class='ctx'> </div><div class='add'>+      - description: v2 of TSENS with combined interrupt</div><div class='add'>+        enum:</div><div class='add'>+          - qcom,ipq8074-tsens</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='ctx'>       - description: TM registers</div><div class='hunk'>@@ -63,29 +74,127 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    items:</div><div class='del'>-      - description: Combined interrupt if upper or lower threshold crossed</div><div class='del'>-      - description: Interrupt if critical threshold crossed</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='ctx'>     minItems: 1</div><div class='del'>-    items:</div><div class='del'>-      - const: uplow</div><div class='del'>-      - const: critical</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   nvmem-cells:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-    description:</div><div class='del'>-      Reference to an nvmem node for the calibration data</div><div class='add'>+    oneOf:</div><div class='add'>+      - minItems: 1</div><div class='add'>+        maxItems: 2</div><div class='add'>+        description:</div><div class='add'>+          Reference to an nvmem node for the calibration data</div><div class='add'>+      - minItems: 5</div><div class='add'>+        maxItems: 35</div><div class='add'>+        description: |</div><div class='add'>+          Reference to nvmem cells for the calibration mode, two calibration</div><div class='add'>+          bases and two cells per each sensor</div><div class='add'>+        # special case for msm8974 / apq8084</div><div class='add'>+      - maxItems: 51</div><div class='add'>+        description: |</div><div class='add'>+          Reference to nvmem cells for the calibration mode, two calibration</div><div class='add'>+          bases and two cells per each sensor, main and backup copies, plus use_backup cell</div><div class='ctx'> </div><div class='ctx'>   nvmem-cell-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    items:</div><div class='del'>-      - const: calib</div><div class='del'>-      - enum:</div><div class='del'>-          - calib_backup</div><div class='del'>-          - calib_sel</div><div class='add'>+    oneOf:</div><div class='add'>+      - minItems: 1</div><div class='add'>+        items:</div><div class='add'>+          - const: calib</div><div class='add'>+          - enum:</div><div class='add'>+              - calib_backup</div><div class='add'>+              - calib_sel</div><div class='add'>+      - minItems: 5</div><div class='add'>+        items:</div><div class='add'>+          - const: mode</div><div class='add'>+          - const: base1</div><div class='add'>+          - const: base2</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+          - pattern: '^s[0-9]+_p1$'</div><div class='add'>+          - pattern: '^s[0-9]+_p2$'</div><div class='add'>+        # special case for msm8974 / apq8084</div><div class='add'>+      - items:</div><div class='add'>+          - const: mode</div><div class='add'>+          - const: base1</div><div class='add'>+          - const: base2</div><div class='add'>+          - const: use_backup</div><div class='add'>+          - const: mode_backup</div><div class='add'>+          - const: base1_backup</div><div class='add'>+          - const: base2_backup</div><div class='add'>+          - const: s0_p1</div><div class='add'>+          - const: s0_p2</div><div class='add'>+          - const: s1_p1</div><div class='add'>+          - const: s1_p2</div><div class='add'>+          - const: s2_p1</div><div class='add'>+          - const: s2_p2</div><div class='add'>+          - const: s3_p1</div><div class='add'>+          - const: s3_p2</div><div class='add'>+          - const: s4_p1</div><div class='add'>+          - const: s4_p2</div><div class='add'>+          - const: s5_p1</div><div class='add'>+          - const: s5_p2</div><div class='add'>+          - const: s6_p1</div><div class='add'>+          - const: s6_p2</div><div class='add'>+          - const: s7_p1</div><div class='add'>+          - const: s7_p2</div><div class='add'>+          - const: s8_p1</div><div class='add'>+          - const: s8_p2</div><div class='add'>+          - const: s9_p1</div><div class='add'>+          - const: s9_p2</div><div class='add'>+          - const: s10_p1</div><div class='add'>+          - const: s10_p2</div><div class='add'>+          - const: s0_p1_backup</div><div class='add'>+          - const: s0_p2_backup</div><div class='add'>+          - const: s1_p1_backup</div><div class='add'>+          - const: s1_p2_backup</div><div class='add'>+          - const: s2_p1_backup</div><div class='add'>+          - const: s2_p2_backup</div><div class='add'>+          - const: s3_p1_backup</div><div class='add'>+          - const: s3_p2_backup</div><div class='add'>+          - const: s4_p1_backup</div><div class='add'>+          - const: s4_p2_backup</div><div class='add'>+          - const: s5_p1_backup</div><div class='add'>+          - const: s5_p2_backup</div><div class='add'>+          - const: s6_p1_backup</div><div class='add'>+          - const: s6_p2_backup</div><div class='add'>+          - const: s7_p1_backup</div><div class='add'>+          - const: s7_p2_backup</div><div class='add'>+          - const: s8_p1_backup</div><div class='add'>+          - const: s8_p2_backup</div><div class='add'>+          - const: s9_p1_backup</div><div class='add'>+          - const: s9_p2_backup</div><div class='add'>+          - const: s10_p1_backup</div><div class='add'>+          - const: s10_p2_backup</div><div class='ctx'> </div><div class='ctx'>   "#qcom,sensors":</div><div class='ctx'>     description:</div><div class='hunk'>@@ -116,6 +225,7 @@ allOf:</div><div class='ctx'>               - qcom,ipq8064-tsens</div><div class='ctx'>               - qcom,mdm9607-tsens</div><div class='ctx'>               - qcom,msm8916-tsens</div><div class='add'>+              - qcom,msm8960-tsens</div><div class='ctx'>               - qcom,msm8974-tsens</div><div class='ctx'>               - qcom,msm8976-tsens</div><div class='ctx'>               - qcom,qcs404-tsens</div><div class='hunk'>@@ -124,22 +234,64 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='del'>-          maxItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - description: Combined interrupt if upper or lower threshold crossed</div><div class='ctx'>         interrupt-names:</div><div class='del'>-          maxItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: uplow</div><div class='ctx'> </div><div class='del'>-    else:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8953-tsens</div><div class='add'>+              - qcom,msm8996-tsens</div><div class='add'>+              - qcom,msm8998-tsens</div><div class='add'>+              - qcom,sc7180-tsens</div><div class='add'>+              - qcom,sc7280-tsens</div><div class='add'>+              - qcom,sc8180x-tsens</div><div class='add'>+              - qcom,sc8280xp-tsens</div><div class='add'>+              - qcom,sdm630-tsens</div><div class='add'>+              - qcom,sdm845-tsens</div><div class='add'>+              - qcom,sm6350-tsens</div><div class='add'>+              - qcom,sm8150-tsens</div><div class='add'>+              - qcom,sm8250-tsens</div><div class='add'>+              - qcom,sm8350-tsens</div><div class='add'>+              - qcom,sm8450-tsens</div><div class='add'>+              - qcom,tsens-v2</div><div class='add'>+    then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='del'>-          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - description: Combined interrupt if upper or lower threshold crossed</div><div class='add'>+            - description: Interrupt if critical threshold crossed</div><div class='ctx'>         interrupt-names:</div><div class='del'>-          minItems: 2</div><div class='add'>+          items:</div><div class='add'>+            - const: uplow</div><div class='add'>+            - const: critical</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - qcom,ipq8074-tsens</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: Combined interrupt if upper, lower or critical thresholds crossed</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: combined</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq8074-tsens</div><div class='ctx'>               - qcom,tsens-v0_1</div><div class='ctx'>               - qcom,tsens-v1</div><div class='ctx'>               - qcom,tsens-v2</div><div class='hunk'>@@ -173,8 +325,38 @@ examples:</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    // Example 1 (new calbiration data: for pre v1 IP):</div><div class='add'>+    thermal-sensor@4a9000 {</div><div class='add'>+        compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";</div><div class='add'>+        reg = &lt;0x4a9000 0x1000&gt;, /* TM */</div><div class='add'>+              &lt;0x4a8000 0x1000&gt;; /* SROT */</div><div class='add'>+</div><div class='add'>+        nvmem-cells = &lt;&amp;tsens_mode&gt;,</div><div class='add'>+                      &lt;&amp;tsens_base1&gt;, &lt;&amp;tsens_base2&gt;,</div><div class='add'>+                      &lt;&amp;tsens_s0_p1&gt;, &lt;&amp;tsens_s0_p2&gt;,</div><div class='add'>+                      &lt;&amp;tsens_s1_p1&gt;, &lt;&amp;tsens_s1_p2&gt;,</div><div class='add'>+                      &lt;&amp;tsens_s2_p1&gt;, &lt;&amp;tsens_s2_p2&gt;,</div><div class='add'>+                      &lt;&amp;tsens_s4_p1&gt;, &lt;&amp;tsens_s4_p2&gt;,</div><div class='add'>+                      &lt;&amp;tsens_s5_p1&gt;, &lt;&amp;tsens_s5_p2&gt;;</div><div class='add'>+        nvmem-cell-names = "mode",</div><div class='add'>+                           "base1", "base2",</div><div class='add'>+                           "s0_p1", "s0_p2",</div><div class='add'>+                           "s1_p1", "s1_p2",</div><div class='add'>+                           "s2_p1", "s2_p2",</div><div class='add'>+                           "s4_p1", "s4_p2",</div><div class='add'>+                           "s5_p1", "s5_p2";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "uplow";</div><div class='add'>+</div><div class='add'>+        #qcom,sensors = &lt;5&gt;;</div><div class='add'>+        #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     // Example 1 (legacy: for pre v1 IP):</div><div class='del'>-    tsens1: thermal-sensor@900000 {</div><div class='add'>+    tsens1: thermal-sensor@4a9000 {</div><div class='ctx'>            compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";</div><div class='ctx'>            reg = &lt;0x4a9000 0x1000&gt;, /* TM */</div><div class='ctx'>                  &lt;0x4a8000 0x1000&gt;; /* SROT */</div><div class='hunk'>@@ -222,4 +404,19 @@ examples:</div><div class='ctx'>            #qcom,sensors = &lt;13&gt;;</div><div class='ctx'>            #thermal-sensor-cells = &lt;1&gt;;</div><div class='ctx'>     };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    // Example 4 (for any IPQ8074 based SoC-s):</div><div class='add'>+    tsens4: thermal-sensor@4a9000 {</div><div class='add'>+           compatible = "qcom,ipq8074-tsens";</div><div class='add'>+           reg = &lt;0x4a9000 0x1000&gt;,</div><div class='add'>+                 &lt;0x4a8000 0x1000&gt;;</div><div class='add'>+</div><div class='add'>+           interrupts = &lt;GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+           interrupt-names = "combined";</div><div class='add'>+</div><div class='add'>+           #qcom,sensors = &lt;16&gt;;</div><div class='add'>+           #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml b/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml<br/>index f09e8723ca2b..145744027234 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml</a></div><div class='hunk'>@@ -29,14 +29,14 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   fsl,tmu-range:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32-array'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     description: |</div><div class='ctx'>       The values to be programmed into TTRnCR, as specified by the SoC</div><div class='ctx'>       reference manual. The first cell is TTR0CR, the second is TTR1CR, etc.</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   fsl,tmu-calibration:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/uint32-matrix'</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-matrix</div><div class='ctx'>     description: |</div><div class='ctx'>       A list of cell pairs containing temperature calibration data, as</div><div class='ctx'>       specified by the SoC reference manual. The first cell of each pair</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml b/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml<br/>index f963204e0b16..ecf276fd155c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml</a></div><div class='hunk'>@@ -8,9 +8,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Renesas R-Car Gen3 Thermal Sensor</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='del'>-  On R-Car Gen3 SoCs, the thermal sensor controllers (TSC) control the thermal</div><div class='del'>-  sensors (THS) which are the analog circuits for measuring temperature (Tj)</div><div class='del'>-  inside the LSI.</div><div class='add'>+  On most R-Car Gen3 and later SoCs, the thermal sensor controllers (TSC)</div><div class='add'>+  control the thermal sensors (THS) which are the analog circuits for</div><div class='add'>+  measuring temperature (Tj) inside the LSI.</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Niklas Söderlund &lt;niklas.soderlund@ragnatech.se&gt;</div><div class='hunk'>@@ -27,6 +27,8 @@ properties:</div><div class='ctx'>       - renesas,r8a77965-thermal # R-Car M3-N</div><div class='ctx'>       - renesas,r8a77980-thermal # R-Car V3H</div><div class='ctx'>       - renesas,r8a779a0-thermal # R-Car V3U</div><div class='add'>+      - renesas,r8a779f0-thermal # R-Car S4-8</div><div class='add'>+      - renesas,r8a779g0-thermal # R-Car V4H</div><div class='ctx'> </div><div class='ctx'>   reg: true</div><div class='ctx'> </div><div class='hunk'>@@ -57,32 +59,40 @@ required:</div><div class='ctx'>   - "#thermal-sensor-cells"</div><div class='ctx'> </div><div class='ctx'> if:</div><div class='del'>-  not:</div><div class='del'>-    properties:</div><div class='del'>-      compatible:</div><div class='del'>-        contains:</div><div class='del'>-          enum:</div><div class='del'>-            - renesas,r8a779a0-thermal</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - renesas,r8a779a0-thermal</div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='ctx'>     reg:</div><div class='del'>-      minItems: 2</div><div class='del'>-      maxItems: 3</div><div class='ctx'>       items:</div><div class='add'>+        - description: TSC0 registers</div><div class='ctx'>         - description: TSC1 registers</div><div class='ctx'>         - description: TSC2 registers</div><div class='ctx'>         - description: TSC3 registers</div><div class='del'>-  required:</div><div class='del'>-    - interrupts</div><div class='add'>+        - description: TSC4 registers</div><div class='ctx'> else:</div><div class='ctx'>   properties:</div><div class='ctx'>     reg:</div><div class='add'>+      minItems: 2</div><div class='ctx'>       items:</div><div class='del'>-        - description: TSC0 registers</div><div class='ctx'>         - description: TSC1 registers</div><div class='ctx'>         - description: TSC2 registers</div><div class='ctx'>         - description: TSC3 registers</div><div class='ctx'>         - description: TSC4 registers</div><div class='add'>+  if:</div><div class='add'>+    not:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,r8a779f0-thermal</div><div class='add'>+              - renesas,r8a779g0-thermal</div><div class='add'>+  then:</div><div class='add'>+    required:</div><div class='add'>+      - interrupts</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml b/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml<br/>index 927de79ab4b5..119998d10ff4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rcar-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/rcar-thermal.yaml</a></div><div class='hunk'>@@ -42,7 +42,7 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Address ranges of the thermal registers. If more then one range is given</div><div class='ctx'>       the first one must be the common registers followed by each sensor</div><div class='del'>-      according the the datasheet.</div><div class='add'>+      according to the datasheet.</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 4</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml b/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml<br/>index f6c1be226aaa..55f8ec0bec01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>       - rockchip,rk3368-tsadc</div><div class='ctx'>       - rockchip,rk3399-tsadc</div><div class='ctx'>       - rockchip,rk3568-tsadc</div><div class='add'>+      - rockchip,rk3588-tsadc</div><div class='ctx'>       - rockchip,rv1108-tsadc</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml b/Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml<br/>index ccab9511a042..03f4b926e53c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/rzg2l-thermal.yaml</a></div><div class='hunk'>@@ -17,7 +17,9 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+          - renesas,r9a07g043-tsu # RZ/G2UL and RZ/Five</div><div class='ctx'>           - renesas,r9a07g044-tsu # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-tsu # RZ/V2L</div><div class='ctx'>       - const: renesas,rzg2l-tsu</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml b/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml<br/>index 17129f75d962..1344df708e2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/samsung,exynos-thermal.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC Thermal Management Unit (TMU)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   For multi-instance tmu each instance should have an alias correctly numbered</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml b/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml<br/>index c5b25ce44956..6f975821fa5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml</a></div><div class='hunk'>@@ -46,14 +46,9 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     // The UniPhier thermal should be a subnode of a "syscon" compatible node.</div><div class='ctx'> </div><div class='del'>-    sysctrl@61840000 {</div><div class='del'>-        compatible = "socionext,uniphier-ld20-sysctrl",</div><div class='del'>-                     "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x61840000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-        pvtctl: thermal {</div><div class='del'>-            compatible = "socionext,uniphier-ld20-thermal";</div><div class='del'>-            interrupts = &lt;0 3 1&gt;;</div><div class='del'>-            #thermal-sensor-cells = &lt;0&gt;;</div><div class='del'>-        };</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    pvtctl: thermal-sensor {</div><div class='add'>+        compatible = "socionext,uniphier-ld20-thermal";</div><div class='add'>+        interrupts = &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        #thermal-sensor-cells = &lt;0&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml b/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml<br/>index 6d65a3cf2af2..76aaa004c8ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/sprd-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/sprd-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/sprd-thermal.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/sprd-thermal.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Spreadtrum thermal sensor controller bindings</div><div class='add'>+title: Spreadtrum thermal sensor controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Orson Zhai &lt;orsonzhai@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml b/Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml<br/>index bee41cff5142..ab043084f667 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/st,stm32-thermal.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 digital thermal sensor (DTS) binding</div><div class='add'>+title: STMicroelectronics STM32 digital thermal sensor (DTS)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Pascal Paillet &lt;p.paillet@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml b/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml<br/>index 850a9841b110..b9022f1613d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Thermal cooling device binding</div><div class='add'>+title: Thermal cooling device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Amit Kucheria &lt;amitk@kernel.org&gt;</div><div class='hunk'>@@ -76,9 +76,13 @@ examples:</div><div class='ctx'>                     next-level-cache = &lt;&amp;L2_0&gt;;</div><div class='ctx'>                     L2_0: l2-cache {</div><div class='ctx'>                             compatible = "cache";</div><div class='add'>+                            cache-unified;</div><div class='add'>+                            cache-level = &lt;2&gt;;</div><div class='ctx'>                             next-level-cache = &lt;&amp;L3_0&gt;;</div><div class='ctx'>                             L3_0: l3-cache {</div><div class='ctx'>                                     compatible = "cache";</div><div class='add'>+                                    cache-unified;</div><div class='add'>+                                    cache-level = &lt;3&gt;;</div><div class='ctx'>                             };</div><div class='ctx'>                     };</div><div class='ctx'>           };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/thermal-generic-adc.txt b/Documentation/devicetree/bindings/thermal/thermal-generic-adc.txt<br/>deleted file mode 100644<br/>index e136946a2f4f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-generic-adc.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-generic-adc.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,95 +0,0 @@</div><div class='del'>-General Purpose Analog To Digital Converter (ADC) based thermal sensor.</div><div class='del'>-</div><div class='del'>-On some of platforms, thermal sensor like thermistors are connected to</div><div class='del'>-one of ADC channel and sensor resistance is read via voltage across the</div><div class='del'>-sensor resistor. The voltage read across the sensor is mapped to</div><div class='del'>-temperature using voltage-temperature lookup table.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-===================</div><div class='del'>-- compatible:		     Must be "generic-adc-thermal".</div><div class='del'>-- #thermal-sensor-cells:     Should be 1. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description</div><div class='del'>-		             of this property.</div><div class='del'>-Optional properties:</div><div class='del'>-===================</div><div class='del'>-- temperature-lookup-table:  Two dimensional array of Integer; lookup table</div><div class='del'>-			     to map the relation between ADC value and</div><div class='del'>-			     temperature. When ADC is read, the value is</div><div class='del'>-			     looked up on the table to get the equivalent</div><div class='del'>-			     temperature.</div><div class='del'>-</div><div class='del'>-			     The first value of the each row of array is the</div><div class='del'>-			     temperature in milliCelsius and second value of</div><div class='del'>-			     the each row of array is the ADC read value.</div><div class='del'>-</div><div class='del'>-			     If not specified, driver assumes the ADC channel</div><div class='del'>-			     gives milliCelsius directly.</div><div class='del'>-</div><div class='del'>-Example :</div><div class='del'>-#include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='del'>-</div><div class='del'>-i2c@7000c400 {</div><div class='del'>-	ads1015: ads1015@4a {</div><div class='del'>-		reg = &lt;0x4a&gt;;</div><div class='del'>-		compatible = "ads1015";</div><div class='del'>-		sampling-frequency = &lt;3300&gt;;</div><div class='del'>-		#io-channel-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-tboard_thermistor: thermal-sensor {</div><div class='del'>-	compatible = "generic-adc-thermal";</div><div class='del'>-	#thermal-sensor-cells = &lt;0&gt;;</div><div class='del'>-	io-channels = &lt;&amp;ads1015 1&gt;;</div><div class='del'>-	io-channel-names = "sensor-channel";</div><div class='del'>-	temperature-lookup-table = &lt;    (-40000) 2578</div><div class='del'>-					(-39000) 2577</div><div class='del'>-					(-38000) 2576</div><div class='del'>-					(-37000) 2575</div><div class='del'>-					(-36000) 2574</div><div class='del'>-					(-35000) 2573</div><div class='del'>-					(-34000) 2572</div><div class='del'>-					(-33000) 2571</div><div class='del'>-					(-32000) 2569</div><div class='del'>-					(-31000) 2568</div><div class='del'>-					(-30000) 2567</div><div class='del'>-					::::::::::</div><div class='del'>-					118000 254</div><div class='del'>-					119000 247</div><div class='del'>-					120000 240</div><div class='del'>-					121000 233</div><div class='del'>-					122000 226</div><div class='del'>-					123000 220</div><div class='del'>-					124000 214</div><div class='del'>-					125000 208&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-dummy_cool_dev: dummy-cool-dev {</div><div class='del'>-	compatible = "dummy-cooling-dev";</div><div class='del'>-	#cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-thermal-zones {</div><div class='del'>-	Tboard {</div><div class='del'>-		polling-delay = &lt;15000&gt;; /* milliseconds */</div><div class='del'>-		polling-delay-passive = &lt;0&gt;; /* milliseconds */</div><div class='del'>-		thermal-sensors = &lt;&amp;tboard_thermistor&gt;;</div><div class='del'>-</div><div class='del'>-		trips {</div><div class='del'>-			therm_est_trip: therm_est_trip {</div><div class='del'>-				temperature = &lt;40000&gt;;</div><div class='del'>-				type = "active";</div><div class='del'>-				hysteresis = &lt;1000&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-</div><div class='del'>-		cooling-maps {</div><div class='del'>-			map0 {</div><div class='del'>-				trip = &lt;&amp;therm_est_trip&gt;;</div><div class='del'>-				cooling-device = &lt;&amp;dummy_cool_dev THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='del'>-				contribution = &lt;100&gt;;</div><div class='del'>-			};</div><div class='del'>-</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/thermal-idle.yaml b/Documentation/devicetree/bindings/thermal/thermal-idle.yaml<br/>index cc938d7ad1f3..1b77d542a7b8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-idle.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-idle.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-idle.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/thermal-idle.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Thermal idle cooling device binding</div><div class='add'>+title: Thermal idle cooling device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;</div><div class='hunk'>@@ -48,99 +48,105 @@ additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='add'>+    /{</div><div class='add'>+        #include &lt;dt-bindings/thermal/thermal.h&gt;</div><div class='ctx'> </div><div class='del'>-    // Example: Combining idle cooling device on big CPUs with cpufreq cooling device</div><div class='del'>-    cpus {</div><div class='add'>+        compatible = "foo";</div><div class='add'>+        model = "foo";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        // Example: Combining idle cooling device on big CPUs with cpufreq cooling device</div><div class='add'>+        cpus {</div><div class='ctx'>             #address-cells = &lt;2&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>             /* ... */</div><div class='ctx'> </div><div class='del'>-                 cpu_b0: cpu@100 {</div><div class='del'>-                         device_type = "cpu";</div><div class='del'>-                         compatible = "arm,cortex-a72";</div><div class='del'>-                         reg = &lt;0x0 0x100&gt;;</div><div class='del'>-                         enable-method = "psci";</div><div class='del'>-                         capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-                         dynamic-power-coefficient = &lt;436&gt;;</div><div class='del'>-                         #cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-                         cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;, &lt;&amp;CLUSTER_SLEEP&gt;;</div><div class='del'>-                         thermal-idle {</div><div class='del'>-                                 #cooling-cells = &lt;2&gt;;</div><div class='del'>-                                 duration-us = &lt;10000&gt;;</div><div class='del'>-                                 exit-latency-us = &lt;500&gt;;</div><div class='del'>-                         };</div><div class='add'>+            cpu_b0: cpu@100 {</div><div class='add'>+                device_type = "cpu";</div><div class='add'>+                compatible = "arm,cortex-a72";</div><div class='add'>+                reg = &lt;0x0 0x100&gt;;</div><div class='add'>+                enable-method = "psci";</div><div class='add'>+                capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+                dynamic-power-coefficient = &lt;436&gt;;</div><div class='add'>+                #cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='add'>+                cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;, &lt;&amp;CLUSTER_SLEEP&gt;;</div><div class='add'>+                cpu_b0_therm: thermal-idle {</div><div class='add'>+                    #cooling-cells = &lt;2&gt;;</div><div class='add'>+                    duration-us = &lt;10000&gt;;</div><div class='add'>+                    exit-latency-us = &lt;500&gt;;</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+</div><div class='add'>+            cpu_b1: cpu@101 {</div><div class='add'>+                device_type = "cpu";</div><div class='add'>+                compatible = "arm,cortex-a72";</div><div class='add'>+                reg = &lt;0x0 0x101&gt;;</div><div class='add'>+                enable-method = "psci";</div><div class='add'>+                capacity-dmips-mhz = &lt;1024&gt;;</div><div class='add'>+                dynamic-power-coefficient = &lt;436&gt;;</div><div class='add'>+                #cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='add'>+                cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;, &lt;&amp;CLUSTER_SLEEP&gt;;</div><div class='add'>+                cpu_b1_therm: thermal-idle {</div><div class='add'>+                    #cooling-cells = &lt;2&gt;;</div><div class='add'>+                    duration-us = &lt;10000&gt;;</div><div class='add'>+                    exit-latency-us = &lt;500&gt;;</div><div class='ctx'>                 };</div><div class='add'>+            };</div><div class='ctx'> </div><div class='del'>-                cpu_b1: cpu@101 {</div><div class='del'>-                        device_type = "cpu";</div><div class='del'>-                        compatible = "arm,cortex-a72";</div><div class='del'>-                        reg = &lt;0x0 0x101&gt;;</div><div class='del'>-                        enable-method = "psci";</div><div class='del'>-                        capacity-dmips-mhz = &lt;1024&gt;;</div><div class='del'>-                        dynamic-power-coefficient = &lt;436&gt;;</div><div class='del'>-                        #cooling-cells = &lt;2&gt;; /* min followed by max */</div><div class='del'>-                        cpu-idle-states = &lt;&amp;CPU_SLEEP&gt;, &lt;&amp;CLUSTER_SLEEP&gt;;</div><div class='del'>-                        thermal-idle {</div><div class='del'>-                                #cooling-cells = &lt;2&gt;;</div><div class='del'>-                                duration-us = &lt;10000&gt;;</div><div class='del'>-                                exit-latency-us = &lt;500&gt;;</div><div class='del'>-                        };</div><div class='del'>-                 };</div><div class='del'>-</div><div class='del'>-          /* ... */</div><div class='add'>+            /* ... */</div><div class='ctx'> </div><div class='del'>-    };</div><div class='add'>+        };</div><div class='ctx'> </div><div class='del'>-    /* ... */</div><div class='add'>+        /* ... */</div><div class='ctx'> </div><div class='del'>-    thermal_zones {</div><div class='del'>-         cpu_thermal: cpu {</div><div class='add'>+        thermal_zones {</div><div class='add'>+            cpu_thermal: cpu {</div><div class='ctx'>                 polling-delay-passive = &lt;100&gt;;</div><div class='ctx'>                 polling-delay = &lt;1000&gt;;</div><div class='ctx'> </div><div class='ctx'>                 /* ... */</div><div class='ctx'> </div><div class='ctx'>                 trips {</div><div class='del'>-                        cpu_alert0: cpu_alert0 {</div><div class='del'>-                                    temperature = &lt;65000&gt;;</div><div class='del'>-                                    hysteresis = &lt;2000&gt;;</div><div class='del'>-                                    type = "passive";</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        cpu_alert1: cpu_alert1 {</div><div class='del'>-                                    temperature = &lt;70000&gt;;</div><div class='del'>-                                    hysteresis = &lt;2000&gt;;</div><div class='del'>-                                    type = "passive";</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        cpu_alert2: cpu_alert2 {</div><div class='del'>-                                    temperature = &lt;75000&gt;;</div><div class='del'>-                                    hysteresis = &lt;2000&gt;;</div><div class='del'>-                                    type = "passive";</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        cpu_crit: cpu_crit {</div><div class='del'>-                                    temperature = &lt;95000&gt;;</div><div class='del'>-                                    hysteresis = &lt;2000&gt;;</div><div class='del'>-                                    type = "critical";</div><div class='del'>-                        };</div><div class='add'>+                    cpu_alert0: cpu_alert0 {</div><div class='add'>+                        temperature = &lt;65000&gt;;</div><div class='add'>+                        hysteresis = &lt;2000&gt;;</div><div class='add'>+                        type = "passive";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cpu_alert1: cpu_alert1 {</div><div class='add'>+                        temperature = &lt;70000&gt;;</div><div class='add'>+                        hysteresis = &lt;2000&gt;;</div><div class='add'>+                        type = "passive";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cpu_alert2: cpu_alert2 {</div><div class='add'>+                        temperature = &lt;75000&gt;;</div><div class='add'>+                        hysteresis = &lt;2000&gt;;</div><div class='add'>+                        type = "passive";</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    cpu_crit: cpu_crit {</div><div class='add'>+                        temperature = &lt;95000&gt;;</div><div class='add'>+                        hysteresis = &lt;2000&gt;;</div><div class='add'>+                        type = "critical";</div><div class='add'>+                    };</div><div class='ctx'>                 };</div><div class='ctx'> </div><div class='ctx'>                 cooling-maps {</div><div class='del'>-                        map0 {</div><div class='del'>-                             trip = &lt;&amp;cpu_alert1&gt;;</div><div class='del'>-                             cooling-device = &lt;&amp;{/cpus/cpu@100/thermal-idle} 0 15 &gt;,</div><div class='del'>-                                              &lt;&amp;{/cpus/cpu@101/thermal-idle} 0 15&gt;;</div><div class='del'>-                        };</div><div class='del'>-</div><div class='del'>-                        map1 {</div><div class='del'>-                             trip = &lt;&amp;cpu_alert2&gt;;</div><div class='del'>-                             cooling-device =</div><div class='del'>-                                        &lt;&amp;cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='del'>-                                        &lt;&amp;cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='del'>-                       };</div><div class='add'>+                    map0 {</div><div class='add'>+                        trip = &lt;&amp;cpu_alert1&gt;;</div><div class='add'>+                        cooling-device = &lt;&amp;cpu_b0_therm 0 15 &gt;,</div><div class='add'>+                                         &lt;&amp;cpu_b1_therm 0 15&gt;;</div><div class='add'>+                    };</div><div class='add'>+</div><div class='add'>+                    map1 {</div><div class='add'>+                        trip = &lt;&amp;cpu_alert2&gt;;</div><div class='add'>+                        cooling-device = &lt;&amp;cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;,</div><div class='add'>+                                         &lt;&amp;cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT&gt;;</div><div class='add'>+                    };</div><div class='ctx'>                 };</div><div class='del'>-          };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml b/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml<br/>index 4bd345c71eb8..57565b3fb07c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-sensor.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-sensor.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/thermal-sensor.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/thermal-sensor.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Thermal sensor binding</div><div class='add'>+title: Thermal sensor</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Amit Kucheria &lt;amitk@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/thermal-zones.yaml b/Documentation/devicetree/bindings/thermal/thermal-zones.yaml<br/>index 2d34f3ccb257..4f3acdc4dec0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-zones.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/thermal-zones.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/thermal-zones.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/thermal-zones.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/thermal-zones.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/base.yaml#</div><div class='ctx'> </div><div class='del'>-title: Thermal zone binding</div><div class='add'>+title: Thermal zone</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Amit Kucheria &lt;amitk@kernel.org&gt;</div><div class='hunk'>@@ -171,6 +171,7 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>       cooling-maps:</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description:</div><div class='ctx'>           This node describes the action to be taken when a thermal zone</div><div class='ctx'>           crosses one of the temperature thresholds described in the trips</div><div class='hunk'>@@ -214,6 +215,7 @@ patternProperties:</div><div class='ctx'>       - polling-delay</div><div class='ctx'>       - polling-delay-passive</div><div class='ctx'>       - thermal-sensors</div><div class='add'>+      - trips</div><div class='ctx'> </div><div class='ctx'>     additionalProperties: false</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml<br/>index ea14de80ec75..7ed0abe9290f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/ti,am654-thermal.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/thermal/ti,am654-thermal.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments AM654 VTM (DTS) binding</div><div class='add'>+title: Texas Instruments AM654 VTM (DTS)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Keerthy &lt;j-keerthy@ti.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml b/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml<br/>new file mode 100644<br/>index 000000000000..171b3622ed84<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/thermal/ti,j72xx-thermal.yaml</a></div><div class='hunk'>@@ -0,0 +1,96 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/thermal/ti,j72xx-thermal.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Texas Instruments J72XX VTM (DTS)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Keerthy &lt;j-keerthy@ti.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The TI K3 family of SoCs typically have a Voltage &amp; Thermal</div><div class='add'>+  Management (VTM) device to control up to 8 temperature diode</div><div class='add'>+  sensors to measure silicon junction temperatures from different</div><div class='add'>+  hotspots of the chip as well as provide temperature, interrupt</div><div class='add'>+  and alerting information.</div><div class='add'>+</div><div class='add'>+  The following polynomial equation can then be used to convert</div><div class='add'>+  value returned by this device into a temperature in Celsius</div><div class='add'>+</div><div class='add'>+  Temp(C) = (-9.2627e-12) * x^4 + (6.0373e-08) * x^3 + \</div><div class='add'>+            (-1.7058e-04) * x^2 + (3.2512e-01) * x   + (-4.9003e+01)</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - ti,j721e-vtm</div><div class='add'>+      - ti,j7200-vtm</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: VTM cfg1 register space</div><div class='add'>+      - description: VTM cfg2 register space</div><div class='add'>+      - description: |</div><div class='add'>+          A software trimming method must be applied to some Jacinto</div><div class='add'>+          devices to function properly. This eFuse region provides</div><div class='add'>+          the information needed for these SoCs to report</div><div class='add'>+          temperatures accurately.</div><div class='add'>+    minItems: 2</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#thermal-sensor-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ti,j721e-vtm</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          minItems: 3</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - power-domains</div><div class='add'>+  - "#thermal-sensor-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+    wkup_vtm0: thermal-sensor@42040000 {</div><div class='add'>+        compatible = "ti,j721e-vtm";</div><div class='add'>+        reg = &lt;0x42040000 0x350&gt;,</div><div class='add'>+              &lt;0x42050000 0x350&gt;,</div><div class='add'>+              &lt;0x43000300 0x10&gt;;</div><div class='add'>+        power-domains = &lt;&amp;k3_pds 154 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+        #thermal-sensor-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    mpu_thermal: mpu-thermal {</div><div class='add'>+        polling-delay-passive = &lt;250&gt;; /* milliseconds */</div><div class='add'>+        polling-delay = &lt;500&gt;; /* milliseconds */</div><div class='add'>+        thermal-sensors = &lt;&amp;wkup_vtm0 0&gt;;</div><div class='add'>+</div><div class='add'>+        trips {</div><div class='add'>+            mpu_crit: mpu-crit {</div><div class='add'>+                temperature = &lt;125000&gt;; /* milliCelsius */</div><div class='add'>+                hysteresis = &lt;2000&gt;; /* milliCelsius */</div><div class='add'>+                type = "critical";</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml<br/>index 53fd24bdc34e..b3538fac1ad2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Timer Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Timer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>           - allwinner,suniv-f1c100s-timer</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - allwinner,sun20i-d1-timer</div><div class='ctx'>               - allwinner,sun50i-a64-timer</div><div class='ctx'>               - allwinner,sun50i-h6-timer</div><div class='ctx'>               - allwinner,sun50i-h616-timer</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml<br/>index 2ecac754e1cd..f1853daec2f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/allwinner,sun5i-a13-hstimer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A13 High-Speed Timer Device Tree Bindings</div><div class='add'>+title: Allwinner A13 High-Speed Timer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt b/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt<br/>deleted file mode 100644<br/>index a9da22bda912..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/amlogic,meson6-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-Amlogic Meson6 SoCs Timer Controller</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "amlogic,meson6-timer"</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-- interrupts : The four interrupts, one for each timer event</div><div class='del'>-- clocks : phandles to the pclk (system clock) and XTAL clocks</div><div class='del'>-- clock-names : must contain "pclk" and "xtal"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer@c1109940 {</div><div class='del'>-	compatible = "amlogic,meson6-timer";</div><div class='del'>-	reg = &lt;0xc1109940 0x14&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 10 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-		     &lt;GIC_SPI 11 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-		     &lt;GIC_SPI 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='del'>-		     &lt;GIC_SPI 29 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-	clocks = &lt;&amp;xtal&gt;, &lt;&amp;clk81&gt;;</div><div class='del'>-	clock-names = "xtal", "pclk";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.yaml b/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.yaml<br/>new file mode 100644<br/>index 000000000000..8381a5404ef7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/amlogic,meson6-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/amlogic,meson6-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/amlogic,meson6-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson6 SoCs Timer Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+  - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: amlogic,meson6-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 4</div><div class='add'>+    description: per-timer event interrupts</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xtal</div><div class='add'>+      - const: pclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    timer@c1109940 {</div><div class='add'>+        compatible = "amlogic,meson6-timer";</div><div class='add'>+        reg = &lt;0xc1109940 0x14&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 10 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 11 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 6 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                     &lt;GIC_SPI 29 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        clocks = &lt;&amp;xtal&gt;, &lt;&amp;clk81&gt;;</div><div class='add'>+        clock-names = "xtal", "pclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml<br/>index df8ce87fd54b..c5fc3b6c8bd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/arm,arch_timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/arm,arch_timer.yaml</a></div><div class='hunk'>@@ -22,16 +22,15 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - items:</div><div class='del'>-          - enum:</div><div class='del'>-              - arm,cortex-a15-timer</div><div class='del'>-          - enum:</div><div class='del'>-              - arm,armv7-timer</div><div class='add'>+          - const: arm,cortex-a15-timer</div><div class='add'>+          - const: arm,armv7-timer</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - arm,armv7-timer</div><div class='del'>-      - items:</div><div class='del'>-          - enum:</div><div class='ctx'>               - arm,armv8-timer</div><div class='add'>+      - items:</div><div class='add'>+          - const: arm,armv8-timer</div><div class='add'>+          - const: arm,armv7-timer</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     minItems: 1</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml b/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml<br/>index cd2176cad53a..7a4a6ab85970 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml</a></div><div class='hunk'>@@ -62,10 +62,11 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   '^frame@[0-9a-z]*$':</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'>     description: A timer node has up to 8 frame sub-nodes, each with the following properties.</div><div class='ctx'>     properties:</div><div class='ctx'>       frame-number:</div><div class='del'>-        $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+        $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>         minimum: 0</div><div class='ctx'>         maximum: 7</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/brcm,bcmbca-timer.yaml b/Documentation/devicetree/bindings/timer/brcm,bcmbca-timer.yaml<br/>new file mode 100644<br/>index 000000000000..6707d9760857<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/brcm,bcmbca-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/brcm,bcmbca-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/brcm,bcmbca-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Broadcom Broadband SoC timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rafał Miłecki &lt;rafal@milecki.pl&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: brcm,bcm6345-timer</div><div class='add'>+        description: &gt;</div><div class='add'>+          An old block with 3 timers.</div><div class='add'>+</div><div class='add'>+          It can be found in BCM6345, BCM6838 and BCM63268.</div><div class='add'>+      - const: brcm,bcm63138-timer</div><div class='add'>+        description: &gt;</div><div class='add'>+          Updated block with 4 timers and control regs at the beginning.</div><div class='add'>+</div><div class='add'>+          It can be found in newer SoCs, e.g. BCM63138, BCM63148, BCM63381,</div><div class='add'>+          BCM68360, BCM6848, BCM6858, BCM4908.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@fffe0200 {</div><div class='add'>+      compatible = "brcm,bcm6345-timer";</div><div class='add'>+      reg = &lt;0xfffe0200 0x1c&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/cdns,ttc.yaml b/Documentation/devicetree/bindings/timer/cdns,ttc.yaml<br/>index c3386076a98c..bc5e6f226295 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/cdns,ttc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/cdns,ttc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/cdns,ttc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/cdns,ttc.yaml</a></div><div class='hunk'>@@ -17,7 +17,6 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    minItems: 3</div><div class='ctx'>     maxItems: 3</div><div class='ctx'>     description: |</div><div class='ctx'>       A list of 3 interrupts; one per timer channel.</div><div class='hunk'>@@ -29,7 +28,7 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   timer-width:</div><div class='del'>-    $ref: "/schemas/types.yaml#/definitions/uint32"</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='ctx'>       Bit width of the timer, necessary if not 16.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml b/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml<br/>index a4f51f46b7a1..716c6afcca1f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/fsl,imxgpt.yaml</a></div><div class='hunk'>@@ -31,6 +31,8 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - fsl,imx6sl-gpt</div><div class='ctx'>               - fsl,imx6sx-gpt</div><div class='add'>+              - fsl,imxrt1050-gpt</div><div class='add'>+              - fsl,imxrt1170-gpt</div><div class='ctx'>           - const: fsl,imx6dl-gpt</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml b/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml<br/>new file mode 100644<br/>index 000000000000..d33d90f44d28<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/hpe,gxp-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HPE GXP Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Nick Hawkins &lt;nick.hawkins@hpe.com&gt;</div><div class='add'>+  - Jean-Marie Verdun &lt;verdun@hpe.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: hpe,gxp-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: iop</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@c0000000 {</div><div class='add'>+        compatible = "hpe,gxp-timer";</div><div class='add'>+        reg = &lt;0x80 0x16&gt;;</div><div class='add'>+        interrupts = &lt;0&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;vic0&gt;;</div><div class='add'>+        clocks = &lt;&amp;iopclk&gt;;</div><div class='add'>+        clock-names = "iop";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml b/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml<br/>index 98648bf9e151..bdc82d8bce0e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/ingenic,sysost.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/ingenic,sysost.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/ingenic,sysost.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/ingenic,sysost.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for SYSOST in Ingenic XBurst family SoCs</div><div class='add'>+title: SYSOST in Ingenic XBurst family SoCs</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml b/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml<br/>index d541cf2067bc..2d14610888a7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/ingenic,tcu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/ingenic,tcu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/ingenic,tcu.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/ingenic,tcu.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic SoCs Timer/Counter Unit (TCU) devicetree bindings</div><div class='add'>+title: Ingenic SoCs Timer/Counter Unit (TCU)</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   For a description of the TCU hardware and drivers, have a look at</div><div class='hunk'>@@ -113,7 +113,9 @@ properties:</div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^watchdog@[a-f0-9]+$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: ../watchdog/watchdog.yaml#</div><div class='add'>+    $ref: /schemas/watchdog/watchdog.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         oneOf:</div><div class='hunk'>@@ -145,7 +147,9 @@ patternProperties:</div><div class='ctx'> </div><div class='ctx'>   "^pwm@[a-f0-9]+$":</div><div class='ctx'>     type: object</div><div class='del'>-    $ref: ../pwm/pwm.yaml#</div><div class='add'>+    $ref: /schemas/pwm/pwm.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='ctx'>         oneOf:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml b/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml<br/>index f32575d4b5aa..526b8db4d575 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml</a></div><div class='hunk'>@@ -2,8 +2,8 @@</div><div class='ctx'> # Copyright 2018 Linaro Ltd.</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/timer/intel,ixp4xx-timer.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/timer/intel,ixp4xx-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Intel IXP4xx XScale Networking Processors Timers</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt b/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt<br/>index fbd76a8e023b..b3e797e8aa31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> MediaTek Timers</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='del'>-MediaTek SoCs have two different timers on different platforms,</div><div class='add'>+MediaTek SoCs have different timers on different platforms,</div><div class='add'>+- CPUX (ARM/ARM64 System Timer)</div><div class='ctx'> - GPT (General Purpose Timer)</div><div class='ctx'> - SYST (System Timer)</div><div class='ctx'> </div><div class='hunk'>@@ -23,11 +24,17 @@ Required properties:</div><div class='ctx'> </div><div class='ctx'> 	For those SoCs that use SYST</div><div class='ctx'> 	* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)</div><div class='add'>+	* "mediatek,mt8186-timer" for MT8186 compatible timers (SYST)</div><div class='add'>+	* "mediatek,mt8188-timer" for MT8188 compatible timers (SYST)</div><div class='ctx'> 	* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)</div><div class='ctx'> 	* "mediatek,mt8195-timer" for MT8195 compatible timers (SYST)</div><div class='ctx'> 	* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)</div><div class='ctx'> 	* "mediatek,mt6765-timer" for MT6765 and all above compatible timers (SYST)</div><div class='ctx'> </div><div class='add'>+	For those SoCs that use CPUX</div><div class='add'>+	* "mediatek,mt6795-systimer" for MT6795 compatible timers (CPUX)</div><div class='add'>+	* "mediatek,mt8365-systimer" for MT8365 compatible timers (CPUX)</div><div class='add'>+</div><div class='ctx'> - reg: Should contain location and length for timer register.</div><div class='ctx'> - clocks: Should contain system clock.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml b/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml<br/>index 1fbc260a0cbd..1ee4aab695d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/mrvl,mmp-timer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/mrvl,mmp-timer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell MMP Timer bindings</div><div class='add'>+title: Marvell MMP Timer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml b/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml<br/>index 03d5dba5d5b3..f118ca423e38 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/mstar,msc313e-timer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/mstar,msc313e-timer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mstar MSC313e Timer Device Tree Bindings</div><div class='add'>+title: Mstar MSC313e Timer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Palmer &lt;daniel@0x0f.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml b/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml<br/>index 0cbc26a72151..d53e1bb98b8a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/nuvoton,npcm7xx-timer.yaml</a></div><div class='hunk'>@@ -8,12 +8,14 @@ title: Nuvoton NPCM7xx timer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jonathan Neuschäfer &lt;j.neuschaefer@gmx.net&gt;</div><div class='add'>+  - Tomer Maimon &lt;tmaimon77@gmail.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - nuvoton,wpcm450-timer  # for Hermon WPCM450</div><div class='ctx'>       - nuvoton,npcm750-timer  # for Poleg NPCM750</div><div class='add'>+      - nuvoton,npcm845-timer  # for Arbel NPCM845</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -23,7 +25,13 @@ properties:</div><div class='ctx'>       - description: The timer interrupt of timer 0</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: The reference clock for timer 0</div><div class='add'>+      - description: The reference clock for timer 1</div><div class='add'>+      - description: The reference clock for timer 2</div><div class='add'>+      - description: The reference clock for timer 3</div><div class='add'>+      - description: The reference clock for timer 4</div><div class='add'>+    minItems: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml b/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml<br/>index b78209cd0f28..9ea2ea3a7599 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/nvidia,tegra-timer.yaml</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: NVIDIA Tegra timer</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml b/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml<br/>new file mode 100644<br/>index 000000000000..76516e18e042<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,109 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra186 timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;treding@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: &gt;</div><div class='add'>+  The Tegra timer provides 29-bit timer counters and a 32-bit timestamp</div><div class='add'>+  counter. Each NV timer selects its timing reference signal from the 1 MHz</div><div class='add'>+  reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be</div><div class='add'>+  programmed to generate one-shot, periodic, or watchdog interrupts.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: nvidia,tegra186-timer</div><div class='add'>+        description: &gt;</div><div class='add'>+          The Tegra186 timer provides ten 29-bit timer counters.</div><div class='add'>+      - const: nvidia,tegra234-timer</div><div class='add'>+        description: &gt;</div><div class='add'>+          The Tegra234 timer provides sixteen 29-bit timer counters.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nvidia,tegra186-timer</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 10</div><div class='add'>+          description: &gt;</div><div class='add'>+            One per each timer channels 0 through 9.</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: nvidia,tegra234-timer</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 16</div><div class='add'>+          description: &gt;</div><div class='add'>+            One per each timer channels 0 through 15.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@3010000 {</div><div class='add'>+        compatible = "nvidia,tegra186-timer";</div><div class='add'>+        reg = &lt;0x03010000 0x000e0000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@2080000 {</div><div class='add'>+        compatible = "nvidia,tegra234-timer";</div><div class='add'>+        reg = &lt;0x02080000 0x00121000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml b/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml<br/>index 830211c55b4a..2b9653dafab8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/nxp,sysctr-timer.yaml</a></div><div class='hunk'>@@ -32,6 +32,10 @@ properties:</div><div class='ctx'>   clock-names:</div><div class='ctx'>     const: per</div><div class='ctx'> </div><div class='add'>+  nxp,no-divider:</div><div class='add'>+    description: if present, means there is no internal base clk divider.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/qcom,msm-timer.txt b/Documentation/devicetree/bindings/timer/qcom,msm-timer.txt<br/>deleted file mode 100644<br/>index 5e10c345548f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/qcom,msm-timer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/qcom,msm-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,47 +0,0 @@</div><div class='del'>-* MSM Timer</div><div class='del'>-</div><div class='del'>-Properties:</div><div class='del'>-</div><div class='del'>-- compatible : Should at least contain "qcom,msm-timer". More specific</div><div class='del'>-               properties specify which subsystem the timers are paired with.</div><div class='del'>-</div><div class='del'>-               "qcom,kpss-timer" - krait subsystem</div><div class='del'>-               "qcom,scss-timer" - scorpion subsystem</div><div class='del'>-</div><div class='del'>-- interrupts : Interrupts for the debug timer, the first general purpose</div><div class='del'>-               timer, and optionally a second general purpose timer, and</div><div class='del'>-               optionally as well, 2 watchdog interrupts, in that order.</div><div class='del'>-</div><div class='del'>-- reg : Specifies the base address of the timer registers.</div><div class='del'>-</div><div class='del'>-- clocks: Reference to the parent clocks, one per output clock. The parents</div><div class='del'>-          must appear in the same order as the clock names.</div><div class='del'>-</div><div class='del'>-- clock-names: The name of the clocks as free-form strings. They should be in</div><div class='del'>-               the same order as the clocks.</div><div class='del'>-</div><div class='del'>-- clock-frequency : The frequency of the debug timer and the general purpose</div><div class='del'>-                    timer(s) in Hz in that order.</div><div class='del'>-</div><div class='del'>-Optional:</div><div class='del'>-</div><div class='del'>-- cpu-offset : per-cpu offset used when the timer is accessed without the</div><div class='del'>-               CPU remapping facilities. The offset is</div><div class='del'>-               cpu-offset + (0x10000 * cpu-nr).</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-       timer@200a000 {</div><div class='del'>-               compatible = "qcom,scss-timer", "qcom,msm-timer";</div><div class='del'>-               interrupts = &lt;1 1 0x301&gt;,</div><div class='del'>-                            &lt;1 2 0x301&gt;,</div><div class='del'>-                            &lt;1 3 0x301&gt;,</div><div class='del'>-                            &lt;1 4 0x301&gt;,</div><div class='del'>-                            &lt;1 5 0x301&gt;;</div><div class='del'>-               reg = &lt;0x0200a000 0x100&gt;;</div><div class='del'>-               clock-frequency = &lt;19200000&gt;,</div><div class='del'>-                                 &lt;32768&gt;;</div><div class='del'>-               clocks = &lt;&amp;sleep_clk&gt;;</div><div class='del'>-               clock-names = "sleep";</div><div class='del'>-               cpu-offset = &lt;0x40000&gt;;</div><div class='del'>-       };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt b/Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt<br/>deleted file mode 100644<br/>index 4db542c9a0fd..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,20 +0,0 @@</div><div class='del'>-RDA Micro RDA8810PL Timer</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible      :  "rda,8810pl-timer"</div><div class='del'>-- reg             :  Offset and length of the register set for the device.</div><div class='del'>-- interrupts      :  Should contain two interrupts.</div><div class='del'>-- interrupt-names :  Should be "hwtimer", "ostimer".</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-		apb@20900000 {</div><div class='del'>-			compatible = "simple-bus";</div><div class='del'>-			...</div><div class='del'>-			timer@10000 {</div><div class='del'>-				compatible = "rda,8810pl-timer";</div><div class='del'>-				reg = &lt;0x10000 0x1000&gt;;</div><div class='del'>-				interrupts = &lt;16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-					     &lt;17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-				interrupt-names = "hwtimer", "ostimer";</div><div class='del'>-			};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/rda,8810pl-timer.yaml b/Documentation/devicetree/bindings/timer/rda,8810pl-timer.yaml<br/>new file mode 100644<br/>index 000000000000..f9043a4488d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/rda,8810pl-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/rda,8810pl-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/rda,8810pl-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RDA Micro RDA8810PL Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rda,8810pl-timer</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 2</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hwtimer</div><div class='add'>+      - const: ostimer</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    timer@20910000 {</div><div class='add'>+      compatible = "rda,8810pl-timer";</div><div class='add'>+      reg = &lt;0x20910000 0x1000&gt;;</div><div class='add'>+      interrupts = &lt;16 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                   &lt;17 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      interrupt-names = "hwtimer", "ostimer";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt b/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt<br/>deleted file mode 100644<br/>index e8792447a199..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,16bit-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-* Renesas H8/300 16bit timer</div><div class='del'>-</div><div class='del'>-The 16bit timer is a 16bit timer/counter with configurable clock inputs and</div><div class='del'>-programmable compare match.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-  - compatible: must contain "renesas,16bit-timer"</div><div class='del'>-  - reg: base address and length of the registers block for the timer module.</div><div class='del'>-  - interrupts: interrupt-specifier for the timer, IMIA</div><div class='del'>-  - clocks: a list of phandle, one for each entry in clock-names.</div><div class='del'>-  - clock-names: must contain "peripheral_clk" for the functional clock.</div><div class='del'>-  - renesas,channel: timer channel number.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	timer16: timer@ffff68 {</div><div class='del'>-		compatible = "reneas,16bit-timer";</div><div class='del'>-		reg = &lt;0xffff68 8&gt;, &lt;0xffff60 8&gt;;</div><div class='del'>-		interrupts = &lt;24&gt;;</div><div class='del'>-		renesas,channel = &lt;0&gt;;</div><div class='del'>-		clocks = &lt;&amp;pclk&gt;;</div><div class='del'>-		clock-names = "peripheral_clk";</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt b/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt<br/>deleted file mode 100644<br/>index 9dca3759a0f0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,8bit-timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,25 +0,0 @@</div><div class='del'>-* Renesas H8/300 8bit timer</div><div class='del'>-</div><div class='del'>-The 8bit timer is a 8bit timer/counter with configurable clock inputs and</div><div class='del'>-programmable compare match.</div><div class='del'>-</div><div class='del'>-This implement only supported cascade mode.</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-</div><div class='del'>-  - compatible: must contain "renesas,8bit-timer"</div><div class='del'>-  - reg: base address and length of the registers block for the timer module.</div><div class='del'>-  - interrupts: interrupt-specifier for the timer, CMIA and TOVI</div><div class='del'>-  - clocks: a list of phandle, one for each entry in clock-names.</div><div class='del'>-  - clock-names: must contain "fck" for the functional clock.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	timer8_0: timer@ffff80 {</div><div class='del'>-		compatible = "renesas,8bit-timer";</div><div class='del'>-		reg = &lt;0xffff80 10&gt;;</div><div class='del'>-		interrupts = &lt;36&gt;;</div><div class='del'>-		clocks = &lt;&amp;fclk&gt;;</div><div class='del'>-		clock-names = "fck";</div><div class='del'>-	};</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,cmt.yaml b/Documentation/devicetree/bindings/timer/renesas,cmt.yaml<br/>index 53dd6d9f518f..a0be1755ea28 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,cmt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,cmt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,cmt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/renesas,cmt.yaml</a></div><div class='hunk'>@@ -80,7 +80,6 @@ properties:</div><div class='ctx'>               - renesas,r8a77980-cmt0     # 32-bit CMT0 on R-Car V3H</div><div class='ctx'>               - renesas,r8a77990-cmt0     # 32-bit CMT0 on R-Car E3</div><div class='ctx'>               - renesas,r8a77995-cmt0     # 32-bit CMT0 on R-Car D3</div><div class='del'>-              - renesas,r8a779a0-cmt0     # 32-bit CMT0 on R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-cmt0 # 32-bit CMT0 on R-Car Gen3 and RZ/G2</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='hunk'>@@ -97,9 +96,22 @@ properties:</div><div class='ctx'>               - renesas,r8a77980-cmt1     # 48-bit CMT on R-Car V3H</div><div class='ctx'>               - renesas,r8a77990-cmt1     # 48-bit CMT on R-Car E3</div><div class='ctx'>               - renesas,r8a77995-cmt1     # 48-bit CMT on R-Car D3</div><div class='del'>-              - renesas,r8a779a0-cmt1     # 48-bit CMT on R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-cmt1 # 48-bit CMT on R-Car Gen3 and RZ/G2</div><div class='ctx'> </div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r8a779a0-cmt0     # 32-bit CMT0 on R-Car V3U</div><div class='add'>+              - renesas,r8a779f0-cmt0     # 32-bit CMT0 on R-Car S4-8</div><div class='add'>+              - renesas,r8a779g0-cmt0     # 32-bit CMT0 on R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-cmt0 # 32-bit CMT0 on R-Car Gen4</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r8a779a0-cmt1     # 48-bit CMT on R-Car V3U</div><div class='add'>+              - renesas,r8a779f0-cmt1     # 48-bit CMT on R-Car S4-8</div><div class='add'>+              - renesas,r8a779g0-cmt1     # 48-bit CMT on R-Car V4H</div><div class='add'>+          - const: renesas,rcar-gen4-cmt1 # 48-bit CMT on R-Car Gen4</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -135,6 +147,7 @@ allOf:</div><div class='ctx'>             enum:</div><div class='ctx'>               - renesas,rcar-gen2-cmt0</div><div class='ctx'>               - renesas,rcar-gen3-cmt0</div><div class='add'>+              - renesas,rcar-gen4-cmt0</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='hunk'>@@ -148,6 +161,7 @@ allOf:</div><div class='ctx'>             enum:</div><div class='ctx'>               - renesas,rcar-gen2-cmt1</div><div class='ctx'>               - renesas,rcar-gen3-cmt1</div><div class='add'>+              - renesas,rcar-gen4-cmt1</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,ostm.yaml b/Documentation/devicetree/bindings/timer/renesas,ostm.yaml<br/>index c399a019dde7..7207929e5cd6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,ostm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/renesas,ostm.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - renesas,r7s72100-ostm  # RZ/A1H</div><div class='ctx'>           - renesas,r7s9210-ostm   # RZ/A2M</div><div class='add'>+          - renesas,r9a07g043-ostm # RZ/G2UL</div><div class='ctx'>           - renesas,r9a07g044-ostm # RZ/G2{L,LC}</div><div class='ctx'>           - renesas,r9a07g054-ostm # RZ/V2L</div><div class='ctx'>       - const: renesas,ostm        # Generic</div><div class='hunk'>@@ -54,6 +55,7 @@ if:</div><div class='ctx'>     compatible:</div><div class='ctx'>       contains:</div><div class='ctx'>         enum:</div><div class='add'>+          - renesas,r9a07g043-ostm</div><div class='ctx'>           - renesas,r9a07g044-ostm</div><div class='ctx'>           - renesas,r9a07g054-ostm</div><div class='ctx'> then:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml b/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml<br/>new file mode 100644<br/>index 000000000000..bffdab0b0185<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/renesas,rz-mtu3.yaml</a></div><div class='hunk'>@@ -0,0 +1,302 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/renesas,rz-mtu3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/G2L Multi-Function Timer Pulse Unit 3 (MTU3a)</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This hardware block consists of eight 16-bit timer channels and one</div><div class='add'>+  32- bit timer channel. It supports the following specifications:</div><div class='add'>+    - Pulse input/output: 28 lines max.</div><div class='add'>+    - Pulse input 3 lines</div><div class='add'>+    - Count clock 11 clocks for each channel (14 clocks for MTU0, 12 clocks</div><div class='add'>+      for MTU2, and 10 clocks for MTU5, four clocks for MTU1-MTU2 combination</div><div class='add'>+      (when LWA = 1))</div><div class='add'>+    - Operating frequency Up to 100 MHz</div><div class='add'>+    - Available operations [MTU0 to MTU4, MTU6, MTU7, and MTU8]</div><div class='add'>+        - Waveform output on compare match</div><div class='add'>+        - Input capture function (noise filter setting available)</div><div class='add'>+        - Counter-clearing operation</div><div class='add'>+        - Simultaneous writing to multiple timer counters (TCNT)</div><div class='add'>+          (excluding MTU8).</div><div class='add'>+        - Simultaneous clearing on compare match or input capture</div><div class='add'>+          (excluding MTU8).</div><div class='add'>+        - Simultaneous input and output to registers in synchronization with</div><div class='add'>+          counter operations           (excluding MTU8).</div><div class='add'>+        - Up to 12-phase PWM output in combination with synchronous operation</div><div class='add'>+          (excluding MTU8)</div><div class='add'>+    - [MTU0 MTU3, MTU4, MTU6, MTU7, and MTU8]</div><div class='add'>+        - Buffer operation specifiable</div><div class='add'>+    - [MTU1, MTU2]</div><div class='add'>+        - Phase counting mode can be specified independently</div><div class='add'>+        - 32-bit phase counting mode can be specified for interlocked operation</div><div class='add'>+          of MTU1 and MTU2 (when TMDR3.LWA = 1)</div><div class='add'>+        - Cascade connection operation available</div><div class='add'>+    - [MTU3, MTU4, MTU6, and MTU7]</div><div class='add'>+        - Through interlocked operation of MTU3/4 and MTU6/7, the positive and</div><div class='add'>+          negative signals in six phases (12 phases in total) can be output in</div><div class='add'>+          complementary PWM and reset-synchronized PWM operation.</div><div class='add'>+        - In complementary PWM mode, values can be transferred from buffer</div><div class='add'>+          registers to temporary registers at crests and troughs of the timer-</div><div class='add'>+          counter values or when the buffer registers (TGRD registers in MTU4</div><div class='add'>+          and MTU7) are written to.</div><div class='add'>+        - Double-buffering selectable in complementary PWM mode.</div><div class='add'>+    - [MTU3 and MTU4]</div><div class='add'>+        - Through interlocking with MTU0, a mode for driving AC synchronous</div><div class='add'>+          motors (brushless DC motors) by using complementary PWM output and</div><div class='add'>+          reset-synchronized PWM output is settable and allows the selection</div><div class='add'>+          of two types of waveform output (chopping or level).</div><div class='add'>+    - [MTU5]</div><div class='add'>+        - Capable of operation as a dead-time compensation counter.</div><div class='add'>+    - [MTU0/MTU5, MTU1, MTU2, and MTU8]</div><div class='add'>+        - 32-bit phase counting mode specifiable by combining MTU1 and MTU2 and</div><div class='add'>+          through interlocked operation with MTU0/MTU5 and MTU8.</div><div class='add'>+    - Interrupt-skipping function</div><div class='add'>+        - In complementary PWM mode, interrupts on crests and troughs of counter</div><div class='add'>+          values and triggers to start conversion by the A/D converter can be</div><div class='add'>+          skipped.</div><div class='add'>+    - Interrupt sources: 43 sources.</div><div class='add'>+    - Buffer operation:</div><div class='add'>+        - Automatic transfer of register data (transfer from the buffer</div><div class='add'>+          register to the timer register).</div><div class='add'>+    - Trigger generation</div><div class='add'>+        - A/D converter start triggers can be generated</div><div class='add'>+        - A/D converter start request delaying function enables A/D converter</div><div class='add'>+          to be started with any desired timing and to be synchronized with</div><div class='add'>+          PWM output.</div><div class='add'>+    - Low power consumption function</div><div class='add'>+        - The MTU3a can be placed in the module-stop state.</div><div class='add'>+</div><div class='add'>+    There are two phase counting modes. 16-bit phase counting mode in which</div><div class='add'>+    MTU1 and MTU2 operate independently, and cascade connection 32-bit phase</div><div class='add'>+    counting mode in which MTU1 and MTU2 are cascaded.</div><div class='add'>+</div><div class='add'>+    In phase counting mode, the phase difference between two external input</div><div class='add'>+    clocks is detected and the corresponding TCNT is incremented or</div><div class='add'>+    decremented.</div><div class='add'>+    The below counters are supported</div><div class='add'>+      count0 - MTU1 16-bit phase counting</div><div class='add'>+      count1 - MTU2 16-bit phase counting</div><div class='add'>+      count2 - MTU1+ MTU2 32-bit phase counting</div><div class='add'>+</div><div class='add'>+    The module supports PWM mode{1,2}, Reset-synchronized PWM mode and</div><div class='add'>+    complementary PWM mode{1,2,3}.</div><div class='add'>+</div><div class='add'>+    In complementary PWM mode, six positive-phase and six negative-phase PWM</div><div class='add'>+    waveforms (12 phases in total) with dead time can be output by</div><div class='add'>+    combining MTU{3,4} and MTU{6,7}.</div><div class='add'>+</div><div class='add'>+    The below pwm channels are supported in pwm mode 1.</div><div class='add'>+      pwm0  - MTU0.MTIOC0A PWM mode 1</div><div class='add'>+      pwm1  - MTU0.MTIOC0C PWM mode 1</div><div class='add'>+      pwm2  - MTU1.MTIOC1A PWM mode 1</div><div class='add'>+      pwm3  - MTU2.MTIOC2A PWM mode 1</div><div class='add'>+      pwm4  - MTU3.MTIOC3A PWM mode 1</div><div class='add'>+      pwm5  - MTU3.MTIOC3C PWM mode 1</div><div class='add'>+      pwm6  - MTU4.MTIOC4A PWM mode 1</div><div class='add'>+      pwm7  - MTU4.MTIOC4C PWM mode 1</div><div class='add'>+      pwm8  - MTU6.MTIOC6A PWM mode 1</div><div class='add'>+      pwm9  - MTU6.MTIOC6C PWM mode 1</div><div class='add'>+      pwm10 - MTU7.MTIOC7A PWM mode 1</div><div class='add'>+      pwm11 - MTU7.MTIOC7C PWM mode 1</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a07g044-mtu3  # RZ/G2{L,LC}</div><div class='add'>+          - renesas,r9a07g054-mtu3  # RZ/V2L</div><div class='add'>+      - const: renesas,rz-mtu3</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: MTU0.TGRA input capture/compare match</div><div class='add'>+      - description: MTU0.TGRB input capture/compare match</div><div class='add'>+      - description: MTU0.TGRC input capture/compare match</div><div class='add'>+      - description: MTU0.TGRD input capture/compare match</div><div class='add'>+      - description: MTU0.TCNT overflow</div><div class='add'>+      - description: MTU0.TGRE compare match</div><div class='add'>+      - description: MTU0.TGRF compare match</div><div class='add'>+      - description: MTU1.TGRA input capture/compare match</div><div class='add'>+      - description: MTU1.TGRB input capture/compare match</div><div class='add'>+      - description: MTU1.TCNT overflow</div><div class='add'>+      - description: MTU1.TCNT underflow</div><div class='add'>+      - description: MTU2.TGRA input capture/compare match</div><div class='add'>+      - description: MTU2.TGRB input capture/compare match</div><div class='add'>+      - description: MTU2.TCNT overflow</div><div class='add'>+      - description: MTU2.TCNT underflow</div><div class='add'>+      - description: MTU3.TGRA input capture/compare match</div><div class='add'>+      - description: MTU3.TGRB input capture/compare match</div><div class='add'>+      - description: MTU3.TGRC input capture/compare match</div><div class='add'>+      - description: MTU3.TGRD input capture/compare match</div><div class='add'>+      - description: MTU3.TCNT overflow</div><div class='add'>+      - description: MTU4.TGRA input capture/compare match</div><div class='add'>+      - description: MTU4.TGRB input capture/compare match</div><div class='add'>+      - description: MTU4.TGRC input capture/compare match</div><div class='add'>+      - description: MTU4.TGRD input capture/compare match</div><div class='add'>+      - description: MTU4.TCNT overflow/underflow</div><div class='add'>+      - description: MTU5.TGRU input capture/compare match</div><div class='add'>+      - description: MTU5.TGRV input capture/compare match</div><div class='add'>+      - description: MTU5.TGRW input capture/compare match</div><div class='add'>+      - description: MTU6.TGRA input capture/compare match</div><div class='add'>+      - description: MTU6.TGRB input capture/compare match</div><div class='add'>+      - description: MTU6.TGRC input capture/compare match</div><div class='add'>+      - description: MTU6.TGRD input capture/compare match</div><div class='add'>+      - description: MTU6.TCNT overflow</div><div class='add'>+      - description: MTU7.TGRA input capture/compare match</div><div class='add'>+      - description: MTU7.TGRB input capture/compare match</div><div class='add'>+      - description: MTU7.TGRC input capture/compare match</div><div class='add'>+      - description: MTU7.TGRD input capture/compare match</div><div class='add'>+      - description: MTU7.TCNT overflow/underflow</div><div class='add'>+      - description: MTU8.TGRA input capture/compare match</div><div class='add'>+      - description: MTU8.TGRB input capture/compare match</div><div class='add'>+      - description: MTU8.TGRC input capture/compare match</div><div class='add'>+      - description: MTU8.TGRD input capture/compare match</div><div class='add'>+      - description: MTU8.TCNT overflow</div><div class='add'>+      - description: MTU8.TCNT underflow</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: tgia0</div><div class='add'>+      - const: tgib0</div><div class='add'>+      - const: tgic0</div><div class='add'>+      - const: tgid0</div><div class='add'>+      - const: tgiv0</div><div class='add'>+      - const: tgie0</div><div class='add'>+      - const: tgif0</div><div class='add'>+      - const: tgia1</div><div class='add'>+      - const: tgib1</div><div class='add'>+      - const: tgiv1</div><div class='add'>+      - const: tgiu1</div><div class='add'>+      - const: tgia2</div><div class='add'>+      - const: tgib2</div><div class='add'>+      - const: tgiv2</div><div class='add'>+      - const: tgiu2</div><div class='add'>+      - const: tgia3</div><div class='add'>+      - const: tgib3</div><div class='add'>+      - const: tgic3</div><div class='add'>+      - const: tgid3</div><div class='add'>+      - const: tgiv3</div><div class='add'>+      - const: tgia4</div><div class='add'>+      - const: tgib4</div><div class='add'>+      - const: tgic4</div><div class='add'>+      - const: tgid4</div><div class='add'>+      - const: tgiv4</div><div class='add'>+      - const: tgiu5</div><div class='add'>+      - const: tgiv5</div><div class='add'>+      - const: tgiw5</div><div class='add'>+      - const: tgia6</div><div class='add'>+      - const: tgib6</div><div class='add'>+      - const: tgic6</div><div class='add'>+      - const: tgid6</div><div class='add'>+      - const: tgiv6</div><div class='add'>+      - const: tgia7</div><div class='add'>+      - const: tgib7</div><div class='add'>+      - const: tgic7</div><div class='add'>+      - const: tgid7</div><div class='add'>+      - const: tgiv7</div><div class='add'>+      - const: tgia8</div><div class='add'>+      - const: tgib8</div><div class='add'>+      - const: tgic8</div><div class='add'>+      - const: tgid8</div><div class='add'>+      - const: tgiv8</div><div class='add'>+      - const: tgiu8</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#pwm-cells":</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a07g044-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    mtu3: timer@10001200 {</div><div class='add'>+      compatible = "renesas,r9a07g044-mtu3", "renesas,rz-mtu3";</div><div class='add'>+      reg = &lt;0x10001200 0xb00&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 170 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 171 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 172 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 173 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 174 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 175 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 176 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 177 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 178 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 179 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 180 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 181 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 182 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 183 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 184 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 185 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 186 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 187 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 188 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 189 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 190 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 191 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 192 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 193 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 194 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 195 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 196 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 197 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 198 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 199 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 200 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 201 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 202 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 203 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 204 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 205 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 206 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 207 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 208 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 209 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 210 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 211 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 212 IRQ_TYPE_EDGE_RISING&gt;,</div><div class='add'>+                   &lt;GIC_SPI 213 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+      interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0", "tgiv0", "tgie0",</div><div class='add'>+                        "tgif0",</div><div class='add'>+                        "tgia1", "tgib1", "tgiv1", "tgiu1",</div><div class='add'>+                        "tgia2", "tgib2", "tgiv2", "tgiu2",</div><div class='add'>+                        "tgia3", "tgib3", "tgic3", "tgid3", "tgiv3",</div><div class='add'>+                        "tgia4", "tgib4", "tgic4", "tgid4", "tgiv4",</div><div class='add'>+                        "tgiu5", "tgiv5", "tgiw5",</div><div class='add'>+                        "tgia6", "tgib6", "tgic6", "tgid6", "tgiv6",</div><div class='add'>+                        "tgia7", "tgib7", "tgic7", "tgid7", "tgiv7",</div><div class='add'>+                        "tgia8", "tgib8", "tgic8", "tgid8", "tgiv8", "tgiu8";</div><div class='add'>+      clocks = &lt;&amp;cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3&gt;;</div><div class='add'>+      power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+      resets = &lt;&amp;cpg R9A07G044_MTU_X_PRESET_MTU3&gt;;</div><div class='add'>+      #pwm-cells = &lt;2&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml<br/>index c57169118b68..a67e427a9e7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,tmu.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/renesas,tmu.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/renesas,tmu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/renesas,tmu.yaml</a></div><div class='hunk'>@@ -37,6 +37,8 @@ properties:</div><div class='ctx'>           - renesas,tmu-r8a77990 # R-Car E3</div><div class='ctx'>           - renesas,tmu-r8a77995 # R-Car D3</div><div class='ctx'>           - renesas,tmu-r8a779a0 # R-Car V3U</div><div class='add'>+          - renesas,tmu-r8a779f0 # R-Car S4-8</div><div class='add'>+          - renesas,tmu-r8a779g0 # R-Car V4H</div><div class='ctx'>       - const: renesas,tmu</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/riscv,timer.yaml b/Documentation/devicetree/bindings/timer/riscv,timer.yaml<br/>new file mode 100644<br/>index 000000000000..38d67e1a5a79<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/riscv,timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/riscv,timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/riscv,timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: RISC-V timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Anup Patel &lt;anup@brainfault.org&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  RISC-V platforms always have a RISC-V timer device for the supervisor-mode</div><div class='add'>+  based on the time CSR defined by the RISC-V privileged specification. The</div><div class='add'>+  timer interrupts of this device are configured using the RISC-V SBI Time</div><div class='add'>+  extension or the RISC-V Sstc extension.</div><div class='add'>+</div><div class='add'>+  The clock frequency of RISC-V timer device is specified via the</div><div class='add'>+  "timebase-frequency" DT property of "/cpus" DT node which is described</div><div class='add'>+  in Documentation/devicetree/bindings/riscv/cpus.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - riscv,timer</div><div class='add'>+</div><div class='add'>+  interrupts-extended:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4096   # Should be enough?</div><div class='add'>+</div><div class='add'>+  riscv,timer-cannot-wake-cpu:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If present, the timer interrupt cannot wake up the CPU from one or</div><div class='add'>+      more suspend/idle states.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts-extended</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer {</div><div class='add'>+      compatible = "riscv,timer";</div><div class='add'>+      interrupts-extended = &lt;&amp;cpu1intc 5&gt;,</div><div class='add'>+                            &lt;&amp;cpu2intc 5&gt;,</div><div class='add'>+                            &lt;&amp;cpu3intc 5&gt;,</div><div class='add'>+                            &lt;&amp;cpu4intc 5&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml b/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml<br/>index 5d157d87dad5..19e56b7577a0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/rockchip,rk-timer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/rockchip,rk-timer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Rockchip Timer Device Tree Bindings</div><div class='add'>+title: Rockchip Timer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;</div><div class='hunk'>@@ -17,12 +17,14 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - rockchip,rv1108-timer</div><div class='add'>+              - rockchip,rv1126-timer</div><div class='ctx'>               - rockchip,rk3036-timer</div><div class='add'>+              - rockchip,rk3128-timer</div><div class='ctx'>               - rockchip,rk3188-timer</div><div class='ctx'>               - rockchip,rk3228-timer</div><div class='ctx'>               - rockchip,rk3229-timer</div><div class='del'>-              - rockchip,rk3288-timer</div><div class='ctx'>               - rockchip,rk3368-timer</div><div class='add'>+              - rockchip,rk3588-timer</div><div class='ctx'>               - rockchip,px30-timer</div><div class='ctx'>           - const: rockchip,rk3288-timer</div><div class='ctx'>   reg:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml b/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml<br/>index f11cbc7ccc14..829bd2227f7c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/samsung,exynos4210-mct.yaml</a></div><div class='hunk'>@@ -19,22 +19,46 @@ description: |+</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - samsung,exynos4210-mct</div><div class='del'>-      - samsung,exynos4412-mct</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - samsung,exynos4210-mct</div><div class='add'>+          - samsung,exynos4412-mct</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - axis,artpec8-mct</div><div class='add'>+              - samsung,exynos3250-mct</div><div class='add'>+              - samsung,exynos5250-mct</div><div class='add'>+              - samsung,exynos5260-mct</div><div class='add'>+              - samsung,exynos5420-mct</div><div class='add'>+              - samsung,exynos5433-mct</div><div class='add'>+              - samsung,exynos850-mct</div><div class='add'>+              - tesla,fsd-mct</div><div class='add'>+          - const: samsung,exynos4210-mct</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='del'>-      - pattern: "^(fin_pll|mct)$"</div><div class='del'>-      - pattern: "^(fin_pll|mct)$"</div><div class='add'>+      - const: fin_pll</div><div class='add'>+      - const: mct</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  samsung,frc-shared:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: |</div><div class='add'>+      Indicates that the hardware requires that this processor share the</div><div class='add'>+      free-running counter with a different (main) processor.</div><div class='add'>+</div><div class='add'>+  samsung,local-timers:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 16</div><div class='add'>+    description: |</div><div class='add'>+      List of indices of local timers usable from this processor.</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     description: |</div><div class='ctx'>       Interrupts should be put in specific order. This is, the local timer</div><div class='hunk'>@@ -63,6 +87,68 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - axis,artpec8-mct</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        samsung,local-timers: false</div><div class='add'>+        samsung,frc-shared: false</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos3250-mct</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 8</div><div class='add'>+          maxItems: 8</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: samsung,exynos5250-mct</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 6</div><div class='add'>+          maxItems: 6</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - axis,artpec8-mct</div><div class='add'>+              - samsung,exynos5260-mct</div><div class='add'>+              - samsung,exynos5420-mct</div><div class='add'>+              - samsung,exynos5433-mct</div><div class='add'>+              - samsung,exynos850-mct</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 12</div><div class='add'>+          maxItems: 12</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - tesla,fsd-mct</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 16</div><div class='add'>+          maxItems: 16</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/sifive,clint.yaml b/Documentation/devicetree/bindings/timer/sifive,clint.yaml<br/>index e64f46339079..94bef9424df1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/sifive,clint.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/sifive,clint.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/sifive,clint.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/sifive,clint.yaml</a></div><div class='hunk'>@@ -20,14 +20,29 @@ description:</div><div class='ctx'>   property of "/cpus" DT node. The "timebase-frequency" DT property is</div><div class='ctx'>   described in Documentation/devicetree/bindings/riscv/cpus.yaml</div><div class='ctx'> </div><div class='add'>+  T-Head C906/C910 CPU cores include an implementation of CLINT too, however</div><div class='add'>+  their implementation lacks a memory-mapped MTIME register, thus not</div><div class='add'>+  compatible with SiFive ones.</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - sifive,fu540-c000-clint</div><div class='del'>-          - starfive,jh7100-clint</div><div class='del'>-          - canaan,k210-clint</div><div class='del'>-      - const: sifive,clint0</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - sifive,fu540-c000-clint</div><div class='add'>+              - starfive,jh7100-clint</div><div class='add'>+              - starfive,jh7110-clint</div><div class='add'>+              - canaan,k210-clint</div><div class='add'>+          - const: sifive,clint0</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - allwinner,sun20i-d1-clint</div><div class='add'>+          - const: thead,c900-clint</div><div class='add'>+      - items:</div><div class='add'>+          - const: sifive,clint0</div><div class='add'>+          - const: riscv,clint0</div><div class='add'>+        deprecated: true</div><div class='add'>+        description: For the QEMU virt machine only</div><div class='ctx'> </div><div class='ctx'>     description:</div><div class='ctx'>       Should be "&lt;vendor&gt;,&lt;chip&gt;-clint" and "sifive,clint&lt;version&gt;".</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml b/Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml<br/>new file mode 100644<br/>index 000000000000..fa65878b3571<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/st,nomadik-mtu.yaml</a></div><div class='hunk'>@@ -0,0 +1,58 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Linaro Ltd.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/st,nomadik-mtu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ST Microelectronics Nomadik Multi-Timer Unit MTU Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: This timer is found in the ST Microelectronics Nomadik</div><div class='add'>+  SoCs STn8800, STn8810 and STn8815 as well as in ST-Ericsson DB8500.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: st,nomadik-mtu</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: The first clock named TIMCLK clocks the actual timers and</div><div class='add'>+      the second clock clocks the digital interface to the interconnect.</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: timclk</div><div class='add'>+      - const: apb_pclk</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/mfd/dbx500-prcmu.h&gt;</div><div class='add'>+    timer@a03c6000 {</div><div class='add'>+      compatible = "st,nomadik-mtu";</div><div class='add'>+      reg = &lt;0xa03c6000 0x1000&gt;;</div><div class='add'>+      interrupts = &lt;GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+      clocks = &lt;&amp;prcmu_clk PRCMU_TIMCLK&gt;, &lt;&amp;prcc_pclk 6 6&gt;;</div><div class='add'>+      clock-names = "timclk", "apb_pclk";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml b/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml<br/>index 937aa8a56366..9ec11537620a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/st,stm32-timer.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/st,stm32-timer.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/timer/st,stm32-timer.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers bindings</div><div class='add'>+title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml b/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml<br/>new file mode 100644<br/>index 000000000000..acbb6f8997ee<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/ti,timer-dm.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/ti,timer-dm.yaml</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI dual-mode timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Tony Lindgren &lt;tony@atomide.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The TI dual-mode timer is a general purpose timer with PWM capabilities.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - ti,am335x-timer</div><div class='add'>+              - ti,am335x-timer-1ms</div><div class='add'>+              - ti,am654-timer</div><div class='add'>+              - ti,dm814-timer</div><div class='add'>+              - ti,dm816-timer</div><div class='add'>+              - ti,omap2420-timer</div><div class='add'>+              - ti,omap3430-timer</div><div class='add'>+              - ti,omap4430-timer</div><div class='add'>+              - ti,omap5430-timer</div><div class='add'>+      - items:</div><div class='add'>+          - const: ti,am4372-timer</div><div class='add'>+          - const: ti,am335x-timer</div><div class='add'>+      - items:</div><div class='add'>+          - const: ti,am4372-timer-1ms</div><div class='add'>+          - const: ti,am335x-timer-1ms</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: IO address</div><div class='add'>+      - description: L3 to L4 mapping for omap4/5 L4 ABE</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Functional clock</div><div class='add'>+      - description: System clock for omap4/5 and dra7</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fck</div><div class='add'>+      - const: timer_sys_ck</div><div class='add'>+    minItems: 1</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    description:</div><div class='add'>+      Power domain if available</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    description:</div><div class='add'>+      Interrupt if available. The timer PWM features may be usable</div><div class='add'>+      in a limited way even without interrupts.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ti,timer-alwon:</div><div class='add'>+    description:</div><div class='add'>+      Timer is always enabled when the SoC is powered. Note that some SoCs like</div><div class='add'>+      am335x can suspend to PM coprocessor RTC only mode and in that case the</div><div class='add'>+      SoC power is cut including timers.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  ti,timer-dsp:</div><div class='add'>+    description:</div><div class='add'>+      Timer is routable to the DSP in addition to the operating system.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  ti,timer-pwm:</div><div class='add'>+    description:</div><div class='add'>+      Timer has been wired for PWM capability.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  ti,timer-secure:</div><div class='add'>+    description:</div><div class='add'>+      Timer access has been limited to secure mode only.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  ti,hwmods:</div><div class='add'>+    description:</div><div class='add'>+      Name of the HWMOD associated with timer. This is for legacy</div><div class='add'>+      omap2/3 platforms only.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: ti,am654-timer</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - power-domains</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - ti,omap3430-timer</div><div class='add'>+                - ti,omap4430-timer</div><div class='add'>+                - ti,omap5430-timer</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        reg:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+        clock-names:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - ti,dm814-timer</div><div class='add'>+              - ti,dm816-timer</div><div class='add'>+              - ti,omap2420-timer</div><div class='add'>+              - ti,omap3430-timer</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        ti,hwmods:</div><div class='add'>+          items:</div><div class='add'>+            - pattern: "^timer([1-9]|1[0-2])$"</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        ti,hwmods: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer1: timer@0 {</div><div class='add'>+      compatible = "ti,am335x-timer-1ms";</div><div class='add'>+      reg = &lt;0x0 0x400&gt;;</div><div class='add'>+      interrupts = &lt;67&gt;;</div><div class='add'>+      ti,timer-alwon;</div><div class='add'>+      clocks = &lt;&amp;timer1_fck&gt;;</div><div class='add'>+      clock-names = "fck";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/ti,timer.txt b/Documentation/devicetree/bindings/timer/ti,timer.txt<br/>deleted file mode 100644<br/>index d02e27c764ec..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/ti,timer.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/timer/ti,timer.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,44 +0,0 @@</div><div class='del'>-OMAP Timer bindings</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:		Should be set to one of the below. Please note that</div><div class='del'>-			OMAP44xx devices have timer instances that are 100%</div><div class='del'>-			register compatible with OMAP3xxx devices as well as</div><div class='del'>-			newer timers that are not 100% register compatible.</div><div class='del'>-			So for OMAP44xx devices timer instances may use</div><div class='del'>-			different compatible strings.</div><div class='del'>-</div><div class='del'>-			ti,omap2420-timer (applicable to OMAP24xx devices)</div><div class='del'>-			ti,omap3430-timer (applicable to OMAP3xxx/44xx devices)</div><div class='del'>-			ti,omap4430-timer (applicable to OMAP44xx devices)</div><div class='del'>-			ti,omap5430-timer (applicable to OMAP543x devices)</div><div class='del'>-			ti,am335x-timer	(applicable to AM335x devices)</div><div class='del'>-			ti,am335x-timer-1ms (applicable to AM335x devices)</div><div class='del'>-</div><div class='del'>-- reg:			Contains timer register address range (base address and</div><div class='del'>-			length).</div><div class='del'>-- interrupts: 		Contains the interrupt information for the timer. The</div><div class='del'>-			format is being dependent on which interrupt controller</div><div class='del'>-			the OMAP device uses.</div><div class='del'>-- ti,hwmods:		Name of the hwmod associated to the timer, "timer&lt;X&gt;",</div><div class='del'>-			where &lt;X&gt; is the instance number of the timer from the</div><div class='del'>-			HW spec.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- ti,timer-alwon:	Indicates the timer is in an alway-on power domain.</div><div class='del'>-- ti,timer-dsp:		Indicates the timer can interrupt the on-chip DSP in</div><div class='del'>-			addition to the ARM CPU.</div><div class='del'>-- ti,timer-pwm: 	Indicates the timer can generate a PWM output.</div><div class='del'>-- ti,timer-secure: 	Indicates the timer is reserved on a secure OMAP device</div><div class='del'>-			and therefore cannot be used by the kernel.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-timer12: timer@48304000 {</div><div class='del'>-	compatible = "ti,omap3430-timer";</div><div class='del'>-	reg = &lt;0x48304000 0x400&gt;;</div><div class='del'>-	interrupts = &lt;95&gt;;</div><div class='del'>-	ti,hwmods = "timer12"</div><div class='del'>-	ti,timer-alwon;</div><div class='del'>-	ti,timer-secure;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml b/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml<br/>new file mode 100644<br/>index 000000000000..b1597db04263<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timer/xlnx,xps-timer.yaml</a></div><div class='hunk'>@@ -0,0 +1,92 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timer/xlnx,xps-timer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx LogiCORE IP AXI Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sean Anderson &lt;sean.anderson@seco.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    contains:</div><div class='add'>+      const: xlnx,xps-timer-1.00.a</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: s_axi_aclk</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#pwm-cells': true</div><div class='add'>+</div><div class='add'>+  xlnx,count-width:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [8, 16, 32]</div><div class='add'>+    default: 32</div><div class='add'>+    description:</div><div class='add'>+      The width of the counter(s), in bits.</div><div class='add'>+</div><div class='add'>+  xlnx,one-timer-only:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [ 0, 1 ]</div><div class='add'>+    description:</div><div class='add'>+      Whether only one timer is present in this block.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - xlnx,one-timer-only</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - '#pwm-cells'</div><div class='add'>+    then:</div><div class='add'>+      allOf:</div><div class='add'>+        - required:</div><div class='add'>+            - clocks</div><div class='add'>+        - properties:</div><div class='add'>+            xlnx,one-timer-only:</div><div class='add'>+              const: 0</div><div class='add'>+    else:</div><div class='add'>+      required:</div><div class='add'>+        - interrupts</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - clocks</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    timer@800e0000 {</div><div class='add'>+        clock-names = "s_axi_aclk";</div><div class='add'>+        clocks = &lt;&amp;zynqmp_clk 71&gt;;</div><div class='add'>+        compatible = "xlnx,xps-timer-1.00.a";</div><div class='add'>+        reg = &lt;0x800e0000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;0 39 2&gt;;</div><div class='add'>+        xlnx,count-width = &lt;16&gt;;</div><div class='add'>+        xlnx,one-timer-only = &lt;0x0&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    timer@800f0000 {</div><div class='add'>+        #pwm-cells = &lt;0&gt;;</div><div class='add'>+        clock-names = "s_axi_aclk";</div><div class='add'>+        clocks = &lt;&amp;zynqmp_clk 71&gt;;</div><div class='add'>+        compatible = "xlnx,xps-timer-1.00.a";</div><div class='add'>+        reg = &lt;0x800e0000 0x10000&gt;;</div><div class='add'>+        xlnx,count-width = &lt;32&gt;;</div><div class='add'>+        xlnx,one-timer-only = &lt;0x0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timestamp/hardware-timestamps-common.yaml b/Documentation/devicetree/bindings/timestamp/hardware-timestamps-common.yaml<br/>new file mode 100644<br/>index 000000000000..fd6a7b51f571<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timestamp/hardware-timestamps-common.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timestamp/hardware-timestamps-common.yaml</a></div><div class='hunk'>@@ -0,0 +1,29 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timestamp/hardware-timestamps-common.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Hardware timestamp providers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dipen Patel &lt;dipenp@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Some devices/SoCs have hardware timestamp engines (HTE) which can use</div><div class='add'>+  hardware means to timestamp entity in realtime. The entity could be anything</div><div class='add'>+  from GPIOs, IRQs, Bus and so on. The hardware timestamp engine present</div><div class='add'>+  itself as a provider with the bindings described in this document.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^timestamp(@.*|-[0-9a-f])?$"</div><div class='add'>+</div><div class='add'>+  "#timestamp-cells":</div><div class='add'>+    description:</div><div class='add'>+      Number of cells in a HTE specifier.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - "#timestamp-cells"</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml b/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml<br/>new file mode 100644<br/>index 000000000000..5142d6d4fc0a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timestamp/hte-consumer.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timestamp/hte-consumer.yaml</a></div><div class='hunk'>@@ -0,0 +1,39 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timestamp/hte-consumer.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: HTE Consumer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dipen Patel &lt;dipenp@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+select: true</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  timestamps:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    description:</div><div class='add'>+      The list of HTE provider phandle. The first cell must represent the</div><div class='add'>+      provider phandle followed by the line identifiers. The meaning of the</div><div class='add'>+      line identifier and exact number of arguments must be specified in the</div><div class='add'>+      HTE provider device tree binding document.</div><div class='add'>+</div><div class='add'>+  timestamp-names:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string-array</div><div class='add'>+    description:</div><div class='add'>+      An optional string property to label each line specifier present in the</div><div class='add'>+      timestamp property.</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  timestamp-names: [ timestamps ]</div><div class='add'>+</div><div class='add'>+additionalProperties: true</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    hte_tegra_consumer {</div><div class='add'>+              timestamps = &lt;&amp;tegra_hte_aon 0x9&gt;, &lt;&amp;tegra_hte_lic 0x19&gt;;</div><div class='add'>+              timestamp-names = "hte-gpio", "hte-i2c";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml b/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml<br/>new file mode 100644<br/>index 000000000000..456797967adc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml</a></div><div class='hunk'>@@ -0,0 +1,140 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Tegra on chip generic hardware timestamping engine (HTE) provider</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dipen Patel &lt;dipenp@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  Tegra SoC has two instances of generic hardware timestamping engines (GTE)</div><div class='add'>+  known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip</div><div class='add'>+  IRQ lines for the state change respectively, upon detection it will record</div><div class='add'>+  timestamp (taken from system counter) in its internal hardware FIFO. It has</div><div class='add'>+  a bitmap array arranged in 32bit slices where each bit represent signal/line</div><div class='add'>+  to enable or disable for the hardware timestamping. The GTE GPIO monitors</div><div class='add'>+  GPIO lines from the AON (always on) GPIO controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,tegra194-gte-aon</div><div class='add'>+      - nvidia,tegra194-gte-lic</div><div class='add'>+      - nvidia,tegra234-gte-aon</div><div class='add'>+      - nvidia,tegra234-gte-lic</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,int-threshold:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      HTE device generates its interrupt based on this u32 FIFO threshold</div><div class='add'>+      value. The recommended value is 1.</div><div class='add'>+    minimum: 1</div><div class='add'>+    maximum: 256</div><div class='add'>+</div><div class='add'>+  nvidia,slices:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    deprecated: true</div><div class='add'>+    description:</div><div class='add'>+      HTE lines are arranged in 32 bit slice where each bit represents different</div><div class='add'>+      line/signal that it can enable/configure for the timestamp. It is u32</div><div class='add'>+      property and the value depends on the HTE instance in the chip. The AON</div><div class='add'>+      GTE instances for both Tegra194 and Tegra234 has 3 slices. The Tegra194</div><div class='add'>+      LIC instance has 11 slices and Tegra234 LIC has 17 slices.</div><div class='add'>+    enum: [3, 11, 17]</div><div class='add'>+</div><div class='add'>+  nvidia,gpio-controller:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      The phandle to AON gpio controller instance. This is required to handle</div><div class='add'>+      namespace conversion between GPIO and GTE.</div><div class='add'>+</div><div class='add'>+  '#timestamp-cells':</div><div class='add'>+    description:</div><div class='add'>+      This represents number of line id arguments as specified by the</div><div class='add'>+      consumers. For the GTE IRQ, this is IRQ number as mentioned in the</div><div class='add'>+      SoC technical reference manual. For the GTE GPIO, its value is same as</div><div class='add'>+      mentioned in the nvidia GPIO device tree binding document.</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - "#timestamp-cells"</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra194-gte-aon</div><div class='add'>+              - nvidia,tegra234-gte-aon</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,slices:</div><div class='add'>+          const: 3</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra194-gte-lic</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,slices:</div><div class='add'>+          const: 11</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra234-gte-lic</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        nvidia,slices:</div><div class='add'>+          const: 17</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra234-gte-aon</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - nvidia,gpio-controller</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    tegra_hte_aon: timestamp@c1e0000 {</div><div class='add'>+              compatible = "nvidia,tegra194-gte-aon";</div><div class='add'>+              reg = &lt;0xc1e0000 0x10000&gt;;</div><div class='add'>+              interrupts = &lt;0 13 0x4&gt;;</div><div class='add'>+              nvidia,int-threshold = &lt;1&gt;;</div><div class='add'>+              #timestamp-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    tegra_hte_lic: timestamp@3aa0000 {</div><div class='add'>+              compatible = "nvidia,tegra194-gte-lic";</div><div class='add'>+              reg = &lt;0x3aa0000 0x10000&gt;;</div><div class='add'>+              interrupts = &lt;0 11 0x4&gt;;</div><div class='add'>+              nvidia,int-threshold = &lt;1&gt;;</div><div class='add'>+              #timestamp-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml<br/>index 550a2e5c9e05..246863a9bc7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/trivial-devices.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/trivial-devices.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/trivial-devices.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/trivial-devices.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/trivial-devices.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Trivial I2C and SPI devices that have simple device tree bindings</div><div class='add'>+title: Trivial I2C and SPI devices</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='hunk'>@@ -29,6 +29,8 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='add'>+            # Acbel fsg032 power supply</div><div class='add'>+          - acbel,fsg032</div><div class='ctx'>             # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin</div><div class='ctx'>           - ad,ad7414</div><div class='ctx'>             # ADM9240: Complete System Hardware Monitor for uProcessor-Based Systems</div><div class='hunk'>@@ -41,13 +43,17 @@ properties:</div><div class='ctx'>           - adi,adp5585-02</div><div class='ctx'>             # Analog Devices ADP5589 Keypad Decoder and I/O Expansion</div><div class='ctx'>           - adi,adp5589</div><div class='add'>+            # Analog Devices LT7182S Dual Channel 6A, 20V PolyPhase Step-Down Silent Switcher</div><div class='add'>+          - adi,lt7182s</div><div class='ctx'>             # AMS iAQ-Core VOC Sensor</div><div class='ctx'>           - ams,iaq-core</div><div class='ctx'>             # i2c serial eeprom (24cxx)</div><div class='ctx'>           - at,24c08</div><div class='ctx'>             # i2c trusted platform module (TPM)</div><div class='ctx'>           - atmel,at97sc3204t</div><div class='del'>-            # i2c h/w symmetric crypto module</div><div class='add'>+            # ATSHA204 - i2c h/w symmetric crypto module</div><div class='add'>+          - atmel,atsha204</div><div class='add'>+            # ATSHA204A - i2c h/w symmetric crypto module</div><div class='ctx'>           - atmel,atsha204a</div><div class='ctx'>             # i2c h/w elliptic curve crypto module</div><div class='ctx'>           - atmel,atecc508a</div><div class='hunk'>@@ -61,6 +67,8 @@ properties:</div><div class='ctx'>           - capella,cm3232</div><div class='ctx'>             # CM3323: Ambient Light Sensor</div><div class='ctx'>           - capella,cm3323</div><div class='add'>+            # Cisco SPI Petra</div><div class='add'>+          - cisco,spi-petra</div><div class='ctx'>             # High-Precision Digital Thermometer</div><div class='ctx'>           - dallas,ds1631</div><div class='ctx'>             # Total-Elapsed-Time Recorder with Alarm</div><div class='hunk'>@@ -87,10 +95,10 @@ properties:</div><div class='ctx'>           - devantech,srf08</div><div class='ctx'>             # Devantech SRF10 ultrasonic ranger</div><div class='ctx'>           - devantech,srf10</div><div class='add'>+            # DH electronics GmbH on-board CPLD trivial SPI device</div><div class='add'>+          - dh,dhcom-board</div><div class='ctx'>             # DA9053: flexible system level PMIC with multicore support</div><div class='ctx'>           - dlg,da9053</div><div class='del'>-            # DA9063: system PMIC for quad-core application processors</div><div class='del'>-          - dlg,da9063</div><div class='ctx'>             # DMARD05: 3-axis I2C Accelerometer</div><div class='ctx'>           - domintech,dmard05</div><div class='ctx'>             # DMARD06: 3-axis I2C Accelerometer</div><div class='hunk'>@@ -135,6 +143,10 @@ properties:</div><div class='ctx'>           - infineon,slb9635tt</div><div class='ctx'>             # Infineon SLB9645 I2C TPM (new protocol, max 400khz)</div><div class='ctx'>           - infineon,slb9645tt</div><div class='add'>+            # Infineon SLB9673 I2C TPM 2.0</div><div class='add'>+          - infineon,slb9673</div><div class='add'>+            # Infineon TDA38640 Voltage Regulator</div><div class='add'>+          - infineon,tda38640</div><div class='ctx'>             # Infineon TLV493D-A1B6 I2C 3D Magnetic Sensor</div><div class='ctx'>           - infineon,tlv493d-a1b6</div><div class='ctx'>             # Infineon Multi-phase Digital VR Controller xdpe11280</div><div class='hunk'>@@ -143,6 +155,10 @@ properties:</div><div class='ctx'>           - infineon,xdpe12254</div><div class='ctx'>             # Infineon Multi-phase Digital VR Controller xdpe12284</div><div class='ctx'>           - infineon,xdpe12284</div><div class='add'>+            # Infineon Multi-phase Digital VR Controller xdpe15284</div><div class='add'>+          - infineon,xdpe15284</div><div class='add'>+            # Infineon Multi-phase Digital VR Controller xdpe152c4</div><div class='add'>+          - infineon,xdpe152c4</div><div class='ctx'>             # Injoinic IP5108 2.0A Power Bank IC with I2C</div><div class='ctx'>           - injoinic,ip5108</div><div class='ctx'>             # Injoinic IP5109 2.1A Power Bank IC with I2C</div><div class='hunk'>@@ -159,6 +175,8 @@ properties:</div><div class='ctx'>           - isil,isl29030</div><div class='ctx'>             # Intersil ISL68137 Digital Output Configurable PWM Controller</div><div class='ctx'>           - isil,isl68137</div><div class='add'>+            # Linear Technology LTC2488</div><div class='add'>+          - lineartechnology,ltc2488</div><div class='ctx'>             # 5 Bit Programmable, Pulse-Width Modulator</div><div class='ctx'>           - maxim,ds1050</div><div class='ctx'>             # 10 kOhm digital potentiometer with I2C interface</div><div class='hunk'>@@ -215,6 +233,10 @@ properties:</div><div class='ctx'>           - memsic,mxc6255</div><div class='ctx'>             # MEMSIC 3-axis accelerometer</div><div class='ctx'>           - memsic,mxc6655</div><div class='add'>+            # Menlo on-board CPLD trivial SPI device</div><div class='add'>+          - menlo,m53cpld</div><div class='add'>+            # Micron SPI NOR Authenta</div><div class='add'>+          - micron,spi-authenta</div><div class='ctx'>             # Microchip differential I2C ADC, 1 Channel, 18 bit</div><div class='ctx'>           - microchip,mcp3421</div><div class='ctx'>             # Microchip differential I2C ADC, 2 Channel, 18 bit</div><div class='hunk'>@@ -293,10 +315,14 @@ properties:</div><div class='ctx'>           - pulsedlight,lidar-lite-v2</div><div class='ctx'>             # Renesas ISL29501 time-of-flight sensor</div><div class='ctx'>           - renesas,isl29501</div><div class='add'>+            # Rohm DH2228FV</div><div class='add'>+          - rohm,dh2228fv</div><div class='ctx'>             # S524AD0XF1 (128K/256K-bit Serial EEPROM for Low Power)</div><div class='ctx'>           - samsung,24ad0xd1</div><div class='ctx'>             # Samsung Exynos SoC SATA PHY I2C device</div><div class='ctx'>           - samsung,exynos-sataphy-i2c</div><div class='add'>+            # Semtech sx1301 baseband processor</div><div class='add'>+          - semtech,sx1301</div><div class='ctx'>             # Sensirion low power multi-pixel gas sensor with I2C interface</div><div class='ctx'>           - sensirion,sgpc3</div><div class='ctx'>             # Sensirion multi-pixel gas sensor with I2C interface</div><div class='hunk'>@@ -311,6 +337,10 @@ properties:</div><div class='ctx'>           - sensortek,stk8ba50</div><div class='ctx'>             # SGX Sensortech VZ89X Sensors</div><div class='ctx'>           - sgx,vz89x</div><div class='add'>+            # Silicon Labs EM3581 Zigbee SoC with SPI interface</div><div class='add'>+          - silabs,em3581</div><div class='add'>+            # Silicon Labs SI3210 Programmable CMOS SLIC/CODEC with SPI interface</div><div class='add'>+          - silabs,si3210</div><div class='ctx'>             # Relative Humidity and Temperature Sensors</div><div class='ctx'>           - silabs,si7020</div><div class='ctx'>             # Skyworks SKY81452: Six-Channel White LED Driver with Touch Panel Bias Supply</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml b/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml<br/>index d227dea368be..835e17269d2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml</a></div><div class='hunk'>@@ -43,9 +43,14 @@ properties:</div><div class='ctx'>       - const: phy_clk</div><div class='ctx'>       - const: ref_clk</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml<br/>index dcd32c10205a..c5a06c048389 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/qcom,ufs.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ufs/qcom,ufs.yaml</a></div><div class='hunk'>@@ -26,12 +26,14 @@ properties:</div><div class='ctx'>           - qcom,msm8994-ufshc</div><div class='ctx'>           - qcom,msm8996-ufshc</div><div class='ctx'>           - qcom,msm8998-ufshc</div><div class='add'>+          - qcom,sc8280xp-ufshc</div><div class='ctx'>           - qcom,sdm845-ufshc</div><div class='ctx'>           - qcom,sm6350-ufshc</div><div class='ctx'>           - qcom,sm8150-ufshc</div><div class='ctx'>           - qcom,sm8250-ufshc</div><div class='ctx'>           - qcom,sm8350-ufshc</div><div class='ctx'>           - qcom,sm8450-ufshc</div><div class='add'>+          - qcom,sm8550-ufshc</div><div class='ctx'>       - const: qcom,ufshc</div><div class='ctx'>       - const: jedec,ufs-2.0</div><div class='ctx'> </div><div class='hunk'>@@ -43,6 +45,8 @@ properties:</div><div class='ctx'>     minItems: 8</div><div class='ctx'>     maxItems: 11</div><div class='ctx'> </div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='ctx'>   interconnects:</div><div class='ctx'>     minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='hunk'>@@ -70,6 +74,9 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='add'>+  required-opps:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   resets:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -98,9 +105,11 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - qcom,msm8998-ufshc</div><div class='add'>+              - qcom,sc8280xp-ufshc</div><div class='ctx'>               - qcom,sm8250-ufshc</div><div class='ctx'>               - qcom,sm8350-ufshc</div><div class='ctx'>               - qcom,sm8450-ufshc</div><div class='add'>+              - qcom,sm8550-ufshc</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml b/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml<br/>new file mode 100644<br/>index 000000000000..f04f9f61fa9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/renesas,ufs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ufs/renesas,ufs.yaml</a></div><div class='hunk'>@@ -0,0 +1,61 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas R-Car UFS Host Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ufs-common.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: renesas,r8a779f0-ufs</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: fck</div><div class='add'>+      - const: ref_clk</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r8a779f0-cpg-mssr.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/r8a779f0-sysc.h&gt;</div><div class='add'>+</div><div class='add'>+    ufs: ufs@e686000 {</div><div class='add'>+            compatible = "renesas,r8a779f0-ufs";</div><div class='add'>+            reg = &lt;0xe6860000 0x100&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+            clocks = &lt;&amp;cpg CPG_MOD 1514&gt;, &lt;&amp;ufs30_clk&gt;;</div><div class='add'>+            clock-names = "fck", "ref_clk";</div><div class='add'>+            freq-table-hz = &lt;200000000 200000000&gt;, &lt;38400000 38400000&gt;;</div><div class='add'>+            power-domains = &lt;&amp;sysc R8A779F0_PD_ALWAYS_ON&gt;;</div><div class='add'>+            resets = &lt;&amp;cpg 1514&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml b/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml<br/>index c949eb617313..a9988798898d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ufs/samsung,exynos-ufs.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Samsung SoC series UFS host controller Device Tree Bindings</div><div class='add'>+title: Samsung SoC series UFS host controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Alim Akhtar &lt;alim.akhtar@samsung.com&gt;</div><div class='hunk'>@@ -21,6 +21,7 @@ properties:</div><div class='ctx'>       - samsung,exynos7-ufs</div><div class='ctx'>       - samsung,exynosautov9-ufs</div><div class='ctx'>       - samsung,exynosautov9-ufs-vh</div><div class='add'>+      - tesla,fsd-ufs</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/ufs/sprd,ums9620-ufs.yaml b/Documentation/devicetree/bindings/ufs/sprd,ums9620-ufs.yaml<br/>new file mode 100644<br/>index 000000000000..36a8ae77949f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/ufs/sprd,ums9620-ufs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/ufs/sprd,ums9620-ufs.yaml</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Unisoc Universal Flash Storage (UFS) Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Zhe Wang &lt;zhe.wang1@unisoc.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: ufs-common.yaml</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sprd,ums9620-ufs</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 3</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: controller_eb</div><div class='add'>+      - const: cfg_eb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: controller</div><div class='add'>+      - const: device</div><div class='add'>+</div><div class='add'>+  vdd-mphy-supply:</div><div class='add'>+    description:</div><div class='add'>+      Phandle to vdd-mphy supply regulator node.</div><div class='add'>+</div><div class='add'>+  sprd,ufs-anlg-syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle of syscon used to control ufs analog regs.</div><div class='add'>+</div><div class='add'>+  sprd,aon-apb-syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle of syscon used to control always-on regs.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    ufs: ufs@22000000 {</div><div class='add'>+        compatible = "sprd,ums9620-ufs";</div><div class='add'>+        reg = &lt;0x22000000 0x3000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        vcc-supply = &lt;&amp;vddemmccore&gt;;</div><div class='add'>+        vdd-mphy-supply = &lt;&amp;vddufs1v2&gt;;</div><div class='add'>+        clocks = &lt;&amp;apahb_gate 5&gt;, &lt;&amp;apahb_gate 22&gt;, &lt;&amp;aonapb_clk 52&gt;;</div><div class='add'>+        clock-names = "controller_eb", "cfg_eb", "core";</div><div class='add'>+        assigned-clocks = &lt;&amp;aonapb_clk 52&gt;;</div><div class='add'>+        assigned-clock-parents = &lt;&amp;g5l_pll 12&gt;;</div><div class='add'>+        resets = &lt;&amp;apahb_gate 4&gt;, &lt;&amp;aonapb_gate 69&gt;;</div><div class='add'>+        reset-names = "controller", "device";</div><div class='add'>+        sprd,ufs-anlg-syscon = &lt;&amp;anlg_phy_g12_regs&gt;;</div><div class='add'>+        sprd,aon-apb-syscon = &lt;&amp;aon_apb_regs&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml<br/>index 933fa356d2ce..f972ce976e86 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/allwinner,sun4i-a10-musb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 mUSB OTG Controller Device Tree Bindings</div><div class='add'>+title: Allwinner A10 mUSB OTG Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -13,13 +13,16 @@ maintainers:</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='del'>-      - const: allwinner,sun4i-a10-musb</div><div class='del'>-      - const: allwinner,sun6i-a31-musb</div><div class='del'>-      - const: allwinner,sun8i-a33-musb</div><div class='del'>-      - const: allwinner,sun8i-h3-musb</div><div class='add'>+      - enum:</div><div class='add'>+          - allwinner,sun4i-a10-musb</div><div class='add'>+          - allwinner,sun6i-a31-musb</div><div class='add'>+          - allwinner,sun8i-a33-musb</div><div class='add'>+          - allwinner,sun8i-h3-musb</div><div class='add'>+          - allwinner,suniv-f1c100s-musb</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - allwinner,sun8i-a83t-musb</div><div class='add'>+              - allwinner,sun20i-d1-musb</div><div class='ctx'>               - allwinner,sun50i-h6-musb</div><div class='ctx'>           - const: allwinner,sun8i-a33-musb</div><div class='ctx'>       - items:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/am33xx-usb.txt b/Documentation/devicetree/bindings/usb/am33xx-usb.txt<br/>index 7a198a30408a..654ffc62d013 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/am33xx-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/am33xx-usb.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/am33xx-usb.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/am33xx-usb.txt</a></div><div class='hunk'>@@ -61,8 +61,9 @@ DMA</div><div class='ctx'>   endpoint number (0 … 14 for endpoints 1 … 15 on instance 0 and 15 … 29</div><div class='ctx'>   for endpoints 1 … 15 on instance 1). The second number is 0 for RX and</div><div class='ctx'>   1 for TX transfers.</div><div class='del'>-- #dma-channels: should be set to 30 representing the 15 endpoints for</div><div class='add'>+- dma-channels: should be set to 30 representing the 15 endpoints for</div><div class='ctx'>   each USB instance.</div><div class='add'>+- #dma-channels: deprecated</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> ~~~~~~~~</div><div class='hunk'>@@ -193,7 +194,7 @@ usb: usb@47400000 {</div><div class='ctx'> 		interrupts = &lt;17&gt;;</div><div class='ctx'> 		interrupt-names = "glue";</div><div class='ctx'> 		#dma-cells = &lt;2&gt;;</div><div class='del'>-		#dma-channels = &lt;30&gt;;</div><div class='del'>-		#dma-requests = &lt;256&gt;;</div><div class='add'>+		dma-channels = &lt;30&gt;;</div><div class='add'>+		dma-requests = &lt;256&gt;;</div><div class='ctx'> 	};</div><div class='ctx'> };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml<br/>index e349fa5de606..da757c1155d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Amlogic Meson G12A DWC3 USB SoC Controller Glue</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3</div><div class='hunk'>@@ -108,6 +108,7 @@ allOf:</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         phy-names:</div><div class='add'>+          minItems: 2</div><div class='ctx'>           items:</div><div class='ctx'>             - const: usb2-phy0 # USB2 PHY0 if USBHOST_A port is used</div><div class='ctx'>             - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml b/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml<br/>new file mode 100644<br/>index 000000000000..e4d893369d57<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/analogix,anx7411.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/analogix,anx7411.yaml</a></div><div class='hunk'>@@ -0,0 +1,83 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/analogix,anx7411.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Analogix ANX7411 Type-C controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Xin Ji &lt;xji@analogixsemi.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - analogix,anx7411</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  connector:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: ../connector/usb-connector.yaml</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    description:</div><div class='add'>+      Properties for usb c connector.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      compatible:</div><div class='add'>+        const: usb-c-connector</div><div class='add'>+</div><div class='add'>+      power-role: true</div><div class='add'>+</div><div class='add'>+      data-role: true</div><div class='add'>+</div><div class='add'>+      try-power-role: true</div><div class='add'>+</div><div class='add'>+    required:</div><div class='add'>+      - compatible</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - connector</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        typec@2c {</div><div class='add'>+            compatible = "analogix,anx7411";</div><div class='add'>+            reg = &lt;0x2c&gt;;</div><div class='add'>+            interrupts = &lt;8 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio0&gt;;</div><div class='add'>+</div><div class='add'>+            typec_con: connector {</div><div class='add'>+                compatible = "usb-c-connector";</div><div class='add'>+                power-role = "dual";</div><div class='add'>+                data-role = "dual";</div><div class='add'>+                try-power-role = "source";</div><div class='add'>+</div><div class='add'>+                ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        typec_con_ep: endpoint {</div><div class='add'>+                            remote-endpoint = &lt;&amp;usbotg_hs_ep&gt;;</div><div class='add'>+                        };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/aspeed,ast2600-udc.yaml b/Documentation/devicetree/bindings/usb/aspeed,ast2600-udc.yaml<br/>new file mode 100644<br/>index 000000000000..c3b6be3d8002<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/aspeed,ast2600-udc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/aspeed,ast2600-udc.yaml</a></div><div class='hunk'>@@ -0,0 +1,52 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (c) 2020 Facebook Inc.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/aspeed,ast2600-udc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ASPEED USB 2.0 Device Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neal Liu &lt;neal_liu@aspeedtech.com&gt;</div><div class='add'>+</div><div class='add'>+description: |+</div><div class='add'>+  The ASPEED USB 2.0 Device Controller implements 1 control endpoint and</div><div class='add'>+  4 generic endpoints for AST260x.</div><div class='add'>+</div><div class='add'>+  Supports independent DMA channel for each generic endpoint.</div><div class='add'>+  Supports 32/256 stages descriptor mode for all generic endpoints.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - aspeed,ast2600-udc</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/aspeed-clock.h&gt;</div><div class='add'>+    udc: usb@1e6a2000 {</div><div class='add'>+        compatible = "aspeed,ast2600-udc";</div><div class='add'>+        reg = &lt;0x1e6a2000 0x300&gt;;</div><div class='add'>+        interrupts = &lt;9&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscon ASPEED_CLK_GATE_USBPORT2CLK&gt;;</div><div class='add'>+        pinctrl-names = "default";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_usb2bd_default&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml b/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml<br/>index 8b019ac05bbe..a86bcd95100e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/aspeed,usb-vhub.yaml</a></div><div class='hunk'>@@ -67,6 +67,7 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   vhub-strings:</div><div class='ctx'>     type: object</div><div class='add'>+    additionalProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       '#address-cells':</div><div class='hunk'>@@ -78,6 +79,7 @@ properties:</div><div class='ctx'>     patternProperties:</div><div class='ctx'>       '^string@[0-9a-f]+$':</div><div class='ctx'>         type: object</div><div class='add'>+        additionalProperties: false</div><div class='ctx'>         description: string descriptors of the specific language</div><div class='ctx'> </div><div class='ctx'>         properties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt<br/>index f512f0290728..12183ef47ee4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/atmel-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/atmel-usb.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/atmel-usb.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/atmel-usb.txt</a></div><div class='hunk'>@@ -87,6 +87,9 @@ Required properties:</div><div class='ctx'> 	       "atmel,at91sam9g45-udc"</div><div class='ctx'> 	       "atmel,sama5d3-udc"</div><div class='ctx'> 	       "microchip,sam9x60-udc"</div><div class='add'>+	       "microchip,lan9662-udc"</div><div class='add'>+	       For "microchip,lan9662-udc" the fallback "atmel,sama5d3-udc"</div><div class='add'>+	       is required.</div><div class='ctx'>  - reg: Address and length of the register set for the device</div><div class='ctx'>  - interrupts: Should contain usba interrupt</div><div class='ctx'>  - clocks: Should reference the peripheral and host clocks</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/brcm,bcm3384-usb.txt b/Documentation/devicetree/bindings/usb/brcm,bcm3384-usb.txt<br/>deleted file mode 100644<br/>index 452c45c7bf29..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/brcm,bcm3384-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/brcm,bcm3384-usb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,11 +0,0 @@</div><div class='del'>-* Broadcom USB controllers</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "brcm,bcm3384-ohci", "brcm,bcm3384-ehci"</div><div class='del'>-</div><div class='del'>-  These currently use the generic-ohci and generic-ehci drivers.  On some</div><div class='del'>-  systems, special handling may be needed in the following cases:</div><div class='del'>-</div><div class='del'>-  - Restoring state after systemwide power save modes</div><div class='del'>-  - Sharing PHYs with the USBD (UDC) hardware</div><div class='del'>-  - Figuring out which controllers are disabled on ASIC bondout variants</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml b/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml<br/>index 2a9acf2b5a64..1536cbec6334 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/brcm,bcm7445-ehci.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/brcm,bcm7445-ehci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom STB USB EHCI Controller Device Tree Bindings</div><div class='add'>+title: Broadcom STB USB EHCI Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "usb-hcd.yaml"</div><div class='add'>+  - $ref: usb-hcd.yaml</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Al Cooper &lt;alcooperx@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml b/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml<br/>index d4618d15ecc1..5cc81ced589d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/brcm,usb-pinmap.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Broadcom USB pin map Controller Device Tree Bindings</div><div class='add'>+title: Broadcom USB pin map Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Al Cooper &lt;alcooperx@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/cdns,usb3.yaml b/Documentation/devicetree/bindings/usb/cdns,usb3.yaml<br/>index dc9d6ed0781d..cae46c4982ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/cdns,usb3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/cdns,usb3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/cdns,usb3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/cdns,usb3.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/cdns,usb3.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Cadence USBSS-DRD controller bindings</div><div class='add'>+title: Cadence USBSS-DRD controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Pawel Laszczak &lt;pawell@cadence.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt<br/>deleted file mode 100644<br/>index a5c5db6a0b2d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,158 +0,0 @@</div><div class='del'>-* USB2 ChipIdea USB controller for ci13xxx</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of:</div><div class='del'>-	"fsl,imx23-usb"</div><div class='del'>-	"fsl,imx27-usb"</div><div class='del'>-	"fsl,imx28-usb"</div><div class='del'>-	"fsl,imx6q-usb"</div><div class='del'>-	"fsl,imx6sl-usb"</div><div class='del'>-	"fsl,imx6sx-usb"</div><div class='del'>-	"fsl,imx6ul-usb"</div><div class='del'>-	"fsl,imx7d-usb"</div><div class='del'>-	"fsl,imx7ulp-usb"</div><div class='del'>-	"lsi,zevio-usb"</div><div class='del'>-	"qcom,ci-hdrc"</div><div class='del'>-	"chipidea,usb2"</div><div class='del'>-	"xlnx,zynq-usb-2.20a"</div><div class='del'>-	"nvidia,tegra20-udc"</div><div class='del'>-	"nvidia,tegra30-udc"</div><div class='del'>-	"nvidia,tegra114-udc"</div><div class='del'>-	"nvidia,tegra124-udc"</div><div class='del'>-- reg: base address and length of the registers</div><div class='del'>-- interrupts: interrupt for the USB controller</div><div class='del'>-</div><div class='del'>-Recommended properies:</div><div class='del'>-- phy_type: the type of the phy connected to the core. Should be one</div><div class='del'>-  of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this</div><div class='del'>-  property the PORTSC register won't be touched.</div><div class='del'>-- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"</div><div class='del'>-</div><div class='del'>-Deprecated properties:</div><div class='del'>-- usb-phy:      phandle for the PHY device. Use "phys" instead.</div><div class='del'>-- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks: reference to the USB clock</div><div class='del'>-- phys: reference to the USB PHY</div><div class='del'>-- phy-names: should be "usb-phy"</div><div class='del'>-- vbus-supply: reference to the VBUS regulator</div><div class='del'>-- maximum-speed: limit the maximum connection speed to "full-speed".</div><div class='del'>-- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts</div><div class='del'>-- itc-setting: interrupt threshold control register control, the setting</div><div class='del'>-  should be aligned with ITC bits at register USBCMD.</div><div class='del'>-- ahb-burst-config: it is vendor dependent, the required value should be</div><div class='del'>-  aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This</div><div class='del'>-  property is used to change AHB burst configuration, check the chipidea</div><div class='del'>-  spec for meaning of each value. If this property is not existed, it</div><div class='del'>-  will use the reset value.</div><div class='del'>-- tx-burst-size-dword: it is vendor dependent, the tx burst size in dword</div><div class='del'>-  (4 bytes), This register represents the maximum length of a the burst</div><div class='del'>-  in 32-bit words while moving data from system memory to the USB</div><div class='del'>-  bus, the value of this property will only take effect if property</div><div class='del'>-  "ahb-burst-config" is set to 0, if this property is missing the reset</div><div class='del'>-  default of the hardware implementation will be used.</div><div class='del'>-- rx-burst-size-dword: it is vendor dependent, the rx burst size in dword</div><div class='del'>-  (4 bytes), This register represents the maximum length of a the burst</div><div class='del'>-  in 32-bit words while moving data from the USB bus to system memory,</div><div class='del'>-  the value of this property will only take effect if property</div><div class='del'>-  "ahb-burst-config" is set to 0, if this property is missing the reset</div><div class='del'>-  default of the hardware implementation will be used.</div><div class='del'>-- extcon: phandles to external connector devices. First phandle should point to</div><div class='del'>-  external connector, which provide "USB" cable events, the second should point</div><div class='del'>-  to external connector device, which provide "USB-HOST" cable events. If one</div><div class='del'>-  of the external connector devices is not required, empty &lt;0&gt; phandle should</div><div class='del'>-  be specified.</div><div class='del'>-- phy-clkgate-delay-us: the delay time (us) between putting the PHY into</div><div class='del'>-  low power mode and gating the PHY clock.</div><div class='del'>-- non-zero-ttctrl-ttha: after setting this property, the value of register</div><div class='del'>-  ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default</div><div class='del'>-  value. It needs to be very carefully for setting this property, it is</div><div class='del'>-  recommended that consult with your IC engineer before setting this value.</div><div class='del'>-  On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this</div><div class='del'>-  property only affects siTD.</div><div class='del'>-  If this property is not set, the max packet size is 1023 bytes, and if</div><div class='del'>-  the total of packet size for pervious transactions are more than 256 bytes,</div><div class='del'>-  it can't accept any transactions within this frame. The use case is single</div><div class='del'>-  transaction, but higher frame rate.</div><div class='del'>-  If this property is set, the max packet size is 188 bytes, it can handle</div><div class='del'>-  more transactions than above case, it can accept transactions until it</div><div class='del'>-  considers the left room size within frame is less than 188 bytes, software</div><div class='del'>-  needs to make sure it does not send more than 90%</div><div class='del'>-  maximum_periodic_data_per_frame. The use case is multiple transactions, but</div><div class='del'>-  less frame rate.</div><div class='del'>-- mux-controls: The mux control for toggling host/device output of this</div><div class='del'>-  controller. It's expected that a mux state of 0 indicates device mode and a</div><div class='del'>-  mux state of 1 indicates host mode.</div><div class='del'>-- mux-control-names: Shall be "usb_switch" if mux-controls is specified.</div><div class='del'>-- pinctrl-names: Names for optional pin modes in "default", "host", "device".</div><div class='del'>-  In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this</div><div class='del'>-  case, the "idle" state needs to pull down the data and strobe pin</div><div class='del'>-  and the "active" state needs to pull up the strobe pin.</div><div class='del'>-- pinctrl-n: alternate pin modes</div><div class='del'>-</div><div class='del'>-i.mx specific properties</div><div class='del'>-- fsl,usbmisc: phandler of non-core register device, with one</div><div class='del'>-  argument that indicate usb controller index</div><div class='del'>-- disable-over-current: disable over current detect</div><div class='del'>-- over-current-active-low: over current signal polarity is active low.</div><div class='del'>-- over-current-active-high: over current signal polarity is active high.</div><div class='del'>-  It's recommended to specify the over current polarity.</div><div class='del'>-- power-active-high: power signal polarity is active high</div><div class='del'>-- external-vbus-divider: enables off-chip resistor divider for Vbus</div><div class='del'>-- samsung,picophy-pre-emp-curr-control: HS Transmitter Pre-Emphasis Current</div><div class='del'>-  Control. This signal controls the amount of current sourced to the</div><div class='del'>-  USB_OTG*_DP and USB_OTG*_DN pins after a J-to-K or K-to-J transition.</div><div class='del'>-  The range is from 0x0 to 0x3, the default value is 0x1.</div><div class='del'>-  Details can refer to TXPREEMPAMPTUNE0 bits of USBNC_n_PHY_CFG1.</div><div class='del'>-- samsung,picophy-dc-vol-level-adjust: HS DC Voltage Level Adjustment.</div><div class='del'>-  Adjust the high-speed transmitter DC level voltage.</div><div class='del'>-  The range is from 0x0 to 0xf, the default value is 0x3.</div><div class='del'>-  Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	usb@f7ed0000 {</div><div class='del'>-		compatible = "chipidea,usb2";</div><div class='del'>-		reg = &lt;0xf7ed0000 0x10000&gt;;</div><div class='del'>-		interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;chip CLKID_USB0&gt;;</div><div class='del'>-		phys = &lt;&amp;usb_phy0&gt;;</div><div class='del'>-		phy-names = "usb-phy";</div><div class='del'>-		vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='del'>-		itc-setting = &lt;0x4&gt;; /* 4 micro-frames */</div><div class='del'>-		 /* Incremental burst of unspecified length */</div><div class='del'>-		ahb-burst-config = &lt;0x0&gt;;</div><div class='del'>-		tx-burst-size-dword = &lt;0x10&gt;; /* 64 bytes */</div><div class='del'>-		rx-burst-size-dword = &lt;0x10&gt;;</div><div class='del'>-		extcon = &lt;0&gt;, &lt;&amp;usb_id&gt;;</div><div class='del'>-		phy-clkgate-delay-us = &lt;400&gt;;</div><div class='del'>-		mux-controls = &lt;&amp;usb_switch&gt;;</div><div class='del'>-		mux-control-names = "usb_switch";</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-Example for HSIC:</div><div class='del'>-</div><div class='del'>-	usb@2184400 {</div><div class='del'>-		compatible = "fsl,imx6q-usb", "fsl,imx27-usb";</div><div class='del'>-		reg = &lt;0x02184400 0x200&gt;;</div><div class='del'>-		interrupts = &lt;0 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-		clocks = &lt;&amp;clks IMX6QDL_CLK_USBOH3&gt;;</div><div class='del'>-		fsl,usbphy = &lt;&amp;usbphynop1&gt;;</div><div class='del'>-		fsl,usbmisc = &lt;&amp;usbmisc 2&gt;;</div><div class='del'>-		phy_type = "hsic";</div><div class='del'>-		dr_mode = "host";</div><div class='del'>-		ahb-burst-config = &lt;0x0&gt;;</div><div class='del'>-		tx-burst-size-dword = &lt;0x10&gt;;</div><div class='del'>-		rx-burst-size-dword = &lt;0x10&gt;;</div><div class='del'>-		pinctrl-names = "idle", "active";</div><div class='del'>-		pinctrl-0 = &lt;&amp;pinctrl_usbh2_idle&gt;;</div><div class='del'>-		pinctrl-1 = &lt;&amp;pinctrl_usbh2_active&gt;;</div><div class='del'>-		#address-cells = &lt;1&gt;;</div><div class='del'>-		#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-		usbnet: smsc@1 {</div><div class='del'>-			compatible = "usb424,9730";</div><div class='del'>-			reg = &lt;1&gt;;</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml b/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml<br/>new file mode 100644<br/>index 000000000000..b26d26c2b023<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ci-hdrc-usb2.yaml</a></div><div class='hunk'>@@ -0,0 +1,448 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: USB2 ChipIdea USB controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Xu Yang &lt;xu.yang_2@nxp.com&gt;</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - chipidea,usb2</div><div class='add'>+          - lsi,zevio-usb</div><div class='add'>+          - nvidia,tegra20-ehci</div><div class='add'>+          - nvidia,tegra20-udc</div><div class='add'>+          - nvidia,tegra30-ehci</div><div class='add'>+          - nvidia,tegra30-udc</div><div class='add'>+          - nvidia,tegra114-udc</div><div class='add'>+          - nvidia,tegra124-udc</div><div class='add'>+          - qcom,ci-hdrc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - nvidia,tegra114-ehci</div><div class='add'>+              - nvidia,tegra124-ehci</div><div class='add'>+              - nvidia,tegra210-ehci</div><div class='add'>+          - const: nvidia,tegra30-ehci</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx23-usb</div><div class='add'>+              - fsl,imx25-usb</div><div class='add'>+              - fsl,imx28-usb</div><div class='add'>+              - fsl,imx50-usb</div><div class='add'>+              - fsl,imx51-usb</div><div class='add'>+              - fsl,imx53-usb</div><div class='add'>+              - fsl,imx6q-usb</div><div class='add'>+              - fsl,imx6sl-usb</div><div class='add'>+              - fsl,imx6sx-usb</div><div class='add'>+              - fsl,imx6ul-usb</div><div class='add'>+              - fsl,imx7d-usb</div><div class='add'>+              - fsl,vf610-usb</div><div class='add'>+          - const: fsl,imx27-usb</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx8dxl-usb</div><div class='add'>+          - const: fsl,imx7ulp-usb</div><div class='add'>+          - const: fsl,imx6ul-usb</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx8mm-usb</div><div class='add'>+              - fsl,imx8mn-usb</div><div class='add'>+          - const: fsl,imx7d-usb</div><div class='add'>+          - const: fsl,imx27-usb</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6sll-usb</div><div class='add'>+              - fsl,imx7ulp-usb</div><div class='add'>+          - const: fsl,imx6ul-usb</div><div class='add'>+          - const: fsl,imx27-usb</div><div class='add'>+      - items:</div><div class='add'>+          - const: xlnx,zynq-usb-2.20a</div><div class='add'>+          - const: chipidea,usb2</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='add'>+</div><div class='add'>+  dr_mode: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  "#reset-cells":</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  phy_type: true</div><div class='add'>+</div><div class='add'>+  itc-setting:</div><div class='add'>+    description:</div><div class='add'>+      interrupt threshold control register control, the setting should be</div><div class='add'>+      aligned with ITC bits at register USBCMD.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+</div><div class='add'>+  ahb-burst-config:</div><div class='add'>+    description:</div><div class='add'>+      it is vendor dependent, the required value should be aligned with</div><div class='add'>+      AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is</div><div class='add'>+      used to change AHB burst configuration, check the chipidea spec for</div><div class='add'>+      meaning of each value. If this property is not existed, it will use</div><div class='add'>+      the reset value.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0x0</div><div class='add'>+    maximum: 0x7</div><div class='add'>+</div><div class='add'>+  tx-burst-size-dword:</div><div class='add'>+    description:</div><div class='add'>+      it is vendor dependent, the tx burst size in dword (4 bytes), This</div><div class='add'>+      register represents the maximum length of a the burst in 32-bit</div><div class='add'>+      words while moving data from system memory to the USB bus, the value</div><div class='add'>+      of this property will only take effect if property "ahb-burst-config"</div><div class='add'>+      is set to 0, if this property is missing the reset default of the</div><div class='add'>+      hardware implementation will be used.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0x0</div><div class='add'>+    maximum: 0x20</div><div class='add'>+</div><div class='add'>+  rx-burst-size-dword:</div><div class='add'>+    description:</div><div class='add'>+      it is vendor dependent, the rx burst size in dword (4 bytes), This</div><div class='add'>+      register represents the maximum length of a the burst in 32-bit words</div><div class='add'>+      while moving data from the USB bus to system memory, the value of</div><div class='add'>+      this property will only take effect if property "ahb-burst-config"</div><div class='add'>+      is set to 0, if this property is missing the reset default of the</div><div class='add'>+      hardware implementation will be used.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0x0</div><div class='add'>+    maximum: 0x20</div><div class='add'>+</div><div class='add'>+  extcon:</div><div class='add'>+    description:</div><div class='add'>+      Phandles to external connector devices. First phandle should point</div><div class='add'>+      to external connector, which provide "USB" cable events, the second</div><div class='add'>+      should point to external connector device, which provide "USB-HOST"</div><div class='add'>+      cable events. If one of the external connector devices is not</div><div class='add'>+      required, empty &lt;0&gt; phandle should be specified.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: vbus extcon</div><div class='add'>+      - description: id extcon</div><div class='add'>+</div><div class='add'>+  phy-clkgate-delay-us:</div><div class='add'>+    description:</div><div class='add'>+      The delay time (us) between putting the PHY into low power mode and</div><div class='add'>+      gating the PHY clock.</div><div class='add'>+</div><div class='add'>+  non-zero-ttctrl-ttha:</div><div class='add'>+    description:</div><div class='add'>+      After setting this property, the value of register ttctrl.ttha</div><div class='add'>+      will be 0x7f; if not, the value will be 0x0, this is the default</div><div class='add'>+      value. It needs to be very carefully for setting this property, it</div><div class='add'>+      is recommended that consult with your IC engineer before setting</div><div class='add'>+      this value.  On the most of chipidea platforms, the "usage_tt" flag</div><div class='add'>+      at RTL is 0, so this property only affects siTD.</div><div class='add'>+</div><div class='add'>+      If this property is not set, the max packet size is 1023 bytes, and</div><div class='add'>+      if the total of packet size for pervious transactions are more than</div><div class='add'>+      256 bytes, it can't accept any transactions within this frame. The</div><div class='add'>+      use case is single transaction, but higher frame rate.</div><div class='add'>+</div><div class='add'>+      If this property is set, the max packet size is 188 bytes, it can</div><div class='add'>+      handle more transactions than above case, it can accept transactions</div><div class='add'>+      until it considers the left room size within frame is less than 188</div><div class='add'>+      bytes, software needs to make sure it does not send more than 90%</div><div class='add'>+      maximum_periodic_data_per_frame. The use case is multiple</div><div class='add'>+      transactions, but less frame rate.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mux-controls:</div><div class='add'>+    description:</div><div class='add'>+      The mux control for toggling host/device output of this controller.</div><div class='add'>+      It's expected that a mux state of 0 indicates device mode and a mux</div><div class='add'>+      state of 1 indicates host mode.</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mux-control-names:</div><div class='add'>+    const: usb_switch</div><div class='add'>+</div><div class='add'>+  operating-points-v2:</div><div class='add'>+    description: A phandle to the OPP table containing the performance states.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  pinctrl-names:</div><div class='add'>+    description:</div><div class='add'>+      Names for optional pin modes in "default", "host", "device".</div><div class='add'>+      In case of HSIC-mode, "idle" and "active" pin modes are mandatory.</div><div class='add'>+      In this case, the "idle" state needs to pull down the data and</div><div class='add'>+      strobe pin and the "active" state needs to pull up the strobe pin.</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: idle</div><div class='add'>+          - const: active</div><div class='add'>+      - items:</div><div class='add'>+          - const: default</div><div class='add'>+          - enum:</div><div class='add'>+              - host</div><div class='add'>+              - device</div><div class='add'>+      - items:</div><div class='add'>+          - const: default</div><div class='add'>+</div><div class='add'>+  pinctrl-0:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  pinctrl-1:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: usb-phy</div><div class='add'>+</div><div class='add'>+  phy-select:</div><div class='add'>+    description:</div><div class='add'>+      Phandler of TCSR node with two argument that indicate register</div><div class='add'>+      offset, and phy index</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - description: phandle to TCSR node</div><div class='add'>+      - description: register offset</div><div class='add'>+      - description: phy index</div><div class='add'>+</div><div class='add'>+  vbus-supply:</div><div class='add'>+    description: reference to the VBUS regulator.</div><div class='add'>+</div><div class='add'>+  fsl,usbmisc:</div><div class='add'>+    description:</div><div class='add'>+      Phandler of non-core register device, with one argument that</div><div class='add'>+      indicate usb controller index</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: phandle to usbmisc node</div><div class='add'>+          - description: index of usb controller</div><div class='add'>+</div><div class='add'>+  fsl,anatop:</div><div class='add'>+    description: phandle for the anatop node.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+</div><div class='add'>+  disable-over-current:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: disable over current detect</div><div class='add'>+</div><div class='add'>+  over-current-active-low:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: over current signal polarity is active low</div><div class='add'>+</div><div class='add'>+  over-current-active-high:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      Over current signal polarity is active high. It's recommended to</div><div class='add'>+      specify the over current polarity.</div><div class='add'>+</div><div class='add'>+  power-active-high:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: power signal polarity is active high</div><div class='add'>+</div><div class='add'>+  external-vbus-divider:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: enables off-chip resistor divider for Vbus</div><div class='add'>+</div><div class='add'>+  samsung,picophy-pre-emp-curr-control:</div><div class='add'>+    description:</div><div class='add'>+      HS Transmitter Pre-Emphasis Current Control. This signal controls</div><div class='add'>+      the amount of current sourced to the USB_OTG*_DP and USB_OTG*_DN</div><div class='add'>+      pins after a J-to-K or K-to-J transition. The range is from 0x0 to</div><div class='add'>+      0x3, the default value is 0x1. Details can refer to TXPREEMPAMPTUNE0</div><div class='add'>+      bits of USBNC_n_PHY_CFG1.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0x0</div><div class='add'>+    maximum: 0x3</div><div class='add'>+</div><div class='add'>+  samsung,picophy-dc-vol-level-adjust:</div><div class='add'>+    description:</div><div class='add'>+      HS DC Voltage Level Adjustment. Adjust the high-speed transmitter DC</div><div class='add'>+      level voltage. The range is from 0x0 to 0xf, the default value is</div><div class='add'>+      0x3. Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 0x0</div><div class='add'>+    maximum: 0xf</div><div class='add'>+</div><div class='add'>+  usb-phy:</div><div class='add'>+    description: phandle for the PHY device. Use "phys" instead.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  fsl,usbphy:</div><div class='add'>+    description: phandle of usb phy that connects to the port. Use "phys" instead.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  nvidia,phy:</div><div class='add'>+    description: phandle of usb phy that connects to the port. Use "phys" instead.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  nvidia,needs-double-reset:</div><div class='add'>+    description: Indicates double reset or not.</div><div class='add'>+    type: boolean</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    description:</div><div class='add'>+      Any connector to the data bus of this controller should be modelled</div><div class='add'>+      using the OF graph bindings specified, if the "usb-role-switch"</div><div class='add'>+      property is used.</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ulpi:</div><div class='add'>+    type: object</div><div class='add'>+    additionalProperties: false</div><div class='add'>+    patternProperties:</div><div class='add'>+      "^phy(-[0-9])?$":</div><div class='add'>+        description: The phy child node for Qcom chips.</div><div class='add'>+        type: object</div><div class='add'>+        $ref: /schemas/phy/qcom,usb-hs-phy.yaml</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  port: [ usb-role-switch ]</div><div class='add'>+  mux-controls: [ mux-control-names ]</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-hcd.yaml#</div><div class='add'>+  - $ref: usb-drd.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        phy_type:</div><div class='add'>+          const: hsic</div><div class='add'>+      required:</div><div class='add'>+        - phy_type</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        pinctrl-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: idle</div><div class='add'>+            - const: active</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        pinctrl-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+          oneOf:</div><div class='add'>+            - items:</div><div class='add'>+                - const: default</div><div class='add'>+                - enum:</div><div class='add'>+                    - host</div><div class='add'>+                    - device</div><div class='add'>+            - items:</div><div class='add'>+                - const: default</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - chipidea,usb2</div><div class='add'>+              - lsi,zevio-usb</div><div class='add'>+              - nvidia,tegra20-udc</div><div class='add'>+              - nvidia,tegra30-udc</div><div class='add'>+              - nvidia,tegra114-udc</div><div class='add'>+              - nvidia,tegra124-udc</div><div class='add'>+              - qcom,ci-hdrc</div><div class='add'>+              - xlnx,zynq-usb-2.20a</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        fsl,usbmisc: false</div><div class='add'>+        disable-over-current: false</div><div class='add'>+        over-current-active-low: false</div><div class='add'>+        over-current-active-high: false</div><div class='add'>+        power-active-high: false</div><div class='add'>+        external-vbus-divider: false</div><div class='add'>+        samsung,picophy-pre-emp-curr-control: false</div><div class='add'>+        samsung,picophy-dc-vol-level-adjust: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/berlin2.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@f7ed0000 {</div><div class='add'>+        compatible = "chipidea,usb2";</div><div class='add'>+        reg = &lt;0xf7ed0000 0x10000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;chip CLKID_USB0&gt;;</div><div class='add'>+        phys = &lt;&amp;usb_phy0&gt;;</div><div class='add'>+        phy-names = "usb-phy";</div><div class='add'>+        vbus-supply = &lt;&amp;reg_usb0_vbus&gt;;</div><div class='add'>+        itc-setting = &lt;0x4&gt;; /* 4 micro-frames */</div><div class='add'>+         /* Incremental burst of unspecified length */</div><div class='add'>+        ahb-burst-config = &lt;0x0&gt;;</div><div class='add'>+        tx-burst-size-dword = &lt;0x10&gt;; /* 64 bytes */</div><div class='add'>+        rx-burst-size-dword = &lt;0x10&gt;;</div><div class='add'>+        extcon = &lt;0&gt;, &lt;&amp;usb_id&gt;;</div><div class='add'>+        phy-clkgate-delay-us = &lt;400&gt;;</div><div class='add'>+        mux-controls = &lt;&amp;usb_switch&gt;;</div><div class='add'>+        mux-control-names = "usb_switch";</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  # Example for HSIC:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/imx6qdl-clock.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@2184400 {</div><div class='add'>+        compatible = "fsl,imx6q-usb", "fsl,imx27-usb";</div><div class='add'>+        reg = &lt;0x02184400 0x200&gt;;</div><div class='add'>+        interrupts = &lt;0 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;clks IMX6QDL_CLK_USBOH3&gt;;</div><div class='add'>+        fsl,usbphy = &lt;&amp;usbphynop1&gt;;</div><div class='add'>+        fsl,usbmisc = &lt;&amp;usbmisc 2&gt;;</div><div class='add'>+        phy_type = "hsic";</div><div class='add'>+        dr_mode = "host";</div><div class='add'>+        ahb-burst-config = &lt;0x0&gt;;</div><div class='add'>+        tx-burst-size-dword = &lt;0x10&gt;;</div><div class='add'>+        rx-burst-size-dword = &lt;0x10&gt;;</div><div class='add'>+        pinctrl-names = "idle", "active";</div><div class='add'>+        pinctrl-0 = &lt;&amp;pinctrl_usbh2_idle&gt;;</div><div class='add'>+        pinctrl-1 = &lt;&amp;pinctrl_usbh2_active&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet@1 {</div><div class='add'>+            compatible = "usb424,9730";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml b/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml<br/>new file mode 100644<br/>index 000000000000..75eec4a9a020<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/cypress,cypd4226.yaml</a></div><div class='hunk'>@@ -0,0 +1,98 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/cypress,cypd4226.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Cypress cypd4226 Type-C Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Wayne Chang &lt;waynec@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Cypress cypd4226 is a dual Type-C controller that is controlled</div><div class='add'>+  via an I2C interface.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: cypress,cypd4226</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 0</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    const: 0x08</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: cypd4226 host interrupt</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    enum:</div><div class='add'>+      - nvidia,gpu</div><div class='add'>+      - nvidia,jetson-agx-xavier</div><div class='add'>+    description: |</div><div class='add'>+      The name of the CCGx firmware built for product series.</div><div class='add'>+      should be set one of following:</div><div class='add'>+      - "nvidia,gpu" for the NVIDIA RTX product series</div><div class='add'>+      - "nvidia,jetson-agx-xavier" for the NVIDIA Jetson product series</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^connector@[01]$':</div><div class='add'>+    $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+    properties:</div><div class='add'>+      reg:</div><div class='add'>+        maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+anyOf:</div><div class='add'>+  - required:</div><div class='add'>+      - connector@0</div><div class='add'>+  - required:</div><div class='add'>+      - connector@1</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/tegra194-gpio.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      #interrupt-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      typec@8 {</div><div class='add'>+        compatible = "cypress,cypd4226";</div><div class='add'>+        reg = &lt;0x08&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpio_aon&gt;;</div><div class='add'>+        interrupts = &lt;TEGRA194_AON_GPIO(BB, 2) IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        firmware-name = "nvidia,jetson-agx-xavier";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+        connector@0 {</div><div class='add'>+          compatible = "usb-c-connector";</div><div class='add'>+          reg = &lt;0&gt;;</div><div class='add'>+          label = "USB-C";</div><div class='add'>+          data-role = "dual";</div><div class='add'>+          ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            port@0 {</div><div class='add'>+              reg = &lt;0&gt;;</div><div class='add'>+              endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;usb_role_switch0&gt;;</div><div class='add'>+              };</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/da8xx-usb.txt b/Documentation/devicetree/bindings/usb/da8xx-usb.txt<br/>index 9ce22551b2b3..fb2027a7d80d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/da8xx-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/da8xx-usb.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/da8xx-usb.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/da8xx-usb.txt</a></div><div class='hunk'>@@ -36,7 +36,8 @@ DMA</div><div class='ctx'> - #dma-cells: should be set to 2. The first number represents the</div><div class='ctx'>   channel number (0 … 3 for endpoints 1 … 4).</div><div class='ctx'>   The second number is 0 for RX and 1 for TX transfers.</div><div class='del'>-- #dma-channels: should be set to 4 representing the 4 endpoints.</div><div class='add'>+- dma-channels: should be set to 4 representing the 4 endpoints.</div><div class='add'>+- #dma-channels: deprecated</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='ctx'> 	usb_phy: usb-phy {</div><div class='hunk'>@@ -74,7 +75,7 @@ Example:</div><div class='ctx'> 			reg-names = "controller", "scheduler", "queuemgr";</div><div class='ctx'> 			interrupts = &lt;58&gt;;</div><div class='ctx'> 			#dma-cells = &lt;2&gt;;</div><div class='del'>-			#dma-channels = &lt;4&gt;;</div><div class='add'>+			dma-channels = &lt;4&gt;;</div><div class='ctx'> 		};</div><div class='ctx'> </div><div class='ctx'> 	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml<br/>index 4cebce682d16..d3506090f8b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/dwc2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/dwc2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/dwc2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/dwc2.yaml</a></div><div class='hunk'>@@ -4,19 +4,27 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/dwc2.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: DesignWare HS OTG USB 2.0 controller Bindings</div><div class='add'>+title: DesignWare HS OTG USB 2.0 controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Rob Herring &lt;robh@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: usb-drd.yaml#</div><div class='add'>+  - $ref: usb-hcd.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='ctx'>       - const: brcm,bcm2835-usb</div><div class='ctx'>       - const: hisilicon,hi6220-usb</div><div class='add'>+      - const: ingenic,jz4775-otg</div><div class='add'>+      - const: ingenic,jz4780-otg</div><div class='add'>+      - const: ingenic,x1000-otg</div><div class='add'>+      - const: ingenic,x1600-otg</div><div class='add'>+      - const: ingenic,x1700-otg</div><div class='add'>+      - const: ingenic,x1830-otg</div><div class='add'>+      - const: ingenic,x2000-otg</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: rockchip,rk3066-usb</div><div class='ctx'>           - const: snps,dwc2</div><div class='hunk'>@@ -24,6 +32,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - rockchip,px30-usb</div><div class='ctx'>               - rockchip,rk3036-usb</div><div class='add'>+              - rockchip,rk3128-usb</div><div class='ctx'>               - rockchip,rk3188-usb</div><div class='ctx'>               - rockchip,rk3228-usb</div><div class='ctx'>               - rockchip,rk3288-usb</div><div class='hunk'>@@ -34,7 +43,10 @@ properties:</div><div class='ctx'>           - const: rockchip,rk3066-usb</div><div class='ctx'>           - const: snps,dwc2</div><div class='ctx'>       - const: lantiq,arx100-usb</div><div class='add'>+      - const: lantiq,ase-usb</div><div class='add'>+      - const: lantiq,danube-usb</div><div class='ctx'>       - const: lantiq,xrx200-usb</div><div class='add'>+      - const: lantiq,xrx300-usb</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - amlogic,meson8-usb</div><div class='hunk'>@@ -63,11 +75,14 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     items:</div><div class='ctx'>       - const: otg</div><div class='add'>+      - const: utmi</div><div class='add'>+    minItems: 1</div><div class='ctx'> </div><div class='ctx'>   disable-over-current:</div><div class='ctx'>     type: boolean</div><div class='hunk'>@@ -139,12 +154,12 @@ properties:</div><div class='ctx'> </div><div class='ctx'>   snps,need-phy-for-wake:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-    description: If present indicates that the phy needs to be left on for </div><div class='add'>+    description: If present indicates that the phy needs to be left on for</div><div class='ctx'>       remote wakeup during suspend.</div><div class='ctx'> </div><div class='ctx'>   snps,reset-phy-on-wake:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/flag</div><div class='del'>-    description: If present indicates that we need to reset the PHY when we </div><div class='add'>+    description: If present indicates that we need to reset the PHY when we</div><div class='ctx'>       detect a wakeup. This is due to a hardware errata.</div><div class='ctx'> </div><div class='ctx'>   port:</div><div class='hunk'>@@ -154,6 +169,8 @@ properties:</div><div class='ctx'>       property is used.</div><div class='ctx'>     $ref: /schemas/graph.yaml#/properties/port</div><div class='ctx'> </div><div class='add'>+  tpl-support: true</div><div class='add'>+</div><div class='ctx'> dependencies:</div><div class='ctx'>   port: [ usb-role-switch ]</div><div class='ctx'>   role-switch-default-mode: [ usb-role-switch ]</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/dwc3-st.txt b/Documentation/devicetree/bindings/usb/dwc3-st.txt<br/>index bf73de0d5b4a..4aa368447b1e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/dwc3-st.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/dwc3-st.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/dwc3-st.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/dwc3-st.txt</a></div><div class='hunk'>@@ -13,7 +13,7 @@ Required properties:</div><div class='ctx'>  - resets	: list of phandle and reset specifier pairs. There should be two entries, one</div><div class='ctx'> 		  for the powerdown and softreset lines of the usb3 IP</div><div class='ctx'>  - reset-names	: list of reset signal names. Names should be "powerdown" and "softreset"</div><div class='del'>-See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt</div><div class='add'>+See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml</div><div class='ctx'> See: Documentation/devicetree/bindings/reset/reset.txt</div><div class='ctx'> </div><div class='ctx'>  - #address-cells, #size-cells : should be '1' if the device has sub-nodes</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml<br/>index f77c16e203d5..098b73134a1b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml</a></div><div class='hunk'>@@ -71,6 +71,10 @@ properties:</div><div class='ctx'>         - usb2-phy</div><div class='ctx'>         - usb3-phy</div><div class='ctx'> </div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: GPIO used for the reset ulpi-phy</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> # Required child node:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ehci-omap.txt b/Documentation/devicetree/bindings/usb/ehci-omap.txt<br/>deleted file mode 100644<br/>index d77e11a975a2..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ehci-omap.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ehci-omap.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,31 +0,0 @@</div><div class='del'>-OMAP HS USB EHCI controller</div><div class='del'>-</div><div class='del'>-This device is usually the child of the omap-usb-host</div><div class='del'>-Documentation/devicetree/bindings/mfd/omap-usb-host.txt</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "ti,ehci-omap"</div><div class='del'>-- reg: should contain one register range i.e. start and length</div><div class='del'>-- interrupts: description of the interrupt line</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-</div><div class='del'>-- phys: list of phandles to PHY nodes.</div><div class='del'>-  This property is required if at least one of the ports are in</div><div class='del'>-  PHY mode i.e. OMAP_EHCI_PORT_MODE_PHY</div><div class='del'>-</div><div class='del'>-To specify the port mode, see</div><div class='del'>-Documentation/devicetree/bindings/mfd/omap-usb-host.txt</div><div class='del'>-</div><div class='del'>-Example for OMAP4:</div><div class='del'>-</div><div class='del'>-usbhsehci: ehci@4a064c00 {</div><div class='del'>-	compatible = "ti,ehci-omap";</div><div class='del'>-	reg = &lt;0x4a064c00 0x400&gt;;</div><div class='del'>-	interrupts = &lt;0 77 0x4&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-&amp;usbhsehci {</div><div class='del'>-	phys = &lt;&amp;hsusb1_phy 0 &amp;hsusb3_phy&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt<br/>deleted file mode 100644<br/>index 2855bae79fda..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ehci-orion.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ehci-orion.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-* EHCI controller, Orion Marvell variants</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be one of the following</div><div class='del'>-	"marvell,orion-ehci"</div><div class='del'>-	"marvell,armada-3700-ehci"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- interrupts: The EHCI interrupt</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks: reference to the clock</div><div class='del'>-- phys: reference to the USB PHY</div><div class='del'>-- phy-names: name of the USB PHY, should be "usb"</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	ehci@50000 {</div><div class='del'>-		compatible = "marvell,orion-ehci";</div><div class='del'>-		reg = &lt;0x50000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;19&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ehci-st.txt b/Documentation/devicetree/bindings/usb/ehci-st.txt<br/>index 065c91d955ad..d6f2bdee20fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ehci-st.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ehci-st.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ehci-st.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ehci-st.txt</a></div><div class='hunk'>@@ -17,7 +17,7 @@ See: Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='ctx'>  - resets		: phandle + reset specifier pairs to the powerdown and softreset lines</div><div class='ctx'> 			  of the USB IP</div><div class='ctx'>  - reset-names		: should be "power" and "softreset"</div><div class='del'>-See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt</div><div class='add'>+See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml</div><div class='ctx'> See: Documentation/devicetree/bindings/reset/reset.txt</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/faraday,fotg210.txt b/Documentation/devicetree/bindings/usb/faraday,fotg210.txt<br/>deleted file mode 100644<br/>index 06a2286e2054..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/faraday,fotg210.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/faraday,fotg210.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-Faraday FOTG Host controller</div><div class='del'>-</div><div class='del'>-This OTG-capable USB host controller is found in Cortina Systems</div><div class='del'>-Gemini and other SoC products.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be one of:</div><div class='del'>-  "faraday,fotg210"</div><div class='del'>-  "cortina,gemini-usb", "faraday,fotg210"</div><div class='del'>-- reg: should contain one register range i.e. start and length</div><div class='del'>-- interrupts: description of the interrupt line</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks: should contain the IP block clock</div><div class='del'>-- clock-names: should be "PCLK" for the IP block clock</div><div class='del'>-</div><div class='del'>-Required properties for "cortina,gemini-usb" compatible:</div><div class='del'>-- syscon: a phandle to the system controller to access PHY registers</div><div class='del'>-</div><div class='del'>-Optional properties for "cortina,gemini-usb" compatible:</div><div class='del'>-- cortina,gemini-mini-b: boolean property that indicates that a Mini-B</div><div class='del'>-  OTG connector is in use</div><div class='del'>-- wakeup-source: see power/wakeup-source.txt</div><div class='del'>-</div><div class='del'>-Example for Gemini:</div><div class='del'>-</div><div class='del'>-usb@68000000 {</div><div class='del'>-	compatible = "cortina,gemini-usb", "faraday,fotg210";</div><div class='del'>-	reg = &lt;0x68000000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-	clocks = &lt;&amp;cc 12&gt;;</div><div class='del'>-	clock-names = "PCLK";</div><div class='del'>-	syscon = &lt;&amp;syscon&gt;;</div><div class='del'>-	wakeup-source;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/faraday,fotg210.yaml b/Documentation/devicetree/bindings/usb/faraday,fotg210.yaml<br/>new file mode 100644<br/>index 000000000000..3fe4d1564dfe<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/faraday,fotg210.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/faraday,fotg210.yaml</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+# Copyright 2022 Linaro Ltd.</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/faraday,fotg210.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Faraday Technology FOTG200 series HS OTG USB 2.0 controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-drd.yaml#</div><div class='add'>+  - $ref: usb-hcd.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: faraday,fotg200</div><div class='add'>+      - const: faraday,fotg210</div><div class='add'>+      - items:</div><div class='add'>+          - const: cortina,gemini-usb</div><div class='add'>+          - const: faraday,fotg200</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: PCLK</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  syscon:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: a phandle to the global Gemini system controller on</div><div class='add'>+      Gemini systems</div><div class='add'>+</div><div class='add'>+  dr_mode: true</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    const: usb2-phy</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/cortina,gemini-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/cortina,gemini-reset.h&gt;</div><div class='add'>+    usb0: usb@68000000 {</div><div class='add'>+        compatible = "cortina,gemini-usb", "faraday,fotg200";</div><div class='add'>+        reg = &lt;0x68000000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;10 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        resets = &lt;&amp;syscon GEMINI_RESET_USB0&gt;;</div><div class='add'>+        clocks = &lt;&amp;syscon GEMINI_CLK_GATE_USB0&gt;;</div><div class='add'>+        clock-names = "PCLK";</div><div class='add'>+        syscon = &lt;&amp;syscon&gt;;</div><div class='add'>+        dr_mode = "host";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml<br/>new file mode 100644<br/>index 000000000000..f6e7a5c1ff0b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/fcs,fsa4480.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: ON Semiconductor Analog Audio Switch</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - fcs,fsa4480</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description: power supply (2.7V-5.5V)</div><div class='add'>+</div><div class='add'>+  mode-switch:</div><div class='add'>+    description: Flag the port as possible handle of altmode switching</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  orientation-switch:</div><div class='add'>+    description: Flag the port as possible handler of orientation switching</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    description:</div><div class='add'>+      A port node to link the FSA4480 to a TypeC controller for the purpose of</div><div class='add'>+      handling altmode muxing and orientation switching.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c13 {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        typec-mux@42 {</div><div class='add'>+          compatible = "fcs,fsa4480";</div><div class='add'>+          reg = &lt;0x42&gt;;</div><div class='add'>+</div><div class='add'>+          interrupts-extended = &lt;&amp;tlmm 2 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+          vcc-supply = &lt;&amp;vreg_bob&gt;;</div><div class='add'>+</div><div class='add'>+          mode-switch;</div><div class='add'>+          orientation-switch;</div><div class='add'>+</div><div class='add'>+          port {</div><div class='add'>+            fsa4480_ept: endpoint {</div><div class='add'>+              remote-endpoint = &lt;&amp;typec_controller&gt;;</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/fcs,fusb302.txt b/Documentation/devicetree/bindings/usb/fcs,fusb302.txt<br/>deleted file mode 100644<br/>index 60e4654297af..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/fcs,fusb302.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fcs,fusb302.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,34 +0,0 @@</div><div class='del'>-Fairchild FUSB302 Type-C Port controllers</div><div class='del'>-</div><div class='del'>-Required properties :</div><div class='del'>-- compatible             : "fcs,fusb302"</div><div class='del'>-- reg                    : I2C slave address</div><div class='del'>-- interrupts             : Interrupt specifier</div><div class='del'>-</div><div class='del'>-Required sub-node:</div><div class='del'>-- connector : The "usb-c-connector" attached to the FUSB302 IC. The bindings</div><div class='del'>-  of the connector node are specified in:</div><div class='del'>-</div><div class='del'>-	Documentation/devicetree/bindings/connector/usb-connector.yaml</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-fusb302: typec-portc@54 {</div><div class='del'>-	compatible = "fcs,fusb302";</div><div class='del'>-	reg = &lt;0x54&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='del'>-	interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	usb_con: connector {</div><div class='del'>-		compatible = "usb-c-connector";</div><div class='del'>-		label = "USB-C";</div><div class='del'>-		power-role = "dual";</div><div class='del'>-		try-power-role = "sink";</div><div class='del'>-		source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='del'>-		sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='del'>-			     PDO_VAR(3000, 12000, 3000)</div><div class='del'>-			     PDO_PPS_APDO(3000, 11000, 3000)&gt;;</div><div class='del'>-		op-sink-microwatt = &lt;10000000&gt;;</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/fcs,fusb302.yaml b/Documentation/devicetree/bindings/usb/fcs,fusb302.yaml<br/>new file mode 100644<br/>index 000000000000..b396ea0ab10c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/fcs,fusb302.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/fcs,fusb302.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/fcs,fusb302.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Fairchild FUSB302 Type-C Port controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Rob Herring &lt;robh@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: fcs,fusb302</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  vbus-supply:</div><div class='add'>+    description: VBUS power supply</div><div class='add'>+</div><div class='add'>+  connector:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - vbus-supply</div><div class='add'>+  - connector</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      typec-portc@54 {</div><div class='add'>+        compatible = "fcs,fusb302";</div><div class='add'>+        reg = &lt;0x54&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;nmi_intc&gt;;</div><div class='add'>+        interrupts = &lt;0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        vbus-supply = &lt;&amp;vbus_typec&gt;;</div><div class='add'>+</div><div class='add'>+        connector {</div><div class='add'>+          compatible = "usb-c-connector";</div><div class='add'>+          label = "USB-C";</div><div class='add'>+          power-role = "dual";</div><div class='add'>+          try-power-role = "sink";</div><div class='add'>+          source-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+          sink-pdos = &lt;PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)</div><div class='add'>+                       PDO_VAR(3000, 12000, 3000)</div><div class='add'>+                       PDO_PPS_APDO(3000, 11000, 3000)&gt;;</div><div class='add'>+          op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml<br/>index 01ab0f922ae8..3fb4feb6d3d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml</a></div><div class='hunk'>@@ -71,6 +71,9 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       Power pad (PWR) polarity is active low.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'> # Required child node:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='hunk'>@@ -87,12 +90,14 @@ required:</div><div class='ctx'>   - clocks</div><div class='ctx'>   - clock-names</div><div class='ctx'>   - interrupts</div><div class='add'>+  - power-domains</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/imx8mp-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/imx8mp-power.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     usb3_0: usb@32f10100 {</div><div class='ctx'>       compatible = "fsl,imx8mp-dwc3";</div><div class='hunk'>@@ -102,6 +107,7 @@ examples:</div><div class='ctx'>                &lt;&amp;clk IMX8MP_CLK_USB_ROOT&gt;;</div><div class='ctx'>       clock-names = "hsio", "suspend";</div><div class='ctx'>       interrupts = &lt;GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+      power-domains = &lt;&amp;hsio_blk_ctrl IMX8MP_HSIOBLK_PD_USB&gt;;</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;1&gt;;</div><div class='ctx'>       dma-ranges = &lt;0x40000000 0x40000000 0xc0000000&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mq-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mq-dwc3.yaml<br/>new file mode 100644<br/>index 000000000000..50569d3ee767<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/fsl,imx8mq-dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/fsl,imx8mq-dwc3.yaml</a></div><div class='hunk'>@@ -0,0 +1,48 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/fsl,imx8mq-dwc3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP iMX8MQ Soc USB Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Li Jun &lt;jun.li@nxp.com&gt;</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    compatible:</div><div class='add'>+      contains:</div><div class='add'>+        enum:</div><div class='add'>+          - fsl,imx8mq-dwc3</div><div class='add'>+  required:</div><div class='add'>+    - compatible</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx8mq-dwc3</div><div class='add'>+      - const: snps,dwc3</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: snps,dwc3.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/imx8mq-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    usb_dwc3_1: usb@38200000 {</div><div class='add'>+        compatible = "fsl,imx8mq-dwc3", "snps,dwc3";</div><div class='add'>+        reg = &lt;0x38200000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk IMX8MQ_CLK_USB2_CTRL_ROOT&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MQ_CLK_USB_CORE_REF&gt;,</div><div class='add'>+                 &lt;&amp;clk IMX8MQ_CLK_32K&gt;;</div><div class='add'>+        clock-names = "bus_early", "ref", "suspend";</div><div class='add'>+        interrupts = &lt;GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        phys = &lt;&amp;usb3_phy1&gt;, &lt;&amp;usb3_phy1&gt;;</div><div class='add'>+        phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml b/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml<br/>new file mode 100644<br/>index 000000000000..2d3589d284b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/fsl,usbmisc.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/fsl,usbmisc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Freescale i.MX wrapper module for Chipidea USB2 controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Xu Yang &lt;xu.yang_2@nxp.com&gt;</div><div class='add'>+  - Peng Fan &lt;peng.fan@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - fsl,imx25-usbmisc</div><div class='add'>+          - fsl,imx27-usbmisc</div><div class='add'>+          - fsl,imx35-usbmisc</div><div class='add'>+          - fsl,imx51-usbmisc</div><div class='add'>+          - fsl,imx53-usbmisc</div><div class='add'>+          - fsl,imx6q-usbmisc</div><div class='add'>+          - fsl,vf610-usbmisc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx6ul-usbmisc</div><div class='add'>+              - fsl,imx6sl-usbmisc</div><div class='add'>+              - fsl,imx6sx-usbmisc</div><div class='add'>+              - fsl,imx7d-usbmisc</div><div class='add'>+          - const: fsl,imx6q-usbmisc</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - fsl,imx7ulp-usbmisc</div><div class='add'>+              - fsl,imx8mm-usbmisc</div><div class='add'>+              - fsl,imx8mn-usbmisc</div><div class='add'>+          - const: fsl,imx7d-usbmisc</div><div class='add'>+          - const: fsl,imx6q-usbmisc</div><div class='add'>+      - items:</div><div class='add'>+          - const: fsl,imx6sll-usbmisc</div><div class='add'>+          - const: fsl,imx6ul-usbmisc</div><div class='add'>+          - const: fsl,imx6q-usbmisc</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  '#index-cells':</div><div class='add'>+    const: 1</div><div class='add'>+    description: Cells used to describe usb controller index.</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    usbmisc@2184800 {</div><div class='add'>+        compatible = "fsl,imx6q-usbmisc";</div><div class='add'>+        reg = &lt;0x02184800 0x200&gt;;</div><div class='add'>+        #index-cells = &lt;1&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml<br/>index 8913497624de..9445764bd8de 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/generic-ehci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/generic-ehci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/generic-ehci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/generic-ehci.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: USB EHCI Controller Device Tree Bindings</div><div class='add'>+title: USB EHCI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "usb-hcd.yaml"</div><div class='add'>+  - $ref: usb-hcd.yaml</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -30,6 +30,7 @@ properties:</div><div class='ctx'>               - allwinner,sun4i-a10-ehci</div><div class='ctx'>               - allwinner,sun50i-a64-ehci</div><div class='ctx'>               - allwinner,sun50i-h6-ehci</div><div class='add'>+              - allwinner,sun50i-h616-ehci</div><div class='ctx'>               - allwinner,sun5i-a13-ehci</div><div class='ctx'>               - allwinner,sun6i-a31-ehci</div><div class='ctx'>               - allwinner,sun7i-a20-ehci</div><div class='hunk'>@@ -38,6 +39,7 @@ properties:</div><div class='ctx'>               - allwinner,sun8i-h3-ehci</div><div class='ctx'>               - allwinner,sun8i-r40-ehci</div><div class='ctx'>               - allwinner,sun9i-a80-ehci</div><div class='add'>+              - allwinner,sun20i-d1-ehci</div><div class='ctx'>               - aspeed,ast2400-ehci</div><div class='ctx'>               - aspeed,ast2500-ehci</div><div class='ctx'>               - aspeed,ast2600-ehci</div><div class='hunk'>@@ -55,6 +57,7 @@ properties:</div><div class='ctx'>               - brcm,bcm7420-ehci</div><div class='ctx'>               - brcm,bcm7425-ehci</div><div class='ctx'>               - brcm,bcm7435-ehci</div><div class='add'>+              - hpe,gxp-ehci</div><div class='ctx'>               - ibm,476gtr-ehci</div><div class='ctx'>               - nxp,lpc1850-ehci</div><div class='ctx'>               - qca,ar7100-ehci</div><div class='hunk'>@@ -71,6 +74,11 @@ properties:</div><div class='ctx'>           - const: usb-ehci</div><div class='ctx'>       - enum:</div><div class='ctx'>           - generic-ehci</div><div class='add'>+          - marvell,armada-3700-ehci</div><div class='add'>+          - marvell,orion-ehci</div><div class='add'>+          - nuvoton,npcm750-ehci</div><div class='add'>+          - nuvoton,npcm845-ehci</div><div class='add'>+          - ti,ehci-omap</div><div class='ctx'>           - usb-ehci</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -129,13 +137,9 @@ properties:</div><div class='ctx'>       Set this flag to indicate that the hardware sometimes turns on</div><div class='ctx'>       the OC bit when an over-current isn't actually present.</div><div class='ctx'> </div><div class='del'>-  companion:</div><div class='del'>-    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='del'>-    description:</div><div class='del'>-      Phandle of a companion.</div><div class='del'>-</div><div class='ctx'>   phys:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   phy-names:</div><div class='ctx'>     const: usb</div><div class='hunk'>@@ -153,7 +157,7 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml<br/>index acbf94fa5f74..d06d1e7d8876 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/generic-ohci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/generic-ohci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/generic-ohci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/generic-ohci.yaml</a></div><div class='hunk'>@@ -4,10 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/generic-ohci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: USB OHCI Controller Device Tree Bindings</div><div class='del'>-</div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "usb-hcd.yaml"</div><div class='add'>+title: USB OHCI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='hunk'>@@ -20,6 +17,7 @@ properties:</div><div class='ctx'>               - allwinner,sun4i-a10-ohci</div><div class='ctx'>               - allwinner,sun50i-a64-ohci</div><div class='ctx'>               - allwinner,sun50i-h6-ohci</div><div class='add'>+              - allwinner,sun50i-h616-ohci</div><div class='ctx'>               - allwinner,sun5i-a13-ohci</div><div class='ctx'>               - allwinner,sun6i-a31-ohci</div><div class='ctx'>               - allwinner,sun7i-a20-ohci</div><div class='hunk'>@@ -28,6 +26,7 @@ properties:</div><div class='ctx'>               - allwinner,sun8i-h3-ohci</div><div class='ctx'>               - allwinner,sun8i-r40-ohci</div><div class='ctx'>               - allwinner,sun9i-a80-ohci</div><div class='add'>+              - allwinner,sun20i-d1-ohci</div><div class='ctx'>               - brcm,bcm3384-ohci</div><div class='ctx'>               - brcm,bcm63268-ohci</div><div class='ctx'>               - brcm,bcm6328-ohci</div><div class='hunk'>@@ -42,11 +41,21 @@ properties:</div><div class='ctx'>               - brcm,bcm7420-ohci</div><div class='ctx'>               - brcm,bcm7425-ohci</div><div class='ctx'>               - brcm,bcm7435-ohci</div><div class='add'>+              - hpe,gxp-ohci</div><div class='ctx'>               - ibm,476gtr-ohci</div><div class='ctx'>               - ingenic,jz4740-ohci</div><div class='ctx'>               - snps,hsdk-v1.0-ohci</div><div class='ctx'>           - const: generic-ohci</div><div class='del'>-      - const: generic-ohci</div><div class='add'>+      - enum:</div><div class='add'>+          - generic-ohci</div><div class='add'>+          - ti,ohci-omap3</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - cavium,octeon-6335-ohci</div><div class='add'>+              - nintendo,hollywood-usb-ohci</div><div class='add'>+              - nxp,ohci-nxp</div><div class='add'>+              - st,spear600-ohci</div><div class='add'>+          - const: usb-ohci</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -102,7 +111,8 @@ properties:</div><div class='ctx'>       Overrides the detected port count</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 3</div><div class='ctx'> </div><div class='ctx'>   phy-names:</div><div class='ctx'>     const: usb</div><div class='hunk'>@@ -115,12 +125,30 @@ properties:</div><div class='ctx'>       - host</div><div class='ctx'>       - otg</div><div class='ctx'> </div><div class='add'>+  transceiver:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      The associated ISP1301 device. Necessary for the UDC controller for</div><div class='add'>+      connecting to the USB physical layer.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - interrupts</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-hcd.yaml</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              const: nxp,ohci-nxp</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        transceiver: false</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/generic-xhci.yaml b/Documentation/devicetree/bindings/usb/generic-xhci.yaml<br/>index 23d73df96ea3..594ebb3ee432 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/generic-xhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/generic-xhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/generic-xhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/generic-xhci.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/generic-xhci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: USB xHCI Controller Device Tree Bindings</div><div class='add'>+title: USB xHCI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mathias Nyman &lt;mathias.nyman@intel.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "usb-xhci.yaml#"</div><div class='add'>+  - $ref: usb-xhci.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml b/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml<br/>new file mode 100644<br/>index 000000000000..cc4cf92b70d1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/genesys,gl850g.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/genesys,gl850g.yaml</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/genesys,gl850g.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Genesys Logic GL850G USB 2.0 hub controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Icenowy Zheng &lt;uwu@icenowy.me&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-device.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - usb5e3,608</div><div class='add'>+      - usb5e3,610</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: GPIO controlling the RESET# pin.</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      the regulator that provides 3.3V core power to the hub.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    usb {</div><div class='add'>+        dr_mode = "host";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        hub: hub@1 {</div><div class='add'>+            compatible = "usb5e3,608";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;pio 7 2 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml b/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml<br/>new file mode 100644<br/>index 000000000000..f196beb826d8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/gpio-sbu-mux.yaml</a></div><div class='hunk'>@@ -0,0 +1,110 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/gpio-sbu-mux.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO-based SBU mux</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Bjorn Andersson &lt;andersson@kernel.org&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  In USB Type-C applications the SBU lines needs to be connected, disconnected</div><div class='add'>+  and swapped depending on the altmode and orientation. This binding describes</div><div class='add'>+  a family of hardware solutions which switches between these modes using GPIO</div><div class='add'>+  signals.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - onnn,fsusb43l10x</div><div class='add'>+          - pericom,pi3usb102</div><div class='add'>+      - const: gpio-sbu-mux</div><div class='add'>+</div><div class='add'>+  enable-gpios:</div><div class='add'>+    description: Switch enable GPIO</div><div class='add'>+</div><div class='add'>+  select-gpios:</div><div class='add'>+    description: Orientation select</div><div class='add'>+</div><div class='add'>+  vcc-supply:</div><div class='add'>+    description: power supply</div><div class='add'>+</div><div class='add'>+  mode-switch:</div><div class='add'>+    description: Flag the port as possible handle of altmode switching</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  orientation-switch:</div><div class='add'>+    description: Flag the port as possible handler of orientation switching</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  port:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+    description:</div><div class='add'>+      A port node to link the SBU mux to a TypeC controller for the purpose of</div><div class='add'>+      handling altmode muxing and orientation switching.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - enable-gpios</div><div class='add'>+  - select-gpios</div><div class='add'>+  - mode-switch</div><div class='add'>+  - orientation-switch</div><div class='add'>+  - port</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    tcpm {</div><div class='add'>+        connector {</div><div class='add'>+            compatible = "usb-c-connector";</div><div class='add'>+</div><div class='add'>+            ports {</div><div class='add'>+                #address-cells = &lt;1&gt;;</div><div class='add'>+                #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                port@0 {</div><div class='add'>+                    reg = &lt;0&gt;;</div><div class='add'>+                    tcpm_hs_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;usb_hs_phy_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@1 {</div><div class='add'>+                    reg = &lt;1&gt;;</div><div class='add'>+                    tcpm_ss_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;usb_ss_phy_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+</div><div class='add'>+                port@2 {</div><div class='add'>+                    reg = &lt;2&gt;;</div><div class='add'>+                    tcpm_sbu_out: endpoint {</div><div class='add'>+                        remote-endpoint = &lt;&amp;sbu_mux_in&gt;;</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    sbu-mux {</div><div class='add'>+        compatible = "pericom,pi3usb102", "gpio-sbu-mux";</div><div class='add'>+</div><div class='add'>+        enable-gpios = &lt;&amp;tlmm 101 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        select-gpios = &lt;&amp;tlmm 164 GPIO_ACTIVE_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        mode-switch;</div><div class='add'>+        orientation-switch;</div><div class='add'>+</div><div class='add'>+        port {</div><div class='add'>+            sbu_mux_in: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;tcpm_sbu_out&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ingenic,musb.yaml b/Documentation/devicetree/bindings/usb/ingenic,musb.yaml<br/>index 59212358fcce..4cc1496a913c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ingenic,musb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ingenic,musb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ingenic,musb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ingenic,musb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/ingenic,musb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Ingenic JZ47xx USB IP DT bindings</div><div class='add'>+title: Ingenic JZ47xx USB IP</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Paul Cercueil &lt;paul@crapouillou.net&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml b/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml<br/>index 3cf93dd45eb7..a0246aa1f236 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/marvell,pxau2o-ehci.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/marvell,pxau2o-ehci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Marvell PXA/MMP EHCI bindings</div><div class='add'>+title: Marvell PXA/MMP EHCI</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Lubomir Rintel &lt;lkundrak@v3.sk&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/maxim,max33359.yaml b/Documentation/devicetree/bindings/usb/maxim,max33359.yaml<br/>index 93a19eda610b..276bf7554215 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/maxim,max33359.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/maxim,max33359.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/maxim,max33359.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/maxim,max33359.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/maxim,max33359.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/maxim,max33359.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Maxim TCPCI Type-C PD controller DT bindings</div><div class='add'>+title: Maxim TCPCI Type-C PD controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Badhri Jagan Sridharan &lt;badhri@google.com&gt;</div><div class='hunk'>@@ -40,7 +40,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml b/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml<br/>index 1d893d3d3432..8e0f4ecc010d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/maxim,max3420-udc.yaml</a></div><div class='hunk'>@@ -52,7 +52,7 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>       #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'>       #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-      spi0 {</div><div class='add'>+      spi {</div><div class='ctx'>             #address-cells = &lt;1&gt;;</div><div class='ctx'>             #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml b/Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml<br/>index 1e8e1c22180e..053264e60583 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/mediatek,mt6360-tcpc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/mediatek,mt6360-tcpc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Mediatek MT6360 Type-C Port Switch and Power Delivery controller DT bindings</div><div class='add'>+title: Mediatek MT6360 Type-C Port Switch and Power Delivery controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='hunk'>@@ -43,13 +43,18 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>       mt6360@34 {</div><div class='ctx'>         compatible = "mediatek,mt6360";</div><div class='ctx'>         reg = &lt;0x34&gt;;</div><div class='add'>+        interrupts-extended = &lt;&amp;gpio26 0 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        interrupt-names = "IRQB";</div><div class='add'>+        interrupt-controller;</div><div class='add'>+        #interrupt-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='ctx'>         tcpc {</div><div class='ctx'>           compatible = "mediatek,mt6360-tcpc";</div><div class='ctx'>           interrupts-extended = &lt;&amp;gpio26 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml b/Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml<br/>new file mode 100644<br/>index 000000000000..747d0f16d9b6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/mediatek,mt6370-tcpc.yaml</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/mediatek,mt6370-tcpc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediatTek MT6370 Type-C Port Switch and Power Delivery controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  MediaTek MT6370 is a multi-functional device.</div><div class='add'>+  It integrates charger, ADC, flash, RGB indicators,</div><div class='add'>+  regulators (DSV/VIBLDO), and TypeC Port Switch with Power Delivery controller.</div><div class='add'>+  This document only describes MT6370 Type-C Port Switch and</div><div class='add'>+  Power Delivery controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - mediatek,mt6370-tcpc</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  connector:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml<br/>index 084d7135b2d9..e9644e333d78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml</a></div><div class='hunk'>@@ -5,13 +5,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek USB3 xHCI Device Tree Bindings</div><div class='add'>+title: MediaTek USB3 xHCI</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "usb-xhci.yaml"</div><div class='add'>+  - $ref: usb-xhci.yaml</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   There are two scenarios:</div><div class='hunk'>@@ -28,11 +28,14 @@ properties:</div><div class='ctx'>           - mediatek,mt7622-xhci</div><div class='ctx'>           - mediatek,mt7623-xhci</div><div class='ctx'>           - mediatek,mt7629-xhci</div><div class='add'>+          - mediatek,mt7986-xhci</div><div class='ctx'>           - mediatek,mt8173-xhci</div><div class='ctx'>           - mediatek,mt8183-xhci</div><div class='ctx'>           - mediatek,mt8186-xhci</div><div class='add'>+          - mediatek,mt8188-xhci</div><div class='ctx'>           - mediatek,mt8192-xhci</div><div class='ctx'>           - mediatek,mt8195-xhci</div><div class='add'>+          - mediatek,mt8365-xhci</div><div class='ctx'>       - const: mediatek,mtk-xhci</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -57,6 +60,7 @@ properties:</div><div class='ctx'>       - description: optional, wakeup interrupt used to support runtime PM</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='ctx'>     items:</div><div class='ctx'>       - const: host</div><div class='ctx'>       - const: wakeup</div><div class='hunk'>@@ -73,6 +77,7 @@ properties:</div><div class='ctx'>       - description: Mcu bus clock for register access</div><div class='ctx'>       - description: DMA bus clock for data transfer</div><div class='ctx'>       - description: controller clock</div><div class='add'>+      - description: frame count clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -82,14 +87,7 @@ properties:</div><div class='ctx'>       - const: mcu_ck</div><div class='ctx'>       - const: dma_ck</div><div class='ctx'>       - const: xhci_ck</div><div class='del'>-</div><div class='del'>-  assigned-clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 5</div><div class='del'>-</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 5</div><div class='add'>+      - const: frmcnt_ck</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -113,6 +111,9 @@ properties:</div><div class='ctx'>   vbus-supply:</div><div class='ctx'>     description: Regulator of USB VBUS5v</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   usb3-lpm-capable: true</div><div class='ctx'> </div><div class='ctx'>   usb2-lpm-disable: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml<br/>index df766f8de872..478214ab045e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml</a></div><div class='hunk'>@@ -5,13 +5,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/mediatek,mtu3.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek USB3 DRD Controller Device Tree Bindings</div><div class='add'>+title: MediaTek USB3 DRD Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chunfeng Yun &lt;chunfeng.yun@mediatek.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "usb-drd.yaml"</div><div class='add'>+  - $ref: usb-drd.yaml</div><div class='ctx'> </div><div class='ctx'> description: |</div><div class='ctx'>   The DRD controller has a glue layer IPPC (IP Port Control), and its host is</div><div class='hunk'>@@ -24,7 +24,11 @@ properties:</div><div class='ctx'>           - mediatek,mt2712-mtu3</div><div class='ctx'>           - mediatek,mt8173-mtu3</div><div class='ctx'>           - mediatek,mt8183-mtu3</div><div class='add'>+          - mediatek,mt8186-mtu3</div><div class='add'>+          - mediatek,mt8188-mtu3</div><div class='ctx'>           - mediatek,mt8192-mtu3</div><div class='add'>+          - mediatek,mt8195-mtu3</div><div class='add'>+          - mediatek,mt8365-mtu3</div><div class='ctx'>       - const: mediatek,mtu3</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -62,6 +66,8 @@ properties:</div><div class='ctx'>       - description: Reference clock used by low power mode etc</div><div class='ctx'>       - description: Mcu bus clock for register access</div><div class='ctx'>       - description: DMA bus clock for data transfer</div><div class='add'>+      - description: DRD controller clock</div><div class='add'>+      - description: Frame count clock</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -70,6 +76,8 @@ properties:</div><div class='ctx'>       - const: ref_ck</div><div class='ctx'>       - const: mcu_ck</div><div class='ctx'>       - const: dma_ck</div><div class='add'>+      - const: xhci_ck</div><div class='add'>+      - const: frmcnt_ck</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -106,6 +114,9 @@ properties:</div><div class='ctx'>   maximum-speed:</div><div class='ctx'>     enum: [super-speed-plus, super-speed, high-speed, full-speed]</div><div class='ctx'> </div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   "#address-cells":</div><div class='ctx'>     enum: [1, 2]</div><div class='ctx'> </div><div class='hunk'>@@ -197,9 +208,9 @@ patternProperties:</div><div class='ctx'>       example if the host mode is enabled.</div><div class='ctx'> </div><div class='ctx'> dependencies:</div><div class='del'>-  connector: [ 'usb-role-switch' ]</div><div class='del'>-  port: [ 'usb-role-switch' ]</div><div class='del'>-  role-switch-default-mode: [ 'usb-role-switch' ]</div><div class='add'>+  connector: [ usb-role-switch ]</div><div class='add'>+  port: [ usb-role-switch ]</div><div class='add'>+  role-switch-default-mode: [ usb-role-switch ]</div><div class='ctx'>   wakeup-source: [ 'mediatek,syscon-wakeup' ]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/mediatek,musb.yaml b/Documentation/devicetree/bindings/usb/mediatek,musb.yaml<br/>index 11a33f9b1f17..a39d38db7714 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,musb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/mediatek,musb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/mediatek,musb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/mediatek,musb.yaml</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/mediatek,musb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MediaTek MUSB DRD/OTG Controller Device Tree Bindings</div><div class='add'>+title: MediaTek MUSB DRD/OTG Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Min Guo &lt;min.guo@mediatek.com&gt;</div><div class='hunk'>@@ -68,8 +68,8 @@ properties:</div><div class='ctx'>     type: object</div><div class='ctx'> </div><div class='ctx'> dependencies:</div><div class='del'>-  usb-role-switch: [ 'connector' ]</div><div class='del'>-  connector: [ 'usb-role-switch' ]</div><div class='add'>+  usb-role-switch: [ connector ]</div><div class='add'>+  connector: [ usb-role-switch ]</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml b/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml<br/>index 48c458c65848..c5e9ce2e7bc2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/microchip,mpfs-musb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Microchip MPFS USB Controller Device Tree Bindings</div><div class='add'>+title: Microchip MPFS USB Controller</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: usb-drd.yaml#</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt b/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt<br/>deleted file mode 100644<br/>index 5a0f1f14fbfa..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/npcm7xx-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/npcm7xx-usb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Nuvoton NPCM7XX SoC USB controllers:</div><div class='del'>------------------------------</div><div class='del'>-</div><div class='del'>-EHCI:</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "nuvoton,npcm750-ehci"</div><div class='del'>-- interrupts: Should contain the EHCI interrupt</div><div class='del'>-- reg:        Physical address and length of the register set for the device</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	ehci1: usb@f0806000 {</div><div class='del'>-		compatible = "nuvoton,npcm750-ehci";</div><div class='del'>-		reg = &lt;0xf0806000 0x1000&gt;;</div><div class='del'>-		interrupts = &lt;0 61 4&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml<br/>index fd6e7c81426e..e2270ce0c56b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nvidia,tegra-xudc.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC)</div><div class='add'>+title: NVIDIA Tegra XUSB device mode controller (XUDC)</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and</div><div class='hunk'>@@ -22,6 +22,7 @@ properties:</div><div class='ctx'>           - nvidia,tegra210-xudc # For Tegra210</div><div class='ctx'>           - nvidia,tegra186-xudc # For Tegra186</div><div class='ctx'>           - nvidia,tegra194-xudc # For Tegra194</div><div class='add'>+          - nvidia,tegra234-xudc # For Tegra234</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     minItems: 2</div><div class='hunk'>@@ -112,6 +113,8 @@ properties:</div><div class='ctx'>   hvdd-usb-supply:</div><div class='ctx'>     description: USB controller power supply. Must supply 3.3 V.</div><div class='ctx'> </div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='hunk'>@@ -153,6 +156,7 @@ allOf:</div><div class='ctx'>             enum:</div><div class='ctx'>               - nvidia,tegra186-xudc</div><div class='ctx'>               - nvidia,tegra194-xudc</div><div class='add'>+              - nvidia,tegra234-xudc</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         reg:</div><div class='hunk'>@@ -164,6 +168,17 @@ allOf:</div><div class='ctx'>         clock-names:</div><div class='ctx'>           maxItems: 4</div><div class='ctx'> </div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - nvidia,tegra194-xudc</div><div class='add'>+              - nvidia,tegra234-xudc</div><div class='add'>+    then:</div><div class='add'>+      required:</div><div class='add'>+        - dma-coherent</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt<br/>deleted file mode 100644<br/>index 5bfcc0b4d6b9..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,132 +0,0 @@</div><div class='del'>-NVIDIA Tegra xHCI controller</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by</div><div class='del'>-the Tegra XUSB pad controller.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>---------------------</div><div class='del'>-- compatible: Must be:</div><div class='del'>-  - Tegra124: "nvidia,tegra124-xusb"</div><div class='del'>-  - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb"</div><div class='del'>-  - Tegra210: "nvidia,tegra210-xusb"</div><div class='del'>-  - Tegra186: "nvidia,tegra186-xusb"</div><div class='del'>-- reg: Must contain the base and length of the xHCI host registers, XUSB FPCI</div><div class='del'>-  registers and XUSB IPFS registers.</div><div class='del'>-- reg-names: Must contain the following entries:</div><div class='del'>-  - "hcd"</div><div class='del'>-  - "fpci"</div><div class='del'>-  - "ipfs"</div><div class='del'>-- interrupts: Must contain the xHCI host interrupt and the mailbox interrupt.</div><div class='del'>-- clocks: Must contain an entry for each entry in clock-names.</div><div class='del'>-  See ../clock/clock-bindings.txt for details.</div><div class='del'>-- clock-names: Must include the following entries:</div><div class='del'>-   - xusb_host</div><div class='del'>-   - xusb_host_src</div><div class='del'>-   - xusb_falcon_src</div><div class='del'>-   - xusb_ss</div><div class='del'>-   - xusb_ss_src</div><div class='del'>-   - xusb_ss_div2</div><div class='del'>-   - xusb_hs_src</div><div class='del'>-   - xusb_fs_src</div><div class='del'>-   - pll_u_480m</div><div class='del'>-   - clk_m</div><div class='del'>-   - pll_e</div><div class='del'>-- resets: Must contain an entry for each entry in reset-names.</div><div class='del'>-  See ../reset/reset.txt for details.</div><div class='del'>-- reset-names: Must include the following entries:</div><div class='del'>-  - xusb_host</div><div class='del'>-  - xusb_ss</div><div class='del'>-  - xusb_src</div><div class='del'>-  Note that xusb_src is the shared reset for xusb_{ss,hs,fs,falcon,host}_src.</div><div class='del'>-- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to</div><div class='del'>-  configure the USB pads used by the XHCI controller</div><div class='del'>-</div><div class='del'>-For Tegra124 and Tegra132:</div><div class='del'>-- avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.</div><div class='del'>-- dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V.</div><div class='del'>-- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.</div><div class='del'>-- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.</div><div class='del'>-- avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='del'>-- avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='del'>-- hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.</div><div class='del'>-- hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V.</div><div class='del'>-</div><div class='del'>-For Tegra210:</div><div class='del'>-- dvddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V.</div><div class='del'>-- hvddio-pex-supply: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.</div><div class='del'>-- avdd-usb-supply: USB controller power supply. Must supply 3.3 V.</div><div class='del'>-- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V.</div><div class='del'>-- avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='del'>-- dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='del'>-- hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V.</div><div class='del'>-</div><div class='del'>-For Tegra210 and Tegra186:</div><div class='del'>-- power-domains: A list of PM domain specifiers that reference each power-domain</div><div class='del'>-  used by the xHCI controller. This list must comprise of a specifier for the</div><div class='del'>-  XUSBA and XUSBC power-domains. See ../power/power_domain.txt and</div><div class='del'>-  ../arm/tegra/nvidia,tegra20-pmc.txt for details.</div><div class='del'>-- power-domain-names: A list of names that represent each of the specifiers in</div><div class='del'>-  the 'power-domains' property. Must include 'xusb_ss' and 'xusb_host' which</div><div class='del'>-  represent the power-domains XUSBA and XUSBC, respectively. See</div><div class='del'>-  ../power/power_domain.txt for details.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>---------------------</div><div class='del'>-- phys: Must contain an entry for each entry in phy-names.</div><div class='del'>-  See ../phy/phy-bindings.txt for details.</div><div class='del'>-- phy-names: Should include an entry for each PHY used by the controller. The</div><div class='del'>-  following PHYs are available:</div><div class='del'>-  - Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1</div><div class='del'>-  - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1</div><div class='del'>-  - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2,</div><div class='del'>-              usb3-3</div><div class='del'>-  - Tegra186: usb2-0, usb2-1, usb2-2, hsic-0, usb3-0, usb3-1, usb3-2</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>---------</div><div class='del'>-</div><div class='del'>-	usb@0,70090000 {</div><div class='del'>-		compatible = "nvidia,tegra124-xusb";</div><div class='del'>-		reg = &lt;0x0 0x70090000 0x0 0x8000&gt;,</div><div class='del'>-		      &lt;0x0 0x70098000 0x0 0x1000&gt;,</div><div class='del'>-		      &lt;0x0 0x70099000 0x0 0x1000&gt;;</div><div class='del'>-		reg-names = "hcd", "fpci", "ipfs";</div><div class='del'>-</div><div class='del'>-		interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='del'>-			     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-</div><div class='del'>-		clocks = &lt;&amp;tegra_car TEGRA124_CLK_XUSB_HOST&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_HOST_SRC&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_FALCON_SRC&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_SS&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_SS_DIV2&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_SS_SRC&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_HS_SRC&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_FS_SRC&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_PLL_U_480M&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_CLK_M&gt;,</div><div class='del'>-			 &lt;&amp;tegra_car TEGRA124_CLK_PLL_E&gt;;</div><div class='del'>-		clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",</div><div class='del'>-			      "xusb_ss", "xusb_ss_div2", "xusb_ss_src",</div><div class='del'>-			      "xusb_hs_src", "xusb_fs_src", "pll_u_480m",</div><div class='del'>-			      "clk_m", "pll_e";</div><div class='del'>-		resets = &lt;&amp;tegra_car 89&gt;, &lt;&amp;tegra_car 156&gt;, &lt;&amp;tegra_car 143&gt;;</div><div class='del'>-		reset-names = "xusb_host", "xusb_ss", "xusb_src";</div><div class='del'>-</div><div class='del'>-		nvidia,xusb-padctl = &lt;&amp;padctl&gt;;</div><div class='del'>-</div><div class='del'>-		phys = &lt;&amp;{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}&gt;, /* mini-PCIe USB */</div><div class='del'>-		       &lt;&amp;{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}&gt;, /* USB A */</div><div class='del'>-		       &lt;&amp;{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}&gt;; /* USB A */</div><div class='del'>-		phy-names = "usb2-1", "usb2-2", "usb3-0";</div><div class='del'>-</div><div class='del'>-		avddio-pex-supply = &lt;&amp;vdd_1v05_run&gt;;</div><div class='del'>-		dvddio-pex-supply = &lt;&amp;vdd_1v05_run&gt;;</div><div class='del'>-		avdd-usb-supply = &lt;&amp;vdd_3v3_lp0&gt;;</div><div class='del'>-		avdd-pll-utmip-supply = &lt;&amp;vddio_1v8&gt;;</div><div class='del'>-		avdd-pll-erefe-supply = &lt;&amp;avdd_1v05_run&gt;;</div><div class='del'>-		avdd-usb-ss-pll-supply = &lt;&amp;vdd_1v05_run&gt;;</div><div class='del'>-		hvdd-usb-ss-supply = &lt;&amp;vdd_3v3_lp0&gt;;</div><div class='del'>-		hvdd-usb-ss-pll-e-supply = &lt;&amp;vdd_3v3_lp0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.yaml<br/>new file mode 100644<br/>index 000000000000..d6ca8c93073d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nvidia,tegra124-xusb.yaml</a></div><div class='hunk'>@@ -0,0 +1,200 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/nvidia,tegra124-xusb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra124 xHCI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: The Tegra xHCI controller supports both USB2 and USB3 interfaces</div><div class='add'>+  exposed by the Tegra XUSB pad controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  # required</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - description: NVIDIA Tegra124</div><div class='add'>+        const: nvidia,tegra124-xusb</div><div class='add'>+</div><div class='add'>+      - description: NVIDIA Tegra132</div><div class='add'>+        items:</div><div class='add'>+          - const: nvidia,tegra132-xusb</div><div class='add'>+          - const: nvidia,tegra124-xusb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: base and length of the xHCI host registers</div><div class='add'>+      - description: base and length of the XUSB FPCI registers</div><div class='add'>+      - description: base and length of the XUSB IPFS registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hcd</div><div class='add'>+      - const: fpci</div><div class='add'>+      - const: ipfs</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: xHCI host interrupt</div><div class='add'>+      - description: mailbox interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB host clock</div><div class='add'>+      - description: XUSB host source clock</div><div class='add'>+      - description: XUSB Falcon source clock</div><div class='add'>+      - description: XUSB SuperSpeed clock</div><div class='add'>+      - description: XUSB SuperSpeed clock divider</div><div class='add'>+      - description: XUSB SuperSpeed source clock</div><div class='add'>+      - description: XUSB HighSpeed clock source</div><div class='add'>+      - description: XUSB FullSpeed clock source</div><div class='add'>+      - description: USB PLL</div><div class='add'>+      - description: reference clock</div><div class='add'>+      - description: I/O PLL</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_host_src</div><div class='add'>+      - const: xusb_falcon_src</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+      - const: xusb_ss_div2</div><div class='add'>+      - const: xusb_ss_src</div><div class='add'>+      - const: xusb_hs_src</div><div class='add'>+      - const: xusb_fs_src</div><div class='add'>+      - const: pll_u_480m</div><div class='add'>+      - const: clk_m</div><div class='add'>+      - const: pll_e</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: reset for the XUSB host controller</div><div class='add'>+      - description: reset for the SuperSpeed logic</div><div class='add'>+      - description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+      - const: xusb_src</div><div class='add'>+</div><div class='add'>+  nvidia,xusb-padctl:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the XUSB pad controller that is used to configure</div><div class='add'>+      the USB pads used by the XHCI controller</div><div class='add'>+</div><div class='add'>+  # optional</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        - usb2-0</div><div class='add'>+        - usb2-1</div><div class='add'>+        - usb2-2</div><div class='add'>+        - hsic-0</div><div class='add'>+        - hsic-1</div><div class='add'>+        - usb3-0</div><div class='add'>+        - usb3-1</div><div class='add'>+</div><div class='add'>+  avddio-pex-supply:</div><div class='add'>+    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  dvddio-pex-supply:</div><div class='add'>+    description: PCIe/USB3 digital logic power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  avdd-usb-supply:</div><div class='add'>+    description: USB controller power supply. Must supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-utmip-supply:</div><div class='add'>+    description: UTMI PLL power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-erefe-supply:</div><div class='add'>+    description: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  avdd-usb-ss-pll-supply:</div><div class='add'>+    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvdd-usb-ss-supply:</div><div class='add'>+    description: High-voltage PCIe/USB3 power supply. Must supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  hvdd-usb-ss-pll-e-supply:</div><div class='add'>+    description: High-voltage PLLE power supply. Must supply 3.3 V.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-xhci.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reg-names</div><div class='add'>+  - interrupts</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+  - nvidia,xusb-padctl</div><div class='add'>+  - phys</div><div class='add'>+  - phy-names</div><div class='add'>+  - avddio-pex-supply</div><div class='add'>+  - dvddio-pex-supply</div><div class='add'>+  - avdd-usb-supply</div><div class='add'>+  - hvdd-usb-ss-supply</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra124-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@70090000 {</div><div class='add'>+        compatible = "nvidia,tegra124-xusb";</div><div class='add'>+        reg = &lt;0x70090000 0x8000&gt;,</div><div class='add'>+              &lt;0x70098000 0x1000&gt;,</div><div class='add'>+              &lt;0x70099000 0x1000&gt;;</div><div class='add'>+        reg-names = "hcd", "fpci", "ipfs";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA124_CLK_XUSB_HOST&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_HOST_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_FALCON_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_SS&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_SS_DIV2&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_SS_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_HS_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_XUSB_FS_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_PLL_U_480M&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA124_CLK_PLL_E&gt;;</div><div class='add'>+        clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src",</div><div class='add'>+                      "xusb_ss", "xusb_ss_div2", "xusb_ss_src",</div><div class='add'>+                      "xusb_hs_src", "xusb_fs_src", "pll_u_480m",</div><div class='add'>+                      "clk_m", "pll_e";</div><div class='add'>+        resets = &lt;&amp;tegra_car 89&gt;, &lt;&amp;tegra_car 156&gt;, &lt;&amp;tegra_car 143&gt;;</div><div class='add'>+        reset-names = "xusb_host", "xusb_ss", "xusb_src";</div><div class='add'>+</div><div class='add'>+        nvidia,xusb-padctl = &lt;&amp;padctl&gt;;</div><div class='add'>+</div><div class='add'>+        phys = &lt;&amp;phy_usb2_1&gt;, &lt;&amp;phy_usb2_2&gt;, &lt;&amp;phy_pcie_0&gt;;</div><div class='add'>+        phy-names = "usb2-1", "usb2-2", "usb3-0";</div><div class='add'>+</div><div class='add'>+        avddio-pex-supply = &lt;&amp;vdd_1v05_run&gt;;</div><div class='add'>+        dvddio-pex-supply = &lt;&amp;vdd_1v05_run&gt;;</div><div class='add'>+        avdd-usb-supply = &lt;&amp;vdd_3v3_lp0&gt;;</div><div class='add'>+        avdd-pll-utmip-supply = &lt;&amp;vddio_1v8&gt;;</div><div class='add'>+        avdd-pll-erefe-supply = &lt;&amp;avdd_1v05_run&gt;;</div><div class='add'>+        avdd-usb-ss-pll-supply = &lt;&amp;vdd_1v05_run&gt;;</div><div class='add'>+        hvdd-usb-ss-supply = &lt;&amp;vdd_3v3_lp0&gt;;</div><div class='add'>+        hvdd-usb-ss-pll-e-supply = &lt;&amp;vdd_3v3_lp0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra186-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra186-xusb.yaml<br/>new file mode 100644<br/>index 000000000000..a04c6ce1e0f6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra186-xusb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nvidia,tegra186-xusb.yaml</a></div><div class='hunk'>@@ -0,0 +1,171 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/nvidia,tegra186-xusb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra186 xHCI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: The Tegra xHCI controller supports both USB2 and USB3 interfaces</div><div class='add'>+  exposed by the Tegra XUSB pad controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra186-xusb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: base and length of the xHCI host registers</div><div class='add'>+      - description: base and length of the XUSB FPCI registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hcd</div><div class='add'>+      - const: fpci</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: xHCI host interrupt</div><div class='add'>+      - description: mailbox interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB host clock</div><div class='add'>+      - description: XUSB Falcon source clock</div><div class='add'>+      - description: XUSB SuperSpeed clock</div><div class='add'>+      - description: XUSB SuperSpeed source clock</div><div class='add'>+      - description: XUSB HighSpeed clock source</div><div class='add'>+      - description: XUSB FullSpeed clock source</div><div class='add'>+      - description: USB PLL</div><div class='add'>+      - description: reference clock</div><div class='add'>+      - description: I/O PLL</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_falcon_src</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+      - const: xusb_ss_src</div><div class='add'>+      - const: xusb_hs_src</div><div class='add'>+      - const: xusb_fs_src</div><div class='add'>+      - const: pll_u_480m</div><div class='add'>+      - const: clk_m</div><div class='add'>+      - const: pll_e</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: read client</div><div class='add'>+      - description: write client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,xusb-padctl:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the XUSB pad controller that is used to configure</div><div class='add'>+      the USB pads used by the XHCI controller</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 7</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        - usb2-0</div><div class='add'>+        - usb2-1</div><div class='add'>+        - usb2-2</div><div class='add'>+        - hsic-0</div><div class='add'>+        - usb3-0</div><div class='add'>+        - usb3-1</div><div class='add'>+        - usb3-2</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSBC power domain (for Host and USB 2.0)</div><div class='add'>+      - description: XUSBA power domain (for SuperSpeed)</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+</div><div class='add'>+  dvddio-pex-supply:</div><div class='add'>+    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvddio-pex-supply:</div><div class='add'>+    description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-usb-supply:</div><div class='add'>+    description: USB controller power supply. Must supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-utmip-supply:</div><div class='add'>+    description: UTMI PLL power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-uerefe-supply:</div><div class='add'>+    description: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  dvdd-usb-ss-pll-supply:</div><div class='add'>+    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvdd-usb-ss-pll-e-supply:</div><div class='add'>+    description: High-voltage PLLE power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-xhci.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra186-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra186-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra186-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra186-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@3530000 {</div><div class='add'>+        compatible = "nvidia,tegra186-xusb";</div><div class='add'>+        reg = &lt;0x03530000 0x8000&gt;,</div><div class='add'>+              &lt;0x03538000 0x1000&gt;;</div><div class='add'>+        reg-names = "hcd", "fpci";</div><div class='add'>+        interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA186_CLK_XUSB_HOST&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_XUSB_FALCON&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_XUSB_SS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_XUSB_CORE_SS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_XUSB_FS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_PLLU&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA186_CLK_PLLE&gt;;</div><div class='add'>+        clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss",</div><div class='add'>+                      "xusb_ss_src", "xusb_hs_src", "xusb_fs_src",</div><div class='add'>+                      "pll_u_480m", "clk_m", "pll_e";</div><div class='add'>+        power-domains = &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_XUSBC&gt;,</div><div class='add'>+                        &lt;&amp;bpmp TEGRA186_POWER_DOMAIN_XUSBA&gt;;</div><div class='add'>+        power-domain-names = "xusb_host", "xusb_ss";</div><div class='add'>+        interconnects = &lt;&amp;mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &amp;emc&gt;,</div><div class='add'>+                        &lt;&amp;mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &amp;emc&gt;;</div><div class='add'>+        interconnect-names = "dma-mem", "write";</div><div class='add'>+        iommus = &lt;&amp;smmu TEGRA186_SID_XUSB_HOST&gt;;</div><div class='add'>+        nvidia,xusb-padctl = &lt;&amp;padctl&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        phys = &lt;&amp;phy_usb2_0&gt;, &lt;&amp;phy_usb2_1&gt;, &lt;&amp;phy_usb3_0&gt;;</div><div class='add'>+        phy-names = "usb2-0", "usb2-1", "usb3-0";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra194-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra194-xusb.yaml<br/>new file mode 100644<br/>index 000000000000..b356793f73a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra194-xusb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nvidia,tegra194-xusb.yaml</a></div><div class='hunk'>@@ -0,0 +1,175 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/nvidia,tegra194-xusb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra194 xHCI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: The Tegra xHCI controller supports both USB2 and USB3 interfaces</div><div class='add'>+  exposed by the Tegra XUSB pad controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra194-xusb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: base and length of the xHCI host registers</div><div class='add'>+      - description: base and length of the XUSB FPCI registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hcd</div><div class='add'>+      - const: fpci</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: xHCI host interrupt</div><div class='add'>+      - description: mailbox interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB host clock</div><div class='add'>+      - description: XUSB Falcon source clock</div><div class='add'>+      - description: XUSB SuperSpeed clock</div><div class='add'>+      - description: XUSB SuperSpeed source clock</div><div class='add'>+      - description: XUSB HighSpeed clock source</div><div class='add'>+      - description: XUSB FullSpeed clock source</div><div class='add'>+      - description: USB PLL</div><div class='add'>+      - description: reference clock</div><div class='add'>+      - description: I/O PLL</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_falcon_src</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+      - const: xusb_ss_src</div><div class='add'>+      - const: xusb_hs_src</div><div class='add'>+      - const: xusb_fs_src</div><div class='add'>+      - const: pll_u_480m</div><div class='add'>+      - const: clk_m</div><div class='add'>+      - const: pll_e</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: read client</div><div class='add'>+      - description: write client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,xusb-padctl:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the XUSB pad controller that is used to configure</div><div class='add'>+      the USB pads used by the XHCI controller</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        - usb2-0</div><div class='add'>+        - usb2-1</div><div class='add'>+        - usb2-2</div><div class='add'>+        - usb2-3</div><div class='add'>+        - usb3-0</div><div class='add'>+        - usb3-1</div><div class='add'>+        - usb3-2</div><div class='add'>+        - usb3-3</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSBC power domain (for Host and USB 2.0)</div><div class='add'>+      - description: XUSBA power domain (for SuperSpeed)</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+</div><div class='add'>+  dvddio-pex-supply:</div><div class='add'>+    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvddio-pex-supply:</div><div class='add'>+    description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-usb-supply:</div><div class='add'>+    description: USB controller power supply. Must supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-utmip-supply:</div><div class='add'>+    description: UTMI PLL power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-uerefe-supply:</div><div class='add'>+    description: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  dvdd-usb-ss-pll-supply:</div><div class='add'>+    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvdd-usb-ss-pll-e-supply:</div><div class='add'>+    description: High-voltage PLLE power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-xhci.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra194-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra194-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra194-powergate.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/reset/tegra194-reset.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@3610000 {</div><div class='add'>+        compatible = "nvidia,tegra194-xusb";</div><div class='add'>+        reg = &lt;0x03610000 0x40000&gt;,</div><div class='add'>+              &lt;0x03600000 0x10000&gt;;</div><div class='add'>+        reg-names = "hcd", "fpci";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA194_CLK_XUSB_CORE_HOST&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_XUSB_FALCON&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_XUSB_CORE_SS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_XUSB_SS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_XUSB_FS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_UTMIPLL&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA194_CLK_PLLE&gt;;</div><div class='add'>+        clock-names = "xusb_host", "xusb_falcon_src",</div><div class='add'>+                      "xusb_ss", "xusb_ss_src", "xusb_hs_src",</div><div class='add'>+                      "xusb_fs_src", "pll_u_480m", "clk_m",</div><div class='add'>+                      "pll_e";</div><div class='add'>+        interconnects = &lt;&amp;mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTR &amp;emc&gt;,</div><div class='add'>+                        &lt;&amp;mc TEGRA194_MEMORY_CLIENT_XUSB_HOSTW &amp;emc&gt;;</div><div class='add'>+        interconnect-names = "dma-mem", "write";</div><div class='add'>+        iommus = &lt;&amp;smmu TEGRA194_SID_XUSB_HOST&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_XUSBC&gt;,</div><div class='add'>+                        &lt;&amp;bpmp TEGRA194_POWER_DOMAIN_XUSBA&gt;;</div><div class='add'>+        power-domain-names = "xusb_host", "xusb_ss";</div><div class='add'>+</div><div class='add'>+        nvidia,xusb-padctl = &lt;&amp;xusb_padctl&gt;;</div><div class='add'>+</div><div class='add'>+        phys = &lt;&amp;phy_usb2_0&gt;, &lt;&amp;phy_usb2_1&gt;, &lt;&amp;phy_usb2_3&gt;, &lt;&amp;phy_usb3_0&gt;,</div><div class='add'>+               &lt;&amp;phy_usb3_2&gt;, &lt;&amp;phy_usb3_3&gt;;</div><div class='add'>+        phy-names = "usb2-0", "usb2-1", "usb2-3", "usb3-0", "usb3-2", "usb3-3";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra210-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra210-xusb.yaml<br/>new file mode 100644<br/>index 000000000000..90296613b3a5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra210-xusb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nvidia,tegra210-xusb.yaml</a></div><div class='hunk'>@@ -0,0 +1,195 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/nvidia,tegra210-xusb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra210 xHCI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: The Tegra xHCI controller supports both USB2 and USB3 interfaces</div><div class='add'>+  exposed by the Tegra XUSB pad controller.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra210-xusb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: base and length of the xHCI host registers</div><div class='add'>+      - description: base and length of the XUSB FPCI registers</div><div class='add'>+      - description: base and length of the XUSB IPFS registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hcd</div><div class='add'>+      - const: fpci</div><div class='add'>+      - const: ipfs</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: xHCI host interrupt</div><div class='add'>+      - description: mailbox interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB host clock</div><div class='add'>+      - description: XUSB host source clock</div><div class='add'>+      - description: XUSB Falcon source clock</div><div class='add'>+      - description: XUSB SuperSpeed clock</div><div class='add'>+      - description: XUSB SuperSpeed clock divider</div><div class='add'>+      - description: XUSB SuperSpeed source clock</div><div class='add'>+      - description: XUSB HighSpeed clock source</div><div class='add'>+      - description: XUSB FullSpeed clock source</div><div class='add'>+      - description: USB PLL</div><div class='add'>+      - description: reference clock</div><div class='add'>+      - description: I/O PLL</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_host_src</div><div class='add'>+      - const: xusb_falcon_src</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+      - const: xusb_ss_div2</div><div class='add'>+      - const: xusb_ss_src</div><div class='add'>+      - const: xusb_hs_src</div><div class='add'>+      - const: xusb_fs_src</div><div class='add'>+      - const: pll_u_480m</div><div class='add'>+      - const: clk_m</div><div class='add'>+      - const: pll_e</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: reset for the XUSB host controller</div><div class='add'>+      - description: reset for the SuperSpeed logic</div><div class='add'>+      - description: shared reset for xusb_{ss,hs,fs,falcon,host}_src.</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+      - const: xusb_src</div><div class='add'>+</div><div class='add'>+  nvidia,xusb-padctl:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the XUSB pad controller that is used to configure</div><div class='add'>+      the USB pads used by the XHCI controller</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        - usb2-0</div><div class='add'>+        - usb2-1</div><div class='add'>+        - usb2-2</div><div class='add'>+        - usb2-3</div><div class='add'>+        - hsic-0</div><div class='add'>+        - usb3-0</div><div class='add'>+        - usb3-1</div><div class='add'>+        - usb3-2</div><div class='add'>+        - usb3-3</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSBC power domain (for Host and USB 2.0)</div><div class='add'>+      - description: XUSBA power domain (for SuperSpeed)</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+</div><div class='add'>+  dvddio-pex-supply:</div><div class='add'>+    description: PCIe/USB3 analog logic power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvddio-pex-supply:</div><div class='add'>+    description: High-voltage PCIe/USB3 power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-usb-supply:</div><div class='add'>+    description: USB controller power supply. Must supply 3.3 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-utmip-supply:</div><div class='add'>+    description: UTMI PLL power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+  avdd-pll-uerefe-supply:</div><div class='add'>+    description: PLLE reference PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  dvdd-usb-ss-pll-supply:</div><div class='add'>+    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.</div><div class='add'>+</div><div class='add'>+  hvdd-usb-ss-pll-e-supply:</div><div class='add'>+    description: High-voltage PLLE power supply. Must supply 1.8 V.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-xhci.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra210-car.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@70090000 {</div><div class='add'>+        compatible = "nvidia,tegra210-xusb";</div><div class='add'>+        reg = &lt;0x70090000 0x8000&gt;,</div><div class='add'>+              &lt;0x70098000 0x1000&gt;,</div><div class='add'>+              &lt;0x70099000 0x1000&gt;;</div><div class='add'>+        reg-names = "hcd", "fpci", "ipfs";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;tegra_car TEGRA210_CLK_XUSB_HOST&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_XUSB_HOST_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_XUSB_FALCON_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_XUSB_SS&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_XUSB_SS_DIV2&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_XUSB_SS_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_XUSB_HS_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_XUSB_FS_SRC&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_PLL_U_480M&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car TEGRA210_CLK_PLL_E&gt;;</div><div class='add'>+        clock-names = "xusb_host", "xusb_host_src",</div><div class='add'>+                      "xusb_falcon_src", "xusb_ss",</div><div class='add'>+                      "xusb_ss_div2", "xusb_ss_src",</div><div class='add'>+                      "xusb_hs_src", "xusb_fs_src",</div><div class='add'>+                      "pll_u_480m", "clk_m", "pll_e";</div><div class='add'>+        resets = &lt;&amp;tegra_car 89&gt;, &lt;&amp;tegra_car 156&gt;,</div><div class='add'>+                 &lt;&amp;tegra_car 143&gt;;</div><div class='add'>+        reset-names = "xusb_host", "xusb_ss", "xusb_src";</div><div class='add'>+        power-domains = &lt;&amp;pd_xusbhost&gt;, &lt;&amp;pd_xusbss&gt;;</div><div class='add'>+        power-domain-names = "xusb_host", "xusb_ss";</div><div class='add'>+</div><div class='add'>+        nvidia,xusb-padctl = &lt;&amp;padctl&gt;;</div><div class='add'>+</div><div class='add'>+        phys = &lt;&amp;phy_usb2_0&gt;, &lt;&amp;phy_usb2_1&gt;, &lt;&amp;phy_usb2_2&gt;, &lt;&amp;phy_usb2_3&gt;,</div><div class='add'>+               &lt;&amp;phy_pcie_6&gt;, &lt;&amp;phy_pcie_5&gt;;</div><div class='add'>+        phy-names = "usb2-0", "usb2-1", "usb2-2", "usb2-3", "usb3-0",</div><div class='add'>+                    "usb3-1";</div><div class='add'>+        dvddio-pex-supply = &lt;&amp;vdd_pex_1v05&gt;;</div><div class='add'>+        hvddio-pex-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+        avdd-usb-supply = &lt;&amp;vdd_3v3_sys&gt;;</div><div class='add'>+        avdd-pll-utmip-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+        avdd-pll-uerefe-supply = &lt;&amp;vdd_pex_1v05&gt;;</div><div class='add'>+        dvdd-usb-ss-pll-supply = &lt;&amp;vdd_pex_1v05&gt;;</div><div class='add'>+        hvdd-usb-ss-pll-e-supply = &lt;&amp;vdd_1v8&gt;;</div><div class='add'>+</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        ethernet@1 {</div><div class='add'>+                compatible = "usb955,9ff";</div><div class='add'>+                reg = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml b/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml<br/>new file mode 100644<br/>index 000000000000..db761dcbf72a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml</a></div><div class='hunk'>@@ -0,0 +1,159 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/nvidia,tegra234-xusb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NVIDIA Tegra234 xHCI controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Thierry Reding &lt;thierry.reding@gmail.com&gt;</div><div class='add'>+  - Jon Hunter &lt;jonathanh@nvidia.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by</div><div class='add'>+  the Tegra XUSB pad controller. The xHCI controller controls up to eight</div><div class='add'>+  ports; there are four USB 2.0 ports and four USB 3.2 Gen1 x1 ports.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nvidia,tegra234-xusb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: xHCI host registers</div><div class='add'>+      - description: XUSB FPCI registers</div><div class='add'>+      - description: XUSB bar2 registers</div><div class='add'>+</div><div class='add'>+  reg-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hcd</div><div class='add'>+      - const: fpci</div><div class='add'>+      - const: bar2</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: xHCI host interrupt</div><div class='add'>+      - description: mailbox interrupt</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSB host clock</div><div class='add'>+      - description: XUSB Falcon source clock</div><div class='add'>+      - description: XUSB SuperSpeed clock</div><div class='add'>+      - description: XUSB SuperSpeed source clock</div><div class='add'>+      - description: XUSB HighSpeed clock source</div><div class='add'>+      - description: XUSB FullSpeed clock source</div><div class='add'>+      - description: USB PLL</div><div class='add'>+      - description: reference clock</div><div class='add'>+      - description: I/O PLL</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_falcon_src</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+      - const: xusb_ss_src</div><div class='add'>+      - const: xusb_hs_src</div><div class='add'>+      - const: xusb_fs_src</div><div class='add'>+      - const: pll_u_480m</div><div class='add'>+      - const: clk_m</div><div class='add'>+      - const: pll_e</div><div class='add'>+</div><div class='add'>+  interconnects:</div><div class='add'>+    items:</div><div class='add'>+      - description: read client</div><div class='add'>+      - description: write client</div><div class='add'>+</div><div class='add'>+  interconnect-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: dma-mem # read</div><div class='add'>+      - const: write</div><div class='add'>+</div><div class='add'>+  iommus:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  nvidia,xusb-padctl:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description: phandle to the XUSB pad controller that is used to configure</div><div class='add'>+      the USB pads used by the XHCI controller</div><div class='add'>+</div><div class='add'>+  phys:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+</div><div class='add'>+  phy-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 8</div><div class='add'>+    items:</div><div class='add'>+      enum:</div><div class='add'>+        - usb2-0</div><div class='add'>+        - usb2-1</div><div class='add'>+        - usb2-2</div><div class='add'>+        - usb2-3</div><div class='add'>+        - usb3-0</div><div class='add'>+        - usb3-1</div><div class='add'>+        - usb3-2</div><div class='add'>+        - usb3-3</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    items:</div><div class='add'>+      - description: XUSBC power domain (for Host and USB 2.0)</div><div class='add'>+      - description: XUSBA power domain (for SuperSpeed)</div><div class='add'>+</div><div class='add'>+  power-domain-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: xusb_host</div><div class='add'>+      - const: xusb_ss</div><div class='add'>+</div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-xhci.yaml</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/tegra234-clock.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/memory/tegra234-mc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/tegra234-powergate.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@3610000 {</div><div class='add'>+        compatible = "nvidia,tegra234-xusb";</div><div class='add'>+        reg = &lt;0x03610000 0x40000&gt;,</div><div class='add'>+              &lt;0x03600000 0x10000&gt;,</div><div class='add'>+              &lt;0x03650000 0x10000&gt;;</div><div class='add'>+        reg-names = "hcd", "fpci", "bar2";</div><div class='add'>+</div><div class='add'>+        interrupts = &lt;GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+</div><div class='add'>+        clocks = &lt;&amp;bpmp TEGRA234_CLK_XUSB_CORE_HOST&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_XUSB_FALCON&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_XUSB_CORE_SS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_XUSB_SS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_XUSB_FS&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_UTMIP_PLL&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_CLK_M&gt;,</div><div class='add'>+                 &lt;&amp;bpmp TEGRA234_CLK_PLLE&gt;;</div><div class='add'>+        clock-names = "xusb_host", "xusb_falcon_src",</div><div class='add'>+                      "xusb_ss", "xusb_ss_src", "xusb_hs_src",</div><div class='add'>+                      "xusb_fs_src", "pll_u_480m", "clk_m",</div><div class='add'>+                      "pll_e";</div><div class='add'>+        interconnects = &lt;&amp;mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &amp;emc&gt;,</div><div class='add'>+                        &lt;&amp;mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &amp;emc&gt;;</div><div class='add'>+        interconnect-names = "dma-mem", "write";</div><div class='add'>+        iommus = &lt;&amp;smmu_niso1 TEGRA234_SID_XUSB_HOST&gt;;</div><div class='add'>+</div><div class='add'>+        power-domains = &lt;&amp;bpmp TEGRA234_POWER_DOMAIN_XUSBC&gt;,</div><div class='add'>+                        &lt;&amp;bpmp TEGRA234_POWER_DOMAIN_XUSBA&gt;;</div><div class='add'>+        power-domain-names = "xusb_host", "xusb_ss";</div><div class='add'>+</div><div class='add'>+        nvidia,xusb-padctl = &lt;&amp;xusb_padctl&gt;;</div><div class='add'>+</div><div class='add'>+        phys = &lt;&amp;pad_lanes_usb2_0&gt;;</div><div class='add'>+        phy-names = "usb2-0";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nxp,isp1760.yaml b/Documentation/devicetree/bindings/usb/nxp,isp1760.yaml<br/>index f238848ad094..e2743a4b9520 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nxp,isp1760.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/nxp,isp1760.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nxp,isp1760.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nxp,isp1760.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/nxp,isp1760.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: NXP ISP1760 family controller bindings</div><div class='add'>+title: NXP ISP1760 family controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sebastian Siewior &lt;bigeasy@linutronix.de&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/nxp,ptn5110.yaml b/Documentation/devicetree/bindings/usb/nxp,ptn5110.yaml<br/>new file mode 100644<br/>index 000000000000..28eb25ecba74<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/nxp,ptn5110.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/nxp,ptn5110.yaml</a></div><div class='hunk'>@@ -0,0 +1,72 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/nxp,ptn5110.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: NXP PTN5110 Typec Port Cotroller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Li Jun &lt;jun.li@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: nxp,ptn5110</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  connector:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - connector</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        tcpci@50 {</div><div class='add'>+            compatible = "nxp,ptn5110";</div><div class='add'>+            reg = &lt;0x50&gt;;</div><div class='add'>+            interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='add'>+            interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+</div><div class='add'>+            usb_con: connector {</div><div class='add'>+                compatible = "usb-c-connector";</div><div class='add'>+                label = "USB-C";</div><div class='add'>+                data-role = "dual";</div><div class='add'>+                power-role = "dual";</div><div class='add'>+                try-power-role = "sink";</div><div class='add'>+                source-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)&gt;;</div><div class='add'>+                sink-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM) PDO_VAR(5000, 12000, 2000)&gt;;</div><div class='add'>+                op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+</div><div class='add'>+                ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+                    port@0 {</div><div class='add'>+                       reg = &lt;0&gt;;</div><div class='add'>+                       typec1_dr_sw: endpoint {</div><div class='add'>+                           remote-endpoint = &lt;&amp;usb1_drd_sw&gt;;</div><div class='add'>+                       };</div><div class='add'>+                    };</div><div class='add'>+                };</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ohci-nxp.txt b/Documentation/devicetree/bindings/usb/ohci-nxp.txt<br/>deleted file mode 100644<br/>index 71e28c1017ed..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ohci-nxp.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ohci-nxp.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,24 +0,0 @@</div><div class='del'>-* OHCI controller, NXP ohci-nxp variant</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "nxp,ohci-nxp"</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- interrupts: The OHCI interrupt</div><div class='del'>-- transceiver: phandle of the associated ISP1301 device - this is necessary for</div><div class='del'>-               the UDC controller for connecting to the USB physical layer</div><div class='del'>-</div><div class='del'>-Example (LPC32xx):</div><div class='del'>-</div><div class='del'>-	isp1301: usb-transceiver@2c {</div><div class='del'>-		compatible = "nxp,isp1301";</div><div class='del'>-		reg = &lt;0x2c&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	ohci@31020000 {</div><div class='del'>-		compatible = "nxp,ohci-nxp";</div><div class='del'>-		reg = &lt;0x31020000 0x300&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;mic&gt;;</div><div class='del'>-		interrupts = &lt;0x3b 0&gt;;</div><div class='del'>-		transceiver = &lt;&amp;isp1301&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ohci-omap3.txt b/Documentation/devicetree/bindings/usb/ohci-omap3.txt<br/>deleted file mode 100644<br/>index ce8c47cff6d0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ohci-omap3.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ohci-omap3.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,15 +0,0 @@</div><div class='del'>-OMAP HS USB OHCI controller (OMAP3 and later)</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible: should be "ti,ohci-omap3"</div><div class='del'>-- reg: should contain one register range i.e. start and length</div><div class='del'>-- interrupts: description of the interrupt line</div><div class='del'>-</div><div class='del'>-Example for OMAP4:</div><div class='del'>-</div><div class='del'>-usbhsohci: ohci@4a064800 {</div><div class='del'>-	compatible = "ti,ohci-omap3";</div><div class='del'>-	reg = &lt;0x4a064800 0x400&gt;;</div><div class='del'>-	interrupts = &lt;0 76 0x4&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ohci-st.txt b/Documentation/devicetree/bindings/usb/ohci-st.txt<br/>index 44c998c16f85..1c735573abc0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ohci-st.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ohci-st.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ohci-st.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ohci-st.txt</a></div><div class='hunk'>@@ -15,7 +15,7 @@ See: Documentation/devicetree/bindings/clock/clock-bindings.txt</div><div class='ctx'> </div><div class='ctx'>  - resets		: phandle to the powerdown and reset controller for the USB IP</div><div class='ctx'>  - reset-names		: should be "power" and "softreset".</div><div class='del'>-See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt</div><div class='add'>+See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml</div><div class='ctx'> See: Documentation/devicetree/bindings/reset/reset.txt</div><div class='ctx'> </div><div class='ctx'> Example:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/pxa-usb.txt b/Documentation/devicetree/bindings/usb/pxa-usb.txt<br/>index 9c331799b87c..53fdae4fa6f6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/pxa-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/pxa-usb.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/pxa-usb.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/pxa-usb.txt</a></div><div class='hunk'>@@ -22,7 +22,7 @@ Optional properties:</div><div class='ctx'> Example:</div><div class='ctx'> </div><div class='ctx'> 	usb0: ohci@4c000000 {</div><div class='del'>-		compatible = "marvell,pxa-ohci", "usb-ohci";</div><div class='add'>+		compatible = "marvell,pxa-ohci";</div><div class='ctx'> 		reg = &lt;0x4c000000 0x100000&gt;;</div><div class='ctx'> 		interrupts = &lt;18&gt;;</div><div class='ctx'> 		marvell,enable-port1;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml<br/>index ce252db2aab3..d84281926f10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/qcom,dwc3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/qcom,dwc3.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Qualcomm SuperSpeed DWC3 USB SoC controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Manu Gautam &lt;mgautam@codeaurora.org&gt;</div><div class='add'>+  - Wesley Cheng &lt;quic_wcheng@quicinc.com&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -16,21 +16,31 @@ properties:</div><div class='ctx'>           - qcom,ipq4019-dwc3</div><div class='ctx'>           - qcom,ipq6018-dwc3</div><div class='ctx'>           - qcom,ipq8064-dwc3</div><div class='add'>+          - qcom,ipq8074-dwc3</div><div class='ctx'>           - qcom,msm8953-dwc3</div><div class='add'>+          - qcom,msm8994-dwc3</div><div class='ctx'>           - qcom,msm8996-dwc3</div><div class='ctx'>           - qcom,msm8998-dwc3</div><div class='add'>+          - qcom,qcm2290-dwc3</div><div class='add'>+          - qcom,qcs404-dwc3</div><div class='ctx'>           - qcom,sc7180-dwc3</div><div class='ctx'>           - qcom,sc7280-dwc3</div><div class='add'>+          - qcom,sc8280xp-dwc3</div><div class='ctx'>           - qcom,sdm660-dwc3</div><div class='add'>+          - qcom,sdm670-dwc3</div><div class='ctx'>           - qcom,sdm845-dwc3</div><div class='ctx'>           - qcom,sdx55-dwc3</div><div class='add'>+          - qcom,sdx65-dwc3</div><div class='ctx'>           - qcom,sm4250-dwc3</div><div class='ctx'>           - qcom,sm6115-dwc3</div><div class='add'>+          - qcom,sm6125-dwc3</div><div class='ctx'>           - qcom,sm6350-dwc3</div><div class='add'>+          - qcom,sm6375-dwc3</div><div class='ctx'>           - qcom,sm8150-dwc3</div><div class='ctx'>           - qcom,sm8250-dwc3</div><div class='ctx'>           - qcom,sm8350-dwc3</div><div class='ctx'>           - qcom,sm8450-dwc3</div><div class='add'>+          - qcom,sm8550-dwc3</div><div class='ctx'>       - const: qcom,dwc3</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='hunk'>@@ -49,27 +59,26 @@ properties:</div><div class='ctx'>     description: specifies a phandle to PM domain provider node</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  required-opps:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   clocks:</div><div class='del'>-    description:</div><div class='del'>-      A list of phandle and clock-specifier pairs for the clocks</div><div class='del'>-      listed in clock-names.</div><div class='del'>-    items:</div><div class='del'>-      - description: System Config NOC clock.</div><div class='del'>-      - description: Master/Core clock, has to be &gt;= 125 MHz</div><div class='del'>-          for SS operation and &gt;= 60MHz for HS operation.</div><div class='del'>-      - description: System bus AXI clock.</div><div class='del'>-      - description: Mock utmi clock needed for ITP/SOF generation</div><div class='del'>-          in host mode. Its frequency should be 19.2MHz.</div><div class='del'>-      - description: Sleep clock, used for wakeup when</div><div class='del'>-          USB3 core goes into low power mode (U3).</div><div class='add'>+    description: |</div><div class='add'>+      Several clocks are used, depending on the variant. Typical ones are::</div><div class='add'>+       - cfg_noc:: System Config NOC clock.</div><div class='add'>+       - core:: Master/Core clock, has to be &gt;= 125 MHz for SS operation and &gt;=</div><div class='add'>+                60MHz for HS operation.</div><div class='add'>+       - iface:: System bus AXI clock.</div><div class='add'>+       - sleep:: Sleep clock, used for wakeup when USB3 core goes into low</div><div class='add'>+                 power mode (U3).</div><div class='add'>+       - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host</div><div class='add'>+                     mode. Its frequency should be 19.2MHz.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: cfg_noc</div><div class='del'>-      - const: core</div><div class='del'>-      - const: iface</div><div class='del'>-      - const: mock_utmi</div><div class='del'>-      - const: sleep</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 9</div><div class='ctx'> </div><div class='ctx'>   assigned-clocks:</div><div class='ctx'>     items:</div><div class='hunk'>@@ -92,20 +101,12 @@ properties:</div><div class='ctx'>       - const: apps-usb</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='del'>-    items:</div><div class='del'>-      - description: The interrupt that is asserted</div><div class='del'>-          when a wakeup event is received on USB2 bus.</div><div class='del'>-      - description: The interrupt that is asserted</div><div class='del'>-          when a wakeup event is received on USB3 bus.</div><div class='del'>-      - description: Wakeup event on DM line.</div><div class='del'>-      - description: Wakeup event on DP line.</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   interrupt-names:</div><div class='del'>-    items:</div><div class='del'>-      - const: hs_phy_irq</div><div class='del'>-      - const: ss_phy_irq</div><div class='del'>-      - const: dm_hs_phy_irq</div><div class='del'>-      - const: dp_hs_phy_irq</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 4</div><div class='ctx'> </div><div class='ctx'>   qcom,select-utmi-as-pipe-clk:</div><div class='ctx'>     description:</div><div class='hunk'>@@ -114,11 +115,17 @@ properties:</div><div class='ctx'>       HS/FS/LS modes are supported.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='ctx'> # Required child node:</div><div class='ctx'> </div><div class='ctx'> patternProperties:</div><div class='ctx'>   "^usb@[0-9a-f]+$":</div><div class='ctx'>     $ref: snps,dwc3.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      wakeup-source: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='hunk'>@@ -132,6 +139,322 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - interrupt-names</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq4019-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 3</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq8064-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          items:</div><div class='add'>+            - description: Master/Core clock, has to be &gt;= 125 MHz</div><div class='add'>+                for SS operation and &gt;= 60MHz for HS operation.</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8953-dwc3</div><div class='add'>+              - qcom,msm8996-dwc3</div><div class='add'>+              - qcom,msm8998-dwc3</div><div class='add'>+              - qcom,sc7180-dwc3</div><div class='add'>+              - qcom,sc7280-dwc3</div><div class='add'>+              - qcom,sdm670-dwc3</div><div class='add'>+              - qcom,sdm845-dwc3</div><div class='add'>+              - qcom,sdx55-dwc3</div><div class='add'>+              - qcom,sm6350-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 5</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cfg_noc</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq6018-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          oneOf:</div><div class='add'>+            - items:</div><div class='add'>+                - const: core</div><div class='add'>+                - const: sleep</div><div class='add'>+                - const: mock_utmi</div><div class='add'>+            - items:</div><div class='add'>+                - const: cfg_noc</div><div class='add'>+                - const: core</div><div class='add'>+                - const: sleep</div><div class='add'>+                - const: mock_utmi</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq8074-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cfg_noc</div><div class='add'>+            - const: core</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8994-dwc3</div><div class='add'>+              - qcom,qcs404-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8280xp-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 9</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cfg_noc</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+            - const: noc_aggr</div><div class='add'>+            - const: noc_aggr_north</div><div class='add'>+            - const: noc_aggr_south</div><div class='add'>+            - const: noc_sys</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm660-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cfg_noc</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+            - const: bus</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,qcm2290-dwc3</div><div class='add'>+              - qcom,sm6115-dwc3</div><div class='add'>+              - qcom,sm6125-dwc3</div><div class='add'>+              - qcom,sm8150-dwc3</div><div class='add'>+              - qcom,sm8250-dwc3</div><div class='add'>+              - qcom,sm8450-dwc3</div><div class='add'>+              - qcom,sm8550-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: cfg_noc</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+            - const: xo</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sm8350-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 5</div><div class='add'>+          maxItems: 6</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 5</div><div class='add'>+          items:</div><div class='add'>+            - const: cfg_noc</div><div class='add'>+            - const: core</div><div class='add'>+            - const: iface</div><div class='add'>+            - const: sleep</div><div class='add'>+            - const: mock_utmi</div><div class='add'>+            - const: xo</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,ipq4019-dwc3</div><div class='add'>+              - qcom,ipq6018-dwc3</div><div class='add'>+              - qcom,ipq8064-dwc3</div><div class='add'>+              - qcom,ipq8074-dwc3</div><div class='add'>+              - qcom,msm8994-dwc3</div><div class='add'>+              - qcom,qcs404-dwc3</div><div class='add'>+              - qcom,sc7180-dwc3</div><div class='add'>+              - qcom,sdm670-dwc3</div><div class='add'>+              - qcom,sdm845-dwc3</div><div class='add'>+              - qcom,sdx55-dwc3</div><div class='add'>+              - qcom,sdx65-dwc3</div><div class='add'>+              - qcom,sm4250-dwc3</div><div class='add'>+              - qcom,sm6125-dwc3</div><div class='add'>+              - qcom,sm6350-dwc3</div><div class='add'>+              - qcom,sm8150-dwc3</div><div class='add'>+              - qcom,sm8250-dwc3</div><div class='add'>+              - qcom,sm8350-dwc3</div><div class='add'>+              - qcom,sm8450-dwc3</div><div class='add'>+              - qcom,sm8550-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          items:</div><div class='add'>+            - description: The interrupt that is asserted</div><div class='add'>+                when a wakeup event is received on USB2 bus.</div><div class='add'>+            - description: The interrupt that is asserted</div><div class='add'>+                when a wakeup event is received on USB3 bus.</div><div class='add'>+            - description: Wakeup event on DM line.</div><div class='add'>+            - description: Wakeup event on DP line.</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hs_phy_irq</div><div class='add'>+            - const: ss_phy_irq</div><div class='add'>+            - const: dm_hs_phy_irq</div><div class='add'>+            - const: dp_hs_phy_irq</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,msm8953-dwc3</div><div class='add'>+              - qcom,msm8996-dwc3</div><div class='add'>+              - qcom,msm8998-dwc3</div><div class='add'>+              - qcom,sm6115-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 2</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: hs_phy_irq</div><div class='add'>+            - const: ss_phy_irq</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sdm660-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 1</div><div class='add'>+          maxItems: 2</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - const: hs_phy_irq</div><div class='add'>+            - const: ss_phy_irq</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc7280-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 3</div><div class='add'>+          maxItems: 4</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 3</div><div class='add'>+          items:</div><div class='add'>+            - const: hs_phy_irq</div><div class='add'>+            - const: dp_hs_phy_irq</div><div class='add'>+            - const: dm_hs_phy_irq</div><div class='add'>+            - const: ss_phy_irq</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - qcom,sc8280xp-dwc3</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          maxItems: 4</div><div class='add'>+        interrupt-names:</div><div class='add'>+          items:</div><div class='add'>+            - const: pwr_event</div><div class='add'>+            - const: dp_hs_phy_irq</div><div class='add'>+            - const: dm_hs_phy_irq</div><div class='add'>+            - const: ss_phy_irq</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -153,10 +476,13 @@ examples:</div><div class='ctx'>             clocks = &lt;&amp;gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK&gt;,</div><div class='ctx'>                      &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;,</div><div class='ctx'>                      &lt;&amp;gcc GCC_AGGRE_USB3_PRIM_AXI_CLK&gt;,</div><div class='del'>-                     &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='del'>-                     &lt;&amp;gcc GCC_USB30_PRIM_SLEEP_CLK&gt;;</div><div class='del'>-            clock-names = "cfg_noc", "core", "iface", "mock_utmi",</div><div class='del'>-                      "sleep";</div><div class='add'>+                     &lt;&amp;gcc GCC_USB30_PRIM_SLEEP_CLK&gt;,</div><div class='add'>+                     &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;;</div><div class='add'>+            clock-names = "cfg_noc",</div><div class='add'>+                          "core",</div><div class='add'>+                          "iface",</div><div class='add'>+                          "sleep",</div><div class='add'>+                          "mock_utmi";</div><div class='ctx'> </div><div class='ctx'>             assigned-clocks = &lt;&amp;gcc GCC_USB30_PRIM_MOCK_UTMI_CLK&gt;,</div><div class='ctx'>                           &lt;&amp;gcc GCC_USB30_PRIM_MASTER_CLK&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml b/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml<br/>index 04ee255eb4f0..9309f003cd07 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/realtek,rts5411.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/realtek,rts5411.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/realtek,rts5411.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/realtek,rts5411.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Binding for the Realtek RTS5411 USB 3.0 hub controller</div><div class='add'>+title: Realtek RTS5411 USB 3.0 hub controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Matthias Kaehlcke &lt;mka@chromium.org&gt;</div><div class='hunk'>@@ -25,13 +25,13 @@ properties:</div><div class='ctx'>     description:</div><div class='ctx'>       phandle to the regulator that provides power to the hub.</div><div class='ctx'> </div><div class='del'>-  companion-hub:</div><div class='del'>-    $ref: '/schemas/types.yaml#/definitions/phandle'</div><div class='add'>+  peer-hub:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'>     description:</div><div class='del'>-      phandle to the companion hub on the controller.</div><div class='add'>+      phandle to the peer hub on the controller.</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='del'>-  - companion-hub</div><div class='add'>+  - peer-hub</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='hunk'>@@ -49,7 +49,7 @@ examples:</div><div class='ctx'>             compatible = "usbbda,5411";</div><div class='ctx'>             reg = &lt;1&gt;;</div><div class='ctx'>             vdd-supply = &lt;&amp;pp3300_hub&gt;;</div><div class='del'>-            companion-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+            peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'> </div><div class='ctx'>         /* 3.0 hub on port 2 */</div><div class='hunk'>@@ -57,6 +57,6 @@ examples:</div><div class='ctx'>             compatible = "usbbda,411";</div><div class='ctx'>             reg = &lt;2&gt;;</div><div class='ctx'>             vdd-supply = &lt;&amp;pp3300_hub&gt;;</div><div class='del'>-            companion-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+            peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml b/Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml<br/>new file mode 100644<br/>index 000000000000..b6e84a2a6925<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/renesas,rzn1-usbf.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/N1 SoCs USBF (USB Function) controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+   The Renesas USBF controller is an USB2.0 device</div><div class='add'>+   controller (UDC).</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Herve Codina &lt;herve.codina@bootlin.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a06g032-usbf</div><div class='add'>+      - const: renesas,rzn1-usbf</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Internal bus clock (AHB) for Function</div><div class='add'>+      - description: Internal bus clock (AHB) for Power Management</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: hclkf</div><div class='add'>+      - const: hclkpm</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: The USBF EPC interrupt</div><div class='add'>+      - description: The USBF AHB-EPC interrupt</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a06g032-sysctrl.h&gt;</div><div class='add'>+</div><div class='add'>+    usb@4001e000 {</div><div class='add'>+        compatible = "renesas,r9a06g032-usbf", "renesas,rzn1-usbf";</div><div class='add'>+        reg = &lt;0x4001e000 0x2000&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;sysctrl R9A06G032_HCLK_USBF&gt;,</div><div class='add'>+                 &lt;&amp;sysctrl R9A06G032_HCLK_USBPM&gt;;</div><div class='add'>+        clock-names = "hclkf", "hclkpm";</div><div class='add'>+        power-domains = &lt;&amp;sysctrl&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/renesas,rzv2m-usb3drd.yaml b/Documentation/devicetree/bindings/usb/renesas,rzv2m-usb3drd.yaml<br/>new file mode 100644<br/>index 000000000000..ff625600d9af<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,rzv2m-usb3drd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/renesas,rzv2m-usb3drd.yaml</a></div><div class='hunk'>@@ -0,0 +1,129 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/renesas,rzv2m-usb3drd.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Renesas RZ/V2M USB 3.1 DRD controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Biju Das &lt;biju.das.jz@bp.renesas.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RZ/V2{M, MA} USB3.1 DRD module supports the following functions</div><div class='add'>+  * Role swapping function by the ID pin of the Micro-AB receptacle</div><div class='add'>+  * Battery Charging Specification Revision 1.2</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - enum:</div><div class='add'>+          - renesas,r9a09g011-usb3drd  # RZ/V2M</div><div class='add'>+          - renesas,r9a09g055-usb3drd  # RZ/V2MA</div><div class='add'>+      - const: renesas,rzv2m-usb3drd</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Dual Role Device (DRD)</div><div class='add'>+      - description: Battery Charging</div><div class='add'>+      - description: Global Purpose Input</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: drd</div><div class='add'>+      - const: bc</div><div class='add'>+      - const: gpi</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: Peripheral AXI clock</div><div class='add'>+      - description: APB clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: reg</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    enum: [ 1, 2 ]</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^usb3peri@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/usb/renesas,usb3-peri.yaml</div><div class='add'>+</div><div class='add'>+  "^usb@[0-9a-f]+$":</div><div class='add'>+    type: object</div><div class='add'>+    $ref: renesas,usb-xhci.yaml#</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - interrupt-names</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - power-domains</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/r9a09g011-cpg.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    usb3drd: usb@85070400 {</div><div class='add'>+        compatible = "renesas,r9a09g011-usb3drd", "renesas,rzv2m-usb3drd";</div><div class='add'>+        reg = &lt;0x85070400 0x100&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH&gt;,</div><div class='add'>+                     &lt;GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        interrupt-names = "drd", "bc", "gpi";</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD R9A09G011_USB_ACLK_P&gt;,</div><div class='add'>+                 &lt;&amp;cpg CPG_MOD R9A09G011_USB_PCLK&gt;;</div><div class='add'>+        clock-names = "axi", "reg";</div><div class='add'>+        power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg R9A09G011_USB_DRD_RESET&gt;;</div><div class='add'>+        ranges;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;1&gt;;</div><div class='add'>+</div><div class='add'>+        usb3host: usb@85060000 {</div><div class='add'>+           compatible = "renesas,r9a09g011-xhci",</div><div class='add'>+                        "renesas,rzv2m-xhci";</div><div class='add'>+           reg = &lt;0x85060000 0x2000&gt;;</div><div class='add'>+           interrupts = &lt;GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+           clocks = &lt;&amp;cpg CPG_MOD R9A09G011_USB_ACLK_H&gt;,</div><div class='add'>+                    &lt;&amp;cpg CPG_MOD R9A09G011_USB_PCLK&gt;;</div><div class='add'>+           clock-names = "axi", "reg";</div><div class='add'>+           power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+           resets = &lt;&amp;cpg R9A09G011_USB_ARESETN_H&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        usb3peri: usb3peri@85070000 {</div><div class='add'>+           compatible = "renesas,r9a09g011-usb3-peri",</div><div class='add'>+                        "renesas,rzv2m-usb3-peri";</div><div class='add'>+           reg = &lt;0x85070000 0x400&gt;;</div><div class='add'>+           interrupts = &lt;GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+           clocks = &lt;&amp;cpg CPG_MOD R9A09G011_USB_ACLK_P&gt;,</div><div class='add'>+                    &lt;&amp;cpg CPG_MOD R9A09G011_USB_PCLK&gt;;</div><div class='add'>+           clock-names = "axi", "reg";</div><div class='add'>+           power-domains = &lt;&amp;cpg&gt;;</div><div class='add'>+           resets = &lt;&amp;cpg R9A09G011_USB_ARESETN_P&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml b/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml<br/>index 4c5efaf02308..1a07c0d2b1b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml</a></div><div class='hunk'>@@ -10,9 +10,6 @@ maintainers:</div><div class='ctx'>   - Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;</div><div class='ctx'>   - Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "usb-xhci.yaml"</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -37,6 +34,11 @@ properties:</div><div class='ctx'>               - renesas,xhci-r8a77965 # R-Car M3-N</div><div class='ctx'>               - renesas,xhci-r8a77990 # R-Car E3</div><div class='ctx'>           - const: renesas,rcar-gen3-xhci # R-Car Gen3 and RZ/G2</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a09g011-xhci # RZ/V2M</div><div class='add'>+              - renesas,r9a09g055-xhci # RZ/V2MA</div><div class='add'>+          - const: renesas,rzv2m-xhci  # RZ/{V2M, V2MA}</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -45,7 +47,16 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Main clock for host</div><div class='add'>+      - description: Register access clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: reg</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -68,6 +79,28 @@ required:</div><div class='ctx'>   - power-domains</div><div class='ctx'>   - resets</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-xhci.yaml</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,rzv2m-xhci</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml b/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml<br/>index 9fcf54b10b07..b2b811a0ade8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml</a></div><div class='hunk'>@@ -11,18 +11,25 @@ maintainers:</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='del'>-    items:</div><div class='del'>-      - enum:</div><div class='del'>-          - renesas,r8a774a1-usb3-peri # RZ/G2M</div><div class='del'>-          - renesas,r8a774b1-usb3-peri # RZ/G2N</div><div class='del'>-          - renesas,r8a774c0-usb3-peri # RZ/G2E</div><div class='del'>-          - renesas,r8a774e1-usb3-peri # RZ/G2H</div><div class='del'>-          - renesas,r8a7795-usb3-peri  # R-Car H3</div><div class='del'>-          - renesas,r8a7796-usb3-peri  # R-Car M3-W</div><div class='del'>-          - renesas,r8a77961-usb3-peri # R-Car M3-W+</div><div class='del'>-          - renesas,r8a77965-usb3-peri # R-Car M3-N</div><div class='del'>-          - renesas,r8a77990-usb3-peri # R-Car E3</div><div class='del'>-      - const: renesas,rcar-gen3-usb3-peri</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r8a774a1-usb3-peri # RZ/G2M</div><div class='add'>+              - renesas,r8a774b1-usb3-peri # RZ/G2N</div><div class='add'>+              - renesas,r8a774c0-usb3-peri # RZ/G2E</div><div class='add'>+              - renesas,r8a774e1-usb3-peri # RZ/G2H</div><div class='add'>+              - renesas,r8a7795-usb3-peri  # R-Car H3</div><div class='add'>+              - renesas,r8a7796-usb3-peri  # R-Car M3-W</div><div class='add'>+              - renesas,r8a77961-usb3-peri # R-Car M3-W+</div><div class='add'>+              - renesas,r8a77965-usb3-peri # R-Car M3-N</div><div class='add'>+              - renesas,r8a77990-usb3-peri # R-Car E3</div><div class='add'>+          - const: renesas,rcar-gen3-usb3-peri</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a09g011-usb3-peri # RZ/V2M</div><div class='add'>+              - renesas,r9a09g055-usb3-peri # RZ/V2MA</div><div class='add'>+          - const: renesas,rzv2m-usb3-peri</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -31,7 +38,16 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='del'>-    maxItems: 1</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Main clock</div><div class='add'>+      - description: Register access clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: axi</div><div class='add'>+      - const: reg</div><div class='ctx'> </div><div class='ctx'>   phys:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -78,6 +94,27 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,rzv2m-usb3-peri</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          minItems: 2</div><div class='add'>+        clock-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+      required:</div><div class='add'>+        - clock-names</div><div class='add'>+        - resets</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml<br/>index 0bb841b28003..bad55dfb2fa0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/renesas,usbhs.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/renesas,usbhs.yaml</a></div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - renesas,usbhs-r7s9210   # RZ/A2</div><div class='add'>+              - renesas,usbhs-r9a07g043 # RZ/G2UL</div><div class='ctx'>               - renesas,usbhs-r9a07g044 # RZ/G2{L,LC}</div><div class='ctx'>               - renesas,usbhs-r9a07g054 # RZ/V2L</div><div class='ctx'>           - const: renesas,rza2-usbhs</div><div class='hunk'>@@ -118,6 +119,7 @@ allOf:</div><div class='ctx'>         compatible:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='add'>+              - renesas,usbhs-r9a07g043</div><div class='ctx'>               - renesas,usbhs-r9a07g044</div><div class='ctx'>               - renesas,usbhs-r9a07g054</div><div class='ctx'>     then:</div><div class='hunk'>@@ -128,6 +130,8 @@ allOf:</div><div class='ctx'>             - description: U2P_INT_DMA[0]</div><div class='ctx'>             - description: U2P_INT_DMA[1]</div><div class='ctx'>             - description: U2P_INT_DMAERR</div><div class='add'>+      required:</div><div class='add'>+        - resets</div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml b/Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml<br/>new file mode 100644<br/>index 000000000000..8da4d2ad1a91<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/richtek,rt1711h.yaml</a></div><div class='hunk'>@@ -0,0 +1,100 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/richtek,rt1711h.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Richtek RT1711H Type-C Port Switch and Power Delivery controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Gene Chen &lt;gene_chen@richtek.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The RT1711H is a USB Type-C controller that complies with the latest</div><div class='add'>+  USB Type-C and PD standards. It does the USB Type-C detection including attach</div><div class='add'>+  and orientation. It integrates the physical layer of the USB BMC power</div><div class='add'>+  delivery protocol to allow up to 100W of power. The BMC PD block enables full</div><div class='add'>+  support for alternative interfaces of the Type-C specification.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - richtek,rt1711h</div><div class='add'>+      - richtek,rt1715</div><div class='add'>+    description:</div><div class='add'>+      RT1711H support PD20, RT1715 support PD30 except Fast Role Swap.</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  connector:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    description:</div><div class='add'>+      Properties for usb c connector.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - connector</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/usb/pd.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      rt1711h@4e {</div><div class='add'>+        compatible = "richtek,rt1711h";</div><div class='add'>+        reg = &lt;0x4e&gt;;</div><div class='add'>+        interrupts-extended = &lt;&amp;gpio26 3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+        wakeup-source;</div><div class='add'>+</div><div class='add'>+        connector {</div><div class='add'>+          compatible = "usb-c-connector";</div><div class='add'>+          label = "USB-C";</div><div class='add'>+          data-role = "dual";</div><div class='add'>+          power-role = "dual";</div><div class='add'>+          try-power-role = "sink";</div><div class='add'>+          source-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+          sink-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)&gt;;</div><div class='add'>+          op-sink-microwatt = &lt;10000000&gt;;</div><div class='add'>+</div><div class='add'>+          ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+            port@0 {</div><div class='add'>+              reg = &lt;0&gt;;</div><div class='add'>+              endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;usb_hs&gt;;</div><div class='add'>+              };</div><div class='add'>+            };</div><div class='add'>+            port@1 {</div><div class='add'>+              reg = &lt;1&gt;;</div><div class='add'>+              endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;usb_ss&gt;;</div><div class='add'>+              };</div><div class='add'>+            };</div><div class='add'>+            port@2 {</div><div class='add'>+              reg = &lt;2&gt;;</div><div class='add'>+              endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;dp_aux&gt;;</div><div class='add'>+              };</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml b/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml<br/>index 65a93f7738d5..4ced2f68e2a9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/richtek,rt1719.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/richtek,rt1719.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/richtek,rt1719.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/richtek,rt1719.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/richtek,rt1719.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Richtek RT1719 sink-only Type-C PD controller bindings</div><div class='add'>+title: Richtek RT1719 sink-only Type-C PD controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - ChiYuan Huang &lt;cy_huang@richtek.com&gt;</div><div class='hunk'>@@ -48,7 +48,7 @@ required:</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>       #address-cells = &lt;1&gt;;</div><div class='ctx'>       #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml<br/>index b3798d94d2fd..291844c8f3e1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml</a></div><div class='hunk'>@@ -29,7 +29,6 @@ select:</div><div class='ctx'>       contains:</div><div class='ctx'>         enum:</div><div class='ctx'>           - rockchip,rk3328-dwc3</div><div class='del'>-          - rockchip,rk3399-dwc3</div><div class='ctx'>           - rockchip,rk3568-dwc3</div><div class='ctx'>   required:</div><div class='ctx'>     - compatible</div><div class='hunk'>@@ -39,7 +38,6 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - rockchip,rk3328-dwc3</div><div class='del'>-          - rockchip,rk3399-dwc3</div><div class='ctx'>           - rockchip,rk3568-dwc3</div><div class='ctx'>       - const: snps,dwc3</div><div class='ctx'> </div><div class='hunk'>@@ -90,7 +88,7 @@ required:</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3328-cru.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     bus {</div><div class='hunk'>@@ -98,11 +96,11 @@ examples:</div><div class='ctx'>       #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='ctx'>       usbdrd3_0: usb@fe800000 {</div><div class='del'>-        compatible = "rockchip,rk3399-dwc3", "snps,dwc3";</div><div class='add'>+        compatible = "rockchip,rk3328-dwc3", "snps,dwc3";</div><div class='ctx'>         reg = &lt;0x0 0xfe800000 0x0 0x100000&gt;;</div><div class='ctx'>         interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-        clocks = &lt;&amp;cru SCLK_USB3OTG0_REF&gt;, &lt;&amp;cru SCLK_USB3OTG0_SUSPEND&gt;,</div><div class='del'>-                 &lt;&amp;cru ACLK_USB3OTG0&gt;, &lt;&amp;cru ACLK_USB3_GRF&gt;;</div><div class='add'>+        clocks = &lt;&amp;cru SCLK_USB3OTG_REF&gt;, &lt;&amp;cru SCLK_USB3OTG_SUSPEND&gt;,</div><div class='add'>+                 &lt;&amp;cru ACLK_USB3OTG&gt;;</div><div class='ctx'>         clock-names = "ref_clk", "suspend_clk",</div><div class='ctx'>                       "bus_clk", "grf_clk";</div><div class='ctx'>         dr_mode = "otg";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml b/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml<br/>new file mode 100644<br/>index 000000000000..3159f9a6a0f7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/rockchip,rk3399-dwc3.yaml</a></div><div class='hunk'>@@ -0,0 +1,115 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/rockchip,rk3399-dwc3.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Rockchip RK3399 SuperSpeed DWC3 USB SoC controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Heiko Stuebner &lt;heiko@sntech.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: rockchip,rk3399-dwc3</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description:</div><div class='add'>+          Controller reference clock, must to be 24 MHz</div><div class='add'>+      - description:</div><div class='add'>+          Controller suspend clock, must to be 24 MHz or 32 KHz</div><div class='add'>+      - description:</div><div class='add'>+          Master/Core clock, must to be &gt;= 62.5 MHz for SS</div><div class='add'>+          operation and &gt;= 30MHz for HS operation</div><div class='add'>+      - description:</div><div class='add'>+          USB3 aclk peri</div><div class='add'>+      - description:</div><div class='add'>+          USB3 aclk</div><div class='add'>+      - description:</div><div class='add'>+          Controller grf clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ref_clk</div><div class='add'>+      - const: suspend_clk</div><div class='add'>+      - const: bus_clk</div><div class='add'>+      - const: aclk_usb3_rksoc_axi_perf</div><div class='add'>+      - const: aclk_usb3</div><div class='add'>+      - const: grf_clk</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    const: usb3-otg</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  '^usb@':</div><div class='add'>+    $ref: snps,dwc3.yaml#</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - '#address-cells'</div><div class='add'>+  - '#size-cells'</div><div class='add'>+  - ranges</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+  - reset-names</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/rk3399-cru.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/power/rk3399-power.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        usb {</div><div class='add'>+            compatible = "rockchip,rk3399-dwc3";</div><div class='add'>+            #address-cells = &lt;2&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            ranges;</div><div class='add'>+            clocks = &lt;&amp;cru SCLK_USB3OTG0_REF&gt;, &lt;&amp;cru SCLK_USB3OTG0_SUSPEND&gt;,</div><div class='add'>+                     &lt;&amp;cru ACLK_USB3OTG0&gt;, &lt;&amp;cru ACLK_USB3_RKSOC_AXI_PERF&gt;,</div><div class='add'>+                     &lt;&amp;cru ACLK_USB3&gt;, &lt;&amp;cru ACLK_USB3_GRF&gt;;</div><div class='add'>+            clock-names = "ref_clk", "suspend_clk",</div><div class='add'>+                          "bus_clk", "aclk_usb3_rksoc_axi_perf",</div><div class='add'>+                          "aclk_usb3", "grf_clk";</div><div class='add'>+            resets = &lt;&amp;cru SRST_A_USB3_OTG0&gt;;</div><div class='add'>+            reset-names = "usb3-otg";</div><div class='add'>+</div><div class='add'>+            usb@fe800000 {</div><div class='add'>+                compatible = "snps,dwc3";</div><div class='add'>+                reg = &lt;0x0 0xfe800000 0x0 0x100000&gt;;</div><div class='add'>+                interrupts = &lt;GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0&gt;;</div><div class='add'>+                clocks = &lt;&amp;cru SCLK_USB3OTG0_REF&gt;, &lt;&amp;cru ACLK_USB3OTG0&gt;,</div><div class='add'>+                         &lt;&amp;cru SCLK_USB3OTG0_SUSPEND&gt;;</div><div class='add'>+                clock-names = "ref", "bus_early", "suspend";</div><div class='add'>+                dr_mode = "otg";</div><div class='add'>+                phys = &lt;&amp;u2phy0_otg&gt;, &lt;&amp;tcphy0_usb3&gt;;</div><div class='add'>+                phy-names = "usb2-phy", "usb3-phy";</div><div class='add'>+                phy_type = "utmi_wide";</div><div class='add'>+                snps,dis_enblslpm_quirk;</div><div class='add'>+                snps,dis-u2-freeclk-exists-quirk;</div><div class='add'>+                snps,dis_u2_susphy_quirk;</div><div class='add'>+                snps,dis-del-phy-power-chg-quirk;</div><div class='add'>+                snps,dis-tx-ipgap-linecheck-quirk;</div><div class='add'>+                power-domains = &lt;&amp;power RK3399_PD_USB3&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml<br/>index 22b91a27d776..42ceaf13cd5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/samsung,exynos-dwc3.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC USB 3.0 DWC3 Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -108,19 +108,19 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/clock/exynos5420.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='del'>-    usb {</div><div class='add'>+    usb@12000000 {</div><div class='ctx'>         compatible = "samsung,exynos5250-dwusb3";</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;1&gt;;</div><div class='del'>-        ranges;</div><div class='add'>+        ranges = &lt;0x0 0x12000000 0x10000&gt;;</div><div class='ctx'>         clocks = &lt;&amp;clock CLK_USBD300&gt;;</div><div class='ctx'>         clock-names = "usbdrd30";</div><div class='ctx'>         vdd33-supply = &lt;&amp;ldo9_reg&gt;;</div><div class='ctx'>         vdd10-supply = &lt;&amp;ldo11_reg&gt;;</div><div class='ctx'> </div><div class='del'>-        usb@12000000 {</div><div class='add'>+        usb@0 {</div><div class='ctx'>             compatible = "snps,dwc3";</div><div class='del'>-            reg = &lt;0x12000000 0x10000&gt;;</div><div class='add'>+            reg = &lt;0x0 0x10000&gt;;</div><div class='ctx'>             interrupts = &lt;GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='ctx'>             phys = &lt;&amp;usbdrd_phy0 0&gt;, &lt;&amp;usbdrd_phy0 1&gt;;</div><div class='ctx'>             phy-names = "usb2-phy", "usb3-phy";</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml<br/>index fbf07d6e707a..caa572dcee02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzk@kernel.org&gt;</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -15,9 +15,6 @@ properties:</div><div class='ctx'>       - samsung,exynos4210-ehci</div><div class='ctx'>       - samsung,exynos4210-ohci</div><div class='ctx'> </div><div class='del'>-  '#address-cells':</div><div class='del'>-    const: 1</div><div class='del'>-</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -46,15 +43,6 @@ properties:</div><div class='ctx'>       Only for controller in EHCI mode, if present, specifies the GPIO that</div><div class='ctx'>       needs to be pulled up for the bus to be powered.</div><div class='ctx'> </div><div class='del'>-  '#size-cells':</div><div class='del'>-    const: 0</div><div class='del'>-</div><div class='del'>-patternProperties:</div><div class='del'>-  "^.*@[0-9a-f]{1,2}$":</div><div class='del'>-    description: The hard wired USB devices</div><div class='del'>-    type: object</div><div class='del'>-    $ref: /usb/usb-device.yaml</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - clocks</div><div class='hunk'>@@ -62,8 +50,10 @@ required:</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - phys</div><div class='ctx'>   - phy-names</div><div class='add'>+  - reg</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='add'>+  - $ref: usb-hcd.yaml#</div><div class='ctx'>   - if:</div><div class='ctx'>       properties:</div><div class='ctx'>         compatible:</div><div class='hunk'>@@ -73,7 +63,7 @@ allOf:</div><div class='ctx'>       properties:</div><div class='ctx'>         samsung,vbus-gpio: false</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml b/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml<br/>index 39228a506b93..6156dc26e65c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/smsc,usb3503.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/smsc,usb3503.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/smsc,usb3503.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/smsc,usb3503.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: SMSC USB3503 High-Speed Hub Controller Device Tree Bindings</div><div class='add'>+title: SMSC USB3503 High-Speed Hub Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Dongjin Kim &lt;tobetter@gmail.com&gt;</div><div class='hunk'>@@ -14,6 +14,7 @@ properties:</div><div class='ctx'>     enum:</div><div class='ctx'>       - smsc,usb3503</div><div class='ctx'>       - smsc,usb3503a</div><div class='add'>+      - smsc,usb3803</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -33,6 +34,12 @@ properties:</div><div class='ctx'>     description: &gt;</div><div class='ctx'>       GPIO for reset</div><div class='ctx'> </div><div class='add'>+  bypass-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description: &gt;</div><div class='add'>+      GPIO for bypass.</div><div class='add'>+      Control signal to select between HUB MODE and BYPASS MODE.</div><div class='add'>+</div><div class='ctx'>   disabled-ports:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32-array</div><div class='ctx'>     minItems: 1</div><div class='hunk'>@@ -45,9 +52,11 @@ properties:</div><div class='ctx'>       property if all ports have to be enabled.</div><div class='ctx'> </div><div class='ctx'>   initial-mode:</div><div class='del'>-    enum: [1, 2]</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: &gt;</div><div class='del'>-      Specifies initial mode. 1 for Hub mode, 2 for standby mode.</div><div class='add'>+      Specifies initial mode. 1 for Hub mode, 2 for standby mode and 3 for bypass mode.</div><div class='add'>+      In bypass mode the downstream port 3 is connected to the upstream port with low</div><div class='add'>+      switch resistance R_on.</div><div class='ctx'> </div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -70,6 +79,29 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            enum:</div><div class='add'>+              - smsc,usb3803</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        bypass-gpios: false</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      required:</div><div class='add'>+        - bypass-gpios</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        initial-mode:</div><div class='add'>+          enum: [1, 2, 3]</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        initial-mode:</div><div class='add'>+          enum: [1, 2]</div><div class='add'>+</div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='hunk'>@@ -77,7 +109,7 @@ examples:</div><div class='ctx'>       i2c {</div><div class='ctx'>           #address-cells = &lt;1&gt;;</div><div class='ctx'>           #size-cells = &lt;0&gt;;</div><div class='del'>-        </div><div class='add'>+</div><div class='ctx'>           usb-hub@8 {</div><div class='ctx'>               compatible = "smsc,usb3503";</div><div class='ctx'>               reg = &lt;0x08&gt;;</div><div class='hunk'>@@ -92,6 +124,25 @@ examples:</div><div class='ctx'>       };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='add'>+      i2c {</div><div class='add'>+          #address-cells = &lt;1&gt;;</div><div class='add'>+          #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+          usb-hub@8 {</div><div class='add'>+              compatible = "smsc,usb3803";</div><div class='add'>+              reg = &lt;0x08&gt;;</div><div class='add'>+              connect-gpios = &lt;&amp;gpx3 0 1&gt;;</div><div class='add'>+              disabled-ports = &lt;2 3&gt;;</div><div class='add'>+              intn-gpios = &lt;&amp;gpx3 4 1&gt;;</div><div class='add'>+              reset-gpios = &lt;&amp;gpx3 5 1&gt;;</div><div class='add'>+              bypass-gpios = &lt;&amp;gpx3 6 1&gt;;</div><div class='add'>+              initial-mode = &lt;3&gt;;</div><div class='add'>+              clocks = &lt;&amp;clks 80&gt;;</div><div class='add'>+              clock-names = "refclk";</div><div class='add'>+          };</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='ctx'>       #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='ctx'> </div><div class='ctx'>       usb-hub {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml<br/>index f4471f8bdbef..50edc4da780e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/snps,dwc3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/snps,dwc3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/snps,dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/snps,dwc3.yaml</a></div><div class='hunk'>@@ -68,6 +68,12 @@ properties:</div><div class='ctx'>         - enum: [bus_early, ref, suspend]</div><div class='ctx'>         - true</div><div class='ctx'> </div><div class='add'>+  dma-coherent: true</div><div class='add'>+</div><div class='add'>+  extcon:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    deprecated: true</div><div class='add'>+</div><div class='ctx'>   iommus:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -89,6 +95,16 @@ properties:</div><div class='ctx'>         - usb2-phy</div><div class='ctx'>         - usb3-phy</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    description:</div><div class='add'>+      The DWC3 has 2 power-domains. The power management unit (PMU) and</div><div class='add'>+      everything else. The PMU is typically always powered and may not have an</div><div class='add'>+      entry.</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Core</div><div class='add'>+      - description: Power management unit</div><div class='add'>+</div><div class='ctx'>   resets:</div><div class='ctx'>     minItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -220,6 +236,11 @@ properties:</div><div class='ctx'>       When set, all SuperSpeed bus instances in park mode are disabled.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  snps,parkmode-disable-hs-quirk:</div><div class='add'>+    description:</div><div class='add'>+      When set, all HighSpeed bus instances in park mode are disabled.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   snps,dis_metastability_quirk:</div><div class='ctx'>     description:</div><div class='ctx'>       When set, disable metastability workaround. CAUTION! Use only if you are</div><div class='hunk'>@@ -232,6 +253,26 @@ properties:</div><div class='ctx'>       avoid -EPROTO errors with usbhid on some devices (Hikey 970).</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='add'>+  snps,gfladj-refclk-lpm-sel-quirk:</div><div class='add'>+    description:</div><div class='add'>+      When set, run the SOF/ITP counter based on ref_clk.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  snps,resume-hs-terminations:</div><div class='add'>+    description:</div><div class='add'>+      Fix the issue of HS terminations CRC error on resume by enabling this</div><div class='add'>+      quirk. When set, all the termsel, xcvrsel, opmode becomes 0 during end</div><div class='add'>+      of resume. This option is to support certain legacy ULPI PHYs.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  snps,ulpi-ext-vbus-drv:</div><div class='add'>+    description:</div><div class='add'>+      Some ULPI USB PHY does not support internal VBUS supply, and driving</div><div class='add'>+      the CPEN pin, requires the configuration of the ulpi DRVVBUSEXTERNAL</div><div class='add'>+      bit. When set, the xhci host will configure the USB2 PHY drives VBUS</div><div class='add'>+      with an external supply.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='ctx'>   snps,is-utmi-l1-suspend:</div><div class='ctx'>     description:</div><div class='ctx'>       True when DWC3 asserts output signal utmi_l1_suspend_n, false when</div><div class='hunk'>@@ -341,6 +382,27 @@ properties:</div><div class='ctx'>       This port is used with the 'usb-role-switch' property  to connect the</div><div class='ctx'>       dwc3 to type C connector.</div><div class='ctx'> </div><div class='add'>+  ports:</div><div class='add'>+    $ref: /schemas/graph.yaml#/properties/ports</div><div class='add'>+    description:</div><div class='add'>+      Those ports should be used with any connector to the data bus of this</div><div class='add'>+      controller using the OF graph bindings specified if the "usb-role-switch"</div><div class='add'>+      property is used.</div><div class='add'>+</div><div class='add'>+    properties:</div><div class='add'>+      port@0:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: High Speed (HS) data bus.</div><div class='add'>+</div><div class='add'>+      port@1:</div><div class='add'>+        $ref: /schemas/graph.yaml#/properties/port</div><div class='add'>+        description: Super Speed (SS) data bus.</div><div class='add'>+</div><div class='add'>+  wakeup-source:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      Enable USB remote wakeup.</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/spear-usb.txt b/Documentation/devicetree/bindings/usb/spear-usb.txt<br/>deleted file mode 100644<br/>index 1dc91cc459c0..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/spear-usb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/spear-usb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-ST SPEAr SoC USB controllers:</div><div class='del'>------------------------------</div><div class='del'>-</div><div class='del'>-EHCI:</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "st,spear600-ehci"</div><div class='del'>-- interrupts: Should contain the EHCI interrupt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	ehci@e1800000 {</div><div class='del'>-		compatible = "st,spear600-ehci", "usb-ehci";</div><div class='del'>-		reg = &lt;0xe1800000 0x1000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='del'>-		interrupts = &lt;27&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-OHCI:</div><div class='del'>------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: "st,spear600-ohci"</div><div class='del'>-- interrupts: Should contain the OHCI interrupt</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	ohci@e1900000 {</div><div class='del'>-		compatible = "st,spear600-ohci", "usb-ohci";</div><div class='del'>-		reg = &lt;0xe1800000 0x1000&gt;;</div><div class='del'>-		interrupt-parent = &lt;&amp;vic1&gt;;</div><div class='del'>-		interrupts = &lt;26&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/st,stusb160x.yaml b/Documentation/devicetree/bindings/usb/st,stusb160x.yaml<br/>index b5a8c9814dd3..acda2f47fbc9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/st,stusb160x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/st,stusb160x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/st,stusb160x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/st,stusb160x.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/st,stusb160x.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/st,stusb160x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STUSB160x Type-C controller bindings</div><div class='add'>+title: STMicroelectronics STUSB160x Type-C controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Amelie Delaunay &lt;amelie.delaunay@foss.st.com&gt;</div><div class='hunk'>@@ -33,6 +33,7 @@ properties:</div><div class='ctx'>   connector:</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'>     properties:</div><div class='ctx'>       compatible:</div><div class='hunk'>@@ -55,7 +56,7 @@ additionalProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c4 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='hunk'>@@ -74,9 +75,14 @@ examples:</div><div class='ctx'>                 data-role = "dual";</div><div class='ctx'>                 typec-power-opmode = "default";</div><div class='ctx'> </div><div class='del'>-                port {</div><div class='del'>-                    typec_con_ep: endpoint {</div><div class='del'>-                        remote-endpoint = &lt;&amp;usbotg_hs_ep&gt;;</div><div class='add'>+                ports {</div><div class='add'>+                    #address-cells = &lt;1&gt;;</div><div class='add'>+                    #size-cells = &lt;0&gt;;</div><div class='add'>+                    port@0 {</div><div class='add'>+                        reg = &lt;0&gt;;</div><div class='add'>+                        typec_con_ep: endpoint {</div><div class='add'>+                            remote-endpoint = &lt;&amp;usbotg_hs_ep&gt;;</div><div class='add'>+                        };</div><div class='ctx'>                     };</div><div class='ctx'>                 };</div><div class='ctx'>             };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/st,typec-stm32g0.yaml b/Documentation/devicetree/bindings/usb/st,typec-stm32g0.yaml<br/>new file mode 100644<br/>index 000000000000..1cb68cabe17d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/st,typec-stm32g0.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/st,typec-stm32g0.yaml</a></div><div class='hunk'>@@ -0,0 +1,91 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/st,typec-stm32g0.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: STMicroelectronics STM32G0 USB Type-C PD controller</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  The STM32G0 MCU can be programmed to control Type-C connector(s) through I2C</div><div class='add'>+  typically using the UCSI protocol over I2C, with a dedicated alert</div><div class='add'>+  (interrupt) pin.</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Fabrice Gasnier &lt;fabrice.gasnier@foss.st.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: st,stm32g0-typec</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  connector:</div><div class='add'>+    type: object</div><div class='add'>+    $ref: /schemas/connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+  firmware-name:</div><div class='add'>+    description: |</div><div class='add'>+      Should contain the name of the default firmware image</div><div class='add'>+      file located on the firmware search path</div><div class='add'>+</div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - interrupts</div><div class='add'>+  - connector</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      typec@53 {</div><div class='add'>+        compatible = "st,stm32g0-typec";</div><div class='add'>+        reg = &lt;0x53&gt;;</div><div class='add'>+        /* Alert pin on GPIO PE12 */</div><div class='add'>+        interrupts = &lt;12 IRQ_TYPE_EDGE_FALLING&gt;;</div><div class='add'>+        interrupt-parent = &lt;&amp;gpioe&gt;;</div><div class='add'>+</div><div class='add'>+        /* Example with one type-C connector */</div><div class='add'>+        connector {</div><div class='add'>+          compatible = "usb-c-connector";</div><div class='add'>+          label = "USB-C";</div><div class='add'>+</div><div class='add'>+          ports {</div><div class='add'>+            #address-cells = &lt;1&gt;;</div><div class='add'>+            #size-cells = &lt;0&gt;;</div><div class='add'>+            port@0 {</div><div class='add'>+              reg = &lt;0&gt;;</div><div class='add'>+              con_usb_c_ep: endpoint {</div><div class='add'>+                remote-endpoint = &lt;&amp;usb_ep&gt;;</div><div class='add'>+              };</div><div class='add'>+            };</div><div class='add'>+          };</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+    usb {</div><div class='add'>+      usb-role-switch;</div><div class='add'>+      port {</div><div class='add'>+        usb_ep: endpoint {</div><div class='add'>+          remote-endpoint = &lt;&amp;con_usb_c_ep&gt;;</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml b/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml<br/>new file mode 100644<br/>index 000000000000..d25fc708e32c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ti,am62-usb.yaml</a></div><div class='hunk'>@@ -0,0 +1,103 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Aswath Govindraju &lt;a-govindraju@ti.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ti,am62-usb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  ranges: true</div><div class='add'>+</div><div class='add'>+  power-domains:</div><div class='add'>+    description:</div><div class='add'>+      PM domain provider node and an args specifier containing</div><div class='add'>+      the USB ISO device id value. See,</div><div class='add'>+      Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    description: Clock phandle to usb2_refclk</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: ref</div><div class='add'>+</div><div class='add'>+  ti,vbus-divider:</div><div class='add'>+    description:</div><div class='add'>+      Should be present if USB VBUS line is connected to the</div><div class='add'>+      VBUS pin of the SoC via a 1/3 voltage divider.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  ti,syscon-phy-pll-refclk:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle-array</div><div class='add'>+    items:</div><div class='add'>+      - items:</div><div class='add'>+          - description: Phandle to the SYSCON entry</div><div class='add'>+          - description: USB phy control register offset within SYSCON</div><div class='add'>+    description:</div><div class='add'>+      Specifier for conveying frequency of ref clock input, for the</div><div class='add'>+      operation of USB2PHY.</div><div class='add'>+</div><div class='add'>+  '#address-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+  '#size-cells':</div><div class='add'>+    const: 2</div><div class='add'>+</div><div class='add'>+patternProperties:</div><div class='add'>+  "^usb@[0-9a-f]+$":</div><div class='add'>+    $ref: snps,dwc3.yaml#</div><div class='add'>+    description: Required child node</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - power-domains</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - ti,syscon-phy-pll-refclk</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/soc/ti,sci_pm_domain.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    bus {</div><div class='add'>+      #address-cells = &lt;2&gt;;</div><div class='add'>+      #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+      usbss1: usb@f910000 {</div><div class='add'>+        compatible = "ti,am62-usb";</div><div class='add'>+        reg = &lt;0x00 0x0f910000 0x00 0x800&gt;;</div><div class='add'>+        clocks = &lt;&amp;k3_clks 162 3&gt;;</div><div class='add'>+        clock-names = "ref";</div><div class='add'>+        ti,syscon-phy-pll-refclk = &lt;&amp;wkup_conf 0x4018&gt;;</div><div class='add'>+        power-domains = &lt;&amp;k3_pds 179 TI_SCI_PD_EXCLUSIVE&gt;;</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        usb@31100000 {</div><div class='add'>+          compatible = "snps,dwc3";</div><div class='add'>+          reg =&lt;0x00 0x31100000 0x00 0x50000&gt;;</div><div class='add'>+          interrupts = &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;, /* irq.0 */</div><div class='add'>+                       &lt;GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH&gt;; /* irq.0 */</div><div class='add'>+          interrupt-names = "host", "peripheral";</div><div class='add'>+          maximum-speed = "high-speed";</div><div class='add'>+          dr_mode = "otg";</div><div class='add'>+        };</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml<br/>index b86bf6bc9cd6..54c6586cb56d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml</a></div><div class='hunk'>@@ -46,13 +46,12 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml b/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml<br/>index eedde385d299..95ff9791baea 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/ti,j721e-usb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bindings for the TI wrapper module for the Cadence USBSS-DRD controller</div><div class='add'>+title: TI wrapper module for the Cadence USBSS-DRD controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Roger Quadros &lt;rogerq@kernel.org&gt;</div><div class='hunk'>@@ -53,12 +53,6 @@ properties:</div><div class='ctx'>       VBUS pin of the SoC via a 1/3 voltage divider.</div><div class='ctx'>     type: boolean</div><div class='ctx'> </div><div class='del'>-  assigned-clocks:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    maxItems: 1</div><div class='del'>-</div><div class='ctx'>   '#address-cells':</div><div class='ctx'>     const: 2</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml b/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml<br/>index c1f0194ad0d5..9252d893f694 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml</a></div><div class='hunk'>@@ -34,14 +34,6 @@ properties:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='del'>-  assigned-clocks:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='del'>-  assigned-clock-parents:</div><div class='del'>-    minItems: 1</div><div class='del'>-    maxItems: 2</div><div class='del'>-</div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'>     description: Should contain a phandle to a PM domain provider node</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml b/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml<br/>index a4c53b1f1af3..5497a60cddbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/ti,tps6598x.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,tps6598x.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ti,tps6598x.yaml</a></div><div class='hunk'>@@ -1,10 +1,10 @@</div><div class='ctx'> # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/usb/ti,tps6598x.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/usb/ti,tps6598x.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Texas Instruments 6598x Type-C Port Switch and Power Delivery controller DT bindings</div><div class='add'>+title: Texas Instruments 6598x Type-C Port Switch and Power Delivery controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;</div><div class='hunk'>@@ -23,6 +23,8 @@ properties:</div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  wakeup-source: true</div><div class='add'>+</div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -33,21 +35,20 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='del'>-  - interrupts</div><div class='del'>-  - interrupt-names</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='del'>-    i2c0 {</div><div class='add'>+    i2c {</div><div class='ctx'>         #address-cells = &lt;1&gt;;</div><div class='ctx'>         #size-cells = &lt;0&gt;;</div><div class='ctx'> </div><div class='ctx'>         tps6598x: tps6598x@38 {</div><div class='ctx'>             compatible = "ti,tps6598x";</div><div class='ctx'>             reg = &lt;0x38&gt;;</div><div class='add'>+            wakeup-source;</div><div class='ctx'> </div><div class='ctx'>             interrupt-parent = &lt;&amp;msmgpio&gt;;</div><div class='ctx'>             interrupts = &lt;107 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/ti,usb8041.yaml b/Documentation/devicetree/bindings/usb/ti,usb8041.yaml<br/>new file mode 100644<br/>index 000000000000..88ea6c952c66<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/ti,usb8041.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/ti,usb8041.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/ti,usb8041.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: TI USB8041 USB 3.0 hub controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Alexander Stein &lt;alexander.stein@ew.tq-group.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-device.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - usb451,8140</div><div class='add'>+      - usb451,8142</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    items:</div><div class='add'>+      - description: GPIO specifier for GRST# pin.</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      VDD power supply to the hub</div><div class='add'>+</div><div class='add'>+  peer-hub:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle to the peer hub on the controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - peer-hub</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    usb {</div><div class='add'>+        dr_mode = "host";</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        /* 2.0 hub on port 1 */</div><div class='add'>+        hub_2_0: hub@1 {</div><div class='add'>+          compatible = "usb451,8142";</div><div class='add'>+          reg = &lt;1&gt;;</div><div class='add'>+          peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+          reset-gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        /* 3.0 hub on port 2 */</div><div class='add'>+        hub_3_0: hub@2 {</div><div class='add'>+          compatible = "usb451,8140";</div><div class='add'>+          reg = &lt;2&gt;;</div><div class='add'>+          peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+          reset-gpios = &lt;&amp;gpio1 11 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/typec-tcpci.txt b/Documentation/devicetree/bindings/usb/typec-tcpci.txt<br/>deleted file mode 100644<br/>index 2082522b1c32..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/typec-tcpci.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/typec-tcpci.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,49 +0,0 @@</div><div class='del'>-TCPCI(Typec port cotroller interface) binding</div><div class='del'>----------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible:       should be set one of following:</div><div class='del'>-		    - "nxp,ptn5110" for NXP USB PD TCPC PHY IC ptn5110.</div><div class='del'>-</div><div class='del'>-- reg:              the i2c slave address of typec port controller device.</div><div class='del'>-- interrupt-parent: the phandle to the interrupt controller which provides</div><div class='del'>-                    the interrupt.</div><div class='del'>-- interrupts:       interrupt specification for tcpci alert.</div><div class='del'>-</div><div class='del'>-Required sub-node:</div><div class='del'>-- connector: The "usb-c-connector" attached to the tcpci chip, the bindings</div><div class='del'>-  of connector node are specified in</div><div class='del'>-  Documentation/devicetree/bindings/connector/usb-connector.yaml</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-ptn5110@50 {</div><div class='del'>-	compatible = "nxp,ptn5110";</div><div class='del'>-	reg = &lt;0x50&gt;;</div><div class='del'>-	interrupt-parent = &lt;&amp;gpio3&gt;;</div><div class='del'>-	interrupts = &lt;3 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='del'>-</div><div class='del'>-	usb_con: connector {</div><div class='del'>-		compatible = "usb-c-connector";</div><div class='del'>-		label = "USB-C";</div><div class='del'>-		data-role = "dual";</div><div class='del'>-		power-role = "dual";</div><div class='del'>-		try-power-role = "sink";</div><div class='del'>-		source-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)&gt;;</div><div class='del'>-		sink-pdos = &lt;PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)</div><div class='del'>-			     PDO_VAR(5000, 12000, 2000)&gt;;</div><div class='del'>-		op-sink-microwatt = &lt;10000000&gt;;</div><div class='del'>-</div><div class='del'>-		ports {</div><div class='del'>-			#address-cells = &lt;1&gt;;</div><div class='del'>-			#size-cells = &lt;0&gt;;</div><div class='del'>-</div><div class='del'>-			port@1 {</div><div class='del'>-				reg = &lt;1&gt;;</div><div class='del'>-				usb_con_ss: endpoint {</div><div class='del'>-					remote-endpoint = &lt;&amp;usb3_data_ss&gt;;</div><div class='del'>-				};</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb-device.yaml b/Documentation/devicetree/bindings/usb/usb-device.yaml<br/>index b77960a7a37b..da890ee60ce6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-device.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-device.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-device.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/usb-device.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/usb-device.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: The device tree bindings for the Generic USB Device</div><div class='add'>+title: Generic USB Device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='hunk'>@@ -76,7 +76,6 @@ patternProperties:</div><div class='ctx'>         maxItems: 1</div><div class='ctx'> </div><div class='ctx'> required:</div><div class='del'>-  - compatible</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='ctx'> additionalProperties: true</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb-drd.yaml b/Documentation/devicetree/bindings/usb/usb-drd.yaml<br/>index f229fc8068d9..114fb5dc0498 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-drd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-drd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-drd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/usb-drd.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/usb-drd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic USB OTG Controller Device Tree Bindings</div><div class='add'>+title: Generic USB OTG Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='hunk'>@@ -27,6 +27,7 @@ properties:</div><div class='ctx'>       should default to OTG.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/string</div><div class='ctx'>     enum: [host, peripheral, otg]</div><div class='add'>+    default: otg</div><div class='ctx'> </div><div class='ctx'>   hnp-disable:</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb-hcd.yaml b/Documentation/devicetree/bindings/usb/usb-hcd.yaml<br/>index 1dc3d5d7b44f..692dd60e3f73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-hcd.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-hcd.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-hcd.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/usb-hcd.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/usb-hcd.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic USB Host Controller Device Tree Bindings</div><div class='add'>+title: Generic USB Host Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml<br/>index 2824c17285ee..6734f4d3aa78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/usb-nop-xceiv.yaml</a></div><div class='hunk'>@@ -27,6 +27,9 @@ properties:</div><div class='ctx'>   vcc-supply:</div><div class='ctx'>     description: phandle to the regulator that provides power to the PHY.</div><div class='ctx'> </div><div class='add'>+  power-domains:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='ctx'>   reset-gpios:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='hunk'>@@ -35,10 +38,15 @@ properties:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='ctx'>   vbus-regulator:</div><div class='del'>-    description: Should specifiy the regulator supplying current drawn from</div><div class='add'>+    description: Should specify the regulator supplying current drawn from</div><div class='ctx'>       the VBus line.</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/phandle</div><div class='ctx'> </div><div class='add'>+  wakeup-source:</div><div class='add'>+    description:</div><div class='add'>+      Specify if the USB phy can detect the remote wakeup signal</div><div class='add'>+      while the system sleep.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - '#phy-cells'</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.yaml b/Documentation/devicetree/bindings/usb/usb-xhci.yaml<br/>index 965f87fef702..180a261c3e8f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-xhci.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb-xhci.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb-xhci.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/usb-xhci.yaml</a></div><div class='hunk'>@@ -4,13 +4,13 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/usb-xhci.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic USB xHCI Controller Device Tree Bindings</div><div class='add'>+title: Generic USB xHCI Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Mathias Nyman &lt;mathias.nyman@intel.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "usb-hcd.yaml#"</div><div class='add'>+  - $ref: usb-hcd.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   usb2-lpm-disable:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb.yaml b/Documentation/devicetree/bindings/usb/usb.yaml<br/>index 939f217b8c7b..326b14f05d1c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/usb.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/usb.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Generic USB Controller Device Tree Bindings</div><div class='add'>+title: Generic USB Controller</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb251xb.txt b/Documentation/devicetree/bindings/usb/usb251xb.txt<br/>deleted file mode 100644<br/>index 1a934eab175e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb251xb.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usb251xb.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,89 +0,0 @@</div><div class='del'>-Microchip USB 2.0 Hi-Speed Hub Controller</div><div class='del'>-</div><div class='del'>-The device node for the configuration of a Microchip USB251x/xBi USB 2.0</div><div class='del'>-Hi-Speed Controller.</div><div class='del'>-</div><div class='del'>-Required properties :</div><div class='del'>- - compatible : Should be "microchip,usb251xb" or one of the specific types:</div><div class='del'>-	"microchip,usb2512b", "microchip,usb2512bi", "microchip,usb2513b",</div><div class='del'>-	"microchip,usb2513bi", "microchip,usb2514b", "microchip,usb2514bi",</div><div class='del'>-	"microchip,usb2517", "microchip,usb2517i", "microchip,usb2422"</div><div class='del'>- - reg : I2C address on the selected bus (default is &lt;0x2C&gt;)</div><div class='del'>-</div><div class='del'>-Optional properties :</div><div class='del'>- - reset-gpios : Should specify the gpio for hub reset</div><div class='del'>- - vdd-supply : Should specify the phandle to the regulator supplying vdd</div><div class='del'>- - skip-config : Skip Hub configuration, but only send the USB-Attach command</div><div class='del'>- - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)</div><div class='del'>- - product-id : Set USB Product ID of the hub (16 bit, default depends on type)</div><div class='del'>- - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)</div><div class='del'>- - language-id : Set USB Language ID (16 bit, default is 0x0000)</div><div class='del'>- - manufacturer : Set USB Manufacturer string (max 31 characters long)</div><div class='del'>- - product : Set USB Product string (max 31 characters long)</div><div class='del'>- - serial : Set USB Serial string (max 31 characters long)</div><div class='del'>- - {bus,self}-powered : selects between self- and bus-powered operation</div><div class='del'>-	(boolean, default is self-powered)</div><div class='del'>- - disable-hi-speed : disable USB Hi-Speed support (boolean)</div><div class='del'>- - {multi,single}-tt : selects between multi- and single-transaction-translator</div><div class='del'>-	(boolean, default is multi-tt)</div><div class='del'>- - disable-eop : disable End of Packet generation in full-speed mode (boolean)</div><div class='del'>- - {ganged,individual}-sensing : select over-current sense type in self-powered</div><div class='del'>-	mode (boolean, default is individual)</div><div class='del'>- - {ganged,individual}-port-switching : select port power switching mode</div><div class='del'>-	(boolean, default is individual)</div><div class='del'>- - dynamic-power-switching : enable auto-switching from self- to bus-powered</div><div class='del'>-	operation if the local power source is removed or unavailable (boolean)</div><div class='del'>- - oc-delay-us : Delay time (in microseconds) for filtering the over-current</div><div class='del'>-	sense inputs. Valid values are 100, 4000, 8000 (default) and 16000. If</div><div class='del'>-	an invalid value is given, the default is used instead.</div><div class='del'>- - compound-device : indicate the hub is part of a compound device (boolean)</div><div class='del'>- - port-mapping-mode : enable port mapping mode (boolean)</div><div class='del'>- - led-{usb,speed}-mode : led usb/speed indication mode selection</div><div class='del'>-	(boolean, default is speed mode)</div><div class='del'>- - string-support : enable string descriptor support (required for manufacturer,</div><div class='del'>-	product and serial string configuration)</div><div class='del'>- - non-removable-ports : Should specify the ports which have a non-removable</div><div class='del'>-	device connected.</div><div class='del'>- - sp-disabled-ports : Specifies the ports which will be self-power disabled</div><div class='del'>- - bp-disabled-ports : Specifies the ports which will be bus-power disabled</div><div class='del'>- - sp-max-total-current-microamp: Specifies max current consumed by the hub</div><div class='del'>-	from VBUS when operating in self-powered hub. It includes the hub</div><div class='del'>-	silicon along with all associated circuitry including a permanently</div><div class='del'>-	attached peripheral (range: 0 - 100000 uA, default 1000 uA)</div><div class='del'>- - bp-max-total-current-microamp: Specifies max current consumed by the hub</div><div class='del'>-	from VBUS when operating in self-powered hub. It includes the hub</div><div class='del'>-	silicon along with all associated circuitry including a permanently</div><div class='del'>-	attached peripheral (range: 0 - 510000 uA, default 100000 uA)</div><div class='del'>- - sp-max-removable-current-microamp: Specifies max current consumed by the hub</div><div class='del'>-	from VBUS when operating in self-powered hub. It includes the hub</div><div class='del'>-	silicon along with all associated circuitry excluding a permanently</div><div class='del'>-	attached peripheral (range: 0 - 100000 uA, default 1000 uA)</div><div class='del'>- - bp-max-removable-current-microamp: Specifies max current consumed by the hub</div><div class='del'>-	from VBUS when operating in self-powered hub. It includes the hub</div><div class='del'>-	silicon along with all associated circuitry excluding a permanently</div><div class='del'>-	attached peripheral (range: 0 - 510000 uA, default 100000 uA)</div><div class='del'>- - power-on-time-ms : Specifies the time it takes from the time the host</div><div class='del'>-	initiates the power-on sequence to a port until the port has adequate</div><div class='del'>-	power. The value is given in ms in a 0 - 510 range (default is 100ms).</div><div class='del'>- - swap-dx-lanes : Specifies the ports which will swap the differential-pair</div><div class='del'>-	(D+/D-), default is not-swapped.</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-	usb2512b@2c {</div><div class='del'>-		compatible = "microchip,usb2512b";</div><div class='del'>-		reg = &lt;0x2c&gt;;</div><div class='del'>-		reset-gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	usb2514b@2c {</div><div class='del'>-		compatible = "microchip,usb2514b";</div><div class='del'>-		reg = &lt;0x2c&gt;;</div><div class='del'>-		vendor-id = /bits/ 16 &lt;0x0000&gt;;</div><div class='del'>-		product-id = /bits/ 16 &lt;0x0000&gt;;</div><div class='del'>-		string-support;</div><div class='del'>-		manufacturer = "Foo";</div><div class='del'>-		product = "Foo-Bar";</div><div class='del'>-		serial = "1234567890A";</div><div class='del'>-		/* correct misplaced usb connectors on port 1,2 */</div><div class='del'>-		swap-dx-lanes = &lt;1 2&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usb251xb.yaml b/Documentation/devicetree/bindings/usb/usb251xb.yaml<br/>new file mode 100644<br/>index 000000000000..4d1530816817<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usb251xb.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/usb251xb.yaml</a></div><div class='hunk'>@@ -0,0 +1,271 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/usb251xb.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Microchip USB 2.0 Hi-Speed Hub Controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Richard Leitner &lt;richard.leitner@skidata.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - microchip,usb2422</div><div class='add'>+      - microchip,usb2512b</div><div class='add'>+      - microchip,usb2512bi</div><div class='add'>+      - microchip,usb2513b</div><div class='add'>+      - microchip,usb2513bi</div><div class='add'>+      - microchip,usb2514b</div><div class='add'>+      - microchip,usb2514bi</div><div class='add'>+      - microchip,usb2517</div><div class='add'>+      - microchip,usb2517i</div><div class='add'>+      - microchip,usb251xb</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    description: |</div><div class='add'>+      Should specify the gpio for hub reset</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description: |</div><div class='add'>+      Should specify the phandle to the regulator supplying vdd</div><div class='add'>+</div><div class='add'>+  skip-config:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      Skip Hub configuration, but only send the USB-Attach command</div><div class='add'>+</div><div class='add'>+  vendor-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint16</div><div class='add'>+    default: 0x0424</div><div class='add'>+    description: |</div><div class='add'>+      Set USB Vendor ID of the hub</div><div class='add'>+</div><div class='add'>+  product-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint16</div><div class='add'>+    description: |</div><div class='add'>+      Set USB Product ID of the hub</div><div class='add'>+</div><div class='add'>+  device-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint16</div><div class='add'>+    default: 0x0bb3</div><div class='add'>+    description: |</div><div class='add'>+      Set USB Device ID of the hub</div><div class='add'>+</div><div class='add'>+  language-id:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint16</div><div class='add'>+    default: 0x0000</div><div class='add'>+    description: |</div><div class='add'>+      Set USB Language ID</div><div class='add'>+</div><div class='add'>+  manufacturer:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      Set USB Manufacturer string (max 31 characters long)</div><div class='add'>+</div><div class='add'>+  product:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      Set USB Product string (max 31 characters long)</div><div class='add'>+</div><div class='add'>+  serial:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      Set USB Serial string (max 31 characters long)</div><div class='add'>+</div><div class='add'>+  bus-powered:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      selects between self- and bus-powered operation</div><div class='add'>+      (boolean, default is self-powered)</div><div class='add'>+</div><div class='add'>+  self-powered:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      selects between self- and bus-powered operation</div><div class='add'>+      (boolean, default is self-powered)</div><div class='add'>+</div><div class='add'>+  disable-hi-speed:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      disable USB Hi-Speed support (boolean)</div><div class='add'>+</div><div class='add'>+  multi-tt:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      selects between multi- and single-transaction-translator</div><div class='add'>+      (boolean, default is multi-tt)</div><div class='add'>+</div><div class='add'>+  single-tt:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      selects between multi- and single-transaction-translator</div><div class='add'>+      (boolean, default is multi-tt)</div><div class='add'>+</div><div class='add'>+  disable-eop:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      disable End of Packet generation in full-speed mode (boolean)</div><div class='add'>+</div><div class='add'>+  ganged-sensing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      select over-current sense type in self-powered mode</div><div class='add'>+      (boolean, default is individual)</div><div class='add'>+</div><div class='add'>+  individual-sensing:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      select over-current sense type in self-powered mode</div><div class='add'>+      (boolean, default is individual)</div><div class='add'>+</div><div class='add'>+  ganged-port-switching:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      select port power switching mode (boolean, default is individual)</div><div class='add'>+</div><div class='add'>+  individual-port-switching:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      select port power switching mode (boolean, default is individual)</div><div class='add'>+</div><div class='add'>+  dynamic-power-switching:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      enable auto-switching from self- to bus-powered operation if the</div><div class='add'>+      local power source is removed or unavailable (boolean)</div><div class='add'>+</div><div class='add'>+  oc-delay-us:</div><div class='add'>+    enum: [100, 4000, 8000, 16000]</div><div class='add'>+    default: 8000</div><div class='add'>+    description: |</div><div class='add'>+      Delay time (in microseconds) for filtering the over-current sense</div><div class='add'>+      inputs. If an invalid value is given, the default is used instead.</div><div class='add'>+</div><div class='add'>+  compound-device:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      indicate the hub is part of a compound device (boolean)</div><div class='add'>+</div><div class='add'>+  port-mapping-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      enable port mapping mode (boolean)</div><div class='add'>+</div><div class='add'>+  led-usb-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      led usb/speed indication mode selection (boolean, default is speed mode)</div><div class='add'>+</div><div class='add'>+  led-speed-mode:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      led usb/speed indication mode selection (boolean, default is speed mode)</div><div class='add'>+</div><div class='add'>+  string-support:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      enable string descriptor support (required for manufacturer, product</div><div class='add'>+      and serial string configuration)</div><div class='add'>+</div><div class='add'>+  non-removable-ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      Should specify the ports which have a non-removable device connected.</div><div class='add'>+</div><div class='add'>+  sp-disabled-ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the ports which will be self-power disabled</div><div class='add'>+</div><div class='add'>+  bp-disabled-ports:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the ports which will be bus-power disabled</div><div class='add'>+</div><div class='add'>+  sp-max-total-current-microamp:</div><div class='add'>+    maximum: 100000</div><div class='add'>+    default: 1000</div><div class='add'>+    description: |</div><div class='add'>+      Specifies max current consumed by the hub from VBUS when</div><div class='add'>+      operating in self-powered hub. It includes the hub silicon</div><div class='add'>+      along with all associated circuitry including a permanently</div><div class='add'>+      attached peripheral.</div><div class='add'>+</div><div class='add'>+  bp-max-total-current-microamp:</div><div class='add'>+    maximum: 510000</div><div class='add'>+    default: 100000</div><div class='add'>+    description: |</div><div class='add'>+      Specifies max current consumed by the hub from VBUS when</div><div class='add'>+      operating in self-powered hub. It includes the hub silicon</div><div class='add'>+      along with all associated circuitry including a permanently</div><div class='add'>+      attached peripheral.</div><div class='add'>+</div><div class='add'>+  sp-max-removable-current-microamp:</div><div class='add'>+    maximum: 100000</div><div class='add'>+    default: 1000</div><div class='add'>+    description: |</div><div class='add'>+      Specifies max current consumed by the hub from VBUS when</div><div class='add'>+      operating in self-powered hub. It includes the hub silicon</div><div class='add'>+      along with all associated circuitry excluding a permanently</div><div class='add'>+      attached peripheral.</div><div class='add'>+</div><div class='add'>+  bp-max-removable-current-microamp:</div><div class='add'>+    maximum: 510000</div><div class='add'>+    default: 100000</div><div class='add'>+    description: |</div><div class='add'>+      Specifies max current consumed by the hub from VBUS when</div><div class='add'>+      operating in self-powered hub. It includes the hub silicon</div><div class='add'>+      along with all associated circuitry excluding a permanently</div><div class='add'>+      attached peripheral.</div><div class='add'>+</div><div class='add'>+  power-on-time-ms:</div><div class='add'>+    maximum: 510</div><div class='add'>+    default: 100</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the time it takes from the time the host initiates the</div><div class='add'>+      power-on sequence to a port until the port has adequate power.</div><div class='add'>+</div><div class='add'>+  swap-dx-lanes:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint8-array</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the ports which will swap the differential-pair (D+/D-),</div><div class='add'>+      default is not-swapped.</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+      usb-hub@2c {</div><div class='add'>+        compatible = "microchip,usb2512b";</div><div class='add'>+        reg = &lt;0x2c&gt;;</div><div class='add'>+        reset-gpios = &lt;&amp;gpio1 4 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+      };</div><div class='add'>+</div><div class='add'>+      usb-hub@2d {</div><div class='add'>+        compatible = "microchip,usb2514b";</div><div class='add'>+        reg = &lt;0x2d&gt;;</div><div class='add'>+        vendor-id = /bits/ 16 &lt;0x0000&gt;;</div><div class='add'>+        product-id = /bits/ 16 &lt;0x0000&gt;;</div><div class='add'>+        string-support;</div><div class='add'>+        manufacturer = "Foo";</div><div class='add'>+        product = "Foo-Bar";</div><div class='add'>+        serial = "1234567890A";</div><div class='add'>+        /* correct misplaced usb connectors on port 1,2 */</div><div class='add'>+        swap-dx-lanes = &lt;1 2&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/usbmisc-imx.txt b/Documentation/devicetree/bindings/usb/usbmisc-imx.txt<br/>deleted file mode 100644<br/>index b796836d2ce7..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/usbmisc-imx.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/usbmisc-imx.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-* Freescale i.MX non-core registers</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- #index-cells: Cells used to describe usb controller index. Should be &lt;1&gt;</div><div class='del'>-- compatible: Should be one of below:</div><div class='del'>-	"fsl,imx6q-usbmisc" for imx6q</div><div class='del'>-	"fsl,vf610-usbmisc" for Vybrid vf610</div><div class='del'>-	"fsl,imx6sx-usbmisc" for imx6sx</div><div class='del'>-	"fsl,imx7d-usbmisc" for imx7d</div><div class='del'>-	"fsl,imx7ulp-usbmisc" for imx7ulp</div><div class='del'>-- reg: Should contain registers location and length</div><div class='del'>-</div><div class='del'>-Examples:</div><div class='del'>-usbmisc@2184800 {</div><div class='del'>-	#index-cells = &lt;1&gt;;</div><div class='del'>-	compatible = "fsl,imx6q-usbmisc";</div><div class='del'>-	reg = &lt;0x02184800 0x200&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/vialab,vl817.yaml b/Documentation/devicetree/bindings/usb/vialab,vl817.yaml<br/>new file mode 100644<br/>index 000000000000..23a13e1d5c7a<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/vialab,vl817.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/vialab,vl817.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/usb/vialab,vl817.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Via labs VL817 USB 3.1 hub controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Anand Moon &lt;linux.amoon@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: usb-device.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - usb2109,2817</div><div class='add'>+      - usb2109,817</div><div class='add'>+</div><div class='add'>+  reg: true</div><div class='add'>+</div><div class='add'>+  reset-gpios:</div><div class='add'>+    maxItems: 1</div><div class='add'>+    description:</div><div class='add'>+      GPIO controlling the RESET# pin.</div><div class='add'>+</div><div class='add'>+  vdd-supply:</div><div class='add'>+    description:</div><div class='add'>+      phandle to the regulator that provides power to the hub.</div><div class='add'>+</div><div class='add'>+  peer-hub:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle to the peer hub on the controller.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - reset-gpios</div><div class='add'>+  - vdd-supply</div><div class='add'>+  - peer-hub</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+</div><div class='add'>+    usb {</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        /* 2.0 hub on port 1 */</div><div class='add'>+        hub_2_0: hub@1 {</div><div class='add'>+            compatible = "usb2109,2817";</div><div class='add'>+            reg = &lt;1&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vcc_5v&gt;;</div><div class='add'>+            peer-hub = &lt;&amp;hub_3_0&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        /* 3.1 hub on port 4 */</div><div class='add'>+        hub_3_0: hub@2 {</div><div class='add'>+            compatible = "usb2109,817";</div><div class='add'>+            reg = &lt;2&gt;;</div><div class='add'>+            vdd-supply = &lt;&amp;vcc_5v&gt;;</div><div class='add'>+            peer-hub = &lt;&amp;hub_2_0&gt;;</div><div class='add'>+            reset-gpios = &lt;&amp;gpio 20 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml b/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml<br/>index c2b2243c7892..937670de01cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/usb/willsemi,wusb3801.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/usb/willsemi,wusb3801.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: WUSB3801 Type-C port controller DT bindings</div><div class='add'>+title: WUSB3801 Type-C port controller</div><div class='ctx'> </div><div class='ctx'> description:</div><div class='ctx'>   The Will Semiconductor WUSB3801 is a USB Type-C port controller which</div><div class='hunk'>@@ -28,6 +28,7 @@ properties:</div><div class='ctx'>   connector:</div><div class='ctx'>     type: object</div><div class='ctx'>     $ref: ../connector/usb-connector.yaml#</div><div class='add'>+    unevaluatedProperties: false</div><div class='ctx'>     description:</div><div class='ctx'>       The managed USB Type-C connector. Since WUSB3801 does not support</div><div class='ctx'>       Power Delivery, the node should have the "pd-disable" property.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml<br/>index 01430973ecec..82d39ab0231b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/vendor-prefixes.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/vendor-prefixes.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/vendor-prefixes.yaml</a></div><div class='hunk'>@@ -37,6 +37,8 @@ patternProperties:</div><div class='ctx'>     description: Abracon Corporation</div><div class='ctx'>   "^abt,.*":</div><div class='ctx'>     description: ShenZhen Asia Better Technology Ltd.</div><div class='add'>+  "^acbel,.*":</div><div class='add'>+    description: Acbel Polytech Inc.</div><div class='ctx'>   "^acer,.*":</div><div class='ctx'>     description: Acer Inc.</div><div class='ctx'>   "^acme,.*":</div><div class='hunk'>@@ -69,6 +71,10 @@ patternProperties:</div><div class='ctx'>     description: Annapurna Labs</div><div class='ctx'>   "^alcatel,.*":</div><div class='ctx'>     description: Alcatel</div><div class='add'>+  "^aldec,.*":</div><div class='add'>+    description: Aldec, Inc.</div><div class='add'>+  "^alfa-network,.*":</div><div class='add'>+    description: ALFA Network Inc.</div><div class='ctx'>   "^allegro,.*":</div><div class='ctx'>     description: Allegro DVT</div><div class='ctx'>   "^allo,.*":</div><div class='hunk'>@@ -105,6 +111,8 @@ patternProperties:</div><div class='ctx'>     description: AMS-Taos Inc.</div><div class='ctx'>   "^analogix,.*":</div><div class='ctx'>     description: Analogix Semiconductor, Inc.</div><div class='add'>+  "^anbernic,.*":</div><div class='add'>+    description: Anbernic</div><div class='ctx'>   "^andestech,.*":</div><div class='ctx'>     description: Andes Technology Corporation</div><div class='ctx'>   "^anvo,.*":</div><div class='hunk'>@@ -141,8 +149,13 @@ patternProperties:</div><div class='ctx'>     description: ASIX Electronics Corporation</div><div class='ctx'>   "^aspeed,.*":</div><div class='ctx'>     description: ASPEED Technology Inc.</div><div class='add'>+  "^asrock,.*":</div><div class='add'>+    description: ASRock Inc.</div><div class='ctx'>   "^asus,.*":</div><div class='ctx'>     description: AsusTek Computer Inc.</div><div class='add'>+  "^atheros,.*":</div><div class='add'>+    description: Qualcomm Atheros, Inc. (deprecated, use qca)</div><div class='add'>+    deprecated: true</div><div class='ctx'>   "^atlas,.*":</div><div class='ctx'>     description: Atlas Scientific LLC</div><div class='ctx'>   "^atmel,.*":</div><div class='hunk'>@@ -189,18 +202,20 @@ patternProperties:</div><div class='ctx'>     description: Bosch Sensortec GmbH</div><div class='ctx'>   "^boundary,.*":</div><div class='ctx'>     description: Boundary Devices Inc.</div><div class='del'>-  "^broadmobi,.*":</div><div class='del'>-    description: Shanghai Broadmobi Communication Technology Co.,Ltd.</div><div class='ctx'>   "^brcm,.*":</div><div class='ctx'>     description: Broadcom Corporation</div><div class='add'>+  "^broadmobi,.*":</div><div class='add'>+    description: Shanghai Broadmobi Communication Technology Co.,Ltd.</div><div class='ctx'>   "^bsh,.*":</div><div class='ctx'>     description: BSH Hausgeraete GmbH</div><div class='add'>+  "^bticino,.*":</div><div class='add'>+    description: Bticino International</div><div class='ctx'>   "^buffalo,.*":</div><div class='ctx'>     description: Buffalo, Inc.</div><div class='ctx'>   "^bur,.*":</div><div class='ctx'>     description: B&amp;R Industrial Automation GmbH</div><div class='del'>-  "^bticino,.*":</div><div class='del'>-    description: Bticino International</div><div class='add'>+  "^bytedance,.*":</div><div class='add'>+    description: ByteDance Ltd.</div><div class='ctx'>   "^calamp,.*":</div><div class='ctx'>     description: CalAmp Corp.</div><div class='ctx'>   "^calaosystems,.*":</div><div class='hunk'>@@ -227,6 +242,8 @@ patternProperties:</div><div class='ctx'>     description: CellWise Microelectronics Co., Ltd</div><div class='ctx'>   "^ceva,.*":</div><div class='ctx'>     description: Ceva, Inc.</div><div class='add'>+  "^chargebyte,.*":</div><div class='add'>+    description: chargebyte GmbH</div><div class='ctx'>   "^checkpoint,.*":</div><div class='ctx'>     description: Check Point Software Technologies Ltd.</div><div class='ctx'>   "^chefree,.*":</div><div class='hunk'>@@ -237,6 +254,8 @@ patternProperties:</div><div class='ctx'>     description: ChipOne</div><div class='ctx'>   "^chipspark,.*":</div><div class='ctx'>     description: ChipSPARK</div><div class='add'>+  "^chongzhou,.*":</div><div class='add'>+    description: Shenzhen Chongzhou Electronic Technology Co., Ltd</div><div class='ctx'>   "^chrontel,.*":</div><div class='ctx'>     description: Chrontel, Inc.</div><div class='ctx'>   "^chrp,.*":</div><div class='hunk'>@@ -251,6 +270,10 @@ patternProperties:</div><div class='ctx'>     description: Cirrus Logic, Inc.</div><div class='ctx'>   "^cisco,.*":</div><div class='ctx'>     description: Cisco Systems, Inc.</div><div class='add'>+  "^clockwork,.*":</div><div class='add'>+    description: Clockwork Tech LLC</div><div class='add'>+  "^cloos,.*":</div><div class='add'>+    description: Carl Cloos Schweisstechnik GmbH.</div><div class='ctx'>   "^cloudengines,.*":</div><div class='ctx'>     description: Cloud Engines, Inc.</div><div class='ctx'>   "^cnm,.*":</div><div class='hunk'>@@ -283,6 +306,8 @@ patternProperties:</div><div class='ctx'>     description: Shenzen Chuangsiqi Technology Co.,Ltd.</div><div class='ctx'>   "^ctera,.*":</div><div class='ctx'>     description: CTERA Networks Intl.</div><div class='add'>+  "^ctu,.*":</div><div class='add'>+    description: Czech Technical University in Prague</div><div class='ctx'>   "^cubietech,.*":</div><div class='ctx'>     description: Cubietech, Ltd.</div><div class='ctx'>   "^cui,.*":</div><div class='hunk'>@@ -303,6 +328,8 @@ patternProperties:</div><div class='ctx'>     description: Dell Inc.</div><div class='ctx'>   "^delta,.*":</div><div class='ctx'>     description: Delta Electronics, Inc.</div><div class='add'>+  "^densitron,.*":</div><div class='add'>+    description: Densitron Technologies Ltd</div><div class='ctx'>   "^denx,.*":</div><div class='ctx'>     description: Denx Software Engineering</div><div class='ctx'>   "^devantech,.*":</div><div class='hunk'>@@ -317,6 +344,8 @@ patternProperties:</div><div class='ctx'>     description: Digi International Inc.</div><div class='ctx'>   "^digilent,.*":</div><div class='ctx'>     description: Diglent, Inc.</div><div class='add'>+  "^diodes,.*":</div><div class='add'>+    description: Diodes, Inc.</div><div class='ctx'>   "^dioo,.*":</div><div class='ctx'>     description: Dioo Microcircuit Co., Ltd</div><div class='ctx'>   "^dlc,.*":</div><div class='hunk'>@@ -345,12 +374,16 @@ patternProperties:</div><div class='ctx'>     description: Embedded Artists AB</div><div class='ctx'>   "^ebang,.*":</div><div class='ctx'>     description: Zhejiang Ebang Communication Co., Ltd</div><div class='add'>+  "^ebbg,.*":</div><div class='add'>+    description: EBBG</div><div class='ctx'>   "^ebs-systart,.*":</div><div class='ctx'>     description: EBS-SYSTART GmbH</div><div class='ctx'>   "^ebv,.*":</div><div class='ctx'>     description: EBV Elektronik</div><div class='ctx'>   "^eckelmann,.*":</div><div class='ctx'>     description: Eckelmann AG</div><div class='add'>+  "^edgeble,.*":</div><div class='add'>+    description: Edgeble AI Technologies Pvt. Ltd.</div><div class='ctx'>   "^edimax,.*":</div><div class='ctx'>     description: EDIMAX Technology Co., Ltd</div><div class='ctx'>   "^edt,.*":</div><div class='hunk'>@@ -373,6 +406,8 @@ patternProperties:</div><div class='ctx'>     description: Elimo Engineering Ltd.</div><div class='ctx'>   "^elpida,.*":</div><div class='ctx'>     description: Elpida Memory, Inc.</div><div class='add'>+  "^embedfire,.*":</div><div class='add'>+    description: Dongguan EmbedFire Electronic Technology Co., Ltd.</div><div class='ctx'>   "^embest,.*":</div><div class='ctx'>     description: Shenzhen Embest Technology Co., Ltd.</div><div class='ctx'>   "^emlid,.*":</div><div class='hunk'>@@ -383,6 +418,8 @@ patternProperties:</div><div class='ctx'>     description: Empire Electronix</div><div class='ctx'>   "^emtrion,.*":</div><div class='ctx'>     description: emtrion GmbH</div><div class='add'>+  "^enclustra,.*":</div><div class='add'>+    description: Enclustra GmbH</div><div class='ctx'>   "^endless,.*":</div><div class='ctx'>     description: Endless Mobile, Inc.</div><div class='ctx'>   "^ene,.*":</div><div class='hunk'>@@ -469,6 +506,8 @@ patternProperties:</div><div class='ctx'>     description: GE Fanuc Intelligent Platforms Embedded Systems, Inc.</div><div class='ctx'>   "^gemei,.*":</div><div class='ctx'>     description: Gemei Digital Technology Co., Ltd.</div><div class='add'>+  "^genesys,.*":</div><div class='add'>+    description: Genesys Logic, Inc.</div><div class='ctx'>   "^geniatech,.*":</div><div class='ctx'>     description: Geniatech, Inc.</div><div class='ctx'>   "^giantec,.*":</div><div class='hunk'>@@ -481,10 +520,14 @@ patternProperties:</div><div class='ctx'>     description: GlobalTop Technology, Inc.</div><div class='ctx'>   "^gmt,.*":</div><div class='ctx'>     description: Global Mixed-mode Technology, Inc.</div><div class='add'>+  "^goldelico,.*":</div><div class='add'>+    description: Golden Delicious Computers GmbH &amp; Co. KG</div><div class='ctx'>   "^goodix,.*":</div><div class='ctx'>     description: Shenzhen Huiding Technology Co., Ltd.</div><div class='ctx'>   "^google,.*":</div><div class='ctx'>     description: Google, Inc.</div><div class='add'>+  "^gplus,.*":</div><div class='add'>+    description: GPLUS</div><div class='ctx'>   "^grinn,.*":</div><div class='ctx'>     description: Grinn</div><div class='ctx'>   "^grmn,.*":</div><div class='hunk'>@@ -503,6 +546,8 @@ patternProperties:</div><div class='ctx'>     description: Haoyu Microelectronic Co. Ltd.</div><div class='ctx'>   "^hardkernel,.*":</div><div class='ctx'>     description: Hardkernel Co., Ltd</div><div class='add'>+  "^hechuang,.*":</div><div class='add'>+    description: Shenzhen Hechuang Intelligent Co.</div><div class='ctx'>   "^hideep,.*":</div><div class='ctx'>     description: HiDeep Inc.</div><div class='ctx'>   "^himax,.*":</div><div class='hunk'>@@ -520,6 +565,8 @@ patternProperties:</div><div class='ctx'>     description: Hitex Development Tools</div><div class='ctx'>   "^holt,.*":</div><div class='ctx'>     description: Holt Integrated Circuits, Inc.</div><div class='add'>+  "^holtek,.*":</div><div class='add'>+    description: Holtek Semiconductor, Inc.</div><div class='ctx'>   "^honestar,.*":</div><div class='ctx'>     description: Honestar Technologies Co., Ltd.</div><div class='ctx'>   "^honeywell,.*":</div><div class='hunk'>@@ -532,18 +579,20 @@ patternProperties:</div><div class='ctx'>     description: Hewlett Packard Enterprise</div><div class='ctx'>   "^hsg,.*":</div><div class='ctx'>     description: HannStar Display Co.</div><div class='del'>-  "^holtek,.*":</div><div class='del'>-    description: Holtek Semiconductor, Inc.</div><div class='ctx'>   "^huawei,.*":</div><div class='ctx'>     description: Huawei Technologies Co., Ltd.</div><div class='ctx'>   "^hugsun,.*":</div><div class='ctx'>     description: Shenzhen Hugsun Technology Co. Ltd.</div><div class='ctx'>   "^hwacom,.*":</div><div class='ctx'>     description: HwaCom Systems Inc.</div><div class='add'>+  "^hxt,.*":</div><div class='add'>+    description: HXT Semiconductor</div><div class='ctx'>   "^hycon,.*":</div><div class='ctx'>     description: Hycon Technology Corp.</div><div class='ctx'>   "^hydis,.*":</div><div class='ctx'>     description: Hydis Technologies</div><div class='add'>+  "^hynitron,.*":</div><div class='add'>+    description: Shanghai Hynitron Microelectronics Co. Ltd.</div><div class='ctx'>   "^hynix,.*":</div><div class='ctx'>     description: SK Hynix Inc.</div><div class='ctx'>   "^hyundai,.*":</div><div class='hunk'>@@ -574,12 +623,14 @@ patternProperties:</div><div class='ctx'>     description: Infineon Technologies</div><div class='ctx'>   "^inforce,.*":</div><div class='ctx'>     description: Inforce Computing</div><div class='del'>-  "^ivo,.*":</div><div class='del'>-    description: InfoVision Optoelectronics Kunshan Co. Ltd.</div><div class='ctx'>   "^ingenic,.*":</div><div class='ctx'>     description: Ingenic Semiconductor</div><div class='add'>+  "^ingrasys,.*":</div><div class='add'>+    description: Ingrasys Technology Inc.</div><div class='ctx'>   "^injoinic,.*":</div><div class='ctx'>     description: Injoinic Technology Corp.</div><div class='add'>+  "^innocomm,.*":</div><div class='add'>+    description: InnoComm Mobile Technology Corp.</div><div class='ctx'>   "^innolux,.*":</div><div class='ctx'>     description: Innolux Corporation</div><div class='ctx'>   "^inside-secure,.*":</div><div class='hunk'>@@ -594,10 +645,14 @@ patternProperties:</div><div class='ctx'>     description: Inter Control Group</div><div class='ctx'>   "^invensense,.*":</div><div class='ctx'>     description: InvenSense Inc.</div><div class='add'>+  "^inventec,.*":</div><div class='add'>+    description: Inventec</div><div class='ctx'>   "^inversepath,.*":</div><div class='ctx'>     description: Inverse Path</div><div class='ctx'>   "^iom,.*":</div><div class='ctx'>     description: Iomega Corporation</div><div class='add'>+  "^irondevice,.*":</div><div class='add'>+    description: Iron Device Corporation</div><div class='ctx'>   "^isee,.*":</div><div class='ctx'>     description: ISEE 2007 S.L.</div><div class='ctx'>   "^isil,.*":</div><div class='hunk'>@@ -610,8 +665,12 @@ patternProperties:</div><div class='ctx'>     description: ITEAD Intelligent Systems Co.Ltd</div><div class='ctx'>   "^itian,.*":</div><div class='ctx'>     description: ITian Corporation</div><div class='add'>+  "^ivo,.*":</div><div class='add'>+    description: InfoVision Optoelectronics Kunshan Co. Ltd.</div><div class='ctx'>   "^iwave,.*":</div><div class='ctx'>     description: iWave Systems Technologies Pvt. Ltd.</div><div class='add'>+  "^jadard,.*":</div><div class='add'>+    description: Jadard Technology Inc.</div><div class='ctx'>   "^jdi,.*":</div><div class='ctx'>     description: Japan Display Inc.</div><div class='ctx'>   "^jedec,.*":</div><div class='hunk'>@@ -668,6 +727,8 @@ patternProperties:</div><div class='ctx'>     description: Lantiq Semiconductor</div><div class='ctx'>   "^lattice,.*":</div><div class='ctx'>     description: Lattice Semiconductor</div><div class='add'>+  "^lctech,.*":</div><div class='add'>+    description: Shenzen LC Technology Co., Ltd.</div><div class='ctx'>   "^leadtek,.*":</div><div class='ctx'>     description: Shenzhen Leadtek Technology Co., Ltd.</div><div class='ctx'>   "^leez,.*":</div><div class='hunk'>@@ -688,6 +749,8 @@ patternProperties:</div><div class='ctx'>     description: Lichee Pi</div><div class='ctx'>   "^linaro,.*":</div><div class='ctx'>     description: Linaro Limited</div><div class='add'>+  "^lineartechnology,.*":</div><div class='add'>+    description: Linear Technology</div><div class='ctx'>   "^linksprite,.*":</div><div class='ctx'>     description: LinkSprite Technologies, Inc.</div><div class='ctx'>   "^linksys,.*":</div><div class='hunk'>@@ -714,6 +777,8 @@ patternProperties:</div><div class='ctx'>     description: Lontium Semiconductor Corporation</div><div class='ctx'>   "^loongson,.*":</div><div class='ctx'>     description: Loongson Technology Corporation Limited</div><div class='add'>+  "^loongmasses,.*":</div><div class='add'>+    description: Nanjing Loongmasses Ltd.</div><div class='ctx'>   "^lsi,.*":</div><div class='ctx'>     description: LSI Corp. (LSI Logic)</div><div class='ctx'>   "^lwn,.*":</div><div class='hunk'>@@ -734,6 +799,8 @@ patternProperties:</div><div class='ctx'>     description: MaxBotix Inc.</div><div class='ctx'>   "^maxim,.*":</div><div class='ctx'>     description: Maxim Integrated Products</div><div class='add'>+  "^maxlinear,.*":</div><div class='add'>+    description: MaxLinear Inc.</div><div class='ctx'>   "^mbvl,.*":</div><div class='ctx'>     description: Mobiveil Inc.</div><div class='ctx'>   "^mcube,.*":</div><div class='hunk'>@@ -754,6 +821,8 @@ patternProperties:</div><div class='ctx'>     description: MELFAS Inc.</div><div class='ctx'>   "^mellanox,.*":</div><div class='ctx'>     description: Mellanox Technologies</div><div class='add'>+  "^memsensing,.*":</div><div class='add'>+    description: MEMSensing Microsystems Co., Ltd.</div><div class='ctx'>   "^memsic,.*":</div><div class='ctx'>     description: MEMSIC Inc.</div><div class='ctx'>   "^menlo,.*":</div><div class='hunk'>@@ -764,6 +833,8 @@ patternProperties:</div><div class='ctx'>     description: Cisco Meraki, LLC</div><div class='ctx'>   "^merrii,.*":</div><div class='ctx'>     description: Merrii Technology Co., Ltd.</div><div class='add'>+  "^methode,.*":</div><div class='add'>+    description: Methode Electronics, Inc.</div><div class='ctx'>   "^micrel,.*":</div><div class='ctx'>     description: Micrel Inc.</div><div class='ctx'>   "^microchip,.*":</div><div class='hunk'>@@ -788,14 +859,20 @@ patternProperties:</div><div class='ctx'>     description: MiraMEMS Sensing Technology Co., Ltd.</div><div class='ctx'>   "^mitsubishi,.*":</div><div class='ctx'>     description: Mitsubishi Electric Corporation</div><div class='add'>+  "^mixel,.*":</div><div class='add'>+    description: Mixel, Inc.</div><div class='ctx'>   "^miyoo,.*":</div><div class='ctx'>     description: Miyoo</div><div class='ctx'>   "^mntre,.*":</div><div class='ctx'>     description: MNT Research GmbH</div><div class='ctx'>   "^modtronix,.*":</div><div class='ctx'>     description: Modtronix Engineering</div><div class='add'>+  "^moortec,.*":</div><div class='add'>+    description: Moortec Semiconductor Ltd.</div><div class='ctx'>   "^mosaixtech,.*":</div><div class='ctx'>     description: Mosaix Technologies, Inc.</div><div class='add'>+  "^motorcomm,.*":</div><div class='add'>+    description: MotorComm, Inc.</div><div class='ctx'>   "^motorola,.*":</div><div class='ctx'>     description: Motorola, Inc.</div><div class='ctx'>   "^moxa,.*":</div><div class='hunk'>@@ -848,12 +925,14 @@ patternProperties:</div><div class='ctx'>     description: Shenzhen Netxeon Technology CO., LTD</div><div class='ctx'>   "^neweast,.*":</div><div class='ctx'>     description: Guangdong Neweast Optoelectronics CO., LTD</div><div class='add'>+  "^newhaven,.*":</div><div class='add'>+    description: Newhaven Display International</div><div class='add'>+  "^newvision,.*":</div><div class='add'>+    description: New Vision Display (Shenzhen) Co., Ltd.</div><div class='ctx'>   "^nexbox,.*":</div><div class='ctx'>     description: Nexbox</div><div class='ctx'>   "^nextthing,.*":</div><div class='ctx'>     description: Next Thing Co.</div><div class='del'>-  "^newhaven,.*":</div><div class='del'>-    description: Newhaven Display International</div><div class='ctx'>   "^ni,.*":</div><div class='ctx'>     description: National Instruments</div><div class='ctx'>   "^nintendo,.*":</div><div class='hunk'>@@ -864,6 +943,8 @@ patternProperties:</div><div class='ctx'>     description: Nokia</div><div class='ctx'>   "^nordic,.*":</div><div class='ctx'>     description: Nordic Semiconductor</div><div class='add'>+  "^novatek,.*":</div><div class='add'>+    description: Novatek</div><div class='ctx'>   "^novtech,.*":</div><div class='ctx'>     description: NovTech, Inc.</div><div class='ctx'>   "^nutsboard,.*":</div><div class='hunk'>@@ -892,6 +973,8 @@ patternProperties:</div><div class='ctx'>     description: One Laptop Per Child</div><div class='ctx'>   "^oneplus,.*":</div><div class='ctx'>     description: OnePlus Technology (Shenzhen) Co., Ltd.</div><div class='add'>+  "^onie,.*":</div><div class='add'>+    description: Open Network Install Environment group</div><div class='ctx'>   "^onion,.*":</div><div class='ctx'>     description: Onion Corporation</div><div class='ctx'>   "^onnn,.*":</div><div class='hunk'>@@ -900,10 +983,14 @@ patternProperties:</div><div class='ctx'>     description: On Tat Industrial Company</div><div class='ctx'>   "^opalkelly,.*":</div><div class='ctx'>     description: Opal Kelly Incorporated</div><div class='add'>+  "^openailab,.*":</div><div class='add'>+    description: openailab.com</div><div class='ctx'>   "^opencores,.*":</div><div class='ctx'>     description: OpenCores.org</div><div class='ctx'>   "^openembed,.*":</div><div class='ctx'>     description: OpenEmbed</div><div class='add'>+  "^openpandora,.*":</div><div class='add'>+    description: OpenPandora GmbH</div><div class='ctx'>   "^openrisc,.*":</div><div class='ctx'>     description: OpenRISC.io</div><div class='ctx'>   "^option,.*":</div><div class='hunk'>@@ -970,6 +1057,8 @@ patternProperties:</div><div class='ctx'>     description: PocketBook International SA</div><div class='ctx'>   "^polaroid,.*":</div><div class='ctx'>     description: Polaroid Corporation</div><div class='add'>+  "^polyhex,.*":</div><div class='add'>+    description: Polyhex Technology Co. Ltd.</div><div class='ctx'>   "^portwell,.*":</div><div class='ctx'>     description: Portwell Inc.</div><div class='ctx'>   "^poslab,.*":</div><div class='hunk'>@@ -998,14 +1087,16 @@ patternProperties:</div><div class='ctx'>     description: QEMU, a generic and open source machine emulator and virtualizer</div><div class='ctx'>   "^qi,.*":</div><div class='ctx'>     description: Qi Hardware</div><div class='del'>-  "^qihua,.*":</div><div class='del'>-    description: Chengdu Kaixuan Information Technology Co., Ltd.</div><div class='ctx'>   "^qiaodian,.*":</div><div class='ctx'>     description: QiaoDian XianShi Corporation</div><div class='add'>+  "^qihua,.*":</div><div class='add'>+    description: Chengdu Kaixuan Information Technology Co., Ltd.</div><div class='ctx'>   "^qishenglong,.*":</div><div class='ctx'>     description: Shenzhen QiShenglong Industrialist Co., Ltd.</div><div class='ctx'>   "^qnap,.*":</div><div class='ctx'>     description: QNAP Systems, Inc.</div><div class='add'>+  "^quanta,.*":</div><div class='add'>+    description: Quanta Computer Inc.</div><div class='ctx'>   "^radxa,.*":</div><div class='ctx'>     description: Radxa</div><div class='ctx'>   "^raidsonic,.*":</div><div class='hunk'>@@ -1026,22 +1117,22 @@ patternProperties:</div><div class='ctx'>     description: reMarkable AS</div><div class='ctx'>   "^renesas,.*":</div><div class='ctx'>     description: Renesas Electronics Corporation</div><div class='del'>-  "^rex,.*":</div><div class='del'>-    description: iMX6 Rex Project</div><div class='ctx'>   "^rervision,.*":</div><div class='ctx'>     description: Shenzhen Rervision Technology Co., Ltd.</div><div class='ctx'>   "^revotics,.*":</div><div class='ctx'>     description: Revolution Robotics, Inc. (Revotics)</div><div class='add'>+  "^rex,.*":</div><div class='add'>+    description: iMX6 Rex Project</div><div class='ctx'>   "^richtek,.*":</div><div class='ctx'>     description: Richtek Technology Corporation</div><div class='ctx'>   "^ricoh,.*":</div><div class='ctx'>     description: Ricoh Co. Ltd.</div><div class='ctx'>   "^rikomagic,.*":</div><div class='ctx'>     description: Rikomagic Tech Corp. Ltd</div><div class='del'>-  "^riscv,.*":</div><div class='del'>-    description: RISC-V Foundation</div><div class='ctx'>   "^riot,.*":</div><div class='ctx'>     description: Embest RIoT</div><div class='add'>+  "^riscv,.*":</div><div class='add'>+    description: RISC-V Foundation</div><div class='ctx'>   "^rockchip,.*":</div><div class='ctx'>     description: Fuzhou Rockchip Electronics Co., Ltd</div><div class='ctx'>   "^rocktech,.*":</div><div class='hunk'>@@ -1082,6 +1173,8 @@ patternProperties:</div><div class='ctx'>     description: Sensirion AG</div><div class='ctx'>   "^sensortek,.*":</div><div class='ctx'>     description: Sensortek Technology Corporation</div><div class='add'>+  "^sercomm,.*":</div><div class='add'>+    description: Sercomm (Suzhou) Corporation</div><div class='ctx'>   "^sff,.*":</div><div class='ctx'>     description: Small Form Factor Committee</div><div class='ctx'>   "^sgd,.*":</div><div class='hunk'>@@ -1092,6 +1185,8 @@ patternProperties:</div><div class='ctx'>     description: SGX Sensortech</div><div class='ctx'>   "^sharp,.*":</div><div class='ctx'>     description: Sharp Corporation</div><div class='add'>+  "^shift,.*":</div><div class='add'>+    description: SHIFT GmbH</div><div class='ctx'>   "^shimafuji,.*":</div><div class='ctx'>     description: Shimafuji Electric, Inc.</div><div class='ctx'>   "^shiratech,.*":</div><div class='hunk'>@@ -1100,6 +1195,8 @@ patternProperties:</div><div class='ctx'>     description: Si-En Technology Ltd.</div><div class='ctx'>   "^si-linux,.*":</div><div class='ctx'>     description: Silicon Linux Corporation</div><div class='add'>+  "^siemens,.*":</div><div class='add'>+    description: Siemens AG</div><div class='ctx'>   "^sifive,.*":</div><div class='ctx'>     description: SiFive, Inc.</div><div class='ctx'>   "^sigma,.*":</div><div class='hunk'>@@ -1122,14 +1219,16 @@ patternProperties:</div><div class='ctx'>     description: Siliconfile Technologies lnc.</div><div class='ctx'>   "^siliconmitus,.*":</div><div class='ctx'>     description: Silicon Mitus, Inc.</div><div class='del'>-  "^siemens,.*":</div><div class='del'>-    description: Siemens AG</div><div class='add'>+  "^silvaco,.*":</div><div class='add'>+    description: Silvaco, Inc.</div><div class='ctx'>   "^simtek,.*":</div><div class='ctx'>     description: Cypress Semiconductor Corporation (Simtek Corporation)</div><div class='ctx'>   "^sinlinx,.*":</div><div class='ctx'>     description: Sinlinx Electronics Technology Co., LTD</div><div class='ctx'>   "^sinovoip,.*":</div><div class='ctx'>     description: SinoVoip Co., Ltd</div><div class='add'>+  "^sinowealth,.*":</div><div class='add'>+    description: SINO WEALTH Electronic Ltd.</div><div class='ctx'>   "^sipeed,.*":</div><div class='ctx'>     description: Shenzhen Sipeed Technology Co., Ltd.</div><div class='ctx'>   "^sirf,.*":</div><div class='hunk'>@@ -1158,6 +1257,8 @@ patternProperties:</div><div class='ctx'>     description: Solomon Systech Limited</div><div class='ctx'>   "^sony,.*":</div><div class='ctx'>     description: Sony Corporation</div><div class='add'>+  "^sourceparts,.*":</div><div class='add'>+    description: Source Parts Inc.</div><div class='ctx'>   "^spansion,.*":</div><div class='ctx'>     description: Spansion Inc.</div><div class='ctx'>   "^sparkfun,.*":</div><div class='hunk'>@@ -1181,6 +1282,8 @@ patternProperties:</div><div class='ctx'>     description: Starry Electronic Technology (ShenZhen) Co., LTD</div><div class='ctx'>   "^startek,.*":</div><div class='ctx'>     description: Startek</div><div class='add'>+  "^starterkit,.*":</div><div class='add'>+    description: Starterkit</div><div class='ctx'>   "^ste,.*":</div><div class='ctx'>     description: ST-Ericsson</div><div class='ctx'>     deprecated: true</div><div class='hunk'>@@ -1193,18 +1296,20 @@ patternProperties:</div><div class='ctx'>     description: StorLink Semiconductors, Inc.</div><div class='ctx'>   "^storm,.*":</div><div class='ctx'>     description: Storm Semiconductor, Inc.</div><div class='add'>+  "^storopack,.*":</div><div class='add'>+    description: Storopack</div><div class='ctx'>   "^summit,.*":</div><div class='ctx'>     description: Summit microelectronics</div><div class='ctx'>   "^sunchip,.*":</div><div class='ctx'>     description: Shenzhen Sunchip Technology Co., Ltd</div><div class='add'>+  "^sundance,.*":</div><div class='add'>+    description: Sundance DSP Inc.</div><div class='ctx'>   "^sunplus,.*":</div><div class='ctx'>     description: Sunplus Technology Co., Ltd.</div><div class='ctx'>   "^SUNW,.*":</div><div class='ctx'>     description: Sun Microsystems, Inc</div><div class='ctx'>   "^supermicro,.*":</div><div class='ctx'>     description: Super Micro Computer, Inc.</div><div class='del'>-  "^silvaco,.*":</div><div class='del'>-    description: Silvaco, Inc.</div><div class='ctx'>   "^swir,.*":</div><div class='ctx'>     description: Sierra Wireless</div><div class='ctx'>   "^syna,.*":</div><div class='hunk'>@@ -1226,16 +1331,18 @@ patternProperties:</div><div class='ctx'>     description: Shenzhen City Tang Cheng Technology Co., Ltd.</div><div class='ctx'>   "^tdo,.*":</div><div class='ctx'>     description: Shangai Top Display Optoelectronics Co., Ltd</div><div class='add'>+  "^team-source-display,.*":</div><div class='add'>+    description: Shenzhen Team Source Display Technology Co., Ltd. (TSD)</div><div class='ctx'>   "^technexion,.*":</div><div class='ctx'>     description: TechNexion</div><div class='ctx'>   "^technologic,.*":</div><div class='ctx'>     description: Technologic Systems</div><div class='add'>+  "^techstar,.*":</div><div class='add'>+    description: Shenzhen Techstar Electronics Co., Ltd.</div><div class='ctx'>   "^teltonika,.*":</div><div class='ctx'>     description: Teltonika Networks</div><div class='ctx'>   "^tempo,.*":</div><div class='ctx'>     description: Tempo Semiconductor</div><div class='del'>-  "^techstar,.*":</div><div class='del'>-    description: Shenzhen Techstar Electronics Co., Ltd.</div><div class='ctx'>   "^terasic,.*":</div><div class='ctx'>     description: Terasic Inc.</div><div class='ctx'>   "^tesla,.*":</div><div class='hunk'>@@ -1250,6 +1357,8 @@ patternProperties:</div><div class='ctx'>     description: thingy.jp</div><div class='ctx'>   "^thundercomm,.*":</div><div class='ctx'>     description: Thundercomm Technology Co., Ltd.</div><div class='add'>+  "^thwc,.*":</div><div class='add'>+    description: Shenzhen Tong Heng Wei Chuang Technology Co., Ltd.</div><div class='ctx'>   "^ti,.*":</div><div class='ctx'>     description: Texas Instruments</div><div class='ctx'>   "^tianma,.*":</div><div class='hunk'>@@ -1289,10 +1398,6 @@ patternProperties:</div><div class='ctx'>     description: Tronsmart</div><div class='ctx'>   "^truly,.*":</div><div class='ctx'>     description: Truly Semiconductors Limited</div><div class='del'>-  "^visionox,.*":</div><div class='del'>-    description: Visionox</div><div class='del'>-  "^team-source-display,.*":</div><div class='del'>-    description: Shenzhen Team Source Display Technology Co., Ltd. (TSD)</div><div class='ctx'>   "^tsd,.*":</div><div class='ctx'>     description: Theobroma Systems Design und Consulting GmbH</div><div class='ctx'>   "^tyan,.*":</div><div class='hunk'>@@ -1301,12 +1406,14 @@ patternProperties:</div><div class='ctx'>     description: u-blox</div><div class='ctx'>   "^u-boot,.*":</div><div class='ctx'>     description: U-Boot bootloader</div><div class='del'>-  "^ucrobotics,.*":</div><div class='del'>-    description: uCRobotics</div><div class='ctx'>   "^ubnt,.*":</div><div class='ctx'>     description: Ubiquiti Networks</div><div class='add'>+  "^ucrobotics,.*":</div><div class='add'>+    description: uCRobotics</div><div class='ctx'>   "^udoo,.*":</div><div class='ctx'>     description: Udoo</div><div class='add'>+  "^ufispace,.*":</div><div class='add'>+    description: Ufi Space Co., Ltd.</div><div class='ctx'>   "^ugoos,.*":</div><div class='ctx'>     description: Ugoos Industrial Co., Ltd.</div><div class='ctx'>   "^uniwest,.*":</div><div class='hunk'>@@ -1333,6 +1440,8 @@ patternProperties:</div><div class='ctx'>     description: Vertexcom Technologies, Inc.</div><div class='ctx'>   "^via,.*":</div><div class='ctx'>     description: VIA Technologies, Inc.</div><div class='add'>+  "^vialab,.*":</div><div class='add'>+    description: VIA Labs, Inc.</div><div class='ctx'>   "^vicor,.*":</div><div class='ctx'>     description: Vicor Corporation</div><div class='ctx'>   "^videostrong,.*":</div><div class='hunk'>@@ -1343,6 +1452,8 @@ patternProperties:</div><div class='ctx'>     description: Used for virtual device without specific vendor.</div><div class='ctx'>   "^vishay,.*":</div><div class='ctx'>     description: Vishay Intertechnology, Inc</div><div class='add'>+  "^visionox,.*":</div><div class='add'>+    description: Visionox</div><div class='ctx'>   "^vitesse,.*":</div><div class='ctx'>     description: Vitesse Semiconductor Corporation</div><div class='ctx'>   "^vivante,.*":</div><div class='hunk'>@@ -1357,6 +1468,8 @@ patternProperties:</div><div class='ctx'>     description: Vision Optical Technology Co., Ltd.</div><div class='ctx'>   "^vxt,.*":</div><div class='ctx'>     description: VXT Ltd</div><div class='add'>+  "^wanchanglong,.*":</div><div class='add'>+    description: Wanchanglong Electronics Technology（SHENZHEN）Co.，Ltd.</div><div class='ctx'>   "^wand,.*":</div><div class='ctx'>     description: Wandbord (Technexion)</div><div class='ctx'>   "^waveshare,.*":</div><div class='hunk'>@@ -1375,6 +1488,8 @@ patternProperties:</div><div class='ctx'>     description: Shenzhen whwave Electronics, Inc.</div><div class='ctx'>   "^wi2wi,.*":</div><div class='ctx'>     description: Wi2Wi, Inc.</div><div class='add'>+  "^widora,.*":</div><div class='add'>+    description: Beijing Widora Technology Co., Ltd.</div><div class='ctx'>   "^wiligear,.*":</div><div class='ctx'>     description: Wiligear, Ltd.</div><div class='ctx'>   "^willsemi,.*":</div><div class='hunk'>@@ -1397,8 +1512,6 @@ patternProperties:</div><div class='ctx'>     description: Wondermedia Technologies, Inc.</div><div class='ctx'>   "^wobo,.*":</div><div class='ctx'>     description: Wobo</div><div class='del'>-  "^wanchanglong,.*":</div><div class='del'>-    description: Wanchanglong Electronics Technology（SHENZHEN）Co.，Ltd.</div><div class='ctx'>   "^x-powers,.*":</div><div class='ctx'>     description: X-Powers</div><div class='ctx'>   "^xen,.*":</div><div class='hunk'>@@ -1431,6 +1544,8 @@ patternProperties:</div><div class='ctx'>     description: Yes Optoelectronics Co.,Ltd.</div><div class='ctx'>   "^yic,.*":</div><div class='ctx'>     description: YIC System Co., Ltd.</div><div class='add'>+  "^yiming,.*":</div><div class='add'>+    description: Henan Yiming Technology Co., Ltd.</div><div class='ctx'>   "^ylm,.*":</div><div class='ctx'>     description: Shenzhen Yangliming Electronic Technology Co., Ltd.</div><div class='ctx'>   "^yna,.*":</div><div class='hunk'>@@ -1441,10 +1556,10 @@ patternProperties:</div><div class='ctx'>     description: Shenzhen Yashi Changhua Intelligent Technology Co., Ltd.</div><div class='ctx'>   "^ysoft,.*":</div><div class='ctx'>     description: Y Soft Corporation a.s.</div><div class='del'>-  "^zealz,.*":</div><div class='del'>-    description: Zealz</div><div class='ctx'>   "^zarlink,.*":</div><div class='ctx'>     description: Zarlink Semiconductor</div><div class='add'>+  "^zealz,.*":</div><div class='add'>+    description: Zealz</div><div class='ctx'>   "^zeitec,.*":</div><div class='ctx'>     description: ZEITEC Semiconductor Co., LTD.</div><div class='ctx'>   "^zidoo,.*":</div><div class='head'>diff --git a/Documentation/devicetree/bindings/virtio/iommu.txt b/Documentation/devicetree/bindings/virtio/iommu.txt<br/>deleted file mode 100644<br/>index 2407fea0651c..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/virtio/iommu.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/virtio/iommu.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,66 +0,0 @@</div><div class='del'>-* virtio IOMMU PCI device</div><div class='del'>-</div><div class='del'>-When virtio-iommu uses the PCI transport, its programming interface is</div><div class='del'>-discovered dynamically by the PCI probing infrastructure. However the</div><div class='del'>-device tree statically describes the relation between IOMMU and DMA</div><div class='del'>-masters. Therefore, the PCI root complex that hosts the virtio-iommu</div><div class='del'>-contains a child node representing the IOMMU device explicitly.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible:	Should be "virtio,pci-iommu"</div><div class='del'>-- reg:		PCI address of the IOMMU. As defined in the PCI Bus</div><div class='del'>-		Binding reference [1], the reg property is a five-cell</div><div class='del'>-		address encoded as (phys.hi phys.mid phys.lo size.hi</div><div class='del'>-		size.lo). phys.hi should contain the device's BDF as</div><div class='del'>-		0b00000000 bbbbbbbb dddddfff 00000000. The other cells</div><div class='del'>-		should be zero.</div><div class='del'>-- #iommu-cells:	Each platform DMA master managed by the IOMMU is assigned</div><div class='del'>-		an endpoint ID, described by the "iommus" property [2].</div><div class='del'>-		For virtio-iommu, #iommu-cells must be 1.</div><div class='del'>-</div><div class='del'>-Notes:</div><div class='del'>-</div><div class='del'>-- DMA from the IOMMU device isn't managed by another IOMMU. Therefore the</div><div class='del'>-  virtio-iommu node doesn't have an "iommus" property, and is omitted from</div><div class='del'>-  the iommu-map property of the root complex.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-pcie@10000000 {</div><div class='del'>-	compatible = "pci-host-ecam-generic";</div><div class='del'>-	...</div><div class='del'>-</div><div class='del'>-	/* The IOMMU programming interface uses slot 00:01.0 */</div><div class='del'>-	iommu0: iommu@0008 {</div><div class='del'>-		compatible = "virtio,pci-iommu";</div><div class='del'>-		reg = &lt;0x00000800 0 0 0 0&gt;;</div><div class='del'>-		#iommu-cells = &lt;1&gt;;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	/*</div><div class='del'>-	 * The IOMMU manages all functions in this PCI domain except</div><div class='del'>-	 * itself. Omit BDF 00:01.0.</div><div class='del'>-	 */</div><div class='del'>-	iommu-map = &lt;0x0 &amp;iommu0 0x0 0x8&gt;</div><div class='del'>-		    &lt;0x9 &amp;iommu0 0x9 0xfff7&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-pcie@20000000 {</div><div class='del'>-	compatible = "pci-host-ecam-generic";</div><div class='del'>-	...</div><div class='del'>-	/*</div><div class='del'>-	 * The IOMMU also manages all functions from this domain,</div><div class='del'>-	 * with endpoint IDs 0x10000 - 0x1ffff</div><div class='del'>-	 */</div><div class='del'>-	iommu-map = &lt;0x0 &amp;iommu0 0x10000 0x10000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-ethernet@fe001000 {</div><div class='del'>-	...</div><div class='del'>-	/* The IOMMU manages this platform device with endpoint ID 0x20000 */</div><div class='del'>-	iommus = &lt;&amp;iommu0 0x20000&gt;;</div><div class='del'>-};</div><div class='del'>-</div><div class='del'>-[1] Documentation/devicetree/bindings/pci/pci.txt</div><div class='del'>-[2] Documentation/devicetree/bindings/iommu/iommu.txt</div><div class='head'>diff --git a/Documentation/devicetree/bindings/virtio/mmio.yaml b/Documentation/devicetree/bindings/virtio/mmio.yaml<br/>index 10c22b5bd16a..0aa8433f0a5e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/virtio/mmio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/virtio/mmio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/virtio/mmio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/virtio/mmio.yaml</a></div><div class='hunk'>@@ -33,6 +33,10 @@ properties:</div><div class='ctx'>     description: Required for devices making accesses thru an IOMMU.</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  wakeup-source:</div><div class='add'>+    type: boolean</div><div class='add'>+    description: Required for setting irq of a virtio_mmio device as wakeup source.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='head'>diff --git a/Documentation/devicetree/bindings/virtio/pci-iommu.yaml b/Documentation/devicetree/bindings/virtio/pci-iommu.yaml<br/>new file mode 100644<br/>index 000000000000..972a785a42de<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/virtio/pci-iommu.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/virtio/pci-iommu.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: virtio-iommu device using the virtio-pci transport</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Jean-Philippe Brucker &lt;jean-philippe@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  When virtio-iommu uses the PCI transport, its programming interface is</div><div class='add'>+  discovered dynamically by the PCI probing infrastructure. However the</div><div class='add'>+  device tree statically describes the relation between IOMMU and DMA</div><div class='add'>+  masters. Therefore, the PCI root complex that hosts the virtio-iommu</div><div class='add'>+  contains a child node representing the IOMMU device explicitly.</div><div class='add'>+</div><div class='add'>+  DMA from the IOMMU device isn't managed by another IOMMU. Therefore the</div><div class='add'>+  virtio-iommu node doesn't have an "iommus" property, and is omitted from</div><div class='add'>+  the iommu-map property of the root complex.</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  # If compatible is present, it should contain the vendor and device ID</div><div class='add'>+  # according to the PCI Bus Binding specification. Since PCI provides</div><div class='add'>+  # built-in identification methods, compatible is not actually required.</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - const: virtio,pci-iommu</div><div class='add'>+          - const: pci1af4,1057</div><div class='add'>+      - items:</div><div class='add'>+          - const: pci1af4,1057</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    description: |</div><div class='add'>+      PCI address of the IOMMU. As defined in the PCI Bus Binding</div><div class='add'>+      reference, the reg property is a five-cell address encoded as (phys.hi</div><div class='add'>+      phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's</div><div class='add'>+      BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be</div><div class='add'>+      zero. See Documentation/devicetree/bindings/pci/pci.txt</div><div class='add'>+</div><div class='add'>+  '#iommu-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - '#iommu-cells'</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    bus {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        pcie@40000000 {</div><div class='add'>+            device_type = "pci";</div><div class='add'>+            #address-cells = &lt;3&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            reg = &lt;0x0 0x40000000  0x0 0x1000000&gt;;</div><div class='add'>+            ranges = &lt;0x02000000 0x0 0x41000000  0x0 0x41000000  0x0 0x0f000000&gt;;</div><div class='add'>+</div><div class='add'>+            /*</div><div class='add'>+             * The IOMMU manages all functions in this PCI domain except</div><div class='add'>+             * itself. Omit BDF 00:01.0.</div><div class='add'>+             */</div><div class='add'>+            iommu-map = &lt;0x0 &amp;iommu0 0x0 0x8</div><div class='add'>+                         0x9 &amp;iommu0 0x9 0xfff7&gt;;</div><div class='add'>+</div><div class='add'>+            /* The IOMMU programming interface uses slot 00:01.0 */</div><div class='add'>+            iommu0: iommu@1,0 {</div><div class='add'>+                compatible = "pci1af4,1057";</div><div class='add'>+                reg = &lt;0x800 0 0 0 0&gt;;</div><div class='add'>+                #iommu-cells = &lt;1&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        pcie@50000000 {</div><div class='add'>+            device_type = "pci";</div><div class='add'>+            #address-cells = &lt;3&gt;;</div><div class='add'>+            #size-cells = &lt;2&gt;;</div><div class='add'>+            reg = &lt;0x0 0x50000000  0x0 0x1000000&gt;;</div><div class='add'>+            ranges = &lt;0x02000000 0x0 0x51000000  0x0 0x51000000  0x0 0x0f000000&gt;;</div><div class='add'>+</div><div class='add'>+            /*</div><div class='add'>+             * The IOMMU also manages all functions from this domain,</div><div class='add'>+             * with endpoint IDs 0x10000 - 0x1ffff</div><div class='add'>+             */</div><div class='add'>+            iommu-map = &lt;0x0 &amp;iommu0 0x10000 0x10000&gt;;</div><div class='add'>+        };</div><div class='add'>+</div><div class='add'>+        ethernet {</div><div class='add'>+            /* The IOMMU manages this platform device with endpoint ID 0x20000 */</div><div class='add'>+            iommus = &lt;&amp;iommu0 0x20000&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/virtio/virtio-device.yaml b/Documentation/devicetree/bindings/virtio/virtio-device.yaml<br/>index 1778ea9b5aa5..8c6919ba9497 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/virtio/virtio-device.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/virtio/virtio-device.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/virtio/virtio-device.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/virtio/virtio-device.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/virtio/virtio-device.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Virtio device bindings</div><div class='add'>+title: Virtio device</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Viresh Kumar &lt;viresh.kumar@linaro.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/w1/maxim,ds2482.yaml b/Documentation/devicetree/bindings/w1/maxim,ds2482.yaml<br/>new file mode 100644<br/>index 000000000000..422becc6e1fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/w1/maxim,ds2482.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/w1/maxim,ds2482.yaml</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/w1/maxim,ds2482.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Maxim One wire bus master controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Stefan Wahren &lt;stefan.wahren@chargebyte.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  I2C to 1-wire bridges</div><div class='add'>+</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/ds2482-100.pdf</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/DS2482-800.pdf</div><div class='add'>+  https://www.analog.com/media/en/technical-documentation/data-sheets/DS2484.pdf</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - maxim,ds2482</div><div class='add'>+      - maxim,ds2484</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties:</div><div class='add'>+  type: object</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    i2c {</div><div class='add'>+      #address-cells = &lt;1&gt;;</div><div class='add'>+      #size-cells = &lt;0&gt;;</div><div class='add'>+      onewire@18 {</div><div class='add'>+        compatible = "maxim,ds2484";</div><div class='add'>+        reg = &lt;0x18&gt;;</div><div class='add'>+      };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/w1/w1-gpio.yaml b/Documentation/devicetree/bindings/w1/w1-gpio.yaml<br/>index 8eef2380161b..b02b02237082 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/w1/w1-gpio.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/w1/w1-gpio.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/w1/w1-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/w1/w1-gpio.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/w1/w1-gpio.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Bitbanged GPIO 1-Wire Bus Device Tree Bindings</div><div class='add'>+title: Bitbanged GPIO 1-Wire Bus</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Mack &lt;zonque@gmail.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml<br/>index 43afa24513b9..274519fc24fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml</a></div><div class='hunk'>@@ -4,10 +4,10 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/watchdog/allwinner,sun4i-a10-wdt.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Allwinner A10 Watchdog Device Tree Bindings</div><div class='add'>+title: Allwinner A10 Watchdog</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Chen-Yu Tsai &lt;wens@csie.org&gt;</div><div class='hunk'>@@ -26,10 +26,8 @@ properties:</div><div class='ctx'>               - allwinner,sun50i-h616-wdt</div><div class='ctx'>               - allwinner,sun50i-r329-wdt</div><div class='ctx'>               - allwinner,sun50i-r329-wdt-reset</div><div class='add'>+              - allwinner,suniv-f1c100s-wdt</div><div class='ctx'>           - const: allwinner,sun6i-a31-wdt</div><div class='del'>-      - items:</div><div class='del'>-          - const: allwinner,suniv-f1c100s-wdt</div><div class='del'>-          - const: allwinner,sun4i-a10-wdt</div><div class='ctx'>       - const: allwinner,sun20i-d1-wdt</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: allwinner,sun20i-d1-wdt-reset</div><div class='hunk'>@@ -41,14 +39,8 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     minItems: 1</div><div class='ctx'>     items:</div><div class='del'>-      - description: High-frequency oscillator input, divided internally</div><div class='del'>-      - description: Low-frequency oscillator input, only found on some variants</div><div class='del'>-</div><div class='del'>-  clock-names:</div><div class='del'>-    minItems: 1</div><div class='del'>-    items:</div><div class='del'>-      - const: hosc</div><div class='del'>-      - const: losc</div><div class='add'>+      - description: 32 KHz input clock</div><div class='add'>+      - description: secondary clock source</div><div class='ctx'> </div><div class='ctx'>   interrupts:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -72,10 +64,14 @@ if:</div><div class='ctx'> then:</div><div class='ctx'>   properties:</div><div class='ctx'>     clocks:</div><div class='del'>-      minItems: 2</div><div class='add'>+      items:</div><div class='add'>+        - description: High-frequency oscillator input, divided internally</div><div class='add'>+        - description: Low-frequency oscillator input</div><div class='ctx'> </div><div class='ctx'>     clock-names:</div><div class='del'>-      minItems: 2</div><div class='add'>+      items:</div><div class='add'>+        - const: hosc</div><div class='add'>+        - const: losc</div><div class='ctx'> </div><div class='ctx'>   required:</div><div class='ctx'>     - clock-names</div><div class='hunk'>@@ -85,9 +81,6 @@ else:</div><div class='ctx'>     clocks:</div><div class='ctx'>       maxItems: 1</div><div class='ctx'> </div><div class='del'>-    clock-names:</div><div class='del'>-      maxItems: 1</div><div class='del'>-</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/alphascale,asm9260-wdt.yaml b/Documentation/devicetree/bindings/watchdog/alphascale,asm9260-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..fea84f5b7e6d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/alphascale,asm9260-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/alphascale,asm9260-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,70 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/alphascale,asm9260-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Alphascale asm9260 Watchdog timer</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Oleksij Rempel &lt;linux@rempel-privat.de&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: alphascale,asm9260-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: source clock, used for tick counter</div><div class='add'>+      - description: ahb gate</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: mod</div><div class='add'>+      - const: ahb</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reset-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: wdt_rst</div><div class='add'>+</div><div class='add'>+  alphascale,mode:</div><div class='add'>+    description: |</div><div class='add'>+      Specifies the reset mode of operation. If set to sw, then reset is handled</div><div class='add'>+      via interrupt request, if set to debug, then it does nothing and logs.</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    enum: [hw, sw, debug]</div><div class='add'>+    default: hw</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/clock/alphascale,asm9260.h&gt;</div><div class='add'>+    watchdog0: watchdog@80048000 {</div><div class='add'>+      compatible = "alphascale,asm9260-wdt";</div><div class='add'>+      reg = &lt;0x80048000 0x10&gt;;</div><div class='add'>+      clocks = &lt;&amp;acc CLKID_SYS_WDT&gt;, &lt;&amp;acc CLKID_AHB_WDT&gt;;</div><div class='add'>+      clock-names = "mod", "ahb";</div><div class='add'>+      interrupts = &lt;55&gt;;</div><div class='add'>+      timeout-sec = &lt;30&gt;;</div><div class='add'>+      alphascale,mode = "hw";</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/alphascale-asm9260.txt b/Documentation/devicetree/bindings/watchdog/alphascale-asm9260.txt<br/>deleted file mode 100644<br/>index 75b265a04047..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/alphascale-asm9260.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/alphascale-asm9260.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,35 +0,0 @@</div><div class='del'>-Alphascale asm9260 Watchdog timer</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : should be "alphascale,asm9260-wdt".</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-- clocks : the clocks feeding the watchdog timer. See clock-bindings.txt</div><div class='del'>-- clock-names : should be set to</div><div class='del'>-	"mod" - source for tick counter.</div><div class='del'>-	"ahb" - ahb gate.</div><div class='del'>-- resets : phandle pointing to the system reset controller with</div><div class='del'>-	line index for the watchdog.</div><div class='del'>-- reset-names : should be set to "wdt_rst".</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- timeout-sec : shall contain the default watchdog timeout in seconds,</div><div class='del'>-	if unset, the default timeout is 30 seconds.</div><div class='del'>-- alphascale,mode : three modes are supported</div><div class='del'>-	"hw" - hw reset (default).</div><div class='del'>-	"sw" - sw reset.</div><div class='del'>-	"debug" - no action is taken.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-watchdog0: watchdog@80048000 {</div><div class='del'>-	compatible = "alphascale,asm9260-wdt";</div><div class='del'>-	reg = &lt;0x80048000 0x10&gt;;</div><div class='del'>-	clocks = &lt;&amp;acc CLKID_SYS_WDT&gt;, &lt;&amp;acc CLKID_AHB_WDT&gt;;</div><div class='del'>-	clock-names = "mod", "ahb";</div><div class='del'>-	interrupts = &lt;55&gt;;</div><div class='del'>-	resets = &lt;&amp;rst WDT_RESET&gt;;</div><div class='del'>-	reset-names = "wdt_rst";</div><div class='del'>-	timeout-sec = &lt;30&gt;;</div><div class='del'>-	alphascale,mode = "hw";</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml<br/>index c7459cf70e30..f5cc7aa1b93b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml</a></div><div class='hunk'>@@ -2,13 +2,13 @@</div><div class='ctx'> # Copyright 2019 BayLibre, SAS</div><div class='ctx'> %YAML 1.2</div><div class='ctx'> ---</div><div class='del'>-$id: "http://devicetree.org/schemas/watchdog/amlogic,meson-gxbb-wdt.yaml#"</div><div class='del'>-$schema: "http://devicetree.org/meta-schemas/core.yaml#"</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/amlogic,meson-gxbb-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='ctx'> title: Meson GXBB SoCs Watchdog timer</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='del'>-  - Neil Armstrong &lt;narmstrong@baylibre.com&gt;</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='ctx'>   - $ref: watchdog.yaml#</div><div class='hunk'>@@ -36,7 +36,7 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     watchdog@98d0 {</div><div class='del'>-          compatible = "amlogic,meson-gxbb-wdt";</div><div class='del'>-          reg = &lt;0x98d0 0x10&gt;;</div><div class='del'>-          clocks = &lt;&amp;xtal&gt;;</div><div class='add'>+        compatible = "amlogic,meson-gxbb-wdt";</div><div class='add'>+        reg = &lt;0x98d0 0x10&gt;;</div><div class='add'>+        clocks = &lt;&amp;xtal&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/amlogic,meson6-wdt.yaml b/Documentation/devicetree/bindings/watchdog/amlogic,meson6-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..84732cb58ec4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/amlogic,meson6-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/amlogic,meson6-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,50 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/amlogic,meson6-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Amlogic Meson6 SoCs Watchdog timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Neil Armstrong &lt;neil.armstrong@linaro.org&gt;</div><div class='add'>+  - Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - amlogic,meson6-wdt</div><div class='add'>+          - amlogic,meson8-wdt</div><div class='add'>+          - amlogic,meson8b-wdt</div><div class='add'>+      - items:</div><div class='add'>+          - const: amlogic,meson8m2-wdt</div><div class='add'>+          - const: amlogic,meson8b-wdt</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    wdt: watchdog@c1109900 {</div><div class='add'>+        compatible = "amlogic,meson6-wdt";</div><div class='add'>+        reg = &lt;0xc1109900 0x8&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 0 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+        timeout-sec = &lt;10&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml<br/>index e58c56a6fdf6..929681127df0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/apple,wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/apple,wdt.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Apple SoC Watchdog</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sven Peter &lt;sven@svenpeter.dev&gt;</div><div class='hunk'>@@ -17,6 +17,7 @@ properties:</div><div class='ctx'>     items:</div><div class='ctx'>       - enum:</div><div class='ctx'>           - apple,t8103-wdt</div><div class='add'>+          - apple,t8112-wdt</div><div class='ctx'>           - apple,t6000-wdt</div><div class='ctx'>       - const: apple,wdt</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml b/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml<br/>index 6bfa46353c4e..aa804f96acba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml</a></div><div class='hunk'>@@ -40,7 +40,6 @@ unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-</div><div class='ctx'>     watchdog@2a440000 {</div><div class='ctx'>         compatible = "arm,sbsa-gwdt";</div><div class='ctx'>         reg = &lt;0x2a440000 0x1000&gt;,</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml<br/>index a69cac8ec208..7aea255b301b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm,sp805.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/arm,sp805.yaml</a></div><div class='hunk'>@@ -43,7 +43,6 @@ properties:</div><div class='ctx'>       Clocks driving the watchdog timer hardware. The first clock is used</div><div class='ctx'>       for the actual watchdog counter. The second clock drives the register</div><div class='ctx'>       interface.</div><div class='del'>-    minItems: 2</div><div class='ctx'>     maxItems: 2</div><div class='ctx'> </div><div class='ctx'>   clock-names:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml b/Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml<br/>index bb8901854222..9646ac72051e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml</a></div><div class='hunk'>@@ -44,7 +44,7 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'> </div><div class='ctx'>     watchdog@2c000620 {</div><div class='del'>-            compatible = "arm,arm11mp-twd-wdt";</div><div class='del'>-            reg = &lt;0x2c000620 0x20&gt;;</div><div class='del'>-            interrupts = &lt;GIC_PPI 14 0xf01&gt;;</div><div class='add'>+        compatible = "arm,arm11mp-twd-wdt";</div><div class='add'>+        reg = &lt;0x2c000620 0x20&gt;;</div><div class='add'>+        interrupts = &lt;GIC_PPI 14 0xf01&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml b/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml<br/>index e3a1d79574e2..b5573852ef5a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: ARM Secure Monitor Call based watchdog</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Julius Werner &lt;jwerner@chromium.org&gt;</div><div class='hunk'>@@ -16,6 +16,7 @@ properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     enum:</div><div class='ctx'>       - arm,smc-wdt</div><div class='add'>+</div><div class='ctx'>   arm,smc-id:</div><div class='ctx'>     $ref: /schemas/types.yaml#/definitions/uint32</div><div class='ctx'>     description: |</div><div class='hunk'>@@ -30,9 +31,9 @@ unevaluatedProperties: false</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     watchdog {</div><div class='del'>-      compatible = "arm,smc-wdt";</div><div class='del'>-      arm,smc-id = &lt;0x82003D06&gt;;</div><div class='del'>-      timeout-sec = &lt;15&gt;;</div><div class='add'>+        compatible = "arm,smc-wdt";</div><div class='add'>+        arm,smc-id = &lt;0x82003D06&gt;;</div><div class='add'>+        timeout-sec = &lt;15&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/atmel,at91sam9-wdt.yaml b/Documentation/devicetree/bindings/watchdog/atmel,at91sam9-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..ad27bc518670<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/atmel,at91sam9-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/atmel,at91sam9-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/atmel,at91sam9-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Atmel Watchdog Timers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Eugen Hristev &lt;eugen.hristev@microchip.com&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: atmel,at91sam9260-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  atmel,max-heartbeat-sec:</div><div class='add'>+    description:</div><div class='add'>+      Should contain the maximum heartbeat value in seconds. This value</div><div class='add'>+      should be less or equal to 16. It is used to compute the WDV field.</div><div class='add'>+    maximum: 16</div><div class='add'>+</div><div class='add'>+  atmel,min-heartbeat-sec:</div><div class='add'>+    description:</div><div class='add'>+      Should contain the minimum heartbeat value in seconds. This value</div><div class='add'>+      must be smaller than the max-heartbeat-sec value. It is used to</div><div class='add'>+      compute the WDD field.</div><div class='add'>+    maximum: 16</div><div class='add'>+</div><div class='add'>+  atmel,watchdog-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      Should be hardware or software.</div><div class='add'>+    oneOf:</div><div class='add'>+      - description:</div><div class='add'>+          Hardware watchdog uses the at91 watchdog reset.</div><div class='add'>+        const: hardware</div><div class='add'>+      - description: |</div><div class='add'>+          Software watchdog uses the watchdog interrupt</div><div class='add'>+          to trigger a software reset.</div><div class='add'>+        const: software</div><div class='add'>+    default: hardware</div><div class='add'>+</div><div class='add'>+  atmel,reset-type:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/string</div><div class='add'>+    description: |</div><div class='add'>+      Should be proc or all. This is valid only when using hardware watchdog.</div><div class='add'>+    oneOf:</div><div class='add'>+      - description:</div><div class='add'>+          Assert peripherals and processor reset signals.</div><div class='add'>+        const: all</div><div class='add'>+      - description:</div><div class='add'>+          Assert the processor reset signal.</div><div class='add'>+        const: proc</div><div class='add'>+    default: all</div><div class='add'>+</div><div class='add'>+  atmel,disable:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description:</div><div class='add'>+      Should be present if you want to stop the watchdog.</div><div class='add'>+</div><div class='add'>+  atmel,idle-halt:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      Should be present if you want to stop the watchdog when</div><div class='add'>+      entering idle state.</div><div class='add'>+      CAUTION: This property should be used with care, it actually makes the</div><div class='add'>+      watchdog not counting when the CPU is in idle state, therefore the</div><div class='add'>+      watchdog reset time depends on mean CPU usage and will not reset at all</div><div class='add'>+      if the CPU stops working while it is in idle state, which is probably</div><div class='add'>+      not what you want.</div><div class='add'>+</div><div class='add'>+  atmel,dbg-halt:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      Should be present if you want to stop the watchdog when</div><div class='add'>+      entering debug state.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        atmel,reset-type:</div><div class='add'>+          enum:</div><div class='add'>+            - all</div><div class='add'>+            - proc</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        atmel,watchdog-type:</div><div class='add'>+          const: hardware</div><div class='add'>+</div><div class='add'>+dependencies:</div><div class='add'>+  atmel,reset-type: ['atmel,watchdog-type']</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+</div><div class='add'>+    watchdog@fffffd40 {</div><div class='add'>+        compatible = "atmel,at91sam9260-wdt";</div><div class='add'>+        reg = &lt;0xfffffd40 0x10&gt;;</div><div class='add'>+        interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk32k&gt;;</div><div class='add'>+        timeout-sec = &lt;15&gt;;</div><div class='add'>+        atmel,watchdog-type = "hardware";</div><div class='add'>+        atmel,reset-type = "all";</div><div class='add'>+        atmel,dbg-halt;</div><div class='add'>+        atmel,idle-halt;</div><div class='add'>+        atmel,max-heartbeat-sec = &lt;16&gt;;</div><div class='add'>+        atmel,min-heartbeat-sec = &lt;0&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml b/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml<br/>index a9635c03761c..816f85ee2c77 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Eugen Hristev &lt;eugen.hristev@microchip.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -65,13 +65,13 @@ examples:</div><div class='ctx'>     #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='ctx'> </div><div class='ctx'>     watchdog@fc068640 {</div><div class='del'>-      compatible = "atmel,sama5d4-wdt";</div><div class='del'>-      reg = &lt;0xfc068640 0x10&gt;;</div><div class='del'>-      interrupts = &lt;4 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='del'>-      timeout-sec = &lt;10&gt;;</div><div class='del'>-      atmel,watchdog-type = "hardware";</div><div class='del'>-      atmel,dbg-halt;</div><div class='del'>-      atmel,idle-halt;</div><div class='add'>+        compatible = "atmel,sama5d4-wdt";</div><div class='add'>+        reg = &lt;0xfc068640 0x10&gt;;</div><div class='add'>+        interrupts = &lt;4 IRQ_TYPE_LEVEL_HIGH 5&gt;;</div><div class='add'>+        timeout-sec = &lt;10&gt;;</div><div class='add'>+        atmel,watchdog-type = "hardware";</div><div class='add'>+        atmel,dbg-halt;</div><div class='add'>+        atmel,idle-halt;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt<br/>deleted file mode 100644<br/>index 711a880b3d3b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/atmel-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,51 +0,0 @@</div><div class='del'>-* Atmel Watchdog Timers</div><div class='del'>-</div><div class='del'>-** at91sam9-wdt</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "atmel,at91sam9260-wdt".</div><div class='del'>-- reg: physical base address of the controller and length of memory mapped</div><div class='del'>-  region.</div><div class='del'>-- clocks: phandle to input clock.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- timeout-sec: contains the watchdog timeout in seconds.</div><div class='del'>-- interrupts : Should contain WDT interrupt.</div><div class='del'>-- atmel,max-heartbeat-sec : Should contain the maximum heartbeat value in</div><div class='del'>-	seconds. This value should be less or equal to 16. It is used to</div><div class='del'>-	compute the WDV field.</div><div class='del'>-- atmel,min-heartbeat-sec : Should contain the minimum heartbeat value in</div><div class='del'>-	seconds. This value must be smaller than the max-heartbeat-sec value.</div><div class='del'>-	It is used to compute the WDD field.</div><div class='del'>-- atmel,watchdog-type : Should be "hardware" or "software". Hardware watchdog</div><div class='del'>-	use the at91 watchdog reset. Software watchdog use the watchdog</div><div class='del'>-	interrupt to trigger a software reset.</div><div class='del'>-- atmel,reset-type : Should be "proc" or "all".</div><div class='del'>-	"all" : assert peripherals and processor reset signals</div><div class='del'>-	"proc" : assert the processor reset signal</div><div class='del'>-	This is valid only when using "hardware" watchdog.</div><div class='del'>-- atmel,disable : Should be present if you want to disable the watchdog.</div><div class='del'>-- atmel,idle-halt : Should be present if you want to stop the watchdog when</div><div class='del'>-	entering idle state.</div><div class='del'>-	CAUTION: This property should be used with care, it actually makes the</div><div class='del'>-	watchdog not counting when the CPU is in idle state, therefore the</div><div class='del'>-	watchdog reset time depends on mean CPU usage and will not reset at all</div><div class='del'>-	if the CPU stop working while it is in idle state, which is probably</div><div class='del'>-	not what you want.</div><div class='del'>-- atmel,dbg-halt : Should be present if you want to stop the watchdog when</div><div class='del'>-	entering debug state.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	watchdog@fffffd40 {</div><div class='del'>-		compatible = "atmel,at91sam9260-wdt";</div><div class='del'>-		reg = &lt;0xfffffd40 0x10&gt;;</div><div class='del'>-		interrupts = &lt;1 IRQ_TYPE_LEVEL_HIGH 7&gt;;</div><div class='del'>-		clocks = &lt;&amp;clk32k&gt;;</div><div class='del'>-		timeout-sec = &lt;15&gt;;</div><div class='del'>-		atmel,watchdog-type = "hardware";</div><div class='del'>-		atmel,reset-type = "all";</div><div class='del'>-		atmel,dbg-halt;</div><div class='del'>-		atmel,idle-halt;</div><div class='del'>-		atmel,max-heartbeat-sec = &lt;16&gt;;</div><div class='del'>-		atmel,min-heartbeat-sec = &lt;0&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml b/Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml<br/>index a926809352b8..526ff908d134 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: BCM63xx and BCM7038 watchdog timer</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Florian Fainelli &lt;f.fainelli@gmail.com&gt;</div><div class='hunk'>@@ -37,7 +37,7 @@ required:</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     watchdog@f040a7e8 {</div><div class='del'>-      compatible = "brcm,bcm7038-wdt";</div><div class='del'>-      reg = &lt;0xf040a7e8 0x16&gt;;</div><div class='del'>-      clocks = &lt;&amp;upg_fixed&gt;;</div><div class='add'>+        compatible = "brcm,bcm7038-wdt";</div><div class='add'>+        reg = &lt;0xf040a7e8 0x16&gt;;</div><div class='add'>+        clocks = &lt;&amp;upg_fixed&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/da9062-wdt.txt b/Documentation/devicetree/bindings/watchdog/da9062-wdt.txt<br/>index 950e4fba8dbc..354314d854ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/da9062-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/da9062-wdt.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/da9062-wdt.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/da9062-wdt.txt</a></div><div class='hunk'>@@ -10,6 +10,12 @@ Optional properties:</div><div class='ctx'> - dlg,use-sw-pm: Add this property to disable the watchdog during suspend.</div><div class='ctx'> 	Only use this option if you can't use the watchdog automatic suspend</div><div class='ctx'> 	function during a suspend (see register CONTROL_B).</div><div class='add'>+- dlg,wdt-sd: Set what happens on watchdog timeout. If this bit is set the</div><div class='add'>+	watchdog timeout triggers SHUTDOWN, if cleared the watchdog triggers</div><div class='add'>+	POWERDOWN. Can be 0 or 1. Only use this option if you want to change the</div><div class='add'>+	default chip's OTP setting for WATCHDOG_SD bit. If this property is NOT</div><div class='add'>+	set the WATCHDOG_SD bit and on timeout watchdog behavior will match the</div><div class='add'>+	chip's OTP settings.</div><div class='ctx'> </div><div class='ctx'> Example: DA9062</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.txt b/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.txt<br/>deleted file mode 100644<br/>index 9ecdb502e605..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,22 +0,0 @@</div><div class='del'>-Faraday Technology FTWDT010 watchdog</div><div class='del'>-</div><div class='del'>-This is an IP part from Faraday Technology found in the Gemini</div><div class='del'>-SoCs and others.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible : must be one of</div><div class='del'>-  "faraday,ftwdt010"</div><div class='del'>-  "cortina,gemini-watchdog", "faraday,ftwdt010"</div><div class='del'>-- reg : shall contain base register location and length</div><div class='del'>-- interrupts : shall contain the interrupt for the watchdog</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- timeout-sec : the default watchdog timeout in seconds.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-watchdog@41000000 {</div><div class='del'>-	compatible = "faraday,ftwdt010";</div><div class='del'>-	reg = &lt;0x41000000 0x1000&gt;;</div><div class='del'>-	interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml b/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml<br/>new file mode 100644<br/>index 000000000000..726dc872ad02<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml</a></div><div class='hunk'>@@ -0,0 +1,67 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/faraday,ftwdt010.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Faraday Technology FTWDT010 watchdog</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Linus Walleij &lt;linus.walleij@linaro.org&gt;</div><div class='add'>+  - Corentin Labbe &lt;clabbe@baylibre.com&gt;</div><div class='add'>+</div><div class='add'>+description: |</div><div class='add'>+  This is an IP part from Faraday Technology found in the Gemini</div><div class='add'>+  SoCs and others.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - const: faraday,ftwdt010</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - cortina,gemini-watchdog</div><div class='add'>+              - moxa,moxart-watchdog</div><div class='add'>+          - const: faraday,ftwdt010</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    const: PCLK</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    watchdog@41000000 {</div><div class='add'>+        compatible = "faraday,ftwdt010";</div><div class='add'>+        reg = &lt;0x41000000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;3 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        timeout-sec = &lt;5&gt;;</div><div class='add'>+    };</div><div class='add'>+  - |</div><div class='add'>+    watchdog: watchdog@98500000 {</div><div class='add'>+        compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";</div><div class='add'>+        reg = &lt;0x98500000 0x10&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk_apb&gt;;</div><div class='add'>+        clock-names = "PCLK";</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/fsl,scu-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl,scu-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..47701248cd8d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/fsl,scu-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/fsl,scu-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,34 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/fsl,scu-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: i.MX SCU Client Device Node - Watchdog Based on SCU Message Protocol</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Dong Aisheng &lt;aisheng.dong@nxp.com&gt;</div><div class='add'>+</div><div class='add'>+description: i.MX SCU Client Device Node</div><div class='add'>+  Client nodes are maintained as children of the relevant IMX-SCU device node.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    items:</div><div class='add'>+      - const: fsl,imx8qxp-sc-wdt</div><div class='add'>+      - const: fsl,imx-sc-wdt</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    watchdog {</div><div class='add'>+        compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";</div><div class='add'>+        timeout-sec = &lt;60&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml<br/>index fb7695515be1..181f0cc5b5bd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/fsl-imx-wdt.yaml</a></div><div class='hunk'>@@ -9,9 +9,6 @@ title: Freescale i.MX Watchdog Timer (WDT) Controller</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='ctx'>     oneOf:</div><div class='hunk'>@@ -55,11 +52,45 @@ properties:</div><div class='ctx'>       If present, the watchdog device is configured to assert its</div><div class='ctx'>       external reset (WDOG_B) instead of issuing a software reset.</div><div class='ctx'> </div><div class='add'>+  fsl,suspend-in-wait:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/flag</div><div class='add'>+    description: |</div><div class='add'>+      If present, the watchdog device is suspended in WAIT mode</div><div class='add'>+      (Suspend-to-Idle). Only supported on certain devices.</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - reg</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+  - if:</div><div class='add'>+      not:</div><div class='add'>+        properties:</div><div class='add'>+          compatible:</div><div class='add'>+            contains:</div><div class='add'>+              enum:</div><div class='add'>+                - fsl,imx25-wdt</div><div class='add'>+                - fsl,imx35-wdt</div><div class='add'>+                - fsl,imx50-wdt</div><div class='add'>+                - fsl,imx51-wdt</div><div class='add'>+                - fsl,imx53-wdt</div><div class='add'>+                - fsl,imx6q-wdt</div><div class='add'>+                - fsl,imx6sl-wdt</div><div class='add'>+                - fsl,imx6sll-wdt</div><div class='add'>+                - fsl,imx6sx-wdt</div><div class='add'>+                - fsl,imx6ul-wdt</div><div class='add'>+                - fsl,imx7d-wdt</div><div class='add'>+                - fsl,imx8mm-wdt</div><div class='add'>+                - fsl,imx8mn-wdt</div><div class='add'>+                - fsl,imx8mp-wdt</div><div class='add'>+                - fsl,imx8mq-wdt</div><div class='add'>+                - fsl,vf610-wdt</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        fsl,suspend-in-wait: false</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml b/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml<br/>index 4ca8a31359a5..4b7ed1355701 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Anson Huang &lt;Anson.Huang@nxp.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -19,6 +19,7 @@ properties:</div><div class='ctx'>       - items:</div><div class='ctx'>           - const: fsl,imx8ulp-wdt</div><div class='ctx'>           - const: fsl,imx7ulp-wdt</div><div class='add'>+      - const: fsl,imx93-wdt</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -29,15 +30,13 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  timeout-sec: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - interrupts</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/gpio-wdt.txt b/Documentation/devicetree/bindings/watchdog/gpio-wdt.txt<br/>deleted file mode 100644<br/>index 198794963786..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/gpio-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/gpio-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-* GPIO-controlled Watchdog</div><div class='del'>-</div><div class='del'>-Required Properties:</div><div class='del'>-- compatible: Should contain "linux,wdt-gpio".</div><div class='del'>-- gpios: From common gpio binding; gpio connection to WDT reset pin.</div><div class='del'>-- hw_algo: The algorithm used by the driver. Should be one of the</div><div class='del'>-  following values:</div><div class='del'>-  - toggle: Either a high-to-low or a low-to-high transition clears</div><div class='del'>-    the WDT counter. The watchdog timer is disabled when GPIO is</div><div class='del'>-    left floating or connected to a three-state buffer.</div><div class='del'>-  - level: Low or high level starts counting WDT timeout,</div><div class='del'>-    the opposite level disables the WDT. Active level is determined</div><div class='del'>-    by the GPIO flags.</div><div class='del'>-- hw_margin_ms: Maximum time to reset watchdog circuit (milliseconds).</div><div class='del'>-</div><div class='del'>-Optional Properties:</div><div class='del'>-- always-running: If the watchdog timer cannot be disabled, add this flag to</div><div class='del'>-  have the driver keep toggling the signal without a client. It will only cease</div><div class='del'>-  to toggle the signal when the device is open and the timeout elapsed.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-	watchdog: watchdog {</div><div class='del'>-		/* ADM706 */</div><div class='del'>-		compatible = "linux,wdt-gpio";</div><div class='del'>-		gpios = &lt;&amp;gpio3 9 GPIO_ACTIVE_LOW&gt;;</div><div class='del'>-		hw_algo = "toggle";</div><div class='del'>-		hw_margin_ms = &lt;1600&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/linux,wdt-gpio.yaml b/Documentation/devicetree/bindings/watchdog/linux,wdt-gpio.yaml<br/>new file mode 100644<br/>index 000000000000..499f1b7e03f9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/linux,wdt-gpio.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/linux,wdt-gpio.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/linux,wdt-gpio.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: GPIO-controlled Watchdog</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='add'>+  - Robert Marko &lt;robert.marko@sartura.hr&gt;</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: linux,wdt-gpio</div><div class='add'>+</div><div class='add'>+  gpios:</div><div class='add'>+    description: gpio connection to WDT reset pin</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  hw_algo:</div><div class='add'>+    description: The algorithm used by the driver.</div><div class='add'>+    oneOf:</div><div class='add'>+      - description:</div><div class='add'>+          Either a high-to-low or a low-to-high transition clears the WDT counter.</div><div class='add'>+          The watchdog timer is disabled when GPIO is left floating or connected</div><div class='add'>+          to a three-state buffer.</div><div class='add'>+        const: toggle</div><div class='add'>+      - description:</div><div class='add'>+          Low or high level starts counting WDT timeout, the opposite level</div><div class='add'>+          disables the WDT.</div><div class='add'>+          Active level is determined by the GPIO flags.</div><div class='add'>+        const: level</div><div class='add'>+</div><div class='add'>+  hw_margin_ms:</div><div class='add'>+    description: Maximum time to reset watchdog circuit (milliseconds).</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    minimum: 2</div><div class='add'>+    maximum: 65535</div><div class='add'>+</div><div class='add'>+  always-running:</div><div class='add'>+    type: boolean</div><div class='add'>+    description:</div><div class='add'>+      If the watchdog timer cannot be disabled, add this flag to have the driver</div><div class='add'>+      keep toggling the signal without a client.</div><div class='add'>+      It will only cease to toggle the signal when the device is open and the</div><div class='add'>+      timeout elapsed.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - gpios</div><div class='add'>+  - hw_algo</div><div class='add'>+  - hw_margin_ms</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/gpio/gpio.h&gt;</div><div class='add'>+    watchdog {</div><div class='add'>+        compatible = "linux,wdt-gpio";</div><div class='add'>+        gpios = &lt;&amp;gpio3 9 GPIO_ACTIVE_LOW&gt;;</div><div class='add'>+        hw_algo = "toggle";</div><div class='add'>+        hw_margin_ms = &lt;1600&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml b/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml<br/>index ab9641e845db..1a6490c43d89 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml</a></div><div class='hunk'>@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Maxim 63xx Watchdog Timers</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+  - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Marc Zyngier &lt;maz@kernel.org&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mt7621-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mt7621-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..18160869c378<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/mediatek,mt7621-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/mediatek,mt7621-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/mediatek,mt7621-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ralink Watchdog Timers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: mediatek,mt7621-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  mediatek,sysctl:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/phandle</div><div class='add'>+    description:</div><div class='add'>+      phandle to system controller 'sysc' syscon node which</div><div class='add'>+      controls system registers</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    watchdog@100 {</div><div class='add'>+        compatible = "mediatek,mt7621-wdt";</div><div class='add'>+        reg = &lt;0x100 0x100&gt;;</div><div class='add'>+        mediatek,sysctl = &lt;&amp;sysc&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..cc502838bc39<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/mediatek,mtk-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,88 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/mediatek,mtk-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: MediaTek SoCs Watchdog timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Matthias Brugger &lt;matthias.bgg@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The watchdog supports a pre-timeout interrupt that fires</div><div class='add'>+  timeout-sec/2 before the expiry.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    oneOf:</div><div class='add'>+      - enum:</div><div class='add'>+          - mediatek,mt2712-wdt</div><div class='add'>+          - mediatek,mt6589-wdt</div><div class='add'>+          - mediatek,mt6735-wdt</div><div class='add'>+          - mediatek,mt6795-wdt</div><div class='add'>+          - mediatek,mt7986-wdt</div><div class='add'>+          - mediatek,mt8183-wdt</div><div class='add'>+          - mediatek,mt8186-wdt</div><div class='add'>+          - mediatek,mt8188-wdt</div><div class='add'>+          - mediatek,mt8192-wdt</div><div class='add'>+          - mediatek,mt8195-wdt</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - mediatek,mt2701-wdt</div><div class='add'>+              - mediatek,mt6582-wdt</div><div class='add'>+              - mediatek,mt6797-wdt</div><div class='add'>+              - mediatek,mt7622-wdt</div><div class='add'>+              - mediatek,mt7623-wdt</div><div class='add'>+              - mediatek,mt7629-wdt</div><div class='add'>+              - mediatek,mt8173-wdt</div><div class='add'>+              - mediatek,mt8365-wdt</div><div class='add'>+              - mediatek,mt8516-wdt</div><div class='add'>+          - const: mediatek,mt6589-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    items:</div><div class='add'>+      - description: Watchdog pre-timeout (bark) interrupt</div><div class='add'>+</div><div class='add'>+  mediatek,disable-extrst:</div><div class='add'>+    description: Disable sending output reset signal</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  mediatek,reset-by-toprgu:</div><div class='add'>+    description: The Top Reset Generation Unit (TOPRGU) generates reset signals</div><div class='add'>+      and distributes them to each IP. If present, the watchdog timer will be</div><div class='add'>+      reset by TOPRGU once system resets.</div><div class='add'>+    type: boolean</div><div class='add'>+</div><div class='add'>+  '#reset-cells':</div><div class='add'>+    const: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    soc {</div><div class='add'>+        #address-cells = &lt;2&gt;;</div><div class='add'>+        #size-cells = &lt;2&gt;;</div><div class='add'>+</div><div class='add'>+        watchdog: watchdog@10007000 {</div><div class='add'>+            compatible = "mediatek,mt8183-wdt";</div><div class='add'>+            reg = &lt;0 0x10007000 0 0x100&gt;;</div><div class='add'>+            interrupts = &lt;GIC_SPI 139 IRQ_TYPE_LEVEL_LOW&gt;;</div><div class='add'>+            mediatek,disable-extrst;</div><div class='add'>+            timeout-sec = &lt;10&gt;;</div><div class='add'>+            #reset-cells = &lt;1&gt;;</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/meson-wdt.txt b/Documentation/devicetree/bindings/watchdog/meson-wdt.txt<br/>deleted file mode 100644<br/>index 7588cc3971bf..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/meson-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/meson-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-Meson SoCs Watchdog timer</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible : depending on the SoC this should be one of:</div><div class='del'>-	"amlogic,meson6-wdt" on Meson6 SoCs</div><div class='del'>-	"amlogic,meson8-wdt" and "amlogic,meson6-wdt" on Meson8 SoCs</div><div class='del'>-	"amlogic,meson8b-wdt" on Meson8b SoCs</div><div class='del'>-	"amlogic,meson8m2-wdt" and "amlogic,meson8b-wdt" on Meson8m2 SoCs</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- timeout-sec: contains the watchdog timeout in seconds.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-wdt: watchdog@c1109900 {</div><div class='del'>-	compatible = "amlogic,meson6-wdt";</div><div class='del'>-	reg = &lt;0xc1109900 0x8&gt;;</div><div class='del'>-	timeout-sec = &lt;10&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml<br/>index e3e8b86dbf63..33794711c594 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/watchdog/mstar,msc313e-wdt.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: MStar Watchdog Device Tree Bindings</div><div class='add'>+title: MStar Watchdog</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Daniel Palmer &lt;daniel@0x0f.com&gt;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/mt7621-wdt.txt b/Documentation/devicetree/bindings/watchdog/mt7621-wdt.txt<br/>deleted file mode 100644<br/>index c15ef0ef609f..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/mt7621-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mt7621-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,12 +0,0 @@</div><div class='del'>-Ralink Watchdog Timers</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "mediatek,mt7621-wdt"</div><div class='del'>-- reg: physical base address of the controller and length of the register range</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	watchdog@100 {</div><div class='del'>-		compatible = "mediatek,mt7621-wdt";</div><div class='del'>-		reg = &lt;0x100 0x10&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt<br/>deleted file mode 100644<br/>index a97418c74f6b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/mtk-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,41 +0,0 @@</div><div class='del'>-Mediatek SoCs Watchdog timer</div><div class='del'>-</div><div class='del'>-The watchdog supports a pre-timeout interrupt that fires timeout-sec/2</div><div class='del'>-before the expiry.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-</div><div class='del'>-- compatible should contain:</div><div class='del'>-	"mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701</div><div class='del'>-	"mediatek,mt2712-wdt": for MT2712</div><div class='del'>-	"mediatek,mt6582-wdt", "mediatek,mt6589-wdt": for MT6582</div><div class='del'>-	"mediatek,mt6589-wdt": for MT6589</div><div class='del'>-	"mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797</div><div class='del'>-	"mediatek,mt7622-wdt", "mediatek,mt6589-wdt": for MT7622</div><div class='del'>-	"mediatek,mt7623-wdt", "mediatek,mt6589-wdt": for MT7623</div><div class='del'>-	"mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629</div><div class='del'>-	"mediatek,mt7986-wdt", "mediatek,mt6589-wdt": for MT7986</div><div class='del'>-	"mediatek,mt8183-wdt": for MT8183</div><div class='del'>-	"mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516</div><div class='del'>-	"mediatek,mt8192-wdt": for MT8192</div><div class='del'>-	"mediatek,mt8195-wdt", "mediatek,mt6589-wdt": for MT8195</div><div class='del'>-</div><div class='del'>-- reg : Specifies base physical address and size of the registers.</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- mediatek,disable-extrst: disable send output reset signal</div><div class='del'>-- interrupts: Watchdog pre-timeout (bark) interrupt.</div><div class='del'>-- timeout-sec: contains the watchdog timeout in seconds.</div><div class='del'>-- #reset-cells: Should be 1.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-watchdog: watchdog@10007000 {</div><div class='del'>-	compatible = "mediatek,mt8183-wdt",</div><div class='del'>-		     "mediatek,mt6589-wdt";</div><div class='del'>-	mediatek,disable-extrst;</div><div class='del'>-	reg = &lt;0 0x10007000 0 0x100&gt;;</div><div class='del'>-	interrupts = &lt;GIC_SPI 139 IRQ_TYPE_NONE&gt;;</div><div class='del'>-	timeout-sec = &lt;10&gt;;</div><div class='del'>-	#reset-cells = &lt;1&gt;;</div><div class='del'>-};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt b/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt<br/>index 9059f54dc023..866a958b8a2b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/nuvoton,npcm-wdt.txt</a></div><div class='hunk'>@@ -6,7 +6,8 @@ expiry.</div><div class='ctx'> </div><div class='ctx'> Required properties:</div><div class='ctx'> - compatible      : "nuvoton,npcm750-wdt" for NPCM750 (Poleg), or</div><div class='del'>-                    "nuvoton,wpcm450-wdt" for WPCM450 (Hermon).</div><div class='add'>+                    "nuvoton,wpcm450-wdt" for WPCM450 (Hermon), or</div><div class='add'>+                    "nuvoton,npcm845-wdt" for NPCM845 (Arbel).</div><div class='ctx'> - reg             : Offset and length of the register set for the device.</div><div class='ctx'> - interrupts      : Contain the timer interrupt with flags for</div><div class='ctx'>                     falling edge.</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt b/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt<br/>deleted file mode 100644<br/>index c6ae9c9d5e3e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/of-xilinx-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,26 +0,0 @@</div><div class='del'>-Xilinx AXI/PLB soft-core watchdog Device Tree Bindings</div><div class='del'>----------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible		: Should be "xlnx,xps-timebase-wdt-1.00.a" or</div><div class='del'>-			  "xlnx,xps-timebase-wdt-1.01.a".</div><div class='del'>-- reg			: Physical base address and size</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- clocks		: Input clock specifier. Refer to common clock</div><div class='del'>-			  bindings.</div><div class='del'>-- clock-frequency	: Frequency of clock in Hz</div><div class='del'>-- xlnx,wdt-enable-once	: 0 - Watchdog can be restarted</div><div class='del'>-			  1 - Watchdog can be enabled just once</div><div class='del'>-- xlnx,wdt-interval	: Watchdog timeout interval in 2^&lt;val&gt; clock cycles,</div><div class='del'>-			  &lt;val&gt; is integer from 8 to 31.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-axi-timebase-wdt@40100000 {</div><div class='del'>-	clock-frequency = &lt;50000000&gt;;</div><div class='del'>-	compatible = "xlnx,xps-timebase-wdt-1.00.a";</div><div class='del'>-	clocks = &lt;&amp;clkc 15&gt;;</div><div class='del'>-	reg = &lt;0x40100000 0x10000&gt;;</div><div class='del'>-	xlnx,wdt-enable-once = &lt;0x0&gt;;</div><div class='del'>-	xlnx,wdt-interval = &lt;0x1b&gt;;</div><div class='del'>-} ;</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt b/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt<br/>deleted file mode 100644<br/>index 6fb984f31982..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,28 +0,0 @@</div><div class='del'>-QCOM PM8916 watchdog timer controller</div><div class='del'>-</div><div class='del'>-This pm8916 watchdog timer controller must be under pm8916-pon node.</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: should be "qcom,pm8916-wdt"</div><div class='del'>-</div><div class='del'>-Optional properties :</div><div class='del'>-- interrupts : Watchdog pre-timeout (bark) interrupt.</div><div class='del'>-- timeout-sec : Watchdog timeout value in seconds.</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	pm8916_0: pm8916@0 {</div><div class='del'>-		compatible = "qcom,pm8916", "qcom,spmi-pmic";</div><div class='del'>-		reg = &lt;0x0 SPMI_USID&gt;;</div><div class='del'>-</div><div class='del'>-		pon@800 {</div><div class='del'>-			compatible = "qcom,pm8916-pon";</div><div class='del'>-			reg = &lt;0x800&gt;;</div><div class='del'>-</div><div class='del'>-			watchdog {</div><div class='del'>-				compatible = "qcom,pm8916-wdt";</div><div class='del'>-				interrupts = &lt;0x0 0x8 6 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='del'>-				timeout-sec = &lt;10&gt;;</div><div class='del'>-			};</div><div class='del'>-		};</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..568eb8480fc3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/qcom,pm8916-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/qcom,pm8916-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Qualcomm PM8916 watchdog timer controller</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: qcom,pm8916-wdt</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - interrupts</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/irq.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/spmi/spmi.h&gt;</div><div class='add'>+</div><div class='add'>+    pmic@0 {</div><div class='add'>+        compatible = "qcom,pm8916", "qcom,spmi-pmic";</div><div class='add'>+        reg = &lt;0x0 SPMI_USID&gt;;</div><div class='add'>+        #address-cells = &lt;1&gt;;</div><div class='add'>+        #size-cells = &lt;0&gt;;</div><div class='add'>+</div><div class='add'>+        pon@800 {</div><div class='add'>+            compatible = "qcom,pm8916-pon";</div><div class='add'>+            reg = &lt;0x800&gt;;</div><div class='add'>+            mode-bootloader = &lt;0x2&gt;;</div><div class='add'>+            mode-recovery = &lt;0x1&gt;;</div><div class='add'>+</div><div class='add'>+            watchdog {</div><div class='add'>+                compatible = "qcom,pm8916-wdt";</div><div class='add'>+                interrupts = &lt;0x0 0x8 6 IRQ_TYPE_EDGE_RISING&gt;;</div><div class='add'>+                timeout-sec = &lt;60&gt;;</div><div class='add'>+            };</div><div class='add'>+        };</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml<br/>index 16c6f82a13ca..6d0fe6abd06a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml</a></div><div class='hunk'>@@ -9,27 +9,46 @@ title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer</div><div class='ctx'> maintainers:</div><div class='ctx'>   - Sai Prakash Ranjan &lt;saiprakash.ranjan@codeaurora.org&gt;</div><div class='ctx'> </div><div class='del'>-allOf:</div><div class='del'>-  - $ref: watchdog.yaml#</div><div class='del'>-</div><div class='ctx'> properties:</div><div class='add'>+  $nodename:</div><div class='add'>+    pattern: "^(watchdog|timer)@[0-9a-f]+$"</div><div class='add'>+</div><div class='ctx'>   compatible:</div><div class='del'>-    enum:</div><div class='del'>-      - qcom,apss-wdt-qcs404</div><div class='del'>-      - qcom,apss-wdt-sc7180</div><div class='del'>-      - qcom,apss-wdt-sc7280</div><div class='del'>-      - qcom,apss-wdt-sdm845</div><div class='del'>-      - qcom,apss-wdt-sdx55</div><div class='del'>-      - qcom,apss-wdt-sm6350</div><div class='del'>-      - qcom,apss-wdt-sm8150</div><div class='del'>-      - qcom,apss-wdt-sm8250</div><div class='del'>-      - qcom,kpss-timer</div><div class='del'>-      - qcom,kpss-wdt</div><div class='del'>-      - qcom,kpss-wdt-apq8064</div><div class='del'>-      - qcom,kpss-wdt-ipq4019</div><div class='del'>-      - qcom,kpss-wdt-ipq8064</div><div class='del'>-      - qcom,kpss-wdt-msm8960</div><div class='del'>-      - qcom,scss-timer</div><div class='add'>+    oneOf:</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,kpss-wdt-ipq4019</div><div class='add'>+              - qcom,apss-wdt-ipq5332</div><div class='add'>+              - qcom,apss-wdt-ipq9574</div><div class='add'>+              - qcom,apss-wdt-msm8994</div><div class='add'>+              - qcom,apss-wdt-qcm2290</div><div class='add'>+              - qcom,apss-wdt-qcs404</div><div class='add'>+              - qcom,apss-wdt-sa8775p</div><div class='add'>+              - qcom,apss-wdt-sc7180</div><div class='add'>+              - qcom,apss-wdt-sc7280</div><div class='add'>+              - qcom,apss-wdt-sc8180x</div><div class='add'>+              - qcom,apss-wdt-sc8280xp</div><div class='add'>+              - qcom,apss-wdt-sdm845</div><div class='add'>+              - qcom,apss-wdt-sdx55</div><div class='add'>+              - qcom,apss-wdt-sdx65</div><div class='add'>+              - qcom,apss-wdt-sm6115</div><div class='add'>+              - qcom,apss-wdt-sm6350</div><div class='add'>+              - qcom,apss-wdt-sm8150</div><div class='add'>+              - qcom,apss-wdt-sm8250</div><div class='add'>+          - const: qcom,kpss-wdt</div><div class='add'>+      - const: qcom,kpss-wdt</div><div class='add'>+        deprecated: true</div><div class='add'>+      - items:</div><div class='add'>+          - const: qcom,scss-timer</div><div class='add'>+          - const: qcom,msm-timer</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - qcom,kpss-wdt-apq8064</div><div class='add'>+              - qcom,kpss-wdt-ipq8064</div><div class='add'>+              - qcom,kpss-wdt-mdm9615</div><div class='add'>+              - qcom,kpss-wdt-msm8960</div><div class='add'>+          - const: qcom,kpss-timer</div><div class='add'>+          - const: qcom,msm-timer</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -37,18 +56,87 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: sleep</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description:</div><div class='add'>+      The frequency of the general purpose timer in Hz.</div><div class='add'>+</div><div class='add'>+  cpu-offset:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description:</div><div class='add'>+      Per-CPU offset used when the timer is accessed without the CPU remapping</div><div class='add'>+      facilities. The offset is cpu-offset + (0x10000 * cpu-nr).</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    maxItems: 5</div><div class='add'>+</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            const: qcom,kpss-wdt</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        clock-frequency: false</div><div class='add'>+        cpu-offset: false</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 1</div><div class='add'>+          items:</div><div class='add'>+            - description: Bark</div><div class='add'>+            - description: Bite</div><div class='add'>+</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 3</div><div class='add'>+          items:</div><div class='add'>+            - description: Debug</div><div class='add'>+            - description: First general purpose timer</div><div class='add'>+            - description: Second general purpose timer</div><div class='add'>+            - description: First watchdog</div><div class='add'>+            - description: Second watchdog</div><div class='add'>+      required:</div><div class='add'>+        - clock-frequency</div><div class='add'>+</div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='del'>-    watchdog@208a038 {</div><div class='del'>-      compatible = "qcom,kpss-wdt-ipq8064";</div><div class='del'>-      reg = &lt;0x0208a038 0x40&gt;;</div><div class='del'>-      clocks = &lt;&amp;sleep_clk&gt;;</div><div class='del'>-      timeout-sec = &lt;10&gt;;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    watchdog@17c10000 {</div><div class='add'>+        compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt";</div><div class='add'>+        reg = &lt;0x17c10000 0x1000&gt;;</div><div class='add'>+        clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        timeout-sec = &lt;10&gt;;</div><div class='add'>+    };</div><div class='add'>+</div><div class='add'>+  - |</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='add'>+</div><div class='add'>+    watchdog@200a000 {</div><div class='add'>+        compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer";</div><div class='add'>+        interrupts = &lt;GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;,</div><div class='add'>+                     &lt;GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;,</div><div class='add'>+                     &lt;GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;,</div><div class='add'>+                     &lt;GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;,</div><div class='add'>+                     &lt;GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)&gt;;</div><div class='add'>+        reg = &lt;0x0200a000 0x100&gt;;</div><div class='add'>+        clock-frequency = &lt;25000000&gt;;</div><div class='add'>+        clocks = &lt;&amp;sleep_clk&gt;;</div><div class='add'>+        clock-names = "sleep";</div><div class='add'>+        cpu-offset = &lt;0x80000&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/ralink,rt2880-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ralink,rt2880-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..51e00de947e9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/ralink,rt2880-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/ralink,rt2880-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,46 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/ralink,rt2880-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Ralink Watchdog Timers</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: ralink,rt2880-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    watchdog@100 {</div><div class='add'>+      compatible = "ralink,rt2880-wdt";</div><div class='add'>+      reg = &lt;0x120 0x10&gt;;</div><div class='add'>+      clocks = &lt;&amp;clkref&gt;;</div><div class='add'>+      resets = &lt;&amp;rstctrl 8&gt;;</div><div class='add'>+      interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+      interrupts = &lt;1&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml b/Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml<br/>index 11b220a5e0f6..1f5390a67cdb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml</a></div><div class='hunk'>@@ -29,6 +29,7 @@ properties:</div><div class='ctx'>       - realtek,rtl8380-wdt</div><div class='ctx'>       - realtek,rtl8390-wdt</div><div class='ctx'>       - realtek,rtl9300-wdt</div><div class='add'>+      - realtek,rtl9310-wdt</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -66,12 +67,10 @@ required:</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'>   - interrupts</div><div class='add'>+  - interrupt-names</div><div class='ctx'> </div><div class='ctx'> unevaluatedProperties: false</div><div class='ctx'> </div><div class='del'>-dependencies:</div><div class='del'>-  interrupts: [ interrupt-names ]</div><div class='del'>-</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     watchdog: watchdog@3150 {</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml<br/>index d060438e1402..951a7d54135a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml</a></div><div class='hunk'>@@ -21,8 +21,20 @@ properties:</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,r9a06g032-wdt    # RZ/N1D</div><div class='add'>+          - const: renesas,rzn1-wdt      # RZ/N1</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a07g043-wdt    # RZ/G2UL and RZ/Five</div><div class='ctx'>               - renesas,r9a07g044-wdt    # RZ/G2{L,LC}</div><div class='del'>-          - const: renesas,rzg2l-wdt     # RZ/G2L</div><div class='add'>+              - renesas,r9a07g054-wdt    # RZ/V2L</div><div class='add'>+          - const: renesas,rzg2l-wdt</div><div class='add'>+</div><div class='add'>+      - items:</div><div class='add'>+          - enum:</div><div class='add'>+              - renesas,r9a09g011-wdt    # RZ/V2M</div><div class='add'>+          - const: renesas,rzv2m-wdt     # RZ/V2M</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='hunk'>@@ -52,24 +64,41 @@ properties:</div><div class='ctx'>               - renesas,r8a77980-wdt     # R-Car V3H</div><div class='ctx'>               - renesas,r8a77990-wdt     # R-Car E3</div><div class='ctx'>               - renesas,r8a77995-wdt     # R-Car D3</div><div class='del'>-              - renesas,r8a779a0-wdt     # R-Car V3U</div><div class='ctx'>           - const: renesas,rcar-gen3-wdt # R-Car Gen3 and RZ/G2</div><div class='ctx'> </div><div class='ctx'>       - items:</div><div class='ctx'>           - enum:</div><div class='add'>+              - renesas,r8a779a0-wdt     # R-Car V3U</div><div class='ctx'>               - renesas,r8a779f0-wdt     # R-Car S4-8</div><div class='add'>+              - renesas,r8a779g0-wdt     # R-Car V4H</div><div class='ctx'>           - const: renesas,rcar-gen4-wdt # R-Car Gen4</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  interrupts: true</div><div class='del'>-</div><div class='del'>-  interrupt-names: true</div><div class='del'>-</div><div class='del'>-  clocks: true</div><div class='del'>-</div><div class='del'>-  clock-names: true</div><div class='add'>+  interrupts:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Timeout</div><div class='add'>+      - description: Parity error</div><div class='add'>+</div><div class='add'>+  interrupt-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: wdt</div><div class='add'>+      - const: perrout</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - description: Register access clock</div><div class='add'>+      - description: Main clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    minItems: 1</div><div class='add'>+    items:</div><div class='add'>+      - const: pclk</div><div class='add'>+      - const: oscclk</div><div class='ctx'> </div><div class='ctx'>   power-domains:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -82,10 +111,11 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='add'>+  - interrupts</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'>   - if:</div><div class='ctx'>       not:</div><div class='hunk'>@@ -94,6 +124,7 @@ allOf:</div><div class='ctx'>             contains:</div><div class='ctx'>               enum:</div><div class='ctx'>                 - renesas,rza-wdt</div><div class='add'>+                - renesas,rzn1-wdt</div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='ctx'>         - power-domains</div><div class='hunk'>@@ -105,31 +136,38 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - renesas,rzg2l-wdt</div><div class='add'>+              - renesas,rzv2m-wdt</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='del'>-        interrupts:</div><div class='del'>-          maxItems: 2</div><div class='del'>-        interrupt-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: wdt</div><div class='del'>-            - const: perrout</div><div class='ctx'>         clocks:</div><div class='del'>-          items:</div><div class='del'>-            - description: Register access clock</div><div class='del'>-            - description: Main clock</div><div class='add'>+          minItems: 2</div><div class='ctx'>         clock-names:</div><div class='del'>-          items:</div><div class='del'>-            - const: pclk</div><div class='del'>-            - const: oscclk</div><div class='add'>+          minItems: 2</div><div class='ctx'>       required:</div><div class='ctx'>         - clock-names</div><div class='add'>+    else:</div><div class='add'>+      properties:</div><div class='add'>+        clocks:</div><div class='add'>+          maxItems: 1</div><div class='add'>+</div><div class='add'>+  - if:</div><div class='add'>+      properties:</div><div class='add'>+        compatible:</div><div class='add'>+          contains:</div><div class='add'>+            enum:</div><div class='add'>+              - renesas,rzg2l-wdt</div><div class='add'>+    then:</div><div class='add'>+      properties:</div><div class='add'>+        interrupts:</div><div class='add'>+          minItems: 2</div><div class='add'>+        interrupt-names:</div><div class='add'>+          minItems: 2</div><div class='add'>+      required:</div><div class='ctx'>         - interrupt-names</div><div class='ctx'>     else:</div><div class='ctx'>       properties:</div><div class='ctx'>         interrupts:</div><div class='ctx'>           maxItems: 1</div><div class='del'>-        clocks:</div><div class='del'>-          maxItems: 1</div><div class='ctx'> </div><div class='ctx'> additionalProperties: false</div><div class='ctx'> </div><div class='hunk'>@@ -137,11 +175,13 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/r8a7795-cpg-mssr.h&gt;</div><div class='ctx'>     #include &lt;dt-bindings/power/r8a7795-sysc.h&gt;</div><div class='add'>+    #include &lt;dt-bindings/interrupt-controller/arm-gic.h&gt;</div><div class='ctx'>     wdt0: watchdog@e6020000 {</div><div class='del'>-            compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";</div><div class='del'>-            reg = &lt;0xe6020000 0x0c&gt;;</div><div class='del'>-            clocks = &lt;&amp;cpg CPG_MOD 402&gt;;</div><div class='del'>-            power-domains = &lt;&amp;sysc R8A7795_PD_ALWAYS_ON&gt;;</div><div class='del'>-            resets = &lt;&amp;cpg 402&gt;;</div><div class='del'>-            timeout-sec = &lt;60&gt;;</div><div class='add'>+        compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";</div><div class='add'>+        reg = &lt;0xe6020000 0x0c&gt;;</div><div class='add'>+        interrupts = &lt;GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH&gt;;</div><div class='add'>+        clocks = &lt;&amp;cpg CPG_MOD 402&gt;;</div><div class='add'>+        power-domains = &lt;&amp;sysc R8A7795_PD_ALWAYS_ON&gt;;</div><div class='add'>+        resets = &lt;&amp;cpg 402&gt;;</div><div class='add'>+        timeout-sec = &lt;60&gt;;</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/rt2880-wdt.txt b/Documentation/devicetree/bindings/watchdog/rt2880-wdt.txt<br/>deleted file mode 100644<br/>index 05b95bfa2a89..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/rt2880-wdt.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/rt2880-wdt.txt</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-Ralink Watchdog Timers</div><div class='del'>-</div><div class='del'>-Required properties:</div><div class='del'>-- compatible: must be "ralink,rt2880-wdt"</div><div class='del'>-- reg: physical base address of the controller and length of the register range</div><div class='del'>-</div><div class='del'>-Optional properties:</div><div class='del'>-- interrupts: Specify the INTC interrupt number</div><div class='del'>-</div><div class='del'>-Example:</div><div class='del'>-</div><div class='del'>-	watchdog@120 {</div><div class='del'>-		compatible = "ralink,rt2880-wdt";</div><div class='del'>-		reg = &lt;0x120 0x10&gt;;</div><div class='del'>-</div><div class='del'>-		interrupt-parent = &lt;&amp;intc&gt;;</div><div class='del'>-		interrupts = &lt;1&gt;;</div><div class='del'>-	};</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml b/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml<br/>index b08373336b16..8fb6656ba0c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/samsung-wdt.yaml</a></div><div class='hunk'>@@ -23,6 +23,7 @@ properties:</div><div class='ctx'>       - samsung,exynos5420-wdt                # for Exynos5420</div><div class='ctx'>       - samsung,exynos7-wdt                   # for Exynos7</div><div class='ctx'>       - samsung,exynos850-wdt                 # for Exynos850</div><div class='add'>+      - samsung,exynosautov9-wdt              # for Exynosautov9</div><div class='ctx'> </div><div class='ctx'>   reg:</div><div class='ctx'>     maxItems: 1</div><div class='hunk'>@@ -67,6 +68,7 @@ allOf:</div><div class='ctx'>               - samsung,exynos5420-wdt</div><div class='ctx'>               - samsung,exynos7-wdt</div><div class='ctx'>               - samsung,exynos850-wdt</div><div class='add'>+              - samsung,exynosautov9-wdt</div><div class='ctx'>     then:</div><div class='ctx'>       required:</div><div class='ctx'>         - samsung,syscon-phandle</div><div class='hunk'>@@ -76,6 +78,7 @@ allOf:</div><div class='ctx'>           contains:</div><div class='ctx'>             enum:</div><div class='ctx'>               - samsung,exynos850-wdt</div><div class='add'>+              - samsung,exynosautov9-wdt</div><div class='ctx'>     then:</div><div class='ctx'>       properties:</div><div class='ctx'>         clocks:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml b/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml<br/>index 6461eb4f4a27..76eceeddd150 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml</a></div><div class='hunk'>@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> title: Synopsys Designware Watchdog Timer</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Jamie Iles &lt;jamie@jamieiles.com&gt;</div><div class='hunk'>@@ -20,6 +20,7 @@ properties:</div><div class='ctx'>           - enum:</div><div class='ctx'>               - rockchip,px30-wdt</div><div class='ctx'>               - rockchip,rk3066-wdt</div><div class='add'>+              - rockchip,rk3128-wdt</div><div class='ctx'>               - rockchip,rk3188-wdt</div><div class='ctx'>               - rockchip,rk3228-wdt</div><div class='ctx'>               - rockchip,rk3288-wdt</div><div class='hunk'>@@ -28,6 +29,7 @@ properties:</div><div class='ctx'>               - rockchip,rk3368-wdt</div><div class='ctx'>               - rockchip,rk3399-wdt</div><div class='ctx'>               - rockchip,rk3568-wdt</div><div class='add'>+              - rockchip,rk3588-wdt</div><div class='ctx'>               - rockchip,rv1108-wdt</div><div class='ctx'>           - const: snps,dw-wdt</div><div class='ctx'> </div><div class='hunk'>@@ -81,25 +83,25 @@ required:</div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     watchdog@ffd02000 {</div><div class='del'>-      compatible = "snps,dw-wdt";</div><div class='del'>-      reg = &lt;0xffd02000 0x1000&gt;;</div><div class='del'>-      interrupts = &lt;0 171 4&gt;;</div><div class='del'>-      clocks = &lt;&amp;per_base_clk&gt;;</div><div class='del'>-      resets = &lt;&amp;wdt_rst&gt;;</div><div class='add'>+        compatible = "snps,dw-wdt";</div><div class='add'>+        reg = &lt;0xffd02000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;0 171 4&gt;;</div><div class='add'>+        clocks = &lt;&amp;per_base_clk&gt;;</div><div class='add'>+        resets = &lt;&amp;wdt_rst&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'>   - |</div><div class='ctx'>     watchdog@ffd02000 {</div><div class='del'>-      compatible = "snps,dw-wdt";</div><div class='del'>-      reg = &lt;0xffd02000 0x1000&gt;;</div><div class='del'>-      interrupts = &lt;0 171 4&gt;;</div><div class='del'>-      clocks = &lt;&amp;per_base_clk&gt;;</div><div class='del'>-      clock-names = "tclk";</div><div class='del'>-      snps,watchdog-tops = &lt;0x000000FF 0x000001FF 0x000003FF</div><div class='del'>-                            0x000007FF 0x0000FFFF 0x0001FFFF</div><div class='del'>-                            0x0003FFFF 0x0007FFFF 0x000FFFFF</div><div class='del'>-                            0x001FFFFF 0x003FFFFF 0x007FFFFF</div><div class='del'>-                            0x00FFFFFF 0x01FFFFFF 0x03FFFFFF</div><div class='del'>-                            0x07FFFFFF&gt;;</div><div class='add'>+        compatible = "snps,dw-wdt";</div><div class='add'>+        reg = &lt;0xffd02000 0x1000&gt;;</div><div class='add'>+        interrupts = &lt;0 171 4&gt;;</div><div class='add'>+        clocks = &lt;&amp;per_base_clk&gt;;</div><div class='add'>+        clock-names = "tclk";</div><div class='add'>+        snps,watchdog-tops = &lt;0x000000FF 0x000001FF 0x000003FF</div><div class='add'>+                              0x000007FF 0x0000FFFF 0x0001FFFF</div><div class='add'>+                              0x0003FFFF 0x0007FFFF 0x000FFFFF</div><div class='add'>+                              0x001FFFFF 0x003FFFFF 0x007FFFFF</div><div class='add'>+                              0x00FFFFFF 0x01FFFFFF 0x03FFFFFF</div><div class='add'>+                              0x07FFFFFF&gt;;</div><div class='ctx'>     };</div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml b/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml<br/>index a059d16cb4f2..ba0709314360 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml</a></div><div class='hunk'>@@ -10,7 +10,7 @@ maintainers:</div><div class='ctx'>   - Keiji Hayashibara &lt;hayashibara.keiji@socionext.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -19,18 +19,12 @@ properties:</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='ctx'>     // The UniPhier watchdog should be a subnode of a "syscon" compatible node.</div><div class='ctx'> </div><div class='del'>-    sysctrl@61840000 {</div><div class='del'>-        compatible = "socionext,uniphier-ld11-sysctrl",</div><div class='del'>-                     "simple-mfd", "syscon";</div><div class='del'>-        reg = &lt;0x61840000 0x10000&gt;;</div><div class='del'>-</div><div class='del'>-        watchdog {</div><div class='del'>-            compatible = "socionext,uniphier-wdt";</div><div class='del'>-        };</div><div class='add'>+    watchdog {</div><div class='add'>+        compatible = "socionext,uniphier-wdt";</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml b/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml<br/>index 39736449ba64..6b13bfc11e11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/st,stm32-iwdg.yaml</a></div><div class='hunk'>@@ -4,14 +4,14 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/watchdog/st,stm32-iwdg.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: STMicroelectronics STM32 Independent WatchDoG (IWDG) bindings</div><div class='add'>+title: STMicroelectronics STM32 Independent WatchDoG (IWDG)</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Yannick Fertre &lt;yannick.fertre@foss.st.com&gt;</div><div class='ctx'>   - Christophe Roullier &lt;christophe.roullier@foss.st.com&gt;</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='hunk'>@@ -48,11 +48,11 @@ examples:</div><div class='ctx'>   - |</div><div class='ctx'>     #include &lt;dt-bindings/clock/stm32mp1-clks.h&gt;</div><div class='ctx'>     watchdog@5a002000 {</div><div class='del'>-      compatible = "st,stm32mp1-iwdg";</div><div class='del'>-      reg = &lt;0x5a002000 0x400&gt;;</div><div class='del'>-      clocks = &lt;&amp;rcc IWDG2&gt;, &lt;&amp;rcc CK_LSI&gt;;</div><div class='del'>-      clock-names = "pclk", "lsi";</div><div class='del'>-      timeout-sec = &lt;32&gt;;</div><div class='add'>+        compatible = "st,stm32mp1-iwdg";</div><div class='add'>+        reg = &lt;0x5a002000 0x400&gt;;</div><div class='add'>+        clocks = &lt;&amp;rcc IWDG2&gt;, &lt;&amp;rcc CK_LSI&gt;;</div><div class='add'>+        clock-names = "pclk", "lsi";</div><div class='add'>+        timeout-sec = &lt;32&gt;;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> ...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/starfive,jh7100-wdt.yaml b/Documentation/devicetree/bindings/watchdog/starfive,jh7100-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..68f3f6fd08a6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/starfive,jh7100-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/starfive,jh7100-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,71 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/starfive,jh7100-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: StarFive Watchdog for JH7100 and JH7110 SoC</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Xingyu Wu &lt;xingyu.wu@starfivetech.com&gt;</div><div class='add'>+  - Samin Guo &lt;samin.guo@starfivetech.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The JH7100 and JH7110 watchdog both are 32 bit counters. JH7100 watchdog</div><div class='add'>+  has only one timeout phase and reboots. And JH7110 watchdog has two</div><div class='add'>+  timeout phases. At the first phase, the signal of watchdog interrupt</div><div class='add'>+  output(WDOGINT) will rise when counter is 0. The counter will reload</div><div class='add'>+  the timeout value. And then, if counter decreases to 0 again and WDOGINT</div><div class='add'>+  isn't cleared, the watchdog will reset the system unless the watchdog</div><div class='add'>+  reset is disabled.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - starfive,jh7100-wdt</div><div class='add'>+      - starfive,jh7110-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  interrupts:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    items:</div><div class='add'>+      - description: APB clock</div><div class='add'>+      - description: Core clock</div><div class='add'>+</div><div class='add'>+  clock-names:</div><div class='add'>+    items:</div><div class='add'>+      - const: apb</div><div class='add'>+      - const: core</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    items:</div><div class='add'>+      - description: APB reset</div><div class='add'>+      - description: Core reset</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - clock-names</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    watchdog@12480000 {</div><div class='add'>+        compatible = "starfive,jh7100-wdt";</div><div class='add'>+        reg = &lt;0x12480000 0x10000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clk 171&gt;,</div><div class='add'>+                 &lt;&amp;clk 172&gt;;</div><div class='add'>+        clock-names = "apb", "core";</div><div class='add'>+        resets = &lt;&amp;rst 99&gt;,</div><div class='add'>+                 &lt;&amp;rst 100&gt;;</div><div class='add'>+    };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml b/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..d90271013191<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/sunplus,sp7021-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+# Copyright (C) Sunplus Co., Ltd. 2021</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/sunplus,sp7021-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Sunplus SoCs Watchdog</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - XianTao Hu &lt;xt.hu@cqplus1.com&gt;</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    const: sunplus,sp7021-wdt</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    items:</div><div class='add'>+      - description: watchdog registers regions</div><div class='add'>+      - description: miscellaneous control registers regions</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  resets:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+  - clocks</div><div class='add'>+  - resets</div><div class='add'>+</div><div class='add'>+additionalProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    watchdog: watchdog@9c000630 {</div><div class='add'>+        compatible = "sunplus,sp7021-wdt";</div><div class='add'>+        reg = &lt;0x9c000630 0x08&gt;, &lt;0x9c000274 0x04&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc 0x24&gt;;</div><div class='add'>+        resets = &lt;&amp;rstc 0x14&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml<br/>index 2f33635876ff..fc553211e42d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml</a></div><div class='hunk'>@@ -18,7 +18,7 @@ description:</div><div class='ctx'>   to directly reset the SoC.</div><div class='ctx'> </div><div class='ctx'> allOf:</div><div class='del'>-  - $ref: "watchdog.yaml#"</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='ctx'> </div><div class='ctx'> properties:</div><div class='ctx'>   compatible:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml b/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml<br/>index 690e19ce4b87..51d03d5b08ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/toshiba,visconti-wdt.yaml</a></div><div class='hunk'>@@ -24,31 +24,25 @@ properties:</div><div class='ctx'>   clocks:</div><div class='ctx'>     maxItems: 1</div><div class='ctx'> </div><div class='del'>-  timeout-sec: true</div><div class='del'>-</div><div class='ctx'> required:</div><div class='ctx'>   - compatible</div><div class='ctx'>   - reg</div><div class='ctx'>   - clocks</div><div class='ctx'> </div><div class='del'>-additionalProperties: false</div><div class='add'>+unevaluatedProperties: false</div><div class='ctx'> </div><div class='ctx'> examples:</div><div class='ctx'>   - |</div><div class='add'>+    #include &lt;dt-bindings/clock/toshiba,tmpv770x.h&gt;</div><div class='add'>+</div><div class='ctx'>     soc {</div><div class='ctx'>         #address-cells = &lt;2&gt;;</div><div class='ctx'>         #size-cells = &lt;2&gt;;</div><div class='ctx'> </div><div class='del'>-        wdt_clk: wdt-clk {</div><div class='del'>-            compatible = "fixed-clock";</div><div class='del'>-            clock-frequency = &lt;150000000&gt;;</div><div class='del'>-            #clock-cells = &lt;0&gt;;</div><div class='del'>-        };</div><div class='del'>-</div><div class='del'>-        watchdog@28330000 {</div><div class='add'>+        wdt: watchdog@28330000 {</div><div class='ctx'>             compatible = "toshiba,visconti-wdt";</div><div class='ctx'>             reg = &lt;0 0x28330000 0 0x1000&gt;;</div><div class='del'>-            clocks = &lt;&amp;wdt_clk&gt;;</div><div class='ctx'>             timeout-sec = &lt;20&gt;;</div><div class='add'>+            clocks = &lt;&amp;pismu TMPV770X_CLK_WDTCLK&gt;;</div><div class='ctx'>         };</div><div class='ctx'>     };</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/watchdog.yaml b/Documentation/devicetree/bindings/watchdog/watchdog.yaml<br/>index e3dfb02f0ca5..519b48889eb1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/watchdog.yaml?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/watchdog/watchdog.yaml</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/watchdog.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/watchdog.yaml</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> $id: http://devicetree.org/schemas/watchdog/watchdog.yaml#</div><div class='ctx'> $schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='ctx'> </div><div class='del'>-title: Watchdog Generic Bindings</div><div class='add'>+title: Watchdog Common Properties</div><div class='ctx'> </div><div class='ctx'> maintainers:</div><div class='ctx'>   - Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='hunk'>@@ -14,9 +14,14 @@ description: |</div><div class='ctx'>   This document describes generic bindings which can be used to</div><div class='ctx'>   describe watchdog devices in a device tree.</div><div class='ctx'> </div><div class='add'>+select:</div><div class='add'>+  properties:</div><div class='add'>+    $nodename:</div><div class='add'>+      pattern: "^watchdog(@.*|-[0-9a-f])?$"</div><div class='add'>+</div><div class='ctx'> properties:</div><div class='ctx'>   $nodename:</div><div class='del'>-    pattern: "^watchdog(@.*|-[0-9a-f])?$"</div><div class='add'>+    pattern: "^(timer|watchdog)(@.*|-[0-9a-f])?$"</div><div class='ctx'> </div><div class='ctx'>   timeout-sec:</div><div class='ctx'>     description:</div><div class='head'>diff --git a/Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase-wdt.yaml b/Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase-wdt.yaml<br/>new file mode 100644<br/>index 000000000000..8444c56dd602<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase-wdt.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/watchdog/xlnx,xps-timebase-wdt.yaml</a></div><div class='hunk'>@@ -0,0 +1,68 @@</div><div class='add'>+# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#</div><div class='add'>+$schema: http://devicetree.org/meta-schemas/core.yaml#</div><div class='add'>+</div><div class='add'>+title: Xilinx AXI/PLB softcore and window Watchdog Timer</div><div class='add'>+</div><div class='add'>+maintainers:</div><div class='add'>+  - Shubhrajyoti Datta &lt;shubhrajyoti.datta@xilinx.com&gt;</div><div class='add'>+  - Srinivas Neeli &lt;srinivas.neeli@xilinx.com&gt;</div><div class='add'>+</div><div class='add'>+description:</div><div class='add'>+  The Timebase watchdog timer(WDT) is a free-running 32 bit counter.</div><div class='add'>+  WDT uses a dual-expiration architecture. After one expiration of</div><div class='add'>+  the timeout interval, an interrupt is generated and the WDT state</div><div class='add'>+  bit is set to one in the status register. If the state bit is not</div><div class='add'>+  cleared (by writing a one to the state bit) before the next</div><div class='add'>+  expiration of the timeout interval, a WDT reset is generated.</div><div class='add'>+</div><div class='add'>+allOf:</div><div class='add'>+  - $ref: watchdog.yaml#</div><div class='add'>+</div><div class='add'>+properties:</div><div class='add'>+  compatible:</div><div class='add'>+    enum:</div><div class='add'>+      - xlnx,xps-timebase-wdt-1.01.a</div><div class='add'>+      - xlnx,xps-timebase-wdt-1.00.a</div><div class='add'>+</div><div class='add'>+  reg:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clocks:</div><div class='add'>+    maxItems: 1</div><div class='add'>+</div><div class='add'>+  clock-frequency:</div><div class='add'>+    description: Frequency of clock in Hz</div><div class='add'>+</div><div class='add'>+  xlnx,wdt-interval:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    description: Watchdog timeout interval</div><div class='add'>+    minimum: 8</div><div class='add'>+    maximum: 32</div><div class='add'>+</div><div class='add'>+  xlnx,wdt-enable-once:</div><div class='add'>+    $ref: /schemas/types.yaml#/definitions/uint32</div><div class='add'>+    enum: [0, 1]</div><div class='add'>+    description: If watchdog is configured as enable once,</div><div class='add'>+                 then the watchdog cannot be disabled after</div><div class='add'>+                 it has been enabled.</div><div class='add'>+</div><div class='add'>+required:</div><div class='add'>+  - compatible</div><div class='add'>+  - reg</div><div class='add'>+</div><div class='add'>+unevaluatedProperties: false</div><div class='add'>+</div><div class='add'>+examples:</div><div class='add'>+  - |</div><div class='add'>+    watchdog@40100000 {</div><div class='add'>+        compatible = "xlnx,xps-timebase-wdt-1.00.a";</div><div class='add'>+        reg = &lt;0x40100000 0x1000&gt;;</div><div class='add'>+        clock-frequency = &lt;50000000&gt;;</div><div class='add'>+        clocks = &lt;&amp;clkc 15&gt;;</div><div class='add'>+        xlnx,wdt-enable-once = &lt;0x0&gt;;</div><div class='add'>+        xlnx,wdt-interval = &lt;0x1b&gt;;</div><div class='add'>+    };</div><div class='add'>+...</div><div class='head'>diff --git a/Documentation/devicetree/bindings/writing-bindings.rst b/Documentation/devicetree/bindings/writing-bindings.rst<br/>index 18d9e0689d49..1ad081de2dd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/writing-bindings.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/writing-bindings.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/writing-bindings.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/writing-bindings.rst</a></div><div class='hunk'>@@ -53,11 +53,36 @@ Properties</div><div class='ctx'> </div><div class='ctx'> - DO use common property unit suffixes for properties with scientific units.</div><div class='ctx'>   Recommended suffixes are listed at</div><div class='del'>-  https://github.com/devicetree-org/dt-schema/blob/master/schemas/property-units.yaml</div><div class='add'>+  https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/property-units.yaml</div><div class='ctx'> </div><div class='ctx'> - DO define properties in terms of constraints. How many entries? What are</div><div class='ctx'>   possible values? What is the order?</div><div class='ctx'> </div><div class='add'>+Typical cases and caveats</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+- Phandle entries, like clocks/dmas/interrupts/resets, should always be</div><div class='add'>+  explicitly ordered. Include the {clock,dma,interrupt,reset}-names if there is</div><div class='add'>+  more than one phandle. When used, both of these fields need the same</div><div class='add'>+  constraints (e.g.  list of items).</div><div class='add'>+</div><div class='add'>+- For names used in {clock,dma,interrupt,reset}-names, do not add any suffix,</div><div class='add'>+  e.g.: "tx" instead of "txirq" (for interrupt).</div><div class='add'>+</div><div class='add'>+- Properties without schema types (e.g. without standard suffix or not defined</div><div class='add'>+  by schema) need the type, even if this is an enum.</div><div class='add'>+</div><div class='add'>+- If schema includes other schema (e.g. /schemas/i2c/i2c-controller.yaml) use</div><div class='add'>+  "unevaluatedProperties:false". In other cases, usually use</div><div class='add'>+  "additionalProperties:false".</div><div class='add'>+</div><div class='add'>+- For sub-blocks/components of bigger device (e.g. SoC blocks) use rather</div><div class='add'>+  device-based compatible (e.g. SoC-based compatible), instead of custom</div><div class='add'>+  versioning of that component.</div><div class='add'>+  For example use "vendor,soc1234-i2c" instead of "vendor,i2c-v2".</div><div class='add'>+</div><div class='add'>+- "syscon" is not a generic property. Use vendor and type, e.g.</div><div class='add'>+  "vendor,power-manager-syscon".</div><div class='ctx'> </div><div class='ctx'> Board/SoC .dts Files</div><div class='ctx'> ====================</div><div class='head'>diff --git a/Documentation/devicetree/bindings/writing-schema.rst b/Documentation/devicetree/bindings/writing-schema.rst<br/>index 95ecf55559e5..4a381d20f2b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/writing-schema.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/bindings/writing-schema.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/bindings/writing-schema.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/bindings/writing-schema.rst</a></div><div class='hunk'>@@ -108,6 +108,12 @@ The YAML Devicetree format also makes all string values an array and scalar</div><div class='ctx'> values a matrix (in order to define groupings) even when only a single value</div><div class='ctx'> is present. Single entries in schemas are fixed up to match this encoding.</div><div class='ctx'> </div><div class='add'>+Coding style</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Use YAML coding style (two-space indentation). For DTS examples in the schema,</div><div class='add'>+preferred is four-space indentation.</div><div class='add'>+</div><div class='ctx'> Testing</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='hunk'>@@ -128,6 +134,8 @@ installed first. On Debian/Ubuntu systems::</div><div class='ctx'> Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be</div><div class='ctx'> installed. Ensure they are in your PATH (~/.local/bin by default).</div><div class='ctx'> </div><div class='add'>+Recommended is also to install yamllint (used by dtschema when present).</div><div class='add'>+</div><div class='ctx'> Running checks</div><div class='ctx'> ~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/devicetree/overlay-notes.rst b/Documentation/devicetree/overlay-notes.rst<br/>index b2b8db765b8c..e139f22b363e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/overlay-notes.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/devicetree/overlay-notes.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/devicetree/overlay-notes.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/devicetree/overlay-notes.rst</a></div><div class='hunk'>@@ -119,10 +119,32 @@ Finally, if you need to remove all overlays in one-go, just call</div><div class='ctx'> of_overlay_remove_all() which will remove every single one in the correct</div><div class='ctx'> order.</div><div class='ctx'> </div><div class='del'>-In addition, there is the option to register notifiers that get called on</div><div class='add'>+There is the option to register notifiers that get called on</div><div class='ctx'> overlay operations. See of_overlay_notifier_register/unregister and</div><div class='ctx'> enum of_overlay_notify_action for details.</div><div class='ctx'> </div><div class='del'>-Note that a notifier callback is not supposed to store pointers to a device</div><div class='del'>-tree node or its content beyond OF_OVERLAY_POST_REMOVE corresponding to the</div><div class='del'>-respective node it received.</div><div class='add'>+A notifier callback for OF_OVERLAY_PRE_APPLY, OF_OVERLAY_POST_APPLY, or</div><div class='add'>+OF_OVERLAY_PRE_REMOVE may store pointers to a device tree node in the overlay</div><div class='add'>+or its content but these pointers must not persist past the notifier callback</div><div class='add'>+for OF_OVERLAY_POST_REMOVE.  The memory containing the overlay will be</div><div class='add'>+kfree()ed after OF_OVERLAY_POST_REMOVE notifiers are called.  Note that the</div><div class='add'>+memory will be kfree()ed even if the notifier for OF_OVERLAY_POST_REMOVE</div><div class='add'>+returns an error.</div><div class='add'>+</div><div class='add'>+The changeset notifiers in drivers/of/dynamic.c are a second type of notifier</div><div class='add'>+that could be triggered by applying or removing an overlay.  These notifiers</div><div class='add'>+are not allowed to store pointers to a device tree node in the overlay</div><div class='add'>+or its content.  The overlay code does not protect against such pointers</div><div class='add'>+remaining active when the memory containing the overlay is freed as a result</div><div class='add'>+of removing the overlay.</div><div class='add'>+</div><div class='add'>+Any other code that retains a pointer to the overlay nodes or data is</div><div class='add'>+considered to be a bug because after removing the overlay the pointer</div><div class='add'>+will refer to freed memory.</div><div class='add'>+</div><div class='add'>+Users of overlays must be especially aware of the overall operations that</div><div class='add'>+occur on the system to ensure that other kernel code does not retain any</div><div class='add'>+pointers to the overlay nodes or data.  Any example of an inadvertent use</div><div class='add'>+of such pointers is if a driver or subsystem module is loaded after an</div><div class='add'>+overlay has been applied, and the driver or subsystem scans the entire</div><div class='add'>+devicetree or a large portion of it, including the overlay nodes.</div><div class='head'>diff --git a/Documentation/doc-guide/contributing.rst b/Documentation/doc-guide/contributing.rst<br/>index 207fd93d7c80..d4793826ad9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/doc-guide/contributing.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/doc-guide/contributing.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/doc-guide/contributing.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/doc-guide/contributing.rst</a></div><div class='hunk'>@@ -79,8 +79,9 @@ simplistic idea of what C comment blocks look like.  This problem had been</div><div class='ctx'> present since that comment was added in 2016 — a full four years.  Fixing</div><div class='ctx'> it was a matter of adding the missing asterisks.  A quick look at the</div><div class='ctx'> history for that file showed what the normal format for subject lines is,</div><div class='del'>-and ``scripts/get_maintainer.pl`` told me who should receive it.  The</div><div class='del'>-resulting patch looked like this::</div><div class='add'>+and ``scripts/get_maintainer.pl`` told me who should receive it (pass paths to</div><div class='add'>+your patches as arguments to scripts/get_maintainer.pl).  The resulting patch</div><div class='add'>+looked like this::</div><div class='ctx'> </div><div class='ctx'>   [PATCH] PM / devfreq: Fix two malformed kerneldoc comments</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/doc-guide/kernel-doc.rst b/Documentation/doc-guide/kernel-doc.rst<br/>index 79aaa55d6bcf..1dcbd7332476 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/doc-guide/kernel-doc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/doc-guide/kernel-doc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/doc-guide/kernel-doc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/doc-guide/kernel-doc.rst</a></div><div class='hunk'>@@ -1,3 +1,6 @@</div><div class='add'>+.. title:: Kernel-doc comments</div><div class='add'>+</div><div class='add'>+===========================</div><div class='ctx'> Writing kernel-doc comments</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='hunk'>@@ -11,6 +14,9 @@ when it is embedded in source files.</div><div class='ctx'>    reasons. The kernel source contains tens of thousands of kernel-doc</div><div class='ctx'>    comments. Please stick to the style described here.</div><div class='ctx'> </div><div class='add'>+.. note:: kernel-doc does not cover Rust code: please see</div><div class='add'>+   Documentation/rust/general-information.rst instead.</div><div class='add'>+</div><div class='ctx'> The kernel-doc structure is extracted from the comments, and proper</div><div class='ctx'> `Sphinx C Domain`_ function and type descriptions with anchors are</div><div class='ctx'> generated from them. The descriptions are filtered for special kernel-doc</div><div class='hunk'>@@ -436,6 +442,7 @@ The title following ``DOC:`` acts as a heading within the source file, but also</div><div class='ctx'> as an identifier for extracting the documentation comment. Thus, the title must</div><div class='ctx'> be unique within the file.</div><div class='ctx'> </div><div class='add'>+=============================</div><div class='ctx'> Including kernel-doc comments</div><div class='ctx'> =============================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/doc-guide/sphinx.rst b/Documentation/doc-guide/sphinx.rst<br/>index bb36f18ae9ac..23edb427e76f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/doc-guide/sphinx.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/doc-guide/sphinx.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/doc-guide/sphinx.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/doc-guide/sphinx.rst</a></div><div class='hunk'>@@ -1,7 +1,8 @@</div><div class='ctx'> .. _sphinxdoc:</div><div class='ctx'> </div><div class='del'>-Introduction</div><div class='del'>-============</div><div class='add'>+=====================================</div><div class='add'>+Using Sphinx for kernel documentation</div><div class='add'>+=====================================</div><div class='ctx'> </div><div class='ctx'> The Linux kernel uses `Sphinx`_ to generate pretty documentation from</div><div class='ctx'> `reStructuredText`_ files under ``Documentation``. To build the documentation in</div><div class='hunk'>@@ -47,10 +48,6 @@ or ``virtualenv``, depending on how your distribution packaged Python 3.</div><div class='ctx'>       on the Sphinx version, it should be installed separately,</div><div class='ctx'>       with ``pip install sphinx_rtd_theme``.</div><div class='ctx'> </div><div class='del'>-   #) Some ReST pages contain math expressions. Due to the way Sphinx works,</div><div class='del'>-      those expressions are written using LaTeX notation. It needs texlive</div><div class='del'>-      installed with amsfonts and amsmath in order to evaluate them.</div><div class='del'>-</div><div class='ctx'> In summary, if you want to install Sphinx version 2.4.4, you should do::</div><div class='ctx'> </div><div class='ctx'>        $ virtualenv sphinx_2.4.4</div><div class='hunk'>@@ -85,6 +82,27 @@ Depending on the distribution, you may also need to install a series of</div><div class='ctx'> ``texlive`` packages that provide the minimal set of functionalities</div><div class='ctx'> required for ``XeLaTeX`` to work.</div><div class='ctx'> </div><div class='add'>+Math Expressions in HTML</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Some ReST pages contain math expressions. Due to the way Sphinx works,</div><div class='add'>+those expressions are written using LaTeX notation.</div><div class='add'>+There are two options for Sphinx to render math expressions in html output.</div><div class='add'>+One is an extension called `imgmath`_ which converts math expressions into</div><div class='add'>+images and embeds them in html pages.</div><div class='add'>+The other is an extension called `mathjax`_ which delegates math rendering</div><div class='add'>+to JavaScript capable web browsers.</div><div class='add'>+The former was the only option for pre-6.1 kernel documentation and it</div><div class='add'>+requires quite a few texlive packages including amsfonts and amsmath among</div><div class='add'>+others.</div><div class='add'>+</div><div class='add'>+Since kernel release 6.1, html pages with math expressions can be built</div><div class='add'>+without installing any texlive packages. See `Choice of Math Renderer`_ for</div><div class='add'>+further info.</div><div class='add'>+</div><div class='add'>+.. _imgmath: https://www.sphinx-doc.org/en/master/usage/extensions/math.html#module-sphinx.ext.imgmath</div><div class='add'>+.. _mathjax: https://www.sphinx-doc.org/en/master/usage/extensions/math.html#module-sphinx.ext.mathjax</div><div class='add'>+</div><div class='ctx'> .. _sphinx-pre-install:</div><div class='ctx'> </div><div class='ctx'> Checking for Sphinx dependencies</div><div class='hunk'>@@ -129,10 +147,9 @@ section of ``make help``. The generated documentation is placed in</div><div class='ctx'> format-specific subdirectories under ``Documentation/output``.</div><div class='ctx'> </div><div class='ctx'> To generate documentation, Sphinx (``sphinx-build``) must obviously be</div><div class='del'>-installed. For prettier HTML output, the Read the Docs Sphinx theme</div><div class='del'>-(``sphinx_rtd_theme``) is used if available. For PDF output you'll also need</div><div class='del'>-``XeLaTeX`` and ``convert(1)`` from ImageMagick (https://www.imagemagick.org).</div><div class='del'>-All of these are widely available and packaged in distributions.</div><div class='add'>+installed.  For PDF output you'll also need ``XeLaTeX`` and ``convert(1)``</div><div class='add'>+from ImageMagick (https://www.imagemagick.org).\ [#ink]_ All of these are</div><div class='add'>+widely available and packaged in distributions.</div><div class='ctx'> </div><div class='ctx'> To pass extra options to Sphinx, you can use the ``SPHINXOPTS`` make</div><div class='ctx'> variable. For example, use ``make SPHINXOPTS=-v htmldocs`` to get more verbose</div><div class='hunk'>@@ -141,15 +158,54 @@ output.</div><div class='ctx'> It is also possible to pass an extra DOCS_CSS overlay file, in order to customize</div><div class='ctx'> the html layout, by using the ``DOCS_CSS`` make variable.</div><div class='ctx'> </div><div class='del'>-By default, the build will try to use the Read the Docs sphinx theme:</div><div class='add'>+By default, the "Alabaster" theme is used to build the HTML documentation;</div><div class='add'>+this theme is bundled with Sphinx and need not be installed separately.</div><div class='add'>+The Sphinx theme can be overridden by using the ``DOCS_THEME`` make variable.</div><div class='ctx'> </div><div class='del'>-    https://github.com/readthedocs/sphinx_rtd_theme</div><div class='add'>+There is another make variable ``SPHINXDIRS``, which is useful when test</div><div class='add'>+building a subset of documentation.  For example, you can build documents</div><div class='add'>+under ``Documentation/doc-guide`` by running</div><div class='add'>+``make SPHINXDIRS=doc-guide htmldocs``.</div><div class='add'>+The documentation section of ``make help`` will show you the list of</div><div class='add'>+subdirectories you can specify.</div><div class='ctx'> </div><div class='del'>-If the theme is not available, it will fall-back to the classic one.</div><div class='add'>+To remove the generated documentation, run ``make cleandocs``.</div><div class='ctx'> </div><div class='del'>-The Sphinx theme can be overridden by using the ``DOCS_THEME`` make variable.</div><div class='add'>+.. [#ink] Having ``inkscape(1)`` from Inkscape (https://inkscape.org)</div><div class='add'>+	  as well would improve the quality of images embedded in PDF</div><div class='add'>+	  documents, especially for kernel releases 5.18 and later.</div><div class='add'>+</div><div class='add'>+Choice of Math Renderer</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+Since kernel release 6.1, mathjax works as a fallback math renderer for</div><div class='add'>+html output.\ [#sph1_8]_</div><div class='add'>+</div><div class='add'>+Math renderer is chosen depending on available commands as shown below:</div><div class='add'>+</div><div class='add'>+.. table:: Math Renderer Choices for HTML</div><div class='add'>+</div><div class='add'>+    ============= ================= ============</div><div class='add'>+    Math renderer Required commands Image format</div><div class='add'>+    ============= ================= ============</div><div class='add'>+    imgmath       latex, dvipng     PNG (raster)</div><div class='add'>+    mathjax</div><div class='add'>+    ============= ================= ============</div><div class='add'>+</div><div class='add'>+The choice can be overridden by setting an environment variable</div><div class='add'>+``SPHINX_IMGMATH`` as shown below:</div><div class='add'>+</div><div class='add'>+.. table:: Effect of Setting ``SPHINX_IMGMATH``</div><div class='add'>+</div><div class='add'>+    ====================== ========</div><div class='add'>+    Setting                Renderer</div><div class='add'>+    ====================== ========</div><div class='add'>+    ``SPHINX_IMGMATH=yes`` imgmath</div><div class='add'>+    ``SPHINX_IMGMATH=no``  mathjax</div><div class='add'>+    ====================== ========</div><div class='add'>+</div><div class='add'>+.. [#sph1_8] Fallback of math renderer requires Sphinx &gt;=1.8.</div><div class='ctx'> </div><div class='del'>-To remove the generated documentation, run ``make cleandocs``.</div><div class='ctx'> </div><div class='ctx'> Writing Documentation</div><div class='ctx'> =====================</div><div class='head'>diff --git a/Documentation/dontdiff b/Documentation/dontdiff<br/>index 910b30a2a7d9..3c399f132e2d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/dontdiff?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/dontdiff</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/dontdiff?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/dontdiff</a></div><div class='hunk'>@@ -91,7 +91,6 @@ asm_offsets.h</div><div class='ctx'> autoconf.h*</div><div class='ctx'> av_permissions.h</div><div class='ctx'> bbootsect</div><div class='del'>-bin2c</div><div class='ctx'> binkernel.spec</div><div class='ctx'> bootsect</div><div class='ctx'> bounds.h</div><div class='hunk'>@@ -211,6 +210,7 @@ r200_reg_safe.h</div><div class='ctx'> r300_reg_safe.h</div><div class='ctx'> r420_reg_safe.h</div><div class='ctx'> r600_reg_safe.h</div><div class='add'>+randstruct.seed</div><div class='ctx'> randomize_layout_hash.h</div><div class='ctx'> randomize_layout_seed.h</div><div class='ctx'> recordmcount</div><div class='head'>diff --git a/Documentation/driver-api/aperture.rst b/Documentation/driver-api/aperture.rst<br/>new file mode 100644<br/>index 000000000000..d173f4e7a7d9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/aperture.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/aperture.rst</a></div><div class='hunk'>@@ -0,0 +1,13 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Managing Ownership of the Framebuffer Aperture</div><div class='add'>+==============================================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/video/aperture.c</div><div class='add'>+   :doc: overview</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/aperture.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/video/aperture.c</div><div class='add'>+   :export:</div><div class='head'>diff --git a/Documentation/driver-api/basics.rst b/Documentation/driver-api/basics.rst<br/>index 3e2dae954898..4b4d8e28d3be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/basics.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/basics.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/basics.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/basics.rst</a></div><div class='hunk'>@@ -107,9 +107,6 @@ Kernel utility functions</div><div class='ctx'> .. kernel-doc:: kernel/panic.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/linux/overflow.h</div><div class='del'>-   :internal:</div><div class='del'>-</div><div class='ctx'> Device Resource Management</div><div class='ctx'> --------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/clk.rst b/Documentation/driver-api/clk.rst<br/>index 3cad45d14187..93bab5336dfd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/clk.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/clk.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/clk.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/clk.rst</a></div><div class='hunk'>@@ -258,6 +258,11 @@ clocks properly but rely on them being on from the bootloader, bypassing</div><div class='ctx'> the disabling means that the driver will remain functional while the issues</div><div class='ctx'> are sorted out.</div><div class='ctx'> </div><div class='add'>+You can see which clocks have been disabled by booting your kernel with these</div><div class='add'>+parameters::</div><div class='add'>+</div><div class='add'>+ tp_printk trace_event=clk:clk_disable</div><div class='add'>+</div><div class='ctx'> To bypass this disabling, include "clk_ignore_unused" in the bootargs to the</div><div class='ctx'> kernel.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/cxl/memory-devices.rst b/Documentation/driver-api/cxl/memory-devices.rst<br/>index db476bb170b6..5149ecdc53c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/cxl/memory-devices.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/cxl/memory-devices.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/cxl/memory-devices.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/cxl/memory-devices.rst</a></div><div class='hunk'>@@ -362,6 +362,14 @@ CXL Core</div><div class='ctx'> .. kernel-doc:: drivers/cxl/core/mbox.c</div><div class='ctx'>    :doc: cxl mbox</div><div class='ctx'> </div><div class='add'>+CXL Regions</div><div class='add'>+-----------</div><div class='add'>+.. kernel-doc:: drivers/cxl/core/region.c</div><div class='add'>+   :doc: cxl core region</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/cxl/core/region.c</div><div class='add'>+   :identifiers:</div><div class='add'>+</div><div class='ctx'> External Interfaces</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/device-io.rst b/Documentation/driver-api/device-io.rst<br/>index 4d2baac0311c..2c7abd234f4e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/device-io.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/device-io.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/device-io.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/device-io.rst</a></div><div class='hunk'>@@ -410,7 +410,7 @@ ioremap_uc()</div><div class='ctx'> </div><div class='ctx'> ioremap_uc() behaves like ioremap() except that on the x86 architecture without</div><div class='ctx'> 'PAT' mode, it marks memory as uncached even when the MTRR has designated</div><div class='del'>-it as cacheable, see Documentation/x86/pat.rst.</div><div class='add'>+it as cacheable, see Documentation/arch/x86/pat.rst.</div><div class='ctx'> </div><div class='ctx'> Portable drivers should avoid the use of ioremap_uc().</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/dma-buf.rst b/Documentation/driver-api/dma-buf.rst<br/>index 55006678394a..f92a32d095d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dma-buf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/dma-buf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dma-buf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/dma-buf.rst</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-Buffer Sharing and Synchronization</div><div class='del'>-==================================</div><div class='add'>+Buffer Sharing and Synchronization (dma-buf)</div><div class='add'>+============================================</div><div class='ctx'> </div><div class='ctx'> The dma-buf subsystem provides the framework for sharing buffers for</div><div class='ctx'> hardware (DMA) access across multiple device drivers and subsystems, and</div><div class='hunk'>@@ -119,6 +119,12 @@ DMA Buffer ioctls</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: include/uapi/linux/dma-buf.h</div><div class='ctx'> </div><div class='add'>+DMA-BUF locking convention</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/dma-buf/dma-buf.c</div><div class='add'>+   :doc: locking convention</div><div class='add'>+</div><div class='ctx'> Kernel Functions and Structures Reference</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -158,6 +164,12 @@ DMA Fence Signalling Annotations</div><div class='ctx'> .. kernel-doc:: drivers/dma-buf/dma-fence.c</div><div class='ctx'>    :doc: fence signalling annotation</div><div class='ctx'> </div><div class='add'>+DMA Fence Deadline Hints</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/dma-buf/dma-fence.c</div><div class='add'>+   :doc: deadline hints</div><div class='add'>+</div><div class='ctx'> DMA Fences Functions Reference</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -185,8 +197,14 @@ DMA Fence Chain</div><div class='ctx'> .. kernel-doc:: include/linux/dma-fence-chain.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-DMA Fence uABI/Sync File</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+DMA Fence unwrap</div><div class='add'>+~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/dma-fence-unwrap.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+DMA Fence Sync File</div><div class='add'>+~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/dma-buf/sync_file.c</div><div class='ctx'>    :export:</div><div class='hunk'>@@ -194,6 +212,12 @@ DMA Fence uABI/Sync File</div><div class='ctx'> .. kernel-doc:: include/linux/sync_file.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='add'>+DMA Fence Sync File uABI</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/sync_file.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='ctx'> Indefinite DMA Fences</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -252,7 +276,7 @@ through memory management dependencies which userspace is unaware of, which</div><div class='ctx'> randomly hangs workloads until the timeout kicks in. Workloads, which from</div><div class='ctx'> userspace's perspective, do not contain a deadlock.  In such a mixed fencing</div><div class='ctx'> architecture there is no single entity with knowledge of all dependencies.</div><div class='del'>-Thefore preventing such deadlocks from within the kernel is not possible.</div><div class='add'>+Therefore preventing such deadlocks from within the kernel is not possible.</div><div class='ctx'> </div><div class='ctx'> The only solution to avoid dependencies loops is by not allowing indefinite</div><div class='ctx'> fences in the kernel. This means:</div><div class='head'>diff --git a/Documentation/driver-api/dmaengine/client.rst b/Documentation/driver-api/dmaengine/client.rst<br/>index bfd057b21a00..ecf139f73da4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dmaengine/client.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/dmaengine/client.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dmaengine/client.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/dmaengine/client.rst</a></div><div class='hunk'>@@ -175,7 +175,7 @@ The details of these operations are:</div><div class='ctx'>     driver can ask for the pointer, maximum size and the currently used size of</div><div class='ctx'>     the metadata and can directly update or read it.</div><div class='ctx'> </div><div class='del'>-    Becasue the DMA driver manages the memory area containing the metadata,</div><div class='add'>+    Because the DMA driver manages the memory area containing the metadata,</div><div class='ctx'>     clients must make sure that they do not try to access or get the pointer</div><div class='ctx'>     after their transfer completion callback has run for the descriptor.</div><div class='ctx'>     If no completion callback has been defined for the transfer, then the</div><div class='head'>diff --git a/Documentation/driver-api/dmaengine/dmatest.rst b/Documentation/driver-api/dmaengine/dmatest.rst<br/>index cf9859cd0b43..e2a63cefd783 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dmaengine/dmatest.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/dmaengine/dmatest.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dmaengine/dmatest.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/dmaengine/dmatest.rst</a></div><div class='hunk'>@@ -89,7 +89,7 @@ The following command returns the state of the test. ::</div><div class='ctx'> </div><div class='ctx'>     % cat /sys/module/dmatest/parameters/run</div><div class='ctx'> </div><div class='del'>-To wait for test completion userpace can poll 'run' until it is false, or use</div><div class='add'>+To wait for test completion userspace can poll 'run' until it is false, or use</div><div class='ctx'> the wait parameter. Specifying 'wait=1' when loading the module causes module</div><div class='ctx'> initialization to pause until a test run has completed, while reading</div><div class='ctx'> /sys/module/dmatest/parameters/wait waits for any running test to complete</div><div class='head'>diff --git a/Documentation/driver-api/dmaengine/provider.rst b/Documentation/driver-api/dmaengine/provider.rst<br/>index 0072c9c7efd3..ceac2a300e32 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dmaengine/provider.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/dmaengine/provider.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/dmaengine/provider.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/dmaengine/provider.rst</a></div><div class='hunk'>@@ -162,16 +162,6 @@ Currently, the types available are:</div><div class='ctx'> </div><div class='ctx'>   - The device is able to do memory to memory copies</div><div class='ctx'> </div><div class='del'>-- - DMA_MEMCPY_SG</div><div class='del'>-</div><div class='del'>-  - The device supports memory to memory scatter-gather transfers.</div><div class='del'>-</div><div class='del'>-  - Even though a plain memcpy can look like a particular case of a</div><div class='del'>-    scatter-gather transfer, with a single chunk to copy, it's a distinct</div><div class='del'>-    transaction type in the mem2mem transfer case. This is because some very</div><div class='del'>-    simple devices might be able to do contiguous single-chunk memory copies,</div><div class='del'>-    but have no support for more complex SG transfers.</div><div class='del'>-</div><div class='ctx'>   - No matter what the overall size of the combined chunks for source and</div><div class='ctx'>     destination is, only as many bytes as the smallest of the two will be</div><div class='ctx'>     transmitted. That means the number and size of the scatter-gather buffers in</div><div class='hunk'>@@ -206,6 +196,12 @@ Currently, the types available are:</div><div class='ctx'>   - The device is able to perform parity check using RAID6 P+Q</div><div class='ctx'>     algorithm against a memory buffer.</div><div class='ctx'> </div><div class='add'>+- DMA_MEMSET</div><div class='add'>+</div><div class='add'>+  - The device is able to fill memory with the provided pattern</div><div class='add'>+</div><div class='add'>+  - The pattern is treated as a single byte signed value.</div><div class='add'>+</div><div class='ctx'> - DMA_INTERRUPT</div><div class='ctx'> </div><div class='ctx'>   - The device is able to trigger a dummy transfer that will</div><div class='hunk'>@@ -457,7 +453,7 @@ supported.</div><div class='ctx'>   - Should use dma_set_residue to report it</div><div class='ctx'> </div><div class='ctx'>   - In the case of a cyclic transfer, it should only take into</div><div class='del'>-    account the current period.</div><div class='add'>+    account the total size of the cyclic buffer.</div><div class='ctx'> </div><div class='ctx'>   - Should return DMA_OUT_OF_ORDER if the device does not support in order</div><div class='ctx'>     completion and is completing the operation out of order.</div><div class='head'>diff --git a/Documentation/driver-api/driver-model/bus.rst b/Documentation/driver-api/driver-model/bus.rst<br/>index 016b15a6e8ea..9709ab62a468 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/driver-model/bus.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/driver-model/bus.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/driver-model/bus.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/driver-model/bus.rst</a></div><div class='hunk'>@@ -125,8 +125,8 @@ Exporting Attributes</div><div class='ctx'> </div><div class='ctx'>   struct bus_attribute {</div><div class='ctx'> 	struct attribute	attr;</div><div class='del'>-	ssize_t (*show)(struct bus_type *, char * buf);</div><div class='del'>-	ssize_t (*store)(struct bus_type *, const char * buf, size_t count);</div><div class='add'>+	ssize_t (*show)(const struct bus_type *, char * buf);</div><div class='add'>+	ssize_t (*store)(const struct bus_type *, const char * buf, size_t count);</div><div class='ctx'>   };</div><div class='ctx'> </div><div class='ctx'> Bus drivers can export attributes using the BUS_ATTR_RW macro that works</div><div class='head'>diff --git a/Documentation/driver-api/driver-model/devres.rst b/Documentation/driver-api/driver-model/devres.rst<br/>index 5018403fe82f..4249eb4239e0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/driver-model/devres.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/driver-model/devres.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/driver-model/devres.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/driver-model/devres.rst</a></div><div class='hunk'>@@ -249,7 +249,7 @@ CLOCK</div><div class='ctx'>   devm_clk_bulk_get()</div><div class='ctx'>   devm_clk_bulk_get_all()</div><div class='ctx'>   devm_clk_bulk_get_optional()</div><div class='del'>-  devm_get_clk_from_childl()</div><div class='add'>+  devm_get_clk_from_child()</div><div class='ctx'>   devm_clk_hw_register()</div><div class='ctx'>   devm_of_clk_add_hw_provider()</div><div class='ctx'>   devm_clk_hw_register_clkdev()</div><div class='hunk'>@@ -277,9 +277,9 @@ GPIO</div><div class='ctx'>   devm_gpiochip_add_data()</div><div class='ctx'>   devm_gpio_request()</div><div class='ctx'>   devm_gpio_request_one()</div><div class='del'>-  devm_gpio_free()</div><div class='ctx'> </div><div class='ctx'> I2C</div><div class='add'>+  devm_i2c_add_adapter()</div><div class='ctx'>   devm_i2c_new_dummy_device()</div><div class='ctx'> </div><div class='ctx'> IIO</div><div class='hunk'>@@ -287,12 +287,16 @@ IIO</div><div class='ctx'>   devm_iio_device_register()</div><div class='ctx'>   devm_iio_dmaengine_buffer_setup()</div><div class='ctx'>   devm_iio_kfifo_buffer_setup()</div><div class='add'>+  devm_iio_kfifo_buffer_setup_ext()</div><div class='ctx'>   devm_iio_map_array_register()</div><div class='ctx'>   devm_iio_triggered_buffer_setup()</div><div class='add'>+  devm_iio_triggered_buffer_setup_ext()</div><div class='ctx'>   devm_iio_trigger_alloc()</div><div class='ctx'>   devm_iio_trigger_register()</div><div class='ctx'>   devm_iio_channel_get()</div><div class='ctx'>   devm_iio_channel_get_all()</div><div class='add'>+  devm_iio_hw_consumer_alloc()</div><div class='add'>+  devm_fwnode_iio_channel_get_by_name()</div><div class='ctx'> </div><div class='ctx'> INPUT</div><div class='ctx'>   devm_input_allocate_device()</div><div class='hunk'>@@ -302,6 +306,7 @@ IO region</div><div class='ctx'>   devm_release_region()</div><div class='ctx'>   devm_release_resource()</div><div class='ctx'>   devm_request_mem_region()</div><div class='add'>+  devm_request_free_mem_region()</div><div class='ctx'>   devm_request_region()</div><div class='ctx'>   devm_request_resource()</div><div class='ctx'> </div><div class='hunk'>@@ -311,7 +316,6 @@ IOMAP</div><div class='ctx'>   devm_ioremap()</div><div class='ctx'>   devm_ioremap_uc()</div><div class='ctx'>   devm_ioremap_wc()</div><div class='del'>-  devm_ioremap_np()</div><div class='ctx'>   devm_ioremap_resource() : checks resource, requests memory region, ioremaps</div><div class='ctx'>   devm_ioremap_resource_wc()</div><div class='ctx'>   devm_platform_ioremap_resource() : calls devm_ioremap_resource() for platform device</div><div class='hunk'>@@ -335,11 +339,14 @@ IRQ</div><div class='ctx'>   devm_irq_alloc_descs_from()</div><div class='ctx'>   devm_irq_alloc_generic_chip()</div><div class='ctx'>   devm_irq_setup_generic_chip()</div><div class='del'>-  devm_irq_sim_init()</div><div class='add'>+  devm_irq_domain_create_sim()</div><div class='ctx'> </div><div class='ctx'> LED</div><div class='ctx'>   devm_led_classdev_register()</div><div class='add'>+  devm_led_classdev_register_ext()</div><div class='ctx'>   devm_led_classdev_unregister()</div><div class='add'>+  devm_led_trigger_register()</div><div class='add'>+  devm_of_led_get()</div><div class='ctx'> </div><div class='ctx'> MDIO</div><div class='ctx'>   devm_mdiobus_alloc()</div><div class='hunk'>@@ -358,6 +365,7 @@ MEM</div><div class='ctx'>   devm_kmemdup()</div><div class='ctx'>   devm_krealloc()</div><div class='ctx'>   devm_kstrdup()</div><div class='add'>+  devm_kstrdup_const()</div><div class='ctx'>   devm_kvasprintf()</div><div class='ctx'>   devm_kzalloc()</div><div class='ctx'> </div><div class='hunk'>@@ -388,12 +396,16 @@ PCI</div><div class='ctx'> </div><div class='ctx'> PHY</div><div class='ctx'>   devm_usb_get_phy()</div><div class='add'>+  devm_usb_get_phy_by_node()</div><div class='add'>+  devm_usb_get_phy_by_phandle()</div><div class='ctx'>   devm_usb_put_phy()</div><div class='ctx'> </div><div class='ctx'> PINCTRL</div><div class='ctx'>   devm_pinctrl_get()</div><div class='ctx'>   devm_pinctrl_put()</div><div class='add'>+  devm_pinctrl_get_select()</div><div class='ctx'>   devm_pinctrl_register()</div><div class='add'>+  devm_pinctrl_register_and_init()</div><div class='ctx'>   devm_pinctrl_unregister()</div><div class='ctx'> </div><div class='ctx'> POWER</div><div class='hunk'>@@ -401,15 +413,27 @@ POWER</div><div class='ctx'>   devm_reboot_mode_unregister()</div><div class='ctx'> </div><div class='ctx'> PWM</div><div class='add'>+  devm_pwmchip_add()</div><div class='ctx'>   devm_pwm_get()</div><div class='del'>-  devm_of_pwm_get()</div><div class='ctx'>   devm_fwnode_pwm_get()</div><div class='ctx'> </div><div class='ctx'> REGULATOR</div><div class='add'>+  devm_regulator_bulk_register_supply_alias()</div><div class='ctx'>   devm_regulator_bulk_get()</div><div class='add'>+  devm_regulator_bulk_get_const()</div><div class='add'>+  devm_regulator_bulk_get_enable()</div><div class='add'>+  devm_regulator_bulk_put()</div><div class='ctx'>   devm_regulator_get()</div><div class='add'>+  devm_regulator_get_enable()</div><div class='add'>+  devm_regulator_get_enable_optional()</div><div class='add'>+  devm_regulator_get_exclusive()</div><div class='add'>+  devm_regulator_get_optional()</div><div class='add'>+  devm_regulator_irq_helper()</div><div class='ctx'>   devm_regulator_put()</div><div class='ctx'>   devm_regulator_register()</div><div class='add'>+  devm_regulator_register_notifier()</div><div class='add'>+  devm_regulator_register_supply_alias()</div><div class='add'>+  devm_regulator_unregister_notifier()</div><div class='ctx'> </div><div class='ctx'> RESET</div><div class='ctx'>   devm_reset_control_get()</div><div class='hunk'>@@ -426,8 +450,11 @@ SERDEV</div><div class='ctx'> </div><div class='ctx'> SLAVE DMA ENGINE</div><div class='ctx'>   devm_acpi_dma_controller_register()</div><div class='add'>+  devm_acpi_dma_controller_free()</div><div class='ctx'> </div><div class='ctx'> SPI</div><div class='add'>+  devm_spi_alloc_master()</div><div class='add'>+  devm_spi_alloc_slave()</div><div class='ctx'>   devm_spi_register_master()</div><div class='ctx'> </div><div class='ctx'> WATCHDOG</div><div class='head'>diff --git a/Documentation/driver-api/eisa.rst b/Documentation/driver-api/eisa.rst<br/>index c07565ba57da..3eac11b7eb01 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/eisa.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/eisa.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/eisa.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/eisa.rst</a></div><div class='hunk'>@@ -189,7 +189,7 @@ eisa_bus.enable_dev</div><div class='ctx'> 	initialize the device in such conditions.</div><div class='ctx'> </div><div class='ctx'> eisa_bus.disable_dev</div><div class='del'>-	A comma-separated list of slots to be enabled, even if the firmware</div><div class='add'>+	A comma-separated list of slots to be disabled, even if the firmware</div><div class='ctx'> 	set the card as enabled. The driver won't be called to handle this</div><div class='ctx'> 	device.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/firmware/core.rst b/Documentation/driver-api/firmware/core.rst<br/>index 1d1688cbc078..803cd574bbd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/core.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/firmware/core.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/core.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/firmware/core.rst</a></div><div class='hunk'>@@ -13,4 +13,5 @@ documents these features.</div><div class='ctx'>    direct-fs-lookup</div><div class='ctx'>    fallback-mechanisms</div><div class='ctx'>    lookup-order</div><div class='add'>+   firmware-usage-guidelines</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/firmware/firmware-usage-guidelines.rst b/Documentation/driver-api/firmware/firmware-usage-guidelines.rst<br/>new file mode 100644<br/>index 000000000000..fdcfce42c6d2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/firmware-usage-guidelines.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/firmware/firmware-usage-guidelines.rst</a></div><div class='hunk'>@@ -0,0 +1,44 @@</div><div class='add'>+===================</div><div class='add'>+Firmware Guidelines</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+Users switching to a newer kernel should *not* have to install newer</div><div class='add'>+firmware files to keep their hardware working. At the same time updated</div><div class='add'>+firmware files must not cause any regressions for users of older kernel</div><div class='add'>+releases.</div><div class='add'>+</div><div class='add'>+Drivers that use firmware from linux-firmware should follow the rules in</div><div class='add'>+this guide. (Where there is limited control of the firmware,</div><div class='add'>+i.e. company doesn't support Linux, firmwares sourced from misc places,</div><div class='add'>+then of course these rules will not apply strictly.)</div><div class='add'>+</div><div class='add'>+* Firmware files shall be designed in a way that it allows checking for</div><div class='add'>+  firmware ABI version changes. It is recommended that firmware files be</div><div class='add'>+  versioned with at least a major/minor version. It is suggested that</div><div class='add'>+  the firmware files in linux-firmware be named with some device</div><div class='add'>+  specific name, and just the major version. The firmware version should</div><div class='add'>+  be stored in the firmware header, or as an exception, as part of the</div><div class='add'>+  firmware file name, in order to let the driver detact any non-ABI</div><div class='add'>+  fixes/changes. The firmware files in linux-firmware should be</div><div class='add'>+  overwritten with the newest compatible major version. Newer major</div><div class='add'>+  version firmware shall remain compatible with all kernels that load</div><div class='add'>+  that major number.</div><div class='add'>+</div><div class='add'>+* If the kernel support for the hardware is normally inactive, or the</div><div class='add'>+  hardware isn't available for public consumption, this can</div><div class='add'>+  be ignored, until the first kernel release that enables that hardware.</div><div class='add'>+  This means no major version bumps without the kernel retaining</div><div class='add'>+  backwards compatibility for the older major versions.  Minor version</div><div class='add'>+  bumps should not introduce new features that newer kernels depend on</div><div class='add'>+  non-optionally.</div><div class='add'>+</div><div class='add'>+* If a security fix needs lockstep firmware and kernel fixes in order to</div><div class='add'>+  be successful, then all supported major versions in the linux-firmware</div><div class='add'>+  repo that are required by currently supported stable/LTS kernels,</div><div class='add'>+  should be updated with the security fix. The kernel patches should</div><div class='add'>+  detect if the firmware is new enough to declare if the security issue</div><div class='add'>+  is fixed.  All communications around security fixes should point at</div><div class='add'>+  both the firmware and kernel fixes. If a security fix requires</div><div class='add'>+  deprecating old major versions, then this should only be done as a</div><div class='add'>+  last option, and be stated clearly in all communications.</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/driver-api/firmware/fw_search_path.rst b/Documentation/driver-api/firmware/fw_search_path.rst<br/>index a360f1009fa3..d7cb1e8f0076 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/fw_search_path.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/firmware/fw_search_path.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/fw_search_path.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/firmware/fw_search_path.rst</a></div><div class='hunk'>@@ -22,5 +22,10 @@ can use the file:</div><div class='ctx'> </div><div class='ctx'> * /sys/module/firmware_class/parameters/path</div><div class='ctx'> </div><div class='del'>-You would echo into it your custom path and firmware requested will be</div><div class='del'>-searched for there first.</div><div class='add'>+You would echo into it your custom path and firmware requested will be searched</div><div class='add'>+for there first. Be aware that newline characters will be taken into account</div><div class='add'>+and may not produce the intended effects. For instance you might want to use:</div><div class='add'>+</div><div class='add'>+echo -n /path/to/script &gt; /sys/module/firmware_class/parameters/path</div><div class='add'>+</div><div class='add'>+to ensure that your script is being used.</div><div class='head'>diff --git a/Documentation/driver-api/firmware/fw_upload.rst b/Documentation/driver-api/firmware/fw_upload.rst<br/>new file mode 100644<br/>index 000000000000..edf1d0c5e7c3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/fw_upload.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/firmware/fw_upload.rst</a></div><div class='hunk'>@@ -0,0 +1,127 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===================</div><div class='add'>+Firmware Upload API</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+A device driver that registers with the firmware loader will expose</div><div class='add'>+persistent sysfs nodes to enable users to initiate firmware updates for</div><div class='add'>+that device.  It is the responsibility of the device driver and/or the</div><div class='add'>+device itself to perform any validation on the data received. Firmware</div><div class='add'>+upload uses the same *loading* and *data* sysfs files described in the</div><div class='add'>+documentation for firmware fallback. It also adds additional sysfs files</div><div class='add'>+to provide status on the transfer of the firmware image to the device.</div><div class='add'>+</div><div class='add'>+Register for firmware upload</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+A device driver registers for firmware upload by calling</div><div class='add'>+firmware_upload_register(). Among the parameter list is a name to</div><div class='add'>+identify the device under /sys/class/firmware. A user may initiate a</div><div class='add'>+firmware upload by echoing a 1 to the *loading* sysfs file for the target</div><div class='add'>+device. Next, the user writes the firmware image to the *data* sysfs</div><div class='add'>+file. After writing the firmware data, the user echos 0 to the *loading*</div><div class='add'>+sysfs file to signal completion. Echoing 0 to *loading* also triggers the</div><div class='add'>+transfer of the firmware to the lower-lever device driver in the context</div><div class='add'>+of a kernel worker thread.</div><div class='add'>+</div><div class='add'>+To use the firmware upload API, write a driver that implements a set of</div><div class='add'>+ops.  The probe function calls firmware_upload_register() and the remove</div><div class='add'>+function calls firmware_upload_unregister() such as::</div><div class='add'>+</div><div class='add'>+	static const struct fw_upload_ops m10bmc_ops = {</div><div class='add'>+		.prepare = m10bmc_sec_prepare,</div><div class='add'>+		.write = m10bmc_sec_write,</div><div class='add'>+		.poll_complete = m10bmc_sec_poll_complete,</div><div class='add'>+		.cancel = m10bmc_sec_cancel,</div><div class='add'>+		.cleanup = m10bmc_sec_cleanup,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static int m10bmc_sec_probe(struct platform_device *pdev)</div><div class='add'>+	{</div><div class='add'>+		const char *fw_name, *truncate;</div><div class='add'>+		struct m10bmc_sec *sec;</div><div class='add'>+		struct fw_upload *fwl;</div><div class='add'>+		unsigned int len;</div><div class='add'>+</div><div class='add'>+		sec = devm_kzalloc(&amp;pdev-&gt;dev, sizeof(*sec), GFP_KERNEL);</div><div class='add'>+		if (!sec)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		sec-&gt;dev = &amp;pdev-&gt;dev;</div><div class='add'>+		sec-&gt;m10bmc = dev_get_drvdata(pdev-&gt;dev.parent);</div><div class='add'>+		dev_set_drvdata(&amp;pdev-&gt;dev, sec);</div><div class='add'>+</div><div class='add'>+		fw_name = dev_name(sec-&gt;dev);</div><div class='add'>+		truncate = strstr(fw_name, ".auto");</div><div class='add'>+		len = (truncate) ? truncate - fw_name : strlen(fw_name);</div><div class='add'>+		sec-&gt;fw_name = kmemdup_nul(fw_name, len, GFP_KERNEL);</div><div class='add'>+</div><div class='add'>+		fwl = firmware_upload_register(THIS_MODULE, sec-&gt;dev, sec-&gt;fw_name,</div><div class='add'>+					       &amp;m10bmc_ops, sec);</div><div class='add'>+		if (IS_ERR(fwl)) {</div><div class='add'>+			dev_err(sec-&gt;dev, "Firmware Upload driver failed to start\n");</div><div class='add'>+			kfree(sec-&gt;fw_name);</div><div class='add'>+			return PTR_ERR(fwl);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		sec-&gt;fwl = fwl;</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	static int m10bmc_sec_remove(struct platform_device *pdev)</div><div class='add'>+	{</div><div class='add'>+		struct m10bmc_sec *sec = dev_get_drvdata(&amp;pdev-&gt;dev);</div><div class='add'>+</div><div class='add'>+		firmware_upload_unregister(sec-&gt;fwl);</div><div class='add'>+		kfree(sec-&gt;fw_name);</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+firmware_upload_register</div><div class='add'>+------------------------</div><div class='add'>+.. kernel-doc:: drivers/base/firmware_loader/sysfs_upload.c</div><div class='add'>+   :identifiers: firmware_upload_register</div><div class='add'>+</div><div class='add'>+firmware_upload_unregister</div><div class='add'>+--------------------------</div><div class='add'>+.. kernel-doc:: drivers/base/firmware_loader/sysfs_upload.c</div><div class='add'>+   :identifiers: firmware_upload_unregister</div><div class='add'>+</div><div class='add'>+Firmware Upload Ops</div><div class='add'>+-------------------</div><div class='add'>+.. kernel-doc:: include/linux/firmware.h</div><div class='add'>+   :identifiers: fw_upload_ops</div><div class='add'>+</div><div class='add'>+Firmware Upload Progress Codes</div><div class='add'>+------------------------------</div><div class='add'>+The following progress codes are used internally by the firmware loader.</div><div class='add'>+Corresponding strings are reported through the status sysfs node that</div><div class='add'>+is described below and are documented in the ABI documentation.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/base/firmware_loader/sysfs_upload.h</div><div class='add'>+   :identifiers: fw_upload_prog</div><div class='add'>+</div><div class='add'>+Firmware Upload Error Codes</div><div class='add'>+---------------------------</div><div class='add'>+The following error codes may be returned by the driver ops in case of</div><div class='add'>+failure:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/firmware.h</div><div class='add'>+   :identifiers: fw_upload_err</div><div class='add'>+</div><div class='add'>+Sysfs Attributes</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+In addition to the *loading* and *data* sysfs files, there are additional</div><div class='add'>+sysfs files to monitor the status of the data transfer to the target</div><div class='add'>+device and to determine the final pass/fail status of the transfer.</div><div class='add'>+Depending on the device and the size of the firmware image, a firmware</div><div class='add'>+update could take milliseconds or minutes.</div><div class='add'>+</div><div class='add'>+The additional sysfs files are:</div><div class='add'>+</div><div class='add'>+* status - provides an indication of the progress of a firmware update</div><div class='add'>+* error - provides error information for a failed firmware update</div><div class='add'>+* remaining_size - tracks the data transfer portion of an update</div><div class='add'>+* cancel - echo 1 to this file to cancel the update</div><div class='head'>diff --git a/Documentation/driver-api/firmware/index.rst b/Documentation/driver-api/firmware/index.rst<br/>index 57415d657173..9d2c19dc8e36 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/firmware/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/firmware/index.rst</a></div><div class='hunk'>@@ -8,6 +8,7 @@ Linux Firmware API</div><div class='ctx'>    core</div><div class='ctx'>    efi/index</div><div class='ctx'>    request_firmware</div><div class='add'>+   fw_upload</div><div class='ctx'>    other_interfaces</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='head'>diff --git a/Documentation/driver-api/firmware/other_interfaces.rst b/Documentation/driver-api/firmware/other_interfaces.rst<br/>index b81794e0cfbb..06ac89adaafb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/other_interfaces.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/firmware/other_interfaces.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/firmware/other_interfaces.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/firmware/other_interfaces.rst</a></div><div class='hunk'>@@ -13,6 +13,12 @@ EDD Interfaces</div><div class='ctx'> .. kernel-doc:: drivers/firmware/edd.c</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='add'>+Generic System Framebuffers Interface</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/firmware/sysfb.c</div><div class='add'>+   :export:</div><div class='add'>+</div><div class='ctx'> Intel Stratix10 SoC Service Layer</div><div class='ctx'> ---------------------------------</div><div class='ctx'> Some features of the Intel Stratix10 SoC require a level of privilege</div><div class='head'>diff --git a/Documentation/driver-api/fpga/fpga-mgr.rst b/Documentation/driver-api/fpga/fpga-mgr.rst<br/>index 42c01f396dce..49c0a9512653 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/fpga/fpga-mgr.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/fpga/fpga-mgr.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/fpga/fpga-mgr.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/fpga/fpga-mgr.rst</a></div><div class='hunk'>@@ -79,12 +79,27 @@ do the programming sequence for this particular FPGA.  These ops return 0 for</div><div class='ctx'> success or negative error codes otherwise.</div><div class='ctx'> </div><div class='ctx'> The programming sequence is::</div><div class='del'>- 1. .write_init</div><div class='del'>- 2. .write or .write_sg (may be called once or multiple times)</div><div class='del'>- 3. .write_complete</div><div class='del'>-</div><div class='del'>-The .write_init function will prepare the FPGA to receive the image data.  The</div><div class='del'>-buffer passed into .write_init will be at most .initial_header_size bytes long;</div><div class='add'>+ 1. .parse_header (optional, may be called once or multiple times)</div><div class='add'>+ 2. .write_init</div><div class='add'>+ 3. .write or .write_sg (may be called once or multiple times)</div><div class='add'>+ 4. .write_complete</div><div class='add'>+</div><div class='add'>+The .parse_header function will set header_size and data_size to</div><div class='add'>+struct fpga_image_info. Before parse_header call, header_size is initialized</div><div class='add'>+with initial_header_size. If flag skip_header of fpga_manager_ops is true,</div><div class='add'>+.write function will get image buffer starting at header_size offset from the</div><div class='add'>+beginning. If data_size is set, .write function will get data_size bytes of</div><div class='add'>+the image buffer, otherwise .write will get data up to the end of image buffer.</div><div class='add'>+This will not affect .write_sg, .write_sg will still get whole image in</div><div class='add'>+sg_table form. If FPGA image is already mapped as a single contiguous buffer,</div><div class='add'>+whole buffer will be passed into .parse_header. If image is in scatter-gather</div><div class='add'>+form, core code will buffer up at least .initial_header_size before the first</div><div class='add'>+call of .parse_header, if it is not enough, .parse_header should set desired</div><div class='add'>+size into info-&gt;header_size and return -EAGAIN, then it will be called again</div><div class='add'>+with greater part of image buffer on the input.</div><div class='add'>+</div><div class='add'>+The .write_init function will prepare the FPGA to receive the image data. The</div><div class='add'>+buffer passed into .write_init will be at least info-&gt;header_size bytes long;</div><div class='ctx'> if the whole bitstream is not immediately available then the core code will</div><div class='ctx'> buffer up at least this much before starting.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/gpio/board.rst b/Documentation/driver-api/gpio/board.rst<br/>index 4e3adf31c8d1..b33aa04f213f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/board.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/gpio/board.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/board.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/gpio/board.rst</a></div><div class='hunk'>@@ -6,7 +6,7 @@ This document explains how GPIOs can be assigned to given devices and functions.</div><div class='ctx'> </div><div class='ctx'> Note that it only applies to the new descriptor-based interface. For a</div><div class='ctx'> description of the deprecated integer-based GPIO interface please refer to</div><div class='del'>-gpio-legacy.txt (actually, there is no real mapping possible with the old</div><div class='add'>+legacy.rst (actually, there is no real mapping possible with the old</div><div class='ctx'> interface; you just fetch an integer from somewhere and request the</div><div class='ctx'> corresponding GPIO).</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/gpio/consumer.rst b/Documentation/driver-api/gpio/consumer.rst<br/>index 47869ca8ccf0..de6fc79ad6f0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/consumer.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/gpio/consumer.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/consumer.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/gpio/consumer.rst</a></div><div class='hunk'>@@ -4,7 +4,7 @@ GPIO Descriptor Consumer Interface</div><div class='ctx'> </div><div class='ctx'> This document describes the consumer interface of the GPIO framework. Note that</div><div class='ctx'> it describes the new descriptor-based interface. For a description of the</div><div class='del'>-deprecated integer-based GPIO interface please refer to gpio-legacy.txt.</div><div class='add'>+deprecated integer-based GPIO interface please refer to legacy.rst.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Guidelines for GPIOs consumers</div><div class='hunk'>@@ -78,7 +78,7 @@ whether the line is configured active high or active low (see</div><div class='ctx'> </div><div class='ctx'> The two last flags are used for use cases where open drain is mandatory, such</div><div class='ctx'> as I2C: if the line is not already configured as open drain in the mappings</div><div class='del'>-(see board.txt), then open drain will be enforced anyway and a warning will be</div><div class='add'>+(see board.rst), then open drain will be enforced anyway and a warning will be</div><div class='ctx'> printed that the board configuration needs to be updated to match the use case.</div><div class='ctx'> </div><div class='ctx'> Both functions return either a valid GPIO descriptor, or an error code checkable</div><div class='hunk'>@@ -114,7 +114,7 @@ For a function using multiple GPIOs all of those can be obtained with one call::</div><div class='ctx'> </div><div class='ctx'> This function returns a struct gpio_descs which contains an array of</div><div class='ctx'> descriptors.  It also contains a pointer to a gpiolib private structure which,</div><div class='del'>-if passed back to get/set array functions, may speed up I/O proocessing::</div><div class='add'>+if passed back to get/set array functions, may speed up I/O processing::</div><div class='ctx'> </div><div class='ctx'> 	struct gpio_descs {</div><div class='ctx'> 		struct gpio_array *info;</div><div class='hunk'>@@ -270,7 +270,7 @@ driven.</div><div class='ctx'> The same is applicable for open drain or open source output lines: those do not</div><div class='ctx'> actively drive their output high (open drain) or low (open source), they just</div><div class='ctx'> switch their output to a high impedance value. The consumer should not need to</div><div class='del'>-care. (For details read about open drain in driver.txt.)</div><div class='add'>+care. (For details read about open drain in driver.rst.)</div><div class='ctx'> </div><div class='ctx'> With this, all the gpiod_set_(array)_value_xxx() functions interpret the</div><div class='ctx'> parameter "value" as "asserted" ("1") or "de-asserted" ("0"). The physical line</div><div class='head'>diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/driver-api/gpio/driver.rst<br/>index bbc53920d4dd..bf6319cc531b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/driver.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/gpio/driver.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/driver.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/gpio/driver.rst</a></div><div class='hunk'>@@ -119,7 +119,7 @@ GPIO lines with debounce support</div><div class='ctx'> Debouncing is a configuration set to a pin indicating that it is connected to</div><div class='ctx'> a mechanical switch or button, or similar that may bounce. Bouncing means the</div><div class='ctx'> line is pulled high/low quickly at very short intervals for mechanical</div><div class='del'>-reasons. This can result in the value being unstable or irqs fireing repeatedly</div><div class='add'>+reasons. This can result in the value being unstable or irqs firing repeatedly</div><div class='ctx'> unless the line is debounced.</div><div class='ctx'> </div><div class='ctx'> Debouncing in practice involves setting up a timer when something happens on</div><div class='hunk'>@@ -218,10 +218,10 @@ not support open drain/open source in hardware, the GPIO library will instead</div><div class='ctx'> use a trick: when a line is set as output, if the line is flagged as open</div><div class='ctx'> drain, and the IN output value is low, it will be driven low as usual. But</div><div class='ctx'> if the IN output value is set to high, it will instead *NOT* be driven high,</div><div class='del'>-instead it will be switched to input, as input mode is high impedance, thus</div><div class='del'>-achieveing an "open drain emulation" of sorts: electrically the behaviour will</div><div class='del'>-be identical, with the exception of possible hardware glitches when switching</div><div class='del'>-the mode of the line.</div><div class='add'>+instead it will be switched to input, as input mode is an equivalent to</div><div class='add'>+high impedance, thus achieving an "open drain emulation" of sorts: electrically</div><div class='add'>+the behaviour will be identical, with the exception of possible hardware glitches</div><div class='add'>+when switching the mode of the line.</div><div class='ctx'> </div><div class='ctx'> For open source configuration the same principle is used, just that instead</div><div class='ctx'> of actively driving the line low, it is set to input.</div><div class='hunk'>@@ -417,30 +417,68 @@ struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip.</div><div class='ctx'> If you do this, the additional irq_chip will be set up by gpiolib at the</div><div class='ctx'> same time as setting up the rest of the GPIO functionality. The following</div><div class='ctx'> is a typical example of a chained cascaded interrupt handler using</div><div class='del'>-the gpio_irq_chip:</div><div class='add'>+the gpio_irq_chip. Note how the mask/unmask (or disable/enable) functions</div><div class='add'>+call into the core gpiolib code:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='del'>-  /* Typical state container with dynamic irqchip */</div><div class='add'>+  /* Typical state container */</div><div class='ctx'>   struct my_gpio {</div><div class='ctx'>       struct gpio_chip gc;</div><div class='del'>-      struct irq_chip irq;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  static void my_gpio_mask_irq(struct irq_data *d)</div><div class='add'>+  {</div><div class='add'>+      struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+      irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+      /*</div><div class='add'>+       * Perform any necessary action to mask the interrupt,</div><div class='add'>+       * and then call into the core code to synchronise the</div><div class='add'>+       * state.</div><div class='add'>+       */</div><div class='add'>+</div><div class='add'>+      gpiochip_disable_irq(gc, hwirq);</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  static void my_gpio_unmask_irq(struct irq_data *d)</div><div class='add'>+  {</div><div class='add'>+      struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+      irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+      gpiochip_enable_irq(gc, hwirq);</div><div class='add'>+</div><div class='add'>+      /*</div><div class='add'>+       * Perform any necessary action to unmask the interrupt,</div><div class='add'>+       * after having called into the core code to synchronise</div><div class='add'>+       * the state.</div><div class='add'>+       */</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  /*</div><div class='add'>+   * Statically populate the irqchip. Note that it is made const</div><div class='add'>+   * (further indicated by the IRQCHIP_IMMUTABLE flag), and that</div><div class='add'>+   * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra</div><div class='add'>+   * callbacks to the structure.</div><div class='add'>+   */</div><div class='add'>+  static const struct irq_chip my_gpio_irq_chip = {</div><div class='add'>+      .name		= "my_gpio_irq",</div><div class='add'>+      .irq_ack		= my_gpio_ack_irq,</div><div class='add'>+      .irq_mask		= my_gpio_mask_irq,</div><div class='add'>+      .irq_unmask	= my_gpio_unmask_irq,</div><div class='add'>+      .irq_set_type	= my_gpio_set_irq_type,</div><div class='add'>+      .flags		= IRQCHIP_IMMUTABLE,</div><div class='add'>+      /* Provide the gpio resource callbacks */</div><div class='add'>+      GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'>   };</div><div class='ctx'> </div><div class='ctx'>   int irq; /* from platform etc */</div><div class='ctx'>   struct my_gpio *g;</div><div class='ctx'>   struct gpio_irq_chip *girq;</div><div class='ctx'> </div><div class='del'>-  /* Set up the irqchip dynamically */</div><div class='del'>-  g-&gt;irq.name = "my_gpio_irq";</div><div class='del'>-  g-&gt;irq.irq_ack = my_gpio_ack_irq;</div><div class='del'>-  g-&gt;irq.irq_mask = my_gpio_mask_irq;</div><div class='del'>-  g-&gt;irq.irq_unmask = my_gpio_unmask_irq;</div><div class='del'>-  g-&gt;irq.irq_set_type = my_gpio_set_irq_type;</div><div class='del'>-</div><div class='ctx'>   /* Get a pointer to the gpio_irq_chip */</div><div class='ctx'>   girq = &amp;g-&gt;gc.irq;</div><div class='del'>-  girq-&gt;chip = &amp;g-&gt;irq;</div><div class='add'>+  gpio_irq_chip_set_chip(girq, &amp;my_gpio_irq_chip);</div><div class='ctx'>   girq-&gt;parent_handler = ftgpio_gpio_irq_handler;</div><div class='ctx'>   girq-&gt;num_parents = 1;</div><div class='ctx'>   girq-&gt;parents = devm_kcalloc(dev, 1, sizeof(*girq-&gt;parents),</div><div class='hunk'>@@ -458,23 +496,60 @@ the interrupt separately and go with it:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='del'>-  /* Typical state container with dynamic irqchip */</div><div class='add'>+  /* Typical state container */</div><div class='ctx'>   struct my_gpio {</div><div class='ctx'>       struct gpio_chip gc;</div><div class='del'>-      struct irq_chip irq;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  static void my_gpio_mask_irq(struct irq_data *d)</div><div class='add'>+  {</div><div class='add'>+      struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+      irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+      /*</div><div class='add'>+       * Perform any necessary action to mask the interrupt,</div><div class='add'>+       * and then call into the core code to synchronise the</div><div class='add'>+       * state.</div><div class='add'>+       */</div><div class='add'>+</div><div class='add'>+      gpiochip_disable_irq(gc, hwirq);</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  static void my_gpio_unmask_irq(struct irq_data *d)</div><div class='add'>+  {</div><div class='add'>+      struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+      irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+      gpiochip_enable_irq(gc, hwirq);</div><div class='add'>+</div><div class='add'>+      /*</div><div class='add'>+       * Perform any necessary action to unmask the interrupt,</div><div class='add'>+       * after having called into the core code to synchronise</div><div class='add'>+       * the state.</div><div class='add'>+       */</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  /*</div><div class='add'>+   * Statically populate the irqchip. Note that it is made const</div><div class='add'>+   * (further indicated by the IRQCHIP_IMMUTABLE flag), and that</div><div class='add'>+   * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra</div><div class='add'>+   * callbacks to the structure.</div><div class='add'>+   */</div><div class='add'>+  static const struct irq_chip my_gpio_irq_chip = {</div><div class='add'>+      .name		= "my_gpio_irq",</div><div class='add'>+      .irq_ack		= my_gpio_ack_irq,</div><div class='add'>+      .irq_mask		= my_gpio_mask_irq,</div><div class='add'>+      .irq_unmask	= my_gpio_unmask_irq,</div><div class='add'>+      .irq_set_type	= my_gpio_set_irq_type,</div><div class='add'>+      .flags		= IRQCHIP_IMMUTABLE,</div><div class='add'>+      /* Provide the gpio resource callbacks */</div><div class='add'>+      GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='ctx'>   };</div><div class='ctx'> </div><div class='ctx'>   int irq; /* from platform etc */</div><div class='ctx'>   struct my_gpio *g;</div><div class='ctx'>   struct gpio_irq_chip *girq;</div><div class='ctx'> </div><div class='del'>-  /* Set up the irqchip dynamically */</div><div class='del'>-  g-&gt;irq.name = "my_gpio_irq";</div><div class='del'>-  g-&gt;irq.irq_ack = my_gpio_ack_irq;</div><div class='del'>-  g-&gt;irq.irq_mask = my_gpio_mask_irq;</div><div class='del'>-  g-&gt;irq.irq_unmask = my_gpio_unmask_irq;</div><div class='del'>-  g-&gt;irq.irq_set_type = my_gpio_set_irq_type;</div><div class='del'>-</div><div class='ctx'>   ret = devm_request_threaded_irq(dev, irq, NULL,</div><div class='ctx'> 		irq_thread_fn, IRQF_ONESHOT, "my-chip", g);</div><div class='ctx'>   if (ret &lt; 0)</div><div class='hunk'>@@ -482,7 +557,7 @@ the interrupt separately and go with it:</div><div class='ctx'> </div><div class='ctx'>   /* Get a pointer to the gpio_irq_chip */</div><div class='ctx'>   girq = &amp;g-&gt;gc.irq;</div><div class='del'>-  girq-&gt;chip = &amp;g-&gt;irq;</div><div class='add'>+  gpio_irq_chip_set_chip(girq, &amp;my_gpio_irq_chip);</div><div class='ctx'>   /* This will let us handle the parent IRQ in the driver */</div><div class='ctx'>   girq-&gt;parent_handler = NULL;</div><div class='ctx'>   girq-&gt;num_parents = 0;</div><div class='hunk'>@@ -500,24 +575,63 @@ In this case the typical set-up will look like this:</div><div class='ctx'>   /* Typical state container with dynamic irqchip */</div><div class='ctx'>   struct my_gpio {</div><div class='ctx'>       struct gpio_chip gc;</div><div class='del'>-      struct irq_chip irq;</div><div class='ctx'>       struct fwnode_handle *fwnode;</div><div class='ctx'>   };</div><div class='ctx'> </div><div class='del'>-  int irq; /* from platform etc */</div><div class='add'>+  static void my_gpio_mask_irq(struct irq_data *d)</div><div class='add'>+  {</div><div class='add'>+      struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+      irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+      /*</div><div class='add'>+       * Perform any necessary action to mask the interrupt,</div><div class='add'>+       * and then call into the core code to synchronise the</div><div class='add'>+       * state.</div><div class='add'>+       */</div><div class='add'>+</div><div class='add'>+      gpiochip_disable_irq(gc, hwirq);</div><div class='add'>+      irq_mask_mask_parent(d);</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  static void my_gpio_unmask_irq(struct irq_data *d)</div><div class='add'>+  {</div><div class='add'>+      struct gpio_chip *gc = irq_data_get_irq_chip_data(d);</div><div class='add'>+      irq_hw_number_t hwirq = irqd_to_hwirq(d);</div><div class='add'>+</div><div class='add'>+      gpiochip_enable_irq(gc, hwirq);</div><div class='add'>+</div><div class='add'>+      /*</div><div class='add'>+       * Perform any necessary action to unmask the interrupt,</div><div class='add'>+       * after having called into the core code to synchronise</div><div class='add'>+       * the state.</div><div class='add'>+       */</div><div class='add'>+</div><div class='add'>+      irq_mask_unmask_parent(d);</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  /*</div><div class='add'>+   * Statically populate the irqchip. Note that it is made const</div><div class='add'>+   * (further indicated by the IRQCHIP_IMMUTABLE flag), and that</div><div class='add'>+   * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra</div><div class='add'>+   * callbacks to the structure.</div><div class='add'>+   */</div><div class='add'>+  static const struct irq_chip my_gpio_irq_chip = {</div><div class='add'>+      .name		= "my_gpio_irq",</div><div class='add'>+      .irq_ack		= my_gpio_ack_irq,</div><div class='add'>+      .irq_mask		= my_gpio_mask_irq,</div><div class='add'>+      .irq_unmask	= my_gpio_unmask_irq,</div><div class='add'>+      .irq_set_type	= my_gpio_set_irq_type,</div><div class='add'>+      .flags		= IRQCHIP_IMMUTABLE,</div><div class='add'>+      /* Provide the gpio resource callbacks */</div><div class='add'>+      GPIOCHIP_IRQ_RESOURCE_HELPERS,</div><div class='add'>+  };</div><div class='add'>+</div><div class='ctx'>   struct my_gpio *g;</div><div class='ctx'>   struct gpio_irq_chip *girq;</div><div class='ctx'> </div><div class='del'>-  /* Set up the irqchip dynamically */</div><div class='del'>-  g-&gt;irq.name = "my_gpio_irq";</div><div class='del'>-  g-&gt;irq.irq_ack = my_gpio_ack_irq;</div><div class='del'>-  g-&gt;irq.irq_mask = my_gpio_mask_irq;</div><div class='del'>-  g-&gt;irq.irq_unmask = my_gpio_unmask_irq;</div><div class='del'>-  g-&gt;irq.irq_set_type = my_gpio_set_irq_type;</div><div class='del'>-</div><div class='ctx'>   /* Get a pointer to the gpio_irq_chip */</div><div class='ctx'>   girq = &amp;g-&gt;gc.irq;</div><div class='del'>-  girq-&gt;chip = &amp;g-&gt;irq;</div><div class='add'>+  gpio_irq_chip_set_chip(girq, &amp;my_gpio_irq_chip);</div><div class='ctx'>   girq-&gt;default_type = IRQ_TYPE_NONE;</div><div class='ctx'>   girq-&gt;handler = handle_bad_irq;</div><div class='ctx'>   girq-&gt;fwnode = g-&gt;fwnode;</div><div class='hunk'>@@ -528,7 +642,7 @@ In this case the typical set-up will look like this:</div><div class='ctx'> </div><div class='ctx'> As you can see pretty similar, but you do not supply a parent handler for</div><div class='ctx'> the IRQ, instead a parent irqdomain, an fwnode for the hardware and</div><div class='del'>-a funcion .child_to_parent_hwirq() that has the purpose of looking up</div><div class='add'>+a function .child_to_parent_hwirq() that has the purpose of looking up</div><div class='ctx'> the parent hardware irq from a child (i.e. this gpio chip) hardware irq.</div><div class='ctx'> As always it is good to look at examples in the kernel tree for advice</div><div class='ctx'> on how to find the required pieces.</div><div class='hunk'>@@ -605,8 +719,9 @@ When implementing an irqchip inside a GPIO driver, these two functions should</div><div class='ctx'> typically be called in the .irq_disable() and .irq_enable() callbacks from the</div><div class='ctx'> irqchip.</div><div class='ctx'> </div><div class='del'>-When using the gpiolib irqchip helpers, these callbacks are automatically</div><div class='del'>-assigned.</div><div class='add'>+When IRQCHIP_IMMUTABLE is not advertised by the irqchip, these callbacks</div><div class='add'>+are automatically assigned. This behaviour is deprecated and on its way</div><div class='add'>+to be removed from the kernel.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Real-Time compliance for GPIO IRQ chips</div><div class='head'>diff --git a/Documentation/driver-api/gpio/intro.rst b/Documentation/driver-api/gpio/intro.rst<br/>index 2e924fb5b3d5..c9c19243b97f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/intro.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/gpio/intro.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/intro.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/gpio/intro.rst</a></div><div class='hunk'>@@ -14,12 +14,12 @@ Due to the history of GPIO interfaces in the kernel, there are two different</div><div class='ctx'> ways to obtain and use GPIOs:</div><div class='ctx'> </div><div class='ctx'>   - The descriptor-based interface is the preferred way to manipulate GPIOs,</div><div class='del'>-    and is described by all the files in this directory excepted gpio-legacy.txt.</div><div class='add'>+    and is described by all the files in this directory excepted legacy.rst.</div><div class='ctx'>   - The legacy integer-based interface which is considered deprecated (but still</div><div class='del'>-    usable for compatibility reasons) is documented in gpio-legacy.txt.</div><div class='add'>+    usable for compatibility reasons) is documented in legacy.rst.</div><div class='ctx'> </div><div class='ctx'> The remainder of this document applies to the new descriptor-based interface.</div><div class='del'>-gpio-legacy.txt contains the same information applied to the legacy</div><div class='add'>+legacy.rst contains the same information applied to the legacy</div><div class='ctx'> integer-based interface.</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/gpio/legacy.rst b/Documentation/driver-api/gpio/legacy.rst<br/>index 9b12eeb89170..78372853c6d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/legacy.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/gpio/legacy.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/legacy.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/gpio/legacy.rst</a></div><div class='hunk'>@@ -238,8 +238,6 @@ setup or driver probe/teardown code, so this is an easy constraint.)::</div><div class='ctx'>         ## 	gpio_free_array()</div><div class='ctx'> </div><div class='ctx'>                 gpio_free()</div><div class='del'>-                gpio_set_debounce()</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Claiming and Releasing GPIOs</div><div class='hunk'>@@ -387,9 +385,6 @@ map between them using calls like::</div><div class='ctx'> 	/* map GPIO numbers to IRQ numbers */</div><div class='ctx'> 	int gpio_to_irq(unsigned gpio);</div><div class='ctx'> </div><div class='del'>-	/* map IRQ numbers to GPIO numbers (avoid using this) */</div><div class='del'>-	int irq_to_gpio(unsigned irq);</div><div class='del'>-</div><div class='ctx'> Those return either the corresponding number in the other namespace, or</div><div class='ctx'> else a negative errno code if the mapping can't be done.  (For example,</div><div class='ctx'> some GPIOs can't be used as IRQs.)  It is an unchecked error to use a GPIO</div><div class='hunk'>@@ -405,11 +400,6 @@ devices, by the board-specific initialization code.  Note that IRQ trigger</div><div class='ctx'> options are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are</div><div class='ctx'> system wakeup capabilities.</div><div class='ctx'> </div><div class='del'>-Non-error values returned from irq_to_gpio() would most commonly be used</div><div class='del'>-with gpio_get_value(), for example to initialize or update driver state</div><div class='del'>-when the IRQ is edge-triggered.  Note that some platforms don't support</div><div class='del'>-this reverse mapping, so you should avoid using it.</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> Emulating Open Drain Signals</div><div class='ctx'> ----------------------------</div><div class='hunk'>@@ -558,11 +548,6 @@ Platform Support</div><div class='ctx'> To force-enable this framework, a platform's Kconfig will "select" GPIOLIB,</div><div class='ctx'> else it is up to the user to configure support for GPIO.</div><div class='ctx'> </div><div class='del'>-It may also provide a custom value for ARCH_NR_GPIOS, so that it better</div><div class='del'>-reflects the number of GPIOs in actual use on that platform, without</div><div class='del'>-wasting static table space.  (It should count both built-in/SoC GPIOs and</div><div class='del'>-also ones on GPIO expanders.</div><div class='del'>-</div><div class='ctx'> If neither of these options are selected, the platform does not support</div><div class='ctx'> GPIOs through GPIO-lib and the code cannot be enabled by the user.</div><div class='ctx'> </div><div class='hunk'>@@ -729,36 +714,6 @@ gpiochip nodes (possibly in conjunction with schematics) to determine</div><div class='ctx'> the correct GPIO number to use for a given signal.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Exporting from Kernel code</div><div class='del'>---------------------------</div><div class='del'>-Kernel code can explicitly manage exports of GPIOs which have already been</div><div class='del'>-requested using gpio_request()::</div><div class='del'>-</div><div class='del'>-	/* export the GPIO to userspace */</div><div class='del'>-	int gpio_export(unsigned gpio, bool direction_may_change);</div><div class='del'>-</div><div class='del'>-	/* reverse gpio_export() */</div><div class='del'>-	void gpio_unexport();</div><div class='del'>-</div><div class='del'>-	/* create a sysfs link to an exported GPIO node */</div><div class='del'>-	int gpio_export_link(struct device *dev, const char *name,</div><div class='del'>-		unsigned gpio)</div><div class='del'>-</div><div class='del'>-After a kernel driver requests a GPIO, it may only be made available in</div><div class='del'>-the sysfs interface by gpio_export().  The driver can control whether the</div><div class='del'>-signal direction may change.  This helps drivers prevent userspace code</div><div class='del'>-from accidentally clobbering important system state.</div><div class='del'>-</div><div class='del'>-This explicit exporting can help with debugging (by making some kinds</div><div class='del'>-of experiments easier), or can provide an always-there interface that's</div><div class='del'>-suitable for documenting as part of a board support package.</div><div class='del'>-</div><div class='del'>-After the GPIO has been exported, gpio_export_link() allows creating</div><div class='del'>-symlinks from elsewhere in sysfs to the GPIO sysfs node.  Drivers can</div><div class='del'>-use this to provide the interface under their own device in sysfs with</div><div class='del'>-a descriptive name.</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> API Reference</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/gpio/using-gpio.rst b/Documentation/driver-api/gpio/using-gpio.rst<br/>index 64c8d3f76c3a..894d88855d73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/using-gpio.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/gpio/using-gpio.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/gpio/using-gpio.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/gpio/using-gpio.rst</a></div><div class='hunk'>@@ -44,7 +44,7 @@ These devices will appear on the system as ``/dev/gpiochip0`` thru</div><div class='ctx'> found in the kernel tree ``tools/gpio`` subdirectory.</div><div class='ctx'> </div><div class='ctx'> For structured and managed applications, we recommend that you make use of the</div><div class='del'>-libgpiod_ library. This provides helper abstractions, command line utlities</div><div class='add'>+libgpiod_ library. This provides helper abstractions, command line utilities</div><div class='ctx'> and arbitration for multiple simultaneous consumers on the same GPIO chip.</div><div class='ctx'> </div><div class='ctx'> .. _libgpiod: https://git.kernel.org/pub/scm/libs/libgpiod/libgpiod.git/</div><div class='head'>diff --git a/Documentation/driver-api/hsi.rst b/Documentation/driver-api/hsi.rst<br/>index f9cec02b72a1..01b6bebfbd1a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/hsi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/hsi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/hsi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/hsi.rst</a></div><div class='hunk'>@@ -4,7 +4,7 @@ High Speed Synchronous Serial Interface (HSI)</div><div class='ctx'> Introduction</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='del'>-High Speed Syncronous Interface (HSI) is a fullduplex, low latency protocol,</div><div class='add'>+High Speed Synchronous Interface (HSI) is a full duplex, low latency protocol,</div><div class='ctx'> that is optimized for die-level interconnect between an Application Processor</div><div class='ctx'> and a Baseband chipset. It has been specified by the MIPI alliance in 2003 and</div><div class='ctx'> implemented by multiple vendors since then.</div><div class='hunk'>@@ -52,7 +52,7 @@ hsi-char Device</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='ctx'> Each port automatically registers a generic client driver called hsi_char,</div><div class='del'>-which provides a charecter device for userspace representing the HSI port.</div><div class='add'>+which provides a character device for userspace representing the HSI port.</div><div class='ctx'> It can be used to communicate via HSI from userspace. Userspace may</div><div class='ctx'> configure the hsi_char device using the following ioctl commands:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/hte/hte.rst b/Documentation/driver-api/hte/hte.rst<br/>new file mode 100644<br/>index 000000000000..153f3233c100<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/hte/hte.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/hte/hte.rst</a></div><div class='hunk'>@@ -0,0 +1,79 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+============================================</div><div class='add'>+The Linux Hardware Timestamping Engine (HTE)</div><div class='add'>+============================================</div><div class='add'>+</div><div class='add'>+:Author: Dipen Patel</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Certain devices have built in hardware timestamping engines which can</div><div class='add'>+monitor sets of system signals, lines, buses etc... in realtime for state</div><div class='add'>+change; upon detecting the change they can automatically store the timestamp at</div><div class='add'>+the moment of occurrence. Such functionality may help achieve better accuracy</div><div class='add'>+in obtaining timestamps than using software counterparts i.e. ktime and</div><div class='add'>+friends.</div><div class='add'>+</div><div class='add'>+This document describes the API that can be used by hardware timestamping</div><div class='add'>+engine provider and consumer drivers that want to use the hardware timestamping</div><div class='add'>+engine (HTE) framework. Both consumers and providers must include</div><div class='add'>+``#include &lt;linux/hte.h&gt;``.</div><div class='add'>+</div><div class='add'>+The HTE framework APIs for the providers</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/hte/hte.c</div><div class='add'>+   :functions: devm_hte_register_chip hte_push_ts_ns</div><div class='add'>+</div><div class='add'>+The HTE framework APIs for the consumers</div><div class='add'>+----------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/hte/hte.c</div><div class='add'>+   :functions: hte_init_line_attr hte_ts_get hte_ts_put devm_hte_request_ts_ns hte_request_ts_ns hte_enable_ts hte_disable_ts of_hte_req_count hte_get_clk_src_info</div><div class='add'>+</div><div class='add'>+The HTE framework public structures</div><div class='add'>+-----------------------------------</div><div class='add'>+.. kernel-doc:: include/linux/hte.h</div><div class='add'>+</div><div class='add'>+More on the HTE timestamp data</div><div class='add'>+------------------------------</div><div class='add'>+The ``struct hte_ts_data`` is used to pass timestamp details between the</div><div class='add'>+consumers and the providers. It expresses timestamp data in nanoseconds in</div><div class='add'>+u64. An example of the typical timestamp data life cycle, for the GPIO line is</div><div class='add'>+as follows::</div><div class='add'>+</div><div class='add'>+ - Monitors GPIO line change.</div><div class='add'>+ - Detects the state change on GPIO line.</div><div class='add'>+ - Converts timestamps in nanoseconds.</div><div class='add'>+ - Stores GPIO raw level in raw_level variable if the provider has that</div><div class='add'>+ hardware capability.</div><div class='add'>+ - Pushes this hte_ts_data object to HTE subsystem.</div><div class='add'>+ - HTE subsystem increments seq counter and invokes consumer provided callback.</div><div class='add'>+ Based on callback return value, the HTE core invokes secondary callback in</div><div class='add'>+ the thread context.</div><div class='add'>+</div><div class='add'>+HTE subsystem debugfs attributes</div><div class='add'>+--------------------------------</div><div class='add'>+HTE subsystem creates debugfs attributes at ``/sys/kernel/debug/hte/``.</div><div class='add'>+It also creates line/signal-related debugfs attributes at</div><div class='add'>+``/sys/kernel/debug/hte/&lt;provider&gt;/&lt;label or line id&gt;/``. Note that these</div><div class='add'>+attributes are read-only.</div><div class='add'>+</div><div class='add'>+`ts_requested`</div><div class='add'>+		The total number of entities requested from the given provider,</div><div class='add'>+		where entity is specified by the provider and could represent</div><div class='add'>+		lines, GPIO, chip signals, buses etc...</div><div class='add'>+                The attribute will be available at</div><div class='add'>+		``/sys/kernel/debug/hte/&lt;provider&gt;/``.</div><div class='add'>+</div><div class='add'>+`total_ts`</div><div class='add'>+		The total number of entities supported by the provider.</div><div class='add'>+                The attribute will be available at</div><div class='add'>+		``/sys/kernel/debug/hte/&lt;provider&gt;/``.</div><div class='add'>+</div><div class='add'>+`dropped_timestamps`</div><div class='add'>+		The dropped timestamps for a given line.</div><div class='add'>+                The attribute will be available at</div><div class='add'>+		``/sys/kernel/debug/hte/&lt;provider&gt;/&lt;label or line id&gt;/``.</div><div class='head'>diff --git a/Documentation/driver-api/hte/index.rst b/Documentation/driver-api/hte/index.rst<br/>new file mode 100644<br/>index 000000000000..29011de9a4b8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/hte/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/hte/index.rst</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+============================================</div><div class='add'>+The Linux Hardware Timestamping Engine (HTE)</div><div class='add'>+============================================</div><div class='add'>+</div><div class='add'>+The HTE Subsystem</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   hte</div><div class='add'>+</div><div class='add'>+HTE Tegra Provider</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   tegra-hte</div><div class='add'>+</div><div class='head'>diff --git a/Documentation/driver-api/hte/tegra-hte.rst b/Documentation/driver-api/hte/tegra-hte.rst<br/>new file mode 100644<br/>index 000000000000..85e654772782<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/hte/tegra-hte.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/hte/tegra-hte.rst</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+HTE Kernel provider driver</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+The Nvidia tegra HTE provider also known as GTE (Generic Timestamping Engine)</div><div class='add'>+driver implements two GTE instances: 1) GPIO GTE and 2) LIC</div><div class='add'>+(Legacy Interrupt Controller) IRQ GTE. Both GTE instances get the timestamp</div><div class='add'>+from the system counter TSC which has 31.25MHz clock rate, and the driver</div><div class='add'>+converts clock tick rate to nanoseconds before storing it as timestamp value.</div><div class='add'>+</div><div class='add'>+GPIO GTE</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+This GTE instance timestamps GPIO in real time. For that to happen GPIO</div><div class='add'>+needs to be configured as input. Only the always on (AON) GPIO controller</div><div class='add'>+instance supports timestamping GPIOs in real time as it is tightly coupled with</div><div class='add'>+the GPIO GTE. To support this, GPIOLIB adds two optional APIs as mentioned</div><div class='add'>+below. The GPIO GTE code supports both kernel and userspace consumers. The</div><div class='add'>+kernel space consumers can directly talk to HTE subsystem while userspace</div><div class='add'>+consumers timestamp requests go through GPIOLIB CDEV framework to HTE</div><div class='add'>+subsystem. The hte devicetree binding described at</div><div class='add'>+``Documentation/devicetree/bindings/timestamp`` provides an example of how a</div><div class='add'>+consumer can request an GPIO line.</div><div class='add'>+</div><div class='add'>+See gpiod_enable_hw_timestamp_ns() and gpiod_disable_hw_timestamp_ns().</div><div class='add'>+</div><div class='add'>+For userspace consumers, GPIO_V2_LINE_FLAG_EVENT_CLOCK_HTE flag must be</div><div class='add'>+specified during IOCTL calls. Refer to ``tools/gpio/gpio-event-mon.c``, which</div><div class='add'>+returns the timestamp in nanoseconds.</div><div class='add'>+</div><div class='add'>+LIC (Legacy Interrupt Controller) IRQ GTE</div><div class='add'>+-----------------------------------------</div><div class='add'>+</div><div class='add'>+This GTE instance timestamps LIC IRQ lines in real time. The hte devicetree</div><div class='add'>+binding described at ``Documentation/devicetree/bindings/timestamp``</div><div class='add'>+provides an example of how a consumer can request an IRQ line. Since it is a</div><div class='add'>+one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ</div><div class='add'>+number that they are interested in. There is no userspace consumer support for</div><div class='add'>+this GTE instance in the HTE framework.</div><div class='add'>+</div><div class='add'>+The provider source code of both IRQ and GPIO GTE instances is located at</div><div class='add'>+``drivers/hte/hte-tegra194.c``. The test driver</div><div class='add'>+``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ</div><div class='add'>+and GPIO GTE.</div><div class='head'>diff --git a/Documentation/driver-api/index.rst b/Documentation/driver-api/index.rst<br/>index a7b0223e2886..ff9aa1afdc62 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/index.rst</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='del'>-========================================</div><div class='del'>-The Linux driver implementer's API guide</div><div class='del'>-========================================</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==============================</div><div class='add'>+Driver implementer's API guide</div><div class='add'>+==============================</div><div class='ctx'> </div><div class='ctx'> The kernel offers a wide variety of interfaces to support the development</div><div class='ctx'> of device drivers.  This document is an only somewhat organized collection</div><div class='hunk'>@@ -27,6 +29,7 @@ available subsections can be seen below.</div><div class='ctx'>    component</div><div class='ctx'>    message-based</div><div class='ctx'>    infiniband</div><div class='add'>+   aperture</div><div class='ctx'>    frame-buffer</div><div class='ctx'>    regulator</div><div class='ctx'>    reset</div><div class='hunk'>@@ -101,12 +104,15 @@ available subsections can be seen below.</div><div class='ctx'>    surface_aggregator/index</div><div class='ctx'>    switchtec</div><div class='ctx'>    sync_file</div><div class='add'>+   tty/index</div><div class='ctx'>    vfio-mediated-device</div><div class='ctx'>    vfio</div><div class='ctx'>    vfio-pci-device-specific-driver-acceptance</div><div class='add'>+   virtio/index</div><div class='ctx'>    xilinx/index</div><div class='ctx'>    xillybus</div><div class='ctx'>    zorro</div><div class='add'>+   hte/index</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/io-mapping.rst b/Documentation/driver-api/io-mapping.rst<br/>index a0cfb15988df..7274204b0435 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/io-mapping.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/io-mapping.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/io-mapping.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/io-mapping.rst</a></div><div class='hunk'>@@ -44,7 +44,7 @@ This _wc variant returns a write-combining map to the page and may only be</div><div class='ctx'> used with mappings created by io_mapping_create_wc()</div><div class='ctx'> </div><div class='ctx'> Temporary mappings are only valid in the context of the caller. The mapping</div><div class='del'>-is not guaranteed to be globaly visible.</div><div class='add'>+is not guaranteed to be globally visible.</div><div class='ctx'> </div><div class='ctx'> io_mapping_map_local_wc() has a side effect on X86 32bit as it disables</div><div class='ctx'> migration to make the mapping code work. No caller can rely on this side</div><div class='hunk'>@@ -78,7 +78,7 @@ variant, although this may be significantly slower::</div><div class='ctx'> 				unsigned long offset)</div><div class='ctx'> </div><div class='ctx'> This works like io_mapping_map_atomic/local_wc() except it has no side</div><div class='del'>-effects and the pointer is globaly visible.</div><div class='add'>+effects and the pointer is globally visible.</div><div class='ctx'> </div><div class='ctx'> The mappings are released with::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/isa.rst b/Documentation/driver-api/isa.rst<br/>index def4a7b690b5..3df1b1696524 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/isa.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/isa.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/isa.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/isa.rst</a></div><div class='hunk'>@@ -100,7 +100,7 @@ I believe platform_data is available for this, but if rather not, moving</div><div class='ctx'> the isa_driver pointer to the private struct isa_dev is ofcourse fine as</div><div class='ctx'> well.</div><div class='ctx'> </div><div class='del'>-Then, if the the driver did not provide a .match, it matches. If it did,</div><div class='add'>+Then, if the driver did not provide a .match, it matches. If it did,</div><div class='ctx'> the driver match() method is called to determine a match.</div><div class='ctx'> </div><div class='ctx'> If it did **not** match, dev-&gt;platform_data is reset to indicate this to</div><div class='head'>diff --git a/Documentation/driver-api/libata.rst b/Documentation/driver-api/libata.rst<br/>index d477e296bda5..311af516a3fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/libata.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/libata.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/libata.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/libata.rst</a></div><div class='hunk'>@@ -424,12 +424,6 @@ How commands are issued</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='ctx'> Internal commands</div><div class='del'>-    First, qc is allocated and initialized using :c:func:`ata_qc_new_init`.</div><div class='del'>-    Although :c:func:`ata_qc_new_init` doesn't implement any wait or retry</div><div class='del'>-    mechanism when qc is not available, internal commands are currently</div><div class='del'>-    issued only during initialization and error recovery, so no other</div><div class='del'>-    command is active and allocation is guaranteed to succeed.</div><div class='del'>-</div><div class='ctx'>     Once allocated qc's taskfile is initialized for the command to be</div><div class='ctx'>     executed. qc currently has two mechanisms to notify completion. One</div><div class='ctx'>     is via ``qc-&gt;complete_fn()`` callback and the other is completion</div><div class='hunk'>@@ -447,11 +441,6 @@ SCSI commands</div><div class='ctx'>     translated. No qc is involved in processing a simulated scmd. The</div><div class='ctx'>     result is computed right away and the scmd is completed.</div><div class='ctx'> </div><div class='del'>-    For a translated scmd, :c:func:`ata_qc_new_init` is invoked to allocate a</div><div class='del'>-    qc and the scmd is translated into the qc. SCSI midlayer's</div><div class='del'>-    completion notification function pointer is stored into</div><div class='del'>-    ``qc-&gt;scsidone``.</div><div class='del'>-</div><div class='ctx'>     ``qc-&gt;complete_fn()`` callback is used for completion notification. ATA</div><div class='ctx'>     commands use :c:func:`ata_scsi_qc_complete` while ATAPI commands use</div><div class='ctx'>     :c:func:`atapi_qc_complete`. Both functions end up calling ``qc-&gt;scsidone``</div><div class='head'>diff --git a/Documentation/driver-api/md/md-cluster.rst b/Documentation/driver-api/md/md-cluster.rst<br/>index 96eb52cec7eb..e93f35e0e157 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/md/md-cluster.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/md/md-cluster.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/md/md-cluster.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/md/md-cluster.rst</a></div><div class='hunk'>@@ -65,7 +65,7 @@ There are three groups of locks for managing the device:</div><div class='ctx'> 2.3 new-device management</div><div class='ctx'> -------------------------</div><div class='ctx'> </div><div class='del'>- A single lock: "no-new-dev" is used to co-ordinate the addition of</div><div class='add'>+ A single lock: "no-new-dev" is used to coordinate the addition of</div><div class='ctx'>  new devices - this must be synchronized across the array.</div><div class='ctx'>  Normally all nodes hold a concurrent-read lock on this device.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/md/raid5-cache.rst b/Documentation/driver-api/md/raid5-cache.rst<br/>index d7a15f44a7c3..5f947cbc2e78 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/md/raid5-cache.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/md/raid5-cache.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/md/raid5-cache.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/md/raid5-cache.rst</a></div><div class='hunk'>@@ -81,7 +81,7 @@ The write-through and write-back cache use the same disk format. The cache disk</div><div class='ctx'> is organized as a simple write log. The log consists of 'meta data' and 'data'</div><div class='ctx'> pairs. The meta data describes the data. It also includes checksum and sequence</div><div class='ctx'> ID for recovery identification. Data can be IO data and parity data. Data is</div><div class='del'>-checksumed too. The checksum is stored in the meta data ahead of the data. The</div><div class='add'>+checksummed too. The checksum is stored in the meta data ahead of the data. The</div><div class='ctx'> checksum is an optimization because MD can write meta and data freely without</div><div class='ctx'> worry about the order. MD superblock has a field pointed to the valid meta data</div><div class='ctx'> of log head.</div><div class='head'>diff --git a/Documentation/driver-api/media/cec-core.rst b/Documentation/driver-api/media/cec-core.rst<br/>index c6194ee81c41..ae0d20798edc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/cec-core.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/cec-core.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/cec-core.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/cec-core.rst</a></div><div class='hunk'>@@ -109,6 +109,7 @@ your driver:</div><div class='ctx'> 		int (*adap_monitor_all_enable)(struct cec_adapter *adap, bool enable);</div><div class='ctx'> 		int (*adap_monitor_pin_enable)(struct cec_adapter *adap, bool enable);</div><div class='ctx'> 		int (*adap_log_addr)(struct cec_adapter *adap, u8 logical_addr);</div><div class='add'>+		void (*adap_configured)(struct cec_adapter *adap, bool configured);</div><div class='ctx'> 		int (*adap_transmit)(struct cec_adapter *adap, u8 attempts,</div><div class='ctx'> 				      u32 signal_free_time, struct cec_msg *msg);</div><div class='ctx'> 		void (*adap_status)(struct cec_adapter *adap, struct seq_file *file);</div><div class='hunk'>@@ -117,7 +118,7 @@ your driver:</div><div class='ctx'> 		/* Error injection callbacks */</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='del'>-		/* High-level callbacks */</div><div class='add'>+		/* High-level callback */</div><div class='ctx'> 		...</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='hunk'>@@ -178,6 +179,16 @@ can receive directed messages to that address.</div><div class='ctx'> Note that adap_log_addr must return 0 if logical_addr is CEC_LOG_ADDR_INVALID.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Called when the adapter is fully configured or unconfigured::</div><div class='add'>+</div><div class='add'>+	void (*adap_configured)(struct cec_adapter *adap, bool configured);</div><div class='add'>+</div><div class='add'>+If configured == true, then the adapter is fully configured, i.e. all logical</div><div class='add'>+addresses have been successfully claimed. If configured == false, then the</div><div class='add'>+adapter is unconfigured. If the driver has to take specific actions after</div><div class='add'>+(un)configuration, then that can be done through this optional callback.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> To transmit a new message::</div><div class='ctx'> </div><div class='ctx'> 	int (*adap_transmit)(struct cec_adapter *adap, u8 attempts,</div><div class='head'>diff --git a/Documentation/driver-api/media/drivers/ccs/ccs.rst b/Documentation/driver-api/media/drivers/ccs/ccs.rst<br/>index b461c8aa2a16..7389204afcb8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/ccs/ccs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/drivers/ccs/ccs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/ccs/ccs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/drivers/ccs/ccs.rst</a></div><div class='hunk'>@@ -56,6 +56,28 @@ analogue data is never read from the pixel matrix that are outside the</div><div class='ctx'> configured selection rectangle that designates crop. The difference has an</div><div class='ctx'> effect in device timing and likely also in power consumption.</div><div class='ctx'> </div><div class='add'>+CCS static data</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+The MIPI CCS driver supports CCS static data for all compliant devices,</div><div class='add'>+including not just those compliant with CCS 1.1 but also CCS 1.0 and SMIA(++).</div><div class='add'>+For CCS the file names are formed as</div><div class='add'>+</div><div class='add'>+	ccs/ccs-sensor-vvvv-mmmm-rrrr.fw (sensor) and</div><div class='add'>+	ccs/ccs-module-vvvv-mmmm-rrrr.fw (module).</div><div class='add'>+</div><div class='add'>+For SMIA++ compliant devices the corresponding file names are</div><div class='add'>+</div><div class='add'>+	ccs/smiapp-sensor-vv-mmmm-rr.fw (sensor) and</div><div class='add'>+	ccs/smiapp-module-vv-mmmm-rrrr.fw (module).</div><div class='add'>+</div><div class='add'>+For SMIA (non-++) compliant devices the static data file name is</div><div class='add'>+</div><div class='add'>+	ccs/smia-sensor-vv-mmmm-rr.fw (sensor).</div><div class='add'>+</div><div class='add'>+vvvv or vv denotes MIPI and SMIA manufacturer IDs respectively, mmmm model ID</div><div class='add'>+and rrrr or rr revision number.</div><div class='add'>+</div><div class='ctx'> Register definition generator</div><div class='ctx'> -----------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/media/drivers/cpia2_devel.rst b/Documentation/driver-api/media/drivers/cpia2_devel.rst<br/>deleted file mode 100644<br/>index decaa4768c78..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/cpia2_devel.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/drivers/cpia2_devel.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,56 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-The cpia2 driver</div><div class='del'>-================</div><div class='del'>-</div><div class='del'>-Authors: Peter Pregler &lt;Peter_Pregler@email.com&gt;,</div><div class='del'>-Scott J. Bertin &lt;scottbertin@yahoo.com&gt;, and</div><div class='del'>-Jarl Totland &lt;Jarl.Totland@bdc.no&gt; for the original cpia driver, which</div><div class='del'>-this one was modelled from.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Notes to developers</div><div class='del'>-~~~~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-   - This is a driver version stripped of the 2.4 back compatibility</div><div class='del'>-     and old MJPEG ioctl API. See cpia2.sf.net for 2.4 support.</div><div class='del'>-</div><div class='del'>-Programmer's overview of cpia2 driver</div><div class='del'>-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='del'>-</div><div class='del'>-Cpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a</div><div class='del'>-division of ST Microelectronics).  There are two versions.  The first is the</div><div class='del'>-STV0672, which is capable of up to 30 frames per second (fps) in frame sizes</div><div class='del'>-up to CIF, and 15 fps for VGA frames.  The STV0676 is an improved version,</div><div class='del'>-which can handle up to 30 fps VGA.  Both coprocessors can be attached to two</div><div class='del'>-CMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor.  These will</div><div class='del'>-be referred to as the 410 and the 500 sensors, or the CIF and VGA sensors.</div><div class='del'>-</div><div class='del'>-The two chipsets operate almost identically.  The core is an 8051 processor,</div><div class='del'>-running two different versions of firmware.  The 672 runs the VP4 video</div><div class='del'>-processor code, the 676 runs VP5.  There are a few differences in register</div><div class='del'>-mappings for the two chips.  In these cases, the symbols defined in the</div><div class='del'>-header files are marked with VP4 or VP5 as part of the symbol name.</div><div class='del'>-</div><div class='del'>-The cameras appear externally as three sets of registers. Setting register</div><div class='del'>-values is the only way to control the camera.  Some settings are</div><div class='del'>-interdependant, such as the sequence required to power up the camera. I will</div><div class='del'>-try to make note of all of these cases.</div><div class='del'>-</div><div class='del'>-The register sets are called blocks.  Block 0 is the system block.  This</div><div class='del'>-section is always powered on when the camera is plugged in.  It contains</div><div class='del'>-registers that control housekeeping functions such as powering up the video</div><div class='del'>-processor.  The video processor is the VP block.  These registers control</div><div class='del'>-how the video from the sensor is processed.  Examples are timing registers,</div><div class='del'>-user mode (vga, qvga), scaling, cropping, framerates, and so on.  The last</div><div class='del'>-block is the video compressor (VC).  The video stream sent from the camera is</div><div class='del'>-compressed as Motion JPEG (JPEGA).  The VC controls all of the compression</div><div class='del'>-parameters.  Looking at the file cpia2_registers.h, you can get a full view</div><div class='del'>-of these registers and the possible values for most of them.</div><div class='del'>-</div><div class='del'>-One or more registers can be set or read by sending a usb control message to</div><div class='del'>-the camera.  There are three modes for this.  Block mode requests a number</div><div class='del'>-of contiguous registers.  Random mode reads or writes random registers with</div><div class='del'>-a tuple structure containing address/value pairs.  The repeat mode is only</div><div class='del'>-used by VP4 to load a firmware patch.  It contains a starting address and</div><div class='del'>-a sequence of bytes to be written into a gpio port.</div><div class='head'>diff --git a/Documentation/driver-api/media/drivers/davinci-vpbe-devel.rst b/Documentation/driver-api/media/drivers/davinci-vpbe-devel.rst<br/>deleted file mode 100644<br/>index 4e87bdbc7ae4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/davinci-vpbe-devel.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/drivers/davinci-vpbe-devel.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,39 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-The VPBE V4L2 driver design</div><div class='del'>-===========================</div><div class='del'>-</div><div class='del'>-File partitioning</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>- V4L2 display device driver</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_display.c</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_display.h</div><div class='del'>-</div><div class='del'>- VPBE display controller</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe.c</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe.h</div><div class='del'>-</div><div class='del'>- VPBE venc sub device driver</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_venc.c</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_venc.h</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_venc_regs.h</div><div class='del'>-</div><div class='del'>- VPBE osd driver</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_osd.c</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_osd.h</div><div class='del'>-         drivers/media/platform/ti/davinci/vpbe_osd_regs.h</div><div class='del'>-</div><div class='del'>-To be done</div><div class='del'>-----------</div><div class='del'>-</div><div class='del'>-vpbe display controller</div><div class='del'>-    - Add support for external encoders.</div><div class='del'>-    - add support for selecting external encoder as default at probe time.</div><div class='del'>-</div><div class='del'>-vpbe venc sub device</div><div class='del'>-    - add timings for supporting ths8200</div><div class='del'>-    - add support for LogicPD LCD.</div><div class='del'>-</div><div class='del'>-FB drivers</div><div class='del'>-    - Add support for fbdev drivers.- Ready and part of subsequent patches.</div><div class='head'>diff --git a/Documentation/driver-api/media/drivers/index.rst b/Documentation/driver-api/media/drivers/index.rst<br/>index 32406490557c..c4123a16b5f9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/drivers/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/drivers/index.rst</a></div><div class='hunk'>@@ -13,10 +13,8 @@ Video4Linux (V4L) drivers</div><div class='ctx'> 	:maxdepth: 5</div><div class='ctx'> </div><div class='ctx'> 	bttv-devel</div><div class='del'>-	cpia2_devel</div><div class='ctx'> 	cx2341x-devel</div><div class='ctx'> 	cx88-devel</div><div class='del'>-	davinci-vpbe-devel</div><div class='ctx'> 	fimc-devel</div><div class='ctx'> 	pvrusb2</div><div class='ctx'> 	pxa_camera</div><div class='head'>diff --git a/Documentation/driver-api/media/drivers/pxa_camera.rst b/Documentation/driver-api/media/drivers/pxa_camera.rst<br/>index ee1bd96b66dd..46919919baac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/pxa_camera.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/drivers/pxa_camera.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/pxa_camera.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/drivers/pxa_camera.rst</a></div><div class='hunk'>@@ -19,7 +19,7 @@ Global video workflow</div><div class='ctx'> </div><div class='ctx'> a) QCI stopped</div><div class='ctx'>    Initially, the QCI interface is stopped.</div><div class='del'>-   When a buffer is queued (pxa_videobuf_ops-&gt;buf_queue), the QCI starts.</div><div class='add'>+   When a buffer is queued, start_streaming is called and the QCI starts.</div><div class='ctx'> </div><div class='ctx'> b) QCI started</div><div class='ctx'>    More buffers can be queued while the QCI is started without halting the</div><div class='head'>diff --git a/Documentation/driver-api/media/drivers/vidtv.rst b/Documentation/driver-api/media/drivers/vidtv.rst<br/>index 673bdff919ea..54f269f478d3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/vidtv.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/drivers/vidtv.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/drivers/vidtv.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/drivers/vidtv.rst</a></div><div class='hunk'>@@ -28,7 +28,7 @@ Currently, it consists of:</div><div class='ctx'>   takes parameters at initialization that will dictate how the simulation</div><div class='ctx'>   behaves.</div><div class='ctx'> </div><div class='del'>-- Code reponsible for encoding a valid MPEG Transport Stream, which is then</div><div class='add'>+- Code responsible for encoding a valid MPEG Transport Stream, which is then</div><div class='ctx'>   passed to the bridge driver. This fake stream contains some hardcoded content.</div><div class='ctx'>   For now, we have a single, audio-only channel containing a single MPEG</div><div class='ctx'>   Elementary Stream, which in turn contains a SMPTE 302m encoded sine-wave.</div><div class='head'>diff --git a/Documentation/driver-api/media/dtv-demux.rst b/Documentation/driver-api/media/dtv-demux.rst<br/>index c0ae5dec5328..144124142622 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/dtv-demux.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/dtv-demux.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/dtv-demux.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/dtv-demux.rst</a></div><div class='hunk'>@@ -24,7 +24,7 @@ unless this is fixed in the HW platform.</div><div class='ctx'> </div><div class='ctx'> The demux kABI only controls front-ends regarding to their connections with</div><div class='ctx'> demuxes; the kABI used to set the other front-end parameters, such as</div><div class='del'>-tuning, are devined via the Digital TV Frontend kABI.</div><div class='add'>+tuning, are defined via the Digital TV Frontend kABI.</div><div class='ctx'> </div><div class='ctx'> The functions that implement the abstract interface demux should be defined</div><div class='ctx'> static or module private and registered to the Demux core for external</div><div class='head'>diff --git a/Documentation/driver-api/media/mc-core.rst b/Documentation/driver-api/media/mc-core.rst<br/>index 57b5bbba944e..2456950ce8ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/mc-core.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/mc-core.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/mc-core.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/mc-core.rst</a></div><div class='hunk'>@@ -42,9 +42,16 @@ Allocation of the structure is handled by the media device driver, usually by</div><div class='ctx'> embedding the :c:type:`media_device` instance in a larger driver-specific</div><div class='ctx'> structure.</div><div class='ctx'> </div><div class='del'>-Drivers register media device instances by calling</div><div class='del'>-:c:func:`__media_device_register()` via the macro ``media_device_register()``</div><div class='del'>-and unregistered by calling :c:func:`media_device_unregister()`.</div><div class='add'>+Drivers initialise media device instances by calling</div><div class='add'>+:c:func:`media_device_init()`. After initialising a media device instance, it is</div><div class='add'>+registered by calling :c:func:`__media_device_register()` via the macro</div><div class='add'>+``media_device_register()`` and unregistered by calling</div><div class='add'>+:c:func:`media_device_unregister()`. An initialised media device must be</div><div class='add'>+eventually cleaned up by calling :c:func:`media_device_cleanup()`.</div><div class='add'>+</div><div class='add'>+Note that it is not allowed to unregister a media device instance that was not</div><div class='add'>+previously registered, or clean up a media device instance that was not</div><div class='add'>+previously initialised.</div><div class='ctx'> </div><div class='ctx'> Entities</div><div class='ctx'> ^^^^^^^^</div><div class='hunk'>@@ -179,8 +186,9 @@ is required and the graph structure can be freed normally.</div><div class='ctx'> </div><div class='ctx'> Helper functions can be used to find a link between two given pads, or a pad</div><div class='ctx'> connected to another pad through an enabled link</div><div class='del'>-:c:func:`media_entity_find_link()` and</div><div class='del'>-:c:func:`media_entity_remote_pad()`.</div><div class='add'>+(:c:func:`media_entity_find_link()`, :c:func:`media_pad_remote_pad_first()`,</div><div class='add'>+:c:func:`media_entity_remote_source_pad_unique()` and</div><div class='add'>+:c:func:`media_pad_remote_pad_unique()`).</div><div class='ctx'> </div><div class='ctx'> Use count and power handling</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='hunk'>@@ -206,19 +214,28 @@ Link properties can be modified at runtime by calling</div><div class='ctx'> Pipelines and media streams</div><div class='ctx'> ^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='ctx'> </div><div class='add'>+A media stream is a stream of pixels or metadata originating from one or more</div><div class='add'>+source devices (such as a sensors) and flowing through media entity pads</div><div class='add'>+towards the final sinks. The stream can be modified on the route by the</div><div class='add'>+devices (e.g. scaling or pixel format conversions), or it can be split into</div><div class='add'>+multiple branches, or multiple branches can be merged.</div><div class='add'>+</div><div class='add'>+A media pipeline is a set of media streams which are interdependent. This</div><div class='add'>+interdependency can be caused by the hardware (e.g. configuration of a second</div><div class='add'>+stream cannot be changed if the first stream has been enabled) or by the driver</div><div class='add'>+due to the software design. Most commonly a media pipeline consists of a single</div><div class='add'>+stream which does not branch.</div><div class='add'>+</div><div class='ctx'> When starting streaming, drivers must notify all entities in the pipeline to</div><div class='ctx'> prevent link states from being modified during streaming by calling</div><div class='ctx'> :c:func:`media_pipeline_start()`.</div><div class='ctx'> </div><div class='del'>-The function will mark all entities connected to the given entity through</div><div class='del'>-enabled links, either directly or indirectly, as streaming.</div><div class='add'>+The function will mark all the pads which are part of the pipeline as streaming.</div><div class='ctx'> </div><div class='del'>-The struct media_pipeline instance pointed to by</div><div class='del'>-the pipe argument will be stored in every entity in the pipeline.</div><div class='del'>-Drivers should embed the struct media_pipeline</div><div class='del'>-in higher-level pipeline structures and can then access the</div><div class='del'>-pipeline through the struct media_entity</div><div class='del'>-pipe field.</div><div class='add'>+The struct media_pipeline instance pointed to by the pipe argument will be</div><div class='add'>+stored in every pad in the pipeline. Drivers should embed the struct</div><div class='add'>+media_pipeline in higher-level pipeline structures and can then access the</div><div class='add'>+pipeline through the struct media_pad pipe field.</div><div class='ctx'> </div><div class='ctx'> Calls to :c:func:`media_pipeline_start()` can be nested.</div><div class='ctx'> The pipeline pointer must be identical for all nested calls to the function.</div><div class='head'>diff --git a/Documentation/driver-api/media/v4l2-subdev.rst b/Documentation/driver-api/media/v4l2-subdev.rst<br/>index 08ea2673b19e..602dadaa81d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/v4l2-subdev.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/media/v4l2-subdev.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/media/v4l2-subdev.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/media/v4l2-subdev.rst</a></div><div class='hunk'>@@ -243,6 +243,12 @@ notifier callback is called. After all subdevices have been located the</div><div class='ctx'> .complete() callback is called. When a subdevice is removed from the</div><div class='ctx'> system the .unbind() method is called. All three callbacks are optional.</div><div class='ctx'> </div><div class='add'>+Drivers can store any type of custom data in their driver-specific</div><div class='add'>+:c:type:`v4l2_async_subdev` wrapper. If any of that data requires special</div><div class='add'>+handling when the structure is freed, drivers must implement the ``.destroy()``</div><div class='add'>+notifier callback. The framework will call it right before freeing the</div><div class='add'>+:c:type:`v4l2_async_subdev`.</div><div class='add'>+</div><div class='ctx'> Calling subdev operations</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -315,7 +321,7 @@ response to video node operations. This hides the complexity of the underlying</div><div class='ctx'> hardware from applications. For complex devices, finer-grained control of the</div><div class='ctx'> device than what the video nodes offer may be required. In those cases, bridge</div><div class='ctx'> drivers that implement :ref:`the media controller API &lt;media_controller&gt;` may</div><div class='del'>-opt for making the subdevice operations directly accessible from userpace.</div><div class='add'>+opt for making the subdevice operations directly accessible from userspace.</div><div class='ctx'> </div><div class='ctx'> Device nodes named ``v4l-subdev``\ *X* can be created in ``/dev`` to access</div><div class='ctx'> sub-devices directly. If a sub-device supports direct userspace configuration</div><div class='hunk'>@@ -518,6 +524,83 @@ The :c:func:`v4l2_i2c_new_subdev` function will call</div><div class='ctx'> :c:type:`i2c_board_info` structure using the ``client_type`` and the</div><div class='ctx'> ``addr`` to fill it.</div><div class='ctx'> </div><div class='add'>+Centrally managed subdev active state</div><div class='add'>+-------------------------------------</div><div class='add'>+</div><div class='add'>+Traditionally V4L2 subdev drivers maintained internal state for the active</div><div class='add'>+device configuration. This is often implemented as e.g. an array of struct</div><div class='add'>+v4l2_mbus_framefmt, one entry for each pad, and similarly for crop and compose</div><div class='add'>+rectangles.</div><div class='add'>+</div><div class='add'>+In addition to the active configuration, each subdev file handle has an array of</div><div class='add'>+struct v4l2_subdev_pad_config, managed by the V4L2 core, which contains the try</div><div class='add'>+configuration.</div><div class='add'>+</div><div class='add'>+To simplify the subdev drivers the V4L2 subdev API now optionally supports a</div><div class='add'>+centrally managed active configuration represented by</div><div class='add'>+:c:type:`v4l2_subdev_state`. One instance of state, which contains the active</div><div class='add'>+device configuration, is stored in the sub-device itself as part of</div><div class='add'>+the :c:type:`v4l2_subdev` structure, while the core associates a try state to</div><div class='add'>+each open file handle, to store the try configuration related to that file</div><div class='add'>+handle.</div><div class='add'>+</div><div class='add'>+Sub-device drivers can opt-in and use state to manage their active configuration</div><div class='add'>+by initializing the subdevice state with a call to v4l2_subdev_init_finalize()</div><div class='add'>+before registering the sub-device. They must also call v4l2_subdev_cleanup()</div><div class='add'>+to release all the allocated resources before unregistering the sub-device.</div><div class='add'>+The core automatically allocates and initializes a state for each open file</div><div class='add'>+handle to store the try configurations and frees it when closing the file</div><div class='add'>+handle.</div><div class='add'>+</div><div class='add'>+V4L2 sub-device operations that use both the :ref:`ACTIVE and TRY formats</div><div class='add'>+&lt;v4l2-subdev-format-whence&gt;` receive the correct state to operate on through</div><div class='add'>+the 'state' parameter. The state must be locked and unlocked by the</div><div class='add'>+caller by calling :c:func:`v4l2_subdev_lock_state()` and</div><div class='add'>+:c:func:`v4l2_subdev_unlock_state()`. The caller can do so by calling the subdev</div><div class='add'>+operation through the :c:func:`v4l2_subdev_call_state_active()` macro.</div><div class='add'>+</div><div class='add'>+Operations that do not receive a state parameter implicitly operate on the</div><div class='add'>+subdevice active state, which drivers can exclusively access by</div><div class='add'>+calling :c:func:`v4l2_subdev_lock_and_get_active_state()`. The sub-device active</div><div class='add'>+state must equally be released by calling :c:func:`v4l2_subdev_unlock_state()`.</div><div class='add'>+</div><div class='add'>+Drivers must never manually access the state stored in the :c:type:`v4l2_subdev`</div><div class='add'>+or in the file handle without going through the designated helpers.</div><div class='add'>+</div><div class='add'>+While the V4L2 core passes the correct try or active state to the subdevice</div><div class='add'>+operations, many existing device drivers pass a NULL state when calling</div><div class='add'>+operations with :c:func:`v4l2_subdev_call()`. This legacy construct causes</div><div class='add'>+issues with subdevice drivers that let the V4L2 core manage the active state,</div><div class='add'>+as they expect to receive the appropriate state as a parameter. To help the</div><div class='add'>+conversion of subdevice drivers to a managed active state without having to</div><div class='add'>+convert all callers at the same time, an additional wrapper layer has been</div><div class='add'>+added to v4l2_subdev_call(), which handles the NULL case by getting and locking</div><div class='add'>+the callee's active state with :c:func:`v4l2_subdev_lock_and_get_active_state()`,</div><div class='add'>+and unlocking the state after the call.</div><div class='add'>+</div><div class='add'>+The whole subdev state is in reality split into three parts: the</div><div class='add'>+v4l2_subdev_state, subdev controls and subdev driver's internal state. In the</div><div class='add'>+future these parts should be combined into a single state. For the time being</div><div class='add'>+we need a way to handle the locking for these parts. This can be accomplished</div><div class='add'>+by sharing a lock. The v4l2_ctrl_handler already supports this via its 'lock'</div><div class='add'>+pointer and the same model is used with states. The driver can do the following</div><div class='add'>+before calling v4l2_subdev_init_finalize():</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	sd-&gt;ctrl_handler-&gt;lock = &amp;priv-&gt;mutex;</div><div class='add'>+	sd-&gt;state_lock = &amp;priv-&gt;mutex;</div><div class='add'>+</div><div class='add'>+This shares the driver's private mutex between the controls and the states.</div><div class='add'>+</div><div class='add'>+Streams, multiplexed media pads and internal routing</div><div class='add'>+----------------------------------------------------</div><div class='add'>+</div><div class='add'>+A subdevice driver can implement support for multiplexed streams by setting</div><div class='add'>+the V4L2_SUBDEV_FL_STREAMS subdev flag and implementing support for</div><div class='add'>+centrally managed subdev active state, routing and stream based</div><div class='add'>+configuration.</div><div class='add'>+</div><div class='ctx'> V4L2 sub-device functions and data structures</div><div class='ctx'> ---------------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/mei/nfc.rst b/Documentation/driver-api/mei/nfc.rst<br/>index b5b6fc96f85e..8fe8664c28cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/mei/nfc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/mei/nfc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/mei/nfc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/mei/nfc.rst</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> MEI NFC</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='del'>-Some Intel 8 and 9 Serieses chipsets supports NFC devices connected behind</div><div class='add'>+Some Intel 8 and 9 Series chipsets support NFC devices connected behind</div><div class='ctx'> the Intel Management Engine controller.</div><div class='ctx'> MEI client bus exposes the NFC chips as NFC phy devices and enables</div><div class='ctx'> binding with Microread and NXP PN544 NFC device driver from the Linux NFC</div><div class='head'>diff --git a/Documentation/driver-api/miscellaneous.rst b/Documentation/driver-api/miscellaneous.rst<br/>index 304ffb146cf9..4a5104a368ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/miscellaneous.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/miscellaneous.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/miscellaneous.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/miscellaneous.rst</a></div><div class='hunk'>@@ -16,12 +16,11 @@ Parallel Port Devices</div><div class='ctx'> 16x50 UART Driver</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/tty/serial/serial_core.c</div><div class='del'>-   :export:</div><div class='del'>-</div><div class='ctx'> .. kernel-doc:: drivers/tty/serial/8250/8250_core.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+See serial/driver.rst for related APIs.</div><div class='add'>+</div><div class='ctx'> Pulse-Width Modulation (PWM)</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/mtd/spi-nor.rst b/Documentation/driver-api/mtd/spi-nor.rst<br/>index 4a3adca417fd..c22f8c0f7950 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/mtd/spi-nor.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/mtd/spi-nor.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/mtd/spi-nor.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/mtd/spi-nor.rst</a></div><div class='hunk'>@@ -63,6 +63,3 @@ The main API is spi_nor_scan(). Before you call the hook, a driver should</div><div class='ctx'> initialize the necessary fields for spi_nor{}. Please see</div><div class='ctx'> drivers/mtd/spi-nor/spi-nor.c for detail. Please also refer to spi-fsl-qspi.c</div><div class='ctx'> when you want to write a new driver for a SPI NOR controller.</div><div class='del'>-Another API is spi_nor_restore(), this is used to restore the status of SPI</div><div class='del'>-flash chip such as addressing mode. Call it whenever detach the driver from</div><div class='del'>-device or reboot the system.</div><div class='head'>diff --git a/Documentation/driver-api/nfc/nfc-hci.rst b/Documentation/driver-api/nfc/nfc-hci.rst<br/>index f10fe53aa9fe..486aa647c456 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nfc/nfc-hci.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/nfc/nfc-hci.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nfc/nfc-hci.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/nfc/nfc-hci.rst</a></div><div class='hunk'>@@ -150,7 +150,7 @@ LLC</div><div class='ctx'> </div><div class='ctx'> Communication between the CPU and the chip often requires some link layer</div><div class='ctx'> protocol. Those are isolated as modules managed by the HCI layer. There are</div><div class='del'>-currently two modules : nop (raw transfert) and shdlc.</div><div class='add'>+currently two modules : nop (raw transfer) and shdlc.</div><div class='ctx'> A new llc must implement the following functions::</div><div class='ctx'> </div><div class='ctx'>   struct nfc_llc_ops {</div><div class='head'>diff --git a/Documentation/driver-api/nvdimm/nvdimm.rst b/Documentation/driver-api/nvdimm/nvdimm.rst<br/>index be8587a558e1..ca16b5acbf30 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nvdimm/nvdimm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/nvdimm/nvdimm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nvdimm/nvdimm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/nvdimm/nvdimm.rst</a></div><div class='hunk'>@@ -82,7 +82,7 @@ LABEL:</div><div class='ctx'>   Metadata stored on a DIMM device that partitions and identifies</div><div class='ctx'>   (persistently names) capacity allocated to different PMEM namespaces. It</div><div class='ctx'>   also indicates whether an address abstraction like a BTT is applied to</div><div class='del'>-  the namepsace.  Note that traditional partition tables, GPT/MBR, are</div><div class='add'>+  the namespace.  Note that traditional partition tables, GPT/MBR, are</div><div class='ctx'>   layered on top of a PMEM namespace, or an address abstraction like BTT</div><div class='ctx'>   if present, but partition support is deprecated going forward.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/nvdimm/security.rst b/Documentation/driver-api/nvdimm/security.rst<br/>index 7aab71524116..eb3d35e6a95c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nvdimm/security.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/nvdimm/security.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nvdimm/security.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/nvdimm/security.rst</a></div><div class='hunk'>@@ -83,7 +83,7 @@ passed in.</div><div class='ctx'> 6. Freeze</div><div class='ctx'> ---------</div><div class='ctx'> The freeze operation does not require any keys. The security config can be</div><div class='del'>-frozen by a user with root privelege.</div><div class='add'>+frozen by a user with root privilege.</div><div class='ctx'> </div><div class='ctx'> 7. Disable</div><div class='ctx'> ----------</div><div class='head'>diff --git a/Documentation/driver-api/nvmem.rst b/Documentation/driver-api/nvmem.rst<br/>index e3366322d46c..de221e91c8e3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nvmem.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/nvmem.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/nvmem.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/nvmem.rst</a></div><div class='hunk'>@@ -185,3 +185,18 @@ ex::</div><div class='ctx'> =====================</div><div class='ctx'> </div><div class='ctx'> See Documentation/devicetree/bindings/nvmem/nvmem.txt</div><div class='add'>+</div><div class='add'>+8. NVMEM layouts</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+NVMEM layouts are yet another mechanism to create cells. With the device</div><div class='add'>+tree binding it is possible to specify simple cells by using an offset</div><div class='add'>+and a length. Sometimes, the cells doesn't have a static offset, but</div><div class='add'>+the content is still well defined, e.g. tag-length-values. In this case,</div><div class='add'>+the NVMEM device content has to be first parsed and the cells need to</div><div class='add'>+be added accordingly. Layouts let you read the content of the NVMEM device</div><div class='add'>+and let you add cells dynamically.</div><div class='add'>+</div><div class='add'>+Another use case for layouts is the post processing of cells. With layouts,</div><div class='add'>+it is possible to associate a custom post processing hook to a cell. It</div><div class='add'>+even possible to add this hook to cells not created by the layout itself.</div><div class='head'>diff --git a/Documentation/driver-api/phy/phy.rst b/Documentation/driver-api/phy/phy.rst<br/>index 8fc1ce0bb905..81785c084f3e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/phy/phy.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/phy/phy.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/phy/phy.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/phy/phy.rst</a></div><div class='hunk'>@@ -94,7 +94,8 @@ Inorder to dereference the private data (in phy_ops), the phy provider driver</div><div class='ctx'> can use phy_set_drvdata() after creating the PHY and use phy_get_drvdata() in</div><div class='ctx'> phy_ops to get back the private data.</div><div class='ctx'> </div><div class='del'>-4. Getting a reference to the PHY</div><div class='add'>+Getting a reference to the PHY</div><div class='add'>+==============================</div><div class='ctx'> </div><div class='ctx'> Before the controller can make use of the PHY, it has to get a reference to</div><div class='ctx'> it. This framework provides the following APIs to get a reference to the PHY.</div><div class='hunk'>@@ -102,27 +103,31 @@ it. This framework provides the following APIs to get a reference to the PHY.</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'> 	struct phy *phy_get(struct device *dev, const char *string);</div><div class='del'>-	struct phy *phy_optional_get(struct device *dev, const char *string);</div><div class='ctx'> 	struct phy *devm_phy_get(struct device *dev, const char *string);</div><div class='ctx'> 	struct phy *devm_phy_optional_get(struct device *dev,</div><div class='ctx'> 					  const char *string);</div><div class='add'>+	struct phy *devm_of_phy_get(struct device *dev, struct device_node *np,</div><div class='add'>+				    const char *con_id);</div><div class='add'>+	struct phy *devm_of_phy_optional_get(struct device *dev,</div><div class='add'>+					     struct device_node *np,</div><div class='add'>+					     const char *con_id);</div><div class='ctx'> 	struct phy *devm_of_phy_get_by_index(struct device *dev,</div><div class='ctx'> 					     struct device_node *np,</div><div class='ctx'> 					     int index);</div><div class='ctx'> </div><div class='del'>-phy_get, phy_optional_get, devm_phy_get and devm_phy_optional_get can</div><div class='del'>-be used to get the PHY. In the case of dt boot, the string arguments</div><div class='add'>+phy_get, devm_phy_get and devm_phy_optional_get can be used to get the PHY.</div><div class='add'>+In the case of dt boot, the string arguments</div><div class='ctx'> should contain the phy name as given in the dt data and in the case of</div><div class='ctx'> non-dt boot, it should contain the label of the PHY.  The two</div><div class='ctx'> devm_phy_get associates the device with the PHY using devres on</div><div class='ctx'> successful PHY get. On driver detach, release function is invoked on</div><div class='del'>-the devres data and devres data is freed. phy_optional_get and</div><div class='del'>-devm_phy_optional_get should be used when the phy is optional. These</div><div class='del'>-two functions will never return -ENODEV, but instead returns NULL when</div><div class='del'>-the phy cannot be found.Some generic drivers, such as ehci, may use multiple</div><div class='del'>-phys and for such drivers referencing phy(s) by name(s) does not make sense. In</div><div class='del'>-this case, devm_of_phy_get_by_index can be used to get a phy reference based on</div><div class='del'>-the index.</div><div class='add'>+the devres data and devres data is freed.</div><div class='add'>+The _optional_get variants should be used when the phy is optional. These</div><div class='add'>+functions will never return -ENODEV, but instead return NULL when</div><div class='add'>+the phy cannot be found.</div><div class='add'>+Some generic drivers, such as ehci, may use multiple phys. In this case,</div><div class='add'>+devm_of_phy_get or devm_of_phy_get_by_index can be used to get a phy</div><div class='add'>+reference based on name or index.</div><div class='ctx'> </div><div class='ctx'> It should be noted that NULL is a valid phy reference. All phy</div><div class='ctx'> consumer calls on the NULL phy become NOPs. That is the release calls,</div><div class='hunk'>@@ -130,6 +135,28 @@ the phy_init() and phy_exit() calls, and phy_power_on() and</div><div class='ctx'> phy_power_off() calls are all NOP when applied to a NULL phy. The NULL</div><div class='ctx'> phy is useful in devices for handling optional phy devices.</div><div class='ctx'> </div><div class='add'>+Order of API calls</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+The general order of calls should be::</div><div class='add'>+</div><div class='add'>+    [devm_][of_]phy_get()</div><div class='add'>+    phy_init()</div><div class='add'>+    phy_power_on()</div><div class='add'>+    [phy_set_mode[_ext]()]</div><div class='add'>+    ...</div><div class='add'>+    phy_power_off()</div><div class='add'>+    phy_exit()</div><div class='add'>+    [[of_]phy_put()]</div><div class='add'>+</div><div class='add'>+Some PHY drivers may not implement :c:func:`phy_init` or :c:func:`phy_power_on`,</div><div class='add'>+but controllers should always call these functions to be compatible with other</div><div class='add'>+PHYs. Some PHYs may require :c:func:`phy_set_mode &lt;phy_set_mode_ext&gt;`, while</div><div class='add'>+others may use a default mode (typically configured via devicetree or other</div><div class='add'>+firmware). For compatibility, you should always call this function if you know</div><div class='add'>+what mode you will be using. Generally, this function should be called after</div><div class='add'>+:c:func:`phy_power_on`, although some PHY drivers may allow it at any time.</div><div class='add'>+</div><div class='ctx'> Releasing a reference to the PHY</div><div class='ctx'> ================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/pin-control.rst b/Documentation/driver-api/pin-control.rst<br/>index 71eefe5a023f..4639912dc9cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/pin-control.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/pin-control.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/pin-control.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/pin-control.rst</a></div><div class='hunk'>@@ -11,20 +11,18 @@ This subsystem deals with:</div><div class='ctx'> - Multiplexing of pins, pads, fingers (etc) see below for details</div><div class='ctx'> </div><div class='ctx'> - Configuration of pins, pads, fingers (etc), such as software-controlled</div><div class='del'>-  biasing and driving mode specific pins, such as pull-up/down, open drain,</div><div class='add'>+  biasing and driving mode specific pins, such as pull-up, pull-down, open drain,</div><div class='ctx'>   load capacitance etc.</div><div class='ctx'> </div><div class='ctx'> Top-level interface</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='del'>-Definition of PIN CONTROLLER:</div><div class='add'>+Definitions:</div><div class='ctx'> </div><div class='del'>-- A pin controller is a piece of hardware, usually a set of registers, that</div><div class='add'>+- A PIN CONTROLLER is a piece of hardware, usually a set of registers, that</div><div class='ctx'>   can control PINs. It may be able to multiplex, bias, set load capacitance,</div><div class='ctx'>   set drive strength, etc. for individual pins or groups of pins.</div><div class='ctx'> </div><div class='del'>-Definition of PIN:</div><div class='del'>-</div><div class='ctx'> - PINS are equal to pads, fingers, balls or whatever packaging input or</div><div class='ctx'>   output line you want to control and these are denoted by unsigned integers</div><div class='ctx'>   in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so</div><div class='hunk'>@@ -57,7 +55,9 @@ Here is an example of a PGA (Pin Grid Array) chip seen from underneath::</div><div class='ctx'>    1    o   o   o   o   o   o   o   o</div><div class='ctx'> </div><div class='ctx'> To register a pin controller and name all the pins on this package we can do</div><div class='del'>-this in our driver::</div><div class='add'>+this in our driver:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -78,14 +78,13 @@ this in our driver::</div><div class='ctx'> 		.owner = THIS_MODULE,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	int __init foo_probe(void)</div><div class='add'>+	int __init foo_init(void)</div><div class='ctx'> 	{</div><div class='ctx'> 		int error;</div><div class='ctx'> </div><div class='ctx'> 		struct pinctrl_dev *pctl;</div><div class='ctx'> </div><div class='del'>-		error = pinctrl_register_and_init(&amp;foo_desc, &lt;PARENT&gt;,</div><div class='del'>-						  NULL, &amp;pctl);</div><div class='add'>+		error = pinctrl_register_and_init(&amp;foo_desc, &lt;PARENT&gt;, NULL, &amp;pctl);</div><div class='ctx'> 		if (error)</div><div class='ctx'> 			return error;</div><div class='ctx'> </div><div class='hunk'>@@ -95,20 +94,20 @@ this in our driver::</div><div class='ctx'> To enable the pinctrl subsystem and the subgroups for PINMUX and PINCONF and</div><div class='ctx'> selected drivers, you need to select them from your machine's Kconfig entry,</div><div class='ctx'> since these are so tightly integrated with the machines they are used on.</div><div class='del'>-See for example arch/arm/mach-ux500/Kconfig for an example.</div><div class='add'>+See ``arch/arm/mach-ux500/Kconfig`` for an example.</div><div class='ctx'> </div><div class='ctx'> Pins usually have fancier names than this. You can find these in the datasheet</div><div class='ctx'> for your chip. Notice that the core pinctrl.h file provides a fancy macro</div><div class='del'>-called PINCTRL_PIN() to create the struct entries. As you can see I enumerated</div><div class='del'>-the pins from 0 in the upper left corner to 63 in the lower right corner.</div><div class='add'>+called ``PINCTRL_PIN()`` to create the struct entries. As you can see the pins are</div><div class='add'>+enumerated from 0 in the upper left corner to 63 in the lower right corner.</div><div class='ctx'> This enumeration was arbitrarily chosen, in practice you need to think</div><div class='ctx'> through your numbering system so that it matches the layout of registers</div><div class='ctx'> and such things in your driver, or the code may become complicated. You must</div><div class='ctx'> also consider matching of offsets to the GPIO ranges that may be handled by</div><div class='ctx'> the pin controller.</div><div class='ctx'> </div><div class='del'>-For a padring with 467 pads, as opposed to actual pins, I used an enumeration</div><div class='del'>-like this, walking around the edge of the chip, which seems to be industry</div><div class='add'>+For a padding with 467 pads, as opposed to actual pins, the enumeration will</div><div class='add'>+be like this, walking around the edge of the chip, which seems to be industry</div><div class='ctx'> standard too (all these pads had names, too)::</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -132,50 +131,38 @@ on { 0, 8, 16, 24 }, and a group of pins dealing with an I2C interface on pins</div><div class='ctx'> on { 24, 25 }.</div><div class='ctx'> </div><div class='ctx'> These two groups are presented to the pin control subsystem by implementing</div><div class='del'>-some generic pinctrl_ops like this::</div><div class='add'>+some generic ``pinctrl_ops`` like this:</div><div class='ctx'> </div><div class='del'>-	#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='del'>-	struct foo_group {</div><div class='del'>-		const char *name;</div><div class='del'>-		const unsigned int *pins;</div><div class='del'>-		const unsigned num_pins;</div><div class='del'>-	};</div><div class='add'>+	#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	static const unsigned int spi0_pins[] = { 0, 8, 16, 24 };</div><div class='ctx'> 	static const unsigned int i2c0_pins[] = { 24, 25 };</div><div class='ctx'> </div><div class='del'>-	static const struct foo_group foo_groups[] = {</div><div class='del'>-		{</div><div class='del'>-			.name = "spi0_grp",</div><div class='del'>-			.pins = spi0_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(spi0_pins),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "i2c0_grp",</div><div class='del'>-			.pins = i2c0_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(i2c0_pins),</div><div class='del'>-		},</div><div class='add'>+	static const struct pingroup foo_groups[] = {</div><div class='add'>+		PINCTRL_PINGROUP("spi0_grp", spi0_pins, ARRAY_SIZE(spi0_pins)),</div><div class='add'>+		PINCTRL_PINGROUP("i2c0_grp", i2c0_pins, ARRAY_SIZE(i2c0_pins)),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	static int foo_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> 	{</div><div class='ctx'> 		return ARRAY_SIZE(foo_groups);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	static const char *foo_get_group_name(struct pinctrl_dev *pctldev,</div><div class='del'>-					unsigned selector)</div><div class='add'>+					      unsigned int selector)</div><div class='ctx'> 	{</div><div class='ctx'> 		return foo_groups[selector].name;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='del'>-				const unsigned **pins,</div><div class='del'>-				unsigned *num_pins)</div><div class='add'>+	static int foo_get_group_pins(struct pinctrl_dev *pctldev,</div><div class='add'>+				      unsigned int selector,</div><div class='add'>+				      const unsigned int **pins,</div><div class='add'>+				      unsigned int *npins)</div><div class='ctx'> 	{</div><div class='del'>-		*pins = (unsigned *) foo_groups[selector].pins;</div><div class='del'>-		*num_pins = foo_groups[selector].num_pins;</div><div class='add'>+		*pins = foo_groups[selector].pins;</div><div class='add'>+		*npins = foo_groups[selector].npins;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -185,13 +172,12 @@ some generic pinctrl_ops like this::</div><div class='ctx'> 		.get_group_pins = foo_get_group_pins,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	static struct pinctrl_desc foo_desc = {</div><div class='del'>-	...</div><div class='del'>-	.pctlops = &amp;foo_pctrl_ops,</div><div class='add'>+		...</div><div class='add'>+		.pctlops = &amp;foo_pctrl_ops,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-The pin control subsystem will call the .get_groups_count() function to</div><div class='add'>+The pin control subsystem will call the ``.get_groups_count()`` function to</div><div class='ctx'> determine the total number of legal selectors, then it will call the other functions</div><div class='ctx'> to retrieve the name and pins of the group. Maintaining the data structure of</div><div class='ctx'> the groups is up to the driver, this is just a simple example - in practice you</div><div class='hunk'>@@ -204,59 +190,62 @@ Pin configuration</div><div class='ctx'> </div><div class='ctx'> Pins can sometimes be software-configured in various ways, mostly related</div><div class='ctx'> to their electronic properties when used as inputs or outputs. For example you</div><div class='del'>-may be able to make an output pin high impedance, or "tristate" meaning it is</div><div class='add'>+may be able to make an output pin high impedance (Hi-Z), or "tristate" meaning it is</div><div class='ctx'> effectively disconnected. You may be able to connect an input pin to VDD or GND</div><div class='ctx'> using a certain resistor value - pull up and pull down - so that the pin has a</div><div class='ctx'> stable value when nothing is driving the rail it is connected to, or when it's</div><div class='ctx'> unconnected.</div><div class='ctx'> </div><div class='ctx'> Pin configuration can be programmed by adding configuration entries into the</div><div class='del'>-mapping table; see section "Board/machine configuration" below.</div><div class='add'>+mapping table; see section `Board/machine configuration`_ below.</div><div class='ctx'> </div><div class='ctx'> The format and meaning of the configuration parameter, PLATFORM_X_PULL_UP</div><div class='ctx'> above, is entirely defined by the pin controller driver.</div><div class='ctx'> </div><div class='ctx'> The pin configuration driver implements callbacks for changing pin</div><div class='del'>-configuration in the pin controller ops like this::</div><div class='add'>+configuration in the pin controller ops like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='del'>-	#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> 	#include &lt;linux/pinctrl/pinconf.h&gt;</div><div class='add'>+	#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='add'>+</div><div class='ctx'> 	#include "platform_x_pindefs.h"</div><div class='ctx'> </div><div class='ctx'> 	static int foo_pin_config_get(struct pinctrl_dev *pctldev,</div><div class='del'>-			unsigned offset,</div><div class='del'>-			unsigned long *config)</div><div class='add'>+				      unsigned int offset,</div><div class='add'>+				      unsigned long *config)</div><div class='ctx'> 	{</div><div class='ctx'> 		struct my_conftype conf;</div><div class='ctx'> </div><div class='del'>-		... Find setting for pin @ offset ...</div><div class='add'>+		/* ... Find setting for pin @ offset ... */</div><div class='ctx'> </div><div class='ctx'> 		*config = (unsigned long) conf;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	static int foo_pin_config_set(struct pinctrl_dev *pctldev,</div><div class='del'>-			unsigned offset,</div><div class='del'>-			unsigned long config)</div><div class='add'>+				      unsigned int offset,</div><div class='add'>+				      unsigned long config)</div><div class='ctx'> 	{</div><div class='ctx'> 		struct my_conftype *conf = (struct my_conftype *) config;</div><div class='ctx'> </div><div class='ctx'> 		switch (conf) {</div><div class='ctx'> 			case PLATFORM_X_PULL_UP:</div><div class='ctx'> 			...</div><div class='del'>-			}</div><div class='add'>+			break;</div><div class='ctx'> 		}</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int foo_pin_config_group_get (struct pinctrl_dev *pctldev,</div><div class='del'>-			unsigned selector,</div><div class='del'>-			unsigned long *config)</div><div class='add'>+	static int foo_pin_config_group_get(struct pinctrl_dev *pctldev,</div><div class='add'>+					    unsigned selector,</div><div class='add'>+					    unsigned long *config)</div><div class='ctx'> 	{</div><div class='ctx'> 		...</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int foo_pin_config_group_set (struct pinctrl_dev *pctldev,</div><div class='del'>-			unsigned selector,</div><div class='del'>-			unsigned long config)</div><div class='add'>+	static int foo_pin_config_group_set(struct pinctrl_dev *pctldev,</div><div class='add'>+					    unsigned selector,</div><div class='add'>+					    unsigned long config)</div><div class='ctx'> 	{</div><div class='ctx'> 		...</div><div class='ctx'> 	}</div><div class='hunk'>@@ -281,8 +270,8 @@ The GPIO drivers may want to perform operations of various types on the same</div><div class='ctx'> physical pins that are also registered as pin controller pins.</div><div class='ctx'> </div><div class='ctx'> First and foremost, the two subsystems can be used as completely orthogonal,</div><div class='del'>-see the section named "pin control requests from drivers" and</div><div class='del'>-"drivers needing both pin control and GPIOs" below for details. But in some</div><div class='add'>+see the section named `Pin control requests from drivers`_ and</div><div class='add'>+`Drivers needing both pin control and GPIOs`_ below for details. But in some</div><div class='ctx'> situations a cross-subsystem mapping between pins and GPIOs is needed.</div><div class='ctx'> </div><div class='ctx'> Since the pin controller subsystem has its pinspace local to the pin controller</div><div class='hunk'>@@ -291,7 +280,13 @@ controller handles control of a certain GPIO pin. Since a single pin controller</div><div class='ctx'> may be muxing several GPIO ranges (typically SoCs that have one set of pins,</div><div class='ctx'> but internally several GPIO silicon blocks, each modelled as a struct</div><div class='ctx'> gpio_chip) any number of GPIO ranges can be added to a pin controller instance</div><div class='del'>-like this::</div><div class='add'>+like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	#include &lt;linux/gpio/driver.h&gt;</div><div class='add'>+</div><div class='add'>+	#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	struct gpio_chip chip_a;</div><div class='ctx'> 	struct gpio_chip chip_b;</div><div class='hunk'>@@ -302,7 +297,7 @@ like this::</div><div class='ctx'> 		.base = 32,</div><div class='ctx'> 		.pin_base = 32,</div><div class='ctx'> 		.npins = 16,</div><div class='del'>-		.gc = &amp;chip_a;</div><div class='add'>+		.gc = &amp;chip_a,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	static struct pinctrl_gpio_range gpio_range_b = {</div><div class='hunk'>@@ -314,16 +309,18 @@ like this::</div><div class='ctx'> 		.gc = &amp;chip_b;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='add'>+	int __init foo_init(void)</div><div class='ctx'> 	{</div><div class='ctx'> 		struct pinctrl_dev *pctl;</div><div class='ctx'> 		...</div><div class='ctx'> 		pinctrl_add_gpio_range(pctl, &amp;gpio_range_a);</div><div class='ctx'> 		pinctrl_add_gpio_range(pctl, &amp;gpio_range_b);</div><div class='add'>+		...</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> So this complex system has one pin controller handling two different</div><div class='ctx'> GPIO chips. "chip a" has 16 pins and "chip b" has 8 pins. The "chip a" and</div><div class='del'>-"chip b" have different .pin_base, which means a start pin number of the</div><div class='add'>+"chip b" have different ``pin_base``, which means a start pin number of the</div><div class='ctx'> GPIO range.</div><div class='ctx'> </div><div class='ctx'> The GPIO range of "chip a" starts from the GPIO base of 32 and actual</div><div class='hunk'>@@ -331,7 +328,7 @@ pin range also starts from 32. However "chip b" has different starting</div><div class='ctx'> offset for the GPIO range and pin range. The GPIO range of "chip b" starts</div><div class='ctx'> from GPIO number 48, while the pin range of "chip b" starts from 64.</div><div class='ctx'> </div><div class='del'>-We can convert a gpio number to actual pin number using this "pin_base".</div><div class='add'>+We can convert a gpio number to actual pin number using this ``pin_base``.</div><div class='ctx'> They are mapped in the global GPIO pin space at:</div><div class='ctx'> </div><div class='ctx'> chip a:</div><div class='hunk'>@@ -343,9 +340,11 @@ chip b:</div><div class='ctx'> </div><div class='ctx'> The above examples assume the mapping between the GPIOs and pins is</div><div class='ctx'> linear. If the mapping is sparse or haphazard, an array of arbitrary pin</div><div class='del'>-numbers can be encoded in the range like this::</div><div class='add'>+numbers can be encoded in the range like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='del'>-	static const unsigned range_pins[] = { 14, 1, 22, 17, 10, 8, 6, 2 };</div><div class='add'>+	static const unsigned int range_pins[] = { 14, 1, 22, 17, 10, 8, 6, 2 };</div><div class='ctx'> </div><div class='ctx'> 	static struct pinctrl_gpio_range gpio_range = {</div><div class='ctx'> 		.name = "chip",</div><div class='hunk'>@@ -353,16 +352,17 @@ numbers can be encoded in the range like this::</div><div class='ctx'> 		.base = 32,</div><div class='ctx'> 		.pins = &amp;range_pins,</div><div class='ctx'> 		.npins = ARRAY_SIZE(range_pins),</div><div class='del'>-		.gc = &amp;chip;</div><div class='add'>+		.gc = &amp;chip,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-In this case the pin_base property will be ignored. If the name of a pin</div><div class='add'>+In this case the ``pin_base`` property will be ignored. If the name of a pin</div><div class='ctx'> group is known, the pins and npins elements of the above structure can be</div><div class='del'>-initialised using the function pinctrl_get_group_pins(), e.g. for pin</div><div class='del'>-group "foo"::</div><div class='add'>+initialised using the function ``pinctrl_get_group_pins()``, e.g. for pin</div><div class='add'>+group "foo":</div><div class='ctx'> </div><div class='del'>-	pinctrl_get_group_pins(pctl, "foo", &amp;gpio_range.pins,</div><div class='del'>-			       &amp;gpio_range.npins);</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	pinctrl_get_group_pins(pctl, "foo", &amp;gpio_range.pins, &amp;gpio_range.npins);</div><div class='ctx'> </div><div class='ctx'> When GPIO-specific functions in the pin control subsystem are called, these</div><div class='ctx'> ranges will be used to look up the appropriate pin controller by inspecting</div><div class='hunk'>@@ -378,8 +378,8 @@ will get a pin number into its handled number range. Further it is also passed</div><div class='ctx'> the range ID value, so that the pin controller knows which range it should</div><div class='ctx'> deal with.</div><div class='ctx'> </div><div class='del'>-Calling pinctrl_add_gpio_range from pinctrl driver is DEPRECATED. Please see</div><div class='del'>-section 2.1 of Documentation/devicetree/bindings/gpio/gpio.txt on how to bind</div><div class='add'>+Calling ``pinctrl_add_gpio_range()`` from pinctrl driver is DEPRECATED. Please see</div><div class='add'>+section 2.1 of ``Documentation/devicetree/bindings/gpio/gpio.txt`` on how to bind</div><div class='ctx'> pinctrl and gpio drivers.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -466,10 +466,10 @@ in your machine configuration. It is inspired by the clk, GPIO and regulator</div><div class='ctx'> subsystems, so devices will request their mux setting, but it's also possible</div><div class='ctx'> to request a single pin for e.g. GPIO.</div><div class='ctx'> </div><div class='del'>-Definitions:</div><div class='add'>+The conventions are:</div><div class='ctx'> </div><div class='ctx'> - FUNCTIONS can be switched in and out by a driver residing with the pin</div><div class='del'>-  control subsystem in the drivers/pinctrl/* directory of the kernel. The</div><div class='add'>+  control subsystem in the ``drivers/pinctrl`` directory of the kernel. The</div><div class='ctx'>   pin control driver knows the possible functions. In the example above you can</div><div class='ctx'>   identify three pinmux functions, one for spi, one for i2c and one for mmc.</div><div class='ctx'> </div><div class='hunk'>@@ -515,11 +515,13 @@ Definitions:</div><div class='ctx'>   In the example case we can define that this particular machine shall</div><div class='ctx'>   use device spi0 with pinmux function fspi0 group gspi0 and i2c0 on function</div><div class='ctx'>   fi2c0 group gi2c0, on the primary pin controller, we get mappings</div><div class='del'>-  like these::</div><div class='add'>+  like these:</div><div class='add'>+</div><div class='add'>+  .. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='ctx'> 		{"map-spi0", spi0, pinctrl0, fspi0, gspi0},</div><div class='del'>-		{"map-i2c0", i2c0, pinctrl0, fi2c0, gi2c0}</div><div class='add'>+		{"map-i2c0", i2c0, pinctrl0, fi2c0, gi2c0},</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'>   Every map must be assigned a state name, pin controller, device and</div><div class='hunk'>@@ -569,80 +571,51 @@ is possible to perform the requested mux setting, poke the hardware so that</div><div class='ctx'> this happens.</div><div class='ctx'> </div><div class='ctx'> Pinmux drivers are required to supply a few callback functions, some are</div><div class='del'>-optional. Usually the set_mux() function is implemented, writing values into</div><div class='add'>+optional. Usually the ``.set_mux()`` function is implemented, writing values into</div><div class='ctx'> some certain registers to activate a certain mux setting for a certain pin.</div><div class='ctx'> </div><div class='del'>-A simple driver for the above example will work by setting bits 0, 1, 2, 3 or 4</div><div class='add'>+A simple driver for the above example will work by setting bits 0, 1, 2, 3, 4, or 5</div><div class='ctx'> into some register named MUX to select a certain function with a certain</div><div class='del'>-group of pins would work something like this::</div><div class='add'>+group of pins would work something like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/pinctrl/pinctrl.h&gt;</div><div class='ctx'> 	#include &lt;linux/pinctrl/pinmux.h&gt;</div><div class='ctx'> </div><div class='del'>-	struct foo_group {</div><div class='del'>-		const char *name;</div><div class='del'>-		const unsigned int *pins;</div><div class='del'>-		const unsigned num_pins;</div><div class='del'>-	};</div><div class='del'>-</div><div class='del'>-	static const unsigned spi0_0_pins[] = { 0, 8, 16, 24 };</div><div class='del'>-	static const unsigned spi0_1_pins[] = { 38, 46, 54, 62 };</div><div class='del'>-	static const unsigned i2c0_pins[] = { 24, 25 };</div><div class='del'>-	static const unsigned mmc0_1_pins[] = { 56, 57 };</div><div class='del'>-	static const unsigned mmc0_2_pins[] = { 58, 59 };</div><div class='del'>-	static const unsigned mmc0_3_pins[] = { 60, 61, 62, 63 };</div><div class='del'>-</div><div class='del'>-	static const struct foo_group foo_groups[] = {</div><div class='del'>-		{</div><div class='del'>-			.name = "spi0_0_grp",</div><div class='del'>-			.pins = spi0_0_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(spi0_0_pins),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "spi0_1_grp",</div><div class='del'>-			.pins = spi0_1_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(spi0_1_pins),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "i2c0_grp",</div><div class='del'>-			.pins = i2c0_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(i2c0_pins),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "mmc0_1_grp",</div><div class='del'>-			.pins = mmc0_1_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(mmc0_1_pins),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "mmc0_2_grp",</div><div class='del'>-			.pins = mmc0_2_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(mmc0_2_pins),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "mmc0_3_grp",</div><div class='del'>-			.pins = mmc0_3_pins,</div><div class='del'>-			.num_pins = ARRAY_SIZE(mmc0_3_pins),</div><div class='del'>-		},</div><div class='add'>+	static const unsigned int spi0_0_pins[] = { 0, 8, 16, 24 };</div><div class='add'>+	static const unsigned int spi0_1_pins[] = { 38, 46, 54, 62 };</div><div class='add'>+	static const unsigned int i2c0_pins[] = { 24, 25 };</div><div class='add'>+	static const unsigned int mmc0_1_pins[] = { 56, 57 };</div><div class='add'>+	static const unsigned int mmc0_2_pins[] = { 58, 59 };</div><div class='add'>+	static const unsigned int mmc0_3_pins[] = { 60, 61, 62, 63 };</div><div class='add'>+</div><div class='add'>+	static const struct pingroup foo_groups[] = {</div><div class='add'>+		PINCTRL_PINGROUP("spi0_0_grp", spi0_0_pins, ARRAY_SIZE(spi0_0_pins)),</div><div class='add'>+		PINCTRL_PINGROUP("spi0_1_grp", spi0_1_pins, ARRAY_SIZE(spi0_1_pins)),</div><div class='add'>+		PINCTRL_PINGROUP("i2c0_grp", i2c0_pins, ARRAY_SIZE(i2c0_pins)),</div><div class='add'>+		PINCTRL_PINGROUP("mmc0_1_grp", mmc0_1_pins, ARRAY_SIZE(mmc0_1_pins)),</div><div class='add'>+		PINCTRL_PINGROUP("mmc0_2_grp", mmc0_2_pins, ARRAY_SIZE(mmc0_2_pins)),</div><div class='add'>+		PINCTRL_PINGROUP("mmc0_3_grp", mmc0_3_pins, ARRAY_SIZE(mmc0_3_pins)),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 	static int foo_get_groups_count(struct pinctrl_dev *pctldev)</div><div class='ctx'> 	{</div><div class='ctx'> 		return ARRAY_SIZE(foo_groups);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='ctx'> 	static const char *foo_get_group_name(struct pinctrl_dev *pctldev,</div><div class='del'>-					unsigned selector)</div><div class='add'>+					      unsigned int selector)</div><div class='ctx'> 	{</div><div class='ctx'> 		return foo_groups[selector].name;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='del'>-				const unsigned ** pins,</div><div class='del'>-				unsigned * num_pins)</div><div class='add'>+	static int foo_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,</div><div class='add'>+				      const unsigned int **pins,</div><div class='add'>+				      unsigned int *npins)</div><div class='ctx'> 	{</div><div class='del'>-		*pins = (unsigned *) foo_groups[selector].pins;</div><div class='del'>-		*num_pins = foo_groups[selector].num_pins;</div><div class='add'>+		*pins = foo_groups[selector].pins;</div><div class='add'>+		*npins = foo_groups[selector].npins;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -652,33 +625,14 @@ group of pins would work something like this::</div><div class='ctx'> 		.get_group_pins = foo_get_group_pins,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	struct foo_pmx_func {</div><div class='del'>-		const char *name;</div><div class='del'>-		const char * const *groups;</div><div class='del'>-		const unsigned num_groups;</div><div class='del'>-	};</div><div class='del'>-</div><div class='ctx'> 	static const char * const spi0_groups[] = { "spi0_0_grp", "spi0_1_grp" };</div><div class='ctx'> 	static const char * const i2c0_groups[] = { "i2c0_grp" };</div><div class='del'>-	static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp",</div><div class='del'>-						"mmc0_3_grp" };</div><div class='add'>+	static const char * const mmc0_groups[] = { "mmc0_1_grp", "mmc0_2_grp", "mmc0_3_grp" };</div><div class='ctx'> </div><div class='del'>-	static const struct foo_pmx_func foo_functions[] = {</div><div class='del'>-		{</div><div class='del'>-			.name = "spi0",</div><div class='del'>-			.groups = spi0_groups,</div><div class='del'>-			.num_groups = ARRAY_SIZE(spi0_groups),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "i2c0",</div><div class='del'>-			.groups = i2c0_groups,</div><div class='del'>-			.num_groups = ARRAY_SIZE(i2c0_groups),</div><div class='del'>-		},</div><div class='del'>-		{</div><div class='del'>-			.name = "mmc0",</div><div class='del'>-			.groups = mmc0_groups,</div><div class='del'>-			.num_groups = ARRAY_SIZE(mmc0_groups),</div><div class='del'>-		},</div><div class='add'>+	static const struct pinfunction foo_functions[] = {</div><div class='add'>+		PINCTRL_PINFUNCTION("spi0", spi0_groups, ARRAY_SIZE(spi0_groups)),</div><div class='add'>+		PINCTRL_PINFUNCTION("i2c0", i2c0_groups, ARRAY_SIZE(i2c0_groups)),</div><div class='add'>+		PINCTRL_PINFUNCTION("mmc0", mmc0_groups, ARRAY_SIZE(mmc0_groups)),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> 	static int foo_get_functions_count(struct pinctrl_dev *pctldev)</div><div class='hunk'>@@ -686,26 +640,26 @@ group of pins would work something like this::</div><div class='ctx'> 		return ARRAY_SIZE(foo_functions);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned selector)</div><div class='add'>+	static const char *foo_get_fname(struct pinctrl_dev *pctldev, unsigned int selector)</div><div class='ctx'> 	{</div><div class='ctx'> 		return foo_functions[selector].name;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='del'>-				const char * const **groups,</div><div class='del'>-				unsigned * const num_groups)</div><div class='add'>+	static int foo_get_groups(struct pinctrl_dev *pctldev, unsigned int selector,</div><div class='add'>+				  const char * const **groups,</div><div class='add'>+				  unsigned int * const ngroups)</div><div class='ctx'> 	{</div><div class='ctx'> 		*groups = foo_functions[selector].groups;</div><div class='del'>-		*num_groups = foo_functions[selector].num_groups;</div><div class='add'>+		*ngroups = foo_functions[selector].ngroups;</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-	static int foo_set_mux(struct pinctrl_dev *pctldev, unsigned selector,</div><div class='del'>-			unsigned group)</div><div class='add'>+	static int foo_set_mux(struct pinctrl_dev *pctldev, unsigned int selector,</div><div class='add'>+			       unsigned int group)</div><div class='ctx'> 	{</div><div class='del'>-		u8 regbit = (1 &lt;&lt; selector + group);</div><div class='add'>+		u8 regbit = BIT(group);</div><div class='ctx'> </div><div class='del'>-		writeb((readb(MUX)|regbit), MUX);</div><div class='add'>+		writeb((readb(MUX) | regbit), MUX);</div><div class='ctx'> 		return 0;</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -724,16 +678,17 @@ group of pins would work something like this::</div><div class='ctx'> 		.pmxops = &amp;foo_pmxops,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-In the example activating muxing 0 and 1 at the same time setting bits</div><div class='del'>-0 and 1, uses one pin in common so they would collide.</div><div class='add'>+In the example activating muxing 0 and 2 at the same time setting bits</div><div class='add'>+0 and 2, uses pin 24 in common so they would collide. All the same for</div><div class='add'>+the muxes 1 and 5, which have pin 62 in common.</div><div class='ctx'> </div><div class='ctx'> The beauty of the pinmux subsystem is that since it keeps track of all</div><div class='ctx'> pins and who is using them, it will already have denied an impossible</div><div class='ctx'> request like that, so the driver does not need to worry about such</div><div class='ctx'> things - when it gets a selector passed in, the pinmux subsystem makes</div><div class='ctx'> sure no other device or GPIO assignment is already using the selected</div><div class='del'>-pins. Thus bits 0 and 1 in the control register will never be set at the</div><div class='del'>-same time.</div><div class='add'>+pins. Thus bits 0 and 2, or 1 and 5 in the control register will never</div><div class='add'>+be set at the same time.</div><div class='ctx'> </div><div class='ctx'> All the above functions are mandatory to implement for a pinmux driver.</div><div class='ctx'> </div><div class='hunk'>@@ -742,18 +697,18 @@ Pin control interaction with the GPIO subsystem</div><div class='ctx'> ===============================================</div><div class='ctx'> </div><div class='ctx'> Note that the following implies that the use case is to use a certain pin</div><div class='del'>-from the Linux kernel using the API in &lt;linux/gpio.h&gt; with gpio_request()</div><div class='add'>+from the Linux kernel using the API in ``&lt;linux/gpio/consumer.h&gt;`` with gpiod_get()</div><div class='ctx'> and similar functions. There are cases where you may be using something</div><div class='ctx'> that your datasheet calls "GPIO mode", but actually is just an electrical</div><div class='ctx'> configuration for a certain device. See the section below named</div><div class='del'>-"GPIO mode pitfalls" for more details on this scenario.</div><div class='add'>+`GPIO mode pitfalls`_ for more details on this scenario.</div><div class='ctx'> </div><div class='del'>-The public pinmux API contains two functions named pinctrl_gpio_request()</div><div class='del'>-and pinctrl_gpio_free(). These two functions shall *ONLY* be called from</div><div class='del'>-gpiolib-based drivers as part of their gpio_request() and</div><div class='del'>-gpio_free() semantics. Likewise the pinctrl_gpio_direction_[input|output]</div><div class='del'>-shall only be called from within respective gpio_direction_[input|output]</div><div class='del'>-gpiolib implementation.</div><div class='add'>+The public pinmux API contains two functions named ``pinctrl_gpio_request()``</div><div class='add'>+and ``pinctrl_gpio_free()``. These two functions shall *ONLY* be called from</div><div class='add'>+gpiolib-based drivers as part of their ``.request()`` and ``.free()`` semantics.</div><div class='add'>+Likewise the ``pinctrl_gpio_direction_input()`` / ``pinctrl_gpio_direction_output()``</div><div class='add'>+shall only be called from within respective ``.direction_input()`` /</div><div class='add'>+``.direction_output()`` gpiolib implementation.</div><div class='ctx'> </div><div class='ctx'> NOTE that platforms and individual drivers shall *NOT* request GPIO pins to be</div><div class='ctx'> controlled e.g. muxed in. Instead, implement a proper gpiolib driver and have</div><div class='hunk'>@@ -767,8 +722,8 @@ In this case, the function array would become 64 entries for each GPIO</div><div class='ctx'> setting and then the device functions.</div><div class='ctx'> </div><div class='ctx'> For this reason there are two functions a pin control driver can implement</div><div class='del'>-to enable only GPIO on an individual pin: .gpio_request_enable() and</div><div class='del'>-.gpio_disable_free().</div><div class='add'>+to enable only GPIO on an individual pin: ``.gpio_request_enable()`` and</div><div class='add'>+``.gpio_disable_free()``.</div><div class='ctx'> </div><div class='ctx'> This function will pass in the affected GPIO range identified by the pin</div><div class='ctx'> controller core, so you know which GPIO pins are being affected by the request</div><div class='hunk'>@@ -776,12 +731,12 @@ operation.</div><div class='ctx'> </div><div class='ctx'> If your driver needs to have an indication from the framework of whether the</div><div class='ctx'> GPIO pin shall be used for input or output you can implement the</div><div class='del'>-.gpio_set_direction() function. As described this shall be called from the</div><div class='add'>+``.gpio_set_direction()`` function. As described this shall be called from the</div><div class='ctx'> gpiolib driver and the affected GPIO range, pin offset and desired direction</div><div class='ctx'> will be passed along to this function.</div><div class='ctx'> </div><div class='ctx'> Alternatively to using these special functions, it is fully allowed to use</div><div class='del'>-named functions for each GPIO pin, the pinctrl_gpio_request() will attempt to</div><div class='add'>+named functions for each GPIO pin, the ``pinctrl_gpio_request()`` will attempt to</div><div class='ctx'> obtain the function "gpioN" where "N" is the global GPIO pin number if no</div><div class='ctx'> special GPIO-handler is registered.</div><div class='ctx'> </div><div class='hunk'>@@ -794,7 +749,7 @@ is taken to mean different things than what the kernel does, the developer</div><div class='ctx'> may be confused by a datasheet talking about a pin being possible to set</div><div class='ctx'> into "GPIO mode". It appears that what hardware engineers mean with</div><div class='ctx'> "GPIO mode" is not necessarily the use case that is implied in the kernel</div><div class='del'>-interface &lt;linux/gpio.h&gt;: a pin that you grab from kernel code and then</div><div class='add'>+interface ``&lt;linux/gpio/consumer.h&gt;``: a pin that you grab from kernel code and then</div><div class='ctx'> either listen for input or drive high/low to assert/deassert some</div><div class='ctx'> external line.</div><div class='ctx'> </div><div class='hunk'>@@ -805,9 +760,10 @@ for a device.</div><div class='ctx'> </div><div class='ctx'> The GPIO portions of a pin and its relation to a certain pin controller</div><div class='ctx'> configuration and muxing logic can be constructed in several ways. Here</div><div class='del'>-are two examples::</div><div class='add'>+are two examples.</div><div class='add'>+</div><div class='add'>+Example **(A)**::</div><div class='ctx'> </div><div class='del'>-     (A)</div><div class='ctx'>                        pin config</div><div class='ctx'>                        logic regs</div><div class='ctx'>                        |               +- SPI</div><div class='hunk'>@@ -836,9 +792,7 @@ simultaneous access to the same pin from GPIO and pin multiplexing</div><div class='ctx'> consumers on hardware of this type. The pinctrl driver should set this flag</div><div class='ctx'> accordingly.</div><div class='ctx'> </div><div class='del'>-::</div><div class='del'>-</div><div class='del'>-     (B)</div><div class='add'>+Example **(B)**::</div><div class='ctx'> </div><div class='ctx'>                        pin config</div><div class='ctx'>                        logic regs</div><div class='hunk'>@@ -882,7 +836,7 @@ hardware and shall be put into different subsystems:</div><div class='ctx'> </div><div class='ctx'> Depending on the exact HW register design, some functions exposed by the</div><div class='ctx'> GPIO subsystem may call into the pinctrl subsystem in order to</div><div class='del'>-co-ordinate register settings across HW modules. In particular, this may</div><div class='add'>+coordinate register settings across HW modules. In particular, this may</div><div class='ctx'> be needed for HW with separate GPIO and pin controller HW modules, where</div><div class='ctx'> e.g. GPIO direction is determined by a register in the pin controller HW</div><div class='ctx'> module rather than the GPIO HW module.</div><div class='hunk'>@@ -899,14 +853,14 @@ If you make a 1-to-1 map to the GPIO subsystem for this pin, you may start</div><div class='ctx'> to think that you need to come up with something really complex, that the</div><div class='ctx'> pin shall be used for UART TX and GPIO at the same time, that you will grab</div><div class='ctx'> a pin control handle and set it to a certain state to enable UART TX to be</div><div class='del'>-muxed in, then twist it over to GPIO mode and use gpio_direction_output()</div><div class='add'>+muxed in, then twist it over to GPIO mode and use gpiod_direction_output()</div><div class='ctx'> to drive it low during sleep, then mux it over to UART TX again when you</div><div class='del'>-wake up and maybe even gpio_request/gpio_free as part of this cycle. This</div><div class='add'>+wake up and maybe even gpiod_get() / gpiod_put() as part of this cycle. This</div><div class='ctx'> all gets very complicated.</div><div class='ctx'> </div><div class='ctx'> The solution is to not think that what the datasheet calls "GPIO mode"</div><div class='del'>-has to be handled by the &lt;linux/gpio.h&gt; interface. Instead view this as</div><div class='del'>-a certain pin config setting. Look in e.g. &lt;linux/pinctrl/pinconf-generic.h&gt;</div><div class='add'>+has to be handled by the ``&lt;linux/gpio/consumer.h&gt;`` interface. Instead view this as</div><div class='add'>+a certain pin config setting. Look in e.g. ``&lt;linux/pinctrl/pinconf-generic.h&gt;``</div><div class='ctx'> and you find this in the documentation:</div><div class='ctx'> </div><div class='ctx'>   PIN_CONFIG_OUTPUT:</div><div class='hunk'>@@ -915,7 +869,9 @@ and you find this in the documentation:</div><div class='ctx'> </div><div class='ctx'> So it is perfectly possible to push a pin into "GPIO mode" and drive the</div><div class='ctx'> line low as part of the usual pin control map. So for example your UART</div><div class='del'>-driver may look like this::</div><div class='add'>+driver may look like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -928,13 +884,13 @@ driver may look like this::</div><div class='ctx'> </div><div class='ctx'> 	/* Normal mode */</div><div class='ctx'> 	retval = pinctrl_select_state(pinctrl, pins_default);</div><div class='add'>+</div><div class='ctx'> 	/* Sleep mode */</div><div class='ctx'> 	retval = pinctrl_select_state(pinctrl, pins_sleep);</div><div class='ctx'> </div><div class='ctx'> And your machine configuration may look like this:</div><div class='del'>---------------------------------------------------</div><div class='ctx'> </div><div class='del'>-::</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	static unsigned long uart_default_mode[] = {</div><div class='ctx'> 		PIN_CONF_PACKED(PIN_CONFIG_DRIVE_PUSH_PULL, 0),</div><div class='hunk'>@@ -946,16 +902,17 @@ And your machine configuration may look like this:</div><div class='ctx'> </div><div class='ctx'> 	static struct pinctrl_map pinmap[] __initdata = {</div><div class='ctx'> 		PIN_MAP_MUX_GROUP("uart", PINCTRL_STATE_DEFAULT, "pinctrl-foo",</div><div class='del'>-			"u0_group", "u0"),</div><div class='add'>+				  "u0_group", "u0"),</div><div class='ctx'> 		PIN_MAP_CONFIGS_PIN("uart", PINCTRL_STATE_DEFAULT, "pinctrl-foo",</div><div class='del'>-				"UART_TX_PIN", uart_default_mode),</div><div class='add'>+				    "UART_TX_PIN", uart_default_mode),</div><div class='ctx'> 		PIN_MAP_MUX_GROUP("uart", PINCTRL_STATE_SLEEP, "pinctrl-foo",</div><div class='del'>-			"u0_group", "gpio-mode"),</div><div class='add'>+				  "u0_group", "gpio-mode"),</div><div class='ctx'> 		PIN_MAP_CONFIGS_PIN("uart", PINCTRL_STATE_SLEEP, "pinctrl-foo",</div><div class='del'>-				"UART_TX_PIN", uart_sleep_mode),</div><div class='add'>+				    "UART_TX_PIN", uart_sleep_mode),</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	foo_init(void) {</div><div class='add'>+	foo_init(void)</div><div class='add'>+	{</div><div class='ctx'> 		pinctrl_register_mappings(pinmap, ARRAY_SIZE(pinmap));</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='hunk'>@@ -995,7 +952,9 @@ part of this.</div><div class='ctx'> </div><div class='ctx'> A pin controller configuration for a machine looks pretty much like a simple</div><div class='ctx'> regulator configuration, so for the example array above we want to enable i2c</div><div class='del'>-and spi on the second function mapping::</div><div class='add'>+and spi on the second function mapping:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/pinctrl/machine.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -1030,13 +989,17 @@ must match a function provided by the pinmux driver handling this pin range.</div><div class='ctx'> As you can see we may have several pin controllers on the system and thus</div><div class='ctx'> we need to specify which one of them contains the functions we wish to map.</div><div class='ctx'> </div><div class='del'>-You register this pinmux mapping to the pinmux subsystem by simply::</div><div class='add'>+You register this pinmux mapping to the pinmux subsystem by simply:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'>        ret = pinctrl_register_mappings(mapping, ARRAY_SIZE(mapping));</div><div class='ctx'> </div><div class='ctx'> Since the above construct is pretty common there is a helper macro to make</div><div class='ctx'> it even more compact which assumes you want to use pinctrl-foo and position</div><div class='del'>-0 for mapping, for example::</div><div class='add'>+0 for mapping, for example:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	static struct pinctrl_map mapping[] __initdata = {</div><div class='ctx'> 		PIN_MAP_MUX_GROUP("foo-i2c.o", PINCTRL_STATE_DEFAULT,</div><div class='hunk'>@@ -1046,7 +1009,9 @@ it even more compact which assumes you want to use pinctrl-foo and position</div><div class='ctx'> The mapping table may also contain pin configuration entries. It's common for</div><div class='ctx'> each pin/group to have a number of configuration entries that affect it, so</div><div class='ctx'> the table entries for configuration reference an array of config parameters</div><div class='del'>-and values. An example using the convenience macros is shown below::</div><div class='add'>+and values. An example using the convenience macros is shown below:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	static unsigned long i2c_grp_configs[] = {</div><div class='ctx'> 		FOO_PIN_DRIVEN,</div><div class='hunk'>@@ -1073,8 +1038,10 @@ Finally, some devices expect the mapping table to contain certain specific</div><div class='ctx'> named states. When running on hardware that doesn't need any pin controller</div><div class='ctx'> configuration, the mapping table must still contain those named states, in</div><div class='ctx'> order to explicitly indicate that the states were provided and intended to</div><div class='del'>-be empty. Table entry macro PIN_MAP_DUMMY_STATE serves the purpose of defining</div><div class='del'>-a named state without causing any pin controller to be programmed::</div><div class='add'>+be empty. Table entry macro ``PIN_MAP_DUMMY_STATE()`` serves the purpose of defining</div><div class='add'>+a named state without causing any pin controller to be programmed:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	static struct pinctrl_map mapping[] __initdata = {</div><div class='ctx'> 		PIN_MAP_DUMMY_STATE("foo-i2c.0", PINCTRL_STATE_DEFAULT),</div><div class='hunk'>@@ -1085,7 +1052,9 @@ Complex mappings</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='ctx'> As it is possible to map a function to different groups of pins an optional</div><div class='del'>-.group can be specified like this::</div><div class='add'>+.group can be specified like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	...</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1107,13 +1076,15 @@ As it is possible to map a function to different groups of pins an optional</div><div class='ctx'> 	...</div><div class='ctx'> </div><div class='ctx'> This example mapping is used to switch between two positions for spi0 at</div><div class='del'>-runtime, as described further below under the heading "Runtime pinmuxing".</div><div class='add'>+runtime, as described further below under the heading `Runtime pinmuxing`_.</div><div class='ctx'> </div><div class='ctx'> Further it is possible for one named state to affect the muxing of several</div><div class='ctx'> groups of pins, say for example in the mmc0 example above, where you can</div><div class='ctx'> additively expand the mmc0 bus from 2 to 4 to 8 pins. If we want to use all</div><div class='del'>-three groups for a total of 2+2+4 = 8 pins (for an 8-bit MMC bus as is the</div><div class='del'>-case), we define a mapping like this::</div><div class='add'>+three groups for a total of 2 + 2 + 4 = 8 pins (for an 8-bit MMC bus as is the</div><div class='add'>+case), we define a mapping like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	...</div><div class='ctx'> 	{</div><div class='hunk'>@@ -1167,13 +1138,17 @@ case), we define a mapping like this::</div><div class='ctx'> 	...</div><div class='ctx'> </div><div class='ctx'> The result of grabbing this mapping from the device with something like</div><div class='del'>-this (see next paragraph)::</div><div class='add'>+this (see next paragraph):</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	p = devm_pinctrl_get(dev);</div><div class='ctx'> 	s = pinctrl_lookup_state(p, "8bit");</div><div class='ctx'> 	ret = pinctrl_select_state(p, s);</div><div class='ctx'> </div><div class='del'>-or more simply::</div><div class='add'>+or more simply:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	p = devm_pinctrl_get_select(dev, "8bit");</div><div class='ctx'> </div><div class='hunk'>@@ -1188,7 +1163,7 @@ Pin control requests from drivers</div><div class='ctx'> =================================</div><div class='ctx'> </div><div class='ctx'> When a device driver is about to probe the device core will automatically</div><div class='del'>-attempt to issue pinctrl_get_select_default() on these devices.</div><div class='add'>+attempt to issue ``pinctrl_get_select_default()`` on these devices.</div><div class='ctx'> This way driver writers do not need to add any of the boilerplate code</div><div class='ctx'> of the type found below. However when doing fine-grained state selection</div><div class='ctx'> and not using the "default" state, you may have to do some device driver</div><div class='hunk'>@@ -1206,12 +1181,14 @@ some cases where a driver needs to e.g. switch between different mux mappings</div><div class='ctx'> at runtime this is not possible.</div><div class='ctx'> </div><div class='ctx'> A typical case is if a driver needs to switch bias of pins from normal</div><div class='del'>-operation and going to sleep, moving from the PINCTRL_STATE_DEFAULT to</div><div class='del'>-PINCTRL_STATE_SLEEP at runtime, re-biasing or even re-muxing pins to save</div><div class='add'>+operation and going to sleep, moving from the ``PINCTRL_STATE_DEFAULT`` to</div><div class='add'>+``PINCTRL_STATE_SLEEP`` at runtime, re-biasing or even re-muxing pins to save</div><div class='ctx'> current in sleep mode.</div><div class='ctx'> </div><div class='ctx'> A driver may request a certain control state to be activated, usually just the</div><div class='del'>-default state like this::</div><div class='add'>+default state like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -1238,7 +1215,7 @@ default state like this::</div><div class='ctx'> 			return PTR_ERR(foo-&gt;s);</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		ret = pinctrl_select_state(foo-&gt;s);</div><div class='add'>+		ret = pinctrl_select_state(foo-&gt;p, foo-&gt;s);</div><div class='ctx'> 		if (ret &lt; 0) {</div><div class='ctx'> 			/* FIXME: clean up "foo" here */</div><div class='ctx'> 			return ret;</div><div class='hunk'>@@ -1251,49 +1228,49 @@ arrangement on your bus.</div><div class='ctx'> </div><div class='ctx'> The semantics of the pinctrl APIs are:</div><div class='ctx'> </div><div class='del'>-- pinctrl_get() is called in process context to obtain a handle to all pinctrl</div><div class='add'>+- ``pinctrl_get()`` is called in process context to obtain a handle to all pinctrl</div><div class='ctx'>   information for a given client device. It will allocate a struct from the</div><div class='ctx'>   kernel memory to hold the pinmux state. All mapping table parsing or similar</div><div class='ctx'>   slow operations take place within this API.</div><div class='ctx'> </div><div class='del'>-- devm_pinctrl_get() is a variant of pinctrl_get() that causes pinctrl_put()</div><div class='add'>+- ``devm_pinctrl_get()`` is a variant of pinctrl_get() that causes ``pinctrl_put()``</div><div class='ctx'>   to be called automatically on the retrieved pointer when the associated</div><div class='ctx'>   device is removed. It is recommended to use this function over plain</div><div class='del'>-  pinctrl_get().</div><div class='add'>+  ``pinctrl_get()``.</div><div class='ctx'> </div><div class='del'>-- pinctrl_lookup_state() is called in process context to obtain a handle to a</div><div class='add'>+- ``pinctrl_lookup_state()`` is called in process context to obtain a handle to a</div><div class='ctx'>   specific state for a client device. This operation may be slow, too.</div><div class='ctx'> </div><div class='del'>-- pinctrl_select_state() programs pin controller hardware according to the</div><div class='add'>+- ``pinctrl_select_state()`` programs pin controller hardware according to the</div><div class='ctx'>   definition of the state as given by the mapping table. In theory, this is a</div><div class='ctx'>   fast-path operation, since it only involved blasting some register settings</div><div class='ctx'>   into hardware. However, note that some pin controllers may have their</div><div class='ctx'>   registers on a slow/IRQ-based bus, so client devices should not assume they</div><div class='del'>-  can call pinctrl_select_state() from non-blocking contexts.</div><div class='add'>+  can call ``pinctrl_select_state()`` from non-blocking contexts.</div><div class='ctx'> </div><div class='del'>-- pinctrl_put() frees all information associated with a pinctrl handle.</div><div class='add'>+- ``pinctrl_put()`` frees all information associated with a pinctrl handle.</div><div class='ctx'> </div><div class='del'>-- devm_pinctrl_put() is a variant of pinctrl_put() that may be used to</div><div class='del'>-  explicitly destroy a pinctrl object returned by devm_pinctrl_get().</div><div class='add'>+- ``devm_pinctrl_put()`` is a variant of ``pinctrl_put()`` that may be used to</div><div class='add'>+  explicitly destroy a pinctrl object returned by ``devm_pinctrl_get()``.</div><div class='ctx'>   However, use of this function will be rare, due to the automatic cleanup</div><div class='ctx'>   that will occur even without calling it.</div><div class='ctx'> </div><div class='del'>-  pinctrl_get() must be paired with a plain pinctrl_put().</div><div class='del'>-  pinctrl_get() may not be paired with devm_pinctrl_put().</div><div class='del'>-  devm_pinctrl_get() can optionally be paired with devm_pinctrl_put().</div><div class='del'>-  devm_pinctrl_get() may not be paired with plain pinctrl_put().</div><div class='add'>+  ``pinctrl_get()`` must be paired with a plain ``pinctrl_put()``.</div><div class='add'>+  ``pinctrl_get()`` may not be paired with ``devm_pinctrl_put()``.</div><div class='add'>+  ``devm_pinctrl_get()`` can optionally be paired with ``devm_pinctrl_put()``.</div><div class='add'>+  ``devm_pinctrl_get()`` may not be paired with plain ``pinctrl_put()``.</div><div class='ctx'> </div><div class='ctx'> Usually the pin control core handled the get/put pair and call out to the</div><div class='ctx'> device drivers bookkeeping operations, like checking available functions and</div><div class='del'>-the associated pins, whereas select_state pass on to the pin controller</div><div class='add'>+the associated pins, whereas ``pinctrl_select_state()`` pass on to the pin controller</div><div class='ctx'> driver which takes care of activating and/or deactivating the mux setting by</div><div class='ctx'> quickly poking some registers.</div><div class='ctx'> </div><div class='del'>-The pins are allocated for your device when you issue the devm_pinctrl_get()</div><div class='add'>+The pins are allocated for your device when you issue the ``devm_pinctrl_get()``</div><div class='ctx'> call, after this you should be able to see this in the debugfs listing of all</div><div class='ctx'> pins.</div><div class='ctx'> </div><div class='del'>-NOTE: the pinctrl system will return -EPROBE_DEFER if it cannot find the</div><div class='add'>+NOTE: the pinctrl system will return ``-EPROBE_DEFER`` if it cannot find the</div><div class='ctx'> requested pinctrl handles, for example if the pinctrl driver has not yet</div><div class='ctx'> registered. Thus make sure that the error path in your driver gracefully</div><div class='ctx'> cleans up and is ready to retry the probing later in the startup process.</div><div class='hunk'>@@ -1305,18 +1282,20 @@ Drivers needing both pin control and GPIOs</div><div class='ctx'> Again, it is discouraged to let drivers lookup and select pin control states</div><div class='ctx'> themselves, but again sometimes this is unavoidable.</div><div class='ctx'> </div><div class='del'>-So say that your driver is fetching its resources like this::</div><div class='add'>+So say that your driver is fetching its resources like this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='del'>-	#include &lt;linux/gpio.h&gt;</div><div class='add'>+	#include &lt;linux/gpio/consumer.h&gt;</div><div class='ctx'> </div><div class='ctx'> 	struct pinctrl *pinctrl;</div><div class='del'>-	int gpio;</div><div class='add'>+	struct gpio_desc *gpio;</div><div class='ctx'> </div><div class='ctx'> 	pinctrl = devm_pinctrl_get_select_default(&amp;dev);</div><div class='del'>-	gpio = devm_gpio_request(&amp;dev, 14, "foo");</div><div class='add'>+	gpio = devm_gpiod_get(&amp;dev, "foo");</div><div class='ctx'> </div><div class='del'>-Here we first request a certain pin state and then request GPIO 14 to be</div><div class='add'>+Here we first request a certain pin state and then request GPIO "foo" to be</div><div class='ctx'> used. If you're using the subsystems orthogonally like this, you should</div><div class='ctx'> nominally always get your pinctrl handle and select the desired pinctrl</div><div class='ctx'> state BEFORE requesting the GPIO. This is a semantic convention to avoid</div><div class='hunk'>@@ -1331,9 +1310,9 @@ probing, nevertheless orthogonal to the GPIO subsystem.</div><div class='ctx'> But there are also situations where it makes sense for the GPIO subsystem</div><div class='ctx'> to communicate directly with the pinctrl subsystem, using the latter as a</div><div class='ctx'> back-end. This is when the GPIO driver may call out to the functions</div><div class='del'>-described in the section "Pin control interaction with the GPIO subsystem"</div><div class='add'>+described in the section `Pin control interaction with the GPIO subsystem`_</div><div class='ctx'> above. This only involves per-pin multiplexing, and will be completely</div><div class='del'>-hidden behind the gpio_*() function namespace. In this case, the driver</div><div class='add'>+hidden behind the gpiod_*() function namespace. In this case, the driver</div><div class='ctx'> need not interact with the pin control subsystem at all.</div><div class='ctx'> </div><div class='ctx'> If a pin control driver and a GPIO driver is dealing with the same pins</div><div class='hunk'>@@ -1348,12 +1327,14 @@ System pin control hogging</div><div class='ctx'> ==========================</div><div class='ctx'> </div><div class='ctx'> Pin control map entries can be hogged by the core when the pin controller</div><div class='del'>-is registered. This means that the core will attempt to call pinctrl_get(),</div><div class='del'>-lookup_state() and select_state() on it immediately after the pin control</div><div class='del'>-device has been registered.</div><div class='add'>+is registered. This means that the core will attempt to call ``pinctrl_get()``,</div><div class='add'>+``pinctrl_lookup_state()`` and ``pinctrl_select_state()`` on it immediately after</div><div class='add'>+the pin control device has been registered.</div><div class='ctx'> </div><div class='ctx'> This occurs for mapping table entries where the client device name is equal</div><div class='del'>-to the pin controller device name, and the state name is PINCTRL_STATE_DEFAULT::</div><div class='add'>+to the pin controller device name, and the state name is ``PINCTRL_STATE_DEFAULT``:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	{</div><div class='ctx'> 		.dev_name = "pinctrl-foo",</div><div class='hunk'>@@ -1365,7 +1346,9 @@ to the pin controller device name, and the state name is PINCTRL_STATE_DEFAULT::</div><div class='ctx'> </div><div class='ctx'> Since it may be common to request the core to hog a few always-applicable</div><div class='ctx'> mux settings on the primary pin controller, there is a convenience macro for</div><div class='del'>-this::</div><div class='add'>+this:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-foo", NULL /* group */,</div><div class='ctx'> 				      "power_func")</div><div class='hunk'>@@ -1385,7 +1368,9 @@ function, but with different named in the mapping as described under</div><div class='ctx'> </div><div class='ctx'> This snippet first initializes a state object for both groups (in foo_probe()),</div><div class='ctx'> then muxes the function in the pins defined by group A, and finally muxes it in</div><div class='del'>-on the pins defined by group B::</div><div class='add'>+on the pins defined by group B:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	#include &lt;linux/pinctrl/consumer.h&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -1399,11 +1384,11 @@ on the pins defined by group B::</div><div class='ctx'> 		if (IS_ERR(p))</div><div class='ctx'> 			...</div><div class='ctx'> </div><div class='del'>-		s1 = pinctrl_lookup_state(foo-&gt;p, "pos-A");</div><div class='add'>+		s1 = pinctrl_lookup_state(p, "pos-A");</div><div class='ctx'> 		if (IS_ERR(s1))</div><div class='ctx'> 			...</div><div class='ctx'> </div><div class='del'>-		s2 = pinctrl_lookup_state(foo-&gt;p, "pos-B");</div><div class='add'>+		s2 = pinctrl_lookup_state(p, "pos-B");</div><div class='ctx'> 		if (IS_ERR(s2))</div><div class='ctx'> 			...</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1411,16 +1396,16 @@ on the pins defined by group B::</div><div class='ctx'> 	foo_switch()</div><div class='ctx'> 	{</div><div class='ctx'> 		/* Enable on position A */</div><div class='del'>-		ret = pinctrl_select_state(s1);</div><div class='add'>+		ret = pinctrl_select_state(p, s1);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-		...</div><div class='add'>+			...</div><div class='ctx'> </div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='ctx'> 		/* Enable on position B */</div><div class='del'>-		ret = pinctrl_select_state(s2);</div><div class='add'>+		ret = pinctrl_select_state(p, s2);</div><div class='ctx'> 		if (ret &lt; 0)</div><div class='del'>-		...</div><div class='add'>+			...</div><div class='ctx'> </div><div class='ctx'> 		...</div><div class='ctx'> 	}</div><div class='hunk'>@@ -1432,6 +1417,7 @@ can be used by different functions at different times on a running system.</div><div class='ctx'> </div><div class='ctx'> Debugfs files</div><div class='ctx'> =============</div><div class='add'>+</div><div class='ctx'> These files are created in ``/sys/kernel/debug/pinctrl``:</div><div class='ctx'> </div><div class='ctx'> - ``pinctrl-devices``: prints each pin controller device along with columns to</div><div class='hunk'>@@ -1440,7 +1426,7 @@ These files are created in ``/sys/kernel/debug/pinctrl``:</div><div class='ctx'> - ``pinctrl-handles``: prints each configured pin controller handle and the</div><div class='ctx'>   corresponding pinmux maps</div><div class='ctx'> </div><div class='del'>-- ``pinctrl-maps``: print all pinctrl maps</div><div class='add'>+- ``pinctrl-maps``: prints all pinctrl maps</div><div class='ctx'> </div><div class='ctx'> A sub-directory is created inside of ``/sys/kernel/debug/pinctrl`` for each pin</div><div class='ctx'> controller device containing these files:</div><div class='hunk'>@@ -1448,20 +1434,22 @@ controller device containing these files:</div><div class='ctx'> - ``pins``: prints a line for each pin registered on the pin controller. The</div><div class='ctx'>   pinctrl driver may add additional information such as register contents.</div><div class='ctx'> </div><div class='del'>-- ``gpio-ranges``: print ranges that map gpio lines to pins on the controller</div><div class='add'>+- ``gpio-ranges``: prints ranges that map gpio lines to pins on the controller</div><div class='ctx'> </div><div class='del'>-- ``pingroups``: print all pin groups registered on the pin controller</div><div class='add'>+- ``pingroups``: prints all pin groups registered on the pin controller</div><div class='ctx'> </div><div class='del'>-- ``pinconf-pins``: print pin config settings for each pin</div><div class='add'>+- ``pinconf-pins``: prints pin config settings for each pin</div><div class='ctx'> </div><div class='del'>-- ``pinconf-groups``: print pin config settings per pin group</div><div class='add'>+- ``pinconf-groups``: prints pin config settings per pin group</div><div class='ctx'> </div><div class='del'>-- ``pinmux-functions``: print each pin function along with the pin groups that</div><div class='add'>+- ``pinmux-functions``: prints each pin function along with the pin groups that</div><div class='ctx'>   map to the pin function</div><div class='ctx'> </div><div class='del'>-- ``pinmux-pins``: iterate through all pins and print mux owner, gpio owner</div><div class='add'>+- ``pinmux-pins``: iterates through all pins and prints mux owner, gpio owner</div><div class='ctx'>   and if the pin is a hog</div><div class='ctx'> </div><div class='del'>-- ``pinmux-select``: write to this file to activate a pin function for a group::</div><div class='add'>+- ``pinmux-select``: write to this file to activate a pin function for a group:</div><div class='add'>+</div><div class='add'>+  .. code-block:: sh</div><div class='ctx'> </div><div class='ctx'>         echo "&lt;group-name function-name&gt;" &gt; pinmux-select</div><div class='head'>diff --git a/Documentation/driver-api/pldmfw/index.rst b/Documentation/driver-api/pldmfw/index.rst<br/>index ad2c33ece30f..fd871b83f34f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/pldmfw/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/pldmfw/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/pldmfw/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/pldmfw/index.rst</a></div><div class='hunk'>@@ -20,7 +20,7 @@ Overview of the ``pldmfw`` library</div><div class='ctx'> </div><div class='ctx'> The ``pldmfw`` library is intended to be used by device drivers for</div><div class='ctx'> implementing device flash update based on firmware files following the PLDM</div><div class='del'>-firwmare file format.</div><div class='add'>+firmware file format.</div><div class='ctx'> </div><div class='ctx'> It is implemented using an ops table that allows device drivers to provide</div><div class='ctx'> the underlying device specific functionality.</div><div class='head'>diff --git a/Documentation/driver-api/pwm.rst b/Documentation/driver-api/pwm.rst<br/>index ccb06e485756..3fdc95f7a1d1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/pwm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/pwm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/pwm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/pwm.rst</a></div><div class='hunk'>@@ -35,13 +35,9 @@ consumers to providers, as given in the following example::</div><div class='ctx'> Using PWMs</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='del'>-Legacy users can request a PWM device using pwm_request() and free it</div><div class='del'>-after usage with pwm_free().</div><div class='del'>-</div><div class='del'>-New users should use the pwm_get() function and pass to it the consumer</div><div class='del'>-device or a consumer name. pwm_put() is used to free the PWM device. Managed</div><div class='del'>-variants of the getter, devm_pwm_get(), devm_of_pwm_get(),</div><div class='del'>-devm_fwnode_pwm_get(), also exist.</div><div class='add'>+Consumers use the pwm_get() function and pass to it the consumer device or a</div><div class='add'>+consumer name. pwm_put() is used to free the PWM device. Managed variants of</div><div class='add'>+the getter, devm_pwm_get() and devm_fwnode_pwm_get(), also exist.</div><div class='ctx'> </div><div class='ctx'> After being requested, a PWM has to be configured using::</div><div class='ctx'> </div><div class='hunk'>@@ -49,6 +45,12 @@ After being requested, a PWM has to be configured using::</div><div class='ctx'> </div><div class='ctx'> This API controls both the PWM period/duty_cycle config and the</div><div class='ctx'> enable/disable state.</div><div class='add'>+</div><div class='add'>+As a consumer, don't rely on the output's state for a disabled PWM. If it's</div><div class='add'>+easily possible, drivers are supposed to emit the inactive state, but some</div><div class='add'>+drivers cannot. If you rely on getting the inactive state, use .duty_cycle=0,</div><div class='add'>+.enabled=true.</div><div class='add'>+</div><div class='ctx'> There is also a usage_power setting: If set, the PWM driver is only required to</div><div class='ctx'> maintain the power output but has more freedom regarding signal form.</div><div class='ctx'> If supported by the driver, the signal can be optimized, for example to improve</div><div class='hunk'>@@ -160,8 +162,8 @@ consumers should implement it as described in the "Using PWMs" section.</div><div class='ctx'> Locking</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='del'>-The PWM core list manipulations are protected by a mutex, so pwm_request()</div><div class='del'>-and pwm_free() may not be called from an atomic context. Currently the</div><div class='add'>+The PWM core list manipulations are protected by a mutex, so pwm_get()</div><div class='add'>+and pwm_put() may not be called from an atomic context. Currently the</div><div class='ctx'> PWM core does not enforce any locking to pwm_enable(), pwm_disable() and</div><div class='ctx'> pwm_config(), so the calling context is currently driver specific. This</div><div class='ctx'> is an issue derived from the former barebone API and should be fixed soon.</div><div class='head'>diff --git a/Documentation/driver-api/serial/driver.rst b/Documentation/driver-api/serial/driver.rst<br/>index 06ec04ba086f..84b43061c11b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/driver.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/serial/driver.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/driver.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/serial/driver.rst</a></div><div class='hunk'>@@ -24,11 +24,11 @@ console support.</div><div class='ctx'> Console Support</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='del'>-The serial core provides a few helper functions.  This includes identifing</div><div class='del'>-the correct port structure (via uart_get_console) and decoding command line</div><div class='del'>-arguments (uart_parse_options).</div><div class='add'>+The serial core provides a few helper functions.  This includes identifying</div><div class='add'>+the correct port structure (via uart_get_console()) and decoding command line</div><div class='add'>+arguments (uart_parse_options()).</div><div class='ctx'> </div><div class='del'>-There is also a helper function (uart_console_write) which performs a</div><div class='add'>+There is also a helper function (uart_console_write()) which performs a</div><div class='ctx'> character by character write, translating newlines to CRLF sequences.</div><div class='ctx'> Driver writers are recommended to use this function rather than implementing</div><div class='ctx'> their own version.</div><div class='hunk'>@@ -39,7 +39,7 @@ Locking</div><div class='ctx'> </div><div class='ctx'> It is the responsibility of the low level hardware driver to perform the</div><div class='ctx'> necessary locking using port-&gt;lock.  There are some exceptions (which</div><div class='del'>-are described in the uart_ops listing below.)</div><div class='add'>+are described in the struct uart_ops listing below.)</div><div class='ctx'> </div><div class='ctx'> There are two locks.  A per-port spinlock, and an overall semaphore.</div><div class='ctx'> </div><div class='hunk'>@@ -63,442 +63,23 @@ commonly referred to as the port mutex.</div><div class='ctx'> uart_ops</div><div class='ctx'> --------</div><div class='ctx'> </div><div class='del'>-The uart_ops structure is the main interface between serial_core and the</div><div class='del'>-hardware specific driver.  It contains all the methods to control the</div><div class='del'>-hardware.</div><div class='del'>-</div><div class='del'>-  tx_empty(port)</div><div class='del'>-	This function tests whether the transmitter fifo and shifter</div><div class='del'>-	for the port described by 'port' is empty.  If it is empty,</div><div class='del'>-	this function should return TIOCSER_TEMT, otherwise return 0.</div><div class='del'>-	If the port does not support this operation, then it should</div><div class='del'>-	return TIOCSER_TEMT.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  set_mctrl(port, mctrl)</div><div class='del'>-	This function sets the modem control lines for port described</div><div class='del'>-	by 'port' to the state described by mctrl.  The relevant bits</div><div class='del'>-	of mctrl are:</div><div class='del'>-</div><div class='del'>-		- TIOCM_RTS	RTS signal.</div><div class='del'>-		- TIOCM_DTR	DTR signal.</div><div class='del'>-		- TIOCM_OUT1	OUT1 signal.</div><div class='del'>-		- TIOCM_OUT2	OUT2 signal.</div><div class='del'>-		- TIOCM_LOOP	Set the port into loopback mode.</div><div class='del'>-</div><div class='del'>-	If the appropriate bit is set, the signal should be driven</div><div class='del'>-	active.  If the bit is clear, the signal should be driven</div><div class='del'>-	inactive.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: locally disabled.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  get_mctrl(port)</div><div class='del'>-	Returns the current state of modem control inputs.  The state</div><div class='del'>-	of the outputs should not be returned, since the core keeps</div><div class='del'>-	track of their state.  The state information should include:</div><div class='del'>-</div><div class='del'>-		- TIOCM_CAR	state of DCD signal</div><div class='del'>-		- TIOCM_CTS	state of CTS signal</div><div class='del'>-		- TIOCM_DSR	state of DSR signal</div><div class='del'>-		- TIOCM_RI	state of RI signal</div><div class='del'>-</div><div class='del'>-	The bit is set if the signal is currently driven active.  If</div><div class='del'>-	the port does not support CTS, DCD or DSR, the driver should</div><div class='del'>-	indicate that the signal is permanently active.  If RI is</div><div class='del'>-	not available, the signal should not be indicated as active.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: locally disabled.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  stop_tx(port)</div><div class='del'>-	Stop transmitting characters.  This might be due to the CTS</div><div class='del'>-	line becoming inactive or the tty layer indicating we want</div><div class='del'>-	to stop transmission due to an XOFF character.</div><div class='del'>-</div><div class='del'>-	The driver should stop transmitting characters as soon as</div><div class='del'>-	possible.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: locally disabled.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  start_tx(port)</div><div class='del'>-	Start transmitting characters.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: locally disabled.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  throttle(port)</div><div class='del'>-	Notify the serial driver that input buffers for the line discipline are</div><div class='del'>-	close to full, and it should somehow signal that no more characters</div><div class='del'>-	should be sent to the serial port.</div><div class='del'>-	This will be called only if hardware assisted flow control is enabled.</div><div class='del'>-</div><div class='del'>-	Locking: serialized with .unthrottle() and termios modification by the</div><div class='del'>-	tty layer.</div><div class='del'>-</div><div class='del'>-  unthrottle(port)</div><div class='del'>-	Notify the serial driver that characters can now be sent to the serial</div><div class='del'>-	port without fear of overrunning the input buffers of the line</div><div class='del'>-	disciplines.</div><div class='del'>-</div><div class='del'>-	This will be called only if hardware assisted flow control is enabled.</div><div class='del'>-</div><div class='del'>-	Locking: serialized with .throttle() and termios modification by the</div><div class='del'>-	tty layer.</div><div class='del'>-</div><div class='del'>-  send_xchar(port,ch)</div><div class='del'>-	Transmit a high priority character, even if the port is stopped.</div><div class='del'>-	This is used to implement XON/XOFF flow control and tcflow().  If</div><div class='del'>-	the serial driver does not implement this function, the tty core</div><div class='del'>-	will append the character to the circular buffer and then call</div><div class='del'>-	start_tx() / stop_tx() to flush the data out.</div><div class='del'>-</div><div class='del'>-	Do not transmit if ch == '\0' (__DISABLED_CHAR).</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  stop_rx(port)</div><div class='del'>-	Stop receiving characters; the port is in the process of</div><div class='del'>-	being closed.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: locally disabled.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  enable_ms(port)</div><div class='del'>-	Enable the modem status interrupts.</div><div class='del'>-</div><div class='del'>-	This method may be called multiple times.  Modem status</div><div class='del'>-	interrupts should be disabled when the shutdown method is</div><div class='del'>-	called.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: locally disabled.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  break_ctl(port,ctl)</div><div class='del'>-	Control the transmission of a break signal.  If ctl is</div><div class='del'>-	nonzero, the break signal should be transmitted.  The signal</div><div class='del'>-	should be terminated when another call is made with a zero</div><div class='del'>-	ctl.</div><div class='del'>-</div><div class='del'>-	Locking: caller holds tty_port-&gt;mutex</div><div class='del'>-</div><div class='del'>-  startup(port)</div><div class='del'>-	Grab any interrupt resources and initialise any low level driver</div><div class='del'>-	state.  Enable the port for reception.  It should not activate</div><div class='del'>-	RTS nor DTR; this will be done via a separate call to set_mctrl.</div><div class='del'>-</div><div class='del'>-	This method will only be called when the port is initially opened.</div><div class='del'>-</div><div class='del'>-	Locking: port_sem taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: globally disabled.</div><div class='del'>-</div><div class='del'>-  shutdown(port)</div><div class='del'>-	Disable the port, disable any break condition that may be in</div><div class='del'>-	effect, and free any interrupt resources.  It should not disable</div><div class='del'>-	RTS nor DTR; this will have already been done via a separate</div><div class='del'>-	call to set_mctrl.</div><div class='del'>-</div><div class='del'>-	Drivers must not access port-&gt;state once this call has completed.</div><div class='del'>-</div><div class='del'>-	This method will only be called when there are no more users of</div><div class='del'>-	this port.</div><div class='del'>-</div><div class='del'>-	Locking: port_sem taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  flush_buffer(port)</div><div class='del'>-	Flush any write buffers, reset any DMA state and stop any</div><div class='del'>-	ongoing DMA transfers.</div><div class='del'>-</div><div class='del'>-	This will be called whenever the port-&gt;state-&gt;xmit circular</div><div class='del'>-	buffer is cleared.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: locally disabled.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  set_termios(port,termios,oldtermios)</div><div class='del'>-	Change the port parameters, including word length, parity, stop</div><div class='del'>-	bits.  Update read_status_mask and ignore_status_mask to indicate</div><div class='del'>-	the types of events we are interested in receiving.  Relevant</div><div class='del'>-	termios-&gt;c_cflag bits are:</div><div class='del'>-</div><div class='del'>-		CSIZE</div><div class='del'>-			- word size</div><div class='del'>-		CSTOPB</div><div class='del'>-			- 2 stop bits</div><div class='del'>-		PARENB</div><div class='del'>-			- parity enable</div><div class='del'>-		PARODD</div><div class='del'>-			- odd parity (when PARENB is in force)</div><div class='del'>-		CREAD</div><div class='del'>-			- enable reception of characters (if not set,</div><div class='del'>-			  still receive characters from the port, but</div><div class='del'>-			  throw them away.</div><div class='del'>-		CRTSCTS</div><div class='del'>-			- if set, enable CTS status change reporting</div><div class='del'>-		CLOCAL</div><div class='del'>-			- if not set, enable modem status change</div><div class='del'>-			  reporting.</div><div class='del'>-</div><div class='del'>-	Relevant termios-&gt;c_iflag bits are:</div><div class='del'>-</div><div class='del'>-		INPCK</div><div class='del'>-			- enable frame and parity error events to be</div><div class='del'>-			  passed to the TTY layer.</div><div class='del'>-		BRKINT / PARMRK</div><div class='del'>-			- both of these enable break events to be</div><div class='del'>-			  passed to the TTY layer.</div><div class='del'>-</div><div class='del'>-		IGNPAR</div><div class='del'>-			- ignore parity and framing errors</div><div class='del'>-		IGNBRK</div><div class='del'>-			- ignore break errors,  If IGNPAR is also</div><div class='del'>-			  set, ignore overrun errors as well.</div><div class='del'>-</div><div class='del'>-	The interaction of the iflag bits is as follows (parity error</div><div class='del'>-	given as an example):</div><div class='del'>-</div><div class='del'>-	=============== ======= ======  =============================</div><div class='del'>-	Parity error	INPCK	IGNPAR</div><div class='del'>-	=============== ======= ======  =============================</div><div class='del'>-	n/a		0	n/a	character received, marked as</div><div class='del'>-					TTY_NORMAL</div><div class='del'>-	None		1	n/a	character received, marked as</div><div class='del'>-					TTY_NORMAL</div><div class='del'>-	Yes		1	0	character received, marked as</div><div class='del'>-					TTY_PARITY</div><div class='del'>-	Yes		1	1	character discarded</div><div class='del'>-	=============== ======= ======  =============================</div><div class='del'>-</div><div class='del'>-	Other flags may be used (eg, xon/xoff characters) if your</div><div class='del'>-	hardware supports hardware "soft" flow control.</div><div class='del'>-</div><div class='del'>-	Locking: caller holds tty_port-&gt;mutex</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  set_ldisc(port,termios)</div><div class='del'>-	Notifier for discipline change. See Documentation/tty/tty_ldisc.rst.</div><div class='del'>-</div><div class='del'>-	Locking: caller holds tty_port-&gt;mutex</div><div class='del'>-</div><div class='del'>-  pm(port,state,oldstate)</div><div class='del'>-	Perform any power management related activities on the specified</div><div class='del'>-	port.  State indicates the new state (defined by</div><div class='del'>-	enum uart_pm_state), oldstate indicates the previous state.</div><div class='del'>-</div><div class='del'>-	This function should not be used to grab any resources.</div><div class='del'>-</div><div class='del'>-	This will be called when the port is initially opened and finally</div><div class='del'>-	closed, except when the port is also the system console.  This</div><div class='del'>-	will occur even if CONFIG_PM is not set.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  type(port)</div><div class='del'>-	Return a pointer to a string constant describing the specified</div><div class='del'>-	port, or return NULL, in which case the string 'unknown' is</div><div class='del'>-	substituted.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  release_port(port)</div><div class='del'>-	Release any memory and IO region resources currently in use by</div><div class='del'>-	the port.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  request_port(port)</div><div class='del'>-	Request any memory and IO region resources required by the port.</div><div class='del'>-	If any fail, no resources should be registered when this function</div><div class='del'>-	returns, and it should return -EBUSY on failure.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  config_port(port,type)</div><div class='del'>-	Perform any autoconfiguration steps required for the port.  `type`</div><div class='del'>-	contains a bit mask of the required configuration.  UART_CONFIG_TYPE</div><div class='del'>-	indicates that the port requires detection and identification.</div><div class='del'>-	port-&gt;type should be set to the type found, or PORT_UNKNOWN if</div><div class='del'>-	no port was detected.</div><div class='del'>-</div><div class='del'>-	UART_CONFIG_IRQ indicates autoconfiguration of the interrupt signal,</div><div class='del'>-	which should be probed using standard kernel autoprobing techniques.</div><div class='del'>-	This is not necessary on platforms where ports have interrupts</div><div class='del'>-	internally hard wired (eg, system on a chip implementations).</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  verify_port(port,serinfo)</div><div class='del'>-	Verify the new serial port information contained within serinfo is</div><div class='del'>-	suitable for this port type.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  ioctl(port,cmd,arg)</div><div class='del'>-	Perform any port specific IOCTLs.  IOCTL commands must be defined</div><div class='del'>-	using the standard numbering system found in &lt;asm/ioctl.h&gt;</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-  poll_init(port)</div><div class='del'>-	Called by kgdb to perform the minimal hardware initialization needed</div><div class='del'>-	to support poll_put_char() and poll_get_char().  Unlike -&gt;startup()</div><div class='del'>-	this should not request interrupts.</div><div class='del'>-</div><div class='del'>-	Locking: tty_mutex and tty_port-&gt;mutex taken.</div><div class='del'>-</div><div class='del'>-	Interrupts: n/a.</div><div class='del'>-</div><div class='del'>-  poll_put_char(port,ch)</div><div class='del'>-	Called by kgdb to write a single character directly to the serial</div><div class='del'>-	port.  It can and should block until there is space in the TX FIFO.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='del'>-</div><div class='del'>-  poll_get_char(port)</div><div class='del'>-	Called by kgdb to read a single character directly from the serial</div><div class='del'>-	port.  If data is available, it should be returned; otherwise</div><div class='del'>-	the function should return NO_POLL_CHAR immediately.</div><div class='del'>-</div><div class='del'>-	Locking: none.</div><div class='del'>-</div><div class='del'>-	Interrupts: caller dependent.</div><div class='del'>-</div><div class='del'>-	This call must not sleep</div><div class='add'>+.. kernel-doc:: include/linux/serial_core.h</div><div class='add'>+   :identifiers: uart_ops</div><div class='ctx'> </div><div class='ctx'> Other functions</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='del'>-uart_update_timeout(port,cflag,baud)</div><div class='del'>-	Update the FIFO drain timeout, port-&gt;timeout, according to the</div><div class='del'>-	number of bits, parity, stop bits and baud rate.</div><div class='del'>-</div><div class='del'>-	Locking: caller is expected to take port-&gt;lock</div><div class='del'>-</div><div class='del'>-	Interrupts: n/a</div><div class='del'>-</div><div class='del'>-uart_get_baud_rate(port,termios,old,min,max)</div><div class='del'>-	Return the numeric baud rate for the specified termios, taking</div><div class='del'>-	account of the special 38400 baud "kludge".  The B0 baud rate</div><div class='del'>-	is mapped to 9600 baud.</div><div class='del'>-</div><div class='del'>-	If the baud rate is not within min..max, then if old is non-NULL,</div><div class='del'>-	the original baud rate will be tried.  If that exceeds the</div><div class='del'>-	min..max constraint, 9600 baud will be returned.  termios will</div><div class='del'>-	be updated to the baud rate in use.</div><div class='del'>-</div><div class='del'>-	Note: min..max must always allow 9600 baud to be selected.</div><div class='del'>-</div><div class='del'>-	Locking: caller dependent.</div><div class='del'>-</div><div class='del'>-	Interrupts: n/a</div><div class='del'>-</div><div class='del'>-uart_get_divisor(port,baud)</div><div class='del'>-	Return the divisor (baud_base / baud) for the specified baud</div><div class='del'>-	rate, appropriately rounded.</div><div class='del'>-</div><div class='del'>-	If 38400 baud and custom divisor is selected, return the</div><div class='del'>-	custom divisor instead.</div><div class='del'>-</div><div class='del'>-	Locking: caller dependent.</div><div class='del'>-</div><div class='del'>-	Interrupts: n/a</div><div class='del'>-</div><div class='del'>-uart_match_port(port1,port2)</div><div class='del'>-	This utility function can be used to determine whether two</div><div class='del'>-	uart_port structures describe the same port.</div><div class='del'>-</div><div class='del'>-	Locking: n/a</div><div class='del'>-</div><div class='del'>-	Interrupts: n/a</div><div class='del'>-</div><div class='del'>-uart_write_wakeup(port)</div><div class='del'>-	A driver is expected to call this function when the number of</div><div class='del'>-	characters in the transmit buffer have dropped below a threshold.</div><div class='del'>-</div><div class='del'>-	Locking: port-&gt;lock should be held.</div><div class='add'>+.. kernel-doc:: drivers/tty/serial/serial_core.c</div><div class='add'>+   :identifiers: uart_update_timeout uart_get_baud_rate uart_get_divisor</div><div class='add'>+           uart_match_port uart_write_wakeup uart_register_driver</div><div class='add'>+           uart_unregister_driver uart_suspend_port uart_resume_port</div><div class='add'>+           uart_add_one_port uart_remove_one_port uart_console_write</div><div class='add'>+           uart_parse_earlycon uart_parse_options uart_set_options</div><div class='add'>+           uart_get_lsr_info uart_handle_dcd_change uart_handle_cts_change</div><div class='add'>+           uart_try_toggle_sysrq uart_get_console</div><div class='ctx'> </div><div class='del'>-	Interrupts: n/a</div><div class='del'>-</div><div class='del'>-uart_register_driver(drv)</div><div class='del'>-	Register a uart driver with the core driver.  We in turn register</div><div class='del'>-	with the tty layer, and initialise the core driver per-port state.</div><div class='del'>-</div><div class='del'>-	drv-&gt;port should be NULL, and the per-port structures should be</div><div class='del'>-	registered using uart_add_one_port after this call has succeeded.</div><div class='del'>-</div><div class='del'>-	Locking: none</div><div class='del'>-</div><div class='del'>-	Interrupts: enabled</div><div class='del'>-</div><div class='del'>-uart_unregister_driver()</div><div class='del'>-	Remove all references to a driver from the core driver.  The low</div><div class='del'>-	level driver must have removed all its ports via the</div><div class='del'>-	uart_remove_one_port() if it registered them with uart_add_one_port().</div><div class='del'>-</div><div class='del'>-	Locking: none</div><div class='del'>-</div><div class='del'>-	Interrupts: enabled</div><div class='del'>-</div><div class='del'>-**uart_suspend_port()**</div><div class='del'>-</div><div class='del'>-**uart_resume_port()**</div><div class='del'>-</div><div class='del'>-**uart_add_one_port()**</div><div class='del'>-</div><div class='del'>-**uart_remove_one_port()**</div><div class='add'>+.. kernel-doc:: include/linux/serial_core.h</div><div class='add'>+   :identifiers: uart_port_tx_limited uart_port_tx</div><div class='ctx'> </div><div class='ctx'> Other notes</div><div class='ctx'> -----------</div><div class='hunk'>@@ -519,31 +100,7 @@ Modem control lines via GPIO</div><div class='ctx'> </div><div class='ctx'> Some helpers are provided in order to set/get modem control lines via GPIO.</div><div class='ctx'> </div><div class='del'>-mctrl_gpio_init(port, idx):</div><div class='del'>-	This will get the {cts,rts,...}-gpios from device tree if they are</div><div class='del'>-	present and request them, set direction etc, and return an</div><div class='del'>-	allocated structure. `devm_*` functions are used, so there's no need</div><div class='del'>-	to call mctrl_gpio_free().</div><div class='del'>-	As this sets up the irq handling make sure to not handle changes to the</div><div class='del'>-	gpio input lines in your driver, too.</div><div class='del'>-</div><div class='del'>-mctrl_gpio_free(dev, gpios):</div><div class='del'>-	This will free the requested gpios in mctrl_gpio_init().</div><div class='del'>-	As `devm_*` functions are used, there's generally no need to call</div><div class='del'>-	this function.</div><div class='del'>-</div><div class='del'>-mctrl_gpio_to_gpiod(gpios, gidx)</div><div class='del'>-	This returns the gpio_desc structure associated to the modem line</div><div class='del'>-	index.</div><div class='del'>-</div><div class='del'>-mctrl_gpio_set(gpios, mctrl):</div><div class='del'>-	This will sets the gpios according to the mctrl state.</div><div class='del'>-</div><div class='del'>-mctrl_gpio_get(gpios, mctrl):</div><div class='del'>-	This will update mctrl with the gpios values.</div><div class='del'>-</div><div class='del'>-mctrl_gpio_enable_ms(gpios):</div><div class='del'>-	Enables irqs and handling of changes to the ms lines.</div><div class='del'>-</div><div class='del'>-mctrl_gpio_disable_ms(gpios):</div><div class='del'>-	Disables irqs and handling of changes to the ms lines.</div><div class='add'>+.. kernel-doc:: drivers/tty/serial/serial_mctrl_gpio.c</div><div class='add'>+   :identifiers: mctrl_gpio_init mctrl_gpio_free mctrl_gpio_to_gpiod</div><div class='add'>+           mctrl_gpio_set mctrl_gpio_get mctrl_gpio_enable_ms</div><div class='add'>+           mctrl_gpio_disable_ms</div><div class='head'>diff --git a/Documentation/driver-api/serial/index.rst b/Documentation/driver-api/serial/index.rst<br/>index 7eb21a695fc3..03a55b987a1d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/serial/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/serial/index.rst</a></div><div class='hunk'>@@ -16,8 +16,6 @@ Serial drivers</div><div class='ctx'> .. toctree::</div><div class='ctx'>     :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-    moxa-smartio</div><div class='del'>-    n_gsm</div><div class='ctx'>     serial-iso7816</div><div class='ctx'>     serial-rs485</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/serial/n_gsm.rst b/Documentation/driver-api/serial/n_gsm.rst<br/>deleted file mode 100644<br/>index 49956509ad73..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/n_gsm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/serial/n_gsm.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,159 +0,0 @@</div><div class='del'>-==============================</div><div class='del'>-GSM 0710 tty multiplexor HOWTO</div><div class='del'>-==============================</div><div class='del'>-</div><div class='del'>-This line discipline implements the GSM 07.10 multiplexing protocol</div><div class='del'>-detailed in the following 3GPP document:</div><div class='del'>-</div><div class='del'>-	https://www.3gpp.org/ftp/Specs/archive/07_series/07.10/0710-720.zip</div><div class='del'>-</div><div class='del'>-This document give some hints on how to use this driver with GPRS and 3G</div><div class='del'>-modems connected to a physical serial port.</div><div class='del'>-</div><div class='del'>-How to use it</div><div class='del'>--------------</div><div class='del'>-1. config initiator</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^</div><div class='del'>-</div><div class='del'>-1.1 initialize the modem in 0710 mux mode (usually AT+CMUX= command) through</div><div class='del'>-    its serial port. Depending on the modem used, you can pass more or less</div><div class='del'>-    parameters to this command.</div><div class='del'>-</div><div class='del'>-1.2 switch the serial line to using the n_gsm line discipline by using</div><div class='del'>-    TIOCSETD ioctl.</div><div class='del'>-</div><div class='del'>-1.3 configure the mux using GSMIOC_GETCONF / GSMIOC_SETCONF ioctl.</div><div class='del'>-</div><div class='del'>-1.4 obtain base gsmtty number for the used serial port.</div><div class='del'>-</div><div class='del'>-Major parts of the initialization program :</div><div class='del'>-(a good starting point is util-linux-ng/sys-utils/ldattach.c)::</div><div class='del'>-</div><div class='del'>-  #include &lt;stdio.h&gt;</div><div class='del'>-  #include &lt;stdint.h&gt;</div><div class='del'>-  #include &lt;linux/gsmmux.h&gt;</div><div class='del'>-  #include &lt;linux/tty.h&gt;</div><div class='del'>-  #define DEFAULT_SPEED	B115200</div><div class='del'>-  #define SERIAL_PORT	/dev/ttyS0</div><div class='del'>-</div><div class='del'>-	int ldisc = N_GSM0710;</div><div class='del'>-	struct gsm_config c;</div><div class='del'>-	struct termios configuration;</div><div class='del'>-	uint32_t first;</div><div class='del'>-</div><div class='del'>-	/* open the serial port connected to the modem */</div><div class='del'>-	fd = open(SERIAL_PORT, O_RDWR | O_NOCTTY | O_NDELAY);</div><div class='del'>-</div><div class='del'>-	/* configure the serial port : speed, flow control ... */</div><div class='del'>-</div><div class='del'>-	/* send the AT commands to switch the modem to CMUX mode</div><div class='del'>-	   and check that it's successful (should return OK) */</div><div class='del'>-	write(fd, "AT+CMUX=0\r", 10);</div><div class='del'>-</div><div class='del'>-	/* experience showed that some modems need some time before</div><div class='del'>-	   being able to answer to the first MUX packet so a delay</div><div class='del'>-	   may be needed here in some case */</div><div class='del'>-	sleep(3);</div><div class='del'>-</div><div class='del'>-	/* use n_gsm line discipline */</div><div class='del'>-	ioctl(fd, TIOCSETD, &amp;ldisc);</div><div class='del'>-</div><div class='del'>-	/* get n_gsm configuration */</div><div class='del'>-	ioctl(fd, GSMIOC_GETCONF, &amp;c);</div><div class='del'>-	/* we are initiator and need encoding 0 (basic) */</div><div class='del'>-	c.initiator = 1;</div><div class='del'>-	c.encapsulation = 0;</div><div class='del'>-	/* our modem defaults to a maximum size of 127 bytes */</div><div class='del'>-	c.mru = 127;</div><div class='del'>-	c.mtu = 127;</div><div class='del'>-	/* set the new configuration */</div><div class='del'>-	ioctl(fd, GSMIOC_SETCONF, &amp;c);</div><div class='del'>-	/* get first gsmtty device node */</div><div class='del'>-	ioctl(fd, GSMIOC_GETFIRST, &amp;first);</div><div class='del'>-	printf("first muxed line: /dev/gsmtty%i\n", first);</div><div class='del'>-</div><div class='del'>-	/* and wait for ever to keep the line discipline enabled */</div><div class='del'>-	daemon(0,0);</div><div class='del'>-	pause();</div><div class='del'>-</div><div class='del'>-1.5 use these devices as plain serial ports.</div><div class='del'>-</div><div class='del'>-   for example, it's possible:</div><div class='del'>-</div><div class='del'>-   - and to use gnokii to send / receive SMS on ttygsm1</div><div class='del'>-   - to use ppp to establish a datalink on ttygsm2</div><div class='del'>-</div><div class='del'>-1.6 first close all virtual ports before closing the physical port.</div><div class='del'>-</div><div class='del'>-   Note that after closing the physical port the modem is still in multiplexing</div><div class='del'>-   mode. This may prevent a successful re-opening of the port later. To avoid</div><div class='del'>-   this situation either reset the modem if your hardware allows that or send</div><div class='del'>-   a disconnect command frame manually before initializing the multiplexing mode</div><div class='del'>-   for the second time. The byte sequence for the disconnect command frame is::</div><div class='del'>-</div><div class='del'>-      0xf9, 0x03, 0xef, 0x03, 0xc3, 0x16, 0xf9.</div><div class='del'>-</div><div class='del'>-2. config requester</div><div class='del'>-^^^^^^^^^^^^^^^^^^^^^</div><div class='del'>-</div><div class='del'>-2.1 receive string "AT+CMUX= command" through its serial port,initialize</div><div class='del'>-    mux mode config</div><div class='del'>-</div><div class='del'>-2.2 switch the serial line to using the n_gsm line discipline by using</div><div class='del'>-    TIOCSETD ioctl.</div><div class='del'>-</div><div class='del'>-2.3 configure the mux using GSMIOC_GETCONF / GSMIOC_SETCONF ioctl.</div><div class='del'>-</div><div class='del'>-2.4 obtain base gsmtty number for the used serial port::</div><div class='del'>-</div><div class='del'>-  #include &lt;stdio.h&gt;</div><div class='del'>-  #include &lt;stdint.h&gt;</div><div class='del'>-  #include &lt;linux/gsmmux.h&gt;</div><div class='del'>-  #include &lt;linux/tty.h&gt;</div><div class='del'>-  #define DEFAULT_SPEED	B115200</div><div class='del'>-  #define SERIAL_PORT	/dev/ttyS0</div><div class='del'>-</div><div class='del'>-	int ldisc = N_GSM0710;</div><div class='del'>-	struct gsm_config c;</div><div class='del'>-	struct termios configuration;</div><div class='del'>-	uint32_t first;</div><div class='del'>-</div><div class='del'>-	/* open the serial port */</div><div class='del'>-	fd = open(SERIAL_PORT, O_RDWR | O_NOCTTY | O_NDELAY);</div><div class='del'>-</div><div class='del'>-	/* configure the serial port : speed, flow control ... */</div><div class='del'>-</div><div class='del'>-	/* get serial data and check "AT+CMUX=command" parameter ... */</div><div class='del'>-</div><div class='del'>-	/* use n_gsm line discipline */</div><div class='del'>-	ioctl(fd, TIOCSETD, &amp;ldisc);</div><div class='del'>-</div><div class='del'>-	/* get n_gsm configuration */</div><div class='del'>-	ioctl(fd, GSMIOC_GETCONF, &amp;c);</div><div class='del'>-	/* we are requester and need encoding 0 (basic) */</div><div class='del'>-	c.initiator = 0;</div><div class='del'>-	c.encapsulation = 0;</div><div class='del'>-	/* our modem defaults to a maximum size of 127 bytes */</div><div class='del'>-	c.mru = 127;</div><div class='del'>-	c.mtu = 127;</div><div class='del'>-	/* set the new configuration */</div><div class='del'>-	ioctl(fd, GSMIOC_SETCONF, &amp;c);</div><div class='del'>-	/* get first gsmtty device node */</div><div class='del'>-	ioctl(fd, GSMIOC_GETFIRST, &amp;first);</div><div class='del'>-	printf("first muxed line: /dev/gsmtty%i\n", first);</div><div class='del'>-</div><div class='del'>-	/* and wait for ever to keep the line discipline enabled */</div><div class='del'>-	daemon(0,0);</div><div class='del'>-	pause();</div><div class='del'>-</div><div class='del'>-Additional Documentation</div><div class='del'>-------------------------</div><div class='del'>-More practical details on the protocol and how it's supported by industrial</div><div class='del'>-modems can be found in the following documents :</div><div class='del'>-</div><div class='del'>-- http://www.telit.com/module/infopool/download.php?id=616</div><div class='del'>-- http://www.u-blox.com/images/downloads/Product_Docs/LEON-G100-G200-MuxImplementation_ApplicationNote_%28GSM%20G1-CS-10002%29.pdf</div><div class='del'>-- http://www.sierrawireless.com/Support/Downloads/AirPrime/WMP_Series/~/media/Support_Downloads/AirPrime/Application_notes/CMUX_Feature_Application_Note-Rev004.ashx</div><div class='del'>-- http://wm.sim.com/sim/News/photo/2010721161442.pdf</div><div class='del'>-</div><div class='del'>-11-03-08 - Eric Bénard - &lt;eric@eukrea.com&gt;</div><div class='head'>diff --git a/Documentation/driver-api/serial/serial-rs485.rst b/Documentation/driver-api/serial/serial-rs485.rst<br/>index 6bc824f948f9..dce061ef7647 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/serial-rs485.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/serial/serial-rs485.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/serial-rs485.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/serial/serial-rs485.rst</a></div><div class='hunk'>@@ -29,19 +29,28 @@ RS485 Serial Communications</div><div class='ctx'> 3. Data Structures Already Available in the Kernel</div><div class='ctx'> ==================================================</div><div class='ctx'> </div><div class='del'>-   The Linux kernel provides the serial_rs485 structure (see [1]) to handle</div><div class='del'>-   RS485 communications. This data structure is used to set and configure RS485</div><div class='add'>+   The Linux kernel provides the struct serial_rs485 to handle RS485</div><div class='add'>+   communications. This data structure is used to set and configure RS485</div><div class='ctx'>    parameters in the platform data and in ioctls.</div><div class='ctx'> </div><div class='del'>-   The device tree can also provide RS485 boot time parameters (see [2]</div><div class='del'>-   for bindings). The driver is in charge of filling this data structure from</div><div class='del'>-   the values given by the device tree.</div><div class='add'>+   The device tree can also provide RS485 boot time parameters</div><div class='add'>+   [#DT-bindings]_. The serial core fills the struct serial_rs485 from the</div><div class='add'>+   values given by the device tree when the driver calls</div><div class='add'>+   uart_get_rs485_mode().</div><div class='ctx'> </div><div class='ctx'>    Any driver for devices capable of working both as RS232 and RS485 should</div><div class='del'>-   implement the rs485_config callback in the uart_port structure. The</div><div class='del'>-   serial_core calls rs485_config to do the device specific part in response</div><div class='del'>-   to TIOCSRS485 and TIOCGRS485 ioctls (see below). The rs485_config callback</div><div class='del'>-   receives a pointer to struct serial_rs485.</div><div class='add'>+   implement the ``rs485_config`` callback and provide ``rs485_supported``</div><div class='add'>+   in the ``struct uart_port``. The serial core calls ``rs485_config`` to do</div><div class='add'>+   the device specific part in response to TIOCSRS485 ioctl (see below). The</div><div class='add'>+   ``rs485_config`` callback receives a pointer to a sanitizated struct</div><div class='add'>+   serial_rs485. The struct serial_rs485 userspace provides is sanitized</div><div class='add'>+   before calling ``rs485_config`` using ``rs485_supported`` that indicates</div><div class='add'>+   what RS485 features the driver supports for the ``struct uart_port``.</div><div class='add'>+   TIOCGRS485 ioctl can be used to read back the struct serial_rs485</div><div class='add'>+   matching to the current configuration.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/serial.h</div><div class='add'>+   :identifiers: serial_rs485 uart_get_rs485_mode</div><div class='ctx'> </div><div class='ctx'> 4. Usage from user-level</div><div class='ctx'> ========================</div><div class='hunk'>@@ -95,9 +104,32 @@ RS485 Serial Communications</div><div class='ctx'> 		/* Error handling. See errno. */</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-5. References</div><div class='del'>-=============</div><div class='add'>+5. Multipoint Addressing</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+   The Linux kernel provides addressing mode for multipoint RS-485 serial</div><div class='add'>+   communications line. The addressing mode is enabled with</div><div class='add'>+   ``SER_RS485_ADDRB`` flag in struct serial_rs485. The struct serial_rs485</div><div class='add'>+   has two additional flags and fields for enabling receive and destination</div><div class='add'>+   addresses.</div><div class='add'>+</div><div class='add'>+   Address mode flags:</div><div class='add'>+	- ``SER_RS485_ADDRB``: Enabled addressing mode (sets also ADDRB in termios).</div><div class='add'>+	- ``SER_RS485_ADDR_RECV``: Receive (filter) address enabled.</div><div class='add'>+	- ``SER_RS485_ADDR_DEST``: Set destination address.</div><div class='ctx'> </div><div class='del'>- [1]	include/uapi/linux/serial.h</div><div class='add'>+   Address fields (enabled with corresponding ``SER_RS485_ADDR_*`` flag):</div><div class='add'>+	- ``addr_recv``: Receive address.</div><div class='add'>+	- ``addr_dest``: Destination address.</div><div class='add'>+</div><div class='add'>+   Once a receive address is set, the communication can occur only with the</div><div class='add'>+   particular device and other peers are filtered out. It is left up to the</div><div class='add'>+   receiver side to enforce the filtering. Receive address will be cleared</div><div class='add'>+   if ``SER_RS485_ADDR_RECV`` is not set.</div><div class='add'>+</div><div class='add'>+   Note: not all devices supporting RS485 support multipoint addressing.</div><div class='add'>+</div><div class='add'>+6. References</div><div class='add'>+=============</div><div class='ctx'> </div><div class='del'>- [2]	Documentation/devicetree/bindings/serial/rs485.txt</div><div class='add'>+.. [#DT-bindings]	Documentation/devicetree/bindings/serial/rs485.txt</div><div class='head'>diff --git a/Documentation/driver-api/spi.rst b/Documentation/driver-api/spi.rst<br/>index f64cb666498a..f28887045049 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/spi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/spi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/spi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/spi.rst</a></div><div class='hunk'>@@ -25,8 +25,8 @@ hardware, which may be as simple as a set of GPIO pins or as complex as</div><div class='ctx'> a pair of FIFOs connected to dual DMA engines on the other side of the</div><div class='ctx'> SPI shift register (maximizing throughput). Such drivers bridge between</div><div class='ctx'> whatever bus they sit on (often the platform bus) and SPI, and expose</div><div class='del'>-the SPI side of their device as a :c:type:`struct spi_master</div><div class='del'>-&lt;spi_master&gt;`. SPI devices are children of that master,</div><div class='add'>+the SPI side of their device as a :c:type:`struct spi_controller</div><div class='add'>+&lt;spi_controller&gt;`. SPI devices are children of that master,</div><div class='ctx'> represented as a :c:type:`struct spi_device &lt;spi_device&gt;` and</div><div class='ctx'> manufactured from :c:type:`struct spi_board_info</div><div class='ctx'> &lt;spi_board_info&gt;` descriptors which are usually provided by</div><div class='head'>diff --git a/Documentation/driver-api/surface_aggregator/client.rst b/Documentation/driver-api/surface_aggregator/client.rst<br/>index e519d374c378..e100ab0a24cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/surface_aggregator/client.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/surface_aggregator/client.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/surface_aggregator/client.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/surface_aggregator/client.rst</a></div><div class='hunk'>@@ -17,7 +17,9 @@</div><div class='ctx'> .. |SSAM_DEVICE| replace:: :c:func:`SSAM_DEVICE`</div><div class='ctx'> .. |ssam_notifier_register| replace:: :c:func:`ssam_notifier_register`</div><div class='ctx'> .. |ssam_notifier_unregister| replace:: :c:func:`ssam_notifier_unregister`</div><div class='del'>-.. |ssam_request_sync| replace:: :c:func:`ssam_request_sync`</div><div class='add'>+.. |ssam_device_notifier_register| replace:: :c:func:`ssam_device_notifier_register`</div><div class='add'>+.. |ssam_device_notifier_unregister| replace:: :c:func:`ssam_device_notifier_unregister`</div><div class='add'>+.. |ssam_request_do_sync| replace:: :c:func:`ssam_request_do_sync`</div><div class='ctx'> .. |ssam_event_mask| replace:: :c:type:`enum ssam_event_mask &lt;ssam_event_mask&gt;`</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -189,7 +191,7 @@ data received from it is converted from little-endian to host endianness.</div><div class='ctx'>             *       they do not correspond to an actual SAM/EC request.</div><div class='ctx'>             */</div><div class='ctx'>            rqst.target_category = SSAM_SSH_TC_SAM;</div><div class='del'>-           rqst.target_id = 0x01;</div><div class='add'>+           rqst.target_id = SSAM_SSH_TID_SAM;</div><div class='ctx'>            rqst.command_id = 0x02;</div><div class='ctx'>            rqst.instance_id = 0x03;</div><div class='ctx'>            rqst.flags = SSAM_REQUEST_HAS_RESPONSE;</div><div class='hunk'>@@ -207,12 +209,12 @@ data received from it is converted from little-endian to host endianness.</div><div class='ctx'>             * with the SSAM_REQUEST_HAS_RESPONSE flag set in the specification</div><div class='ctx'>             * above.</div><div class='ctx'>             */</div><div class='del'>-           status = ssam_request_sync(ctrl, &amp;rqst, &amp;resp);</div><div class='add'>+           status = ssam_request_do_sync(ctrl, &amp;rqst, &amp;resp);</div><div class='ctx'> </div><div class='ctx'>            /*</div><div class='ctx'>             * Alternatively use</div><div class='ctx'>             *</div><div class='del'>-            *   ssam_request_sync_onstack(ctrl, &amp;rqst, &amp;resp, sizeof(arg_le));</div><div class='add'>+            *   ssam_request_do_sync_onstack(ctrl, &amp;rqst, &amp;resp, sizeof(arg_le));</div><div class='ctx'>             *</div><div class='ctx'>             * to perform the request, allocating the message buffer directly</div><div class='ctx'>             * on the stack as opposed to allocation via kzalloc().</div><div class='hunk'>@@ -228,7 +230,7 @@ data received from it is converted from little-endian to host endianness.</div><div class='ctx'>            return status;</div><div class='ctx'>    }</div><div class='ctx'> </div><div class='del'>-Note that |ssam_request_sync| in its essence is a wrapper over lower-level</div><div class='add'>+Note that |ssam_request_do_sync| in its essence is a wrapper over lower-level</div><div class='ctx'> request primitives, which may also be used to perform requests. Refer to its</div><div class='ctx'> implementation and documentation for more details.</div><div class='ctx'> </div><div class='hunk'>@@ -239,7 +241,7 @@ one of the generator macros, for example via:</div><div class='ctx'> </div><div class='ctx'>    SSAM_DEFINE_SYNC_REQUEST_W(__ssam_tmp_perf_mode_set, __le32, {</div><div class='ctx'>            .target_category = SSAM_SSH_TC_TMP,</div><div class='del'>-           .target_id       = 0x01,</div><div class='add'>+           .target_id       = SSAM_SSH_TID_SAM,</div><div class='ctx'>            .command_id      = 0x03,</div><div class='ctx'>            .instance_id     = 0x00,</div><div class='ctx'>    });</div><div class='hunk'>@@ -312,7 +314,9 @@ Handling Events</div><div class='ctx'> To receive events from the SAM EC, an event notifier must be registered for</div><div class='ctx'> the desired event via |ssam_notifier_register|. The notifier must be</div><div class='ctx'> unregistered via |ssam_notifier_unregister| once it is not required any</div><div class='del'>-more.</div><div class='add'>+more. For |ssam_device| type clients, the |ssam_device_notifier_register| and</div><div class='add'>+|ssam_device_notifier_unregister| wrappers should be preferred as they properly</div><div class='add'>+handle hot-removal of client devices.</div><div class='ctx'> </div><div class='ctx'> Event notifiers are registered by providing (at minimum) a callback to call</div><div class='ctx'> in case an event has been received, the registry specifying how the event</div><div class='head'>diff --git a/Documentation/driver-api/surface_aggregator/ssh.rst b/Documentation/driver-api/surface_aggregator/ssh.rst<br/>index bf007d6c9873..b955b673838b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/surface_aggregator/ssh.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/surface_aggregator/ssh.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/surface_aggregator/ssh.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/surface_aggregator/ssh.rst</a></div><div class='hunk'>@@ -13,6 +13,7 @@</div><div class='ctx'> .. |DATA_NSQ| replace:: ``DATA_NSQ``</div><div class='ctx'> .. |TC| replace:: ``TC``</div><div class='ctx'> .. |TID| replace:: ``TID``</div><div class='add'>+.. |SID| replace:: ``SID``</div><div class='ctx'> .. |IID| replace:: ``IID``</div><div class='ctx'> .. |RQID| replace:: ``RQID``</div><div class='ctx'> .. |CID| replace:: ``CID``</div><div class='hunk'>@@ -76,7 +77,7 @@ after the frame structure and before the payload. The payload is followed by</div><div class='ctx'> its own CRC (over all payload bytes). If the payload is not present (i.e.</div><div class='ctx'> the frame has ``LEN=0``), the CRC of the payload is still present and will</div><div class='ctx'> evaluate to ``0xffff``. The |LEN| field does not include any of the CRCs, it</div><div class='del'>-equals the number of bytes inbetween the CRC of the frame and the CRC of the</div><div class='add'>+equals the number of bytes between the CRC of the frame and the CRC of the</div><div class='ctx'> payload.</div><div class='ctx'> </div><div class='ctx'> Additionally, the following fixed two-byte sequences are used:</div><div class='hunk'>@@ -219,13 +220,13 @@ following fields, packed together and in order:</div><div class='ctx'>      - |u8|</div><div class='ctx'>      - Target category.</div><div class='ctx'> </div><div class='del'>-   * - |TID| (out)</div><div class='add'>+   * - |TID|</div><div class='ctx'>      - |u8|</div><div class='del'>-     - Target ID for outgoing (host to EC) commands.</div><div class='add'>+     - Target ID for commands/messages.</div><div class='ctx'> </div><div class='del'>-   * - |TID| (in)</div><div class='add'>+   * - |SID|</div><div class='ctx'>      - |u8|</div><div class='del'>-     - Target ID for incoming (EC to host) commands.</div><div class='add'>+     - Source ID for commands/messages.</div><div class='ctx'> </div><div class='ctx'>    * - |IID|</div><div class='ctx'>      - |u8|</div><div class='hunk'>@@ -286,19 +287,20 @@ general, however, a single target category should map to a single reserved</div><div class='ctx'> event request ID.</div><div class='ctx'> </div><div class='ctx'> Furthermore, requests, responses, and events have an associated target ID</div><div class='del'>-(``TID``). This target ID is split into output (host to EC) and input (EC to</div><div class='del'>-host) fields, with the respecting other field (e.g. output field on incoming</div><div class='del'>-messages) set to zero. Two ``TID`` values are known: Primary (``0x01``) and</div><div class='del'>-secondary (``0x02``). In general, the response to a request should have the</div><div class='del'>-same ``TID`` value, however, the field (output vs. input) should be used in</div><div class='del'>-accordance to the direction in which the response is sent (i.e. on the input</div><div class='del'>-field, as responses are generally sent from the EC to the host).</div><div class='del'>-</div><div class='del'>-Note that, even though requests and events should be uniquely identifiable</div><div class='del'>-by target category and command ID alone, the EC may require specific</div><div class='del'>-target ID and instance ID values to accept a command. A command that is</div><div class='del'>-accepted for ``TID=1``, for example, may not be accepted for ``TID=2``</div><div class='del'>-and vice versa.</div><div class='add'>+(``TID``) and source ID (``SID``). These two fields indicate where a message</div><div class='add'>+originates from (``SID``) and what the intended target of the message is</div><div class='add'>+(``TID``). Note that a response to a specific request therefore has the source</div><div class='add'>+and target IDs swapped when compared to the original request (i.e. the request</div><div class='add'>+target is the response source and the request source is the response target).</div><div class='add'>+See (:c:type:`enum ssh_request_id &lt;ssh_request_id&gt;`) for possible values of</div><div class='add'>+both.</div><div class='add'>+</div><div class='add'>+Note that, even though requests and events should be uniquely identifiable by</div><div class='add'>+target category and command ID alone, the EC may require specific target ID and</div><div class='add'>+instance ID values to accept a command. A command that is accepted for</div><div class='add'>+``TID=1``, for example, may not be accepted for ``TID=2`` and vice versa. While</div><div class='add'>+this may not always hold in reality, you can think of different target/source</div><div class='add'>+IDs indicating different physical ECs with potentially different feature sets.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Limitations and Observations</div><div class='head'>diff --git a/Documentation/driver-api/thermal/index.rst b/Documentation/driver-api/thermal/index.rst<br/>index 030306ffa408..a886028014ab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/thermal/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/thermal/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/thermal/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/thermal/index.rst</a></div><div class='hunk'>@@ -14,7 +14,6 @@ Thermal</div><div class='ctx'> </div><div class='ctx'>    exynos_thermal</div><div class='ctx'>    exynos_thermal_emulation</div><div class='del'>-   intel_powerclamp</div><div class='ctx'>    nouveau_thermal</div><div class='ctx'>    x86_pkg_temperature_thermal</div><div class='ctx'>    intel_dptf</div><div class='head'>diff --git a/Documentation/driver-api/thermal/intel_dptf.rst b/Documentation/driver-api/thermal/intel_dptf.rst<br/>index 96668dca753a..9ab4316322a1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/thermal/intel_dptf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/thermal/intel_dptf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/thermal/intel_dptf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/thermal/intel_dptf.rst</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> Intel(R) Dynamic Platform and Thermal Framework Sysfs Interface</div><div class='ctx'> ===============================================================</div><div class='ctx'> </div><div class='del'>-:Copyright: |copy| 2022 Intel Corporation</div><div class='add'>+:Copyright: © 2022 Intel Corporation</div><div class='ctx'> </div><div class='ctx'> :Author: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -84,6 +84,9 @@ DPTF ACPI Drivers interface</div><div class='ctx'> 	https:/github.com/intel/thermal_daemon for decoding</div><div class='ctx'> 	thermal table.</div><div class='ctx'> </div><div class='add'>+``production_mode`` (RO)</div><div class='add'>+	When different from zero, manufacturer locked thermal configuration</div><div class='add'>+	from further changes.</div><div class='ctx'> </div><div class='ctx'> ACPI Thermal Relationship table interface</div><div class='ctx'> ------------------------------------------</div><div class='hunk'>@@ -181,8 +184,9 @@ ABI.</div><div class='ctx'> DPTF Processor thermal RFIM interface</div><div class='ctx'> --------------------------------------------</div><div class='ctx'> </div><div class='del'>-RFIM interface allows adjustment of FIVR (Fully Integrated Voltage Regulator)</div><div class='del'>-and DDR (Double Data Rate)frequencies to avoid RF interference with WiFi and 5G.</div><div class='add'>+RFIM interface allows adjustment of FIVR (Fully Integrated Voltage Regulator),</div><div class='add'>+DDR (Double Data Rate) and DLVR (Digital Linear Voltage Regulator)</div><div class='add'>+frequencies to avoid RF interference with WiFi and 5G.</div><div class='ctx'> </div><div class='ctx'> Switching voltage regulators (VR) generate radiated EMI or RFI at the</div><div class='ctx'> fundamental frequency and its harmonics. Some harmonics may interfere</div><div class='hunk'>@@ -193,6 +197,15 @@ small % and shift away the switching noise harmonic interference from</div><div class='ctx'> radio channels.  OEM or ODMs can use the driver to control SOC IVR</div><div class='ctx'> operation within the range where it does not impact IVR performance.</div><div class='ctx'> </div><div class='add'>+Some products use DLVR instead of FIVR as switching voltage regulator.</div><div class='add'>+In this case attributes of DLVR must be adjusted instead of FIVR.</div><div class='add'>+</div><div class='add'>+While shifting the frequencies additional clock noise can be introduced,</div><div class='add'>+which is compensated by adjusting Spread spectrum percent. This helps</div><div class='add'>+to reduce the clock noise to meet regulatory compliance. This spreading</div><div class='add'>+% increases bandwidth of signal transmission and hence reduces the</div><div class='add'>+effects of interference, noise and signal fading.</div><div class='add'>+</div><div class='ctx'> DRAM devices of DDR IO interface and their power plane can generate EMI</div><div class='ctx'> at the data rates. Similar to IVR control mechanism, Intel offers a</div><div class='ctx'> mechanism by which DDR data rates can be changed if several conditions</div><div class='hunk'>@@ -261,6 +274,38 @@ DVFS attributes</div><div class='ctx'> ``rfi_disable (RW)``</div><div class='ctx'> 	Disable DDR rate change feature</div><div class='ctx'> </div><div class='add'>+DLVR attributes</div><div class='add'>+</div><div class='add'>+:file:`/sys/bus/pci/devices/0000\:00\:04.0/dlvr/`</div><div class='add'>+</div><div class='add'>+``dlvr_hardware_rev`` (RO)</div><div class='add'>+	DLVR hardware revision.</div><div class='add'>+</div><div class='add'>+``dlvr_freq_mhz`` (RO)</div><div class='add'>+	Current DLVR PLL frequency in MHz.</div><div class='add'>+</div><div class='add'>+``dlvr_freq_select`` (RW)</div><div class='add'>+	Sets DLVR PLL clock frequency. Once set, and enabled via</div><div class='add'>+	dlvr_rfim_enable, the dlvr_freq_mhz will show the current</div><div class='add'>+	DLVR PLL frequency.</div><div class='add'>+</div><div class='add'>+``dlvr_pll_busy`` (RO)</div><div class='add'>+	PLL can't accept frequency change when set.</div><div class='add'>+</div><div class='add'>+``dlvr_rfim_enable`` (RW)</div><div class='add'>+	0: Disable RF frequency hopping, 1: Enable RF frequency hopping.</div><div class='add'>+</div><div class='add'>+``dlvr_spread_spectrum_pct`` (RW)</div><div class='add'>+	Sets DLVR spread spectrum percent value.</div><div class='add'>+</div><div class='add'>+``dlvr_control_mode`` (RW)</div><div class='add'>+        Specifies how frequencies are spread using spread spectrum.</div><div class='add'>+        0: Down spread,</div><div class='add'>+        1: Spread in the Center.</div><div class='add'>+</div><div class='add'>+``dlvr_control_lock`` (RW)</div><div class='add'>+    1: future writes are ignored.</div><div class='add'>+</div><div class='ctx'> DPTF Power supply and Battery Interface</div><div class='ctx'> ----------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/thermal/sysfs-api.rst b/Documentation/driver-api/thermal/sysfs-api.rst<br/>index 2e0f79a9e2ee..6c1175c6afba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/thermal/sysfs-api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/thermal/sysfs-api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/thermal/sysfs-api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/thermal/sysfs-api.rst</a></div><div class='hunk'>@@ -306,42 +306,6 @@ temperature) and throttle appropriate devices.</div><div class='ctx'> </div><div class='ctx'>     ::</div><div class='ctx'> </div><div class='del'>-	struct thermal_bind_params</div><div class='del'>-</div><div class='del'>-    This structure defines the following parameters that are used to bind</div><div class='del'>-    a zone with a cooling device for a particular trip point.</div><div class='del'>-</div><div class='del'>-    .cdev:</div><div class='del'>-	     The cooling device pointer</div><div class='del'>-    .weight:</div><div class='del'>-	     The 'influence' of a particular cooling device on this</div><div class='del'>-	     zone. This is relative to the rest of the cooling</div><div class='del'>-	     devices. For example, if all cooling devices have a</div><div class='del'>-	     weight of 1, then they all contribute the same. You can</div><div class='del'>-	     use percentages if you want, but it's not mandatory. A</div><div class='del'>-	     weight of 0 means that this cooling device doesn't</div><div class='del'>-	     contribute to the cooling of this zone unless all cooling</div><div class='del'>-	     devices have a weight of 0. If all weights are 0, then</div><div class='del'>-	     they all contribute the same.</div><div class='del'>-    .trip_mask:</div><div class='del'>-	       This is a bit mask that gives the binding relation between</div><div class='del'>-	       this thermal zone and cdev, for a particular trip point.</div><div class='del'>-	       If nth bit is set, then the cdev and thermal zone are bound</div><div class='del'>-	       for trip point n.</div><div class='del'>-    .binding_limits:</div><div class='del'>-		     This is an array of cooling state limits. Must have</div><div class='del'>-		     exactly 2 * thermal_zone.number_of_trip_points. It is an</div><div class='del'>-		     array consisting of tuples &lt;lower-state upper-state&gt; of</div><div class='del'>-		     state limits. Each trip will be associated with one state</div><div class='del'>-		     limit tuple when binding. A NULL pointer means</div><div class='del'>-		     &lt;THERMAL_NO_LIMITS THERMAL_NO_LIMITS&gt; on all trips.</div><div class='del'>-		     These limits are used when binding a cdev to a trip point.</div><div class='del'>-    .match:</div><div class='del'>-	    This call back returns success(0) if the 'tz and cdev' need to</div><div class='del'>-	    be bound, as per platform data.</div><div class='del'>-</div><div class='del'>-    ::</div><div class='del'>-</div><div class='ctx'> 	struct thermal_zone_params</div><div class='ctx'> </div><div class='ctx'>     This structure defines the platform level parameters for a thermal zone.</div><div class='hunk'>@@ -357,10 +321,6 @@ temperature) and throttle appropriate devices.</div><div class='ctx'> 	       will be created. when no_hwmon == true, nothing will be done.</div><div class='ctx'> 	       In case the thermal_zone_params is NULL, the hwmon interface</div><div class='ctx'> 	       will be created (for backward compatibility).</div><div class='del'>-    .num_tbps:</div><div class='del'>-	       Number of thermal_bind_params entries for this zone</div><div class='del'>-    .tbp:</div><div class='del'>-	       thermal_bind_params entries</div><div class='ctx'> </div><div class='ctx'> 2. sysfs attributes structure</div><div class='ctx'> =============================</div><div class='head'>diff --git a/Documentation/tty/index.rst b/Documentation/driver-api/tty/index.rst<br/>index 21ea0cb21e55..2d32606a4278 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/index.rst</a></div><div class='hunk'>@@ -36,18 +36,16 @@ In-detail description of the named TTY structures is in separate documents:</div><div class='ctx'>    tty_struct</div><div class='ctx'>    tty_ldisc</div><div class='ctx'>    tty_buffer</div><div class='del'>-   n_tty</div><div class='ctx'>    tty_internals</div><div class='ctx'> </div><div class='ctx'> Writing TTY Driver</div><div class='ctx'> ==================</div><div class='ctx'> </div><div class='ctx'> Before one starts writing a TTY driver, they must consider</div><div class='del'>-:doc:`Serial &lt;../driver-api/serial/driver&gt;` and :doc:`USB Serial</div><div class='del'>-&lt;../usb/usb-serial&gt;` layers</div><div class='del'>-first. Drivers for serial devices can often use one of these specific layers to</div><div class='del'>-implement a serial driver. Only special devices should be handled directly by</div><div class='del'>-the TTY Layer. If you are about to write such a driver, read on.</div><div class='add'>+:doc:`Serial &lt;../serial/driver&gt;` and :doc:`USB Serial &lt;../../usb/usb-serial&gt;`</div><div class='add'>+layers first. Drivers for serial devices can often use one of these specific</div><div class='add'>+layers to implement a serial driver. Only special devices should be handled</div><div class='add'>+directly by the TTY Layer. If you are about to write such a driver, read on.</div><div class='ctx'> </div><div class='ctx'> A *typical* sequence a TTY driver performs is as follows:</div><div class='ctx'> </div><div class='hunk'>@@ -61,3 +59,15 @@ A *typical* sequence a TTY driver performs is as follows:</div><div class='ctx'> Steps regarding driver, i.e. 1., 3., and 5. are described in detail in</div><div class='ctx'> :doc:`tty_driver`. For the other two (devices handling), look into</div><div class='ctx'> :doc:`tty_port`.</div><div class='add'>+</div><div class='add'>+Other Documentation</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+Miscellaneous documentation can be further found in these documents:</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 2</div><div class='add'>+</div><div class='add'>+   moxa-smartio</div><div class='add'>+   n_gsm</div><div class='add'>+   n_tty</div><div class='head'>diff --git a/Documentation/driver-api/serial/moxa-smartio.rst b/Documentation/driver-api/tty/moxa-smartio.rst<br/>index af25bc5cc3e6..af25bc5cc3e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/serial/moxa-smartio.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/serial/moxa-smartio.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/moxa-smartio.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/moxa-smartio.rst</a></div><div class='head'>diff --git a/Documentation/driver-api/tty/n_gsm.rst b/Documentation/driver-api/tty/n_gsm.rst<br/>new file mode 100644<br/>index 000000000000..120317ec990f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/n_gsm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/n_gsm.rst</a></div><div class='hunk'>@@ -0,0 +1,192 @@</div><div class='add'>+==============================</div><div class='add'>+GSM 0710 tty multiplexor HOWTO</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+.. contents:: :local:</div><div class='add'>+</div><div class='add'>+This line discipline implements the GSM 07.10 multiplexing protocol</div><div class='add'>+detailed in the following 3GPP document:</div><div class='add'>+</div><div class='add'>+	https://www.3gpp.org/ftp/Specs/archive/07_series/07.10/0710-720.zip</div><div class='add'>+</div><div class='add'>+This document give some hints on how to use this driver with GPRS and 3G</div><div class='add'>+modems connected to a physical serial port.</div><div class='add'>+</div><div class='add'>+How to use it</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+Config Initiator</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+#. Initialize the modem in 0710 mux mode (usually ``AT+CMUX=`` command) through</div><div class='add'>+   its serial port. Depending on the modem used, you can pass more or less</div><div class='add'>+   parameters to this command.</div><div class='add'>+</div><div class='add'>+#. Switch the serial line to using the n_gsm line discipline by using</div><div class='add'>+   ``TIOCSETD`` ioctl.</div><div class='add'>+</div><div class='add'>+#. Configure the mux using ``GSMIOC_GETCONF_EXT``/``GSMIOC_SETCONF_EXT`` ioctl if needed.</div><div class='add'>+</div><div class='add'>+#. Configure the mux using ``GSMIOC_GETCONF``/``GSMIOC_SETCONF`` ioctl.</div><div class='add'>+</div><div class='add'>+#. Configure DLCs using ``GSMIOC_GETCONF_DLCI``/``GSMIOC_SETCONF_DLCI`` ioctl for non-defaults.</div><div class='add'>+</div><div class='add'>+#. Obtain base gsmtty number for the used serial port.</div><div class='add'>+</div><div class='add'>+   Major parts of the initialization program</div><div class='add'>+   (a good starting point is util-linux-ng/sys-utils/ldattach.c)::</div><div class='add'>+</div><div class='add'>+      #include &lt;stdio.h&gt;</div><div class='add'>+      #include &lt;stdint.h&gt;</div><div class='add'>+      #include &lt;linux/gsmmux.h&gt;</div><div class='add'>+      #include &lt;linux/tty.h&gt;</div><div class='add'>+</div><div class='add'>+      #define DEFAULT_SPEED	B115200</div><div class='add'>+      #define SERIAL_PORT	/dev/ttyS0</div><div class='add'>+</div><div class='add'>+      int ldisc = N_GSM0710;</div><div class='add'>+      struct gsm_config c;</div><div class='add'>+      struct gsm_config_ext ce;</div><div class='add'>+      struct gsm_dlci_config dc;</div><div class='add'>+      struct termios configuration;</div><div class='add'>+      uint32_t first;</div><div class='add'>+</div><div class='add'>+      /* open the serial port connected to the modem */</div><div class='add'>+      fd = open(SERIAL_PORT, O_RDWR | O_NOCTTY | O_NDELAY);</div><div class='add'>+</div><div class='add'>+      /* configure the serial port : speed, flow control ... */</div><div class='add'>+</div><div class='add'>+      /* send the AT commands to switch the modem to CMUX mode</div><div class='add'>+         and check that it's successful (should return OK) */</div><div class='add'>+      write(fd, "AT+CMUX=0\r", 10);</div><div class='add'>+</div><div class='add'>+      /* experience showed that some modems need some time before</div><div class='add'>+         being able to answer to the first MUX packet so a delay</div><div class='add'>+         may be needed here in some case */</div><div class='add'>+      sleep(3);</div><div class='add'>+</div><div class='add'>+      /* use n_gsm line discipline */</div><div class='add'>+      ioctl(fd, TIOCSETD, &amp;ldisc);</div><div class='add'>+</div><div class='add'>+      /* get n_gsm extended configuration */</div><div class='add'>+      ioctl(fd, GSMIOC_GETCONF_EXT, &amp;ce);</div><div class='add'>+      /* use keep-alive once every 5s for modem connection supervision */</div><div class='add'>+      ce.keep_alive = 500;</div><div class='add'>+      /* set the new extended configuration */</div><div class='add'>+      ioctl(fd, GSMIOC_SETCONF_EXT, &amp;ce);</div><div class='add'>+      /* get n_gsm configuration */</div><div class='add'>+      ioctl(fd, GSMIOC_GETCONF, &amp;c);</div><div class='add'>+      /* we are initiator and need encoding 0 (basic) */</div><div class='add'>+      c.initiator = 1;</div><div class='add'>+      c.encapsulation = 0;</div><div class='add'>+      /* our modem defaults to a maximum size of 127 bytes */</div><div class='add'>+      c.mru = 127;</div><div class='add'>+      c.mtu = 127;</div><div class='add'>+      /* set the new configuration */</div><div class='add'>+      ioctl(fd, GSMIOC_SETCONF, &amp;c);</div><div class='add'>+      /* get DLC 1 configuration */</div><div class='add'>+      dc.channel = 1;</div><div class='add'>+      ioctl(fd, GSMIOC_GETCONF_DLCI, &amp;dc);</div><div class='add'>+      /* the first user channel gets a higher priority */</div><div class='add'>+      dc.priority = 1;</div><div class='add'>+      /* set the new DLC 1 specific configuration */</div><div class='add'>+      ioctl(fd, GSMIOC_SETCONF_DLCI, &amp;dc);</div><div class='add'>+      /* get first gsmtty device node */</div><div class='add'>+      ioctl(fd, GSMIOC_GETFIRST, &amp;first);</div><div class='add'>+      printf("first muxed line: /dev/gsmtty%i\n", first);</div><div class='add'>+</div><div class='add'>+      /* and wait for ever to keep the line discipline enabled */</div><div class='add'>+      daemon(0,0);</div><div class='add'>+      pause();</div><div class='add'>+</div><div class='add'>+#. Use these devices as plain serial ports.</div><div class='add'>+</div><div class='add'>+   For example, it's possible:</div><div class='add'>+</div><div class='add'>+   - to use *gnokii* to send / receive SMS on ``ttygsm1``</div><div class='add'>+   - to use *ppp* to establish a datalink on ``ttygsm2``</div><div class='add'>+</div><div class='add'>+#. First close all virtual ports before closing the physical port.</div><div class='add'>+</div><div class='add'>+   Note that after closing the physical port the modem is still in multiplexing</div><div class='add'>+   mode. This may prevent a successful re-opening of the port later. To avoid</div><div class='add'>+   this situation either reset the modem if your hardware allows that or send</div><div class='add'>+   a disconnect command frame manually before initializing the multiplexing mode</div><div class='add'>+   for the second time. The byte sequence for the disconnect command frame is::</div><div class='add'>+</div><div class='add'>+      0xf9, 0x03, 0xef, 0x03, 0xc3, 0x16, 0xf9</div><div class='add'>+</div><div class='add'>+Config Requester</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+#. Receive ``AT+CMUX=`` command through its serial port, initialize mux mode</div><div class='add'>+   config.</div><div class='add'>+</div><div class='add'>+#. Switch the serial line to using the *n_gsm* line discipline by using</div><div class='add'>+   ``TIOCSETD`` ioctl.</div><div class='add'>+</div><div class='add'>+#. Configure the mux using ``GSMIOC_GETCONF_EXT``/``GSMIOC_SETCONF_EXT``</div><div class='add'>+   ioctl if needed.</div><div class='add'>+</div><div class='add'>+#. Configure the mux using ``GSMIOC_GETCONF``/``GSMIOC_SETCONF`` ioctl.</div><div class='add'>+</div><div class='add'>+#. Configure DLCs using ``GSMIOC_GETCONF_DLCI``/``GSMIOC_SETCONF_DLCI`` ioctl for non-defaults.</div><div class='add'>+</div><div class='add'>+#. Obtain base gsmtty number for the used serial port::</div><div class='add'>+</div><div class='add'>+        #include &lt;stdio.h&gt;</div><div class='add'>+        #include &lt;stdint.h&gt;</div><div class='add'>+        #include &lt;linux/gsmmux.h&gt;</div><div class='add'>+        #include &lt;linux/tty.h&gt;</div><div class='add'>+        #define DEFAULT_SPEED	B115200</div><div class='add'>+        #define SERIAL_PORT	/dev/ttyS0</div><div class='add'>+</div><div class='add'>+	int ldisc = N_GSM0710;</div><div class='add'>+	struct gsm_config c;</div><div class='add'>+	struct gsm_config_ext ce;</div><div class='add'>+	struct gsm_dlci_config dc;</div><div class='add'>+	struct termios configuration;</div><div class='add'>+	uint32_t first;</div><div class='add'>+</div><div class='add'>+	/* open the serial port */</div><div class='add'>+	fd = open(SERIAL_PORT, O_RDWR | O_NOCTTY | O_NDELAY);</div><div class='add'>+</div><div class='add'>+	/* configure the serial port : speed, flow control ... */</div><div class='add'>+</div><div class='add'>+	/* get serial data and check "AT+CMUX=command" parameter ... */</div><div class='add'>+</div><div class='add'>+	/* use n_gsm line discipline */</div><div class='add'>+	ioctl(fd, TIOCSETD, &amp;ldisc);</div><div class='add'>+</div><div class='add'>+	/* get n_gsm extended configuration */</div><div class='add'>+	ioctl(fd, GSMIOC_GETCONF_EXT, &amp;ce);</div><div class='add'>+	/* use keep-alive once every 5s for peer connection supervision */</div><div class='add'>+	ce.keep_alive = 500;</div><div class='add'>+	/* set the new extended configuration */</div><div class='add'>+	ioctl(fd, GSMIOC_SETCONF_EXT, &amp;ce);</div><div class='add'>+	/* get n_gsm configuration */</div><div class='add'>+	ioctl(fd, GSMIOC_GETCONF, &amp;c);</div><div class='add'>+	/* we are requester and need encoding 0 (basic) */</div><div class='add'>+	c.initiator = 0;</div><div class='add'>+	c.encapsulation = 0;</div><div class='add'>+	/* our modem defaults to a maximum size of 127 bytes */</div><div class='add'>+	c.mru = 127;</div><div class='add'>+	c.mtu = 127;</div><div class='add'>+	/* set the new configuration */</div><div class='add'>+	ioctl(fd, GSMIOC_SETCONF, &amp;c);</div><div class='add'>+	/* get DLC 1 configuration */</div><div class='add'>+	dc.channel = 1;</div><div class='add'>+	ioctl(fd, GSMIOC_GETCONF_DLCI, &amp;dc);</div><div class='add'>+	/* the first user channel gets a higher priority */</div><div class='add'>+	dc.priority = 1;</div><div class='add'>+	/* set the new DLC 1 specific configuration */</div><div class='add'>+	ioctl(fd, GSMIOC_SETCONF_DLCI, &amp;dc);</div><div class='add'>+	/* get first gsmtty device node */</div><div class='add'>+	ioctl(fd, GSMIOC_GETFIRST, &amp;first);</div><div class='add'>+	printf("first muxed line: /dev/gsmtty%i\n", first);</div><div class='add'>+</div><div class='add'>+	/* and wait for ever to keep the line discipline enabled */</div><div class='add'>+	daemon(0,0);</div><div class='add'>+	pause();</div><div class='add'>+</div><div class='add'>+11-03-08 - Eric Bénard - &lt;eric@eukrea.com&gt;</div><div class='head'>diff --git a/Documentation/tty/n_tty.rst b/Documentation/driver-api/tty/n_tty.rst<br/>index 15b70faee72d..15b70faee72d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/n_tty.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/n_tty.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/n_tty.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/n_tty.rst</a></div><div class='head'>diff --git a/Documentation/tty/tty_buffer.rst b/Documentation/driver-api/tty/tty_buffer.rst<br/>index a39d4781e0d2..a39d4781e0d2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/tty_buffer.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/tty_buffer.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/tty_buffer.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/tty_buffer.rst</a></div><div class='head'>diff --git a/Documentation/tty/tty_driver.rst b/Documentation/driver-api/tty/tty_driver.rst<br/>index cc529f863406..cc529f863406 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/tty_driver.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/tty_driver.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/tty_driver.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/tty_driver.rst</a></div><div class='head'>diff --git a/Documentation/tty/tty_internals.rst b/Documentation/driver-api/tty/tty_internals.rst<br/>index d0d415820300..d0d415820300 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/tty_internals.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/tty_internals.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/tty_internals.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/tty_internals.rst</a></div><div class='head'>diff --git a/Documentation/tty/tty_ldisc.rst b/Documentation/driver-api/tty/tty_ldisc.rst<br/>index 5144751be804..5144751be804 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/tty_ldisc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/tty_ldisc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/tty_ldisc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/tty_ldisc.rst</a></div><div class='head'>diff --git a/Documentation/tty/tty_port.rst b/Documentation/driver-api/tty/tty_port.rst<br/>index 5cb90e954fcf..5cb90e954fcf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/tty_port.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/tty_port.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/tty_port.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/tty_port.rst</a></div><div class='head'>diff --git a/Documentation/tty/tty_struct.rst b/Documentation/driver-api/tty/tty_struct.rst<br/>index c72f5a4293b2..c72f5a4293b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/tty/tty_struct.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/tty/tty_struct.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/tty/tty_struct.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/tty/tty_struct.rst</a></div><div class='head'>diff --git a/Documentation/driver-api/usb/dwc3.rst b/Documentation/driver-api/usb/dwc3.rst<br/>index 8b36ff11cef9..e3d6a620997f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/usb/dwc3.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/usb/dwc3.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/usb/dwc3.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/usb/dwc3.rst</a></div><div class='hunk'>@@ -18,7 +18,7 @@ controller which can be configured in one of 4 ways:</div><div class='ctx'> 	4. Hub configuration</div><div class='ctx'> </div><div class='ctx'> Linux currently supports several versions of this controller. In all</div><div class='del'>-likelyhood, the version in your SoC is already supported. At the time</div><div class='add'>+likelihood, the version in your SoC is already supported. At the time</div><div class='ctx'> of this writing, known tested versions range from 2.02a to 3.10a. As a</div><div class='ctx'> rule of thumb, anything above 2.02a should work reliably well.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/usb/usb3-debug-port.rst b/Documentation/driver-api/usb/usb3-debug-port.rst<br/>index b9fd131f4723..d4610457b052 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/usb/usb3-debug-port.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/usb/usb3-debug-port.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/usb/usb3-debug-port.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/usb/usb3-debug-port.rst</a></div><div class='hunk'>@@ -48,7 +48,7 @@ kernel boot parameter::</div><div class='ctx'> 	"earlyprintk=xdbc"</div><div class='ctx'> </div><div class='ctx'> If there are multiple xHCI controllers in your system, you can</div><div class='del'>-append a host contoller index to this kernel parameter. This</div><div class='add'>+append a host controller index to this kernel parameter. This</div><div class='ctx'> index starts from 0.</div><div class='ctx'> </div><div class='ctx'> Current design doesn't support DbC runtime suspend/resume. As</div><div class='head'>diff --git a/Documentation/driver-api/vfio-mediated-device.rst b/Documentation/driver-api/vfio-mediated-device.rst<br/>index 9f26079cacae..bbd548b66b42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/vfio-mediated-device.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/vfio-mediated-device.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/vfio-mediated-device.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/vfio-mediated-device.rst</a></div><div class='hunk'>@@ -1,3 +1,4 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='ctx'> .. include:: &lt;isonum.txt&gt;</div><div class='ctx'> </div><div class='ctx'> =====================</div><div class='hunk'>@@ -8,9 +9,6 @@ VFIO Mediated devices</div><div class='ctx'> :Author: Neo Jia &lt;cjia@nvidia.com&gt;</div><div class='ctx'> :Author: Kirti Wankhede &lt;kwankhede@nvidia.com&gt;</div><div class='ctx'> </div><div class='del'>-This program is free software; you can redistribute it and/or modify</div><div class='del'>-it under the terms of the GNU General Public License version 2 as</div><div class='del'>-published by the Free Software Foundation.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Virtual Function I/O (VFIO) Mediated devices[1]</div><div class='hunk'>@@ -60,23 +58,17 @@ devices as examples, as these devices are the first devices to use this module::</div><div class='ctx'>      |  MDEV CORE    |</div><div class='ctx'>      |   MODULE      |</div><div class='ctx'>      |   mdev.ko     |</div><div class='del'>-     | +-----------+ |  mdev_register_device() +--------------+</div><div class='add'>+     | +-----------+ |  mdev_register_parent() +--------------+</div><div class='ctx'>      | |           | +&lt;------------------------+              |</div><div class='del'>-     | |           | |                         |  nvidia.ko   |&lt;-&gt; physical</div><div class='add'>+     | |           | |                         | ccw_device.ko|&lt;-&gt; physical</div><div class='ctx'>      | |           | +------------------------&gt;+              |    device</div><div class='ctx'>      | |           | |        callbacks        +--------------+</div><div class='ctx'>      | | Physical  | |</div><div class='del'>-     | |  device   | |  mdev_register_device() +--------------+</div><div class='add'>+     | |  device   | |  mdev_register_parent() +--------------+</div><div class='ctx'>      | | interface | |&lt;------------------------+              |</div><div class='ctx'>      | |           | |                         |  i915.ko     |&lt;-&gt; physical</div><div class='ctx'>      | |           | +------------------------&gt;+              |    device</div><div class='ctx'>      | |           | |        callbacks        +--------------+</div><div class='del'>-     | |           | |</div><div class='del'>-     | |           | |  mdev_register_device() +--------------+</div><div class='del'>-     | |           | +&lt;------------------------+              |</div><div class='del'>-     | |           | |                         | ccw_device.ko|&lt;-&gt; physical</div><div class='del'>-     | |           | +------------------------&gt;+              |    device</div><div class='del'>-     | |           | |        callbacks        +--------------+</div><div class='ctx'>      | +-----------+ |</div><div class='ctx'>      +---------------+</div><div class='ctx'> </div><div class='hunk'>@@ -105,6 +97,8 @@ structure to represent a mediated device's driver::</div><div class='ctx'>      struct mdev_driver {</div><div class='ctx'> 	     int  (*probe)  (struct mdev_device *dev);</div><div class='ctx'> 	     void (*remove) (struct mdev_device *dev);</div><div class='add'>+	     unsigned int (*get_available)(struct mdev_type *mtype);</div><div class='add'>+	     ssize_t (*show_description)(struct mdev_type *mtype, char *buf);</div><div class='ctx'> 	     struct device_driver    driver;</div><div class='ctx'>      };</div><div class='ctx'> </div><div class='hunk'>@@ -113,39 +107,21 @@ to register and unregister itself with the core driver:</div><div class='ctx'> </div><div class='ctx'> * Register::</div><div class='ctx'> </div><div class='del'>-    extern int  mdev_register_driver(struct mdev_driver *drv);</div><div class='add'>+    int mdev_register_driver(struct mdev_driver *drv);</div><div class='ctx'> </div><div class='ctx'> * Unregister::</div><div class='ctx'> </div><div class='del'>-    extern void mdev_unregister_driver(struct mdev_driver *drv);</div><div class='del'>-</div><div class='del'>-The mediated bus driver is responsible for adding mediated devices to the VFIO</div><div class='del'>-group when devices are bound to the driver and removing mediated devices from</div><div class='del'>-the VFIO when devices are unbound from the driver.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Physical Device Driver Interface</div><div class='del'>---------------------------------</div><div class='add'>+    void mdev_unregister_driver(struct mdev_driver *drv);</div><div class='ctx'> </div><div class='del'>-The physical device driver interface provides the mdev_parent_ops[3] structure</div><div class='del'>-to define the APIs to manage work in the mediated core driver that is related</div><div class='del'>-to the physical device.</div><div class='del'>-</div><div class='del'>-The structures in the mdev_parent_ops structure are as follows:</div><div class='del'>-</div><div class='del'>-* dev_attr_groups: attributes of the parent device</div><div class='del'>-* mdev_attr_groups: attributes of the mediated device</div><div class='del'>-* supported_config: attributes to define supported configurations</div><div class='del'>-* device_driver: device driver to bind for mediated device instances</div><div class='del'>-</div><div class='del'>-The mdev_parent_ops also still has various functions pointers.  Theses exist</div><div class='del'>-for historical reasons only and shall not be used for new drivers.</div><div class='add'>+The mediated bus driver's probe function should create a vfio_device on top of</div><div class='add'>+the mdev_device and connect it to an appropriate implementation of</div><div class='add'>+vfio_device_ops.</div><div class='ctx'> </div><div class='ctx'> When a driver wants to add the GUID creation sysfs to an existing device it has</div><div class='ctx'> probe'd to then it should call::</div><div class='ctx'> </div><div class='del'>-	extern int  mdev_register_device(struct device *dev,</div><div class='del'>-	                                 const struct mdev_parent_ops *ops);</div><div class='add'>+    int mdev_register_parent(struct mdev_parent *parent, struct device *dev,</div><div class='add'>+			struct mdev_driver *mdev_driver);</div><div class='ctx'> </div><div class='ctx'> This will provide the 'mdev_supported_types/XX/create' files which can then be</div><div class='ctx'> used to trigger the creation of a mdev_device. The created mdev_device will be</div><div class='hunk'>@@ -153,7 +129,7 @@ attached to the specified driver.</div><div class='ctx'> </div><div class='ctx'> When the driver needs to remove itself it calls::</div><div class='ctx'> </div><div class='del'>-	extern void mdev_unregister_device(struct device *dev);</div><div class='add'>+    void mdev_unregister_parent(struct mdev_parent *parent);</div><div class='ctx'> </div><div class='ctx'> Which will unbind and destroy all the created mdevs and remove the sysfs files.</div><div class='ctx'> </div><div class='hunk'>@@ -219,17 +195,14 @@ Directories and files under the sysfs for Each Physical Device</div><div class='ctx'> </div><div class='ctx'> 	sprintf(buf, "%s-%s", dev_driver_string(parent-&gt;dev), group-&gt;name);</div><div class='ctx'> </div><div class='del'>-  (or using mdev_parent_dev(mdev) to arrive at the parent device outside</div><div class='del'>-  of the core mdev code)</div><div class='del'>-</div><div class='ctx'> * device_api</div><div class='ctx'> </div><div class='del'>-  This attribute should show which device API is being created, for example,</div><div class='add'>+  This attribute shows which device API is being created, for example,</div><div class='ctx'>   "vfio-pci" for a PCI device.</div><div class='ctx'> </div><div class='ctx'> * available_instances</div><div class='ctx'> </div><div class='del'>-  This attribute should show the number of devices of type &lt;type-id&gt; that can be</div><div class='add'>+  This attribute shows the number of devices of type &lt;type-id&gt; that can be</div><div class='ctx'>   created.</div><div class='ctx'> </div><div class='ctx'> * [device]</div><div class='hunk'>@@ -239,11 +212,11 @@ Directories and files under the sysfs for Each Physical Device</div><div class='ctx'> </div><div class='ctx'> * name</div><div class='ctx'> </div><div class='del'>-  This attribute should show human readable name. This is optional attribute.</div><div class='add'>+  This attribute shows a human readable name.</div><div class='ctx'> </div><div class='ctx'> * description</div><div class='ctx'> </div><div class='del'>-  This attribute should show brief features/description of the type. This is</div><div class='add'>+  This attribute can show brief features/description of the type. This is an</div><div class='ctx'>   optional attribute.</div><div class='ctx'> </div><div class='ctx'> Directories and Files Under the sysfs for Each mdev Device</div><div class='hunk'>@@ -279,10 +252,10 @@ Translation APIs for Mediated Devices</div><div class='ctx'> The following APIs are provided for translating user pfn to host pfn in a VFIO</div><div class='ctx'> driver::</div><div class='ctx'> </div><div class='del'>-	extern int vfio_pin_pages(struct device *dev, unsigned long *user_pfn,</div><div class='del'>-				  int npage, int prot, unsigned long *phys_pfn);</div><div class='add'>+	int vfio_pin_pages(struct vfio_device *device, dma_addr_t iova,</div><div class='add'>+				  int npage, int prot, struct page **pages);</div><div class='ctx'> </div><div class='del'>-	extern int vfio_unpin_pages(struct device *dev, unsigned long *user_pfn,</div><div class='add'>+	void vfio_unpin_pages(struct vfio_device *device, dma_addr_t iova,</div><div class='ctx'> 				    int npage);</div><div class='ctx'> </div><div class='ctx'> These functions call back into the back-end IOMMU module by using the pin_pages</div><div class='hunk'>@@ -291,106 +264,6 @@ these callbacks are supported in the TYPE1 IOMMU module. To enable them for</div><div class='ctx'> other IOMMU backend modules, such as PPC64 sPAPR module, they need to provide</div><div class='ctx'> these two callback functions.</div><div class='ctx'> </div><div class='del'>-Using the Sample Code</div><div class='del'>-=====================</div><div class='del'>-</div><div class='del'>-mtty.c in samples/vfio-mdev/ directory is a sample driver program to</div><div class='del'>-demonstrate how to use the mediated device framework.</div><div class='del'>-</div><div class='del'>-The sample driver creates an mdev device that simulates a serial port over a PCI</div><div class='del'>-card.</div><div class='del'>-</div><div class='del'>-1. Build and load the mtty.ko module.</div><div class='del'>-</div><div class='del'>-   This step creates a dummy device, /sys/devices/virtual/mtty/mtty/</div><div class='del'>-</div><div class='del'>-   Files in this device directory in sysfs are similar to the following::</div><div class='del'>-</div><div class='del'>-     # tree /sys/devices/virtual/mtty/mtty/</div><div class='del'>-        /sys/devices/virtual/mtty/mtty/</div><div class='del'>-        |-- mdev_supported_types</div><div class='del'>-        |   |-- mtty-1</div><div class='del'>-        |   |   |-- available_instances</div><div class='del'>-        |   |   |-- create</div><div class='del'>-        |   |   |-- device_api</div><div class='del'>-        |   |   |-- devices</div><div class='del'>-        |   |   `-- name</div><div class='del'>-        |   `-- mtty-2</div><div class='del'>-        |       |-- available_instances</div><div class='del'>-        |       |-- create</div><div class='del'>-        |       |-- device_api</div><div class='del'>-        |       |-- devices</div><div class='del'>-        |       `-- name</div><div class='del'>-        |-- mtty_dev</div><div class='del'>-        |   `-- sample_mtty_dev</div><div class='del'>-        |-- power</div><div class='del'>-        |   |-- autosuspend_delay_ms</div><div class='del'>-        |   |-- control</div><div class='del'>-        |   |-- runtime_active_time</div><div class='del'>-        |   |-- runtime_status</div><div class='del'>-        |   `-- runtime_suspended_time</div><div class='del'>-        |-- subsystem -&gt; ../../../../class/mtty</div><div class='del'>-        `-- uevent</div><div class='del'>-</div><div class='del'>-2. Create a mediated device by using the dummy device that you created in the</div><div class='del'>-   previous step::</div><div class='del'>-</div><div class='del'>-     # echo "83b8f4f2-509f-382f-3c1e-e6bfe0fa1001" &gt;	\</div><div class='del'>-              /sys/devices/virtual/mtty/mtty/mdev_supported_types/mtty-2/create</div><div class='del'>-</div><div class='del'>-3. Add parameters to qemu-kvm::</div><div class='del'>-</div><div class='del'>-     -device vfio-pci,\</div><div class='del'>-      sysfsdev=/sys/bus/mdev/devices/83b8f4f2-509f-382f-3c1e-e6bfe0fa1001</div><div class='del'>-</div><div class='del'>-4. Boot the VM.</div><div class='del'>-</div><div class='del'>-   In the Linux guest VM, with no hardware on the host, the device appears</div><div class='del'>-   as  follows::</div><div class='del'>-</div><div class='del'>-     # lspci -s 00:05.0 -xxvv</div><div class='del'>-     00:05.0 Serial controller: Device 4348:3253 (rev 10) (prog-if 02 [16550])</div><div class='del'>-             Subsystem: Device 4348:3253</div><div class='del'>-             Physical Slot: 5</div><div class='del'>-             Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr-</div><div class='del'>-     Stepping- SERR- FastB2B- DisINTx-</div><div class='del'>-             Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium &gt;TAbort-</div><div class='del'>-     &lt;TAbort- &lt;MAbort- &gt;SERR- &lt;PERR- INTx-</div><div class='del'>-             Interrupt: pin A routed to IRQ 10</div><div class='del'>-             Region 0: I/O ports at c150 [size=8]</div><div class='del'>-             Region 1: I/O ports at c158 [size=8]</div><div class='del'>-             Kernel driver in use: serial</div><div class='del'>-     00: 48 43 53 32 01 00 00 02 10 02 00 07 00 00 00 00</div><div class='del'>-     10: 51 c1 00 00 59 c1 00 00 00 00 00 00 00 00 00 00</div><div class='del'>-     20: 00 00 00 00 00 00 00 00 00 00 00 00 48 43 53 32</div><div class='del'>-     30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 01 00 00</div><div class='del'>-</div><div class='del'>-     In the Linux guest VM, dmesg output for the device is as follows:</div><div class='del'>-</div><div class='del'>-     serial 0000:00:05.0: PCI INT A -&gt; Link[LNKA] -&gt; GSI 10 (level, high) -&gt; IRQ 10</div><div class='del'>-     0000:00:05.0: ttyS1 at I/O 0xc150 (irq = 10) is a 16550A</div><div class='del'>-     0000:00:05.0: ttyS2 at I/O 0xc158 (irq = 10) is a 16550A</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-5. In the Linux guest VM, check the serial ports::</div><div class='del'>-</div><div class='del'>-     # setserial -g /dev/ttyS*</div><div class='del'>-     /dev/ttyS0, UART: 16550A, Port: 0x03f8, IRQ: 4</div><div class='del'>-     /dev/ttyS1, UART: 16550A, Port: 0xc150, IRQ: 10</div><div class='del'>-     /dev/ttyS2, UART: 16550A, Port: 0xc158, IRQ: 10</div><div class='del'>-</div><div class='del'>-6. Using minicom or any terminal emulation program, open port /dev/ttyS1 or</div><div class='del'>-   /dev/ttyS2 with hardware flow control disabled.</div><div class='del'>-</div><div class='del'>-7. Type data on the minicom terminal or send data to the terminal emulation</div><div class='del'>-   program and read the data.</div><div class='del'>-</div><div class='del'>-   Data is loop backed from hosts mtty driver.</div><div class='del'>-</div><div class='del'>-8. Destroy the mediated device that you created::</div><div class='del'>-</div><div class='del'>-     # echo 1 &gt; /sys/bus/mdev/devices/83b8f4f2-509f-382f-3c1e-e6bfe0fa1001/remove</div><div class='del'>-</div><div class='ctx'> References</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/driver-api/vfio.rst b/Documentation/driver-api/vfio.rst<br/>index c663b6f97825..68abc089d6dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/vfio.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/vfio.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/vfio.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/vfio.rst</a></div><div class='hunk'>@@ -242,26 +242,28 @@ group and can access them as follows::</div><div class='ctx'> VFIO User API</div><div class='ctx'> -------------------------------------------------------------------------------</div><div class='ctx'> </div><div class='del'>-Please see include/linux/vfio.h for complete API documentation.</div><div class='add'>+Please see include/uapi/linux/vfio.h for complete API documentation.</div><div class='ctx'> </div><div class='ctx'> VFIO bus driver API</div><div class='ctx'> -------------------------------------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> VFIO bus drivers, such as vfio-pci make use of only a few interfaces</div><div class='ctx'> into VFIO core.  When devices are bound and unbound to the driver,</div><div class='del'>-the driver should call vfio_register_group_dev() and</div><div class='del'>-vfio_unregister_group_dev() respectively::</div><div class='add'>+Following interfaces are called when devices are bound to and</div><div class='add'>+unbound from the driver::</div><div class='ctx'> </div><div class='del'>-	void vfio_init_group_dev(struct vfio_device *device,</div><div class='del'>-				struct device *dev,</div><div class='del'>-				const struct vfio_device_ops *ops);</div><div class='del'>-	void vfio_uninit_group_dev(struct vfio_device *device);</div><div class='ctx'> 	int vfio_register_group_dev(struct vfio_device *device);</div><div class='add'>+	int vfio_register_emulated_iommu_dev(struct vfio_device *device);</div><div class='ctx'> 	void vfio_unregister_group_dev(struct vfio_device *device);</div><div class='ctx'> </div><div class='del'>-The driver should embed the vfio_device in its own structure and call</div><div class='del'>-vfio_init_group_dev() to pre-configure it before going to registration</div><div class='del'>-and call vfio_uninit_group_dev() after completing the un-registration.</div><div class='add'>+The driver should embed the vfio_device in its own structure and use</div><div class='add'>+vfio_alloc_device() to allocate the structure, and can register</div><div class='add'>+@init/@release callbacks to manage any private state wrapping the</div><div class='add'>+vfio_device::</div><div class='add'>+</div><div class='add'>+	vfio_alloc_device(dev_struct, member, dev, ops);</div><div class='add'>+	void vfio_put_device(struct vfio_device *device);</div><div class='add'>+</div><div class='ctx'> vfio_register_group_dev() indicates to the core to begin tracking the</div><div class='ctx'> iommu_group of the specified dev and register the dev as owned by a VFIO bus</div><div class='ctx'> driver. Once vfio_register_group_dev() returns it is possible for userspace to</div><div class='hunk'>@@ -270,28 +272,64 @@ ready before calling it. The driver provides an ops structure for callbacks</div><div class='ctx'> similar to a file operations structure::</div><div class='ctx'> </div><div class='ctx'> 	struct vfio_device_ops {</div><div class='del'>-		int	(*open)(struct vfio_device *vdev);</div><div class='add'>+		char	*name;</div><div class='add'>+		int	(*init)(struct vfio_device *vdev);</div><div class='ctx'> 		void	(*release)(struct vfio_device *vdev);</div><div class='add'>+		int	(*bind_iommufd)(struct vfio_device *vdev,</div><div class='add'>+					struct iommufd_ctx *ictx, u32 *out_device_id);</div><div class='add'>+		void	(*unbind_iommufd)(struct vfio_device *vdev);</div><div class='add'>+		int	(*attach_ioas)(struct vfio_device *vdev, u32 *pt_id);</div><div class='add'>+		int	(*open_device)(struct vfio_device *vdev);</div><div class='add'>+		void	(*close_device)(struct vfio_device *vdev);</div><div class='ctx'> 		ssize_t	(*read)(struct vfio_device *vdev, char __user *buf,</div><div class='ctx'> 				size_t count, loff_t *ppos);</div><div class='del'>-		ssize_t	(*write)(struct vfio_device *vdev,</div><div class='del'>-				 const char __user *buf,</div><div class='del'>-				 size_t size, loff_t *ppos);</div><div class='add'>+		ssize_t	(*write)(struct vfio_device *vdev, const char __user *buf,</div><div class='add'>+			 size_t count, loff_t *size);</div><div class='ctx'> 		long	(*ioctl)(struct vfio_device *vdev, unsigned int cmd,</div><div class='ctx'> 				 unsigned long arg);</div><div class='del'>-		int	(*mmap)(struct vfio_device *vdev,</div><div class='del'>-				struct vm_area_struct *vma);</div><div class='add'>+		int	(*mmap)(struct vfio_device *vdev, struct vm_area_struct *vma);</div><div class='add'>+		void	(*request)(struct vfio_device *vdev, unsigned int count);</div><div class='add'>+		int	(*match)(struct vfio_device *vdev, char *buf);</div><div class='add'>+		void	(*dma_unmap)(struct vfio_device *vdev, u64 iova, u64 length);</div><div class='add'>+		int	(*device_feature)(struct vfio_device *device, u32 flags,</div><div class='add'>+					  void __user *arg, size_t argsz);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> Each function is passed the vdev that was originally registered</div><div class='del'>-in the vfio_register_group_dev() call above.  This allows the bus driver</div><div class='del'>-to obtain its private data using container_of().  The open/release</div><div class='del'>-callbacks are issued when a new file descriptor is created for a</div><div class='del'>-device (via VFIO_GROUP_GET_DEVICE_FD).  The ioctl interface provides</div><div class='del'>-a direct pass through for VFIO_DEVICE_* ioctls.  The read/write/mmap</div><div class='del'>-interfaces implement the device region access defined by the device's</div><div class='del'>-own VFIO_DEVICE_GET_REGION_INFO ioctl.</div><div class='add'>+in the vfio_register_group_dev() or vfio_register_emulated_iommu_dev()</div><div class='add'>+call above. This allows the bus driver to obtain its private data using</div><div class='add'>+container_of().</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	- The init/release callbacks are issued when vfio_device is initialized</div><div class='add'>+	  and released.</div><div class='add'>+</div><div class='add'>+	- The open/close device callbacks are issued when the first</div><div class='add'>+	  instance of a file descriptor for the device is created (eg.</div><div class='add'>+	  via VFIO_GROUP_GET_DEVICE_FD) for a user session.</div><div class='add'>+</div><div class='add'>+	- The ioctl callback provides a direct pass through for some VFIO_DEVICE_*</div><div class='add'>+	  ioctls.</div><div class='add'>+</div><div class='add'>+	- The [un]bind_iommufd callbacks are issued when the device is bound to</div><div class='add'>+	  and unbound from iommufd.</div><div class='add'>+</div><div class='add'>+	- The attach_ioas callback is issued when the device is attached to an</div><div class='add'>+	  IOAS managed by the bound iommufd. The attached IOAS is automatically</div><div class='add'>+	  detached when the device is unbound from iommufd.</div><div class='add'>+</div><div class='add'>+	- The read/write/mmap callbacks implement the device region access defined</div><div class='add'>+	  by the device's own VFIO_DEVICE_GET_REGION_INFO ioctl.</div><div class='add'>+</div><div class='add'>+	- The request callback is issued when device is going to be unregistered,</div><div class='add'>+	  such as when trying to unbind the device from the vfio bus driver.</div><div class='ctx'> </div><div class='add'>+	- The dma_unmap callback is issued when a range of iovas are unmapped</div><div class='add'>+	  in the container or IOAS attached by the device. Drivers which make</div><div class='add'>+	  use of the vfio page pinning interface must implement this callback in</div><div class='add'>+	  order to unpin pages within the dma_unmap range. Drivers must tolerate</div><div class='add'>+	  this callback even before calls to open_device().</div><div class='ctx'> </div><div class='ctx'> PPC64 sPAPR implementation note</div><div class='ctx'> -------------------------------</div><div class='head'>diff --git a/Documentation/driver-api/virtio/index.rst b/Documentation/driver-api/virtio/index.rst<br/>new file mode 100644<br/>index 000000000000..528b14b291e3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/virtio/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/virtio/index.rst</a></div><div class='hunk'>@@ -0,0 +1,11 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+======</div><div class='add'>+Virtio</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   virtio</div><div class='add'>+   writing_virtio_drivers</div><div class='head'>diff --git a/Documentation/driver-api/virtio/virtio.rst b/Documentation/driver-api/virtio/virtio.rst<br/>new file mode 100644<br/>index 000000000000..7947b4ca690e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/virtio/virtio.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/virtio/virtio.rst</a></div><div class='hunk'>@@ -0,0 +1,145 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. _virtio:</div><div class='add'>+</div><div class='add'>+===============</div><div class='add'>+Virtio on Linux</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+Virtio is an open standard that defines a protocol for communication</div><div class='add'>+between drivers and devices of different types, see Chapter 5 ("Device</div><div class='add'>+Types") of the virtio spec (`[1]`_). Originally developed as a standard</div><div class='add'>+for paravirtualized devices implemented by a hypervisor, it can be used</div><div class='add'>+to interface any compliant device (real or emulated) with a driver.</div><div class='add'>+</div><div class='add'>+For illustrative purposes, this document will focus on the common case</div><div class='add'>+of a Linux kernel running in a virtual machine and using paravirtualized</div><div class='add'>+devices provided by the hypervisor, which exposes them as virtio devices</div><div class='add'>+via standard mechanisms such as PCI.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Device - Driver communication: virtqueues</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+Although the virtio devices are really an abstraction layer in the</div><div class='add'>+hypervisor, they're exposed to the guest as if they are physical devices</div><div class='add'>+using a specific transport method -- PCI, MMIO or CCW -- that is</div><div class='add'>+orthogonal to the device itself. The virtio spec defines these transport</div><div class='add'>+methods in detail, including device discovery, capabilities and</div><div class='add'>+interrupt handling.</div><div class='add'>+</div><div class='add'>+The communication between the driver in the guest OS and the device in</div><div class='add'>+the hypervisor is done through shared memory (that's what makes virtio</div><div class='add'>+devices so efficient) using specialized data structures called</div><div class='add'>+virtqueues, which are actually ring buffers [#f1]_ of buffer descriptors</div><div class='add'>+similar to the ones used in a network device:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/virtio_ring.h</div><div class='add'>+    :identifiers: struct vring_desc</div><div class='add'>+</div><div class='add'>+All the buffers the descriptors point to are allocated by the guest and</div><div class='add'>+used by the host either for reading or for writing but not for both.</div><div class='add'>+</div><div class='add'>+Refer to Chapter 2.5 ("Virtqueues") of the virtio spec (`[1]`_) for the</div><div class='add'>+reference definitions of virtqueues and "Virtqueues and virtio ring: How</div><div class='add'>+the data travels" blog post (`[2]`_) for an illustrated overview of how</div><div class='add'>+the host device and the guest driver communicate.</div><div class='add'>+</div><div class='add'>+The :c:type:`vring_virtqueue` struct models a virtqueue, including the</div><div class='add'>+ring buffers and management data. Embedded in this struct is the</div><div class='add'>+:c:type:`virtqueue` struct, which is the data structure that's</div><div class='add'>+ultimately used by virtio drivers:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/virtio.h</div><div class='add'>+    :identifiers: struct virtqueue</div><div class='add'>+</div><div class='add'>+The callback function pointed by this struct is triggered when the</div><div class='add'>+device has consumed the buffers provided by the driver. More</div><div class='add'>+specifically, the trigger will be an interrupt issued by the hypervisor</div><div class='add'>+(see vring_interrupt()). Interrupt request handlers are registered for</div><div class='add'>+a virtqueue during the virtqueue setup process (transport-specific).</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virtio/virtio_ring.c</div><div class='add'>+    :identifiers: vring_interrupt</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Device discovery and probing</div><div class='add'>+============================</div><div class='add'>+</div><div class='add'>+In the kernel, the virtio core contains the virtio bus driver and</div><div class='add'>+transport-specific drivers like `virtio-pci` and `virtio-mmio`. Then</div><div class='add'>+there are individual virtio drivers for specific device types that are</div><div class='add'>+registered to the virtio bus driver.</div><div class='add'>+</div><div class='add'>+How a virtio device is found and configured by the kernel depends on how</div><div class='add'>+the hypervisor defines it. Taking the `QEMU virtio-console</div><div class='add'>+&lt;https://gitlab.com/qemu-project/qemu/-/blob/master/hw/char/virtio-console.c&gt;`__</div><div class='add'>+device as an example. When using PCI as a transport method, the device</div><div class='add'>+will present itself on the PCI bus with vendor 0x1af4 (Red Hat, Inc.)</div><div class='add'>+and device id 0x1003 (virtio console), as defined in the spec, so the</div><div class='add'>+kernel will detect it as it would do with any other PCI device.</div><div class='add'>+</div><div class='add'>+During the PCI enumeration process, if a device is found to match the</div><div class='add'>+virtio-pci driver (according to the virtio-pci device table, any PCI</div><div class='add'>+device with vendor id = 0x1af4)::</div><div class='add'>+</div><div class='add'>+	/* Qumranet donated their vendor ID for devices 0x1000 thru 0x10FF. */</div><div class='add'>+	static const struct pci_device_id virtio_pci_id_table[] = {</div><div class='add'>+		{ PCI_DEVICE(PCI_VENDOR_ID_REDHAT_QUMRANET, PCI_ANY_ID) },</div><div class='add'>+		{ 0 }</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+then the virtio-pci driver is probed and, if the probing goes well, the</div><div class='add'>+device is registered to the virtio bus::</div><div class='add'>+</div><div class='add'>+	static int virtio_pci_probe(struct pci_dev *pci_dev,</div><div class='add'>+				    const struct pci_device_id *id)</div><div class='add'>+	{</div><div class='add'>+		...</div><div class='add'>+</div><div class='add'>+		if (force_legacy) {</div><div class='add'>+			rc = virtio_pci_legacy_probe(vp_dev);</div><div class='add'>+			/* Also try modern mode if we can't map BAR0 (no IO space). */</div><div class='add'>+			if (rc == -ENODEV || rc == -ENOMEM)</div><div class='add'>+				rc = virtio_pci_modern_probe(vp_dev);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto err_probe;</div><div class='add'>+		} else {</div><div class='add'>+			rc = virtio_pci_modern_probe(vp_dev);</div><div class='add'>+			if (rc == -ENODEV)</div><div class='add'>+				rc = virtio_pci_legacy_probe(vp_dev);</div><div class='add'>+			if (rc)</div><div class='add'>+				goto err_probe;</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		...</div><div class='add'>+</div><div class='add'>+		rc = register_virtio_device(&amp;vp_dev-&gt;vdev);</div><div class='add'>+</div><div class='add'>+When the device is registered to the virtio bus the kernel will look</div><div class='add'>+for a driver in the bus that can handle the device and call that</div><div class='add'>+driver's ``probe`` method.</div><div class='add'>+</div><div class='add'>+At this point, the virtqueues will be allocated and configured by</div><div class='add'>+calling the appropriate ``virtio_find`` helper function, such as</div><div class='add'>+virtio_find_single_vq() or virtio_find_vqs(), which will end up calling</div><div class='add'>+a transport-specific ``find_vqs`` method.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+_`[1]` Virtio Spec v1.2:</div><div class='add'>+https://docs.oasis-open.org/virtio/virtio/v1.2/virtio-v1.2.html</div><div class='add'>+</div><div class='add'>+.. Check for later versions of the spec as well.</div><div class='add'>+</div><div class='add'>+_`[2]` Virtqueues and virtio ring: How the data travels</div><div class='add'>+https://www.redhat.com/en/blog/virtqueues-and-virtio-ring-how-data-travels</div><div class='add'>+</div><div class='add'>+.. rubric:: Footnotes</div><div class='add'>+</div><div class='add'>+.. [#f1] that's why they may be also referred to as virtrings.</div><div class='head'>diff --git a/Documentation/driver-api/virtio/writing_virtio_drivers.rst b/Documentation/driver-api/virtio/writing_virtio_drivers.rst<br/>new file mode 100644<br/>index 000000000000..e14c58796d25<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/virtio/writing_virtio_drivers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/virtio/writing_virtio_drivers.rst</a></div><div class='hunk'>@@ -0,0 +1,197 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. _writing_virtio_drivers:</div><div class='add'>+</div><div class='add'>+======================</div><div class='add'>+Writing Virtio Drivers</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+This document serves as a basic guideline for driver programmers that</div><div class='add'>+need to hack a new virtio driver or understand the essentials of the</div><div class='add'>+existing ones. See :ref:`Virtio on Linux &lt;virtio&gt;` for a general</div><div class='add'>+overview of virtio.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Driver boilerplate</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+As a bare minimum, a virtio driver needs to register in the virtio bus</div><div class='add'>+and configure the virtqueues for the device according to its spec, the</div><div class='add'>+configuration of the virtqueues in the driver side must match the</div><div class='add'>+virtqueue definitions in the device. A basic driver skeleton could look</div><div class='add'>+like this::</div><div class='add'>+</div><div class='add'>+	#include &lt;linux/virtio.h&gt;</div><div class='add'>+	#include &lt;linux/virtio_ids.h&gt;</div><div class='add'>+	#include &lt;linux/virtio_config.h&gt;</div><div class='add'>+	#include &lt;linux/module.h&gt;</div><div class='add'>+</div><div class='add'>+	/* device private data (one per device) */</div><div class='add'>+	struct virtio_dummy_dev {</div><div class='add'>+		struct virtqueue *vq;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static void virtio_dummy_recv_cb(struct virtqueue *vq)</div><div class='add'>+	{</div><div class='add'>+		struct virtio_dummy_dev *dev = vq-&gt;vdev-&gt;priv;</div><div class='add'>+		char *buf;</div><div class='add'>+		unsigned int len;</div><div class='add'>+</div><div class='add'>+		while ((buf = virtqueue_get_buf(dev-&gt;vq, &amp;len)) != NULL) {</div><div class='add'>+			/* process the received data */</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	static int virtio_dummy_probe(struct virtio_device *vdev)</div><div class='add'>+	{</div><div class='add'>+		struct virtio_dummy_dev *dev = NULL;</div><div class='add'>+</div><div class='add'>+		/* initialize device data */</div><div class='add'>+		dev = kzalloc(sizeof(struct virtio_dummy_dev), GFP_KERNEL);</div><div class='add'>+		if (!dev)</div><div class='add'>+			return -ENOMEM;</div><div class='add'>+</div><div class='add'>+		/* the device has a single virtqueue */</div><div class='add'>+		dev-&gt;vq = virtio_find_single_vq(vdev, virtio_dummy_recv_cb, "input");</div><div class='add'>+		if (IS_ERR(dev-&gt;vq)) {</div><div class='add'>+			kfree(dev);</div><div class='add'>+			return PTR_ERR(dev-&gt;vq);</div><div class='add'>+</div><div class='add'>+		}</div><div class='add'>+		vdev-&gt;priv = dev;</div><div class='add'>+</div><div class='add'>+		/* from this point on, the device can notify and get callbacks */</div><div class='add'>+		virtio_device_ready(vdev);</div><div class='add'>+</div><div class='add'>+		return 0;</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	static void virtio_dummy_remove(struct virtio_device *vdev)</div><div class='add'>+	{</div><div class='add'>+		struct virtio_dummy_dev *dev = vdev-&gt;priv;</div><div class='add'>+</div><div class='add'>+		/*</div><div class='add'>+		 * disable vq interrupts: equivalent to</div><div class='add'>+		 * vdev-&gt;config-&gt;reset(vdev)</div><div class='add'>+		 */</div><div class='add'>+		virtio_reset_device(vdev);</div><div class='add'>+</div><div class='add'>+		/* detach unused buffers */</div><div class='add'>+		while ((buf = virtqueue_detach_unused_buf(dev-&gt;vq)) != NULL) {</div><div class='add'>+			kfree(buf);</div><div class='add'>+		}</div><div class='add'>+</div><div class='add'>+		/* remove virtqueues */</div><div class='add'>+		vdev-&gt;config-&gt;del_vqs(vdev);</div><div class='add'>+</div><div class='add'>+		kfree(dev);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	static const struct virtio_device_id id_table[] = {</div><div class='add'>+		{ VIRTIO_ID_DUMMY, VIRTIO_DEV_ANY_ID },</div><div class='add'>+		{ 0 },</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	static struct virtio_driver virtio_dummy_driver = {</div><div class='add'>+		.driver.name =  KBUILD_MODNAME,</div><div class='add'>+		.driver.owner = THIS_MODULE,</div><div class='add'>+		.id_table =     id_table,</div><div class='add'>+		.probe =        virtio_dummy_probe,</div><div class='add'>+		.remove =       virtio_dummy_remove,</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+	module_virtio_driver(virtio_dummy_driver);</div><div class='add'>+	MODULE_DEVICE_TABLE(virtio, id_table);</div><div class='add'>+	MODULE_DESCRIPTION("Dummy virtio driver");</div><div class='add'>+	MODULE_LICENSE("GPL");</div><div class='add'>+</div><div class='add'>+The device id ``VIRTIO_ID_DUMMY`` here is a placeholder, virtio drivers</div><div class='add'>+should be added only for devices that are defined in the spec, see</div><div class='add'>+include/uapi/linux/virtio_ids.h. Device ids need to be at least reserved</div><div class='add'>+in the virtio spec before being added to that file.</div><div class='add'>+</div><div class='add'>+If your driver doesn't have to do anything special in its ``init`` and</div><div class='add'>+``exit`` methods, you can use the module_virtio_driver() helper to</div><div class='add'>+reduce the amount of boilerplate code.</div><div class='add'>+</div><div class='add'>+The ``probe`` method does the minimum driver setup in this case</div><div class='add'>+(memory allocation for the device data) and initializes the</div><div class='add'>+virtqueue. virtio_device_ready() is used to enable the virtqueue and to</div><div class='add'>+notify the device that the driver is ready to manage the device</div><div class='add'>+("DRIVER_OK"). The virtqueues are anyway enabled automatically by the</div><div class='add'>+core after ``probe`` returns.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/virtio_config.h</div><div class='add'>+    :identifiers: virtio_device_ready</div><div class='add'>+</div><div class='add'>+In any case, the virtqueues need to be enabled before adding buffers to</div><div class='add'>+them.</div><div class='add'>+</div><div class='add'>+Sending and receiving data</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+The virtio_dummy_recv_cb() callback in the code above will be triggered</div><div class='add'>+when the device notifies the driver after it finishes processing a</div><div class='add'>+descriptor or descriptor chain, either for reading or writing. However,</div><div class='add'>+that's only the second half of the virtio device-driver communication</div><div class='add'>+process, as the communication is always started by the driver regardless</div><div class='add'>+of the direction of the data transfer.</div><div class='add'>+</div><div class='add'>+To configure a buffer transfer from the driver to the device, first you</div><div class='add'>+have to add the buffers -- packed as `scatterlists` -- to the</div><div class='add'>+appropriate virtqueue using any of the virtqueue_add_inbuf(),</div><div class='add'>+virtqueue_add_outbuf() or virtqueue_add_sgs(), depending on whether you</div><div class='add'>+need to add one input `scatterlist` (for the device to fill in), one</div><div class='add'>+output `scatterlist` (for the device to consume) or multiple</div><div class='add'>+`scatterlists`, respectively. Then, once the virtqueue is set up, a call</div><div class='add'>+to virtqueue_kick() sends a notification that will be serviced by the</div><div class='add'>+hypervisor that implements the device::</div><div class='add'>+</div><div class='add'>+	struct scatterlist sg[1];</div><div class='add'>+	sg_init_one(sg, buffer, BUFLEN);</div><div class='add'>+	virtqueue_add_inbuf(dev-&gt;vq, sg, 1, buffer, GFP_ATOMIC);</div><div class='add'>+	virtqueue_kick(dev-&gt;vq);</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virtio/virtio_ring.c</div><div class='add'>+    :identifiers: virtqueue_add_inbuf</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virtio/virtio_ring.c</div><div class='add'>+    :identifiers: virtqueue_add_outbuf</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virtio/virtio_ring.c</div><div class='add'>+    :identifiers: virtqueue_add_sgs</div><div class='add'>+</div><div class='add'>+Then, after the device has read or written the buffers prepared by the</div><div class='add'>+driver and notifies it back, the driver can call virtqueue_get_buf() to</div><div class='add'>+read the data produced by the device (if the virtqueue was set up with</div><div class='add'>+input buffers) or simply to reclaim the buffers if they were already</div><div class='add'>+consumed by the device:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virtio/virtio_ring.c</div><div class='add'>+    :identifiers: virtqueue_get_buf_ctx</div><div class='add'>+</div><div class='add'>+The virtqueue callbacks can be disabled and re-enabled using the</div><div class='add'>+virtqueue_disable_cb() and the family of virtqueue_enable_cb() functions</div><div class='add'>+respectively. See drivers/virtio/virtio_ring.c for more details:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virtio/virtio_ring.c</div><div class='add'>+    :identifiers: virtqueue_disable_cb</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/virtio/virtio_ring.c</div><div class='add'>+    :identifiers: virtqueue_enable_cb</div><div class='add'>+</div><div class='add'>+But note that some spurious callbacks can still be triggered under</div><div class='add'>+certain scenarios. The way to disable callbacks reliably is to reset the</div><div class='add'>+device or the virtqueue (virtio_reset_device()).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+_`[1]` Virtio Spec v1.2:</div><div class='add'>+https://docs.oasis-open.org/virtio/virtio/v1.2/virtio-v1.2.html</div><div class='add'>+</div><div class='add'>+Check for later versions of the spec as well.</div><div class='head'>diff --git a/Documentation/driver-api/vme.rst b/Documentation/driver-api/vme.rst<br/>index def139c13410..c0b475369de0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/vme.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/driver-api/vme.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/driver-api/vme.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/driver-api/vme.rst</a></div><div class='hunk'>@@ -290,8 +290,8 @@ The function :c:func:`vme_bus_num` returns the bus ID of the provided bridge.</div><div class='ctx'> VME API</div><div class='ctx'> -------</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/linux/vme.h</div><div class='add'>+.. kernel-doc:: drivers/staging/vme_user/vme.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/vme/vme.c</div><div class='add'>+.. kernel-doc:: drivers/staging/vme_user/vme.c</div><div class='ctx'>    :export:</div><div class='head'>diff --git a/Documentation/fault-injection/fault-injection.rst b/Documentation/fault-injection/fault-injection.rst<br/>index 4a25c5eb6f07..b64809514b0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/fault-injection/fault-injection.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/fault-injection/fault-injection.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/fault-injection/fault-injection.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/fault-injection/fault-injection.rst</a></div><div class='hunk'>@@ -52,6 +52,14 @@ Available fault injection capabilities</div><div class='ctx'>   status code is NVME_SC_INVALID_OPCODE with no retry. The status code and</div><div class='ctx'>   retry flag can be set via the debugfs.</div><div class='ctx'> </div><div class='add'>+- Null test block driver fault injection</div><div class='add'>+</div><div class='add'>+  inject IO timeouts by setting config items under</div><div class='add'>+  /sys/kernel/config/nullb/&lt;disk&gt;/timeout_inject,</div><div class='add'>+  inject requeue requests by setting config items under</div><div class='add'>+  /sys/kernel/config/nullb/&lt;disk&gt;/requeue_inject, and</div><div class='add'>+  inject init_hctx() errors by setting config items under</div><div class='add'>+  /sys/kernel/config/nullb/&lt;disk&gt;/init_hctx_fault_inject.</div><div class='ctx'> </div><div class='ctx'> Configure fault-injection capabilities behavior</div><div class='ctx'> -----------------------------------------------</div><div class='hunk'>@@ -83,9 +91,7 @@ configuration of fault-injection capabilities.</div><div class='ctx'> - /sys/kernel/debug/fail*/times:</div><div class='ctx'> </div><div class='ctx'> 	specifies how many times failures may happen at most. A value of -1</div><div class='del'>-	means "no limit". Note, though, that this file only accepts unsigned</div><div class='del'>-	values. So, if you want to specify -1, you better use 'printf' instead</div><div class='del'>-	of 'echo', e.g.: $ printf %#x -1 &gt; times</div><div class='add'>+	means "no limit".</div><div class='ctx'> </div><div class='ctx'> - /sys/kernel/debug/fail*/space:</div><div class='ctx'> </div><div class='hunk'>@@ -132,16 +138,16 @@ configuration of fault-injection capabilities.</div><div class='ctx'> </div><div class='ctx'> 	Format: { 'Y' | 'N' }</div><div class='ctx'> </div><div class='del'>-	default is 'N', setting it to 'Y' won't inject failures into</div><div class='del'>-	highmem/user allocations.</div><div class='add'>+	default is 'Y', setting it to 'N' will also inject failures into</div><div class='add'>+	highmem/user allocations (__GFP_HIGHMEM allocations).</div><div class='ctx'> </div><div class='ctx'> - /sys/kernel/debug/failslab/ignore-gfp-wait:</div><div class='ctx'> - /sys/kernel/debug/fail_page_alloc/ignore-gfp-wait:</div><div class='ctx'> </div><div class='ctx'> 	Format: { 'Y' | 'N' }</div><div class='ctx'> </div><div class='del'>-	default is 'N', setting it to 'Y' will inject failures</div><div class='del'>-	only into non-sleep allocations (GFP_ATOMIC allocations).</div><div class='add'>+	default is 'Y', setting it to 'N' will also inject failures</div><div class='add'>+	into allocations that can sleep (__GFP_DIRECT_RECLAIM allocations).</div><div class='ctx'> </div><div class='ctx'> - /sys/kernel/debug/fail_page_alloc/min-order:</div><div class='ctx'> </div><div class='hunk'>@@ -169,6 +175,13 @@ configuration of fault-injection capabilities.</div><div class='ctx'> 	default is 'N', setting it to 'Y' will disable disconnect</div><div class='ctx'> 	injection on the RPC server.</div><div class='ctx'> </div><div class='add'>+- /sys/kernel/debug/fail_sunrpc/ignore-cache-wait:</div><div class='add'>+</div><div class='add'>+	Format: { 'Y' | 'N' }</div><div class='add'>+</div><div class='add'>+	default is 'N', setting it to 'Y' will disable cache wait</div><div class='add'>+	injection on the RPC server.</div><div class='add'>+</div><div class='ctx'> - /sys/kernel/debug/fail_function/inject:</div><div class='ctx'> </div><div class='ctx'> 	Format: { 'function-name' | '!function-name' | '' }</div><div class='hunk'>@@ -226,6 +239,71 @@ proc entries</div><div class='ctx'> 	This feature is intended for systematic testing of faults in a single</div><div class='ctx'> 	system call. See an example below.</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+Error Injectable Functions</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+This part is for the kenrel developers considering to add a function to</div><div class='add'>+ALLOW_ERROR_INJECTION() macro.</div><div class='add'>+</div><div class='add'>+Requirements for the Error Injectable Functions</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Since the function-level error injection forcibly changes the code path</div><div class='add'>+and returns an error even if the input and conditions are proper, this can</div><div class='add'>+cause unexpected kernel crash if you allow error injection on the function</div><div class='add'>+which is NOT error injectable. Thus, you (and reviewers) must ensure;</div><div class='add'>+</div><div class='add'>+- The function returns an error code if it fails, and the callers must check</div><div class='add'>+  it correctly (need to recover from it).</div><div class='add'>+</div><div class='add'>+- The function does not execute any code which can change any state before</div><div class='add'>+  the first error return. The state includes global or local, or input</div><div class='add'>+  variable. For example, clear output address storage (e.g. `*ret = NULL`),</div><div class='add'>+  increments/decrements counter, set a flag, preempt/irq disable or get</div><div class='add'>+  a lock (if those are recovered before returning error, that will be OK.)</div><div class='add'>+</div><div class='add'>+The first requirement is important, and it will result in that the release</div><div class='add'>+(free objects) functions are usually harder to inject errors than allocate</div><div class='add'>+functions. If errors of such release functions are not correctly handled</div><div class='add'>+it will cause a memory leak easily (the caller will confuse that the object</div><div class='add'>+has been released or corrupted.)</div><div class='add'>+</div><div class='add'>+The second one is for the caller which expects the function should always</div><div class='add'>+does something. Thus if the function error injection skips whole of the</div><div class='add'>+function, the expectation is betrayed and causes an unexpected error.</div><div class='add'>+</div><div class='add'>+Type of the Error Injectable Functions</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Each error injectable functions will have the error type specified by the</div><div class='add'>+ALLOW_ERROR_INJECTION() macro. You have to choose it carefully if you add</div><div class='add'>+a new error injectable function. If the wrong error type is chosen, the</div><div class='add'>+kernel may crash because it may not be able to handle the error.</div><div class='add'>+There are 4 types of errors defined in include/asm-generic/error-injection.h</div><div class='add'>+</div><div class='add'>+EI_ETYPE_NULL</div><div class='add'>+  This function will return `NULL` if it fails. e.g. return an allocateed</div><div class='add'>+  object address.</div><div class='add'>+</div><div class='add'>+EI_ETYPE_ERRNO</div><div class='add'>+  This function will return an `-errno` error code if it fails. e.g. return</div><div class='add'>+  -EINVAL if the input is wrong. This will include the functions which will</div><div class='add'>+  return an address which encodes `-errno` by ERR_PTR() macro.</div><div class='add'>+</div><div class='add'>+EI_ETYPE_ERRNO_NULL</div><div class='add'>+  This function will return an `-errno` or `NULL` if it fails. If the caller</div><div class='add'>+  of this function checks the return value with IS_ERR_OR_NULL() macro, this</div><div class='add'>+  type will be appropriate.</div><div class='add'>+</div><div class='add'>+EI_ETYPE_TRUE</div><div class='add'>+  This function will return `true` (non-zero positive value) if it fails.</div><div class='add'>+</div><div class='add'>+If you specifies a wrong type, for example, EI_TYPE_ERRNO for the function</div><div class='add'>+which returns an allocated object, it may cause a problem because the returned</div><div class='add'>+value is not an object address and the caller can not access to the address.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> How to add new fault injection capability</div><div class='ctx'> -----------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -277,10 +355,10 @@ Application Examples</div><div class='ctx'>     echo Y &gt; /sys/kernel/debug/$FAILTYPE/task-filter</div><div class='ctx'>     echo 10 &gt; /sys/kernel/debug/$FAILTYPE/probability</div><div class='ctx'>     echo 100 &gt; /sys/kernel/debug/$FAILTYPE/interval</div><div class='del'>-    printf %#x -1 &gt; /sys/kernel/debug/$FAILTYPE/times</div><div class='add'>+    echo -1 &gt; /sys/kernel/debug/$FAILTYPE/times</div><div class='ctx'>     echo 0 &gt; /sys/kernel/debug/$FAILTYPE/space</div><div class='ctx'>     echo 2 &gt; /sys/kernel/debug/$FAILTYPE/verbose</div><div class='del'>-    echo 1 &gt; /sys/kernel/debug/$FAILTYPE/ignore-gfp-wait</div><div class='add'>+    echo Y &gt; /sys/kernel/debug/$FAILTYPE/ignore-gfp-wait</div><div class='ctx'> </div><div class='ctx'>     faulty_system()</div><div class='ctx'>     {</div><div class='hunk'>@@ -331,11 +409,11 @@ Application Examples</div><div class='ctx'>     echo N &gt; /sys/kernel/debug/$FAILTYPE/task-filter</div><div class='ctx'>     echo 10 &gt; /sys/kernel/debug/$FAILTYPE/probability</div><div class='ctx'>     echo 100 &gt; /sys/kernel/debug/$FAILTYPE/interval</div><div class='del'>-    printf %#x -1 &gt; /sys/kernel/debug/$FAILTYPE/times</div><div class='add'>+    echo -1 &gt; /sys/kernel/debug/$FAILTYPE/times</div><div class='ctx'>     echo 0 &gt; /sys/kernel/debug/$FAILTYPE/space</div><div class='ctx'>     echo 2 &gt; /sys/kernel/debug/$FAILTYPE/verbose</div><div class='del'>-    echo 1 &gt; /sys/kernel/debug/$FAILTYPE/ignore-gfp-wait</div><div class='del'>-    echo 1 &gt; /sys/kernel/debug/$FAILTYPE/ignore-gfp-highmem</div><div class='add'>+    echo Y &gt; /sys/kernel/debug/$FAILTYPE/ignore-gfp-wait</div><div class='add'>+    echo Y &gt; /sys/kernel/debug/$FAILTYPE/ignore-gfp-highmem</div><div class='ctx'>     echo 10 &gt; /sys/kernel/debug/$FAILTYPE/stacktrace-depth</div><div class='ctx'> </div><div class='ctx'>     trap "echo 0 &gt; /sys/kernel/debug/$FAILTYPE/probability" SIGINT SIGTERM EXIT</div><div class='hunk'>@@ -362,7 +440,7 @@ Application Examples</div><div class='ctx'>     echo N &gt; /sys/kernel/debug/$FAILTYPE/task-filter</div><div class='ctx'>     echo 100 &gt; /sys/kernel/debug/$FAILTYPE/probability</div><div class='ctx'>     echo 0 &gt; /sys/kernel/debug/$FAILTYPE/interval</div><div class='del'>-    printf %#x -1 &gt; /sys/kernel/debug/$FAILTYPE/times</div><div class='add'>+    echo -1 &gt; /sys/kernel/debug/$FAILTYPE/times</div><div class='ctx'>     echo 0 &gt; /sys/kernel/debug/$FAILTYPE/space</div><div class='ctx'>     echo 1 &gt; /sys/kernel/debug/$FAILTYPE/verbose</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/fault-injection/notifier-error-inject.rst b/Documentation/fault-injection/notifier-error-inject.rst<br/>index 1668b6e48d3a..fdf2dc433ead 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/fault-injection/notifier-error-inject.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/fault-injection/notifier-error-inject.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/fault-injection/notifier-error-inject.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/fault-injection/notifier-error-inject.rst</a></div><div class='hunk'>@@ -91,8 +91,8 @@ For more usage examples</div><div class='ctx'> There are tools/testing/selftests using the notifier error injection features</div><div class='ctx'> for CPU and memory notifiers.</div><div class='ctx'> </div><div class='del'>- * tools/testing/selftests/cpu-hotplug/on-off-test.sh</div><div class='del'>- * tools/testing/selftests/memory-hotplug/on-off-test.sh</div><div class='add'>+ * tools/testing/selftests/cpu-hotplug/cpu-on-off-test.sh</div><div class='add'>+ * tools/testing/selftests/memory-hotplug/mem-on-off-test.sh</div><div class='ctx'> </div><div class='ctx'> These scripts first do simple online and offline tests and then do fault</div><div class='ctx'> injection tests if notifier error injection module is available.</div><div class='head'>diff --git a/Documentation/fb/modedb.rst b/Documentation/fb/modedb.rst<br/>index 4d2411e32ebb..bb2889c6ea27 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/fb/modedb.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/fb/modedb.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/fb/modedb.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/fb/modedb.rst</a></div><div class='hunk'>@@ -26,6 +26,14 @@ Valid mode specifiers (mode_option argument)::</div><div class='ctx'> with &lt;xres&gt;, &lt;yres&gt;, &lt;bpp&gt; and &lt;refresh&gt; decimal numbers and &lt;name&gt; a string.</div><div class='ctx'> Things between square brackets are optional.</div><div class='ctx'> </div><div class='add'>+Valid names are::</div><div class='add'>+</div><div class='add'>+  - NSTC: 480i output, with the CCIR System-M TV mode and NTSC color encoding</div><div class='add'>+  - NTSC-J: 480i output, with the CCIR System-M TV mode, the NTSC color</div><div class='add'>+    encoding, and a black level equal to the blanking level.</div><div class='add'>+  - PAL: 576i output, with the CCIR System-B TV mode and PAL color encoding</div><div class='add'>+  - PAL-M: 480i output, with the CCIR System-M TV mode and PAL color encoding</div><div class='add'>+</div><div class='ctx'> If 'M' is specified in the mode_option argument (after &lt;yres&gt; and before</div><div class='ctx'> &lt;bpp&gt; and &lt;refresh&gt;, if specified) the timings will be calculated using</div><div class='ctx'> VESA(TM) Coordinated Video Timings instead of looking up the mode from a table.</div><div class='hunk'>@@ -65,6 +73,8 @@ Valid options are::</div><div class='ctx'>   - reflect_y (boolean): Perform an axial symmetry on the Y axis</div><div class='ctx'>   - rotate (integer): Rotate the initial framebuffer by x</div><div class='ctx'>     degrees. Valid values are 0, 90, 180 and 270.</div><div class='add'>+  - tv_mode: Analog TV mode. One of "NTSC", "NTSC-443", "NTSC-J", "PAL",</div><div class='add'>+    "PAL-M", "PAL-N", or "SECAM".</div><div class='ctx'>   - panel_orientation, one of "normal", "upside_down", "left_side_up", or</div><div class='ctx'>     "right_side_up". For KMS drivers only, this sets the "panel orientation"</div><div class='ctx'>     property on the kms connector as hint for kms users.</div><div class='head'>diff --git a/Documentation/fb/udlfb.rst b/Documentation/fb/udlfb.rst<br/>index 732b37db3504..99cfbb7a1922 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/fb/udlfb.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/fb/udlfb.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/fb/udlfb.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/fb/udlfb.rst</a></div><div class='hunk'>@@ -86,17 +86,24 @@ Module Options</div><div class='ctx'> Special configuration for udlfb is usually unnecessary. There are a few</div><div class='ctx'> options, however.</div><div class='ctx'> </div><div class='del'>-From the command line, pass options to modprobe</div><div class='del'>-modprobe udlfb fb_defio=0 console=1 shadow=1</div><div class='add'>+From the command line, pass options to modprobe::</div><div class='ctx'> </div><div class='del'>-Or modify options on the fly at /sys/module/udlfb/parameters directory via</div><div class='del'>-sudo nano fb_defio</div><div class='del'>-change the parameter in place, and save the file.</div><div class='add'>+  modprobe udlfb fb_defio=0 console=1 shadow=1</div><div class='ctx'> </div><div class='del'>-Unplug/replug USB device to apply with new settings</div><div class='add'>+Or change options on the fly by editing</div><div class='add'>+/sys/module/udlfb/parameters/PARAMETER_NAME ::</div><div class='ctx'> </div><div class='del'>-Or for permanent option, create file like /etc/modprobe.d/udlfb.conf with text</div><div class='del'>-options udlfb fb_defio=0 console=1 shadow=1</div><div class='add'>+  cd /sys/module/udlfb/parameters</div><div class='add'>+  ls # to see a list of parameter names</div><div class='add'>+  sudo nano PARAMETER_NAME</div><div class='add'>+  # change the parameter in place, and save the file.</div><div class='add'>+</div><div class='add'>+Unplug/replug USB device to apply with new settings.</div><div class='add'>+</div><div class='add'>+Or to apply options permanently, create a modprobe configuration file</div><div class='add'>+like /etc/modprobe.d/udlfb.conf with text::</div><div class='add'>+</div><div class='add'>+  options udlfb fb_defio=0 console=1 shadow=1</div><div class='ctx'> </div><div class='ctx'> Accepted boolean options:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/features/core/cBPF-JIT/arch-support.txt b/Documentation/features/core/cBPF-JIT/arch-support.txt<br/>index 77bd6974dd6d..0a1f5bb7eeb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/cBPF-JIT/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/core/cBPF-JIT/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/cBPF-JIT/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/core/cBPF-JIT/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: | TODO |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/core/eBPF-JIT/arch-support.txt b/Documentation/features/core/eBPF-JIT/arch-support.txt<br/>index d5ab547b2be6..6c0f3d759e6a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/eBPF-JIT/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/core/eBPF-JIT/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/eBPF-JIT/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/core/eBPF-JIT/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/core/generic-idle-thread/arch-support.txt b/Documentation/features/core/generic-idle-thread/arch-support.txt<br/>index ddb3762ca7f5..0b94099cf6ac 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/generic-idle-thread/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/core/generic-idle-thread/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/generic-idle-thread/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/core/generic-idle-thread/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: |  ok  |</div><div class='ctx'>     |        ia64: |  ok  |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/core/jump-labels/arch-support.txt b/Documentation/features/core/jump-labels/arch-support.txt<br/>index d5380ef68713..2328eada3a49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/jump-labels/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/core/jump-labels/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/jump-labels/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/core/jump-labels/arch-support.txt</a></div><div class='hunk'>@@ -10,10 +10,10 @@</div><div class='ctx'>     |         arc: |  ok  |</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='del'>-    |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='add'>+    |        csky: |  ok  |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/core/thread-info-in-task/arch-support.txt b/Documentation/features/core/thread-info-in-task/arch-support.txt<br/>index 0654ba3a42ff..9c5d39eebef2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/thread-info-in-task/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/core/thread-info-in-task/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/thread-info-in-task/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/core/thread-info-in-task/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/core/tracehook/arch-support.txt b/Documentation/features/core/tracehook/arch-support.txt<br/>index 8e95dc0c7b90..aed5679da651 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/tracehook/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/core/tracehook/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/core/tracehook/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/core/tracehook/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: |  ok  |</div><div class='ctx'>     |        ia64: |  ok  |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/debug/KASAN/arch-support.txt b/Documentation/features/debug/KASAN/arch-support.txt<br/>index 407ca1d91242..bf0124fae643 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/KASAN/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/KASAN/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/KASAN/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/KASAN/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'>     |        s390: |  ok  |</div><div class='ctx'>     |          sh: | TODO |</div><div class='ctx'>     |       sparc: | TODO |</div><div class='del'>-    |          um: | TODO |</div><div class='add'>+    |          um: |  ok  |</div><div class='ctx'>     |         x86: |  ok  |</div><div class='ctx'>     |      xtensa: |  ok  |</div><div class='ctx'>     -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/debug-vm-pgtable/arch-support.txt b/Documentation/features/debug/debug-vm-pgtable/arch-support.txt<br/>index 83eafe1a7f68..9ec5d13f4939 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/debug-vm-pgtable/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/debug-vm-pgtable/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/debug-vm-pgtable/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/debug-vm-pgtable/arch-support.txt</a></div><div class='hunk'>@@ -11,15 +11,15 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='ctx'>     |       nios2: | TODO |</div><div class='ctx'>     |    openrisc: | TODO |</div><div class='del'>-    |      parisc: | TODO |</div><div class='add'>+    |      parisc: |  ok  |</div><div class='ctx'>     |     powerpc: |  ok  |</div><div class='ctx'>     |       riscv: |  ok  |</div><div class='ctx'>     |        s390: |  ok  |</div><div class='hunk'>@@ -27,5 +27,5 @@</div><div class='ctx'>     |       sparc: | TODO |</div><div class='ctx'>     |          um: | TODO |</div><div class='ctx'>     |         x86: |  ok  |</div><div class='del'>-    |      xtensa: | TODO |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='ctx'>     -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/gcov-profile-all/arch-support.txt b/Documentation/features/debug/gcov-profile-all/arch-support.txt<br/>index 49e0dda11227..dc4014f7e1f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/gcov-profile-all/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/gcov-profile-all/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/gcov-profile-all/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/gcov-profile-all/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: |  ok  |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='hunk'>@@ -25,7 +25,7 @@</div><div class='ctx'>     |        s390: |  ok  |</div><div class='ctx'>     |          sh: |  ok  |</div><div class='ctx'>     |       sparc: | TODO |</div><div class='del'>-    |          um: | TODO |</div><div class='add'>+    |          um: |  ok  |</div><div class='ctx'>     |         x86: |  ok  |</div><div class='del'>-    |      xtensa: | TODO |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='ctx'>     -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/kcov/arch-support.txt b/Documentation/features/debug/kcov/arch-support.txt<br/>index 3d34b724ddae..ffcc9f2b1d74 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kcov/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/kcov/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kcov/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/kcov/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='hunk'>@@ -27,5 +27,5 @@</div><div class='ctx'>     |       sparc: | TODO |</div><div class='ctx'>     |          um: |  ok  |</div><div class='ctx'>     |         x86: |  ok  |</div><div class='del'>-    |      xtensa: | TODO |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='ctx'>     -----------------------</div><div class='head'>diff --git a/Documentation/features/debug/kgdb/arch-support.txt b/Documentation/features/debug/kgdb/arch-support.txt<br/>index 7aa073d908c5..958498f9f2a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kgdb/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/kgdb/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kgdb/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/kgdb/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: |  ok  |</div><div class='ctx'>     |     hexagon: |  ok  |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: |  ok  |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/debug/kmemleak/arch-support.txt b/Documentation/features/debug/kmemleak/arch-support.txt<br/>index 5c784ff9768a..0cfa5f0e4db1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kmemleak/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/kmemleak/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kmemleak/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/kmemleak/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: |  ok  |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt b/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt<br/>index a1f6e98c6b1f..bcc29d3aba9a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/kprobes-on-ftrace/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kprobes-on-ftrace/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/kprobes-on-ftrace/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: | TODO |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/debug/kprobes/arch-support.txt b/Documentation/features/debug/kprobes/arch-support.txt<br/>index e7e7015175e7..8a77d62a42c5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kprobes/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/kprobes/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kprobes/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/kprobes/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: |  ok  |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/debug/kretprobes/arch-support.txt b/Documentation/features/debug/kretprobes/arch-support.txt<br/>index 838eb53a6fa5..cf4723c5ac55 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kretprobes/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/kretprobes/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/kretprobes/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/kretprobes/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: |  ok  |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/debug/optprobes/arch-support.txt b/Documentation/features/debug/optprobes/arch-support.txt<br/>index 6358b00b1723..83a4639a5c0a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/optprobes/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/optprobes/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/optprobes/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/optprobes/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: | TODO |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/debug/stackprotector/arch-support.txt b/Documentation/features/debug/stackprotector/arch-support.txt<br/>index f6cdf781305f..71cd4ba18f7d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/stackprotector/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/stackprotector/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/stackprotector/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/stackprotector/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/debug/uprobes/arch-support.txt b/Documentation/features/debug/uprobes/arch-support.txt<br/>index 0b871e797d24..d53f2f94fbda 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/uprobes/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/uprobes/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/uprobes/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/uprobes/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/debug/user-ret-profiler/arch-support.txt b/Documentation/features/debug/user-ret-profiler/arch-support.txt<br/>index a2feda7adff1..059110a5fa6e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/user-ret-profiler/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/debug/user-ret-profiler/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/debug/user-ret-profiler/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/debug/user-ret-profiler/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: | TODO |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/io/dma-contiguous/arch-support.txt b/Documentation/features/io/dma-contiguous/arch-support.txt<br/>index 9b407f26d45e..bfe0921a3853 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/io/dma-contiguous/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/io/dma-contiguous/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/io/dma-contiguous/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/io/dma-contiguous/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: |  ok  |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/locking/cmpxchg-local/arch-support.txt b/Documentation/features/locking/cmpxchg-local/arch-support.txt<br/>index 090520b0e02d..68329e96dffa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/cmpxchg-local/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/locking/cmpxchg-local/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/cmpxchg-local/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/locking/cmpxchg-local/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/locking/lockdep/arch-support.txt b/Documentation/features/locking/lockdep/arch-support.txt<br/>index 6d840b103537..ddb945278589 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/lockdep/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/locking/lockdep/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/lockdep/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/locking/lockdep/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: |  ok  |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: |  ok  |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/locking/queued-rwlocks/arch-support.txt b/Documentation/features/locking/queued-rwlocks/arch-support.txt<br/>index de586be05d64..5deb845477e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/queued-rwlocks/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/locking/queued-rwlocks/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/queued-rwlocks/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/locking/queued-rwlocks/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'>     |    openrisc: |  ok  |</div><div class='ctx'>     |      parisc: | TODO |</div><div class='ctx'>     |     powerpc: |  ok  |</div><div class='del'>-    |       riscv: | TODO |</div><div class='add'>+    |       riscv: |  ok  |</div><div class='ctx'>     |        s390: | TODO |</div><div class='ctx'>     |          sh: | TODO |</div><div class='ctx'>     |       sparc: |  ok  |</div><div class='head'>diff --git a/Documentation/features/locking/queued-spinlocks/arch-support.txt b/Documentation/features/locking/queued-spinlocks/arch-support.txt<br/>index 29d0c8b7b1c5..2d3961bfef5d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/queued-spinlocks/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/locking/queued-spinlocks/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/locking/queued-spinlocks/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/locking/queued-spinlocks/arch-support.txt</a></div><div class='hunk'>@@ -10,10 +10,10 @@</div><div class='ctx'>     |         arc: | TODO |</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='del'>-    |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='add'>+    |        csky: |  ok  |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/perf/kprobes-event/arch-support.txt b/Documentation/features/perf/kprobes-event/arch-support.txt<br/>index 881a8a50e41e..641a7d2ff2a3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/perf/kprobes-event/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/perf/kprobes-event/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/perf/kprobes-event/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/perf/kprobes-event/arch-support.txt</a></div><div class='hunk'>@@ -7,13 +7,13 @@</div><div class='ctx'>     |         arch |status|</div><div class='ctx'>     -----------------------</div><div class='ctx'>     |       alpha: | TODO |</div><div class='del'>-    |         arc: | TODO |</div><div class='add'>+    |         arc: |  ok  |</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: |  ok  |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/perf/perf-regs/arch-support.txt b/Documentation/features/perf/perf-regs/arch-support.txt<br/>index 7639a796a8e1..33866eb242c1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/perf/perf-regs/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/perf/perf-regs/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/perf/perf-regs/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/perf/perf-regs/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/perf/perf-stackdump/arch-support.txt b/Documentation/features/perf/perf-stackdump/arch-support.txt<br/>index df1a4c679a45..c8e4c7c65012 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/perf/perf-stackdump/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/perf/perf-stackdump/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/perf/perf-stackdump/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/perf/perf-stackdump/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/sched/membarrier-sync-core/arch-support.txt b/Documentation/features/sched/membarrier-sync-core/arch-support.txt<br/>index 51b7afc937f1..23260ca44946 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/sched/membarrier-sync-core/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/sched/membarrier-sync-core/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/sched/membarrier-sync-core/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/sched/membarrier-sync-core/arch-support.txt</a></div><div class='hunk'>@@ -5,7 +5,7 @@</div><div class='ctx'> #</div><div class='ctx'> # Architecture requirements</div><div class='ctx'> #</div><div class='del'>-# * arm/arm64/powerpc</div><div class='add'>+# * arm/arm64/powerpc/s390</div><div class='ctx'> #</div><div class='ctx'> # Rely on implicit context synchronization as a result of exception return</div><div class='ctx'> # when returning from IPI handler, and when returning to user-space.</div><div class='hunk'>@@ -34,9 +34,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='hunk'>@@ -45,7 +45,7 @@</div><div class='ctx'>     |      parisc: | TODO |</div><div class='ctx'>     |     powerpc: |  ok  |</div><div class='ctx'>     |       riscv: | TODO |</div><div class='del'>-    |        s390: | TODO |</div><div class='add'>+    |        s390: |  ok  |</div><div class='ctx'>     |          sh: | TODO |</div><div class='ctx'>     |       sparc: | TODO |</div><div class='ctx'>     |          um: | TODO |</div><div class='head'>diff --git a/Documentation/features/sched/numa-balancing/arch-support.txt b/Documentation/features/sched/numa-balancing/arch-support.txt<br/>index d0e308135434..532cc67cdf92 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/sched/numa-balancing/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/sched/numa-balancing/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/sched/numa-balancing/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/sched/numa-balancing/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ..  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ..  |</div><div class='del'>-    |       h8300: |  ..  |</div><div class='ctx'>     |     hexagon: |  ..  |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: |  ..  |</div><div class='ctx'>     |  microblaze: |  ..  |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/scripts/features-refresh.sh b/Documentation/features/scripts/features-refresh.sh<br/>index 9e72d38a0720..c2288124e94a 100755<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/scripts/features-refresh.sh?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/scripts/features-refresh.sh</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/scripts/features-refresh.sh?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/scripts/features-refresh.sh</a></div><div class='hunk'>@@ -60,7 +60,7 @@ for F_FILE in Documentation/features/*/*/arch-support.txt; do</div><div class='ctx'> 	echo "    |         arch |status|" &gt;&gt; $T_FILE</div><div class='ctx'> 	echo "    -----------------------" &gt;&gt; $T_FILE</div><div class='ctx'> 	for ARCH_DIR in arch/*/; do</div><div class='del'>-		ARCH=$(echo $ARCH_DIR | sed -e 's/arch//g' | sed -e 's/\///g')</div><div class='add'>+		ARCH=$(echo $ARCH_DIR | sed -e 's/^arch//g' | sed -e 's/\///g')</div><div class='ctx'> 		K_FILES=$(find $ARCH_DIR -name "Kconfig*")</div><div class='ctx'> 		K_GREP=$(grep "$K" $K_FILES)</div><div class='ctx'> 		#</div><div class='head'>diff --git a/Documentation/features/seccomp/seccomp-filter/arch-support.txt b/Documentation/features/seccomp/seccomp-filter/arch-support.txt<br/>index 05613c5ff560..3a7237b989cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/seccomp/seccomp-filter/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/seccomp/seccomp-filter/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/seccomp/seccomp-filter/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/seccomp/seccomp-filter/arch-support.txt</a></div><div class='hunk'>@@ -11,10 +11,10 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='del'>-    |        m68k: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='add'>+    |        m68k: |  ok  |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='ctx'>     |       nios2: | TODO |</div><div class='head'>diff --git a/Documentation/features/time/arch-tick-broadcast/arch-support.txt b/Documentation/features/time/arch-tick-broadcast/arch-support.txt<br/>index b4c96ebab7e3..9bffac80019e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/arch-tick-broadcast/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/time/arch-tick-broadcast/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/arch-tick-broadcast/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/time/arch-tick-broadcast/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/time/clockevents/arch-support.txt b/Documentation/features/time/clockevents/arch-support.txt<br/>index 3f6976052e2a..625160048f68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/clockevents/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/time/clockevents/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/clockevents/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/time/clockevents/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: |  ok  |</div><div class='ctx'>     |     hexagon: |  ok  |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: |  ok  |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/time/context-tracking/arch-support.txt b/Documentation/features/time/context-tracking/arch-support.txt<br/>index bb1c1801553e..72bc5bad0348 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/context-tracking/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/time/context-tracking/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/context-tracking/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/time/context-tracking/arch-support.txt</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> #</div><div class='del'>-# Feature name:          context-tracking</div><div class='del'>-#         Kconfig:       HAVE_CONTEXT_TRACKING</div><div class='del'>-#         description:   arch supports context tracking for NO_HZ_FULL</div><div class='add'>+# Feature name:          user-context-tracking</div><div class='add'>+#         Kconfig:       HAVE_CONTEXT_TRACKING_USER</div><div class='add'>+#         description:   arch supports user context tracking for NO_HZ_FULL</div><div class='ctx'> #</div><div class='ctx'>     -----------------------</div><div class='ctx'>     |         arch |status|</div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='hunk'>@@ -27,5 +27,5 @@</div><div class='ctx'>     |       sparc: |  ok  |</div><div class='ctx'>     |          um: | TODO |</div><div class='ctx'>     |         x86: |  ok  |</div><div class='del'>-    |      xtensa: | TODO |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='ctx'>     -----------------------</div><div class='head'>diff --git a/Documentation/features/time/irq-time-acct/arch-support.txt b/Documentation/features/time/irq-time-acct/arch-support.txt<br/>index 3cea25b80c8c..ceb036610d09 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/irq-time-acct/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/time/irq-time-acct/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/irq-time-acct/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/time/irq-time-acct/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: |  ..  |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/time/virt-cpuacct/arch-support.txt b/Documentation/features/time/virt-cpuacct/arch-support.txt<br/>index 5163a60a1c1e..c063dffd5261 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/virt-cpuacct/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/time/virt-cpuacct/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/time/virt-cpuacct/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/time/virt-cpuacct/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ok  |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: |  ok  |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='hunk'>@@ -27,5 +27,5 @@</div><div class='ctx'>     |       sparc: |  ok  |</div><div class='ctx'>     |          um: | TODO |</div><div class='ctx'>     |         x86: |  ok  |</div><div class='del'>-    |      xtensa: | TODO |</div><div class='add'>+    |      xtensa: |  ok  |</div><div class='ctx'>     -----------------------</div><div class='head'>diff --git a/Documentation/features/vm/ELF-ASLR/arch-support.txt b/Documentation/features/vm/ELF-ASLR/arch-support.txt<br/>index 73ec761f1e27..15164f36f224 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/ELF-ASLR/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/vm/ELF-ASLR/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/ELF-ASLR/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/vm/ELF-ASLR/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/vm/PG_uncached/arch-support.txt b/Documentation/features/vm/PG_uncached/arch-support.txt<br/>index 9066a90b38d9..5acd64b97dba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/PG_uncached/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/vm/PG_uncached/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/PG_uncached/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/vm/PG_uncached/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: | TODO |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: |  ok  |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/vm/THP/arch-support.txt b/Documentation/features/vm/THP/arch-support.txt<br/>index f717ab792e5a..9dd7d75d0465 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/THP/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/vm/THP/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/THP/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/vm/THP/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: |  ..  |</div><div class='del'>-    |       h8300: |  ..  |</div><div class='ctx'>     |     hexagon: |  ..  |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: |  ..  |</div><div class='ctx'>     |  microblaze: |  ..  |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/vm/TLB/arch-support.txt b/Documentation/features/vm/TLB/arch-support.txt<br/>index 6fa76a37f299..7f049c251a79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/TLB/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/vm/TLB/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/TLB/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/vm/TLB/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: | N/A  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: |  ..  |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: |  ..  |</div><div class='ctx'>     |  microblaze: |  ..  |</div><div class='ctx'>     |        mips: | TODO |</div><div class='head'>diff --git a/Documentation/features/vm/huge-vmap/arch-support.txt b/Documentation/features/vm/huge-vmap/arch-support.txt<br/>index 6e1792ee37fe..34647d9bdca4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/huge-vmap/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/vm/huge-vmap/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/huge-vmap/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/vm/huge-vmap/arch-support.txt</a></div><div class='hunk'>@@ -11,9 +11,9 @@</div><div class='ctx'>     |         arm: | TODO |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: | TODO |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: | TODO |</div><div class='hunk'>@@ -21,7 +21,7 @@</div><div class='ctx'>     |    openrisc: | TODO |</div><div class='ctx'>     |      parisc: | TODO |</div><div class='ctx'>     |     powerpc: |  ok  |</div><div class='del'>-    |       riscv: | TODO |</div><div class='add'>+    |       riscv: |  ok  |</div><div class='ctx'>     |        s390: | TODO |</div><div class='ctx'>     |          sh: | TODO |</div><div class='ctx'>     |       sparc: | TODO |</div><div class='head'>diff --git a/Documentation/features/vm/ioremap_prot/arch-support.txt b/Documentation/features/vm/ioremap_prot/arch-support.txt<br/>index a6dcbe5f47b6..a24149e59d73 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/ioremap_prot/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/vm/ioremap_prot/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/ioremap_prot/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/vm/ioremap_prot/arch-support.txt</a></div><div class='hunk'>@@ -9,11 +9,11 @@</div><div class='ctx'>     |       alpha: | TODO |</div><div class='ctx'>     |         arc: |  ok  |</div><div class='ctx'>     |         arm: | TODO |</div><div class='del'>-    |       arm64: | TODO |</div><div class='add'>+    |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='head'>diff --git a/Documentation/features/vm/pte_special/arch-support.txt b/Documentation/features/vm/pte_special/arch-support.txt<br/>index 376477749c42..d2b22a06945e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/pte_special/arch-support.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/features/vm/pte_special/arch-support.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/features/vm/pte_special/arch-support.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/features/vm/pte_special/arch-support.txt</a></div><div class='hunk'>@@ -11,15 +11,15 @@</div><div class='ctx'>     |         arm: |  ok  |</div><div class='ctx'>     |       arm64: |  ok  |</div><div class='ctx'>     |        csky: | TODO |</div><div class='del'>-    |       h8300: | TODO |</div><div class='ctx'>     |     hexagon: | TODO |</div><div class='ctx'>     |        ia64: | TODO |</div><div class='add'>+    |   loongarch: |  ok  |</div><div class='ctx'>     |        m68k: | TODO |</div><div class='ctx'>     |  microblaze: | TODO |</div><div class='ctx'>     |        mips: |  ok  |</div><div class='ctx'>     |       nios2: | TODO |</div><div class='ctx'>     |    openrisc: | TODO |</div><div class='del'>-    |      parisc: | TODO |</div><div class='add'>+    |      parisc: |  ok  |</div><div class='ctx'>     |     powerpc: |  ok  |</div><div class='ctx'>     |       riscv: |  ok  |</div><div class='ctx'>     |        s390: |  ok  |</div><div class='head'>diff --git a/Documentation/filesystems/9p.rst b/Documentation/filesystems/9p.rst<br/>index 7b5964bc8865..1b5f0cc3e4ca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/9p.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/9p.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/9p.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/9p.rst</a></div><div class='hunk'>@@ -78,19 +78,39 @@ Options</div><div class='ctx'>   		offering several exported file systems.</div><div class='ctx'> </div><div class='ctx'>   cache=mode	specifies a caching policy.  By default, no caches are used.</div><div class='del'>-</div><div class='del'>-                        none</div><div class='del'>-				default no cache policy, metadata and data</div><div class='del'>-                                alike are synchronous.</div><div class='del'>-			loose</div><div class='del'>-				no attempts are made at consistency,</div><div class='del'>-                                intended for exclusive, read-only mounts</div><div class='del'>-                        fscache</div><div class='del'>-				use FS-Cache for a persistent, read-only</div><div class='del'>-				cache backend.</div><div class='del'>-                        mmap</div><div class='del'>-				minimal cache that is only used for read-write</div><div class='del'>-                                mmap.  Northing else is cached, like cache=none</div><div class='add'>+		The mode can be specified as a bitmask or by using one of the</div><div class='add'>+		prexisting common 'shortcuts'.</div><div class='add'>+		The bitmask is described below: (unspecified bits are reserved)</div><div class='add'>+</div><div class='add'>+			==========  ====================================================</div><div class='add'>+			0b00000000  all caches disabled, mmap disabled</div><div class='add'>+			0b00000001  file caches enabled</div><div class='add'>+			0b00000010  meta-data caches enabled</div><div class='add'>+			0b00000100  writeback behavior (as opposed to writethrough)</div><div class='add'>+			0b00001000  loose caches (no explicit consistency with server)</div><div class='add'>+			0b10000000  fscache enabled for persistent caching</div><div class='add'>+			==========  ====================================================</div><div class='add'>+</div><div class='add'>+		The current shortcuts and their associated bitmask are:</div><div class='add'>+</div><div class='add'>+			=========   ====================================================</div><div class='add'>+			none        0b00000000 (no caching)</div><div class='add'>+			readahead   0b00000001 (only read-ahead file caching)</div><div class='add'>+			mmap        0b00000101 (read-ahead + writeback file cache)</div><div class='add'>+			loose       0b00001111 (non-coherent file and meta-data caches)</div><div class='add'>+			fscache     0b10001111 (persistent loose cache)</div><div class='add'>+			=========   ====================================================</div><div class='add'>+</div><div class='add'>+		NOTE: only these shortcuts are tested modes of operation at the</div><div class='add'>+		moment, so using other combinations of bit-patterns is not</div><div class='add'>+		known to work.  Work on better cache support is in progress.</div><div class='add'>+</div><div class='add'>+		IMPORTANT: loose caches (and by extension at the moment fscache)</div><div class='add'>+		do not necessarily validate cached values on the server.  In other</div><div class='add'>+		words changes on the server are not guaranteed to be reflected</div><div class='add'>+		on the client system.  Only use this mode of operation if you</div><div class='add'>+		have an exclusive mount and the server will modify the filesystem</div><div class='add'>+		underneath you.</div><div class='ctx'> </div><div class='ctx'>   debug=n	specifies debug level.  The debug level is a bitmask.</div><div class='ctx'> </div><div class='hunk'>@@ -137,6 +157,12 @@ Options</div><div class='ctx'>   		This can be used to share devices/named pipes/sockets between</div><div class='ctx'> 		hosts.  This functionality will be expanded in later versions.</div><div class='ctx'> </div><div class='add'>+  directio	bypass page cache on all read/write operations</div><div class='add'>+</div><div class='add'>+  ignoreqv	ignore qid.version==0 as a marker to ignore cache</div><div class='add'>+</div><div class='add'>+  noxattr	do not offer xattr functions on this mount.</div><div class='add'>+</div><div class='ctx'>   access	there are four access modes.</div><div class='ctx'> 			user</div><div class='ctx'> 				if a user tries to access a file on v9fs</div><div class='head'>diff --git a/Documentation/filesystems/btrfs.rst b/Documentation/filesystems/btrfs.rst<br/>index d0904f602819..992eddb0e11b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/btrfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/btrfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/btrfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/btrfs.rst</a></div><div class='hunk'>@@ -19,13 +19,23 @@ The main Btrfs features include:</div><div class='ctx'>     * Subvolumes (separate internal filesystem roots)</div><div class='ctx'>     * Object level mirroring and striping</div><div class='ctx'>     * Checksums on data and metadata (multiple algorithms available)</div><div class='del'>-    * Compression</div><div class='add'>+    * Compression (multiple algorithms available)</div><div class='add'>+    * Reflink, deduplication</div><div class='add'>+    * Scrub (on-line checksum verification)</div><div class='add'>+    * Hierarchical quota groups (subvolume and snapshot support)</div><div class='ctx'>     * Integrated multiple device support, with several raid algorithms</div><div class='ctx'>     * Offline filesystem check</div><div class='del'>-    * Efficient incremental backup and FS mirroring</div><div class='add'>+    * Efficient incremental backup and FS mirroring (send/receive)</div><div class='add'>+    * Trim/discard</div><div class='ctx'>     * Online filesystem defragmentation</div><div class='add'>+    * Swapfile support</div><div class='add'>+    * Zoned mode</div><div class='add'>+    * Read/write metadata verification</div><div class='add'>+    * Online resize (shrink, grow)</div><div class='ctx'> </div><div class='del'>-For more information please refer to the wiki</div><div class='add'>+For more information please refer to the documentation site or wiki</div><div class='add'>+</div><div class='add'>+  https://btrfs.readthedocs.io</div><div class='ctx'> </div><div class='ctx'>   https://btrfs.wiki.kernel.org</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/caching/backend-api.rst b/Documentation/filesystems/caching/backend-api.rst<br/>index be793c49a772..3a199fc50828 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/caching/backend-api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/caching/backend-api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/caching/backend-api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/caching/backend-api.rst</a></div><div class='hunk'>@@ -73,7 +73,7 @@ busy.</div><div class='ctx'> If successful, the cache backend can then start setting up the cache.  In the</div><div class='ctx'> event that the initialisation fails, the cache backend should call::</div><div class='ctx'> </div><div class='del'>-	void fscache_relinquish_cookie(struct fscache_cache *cache);</div><div class='add'>+	void fscache_relinquish_cache(struct fscache_cache *cache);</div><div class='ctx'> </div><div class='ctx'> to reset and discard the cookie.</div><div class='ctx'> </div><div class='hunk'>@@ -110,9 +110,9 @@ to withdraw them, calling::</div><div class='ctx'> </div><div class='ctx'> on the cookie that each object belongs to.  This schedules the specified cookie</div><div class='ctx'> for withdrawal.  This gets offloaded to a workqueue.  The cache backend can</div><div class='del'>-test for completion by calling::</div><div class='add'>+wait for completion by calling::</div><div class='ctx'> </div><div class='del'>-	bool fscache_are_objects_withdrawn(struct fscache_cookie *cache);</div><div class='add'>+	void fscache_wait_for_objects(struct fscache_cache *cache);</div><div class='ctx'> </div><div class='ctx'> Once all the cookies are withdrawn, a cache backend can withdraw all the</div><div class='ctx'> volumes, calling::</div><div class='hunk'>@@ -122,10 +122,10 @@ volumes, calling::</div><div class='ctx'> to tell fscache that a volume has been withdrawn.  This waits for all</div><div class='ctx'> outstanding accesses on the volume to complete before returning.</div><div class='ctx'> </div><div class='del'>-When the the cache is completely withdrawn, fscache should be notified by</div><div class='add'>+When the cache is completely withdrawn, fscache should be notified by</div><div class='ctx'> calling::</div><div class='ctx'> </div><div class='del'>-	void fscache_cache_relinquish(struct fscache_cache *cache);</div><div class='add'>+	void fscache_relinquish_cache(struct fscache_cache *cache);</div><div class='ctx'> </div><div class='ctx'> to clear fields in the cookie and discard the caller's ref on it.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/caching/cachefiles.rst b/Documentation/filesystems/caching/cachefiles.rst<br/>index 8bf396b76359..fc7abf712315 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/caching/cachefiles.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/caching/cachefiles.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/caching/cachefiles.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/caching/cachefiles.rst</a></div><div class='hunk'>@@ -28,6 +28,7 @@ Cache on Already Mounted Filesystem</div><div class='ctx'> </div><div class='ctx'>  (*) Debugging.</div><div class='ctx'> </div><div class='add'>+ (*) On-demand Read.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Overview</div><div class='hunk'>@@ -482,3 +483,180 @@ the control file.  For example::</div><div class='ctx'> 	echo $((1|4|8)) &gt;/sys/module/cachefiles/parameters/debug</div><div class='ctx'> </div><div class='ctx'> will turn on all function entry debugging.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+On-demand Read</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+When working in its original mode, CacheFiles serves as a local cache for a</div><div class='add'>+remote networking fs - while in on-demand read mode, CacheFiles can boost the</div><div class='add'>+scenario where on-demand read semantics are needed, e.g. container image</div><div class='add'>+distribution.</div><div class='add'>+</div><div class='add'>+The essential difference between these two modes is seen when a cache miss</div><div class='add'>+occurs: In the original mode, the netfs will fetch the data from the remote</div><div class='add'>+server and then write it to the cache file; in on-demand read mode, fetching</div><div class='add'>+the data and writing it into the cache is delegated to a user daemon.</div><div class='add'>+</div><div class='add'>+``CONFIG_CACHEFILES_ONDEMAND`` should be enabled to support on-demand read mode.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Protocol Communication</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+The on-demand read mode uses a simple protocol for communication between kernel</div><div class='add'>+and user daemon. The protocol can be modeled as::</div><div class='add'>+</div><div class='add'>+	kernel --[request]--&gt; user daemon --[reply]--&gt; kernel</div><div class='add'>+</div><div class='add'>+CacheFiles will send requests to the user daemon when needed.  The user daemon</div><div class='add'>+should poll the devnode ('/dev/cachefiles') to check if there's a pending</div><div class='add'>+request to be processed.  A POLLIN event will be returned when there's a pending</div><div class='add'>+request.</div><div class='add'>+</div><div class='add'>+The user daemon then reads the devnode to fetch a request to process.  It should</div><div class='add'>+be noted that each read only gets one request. When it has finished processing</div><div class='add'>+the request, the user daemon should write the reply to the devnode.</div><div class='add'>+</div><div class='add'>+Each request starts with a message header of the form::</div><div class='add'>+</div><div class='add'>+	struct cachefiles_msg {</div><div class='add'>+		__u32 msg_id;</div><div class='add'>+		__u32 opcode;</div><div class='add'>+		__u32 len;</div><div class='add'>+		__u32 object_id;</div><div class='add'>+		__u8  data[];</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+where:</div><div class='add'>+</div><div class='add'>+	* ``msg_id`` is a unique ID identifying this request among all pending</div><div class='add'>+	  requests.</div><div class='add'>+</div><div class='add'>+	* ``opcode`` indicates the type of this request.</div><div class='add'>+</div><div class='add'>+	* ``object_id`` is a unique ID identifying the cache file operated on.</div><div class='add'>+</div><div class='add'>+	* ``data`` indicates the payload of this request.</div><div class='add'>+</div><div class='add'>+	* ``len`` indicates the whole length of this request, including the</div><div class='add'>+	  header and following type-specific payload.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Turning on On-demand Mode</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+An optional parameter becomes available to the "bind" command::</div><div class='add'>+</div><div class='add'>+	bind [ondemand]</div><div class='add'>+</div><div class='add'>+When the "bind" command is given no argument, it defaults to the original mode.</div><div class='add'>+When it is given the "ondemand" argument, i.e. "bind ondemand", on-demand read</div><div class='add'>+mode will be enabled.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The OPEN Request</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+When the netfs opens a cache file for the first time, a request with the</div><div class='add'>+CACHEFILES_OP_OPEN opcode, a.k.a an OPEN request will be sent to the user</div><div class='add'>+daemon.  The payload format is of the form::</div><div class='add'>+</div><div class='add'>+	struct cachefiles_open {</div><div class='add'>+		__u32 volume_key_size;</div><div class='add'>+		__u32 cookie_key_size;</div><div class='add'>+		__u32 fd;</div><div class='add'>+		__u32 flags;</div><div class='add'>+		__u8  data[];</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+where:</div><div class='add'>+</div><div class='add'>+	* ``data`` contains the volume_key followed directly by the cookie_key.</div><div class='add'>+	  The volume key is a NUL-terminated string; the cookie key is binary</div><div class='add'>+	  data.</div><div class='add'>+</div><div class='add'>+	* ``volume_key_size`` indicates the size of the volume key in bytes.</div><div class='add'>+</div><div class='add'>+	* ``cookie_key_size`` indicates the size of the cookie key in bytes.</div><div class='add'>+</div><div class='add'>+	* ``fd`` indicates an anonymous fd referring to the cache file, through</div><div class='add'>+	  which the user daemon can perform write/llseek file operations on the</div><div class='add'>+	  cache file.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The user daemon can use the given (volume_key, cookie_key) pair to distinguish</div><div class='add'>+the requested cache file.  With the given anonymous fd, the user daemon can</div><div class='add'>+fetch the data and write it to the cache file in the background, even when</div><div class='add'>+kernel has not triggered a cache miss yet.</div><div class='add'>+</div><div class='add'>+Be noted that each cache file has a unique object_id, while it may have multiple</div><div class='add'>+anonymous fds.  The user daemon may duplicate anonymous fds from the initial</div><div class='add'>+anonymous fd indicated by the @fd field through dup().  Thus each object_id can</div><div class='add'>+be mapped to multiple anonymous fds, while the usr daemon itself needs to</div><div class='add'>+maintain the mapping.</div><div class='add'>+</div><div class='add'>+When implementing a user daemon, please be careful of RLIMIT_NOFILE,</div><div class='add'>+``/proc/sys/fs/nr_open`` and ``/proc/sys/fs/file-max``.  Typically these needn't</div><div class='add'>+be huge since they're related to the number of open device blobs rather than</div><div class='add'>+open files of each individual filesystem.</div><div class='add'>+</div><div class='add'>+The user daemon should reply the OPEN request by issuing a "copen" (complete</div><div class='add'>+open) command on the devnode::</div><div class='add'>+</div><div class='add'>+	copen &lt;msg_id&gt;,&lt;cache_size&gt;</div><div class='add'>+</div><div class='add'>+where:</div><div class='add'>+</div><div class='add'>+	* ``msg_id`` must match the msg_id field of the OPEN request.</div><div class='add'>+</div><div class='add'>+	* When &gt;= 0, ``cache_size`` indicates the size of the cache file;</div><div class='add'>+	  when &lt; 0, ``cache_size`` indicates any error code encountered by the</div><div class='add'>+	  user daemon.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The CLOSE Request</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+When a cookie withdrawn, a CLOSE request (opcode CACHEFILES_OP_CLOSE) will be</div><div class='add'>+sent to the user daemon.  This tells the user daemon to close all anonymous fds</div><div class='add'>+associated with the given object_id.  The CLOSE request has no extra payload,</div><div class='add'>+and shouldn't be replied.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The READ Request</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+When a cache miss is encountered in on-demand read mode, CacheFiles will send a</div><div class='add'>+READ request (opcode CACHEFILES_OP_READ) to the user daemon. This tells the user</div><div class='add'>+daemon to fetch the contents of the requested file range.  The payload is of the</div><div class='add'>+form::</div><div class='add'>+</div><div class='add'>+	struct cachefiles_read {</div><div class='add'>+		__u64 off;</div><div class='add'>+		__u64 len;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+where:</div><div class='add'>+</div><div class='add'>+	* ``off`` indicates the starting offset of the requested file range.</div><div class='add'>+</div><div class='add'>+	* ``len`` indicates the length of the requested file range.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+When it receives a READ request, the user daemon should fetch the requested data</div><div class='add'>+and write it to the cache file identified by object_id.</div><div class='add'>+</div><div class='add'>+When it has finished processing the READ request, the user daemon should reply</div><div class='add'>+by using the CACHEFILES_IOC_READ_COMPLETE ioctl on one of the anonymous fds</div><div class='add'>+associated with the object_id given in the READ request.  The ioctl is of the</div><div class='add'>+form::</div><div class='add'>+</div><div class='add'>+	ioctl(fd, CACHEFILES_IOC_READ_COMPLETE, msg_id);</div><div class='add'>+</div><div class='add'>+where:</div><div class='add'>+</div><div class='add'>+	* ``fd`` is one of the anonymous fds associated with the object_id</div><div class='add'>+	  given.</div><div class='add'>+</div><div class='add'>+	* ``msg_id`` must match the msg_id field of the READ request.</div><div class='head'>diff --git a/Documentation/filesystems/caching/netfs-api.rst b/Documentation/filesystems/caching/netfs-api.rst<br/>index 5066113acad5..1d18e9def183 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/caching/netfs-api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/caching/netfs-api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/caching/netfs-api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/caching/netfs-api.rst</a></div><div class='hunk'>@@ -404,22 +404,21 @@ schedule a write of that region::</div><div class='ctx'> And if an error occurs before that point is reached, the marks can be removed</div><div class='ctx'> by calling::</div><div class='ctx'> </div><div class='del'>-	void fscache_clear_page_bits(struct fscache_cookie *cookie,</div><div class='del'>-				     struct address_space *mapping,</div><div class='add'>+	void fscache_clear_page_bits(struct address_space *mapping,</div><div class='ctx'> 				     loff_t start, size_t len,</div><div class='ctx'> 				     bool caching)</div><div class='ctx'> </div><div class='del'>-In both of these functions, the cookie representing the cache object to be</div><div class='del'>-written to and a pointer to the mapping to which the source pages are attached</div><div class='del'>-are passed in; start and len indicate the size of the region that's going to be</div><div class='del'>-written (it doesn't have to align to page boundaries necessarily, but it does</div><div class='del'>-have to align to DIO boundaries on the backing filesystem).  The caching</div><div class='del'>-parameter indicates if caching should be skipped, and if false, the functions</div><div class='del'>-do nothing.</div><div class='add'>+In these functions, a pointer to the mapping to which the source pages are</div><div class='add'>+attached is passed in and start and len indicate the size of the region that's</div><div class='add'>+going to be written (it doesn't have to align to page boundaries necessarily,</div><div class='add'>+but it does have to align to DIO boundaries on the backing filesystem).  The</div><div class='add'>+caching parameter indicates if caching should be skipped, and if false, the</div><div class='add'>+functions do nothing.</div><div class='ctx'> </div><div class='del'>-The write function takes some additional parameters: i_size indicates the size</div><div class='del'>-of the netfs file and term_func indicates an optional completion function, to</div><div class='del'>-which term_func_priv will be passed, along with the error or amount written.</div><div class='add'>+The write function takes some additional parameters: the cookie representing</div><div class='add'>+the cache object to be written to, i_size indicates the size of the netfs file</div><div class='add'>+and term_func indicates an optional completion function, to which</div><div class='add'>+term_func_priv will be passed, along with the error or amount written.</div><div class='ctx'> </div><div class='ctx'> Note that the write function will always run asynchronously and will unmark all</div><div class='ctx'> the pages upon completion before calling term_func.</div><div class='hunk'>@@ -434,11 +433,11 @@ has done a write and then the page it wrote from has been released by the VM,</div><div class='ctx'> after which it *has* to look in the cache.</div><div class='ctx'> </div><div class='ctx'> To inform fscache that a page might now be in the cache, the following function</div><div class='del'>-should be called from the ``releasepage`` address space op::</div><div class='add'>+should be called from the ``release_folio`` address space op::</div><div class='ctx'> </div><div class='ctx'> 	void fscache_note_page_release(struct fscache_cookie *cookie);</div><div class='ctx'> </div><div class='del'>-if the page has been released (ie. releasepage returned true).</div><div class='add'>+if the page has been released (ie. release_folio returned true).</div><div class='ctx'> </div><div class='ctx'> Page release and page invalidation should also wait for any mark left on the</div><div class='ctx'> page to say that a DIO write is underway from that page::</div><div class='head'>diff --git a/Documentation/filesystems/ceph.rst b/Documentation/filesystems/ceph.rst<br/>index 4942e018db85..76ce938e7024 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ceph.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ceph.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ceph.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ceph.rst</a></div><div class='hunk'>@@ -203,7 +203,6 @@ For more information on Ceph, see the home page at</div><div class='ctx'> </div><div class='ctx'> The Linux kernel client source tree is available at</div><div class='ctx'> 	- https://github.com/ceph/ceph-client.git</div><div class='del'>-	- git://git.kernel.org/pub/scm/linux/kernel/git/sage/ceph-client.git</div><div class='ctx'> </div><div class='ctx'> and the source for the full system is at</div><div class='ctx'> 	https://github.com/ceph/ceph.git</div><div class='head'>diff --git a/Documentation/filesystems/cifs/ksmbd.rst b/Documentation/filesystems/cifs/ksmbd.rst<br/>index 1af600db2e70..7bed96d794fc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/cifs/ksmbd.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/cifs/ksmbd.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/cifs/ksmbd.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/cifs/ksmbd.rst</a></div><div class='hunk'>@@ -118,26 +118,44 @@ ksmbd/nfsd interoperability    Planned for future. The features that ksmbd</div><div class='ctx'> How to run</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='del'>-1. Download ksmbd-tools and compile them.</div><div class='del'>-	- https://github.com/cifsd-team/ksmbd-tools</div><div class='add'>+1. Download ksmbd-tools(https://github.com/cifsd-team/ksmbd-tools/releases) and</div><div class='add'>+   compile them.</div><div class='ctx'> </div><div class='del'>-2. Create user/password for SMB share.</div><div class='add'>+   - Refer README(https://github.com/cifsd-team/ksmbd-tools/blob/master/README.md)</div><div class='add'>+     to know how to use ksmbd.mountd/adduser/addshare/control utils</div><div class='ctx'> </div><div class='del'>-	# mkdir /etc/ksmbd/</div><div class='del'>-	# ksmbd.adduser -a &lt;Enter USERNAME for SMB share access&gt;</div><div class='add'>+     $ ./autogen.sh</div><div class='add'>+     $ ./configure --with-rundir=/run</div><div class='add'>+     $ make &amp;&amp; sudo make install</div><div class='ctx'> </div><div class='del'>-3. Create /etc/ksmbd/smb.conf file, add SMB share in smb.conf file</div><div class='del'>-	- Refer smb.conf.example and</div><div class='del'>-          https://github.com/cifsd-team/ksmbd-tools/blob/master/Documentation/configuration.txt</div><div class='add'>+2. Create /usr/local/etc/ksmbd/ksmbd.conf file, add SMB share in ksmbd.conf file.</div><div class='ctx'> </div><div class='del'>-4. Insert ksmbd.ko module</div><div class='add'>+   - Refer ksmbd.conf.example in ksmbd-utils, See ksmbd.conf manpage</div><div class='add'>+     for details to configure shares.</div><div class='ctx'> </div><div class='del'>-	# insmod ksmbd.ko</div><div class='add'>+        $ man ksmbd.conf</div><div class='add'>+</div><div class='add'>+3. Create user/password for SMB share.</div><div class='add'>+</div><div class='add'>+   - See ksmbd.adduser manpage.</div><div class='add'>+</div><div class='add'>+     $ man ksmbd.adduser</div><div class='add'>+     $ sudo ksmbd.adduser -a &lt;Enter USERNAME for SMB share access&gt;</div><div class='add'>+</div><div class='add'>+4. Insert ksmbd.ko module after build your kernel. No need to load module</div><div class='add'>+   if ksmbd is built into the kernel.</div><div class='add'>+</div><div class='add'>+   - Set ksmbd in menuconfig(e.g. $ make menuconfig)</div><div class='add'>+       [*] Network File Systems  ---&gt;</div><div class='add'>+           &lt;M&gt; SMB3 server support (EXPERIMENTAL)</div><div class='add'>+</div><div class='add'>+	$ sudo modprobe ksmbd.ko</div><div class='ctx'> </div><div class='ctx'> 5. Start ksmbd user space daemon</div><div class='del'>-	# ksmbd.mountd</div><div class='ctx'> </div><div class='del'>-6. Access share from Windows or Linux using CIFS</div><div class='add'>+	$ sudo ksmbd.mountd</div><div class='add'>+</div><div class='add'>+6. Access share from Windows or Linux using SMB3 client (cifs.ko or smbclient of samba)</div><div class='ctx'> </div><div class='ctx'> Shutdown KSMBD</div><div class='ctx'> ==============</div><div class='head'>diff --git a/Documentation/filesystems/configfs.rst b/Documentation/filesystems/configfs.rst<br/>index 1d3d6f4a82a9..8c9342ed6d25 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/configfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/configfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/configfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/configfs.rst</a></div><div class='hunk'>@@ -289,7 +289,6 @@ config_item_type::</div><div class='ctx'> 						 const char *name);</div><div class='ctx'> 		struct config_group *(*make_group)(struct config_group *group,</div><div class='ctx'> 						   const char *name);</div><div class='del'>-		int (*commit_item)(struct config_item *item);</div><div class='ctx'> 		void (*disconnect_notify)(struct config_group *group,</div><div class='ctx'> 					  struct config_item *item);</div><div class='ctx'> 		void (*drop_item)(struct config_group *group,</div><div class='hunk'>@@ -486,50 +485,3 @@ up.  Here, the heartbeat code calls configfs_depend_item().  If it</div><div class='ctx'> succeeds, then heartbeat knows the region is safe to give to ocfs2.</div><div class='ctx'> If it fails, it was being torn down anyway, and heartbeat can gracefully</div><div class='ctx'> pass up an error.</div><div class='del'>-</div><div class='del'>-Committable Items</div><div class='del'>-=================</div><div class='del'>-</div><div class='del'>-Note:</div><div class='del'>-     Committable items are currently unimplemented.</div><div class='del'>-</div><div class='del'>-Some config_items cannot have a valid initial state.  That is, no</div><div class='del'>-default values can be specified for the item's attributes such that the</div><div class='del'>-item can do its work.  Userspace must configure one or more attributes,</div><div class='del'>-after which the subsystem can start whatever entity this item</div><div class='del'>-represents.</div><div class='del'>-</div><div class='del'>-Consider the FakeNBD device from above.  Without a target address *and*</div><div class='del'>-a target device, the subsystem has no idea what block device to import.</div><div class='del'>-The simple example assumes that the subsystem merely waits until all the</div><div class='del'>-appropriate attributes are configured, and then connects.  This will,</div><div class='del'>-indeed, work, but now every attribute store must check if the attributes</div><div class='del'>-are initialized.  Every attribute store must fire off the connection if</div><div class='del'>-that condition is met.</div><div class='del'>-</div><div class='del'>-Far better would be an explicit action notifying the subsystem that the</div><div class='del'>-config_item is ready to go.  More importantly, an explicit action allows</div><div class='del'>-the subsystem to provide feedback as to whether the attributes are</div><div class='del'>-initialized in a way that makes sense.  configfs provides this as</div><div class='del'>-committable items.</div><div class='del'>-</div><div class='del'>-configfs still uses only normal filesystem operations.  An item is</div><div class='del'>-committed via rename(2).  The item is moved from a directory where it</div><div class='del'>-can be modified to a directory where it cannot.</div><div class='del'>-</div><div class='del'>-Any group that provides the ct_group_ops-&gt;commit_item() method has</div><div class='del'>-committable items.  When this group appears in configfs, mkdir(2) will</div><div class='del'>-not work directly in the group.  Instead, the group will have two</div><div class='del'>-subdirectories: "live" and "pending".  The "live" directory does not</div><div class='del'>-support mkdir(2) or rmdir(2) either.  It only allows rename(2).  The</div><div class='del'>-"pending" directory does allow mkdir(2) and rmdir(2).  An item is</div><div class='del'>-created in the "pending" directory.  Its attributes can be modified at</div><div class='del'>-will.  Userspace commits the item by renaming it into the "live"</div><div class='del'>-directory.  At this point, the subsystem receives the -&gt;commit_item()</div><div class='del'>-callback.  If all required attributes are filled to satisfaction, the</div><div class='del'>-method returns zero and the item is moved to the "live" directory.</div><div class='del'>-</div><div class='del'>-As rmdir(2) does not work in the "live" directory, an item must be</div><div class='del'>-shutdown, or "uncommitted".  Again, this is done via rename(2), this</div><div class='del'>-time from the "live" directory back to the "pending" one.  The subsystem</div><div class='del'>-is notified by the ct_group_ops-&gt;uncommit_object() method.</div><div class='head'>diff --git a/Documentation/filesystems/debugfs.rst b/Documentation/filesystems/debugfs.rst<br/>index 71b1fee56d2a..dc35da8b8792 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/debugfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/debugfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/debugfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/debugfs.rst</a></div><div class='hunk'>@@ -155,8 +155,8 @@ any code which does so in the mainline.  Note that all files created with</div><div class='ctx'> debugfs_create_blob() are read-only.</div><div class='ctx'> </div><div class='ctx'> If you want to dump a block of registers (something that happens quite</div><div class='del'>-often during development, even if little such code reaches mainline.</div><div class='del'>-Debugfs offers two functions: one to make a registers-only file, and</div><div class='add'>+often during development, even if little such code reaches mainline),</div><div class='add'>+debugfs offers two functions: one to make a registers-only file, and</div><div class='ctx'> another to insert a register block in the middle of another sequential</div><div class='ctx'> file::</div><div class='ctx'> </div><div class='hunk'>@@ -183,7 +183,7 @@ The "base" argument may be 0, but you may want to build the reg32 array</div><div class='ctx'> using __stringify, and a number of register names (macros) are actually</div><div class='ctx'> byte offsets over a base for the register block.</div><div class='ctx'> </div><div class='del'>-If you want to dump an u32 array in debugfs, you can create file with::</div><div class='add'>+If you want to dump a u32 array in debugfs, you can create a file with::</div><div class='ctx'> </div><div class='ctx'>     struct debugfs_u32_array {</div><div class='ctx'> 	u32 *array;</div><div class='hunk'>@@ -197,7 +197,7 @@ If you want to dump an u32 array in debugfs, you can create file with::</div><div class='ctx'> The "array" argument wraps a pointer to the array's data and the number</div><div class='ctx'> of its elements. Note: Once array is created its size can not be changed.</div><div class='ctx'> </div><div class='del'>-There is a helper function to create device related seq_file::</div><div class='add'>+There is a helper function to create a device-related seq_file::</div><div class='ctx'> </div><div class='ctx'>    void debugfs_create_devm_seqfile(struct device *dev,</div><div class='ctx'> 				const char *name,</div><div class='head'>diff --git a/Documentation/filesystems/erofs.rst b/Documentation/filesystems/erofs.rst<br/>index bef6d3040ce4..4654ee57c1d5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/erofs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/erofs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/erofs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/erofs.rst</a></div><div class='hunk'>@@ -1,63 +1,91 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='ctx'> ======================================</div><div class='del'>-Enhanced Read-Only File System - EROFS</div><div class='add'>+EROFS - Enhanced Read-Only File System</div><div class='ctx'> ======================================</div><div class='ctx'> </div><div class='ctx'> Overview</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='del'>-EROFS file-system stands for Enhanced Read-Only File System. Different</div><div class='del'>-from other read-only file systems, it aims to be designed for flexibility,</div><div class='del'>-scalability, but be kept simple and high performance.</div><div class='add'>+EROFS filesystem stands for Enhanced Read-Only File System.  It aims to form a</div><div class='add'>+generic read-only filesystem solution for various read-only use cases instead</div><div class='add'>+of just focusing on storage space saving without considering any side effects</div><div class='add'>+of runtime performance.</div><div class='ctx'> </div><div class='del'>-It is designed as a better filesystem solution for the following scenarios:</div><div class='add'>+It is designed to meet the needs of flexibility, feature extendability and user</div><div class='add'>+payload friendly, etc.  Apart from those, it is still kept as a simple</div><div class='add'>+random-access friendly high-performance filesystem to get rid of unneeded I/O</div><div class='add'>+amplification and memory-resident overhead compared to similar approaches.</div><div class='add'>+</div><div class='add'>+It is implemented to be a better choice for the following scenarios:</div><div class='ctx'> </div><div class='ctx'>  - read-only storage media or</div><div class='ctx'> </div><div class='ctx'>  - part of a fully trusted read-only solution, which means it needs to be</div><div class='ctx'>    immutable and bit-for-bit identical to the official golden image for</div><div class='del'>-   their releases due to security and other considerations and</div><div class='add'>+   their releases due to security or other considerations and</div><div class='ctx'> </div><div class='ctx'>  - hope to minimize extra storage space with guaranteed end-to-end performance</div><div class='ctx'>    by using compact layout, transparent file compression and direct access,</div><div class='ctx'>    especially for those embedded devices with limited memory and high-density</div><div class='del'>-   hosts with numerous containers;</div><div class='add'>+   hosts with numerous containers.</div><div class='ctx'> </div><div class='del'>-Here is the main features of EROFS:</div><div class='add'>+Here are the main features of EROFS:</div><div class='ctx'> </div><div class='ctx'>  - Little endian on-disk design;</div><div class='ctx'> </div><div class='del'>- - Currently 4KB block size (nobh) and therefore maximum 16TB address space;</div><div class='add'>+ - Block-based distribution and file-based distribution over fscache are</div><div class='add'>+   supported;</div><div class='add'>+</div><div class='add'>+ - Support multiple devices to refer to external blobs, which can be used</div><div class='add'>+   for container images;</div><div class='ctx'> </div><div class='del'>- - Metadata &amp; data could be mixed by design;</div><div class='add'>+ - 32-bit block addresses for each device, therefore 16TiB address space at</div><div class='add'>+   most with 4KiB block size for now;</div><div class='ctx'> </div><div class='del'>- - 2 inode versions for different requirements:</div><div class='add'>+ - Two inode layouts for different requirements:</div><div class='ctx'> </div><div class='del'>-   =====================  ============  =====================================</div><div class='add'>+   =====================  ============  ======================================</div><div class='ctx'>                           compact (v1)  extended (v2)</div><div class='del'>-   =====================  ============  =====================================</div><div class='add'>+   =====================  ============  ======================================</div><div class='ctx'>    Inode metadata size    32 bytes      64 bytes</div><div class='del'>-   Max file size          4 GB          16 EB (also limited by max. vol size)</div><div class='add'>+   Max file size          4 GiB         16 EiB (also limited by max. vol size)</div><div class='ctx'>    Max uids/gids          65536         4294967296</div><div class='ctx'>    Per-inode timestamp    no            yes (64 + 32-bit timestamp)</div><div class='ctx'>    Max hardlinks          65536         4294967296</div><div class='del'>-   Metadata reserved      4 bytes       14 bytes</div><div class='del'>-   =====================  ============  =====================================</div><div class='del'>-</div><div class='del'>- - Support extended attributes (xattrs) as an option;</div><div class='add'>+   Metadata reserved      8 bytes       18 bytes</div><div class='add'>+   =====================  ============  ======================================</div><div class='ctx'> </div><div class='del'>- - Support xattr inline and tail-end data inline for all files;</div><div class='add'>+ - Support extended attributes as an option;</div><div class='ctx'> </div><div class='del'>- - Support POSIX.1e ACLs by using xattrs;</div><div class='add'>+ - Support POSIX.1e ACLs by using extended attributes;</div><div class='ctx'> </div><div class='ctx'>  - Support transparent data compression as an option:</div><div class='del'>-   LZ4 algorithm with the fixed-sized output compression for high performance;</div><div class='add'>+   LZ4 and MicroLZMA algorithms can be used on a per-file basis; In addition,</div><div class='add'>+   inplace decompression is also supported to avoid bounce compressed buffers</div><div class='add'>+   and page cache thrashing.</div><div class='add'>+</div><div class='add'>+ - Support chunk-based data deduplication and rolling-hash compressed data</div><div class='add'>+   deduplication;</div><div class='add'>+</div><div class='add'>+ - Support tailpacking inline compared to byte-addressed unaligned metadata</div><div class='add'>+   or smaller block size alternatives;</div><div class='add'>+</div><div class='add'>+ - Support merging tail-end data into a special inode as fragments.</div><div class='ctx'> </div><div class='del'>- - Multiple device support for multi-layer container images.</div><div class='add'>+ - Support large folios for uncompressed files.</div><div class='add'>+</div><div class='add'>+ - Support direct I/O on uncompressed files to avoid double caching for loop</div><div class='add'>+   devices;</div><div class='add'>+</div><div class='add'>+ - Support FSDAX on uncompressed images for secure containers and ramdisks in</div><div class='add'>+   order to get rid of unnecessary page cache.</div><div class='add'>+</div><div class='add'>+ - Support file-based on-demand loading with the Fscache infrastructure.</div><div class='ctx'> </div><div class='ctx'> The following git tree provides the file system user-space tools under</div><div class='del'>-development (ex, formatting tool mkfs.erofs):</div><div class='add'>+development, such as a formatting tool (mkfs.erofs), an on-disk consistency &amp;</div><div class='add'>+compatibility checking tool (fsck.erofs), and a debugging tool (dump.erofs):</div><div class='ctx'> </div><div class='ctx'> - git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs-utils.git</div><div class='ctx'> </div><div class='hunk'>@@ -91,6 +119,9 @@ dax={always,never}     Use direct access (no page cache).  See</div><div class='ctx'>                        Documentation/filesystems/dax.rst.</div><div class='ctx'> dax                    A legacy option which is an alias for ``dax=always``.</div><div class='ctx'> device=%s              Specify a path to an extra device to be used together.</div><div class='add'>+fsid=%s                Specify a filesystem image ID for Fscache back-end.</div><div class='add'>+domain_id=%s           Specify a domain ID in fscache mode so that different images</div><div class='add'>+                       with the same blobs under a given domain ID can share storage.</div><div class='ctx'> ===================    =========================================================</div><div class='ctx'> </div><div class='ctx'> Sysfs Entries</div><div class='hunk'>@@ -226,8 +257,8 @@ Note that apart from the offset of the first filename, nameoff0 also indicates</div><div class='ctx'> the total number of directory entries in this block since it is no need to</div><div class='ctx'> introduce another on-disk field at all.</div><div class='ctx'> </div><div class='del'>-Chunk-based file</div><div class='del'>-----------------</div><div class='add'>+Chunk-based files</div><div class='add'>+-----------------</div><div class='ctx'> In order to support chunk-based data deduplication, a new inode data layout has</div><div class='ctx'> been supported since Linux v5.15: Files are split in equal-sized data chunks</div><div class='ctx'> with ``extents`` area of the inode metadata indicating how to get the chunk</div><div class='hunk'>@@ -239,7 +270,7 @@ By the way, chunk-based files are all uncompressed for now.</div><div class='ctx'> </div><div class='ctx'> Data compression</div><div class='ctx'> ----------------</div><div class='del'>-EROFS implements LZ4 fixed-sized output compression which generates fixed-sized</div><div class='add'>+EROFS implements fixed-sized output compression which generates fixed-sized</div><div class='ctx'> compressed data blocks from variable-sized input in contrast to other existing</div><div class='ctx'> fixed-sized input solutions. Relatively higher compression ratios can be gotten</div><div class='ctx'> by using fixed-sized output compression since nowadays popular data compression</div><div class='hunk'>@@ -294,3 +325,6 @@ to understand its delta0 is constantly 1, as illustrated below::</div><div class='ctx'> </div><div class='ctx'> If another HEAD follows a HEAD lcluster, there is no room to record CBLKCNT,</div><div class='ctx'> but it's easy to know the size of such pcluster is 1 lcluster as well.</div><div class='add'>+</div><div class='add'>+Since Linux v6.1, each pcluster can be used for multiple variable-sized extents,</div><div class='add'>+therefore it can be used for compressed data deduplication.</div><div class='head'>diff --git a/Documentation/filesystems/ext2.rst b/Documentation/filesystems/ext2.rst<br/>index 154101cf0e4f..92aae683e16a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext2.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext2.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext2.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext2.rst</a></div><div class='hunk'>@@ -59,8 +59,6 @@ acl				Enable POSIX Access Control Lists support</div><div class='ctx'> 				(requires CONFIG_EXT2_FS_POSIX_ACL).</div><div class='ctx'> noacl				Don't support POSIX ACLs.</div><div class='ctx'> </div><div class='del'>-nobh				Do not attach buffer_heads to file pagecache.</div><div class='del'>-</div><div class='ctx'> quota, usrquota			Enable user disk quota support</div><div class='ctx'> 				(requires CONFIG_QUOTA).</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/ext4/attributes.rst b/Documentation/filesystems/ext4/attributes.rst<br/>index 54386a010a8d..87814696a65b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/attributes.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/attributes.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/attributes.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/attributes.rst</a></div><div class='hunk'>@@ -13,8 +13,8 @@ disappeared as of Linux 3.0.</div><div class='ctx'> </div><div class='ctx'> There are two places where extended attributes can be found. The first</div><div class='ctx'> place is between the end of each inode entry and the beginning of the</div><div class='del'>-next inode entry. For example, if inode.i\_extra\_isize = 28 and</div><div class='del'>-sb.inode\_size = 256, then there are 256 - (128 + 28) = 100 bytes</div><div class='add'>+next inode entry. For example, if inode.i_extra_isize = 28 and</div><div class='add'>+sb.inode_size = 256, then there are 256 - (128 + 28) = 100 bytes</div><div class='ctx'> available for in-inode extended attribute storage. The second place</div><div class='ctx'> where extended attributes can be found is in the block pointed to by</div><div class='ctx'> ``inode.i_file_acl``. As of Linux 3.11, it is not possible for this</div><div class='hunk'>@@ -38,8 +38,8 @@ Extended attributes, when stored after the inode, have a header</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - h\_magic</div><div class='add'>+     - __le32</div><div class='add'>+     - h_magic</div><div class='ctx'>      - Magic number for identification, 0xEA020000. This value is set by the</div><div class='ctx'>        Linux driver, though e2fsprogs doesn't seem to check it(?)</div><div class='ctx'> </div><div class='hunk'>@@ -55,28 +55,28 @@ The beginning of an extended attribute block is in</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - h\_magic</div><div class='add'>+     - __le32</div><div class='add'>+     - h_magic</div><div class='ctx'>      - Magic number for identification, 0xEA020000.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - h\_refcount</div><div class='add'>+     - __le32</div><div class='add'>+     - h_refcount</div><div class='ctx'>      - Reference count.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - h\_blocks</div><div class='add'>+     - __le32</div><div class='add'>+     - h_blocks</div><div class='ctx'>      - Number of disk blocks used.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - h\_hash</div><div class='add'>+     - __le32</div><div class='add'>+     - h_hash</div><div class='ctx'>      - Hash value of all attributes.</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - h\_checksum</div><div class='add'>+     - __le32</div><div class='add'>+     - h_checksum</div><div class='ctx'>      - Checksum of the extended attribute block.</div><div class='ctx'>    * - 0x14</div><div class='del'>-     - \_\_u32</div><div class='del'>-     - h\_reserved[2]</div><div class='add'>+     - __u32</div><div class='add'>+     - h_reserved[3]</div><div class='ctx'>      - Zero.</div><div class='ctx'> </div><div class='ctx'> The checksum is calculated against the FS UUID, the 64-bit block number</div><div class='hunk'>@@ -100,46 +100,46 @@ Attributes stored inside an inode do not need be stored in sorted order.</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - e\_name\_len</div><div class='add'>+     - __u8</div><div class='add'>+     - e_name_len</div><div class='ctx'>      - Length of name.</div><div class='ctx'>    * - 0x1</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - e\_name\_index</div><div class='add'>+     - __u8</div><div class='add'>+     - e_name_index</div><div class='ctx'>      - Attribute name index. There is a discussion of this below.</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - e\_value\_offs</div><div class='add'>+     - __le16</div><div class='add'>+     - e_value_offs</div><div class='ctx'>      - Location of this attribute's value on the disk block where it is stored.</div><div class='ctx'>        Multiple attributes can share the same value. For an inode attribute</div><div class='ctx'>        this value is relative to the start of the first entry; for a block this</div><div class='ctx'>        value is relative to the start of the block (i.e. the header).</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - e\_value\_inum</div><div class='add'>+     - __le32</div><div class='add'>+     - e_value_inum</div><div class='ctx'>      - The inode where the value is stored. Zero indicates the value is in the</div><div class='ctx'>        same block as this entry. This field is only used if the</div><div class='del'>-       INCOMPAT\_EA\_INODE feature is enabled.</div><div class='add'>+       INCOMPAT_EA_INODE feature is enabled.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - e\_value\_size</div><div class='add'>+     - __le32</div><div class='add'>+     - e_value_size</div><div class='ctx'>      - Length of attribute value.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - e\_hash</div><div class='add'>+     - __le32</div><div class='add'>+     - e_hash</div><div class='ctx'>      - Hash value of attribute name and attribute value. The kernel doesn't</div><div class='ctx'>        update the hash for in-inode attributes, so for that case this value</div><div class='ctx'>        must be zero, because e2fsck validates any non-zero hash regardless of</div><div class='ctx'>        where the xattr lives.</div><div class='ctx'>    * - 0x10</div><div class='ctx'>      - char</div><div class='del'>-     - e\_name[e\_name\_len]</div><div class='add'>+     - e_name[e_name_len]</div><div class='ctx'>      - Attribute name. Does not include trailing NULL.</div><div class='ctx'> </div><div class='ctx'> Attribute values can follow the end of the entry table. There appears to</div><div class='ctx'> be a requirement that they be aligned to 4-byte boundaries. The values</div><div class='ctx'> are stored starting at the end of the block and grow towards the</div><div class='del'>-xattr\_header/xattr\_entry table. When the two collide, the overflow is</div><div class='add'>+xattr_header/xattr_entry table. When the two collide, the overflow is</div><div class='ctx'> put into a separate disk block. If the disk block fills up, the</div><div class='ctx'> filesystem returns -ENOSPC.</div><div class='ctx'> </div><div class='hunk'>@@ -167,15 +167,15 @@ the key name. Here is a map of name index values to key prefixes:</div><div class='ctx'>    * - 1</div><div class='ctx'>      - “user.”</div><div class='ctx'>    * - 2</div><div class='del'>-     - “system.posix\_acl\_access”</div><div class='add'>+     - “system.posix_acl_access”</div><div class='ctx'>    * - 3</div><div class='del'>-     - “system.posix\_acl\_default”</div><div class='add'>+     - “system.posix_acl_default”</div><div class='ctx'>    * - 4</div><div class='ctx'>      - “trusted.”</div><div class='ctx'>    * - 6</div><div class='ctx'>      - “security.”</div><div class='ctx'>    * - 7</div><div class='del'>-     - “system.” (inline\_data only?)</div><div class='add'>+     - “system.” (inline_data only?)</div><div class='ctx'>    * - 8</div><div class='ctx'>      - “system.richacl” (SuSE kernels only?)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/ext4/bigalloc.rst b/Documentation/filesystems/ext4/bigalloc.rst<br/>index 72075aa608e4..976a180b209c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/bigalloc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/bigalloc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/bigalloc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/bigalloc.rst</a></div><div class='hunk'>@@ -23,7 +23,7 @@ means that a block group addresses 32 gigabytes instead of 128 megabytes,</div><div class='ctx'> also shrinking the amount of file system overhead for metadata.</div><div class='ctx'> </div><div class='ctx'> The administrator can set a block cluster size at mkfs time (which is</div><div class='del'>-stored in the s\_log\_cluster\_size field in the superblock); from then</div><div class='add'>+stored in the s_log_cluster_size field in the superblock); from then</div><div class='ctx'> on, the block bitmaps track clusters, not individual blocks. This means</div><div class='ctx'> that block groups can be several gigabytes in size (instead of just</div><div class='ctx'> 128MiB); however, the minimum allocation unit becomes a cluster, not a</div><div class='head'>diff --git a/Documentation/filesystems/ext4/bitmaps.rst b/Documentation/filesystems/ext4/bitmaps.rst<br/>index c7546dbc197a..91c45d86e9bb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/bitmaps.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/bitmaps.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/bitmaps.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/bitmaps.rst</a></div><div class='hunk'>@@ -9,15 +9,15 @@ group.</div><div class='ctx'> The inode bitmap records which entries in the inode table are in use.</div><div class='ctx'> </div><div class='ctx'> As with most bitmaps, one bit represents the usage status of one data</div><div class='del'>-block or inode table entry. This implies a block group size of 8 \*</div><div class='del'>-number\_of\_bytes\_in\_a\_logical\_block.</div><div class='add'>+block or inode table entry. This implies a block group size of 8 *</div><div class='add'>+number_of_bytes_in_a_logical_block.</div><div class='ctx'> </div><div class='ctx'> NOTE: If ``BLOCK_UNINIT`` is set for a given block group, various parts</div><div class='ctx'> of the kernel and e2fsprogs code pretends that the block bitmap contains</div><div class='ctx'> zeros (i.e. all blocks in the group are free). However, it is not</div><div class='ctx'> necessarily the case that no blocks are in use -- if ``meta_bg`` is set,</div><div class='ctx'> the bitmaps and group descriptor live inside the group. Unfortunately,</div><div class='del'>-ext2fs\_test\_block\_bitmap2() will return '0' for those locations,</div><div class='add'>+ext2fs_test_block_bitmap2() will return '0' for those locations,</div><div class='ctx'> which produces confusing debugfs output.</div><div class='ctx'> </div><div class='ctx'> Inode Table</div><div class='head'>diff --git a/Documentation/filesystems/ext4/blockgroup.rst b/Documentation/filesystems/ext4/blockgroup.rst<br/>index d5d652addce5..ed5a5cac6d40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/blockgroup.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/blockgroup.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/blockgroup.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/blockgroup.rst</a></div><div class='hunk'>@@ -56,39 +56,39 @@ established that the super block and the group descriptor table, if</div><div class='ctx'> present, will be at the beginning of the block group. The bitmaps and</div><div class='ctx'> the inode table can be anywhere, and it is quite possible for the</div><div class='ctx'> bitmaps to come after the inode table, or for both to be in different</div><div class='del'>-groups (flex\_bg). Leftover space is used for file data blocks, indirect</div><div class='add'>+groups (flex_bg). Leftover space is used for file data blocks, indirect</div><div class='ctx'> block maps, extent tree blocks, and extended attributes.</div><div class='ctx'> </div><div class='ctx'> Flexible Block Groups</div><div class='ctx'> ---------------------</div><div class='ctx'> </div><div class='ctx'> Starting in ext4, there is a new feature called flexible block groups</div><div class='del'>-(flex\_bg). In a flex\_bg, several block groups are tied together as one</div><div class='add'>+(flex_bg). In a flex_bg, several block groups are tied together as one</div><div class='ctx'> logical block group; the bitmap spaces and the inode table space in the</div><div class='del'>-first block group of the flex\_bg are expanded to include the bitmaps</div><div class='del'>-and inode tables of all other block groups in the flex\_bg. For example,</div><div class='del'>-if the flex\_bg size is 4, then group 0 will contain (in order) the</div><div class='add'>+first block group of the flex_bg are expanded to include the bitmaps</div><div class='add'>+and inode tables of all other block groups in the flex_bg. For example,</div><div class='add'>+if the flex_bg size is 4, then group 0 will contain (in order) the</div><div class='ctx'> superblock, group descriptors, data block bitmaps for groups 0-3, inode</div><div class='ctx'> bitmaps for groups 0-3, inode tables for groups 0-3, and the remaining</div><div class='ctx'> space in group 0 is for file data. The effect of this is to group the</div><div class='ctx'> block group metadata close together for faster loading, and to enable</div><div class='ctx'> large files to be continuous on disk. Backup copies of the superblock</div><div class='ctx'> and group descriptors are always at the beginning of block groups, even</div><div class='del'>-if flex\_bg is enabled. The number of block groups that make up a</div><div class='del'>-flex\_bg is given by 2 ^ ``sb.s_log_groups_per_flex``.</div><div class='add'>+if flex_bg is enabled. The number of block groups that make up a</div><div class='add'>+flex_bg is given by 2 ^ ``sb.s_log_groups_per_flex``.</div><div class='ctx'> </div><div class='ctx'> Meta Block Groups</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='del'>-Without the option META\_BG, for safety concerns, all block group</div><div class='add'>+Without the option META_BG, for safety concerns, all block group</div><div class='ctx'> descriptors copies are kept in the first block group. Given the default</div><div class='ctx'> 128MiB(2^27 bytes) block group size and 64-byte group descriptors, ext4</div><div class='ctx'> can have at most 2^27/64 = 2^21 block groups. This limits the entire</div><div class='ctx'> filesystem size to 2^21 * 2^27 = 2^48bytes or 256TiB.</div><div class='ctx'> </div><div class='ctx'> The solution to this problem is to use the metablock group feature</div><div class='del'>-(META\_BG), which is already in ext3 for all 2.6 releases. With the</div><div class='del'>-META\_BG feature, ext4 filesystems are partitioned into many metablock</div><div class='add'>+(META_BG), which is already in ext3 for all 2.6 releases. With the</div><div class='add'>+META_BG feature, ext4 filesystems are partitioned into many metablock</div><div class='ctx'> groups. Each metablock group is a cluster of block groups whose group</div><div class='ctx'> descriptor structures can be stored in a single disk block. For ext4</div><div class='ctx'> filesystems with 4 KB block size, a single metablock group partition</div><div class='hunk'>@@ -105,12 +105,12 @@ descriptors. Instead, the superblock and a single block group descriptor</div><div class='ctx'> block is placed at the beginning of the first, second, and last block</div><div class='ctx'> groups in a meta-block group. A meta-block group is a collection of</div><div class='ctx'> block groups which can be described by a single block group descriptor</div><div class='del'>-block. Since the size of the block group descriptor structure is 32</div><div class='del'>-bytes, a meta-block group contains 32 block groups for filesystems with</div><div class='del'>-a 1KB block size, and 128 block groups for filesystems with a 4KB</div><div class='add'>+block. Since the size of the block group descriptor structure is 64</div><div class='add'>+bytes, a meta-block group contains 16 block groups for filesystems with</div><div class='add'>+a 1KB block size, and 64 block groups for filesystems with a 4KB</div><div class='ctx'> blocksize. Filesystems can either be created using this new block group</div><div class='ctx'> descriptor layout, or existing filesystems can be resized on-line, and</div><div class='del'>-the field s\_first\_meta\_bg in the superblock will indicate the first</div><div class='add'>+the field s_first_meta_bg in the superblock will indicate the first</div><div class='ctx'> block group using this new layout.</div><div class='ctx'> </div><div class='ctx'> Please see an important note about ``BLOCK_UNINIT`` in the section about</div><div class='hunk'>@@ -121,15 +121,15 @@ Lazy Block Group Initialization</div><div class='ctx'> </div><div class='ctx'> A new feature for ext4 are three block group descriptor flags that</div><div class='ctx'> enable mkfs to skip initializing other parts of the block group</div><div class='del'>-metadata. Specifically, the INODE\_UNINIT and BLOCK\_UNINIT flags mean</div><div class='add'>+metadata. Specifically, the INODE_UNINIT and BLOCK_UNINIT flags mean</div><div class='ctx'> that the inode and block bitmaps for that group can be calculated and</div><div class='ctx'> therefore the on-disk bitmap blocks are not initialized. This is</div><div class='ctx'> generally the case for an empty block group or a block group containing</div><div class='del'>-only fixed-location block group metadata. The INODE\_ZEROED flag means</div><div class='add'>+only fixed-location block group metadata. The INODE_ZEROED flag means</div><div class='ctx'> that the inode table has been initialized; mkfs will unset this flag and</div><div class='ctx'> rely on the kernel to initialize the inode tables in the background.</div><div class='ctx'> </div><div class='ctx'> By not writing zeroes to the bitmaps and inode table, mkfs time is</div><div class='del'>-reduced considerably. Note the feature flag is RO\_COMPAT\_GDT\_CSUM,</div><div class='del'>-but the dumpe2fs output prints this as “uninit\_bg”. They are the same</div><div class='add'>+reduced considerably. Note the feature flag is RO_COMPAT_GDT_CSUM,</div><div class='add'>+but the dumpe2fs output prints this as “uninit_bg”. They are the same</div><div class='ctx'> thing.</div><div class='head'>diff --git a/Documentation/filesystems/ext4/blockmap.rst b/Documentation/filesystems/ext4/blockmap.rst<br/>index 30e25750d88a..cc596541ce79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/blockmap.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/blockmap.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/blockmap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/blockmap.rst</a></div><div class='hunk'>@@ -1,7 +1,7 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='ctx'> +---------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+</div><div class='del'>-| i.i\_block Offset   | Where It Points                                                                                                                                                                                                              |</div><div class='add'>+| i.i_block Offset    | Where It Points                                                                                                                                                                                                              |</div><div class='ctx'> +=====================+==============================================================================================================================================================================================================================+</div><div class='ctx'> | 0 to 11             | Direct map to file blocks 0 to 11.                                                                                                                                                                                           |</div><div class='ctx'> +---------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+</div><div class='head'>diff --git a/Documentation/filesystems/ext4/checksums.rst b/Documentation/filesystems/ext4/checksums.rst<br/>index 5519e253810d..e232749daf5f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/checksums.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/checksums.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/checksums.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/checksums.rst</a></div><div class='hunk'>@@ -4,7 +4,7 @@ Checksums</div><div class='ctx'> ---------</div><div class='ctx'> </div><div class='ctx'> Starting in early 2012, metadata checksums were added to all major ext4</div><div class='del'>-and jbd2 data structures. The associated feature flag is metadata\_csum.</div><div class='add'>+and jbd2 data structures. The associated feature flag is metadata_csum.</div><div class='ctx'> The desired checksum algorithm is indicated in the superblock, though as</div><div class='ctx'> of October 2012 the only supported algorithm is crc32c. Some data</div><div class='ctx'> structures did not have space to fit a full 32-bit checksum, so only the</div><div class='hunk'>@@ -20,7 +20,7 @@ encounters directory blocks that lack sufficient empty space to add a</div><div class='ctx'> checksum, it will request that you run ``e2fsck -D`` to have the</div><div class='ctx'> directories rebuilt with checksums. This has the added benefit of</div><div class='ctx'> removing slack space from the directory files and rebalancing the htree</div><div class='del'>-indexes. If you \_ignore\_ this step, your directories will not be</div><div class='add'>+indexes. If you _ignore_ this step, your directories will not be</div><div class='ctx'> protected by a checksum!</div><div class='ctx'> </div><div class='ctx'> The following table describes the data elements that go into each type</div><div class='hunk'>@@ -35,39 +35,39 @@ of checksum. The checksum function is whatever the superblock describes</div><div class='ctx'>      - Length</div><div class='ctx'>      - Ingredients</div><div class='ctx'>    * - Superblock</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - The entire superblock up to the checksum field. The UUID lives inside</div><div class='ctx'>        the superblock.</div><div class='ctx'>    * - MMP</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - UUID + the entire MMP block up to the checksum field.</div><div class='ctx'>    * - Extended Attributes</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - UUID + the entire extended attribute block. The checksum field is set to</div><div class='ctx'>        zero.</div><div class='ctx'>    * - Directory Entries</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - UUID + inode number + inode generation + the directory block up to the</div><div class='ctx'>        fake entry enclosing the checksum field.</div><div class='ctx'>    * - HTREE Nodes</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - UUID + inode number + inode generation + all valid extents + HTREE tail.</div><div class='ctx'>        The checksum field is set to zero.</div><div class='ctx'>    * - Extents</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - UUID + inode number + inode generation + the entire extent block up to</div><div class='ctx'>        the checksum field.</div><div class='ctx'>    * - Bitmaps</div><div class='del'>-     - \_\_le32 or \_\_le16</div><div class='add'>+     - __le32 or __le16</div><div class='ctx'>      - UUID + the entire bitmap. Checksums are stored in the group descriptor,</div><div class='ctx'>        and truncated if the group descriptor size is 32 bytes (i.e. ^64bit)</div><div class='ctx'>    * - Inodes</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - UUID + inode number + inode generation + the entire inode. The checksum</div><div class='ctx'>        field is set to zero. Each inode has its own checksum.</div><div class='ctx'>    * - Group Descriptors</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - If metadata\_csum, then UUID + group number + the entire descriptor;</div><div class='del'>-       else if gdt\_csum, then crc16(UUID + group number + the entire</div><div class='add'>+     - __le16</div><div class='add'>+     - If metadata_csum, then UUID + group number + the entire descriptor;</div><div class='add'>+       else if gdt_csum, then crc16(UUID + group number + the entire</div><div class='ctx'>        descriptor). In all cases, only the lower 16 bits are stored.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/ext4/directory.rst b/Documentation/filesystems/ext4/directory.rst<br/>index 55f618b37144..6eece8e31df8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/directory.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/directory.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/directory.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/directory.rst</a></div><div class='hunk'>@@ -42,24 +42,24 @@ is at most 263 bytes long, though on disk you'll need to reference</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - inode</div><div class='ctx'>      - Number of the inode that this directory entry points to.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - rec\_len</div><div class='add'>+     - __le16</div><div class='add'>+     - rec_len</div><div class='ctx'>      - Length of this directory entry. Must be a multiple of 4.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - name\_len</div><div class='add'>+     - __le16</div><div class='add'>+     - name_len</div><div class='ctx'>      - Length of the file name.</div><div class='ctx'>    * - 0x8</div><div class='ctx'>      - char</div><div class='del'>-     - name[EXT4\_NAME\_LEN]</div><div class='add'>+     - name[EXT4_NAME_LEN]</div><div class='ctx'>      - File name.</div><div class='ctx'> </div><div class='ctx'> Since file names cannot be longer than 255 bytes, the new directory</div><div class='del'>-entry format shortens the name\_len field and uses the space for a file</div><div class='add'>+entry format shortens the name_len field and uses the space for a file</div><div class='ctx'> type flag, probably to avoid having to load every inode during directory</div><div class='ctx'> tree traversal. This format is ``ext4_dir_entry_2``, which is at most</div><div class='ctx'> 263 bytes long, though on disk you'll need to reference</div><div class='hunk'>@@ -74,24 +74,24 @@ tree traversal. This format is ``ext4_dir_entry_2``, which is at most</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - inode</div><div class='ctx'>      - Number of the inode that this directory entry points to.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - rec\_len</div><div class='add'>+     - __le16</div><div class='add'>+     - rec_len</div><div class='ctx'>      - Length of this directory entry.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - name\_len</div><div class='add'>+     - __u8</div><div class='add'>+     - name_len</div><div class='ctx'>      - Length of the file name.</div><div class='ctx'>    * - 0x7</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - file\_type</div><div class='add'>+     - __u8</div><div class='add'>+     - file_type</div><div class='ctx'>      - File type code, see ftype_ table below.</div><div class='ctx'>    * - 0x8</div><div class='ctx'>      - char</div><div class='del'>-     - name[EXT4\_NAME\_LEN]</div><div class='add'>+     - name[EXT4_NAME_LEN]</div><div class='ctx'>      - File name.</div><div class='ctx'> </div><div class='ctx'> .. _ftype:</div><div class='hunk'>@@ -137,19 +137,19 @@ entry uses this extension, it may be up to 271 bytes.</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - hash</div><div class='ctx'>      - The hash of the directory name</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - minor\_hash</div><div class='add'>+     - __le32</div><div class='add'>+     - minor_hash</div><div class='ctx'>      - The minor hash of the directory name</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> In order to add checksums to these classic directory blocks, a phony</div><div class='ctx'> ``struct ext4_dir_entry`` is placed at the end of each leaf block to</div><div class='ctx'> hold the checksum. The directory entry is 12 bytes long. The inode</div><div class='del'>-number and name\_len fields are set to zero to fool old software into</div><div class='add'>+number and name_len fields are set to zero to fool old software into</div><div class='ctx'> ignoring an apparently empty directory entry, and the checksum is stored</div><div class='ctx'> in the place where the name normally goes. The structure is</div><div class='ctx'> ``struct ext4_dir_entry_tail``:</div><div class='hunk'>@@ -163,24 +163,24 @@ in the place where the name normally goes. The structure is</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - det\_reserved\_zero1</div><div class='add'>+     - __le32</div><div class='add'>+     - det_reserved_zero1</div><div class='ctx'>      - Inode number, which must be zero.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - det\_rec\_len</div><div class='add'>+     - __le16</div><div class='add'>+     - det_rec_len</div><div class='ctx'>      - Length of this directory entry, which must be 12.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - det\_reserved\_zero2</div><div class='add'>+     - __u8</div><div class='add'>+     - det_reserved_zero2</div><div class='ctx'>      - Length of the file name, which must be zero.</div><div class='ctx'>    * - 0x7</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - det\_reserved\_ft</div><div class='add'>+     - __u8</div><div class='add'>+     - det_reserved_ft</div><div class='ctx'>      - File type, which must be 0xDE.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - det\_checksum</div><div class='add'>+     - __le32</div><div class='add'>+     - det_checksum</div><div class='ctx'>      - Directory leaf block checksum.</div><div class='ctx'> </div><div class='ctx'> The leaf directory block checksum is calculated against the FS UUID, the</div><div class='hunk'>@@ -194,7 +194,7 @@ Hash Tree Directories</div><div class='ctx'> A linear array of directory entries isn't great for performance, so a</div><div class='ctx'> new feature was added to ext3 to provide a faster (but peculiar)</div><div class='ctx'> balanced tree keyed off a hash of the directory entry name. If the</div><div class='del'>-EXT4\_INDEX\_FL (0x1000) flag is set in the inode, this directory uses a</div><div class='add'>+EXT4_INDEX_FL (0x1000) flag is set in the inode, this directory uses a</div><div class='ctx'> hashed btree (htree) to organize and find directory entries. For</div><div class='ctx'> backwards read-only compatibility with ext2, this tree is actually</div><div class='ctx'> hidden inside the directory file, masquerading as “empty” directory data</div><div class='hunk'>@@ -206,14 +206,14 @@ rest of the directory block is empty so that it moves on.</div><div class='ctx'> The root of the tree always lives in the first data block of the</div><div class='ctx'> directory. By ext2 custom, the '.' and '..' entries must appear at the</div><div class='ctx'> beginning of this first block, so they are put here as two</div><div class='del'>-``struct ext4_dir_entry_2``\ s and not stored in the tree. The rest of</div><div class='add'>+``struct ext4_dir_entry_2`` s and not stored in the tree. The rest of</div><div class='ctx'> the root node contains metadata about the tree and finally a hash-&gt;block</div><div class='ctx'> map to find nodes that are lower in the htree. If</div><div class='ctx'> ``dx_root.info.indirect_levels`` is non-zero then the htree has two</div><div class='ctx'> levels; the data block pointed to by the root node's map is an interior</div><div class='ctx'> node, which is indexed by a minor hash. Interior nodes in this tree</div><div class='ctx'> contains a zeroed out ``struct ext4_dir_entry_2`` followed by a</div><div class='del'>-minor\_hash-&gt;block map to find leafe nodes. Leaf nodes contain a linear</div><div class='add'>+minor_hash-&gt;block map to find leafe nodes. Leaf nodes contain a linear</div><div class='ctx'> array of all ``struct ext4_dir_entry_2``; all of these entries</div><div class='ctx'> (presumably) hash to the same value. If there is an overflow, the</div><div class='ctx'> entries simply overflow into the next leaf node, and the</div><div class='hunk'>@@ -245,83 +245,83 @@ of a data block:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - dot.inode</div><div class='ctx'>      - inode number of this directory.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - dot.rec\_len</div><div class='add'>+     - __le16</div><div class='add'>+     - dot.rec_len</div><div class='ctx'>      - Length of this record, 12.</div><div class='ctx'>    * - 0x6</div><div class='ctx'>      - u8</div><div class='del'>-     - dot.name\_len</div><div class='add'>+     - dot.name_len</div><div class='ctx'>      - Length of the name, 1.</div><div class='ctx'>    * - 0x7</div><div class='ctx'>      - u8</div><div class='del'>-     - dot.file\_type</div><div class='add'>+     - dot.file_type</div><div class='ctx'>      - File type of this entry, 0x2 (directory) (if the feature flag is set).</div><div class='ctx'>    * - 0x8</div><div class='ctx'>      - char</div><div class='ctx'>      - dot.name[4]</div><div class='del'>-     - “.\\0\\0\\0”</div><div class='add'>+     - “.\0\0\0”</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - dotdot.inode</div><div class='ctx'>      - inode number of parent directory.</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - dotdot.rec\_len</div><div class='del'>-     - block\_size - 12. The record length is long enough to cover all htree</div><div class='add'>+     - __le16</div><div class='add'>+     - dotdot.rec_len</div><div class='add'>+     - block_size - 12. The record length is long enough to cover all htree</div><div class='ctx'>        data.</div><div class='ctx'>    * - 0x12</div><div class='ctx'>      - u8</div><div class='del'>-     - dotdot.name\_len</div><div class='add'>+     - dotdot.name_len</div><div class='ctx'>      - Length of the name, 2.</div><div class='ctx'>    * - 0x13</div><div class='ctx'>      - u8</div><div class='del'>-     - dotdot.file\_type</div><div class='add'>+     - dotdot.file_type</div><div class='ctx'>      - File type of this entry, 0x2 (directory) (if the feature flag is set).</div><div class='ctx'>    * - 0x14</div><div class='ctx'>      - char</div><div class='del'>-     - dotdot\_name[4]</div><div class='del'>-     - “..\\0\\0”</div><div class='add'>+     - dotdot_name[4]</div><div class='add'>+     - “..\0\0”</div><div class='ctx'>    * - 0x18</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - struct dx\_root\_info.reserved\_zero</div><div class='add'>+     - __le32</div><div class='add'>+     - struct dx_root_info.reserved_zero</div><div class='ctx'>      - Zero.</div><div class='ctx'>    * - 0x1C</div><div class='ctx'>      - u8</div><div class='del'>-     - struct dx\_root\_info.hash\_version</div><div class='add'>+     - struct dx_root_info.hash_version</div><div class='ctx'>      - Hash type, see dirhash_ table below.</div><div class='ctx'>    * - 0x1D</div><div class='ctx'>      - u8</div><div class='del'>-     - struct dx\_root\_info.info\_length</div><div class='add'>+     - struct dx_root_info.info_length</div><div class='ctx'>      - Length of the tree information, 0x8.</div><div class='ctx'>    * - 0x1E</div><div class='ctx'>      - u8</div><div class='del'>-     - struct dx\_root\_info.indirect\_levels</div><div class='del'>-     - Depth of the htree. Cannot be larger than 3 if the INCOMPAT\_LARGEDIR</div><div class='add'>+     - struct dx_root_info.indirect_levels</div><div class='add'>+     - Depth of the htree. Cannot be larger than 3 if the INCOMPAT_LARGEDIR</div><div class='ctx'>        feature is set; cannot be larger than 2 otherwise.</div><div class='ctx'>    * - 0x1F</div><div class='ctx'>      - u8</div><div class='del'>-     - struct dx\_root\_info.unused\_flags</div><div class='add'>+     - struct dx_root_info.unused_flags</div><div class='ctx'>      -</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - \_\_le16</div><div class='add'>+     - __le16</div><div class='ctx'>      - limit</div><div class='del'>-     - Maximum number of dx\_entries that can follow this header, plus 1 for</div><div class='add'>+     - Maximum number of dx_entries that can follow this header, plus 1 for</div><div class='ctx'>        the header itself.</div><div class='ctx'>    * - 0x22</div><div class='del'>-     - \_\_le16</div><div class='add'>+     - __le16</div><div class='ctx'>      - count</div><div class='del'>-     - Actual number of dx\_entries that follow this header, plus 1 for the</div><div class='add'>+     - Actual number of dx_entries that follow this header, plus 1 for the</div><div class='ctx'>        header itself.</div><div class='ctx'>    * - 0x24</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - block</div><div class='ctx'>      - The block number (within the directory file) that goes with hash=0.</div><div class='ctx'>    * - 0x28</div><div class='del'>-     - struct dx\_entry</div><div class='add'>+     - struct dx_entry</div><div class='ctx'>      - entries[0]</div><div class='ctx'>      - As many 8-byte ``struct dx_entry`` as fits in the rest of the data block.</div><div class='ctx'> </div><div class='hunk'>@@ -362,38 +362,38 @@ also the full length of a data block:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - fake.inode</div><div class='ctx'>      - Zero, to make it look like this entry is not in use.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - fake.rec\_len</div><div class='del'>-     - The size of the block, in order to hide all of the dx\_node data.</div><div class='add'>+     - __le16</div><div class='add'>+     - fake.rec_len</div><div class='add'>+     - The size of the block, in order to hide all of the dx_node data.</div><div class='ctx'>    * - 0x6</div><div class='ctx'>      - u8</div><div class='del'>-     - name\_len</div><div class='add'>+     - name_len</div><div class='ctx'>      - Zero. There is no name for this “unused” directory entry.</div><div class='ctx'>    * - 0x7</div><div class='ctx'>      - u8</div><div class='del'>-     - file\_type</div><div class='add'>+     - file_type</div><div class='ctx'>      - Zero. There is no file type for this “unused” directory entry.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le16</div><div class='add'>+     - __le16</div><div class='ctx'>      - limit</div><div class='del'>-     - Maximum number of dx\_entries that can follow this header, plus 1 for</div><div class='add'>+     - Maximum number of dx_entries that can follow this header, plus 1 for</div><div class='ctx'>        the header itself.</div><div class='ctx'>    * - 0xA</div><div class='del'>-     - \_\_le16</div><div class='add'>+     - __le16</div><div class='ctx'>      - count</div><div class='del'>-     - Actual number of dx\_entries that follow this header, plus 1 for the</div><div class='add'>+     - Actual number of dx_entries that follow this header, plus 1 for the</div><div class='ctx'>        header itself.</div><div class='ctx'>    * - 0xE</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - block</div><div class='ctx'>      - The block number (within the directory file) that goes with the lowest</div><div class='ctx'>        hash value of this block. This value is stored in the parent block.</div><div class='ctx'>    * - 0x12</div><div class='del'>-     - struct dx\_entry</div><div class='add'>+     - struct dx_entry</div><div class='ctx'>      - entries[0]</div><div class='ctx'>      - As many 8-byte ``struct dx_entry`` as fits in the rest of the data block.</div><div class='ctx'> </div><div class='hunk'>@@ -410,11 +410,11 @@ long:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - hash</div><div class='ctx'>      - Hash code.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='add'>+     - __le32</div><div class='ctx'>      - block</div><div class='ctx'>      - Block number (within the directory file, not filesystem blocks) of the</div><div class='ctx'>        next node in the htree.</div><div class='hunk'>@@ -423,13 +423,13 @@ long:</div><div class='ctx'> author.)</div><div class='ctx'> </div><div class='ctx'> If metadata checksums are enabled, the last 8 bytes of the directory</div><div class='del'>-block (precisely the length of one dx\_entry) are used to store a</div><div class='add'>+block (precisely the length of one dx_entry) are used to store a</div><div class='ctx'> ``struct dx_tail``, which contains the checksum. The ``limit`` and</div><div class='del'>-``count`` entries in the dx\_root/dx\_node structures are adjusted as</div><div class='del'>-necessary to fit the dx\_tail into the block. If there is no space for</div><div class='del'>-the dx\_tail, the user is notified to run e2fsck -D to rebuild the</div><div class='add'>+``count`` entries in the dx_root/dx_node structures are adjusted as</div><div class='add'>+necessary to fit the dx_tail into the block. If there is no space for</div><div class='add'>+the dx_tail, the user is notified to run e2fsck -D to rebuild the</div><div class='ctx'> directory index (which will ensure that there's space for the checksum.</div><div class='del'>-The dx\_tail structure is 8 bytes long and looks like this:</div><div class='add'>+The dx_tail structure is 8 bytes long and looks like this:</div><div class='ctx'> </div><div class='ctx'> .. list-table::</div><div class='ctx'>    :widths: 8 8 24 40</div><div class='hunk'>@@ -441,13 +441,13 @@ The dx\_tail structure is 8 bytes long and looks like this:</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='ctx'>      - u32</div><div class='del'>-     - dt\_reserved</div><div class='add'>+     - dt_reserved</div><div class='ctx'>      - Zero.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - dt\_checksum</div><div class='add'>+     - __le32</div><div class='add'>+     - dt_checksum</div><div class='ctx'>      - Checksum of the htree directory block.</div><div class='ctx'> </div><div class='ctx'> The checksum is calculated against the FS UUID, the htree index header</div><div class='del'>-(dx\_root or dx\_node), all of the htree indices (dx\_entry) that are in</div><div class='del'>-use, and the tail block (dx\_tail).</div><div class='add'>+(dx_root or dx_node), all of the htree indices (dx_entry) that are in</div><div class='add'>+use, and the tail block (dx_tail).</div><div class='head'>diff --git a/Documentation/filesystems/ext4/eainode.rst b/Documentation/filesystems/ext4/eainode.rst<br/>index ecc0d01a0a72..7a2ef26b064a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/eainode.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/eainode.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/eainode.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/eainode.rst</a></div><div class='hunk'>@@ -5,14 +5,14 @@ Large Extended Attribute Values</div><div class='ctx'> </div><div class='ctx'> To enable ext4 to store extended attribute values that do not fit in the</div><div class='ctx'> inode or in the single extended attribute block attached to an inode,</div><div class='del'>-the EA\_INODE feature allows us to store the value in the data blocks of</div><div class='add'>+the EA_INODE feature allows us to store the value in the data blocks of</div><div class='ctx'> a regular file inode. This “EA inode” is linked only from the extended</div><div class='ctx'> attribute name index and must not appear in a directory entry. The</div><div class='del'>-inode's i\_atime field is used to store a checksum of the xattr value;</div><div class='del'>-and i\_ctime/i\_version store a 64-bit reference count, which enables</div><div class='add'>+inode's i_atime field is used to store a checksum of the xattr value;</div><div class='add'>+and i_ctime/i_version store a 64-bit reference count, which enables</div><div class='ctx'> sharing of large xattr values between multiple owning inodes. For</div><div class='ctx'> backward compatibility with older versions of this feature, the</div><div class='del'>-i\_mtime/i\_generation *may* store a back-reference to the inode number</div><div class='del'>-and i\_generation of the **one** owning inode (in cases where the EA</div><div class='add'>+i_mtime/i_generation *may* store a back-reference to the inode number</div><div class='add'>+and i_generation of the **one** owning inode (in cases where the EA</div><div class='ctx'> inode is not referenced by multiple inodes) to verify that the EA inode</div><div class='ctx'> is the correct one being accessed.</div><div class='head'>diff --git a/Documentation/filesystems/ext4/group_descr.rst b/Documentation/filesystems/ext4/group_descr.rst<br/>index 7ba6114e7f5c..392ec44f8fb0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/group_descr.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/group_descr.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/group_descr.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/group_descr.rst</a></div><div class='hunk'>@@ -7,34 +7,34 @@ Each block group on the filesystem has one of these descriptors</div><div class='ctx'> associated with it. As noted in the Layout section above, the group</div><div class='ctx'> descriptors (if present) are the second item in the block group. The</div><div class='ctx'> standard configuration is for each block group to contain a full copy of</div><div class='del'>-the block group descriptor table unless the sparse\_super feature flag</div><div class='add'>+the block group descriptor table unless the sparse_super feature flag</div><div class='ctx'> is set.</div><div class='ctx'> </div><div class='ctx'> Notice how the group descriptor records the location of both bitmaps and</div><div class='ctx'> the inode table (i.e. they can float). This means that within a block</div><div class='ctx'> group, the only data structures with fixed locations are the superblock</div><div class='del'>-and the group descriptor table. The flex\_bg mechanism uses this</div><div class='add'>+and the group descriptor table. The flex_bg mechanism uses this</div><div class='ctx'> property to group several block groups into a flex group and lay out all</div><div class='ctx'> of the groups' bitmaps and inode tables into one long run in the first</div><div class='ctx'> group of the flex group.</div><div class='ctx'> </div><div class='del'>-If the meta\_bg feature flag is set, then several block groups are</div><div class='del'>-grouped together into a meta group. Note that in the meta\_bg case,</div><div class='add'>+If the meta_bg feature flag is set, then several block groups are</div><div class='add'>+grouped together into a meta group. Note that in the meta_bg case,</div><div class='ctx'> however, the first and last two block groups within the larger meta</div><div class='ctx'> group contain only group descriptors for the groups inside the meta</div><div class='ctx'> group.</div><div class='ctx'> </div><div class='del'>-flex\_bg and meta\_bg do not appear to be mutually exclusive features.</div><div class='add'>+flex_bg and meta_bg do not appear to be mutually exclusive features.</div><div class='ctx'> </div><div class='ctx'> In ext2, ext3, and ext4 (when the 64bit feature is not enabled), the</div><div class='ctx'> block group descriptor was only 32 bytes long and therefore ends at</div><div class='del'>-bg\_checksum. On an ext4 filesystem with the 64bit feature enabled, the</div><div class='add'>+bg_checksum. On an ext4 filesystem with the 64bit feature enabled, the</div><div class='ctx'> block group descriptor expands to at least the 64 bytes described below;</div><div class='ctx'> the size is stored in the superblock.</div><div class='ctx'> </div><div class='del'>-If gdt\_csum is set and metadata\_csum is not set, the block group</div><div class='add'>+If gdt_csum is set and metadata_csum is not set, the block group</div><div class='ctx'> checksum is the crc16 of the FS UUID, the group number, and the group</div><div class='del'>-descriptor structure. If metadata\_csum is set, then the block group</div><div class='add'>+descriptor structure. If metadata_csum is set, then the block group</div><div class='ctx'> checksum is the lower 16 bits of the checksum of the FS UUID, the group</div><div class='ctx'> number, and the group descriptor structure. Both block and inode bitmap</div><div class='ctx'> checksums are calculated against the FS UUID, the group number, and the</div><div class='hunk'>@@ -51,59 +51,59 @@ The block group descriptor is laid out in ``struct ext4_group_desc``.</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_block\_bitmap\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_block_bitmap_lo</div><div class='ctx'>      - Lower 32-bits of location of block bitmap.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_inode\_bitmap\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_inode_bitmap_lo</div><div class='ctx'>      - Lower 32-bits of location of inode bitmap.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_inode\_table\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_inode_table_lo</div><div class='ctx'>      - Lower 32-bits of location of inode table.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_free\_blocks\_count\_lo</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_free_blocks_count_lo</div><div class='ctx'>      - Lower 16-bits of free block count.</div><div class='ctx'>    * - 0xE</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_free\_inodes\_count\_lo</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_free_inodes_count_lo</div><div class='ctx'>      - Lower 16-bits of free inode count.</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_used\_dirs\_count\_lo</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_used_dirs_count_lo</div><div class='ctx'>      - Lower 16-bits of directory count.</div><div class='ctx'>    * - 0x12</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_flags</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_flags</div><div class='ctx'>      - Block group flags. See the bgflags_ table below.</div><div class='ctx'>    * - 0x14</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_exclude\_bitmap\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_exclude_bitmap_lo</div><div class='ctx'>      - Lower 32-bits of location of snapshot exclusion bitmap.</div><div class='ctx'>    * - 0x18</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_block\_bitmap\_csum\_lo</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_block_bitmap_csum_lo</div><div class='ctx'>      - Lower 16-bits of the block bitmap checksum.</div><div class='ctx'>    * - 0x1A</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_inode\_bitmap\_csum\_lo</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_inode_bitmap_csum_lo</div><div class='ctx'>      - Lower 16-bits of the inode bitmap checksum.</div><div class='ctx'>    * - 0x1C</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_itable\_unused\_lo</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_itable_unused_lo</div><div class='ctx'>      - Lower 16-bits of unused inode count. If set, we needn't scan past the</div><div class='del'>-       ``(sb.s_inodes_per_group - gdt.bg_itable_unused)``\ th entry in the</div><div class='add'>+       ``(sb.s_inodes_per_group - gdt.bg_itable_unused)`` th entry in the</div><div class='ctx'>        inode table for this group.</div><div class='ctx'>    * - 0x1E</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_checksum</div><div class='del'>-     - Group descriptor checksum; crc16(sb\_uuid+group\_num+bg\_desc) if the</div><div class='del'>-       RO\_COMPAT\_GDT\_CSUM feature is set, or</div><div class='del'>-       crc32c(sb\_uuid+group\_num+bg\_desc) &amp; 0xFFFF if the</div><div class='del'>-       RO\_COMPAT\_METADATA\_CSUM feature is set.  The bg\_checksum</div><div class='del'>-       field in bg\_desc is skipped when calculating crc16 checksum,</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_checksum</div><div class='add'>+     - Group descriptor checksum; crc16(sb_uuid+group_num+bg_desc) if the</div><div class='add'>+       RO_COMPAT_GDT_CSUM feature is set, or</div><div class='add'>+       crc32c(sb_uuid+group_num+bg_desc) &amp; 0xFFFF if the</div><div class='add'>+       RO_COMPAT_METADATA_CSUM feature is set.  The bg_checksum</div><div class='add'>+       field in bg_desc is skipped when calculating crc16 checksum,</div><div class='ctx'>        and set to zero if crc32c checksum is used.</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='hunk'>@@ -111,48 +111,48 @@ The block group descriptor is laid out in ``struct ext4_group_desc``.</div><div class='ctx'>      - These fields only exist if the 64bit feature is enabled and s_desc_size</div><div class='ctx'>        &gt; 32.</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_block\_bitmap\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_block_bitmap_hi</div><div class='ctx'>      - Upper 32-bits of location of block bitmap.</div><div class='ctx'>    * - 0x24</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_inode\_bitmap\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_inode_bitmap_hi</div><div class='ctx'>      - Upper 32-bits of location of inodes bitmap.</div><div class='ctx'>    * - 0x28</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_inode\_table\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_inode_table_hi</div><div class='ctx'>      - Upper 32-bits of location of inodes table.</div><div class='ctx'>    * - 0x2C</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_free\_blocks\_count\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_free_blocks_count_hi</div><div class='ctx'>      - Upper 16-bits of free block count.</div><div class='ctx'>    * - 0x2E</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_free\_inodes\_count\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_free_inodes_count_hi</div><div class='ctx'>      - Upper 16-bits of free inode count.</div><div class='ctx'>    * - 0x30</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_used\_dirs\_count\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_used_dirs_count_hi</div><div class='ctx'>      - Upper 16-bits of directory count.</div><div class='ctx'>    * - 0x32</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_itable\_unused\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_itable_unused_hi</div><div class='ctx'>      - Upper 16-bits of unused inode count.</div><div class='ctx'>    * - 0x34</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - bg\_exclude\_bitmap\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - bg_exclude_bitmap_hi</div><div class='ctx'>      - Upper 32-bits of location of snapshot exclusion bitmap.</div><div class='ctx'>    * - 0x38</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_block\_bitmap\_csum\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_block_bitmap_csum_hi</div><div class='ctx'>      - Upper 16-bits of the block bitmap checksum.</div><div class='ctx'>    * - 0x3A</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - bg\_inode\_bitmap\_csum\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - bg_inode_bitmap_csum_hi</div><div class='ctx'>      - Upper 16-bits of the inode bitmap checksum.</div><div class='ctx'>    * - 0x3C</div><div class='del'>-     - \_\_u32</div><div class='del'>-     - bg\_reserved</div><div class='add'>+     - __u32</div><div class='add'>+     - bg_reserved</div><div class='ctx'>      - Padding to 64 bytes.</div><div class='ctx'> </div><div class='ctx'> .. _bgflags:</div><div class='hunk'>@@ -166,8 +166,8 @@ Block group flags can be any combination of the following:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='del'>-     - inode table and bitmap are not initialized (EXT4\_BG\_INODE\_UNINIT).</div><div class='add'>+     - inode table and bitmap are not initialized (EXT4_BG_INODE_UNINIT).</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - block bitmap is not initialized (EXT4\_BG\_BLOCK\_UNINIT).</div><div class='add'>+     - block bitmap is not initialized (EXT4_BG_BLOCK_UNINIT).</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - inode table is zeroed (EXT4\_BG\_INODE\_ZEROED).</div><div class='add'>+     - inode table is zeroed (EXT4_BG_INODE_ZEROED).</div><div class='head'>diff --git a/Documentation/filesystems/ext4/ifork.rst b/Documentation/filesystems/ext4/ifork.rst<br/>index b9816d5a896b..dc31f505e6c8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/ifork.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/ifork.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/ifork.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/ifork.rst</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-The Contents of inode.i\_block</div><div class='add'>+The Contents of inode.i_block</div><div class='ctx'> ------------------------------</div><div class='ctx'> </div><div class='ctx'> Depending on the type of file an inode describes, the 60 bytes of</div><div class='hunk'>@@ -47,7 +47,7 @@ In ext4, the file to logical block map has been replaced with an extent</div><div class='ctx'> tree. Under the old scheme, allocating a contiguous run of 1,000 blocks</div><div class='ctx'> requires an indirect block to map all 1,000 entries; with extents, the</div><div class='ctx'> mapping is reduced to a single ``struct ext4_extent`` with</div><div class='del'>-``ee_len = 1000``. If flex\_bg is enabled, it is possible to allocate</div><div class='add'>+``ee_len = 1000``. If flex_bg is enabled, it is possible to allocate</div><div class='ctx'> very large files with a single extent, at a considerable reduction in</div><div class='ctx'> metadata block use, and some improvement in disk efficiency. The inode</div><div class='ctx'> must have the extents flag (0x80000) flag set for this feature to be in</div><div class='hunk'>@@ -76,28 +76,28 @@ which is 12 bytes long:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - eh\_magic</div><div class='add'>+     - __le16</div><div class='add'>+     - eh_magic</div><div class='ctx'>      - Magic number, 0xF30A.</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - eh\_entries</div><div class='add'>+     - __le16</div><div class='add'>+     - eh_entries</div><div class='ctx'>      - Number of valid entries following the header.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - eh\_max</div><div class='add'>+     - __le16</div><div class='add'>+     - eh_max</div><div class='ctx'>      - Maximum number of entries that could follow the header.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - eh\_depth</div><div class='add'>+     - __le16</div><div class='add'>+     - eh_depth</div><div class='ctx'>      - Depth of this extent node in the extent tree. 0 = this extent node</div><div class='ctx'>        points to data blocks; otherwise, this extent node points to other</div><div class='ctx'>        extent nodes. The extent tree can be at most 5 levels deep: a logical</div><div class='ctx'>        block number can be at most ``2^32``, and the smallest ``n`` that</div><div class='ctx'>        satisfies ``4*(((blocksize - 12)/12)^n) &gt;= 2^32`` is 5.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - eh\_generation</div><div class='add'>+     - __le32</div><div class='add'>+     - eh_generation</div><div class='ctx'>      - Generation of the tree. (Used by Lustre, but not standard ext4).</div><div class='ctx'> </div><div class='ctx'> Internal nodes of the extent tree, also known as index nodes, are</div><div class='hunk'>@@ -112,22 +112,22 @@ recorded as ``struct ext4_extent_idx``, and are 12 bytes long:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - ei\_block</div><div class='add'>+     - __le32</div><div class='add'>+     - ei_block</div><div class='ctx'>      - This index node covers file blocks from 'block' onward.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - ei\_leaf\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - ei_leaf_lo</div><div class='ctx'>      - Lower 32-bits of the block number of the extent node that is the next</div><div class='ctx'>        level lower in the tree. The tree node pointed to can be either another</div><div class='ctx'>        internal node or a leaf node, described below.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - ei\_leaf\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - ei_leaf_hi</div><div class='ctx'>      - Upper 16-bits of the previous field.</div><div class='ctx'>    * - 0xA</div><div class='del'>-     - \_\_u16</div><div class='del'>-     - ei\_unused</div><div class='add'>+     - __u16</div><div class='add'>+     - ei_unused</div><div class='ctx'>      -</div><div class='ctx'> </div><div class='ctx'> Leaf nodes of the extent tree are recorded as ``struct ext4_extent``,</div><div class='hunk'>@@ -142,24 +142,24 @@ and are also 12 bytes long:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - ee\_block</div><div class='add'>+     - __le32</div><div class='add'>+     - ee_block</div><div class='ctx'>      - First file block number that this extent covers.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - ee\_len</div><div class='add'>+     - __le16</div><div class='add'>+     - ee_len</div><div class='ctx'>      - Number of blocks covered by extent. If the value of this field is &lt;=</div><div class='ctx'>        32768, the extent is initialized. If the value of the field is &gt; 32768,</div><div class='ctx'>        the extent is uninitialized and the actual extent length is ``ee_len`` -</div><div class='ctx'>        32768. Therefore, the maximum length of a initialized extent is 32768</div><div class='ctx'>        blocks, and the maximum length of an uninitialized extent is 32767.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - ee\_start\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - ee_start_hi</div><div class='ctx'>      - Upper 16-bits of the block number to which this extent points.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - ee\_start\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - ee_start_lo</div><div class='ctx'>      - Lower 32-bits of the block number to which this extent points.</div><div class='ctx'> </div><div class='ctx'> Prior to the introduction of metadata checksums, the extent header +</div><div class='hunk'>@@ -182,8 +182,8 @@ including) the checksum itself.</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - eb\_checksum</div><div class='add'>+     - __le32</div><div class='add'>+     - eb_checksum</div><div class='ctx'>      - Checksum of the extent block, crc32c(uuid+inum+igeneration+extentblock)</div><div class='ctx'> </div><div class='ctx'> Inline Data</div><div class='head'>diff --git a/Documentation/filesystems/ext4/inlinedata.rst b/Documentation/filesystems/ext4/inlinedata.rst<br/>index d1075178ce0b..a728af0d2fd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/inlinedata.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/inlinedata.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/inlinedata.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/inlinedata.rst</a></div><div class='hunk'>@@ -11,12 +11,12 @@ file is smaller than 60 bytes, then the data are stored inline in</div><div class='ctx'> attribute space, then it might be found as an extended attribute</div><div class='ctx'> “system.data” within the inode body (“ibody EA”). This of course</div><div class='ctx'> constrains the amount of extended attributes one can attach to an inode.</div><div class='del'>-If the data size increases beyond i\_block + ibody EA, a regular block</div><div class='add'>+If the data size increases beyond i_block + ibody EA, a regular block</div><div class='ctx'> is allocated and the contents moved to that block.</div><div class='ctx'> </div><div class='ctx'> Pending a change to compact the extended attribute key used to store</div><div class='ctx'> inline data, one ought to be able to store 160 bytes of data in a</div><div class='del'>-256-byte inode (as of June 2015, when i\_extra\_isize is 28). Prior to</div><div class='add'>+256-byte inode (as of June 2015, when i_extra_isize is 28). Prior to</div><div class='ctx'> that, the limit was 156 bytes due to inefficient use of inode space.</div><div class='ctx'> </div><div class='ctx'> The inline data feature requires the presence of an extended attribute</div><div class='hunk'>@@ -25,12 +25,12 @@ for “system.data”, even if the attribute value is zero length.</div><div class='ctx'> Inline Directories</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-The first four bytes of i\_block are the inode number of the parent</div><div class='add'>+The first four bytes of i_block are the inode number of the parent</div><div class='ctx'> directory. Following that is a 56-byte space for an array of directory</div><div class='ctx'> entries; see ``struct ext4_dir_entry``. If there is a “system.data”</div><div class='ctx'> attribute in the inode body, the EA value is an array of</div><div class='ctx'> ``struct ext4_dir_entry`` as well. Note that for inline directories, the</div><div class='del'>-i\_block and EA space are treated as separate dirent blocks; directory</div><div class='add'>+i_block and EA space are treated as separate dirent blocks; directory</div><div class='ctx'> entries cannot span the two.</div><div class='ctx'> </div><div class='ctx'> Inline directory entries are not checksummed, as the inode checksum</div><div class='head'>diff --git a/Documentation/filesystems/ext4/inodes.rst b/Documentation/filesystems/ext4/inodes.rst<br/>index 6c5ce666e63f..cfc6c1659931 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/inodes.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/inodes.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/inodes.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/inodes.rst</a></div><div class='hunk'>@@ -38,138 +38,138 @@ The inode table entry is laid out in ``struct ext4_inode``.</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - i\_mode</div><div class='add'>+     - __le16</div><div class='add'>+     - i_mode</div><div class='ctx'>      - File mode. See the table i_mode_ below.</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - i\_uid</div><div class='add'>+     - __le16</div><div class='add'>+     - i_uid</div><div class='ctx'>      - Lower 16-bits of Owner UID.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_size\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - i_size_lo</div><div class='ctx'>      - Lower 32-bits of size in bytes.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_atime</div><div class='del'>-     - Last access time, in seconds since the epoch. However, if the EA\_INODE</div><div class='add'>+     - __le32</div><div class='add'>+     - i_atime</div><div class='add'>+     - Last access time, in seconds since the epoch. However, if the EA_INODE</div><div class='ctx'>        inode flag is set, this inode stores an extended attribute value and</div><div class='ctx'>        this field contains the checksum of the value.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_ctime</div><div class='add'>+     - __le32</div><div class='add'>+     - i_ctime</div><div class='ctx'>      - Last inode change time, in seconds since the epoch. However, if the</div><div class='del'>-       EA\_INODE inode flag is set, this inode stores an extended attribute</div><div class='add'>+       EA_INODE inode flag is set, this inode stores an extended attribute</div><div class='ctx'>        value and this field contains the lower 32 bits of the attribute value's</div><div class='ctx'>        reference count.</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_mtime</div><div class='add'>+     - __le32</div><div class='add'>+     - i_mtime</div><div class='ctx'>      - Last data modification time, in seconds since the epoch. However, if the</div><div class='del'>-       EA\_INODE inode flag is set, this inode stores an extended attribute</div><div class='add'>+       EA_INODE inode flag is set, this inode stores an extended attribute</div><div class='ctx'>        value and this field contains the number of the inode that owns the</div><div class='ctx'>        extended attribute.</div><div class='ctx'>    * - 0x14</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_dtime</div><div class='add'>+     - __le32</div><div class='add'>+     - i_dtime</div><div class='ctx'>      - Deletion Time, in seconds since the epoch.</div><div class='ctx'>    * - 0x18</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - i\_gid</div><div class='add'>+     - __le16</div><div class='add'>+     - i_gid</div><div class='ctx'>      - Lower 16-bits of GID.</div><div class='ctx'>    * - 0x1A</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - i\_links\_count</div><div class='add'>+     - __le16</div><div class='add'>+     - i_links_count</div><div class='ctx'>      - Hard link count. Normally, ext4 does not permit an inode to have more</div><div class='ctx'>        than 65,000 hard links. This applies to files as well as directories,</div><div class='ctx'>        which means that there cannot be more than 64,998 subdirectories in a</div><div class='ctx'>        directory (each subdirectory's '..' entry counts as a hard link, as does</div><div class='del'>-       the '.' entry in the directory itself). With the DIR\_NLINK feature</div><div class='add'>+       the '.' entry in the directory itself). With the DIR_NLINK feature</div><div class='ctx'>        enabled, ext4 supports more than 64,998 subdirectories by setting this</div><div class='ctx'>        field to 1 to indicate that the number of hard links is not known.</div><div class='ctx'>    * - 0x1C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_blocks\_lo</div><div class='del'>-     - Lower 32-bits of “block” count. If the huge\_file feature flag is not</div><div class='add'>+     - __le32</div><div class='add'>+     - i_blocks_lo</div><div class='add'>+     - Lower 32-bits of “block” count. If the huge_file feature flag is not</div><div class='ctx'>        set on the filesystem, the file consumes ``i_blocks_lo`` 512-byte blocks</div><div class='del'>-       on disk. If huge\_file is set and EXT4\_HUGE\_FILE\_FL is NOT set in</div><div class='add'>+       on disk. If huge_file is set and EXT4_HUGE_FILE_FL is NOT set in</div><div class='ctx'>        ``inode.i_flags``, then the file consumes ``i_blocks_lo + (i_blocks_hi</div><div class='del'>-       &lt;&lt; 32)`` 512-byte blocks on disk. If huge\_file is set and</div><div class='del'>-       EXT4\_HUGE\_FILE\_FL IS set in ``inode.i_flags``, then this file</div><div class='add'>+       &lt;&lt; 32)`` 512-byte blocks on disk. If huge_file is set and</div><div class='add'>+       EXT4_HUGE_FILE_FL IS set in ``inode.i_flags``, then this file</div><div class='ctx'>        consumes (``i_blocks_lo + i_blocks_hi`` &lt;&lt; 32) filesystem blocks on</div><div class='ctx'>        disk.</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_flags</div><div class='add'>+     - __le32</div><div class='add'>+     - i_flags</div><div class='ctx'>      - Inode flags. See the table i_flags_ below.</div><div class='ctx'>    * - 0x24</div><div class='ctx'>      - 4 bytes</div><div class='del'>-     - i\_osd1</div><div class='add'>+     - i_osd1</div><div class='ctx'>      - See the table i_osd1_ for more details.</div><div class='ctx'>    * - 0x28</div><div class='ctx'>      - 60 bytes</div><div class='del'>-     - i\_block[EXT4\_N\_BLOCKS=15]</div><div class='del'>-     - Block map or extent tree. See the section “The Contents of inode.i\_block”.</div><div class='add'>+     - i_block[EXT4_N_BLOCKS=15]</div><div class='add'>+     - Block map or extent tree. See the section “The Contents of inode.i_block”.</div><div class='ctx'>    * - 0x64</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_generation</div><div class='add'>+     - __le32</div><div class='add'>+     - i_generation</div><div class='ctx'>      - File version (for NFS).</div><div class='ctx'>    * - 0x68</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_file\_acl\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - i_file_acl_lo</div><div class='ctx'>      - Lower 32-bits of extended attribute block. ACLs are of course one of</div><div class='ctx'>        many possible extended attributes; I think the name of this field is a</div><div class='ctx'>        result of the first use of extended attributes being for ACLs.</div><div class='ctx'>    * - 0x6C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_size\_high / i\_dir\_acl</div><div class='add'>+     - __le32</div><div class='add'>+     - i_size_high / i_dir_acl</div><div class='ctx'>      - Upper 32-bits of file/directory size. In ext2/3 this field was named</div><div class='del'>-       i\_dir\_acl, though it was usually set to zero and never used.</div><div class='add'>+       i_dir_acl, though it was usually set to zero and never used.</div><div class='ctx'>    * - 0x70</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_obso\_faddr</div><div class='add'>+     - __le32</div><div class='add'>+     - i_obso_faddr</div><div class='ctx'>      - (Obsolete) fragment address.</div><div class='ctx'>    * - 0x74</div><div class='ctx'>      - 12 bytes</div><div class='del'>-     - i\_osd2</div><div class='add'>+     - i_osd2</div><div class='ctx'>      - See the table i_osd2_ for more details.</div><div class='ctx'>    * - 0x80</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - i\_extra\_isize</div><div class='add'>+     - __le16</div><div class='add'>+     - i_extra_isize</div><div class='ctx'>      - Size of this inode - 128. Alternately, the size of the extended inode</div><div class='ctx'>        fields beyond the original ext2 inode, including this field.</div><div class='ctx'>    * - 0x82</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - i\_checksum\_hi</div><div class='add'>+     - __le16</div><div class='add'>+     - i_checksum_hi</div><div class='ctx'>      - Upper 16-bits of the inode checksum.</div><div class='ctx'>    * - 0x84</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_ctime\_extra</div><div class='add'>+     - __le32</div><div class='add'>+     - i_ctime_extra</div><div class='ctx'>      - Extra change time bits. This provides sub-second precision. See Inode</div><div class='ctx'>        Timestamps section.</div><div class='ctx'>    * - 0x88</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_mtime\_extra</div><div class='add'>+     - __le32</div><div class='add'>+     - i_mtime_extra</div><div class='ctx'>      - Extra modification time bits. This provides sub-second precision.</div><div class='ctx'>    * - 0x8C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_atime\_extra</div><div class='add'>+     - __le32</div><div class='add'>+     - i_atime_extra</div><div class='ctx'>      - Extra access time bits. This provides sub-second precision.</div><div class='ctx'>    * - 0x90</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_crtime</div><div class='add'>+     - __le32</div><div class='add'>+     - i_crtime</div><div class='ctx'>      - File creation time, in seconds since the epoch.</div><div class='ctx'>    * - 0x94</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_crtime\_extra</div><div class='add'>+     - __le32</div><div class='add'>+     - i_crtime_extra</div><div class='ctx'>      - Extra file creation time bits. This provides sub-second precision.</div><div class='ctx'>    * - 0x98</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_version\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - i_version_hi</div><div class='ctx'>      - Upper 32-bits for version number.</div><div class='ctx'>    * - 0x9C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - i\_projid</div><div class='add'>+     - __le32</div><div class='add'>+     - i_projid</div><div class='ctx'>      - Project ID.</div><div class='ctx'> </div><div class='ctx'> .. _i_mode:</div><div class='hunk'>@@ -183,45 +183,45 @@ The ``i_mode`` value is a combination of the following flags:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='del'>-     - S\_IXOTH (Others may execute)</div><div class='add'>+     - S_IXOTH (Others may execute)</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - S\_IWOTH (Others may write)</div><div class='add'>+     - S_IWOTH (Others may write)</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - S\_IROTH (Others may read)</div><div class='add'>+     - S_IROTH (Others may read)</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - S\_IXGRP (Group members may execute)</div><div class='add'>+     - S_IXGRP (Group members may execute)</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - S\_IWGRP (Group members may write)</div><div class='add'>+     - S_IWGRP (Group members may write)</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - S\_IRGRP (Group members may read)</div><div class='add'>+     - S_IRGRP (Group members may read)</div><div class='ctx'>    * - 0x40</div><div class='del'>-     - S\_IXUSR (Owner may execute)</div><div class='add'>+     - S_IXUSR (Owner may execute)</div><div class='ctx'>    * - 0x80</div><div class='del'>-     - S\_IWUSR (Owner may write)</div><div class='add'>+     - S_IWUSR (Owner may write)</div><div class='ctx'>    * - 0x100</div><div class='del'>-     - S\_IRUSR (Owner may read)</div><div class='add'>+     - S_IRUSR (Owner may read)</div><div class='ctx'>    * - 0x200</div><div class='del'>-     - S\_ISVTX (Sticky bit)</div><div class='add'>+     - S_ISVTX (Sticky bit)</div><div class='ctx'>    * - 0x400</div><div class='del'>-     - S\_ISGID (Set GID)</div><div class='add'>+     - S_ISGID (Set GID)</div><div class='ctx'>    * - 0x800</div><div class='del'>-     - S\_ISUID (Set UID)</div><div class='add'>+     - S_ISUID (Set UID)</div><div class='ctx'>    * -</div><div class='ctx'>      - These are mutually-exclusive file types:</div><div class='ctx'>    * - 0x1000</div><div class='del'>-     - S\_IFIFO (FIFO)</div><div class='add'>+     - S_IFIFO (FIFO)</div><div class='ctx'>    * - 0x2000</div><div class='del'>-     - S\_IFCHR (Character device)</div><div class='add'>+     - S_IFCHR (Character device)</div><div class='ctx'>    * - 0x4000</div><div class='del'>-     - S\_IFDIR (Directory)</div><div class='add'>+     - S_IFDIR (Directory)</div><div class='ctx'>    * - 0x6000</div><div class='del'>-     - S\_IFBLK (Block device)</div><div class='add'>+     - S_IFBLK (Block device)</div><div class='ctx'>    * - 0x8000</div><div class='del'>-     - S\_IFREG (Regular file)</div><div class='add'>+     - S_IFREG (Regular file)</div><div class='ctx'>    * - 0xA000</div><div class='del'>-     - S\_IFLNK (Symbolic link)</div><div class='add'>+     - S_IFLNK (Symbolic link)</div><div class='ctx'>    * - 0xC000</div><div class='del'>-     - S\_IFSOCK (Socket)</div><div class='add'>+     - S_IFSOCK (Socket)</div><div class='ctx'> </div><div class='ctx'> .. _i_flags:</div><div class='ctx'> </div><div class='hunk'>@@ -234,56 +234,56 @@ The ``i_flags`` field is a combination of these values:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='del'>-     - This file requires secure deletion (EXT4\_SECRM\_FL). (not implemented)</div><div class='add'>+     - This file requires secure deletion (EXT4_SECRM_FL). (not implemented)</div><div class='ctx'>    * - 0x2</div><div class='ctx'>      - This file should be preserved, should undeletion be desired</div><div class='del'>-       (EXT4\_UNRM\_FL). (not implemented)</div><div class='add'>+       (EXT4_UNRM_FL). (not implemented)</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - File is compressed (EXT4\_COMPR\_FL). (not really implemented)</div><div class='add'>+     - File is compressed (EXT4_COMPR_FL). (not really implemented)</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - All writes to the file must be synchronous (EXT4\_SYNC\_FL).</div><div class='add'>+     - All writes to the file must be synchronous (EXT4_SYNC_FL).</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - File is immutable (EXT4\_IMMUTABLE\_FL).</div><div class='add'>+     - File is immutable (EXT4_IMMUTABLE_FL).</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - File can only be appended (EXT4\_APPEND\_FL).</div><div class='add'>+     - File can only be appended (EXT4_APPEND_FL).</div><div class='ctx'>    * - 0x40</div><div class='del'>-     - The dump(1) utility should not dump this file (EXT4\_NODUMP\_FL).</div><div class='add'>+     - The dump(1) utility should not dump this file (EXT4_NODUMP_FL).</div><div class='ctx'>    * - 0x80</div><div class='del'>-     - Do not update access time (EXT4\_NOATIME\_FL).</div><div class='add'>+     - Do not update access time (EXT4_NOATIME_FL).</div><div class='ctx'>    * - 0x100</div><div class='del'>-     - Dirty compressed file (EXT4\_DIRTY\_FL). (not used)</div><div class='add'>+     - Dirty compressed file (EXT4_DIRTY_FL). (not used)</div><div class='ctx'>    * - 0x200</div><div class='del'>-     - File has one or more compressed clusters (EXT4\_COMPRBLK\_FL). (not used)</div><div class='add'>+     - File has one or more compressed clusters (EXT4_COMPRBLK_FL). (not used)</div><div class='ctx'>    * - 0x400</div><div class='del'>-     - Do not compress file (EXT4\_NOCOMPR\_FL). (not used)</div><div class='add'>+     - Do not compress file (EXT4_NOCOMPR_FL). (not used)</div><div class='ctx'>    * - 0x800</div><div class='del'>-     - Encrypted inode (EXT4\_ENCRYPT\_FL). This bit value previously was</div><div class='del'>-       EXT4\_ECOMPR\_FL (compression error), which was never used.</div><div class='add'>+     - Encrypted inode (EXT4_ENCRYPT_FL). This bit value previously was</div><div class='add'>+       EXT4_ECOMPR_FL (compression error), which was never used.</div><div class='ctx'>    * - 0x1000</div><div class='del'>-     - Directory has hashed indexes (EXT4\_INDEX\_FL).</div><div class='add'>+     - Directory has hashed indexes (EXT4_INDEX_FL).</div><div class='ctx'>    * - 0x2000</div><div class='del'>-     - AFS magic directory (EXT4\_IMAGIC\_FL).</div><div class='add'>+     - AFS magic directory (EXT4_IMAGIC_FL).</div><div class='ctx'>    * - 0x4000</div><div class='ctx'>      - File data must always be written through the journal</div><div class='del'>-       (EXT4\_JOURNAL\_DATA\_FL).</div><div class='add'>+       (EXT4_JOURNAL_DATA_FL).</div><div class='ctx'>    * - 0x8000</div><div class='del'>-     - File tail should not be merged (EXT4\_NOTAIL\_FL). (not used by ext4)</div><div class='add'>+     - File tail should not be merged (EXT4_NOTAIL_FL). (not used by ext4)</div><div class='ctx'>    * - 0x10000</div><div class='ctx'>      - All directory entry data should be written synchronously (see</div><div class='del'>-       ``dirsync``) (EXT4\_DIRSYNC\_FL).</div><div class='add'>+       ``dirsync``) (EXT4_DIRSYNC_FL).</div><div class='ctx'>    * - 0x20000</div><div class='del'>-     - Top of directory hierarchy (EXT4\_TOPDIR\_FL).</div><div class='add'>+     - Top of directory hierarchy (EXT4_TOPDIR_FL).</div><div class='ctx'>    * - 0x40000</div><div class='del'>-     - This is a huge file (EXT4\_HUGE\_FILE\_FL).</div><div class='add'>+     - This is a huge file (EXT4_HUGE_FILE_FL).</div><div class='ctx'>    * - 0x80000</div><div class='del'>-     - Inode uses extents (EXT4\_EXTENTS\_FL).</div><div class='add'>+     - Inode uses extents (EXT4_EXTENTS_FL).</div><div class='ctx'>    * - 0x100000</div><div class='del'>-     - Verity protected file (EXT4\_VERITY\_FL).</div><div class='add'>+     - Verity protected file (EXT4_VERITY_FL).</div><div class='ctx'>    * - 0x200000</div><div class='ctx'>      - Inode stores a large extended attribute value in its data blocks</div><div class='del'>-       (EXT4\_EA\_INODE\_FL).</div><div class='add'>+       (EXT4_EA_INODE_FL).</div><div class='ctx'>    * - 0x400000</div><div class='del'>-     - This file has blocks allocated past EOF (EXT4\_EOFBLOCKS\_FL).</div><div class='add'>+     - This file has blocks allocated past EOF (EXT4_EOFBLOCKS_FL).</div><div class='ctx'>        (deprecated)</div><div class='ctx'>    * - 0x01000000</div><div class='ctx'>      - Inode is a snapshot (``EXT4_SNAPFILE_FL``). (not in mainline)</div><div class='hunk'>@@ -294,21 +294,21 @@ The ``i_flags`` field is a combination of these values:</div><div class='ctx'>      - Snapshot shrink has completed (``EXT4_SNAPFILE_SHRUNK_FL``). (not in</div><div class='ctx'>        mainline)</div><div class='ctx'>    * - 0x10000000</div><div class='del'>-     - Inode has inline data (EXT4\_INLINE\_DATA\_FL).</div><div class='add'>+     - Inode has inline data (EXT4_INLINE_DATA_FL).</div><div class='ctx'>    * - 0x20000000</div><div class='del'>-     - Create children with the same project ID (EXT4\_PROJINHERIT\_FL).</div><div class='add'>+     - Create children with the same project ID (EXT4_PROJINHERIT_FL).</div><div class='ctx'>    * - 0x80000000</div><div class='del'>-     - Reserved for ext4 library (EXT4\_RESERVED\_FL).</div><div class='add'>+     - Reserved for ext4 library (EXT4_RESERVED_FL).</div><div class='ctx'>    * -</div><div class='ctx'>      - Aggregate flags:</div><div class='ctx'>    * - 0x705BDFFF</div><div class='ctx'>      - User-visible flags.</div><div class='ctx'>    * - 0x604BC0FF</div><div class='del'>-     - User-modifiable flags. Note that while EXT4\_JOURNAL\_DATA\_FL and</div><div class='del'>-       EXT4\_EXTENTS\_FL can be set with setattr, they are not in the kernel's</div><div class='del'>-       EXT4\_FL\_USER\_MODIFIABLE mask, since it needs to handle the setting of</div><div class='add'>+     - User-modifiable flags. Note that while EXT4_JOURNAL_DATA_FL and</div><div class='add'>+       EXT4_EXTENTS_FL can be set with setattr, they are not in the kernel's</div><div class='add'>+       EXT4_FL_USER_MODIFIABLE mask, since it needs to handle the setting of</div><div class='ctx'>        these flags in a special manner and they are masked out of the set of</div><div class='del'>-       flags that are saved directly to i\_flags.</div><div class='add'>+       flags that are saved directly to i_flags.</div><div class='ctx'> </div><div class='ctx'> .. _i_osd1:</div><div class='ctx'> </div><div class='hunk'>@@ -325,9 +325,9 @@ Linux:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - l\_i\_version</div><div class='del'>-     - Inode version. However, if the EA\_INODE inode flag is set, this inode</div><div class='add'>+     - __le32</div><div class='add'>+     - l_i_version</div><div class='add'>+     - Inode version. However, if the EA_INODE inode flag is set, this inode</div><div class='ctx'>        stores an extended attribute value and this field contains the upper 32</div><div class='ctx'>        bits of the attribute value's reference count.</div><div class='ctx'> </div><div class='hunk'>@@ -342,8 +342,8 @@ Hurd:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - h\_i\_translator</div><div class='add'>+     - __le32</div><div class='add'>+     - h_i_translator</div><div class='ctx'>      - ??</div><div class='ctx'> </div><div class='ctx'> Masix:</div><div class='hunk'>@@ -357,8 +357,8 @@ Masix:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - m\_i\_reserved</div><div class='add'>+     - __le32</div><div class='add'>+     - m_i_reserved</div><div class='ctx'>      - ??</div><div class='ctx'> </div><div class='ctx'> .. _i_osd2:</div><div class='hunk'>@@ -376,30 +376,30 @@ Linux:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - l\_i\_blocks\_high</div><div class='add'>+     - __le16</div><div class='add'>+     - l_i_blocks_high</div><div class='ctx'>      - Upper 16-bits of the block count. Please see the note attached to</div><div class='del'>-       i\_blocks\_lo.</div><div class='add'>+       i_blocks_lo.</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - l\_i\_file\_acl\_high</div><div class='add'>+     - __le16</div><div class='add'>+     - l_i_file_acl_high</div><div class='ctx'>      - Upper 16-bits of the extended attribute block (historically, the file</div><div class='ctx'>        ACL location). See the Extended Attributes section below.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - l\_i\_uid\_high</div><div class='add'>+     - __le16</div><div class='add'>+     - l_i_uid_high</div><div class='ctx'>      - Upper 16-bits of the Owner UID.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - l\_i\_gid\_high</div><div class='add'>+     - __le16</div><div class='add'>+     - l_i_gid_high</div><div class='ctx'>      - Upper 16-bits of the GID.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - l\_i\_checksum\_lo</div><div class='add'>+     - __le16</div><div class='add'>+     - l_i_checksum_lo</div><div class='ctx'>      - Lower 16-bits of the inode checksum.</div><div class='ctx'>    * - 0xA</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - l\_i\_reserved</div><div class='add'>+     - __le16</div><div class='add'>+     - l_i_reserved</div><div class='ctx'>      - Unused.</div><div class='ctx'> </div><div class='ctx'> Hurd:</div><div class='hunk'>@@ -413,24 +413,24 @@ Hurd:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - h\_i\_reserved1</div><div class='add'>+     - __le16</div><div class='add'>+     - h_i_reserved1</div><div class='ctx'>      - ??</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - \_\_u16</div><div class='del'>-     - h\_i\_mode\_high</div><div class='add'>+     - __u16</div><div class='add'>+     - h_i_mode_high</div><div class='ctx'>      - Upper 16-bits of the file mode.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - h\_i\_uid\_high</div><div class='add'>+     - __le16</div><div class='add'>+     - h_i_uid_high</div><div class='ctx'>      - Upper 16-bits of the Owner UID.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - h\_i\_gid\_high</div><div class='add'>+     - __le16</div><div class='add'>+     - h_i_gid_high</div><div class='ctx'>      - Upper 16-bits of the GID.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_u32</div><div class='del'>-     - h\_i\_author</div><div class='add'>+     - __u32</div><div class='add'>+     - h_i_author</div><div class='ctx'>      - Author code?</div><div class='ctx'> </div><div class='ctx'> Masix:</div><div class='hunk'>@@ -444,17 +444,17 @@ Masix:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - h\_i\_reserved1</div><div class='add'>+     - __le16</div><div class='add'>+     - h_i_reserved1</div><div class='ctx'>      - ??</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - \_\_u16</div><div class='del'>-     - m\_i\_file\_acl\_high</div><div class='add'>+     - __u16</div><div class='add'>+     - m_i_file_acl_high</div><div class='ctx'>      - Upper 16-bits of the extended attribute block (historically, the file</div><div class='ctx'>        ACL location).</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_u32</div><div class='del'>-     - m\_i\_reserved2[2]</div><div class='add'>+     - __u32</div><div class='add'>+     - m_i_reserved2[2]</div><div class='ctx'>      - ??</div><div class='ctx'> </div><div class='ctx'> Inode Size</div><div class='hunk'>@@ -466,11 +466,11 @@ In ext2 and ext3, the inode structure size was fixed at 128 bytes</div><div class='ctx'> on-disk inode at format time for all inodes in the filesystem to provide</div><div class='ctx'> space beyond the end of the original ext2 inode. The on-disk inode</div><div class='ctx'> record size is recorded in the superblock as ``s_inode_size``. The</div><div class='del'>-number of bytes actually used by struct ext4\_inode beyond the original</div><div class='add'>+number of bytes actually used by struct ext4_inode beyond the original</div><div class='ctx'> 128-byte ext2 inode is recorded in the ``i_extra_isize`` field for each</div><div class='del'>-inode, which allows struct ext4\_inode to grow for a new kernel without</div><div class='add'>+inode, which allows struct ext4_inode to grow for a new kernel without</div><div class='ctx'> having to upgrade all of the on-disk inodes. Access to fields beyond</div><div class='del'>-EXT2\_GOOD\_OLD\_INODE\_SIZE should be verified to be within</div><div class='add'>+EXT2_GOOD_OLD_INODE_SIZE should be verified to be within</div><div class='ctx'> ``i_extra_isize``. By default, ext4 inode records are 256 bytes, and (as</div><div class='ctx'> of August 2019) the inode structure is 160 bytes</div><div class='ctx'> (``i_extra_isize = 32``). The extra space between the end of the inode</div><div class='hunk'>@@ -516,7 +516,7 @@ creation time (crtime); this field is 64-bits wide and decoded in the</div><div class='ctx'> same manner as 64-bit [cma]time. Neither crtime nor dtime are accessible</div><div class='ctx'> through the regular stat() interface, though debugfs will report them.</div><div class='ctx'> </div><div class='del'>-We use the 32-bit signed time value plus (2^32 \* (extra epoch bits)).</div><div class='add'>+We use the 32-bit signed time value plus (2^32 * (extra epoch bits)).</div><div class='ctx'> In other words:</div><div class='ctx'> </div><div class='ctx'> .. list-table::</div><div class='hunk'>@@ -525,8 +525,8 @@ In other words:</div><div class='ctx'> </div><div class='ctx'>    * - Extra epoch bits</div><div class='ctx'>      - MSB of 32-bit time</div><div class='del'>-     - Adjustment for signed 32-bit to 64-bit tv\_sec</div><div class='del'>-     - Decoded 64-bit tv\_sec</div><div class='add'>+     - Adjustment for signed 32-bit to 64-bit tv_sec</div><div class='add'>+     - Decoded 64-bit tv_sec</div><div class='ctx'>      - valid time range</div><div class='ctx'>    * - 0 0</div><div class='ctx'>      - 1</div><div class='head'>diff --git a/Documentation/filesystems/ext4/journal.rst b/Documentation/filesystems/ext4/journal.rst<br/>index 5fad38860f17..a6bef5293a60 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/journal.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/journal.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/journal.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/journal.rst</a></div><div class='hunk'>@@ -63,8 +63,8 @@ Generally speaking, the journal has this format:</div><div class='ctx'>    :header-rows: 1</div><div class='ctx'> </div><div class='ctx'>    * - Superblock</div><div class='del'>-     - descriptor\_block (data\_blocks or revocation\_block) [more data or</div><div class='del'>-       revocations] commmit\_block</div><div class='add'>+     - descriptor_block (data_blocks or revocation_block) [more data or</div><div class='add'>+       revocations] commmit_block</div><div class='ctx'>      - [more transactions...]</div><div class='ctx'>    * - </div><div class='ctx'>      - One transaction</div><div class='hunk'>@@ -93,8 +93,8 @@ superblock.</div><div class='ctx'>    * - 1024 bytes of padding</div><div class='ctx'>      - ext4 Superblock</div><div class='ctx'>      - Journal Superblock</div><div class='del'>-     - descriptor\_block (data\_blocks or revocation\_block) [more data or</div><div class='del'>-       revocations] commmit\_block</div><div class='add'>+     - descriptor_block (data_blocks or revocation_block) [more data or</div><div class='add'>+       revocations] commmit_block</div><div class='ctx'>      - [more transactions...]</div><div class='ctx'>    * - </div><div class='ctx'>      -</div><div class='hunk'>@@ -117,17 +117,17 @@ Every block in the journal starts with a common 12-byte header</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - h\_magic</div><div class='add'>+     - __be32</div><div class='add'>+     - h_magic</div><div class='ctx'>      - jbd2 magic number, 0xC03B3998.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - h\_blocktype</div><div class='add'>+     - __be32</div><div class='add'>+     - h_blocktype</div><div class='ctx'>      - Description of what this block contains. See the jbd2_blocktype_ table</div><div class='ctx'>        below.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - h\_sequence</div><div class='add'>+     - __be32</div><div class='add'>+     - h_sequence</div><div class='ctx'>      - The transaction ID that goes with this block.</div><div class='ctx'> </div><div class='ctx'> .. _jbd2_blocktype:</div><div class='hunk'>@@ -177,99 +177,99 @@ which is 1024 bytes long:</div><div class='ctx'>      -</div><div class='ctx'>      - Static information describing the journal.</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - journal\_header\_t (12 bytes)</div><div class='del'>-     - s\_header</div><div class='add'>+     - journal_header_t (12 bytes)</div><div class='add'>+     - s_header</div><div class='ctx'>      - Common header identifying this as a superblock.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_blocksize</div><div class='add'>+     - __be32</div><div class='add'>+     - s_blocksize</div><div class='ctx'>      - Journal device block size.</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_maxlen</div><div class='add'>+     - __be32</div><div class='add'>+     - s_maxlen</div><div class='ctx'>      - Total number of blocks in this journal.</div><div class='ctx'>    * - 0x14</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_first</div><div class='add'>+     - __be32</div><div class='add'>+     - s_first</div><div class='ctx'>      - First block of log information.</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='ctx'>      -</div><div class='ctx'>      - Dynamic information describing the current state of the log.</div><div class='ctx'>    * - 0x18</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_sequence</div><div class='add'>+     - __be32</div><div class='add'>+     - s_sequence</div><div class='ctx'>      - First commit ID expected in log.</div><div class='ctx'>    * - 0x1C</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_start</div><div class='add'>+     - __be32</div><div class='add'>+     - s_start</div><div class='ctx'>      - Block number of the start of log. Contrary to the comments, this field</div><div class='ctx'>        being zero does not imply that the journal is clean!</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_errno</div><div class='del'>-     - Error value, as set by jbd2\_journal\_abort().</div><div class='add'>+     - __be32</div><div class='add'>+     - s_errno</div><div class='add'>+     - Error value, as set by jbd2_journal_abort().</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='ctx'>      -</div><div class='ctx'>      - The remaining fields are only valid in a v2 superblock.</div><div class='ctx'>    * - 0x24</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_feature\_compat;</div><div class='add'>+     - __be32</div><div class='add'>+     - s_feature_compat;</div><div class='ctx'>      - Compatible feature set. See the table jbd2_compat_ below.</div><div class='ctx'>    * - 0x28</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_feature\_incompat</div><div class='add'>+     - __be32</div><div class='add'>+     - s_feature_incompat</div><div class='ctx'>      - Incompatible feature set. See the table jbd2_incompat_ below.</div><div class='ctx'>    * - 0x2C</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_feature\_ro\_compat</div><div class='add'>+     - __be32</div><div class='add'>+     - s_feature_ro_compat</div><div class='ctx'>      - Read-only compatible feature set. There aren't any of these currently.</div><div class='ctx'>    * - 0x30</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_uuid[16]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_uuid[16]</div><div class='ctx'>      - 128-bit uuid for journal. This is compared against the copy in the ext4</div><div class='ctx'>        super block at mount time.</div><div class='ctx'>    * - 0x40</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_nr\_users</div><div class='add'>+     - __be32</div><div class='add'>+     - s_nr_users</div><div class='ctx'>      - Number of file systems sharing this journal.</div><div class='ctx'>    * - 0x44</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_dynsuper</div><div class='add'>+     - __be32</div><div class='add'>+     - s_dynsuper</div><div class='ctx'>      - Location of dynamic super block copy. (Not used?)</div><div class='ctx'>    * - 0x48</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_max\_transaction</div><div class='add'>+     - __be32</div><div class='add'>+     - s_max_transaction</div><div class='ctx'>      - Limit of journal blocks per transaction. (Not used?)</div><div class='ctx'>    * - 0x4C</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_max\_trans\_data</div><div class='add'>+     - __be32</div><div class='add'>+     - s_max_trans_data</div><div class='ctx'>      - Limit of data blocks per transaction. (Not used?)</div><div class='ctx'>    * - 0x50</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_checksum\_type</div><div class='add'>+     - __u8</div><div class='add'>+     - s_checksum_type</div><div class='ctx'>      - Checksum algorithm used for the journal.  See jbd2_checksum_type_ for</div><div class='ctx'>        more info.</div><div class='ctx'>    * - 0x51</div><div class='del'>-     - \_\_u8[3]</div><div class='del'>-     - s\_padding2</div><div class='add'>+     - __u8[3]</div><div class='add'>+     - s_padding2</div><div class='ctx'>      -</div><div class='ctx'>    * - 0x54</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_num\_fc\_blocks</div><div class='add'>+     - __be32</div><div class='add'>+     - s_num_fc_blocks</div><div class='ctx'>      - Number of fast commit blocks in the journal.</div><div class='ctx'>    * - 0x58</div><div class='del'>-     - \_\_u32</div><div class='del'>-     - s\_padding[42]</div><div class='add'>+     - __u32</div><div class='add'>+     - s_padding[42]</div><div class='ctx'>      -</div><div class='ctx'>    * - 0xFC</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - s\_checksum</div><div class='add'>+     - __be32</div><div class='add'>+     - s_checksum</div><div class='ctx'>      - Checksum of the entire superblock, with this field set to zero.</div><div class='ctx'>    * - 0x100</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_users[16\*48]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_users[16*48]</div><div class='ctx'>      - ids of all file systems sharing the log. e2fsprogs/Linux don't allow</div><div class='ctx'>        shared external journals, but I imagine Lustre (or ocfs2?), which use</div><div class='ctx'>        the jbd2 code, might.</div><div class='hunk'>@@ -286,7 +286,7 @@ The journal compat features are any combination of the following:</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='ctx'>      - Journal maintains checksums on the data blocks.</div><div class='del'>-       (JBD2\_FEATURE\_COMPAT\_CHECKSUM)</div><div class='add'>+       (JBD2_FEATURE_COMPAT_CHECKSUM)</div><div class='ctx'> </div><div class='ctx'> .. _jbd2_incompat:</div><div class='ctx'> </div><div class='hunk'>@@ -299,23 +299,23 @@ The journal incompat features are any combination of the following:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='del'>-     - Journal has block revocation records. (JBD2\_FEATURE\_INCOMPAT\_REVOKE)</div><div class='add'>+     - Journal has block revocation records. (JBD2_FEATURE_INCOMPAT_REVOKE)</div><div class='ctx'>    * - 0x2</div><div class='ctx'>      - Journal can deal with 64-bit block numbers.</div><div class='del'>-       (JBD2\_FEATURE\_INCOMPAT\_64BIT)</div><div class='add'>+       (JBD2_FEATURE_INCOMPAT_64BIT)</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - Journal commits asynchronously. (JBD2\_FEATURE\_INCOMPAT\_ASYNC\_COMMIT)</div><div class='add'>+     - Journal commits asynchronously. (JBD2_FEATURE_INCOMPAT_ASYNC_COMMIT)</div><div class='ctx'>    * - 0x8</div><div class='ctx'>      - This journal uses v2 of the checksum on-disk format. Each journal</div><div class='ctx'>        metadata block gets its own checksum, and the block tags in the</div><div class='ctx'>        descriptor table contain checksums for each of the data blocks in the</div><div class='del'>-       journal. (JBD2\_FEATURE\_INCOMPAT\_CSUM\_V2)</div><div class='add'>+       journal. (JBD2_FEATURE_INCOMPAT_CSUM_V2)</div><div class='ctx'>    * - 0x10</div><div class='ctx'>      - This journal uses v3 of the checksum on-disk format. This is the same as</div><div class='ctx'>        v2, but the journal block tag size is fixed regardless of the size of</div><div class='del'>-       block numbers. (JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3)</div><div class='add'>+       block numbers. (JBD2_FEATURE_INCOMPAT_CSUM_V3)</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - Journal has fast commit blocks. (JBD2\_FEATURE\_INCOMPAT\_FAST\_COMMIT)</div><div class='add'>+     - Journal has fast commit blocks. (JBD2_FEATURE_INCOMPAT_FAST_COMMIT)</div><div class='ctx'> </div><div class='ctx'> .. _jbd2_checksum_type:</div><div class='ctx'> </div><div class='hunk'>@@ -355,11 +355,11 @@ Descriptor blocks consume at least 36 bytes, but use a full block:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Descriptor</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - journal\_header\_t</div><div class='add'>+     - journal_header_t</div><div class='ctx'>      - (open coded)</div><div class='ctx'>      - Common block header.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - struct journal\_block\_tag\_s</div><div class='add'>+     - struct journal_block_tag_s</div><div class='ctx'>      - open coded array[]</div><div class='ctx'>      - Enough tags either to fill up the block or to describe all the data</div><div class='ctx'>        blocks that follow this descriptor block.</div><div class='hunk'>@@ -367,7 +367,7 @@ Descriptor blocks consume at least 36 bytes, but use a full block:</div><div class='ctx'> Journal block tags have any of the following formats, depending on which</div><div class='ctx'> journal feature and block tag flags are set.</div><div class='ctx'> </div><div class='del'>-If JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3 is set, the journal block tag is</div><div class='add'>+If JBD2_FEATURE_INCOMPAT_CSUM_V3 is set, the journal block tag is</div><div class='ctx'> defined as ``struct journal_block_tag3_s``, which looks like the</div><div class='ctx'> following. The size is 16 or 32 bytes.</div><div class='ctx'> </div><div class='hunk'>@@ -380,24 +380,24 @@ following. The size is 16 or 32 bytes.</div><div class='ctx'>      - Name</div><div class='ctx'>      - Descriptor</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - t\_blocknr</div><div class='add'>+     - __be32</div><div class='add'>+     - t_blocknr</div><div class='ctx'>      - Lower 32-bits of the location of where the corresponding data block</div><div class='ctx'>        should end up on disk.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - t\_flags</div><div class='add'>+     - __be32</div><div class='add'>+     - t_flags</div><div class='ctx'>      - Flags that go with the descriptor. See the table jbd2_tag_flags_ for</div><div class='ctx'>        more info.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - t\_blocknr\_high</div><div class='add'>+     - __be32</div><div class='add'>+     - t_blocknr_high</div><div class='ctx'>      - Upper 32-bits of the location of where the corresponding data block</div><div class='del'>-       should end up on disk. This is zero if JBD2\_FEATURE\_INCOMPAT\_64BIT is</div><div class='add'>+       should end up on disk. This is zero if JBD2_FEATURE_INCOMPAT_64BIT is</div><div class='ctx'>        not enabled.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - t\_checksum</div><div class='add'>+     - __be32</div><div class='add'>+     - t_checksum</div><div class='ctx'>      - Checksum of the journal UUID, the sequence number, and the data block.</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='hunk'>@@ -433,7 +433,7 @@ The journal tag flags are any combination of the following:</div><div class='ctx'>    * - 0x8</div><div class='ctx'>      - This is the last tag in this descriptor block.</div><div class='ctx'> </div><div class='del'>-If JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3 is NOT set, the journal block tag</div><div class='add'>+If JBD2_FEATURE_INCOMPAT_CSUM_V3 is NOT set, the journal block tag</div><div class='ctx'> is defined as ``struct journal_block_tag_s``, which looks like the</div><div class='ctx'> following. The size is 8, 12, 24, or 28 bytes:</div><div class='ctx'> </div><div class='hunk'>@@ -446,18 +446,18 @@ following. The size is 8, 12, 24, or 28 bytes:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Descriptor</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - t\_blocknr</div><div class='add'>+     - __be32</div><div class='add'>+     - t_blocknr</div><div class='ctx'>      - Lower 32-bits of the location of where the corresponding data block</div><div class='ctx'>        should end up on disk.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_be16</div><div class='del'>-     - t\_checksum</div><div class='add'>+     - __be16</div><div class='add'>+     - t_checksum</div><div class='ctx'>      - Checksum of the journal UUID, the sequence number, and the data block.</div><div class='ctx'>        Note that only the lower 16 bits are stored.</div><div class='ctx'>    * - 0x6</div><div class='del'>-     - \_\_be16</div><div class='del'>-     - t\_flags</div><div class='add'>+     - __be16</div><div class='add'>+     - t_flags</div><div class='ctx'>      - Flags that go with the descriptor. See the table jbd2_tag_flags_ for</div><div class='ctx'>        more info.</div><div class='ctx'>    * -</div><div class='hunk'>@@ -466,8 +466,8 @@ following. The size is 8, 12, 24, or 28 bytes:</div><div class='ctx'>      - This next field is only present if the super block indicates support for</div><div class='ctx'>        64-bit block numbers.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - t\_blocknr\_high</div><div class='add'>+     - __be32</div><div class='add'>+     - t_blocknr_high</div><div class='ctx'>      - Upper 32-bits of the location of where the corresponding data block</div><div class='ctx'>        should end up on disk.</div><div class='ctx'>    * -</div><div class='hunk'>@@ -483,8 +483,8 @@ following. The size is 8, 12, 24, or 28 bytes:</div><div class='ctx'>        ``j_uuid`` field in ``struct journal_s``, but only tune2fs touches that</div><div class='ctx'>        field.</div><div class='ctx'> </div><div class='del'>-If JBD2\_FEATURE\_INCOMPAT\_CSUM\_V2 or</div><div class='del'>-JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3 are set, the end of the block is a</div><div class='add'>+If JBD2_FEATURE_INCOMPAT_CSUM_V2 or</div><div class='add'>+JBD2_FEATURE_INCOMPAT_CSUM_V3 are set, the end of the block is a</div><div class='ctx'> ``struct jbd2_journal_block_tail``, which looks like this:</div><div class='ctx'> </div><div class='ctx'> .. list-table::</div><div class='hunk'>@@ -496,8 +496,8 @@ JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3 are set, the end of the block is a</div><div class='ctx'>      - Name</div><div class='ctx'>      - Descriptor</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - t\_checksum</div><div class='add'>+     - __be32</div><div class='add'>+     - t_checksum</div><div class='ctx'>      - Checksum of the journal UUID + the descriptor block, with this field set</div><div class='ctx'>        to zero.</div><div class='ctx'> </div><div class='hunk'>@@ -538,25 +538,25 @@ length, but use a full block:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - journal\_header\_t</div><div class='del'>-     - r\_header</div><div class='add'>+     - journal_header_t</div><div class='add'>+     - r_header</div><div class='ctx'>      - Common block header.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - r\_count</div><div class='add'>+     - __be32</div><div class='add'>+     - r_count</div><div class='ctx'>      - Number of bytes used in this block.</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_be32 or \_\_be64</div><div class='add'>+     - __be32 or __be64</div><div class='ctx'>      - blocks[0]</div><div class='ctx'>      - Blocks to revoke.</div><div class='ctx'> </div><div class='del'>-After r\_count is a linear array of block numbers that are effectively</div><div class='add'>+After r_count is a linear array of block numbers that are effectively</div><div class='ctx'> revoked by this transaction. The size of each block number is 8 bytes if</div><div class='ctx'> the superblock advertises 64-bit block number support, or 4 bytes</div><div class='ctx'> otherwise.</div><div class='ctx'> </div><div class='del'>-If JBD2\_FEATURE\_INCOMPAT\_CSUM\_V2 or</div><div class='del'>-JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3 are set, the end of the revocation</div><div class='add'>+If JBD2_FEATURE_INCOMPAT_CSUM_V2 or</div><div class='add'>+JBD2_FEATURE_INCOMPAT_CSUM_V3 are set, the end of the revocation</div><div class='ctx'> block is a ``struct jbd2_journal_revoke_tail``, which has this format:</div><div class='ctx'> </div><div class='ctx'> .. list-table::</div><div class='hunk'>@@ -568,8 +568,8 @@ block is a ``struct jbd2_journal_revoke_tail``, which has this format:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - r\_checksum</div><div class='add'>+     - __be32</div><div class='add'>+     - r_checksum</div><div class='ctx'>      - Checksum of the journal UUID + revocation block</div><div class='ctx'> </div><div class='ctx'> Commit Block</div><div class='hunk'>@@ -592,38 +592,38 @@ bytes long (but uses a full block):</div><div class='ctx'>      - Name</div><div class='ctx'>      - Descriptor</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - journal\_header\_s</div><div class='add'>+     - journal_header_s</div><div class='ctx'>      - (open coded)</div><div class='ctx'>      - Common block header.</div><div class='ctx'>    * - 0xC</div><div class='ctx'>      - unsigned char</div><div class='del'>-     - h\_chksum\_type</div><div class='add'>+     - h_chksum_type</div><div class='ctx'>      - The type of checksum to use to verify the integrity of the data blocks</div><div class='ctx'>        in the transaction. See jbd2_checksum_type_ for more info.</div><div class='ctx'>    * - 0xD</div><div class='ctx'>      - unsigned char</div><div class='del'>-     - h\_chksum\_size</div><div class='add'>+     - h_chksum_size</div><div class='ctx'>      - The number of bytes used by the checksum. Most likely 4.</div><div class='ctx'>    * - 0xE</div><div class='ctx'>      - unsigned char</div><div class='del'>-     - h\_padding[2]</div><div class='add'>+     - h_padding[2]</div><div class='ctx'>      -</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - h\_chksum[JBD2\_CHECKSUM\_BYTES]</div><div class='add'>+     - __be32</div><div class='add'>+     - h_chksum[JBD2_CHECKSUM_BYTES]</div><div class='ctx'>      - 32 bytes of space to store checksums. If</div><div class='del'>-       JBD2\_FEATURE\_INCOMPAT\_CSUM\_V2 or JBD2\_FEATURE\_INCOMPAT\_CSUM\_V3</div><div class='add'>+       JBD2_FEATURE_INCOMPAT_CSUM_V2 or JBD2_FEATURE_INCOMPAT_CSUM_V3</div><div class='ctx'>        are set, the first ``__be32`` is the checksum of the journal UUID and</div><div class='ctx'>        the entire commit block, with this field zeroed. If</div><div class='del'>-       JBD2\_FEATURE\_COMPAT\_CHECKSUM is set, the first ``__be32`` is the</div><div class='add'>+       JBD2_FEATURE_COMPAT_CHECKSUM is set, the first ``__be32`` is the</div><div class='ctx'>        crc32 of all the blocks already written to the transaction.</div><div class='ctx'>    * - 0x30</div><div class='del'>-     - \_\_be64</div><div class='del'>-     - h\_commit\_sec</div><div class='add'>+     - __be64</div><div class='add'>+     - h_commit_sec</div><div class='ctx'>      - The time that the transaction was committed, in seconds since the epoch.</div><div class='ctx'>    * - 0x38</div><div class='del'>-     - \_\_be32</div><div class='del'>-     - h\_commit\_nsec</div><div class='add'>+     - __be32</div><div class='add'>+     - h_commit_nsec</div><div class='ctx'>      - Nanoseconds component of the above timestamp.</div><div class='ctx'> </div><div class='ctx'> Fast commits</div><div class='head'>diff --git a/Documentation/filesystems/ext4/mmp.rst b/Documentation/filesystems/ext4/mmp.rst<br/>index 25660981d93c..174dd6538737 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/mmp.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/mmp.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/mmp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/mmp.rst</a></div><div class='hunk'>@@ -7,8 +7,8 @@ Multiple mount protection (MMP) is a feature that protects the</div><div class='ctx'> filesystem against multiple hosts trying to use the filesystem</div><div class='ctx'> simultaneously. When a filesystem is opened (for mounting, or fsck,</div><div class='ctx'> etc.), the MMP code running on the node (call it node A) checks a</div><div class='del'>-sequence number. If the sequence number is EXT4\_MMP\_SEQ\_CLEAN, the</div><div class='del'>-open continues. If the sequence number is EXT4\_MMP\_SEQ\_FSCK, then</div><div class='add'>+sequence number. If the sequence number is EXT4_MMP_SEQ_CLEAN, the</div><div class='add'>+open continues. If the sequence number is EXT4_MMP_SEQ_FSCK, then</div><div class='ctx'> fsck is (hopefully) running, and open fails immediately. Otherwise, the</div><div class='ctx'> open code will wait for twice the specified MMP check interval and check</div><div class='ctx'> the sequence number again. If the sequence number has changed, then the</div><div class='hunk'>@@ -40,38 +40,38 @@ The MMP structure (``struct mmp_struct``) is as follows:</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - mmp\_magic</div><div class='add'>+     - __le32</div><div class='add'>+     - mmp_magic</div><div class='ctx'>      - Magic number for MMP, 0x004D4D50 (“MMP”).</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - mmp\_seq</div><div class='add'>+     - __le32</div><div class='add'>+     - mmp_seq</div><div class='ctx'>      - Sequence number, updated periodically.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le64</div><div class='del'>-     - mmp\_time</div><div class='add'>+     - __le64</div><div class='add'>+     - mmp_time</div><div class='ctx'>      - Time that the MMP block was last updated.</div><div class='ctx'>    * - 0x10</div><div class='ctx'>      - char[64]</div><div class='del'>-     - mmp\_nodename</div><div class='add'>+     - mmp_nodename</div><div class='ctx'>      - Hostname of the node that opened the filesystem.</div><div class='ctx'>    * - 0x50</div><div class='ctx'>      - char[32]</div><div class='del'>-     - mmp\_bdevname</div><div class='add'>+     - mmp_bdevname</div><div class='ctx'>      - Block device name of the filesystem.</div><div class='ctx'>    * - 0x70</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - mmp\_check\_interval</div><div class='add'>+     - __le16</div><div class='add'>+     - mmp_check_interval</div><div class='ctx'>      - The MMP re-check interval, in seconds.</div><div class='ctx'>    * - 0x72</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - mmp\_pad1</div><div class='add'>+     - __le16</div><div class='add'>+     - mmp_pad1</div><div class='ctx'>      - Zero.</div><div class='ctx'>    * - 0x74</div><div class='del'>-     - \_\_le32[226]</div><div class='del'>-     - mmp\_pad2</div><div class='add'>+     - __le32[226]</div><div class='add'>+     - mmp_pad2</div><div class='ctx'>      - Zero.</div><div class='ctx'>    * - 0x3FC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - mmp\_checksum</div><div class='add'>+     - __le32</div><div class='add'>+     - mmp_checksum</div><div class='ctx'>      - Checksum of the MMP block.</div><div class='head'>diff --git a/Documentation/filesystems/ext4/overview.rst b/Documentation/filesystems/ext4/overview.rst<br/>index 123ebfde47ee..0fad6eda6e15 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/overview.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/overview.rst</a></div><div class='hunk'>@@ -7,7 +7,7 @@ An ext4 file system is split into a series of block groups. To reduce</div><div class='ctx'> performance difficulties due to fragmentation, the block allocator tries</div><div class='ctx'> very hard to keep each file's blocks within the same group, thereby</div><div class='ctx'> reducing seek times. The size of a block group is specified in</div><div class='del'>-``sb.s_blocks_per_group`` blocks, though it can also calculated as 8 \*</div><div class='add'>+``sb.s_blocks_per_group`` blocks, though it can also calculated as 8 *</div><div class='ctx'> ``block_size_in_bytes``. With the default block size of 4KiB, each group</div><div class='ctx'> will contain 32,768 blocks, for a length of 128MiB. The number of block</div><div class='ctx'> groups is the size of the device divided by the size of a block group.</div><div class='head'>diff --git a/Documentation/filesystems/ext4/special_inodes.rst b/Documentation/filesystems/ext4/special_inodes.rst<br/>index 94f304e3a0a7..fc0636901fa0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/special_inodes.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/special_inodes.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/special_inodes.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/special_inodes.rst</a></div><div class='hunk'>@@ -34,7 +34,7 @@ ext4 reserves some inode for special features, as follows:</div><div class='ctx'>    * - 10</div><div class='ctx'>      - Replica inode, used for some non-upstream feature?</div><div class='ctx'>    * - 11</div><div class='del'>-     - Traditional first non-reserved inode. Usually this is the lost+found directory. See s\_first\_ino in the superblock.</div><div class='add'>+     - Traditional first non-reserved inode. Usually this is the lost+found directory. See s_first_ino in the superblock.</div><div class='ctx'> </div><div class='ctx'> Note that there are also some inodes allocated from non-reserved inode numbers</div><div class='ctx'> for other filesystem features which are not referenced from standard directory</div><div class='hunk'>@@ -47,9 +47,9 @@ hierarchy. These are generally reference from the superblock. They are:</div><div class='ctx'>    * - Superblock field</div><div class='ctx'>      - Description</div><div class='ctx'> </div><div class='del'>-   * - s\_lpf\_ino</div><div class='add'>+   * - s_lpf_ino</div><div class='ctx'>      - Inode number of lost+found directory.</div><div class='del'>-   * - s\_prj\_quota\_inum</div><div class='add'>+   * - s_prj_quota_inum</div><div class='ctx'>      - Inode number of quota file tracking project quotas</div><div class='del'>-   * - s\_orphan\_file\_inum</div><div class='add'>+   * - s_orphan_file_inum</div><div class='ctx'>      - Inode number of file tracking orphan inodes.</div><div class='head'>diff --git a/Documentation/filesystems/ext4/super.rst b/Documentation/filesystems/ext4/super.rst<br/>index f6a548e957bb..0152888cac29 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/super.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ext4/super.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ext4/super.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ext4/super.rst</a></div><div class='hunk'>@@ -7,7 +7,7 @@ The superblock records various information about the enclosing</div><div class='ctx'> filesystem, such as block counts, inode counts, supported features,</div><div class='ctx'> maintenance information, and more.</div><div class='ctx'> </div><div class='del'>-If the sparse\_super feature flag is set, redundant copies of the</div><div class='add'>+If the sparse_super feature flag is set, redundant copies of the</div><div class='ctx'> superblock and group descriptors are kept only in the groups whose group</div><div class='ctx'> number is either 0 or a power of 3, 5, or 7. If the flag is not set,</div><div class='ctx'> redundant copies are kept in all groups.</div><div class='hunk'>@@ -27,107 +27,107 @@ The ext4 superblock is laid out as follows in</div><div class='ctx'>      - Name</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_inodes\_count</div><div class='add'>+     - __le32</div><div class='add'>+     - s_inodes_count</div><div class='ctx'>      - Total inode count.</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_blocks\_count\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - s_blocks_count_lo</div><div class='ctx'>      - Total block count.</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_r\_blocks\_count\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - s_r_blocks_count_lo</div><div class='ctx'>      - This number of blocks can only be allocated by the super-user.</div><div class='ctx'>    * - 0xC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_free\_blocks\_count\_lo</div><div class='add'>+     - __le32</div><div class='add'>+     - s_free_blocks_count_lo</div><div class='ctx'>      - Free block count.</div><div class='ctx'>    * - 0x10</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_free\_inodes\_count</div><div class='add'>+     - __le32</div><div class='add'>+     - s_free_inodes_count</div><div class='ctx'>      - Free inode count.</div><div class='ctx'>    * - 0x14</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_first\_data\_block</div><div class='add'>+     - __le32</div><div class='add'>+     - s_first_data_block</div><div class='ctx'>      - First data block. This must be at least 1 for 1k-block filesystems and</div><div class='ctx'>        is typically 0 for all other block sizes.</div><div class='ctx'>    * - 0x18</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_log\_block\_size</div><div class='del'>-     - Block size is 2 ^ (10 + s\_log\_block\_size).</div><div class='add'>+     - __le32</div><div class='add'>+     - s_log_block_size</div><div class='add'>+     - Block size is 2 ^ (10 + s_log_block_size).</div><div class='ctx'>    * - 0x1C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_log\_cluster\_size</div><div class='del'>-     - Cluster size is 2 ^ (10 + s\_log\_cluster\_size) blocks if bigalloc is</div><div class='del'>-       enabled. Otherwise s\_log\_cluster\_size must equal s\_log\_block\_size.</div><div class='add'>+     - __le32</div><div class='add'>+     - s_log_cluster_size</div><div class='add'>+     - Cluster size is 2 ^ (10 + s_log_cluster_size) blocks if bigalloc is</div><div class='add'>+       enabled. Otherwise s_log_cluster_size must equal s_log_block_size.</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_blocks\_per\_group</div><div class='add'>+     - __le32</div><div class='add'>+     - s_blocks_per_group</div><div class='ctx'>      - Blocks per group.</div><div class='ctx'>    * - 0x24</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_clusters\_per\_group</div><div class='add'>+     - __le32</div><div class='add'>+     - s_clusters_per_group</div><div class='ctx'>      - Clusters per group, if bigalloc is enabled. Otherwise</div><div class='del'>-       s\_clusters\_per\_group must equal s\_blocks\_per\_group.</div><div class='add'>+       s_clusters_per_group must equal s_blocks_per_group.</div><div class='ctx'>    * - 0x28</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_inodes\_per\_group</div><div class='add'>+     - __le32</div><div class='add'>+     - s_inodes_per_group</div><div class='ctx'>      - Inodes per group.</div><div class='ctx'>    * - 0x2C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_mtime</div><div class='add'>+     - __le32</div><div class='add'>+     - s_mtime</div><div class='ctx'>      - Mount time, in seconds since the epoch.</div><div class='ctx'>    * - 0x30</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_wtime</div><div class='add'>+     - __le32</div><div class='add'>+     - s_wtime</div><div class='ctx'>      - Write time, in seconds since the epoch.</div><div class='ctx'>    * - 0x34</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_mnt\_count</div><div class='add'>+     - __le16</div><div class='add'>+     - s_mnt_count</div><div class='ctx'>      - Number of mounts since the last fsck.</div><div class='ctx'>    * - 0x36</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_max\_mnt\_count</div><div class='add'>+     - __le16</div><div class='add'>+     - s_max_mnt_count</div><div class='ctx'>      - Number of mounts beyond which a fsck is needed.</div><div class='ctx'>    * - 0x38</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_magic</div><div class='add'>+     - __le16</div><div class='add'>+     - s_magic</div><div class='ctx'>      - Magic signature, 0xEF53</div><div class='ctx'>    * - 0x3A</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_state</div><div class='add'>+     - __le16</div><div class='add'>+     - s_state</div><div class='ctx'>      - File system state. See super_state_ for more info.</div><div class='ctx'>    * - 0x3C</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_errors</div><div class='add'>+     - __le16</div><div class='add'>+     - s_errors</div><div class='ctx'>      - Behaviour when detecting errors. See super_errors_ for more info.</div><div class='ctx'>    * - 0x3E</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_minor\_rev\_level</div><div class='add'>+     - __le16</div><div class='add'>+     - s_minor_rev_level</div><div class='ctx'>      - Minor revision level.</div><div class='ctx'>    * - 0x40</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_lastcheck</div><div class='add'>+     - __le32</div><div class='add'>+     - s_lastcheck</div><div class='ctx'>      - Time of last check, in seconds since the epoch.</div><div class='ctx'>    * - 0x44</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_checkinterval</div><div class='add'>+     - __le32</div><div class='add'>+     - s_checkinterval</div><div class='ctx'>      - Maximum time between checks, in seconds.</div><div class='ctx'>    * - 0x48</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_creator\_os</div><div class='add'>+     - __le32</div><div class='add'>+     - s_creator_os</div><div class='ctx'>      - Creator OS. See the table super_creator_ for more info.</div><div class='ctx'>    * - 0x4C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_rev\_level</div><div class='add'>+     - __le32</div><div class='add'>+     - s_rev_level</div><div class='ctx'>      - Revision level. See the table super_revision_ for more info.</div><div class='ctx'>    * - 0x50</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_def\_resuid</div><div class='add'>+     - __le16</div><div class='add'>+     - s_def_resuid</div><div class='ctx'>      - Default uid for reserved blocks.</div><div class='ctx'>    * - 0x52</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_def\_resgid</div><div class='add'>+     - __le16</div><div class='add'>+     - s_def_resgid</div><div class='ctx'>      - Default gid for reserved blocks.</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='hunk'>@@ -143,50 +143,50 @@ The ext4 superblock is laid out as follows in</div><div class='ctx'>        about a feature in either the compatible or incompatible feature set, it</div><div class='ctx'>        must abort and not try to meddle with things it doesn't understand...</div><div class='ctx'>    * - 0x54</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_first\_ino</div><div class='add'>+     - __le32</div><div class='add'>+     - s_first_ino</div><div class='ctx'>      - First non-reserved inode.</div><div class='ctx'>    * - 0x58</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_inode\_size</div><div class='add'>+     - __le16</div><div class='add'>+     - s_inode_size</div><div class='ctx'>      - Size of inode structure, in bytes.</div><div class='ctx'>    * - 0x5A</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_block\_group\_nr</div><div class='add'>+     - __le16</div><div class='add'>+     - s_block_group_nr</div><div class='ctx'>      - Block group # of this superblock.</div><div class='ctx'>    * - 0x5C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_feature\_compat</div><div class='add'>+     - __le32</div><div class='add'>+     - s_feature_compat</div><div class='ctx'>      - Compatible feature set flags. Kernel can still read/write this fs even</div><div class='ctx'>        if it doesn't understand a flag; fsck should not do that. See the</div><div class='ctx'>        super_compat_ table for more info.</div><div class='ctx'>    * - 0x60</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_feature\_incompat</div><div class='add'>+     - __le32</div><div class='add'>+     - s_feature_incompat</div><div class='ctx'>      - Incompatible feature set. If the kernel or fsck doesn't understand one</div><div class='ctx'>        of these bits, it should stop. See the super_incompat_ table for more</div><div class='ctx'>        info.</div><div class='ctx'>    * - 0x64</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_feature\_ro\_compat</div><div class='add'>+     - __le32</div><div class='add'>+     - s_feature_ro_compat</div><div class='ctx'>      - Readonly-compatible feature set. If the kernel doesn't understand one of</div><div class='ctx'>        these bits, it can still mount read-only. See the super_rocompat_ table</div><div class='ctx'>        for more info.</div><div class='ctx'>    * - 0x68</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_uuid[16]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_uuid[16]</div><div class='ctx'>      - 128-bit UUID for volume.</div><div class='ctx'>    * - 0x78</div><div class='ctx'>      - char</div><div class='del'>-     - s\_volume\_name[16]</div><div class='add'>+     - s_volume_name[16]</div><div class='ctx'>      - Volume label.</div><div class='ctx'>    * - 0x88</div><div class='ctx'>      - char</div><div class='del'>-     - s\_last\_mounted[64]</div><div class='add'>+     - s_last_mounted[64]</div><div class='ctx'>      - Directory where filesystem was last mounted.</div><div class='ctx'>    * - 0xC8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_algorithm\_usage\_bitmap</div><div class='add'>+     - __le32</div><div class='add'>+     - s_algorithm_usage_bitmap</div><div class='ctx'>      - For compression (Not used in e2fsprogs/Linux)</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='hunk'>@@ -194,18 +194,18 @@ The ext4 superblock is laid out as follows in</div><div class='ctx'>      - Performance hints.  Directory preallocation should only happen if the</div><div class='ctx'>        EXT4_FEATURE_COMPAT_DIR_PREALLOC flag is on.</div><div class='ctx'>    * - 0xCC</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_prealloc\_blocks</div><div class='add'>+     - __u8</div><div class='add'>+     - s_prealloc_blocks</div><div class='ctx'>      - #. of blocks to try to preallocate for ... files? (Not used in</div><div class='ctx'>        e2fsprogs/Linux)</div><div class='ctx'>    * - 0xCD</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_prealloc\_dir\_blocks</div><div class='add'>+     - __u8</div><div class='add'>+     - s_prealloc_dir_blocks</div><div class='ctx'>      - #. of blocks to preallocate for directories. (Not used in</div><div class='ctx'>        e2fsprogs/Linux)</div><div class='ctx'>    * - 0xCE</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_reserved\_gdt\_blocks</div><div class='add'>+     - __le16</div><div class='add'>+     - s_reserved_gdt_blocks</div><div class='ctx'>      - Number of reserved GDT entries for future filesystem expansion.</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='hunk'>@@ -213,281 +213,281 @@ The ext4 superblock is laid out as follows in</div><div class='ctx'>      - Journalling support is valid only if EXT4_FEATURE_COMPAT_HAS_JOURNAL is</div><div class='ctx'>        set.</div><div class='ctx'>    * - 0xD0</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_journal\_uuid[16]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_journal_uuid[16]</div><div class='ctx'>      - UUID of journal superblock</div><div class='ctx'>    * - 0xE0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_journal\_inum</div><div class='add'>+     - __le32</div><div class='add'>+     - s_journal_inum</div><div class='ctx'>      - inode number of journal file.</div><div class='ctx'>    * - 0xE4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_journal\_dev</div><div class='add'>+     - __le32</div><div class='add'>+     - s_journal_dev</div><div class='ctx'>      - Device number of journal file, if the external journal feature flag is</div><div class='ctx'>        set.</div><div class='ctx'>    * - 0xE8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_last\_orphan</div><div class='add'>+     - __le32</div><div class='add'>+     - s_last_orphan</div><div class='ctx'>      - Start of list of orphaned inodes to delete.</div><div class='ctx'>    * - 0xEC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_hash\_seed[4]</div><div class='add'>+     - __le32</div><div class='add'>+     - s_hash_seed[4]</div><div class='ctx'>      - HTREE hash seed.</div><div class='ctx'>    * - 0xFC</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_def\_hash\_version</div><div class='add'>+     - __u8</div><div class='add'>+     - s_def_hash_version</div><div class='ctx'>      - Default hash algorithm to use for directory hashes. See super_def_hash_</div><div class='ctx'>        for more info.</div><div class='ctx'>    * - 0xFD</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_jnl\_backup\_type</div><div class='del'>-     - If this value is 0 or EXT3\_JNL\_BACKUP\_BLOCKS (1), then the</div><div class='add'>+     - __u8</div><div class='add'>+     - s_jnl_backup_type</div><div class='add'>+     - If this value is 0 or EXT3_JNL_BACKUP_BLOCKS (1), then the</div><div class='ctx'>        ``s_jnl_blocks`` field contains a duplicate copy of the inode's</div><div class='ctx'>        ``i_block[]`` array and ``i_size``.</div><div class='ctx'>    * - 0xFE</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_desc\_size</div><div class='add'>+     - __le16</div><div class='add'>+     - s_desc_size</div><div class='ctx'>      - Size of group descriptors, in bytes, if the 64bit incompat feature flag</div><div class='ctx'>        is set.</div><div class='ctx'>    * - 0x100</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_default\_mount\_opts</div><div class='add'>+     - __le32</div><div class='add'>+     - s_default_mount_opts</div><div class='ctx'>      - Default mount options. See the super_mountopts_ table for more info.</div><div class='ctx'>    * - 0x104</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_first\_meta\_bg</div><div class='del'>-     - First metablock block group, if the meta\_bg feature is enabled.</div><div class='add'>+     - __le32</div><div class='add'>+     - s_first_meta_bg</div><div class='add'>+     - First metablock block group, if the meta_bg feature is enabled.</div><div class='ctx'>    * - 0x108</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_mkfs\_time</div><div class='add'>+     - __le32</div><div class='add'>+     - s_mkfs_time</div><div class='ctx'>      - When the filesystem was created, in seconds since the epoch.</div><div class='ctx'>    * - 0x10C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_jnl\_blocks[17]</div><div class='add'>+     - __le32</div><div class='add'>+     - s_jnl_blocks[17]</div><div class='ctx'>      - Backup copy of the journal inode's ``i_block[]`` array in the first 15</div><div class='del'>-       elements and i\_size\_high and i\_size in the 16th and 17th elements,</div><div class='add'>+       elements and i_size_high and i_size in the 16th and 17th elements,</div><div class='ctx'>        respectively.</div><div class='ctx'>    * -</div><div class='ctx'>      -</div><div class='ctx'>      -</div><div class='ctx'>      - 64bit support is valid only if EXT4_FEATURE_COMPAT_64BIT is set.</div><div class='ctx'>    * - 0x150</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_blocks\_count\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - s_blocks_count_hi</div><div class='ctx'>      - High 32-bits of the block count.</div><div class='ctx'>    * - 0x154</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_r\_blocks\_count\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - s_r_blocks_count_hi</div><div class='ctx'>      - High 32-bits of the reserved block count.</div><div class='ctx'>    * - 0x158</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_free\_blocks\_count\_hi</div><div class='add'>+     - __le32</div><div class='add'>+     - s_free_blocks_count_hi</div><div class='ctx'>      - High 32-bits of the free block count.</div><div class='ctx'>    * - 0x15C</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_min\_extra\_isize</div><div class='add'>+     - __le16</div><div class='add'>+     - s_min_extra_isize</div><div class='ctx'>      - All inodes have at least # bytes.</div><div class='ctx'>    * - 0x15E</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_want\_extra\_isize</div><div class='add'>+     - __le16</div><div class='add'>+     - s_want_extra_isize</div><div class='ctx'>      - New inodes should reserve # bytes.</div><div class='ctx'>    * - 0x160</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_flags</div><div class='add'>+     - __le32</div><div class='add'>+     - s_flags</div><div class='ctx'>      - Miscellaneous flags. See the super_flags_ table for more info.</div><div class='ctx'>    * - 0x164</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_raid\_stride</div><div class='add'>+     - __le16</div><div class='add'>+     - s_raid_stride</div><div class='ctx'>      - RAID stride. This is the number of logical blocks read from or written</div><div class='ctx'>        to the disk before moving to the next disk. This affects the placement</div><div class='ctx'>        of filesystem metadata, which will hopefully make RAID storage faster.</div><div class='ctx'>    * - 0x166</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_mmp\_interval</div><div class='add'>+     - __le16</div><div class='add'>+     - s_mmp_interval</div><div class='ctx'>      - #. seconds to wait in multi-mount prevention (MMP) checking. In theory,</div><div class='ctx'>        MMP is a mechanism to record in the superblock which host and device</div><div class='ctx'>        have mounted the filesystem, in order to prevent multiple mounts. This</div><div class='ctx'>        feature does not seem to be implemented...</div><div class='ctx'>    * - 0x168</div><div class='del'>-     - \_\_le64</div><div class='del'>-     - s\_mmp\_block</div><div class='add'>+     - __le64</div><div class='add'>+     - s_mmp_block</div><div class='ctx'>      - Block # for multi-mount protection data.</div><div class='ctx'>    * - 0x170</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_raid\_stripe\_width</div><div class='add'>+     - __le32</div><div class='add'>+     - s_raid_stripe_width</div><div class='ctx'>      - RAID stripe width. This is the number of logical blocks read from or</div><div class='ctx'>        written to the disk before coming back to the current disk. This is used</div><div class='ctx'>        by the block allocator to try to reduce the number of read-modify-write</div><div class='ctx'>        operations in a RAID5/6.</div><div class='ctx'>    * - 0x174</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_log\_groups\_per\_flex</div><div class='add'>+     - __u8</div><div class='add'>+     - s_log_groups_per_flex</div><div class='ctx'>      - Size of a flexible block group is 2 ^ ``s_log_groups_per_flex``.</div><div class='ctx'>    * - 0x175</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_checksum\_type</div><div class='add'>+     - __u8</div><div class='add'>+     - s_checksum_type</div><div class='ctx'>      - Metadata checksum algorithm type. The only valid value is 1 (crc32c).</div><div class='ctx'>    * - 0x176</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_reserved\_pad</div><div class='add'>+     - __le16</div><div class='add'>+     - s_reserved_pad</div><div class='ctx'>      -</div><div class='ctx'>    * - 0x178</div><div class='del'>-     - \_\_le64</div><div class='del'>-     - s\_kbytes\_written</div><div class='add'>+     - __le64</div><div class='add'>+     - s_kbytes_written</div><div class='ctx'>      - Number of KiB written to this filesystem over its lifetime.</div><div class='ctx'>    * - 0x180</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_snapshot\_inum</div><div class='add'>+     - __le32</div><div class='add'>+     - s_snapshot_inum</div><div class='ctx'>      - inode number of active snapshot. (Not used in e2fsprogs/Linux.)</div><div class='ctx'>    * - 0x184</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_snapshot\_id</div><div class='add'>+     - __le32</div><div class='add'>+     - s_snapshot_id</div><div class='ctx'>      - Sequential ID of active snapshot. (Not used in e2fsprogs/Linux.)</div><div class='ctx'>    * - 0x188</div><div class='del'>-     - \_\_le64</div><div class='del'>-     - s\_snapshot\_r\_blocks\_count</div><div class='add'>+     - __le64</div><div class='add'>+     - s_snapshot_r_blocks_count</div><div class='ctx'>      - Number of blocks reserved for active snapshot's future use. (Not used in</div><div class='ctx'>        e2fsprogs/Linux.)</div><div class='ctx'>    * - 0x190</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_snapshot\_list</div><div class='add'>+     - __le32</div><div class='add'>+     - s_snapshot_list</div><div class='ctx'>      - inode number of the head of the on-disk snapshot list. (Not used in</div><div class='ctx'>        e2fsprogs/Linux.)</div><div class='ctx'>    * - 0x194</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_error\_count</div><div class='add'>+     - __le32</div><div class='add'>+     - s_error_count</div><div class='ctx'>      - Number of errors seen.</div><div class='ctx'>    * - 0x198</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_first\_error\_time</div><div class='add'>+     - __le32</div><div class='add'>+     - s_first_error_time</div><div class='ctx'>      - First time an error happened, in seconds since the epoch.</div><div class='ctx'>    * - 0x19C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_first\_error\_ino</div><div class='add'>+     - __le32</div><div class='add'>+     - s_first_error_ino</div><div class='ctx'>      - inode involved in first error.</div><div class='ctx'>    * - 0x1A0</div><div class='del'>-     - \_\_le64</div><div class='del'>-     - s\_first\_error\_block</div><div class='add'>+     - __le64</div><div class='add'>+     - s_first_error_block</div><div class='ctx'>      - Number of block involved of first error.</div><div class='ctx'>    * - 0x1A8</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_first\_error\_func[32]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_first_error_func[32]</div><div class='ctx'>      - Name of function where the error happened.</div><div class='ctx'>    * - 0x1C8</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_first\_error\_line</div><div class='add'>+     - __le32</div><div class='add'>+     - s_first_error_line</div><div class='ctx'>      - Line number where error happened.</div><div class='ctx'>    * - 0x1CC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_last\_error\_time</div><div class='add'>+     - __le32</div><div class='add'>+     - s_last_error_time</div><div class='ctx'>      - Time of most recent error, in seconds since the epoch.</div><div class='ctx'>    * - 0x1D0</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_last\_error\_ino</div><div class='add'>+     - __le32</div><div class='add'>+     - s_last_error_ino</div><div class='ctx'>      - inode involved in most recent error.</div><div class='ctx'>    * - 0x1D4</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_last\_error\_line</div><div class='add'>+     - __le32</div><div class='add'>+     - s_last_error_line</div><div class='ctx'>      - Line number where most recent error happened.</div><div class='ctx'>    * - 0x1D8</div><div class='del'>-     - \_\_le64</div><div class='del'>-     - s\_last\_error\_block</div><div class='add'>+     - __le64</div><div class='add'>+     - s_last_error_block</div><div class='ctx'>      - Number of block involved in most recent error.</div><div class='ctx'>    * - 0x1E0</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_last\_error\_func[32]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_last_error_func[32]</div><div class='ctx'>      - Name of function where the most recent error happened.</div><div class='ctx'>    * - 0x200</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_mount\_opts[64]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_mount_opts[64]</div><div class='ctx'>      - ASCIIZ string of mount options.</div><div class='ctx'>    * - 0x240</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_usr\_quota\_inum</div><div class='add'>+     - __le32</div><div class='add'>+     - s_usr_quota_inum</div><div class='ctx'>      - Inode number of user `quota &lt;quota&gt;`__ file.</div><div class='ctx'>    * - 0x244</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_grp\_quota\_inum</div><div class='add'>+     - __le32</div><div class='add'>+     - s_grp_quota_inum</div><div class='ctx'>      - Inode number of group `quota &lt;quota&gt;`__ file.</div><div class='ctx'>    * - 0x248</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_overhead\_blocks</div><div class='add'>+     - __le32</div><div class='add'>+     - s_overhead_blocks</div><div class='ctx'>      - Overhead blocks/clusters in fs. (Huh? This field is always zero, which</div><div class='ctx'>        means that the kernel calculates it dynamically.)</div><div class='ctx'>    * - 0x24C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_backup\_bgs[2]</div><div class='del'>-     - Block groups containing superblock backups (if sparse\_super2)</div><div class='add'>+     - __le32</div><div class='add'>+     - s_backup_bgs[2]</div><div class='add'>+     - Block groups containing superblock backups (if sparse_super2)</div><div class='ctx'>    * - 0x254</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_encrypt\_algos[4]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_encrypt_algos[4]</div><div class='ctx'>      - Encryption algorithms in use. There can be up to four algorithms in use</div><div class='ctx'>        at any time; valid algorithm codes are given in the super_encrypt_ table</div><div class='ctx'>        below.</div><div class='ctx'>    * - 0x258</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_encrypt\_pw\_salt[16]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_encrypt_pw_salt[16]</div><div class='ctx'>      - Salt for the string2key algorithm for encryption.</div><div class='ctx'>    * - 0x268</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_lpf\_ino</div><div class='add'>+     - __le32</div><div class='add'>+     - s_lpf_ino</div><div class='ctx'>      - Inode number of lost+found</div><div class='ctx'>    * - 0x26C</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_prj\_quota\_inum</div><div class='add'>+     - __le32</div><div class='add'>+     - s_prj_quota_inum</div><div class='ctx'>      - Inode that tracks project quotas.</div><div class='ctx'>    * - 0x270</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_checksum\_seed</div><div class='del'>-     - Checksum seed used for metadata\_csum calculations. This value is</div><div class='del'>-       crc32c(~0, $orig\_fs\_uuid).</div><div class='add'>+     - __le32</div><div class='add'>+     - s_checksum_seed</div><div class='add'>+     - Checksum seed used for metadata_csum calculations. This value is</div><div class='add'>+       crc32c(~0, $orig_fs_uuid).</div><div class='ctx'>    * - 0x274</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_wtime_hi</div><div class='add'>+     - __u8</div><div class='add'>+     - s_wtime_hi</div><div class='ctx'>      - Upper 8 bits of the s_wtime field.</div><div class='ctx'>    * - 0x275</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_mtime_hi</div><div class='add'>+     - __u8</div><div class='add'>+     - s_mtime_hi</div><div class='ctx'>      - Upper 8 bits of the s_mtime field.</div><div class='ctx'>    * - 0x276</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_mkfs_time_hi</div><div class='add'>+     - __u8</div><div class='add'>+     - s_mkfs_time_hi</div><div class='ctx'>      - Upper 8 bits of the s_mkfs_time field.</div><div class='ctx'>    * - 0x277</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_lastcheck_hi</div><div class='del'>-     - Upper 8 bits of the s_lastcheck_hi field.</div><div class='add'>+     - __u8</div><div class='add'>+     - s_lastcheck_hi</div><div class='add'>+     - Upper 8 bits of the s_lastcheck field.</div><div class='ctx'>    * - 0x278</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_first_error_time_hi</div><div class='del'>-     - Upper 8 bits of the s_first_error_time_hi field.</div><div class='add'>+     - __u8</div><div class='add'>+     - s_first_error_time_hi</div><div class='add'>+     - Upper 8 bits of the s_first_error_time field.</div><div class='ctx'>    * - 0x279</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_last_error_time_hi</div><div class='del'>-     - Upper 8 bits of the s_last_error_time_hi field.</div><div class='add'>+     - __u8</div><div class='add'>+     - s_last_error_time_hi</div><div class='add'>+     - Upper 8 bits of the s_last_error_time field.</div><div class='ctx'>    * - 0x27A</div><div class='del'>-     - \_\_u8</div><div class='del'>-     - s\_pad[2]</div><div class='add'>+     - __u8</div><div class='add'>+     - s_pad[2]</div><div class='ctx'>      - Zero padding.</div><div class='ctx'>    * - 0x27C</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_encoding</div><div class='add'>+     - __le16</div><div class='add'>+     - s_encoding</div><div class='ctx'>      - Filename charset encoding.</div><div class='ctx'>    * - 0x27E</div><div class='del'>-     - \_\_le16</div><div class='del'>-     - s\_encoding_flags</div><div class='add'>+     - __le16</div><div class='add'>+     - s_encoding_flags</div><div class='ctx'>      - Filename charset encoding flags.</div><div class='ctx'>    * - 0x280</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_orphan\_file\_inum</div><div class='add'>+     - __le32</div><div class='add'>+     - s_orphan_file_inum</div><div class='ctx'>      - Orphan file inode number.</div><div class='ctx'>    * - 0x284</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_reserved[94]</div><div class='add'>+     - __le32</div><div class='add'>+     - s_reserved[94]</div><div class='ctx'>      - Padding to the end of the block.</div><div class='ctx'>    * - 0x3FC</div><div class='del'>-     - \_\_le32</div><div class='del'>-     - s\_checksum</div><div class='add'>+     - __le32</div><div class='add'>+     - s_checksum</div><div class='ctx'>      - Superblock checksum.</div><div class='ctx'> </div><div class='ctx'> .. _super_state:</div><div class='hunk'>@@ -574,44 +574,44 @@ following:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='del'>-     - Directory preallocation (COMPAT\_DIR\_PREALLOC).</div><div class='add'>+     - Directory preallocation (COMPAT_DIR_PREALLOC).</div><div class='ctx'>    * - 0x2</div><div class='ctx'>      - “imagic inodes”. Not clear from the code what this does</div><div class='del'>-       (COMPAT\_IMAGIC\_INODES).</div><div class='add'>+       (COMPAT_IMAGIC_INODES).</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - Has a journal (COMPAT\_HAS\_JOURNAL).</div><div class='add'>+     - Has a journal (COMPAT_HAS_JOURNAL).</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - Supports extended attributes (COMPAT\_EXT\_ATTR).</div><div class='add'>+     - Supports extended attributes (COMPAT_EXT_ATTR).</div><div class='ctx'>    * - 0x10</div><div class='ctx'>      - Has reserved GDT blocks for filesystem expansion</div><div class='del'>-       (COMPAT\_RESIZE\_INODE). Requires RO\_COMPAT\_SPARSE\_SUPER.</div><div class='add'>+       (COMPAT_RESIZE_INODE). Requires RO_COMPAT_SPARSE_SUPER.</div><div class='ctx'>    * - 0x20</div><div class='del'>-     - Has directory indices (COMPAT\_DIR\_INDEX).</div><div class='add'>+     - Has directory indices (COMPAT_DIR_INDEX).</div><div class='ctx'>    * - 0x40</div><div class='ctx'>      - “Lazy BG”. Not in Linux kernel, seems to have been for uninitialized</div><div class='del'>-       block groups? (COMPAT\_LAZY\_BG)</div><div class='add'>+       block groups? (COMPAT_LAZY_BG)</div><div class='ctx'>    * - 0x80</div><div class='del'>-     - “Exclude inode”. Not used. (COMPAT\_EXCLUDE\_INODE).</div><div class='add'>+     - “Exclude inode”. Not used. (COMPAT_EXCLUDE_INODE).</div><div class='ctx'>    * - 0x100</div><div class='ctx'>      - “Exclude bitmap”. Seems to be used to indicate the presence of</div><div class='ctx'>        snapshot-related exclude bitmaps? Not defined in kernel or used in</div><div class='del'>-       e2fsprogs (COMPAT\_EXCLUDE\_BITMAP).</div><div class='add'>+       e2fsprogs (COMPAT_EXCLUDE_BITMAP).</div><div class='ctx'>    * - 0x200</div><div class='del'>-     - Sparse Super Block, v2. If this flag is set, the SB field s\_backup\_bgs</div><div class='add'>+     - Sparse Super Block, v2. If this flag is set, the SB field s_backup_bgs</div><div class='ctx'>        points to the two block groups that contain backup superblocks</div><div class='del'>-       (COMPAT\_SPARSE\_SUPER2).</div><div class='add'>+       (COMPAT_SPARSE_SUPER2).</div><div class='ctx'>    * - 0x400</div><div class='ctx'>      - Fast commits supported. Although fast commits blocks are</div><div class='ctx'>        backward incompatible, fast commit blocks are not always</div><div class='ctx'>        present in the journal. If fast commit blocks are present in</div><div class='ctx'>        the journal, JBD2 incompat feature</div><div class='del'>-       (JBD2\_FEATURE\_INCOMPAT\_FAST\_COMMIT) gets</div><div class='del'>-       set (COMPAT\_FAST\_COMMIT).</div><div class='add'>+       (JBD2_FEATURE_INCOMPAT_FAST_COMMIT) gets</div><div class='add'>+       set (COMPAT_FAST_COMMIT).</div><div class='ctx'>    * - 0x1000</div><div class='ctx'>      - Orphan file allocated. This is the special file for more efficient</div><div class='ctx'>        tracking of unlinked but still open inodes. When there may be any</div><div class='ctx'>        entries in the file, we additionally set proper rocompat feature</div><div class='del'>-       (RO\_COMPAT\_ORPHAN\_PRESENT).</div><div class='add'>+       (RO_COMPAT_ORPHAN_PRESENT).</div><div class='ctx'> </div><div class='ctx'> .. _super_incompat:</div><div class='ctx'> </div><div class='hunk'>@@ -625,45 +625,45 @@ following:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='del'>-     - Compression (INCOMPAT\_COMPRESSION).</div><div class='add'>+     - Compression (INCOMPAT_COMPRESSION).</div><div class='ctx'>    * - 0x2</div><div class='del'>-     - Directory entries record the file type. See ext4\_dir\_entry\_2 below</div><div class='del'>-       (INCOMPAT\_FILETYPE).</div><div class='add'>+     - Directory entries record the file type. See ext4_dir_entry_2 below</div><div class='add'>+       (INCOMPAT_FILETYPE).</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - Filesystem needs recovery (INCOMPAT\_RECOVER).</div><div class='add'>+     - Filesystem needs recovery (INCOMPAT_RECOVER).</div><div class='ctx'>    * - 0x8</div><div class='del'>-     - Filesystem has a separate journal device (INCOMPAT\_JOURNAL\_DEV).</div><div class='add'>+     - Filesystem has a separate journal device (INCOMPAT_JOURNAL_DEV).</div><div class='ctx'>    * - 0x10</div><div class='ctx'>      - Meta block groups. See the earlier discussion of this feature</div><div class='del'>-       (INCOMPAT\_META\_BG).</div><div class='add'>+       (INCOMPAT_META_BG).</div><div class='ctx'>    * - 0x40</div><div class='del'>-     - Files in this filesystem use extents (INCOMPAT\_EXTENTS).</div><div class='add'>+     - Files in this filesystem use extents (INCOMPAT_EXTENTS).</div><div class='ctx'>    * - 0x80</div><div class='del'>-     - Enable a filesystem size of 2^64 blocks (INCOMPAT\_64BIT).</div><div class='add'>+     - Enable a filesystem size of 2^64 blocks (INCOMPAT_64BIT).</div><div class='ctx'>    * - 0x100</div><div class='del'>-     - Multiple mount protection (INCOMPAT\_MMP).</div><div class='add'>+     - Multiple mount protection (INCOMPAT_MMP).</div><div class='ctx'>    * - 0x200</div><div class='ctx'>      - Flexible block groups. See the earlier discussion of this feature</div><div class='del'>-       (INCOMPAT\_FLEX\_BG).</div><div class='add'>+       (INCOMPAT_FLEX_BG).</div><div class='ctx'>    * - 0x400</div><div class='ctx'>      - Inodes can be used to store large extended attribute values</div><div class='del'>-       (INCOMPAT\_EA\_INODE).</div><div class='add'>+       (INCOMPAT_EA_INODE).</div><div class='ctx'>    * - 0x1000</div><div class='del'>-     - Data in directory entry (INCOMPAT\_DIRDATA). (Not implemented?)</div><div class='add'>+     - Data in directory entry (INCOMPAT_DIRDATA). (Not implemented?)</div><div class='ctx'>    * - 0x2000</div><div class='ctx'>      - Metadata checksum seed is stored in the superblock. This feature enables</div><div class='del'>-       the administrator to change the UUID of a metadata\_csum filesystem</div><div class='add'>+       the administrator to change the UUID of a metadata_csum filesystem</div><div class='ctx'>        while the filesystem is mounted; without it, the checksum definition</div><div class='del'>-       requires all metadata blocks to be rewritten (INCOMPAT\_CSUM\_SEED).</div><div class='add'>+       requires all metadata blocks to be rewritten (INCOMPAT_CSUM_SEED).</div><div class='ctx'>    * - 0x4000</div><div class='del'>-     - Large directory &gt;2GB or 3-level htree (INCOMPAT\_LARGEDIR). Prior to</div><div class='add'>+     - Large directory &gt;2GB or 3-level htree (INCOMPAT_LARGEDIR). Prior to</div><div class='ctx'>        this feature, directories could not be larger than 4GiB and could not</div><div class='ctx'>        have an htree more than 2 levels deep. If this feature is enabled,</div><div class='ctx'>        directories can be larger than 4GiB and have a maximum htree depth of 3.</div><div class='ctx'>    * - 0x8000</div><div class='del'>-     - Data in inode (INCOMPAT\_INLINE\_DATA).</div><div class='add'>+     - Data in inode (INCOMPAT_INLINE_DATA).</div><div class='ctx'>    * - 0x10000</div><div class='del'>-     - Encrypted inodes are present on the filesystem. (INCOMPAT\_ENCRYPT).</div><div class='add'>+     - Encrypted inodes are present on the filesystem. (INCOMPAT_ENCRYPT).</div><div class='ctx'> </div><div class='ctx'> .. _super_rocompat:</div><div class='ctx'> </div><div class='hunk'>@@ -678,54 +678,54 @@ the following:</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x1</div><div class='ctx'>      - Sparse superblocks. See the earlier discussion of this feature</div><div class='del'>-       (RO\_COMPAT\_SPARSE\_SUPER).</div><div class='add'>+       (RO_COMPAT_SPARSE_SUPER).</div><div class='ctx'>    * - 0x2</div><div class='ctx'>      - This filesystem has been used to store a file greater than 2GiB</div><div class='del'>-       (RO\_COMPAT\_LARGE\_FILE).</div><div class='add'>+       (RO_COMPAT_LARGE_FILE).</div><div class='ctx'>    * - 0x4</div><div class='del'>-     - Not used in kernel or e2fsprogs (RO\_COMPAT\_BTREE\_DIR).</div><div class='add'>+     - Not used in kernel or e2fsprogs (RO_COMPAT_BTREE_DIR).</div><div class='ctx'>    * - 0x8</div><div class='ctx'>      - This filesystem has files whose sizes are represented in units of</div><div class='ctx'>        logical blocks, not 512-byte sectors. This implies a very large file</div><div class='del'>-       indeed! (RO\_COMPAT\_HUGE\_FILE)</div><div class='add'>+       indeed! (RO_COMPAT_HUGE_FILE)</div><div class='ctx'>    * - 0x10</div><div class='ctx'>      - Group descriptors have checksums. In addition to detecting corruption,</div><div class='ctx'>        this is useful for lazy formatting with uninitialized groups</div><div class='del'>-       (RO\_COMPAT\_GDT\_CSUM).</div><div class='add'>+       (RO_COMPAT_GDT_CSUM).</div><div class='ctx'>    * - 0x20</div><div class='ctx'>      - Indicates that the old ext3 32,000 subdirectory limit no longer applies</div><div class='del'>-       (RO\_COMPAT\_DIR\_NLINK). A directory's i\_links\_count will be set to 1</div><div class='add'>+       (RO_COMPAT_DIR_NLINK). A directory's i_links_count will be set to 1</div><div class='ctx'>        if it is incremented past 64,999.</div><div class='ctx'>    * - 0x40</div><div class='ctx'>      - Indicates that large inodes exist on this filesystem</div><div class='del'>-       (RO\_COMPAT\_EXTRA\_ISIZE).</div><div class='add'>+       (RO_COMPAT_EXTRA_ISIZE).</div><div class='ctx'>    * - 0x80</div><div class='del'>-     - This filesystem has a snapshot (RO\_COMPAT\_HAS\_SNAPSHOT).</div><div class='add'>+     - This filesystem has a snapshot (RO_COMPAT_HAS_SNAPSHOT).</div><div class='ctx'>    * - 0x100</div><div class='del'>-     - `Quota &lt;Quota&gt;`__ (RO\_COMPAT\_QUOTA).</div><div class='add'>+     - `Quota &lt;Quota&gt;`__ (RO_COMPAT_QUOTA).</div><div class='ctx'>    * - 0x200</div><div class='ctx'>      - This filesystem supports “bigalloc”, which means that file extents are</div><div class='ctx'>        tracked in units of clusters (of blocks) instead of blocks</div><div class='del'>-       (RO\_COMPAT\_BIGALLOC).</div><div class='add'>+       (RO_COMPAT_BIGALLOC).</div><div class='ctx'>    * - 0x400</div><div class='ctx'>      - This filesystem supports metadata checksumming.</div><div class='del'>-       (RO\_COMPAT\_METADATA\_CSUM; implies RO\_COMPAT\_GDT\_CSUM, though</div><div class='del'>-       GDT\_CSUM must not be set)</div><div class='add'>+       (RO_COMPAT_METADATA_CSUM; implies RO_COMPAT_GDT_CSUM, though</div><div class='add'>+       GDT_CSUM must not be set)</div><div class='ctx'>    * - 0x800</div><div class='ctx'>      - Filesystem supports replicas. This feature is neither in the kernel nor</div><div class='del'>-       e2fsprogs. (RO\_COMPAT\_REPLICA)</div><div class='add'>+       e2fsprogs. (RO_COMPAT_REPLICA)</div><div class='ctx'>    * - 0x1000</div><div class='ctx'>      - Read-only filesystem image; the kernel will not mount this image</div><div class='ctx'>        read-write and most tools will refuse to write to the image.</div><div class='del'>-       (RO\_COMPAT\_READONLY)</div><div class='add'>+       (RO_COMPAT_READONLY)</div><div class='ctx'>    * - 0x2000</div><div class='del'>-     - Filesystem tracks project quotas. (RO\_COMPAT\_PROJECT)</div><div class='add'>+     - Filesystem tracks project quotas. (RO_COMPAT_PROJECT)</div><div class='ctx'>    * - 0x8000</div><div class='del'>-     - Verity inodes may be present on the filesystem. (RO\_COMPAT\_VERITY)</div><div class='add'>+     - Verity inodes may be present on the filesystem. (RO_COMPAT_VERITY)</div><div class='ctx'>    * - 0x10000</div><div class='ctx'>      - Indicates orphan file may have valid orphan entries and thus we need</div><div class='ctx'>        to clean them up when mounting the filesystem</div><div class='del'>-       (RO\_COMPAT\_ORPHAN\_PRESENT).</div><div class='add'>+       (RO_COMPAT_ORPHAN_PRESENT).</div><div class='ctx'> </div><div class='ctx'> .. _super_def_hash:</div><div class='ctx'> </div><div class='hunk'>@@ -761,36 +761,36 @@ The ``s_default_mount_opts`` field is any combination of the following:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0x0001</div><div class='del'>-     - Print debugging info upon (re)mount. (EXT4\_DEFM\_DEBUG)</div><div class='add'>+     - Print debugging info upon (re)mount. (EXT4_DEFM_DEBUG)</div><div class='ctx'>    * - 0x0002</div><div class='ctx'>      - New files take the gid of the containing directory (instead of the fsgid</div><div class='del'>-       of the current process). (EXT4\_DEFM\_BSDGROUPS)</div><div class='add'>+       of the current process). (EXT4_DEFM_BSDGROUPS)</div><div class='ctx'>    * - 0x0004</div><div class='del'>-     - Support userspace-provided extended attributes. (EXT4\_DEFM\_XATTR\_USER)</div><div class='add'>+     - Support userspace-provided extended attributes. (EXT4_DEFM_XATTR_USER)</div><div class='ctx'>    * - 0x0008</div><div class='del'>-     - Support POSIX access control lists (ACLs). (EXT4\_DEFM\_ACL)</div><div class='add'>+     - Support POSIX access control lists (ACLs). (EXT4_DEFM_ACL)</div><div class='ctx'>    * - 0x0010</div><div class='del'>-     - Do not support 32-bit UIDs. (EXT4\_DEFM\_UID16)</div><div class='add'>+     - Do not support 32-bit UIDs. (EXT4_DEFM_UID16)</div><div class='ctx'>    * - 0x0020</div><div class='ctx'>      - All data and metadata are commited to the journal.</div><div class='del'>-       (EXT4\_DEFM\_JMODE\_DATA)</div><div class='add'>+       (EXT4_DEFM_JMODE_DATA)</div><div class='ctx'>    * - 0x0040</div><div class='ctx'>      - All data are flushed to the disk before metadata are committed to the</div><div class='del'>-       journal. (EXT4\_DEFM\_JMODE\_ORDERED)</div><div class='add'>+       journal. (EXT4_DEFM_JMODE_ORDERED)</div><div class='ctx'>    * - 0x0060</div><div class='ctx'>      - Data ordering is not preserved; data may be written after the metadata</div><div class='del'>-       has been written. (EXT4\_DEFM\_JMODE\_WBACK)</div><div class='add'>+       has been written. (EXT4_DEFM_JMODE_WBACK)</div><div class='ctx'>    * - 0x0100</div><div class='del'>-     - Disable write flushes. (EXT4\_DEFM\_NOBARRIER)</div><div class='add'>+     - Disable write flushes. (EXT4_DEFM_NOBARRIER)</div><div class='ctx'>    * - 0x0200</div><div class='ctx'>      - Track which blocks in a filesystem are metadata and therefore should not</div><div class='ctx'>        be used as data blocks. This option will be enabled by default on 3.18,</div><div class='del'>-       hopefully. (EXT4\_DEFM\_BLOCK\_VALIDITY)</div><div class='add'>+       hopefully. (EXT4_DEFM_BLOCK_VALIDITY)</div><div class='ctx'>    * - 0x0400</div><div class='ctx'>      - Enable DISCARD support, where the storage device is told about blocks</div><div class='del'>-       becoming unused. (EXT4\_DEFM\_DISCARD)</div><div class='add'>+       becoming unused. (EXT4_DEFM_DISCARD)</div><div class='ctx'>    * - 0x0800</div><div class='del'>-     - Disable delayed allocation. (EXT4\_DEFM\_NODELALLOC)</div><div class='add'>+     - Disable delayed allocation. (EXT4_DEFM_NODELALLOC)</div><div class='ctx'> </div><div class='ctx'> .. _super_flags:</div><div class='ctx'> </div><div class='hunk'>@@ -820,12 +820,12 @@ The ``s_encrypt_algos`` list can contain any of the following:</div><div class='ctx'>    * - Value</div><div class='ctx'>      - Description</div><div class='ctx'>    * - 0</div><div class='del'>-     - Invalid algorithm (ENCRYPTION\_MODE\_INVALID).</div><div class='add'>+     - Invalid algorithm (ENCRYPTION_MODE_INVALID).</div><div class='ctx'>    * - 1</div><div class='del'>-     - 256-bit AES in XTS mode (ENCRYPTION\_MODE\_AES\_256\_XTS).</div><div class='add'>+     - 256-bit AES in XTS mode (ENCRYPTION_MODE_AES_256_XTS).</div><div class='ctx'>    * - 2</div><div class='del'>-     - 256-bit AES in GCM mode (ENCRYPTION\_MODE\_AES\_256\_GCM).</div><div class='add'>+     - 256-bit AES in GCM mode (ENCRYPTION_MODE_AES_256_GCM).</div><div class='ctx'>    * - 3</div><div class='del'>-     - 256-bit AES in CBC mode (ENCRYPTION\_MODE\_AES\_256\_CBC).</div><div class='add'>+     - 256-bit AES in CBC mode (ENCRYPTION_MODE_AES_256_CBC).</div><div class='ctx'> </div><div class='ctx'> Total size of the superblock is 1024 bytes.</div><div class='head'>diff --git a/Documentation/filesystems/f2fs.rst b/Documentation/filesystems/f2fs.rst<br/>index 4a2426f0485a..c57745375edb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/f2fs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/f2fs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/f2fs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/f2fs.rst</a></div><div class='hunk'>@@ -25,10 +25,14 @@ a consistency checking tool (fsck.f2fs), and a debugging tool (dump.f2fs).</div><div class='ctx'> </div><div class='ctx'> - git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git</div><div class='ctx'> </div><div class='del'>-For reporting bugs and sending patches, please use the following mailing list:</div><div class='add'>+For sending patches, please use the following mailing list:</div><div class='ctx'> </div><div class='ctx'> - linux-f2fs-devel@lists.sourceforge.net</div><div class='ctx'> </div><div class='add'>+For reporting bugs, please use the following f2fs bug tracker link:</div><div class='add'>+</div><div class='add'>+- https://bugzilla.kernel.org/enter_bug.cgi?product=File%20System&amp;component=f2fs</div><div class='add'>+</div><div class='ctx'> Background and Design issues</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='hunk'>@@ -154,6 +158,8 @@ nobarrier		 This option can be used if underlying storage guarantees</div><div class='ctx'> 			 If this option is set, no cache_flush commands are issued</div><div class='ctx'> 			 but f2fs still guarantees the write ordering of all the</div><div class='ctx'> 			 data writes.</div><div class='add'>+barrier			 If this option is set, cache_flush commands are allowed to be</div><div class='add'>+			 issued.</div><div class='ctx'> fastboot		 This option is used when a system wants to reduce mount</div><div class='ctx'> 			 time as much as possible, even though normal performance</div><div class='ctx'> 			 can be sacrificed.</div><div class='hunk'>@@ -199,6 +205,7 @@ fault_type=%d		 Support configuring fault injection type, should be</div><div class='ctx'> 			 FAULT_SLAB_ALLOC	  0x000008000</div><div class='ctx'> 			 FAULT_DQUOT_INIT	  0x000010000</div><div class='ctx'> 			 FAULT_LOCK_OP		  0x000020000</div><div class='add'>+			 FAULT_BLKADDR		  0x000040000</div><div class='ctx'> 			 ===================	  ===========</div><div class='ctx'> mode=%s			 Control block allocation mode which supports "adaptive"</div><div class='ctx'> 			 and "lfs". In "lfs" mode, there should be no random</div><div class='hunk'>@@ -235,12 +242,6 @@ offgrpjquota		 Turn off group journalled quota.</div><div class='ctx'> offprjjquota		 Turn off project journalled quota.</div><div class='ctx'> quota			 Enable plain user disk quota accounting.</div><div class='ctx'> noquota			 Disable all plain disk quota option.</div><div class='del'>-whint_mode=%s		 Control which write hints are passed down to block</div><div class='del'>-			 layer. This supports "off", "user-based", and</div><div class='del'>-			 "fs-based".  In "off" mode (default), f2fs does not pass</div><div class='del'>-			 down hints. In "user-based" mode, f2fs tries to pass</div><div class='del'>-			 down hints given by users. And in "fs-based" mode, f2fs</div><div class='del'>-			 passes down hints with its policy.</div><div class='ctx'> alloc_mode=%s		 Adjust block allocation policy, which supports "reuse"</div><div class='ctx'> 			 and "default".</div><div class='ctx'> fsync_mode=%s		 Control the policy of fsync. Currently supports "posix",</div><div class='hunk'>@@ -263,7 +264,7 @@ checkpoint=%s[:%u[%]]	 Set to "disable" to turn off checkpointing. Set to "enabl</div><div class='ctx'> 			 disabled, any unmounting or unexpected shutdowns will cause</div><div class='ctx'> 			 the filesystem contents to appear as they did when the</div><div class='ctx'> 			 filesystem was mounted with that option.</div><div class='del'>-			 While mounting with checkpoint=disabled, the filesystem must</div><div class='add'>+			 While mounting with checkpoint=disable, the filesystem must</div><div class='ctx'> 			 run garbage collection to ensure that all available space can</div><div class='ctx'> 			 be used. If this takes too much time, the mount may return</div><div class='ctx'> 			 EAGAIN. You may optionally add a value to indicate how much</div><div class='hunk'>@@ -292,9 +293,8 @@ compress_algorithm=%s:%d Control compress algorithm and its compress level, now,</div><div class='ctx'> 			 algorithm	level range</div><div class='ctx'> 			 lz4		3 - 16</div><div class='ctx'> 			 zstd		1 - 22</div><div class='del'>-compress_log_size=%u	 Support configuring compress cluster size, the size will</div><div class='del'>-			 be 4KB * (1 &lt;&lt; %u), 16KB is minimum size, also it's</div><div class='del'>-			 default size.</div><div class='add'>+compress_log_size=%u	 Support configuring compress cluster size. The size will</div><div class='add'>+			 be 4KB * (1 &lt;&lt; %u). The default and minimum sizes are 16KB.</div><div class='ctx'> compress_extension=%s	 Support adding specified extension, so that f2fs can enable</div><div class='ctx'> 			 compression on those corresponding files, e.g. if all files</div><div class='ctx'> 			 with '.ext' has high compression rate, we can set the '.ext'</div><div class='hunk'>@@ -342,6 +342,15 @@ discard_unit=%s		 Control discard unit, the argument can be "block", "segment"</div><div class='ctx'> 			 default, it is helpful for large sized SMR or ZNS devices to</div><div class='ctx'> 			 reduce memory cost by getting rid of fs metadata supports small</div><div class='ctx'> 			 discard.</div><div class='add'>+memory=%s		 Control memory mode. This supports "normal" and "low" modes.</div><div class='add'>+			 "low" mode is introduced to support low memory devices.</div><div class='add'>+			 Because of the nature of low memory devices, in this mode, f2fs</div><div class='add'>+			 will try to save memory sometimes by sacrificing performance.</div><div class='add'>+			 "normal" mode is the default mode and same as before.</div><div class='add'>+age_extent_cache	 Enable an age extent cache based on rb-tree. It records</div><div class='add'>+			 data block update frequency of the extent per inode, in</div><div class='add'>+			 order to provide better temperature hints for data block</div><div class='add'>+			 allocation.</div><div class='ctx'> ======================== ============================================================</div><div class='ctx'> </div><div class='ctx'> Debugfs Entries</div><div class='hunk'>@@ -751,70 +760,6 @@ In order to identify whether the data in the victim segment are valid or not,</div><div class='ctx'> F2FS manages a bitmap. Each bit represents the validity of a block, and the</div><div class='ctx'> bitmap is composed of a bit stream covering whole blocks in main area.</div><div class='ctx'> </div><div class='del'>-Write-hint Policy</div><div class='del'>------------------</div><div class='del'>-</div><div class='del'>-1) whint_mode=off. F2FS only passes down WRITE_LIFE_NOT_SET.</div><div class='del'>-</div><div class='del'>-2) whint_mode=user-based. F2FS tries to pass down hints given by</div><div class='del'>-users.</div><div class='del'>-</div><div class='del'>-===================== ======================== ===================</div><div class='del'>-User                  F2FS                     Block</div><div class='del'>-===================== ======================== ===================</div><div class='del'>-N/A                   META                     WRITE_LIFE_NOT_SET</div><div class='del'>-N/A                   HOT_NODE                 "</div><div class='del'>-N/A                   WARM_NODE                "</div><div class='del'>-N/A                   COLD_NODE                "</div><div class='del'>-ioctl(COLD)           COLD_DATA                WRITE_LIFE_EXTREME</div><div class='del'>-extension list        "                        "</div><div class='del'>-</div><div class='del'>--- buffered io</div><div class='del'>-WRITE_LIFE_EXTREME    COLD_DATA                WRITE_LIFE_EXTREME</div><div class='del'>-WRITE_LIFE_SHORT      HOT_DATA                 WRITE_LIFE_SHORT</div><div class='del'>-WRITE_LIFE_NOT_SET    WARM_DATA                WRITE_LIFE_NOT_SET</div><div class='del'>-WRITE_LIFE_NONE       "                        "</div><div class='del'>-WRITE_LIFE_MEDIUM     "                        "</div><div class='del'>-WRITE_LIFE_LONG       "                        "</div><div class='del'>-</div><div class='del'>--- direct io</div><div class='del'>-WRITE_LIFE_EXTREME    COLD_DATA                WRITE_LIFE_EXTREME</div><div class='del'>-WRITE_LIFE_SHORT      HOT_DATA                 WRITE_LIFE_SHORT</div><div class='del'>-WRITE_LIFE_NOT_SET    WARM_DATA                WRITE_LIFE_NOT_SET</div><div class='del'>-WRITE_LIFE_NONE       "                        WRITE_LIFE_NONE</div><div class='del'>-WRITE_LIFE_MEDIUM     "                        WRITE_LIFE_MEDIUM</div><div class='del'>-WRITE_LIFE_LONG       "                        WRITE_LIFE_LONG</div><div class='del'>-===================== ======================== ===================</div><div class='del'>-</div><div class='del'>-3) whint_mode=fs-based. F2FS passes down hints with its policy.</div><div class='del'>-</div><div class='del'>-===================== ======================== ===================</div><div class='del'>-User                  F2FS                     Block</div><div class='del'>-===================== ======================== ===================</div><div class='del'>-N/A                   META                     WRITE_LIFE_MEDIUM;</div><div class='del'>-N/A                   HOT_NODE                 WRITE_LIFE_NOT_SET</div><div class='del'>-N/A                   WARM_NODE                "</div><div class='del'>-N/A                   COLD_NODE                WRITE_LIFE_NONE</div><div class='del'>-ioctl(COLD)           COLD_DATA                WRITE_LIFE_EXTREME</div><div class='del'>-extension list        "                        "</div><div class='del'>-</div><div class='del'>--- buffered io</div><div class='del'>-WRITE_LIFE_EXTREME    COLD_DATA                WRITE_LIFE_EXTREME</div><div class='del'>-WRITE_LIFE_SHORT      HOT_DATA                 WRITE_LIFE_SHORT</div><div class='del'>-WRITE_LIFE_NOT_SET    WARM_DATA                WRITE_LIFE_LONG</div><div class='del'>-WRITE_LIFE_NONE       "                        "</div><div class='del'>-WRITE_LIFE_MEDIUM     "                        "</div><div class='del'>-WRITE_LIFE_LONG       "                        "</div><div class='del'>-</div><div class='del'>--- direct io</div><div class='del'>-WRITE_LIFE_EXTREME    COLD_DATA                WRITE_LIFE_EXTREME</div><div class='del'>-WRITE_LIFE_SHORT      HOT_DATA                 WRITE_LIFE_SHORT</div><div class='del'>-WRITE_LIFE_NOT_SET    WARM_DATA                WRITE_LIFE_NOT_SET</div><div class='del'>-WRITE_LIFE_NONE       "                        WRITE_LIFE_NONE</div><div class='del'>-WRITE_LIFE_MEDIUM     "                        WRITE_LIFE_MEDIUM</div><div class='del'>-WRITE_LIFE_LONG       "                        WRITE_LIFE_LONG</div><div class='del'>-===================== ======================== ===================</div><div class='del'>-</div><div class='ctx'> Fallocate(2) Policy</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='hunk'>@@ -888,10 +833,11 @@ Compression implementation</div><div class='ctx'>   Instead, the main goal is to reduce data writes to flash disk as much as</div><div class='ctx'>   possible, resulting in extending disk life time as well as relaxing IO</div><div class='ctx'>   congestion. Alternatively, we've added ioctl(F2FS_IOC_RELEASE_COMPRESS_BLOCKS)</div><div class='del'>-  interface to reclaim compressed space and show it to user after putting the</div><div class='del'>-  immutable bit. Immutable bit, after release, it doesn't allow writing/mmaping</div><div class='del'>-  on the file, until reserving compressed space via</div><div class='del'>-  ioctl(F2FS_IOC_RESERVE_COMPRESS_BLOCKS) or truncating filesize to zero.</div><div class='add'>+  interface to reclaim compressed space and show it to user after setting a</div><div class='add'>+  special flag to the inode. Once the compressed space is released, the flag</div><div class='add'>+  will block writing data to the file until either the compressed space is</div><div class='add'>+  reserved via ioctl(F2FS_IOC_RESERVE_COMPRESS_BLOCKS) or the file size is</div><div class='add'>+  truncated to zero.</div><div class='ctx'> </div><div class='ctx'> Compress metadata layout::</div><div class='ctx'> </div><div class='hunk'>@@ -900,12 +846,12 @@ Compress metadata layout::</div><div class='ctx'> 		| cluster 1 | cluster 2 | ......... | cluster N |</div><div class='ctx'> 		+-----------------------------------------------+</div><div class='ctx'> 		.           .                       .           .</div><div class='del'>-	.                       .                .                      .</div><div class='add'>+	  .                      .                .                      .</div><div class='ctx'>     .         Compressed Cluster       .        .        Normal Cluster            .</div><div class='ctx'>     +----------+---------+---------+---------+  +---------+---------+---------+---------+</div><div class='ctx'>     |compr flag| block 1 | block 2 | block 3 |  | block 1 | block 2 | block 3 | block 4 |</div><div class='ctx'>     +----------+---------+---------+---------+  +---------+---------+---------+---------+</div><div class='del'>-	    .                             .</div><div class='add'>+	       .                             .</div><div class='ctx'> 	    .                                           .</div><div class='ctx'> 	.                                                           .</div><div class='ctx'> 	+-------------+-------------+----------+----------------------------+</div><div class='head'>diff --git a/Documentation/filesystems/fscrypt.rst b/Documentation/filesystems/fscrypt.rst<br/>index 6ccd5efb25b7..eccd327e6df5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/fscrypt.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/fscrypt.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/fscrypt.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/fscrypt.rst</a></div><div class='hunk'>@@ -337,6 +337,8 @@ Currently, the following pairs of encryption modes are supported:</div><div class='ctx'> - AES-256-XTS for contents and AES-256-CTS-CBC for filenames</div><div class='ctx'> - AES-128-CBC for contents and AES-128-CTS-CBC for filenames</div><div class='ctx'> - Adiantum for both contents and filenames</div><div class='add'>+- AES-256-XTS for contents and AES-256-HCTR2 for filenames (v2 policies only)</div><div class='add'>+- SM4-XTS for contents and SM4-CTS-CBC for filenames (v2 policies only)</div><div class='ctx'> </div><div class='ctx'> If unsure, you should use the (AES-256-XTS, AES-256-CTS-CBC) pair.</div><div class='ctx'> </div><div class='hunk'>@@ -357,6 +359,23 @@ To use Adiantum, CONFIG_CRYPTO_ADIANTUM must be enabled.  Also, fast</div><div class='ctx'> implementations of ChaCha and NHPoly1305 should be enabled, e.g.</div><div class='ctx'> CONFIG_CRYPTO_CHACHA20_NEON and CONFIG_CRYPTO_NHPOLY1305_NEON for ARM.</div><div class='ctx'> </div><div class='add'>+AES-256-HCTR2 is another true wide-block encryption mode that is intended for</div><div class='add'>+use on CPUs with dedicated crypto instructions.  AES-256-HCTR2 has the property</div><div class='add'>+that a bitflip in the plaintext changes the entire ciphertext.  This property</div><div class='add'>+makes it desirable for filename encryption since initialization vectors are</div><div class='add'>+reused within a directory.  For more details on AES-256-HCTR2, see the paper</div><div class='add'>+"Length-preserving encryption with HCTR2"</div><div class='add'>+(https://eprint.iacr.org/2021/1441.pdf).  To use AES-256-HCTR2,</div><div class='add'>+CONFIG_CRYPTO_HCTR2 must be enabled.  Also, fast implementations of XCTR and</div><div class='add'>+POLYVAL should be enabled, e.g. CRYPTO_POLYVAL_ARM64_CE and</div><div class='add'>+CRYPTO_AES_ARM64_CE_BLK for ARM64.</div><div class='add'>+</div><div class='add'>+SM4 is a Chinese block cipher that is an alternative to AES.  It has</div><div class='add'>+not seen as much security review as AES, and it only has a 128-bit key</div><div class='add'>+size.  It may be useful in cases where its use is mandated.</div><div class='add'>+Otherwise, it should not be used.  For SM4 support to be available, it</div><div class='add'>+also needs to be enabled in the kernel crypto API.</div><div class='add'>+</div><div class='ctx'> New encryption modes can be added relatively easily, without changes</div><div class='ctx'> to individual filesystems.  However, authenticated encryption (AE)</div><div class='ctx'> modes are not currently supported because of the difficulty of dealing</div><div class='hunk'>@@ -404,11 +423,11 @@ alternatively has the file's nonce (for `DIRECT_KEY policies`_) or</div><div class='ctx'> inode number (for `IV_INO_LBLK_64 policies`_) included in the IVs.</div><div class='ctx'> Thus, IV reuse is limited to within a single directory.</div><div class='ctx'> </div><div class='del'>-With CTS-CBC, the IV reuse means that when the plaintext filenames</div><div class='del'>-share a common prefix at least as long as the cipher block size (16</div><div class='del'>-bytes for AES), the corresponding encrypted filenames will also share</div><div class='del'>-a common prefix.  This is undesirable.  Adiantum does not have this</div><div class='del'>-weakness, as it is a wide-block encryption mode.</div><div class='add'>+With CTS-CBC, the IV reuse means that when the plaintext filenames share a</div><div class='add'>+common prefix at least as long as the cipher block size (16 bytes for AES), the</div><div class='add'>+corresponding encrypted filenames will also share a common prefix.  This is</div><div class='add'>+undesirable.  Adiantum and HCTR2 do not have this weakness, as they are</div><div class='add'>+wide-block encryption modes.</div><div class='ctx'> </div><div class='ctx'> All supported filenames encryption modes accept any plaintext length</div><div class='ctx'> &gt;= 16 bytes; cipher block alignment is not required.  However,</div><div class='hunk'>@@ -1256,10 +1275,10 @@ inline encryption hardware will encrypt/decrypt the file contents.</div><div class='ctx'> When inline encryption isn't used, filesystems must encrypt/decrypt</div><div class='ctx'> the file contents themselves, as described below:</div><div class='ctx'> </div><div class='del'>-For the read path (-&gt;readpage()) of regular files, filesystems can</div><div class='add'>+For the read path (-&gt;read_folio()) of regular files, filesystems can</div><div class='ctx'> read the ciphertext into the page cache and decrypt it in-place.  The</div><div class='del'>-page lock must be held until decryption has finished, to prevent the</div><div class='del'>-page from becoming visible to userspace prematurely.</div><div class='add'>+folio lock must be held until decryption has finished, to prevent the</div><div class='add'>+folio from becoming visible to userspace prematurely.</div><div class='ctx'> </div><div class='ctx'> For the write path (-&gt;writepage()) of regular files, filesystems</div><div class='ctx'> cannot encrypt data in-place in the page cache, since the cached</div><div class='head'>diff --git a/Documentation/filesystems/fsverity.rst b/Documentation/filesystems/fsverity.rst<br/>index 8cc536d08f51..ede672dedf11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/fsverity.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/fsverity.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/fsverity.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/fsverity.rst</a></div><div class='hunk'>@@ -11,9 +11,9 @@ Introduction</div><div class='ctx'> </div><div class='ctx'> fs-verity (``fs/verity/``) is a support layer that filesystems can</div><div class='ctx'> hook into to support transparent integrity and authenticity protection</div><div class='del'>-of read-only files.  Currently, it is supported by the ext4 and f2fs</div><div class='del'>-filesystems.  Like fscrypt, not too much filesystem-specific code is</div><div class='del'>-needed to support fs-verity.</div><div class='add'>+of read-only files.  Currently, it is supported by the ext4, f2fs, and</div><div class='add'>+btrfs filesystems.  Like fscrypt, not too much filesystem-specific</div><div class='add'>+code is needed to support fs-verity.</div><div class='ctx'> </div><div class='ctx'> fs-verity is similar to `dm-verity</div><div class='ctx'> &lt;https://www.kernel.org/doc/Documentation/device-mapper/verity.txt&gt;`_</div><div class='hunk'>@@ -70,12 +70,23 @@ must live on a read-write filesystem because they are independently</div><div class='ctx'> updated and potentially user-installed, so dm-verity cannot be used.</div><div class='ctx'> </div><div class='ctx'> The base fs-verity feature is a hashing mechanism only; actually</div><div class='del'>-authenticating the files is up to userspace.  However, to meet some</div><div class='del'>-users' needs, fs-verity optionally supports a simple signature</div><div class='del'>-verification mechanism where users can configure the kernel to require</div><div class='del'>-that all fs-verity files be signed by a key loaded into a keyring; see</div><div class='del'>-`Built-in signature verification`_.  Support for fs-verity file hashes</div><div class='del'>-in IMA (Integrity Measurement Architecture) policies is also planned.</div><div class='add'>+authenticating the files may be done by:</div><div class='add'>+</div><div class='add'>+* Userspace-only</div><div class='add'>+</div><div class='add'>+* Builtin signature verification + userspace policy</div><div class='add'>+</div><div class='add'>+  fs-verity optionally supports a simple signature verification</div><div class='add'>+  mechanism where users can configure the kernel to require that</div><div class='add'>+  all fs-verity files be signed by a key loaded into a keyring;</div><div class='add'>+  see `Built-in signature verification`_.</div><div class='add'>+</div><div class='add'>+* Integrity Measurement Architecture (IMA)</div><div class='add'>+</div><div class='add'>+  IMA supports including fs-verity file digests and signatures in the</div><div class='add'>+  IMA measurement list and verifying fs-verity based file signatures</div><div class='add'>+  stored as security.ima xattrs, based on policy.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> User API</div><div class='ctx'> ========</div><div class='hunk'>@@ -107,10 +118,11 @@ as follows:</div><div class='ctx'> - ``hash_algorithm`` must be the identifier for the hash algorithm to</div><div class='ctx'>   use for the Merkle tree, such as FS_VERITY_HASH_ALG_SHA256.  See</div><div class='ctx'>   ``include/uapi/linux/fsverity.h`` for the list of possible values.</div><div class='del'>-- ``block_size`` must be the Merkle tree block size.  Currently, this</div><div class='del'>-  must be equal to the system page size, which is usually 4096 bytes.</div><div class='del'>-  Other sizes may be supported in the future.  This value is not</div><div class='del'>-  necessarily the same as the filesystem block size.</div><div class='add'>+- ``block_size`` is the Merkle tree block size, in bytes.  In Linux</div><div class='add'>+  v6.3 and later, this can be any power of 2 between (inclusively)</div><div class='add'>+  1024 and the minimum of the system page size and the filesystem</div><div class='add'>+  block size.  In earlier versions, the page size was the only allowed</div><div class='add'>+  value.</div><div class='ctx'> - ``salt_size`` is the size of the salt in bytes, or 0 if no salt is</div><div class='ctx'>   provided.  The salt is a value that is prepended to every hashed</div><div class='ctx'>   block; it can be used to personalize the hashing for a particular</div><div class='hunk'>@@ -150,6 +162,7 @@ FS_IOC_ENABLE_VERITY can fail with the following errors:</div><div class='ctx'> - ``EBUSY``: this ioctl is already running on the file</div><div class='ctx'> - ``EEXIST``: the file already has verity enabled</div><div class='ctx'> - ``EFAULT``: the caller provided inaccessible memory</div><div class='add'>+- ``EFBIG``: the file is too large to enable verity on</div><div class='ctx'> - ``EINTR``: the operation was interrupted by a fatal signal</div><div class='ctx'> - ``EINVAL``: unsupported version, hash algorithm, or block size; or</div><div class='ctx'>   reserved bits are set; or the file descriptor refers to neither a</div><div class='hunk'>@@ -462,9 +475,9 @@ files being swapped around.</div><div class='ctx'> Filesystem support</div><div class='ctx'> ==================</div><div class='ctx'> </div><div class='del'>-fs-verity is currently supported by the ext4 and f2fs filesystems.</div><div class='del'>-The CONFIG_FS_VERITY kconfig option must be enabled to use fs-verity</div><div class='del'>-on either filesystem.</div><div class='add'>+fs-verity is supported by several filesystems, described below.  The</div><div class='add'>+CONFIG_FS_VERITY kconfig option must be enabled to use fs-verity on</div><div class='add'>+any of these filesystems.</div><div class='ctx'> </div><div class='ctx'> ``include/linux/fsverity.h`` declares the interface between the</div><div class='ctx'> ``fs/verity/`` support layer and filesystems.  Briefly, filesystems</div><div class='hunk'>@@ -484,9 +497,11 @@ To create verity files on an ext4 filesystem, the filesystem must have</div><div class='ctx'> been formatted with ``-O verity`` or had ``tune2fs -O verity`` run on</div><div class='ctx'> it.  "verity" is an RO_COMPAT filesystem feature, so once set, old</div><div class='ctx'> kernels will only be able to mount the filesystem readonly, and old</div><div class='del'>-versions of e2fsck will be unable to check the filesystem.  Moreover,</div><div class='del'>-currently ext4 only supports mounting a filesystem with the "verity"</div><div class='del'>-feature when its block size is equal to PAGE_SIZE (often 4096 bytes).</div><div class='add'>+versions of e2fsck will be unable to check the filesystem.</div><div class='add'>+</div><div class='add'>+Originally, an ext4 filesystem with the "verity" feature could only be</div><div class='add'>+mounted when its block size was equal to the system page size</div><div class='add'>+(typically 4096 bytes).  In Linux v6.3, this limitation was removed.</div><div class='ctx'> </div><div class='ctx'> ext4 sets the EXT4_VERITY_FL on-disk inode flag on verity files.  It</div><div class='ctx'> can only be set by `FS_IOC_ENABLE_VERITY`_, and it cannot be cleared.</div><div class='hunk'>@@ -507,9 +522,7 @@ support paging multi-gigabyte xattrs into memory, and to support</div><div class='ctx'> encrypting xattrs.  Note that the verity metadata *must* be encrypted</div><div class='ctx'> when the file is, since it contains hashes of the plaintext data.</div><div class='ctx'> </div><div class='del'>-Currently, ext4 verity only supports the case where the Merkle tree</div><div class='del'>-block size, filesystem block size, and page size are all the same.  It</div><div class='del'>-also only supports extent-based files.</div><div class='add'>+ext4 only allows verity on extent-based files.</div><div class='ctx'> </div><div class='ctx'> f2fs</div><div class='ctx'> ----</div><div class='hunk'>@@ -527,11 +540,17 @@ Like ext4, f2fs stores the verity metadata (Merkle tree and</div><div class='ctx'> fsverity_descriptor) past the end of the file, starting at the first</div><div class='ctx'> 64K boundary beyond i_size.  See explanation for ext4 above.</div><div class='ctx'> Moreover, f2fs supports at most 4096 bytes of xattr entries per inode</div><div class='del'>-which wouldn't be enough for even a single Merkle tree block.</div><div class='add'>+which usually wouldn't be enough for even a single Merkle tree block.</div><div class='add'>+</div><div class='add'>+f2fs doesn't support enabling verity on files that currently have</div><div class='add'>+atomic or volatile writes pending.</div><div class='ctx'> </div><div class='del'>-Currently, f2fs verity only supports a Merkle tree block size of 4096.</div><div class='del'>-Also, f2fs doesn't support enabling verity on files that currently</div><div class='del'>-have atomic or volatile writes pending.</div><div class='add'>+btrfs</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+btrfs supports fs-verity since Linux v5.15.  Verity-enabled inodes are</div><div class='add'>+marked with a RO_COMPAT inode flag, and the verity metadata is stored</div><div class='add'>+in separate btree items.</div><div class='ctx'> </div><div class='ctx'> Implementation details</div><div class='ctx'> ======================</div><div class='hunk'>@@ -548,52 +567,49 @@ already verified).  Below, we describe how filesystems implement this.</div><div class='ctx'> Pagecache</div><div class='ctx'> ~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-For filesystems using Linux's pagecache, the ``-&gt;readpage()`` and</div><div class='del'>-``-&gt;readahead()`` methods must be modified to verify pages before they</div><div class='del'>-are marked Uptodate.  Merely hooking ``-&gt;read_iter()`` would be</div><div class='add'>+For filesystems using Linux's pagecache, the ``-&gt;read_folio()`` and</div><div class='add'>+``-&gt;readahead()`` methods must be modified to verify folios before</div><div class='add'>+they are marked Uptodate.  Merely hooking ``-&gt;read_iter()`` would be</div><div class='ctx'> insufficient, since ``-&gt;read_iter()`` is not used for memory maps.</div><div class='ctx'> </div><div class='del'>-Therefore, fs/verity/ provides a function fsverity_verify_page() which</div><div class='del'>-verifies a page that has been read into the pagecache of a verity</div><div class='del'>-inode, but is still locked and not Uptodate, so it's not yet readable</div><div class='del'>-by userspace.  As needed to do the verification,</div><div class='del'>-fsverity_verify_page() will call back into the filesystem to read</div><div class='del'>-Merkle tree pages via fsverity_operations::read_merkle_tree_page().</div><div class='add'>+Therefore, fs/verity/ provides the function fsverity_verify_blocks()</div><div class='add'>+which verifies data that has been read into the pagecache of a verity</div><div class='add'>+inode.  The containing folio must still be locked and not Uptodate, so</div><div class='add'>+it's not yet readable by userspace.  As needed to do the verification,</div><div class='add'>+fsverity_verify_blocks() will call back into the filesystem to read</div><div class='add'>+hash blocks via fsverity_operations::read_merkle_tree_page().</div><div class='ctx'> </div><div class='del'>-fsverity_verify_page() returns false if verification failed; in this</div><div class='del'>-case, the filesystem must not set the page Uptodate.  Following this,</div><div class='add'>+fsverity_verify_blocks() returns false if verification failed; in this</div><div class='add'>+case, the filesystem must not set the folio Uptodate.  Following this,</div><div class='ctx'> as per the usual Linux pagecache behavior, attempts by userspace to</div><div class='del'>-read() from the part of the file containing the page will fail with</div><div class='del'>-EIO, and accesses to the page within a memory map will raise SIGBUS.</div><div class='del'>-</div><div class='del'>-fsverity_verify_page() currently only supports the case where the</div><div class='del'>-Merkle tree block size is equal to PAGE_SIZE (often 4096 bytes).</div><div class='add'>+read() from the part of the file containing the folio will fail with</div><div class='add'>+EIO, and accesses to the folio within a memory map will raise SIGBUS.</div><div class='ctx'> </div><div class='del'>-In principle, fsverity_verify_page() verifies the entire path in the</div><div class='del'>-Merkle tree from the data page to the root hash.  However, for</div><div class='del'>-efficiency the filesystem may cache the hash pages.  Therefore,</div><div class='del'>-fsverity_verify_page() only ascends the tree reading hash pages until</div><div class='del'>-an already-verified hash page is seen, as indicated by the PageChecked</div><div class='del'>-bit being set.  It then verifies the path to that page.</div><div class='add'>+In principle, verifying a data block requires verifying the entire</div><div class='add'>+path in the Merkle tree from the data block to the root hash.</div><div class='add'>+However, for efficiency the filesystem may cache the hash blocks.</div><div class='add'>+Therefore, fsverity_verify_blocks() only ascends the tree reading hash</div><div class='add'>+blocks until an already-verified hash block is seen.  It then verifies</div><div class='add'>+the path to that block.</div><div class='ctx'> </div><div class='ctx'> This optimization, which is also used by dm-verity, results in</div><div class='ctx'> excellent sequential read performance.  This is because usually (e.g.</div><div class='del'>-127 in 128 times for 4K blocks and SHA-256) the hash page from the</div><div class='add'>+127 in 128 times for 4K blocks and SHA-256) the hash block from the</div><div class='ctx'> bottom level of the tree will already be cached and checked from</div><div class='del'>-reading a previous data page.  However, random reads perform worse.</div><div class='add'>+reading a previous data block.  However, random reads perform worse.</div><div class='ctx'> </div><div class='ctx'> Block device based filesystems</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> Block device based filesystems (e.g. ext4 and f2fs) in Linux also use</div><div class='ctx'> the pagecache, so the above subsection applies too.  However, they</div><div class='del'>-also usually read many pages from a file at once, grouped into a</div><div class='add'>+also usually read many data blocks from a file at once, grouped into a</div><div class='ctx'> structure called a "bio".  To make it easier for these types of</div><div class='ctx'> filesystems to support fs-verity, fs/verity/ also provides a function</div><div class='del'>-fsverity_verify_bio() which verifies all pages in a bio.</div><div class='add'>+fsverity_verify_bio() which verifies all data blocks in a bio.</div><div class='ctx'> </div><div class='ctx'> ext4 and f2fs also support encryption.  If a verity file is also</div><div class='del'>-encrypted, the pages must be decrypted before being verified.  To</div><div class='add'>+encrypted, the data must be decrypted before being verified.  To</div><div class='ctx'> support this, these filesystems allocate a "post-read context" for</div><div class='ctx'> each bio and store it in ``-&gt;bi_private``::</div><div class='ctx'> </div><div class='hunk'>@@ -608,17 +624,17 @@ each bio and store it in ``-&gt;bi_private``::</div><div class='ctx'> verity, or both is enabled.  After the bio completes, for each needed</div><div class='ctx'> postprocessing step the filesystem enqueues the bio_post_read_ctx on a</div><div class='ctx'> workqueue, and then the workqueue work does the decryption or</div><div class='del'>-verification.  Finally, pages where no decryption or verity error</div><div class='del'>-occurred are marked Uptodate, and the pages are unlocked.</div><div class='add'>+verification.  Finally, folios where no decryption or verity error</div><div class='add'>+occurred are marked Uptodate, and the folios are unlocked.</div><div class='ctx'> </div><div class='del'>-Files on ext4 and f2fs may contain holes.  Normally, ``-&gt;readahead()``</div><div class='del'>-simply zeroes holes and sets the corresponding pages Uptodate; no bios</div><div class='del'>-are issued.  To prevent this case from bypassing fs-verity, these</div><div class='del'>-filesystems use fsverity_verify_page() to verify hole pages.</div><div class='add'>+On many filesystems, files can contain holes.  Normally,</div><div class='add'>+``-&gt;readahead()`` simply zeroes hole blocks and considers the</div><div class='add'>+corresponding data to be up-to-date; no bios are issued.  To prevent</div><div class='add'>+this case from bypassing fs-verity, filesystems use</div><div class='add'>+fsverity_verify_blocks() to verify hole blocks.</div><div class='ctx'> </div><div class='del'>-ext4 and f2fs disable direct I/O on verity files, since otherwise</div><div class='del'>-direct I/O would bypass fs-verity.  (They also do the same for</div><div class='del'>-encrypted files.)</div><div class='add'>+Filesystems also disable direct I/O on verity files, since otherwise</div><div class='add'>+direct I/O would bypass fs-verity.</div><div class='ctx'> </div><div class='ctx'> Userspace utility</div><div class='ctx'> =================</div><div class='hunk'>@@ -626,7 +642,7 @@ Userspace utility</div><div class='ctx'> This document focuses on the kernel, but a userspace utility for</div><div class='ctx'> fs-verity can be found at:</div><div class='ctx'> </div><div class='del'>-	https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/fsverity-utils.git</div><div class='add'>+	https://git.kernel.org/pub/scm/fs/fsverity/fsverity-utils.git</div><div class='ctx'> </div><div class='ctx'> See the README.md file in the fsverity-utils source tree for details,</div><div class='ctx'> including examples of setting up fs-verity protected files.</div><div class='hunk'>@@ -637,7 +653,7 @@ Tests</div><div class='ctx'> To test fs-verity, use xfstests.  For example, using `kvm-xfstests</div><div class='ctx'> &lt;https://github.com/tytso/xfstests-bld/blob/master/Documentation/kvm-quickstart.md&gt;`_::</div><div class='ctx'> </div><div class='del'>-    kvm-xfstests -c ext4,f2fs -g verity</div><div class='add'>+    kvm-xfstests -c ext4,f2fs,btrfs -g verity</div><div class='ctx'> </div><div class='ctx'> FAQ</div><div class='ctx'> ===</div><div class='hunk'>@@ -653,12 +669,12 @@ weren't already directly answered in other parts of this document.</div><div class='ctx'>     hashed and what to do with those hashes, such as log them,</div><div class='ctx'>     authenticate them, or add them to a measurement list.</div><div class='ctx'> </div><div class='del'>-    IMA is planned to support the fs-verity hashing mechanism as an</div><div class='del'>-    alternative to doing full file hashes, for people who want the</div><div class='del'>-    performance and security benefits of the Merkle tree based hash.</div><div class='del'>-    But it doesn't make sense to force all uses of fs-verity to be</div><div class='del'>-    through IMA.  As a standalone filesystem feature, fs-verity</div><div class='del'>-    already meets many users' needs, and it's testable like other</div><div class='add'>+    IMA supports the fs-verity hashing mechanism as an alternative</div><div class='add'>+    to full file hashes, for those who want the performance and</div><div class='add'>+    security benefits of the Merkle tree based hash.  However, it</div><div class='add'>+    doesn't make sense to force all uses of fs-verity to be through</div><div class='add'>+    IMA.  fs-verity already meets many users' needs even as a</div><div class='add'>+    standalone filesystem feature, and it's testable like other</div><div class='ctx'>     filesystem features e.g. with xfstests.</div><div class='ctx'> </div><div class='ctx'> :Q: Isn't fs-verity useless because the attacker can just modify the</div><div class='hunk'>@@ -760,24 +776,24 @@ weren't already directly answered in other parts of this document.</div><div class='ctx'>     e.g. magically trigger construction of a Merkle tree.</div><div class='ctx'> </div><div class='ctx'> :Q: Does fs-verity support remote filesystems?</div><div class='del'>-:A: Only ext4 and f2fs support is implemented currently, but in</div><div class='del'>-    principle any filesystem that can store per-file verity metadata</div><div class='del'>-    can support fs-verity, regardless of whether it's local or remote.</div><div class='del'>-    Some filesystems may have fewer options of where to store the</div><div class='del'>-    verity metadata; one possibility is to store it past the end of</div><div class='del'>-    the file and "hide" it from userspace by manipulating i_size.  The</div><div class='del'>-    data verification functions provided by ``fs/verity/`` also assume</div><div class='del'>-    that the filesystem uses the Linux pagecache, but both local and</div><div class='del'>-    remote filesystems normally do so.</div><div class='add'>+:A: So far all filesystems that have implemented fs-verity support are</div><div class='add'>+    local filesystems, but in principle any filesystem that can store</div><div class='add'>+    per-file verity metadata can support fs-verity, regardless of</div><div class='add'>+    whether it's local or remote.  Some filesystems may have fewer</div><div class='add'>+    options of where to store the verity metadata; one possibility is</div><div class='add'>+    to store it past the end of the file and "hide" it from userspace</div><div class='add'>+    by manipulating i_size.  The data verification functions provided</div><div class='add'>+    by ``fs/verity/`` also assume that the filesystem uses the Linux</div><div class='add'>+    pagecache, but both local and remote filesystems normally do so.</div><div class='ctx'> </div><div class='ctx'> :Q: Why is anything filesystem-specific at all?  Shouldn't fs-verity</div><div class='ctx'>     be implemented entirely at the VFS level?</div><div class='ctx'> :A: There are many reasons why this is not possible or would be very</div><div class='ctx'>     difficult, including the following:</div><div class='ctx'> </div><div class='del'>-    - To prevent bypassing verification, pages must not be marked</div><div class='add'>+    - To prevent bypassing verification, folios must not be marked</div><div class='ctx'>       Uptodate until they've been verified.  Currently, each</div><div class='del'>-      filesystem is responsible for marking pages Uptodate via</div><div class='add'>+      filesystem is responsible for marking folios Uptodate via</div><div class='ctx'>       ``-&gt;readahead()``.  Therefore, currently it's not possible for</div><div class='ctx'>       the VFS to do the verification on its own.  Changing this would</div><div class='ctx'>       require significant changes to the VFS and all filesystems.</div><div class='head'>diff --git a/Documentation/filesystems/fuse.rst b/Documentation/filesystems/fuse.rst<br/>index 8120c3c0cb4e..1e31e87aee68 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/fuse.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/fuse.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/fuse.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/fuse.rst</a></div><div class='hunk'>@@ -279,7 +279,7 @@ How are requirements fulfilled?</div><div class='ctx'> 	the filesystem or not.</div><div class='ctx'> </div><div class='ctx'> 	Note that the *ptrace* check is not strictly necessary to</div><div class='del'>-	prevent B/2/i, it is enough to check if mount owner has enough</div><div class='add'>+	prevent C/2/i, it is enough to check if mount owner has enough</div><div class='ctx'> 	privilege to send signal to the process accessing the</div><div class='ctx'> 	filesystem, since *SIGSTOP* can be used to get a similar effect.</div><div class='ctx'> </div><div class='hunk'>@@ -288,10 +288,29 @@ I think these limitations are unacceptable?</div><div class='ctx'> </div><div class='ctx'> If a sysadmin trusts the users enough, or can ensure through other</div><div class='ctx'> measures, that system processes will never enter non-privileged</div><div class='del'>-mounts, it can relax the last limitation with a 'user_allow_other'</div><div class='del'>-config option.  If this config option is set, the mounting user can</div><div class='del'>-add the 'allow_other' mount option which disables the check for other</div><div class='del'>-users' processes.</div><div class='add'>+mounts, it can relax the last limitation in several ways:</div><div class='add'>+</div><div class='add'>+  - With the 'user_allow_other' config option. If this config option is</div><div class='add'>+    set, the mounting user can add the 'allow_other' mount option which</div><div class='add'>+    disables the check for other users' processes.</div><div class='add'>+</div><div class='add'>+    User namespaces have an unintuitive interaction with 'allow_other':</div><div class='add'>+    an unprivileged user - normally restricted from mounting with</div><div class='add'>+    'allow_other' - could do so in a user namespace where they're</div><div class='add'>+    privileged. If any process could access such an 'allow_other' mount</div><div class='add'>+    this would give the mounting user the ability to manipulate</div><div class='add'>+    processes in user namespaces where they're unprivileged. For this</div><div class='add'>+    reason 'allow_other' restricts access to users in the same userns</div><div class='add'>+    or a descendant.</div><div class='add'>+</div><div class='add'>+  - With the 'allow_sys_admin_access' module option. If this option is</div><div class='add'>+    set, super user's processes have unrestricted access to mounts</div><div class='add'>+    irrespective of allow_other setting or user namespace of the</div><div class='add'>+    mounting user.</div><div class='add'>+</div><div class='add'>+Note that both of these relaxations expose the system to potential</div><div class='add'>+information leak or *DoS* as described in points B and C/2/i-ii in the</div><div class='add'>+preceding section.</div><div class='ctx'> </div><div class='ctx'> Kernel - userspace interface</div><div class='ctx'> ============================</div><div class='head'>diff --git a/Documentation/filesystems/idmappings.rst b/Documentation/filesystems/idmappings.rst<br/>index 7a879ec3b6bf..ad6d21640576 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/idmappings.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/idmappings.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/idmappings.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/idmappings.rst</a></div><div class='hunk'>@@ -241,7 +241,7 @@ according to the filesystem's idmapping as this would give the wrong owner if</div><div class='ctx'> the caller is using an idmapping.</div><div class='ctx'> </div><div class='ctx'> So the kernel will map the id back up in the idmapping of the caller. Let's</div><div class='del'>-assume the caller has the slighly unconventional idmapping</div><div class='add'>+assume the caller has the somewhat unconventional idmapping</div><div class='ctx'> ``u3000:k20000:r10000`` then ``k21000`` would map back up to ``u4000``.</div><div class='ctx'> Consequently the user would see that this file is owned by ``u4000``.</div><div class='ctx'> </div><div class='hunk'>@@ -320,6 +320,10 @@ and equally wrong::</div><div class='ctx'>  from_kuid(u20000:k0:r10000, u1000) = k21000</div><div class='ctx'>                              ~~~~~</div><div class='ctx'> </div><div class='add'>+Since userspace ids have type ``uid_t`` and ``gid_t`` and kernel ids have type</div><div class='add'>+``kuid_t`` and ``kgid_t`` the compiler will throw an error when they are</div><div class='add'>+conflated. So the two examples above would cause a compilation failure.</div><div class='add'>+</div><div class='ctx'> Idmappings when creating filesystem objects</div><div class='ctx'> -------------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -369,6 +373,11 @@ kernel maps the caller's userspace id down into a kernel id according to the</div><div class='ctx'> caller's idmapping and then maps that kernel id up according to the</div><div class='ctx'> filesystem's idmapping.</div><div class='ctx'> </div><div class='add'>+Let's see some examples with caller/filesystem idmapping but without mount</div><div class='add'>+idmappings. This will exhibit some problems we can hit. After that we will</div><div class='add'>+revisit/reconsider these examples, this time using mount idmappings, to see how</div><div class='add'>+they can solve the problems we observed before.</div><div class='add'>+</div><div class='ctx'> Example 1</div><div class='ctx'> ~~~~~~~~~</div><div class='ctx'> </div><div class='hunk'>@@ -618,45 +627,108 @@ privileged users in the initial user namespace.</div><div class='ctx'> However, it is perfectly possible to combine idmapped mounts with filesystems</div><div class='ctx'> mountable inside user namespaces. We will touch on this further below.</div><div class='ctx'> </div><div class='add'>+Filesystem types vs idmapped mount types</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+With the introduction of idmapped mounts we need to distinguish between</div><div class='add'>+filesystem ownership and mount ownership of a VFS object such as an inode. The</div><div class='add'>+owner of a inode might be different when looked at from a filesystem</div><div class='add'>+perspective than when looked at from an idmapped mount. Such fundamental</div><div class='add'>+conceptual distinctions should almost always be clearly expressed in the code.</div><div class='add'>+So, to distinguish idmapped mount ownership from filesystem ownership separate</div><div class='add'>+types have been introduced.</div><div class='add'>+</div><div class='add'>+If a uid or gid has been generated using the filesystem or caller's idmapping</div><div class='add'>+then we will use the ``kuid_t`` and ``kgid_t`` types. However, if a uid or gid</div><div class='add'>+has been generated using a mount idmapping then we will be using the dedicated</div><div class='add'>+``vfsuid_t`` and ``vfsgid_t`` types.</div><div class='add'>+</div><div class='add'>+All VFS helpers that generate or take uids and gids as arguments use the</div><div class='add'>+``vfsuid_t`` and ``vfsgid_t`` types and we will be able to rely on the compiler</div><div class='add'>+to catch errors that originate from conflating filesystem and VFS uids and gids.</div><div class='add'>+</div><div class='add'>+The ``vfsuid_t`` and ``vfsgid_t`` types are often mapped from and to ``kuid_t``</div><div class='add'>+and ``kgid_t`` types similar how ``kuid_t`` and ``kgid_t`` types are mapped</div><div class='add'>+from and to ``uid_t`` and ``gid_t`` types::</div><div class='add'>+</div><div class='add'>+ uid_t &lt;--&gt; kuid_t &lt;--&gt; vfsuid_t</div><div class='add'>+ gid_t &lt;--&gt; kgid_t &lt;--&gt; vfsgid_t</div><div class='add'>+</div><div class='add'>+Whenever we report ownership based on a ``vfsuid_t`` or ``vfsgid_t`` type,</div><div class='add'>+e.g., during ``stat()``, or store ownership information in a shared VFS object</div><div class='add'>+based on a ``vfsuid_t`` or ``vfsgid_t`` type, e.g., during ``chown()`` we can</div><div class='add'>+use the ``vfsuid_into_kuid()`` and ``vfsgid_into_kgid()`` helpers.</div><div class='add'>+</div><div class='add'>+To illustrate why this helper currently exists, consider what happens when we</div><div class='add'>+change ownership of an inode from an idmapped mount. After we generated</div><div class='add'>+a ``vfsuid_t`` or ``vfsgid_t`` based on the mount idmapping we later commit to</div><div class='add'>+this ``vfsuid_t`` or ``vfsgid_t`` to become the new filesytem wide ownership.</div><div class='add'>+Thus, we are turning the ``vfsuid_t`` or ``vfsgid_t`` into a global ``kuid_t``</div><div class='add'>+or ``kgid_t``. And this can be done by using ``vfsuid_into_kuid()`` and</div><div class='add'>+``vfsgid_into_kgid()``.</div><div class='add'>+</div><div class='add'>+Note, whenever a shared VFS object, e.g., a cached ``struct inode`` or a cached</div><div class='add'>+``struct posix_acl``, stores ownership information a filesystem or "global"</div><div class='add'>+``kuid_t`` and ``kgid_t`` must be used. Ownership expressed via ``vfsuid_t``</div><div class='add'>+and ``vfsgid_t`` is specific to an idmapped mount.</div><div class='add'>+</div><div class='add'>+We already noted that ``vfsuid_t`` and ``vfsgid_t`` types are generated based</div><div class='add'>+on mount idmappings whereas ``kuid_t`` and ``kgid_t`` types are generated based</div><div class='add'>+on filesystem idmappings. To prevent abusing filesystem idmappings to generate</div><div class='add'>+``vfsuid_t`` or ``vfsgid_t`` types or mount idmappings to generate ``kuid_t``</div><div class='add'>+or ``kgid_t`` types filesystem idmappings and mount idmappings are different</div><div class='add'>+types as well.</div><div class='add'>+</div><div class='add'>+All helpers that map to or from ``vfsuid_t`` and ``vfsgid_t`` types require</div><div class='add'>+a mount idmapping to be passed which is of type ``struct mnt_idmap``. Passing</div><div class='add'>+a filesystem or caller idmapping will cause a compilation error.</div><div class='add'>+</div><div class='add'>+Similar to how we prefix all userspace ids in this document with ``u`` and all</div><div class='add'>+kernel ids with ``k`` we will prefix all VFS ids with ``v``. So a mount</div><div class='add'>+idmapping will be written as: ``u0:v10000:r10000``.</div><div class='add'>+</div><div class='ctx'> Remapping helpers</div><div class='ctx'> ~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> Idmapping functions were added that translate between idmappings. They make use</div><div class='del'>-of the remapping algorithm we've introduced earlier. We're going to look at</div><div class='del'>-two:</div><div class='add'>+of the remapping algorithm we've introduced earlier. We're going to look at:</div><div class='ctx'> </div><div class='del'>-- ``i_uid_into_mnt()`` and ``i_gid_into_mnt()``</div><div class='add'>+- ``i_uid_into_vfsuid()`` and ``i_gid_into_vfsgid()``</div><div class='ctx'> </div><div class='del'>-  The ``i_*id_into_mnt()`` functions translate filesystem's kernel ids into</div><div class='del'>-  kernel ids in the mount's idmapping::</div><div class='add'>+  The ``i_*id_into_vfs*id()`` functions translate filesystem's kernel ids into</div><div class='add'>+  VFS ids in the mount's idmapping::</div><div class='ctx'> </div><div class='ctx'>    /* Map the filesystem's kernel id up into a userspace id in the filesystem's idmapping. */</div><div class='ctx'>    from_kuid(filesystem, kid) = uid</div><div class='ctx'> </div><div class='del'>-   /* Map the filesystem's userspace id down ito a kernel id in the mount's idmapping. */</div><div class='add'>+   /* Map the filesystem's userspace id down ito a VFS id in the mount's idmapping. */</div><div class='ctx'>    make_kuid(mount, uid) = kuid</div><div class='ctx'> </div><div class='ctx'> - ``mapped_fsuid()`` and ``mapped_fsgid()``</div><div class='ctx'> </div><div class='ctx'>   The ``mapped_fs*id()`` functions translate the caller's kernel ids into</div><div class='ctx'>   kernel ids in the filesystem's idmapping. This translation is achieved by</div><div class='del'>-  remapping the caller's kernel ids using the mount's idmapping::</div><div class='add'>+  remapping the caller's VFS ids using the mount's idmapping::</div><div class='ctx'> </div><div class='del'>-   /* Map the caller's kernel id up into a userspace id in the mount's idmapping. */</div><div class='add'>+   /* Map the caller's VFS id up into a userspace id in the mount's idmapping. */</div><div class='ctx'>    from_kuid(mount, kid) = uid</div><div class='ctx'> </div><div class='ctx'>    /* Map the mount's userspace id down into a kernel id in the filesystem's idmapping. */</div><div class='ctx'>    make_kuid(filesystem, uid) = kuid</div><div class='ctx'> </div><div class='add'>+- ``vfsuid_into_kuid()`` and ``vfsgid_into_kgid()``</div><div class='add'>+</div><div class='add'>+   Whenever</div><div class='add'>+</div><div class='ctx'> Note that these two functions invert each other. Consider the following</div><div class='ctx'> idmappings::</div><div class='ctx'> </div><div class='ctx'>  caller idmapping:     u0:k10000:r10000</div><div class='ctx'>  filesystem idmapping: u0:k20000:r10000</div><div class='del'>- mount idmapping:      u0:k10000:r10000</div><div class='add'>+ mount idmapping:      u0:v10000:r10000</div><div class='ctx'> </div><div class='ctx'> Assume a file owned by ``u1000`` is read from disk. The filesystem maps this id</div><div class='del'>-to ``k21000`` according to it's idmapping. This is what is stored in the</div><div class='add'>+to ``k21000`` according to its idmapping. This is what is stored in the</div><div class='ctx'> inode's ``i_uid`` and ``i_gid`` fields.</div><div class='ctx'> </div><div class='ctx'> When the caller queries the ownership of this file via ``stat()`` the kernel</div><div class='hunk'>@@ -664,20 +736,21 @@ would usually simply use the crossmapping algorithm and map the filesystem's</div><div class='ctx'> kernel id up to a userspace id in the caller's idmapping.</div><div class='ctx'> </div><div class='ctx'> But when the caller is accessing the file on an idmapped mount the kernel will</div><div class='del'>-first call ``i_uid_into_mnt()`` thereby translating the filesystem's kernel id</div><div class='del'>-into a kernel id in the mount's idmapping::</div><div class='add'>+first call ``i_uid_into_vfsuid()`` thereby translating the filesystem's kernel</div><div class='add'>+id into a VFS id in the mount's idmapping::</div><div class='ctx'> </div><div class='del'>- i_uid_into_mnt(k21000):</div><div class='add'>+ i_uid_into_vfsuid(k21000):</div><div class='ctx'>    /* Map the filesystem's kernel id up into a userspace id. */</div><div class='ctx'>    from_kuid(u0:k20000:r10000, k21000) = u1000</div><div class='ctx'> </div><div class='del'>-   /* Map the filesystem's userspace id down ito a kernel id in the mount's idmapping. */</div><div class='del'>-   make_kuid(u0:k10000:r10000, u1000) = k11000</div><div class='add'>+   /* Map the filesystem's userspace id down into a VFS id in the mount's idmapping. */</div><div class='add'>+   make_kuid(u0:v10000:r10000, u1000) = v11000</div><div class='ctx'> </div><div class='ctx'> Finally, when the kernel reports the owner to the caller it will turn the</div><div class='del'>-kernel id in the mount's idmapping into a userspace id in the caller's</div><div class='add'>+VFS id in the mount's idmapping into a userspace id in the caller's</div><div class='ctx'> idmapping::</div><div class='ctx'> </div><div class='add'>+  k11000 = vfsuid_into_kuid(v11000)</div><div class='ctx'>   from_kuid(u0:k10000:r10000, k11000) = u1000</div><div class='ctx'> </div><div class='ctx'> We can test whether this algorithm really works by verifying what happens when</div><div class='hunk'>@@ -691,18 +764,19 @@ fails.</div><div class='ctx'> </div><div class='ctx'> But when the caller is accessing the file on an idmapped mount the kernel will</div><div class='ctx'> first call ``mapped_fs*id()`` thereby translating the caller's kernel id into</div><div class='del'>-a kernel id according to the mount's idmapping::</div><div class='add'>+a VFS id according to the mount's idmapping::</div><div class='ctx'> </div><div class='ctx'>  mapped_fsuid(k11000):</div><div class='ctx'>     /* Map the caller's kernel id up into a userspace id in the mount's idmapping. */</div><div class='ctx'>     from_kuid(u0:k10000:r10000, k11000) = u1000</div><div class='ctx'> </div><div class='ctx'>     /* Map the mount's userspace id down into a kernel id in the filesystem's idmapping. */</div><div class='del'>-    make_kuid(u0:k20000:r10000, u1000) = k21000</div><div class='add'>+    make_kuid(u0:v20000:r10000, u1000) = v21000</div><div class='ctx'> </div><div class='del'>-When finally writing to disk the kernel will then map ``k21000`` up into a</div><div class='add'>+When finally writing to disk the kernel will then map ``v21000`` up into a</div><div class='ctx'> userspace id in the filesystem's idmapping::</div><div class='ctx'> </div><div class='add'>+   k21000 = vfsuid_into_kuid(v21000)</div><div class='ctx'>    from_kuid(u0:k20000:r10000, k21000) = u1000</div><div class='ctx'> </div><div class='ctx'> As we can see, we end up with an invertible and therefore information</div><div class='hunk'>@@ -720,7 +794,7 @@ Example 2 reconsidered</div><div class='ctx'>  caller id:            u1000</div><div class='ctx'>  caller idmapping:     u0:k10000:r10000</div><div class='ctx'>  filesystem idmapping: u0:k20000:r10000</div><div class='del'>- mount idmapping:      u0:k10000:r10000</div><div class='add'>+ mount idmapping:      u0:v10000:r10000</div><div class='ctx'> </div><div class='ctx'> When the caller is using a non-initial idmapping the common case is to attach</div><div class='ctx'> the same idmapping to the mount. We now perform three steps:</div><div class='hunk'>@@ -729,12 +803,12 @@ the same idmapping to the mount. We now perform three steps:</div><div class='ctx'> </div><div class='ctx'>     make_kuid(u0:k10000:r10000, u1000) = k11000</div><div class='ctx'> </div><div class='del'>-2. Translate the caller's kernel id into a kernel id in the filesystem's</div><div class='add'>+2. Translate the caller's VFS id into a kernel id in the filesystem's</div><div class='ctx'>    idmapping::</div><div class='ctx'> </div><div class='del'>-    mapped_fsuid(k11000):</div><div class='del'>-      /* Map the kernel id up into a userspace id in the mount's idmapping. */</div><div class='del'>-      from_kuid(u0:k10000:r10000, k11000) = u1000</div><div class='add'>+    mapped_fsuid(v11000):</div><div class='add'>+      /* Map the VFS id up into a userspace id in the mount's idmapping. */</div><div class='add'>+      from_kuid(u0:v10000:r10000, v11000) = u1000</div><div class='ctx'> </div><div class='ctx'>       /* Map the userspace id down into a kernel id in the filesystem's idmapping. */</div><div class='ctx'>       make_kuid(u0:k20000:r10000, u1000) = k21000</div><div class='hunk'>@@ -754,7 +828,7 @@ Example 3 reconsidered</div><div class='ctx'>  caller id:            u1000</div><div class='ctx'>  caller idmapping:     u0:k10000:r10000</div><div class='ctx'>  filesystem idmapping: u0:k0:r4294967295</div><div class='del'>- mount idmapping:      u0:k10000:r10000</div><div class='add'>+ mount idmapping:      u0:v10000:r10000</div><div class='ctx'> </div><div class='ctx'> The same translation algorithm works with the third example.</div><div class='ctx'> </div><div class='hunk'>@@ -762,12 +836,12 @@ The same translation algorithm works with the third example.</div><div class='ctx'> </div><div class='ctx'>     make_kuid(u0:k10000:r10000, u1000) = k11000</div><div class='ctx'> </div><div class='del'>-2. Translate the caller's kernel id into a kernel id in the filesystem's</div><div class='add'>+2. Translate the caller's VFS id into a kernel id in the filesystem's</div><div class='ctx'>    idmapping::</div><div class='ctx'> </div><div class='del'>-    mapped_fsuid(k11000):</div><div class='del'>-       /* Map the kernel id up into a userspace id in the mount's idmapping. */</div><div class='del'>-       from_kuid(u0:k10000:r10000, k11000) = u1000</div><div class='add'>+    mapped_fsuid(v11000):</div><div class='add'>+       /* Map the VFS id up into a userspace id in the mount's idmapping. */</div><div class='add'>+       from_kuid(u0:v10000:r10000, v11000) = u1000</div><div class='ctx'> </div><div class='ctx'>        /* Map the userspace id down into a kernel id in the filesystem's idmapping. */</div><div class='ctx'>        make_kuid(u0:k0:r4294967295, u1000) = k1000</div><div class='hunk'>@@ -787,7 +861,7 @@ Example 4 reconsidered</div><div class='ctx'>  file id:              u1000</div><div class='ctx'>  caller idmapping:     u0:k10000:r10000</div><div class='ctx'>  filesystem idmapping: u0:k0:r4294967295</div><div class='del'>- mount idmapping:      u0:k10000:r10000</div><div class='add'>+ mount idmapping:      u0:v10000:r10000</div><div class='ctx'> </div><div class='ctx'> In order to report ownership to userspace the kernel now does three steps using</div><div class='ctx'> the translation algorithm we introduced earlier:</div><div class='hunk'>@@ -797,17 +871,18 @@ the translation algorithm we introduced earlier:</div><div class='ctx'> </div><div class='ctx'>     make_kuid(u0:k0:r4294967295, u1000) = k1000</div><div class='ctx'> </div><div class='del'>-2. Translate the kernel id into a kernel id in the mount's idmapping::</div><div class='add'>+2. Translate the kernel id into a VFS id in the mount's idmapping::</div><div class='ctx'> </div><div class='del'>-    i_uid_into_mnt(k1000):</div><div class='add'>+    i_uid_into_vfsuid(k1000):</div><div class='ctx'>       /* Map the kernel id up into a userspace id in the filesystem's idmapping. */</div><div class='ctx'>       from_kuid(u0:k0:r4294967295, k1000) = u1000</div><div class='ctx'> </div><div class='del'>-      /* Map the userspace id down into a kernel id in the mounts's idmapping. */</div><div class='del'>-      make_kuid(u0:k10000:r10000, u1000) = k11000</div><div class='add'>+      /* Map the userspace id down into a VFS id in the mounts's idmapping. */</div><div class='add'>+      make_kuid(u0:v10000:r10000, u1000) = v11000</div><div class='ctx'> </div><div class='del'>-3. Map the kernel id up into a userspace id in the caller's idmapping::</div><div class='add'>+3. Map the VFS id up into a userspace id in the caller's idmapping::</div><div class='ctx'> </div><div class='add'>+    k11000 = vfsuid_into_kuid(v11000)</div><div class='ctx'>     from_kuid(u0:k10000:r10000, k11000) = u1000</div><div class='ctx'> </div><div class='ctx'> Earlier, the caller's kernel id couldn't be crossmapped in the filesystems's</div><div class='hunk'>@@ -823,7 +898,7 @@ Example 5 reconsidered</div><div class='ctx'>  file id:              u1000</div><div class='ctx'>  caller idmapping:     u0:k10000:r10000</div><div class='ctx'>  filesystem idmapping: u0:k20000:r10000</div><div class='del'>- mount idmapping:      u0:k10000:r10000</div><div class='add'>+ mount idmapping:      u0:v10000:r10000</div><div class='ctx'> </div><div class='ctx'> Again, in order to report ownership to userspace the kernel now does three</div><div class='ctx'> steps using the translation algorithm we introduced earlier:</div><div class='hunk'>@@ -833,17 +908,18 @@ steps using the translation algorithm we introduced earlier:</div><div class='ctx'> </div><div class='ctx'>     make_kuid(u0:k20000:r10000, u1000) = k21000</div><div class='ctx'> </div><div class='del'>-2. Translate the kernel id into a kernel id in the mount's idmapping::</div><div class='add'>+2. Translate the kernel id into a VFS id in the mount's idmapping::</div><div class='ctx'> </div><div class='del'>-    i_uid_into_mnt(k21000):</div><div class='add'>+    i_uid_into_vfsuid(k21000):</div><div class='ctx'>       /* Map the kernel id up into a userspace id in the filesystem's idmapping. */</div><div class='ctx'>       from_kuid(u0:k20000:r10000, k21000) = u1000</div><div class='ctx'> </div><div class='del'>-      /* Map the userspace id down into a kernel id in the mounts's idmapping. */</div><div class='del'>-      make_kuid(u0:k10000:r10000, u1000) = k11000</div><div class='add'>+      /* Map the userspace id down into a VFS id in the mounts's idmapping. */</div><div class='add'>+      make_kuid(u0:v10000:r10000, u1000) = v11000</div><div class='ctx'> </div><div class='del'>-3. Map the kernel id up into a userspace id in the caller's idmapping::</div><div class='add'>+3. Map the VFS id up into a userspace id in the caller's idmapping::</div><div class='ctx'> </div><div class='add'>+    k11000 = vfsuid_into_kuid(v11000)</div><div class='ctx'>     from_kuid(u0:k10000:r10000, k11000) = u1000</div><div class='ctx'> </div><div class='ctx'> Earlier, the file's kernel id couldn't be crossmapped in the filesystems's</div><div class='hunk'>@@ -894,23 +970,23 @@ from above:::</div><div class='ctx'>  caller id:            u1125</div><div class='ctx'>  caller idmapping:     u0:k0:r4294967295</div><div class='ctx'>  filesystem idmapping: u0:k0:r4294967295</div><div class='del'>- mount idmapping:      u1000:k1125:r1</div><div class='add'>+ mount idmapping:      u1000:v1125:r1</div><div class='ctx'> </div><div class='ctx'> 1. Map the caller's userspace ids into kernel ids in the caller's idmapping::</div><div class='ctx'> </div><div class='ctx'>     make_kuid(u0:k0:r4294967295, u1125) = k1125</div><div class='ctx'> </div><div class='del'>-2. Translate the caller's kernel id into a kernel id in the filesystem's</div><div class='add'>+2. Translate the caller's VFS id into a kernel id in the filesystem's</div><div class='ctx'>    idmapping::</div><div class='ctx'> </div><div class='del'>-    mapped_fsuid(k1125):</div><div class='del'>-      /* Map the kernel id up into a userspace id in the mount's idmapping. */</div><div class='del'>-      from_kuid(u1000:k1125:r1, k1125) = u1000</div><div class='add'>+    mapped_fsuid(v1125):</div><div class='add'>+      /* Map the VFS id up into a userspace id in the mount's idmapping. */</div><div class='add'>+      from_kuid(u1000:v1125:r1, v1125) = u1000</div><div class='ctx'> </div><div class='ctx'>       /* Map the userspace id down into a kernel id in the filesystem's idmapping. */</div><div class='ctx'>       make_kuid(u0:k0:r4294967295, u1000) = k1000</div><div class='ctx'> </div><div class='del'>-2. Verify that the caller's kernel ids can be mapped to userspace ids in the</div><div class='add'>+2. Verify that the caller's filesystem ids can be mapped to userspace ids in the</div><div class='ctx'>    filesystem's idmapping::</div><div class='ctx'> </div><div class='ctx'>     from_kuid(u0:k0:r4294967295, k1000) = u1000</div><div class='hunk'>@@ -925,24 +1001,25 @@ on their work computer:</div><div class='ctx'>  file id:              u1000</div><div class='ctx'>  caller idmapping:     u0:k0:r4294967295</div><div class='ctx'>  filesystem idmapping: u0:k0:r4294967295</div><div class='del'>- mount idmapping:      u1000:k1125:r1</div><div class='add'>+ mount idmapping:      u1000:v1125:r1</div><div class='ctx'> </div><div class='ctx'> 1. Map the userspace id on disk down into a kernel id in the filesystem's</div><div class='ctx'>    idmapping::</div><div class='ctx'> </div><div class='ctx'>     make_kuid(u0:k0:r4294967295, u1000) = k1000</div><div class='ctx'> </div><div class='del'>-2. Translate the kernel id into a kernel id in the mount's idmapping::</div><div class='add'>+2. Translate the kernel id into a VFS id in the mount's idmapping::</div><div class='ctx'> </div><div class='del'>-    i_uid_into_mnt(k1000):</div><div class='add'>+    i_uid_into_vfsuid(k1000):</div><div class='ctx'>       /* Map the kernel id up into a userspace id in the filesystem's idmapping. */</div><div class='ctx'>       from_kuid(u0:k0:r4294967295, k1000) = u1000</div><div class='ctx'> </div><div class='del'>-      /* Map the userspace id down into a kernel id in the mounts's idmapping. */</div><div class='del'>-      make_kuid(u1000:k1125:r1, u1000) = k1125</div><div class='add'>+      /* Map the userspace id down into a VFS id in the mounts's idmapping. */</div><div class='add'>+      make_kuid(u1000:v1125:r1, u1000) = v1125</div><div class='ctx'> </div><div class='del'>-3. Map the kernel id up into a userspace id in the caller's idmapping::</div><div class='add'>+3. Map the VFS id up into a userspace id in the caller's idmapping::</div><div class='ctx'> </div><div class='add'>+    k1125 = vfsuid_into_kuid(v1125)</div><div class='ctx'>     from_kuid(u0:k0:r4294967295, k1125) = u1125</div><div class='ctx'> </div><div class='ctx'> So ultimately the caller will be reported that the file belongs to ``u1125``</div><div class='head'>diff --git a/Documentation/filesystems/index.rst b/Documentation/filesystems/index.rst<br/>index bee63d42e5ec..fbb2b5ada95b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/index.rst</a></div><div class='hunk'>@@ -123,4 +123,5 @@ Documentation for filesystem implementations.</div><div class='ctx'>    vfat</div><div class='ctx'>    xfs-delayed-logging-design</div><div class='ctx'>    xfs-self-describing-metadata</div><div class='add'>+   xfs-online-fsck-design</div><div class='ctx'>    zonefs</div><div class='head'>diff --git a/Documentation/filesystems/locking.rst b/Documentation/filesystems/locking.rst<br/>index c26d854275a0..aa1a233b0fa8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/locking.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/locking.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/locking.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/locking.rst</a></div><div class='hunk'>@@ -56,40 +56,42 @@ inode_operations</div><div class='ctx'> </div><div class='ctx'> prototypes::</div><div class='ctx'> </div><div class='del'>-	int (*create) (struct inode *,struct dentry *,umode_t, bool);</div><div class='add'>+	int (*create) (struct mnt_idmap *, struct inode *,struct dentry *,umode_t, bool);</div><div class='ctx'> 	struct dentry * (*lookup) (struct inode *,struct dentry *, unsigned int);</div><div class='ctx'> 	int (*link) (struct dentry *,struct inode *,struct dentry *);</div><div class='ctx'> 	int (*unlink) (struct inode *,struct dentry *);</div><div class='del'>-	int (*symlink) (struct inode *,struct dentry *,const char *);</div><div class='del'>-	int (*mkdir) (struct inode *,struct dentry *,umode_t);</div><div class='add'>+	int (*symlink) (struct mnt_idmap *, struct inode *,struct dentry *,const char *);</div><div class='add'>+	int (*mkdir) (struct mnt_idmap *, struct inode *,struct dentry *,umode_t);</div><div class='ctx'> 	int (*rmdir) (struct inode *,struct dentry *);</div><div class='del'>-	int (*mknod) (struct inode *,struct dentry *,umode_t,dev_t);</div><div class='del'>-	int (*rename) (struct inode *, struct dentry *,</div><div class='add'>+	int (*mknod) (struct mnt_idmap *, struct inode *,struct dentry *,umode_t,dev_t);</div><div class='add'>+	int (*rename) (struct mnt_idmap *, struct inode *, struct dentry *,</div><div class='ctx'> 			struct inode *, struct dentry *, unsigned int);</div><div class='ctx'> 	int (*readlink) (struct dentry *, char __user *,int);</div><div class='ctx'> 	const char *(*get_link) (struct dentry *, struct inode *, struct delayed_call *);</div><div class='ctx'> 	void (*truncate) (struct inode *);</div><div class='del'>-	int (*permission) (struct inode *, int, unsigned int);</div><div class='del'>-	struct posix_acl * (*get_acl)(struct inode *, int, bool);</div><div class='del'>-	int (*setattr) (struct dentry *, struct iattr *);</div><div class='del'>-	int (*getattr) (const struct path *, struct kstat *, u32, unsigned int);</div><div class='add'>+	int (*permission) (struct mnt_idmap *, struct inode *, int, unsigned int);</div><div class='add'>+	struct posix_acl * (*get_inode_acl)(struct inode *, int, bool);</div><div class='add'>+	int (*setattr) (struct mnt_idmap *, struct dentry *, struct iattr *);</div><div class='add'>+	int (*getattr) (struct mnt_idmap *, const struct path *, struct kstat *, u32, unsigned int);</div><div class='ctx'> 	ssize_t (*listxattr) (struct dentry *, char *, size_t);</div><div class='ctx'> 	int (*fiemap)(struct inode *, struct fiemap_extent_info *, u64 start, u64 len);</div><div class='ctx'> 	void (*update_time)(struct inode *, struct timespec *, int);</div><div class='ctx'> 	int (*atomic_open)(struct inode *, struct dentry *,</div><div class='ctx'> 				struct file *, unsigned open_flag,</div><div class='ctx'> 				umode_t create_mode);</div><div class='del'>-	int (*tmpfile) (struct inode *, struct dentry *, umode_t);</div><div class='del'>-	int (*fileattr_set)(struct user_namespace *mnt_userns,</div><div class='add'>+	int (*tmpfile) (struct mnt_idmap *, struct inode *,</div><div class='add'>+			struct file *, umode_t);</div><div class='add'>+	int (*fileattr_set)(struct mnt_idmap *idmap,</div><div class='ctx'> 			    struct dentry *dentry, struct fileattr *fa);</div><div class='ctx'> 	int (*fileattr_get)(struct dentry *dentry, struct fileattr *fa);</div><div class='add'>+	struct posix_acl * (*get_acl)(struct mnt_idmap *, struct dentry *, int);</div><div class='ctx'> </div><div class='ctx'> locking rules:</div><div class='ctx'> 	all may block</div><div class='ctx'> </div><div class='del'>-=============	=============================================</div><div class='add'>+==============	=============================================</div><div class='ctx'> ops		i_rwsem(inode)</div><div class='del'>-=============	=============================================</div><div class='add'>+==============	=============================================</div><div class='ctx'> lookup:		shared</div><div class='ctx'> create:		exclusive</div><div class='ctx'> link:		exclusive (both)</div><div class='hunk'>@@ -103,6 +105,7 @@ readlink:	no</div><div class='ctx'> get_link:	no</div><div class='ctx'> setattr:	exclusive</div><div class='ctx'> permission:	no (may not block if called in rcu-walk mode)</div><div class='add'>+get_inode_acl:	no</div><div class='ctx'> get_acl:	no</div><div class='ctx'> getattr:	no</div><div class='ctx'> listxattr:	no</div><div class='hunk'>@@ -112,7 +115,7 @@ atomic_open:	shared (exclusive if O_CREAT is set in open flags)</div><div class='ctx'> tmpfile:	no</div><div class='ctx'> fileattr_get:	no or exclusive</div><div class='ctx'> fileattr_set:	exclusive</div><div class='del'>-=============	=============================================</div><div class='add'>+==============	=============================================</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> 	Additionally, -&gt;rmdir(), -&gt;unlink() and -&gt;rename() have -&gt;i_rwsem</div><div class='hunk'>@@ -132,7 +135,7 @@ prototypes::</div><div class='ctx'> 		   struct inode *inode, const char *name, void *buffer,</div><div class='ctx'> 		   size_t size);</div><div class='ctx'> 	int (*set)(const struct xattr_handler *handler,</div><div class='del'>-                   struct user_namespace *mnt_userns,</div><div class='add'>+                   struct mnt_idmap *idmap,</div><div class='ctx'>                    struct dentry *dentry, struct inode *inode, const char *name,</div><div class='ctx'>                    const void *buffer, size_t size, int flags);</div><div class='ctx'> </div><div class='hunk'>@@ -237,65 +240,64 @@ address_space_operations</div><div class='ctx'> prototypes::</div><div class='ctx'> </div><div class='ctx'> 	int (*writepage)(struct page *page, struct writeback_control *wbc);</div><div class='del'>-	int (*readpage)(struct file *, struct page *);</div><div class='add'>+	int (*read_folio)(struct file *, struct folio *);</div><div class='ctx'> 	int (*writepages)(struct address_space *, struct writeback_control *);</div><div class='ctx'> 	bool (*dirty_folio)(struct address_space *, struct folio *folio);</div><div class='ctx'> 	void (*readahead)(struct readahead_control *);</div><div class='ctx'> 	int (*write_begin)(struct file *, struct address_space *mapping,</div><div class='del'>-				loff_t pos, unsigned len, unsigned flags,</div><div class='add'>+				loff_t pos, unsigned len,</div><div class='ctx'> 				struct page **pagep, void **fsdata);</div><div class='ctx'> 	int (*write_end)(struct file *, struct address_space *mapping,</div><div class='ctx'> 				loff_t pos, unsigned len, unsigned copied,</div><div class='ctx'> 				struct page *page, void *fsdata);</div><div class='ctx'> 	sector_t (*bmap)(struct address_space *, sector_t);</div><div class='ctx'> 	void (*invalidate_folio) (struct folio *, size_t start, size_t len);</div><div class='del'>-	int (*releasepage) (struct page *, int);</div><div class='del'>-	void (*freepage)(struct page *);</div><div class='add'>+	bool (*release_folio)(struct folio *, gfp_t);</div><div class='add'>+	void (*free_folio)(struct folio *);</div><div class='ctx'> 	int (*direct_IO)(struct kiocb *, struct iov_iter *iter);</div><div class='del'>-	bool (*isolate_page) (struct page *, isolate_mode_t);</div><div class='del'>-	int (*migratepage)(struct address_space *, struct page *, struct page *);</div><div class='del'>-	void (*putback_page) (struct page *);</div><div class='add'>+	int (*migrate_folio)(struct address_space *, struct folio *dst,</div><div class='add'>+			struct folio *src, enum migrate_mode);</div><div class='ctx'> 	int (*launder_folio)(struct folio *);</div><div class='ctx'> 	bool (*is_partially_uptodate)(struct folio *, size_t from, size_t count);</div><div class='ctx'> 	int (*error_remove_page)(struct address_space *, struct page *);</div><div class='del'>-	int (*swap_activate)(struct file *);</div><div class='add'>+	int (*swap_activate)(struct swap_info_struct *sis, struct file *f, sector_t *span)</div><div class='ctx'> 	int (*swap_deactivate)(struct file *);</div><div class='add'>+	int (*swap_rw)(struct kiocb *iocb, struct iov_iter *iter);</div><div class='ctx'> </div><div class='ctx'> locking rules:</div><div class='del'>-	All except dirty_folio and freepage may block</div><div class='add'>+	All except dirty_folio and free_folio may block</div><div class='ctx'> </div><div class='ctx'> ======================	======================== =========	===============</div><div class='del'>-ops			PageLocked(page)	 i_rwsem	invalidate_lock</div><div class='add'>+ops			folio locked		 i_rwsem	invalidate_lock</div><div class='ctx'> ======================	======================== =========	===============</div><div class='ctx'> writepage:		yes, unlocks (see below)</div><div class='del'>-readpage:		yes, unlocks				shared</div><div class='add'>+read_folio:		yes, unlocks				shared</div><div class='ctx'> writepages:</div><div class='del'>-dirty_folio		maybe</div><div class='add'>+dirty_folio:		maybe</div><div class='ctx'> readahead:		yes, unlocks				shared</div><div class='ctx'> write_begin:		locks the page		 exclusive</div><div class='ctx'> write_end:		yes, unlocks		 exclusive</div><div class='ctx'> bmap:</div><div class='ctx'> invalidate_folio:	yes					exclusive</div><div class='del'>-releasepage:		yes</div><div class='del'>-freepage:		yes</div><div class='add'>+release_folio:		yes</div><div class='add'>+free_folio:		yes</div><div class='ctx'> direct_IO:</div><div class='del'>-isolate_page:		yes</div><div class='del'>-migratepage:		yes (both)</div><div class='del'>-putback_page:		yes</div><div class='add'>+migrate_folio:		yes (both)</div><div class='ctx'> launder_folio:		yes</div><div class='ctx'> is_partially_uptodate:	yes</div><div class='ctx'> error_remove_page:	yes</div><div class='ctx'> swap_activate:		no</div><div class='ctx'> swap_deactivate:	no</div><div class='add'>+swap_rw:		yes, unlocks</div><div class='ctx'> ======================	======================== =========	===============</div><div class='ctx'> </div><div class='del'>--&gt;write_begin(), -&gt;write_end() and -&gt;readpage() may be called from</div><div class='add'>+-&gt;write_begin(), -&gt;write_end() and -&gt;read_folio() may be called from</div><div class='ctx'> the request handler (/dev/loop).</div><div class='ctx'> </div><div class='del'>--&gt;readpage() unlocks the page, either synchronously or via I/O</div><div class='add'>+-&gt;read_folio() unlocks the folio, either synchronously or via I/O</div><div class='ctx'> completion.</div><div class='ctx'> </div><div class='del'>--&gt;readahead() unlocks the pages that I/O is attempted on like -&gt;readpage().</div><div class='add'>+-&gt;readahead() unlocks the folios that I/O is attempted on like -&gt;read_folio().</div><div class='ctx'> </div><div class='ctx'> -&gt;writepage() is used for two purposes: for "memory cleansing" and for</div><div class='ctx'> "sync".  These are quite different operations and the behaviour may differ</div><div class='hunk'>@@ -372,12 +374,12 @@ invalidate_lock before invalidating page cache in truncate / hole punch</div><div class='ctx'> path (and thus calling into -&gt;invalidate_folio) to block races between page</div><div class='ctx'> cache invalidation and page cache filling functions (fault, read, ...).</div><div class='ctx'> </div><div class='del'>--&gt;releasepage() is called when the kernel is about to try to drop the</div><div class='del'>-buffers from the page in preparation for freeing it.  It returns zero to</div><div class='del'>-indicate that the buffers are (or may be) freeable.  If -&gt;releasepage is zero,</div><div class='del'>-the kernel assumes that the fs has no private interest in the buffers.</div><div class='add'>+-&gt;release_folio() is called when the kernel is about to try to drop the</div><div class='add'>+buffers from the folio in preparation for freeing it.  It returns false to</div><div class='add'>+indicate that the buffers are (or may be) freeable.  If -&gt;release_folio is</div><div class='add'>+NULL, the kernel assumes that the fs has no private interest in the buffers.</div><div class='ctx'> </div><div class='del'>--&gt;freepage() is called when the kernel is done dropping the page</div><div class='add'>+-&gt;free_folio() is called when the kernel has dropped the folio</div><div class='ctx'> from the page cache.</div><div class='ctx'> </div><div class='ctx'> -&gt;launder_folio() may be called prior to releasing a folio if</div><div class='hunk'>@@ -386,15 +388,19 @@ cleaned, or an error value if not. Note that in order to prevent the folio</div><div class='ctx'> getting mapped back in and redirtied, it needs to be kept locked</div><div class='ctx'> across the entire operation.</div><div class='ctx'> </div><div class='del'>--&gt;swap_activate will be called with a non-zero argument on</div><div class='del'>-files backing (non block device backed) swapfiles. A return value</div><div class='del'>-of zero indicates success, in which case this file can be used for</div><div class='del'>-backing swapspace. The swapspace operations will be proxied to the</div><div class='del'>-address space operations.</div><div class='add'>+-&gt;swap_activate() will be called to prepare the given file for swap.  It</div><div class='add'>+should perform any validation and preparation necessary to ensure that</div><div class='add'>+writes can be performed with minimal memory allocation.  It should call</div><div class='add'>+add_swap_extent(), or the helper iomap_swapfile_activate(), and return</div><div class='add'>+the number of extents added.  If IO should be submitted through</div><div class='add'>+-&gt;swap_rw(), it should set SWP_FS_OPS, otherwise IO will be submitted</div><div class='add'>+directly to the block device ``sis-&gt;bdev``.</div><div class='ctx'> </div><div class='ctx'> -&gt;swap_deactivate() will be called in the sys_swapoff()</div><div class='ctx'> path after -&gt;swap_activate() returned success.</div><div class='ctx'> </div><div class='add'>+-&gt;swap_rw will be called for swap IO if SWP_FS_OPS was set by -&gt;swap_activate().</div><div class='add'>+</div><div class='ctx'> file_lock_operations</div><div class='ctx'> ====================</div><div class='ctx'> </div><div class='hunk'>@@ -428,6 +434,8 @@ prototypes::</div><div class='ctx'> 	void (*lm_break)(struct file_lock *); /* break_lease callback */</div><div class='ctx'> 	int (*lm_change)(struct file_lock **, int);</div><div class='ctx'> 	bool (*lm_breaker_owns_lease)(struct file_lock *);</div><div class='add'>+        bool (*lm_lock_expirable)(struct file_lock *);</div><div class='add'>+        void (*lm_expire_lock)(void);</div><div class='ctx'> </div><div class='ctx'> locking rules:</div><div class='ctx'> </div><div class='hunk'>@@ -439,6 +447,8 @@ lm_grant:		no		no			no</div><div class='ctx'> lm_break:		yes		no			no</div><div class='ctx'> lm_change		yes		no			no</div><div class='ctx'> lm_breaker_owns_lease:	yes     	no			no</div><div class='add'>+lm_lock_expirable	yes		no			no</div><div class='add'>+lm_expire_lock		no		no			yes</div><div class='ctx'> ======================	=============	=================	=========</div><div class='ctx'> </div><div class='ctx'> buffer_head</div><div class='hunk'>@@ -635,7 +645,7 @@ ops		mmap_lock	PageLocked(page)</div><div class='ctx'> open:		yes</div><div class='ctx'> close:		yes</div><div class='ctx'> fault:		yes		can return with page locked</div><div class='del'>-map_pages:	yes</div><div class='add'>+map_pages:	read</div><div class='ctx'> page_mkwrite:	yes		can return with page locked</div><div class='ctx'> pfn_mkwrite:	yes</div><div class='ctx'> access:		yes</div><div class='hunk'>@@ -651,7 +661,7 @@ locked. The VM will unlock the page.</div><div class='ctx'> </div><div class='ctx'> -&gt;map_pages() is called when VM asks to map easy accessible pages.</div><div class='ctx'> Filesystem should find and map pages associated with offsets from "start_pgoff"</div><div class='del'>-till "end_pgoff". -&gt;map_pages() is called with page table locked and must</div><div class='add'>+till "end_pgoff". -&gt;map_pages() is called with the RCU lock held and must</div><div class='ctx'> not block.  If it's not possible to reach a page without blocking,</div><div class='ctx'> filesystem should skip it. Filesystem should use do_set_pte() to setup</div><div class='ctx'> page table entry. Pointer to entry associated with the page is passed in</div><div class='head'>diff --git a/Documentation/filesystems/mount_api.rst b/Documentation/filesystems/mount_api.rst<br/>index eb358a00be27..9aaf6ef75eb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/mount_api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/mount_api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/mount_api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/mount_api.rst</a></div><div class='hunk'>@@ -79,7 +79,6 @@ context.  This is represented by the fs_context structure::</div><div class='ctx'> 		unsigned int		sb_flags;</div><div class='ctx'> 		unsigned int		sb_flags_mask;</div><div class='ctx'> 		unsigned int		s_iflags;</div><div class='del'>-		unsigned int		lsm_flags;</div><div class='ctx'> 		enum fs_context_purpose	purpose:8;</div><div class='ctx'> 		...</div><div class='ctx'> 	};</div><div class='hunk'>@@ -562,17 +561,6 @@ or looking up of superblocks.</div><div class='ctx'> </div><div class='ctx'> The following helpers all wrap sget_fc():</div><div class='ctx'> </div><div class='del'>-   * ::</div><div class='del'>-</div><div class='del'>-       int vfs_get_super(struct fs_context *fc,</div><div class='del'>-		         enum vfs_get_super_keying keying,</div><div class='del'>-		         int (*fill_super)(struct super_block *sb,</div><div class='del'>-					   struct fs_context *fc))</div><div class='del'>-</div><div class='del'>-     This creates/looks up a deviceless superblock.  The keying indicates how</div><div class='del'>-     many superblocks of this type may exist and in what manner they may be</div><div class='del'>-     shared:</div><div class='del'>-</div><div class='ctx'> 	(1) vfs_get_single_super</div><div class='ctx'> </div><div class='ctx'> 	    Only one such superblock may exist in the system.  Any further</div><div class='hunk'>@@ -814,6 +802,7 @@ process the parameters it is given.</div><div class='ctx'>        int fs_lookup_param(struct fs_context *fc,</div><div class='ctx'> 			   struct fs_parameter *value,</div><div class='ctx'> 			   bool want_bdev,</div><div class='add'>+			   unsigned int flags,</div><div class='ctx'> 			   struct path *_path);</div><div class='ctx'> </div><div class='ctx'>      This takes a parameter that carries a string or filename type and attempts</div><div class='head'>diff --git a/Documentation/filesystems/netfs_library.rst b/Documentation/filesystems/netfs_library.rst<br/>index 69f00179fdfe..73a4176144b3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/netfs_library.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/netfs_library.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/netfs_library.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/netfs_library.rst</a></div><div class='hunk'>@@ -37,30 +37,31 @@ The network filesystem helper library needs a place to store a bit of state for</div><div class='ctx'> its use on each netfs inode it is helping to manage.  To this end, a context</div><div class='ctx'> structure is defined::</div><div class='ctx'> </div><div class='del'>-	struct netfs_i_context {</div><div class='add'>+	struct netfs_inode {</div><div class='add'>+		struct inode inode;</div><div class='ctx'> 		const struct netfs_request_ops *ops;</div><div class='del'>-		struct fscache_cookie	*cache;</div><div class='add'>+		struct fscache_cookie *cache;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-A network filesystem that wants to use netfs lib must place one of these</div><div class='del'>-directly after the VFS ``struct inode`` it allocates, usually as part of its</div><div class='del'>-own struct.  This can be done in a way similar to the following::</div><div class='add'>+A network filesystem that wants to use netfs lib must place one of these in its</div><div class='add'>+inode wrapper struct instead of the VFS ``struct inode``.  This can be done in</div><div class='add'>+a way similar to the following::</div><div class='ctx'> </div><div class='ctx'> 	struct my_inode {</div><div class='del'>-		struct {</div><div class='del'>-			/* These must be contiguous */</div><div class='del'>-			struct inode		vfs_inode;</div><div class='del'>-			struct netfs_i_context  netfs_ctx;</div><div class='del'>-		};</div><div class='add'>+		struct netfs_inode netfs; /* Netfslib context and vfs inode */</div><div class='ctx'> 		...</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-This allows netfslib to find its state by simple offset from the inode pointer,</div><div class='del'>-thereby allowing the netfslib helper functions to be pointed to directly by the</div><div class='del'>-VFS/VM operation tables.</div><div class='add'>+This allows netfslib to find its state by using ``container_of()`` from the</div><div class='add'>+inode pointer, thereby allowing the netfslib helper functions to be pointed to</div><div class='add'>+directly by the VFS/VM operation tables.</div><div class='ctx'> </div><div class='ctx'> The structure contains the following fields:</div><div class='ctx'> </div><div class='add'>+ * ``inode``</div><div class='add'>+</div><div class='add'>+   The VFS inode structure.</div><div class='add'>+</div><div class='ctx'>  * ``ops``</div><div class='ctx'> </div><div class='ctx'>    The set of operations provided by the network filesystem to netfslib.</div><div class='hunk'>@@ -78,25 +79,23 @@ To help deal with the per-inode context, a number helper functions are</div><div class='ctx'> provided.  Firstly, a function to perform basic initialisation on a context and</div><div class='ctx'> set the operations table pointer::</div><div class='ctx'> </div><div class='del'>-	void netfs_i_context_init(struct inode *inode,</div><div class='del'>-				  const struct netfs_request_ops *ops);</div><div class='add'>+	void netfs_inode_init(struct netfs_inode *ctx,</div><div class='add'>+			      const struct netfs_request_ops *ops);</div><div class='ctx'> </div><div class='del'>-then two functions to cast between the VFS inode structure and the netfs</div><div class='del'>-context::</div><div class='add'>+then a function to cast from the VFS inode structure to the netfs context::</div><div class='ctx'> </div><div class='del'>-	struct netfs_i_context *netfs_i_context(struct inode *inode);</div><div class='del'>-	struct inode *netfs_inode(struct netfs_i_context *ctx);</div><div class='add'>+	struct netfs_inode *netfs_node(struct inode *inode);</div><div class='ctx'> </div><div class='ctx'> and finally, a function to get the cache cookie pointer from the context</div><div class='ctx'> attached to an inode (or NULL if fscache is disabled)::</div><div class='ctx'> </div><div class='del'>-	struct fscache_cookie *netfs_i_cookie(struct inode *inode);</div><div class='add'>+	struct fscache_cookie *netfs_i_cookie(struct netfs_inode *ctx);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Buffered Read Helpers</div><div class='ctx'> =====================</div><div class='ctx'> </div><div class='del'>-The library provides a set of read helpers that handle the -&gt;readpage(),</div><div class='add'>+The library provides a set of read helpers that handle the -&gt;read_folio(),</div><div class='ctx'> -&gt;readahead() and much of the -&gt;write_begin() VM operations and translate them</div><div class='ctx'> into a common call framework.</div><div class='ctx'> </div><div class='hunk'>@@ -136,20 +135,20 @@ Read Helper Functions</div><div class='ctx'> Three read helpers are provided::</div><div class='ctx'> </div><div class='ctx'> 	void netfs_readahead(struct readahead_control *ractl);</div><div class='del'>-	int netfs_readpage(struct file *file,</div><div class='del'>-			   struct page *page);</div><div class='del'>-	int netfs_write_begin(struct file *file,</div><div class='add'>+	int netfs_read_folio(struct file *file,</div><div class='add'>+			     struct folio *folio);</div><div class='add'>+	int netfs_write_begin(struct netfs_inode *ctx,</div><div class='add'>+			      struct file *file,</div><div class='ctx'> 			      struct address_space *mapping,</div><div class='ctx'> 			      loff_t pos,</div><div class='ctx'> 			      unsigned int len,</div><div class='del'>-			      unsigned int flags,</div><div class='ctx'> 			      struct folio **_folio,</div><div class='ctx'> 			      void **_fsdata);</div><div class='ctx'> </div><div class='ctx'> Each corresponds to a VM address space operation.  These operations use the</div><div class='ctx'> state in the per-inode context.</div><div class='ctx'> </div><div class='del'>-For -&gt;readahead() and -&gt;readpage(), the network filesystem just point directly</div><div class='add'>+For -&gt;readahead() and -&gt;read_folio(), the network filesystem just point directly</div><div class='ctx'> at the corresponding read helper; whereas for -&gt;write_begin(), it may be a</div><div class='ctx'> little more complicated as the network filesystem might want to flush</div><div class='ctx'> conflicting writes or track dirty data and needs to put the acquired folio if</div><div class='hunk'>@@ -159,9 +158,10 @@ The helpers manage the read request, calling back into the network filesystem</div><div class='ctx'> through the suppplied table of operations.  Waits will be performed as</div><div class='ctx'> necessary before returning for helpers that are meant to be synchronous.</div><div class='ctx'> </div><div class='del'>-If an error occurs and netfs_priv is non-NULL, ops-&gt;cleanup() will be called to</div><div class='del'>-deal with it.  If some parts of the request are in progress when an error</div><div class='del'>-occurs, the request will get partially completed if sufficient data is read.</div><div class='add'>+If an error occurs, the -&gt;free_request() will be called to clean up the</div><div class='add'>+netfs_io_request struct allocated.  If some parts of the request are in</div><div class='add'>+progress when an error occurs, the request will get partially completed if</div><div class='add'>+sufficient data is read.</div><div class='ctx'> </div><div class='ctx'> Additionally, there is::</div><div class='ctx'> </div><div class='hunk'>@@ -209,8 +209,7 @@ The above fields are the ones the netfs can use.  They are:</div><div class='ctx'>  * ``netfs_priv``</div><div class='ctx'> </div><div class='ctx'>    The network filesystem's private data.  The value for this can be passed in</div><div class='del'>-   to the helper functions or set during the request.  The -&gt;cleanup() op will</div><div class='del'>-   be called if this is non-NULL at the end.</div><div class='add'>+   to the helper functions or set during the request.</div><div class='ctx'> </div><div class='ctx'>  * ``start``</div><div class='ctx'>  * ``len``</div><div class='hunk'>@@ -295,15 +294,15 @@ through which it can issue requests and negotiate::</div><div class='ctx'> </div><div class='ctx'> 	struct netfs_request_ops {</div><div class='ctx'> 		void (*init_request)(struct netfs_io_request *rreq, struct file *file);</div><div class='add'>+		void (*free_request)(struct netfs_io_request *rreq);</div><div class='ctx'> 		int (*begin_cache_operation)(struct netfs_io_request *rreq);</div><div class='ctx'> 		void (*expand_readahead)(struct netfs_io_request *rreq);</div><div class='ctx'> 		bool (*clamp_length)(struct netfs_io_subrequest *subreq);</div><div class='ctx'> 		void (*issue_read)(struct netfs_io_subrequest *subreq);</div><div class='ctx'> 		bool (*is_still_valid)(struct netfs_io_request *rreq);</div><div class='ctx'> 		int (*check_write_begin)(struct file *file, loff_t pos, unsigned len,</div><div class='del'>-					 struct folio *folio, void **_fsdata);</div><div class='add'>+					 struct folio **foliop, void **_fsdata);</div><div class='ctx'> 		void (*done)(struct netfs_io_request *rreq);</div><div class='del'>-		void (*cleanup)(struct address_space *mapping, void *netfs_priv);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> The operations are as follows:</div><div class='hunk'>@@ -311,7 +310,12 @@ The operations are as follows:</div><div class='ctx'>  * ``init_request()``</div><div class='ctx'> </div><div class='ctx'>    [Optional] This is called to initialise the request structure.  It is given</div><div class='del'>-   the file for reference and can modify the -&gt;netfs_priv value.</div><div class='add'>+   the file for reference.</div><div class='add'>+</div><div class='add'>+ * ``free_request()``</div><div class='add'>+</div><div class='add'>+   [Optional] This is called as the request is being deallocated so that the</div><div class='add'>+   filesystem can clean up any state it has attached there.</div><div class='ctx'> </div><div class='ctx'>  * ``begin_cache_operation()``</div><div class='ctx'> </div><div class='hunk'>@@ -377,19 +381,16 @@ The operations are as follows:</div><div class='ctx'>    allocated/grabbed the folio to be modified to allow the filesystem to flush</div><div class='ctx'>    conflicting state before allowing it to be modified.</div><div class='ctx'> </div><div class='del'>-   It should return 0 if everything is now fine, -EAGAIN if the folio should be</div><div class='del'>-   regrabbed and any other error code to abort the operation.</div><div class='add'>+   It may unlock and discard the folio it was given and set the caller's folio</div><div class='add'>+   pointer to NULL.  It should return 0 if everything is now fine (``*foliop``</div><div class='add'>+   left set) or the op should be retried (``*foliop`` cleared) and any other</div><div class='add'>+   error code to abort the operation.</div><div class='ctx'> </div><div class='ctx'>  * ``done``</div><div class='ctx'> </div><div class='ctx'>    [Optional] This is called after the folios in the request have all been</div><div class='ctx'>    unlocked (and marked uptodate if applicable).</div><div class='ctx'> </div><div class='del'>- * ``cleanup``</div><div class='del'>-</div><div class='del'>-   [Optional] This is called as the request is being deallocated so that the</div><div class='del'>-   filesystem can clean up -&gt;netfs_priv.</div><div class='del'>-</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Read Helper Procedure</div><div class='head'>diff --git a/Documentation/filesystems/nfs/client-identifier.rst b/Documentation/filesystems/nfs/client-identifier.rst<br/>new file mode 100644<br/>index 000000000000..a94c7a9748d7<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/nfs/client-identifier.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/nfs/client-identifier.rst</a></div><div class='hunk'>@@ -0,0 +1,216 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=======================</div><div class='add'>+NFSv4 client identifier</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+This document explains how the NFSv4 protocol identifies client</div><div class='add'>+instances in order to maintain file open and lock state during</div><div class='add'>+system restarts. A special identifier and principal are maintained</div><div class='add'>+on each client. These can be set by administrators, scripts</div><div class='add'>+provided by site administrators, or tools provided by Linux</div><div class='add'>+distributors.</div><div class='add'>+</div><div class='add'>+There are risks if a client's NFSv4 identifier and its principal</div><div class='add'>+are not chosen carefully.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+The NFSv4 protocol uses "lease-based file locking". Leases help</div><div class='add'>+NFSv4 servers provide file lock guarantees and manage their</div><div class='add'>+resources.</div><div class='add'>+</div><div class='add'>+Simply put, an NFSv4 server creates a lease for each NFSv4 client.</div><div class='add'>+The server collects each client's file open and lock state under</div><div class='add'>+the lease for that client.</div><div class='add'>+</div><div class='add'>+The client is responsible for periodically renewing its leases.</div><div class='add'>+While a lease remains valid, the server holding that lease</div><div class='add'>+guarantees the file locks the client has created remain in place.</div><div class='add'>+</div><div class='add'>+If a client stops renewing its lease (for example, if it crashes),</div><div class='add'>+the NFSv4 protocol allows the server to remove the client's open</div><div class='add'>+and lock state after a certain period of time. When a client</div><div class='add'>+restarts, it indicates to servers that open and lock state</div><div class='add'>+associated with its previous leases is no longer valid and can be</div><div class='add'>+destroyed immediately.</div><div class='add'>+</div><div class='add'>+In addition, each NFSv4 server manages a persistent list of client</div><div class='add'>+leases. When the server restarts and clients attempt to recover</div><div class='add'>+their state, the server uses this list to distinguish amongst</div><div class='add'>+clients that held state before the server restarted and clients</div><div class='add'>+sending fresh OPEN and LOCK requests. This enables file locks to</div><div class='add'>+persist safely across server restarts.</div><div class='add'>+</div><div class='add'>+NFSv4 client identifiers</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Each NFSv4 client presents an identifier to NFSv4 servers so that</div><div class='add'>+they can associate the client with its lease. Each client's</div><div class='add'>+identifier consists of two elements:</div><div class='add'>+</div><div class='add'>+  - co_ownerid: An arbitrary but fixed string.</div><div class='add'>+</div><div class='add'>+  - boot verifier: A 64-bit incarnation verifier that enables a</div><div class='add'>+    server to distinguish successive boot epochs of the same client.</div><div class='add'>+</div><div class='add'>+The NFSv4.0 specification refers to these two items as an</div><div class='add'>+"nfs_client_id4". The NFSv4.1 specification refers to these two</div><div class='add'>+items as a "client_owner4".</div><div class='add'>+</div><div class='add'>+NFSv4 servers tie this identifier to the principal and security</div><div class='add'>+flavor that the client used when presenting it. Servers use this</div><div class='add'>+principal to authorize subsequent lease modification operations</div><div class='add'>+sent by the client. Effectively this principal is a third element of</div><div class='add'>+the identifier.</div><div class='add'>+</div><div class='add'>+As part of the identity presented to servers, a good</div><div class='add'>+"co_ownerid" string has several important properties:</div><div class='add'>+</div><div class='add'>+  - The "co_ownerid" string identifies the client during reboot</div><div class='add'>+    recovery, therefore the string is persistent across client</div><div class='add'>+    reboots.</div><div class='add'>+  - The "co_ownerid" string helps servers distinguish the client</div><div class='add'>+    from others, therefore the string is globally unique. Note</div><div class='add'>+    that there is no central authority that assigns "co_ownerid"</div><div class='add'>+    strings.</div><div class='add'>+  - Because it often appears on the network in the clear, the</div><div class='add'>+    "co_ownerid" string does not reveal private information about</div><div class='add'>+    the client itself.</div><div class='add'>+  - The content of the "co_ownerid" string is set and unchanging</div><div class='add'>+    before the client attempts NFSv4 mounts after a restart.</div><div class='add'>+  - The NFSv4 protocol places a 1024-byte limit on the size of the</div><div class='add'>+    "co_ownerid" string.</div><div class='add'>+</div><div class='add'>+Protecting NFSv4 lease state</div><div class='add'>+----------------------------</div><div class='add'>+</div><div class='add'>+NFSv4 servers utilize the "client_owner4" as described above to</div><div class='add'>+assign a unique lease to each client. Under this scheme, there are</div><div class='add'>+circumstances where clients can interfere with each other. This is</div><div class='add'>+referred to as "lease stealing".</div><div class='add'>+</div><div class='add'>+If distinct clients present the same "co_ownerid" string and use</div><div class='add'>+the same principal (for example, AUTH_SYS and UID 0), a server is</div><div class='add'>+unable to tell that the clients are not the same. Each distinct</div><div class='add'>+client presents a different boot verifier, so it appears to the</div><div class='add'>+server as if there is one client that is rebooting frequently.</div><div class='add'>+Neither client can maintain open or lock state in this scenario.</div><div class='add'>+</div><div class='add'>+If distinct clients present the same "co_ownerid" string and use</div><div class='add'>+distinct principals, the server is likely to allow the first client</div><div class='add'>+to operate normally but reject subsequent clients with the same</div><div class='add'>+"co_ownerid" string.</div><div class='add'>+</div><div class='add'>+If a client's "co_ownerid" string or principal are not stable,</div><div class='add'>+state recovery after a server or client reboot is not guaranteed.</div><div class='add'>+If a client unexpectedly restarts but presents a different</div><div class='add'>+"co_ownerid" string or principal to the server, the server orphans</div><div class='add'>+the client's previous open and lock state. This blocks access to</div><div class='add'>+locked files until the server removes the orphaned state.</div><div class='add'>+</div><div class='add'>+If the server restarts and a client presents a changed "co_ownerid"</div><div class='add'>+string or principal to the server, the server will not allow the</div><div class='add'>+client to reclaim its open and lock state, and may give those locks</div><div class='add'>+to other clients in the meantime. This is referred to as "lock</div><div class='add'>+stealing".</div><div class='add'>+</div><div class='add'>+Lease stealing and lock stealing increase the potential for denial</div><div class='add'>+of service and in rare cases even data corruption.</div><div class='add'>+</div><div class='add'>+Selecting an appropriate client identifier</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+By default, the Linux NFSv4 client implementation constructs its</div><div class='add'>+"co_ownerid" string starting with the words "Linux NFS" followed by</div><div class='add'>+the client's UTS node name (the same node name, incidentally, that</div><div class='add'>+is used as the "machine name" in an AUTH_SYS credential). In small</div><div class='add'>+deployments, this construction is usually adequate. Often, however,</div><div class='add'>+the node name by itself is not adequately unique, and can change</div><div class='add'>+unexpectedly. Problematic situations include:</div><div class='add'>+</div><div class='add'>+  - NFS-root (diskless) clients, where the local DCHP server (or</div><div class='add'>+    equivalent) does not provide a unique host name.</div><div class='add'>+</div><div class='add'>+  - "Containers" within a single Linux host.  If each container has</div><div class='add'>+    a separate network namespace, but does not use the UTS namespace</div><div class='add'>+    to provide a unique host name, then there can be multiple NFS</div><div class='add'>+    client instances with the same host name.</div><div class='add'>+</div><div class='add'>+  - Clients across multiple administrative domains that access a</div><div class='add'>+    common NFS server. If hostnames are not assigned centrally</div><div class='add'>+    then uniqueness cannot be guaranteed unless a domain name is</div><div class='add'>+    included in the hostname.</div><div class='add'>+</div><div class='add'>+Linux provides two mechanisms to add uniqueness to its "co_ownerid"</div><div class='add'>+string:</div><div class='add'>+</div><div class='add'>+    nfs.nfs4_unique_id</div><div class='add'>+      This module parameter can set an arbitrary uniquifier string</div><div class='add'>+      via the kernel command line, or when the "nfs" module is</div><div class='add'>+      loaded.</div><div class='add'>+</div><div class='add'>+    /sys/fs/nfs/net/nfs_client/identifier</div><div class='add'>+      This virtual file, available since Linux 5.3, is local to the</div><div class='add'>+      network namespace in which it is accessed and so can provide</div><div class='add'>+      distinction between network namespaces (containers) when the</div><div class='add'>+      hostname remains uniform.</div><div class='add'>+</div><div class='add'>+Note that this file is empty on name-space creation. If the</div><div class='add'>+container system has access to some sort of per-container identity</div><div class='add'>+then that uniquifier can be used. For example, a uniquifier might</div><div class='add'>+be formed at boot using the container's internal identifier:</div><div class='add'>+</div><div class='add'>+    sha256sum /etc/machine-id | awk '{print $1}' \\</div><div class='add'>+        &gt; /sys/fs/nfs/net/nfs_client/identifier</div><div class='add'>+</div><div class='add'>+Security considerations</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+The use of cryptographic security for lease management operations</div><div class='add'>+is strongly encouraged.</div><div class='add'>+</div><div class='add'>+If NFS with Kerberos is not configured, a Linux NFSv4 client uses</div><div class='add'>+AUTH_SYS and UID 0 as the principal part of its client identity.</div><div class='add'>+This configuration is not only insecure, it increases the risk of</div><div class='add'>+lease and lock stealing. However, it might be the only choice for</div><div class='add'>+client configurations that have no local persistent storage.</div><div class='add'>+"co_ownerid" string uniqueness and persistence is critical in this</div><div class='add'>+case.</div><div class='add'>+</div><div class='add'>+When a Kerberos keytab is present on a Linux NFS client, the client</div><div class='add'>+attempts to use one of the principals in that keytab when</div><div class='add'>+identifying itself to servers. The "sec=" mount option does not</div><div class='add'>+control this behavior. Alternately, a single-user client with a</div><div class='add'>+Kerberos principal can use that principal in place of the client's</div><div class='add'>+host principal.</div><div class='add'>+</div><div class='add'>+Using Kerberos for this purpose enables the client and server to</div><div class='add'>+use the same lease for operations covered by all "sec=" settings.</div><div class='add'>+Additionally, the Linux NFS client uses the RPCSEC_GSS security</div><div class='add'>+flavor with Kerberos and the integrity QOS to prevent in-transit</div><div class='add'>+modification of lease modification requests.</div><div class='add'>+</div><div class='add'>+Additional notes</div><div class='add'>+----------------</div><div class='add'>+The Linux NFSv4 client establishes a single lease on each NFSv4</div><div class='add'>+server it accesses. NFSv4 mounts from a Linux NFSv4 client of a</div><div class='add'>+particular server then share that lease.</div><div class='add'>+</div><div class='add'>+Once a client establishes open and lock state, the NFSv4 protocol</div><div class='add'>+enables lease state to transition to other servers, following data</div><div class='add'>+that has been migrated. This hides data migration completely from</div><div class='add'>+running applications. The Linux NFSv4 client facilitates state</div><div class='add'>+migration by presenting the same "client_owner4" to all servers it</div><div class='add'>+encounters.</div><div class='add'>+</div><div class='add'>+========</div><div class='add'>+See Also</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+  - nfs(5)</div><div class='add'>+  - kerberos(7)</div><div class='add'>+  - RFC 7530 for the NFSv4.0 specification</div><div class='add'>+  - RFC 8881 for the NFSv4.1 specification.</div><div class='head'>diff --git a/Documentation/filesystems/nfs/index.rst b/Documentation/filesystems/nfs/index.rst<br/>index 288d8ddb2bc6..8536134f31fd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/nfs/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/nfs/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/nfs/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/nfs/index.rst</a></div><div class='hunk'>@@ -6,6 +6,8 @@ NFS</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='add'>+   client-identifier</div><div class='add'>+   exporting</div><div class='ctx'>    pnfs</div><div class='ctx'>    rpc-cache</div><div class='ctx'>    rpc-server-gss</div><div class='head'>diff --git a/Documentation/filesystems/ntfs3.rst b/Documentation/filesystems/ntfs3.rst<br/>index d67ccd22c63b..f0cf05cad2ba 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ntfs3.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ntfs3.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ntfs3.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ntfs3.rst</a></div><div class='hunk'>@@ -25,6 +25,11 @@ versions up to 3.1. File system type to use on mount is *ntfs3*.</div><div class='ctx'> 	  Note: Applied to empty files, this allows to switch type between</div><div class='ctx'> 	  sparse(0x200), compressed(0x800) and normal.</div><div class='ctx'> </div><div class='add'>+	- *system.ntfs_attrib_be* gets/sets ntfs file/dir attributes.</div><div class='add'>+</div><div class='add'>+	  Same value as system.ntfs_attrib but always represent as big-endian</div><div class='add'>+	  (endianness of system.ntfs_attrib is the same as of the CPU).</div><div class='add'>+</div><div class='ctx'> Mount Options</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='hunk'>@@ -56,17 +61,6 @@ this table marked with no it means default is without **no**.</div><div class='ctx'>        directories, fmask applies only to files and dmask only to directories.</div><div class='ctx'>    * - fmask=</div><div class='ctx'> </div><div class='del'>-   * - noacsrules</div><div class='del'>-     - "No access rules" mount option sets access rights for files/folders to</div><div class='del'>-       777 and owner/group to root. This mount option absorbs all other</div><div class='del'>-       permissions.</div><div class='del'>-</div><div class='del'>-       - Permissions change for files/folders will be reported as successful,</div><div class='del'>-	 but they will remain 777.</div><div class='del'>-</div><div class='del'>-       - Owner/group change will be reported as successful, butthey will stay</div><div class='del'>-	 as root.</div><div class='del'>-</div><div class='ctx'>    * - nohidden</div><div class='ctx'>      - Files with the Windows-specific HIDDEN (FILE_ATTRIBUTE_HIDDEN) attribute</div><div class='ctx'>        will not be shown under Linux.</div><div class='hunk'>@@ -75,6 +69,20 @@ this table marked with no it means default is without **no**.</div><div class='ctx'>      - Files with the Windows-specific SYSTEM (FILE_ATTRIBUTE_SYSTEM) attribute</div><div class='ctx'>        will be marked as system immutable files.</div><div class='ctx'> </div><div class='add'>+   * - hide_dot_files</div><div class='add'>+     - Updates the Windows-specific HIDDEN (FILE_ATTRIBUTE_HIDDEN) attribute</div><div class='add'>+       when creating and moving or renaming files. Files whose names start</div><div class='add'>+       with a dot will have the HIDDEN attribute set and files whose names</div><div class='add'>+       do not start with a dot will have it unset.</div><div class='add'>+</div><div class='add'>+   * - windows_names</div><div class='add'>+     - Prevents the creation of files and directories with a name not allowed</div><div class='add'>+       by Windows, either because it contains some not allowed character (which</div><div class='add'>+       are the characters " * / : &lt; &gt; ? \\ | and those whose code is less than</div><div class='add'>+       0x20), because the name (with or without extension) is a reserved file</div><div class='add'>+       name (CON, AUX, NUL, PRN, LPT1-9, COM1-9) or because the last character</div><div class='add'>+       is a space or a dot. Existing such files can still be read and renamed.</div><div class='add'>+</div><div class='ctx'>    * - discard</div><div class='ctx'>      - Enable support of the TRIM command for improved performance on delete</div><div class='ctx'>        operations, which is recommended for use with the solid-state drives</div><div class='head'>diff --git a/Documentation/filesystems/overlayfs.rst b/Documentation/filesystems/overlayfs.rst<br/>index 7da6c30ed596..4c76fda07645 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/overlayfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/overlayfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/overlayfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/overlayfs.rst</a></div><div class='hunk'>@@ -607,7 +607,7 @@ can be removed.</div><div class='ctx'> User xattr</div><div class='ctx'> ----------</div><div class='ctx'> </div><div class='del'>-The the "-o userxattr" mount option forces overlayfs to use the</div><div class='add'>+The "-o userxattr" mount option forces overlayfs to use the</div><div class='ctx'> "user.overlay." xattr namespace instead of "trusted.overlay.".  This is</div><div class='ctx'> useful for unprivileged mounting of overlayfs.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/porting.rst b/Documentation/filesystems/porting.rst<br/>index 7c1583dbeb59..d2d684ae7798 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/porting.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/porting.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/porting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/porting.rst</a></div><div class='hunk'>@@ -462,8 +462,8 @@ ERR_PTR(...).</div><div class='ctx'> argument; instead of passing IPERM_FLAG_RCU we add MAY_NOT_BLOCK into mask.</div><div class='ctx'> </div><div class='ctx'> generic_permission() has also lost the check_acl argument; ACL checking</div><div class='del'>-has been taken to VFS and filesystems need to provide a non-NULL -&gt;i_op-&gt;get_acl</div><div class='del'>-to read an ACL from disk.</div><div class='add'>+has been taken to VFS and filesystems need to provide a non-NULL</div><div class='add'>+-&gt;i_op-&gt;get_inode_acl to read an ACL from disk.</div><div class='ctx'> </div><div class='ctx'> ---</div><div class='ctx'> </div><div class='hunk'>@@ -624,7 +624,7 @@ any symlink that might use page_follow_link_light/page_put_link() must</div><div class='ctx'> have inode_nohighmem(inode) called before anything might start playing with</div><div class='ctx'> its pagecache.  No highmem pages should end up in the pagecache of such</div><div class='ctx'> symlinks.  That includes any preseeding that might be done during symlink</div><div class='del'>-creation.  __page_symlink() will honour the mapping gfp flags, so once</div><div class='add'>+creation.  page_symlink() will honour the mapping gfp flags, so once</div><div class='ctx'> you've done inode_nohighmem() it's safe to use, but if you allocate and</div><div class='ctx'> insert the page manually, make sure to use the right gfp flags.</div><div class='ctx'> </div><div class='hunk'>@@ -914,3 +914,32 @@ Calling conventions for file_open_root() changed; now it takes struct path *</div><div class='ctx'> instead of passing mount and dentry separately.  For callers that used to</div><div class='ctx'> pass &lt;mnt, mnt-&gt;mnt_root&gt; pair (i.e. the root of given mount), a new helper</div><div class='ctx'> is provided - file_open_root_mnt().  In-tree users adjusted.</div><div class='add'>+</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+**mandatory**</div><div class='add'>+</div><div class='add'>+no_llseek is gone; don't set .llseek to that - just leave it NULL instead.</div><div class='add'>+Checks for "does that file have llseek(2), or should it fail with ESPIPE"</div><div class='add'>+should be done by looking at FMODE_LSEEK in file-&gt;f_mode.</div><div class='add'>+</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+*mandatory*</div><div class='add'>+</div><div class='add'>+filldir_t (readdir callbacks) calling conventions have changed.  Instead of</div><div class='add'>+returning 0 or -E... it returns bool now.  false means "no more" (as -E... used</div><div class='add'>+to) and true - "keep going" (as 0 in old calling conventions).  Rationale:</div><div class='add'>+callers never looked at specific -E... values anyway.  -&gt;iterate() and</div><div class='add'>+-&gt;iterate_shared() instance require no changes at all, all filldir_t ones in</div><div class='add'>+the tree converted.</div><div class='add'>+</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+**mandatory**</div><div class='add'>+</div><div class='add'>+Calling conventions for -&gt;tmpfile() have changed.  It now takes a struct</div><div class='add'>+file pointer instead of struct dentry pointer.  d_tmpfile() is similarly</div><div class='add'>+changed to simplify callers.  The passed file is in a non-open state and on</div><div class='add'>+success must be opened before returning (e.g. by calling</div><div class='add'>+finish_open_simple()).</div><div class='head'>diff --git a/Documentation/filesystems/proc.rst b/Documentation/filesystems/proc.rst<br/>index 061744c436d9..7897a7dafcbc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/proc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/proc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/proc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/proc.rst</a></div><div class='hunk'>@@ -47,6 +47,7 @@ fixes/update part 1.1  Stefani Seibold &lt;stefani@seibold.net&gt;    June 9 2009</div><div class='ctx'>   3.10  /proc/&lt;pid&gt;/timerslack_ns - Task timerslack value</div><div class='ctx'>   3.11	/proc/&lt;pid&gt;/patch_state - Livepatch patch operation state</div><div class='ctx'>   3.12	/proc/&lt;pid&gt;/arch_status - Task architecture specific information</div><div class='add'>+  3.13  /proc/&lt;pid&gt;/fd - List of symlinks to open files</div><div class='ctx'> </div><div class='ctx'>   4	Configuring procfs</div><div class='ctx'>   4.1	Mount options</div><div class='hunk'>@@ -84,7 +85,7 @@ contact Bodo  Bauer  at  bb@ricochet.net.  We'll  be happy to add them to this</div><div class='ctx'> document.</div><div class='ctx'> </div><div class='ctx'> The   latest   version    of   this   document   is    available   online   at</div><div class='del'>-http://tldp.org/LDP/Linux-Filesystem-Hierarchy/html/proc.html</div><div class='add'>+https://www.kernel.org/doc/html/latest/filesystems/proc.html</div><div class='ctx'> </div><div class='ctx'> If  the above  direction does  not works  for you,  you could  try the  kernel</div><div class='ctx'> mailing  list  at  linux-kernel@vger.kernel.org  and/or try  to  reach  me  at</div><div class='hunk'>@@ -178,6 +179,7 @@ read the file /proc/PID/status::</div><div class='ctx'>   Gid:    100     100     100     100</div><div class='ctx'>   FDSize: 256</div><div class='ctx'>   Groups: 100 14 16</div><div class='add'>+  Kthread:    0</div><div class='ctx'>   VmPeak:     5004 kB</div><div class='ctx'>   VmSize:     5004 kB</div><div class='ctx'>   VmLck:         0 kB</div><div class='hunk'>@@ -231,7 +233,7 @@ asynchronous manner and the value may not be very precise. To see a precise</div><div class='ctx'> snapshot of a moment, you can see /proc/&lt;pid&gt;/smaps file and scan page table.</div><div class='ctx'> It's slow but very precise.</div><div class='ctx'> </div><div class='del'>-.. table:: Table 1-2: Contents of the status files (as of 4.19)</div><div class='add'>+.. table:: Table 1-2: Contents of the status fields (as of 4.19)</div><div class='ctx'> </div><div class='ctx'>  ==========================  ===================================================</div><div class='ctx'>  Field                       Content</div><div class='hunk'>@@ -245,7 +247,8 @@ It's slow but very precise.</div><div class='ctx'>  Ngid                        NUMA group ID (0 if none)</div><div class='ctx'>  Pid                         process id</div><div class='ctx'>  PPid                        process id of the parent process</div><div class='del'>- TracerPid                   PID of process tracing this process (0 if not)</div><div class='add'>+ TracerPid                   PID of process tracing this process (0 if not, or</div><div class='add'>+                             the tracer is outside of the current pid namespace)</div><div class='ctx'>  Uid                         Real, effective, saved set, and  file system UIDs</div><div class='ctx'>  Gid                         Real, effective, saved set, and  file system GIDs</div><div class='ctx'>  FDSize                      number of file descriptor slots currently allocated</div><div class='hunk'>@@ -254,6 +257,7 @@ It's slow but very precise.</div><div class='ctx'>  NSpid                       descendant namespace process ID hierarchy</div><div class='ctx'>  NSpgid                      descendant namespace process group ID hierarchy</div><div class='ctx'>  NSsid                       descendant namespace session ID hierarchy</div><div class='add'>+ Kthread                     kernel thread flag, 1 is yes, 0 is no</div><div class='ctx'>  VmPeak                      peak virtual memory size</div><div class='ctx'>  VmSize                      total program size</div><div class='ctx'>  VmLck                       locked memory size</div><div class='hunk'>@@ -303,7 +307,7 @@ It's slow but very precise.</div><div class='ctx'>  ==========================  ===================================================</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-.. table:: Table 1-3: Contents of the statm files (as of 2.6.8-rc3)</div><div class='add'>+.. table:: Table 1-3: Contents of the statm fields (as of 2.6.8-rc3)</div><div class='ctx'> </div><div class='ctx'>  ======== ===============================	==============================</div><div class='ctx'>  Field    Content</div><div class='hunk'>@@ -321,7 +325,7 @@ It's slow but very precise.</div><div class='ctx'>  ======== ===============================	==============================</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-.. table:: Table 1-4: Contents of the stat files (as of 2.6.30-rc7)</div><div class='add'>+.. table:: Table 1-4: Contents of the stat fields (as of 2.6.30-rc7)</div><div class='ctx'> </div><div class='ctx'>   ============= ===============================================================</div><div class='ctx'>   Field         Content</div><div class='hunk'>@@ -426,14 +430,16 @@ with the memory region, as the case would be with BSS (uninitialized data).</div><div class='ctx'> The "pathname" shows the name associated file for this mapping.  If the mapping</div><div class='ctx'> is not associated with a file:</div><div class='ctx'> </div><div class='del'>- =============              ====================================</div><div class='add'>+ ===================        ===========================================</div><div class='ctx'>  [heap]                     the heap of the program</div><div class='ctx'>  [stack]                    the stack of the main process</div><div class='ctx'>  [vdso]                     the "virtual dynamic shared object",</div><div class='ctx'>                             the kernel system call handler</div><div class='del'>- [anon:&lt;name&gt;]              an anonymous mapping that has been</div><div class='add'>+ [anon:&lt;name&gt;]              a private anonymous mapping that has been</div><div class='ctx'>                             named by userspace</div><div class='del'>- =============              ====================================</div><div class='add'>+ [anon_shmem:&lt;name&gt;]        an anonymous shared memory mapping that has</div><div class='add'>+                            been named by userspace</div><div class='add'>+ ===================        ===========================================</div><div class='ctx'> </div><div class='ctx'>  or if empty, the mapping is anonymous.</div><div class='ctx'> </div><div class='hunk'>@@ -448,6 +454,7 @@ Memory Area, or VMA) there is a series of lines such as the following::</div><div class='ctx'>     MMUPageSize:           4 kB</div><div class='ctx'>     Rss:                 892 kB</div><div class='ctx'>     Pss:                 374 kB</div><div class='add'>+    Pss_Dirty:             0 kB</div><div class='ctx'>     Shared_Clean:        892 kB</div><div class='ctx'>     Shared_Dirty:          0 kB</div><div class='ctx'>     Private_Clean:         0 kB</div><div class='hunk'>@@ -479,7 +486,9 @@ dirty shared and private pages in the mapping.</div><div class='ctx'> The "proportional set size" (PSS) of a process is the count of pages it has</div><div class='ctx'> in memory, where each page is divided by the number of processes sharing it.</div><div class='ctx'> So if a process has 1000 pages all to itself, and 1000 shared with one other</div><div class='del'>-process, its PSS will be 1500.</div><div class='add'>+process, its PSS will be 1500.  "Pss_Dirty" is the portion of PSS which</div><div class='add'>+consists of dirty pages.  ("Pss_Clean" is not included, but it can be</div><div class='add'>+calculated by subtracting "Pss_Dirty" from "Pss".)</div><div class='ctx'> </div><div class='ctx'> Note that even a page which is part of a MAP_SHARED mapping, but has only</div><div class='ctx'> a single pte mapped, i.e.  is currently used by only one process, is accounted</div><div class='hunk'>@@ -514,8 +523,10 @@ replaced by copy-on-write) part of the underlying shmem object out on swap.</div><div class='ctx'> "SwapPss" shows proportional swap share of this mapping. Unlike "Swap", this</div><div class='ctx'> does not take into account swapped out page of underlying shmem objects.</div><div class='ctx'> "Locked" indicates whether the mapping is locked in memory or not.</div><div class='add'>+</div><div class='ctx'> "THPeligible" indicates whether the mapping is eligible for allocating THP</div><div class='del'>-pages - 1 if true, 0 otherwise. It just shows the current status.</div><div class='add'>+pages as well as the THP is PMD mappable or not - 1 if true, 0 otherwise.</div><div class='add'>+It just shows the current status.</div><div class='ctx'> </div><div class='ctx'> "VmFlags" field deserves a separate description. This member represents the</div><div class='ctx'> kernel flags associated with the particular virtual memory area in two letter</div><div class='hunk'>@@ -942,56 +953,75 @@ can be substantial.  In many cases there are other means to find out</div><div class='ctx'> additional memory using subsystem specific interfaces, for instance</div><div class='ctx'> /proc/net/sockstat for TCP memory allocations.</div><div class='ctx'> </div><div class='del'>-The following is from a 16GB PIII, which has highmem enabled.</div><div class='del'>-You may not have all of these fields.</div><div class='add'>+Example output. You may not have all of these fields.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>     &gt; cat /proc/meminfo</div><div class='ctx'> </div><div class='del'>-    MemTotal:     16344972 kB</div><div class='del'>-    MemFree:      13634064 kB</div><div class='del'>-    MemAvailable: 14836172 kB</div><div class='del'>-    Buffers:          3656 kB</div><div class='del'>-    Cached:        1195708 kB</div><div class='del'>-    SwapCached:          0 kB</div><div class='del'>-    Active:         891636 kB</div><div class='del'>-    Inactive:      1077224 kB</div><div class='del'>-    HighTotal:    15597528 kB</div><div class='del'>-    HighFree:     13629632 kB</div><div class='del'>-    LowTotal:       747444 kB</div><div class='del'>-    LowFree:          4432 kB</div><div class='del'>-    SwapTotal:           0 kB</div><div class='del'>-    SwapFree:            0 kB</div><div class='del'>-    Dirty:             968 kB</div><div class='del'>-    Writeback:           0 kB</div><div class='del'>-    AnonPages:      861800 kB</div><div class='del'>-    Mapped:         280372 kB</div><div class='del'>-    Shmem:             644 kB</div><div class='del'>-    KReclaimable:   168048 kB</div><div class='del'>-    Slab:           284364 kB</div><div class='del'>-    SReclaimable:   159856 kB</div><div class='del'>-    SUnreclaim:     124508 kB</div><div class='del'>-    PageTables:      24448 kB</div><div class='del'>-    NFS_Unstable:        0 kB</div><div class='del'>-    Bounce:              0 kB</div><div class='del'>-    WritebackTmp:        0 kB</div><div class='del'>-    CommitLimit:   7669796 kB</div><div class='del'>-    Committed_AS:   100056 kB</div><div class='del'>-    VmallocTotal:   112216 kB</div><div class='del'>-    VmallocUsed:       428 kB</div><div class='del'>-    VmallocChunk:   111088 kB</div><div class='del'>-    Percpu:          62080 kB</div><div class='del'>-    HardwareCorrupted:   0 kB</div><div class='del'>-    AnonHugePages:   49152 kB</div><div class='del'>-    ShmemHugePages:      0 kB</div><div class='del'>-    ShmemPmdMapped:      0 kB</div><div class='add'>+    MemTotal:       32858820 kB</div><div class='add'>+    MemFree:        21001236 kB</div><div class='add'>+    MemAvailable:   27214312 kB</div><div class='add'>+    Buffers:          581092 kB</div><div class='add'>+    Cached:          5587612 kB</div><div class='add'>+    SwapCached:            0 kB</div><div class='add'>+    Active:          3237152 kB</div><div class='add'>+    Inactive:        7586256 kB</div><div class='add'>+    Active(anon):      94064 kB</div><div class='add'>+    Inactive(anon):  4570616 kB</div><div class='add'>+    Active(file):    3143088 kB</div><div class='add'>+    Inactive(file):  3015640 kB</div><div class='add'>+    Unevictable:           0 kB</div><div class='add'>+    Mlocked:               0 kB</div><div class='add'>+    SwapTotal:             0 kB</div><div class='add'>+    SwapFree:              0 kB</div><div class='add'>+    Zswap:              1904 kB</div><div class='add'>+    Zswapped:           7792 kB</div><div class='add'>+    Dirty:                12 kB</div><div class='add'>+    Writeback:             0 kB</div><div class='add'>+    AnonPages:       4654780 kB</div><div class='add'>+    Mapped:           266244 kB</div><div class='add'>+    Shmem:              9976 kB</div><div class='add'>+    KReclaimable:     517708 kB</div><div class='add'>+    Slab:             660044 kB</div><div class='add'>+    SReclaimable:     517708 kB</div><div class='add'>+    SUnreclaim:       142336 kB</div><div class='add'>+    KernelStack:       11168 kB</div><div class='add'>+    PageTables:        20540 kB</div><div class='add'>+    SecPageTables:         0 kB</div><div class='add'>+    NFS_Unstable:          0 kB</div><div class='add'>+    Bounce:                0 kB</div><div class='add'>+    WritebackTmp:          0 kB</div><div class='add'>+    CommitLimit:    16429408 kB</div><div class='add'>+    Committed_AS:    7715148 kB</div><div class='add'>+    VmallocTotal:   34359738367 kB</div><div class='add'>+    VmallocUsed:       40444 kB</div><div class='add'>+    VmallocChunk:          0 kB</div><div class='add'>+    Percpu:            29312 kB</div><div class='add'>+    EarlyMemtestBad:       0 kB</div><div class='add'>+    HardwareCorrupted:     0 kB</div><div class='add'>+    AnonHugePages:   4149248 kB</div><div class='add'>+    ShmemHugePages:        0 kB</div><div class='add'>+    ShmemPmdMapped:        0 kB</div><div class='add'>+    FileHugePages:         0 kB</div><div class='add'>+    FilePmdMapped:         0 kB</div><div class='add'>+    CmaTotal:              0 kB</div><div class='add'>+    CmaFree:               0 kB</div><div class='add'>+    HugePages_Total:       0</div><div class='add'>+    HugePages_Free:        0</div><div class='add'>+    HugePages_Rsvd:        0</div><div class='add'>+    HugePages_Surp:        0</div><div class='add'>+    Hugepagesize:       2048 kB</div><div class='add'>+    Hugetlb:               0 kB</div><div class='add'>+    DirectMap4k:      401152 kB</div><div class='add'>+    DirectMap2M:    10008576 kB</div><div class='add'>+    DirectMap1G:    24117248 kB</div><div class='ctx'> </div><div class='ctx'> MemTotal</div><div class='ctx'>               Total usable RAM (i.e. physical RAM minus a few reserved</div><div class='ctx'>               bits and the kernel binary code)</div><div class='ctx'> MemFree</div><div class='del'>-              The sum of LowFree+HighFree</div><div class='add'>+              Total free RAM. On highmem systems, the sum of LowFree+HighFree</div><div class='ctx'> MemAvailable</div><div class='ctx'>               An estimate of how much memory is available for starting new</div><div class='ctx'>               applications, without swapping. Calculated from MemFree,</div><div class='hunk'>@@ -1005,8 +1035,9 @@ Buffers</div><div class='ctx'>               Relatively temporary storage for raw disk blocks</div><div class='ctx'>               shouldn't get tremendously large (20MB or so)</div><div class='ctx'> Cached</div><div class='del'>-              in-memory cache for files read from the disk (the</div><div class='del'>-              pagecache).  Doesn't include SwapCached</div><div class='add'>+              In-memory cache for files read from the disk (the</div><div class='add'>+              pagecache) as well as tmpfs &amp; shmem.</div><div class='add'>+              Doesn't include SwapCached.</div><div class='ctx'> SwapCached</div><div class='ctx'>               Memory that once was swapped out, is swapped back in but</div><div class='ctx'>               still also is in the swapfile (if memory is needed it</div><div class='hunk'>@@ -1018,6 +1049,11 @@ Active</div><div class='ctx'> Inactive</div><div class='ctx'>               Memory which has been less recently used.  It is more</div><div class='ctx'>               eligible to be reclaimed for other purposes</div><div class='add'>+Unevictable</div><div class='add'>+              Memory allocated for userspace which cannot be reclaimed, such</div><div class='add'>+              as mlocked pages, ramfs backing pages, secret memfd pages etc.</div><div class='add'>+Mlocked</div><div class='add'>+              Memory locked with mlock().</div><div class='ctx'> HighTotal, HighFree</div><div class='ctx'>               Highmem is all memory above ~860MB of physical memory.</div><div class='ctx'>               Highmem areas are for use by userspace programs, or</div><div class='hunk'>@@ -1034,26 +1070,20 @@ SwapTotal</div><div class='ctx'> SwapFree</div><div class='ctx'>               Memory which has been evicted from RAM, and is temporarily</div><div class='ctx'>               on the disk</div><div class='add'>+Zswap</div><div class='add'>+              Memory consumed by the zswap backend (compressed size)</div><div class='add'>+Zswapped</div><div class='add'>+              Amount of anonymous memory stored in zswap (original size)</div><div class='ctx'> Dirty</div><div class='ctx'>               Memory which is waiting to get written back to the disk</div><div class='ctx'> Writeback</div><div class='ctx'>               Memory which is actively being written back to the disk</div><div class='ctx'> AnonPages</div><div class='ctx'>               Non-file backed pages mapped into userspace page tables</div><div class='del'>-HardwareCorrupted</div><div class='del'>-              The amount of RAM/memory in KB, the kernel identifies as</div><div class='del'>-	      corrupted.</div><div class='del'>-AnonHugePages</div><div class='del'>-              Non-file backed huge pages mapped into userspace page tables</div><div class='ctx'> Mapped</div><div class='ctx'>               files which have been mmaped, such as libraries</div><div class='ctx'> Shmem</div><div class='ctx'>               Total memory used by shared memory (shmem) and tmpfs</div><div class='del'>-ShmemHugePages</div><div class='del'>-              Memory used by shared memory (shmem) and tmpfs allocated</div><div class='del'>-              with huge pages</div><div class='del'>-ShmemPmdMapped</div><div class='del'>-              Shared memory mapped into userspace with huge pages</div><div class='ctx'> KReclaimable</div><div class='ctx'>               Kernel allocations that the kernel will attempt to reclaim</div><div class='ctx'>               under memory pressure. Includes SReclaimable (below), and other</div><div class='hunk'>@@ -1064,9 +1094,13 @@ SReclaimable</div><div class='ctx'>               Part of Slab, that might be reclaimed, such as caches</div><div class='ctx'> SUnreclaim</div><div class='ctx'>               Part of Slab, that cannot be reclaimed on memory pressure</div><div class='add'>+KernelStack</div><div class='add'>+              Memory consumed by the kernel stacks of all tasks</div><div class='ctx'> PageTables</div><div class='del'>-              amount of memory dedicated to the lowest level of page</div><div class='del'>-              tables.</div><div class='add'>+              Memory consumed by userspace page tables</div><div class='add'>+SecPageTables</div><div class='add'>+              Memory consumed by secondary page tables, this currently</div><div class='add'>+              currently includes KVM mmu allocations on x86 and arm64.</div><div class='ctx'> NFS_Unstable</div><div class='ctx'>               Always zero. Previous counted pages which had been written to</div><div class='ctx'>               the server, but has not been committed to stable storage.</div><div class='hunk'>@@ -1091,14 +1125,14 @@ CommitLimit</div><div class='ctx'>               yield a CommitLimit of 7.3G.</div><div class='ctx'> </div><div class='ctx'>               For more details, see the memory overcommit documentation</div><div class='del'>-              in vm/overcommit-accounting.</div><div class='add'>+              in mm/overcommit-accounting.</div><div class='ctx'> Committed_AS</div><div class='ctx'>               The amount of memory presently allocated on the system.</div><div class='ctx'>               The committed memory is a sum of all of the memory which</div><div class='ctx'>               has been allocated by processes, even if it has not been</div><div class='ctx'>               "used" by them as of yet. A process which malloc()'s 1G</div><div class='ctx'>               of memory, but only touches 300M of it will show up as</div><div class='del'>-	      using 1G. This 1G is memory which has been "committed" to</div><div class='add'>+              using 1G. This 1G is memory which has been "committed" to</div><div class='ctx'>               by the VM and can be used at any time by the allocating</div><div class='ctx'>               application. With strict overcommit enabled on the system</div><div class='ctx'>               (mode 2 in 'vm.overcommit_memory'), allocations which would</div><div class='hunk'>@@ -1107,7 +1141,7 @@ Committed_AS</div><div class='ctx'>               not fail due to lack of memory once that memory has been</div><div class='ctx'>               successfully allocated.</div><div class='ctx'> VmallocTotal</div><div class='del'>-              total size of vmalloc memory area</div><div class='add'>+              total size of vmalloc virtual address space</div><div class='ctx'> VmallocUsed</div><div class='ctx'>               amount of vmalloc area which is used</div><div class='ctx'> VmallocChunk</div><div class='hunk'>@@ -1115,6 +1149,37 @@ VmallocChunk</div><div class='ctx'> Percpu</div><div class='ctx'>               Memory allocated to the percpu allocator used to back percpu</div><div class='ctx'>               allocations. This stat excludes the cost of metadata.</div><div class='add'>+EarlyMemtestBad</div><div class='add'>+              The amount of RAM/memory in kB, that was identified as corrupted</div><div class='add'>+              by early memtest. If memtest was not run, this field will not</div><div class='add'>+              be displayed at all. Size is never rounded down to 0 kB.</div><div class='add'>+              That means if 0 kB is reported, you can safely assume</div><div class='add'>+              there was at least one pass of memtest and none of the passes</div><div class='add'>+              found a single faulty byte of RAM.</div><div class='add'>+HardwareCorrupted</div><div class='add'>+              The amount of RAM/memory in KB, the kernel identifies as</div><div class='add'>+              corrupted.</div><div class='add'>+AnonHugePages</div><div class='add'>+              Non-file backed huge pages mapped into userspace page tables</div><div class='add'>+ShmemHugePages</div><div class='add'>+              Memory used by shared memory (shmem) and tmpfs allocated</div><div class='add'>+              with huge pages</div><div class='add'>+ShmemPmdMapped</div><div class='add'>+              Shared memory mapped into userspace with huge pages</div><div class='add'>+FileHugePages</div><div class='add'>+              Memory used for filesystem data (page cache) allocated</div><div class='add'>+              with huge pages</div><div class='add'>+FilePmdMapped</div><div class='add'>+              Page cache mapped into userspace with huge pages</div><div class='add'>+CmaTotal</div><div class='add'>+              Memory reserved for the Contiguous Memory Allocator (CMA)</div><div class='add'>+CmaFree</div><div class='add'>+              Free remaining memory in the CMA reserves</div><div class='add'>+HugePages_Total, HugePages_Free, HugePages_Rsvd, HugePages_Surp, Hugepagesize, Hugetlb</div><div class='add'>+              See Documentation/admin-guide/mm/hugetlbpage.rst.</div><div class='add'>+DirectMap4k, DirectMap2M, DirectMap1G</div><div class='add'>+              Breakdown of page table sizes used in the kernel's</div><div class='add'>+              identity mapping of RAM</div><div class='ctx'> </div><div class='ctx'> vmallocinfo</div><div class='ctx'> ~~~~~~~~~~~</div><div class='hunk'>@@ -1183,85 +1248,7 @@ Provides counts of softirq handlers serviced since boot time, for each CPU.</div><div class='ctx'>     HRTIMER:         0          0          0          0</div><div class='ctx'> 	RCU:      1678       1769       2178       2250</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-1.3 IDE devices in /proc/ide</div><div class='del'>-----------------------------</div><div class='del'>-</div><div class='del'>-The subdirectory /proc/ide contains information about all IDE devices of which</div><div class='del'>-the kernel  is  aware.  There is one subdirectory for each IDE controller, the</div><div class='del'>-file drivers  and a link for each IDE device, pointing to the device directory</div><div class='del'>-in the controller specific subtree.</div><div class='del'>-</div><div class='del'>-The file 'drivers' contains general information about the drivers used for the</div><div class='del'>-IDE devices::</div><div class='del'>-</div><div class='del'>-  &gt; cat /proc/ide/drivers</div><div class='del'>-  ide-cdrom version 4.53</div><div class='del'>-  ide-disk version 1.08</div><div class='del'>-</div><div class='del'>-More detailed  information  can  be  found  in  the  controller  specific</div><div class='del'>-subdirectories. These  are  named  ide0,  ide1  and  so  on.  Each  of  these</div><div class='del'>-directories contains the files shown in table 1-6.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.. table:: Table 1-6: IDE controller info in  /proc/ide/ide?</div><div class='del'>-</div><div class='del'>- ======= =======================================</div><div class='del'>- File    Content</div><div class='del'>- ======= =======================================</div><div class='del'>- channel IDE channel (0 or 1)</div><div class='del'>- config  Configuration (only for PCI/IDE bridge)</div><div class='del'>- mate    Mate name</div><div class='del'>- model   Type/Chipset of IDE controller</div><div class='del'>- ======= =======================================</div><div class='del'>-</div><div class='del'>-Each device  connected  to  a  controller  has  a separate subdirectory in the</div><div class='del'>-controllers directory.  The  files  listed in table 1-7 are contained in these</div><div class='del'>-directories.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-.. table:: Table 1-7: IDE device information</div><div class='del'>-</div><div class='del'>- ================ ==========================================</div><div class='del'>- File             Content</div><div class='del'>- ================ ==========================================</div><div class='del'>- cache            The cache</div><div class='del'>- capacity         Capacity of the medium (in 512Byte blocks)</div><div class='del'>- driver           driver and version</div><div class='del'>- geometry         physical and logical geometry</div><div class='del'>- identify         device identify block</div><div class='del'>- media            media type</div><div class='del'>- model            device identifier</div><div class='del'>- settings         device setup</div><div class='del'>- smart_thresholds IDE disk management thresholds</div><div class='del'>- smart_values     IDE disk management values</div><div class='del'>- ================ ==========================================</div><div class='del'>-</div><div class='del'>-The most  interesting  file is ``settings``. This file contains a nice</div><div class='del'>-overview of the drive parameters::</div><div class='del'>-</div><div class='del'>-  # cat /proc/ide/ide0/hda/settings</div><div class='del'>-  name                    value           min             max             mode</div><div class='del'>-  ----                    -----           ---             ---             ----</div><div class='del'>-  bios_cyl                526             0               65535           rw</div><div class='del'>-  bios_head               255             0               255             rw</div><div class='del'>-  bios_sect               63              0               63              rw</div><div class='del'>-  breada_readahead        4               0               127             rw</div><div class='del'>-  bswap                   0               0               1               r</div><div class='del'>-  file_readahead          72              0               2097151         rw</div><div class='del'>-  io_32bit                0               0               3               rw</div><div class='del'>-  keepsettings            0               0               1               rw</div><div class='del'>-  max_kb_per_request      122             1               127             rw</div><div class='del'>-  multcount               0               0               8               rw</div><div class='del'>-  nice1                   1               0               1               rw</div><div class='del'>-  nowerr                  0               0               1               rw</div><div class='del'>-  pio_mode                write-only      0               255             w</div><div class='del'>-  slow                    0               0               1               rw</div><div class='del'>-  unmaskirq               0               0               1               rw</div><div class='del'>-  using_dma               0               0               1               rw</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-1.4 Networking info in /proc/net</div><div class='add'>+1.3 Networking info in /proc/net</div><div class='ctx'> --------------------------------</div><div class='ctx'> </div><div class='ctx'> The subdirectory  /proc/net  follows  the  usual  pattern. Table 1-8 shows the</div><div class='hunk'>@@ -1307,6 +1294,7 @@ support this. Table 1-9 lists the files and their meaning.</div><div class='ctx'>  rt_cache      Routing cache</div><div class='ctx'>  snmp          SNMP data</div><div class='ctx'>  sockstat      Socket statistics</div><div class='add'>+ softnet_stat  Per-CPU incoming packets queues statistics of online CPUs</div><div class='ctx'>  tcp           TCP  sockets</div><div class='ctx'>  udp           UDP sockets</div><div class='ctx'>  unix          UNIX domain sockets</div><div class='hunk'>@@ -1340,12 +1328,12 @@ It will contain information that is specific to that bond, such as the</div><div class='ctx'> current slaves of the bond, the link status of the slaves, and how</div><div class='ctx'> many times the slaves link has failed.</div><div class='ctx'> </div><div class='del'>-1.5 SCSI info</div><div class='add'>+1.4 SCSI info</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-If you  have  a  SCSI  host adapter in your system, you'll find a subdirectory</div><div class='del'>-named after  the driver for this adapter in /proc/scsi. You'll also see a list</div><div class='del'>-of all recognized SCSI devices in /proc/scsi::</div><div class='add'>+If you have a SCSI or ATA host adapter in your system, you'll find a</div><div class='add'>+subdirectory named after the driver for this adapter in /proc/scsi.</div><div class='add'>+You'll also see a list of all recognized SCSI devices in /proc/scsi::</div><div class='ctx'> </div><div class='ctx'>   &gt;cat /proc/scsi/scsi</div><div class='ctx'>   Attached devices:</div><div class='hunk'>@@ -1403,7 +1391,7 @@ AHA-2940 SCSI adapter::</div><div class='ctx'>     Total transfers 0 (0 reads and 0 writes)</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-1.6 Parallel port info in /proc/parport</div><div class='add'>+1.5 Parallel port info in /proc/parport</div><div class='ctx'> ---------------------------------------</div><div class='ctx'> </div><div class='ctx'> The directory  /proc/parport  contains information about the parallel ports of</div><div class='hunk'>@@ -1428,7 +1416,7 @@ These directories contain the four files shown in Table 1-10.</div><div class='ctx'>            number or none).</div><div class='ctx'>  ========= ====================================================================</div><div class='ctx'> </div><div class='del'>-1.7 TTY info in /proc/tty</div><div class='add'>+1.6 TTY info in /proc/tty</div><div class='ctx'> -------------------------</div><div class='ctx'> </div><div class='ctx'> Information about  the  available  and actually used tty's can be found in the</div><div class='hunk'>@@ -1463,7 +1451,7 @@ To see  which  tty's  are  currently in use, you can simply look into the file</div><div class='ctx'>   unknown              /dev/tty        4    1-63 console</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-1.8 Miscellaneous kernel statistics in /proc/stat</div><div class='add'>+1.7 Miscellaneous kernel statistics in /proc/stat</div><div class='ctx'> -------------------------------------------------</div><div class='ctx'> </div><div class='ctx'> Various pieces   of  information about  kernel activity  are  available in the</div><div class='hunk'>@@ -1471,16 +1459,18 @@ Various pieces   of  information about  kernel activity  are  available in the</div><div class='ctx'> since the system first booted.  For a quick look, simply cat the file::</div><div class='ctx'> </div><div class='ctx'>   &gt; cat /proc/stat</div><div class='del'>-  cpu  2255 34 2290 22625563 6290 127 456 0 0 0</div><div class='del'>-  cpu0 1132 34 1441 11311718 3675 127 438 0 0 0</div><div class='del'>-  cpu1 1123 0 849 11313845 2614 0 18 0 0 0</div><div class='del'>-  intr 114930548 113199788 3 0 5 263 0 4 [... lots more numbers ...]</div><div class='del'>-  ctxt 1990473</div><div class='del'>-  btime 1062191376</div><div class='del'>-  processes 2915</div><div class='del'>-  procs_running 1</div><div class='add'>+  cpu  237902850 368826709 106375398 1873517540 1135548 0 14507935 0 0 0</div><div class='add'>+  cpu0 60045249 91891769 26331539 468411416 495718 0 5739640 0 0 0</div><div class='add'>+  cpu1 59746288 91759249 26609887 468860630 312281 0 4384817 0 0 0</div><div class='add'>+  cpu2 59489247 92985423 26904446 467808813 171668 0 2268998 0 0 0</div><div class='add'>+  cpu3 58622065 92190267 26529524 468436680 155879 0 2114478 0 0 0</div><div class='add'>+  intr 8688370575 8 3373 0 0 0 0 0 0 1 40791 0 0 353317 0 0 0 0 224789828 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 190974333 41958554 123983334 43 0 224593 0 0 0 &lt;more 0's deleted&gt;</div><div class='add'>+  ctxt 22848221062</div><div class='add'>+  btime 1605316999</div><div class='add'>+  processes 746787147</div><div class='add'>+  procs_running 2</div><div class='ctx'>   procs_blocked 0</div><div class='del'>-  softirq 183433 0 21755 12 39 1137 231 21459 2263</div><div class='add'>+  softirq 12121874454 100099120 3938138295 127375644 2795979 187870761 0 173808342 3072582055 52608 224184354</div><div class='ctx'> </div><div class='ctx'> The very first  "cpu" line aggregates the  numbers in all  of the other "cpuN"</div><div class='ctx'> lines.  These numbers identify the amount of time the CPU has spent performing</div><div class='hunk'>@@ -1536,14 +1526,14 @@ softirqs serviced; each subsequent column is the total for that particular</div><div class='ctx'> softirq.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-1.9 Ext4 file system parameters</div><div class='add'>+1.8 Ext4 file system parameters</div><div class='ctx'> -------------------------------</div><div class='ctx'> </div><div class='ctx'> Information about mounted ext4 file systems can be found in</div><div class='ctx'> /proc/fs/ext4.  Each mounted filesystem will have a directory in</div><div class='ctx'> /proc/fs/ext4 based on its device name (i.e., /proc/fs/ext4/hdc or</div><div class='del'>-/proc/fs/ext4/dm-0).   The files in each per-device directory are shown</div><div class='del'>-in Table 1-12, below.</div><div class='add'>+/proc/fs/ext4/sda9 or /proc/fs/ext4/dm-0).   The files in each per-device</div><div class='add'>+directory are shown in Table 1-12, below.</div><div class='ctx'> </div><div class='ctx'> .. table:: Table 1-12: Files in /proc/fs/ext4/&lt;devname&gt;</div><div class='ctx'> </div><div class='hunk'>@@ -1552,7 +1542,7 @@ in Table 1-12, below.</div><div class='ctx'>  mb_groups       details of multiblock allocator buddy cache of free blocks</div><div class='ctx'>  ==============  ==========================================================</div><div class='ctx'> </div><div class='del'>-1.10 /proc/consoles</div><div class='add'>+1.9 /proc/consoles</div><div class='ctx'> -------------------</div><div class='ctx'> Shows registered system console lines.</div><div class='ctx'> </div><div class='hunk'>@@ -1623,12 +1613,12 @@ can inadvertently  disrupt  your  system,  it  is  advisable  to  read  both</div><div class='ctx'> documentation and  source  before actually making adjustments. In any case, be</div><div class='ctx'> very careful  when  writing  to  any  of these files. The entries in /proc may</div><div class='ctx'> change slightly between the 2.1.* and the 2.2 kernel, so if there is any doubt</div><div class='del'>-review the kernel documentation in the directory /usr/src/linux/Documentation.</div><div class='add'>+review the kernel documentation in the directory linux/Documentation.</div><div class='ctx'> This chapter  is  heavily  based  on the documentation included in the pre 2.2</div><div class='ctx'> kernels, and became part of it in version 2.2.1 of the Linux kernel.</div><div class='ctx'> </div><div class='del'>-Please see: Documentation/admin-guide/sysctl/ directory for descriptions of these</div><div class='del'>-entries.</div><div class='add'>+Please see: Documentation/admin-guide/sysctl/ directory for descriptions of</div><div class='add'>+these entries.</div><div class='ctx'> </div><div class='ctx'> Summary</div><div class='ctx'> -------</div><div class='hunk'>@@ -2176,6 +2166,22 @@ AVX512_elapsed_ms</div><div class='ctx'>   the task is unlikely an AVX512 user, but depends on the workload and the</div><div class='ctx'>   scheduling scenario, it also could be a false negative mentioned above.</div><div class='ctx'> </div><div class='add'>+3.13 /proc/&lt;pid&gt;/fd - List of symlinks to open files</div><div class='add'>+-------------------------------------------------------</div><div class='add'>+This directory contains symbolic links which represent open files</div><div class='add'>+the process is maintaining.  Example output::</div><div class='add'>+</div><div class='add'>+  lr-x------ 1 root root 64 Sep 20 17:53 0 -&gt; /dev/null</div><div class='add'>+  l-wx------ 1 root root 64 Sep 20 17:53 1 -&gt; /dev/null</div><div class='add'>+  lrwx------ 1 root root 64 Sep 20 17:53 10 -&gt; 'socket:[12539]'</div><div class='add'>+  lrwx------ 1 root root 64 Sep 20 17:53 11 -&gt; 'socket:[12540]'</div><div class='add'>+  lrwx------ 1 root root 64 Sep 20 17:53 12 -&gt; 'socket:[12542]'</div><div class='add'>+</div><div class='add'>+The number of open files for the process is stored in 'size' member</div><div class='add'>+of stat() output for /proc/&lt;pid&gt;/fd for fast access.</div><div class='add'>+-------------------------------------------------------</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Chapter 4: Configuring procfs</div><div class='ctx'> =============================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/qnx6.rst b/Documentation/filesystems/qnx6.rst<br/>index fd13433d362c..523b798f04e7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/qnx6.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/qnx6.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/qnx6.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/qnx6.rst</a></div><div class='hunk'>@@ -176,7 +176,7 @@ Then userspace.</div><div class='ctx'> The requirement for a static, fixed preallocated system area comes from how</div><div class='ctx'> qnx6fs deals with writes.</div><div class='ctx'> </div><div class='del'>-Each superblock got it's own half of the system area. So superblock #1</div><div class='add'>+Each superblock got its own half of the system area. So superblock #1</div><div class='ctx'> always uses blocks from the lower half while superblock #2 just writes to</div><div class='ctx'> blocks represented by the upper half bitmap system area bits.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/spufs/spufs.rst b/Documentation/filesystems/spufs/spufs.rst<br/>index 8a42859bb100..ca0441cbe37e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/spufs/spufs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/spufs/spufs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/spufs/spufs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/spufs/spufs.rst</a></div><div class='hunk'>@@ -227,7 +227,7 @@ Files</div><div class='ctx'>               from the data buffer, updating the value of the specified signal</div><div class='ctx'>               notification register.  The signal  notification  register  will</div><div class='ctx'>               either be replaced with the input data or will be updated to the</div><div class='del'>-              bitwise OR or the old value and the input data, depending on the</div><div class='add'>+              bitwise OR of the old value and the input data, depending on the</div><div class='ctx'>               contents  of  the  signal1_type,  or  signal2_type respectively,</div><div class='ctx'>               file.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/filesystems/sysfs.rst b/Documentation/filesystems/sysfs.rst<br/>index 004d490179f3..c32993bc83c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/sysfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/sysfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/sysfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/sysfs.rst</a></div><div class='hunk'>@@ -12,10 +12,10 @@ Mike Murphy &lt;mamurph@cs.clemson.edu&gt;</div><div class='ctx'> :Original:   10 January 2003</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-What it is:</div><div class='del'>-~~~~~~~~~~~</div><div class='add'>+What it is</div><div class='add'>+~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-sysfs is a ram-based filesystem initially based on ramfs. It provides</div><div class='add'>+sysfs is a RAM-based filesystem initially based on ramfs. It provides</div><div class='ctx'> a means to export kernel data structures, their attributes, and the</div><div class='ctx'> linkages between them to userspace.</div><div class='ctx'> </div><div class='hunk'>@@ -43,7 +43,7 @@ userspace. Top-level directories in sysfs represent the common</div><div class='ctx'> ancestors of object hierarchies; i.e. the subsystems the objects</div><div class='ctx'> belong to.</div><div class='ctx'> </div><div class='del'>-Sysfs internally stores a pointer to the kobject that implements a</div><div class='add'>+sysfs internally stores a pointer to the kobject that implements a</div><div class='ctx'> directory in the kernfs_node object associated with the directory. In</div><div class='ctx'> the past this kobject pointer has been used by sysfs to do reference</div><div class='ctx'> counting directly on the kobject whenever the file is opened or closed.</div><div class='hunk'>@@ -55,7 +55,7 @@ Attributes</div><div class='ctx'> ~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> Attributes can be exported for kobjects in the form of regular files in</div><div class='del'>-the filesystem. Sysfs forwards file I/O operations to methods defined</div><div class='add'>+the filesystem. sysfs forwards file I/O operations to methods defined</div><div class='ctx'> for the attributes, providing a means to read and write kernel</div><div class='ctx'> attributes.</div><div class='ctx'> </div><div class='hunk'>@@ -72,8 +72,8 @@ you publicly humiliated and your code rewritten without notice.</div><div class='ctx'> An attribute definition is simply::</div><div class='ctx'> </div><div class='ctx'>     struct attribute {</div><div class='del'>-	    char                    * name;</div><div class='del'>-	    struct module		*owner;</div><div class='add'>+	    char                    *name;</div><div class='add'>+	    struct module           *owner;</div><div class='ctx'> 	    umode_t                 mode;</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='hunk'>@@ -138,7 +138,7 @@ __ATTR_WO(name):</div><div class='ctx'> 		 assumes a name_store only and is restricted to mode</div><div class='ctx'>                  0200 that is root write access only.</div><div class='ctx'> __ATTR_RO_MODE(name, mode):</div><div class='del'>-	         fore more restrictive RO access currently</div><div class='add'>+	         for more restrictive RO access; currently</div><div class='ctx'>                  only use case is the EFI System Resource Table</div><div class='ctx'>                  (see drivers/firmware/efi/esrt.c)</div><div class='ctx'> __ATTR_RW(name):</div><div class='hunk'>@@ -207,7 +207,7 @@ IOW, they should take only an object, an attribute, and a buffer as parameters.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> sysfs allocates a buffer of size (PAGE_SIZE) and passes it to the</div><div class='del'>-method. Sysfs will call the method exactly once for each read or</div><div class='add'>+method. sysfs will call the method exactly once for each read or</div><div class='ctx'> write. This forces the following behavior on the method</div><div class='ctx'> implementations:</div><div class='ctx'> </div><div class='hunk'>@@ -221,7 +221,7 @@ implementations:</div><div class='ctx'>   be called again, rearmed, to fill the buffer.</div><div class='ctx'> </div><div class='ctx'> - On write(2), sysfs expects the entire buffer to be passed during the</div><div class='del'>-  first write. Sysfs then passes the entire buffer to the store() method.</div><div class='add'>+  first write. sysfs then passes the entire buffer to the store() method.</div><div class='ctx'>   A terminating null is added after the data on stores. This makes</div><div class='ctx'>   functions like sysfs_streq() safe to use.</div><div class='ctx'> </div><div class='hunk'>@@ -237,7 +237,7 @@ Other notes:</div><div class='ctx'> - Writing causes the show() method to be rearmed regardless of current</div><div class='ctx'>   file position.</div><div class='ctx'> </div><div class='del'>-- The buffer will always be PAGE_SIZE bytes in length. On i386, this</div><div class='add'>+- The buffer will always be PAGE_SIZE bytes in length. On x86, this</div><div class='ctx'>   is 4096.</div><div class='ctx'> </div><div class='ctx'> - show() methods should return the number of bytes printed into the</div><div class='hunk'>@@ -253,7 +253,7 @@ Other notes:</div><div class='ctx'>   through, be sure to return an error.</div><div class='ctx'> </div><div class='ctx'> - The object passed to the methods will be pinned in memory via sysfs</div><div class='del'>-  referencing counting its embedded object. However, the physical</div><div class='add'>+  reference counting its embedded object. However, the physical</div><div class='ctx'>   entity (e.g. device) the object represents may not be present. Be</div><div class='ctx'>   sure to have a way to check this, if necessary.</div><div class='ctx'> </div><div class='hunk'>@@ -263,7 +263,7 @@ A very simple (and naive) implementation of a device attribute is::</div><div class='ctx'>     static ssize_t show_name(struct device *dev, struct device_attribute *attr,</div><div class='ctx'> 			    char *buf)</div><div class='ctx'>     {</div><div class='del'>-	    return scnprintf(buf, PAGE_SIZE, "%s\n", dev-&gt;name);</div><div class='add'>+	    return sysfs_emit(buf, "%s\n", dev-&gt;name);</div><div class='ctx'>     }</div><div class='ctx'> </div><div class='ctx'>     static ssize_t store_name(struct device *dev, struct device_attribute *attr,</div><div class='hunk'>@@ -295,8 +295,12 @@ The top level sysfs directory looks like::</div><div class='ctx'>     dev/</div><div class='ctx'>     devices/</div><div class='ctx'>     firmware/</div><div class='del'>-    net/</div><div class='ctx'>     fs/</div><div class='add'>+    hypervisor/</div><div class='add'>+    kernel/</div><div class='add'>+    module/</div><div class='add'>+    net/</div><div class='add'>+    power/</div><div class='ctx'> </div><div class='ctx'> devices/ contains a filesystem representation of the device tree. It maps</div><div class='ctx'> directly to the internal kernel device tree, which is a hierarchy of</div><div class='hunk'>@@ -317,15 +321,18 @@ span multiple bus types).</div><div class='ctx'> </div><div class='ctx'> fs/ contains a directory for some filesystems.  Currently each</div><div class='ctx'> filesystem wanting to export attributes must create its own hierarchy</div><div class='del'>-below fs/ (see ./fuse.txt for an example).</div><div class='add'>+below fs/ (see ./fuse.rst for an example).</div><div class='add'>+</div><div class='add'>+module/ contains parameter values and state information for all</div><div class='add'>+loaded system modules, for both builtin and loadable modules.</div><div class='ctx'> </div><div class='del'>-dev/ contains two directories char/ and block/. Inside these two</div><div class='add'>+dev/ contains two directories: char/ and block/. Inside these two</div><div class='ctx'> directories there are symlinks named &lt;major&gt;:&lt;minor&gt;.  These symlinks</div><div class='ctx'> point to the sysfs directory for the given device.  /sys/dev provides a</div><div class='ctx'> quick way to lookup the sysfs interface for a device from the result of</div><div class='ctx'> a stat(2) operation.</div><div class='ctx'> </div><div class='del'>-More information can driver-model specific features can be found in</div><div class='add'>+More information on driver-model specific features can be found in</div><div class='ctx'> Documentation/driver-api/driver-model/.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -335,7 +342,7 @@ TODO: Finish this section.</div><div class='ctx'> Current Interfaces</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-The following interface layers currently exist in sysfs:</div><div class='add'>+The following interface layers currently exist in sysfs.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> devices (include/linux/device.h)</div><div class='hunk'>@@ -366,8 +373,8 @@ Structure::</div><div class='ctx'> </div><div class='ctx'>     struct bus_attribute {</div><div class='ctx'> 	    struct attribute        attr;</div><div class='del'>-	    ssize_t (*show)(struct bus_type *, char * buf);</div><div class='del'>-	    ssize_t (*store)(struct bus_type *, const char * buf, size_t count);</div><div class='add'>+	    ssize_t (*show)(const struct bus_type *, char * buf);</div><div class='add'>+	    ssize_t (*store)(const struct bus_type *, const char * buf, size_t count);</div><div class='ctx'>     };</div><div class='ctx'> </div><div class='ctx'> Declaring::</div><div class='head'>diff --git a/Documentation/filesystems/tmpfs.rst b/Documentation/filesystems/tmpfs.rst<br/>index 0408c245785e..f18f46be5c0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/tmpfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/tmpfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/tmpfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/tmpfs.rst</a></div><div class='hunk'>@@ -13,17 +13,29 @@ everything stored therein is lost.</div><div class='ctx'> </div><div class='ctx'> tmpfs puts everything into the kernel internal caches and grows and</div><div class='ctx'> shrinks to accommodate the files it contains and is able to swap</div><div class='del'>-unneeded pages out to swap space. It has maximum size limits which can</div><div class='del'>-be adjusted on the fly via 'mount -o remount ...'</div><div class='del'>-</div><div class='del'>-If you compare it to ramfs (which was the template to create tmpfs)</div><div class='del'>-you gain swapping and limit checking. Another similar thing is the RAM</div><div class='del'>-disk (/dev/ram*), which simulates a fixed size hard disk in physical</div><div class='del'>-RAM, where you have to create an ordinary filesystem on top. Ramdisks</div><div class='del'>-cannot swap and you do not have the possibility to resize them.</div><div class='del'>-</div><div class='del'>-Since tmpfs lives completely in the page cache and on swap, all tmpfs</div><div class='del'>-pages will be shown as "Shmem" in /proc/meminfo and "Shared" in</div><div class='add'>+unneeded pages out to swap space, if swap was enabled for the tmpfs</div><div class='add'>+mount. tmpfs also supports THP.</div><div class='add'>+</div><div class='add'>+tmpfs extends ramfs with a few userspace configurable options listed and</div><div class='add'>+explained further below, some of which can be reconfigured dynamically on the</div><div class='add'>+fly using a remount ('mount -o remount ...') of the filesystem. A tmpfs</div><div class='add'>+filesystem can be resized but it cannot be resized to a size below its current</div><div class='add'>+usage. tmpfs also supports POSIX ACLs, and extended attributes for the</div><div class='add'>+trusted.* and security.* namespaces. ramfs does not use swap and you cannot</div><div class='add'>+modify any parameter for a ramfs filesystem. The size limit of a ramfs</div><div class='add'>+filesystem is how much memory you have available, and so care must be taken if</div><div class='add'>+used so to not run out of memory.</div><div class='add'>+</div><div class='add'>+An alternative to tmpfs and ramfs is to use brd to create RAM disks</div><div class='add'>+(/dev/ram*), which allows you to simulate a block device disk in physical RAM.</div><div class='add'>+To write data you would just then need to create an regular filesystem on top</div><div class='add'>+this ramdisk. As with ramfs, brd ramdisks cannot swap. brd ramdisks are also</div><div class='add'>+configured in size at initialization and you cannot dynamically resize them.</div><div class='add'>+Contrary to brd ramdisks, tmpfs has its own filesystem, it does not rely on the</div><div class='add'>+block layer at all.</div><div class='add'>+</div><div class='add'>+Since tmpfs lives completely in the page cache and optionally on swap,</div><div class='add'>+all tmpfs pages will be shown as "Shmem" in /proc/meminfo and "Shared" in</div><div class='ctx'> free(1). Notice that these counters also include shared memory</div><div class='ctx'> (shmem, see ipcs(1)). The most reliable way to get the count is</div><div class='ctx'> using df(1) and du(1).</div><div class='hunk'>@@ -72,6 +84,8 @@ nr_inodes  The maximum number of inodes for this instance. The default</div><div class='ctx'>            is half of the number of your physical RAM pages, or (on a</div><div class='ctx'>            machine with highmem) the number of lowmem RAM pages,</div><div class='ctx'>            whichever is the lower.</div><div class='add'>+noswap     Disables swap. Remounts must respect the original settings.</div><div class='add'>+           By default swap is enabled.</div><div class='ctx'> =========  ============================================================</div><div class='ctx'> </div><div class='ctx'> These parameters accept a suffix k, m or g for kilo, mega and giga and</div><div class='hunk'>@@ -85,6 +99,36 @@ mount with such options, since it allows any user with write access to</div><div class='ctx'> use up all the memory on the machine; but enhances the scalability of</div><div class='ctx'> that instance in a system with many CPUs making intensive use of it.</div><div class='ctx'> </div><div class='add'>+tmpfs also supports Transparent Huge Pages which requires a kernel</div><div class='add'>+configured with CONFIG_TRANSPARENT_HUGEPAGE and with huge supported for</div><div class='add'>+your system (has_transparent_hugepage(), which is architecture specific).</div><div class='add'>+The mount options for this are:</div><div class='add'>+</div><div class='add'>+======  ============================================================</div><div class='add'>+huge=0  never: disables huge pages for the mount</div><div class='add'>+huge=1  always: enables huge pages for the mount</div><div class='add'>+huge=2  within_size: only allocate huge pages if the page will be</div><div class='add'>+        fully within i_size, also respect fadvise()/madvise() hints.</div><div class='add'>+huge=3  advise: only allocate huge pages if requested with</div><div class='add'>+        fadvise()/madvise()</div><div class='add'>+======  ============================================================</div><div class='add'>+</div><div class='add'>+There is a sysfs file which you can also use to control system wide THP</div><div class='add'>+configuration for all tmpfs mounts, the file is:</div><div class='add'>+</div><div class='add'>+/sys/kernel/mm/transparent_hugepage/shmem_enabled</div><div class='add'>+</div><div class='add'>+This sysfs file is placed on top of THP sysfs directory and so is registered</div><div class='add'>+by THP code. It is however only used to control all tmpfs mounts with one</div><div class='add'>+single knob. Since it controls all tmpfs mounts it should only be used either</div><div class='add'>+for emergency or testing purposes. The values you can set for shmem_enabled are:</div><div class='add'>+</div><div class='add'>+==  ============================================================</div><div class='add'>+-1  deny: disables huge on shm_mnt and all mounts, for</div><div class='add'>+    emergency use</div><div class='add'>+-2  force: enables huge on shm_mnt and all mounts, w/o needing</div><div class='add'>+    option, for testing</div><div class='add'>+==  ============================================================</div><div class='ctx'> </div><div class='ctx'> tmpfs has a mount option to set the NUMA memory allocation policy for</div><div class='ctx'> all files in that instance (if CONFIG_NUMA is enabled) - which can be</div><div class='head'>diff --git a/Documentation/filesystems/ubifs.rst b/Documentation/filesystems/ubifs.rst<br/>index e6ee99762534..ced2f7679ddb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ubifs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/ubifs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/ubifs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/ubifs.rst</a></div><div class='hunk'>@@ -59,7 +59,7 @@ differences.</div><div class='ctx'> * JFFS2 is a write-through file-system, while UBIFS supports write-back,</div><div class='ctx'>   which makes UBIFS much faster on writes.</div><div class='ctx'> </div><div class='del'>-Similarly to JFFS2, UBIFS supports on-the-flight compression which makes</div><div class='add'>+Similarly to JFFS2, UBIFS supports on-the-fly compression which makes</div><div class='ctx'> it possible to fit quite a lot of data to the flash.</div><div class='ctx'> </div><div class='ctx'> Similarly to JFFS2, UBIFS is tolerant of unclean reboots and power-cuts.</div><div class='head'>diff --git a/Documentation/filesystems/vfs.rst b/Documentation/filesystems/vfs.rst<br/>index 794bd1a66bfb..769be5230210 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/vfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/vfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/vfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/vfs.rst</a></div><div class='hunk'>@@ -107,7 +107,7 @@ file /proc/filesystems.</div><div class='ctx'> struct file_system_type</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='del'>-This describes the filesystem.  As of kernel 2.6.39, the following</div><div class='add'>+This describes the filesystem.  The following</div><div class='ctx'> members are defined:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='hunk'>@@ -115,14 +115,24 @@ members are defined:</div><div class='ctx'> 	struct file_system_type {</div><div class='ctx'> 		const char *name;</div><div class='ctx'> 		int fs_flags;</div><div class='add'>+		int (*init_fs_context)(struct fs_context *);</div><div class='add'>+		const struct fs_parameter_spec *parameters;</div><div class='ctx'> 		struct dentry *(*mount) (struct file_system_type *, int,</div><div class='del'>-					 const char *, void *);</div><div class='add'>+			const char *, void *);</div><div class='ctx'> 		void (*kill_sb) (struct super_block *);</div><div class='ctx'> 		struct module *owner;</div><div class='ctx'> 		struct file_system_type * next;</div><div class='del'>-		struct list_head fs_supers;</div><div class='add'>+		struct hlist_head fs_supers;</div><div class='add'>+</div><div class='ctx'> 		struct lock_class_key s_lock_key;</div><div class='ctx'> 		struct lock_class_key s_umount_key;</div><div class='add'>+		struct lock_class_key s_vfs_rename_key;</div><div class='add'>+		struct lock_class_key s_writers_key[SB_FREEZE_LEVELS];</div><div class='add'>+</div><div class='add'>+		struct lock_class_key i_lock_key;</div><div class='add'>+		struct lock_class_key i_mutex_key;</div><div class='add'>+		struct lock_class_key invalidate_lock_key;</div><div class='add'>+		struct lock_class_key i_mutex_dir_key;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> ``name``</div><div class='hunk'>@@ -132,6 +142,15 @@ members are defined:</div><div class='ctx'> ``fs_flags``</div><div class='ctx'> 	various flags (i.e. FS_REQUIRES_DEV, FS_NO_DCACHE, etc.)</div><div class='ctx'> </div><div class='add'>+``init_fs_context``</div><div class='add'>+	Initializes 'struct fs_context' -&gt;ops and -&gt;fs_private fields with</div><div class='add'>+	filesystem-specific data.</div><div class='add'>+</div><div class='add'>+``parameters``</div><div class='add'>+	Pointer to the array of filesystem parameters descriptors</div><div class='add'>+	'struct fs_parameter_spec'.</div><div class='add'>+	More info in Documentation/filesystems/mount_api.rst.</div><div class='add'>+</div><div class='ctx'> ``mount``</div><div class='ctx'> 	the method to call when a new instance of this filesystem should</div><div class='ctx'> 	be mounted</div><div class='hunk'>@@ -148,7 +167,11 @@ members are defined:</div><div class='ctx'> ``next``</div><div class='ctx'> 	for internal VFS use: you should initialize this to NULL</div><div class='ctx'> </div><div class='del'>-  s_lock_key, s_umount_key: lockdep-specific</div><div class='add'>+``fs_supers``</div><div class='add'>+	for internal VFS use: hlist of filesystem instances (superblocks)</div><div class='add'>+</div><div class='add'>+  s_lock_key, s_umount_key, s_vfs_rename_key, s_writers_key,</div><div class='add'>+  i_lock_key, i_mutex_key, invalidate_lock_key, i_mutex_dir_key: lockdep-specific</div><div class='ctx'> </div><div class='ctx'> The mount() method has the following arguments:</div><div class='ctx'> </div><div class='hunk'>@@ -222,33 +245,42 @@ struct super_operations</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='ctx'> This describes how the VFS can manipulate the superblock of your</div><div class='del'>-filesystem.  As of kernel 2.6.22, the following members are defined:</div><div class='add'>+filesystem.  The following members are defined:</div><div class='ctx'> </div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	struct super_operations {</div><div class='ctx'> 		struct inode *(*alloc_inode)(struct super_block *sb);</div><div class='ctx'> 		void (*destroy_inode)(struct inode *);</div><div class='add'>+		void (*free_inode)(struct inode *);</div><div class='ctx'> </div><div class='ctx'> 		void (*dirty_inode) (struct inode *, int flags);</div><div class='del'>-		int (*write_inode) (struct inode *, int);</div><div class='del'>-		void (*drop_inode) (struct inode *);</div><div class='del'>-		void (*delete_inode) (struct inode *);</div><div class='add'>+		int (*write_inode) (struct inode *, struct writeback_control *wbc);</div><div class='add'>+		int (*drop_inode) (struct inode *);</div><div class='add'>+		void (*evict_inode) (struct inode *);</div><div class='ctx'> 		void (*put_super) (struct super_block *);</div><div class='ctx'> 		int (*sync_fs)(struct super_block *sb, int wait);</div><div class='add'>+		int (*freeze_super) (struct super_block *);</div><div class='ctx'> 		int (*freeze_fs) (struct super_block *);</div><div class='add'>+		int (*thaw_super) (struct super_block *);</div><div class='ctx'> 		int (*unfreeze_fs) (struct super_block *);</div><div class='ctx'> 		int (*statfs) (struct dentry *, struct kstatfs *);</div><div class='ctx'> 		int (*remount_fs) (struct super_block *, int *, char *);</div><div class='del'>-		void (*clear_inode) (struct inode *);</div><div class='ctx'> 		void (*umount_begin) (struct super_block *);</div><div class='ctx'> </div><div class='ctx'> 		int (*show_options)(struct seq_file *, struct dentry *);</div><div class='add'>+		int (*show_devname)(struct seq_file *, struct dentry *);</div><div class='add'>+		int (*show_path)(struct seq_file *, struct dentry *);</div><div class='add'>+		int (*show_stats)(struct seq_file *, struct dentry *);</div><div class='ctx'> </div><div class='ctx'> 		ssize_t (*quota_read)(struct super_block *, int, char *, size_t, loff_t);</div><div class='ctx'> 		ssize_t (*quota_write)(struct super_block *, int, const char *, size_t, loff_t);</div><div class='del'>-		int (*nr_cached_objects)(struct super_block *);</div><div class='del'>-		void (*free_cached_objects)(struct super_block *, int);</div><div class='add'>+		struct dquot **(*get_dquots)(struct inode *);</div><div class='add'>+</div><div class='add'>+		long (*nr_cached_objects)(struct super_block *,</div><div class='add'>+					struct shrink_control *);</div><div class='add'>+		long (*free_cached_objects)(struct super_block *,</div><div class='add'>+					struct shrink_control *);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> All methods are called without any locks being held, unless otherwise</div><div class='hunk'>@@ -269,11 +301,19 @@ or bottom half).</div><div class='ctx'> 	-&gt;alloc_inode was defined and simply undoes anything done by</div><div class='ctx'> 	-&gt;alloc_inode.</div><div class='ctx'> </div><div class='add'>+``free_inode``</div><div class='add'>+	this method is called from RCU callback. If you use call_rcu()</div><div class='add'>+	in -&gt;destroy_inode to free 'struct inode' memory, then it's</div><div class='add'>+	better to release memory in this method.</div><div class='add'>+</div><div class='ctx'> ``dirty_inode``</div><div class='ctx'> 	this method is called by the VFS when an inode is marked dirty.</div><div class='ctx'> 	This is specifically for the inode itself being marked dirty,</div><div class='ctx'> 	not its data.  If the update needs to be persisted by fdatasync(),</div><div class='ctx'> 	then I_DIRTY_DATASYNC will be set in the flags argument.</div><div class='add'>+	I_DIRTY_TIME will be set in the flags in case lazytime is enabled</div><div class='add'>+	and struct inode has times updated since the last -&gt;dirty_inode</div><div class='add'>+	call.</div><div class='ctx'> </div><div class='ctx'> ``write_inode``</div><div class='ctx'> 	this method is called when the VFS needs to write an inode to</div><div class='hunk'>@@ -293,8 +333,12 @@ or bottom half).</div><div class='ctx'> 	practice of using "force_delete" in the put_inode() case, but</div><div class='ctx'> 	does not have the races that the "force_delete()" approach had.</div><div class='ctx'> </div><div class='del'>-``delete_inode``</div><div class='del'>-	called when the VFS wants to delete an inode</div><div class='add'>+``evict_inode``</div><div class='add'>+	called when the VFS wants to evict an inode. Caller does</div><div class='add'>+	*not* evict the pagecache or inode-associated metadata buffers;</div><div class='add'>+	the method has to use truncate_inode_pages_final() to get rid</div><div class='add'>+	of those. Caller makes sure async writeback cannot be running for</div><div class='add'>+	the inode while (or after) -&gt;evict_inode() is called. Optional.</div><div class='ctx'> </div><div class='ctx'> ``put_super``</div><div class='ctx'> 	called when the VFS wishes to free the superblock</div><div class='hunk'>@@ -305,14 +349,25 @@ or bottom half).</div><div class='ctx'> 	superblock.  The second parameter indicates whether the method</div><div class='ctx'> 	should wait until the write out has been completed.  Optional.</div><div class='ctx'> </div><div class='add'>+``freeze_super``</div><div class='add'>+	Called instead of -&gt;freeze_fs callback if provided.</div><div class='add'>+	Main difference is that -&gt;freeze_super is called without taking</div><div class='add'>+	down_write(&amp;sb-&gt;s_umount). If filesystem implements it and wants</div><div class='add'>+	-&gt;freeze_fs to be called too, then it has to call -&gt;freeze_fs</div><div class='add'>+	explicitly from this callback. Optional.</div><div class='add'>+</div><div class='ctx'> ``freeze_fs``</div><div class='ctx'> 	called when VFS is locking a filesystem and forcing it into a</div><div class='ctx'> 	consistent state.  This method is currently used by the Logical</div><div class='del'>-	Volume Manager (LVM).</div><div class='add'>+	Volume Manager (LVM) and ioctl(FIFREEZE). Optional.</div><div class='add'>+</div><div class='add'>+``thaw_super``</div><div class='add'>+	called when VFS is unlocking a filesystem and making it writable</div><div class='add'>+	again after -&gt;freeze_super. Optional.</div><div class='ctx'> </div><div class='ctx'> ``unfreeze_fs``</div><div class='ctx'> 	called when VFS is unlocking a filesystem and making it writable</div><div class='del'>-	again.</div><div class='add'>+	again after -&gt;freeze_fs. Optional.</div><div class='ctx'> </div><div class='ctx'> ``statfs``</div><div class='ctx'> 	called when the VFS needs to get filesystem statistics.</div><div class='hunk'>@@ -321,22 +376,37 @@ or bottom half).</div><div class='ctx'> 	called when the filesystem is remounted.  This is called with</div><div class='ctx'> 	the kernel lock held</div><div class='ctx'> </div><div class='del'>-``clear_inode``</div><div class='del'>-	called then the VFS clears the inode.  Optional</div><div class='del'>-</div><div class='ctx'> ``umount_begin``</div><div class='ctx'> 	called when the VFS is unmounting a filesystem.</div><div class='ctx'> </div><div class='ctx'> ``show_options``</div><div class='del'>-	called by the VFS to show mount options for /proc/&lt;pid&gt;/mounts.</div><div class='add'>+	called by the VFS to show mount options for /proc/&lt;pid&gt;/mounts</div><div class='add'>+	and /proc/&lt;pid&gt;/mountinfo.</div><div class='ctx'> 	(see "Mount Options" section)</div><div class='ctx'> </div><div class='add'>+``show_devname``</div><div class='add'>+	Optional. Called by the VFS to show device name for</div><div class='add'>+	/proc/&lt;pid&gt;/{mounts,mountinfo,mountstats}. If not provided then</div><div class='add'>+	'(struct mount).mnt_devname' will be used.</div><div class='add'>+</div><div class='add'>+``show_path``</div><div class='add'>+	Optional. Called by the VFS (for /proc/&lt;pid&gt;/mountinfo) to show</div><div class='add'>+	the mount root dentry path relative to the filesystem root.</div><div class='add'>+</div><div class='add'>+``show_stats``</div><div class='add'>+	Optional. Called by the VFS (for /proc/&lt;pid&gt;/mountstats) to show</div><div class='add'>+	filesystem-specific mount statistics.</div><div class='add'>+</div><div class='ctx'> ``quota_read``</div><div class='ctx'> 	called by the VFS to read from filesystem quota file.</div><div class='ctx'> </div><div class='ctx'> ``quota_write``</div><div class='ctx'> 	called by the VFS to write to filesystem quota file.</div><div class='ctx'> </div><div class='add'>+``get_dquots``</div><div class='add'>+	called by quota to get 'struct dquot' array for a particular inode.</div><div class='add'>+	Optional.</div><div class='add'>+</div><div class='ctx'> ``nr_cached_objects``</div><div class='ctx'> 	called by the sb cache shrinking function for the filesystem to</div><div class='ctx'> 	return the number of freeable cached objects it contains.</div><div class='hunk'>@@ -418,30 +488,31 @@ As of kernel 2.6.22, the following members are defined:</div><div class='ctx'> .. code-block:: c</div><div class='ctx'> </div><div class='ctx'> 	struct inode_operations {</div><div class='del'>-		int (*create) (struct user_namespace *, struct inode *,struct dentry *, umode_t, bool);</div><div class='add'>+		int (*create) (struct mnt_idmap *, struct inode *,struct dentry *, umode_t, bool);</div><div class='ctx'> 		struct dentry * (*lookup) (struct inode *,struct dentry *, unsigned int);</div><div class='ctx'> 		int (*link) (struct dentry *,struct inode *,struct dentry *);</div><div class='ctx'> 		int (*unlink) (struct inode *,struct dentry *);</div><div class='del'>-		int (*symlink) (struct user_namespace *, struct inode *,struct dentry *,const char *);</div><div class='del'>-		int (*mkdir) (struct user_namespace *, struct inode *,struct dentry *,umode_t);</div><div class='add'>+		int (*symlink) (struct mnt_idmap *, struct inode *,struct dentry *,const char *);</div><div class='add'>+		int (*mkdir) (struct mnt_idmap *, struct inode *,struct dentry *,umode_t);</div><div class='ctx'> 		int (*rmdir) (struct inode *,struct dentry *);</div><div class='del'>-		int (*mknod) (struct user_namespace *, struct inode *,struct dentry *,umode_t,dev_t);</div><div class='del'>-		int (*rename) (struct user_namespace *, struct inode *, struct dentry *,</div><div class='add'>+		int (*mknod) (struct mnt_idmap *, struct inode *,struct dentry *,umode_t,dev_t);</div><div class='add'>+		int (*rename) (struct mnt_idmap *, struct inode *, struct dentry *,</div><div class='ctx'> 			       struct inode *, struct dentry *, unsigned int);</div><div class='ctx'> 		int (*readlink) (struct dentry *, char __user *,int);</div><div class='ctx'> 		const char *(*get_link) (struct dentry *, struct inode *,</div><div class='ctx'> 					 struct delayed_call *);</div><div class='del'>-		int (*permission) (struct user_namespace *, struct inode *, int);</div><div class='del'>-		struct posix_acl * (*get_acl)(struct inode *, int, bool);</div><div class='del'>-		int (*setattr) (struct user_namespace *, struct dentry *, struct iattr *);</div><div class='del'>-		int (*getattr) (struct user_namespace *, const struct path *, struct kstat *, u32, unsigned int);</div><div class='add'>+		int (*permission) (struct mnt_idmap *, struct inode *, int);</div><div class='add'>+		struct posix_acl * (*get_inode_acl)(struct inode *, int, bool);</div><div class='add'>+		int (*setattr) (struct mnt_idmap *, struct dentry *, struct iattr *);</div><div class='add'>+		int (*getattr) (struct mnt_idmap *, const struct path *, struct kstat *, u32, unsigned int);</div><div class='ctx'> 		ssize_t (*listxattr) (struct dentry *, char *, size_t);</div><div class='ctx'> 		void (*update_time)(struct inode *, struct timespec *, int);</div><div class='ctx'> 		int (*atomic_open)(struct inode *, struct dentry *, struct file *,</div><div class='ctx'> 				   unsigned open_flag, umode_t create_mode);</div><div class='del'>-		int (*tmpfile) (struct user_namespace *, struct inode *, struct dentry *, umode_t);</div><div class='del'>-	        int (*set_acl)(struct user_namespace *, struct inode *, struct posix_acl *, int);</div><div class='del'>-		int (*fileattr_set)(struct user_namespace *mnt_userns,</div><div class='add'>+		int (*tmpfile) (struct mnt_idmap *, struct inode *, struct file *, umode_t);</div><div class='add'>+		struct posix_acl * (*get_acl)(struct mnt_idmap *, struct dentry *, int);</div><div class='add'>+	        int (*set_acl)(struct mnt_idmap *, struct dentry *, struct posix_acl *, int);</div><div class='add'>+		int (*fileattr_set)(struct mnt_idmap *idmap,</div><div class='ctx'> 				    struct dentry *dentry, struct fileattr *fa);</div><div class='ctx'> 		int (*fileattr_get)(struct dentry *dentry, struct fileattr *fa);</div><div class='ctx'> 	};</div><div class='hunk'>@@ -589,7 +660,9 @@ otherwise noted.</div><div class='ctx'> ``tmpfile``</div><div class='ctx'> 	called in the end of O_TMPFILE open().  Optional, equivalent to</div><div class='ctx'> 	atomically creating, opening and unlinking a file in given</div><div class='del'>-	directory.</div><div class='add'>+	directory.  On success needs to return with the file already</div><div class='add'>+	open; this can be done by calling finish_open_simple() right at</div><div class='add'>+	the end.</div><div class='ctx'> </div><div class='ctx'> ``fileattr_get``</div><div class='ctx'> 	called on ioctl(FS_IOC_GETFLAGS) and ioctl(FS_IOC_FSGETXATTR) to</div><div class='hunk'>@@ -620,9 +693,9 @@ Writeback.</div><div class='ctx'> The first can be used independently to the others.  The VM can try to</div><div class='ctx'> either write dirty pages in order to clean them, or release clean pages</div><div class='ctx'> in order to reuse them.  To do this it can call the -&gt;writepage method</div><div class='del'>-on dirty pages, and -&gt;releasepage on clean pages with PagePrivate set.</div><div class='del'>-Clean pages without PagePrivate and with no external references will be</div><div class='del'>-released without notice being given to the address_space.</div><div class='add'>+on dirty pages, and -&gt;release_folio on clean folios with the private</div><div class='add'>+flag set.  Clean pages without PagePrivate and with no external references</div><div class='add'>+will be released without notice being given to the address_space.</div><div class='ctx'> </div><div class='ctx'> To achieve this functionality, pages need to be placed on an LRU with</div><div class='ctx'> lru_cache_add and mark_page_active needs to be called whenever the page</div><div class='hunk'>@@ -656,7 +729,7 @@ by memory-mapping the page.  Data is written into the address space by</div><div class='ctx'> the application, and then written-back to storage typically in whole</div><div class='ctx'> pages, however the address_space has finer control of write sizes.</div><div class='ctx'> </div><div class='del'>-The read process essentially only requires 'readpage'.  The write</div><div class='add'>+The read process essentially only requires 'read_folio'.  The write</div><div class='ctx'> process is more complicated and uses write_begin/write_end or</div><div class='ctx'> dirty_folio to write data into the address_space, and writepage and</div><div class='ctx'> writepages to writeback data to storage.</div><div class='hunk'>@@ -722,35 +795,32 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> </div><div class='ctx'> 	struct address_space_operations {</div><div class='ctx'> 		int (*writepage)(struct page *page, struct writeback_control *wbc);</div><div class='del'>-		int (*readpage)(struct file *, struct page *);</div><div class='add'>+		int (*read_folio)(struct file *, struct folio *);</div><div class='ctx'> 		int (*writepages)(struct address_space *, struct writeback_control *);</div><div class='ctx'> 		bool (*dirty_folio)(struct address_space *, struct folio *);</div><div class='ctx'> 		void (*readahead)(struct readahead_control *);</div><div class='ctx'> 		int (*write_begin)(struct file *, struct address_space *mapping,</div><div class='del'>-				   loff_t pos, unsigned len, unsigned flags,</div><div class='add'>+				   loff_t pos, unsigned len,</div><div class='ctx'> 				struct page **pagep, void **fsdata);</div><div class='ctx'> 		int (*write_end)(struct file *, struct address_space *mapping,</div><div class='ctx'> 				 loff_t pos, unsigned len, unsigned copied,</div><div class='ctx'> 				 struct page *page, void *fsdata);</div><div class='ctx'> 		sector_t (*bmap)(struct address_space *, sector_t);</div><div class='ctx'> 		void (*invalidate_folio) (struct folio *, size_t start, size_t len);</div><div class='del'>-		int (*releasepage) (struct page *, int);</div><div class='del'>-		void (*freepage)(struct page *);</div><div class='add'>+		bool (*release_folio)(struct folio *, gfp_t);</div><div class='add'>+		void (*free_folio)(struct folio *);</div><div class='ctx'> 		ssize_t (*direct_IO)(struct kiocb *, struct iov_iter *iter);</div><div class='del'>-		/* isolate a page for migration */</div><div class='del'>-		bool (*isolate_page) (struct page *, isolate_mode_t);</div><div class='del'>-		/* migrate the contents of a page to the specified target */</div><div class='del'>-		int (*migratepage) (struct page *, struct page *);</div><div class='del'>-		/* put migration-failed page back to right list */</div><div class='del'>-		void (*putback_page) (struct page *);</div><div class='add'>+		int (*migrate_folio)(struct mapping *, struct folio *dst,</div><div class='add'>+				struct folio *src, enum migrate_mode);</div><div class='ctx'> 		int (*launder_folio) (struct folio *);</div><div class='ctx'> </div><div class='ctx'> 		bool (*is_partially_uptodate) (struct folio *, size_t from,</div><div class='ctx'> 					       size_t count);</div><div class='del'>-		void (*is_dirty_writeback) (struct page *, bool *, bool *);</div><div class='add'>+		void (*is_dirty_writeback)(struct folio *, bool *, bool *);</div><div class='ctx'> 		int (*error_remove_page) (struct mapping *mapping, struct page *page);</div><div class='del'>-		int (*swap_activate)(struct file *);</div><div class='add'>+		int (*swap_activate)(struct swap_info_struct *sis, struct file *f, sector_t *span)</div><div class='ctx'> 		int (*swap_deactivate)(struct file *);</div><div class='add'>+		int (*swap_rw)(struct kiocb *iocb, struct iov_iter *iter);</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> ``writepage``</div><div class='hunk'>@@ -772,14 +842,39 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> </div><div class='ctx'> 	See the file "Locking" for more details.</div><div class='ctx'> </div><div class='del'>-``readpage``</div><div class='del'>-	called by the VM to read a page from backing store.  The page</div><div class='del'>-	will be Locked when readpage is called, and should be unlocked</div><div class='del'>-	and marked uptodate once the read completes.  If -&gt;readpage</div><div class='del'>-	discovers that it needs to unlock the page for some reason, it</div><div class='del'>-	can do so, and then return AOP_TRUNCATED_PAGE.  In this case,</div><div class='del'>-	the page will be relocated, relocked and if that all succeeds,</div><div class='del'>-	-&gt;readpage will be called again.</div><div class='add'>+``read_folio``</div><div class='add'>+	Called by the page cache to read a folio from the backing store.</div><div class='add'>+	The 'file' argument supplies authentication information to network</div><div class='add'>+	filesystems, and is generally not used by block based filesystems.</div><div class='add'>+	It may be NULL if the caller does not have an open file (eg if</div><div class='add'>+	the kernel is performing a read for itself rather than on behalf</div><div class='add'>+	of a userspace process with an open file).</div><div class='add'>+</div><div class='add'>+	If the mapping does not support large folios, the folio will</div><div class='add'>+	contain a single page.	The folio will be locked when read_folio</div><div class='add'>+	is called.  If the read completes successfully, the folio should</div><div class='add'>+	be marked uptodate.  The filesystem should unlock the folio</div><div class='add'>+	once the read has completed, whether it was successful or not.</div><div class='add'>+	The filesystem does not need to modify the refcount on the folio;</div><div class='add'>+	the page cache holds a reference count and that will not be</div><div class='add'>+	released until the folio is unlocked.</div><div class='add'>+</div><div class='add'>+	Filesystems may implement -&gt;read_folio() synchronously.</div><div class='add'>+	In normal operation, folios are read through the -&gt;readahead()</div><div class='add'>+	method.  Only if this fails, or if the caller needs to wait for</div><div class='add'>+	the read to complete will the page cache call -&gt;read_folio().</div><div class='add'>+	Filesystems should not attempt to perform their own readahead</div><div class='add'>+	in the -&gt;read_folio() operation.</div><div class='add'>+</div><div class='add'>+	If the filesystem cannot perform the read at this time, it can</div><div class='add'>+	unlock the folio, do whatever action it needs to ensure that the</div><div class='add'>+	read will succeed in the future and return AOP_TRUNCATED_PAGE.</div><div class='add'>+	In this case, the caller should look up the folio, lock it,</div><div class='add'>+	and call -&gt;read_folio again.</div><div class='add'>+</div><div class='add'>+	Callers may invoke the -&gt;read_folio() method directly, but using</div><div class='add'>+	read_mapping_folio() will take care of locking, waiting for the</div><div class='add'>+	read to complete and handle cases such as AOP_TRUNCATED_PAGE.</div><div class='ctx'> </div><div class='ctx'> ``writepages``</div><div class='ctx'> 	called by the VM to write out pages associated with the</div><div class='hunk'>@@ -832,9 +927,6 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> 	passed to write_begin is greater than the number of bytes copied</div><div class='ctx'> 	into the page).</div><div class='ctx'> </div><div class='del'>-	flags is a field for AOP_FLAG_xxx flags, described in</div><div class='del'>-	include/linux/fs.h.</div><div class='del'>-</div><div class='ctx'> 	A void * may be returned in fsdata, which then gets passed into</div><div class='ctx'> 	write_end.</div><div class='ctx'> </div><div class='hunk'>@@ -867,36 +959,35 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> 	address space.  This generally corresponds to either a</div><div class='ctx'> 	truncation, punch hole or a complete invalidation of the address</div><div class='ctx'> 	space (in the latter case 'offset' will always be 0 and 'length'</div><div class='del'>-	will be folio_size()).  Any private data associated with the page</div><div class='add'>+	will be folio_size()).  Any private data associated with the folio</div><div class='ctx'> 	should be updated to reflect this truncation.  If offset is 0</div><div class='ctx'> 	and length is folio_size(), then the private data should be</div><div class='del'>-	released, because the page must be able to be completely</div><div class='del'>-	discarded.  This may be done by calling the -&gt;releasepage</div><div class='add'>+	released, because the folio must be able to be completely</div><div class='add'>+	discarded.  This may be done by calling the -&gt;release_folio</div><div class='ctx'> 	function, but in this case the release MUST succeed.</div><div class='ctx'> </div><div class='del'>-``releasepage``</div><div class='del'>-	releasepage is called on PagePrivate pages to indicate that the</div><div class='del'>-	page should be freed if possible.  -&gt;releasepage should remove</div><div class='del'>-	any private data from the page and clear the PagePrivate flag.</div><div class='del'>-	If releasepage() fails for some reason, it must indicate failure</div><div class='del'>-	with a 0 return value.  releasepage() is used in two distinct</div><div class='del'>-	though related cases.  The first is when the VM finds a clean</div><div class='del'>-	page with no active users and wants to make it a free page.  If</div><div class='del'>-	-&gt;releasepage succeeds, the page will be removed from the</div><div class='del'>-	address_space and become free.</div><div class='add'>+``release_folio``</div><div class='add'>+	release_folio is called on folios with private data to tell the</div><div class='add'>+	filesystem that the folio is about to be freed.  -&gt;release_folio</div><div class='add'>+	should remove any private data from the folio and clear the</div><div class='add'>+	private flag.  If release_folio() fails, it should return false.</div><div class='add'>+	release_folio() is used in two distinct though related cases.</div><div class='add'>+	The first is when the VM wants to free a clean folio with no</div><div class='add'>+	active users.  If -&gt;release_folio succeeds, the folio will be</div><div class='add'>+	removed from the address_space and be freed.</div><div class='ctx'> </div><div class='ctx'> 	The second case is when a request has been made to invalidate</div><div class='del'>-	some or all pages in an address_space.  This can happen through</div><div class='del'>-	the fadvise(POSIX_FADV_DONTNEED) system call or by the</div><div class='del'>-	filesystem explicitly requesting it as nfs and 9fs do (when they</div><div class='add'>+	some or all folios in an address_space.  This can happen</div><div class='add'>+	through the fadvise(POSIX_FADV_DONTNEED) system call or by the</div><div class='add'>+	filesystem explicitly requesting it as nfs and 9p do (when they</div><div class='ctx'> 	believe the cache may be out of date with storage) by calling</div><div class='ctx'> 	invalidate_inode_pages2().  If the filesystem makes such a call,</div><div class='del'>-	and needs to be certain that all pages are invalidated, then its</div><div class='del'>-	releasepage will need to ensure this.  Possibly it can clear the</div><div class='del'>-	PageUptodate bit if it cannot free private data yet.</div><div class='add'>+	and needs to be certain that all folios are invalidated, then</div><div class='add'>+	its release_folio will need to ensure this.  Possibly it can</div><div class='add'>+	clear the uptodate flag if it cannot free private data yet.</div><div class='ctx'> </div><div class='del'>-``freepage``</div><div class='del'>-	freepage is called once the page is no longer visible in the</div><div class='add'>+``free_folio``</div><div class='add'>+	free_folio is called once the folio is no longer visible in the</div><div class='ctx'> 	page cache in order to allow the cleanup of any private data.</div><div class='ctx'> 	Since it may be called by the memory reclaimer, it should not</div><div class='ctx'> 	assume that the original address_space mapping still exists, and</div><div class='hunk'>@@ -908,20 +999,12 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> 	data directly between the storage and the application's address</div><div class='ctx'> 	space.</div><div class='ctx'> </div><div class='del'>-``isolate_page``</div><div class='del'>-	Called by the VM when isolating a movable non-lru page.  If page</div><div class='del'>-	is successfully isolated, VM marks the page as PG_isolated via</div><div class='del'>-	__SetPageIsolated.</div><div class='del'>-</div><div class='del'>-``migrate_page``</div><div class='add'>+``migrate_folio``</div><div class='ctx'> 	This is used to compact the physical memory usage.  If the VM</div><div class='del'>-	wants to relocate a page (maybe off a memory card that is</div><div class='del'>-	signalling imminent failure) it will pass a new page and an old</div><div class='del'>-	page to this function.  migrate_page should transfer any private</div><div class='del'>-	data across and update any references that it has to the page.</div><div class='del'>-</div><div class='del'>-``putback_page``</div><div class='del'>-	Called by the VM when isolated page's migration fails.</div><div class='add'>+	wants to relocate a folio (maybe from a memory device that is</div><div class='add'>+	signalling imminent failure) it will pass a new folio and an old</div><div class='add'>+	folio to this function.  migrate_folio should transfer any private</div><div class='add'>+	data across and update any references that it has to the folio.</div><div class='ctx'> </div><div class='ctx'> ``launder_folio``</div><div class='ctx'> 	Called before freeing a folio - it writes back the dirty folio.</div><div class='hunk'>@@ -935,14 +1018,14 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> 	without needing I/O to bring the whole page up to date.</div><div class='ctx'> </div><div class='ctx'> ``is_dirty_writeback``</div><div class='del'>-	Called by the VM when attempting to reclaim a page.  The VM uses</div><div class='add'>+	Called by the VM when attempting to reclaim a folio.  The VM uses</div><div class='ctx'> 	dirty and writeback information to determine if it needs to</div><div class='ctx'> 	stall to allow flushers a chance to complete some IO.</div><div class='del'>-	Ordinarily it can use PageDirty and PageWriteback but some</div><div class='del'>-	filesystems have more complex state (unstable pages in NFS</div><div class='add'>+	Ordinarily it can use folio_test_dirty and folio_test_writeback but</div><div class='add'>+	some filesystems have more complex state (unstable folios in NFS</div><div class='ctx'> 	prevent reclaim) or do not set those flags due to locking</div><div class='ctx'> 	problems.  This callback allows a filesystem to indicate to the</div><div class='del'>-	VM if a page should be treated as dirty or writeback for the</div><div class='add'>+	VM if a folio should be treated as dirty or writeback for the</div><div class='ctx'> 	purposes of stalling.</div><div class='ctx'> </div><div class='ctx'> ``error_remove_page``</div><div class='hunk'>@@ -952,15 +1035,21 @@ cache in your filesystem.  The following members are defined:</div><div class='ctx'> 	unless you have them locked or reference counts increased.</div><div class='ctx'> </div><div class='ctx'> ``swap_activate``</div><div class='del'>-	Called when swapon is used on a file to allocate space if</div><div class='del'>-	necessary and pin the block lookup information in memory.  A</div><div class='del'>-	return value of zero indicates success, in which case this file</div><div class='del'>-	can be used to back swapspace.</div><div class='add'>+</div><div class='add'>+	Called to prepare the given file for swap.  It should perform</div><div class='add'>+	any validation and preparation necessary to ensure that writes</div><div class='add'>+	can be performed with minimal memory allocation.  It should call</div><div class='add'>+	add_swap_extent(), or the helper iomap_swapfile_activate(), and</div><div class='add'>+	return the number of extents added.  If IO should be submitted</div><div class='add'>+	through -&gt;swap_rw(), it should set SWP_FS_OPS, otherwise IO will</div><div class='add'>+	be submitted directly to the block device ``sis-&gt;bdev``.</div><div class='ctx'> </div><div class='ctx'> ``swap_deactivate``</div><div class='ctx'> 	Called during swapoff on files where swap_activate was</div><div class='ctx'> 	successful.</div><div class='ctx'> </div><div class='add'>+``swap_rw``</div><div class='add'>+	Called to read or write swap pages when SWP_FS_OPS is set.</div><div class='ctx'> </div><div class='ctx'> The File Object</div><div class='ctx'> ===============</div><div class='hunk'>@@ -1200,7 +1289,7 @@ defined:</div><div class='ctx'> 	return</div><div class='ctx'> 	-ECHILD and it will be called again in ref-walk mode.</div><div class='ctx'> </div><div class='del'>-``_weak_revalidate``</div><div class='add'>+``d_weak_revalidate``</div><div class='ctx'> 	called when the VFS needs to revalidate a "jumped" dentry.  This</div><div class='ctx'> 	is called when a path-walk ends at dentry that was not acquired</div><div class='ctx'> 	by doing a lookup in the parent directory.  This includes "/",</div><div class='head'>diff --git a/Documentation/filesystems/xfs-delayed-logging-design.rst b/Documentation/filesystems/xfs-delayed-logging-design.rst<br/>index 464405d2801e..6402ab8e370c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/xfs-delayed-logging-design.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/xfs-delayed-logging-design.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/xfs-delayed-logging-design.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/xfs-delayed-logging-design.rst</a></div><div class='hunk'>@@ -1,29 +1,314 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-==========================</div><div class='del'>-XFS Delayed Logging Design</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-Introduction to Re-logging in XFS</div><div class='del'>-=================================</div><div class='del'>-</div><div class='del'>-XFS logging is a combination of logical and physical logging. Some objects,</div><div class='del'>-such as inodes and dquots, are logged in logical format where the details</div><div class='del'>-logged are made up of the changes to in-core structures rather than on-disk</div><div class='del'>-structures. Other objects - typically buffers - have their physical changes</div><div class='del'>-logged. The reason for these differences is to reduce the amount of log space</div><div class='del'>-required for objects that are frequently logged. Some parts of inodes are more</div><div class='del'>-frequently logged than others, and inodes are typically more frequently logged</div><div class='del'>-than any other object (except maybe the superblock buffer) so keeping the</div><div class='del'>-amount of metadata logged low is of prime importance.</div><div class='del'>-</div><div class='del'>-The reason that this is such a concern is that XFS allows multiple separate</div><div class='del'>-modifications to a single object to be carried in the log at any given time.</div><div class='del'>-This allows the log to avoid needing to flush each change to disk before</div><div class='del'>-recording a new change to the object. XFS does this via a method called</div><div class='del'>-"re-logging". Conceptually, this is quite simple - all it requires is that any</div><div class='del'>-new change to the object is recorded with a *new copy* of all the existing</div><div class='del'>-changes in the new transaction that is written to the log.</div><div class='add'>+==================</div><div class='add'>+XFS Logging Design</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+Preamble</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+This document describes the design and algorithms that the XFS journalling</div><div class='add'>+subsystem is based on. This document describes the design and algorithms that</div><div class='add'>+the XFS journalling subsystem is based on so that readers may familiarize</div><div class='add'>+themselves with the general concepts of how transaction processing in XFS works.</div><div class='add'>+</div><div class='add'>+We begin with an overview of transactions in XFS, followed by describing how</div><div class='add'>+transaction reservations are structured and accounted, and then move into how we</div><div class='add'>+guarantee forwards progress for long running transactions with finite initial</div><div class='add'>+reservations bounds. At this point we need to explain how relogging works. With</div><div class='add'>+the basic concepts covered, the design of the delayed logging mechanism is</div><div class='add'>+documented.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+XFS uses Write Ahead Logging for ensuring changes to the filesystem metadata</div><div class='add'>+are atomic and recoverable. For reasons of space and time efficiency, the</div><div class='add'>+logging mechanisms are varied and complex, combining intents, logical and</div><div class='add'>+physical logging mechanisms to provide the necessary recovery guarantees the</div><div class='add'>+filesystem requires.</div><div class='add'>+</div><div class='add'>+Some objects, such as inodes and dquots, are logged in logical format where the</div><div class='add'>+details logged are made up of the changes to in-core structures rather than</div><div class='add'>+on-disk structures. Other objects - typically buffers - have their physical</div><div class='add'>+changes logged. Long running atomic modifications have individual changes</div><div class='add'>+chained together by intents, ensuring that journal recovery can restart and</div><div class='add'>+finish an operation that was only partially done when the system stopped</div><div class='add'>+functioning.</div><div class='add'>+</div><div class='add'>+The reason for these differences is to keep the amount of log space and CPU time</div><div class='add'>+required to process objects being modified as small as possible and hence the</div><div class='add'>+logging overhead as low as possible. Some items are very frequently modified,</div><div class='add'>+and some parts of objects are more frequently modified than others, so keeping</div><div class='add'>+the overhead of metadata logging low is of prime importance.</div><div class='add'>+</div><div class='add'>+The method used to log an item or chain modifications together isn't</div><div class='add'>+particularly important in the scope of this document. It suffices to know that</div><div class='add'>+the method used for logging a particular object or chaining modifications</div><div class='add'>+together are different and are dependent on the object and/or modification being</div><div class='add'>+performed. The logging subsystem only cares that certain specific rules are</div><div class='add'>+followed to guarantee forwards progress and prevent deadlocks.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Transactions in XFS</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+XFS has two types of high level transactions, defined by the type of log space</div><div class='add'>+reservation they take. These are known as "one shot" and "permanent"</div><div class='add'>+transactions. Permanent transaction reservations can take reservations that span</div><div class='add'>+commit boundaries, whilst "one shot" transactions are for a single atomic</div><div class='add'>+modification.</div><div class='add'>+</div><div class='add'>+The type and size of reservation must be matched to the modification taking</div><div class='add'>+place.  This means that permanent transactions can be used for one-shot</div><div class='add'>+modifications, but one-shot reservations cannot be used for permanent</div><div class='add'>+transactions.</div><div class='add'>+</div><div class='add'>+In the code, a one-shot transaction pattern looks somewhat like this::</div><div class='add'>+</div><div class='add'>+	tp = xfs_trans_alloc(&lt;reservation&gt;)</div><div class='add'>+	&lt;lock items&gt;</div><div class='add'>+	&lt;join item to transaction&gt;</div><div class='add'>+	&lt;do modification&gt;</div><div class='add'>+	xfs_trans_commit(tp);</div><div class='add'>+</div><div class='add'>+As items are modified in the transaction, the dirty regions in those items are</div><div class='add'>+tracked via the transaction handle.  Once the transaction is committed, all</div><div class='add'>+resources joined to it are released, along with the remaining unused reservation</div><div class='add'>+space that was taken at the transaction allocation time.</div><div class='add'>+</div><div class='add'>+In contrast, a permanent transaction is made up of multiple linked individual</div><div class='add'>+transactions, and the pattern looks like this::</div><div class='add'>+</div><div class='add'>+	tp = xfs_trans_alloc(&lt;reservation&gt;)</div><div class='add'>+	xfs_ilock(ip, XFS_ILOCK_EXCL)</div><div class='add'>+</div><div class='add'>+	loop {</div><div class='add'>+		xfs_trans_ijoin(tp, 0);</div><div class='add'>+		&lt;do modification&gt;</div><div class='add'>+		xfs_trans_log_inode(tp, ip);</div><div class='add'>+		xfs_trans_roll(&amp;tp);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	xfs_trans_commit(tp);</div><div class='add'>+	xfs_iunlock(ip, XFS_ILOCK_EXCL);</div><div class='add'>+</div><div class='add'>+While this might look similar to a one-shot transaction, there is an important</div><div class='add'>+difference: xfs_trans_roll() performs a specific operation that links two</div><div class='add'>+transactions together::</div><div class='add'>+</div><div class='add'>+	ntp = xfs_trans_dup(tp);</div><div class='add'>+	xfs_trans_commit(tp);</div><div class='add'>+	xfs_trans_reserve(ntp);</div><div class='add'>+</div><div class='add'>+This results in a series of "rolling transactions" where the inode is locked</div><div class='add'>+across the entire chain of transactions.  Hence while this series of rolling</div><div class='add'>+transactions is running, nothing else can read from or write to the inode and</div><div class='add'>+this provides a mechanism for complex changes to appear atomic from an external</div><div class='add'>+observer's point of view.</div><div class='add'>+</div><div class='add'>+It is important to note that a series of rolling transactions in a permanent</div><div class='add'>+transaction does not form an atomic change in the journal. While each</div><div class='add'>+individual modification is atomic, the chain is *not atomic*. If we crash half</div><div class='add'>+way through, then recovery will only replay up to the last transactional</div><div class='add'>+modification the loop made that was committed to the journal.</div><div class='add'>+</div><div class='add'>+This affects long running permanent transactions in that it is not possible to</div><div class='add'>+predict how much of a long running operation will actually be recovered because</div><div class='add'>+there is no guarantee of how much of the operation reached stale storage. Hence</div><div class='add'>+if a long running operation requires multiple transactions to fully complete,</div><div class='add'>+the high level operation must use intents and deferred operations to guarantee</div><div class='add'>+recovery can complete the operation once the first transactions is persisted in</div><div class='add'>+the on-disk journal.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Transactions are Asynchronous</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+In XFS, all high level transactions are asynchronous by default. This means that</div><div class='add'>+xfs_trans_commit() does not guarantee that the modification has been committed</div><div class='add'>+to stable storage when it returns. Hence when a system crashes, not all the</div><div class='add'>+completed transactions will be replayed during recovery.</div><div class='add'>+</div><div class='add'>+However, the logging subsystem does provide global ordering guarantees, such</div><div class='add'>+that if a specific change is seen after recovery, all metadata modifications</div><div class='add'>+that were committed prior to that change will also be seen.</div><div class='add'>+</div><div class='add'>+For single shot operations that need to reach stable storage immediately, or</div><div class='add'>+ensuring that a long running permanent transaction is fully committed once it is</div><div class='add'>+complete, we can explicitly tag a transaction as synchronous. This will trigger</div><div class='add'>+a "log force" to flush the outstanding committed transactions to stable storage</div><div class='add'>+in the journal and wait for that to complete.</div><div class='add'>+</div><div class='add'>+Synchronous transactions are rarely used, however, because they limit logging</div><div class='add'>+throughput to the IO latency limitations of the underlying storage. Instead, we</div><div class='add'>+tend to use log forces to ensure modifications are on stable storage only when</div><div class='add'>+a user operation requires a synchronisation point to occur (e.g. fsync).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Transaction Reservations</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+It has been mentioned a number of times now that the logging subsystem needs to</div><div class='add'>+provide a forwards progress guarantee so that no modification ever stalls</div><div class='add'>+because it can't be written to the journal due to a lack of space in the</div><div class='add'>+journal. This is achieved by the transaction reservations that are made when</div><div class='add'>+a transaction is first allocated. For permanent transactions, these reservations</div><div class='add'>+are maintained as part of the transaction rolling mechanism.</div><div class='add'>+</div><div class='add'>+A transaction reservation provides a guarantee that there is physical log space</div><div class='add'>+available to write the modification into the journal before we start making</div><div class='add'>+modifications to objects and items. As such, the reservation needs to be large</div><div class='add'>+enough to take into account the amount of metadata that the change might need to</div><div class='add'>+log in the worst case. This means that if we are modifying a btree in the</div><div class='add'>+transaction, we have to reserve enough space to record a full leaf-to-root split</div><div class='add'>+of the btree. As such, the reservations are quite complex because we have to</div><div class='add'>+take into account all the hidden changes that might occur.</div><div class='add'>+</div><div class='add'>+For example, a user data extent allocation involves allocating an extent from</div><div class='add'>+free space, which modifies the free space trees. That's two btrees.  Inserting</div><div class='add'>+the extent into the inode's extent map might require a split of the extent map</div><div class='add'>+btree, which requires another allocation that can modify the free space trees</div><div class='add'>+again.  Then we might have to update reverse mappings, which modifies yet</div><div class='add'>+another btree which might require more space. And so on.  Hence the amount of</div><div class='add'>+metadata that a "simple" operation can modify can be quite large.</div><div class='add'>+</div><div class='add'>+This "worst case" calculation provides us with the static "unit reservation"</div><div class='add'>+for the transaction that is calculated at mount time. We must guarantee that the</div><div class='add'>+log has this much space available before the transaction is allowed to proceed</div><div class='add'>+so that when we come to write the dirty metadata into the log we don't run out</div><div class='add'>+of log space half way through the write.</div><div class='add'>+</div><div class='add'>+For one-shot transactions, a single unit space reservation is all that is</div><div class='add'>+required for the transaction to proceed. For permanent transactions, however, we</div><div class='add'>+also have a "log count" that affects the size of the reservation that is to be</div><div class='add'>+made.</div><div class='add'>+</div><div class='add'>+While a permanent transaction can get by with a single unit of space</div><div class='add'>+reservation, it is somewhat inefficient to do this as it requires the</div><div class='add'>+transaction rolling mechanism to re-reserve space on every transaction roll. We</div><div class='add'>+know from the implementation of the permanent transactions how many transaction</div><div class='add'>+rolls are likely for the common modifications that need to be made.</div><div class='add'>+</div><div class='add'>+For example, an inode allocation is typically two transactions - one to</div><div class='add'>+physically allocate a free inode chunk on disk, and another to allocate an inode</div><div class='add'>+from an inode chunk that has free inodes in it.  Hence for an inode allocation</div><div class='add'>+transaction, we might set the reservation log count to a value of 2 to indicate</div><div class='add'>+that the common/fast path transaction will commit two linked transactions in a</div><div class='add'>+chain. Each time a permanent transaction rolls, it consumes an entire unit</div><div class='add'>+reservation.</div><div class='add'>+</div><div class='add'>+Hence when the permanent transaction is first allocated, the log space</div><div class='add'>+reservation is increased from a single unit reservation to multiple unit</div><div class='add'>+reservations. That multiple is defined by the reservation log count, and this</div><div class='add'>+means we can roll the transaction multiple times before we have to re-reserve</div><div class='add'>+log space when we roll the transaction. This ensures that the common</div><div class='add'>+modifications we make only need to reserve log space once.</div><div class='add'>+</div><div class='add'>+If the log count for a permanent transaction reaches zero, then it needs to</div><div class='add'>+re-reserve physical space in the log. This is somewhat complex, and requires</div><div class='add'>+an understanding of how the log accounts for space that has been reserved.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Log Space Accounting</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+The position in the log is typically referred to as a Log Sequence Number (LSN).</div><div class='add'>+The log is circular, so the positions in the log are defined by the combination</div><div class='add'>+of a cycle number - the number of times the log has been overwritten - and the</div><div class='add'>+offset into the log.  A LSN carries the cycle in the upper 32 bits and the</div><div class='add'>+offset in the lower 32 bits. The offset is in units of "basic blocks" (512</div><div class='add'>+bytes). Hence we can do realtively simple LSN based math to keep track of</div><div class='add'>+available space in the log.</div><div class='add'>+</div><div class='add'>+Log space accounting is done via a pair of constructs called "grant heads".  The</div><div class='add'>+position of the grant heads is an absolute value, so the amount of space</div><div class='add'>+available in the log is defined by the distance between the position of the</div><div class='add'>+grant head and the current log tail. That is, how much space can be</div><div class='add'>+reserved/consumed before the grant heads would fully wrap the log and overtake</div><div class='add'>+the tail position.</div><div class='add'>+</div><div class='add'>+The first grant head is the "reserve" head. This tracks the byte count of the</div><div class='add'>+reservations currently held by active transactions. It is a purely in-memory</div><div class='add'>+accounting of the space reservation and, as such, actually tracks byte offsets</div><div class='add'>+into the log rather than basic blocks. Hence it technically isn't using LSNs to</div><div class='add'>+represent the log position, but it is still treated like a split {cycle,offset}</div><div class='add'>+tuple for the purposes of tracking reservation space.</div><div class='add'>+</div><div class='add'>+The reserve grant head is used to accurately account for exact transaction</div><div class='add'>+reservations amounts and the exact byte count that modifications actually make</div><div class='add'>+and need to write into the log. The reserve head is used to prevent new</div><div class='add'>+transactions from taking new reservations when the head reaches the current</div><div class='add'>+tail. It will block new reservations in a FIFO queue and as the log tail moves</div><div class='add'>+forward it will wake them in order once sufficient space is available. This FIFO</div><div class='add'>+mechanism ensures no transaction is starved of resources when log space</div><div class='add'>+shortages occur.</div><div class='add'>+</div><div class='add'>+The other grant head is the "write" head. Unlike the reserve head, this grant</div><div class='add'>+head contains an LSN and it tracks the physical space usage in the log. While</div><div class='add'>+this might sound like it is accounting the same state as the reserve grant head</div><div class='add'>+- and it mostly does track exactly the same location as the reserve grant head -</div><div class='add'>+there are critical differences in behaviour between them that provides the</div><div class='add'>+forwards progress guarantees that rolling permanent transactions require.</div><div class='add'>+</div><div class='add'>+These differences when a permanent transaction is rolled and the internal "log</div><div class='add'>+count" reaches zero and the initial set of unit reservations have been</div><div class='add'>+exhausted. At this point, we still require a log space reservation to continue</div><div class='add'>+the next transaction in the sequeunce, but we have none remaining. We cannot</div><div class='add'>+sleep during the transaction commit process waiting for new log space to become</div><div class='add'>+available, as we may end up on the end of the FIFO queue and the items we have</div><div class='add'>+locked while we sleep could end up pinning the tail of the log before there is</div><div class='add'>+enough free space in the log to fulfill all of the pending reservations and</div><div class='add'>+then wake up transaction commit in progress.</div><div class='add'>+</div><div class='add'>+To take a new reservation without sleeping requires us to be able to take a</div><div class='add'>+reservation even if there is no reservation space currently available. That is,</div><div class='add'>+we need to be able to *overcommit* the log reservation space. As has already</div><div class='add'>+been detailed, we cannot overcommit physical log space. However, the reserve</div><div class='add'>+grant head does not track physical space - it only accounts for the amount of</div><div class='add'>+reservations we currently have outstanding. Hence if the reserve head passes</div><div class='add'>+over the tail of the log all it means is that new reservations will be throttled</div><div class='add'>+immediately and remain throttled until the log tail is moved forward far enough</div><div class='add'>+to remove the overcommit and start taking new reservations. In other words, we</div><div class='add'>+can overcommit the reserve head without violating the physical log head and tail</div><div class='add'>+rules.</div><div class='add'>+</div><div class='add'>+As a result, permanent transactions only "regrant" reservation space during</div><div class='add'>+xfs_trans_commit() calls, while the physical log space reservation - tracked by</div><div class='add'>+the write head - is then reserved separately by a call to xfs_log_reserve()</div><div class='add'>+after the commit completes. Once the commit completes, we can sleep waiting for</div><div class='add'>+physical log space to be reserved from the write grant head, but only if one</div><div class='add'>+critical rule has been observed::</div><div class='add'>+</div><div class='add'>+	Code using permanent reservations must always log the items they hold</div><div class='add'>+	locked across each transaction they roll in the chain.</div><div class='add'>+</div><div class='add'>+"Re-logging" the locked items on every transaction roll ensures that the items</div><div class='add'>+attached to the transaction chain being rolled are always relocated to the</div><div class='add'>+physical head of the log and so do not pin the tail of the log. If a locked item</div><div class='add'>+pins the tail of the log when we sleep on the write reservation, then we will</div><div class='add'>+deadlock the log as we cannot take the locks needed to write back that item and</div><div class='add'>+move the tail of the log forwards to free up write grant space. Re-logging the</div><div class='add'>+locked items avoids this deadlock and guarantees that the log reservation we are</div><div class='add'>+making cannot self-deadlock.</div><div class='add'>+</div><div class='add'>+If all rolling transactions obey this rule, then they can all make forwards</div><div class='add'>+progress independently because nothing will block the progress of the log</div><div class='add'>+tail moving forwards and hence ensuring that write grant space is always</div><div class='add'>+(eventually) made available to permanent transactions no matter how many times</div><div class='add'>+they roll.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Re-logging Explained</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+XFS allows multiple separate modifications to a single object to be carried in</div><div class='add'>+the log at any given time.  This allows the log to avoid needing to flush each</div><div class='add'>+change to disk before recording a new change to the object. XFS does this via a</div><div class='add'>+method called "re-logging". Conceptually, this is quite simple - all it requires</div><div class='add'>+is that any new change to the object is recorded with a *new copy* of all the</div><div class='add'>+existing changes in the new transaction that is written to the log.</div><div class='ctx'> </div><div class='ctx'> That is, if we have a sequence of changes A through to F, and the object was</div><div class='ctx'> written to disk after change D, we would see in the log the following series</div><div class='hunk'>@@ -42,16 +327,13 @@ transaction::</div><div class='ctx'> In other words, each time an object is relogged, the new transaction contains</div><div class='ctx'> the aggregation of all the previous changes currently held only in the log.</div><div class='ctx'> </div><div class='del'>-This relogging technique also allows objects to be moved forward in the log so</div><div class='del'>-that an object being relogged does not prevent the tail of the log from ever</div><div class='del'>-moving forward.  This can be seen in the table above by the changing</div><div class='del'>-(increasing) LSN of each subsequent transaction - the LSN is effectively a</div><div class='del'>-direct encoding of the location in the log of the transaction.</div><div class='add'>+This relogging technique allows objects to be moved forward in the log so that</div><div class='add'>+an object being relogged does not prevent the tail of the log from ever moving</div><div class='add'>+forward.  This can be seen in the table above by the changing (increasing) LSN</div><div class='add'>+of each subsequent transaction, and it's the technique that allows us to</div><div class='add'>+implement long-running, multiple-commit permanent transactions. </div><div class='ctx'> </div><div class='del'>-This relogging is also used to implement long-running, multiple-commit</div><div class='del'>-transactions.  These transaction are known as rolling transactions, and require</div><div class='del'>-a special log reservation known as a permanent transaction reservation. A</div><div class='del'>-typical example of a rolling transaction is the removal of extents from an</div><div class='add'>+A typical example of a rolling transaction is the removal of extents from an</div><div class='ctx'> inode which can only be done at a rate of two extents per transaction because</div><div class='ctx'> of reservation size limitations. Hence a rolling extent removal transaction</div><div class='ctx'> keeps relogging the inode and btree buffers as they get modified in each</div><div class='hunk'>@@ -67,12 +349,13 @@ the log over and over again. Worse is the fact that objects tend to get</div><div class='ctx'> dirtier as they get relogged, so each subsequent transaction is writing more</div><div class='ctx'> metadata into the log.</div><div class='ctx'> </div><div class='del'>-Another feature of the XFS transaction subsystem is that most transactions are</div><div class='del'>-asynchronous. That is, they don't commit to disk until either a log buffer is</div><div class='del'>-filled (a log buffer can hold multiple transactions) or a synchronous operation</div><div class='del'>-forces the log buffers holding the transactions to disk. This means that XFS is</div><div class='del'>-doing aggregation of transactions in memory - batching them, if you like - to</div><div class='del'>-minimise the impact of the log IO on transaction throughput.</div><div class='add'>+It should now also be obvious how relogging and asynchronous transactions go</div><div class='add'>+hand in hand. That is, transactions don't get written to the physical journal</div><div class='add'>+until either a log buffer is filled (a log buffer can hold multiple</div><div class='add'>+transactions) or a synchronous operation forces the log buffers holding the</div><div class='add'>+transactions to disk. This means that XFS is doing aggregation of transactions</div><div class='add'>+in memory - batching them, if you like - to minimise the impact of the log IO on</div><div class='add'>+transaction throughput.</div><div class='ctx'> </div><div class='ctx'> The limitation on asynchronous transaction throughput is the number and size of</div><div class='ctx'> log buffers made available by the log manager. By default there are 8 log</div><div class='hunk'>@@ -268,14 +551,14 @@ Essentially, this shows that an item that is in the AIL can still be modified</div><div class='ctx'> and relogged, so any tracking must be separate to the AIL infrastructure. As</div><div class='ctx'> such, we cannot reuse the AIL list pointers for tracking committed items, nor</div><div class='ctx'> can we store state in any field that is protected by the AIL lock. Hence the</div><div class='del'>-committed item tracking needs it's own locks, lists and state fields in the log</div><div class='add'>+committed item tracking needs its own locks, lists and state fields in the log</div><div class='ctx'> item.</div><div class='ctx'> </div><div class='ctx'> Similar to the AIL, tracking of committed items is done through a new list</div><div class='ctx'> called the Committed Item List (CIL).  The list tracks log items that have been</div><div class='ctx'> committed and have formatted memory buffers attached to them. It tracks objects</div><div class='ctx'> in transaction commit order, so when an object is relogged it is removed from</div><div class='del'>-it's place in the list and re-inserted at the tail. This is entirely arbitrary</div><div class='add'>+its place in the list and re-inserted at the tail. This is entirely arbitrary</div><div class='ctx'> and done to make it easy for debugging - the last items in the list are the</div><div class='ctx'> ones that are most recently modified. Ordering of the CIL is not necessary for</div><div class='ctx'> transactional integrity (as discussed in the next section) so the ordering is</div><div class='hunk'>@@ -332,7 +615,7 @@ those changes into the current checkpoint context. We then initialise a new</div><div class='ctx'> context and attach that to the CIL for aggregation of new transactions.</div><div class='ctx'> </div><div class='ctx'> This allows us to unlock the CIL immediately after transfer of all the</div><div class='del'>-committed items and effectively allow new transactions to be issued while we</div><div class='add'>+committed items and effectively allows new transactions to be issued while we</div><div class='ctx'> are formatting the checkpoint into the log. It also allows concurrent</div><div class='ctx'> checkpoints to be written into the log buffers in the case of log force heavy</div><div class='ctx'> workloads, just like the existing transaction commit code does. This, however,</div><div class='hunk'>@@ -601,9 +884,9 @@ pin the object the first time it is inserted into the CIL - if it is already in</div><div class='ctx'> the CIL during a transaction commit, then we do not pin it again. Because there</div><div class='ctx'> can be multiple outstanding checkpoint contexts, we can still see elevated pin</div><div class='ctx'> counts, but as each checkpoint completes the pin count will retain the correct</div><div class='del'>-value according to it's context.</div><div class='add'>+value according to its context.</div><div class='ctx'> </div><div class='del'>-Just to make matters more slightly more complex, this checkpoint level context</div><div class='add'>+Just to make matters slightly more complex, this checkpoint level context</div><div class='ctx'> for the pin count means that the pinning of an item must take place under the</div><div class='ctx'> CIL commit/flush lock. If we pin the object outside this lock, we cannot</div><div class='ctx'> guarantee which context the pin count is associated with. This is because of</div><div class='head'>diff --git a/Documentation/filesystems/xfs-online-fsck-design.rst b/Documentation/filesystems/xfs-online-fsck-design.rst<br/>new file mode 100644<br/>index 000000000000..791ab264b77e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/xfs-online-fsck-design.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/xfs-online-fsck-design.rst</a></div><div class='hunk'>@@ -0,0 +1,5315 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+.. _xfs_online_fsck_design:</div><div class='add'>+</div><div class='add'>+..</div><div class='add'>+        Mapping of heading styles within this document:</div><div class='add'>+        Heading 1 uses "====" above and below</div><div class='add'>+        Heading 2 uses "===="</div><div class='add'>+        Heading 3 uses "----"</div><div class='add'>+        Heading 4 uses "````"</div><div class='add'>+        Heading 5 uses "^^^^"</div><div class='add'>+        Heading 6 uses "~~~~"</div><div class='add'>+        Heading 7 uses "...."</div><div class='add'>+</div><div class='add'>+        Sections are manually numbered because apparently that's what everyone</div><div class='add'>+        does in the kernel.</div><div class='add'>+</div><div class='add'>+======================</div><div class='add'>+XFS Online Fsck Design</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+This document captures the design of the online filesystem check feature for</div><div class='add'>+XFS.</div><div class='add'>+The purpose of this document is threefold:</div><div class='add'>+</div><div class='add'>+- To help kernel distributors understand exactly what the XFS online fsck</div><div class='add'>+  feature is, and issues about which they should be aware.</div><div class='add'>+</div><div class='add'>+- To help people reading the code to familiarize themselves with the relevant</div><div class='add'>+  concepts and design points before they start digging into the code.</div><div class='add'>+</div><div class='add'>+- To help developers maintaining the system by capturing the reasons</div><div class='add'>+  supporting higher level decision making.</div><div class='add'>+</div><div class='add'>+As the online fsck code is merged, the links in this document to topic branches</div><div class='add'>+will be replaced with links to code.</div><div class='add'>+</div><div class='add'>+This document is licensed under the terms of the GNU Public License, v2.</div><div class='add'>+The primary author is Darrick J. Wong.</div><div class='add'>+</div><div class='add'>+This design document is split into seven parts.</div><div class='add'>+Part 1 defines what fsck tools are and the motivations for writing a new one.</div><div class='add'>+Parts 2 and 3 present a high level overview of how online fsck process works</div><div class='add'>+and how it is tested to ensure correct functionality.</div><div class='add'>+Part 4 discusses the user interface and the intended usage modes of the new</div><div class='add'>+program.</div><div class='add'>+Parts 5 and 6 show off the high level components and how they fit together, and</div><div class='add'>+then present case studies of how each repair function actually works.</div><div class='add'>+Part 7 sums up what has been discussed so far and speculates about what else</div><div class='add'>+might be built atop online fsck.</div><div class='add'>+</div><div class='add'>+.. contents:: Table of Contents</div><div class='add'>+   :local:</div><div class='add'>+</div><div class='add'>+1. What is a Filesystem Check?</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+A Unix filesystem has four main responsibilities:</div><div class='add'>+</div><div class='add'>+- Provide a hierarchy of names through which application programs can associate</div><div class='add'>+  arbitrary blobs of data for any length of time,</div><div class='add'>+</div><div class='add'>+- Virtualize physical storage media across those names, and</div><div class='add'>+</div><div class='add'>+- Retrieve the named data blobs at any time.</div><div class='add'>+</div><div class='add'>+- Examine resource usage.</div><div class='add'>+</div><div class='add'>+Metadata directly supporting these functions (e.g. files, directories, space</div><div class='add'>+mappings) are sometimes called primary metadata.</div><div class='add'>+Secondary metadata (e.g. reverse mapping and directory parent pointers) support</div><div class='add'>+operations internal to the filesystem, such as internal consistency checking</div><div class='add'>+and reorganization.</div><div class='add'>+Summary metadata, as the name implies, condense information contained in</div><div class='add'>+primary metadata for performance reasons.</div><div class='add'>+</div><div class='add'>+The filesystem check (fsck) tool examines all the metadata in a filesystem</div><div class='add'>+to look for errors.</div><div class='add'>+In addition to looking for obvious metadata corruptions, fsck also</div><div class='add'>+cross-references different types of metadata records with each other to look</div><div class='add'>+for inconsistencies.</div><div class='add'>+People do not like losing data, so most fsck tools also contains some ability</div><div class='add'>+to correct any problems found.</div><div class='add'>+As a word of caution -- the primary goal of most Linux fsck tools is to restore</div><div class='add'>+the filesystem metadata to a consistent state, not to maximize the data</div><div class='add'>+recovered.</div><div class='add'>+That precedent will not be challenged here.</div><div class='add'>+</div><div class='add'>+Filesystems of the 20th century generally lacked any redundancy in the ondisk</div><div class='add'>+format, which means that fsck can only respond to errors by erasing files until</div><div class='add'>+errors are no longer detected.</div><div class='add'>+More recent filesystem designs contain enough redundancy in their metadata that</div><div class='add'>+it is now possible to regenerate data structures when non-catastrophic errors</div><div class='add'>+occur; this capability aids both strategies.</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Note**:                                                                |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| System administrators avoid data loss by increasing the number of        |</div><div class='add'>+| separate storage systems through the creation of backups; and they avoid |</div><div class='add'>+| downtime by increasing the redundancy of each storage system through the |</div><div class='add'>+| creation of RAID arrays.                                                 |</div><div class='add'>+| fsck tools address only the first problem.                               |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+TLDR; Show Me the Code!</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+Code is posted to the kernel.org git trees as follows:</div><div class='add'>+`kernel changes &lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-symlink&gt;`_,</div><div class='add'>+`userspace changes &lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-media-scan-service&gt;`_, and</div><div class='add'>+`QA test changes &lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfstests-dev.git/log/?h=repair-dirs&gt;`_.</div><div class='add'>+Each kernel patchset adding an online repair function will use the same branch</div><div class='add'>+name across the kernel, xfsprogs, and fstests git repos.</div><div class='add'>+</div><div class='add'>+Existing Tools</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+The online fsck tool described here will be the third tool in the history of</div><div class='add'>+XFS (on Linux) to check and repair filesystems.</div><div class='add'>+Two programs precede it:</div><div class='add'>+</div><div class='add'>+The first program, ``xfs_check``, was created as part of the XFS debugger</div><div class='add'>+(``xfs_db``) and can only be used with unmounted filesystems.</div><div class='add'>+It walks all metadata in the filesystem looking for inconsistencies in the</div><div class='add'>+metadata, though it lacks any ability to repair what it finds.</div><div class='add'>+Due to its high memory requirements and inability to repair things, this</div><div class='add'>+program is now deprecated and will not be discussed further.</div><div class='add'>+</div><div class='add'>+The second program, ``xfs_repair``, was created to be faster and more robust</div><div class='add'>+than the first program.</div><div class='add'>+Like its predecessor, it can only be used with unmounted filesystems.</div><div class='add'>+It uses extent-based in-memory data structures to reduce memory consumption,</div><div class='add'>+and tries to schedule readahead IO appropriately to reduce I/O waiting time</div><div class='add'>+while it scans the metadata of the entire filesystem.</div><div class='add'>+The most important feature of this tool is its ability to respond to</div><div class='add'>+inconsistencies in file metadata and directory tree by erasing things as needed</div><div class='add'>+to eliminate problems.</div><div class='add'>+Space usage metadata are rebuilt from the observed file metadata.</div><div class='add'>+</div><div class='add'>+Problem Statement</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+The current XFS tools leave several problems unsolved:</div><div class='add'>+</div><div class='add'>+1. **User programs** suddenly **lose access** to the filesystem when unexpected</div><div class='add'>+   shutdowns occur as a result of silent corruptions in the metadata.</div><div class='add'>+   These occur **unpredictably** and often without warning.</div><div class='add'>+</div><div class='add'>+2. **Users** experience a **total loss of service** during the recovery period</div><div class='add'>+   after an **unexpected shutdown** occurs.</div><div class='add'>+</div><div class='add'>+3. **Users** experience a **total loss of service** if the filesystem is taken</div><div class='add'>+   offline to **look for problems** proactively.</div><div class='add'>+</div><div class='add'>+4. **Data owners** cannot **check the integrity** of their stored data without</div><div class='add'>+   reading all of it.</div><div class='add'>+   This may expose them to substantial billing costs when a linear media scan</div><div class='add'>+   performed by the storage system administrator might suffice.</div><div class='add'>+</div><div class='add'>+5. **System administrators** cannot **schedule** a maintenance window to deal</div><div class='add'>+   with corruptions if they **lack the means** to assess filesystem health</div><div class='add'>+   while the filesystem is online.</div><div class='add'>+</div><div class='add'>+6. **Fleet monitoring tools** cannot **automate periodic checks** of filesystem</div><div class='add'>+   health when doing so requires **manual intervention** and downtime.</div><div class='add'>+</div><div class='add'>+7. **Users** can be tricked into **doing things they do not desire** when</div><div class='add'>+   malicious actors **exploit quirks of Unicode** to place misleading names</div><div class='add'>+   in directories.</div><div class='add'>+</div><div class='add'>+Given this definition of the problems to be solved and the actors who would</div><div class='add'>+benefit, the proposed solution is a third fsck tool that acts on a running</div><div class='add'>+filesystem.</div><div class='add'>+</div><div class='add'>+This new third program has three components: an in-kernel facility to check</div><div class='add'>+metadata, an in-kernel facility to repair metadata, and a userspace driver</div><div class='add'>+program to drive fsck activity on a live filesystem.</div><div class='add'>+``xfs_scrub`` is the name of the driver program.</div><div class='add'>+The rest of this document presents the goals and use cases of the new fsck</div><div class='add'>+tool, describes its major design points in connection to those goals, and</div><div class='add'>+discusses the similarities and differences with existing tools.</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Note**:                                                                |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| Throughout this document, the existing offline fsck tool can also be     |</div><div class='add'>+| referred to by its current name "``xfs_repair``".                        |</div><div class='add'>+| The userspace driver program for the new online fsck tool can be         |</div><div class='add'>+| referred to as "``xfs_scrub``".                                          |</div><div class='add'>+| The kernel portion of online fsck that validates metadata is called      |</div><div class='add'>+| "online scrub", and portion of the kernel that fixes metadata is called  |</div><div class='add'>+| "online repair".                                                         |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+The naming hierarchy is broken up into objects known as directories and files</div><div class='add'>+and the physical space is split into pieces known as allocation groups.</div><div class='add'>+Sharding enables better performance on highly parallel systems and helps to</div><div class='add'>+contain the damage when corruptions occur.</div><div class='add'>+The division of the filesystem into principal objects (allocation groups and</div><div class='add'>+inodes) means that there are ample opportunities to perform targeted checks and</div><div class='add'>+repairs on a subset of the filesystem.</div><div class='add'>+</div><div class='add'>+While this is going on, other parts continue processing IO requests.</div><div class='add'>+Even if a piece of filesystem metadata can only be regenerated by scanning the</div><div class='add'>+entire system, the scan can still be done in the background while other file</div><div class='add'>+operations continue.</div><div class='add'>+</div><div class='add'>+In summary, online fsck takes advantage of resource sharding and redundant</div><div class='add'>+metadata to enable targeted checking and repair operations while the system</div><div class='add'>+is running.</div><div class='add'>+This capability will be coupled to automatic system management so that</div><div class='add'>+autonomous self-healing of XFS maximizes service availability.</div><div class='add'>+</div><div class='add'>+2. Theory of Operation</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+Because it is necessary for online fsck to lock and scan live metadata objects,</div><div class='add'>+online fsck consists of three separate code components.</div><div class='add'>+The first is the userspace driver program ``xfs_scrub``, which is responsible</div><div class='add'>+for identifying individual metadata items, scheduling work items for them,</div><div class='add'>+reacting to the outcomes appropriately, and reporting results to the system</div><div class='add'>+administrator.</div><div class='add'>+The second and third are in the kernel, which implements functions to check</div><div class='add'>+and repair each type of online fsck work item.</div><div class='add'>+</div><div class='add'>++------------------------------------------------------------------+</div><div class='add'>+| **Note**:                                                        |</div><div class='add'>++------------------------------------------------------------------+</div><div class='add'>+| For brevity, this document shortens the phrase "online fsck work |</div><div class='add'>+| item" to "scrub item".                                           |</div><div class='add'>++------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+Scrub item types are delineated in a manner consistent with the Unix design</div><div class='add'>+philosophy, which is to say that each item should handle one aspect of a</div><div class='add'>+metadata structure, and handle it well.</div><div class='add'>+</div><div class='add'>+Scope</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+In principle, online fsck should be able to check and to repair everything that</div><div class='add'>+the offline fsck program can handle.</div><div class='add'>+However, online fsck cannot be running 100% of the time, which means that</div><div class='add'>+latent errors may creep in after a scrub completes.</div><div class='add'>+If these errors cause the next mount to fail, offline fsck is the only</div><div class='add'>+solution.</div><div class='add'>+This limitation means that maintenance of the offline fsck tool will continue.</div><div class='add'>+A second limitation of online fsck is that it must follow the same resource</div><div class='add'>+sharing and lock acquisition rules as the regular filesystem.</div><div class='add'>+This means that scrub cannot take *any* shortcuts to save time, because doing</div><div class='add'>+so could lead to concurrency problems.</div><div class='add'>+In other words, online fsck is not a complete replacement for offline fsck, and</div><div class='add'>+a complete run of online fsck may take longer than online fsck.</div><div class='add'>+However, both of these limitations are acceptable tradeoffs to satisfy the</div><div class='add'>+different motivations of online fsck, which are to **minimize system downtime**</div><div class='add'>+and to **increase predictability of operation**.</div><div class='add'>+</div><div class='add'>+.. _scrubphases:</div><div class='add'>+</div><div class='add'>+Phases of Work</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+The userspace driver program ``xfs_scrub`` splits the work of checking and</div><div class='add'>+repairing an entire filesystem into seven phases.</div><div class='add'>+Each phase concentrates on checking specific types of scrub items and depends</div><div class='add'>+on the success of all previous phases.</div><div class='add'>+The seven phases are as follows:</div><div class='add'>+</div><div class='add'>+1. Collect geometry information about the mounted filesystem and computer,</div><div class='add'>+   discover the online fsck capabilities of the kernel, and open the</div><div class='add'>+   underlying storage devices.</div><div class='add'>+</div><div class='add'>+2. Check allocation group metadata, all realtime volume metadata, and all quota</div><div class='add'>+   files.</div><div class='add'>+   Each metadata structure is scheduled as a separate scrub item.</div><div class='add'>+   If corruption is found in the inode header or inode btree and ``xfs_scrub``</div><div class='add'>+   is permitted to perform repairs, then those scrub items are repaired to</div><div class='add'>+   prepare for phase 3.</div><div class='add'>+   Repairs are implemented by using the information in the scrub item to</div><div class='add'>+   resubmit the kernel scrub call with the repair flag enabled; this is</div><div class='add'>+   discussed in the next section.</div><div class='add'>+   Optimizations and all other repairs are deferred to phase 4.</div><div class='add'>+</div><div class='add'>+3. Check all metadata of every file in the filesystem.</div><div class='add'>+   Each metadata structure is also scheduled as a separate scrub item.</div><div class='add'>+   If repairs are needed and ``xfs_scrub`` is permitted to perform repairs,</div><div class='add'>+   and there were no problems detected during phase 2, then those scrub items</div><div class='add'>+   are repaired immediately.</div><div class='add'>+   Optimizations, deferred repairs, and unsuccessful repairs are deferred to</div><div class='add'>+   phase 4.</div><div class='add'>+</div><div class='add'>+4. All remaining repairs and scheduled optimizations are performed during this</div><div class='add'>+   phase, if the caller permits them.</div><div class='add'>+   Before starting repairs, the summary counters are checked and any necessary</div><div class='add'>+   repairs are performed so that subsequent repairs will not fail the resource</div><div class='add'>+   reservation step due to wildly incorrect summary counters.</div><div class='add'>+   Unsuccesful repairs are requeued as long as forward progress on repairs is</div><div class='add'>+   made somewhere in the filesystem.</div><div class='add'>+   Free space in the filesystem is trimmed at the end of phase 4 if the</div><div class='add'>+   filesystem is clean.</div><div class='add'>+</div><div class='add'>+5. By the start of this phase, all primary and secondary filesystem metadata</div><div class='add'>+   must be correct.</div><div class='add'>+   Summary counters such as the free space counts and quota resource counts</div><div class='add'>+   are checked and corrected.</div><div class='add'>+   Directory entry names and extended attribute names are checked for</div><div class='add'>+   suspicious entries such as control characters or confusing Unicode sequences</div><div class='add'>+   appearing in names.</div><div class='add'>+</div><div class='add'>+6. If the caller asks for a media scan, read all allocated and written data</div><div class='add'>+   file extents in the filesystem.</div><div class='add'>+   The ability to use hardware-assisted data file integrity checking is new</div><div class='add'>+   to online fsck; neither of the previous tools have this capability.</div><div class='add'>+   If media errors occur, they will be mapped to the owning files and reported.</div><div class='add'>+</div><div class='add'>+7. Re-check the summary counters and presents the caller with a summary of</div><div class='add'>+   space usage and file counts.</div><div class='add'>+</div><div class='add'>+This allocation of responsibilities will be :ref:`revisited &lt;scrubcheck&gt;`</div><div class='add'>+later in this document.</div><div class='add'>+</div><div class='add'>+Steps for Each Scrub Item</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+The kernel scrub code uses a three-step strategy for checking and repairing</div><div class='add'>+the one aspect of a metadata object represented by a scrub item:</div><div class='add'>+</div><div class='add'>+1. The scrub item of interest is checked for corruptions; opportunities for</div><div class='add'>+   optimization; and for values that are directly controlled by the system</div><div class='add'>+   administrator but look suspicious.</div><div class='add'>+   If the item is not corrupt or does not need optimization, resource are</div><div class='add'>+   released and the positive scan results are returned to userspace.</div><div class='add'>+   If the item is corrupt or could be optimized but the caller does not permit</div><div class='add'>+   this, resources are released and the negative scan results are returned to</div><div class='add'>+   userspace.</div><div class='add'>+   Otherwise, the kernel moves on to the second step.</div><div class='add'>+</div><div class='add'>+2. The repair function is called to rebuild the data structure.</div><div class='add'>+   Repair functions generally choose rebuild a structure from other metadata</div><div class='add'>+   rather than try to salvage the existing structure.</div><div class='add'>+   If the repair fails, the scan results from the first step are returned to</div><div class='add'>+   userspace.</div><div class='add'>+   Otherwise, the kernel moves on to the third step.</div><div class='add'>+</div><div class='add'>+3. In the third step, the kernel runs the same checks over the new metadata</div><div class='add'>+   item to assess the efficacy of the repairs.</div><div class='add'>+   The results of the reassessment are returned to userspace.</div><div class='add'>+</div><div class='add'>+Classification of Metadata</div><div class='add'>+--------------------------</div><div class='add'>+</div><div class='add'>+Each type of metadata object (and therefore each type of scrub item) is</div><div class='add'>+classified as follows:</div><div class='add'>+</div><div class='add'>+Primary Metadata</div><div class='add'>+````````````````</div><div class='add'>+</div><div class='add'>+Metadata structures in this category should be most familiar to filesystem</div><div class='add'>+users either because they are directly created by the user or they index</div><div class='add'>+objects created by the user</div><div class='add'>+Most filesystem objects fall into this class:</div><div class='add'>+</div><div class='add'>+- Free space and reference count information</div><div class='add'>+</div><div class='add'>+- Inode records and indexes</div><div class='add'>+</div><div class='add'>+- Storage mapping information for file data</div><div class='add'>+</div><div class='add'>+- Directories</div><div class='add'>+</div><div class='add'>+- Extended attributes</div><div class='add'>+</div><div class='add'>+- Symbolic links</div><div class='add'>+</div><div class='add'>+- Quota limits</div><div class='add'>+</div><div class='add'>+Scrub obeys the same rules as regular filesystem accesses for resource and lock</div><div class='add'>+acquisition.</div><div class='add'>+</div><div class='add'>+Primary metadata objects are the simplest for scrub to process.</div><div class='add'>+The principal filesystem object (either an allocation group or an inode) that</div><div class='add'>+owns the item being scrubbed is locked to guard against concurrent updates.</div><div class='add'>+The check function examines every record associated with the type for obvious</div><div class='add'>+errors and cross-references healthy records against other metadata to look for</div><div class='add'>+inconsistencies.</div><div class='add'>+Repairs for this class of scrub item are simple, since the repair function</div><div class='add'>+starts by holding all the resources acquired in the previous step.</div><div class='add'>+The repair function scans available metadata as needed to record all the</div><div class='add'>+observations needed to complete the structure.</div><div class='add'>+Next, it stages the observations in a new ondisk structure and commits it</div><div class='add'>+atomically to complete the repair.</div><div class='add'>+Finally, the storage from the old data structure are carefully reaped.</div><div class='add'>+</div><div class='add'>+Because ``xfs_scrub`` locks a primary object for the duration of the repair,</div><div class='add'>+this is effectively an offline repair operation performed on a subset of the</div><div class='add'>+filesystem.</div><div class='add'>+This minimizes the complexity of the repair code because it is not necessary to</div><div class='add'>+handle concurrent updates from other threads, nor is it necessary to access</div><div class='add'>+any other part of the filesystem.</div><div class='add'>+As a result, indexed structures can be rebuilt very quickly, and programs</div><div class='add'>+trying to access the damaged structure will be blocked until repairs complete.</div><div class='add'>+The only infrastructure needed by the repair code are the staging area for</div><div class='add'>+observations and a means to write new structures to disk.</div><div class='add'>+Despite these limitations, the advantage that online repair holds is clear:</div><div class='add'>+targeted work on individual shards of the filesystem avoids total loss of</div><div class='add'>+service.</div><div class='add'>+</div><div class='add'>+This mechanism is described in section 2.1 ("Off-Line Algorithm") of</div><div class='add'>+V. Srinivasan and M. J. Carey, `"Performance of On-Line Index Construction</div><div class='add'>+Algorithms" &lt;https://minds.wisconsin.edu/bitstream/handle/1793/59524/TR1047.pdf&gt;`_,</div><div class='add'>+*Extending Database Technology*, pp. 293-309, 1992.</div><div class='add'>+</div><div class='add'>+Most primary metadata repair functions stage their intermediate results in an</div><div class='add'>+in-memory array prior to formatting the new ondisk structure, which is very</div><div class='add'>+similar to the list-based algorithm discussed in section 2.3 ("List-Based</div><div class='add'>+Algorithms") of Srinivasan.</div><div class='add'>+However, any data structure builder that maintains a resource lock for the</div><div class='add'>+duration of the repair is *always* an offline algorithm.</div><div class='add'>+</div><div class='add'>+.. _secondary_metadata:</div><div class='add'>+</div><div class='add'>+Secondary Metadata</div><div class='add'>+``````````````````</div><div class='add'>+</div><div class='add'>+Metadata structures in this category reflect records found in primary metadata,</div><div class='add'>+but are only needed for online fsck or for reorganization of the filesystem.</div><div class='add'>+</div><div class='add'>+Secondary metadata include:</div><div class='add'>+</div><div class='add'>+- Reverse mapping information</div><div class='add'>+</div><div class='add'>+- Directory parent pointers</div><div class='add'>+</div><div class='add'>+This class of metadata is difficult for scrub to process because scrub attaches</div><div class='add'>+to the secondary object but needs to check primary metadata, which runs counter</div><div class='add'>+to the usual order of resource acquisition.</div><div class='add'>+Frequently, this means that full filesystems scans are necessary to rebuild the</div><div class='add'>+metadata.</div><div class='add'>+Check functions can be limited in scope to reduce runtime.</div><div class='add'>+Repairs, however, require a full scan of primary metadata, which can take a</div><div class='add'>+long time to complete.</div><div class='add'>+Under these conditions, ``xfs_scrub`` cannot lock resources for the entire</div><div class='add'>+duration of the repair.</div><div class='add'>+</div><div class='add'>+Instead, repair functions set up an in-memory staging structure to store</div><div class='add'>+observations.</div><div class='add'>+Depending on the requirements of the specific repair function, the staging</div><div class='add'>+index will either have the same format as the ondisk structure or a design</div><div class='add'>+specific to that repair function.</div><div class='add'>+The next step is to release all locks and start the filesystem scan.</div><div class='add'>+When the repair scanner needs to record an observation, the staging data are</div><div class='add'>+locked long enough to apply the update.</div><div class='add'>+While the filesystem scan is in progress, the repair function hooks the</div><div class='add'>+filesystem so that it can apply pending filesystem updates to the staging</div><div class='add'>+information.</div><div class='add'>+Once the scan is done, the owning object is re-locked, the live data is used to</div><div class='add'>+write a new ondisk structure, and the repairs are committed atomically.</div><div class='add'>+The hooks are disabled and the staging staging area is freed.</div><div class='add'>+Finally, the storage from the old data structure are carefully reaped.</div><div class='add'>+</div><div class='add'>+Introducing concurrency helps online repair avoid various locking problems, but</div><div class='add'>+comes at a high cost to code complexity.</div><div class='add'>+Live filesystem code has to be hooked so that the repair function can observe</div><div class='add'>+updates in progress.</div><div class='add'>+The staging area has to become a fully functional parallel structure so that</div><div class='add'>+updates can be merged from the hooks.</div><div class='add'>+Finally, the hook, the filesystem scan, and the inode locking model must be</div><div class='add'>+sufficiently well integrated that a hook event can decide if a given update</div><div class='add'>+should be applied to the staging structure.</div><div class='add'>+</div><div class='add'>+In theory, the scrub implementation could apply these same techniques for</div><div class='add'>+primary metadata, but doing so would make it massively more complex and less</div><div class='add'>+performant.</div><div class='add'>+Programs attempting to access the damaged structures are not blocked from</div><div class='add'>+operation, which may cause application failure or an unplanned filesystem</div><div class='add'>+shutdown.</div><div class='add'>+</div><div class='add'>+Inspiration for the secondary metadata repair strategy was drawn from section</div><div class='add'>+2.4 of Srinivasan above, and sections 2 ("NSF: Inded Build Without Side-File")</div><div class='add'>+and 3.1.1 ("Duplicate Key Insert Problem") in C. Mohan, `"Algorithms for</div><div class='add'>+Creating Indexes for Very Large Tables Without Quiescing Updates"</div><div class='add'>+&lt;https://dl.acm.org/doi/10.1145/130283.130337&gt;`_, 1992.</div><div class='add'>+</div><div class='add'>+The sidecar index mentioned above bears some resemblance to the side file</div><div class='add'>+method mentioned in Srinivasan and Mohan.</div><div class='add'>+Their method consists of an index builder that extracts relevant record data to</div><div class='add'>+build the new structure as quickly as possible; and an auxiliary structure that</div><div class='add'>+captures all updates that would be committed to the index by other threads were</div><div class='add'>+the new index already online.</div><div class='add'>+After the index building scan finishes, the updates recorded in the side file</div><div class='add'>+are applied to the new index.</div><div class='add'>+To avoid conflicts between the index builder and other writer threads, the</div><div class='add'>+builder maintains a publicly visible cursor that tracks the progress of the</div><div class='add'>+scan through the record space.</div><div class='add'>+To avoid duplication of work between the side file and the index builder, side</div><div class='add'>+file updates are elided when the record ID for the update is greater than the</div><div class='add'>+cursor position within the record ID space.</div><div class='add'>+</div><div class='add'>+To minimize changes to the rest of the codebase, XFS online repair keeps the</div><div class='add'>+replacement index hidden until it's completely ready to go.</div><div class='add'>+In other words, there is no attempt to expose the keyspace of the new index</div><div class='add'>+while repair is running.</div><div class='add'>+The complexity of such an approach would be very high and perhaps more</div><div class='add'>+appropriate to building *new* indices.</div><div class='add'>+</div><div class='add'>+**Future Work Question**: Can the full scan and live update code used to</div><div class='add'>+facilitate a repair also be used to implement a comprehensive check?</div><div class='add'>+</div><div class='add'>+*Answer*: In theory, yes.  Check would be much stronger if each scrub function</div><div class='add'>+employed these live scans to build a shadow copy of the metadata and then</div><div class='add'>+compared the shadow records to the ondisk records.</div><div class='add'>+However, doing that is a fair amount more work than what the checking functions</div><div class='add'>+do now.</div><div class='add'>+The live scans and hooks were developed much later.</div><div class='add'>+That in turn increases the runtime of those scrub functions.</div><div class='add'>+</div><div class='add'>+Summary Information</div><div class='add'>+```````````````````</div><div class='add'>+</div><div class='add'>+Metadata structures in this last category summarize the contents of primary</div><div class='add'>+metadata records.</div><div class='add'>+These are often used to speed up resource usage queries, and are many times</div><div class='add'>+smaller than the primary metadata which they represent.</div><div class='add'>+</div><div class='add'>+Examples of summary information include:</div><div class='add'>+</div><div class='add'>+- Summary counts of free space and inodes</div><div class='add'>+</div><div class='add'>+- File link counts from directories</div><div class='add'>+</div><div class='add'>+- Quota resource usage counts</div><div class='add'>+</div><div class='add'>+Check and repair require full filesystem scans, but resource and lock</div><div class='add'>+acquisition follow the same paths as regular filesystem accesses.</div><div class='add'>+</div><div class='add'>+The superblock summary counters have special requirements due to the underlying</div><div class='add'>+implementation of the incore counters, and will be treated separately.</div><div class='add'>+Check and repair of the other types of summary counters (quota resource counts</div><div class='add'>+and file link counts) employ the same filesystem scanning and hooking</div><div class='add'>+techniques as outlined above, but because the underlying data are sets of</div><div class='add'>+integer counters, the staging data need not be a fully functional mirror of the</div><div class='add'>+ondisk structure.</div><div class='add'>+</div><div class='add'>+Inspiration for quota and file link count repair strategies were drawn from</div><div class='add'>+sections 2.12 ("Online Index Operations") through 2.14 ("Incremental View</div><div class='add'>+Maintenace") of G.  Graefe, `"Concurrent Queries and Updates in Summary Views</div><div class='add'>+and Their Indexes"</div><div class='add'>+&lt;http://www.odbms.org/wp-content/uploads/2014/06/Increment-locks.pdf&gt;`_, 2011.</div><div class='add'>+</div><div class='add'>+Since quotas are non-negative integer counts of resource usage, online</div><div class='add'>+quotacheck can use the incremental view deltas described in section 2.14 to</div><div class='add'>+track pending changes to the block and inode usage counts in each transaction,</div><div class='add'>+and commit those changes to a dquot side file when the transaction commits.</div><div class='add'>+Delta tracking is necessary for dquots because the index builder scans inodes,</div><div class='add'>+whereas the data structure being rebuilt is an index of dquots.</div><div class='add'>+Link count checking combines the view deltas and commit step into one because</div><div class='add'>+it sets attributes of the objects being scanned instead of writing them to a</div><div class='add'>+separate data structure.</div><div class='add'>+Each online fsck function will be discussed as case studies later in this</div><div class='add'>+document.</div><div class='add'>+</div><div class='add'>+Risk Management</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+During the development of online fsck, several risk factors were identified</div><div class='add'>+that may make the feature unsuitable for certain distributors and users.</div><div class='add'>+Steps can be taken to mitigate or eliminate those risks, though at a cost to</div><div class='add'>+functionality.</div><div class='add'>+</div><div class='add'>+- **Decreased performance**: Adding metadata indices to the filesystem</div><div class='add'>+  increases the time cost of persisting changes to disk, and the reverse space</div><div class='add'>+  mapping and directory parent pointers are no exception.</div><div class='add'>+  System administrators who require the maximum performance can disable the</div><div class='add'>+  reverse mapping features at format time, though this choice dramatically</div><div class='add'>+  reduces the ability of online fsck to find inconsistencies and repair them.</div><div class='add'>+</div><div class='add'>+- **Incorrect repairs**: As with all software, there might be defects in the</div><div class='add'>+  software that result in incorrect repairs being written to the filesystem.</div><div class='add'>+  Systematic fuzz testing (detailed in the next section) is employed by the</div><div class='add'>+  authors to find bugs early, but it might not catch everything.</div><div class='add'>+  The kernel build system provides Kconfig options (``CONFIG_XFS_ONLINE_SCRUB``</div><div class='add'>+  and ``CONFIG_XFS_ONLINE_REPAIR``) to enable distributors to choose not to</div><div class='add'>+  accept this risk.</div><div class='add'>+  The xfsprogs build system has a configure option (``--enable-scrub=no``) that</div><div class='add'>+  disables building of the ``xfs_scrub`` binary, though this is not a risk</div><div class='add'>+  mitigation if the kernel functionality remains enabled.</div><div class='add'>+</div><div class='add'>+- **Inability to repair**: Sometimes, a filesystem is too badly damaged to be</div><div class='add'>+  repairable.</div><div class='add'>+  If the keyspaces of several metadata indices overlap in some manner but a</div><div class='add'>+  coherent narrative cannot be formed from records collected, then the repair</div><div class='add'>+  fails.</div><div class='add'>+  To reduce the chance that a repair will fail with a dirty transaction and</div><div class='add'>+  render the filesystem unusable, the online repair functions have been</div><div class='add'>+  designed to stage and validate all new records before committing the new</div><div class='add'>+  structure.</div><div class='add'>+</div><div class='add'>+- **Misbehavior**: Online fsck requires many privileges -- raw IO to block</div><div class='add'>+  devices, opening files by handle, ignoring Unix discretionary access control,</div><div class='add'>+  and the ability to perform administrative changes.</div><div class='add'>+  Running this automatically in the background scares people, so the systemd</div><div class='add'>+  background service is configured to run with only the privileges required.</div><div class='add'>+  Obviously, this cannot address certain problems like the kernel crashing or</div><div class='add'>+  deadlocking, but it should be sufficient to prevent the scrub process from</div><div class='add'>+  escaping and reconfiguring the system.</div><div class='add'>+  The cron job does not have this protection.</div><div class='add'>+</div><div class='add'>+- **Fuzz Kiddiez**: There are many people now who seem to think that running</div><div class='add'>+  automated fuzz testing of ondisk artifacts to find mischevious behavior and</div><div class='add'>+  spraying exploit code onto the public mailing list for instant zero-day</div><div class='add'>+  disclosure is somehow of some social benefit.</div><div class='add'>+  In the view of this author, the benefit is realized only when the fuzz</div><div class='add'>+  operators help to **fix** the flaws, but this opinion apparently is not</div><div class='add'>+  widely shared among security "researchers".</div><div class='add'>+  The XFS maintainers' continuing ability to manage these events presents an</div><div class='add'>+  ongoing risk to the stability of the development process.</div><div class='add'>+  Automated testing should front-load some of the risk while the feature is</div><div class='add'>+  considered EXPERIMENTAL.</div><div class='add'>+</div><div class='add'>+Many of these risks are inherent to software programming.</div><div class='add'>+Despite this, it is hoped that this new functionality will prove useful in</div><div class='add'>+reducing unexpected downtime.</div><div class='add'>+</div><div class='add'>+3. Testing Plan</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+As stated before, fsck tools have three main goals:</div><div class='add'>+</div><div class='add'>+1. Detect inconsistencies in the metadata;</div><div class='add'>+</div><div class='add'>+2. Eliminate those inconsistencies; and</div><div class='add'>+</div><div class='add'>+3. Minimize further loss of data.</div><div class='add'>+</div><div class='add'>+Demonstrations of correct operation are necessary to build users' confidence</div><div class='add'>+that the software behaves within expectations.</div><div class='add'>+Unfortunately, it was not really feasible to perform regular exhaustive testing</div><div class='add'>+of every aspect of a fsck tool until the introduction of low-cost virtual</div><div class='add'>+machines with high-IOPS storage.</div><div class='add'>+With ample hardware availability in mind, the testing strategy for the online</div><div class='add'>+fsck project involves differential analysis against the existing fsck tools and</div><div class='add'>+systematic testing of every attribute of every type of metadata object.</div><div class='add'>+Testing can be split into four major categories, as discussed below.</div><div class='add'>+</div><div class='add'>+Integrated Testing with fstests</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+The primary goal of any free software QA effort is to make testing as</div><div class='add'>+inexpensive and widespread as possible to maximize the scaling advantages of</div><div class='add'>+community.</div><div class='add'>+In other words, testing should maximize the breadth of filesystem configuration</div><div class='add'>+scenarios and hardware setups.</div><div class='add'>+This improves code quality by enabling the authors of online fsck to find and</div><div class='add'>+fix bugs early, and helps developers of new features to find integration</div><div class='add'>+issues earlier in their development effort.</div><div class='add'>+</div><div class='add'>+The Linux filesystem community shares a common QA testing suite,</div><div class='add'>+`fstests &lt;https://git.kernel.org/pub/scm/fs/xfs/xfstests-dev.git/&gt;`_, for</div><div class='add'>+functional and regression testing.</div><div class='add'>+Even before development work began on online fsck, fstests (when run on XFS)</div><div class='add'>+would run both the ``xfs_check`` and ``xfs_repair -n`` commands on the test and</div><div class='add'>+scratch filesystems between each test.</div><div class='add'>+This provides a level of assurance that the kernel and the fsck tools stay in</div><div class='add'>+alignment about what constitutes consistent metadata.</div><div class='add'>+During development of the online checking code, fstests was modified to run</div><div class='add'>+``xfs_scrub -n`` between each test to ensure that the new checking code</div><div class='add'>+produces the same results as the two existing fsck tools.</div><div class='add'>+</div><div class='add'>+To start development of online repair, fstests was modified to run</div><div class='add'>+``xfs_repair`` to rebuild the filesystem's metadata indices between tests.</div><div class='add'>+This ensures that offline repair does not crash, leave a corrupt filesystem</div><div class='add'>+after it exists, or trigger complaints from the online check.</div><div class='add'>+This also established a baseline for what can and cannot be repaired offline.</div><div class='add'>+To complete the first phase of development of online repair, fstests was</div><div class='add'>+modified to be able to run ``xfs_scrub`` in a "force rebuild" mode.</div><div class='add'>+This enables a comparison of the effectiveness of online repair as compared to</div><div class='add'>+the existing offline repair tools.</div><div class='add'>+</div><div class='add'>+General Fuzz Testing of Metadata Blocks</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+XFS benefits greatly from having a very robust debugging tool, ``xfs_db``.</div><div class='add'>+</div><div class='add'>+Before development of online fsck even began, a set of fstests were created</div><div class='add'>+to test the rather common fault that entire metadata blocks get corrupted.</div><div class='add'>+This required the creation of fstests library code that can create a filesystem</div><div class='add'>+containing every possible type of metadata object.</div><div class='add'>+Next, individual test cases were created to create a test filesystem, identify</div><div class='add'>+a single block of a specific type of metadata object, trash it with the</div><div class='add'>+existing ``blocktrash`` command in ``xfs_db``, and test the reaction of a</div><div class='add'>+particular metadata validation strategy.</div><div class='add'>+</div><div class='add'>+This earlier test suite enabled XFS developers to test the ability of the</div><div class='add'>+in-kernel validation functions and the ability of the offline fsck tool to</div><div class='add'>+detect and eliminate the inconsistent metadata.</div><div class='add'>+This part of the test suite was extended to cover online fsck in exactly the</div><div class='add'>+same manner.</div><div class='add'>+</div><div class='add'>+In other words, for a given fstests filesystem configuration:</div><div class='add'>+</div><div class='add'>+* For each metadata object existing on the filesystem:</div><div class='add'>+</div><div class='add'>+  * Write garbage to it</div><div class='add'>+</div><div class='add'>+  * Test the reactions of:</div><div class='add'>+</div><div class='add'>+    1. The kernel verifiers to stop obviously bad metadata</div><div class='add'>+    2. Offline repair (``xfs_repair``) to detect and fix</div><div class='add'>+    3. Online repair (``xfs_scrub``) to detect and fix</div><div class='add'>+</div><div class='add'>+Targeted Fuzz Testing of Metadata Records</div><div class='add'>+-----------------------------------------</div><div class='add'>+</div><div class='add'>+The testing plan for online fsck includes extending the existing fs testing</div><div class='add'>+infrastructure to provide a much more powerful facility: targeted fuzz testing</div><div class='add'>+of every metadata field of every metadata object in the filesystem.</div><div class='add'>+``xfs_db`` can modify every field of every metadata structure in every</div><div class='add'>+block in the filesystem to simulate the effects of memory corruption and</div><div class='add'>+software bugs.</div><div class='add'>+Given that fstests already contains the ability to create a filesystem</div><div class='add'>+containing every metadata format known to the filesystem, ``xfs_db`` can be</div><div class='add'>+used to perform exhaustive fuzz testing!</div><div class='add'>+</div><div class='add'>+For a given fstests filesystem configuration:</div><div class='add'>+</div><div class='add'>+* For each metadata object existing on the filesystem...</div><div class='add'>+</div><div class='add'>+  * For each record inside that metadata object...</div><div class='add'>+</div><div class='add'>+    * For each field inside that record...</div><div class='add'>+</div><div class='add'>+      * For each conceivable type of transformation that can be applied to a bit field...</div><div class='add'>+</div><div class='add'>+        1. Clear all bits</div><div class='add'>+        2. Set all bits</div><div class='add'>+        3. Toggle the most significant bit</div><div class='add'>+        4. Toggle the middle bit</div><div class='add'>+        5. Toggle the least significant bit</div><div class='add'>+        6. Add a small quantity</div><div class='add'>+        7. Subtract a small quantity</div><div class='add'>+        8. Randomize the contents</div><div class='add'>+</div><div class='add'>+        * ...test the reactions of:</div><div class='add'>+</div><div class='add'>+          1. The kernel verifiers to stop obviously bad metadata</div><div class='add'>+          2. Offline checking (``xfs_repair -n``)</div><div class='add'>+          3. Offline repair (``xfs_repair``)</div><div class='add'>+          4. Online checking (``xfs_scrub -n``)</div><div class='add'>+          5. Online repair (``xfs_scrub``)</div><div class='add'>+          6. Both repair tools (``xfs_scrub`` and then ``xfs_repair`` if online repair doesn't succeed)</div><div class='add'>+</div><div class='add'>+This is quite the combinatoric explosion!</div><div class='add'>+</div><div class='add'>+Fortunately, having this much test coverage makes it easy for XFS developers to</div><div class='add'>+check the responses of XFS' fsck tools.</div><div class='add'>+Since the introduction of the fuzz testing framework, these tests have been</div><div class='add'>+used to discover incorrect repair code and missing functionality for entire</div><div class='add'>+classes of metadata objects in ``xfs_repair``.</div><div class='add'>+The enhanced testing was used to finalize the deprecation of ``xfs_check`` by</div><div class='add'>+confirming that ``xfs_repair`` could detect at least as many corruptions as</div><div class='add'>+the older tool.</div><div class='add'>+</div><div class='add'>+These tests have been very valuable for ``xfs_scrub`` in the same ways -- they</div><div class='add'>+allow the online fsck developers to compare online fsck against offline fsck,</div><div class='add'>+and they enable XFS developers to find deficiencies in the code base.</div><div class='add'>+</div><div class='add'>+Proposed patchsets include</div><div class='add'>+`general fuzzer improvements</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfstests-dev.git/log/?h=fuzzer-improvements&gt;`_,</div><div class='add'>+`fuzzing baselines</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfstests-dev.git/log/?h=fuzz-baseline&gt;`_,</div><div class='add'>+and `improvements in fuzz testing comprehensiveness</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfstests-dev.git/log/?h=more-fuzz-testing&gt;`_.</div><div class='add'>+</div><div class='add'>+Stress Testing</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+A unique requirement to online fsck is the ability to operate on a filesystem</div><div class='add'>+concurrently with regular workloads.</div><div class='add'>+Although it is of course impossible to run ``xfs_scrub`` with *zero* observable</div><div class='add'>+impact on the running system, the online repair code should never introduce</div><div class='add'>+inconsistencies into the filesystem metadata, and regular workloads should</div><div class='add'>+never notice resource starvation.</div><div class='add'>+To verify that these conditions are being met, fstests has been enhanced in</div><div class='add'>+the following ways:</div><div class='add'>+</div><div class='add'>+* For each scrub item type, create a test to exercise checking that item type</div><div class='add'>+  while running ``fsstress``.</div><div class='add'>+* For each scrub item type, create a test to exercise repairing that item type</div><div class='add'>+  while running ``fsstress``.</div><div class='add'>+* Race ``fsstress`` and ``xfs_scrub -n`` to ensure that checking the whole</div><div class='add'>+  filesystem doesn't cause problems.</div><div class='add'>+* Race ``fsstress`` and ``xfs_scrub`` in force-rebuild mode to ensure that</div><div class='add'>+  force-repairing the whole filesystem doesn't cause problems.</div><div class='add'>+* Race ``xfs_scrub`` in check and force-repair mode against ``fsstress`` while</div><div class='add'>+  freezing and thawing the filesystem.</div><div class='add'>+* Race ``xfs_scrub`` in check and force-repair mode against ``fsstress`` while</div><div class='add'>+  remounting the filesystem read-only and read-write.</div><div class='add'>+* The same, but running ``fsx`` instead of ``fsstress``.  (Not done yet?)</div><div class='add'>+</div><div class='add'>+Success is defined by the ability to run all of these tests without observing</div><div class='add'>+any unexpected filesystem shutdowns due to corrupted metadata, kernel hang</div><div class='add'>+check warnings, or any other sort of mischief.</div><div class='add'>+</div><div class='add'>+Proposed patchsets include `general stress testing</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfstests-dev.git/log/?h=race-scrub-and-mount-state-changes&gt;`_</div><div class='add'>+and the `evolution of existing per-function stress testing</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfstests-dev.git/log/?h=refactor-scrub-stress&gt;`_.</div><div class='add'>+</div><div class='add'>+4. User Interface</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+The primary user of online fsck is the system administrator, just like offline</div><div class='add'>+repair.</div><div class='add'>+Online fsck presents two modes of operation to administrators:</div><div class='add'>+A foreground CLI process for online fsck on demand, and a background service</div><div class='add'>+that performs autonomous checking and repair.</div><div class='add'>+</div><div class='add'>+Checking on Demand</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+For administrators who want the absolute freshest information about the</div><div class='add'>+metadata in a filesystem, ``xfs_scrub`` can be run as a foreground process on</div><div class='add'>+a command line.</div><div class='add'>+The program checks every piece of metadata in the filesystem while the</div><div class='add'>+administrator waits for the results to be reported, just like the existing</div><div class='add'>+``xfs_repair`` tool.</div><div class='add'>+Both tools share a ``-n`` option to perform a read-only scan, and a ``-v``</div><div class='add'>+option to increase the verbosity of the information reported.</div><div class='add'>+</div><div class='add'>+A new feature of ``xfs_scrub`` is the ``-x`` option, which employs the error</div><div class='add'>+correction capabilities of the hardware to check data file contents.</div><div class='add'>+The media scan is not enabled by default because it may dramatically increase</div><div class='add'>+program runtime and consume a lot of bandwidth on older storage hardware.</div><div class='add'>+</div><div class='add'>+The output of a foreground invocation is captured in the system log.</div><div class='add'>+</div><div class='add'>+The ``xfs_scrub_all`` program walks the list of mounted filesystems and</div><div class='add'>+initiates ``xfs_scrub`` for each of them in parallel.</div><div class='add'>+It serializes scans for any filesystems that resolve to the same top level</div><div class='add'>+kernel block device to prevent resource overconsumption.</div><div class='add'>+</div><div class='add'>+Background Service</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+To reduce the workload of system administrators, the ``xfs_scrub`` package</div><div class='add'>+provides a suite of `systemd &lt;https://systemd.io/&gt;`_ timers and services that</div><div class='add'>+run online fsck automatically on weekends by default.</div><div class='add'>+The background service configures scrub to run with as little privilege as</div><div class='add'>+possible, the lowest CPU and IO priority, and in a CPU-constrained single</div><div class='add'>+threaded mode.</div><div class='add'>+This can be tuned by the systemd administrator at any time to suit the latency</div><div class='add'>+and throughput requirements of customer workloads.</div><div class='add'>+</div><div class='add'>+The output of the background service is also captured in the system log.</div><div class='add'>+If desired, reports of failures (either due to inconsistencies or mere runtime</div><div class='add'>+errors) can be emailed automatically by setting the ``EMAIL_ADDR`` environment</div><div class='add'>+variable in the following service files:</div><div class='add'>+</div><div class='add'>+* ``xfs_scrub_fail@.service``</div><div class='add'>+* ``xfs_scrub_media_fail@.service``</div><div class='add'>+* ``xfs_scrub_all_fail.service``</div><div class='add'>+</div><div class='add'>+The decision to enable the background scan is left to the system administrator.</div><div class='add'>+This can be done by enabling either of the following services:</div><div class='add'>+</div><div class='add'>+* ``xfs_scrub_all.timer`` on systemd systems</div><div class='add'>+* ``xfs_scrub_all.cron`` on non-systemd systems</div><div class='add'>+</div><div class='add'>+This automatic weekly scan is configured out of the box to perform an</div><div class='add'>+additional media scan of all file data once per month.</div><div class='add'>+This is less foolproof than, say, storing file data block checksums, but much</div><div class='add'>+more performant if application software provides its own integrity checking,</div><div class='add'>+redundancy can be provided elsewhere above the filesystem, or the storage</div><div class='add'>+device's integrity guarantees are deemed sufficient.</div><div class='add'>+</div><div class='add'>+The systemd unit file definitions have been subjected to a security audit</div><div class='add'>+(as of systemd 249) to ensure that the xfs_scrub processes have as little</div><div class='add'>+access to the rest of the system as possible.</div><div class='add'>+This was performed via ``systemd-analyze security``, after which privileges</div><div class='add'>+were restricted to the minimum required, sandboxing was set up to the maximal</div><div class='add'>+extent possible with sandboxing and system call filtering; and access to the</div><div class='add'>+filesystem tree was restricted to the minimum needed to start the program and</div><div class='add'>+access the filesystem being scanned.</div><div class='add'>+The service definition files restrict CPU usage to 80% of one CPU core, and</div><div class='add'>+apply as nice of a priority to IO and CPU scheduling as possible.</div><div class='add'>+This measure was taken to minimize delays in the rest of the filesystem.</div><div class='add'>+No such hardening has been performed for the cron job.</div><div class='add'>+</div><div class='add'>+Proposed patchset:</div><div class='add'>+`Enabling the xfs_scrub background service</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-media-scan-service&gt;`_.</div><div class='add'>+</div><div class='add'>+Health Reporting</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+XFS caches a summary of each filesystem's health status in memory.</div><div class='add'>+The information is updated whenever ``xfs_scrub`` is run, or whenever</div><div class='add'>+inconsistencies are detected in the filesystem metadata during regular</div><div class='add'>+operations.</div><div class='add'>+System administrators should use the ``health`` command of ``xfs_spaceman`` to</div><div class='add'>+download this information into a human-readable format.</div><div class='add'>+If problems have been observed, the administrator can schedule a reduced</div><div class='add'>+service window to run the online repair tool to correct the problem.</div><div class='add'>+Failing that, the administrator can decide to schedule a maintenance window to</div><div class='add'>+run the traditional offline repair tool to correct the problem.</div><div class='add'>+</div><div class='add'>+**Future Work Question**: Should the health reporting integrate with the new</div><div class='add'>+inotify fs error notification system?</div><div class='add'>+Would it be helpful for sysadmins to have a daemon to listen for corruption</div><div class='add'>+notifications and initiate a repair?</div><div class='add'>+</div><div class='add'>+*Answer*: These questions remain unanswered, but should be a part of the</div><div class='add'>+conversation with early adopters and potential downstream users of XFS.</div><div class='add'>+</div><div class='add'>+Proposed patchsets include</div><div class='add'>+`wiring up health reports to correction returns</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=corruption-health-reports&gt;`_</div><div class='add'>+and</div><div class='add'>+`preservation of sickness info during memory reclaim</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=indirect-health-reporting&gt;`_.</div><div class='add'>+</div><div class='add'>+5. Kernel Algorithms and Data Structures</div><div class='add'>+========================================</div><div class='add'>+</div><div class='add'>+This section discusses the key algorithms and data structures of the kernel</div><div class='add'>+code that provide the ability to check and repair metadata while the system</div><div class='add'>+is running.</div><div class='add'>+The first chapters in this section reveal the pieces that provide the</div><div class='add'>+foundation for checking metadata.</div><div class='add'>+The remainder of this section presents the mechanisms through which XFS</div><div class='add'>+regenerates itself.</div><div class='add'>+</div><div class='add'>+Self Describing Metadata</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Starting with XFS version 5 in 2012, XFS updated the format of nearly every</div><div class='add'>+ondisk block header to record a magic number, a checksum, a universally</div><div class='add'>+"unique" identifier (UUID), an owner code, the ondisk address of the block,</div><div class='add'>+and a log sequence number.</div><div class='add'>+When loading a block buffer from disk, the magic number, UUID, owner, and</div><div class='add'>+ondisk address confirm that the retrieved block matches the specific owner of</div><div class='add'>+the current filesystem, and that the information contained in the block is</div><div class='add'>+supposed to be found at the ondisk address.</div><div class='add'>+The first three components enable checking tools to disregard alleged metadata</div><div class='add'>+that doesn't belong to the filesystem, and the fourth component enables the</div><div class='add'>+filesystem to detect lost writes.</div><div class='add'>+</div><div class='add'>+Whenever a file system operation modifies a block, the change is submitted</div><div class='add'>+to the log as part of a transaction.</div><div class='add'>+The log then processes these transactions marking them done once they are</div><div class='add'>+safely persisted to storage.</div><div class='add'>+The logging code maintains the checksum and the log sequence number of the last</div><div class='add'>+transactional update.</div><div class='add'>+Checksums are useful for detecting torn writes and other discrepancies that can</div><div class='add'>+be introduced between the computer and its storage devices.</div><div class='add'>+Sequence number tracking enables log recovery to avoid applying out of date</div><div class='add'>+log updates to the filesystem.</div><div class='add'>+</div><div class='add'>+These two features improve overall runtime resiliency by providing a means for</div><div class='add'>+the filesystem to detect obvious corruption when reading metadata blocks from</div><div class='add'>+disk, but these buffer verifiers cannot provide any consistency checking</div><div class='add'>+between metadata structures.</div><div class='add'>+</div><div class='add'>+For more information, please see the documentation for</div><div class='add'>+Documentation/filesystems/xfs-self-describing-metadata.rst</div><div class='add'>+</div><div class='add'>+Reverse Mapping</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+The original design of XFS (circa 1993) is an improvement upon 1980s Unix</div><div class='add'>+filesystem design.</div><div class='add'>+In those days, storage density was expensive, CPU time was scarce, and</div><div class='add'>+excessive seek time could kill performance.</div><div class='add'>+For performance reasons, filesystem authors were reluctant to add redundancy to</div><div class='add'>+the filesystem, even at the cost of data integrity.</div><div class='add'>+Filesystems designers in the early 21st century choose different strategies to</div><div class='add'>+increase internal redundancy -- either storing nearly identical copies of</div><div class='add'>+metadata, or more space-efficient encoding techniques.</div><div class='add'>+</div><div class='add'>+For XFS, a different redundancy strategy was chosen to modernize the design:</div><div class='add'>+a secondary space usage index that maps allocated disk extents back to their</div><div class='add'>+owners.</div><div class='add'>+By adding a new index, the filesystem retains most of its ability to scale</div><div class='add'>+well to heavily threaded workloads involving large datasets, since the primary</div><div class='add'>+file metadata (the directory tree, the file block map, and the allocation</div><div class='add'>+groups) remain unchanged.</div><div class='add'>+Like any system that improves redundancy, the reverse-mapping feature increases</div><div class='add'>+overhead costs for space mapping activities.</div><div class='add'>+However, it has two critical advantages: first, the reverse index is key to</div><div class='add'>+enabling online fsck and other requested functionality such as free space</div><div class='add'>+defragmentation, better media failure reporting, and filesystem shrinking.</div><div class='add'>+Second, the different ondisk storage format of the reverse mapping btree</div><div class='add'>+defeats device-level deduplication because the filesystem requires real</div><div class='add'>+redundancy.</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Sidebar**:                                                             |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| A criticism of adding the secondary index is that it does nothing to     |</div><div class='add'>+| improve the robustness of user data storage itself.                      |</div><div class='add'>+| This is a valid point, but adding a new index for file data block        |</div><div class='add'>+| checksums increases write amplification by turning data overwrites into  |</div><div class='add'>+| copy-writes, which age the filesystem prematurely.                       |</div><div class='add'>+| In keeping with thirty years of precedent, users who want file data      |</div><div class='add'>+| integrity can supply as powerful a solution as they require.             |</div><div class='add'>+| As for metadata, the complexity of adding a new secondary index of space |</div><div class='add'>+| usage is much less than adding volume management and storage device      |</div><div class='add'>+| mirroring to XFS itself.                                                 |</div><div class='add'>+| Perfection of RAID and volume management are best left to existing       |</div><div class='add'>+| layers in the kernel.                                                    |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+The information captured in a reverse space mapping record is as follows:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct xfs_rmap_irec {</div><div class='add'>+	    xfs_agblock_t    rm_startblock;   /* extent start block */</div><div class='add'>+	    xfs_extlen_t     rm_blockcount;   /* extent length */</div><div class='add'>+	    uint64_t         rm_owner;        /* extent owner */</div><div class='add'>+	    uint64_t         rm_offset;       /* offset within the owner */</div><div class='add'>+	    unsigned int     rm_flags;        /* state flags */</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+The first two fields capture the location and size of the physical space,</div><div class='add'>+in units of filesystem blocks.</div><div class='add'>+The owner field tells scrub which metadata structure or file inode have been</div><div class='add'>+assigned this space.</div><div class='add'>+For space allocated to files, the offset field tells scrub where the space was</div><div class='add'>+mapped within the file fork.</div><div class='add'>+Finally, the flags field provides extra information about the space usage --</div><div class='add'>+is this an attribute fork extent?  A file mapping btree extent?  Or an</div><div class='add'>+unwritten data extent?</div><div class='add'>+</div><div class='add'>+Online filesystem checking judges the consistency of each primary metadata</div><div class='add'>+record by comparing its information against all other space indices.</div><div class='add'>+The reverse mapping index plays a key role in the consistency checking process</div><div class='add'>+because it contains a centralized alternate copy of all space allocation</div><div class='add'>+information.</div><div class='add'>+Program runtime and ease of resource acquisition are the only real limits to</div><div class='add'>+what online checking can consult.</div><div class='add'>+For example, a file data extent mapping can be checked against:</div><div class='add'>+</div><div class='add'>+* The absence of an entry in the free space information.</div><div class='add'>+* The absence of an entry in the inode index.</div><div class='add'>+* The absence of an entry in the reference count data if the file is not</div><div class='add'>+  marked as having shared extents.</div><div class='add'>+* The correspondence of an entry in the reverse mapping information.</div><div class='add'>+</div><div class='add'>+There are several observations to make about reverse mapping indices:</div><div class='add'>+</div><div class='add'>+1. Reverse mappings can provide a positive affirmation of correctness if any of</div><div class='add'>+   the above primary metadata are in doubt.</div><div class='add'>+   The checking code for most primary metadata follows a path similar to the</div><div class='add'>+   one outlined above.</div><div class='add'>+</div><div class='add'>+2. Proving the consistency of secondary metadata with the primary metadata is</div><div class='add'>+   difficult because that requires a full scan of all primary space metadata,</div><div class='add'>+   which is very time intensive.</div><div class='add'>+   For example, checking a reverse mapping record for a file extent mapping</div><div class='add'>+   btree block requires locking the file and searching the entire btree to</div><div class='add'>+   confirm the block.</div><div class='add'>+   Instead, scrub relies on rigorous cross-referencing during the primary space</div><div class='add'>+   mapping structure checks.</div><div class='add'>+</div><div class='add'>+3. Consistency scans must use non-blocking lock acquisition primitives if the</div><div class='add'>+   required locking order is not the same order used by regular filesystem</div><div class='add'>+   operations.</div><div class='add'>+   For example, if the filesystem normally takes a file ILOCK before taking</div><div class='add'>+   the AGF buffer lock but scrub wants to take a file ILOCK while holding</div><div class='add'>+   an AGF buffer lock, scrub cannot block on that second acquisition.</div><div class='add'>+   This means that forward progress during this part of a scan of the reverse</div><div class='add'>+   mapping data cannot be guaranteed if system load is heavy.</div><div class='add'>+</div><div class='add'>+In summary, reverse mappings play a key role in reconstruction of primary</div><div class='add'>+metadata.</div><div class='add'>+The details of how these records are staged, written to disk, and committed</div><div class='add'>+into the filesystem are covered in subsequent sections.</div><div class='add'>+</div><div class='add'>+Checking and Cross-Referencing</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+The first step of checking a metadata structure is to examine every record</div><div class='add'>+contained within the structure and its relationship with the rest of the</div><div class='add'>+system.</div><div class='add'>+XFS contains multiple layers of checking to try to prevent inconsistent</div><div class='add'>+metadata from wreaking havoc on the system.</div><div class='add'>+Each of these layers contributes information that helps the kernel to make</div><div class='add'>+three decisions about the health of a metadata structure:</div><div class='add'>+</div><div class='add'>+- Is a part of this structure obviously corrupt (``XFS_SCRUB_OFLAG_CORRUPT``) ?</div><div class='add'>+- Is this structure inconsistent with the rest of the system</div><div class='add'>+  (``XFS_SCRUB_OFLAG_XCORRUPT``) ?</div><div class='add'>+- Is there so much damage around the filesystem that cross-referencing is not</div><div class='add'>+  possible (``XFS_SCRUB_OFLAG_XFAIL``) ?</div><div class='add'>+- Can the structure be optimized to improve performance or reduce the size of</div><div class='add'>+  metadata (``XFS_SCRUB_OFLAG_PREEN``) ?</div><div class='add'>+- Does the structure contain data that is not inconsistent but deserves review</div><div class='add'>+  by the system administrator (``XFS_SCRUB_OFLAG_WARNING``) ?</div><div class='add'>+</div><div class='add'>+The following sections describe how the metadata scrubbing process works.</div><div class='add'>+</div><div class='add'>+Metadata Buffer Verification</div><div class='add'>+````````````````````````````</div><div class='add'>+</div><div class='add'>+The lowest layer of metadata protection in XFS are the metadata verifiers built</div><div class='add'>+into the buffer cache.</div><div class='add'>+These functions perform inexpensive internal consistency checking of the block</div><div class='add'>+itself, and answer these questions:</div><div class='add'>+</div><div class='add'>+- Does the block belong to this filesystem?</div><div class='add'>+</div><div class='add'>+- Does the block belong to the structure that asked for the read?</div><div class='add'>+  This assumes that metadata blocks only have one owner, which is always true</div><div class='add'>+  in XFS.</div><div class='add'>+</div><div class='add'>+- Is the type of data stored in the block within a reasonable range of what</div><div class='add'>+  scrub is expecting?</div><div class='add'>+</div><div class='add'>+- Does the physical location of the block match the location it was read from?</div><div class='add'>+</div><div class='add'>+- Does the block checksum match the data?</div><div class='add'>+</div><div class='add'>+The scope of the protections here are very limited -- verifiers can only</div><div class='add'>+establish that the filesystem code is reasonably free of gross corruption bugs</div><div class='add'>+and that the storage system is reasonably competent at retrieval.</div><div class='add'>+Corruption problems observed at runtime cause the generation of health reports,</div><div class='add'>+failed system calls, and in the extreme case, filesystem shutdowns if the</div><div class='add'>+corrupt metadata force the cancellation of a dirty transaction.</div><div class='add'>+</div><div class='add'>+Every online fsck scrubbing function is expected to read every ondisk metadata</div><div class='add'>+block of a structure in the course of checking the structure.</div><div class='add'>+Corruption problems observed during a check are immediately reported to</div><div class='add'>+userspace as corruption; during a cross-reference, they are reported as a</div><div class='add'>+failure to cross-reference once the full examination is complete.</div><div class='add'>+Reads satisfied by a buffer already in cache (and hence already verified)</div><div class='add'>+bypass these checks.</div><div class='add'>+</div><div class='add'>+Internal Consistency Checks</div><div class='add'>+```````````````````````````</div><div class='add'>+</div><div class='add'>+After the buffer cache, the next level of metadata protection is the internal</div><div class='add'>+record verification code built into the filesystem.</div><div class='add'>+These checks are split between the buffer verifiers, the in-filesystem users of</div><div class='add'>+the buffer cache, and the scrub code itself, depending on the amount of higher</div><div class='add'>+level context required.</div><div class='add'>+The scope of checking is still internal to the block.</div><div class='add'>+These higher level checking functions answer these questions:</div><div class='add'>+</div><div class='add'>+- Does the type of data stored in the block match what scrub is expecting?</div><div class='add'>+</div><div class='add'>+- Does the block belong to the owning structure that asked for the read?</div><div class='add'>+</div><div class='add'>+- If the block contains records, do the records fit within the block?</div><div class='add'>+</div><div class='add'>+- If the block tracks internal free space information, is it consistent with</div><div class='add'>+  the record areas?</div><div class='add'>+</div><div class='add'>+- Are the records contained inside the block free of obvious corruptions?</div><div class='add'>+</div><div class='add'>+Record checks in this category are more rigorous and more time-intensive.</div><div class='add'>+For example, block pointers and inumbers are checked to ensure that they point</div><div class='add'>+within the dynamically allocated parts of an allocation group and within</div><div class='add'>+the filesystem.</div><div class='add'>+Names are checked for invalid characters, and flags are checked for invalid</div><div class='add'>+combinations.</div><div class='add'>+Other record attributes are checked for sensible values.</div><div class='add'>+Btree records spanning an interval of the btree keyspace are checked for</div><div class='add'>+correct order and lack of mergeability (except for file fork mappings).</div><div class='add'>+For performance reasons, regular code may skip some of these checks unless</div><div class='add'>+debugging is enabled or a write is about to occur.</div><div class='add'>+Scrub functions, of course, must check all possible problems.</div><div class='add'>+</div><div class='add'>+Validation of Userspace-Controlled Record Attributes</div><div class='add'>+````````````````````````````````````````````````````</div><div class='add'>+</div><div class='add'>+Various pieces of filesystem metadata are directly controlled by userspace.</div><div class='add'>+Because of this nature, validation work cannot be more precise than checking</div><div class='add'>+that a value is within the possible range.</div><div class='add'>+These fields include:</div><div class='add'>+</div><div class='add'>+- Superblock fields controlled by mount options</div><div class='add'>+- Filesystem labels</div><div class='add'>+- File timestamps</div><div class='add'>+- File permissions</div><div class='add'>+- File size</div><div class='add'>+- File flags</div><div class='add'>+- Names present in directory entries, extended attribute keys, and filesystem</div><div class='add'>+  labels</div><div class='add'>+- Extended attribute key namespaces</div><div class='add'>+- Extended attribute values</div><div class='add'>+- File data block contents</div><div class='add'>+- Quota limits</div><div class='add'>+- Quota timer expiration (if resource usage exceeds the soft limit)</div><div class='add'>+</div><div class='add'>+Cross-Referencing Space Metadata</div><div class='add'>+````````````````````````````````</div><div class='add'>+</div><div class='add'>+After internal block checks, the next higher level of checking is</div><div class='add'>+cross-referencing records between metadata structures.</div><div class='add'>+For regular runtime code, the cost of these checks is considered to be</div><div class='add'>+prohibitively expensive, but as scrub is dedicated to rooting out</div><div class='add'>+inconsistencies, it must pursue all avenues of inquiry.</div><div class='add'>+The exact set of cross-referencing is highly dependent on the context of the</div><div class='add'>+data structure being checked.</div><div class='add'>+</div><div class='add'>+The XFS btree code has keyspace scanning functions that online fsck uses to</div><div class='add'>+cross reference one structure with another.</div><div class='add'>+Specifically, scrub can scan the key space of an index to determine if that</div><div class='add'>+keyspace is fully, sparsely, or not at all mapped to records.</div><div class='add'>+For the reverse mapping btree, it is possible to mask parts of the key for the</div><div class='add'>+purposes of performing a keyspace scan so that scrub can decide if the rmap</div><div class='add'>+btree contains records mapping a certain extent of physical space without the</div><div class='add'>+sparsenses of the rest of the rmap keyspace getting in the way.</div><div class='add'>+</div><div class='add'>+Btree blocks undergo the following checks before cross-referencing:</div><div class='add'>+</div><div class='add'>+- Does the type of data stored in the block match what scrub is expecting?</div><div class='add'>+</div><div class='add'>+- Does the block belong to the owning structure that asked for the read?</div><div class='add'>+</div><div class='add'>+- Do the records fit within the block?</div><div class='add'>+</div><div class='add'>+- Are the records contained inside the block free of obvious corruptions?</div><div class='add'>+</div><div class='add'>+- Are the name hashes in the correct order?</div><div class='add'>+</div><div class='add'>+- Do node pointers within the btree point to valid block addresses for the type</div><div class='add'>+  of btree?</div><div class='add'>+</div><div class='add'>+- Do child pointers point towards the leaves?</div><div class='add'>+</div><div class='add'>+- Do sibling pointers point across the same level?</div><div class='add'>+</div><div class='add'>+- For each node block record, does the record key accurate reflect the contents</div><div class='add'>+  of the child block?</div><div class='add'>+</div><div class='add'>+Space allocation records are cross-referenced as follows:</div><div class='add'>+</div><div class='add'>+1. Any space mentioned by any metadata structure are cross-referenced as</div><div class='add'>+   follows:</div><div class='add'>+</div><div class='add'>+   - Does the reverse mapping index list only the appropriate owner as the</div><div class='add'>+     owner of each block?</div><div class='add'>+</div><div class='add'>+   - Are none of the blocks claimed as free space?</div><div class='add'>+</div><div class='add'>+   - If these aren't file data blocks, are none of the blocks claimed as space</div><div class='add'>+     shared by different owners?</div><div class='add'>+</div><div class='add'>+2. Btree blocks are cross-referenced as follows:</div><div class='add'>+</div><div class='add'>+   - Everything in class 1 above.</div><div class='add'>+</div><div class='add'>+   - If there's a parent node block, do the keys listed for this block match the</div><div class='add'>+     keyspace of this block?</div><div class='add'>+</div><div class='add'>+   - Do the sibling pointers point to valid blocks?  Of the same level?</div><div class='add'>+</div><div class='add'>+   - Do the child pointers point to valid blocks?  Of the next level down?</div><div class='add'>+</div><div class='add'>+3. Free space btree records are cross-referenced as follows:</div><div class='add'>+</div><div class='add'>+   - Everything in class 1 and 2 above.</div><div class='add'>+</div><div class='add'>+   - Does the reverse mapping index list no owners of this space?</div><div class='add'>+</div><div class='add'>+   - Is this space not claimed by the inode index for inodes?</div><div class='add'>+</div><div class='add'>+   - Is it not mentioned by the reference count index?</div><div class='add'>+</div><div class='add'>+   - Is there a matching record in the other free space btree?</div><div class='add'>+</div><div class='add'>+4. Inode btree records are cross-referenced as follows:</div><div class='add'>+</div><div class='add'>+   - Everything in class 1 and 2 above.</div><div class='add'>+</div><div class='add'>+   - Is there a matching record in free inode btree?</div><div class='add'>+</div><div class='add'>+   - Do cleared bits in the holemask correspond with inode clusters?</div><div class='add'>+</div><div class='add'>+   - Do set bits in the freemask correspond with inode records with zero link</div><div class='add'>+     count?</div><div class='add'>+</div><div class='add'>+5. Inode records are cross-referenced as follows:</div><div class='add'>+</div><div class='add'>+   - Everything in class 1.</div><div class='add'>+</div><div class='add'>+   - Do all the fields that summarize information about the file forks actually</div><div class='add'>+     match those forks?</div><div class='add'>+</div><div class='add'>+   - Does each inode with zero link count correspond to a record in the free</div><div class='add'>+     inode btree?</div><div class='add'>+</div><div class='add'>+6. File fork space mapping records are cross-referenced as follows:</div><div class='add'>+</div><div class='add'>+   - Everything in class 1 and 2 above.</div><div class='add'>+</div><div class='add'>+   - Is this space not mentioned by the inode btrees?</div><div class='add'>+</div><div class='add'>+   - If this is a CoW fork mapping, does it correspond to a CoW entry in the</div><div class='add'>+     reference count btree?</div><div class='add'>+</div><div class='add'>+7. Reference count records are cross-referenced as follows:</div><div class='add'>+</div><div class='add'>+   - Everything in class 1 and 2 above.</div><div class='add'>+</div><div class='add'>+   - Within the space subkeyspace of the rmap btree (that is to say, all</div><div class='add'>+     records mapped to a particular space extent and ignoring the owner info),</div><div class='add'>+     are there the same number of reverse mapping records for each block as the</div><div class='add'>+     reference count record claims?</div><div class='add'>+</div><div class='add'>+Proposed patchsets are the series to find gaps in</div><div class='add'>+`refcount btree</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-detect-refcount-gaps&gt;`_,</div><div class='add'>+`inode btree</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-detect-inobt-gaps&gt;`_, and</div><div class='add'>+`rmap btree</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-detect-rmapbt-gaps&gt;`_ records;</div><div class='add'>+to find</div><div class='add'>+`mergeable records</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-detect-mergeable-records&gt;`_;</div><div class='add'>+and to</div><div class='add'>+`improve cross referencing with rmap</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-strengthen-rmap-checking&gt;`_</div><div class='add'>+before starting a repair.</div><div class='add'>+</div><div class='add'>+Checking Extended Attributes</div><div class='add'>+````````````````````````````</div><div class='add'>+</div><div class='add'>+Extended attributes implement a key-value store that enable fragments of data</div><div class='add'>+to be attached to any file.</div><div class='add'>+Both the kernel and userspace can access the keys and values, subject to</div><div class='add'>+namespace and privilege restrictions.</div><div class='add'>+Most typically these fragments are metadata about the file -- origins, security</div><div class='add'>+contexts, user-supplied labels, indexing information, etc.</div><div class='add'>+</div><div class='add'>+Names can be as long as 255 bytes and can exist in several different</div><div class='add'>+namespaces.</div><div class='add'>+Values can be as large as 64KB.</div><div class='add'>+A file's extended attributes are stored in blocks mapped by the attr fork.</div><div class='add'>+The mappings point to leaf blocks, remote value blocks, or dabtree blocks.</div><div class='add'>+Block 0 in the attribute fork is always the top of the structure, but otherwise</div><div class='add'>+each of the three types of blocks can be found at any offset in the attr fork.</div><div class='add'>+Leaf blocks contain attribute key records that point to the name and the value.</div><div class='add'>+Names are always stored elsewhere in the same leaf block.</div><div class='add'>+Values that are less than 3/4 the size of a filesystem block are also stored</div><div class='add'>+elsewhere in the same leaf block.</div><div class='add'>+Remote value blocks contain values that are too large to fit inside a leaf.</div><div class='add'>+If the leaf information exceeds a single filesystem block, a dabtree (also</div><div class='add'>+rooted at block 0) is created to map hashes of the attribute names to leaf</div><div class='add'>+blocks in the attr fork.</div><div class='add'>+</div><div class='add'>+Checking an extended attribute structure is not so straightfoward due to the</div><div class='add'>+lack of separation between attr blocks and index blocks.</div><div class='add'>+Scrub must read each block mapped by the attr fork and ignore the non-leaf</div><div class='add'>+blocks:</div><div class='add'>+</div><div class='add'>+1. Walk the dabtree in the attr fork (if present) to ensure that there are no</div><div class='add'>+   irregularities in the blocks or dabtree mappings that do not point to</div><div class='add'>+   attr leaf blocks.</div><div class='add'>+</div><div class='add'>+2. Walk the blocks of the attr fork looking for leaf blocks.</div><div class='add'>+   For each entry inside a leaf:</div><div class='add'>+</div><div class='add'>+   a. Validate that the name does not contain invalid characters.</div><div class='add'>+</div><div class='add'>+   b. Read the attr value.</div><div class='add'>+      This performs a named lookup of the attr name to ensure the correctness</div><div class='add'>+      of the dabtree.</div><div class='add'>+      If the value is stored in a remote block, this also validates the</div><div class='add'>+      integrity of the remote value block.</div><div class='add'>+</div><div class='add'>+Checking and Cross-Referencing Directories</div><div class='add'>+``````````````````````````````````````````</div><div class='add'>+</div><div class='add'>+The filesystem directory tree is a directed acylic graph structure, with files</div><div class='add'>+constituting the nodes, and directory entries (dirents) constituting the edges.</div><div class='add'>+Directories are a special type of file containing a set of mappings from a</div><div class='add'>+255-byte sequence (name) to an inumber.</div><div class='add'>+These are called directory entries, or dirents for short.</div><div class='add'>+Each directory file must have exactly one directory pointing to the file.</div><div class='add'>+A root directory points to itself.</div><div class='add'>+Directory entries point to files of any type.</div><div class='add'>+Each non-directory file may have multiple directories point to it.</div><div class='add'>+</div><div class='add'>+In XFS, directories are implemented as a file containing up to three 32GB</div><div class='add'>+partitions.</div><div class='add'>+The first partition contains directory entry data blocks.</div><div class='add'>+Each data block contains variable-sized records associating a user-provided</div><div class='add'>+name with an inumber and, optionally, a file type.</div><div class='add'>+If the directory entry data grows beyond one block, the second partition (which</div><div class='add'>+exists as post-EOF extents) is populated with a block containing free space</div><div class='add'>+information and an index that maps hashes of the dirent names to directory data</div><div class='add'>+blocks in the first partition.</div><div class='add'>+This makes directory name lookups very fast.</div><div class='add'>+If this second partition grows beyond one block, the third partition is</div><div class='add'>+populated with a linear array of free space information for faster</div><div class='add'>+expansions.</div><div class='add'>+If the free space has been separated and the second partition grows again</div><div class='add'>+beyond one block, then a dabtree is used to map hashes of dirent names to</div><div class='add'>+directory data blocks.</div><div class='add'>+</div><div class='add'>+Checking a directory is pretty straightfoward:</div><div class='add'>+</div><div class='add'>+1. Walk the dabtree in the second partition (if present) to ensure that there</div><div class='add'>+   are no irregularities in the blocks or dabtree mappings that do not point to</div><div class='add'>+   dirent blocks.</div><div class='add'>+</div><div class='add'>+2. Walk the blocks of the first partition looking for directory entries.</div><div class='add'>+   Each dirent is checked as follows:</div><div class='add'>+</div><div class='add'>+   a. Does the name contain no invalid characters?</div><div class='add'>+</div><div class='add'>+   b. Does the inumber correspond to an actual, allocated inode?</div><div class='add'>+</div><div class='add'>+   c. Does the child inode have a nonzero link count?</div><div class='add'>+</div><div class='add'>+   d. If a file type is included in the dirent, does it match the type of the</div><div class='add'>+      inode?</div><div class='add'>+</div><div class='add'>+   e. If the child is a subdirectory, does the child's dotdot pointer point</div><div class='add'>+      back to the parent?</div><div class='add'>+</div><div class='add'>+   f. If the directory has a second partition, perform a named lookup of the</div><div class='add'>+      dirent name to ensure the correctness of the dabtree.</div><div class='add'>+</div><div class='add'>+3. Walk the free space list in the third partition (if present) to ensure that</div><div class='add'>+   the free spaces it describes are really unused.</div><div class='add'>+</div><div class='add'>+Checking operations involving :ref:`parents &lt;dirparent&gt;` and</div><div class='add'>+:ref:`file link counts &lt;nlinks&gt;` are discussed in more detail in later</div><div class='add'>+sections.</div><div class='add'>+</div><div class='add'>+Checking Directory/Attribute Btrees</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+As stated in previous sections, the directory/attribute btree (dabtree) index</div><div class='add'>+maps user-provided names to improve lookup times by avoiding linear scans.</div><div class='add'>+Internally, it maps a 32-bit hash of the name to a block offset within the</div><div class='add'>+appropriate file fork.</div><div class='add'>+</div><div class='add'>+The internal structure of a dabtree closely resembles the btrees that record</div><div class='add'>+fixed-size metadata records -- each dabtree block contains a magic number, a</div><div class='add'>+checksum, sibling pointers, a UUID, a tree level, and a log sequence number.</div><div class='add'>+The format of leaf and node records are the same -- each entry points to the</div><div class='add'>+next level down in the hierarchy, with dabtree node records pointing to dabtree</div><div class='add'>+leaf blocks, and dabtree leaf records pointing to non-dabtree blocks elsewhere</div><div class='add'>+in the fork.</div><div class='add'>+</div><div class='add'>+Checking and cross-referencing the dabtree is very similar to what is done for</div><div class='add'>+space btrees:</div><div class='add'>+</div><div class='add'>+- Does the type of data stored in the block match what scrub is expecting?</div><div class='add'>+</div><div class='add'>+- Does the block belong to the owning structure that asked for the read?</div><div class='add'>+</div><div class='add'>+- Do the records fit within the block?</div><div class='add'>+</div><div class='add'>+- Are the records contained inside the block free of obvious corruptions?</div><div class='add'>+</div><div class='add'>+- Are the name hashes in the correct order?</div><div class='add'>+</div><div class='add'>+- Do node pointers within the dabtree point to valid fork offsets for dabtree</div><div class='add'>+  blocks?</div><div class='add'>+</div><div class='add'>+- Do leaf pointers within the dabtree point to valid fork offsets for directory</div><div class='add'>+  or attr leaf blocks?</div><div class='add'>+</div><div class='add'>+- Do child pointers point towards the leaves?</div><div class='add'>+</div><div class='add'>+- Do sibling pointers point across the same level?</div><div class='add'>+</div><div class='add'>+- For each dabtree node record, does the record key accurate reflect the</div><div class='add'>+  contents of the child dabtree block?</div><div class='add'>+</div><div class='add'>+- For each dabtree leaf record, does the record key accurate reflect the</div><div class='add'>+  contents of the directory or attr block?</div><div class='add'>+</div><div class='add'>+Cross-Referencing Summary Counters</div><div class='add'>+``````````````````````````````````</div><div class='add'>+</div><div class='add'>+XFS maintains three classes of summary counters: available resources, quota</div><div class='add'>+resource usage, and file link counts.</div><div class='add'>+</div><div class='add'>+In theory, the amount of available resources (data blocks, inodes, realtime</div><div class='add'>+extents) can be found by walking the entire filesystem.</div><div class='add'>+This would make for very slow reporting, so a transactional filesystem can</div><div class='add'>+maintain summaries of this information in the superblock.</div><div class='add'>+Cross-referencing these values against the filesystem metadata should be a</div><div class='add'>+simple matter of walking the free space and inode metadata in each AG and the</div><div class='add'>+realtime bitmap, but there are complications that will be discussed in</div><div class='add'>+:ref:`more detail &lt;fscounters&gt;` later.</div><div class='add'>+</div><div class='add'>+:ref:`Quota usage &lt;quotacheck&gt;` and :ref:`file link count &lt;nlinks&gt;`</div><div class='add'>+checking are sufficiently complicated to warrant separate sections.</div><div class='add'>+</div><div class='add'>+Post-Repair Reverification</div><div class='add'>+``````````````````````````</div><div class='add'>+</div><div class='add'>+After performing a repair, the checking code is run a second time to validate</div><div class='add'>+the new structure, and the results of the health assessment are recorded</div><div class='add'>+internally and returned to the calling process.</div><div class='add'>+This step is critical for enabling system administrator to monitor the status</div><div class='add'>+of the filesystem and the progress of any repairs.</div><div class='add'>+For developers, it is a useful means to judge the efficacy of error detection</div><div class='add'>+and correction in the online and offline checking tools.</div><div class='add'>+</div><div class='add'>+Eventual Consistency vs. Online Fsck</div><div class='add'>+------------------------------------</div><div class='add'>+</div><div class='add'>+Complex operations can make modifications to multiple per-AG data structures</div><div class='add'>+with a chain of transactions.</div><div class='add'>+These chains, once committed to the log, are restarted during log recovery if</div><div class='add'>+the system crashes while processing the chain.</div><div class='add'>+Because the AG header buffers are unlocked between transactions within a chain,</div><div class='add'>+online checking must coordinate with chained operations that are in progress to</div><div class='add'>+avoid incorrectly detecting inconsistencies due to pending chains.</div><div class='add'>+Furthermore, online repair must not run when operations are pending because</div><div class='add'>+the metadata are temporarily inconsistent with each other, and rebuilding is</div><div class='add'>+not possible.</div><div class='add'>+</div><div class='add'>+Only online fsck has this requirement of total consistency of AG metadata, and</div><div class='add'>+should be relatively rare as compared to filesystem change operations.</div><div class='add'>+Online fsck coordinates with transaction chains as follows:</div><div class='add'>+</div><div class='add'>+* For each AG, maintain a count of intent items targetting that AG.</div><div class='add'>+  The count should be bumped whenever a new item is added to the chain.</div><div class='add'>+  The count should be dropped when the filesystem has locked the AG header</div><div class='add'>+  buffers and finished the work.</div><div class='add'>+</div><div class='add'>+* When online fsck wants to examine an AG, it should lock the AG header</div><div class='add'>+  buffers to quiesce all transaction chains that want to modify that AG.</div><div class='add'>+  If the count is zero, proceed with the checking operation.</div><div class='add'>+  If it is nonzero, cycle the buffer locks to allow the chain to make forward</div><div class='add'>+  progress.</div><div class='add'>+</div><div class='add'>+This may lead to online fsck taking a long time to complete, but regular</div><div class='add'>+filesystem updates take precedence over background checking activity.</div><div class='add'>+Details about the discovery of this situation are presented in the</div><div class='add'>+:ref:`next section &lt;chain_coordination&gt;`, and details about the solution</div><div class='add'>+are presented :ref:`after that&lt;intent_drains&gt;`.</div><div class='add'>+</div><div class='add'>+.. _chain_coordination:</div><div class='add'>+</div><div class='add'>+Discovery of the Problem</div><div class='add'>+````````````````````````</div><div class='add'>+</div><div class='add'>+Midway through the development of online scrubbing, the fsstress tests</div><div class='add'>+uncovered a misinteraction between online fsck and compound transaction chains</div><div class='add'>+created by other writer threads that resulted in false reports of metadata</div><div class='add'>+inconsistency.</div><div class='add'>+The root cause of these reports is the eventual consistency model introduced by</div><div class='add'>+the expansion of deferred work items and compound transaction chains when</div><div class='add'>+reverse mapping and reflink were introduced.</div><div class='add'>+</div><div class='add'>+Originally, transaction chains were added to XFS to avoid deadlocks when</div><div class='add'>+unmapping space from files.</div><div class='add'>+Deadlock avoidance rules require that AGs only be locked in increasing order,</div><div class='add'>+which makes it impossible (say) to use a single transaction to free a space</div><div class='add'>+extent in AG 7 and then try to free a now superfluous block mapping btree block</div><div class='add'>+in AG 3.</div><div class='add'>+To avoid these kinds of deadlocks, XFS creates Extent Freeing Intent (EFI) log</div><div class='add'>+items to commit to freeing some space in one transaction while deferring the</div><div class='add'>+actual metadata updates to a fresh transaction.</div><div class='add'>+The transaction sequence looks like this:</div><div class='add'>+</div><div class='add'>+1. The first transaction contains a physical update to the file's block mapping</div><div class='add'>+   structures to remove the mapping from the btree blocks.</div><div class='add'>+   It then attaches to the in-memory transaction an action item to schedule</div><div class='add'>+   deferred freeing of space.</div><div class='add'>+   Concretely, each transaction maintains a list of ``struct</div><div class='add'>+   xfs_defer_pending`` objects, each of which maintains a list of ``struct</div><div class='add'>+   xfs_extent_free_item`` objects.</div><div class='add'>+   Returning to the example above, the action item tracks the freeing of both</div><div class='add'>+   the unmapped space from AG 7 and the block mapping btree (BMBT) block from</div><div class='add'>+   AG 3.</div><div class='add'>+   Deferred frees recorded in this manner are committed in the log by creating</div><div class='add'>+   an EFI log item from the ``struct xfs_extent_free_item`` object and</div><div class='add'>+   attaching the log item to the transaction.</div><div class='add'>+   When the log is persisted to disk, the EFI item is written into the ondisk</div><div class='add'>+   transaction record.</div><div class='add'>+   EFIs can list up to 16 extents to free, all sorted in AG order.</div><div class='add'>+</div><div class='add'>+2. The second transaction contains a physical update to the free space btrees</div><div class='add'>+   of AG 3 to release the former BMBT block and a second physical update to the</div><div class='add'>+   free space btrees of AG 7 to release the unmapped file space.</div><div class='add'>+   Observe that the the physical updates are resequenced in the correct order</div><div class='add'>+   when possible.</div><div class='add'>+   Attached to the transaction is a an extent free done (EFD) log item.</div><div class='add'>+   The EFD contains a pointer to the EFI logged in transaction #1 so that log</div><div class='add'>+   recovery can tell if the EFI needs to be replayed.</div><div class='add'>+</div><div class='add'>+If the system goes down after transaction #1 is written back to the filesystem</div><div class='add'>+but before #2 is committed, a scan of the filesystem metadata would show</div><div class='add'>+inconsistent filesystem metadata because there would not appear to be any owner</div><div class='add'>+of the unmapped space.</div><div class='add'>+Happily, log recovery corrects this inconsistency for us -- when recovery finds</div><div class='add'>+an intent log item but does not find a corresponding intent done item, it will</div><div class='add'>+reconstruct the incore state of the intent item and finish it.</div><div class='add'>+In the example above, the log must replay both frees described in the recovered</div><div class='add'>+EFI to complete the recovery phase.</div><div class='add'>+</div><div class='add'>+There are subtleties to XFS' transaction chaining strategy to consider:</div><div class='add'>+</div><div class='add'>+* Log items must be added to a transaction in the correct order to prevent</div><div class='add'>+  conflicts with principal objects that are not held by the transaction.</div><div class='add'>+  In other words, all per-AG metadata updates for an unmapped block must be</div><div class='add'>+  completed before the last update to free the extent, and extents should not</div><div class='add'>+  be reallocated until that last update commits to the log.</div><div class='add'>+</div><div class='add'>+* AG header buffers are released between each transaction in a chain.</div><div class='add'>+  This means that other threads can observe an AG in an intermediate state,</div><div class='add'>+  but as long as the first subtlety is handled, this should not affect the</div><div class='add'>+  correctness of filesystem operations.</div><div class='add'>+</div><div class='add'>+* Unmounting the filesystem flushes all pending work to disk, which means that</div><div class='add'>+  offline fsck never sees the temporary inconsistencies caused by deferred</div><div class='add'>+  work item processing.</div><div class='add'>+</div><div class='add'>+In this manner, XFS employs a form of eventual consistency to avoid deadlocks</div><div class='add'>+and increase parallelism.</div><div class='add'>+</div><div class='add'>+During the design phase of the reverse mapping and reflink features, it was</div><div class='add'>+decided that it was impractical to cram all the reverse mapping updates for a</div><div class='add'>+single filesystem change into a single transaction because a single file</div><div class='add'>+mapping operation can explode into many small updates:</div><div class='add'>+</div><div class='add'>+* The block mapping update itself</div><div class='add'>+* A reverse mapping update for the block mapping update</div><div class='add'>+* Fixing the freelist</div><div class='add'>+* A reverse mapping update for the freelist fix</div><div class='add'>+</div><div class='add'>+* A shape change to the block mapping btree</div><div class='add'>+* A reverse mapping update for the btree update</div><div class='add'>+* Fixing the freelist (again)</div><div class='add'>+* A reverse mapping update for the freelist fix</div><div class='add'>+</div><div class='add'>+* An update to the reference counting information</div><div class='add'>+* A reverse mapping update for the refcount update</div><div class='add'>+* Fixing the freelist (a third time)</div><div class='add'>+* A reverse mapping update for the freelist fix</div><div class='add'>+</div><div class='add'>+* Freeing any space that was unmapped and not owned by any other file</div><div class='add'>+* Fixing the freelist (a fourth time)</div><div class='add'>+* A reverse mapping update for the freelist fix</div><div class='add'>+</div><div class='add'>+* Freeing the space used by the block mapping btree</div><div class='add'>+* Fixing the freelist (a fifth time)</div><div class='add'>+* A reverse mapping update for the freelist fix</div><div class='add'>+</div><div class='add'>+Free list fixups are not usually needed more than once per AG per transaction</div><div class='add'>+chain, but it is theoretically possible if space is very tight.</div><div class='add'>+For copy-on-write updates this is even worse, because this must be done once to</div><div class='add'>+remove the space from a staging area and again to map it into the file!</div><div class='add'>+</div><div class='add'>+To deal with this explosion in a calm manner, XFS expands its use of deferred</div><div class='add'>+work items to cover most reverse mapping updates and all refcount updates.</div><div class='add'>+This reduces the worst case size of transaction reservations by breaking the</div><div class='add'>+work into a long chain of small updates, which increases the degree of eventual</div><div class='add'>+consistency in the system.</div><div class='add'>+Again, this generally isn't a problem because XFS orders its deferred work</div><div class='add'>+items carefully to avoid resource reuse conflicts between unsuspecting threads.</div><div class='add'>+</div><div class='add'>+However, online fsck changes the rules -- remember that although physical</div><div class='add'>+updates to per-AG structures are coordinated by locking the buffers for AG</div><div class='add'>+headers, buffer locks are dropped between transactions.</div><div class='add'>+Once scrub acquires resources and takes locks for a data structure, it must do</div><div class='add'>+all the validation work without releasing the lock.</div><div class='add'>+If the main lock for a space btree is an AG header buffer lock, scrub may have</div><div class='add'>+interrupted another thread that is midway through finishing a chain.</div><div class='add'>+For example, if a thread performing a copy-on-write has completed a reverse</div><div class='add'>+mapping update but not the corresponding refcount update, the two AG btrees</div><div class='add'>+will appear inconsistent to scrub and an observation of corruption will be</div><div class='add'>+recorded.  This observation will not be correct.</div><div class='add'>+If a repair is attempted in this state, the results will be catastrophic!</div><div class='add'>+</div><div class='add'>+Several other solutions to this problem were evaluated upon discovery of this</div><div class='add'>+flaw and rejected:</div><div class='add'>+</div><div class='add'>+1. Add a higher level lock to allocation groups and require writer threads to</div><div class='add'>+   acquire the higher level lock in AG order before making any changes.</div><div class='add'>+   This would be very difficult to implement in practice because it is</div><div class='add'>+   difficult to determine which locks need to be obtained, and in what order,</div><div class='add'>+   without simulating the entire operation.</div><div class='add'>+   Performing a dry run of a file operation to discover necessary locks would</div><div class='add'>+   make the filesystem very slow.</div><div class='add'>+</div><div class='add'>+2. Make the deferred work coordinator code aware of consecutive intent items</div><div class='add'>+   targeting the same AG and have it hold the AG header buffers locked across</div><div class='add'>+   the transaction roll between updates.</div><div class='add'>+   This would introduce a lot of complexity into the coordinator since it is</div><div class='add'>+   only loosely coupled with the actual deferred work items.</div><div class='add'>+   It would also fail to solve the problem because deferred work items can</div><div class='add'>+   generate new deferred subtasks, but all subtasks must be complete before</div><div class='add'>+   work can start on a new sibling task.</div><div class='add'>+</div><div class='add'>+3. Teach online fsck to walk all transactions waiting for whichever lock(s)</div><div class='add'>+   protect the data structure being scrubbed to look for pending operations.</div><div class='add'>+   The checking and repair operations must factor these pending operations into</div><div class='add'>+   the evaluations being performed.</div><div class='add'>+   This solution is a nonstarter because it is *extremely* invasive to the main</div><div class='add'>+   filesystem.</div><div class='add'>+</div><div class='add'>+.. _intent_drains:</div><div class='add'>+</div><div class='add'>+Intent Drains</div><div class='add'>+`````````````</div><div class='add'>+</div><div class='add'>+Online fsck uses an atomic intent item counter and lock cycling to coordinate</div><div class='add'>+with transaction chains.</div><div class='add'>+There are two key properties to the drain mechanism.</div><div class='add'>+First, the counter is incremented when a deferred work item is *queued* to a</div><div class='add'>+transaction, and it is decremented after the associated intent done log item is</div><div class='add'>+*committed* to another transaction.</div><div class='add'>+The second property is that deferred work can be added to a transaction without</div><div class='add'>+holding an AG header lock, but per-AG work items cannot be marked done without</div><div class='add'>+locking that AG header buffer to log the physical updates and the intent done</div><div class='add'>+log item.</div><div class='add'>+The first property enables scrub to yield to running transaction chains, which</div><div class='add'>+is an explicit deprioritization of online fsck to benefit file operations.</div><div class='add'>+The second property of the drain is key to the correct coordination of scrub,</div><div class='add'>+since scrub will always be able to decide if a conflict is possible.</div><div class='add'>+</div><div class='add'>+For regular filesystem code, the drain works as follows:</div><div class='add'>+</div><div class='add'>+1. Call the appropriate subsystem function to add a deferred work item to a</div><div class='add'>+   transaction.</div><div class='add'>+</div><div class='add'>+2. The function calls ``xfs_defer_drain_bump`` to increase the counter.</div><div class='add'>+</div><div class='add'>+3. When the deferred item manager wants to finish the deferred work item, it</div><div class='add'>+   calls ``-&gt;finish_item`` to complete it.</div><div class='add'>+</div><div class='add'>+4. The ``-&gt;finish_item`` implementation logs some changes and calls</div><div class='add'>+   ``xfs_defer_drain_drop`` to decrease the sloppy counter and wake up any threads</div><div class='add'>+   waiting on the drain.</div><div class='add'>+</div><div class='add'>+5. The subtransaction commits, which unlocks the resource associated with the</div><div class='add'>+   intent item.</div><div class='add'>+</div><div class='add'>+For scrub, the drain works as follows:</div><div class='add'>+</div><div class='add'>+1. Lock the resource(s) associated with the metadata being scrubbed.</div><div class='add'>+   For example, a scan of the refcount btree would lock the AGI and AGF header</div><div class='add'>+   buffers.</div><div class='add'>+</div><div class='add'>+2. If the counter is zero (``xfs_defer_drain_busy`` returns false), there are no</div><div class='add'>+   chains in progress and the operation may proceed.</div><div class='add'>+</div><div class='add'>+3. Otherwise, release the resources grabbed in step 1.</div><div class='add'>+</div><div class='add'>+4. Wait for the intent counter to reach zero (``xfs_defer_drain_intents``), then go</div><div class='add'>+   back to step 1 unless a signal has been caught.</div><div class='add'>+</div><div class='add'>+To avoid polling in step 4, the drain provides a waitqueue for scrub threads to</div><div class='add'>+be woken up whenever the intent count drops to zero.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`scrub intent drain series</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-drain-intents&gt;`_.</div><div class='add'>+</div><div class='add'>+.. _jump_labels:</div><div class='add'>+</div><div class='add'>+Static Keys (aka Jump Label Patching)</div><div class='add'>+`````````````````````````````````````</div><div class='add'>+</div><div class='add'>+Online fsck for XFS separates the regular filesystem from the checking and</div><div class='add'>+repair code as much as possible.</div><div class='add'>+However, there are a few parts of online fsck (such as the intent drains, and</div><div class='add'>+later, live update hooks) where it is useful for the online fsck code to know</div><div class='add'>+what's going on in the rest of the filesystem.</div><div class='add'>+Since it is not expected that online fsck will be constantly running in the</div><div class='add'>+background, it is very important to minimize the runtime overhead imposed by</div><div class='add'>+these hooks when online fsck is compiled into the kernel but not actively</div><div class='add'>+running on behalf of userspace.</div><div class='add'>+Taking locks in the hot path of a writer thread to access a data structure only</div><div class='add'>+to find that no further action is necessary is expensive -- on the author's</div><div class='add'>+computer, this have an overhead of 40-50ns per access.</div><div class='add'>+Fortunately, the kernel supports dynamic code patching, which enables XFS to</div><div class='add'>+replace a static branch to hook code with ``nop`` sleds when online fsck isn't</div><div class='add'>+running.</div><div class='add'>+This sled has an overhead of however long it takes the instruction decoder to</div><div class='add'>+skip past the sled, which seems to be on the order of less than 1ns and</div><div class='add'>+does not access memory outside of instruction fetching.</div><div class='add'>+</div><div class='add'>+When online fsck enables the static key, the sled is replaced with an</div><div class='add'>+unconditional branch to call the hook code.</div><div class='add'>+The switchover is quite expensive (~22000ns) but is paid entirely by the</div><div class='add'>+program that invoked online fsck, and can be amortized if multiple threads</div><div class='add'>+enter online fsck at the same time, or if multiple filesystems are being</div><div class='add'>+checked at the same time.</div><div class='add'>+Changing the branch direction requires taking the CPU hotplug lock, and since</div><div class='add'>+CPU initialization requires memory allocation, online fsck must be careful not</div><div class='add'>+to change a static key while holding any locks or resources that could be</div><div class='add'>+accessed in the memory reclaim paths.</div><div class='add'>+To minimize contention on the CPU hotplug lock, care should be taken not to</div><div class='add'>+enable or disable static keys unnecessarily.</div><div class='add'>+</div><div class='add'>+Because static keys are intended to minimize hook overhead for regular</div><div class='add'>+filesystem operations when xfs_scrub is not running, the intended usage</div><div class='add'>+patterns are as follows:</div><div class='add'>+</div><div class='add'>+- The hooked part of XFS should declare a static-scoped static key that</div><div class='add'>+  defaults to false.</div><div class='add'>+  The ``DEFINE_STATIC_KEY_FALSE`` macro takes care of this.</div><div class='add'>+  The static key itself should be declared as a ``static`` variable.</div><div class='add'>+</div><div class='add'>+- When deciding to invoke code that's only used by scrub, the regular</div><div class='add'>+  filesystem should call the ``static_branch_unlikely`` predicate to avoid the</div><div class='add'>+  scrub-only hook code if the static key is not enabled.</div><div class='add'>+</div><div class='add'>+- The regular filesystem should export helper functions that call</div><div class='add'>+  ``static_branch_inc`` to enable and ``static_branch_dec`` to disable the</div><div class='add'>+  static key.</div><div class='add'>+  Wrapper functions make it easy to compile out the relevant code if the kernel</div><div class='add'>+  distributor turns off online fsck at build time.</div><div class='add'>+</div><div class='add'>+- Scrub functions wanting to turn on scrub-only XFS functionality should call</div><div class='add'>+  the ``xchk_fsgates_enable`` from the setup function to enable a specific</div><div class='add'>+  hook.</div><div class='add'>+  This must be done before obtaining any resources that are used by memory</div><div class='add'>+  reclaim.</div><div class='add'>+  Callers had better be sure they really need the functionality gated by the</div><div class='add'>+  static key; the ``TRY_HARDER`` flag is useful here.</div><div class='add'>+</div><div class='add'>+Online scrub has resource acquisition helpers (e.g. ``xchk_perag_lock``) to</div><div class='add'>+handle locking AGI and AGF buffers for all scrubber functions.</div><div class='add'>+If it detects a conflict between scrub and the running transactions, it will</div><div class='add'>+try to wait for intents to complete.</div><div class='add'>+If the caller of the helper has not enabled the static key, the helper will</div><div class='add'>+return -EDEADLOCK, which should result in the scrub being restarted with the</div><div class='add'>+``TRY_HARDER`` flag set.</div><div class='add'>+The scrub setup function should detect that flag, enable the static key, and</div><div class='add'>+try the scrub again.</div><div class='add'>+Scrub teardown disables all static keys obtained by ``xchk_fsgates_enable``.</div><div class='add'>+</div><div class='add'>+For more information, please see the kernel documentation of</div><div class='add'>+Documentation/staging/static-keys.rst.</div><div class='add'>+</div><div class='add'>+.. _xfile:</div><div class='add'>+</div><div class='add'>+Pageable Kernel Memory</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+Some online checking functions work by scanning the filesystem to build a</div><div class='add'>+shadow copy of an ondisk metadata structure in memory and comparing the two</div><div class='add'>+copies.</div><div class='add'>+For online repair to rebuild a metadata structure, it must compute the record</div><div class='add'>+set that will be stored in the new structure before it can persist that new</div><div class='add'>+structure to disk.</div><div class='add'>+Ideally, repairs complete with a single atomic commit that introduces</div><div class='add'>+a new data structure.</div><div class='add'>+To meet these goals, the kernel needs to collect a large amount of information</div><div class='add'>+in a place that doesn't require the correct operation of the filesystem.</div><div class='add'>+</div><div class='add'>+Kernel memory isn't suitable because:</div><div class='add'>+</div><div class='add'>+* Allocating a contiguous region of memory to create a C array is very</div><div class='add'>+  difficult, especially on 32-bit systems.</div><div class='add'>+</div><div class='add'>+* Linked lists of records introduce double pointer overhead which is very high</div><div class='add'>+  and eliminate the possibility of indexed lookups.</div><div class='add'>+</div><div class='add'>+* Kernel memory is pinned, which can drive the system into OOM conditions.</div><div class='add'>+</div><div class='add'>+* The system might not have sufficient memory to stage all the information.</div><div class='add'>+</div><div class='add'>+At any given time, online fsck does not need to keep the entire record set in</div><div class='add'>+memory, which means that individual records can be paged out if necessary.</div><div class='add'>+Continued development of online fsck demonstrated that the ability to perform</div><div class='add'>+indexed data storage would also be very useful.</div><div class='add'>+Fortunately, the Linux kernel already has a facility for byte-addressable and</div><div class='add'>+pageable storage: tmpfs.</div><div class='add'>+In-kernel graphics drivers (most notably i915) take advantage of tmpfs files</div><div class='add'>+to store intermediate data that doesn't need to be in memory at all times, so</div><div class='add'>+that usage precedent is already established.</div><div class='add'>+Hence, the ``xfile`` was born!</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Historical Sidebar**:                                                  |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| The first edition of online repair inserted records into a new btree as  |</div><div class='add'>+| it found them, which failed because filesystem could shut down with a    |</div><div class='add'>+| built data structure, which would be live after recovery finished.       |</div><div class='add'>+|                                                                          |</div><div class='add'>+| The second edition solved the half-rebuilt structure problem by storing  |</div><div class='add'>+| everything in memory, but frequently ran the system out of memory.       |</div><div class='add'>+|                                                                          |</div><div class='add'>+| The third edition solved the OOM problem by using linked lists, but the  |</div><div class='add'>+| memory overhead of the list pointers was extreme.                        |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+xfile Access Models</div><div class='add'>+```````````````````</div><div class='add'>+</div><div class='add'>+A survey of the intended uses of xfiles suggested these use cases:</div><div class='add'>+</div><div class='add'>+1. Arrays of fixed-sized records (space management btrees, directory and</div><div class='add'>+   extended attribute entries)</div><div class='add'>+</div><div class='add'>+2. Sparse arrays of fixed-sized records (quotas and link counts)</div><div class='add'>+</div><div class='add'>+3. Large binary objects (BLOBs) of variable sizes (directory and extended</div><div class='add'>+   attribute names and values)</div><div class='add'>+</div><div class='add'>+4. Staging btrees in memory (reverse mapping btrees)</div><div class='add'>+</div><div class='add'>+5. Arbitrary contents (realtime space management)</div><div class='add'>+</div><div class='add'>+To support the first four use cases, high level data structures wrap the xfile</div><div class='add'>+to share functionality between online fsck functions.</div><div class='add'>+The rest of this section discusses the interfaces that the xfile presents to</div><div class='add'>+four of those five higher level data structures.</div><div class='add'>+The fifth use case is discussed in the :ref:`realtime summary &lt;rtsummary&gt;` case</div><div class='add'>+study.</div><div class='add'>+</div><div class='add'>+The most general storage interface supported by the xfile enables the reading</div><div class='add'>+and writing of arbitrary quantities of data at arbitrary offsets in the xfile.</div><div class='add'>+This capability is provided by ``xfile_pread`` and ``xfile_pwrite`` functions,</div><div class='add'>+which behave similarly to their userspace counterparts.</div><div class='add'>+XFS is very record-based, which suggests that the ability to load and store</div><div class='add'>+complete records is important.</div><div class='add'>+To support these cases, a pair of ``xfile_obj_load`` and ``xfile_obj_store``</div><div class='add'>+functions are provided to read and persist objects into an xfile.</div><div class='add'>+They are internally the same as pread and pwrite, except that they treat any</div><div class='add'>+error as an out of memory error.</div><div class='add'>+For online repair, squashing error conditions in this manner is an acceptable</div><div class='add'>+behavior because the only reaction is to abort the operation back to userspace.</div><div class='add'>+All five xfile usecases can be serviced by these four functions.</div><div class='add'>+</div><div class='add'>+However, no discussion of file access idioms is complete without answering the</div><div class='add'>+question, "But what about mmap?"</div><div class='add'>+It is convenient to access storage directly with pointers, just like userspace</div><div class='add'>+code does with regular memory.</div><div class='add'>+Online fsck must not drive the system into OOM conditions, which means that</div><div class='add'>+xfiles must be responsive to memory reclamation.</div><div class='add'>+tmpfs can only push a pagecache folio to the swap cache if the folio is neither</div><div class='add'>+pinned nor locked, which means the xfile must not pin too many folios.</div><div class='add'>+</div><div class='add'>+Short term direct access to xfile contents is done by locking the pagecache</div><div class='add'>+folio and mapping it into kernel address space.</div><div class='add'>+Programmatic access (e.g. pread and pwrite) uses this mechanism.</div><div class='add'>+Folio locks are not supposed to be held for long periods of time, so long</div><div class='add'>+term direct access to xfile contents is done by bumping the folio refcount,</div><div class='add'>+mapping it into kernel address space, and dropping the folio lock.</div><div class='add'>+These long term users *must* be responsive to memory reclaim by hooking into</div><div class='add'>+the shrinker infrastructure to know when to release folios.</div><div class='add'>+</div><div class='add'>+The ``xfile_get_page`` and ``xfile_put_page`` functions are provided to</div><div class='add'>+retrieve the (locked) folio that backs part of an xfile and to release it.</div><div class='add'>+The only code to use these folio lease functions are the xfarray</div><div class='add'>+:ref:`sorting&lt;xfarray_sort&gt;` algorithms and the :ref:`in-memory</div><div class='add'>+btrees&lt;xfbtree&gt;`.</div><div class='add'>+</div><div class='add'>+xfile Access Coordination</div><div class='add'>+`````````````````````````</div><div class='add'>+</div><div class='add'>+For security reasons, xfiles must be owned privately by the kernel.</div><div class='add'>+They are marked ``S_PRIVATE`` to prevent interference from the security system,</div><div class='add'>+must never be mapped into process file descriptor tables, and their pages must</div><div class='add'>+never be mapped into userspace processes.</div><div class='add'>+</div><div class='add'>+To avoid locking recursion issues with the VFS, all accesses to the shmfs file</div><div class='add'>+are performed by manipulating the page cache directly.</div><div class='add'>+xfile writers call the ``-&gt;write_begin`` and ``-&gt;write_end`` functions of the</div><div class='add'>+xfile's address space to grab writable pages, copy the caller's buffer into the</div><div class='add'>+page, and release the pages.</div><div class='add'>+xfile readers call ``shmem_read_mapping_page_gfp`` to grab pages directly</div><div class='add'>+before copying the contents into the caller's buffer.</div><div class='add'>+In other words, xfiles ignore the VFS read and write code paths to avoid</div><div class='add'>+having to create a dummy ``struct kiocb`` and to avoid taking inode and</div><div class='add'>+freeze locks.</div><div class='add'>+tmpfs cannot be frozen, and xfiles must not be exposed to userspace.</div><div class='add'>+</div><div class='add'>+If an xfile is shared between threads to stage repairs, the caller must provide</div><div class='add'>+its own locks to coordinate access.</div><div class='add'>+For example, if a scrub function stores scan results in an xfile and needs</div><div class='add'>+other threads to provide updates to the scanned data, the scrub function must</div><div class='add'>+provide a lock for all threads to share.</div><div class='add'>+</div><div class='add'>+.. _xfarray:</div><div class='add'>+</div><div class='add'>+Arrays of Fixed-Sized Records</div><div class='add'>+`````````````````````````````</div><div class='add'>+</div><div class='add'>+In XFS, each type of indexed space metadata (free space, inodes, reference</div><div class='add'>+counts, file fork space, and reverse mappings) consists of a set of fixed-size</div><div class='add'>+records indexed with a classic B+ tree.</div><div class='add'>+Directories have a set of fixed-size dirent records that point to the names,</div><div class='add'>+and extended attributes have a set of fixed-size attribute keys that point to</div><div class='add'>+names and values.</div><div class='add'>+Quota counters and file link counters index records with numbers.</div><div class='add'>+During a repair, scrub needs to stage new records during the gathering step and</div><div class='add'>+retrieve them during the btree building step.</div><div class='add'>+</div><div class='add'>+Although this requirement can be satisfied by calling the read and write</div><div class='add'>+methods of the xfile directly, it is simpler for callers for there to be a</div><div class='add'>+higher level abstraction to take care of computing array offsets, to provide</div><div class='add'>+iterator functions, and to deal with sparse records and sorting.</div><div class='add'>+The ``xfarray`` abstraction presents a linear array for fixed-size records atop</div><div class='add'>+the byte-accessible xfile.</div><div class='add'>+</div><div class='add'>+.. _xfarray_access_patterns:</div><div class='add'>+</div><div class='add'>+Array Access Patterns</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Array access patterns in online fsck tend to fall into three categories.</div><div class='add'>+Iteration of records is assumed to be necessary for all cases and will be</div><div class='add'>+covered in the next section.</div><div class='add'>+</div><div class='add'>+The first type of caller handles records that are indexed by position.</div><div class='add'>+Gaps may exist between records, and a record may be updated multiple times</div><div class='add'>+during the collection step.</div><div class='add'>+In other words, these callers want a sparse linearly addressed table file.</div><div class='add'>+The typical use case are quota records or file link count records.</div><div class='add'>+Access to array elements is performed programmatically via ``xfarray_load`` and</div><div class='add'>+``xfarray_store`` functions, which wrap the similarly-named xfile functions to</div><div class='add'>+provide loading and storing of array elements at arbitrary array indices.</div><div class='add'>+Gaps are defined to be null records, and null records are defined to be a</div><div class='add'>+sequence of all zero bytes.</div><div class='add'>+Null records are detected by calling ``xfarray_element_is_null``.</div><div class='add'>+They are created either by calling ``xfarray_unset`` to null out an existing</div><div class='add'>+record or by never storing anything to an array index.</div><div class='add'>+</div><div class='add'>+The second type of caller handles records that are not indexed by position</div><div class='add'>+and do not require multiple updates to a record.</div><div class='add'>+The typical use case here is rebuilding space btrees and key/value btrees.</div><div class='add'>+These callers can add records to the array without caring about array indices</div><div class='add'>+via the ``xfarray_append`` function, which stores a record at the end of the</div><div class='add'>+array.</div><div class='add'>+For callers that require records to be presentable in a specific order (e.g.</div><div class='add'>+rebuilding btree data), the ``xfarray_sort`` function can arrange the sorted</div><div class='add'>+records; this function will be covered later.</div><div class='add'>+</div><div class='add'>+The third type of caller is a bag, which is useful for counting records.</div><div class='add'>+The typical use case here is constructing space extent reference counts from</div><div class='add'>+reverse mapping information.</div><div class='add'>+Records can be put in the bag in any order, they can be removed from the bag</div><div class='add'>+at any time, and uniqueness of records is left to callers.</div><div class='add'>+The ``xfarray_store_anywhere`` function is used to insert a record in any</div><div class='add'>+null record slot in the bag; and the ``xfarray_unset`` function removes a</div><div class='add'>+record from the bag.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`big in-memory array</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=big-array&gt;`_.</div><div class='add'>+</div><div class='add'>+Iterating Array Elements</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Most users of the xfarray require the ability to iterate the records stored in</div><div class='add'>+the array.</div><div class='add'>+Callers can probe every possible array index with the following:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	xfarray_idx_t i;</div><div class='add'>+	foreach_xfarray_idx(array, i) {</div><div class='add'>+	    xfarray_load(array, i, &amp;rec);</div><div class='add'>+</div><div class='add'>+	    /* do something with rec */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+All users of this idiom must be prepared to handle null records or must already</div><div class='add'>+know that there aren't any.</div><div class='add'>+</div><div class='add'>+For xfarray users that want to iterate a sparse array, the ``xfarray_iter``</div><div class='add'>+function ignores indices in the xfarray that have never been written to by</div><div class='add'>+calling ``xfile_seek_data`` (which internally uses ``SEEK_DATA``) to skip areas</div><div class='add'>+of the array that are not populated with memory pages.</div><div class='add'>+Once it finds a page, it will skip the zeroed areas of the page.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	xfarray_idx_t i = XFARRAY_CURSOR_INIT;</div><div class='add'>+	while ((ret = xfarray_iter(array, &amp;i, &amp;rec)) == 1) {</div><div class='add'>+	    /* do something with rec */</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+.. _xfarray_sort:</div><div class='add'>+</div><div class='add'>+Sorting Array Elements</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+During the fourth demonstration of online repair, a community reviewer remarked</div><div class='add'>+that for performance reasons, online repair ought to load batches of records</div><div class='add'>+into btree record blocks instead of inserting records into a new btree one at a</div><div class='add'>+time.</div><div class='add'>+The btree insertion code in XFS is responsible for maintaining correct ordering</div><div class='add'>+of the records, so naturally the xfarray must also support sorting the record</div><div class='add'>+set prior to bulk loading.</div><div class='add'>+</div><div class='add'>+Case Study: Sorting xfarrays</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The sorting algorithm used in the xfarray is actually a combination of adaptive</div><div class='add'>+quicksort and a heapsort subalgorithm in the spirit of</div><div class='add'>+`Sedgewick &lt;https://algs4.cs.princeton.edu/23quicksort/&gt;`_ and</div><div class='add'>+`pdqsort &lt;https://github.com/orlp/pdqsort&gt;`_, with customizations for the Linux</div><div class='add'>+kernel.</div><div class='add'>+To sort records in a reasonably short amount of time, ``xfarray`` takes</div><div class='add'>+advantage of the binary subpartitioning offered by quicksort, but it also uses</div><div class='add'>+heapsort to hedge aginst performance collapse if the chosen quicksort pivots</div><div class='add'>+are poor.</div><div class='add'>+Both algorithms are (in general) O(n * lg(n)), but there is a wide performance</div><div class='add'>+gulf between the two implementations.</div><div class='add'>+</div><div class='add'>+The Linux kernel already contains a reasonably fast implementation of heapsort.</div><div class='add'>+It only operates on regular C arrays, which limits the scope of its usefulness.</div><div class='add'>+There are two key places where the xfarray uses it:</div><div class='add'>+</div><div class='add'>+* Sorting any record subset backed by a single xfile page.</div><div class='add'>+</div><div class='add'>+* Loading a small number of xfarray records from potentially disparate parts</div><div class='add'>+  of the xfarray into a memory buffer, and sorting the buffer.</div><div class='add'>+</div><div class='add'>+In other words, ``xfarray`` uses heapsort to constrain the nested recursion of</div><div class='add'>+quicksort, thereby mitigating quicksort's worst runtime behavior.</div><div class='add'>+</div><div class='add'>+Choosing a quicksort pivot is a tricky business.</div><div class='add'>+A good pivot splits the set to sort in half, leading to the divide and conquer</div><div class='add'>+behavior that is crucial to  O(n * lg(n)) performance.</div><div class='add'>+A poor pivot barely splits the subset at all, leading to O(n\ :sup:`2`)</div><div class='add'>+runtime.</div><div class='add'>+The xfarray sort routine tries to avoid picking a bad pivot by sampling nine</div><div class='add'>+records into a memory buffer and using the kernel heapsort to identify the</div><div class='add'>+median of the nine.</div><div class='add'>+</div><div class='add'>+Most modern quicksort implementations employ Tukey's "ninther" to select a</div><div class='add'>+pivot from a classic C array.</div><div class='add'>+Typical ninther implementations pick three unique triads of records, sort each</div><div class='add'>+of the triads, and then sort the middle value of each triad to determine the</div><div class='add'>+ninther value.</div><div class='add'>+As stated previously, however, xfile accesses are not entirely cheap.</div><div class='add'>+It turned out to be much more performant to read the nine elements into a</div><div class='add'>+memory buffer, run the kernel's in-memory heapsort on the buffer, and choose</div><div class='add'>+the 4th element of that buffer as the pivot.</div><div class='add'>+Tukey's ninthers are described in J. W. Tukey, `The ninther, a technique for</div><div class='add'>+low-effort robust (resistant) location in large samples`, in *Contributions to</div><div class='add'>+Survey Sampling and Applied Statistics*, edited by H. David, (Academic Press,</div><div class='add'>+1978), pp. 251–257.</div><div class='add'>+</div><div class='add'>+The partitioning of quicksort is fairly textbook -- rearrange the record</div><div class='add'>+subset around the pivot, then set up the current and next stack frames to</div><div class='add'>+sort with the larger and the smaller halves of the pivot, respectively.</div><div class='add'>+This keeps the stack space requirements to log2(record count).</div><div class='add'>+</div><div class='add'>+As a final performance optimization, the hi and lo scanning phase of quicksort</div><div class='add'>+keeps examined xfile pages mapped in the kernel for as long as possible to</div><div class='add'>+reduce map/unmap cycles.</div><div class='add'>+Surprisingly, this reduces overall sort runtime by nearly half again after</div><div class='add'>+accounting for the application of heapsort directly onto xfile pages.</div><div class='add'>+</div><div class='add'>+.. _xfblob:</div><div class='add'>+</div><div class='add'>+Blob Storage</div><div class='add'>+````````````</div><div class='add'>+</div><div class='add'>+Extended attributes and directories add an additional requirement for staging</div><div class='add'>+records: arbitrary byte sequences of finite length.</div><div class='add'>+Each directory entry record needs to store entry name,</div><div class='add'>+and each extended attribute needs to store both the attribute name and value.</div><div class='add'>+The names, keys, and values can consume a large amount of memory, so the</div><div class='add'>+``xfblob`` abstraction was created to simplify management of these blobs</div><div class='add'>+atop an xfile.</div><div class='add'>+</div><div class='add'>+Blob arrays provide ``xfblob_load`` and ``xfblob_store`` functions to retrieve</div><div class='add'>+and persist objects.</div><div class='add'>+The store function returns a magic cookie for every object that it persists.</div><div class='add'>+Later, callers provide this cookie to the ``xblob_load`` to recall the object.</div><div class='add'>+The ``xfblob_free`` function frees a specific blob, and the ``xfblob_truncate``</div><div class='add'>+function frees them all because compaction is not needed.</div><div class='add'>+</div><div class='add'>+The details of repairing directories and extended attributes will be discussed</div><div class='add'>+in a subsequent section about atomic extent swapping.</div><div class='add'>+However, it should be noted that these repair functions only use blob storage</div><div class='add'>+to cache a small number of entries before adding them to a temporary ondisk</div><div class='add'>+file, which is why compaction is not required.</div><div class='add'>+</div><div class='add'>+The proposed patchset is at the start of the</div><div class='add'>+`extended attribute repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-xattrs&gt;`_ series.</div><div class='add'>+</div><div class='add'>+.. _xfbtree:</div><div class='add'>+</div><div class='add'>+In-Memory B+Trees</div><div class='add'>+`````````````````</div><div class='add'>+</div><div class='add'>+The chapter about :ref:`secondary metadata&lt;secondary_metadata&gt;` mentioned that</div><div class='add'>+checking and repairing of secondary metadata commonly requires coordination</div><div class='add'>+between a live metadata scan of the filesystem and writer threads that are</div><div class='add'>+updating that metadata.</div><div class='add'>+Keeping the scan data up to date requires requires the ability to propagate</div><div class='add'>+metadata updates from the filesystem into the data being collected by the scan.</div><div class='add'>+This *can* be done by appending concurrent updates into a separate log file and</div><div class='add'>+applying them before writing the new metadata to disk, but this leads to</div><div class='add'>+unbounded memory consumption if the rest of the system is very busy.</div><div class='add'>+Another option is to skip the side-log and commit live updates from the</div><div class='add'>+filesystem directly into the scan data, which trades more overhead for a lower</div><div class='add'>+maximum memory requirement.</div><div class='add'>+In both cases, the data structure holding the scan results must support indexed</div><div class='add'>+access to perform well.</div><div class='add'>+</div><div class='add'>+Given that indexed lookups of scan data is required for both strategies, online</div><div class='add'>+fsck employs the second strategy of committing live updates directly into</div><div class='add'>+scan data.</div><div class='add'>+Because xfarrays are not indexed and do not enforce record ordering, they</div><div class='add'>+are not suitable for this task.</div><div class='add'>+Conveniently, however, XFS has a library to create and maintain ordered reverse</div><div class='add'>+mapping records: the existing rmap btree code!</div><div class='add'>+If only there was a means to create one in memory.</div><div class='add'>+</div><div class='add'>+Recall that the :ref:`xfile &lt;xfile&gt;` abstraction represents memory pages as a</div><div class='add'>+regular file, which means that the kernel can create byte or block addressable</div><div class='add'>+virtual address spaces at will.</div><div class='add'>+The XFS buffer cache specializes in abstracting IO to block-oriented  address</div><div class='add'>+spaces, which means that adaptation of the buffer cache to interface with</div><div class='add'>+xfiles enables reuse of the entire btree library.</div><div class='add'>+Btrees built atop an xfile are collectively known as ``xfbtrees``.</div><div class='add'>+The next few sections describe how they actually work.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`in-memory btree</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=in-memory-btrees&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Using xfiles as a Buffer Cache Target</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Two modifications are necessary to support xfiles as a buffer cache target.</div><div class='add'>+The first is to make it possible for the ``struct xfs_buftarg`` structure to</div><div class='add'>+host the ``struct xfs_buf`` rhashtable, because normally those are held by a</div><div class='add'>+per-AG structure.</div><div class='add'>+The second change is to modify the buffer ``ioapply`` function to "read" cached</div><div class='add'>+pages from the xfile and "write" cached pages back to the xfile.</div><div class='add'>+Multiple access to individual buffers is controlled by the ``xfs_buf`` lock,</div><div class='add'>+since the xfile does not provide any locking on its own.</div><div class='add'>+With this adaptation in place, users of the xfile-backed buffer cache use</div><div class='add'>+exactly the same APIs as users of the disk-backed buffer cache.</div><div class='add'>+The separation between xfile and buffer cache implies higher memory usage since</div><div class='add'>+they do not share pages, but this property could some day enable transactional</div><div class='add'>+updates to an in-memory btree.</div><div class='add'>+Today, however, it simply eliminates the need for new code.</div><div class='add'>+</div><div class='add'>+Space Management with an xfbtree</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Space management for an xfile is very simple -- each btree block is one memory</div><div class='add'>+page in size.</div><div class='add'>+These blocks use the same header format as an on-disk btree, but the in-memory</div><div class='add'>+block verifiers ignore the checksums, assuming that xfile memory is no more</div><div class='add'>+corruption-prone than regular DRAM.</div><div class='add'>+Reusing existing code here is more important than absolute memory efficiency.</div><div class='add'>+</div><div class='add'>+The very first block of an xfile backing an xfbtree contains a header block.</div><div class='add'>+The header describes the owner, height, and the block number of the root</div><div class='add'>+xfbtree block.</div><div class='add'>+</div><div class='add'>+To allocate a btree block, use ``xfile_seek_data`` to find a gap in the file.</div><div class='add'>+If there are no gaps, create one by extending the length of the xfile.</div><div class='add'>+Preallocate space for the block with ``xfile_prealloc``, and hand back the</div><div class='add'>+location.</div><div class='add'>+To free an xfbtree block, use ``xfile_discard`` (which internally uses</div><div class='add'>+``FALLOC_FL_PUNCH_HOLE``) to remove the memory page from the xfile.</div><div class='add'>+</div><div class='add'>+Populating an xfbtree</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+An online fsck function that wants to create an xfbtree should proceed as</div><div class='add'>+follows:</div><div class='add'>+</div><div class='add'>+1. Call ``xfile_create`` to create an xfile.</div><div class='add'>+</div><div class='add'>+2. Call ``xfs_alloc_memory_buftarg`` to create a buffer cache target structure</div><div class='add'>+   pointing to the xfile.</div><div class='add'>+</div><div class='add'>+3. Pass the buffer cache target, buffer ops, and other information to</div><div class='add'>+   ``xfbtree_create`` to write an initial tree header and root block to the</div><div class='add'>+   xfile.</div><div class='add'>+   Each btree type should define a wrapper that passes necessary arguments to</div><div class='add'>+   the creation function.</div><div class='add'>+   For example, rmap btrees define ``xfs_rmapbt_mem_create`` to take care of</div><div class='add'>+   all the necessary details for callers.</div><div class='add'>+   A ``struct xfbtree`` object will be returned.</div><div class='add'>+</div><div class='add'>+4. Pass the xfbtree object to the btree cursor creation function for the</div><div class='add'>+   btree type.</div><div class='add'>+   Following the example above, ``xfs_rmapbt_mem_cursor`` takes care of this</div><div class='add'>+   for callers.</div><div class='add'>+</div><div class='add'>+5. Pass the btree cursor to the regular btree functions to make queries against</div><div class='add'>+   and to update the in-memory btree.</div><div class='add'>+   For example, a btree cursor for an rmap xfbtree can be passed to the</div><div class='add'>+   ``xfs_rmap_*`` functions just like any other btree cursor.</div><div class='add'>+   See the :ref:`next section&lt;xfbtree_commit&gt;` for information on dealing with</div><div class='add'>+   xfbtree updates that are logged to a transaction.</div><div class='add'>+</div><div class='add'>+6. When finished, delete the btree cursor, destroy the xfbtree object, free the</div><div class='add'>+   buffer target, and the destroy the xfile to release all resources.</div><div class='add'>+</div><div class='add'>+.. _xfbtree_commit:</div><div class='add'>+</div><div class='add'>+Committing Logged xfbtree Buffers</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Although it is a clever hack to reuse the rmap btree code to handle the staging</div><div class='add'>+structure, the ephemeral nature of the in-memory btree block storage presents</div><div class='add'>+some challenges of its own.</div><div class='add'>+The XFS transaction manager must not commit buffer log items for buffers backed</div><div class='add'>+by an xfile because the log format does not understand updates for devices</div><div class='add'>+other than the data device.</div><div class='add'>+An ephemeral xfbtree probably will not exist by the time the AIL checkpoints</div><div class='add'>+log transactions back into the filesystem, and certainly won't exist during</div><div class='add'>+log recovery.</div><div class='add'>+For these reasons, any code updating an xfbtree in transaction context must</div><div class='add'>+remove the buffer log items from the transaction and write the updates into the</div><div class='add'>+backing xfile before committing or cancelling the transaction.</div><div class='add'>+</div><div class='add'>+The ``xfbtree_trans_commit`` and ``xfbtree_trans_cancel`` functions implement</div><div class='add'>+this functionality as follows:</div><div class='add'>+</div><div class='add'>+1. Find each buffer log item whose buffer targets the xfile.</div><div class='add'>+</div><div class='add'>+2. Record the dirty/ordered status of the log item.</div><div class='add'>+</div><div class='add'>+3. Detach the log item from the buffer.</div><div class='add'>+</div><div class='add'>+4. Queue the buffer to a special delwri list.</div><div class='add'>+</div><div class='add'>+5. Clear the transaction dirty flag if the only dirty log items were the ones</div><div class='add'>+   that were detached in step 3.</div><div class='add'>+</div><div class='add'>+6. Submit the delwri list to commit the changes to the xfile, if the updates</div><div class='add'>+   are being committed.</div><div class='add'>+</div><div class='add'>+After removing xfile logged buffers from the transaction in this manner, the</div><div class='add'>+transaction can be committed or cancelled.</div><div class='add'>+</div><div class='add'>+Bulk Loading of Ondisk B+Trees</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+As mentioned previously, early iterations of online repair built new btree</div><div class='add'>+structures by creating a new btree and adding observations individually.</div><div class='add'>+Loading a btree one record at a time had a slight advantage of not requiring</div><div class='add'>+the incore records to be sorted prior to commit, but was very slow and leaked</div><div class='add'>+blocks if the system went down during a repair.</div><div class='add'>+Loading records one at a time also meant that repair could not control the</div><div class='add'>+loading factor of the blocks in the new btree.</div><div class='add'>+</div><div class='add'>+Fortunately, the venerable ``xfs_repair`` tool had a more efficient means for</div><div class='add'>+rebuilding a btree index from a collection of records -- bulk btree loading.</div><div class='add'>+This was implemented rather inefficiently code-wise, since ``xfs_repair``</div><div class='add'>+had separate copy-pasted implementations for each btree type.</div><div class='add'>+</div><div class='add'>+To prepare for online fsck, each of the four bulk loaders were studied, notes</div><div class='add'>+were taken, and the four were refactored into a single generic btree bulk</div><div class='add'>+loading mechanism.</div><div class='add'>+Those notes in turn have been refreshed and are presented below.</div><div class='add'>+</div><div class='add'>+Geometry Computation</div><div class='add'>+````````````````````</div><div class='add'>+</div><div class='add'>+The zeroth step of bulk loading is to assemble the entire record set that will</div><div class='add'>+be stored in the new btree, and sort the records.</div><div class='add'>+Next, call ``xfs_btree_bload_compute_geometry`` to compute the shape of the</div><div class='add'>+btree from the record set, the type of btree, and any load factor preferences.</div><div class='add'>+This information is required for resource reservation.</div><div class='add'>+</div><div class='add'>+First, the geometry computation computes the minimum and maximum records that</div><div class='add'>+will fit in a leaf block from the size of a btree block and the size of the</div><div class='add'>+block header.</div><div class='add'>+Roughly speaking, the maximum number of records is::</div><div class='add'>+</div><div class='add'>+        maxrecs = (block_size - header_size) / record_size</div><div class='add'>+</div><div class='add'>+The XFS design specifies that btree blocks should be merged when possible,</div><div class='add'>+which means the minimum number of records is half of maxrecs::</div><div class='add'>+</div><div class='add'>+        minrecs = maxrecs / 2</div><div class='add'>+</div><div class='add'>+The next variable to determine is the desired loading factor.</div><div class='add'>+This must be at least minrecs and no more than maxrecs.</div><div class='add'>+Choosing minrecs is undesirable because it wastes half the block.</div><div class='add'>+Choosing maxrecs is also undesirable because adding a single record to each</div><div class='add'>+newly rebuilt leaf block will cause a tree split, which causes a noticeable</div><div class='add'>+drop in performance immediately afterwards.</div><div class='add'>+The default loading factor was chosen to be 75% of maxrecs, which provides a</div><div class='add'>+reasonably compact structure without any immediate split penalties::</div><div class='add'>+</div><div class='add'>+        default_load_factor = (maxrecs + minrecs) / 2</div><div class='add'>+</div><div class='add'>+If space is tight, the loading factor will be set to maxrecs to try to avoid</div><div class='add'>+running out of space::</div><div class='add'>+</div><div class='add'>+        leaf_load_factor = enough space ? default_load_factor : maxrecs</div><div class='add'>+</div><div class='add'>+Load factor is computed for btree node blocks using the combined size of the</div><div class='add'>+btree key and pointer as the record size::</div><div class='add'>+</div><div class='add'>+        maxrecs = (block_size - header_size) / (key_size + ptr_size)</div><div class='add'>+        minrecs = maxrecs / 2</div><div class='add'>+        node_load_factor = enough space ? default_load_factor : maxrecs</div><div class='add'>+</div><div class='add'>+Once that's done, the number of leaf blocks required to store the record set</div><div class='add'>+can be computed as::</div><div class='add'>+</div><div class='add'>+        leaf_blocks = ceil(record_count / leaf_load_factor)</div><div class='add'>+</div><div class='add'>+The number of node blocks needed to point to the next level down in the tree</div><div class='add'>+is computed as::</div><div class='add'>+</div><div class='add'>+        n_blocks = (n == 0 ? leaf_blocks : node_blocks[n])</div><div class='add'>+        node_blocks[n + 1] = ceil(n_blocks / node_load_factor)</div><div class='add'>+</div><div class='add'>+The entire computation is performed recursively until the current level only</div><div class='add'>+needs one block.</div><div class='add'>+The resulting geometry is as follows:</div><div class='add'>+</div><div class='add'>+- For AG-rooted btrees, this level is the root level, so the height of the new</div><div class='add'>+  tree is ``level + 1`` and the space needed is the summation of the number of</div><div class='add'>+  blocks on each level.</div><div class='add'>+</div><div class='add'>+- For inode-rooted btrees where the records in the top level do not fit in the</div><div class='add'>+  inode fork area, the height is ``level + 2``, the space needed is the</div><div class='add'>+  summation of the number of blocks on each level, and the inode fork points to</div><div class='add'>+  the root block.</div><div class='add'>+</div><div class='add'>+- For inode-rooted btrees where the records in the top level can be stored in</div><div class='add'>+  the inode fork area, then the root block can be stored in the inode, the</div><div class='add'>+  height is ``level + 1``, and the space needed is one less than the summation</div><div class='add'>+  of the number of blocks on each level.</div><div class='add'>+  This only becomes relevant when non-bmap btrees gain the ability to root in</div><div class='add'>+  an inode, which is a future patchset and only included here for completeness.</div><div class='add'>+</div><div class='add'>+.. _newbt:</div><div class='add'>+</div><div class='add'>+Reserving New B+Tree Blocks</div><div class='add'>+```````````````````````````</div><div class='add'>+</div><div class='add'>+Once repair knows the number of blocks needed for the new btree, it allocates</div><div class='add'>+those blocks using the free space information.</div><div class='add'>+Each reserved extent is tracked separately by the btree builder state data.</div><div class='add'>+To improve crash resilience, the reservation code also logs an Extent Freeing</div><div class='add'>+Intent (EFI) item in the same transaction as each space allocation and attaches</div><div class='add'>+its in-memory ``struct xfs_extent_free_item`` object to the space reservation.</div><div class='add'>+If the system goes down, log recovery will use the unfinished EFIs to free the</div><div class='add'>+unused space, the free space, leaving the filesystem unchanged.</div><div class='add'>+</div><div class='add'>+Each time the btree builder claims a block for the btree from a reserved</div><div class='add'>+extent, it updates the in-memory reservation to reflect the claimed space.</div><div class='add'>+Block reservation tries to allocate as much contiguous space as possible to</div><div class='add'>+reduce the number of EFIs in play.</div><div class='add'>+</div><div class='add'>+While repair is writing these new btree blocks, the EFIs created for the space</div><div class='add'>+reservations pin the tail of the ondisk log.</div><div class='add'>+It's possible that other parts of the system will remain busy and push the head</div><div class='add'>+of the log towards the pinned tail.</div><div class='add'>+To avoid livelocking the filesystem, the EFIs must not pin the tail of the log</div><div class='add'>+for too long.</div><div class='add'>+To alleviate this problem, the dynamic relogging capability of the deferred ops</div><div class='add'>+mechanism is reused here to commit a transaction at the log head containing an</div><div class='add'>+EFD for the old EFI and new EFI at the head.</div><div class='add'>+This enables the log to release the old EFI to keep the log moving forwards.</div><div class='add'>+</div><div class='add'>+EFIs have a role to play during the commit and reaping phases; please see the</div><div class='add'>+next section and the section about :ref:`reaping&lt;reaping&gt;` for more details.</div><div class='add'>+</div><div class='add'>+Proposed patchsets are the</div><div class='add'>+`bitmap rework</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-bitmap-rework&gt;`_</div><div class='add'>+and the</div><div class='add'>+`preparation for bulk loading btrees</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-prep-for-bulk-loading&gt;`_.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Writing the New Tree</div><div class='add'>+````````````````````</div><div class='add'>+</div><div class='add'>+This part is pretty simple -- the btree builder (``xfs_btree_bulkload``) claims</div><div class='add'>+a block from the reserved list, writes the new btree block header, fills the</div><div class='add'>+rest of the block with records, and adds the new leaf block to a list of</div><div class='add'>+written blocks::</div><div class='add'>+</div><div class='add'>+  ┌────┐</div><div class='add'>+  │leaf│</div><div class='add'>+  │RRR │</div><div class='add'>+  └────┘</div><div class='add'>+</div><div class='add'>+Sibling pointers are set every time a new block is added to the level::</div><div class='add'>+</div><div class='add'>+  ┌────┐ ┌────┐ ┌────┐ ┌────┐</div><div class='add'>+  │leaf│→│leaf│→│leaf│→│leaf│</div><div class='add'>+  │RRR │←│RRR │←│RRR │←│RRR │</div><div class='add'>+  └────┘ └────┘ └────┘ └────┘</div><div class='add'>+</div><div class='add'>+When it finishes writing the record leaf blocks, it moves on to the node</div><div class='add'>+blocks</div><div class='add'>+To fill a node block, it walks each block in the next level down in the tree</div><div class='add'>+to compute the relevant keys and write them into the parent node::</div><div class='add'>+</div><div class='add'>+      ┌────┐       ┌────┐</div><div class='add'>+      │node│──────→│node│</div><div class='add'>+      │PP  │←──────│PP  │</div><div class='add'>+      └────┘       └────┘</div><div class='add'>+      ↙   ↘         ↙   ↘</div><div class='add'>+  ┌────┐ ┌────┐ ┌────┐ ┌────┐</div><div class='add'>+  │leaf│→│leaf│→│leaf│→│leaf│</div><div class='add'>+  │RRR │←│RRR │←│RRR │←│RRR │</div><div class='add'>+  └────┘ └────┘ └────┘ └────┘</div><div class='add'>+</div><div class='add'>+When it reaches the root level, it is ready to commit the new btree!::</div><div class='add'>+</div><div class='add'>+          ┌─────────┐</div><div class='add'>+          │  root   │</div><div class='add'>+          │   PP    │</div><div class='add'>+          └─────────┘</div><div class='add'>+          ↙         ↘</div><div class='add'>+      ┌────┐       ┌────┐</div><div class='add'>+      │node│──────→│node│</div><div class='add'>+      │PP  │←──────│PP  │</div><div class='add'>+      └────┘       └────┘</div><div class='add'>+      ↙   ↘         ↙   ↘</div><div class='add'>+  ┌────┐ ┌────┐ ┌────┐ ┌────┐</div><div class='add'>+  │leaf│→│leaf│→│leaf│→│leaf│</div><div class='add'>+  │RRR │←│RRR │←│RRR │←│RRR │</div><div class='add'>+  └────┘ └────┘ └────┘ └────┘</div><div class='add'>+</div><div class='add'>+The first step to commit the new btree is to persist the btree blocks to disk</div><div class='add'>+synchronously.</div><div class='add'>+This is a little complicated because a new btree block could have been freed</div><div class='add'>+in the recent past, so the builder must use ``xfs_buf_delwri_queue_here`` to</div><div class='add'>+remove the (stale) buffer from the AIL list before it can write the new blocks</div><div class='add'>+to disk.</div><div class='add'>+Blocks are queued for IO using a delwri list and written in one large batch</div><div class='add'>+with ``xfs_buf_delwri_submit``.</div><div class='add'>+</div><div class='add'>+Once the new blocks have been persisted to disk, control returns to the</div><div class='add'>+individual repair function that called the bulk loader.</div><div class='add'>+The repair function must log the location of the new root in a transaction,</div><div class='add'>+clean up the space reservations that were made for the new btree, and reap the</div><div class='add'>+old metadata blocks:</div><div class='add'>+</div><div class='add'>+1. Commit the location of the new btree root.</div><div class='add'>+</div><div class='add'>+2. For each incore reservation:</div><div class='add'>+</div><div class='add'>+   a. Log Extent Freeing Done (EFD) items for all the space that was consumed</div><div class='add'>+      by the btree builder.  The new EFDs must point to the EFIs attached to</div><div class='add'>+      the reservation to prevent log recovery from freeing the new blocks.</div><div class='add'>+</div><div class='add'>+   b. For unclaimed portions of incore reservations, create a regular deferred</div><div class='add'>+      extent free work item to be free the unused space later in the</div><div class='add'>+      transaction chain.</div><div class='add'>+</div><div class='add'>+   c. The EFDs and EFIs logged in steps 2a and 2b must not overrun the</div><div class='add'>+      reservation of the committing transaction.</div><div class='add'>+      If the btree loading code suspects this might be about to happen, it must</div><div class='add'>+      call ``xrep_defer_finish`` to clear out the deferred work and obtain a</div><div class='add'>+      fresh transaction.</div><div class='add'>+</div><div class='add'>+3. Clear out the deferred work a second time to finish the commit and clean</div><div class='add'>+   the repair transaction.</div><div class='add'>+</div><div class='add'>+The transaction rolling in steps 2c and 3 represent a weakness in the repair</div><div class='add'>+algorithm, because a log flush and a crash before the end of the reap step can</div><div class='add'>+result in space leaking.</div><div class='add'>+Online repair functions minimize the chances of this occuring by using very</div><div class='add'>+large transactions, which each can accomodate many thousands of block freeing</div><div class='add'>+instructions.</div><div class='add'>+Repair moves on to reaping the old blocks, which will be presented in a</div><div class='add'>+subsequent :ref:`section&lt;reaping&gt;` after a few case studies of bulk loading.</div><div class='add'>+</div><div class='add'>+Case Study: Rebuilding the Inode Index</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The high level process to rebuild the inode index btree is:</div><div class='add'>+</div><div class='add'>+1. Walk the reverse mapping records to generate ``struct xfs_inobt_rec``</div><div class='add'>+   records from the inode chunk information and a bitmap of the old inode btree</div><div class='add'>+   blocks.</div><div class='add'>+</div><div class='add'>+2. Append the records to an xfarray in inode order.</div><div class='add'>+</div><div class='add'>+3. Use the ``xfs_btree_bload_compute_geometry`` function to compute the number</div><div class='add'>+   of blocks needed for the inode btree.</div><div class='add'>+   If the free space inode btree is enabled, call it again to estimate the</div><div class='add'>+   geometry of the finobt.</div><div class='add'>+</div><div class='add'>+4. Allocate the number of blocks computed in the previous step.</div><div class='add'>+</div><div class='add'>+5. Use ``xfs_btree_bload`` to write the xfarray records to btree blocks and</div><div class='add'>+   generate the internal node blocks.</div><div class='add'>+   If the free space inode btree is enabled, call it again to load the finobt.</div><div class='add'>+</div><div class='add'>+6. Commit the location of the new btree root block(s) to the AGI.</div><div class='add'>+</div><div class='add'>+7. Reap the old btree blocks using the bitmap created in step 1.</div><div class='add'>+</div><div class='add'>+Details are as follows.</div><div class='add'>+</div><div class='add'>+The inode btree maps inumbers to the ondisk location of the associated</div><div class='add'>+inode records, which means that the inode btrees can be rebuilt from the</div><div class='add'>+reverse mapping information.</div><div class='add'>+Reverse mapping records with an owner of ``XFS_RMAP_OWN_INOBT`` marks the</div><div class='add'>+location of the old inode btree blocks.</div><div class='add'>+Each reverse mapping record with an owner of ``XFS_RMAP_OWN_INODES`` marks the</div><div class='add'>+location of at least one inode cluster buffer.</div><div class='add'>+A cluster is the smallest number of ondisk inodes that can be allocated or</div><div class='add'>+freed in a single transaction; it is never smaller than 1 fs block or 4 inodes.</div><div class='add'>+</div><div class='add'>+For the space represented by each inode cluster, ensure that there are no</div><div class='add'>+records in the free space btrees nor any records in the reference count btree.</div><div class='add'>+If there are, the space metadata inconsistencies are reason enough to abort the</div><div class='add'>+operation.</div><div class='add'>+Otherwise, read each cluster buffer to check that its contents appear to be</div><div class='add'>+ondisk inodes and to decide if the file is allocated</div><div class='add'>+(``xfs_dinode.i_mode != 0``) or free (``xfs_dinode.i_mode == 0``).</div><div class='add'>+Accumulate the results of successive inode cluster buffer reads until there is</div><div class='add'>+enough information to fill a single inode chunk record, which is 64 consecutive</div><div class='add'>+numbers in the inumber keyspace.</div><div class='add'>+If the chunk is sparse, the chunk record may include holes.</div><div class='add'>+</div><div class='add'>+Once the repair function accumulates one chunk's worth of data, it calls</div><div class='add'>+``xfarray_append`` to add the inode btree record to the xfarray.</div><div class='add'>+This xfarray is walked twice during the btree creation step -- once to populate</div><div class='add'>+the inode btree with all inode chunk records, and a second time to populate the</div><div class='add'>+free inode btree with records for chunks that have free non-sparse inodes.</div><div class='add'>+The number of records for the inode btree is the number of xfarray records,</div><div class='add'>+but the record count for the free inode btree has to be computed as inode chunk</div><div class='add'>+records are stored in the xfarray.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`AG btree repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-ag-btrees&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Case Study: Rebuilding the Space Reference Counts</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Reverse mapping records are used to rebuild the reference count information.</div><div class='add'>+Reference counts are required for correct operation of copy on write for shared</div><div class='add'>+file data.</div><div class='add'>+Imagine the reverse mapping entries as rectangles representing extents of</div><div class='add'>+physical blocks, and that the rectangles can be laid down to allow them to</div><div class='add'>+overlap each other.</div><div class='add'>+From the diagram below, it is apparent that a reference count record must start</div><div class='add'>+or end wherever the height of the stack changes.</div><div class='add'>+In other words, the record emission stimulus is level-triggered::</div><div class='add'>+</div><div class='add'>+                        █    ███</div><div class='add'>+              ██      █████ ████   ███        ██████</div><div class='add'>+        ██   ████     ███████████ ████     █████████</div><div class='add'>+        ████████████████████████████████ ███████████</div><div class='add'>+        ^ ^  ^^ ^^    ^ ^^ ^^^  ^^^^  ^ ^^ ^  ^     ^</div><div class='add'>+        2 1  23 21    3 43 234  2123  1 01 2  3     0</div><div class='add'>+</div><div class='add'>+The ondisk reference count btree does not store the refcount == 0 cases because</div><div class='add'>+the free space btree already records which blocks are free.</div><div class='add'>+Extents being used to stage copy-on-write operations should be the only records</div><div class='add'>+with refcount == 1.</div><div class='add'>+Single-owner file blocks aren't recorded in either the free space or the</div><div class='add'>+reference count btrees.</div><div class='add'>+</div><div class='add'>+The high level process to rebuild the reference count btree is:</div><div class='add'>+</div><div class='add'>+1. Walk the reverse mapping records to generate ``struct xfs_refcount_irec``</div><div class='add'>+   records for any space having more than one reverse mapping and add them to</div><div class='add'>+   the xfarray.</div><div class='add'>+   Any records owned by ``XFS_RMAP_OWN_COW`` are also added to the xfarray</div><div class='add'>+   because these are extents allocated to stage a copy on write operation and</div><div class='add'>+   are tracked in the refcount btree.</div><div class='add'>+</div><div class='add'>+   Use any records owned by ``XFS_RMAP_OWN_REFC`` to create a bitmap of old</div><div class='add'>+   refcount btree blocks.</div><div class='add'>+</div><div class='add'>+2. Sort the records in physical extent order, putting the CoW staging extents</div><div class='add'>+   at the end of the xfarray.</div><div class='add'>+   This matches the sorting order of records in the refcount btree.</div><div class='add'>+</div><div class='add'>+3. Use the ``xfs_btree_bload_compute_geometry`` function to compute the number</div><div class='add'>+   of blocks needed for the new tree.</div><div class='add'>+</div><div class='add'>+4. Allocate the number of blocks computed in the previous step.</div><div class='add'>+</div><div class='add'>+5. Use ``xfs_btree_bload`` to write the xfarray records to btree blocks and</div><div class='add'>+   generate the internal node blocks.</div><div class='add'>+</div><div class='add'>+6. Commit the location of new btree root block to the AGF.</div><div class='add'>+</div><div class='add'>+7. Reap the old btree blocks using the bitmap created in step 1.</div><div class='add'>+</div><div class='add'>+Details are as follows; the same algorithm is used by ``xfs_repair`` to</div><div class='add'>+generate refcount information from reverse mapping records.</div><div class='add'>+</div><div class='add'>+- Until the reverse mapping btree runs out of records:</div><div class='add'>+</div><div class='add'>+  - Retrieve the next record from the btree and put it in a bag.</div><div class='add'>+</div><div class='add'>+  - Collect all records with the same starting block from the btree and put</div><div class='add'>+    them in the bag.</div><div class='add'>+</div><div class='add'>+  - While the bag isn't empty:</div><div class='add'>+</div><div class='add'>+    - Among the mappings in the bag, compute the lowest block number where the</div><div class='add'>+      reference count changes.</div><div class='add'>+      This position will be either the starting block number of the next</div><div class='add'>+      unprocessed reverse mapping or the next block after the shortest mapping</div><div class='add'>+      in the bag.</div><div class='add'>+</div><div class='add'>+    - Remove all mappings from the bag that end at this position.</div><div class='add'>+</div><div class='add'>+    - Collect all reverse mappings that start at this position from the btree</div><div class='add'>+      and put them in the bag.</div><div class='add'>+</div><div class='add'>+    - If the size of the bag changed and is greater than one, create a new</div><div class='add'>+      refcount record associating the block number range that we just walked to</div><div class='add'>+      the size of the bag.</div><div class='add'>+</div><div class='add'>+The bag-like structure in this case is a type 2 xfarray as discussed in the</div><div class='add'>+:ref:`xfarray access patterns&lt;xfarray_access_patterns&gt;` section.</div><div class='add'>+Reverse mappings are added to the bag using ``xfarray_store_anywhere`` and</div><div class='add'>+removed via ``xfarray_unset``.</div><div class='add'>+Bag members are examined through ``xfarray_iter`` loops.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`AG btree repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-ag-btrees&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Case Study: Rebuilding File Fork Mapping Indices</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The high level process to rebuild a data/attr fork mapping btree is:</div><div class='add'>+</div><div class='add'>+1. Walk the reverse mapping records to generate ``struct xfs_bmbt_rec``</div><div class='add'>+   records from the reverse mapping records for that inode and fork.</div><div class='add'>+   Append these records to an xfarray.</div><div class='add'>+   Compute the bitmap of the old bmap btree blocks from the ``BMBT_BLOCK``</div><div class='add'>+   records.</div><div class='add'>+</div><div class='add'>+2. Use the ``xfs_btree_bload_compute_geometry`` function to compute the number</div><div class='add'>+   of blocks needed for the new tree.</div><div class='add'>+</div><div class='add'>+3. Sort the records in file offset order.</div><div class='add'>+</div><div class='add'>+4. If the extent records would fit in the inode fork immediate area, commit the</div><div class='add'>+   records to that immediate area and skip to step 8.</div><div class='add'>+</div><div class='add'>+5. Allocate the number of blocks computed in the previous step.</div><div class='add'>+</div><div class='add'>+6. Use ``xfs_btree_bload`` to write the xfarray records to btree blocks and</div><div class='add'>+   generate the internal node blocks.</div><div class='add'>+</div><div class='add'>+7. Commit the new btree root block to the inode fork immediate area.</div><div class='add'>+</div><div class='add'>+8. Reap the old btree blocks using the bitmap created in step 1.</div><div class='add'>+</div><div class='add'>+There are some complications here:</div><div class='add'>+First, it's possible to move the fork offset to adjust the sizes of the</div><div class='add'>+immediate areas if the data and attr forks are not both in BMBT format.</div><div class='add'>+Second, if there are sufficiently few fork mappings, it may be possible to use</div><div class='add'>+EXTENTS format instead of BMBT, which may require a conversion.</div><div class='add'>+Third, the incore extent map must be reloaded carefully to avoid disturbing</div><div class='add'>+any delayed allocation extents.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`file mapping repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-file-mappings&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+.. _reaping:</div><div class='add'>+</div><div class='add'>+Reaping Old Metadata Blocks</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+Whenever online fsck builds a new data structure to replace one that is</div><div class='add'>+suspect, there is a question of how to find and dispose of the blocks that</div><div class='add'>+belonged to the old structure.</div><div class='add'>+The laziest method of course is not to deal with them at all, but this slowly</div><div class='add'>+leads to service degradations as space leaks out of the filesystem.</div><div class='add'>+Hopefully, someone will schedule a rebuild of the free space information to</div><div class='add'>+plug all those leaks.</div><div class='add'>+Offline repair rebuilds all space metadata after recording the usage of</div><div class='add'>+the files and directories that it decides not to clear, hence it can build new</div><div class='add'>+structures in the discovered free space and avoid the question of reaping.</div><div class='add'>+</div><div class='add'>+As part of a repair, online fsck relies heavily on the reverse mapping records</div><div class='add'>+to find space that is owned by the corresponding rmap owner yet truly free.</div><div class='add'>+Cross referencing rmap records with other rmap records is necessary because</div><div class='add'>+there may be other data structures that also think they own some of those</div><div class='add'>+blocks (e.g. crosslinked trees).</div><div class='add'>+Permitting the block allocator to hand them out again will not push the system</div><div class='add'>+towards consistency.</div><div class='add'>+</div><div class='add'>+For space metadata, the process of finding extents to dispose of generally</div><div class='add'>+follows this format:</div><div class='add'>+</div><div class='add'>+1. Create a bitmap of space used by data structures that must be preserved.</div><div class='add'>+   The space reservations used to create the new metadata can be used here if</div><div class='add'>+   the same rmap owner code is used to denote all of the objects being rebuilt.</div><div class='add'>+</div><div class='add'>+2. Survey the reverse mapping data to create a bitmap of space owned by the</div><div class='add'>+   same ``XFS_RMAP_OWN_*`` number for the metadata that is being preserved.</div><div class='add'>+</div><div class='add'>+3. Use the bitmap disunion operator to subtract (1) from (2).</div><div class='add'>+   The remaining set bits represent candidate extents that could be freed.</div><div class='add'>+   The process moves on to step 4 below.</div><div class='add'>+</div><div class='add'>+Repairs for file-based metadata such as extended attributes, directories,</div><div class='add'>+symbolic links, quota files and realtime bitmaps are performed by building a</div><div class='add'>+new structure attached to a temporary file and swapping the forks.</div><div class='add'>+Afterward, the mappings in the old file fork are the candidate blocks for</div><div class='add'>+disposal.</div><div class='add'>+</div><div class='add'>+The process for disposing of old extents is as follows:</div><div class='add'>+</div><div class='add'>+4. For each candidate extent, count the number of reverse mapping records for</div><div class='add'>+   the first block in that extent that do not have the same rmap owner for the</div><div class='add'>+   data structure being repaired.</div><div class='add'>+</div><div class='add'>+   - If zero, the block has a single owner and can be freed.</div><div class='add'>+</div><div class='add'>+   - If not, the block is part of a crosslinked structure and must not be</div><div class='add'>+     freed.</div><div class='add'>+</div><div class='add'>+5. Starting with the next block in the extent, figure out how many more blocks</div><div class='add'>+   have the same zero/nonzero other owner status as that first block.</div><div class='add'>+</div><div class='add'>+6. If the region is crosslinked, delete the reverse mapping entry for the</div><div class='add'>+   structure being repaired and move on to the next region.</div><div class='add'>+</div><div class='add'>+7. If the region is to be freed, mark any corresponding buffers in the buffer</div><div class='add'>+   cache as stale to prevent log writeback.</div><div class='add'>+</div><div class='add'>+8. Free the region and move on.</div><div class='add'>+</div><div class='add'>+However, there is one complication to this procedure.</div><div class='add'>+Transactions are of finite size, so the reaping process must be careful to roll</div><div class='add'>+the transactions to avoid overruns.</div><div class='add'>+Overruns come from two sources:</div><div class='add'>+</div><div class='add'>+a. EFIs logged on behalf of space that is no longer occupied</div><div class='add'>+</div><div class='add'>+b. Log items for buffer invalidations</div><div class='add'>+</div><div class='add'>+This is also a window in which a crash during the reaping process can leak</div><div class='add'>+blocks.</div><div class='add'>+As stated earlier, online repair functions use very large transactions to</div><div class='add'>+minimize the chances of this occurring.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`preparation for bulk loading btrees</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-prep-for-bulk-loading&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Case Study: Reaping After a Regular Btree Repair</div><div class='add'>+````````````````````````````````````````````````</div><div class='add'>+</div><div class='add'>+Old reference count and inode btrees are the easiest to reap because they have</div><div class='add'>+rmap records with special owner codes: ``XFS_RMAP_OWN_REFC`` for the refcount</div><div class='add'>+btree, and ``XFS_RMAP_OWN_INOBT`` for the inode and free inode btrees.</div><div class='add'>+Creating a list of extents to reap the old btree blocks is quite simple,</div><div class='add'>+conceptually:</div><div class='add'>+</div><div class='add'>+1. Lock the relevant AGI/AGF header buffers to prevent allocation and frees.</div><div class='add'>+</div><div class='add'>+2. For each reverse mapping record with an rmap owner corresponding to the</div><div class='add'>+   metadata structure being rebuilt, set the corresponding range in a bitmap.</div><div class='add'>+</div><div class='add'>+3. Walk the current data structures that have the same rmap owner.</div><div class='add'>+   For each block visited, clear that range in the above bitmap.</div><div class='add'>+</div><div class='add'>+4. Each set bit in the bitmap represents a block that could be a block from the</div><div class='add'>+   old data structures and hence is a candidate for reaping.</div><div class='add'>+   In other words, ``(rmap_records_owned_by &amp; ~blocks_reachable_by_walk)``</div><div class='add'>+   are the blocks that might be freeable.</div><div class='add'>+</div><div class='add'>+If it is possible to maintain the AGF lock throughout the repair (which is the</div><div class='add'>+common case), then step 2 can be performed at the same time as the reverse</div><div class='add'>+mapping record walk that creates the records for the new btree.</div><div class='add'>+</div><div class='add'>+Case Study: Rebuilding the Free Space Indices</div><div class='add'>+`````````````````````````````````````````````</div><div class='add'>+</div><div class='add'>+The high level process to rebuild the free space indices is:</div><div class='add'>+</div><div class='add'>+1. Walk the reverse mapping records to generate ``struct xfs_alloc_rec_incore``</div><div class='add'>+   records from the gaps in the reverse mapping btree.</div><div class='add'>+</div><div class='add'>+2. Append the records to an xfarray.</div><div class='add'>+</div><div class='add'>+3. Use the ``xfs_btree_bload_compute_geometry`` function to compute the number</div><div class='add'>+   of blocks needed for each new tree.</div><div class='add'>+</div><div class='add'>+4. Allocate the number of blocks computed in the previous step from the free</div><div class='add'>+   space information collected.</div><div class='add'>+</div><div class='add'>+5. Use ``xfs_btree_bload`` to write the xfarray records to btree blocks and</div><div class='add'>+   generate the internal node blocks for the free space by length index.</div><div class='add'>+   Call it again for the free space by block number index.</div><div class='add'>+</div><div class='add'>+6. Commit the locations of the new btree root blocks to the AGF.</div><div class='add'>+</div><div class='add'>+7. Reap the old btree blocks by looking for space that is not recorded by the</div><div class='add'>+   reverse mapping btree, the new free space btrees, or the AGFL.</div><div class='add'>+</div><div class='add'>+Repairing the free space btrees has three key complications over a regular</div><div class='add'>+btree repair:</div><div class='add'>+</div><div class='add'>+First, free space is not explicitly tracked in the reverse mapping records.</div><div class='add'>+Hence, the new free space records must be inferred from gaps in the physical</div><div class='add'>+space component of the keyspace of the reverse mapping btree.</div><div class='add'>+</div><div class='add'>+Second, free space repairs cannot use the common btree reservation code because</div><div class='add'>+new blocks are reserved out of the free space btrees.</div><div class='add'>+This is impossible when repairing the free space btrees themselves.</div><div class='add'>+However, repair holds the AGF buffer lock for the duration of the free space</div><div class='add'>+index reconstruction, so it can use the collected free space information to</div><div class='add'>+supply the blocks for the new free space btrees.</div><div class='add'>+It is not necessary to back each reserved extent with an EFI because the new</div><div class='add'>+free space btrees are constructed in what the ondisk filesystem thinks is</div><div class='add'>+unowned space.</div><div class='add'>+However, if reserving blocks for the new btrees from the collected free space</div><div class='add'>+information changes the number of free space records, repair must re-estimate</div><div class='add'>+the new free space btree geometry with the new record count until the</div><div class='add'>+reservation is sufficient.</div><div class='add'>+As part of committing the new btrees, repair must ensure that reverse mappings</div><div class='add'>+are created for the reserved blocks and that unused reserved blocks are</div><div class='add'>+inserted into the free space btrees.</div><div class='add'>+Deferrred rmap and freeing operations are used to ensure that this transition</div><div class='add'>+is atomic, similar to the other btree repair functions.</div><div class='add'>+</div><div class='add'>+Third, finding the blocks to reap after the repair is not overly</div><div class='add'>+straightforward.</div><div class='add'>+Blocks for the free space btrees and the reverse mapping btrees are supplied by</div><div class='add'>+the AGFL.</div><div class='add'>+Blocks put onto the AGFL have reverse mapping records with the owner</div><div class='add'>+``XFS_RMAP_OWN_AG``.</div><div class='add'>+This ownership is retained when blocks move from the AGFL into the free space</div><div class='add'>+btrees or the reverse mapping btrees.</div><div class='add'>+When repair walks reverse mapping records to synthesize free space records, it</div><div class='add'>+creates a bitmap (``ag_owner_bitmap``) of all the space claimed by</div><div class='add'>+``XFS_RMAP_OWN_AG`` records.</div><div class='add'>+The repair context maintains a second bitmap corresponding to the rmap btree</div><div class='add'>+blocks and the AGFL blocks (``rmap_agfl_bitmap``).</div><div class='add'>+When the walk is complete, the bitmap disunion operation ``(ag_owner_bitmap &amp;</div><div class='add'>+~rmap_agfl_bitmap)`` computes the extents that are used by the old free space</div><div class='add'>+btrees.</div><div class='add'>+These blocks can then be reaped using the methods outlined above.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`AG btree repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-ag-btrees&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+.. _rmap_reap:</div><div class='add'>+</div><div class='add'>+Case Study: Reaping After Repairing Reverse Mapping Btrees</div><div class='add'>+``````````````````````````````````````````````````````````</div><div class='add'>+</div><div class='add'>+Old reverse mapping btrees are less difficult to reap after a repair.</div><div class='add'>+As mentioned in the previous section, blocks on the AGFL, the two free space</div><div class='add'>+btree blocks, and the reverse mapping btree blocks all have reverse mapping</div><div class='add'>+records with ``XFS_RMAP_OWN_AG`` as the owner.</div><div class='add'>+The full process of gathering reverse mapping records and building a new btree</div><div class='add'>+are described in the case study of</div><div class='add'>+:ref:`live rebuilds of rmap data &lt;rmap_repair&gt;`, but a crucial point from that</div><div class='add'>+discussion is that the new rmap btree will not contain any records for the old</div><div class='add'>+rmap btree, nor will the old btree blocks be tracked in the free space btrees.</div><div class='add'>+The list of candidate reaping blocks is computed by setting the bits</div><div class='add'>+corresponding to the gaps in the new rmap btree records, and then clearing the</div><div class='add'>+bits corresponding to extents in the free space btrees and the current AGFL</div><div class='add'>+blocks.</div><div class='add'>+The result ``(new_rmapbt_gaps &amp; ~(agfl | bnobt_records))`` are reaped using the</div><div class='add'>+methods outlined above.</div><div class='add'>+</div><div class='add'>+The rest of the process of rebuildng the reverse mapping btree is discussed</div><div class='add'>+in a separate :ref:`case study&lt;rmap_repair&gt;`.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`AG btree repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-ag-btrees&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Case Study: Rebuilding the AGFL</div><div class='add'>+```````````````````````````````</div><div class='add'>+</div><div class='add'>+The allocation group free block list (AGFL) is repaired as follows:</div><div class='add'>+</div><div class='add'>+1. Create a bitmap for all the space that the reverse mapping data claims is</div><div class='add'>+   owned by ``XFS_RMAP_OWN_AG``.</div><div class='add'>+</div><div class='add'>+2. Subtract the space used by the two free space btrees and the rmap btree.</div><div class='add'>+</div><div class='add'>+3. Subtract any space that the reverse mapping data claims is owned by any</div><div class='add'>+   other owner, to avoid re-adding crosslinked blocks to the AGFL.</div><div class='add'>+</div><div class='add'>+4. Once the AGFL is full, reap any blocks leftover.</div><div class='add'>+</div><div class='add'>+5. The next operation to fix the freelist will right-size the list.</div><div class='add'>+</div><div class='add'>+See `fs/xfs/scrub/agheader_repair.c &lt;https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/fs/xfs/scrub/agheader_repair.c&gt;`_ for more details.</div><div class='add'>+</div><div class='add'>+Inode Record Repairs</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Inode records must be handled carefully, because they have both ondisk records</div><div class='add'>+("dinodes") and an in-memory ("cached") representation.</div><div class='add'>+There is a very high potential for cache coherency issues if online fsck is not</div><div class='add'>+careful to access the ondisk metadata *only* when the ondisk metadata is so</div><div class='add'>+badly damaged that the filesystem cannot load the in-memory representation.</div><div class='add'>+When online fsck wants to open a damaged file for scrubbing, it must use</div><div class='add'>+specialized resource acquisition functions that return either the in-memory</div><div class='add'>+representation *or* a lock on whichever object is necessary to prevent any</div><div class='add'>+update to the ondisk location.</div><div class='add'>+</div><div class='add'>+The only repairs that should be made to the ondisk inode buffers are whatever</div><div class='add'>+is necessary to get the in-core structure loaded.</div><div class='add'>+This means fixing whatever is caught by the inode cluster buffer and inode fork</div><div class='add'>+verifiers, and retrying the ``iget`` operation.</div><div class='add'>+If the second ``iget`` fails, the repair has failed.</div><div class='add'>+</div><div class='add'>+Once the in-memory representation is loaded, repair can lock the inode and can</div><div class='add'>+subject it to comprehensive checks, repairs, and optimizations.</div><div class='add'>+Most inode attributes are easy to check and constrain, or are user-controlled</div><div class='add'>+arbitrary bit patterns; these are both easy to fix.</div><div class='add'>+Dealing with the data and attr fork extent counts and the file block counts is</div><div class='add'>+more complicated, because computing the correct value requires traversing the</div><div class='add'>+forks, or if that fails, leaving the fields invalid and waiting for the fork</div><div class='add'>+fsck functions to run.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`inode</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-inodes&gt;`_</div><div class='add'>+repair series.</div><div class='add'>+</div><div class='add'>+Quota Record Repairs</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+Similar to inodes, quota records ("dquots") also have both ondisk records and</div><div class='add'>+an in-memory representation, and hence are subject to the same cache coherency</div><div class='add'>+issues.</div><div class='add'>+Somewhat confusingly, both are known as dquots in the XFS codebase.</div><div class='add'>+</div><div class='add'>+The only repairs that should be made to the ondisk quota record buffers are</div><div class='add'>+whatever is necessary to get the in-core structure loaded.</div><div class='add'>+Once the in-memory representation is loaded, the only attributes needing</div><div class='add'>+checking are obviously bad limits and timer values.</div><div class='add'>+</div><div class='add'>+Quota usage counters are checked, repaired, and discussed separately in the</div><div class='add'>+section about :ref:`live quotacheck &lt;quotacheck&gt;`.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`quota</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-quota&gt;`_</div><div class='add'>+repair series.</div><div class='add'>+</div><div class='add'>+.. _fscounters:</div><div class='add'>+</div><div class='add'>+Freezing to Fix Summary Counters</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+Filesystem summary counters track availability of filesystem resources such</div><div class='add'>+as free blocks, free inodes, and allocated inodes.</div><div class='add'>+This information could be compiled by walking the free space and inode indexes,</div><div class='add'>+but this is a slow process, so XFS maintains a copy in the ondisk superblock</div><div class='add'>+that should reflect the ondisk metadata, at least when the filesystem has been</div><div class='add'>+unmounted cleanly.</div><div class='add'>+For performance reasons, XFS also maintains incore copies of those counters,</div><div class='add'>+which are key to enabling resource reservations for active transactions.</div><div class='add'>+Writer threads reserve the worst-case quantities of resources from the</div><div class='add'>+incore counter and give back whatever they don't use at commit time.</div><div class='add'>+It is therefore only necessary to serialize on the superblock when the</div><div class='add'>+superblock is being committed to disk.</div><div class='add'>+</div><div class='add'>+The lazy superblock counter feature introduced in XFS v5 took this even further</div><div class='add'>+by training log recovery to recompute the summary counters from the AG headers,</div><div class='add'>+which eliminated the need for most transactions even to touch the superblock.</div><div class='add'>+The only time XFS commits the summary counters is at filesystem unmount.</div><div class='add'>+To reduce contention even further, the incore counter is implemented as a</div><div class='add'>+percpu counter, which means that each CPU is allocated a batch of blocks from a</div><div class='add'>+global incore counter and can satisfy small allocations from the local batch.</div><div class='add'>+</div><div class='add'>+The high-performance nature of the summary counters makes it difficult for</div><div class='add'>+online fsck to check them, since there is no way to quiesce a percpu counter</div><div class='add'>+while the system is running.</div><div class='add'>+Although online fsck can read the filesystem metadata to compute the correct</div><div class='add'>+values of the summary counters, there's no way to hold the value of a percpu</div><div class='add'>+counter stable, so it's quite possible that the counter will be out of date by</div><div class='add'>+the time the walk is complete.</div><div class='add'>+Earlier versions of online scrub would return to userspace with an incomplete</div><div class='add'>+scan flag, but this is not a satisfying outcome for a system administrator.</div><div class='add'>+For repairs, the in-memory counters must be stabilized while walking the</div><div class='add'>+filesystem metadata to get an accurate reading and install it in the percpu</div><div class='add'>+counter.</div><div class='add'>+</div><div class='add'>+To satisfy this requirement, online fsck must prevent other programs in the</div><div class='add'>+system from initiating new writes to the filesystem, it must disable background</div><div class='add'>+garbage collection threads, and it must wait for existing writer programs to</div><div class='add'>+exit the kernel.</div><div class='add'>+Once that has been established, scrub can walk the AG free space indexes, the</div><div class='add'>+inode btrees, and the realtime bitmap to compute the correct value of all</div><div class='add'>+four summary counters.</div><div class='add'>+This is very similar to a filesystem freeze, though not all of the pieces are</div><div class='add'>+necessary:</div><div class='add'>+</div><div class='add'>+- The final freeze state is set one higher than ``SB_FREEZE_COMPLETE`` to</div><div class='add'>+  prevent other threads from thawing the filesystem, or other scrub threads</div><div class='add'>+  from initiating another fscounters freeze.</div><div class='add'>+</div><div class='add'>+- It does not quiesce the log.</div><div class='add'>+</div><div class='add'>+With this code in place, it is now possible to pause the filesystem for just</div><div class='add'>+long enough to check and correct the summary counters.</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Historical Sidebar**:                                                  |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| The initial implementation used the actual VFS filesystem freeze         |</div><div class='add'>+| mechanism to quiesce filesystem activity.                                |</div><div class='add'>+| With the filesystem frozen, it is possible to resolve the counter values |</div><div class='add'>+| with exact precision, but there are many problems with calling the VFS   |</div><div class='add'>+| methods directly:                                                        |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Other programs can unfreeze the filesystem without our knowledge.      |</div><div class='add'>+|   This leads to incorrect scan results and incorrect repairs.            |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Adding an extra lock to prevent others from thawing the filesystem     |</div><div class='add'>+|   required the addition of a ``-&gt;freeze_super`` function to wrap         |</div><div class='add'>+|   ``freeze_fs()``.                                                       |</div><div class='add'>+|   This in turn caused other subtle problems because it turns out that    |</div><div class='add'>+|   the VFS ``freeze_super`` and ``thaw_super`` functions can drop the     |</div><div class='add'>+|   last reference to the VFS superblock, and any subsequent access        |</div><div class='add'>+|   becomes a UAF bug!                                                     |</div><div class='add'>+|   This can happen if the filesystem is unmounted while the underlying    |</div><div class='add'>+|   block device has frozen the filesystem.                                |</div><div class='add'>+|   This problem could be solved by grabbing extra references to the       |</div><div class='add'>+|   superblock, but it felt suboptimal given the other inadequacies of     |</div><div class='add'>+|   this approach.                                                         |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - The log need not be quiesced to check the summary counters, but a VFS  |</div><div class='add'>+|   freeze initiates one anyway.                                           |</div><div class='add'>+|   This adds unnecessary runtime to live fscounter fsck operations.       |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Quiescing the log means that XFS flushes the (possibly incorrect)      |</div><div class='add'>+|   counters to disk as part of cleaning the log.                          |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - A bug in the VFS meant that freeze could complete even when            |</div><div class='add'>+|   sync_filesystem fails to flush the filesystem and returns an error.    |</div><div class='add'>+|   This bug was fixed in Linux 5.17.                                      |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`summary counter cleanup</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-fscounters&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Full Filesystem Scans</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+Certain types of metadata can only be checked by walking every file in the</div><div class='add'>+entire filesystem to record observations and comparing the observations against</div><div class='add'>+what's recorded on disk.</div><div class='add'>+Like every other type of online repair, repairs are made by writing those</div><div class='add'>+observations to disk in a replacement structure and committing it atomically.</div><div class='add'>+However, it is not practical to shut down the entire filesystem to examine</div><div class='add'>+hundreds of billions of files because the downtime would be excessive.</div><div class='add'>+Therefore, online fsck must build the infrastructure to manage a live scan of</div><div class='add'>+all the files in the filesystem.</div><div class='add'>+There are two questions that need to be solved to perform a live walk:</div><div class='add'>+</div><div class='add'>+- How does scrub manage the scan while it is collecting data?</div><div class='add'>+</div><div class='add'>+- How does the scan keep abreast of changes being made to the system by other</div><div class='add'>+  threads?</div><div class='add'>+</div><div class='add'>+.. _iscan:</div><div class='add'>+</div><div class='add'>+Coordinated Inode Scans</div><div class='add'>+```````````````````````</div><div class='add'>+</div><div class='add'>+In the original Unix filesystems of the 1970s, each directory entry contained</div><div class='add'>+an index number (*inumber*) which was used as an index into on ondisk array</div><div class='add'>+(*itable*) of fixed-size records (*inodes*) describing a file's attributes and</div><div class='add'>+its data block mapping.</div><div class='add'>+This system is described by J. Lions, `"inode (5659)"</div><div class='add'>+&lt;http://www.lemis.com/grog/Documentation/Lions/&gt;`_ in *Lions' Commentary on</div><div class='add'>+UNIX, 6th Edition*, (Dept. of Computer Science, the University of New South</div><div class='add'>+Wales, November 1977), pp. 18-2; and later by D. Ritchie and K. Thompson,</div><div class='add'>+`"Implementation of the File System"</div><div class='add'>+&lt;https://archive.org/details/bstj57-6-1905/page/n8/mode/1up&gt;`_, from *The UNIX</div><div class='add'>+Time-Sharing System*, (The Bell System Technical Journal, July 1978), pp.</div><div class='add'>+1913-4.</div><div class='add'>+</div><div class='add'>+XFS retains most of this design, except now inumbers are search keys over all</div><div class='add'>+the space in the data section filesystem.</div><div class='add'>+They form a continuous keyspace that can be expressed as a 64-bit integer,</div><div class='add'>+though the inodes themselves are sparsely distributed within the keyspace.</div><div class='add'>+Scans proceed in a linear fashion across the inumber keyspace, starting from</div><div class='add'>+``0x0`` and ending at ``0xFFFFFFFFFFFFFFFF``.</div><div class='add'>+Naturally, a scan through a keyspace requires a scan cursor object to track the</div><div class='add'>+scan progress.</div><div class='add'>+Because this keyspace is sparse, this cursor contains two parts.</div><div class='add'>+The first part of this scan cursor object tracks the inode that will be</div><div class='add'>+examined next; call this the examination cursor.</div><div class='add'>+Somewhat less obviously, the scan cursor object must also track which parts of</div><div class='add'>+the keyspace have already been visited, which is critical for deciding if a</div><div class='add'>+concurrent filesystem update needs to be incorporated into the scan data.</div><div class='add'>+Call this the visited inode cursor.</div><div class='add'>+</div><div class='add'>+Advancing the scan cursor is a multi-step process encapsulated in</div><div class='add'>+``xchk_iscan_iter``:</div><div class='add'>+</div><div class='add'>+1. Lock the AGI buffer of the AG containing the inode pointed to by the visited</div><div class='add'>+   inode cursor.</div><div class='add'>+   This guarantee that inodes in this AG cannot be allocated or freed while</div><div class='add'>+   advancing the cursor.</div><div class='add'>+</div><div class='add'>+2. Use the per-AG inode btree to look up the next inumber after the one that</div><div class='add'>+   was just visited, since it may not be keyspace adjacent.</div><div class='add'>+</div><div class='add'>+3. If there are no more inodes left in this AG:</div><div class='add'>+</div><div class='add'>+   a. Move the examination cursor to the point of the inumber keyspace that</div><div class='add'>+      corresponds to the start of the next AG.</div><div class='add'>+</div><div class='add'>+   b. Adjust the visited inode cursor to indicate that it has "visited" the</div><div class='add'>+      last possible inode in the current AG's inode keyspace.</div><div class='add'>+      XFS inumbers are segmented, so the cursor needs to be marked as having</div><div class='add'>+      visited the entire keyspace up to just before the start of the next AG's</div><div class='add'>+      inode keyspace.</div><div class='add'>+</div><div class='add'>+   c. Unlock the AGI and return to step 1 if there are unexamined AGs in the</div><div class='add'>+      filesystem.</div><div class='add'>+</div><div class='add'>+   d. If there are no more AGs to examine, set both cursors to the end of the</div><div class='add'>+      inumber keyspace.</div><div class='add'>+      The scan is now complete.</div><div class='add'>+</div><div class='add'>+4. Otherwise, there is at least one more inode to scan in this AG:</div><div class='add'>+</div><div class='add'>+   a. Move the examination cursor ahead to the next inode marked as allocated</div><div class='add'>+      by the inode btree.</div><div class='add'>+</div><div class='add'>+   b. Adjust the visited inode cursor to point to the inode just prior to where</div><div class='add'>+      the examination cursor is now.</div><div class='add'>+      Because the scanner holds the AGI buffer lock, no inodes could have been</div><div class='add'>+      created in the part of the inode keyspace that the visited inode cursor</div><div class='add'>+      just advanced.</div><div class='add'>+</div><div class='add'>+5. Get the incore inode for the inumber of the examination cursor.</div><div class='add'>+   By maintaining the AGI buffer lock until this point, the scanner knows that</div><div class='add'>+   it was safe to advance the examination cursor across the entire keyspace,</div><div class='add'>+   and that it has stabilized this next inode so that it cannot disappear from</div><div class='add'>+   the filesystem until the scan releases the incore inode.</div><div class='add'>+</div><div class='add'>+6. Drop the AGI lock and return the incore inode to the caller.</div><div class='add'>+</div><div class='add'>+Online fsck functions scan all files in the filesystem as follows:</div><div class='add'>+</div><div class='add'>+1. Start a scan by calling ``xchk_iscan_start``.</div><div class='add'>+</div><div class='add'>+2. Advance the scan cursor (``xchk_iscan_iter``) to get the next inode.</div><div class='add'>+   If one is provided:</div><div class='add'>+</div><div class='add'>+   a. Lock the inode to prevent updates during the scan.</div><div class='add'>+</div><div class='add'>+   b. Scan the inode.</div><div class='add'>+</div><div class='add'>+   c. While still holding the inode lock, adjust the visited inode cursor</div><div class='add'>+      (``xchk_iscan_mark_visited``) to point to this inode.</div><div class='add'>+</div><div class='add'>+   d. Unlock and release the inode.</div><div class='add'>+</div><div class='add'>+8. Call ``xchk_iscan_teardown`` to complete the scan.</div><div class='add'>+</div><div class='add'>+There are subtleties with the inode cache that complicate grabbing the incore</div><div class='add'>+inode for the caller.</div><div class='add'>+Obviously, it is an absolute requirement that the inode metadata be consistent</div><div class='add'>+enough to load it into the inode cache.</div><div class='add'>+Second, if the incore inode is stuck in some intermediate state, the scan</div><div class='add'>+coordinator must release the AGI and push the main filesystem to get the inode</div><div class='add'>+back into a loadable state.</div><div class='add'>+</div><div class='add'>+The proposed patches are the</div><div class='add'>+`inode scanner</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-iscan&gt;`_</div><div class='add'>+series.</div><div class='add'>+The first user of the new functionality is the</div><div class='add'>+`online quotacheck</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-quotacheck&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Inode Management</div><div class='add'>+````````````````</div><div class='add'>+</div><div class='add'>+In regular filesystem code, references to allocated XFS incore inodes are</div><div class='add'>+always obtained (``xfs_iget``) outside of transaction context because the</div><div class='add'>+creation of the incore context for an existing file does not require metadata</div><div class='add'>+updates.</div><div class='add'>+However, it is important to note that references to incore inodes obtained as</div><div class='add'>+part of file creation must be performed in transaction context because the</div><div class='add'>+filesystem must ensure the atomicity of the ondisk inode btree index updates</div><div class='add'>+and the initialization of the actual ondisk inode.</div><div class='add'>+</div><div class='add'>+References to incore inodes are always released (``xfs_irele``) outside of</div><div class='add'>+transaction context because there are a handful of activities that might</div><div class='add'>+require ondisk updates:</div><div class='add'>+</div><div class='add'>+- The VFS may decide to kick off writeback as part of a ``DONTCACHE`` inode</div><div class='add'>+  release.</div><div class='add'>+</div><div class='add'>+- Speculative preallocations need to be unreserved.</div><div class='add'>+</div><div class='add'>+- An unlinked file may have lost its last reference, in which case the entire</div><div class='add'>+  file must be inactivated, which involves releasing all of its resources in</div><div class='add'>+  the ondisk metadata and freeing the inode.</div><div class='add'>+</div><div class='add'>+These activities are collectively called inode inactivation.</div><div class='add'>+Inactivation has two parts -- the VFS part, which initiates writeback on all</div><div class='add'>+dirty file pages, and the XFS part, which cleans up XFS-specific information</div><div class='add'>+and frees the inode if it was unlinked.</div><div class='add'>+If the inode is unlinked (or unconnected after a file handle operation), the</div><div class='add'>+kernel drops the inode into the inactivation machinery immediately.</div><div class='add'>+</div><div class='add'>+During normal operation, resource acquisition for an update follows this order</div><div class='add'>+to avoid deadlocks:</div><div class='add'>+</div><div class='add'>+1. Inode reference (``iget``).</div><div class='add'>+</div><div class='add'>+2. Filesystem freeze protection, if repairing (``mnt_want_write_file``).</div><div class='add'>+</div><div class='add'>+3. Inode ``IOLOCK`` (VFS ``i_rwsem``) lock to control file IO.</div><div class='add'>+</div><div class='add'>+4. Inode ``MMAPLOCK`` (page cache ``invalidate_lock``) lock for operations that</div><div class='add'>+   can update page cache mappings.</div><div class='add'>+</div><div class='add'>+5. Log feature enablement.</div><div class='add'>+</div><div class='add'>+6. Transaction log space grant.</div><div class='add'>+</div><div class='add'>+7. Space on the data and realtime devices for the transaction.</div><div class='add'>+</div><div class='add'>+8. Incore dquot references, if a file is being repaired.</div><div class='add'>+   Note that they are not locked, merely acquired.</div><div class='add'>+</div><div class='add'>+9. Inode ``ILOCK`` for file metadata updates.</div><div class='add'>+</div><div class='add'>+10. AG header buffer locks / Realtime metadata inode ILOCK.</div><div class='add'>+</div><div class='add'>+11. Realtime metadata buffer locks, if applicable.</div><div class='add'>+</div><div class='add'>+12. Extent mapping btree blocks, if applicable.</div><div class='add'>+</div><div class='add'>+Resources are often released in the reverse order, though this is not required.</div><div class='add'>+However, online fsck differs from regular XFS operations because it may examine</div><div class='add'>+an object that normally is acquired in a later stage of the locking order, and</div><div class='add'>+then decide to cross-reference the object with an object that is acquired</div><div class='add'>+earlier in the order.</div><div class='add'>+The next few sections detail the specific ways in which online fsck takes care</div><div class='add'>+to avoid deadlocks.</div><div class='add'>+</div><div class='add'>+iget and irele During a Scrub</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+An inode scan performed on behalf of a scrub operation runs in transaction</div><div class='add'>+context, and possibly with resources already locked and bound to it.</div><div class='add'>+This isn't much of a problem for ``iget`` since it can operate in the context</div><div class='add'>+of an existing transaction, as long as all of the bound resources are acquired</div><div class='add'>+before the inode reference in the regular filesystem.</div><div class='add'>+</div><div class='add'>+When the VFS ``iput`` function is given a linked inode with no other</div><div class='add'>+references, it normally puts the inode on an LRU list in the hope that it can</div><div class='add'>+save time if another process re-opens the file before the system runs out</div><div class='add'>+of memory and frees it.</div><div class='add'>+Filesystem callers can short-circuit the LRU process by setting a ``DONTCACHE``</div><div class='add'>+flag on the inode to cause the kernel to try to drop the inode into the</div><div class='add'>+inactivation machinery immediately.</div><div class='add'>+</div><div class='add'>+In the past, inactivation was always done from the process that dropped the</div><div class='add'>+inode, which was a problem for scrub because scrub may already hold a</div><div class='add'>+transaction, and XFS does not support nesting transactions.</div><div class='add'>+On the other hand, if there is no scrub transaction, it is desirable to drop</div><div class='add'>+otherwise unused inodes immediately to avoid polluting caches.</div><div class='add'>+To capture these nuances, the online fsck code has a separate ``xchk_irele``</div><div class='add'>+function to set or clear the ``DONTCACHE`` flag to get the required release</div><div class='add'>+behavior.</div><div class='add'>+</div><div class='add'>+Proposed patchsets include fixing</div><div class='add'>+`scrub iget usage</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-iget-fixes&gt;`_ and</div><div class='add'>+`dir iget usage</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-dir-iget-fixes&gt;`_.</div><div class='add'>+</div><div class='add'>+.. _ilocking:</div><div class='add'>+</div><div class='add'>+Locking Inodes</div><div class='add'>+^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+In regular filesystem code, the VFS and XFS will acquire multiple IOLOCK locks</div><div class='add'>+in a well-known order: parent → child when updating the directory tree, and</div><div class='add'>+in numerical order of the addresses of their ``struct inode`` object otherwise.</div><div class='add'>+For regular files, the MMAPLOCK can be acquired after the IOLOCK to stop page</div><div class='add'>+faults.</div><div class='add'>+If two MMAPLOCKs must be acquired, they are acquired in numerical order of</div><div class='add'>+the addresses of their ``struct address_space`` objects.</div><div class='add'>+Due to the structure of existing filesystem code, IOLOCKs and MMAPLOCKs must be</div><div class='add'>+acquired before transactions are allocated.</div><div class='add'>+If two ILOCKs must be acquired, they are acquired in inumber order.</div><div class='add'>+</div><div class='add'>+Inode lock acquisition must be done carefully during a coordinated inode scan.</div><div class='add'>+Online fsck cannot abide these conventions, because for a directory tree</div><div class='add'>+scanner, the scrub process holds the IOLOCK of the file being scanned and it</div><div class='add'>+needs to take the IOLOCK of the file at the other end of the directory link.</div><div class='add'>+If the directory tree is corrupt because it contains a cycle, ``xfs_scrub``</div><div class='add'>+cannot use the regular inode locking functions and avoid becoming trapped in an</div><div class='add'>+ABBA deadlock.</div><div class='add'>+</div><div class='add'>+Solving both of these problems is straightforward -- any time online fsck</div><div class='add'>+needs to take a second lock of the same class, it uses trylock to avoid an ABBA</div><div class='add'>+deadlock.</div><div class='add'>+If the trylock fails, scrub drops all inode locks and use trylock loops to</div><div class='add'>+(re)acquire all necessary resources.</div><div class='add'>+Trylock loops enable scrub to check for pending fatal signals, which is how</div><div class='add'>+scrub avoids deadlocking the filesystem or becoming an unresponsive process.</div><div class='add'>+However, trylock loops means that online fsck must be prepared to measure the</div><div class='add'>+resource being scrubbed before and after the lock cycle to detect changes and</div><div class='add'>+react accordingly.</div><div class='add'>+</div><div class='add'>+.. _dirparent:</div><div class='add'>+</div><div class='add'>+Case Study: Finding a Directory Parent</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Consider the directory parent pointer repair code as an example.</div><div class='add'>+Online fsck must verify that the dotdot dirent of a directory points up to a</div><div class='add'>+parent directory, and that the parent directory contains exactly one dirent</div><div class='add'>+pointing down to the child directory.</div><div class='add'>+Fully validating this relationship (and repairing it if possible) requires a</div><div class='add'>+walk of every directory on the filesystem while holding the child locked, and</div><div class='add'>+while updates to the directory tree are being made.</div><div class='add'>+The coordinated inode scan provides a way to walk the filesystem without the</div><div class='add'>+possibility of missing an inode.</div><div class='add'>+The child directory is kept locked to prevent updates to the dotdot dirent, but</div><div class='add'>+if the scanner fails to lock a parent, it can drop and relock both the child</div><div class='add'>+and the prospective parent.</div><div class='add'>+If the dotdot entry changes while the directory is unlocked, then a move or</div><div class='add'>+rename operation must have changed the child's parentage, and the scan can</div><div class='add'>+exit early.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`directory repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-dirs&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+.. _fshooks:</div><div class='add'>+</div><div class='add'>+Filesystem Hooks</div><div class='add'>+`````````````````</div><div class='add'>+</div><div class='add'>+The second piece of support that online fsck functions need during a full</div><div class='add'>+filesystem scan is the ability to stay informed about updates being made by</div><div class='add'>+other threads in the filesystem, since comparisons against the past are useless</div><div class='add'>+in a dynamic environment.</div><div class='add'>+Two pieces of Linux kernel infrastructure enable online fsck to monitor regular</div><div class='add'>+filesystem operations: filesystem hooks and :ref:`static keys&lt;jump_labels&gt;`.</div><div class='add'>+</div><div class='add'>+Filesystem hooks convey information about an ongoing filesystem operation to</div><div class='add'>+a downstream consumer.</div><div class='add'>+In this case, the downstream consumer is always an online fsck function.</div><div class='add'>+Because multiple fsck functions can run in parallel, online fsck uses the Linux</div><div class='add'>+notifier call chain facility to dispatch updates to any number of interested</div><div class='add'>+fsck processes.</div><div class='add'>+Call chains are a dynamic list, which means that they can be configured at</div><div class='add'>+run time.</div><div class='add'>+Because these hooks are private to the XFS module, the information passed along</div><div class='add'>+contains exactly what the checking function needs to update its observations.</div><div class='add'>+</div><div class='add'>+The current implementation of XFS hooks uses SRCU notifier chains to reduce the</div><div class='add'>+impact to highly threaded workloads.</div><div class='add'>+Regular blocking notifier chains use a rwsem and seem to have a much lower</div><div class='add'>+overhead for single-threaded applications.</div><div class='add'>+However, it may turn out that the combination of blocking chains and static</div><div class='add'>+keys are a more performant combination; more study is needed here.</div><div class='add'>+</div><div class='add'>+The following pieces are necessary to hook a certain point in the filesystem:</div><div class='add'>+</div><div class='add'>+- A ``struct xfs_hooks`` object must be embedded in a convenient place such as</div><div class='add'>+  a well-known incore filesystem object.</div><div class='add'>+</div><div class='add'>+- Each hook must define an action code and a structure containing more context</div><div class='add'>+  about the action.</div><div class='add'>+</div><div class='add'>+- Hook providers should provide appropriate wrapper functions and structs</div><div class='add'>+  around the ``xfs_hooks`` and ``xfs_hook`` objects to take advantage of type</div><div class='add'>+  checking to ensure correct usage.</div><div class='add'>+</div><div class='add'>+- A callsite in the regular filesystem code must be chosen to call</div><div class='add'>+  ``xfs_hooks_call`` with the action code and data structure.</div><div class='add'>+  This place should be adjacent to (and not earlier than) the place where</div><div class='add'>+  the filesystem update is committed to the transaction.</div><div class='add'>+  In general, when the filesystem calls a hook chain, it should be able to</div><div class='add'>+  handle sleeping and should not be vulnerable to memory reclaim or locking</div><div class='add'>+  recursion.</div><div class='add'>+  However, the exact requirements are very dependent on the context of the hook</div><div class='add'>+  caller and the callee.</div><div class='add'>+</div><div class='add'>+- The online fsck function should define a structure to hold scan data, a lock</div><div class='add'>+  to coordinate access to the scan data, and a ``struct xfs_hook`` object.</div><div class='add'>+  The scanner function and the regular filesystem code must acquire resources</div><div class='add'>+  in the same order; see the next section for details.</div><div class='add'>+</div><div class='add'>+- The online fsck code must contain a C function to catch the hook action code</div><div class='add'>+  and data structure.</div><div class='add'>+  If the object being updated has already been visited by the scan, then the</div><div class='add'>+  hook information must be applied to the scan data.</div><div class='add'>+</div><div class='add'>+- Prior to unlocking inodes to start the scan, online fsck must call</div><div class='add'>+  ``xfs_hooks_setup`` to initialize the ``struct xfs_hook``, and</div><div class='add'>+  ``xfs_hooks_add`` to enable the hook.</div><div class='add'>+</div><div class='add'>+- Online fsck must call ``xfs_hooks_del`` to disable the hook once the scan is</div><div class='add'>+  complete.</div><div class='add'>+</div><div class='add'>+The number of hooks should be kept to a minimum to reduce complexity.</div><div class='add'>+Static keys are used to reduce the overhead of filesystem hooks to nearly</div><div class='add'>+zero when online fsck is not running.</div><div class='add'>+</div><div class='add'>+.. _liveupdate:</div><div class='add'>+</div><div class='add'>+Live Updates During a Scan</div><div class='add'>+``````````````````````````</div><div class='add'>+</div><div class='add'>+The code paths of the online fsck scanning code and the :ref:`hooked&lt;fshooks&gt;`</div><div class='add'>+filesystem code look like this::</div><div class='add'>+</div><div class='add'>+            other program</div><div class='add'>+                  ↓</div><div class='add'>+            inode lock ←────────────────────┐</div><div class='add'>+                  ↓                         │</div><div class='add'>+            AG header lock                  │</div><div class='add'>+                  ↓                         │</div><div class='add'>+            filesystem function             │</div><div class='add'>+                  ↓                         │</div><div class='add'>+            notifier call chain             │    same</div><div class='add'>+                  ↓                         ├─── inode</div><div class='add'>+            scrub hook function             │    lock</div><div class='add'>+                  ↓                         │</div><div class='add'>+            scan data mutex ←──┐    same    │</div><div class='add'>+                  ↓            ├─── scan    │</div><div class='add'>+            update scan data   │    lock    │</div><div class='add'>+                  ↑            │            │</div><div class='add'>+            scan data mutex ←──┘            │</div><div class='add'>+                  ↑                         │</div><div class='add'>+            inode lock ←────────────────────┘</div><div class='add'>+                  ↑</div><div class='add'>+            scrub function</div><div class='add'>+                  ↑</div><div class='add'>+            inode scanner</div><div class='add'>+                  ↑</div><div class='add'>+            xfs_scrub</div><div class='add'>+</div><div class='add'>+These rules must be followed to ensure correct interactions between the</div><div class='add'>+checking code and the code making an update to the filesystem:</div><div class='add'>+</div><div class='add'>+- Prior to invoking the notifier call chain, the filesystem function being</div><div class='add'>+  hooked must acquire the same lock that the scrub scanning function acquires</div><div class='add'>+  to scan the inode.</div><div class='add'>+</div><div class='add'>+- The scanning function and the scrub hook function must coordinate access to</div><div class='add'>+  the scan data by acquiring a lock on the scan data.</div><div class='add'>+</div><div class='add'>+- Scrub hook function must not add the live update information to the scan</div><div class='add'>+  observations unless the inode being updated has already been scanned.</div><div class='add'>+  The scan coordinator has a helper predicate (``xchk_iscan_want_live_update``)</div><div class='add'>+  for this.</div><div class='add'>+</div><div class='add'>+- Scrub hook functions must not change the caller's state, including the</div><div class='add'>+  transaction that it is running.</div><div class='add'>+  They must not acquire any resources that might conflict with the filesystem</div><div class='add'>+  function being hooked.</div><div class='add'>+</div><div class='add'>+- The hook function can abort the inode scan to avoid breaking the other rules.</div><div class='add'>+</div><div class='add'>+The inode scan APIs are pretty simple:</div><div class='add'>+</div><div class='add'>+- ``xchk_iscan_start`` starts a scan</div><div class='add'>+</div><div class='add'>+- ``xchk_iscan_iter`` grabs a reference to the next inode in the scan or</div><div class='add'>+  returns zero if there is nothing left to scan</div><div class='add'>+</div><div class='add'>+- ``xchk_iscan_want_live_update`` to decide if an inode has already been</div><div class='add'>+  visited in the scan.</div><div class='add'>+  This is critical for hook functions to decide if they need to update the</div><div class='add'>+  in-memory scan information.</div><div class='add'>+</div><div class='add'>+- ``xchk_iscan_mark_visited`` to mark an inode as having been visited in the</div><div class='add'>+  scan</div><div class='add'>+</div><div class='add'>+- ``xchk_iscan_teardown`` to finish the scan</div><div class='add'>+</div><div class='add'>+This functionality is also a part of the</div><div class='add'>+`inode scanner</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-iscan&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+.. _quotacheck:</div><div class='add'>+</div><div class='add'>+Case Study: Quota Counter Checking</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+It is useful to compare the mount time quotacheck code to the online repair</div><div class='add'>+quotacheck code.</div><div class='add'>+Mount time quotacheck does not have to contend with concurrent operations, so</div><div class='add'>+it does the following:</div><div class='add'>+</div><div class='add'>+1. Make sure the ondisk dquots are in good enough shape that all the incore</div><div class='add'>+   dquots will actually load, and zero the resource usage counters in the</div><div class='add'>+   ondisk buffer.</div><div class='add'>+</div><div class='add'>+2. Walk every inode in the filesystem.</div><div class='add'>+   Add each file's resource usage to the incore dquot.</div><div class='add'>+</div><div class='add'>+3. Walk each incore dquot.</div><div class='add'>+   If the incore dquot is not being flushed, add the ondisk buffer backing the</div><div class='add'>+   incore dquot to a delayed write (delwri) list.</div><div class='add'>+</div><div class='add'>+4. Write the buffer list to disk.</div><div class='add'>+</div><div class='add'>+Like most online fsck functions, online quotacheck can't write to regular</div><div class='add'>+filesystem objects until the newly collected metadata reflect all filesystem</div><div class='add'>+state.</div><div class='add'>+Therefore, online quotacheck records file resource usage to a shadow dquot</div><div class='add'>+index implemented with a sparse ``xfarray``, and only writes to the real dquots</div><div class='add'>+once the scan is complete.</div><div class='add'>+Handling transactional updates is tricky because quota resource usage updates</div><div class='add'>+are handled in phases to minimize contention on dquots:</div><div class='add'>+</div><div class='add'>+1. The inodes involved are joined and locked to a transaction.</div><div class='add'>+</div><div class='add'>+2. For each dquot attached to the file:</div><div class='add'>+</div><div class='add'>+   a. The dquot is locked.</div><div class='add'>+</div><div class='add'>+   b. A quota reservation is added to the dquot's resource usage.</div><div class='add'>+      The reservation is recorded in the transaction.</div><div class='add'>+</div><div class='add'>+   c. The dquot is unlocked.</div><div class='add'>+</div><div class='add'>+3. Changes in actual quota usage are tracked in the transaction.</div><div class='add'>+</div><div class='add'>+4. At transaction commit time, each dquot is examined again:</div><div class='add'>+</div><div class='add'>+   a. The dquot is locked again.</div><div class='add'>+</div><div class='add'>+   b. Quota usage changes are logged and unused reservation is given back to</div><div class='add'>+      the dquot.</div><div class='add'>+</div><div class='add'>+   c. The dquot is unlocked.</div><div class='add'>+</div><div class='add'>+For online quotacheck, hooks are placed in steps 2 and 4.</div><div class='add'>+The step 2 hook creates a shadow version of the transaction dquot context</div><div class='add'>+(``dqtrx``) that operates in a similar manner to the regular code.</div><div class='add'>+The step 4 hook commits the shadow ``dqtrx`` changes to the shadow dquots.</div><div class='add'>+Notice that both hooks are called with the inode locked, which is how the</div><div class='add'>+live update coordinates with the inode scanner.</div><div class='add'>+</div><div class='add'>+The quotacheck scan looks like this:</div><div class='add'>+</div><div class='add'>+1. Set up a coordinated inode scan.</div><div class='add'>+</div><div class='add'>+2. For each inode returned by the inode scan iterator:</div><div class='add'>+</div><div class='add'>+   a. Grab and lock the inode.</div><div class='add'>+</div><div class='add'>+   b. Determine that inode's resource usage (data blocks, inode counts,</div><div class='add'>+      realtime blocks) and add that to the shadow dquots for the user, group,</div><div class='add'>+      and project ids associated with the inode.</div><div class='add'>+</div><div class='add'>+   c. Unlock and release the inode.</div><div class='add'>+</div><div class='add'>+3. For each dquot in the system:</div><div class='add'>+</div><div class='add'>+   a. Grab and lock the dquot.</div><div class='add'>+</div><div class='add'>+   b. Check the dquot against the shadow dquots created by the scan and updated</div><div class='add'>+      by the live hooks.</div><div class='add'>+</div><div class='add'>+Live updates are key to being able to walk every quota record without</div><div class='add'>+needing to hold any locks for a long duration.</div><div class='add'>+If repairs are desired, the real and shadow dquots are locked and their</div><div class='add'>+resource counts are set to the values in the shadow dquot.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`online quotacheck</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-quotacheck&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+.. _nlinks:</div><div class='add'>+</div><div class='add'>+Case Study: File Link Count Checking</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+File link count checking also uses live update hooks.</div><div class='add'>+The coordinated inode scanner is used to visit all directories on the</div><div class='add'>+filesystem, and per-file link count records are stored in a sparse ``xfarray``</div><div class='add'>+indexed by inumber.</div><div class='add'>+During the scanning phase, each entry in a directory generates observation</div><div class='add'>+data as follows:</div><div class='add'>+</div><div class='add'>+1. If the entry is a dotdot (``'..'``) entry of the root directory, the</div><div class='add'>+   directory's parent link count is bumped because the root directory's dotdot</div><div class='add'>+   entry is self referential.</div><div class='add'>+</div><div class='add'>+2. If the entry is a dotdot entry of a subdirectory, the parent's backref</div><div class='add'>+   count is bumped.</div><div class='add'>+</div><div class='add'>+3. If the entry is neither a dot nor a dotdot entry, the target file's parent</div><div class='add'>+   count is bumped.</div><div class='add'>+</div><div class='add'>+4. If the target is a subdirectory, the parent's child link count is bumped.</div><div class='add'>+</div><div class='add'>+A crucial point to understand about how the link count inode scanner interacts</div><div class='add'>+with the live update hooks is that the scan cursor tracks which *parent*</div><div class='add'>+directories have been scanned.</div><div class='add'>+In other words, the live updates ignore any update about ``A → B`` when A has</div><div class='add'>+not been scanned, even if B has been scanned.</div><div class='add'>+Furthermore, a subdirectory A with a dotdot entry pointing back to B is</div><div class='add'>+accounted as a backref counter in the shadow data for A, since child dotdot</div><div class='add'>+entries affect the parent's link count.</div><div class='add'>+Live update hooks are carefully placed in all parts of the filesystem that</div><div class='add'>+create, change, or remove directory entries, since those operations involve</div><div class='add'>+bumplink and droplink.</div><div class='add'>+</div><div class='add'>+For any file, the correct link count is the number of parents plus the number</div><div class='add'>+of child subdirectories.</div><div class='add'>+Non-directories never have children of any kind.</div><div class='add'>+The backref information is used to detect inconsistencies in the number of</div><div class='add'>+links pointing to child subdirectories and the number of dotdot entries</div><div class='add'>+pointing back.</div><div class='add'>+</div><div class='add'>+After the scan completes, the link count of each file can be checked by locking</div><div class='add'>+both the inode and the shadow data, and comparing the link counts.</div><div class='add'>+A second coordinated inode scan cursor is used for comparisons.</div><div class='add'>+Live updates are key to being able to walk every inode without needing to hold</div><div class='add'>+any locks between inodes.</div><div class='add'>+If repairs are desired, the inode's link count is set to the value in the</div><div class='add'>+shadow information.</div><div class='add'>+If no parents are found, the file must be :ref:`reparented &lt;orphanage&gt;` to the</div><div class='add'>+orphanage to prevent the file from being lost forever.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`file link count repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=scrub-nlinks&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+.. _rmap_repair:</div><div class='add'>+</div><div class='add'>+Case Study: Rebuilding Reverse Mapping Records</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Most repair functions follow the same pattern: lock filesystem resources,</div><div class='add'>+walk the surviving ondisk metadata looking for replacement metadata records,</div><div class='add'>+and use an :ref:`in-memory array &lt;xfarray&gt;` to store the gathered observations.</div><div class='add'>+The primary advantage of this approach is the simplicity and modularity of the</div><div class='add'>+repair code -- code and data are entirely contained within the scrub module,</div><div class='add'>+do not require hooks in the main filesystem, and are usually the most efficient</div><div class='add'>+in memory use.</div><div class='add'>+A secondary advantage of this repair approach is atomicity -- once the kernel</div><div class='add'>+decides a structure is corrupt, no other threads can access the metadata until</div><div class='add'>+the kernel finishes repairing and revalidating the metadata.</div><div class='add'>+</div><div class='add'>+For repairs going on within a shard of the filesystem, these advantages</div><div class='add'>+outweigh the delays inherent in locking the shard while repairing parts of the</div><div class='add'>+shard.</div><div class='add'>+Unfortunately, repairs to the reverse mapping btree cannot use the "standard"</div><div class='add'>+btree repair strategy because it must scan every space mapping of every fork of</div><div class='add'>+every file in the filesystem, and the filesystem cannot stop.</div><div class='add'>+Therefore, rmap repair foregoes atomicity between scrub and repair.</div><div class='add'>+It combines a :ref:`coordinated inode scanner &lt;iscan&gt;`, :ref:`live update hooks</div><div class='add'>+&lt;liveupdate&gt;`, and an :ref:`in-memory rmap btree &lt;xfbtree&gt;` to complete the</div><div class='add'>+scan for reverse mapping records.</div><div class='add'>+</div><div class='add'>+1. Set up an xfbtree to stage rmap records.</div><div class='add'>+</div><div class='add'>+2. While holding the locks on the AGI and AGF buffers acquired during the</div><div class='add'>+   scrub, generate reverse mappings for all AG metadata: inodes, btrees, CoW</div><div class='add'>+   staging extents, and the internal log.</div><div class='add'>+</div><div class='add'>+3. Set up an inode scanner.</div><div class='add'>+</div><div class='add'>+4. Hook into rmap updates for the AG being repaired so that the live scan data</div><div class='add'>+   can receive updates to the rmap btree from the rest of the filesystem during</div><div class='add'>+   the file scan.</div><div class='add'>+</div><div class='add'>+5. For each space mapping found in either fork of each file scanned,</div><div class='add'>+   decide if the mapping matches the AG of interest.</div><div class='add'>+   If so:</div><div class='add'>+</div><div class='add'>+   a. Create a btree cursor for the in-memory btree.</div><div class='add'>+</div><div class='add'>+   b. Use the rmap code to add the record to the in-memory btree.</div><div class='add'>+</div><div class='add'>+   c. Use the :ref:`special commit function &lt;xfbtree_commit&gt;` to write the</div><div class='add'>+      xfbtree changes to the xfile.</div><div class='add'>+</div><div class='add'>+6. For each live update received via the hook, decide if the owner has already</div><div class='add'>+   been scanned.</div><div class='add'>+   If so, apply the live update into the scan data:</div><div class='add'>+</div><div class='add'>+   a. Create a btree cursor for the in-memory btree.</div><div class='add'>+</div><div class='add'>+   b. Replay the operation into the in-memory btree.</div><div class='add'>+</div><div class='add'>+   c. Use the :ref:`special commit function &lt;xfbtree_commit&gt;` to write the</div><div class='add'>+      xfbtree changes to the xfile.</div><div class='add'>+      This is performed with an empty transaction to avoid changing the</div><div class='add'>+      caller's state.</div><div class='add'>+</div><div class='add'>+7. When the inode scan finishes, create a new scrub transaction and relock the</div><div class='add'>+   two AG headers.</div><div class='add'>+</div><div class='add'>+8. Compute the new btree geometry using the number of rmap records in the</div><div class='add'>+   shadow btree, like all other btree rebuilding functions.</div><div class='add'>+</div><div class='add'>+9. Allocate the number of blocks computed in the previous step.</div><div class='add'>+</div><div class='add'>+10. Perform the usual btree bulk loading and commit to install the new rmap</div><div class='add'>+    btree.</div><div class='add'>+</div><div class='add'>+11. Reap the old rmap btree blocks as discussed in the case study about how</div><div class='add'>+    to :ref:`reap after rmap btree repair &lt;rmap_reap&gt;`.</div><div class='add'>+</div><div class='add'>+12. Free the xfbtree now that it not needed.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`rmap repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-rmap-btree&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Staging Repairs with Temporary Files on Disk</div><div class='add'>+--------------------------------------------</div><div class='add'>+</div><div class='add'>+XFS stores a substantial amount of metadata in file forks: directories,</div><div class='add'>+extended attributes, symbolic link targets, free space bitmaps and summary</div><div class='add'>+information for the realtime volume, and quota records.</div><div class='add'>+File forks map 64-bit logical file fork space extents to physical storage space</div><div class='add'>+extents, similar to how a memory management unit maps 64-bit virtual addresses</div><div class='add'>+to physical memory addresses.</div><div class='add'>+Therefore, file-based tree structures (such as directories and extended</div><div class='add'>+attributes) use blocks mapped in the file fork offset address space that point</div><div class='add'>+to other blocks mapped within that same address space, and file-based linear</div><div class='add'>+structures (such as bitmaps and quota records) compute array element offsets in</div><div class='add'>+the file fork offset address space.</div><div class='add'>+</div><div class='add'>+Because file forks can consume as much space as the entire filesystem, repairs</div><div class='add'>+cannot be staged in memory, even when a paging scheme is available.</div><div class='add'>+Therefore, online repair of file-based metadata createas a temporary file in</div><div class='add'>+the XFS filesystem, writes a new structure at the correct offsets into the</div><div class='add'>+temporary file, and atomically swaps the fork mappings (and hence the fork</div><div class='add'>+contents) to commit the repair.</div><div class='add'>+Once the repair is complete, the old fork can be reaped as necessary; if the</div><div class='add'>+system goes down during the reap, the iunlink code will delete the blocks</div><div class='add'>+during log recovery.</div><div class='add'>+</div><div class='add'>+**Note**: All space usage and inode indices in the filesystem *must* be</div><div class='add'>+consistent to use a temporary file safely!</div><div class='add'>+This dependency is the reason why online repair can only use pageable kernel</div><div class='add'>+memory to stage ondisk space usage information.</div><div class='add'>+</div><div class='add'>+Swapping metadata extents with a temporary file requires the owner field of the</div><div class='add'>+block headers to match the file being repaired and not the temporary file.  The</div><div class='add'>+directory, extended attribute, and symbolic link functions were all modified to</div><div class='add'>+allow callers to specify owner numbers explicitly.</div><div class='add'>+</div><div class='add'>+There is a downside to the reaping process -- if the system crashes during the</div><div class='add'>+reap phase and the fork extents are crosslinked, the iunlink processing will</div><div class='add'>+fail because freeing space will find the extra reverse mappings and abort.</div><div class='add'>+</div><div class='add'>+Temporary files created for repair are similar to ``O_TMPFILE`` files created</div><div class='add'>+by userspace.</div><div class='add'>+They are not linked into a directory and the entire file will be reaped when</div><div class='add'>+the last reference to the file is lost.</div><div class='add'>+The key differences are that these files must have no access permission outside</div><div class='add'>+the kernel at all, they must be specially marked to prevent them from being</div><div class='add'>+opened by handle, and they must never be linked into the directory tree.</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Historical Sidebar**:                                                  |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| In the initial iteration of file metadata repair, the damaged metadata   |</div><div class='add'>+| blocks would be scanned for salvageable data; the extents in the file    |</div><div class='add'>+| fork would be reaped; and then a new structure would be built in its     |</div><div class='add'>+| place.                                                                   |</div><div class='add'>+| This strategy did not survive the introduction of the atomic repair      |</div><div class='add'>+| requirement expressed earlier in this document.                          |</div><div class='add'>+|                                                                          |</div><div class='add'>+| The second iteration explored building a second structure at a high      |</div><div class='add'>+| offset in the fork from the salvage data, reaping the old extents, and   |</div><div class='add'>+| using a ``COLLAPSE_RANGE`` operation to slide the new extents into       |</div><div class='add'>+| place.                                                                   |</div><div class='add'>+|                                                                          |</div><div class='add'>+| This had many drawbacks:                                                 |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Array structures are linearly addressed, and the regular filesystem    |</div><div class='add'>+|   codebase does not have the concept of a linear offset that could be    |</div><div class='add'>+|   applied to the record offset computation to build an alternate copy.   |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Extended attributes are allowed to use the entire attr fork offset     |</div><div class='add'>+|   address space.                                                         |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Even if repair could build an alternate copy of a data structure in a  |</div><div class='add'>+|   different part of the fork address space, the atomic repair commit     |</div><div class='add'>+|   requirement means that online repair would have to be able to perform  |</div><div class='add'>+|   a log assisted ``COLLAPSE_RANGE`` operation to ensure that the old     |</div><div class='add'>+|   structure was completely replaced.                                     |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - A crash after construction of the secondary tree but before the range  |</div><div class='add'>+|   collapse would leave unreachable blocks in the file fork.              |</div><div class='add'>+|   This would likely confuse things further.                              |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Reaping blocks after a repair is not a simple operation, and           |</div><div class='add'>+|   initiating a reap operation from a restarted range collapse operation  |</div><div class='add'>+|   during log recovery is daunting.                                       |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Directory entry blocks and quota records record the file fork offset   |</div><div class='add'>+|   in the header area of each block.                                      |</div><div class='add'>+|   An atomic range collapse operation would have to rewrite this part of  |</div><div class='add'>+|   each block header.                                                     |</div><div class='add'>+|   Rewriting a single field in block headers is not a huge problem, but   |</div><div class='add'>+|   it's something to be aware of.                                         |</div><div class='add'>+|                                                                          |</div><div class='add'>+| - Each block in a directory or extended attributes btree index contains  |</div><div class='add'>+|   sibling and child block pointers.                                      |</div><div class='add'>+|   Were the atomic commit to use a range collapse operation, each block   |</div><div class='add'>+|   would have to be rewritten very carefully to preserve the graph        |</div><div class='add'>+|   structure.                                                             |</div><div class='add'>+|   Doing this as part of a range collapse means rewriting a large number  |</div><div class='add'>+|   of blocks repeatedly, which is not conducive to quick repairs.         |</div><div class='add'>+|                                                                          |</div><div class='add'>+| This lead to the introduction of temporary file staging.                 |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+Using a Temporary File</div><div class='add'>+``````````````````````</div><div class='add'>+</div><div class='add'>+Online repair code should use the ``xrep_tempfile_create`` function to create a</div><div class='add'>+temporary file inside the filesystem.</div><div class='add'>+This allocates an inode, marks the in-core inode private, and attaches it to</div><div class='add'>+the scrub context.</div><div class='add'>+These files are hidden from userspace, may not be added to the directory tree,</div><div class='add'>+and must be kept private.</div><div class='add'>+</div><div class='add'>+Temporary files only use two inode locks: the IOLOCK and the ILOCK.</div><div class='add'>+The MMAPLOCK is not needed here, because there must not be page faults from</div><div class='add'>+userspace for data fork blocks.</div><div class='add'>+The usage patterns of these two locks are the same as for any other XFS file --</div><div class='add'>+access to file data are controlled via the IOLOCK, and access to file metadata</div><div class='add'>+are controlled via the ILOCK.</div><div class='add'>+Locking helpers are provided so that the temporary file and its lock state can</div><div class='add'>+be cleaned up by the scrub context.</div><div class='add'>+To comply with the nested locking strategy laid out in the :ref:`inode</div><div class='add'>+locking&lt;ilocking&gt;` section, it is recommended that scrub functions use the</div><div class='add'>+xrep_tempfile_ilock*_nowait lock helpers.</div><div class='add'>+</div><div class='add'>+Data can be written to a temporary file by two means:</div><div class='add'>+</div><div class='add'>+1. ``xrep_tempfile_copyin`` can be used to set the contents of a regular</div><div class='add'>+   temporary file from an xfile.</div><div class='add'>+</div><div class='add'>+2. The regular directory, symbolic link, and extended attribute functions can</div><div class='add'>+   be used to write to the temporary file.</div><div class='add'>+</div><div class='add'>+Once a good copy of a data file has been constructed in a temporary file, it</div><div class='add'>+must be conveyed to the file being repaired, which is the topic of the next</div><div class='add'>+section.</div><div class='add'>+</div><div class='add'>+The proposed patches are in the</div><div class='add'>+`repair temporary files</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-tempfiles&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Atomic Extent Swapping</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+Once repair builds a temporary file with a new data structure written into</div><div class='add'>+it, it must commit the new changes into the existing file.</div><div class='add'>+It is not possible to swap the inumbers of two files, so instead the new</div><div class='add'>+metadata must replace the old.</div><div class='add'>+This suggests the need for the ability to swap extents, but the existing extent</div><div class='add'>+swapping code used by the file defragmenting tool ``xfs_fsr`` is not sufficient</div><div class='add'>+for online repair because:</div><div class='add'>+</div><div class='add'>+a. When the reverse-mapping btree is enabled, the swap code must keep the</div><div class='add'>+   reverse mapping information up to date with every exchange of mappings.</div><div class='add'>+   Therefore, it can only exchange one mapping per transaction, and each</div><div class='add'>+   transaction is independent.</div><div class='add'>+</div><div class='add'>+b. Reverse-mapping is critical for the operation of online fsck, so the old</div><div class='add'>+   defragmentation code (which swapped entire extent forks in a single</div><div class='add'>+   operation) is not useful here.</div><div class='add'>+</div><div class='add'>+c. Defragmentation is assumed to occur between two files with identical</div><div class='add'>+   contents.</div><div class='add'>+   For this use case, an incomplete exchange will not result in a user-visible</div><div class='add'>+   change in file contents, even if the operation is interrupted.</div><div class='add'>+</div><div class='add'>+d. Online repair needs to swap the contents of two files that are by definition</div><div class='add'>+   *not* identical.</div><div class='add'>+   For directory and xattr repairs, the user-visible contents might be the</div><div class='add'>+   same, but the contents of individual blocks may be very different.</div><div class='add'>+</div><div class='add'>+e. Old blocks in the file may be cross-linked with another structure and must</div><div class='add'>+   not reappear if the system goes down mid-repair.</div><div class='add'>+</div><div class='add'>+These problems are overcome by creating a new deferred operation and a new type</div><div class='add'>+of log intent item to track the progress of an operation to exchange two file</div><div class='add'>+ranges.</div><div class='add'>+The new deferred operation type chains together the same transactions used by</div><div class='add'>+the reverse-mapping extent swap code.</div><div class='add'>+The new log item records the progress of the exchange to ensure that once an</div><div class='add'>+exchange begins, it will always run to completion, even there are</div><div class='add'>+interruptions.</div><div class='add'>+The new ``XFS_SB_FEAT_INCOMPAT_LOG_ATOMIC_SWAP`` log-incompatible feature flag</div><div class='add'>+in the superblock protects these new log item records from being replayed on</div><div class='add'>+old kernels.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`atomic extent swap</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=atomic-file-updates&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Sidebar: Using Log-Incompatible Feature Flags**                        |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| Starting with XFS v5, the superblock contains a                          |</div><div class='add'>+| ``sb_features_log_incompat`` field to indicate that the log contains     |</div><div class='add'>+| records that might not readable by all kernels that could mount this     |</div><div class='add'>+| filesystem.                                                              |</div><div class='add'>+| In short, log incompat features protect the log contents against kernels |</div><div class='add'>+| that will not understand the contents.                                   |</div><div class='add'>+| Unlike the other superblock feature bits, log incompat bits are          |</div><div class='add'>+| ephemeral because an empty (clean) log does not need protection.         |</div><div class='add'>+| The log cleans itself after its contents have been committed into the    |</div><div class='add'>+| filesystem, either as part of an unmount or because the system is        |</div><div class='add'>+| otherwise idle.                                                          |</div><div class='add'>+| Because upper level code can be working on a transaction at the same     |</div><div class='add'>+| time that the log cleans itself, it is necessary for upper level code to |</div><div class='add'>+| communicate to the log when it is going to use a log incompatible        |</div><div class='add'>+| feature.                                                                 |</div><div class='add'>+|                                                                          |</div><div class='add'>+| The log coordinates access to incompatible features through the use of   |</div><div class='add'>+| one ``struct rw_semaphore`` for each feature.                            |</div><div class='add'>+| The log cleaning code tries to take this rwsem in exclusive mode to      |</div><div class='add'>+| clear the bit; if the lock attempt fails, the feature bit remains set.   |</div><div class='add'>+| Filesystem code signals its intention to use a log incompat feature in a |</div><div class='add'>+| transaction by calling ``xlog_use_incompat_feat``, which takes the rwsem |</div><div class='add'>+| in shared mode.                                                          |</div><div class='add'>+| The code supporting a log incompat feature should create wrapper         |</div><div class='add'>+| functions to obtain the log feature and call                             |</div><div class='add'>+| ``xfs_add_incompat_log_feature`` to set the feature bits in the primary  |</div><div class='add'>+| superblock.                                                              |</div><div class='add'>+| The superblock update is performed transactionally, so the wrapper to    |</div><div class='add'>+| obtain log assistance must be called just prior to the creation of the   |</div><div class='add'>+| transaction that uses the functionality.                                 |</div><div class='add'>+| For a file operation, this step must happen after taking the IOLOCK      |</div><div class='add'>+| and the MMAPLOCK, but before allocating the transaction.                 |</div><div class='add'>+| When the transaction is complete, the ``xlog_drop_incompat_feat``        |</div><div class='add'>+| function is called to release the feature.                               |</div><div class='add'>+| The feature bit will not be cleared from the superblock until the log    |</div><div class='add'>+| becomes clean.                                                           |</div><div class='add'>+|                                                                          |</div><div class='add'>+| Log-assisted extended attribute updates and atomic extent swaps both use |</div><div class='add'>+| log incompat features and provide convenience wrappers around the        |</div><div class='add'>+| functionality.                                                           |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+Mechanics of an Atomic Extent Swap</div><div class='add'>+``````````````````````````````````</div><div class='add'>+</div><div class='add'>+Swapping entire file forks is a complex task.</div><div class='add'>+The goal is to exchange all file fork mappings between two file fork offset</div><div class='add'>+ranges.</div><div class='add'>+There are likely to be many extent mappings in each fork, and the edges of</div><div class='add'>+the mappings aren't necessarily aligned.</div><div class='add'>+Furthermore, there may be other updates that need to happen after the swap,</div><div class='add'>+such as exchanging file sizes, inode flags, or conversion of fork data to local</div><div class='add'>+format.</div><div class='add'>+This is roughly the format of the new deferred extent swap work item:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	struct xfs_swapext_intent {</div><div class='add'>+	    /* Inodes participating in the operation. */</div><div class='add'>+	    struct xfs_inode    *sxi_ip1;</div><div class='add'>+	    struct xfs_inode    *sxi_ip2;</div><div class='add'>+</div><div class='add'>+	    /* File offset range information. */</div><div class='add'>+	    xfs_fileoff_t       sxi_startoff1;</div><div class='add'>+	    xfs_fileoff_t       sxi_startoff2;</div><div class='add'>+	    xfs_filblks_t       sxi_blockcount;</div><div class='add'>+</div><div class='add'>+	    /* Set these file sizes after the operation, unless negative. */</div><div class='add'>+	    xfs_fsize_t         sxi_isize1;</div><div class='add'>+	    xfs_fsize_t         sxi_isize2;</div><div class='add'>+</div><div class='add'>+	    /* XFS_SWAP_EXT_* log operation flags */</div><div class='add'>+	    uint64_t            sxi_flags;</div><div class='add'>+	};</div><div class='add'>+</div><div class='add'>+The new log intent item contains enough information to track two logical fork</div><div class='add'>+offset ranges: ``(inode1, startoff1, blockcount)`` and ``(inode2, startoff2,</div><div class='add'>+blockcount)``.</div><div class='add'>+Each step of a swap operation exchanges the largest file range mapping possible</div><div class='add'>+from one file to the other.</div><div class='add'>+After each step in the swap operation, the two startoff fields are incremented</div><div class='add'>+and the blockcount field is decremented to reflect the progress made.</div><div class='add'>+The flags field captures behavioral parameters such as swapping the attr fork</div><div class='add'>+instead of the data fork and other work to be done after the extent swap.</div><div class='add'>+The two isize fields are used to swap the file size at the end of the operation</div><div class='add'>+if the file data fork is the target of the swap operation.</div><div class='add'>+</div><div class='add'>+When the extent swap is initiated, the sequence of operations is as follows:</div><div class='add'>+</div><div class='add'>+1. Create a deferred work item for the extent swap.</div><div class='add'>+   At the start, it should contain the entirety of the file ranges to be</div><div class='add'>+   swapped.</div><div class='add'>+</div><div class='add'>+2. Call ``xfs_defer_finish`` to process the exchange.</div><div class='add'>+   This is encapsulated in ``xrep_tempswap_contents`` for scrub operations.</div><div class='add'>+   This will log an extent swap intent item to the transaction for the deferred</div><div class='add'>+   extent swap work item.</div><div class='add'>+</div><div class='add'>+3. Until ``sxi_blockcount`` of the deferred extent swap work item is zero,</div><div class='add'>+</div><div class='add'>+   a. Read the block maps of both file ranges starting at ``sxi_startoff1`` and</div><div class='add'>+      ``sxi_startoff2``, respectively, and compute the longest extent that can</div><div class='add'>+      be swapped in a single step.</div><div class='add'>+      This is the minimum of the two ``br_blockcount`` s in the mappings.</div><div class='add'>+      Keep advancing through the file forks until at least one of the mappings</div><div class='add'>+      contains written blocks.</div><div class='add'>+      Mutual holes, unwritten extents, and extent mappings to the same physical</div><div class='add'>+      space are not exchanged.</div><div class='add'>+</div><div class='add'>+      For the next few steps, this document will refer to the mapping that came</div><div class='add'>+      from file 1 as "map1", and the mapping that came from file 2 as "map2".</div><div class='add'>+</div><div class='add'>+   b. Create a deferred block mapping update to unmap map1 from file 1.</div><div class='add'>+</div><div class='add'>+   c. Create a deferred block mapping update to unmap map2 from file 2.</div><div class='add'>+</div><div class='add'>+   d. Create a deferred block mapping update to map map1 into file 2.</div><div class='add'>+</div><div class='add'>+   e. Create a deferred block mapping update to map map2 into file 1.</div><div class='add'>+</div><div class='add'>+   f. Log the block, quota, and extent count updates for both files.</div><div class='add'>+</div><div class='add'>+   g. Extend the ondisk size of either file if necessary.</div><div class='add'>+</div><div class='add'>+   h. Log an extent swap done log item for the extent swap intent log item</div><div class='add'>+      that was read at the start of step 3.</div><div class='add'>+</div><div class='add'>+   i. Compute the amount of file range that has just been covered.</div><div class='add'>+      This quantity is ``(map1.br_startoff + map1.br_blockcount -</div><div class='add'>+      sxi_startoff1)``, because step 3a could have skipped holes.</div><div class='add'>+</div><div class='add'>+   j. Increase the starting offsets of ``sxi_startoff1`` and ``sxi_startoff2``</div><div class='add'>+      by the number of blocks computed in the previous step, and decrease</div><div class='add'>+      ``sxi_blockcount`` by the same quantity.</div><div class='add'>+      This advances the cursor.</div><div class='add'>+</div><div class='add'>+   k. Log a new extent swap intent log item reflecting the advanced state of</div><div class='add'>+      the work item.</div><div class='add'>+</div><div class='add'>+   l. Return the proper error code (EAGAIN) to the deferred operation manager</div><div class='add'>+      to inform it that there is more work to be done.</div><div class='add'>+      The operation manager completes the deferred work in steps 3b-3e before</div><div class='add'>+      moving back to the start of step 3.</div><div class='add'>+</div><div class='add'>+4. Perform any post-processing.</div><div class='add'>+   This will be discussed in more detail in subsequent sections.</div><div class='add'>+</div><div class='add'>+If the filesystem goes down in the middle of an operation, log recovery will</div><div class='add'>+find the most recent unfinished extent swap log intent item and restart from</div><div class='add'>+there.</div><div class='add'>+This is how extent swapping guarantees that an outside observer will either see</div><div class='add'>+the old broken structure or the new one, and never a mismash of both.</div><div class='add'>+</div><div class='add'>+Preparation for Extent Swapping</div><div class='add'>+```````````````````````````````</div><div class='add'>+</div><div class='add'>+There are a few things that need to be taken care of before initiating an</div><div class='add'>+atomic extent swap operation.</div><div class='add'>+First, regular files require the page cache to be flushed to disk before the</div><div class='add'>+operation begins, and directio writes to be quiesced.</div><div class='add'>+Like any filesystem operation, extent swapping must determine the maximum</div><div class='add'>+amount of disk space and quota that can be consumed on behalf of both files in</div><div class='add'>+the operation, and reserve that quantity of resources to avoid an unrecoverable</div><div class='add'>+out of space failure once it starts dirtying metadata.</div><div class='add'>+The preparation step scans the ranges of both files to estimate:</div><div class='add'>+</div><div class='add'>+- Data device blocks needed to handle the repeated updates to the fork</div><div class='add'>+  mappings.</div><div class='add'>+- Change in data and realtime block counts for both files.</div><div class='add'>+- Increase in quota usage for both files, if the two files do not share the</div><div class='add'>+  same set of quota ids.</div><div class='add'>+- The number of extent mappings that will be added to each file.</div><div class='add'>+- Whether or not there are partially written realtime extents.</div><div class='add'>+  User programs must never be able to access a realtime file extent that maps</div><div class='add'>+  to different extents on the realtime volume, which could happen if the</div><div class='add'>+  operation fails to run to completion.</div><div class='add'>+</div><div class='add'>+The need for precise estimation increases the run time of the swap operation,</div><div class='add'>+but it is very important to maintain correct accounting.</div><div class='add'>+The filesystem must not run completely out of free space, nor can the extent</div><div class='add'>+swap ever add more extent mappings to a fork than it can support.</div><div class='add'>+Regular users are required to abide the quota limits, though metadata repairs</div><div class='add'>+may exceed quota to resolve inconsistent metadata elsewhere.</div><div class='add'>+</div><div class='add'>+Special Features for Swapping Metadata File Extents</div><div class='add'>+```````````````````````````````````````````````````</div><div class='add'>+</div><div class='add'>+Extended attributes, symbolic links, and directories can set the fork format to</div><div class='add'>+"local" and treat the fork as a literal area for data storage.</div><div class='add'>+Metadata repairs must take extra steps to support these cases:</div><div class='add'>+</div><div class='add'>+- If both forks are in local format and the fork areas are large enough, the</div><div class='add'>+  swap is performed by copying the incore fork contents, logging both forks,</div><div class='add'>+  and committing.</div><div class='add'>+  The atomic extent swap mechanism is not necessary, since this can be done</div><div class='add'>+  with a single transaction.</div><div class='add'>+</div><div class='add'>+- If both forks map blocks, then the regular atomic extent swap is used.</div><div class='add'>+</div><div class='add'>+- Otherwise, only one fork is in local format.</div><div class='add'>+  The contents of the local format fork are converted to a block to perform the</div><div class='add'>+  swap.</div><div class='add'>+  The conversion to block format must be done in the same transaction that</div><div class='add'>+  logs the initial extent swap intent log item.</div><div class='add'>+  The regular atomic extent swap is used to exchange the mappings.</div><div class='add'>+  Special flags are set on the swap operation so that the transaction can be</div><div class='add'>+  rolled one more time to convert the second file's fork back to local format</div><div class='add'>+  so that the second file will be ready to go as soon as the ILOCK is dropped.</div><div class='add'>+</div><div class='add'>+Extended attributes and directories stamp the owning inode into every block,</div><div class='add'>+but the buffer verifiers do not actually check the inode number!</div><div class='add'>+Although there is no verification, it is still important to maintain</div><div class='add'>+referential integrity, so prior to performing the extent swap, online repair</div><div class='add'>+builds every block in the new data structure with the owner field of the file</div><div class='add'>+being repaired.</div><div class='add'>+</div><div class='add'>+After a successful swap operation, the repair operation must reap the old fork</div><div class='add'>+blocks by processing each fork mapping through the standard :ref:`file extent</div><div class='add'>+reaping &lt;reaping&gt;` mechanism that is done post-repair.</div><div class='add'>+If the filesystem should go down during the reap part of the repair, the</div><div class='add'>+iunlink processing at the end of recovery will free both the temporary file and</div><div class='add'>+whatever blocks were not reaped.</div><div class='add'>+However, this iunlink processing omits the cross-link detection of online</div><div class='add'>+repair, and is not completely foolproof.</div><div class='add'>+</div><div class='add'>+Swapping Temporary File Extents</div><div class='add'>+```````````````````````````````</div><div class='add'>+</div><div class='add'>+To repair a metadata file, online repair proceeds as follows:</div><div class='add'>+</div><div class='add'>+1. Create a temporary repair file.</div><div class='add'>+</div><div class='add'>+2. Use the staging data to write out new contents into the temporary repair</div><div class='add'>+   file.</div><div class='add'>+   The same fork must be written to as is being repaired.</div><div class='add'>+</div><div class='add'>+3. Commit the scrub transaction, since the swap estimation step must be</div><div class='add'>+   completed before transaction reservations are made.</div><div class='add'>+</div><div class='add'>+4. Call ``xrep_tempswap_trans_alloc`` to allocate a new scrub transaction with</div><div class='add'>+   the appropriate resource reservations, locks, and fill out a ``struct</div><div class='add'>+   xfs_swapext_req`` with the details of the swap operation.</div><div class='add'>+</div><div class='add'>+5. Call ``xrep_tempswap_contents`` to swap the contents.</div><div class='add'>+</div><div class='add'>+6. Commit the transaction to complete the repair.</div><div class='add'>+</div><div class='add'>+.. _rtsummary:</div><div class='add'>+</div><div class='add'>+Case Study: Repairing the Realtime Summary File</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+In the "realtime" section of an XFS filesystem, free space is tracked via a</div><div class='add'>+bitmap, similar to Unix FFS.</div><div class='add'>+Each bit in the bitmap represents one realtime extent, which is a multiple of</div><div class='add'>+the filesystem block size between 4KiB and 1GiB in size.</div><div class='add'>+The realtime summary file indexes the number of free extents of a given size to</div><div class='add'>+the offset of the block within the realtime free space bitmap where those free</div><div class='add'>+extents begin.</div><div class='add'>+In other words, the summary file helps the allocator find free extents by</div><div class='add'>+length, similar to what the free space by count (cntbt) btree does for the data</div><div class='add'>+section.</div><div class='add'>+</div><div class='add'>+The summary file itself is a flat file (with no block headers or checksums!)</div><div class='add'>+partitioned into ``log2(total rt extents)`` sections containing enough 32-bit</div><div class='add'>+counters to match the number of blocks in the rt bitmap.</div><div class='add'>+Each counter records the number of free extents that start in that bitmap block</div><div class='add'>+and can satisfy a power-of-two allocation request.</div><div class='add'>+</div><div class='add'>+To check the summary file against the bitmap:</div><div class='add'>+</div><div class='add'>+1. Take the ILOCK of both the realtime bitmap and summary files.</div><div class='add'>+</div><div class='add'>+2. For each free space extent recorded in the bitmap:</div><div class='add'>+</div><div class='add'>+   a. Compute the position in the summary file that contains a counter that</div><div class='add'>+      represents this free extent.</div><div class='add'>+</div><div class='add'>+   b. Read the counter from the xfile.</div><div class='add'>+</div><div class='add'>+   c. Increment it, and write it back to the xfile.</div><div class='add'>+</div><div class='add'>+3. Compare the contents of the xfile against the ondisk file.</div><div class='add'>+</div><div class='add'>+To repair the summary file, write the xfile contents into the temporary file</div><div class='add'>+and use atomic extent swap to commit the new contents.</div><div class='add'>+The temporary file is then reaped.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`realtime summary repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-rtsummary&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Case Study: Salvaging Extended Attributes</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+In XFS, extended attributes are implemented as a namespaced name-value store.</div><div class='add'>+Values are limited in size to 64KiB, but there is no limit in the number of</div><div class='add'>+names.</div><div class='add'>+The attribute fork is unpartitioned, which means that the root of the attribute</div><div class='add'>+structure is always in logical block zero, but attribute leaf blocks, dabtree</div><div class='add'>+index blocks, and remote value blocks are intermixed.</div><div class='add'>+Attribute leaf blocks contain variable-sized records that associate</div><div class='add'>+user-provided names with the user-provided values.</div><div class='add'>+Values larger than a block are allocated separate extents and written there.</div><div class='add'>+If the leaf information expands beyond a single block, a directory/attribute</div><div class='add'>+btree (``dabtree``) is created to map hashes of attribute names to entries</div><div class='add'>+for fast lookup.</div><div class='add'>+</div><div class='add'>+Salvaging extended attributes is done as follows:</div><div class='add'>+</div><div class='add'>+1. Walk the attr fork mappings of the file being repaired to find the attribute</div><div class='add'>+   leaf blocks.</div><div class='add'>+   When one is found,</div><div class='add'>+</div><div class='add'>+   a. Walk the attr leaf block to find candidate keys.</div><div class='add'>+      When one is found,</div><div class='add'>+</div><div class='add'>+      1. Check the name for problems, and ignore the name if there are.</div><div class='add'>+</div><div class='add'>+      2. Retrieve the value.</div><div class='add'>+         If that succeeds, add the name and value to the staging xfarray and</div><div class='add'>+         xfblob.</div><div class='add'>+</div><div class='add'>+2. If the memory usage of the xfarray and xfblob exceed a certain amount of</div><div class='add'>+   memory or there are no more attr fork blocks to examine, unlock the file and</div><div class='add'>+   add the staged extended attributes to the temporary file.</div><div class='add'>+</div><div class='add'>+3. Use atomic extent swapping to exchange the new and old extended attribute</div><div class='add'>+   structures.</div><div class='add'>+   The old attribute blocks are now attached to the temporary file.</div><div class='add'>+</div><div class='add'>+4. Reap the temporary file.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`extended attribute repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-xattrs&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Fixing Directories</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+Fixing directories is difficult with currently available filesystem features,</div><div class='add'>+since directory entries are not redundant.</div><div class='add'>+The offline repair tool scans all inodes to find files with nonzero link count,</div><div class='add'>+and then it scans all directories to establish parentage of those linked files.</div><div class='add'>+Damaged files and directories are zapped, and files with no parent are</div><div class='add'>+moved to the ``/lost+found`` directory.</div><div class='add'>+It does not try to salvage anything.</div><div class='add'>+</div><div class='add'>+The best that online repair can do at this time is to read directory data</div><div class='add'>+blocks and salvage any dirents that look plausible, correct link counts, and</div><div class='add'>+move orphans back into the directory tree.</div><div class='add'>+The salvage process is discussed in the case study at the end of this section.</div><div class='add'>+The :ref:`file link count fsck &lt;nlinks&gt;` code takes care of fixing link counts</div><div class='add'>+and moving orphans to the ``/lost+found`` directory.</div><div class='add'>+</div><div class='add'>+Case Study: Salvaging Directories</div><div class='add'>+`````````````````````````````````</div><div class='add'>+</div><div class='add'>+Unlike extended attributes, directory blocks are all the same size, so</div><div class='add'>+salvaging directories is straightforward:</div><div class='add'>+</div><div class='add'>+1. Find the parent of the directory.</div><div class='add'>+   If the dotdot entry is not unreadable, try to confirm that the alleged</div><div class='add'>+   parent has a child entry pointing back to the directory being repaired.</div><div class='add'>+   Otherwise, walk the filesystem to find it.</div><div class='add'>+</div><div class='add'>+2. Walk the first partition of data fork of the directory to find the directory</div><div class='add'>+   entry data blocks.</div><div class='add'>+   When one is found,</div><div class='add'>+</div><div class='add'>+   a. Walk the directory data block to find candidate entries.</div><div class='add'>+      When an entry is found:</div><div class='add'>+</div><div class='add'>+      i. Check the name for problems, and ignore the name if there are.</div><div class='add'>+</div><div class='add'>+      ii. Retrieve the inumber and grab the inode.</div><div class='add'>+          If that succeeds, add the name, inode number, and file type to the</div><div class='add'>+          staging xfarray and xblob.</div><div class='add'>+</div><div class='add'>+3. If the memory usage of the xfarray and xfblob exceed a certain amount of</div><div class='add'>+   memory or there are no more directory data blocks to examine, unlock the</div><div class='add'>+   directory and add the staged dirents into the temporary directory.</div><div class='add'>+   Truncate the staging files.</div><div class='add'>+</div><div class='add'>+4. Use atomic extent swapping to exchange the new and old directory structures.</div><div class='add'>+   The old directory blocks are now attached to the temporary file.</div><div class='add'>+</div><div class='add'>+5. Reap the temporary file.</div><div class='add'>+</div><div class='add'>+**Future Work Question**: Should repair revalidate the dentry cache when</div><div class='add'>+rebuilding a directory?</div><div class='add'>+</div><div class='add'>+*Answer*: Yes, it should.</div><div class='add'>+</div><div class='add'>+In theory it is necessary to scan all dentry cache entries for a directory to</div><div class='add'>+ensure that one of the following apply:</div><div class='add'>+</div><div class='add'>+1. The cached dentry reflects an ondisk dirent in the new directory.</div><div class='add'>+</div><div class='add'>+2. The cached dentry no longer has a corresponding ondisk dirent in the new</div><div class='add'>+   directory and the dentry can be purged from the cache.</div><div class='add'>+</div><div class='add'>+3. The cached dentry no longer has an ondisk dirent but the dentry cannot be</div><div class='add'>+   purged.</div><div class='add'>+   This is the problem case.</div><div class='add'>+</div><div class='add'>+Unfortunately, the current dentry cache design doesn't provide a means to walk</div><div class='add'>+every child dentry of a specific directory, which makes this a hard problem.</div><div class='add'>+There is no known solution.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`directory repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-dirs&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Parent Pointers</div><div class='add'>+```````````````</div><div class='add'>+</div><div class='add'>+A parent pointer is a piece of file metadata that enables a user to locate the</div><div class='add'>+file's parent directory without having to traverse the directory tree from the</div><div class='add'>+root.</div><div class='add'>+Without them, reconstruction of directory trees is hindered in much the same</div><div class='add'>+way that the historic lack of reverse space mapping information once hindered</div><div class='add'>+reconstruction of filesystem space metadata.</div><div class='add'>+The parent pointer feature, however, makes total directory reconstruction</div><div class='add'>+possible.</div><div class='add'>+</div><div class='add'>+XFS parent pointers include the dirent name and location of the entry within</div><div class='add'>+the parent directory.</div><div class='add'>+In other words, child files use extended attributes to store pointers to</div><div class='add'>+parents in the form ``(parent_inum, parent_gen, dirent_pos) → (dirent_name)``.</div><div class='add'>+The directory checking process can be strengthened to ensure that the target of</div><div class='add'>+each dirent also contains a parent pointer pointing back to the dirent.</div><div class='add'>+Likewise, each parent pointer can be checked by ensuring that the target of</div><div class='add'>+each parent pointer is a directory and that it contains a dirent matching</div><div class='add'>+the parent pointer.</div><div class='add'>+Both online and offline repair can use this strategy.</div><div class='add'>+</div><div class='add'>+**Note**: The ondisk format of parent pointers is not yet finalized.</div><div class='add'>+</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| **Historical Sidebar**:                                                  |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+| Directory parent pointers were first proposed as an XFS feature more     |</div><div class='add'>+| than a decade ago by SGI.                                                |</div><div class='add'>+| Each link from a parent directory to a child file is mirrored with an    |</div><div class='add'>+| extended attribute in the child that could be used to identify the       |</div><div class='add'>+| parent directory.                                                        |</div><div class='add'>+| Unfortunately, this early implementation had major shortcomings and was  |</div><div class='add'>+| never merged into Linux XFS:                                             |</div><div class='add'>+|                                                                          |</div><div class='add'>+| 1. The XFS codebase of the late 2000s did not have the infrastructure to |</div><div class='add'>+|    enforce strong referential integrity in the directory tree.           |</div><div class='add'>+|    It did not guarantee that a change in a forward link would always be  |</div><div class='add'>+|    followed up with the corresponding change to the reverse links.       |</div><div class='add'>+|                                                                          |</div><div class='add'>+| 2. Referential integrity was not integrated into offline repair.         |</div><div class='add'>+|    Checking and repairs were performed on mounted filesystems without    |</div><div class='add'>+|    taking any kernel or inode locks to coordinate access.                |</div><div class='add'>+|    It is not clear how this actually worked properly.                    |</div><div class='add'>+|                                                                          |</div><div class='add'>+| 3. The extended attribute did not record the name of the directory entry |</div><div class='add'>+|    in the parent, so the SGI parent pointer implementation cannot be     |</div><div class='add'>+|    used to reconnect the directory tree.                                 |</div><div class='add'>+|                                                                          |</div><div class='add'>+| 4. Extended attribute forks only support 65,536 extents, which means     |</div><div class='add'>+|    that parent pointer attribute creation is likely to fail at some      |</div><div class='add'>+|    point before the maximum file link count is achieved.                 |</div><div class='add'>+|                                                                          |</div><div class='add'>+| The original parent pointer design was too unstable for something like   |</div><div class='add'>+| a file system repair to depend on.                                       |</div><div class='add'>+| Allison Henderson, Chandan Babu, and Catherine Hoang are working on a    |</div><div class='add'>+| second implementation that solves all shortcomings of the first.         |</div><div class='add'>+| During 2022, Allison introduced log intent items to track physical       |</div><div class='add'>+| manipulations of the extended attribute structures.                      |</div><div class='add'>+| This solves the referential integrity problem by making it possible to   |</div><div class='add'>+| commit a dirent update and a parent pointer update in the same           |</div><div class='add'>+| transaction.                                                             |</div><div class='add'>+| Chandan increased the maximum extent counts of both data and attribute   |</div><div class='add'>+| forks, thereby ensuring that the extended attribute structure can grow   |</div><div class='add'>+| to handle the maximum hardlink count of any file.                        |</div><div class='add'>++--------------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+Case Study: Repairing Directories with Parent Pointers</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Directory rebuilding uses a :ref:`coordinated inode scan &lt;iscan&gt;` and</div><div class='add'>+a :ref:`directory entry live update hook &lt;liveupdate&gt;` as follows:</div><div class='add'>+</div><div class='add'>+1. Set up a temporary directory for generating the new directory structure,</div><div class='add'>+   an xfblob for storing entry names, and an xfarray for stashing directory</div><div class='add'>+   updates.</div><div class='add'>+</div><div class='add'>+2. Set up an inode scanner and hook into the directory entry code to receive</div><div class='add'>+   updates on directory operations.</div><div class='add'>+</div><div class='add'>+3. For each parent pointer found in each file scanned, decide if the parent</div><div class='add'>+   pointer references the directory of interest.</div><div class='add'>+   If so:</div><div class='add'>+</div><div class='add'>+   a. Stash an addname entry for this dirent in the xfarray for later.</div><div class='add'>+</div><div class='add'>+   b. When finished scanning that file, flush the stashed updates to the</div><div class='add'>+      temporary directory.</div><div class='add'>+</div><div class='add'>+4. For each live directory update received via the hook, decide if the child</div><div class='add'>+   has already been scanned.</div><div class='add'>+   If so:</div><div class='add'>+</div><div class='add'>+   a. Stash an addname or removename entry for this dirent update in the</div><div class='add'>+      xfarray for later.</div><div class='add'>+      We cannot write directly to the temporary directory because hook</div><div class='add'>+      functions are not allowed to modify filesystem metadata.</div><div class='add'>+      Instead, we stash updates in the xfarray and rely on the scanner thread</div><div class='add'>+      to apply the stashed updates to the temporary directory.</div><div class='add'>+</div><div class='add'>+5. When the scan is complete, atomically swap the contents of the temporary</div><div class='add'>+   directory and the directory being repaired.</div><div class='add'>+   The temporary directory now contains the damaged directory structure.</div><div class='add'>+</div><div class='add'>+6. Reap the temporary directory.</div><div class='add'>+</div><div class='add'>+7. Update the dirent position field of parent pointers as necessary.</div><div class='add'>+   This may require the queuing of a substantial number of xattr log intent</div><div class='add'>+   items.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`parent pointers directory repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=pptrs-online-dir-repair&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+**Unresolved Question**: How will repair ensure that the ``dirent_pos`` fields</div><div class='add'>+match in the reconstructed directory?</div><div class='add'>+</div><div class='add'>+*Answer*: There are a few ways to solve this problem:</div><div class='add'>+</div><div class='add'>+1. The field could be designated advisory, since the other three values are</div><div class='add'>+   sufficient to find the entry in the parent.</div><div class='add'>+   However, this makes indexed key lookup impossible while repairs are ongoing.</div><div class='add'>+</div><div class='add'>+2. We could allow creating directory entries at specified offsets, which solves</div><div class='add'>+   the referential integrity problem but runs the risk that dirent creation</div><div class='add'>+   will fail due to conflicts with the free space in the directory.</div><div class='add'>+</div><div class='add'>+   These conflicts could be resolved by appending the directory entry and</div><div class='add'>+   amending the xattr code to support updating an xattr key and reindexing the</div><div class='add'>+   dabtree, though this would have to be performed with the parent directory</div><div class='add'>+   still locked.</div><div class='add'>+</div><div class='add'>+3. Same as above, but remove the old parent pointer entry and add a new one</div><div class='add'>+   atomically.</div><div class='add'>+</div><div class='add'>+4. Change the ondisk xattr format to ``(parent_inum, name) → (parent_gen)``,</div><div class='add'>+   which would provide the attr name uniqueness that we require, without</div><div class='add'>+   forcing repair code to update the dirent position.</div><div class='add'>+   Unfortunately, this requires changes to the xattr code to support attr</div><div class='add'>+   names as long as 263 bytes.</div><div class='add'>+</div><div class='add'>+5. Change the ondisk xattr format to ``(parent_inum, hash(name)) →</div><div class='add'>+   (name, parent_gen)``.</div><div class='add'>+   If the hash is sufficiently resistant to collisions (e.g. sha256) then</div><div class='add'>+   this should provide the attr name uniqueness that we require.</div><div class='add'>+   Names shorter than 247 bytes could be stored directly.</div><div class='add'>+</div><div class='add'>+Discussion is ongoing under the `parent pointers patch deluge</div><div class='add'>+&lt;https://www.spinics.net/lists/linux-xfs/msg69397.html&gt;`_.</div><div class='add'>+</div><div class='add'>+Case Study: Repairing Parent Pointers</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Online reconstruction of a file's parent pointer information works similarly to</div><div class='add'>+directory reconstruction:</div><div class='add'>+</div><div class='add'>+1. Set up a temporary file for generating a new extended attribute structure,</div><div class='add'>+   an `xfblob&lt;xfblob&gt;` for storing parent pointer names, and an xfarray for</div><div class='add'>+   stashing parent pointer updates.</div><div class='add'>+</div><div class='add'>+2. Set up an inode scanner and hook into the directory entry code to receive</div><div class='add'>+   updates on directory operations.</div><div class='add'>+</div><div class='add'>+3. For each directory entry found in each directory scanned, decide if the</div><div class='add'>+   dirent references the file of interest.</div><div class='add'>+   If so:</div><div class='add'>+</div><div class='add'>+   a. Stash an addpptr entry for this parent pointer in the xfblob and xfarray</div><div class='add'>+      for later.</div><div class='add'>+</div><div class='add'>+   b. When finished scanning the directory, flush the stashed updates to the</div><div class='add'>+      temporary directory.</div><div class='add'>+</div><div class='add'>+4. For each live directory update received via the hook, decide if the parent</div><div class='add'>+   has already been scanned.</div><div class='add'>+   If so:</div><div class='add'>+</div><div class='add'>+   a. Stash an addpptr or removepptr entry for this dirent update in the</div><div class='add'>+      xfarray for later.</div><div class='add'>+      We cannot write parent pointers directly to the temporary file because</div><div class='add'>+      hook functions are not allowed to modify filesystem metadata.</div><div class='add'>+      Instead, we stash updates in the xfarray and rely on the scanner thread</div><div class='add'>+      to apply the stashed parent pointer updates to the temporary file.</div><div class='add'>+</div><div class='add'>+5. Copy all non-parent pointer extended attributes to the temporary file.</div><div class='add'>+</div><div class='add'>+6. When the scan is complete, atomically swap the attribute fork of the</div><div class='add'>+   temporary file and the file being repaired.</div><div class='add'>+   The temporary file now contains the damaged extended attribute structure.</div><div class='add'>+</div><div class='add'>+7. Reap the temporary file.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`parent pointers repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=pptrs-online-parent-repair&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Digression: Offline Checking of Parent Pointers</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Examining parent pointers in offline repair works differently because corrupt</div><div class='add'>+files are erased long before directory tree connectivity checks are performed.</div><div class='add'>+Parent pointer checks are therefore a second pass to be added to the existing</div><div class='add'>+connectivity checks:</div><div class='add'>+</div><div class='add'>+1. After the set of surviving files has been established (i.e. phase 6),</div><div class='add'>+   walk the surviving directories of each AG in the filesystem.</div><div class='add'>+   This is already performed as part of the connectivity checks.</div><div class='add'>+</div><div class='add'>+2. For each directory entry found, record the name in an xfblob, and store</div><div class='add'>+   ``(child_ag_inum, parent_inum, parent_gen, dirent_pos)`` tuples in a</div><div class='add'>+   per-AG in-memory slab.</div><div class='add'>+</div><div class='add'>+3. For each AG in the filesystem,</div><div class='add'>+</div><div class='add'>+   a. Sort the per-AG tuples in order of child_ag_inum, parent_inum, and</div><div class='add'>+      dirent_pos.</div><div class='add'>+</div><div class='add'>+   b. For each inode in the AG,</div><div class='add'>+</div><div class='add'>+      1. Scan the inode for parent pointers.</div><div class='add'>+         Record the names in a per-file xfblob, and store ``(parent_inum,</div><div class='add'>+         parent_gen, dirent_pos)`` tuples in a per-file slab.</div><div class='add'>+</div><div class='add'>+      2. Sort the per-file tuples in order of parent_inum, and dirent_pos.</div><div class='add'>+</div><div class='add'>+      3. Position one slab cursor at the start of the inode's records in the</div><div class='add'>+         per-AG tuple slab.</div><div class='add'>+         This should be trivial since the per-AG tuples are in child inumber</div><div class='add'>+         order.</div><div class='add'>+</div><div class='add'>+      4. Position a second slab cursor at the start of the per-file tuple slab.</div><div class='add'>+</div><div class='add'>+      5. Iterate the two cursors in lockstep, comparing the parent_ino and</div><div class='add'>+         dirent_pos fields of the records under each cursor.</div><div class='add'>+</div><div class='add'>+         a. Tuples in the per-AG list but not the per-file list are missing and</div><div class='add'>+            need to be written to the inode.</div><div class='add'>+</div><div class='add'>+         b. Tuples in the per-file list but not the per-AG list are dangling</div><div class='add'>+            and need to be removed from the inode.</div><div class='add'>+</div><div class='add'>+         c. For tuples in both lists, update the parent_gen and name components</div><div class='add'>+            of the parent pointer if necessary.</div><div class='add'>+</div><div class='add'>+4. Move on to examining link counts, as we do today.</div><div class='add'>+</div><div class='add'>+The proposed patchset is the</div><div class='add'>+`offline parent pointers repair</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=pptrs-repair&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Rebuilding directories from parent pointers in offline repair is very</div><div class='add'>+challenging because it currently uses a single-pass scan of the filesystem</div><div class='add'>+during phase 3 to decide which files are corrupt enough to be zapped.</div><div class='add'>+This scan would have to be converted into a multi-pass scan:</div><div class='add'>+</div><div class='add'>+1. The first pass of the scan zaps corrupt inodes, forks, and attributes</div><div class='add'>+   much as it does now.</div><div class='add'>+   Corrupt directories are noted but not zapped.</div><div class='add'>+</div><div class='add'>+2. The next pass records parent pointers pointing to the directories noted</div><div class='add'>+   as being corrupt in the first pass.</div><div class='add'>+   This second pass may have to happen after the phase 4 scan for duplicate</div><div class='add'>+   blocks, if phase 4 is also capable of zapping directories.</div><div class='add'>+</div><div class='add'>+3. The third pass resets corrupt directories to an empty shortform directory.</div><div class='add'>+   Free space metadata has not been ensured yet, so repair cannot yet use the</div><div class='add'>+   directory building code in libxfs.</div><div class='add'>+</div><div class='add'>+4. At the start of phase 6, space metadata have been rebuilt.</div><div class='add'>+   Use the parent pointer information recorded during step 2 to reconstruct</div><div class='add'>+   the dirents and add them to the now-empty directories.</div><div class='add'>+</div><div class='add'>+This code has not yet been constructed.</div><div class='add'>+</div><div class='add'>+.. _orphanage:</div><div class='add'>+</div><div class='add'>+The Orphanage</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Filesystems present files as a directed, and hopefully acyclic, graph.</div><div class='add'>+In other words, a tree.</div><div class='add'>+The root of the filesystem is a directory, and each entry in a directory points</div><div class='add'>+downwards either to more subdirectories or to non-directory files.</div><div class='add'>+Unfortunately, a disruption in the directory graph pointers result in a</div><div class='add'>+disconnected graph, which makes files impossible to access via regular path</div><div class='add'>+resolution.</div><div class='add'>+</div><div class='add'>+Without parent pointers, the directory parent pointer online scrub code can</div><div class='add'>+detect a dotdot entry pointing to a parent directory that doesn't have a link</div><div class='add'>+back to the child directory and the file link count checker can detect a file</div><div class='add'>+that isn't pointed to by any directory in the filesystem.</div><div class='add'>+If such a file has a positive link count, the file is an orphan.</div><div class='add'>+</div><div class='add'>+With parent pointers, directories can be rebuilt by scanning parent pointers</div><div class='add'>+and parent pointers can be rebuilt by scanning directories.</div><div class='add'>+This should reduce the incidence of files ending up in ``/lost+found``.</div><div class='add'>+</div><div class='add'>+When orphans are found, they should be reconnected to the directory tree.</div><div class='add'>+Offline fsck solves the problem by creating a directory ``/lost+found`` to</div><div class='add'>+serve as an orphanage, and linking orphan files into the orphanage by using the</div><div class='add'>+inumber as the name.</div><div class='add'>+Reparenting a file to the orphanage does not reset any of its permissions or</div><div class='add'>+ACLs.</div><div class='add'>+</div><div class='add'>+This process is more involved in the kernel than it is in userspace.</div><div class='add'>+The directory and file link count repair setup functions must use the regular</div><div class='add'>+VFS mechanisms to create the orphanage directory with all the necessary</div><div class='add'>+security attributes and dentry cache entries, just like a regular directory</div><div class='add'>+tree modification.</div><div class='add'>+</div><div class='add'>+Orphaned files are adopted by the orphanage as follows:</div><div class='add'>+</div><div class='add'>+1. Call ``xrep_orphanage_try_create`` at the start of the scrub setup function</div><div class='add'>+   to try to ensure that the lost and found directory actually exists.</div><div class='add'>+   This also attaches the orphanage directory to the scrub context.</div><div class='add'>+</div><div class='add'>+2. If the decision is made to reconnect a file, take the IOLOCK of both the</div><div class='add'>+   orphanage and the file being reattached.</div><div class='add'>+   The ``xrep_orphanage_iolock_two`` function follows the inode locking</div><div class='add'>+   strategy discussed earlier.</div><div class='add'>+</div><div class='add'>+3. Call ``xrep_orphanage_compute_blkres`` and ``xrep_orphanage_compute_name``</div><div class='add'>+   to compute the new name in the orphanage and the block reservation required.</div><div class='add'>+</div><div class='add'>+4. Use ``xrep_orphanage_adoption_prep`` to reserve resources to the repair</div><div class='add'>+   transaction.</div><div class='add'>+</div><div class='add'>+5. Call ``xrep_orphanage_adopt`` to reparent the orphaned file into the lost</div><div class='add'>+   and found, and update the kernel dentry cache.</div><div class='add'>+</div><div class='add'>+The proposed patches are in the</div><div class='add'>+`orphanage adoption</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=repair-orphanage&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+6. Userspace Algorithms and Data Structures</div><div class='add'>+===========================================</div><div class='add'>+</div><div class='add'>+This section discusses the key algorithms and data structures of the userspace</div><div class='add'>+program, ``xfs_scrub``, that provide the ability to drive metadata checks and</div><div class='add'>+repairs in the kernel, verify file data, and look for other potential problems.</div><div class='add'>+</div><div class='add'>+.. _scrubcheck:</div><div class='add'>+</div><div class='add'>+Checking Metadata</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Recall the :ref:`phases of fsck work&lt;scrubphases&gt;` outlined earlier.</div><div class='add'>+That structure follows naturally from the data dependencies designed into the</div><div class='add'>+filesystem from its beginnings in 1993.</div><div class='add'>+In XFS, there are several groups of metadata dependencies:</div><div class='add'>+</div><div class='add'>+a. Filesystem summary counts depend on consistency within the inode indices,</div><div class='add'>+   the allocation group space btrees, and the realtime volume space</div><div class='add'>+   information.</div><div class='add'>+</div><div class='add'>+b. Quota resource counts depend on consistency within the quota file data</div><div class='add'>+   forks, inode indices, inode records, and the forks of every file on the</div><div class='add'>+   system.</div><div class='add'>+</div><div class='add'>+c. The naming hierarchy depends on consistency within the directory and</div><div class='add'>+   extended attribute structures.</div><div class='add'>+   This includes file link counts.</div><div class='add'>+</div><div class='add'>+d. Directories, extended attributes, and file data depend on consistency within</div><div class='add'>+   the file forks that map directory and extended attribute data to physical</div><div class='add'>+   storage media.</div><div class='add'>+</div><div class='add'>+e. The file forks depends on consistency within inode records and the space</div><div class='add'>+   metadata indices of the allocation groups and the realtime volume.</div><div class='add'>+   This includes quota and realtime metadata files.</div><div class='add'>+</div><div class='add'>+f. Inode records depends on consistency within the inode metadata indices.</div><div class='add'>+</div><div class='add'>+g. Realtime space metadata depend on the inode records and data forks of the</div><div class='add'>+   realtime metadata inodes.</div><div class='add'>+</div><div class='add'>+h. The allocation group metadata indices (free space, inodes, reference count,</div><div class='add'>+   and reverse mapping btrees) depend on consistency within the AG headers and</div><div class='add'>+   between all the AG metadata btrees.</div><div class='add'>+</div><div class='add'>+i. ``xfs_scrub`` depends on the filesystem being mounted and kernel support</div><div class='add'>+   for online fsck functionality.</div><div class='add'>+</div><div class='add'>+Therefore, a metadata dependency graph is a convenient way to schedule checking</div><div class='add'>+operations in the ``xfs_scrub`` program:</div><div class='add'>+</div><div class='add'>+- Phase 1 checks that the provided path maps to an XFS filesystem and detect</div><div class='add'>+  the kernel's scrubbing abilities, which validates group (i).</div><div class='add'>+</div><div class='add'>+- Phase 2 scrubs groups (g) and (h) in parallel using a threaded workqueue.</div><div class='add'>+</div><div class='add'>+- Phase 3 scans inodes in parallel.</div><div class='add'>+  For each inode, groups (f), (e), and (d) are checked, in that order.</div><div class='add'>+</div><div class='add'>+- Phase 4 repairs everything in groups (i) through (d) so that phases 5 and 6</div><div class='add'>+  may run reliably.</div><div class='add'>+</div><div class='add'>+- Phase 5 starts by checking groups (b) and (c) in parallel before moving on</div><div class='add'>+  to checking names.</div><div class='add'>+</div><div class='add'>+- Phase 6 depends on groups (i) through (b) to find file data blocks to verify,</div><div class='add'>+  to read them, and to report which blocks of which files are affected.</div><div class='add'>+</div><div class='add'>+- Phase 7 checks group (a), having validated everything else.</div><div class='add'>+</div><div class='add'>+Notice that the data dependencies between groups are enforced by the structure</div><div class='add'>+of the program flow.</div><div class='add'>+</div><div class='add'>+Parallel Inode Scans</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+An XFS filesystem can easily contain hundreds of millions of inodes.</div><div class='add'>+Given that XFS targets installations with large high-performance storage,</div><div class='add'>+it is desirable to scrub inodes in parallel to minimize runtime, particularly</div><div class='add'>+if the program has been invoked manually from a command line.</div><div class='add'>+This requires careful scheduling to keep the threads as evenly loaded as</div><div class='add'>+possible.</div><div class='add'>+</div><div class='add'>+Early iterations of the ``xfs_scrub`` inode scanner naïvely created a single</div><div class='add'>+workqueue and scheduled a single workqueue item per AG.</div><div class='add'>+Each workqueue item walked the inode btree (with ``XFS_IOC_INUMBERS``) to find</div><div class='add'>+inode chunks and then called bulkstat (``XFS_IOC_BULKSTAT``) to gather enough</div><div class='add'>+information to construct file handles.</div><div class='add'>+The file handle was then passed to a function to generate scrub items for each</div><div class='add'>+metadata object of each inode.</div><div class='add'>+This simple algorithm leads to thread balancing problems in phase 3 if the</div><div class='add'>+filesystem contains one AG with a few large sparse files and the rest of the</div><div class='add'>+AGs contain many smaller files.</div><div class='add'>+The inode scan dispatch function was not sufficiently granular; it should have</div><div class='add'>+been dispatching at the level of individual inodes, or, to constrain memory</div><div class='add'>+consumption, inode btree records.</div><div class='add'>+</div><div class='add'>+Thanks to Dave Chinner, bounded workqueues in userspace enable ``xfs_scrub`` to</div><div class='add'>+avoid this problem with ease by adding a second workqueue.</div><div class='add'>+Just like before, the first workqueue is seeded with one workqueue item per AG,</div><div class='add'>+and it uses INUMBERS to find inode btree chunks.</div><div class='add'>+The second workqueue, however, is configured with an upper bound on the number</div><div class='add'>+of items that can be waiting to be run.</div><div class='add'>+Each inode btree chunk found by the first workqueue's workers are queued to the</div><div class='add'>+second workqueue, and it is this second workqueue that queries BULKSTAT,</div><div class='add'>+creates a file handle, and passes it to a function to generate scrub items for</div><div class='add'>+each metadata object of each inode.</div><div class='add'>+If the second workqueue is too full, the workqueue add function blocks the</div><div class='add'>+first workqueue's workers until the backlog eases.</div><div class='add'>+This doesn't completely solve the balancing problem, but reduces it enough to</div><div class='add'>+move on to more pressing issues.</div><div class='add'>+</div><div class='add'>+The proposed patchsets are the scrub</div><div class='add'>+`performance tweaks</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-performance-tweaks&gt;`_</div><div class='add'>+and the</div><div class='add'>+`inode scan rebalance</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-iscan-rebalance&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+.. _scrubrepair:</div><div class='add'>+</div><div class='add'>+Scheduling Repairs</div><div class='add'>+------------------</div><div class='add'>+</div><div class='add'>+During phase 2, corruptions and inconsistencies reported in any AGI header or</div><div class='add'>+inode btree are repaired immediately, because phase 3 relies on proper</div><div class='add'>+functioning of the inode indices to find inodes to scan.</div><div class='add'>+Failed repairs are rescheduled to phase 4.</div><div class='add'>+Problems reported in any other space metadata are deferred to phase 4.</div><div class='add'>+Optimization opportunities are always deferred to phase 4, no matter their</div><div class='add'>+origin.</div><div class='add'>+</div><div class='add'>+During phase 3, corruptions and inconsistencies reported in any part of a</div><div class='add'>+file's metadata are repaired immediately if all space metadata were validated</div><div class='add'>+during phase 2.</div><div class='add'>+Repairs that fail or cannot be repaired immediately are scheduled for phase 4.</div><div class='add'>+</div><div class='add'>+In the original design of ``xfs_scrub``, it was thought that repairs would be</div><div class='add'>+so infrequent that the ``struct xfs_scrub_metadata`` objects used to</div><div class='add'>+communicate with the kernel could also be used as the primary object to</div><div class='add'>+schedule repairs.</div><div class='add'>+With recent increases in the number of optimizations possible for a given</div><div class='add'>+filesystem object, it became much more memory-efficient to track all eligible</div><div class='add'>+repairs for a given filesystem object with a single repair item.</div><div class='add'>+Each repair item represents a single lockable object -- AGs, metadata files,</div><div class='add'>+individual inodes, or a class of summary information.</div><div class='add'>+</div><div class='add'>+Phase 4 is responsible for scheduling a lot of repair work in as quick a</div><div class='add'>+manner as is practical.</div><div class='add'>+The :ref:`data dependencies &lt;scrubcheck&gt;` outlined earlier still apply, which</div><div class='add'>+means that ``xfs_scrub`` must try to complete the repair work scheduled by</div><div class='add'>+phase 2 before trying repair work scheduled by phase 3.</div><div class='add'>+The repair process is as follows:</div><div class='add'>+</div><div class='add'>+1. Start a round of repair with a workqueue and enough workers to keep the CPUs</div><div class='add'>+   as busy as the user desires.</div><div class='add'>+</div><div class='add'>+   a. For each repair item queued by phase 2,</div><div class='add'>+</div><div class='add'>+      i.   Ask the kernel to repair everything listed in the repair item for a</div><div class='add'>+           given filesystem object.</div><div class='add'>+</div><div class='add'>+      ii.  Make a note if the kernel made any progress in reducing the number</div><div class='add'>+           of repairs needed for this object.</div><div class='add'>+</div><div class='add'>+      iii. If the object no longer requires repairs, revalidate all metadata</div><div class='add'>+           associated with this object.</div><div class='add'>+           If the revalidation succeeds, drop the repair item.</div><div class='add'>+           If not, requeue the item for more repairs.</div><div class='add'>+</div><div class='add'>+   b. If any repairs were made, jump back to 1a to retry all the phase 2 items.</div><div class='add'>+</div><div class='add'>+   c. For each repair item queued by phase 3,</div><div class='add'>+</div><div class='add'>+      i.   Ask the kernel to repair everything listed in the repair item for a</div><div class='add'>+           given filesystem object.</div><div class='add'>+</div><div class='add'>+      ii.  Make a note if the kernel made any progress in reducing the number</div><div class='add'>+           of repairs needed for this object.</div><div class='add'>+</div><div class='add'>+      iii. If the object no longer requires repairs, revalidate all metadata</div><div class='add'>+           associated with this object.</div><div class='add'>+           If the revalidation succeeds, drop the repair item.</div><div class='add'>+           If not, requeue the item for more repairs.</div><div class='add'>+</div><div class='add'>+   d. If any repairs were made, jump back to 1c to retry all the phase 3 items.</div><div class='add'>+</div><div class='add'>+2. If step 1 made any repair progress of any kind, jump back to step 1 to start</div><div class='add'>+   another round of repair.</div><div class='add'>+</div><div class='add'>+3. If there are items left to repair, run them all serially one more time.</div><div class='add'>+   Complain if the repairs were not successful, since this is the last chance</div><div class='add'>+   to repair anything.</div><div class='add'>+</div><div class='add'>+Corruptions and inconsistencies encountered during phases 5 and 7 are repaired</div><div class='add'>+immediately.</div><div class='add'>+Corrupt file data blocks reported by phase 6 cannot be recovered by the</div><div class='add'>+filesystem.</div><div class='add'>+</div><div class='add'>+The proposed patchsets are the</div><div class='add'>+`repair warning improvements</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-better-repair-warnings&gt;`_,</div><div class='add'>+refactoring of the</div><div class='add'>+`repair data dependency</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-repair-data-deps&gt;`_</div><div class='add'>+and</div><div class='add'>+`object tracking</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-object-tracking&gt;`_,</div><div class='add'>+and the</div><div class='add'>+`repair scheduling</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=scrub-repair-scheduling&gt;`_</div><div class='add'>+improvement series.</div><div class='add'>+</div><div class='add'>+Checking Names for Confusable Unicode Sequences</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+If ``xfs_scrub`` succeeds in validating the filesystem metadata by the end of</div><div class='add'>+phase 4, it moves on to phase 5, which checks for suspicious looking names in</div><div class='add'>+the filesystem.</div><div class='add'>+These names consist of the filesystem label, names in directory entries, and</div><div class='add'>+the names of extended attributes.</div><div class='add'>+Like most Unix filesystems, XFS imposes the sparest of constraints on the</div><div class='add'>+contents of a name:</div><div class='add'>+</div><div class='add'>+- Slashes and null bytes are not allowed in directory entries.</div><div class='add'>+</div><div class='add'>+- Null bytes are not allowed in userspace-visible extended attributes.</div><div class='add'>+</div><div class='add'>+- Null bytes are not allowed in the filesystem label.</div><div class='add'>+</div><div class='add'>+Directory entries and attribute keys store the length of the name explicitly</div><div class='add'>+ondisk, which means that nulls are not name terminators.</div><div class='add'>+For this section, the term "naming domain" refers to any place where names are</div><div class='add'>+presented together -- all the names in a directory, or all the attributes of a</div><div class='add'>+file.</div><div class='add'>+</div><div class='add'>+Although the Unix naming constraints are very permissive, the reality of most</div><div class='add'>+modern-day Linux systems is that programs work with Unicode character code</div><div class='add'>+points to support international languages.</div><div class='add'>+These programs typically encode those code points in UTF-8 when interfacing</div><div class='add'>+with the C library because the kernel expects null-terminated names.</div><div class='add'>+In the common case, therefore, names found in an XFS filesystem are actually</div><div class='add'>+UTF-8 encoded Unicode data.</div><div class='add'>+</div><div class='add'>+To maximize its expressiveness, the Unicode standard defines separate control</div><div class='add'>+points for various characters that render similarly or identically in writing</div><div class='add'>+systems around the world.</div><div class='add'>+For example, the character "Cyrillic Small Letter A" U+0430 "а" often renders</div><div class='add'>+identically to "Latin Small Letter A" U+0061 "a".</div><div class='add'>+</div><div class='add'>+The standard also permits characters to be constructed in multiple ways --</div><div class='add'>+either by using a defined code point, or by combining one code point with</div><div class='add'>+various combining marks.</div><div class='add'>+For example, the character "Angstrom Sign U+212B "Å" can also be expressed</div><div class='add'>+as "Latin Capital Letter A" U+0041 "A" followed by "Combining Ring Above"</div><div class='add'>+U+030A "◌̊".</div><div class='add'>+Both sequences render identically.</div><div class='add'>+</div><div class='add'>+Like the standards that preceded it, Unicode also defines various control</div><div class='add'>+characters to alter the presentation of text.</div><div class='add'>+For example, the character "Right-to-Left Override" U+202E can trick some</div><div class='add'>+programs into rendering "moo\\xe2\\x80\\xaegnp.txt" as "mootxt.png".</div><div class='add'>+A second category of rendering problems involves whitespace characters.</div><div class='add'>+If the character "Zero Width Space" U+200B is encountered in a file name, the</div><div class='add'>+name will render identically to a name that does not have the zero width</div><div class='add'>+space.</div><div class='add'>+</div><div class='add'>+If two names within a naming domain have different byte sequences but render</div><div class='add'>+identically, a user may be confused by it.</div><div class='add'>+The kernel, in its indifference to upper level encoding schemes, permits this.</div><div class='add'>+Most filesystem drivers persist the byte sequence names that are given to them</div><div class='add'>+by the VFS.</div><div class='add'>+</div><div class='add'>+Techniques for detecting confusable names are explained in great detail in</div><div class='add'>+sections 4 and 5 of the</div><div class='add'>+`Unicode Security Mechanisms &lt;https://unicode.org/reports/tr39/&gt;`_</div><div class='add'>+document.</div><div class='add'>+When ``xfs_scrub`` detects UTF-8 encoding in use on a system, it uses the</div><div class='add'>+Unicode normalization form NFD in conjunction with the confusable name</div><div class='add'>+detection component of</div><div class='add'>+`libicu &lt;https://github.com/unicode-org/icu&gt;`_</div><div class='add'>+to identify names with a directory or within a file's extended attributes that</div><div class='add'>+could be confused for each other.</div><div class='add'>+Names are also checked for control characters, non-rendering characters, and</div><div class='add'>+mixing of bidirectional characters.</div><div class='add'>+All of these potential issues are reported to the system administrator during</div><div class='add'>+phase 5.</div><div class='add'>+</div><div class='add'>+Media Verification of File Data Extents</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+The system administrator can elect to initiate a media scan of all file data</div><div class='add'>+blocks.</div><div class='add'>+This scan after validation of all filesystem metadata (except for the summary</div><div class='add'>+counters) as phase 6.</div><div class='add'>+The scan starts by calling ``FS_IOC_GETFSMAP`` to scan the filesystem space map</div><div class='add'>+to find areas that are allocated to file data fork extents.</div><div class='add'>+Gaps betweeen data fork extents that are smaller than 64k are treated as if</div><div class='add'>+they were data fork extents to reduce the command setup overhead.</div><div class='add'>+When the space map scan accumulates a region larger than 32MB, a media</div><div class='add'>+verification request is sent to the disk as a directio read of the raw block</div><div class='add'>+device.</div><div class='add'>+</div><div class='add'>+If the verification read fails, ``xfs_scrub`` retries with single-block reads</div><div class='add'>+to narrow down the failure to the specific region of the media and recorded.</div><div class='add'>+When it has finished issuing verification requests, it again uses the space</div><div class='add'>+mapping ioctl to map the recorded media errors back to metadata structures</div><div class='add'>+and report what has been lost.</div><div class='add'>+For media errors in blocks owned by files, parent pointers can be used to</div><div class='add'>+construct file paths from inode numbers for user-friendly reporting.</div><div class='add'>+</div><div class='add'>+7. Conclusion and Future Work</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+It is hoped that the reader of this document has followed the designs laid out</div><div class='add'>+in this document and now has some familiarity with how XFS performs online</div><div class='add'>+rebuilding of its metadata indices, and how filesystem users can interact with</div><div class='add'>+that functionality.</div><div class='add'>+Although the scope of this work is daunting, it is hoped that this guide will</div><div class='add'>+make it easier for code readers to understand what has been built, for whom it</div><div class='add'>+has been built, and why.</div><div class='add'>+Please feel free to contact the XFS mailing list with questions.</div><div class='add'>+</div><div class='add'>+FIEXCHANGE_RANGE</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+As discussed earlier, a second frontend to the atomic extent swap mechanism is</div><div class='add'>+a new ioctl call that userspace programs can use to commit updates to files</div><div class='add'>+atomically.</div><div class='add'>+This frontend has been out for review for several years now, though the</div><div class='add'>+necessary refinements to online repair and lack of customer demand mean that</div><div class='add'>+the proposal has not been pushed very hard.</div><div class='add'>+</div><div class='add'>+Extent Swapping with Regular User Files</div><div class='add'>+```````````````````````````````````````</div><div class='add'>+</div><div class='add'>+As mentioned earlier, XFS has long had the ability to swap extents between</div><div class='add'>+files, which is used almost exclusively by ``xfs_fsr`` to defragment files.</div><div class='add'>+The earliest form of this was the fork swap mechanism, where the entire</div><div class='add'>+contents of data forks could be exchanged between two files by exchanging the</div><div class='add'>+raw bytes in each inode fork's immediate area.</div><div class='add'>+When XFS v5 came along with self-describing metadata, this old mechanism grew</div><div class='add'>+some log support to continue rewriting the owner fields of BMBT blocks during</div><div class='add'>+log recovery.</div><div class='add'>+When the reverse mapping btree was later added to XFS, the only way to maintain</div><div class='add'>+the consistency of the fork mappings with the reverse mapping index was to</div><div class='add'>+develop an iterative mechanism that used deferred bmap and rmap operations to</div><div class='add'>+swap mappings one at a time.</div><div class='add'>+This mechanism is identical to steps 2-3 from the procedure above except for</div><div class='add'>+the new tracking items, because the atomic extent swap mechanism is an</div><div class='add'>+iteration of an existing mechanism and not something totally novel.</div><div class='add'>+For the narrow case of file defragmentation, the file contents must be</div><div class='add'>+identical, so the recovery guarantees are not much of a gain.</div><div class='add'>+</div><div class='add'>+Atomic extent swapping is much more flexible than the existing swapext</div><div class='add'>+implementations because it can guarantee that the caller never sees a mix of</div><div class='add'>+old and new contents even after a crash, and it can operate on two arbitrary</div><div class='add'>+file fork ranges.</div><div class='add'>+The extra flexibility enables several new use cases:</div><div class='add'>+</div><div class='add'>+- **Atomic commit of file writes**: A userspace process opens a file that it</div><div class='add'>+  wants to update.</div><div class='add'>+  Next, it opens a temporary file and calls the file clone operation to reflink</div><div class='add'>+  the first file's contents into the temporary file.</div><div class='add'>+  Writes to the original file should instead be written to the temporary file.</div><div class='add'>+  Finally, the process calls the atomic extent swap system call</div><div class='add'>+  (``FIEXCHANGE_RANGE``) to exchange the file contents, thereby committing all</div><div class='add'>+  of the updates to the original file, or none of them.</div><div class='add'>+</div><div class='add'>+.. _swapext_if_unchanged:</div><div class='add'>+</div><div class='add'>+- **Transactional file updates**: The same mechanism as above, but the caller</div><div class='add'>+  only wants the commit to occur if the original file's contents have not</div><div class='add'>+  changed.</div><div class='add'>+  To make this happen, the calling process snapshots the file modification and</div><div class='add'>+  change timestamps of the original file before reflinking its data to the</div><div class='add'>+  temporary file.</div><div class='add'>+  When the program is ready to commit the changes, it passes the timestamps</div><div class='add'>+  into the kernel as arguments to the atomic extent swap system call.</div><div class='add'>+  The kernel only commits the changes if the provided timestamps match the</div><div class='add'>+  original file.</div><div class='add'>+</div><div class='add'>+- **Emulation of atomic block device writes**: Export a block device with a</div><div class='add'>+  logical sector size matching the filesystem block size to force all writes</div><div class='add'>+  to be aligned to the filesystem block size.</div><div class='add'>+  Stage all writes to a temporary file, and when that is complete, call the</div><div class='add'>+  atomic extent swap system call with a flag to indicate that holes in the</div><div class='add'>+  temporary file should be ignored.</div><div class='add'>+  This emulates an atomic device write in software, and can support arbitrary</div><div class='add'>+  scattered writes.</div><div class='add'>+</div><div class='add'>+Vectorized Scrub</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+As it turns out, the :ref:`refactoring &lt;scrubrepair&gt;` of repair items mentioned</div><div class='add'>+earlier was a catalyst for enabling a vectorized scrub system call.</div><div class='add'>+Since 2018, the cost of making a kernel call has increased considerably on some</div><div class='add'>+systems to mitigate the effects of speculative execution attacks.</div><div class='add'>+This incentivizes program authors to make as few system calls as possible to</div><div class='add'>+reduce the number of times an execution path crosses a security boundary.</div><div class='add'>+</div><div class='add'>+With vectorized scrub, userspace pushes to the kernel the identity of a</div><div class='add'>+filesystem object, a list of scrub types to run against that object, and a</div><div class='add'>+simple representation of the data dependencies between the selected scrub</div><div class='add'>+types.</div><div class='add'>+The kernel executes as much of the caller's plan as it can until it hits a</div><div class='add'>+dependency that cannot be satisfied due to a corruption, and tells userspace</div><div class='add'>+how much was accomplished.</div><div class='add'>+It is hoped that ``io_uring`` will pick up enough of this functionality that</div><div class='add'>+online fsck can use that instead of adding a separate vectored scrub system</div><div class='add'>+call to XFS.</div><div class='add'>+</div><div class='add'>+The relevant patchsets are the</div><div class='add'>+`kernel vectorized scrub</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=vectorized-scrub&gt;`_</div><div class='add'>+and</div><div class='add'>+`userspace vectorized scrub</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=vectorized-scrub&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Quality of Service Targets for Scrub</div><div class='add'>+------------------------------------</div><div class='add'>+</div><div class='add'>+One serious shortcoming of the online fsck code is that the amount of time that</div><div class='add'>+it can spend in the kernel holding resource locks is basically unbounded.</div><div class='add'>+Userspace is allowed to send a fatal signal to the process which will cause</div><div class='add'>+``xfs_scrub`` to exit when it reaches a good stopping point, but there's no way</div><div class='add'>+for userspace to provide a time budget to the kernel.</div><div class='add'>+Given that the scrub codebase has helpers to detect fatal signals, it shouldn't</div><div class='add'>+be too much work to allow userspace to specify a timeout for a scrub/repair</div><div class='add'>+operation and abort the operation if it exceeds budget.</div><div class='add'>+However, most repair functions have the property that once they begin to touch</div><div class='add'>+ondisk metadata, the operation cannot be cancelled cleanly, after which a QoS</div><div class='add'>+timeout is no longer useful.</div><div class='add'>+</div><div class='add'>+Defragmenting Free Space</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Over the years, many XFS users have requested the creation of a program to</div><div class='add'>+clear a portion of the physical storage underlying a filesystem so that it</div><div class='add'>+becomes a contiguous chunk of free space.</div><div class='add'>+Call this free space defragmenter ``clearspace`` for short.</div><div class='add'>+</div><div class='add'>+The first piece the ``clearspace`` program needs is the ability to read the</div><div class='add'>+reverse mapping index from userspace.</div><div class='add'>+This already exists in the form of the ``FS_IOC_GETFSMAP`` ioctl.</div><div class='add'>+The second piece it needs is a new fallocate mode</div><div class='add'>+(``FALLOC_FL_MAP_FREE_SPACE``) that allocates the free space in a region and</div><div class='add'>+maps it to a file.</div><div class='add'>+Call this file the "space collector" file.</div><div class='add'>+The third piece is the ability to force an online repair.</div><div class='add'>+</div><div class='add'>+To clear all the metadata out of a portion of physical storage, clearspace</div><div class='add'>+uses the new fallocate map-freespace call to map any free space in that region</div><div class='add'>+to the space collector file.</div><div class='add'>+Next, clearspace finds all metadata blocks in that region by way of</div><div class='add'>+``GETFSMAP`` and issues forced repair requests on the data structure.</div><div class='add'>+This often results in the metadata being rebuilt somewhere that is not being</div><div class='add'>+cleared.</div><div class='add'>+After each relocation, clearspace calls the "map free space" function again to</div><div class='add'>+collect any newly freed space in the region being cleared.</div><div class='add'>+</div><div class='add'>+To clear all the file data out of a portion of the physical storage, clearspace</div><div class='add'>+uses the FSMAP information to find relevant file data blocks.</div><div class='add'>+Having identified a good target, it uses the ``FICLONERANGE`` call on that part</div><div class='add'>+of the file to try to share the physical space with a dummy file.</div><div class='add'>+Cloning the extent means that the original owners cannot overwrite the</div><div class='add'>+contents; any changes will be written somewhere else via copy-on-write.</div><div class='add'>+Clearspace makes its own copy of the frozen extent in an area that is not being</div><div class='add'>+cleared, and uses ``FIEDEUPRANGE`` (or the :ref:`atomic extent swap</div><div class='add'>+&lt;swapext_if_unchanged&gt;` feature) to change the target file's data extent</div><div class='add'>+mapping away from the area being cleared.</div><div class='add'>+When all other mappings have been moved, clearspace reflinks the space into the</div><div class='add'>+space collector file so that it becomes unavailable.</div><div class='add'>+</div><div class='add'>+There are further optimizations that could apply to the above algorithm.</div><div class='add'>+To clear a piece of physical storage that has a high sharing factor, it is</div><div class='add'>+strongly desirable to retain this sharing factor.</div><div class='add'>+In fact, these extents should be moved first to maximize sharing factor after</div><div class='add'>+the operation completes.</div><div class='add'>+To make this work smoothly, clearspace needs a new ioctl</div><div class='add'>+(``FS_IOC_GETREFCOUNTS``) to report reference count information to userspace.</div><div class='add'>+With the refcount information exposed, clearspace can quickly find the longest,</div><div class='add'>+most shared data extents in the filesystem, and target them first.</div><div class='add'>+</div><div class='add'>+**Future Work Question**: How might the filesystem move inode chunks?</div><div class='add'>+</div><div class='add'>+*Answer*: To move inode chunks, Dave Chinner constructed a prototype program</div><div class='add'>+that creates a new file with the old contents and then locklessly runs around</div><div class='add'>+the filesystem updating directory entries.</div><div class='add'>+The operation cannot complete if the filesystem goes down.</div><div class='add'>+That problem isn't totally insurmountable: create an inode remapping table</div><div class='add'>+hidden behind a jump label, and a log item that tracks the kernel walking the</div><div class='add'>+filesystem to update directory entries.</div><div class='add'>+The trouble is, the kernel can't do anything about open files, since it cannot</div><div class='add'>+revoke them.</div><div class='add'>+</div><div class='add'>+**Future Work Question**: Can static keys be used to minimize the cost of</div><div class='add'>+supporting ``revoke()`` on XFS files?</div><div class='add'>+</div><div class='add'>+*Answer*: Yes.</div><div class='add'>+Until the first revocation, the bailout code need not be in the call path at</div><div class='add'>+all.</div><div class='add'>+</div><div class='add'>+The relevant patchsets are the</div><div class='add'>+`kernel freespace defrag</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfs-linux.git/log/?h=defrag-freespace&gt;`_</div><div class='add'>+and</div><div class='add'>+`userspace freespace defrag</div><div class='add'>+&lt;https://git.kernel.org/pub/scm/linux/kernel/git/djwong/xfsprogs-dev.git/log/?h=defrag-freespace&gt;`_</div><div class='add'>+series.</div><div class='add'>+</div><div class='add'>+Shrinking Filesystems</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+Removing the end of the filesystem ought to be a simple matter of evacuating</div><div class='add'>+the data and metadata at the end of the filesystem, and handing the freed space</div><div class='add'>+to the shrink code.</div><div class='add'>+That requires an evacuation of the space at end of the filesystem, which is a</div><div class='add'>+use of free space defragmentation!</div><div class='head'>diff --git a/Documentation/filesystems/xfs-self-describing-metadata.rst b/Documentation/filesystems/xfs-self-describing-metadata.rst<br/>index b79dbf36dc94..a10c4ae6955e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/xfs-self-describing-metadata.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/xfs-self-describing-metadata.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/xfs-self-describing-metadata.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/xfs-self-describing-metadata.rst</a></div><div class='hunk'>@@ -1,4 +1,5 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+.. _xfs_self_describing_metadata:</div><div class='ctx'> </div><div class='ctx'> ============================</div><div class='ctx'> XFS Self Describing Metadata</div><div class='head'>diff --git a/Documentation/filesystems/zonefs.rst b/Documentation/filesystems/zonefs.rst<br/>index 6b213fe9a33e..394b9f15dce0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/zonefs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/filesystems/zonefs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/filesystems/zonefs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/filesystems/zonefs.rst</a></div><div class='hunk'>@@ -306,8 +306,15 @@ Further notes:</div><div class='ctx'> Mount options</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-zonefs define the "errors=&lt;behavior&gt;" mount option to allow the user to specify</div><div class='del'>-zonefs behavior in response to I/O errors, inode size inconsistencies or zone</div><div class='add'>+zonefs defines several mount options:</div><div class='add'>+* errors=&lt;behavior&gt;</div><div class='add'>+* explicit-open</div><div class='add'>+</div><div class='add'>+"errors=&lt;behavior&gt;" option</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The "errors=&lt;behavior&gt;" option mount option allows the user to specify zonefs</div><div class='add'>+behavior in response to I/O errors, inode size inconsistencies or zone</div><div class='ctx'> condition changes. The defined behaviors are as follow:</div><div class='ctx'> </div><div class='ctx'> * remount-ro (default)</div><div class='hunk'>@@ -326,6 +333,9 @@ discover the amount of data that has been written to the zone. In the case of a</div><div class='ctx'> read-only zone discovered at run-time, as indicated in the previous section.</div><div class='ctx'> The size of the zone file is left unchanged from its last updated value.</div><div class='ctx'> </div><div class='add'>+"explicit-open" option</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='ctx'> A zoned block device (e.g. an NVMe Zoned Namespace device) may have limits on</div><div class='ctx'> the number of zones that can be active, that is, zones that are in the</div><div class='ctx'> implicit open, explicit open or closed conditions.  This potential limitation</div><div class='hunk'>@@ -341,6 +351,44 @@ guaranteed that write requests can be processed. Conversely, the</div><div class='ctx'> to the device on the last close() of a zone file if the zone is not full nor</div><div class='ctx'> empty.</div><div class='ctx'> </div><div class='add'>+Runtime sysfs attributes</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+zonefs defines several sysfs attributes for mounted devices.  All attributes</div><div class='add'>+are user readable and can be found in the directory /sys/fs/zonefs/&lt;dev&gt;/,</div><div class='add'>+where &lt;dev&gt; is the name of the mounted zoned block device.</div><div class='add'>+</div><div class='add'>+The attributes defined are as follows.</div><div class='add'>+</div><div class='add'>+* **max_wro_seq_files**:  This attribute reports the maximum number of</div><div class='add'>+  sequential zone files that can be open for writing.  This number corresponds</div><div class='add'>+  to the maximum number of explicitly or implicitly open zones that the device</div><div class='add'>+  supports.  A value of 0 means that the device has no limit and that any zone</div><div class='add'>+  (any file) can be open for writing and written at any time, regardless of the</div><div class='add'>+  state of other zones.  When the *explicit-open* mount option is used, zonefs</div><div class='add'>+  will fail any open() system call requesting to open a sequential zone file for</div><div class='add'>+  writing when the number of sequential zone files already open for writing has</div><div class='add'>+  reached the *max_wro_seq_files* limit.</div><div class='add'>+* **nr_wro_seq_files**:  This attribute reports the current number of sequential</div><div class='add'>+  zone files open for writing.  When the "explicit-open" mount option is used,</div><div class='add'>+  this number can never exceed *max_wro_seq_files*.  If the *explicit-open*</div><div class='add'>+  mount option is not used, the reported number can be greater than</div><div class='add'>+  *max_wro_seq_files*.  In such case, it is the responsibility of the</div><div class='add'>+  application to not write simultaneously more than *max_wro_seq_files*</div><div class='add'>+  sequential zone files.  Failure to do so can result in write errors.</div><div class='add'>+* **max_active_seq_files**:  This attribute reports the maximum number of</div><div class='add'>+  sequential zone files that are in an active state, that is, sequential zone</div><div class='add'>+  files that are partially writen (not empty nor full) or that have a zone that</div><div class='add'>+  is explicitly open (which happens only if the *explicit-open* mount option is</div><div class='add'>+  used).  This number is always equal to the maximum number of active zones that</div><div class='add'>+  the device supports.  A value of 0 means that the mounted device has no limit</div><div class='add'>+  on the number of sequential zone files that can be active.</div><div class='add'>+* **nr_active_seq_files**:  This attributes reports the current number of</div><div class='add'>+  sequential zone files that are active. If *max_active_seq_files* is not 0,</div><div class='add'>+  then the value of *nr_active_seq_files* can never exceed the value of</div><div class='add'>+  *nr_active_seq_files*, regardless of the use of the *explicit-open* mount</div><div class='add'>+  option.</div><div class='add'>+</div><div class='ctx'> Zonefs User Space Tools</div><div class='ctx'> =======================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/DSD-properties-rules.rst b/Documentation/firmware-guide/acpi/DSD-properties-rules.rst<br/>index 8b2d8d0864c2..70442bc2521e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/DSD-properties-rules.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/DSD-properties-rules.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/DSD-properties-rules.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/DSD-properties-rules.rst</a></div><div class='hunk'>@@ -21,7 +21,9 @@ specific type) associated with it.</div><div class='ctx'> </div><div class='ctx'> In the ACPI _DSD context it is an element of the sub-package following the</div><div class='ctx'> generic Device Properties UUID in the _DSD return package as specified in the</div><div class='del'>-Device Properties UUID definition document [1]_.</div><div class='add'>+section titled "Well-Known _DSD UUIDs and Data Structure Formats" sub-section</div><div class='add'>+"Device Properties UUID" in _DSD (Device Specific Data) Implementation Guide</div><div class='add'>+document [1]_.</div><div class='ctx'> </div><div class='ctx'> It also may be regarded as the definition of a key and the associated data type</div><div class='ctx'> that can be returned by _DSD in the Device Properties UUID sub-package for a</div><div class='hunk'>@@ -36,7 +38,9 @@ Property subsets are nested collections of properties.  Each of them is</div><div class='ctx'> associated with an additional key (name) allowing the subset to be referred</div><div class='ctx'> to as a whole (and to be treated as a separate entity).  The canonical</div><div class='ctx'> representation of property subsets is via the mechanism specified in the</div><div class='del'>-Hierarchical Properties Extension UUID definition document [2]_.</div><div class='add'>+section titled "Well-Known _DSD UUIDs and Data Structure Formats" sub-section</div><div class='add'>+"Hierarchical Data Extension UUID" in _DSD (Device Specific Data)</div><div class='add'>+Implementation Guide document [1]_.</div><div class='ctx'> </div><div class='ctx'> Property sets may be hierarchical.  That is, a property set may contain</div><div class='ctx'> multiple property subsets that each may contain property subsets of its</div><div class='hunk'>@@ -96,5 +100,4 @@ contents.</div><div class='ctx'> References</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='del'>-.. [1] https://www.uefi.org/sites/default/files/resources/_DSD-device-properties-UUID.pdf</div><div class='del'>-.. [2] https://www.uefi.org/sites/default/files/resources/_DSD-hierarchical-data-extension-UUID-v1.1.pdf</div><div class='add'>+.. [1] https://github.com/UEFI/DSD-Guide</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/acpi-lid.rst b/Documentation/firmware-guide/acpi/acpi-lid.rst<br/>index 71b9af13a048..03cbad6c6730 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/acpi-lid.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/acpi-lid.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/acpi-lid.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/acpi-lid.rst</a></div><div class='hunk'>@@ -34,7 +34,7 @@ state upon the last _LID evaluation. There won't be difference when the</div><div class='ctx'> _LID control method is evaluated during the runtime, the problem is its</div><div class='ctx'> initial returning value. When the AML tables implement this control method</div><div class='ctx'> with cached value, the initial returning value is likely not reliable.</div><div class='del'>-There are platforms always retun "closed" as initial lid state.</div><div class='add'>+There are platforms always return "closed" as initial lid state.</div><div class='ctx'> </div><div class='ctx'> Restrictions of the lid state change notifications</div><div class='ctx'> ==================================================</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/apei/einj.rst b/Documentation/firmware-guide/acpi/apei/einj.rst<br/>index 55e2331a6438..d6b61d22f525 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/apei/einj.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/apei/einj.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/apei/einj.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/apei/einj.rst</a></div><div class='hunk'>@@ -168,7 +168,7 @@ An error injection example::</div><div class='ctx'>   0x00000008	Memory Correctable</div><div class='ctx'>   0x00000010	Memory Uncorrectable non-fatal</div><div class='ctx'>   # echo 0x12345000 &gt; param1		# Set memory address for injection</div><div class='del'>-  # echo $((-1 &lt;&lt; 12)) &gt; param2		# Mask 0xfffffffffffff000 - anywhere in this page</div><div class='add'>+  # echo 0xfffffffffffff000 &gt; param2		# Mask - anywhere in this page</div><div class='ctx'>   # echo 0x8 &gt; error_type			# Choose correctable memory error</div><div class='ctx'>   # echo 1 &gt; error_inject			# Inject now</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/chromeos-acpi-device.rst b/Documentation/firmware-guide/acpi/chromeos-acpi-device.rst<br/>new file mode 100644<br/>index 000000000000..f37fc90ce340<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/chromeos-acpi-device.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/chromeos-acpi-device.rst</a></div><div class='hunk'>@@ -0,0 +1,363 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=====================</div><div class='add'>+Chrome OS ACPI Device</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Hardware functionality specific to Chrome OS is exposed through a Chrome OS ACPI device.</div><div class='add'>+The plug and play ID of a Chrome OS ACPI device is GGL0001. GGL is a valid PNP ID of Google.</div><div class='add'>+PNP ID can be used with the ACPI devices according to the guidelines. The following ACPI</div><div class='add'>+objects are supported:</div><div class='add'>+</div><div class='add'>+.. flat-table:: Supported ACPI Objects</div><div class='add'>+   :widths: 1 2</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - Object</div><div class='add'>+     - Description</div><div class='add'>+</div><div class='add'>+   * - CHSW</div><div class='add'>+     - Chrome OS switch positions</div><div class='add'>+</div><div class='add'>+   * - HWID</div><div class='add'>+     - Chrome OS hardware ID</div><div class='add'>+</div><div class='add'>+   * - FWID</div><div class='add'>+     - Chrome OS firmware version</div><div class='add'>+</div><div class='add'>+   * - FRID</div><div class='add'>+     - Chrome OS read-only firmware version</div><div class='add'>+</div><div class='add'>+   * - BINF</div><div class='add'>+     - Chrome OS boot information</div><div class='add'>+</div><div class='add'>+   * - GPIO</div><div class='add'>+     - Chrome OS GPIO assignments</div><div class='add'>+</div><div class='add'>+   * - VBNV</div><div class='add'>+     - Chrome OS NVRAM locations</div><div class='add'>+</div><div class='add'>+   * - VDTA</div><div class='add'>+     - Chrome OS verified boot data</div><div class='add'>+</div><div class='add'>+   * - FMAP</div><div class='add'>+     - Chrome OS flashmap base address</div><div class='add'>+</div><div class='add'>+   * - MLST</div><div class='add'>+     - Chrome OS method list</div><div class='add'>+</div><div class='add'>+CHSW (Chrome OS switch positions)</div><div class='add'>+=================================</div><div class='add'>+This control method returns the switch positions for Chrome OS specific hardware switches.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+An integer containing the switch positions as bitfields:</div><div class='add'>+</div><div class='add'>+.. flat-table::</div><div class='add'>+   :widths: 1 2</div><div class='add'>+</div><div class='add'>+   * - 0x00000002</div><div class='add'>+     - Recovery button was pressed when x86 firmware booted.</div><div class='add'>+</div><div class='add'>+   * - 0x00000004</div><div class='add'>+     - Recovery button was pressed when EC firmware booted. (required if EC EEPROM is</div><div class='add'>+       rewritable; otherwise optional)</div><div class='add'>+</div><div class='add'>+   * - 0x00000020</div><div class='add'>+     - Developer switch was enabled when x86 firmware booted.</div><div class='add'>+</div><div class='add'>+   * - 0x00000200</div><div class='add'>+     - Firmware write protection was disabled when x86 firmware booted. (required if</div><div class='add'>+       firmware write protection is controlled through x86 BIOS; otherwise optional)</div><div class='add'>+</div><div class='add'>+All other bits are reserved and should be set to 0.</div><div class='add'>+</div><div class='add'>+HWID (Chrome OS hardware ID)</div><div class='add'>+============================</div><div class='add'>+This control method returns the hardware ID for the Chromebook.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+A null-terminated ASCII string containing the hardware ID from the Model-Specific Data area of</div><div class='add'>+EEPROM.</div><div class='add'>+</div><div class='add'>+Note that the hardware ID can be up to 256 characters long, including the terminating null.</div><div class='add'>+</div><div class='add'>+FWID (Chrome OS firmware version)</div><div class='add'>+=================================</div><div class='add'>+This control method returns the firmware version for the rewritable portion of the main</div><div class='add'>+processor firmware.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+A null-terminated ASCII string containing the complete firmware version for the rewritable</div><div class='add'>+portion of the main processor firmware.</div><div class='add'>+</div><div class='add'>+FRID (Chrome OS read-only firmware version)</div><div class='add'>+===========================================</div><div class='add'>+This control method returns the firmware version for the read-only portion of the main</div><div class='add'>+processor firmware.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+A null-terminated ASCII string containing the complete firmware version for the read-only</div><div class='add'>+(bootstrap + recovery ) portion of the main processor firmware.</div><div class='add'>+</div><div class='add'>+BINF (Chrome OS boot information)</div><div class='add'>+=================================</div><div class='add'>+This control method returns information about the current boot.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+   Package {</div><div class='add'>+           Reserved1</div><div class='add'>+           Reserved2</div><div class='add'>+           Active EC Firmware</div><div class='add'>+           Active Main Firmware Type</div><div class='add'>+           Reserved5</div><div class='add'>+   }</div><div class='add'>+</div><div class='add'>+.. flat-table::</div><div class='add'>+   :widths: 1 1 2</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - Field</div><div class='add'>+     - Format</div><div class='add'>+     - Description</div><div class='add'>+</div><div class='add'>+   * - Reserved1</div><div class='add'>+     - DWORD</div><div class='add'>+     - Set to 256 (0x100). This indicates this field is no longer used.</div><div class='add'>+</div><div class='add'>+   * - Reserved2</div><div class='add'>+     - DWORD</div><div class='add'>+     - Set to 256 (0x100). This indicates this field is no longer used.</div><div class='add'>+</div><div class='add'>+   * - Active EC firmware</div><div class='add'>+     - DWORD</div><div class='add'>+     - The EC firmware which was used during boot.</div><div class='add'>+</div><div class='add'>+       - 0 - Read-only (recovery) firmware</div><div class='add'>+       - 1 - Rewritable firmware.</div><div class='add'>+</div><div class='add'>+       Set to 0 if EC firmware is always read-only.</div><div class='add'>+</div><div class='add'>+   * - Active Main Firmware Type</div><div class='add'>+     - DWORD</div><div class='add'>+     - The main firmware type which was used during boot.</div><div class='add'>+</div><div class='add'>+       - 0 - Recovery</div><div class='add'>+       - 1 - Normal</div><div class='add'>+       - 2 - Developer</div><div class='add'>+       - 3 - netboot (factory installation only)</div><div class='add'>+</div><div class='add'>+       Other values are reserved.</div><div class='add'>+</div><div class='add'>+   * - Reserved5</div><div class='add'>+     - DWORD</div><div class='add'>+     - Set to 256 (0x100). This indicates this field is no longer used.</div><div class='add'>+</div><div class='add'>+GPIO (Chrome OS GPIO assignments)</div><div class='add'>+=================================</div><div class='add'>+This control method returns information about Chrome OS specific GPIO assignments for</div><div class='add'>+Chrome OS hardware, so the kernel can directly control that hardware.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+        Package {</div><div class='add'>+                Package {</div><div class='add'>+                        // First GPIO assignment</div><div class='add'>+                        Signal Type        //DWORD</div><div class='add'>+                        Attributes         //DWORD</div><div class='add'>+                        Controller Offset  //DWORD</div><div class='add'>+                        Controller Name    //ASCIIZ</div><div class='add'>+                },</div><div class='add'>+                ...</div><div class='add'>+                Package {</div><div class='add'>+                        // Last GPIO assignment</div><div class='add'>+                        Signal Type        //DWORD</div><div class='add'>+                        Attributes         //DWORD</div><div class='add'>+                        Controller Offset  //DWORD</div><div class='add'>+                        Controller Name    //ASCIIZ</div><div class='add'>+                }</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+Where ASCIIZ means a null-terminated ASCII string.</div><div class='add'>+</div><div class='add'>+.. flat-table::</div><div class='add'>+   :widths: 1 1 2</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - Field</div><div class='add'>+     - Format</div><div class='add'>+     - Description</div><div class='add'>+</div><div class='add'>+   * - Signal Type</div><div class='add'>+     - DWORD</div><div class='add'>+     - Type of GPIO signal</div><div class='add'>+</div><div class='add'>+       - 0x00000001 - Recovery button</div><div class='add'>+       - 0x00000002 - Developer mode switch</div><div class='add'>+       - 0x00000003 - Firmware write protection switch</div><div class='add'>+       - 0x00000100 - Debug header GPIO 0</div><div class='add'>+       - ...</div><div class='add'>+       - 0x000001FF - Debug header GPIO 255</div><div class='add'>+</div><div class='add'>+       Other values are reserved.</div><div class='add'>+</div><div class='add'>+   * - Attributes</div><div class='add'>+     - DWORD</div><div class='add'>+     - Signal attributes as bitfields:</div><div class='add'>+</div><div class='add'>+       - 0x00000001 - Signal is active-high (for button, a GPIO value</div><div class='add'>+         of 1 means the button is pressed; for switches, a GPIO value</div><div class='add'>+         of 1 means the switch is enabled). If this bit is 0, the signal</div><div class='add'>+         is active low. Set to 0 for debug header GPIOs.</div><div class='add'>+</div><div class='add'>+   * - Controller Offset</div><div class='add'>+     - DWORD</div><div class='add'>+     - GPIO number on the specified controller.</div><div class='add'>+</div><div class='add'>+   * - Controller Name</div><div class='add'>+     - ASCIIZ</div><div class='add'>+     - Name of the controller for the GPIO.</div><div class='add'>+       Currently supported names:</div><div class='add'>+       "NM10" - Intel NM10 chip</div><div class='add'>+</div><div class='add'>+VBNV (Chrome OS NVRAM locations)</div><div class='add'>+================================</div><div class='add'>+This control method returns information about the NVRAM (CMOS) locations used to</div><div class='add'>+communicate with the BIOS.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+        Package {</div><div class='add'>+                NV Storage Block Offset  //DWORD</div><div class='add'>+                NV Storage Block Size    //DWORD</div><div class='add'>+        }</div><div class='add'>+</div><div class='add'>+.. flat-table::</div><div class='add'>+   :widths: 1 1 2</div><div class='add'>+   :header-rows: 1</div><div class='add'>+</div><div class='add'>+   * - Field</div><div class='add'>+     - Format</div><div class='add'>+     - Description</div><div class='add'>+</div><div class='add'>+   * - NV Storage Block Offset</div><div class='add'>+     - DWORD</div><div class='add'>+     - Offset in CMOS bank 0 of the verified boot non-volatile storage block, counting from</div><div class='add'>+       the first writable CMOS byte (that is, offset=0 is the byte following the 14 bytes of</div><div class='add'>+       clock data).</div><div class='add'>+</div><div class='add'>+   * - NV Storage Block Size</div><div class='add'>+     - DWORD</div><div class='add'>+     - Size in bytes of the verified boot non-volatile storage block.</div><div class='add'>+</div><div class='add'>+FMAP (Chrome OS flashmap address)</div><div class='add'>+=================================</div><div class='add'>+This control method returns the physical memory address of the start of the main processor</div><div class='add'>+firmware flashmap.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+NoneResult code:</div><div class='add'>+----------------</div><div class='add'>+A DWORD containing the physical memory address of the start of the main processor firmware</div><div class='add'>+flashmap.</div><div class='add'>+</div><div class='add'>+VDTA (Chrome OS verified boot data)</div><div class='add'>+===================================</div><div class='add'>+This control method returns the verified boot data block shared between the firmware</div><div class='add'>+verification step and the kernel verification step.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+A buffer containing the verified boot data block.</div><div class='add'>+</div><div class='add'>+MECK (Management Engine Checksum)</div><div class='add'>+=================================</div><div class='add'>+This control method returns the SHA-1 or SHA-256 hash that is read out of the Management</div><div class='add'>+Engine extended registers during boot. The hash is exported via ACPI so the OS can verify that</div><div class='add'>+the ME firmware has not changed. If Management Engine is not present, or if the firmware was</div><div class='add'>+unable to read the extended registers, this buffer can be zero.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+A buffer containing the ME hash.</div><div class='add'>+</div><div class='add'>+MLST (Chrome OS method list)</div><div class='add'>+============================</div><div class='add'>+This control method returns a list of the other control methods supported by the Chrome OS</div><div class='add'>+hardware device.</div><div class='add'>+</div><div class='add'>+Arguments:</div><div class='add'>+----------</div><div class='add'>+None</div><div class='add'>+</div><div class='add'>+Result code:</div><div class='add'>+------------</div><div class='add'>+A package containing a list of null-terminated ASCII strings, one for each control method</div><div class='add'>+supported by the Chrome OS hardware device, not including the MLST method itself.</div><div class='add'>+For this version of the specification, the result is:</div><div class='add'>+</div><div class='add'>+.. code-block::</div><div class='add'>+</div><div class='add'>+        Package {</div><div class='add'>+                "CHSW",</div><div class='add'>+                "FWID",</div><div class='add'>+                "HWID",</div><div class='add'>+                "FRID",</div><div class='add'>+                "BINF",</div><div class='add'>+                "GPIO",</div><div class='add'>+                "VBNV",</div><div class='add'>+                "FMAP",</div><div class='add'>+                "VDTA",</div><div class='add'>+                "MECK"</div><div class='add'>+        }</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/enumeration.rst b/Documentation/firmware-guide/acpi/enumeration.rst<br/>index 47fb4d6d4557..56d9913a3370 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/enumeration.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/enumeration.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/enumeration.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/enumeration.rst</a></div><div class='hunk'>@@ -19,9 +19,9 @@ possible we decided to do following:</div><div class='ctx'>     platform devices.</div><div class='ctx'> </div><div class='ctx'>   - Devices behind real busses where there is a connector resource</div><div class='del'>-    are represented as struct spi_device or struct i2c_device. Note</div><div class='add'>+    are represented as struct spi_device or struct i2c_client. Note</div><div class='ctx'>     that standard UARTs are not busses so there is no struct uart_device,</div><div class='del'>-    although some of them may be represented by sturct serdev_device.</div><div class='add'>+    although some of them may be represented by struct serdev_device.</div><div class='ctx'> </div><div class='ctx'> As both ACPI and Device Tree represent a tree of devices (and their</div><div class='ctx'> resources) this implementation follows the Device Tree way as much as</div><div class='hunk'>@@ -167,8 +167,7 @@ The table below shows an example of its usage::</div><div class='ctx'>         Name (_DSD, Package () {</div><div class='ctx'>             ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),</div><div class='ctx'>             Package () {</div><div class='del'>-                Package () {"interrupt-names",</div><div class='del'>-                Package (2) {"default", "alert"}},</div><div class='add'>+                Package () { "interrupt-names", Package () { "default", "alert" } },</div><div class='ctx'>             }</div><div class='ctx'>         ...</div><div class='ctx'>         })</div><div class='hunk'>@@ -206,7 +205,7 @@ Here is what the ACPI namespace for a SPI slave might look like::</div><div class='ctx'> 		}</div><div class='ctx'> 		...</div><div class='ctx'> </div><div class='del'>-The SPI device drivers only need to add ACPI IDs in a similar way than with</div><div class='add'>+The SPI device drivers only need to add ACPI IDs in a similar way to</div><div class='ctx'> the platform device drivers. Below is an example where we add ACPI support</div><div class='ctx'> to at25 SPI eeprom driver (this is meant for the above ACPI snippet)::</div><div class='ctx'> </div><div class='hunk'>@@ -363,7 +362,7 @@ These GPIO numbers are controller relative and path "\\_SB.PCI0.GPI0"</div><div class='ctx'> specifies the path to the controller. In order to use these GPIOs in Linux</div><div class='ctx'> we need to translate them to the corresponding Linux GPIO descriptors.</div><div class='ctx'> </div><div class='del'>-There is a standard GPIO API for that and is documented in</div><div class='add'>+There is a standard GPIO API for that and it is documented in</div><div class='ctx'> Documentation/admin-guide/gpio/.</div><div class='ctx'> </div><div class='ctx'> In the above example we can get the corresponding two GPIO descriptors with</div><div class='hunk'>@@ -390,6 +389,31 @@ descriptors once the device is released.</div><div class='ctx'> See Documentation/firmware-guide/acpi/gpio-properties.rst for more information</div><div class='ctx'> about the _DSD binding related to GPIOs.</div><div class='ctx'> </div><div class='add'>+RS-485 support</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+ACPI _DSD (Device Specific Data) can be used to describe RS-485 capability</div><div class='add'>+of UART.</div><div class='add'>+</div><div class='add'>+For example::</div><div class='add'>+</div><div class='add'>+	Device (DEV)</div><div class='add'>+	{</div><div class='add'>+		...</div><div class='add'>+</div><div class='add'>+		// ACPI 5.1 _DSD used for RS-485 capabilities</div><div class='add'>+		Name (_DSD, Package ()</div><div class='add'>+		{</div><div class='add'>+			ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),</div><div class='add'>+			Package ()</div><div class='add'>+			{</div><div class='add'>+				Package () {"rs485-rts-active-low", Zero},</div><div class='add'>+				Package () {"rs485-rx-active-high", Zero},</div><div class='add'>+				Package () {"rs485-rx-during-tx", Zero},</div><div class='add'>+			}</div><div class='add'>+		})</div><div class='add'>+		...</div><div class='add'>+</div><div class='ctx'> MFD devices</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='hunk'>@@ -514,8 +538,8 @@ information.</div><div class='ctx'> PCI hierarchy representation</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='del'>-Sometimes could be useful to enumerate a PCI device, knowing its position on the</div><div class='del'>-PCI bus.</div><div class='add'>+Sometimes it could be useful to enumerate a PCI device, knowing its position on</div><div class='add'>+the PCI bus.</div><div class='ctx'> </div><div class='ctx'> For example, some systems use PCI devices soldered directly on the mother board,</div><div class='ctx'> in a fixed position (ethernet, Wi-Fi, serial ports, etc.). In this conditions it</div><div class='hunk'>@@ -526,7 +550,7 @@ To identify a PCI device, a complete hierarchical description is required, from</div><div class='ctx'> the chipset root port to the final device, through all the intermediate</div><div class='ctx'> bridges/switches of the board.</div><div class='ctx'> </div><div class='del'>-For example, let us assume to have a system with a PCIe serial port, an</div><div class='add'>+For example, let's assume we have a system with a PCIe serial port, an</div><div class='ctx'> Exar XR17V3521, soldered on the main board. This UART chip also includes</div><div class='ctx'> 16 GPIOs and we want to add the property ``gpio-line-names`` [1] to these pins.</div><div class='ctx'> In this case, the ``lspci`` output for this component is::</div><div class='hunk'>@@ -569,8 +593,8 @@ of the chipset bridge (also called "root port") with address::</div><div class='ctx'> </div><div class='ctx'> 	Bus: 0 - Device: 14 - Function: 1</div><div class='ctx'> </div><div class='del'>-To find this information is necessary disassemble the BIOS ACPI tables, in</div><div class='del'>-particular the DSDT (see also [2])::</div><div class='add'>+To find this information, it is necessary to disassemble the BIOS ACPI tables,</div><div class='add'>+in particular the DSDT (see also [2])::</div><div class='ctx'> </div><div class='ctx'> 	mkdir ~/tables/</div><div class='ctx'> 	cd ~/tables/</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/gpio-properties.rst b/Documentation/firmware-guide/acpi/gpio-properties.rst<br/>index eaec732cc77c..db0c0b1f3700 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/gpio-properties.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/gpio-properties.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/gpio-properties.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/gpio-properties.rst</a></div><div class='hunk'>@@ -67,17 +67,30 @@ state of the output pin which driver should use during its initialization.</div><div class='ctx'> Linux tries to use common sense here and derives the state from the bias</div><div class='ctx'> and polarity settings. The table below shows the expectations:</div><div class='ctx'> </div><div class='del'>-=========  =============  ==============</div><div class='del'>-Pull Bias     Polarity     Requested...</div><div class='del'>-=========  =============  ==============</div><div class='del'>-Implicit     x            AS IS (assumed firmware configured for us)</div><div class='del'>-Explicit     x (no _DSD)  as Pull Bias (Up == High, Down == Low),</div><div class='del'>-                          assuming non-active (Polarity = !Pull Bias)</div><div class='del'>-Down         Low          as low, assuming active</div><div class='del'>-Down         High         as low, assuming non-active</div><div class='del'>-Up           Low          as high, assuming non-active</div><div class='del'>-Up           High         as high, assuming active</div><div class='del'>-=========  =============  ==============</div><div class='add'>++-------------+-------------+-----------------------------------------------+</div><div class='add'>+| Pull Bias   | Polarity    | Requested...                                  |</div><div class='add'>++=============+=============+===============================================+</div><div class='add'>+| Implicit                                                                  |</div><div class='add'>++-------------+-------------+-----------------------------------------------+</div><div class='add'>+| **Default** | x           | AS IS (assumed firmware configured it for us) |</div><div class='add'>++-------------+-------------+-----------------------------------------------+</div><div class='add'>+| Explicit                                                                  |</div><div class='add'>++-------------+-------------+-----------------------------------------------+</div><div class='add'>+| **None**    | x           | AS IS (assumed firmware configured it for us) |</div><div class='add'>+|             |             | with no Pull Bias                             |</div><div class='add'>++-------------+-------------+-----------------------------------------------+</div><div class='add'>+| **Up**      | x (no _DSD) |                                               |</div><div class='add'>+|             +-------------+ as high, assuming non-active                  |</div><div class='add'>+|             | Low         |                                               |</div><div class='add'>+|             +-------------+-----------------------------------------------+</div><div class='add'>+|             | High        | as high, assuming active                      |</div><div class='add'>++-------------+-------------+-----------------------------------------------+</div><div class='add'>+| **Down**    | x (no _DSD) |                                               |</div><div class='add'>+|             +-------------+ as low, assuming non-active                   |</div><div class='add'>+|             | High        |                                               |</div><div class='add'>+|             +-------------+-----------------------------------------------+</div><div class='add'>+|             | Low         | as low, assuming active                       |</div><div class='add'>++-------------+-------------+-----------------------------------------------+</div><div class='ctx'> </div><div class='ctx'> That said, for our above example the both GPIOs, since the bias setting</div><div class='ctx'> is explicit and _DSD is present, will be treated as active with a high</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/index.rst b/Documentation/firmware-guide/acpi/index.rst<br/>index b053b0c3d696..b6a42f4ffe03 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/index.rst</a></div><div class='hunk'>@@ -29,3 +29,4 @@ ACPI Support</div><div class='ctx'>    non-d0-probe</div><div class='ctx'>    extcon-intel-int3496</div><div class='ctx'>    intel-pmc-mux</div><div class='add'>+   chromeos-acpi-device</div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/namespace.rst b/Documentation/firmware-guide/acpi/namespace.rst<br/>index 6193582a2204..4ef963679a3d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/namespace.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/namespace.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/namespace.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/namespace.rst</a></div><div class='hunk'>@@ -31,7 +31,7 @@ Description Table).  The XSDT always points to the FADT (Fixed ACPI</div><div class='ctx'> Description Table) using its first entry, the data within the FADT</div><div class='ctx'> includes various fixed-length entries that describe fixed ACPI features</div><div class='ctx'> of the hardware.  The FADT contains a pointer to the DSDT</div><div class='del'>-(Differentiated System Descripition Table).  The XSDT also contains</div><div class='add'>+(Differentiated System Description Table).  The XSDT also contains</div><div class='ctx'> entries pointing to possibly multiple SSDTs (Secondary System</div><div class='ctx'> Description Table).</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/firmware-guide/acpi/osi.rst b/Documentation/firmware-guide/acpi/osi.rst<br/>index 05869c0045d7..784850adfcb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/osi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/firmware-guide/acpi/osi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/firmware-guide/acpi/osi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/firmware-guide/acpi/osi.rst</a></div><div class='hunk'>@@ -41,26 +41,23 @@ But it is likely that they will all eventually be added.</div><div class='ctx'> What should an OEM do if they want to support Linux and Windows</div><div class='ctx'> using the same BIOS image?  Often they need to do something different</div><div class='ctx'> for Linux to deal with how Linux is different from Windows.</div><div class='del'>-Here the BIOS should ask exactly what it wants to know:</div><div class='ctx'> </div><div class='add'>+In this case, the OEM should create custom ASL to be executed by the</div><div class='add'>+Linux kernel and changes to Linux kernel drivers to execute this custom</div><div class='add'>+ASL.  The easiest way to accomplish this is to introduce a device specific</div><div class='add'>+method (_DSM) that is called from the Linux kernel.</div><div class='add'>+</div><div class='add'>+In the past the kernel used to support something like:</div><div class='ctx'> _OSI("Linux-OEM-my_interface_name")</div><div class='ctx'> where 'OEM' is needed if this is an OEM-specific hook,</div><div class='ctx'> and 'my_interface_name' describes the hook, which could be a</div><div class='ctx'> quirk, a bug, or a bug-fix.</div><div class='ctx'> </div><div class='del'>-In addition, the OEM should send a patch to upstream Linux</div><div class='del'>-via the linux-acpi@vger.kernel.org mailing list.  When that patch</div><div class='del'>-is checked into Linux, the OS will answer "YES" when the BIOS</div><div class='del'>-on the OEM's system uses _OSI to ask if the interface is supported</div><div class='del'>-by the OS.  Linux distributors can back-port that patch for Linux</div><div class='del'>-pre-installs, and it will be included by all distributions that</div><div class='del'>-re-base to upstream.  If the distribution can not update the kernel binary,</div><div class='del'>-they can also add an acpi_osi=Linux-OEM-my_interface_name</div><div class='del'>-cmdline parameter to the boot loader, as needed.</div><div class='del'>-</div><div class='del'>-If the string refers to a feature where the upstream kernel</div><div class='del'>-eventually grows support, a patch should be sent to remove</div><div class='del'>-the string when that support is added to the kernel.</div><div class='add'>+However this was discovered to be abused by other BIOS vendors to change</div><div class='add'>+completely unrelated code on completely unrelated systems.  This prompted</div><div class='add'>+an evaluation of all of it's uses. This uncovered that they aren't needed</div><div class='add'>+for any of the original reasons. As such, the kernel will not respond to</div><div class='add'>+any custom Linux-* strings by default.</div><div class='ctx'> </div><div class='ctx'> That was easy.  Read on, to find out how to do it wrong.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst<br/>index ef9eec71f6f3..80255e2dc3e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/fpga/dfl.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/fpga/dfl.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/fpga/dfl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/fpga/dfl.rst</a></div><div class='hunk'>@@ -75,6 +75,125 @@ convenient for software to locate each feature by walking through this list,</div><div class='ctx'> and can be implemented in register regions of any FPGA device.</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Device Feature Header - Version 0</div><div class='add'>+=================================</div><div class='add'>+Version 0 (DFHv0) is the original version of the Device Feature Header.</div><div class='add'>+All multi-byte quantities in DFHv0 are little-endian.</div><div class='add'>+The format of DFHv0 is shown below::</div><div class='add'>+</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID 0| 0x00</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63                                 GUID_L                             0| 0x08</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63                                 GUID_H                             0| 0x10</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+- Offset 0x00</div><div class='add'>+</div><div class='add'>+  * Type - The type of DFH (e.g. FME, AFU, or private feature).</div><div class='add'>+  * DFH VER - The version of the DFH.</div><div class='add'>+  * Rsvd - Currently unused.</div><div class='add'>+  * EOL - Set if the DFH is the end of the Device Feature List (DFL).</div><div class='add'>+  * Next - The offset in bytes of the next DFH in the DFL from the DFH start,</div><div class='add'>+    and the start of a DFH must be aligned to an 8 byte boundary.</div><div class='add'>+    If EOL is set, Next is the size of MMIO of the last feature in the list.</div><div class='add'>+  * REV - The revision of the feature associated with this header.</div><div class='add'>+  * ID - The feature ID if Type is private feature.</div><div class='add'>+</div><div class='add'>+- Offset 0x08</div><div class='add'>+</div><div class='add'>+  * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier</div><div class='add'>+    (present only if Type is FME or AFU).</div><div class='add'>+</div><div class='add'>+- Offset 0x10</div><div class='add'>+</div><div class='add'>+  * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier</div><div class='add'>+    (present only if Type is FME or AFU).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Device Feature Header - Version 1</div><div class='add'>+=================================</div><div class='add'>+Version 1 (DFHv1) of the Device Feature Header adds the following functionality:</div><div class='add'>+</div><div class='add'>+* Provides a standardized mechanism for features to describe</div><div class='add'>+  parameters/capabilities to software.</div><div class='add'>+* Standardize the use of a GUID for all DFHv1 types.</div><div class='add'>+* Decouples the DFH location from the register space of the feature itself.</div><div class='add'>+</div><div class='add'>+All multi-byte quantities in DFHv1 are little-endian.</div><div class='add'>+The format of Version 1 of the Device Feature Header (DFH) is shown below::</div><div class='add'>+</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63 Type 60|59 DFH VER 52|51 Rsvd 41|40 EOL|39 Next 16|15 REV 12|11 ID 0| 0x00</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63                                 GUID_L                             0| 0x08</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63                                 GUID_H                             0| 0x10</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63                   Reg Address/Offset                      1|  Rel  0| 0x18</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63        Reg Size       32|Params 31|30 Group    16|15 Instance      0| 0x20</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63 Next    35|34RSV33|EOP32|31 Param Version 16|15 Param ID           0| 0x28</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63                 Parameter Data                                     0| 0x30</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+                                  ...</div><div class='add'>+</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63 Next    35|34RSV33|EOP32|31 Param Version 16|15 Param ID           0|</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+    |63                 Parameter Data                                     0|</div><div class='add'>+    +-----------------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+- Offset 0x00</div><div class='add'>+</div><div class='add'>+  * Type - The type of DFH (e.g. FME, AFU, or private feature).</div><div class='add'>+  * DFH VER - The version of the DFH.</div><div class='add'>+  * Rsvd - Currently unused.</div><div class='add'>+  * EOL - Set if the DFH is the end of the Device Feature List (DFL).</div><div class='add'>+  * Next - The offset in bytes of the next DFH in the DFL from the DFH start,</div><div class='add'>+    and the start of a DFH must be aligned to an 8 byte boundary.</div><div class='add'>+    If EOL is set, Next is the size of MMIO of the last feature in the list.</div><div class='add'>+  * REV - The revision of the feature associated with this header.</div><div class='add'>+  * ID - The feature ID if Type is private feature.</div><div class='add'>+</div><div class='add'>+- Offset 0x08</div><div class='add'>+</div><div class='add'>+  * GUID_L - Least significant 64 bits of a 128-bit Globally Unique Identifier.</div><div class='add'>+</div><div class='add'>+- Offset 0x10</div><div class='add'>+</div><div class='add'>+  * GUID_H - Most significant 64 bits of a 128-bit Globally Unique Identifier.</div><div class='add'>+</div><div class='add'>+- Offset 0x18</div><div class='add'>+</div><div class='add'>+  * Reg Address/Offset - If Rel bit is set, then the value is the high 63 bits</div><div class='add'>+    of a 16-bit aligned absolute address of the feature's registers. Otherwise</div><div class='add'>+    the value is the offset from the start of the DFH of the feature's registers.</div><div class='add'>+</div><div class='add'>+- Offset 0x20</div><div class='add'>+</div><div class='add'>+  * Reg Size - Size of feature's register set in bytes.</div><div class='add'>+  * Params - Set if DFH has a list of parameter blocks.</div><div class='add'>+  * Group - Id of group if feature is part of a group.</div><div class='add'>+  * Instance - Id of feature instance within a group.</div><div class='add'>+</div><div class='add'>+- Offset 0x28 if feature has parameters</div><div class='add'>+</div><div class='add'>+  * Next - Offset to the next parameter block in 8 byte words. If EOP set,</div><div class='add'>+    size in 8 byte words of last parameter.</div><div class='add'>+  * Param Version - Version of Param ID.</div><div class='add'>+  * Param ID - ID of parameter.</div><div class='add'>+</div><div class='add'>+- Offset 0x30</div><div class='add'>+</div><div class='add'>+  * Parameter Data - Parameter data whose size and format is defined by</div><div class='add'>+    version and ID of the parameter.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> FIU - FME (FPGA Management Engine)</div><div class='ctx'> ==================================</div><div class='ctx'> The FPGA Management Engine performs reconfiguration and other infrastructure</div><div class='hunk'>@@ -502,6 +621,11 @@ Developer only needs to provide a sub feature driver with matched feature id.</div><div class='ctx'> FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)</div><div class='ctx'> could be a reference.</div><div class='ctx'> </div><div class='add'>+Please refer to below link to existing feature id table and guide for new feature</div><div class='add'>+ids application.</div><div class='add'>+https://github.com/OPAE/dfl-feature-id</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Location of DFLs on a PCI Device</div><div class='ctx'> ================================</div><div class='ctx'> The original method for finding a DFL on a PCI device assumed the start of the</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/amdgpu-glossary.rst b/Documentation/gpu/amdgpu/amdgpu-glossary.rst<br/>index 859dcec6c6f9..00a47ebb0b0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/amdgpu-glossary.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/amdgpu/amdgpu-glossary.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/amdgpu-glossary.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/amdgpu-glossary.rst</a></div><div class='hunk'>@@ -8,12 +8,19 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'> </div><div class='ctx'> .. glossary::</div><div class='ctx'> </div><div class='add'>+    active_cu_number</div><div class='add'>+      The number of CUs that are active on the system.  The number of active</div><div class='add'>+      CUs may be less than SE * SH * CU depending on the board configuration.</div><div class='add'>+</div><div class='ctx'>     CP</div><div class='ctx'>       Command Processor</div><div class='ctx'> </div><div class='ctx'>     CPLIB</div><div class='ctx'>       Content Protection Library</div><div class='ctx'> </div><div class='add'>+    CU</div><div class='add'>+      Compute Unit</div><div class='add'>+</div><div class='ctx'>     DFS</div><div class='ctx'>       Digital Frequency Synthesizer</div><div class='ctx'> </div><div class='hunk'>@@ -23,12 +30,35 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     EOP</div><div class='ctx'>       End Of Pipe/Pipeline</div><div class='ctx'> </div><div class='add'>+    GART</div><div class='add'>+      Graphics Address Remapping Table.  This is the name we use for the GPUVM</div><div class='add'>+      page table used by the GPU kernel driver.  It remaps system resources</div><div class='add'>+      (memory or MMIO space) into the GPU's address space so the GPU can access</div><div class='add'>+      them.  The name GART harkens back to the days of AGP when the platform</div><div class='add'>+      provided an MMU that the GPU could use to get a contiguous view of</div><div class='add'>+      scattered pages for DMA.  The MMU has since moved on to the GPU, but the</div><div class='add'>+      name stuck.</div><div class='add'>+</div><div class='ctx'>     GC</div><div class='ctx'>       Graphics and Compute</div><div class='ctx'> </div><div class='ctx'>     GMC</div><div class='ctx'>       Graphic Memory Controller</div><div class='ctx'> </div><div class='add'>+    GPUVM</div><div class='add'>+      GPU Virtual Memory.  This is the GPU's MMU.  The GPU supports multiple</div><div class='add'>+      virtual address spaces that can be in flight at any given time.  These</div><div class='add'>+      allow the GPU to remap VRAM and system resources into GPU virtual address</div><div class='add'>+      spaces for use by the GPU kernel driver and applications using the GPU.</div><div class='add'>+      These provide memory protection for different applications using the GPU.</div><div class='add'>+</div><div class='add'>+    GTT</div><div class='add'>+      Graphics Translation Tables.  This is a memory pool managed through TTM</div><div class='add'>+      which provides access to system resources (memory or MMIO space) for</div><div class='add'>+      use by the GPU. These addresses can be mapped into the "GART" GPUVM page</div><div class='add'>+      table for use by the kernel driver or into per process GPUVM page tables</div><div class='add'>+      for application usage.</div><div class='add'>+</div><div class='ctx'>     IH</div><div class='ctx'>       Interrupt Handler</div><div class='ctx'> </div><div class='hunk'>@@ -68,12 +98,18 @@ we have a dedicated glossary for Display Core at</div><div class='ctx'>     PSP</div><div class='ctx'>         Platform Security Processor</div><div class='ctx'> </div><div class='del'>-    RCL</div><div class='add'>+    RLC</div><div class='ctx'>       RunList Controller</div><div class='ctx'> </div><div class='ctx'>     SDMA</div><div class='ctx'>       System DMA</div><div class='ctx'> </div><div class='add'>+    SE</div><div class='add'>+      Shader Engine</div><div class='add'>+</div><div class='add'>+    SH</div><div class='add'>+      SHader array</div><div class='add'>+</div><div class='ctx'>     SMU</div><div class='ctx'>       System Management Unit</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/amdgpu/apu-asic-info-table.csv b/Documentation/gpu/amdgpu/apu-asic-info-table.csv<br/>new file mode 100644<br/>index 000000000000..395a7b7bfaef<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/apu-asic-info-table.csv?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/apu-asic-info-table.csv</a></div><div class='hunk'>@@ -0,0 +1,10 @@</div><div class='add'>+Product Name, Code Reference, DCN/DCE version, GC version, VCE/UVD/VCN version, SDMA version, MP0 version</div><div class='add'>+Radeon R* Graphics, CARRIZO/STONEY, DCE 11, 8, VCE 3 / UVD 6, 3, n/a</div><div class='add'>+Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN/PICASSO, DCN 1.0, 9.1.0, VCN 1.0, 4.1.0, 10.0.0</div><div class='add'>+Ryzen 4000 series, RENOIR, DCN 2.1, 9.3, VCN 2.2, 4.1.2, 11.0.3</div><div class='add'>+Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx, RAVEN2, DCN 1.0, 9.2.2, VCN 1.0.1, 4.1.1, 10.0.1</div><div class='add'>+SteamDeck, VANGOGH, DCN 3.0.1, 10.3.1, VCN 3.1.0, 5.2.1, 11.5.0</div><div class='add'>+Ryzen 5000 series / Ryzen 7x30 series, GREEN SARDINE / Cezanne / Barcelo / Barcelo-R, DCN 2.1, 9.3, VCN 2.2, 4.1.1, 12.0.1</div><div class='add'>+Ryzen 6000 series / Ryzen 7x35 series, YELLOW CARP / Rembrandt / Rembrandt+, 3.1.2, 10.3.3, VCN 3.1.1, 5.2.3, 13.0.3</div><div class='add'>+Ryzen 7000 series (AM5), Raphael, 3.1.5, 10.3.6, 3.1.2, 5.2.6, 13.0.5</div><div class='add'>+Ryzen 7x20 series, Mendocino, 3.1.6, 10.3.7, 3.1.1, 5.2.7, 13.0.8</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv b/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv<br/>new file mode 100644<br/>index 000000000000..882d2518f8ed<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/dgpu-asic-info-table.csv?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/dgpu-asic-info-table.csv</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+Product Name, Code Reference, DCN/DCE version, GC version, VCN version, SDMA version</div><div class='add'>+AMD Radeon (TM) HD 8500M/ 8600M /M200 /M320 /M330 /M335 Series, HAINAN, --,  6, --, --</div><div class='add'>+AMD Radeon HD 7800 /7900 /FireGL Series, TAHITI, DCE 6, 6, VCE 1 / UVD 3, --</div><div class='add'>+AMD Radeon R7 (TM|HD) M265 /M370 /8500M /8600 /8700 /8700M, OLAND, DCE 6, 6, VCE 1 / UVD 3, --</div><div class='add'>+AMD Radeon (TM) (HD|R7) 7800 /7970 /8800 /8970 /370/ Series, PITCAIRN, DCE 6, 6, VCE 1 / UVD 3, --</div><div class='add'>+AMD Radeon (TM|R7|R9|HD) E8860 /M360 /7700 /7800 /8800 /9000(M) /W4100 Series, VERDE, DCE 6, 6, VCE 1 / UVD 3, --</div><div class='add'>+AMD Radeon HD M280X /M380 /7700 /8950 /W5100, BONAIRE, DCE 8, 7, VCE 2 / UVD 4.2, 1</div><div class='add'>+AMD Radeon (R9|TM) 200 /390 /W8100 /W9100 Series, HAWAII, DCE 8, 7, VCE 2 / UVD 4.2, 1</div><div class='add'>+AMD Radeon (TM) R(5|7) M315 /M340 /M360, TOPAZ, *, 8, --, 2</div><div class='add'>+AMD Radeon (TM) R9 200 /380 /W7100 /S7150 /M390 /M395 Series, TONGA, DCE 10, 8, VCE 3 / UVD 5, 3</div><div class='add'>+AMD Radeon (FirePro) (TM) R9 Fury Series, FIJI, DCE 10, 8, VCE 3 / UVD 6, 3</div><div class='add'>+Radeon RX 470 /480 /570 /580 /590 Series - AMD Radeon (TM) (Pro WX) 5100 /E9390 /E9560 /E9565 /V7350 /7100 /P30PH, POLARIS10, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3</div><div class='add'>+Radeon (TM) (RX|Pro WX) E9260 /460 /V5300X /550 /560(X) Series, POLARIS11, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3</div><div class='add'>+Radeon (RX/Pro) 500 /540(X) /550 /640 /WX2100 /WX3100 /WX200 Series, POLARIS12, DCE 11.2, 8, VCE 3.4 / UVD 6.3, 3</div><div class='add'>+Radeon (RX|TM) (PRO|WX) Vega /MI25 /V320 /V340L /8200 /9100 /SSG MxGPU, VEGA10, DCE 12, 9.0.1, VCE 4.0.0 / UVD 7.0.0, 4.0.0</div><div class='add'>+AMD Radeon (Pro) VII /MI50 /MI60, VEGA20, DCE 12, 9.4.0, VCE 4.1.0 / UVD 7.2.0, 4.2.0</div><div class='add'>+MI100, ARCTURUS, *, 9.4.1, VCN 2.5.0, 4.2.2</div><div class='add'>+MI200, ALDEBARAN, *, 9.4.2, VCN 2.6.0, 4.4.0</div><div class='add'>+AMD Radeon (RX|Pro) 5600(M|XT) /5700 (M|XT|XTB) /W5700, NAVI10, DCN 2.0.0, 10.1.10, VCN 2.0.0, 5.0.0</div><div class='add'>+AMD Radeon (Pro) 5300 /5500XTB/5500(XT|M) /W5500M /W5500, NAVI14, DCN 2.0.0, 10.1.1, VCN 2.0.2, 5.0.2</div><div class='add'>+AMD Radeon RX 6800(XT) /6900(XT) /W6800, SIENNA_CICHLID, DCN 3.0.0, 10.3.0, VCN 3.0.0, 5.2.0</div><div class='add'>+AMD Radeon RX 6700 XT / 6800M / 6700M, NAVY_FLOUNDER, DCN 3.0.0, 10.3.2, VCN 3.0.0, 5.2.2</div><div class='add'>+AMD Radeon RX 6600(XT) /6600M /W6600 /W6600M, DIMGREY_CAVEFISH, DCN 3.0.2, 10.3.4, VCN 3.0.16, 5.2.4</div><div class='add'>+AMD Radeon RX 6500M /6300M /W6500M /W6300M, BEIGE_GOBY, DCN 3.0.3, 10.3.5, VCN 3.0.33, 5.2.5</div><div class='add'>+AMD Radeon RX 7900 XT /XTX, , DCN 3.2.0, 11.0.0, VCN 4.0.0, 6.0.0</div><div class='add'>+AMD Radeon RX 7600M (XT) /7700S /7600S, , DCN 3.2.1, 11.0.2, VCN 4.0.4, 6.0.2</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/dc-glossary.rst b/Documentation/gpu/amdgpu/display/dc-glossary.rst<br/>index 116f5f0942fd..0b0ffd428dd2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/dc-glossary.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/amdgpu/display/dc-glossary.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/dc-glossary.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/display/dc-glossary.rst</a></div><div class='hunk'>@@ -170,7 +170,7 @@ consider asking in the amdgfx and update this page.</div><div class='ctx'>     MC</div><div class='ctx'>       Memory Controller</div><div class='ctx'> </div><div class='del'>-    MPC</div><div class='add'>+    MPC/MPCC</div><div class='ctx'>       Multiple pipes and plane combine</div><div class='ctx'> </div><div class='ctx'>     MPO</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/dcn-overview.rst b/Documentation/gpu/amdgpu/display/dcn-overview.rst<br/>index f98624d7828e..9fea6500448b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/dcn-overview.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/amdgpu/display/dcn-overview.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/dcn-overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/display/dcn-overview.rst</a></div><div class='hunk'>@@ -124,6 +124,65 @@ depth format), bit-depth reduction/dithering would kick in. In OPP, we would</div><div class='ctx'> also apply a regamma function to introduce the gamma removed earlier back.</div><div class='ctx'> Eventually, we output data in integer format at DIO.</div><div class='ctx'> </div><div class='add'>+AMD Hardware Pipeline</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+When discussing graphics on Linux, the **pipeline** term can sometimes be</div><div class='add'>+overloaded with multiple meanings, so it is important to define what we mean</div><div class='add'>+when we say **pipeline**. In the DCN driver, we use the term **hardware</div><div class='add'>+pipeline** or **pipeline** or just **pipe** as an abstraction to indicate a</div><div class='add'>+sequence of DCN blocks instantiated to address some specific configuration. DC</div><div class='add'>+core treats DCN blocks as individual resources, meaning we can build a pipeline</div><div class='add'>+by taking resources for all individual hardware blocks to compose one pipeline.</div><div class='add'>+In actuality, we can't connect an arbitrary block from one pipe to a block from</div><div class='add'>+another pipe; they are routed linearly, except for DSC, which can be</div><div class='add'>+arbitrarily assigned as needed. We have this pipeline concept for trying to</div><div class='add'>+optimize bandwidth utilization.</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: pipeline_4k_no_split.svg</div><div class='add'>+</div><div class='add'>+Additionally, let's take a look at parts of the DTN log (see</div><div class='add'>+'Documentation/gpu/amdgpu/display/dc-debug.rst' for more information) since</div><div class='add'>+this log can help us to see part of this pipeline behavior in real-time::</div><div class='add'>+</div><div class='add'>+ HUBP:  format  addr_hi  width  height ...</div><div class='add'>+ [ 0]:      8h      81h   3840    2160</div><div class='add'>+ [ 1]:      0h       0h      0       0</div><div class='add'>+ [ 2]:      0h       0h      0       0</div><div class='add'>+ [ 3]:      0h       0h      0       0</div><div class='add'>+ [ 4]:      0h       0h      0       0</div><div class='add'>+ ...</div><div class='add'>+ MPCC:  OPP  DPP ...</div><div class='add'>+ [ 0]:   0h   0h ...</div><div class='add'>+</div><div class='add'>+The first thing to notice from the diagram and DTN log it is the fact that we</div><div class='add'>+have different clock domains for each part of the DCN blocks. In this example,</div><div class='add'>+we have just a single **pipeline** where the data flows from DCHUB to DIO, as</div><div class='add'>+we intuitively expect. Nonetheless, DCN is flexible, as mentioned before, and</div><div class='add'>+we can split this single pipe differently, as described in the below diagram:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: pipeline_4k_split.svg</div><div class='add'>+</div><div class='add'>+Now, if we inspect the DTN log again we can see some interesting changes::</div><div class='add'>+</div><div class='add'>+ HUBP:  format  addr_hi  width  height ...</div><div class='add'>+ [ 0]:      8h      81h   1920    2160 ...</div><div class='add'>+ ...</div><div class='add'>+ [ 4]:      0h       0h      0       0 ...</div><div class='add'>+ [ 5]:      8h      81h   1920    2160 ...</div><div class='add'>+ ...</div><div class='add'>+ MPCC:  OPP  DPP ...</div><div class='add'>+ [ 0]:   0h   0h ...</div><div class='add'>+ [ 5]:   0h   5h ...</div><div class='add'>+</div><div class='add'>+From the above example, we now split the display pipeline into two vertical</div><div class='add'>+parts of 1920x2160 (i.e., 3440x2160), and as a result, we could reduce the</div><div class='add'>+clock frequency in the DPP part. This is not only useful for saving power but</div><div class='add'>+also to better handle the required throughput. The idea to keep in mind here is</div><div class='add'>+that the pipe configuration can vary a lot according to the display</div><div class='add'>+configuration, and it is the DML's responsibility to set up all required</div><div class='add'>+configuration parameters for multiple scenarios supported by our hardware.</div><div class='add'>+</div><div class='ctx'> Global Sync</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg b/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg<br/>new file mode 100644<br/>index 000000000000..315ffc5a1a4b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/display/dcn2_cm_drm_current.svg</a></div><div class='hunk'>@@ -0,0 +1,1370 @@</div><div class='add'>+&lt;?xml version="1.0" encoding="UTF-8" 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style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="53.441296"</div><div class='add'>+       y="300.866"</div><div class='add'>+       id="text38843"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan38841"</div><div class='add'>+         x="53.441296"</div><div class='add'>+         y="300.866"&gt;1D LUT&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="53.441296"</div><div class='add'>+       y="378.866"</div><div class='add'>+       id="text41049"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+  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class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1475.2806"</div><div class='add'>+       y="340.08771"</div><div class='add'>+       id="text64465"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64463"</div><div class='add'>+         x="1475.2806"</div><div class='add'>+         y="340.08771"</div><div class='add'>+         style="font-size:18.6667px"&gt;drm_plane&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       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y="1172.4491"</div><div class='add'>+         style="font-size:18.6667px"&gt;Stream&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="328.26071"</div><div class='add'>+       y="1175.6371"</div><div class='add'>+       id="text64469-9-2"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-8"</div><div class='add'>+         x="328.26071"</div><div class='add'>+         y="1175.6371"</div><div class='add'>+         style="font-size:18.6667px"&gt;MPC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="330.14737"</div><div class='add'>+       y="114.41869"</div><div class='add'>+       id="text64469-9-9"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-7"</div><div class='add'>+         x="330.14737"</div><div class='add'>+         y="114.41869"</div><div class='add'>+         style="font-size:18.6667px"&gt;DPP&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;path</div><div class='add'>+       d="m 1488.3608,401.47792 c 0.025,10.97895 0.01,773.03788 0.049,784.01888 2.5462,-1.1592 5.0637,-2.3779 7.6202,-3.5187 -2.7411,4.8298 -5.4987,9.6453 -8.2624,14.4607 -2.7925,-4.8257 -5.5993,-9.6453 -8.3856,-14.4751 2.6221,1.1736 5.2217,2.3923 7.8398,3.5721 0,-10.8825 -0.035,-772.84093 -0.031,-783.72345 0.053,-0.30366 -0.2175,-0.50268 -0.3652,-0.72837 l 1.5347,0.39394 z"</div><div class='add'>+       id="path106"</div><div class='add'>+       sodipodi:nodetypes="cccccccccc"</div><div class='add'>+       style="stroke-width:0.205176"</div><div class='add'>+       inkscape:transform-center-x="-325.50819"</div><div class='add'>+       inkscape:transform-center-y="-121.97185" /&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1495.9988"</div><div class='add'>+       y="1224.7498"</div><div class='add'>+       id="text78849"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78847"</div><div class='add'>+         x="1495.9988"</div><div class='add'>+         y="1224.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;Blender&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1417.9988"</div><div class='add'>+       y="1294.7498"</div><div class='add'>+       id="text78853"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78851"</div><div class='add'>+         x="1417.9988"</div><div class='add'>+         y="1294.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;Degamma&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1451.9988"</div><div class='add'>+       y="1376.7498"</div><div class='add'>+       id="text78857"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78855"</div><div class='add'>+         x="1451.9988"</div><div class='add'>+         y="1376.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;CTM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1427.9988"</div><div class='add'>+       y="1458.7498"</div><div class='add'>+       id="text78861"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78859"</div><div class='add'>+         x="1427.9988"</div><div class='add'>+         y="1458.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;Gamma&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="949.99878"</div><div class='add'>+       y="218.74973"</div><div class='add'>+       id="text104653"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104651"</div><div class='add'>+         x="949.99878"</div><div class='add'>+         y="218.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;format&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="911.99878"</div><div class='add'>+       y="284.74973"</div><div class='add'>+       id="text104657"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104655"</div><div class='add'>+         x="911.99878"</div><div class='add'>+         y="284.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;bias_and_scale&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="887.99878"</div><div class='add'>+       y="346.74973"</div><div class='add'>+       id="text104661"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104659"</div><div class='add'>+         x="887.99878"</div><div class='add'>+         y="346.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;color space matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="871.99878"</div><div class='add'>+       y="442.74973"</div><div class='add'>+       id="text104665"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104663"</div><div class='add'>+         x="871.99878"</div><div class='add'>+         y="442.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;input_csc_color_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="905.99878"</div><div class='add'>+       y="586.74976"</div><div class='add'>+       id="text125075"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan125073"</div><div class='add'>+         x="905.99878"</div><div class='add'>+         y="586.74976"</div><div class='add'>+         style="font-size:18.6667px"&gt;in_transfer_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="945.0083"</div><div class='add'>+       y="702.85938"</div><div class='add'>+       id="text117309"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307"</div><div class='add'>+         x="945.0083"</div><div class='add'>+         y="702.85938"</div><div class='add'>+         style="font-size:18.6667px"&gt;hdr_mult&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="874.5556"</div><div class='add'>+       y="773.42615"</div><div class='add'>+       id="text117309-6"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-7"</div><div class='add'>+         x="874.5556"</div><div class='add'>+         y="773.42615"</div><div class='add'>+         style="font-size:18.6667px"&gt;gamut_remap_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="913.72528"</div><div class='add'>+       y="846.55896"</div><div class='add'>+       id="text117309-5"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-3"</div><div class='add'>+         x="913.72528"</div><div class='add'>+         y="846.55896"</div><div class='add'>+         style="font-size:18.6667px"&gt;in_shaper_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="937.72528"</div><div class='add'>+       y="918.25787"</div><div class='add'>+       id="text117309-56"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-2"</div><div class='add'>+         x="937.72528"</div><div class='add'>+         y="918.25787"</div><div class='add'>+         style="font-size:18.6667px"&gt;lut3d_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="945.9895"</div><div class='add'>+       y="986.10767"</div><div class='add'>+       id="text117309-9"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-1"</div><div class='add'>+         x="945.9895"</div><div class='add'>+         y="986.10767"</div><div class='add'>+         style="font-size:18.6667px"&gt;blend_tf&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="975.91803"</div><div class='add'>+       y="1224.5564"</div><div class='add'>+       id="text137434"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432"</div><div class='add'>+         x="975.91803"</div><div class='add'>+         y="1224.5564"</div><div class='add'>+         style="font-size:18.6667px"&gt;Blender&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="879.31372"</div><div class='add'>+       y="1283.4249"</div><div class='add'>+       id="text137434-2"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-7"</div><div class='add'>+         x="879.31372"</div><div class='add'>+         y="1283.4249"</div><div class='add'>+         style="font-size:18.6667px"&gt;gamut_remap_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="925.31372"</div><div class='add'>+       y="1359.2747"</div><div class='add'>+       id="text137434-0"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-9"</div><div class='add'>+         x="925.31372"</div><div class='add'>+         y="1359.2747"</div><div class='add'>+         style="font-size:18.6667px"&gt;func_shaper&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="930.33252"</div><div class='add'>+       y="1430.2566"</div><div class='add'>+       id="text137434-3"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-6"</div><div class='add'>+         x="930.33252"</div><div class='add'>+         y="1430.2566"</div><div class='add'>+         style="font-size:18.6667px"&gt;lut3d_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="900.18158"</div><div class='add'>+       y="1504.6725"</div><div class='add'>+       id="text137434-06"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-2"</div><div class='add'>+         x="900.18158"</div><div class='add'>+         y="1504.6725"</div><div class='add'>+         style="font-size:18.6667px"&gt;out_transfer_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="904.0307"</div><div class='add'>+       y="1575.8053"</div><div class='add'>+       id="text137434-6"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-1"</div><div class='add'>+         x="904.0307"</div><div class='add'>+         y="1575.8053"</div><div class='add'>+         style="font-size:18.6667px"&gt;csc_color_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="903.16278"</div><div class='add'>+       y="1642.1078"</div><div class='add'>+       id="text137434-8"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-79"</div><div class='add'>+         x="903.16278"</div><div class='add'>+         y="1642.1078"</div><div class='add'>+         style="font-size:18.6667px"&gt;bit_depth_param&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="939.31372"</div><div class='add'>+       y="1713.8068"</div><div class='add'>+       id="text137434-20"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-23"</div><div class='add'>+         x="939.31372"</div><div class='add'>+         y="1713.8068"</div><div class='add'>+         style="font-size:18.6667px"&gt;clamping&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="894.0307"</div><div class='add'>+       y="1782.5244"</div><div class='add'>+       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inkscape:connection-start="#rect1917"</div><div class='add'>+       inkscape:connection-end="#rect1707" /&gt;</div><div class='add'>+    &lt;path</div><div class='add'>+       style="fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:2;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:6, 6;stroke-dashoffset:0;stroke-opacity:1"</div><div class='add'>+       d="M 1389.9988,212.74973 H 1089.7077"</div><div class='add'>+       id="path8672"</div><div class='add'>+       inkscape:connector-type="orthogonal"</div><div class='add'>+       inkscape:connector-curvature="0"</div><div class='add'>+       inkscape:connection-start="#rect1349"</div><div class='add'>+       inkscape:connection-end="#rect1731" /&gt;</div><div class='add'>+    &lt;path</div><div class='add'>+       style="display:inline;fill:none;fill-rule:evenodd;stroke:#000000;stroke-width:2;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:6, 6;stroke-dashoffset:0;stroke-opacity:1"</div><div class='add'>+       d="M 1389.9988,230.9507 H 1223.331 v 109.79902 h -133.6233"</div><div class='add'>+       id="path8674"</div><div class='add'>+       inkscape:connector-type="orthogonal"</div><div class='add'>+       inkscape:connector-curvature="0"</div><div class='add'>+       inkscape:connection-end="#rect1815"</div><div class='add'>+       sodipodi:nodetypes="cccc" /&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:40px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="58.63356"</div><div class='add'>+       y="69.574417"</div><div class='add'>+       id="text28675"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan28673"</div><div class='add'>+         x="58.63356"</div><div class='add'>+         y="69.574417" /&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="56.388252"</div><div class='add'>+       y="221.86568"</div><div class='add'>+       id="text31913"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan31911"</div><div class='add'>+         x="56.388252"</div><div class='add'>+         y="221.86568"&gt;Matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="53.441296"</div><div class='add'>+       y="300.866"</div><div class='add'>+       id="text38843"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan38841"</div><div class='add'>+         x="53.441296"</div><div class='add'>+         y="300.866"&gt;1D LUT&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="53.441296"</div><div class='add'>+       y="378.866"</div><div class='add'>+       id="text41049"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan41047"</div><div class='add'>+         x="53.441296"</div><div class='add'>+         y="378.866"&gt;3D LUT&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="40.831493"</div><div class='add'>+       y="460.87411"</div><div class='add'>+       id="text45037"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan45035"</div><div class='add'>+         x="40.831493"</div><div class='add'>+         y="460.87411"</div><div class='add'>+         style="font-size:18.6667px"&gt;Unpacking&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="62.130371"</div><div class='add'>+       y="540.68872"</div><div class='add'>+       id="text49945"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan49943"</div><div class='add'>+         x="62.130371"</div><div class='add'>+         y="540.68872"</div><div class='add'>+         style="font-size:18.6667px"&gt;Other&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1423.2806"</div><div class='add'>+       y="128.08769"</div><div class='add'>+       id="text55719"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan55717"</div><div class='add'>+         x="1423.2806"</div><div class='add'>+         y="128.08769"</div><div class='add'>+         style="font-size:18.6667px"&gt;drm_framebuffer&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1439.9988"</div><div class='add'>+       y="218.74973"</div><div class='add'>+       id="text62479"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan62477"</div><div class='add'>+         x="1439.9988"</div><div class='add'>+         y="218.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;format&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1475.2806"</div><div class='add'>+       y="340.08771"</div><div class='add'>+       id="text64465"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64463"</div><div class='add'>+         x="1475.2806"</div><div class='add'>+         y="340.08771"</div><div class='add'>+         style="font-size:18.6667px"&gt;drm_plane&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1589.2806"</div><div class='add'>+       y="1178.0876"</div><div class='add'>+       id="text64469"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467"</div><div class='add'>+         x="1589.2806"</div><div class='add'>+         y="1178.0876"</div><div class='add'>+         style="font-size:18.6667px"&gt;drm_crtc&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="872.23993"</div><div class='add'>+       y="1172.4491"</div><div class='add'>+       id="text64469-9"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2"</div><div class='add'>+         x="872.23993"</div><div class='add'>+         y="1172.4491"</div><div class='add'>+         style="font-size:18.6667px"&gt;Stream&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="328.26071"</div><div class='add'>+       y="1175.6371"</div><div class='add'>+       id="text64469-9-2"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-8"</div><div class='add'>+         x="328.26071"</div><div class='add'>+         y="1175.6371"</div><div class='add'>+         style="font-size:18.6667px"&gt;MPC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="330.14737"</div><div class='add'>+       y="114.41869"</div><div class='add'>+       id="text64469-9-9"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-7"</div><div class='add'>+         x="330.14737"</div><div class='add'>+         y="114.41869"</div><div class='add'>+         style="font-size:18.6667px"&gt;DPP&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;path</div><div class='add'>+       d="m 1488.3608,401.47792 c 0.025,10.97895 0.01,773.03788 0.049,784.01888 2.5462,-1.1592 5.0637,-2.3779 7.6202,-3.5187 -2.7411,4.8298 -5.4987,9.6453 -8.2624,14.4607 -2.7925,-4.8257 -5.5993,-9.6453 -8.3856,-14.4751 2.6221,1.1736 5.2217,2.3923 7.8398,3.5721 0,-10.8825 -0.035,-772.84093 -0.031,-783.72345 0.053,-0.30366 -0.2175,-0.50268 -0.3652,-0.72837 l 1.5347,0.39394 z"</div><div class='add'>+       id="path106"</div><div class='add'>+       sodipodi:nodetypes="cccccccccc"</div><div class='add'>+       style="stroke-width:0.205176"</div><div class='add'>+       inkscape:transform-center-x="-325.50819"</div><div class='add'>+       inkscape:transform-center-y="-121.97185" /&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1495.9988"</div><div class='add'>+       y="1224.7498"</div><div class='add'>+       id="text78849"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78847"</div><div class='add'>+         x="1495.9988"</div><div class='add'>+         y="1224.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;Blender&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1417.9988"</div><div class='add'>+       y="1294.7498"</div><div class='add'>+       id="text78853"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78851"</div><div class='add'>+         x="1417.9988"</div><div class='add'>+         y="1294.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;Degamma&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1451.9988"</div><div class='add'>+       y="1376.7498"</div><div class='add'>+       id="text78857"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78855"</div><div class='add'>+         x="1451.9988"</div><div class='add'>+         y="1376.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;CTM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1427.9988"</div><div class='add'>+       y="1458.7498"</div><div class='add'>+       id="text78861"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78859"</div><div class='add'>+         x="1427.9988"</div><div class='add'>+         y="1458.7498"</div><div class='add'>+         style="font-size:18.6667px"&gt;Gamma&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="949.99878"</div><div class='add'>+       y="218.74973"</div><div class='add'>+       id="text104653"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104651"</div><div class='add'>+         x="949.99878"</div><div class='add'>+         y="218.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;format&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="911.99878"</div><div class='add'>+       y="284.74973"</div><div class='add'>+       id="text104657"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104655"</div><div class='add'>+         x="911.99878"</div><div class='add'>+         y="284.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;bias_and_scale&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="887.99878"</div><div class='add'>+       y="346.74973"</div><div class='add'>+       id="text104661"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104659"</div><div class='add'>+         x="887.99878"</div><div class='add'>+         y="346.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;color space matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="871.99878"</div><div class='add'>+       y="442.74973"</div><div class='add'>+       id="text104665"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan104663"</div><div class='add'>+         x="871.99878"</div><div class='add'>+         y="442.74973"</div><div class='add'>+         style="font-size:18.6667px"&gt;input_csc_color_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="905.99878"</div><div class='add'>+       y="586.74976"</div><div class='add'>+       id="text125075"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan125073"</div><div class='add'>+         x="905.99878"</div><div class='add'>+         y="586.74976"</div><div class='add'>+         style="font-size:18.6667px"&gt;in_transfer_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="945.0083"</div><div class='add'>+       y="702.85938"</div><div class='add'>+       id="text117309"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307"</div><div class='add'>+         x="945.0083"</div><div class='add'>+         y="702.85938"</div><div class='add'>+         style="font-size:18.6667px"&gt;hdr_mult&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="874.5556"</div><div class='add'>+       y="773.42615"</div><div class='add'>+       id="text117309-6"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-7"</div><div class='add'>+         x="874.5556"</div><div class='add'>+         y="773.42615"</div><div class='add'>+         style="font-size:18.6667px"&gt;gamut_remap_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="913.72528"</div><div class='add'>+       y="846.55896"</div><div class='add'>+       id="text117309-5"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-3"</div><div class='add'>+         x="913.72528"</div><div class='add'>+         y="846.55896"</div><div class='add'>+         style="font-size:18.6667px"&gt;in_shaper_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="937.72528"</div><div class='add'>+       y="918.25787"</div><div class='add'>+       id="text117309-56"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-2"</div><div class='add'>+         x="937.72528"</div><div class='add'>+         y="918.25787"</div><div class='add'>+         style="font-size:18.6667px"&gt;lut3d_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="945.9895"</div><div class='add'>+       y="986.10767"</div><div class='add'>+       id="text117309-9"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan117307-1"</div><div class='add'>+         x="945.9895"</div><div class='add'>+         y="986.10767"</div><div class='add'>+         style="font-size:18.6667px"&gt;blend_tf&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="975.91803"</div><div class='add'>+       y="1224.5564"</div><div class='add'>+       id="text137434"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432"</div><div class='add'>+         x="975.91803"</div><div class='add'>+         y="1224.5564"</div><div class='add'>+         style="font-size:18.6667px"&gt;Blender&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="879.31372"</div><div class='add'>+       y="1283.4249"</div><div class='add'>+       id="text137434-2"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-7"</div><div class='add'>+         x="879.31372"</div><div class='add'>+         y="1283.4249"</div><div class='add'>+         style="font-size:18.6667px"&gt;gamut_remap_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="925.31372"</div><div class='add'>+       y="1359.2747"</div><div class='add'>+       id="text137434-0"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-9"</div><div class='add'>+         x="925.31372"</div><div class='add'>+         y="1359.2747"</div><div class='add'>+         style="font-size:18.6667px"&gt;func_shaper&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="930.33252"</div><div class='add'>+       y="1430.2566"</div><div class='add'>+       id="text137434-3"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-6"</div><div class='add'>+         x="930.33252"</div><div class='add'>+         y="1430.2566"</div><div class='add'>+         style="font-size:18.6667px"&gt;lut3d_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="900.18158"</div><div class='add'>+       y="1504.6725"</div><div class='add'>+       id="text137434-06"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-2"</div><div class='add'>+         x="900.18158"</div><div class='add'>+         y="1504.6725"</div><div class='add'>+         style="font-size:18.6667px"&gt;out_transfer_func&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="904.0307"</div><div class='add'>+       y="1575.8053"</div><div class='add'>+       id="text137434-6"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-1"</div><div class='add'>+         x="904.0307"</div><div class='add'>+         y="1575.8053"</div><div class='add'>+         style="font-size:18.6667px"&gt;csc_color_matrix&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="903.16278"</div><div class='add'>+       y="1642.1078"</div><div class='add'>+       id="text137434-8"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-79"</div><div class='add'>+         x="903.16278"</div><div class='add'>+         y="1642.1078"</div><div class='add'>+         style="font-size:18.6667px"&gt;bit_depth_param&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="939.31372"</div><div class='add'>+       y="1713.8068"</div><div class='add'>+       id="text137434-20"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-23"</div><div class='add'>+         x="939.31372"</div><div class='add'>+         y="1713.8068"</div><div class='add'>+         style="font-size:18.6667px"&gt;clamping&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="894.0307"</div><div class='add'>+       y="1782.5244"</div><div class='add'>+       id="text137434-7"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan137432-5"</div><div class='add'>+         x="894.0307"</div><div class='add'>+         y="1782.5244"</div><div class='add'>+         style="font-size:18.6667px"&gt;output_color_space&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="869.63062"</div><div class='add'>+       y="117.7968"</div><div class='add'>+       id="text176429"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan176427"</div><div class='add'>+         x="869.63062"</div><div class='add'>+         y="117.7968"</div><div class='add'>+         style="font-size:18.6667px"&gt;Plane&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="27.605465"</div><div class='add'>+       y="162.20587"</div><div class='add'>+       id="text176429-2"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan176427-0"</div><div class='add'>+         x="27.605465"</div><div class='add'>+         y="162.20587"</div><div class='add'>+         style="font-size:18.6667px"&gt;Legend&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="298.63959"</div><div class='add'>+       y="59.293999"</div><div class='add'>+       id="text176429-9"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan176427-2"</div><div class='add'>+         x="298.63959"</div><div class='add'>+         y="59.293999"</div><div class='add'>+         style="font-size:18.6667px"&gt;DCN 3.0&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="826.65735"</div><div class='add'>+       y="59.458061"</div><div class='add'>+       id="text176429-66"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan176427-4"</div><div class='add'>+         x="826.65735"</div><div class='add'>+         y="59.458061"</div><div class='add'>+         style="font-size:18.6667px"&gt;DC Interface&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1362.9948"</div><div class='add'>+       y="59.458061"</div><div class='add'>+       id="text176429-95"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan176427-04"</div><div class='add'>+         x="1362.9948"</div><div class='add'>+         y="59.458061"</div><div class='add'>+         style="font-size:18.6667px"&gt;DRM Interface&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:40px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="867.34656"</div><div class='add'>+       y="1194.5068"</div><div class='add'>+       id="text184728"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan184726"</div><div class='add'>+         x="867.34656"</div><div class='add'>+         y="1194.5068" /&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="389.01593"</div><div class='add'>+       y="159.8909"</div><div class='add'>+       id="text64469-9-3"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-6"</div><div class='add'>+         x="389.01593"</div><div class='add'>+         y="159.8909"</div><div class='add'>+         style="font-size:18.6667px"&gt;CNVC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="365.88379"</div><div class='add'>+       y="303.59048"</div><div class='add'>+       id="text64469-9-1"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-2"</div><div class='add'>+         x="365.88379"</div><div class='add'>+         y="303.59048"</div><div class='add'>+         style="font-size:18.6667px"&gt;Input CSC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="413.06488"</div><div class='add'>+       y="390.95001"</div><div class='add'>+       id="text64469-9-93"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-1"</div><div class='add'>+         x="413.06488"</div><div class='add'>+         y="390.95001"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"&gt;DeGamma&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="413.06488"</div><div class='add'>+         y="414.28339"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan233797"&gt;ROM&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="413.06488"</div><div class='add'>+         y="437.61676"</div><div class='add'>+         style="font-size:10.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan233799"&gt;(sRGB, BT2020, Gamma 2.2,&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="413.06488"</div><div class='add'>+         y="460.95013"</div><div class='add'>+         style="font-size:10.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan242597"&gt;PQ, HLG)&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="372.44986"</div><div class='add'>+       y="538.83807"</div><div class='add'>+       id="text64469-9-94"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-78"</div><div class='add'>+         x="372.44986"</div><div class='add'>+         y="538.83807"</div><div class='add'>+         style="font-size:18.6667px"&gt;Post CSC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:16px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="335.31775"</div><div class='add'>+       y="622.23511"</div><div class='add'>+       id="text64469-9-4"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-5"</div><div class='add'>+         x="335.31775"</div><div class='add'>+         y="622.23511"</div><div class='add'>+         style="font-size:16px"&gt;Gamma Correction&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="351.16684"</div><div class='add'>+       y="700.34918"</div><div class='add'>+       id="text64469-9-0"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-3"</div><div class='add'>+         x="351.16684"</div><div class='add'>+         y="700.34918"</div><div class='add'>+         style="font-size:18.6667px"&gt;HDR Multiply&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="345.16684"</div><div class='add'>+       y="771.33112"</div><div class='add'>+       id="text64469-9-6"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-10"</div><div class='add'>+         x="345.16684"</div><div class='add'>+         y="771.33112"</div><div class='add'>+         style="font-size:18.6667px"&gt;Gamut Remap&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="412.5184"</div><div class='add'>+       y="836.04877"</div><div class='add'>+       id="text64469-9-63"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-20"</div><div class='add'>+         x="412.5184"</div><div class='add'>+         y="836.04877"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"&gt;Shaper LUT&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="412.5184"</div><div class='add'>+         y="859.38214"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan222533"&gt;RAM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="413.54086"</div><div class='add'>+       y="908.61554"</div><div class='add'>+       id="text64469-9-61"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-55"</div><div class='add'>+         x="413.54086"</div><div class='add'>+         y="908.61554"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"&gt;3D LUT&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="413.54086"</div><div class='add'>+         y="931.94891"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan221121"&gt;RAM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="344.0347"</div><div class='add'>+       y="985.33319"</div><div class='add'>+       id="text64469-9-47"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-65"</div><div class='add'>+         x="344.0347"</div><div class='add'>+         y="985.33319"</div><div class='add'>+         style="font-size:18.6667px"&gt;Blend Gamma&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="433.84625"</div><div class='add'>+       y="1223.411"</div><div class='add'>+       id="text64469-9-69"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-37"</div><div class='add'>+         x="433.84625"</div><div class='add'>+         y="1223.411"</div><div class='add'>+         style="font-size:18.6667px"&gt;Blender&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="343.73291"</div><div class='add'>+       y="1290.2421"</div><div class='add'>+       id="text64469-9-45"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-25"</div><div class='add'>+         x="343.73291"</div><div class='add'>+         y="1290.2421"</div><div class='add'>+         style="font-size:18.6667px"&gt;Gamut Remap&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="408.74442"</div><div class='add'>+       y="1344.2428"</div><div class='add'>+       id="text64469-9-474"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-4"</div><div class='add'>+         x="408.74442"</div><div class='add'>+         y="1344.2428"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"&gt;Shaper LUT&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="408.74442"</div><div class='add'>+         y="1367.5762"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan208303"&gt;RAM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="407.1257"</div><div class='add'>+       y="1420.2435"</div><div class='add'>+       id="text64469-9-30"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-786"</div><div class='add'>+         x="407.1257"</div><div class='add'>+         y="1420.2435"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"&gt;3D LUT&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="407.1257"</div><div class='add'>+         y="1443.5769"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan204749"&gt;RAM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="408.64996"</div><div class='add'>+       y="1492.8102"</div><div class='add'>+       id="text64469-9-8"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-84"</div><div class='add'>+         x="408.64996"</div><div class='add'>+         y="1492.8102"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"&gt;Gamma&lt;/tspan&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         x="408.64996"</div><div class='add'>+         y="1516.1436"</div><div class='add'>+         style="font-size:18.6667px;text-align:center;text-anchor:middle"</div><div class='add'>+         id="tspan197733"&gt;RAM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="385.46863"</div><div class='add'>+       y="1575.2261"</div><div class='add'>+       id="text64469-9-31"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan64467-2-49"</div><div class='add'>+         x="385.46863"</div><div class='add'>+         y="1575.2261"</div><div class='add'>+         style="font-size:18.6667px"&gt;OCSC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:40px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1356.5106"</div><div class='add'>+       y="53.140579"</div><div class='add'>+       id="text273287"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan273285"</div><div class='add'>+         x="1356.5106"</div><div class='add'>+         y="53.140579" /&gt;&lt;/text&gt;</div><div class='add'>+    &lt;rect</div><div class='add'>+       style="fill:#f9f7ed;fill-opacity:1;stroke:#000000;stroke-opacity:1"</div><div class='add'>+       id="rect1411"</div><div class='add'>+       width="177.28049"</div><div class='add'>+       height="38.940468"</div><div class='add'>+       x="1392.2576"</div><div class='add'>+       y="459.24118" /&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:18.6667px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1411.7203"</div><div class='add'>+       y="485.93231"</div><div class='add'>+       id="text78841"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78839"</div><div class='add'>+         x="1411.7203"</div><div class='add'>+         y="485.93231"</div><div class='add'>+         style="font-size:18.6667px"&gt;color_encoding&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+    &lt;rect</div><div class='add'>+       style="fill:#f9f7ed;fill-opacity:1;stroke:#000000;stroke-opacity:1"</div><div class='add'>+       id="rect1515"</div><div class='add'>+       width="175.11876"</div><div class='add'>+       height="43.239407"</div><div class='add'>+       x="1393.7493"</div><div class='add'>+       y="525.6983" /&gt;</div><div class='add'>+    &lt;text</div><div class='add'>+       xml:space="preserve"</div><div class='add'>+       style="font-style:normal;font-weight:normal;font-size:17.3333px;line-height:1.25;font-family:sans-serif;fill:#000000;fill-opacity:1;stroke:none"</div><div class='add'>+       x="1399.212"</div><div class='add'>+       y="553.44904"</div><div class='add'>+       id="text78845"&gt;&lt;tspan</div><div class='add'>+         sodipodi:role="line"</div><div class='add'>+         id="tspan78843"</div><div class='add'>+         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class='hunk'>@@ -40,3 +40,144 @@ Atomic Implementation</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c</div><div class='ctx'>    :functions: amdgpu_dm_atomic_check amdgpu_dm_atomic_commit_tail</div><div class='add'>+</div><div class='add'>+Color Management Properties</div><div class='add'>+===========================</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c</div><div class='add'>+   :doc: overview</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+DC Color Capabilities between DCN generations</div><div class='add'>+---------------------------------------------</div><div class='add'>+</div><div class='add'>+DRM/KMS framework defines three CRTC color correction properties: degamma,</div><div class='add'>+color transformation matrix (CTM) and gamma, and two properties for degamma and</div><div class='add'>+gamma LUT sizes. AMD DC programs some of the color correction features</div><div class='add'>+pre-blending but DRM/KMS has not per-plane color correction properties.</div><div class='add'>+</div><div class='add'>+In general, the DRM CRTC color properties are programmed to DC, as follows:</div><div class='add'>+CRTC gamma after blending, and CRTC degamma pre-blending. Although CTM is</div><div class='add'>+programmed after blending, it is mapped to DPP hw blocks (pre-blending). Other</div><div class='add'>+color caps available in the hw is not currently exposed by DRM interface and</div><div class='add'>+are bypassed.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h</div><div class='add'>+   :doc: color-management-caps</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/dc.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+The color pipeline has undergone major changes between DCN hardware</div><div class='add'>+generations. What's possible to do before and after blending depends on</div><div class='add'>+hardware capabilities, as illustrated below by the DCN 2.0 and DCN 3.0 families</div><div class='add'>+schemas.</div><div class='add'>+</div><div class='add'>+**DCN 2.0 family color caps and mapping**</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: dcn2_cm_drm_current.svg</div><div class='add'>+</div><div class='add'>+**DCN 3.0 family color caps and mapping**</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: dcn3_cm_drm_current.svg</div><div class='add'>+</div><div class='add'>+Blend Mode Properties</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Pixel blend mode is a DRM plane composition property of :c:type:`drm_plane` used to</div><div class='add'>+describes how pixels from a foreground plane (fg) are composited with the</div><div class='add'>+background plane (bg). Here, we present main concepts of DRM blend mode to help</div><div class='add'>+to understand how this property is mapped to AMD DC interface. See more about</div><div class='add'>+this DRM property and the alpha blending equations in :ref:`DRM Plane</div><div class='add'>+Composition Properties &lt;plane_composition_properties&gt;`.</div><div class='add'>+</div><div class='add'>+Basically, a blend mode sets the alpha blending equation for plane</div><div class='add'>+composition that fits the mode in which the alpha channel affects the state of</div><div class='add'>+pixel color values and, therefore, the resulted pixel color. For</div><div class='add'>+example, consider the following elements of the alpha blending equation:</div><div class='add'>+</div><div class='add'>+- *fg.rgb*: Each of the RGB component values from the foreground's pixel.</div><div class='add'>+- *fg.alpha*: Alpha component value from the foreground's pixel.</div><div class='add'>+- *bg.rgb*: Each of the RGB component values from the background.</div><div class='add'>+- *plane_alpha*: Plane alpha value set by the **plane "alpha" property**, see</div><div class='add'>+  more in :ref:`DRM Plane Composition Properties &lt;plane_composition_properties&gt;`.</div><div class='add'>+</div><div class='add'>+in the basic alpha blending equation::</div><div class='add'>+</div><div class='add'>+   out.rgb = alpha * fg.rgb + (1 - alpha) * bg.rgb</div><div class='add'>+</div><div class='add'>+the alpha channel value of each pixel in a plane is ignored and only the plane</div><div class='add'>+alpha affects the resulted pixel color values.</div><div class='add'>+</div><div class='add'>+DRM has three blend mode to define the blend formula in the plane composition:</div><div class='add'>+</div><div class='add'>+* **None**: Blend formula that ignores the pixel alpha.</div><div class='add'>+</div><div class='add'>+* **Pre-multiplied**: Blend formula that assumes the pixel color values in a</div><div class='add'>+  plane was already pre-multiplied by its own alpha channel before storage.</div><div class='add'>+</div><div class='add'>+* **Coverage**: Blend formula that assumes the pixel color values were not</div><div class='add'>+  pre-multiplied with the alpha channel values.</div><div class='add'>+</div><div class='add'>+and pre-multiplied is the default pixel blend mode, that means, when no blend</div><div class='add'>+mode property is created or defined, DRM considers the plane's pixels has</div><div class='add'>+pre-multiplied color values. On IGT GPU tools, the kms_plane_alpha_blend test</div><div class='add'>+provides a set of subtests to verify plane alpha and blend mode properties.</div><div class='add'>+</div><div class='add'>+The DRM blend mode and its elements are then mapped by AMDGPU display manager</div><div class='add'>+(DM) to program the blending configuration of the Multiple Pipe/Plane Combined</div><div class='add'>+(MPC), as follows:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h</div><div class='add'>+   :doc: mpc-overview</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h</div><div class='add'>+   :functions: mpcc_blnd_cfg</div><div class='add'>+</div><div class='add'>+Therefore, the blending configuration for a single MPCC instance on the MPC</div><div class='add'>+tree is defined by :c:type:`mpcc_blnd_cfg`, where</div><div class='add'>+:c:type:`pre_multiplied_alpha` is the alpha pre-multiplied mode flag used to</div><div class='add'>+set :c:type:`MPCC_ALPHA_MULTIPLIED_MODE`. It controls whether alpha is</div><div class='add'>+multiplied (true/false), being only true for DRM pre-multiplied blend mode.</div><div class='add'>+:c:type:`mpcc_alpha_blend_mode` defines the alpha blend mode regarding pixel</div><div class='add'>+alpha and plane alpha values. It sets one of the three modes for</div><div class='add'>+:c:type:`MPCC_ALPHA_BLND_MODE`, as described below.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h</div><div class='add'>+   :functions: mpcc_alpha_blend_mode</div><div class='add'>+</div><div class='add'>+DM then maps the elements of `enum mpcc_alpha_blend_mode` to those in the DRM</div><div class='add'>+blend formula, as follows:</div><div class='add'>+</div><div class='add'>+* *MPC pixel alpha* matches *DRM fg.alpha* as the alpha component value</div><div class='add'>+  from the plane's pixel</div><div class='add'>+* *MPC global alpha* matches *DRM plane_alpha* when the pixel alpha should</div><div class='add'>+  be ignored and, therefore, pixel values are not pre-multiplied</div><div class='add'>+* *MPC global gain* assumes *MPC global alpha* value when both *DRM</div><div class='add'>+  fg.alpha* and *DRM plane_alpha* participate in the blend equation</div><div class='add'>+</div><div class='add'>+In short, *fg.alpha* is ignored by selecting</div><div class='add'>+:c:type:`MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA`. On the other hand, (plane_alpha *</div><div class='add'>+fg.alpha) component becomes available by selecting</div><div class='add'>+:c:type:`MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN`. And the</div><div class='add'>+:c:type:`MPCC_ALPHA_MULTIPLIED_MODE` defines if the pixel color values are</div><div class='add'>+pre-multiplied by alpha or not.</div><div class='add'>+</div><div class='add'>+Blend configuration flow</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+The alpha blending equation is configured from DRM to DC interface by the</div><div class='add'>+following path:</div><div class='add'>+</div><div class='add'>+1. When updating a :c:type:`drm_plane_state &lt;drm_plane_state&gt;`, DM calls</div><div class='add'>+   :c:type:`amdgpu_dm_plane_fill_blending_from_plane_state()` that maps</div><div class='add'>+   :c:type:`drm_plane_state &lt;drm_plane_state&gt;` attributes to</div><div class='add'>+   :c:type:`dc_plane_info &lt;dc_plane_info&gt;` struct to be handled in the</div><div class='add'>+   OS-agnostic component (DC).</div><div class='add'>+</div><div class='add'>+2. On DC interface, :c:type:`struct mpcc_blnd_cfg &lt;mpcc_blnd_cfg&gt;` programs the</div><div class='add'>+   MPCC blend configuration considering the :c:type:`dc_plane_info</div><div class='add'>+   &lt;dc_plane_info&gt;` input from DPP.</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/index.rst b/Documentation/gpu/amdgpu/display/index.rst<br/>index c1fb2fb3c710..f8a4f53d70d8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/amdgpu/display/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/display/index.rst</a></div><div class='hunk'>@@ -28,4 +28,5 @@ table of content:</div><div class='ctx'>    display-manager.rst</div><div class='ctx'>    dc-debug.rst</div><div class='ctx'>    dcn-overview.rst</div><div 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class='add'>+           y="138.33725"</div><div class='add'>+           id="text1392-6-9"&gt;&lt;tspan</div><div class='add'>+             sodipodi:role="line"</div><div class='add'>+             id="tspan1390-7-1"</div><div class='add'>+             x="-45.380619"</div><div class='add'>+             y="138.33725"</div><div class='add'>+             style="font-weight:bold;font-size:12.69999981px;stroke-width:0.26458332"&gt;CRTC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      &lt;/g&gt;</div><div class='add'>+      &lt;g</div><div class='add'>+         id="g1438-2"</div><div class='add'>+         transform="matrix(0.33108827,0,0,0.33108827,-92.282164,27.16881)"&gt;</div><div class='add'>+        &lt;rect</div><div class='add'>+           y="51.228218"</div><div class='add'>+           x="-69.09626"</div><div class='add'>+           height="34.773811"</div><div class='add'>+           width="66.523811"</div><div class='add'>+           id="rect1388-7"</div><div class='add'>+     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sodipodi:role="line"&gt;Cursor&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      &lt;/g&gt;</div><div class='add'>+      &lt;g</div><div class='add'>+         id="g1433-3"</div><div class='add'>+         transform="matrix(0.33108827,0,0,0.33108827,-61.59731,5.6152398)"&gt;</div><div class='add'>+        &lt;rect</div><div class='add'>+           y="116.32738"</div><div class='add'>+           x="-60.476192"</div><div class='add'>+           height="34.773811"</div><div class='add'>+           width="66.523811"</div><div class='add'>+           id="rect1388-3-6"</div><div class='add'>+           style="fill:none;fill-opacity:1;stroke:#000000;stroke-width:1.87854159;stroke-linecap:butt;stroke-linejoin:bevel;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0" /&gt;</div><div class='add'>+        &lt;text</div><div class='add'>+           id="text1392-6-0"</div><div class='add'>+           y="138.44888"</div><div class='add'>+           x="-53.932037"</div><div class='add'>+           style="font-style:normal;font-weight:normal;font-size:3.17499995px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.26458332"</div><div class='add'>+           xml:space="preserve"&gt;&lt;tspan</div><div class='add'>+             style="font-weight:bold;font-size:12.69999981px;stroke-width:0.26458332"</div><div class='add'>+             y="138.44888"</div><div class='add'>+             x="-53.932037"</div><div class='add'>+             id="tspan1390-7-6"</div><div class='add'>+             sodipodi:role="line"&gt;Plane 1&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      &lt;/g&gt;</div><div class='add'>+      &lt;g</div><div class='add'>+         id="g1428-2"</div><div class='add'>+         transform="matrix(0.33108827,0,0,0.33108827,-58.743296,6.7994816)"&gt;</div><div class='add'>+        &lt;rect</div><div class='add'>+           y="173.66814"</div><div class='add'>+       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style="font-weight:bold;font-size:12.69999981px;stroke-width:0.26458332"</div><div class='add'>+             y="195.78964"</div><div class='add'>+             x="-62.437382"</div><div class='add'>+             id="tspan1390-5-8"</div><div class='add'>+             sodipodi:role="line"&gt;Plane 2&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      &lt;/g&gt;</div><div class='add'>+      &lt;g</div><div class='add'>+         id="g1467-7"</div><div class='add'>+         transform="matrix(0.33108827,0,0,0.33108827,-28.233674,5.6152398)"&gt;</div><div class='add'>+        &lt;rect</div><div class='add'>+           style="fill:none;fill-opacity:1;stroke:#000000;stroke-width:1.87854159;stroke-linecap:butt;stroke-linejoin:bevel;stroke-miterlimit:4;stroke-dasharray:none;stroke-dashoffset:0"</div><div class='add'>+           id="rect1388-3-2-9"</div><div class='add'>+           width="66.523811"</div><div class='add'>+           height="34.773811"</div><div class='add'>+           x="-60.476192"</div><div class='add'>+           y="116.32738" /&gt;</div><div class='add'>+        &lt;text</div><div class='add'>+           xml:space="preserve"</div><div class='add'>+           style="font-style:normal;font-weight:normal;font-size:3.17499995px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.26458332"</div><div class='add'>+           x="-45.380619"</div><div class='add'>+           y="138.33725"</div><div class='add'>+           id="text1392-6-9-2"&gt;&lt;tspan</div><div class='add'>+             sodipodi:role="line"</div><div class='add'>+             id="tspan1390-7-1-0"</div><div class='add'>+             x="-45.380619"</div><div class='add'>+             y="138.33725"</div><div class='add'>+             style="font-weight:bold;font-size:12.69999981px;stroke-width:0.26458332"&gt;CRTC&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      &lt;/g&gt;</div><div class='add'>+      &lt;text</div><div class='add'>+         xml:space="preserve"</div><div class='add'>+         style="font-style:normal;font-weight:normal;font-size:1.05120528px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.08760043"</div><div class='add'>+         x="-164.26541"</div><div class='add'>+         y="24.302296"</div><div class='add'>+         id="text1531"&gt;&lt;tspan</div><div class='add'>+           sodipodi:role="line"</div><div class='add'>+           id="tspan1529"</div><div class='add'>+           x="-164.26541"</div><div class='add'>+           y="24.302296"</div><div class='add'>+           style="font-weight:bold;font-size:4.6720233px;stroke-width:0.08760043"&gt;DRM&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      &lt;text</div><div class='add'>+         xml:space="preserve"</div><div class='add'>+         style="font-style:normal;font-weight:normal;font-size:1.05120528px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#000000;fill-opacity:1;stroke:none;stroke-width:0.08760043"</div><div class='add'>+         x="-89.233742"</div><div class='add'>+         y="24.341078"</div><div class='add'>+         id="text1531-2"&gt;&lt;tspan</div><div class='add'>+           sodipodi:role="line"</div><div class='add'>+           id="tspan1529-3"</div><div class='add'>+           x="-89.233742"</div><div class='add'>+           y="24.341078"</div><div class='add'>+           style="font-weight:bold;font-size:4.6720233px;stroke-width:0.08760043"&gt;AMD Hardware&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      &lt;path</div><div class='add'>+         style="fill:none;stroke:#000000;stroke-width:1.53318286;stroke-linecap:butt;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1;marker-end:url(#Arrow1Send)"</div><div class='add'>+         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&lt;/g&gt;</div><div class='add'>+  &lt;/g&gt;</div><div class='add'>+&lt;/svg&gt;</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/mpo-overview.rst b/Documentation/gpu/amdgpu/display/mpo-overview.rst<br/>new file mode 100644<br/>index 000000000000..0499aa92d08d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/mpo-overview.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/display/mpo-overview.rst</a></div><div class='hunk'>@@ -0,0 +1,242 @@</div><div class='add'>+========================</div><div class='add'>+Multiplane Overlay (MPO)</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+.. note:: You will get more from this page if you have already read the</div><div class='add'>+   'Documentation/gpu/amdgpu/display/dcn-overview.rst'.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Multiplane Overlay (MPO) allows for multiple framebuffers to be composited via</div><div class='add'>+fixed-function hardware in the display controller rather than using graphics or</div><div class='add'>+compute shaders for composition. This can yield some power savings if it means</div><div class='add'>+the graphics/compute pipelines can be put into low-power states. In summary,</div><div class='add'>+MPO can bring the following benefits:</div><div class='add'>+</div><div class='add'>+* Decreased GPU and CPU workload - no composition shaders needed, no extra</div><div class='add'>+  buffer copy needed, GPU can remain idle.</div><div class='add'>+* Plane independent page flips - No need to be tied to global compositor</div><div class='add'>+  page-flip present rate, reduced latency, independent timing.</div><div class='add'>+</div><div class='add'>+.. note:: Keep in mind that MPO is all about power-saving; if you want to learn</div><div class='add'>+   more about power-save in the display context, check the link:</div><div class='add'>+   `Power &lt;https://gitlab.freedesktop.org/pq/color-and-hdr/-/blob/main/doc/power.rst&gt;`__.</div><div class='add'>+</div><div class='add'>+Multiplane Overlay is only available using the DRM atomic model. The atomic</div><div class='add'>+model only uses a single userspace IOCTL for configuring the display hardware</div><div class='add'>+(modesetting, page-flipping, etc) - drmModeAtomicCommit. To query hardware</div><div class='add'>+resources and limitations userspace also calls into drmModeGetResources which</div><div class='add'>+reports back the number of planes, CRTCs, and connectors. There are three types</div><div class='add'>+of DRM planes that the driver can register and work with:</div><div class='add'>+</div><div class='add'>+* ``DRM_PLANE_TYPE_PRIMARY``: Primary planes represent a "main" plane for a</div><div class='add'>+  CRTC, primary planes are the planes operated upon by CRTC modesetting and</div><div class='add'>+  flipping operations.</div><div class='add'>+* ``DRM_PLANE_TYPE_CURSOR``: Cursor planes represent a "cursor" plane for a</div><div class='add'>+  CRTC. Cursor planes are the planes operated upon by the cursor IOCTLs</div><div class='add'>+* ``DRM_PLANE_TYPE_OVERLAY``: Overlay planes represent all non-primary,</div><div class='add'>+  non-cursor planes. Some drivers refer to these types of planes as "sprites"</div><div class='add'>+  internally.</div><div class='add'>+</div><div class='add'>+To illustrate how it works, let's take a look at a device that exposes the</div><div class='add'>+following planes to userspace:</div><div class='add'>+</div><div class='add'>+* 4 Primary planes (1 per CRTC).</div><div class='add'>+* 4 Cursor planes (1 per CRTC).</div><div class='add'>+* 1 Overlay plane (shared among CRTCs).</div><div class='add'>+</div><div class='add'>+.. note:: Keep in mind that different ASICs might expose other numbers of</div><div class='add'>+   planes.</div><div class='add'>+</div><div class='add'>+For this hardware example, we have 4 pipes (if you don't know what AMD pipe</div><div class='add'>+means, look at 'Documentation/gpu/amdgpu/display/dcn-overview.rst', section</div><div class='add'>+"AMD Hardware Pipeline"). Typically most AMD devices operate in a pipe-split</div><div class='add'>+configuration for optimal single display output (e.g., 2 pipes per plane).</div><div class='add'>+</div><div class='add'>+A typical MPO configuration from userspace - 1 primary + 1 overlay on a single</div><div class='add'>+display - will see 4 pipes in use, 2 per plane.</div><div class='add'>+</div><div class='add'>+At least 1 pipe must be used per plane (primary and overlay), so for this</div><div class='add'>+hypothetical hardware that we are using as an example, we have an absolute</div><div class='add'>+limit of 4 planes across all CRTCs. Atomic commits will be rejected for display</div><div class='add'>+configurations using more than 4 planes. Again, it is important to stress that</div><div class='add'>+every DCN has different restrictions; here, we are just trying to provide the</div><div class='add'>+concept idea.</div><div class='add'>+</div><div class='add'>+Plane Restrictions</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+AMDGPU imposes restrictions on the use of DRM planes in the driver.</div><div class='add'>+</div><div class='add'>+Atomic commits will be rejected for commits which do not follow these</div><div class='add'>+restrictions:</div><div class='add'>+</div><div class='add'>+* Overlay planes must be in ARGB8888 or XRGB8888 format</div><div class='add'>+* Planes cannot be placed outside of the CRTC destination rectangle</div><div class='add'>+* Planes cannot be downscaled more than 1/4x of their original size</div><div class='add'>+* Planes cannot be upscaled more than 16x of their original size</div><div class='add'>+</div><div class='add'>+Not every property is available on every plane:</div><div class='add'>+</div><div class='add'>+* Only primary planes have color-space and non-RGB format support</div><div class='add'>+* Only overlay planes have alpha blending support</div><div class='add'>+</div><div class='add'>+Cursor Restrictions</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+Before we start to describe some restrictions around cursor and MPO, see the</div><div class='add'>+below image:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: mpo-cursor.svg</div><div class='add'>+</div><div class='add'>+The image on the left side represents how DRM expects the cursor and planes to</div><div class='add'>+be blended. However, AMD hardware handles cursors differently, as you can see</div><div class='add'>+on the right side; basically, our cursor cannot be drawn outside its associated</div><div class='add'>+plane as it is being treated as part of the plane. Another consequence of that</div><div class='add'>+is that cursors inherit the color and scale from the plane.</div><div class='add'>+</div><div class='add'>+As a result of the above behavior, do not use legacy API to set up the cursor</div><div class='add'>+plane when working with MPO; otherwise, you might encounter unexpected</div><div class='add'>+behavior.</div><div class='add'>+</div><div class='add'>+In short, AMD HW has no dedicated cursor planes. A cursor is attached to</div><div class='add'>+another plane and therefore inherits any scaling or color processing from its</div><div class='add'>+parent plane.</div><div class='add'>+</div><div class='add'>+Use Cases</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+Picture-in-Picture (PIP) playback - Underlay strategy</div><div class='add'>+-----------------------------------------------------</div><div class='add'>+</div><div class='add'>+Video playback should be done using the "primary plane as underlay" MPO</div><div class='add'>+strategy. This is a 2 planes configuration:</div><div class='add'>+</div><div class='add'>+* 1 YUV DRM Primary Plane (e.g. NV12 Video)</div><div class='add'>+* 1 RGBA DRM Overlay Plane (e.g. ARGB8888 desktop). The compositor should</div><div class='add'>+  prepare the framebuffers for the planes as follows:</div><div class='add'>+  - The overlay plane contains general desktop UI, video player controls, and video subtitles</div><div class='add'>+  - Primary plane contains one or more videos</div><div class='add'>+</div><div class='add'>+.. note:: Keep in mind that we could extend this configuration to more planes,</div><div class='add'>+   but that is currently not supported by our driver yet (maybe if we have a</div><div class='add'>+   userspace request in the future, we can change that).</div><div class='add'>+</div><div class='add'>+See below a single-video example:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: single-display-mpo.svg</div><div class='add'>+</div><div class='add'>+.. note:: We could extend this behavior to more planes, but that is currently</div><div class='add'>+   not supported by our driver.</div><div class='add'>+</div><div class='add'>+The video buffer should be used directly for the primary plane. The video can</div><div class='add'>+be scaled and positioned for the desktop using the properties: CRTC_X, CRTC_Y,</div><div class='add'>+CRTC_W, and CRTC_H. The primary plane should also have the color encoding and</div><div class='add'>+color range properties set based on the source content:</div><div class='add'>+</div><div class='add'>+* ``COLOR_RANGE``, ``COLOR_ENCODING``</div><div class='add'>+</div><div class='add'>+The overlay plane should be the native size of the CRTC. The compositor must</div><div class='add'>+draw a transparent cutout for where the video should be placed on the desktop</div><div class='add'>+(i.e., set the alpha to zero). The primary plane video will be visible through</div><div class='add'>+the underlay. The overlay plane's buffer may remain static while the primary</div><div class='add'>+plane's framebuffer is used for standard double-buffered playback.</div><div class='add'>+</div><div class='add'>+The compositor should create a YUV buffer matching the native size of the CRTC.</div><div class='add'>+Each video buffer should be composited onto this YUV buffer for direct YUV</div><div class='add'>+scanout. The primary plane should have the color encoding and color range</div><div class='add'>+properties set based on the source content: ``COLOR_RANGE``,</div><div class='add'>+``COLOR_ENCODING``. However, be mindful that the source color space and</div><div class='add'>+encoding match for each video since it affect the entire plane.</div><div class='add'>+</div><div class='add'>+The overlay plane should be the native size of the CRTC. The compositor must</div><div class='add'>+draw a transparent cutout for where each video should be placed on the desktop</div><div class='add'>+(i.e., set the alpha to zero). The primary plane videos will be visible through</div><div class='add'>+the underlay. The overlay plane's buffer may remain static while compositing</div><div class='add'>+operations for video playback will be done on the video buffer.</div><div class='add'>+</div><div class='add'>+This kernel interface is validated using IGT GPU Tools. The following tests can</div><div class='add'>+be run to validate positioning, blending, scaling under a variety of sequences</div><div class='add'>+and interactions with operations such as DPMS and S3:</div><div class='add'>+</div><div class='add'>+- ``kms_plane@plane-panning-bottom-right-pipe-*-planes``</div><div class='add'>+- ``kms_plane@plane-panning-bottom-right-suspend-pipe-*-``</div><div class='add'>+- ``kms_plane@plane-panning-top-left-pipe-*-``</div><div class='add'>+- ``kms_plane@plane-position-covered-pipe-*-``</div><div class='add'>+- ``kms_plane@plane-position-hole-dpms-pipe-*-``</div><div class='add'>+- ``kms_plane@plane-position-hole-pipe-*-``</div><div class='add'>+- ``kms_plane_multiple@atomic-pipe-*-tiling-``</div><div class='add'>+- ``kms_plane_scaling@pipe-*-plane-scaling``</div><div class='add'>+- ``kms_plane_alpha_blend@pipe-*-alpha-basic``</div><div class='add'>+- ``kms_plane_alpha_blend@pipe-*-alpha-transparant-fb``</div><div class='add'>+- ``kms_plane_alpha_blend@pipe-*-alpha-opaque-fb``</div><div class='add'>+- ``kms_plane_alpha_blend@pipe-*-constant-alpha-min``</div><div class='add'>+- ``kms_plane_alpha_blend@pipe-*-constant-alpha-mid``</div><div class='add'>+- ``kms_plane_alpha_blend@pipe-*-constant-alpha-max``</div><div class='add'>+</div><div class='add'>+Multiple Display MPO</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+AMDGPU supports display MPO when using multiple displays; however, this feature</div><div class='add'>+behavior heavily relies on the compositor implementation. Keep in mind that</div><div class='add'>+usespace can define different policies. For example, some OSes can use MPO to</div><div class='add'>+protect the plane that handles the video playback; notice that we don't have</div><div class='add'>+many limitations for a single display. Nonetheless, this manipulation can have</div><div class='add'>+many more restrictions for a multi-display scenario. The below example shows a</div><div class='add'>+video playback in the middle of two displays, and it is up to the compositor to</div><div class='add'>+define a policy on how to handle it:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: multi-display-hdcp-mpo.svg</div><div class='add'>+</div><div class='add'>+Let's discuss some of the hardware limitations we have when dealing with</div><div class='add'>+multi-display with MPO.</div><div class='add'>+</div><div class='add'>+Limitations</div><div class='add'>+~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+For simplicity's sake, for discussing the hardware limitation, this</div><div class='add'>+documentation supposes an example where we have two displays and video playback</div><div class='add'>+that will be moved around different displays.</div><div class='add'>+</div><div class='add'>+* **Hardware limitations**</div><div class='add'>+</div><div class='add'>+From the DCN overview page, each display requires at least one pipe and each</div><div class='add'>+MPO plane needs another pipe. As a result, when the video is in the middle of</div><div class='add'>+the two displays, we need to use 2 pipes. See the example below where we avoid</div><div class='add'>+pipe split:</div><div class='add'>+</div><div class='add'>+- 1 display (1 pipe) + MPO (1 pipe), we will use two pipes</div><div class='add'>+- 2 displays (2 pipes) + MPO (1-2 pipes); we will use 4 pipes. MPO in the</div><div class='add'>+  middle of both displays needs 2 pipes.</div><div class='add'>+- 3 Displays (3 pipes) + MPO (1-2 pipes), we need 5 pipes.</div><div class='add'>+</div><div class='add'>+If we use MPO with multiple displays, the userspace has to decide to enable</div><div class='add'>+multiple MPO by the price of limiting the number of external displays supported</div><div class='add'>+or disable it in favor of multiple displays; it is a policy decision. For</div><div class='add'>+example:</div><div class='add'>+</div><div class='add'>+* When ASIC has 3 pipes, AMD hardware can NOT support 2 displays with MPO</div><div class='add'>+* When ASIC has 4 pipes, AMD hardware can NOT support 3 displays with MPO</div><div class='add'>+</div><div class='add'>+Let's briefly explore how userspace can handle these two display configurations</div><div class='add'>+on an ASIC that only supports three pipes. We can have:</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: multi-display-hdcp-mpo-less-pipe-ex.svg</div><div class='add'>+</div><div class='add'>+- Total pipes are 3</div><div class='add'>+- User lights up 2 displays (2 out of 3 pipes are used)</div><div class='add'>+- User launches video (1 pipe used for MPO)</div><div class='add'>+- Now, if the user moves the video in the middle of 2 displays, one part of the</div><div class='add'>+  video won't be MPO since we have used 3/3 pipes.</div><div class='add'>+</div><div class='add'>+* **Scaling limitation**</div><div class='add'>+</div><div class='add'>+MPO cannot handle scaling less than 0.25 and more than x16. For example:</div><div class='add'>+</div><div class='add'>+If 4k video (3840x2160) is playing in windowed mode, the physical size of the</div><div class='add'>+window cannot be smaller than (960x540).</div><div class='add'>+</div><div class='add'>+.. note:: These scaling limitations might vary from ASIC to ASIC.</div><div class='add'>+</div><div class='add'>+* **Size Limitation**</div><div class='add'>+</div><div class='add'>+The minimum MPO size is 12px.</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/display/multi-display-hdcp-mpo-less-pipe-ex.svg b/Documentation/gpu/amdgpu/display/multi-display-hdcp-mpo-less-pipe-ex.svg<br/>new file mode 100644<br/>index 000000000000..6d06b39e83fa<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/display/multi-display-hdcp-mpo-less-pipe-ex.svg?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/display/multi-display-hdcp-mpo-less-pipe-ex.svg</a></div><div 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style="font-style:normal;font-weight:normal;font-size:6.54816437px;line-height:1.25;font-family:sans-serif;letter-spacing:0px;word-spacing:0px;fill:#44aa00;fill-opacity:1;stroke:none;stroke-width:0.16370411"</div><div class='add'>+         xml:space="preserve"&gt;&lt;tspan</div><div class='add'>+           style="text-align:center;text-anchor:middle;fill:#44aa00;stroke-width:0.16370411"</div><div class='add'>+           y="30.716068"</div><div class='add'>+           x="-302.27368"</div><div class='add'>+           id="tspan844"</div><div class='add'>+           sodipodi:role="line"&gt;HUBP&lt;/tspan&gt;&lt;tspan</div><div class='add'>+           id="tspan863"</div><div class='add'>+           style="text-align:center;text-anchor:middle;fill:#44aa00;stroke-width:0.16370411"</div><div class='add'>+           y="38.901276"</div><div class='add'>+           x="-302.27368"</div><div class='add'>+           sodipodi:role="line"&gt;(0)&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+      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href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/driver-core.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/driver-core.rst</a></div><div class='hunk'>@@ -148,10 +148,10 @@ PRIME Buffer Sharing</div><div class='ctx'> MMU Notifier</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c</div><div class='ctx'>    :doc: MMU Notifier</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='ctx'> AMDGPU Virtual Memory</div><div class='head'>diff --git a/Documentation/gpu/amdgpu/driver-misc.rst b/Documentation/gpu/amdgpu/driver-misc.rst<br/>index e3d6b2fa2493..be131e963d87 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/driver-misc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/amdgpu/driver-misc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/driver-misc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/driver-misc.rst</a></div><div class='hunk'>@@ -32,6 +32,23 @@ unique_id</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c</div><div class='ctx'>    :doc: unique_id</div><div class='ctx'> </div><div class='add'>+Accelerated Processing Units (APU) Info</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+.. csv-table::</div><div class='add'>+   :header-rows: 1</div><div class='add'>+   :widths: 3, 2, 2, 1, 1, 1, 1</div><div class='add'>+   :file: ./apu-asic-info-table.csv</div><div class='add'>+</div><div class='add'>+Discrete GPU Info</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+.. csv-table::</div><div class='add'>+   :header-rows: 1</div><div class='add'>+   :widths: 3, 2, 2, 1, 1, 1</div><div class='add'>+   :file: ./dgpu-asic-info-table.csv</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> GPU Memory Usage Information</div><div class='ctx'> ============================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/amdgpu/index.rst b/Documentation/gpu/amdgpu/index.rst<br/>index a24e1cfa7407..03c2966cae79 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/amdgpu/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/index.rst</a></div><div class='hunk'>@@ -3,7 +3,7 @@</div><div class='ctx'> ==========================</div><div class='ctx'> </div><div class='ctx'> The drm/amdgpu driver supports all AMD Radeon GPUs based on the Graphics Core</div><div class='del'>-Next (GCN) architecture.</div><div class='add'>+Next (GCN), Radeon DNA (RDNA), and Compute DNA (CDNA) architectures.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/amdgpu/thermal.rst b/Documentation/gpu/amdgpu/thermal.rst<br/>index 8aeb0186c9ef..5e27e4eb3959 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/thermal.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/amdgpu/thermal.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/amdgpu/thermal.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/amdgpu/thermal.rst</a></div><div class='hunk'>@@ -63,3 +63,60 @@ gpu_metrics</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c</div><div class='ctx'>    :doc: gpu_metrics</div><div class='add'>+</div><div class='add'>+GFXOFF</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+GFXOFF is a feature found in most recent GPUs that saves power at runtime. The</div><div class='add'>+card's RLC (RunList Controller) firmware powers off the gfx engine</div><div class='add'>+dynamically when there is no workload on gfx or compute pipes. GFXOFF is on by</div><div class='add'>+default on supported GPUs.</div><div class='add'>+</div><div class='add'>+Userspace can interact with GFXOFF through a debugfs interface (all values in</div><div class='add'>+`uint32_t`, unless otherwise noted):</div><div class='add'>+</div><div class='add'>+``amdgpu_gfxoff``</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Use it to enable/disable GFXOFF, and to check if it's current enabled/disabled::</div><div class='add'>+</div><div class='add'>+  $ xxd -l1 -p /sys/kernel/debug/dri/0/amdgpu_gfxoff</div><div class='add'>+  01</div><div class='add'>+</div><div class='add'>+- Write 0 to disable it, and 1 to enable it.</div><div class='add'>+- Read 0 means it's disabled, 1 it's enabled.</div><div class='add'>+</div><div class='add'>+If it's enabled, that means that the GPU is free to enter into GFXOFF mode as</div><div class='add'>+needed. Disabled means that it will never enter GFXOFF mode.</div><div class='add'>+</div><div class='add'>+``amdgpu_gfxoff_status``</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+Read it to check current GFXOFF's status of a GPU::</div><div class='add'>+</div><div class='add'>+  $ xxd -l1 -p /sys/kernel/debug/dri/0/amdgpu_gfxoff_status</div><div class='add'>+  02</div><div class='add'>+</div><div class='add'>+- 0: GPU is in GFXOFF state, the gfx engine is powered down.</div><div class='add'>+- 1: Transition out of GFXOFF state</div><div class='add'>+- 2: Not in GFXOFF state</div><div class='add'>+- 3: Transition into GFXOFF state</div><div class='add'>+</div><div class='add'>+If GFXOFF is enabled, the value will be transitioning around [0, 3], always</div><div class='add'>+getting into 0 when possible. When it's disabled, it's always at 2. Returns</div><div class='add'>+``-EINVAL`` if it's not supported.</div><div class='add'>+</div><div class='add'>+``amdgpu_gfxoff_count``</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+Read it to get the total GFXOFF entry count at the time of query since system</div><div class='add'>+power-up. The value is an `uint64_t` type, however, due to firmware limitations,</div><div class='add'>+it can currently overflow as an `uint32_t`. *Only supported in vangogh*</div><div class='add'>+</div><div class='add'>+``amdgpu_gfxoff_residency``</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+Write 1 to amdgpu_gfxoff_residency to start logging, and 0 to stop. Read it to</div><div class='add'>+get average GFXOFF residency % multiplied by 100 during the last logging</div><div class='add'>+interval. E.g. a value of 7854 means 78.54% of the time in the last logging</div><div class='add'>+interval the GPU was in GFXOFF mode. *Only supported in vangogh*</div><div class='head'>diff --git a/Documentation/gpu/drm-internals.rst b/Documentation/gpu/drm-internals.rst<br/>index 38afed24a75c..5fd20a306718 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-internals.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/drm-internals.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-internals.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/drm-internals.rst</a></div><div class='hunk'>@@ -207,6 +207,38 @@ Utilities</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Unit testing</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+KUnit</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+KUnit (Kernel unit testing framework) provides a common framework for unit tests</div><div class='add'>+within the Linux kernel.</div><div class='add'>+</div><div class='add'>+This section covers the specifics for the DRM subsystem. For general information</div><div class='add'>+about KUnit, please refer to Documentation/dev-tools/kunit/start.rst.</div><div class='add'>+</div><div class='add'>+How to run the tests?</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+In order to facilitate running the test suite, a configuration file is present</div><div class='add'>+in ``drivers/gpu/drm/tests/.kunitconfig``. It can be used by ``kunit.py`` as</div><div class='add'>+follows:</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+	$ ./tools/testing/kunit/kunit.py run --kunitconfig=drivers/gpu/drm/tests \</div><div class='add'>+		--kconfig_add CONFIG_VIRTIO_UML=y \</div><div class='add'>+		--kconfig_add CONFIG_UML_PCI_OVER_VIRTIO=y</div><div class='add'>+</div><div class='add'>+.. note::</div><div class='add'>+	The configuration included in ``.kunitconfig`` should be as generic as</div><div class='add'>+	possible.</div><div class='add'>+	``CONFIG_VIRTIO_UML`` and ``CONFIG_UML_PCI_OVER_VIRTIO`` are not</div><div class='add'>+	included in it because they are only required for User Mode Linux.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Legacy Support Code</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/drm-kms-helpers.rst b/Documentation/gpu/drm-kms-helpers.rst<br/>index c3ce91eecbc1..b8ab05e42dbb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-kms-helpers.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/drm-kms-helpers.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-kms-helpers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/drm-kms-helpers.rst</a></div><div class='hunk'>@@ -116,19 +116,22 @@ fbdev Helper Functions Reference</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_fb_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_fbdev_generic.c</div><div class='add'>+   :export:</div><div class='add'>+</div><div class='ctx'> format Helper Functions Reference</div><div class='ctx'> =================================</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_format_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='del'>-Framebuffer CMA Helper Functions Reference</div><div class='add'>+Framebuffer DMA Helper Functions Reference</div><div class='ctx'> ==========================================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_fb_cma_helper.c</div><div class='del'>-   :doc: framebuffer cma helper functions</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_fb_dma_helper.c</div><div class='add'>+   :doc: framebuffer dma helper functions</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_fb_cma_helper.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_fb_dma_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Framebuffer GEM Helper Reference</div><div class='hunk'>@@ -185,6 +188,13 @@ Bridge Helper Reference</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_bridge.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+MIPI-DSI bridge operation</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_bridge.c</div><div class='add'>+   :doc: dsi bridge operations</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Bridge Connector Helper Reference</div><div class='ctx'> ---------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -226,40 +236,43 @@ Panel Self Refresh Helper Reference</div><div class='ctx'> HDCP Helper Functions Reference</div><div class='ctx'> ===============================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_hdcp.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_hdcp_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Display Port Helper Functions Reference</div><div class='ctx'> =======================================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_helper.c</div><div class='ctx'>    :doc: dp helpers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/drm/dp/drm_dp_helper.h</div><div class='add'>+.. kernel-doc:: include/drm/display/drm_dp.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/drm/display/drm_dp_helper.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Display Port CEC Helper Functions Reference</div><div class='ctx'> ===========================================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_cec.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_cec.c</div><div class='ctx'>    :doc: dp cec helpers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_cec.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_cec.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Display Port Dual Mode Adaptor Helper Functions Reference</div><div class='ctx'> =========================================================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_dual_mode_helper.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_dual_mode_helper.c</div><div class='ctx'>    :doc: dp dual mode helpers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/drm/dp/drm_dp_dual_mode_helper.h</div><div class='add'>+.. kernel-doc:: include/drm/display/drm_dp_dual_mode_helper.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_dual_mode_helper.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_dual_mode_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Display Port MST Helpers</div><div class='hunk'>@@ -268,19 +281,19 @@ Display Port MST Helpers</div><div class='ctx'> Overview</div><div class='ctx'> --------</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_mst_topology.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_mst_topology.c</div><div class='ctx'>    :doc: dp mst helper</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_mst_topology.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_mst_topology.c</div><div class='ctx'>    :doc: Branch device and port refcounting</div><div class='ctx'> </div><div class='ctx'> Functions Reference</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/drm/dp/drm_dp_mst_helper.h</div><div class='add'>+.. kernel-doc:: include/drm/display/drm_dp_mst_helper.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_mst_topology.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_mst_topology.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Topology Lifetime Internals</div><div class='hunk'>@@ -289,7 +302,7 @@ Topology Lifetime Internals</div><div class='ctx'> These functions aren't exported to drivers, but are documented here to help make</div><div class='ctx'> the MST topology helpers easier to understand</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/dp/drm_dp_mst_topology.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dp_mst_topology.c</div><div class='ctx'>    :functions: drm_dp_mst_topology_try_get_mstb drm_dp_mst_topology_get_mstb</div><div class='ctx'>                drm_dp_mst_topology_put_mstb</div><div class='ctx'>                drm_dp_mst_topology_try_get_port drm_dp_mst_topology_get_port</div><div class='hunk'>@@ -323,13 +336,13 @@ MIPI DSI Helper Functions Reference</div><div class='ctx'> Display Stream Compression Helper Functions Reference</div><div class='ctx'> =====================================================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_dsc.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dsc_helper.c</div><div class='ctx'>    :doc: dsc helpers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/drm/drm_dsc.h</div><div class='add'>+.. kernel-doc:: include/drm/display/drm_dsc.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_dsc.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_dsc_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> Output Probing Helper Functions Reference</div><div class='hunk'>@@ -353,13 +366,13 @@ EDID Helper Functions Reference</div><div class='ctx'> SCDC Helper Functions Reference</div><div class='ctx'> ===============================</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_scdc_helper.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_scdc_helper.c</div><div class='ctx'>    :doc: scdc helpers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/drm/drm_scdc_helper.h</div><div class='add'>+.. kernel-doc:: include/drm/display/drm_scdc_helper.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_scdc_helper.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/display/drm_scdc_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> HDMI Infoframes Helper Reference</div><div class='head'>diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst<br/>index 6f9c064fd323..c92d425cb2dd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-kms.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/drm-kms.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-kms.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/drm-kms.rst</a></div><div class='hunk'>@@ -520,6 +520,12 @@ HDMI Specific Connector Properties</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_connector.c</div><div class='ctx'>    :doc: HDMI connector properties</div><div class='ctx'> </div><div class='add'>+Analog TV Specific Connector Properties</div><div class='add'>+---------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_connector.c</div><div class='add'>+   :doc: Analog TV Connector Properties</div><div class='add'>+</div><div class='ctx'> Standard CRTC Properties</div><div class='ctx'> ------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -532,6 +538,8 @@ Standard Plane Properties</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_plane.c</div><div class='ctx'>    :doc: standard plane properties</div><div class='ctx'> </div><div class='add'>+.. _plane_composition_properties:</div><div class='add'>+</div><div class='ctx'> Plane Composition Properties</div><div class='ctx'> ----------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst<br/>index 198bcc1affa1..a79fd3549ff8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-mm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/drm-mm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-mm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/drm-mm.rst</a></div><div class='hunk'>@@ -300,12 +300,12 @@ Drivers that want to map the GEM object upfront instead of handling page</div><div class='ctx'> faults can implement their own mmap file operation handler.</div><div class='ctx'> </div><div class='ctx'> For platforms without MMU the GEM core provides a helper method</div><div class='del'>-drm_gem_cma_get_unmapped_area(). The mmap() routines will call this to get a</div><div class='add'>+drm_gem_dma_get_unmapped_area(). The mmap() routines will call this to get a</div><div class='ctx'> proposed address for the mapping.</div><div class='ctx'> </div><div class='del'>-To use drm_gem_cma_get_unmapped_area(), drivers must fill the struct</div><div class='add'>+To use drm_gem_dma_get_unmapped_area(), drivers must fill the struct</div><div class='ctx'> :c:type:`struct file_operations &lt;file_operations&gt;` get_unmapped_area field with</div><div class='del'>-a pointer on drm_gem_cma_get_unmapped_area().</div><div class='add'>+a pointer on drm_gem_dma_get_unmapped_area().</div><div class='ctx'> </div><div class='ctx'> More detailed information about get_unmapped_area can be found in</div><div class='ctx'> Documentation/admin-guide/mm/nommu-mmap.rst</div><div class='hunk'>@@ -355,16 +355,16 @@ GEM Function Reference</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_gem.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='del'>-GEM CMA Helper Functions Reference</div><div class='add'>+GEM DMA Helper Functions Reference</div><div class='ctx'> ----------------------------------</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_gem_cma_helper.c</div><div class='del'>-   :doc: cma helpers</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_gem_dma_helper.c</div><div class='add'>+   :doc: dma helpers</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: include/drm/drm_gem_cma_helper.h</div><div class='add'>+.. kernel-doc:: include/drm/drm_gem_dma_helper.h</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/drm_gem_cma_helper.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_gem_dma_helper.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='ctx'> GEM SHMEM Helper Function Reference</div><div class='hunk'>@@ -466,6 +466,15 @@ DRM MM Range Allocator Function References</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/drm_mm.c</div><div class='ctx'>    :export:</div><div class='ctx'> </div><div class='add'>+DRM Buddy Allocator</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+DRM Buddy Function References</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/drm_buddy.c</div><div class='add'>+   :export:</div><div class='add'>+</div><div class='ctx'> DRM Cache Handling and Fast WC memcpy()</div><div class='ctx'> =======================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst<br/>index 199afb503ab1..65fb3036a580 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-uapi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/drm-uapi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-uapi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/drm-uapi.rst</a></div><div class='hunk'>@@ -148,7 +148,9 @@ clients together with the legacy drmAuth authentication procedure.</div><div class='ctx'> If a driver advertises render node support, DRM core will create a</div><div class='ctx'> separate render node called renderD&lt;num&gt;. There will be one render node</div><div class='ctx'> per device. No ioctls except PRIME-related ioctls will be allowed on</div><div class='del'>-this node. Especially GEM_OPEN will be explicitly prohibited. Render</div><div class='add'>+this node. Especially GEM_OPEN will be explicitly prohibited. For a</div><div class='add'>+complete list of driver-independent ioctls that can be used on render</div><div class='add'>+nodes, see the ioctls marked DRM_RENDER_ALLOW in drm_ioctl.c  Render</div><div class='ctx'> nodes are designed to avoid the buffer-leaks, which occur if clients</div><div class='ctx'> guess the flink names or mmap offsets on the legacy interface.</div><div class='ctx'> Additionally to this basic interface, drivers must mark their</div><div class='hunk'>@@ -400,19 +402,19 @@ It's possible to run the IGT-tests in a VM in two ways:</div><div class='ctx'> 	1. Use IGT inside a VM</div><div class='ctx'> 	2. Use IGT from the host machine and write the results in a shared directory.</div><div class='ctx'> </div><div class='del'>-As follow, there is an example of using a VM with a shared directory with</div><div class='del'>-the host machine to run igt-tests. As an example it's used virtme::</div><div class='add'>+Following is an example of using a VM with a shared directory with</div><div class='add'>+the host machine to run igt-tests. This example uses virtme::</div><div class='ctx'> </div><div class='ctx'> 	$ virtme-run --rwdir /path/for/shared_dir --kdir=path/for/kernel/directory --mods=auto</div><div class='ctx'> </div><div class='del'>-Run the igt-tests in the guest machine, as example it's ran the 'kms_flip'</div><div class='add'>+Run the igt-tests in the guest machine. This example runs the 'kms_flip'</div><div class='ctx'> tests::</div><div class='ctx'> </div><div class='ctx'> 	$ /path/for/igt-gpu-tools/scripts/run-tests.sh -p -s -t "kms_flip.*" -v</div><div class='ctx'> </div><div class='del'>-In this example, instead of build the igt_runner, Piglit is used</div><div class='del'>-(-p option); it's created html summary of the tests results and it's saved</div><div class='del'>-in the folder "igt-gpu-tools/results"; it's executed only the igt-tests</div><div class='add'>+In this example, instead of building the igt_runner, Piglit is used</div><div class='add'>+(-p option). It creates an HTML summary of the test results and saves</div><div class='add'>+them in the folder "igt-gpu-tools/results". It executes only the igt-tests</div><div class='ctx'> matching the -t option.</div><div class='ctx'> </div><div class='ctx'> Display CRC Support</div><div class='head'>diff --git a/Documentation/gpu/drm-usage-stats.rst b/Documentation/gpu/drm-usage-stats.rst<br/>new file mode 100644<br/>index 000000000000..b46327356e80<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/drm-usage-stats.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/drm-usage-stats.rst</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+.. _drm-client-usage-stats:</div><div class='add'>+</div><div class='add'>+======================</div><div class='add'>+DRM client usage stats</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+DRM drivers can choose to export partly standardised text output via the</div><div class='add'>+`fops-&gt;show_fdinfo()` as part of the driver specific file operations registered</div><div class='add'>+in the `struct drm_driver` object registered with the DRM core.</div><div class='add'>+</div><div class='add'>+One purpose of this output is to enable writing as generic as practicaly</div><div class='add'>+feasible `top(1)` like userspace monitoring tools.</div><div class='add'>+</div><div class='add'>+Given the differences between various DRM drivers the specification of the</div><div class='add'>+output is split between common and driver specific parts. Having said that,</div><div class='add'>+wherever possible effort should still be made to standardise as much as</div><div class='add'>+possible.</div><div class='add'>+</div><div class='add'>+File format specification</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+- File shall contain one key value pair per one line of text.</div><div class='add'>+- Colon character (`:`) must be used to delimit keys and values.</div><div class='add'>+- All keys shall be prefixed with `drm-`.</div><div class='add'>+- Whitespace between the delimiter and first non-whitespace character shall be</div><div class='add'>+  ignored when parsing.</div><div class='add'>+- Neither keys or values are allowed to contain whitespace characters.</div><div class='add'>+- Numerical key value pairs can end with optional unit string.</div><div class='add'>+- Data type of the value is fixed as defined in the specification.</div><div class='add'>+</div><div class='add'>+Key types</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+1. Mandatory, fully standardised.</div><div class='add'>+2. Optional, fully standardised.</div><div class='add'>+3. Driver specific.</div><div class='add'>+</div><div class='add'>+Data types</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+- &lt;uint&gt; - Unsigned integer without defining the maximum value.</div><div class='add'>+- &lt;str&gt; - String excluding any above defined reserved characters or whitespace.</div><div class='add'>+</div><div class='add'>+Mandatory fully standardised keys</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+- drm-driver: &lt;str&gt;</div><div class='add'>+</div><div class='add'>+String shall contain the name this driver registered as via the respective</div><div class='add'>+`struct drm_driver` data structure.</div><div class='add'>+</div><div class='add'>+Optional fully standardised keys</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+- drm-pdev: &lt;aaaa:bb.cc.d&gt;</div><div class='add'>+</div><div class='add'>+For PCI devices this should contain the PCI slot address of the device in</div><div class='add'>+question.</div><div class='add'>+</div><div class='add'>+- drm-client-id: &lt;uint&gt;</div><div class='add'>+</div><div class='add'>+Unique value relating to the open DRM file descriptor used to distinguish</div><div class='add'>+duplicated and shared file descriptors. Conceptually the value should map 1:1</div><div class='add'>+to the in kernel representation of `struct drm_file` instances.</div><div class='add'>+</div><div class='add'>+Uniqueness of the value shall be either globally unique, or unique within the</div><div class='add'>+scope of each device, in which case `drm-pdev` shall be present as well.</div><div class='add'>+</div><div class='add'>+Userspace should make sure to not double account any usage statistics by using</div><div class='add'>+the above described criteria in order to associate data to individual clients.</div><div class='add'>+</div><div class='add'>+- drm-engine-&lt;str&gt;: &lt;uint&gt; ns</div><div class='add'>+</div><div class='add'>+GPUs usually contain multiple execution engines. Each shall be given a stable</div><div class='add'>+and unique name (str), with possible values documented in the driver specific</div><div class='add'>+documentation.</div><div class='add'>+</div><div class='add'>+Value shall be in specified time units which the respective GPU engine spent</div><div class='add'>+busy executing workloads belonging to this client.</div><div class='add'>+</div><div class='add'>+Values are not required to be constantly monotonic if it makes the driver</div><div class='add'>+implementation easier, but are required to catch up with the previously reported</div><div class='add'>+larger value within a reasonable period. Upon observing a value lower than what</div><div class='add'>+was previously read, userspace is expected to stay with that larger previous</div><div class='add'>+value until a monotonic update is seen.</div><div class='add'>+</div><div class='add'>+- drm-engine-capacity-&lt;str&gt;: &lt;uint&gt;</div><div class='add'>+</div><div class='add'>+Engine identifier string must be the same as the one specified in the</div><div class='add'>+drm-engine-&lt;str&gt; tag and shall contain a greater than zero number in case the</div><div class='add'>+exported engine corresponds to a group of identical hardware engines.</div><div class='add'>+</div><div class='add'>+In the absence of this tag parser shall assume capacity of one. Zero capacity</div><div class='add'>+is not allowed.</div><div class='add'>+</div><div class='add'>+- drm-memory-&lt;str&gt;: &lt;uint&gt; [KiB|MiB]</div><div class='add'>+</div><div class='add'>+Each possible memory type which can be used to store buffer objects by the</div><div class='add'>+GPU in question shall be given a stable and unique name to be returned as the</div><div class='add'>+string here.</div><div class='add'>+</div><div class='add'>+Value shall reflect the amount of storage currently consumed by the buffer</div><div class='add'>+object belong to this client, in the respective memory region.</div><div class='add'>+</div><div class='add'>+Default unit shall be bytes with optional unit specifiers of 'KiB' or 'MiB'</div><div class='add'>+indicating kibi- or mebi-bytes.</div><div class='add'>+</div><div class='add'>+- drm-cycles-&lt;str&gt; &lt;uint&gt;</div><div class='add'>+</div><div class='add'>+Engine identifier string must be the same as the one specified in the</div><div class='add'>+drm-engine-&lt;str&gt; tag and shall contain the number of busy cycles for the given</div><div class='add'>+engine.</div><div class='add'>+</div><div class='add'>+Values are not required to be constantly monotonic if it makes the driver</div><div class='add'>+implementation easier, but are required to catch up with the previously reported</div><div class='add'>+larger value within a reasonable period. Upon observing a value lower than what</div><div class='add'>+was previously read, userspace is expected to stay with that larger previous</div><div class='add'>+value until a monotonic update is seen.</div><div class='add'>+</div><div class='add'>+- drm-maxfreq-&lt;str&gt; &lt;uint&gt; [Hz|MHz|KHz]</div><div class='add'>+</div><div class='add'>+Engine identifier string must be the same as the one specified in the</div><div class='add'>+drm-engine-&lt;str&gt; tag and shall contain the maximum frequency for the given</div><div class='add'>+engine.  Taken together with drm-cycles-&lt;str&gt;, this can be used to calculate</div><div class='add'>+percentage utilization of the engine, whereas drm-engine-&lt;str&gt; only reflects</div><div class='add'>+time active without considering what frequency the engine is operating as a</div><div class='add'>+percentage of it's maximum frequency.</div><div class='add'>+</div><div class='add'>+Driver specific implementations</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+:ref:`i915-usage-stats`</div><div class='head'>diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst<br/>index bcaefc952764..60ea21734902 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/i915.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/i915.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/i915.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/i915.rst</a></div><div class='hunk'>@@ -187,19 +187,7 @@ Display Refresh Rate Switching (DRRS)</div><div class='ctx'>    :doc: Display Refresh Rate Switching (DRRS)</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c</div><div class='del'>-   :functions: intel_drrs_enable</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c</div><div class='del'>-   :functions: intel_drrs_disable</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c</div><div class='del'>-   :functions: intel_drrs_invalidate</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c</div><div class='del'>-   :functions: intel_drrs_flush</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/i915/display/intel_drrs.c</div><div class='del'>-   :functions: intel_drrs_init</div><div class='add'>+   :internal:</div><div class='ctx'> </div><div class='ctx'> DPIO</div><div class='ctx'> ----</div><div class='hunk'>@@ -258,6 +246,18 @@ Display State Buffer</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/i915/display/intel_dsb.c</div><div class='ctx'>    :internal:</div><div class='ctx'> </div><div class='add'>+GT Programming</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+Multicast/Replicated (MCR) Registers</div><div class='add'>+------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gt_mcr.c</div><div class='add'>+   :doc: GT Multicast/Replicated (MCR) Register Support</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_gt_mcr.c</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='ctx'> Memory Management and Command Submission</div><div class='ctx'> ========================================</div><div class='ctx'> </div><div class='hunk'>@@ -494,7 +494,7 @@ WOPCM</div><div class='ctx'> WOPCM Layout</div><div class='ctx'> ~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-.. kernel-doc:: drivers/gpu/drm/i915/intel_wopcm.c</div><div class='add'>+.. kernel-doc:: drivers/gpu/drm/i915/gt/intel_wopcm.c</div><div class='ctx'>    :doc: WOPCM Layout</div><div class='ctx'> </div><div class='ctx'> GuC</div><div class='hunk'>@@ -709,3 +709,31 @@ The style guide for ``i915_reg.h``.</div><div class='ctx'> </div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/i915/i915_reg.h</div><div class='ctx'>    :doc: The i915 register macro definition style guide</div><div class='add'>+</div><div class='add'>+.. _i915-usage-stats:</div><div class='add'>+</div><div class='add'>+i915 DRM client usage stats implementation</div><div class='add'>+==========================================</div><div class='add'>+</div><div class='add'>+The drm/i915 driver implements the DRM client usage stats specification as</div><div class='add'>+documented in :ref:`drm-client-usage-stats`.</div><div class='add'>+</div><div class='add'>+Example of the output showing the implemented key value pairs and entirety of</div><div class='add'>+the currently possible format options:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+      pos:    0</div><div class='add'>+      flags:  0100002</div><div class='add'>+      mnt_id: 21</div><div class='add'>+      drm-driver: i915</div><div class='add'>+      drm-pdev:   0000:00:02.0</div><div class='add'>+      drm-client-id:      7</div><div class='add'>+      drm-engine-render:  9288864723 ns</div><div class='add'>+      drm-engine-copy:    2035071108 ns</div><div class='add'>+      drm-engine-video:   0 ns</div><div class='add'>+      drm-engine-capacity-video:   2</div><div class='add'>+      drm-engine-video-enhance:   0 ns</div><div class='add'>+</div><div class='add'>+Possible `drm-engine-` key names are: `render`, `copy`, `video` and</div><div class='add'>+`video-enhance`.</div><div class='head'>diff --git a/Documentation/gpu/index.rst b/Documentation/gpu/index.rst<br/>index b9c1214d8f23..eee5996acf2c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/index.rst</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='del'>-==================================</div><div class='del'>-Linux GPU Driver Developer's Guide</div><div class='del'>-==================================</div><div class='add'>+============================</div><div class='add'>+GPU Driver Developer's Guide</div><div class='add'>+============================</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'> </div><div class='hunk'>@@ -10,6 +10,7 @@ Linux GPU Driver Developer's Guide</div><div class='ctx'>    drm-kms</div><div class='ctx'>    drm-kms-helpers</div><div class='ctx'>    drm-uapi</div><div class='add'>+   drm-usage-stats</div><div class='ctx'>    driver-uapi</div><div class='ctx'>    drm-client</div><div class='ctx'>    drivers</div><div class='head'>diff --git a/Documentation/gpu/introduction.rst b/Documentation/gpu/introduction.rst<br/>index 25a56e9c0cfd..f05eccd2c07c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/introduction.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/introduction.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/introduction.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/introduction.rst</a></div><div class='hunk'>@@ -112,3 +112,63 @@ Please conduct yourself in a respectful and civilised manner when</div><div class='ctx'> interacting with community members on mailing lists, IRC, or bug</div><div class='ctx'> trackers. The community represents the project as a whole, and abusive</div><div class='ctx'> or bullying behaviour is not tolerated by the project.</div><div class='add'>+</div><div class='add'>+Simple DRM drivers to use as examples</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+The DRM subsystem contains a lot of helper functions to ease writing drivers for</div><div class='add'>+simple graphic devices. For example, the `drivers/gpu/drm/tiny/` directory has a</div><div class='add'>+set of drivers that are simple enough to be implemented in a single source file.</div><div class='add'>+</div><div class='add'>+These drivers make use of the `struct drm_simple_display_pipe_funcs`, that hides</div><div class='add'>+any complexity of the DRM subsystem and just requires drivers to implement a few</div><div class='add'>+functions needed to operate the device. This could be used for devices that just</div><div class='add'>+need a display pipeline with one full-screen scanout buffer feeding one output.</div><div class='add'>+</div><div class='add'>+The tiny DRM drivers are good examples to understand how DRM drivers should look</div><div class='add'>+like. Since are just a few hundreds lines of code, they are quite easy to read.</div><div class='add'>+</div><div class='add'>+External References</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+Delving into a Linux kernel subsystem for the first time can be an overwhelming</div><div class='add'>+experience, one needs to get familiar with all the concepts and learn about the</div><div class='add'>+subsystem's internals, among other details.</div><div class='add'>+</div><div class='add'>+To shallow the learning curve, this section contains a list of presentations</div><div class='add'>+and documents that can be used to learn about DRM/KMS and graphics in general.</div><div class='add'>+</div><div class='add'>+There are different reasons why someone might want to get into DRM: porting an</div><div class='add'>+existing fbdev driver, write a DRM driver for a new hardware, fixing bugs that</div><div class='add'>+could face when working on the graphics user-space stack, etc. For this reason,</div><div class='add'>+the learning material covers many aspects of the Linux graphics stack. From an</div><div class='add'>+overview of the kernel and user-space stacks to very specific topics.</div><div class='add'>+</div><div class='add'>+The list is sorted in reverse chronological order, to keep the most up-to-date</div><div class='add'>+material at the top. But all of them contain useful information, and it can be</div><div class='add'>+valuable to go through older material to understand the rationale and context</div><div class='add'>+in which the changes to the DRM subsystem were made.</div><div class='add'>+</div><div class='add'>+Conference talks</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+* `An Overview of the Linux and Userspace Graphics Stack &lt;https://www.youtube.com/watch?v=wjAJmqwg47k&gt;`_ - Paul Kocialkowski (2020)</div><div class='add'>+* `Getting pixels on screen on Linux: introduction to Kernel Mode Setting &lt;https://www.youtube.com/watch?v=haes4_Xnc5Q&gt;`_ - Simon Ser (2020)</div><div class='add'>+* `Everything Great about Upstream Graphics &lt;https://www.youtube.com/watch?v=kVzHOgt6WGE&gt;`_ - Daniel Vetter (2019)</div><div class='add'>+* `An introduction to the Linux DRM subsystem &lt;https://www.youtube.com/watch?v=LbDOCJcDRoo&gt;`_ - Maxime Ripard (2017)</div><div class='add'>+* `Embrace the Atomic (Display) Age &lt;https://www.youtube.com/watch?v=LjiB_JeDn2M&gt;`_ - Daniel Vetter (2016)</div><div class='add'>+* `Anatomy of an Atomic KMS Driver &lt;https://www.youtube.com/watch?v=lihqR9sENpc&gt;`_ - Laurent Pinchart (2015)</div><div class='add'>+* `Atomic Modesetting for Drivers &lt;https://www.youtube.com/watch?v=kl9suFgbTc8&gt;`_ - Daniel Vetter (2015)</div><div class='add'>+* `Anatomy of an Embedded KMS Driver &lt;https://www.youtube.com/watch?v=Ja8fM7rTae4&gt;`_ - Laurent Pinchart (2013)</div><div class='add'>+</div><div class='add'>+Slides and articles</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+* `Understanding the Linux Graphics Stack &lt;https://bootlin.com/doc/training/graphics/graphics-slides.pdf&gt;`_ - Bootlin (2022)</div><div class='add'>+* `DRM KMS overview &lt;https://wiki.st.com/stm32mpu/wiki/DRM_KMS_overview&gt;`_ - STMicroelectronics (2021)</div><div class='add'>+* `Linux graphic stack &lt;https://studiopixl.com/2017-05-13/linux-graphic-stack-an-overview&gt;`_ - Nathan Gauër (2017)</div><div class='add'>+* `Atomic mode setting design overview, part 1 &lt;https://lwn.net/Articles/653071/&gt;`_ - Daniel Vetter (2015)</div><div class='add'>+* `Atomic mode setting design overview, part 2 &lt;https://lwn.net/Articles/653466/&gt;`_ - Daniel Vetter (2015)</div><div class='add'>+* `The DRM/KMS subsystem from a newbie’s point of view &lt;https://bootlin.com/pub/conferences/2014/elce/brezillon-drm-kms/brezillon-drm-kms.pdf&gt;`_ - Boris Brezillon (2014)</div><div class='add'>+* `A brief introduction to the Linux graphics stack &lt;https://blogs.igalia.com/itoral/2014/07/29/a-brief-introduction-to-the-linux-graphics-stack/&gt;`_ - Iago Toral (2014)</div><div class='add'>+* `The Linux Graphics Stack &lt;https://blog.mecheye.net/2012/06/the-linux-graphics-stack/&gt;`_ - Jasper St. Pierre (2012)</div><div class='head'>diff --git a/Documentation/gpu/rfc/i915_small_bar.h b/Documentation/gpu/rfc/i915_small_bar.h<br/>new file mode 100644<br/>index 000000000000..6003c81d5aa4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/rfc/i915_small_bar.h?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/rfc/i915_small_bar.h</a></div><div class='hunk'>@@ -0,0 +1,189 @@</div><div class='add'>+/**</div><div class='add'>+ * struct __drm_i915_memory_region_info - Describes one region as known to the</div><div class='add'>+ * driver.</div><div class='add'>+ *</div><div class='add'>+ * Note this is using both struct drm_i915_query_item and struct drm_i915_query.</div><div class='add'>+ * For this new query we are adding the new query id DRM_I915_QUERY_MEMORY_REGIONS</div><div class='add'>+ * at &amp;drm_i915_query_item.query_id.</div><div class='add'>+ */</div><div class='add'>+struct __drm_i915_memory_region_info {</div><div class='add'>+	/** @region: The class:instance pair encoding */</div><div class='add'>+	struct drm_i915_gem_memory_class_instance region;</div><div class='add'>+</div><div class='add'>+	/** @rsvd0: MBZ */</div><div class='add'>+	__u32 rsvd0;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @probed_size: Memory probed by the driver</div><div class='add'>+	 *</div><div class='add'>+	 * Note that it should not be possible to ever encounter a zero value</div><div class='add'>+	 * here, also note that no current region type will ever return -1 here.</div><div class='add'>+	 * Although for future region types, this might be a possibility. The</div><div class='add'>+	 * same applies to the other size fields.</div><div class='add'>+	 */</div><div class='add'>+	__u64 probed_size;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @unallocated_size: Estimate of memory remaining</div><div class='add'>+	 *</div><div class='add'>+	 * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable accounting.</div><div class='add'>+	 * Without this (or if this is an older kernel) the value here will</div><div class='add'>+	 * always equal the @probed_size. Note this is only currently tracked</div><div class='add'>+	 * for I915_MEMORY_CLASS_DEVICE regions (for other types the value here</div><div class='add'>+	 * will always equal the @probed_size).</div><div class='add'>+	 */</div><div class='add'>+	__u64 unallocated_size;</div><div class='add'>+</div><div class='add'>+	union {</div><div class='add'>+		/** @rsvd1: MBZ */</div><div class='add'>+		__u64 rsvd1[8];</div><div class='add'>+		struct {</div><div class='add'>+			/**</div><div class='add'>+			 * @probed_cpu_visible_size: Memory probed by the driver</div><div class='add'>+			 * that is CPU accessible.</div><div class='add'>+			 *</div><div class='add'>+			 * This will be always be &lt;= @probed_size, and the</div><div class='add'>+			 * remainder (if there is any) will not be CPU</div><div class='add'>+			 * accessible.</div><div class='add'>+			 *</div><div class='add'>+			 * On systems without small BAR, the @probed_size will</div><div class='add'>+			 * always equal the @probed_cpu_visible_size, since all</div><div class='add'>+			 * of it will be CPU accessible.</div><div class='add'>+			 *</div><div class='add'>+			 * Note this is only tracked for</div><div class='add'>+			 * I915_MEMORY_CLASS_DEVICE regions (for other types the</div><div class='add'>+			 * value here will always equal the @probed_size).</div><div class='add'>+			 *</div><div class='add'>+			 * Note that if the value returned here is zero, then</div><div class='add'>+			 * this must be an old kernel which lacks the relevant</div><div class='add'>+			 * small-bar uAPI support (including</div><div class='add'>+			 * I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS), but on</div><div class='add'>+			 * such systems we should never actually end up with a</div><div class='add'>+			 * small BAR configuration, assuming we are able to load</div><div class='add'>+			 * the kernel module. Hence it should be safe to treat</div><div class='add'>+			 * this the same as when @probed_cpu_visible_size ==</div><div class='add'>+			 * @probed_size.</div><div class='add'>+			 */</div><div class='add'>+			__u64 probed_cpu_visible_size;</div><div class='add'>+</div><div class='add'>+			/**</div><div class='add'>+			 * @unallocated_cpu_visible_size: Estimate of CPU</div><div class='add'>+			 * visible memory remaining</div><div class='add'>+			 *</div><div class='add'>+			 * Note this is only tracked for</div><div class='add'>+			 * I915_MEMORY_CLASS_DEVICE regions (for other types the</div><div class='add'>+			 * value here will always equal the</div><div class='add'>+			 * @probed_cpu_visible_size).</div><div class='add'>+			 *</div><div class='add'>+			 * Requires CAP_PERFMON or CAP_SYS_ADMIN to get reliable</div><div class='add'>+			 * accounting.  Without this the value here will always</div><div class='add'>+			 * equal the @probed_cpu_visible_size. Note this is only</div><div class='add'>+			 * currently tracked for I915_MEMORY_CLASS_DEVICE</div><div class='add'>+			 * regions (for other types the value here will also</div><div class='add'>+			 * always equal the @probed_cpu_visible_size).</div><div class='add'>+			 *</div><div class='add'>+			 * If this is an older kernel the value here will be</div><div class='add'>+			 * zero, see also @probed_cpu_visible_size.</div><div class='add'>+			 */</div><div class='add'>+			__u64 unallocated_cpu_visible_size;</div><div class='add'>+		};</div><div class='add'>+	};</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct __drm_i915_gem_create_ext - Existing gem_create behaviour, with added</div><div class='add'>+ * extension support using struct i915_user_extension.</div><div class='add'>+ *</div><div class='add'>+ * Note that new buffer flags should be added here, at least for the stuff that</div><div class='add'>+ * is immutable. Previously we would have two ioctls, one to create the object</div><div class='add'>+ * with gem_create, and another to apply various parameters, however this</div><div class='add'>+ * creates some ambiguity for the params which are considered immutable. Also in</div><div class='add'>+ * general we're phasing out the various SET/GET ioctls.</div><div class='add'>+ */</div><div class='add'>+struct __drm_i915_gem_create_ext {</div><div class='add'>+	/**</div><div class='add'>+	 * @size: Requested size for the object.</div><div class='add'>+	 *</div><div class='add'>+	 * The (page-aligned) allocated size for the object will be returned.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that for some devices we have might have further minimum</div><div class='add'>+	 * page-size restrictions (larger than 4K), like for device local-memory.</div><div class='add'>+	 * However in general the final size here should always reflect any</div><div class='add'>+	 * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS</div><div class='add'>+	 * extension to place the object in device local-memory. The kernel will</div><div class='add'>+	 * always select the largest minimum page-size for the set of possible</div><div class='add'>+	 * placements as the value to use when rounding up the @size.</div><div class='add'>+	 */</div><div class='add'>+	__u64 size;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @handle: Returned handle for the object.</div><div class='add'>+	 *</div><div class='add'>+	 * Object handles are nonzero.</div><div class='add'>+	 */</div><div class='add'>+	__u32 handle;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @flags: Optional flags.</div><div class='add'>+	 *</div><div class='add'>+	 * Supported values:</div><div class='add'>+	 *</div><div class='add'>+	 * I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS - Signal to the kernel that</div><div class='add'>+	 * the object will need to be accessed via the CPU.</div><div class='add'>+	 *</div><div class='add'>+	 * Only valid when placing objects in I915_MEMORY_CLASS_DEVICE, and only</div><div class='add'>+	 * strictly required on configurations where some subset of the device</div><div class='add'>+	 * memory is directly visible/mappable through the CPU (which we also</div><div class='add'>+	 * call small BAR), like on some DG2+ systems. Note that this is quite</div><div class='add'>+	 * undesirable, but due to various factors like the client CPU, BIOS etc</div><div class='add'>+	 * it's something we can expect to see in the wild. See</div><div class='add'>+	 * &amp;__drm_i915_memory_region_info.probed_cpu_visible_size for how to</div><div class='add'>+	 * determine if this system applies.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that one of the placements MUST be I915_MEMORY_CLASS_SYSTEM, to</div><div class='add'>+	 * ensure the kernel can always spill the allocation to system memory,</div><div class='add'>+	 * if the object can't be allocated in the mappable part of</div><div class='add'>+	 * I915_MEMORY_CLASS_DEVICE.</div><div class='add'>+	 *</div><div class='add'>+	 * Also note that since the kernel only supports flat-CCS on objects</div><div class='add'>+	 * that can *only* be placed in I915_MEMORY_CLASS_DEVICE, we therefore</div><div class='add'>+	 * don't support I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS together with</div><div class='add'>+	 * flat-CCS.</div><div class='add'>+	 *</div><div class='add'>+	 * Without this hint, the kernel will assume that non-mappable</div><div class='add'>+	 * I915_MEMORY_CLASS_DEVICE is preferred for this object. Note that the</div><div class='add'>+	 * kernel can still migrate the object to the mappable part, as a last</div><div class='add'>+	 * resort, if userspace ever CPU faults this object, but this might be</div><div class='add'>+	 * expensive, and so ideally should be avoided.</div><div class='add'>+	 *</div><div class='add'>+	 * On older kernels which lack the relevant small-bar uAPI support (see</div><div class='add'>+	 * also &amp;__drm_i915_memory_region_info.probed_cpu_visible_size),</div><div class='add'>+	 * usage of the flag will result in an error, but it should NEVER be</div><div class='add'>+	 * possible to end up with a small BAR configuration, assuming we can</div><div class='add'>+	 * also successfully load the i915 kernel module. In such cases the</div><div class='add'>+	 * entire I915_MEMORY_CLASS_DEVICE region will be CPU accessible, and as</div><div class='add'>+	 * such there are zero restrictions on where the object can be placed.</div><div class='add'>+	 */</div><div class='add'>+#define I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS (1 &lt;&lt; 0)</div><div class='add'>+	__u32 flags;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @extensions: The chain of extensions to apply to this object.</div><div class='add'>+	 *</div><div class='add'>+	 * This will be useful in the future when we need to support several</div><div class='add'>+	 * different extensions, and we need to apply more than one when</div><div class='add'>+	 * creating the object. See struct i915_user_extension.</div><div class='add'>+	 *</div><div class='add'>+	 * If we don't supply any extensions then we get the same old gem_create</div><div class='add'>+	 * behaviour.</div><div class='add'>+	 *</div><div class='add'>+	 * For I915_GEM_CREATE_EXT_MEMORY_REGIONS usage see</div><div class='add'>+	 * struct drm_i915_gem_create_ext_memory_regions.</div><div class='add'>+	 *</div><div class='add'>+	 * For I915_GEM_CREATE_EXT_PROTECTED_CONTENT usage see</div><div class='add'>+	 * struct drm_i915_gem_create_ext_protected_content.</div><div class='add'>+	 */</div><div class='add'>+#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0</div><div class='add'>+#define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1</div><div class='add'>+	__u64 extensions;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/gpu/rfc/i915_small_bar.rst b/Documentation/gpu/rfc/i915_small_bar.rst<br/>new file mode 100644<br/>index 000000000000..d6c03ce3b862<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/rfc/i915_small_bar.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/rfc/i915_small_bar.rst</a></div><div class='hunk'>@@ -0,0 +1,47 @@</div><div class='add'>+==========================</div><div class='add'>+I915 Small BAR RFC Section</div><div class='add'>+==========================</div><div class='add'>+Starting from DG2 we will have resizable BAR support for device local-memory(i.e</div><div class='add'>+I915_MEMORY_CLASS_DEVICE), but in some cases the final BAR size might still be</div><div class='add'>+smaller than the total probed_size. In such cases, only some subset of</div><div class='add'>+I915_MEMORY_CLASS_DEVICE will be CPU accessible(for example the first 256M),</div><div class='add'>+while the remainder is only accessible via the GPU.</div><div class='add'>+</div><div class='add'>+I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS flag</div><div class='add'>+----------------------------------------------</div><div class='add'>+New gem_create_ext flag to tell the kernel that a BO will require CPU access.</div><div class='add'>+This becomes important when placing an object in I915_MEMORY_CLASS_DEVICE, where</div><div class='add'>+underneath the device has a small BAR, meaning only some portion of it is CPU</div><div class='add'>+accessible. Without this flag the kernel will assume that CPU access is not</div><div class='add'>+required, and prioritize using the non-CPU visible portion of</div><div class='add'>+I915_MEMORY_CLASS_DEVICE.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: Documentation/gpu/rfc/i915_small_bar.h</div><div class='add'>+   :functions: __drm_i915_gem_create_ext</div><div class='add'>+</div><div class='add'>+probed_cpu_visible_size attribute</div><div class='add'>+---------------------------------</div><div class='add'>+New struct__drm_i915_memory_region attribute which returns the total size of the</div><div class='add'>+CPU accessible portion, for the particular region. This should only be</div><div class='add'>+applicable for I915_MEMORY_CLASS_DEVICE. We also report the</div><div class='add'>+unallocated_cpu_visible_size, alongside the unallocated_size.</div><div class='add'>+</div><div class='add'>+Vulkan will need this as part of creating a separate VkMemoryHeap with the</div><div class='add'>+VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT set, to represent the CPU visible portion,</div><div class='add'>+where the total size of the heap needs to be known. It also wants to be able to</div><div class='add'>+give a rough estimate of how memory can potentially be allocated.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: Documentation/gpu/rfc/i915_small_bar.h</div><div class='add'>+   :functions: __drm_i915_memory_region_info</div><div class='add'>+</div><div class='add'>+Error Capture restrictions</div><div class='add'>+--------------------------</div><div class='add'>+With error capture we have two new restrictions:</div><div class='add'>+</div><div class='add'>+    1) Error capture is best effort on small BAR systems; if the pages are not</div><div class='add'>+    CPU accessible, at the time of capture, then the kernel is free to skip</div><div class='add'>+    trying to capture them.</div><div class='add'>+</div><div class='add'>+    2) On discrete and newer integrated platforms we now reject error capture</div><div class='add'>+    on recoverable contexts. In the future the kernel may want to blit during</div><div class='add'>+    error capture, when for example something is not currently CPU accessible.</div><div class='head'>diff --git a/Documentation/gpu/rfc/i915_vm_bind.h b/Documentation/gpu/rfc/i915_vm_bind.h<br/>new file mode 100644<br/>index 000000000000..8a8fcd4fceac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/rfc/i915_vm_bind.h?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/rfc/i915_vm_bind.h</a></div><div class='hunk'>@@ -0,0 +1,291 @@</div><div class='add'>+/* SPDX-License-Identifier: MIT */</div><div class='add'>+/*</div><div class='add'>+ * Copyright © 2022 Intel Corporation</div><div class='add'>+ */</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: I915_PARAM_VM_BIND_VERSION</div><div class='add'>+ *</div><div class='add'>+ * VM_BIND feature version supported.</div><div class='add'>+ * See typedef drm_i915_getparam_t param.</div><div class='add'>+ *</div><div class='add'>+ * Specifies the VM_BIND feature version supported.</div><div class='add'>+ * The following versions of VM_BIND have been defined:</div><div class='add'>+ *</div><div class='add'>+ * 0: No VM_BIND support.</div><div class='add'>+ *</div><div class='add'>+ * 1: In VM_UNBIND calls, the UMD must specify the exact mappings created</div><div class='add'>+ *    previously with VM_BIND, the ioctl will not support unbinding multiple</div><div class='add'>+ *    mappings or splitting them. Similarly, VM_BIND calls will not replace</div><div class='add'>+ *    any existing mappings.</div><div class='add'>+ *</div><div class='add'>+ * 2: The restrictions on unbinding partial or multiple mappings is</div><div class='add'>+ *    lifted, Similarly, binding will replace any mappings in the given range.</div><div class='add'>+ *</div><div class='add'>+ * See struct drm_i915_gem_vm_bind and struct drm_i915_gem_vm_unbind.</div><div class='add'>+ */</div><div class='add'>+#define I915_PARAM_VM_BIND_VERSION	57</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * DOC: I915_VM_CREATE_FLAGS_USE_VM_BIND</div><div class='add'>+ *</div><div class='add'>+ * Flag to opt-in for VM_BIND mode of binding during VM creation.</div><div class='add'>+ * See struct drm_i915_gem_vm_control flags.</div><div class='add'>+ *</div><div class='add'>+ * The older execbuf2 ioctl will not support VM_BIND mode of operation.</div><div class='add'>+ * For VM_BIND mode, we have new execbuf3 ioctl which will not accept any</div><div class='add'>+ * execlist (See struct drm_i915_gem_execbuffer3 for more details).</div><div class='add'>+ */</div><div class='add'>+#define I915_VM_CREATE_FLAGS_USE_VM_BIND	(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+/* VM_BIND related ioctls */</div><div class='add'>+#define DRM_I915_GEM_VM_BIND		0x3d</div><div class='add'>+#define DRM_I915_GEM_VM_UNBIND		0x3e</div><div class='add'>+#define DRM_I915_GEM_EXECBUFFER3	0x3f</div><div class='add'>+</div><div class='add'>+#define DRM_IOCTL_I915_GEM_VM_BIND		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_BIND, struct drm_i915_gem_vm_bind)</div><div class='add'>+#define DRM_IOCTL_I915_GEM_VM_UNBIND		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_UNBIND, struct drm_i915_gem_vm_bind)</div><div class='add'>+#define DRM_IOCTL_I915_GEM_EXECBUFFER3		DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_EXECBUFFER3, struct drm_i915_gem_execbuffer3)</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct drm_i915_gem_timeline_fence - An input or output timeline fence.</div><div class='add'>+ *</div><div class='add'>+ * The operation will wait for input fence to signal.</div><div class='add'>+ *</div><div class='add'>+ * The returned output fence will be signaled after the completion of the</div><div class='add'>+ * operation.</div><div class='add'>+ */</div><div class='add'>+struct drm_i915_gem_timeline_fence {</div><div class='add'>+	/** @handle: User's handle for a drm_syncobj to wait on or signal. */</div><div class='add'>+	__u32 handle;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @flags: Supported flags are:</div><div class='add'>+	 *</div><div class='add'>+	 * I915_TIMELINE_FENCE_WAIT:</div><div class='add'>+	 * Wait for the input fence before the operation.</div><div class='add'>+	 *</div><div class='add'>+	 * I915_TIMELINE_FENCE_SIGNAL:</div><div class='add'>+	 * Return operation completion fence as output.</div><div class='add'>+	 */</div><div class='add'>+	__u32 flags;</div><div class='add'>+#define I915_TIMELINE_FENCE_WAIT            (1 &lt;&lt; 0)</div><div class='add'>+#define I915_TIMELINE_FENCE_SIGNAL          (1 &lt;&lt; 1)</div><div class='add'>+#define __I915_TIMELINE_FENCE_UNKNOWN_FLAGS (-(I915_TIMELINE_FENCE_SIGNAL &lt;&lt; 1))</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @value: A point in the timeline.</div><div class='add'>+	 * Value must be 0 for a binary drm_syncobj. A Value of 0 for a</div><div class='add'>+	 * timeline drm_syncobj is invalid as it turns a drm_syncobj into a</div><div class='add'>+	 * binary one.</div><div class='add'>+	 */</div><div class='add'>+	__u64 value;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct drm_i915_gem_vm_bind - VA to object mapping to bind.</div><div class='add'>+ *</div><div class='add'>+ * This structure is passed to VM_BIND ioctl and specifies the mapping of GPU</div><div class='add'>+ * virtual address (VA) range to the section of an object that should be bound</div><div class='add'>+ * in the device page table of the specified address space (VM).</div><div class='add'>+ * The VA range specified must be unique (ie., not currently bound) and can</div><div class='add'>+ * be mapped to whole object or a section of the object (partial binding).</div><div class='add'>+ * Multiple VA mappings can be created to the same section of the object</div><div class='add'>+ * (aliasing).</div><div class='add'>+ *</div><div class='add'>+ * The @start, @offset and @length must be 4K page aligned. However the DG2</div><div class='add'>+ * and XEHPSDV has 64K page size for device local memory and has compact page</div><div class='add'>+ * table. On those platforms, for binding device local-memory objects, the</div><div class='add'>+ * @start, @offset and @length must be 64K aligned. Also, UMDs should not mix</div><div class='add'>+ * the local memory 64K page and the system memory 4K page bindings in the same</div><div class='add'>+ * 2M range.</div><div class='add'>+ *</div><div class='add'>+ * Error code -EINVAL will be returned if @start, @offset and @length are not</div><div class='add'>+ * properly aligned. In version 1 (See I915_PARAM_VM_BIND_VERSION), error code</div><div class='add'>+ * -ENOSPC will be returned if the VA range specified can't be reserved.</div><div class='add'>+ *</div><div class='add'>+ * VM_BIND/UNBIND ioctl calls executed on different CPU threads concurrently</div><div class='add'>+ * are not ordered. Furthermore, parts of the VM_BIND operation can be done</div><div class='add'>+ * asynchronously, if valid @fence is specified.</div><div class='add'>+ */</div><div class='add'>+struct drm_i915_gem_vm_bind {</div><div class='add'>+	/** @vm_id: VM (address space) id to bind */</div><div class='add'>+	__u32 vm_id;</div><div class='add'>+</div><div class='add'>+	/** @handle: Object handle */</div><div class='add'>+	__u32 handle;</div><div class='add'>+</div><div class='add'>+	/** @start: Virtual Address start to bind */</div><div class='add'>+	__u64 start;</div><div class='add'>+</div><div class='add'>+	/** @offset: Offset in object to bind */</div><div class='add'>+	__u64 offset;</div><div class='add'>+</div><div class='add'>+	/** @length: Length of mapping to bind */</div><div class='add'>+	__u64 length;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @flags: Supported flags are:</div><div class='add'>+	 *</div><div class='add'>+	 * I915_GEM_VM_BIND_CAPTURE:</div><div class='add'>+	 * Capture this mapping in the dump upon GPU error.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that @fence carries its own flags.</div><div class='add'>+	 */</div><div class='add'>+	__u64 flags;</div><div class='add'>+#define I915_GEM_VM_BIND_CAPTURE	(1 &lt;&lt; 0)</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @fence: Timeline fence for bind completion signaling.</div><div class='add'>+	 *</div><div class='add'>+	 * Timeline fence is of format struct drm_i915_gem_timeline_fence.</div><div class='add'>+	 *</div><div class='add'>+	 * It is an out fence, hence using I915_TIMELINE_FENCE_WAIT flag</div><div class='add'>+	 * is invalid, and an error will be returned.</div><div class='add'>+	 *</div><div class='add'>+	 * If I915_TIMELINE_FENCE_SIGNAL flag is not set, then out fence</div><div class='add'>+	 * is not requested and binding is completed synchronously.</div><div class='add'>+	 */</div><div class='add'>+	struct drm_i915_gem_timeline_fence fence;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @extensions: Zero-terminated chain of extensions.</div><div class='add'>+	 *</div><div class='add'>+	 * For future extensions. See struct i915_user_extension.</div><div class='add'>+	 */</div><div class='add'>+	__u64 extensions;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct drm_i915_gem_vm_unbind - VA to object mapping to unbind.</div><div class='add'>+ *</div><div class='add'>+ * This structure is passed to VM_UNBIND ioctl and specifies the GPU virtual</div><div class='add'>+ * address (VA) range that should be unbound from the device page table of the</div><div class='add'>+ * specified address space (VM). VM_UNBIND will force unbind the specified</div><div class='add'>+ * range from device page table without waiting for any GPU job to complete.</div><div class='add'>+ * It is UMDs responsibility to ensure the mapping is no longer in use before</div><div class='add'>+ * calling VM_UNBIND.</div><div class='add'>+ *</div><div class='add'>+ * If the specified mapping is not found, the ioctl will simply return without</div><div class='add'>+ * any error.</div><div class='add'>+ *</div><div class='add'>+ * VM_BIND/UNBIND ioctl calls executed on different CPU threads concurrently</div><div class='add'>+ * are not ordered. Furthermore, parts of the VM_UNBIND operation can be done</div><div class='add'>+ * asynchronously, if valid @fence is specified.</div><div class='add'>+ */</div><div class='add'>+struct drm_i915_gem_vm_unbind {</div><div class='add'>+	/** @vm_id: VM (address space) id to bind */</div><div class='add'>+	__u32 vm_id;</div><div class='add'>+</div><div class='add'>+	/** @rsvd: Reserved, MBZ */</div><div class='add'>+	__u32 rsvd;</div><div class='add'>+</div><div class='add'>+	/** @start: Virtual Address start to unbind */</div><div class='add'>+	__u64 start;</div><div class='add'>+</div><div class='add'>+	/** @length: Length of mapping to unbind */</div><div class='add'>+	__u64 length;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @flags: Currently reserved, MBZ.</div><div class='add'>+	 *</div><div class='add'>+	 * Note that @fence carries its own flags.</div><div class='add'>+	 */</div><div class='add'>+	__u64 flags;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @fence: Timeline fence for unbind completion signaling.</div><div class='add'>+	 *</div><div class='add'>+	 * Timeline fence is of format struct drm_i915_gem_timeline_fence.</div><div class='add'>+	 *</div><div class='add'>+	 * It is an out fence, hence using I915_TIMELINE_FENCE_WAIT flag</div><div class='add'>+	 * is invalid, and an error will be returned.</div><div class='add'>+	 *</div><div class='add'>+	 * If I915_TIMELINE_FENCE_SIGNAL flag is not set, then out fence</div><div class='add'>+	 * is not requested and unbinding is completed synchronously.</div><div class='add'>+	 */</div><div class='add'>+	struct drm_i915_gem_timeline_fence fence;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @extensions: Zero-terminated chain of extensions.</div><div class='add'>+	 *</div><div class='add'>+	 * For future extensions. See struct i915_user_extension.</div><div class='add'>+	 */</div><div class='add'>+	__u64 extensions;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct drm_i915_gem_execbuffer3 - Structure for DRM_I915_GEM_EXECBUFFER3</div><div class='add'>+ * ioctl.</div><div class='add'>+ *</div><div class='add'>+ * DRM_I915_GEM_EXECBUFFER3 ioctl only works in VM_BIND mode and VM_BIND mode</div><div class='add'>+ * only works with this ioctl for submission.</div><div class='add'>+ * See I915_VM_CREATE_FLAGS_USE_VM_BIND.</div><div class='add'>+ */</div><div class='add'>+struct drm_i915_gem_execbuffer3 {</div><div class='add'>+	/**</div><div class='add'>+	 * @ctx_id: Context id</div><div class='add'>+	 *</div><div class='add'>+	 * Only contexts with user engine map are allowed.</div><div class='add'>+	 */</div><div class='add'>+	__u32 ctx_id;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @engine_idx: Engine index</div><div class='add'>+	 *</div><div class='add'>+	 * An index in the user engine map of the context specified by @ctx_id.</div><div class='add'>+	 */</div><div class='add'>+	__u32 engine_idx;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @batch_address: Batch gpu virtual address/es.</div><div class='add'>+	 *</div><div class='add'>+	 * For normal submission, it is the gpu virtual address of the batch</div><div class='add'>+	 * buffer. For parallel submission, it is a pointer to an array of</div><div class='add'>+	 * batch buffer gpu virtual addresses with array size equal to the</div><div class='add'>+	 * number of (parallel) engines involved in that submission (See</div><div class='add'>+	 * struct i915_context_engines_parallel_submit).</div><div class='add'>+	 */</div><div class='add'>+	__u64 batch_address;</div><div class='add'>+</div><div class='add'>+	/** @flags: Currently reserved, MBZ */</div><div class='add'>+	__u64 flags;</div><div class='add'>+</div><div class='add'>+	/** @rsvd1: Reserved, MBZ */</div><div class='add'>+	__u32 rsvd1;</div><div class='add'>+</div><div class='add'>+	/** @fence_count: Number of fences in @timeline_fences array. */</div><div class='add'>+	__u32 fence_count;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @timeline_fences: Pointer to an array of timeline fences.</div><div class='add'>+	 *</div><div class='add'>+	 * Timeline fences are of format struct drm_i915_gem_timeline_fence.</div><div class='add'>+	 */</div><div class='add'>+	__u64 timeline_fences;</div><div class='add'>+</div><div class='add'>+	/** @rsvd2: Reserved, MBZ */</div><div class='add'>+	__u64 rsvd2;</div><div class='add'>+</div><div class='add'>+	/**</div><div class='add'>+	 * @extensions: Zero-terminated chain of extensions.</div><div class='add'>+	 *</div><div class='add'>+	 * For future extensions. See struct i915_user_extension.</div><div class='add'>+	 */</div><div class='add'>+	__u64 extensions;</div><div class='add'>+};</div><div class='add'>+</div><div class='add'>+/**</div><div class='add'>+ * struct drm_i915_gem_create_ext_vm_private - Extension to make the object</div><div class='add'>+ * private to the specified VM.</div><div class='add'>+ *</div><div class='add'>+ * See struct drm_i915_gem_create_ext.</div><div class='add'>+ */</div><div class='add'>+struct drm_i915_gem_create_ext_vm_private {</div><div class='add'>+#define I915_GEM_CREATE_EXT_VM_PRIVATE		2</div><div class='add'>+	/** @base: Extension link. See struct i915_user_extension. */</div><div class='add'>+	struct i915_user_extension base;</div><div class='add'>+</div><div class='add'>+	/** @vm_id: Id of the VM to which the object is private */</div><div class='add'>+	__u32 vm_id;</div><div class='add'>+};</div><div class='head'>diff --git a/Documentation/gpu/rfc/i915_vm_bind.rst b/Documentation/gpu/rfc/i915_vm_bind.rst<br/>new file mode 100644<br/>index 000000000000..9a1dcdf2799e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/rfc/i915_vm_bind.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/rfc/i915_vm_bind.rst</a></div><div class='hunk'>@@ -0,0 +1,245 @@</div><div class='add'>+==========================================</div><div class='add'>+I915 VM_BIND feature design and use cases</div><div class='add'>+==========================================</div><div class='add'>+</div><div class='add'>+VM_BIND feature</div><div class='add'>+================</div><div class='add'>+DRM_I915_GEM_VM_BIND/UNBIND ioctls allows UMD to bind/unbind GEM buffer</div><div class='add'>+objects (BOs) or sections of a BOs at specified GPU virtual addresses on a</div><div class='add'>+specified address space (VM). These mappings (also referred to as persistent</div><div class='add'>+mappings) will be persistent across multiple GPU submissions (execbuf calls)</div><div class='add'>+issued by the UMD, without user having to provide a list of all required</div><div class='add'>+mappings during each submission (as required by older execbuf mode).</div><div class='add'>+</div><div class='add'>+The VM_BIND/UNBIND calls allow UMDs to request a timeline out fence for</div><div class='add'>+signaling the completion of bind/unbind operation.</div><div class='add'>+</div><div class='add'>+VM_BIND feature is advertised to user via I915_PARAM_VM_BIND_VERSION.</div><div class='add'>+User has to opt-in for VM_BIND mode of binding for an address space (VM)</div><div class='add'>+during VM creation time via I915_VM_CREATE_FLAGS_USE_VM_BIND extension.</div><div class='add'>+</div><div class='add'>+VM_BIND/UNBIND ioctl calls executed on different CPU threads concurrently are</div><div class='add'>+not ordered. Furthermore, parts of the VM_BIND/UNBIND operations can be done</div><div class='add'>+asynchronously, when valid out fence is specified.</div><div class='add'>+</div><div class='add'>+VM_BIND features include:</div><div class='add'>+</div><div class='add'>+* Multiple Virtual Address (VA) mappings can map to the same physical pages</div><div class='add'>+  of an object (aliasing).</div><div class='add'>+* VA mapping can map to a partial section of the BO (partial binding).</div><div class='add'>+* Support capture of persistent mappings in the dump upon GPU error.</div><div class='add'>+* Support for userptr gem objects (no special uapi is required for this).</div><div class='add'>+</div><div class='add'>+TLB flush consideration</div><div class='add'>+------------------------</div><div class='add'>+The i915 driver flushes the TLB for each submission and when an object's</div><div class='add'>+pages are released. The VM_BIND/UNBIND operation will not do any additional</div><div class='add'>+TLB flush. Any VM_BIND mapping added will be in the working set for subsequent</div><div class='add'>+submissions on that VM and will not be in the working set for currently running</div><div class='add'>+batches (which would require additional TLB flushes, which is not supported).</div><div class='add'>+</div><div class='add'>+Execbuf ioctl in VM_BIND mode</div><div class='add'>+-------------------------------</div><div class='add'>+A VM in VM_BIND mode will not support older execbuf mode of binding.</div><div class='add'>+The execbuf ioctl handling in VM_BIND mode differs significantly from the</div><div class='add'>+older execbuf2 ioctl (See struct drm_i915_gem_execbuffer2).</div><div class='add'>+Hence, a new execbuf3 ioctl has been added to support VM_BIND mode. (See</div><div class='add'>+struct drm_i915_gem_execbuffer3). The execbuf3 ioctl will not accept any</div><div class='add'>+execlist. Hence, no support for implicit sync. It is expected that the below</div><div class='add'>+work will be able to support requirements of object dependency setting in all</div><div class='add'>+use cases:</div><div class='add'>+</div><div class='add'>+"dma-buf: Add an API for exporting sync files"</div><div class='add'>+(https://lwn.net/Articles/859290/)</div><div class='add'>+</div><div class='add'>+The new execbuf3 ioctl only works in VM_BIND mode and the VM_BIND mode only</div><div class='add'>+works with execbuf3 ioctl for submission. All BOs mapped on that VM (through</div><div class='add'>+VM_BIND call) at the time of execbuf3 call are deemed required for that</div><div class='add'>+submission.</div><div class='add'>+</div><div class='add'>+The execbuf3 ioctl directly specifies the batch addresses instead of as</div><div class='add'>+object handles as in execbuf2 ioctl. The execbuf3 ioctl will also not</div><div class='add'>+support many of the older features like in/out/submit fences, fence array,</div><div class='add'>+default gem context and many more (See struct drm_i915_gem_execbuffer3).</div><div class='add'>+</div><div class='add'>+In VM_BIND mode, VA allocation is completely managed by the user instead of</div><div class='add'>+the i915 driver. Hence all VA assignment, eviction are not applicable in</div><div class='add'>+VM_BIND mode. Also, for determining object activeness, VM_BIND mode will not</div><div class='add'>+be using the i915_vma active reference tracking. It will instead use dma-resv</div><div class='add'>+object for that (See `VM_BIND dma_resv usage`_).</div><div class='add'>+</div><div class='add'>+So, a lot of existing code supporting execbuf2 ioctl, like relocations, VA</div><div class='add'>+evictions, vma lookup table, implicit sync, vma active reference tracking etc.,</div><div class='add'>+are not applicable for execbuf3 ioctl. Hence, all execbuf3 specific handling</div><div class='add'>+should be in a separate file and only functionalities common to these ioctls</div><div class='add'>+can be the shared code where possible.</div><div class='add'>+</div><div class='add'>+VM_PRIVATE objects</div><div class='add'>+-------------------</div><div class='add'>+By default, BOs can be mapped on multiple VMs and can also be dma-buf</div><div class='add'>+exported. Hence these BOs are referred to as Shared BOs.</div><div class='add'>+During each execbuf submission, the request fence must be added to the</div><div class='add'>+dma-resv fence list of all shared BOs mapped on the VM.</div><div class='add'>+</div><div class='add'>+VM_BIND feature introduces an optimization where user can create BO which</div><div class='add'>+is private to a specified VM via I915_GEM_CREATE_EXT_VM_PRIVATE flag during</div><div class='add'>+BO creation. Unlike Shared BOs, these VM private BOs can only be mapped on</div><div class='add'>+the VM they are private to and can't be dma-buf exported.</div><div class='add'>+All private BOs of a VM share the dma-resv object. Hence during each execbuf</div><div class='add'>+submission, they need only one dma-resv fence list updated. Thus, the fast</div><div class='add'>+path (where required mappings are already bound) submission latency is O(1)</div><div class='add'>+w.r.t the number of VM private BOs.</div><div class='add'>+</div><div class='add'>+VM_BIND locking hirarchy</div><div class='add'>+-------------------------</div><div class='add'>+The locking design here supports the older (execlist based) execbuf mode, the</div><div class='add'>+newer VM_BIND mode, the VM_BIND mode with GPU page faults and possible future</div><div class='add'>+system allocator support (See `Shared Virtual Memory (SVM) support`_).</div><div class='add'>+The older execbuf mode and the newer VM_BIND mode without page faults manages</div><div class='add'>+residency of backing storage using dma_fence. The VM_BIND mode with page faults</div><div class='add'>+and the system allocator support do not use any dma_fence at all.</div><div class='add'>+</div><div class='add'>+VM_BIND locking order is as below.</div><div class='add'>+</div><div class='add'>+1) Lock-A: A vm_bind mutex will protect vm_bind lists. This lock is taken in</div><div class='add'>+   vm_bind/vm_unbind ioctl calls, in the execbuf path and while releasing the</div><div class='add'>+   mapping.</div><div class='add'>+</div><div class='add'>+   In future, when GPU page faults are supported, we can potentially use a</div><div class='add'>+   rwsem instead, so that multiple page fault handlers can take the read side</div><div class='add'>+   lock to lookup the mapping and hence can run in parallel.</div><div class='add'>+   The older execbuf mode of binding do not need this lock.</div><div class='add'>+</div><div class='add'>+2) Lock-B: The object's dma-resv lock will protect i915_vma state and needs to</div><div class='add'>+   be held while binding/unbinding a vma in the async worker and while updating</div><div class='add'>+   dma-resv fence list of an object. Note that private BOs of a VM will all</div><div class='add'>+   share a dma-resv object.</div><div class='add'>+</div><div class='add'>+   The future system allocator support will use the HMM prescribed locking</div><div class='add'>+   instead.</div><div class='add'>+</div><div class='add'>+3) Lock-C: Spinlock/s to protect some of the VM's lists like the list of</div><div class='add'>+   invalidated vmas (due to eviction and userptr invalidation) etc.</div><div class='add'>+</div><div class='add'>+When GPU page faults are supported, the execbuf path do not take any of these</div><div class='add'>+locks. There we will simply smash the new batch buffer address into the ring and</div><div class='add'>+then tell the scheduler run that. The lock taking only happens from the page</div><div class='add'>+fault handler, where we take lock-A in read mode, whichever lock-B we need to</div><div class='add'>+find the backing storage (dma_resv lock for gem objects, and hmm/core mm for</div><div class='add'>+system allocator) and some additional locks (lock-D) for taking care of page</div><div class='add'>+table races. Page fault mode should not need to ever manipulate the vm lists,</div><div class='add'>+so won't ever need lock-C.</div><div class='add'>+</div><div class='add'>+VM_BIND LRU handling</div><div class='add'>+---------------------</div><div class='add'>+We need to ensure VM_BIND mapped objects are properly LRU tagged to avoid</div><div class='add'>+performance degradation. We will also need support for bulk LRU movement of</div><div class='add'>+VM_BIND objects to avoid additional latencies in execbuf path.</div><div class='add'>+</div><div class='add'>+The page table pages are similar to VM_BIND mapped objects (See</div><div class='add'>+`Evictable page table allocations`_) and are maintained per VM and needs to</div><div class='add'>+be pinned in memory when VM is made active (ie., upon an execbuf call with</div><div class='add'>+that VM). So, bulk LRU movement of page table pages is also needed.</div><div class='add'>+</div><div class='add'>+VM_BIND dma_resv usage</div><div class='add'>+-----------------------</div><div class='add'>+Fences needs to be added to all VM_BIND mapped objects. During each execbuf</div><div class='add'>+submission, they are added with DMA_RESV_USAGE_BOOKKEEP usage to prevent</div><div class='add'>+over sync (See enum dma_resv_usage). One can override it with either</div><div class='add'>+DMA_RESV_USAGE_READ or DMA_RESV_USAGE_WRITE usage during explicit object</div><div class='add'>+dependency setting.</div><div class='add'>+</div><div class='add'>+Note that DRM_I915_GEM_WAIT and DRM_I915_GEM_BUSY ioctls do not check for</div><div class='add'>+DMA_RESV_USAGE_BOOKKEEP usage and hence should not be used for end of batch</div><div class='add'>+check. Instead, the execbuf3 out fence should be used for end of batch check</div><div class='add'>+(See struct drm_i915_gem_execbuffer3).</div><div class='add'>+</div><div class='add'>+Also, in VM_BIND mode, use dma-resv apis for determining object activeness</div><div class='add'>+(See dma_resv_test_signaled() and dma_resv_wait_timeout()) and do not use the</div><div class='add'>+older i915_vma active reference tracking which is deprecated. This should be</div><div class='add'>+easier to get it working with the current TTM backend.</div><div class='add'>+</div><div class='add'>+Mesa use case</div><div class='add'>+--------------</div><div class='add'>+VM_BIND can potentially reduce the CPU overhead in Mesa (both Vulkan and Iris),</div><div class='add'>+hence improving performance of CPU-bound applications. It also allows us to</div><div class='add'>+implement Vulkan's Sparse Resources. With increasing GPU hardware performance,</div><div class='add'>+reducing CPU overhead becomes more impactful.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Other VM_BIND use cases</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+Long running Compute contexts</div><div class='add'>+------------------------------</div><div class='add'>+Usage of dma-fence expects that they complete in reasonable amount of time.</div><div class='add'>+Compute on the other hand can be long running. Hence it is appropriate for</div><div class='add'>+compute to use user/memory fence (See `User/Memory Fence`_) and dma-fence usage</div><div class='add'>+must be limited to in-kernel consumption only.</div><div class='add'>+</div><div class='add'>+Where GPU page faults are not available, kernel driver upon buffer invalidation</div><div class='add'>+will initiate a suspend (preemption) of long running context, finish the</div><div class='add'>+invalidation, revalidate the BO and then resume the compute context. This is</div><div class='add'>+done by having a per-context preempt fence which is enabled when someone tries</div><div class='add'>+to wait on it and triggers the context preemption.</div><div class='add'>+</div><div class='add'>+User/Memory Fence</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='add'>+User/Memory fence is a &lt;address, value&gt; pair. To signal the user fence, the</div><div class='add'>+specified value will be written at the specified virtual address and wakeup the</div><div class='add'>+waiting process. User fence can be signaled either by the GPU or kernel async</div><div class='add'>+worker (like upon bind completion). User can wait on a user fence with a new</div><div class='add'>+user fence wait ioctl.</div><div class='add'>+</div><div class='add'>+Here is some prior work on this:</div><div class='add'>+https://patchwork.freedesktop.org/patch/349417/</div><div class='add'>+</div><div class='add'>+Low Latency Submission</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+Allows compute UMD to directly submit GPU jobs instead of through execbuf</div><div class='add'>+ioctl. This is made possible by VM_BIND is not being synchronized against</div><div class='add'>+execbuf. VM_BIND allows bind/unbind of mappings required for the directly</div><div class='add'>+submitted jobs.</div><div class='add'>+</div><div class='add'>+Debugger</div><div class='add'>+---------</div><div class='add'>+With debug event interface user space process (debugger) is able to keep track</div><div class='add'>+of and act upon resources created by another process (debugged) and attached</div><div class='add'>+to GPU via vm_bind interface.</div><div class='add'>+</div><div class='add'>+GPU page faults</div><div class='add'>+----------------</div><div class='add'>+GPU page faults when supported (in future), will only be supported in the</div><div class='add'>+VM_BIND mode. While both the older execbuf mode and the newer VM_BIND mode of</div><div class='add'>+binding will require using dma-fence to ensure residency, the GPU page faults</div><div class='add'>+mode when supported, will not use any dma-fence as residency is purely managed</div><div class='add'>+by installing and removing/invalidating page table entries.</div><div class='add'>+</div><div class='add'>+Page level hints settings</div><div class='add'>+--------------------------</div><div class='add'>+VM_BIND allows any hints setting per mapping instead of per BO. Possible hints</div><div class='add'>+include placement and atomicity. Sub-BO level placement hint will be even more</div><div class='add'>+relevant with upcoming GPU on-demand page fault support.</div><div class='add'>+</div><div class='add'>+Page level Cache/CLOS settings</div><div class='add'>+-------------------------------</div><div class='add'>+VM_BIND allows cache/CLOS settings per mapping instead of per BO.</div><div class='add'>+</div><div class='add'>+Evictable page table allocations</div><div class='add'>+---------------------------------</div><div class='add'>+Make pagetable allocations evictable and manage them similar to VM_BIND</div><div class='add'>+mapped objects. Page table pages are similar to persistent mappings of a</div><div class='add'>+VM (difference here are that the page table pages will not have an i915_vma</div><div class='add'>+structure and after swapping pages back in, parent page link needs to be</div><div class='add'>+updated).</div><div class='add'>+</div><div class='add'>+Shared Virtual Memory (SVM) support</div><div class='add'>+------------------------------------</div><div class='add'>+VM_BIND interface can be used to map system memory directly (without gem BO</div><div class='add'>+abstraction) using the HMM interface. SVM is only supported with GPU page</div><div class='add'>+faults enabled.</div><div class='add'>+</div><div class='add'>+VM_BIND UAPI</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: Documentation/gpu/rfc/i915_vm_bind.h</div><div class='head'>diff --git a/Documentation/gpu/rfc/index.rst b/Documentation/gpu/rfc/index.rst<br/>index 91e93a705230..476719771eef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/rfc/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/rfc/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/rfc/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/rfc/index.rst</a></div><div class='hunk'>@@ -23,3 +23,11 @@ host such documentation:</div><div class='ctx'> .. toctree::</div><div class='ctx'> </div><div class='ctx'>     i915_scheduler.rst</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+</div><div class='add'>+    i915_small_bar.rst</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+</div><div class='add'>+    i915_vm_bind.rst</div><div class='head'>diff --git a/Documentation/gpu/todo.rst b/Documentation/gpu/todo.rst<br/>index 127e76ee0b2d..1f8a5ebe188e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/todo.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/todo.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/todo.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/todo.rst</a></div><div class='hunk'>@@ -322,18 +322,6 @@ Contact: Daniel Vetter, Noralf Tronnes</div><div class='ctx'> </div><div class='ctx'> Level: Advanced</div><div class='ctx'> </div><div class='del'>-idr_init_base()</div><div class='del'>----------------</div><div class='del'>-</div><div class='del'>-DRM core&amp;drivers uses a lot of idr (integer lookup directories) for mapping</div><div class='del'>-userspace IDs to internal objects, and in most places ID=0 means NULL and hence</div><div class='del'>-is never used. Switching to idr_init_base() for these would make the idr more</div><div class='del'>-efficient.</div><div class='del'>-</div><div class='del'>-Contact: Daniel Vetter</div><div class='del'>-</div><div class='del'>-Level: Starter</div><div class='del'>-</div><div class='ctx'> struct drm_gem_object_funcs</div><div class='ctx'> ---------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -343,19 +331,6 @@ converted, except for struct drm_driver.gem_prime_mmap.</div><div class='ctx'> </div><div class='ctx'> Level: Intermediate</div><div class='ctx'> </div><div class='del'>-Rename CMA helpers to DMA helpers</div><div class='del'>----------------------------------</div><div class='del'>-</div><div class='del'>-CMA (standing for contiguous memory allocator) is really a bit an accident of</div><div class='del'>-what these were used for first, a much better name would be DMA helpers. In the</div><div class='del'>-text these should even be called coherent DMA memory helpers (so maybe CDM, but</div><div class='del'>-no one knows what that means) since underneath they just use dma_alloc_coherent.</div><div class='del'>-</div><div class='del'>-Contact: Laurent Pinchart, Daniel Vetter</div><div class='del'>-</div><div class='del'>-Level: Intermediate (mostly because it is a huge tasks without good partial</div><div class='del'>-milestones, not technically itself that challenging)</div><div class='del'>-</div><div class='ctx'> connector register/unregister fixes</div><div class='ctx'> -----------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -533,17 +508,18 @@ Clean up the debugfs support</div><div class='ctx'> </div><div class='ctx'> There's a bunch of issues with it:</div><div class='ctx'> </div><div class='del'>-- The drm_info_list -&gt;show() function doesn't even bother to cast to the drm</div><div class='del'>-  structure for you. This is lazy.</div><div class='add'>+- Convert drivers to support the drm_debugfs_add_files() function instead of</div><div class='add'>+  the drm_debugfs_create_files() function.</div><div class='add'>+</div><div class='add'>+- Improve late-register debugfs by rolling out the same debugfs pre-register</div><div class='add'>+  infrastructure for connector and crtc too. That way, the drivers won't need to</div><div class='add'>+  split their setup code into init and register anymore.</div><div class='ctx'> </div><div class='ctx'> - We probably want to have some support for debugfs files on crtc/connectors and</div><div class='ctx'>   maybe other kms objects directly in core. There's even drm_print support in</div><div class='ctx'>   the funcs for these objects to dump kms state, so it's all there. And then the</div><div class='ctx'>   -&gt;show() functions should obviously give you a pointer to the right object.</div><div class='ctx'> </div><div class='del'>-- The drm_info_list stuff is centered on drm_minor instead of drm_device. For</div><div class='del'>-  anything we want to print drm_device (or maybe drm_file) is the right thing.</div><div class='del'>-</div><div class='ctx'> - The drm_driver-&gt;debugfs_init hooks we have is just an artifact of the old</div><div class='ctx'>   midlayered load sequence. DRM debugfs should work more like sysfs, where you</div><div class='ctx'>   can create properties/files for an object anytime you want, and the core</div><div class='hunk'>@@ -552,8 +528,6 @@ There's a bunch of issues with it:</div><div class='ctx'>   this (together with the drm_minor-&gt;drm_device move) would allow us to remove</div><div class='ctx'>   debugfs_init.</div><div class='ctx'> </div><div class='del'>-Previous RFC that hasn't landed yet: https://lore.kernel.org/dri-devel/20200513114130.28641-2-wambui.karugax@gmail.com/</div><div class='del'>-</div><div class='ctx'> Contact: Daniel Vetter</div><div class='ctx'> </div><div class='ctx'> Level: Intermediate</div><div class='hunk'>@@ -603,6 +577,20 @@ Level: Advanced</div><div class='ctx'> Better Testing</div><div class='ctx'> ==============</div><div class='ctx'> </div><div class='add'>+Add unit tests using the Kernel Unit Testing (KUnit) framework</div><div class='add'>+--------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+The `KUnit &lt;https://www.kernel.org/doc/html/latest/dev-tools/kunit/index.html&gt;`_</div><div class='add'>+provides a common framework for unit tests within the Linux kernel. Having a</div><div class='add'>+test suite would allow to identify regressions earlier.</div><div class='add'>+</div><div class='add'>+A good candidate for the first unit tests are the format-conversion helpers in</div><div class='add'>+``drm_format_helper.c``.</div><div class='add'>+</div><div class='add'>+Contact: Javier Martinez Canillas &lt;javierm@redhat.com&gt;</div><div class='add'>+</div><div class='add'>+Level: Intermediate</div><div class='add'>+</div><div class='ctx'> Enable trinity for DRM</div><div class='ctx'> ----------------------</div><div class='ctx'> </div><div class='hunk'>@@ -662,17 +650,6 @@ See drivers/gpu/drm/amd/display/TODO for tasks.</div><div class='ctx'> </div><div class='ctx'> Contact: Harry Wentland, Alex Deucher</div><div class='ctx'> </div><div class='del'>-vmwgfx: Replace hashtable with Linux' implementation</div><div class='del'>-----------------------------------------------------</div><div class='del'>-</div><div class='del'>-The vmwgfx driver uses its own hashtable implementation. Replace the</div><div class='del'>-code with Linux' implementation and update the callers. It's mostly a</div><div class='del'>-refactoring task, but the interfaces are different.</div><div class='del'>-</div><div class='del'>-Contact: Zack Rusin, Thomas Zimmermann &lt;tzimmermann@suse.de&gt;</div><div class='del'>-</div><div class='del'>-Level: Intermediate</div><div class='del'>-</div><div class='ctx'> Bootsplash</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='hunk'>@@ -690,6 +667,74 @@ Contact: Sam Ravnborg</div><div class='ctx'> </div><div class='ctx'> Level: Advanced</div><div class='ctx'> </div><div class='add'>+Brightness handling on devices with multiple internal panels</div><div class='add'>+============================================================</div><div class='add'>+</div><div class='add'>+On x86/ACPI devices there can be multiple backlight firmware interfaces:</div><div class='add'>+(ACPI) video, vendor specific and others. As well as direct/native (PWM)</div><div class='add'>+register programming by the KMS driver.</div><div class='add'>+</div><div class='add'>+To deal with this backlight drivers used on x86/ACPI call</div><div class='add'>+acpi_video_get_backlight_type() which has heuristics (+quirks) to select</div><div class='add'>+which backlight interface to use; and backlight drivers which do not match</div><div class='add'>+the returned type will not register themselves, so that only one backlight</div><div class='add'>+device gets registered (in a single GPU setup, see below).</div><div class='add'>+</div><div class='add'>+At the moment this more or less assumes that there will only</div><div class='add'>+be 1 (internal) panel on a system.</div><div class='add'>+</div><div class='add'>+On systems with 2 panels this may be a problem, depending on</div><div class='add'>+what interface acpi_video_get_backlight_type() selects:</div><div class='add'>+</div><div class='add'>+1. native: in this case the KMS driver is expected to know which backlight</div><div class='add'>+   device belongs to which output so everything should just work.</div><div class='add'>+2. video: this does support controlling multiple backlights, but some work</div><div class='add'>+   will need to be done to get the output &lt;-&gt; backlight device mapping</div><div class='add'>+</div><div class='add'>+The above assumes both panels will require the same backlight interface type.</div><div class='add'>+Things will break on systems with multiple panels where the 2 panels need</div><div class='add'>+a different type of control. E.g. one panel needs ACPI video backlight control,</div><div class='add'>+where as the other is using native backlight control. Currently in this case</div><div class='add'>+only one of the 2 required backlight devices will get registered, based on</div><div class='add'>+the acpi_video_get_backlight_type() return value.</div><div class='add'>+</div><div class='add'>+If this (theoretical) case ever shows up, then supporting this will need some</div><div class='add'>+work. A possible solution here would be to pass a device and connector-name</div><div class='add'>+to acpi_video_get_backlight_type() so that it can deal with this.</div><div class='add'>+</div><div class='add'>+Note in a way we already have a case where userspace sees 2 panels,</div><div class='add'>+in dual GPU laptop setups with a mux. On those systems we may see</div><div class='add'>+either 2 native backlight devices; or 2 native backlight devices.</div><div class='add'>+</div><div class='add'>+Userspace already has code to deal with this by detecting if the related</div><div class='add'>+panel is active (iow which way the mux between the GPU and the panels</div><div class='add'>+points) and then uses that backlight device. Userspace here very much</div><div class='add'>+assumes a single panel though. It picks only 1 of the 2 backlight devices</div><div class='add'>+and then only uses that one.</div><div class='add'>+</div><div class='add'>+Note that all userspace code (that I know off) is currently hardcoded</div><div class='add'>+to assume a single panel.</div><div class='add'>+</div><div class='add'>+Before the recent changes to not register multiple (e.g. video + native)</div><div class='add'>+/sys/class/backlight devices for a single panel (on a single GPU laptop),</div><div class='add'>+userspace would see multiple backlight devices all controlling the same</div><div class='add'>+backlight.</div><div class='add'>+</div><div class='add'>+To deal with this userspace had to always picks one preferred device under</div><div class='add'>+/sys/class/backlight and will ignore the others. So to support brightness</div><div class='add'>+control on multiple panels userspace will need to be updated too.</div><div class='add'>+</div><div class='add'>+There are plans to allow brightness control through the KMS API by adding</div><div class='add'>+a "display brightness" property to drm_connector objects for panels. This</div><div class='add'>+solves a number of issues with the /sys/class/backlight API, including not</div><div class='add'>+being able to map a sysfs backlight device to a specific connector. Any</div><div class='add'>+userspace changes to add support for brightness control on devices with</div><div class='add'>+multiple panels really should build on top of this new KMS property.</div><div class='add'>+</div><div class='add'>+Contact: Hans de Goede</div><div class='add'>+</div><div class='add'>+Level: Advanced</div><div class='add'>+</div><div class='ctx'> Outside DRM</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/vc4.rst b/Documentation/gpu/vc4.rst<br/>index 5df1d98b9544..5e5e92e40919 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/vc4.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/vc4.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/vc4.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/vc4.rst</a></div><div class='hunk'>@@ -54,6 +54,25 @@ VEC (Composite TV out) encoder</div><div class='ctx'> .. kernel-doc:: drivers/gpu/drm/vc4/vc4_vec.c</div><div class='ctx'>    :doc: VC4 SDTV module</div><div class='ctx'> </div><div class='add'>+KUnit Tests</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+The VC4 Driver uses KUnit to perform driver-specific unit and</div><div class='add'>+integration tests.</div><div class='add'>+</div><div class='add'>+These tests are using a mock driver and can be ran using the</div><div class='add'>+command below, on either arm or arm64 architectures,</div><div class='add'>+</div><div class='add'>+.. code-block:: bash</div><div class='add'>+</div><div class='add'>+	$ ./tools/testing/kunit/kunit.py run \</div><div class='add'>+		--kunitconfig=drivers/gpu/drm/vc4/tests/.kunitconfig \</div><div class='add'>+		--cross_compile aarch64-linux-gnu- --arch arm64</div><div class='add'>+</div><div class='add'>+Parts of the driver that are currently covered by tests are:</div><div class='add'>+ * The HVS to PixelValve dynamic FIFO assignment, for the BCM2835-7</div><div class='add'>+   and BCM2711.</div><div class='add'>+</div><div class='ctx'> Memory Management and 3D Command Submission</div><div class='ctx'> ===========================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/gpu/vkms.rst b/Documentation/gpu/vkms.rst<br/>index 9c873c3912cc..49db221c0f52 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/vkms.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/gpu/vkms.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/gpu/vkms.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/gpu/vkms.rst</a></div><div class='hunk'>@@ -102,12 +102,6 @@ Debugging:</div><div class='ctx'> </div><div class='ctx'> - kms_plane: some test cases are failing due to timeout on capturing CRC;</div><div class='ctx'> </div><div class='del'>-- kms_flip: when running test cases in sequence, some successful individual</div><div class='del'>-  test cases are failing randomly; when individually, some successful test</div><div class='del'>-  cases display in the log the following error::</div><div class='del'>-</div><div class='del'>-  [drm:vkms_prepare_fb [vkms]] ERROR vmap failed: -4</div><div class='del'>-</div><div class='ctx'> Virtual hardware (vblank-less) mode:</div><div class='ctx'> </div><div class='ctx'> - VKMS already has support for vblanks simulated via hrtimers, which can be</div><div class='hunk'>@@ -124,15 +118,10 @@ Add Plane Features</div><div class='ctx'> </div><div class='ctx'> There's lots of plane features we could add support for:</div><div class='ctx'> </div><div class='del'>-- Clearing primary plane: clear primary plane before plane composition (at the</div><div class='del'>-  start) for correctness of pixel blend ops. It also guarantees alpha channel</div><div class='del'>-  is cleared in the target buffer for stable crc. [Good to get started]</div><div class='del'>-</div><div class='ctx'> - ARGB format on primary plane: blend the primary plane into background with</div><div class='ctx'>   translucent alpha.</div><div class='ctx'> </div><div class='del'>-- Support when the primary plane isn't exactly matching the output size: blend</div><div class='del'>-  the primary plane into the black background.</div><div class='add'>+- Add background color KMS property[Good to get started].</div><div class='ctx'> </div><div class='ctx'> - Full alpha blending on all planes.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hid/hid-alps.rst b/Documentation/hid/hid-alps.rst<br/>index 767c96bcbb7c..94382bb0ada4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hid/hid-alps.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hid/hid-alps.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hid/hid-alps.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hid/hid-alps.rst</a></div><div class='hunk'>@@ -9,7 +9,7 @@ Currently ALPS HID driver supports U1 Touchpad device.</div><div class='ctx'> U1 device basic information.</div><div class='ctx'> </div><div class='ctx'> ==========	======</div><div class='del'>-Vender ID	0x044E</div><div class='add'>+Vendor ID	0x044E</div><div class='ctx'> Product ID	0x120B</div><div class='ctx'> Version ID	0x0121</div><div class='ctx'> ==========	======</div><div class='head'>diff --git a/Documentation/hid/hid-bpf.rst b/Documentation/hid/hid-bpf.rst<br/>new file mode 100644<br/>index 000000000000..4fad83a6ebc3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hid/hid-bpf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hid/hid-bpf.rst</a></div><div class='hunk'>@@ -0,0 +1,522 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=======</div><div class='add'>+HID-BPF</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+HID is a standard protocol for input devices but some devices may require</div><div class='add'>+custom tweaks, traditionally done with a kernel driver fix. Using the eBPF</div><div class='add'>+capabilities instead speeds up development and adds new capabilities to the</div><div class='add'>+existing HID interfaces.</div><div class='add'>+</div><div class='add'>+.. contents::</div><div class='add'>+    :local:</div><div class='add'>+    :depth: 2</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+When (and why) to use HID-BPF</div><div class='add'>+=============================</div><div class='add'>+</div><div class='add'>+There are several use cases when using HID-BPF is better</div><div class='add'>+than standard kernel driver fix:</div><div class='add'>+</div><div class='add'>+Dead zone of a joystick</div><div class='add'>+-----------------------</div><div class='add'>+</div><div class='add'>+Assuming you have a joystick that is getting older, it is common to see it</div><div class='add'>+wobbling around its neutral point. This is usually filtered at the application</div><div class='add'>+level by adding a *dead zone* for this specific axis.</div><div class='add'>+</div><div class='add'>+With HID-BPF, we can apply this filtering in the kernel directly so userspace</div><div class='add'>+does not get woken up when nothing else is happening on the input controller.</div><div class='add'>+</div><div class='add'>+Of course, given that this dead zone is specific to an individual device, we</div><div class='add'>+can not create a generic fix for all of the same joysticks. Adding a custom</div><div class='add'>+kernel API for this (e.g. by adding a sysfs entry) does not guarantee this new</div><div class='add'>+kernel API will be broadly adopted and maintained.</div><div class='add'>+</div><div class='add'>+HID-BPF allows the userspace program to load the program itself, ensuring we</div><div class='add'>+only load the custom API when we have a user.</div><div class='add'>+</div><div class='add'>+Simple fixup of report descriptor</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+In the HID tree, half of the drivers only fix one key or one byte</div><div class='add'>+in the report descriptor. These fixes all require a kernel patch and the</div><div class='add'>+subsequent shepherding into a release, a long and painful process for users.</div><div class='add'>+</div><div class='add'>+We can reduce this burden by providing an eBPF program instead. Once such a</div><div class='add'>+program  has been verified by the user, we can embed the source code into the</div><div class='add'>+kernel tree and ship the eBPF program and load it directly instead of loading</div><div class='add'>+a specific kernel module for it.</div><div class='add'>+</div><div class='add'>+Note: distribution of eBPF programs and their inclusion in the kernel is not</div><div class='add'>+yet fully implemented</div><div class='add'>+</div><div class='add'>+Add a new feature that requires a new kernel API</div><div class='add'>+------------------------------------------------</div><div class='add'>+</div><div class='add'>+An example for such a feature are the Universal Stylus Interface (USI) pens.</div><div class='add'>+Basically, USI pens require a new kernel API because there are new</div><div class='add'>+channels of communication that our HID and input stack do not support.</div><div class='add'>+Instead of using hidraw or creating new sysfs entries or ioctls, we can rely</div><div class='add'>+on eBPF to have the kernel API controlled by the consumer and to not</div><div class='add'>+impact the performances by waking up userspace every time there is an</div><div class='add'>+event.</div><div class='add'>+</div><div class='add'>+Morph a device into something else and control that from userspace</div><div class='add'>+------------------------------------------------------------------</div><div class='add'>+</div><div class='add'>+The kernel has a relatively static mapping of HID items to evdev bits.</div><div class='add'>+It cannot decide to dynamically transform a given device into something else</div><div class='add'>+as it does not have the required context and any such transformation cannot be</div><div class='add'>+undone (or even discovered) by userspace.</div><div class='add'>+</div><div class='add'>+However, some devices are useless with that static way of defining devices. For</div><div class='add'>+example, the Microsoft Surface Dial is a pushbutton with haptic feedback that</div><div class='add'>+is barely usable as of today.</div><div class='add'>+</div><div class='add'>+With eBPF, userspace can morph that device into a mouse, and convert the dial</div><div class='add'>+events into wheel events. Also, the userspace program can set/unset the haptic</div><div class='add'>+feedback depending on the context. For example, if a menu is visible on the</div><div class='add'>+screen we likely need to have a haptic click every 15 degrees. But when</div><div class='add'>+scrolling in a web page the user experience is better when the device emits</div><div class='add'>+events at the highest resolution.</div><div class='add'>+</div><div class='add'>+Firewall</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+What if we want to prevent other users to access a specific feature of a</div><div class='add'>+device? (think a possibly broken firmware update entry point)</div><div class='add'>+</div><div class='add'>+With eBPF, we can intercept any HID command emitted to the device and</div><div class='add'>+validate it or not.</div><div class='add'>+</div><div class='add'>+This also allows to sync the state between the userspace and the</div><div class='add'>+kernel/bpf program because we can intercept any incoming command.</div><div class='add'>+</div><div class='add'>+Tracing</div><div class='add'>+-------</div><div class='add'>+</div><div class='add'>+The last usage is tracing events and all the fun we can do we BPF to summarize</div><div class='add'>+and analyze events.</div><div class='add'>+</div><div class='add'>+Right now, tracing relies on hidraw. It works well except for a couple</div><div class='add'>+of issues:</div><div class='add'>+</div><div class='add'>+1. if the driver doesn't export a hidraw node, we can't trace anything</div><div class='add'>+   (eBPF will be a "god-mode" there, so this may raise some eyebrows)</div><div class='add'>+2. hidraw doesn't catch other processes' requests to the device, which</div><div class='add'>+   means that we have cases where we need to add printks to the kernel</div><div class='add'>+   to understand what is happening.</div><div class='add'>+</div><div class='add'>+High-level view of HID-BPF</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+The main idea behind HID-BPF is that it works at an array of bytes level.</div><div class='add'>+Thus, all of the parsing of the HID report and the HID report descriptor</div><div class='add'>+must be implemented in the userspace component that loads the eBPF</div><div class='add'>+program.</div><div class='add'>+</div><div class='add'>+For example, in the dead zone joystick from above, knowing which fields</div><div class='add'>+in the data stream needs to be set to ``0`` needs to be computed by userspace.</div><div class='add'>+</div><div class='add'>+A corollary of this is that HID-BPF doesn't know about the other subsystems</div><div class='add'>+available in the kernel. *You can not directly emit input event through the</div><div class='add'>+input API from eBPF*.</div><div class='add'>+</div><div class='add'>+When a BPF program needs to emit input events, it needs to talk with the HID</div><div class='add'>+protocol, and rely on the HID kernel processing to translate the HID data into</div><div class='add'>+input events.</div><div class='add'>+</div><div class='add'>+Available types of programs</div><div class='add'>+===========================</div><div class='add'>+</div><div class='add'>+HID-BPF is built "on top" of BPF, meaning that we use tracing method to</div><div class='add'>+declare our programs.</div><div class='add'>+</div><div class='add'>+HID-BPF has the following attachment types available:</div><div class='add'>+</div><div class='add'>+1. event processing/filtering with ``SEC("fmod_ret/hid_bpf_device_event")`` in libbpf</div><div class='add'>+2. actions coming from userspace with ``SEC("syscall")`` in libbpf</div><div class='add'>+3. change of the report descriptor with ``SEC("fmod_ret/hid_bpf_rdesc_fixup")`` in libbpf</div><div class='add'>+</div><div class='add'>+A ``hid_bpf_device_event`` is calling a BPF program when an event is received from</div><div class='add'>+the device. Thus we are in IRQ context and can act on the data or notify userspace.</div><div class='add'>+And given that we are in IRQ context, we can not talk back to the device.</div><div class='add'>+</div><div class='add'>+A ``syscall`` means that userspace called the syscall ``BPF_PROG_RUN`` facility.</div><div class='add'>+This time, we can do any operations allowed by HID-BPF, and talking to the device is</div><div class='add'>+allowed.</div><div class='add'>+</div><div class='add'>+Last, ``hid_bpf_rdesc_fixup`` is different from the others as there can be only one</div><div class='add'>+BPF program of this type. This is called on ``probe`` from the driver and allows to</div><div class='add'>+change the report descriptor from the BPF program. Once a ``hid_bpf_rdesc_fixup``</div><div class='add'>+program has been loaded, it is not possible to overwrite it unless the program which</div><div class='add'>+inserted it allows us by pinning the program and closing all of its fds pointing to it.</div><div class='add'>+</div><div class='add'>+Developer API:</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+User API data structures available in programs:</div><div class='add'>+-----------------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/hid_bpf.h</div><div class='add'>+</div><div class='add'>+Available tracing functions to attach a HID-BPF program:</div><div class='add'>+--------------------------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/hid/bpf/hid_bpf_dispatch.c</div><div class='add'>+   :functions: hid_bpf_device_event hid_bpf_rdesc_fixup</div><div class='add'>+</div><div class='add'>+Available API that can be used in all HID-BPF programs:</div><div class='add'>+-------------------------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/hid/bpf/hid_bpf_dispatch.c</div><div class='add'>+   :functions: hid_bpf_get_data</div><div class='add'>+</div><div class='add'>+Available API that can be used in syscall HID-BPF programs:</div><div class='add'>+-----------------------------------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/hid/bpf/hid_bpf_dispatch.c</div><div class='add'>+   :functions: hid_bpf_attach_prog hid_bpf_hw_request hid_bpf_allocate_context hid_bpf_release_context</div><div class='add'>+</div><div class='add'>+General overview of a HID-BPF program</div><div class='add'>+=====================================</div><div class='add'>+</div><div class='add'>+Accessing the data attached to the context</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+The ``struct hid_bpf_ctx`` doesn't export the ``data`` fields directly and to access</div><div class='add'>+it, a bpf program needs to first call :c:func:`hid_bpf_get_data`.</div><div class='add'>+</div><div class='add'>+``offset`` can be any integer, but ``size`` needs to be constant, known at compile</div><div class='add'>+time.</div><div class='add'>+</div><div class='add'>+This allows the following:</div><div class='add'>+</div><div class='add'>+1. for a given device, if we know that the report length will always be of a certain value,</div><div class='add'>+   we can request the ``data`` pointer to point at the full report length.</div><div class='add'>+</div><div class='add'>+   The kernel will ensure we are using a correct size and offset and eBPF will ensure</div><div class='add'>+   the code will not attempt to read or write outside of the boundaries::</div><div class='add'>+</div><div class='add'>+     __u8 *data = hid_bpf_get_data(ctx, 0 /* offset */, 256 /* size */);</div><div class='add'>+</div><div class='add'>+     if (!data)</div><div class='add'>+         return 0; /* ensure data is correct, now the verifier knows we</div><div class='add'>+                    * have 256 bytes available */</div><div class='add'>+</div><div class='add'>+     bpf_printk("hello world: %02x %02x %02x", data[0], data[128], data[255]);</div><div class='add'>+</div><div class='add'>+2. if the report length is variable, but we know the value of ``X`` is always a 16-bit</div><div class='add'>+   integer, we can then have a pointer to that value only::</div><div class='add'>+</div><div class='add'>+      __u16 *x = hid_bpf_get_data(ctx, offset, sizeof(*x));</div><div class='add'>+</div><div class='add'>+      if (!x)</div><div class='add'>+          return 0; /* something went wrong */</div><div class='add'>+</div><div class='add'>+      *x += 1; /* increment X by one */</div><div class='add'>+</div><div class='add'>+Effect of a HID-BPF program</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+For all HID-BPF attachment types except for :c:func:`hid_bpf_rdesc_fixup`, several eBPF</div><div class='add'>+programs can be attached to the same device.</div><div class='add'>+</div><div class='add'>+Unless ``HID_BPF_FLAG_INSERT_HEAD`` is added to the flags while attaching the</div><div class='add'>+program, the new program is appended at the end of the list.</div><div class='add'>+``HID_BPF_FLAG_INSERT_HEAD`` will insert the new program at the beginning of the</div><div class='add'>+list which is useful for e.g. tracing where we need to get the unprocessed events</div><div class='add'>+from the device.</div><div class='add'>+</div><div class='add'>+Note that if there are multiple programs using the ``HID_BPF_FLAG_INSERT_HEAD`` flag,</div><div class='add'>+only the most recently loaded one is actually the first in the list.</div><div class='add'>+</div><div class='add'>+``SEC("fmod_ret/hid_bpf_device_event")``</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Whenever a matching event is raised, the eBPF programs are called one after the other</div><div class='add'>+and are working on the same data buffer.</div><div class='add'>+</div><div class='add'>+If a program changes the data associated with the context, the next one will see</div><div class='add'>+the modified data but it will have *no* idea of what the original data was.</div><div class='add'>+</div><div class='add'>+Once all the programs are run and return ``0`` or a positive value, the rest of the</div><div class='add'>+HID stack will work on the modified data, with the ``size`` field of the last hid_bpf_ctx</div><div class='add'>+being the new size of the input stream of data.</div><div class='add'>+</div><div class='add'>+A BPF program returning a negative error discards the event, i.e. this event will not be</div><div class='add'>+processed by the HID stack. Clients (hidraw, input, LEDs) will **not** see this event.</div><div class='add'>+</div><div class='add'>+``SEC("syscall")``</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+``syscall`` are not attached to a given device. To tell which device we are working</div><div class='add'>+with, userspace needs to refer to the device by its unique system id (the last 4 numbers</div><div class='add'>+in the sysfs path: ``/sys/bus/hid/devices/xxxx:yyyy:zzzz:0000``).</div><div class='add'>+</div><div class='add'>+To retrieve a context associated with the device, the program must call</div><div class='add'>+:c:func:`hid_bpf_allocate_context` and must release it with :c:func:`hid_bpf_release_context`</div><div class='add'>+before returning.</div><div class='add'>+Once the context is retrieved, one can also request a pointer to kernel memory with</div><div class='add'>+:c:func:`hid_bpf_get_data`. This memory is big enough to support all input/output/feature</div><div class='add'>+reports of the given device.</div><div class='add'>+</div><div class='add'>+``SEC("fmod_ret/hid_bpf_rdesc_fixup")``</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The ``hid_bpf_rdesc_fixup`` program works in a similar manner to</div><div class='add'>+``.report_fixup`` of ``struct hid_driver``.</div><div class='add'>+</div><div class='add'>+When the device is probed, the kernel sets the data buffer of the context with the</div><div class='add'>+content of the report descriptor. The memory associated with that buffer is</div><div class='add'>+``HID_MAX_DESCRIPTOR_SIZE`` (currently 4kB).</div><div class='add'>+</div><div class='add'>+The eBPF program can modify the data buffer at-will and the kernel uses the</div><div class='add'>+modified content and size as the report descriptor.</div><div class='add'>+</div><div class='add'>+Whenever a ``SEC("fmod_ret/hid_bpf_rdesc_fixup")`` program is attached (if no</div><div class='add'>+program was attached before), the kernel immediately disconnects the HID device</div><div class='add'>+and does a reprobe.</div><div class='add'>+</div><div class='add'>+In the same way, when the ``SEC("fmod_ret/hid_bpf_rdesc_fixup")`` program is</div><div class='add'>+detached, the kernel issues a disconnect on the device.</div><div class='add'>+</div><div class='add'>+There is no ``detach`` facility in HID-BPF. Detaching a program happens when</div><div class='add'>+all the user space file descriptors pointing at a program are closed.</div><div class='add'>+Thus, if we need to replace a report descriptor fixup, some cooperation is</div><div class='add'>+required from the owner of the original report descriptor fixup.</div><div class='add'>+The previous owner will likely pin the program in the bpffs, and we can then</div><div class='add'>+replace it through normal bpf operations.</div><div class='add'>+</div><div class='add'>+Attaching a bpf program to a device</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+``libbpf`` does not export any helper to attach a HID-BPF program.</div><div class='add'>+Users need to use a dedicated ``syscall`` program which will call</div><div class='add'>+``hid_bpf_attach_prog(hid_id, program_fd, flags)``.</div><div class='add'>+</div><div class='add'>+``hid_id`` is the unique system ID of the HID device (the last 4 numbers in the</div><div class='add'>+sysfs path: ``/sys/bus/hid/devices/xxxx:yyyy:zzzz:0000``)</div><div class='add'>+</div><div class='add'>+``progam_fd`` is the opened file descriptor of the program to attach.</div><div class='add'>+</div><div class='add'>+``flags`` is of type ``enum hid_bpf_attach_flags``.</div><div class='add'>+</div><div class='add'>+We can not rely on hidraw to bind a BPF program to a HID device. hidraw is an</div><div class='add'>+artefact of the processing of the HID device, and is not stable. Some drivers</div><div class='add'>+even disable it, so that removes the tracing capabilities on those devices</div><div class='add'>+(where it is interesting to get the non-hidraw traces).</div><div class='add'>+</div><div class='add'>+On the other hand, the ``hid_id`` is stable for the entire life of the HID device,</div><div class='add'>+even if we change its report descriptor.</div><div class='add'>+</div><div class='add'>+Given that hidraw is not stable when the device disconnects/reconnects, we recommend</div><div class='add'>+accessing the current report descriptor of the device through the sysfs.</div><div class='add'>+This is available at ``/sys/bus/hid/devices/BUS:VID:PID.000N/report_descriptor`` as a</div><div class='add'>+binary stream.</div><div class='add'>+</div><div class='add'>+Parsing the report descriptor is the responsibility of the BPF programmer or the userspace</div><div class='add'>+component that loads the eBPF program.</div><div class='add'>+</div><div class='add'>+An (almost) complete example of a BPF enhanced HID device</div><div class='add'>+=========================================================</div><div class='add'>+</div><div class='add'>+*Foreword: for most parts, this could be implemented as a kernel driver*</div><div class='add'>+</div><div class='add'>+Let's imagine we have a new tablet device that has some haptic capabilities</div><div class='add'>+to simulate the surface the user is scratching on. This device would also have</div><div class='add'>+a specific 3 positions switch to toggle between *pencil on paper*, *cray on a wall*</div><div class='add'>+and *brush on a painting canvas*. To make things even better, we can control the</div><div class='add'>+physical position of the switch through a feature report.</div><div class='add'>+</div><div class='add'>+And of course, the switch is relying on some userspace component to control the</div><div class='add'>+haptic feature of the device itself.</div><div class='add'>+</div><div class='add'>+Filtering events</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+The first step consists in filtering events from the device. Given that the switch</div><div class='add'>+position is actually reported in the flow of the pen events, using hidraw to implement</div><div class='add'>+that filtering would mean that we wake up userspace for every single event.</div><div class='add'>+</div><div class='add'>+This is OK for libinput, but having an external library that is just interested in</div><div class='add'>+one byte in the report is less than ideal.</div><div class='add'>+</div><div class='add'>+For that, we can create a basic skeleton for our BPF program::</div><div class='add'>+</div><div class='add'>+  #include "vmlinux.h"</div><div class='add'>+  #include &lt;bpf/bpf_helpers.h&gt;</div><div class='add'>+  #include &lt;bpf/bpf_tracing.h&gt;</div><div class='add'>+</div><div class='add'>+  /* HID programs need to be GPL */</div><div class='add'>+  char _license[] SEC("license") = "GPL";</div><div class='add'>+</div><div class='add'>+  /* HID-BPF kfunc API definitions */</div><div class='add'>+  extern __u8 *hid_bpf_get_data(struct hid_bpf_ctx *ctx,</div><div class='add'>+			      unsigned int offset,</div><div class='add'>+			      const size_t __sz) __ksym;</div><div class='add'>+  extern int hid_bpf_attach_prog(unsigned int hid_id, int prog_fd, u32 flags) __ksym;</div><div class='add'>+</div><div class='add'>+  struct {</div><div class='add'>+	__uint(type, BPF_MAP_TYPE_RINGBUF);</div><div class='add'>+	__uint(max_entries, 4096 * 64);</div><div class='add'>+  } ringbuf SEC(".maps");</div><div class='add'>+</div><div class='add'>+  struct attach_prog_args {</div><div class='add'>+	int prog_fd;</div><div class='add'>+	unsigned int hid;</div><div class='add'>+	unsigned int flags;</div><div class='add'>+	int retval;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  SEC("syscall")</div><div class='add'>+  int attach_prog(struct attach_prog_args *ctx)</div><div class='add'>+  {</div><div class='add'>+	ctx-&gt;retval = hid_bpf_attach_prog(ctx-&gt;hid,</div><div class='add'>+					  ctx-&gt;prog_fd,</div><div class='add'>+					  ctx-&gt;flags);</div><div class='add'>+	return 0;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+  __u8 current_value = 0;</div><div class='add'>+</div><div class='add'>+  SEC("?fmod_ret/hid_bpf_device_event")</div><div class='add'>+  int BPF_PROG(filter_switch, struct hid_bpf_ctx *hid_ctx)</div><div class='add'>+  {</div><div class='add'>+	__u8 *data = hid_bpf_get_data(hid_ctx, 0 /* offset */, 192 /* size */);</div><div class='add'>+	__u8 *buf;</div><div class='add'>+</div><div class='add'>+	if (!data)</div><div class='add'>+		return 0; /* EPERM check */</div><div class='add'>+</div><div class='add'>+	if (current_value != data[152]) {</div><div class='add'>+		buf = bpf_ringbuf_reserve(&amp;ringbuf, 1, 0);</div><div class='add'>+		if (!buf)</div><div class='add'>+			return 0;</div><div class='add'>+</div><div class='add'>+		*buf = data[152];</div><div class='add'>+</div><div class='add'>+		bpf_ringbuf_commit(buf, 0);</div><div class='add'>+</div><div class='add'>+		current_value = data[152];</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+	return 0;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+To attach ``filter_switch``, userspace needs to call the ``attach_prog`` syscall</div><div class='add'>+program first::</div><div class='add'>+</div><div class='add'>+  static int attach_filter(struct hid *hid_skel, int hid_id)</div><div class='add'>+  {</div><div class='add'>+	int err, prog_fd;</div><div class='add'>+	int ret = -1;</div><div class='add'>+	struct attach_prog_args args = {</div><div class='add'>+		.hid = hid_id,</div><div class='add'>+	};</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_test_run_opts, tattrs,</div><div class='add'>+		.ctx_in = &amp;args,</div><div class='add'>+		.ctx_size_in = sizeof(args),</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	args.prog_fd = bpf_program__fd(hid_skel-&gt;progs.filter_switch);</div><div class='add'>+</div><div class='add'>+	prog_fd = bpf_program__fd(hid_skel-&gt;progs.attach_prog);</div><div class='add'>+</div><div class='add'>+	err = bpf_prog_test_run_opts(prog_fd, &amp;tattrs);</div><div class='add'>+	if (err)</div><div class='add'>+		return err;</div><div class='add'>+</div><div class='add'>+	return args.retval; /* the fd of the created bpf_link */</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+Our userspace program can now listen to notifications on the ring buffer, and</div><div class='add'>+is awaken only when the value changes.</div><div class='add'>+</div><div class='add'>+When the userspace program doesn't need to listen to events anymore, it can just</div><div class='add'>+close the returned fd from :c:func:`attach_filter`, which will tell the kernel to</div><div class='add'>+detach the program from the HID device.</div><div class='add'>+</div><div class='add'>+Of course, in other use cases, the userspace program can also pin the fd to the</div><div class='add'>+BPF filesystem through a call to :c:func:`bpf_obj_pin`, as with any bpf_link.</div><div class='add'>+</div><div class='add'>+Controlling the device</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+To be able to change the haptic feedback from the tablet, the userspace program</div><div class='add'>+needs to emit a feature report on the device itself.</div><div class='add'>+</div><div class='add'>+Instead of using hidraw for that, we can create a ``SEC("syscall")`` program</div><div class='add'>+that talks to the device::</div><div class='add'>+</div><div class='add'>+  /* some more HID-BPF kfunc API definitions */</div><div class='add'>+  extern struct hid_bpf_ctx *hid_bpf_allocate_context(unsigned int hid_id) __ksym;</div><div class='add'>+  extern void hid_bpf_release_context(struct hid_bpf_ctx *ctx) __ksym;</div><div class='add'>+  extern int hid_bpf_hw_request(struct hid_bpf_ctx *ctx,</div><div class='add'>+			      __u8* data,</div><div class='add'>+			      size_t len,</div><div class='add'>+			      enum hid_report_type type,</div><div class='add'>+			      enum hid_class_request reqtype) __ksym;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  struct hid_send_haptics_args {</div><div class='add'>+	/* data needs to come at offset 0 so we can do a memcpy into it */</div><div class='add'>+	__u8 data[10];</div><div class='add'>+	unsigned int hid;</div><div class='add'>+  };</div><div class='add'>+</div><div class='add'>+  SEC("syscall")</div><div class='add'>+  int send_haptic(struct hid_send_haptics_args *args)</div><div class='add'>+  {</div><div class='add'>+	struct hid_bpf_ctx *ctx;</div><div class='add'>+	int ret = 0;</div><div class='add'>+</div><div class='add'>+	ctx = hid_bpf_allocate_context(args-&gt;hid);</div><div class='add'>+	if (!ctx)</div><div class='add'>+		return 0; /* EPERM check */</div><div class='add'>+</div><div class='add'>+	ret = hid_bpf_hw_request(ctx,</div><div class='add'>+				 args-&gt;data,</div><div class='add'>+				 10,</div><div class='add'>+				 HID_FEATURE_REPORT,</div><div class='add'>+				 HID_REQ_SET_REPORT);</div><div class='add'>+</div><div class='add'>+	hid_bpf_release_context(ctx);</div><div class='add'>+</div><div class='add'>+	return ret;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+And then userspace needs to call that program directly::</div><div class='add'>+</div><div class='add'>+  static int set_haptic(struct hid *hid_skel, int hid_id, __u8 haptic_value)</div><div class='add'>+  {</div><div class='add'>+	int err, prog_fd;</div><div class='add'>+	int ret = -1;</div><div class='add'>+	struct hid_send_haptics_args args = {</div><div class='add'>+		.hid = hid_id,</div><div class='add'>+	};</div><div class='add'>+	DECLARE_LIBBPF_OPTS(bpf_test_run_opts, tattrs,</div><div class='add'>+		.ctx_in = &amp;args,</div><div class='add'>+		.ctx_size_in = sizeof(args),</div><div class='add'>+	);</div><div class='add'>+</div><div class='add'>+	args.data[0] = 0x02; /* report ID of the feature on our device */</div><div class='add'>+	args.data[1] = haptic_value;</div><div class='add'>+</div><div class='add'>+	prog_fd = bpf_program__fd(hid_skel-&gt;progs.set_haptic);</div><div class='add'>+</div><div class='add'>+	err = bpf_prog_test_run_opts(prog_fd, &amp;tattrs);</div><div class='add'>+	return err;</div><div class='add'>+  }</div><div class='add'>+</div><div class='add'>+Now our userspace program is aware of the haptic state and can control it. The</div><div class='add'>+program could make this state further available to other userspace programs</div><div class='add'>+(e.g. via a DBus API).</div><div class='add'>+</div><div class='add'>+The interesting bit here is that we did not created a new kernel API for this.</div><div class='add'>+Which means that if there is a bug in our implementation, we can change the</div><div class='add'>+interface with the kernel at-will, because the userspace application is</div><div class='add'>+responsible for its own usage.</div><div class='head'>diff --git a/Documentation/hid/hiddev.rst b/Documentation/hid/hiddev.rst<br/>index caebc6266603..9b82c7f896aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hid/hiddev.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hid/hiddev.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hid/hiddev.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hid/hiddev.rst</a></div><div class='hunk'>@@ -8,7 +8,7 @@ Introduction</div><div class='ctx'> In addition to the normal input type HID devices, USB also uses the</div><div class='ctx'> human interface device protocols for things that are not really human</div><div class='ctx'> interfaces, but have similar sorts of communication needs. The two big</div><div class='del'>-examples for this are power devices (especially uninterruptable power</div><div class='add'>+examples for this are power devices (especially uninterruptible power</div><div class='ctx'> supplies) and monitor control on higher end monitors.</div><div class='ctx'> </div><div class='ctx'> To support these disparate requirements, the Linux USB system provides</div><div class='head'>diff --git a/Documentation/hid/hidraw.rst b/Documentation/hid/hidraw.rst<br/>index b717ee5cdaef..14d076753b85 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hid/hidraw.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hid/hidraw.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hid/hidraw.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hid/hidraw.rst</a></div><div class='hunk'>@@ -163,7 +163,7 @@ HIDIOCGOUTPUT(len):</div><div class='ctx'> 	Get an Output Report</div><div class='ctx'> </div><div class='ctx'> This ioctl will request an output report from the device using the control</div><div class='del'>-endpoint.  Typically, this is used to retrive the initial state of</div><div class='add'>+endpoint.  Typically, this is used to retrieve the initial state of</div><div class='ctx'> an output report of a device, before an application updates it as necessary either</div><div class='ctx'> via a HIDIOCSOUTPUT request, or the regular device write() interface.  The format</div><div class='ctx'> of the buffer issued with this report is identical to that of HIDIOCGFEATURE.</div><div class='head'>diff --git a/Documentation/hid/index.rst b/Documentation/hid/index.rst<br/>index e50f513c579c..b2028f382f11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hid/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hid/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hid/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hid/index.rst</a></div><div class='hunk'>@@ -11,6 +11,7 @@ Human Interface Devices (HID)</div><div class='ctx'>    hidraw</div><div class='ctx'>    hid-sensor</div><div class='ctx'>    hid-transport</div><div class='add'>+   hid-bpf</div><div class='ctx'> </div><div class='ctx'>    uhid</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hid/intel-ish-hid.rst b/Documentation/hid/intel-ish-hid.rst<br/>index 7a851252267a..42dc77b7b10f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hid/intel-ish-hid.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hid/intel-ish-hid.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hid/intel-ish-hid.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hid/intel-ish-hid.rst</a></div><div class='hunk'>@@ -199,7 +199,7 @@ the sender that the memory region for that message may be reused.</div><div class='ctx'> DMA initialization is started with host sending DMA_ALLOC_NOTIFY bus message</div><div class='ctx'> (that includes RX buffer) and FW responds with DMA_ALLOC_NOTIFY_ACK.</div><div class='ctx'> Additionally to DMA address communication, this sequence checks capabilities:</div><div class='del'>-if thw host doesn't support DMA, then it won't send DMA allocation, so FW can't</div><div class='add'>+if the host doesn't support DMA, then it won't send DMA allocation, so FW can't</div><div class='ctx'> send DMA; if FW doesn't support DMA then it won't respond with</div><div class='ctx'> DMA_ALLOC_NOTIFY_ACK, in which case host will not use DMA transfers.</div><div class='ctx'> Here ISH acts as busmaster DMA controller. Hence when host sends DMA_XFER,</div><div class='hunk'>@@ -344,8 +344,8 @@ Documentation/ABI/testing/sysfs-bus-iio for IIO ABIs to user space.</div><div class='ctx'> </div><div class='ctx'> To debug ISH, event tracing mechanism is used. To enable debug logs::</div><div class='ctx'> </div><div class='del'>-  echo 1 &gt; /sys/kernel/debug/tracing/events/intel_ish/enable</div><div class='del'>-  cat /sys/kernel/debug/tracing/trace</div><div class='add'>+  echo 1 &gt; /sys/kernel/tracing/events/intel_ish/enable</div><div class='add'>+  cat /sys/kernel/tracing/trace</div><div class='ctx'> </div><div class='ctx'> 3.8 ISH IIO sysfs Example on Lenovo thinkpad Yoga 260</div><div class='ctx'> -----------------------------------------------------</div><div class='head'>diff --git a/Documentation/hwmon/acbel-fsg032.rst b/Documentation/hwmon/acbel-fsg032.rst<br/>new file mode 100644<br/>index 000000000000..f1684b95e103<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/acbel-fsg032.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/acbel-fsg032.rst</a></div><div class='hunk'>@@ -0,0 +1,80 @@</div><div class='add'>+Kernel driver acbel-fsg032</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * ACBEL FSG032-00xG power supply.</div><div class='add'>+</div><div class='add'>+Author: Lakshmi Yadlapati &lt;lakshmiy@us.ibm.com&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver supports ACBEL FSG032-00xG Power Supply. This driver</div><div class='add'>+is a client to the core PMBus driver.</div><div class='add'>+</div><div class='add'>+Usage Notes</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver does not auto-detect devices. You will have to instantiate the</div><div class='add'>+devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for</div><div class='add'>+details.</div><div class='add'>+</div><div class='add'>+Sysfs entries</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+The following attributes are supported:</div><div class='add'>+</div><div class='add'>+======================= ======================================================</div><div class='add'>+curr1_crit              Critical maximum current.</div><div class='add'>+curr1_crit_alarm        Input current critical alarm.</div><div class='add'>+curr1_input             Measured output current.</div><div class='add'>+curr1_label             "iin"</div><div class='add'>+curr1_max               Maximum input current.</div><div class='add'>+curr1_max_alarm         Maximum input current high alarm.</div><div class='add'>+curr1_rated_max         Maximum rated input current.</div><div class='add'>+curr2_crit              Critical maximum current.</div><div class='add'>+curr2_crit_alarm        Output current critical alarm.</div><div class='add'>+curr2_input             Measured output current.</div><div class='add'>+curr2_label             "iout1"</div><div class='add'>+curr2_max               Maximum output current.</div><div class='add'>+curr2_max_alarm         Output current high alarm.</div><div class='add'>+curr2_rated_max         Maximum rated output current.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+fan1_alarm              Fan 1 warning.</div><div class='add'>+fan1_fault	        Fan 1 fault.</div><div class='add'>+fan1_input	        Fan 1 speed in RPM.</div><div class='add'>+fan1_target             Set fan speed reference.</div><div class='add'>+</div><div class='add'>+in1_alarm               Input voltage under-voltage alarm.</div><div class='add'>+in1_input               Measured input voltage.</div><div class='add'>+in1_label               "vin"</div><div class='add'>+in1_rated_max           Maximum rated input voltage.</div><div class='add'>+in1_rated_min           Minimum rated input voltage.</div><div class='add'>+in2_crit                Critical maximum output voltage.</div><div class='add'>+in2_crit_alarm          Output voltage critical high alarm.</div><div class='add'>+in2_input               Measured output voltage.</div><div class='add'>+in2_label               "vout1"</div><div class='add'>+in2_lcrit               Critical minimum output voltage.</div><div class='add'>+in2_lcrit_alarm         Output voltage critical low alarm.</div><div class='add'>+in2_rated_max           Maximum rated output voltage.</div><div class='add'>+in2_rated_min           Minimum rated output voltage.</div><div class='add'>+</div><div class='add'>+power1_alarm            Input fault or alarm.</div><div class='add'>+power1_input            Measured input power.</div><div class='add'>+power1_label            "pin"</div><div class='add'>+power1_max              Input power limit.</div><div class='add'>+power1_rated_max        Maximum rated input power.</div><div class='add'>+power2_crit             Critical output power limit.</div><div class='add'>+power2_crit_alarm       Output power crit alarm limit exceeded.</div><div class='add'>+power2_input            Measured output power.</div><div class='add'>+power2_label            "pout"</div><div class='add'>+power2_max              Output power limit.</div><div class='add'>+power2_max_alarm        Output power high alarm.</div><div class='add'>+power2_rated_max        Maximum rated output power.</div><div class='add'>+</div><div class='add'>+temp[1-3]_input         Measured temperature.</div><div class='add'>+temp[1-2]_max           Maximum temperature.</div><div class='add'>+temp[1-3]_rated_max     Temperature high alarm.</div><div class='add'>+======================= ======================================================</div><div class='head'>diff --git a/Documentation/hwmon/aht10.rst b/Documentation/hwmon/aht10.rst<br/>index 482262ca117c..4e198c5eb683 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/aht10.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/aht10.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/aht10.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/aht10.rst</a></div><div class='hunk'>@@ -38,7 +38,7 @@ Sysfs entries</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='ctx'> =============== ============================================</div><div class='del'>-temp1_input     Measured temperature in millidegrees Celcius</div><div class='add'>+temp1_input     Measured temperature in millidegrees Celsius</div><div class='ctx'> humidity1_input Measured humidity in %H</div><div class='ctx'> update_interval The minimum interval for polling the sensor,</div><div class='ctx'>                 in milliseconds. Writable. Must be at</div><div class='head'>diff --git a/Documentation/hwmon/aquacomputer_d5next.rst b/Documentation/hwmon/aquacomputer_d5next.rst<br/>index 3373e27b707d..14b37851af0c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/aquacomputer_d5next.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/aquacomputer_d5next.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/aquacomputer_d5next.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/aquacomputer_d5next.rst</a></div><div class='hunk'>@@ -5,8 +5,16 @@ Kernel driver aquacomputer-d5next</div><div class='ctx'> </div><div class='ctx'> Supported devices:</div><div class='ctx'> </div><div class='add'>+* Aquacomputer Aquaero 5/6 fan controllers</div><div class='ctx'> * Aquacomputer D5 Next watercooling pump</div><div class='add'>+* Aquacomputer Farbwerk RGB controller</div><div class='ctx'> * Aquacomputer Farbwerk 360 RGB controller</div><div class='add'>+* Aquacomputer Octo fan controller</div><div class='add'>+* Aquacomputer Quadro fan controller</div><div class='add'>+* Aquacomputer High Flow Next sensor</div><div class='add'>+* Aquacomputer Aquastream XT watercooling pump</div><div class='add'>+* Aquacomputer Aquastream Ultimate watercooling pump</div><div class='add'>+* Aquacomputer Poweradjust 3 fan controller</div><div class='ctx'> </div><div class='ctx'> Author: Aleksa Savic</div><div class='ctx'> </div><div class='hunk'>@@ -16,11 +24,17 @@ Description</div><div class='ctx'> This driver exposes hardware sensors of listed Aquacomputer devices, which</div><div class='ctx'> communicate through proprietary USB HID protocols.</div><div class='ctx'> </div><div class='add'>+The Aquaero devices expose eight physical, eight virtual and four calculated</div><div class='add'>+virtual temperature sensors, as well as two flow sensors. The fans expose their</div><div class='add'>+speed (in RPM), power, voltage and current. Temperature offsets and fan speeds</div><div class='add'>+can be controlled.</div><div class='add'>+</div><div class='ctx'> For the D5 Next pump, available sensors are pump and fan speed, power, voltage</div><div class='del'>-and current, as well as coolant temperature. Also available through debugfs are</div><div class='del'>-the serial number, firmware version and power-on count. Attaching a fan to it is</div><div class='del'>-optional and allows it to be controlled using temperature curves directly from the</div><div class='del'>-pump. If it's not connected, the fan-related sensors will report zeroes.</div><div class='add'>+and current, as well as coolant temperature and eight virtual temp sensors. Also</div><div class='add'>+available through debugfs are the serial number, firmware version and power-on</div><div class='add'>+count. Attaching a fan to it is optional and allows it to be controlled using</div><div class='add'>+temperature curves directly from the pump. If it's not connected, the fan-related</div><div class='add'>+sensors will report zeroes.</div><div class='ctx'> </div><div class='ctx'> The pump can be configured either through software or via its physical</div><div class='ctx'> interface. Configuring the pump through this driver is not implemented, as it</div><div class='hunk'>@@ -28,8 +42,33 @@ seems to require sending it a complete configuration. That includes addressable</div><div class='ctx'> RGB LEDs, for which there is no standard sysfs interface. Thus, that task is</div><div class='ctx'> better suited for userspace tools.</div><div class='ctx'> </div><div class='del'>-The Farbwerk 360 exposes four temperature sensors. Depending on the device,</div><div class='del'>-not all sysfs and debugfs entries will be available.</div><div class='add'>+The Octo exposes four physical and sixteen virtual temperature sensors, as well as</div><div class='add'>+eight PWM controllable fans, along with their speed (in RPM), power, voltage and</div><div class='add'>+current.</div><div class='add'>+</div><div class='add'>+The Quadro exposes four physical and sixteen virtual temperature sensors, a flow</div><div class='add'>+sensor and four PWM controllable fans, along with their speed (in RPM), power,</div><div class='add'>+voltage and current. Flow sensor pulses are also available.</div><div class='add'>+</div><div class='add'>+The Farbwerk and Farbwerk 360 expose four temperature sensors. Additionally,</div><div class='add'>+sixteen virtual temperature sensors of the Farbwerk 360 are exposed.</div><div class='add'>+</div><div class='add'>+The High Flow Next exposes +5V voltages, water quality, conductivity and flow readings.</div><div class='add'>+A temperature sensor can be connected to it, in which case it provides its reading</div><div class='add'>+and an estimation of the dissipated/absorbed power in the liquid cooling loop.</div><div class='add'>+</div><div class='add'>+The Aquastream XT pump exposes temperature readings for the coolant, external sensor</div><div class='add'>+and fan IC. It also exposes pump and fan speeds (in RPM), voltages, as well as pump</div><div class='add'>+current.</div><div class='add'>+</div><div class='add'>+The Aquastream Ultimate pump exposes coolant temp and an external temp sensor, along</div><div class='add'>+with speed, power, voltage and current of both the pump and optionally connected fan.</div><div class='add'>+It also exposes pressure and flow speed readings.</div><div class='add'>+</div><div class='add'>+The Poweradjust 3 controller exposes a single external temperature sensor.</div><div class='add'>+</div><div class='add'>+Depending on the device, not all sysfs and debugfs entries will be available.</div><div class='add'>+Writing to virtual temperature sensors is not currently supported.</div><div class='ctx'> </div><div class='ctx'> Usage notes</div><div class='ctx'> -----------</div><div class='hunk'>@@ -40,13 +79,16 @@ the kernel and supports hotswapping.</div><div class='ctx'> Sysfs entries</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='del'>-================ =============================================</div><div class='del'>-temp[1-4]_input  Temperature sensors (in millidegrees Celsius)</div><div class='del'>-fan[1-2]_input   Pump/fan speed (in RPM)</div><div class='del'>-power[1-2]_input Pump/fan power (in micro Watts)</div><div class='del'>-in[0-2]_input    Pump/fan voltage (in milli Volts)</div><div class='del'>-curr[1-2]_input  Pump/fan current (in milli Amperes)</div><div class='del'>-================ =============================================</div><div class='add'>+================ ==============================================================</div><div class='add'>+temp[1-20]_input Physical/virtual temperature sensors (in millidegrees Celsius)</div><div class='add'>+temp[1-8]_offset Temperature sensor correction offset (in millidegrees Celsius)</div><div class='add'>+fan[1-8]_input   Pump/fan speed (in RPM) / Flow speed (in dL/h)</div><div class='add'>+fan5_pulses      Quadro flow sensor pulses</div><div class='add'>+power[1-8]_input Pump/fan power (in micro Watts)</div><div class='add'>+in[0-7]_input    Pump/fan voltage (in milli Volts)</div><div class='add'>+curr[1-8]_input  Pump/fan current (in milli Amperes)</div><div class='add'>+pwm[1-8]         Fan PWM (0 - 255)</div><div class='add'>+================ ==============================================================</div><div class='ctx'> </div><div class='ctx'> Debugfs entries</div><div class='ctx'> ---------------</div><div class='head'>diff --git a/Documentation/hwmon/aspeed-pwm-tacho.rst b/Documentation/hwmon/aspeed-pwm-tacho.rst<br/>index 6dcec845fbc7..f7bbe96f4bc8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/aspeed-pwm-tacho.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/aspeed-pwm-tacho.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/aspeed-pwm-tacho.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/aspeed-pwm-tacho.rst</a></div><div class='hunk'>@@ -10,7 +10,7 @@ Authors:</div><div class='ctx'> Description:</div><div class='ctx'> ------------</div><div class='ctx'> This driver implements support for ASPEED AST2400/2500 PWM and Fan Tacho</div><div class='del'>-controller. The PWM controller supports upto 8 PWM outputs. The Fan tacho</div><div class='add'>+controller. The PWM controller supports up to 8 PWM outputs. The Fan tacho</div><div class='ctx'> controller supports up to 16 tachometer inputs.</div><div class='ctx'> </div><div class='ctx'> The driver provides the following sensor accesses in sysfs:</div><div class='head'>diff --git a/Documentation/hwmon/asus_ec_sensors.rst b/Documentation/hwmon/asus_ec_sensors.rst<br/>index e7e8f1640f45..c92c1d3839e4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/asus_ec_sensors.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/asus_ec_sensors.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/asus_ec_sensors.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/asus_ec_sensors.rst</a></div><div class='hunk'>@@ -4,18 +4,28 @@ Kernel driver asus_ec_sensors</div><div class='ctx'> =================================</div><div class='ctx'> </div><div class='ctx'> Supported boards:</div><div class='del'>- * PRIME X570-PRO,</div><div class='del'>- * Pro WS X570-ACE,</div><div class='del'>- * ROG CROSSHAIR VIII DARK HERO,</div><div class='add'>+ * PRIME X470-PRO</div><div class='add'>+ * PRIME X570-PRO</div><div class='add'>+ * Pro WS X570-ACE</div><div class='add'>+ * ProArt X570-CREATOR WIFI</div><div class='add'>+ * ProArt B550-CREATOR</div><div class='add'>+ * ROG CROSSHAIR VIII DARK HERO</div><div class='ctx'>  * ROG CROSSHAIR VIII HERO (WI-FI)</div><div class='del'>- * ROG CROSSHAIR VIII FORMULA,</div><div class='del'>- * ROG CROSSHAIR VIII HERO,</div><div class='del'>- * ROG CROSSHAIR VIII IMPACT,</div><div class='del'>- * ROG STRIX B550-E GAMING,</div><div class='del'>- * ROG STRIX B550-I GAMING,</div><div class='del'>- * ROG STRIX X570-E GAMING,</div><div class='del'>- * ROG STRIX X570-F GAMING,</div><div class='add'>+ * ROG CROSSHAIR VIII FORMULA</div><div class='add'>+ * ROG CROSSHAIR VIII HERO</div><div class='add'>+ * ROG CROSSHAIR VIII IMPACT</div><div class='add'>+ * ROG MAXIMUS XI HERO</div><div class='add'>+ * ROG MAXIMUS XI HERO (WI-FI)</div><div class='add'>+ * ROG STRIX B550-E GAMING</div><div class='add'>+ * ROG STRIX B550-I GAMING</div><div class='add'>+ * ROG STRIX X570-E GAMING</div><div class='add'>+ * ROG STRIX X570-E GAMING WIFI II</div><div class='add'>+ * ROG STRIX X570-F GAMING</div><div class='ctx'>  * ROG STRIX X570-I GAMING</div><div class='add'>+ * ROG STRIX Z390-F GAMING</div><div class='add'>+ * ROG STRIX Z690-A GAMING WIFI D4</div><div class='add'>+ * ROG ZENITH II EXTREME</div><div class='add'>+ * ROG ZENITH II EXTREME ALPHA</div><div class='ctx'> </div><div class='ctx'> Authors:</div><div class='ctx'>     - Eugene Shalygin &lt;eugene.shalygin@gmail.com&gt;</div><div class='hunk'>@@ -52,3 +62,5 @@ Module Parameters</div><div class='ctx'> 		the path is mostly identical for them). If ASUS changes this path</div><div class='ctx'> 		in a future BIOS update, this parameter can be used to override</div><div class='ctx'> 		the stored in the driver value until it gets updated.</div><div class='add'>+		A special string ":GLOBAL_LOCK" can be passed to use the ACPI</div><div class='add'>+		global lock instead of a dedicated mutex.</div><div class='head'>diff --git a/Documentation/hwmon/asus_wmi_ec_sensors.rst b/Documentation/hwmon/asus_wmi_ec_sensors.rst<br/>deleted file mode 100644<br/>index 1b287f229e86..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/asus_wmi_ec_sensors.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/asus_wmi_ec_sensors.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,38 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0-or-later</div><div class='del'>-</div><div class='del'>-Kernel driver asus_wmi_ec_sensors</div><div class='del'>-=================================</div><div class='del'>-</div><div class='del'>-Supported boards:</div><div class='del'>- * PRIME X570-PRO,</div><div class='del'>- * Pro WS X570-ACE,</div><div class='del'>- * ROG CROSSHAIR VIII DARK HERO,</div><div class='del'>- * ROG CROSSHAIR VIII FORMULA,</div><div class='del'>- * ROG CROSSHAIR VIII HERO,</div><div class='del'>- * ROG STRIX B550-E GAMING,</div><div class='del'>- * ROG STRIX B550-I GAMING,</div><div class='del'>- * ROG STRIX X570-E GAMING.</div><div class='del'>-</div><div class='del'>-Authors:</div><div class='del'>-    - Eugene Shalygin &lt;eugene.shalygin@gmail.com&gt;</div><div class='del'>-</div><div class='del'>-Description:</div><div class='del'>-------------</div><div class='del'>-ASUS mainboards publish hardware monitoring information via Super I/O</div><div class='del'>-chip and the ACPI embedded controller (EC) registers. Some of the sensors</div><div class='del'>-are only available via the EC.</div><div class='del'>-</div><div class='del'>-ASUS WMI interface provides a method (BREC) to read data from EC registers,</div><div class='del'>-which is utilized by this driver to publish those sensor readings to the</div><div class='del'>-HWMON system. The driver is aware of and reads the following sensors:</div><div class='del'>-</div><div class='del'>-1. Chipset (PCH) temperature</div><div class='del'>-2. CPU package temperature</div><div class='del'>-3. Motherboard temperature</div><div class='del'>-4. Readings from the T_Sensor header</div><div class='del'>-5. VRM temperature</div><div class='del'>-6. CPU_Opt fan RPM</div><div class='del'>-7. Chipset fan RPM</div><div class='del'>-8. Readings from the "Water flow meter" header (RPM)</div><div class='del'>-9. Readings from the "Water In" and "Water Out" temperature headers</div><div class='del'>-10. CPU current</div><div class='head'>diff --git a/Documentation/hwmon/corsair-psu.rst b/Documentation/hwmon/corsair-psu.rst<br/>index e8378e7a1d8c..c389bd21f4f2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/corsair-psu.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/corsair-psu.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/corsair-psu.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/corsair-psu.rst</a></div><div class='hunk'>@@ -15,10 +15,12 @@ Supported devices:</div><div class='ctx'> </div><div class='ctx'>   Corsair HX850i</div><div class='ctx'> </div><div class='del'>-  Corsair HX1000i</div><div class='add'>+  Corsair HX1000i (revision 1 and 2)</div><div class='ctx'> </div><div class='ctx'>   Corsair HX1200i</div><div class='ctx'> </div><div class='add'>+  Corsair HX1500i</div><div class='add'>+</div><div class='ctx'>   Corsair RM550i</div><div class='ctx'> </div><div class='ctx'>   Corsair RM650i</div><div class='hunk'>@@ -38,7 +40,7 @@ This driver implements the sysfs interface for the Corsair PSUs with a HID proto</div><div class='ctx'> interface of the HXi and RMi series.</div><div class='ctx'> These power supplies provide access to a micro-controller with 2 attached</div><div class='ctx'> temperature sensors, 1 fan rpm sensor, 4 sensors for volt levels, 4 sensors for</div><div class='del'>-power usage and 4 sensors for current levels and addtional non-sensor information</div><div class='add'>+power usage and 4 sensors for current levels and additional non-sensor information</div><div class='ctx'> like uptimes.</div><div class='ctx'> </div><div class='ctx'> Sysfs entries</div><div class='hunk'>@@ -86,8 +88,9 @@ Debugfs entries</div><div class='ctx'> ---------------</div><div class='ctx'> </div><div class='ctx'> =======================	========================================================</div><div class='del'>-uptime			Current uptime of the psu</div><div class='add'>+ocpmode                 Single or multi rail mode of the PCIe power connectors</div><div class='add'>+product                 Product name of the psu</div><div class='add'>+uptime			Session uptime of the psu</div><div class='ctx'> uptime_total		Total uptime of the psu</div><div class='ctx'> vendor			Vendor name of the psu</div><div class='del'>-product			Product name of the psu</div><div class='ctx'> =======================	========================================================</div><div class='head'>diff --git a/Documentation/hwmon/dell-smm-hwmon.rst b/Documentation/hwmon/dell-smm-hwmon.rst<br/>index d3323a96665d..d8f1d6859b96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/dell-smm-hwmon.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/dell-smm-hwmon.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/dell-smm-hwmon.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/dell-smm-hwmon.rst</a></div><div class='hunk'>@@ -46,6 +46,9 @@ temp[1-10]_input                RO      Temperature reading in milli-degrees</div><div class='ctx'> temp[1-10]_label                RO      Temperature sensor label.</div><div class='ctx'> =============================== ======= =======================================</div><div class='ctx'> </div><div class='add'>+Due to the nature of the SMM interface, each pwmX attribute controls</div><div class='add'>+fan number X.</div><div class='add'>+</div><div class='ctx'> Disabling automatic BIOS fan control</div><div class='ctx'> ------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -86,6 +89,13 @@ probe the BIOS on your machine and discover the appropriate codes.</div><div class='ctx'> </div><div class='ctx'> Again, when you find new codes, we'd be happy to have your patches!</div><div class='ctx'> </div><div class='add'>+``thermal`` interface</div><div class='add'>+---------------------------</div><div class='add'>+</div><div class='add'>+The driver also exports the fans as thermal cooling devices with</div><div class='add'>+``type`` set to ``dell-smm-fan[1-3]``. This allows for easy fan control</div><div class='add'>+using one of the thermal governors.</div><div class='add'>+</div><div class='ctx'> Module parameters</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='hunk'>@@ -324,6 +334,8 @@ Reading of fan types causes erratic fan behaviour.      Studio XPS 8000</div><div class='ctx'> </div><div class='ctx'>                                                         Inspiron 580</div><div class='ctx'> </div><div class='add'>+                                                        Inspiron 3505</div><div class='add'>+</div><div class='ctx'> Fan-related SMM calls take too long (about 500ms).      Inspiron 7720</div><div class='ctx'> </div><div class='ctx'>                                                         Vostro 3360</div><div class='head'>diff --git a/Documentation/hwmon/emc2305.rst b/Documentation/hwmon/emc2305.rst<br/>new file mode 100644<br/>index 000000000000..2403dbaf2728<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/emc2305.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/emc2305.rst</a></div><div class='hunk'>@@ -0,0 +1,37 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Kernel driver emc2305</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+   Microchip EMC2305, EMC2303, EMC2302, EMC2301</div><div class='add'>+</div><div class='add'>+   Addresses scanned: I2C 0x27, 0x2c, 0x2d, 0x2e, 0x2f, 0x4c, 0x4d</div><div class='add'>+   Prefixes: 'emc2305'</div><div class='add'>+</div><div class='add'>+   Datasheet: Publicly available at the Microchip website :</div><div class='add'>+      https://www.microchip.com/en-us/product/EMC2305</div><div class='add'>+</div><div class='add'>+Description:</div><div class='add'>+------------</div><div class='add'>+This driver implements support for Microchip EMC2301/2/3/5 RPM-based PWM Fan Controller.</div><div class='add'>+The EMC2305 Fan Controller supports up to 5 independently controlled PWM fan drives.</div><div class='add'>+Fan rotation speeds are reported in RPM.</div><div class='add'>+The driver supports the RPM-based PWM control to keep a fan at the desired speed.</div><div class='add'>+The driver provides the possibility to have one common PWM interface for all FANs</div><div class='add'>+or up to the maximum available or configured independent PWMs.</div><div class='add'>+</div><div class='add'>+The driver provides the following sysfs interfaces in hwmon subsystem:</div><div class='add'>+</div><div class='add'>+================= == ===================================================</div><div class='add'>+fan[1-5]_fault    RO files for tachometers TACH1-TACH5 fault indication</div><div class='add'>+fan[1-5]_input    RO files for tachometers TACH1-TACH5 input (in RPM)</div><div class='add'>+pwm[1-5]          RW file for fan[1-5] target duty cycle (0..255)</div><div class='add'>+================= == ===================================================</div><div class='add'>+</div><div class='add'>+sysfs interfaces in thermal subsystem:</div><div class='add'>+</div><div class='add'>+================= == ========================================================================</div><div class='add'>+cur_state         RW file for the current cooling state of the cooling device (0..max_state)</div><div class='add'>+max_state         RO file for the maximum cooling state of the cooling device</div><div class='add'>+================= == ========================================================================</div><div class='head'>diff --git a/Documentation/hwmon/ftsteutates.rst b/Documentation/hwmon/ftsteutates.rst<br/>index 58a2483d8d0d..2abd16830c99 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/ftsteutates.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/ftsteutates.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/ftsteutates.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/ftsteutates.rst</a></div><div class='hunk'>@@ -22,12 +22,21 @@ enhancements. It can monitor up to 4 voltages, 16 temperatures and</div><div class='ctx'> 8 fans. It also contains an integrated watchdog which is currently</div><div class='ctx'> implemented in this driver.</div><div class='ctx'> </div><div class='add'>+The ``pwmX_auto_channels_temp`` attributes show which temperature sensor</div><div class='add'>+is currently driving which fan channel. This value might dynamically change</div><div class='add'>+during runtime depending on the temperature sensor selected by</div><div class='add'>+the fan control circuit.</div><div class='add'>+</div><div class='add'>+The 4 voltages require a board-specific multiplier, since the BMC can</div><div class='add'>+only measure voltages up to 3.3V and thus relies on voltage dividers.</div><div class='add'>+Consult your motherboard manual for details.</div><div class='add'>+</div><div class='ctx'> To clear a temperature or fan alarm, execute the following command with the</div><div class='ctx'> correct path to the alarm file::</div><div class='ctx'> </div><div class='ctx'> 	echo 0 &gt;XXXX_alarm</div><div class='ctx'> </div><div class='del'>-Specification of the chip can be found here:</div><div class='add'>+Specifications of the chip can be found at the `Kontron FTP Server &lt;http://ftp.kontron.com/&gt;`_ (username = "anonymous", no password required)</div><div class='add'>+under the following path:</div><div class='ctx'> </div><div class='del'>-- ftp://ftp.ts.fujitsu.com/pub/Mainboard-OEM-Sales/Services/Software&amp;Tools/Linux_SystemMonitoring&amp;Watchdog&amp;GPIO/BMC-Teutates_Specification_V1.21.pdf</div><div class='del'>-- ftp://ftp.ts.fujitsu.com/pub/Mainboard-OEM-Sales/Services/Software&amp;Tools/Linux_SystemMonitoring&amp;Watchdog&amp;GPIO/Fujitsu_mainboards-1-Sensors_HowTo-en-US.pdf</div><div class='add'>+  /Services/Software_Tools/Linux_SystemMonitoring_Watchdog_GPIO/BMC-Teutates_Specification_V1.21.pdf</div><div class='head'>diff --git a/Documentation/hwmon/gsc-hwmon.rst b/Documentation/hwmon/gsc-hwmon.rst<br/>index ffac392a7129..e9ab27940d02 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/gsc-hwmon.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/gsc-hwmon.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/gsc-hwmon.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/gsc-hwmon.rst</a></div><div class='hunk'>@@ -31,7 +31,7 @@ Temperature Monitoring</div><div class='ctx'> </div><div class='ctx'> Temperatures are measured with 12-bit or 10-bit resolution and are scaled</div><div class='ctx'> either internally or by the driver depending on the GSC version and firmware.</div><div class='del'>-The values returned by the driver reflect millidegree Celcius:</div><div class='add'>+The values returned by the driver reflect millidegree Celsius:</div><div class='ctx'> </div><div class='ctx'> tempX_input                Measured temperature.</div><div class='ctx'> tempX_label                Name of temperature input.</div><div class='hunk'>@@ -41,8 +41,8 @@ PWM Output Control</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='ctx'> The GSC features 1 PWM output that operates in automatic mode where the</div><div class='del'>-PWM value will be scalled depending on 6 temperature boundaries.</div><div class='del'>-The tempeature boundaries are read-write and in millidegree Celcius and the</div><div class='add'>+PWM value will be scaled depending on 6 temperature boundaries.</div><div class='add'>+The tempeature boundaries are read-write and in millidegree Celsius and the</div><div class='ctx'> read-only PWM values range from 0 (off) to 255 (full speed).</div><div class='ctx'> Fan speed will be set to minimum (off) when the temperature sensor reads</div><div class='ctx'> less than pwm1_auto_point1_temp and maximum when the temperature sensor</div><div class='head'>diff --git a/Documentation/hwmon/gxp-fan-ctrl.rst b/Documentation/hwmon/gxp-fan-ctrl.rst<br/>new file mode 100644<br/>index 000000000000..ae3397e81c04<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/gxp-fan-ctrl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/gxp-fan-ctrl.rst</a></div><div class='hunk'>@@ -0,0 +1,28 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+Kernel driver gxp-fan-ctrl</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * HPE GXP SOC</div><div class='add'>+</div><div class='add'>+Author: Nick Hawkins &lt;nick.hawkins@hpe.com&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+gxp-fan-ctrl is a driver which provides fan control for the hpe gxp soc.</div><div class='add'>+The driver allows the gathering of fan status and the use of fan</div><div class='add'>+PWM control.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Sysfs attributes</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+======================= ===========================================================</div><div class='add'>+pwm[0-7]		Fan 0 to 7 respective PWM value (0-255)</div><div class='add'>+fan[0-7]_fault		Fan 0 to 7 respective fault status: 1 fail, 0 ok</div><div class='add'>+fan[0-7]_enable         Fan 0 to 7 respective enabled status: 1 enabled, 0 disabled</div><div class='add'>+======================= ===========================================================</div><div class='head'>diff --git a/Documentation/hwmon/hwmon-kernel-api.rst b/Documentation/hwmon/hwmon-kernel-api.rst<br/>index c41eb6108103..c2d1e0299d8d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/hwmon-kernel-api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/hwmon-kernel-api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/hwmon-kernel-api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/hwmon-kernel-api.rst</a></div><div class='hunk'>@@ -19,21 +19,11 @@ also read Documentation/hwmon/submitting-patches.rst.</div><div class='ctx'> </div><div class='ctx'> The API</div><div class='ctx'> -------</div><div class='del'>-Each hardware monitoring driver must #include &lt;linux/hwmon.h&gt; and, in most</div><div class='add'>+Each hardware monitoring driver must #include &lt;linux/hwmon.h&gt; and, in some</div><div class='ctx'> cases, &lt;linux/hwmon-sysfs.h&gt;. linux/hwmon.h declares the following</div><div class='ctx'> register/unregister functions::</div><div class='ctx'> </div><div class='ctx'>   struct device *</div><div class='del'>-  hwmon_device_register_with_groups(struct device *dev, const char *name,</div><div class='del'>-				    void *drvdata,</div><div class='del'>-				    const struct attribute_group **groups);</div><div class='del'>-</div><div class='del'>-  struct device *</div><div class='del'>-  devm_hwmon_device_register_with_groups(struct device *dev,</div><div class='del'>-					 const char *name, void *drvdata,</div><div class='del'>-					 const struct attribute_group **groups);</div><div class='del'>-</div><div class='del'>-  struct device *</div><div class='ctx'>   hwmon_device_register_with_info(struct device *dev,</div><div class='ctx'> 				  const char *name, void *drvdata,</div><div class='ctx'> 				  const struct hwmon_chip_info *info,</div><div class='hunk'>@@ -50,51 +40,51 @@ register/unregister functions::</div><div class='ctx'> </div><div class='ctx'>   void devm_hwmon_device_unregister(struct device *dev);</div><div class='ctx'> </div><div class='del'>-hwmon_device_register_with_groups registers a hardware monitoring device.</div><div class='del'>-The first parameter of this function is a pointer to the parent device.</div><div class='del'>-The name parameter is a pointer to the hwmon device name. The registration</div><div class='del'>-function wil create a name sysfs attribute pointing to this name.</div><div class='del'>-The drvdata parameter is the pointer to the local driver data.</div><div class='del'>-hwmon_device_register_with_groups will attach this pointer to the newly</div><div class='del'>-allocated hwmon device. The pointer can be retrieved by the driver using</div><div class='del'>-dev_get_drvdata() on the hwmon device pointer. The groups parameter is</div><div class='del'>-a pointer to a list of sysfs attribute groups. The list must be NULL terminated.</div><div class='del'>-hwmon_device_register_with_groups creates the hwmon device with name attribute</div><div class='del'>-as well as all sysfs attributes attached to the hwmon device.</div><div class='del'>-This function returns a pointer to the newly created hardware monitoring device</div><div class='del'>-or PTR_ERR for failure.</div><div class='del'>-</div><div class='del'>-devm_hwmon_device_register_with_groups is similar to</div><div class='del'>-hwmon_device_register_with_groups. However, it is device managed, meaning the</div><div class='del'>-hwmon device does not have to be removed explicitly by the removal function.</div><div class='add'>+  char *hwmon_sanitize_name(const char *name);</div><div class='ctx'> </div><div class='del'>-hwmon_device_register_with_info is the most comprehensive and preferred means</div><div class='del'>-to register a hardware monitoring device. It creates the standard sysfs</div><div class='del'>-attributes in the hardware monitoring core, letting the driver focus on reading</div><div class='del'>-from and writing to the chip instead of having to bother with sysfs attributes.</div><div class='del'>-The parent device parameter cannot be NULL with non-NULL chip info. Its</div><div class='del'>-parameters are described in more detail below.</div><div class='add'>+  char *devm_hwmon_sanitize_name(struct device *dev, const char *name);</div><div class='add'>+</div><div class='add'>+hwmon_device_register_with_info registers a hardware monitoring device.</div><div class='add'>+It creates the standard sysfs attributes in the hardware monitoring core,</div><div class='add'>+letting the driver focus on reading from and writing to the chip instead</div><div class='add'>+of having to bother with sysfs attributes. The parent device parameter</div><div class='add'>+as well as the chip parameter must not be NULL. Its parameters are described</div><div class='add'>+in more detail below.</div><div class='ctx'> </div><div class='ctx'> devm_hwmon_device_register_with_info is similar to</div><div class='ctx'> hwmon_device_register_with_info. However, it is device managed, meaning the</div><div class='ctx'> hwmon device does not have to be removed explicitly by the removal function.</div><div class='ctx'> </div><div class='add'>+All other hardware monitoring device registration functions are deprecated</div><div class='add'>+and must not be used in new drivers.</div><div class='add'>+</div><div class='ctx'> hwmon_device_unregister deregisters a registered hardware monitoring device.</div><div class='ctx'> The parameter of this function is the pointer to the registered hardware</div><div class='ctx'> monitoring device structure. This function must be called from the driver</div><div class='ctx'> remove function if the hardware monitoring device was registered with</div><div class='del'>-hwmon_device_register_with_groups or hwmon_device_register_with_info.</div><div class='add'>+hwmon_device_register_with_info.</div><div class='ctx'> </div><div class='ctx'> devm_hwmon_device_unregister does not normally have to be called. It is only</div><div class='ctx'> needed for error handling, and only needed if the driver probe fails after</div><div class='del'>-the call to devm_hwmon_device_register_with_groups or</div><div class='del'>-hwmon_device_register_with_info and if the automatic (device managed)</div><div class='del'>-removal would be too late.</div><div class='add'>+the call to hwmon_device_register_with_info and if the automatic (device</div><div class='add'>+managed) removal would be too late.</div><div class='ctx'> </div><div class='ctx'> All supported hwmon device registration functions only accept valid device</div><div class='ctx'> names. Device names including invalid characters (whitespace, '*', or '-')</div><div class='ctx'> will be rejected. The 'name' parameter is mandatory.</div><div class='ctx'> </div><div class='add'>+If the driver doesn't use a static device name (for example it uses</div><div class='add'>+dev_name()), and therefore cannot make sure the name only contains valid</div><div class='add'>+characters, hwmon_sanitize_name can be used. This convenience function</div><div class='add'>+will duplicate the string and replace any invalid characters with an</div><div class='add'>+underscore. It will allocate memory for the new string and it is the</div><div class='add'>+responsibility of the caller to release the memory when the device is</div><div class='add'>+removed.</div><div class='add'>+</div><div class='add'>+devm_hwmon_sanitize_name is the resource managed version of</div><div class='add'>+hwmon_sanitize_name; the memory will be freed automatically on device</div><div class='add'>+removal.</div><div class='add'>+</div><div class='ctx'> Using devm_hwmon_device_register_with_info()</div><div class='ctx'> --------------------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -117,7 +107,7 @@ The hwmon_chip_info structure looks as follows::</div><div class='ctx'> </div><div class='ctx'> 	struct hwmon_chip_info {</div><div class='ctx'> 		const struct hwmon_ops *ops;</div><div class='del'>-		const struct hwmon_channel_info **info;</div><div class='add'>+		const struct hwmon_channel_info * const *info;</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='ctx'> It contains the following fields:</div><div class='hunk'>@@ -213,7 +203,7 @@ register (HWMON_T_MAX) as well as a maximum temperature hysteresis register</div><div class='ctx'> 		.config = lm75_temp_config,</div><div class='ctx'> 	};</div><div class='ctx'> </div><div class='del'>-	static const struct hwmon_channel_info *lm75_info[] = {</div><div class='add'>+	static const struct hwmon_channel_info * const lm75_info[] = {</div><div class='ctx'> 		&amp;lm75_chip,</div><div class='ctx'> 		&amp;lm75_temp,</div><div class='ctx'> 		NULL</div><div class='hunk'>@@ -222,7 +212,7 @@ register (HWMON_T_MAX) as well as a maximum temperature hysteresis register</div><div class='ctx'> 	The HWMON_CHANNEL_INFO() macro can and should be used when possible.</div><div class='ctx'> 	With this macro, the above example can be simplified to</div><div class='ctx'> </div><div class='del'>-	static const struct hwmon_channel_info *lm75_info[] = {</div><div class='add'>+	static const struct hwmon_channel_info * const lm75_info[] = {</div><div class='ctx'> 		HWMON_CHANNEL_INFO(chip,</div><div class='ctx'> 				HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL),</div><div class='ctx'> 		HWMON_CHANNEL_INFO(temp,</div><div class='hunk'>@@ -283,7 +273,7 @@ Parameters:</div><div class='ctx'> </div><div class='ctx'> Return value:</div><div class='ctx'> 	The file mode for this attribute. Typically, this will be 0 (the</div><div class='del'>-	attribute will not be created), S_IRUGO, or 'S_IRUGO | S_IWUSR'.</div><div class='add'>+	attribute will not be created), 0444, or 0644.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='hunk'>@@ -335,16 +325,14 @@ Return value:</div><div class='ctx'> Driver-provided sysfs attributes</div><div class='ctx'> --------------------------------</div><div class='ctx'> </div><div class='del'>-If the hardware monitoring device is registered with</div><div class='del'>-hwmon_device_register_with_info or devm_hwmon_device_register_with_info,</div><div class='del'>-it is most likely not necessary to provide sysfs attributes. Only additional</div><div class='del'>-non-standard sysfs attributes need to be provided when one of those registration</div><div class='del'>-functions is used.</div><div class='add'>+In most situations it should not be necessary for a driver to provide sysfs</div><div class='add'>+attributes since the hardware monitoring core creates those internally.</div><div class='add'>+Only additional non-standard sysfs attributes need to be provided.</div><div class='ctx'> </div><div class='ctx'> The header file linux/hwmon-sysfs.h provides a number of useful macros to</div><div class='ctx'> declare and use hardware monitoring sysfs attributes.</div><div class='ctx'> </div><div class='del'>-In many cases, you can use the exsting define DEVICE_ATTR or its variants</div><div class='add'>+In many cases, you can use the existing define DEVICE_ATTR or its variants</div><div class='ctx'> DEVICE_ATTR_{RW,RO,WO} to declare such attributes. This is feasible if an</div><div class='ctx'> attribute has no additional context. However, in many cases there will be</div><div class='ctx'> additional information such as a sensor index which will need to be passed</div><div class='head'>diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst<br/>index 863b76289159..fa1208c62855 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/index.rst</a></div><div class='hunk'>@@ -1,6 +1,8 @@</div><div class='del'>-=========================</div><div class='del'>-Linux Hardware Monitoring</div><div class='del'>-=========================</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===================</div><div class='add'>+Hardware Monitoring</div><div class='add'>+===================</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 1</div><div class='hunk'>@@ -20,6 +22,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'> </div><div class='ctx'>    abituguru</div><div class='ctx'>    abituguru3</div><div class='add'>+   acbel-fsg032</div><div class='ctx'>    acpi_power_meter</div><div class='ctx'>    ad7314</div><div class='ctx'>    adc128d818</div><div class='hunk'>@@ -44,7 +47,6 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    asc7621</div><div class='ctx'>    aspeed-pwm-tacho</div><div class='ctx'>    asus_ec_sensors</div><div class='del'>-   asus_wmi_ec_sensors</div><div class='ctx'>    asus_wmi_sensors</div><div class='ctx'>    bcm54140</div><div class='ctx'>    bel-pfe</div><div class='hunk'>@@ -63,6 +65,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    ds620</div><div class='ctx'>    emc1403</div><div class='ctx'>    emc2103</div><div class='add'>+   emc2305</div><div class='ctx'>    emc6w201</div><div class='ctx'>    f71805f</div><div class='ctx'>    f71882fg</div><div class='hunk'>@@ -73,6 +76,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    g762</div><div class='ctx'>    gsc-hwmon</div><div class='ctx'>    gl518sm</div><div class='add'>+   gxp-fan-ctrl</div><div class='ctx'>    hih6130</div><div class='ctx'>    ibmaem</div><div class='ctx'>    ibm-cffps</div><div class='hunk'>@@ -90,6 +94,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    jc42</div><div class='ctx'>    k10temp</div><div class='ctx'>    k8temp</div><div class='add'>+   lan966x</div><div class='ctx'>    lineage-pem</div><div class='ctx'>    lm25066</div><div class='ctx'>    lm63</div><div class='hunk'>@@ -108,6 +113,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    lm95234</div><div class='ctx'>    lm95245</div><div class='ctx'>    lochnagar</div><div class='add'>+   lt7182s</div><div class='ctx'>    ltc2992</div><div class='ctx'>    ltc2945</div><div class='ctx'>    ltc2947</div><div class='hunk'>@@ -131,6 +137,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    max20751</div><div class='ctx'>    max31722</div><div class='ctx'>    max31730</div><div class='add'>+   max31760</div><div class='ctx'>    max31785</div><div class='ctx'>    max31790</div><div class='ctx'>    max34440</div><div class='hunk'>@@ -141,6 +148,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    max6697</div><div class='ctx'>    max8688</div><div class='ctx'>    mc13783-adc</div><div class='add'>+   mc34vr500</div><div class='ctx'>    mcp3021</div><div class='ctx'>    menf21bmc</div><div class='ctx'>    mlxreg-fan</div><div class='hunk'>@@ -157,6 +165,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    nzxt-kraken2</div><div class='ctx'>    nzxt-smart2</div><div class='ctx'>    occ</div><div class='add'>+   oxp-sensors</div><div class='ctx'>    pc87360</div><div class='ctx'>    pc87427</div><div class='ctx'>    pcf8591</div><div class='hunk'>@@ -176,6 +185,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    sch5627</div><div class='ctx'>    sch5636</div><div class='ctx'>    scpi-hwmon</div><div class='add'>+   sfctemp</div><div class='ctx'>    sht15</div><div class='ctx'>    sht21</div><div class='ctx'>    sht3x</div><div class='hunk'>@@ -184,6 +194,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    sis5595</div><div class='ctx'>    sl28cpld</div><div class='ctx'>    smm665</div><div class='add'>+   smpro-hwmon</div><div class='ctx'>    smsc47b397</div><div class='ctx'>    smsc47m192</div><div class='ctx'>    smsc47m1</div><div class='hunk'>@@ -203,6 +214,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    tps23861</div><div class='ctx'>    tps40422</div><div class='ctx'>    tps53679</div><div class='add'>+   tps546d24</div><div class='ctx'>    twl4030-madc-hwmon</div><div class='ctx'>    ucd9000</div><div class='ctx'>    ucd9200</div><div class='hunk'>@@ -223,6 +235,7 @@ Hardware Monitoring Kernel Drivers</div><div class='ctx'>    wm8350</div><div class='ctx'>    xgene-hwmon</div><div class='ctx'>    xdpe12284</div><div class='add'>+   xdpe152c4</div><div class='ctx'>    zl6100</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='head'>diff --git a/Documentation/hwmon/it87.rst b/Documentation/hwmon/it87.rst<br/>index 2d83f23bee93..5cef4f265000 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/it87.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/it87.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/it87.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/it87.rst</a></div><div class='hunk'>@@ -145,6 +145,22 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'>     Datasheet: Not publicly available</div><div class='ctx'> </div><div class='add'>+  * IT8792E/IT8795E</div><div class='add'>+</div><div class='add'>+    Prefix: 'it8792'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: from Super I/O config space (8 I/O ports)</div><div class='add'>+</div><div class='add'>+    Datasheet: Not publicly available</div><div class='add'>+</div><div class='add'>+  * IT87952E</div><div class='add'>+</div><div class='add'>+    Prefix: 'it87952'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: from Super I/O config space (8 I/O ports)</div><div class='add'>+</div><div class='add'>+    Datasheet: Not publicly available</div><div class='add'>+</div><div class='ctx'>   * SiS950   [clone of IT8705F]</div><div class='ctx'> </div><div class='ctx'>     Prefix: 'it87'</div><div class='hunk'>@@ -162,7 +178,7 @@ Authors:</div><div class='ctx'> Module Parameters</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='del'>-* update_vbat: int</div><div class='add'>+* update_vbat bool</div><div class='ctx'>     0 if vbat should report power on value, 1 if vbat should be updated after</div><div class='ctx'>     each read. Default is 0. On some boards the battery voltage is provided</div><div class='ctx'>     by either the battery or the onboard power supply. Only the first reading</div><div class='hunk'>@@ -171,11 +187,31 @@ Module Parameters</div><div class='ctx'>     the chip so can be read at any time. Excessive reading may decrease</div><div class='ctx'>     battery life but no information is given in the datasheet.</div><div class='ctx'> </div><div class='del'>-* fix_pwm_polarity int</div><div class='add'>+* fix_pwm_polarity bool</div><div class='ctx'>     Force PWM polarity to active high (DANGEROUS). Some chips are</div><div class='ctx'>     misconfigured by BIOS - PWM values would be inverted. This option tries</div><div class='ctx'>     to fix this. Please contact your BIOS manufacturer and ask him for fix.</div><div class='ctx'> </div><div class='add'>+* force_id short, short</div><div class='add'>+</div><div class='add'>+  Force multiple chip ID to specified value, separated by ','.</div><div class='add'>+  For example "force_id=0x8689,0x8633".  A value of 0 is ignored</div><div class='add'>+  for that chip.</div><div class='add'>+  Note: A single force_id value (e.g. "force_id=0x8689") is used for</div><div class='add'>+  all chips, to only set the first chip use "force_id=0x8689,0".</div><div class='add'>+  Should only be used for testing.</div><div class='add'>+</div><div class='add'>+* ignore_resource_conflict bool</div><div class='add'>+</div><div class='add'>+  Similar to acpi_enforce_resources=lax, but only affects this driver.</div><div class='add'>+  ACPI resource conflicts are ignored if this parameter is provided and</div><div class='add'>+  set to 1.</div><div class='add'>+  Provided since there are reports that system-wide acpi_enfore_resources=lax</div><div class='add'>+  can result in boot failures on some systems.</div><div class='add'>+  Note: This is inherently risky since it means that both ACPI and this driver</div><div class='add'>+  may access the chip at the same time. This can result in race conditions and,</div><div class='add'>+  worst case, result in unexpected system reboots.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Hardware Interfaces</div><div class='ctx'> -------------------</div><div class='hunk'>@@ -193,8 +229,8 @@ Description</div><div class='ctx'> </div><div class='ctx'> This driver implements support for the IT8603E, IT8620E, IT8623E, IT8628E,</div><div class='ctx'> IT8705F, IT8712F, IT8716F, IT8718F, IT8720F, IT8721F, IT8726F, IT8728F, IT8732F,</div><div class='del'>-IT8758E, IT8771E, IT8772E, IT8781F, IT8782F, IT8783E/F, IT8786E, IT8790E, and</div><div class='del'>-SiS950 chips.</div><div class='add'>+IT8758E, IT8771E, IT8772E, IT8781F, IT8782F, IT8783E/F, IT8786E, IT8790E,</div><div class='add'>+IT8792E/IT8795E, IT87952E and SiS950 chips.</div><div class='ctx'> </div><div class='ctx'> These chips are 'Super I/O chips', supporting floppy disks, infrared ports,</div><div class='ctx'> joysticks and other miscellaneous stuff. For hardware monitoring, they</div><div class='hunk'>@@ -238,7 +274,8 @@ of the fan is not supported (value 0 of pwmX_enable).</div><div class='ctx'> The IT8620E and IT8628E are custom designs, hardware monitoring part is similar</div><div class='ctx'> to IT8728F. It only supports 16-bit fan mode. Both chips support up to 6 fans.</div><div class='ctx'> </div><div class='del'>-The IT8790E supports up to 3 fans. 16-bit fan mode is always enabled.</div><div class='add'>+The IT8790E, IT8792E/IT8795E and IT87952E support up to 3 fans. 16-bit fan</div><div class='add'>+mode is always enabled.</div><div class='ctx'> </div><div class='ctx'> The IT8732F supports a closed-loop mode for fan control, but this is not</div><div class='ctx'> currently implemented by the driver.</div><div class='head'>diff --git a/Documentation/hwmon/lan966x.rst b/Documentation/hwmon/lan966x.rst<br/>new file mode 100644<br/>index 000000000000..1d1724afa5d2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/lan966x.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/lan966x.rst</a></div><div class='hunk'>@@ -0,0 +1,40 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Kernel driver lan966x-hwmon</div><div class='add'>+===========================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * Microchip LAN9668 (sensor in SoC)</div><div class='add'>+</div><div class='add'>+    Prefix: 'lan9668-hwmon'</div><div class='add'>+</div><div class='add'>+    Datasheet: https://microchip-ung.github.io/lan9668_reginfo</div><div class='add'>+</div><div class='add'>+Authors:</div><div class='add'>+</div><div class='add'>+	Michael Walle &lt;michael@walle.cc&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver implements support for the Microchip LAN9668 on-chip</div><div class='add'>+temperature sensor as well as its fan controller. It provides one</div><div class='add'>+temperature sensor and one fan controller. The temperature range</div><div class='add'>+of the sensor is specified from -40 to +125 degrees Celsius and</div><div class='add'>+its accuracy is +/- 5 degrees Celsius. The fan controller has a</div><div class='add'>+tacho input and a PWM output with a customizable PWM output</div><div class='add'>+frequency ranging from ~20Hz to ~650kHz.</div><div class='add'>+</div><div class='add'>+No alarms are supported by the SoC.</div><div class='add'>+</div><div class='add'>+The driver exports temperature values, fan tacho input and PWM</div><div class='add'>+settings via the following sysfs files:</div><div class='add'>+</div><div class='add'>+**temp1_input**</div><div class='add'>+</div><div class='add'>+**fan1_input**</div><div class='add'>+</div><div class='add'>+**pwm1**</div><div class='add'>+</div><div class='add'>+**pwm1_freq**</div><div class='head'>diff --git a/Documentation/hwmon/lm90.rst b/Documentation/hwmon/lm90.rst<br/>index 05391fb4042d..23af17a0ab44 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/lm90.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/lm90.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/lm90.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/lm90.rst</a></div><div class='hunk'>@@ -3,6 +3,14 @@ Kernel driver lm90</div><div class='ctx'> </div><div class='ctx'> Supported chips:</div><div class='ctx'> </div><div class='add'>+  * National Semiconductor LM84</div><div class='add'>+</div><div class='add'>+    Prefix: 'lm84'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the National Semiconductor website</div><div class='add'>+</div><div class='ctx'>   * National Semiconductor LM90</div><div class='ctx'> </div><div class='ctx'>     Prefix: 'lm90'</div><div class='hunk'>@@ -43,6 +51,30 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'> 	       http://www.national.com/mpf/LM/LM86.html</div><div class='ctx'> </div><div class='add'>+  * Analog Devices ADM1020</div><div class='add'>+</div><div class='add'>+    Prefix: 'adm1020'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the Analog Devices website</div><div class='add'>+</div><div class='add'>+  * Analog Devices ADM1021</div><div class='add'>+</div><div class='add'>+    Prefix: 'adm1021'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the Analog Devices website</div><div class='add'>+</div><div class='add'>+  * Analog Devices ADM1021A/ADM1023</div><div class='add'>+</div><div class='add'>+    Prefix: 'adm1023'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the Analog Devices website</div><div class='add'>+</div><div class='ctx'>   * Analog Devices ADM1032</div><div class='ctx'> </div><div class='ctx'>     Prefix: 'adm1032'</div><div class='hunk'>@@ -73,6 +105,36 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'> 	       https://www.onsemi.com/PowerSolutions/product.do?id=ADT7461A</div><div class='ctx'> </div><div class='add'>+  * Analog Devices ADT7481</div><div class='add'>+</div><div class='add'>+    Prefix: 'adt7481'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x4b and 0x4c</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the ON Semiconductor website</div><div class='add'>+</div><div class='add'>+	       https://www.onsemi.com/PowerSolutions/product.do?id=ADT7481</div><div class='add'>+</div><div class='add'>+  * Analog Devices ADT7482</div><div class='add'>+</div><div class='add'>+    Prefix: 'adt7482'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x4c</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the ON Semiconductor website</div><div class='add'>+</div><div class='add'>+	       https://www.onsemi.com/PowerSolutions/product.do?id=ADT7482</div><div class='add'>+</div><div class='add'>+  * Analog Devices ADT7483A</div><div class='add'>+</div><div class='add'>+    Prefix: 'adt7483a'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x4c, 0x4d, 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the ON Semiconductor website</div><div class='add'>+</div><div class='add'>+	       https://www.onsemi.com/PowerSolutions/product.do?id=ADT7483A</div><div class='add'>+</div><div class='ctx'>   * ON Semiconductor NCT1008</div><div class='ctx'> </div><div class='ctx'>     Prefix: 'nct1008'</div><div class='hunk'>@@ -83,6 +145,72 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'> 	       https://www.onsemi.com/PowerSolutions/product.do?id=NCT1008</div><div class='ctx'> </div><div class='add'>+  * ON Semiconductor NCT210</div><div class='add'>+</div><div class='add'>+    Prefix: 'adm1021'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the ON Semiconductor website</div><div class='add'>+</div><div class='add'>+	       https://www.onsemi.com/PowerSolutions/product.do?id=NCT210</div><div class='add'>+</div><div class='add'>+  * ON Semiconductor NCT214</div><div class='add'>+</div><div class='add'>+    Prefix: 'nct214'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the ON Semiconductor website</div><div class='add'>+</div><div class='add'>+	       https://www.onsemi.com/PowerSolutions/product.do?id=NCT214</div><div class='add'>+</div><div class='add'>+  * ON Semiconductor NCT218</div><div class='add'>+</div><div class='add'>+    Prefix: 'nct218'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x4c - 0x4d</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the ON Semiconductor website</div><div class='add'>+</div><div class='add'>+	       https://www.onsemi.com/PowerSolutions/product.do?id=NCT218</div><div class='add'>+</div><div class='add'>+  * ON Semiconductor NCT72</div><div class='add'>+</div><div class='add'>+    Prefix: 'nct72'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x4c - 0x4d</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the ON Semiconductor website</div><div class='add'>+</div><div class='add'>+	       https://www.onsemi.com/PowerSolutions/product.do?id=NCT72</div><div class='add'>+</div><div class='add'>+  * Maxim MAX1617</div><div class='add'>+</div><div class='add'>+    Prefix: 'max1617'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the Maxim website</div><div class='add'>+</div><div class='add'>+  * Maxim MAX1617A</div><div class='add'>+</div><div class='add'>+    Prefix: 'max1617a'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the Maxim website</div><div class='add'>+</div><div class='add'>+  * Maxim MAX6642</div><div class='add'>+</div><div class='add'>+    Prefix: 'max6642'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x48-0x4f</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the Maxim website</div><div class='add'>+</div><div class='add'>+	       http://datasheets.maxim-ic.com/en/ds/MAX6642.pdf</div><div class='add'>+</div><div class='ctx'>   * Maxim MAX6646</div><div class='ctx'> </div><div class='ctx'>     Prefix: 'max6646'</div><div class='hunk'>@@ -105,7 +233,7 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'>   * Maxim MAX6648</div><div class='ctx'> </div><div class='del'>-    Prefix: 'max6646'</div><div class='add'>+    Prefix: 'max6648'</div><div class='ctx'> </div><div class='ctx'>     Addresses scanned: I2C 0x4c</div><div class='ctx'> </div><div class='hunk'>@@ -191,7 +319,7 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'>   * Maxim MAX6692</div><div class='ctx'> </div><div class='del'>-    Prefix: 'max6646'</div><div class='add'>+    Prefix: 'max6648'</div><div class='ctx'> </div><div class='ctx'>     Addresses scanned: I2C 0x4c</div><div class='ctx'> </div><div class='hunk'>@@ -275,6 +403,46 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'> 	       https://www.ti.com/lit/gpn/tmp461</div><div class='ctx'> </div><div class='add'>+  * Philips NE1617, NE1617A</div><div class='add'>+</div><div class='add'>+    Prefix: 'max1617' (probably detected as a max1617)</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheets: Publicly available at the Philips website</div><div class='add'>+</div><div class='add'>+  * Philips NE1618</div><div class='add'>+</div><div class='add'>+    Prefix: 'ne1618'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheets: Publicly available at the Philips website</div><div class='add'>+</div><div class='add'>+  * Genesys Logic GL523SM</div><div class='add'>+</div><div class='add'>+    Prefix: 'gl523sm'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet:</div><div class='add'>+</div><div class='add'>+  * TI THMC10</div><div class='add'>+</div><div class='add'>+    Prefix: 'thmc10'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the TI website</div><div class='add'>+</div><div class='add'>+  * Onsemi MC1066</div><div class='add'>+</div><div class='add'>+    Prefix: 'mc1066'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e</div><div class='add'>+</div><div class='add'>+    Datasheet: Publicly available at the Onsemi website</div><div class='add'>+</div><div class='ctx'> Author: Jean Delvare &lt;jdelvare@suse.de&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -285,6 +453,12 @@ The LM90 is a digital temperature sensor. It senses its own temperature as</div><div class='ctx'> well as the temperature of up to one external diode. It is compatible</div><div class='ctx'> with many other devices, many of which are supported by this driver.</div><div class='ctx'> </div><div class='add'>+The family of chips supported by this driver is derived from MAX1617.</div><div class='add'>+This chip as well as various compatible chips support a local and a remote</div><div class='add'>+temperature sensor with 8 bit accuracy. Later chips provide improved accuracy</div><div class='add'>+and other additional features such as hysteresis and temperature offset</div><div class='add'>+registers.</div><div class='add'>+</div><div class='ctx'> Note that there is no easy way to differentiate between the MAX6657,</div><div class='ctx'> MAX6658 and MAX6659 variants. The extra features of the MAX6659 are only</div><div class='ctx'> supported by this driver if the chip is located at address 0x4d or 0x4e,</div><div class='hunk'>@@ -292,15 +466,31 @@ or if the chip type is explicitly selected as max6659.</div><div class='ctx'> The MAX6680 and MAX6681 only differ in their pinout, therefore they obviously</div><div class='ctx'> can't (and don't need to) be distinguished.</div><div class='ctx'> </div><div class='del'>-The specificity of this family of chipsets over the ADM1021/LM84</div><div class='del'>-family is that it features critical limits with hysteresis, and an</div><div class='del'>-increased resolution of the remote temperature measurement.</div><div class='del'>-</div><div class='ctx'> The different chipsets of the family are not strictly identical, although</div><div class='ctx'> very similar. For reference, here comes a non-exhaustive list of specific</div><div class='ctx'> features:</div><div class='ctx'> </div><div class='add'>+LM84:</div><div class='add'>+  * 8 bit sensor resolution</div><div class='add'>+</div><div class='add'>+ADM1020, ADM1021, GL523SM, MAX1617, NE1617, NE1617A, THMC10:</div><div class='add'>+  * 8 bit sensor resolution</div><div class='add'>+  * Low temperature limits</div><div class='add'>+</div><div class='add'>+NCT210, NE1618:</div><div class='add'>+  * 11 bit sensor resolution for remote temperature sensor</div><div class='add'>+  * Low temperature limits</div><div class='add'>+</div><div class='add'>+ADM1021A, ADM1023:</div><div class='add'>+  * Temperature offset register for remote temperature sensor</div><div class='add'>+  * 11 bit resolution for remote temperature sensor</div><div class='add'>+  * Low temperature limits</div><div class='add'>+</div><div class='ctx'> LM90:</div><div class='add'>+  * 11 bit resolution for remote temperature sensor</div><div class='add'>+  * Temperature offset register for remote temperature sensor</div><div class='add'>+  * Low and critical temperature limits</div><div class='add'>+  * Configurable conversion rate</div><div class='ctx'>   * Filter and alert configuration register at 0xBF.</div><div class='ctx'>   * ALERT is triggered by temperatures over critical limits.</div><div class='ctx'> </div><div class='hunk'>@@ -322,8 +512,31 @@ ADM1032:</div><div class='ctx'> ADT7461, ADT7461A, NCT1008:</div><div class='ctx'>   * Extended temperature range (breaks compatibility)</div><div class='ctx'>   * Lower resolution for remote temperature</div><div class='add'>+  * SMBus PEC support for Write Byte and Receive Byte transactions.</div><div class='add'>+  * 10 bit temperature resolution</div><div class='add'>+</div><div class='add'>+ADT7481, ADT7482, ADT7483:</div><div class='add'>+  * Temperature offset register</div><div class='add'>+  * SMBus PEC support</div><div class='add'>+  * 10 bit temperature resolution for external sensors</div><div class='add'>+  * Two remote sensors</div><div class='add'>+  * Selectable address (ADT7483)</div><div class='add'>+</div><div class='add'>+MAX6642:</div><div class='add'>+  * No critical limit register</div><div class='add'>+  * Conversion rate not configurable</div><div class='add'>+  * Better local resolution (10 bit)</div><div class='add'>+  * 10 bit external sensor resolution</div><div class='add'>+</div><div class='add'>+MAX6646, MAX6647, MAX6649:</div><div class='add'>+  * Better local resolution</div><div class='add'>+  * Extended range unsigned external temperature</div><div class='add'>+</div><div class='add'>+MAX6648, MAX6692:</div><div class='add'>+  * Better local resolution</div><div class='add'>+  * Unsigned temperature</div><div class='ctx'> </div><div class='del'>-MAX6654:</div><div class='add'>+MAX6654, MAX6690:</div><div class='ctx'>   * Better local resolution</div><div class='ctx'>   * Selectable address</div><div class='ctx'>   * Remote sensor type selection</div><div class='hunk'>@@ -423,6 +636,6 @@ two transactions will typically mean twice as much delay waiting for</div><div class='ctx'> transaction completion, effectively doubling the register cache refresh time.</div><div class='ctx'> I guess reliability comes at a price, but it's quite expensive this time.</div><div class='ctx'> </div><div class='del'>-So, as not everyone might enjoy the slowdown, PEC can be disabled through</div><div class='del'>-sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1</div><div class='del'>-to that file to enable PEC again.</div><div class='add'>+So, as not everyone might enjoy the slowdown, PEC is disabled by default and</div><div class='add'>+can be enabled through sysfs. Just write 1 to the "pec" file and PEC will be</div><div class='add'>+enabled. Write 0 to that file to disable PEC again.</div><div class='head'>diff --git a/Documentation/hwmon/lt7182s.rst b/Documentation/hwmon/lt7182s.rst<br/>new file mode 100644<br/>index 000000000000..f7268311b191<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/lt7182s.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/lt7182s.rst</a></div><div class='hunk'>@@ -0,0 +1,92 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Kernel driver lt7182s</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * ADI LT7182S</div><div class='add'>+</div><div class='add'>+    Prefix: 'lt7182s'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: -</div><div class='add'>+</div><div class='add'>+    Datasheet: https://www.analog.com/en/products/lt7182s.html</div><div class='add'>+</div><div class='add'>+Author: Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+LT7182S is a Dual Channel 6A, 20V PolyPhase Step-Down Silent Switcher with</div><div class='add'>+Digital Power System Management support.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Usage Notes</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver does not probe for PMBus devices. You will have to instantiate</div><div class='add'>+devices explicitly.</div><div class='add'>+</div><div class='add'>+Example: the following commands will load the driver for a LT7182S</div><div class='add'>+at address 0x4f on I2C bus #4::</div><div class='add'>+</div><div class='add'>+    # modprobe lt7182s</div><div class='add'>+    # echo lt7182s 0x4f &gt; /sys/bus/i2c/devices/i2c-4/new_device</div><div class='add'>+</div><div class='add'>+It can also be instantiated by declaring an entry in device tree.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Sysfs attributes</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+======================= ====================================</div><div class='add'>+curr[1-2]_label		"iin[12]"</div><div class='add'>+curr[1-2]_input		Measured input current</div><div class='add'>+curr[1-2]_max		Maximum input current</div><div class='add'>+curr[1-2]_max_alarm	Current high alarm</div><div class='add'>+</div><div class='add'>+curr[3-4]_label		"iout[1-2]"</div><div class='add'>+curr[3-4]_input		Measured output current</div><div class='add'>+curr[3-4]_highest	Highest measured output current</div><div class='add'>+curr[3-4]_max		Maximum output current</div><div class='add'>+curr[3-4]_max_alarm	Output current high alarm</div><div class='add'>+</div><div class='add'>+in[1-2]_label		"vin[12]"</div><div class='add'>+in[1-2]_input		Measured input voltage</div><div class='add'>+in[1-2]_highest		Highest measured input voltage</div><div class='add'>+in[1-2]_crit		Critical maximum input voltage</div><div class='add'>+in[1-2]_crit_alarm	Input voltage critical high alarm</div><div class='add'>+in[1-2]_min		Minimum input voltage</div><div class='add'>+in[1-2]_min_alarm	Input voltage low alarm</div><div class='add'>+in[1-2]_rated_min	Rated minimum input voltage</div><div class='add'>+in[1-2]_rated_max	Rated maximum input voltage</div><div class='add'>+in1_reset_history	Write to reset history for all attributes</div><div class='add'>+</div><div class='add'>+in[3-5]_label		"vmon[1-3]"</div><div class='add'>+in[3-5]_input		Measured voltage on ITH1/ITH2/EXTVCC pins</div><div class='add'>+			Only available if enabled with MFR_ADC_CONTROL_LT7182S</div><div class='add'>+			command.</div><div class='add'>+</div><div class='add'>+in[3-4|6-7]_label	"vout[1-2]"</div><div class='add'>+in[3-4|6-7]_input	Measured output voltage</div><div class='add'>+in[3-4|6-7]_highest	Highest measured output voltage</div><div class='add'>+in[3-4|6-7]_lcrit	Critical minimum output voltage</div><div class='add'>+in[3-4|6-7]_lcrit_alarm	Output voltage critical low alarm</div><div class='add'>+in[3-4|6-7]_min		Minimum output voltage</div><div class='add'>+in[3-4|6-7]_max_alarm	Output voltage low alarm</div><div class='add'>+in[3-4|6-7]_max		Maximum output voltage</div><div class='add'>+in[3-4|6-7]_max_alarm	Output voltage high alarm</div><div class='add'>+in[3-4|6-7]_crit	Critical maximum output voltage</div><div class='add'>+in[3-4|6-7]_crit_alarm	Output voltage critical high alarm</div><div class='add'>+</div><div class='add'>+power[1-2]_label	"pout[1-2]"</div><div class='add'>+power[1-2]_input	Measured output power</div><div class='add'>+</div><div class='add'>+temp1_input		Measured temperature</div><div class='add'>+temp1_crit		Critical high temperature</div><div class='add'>+temp1_crit_alarm	Chip temperature critical high alarm</div><div class='add'>+temp1_max		Maximum temperature</div><div class='add'>+temp1_max_alarm		Chip temperature high alarm</div><div class='add'>+======================= ====================================</div><div class='head'>diff --git a/Documentation/hwmon/ltc2978.rst b/Documentation/hwmon/ltc2978.rst<br/>index b99a63965cfb..edf24e5e1e11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/ltc2978.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/ltc2978.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/ltc2978.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/ltc2978.rst</a></div><div class='hunk'>@@ -333,7 +333,7 @@ temp[N]_input		Measured temperature.</div><div class='ctx'> 			- On LTC3883, temp1 reports an external temperature,</div><div class='ctx'> 			  and temp2 reports the chip temperature.</div><div class='ctx'> </div><div class='del'>-temp[N]_min		Mimimum temperature.</div><div class='add'>+temp[N]_min		Minimum temperature.</div><div class='ctx'> </div><div class='ctx'> 			LTC2972, LTC2974, LCT2977, LTM2980, LTC2978,</div><div class='ctx'> 			LTC2979, and LTM2987 only.</div><div class='head'>diff --git a/Documentation/hwmon/max16601.rst b/Documentation/hwmon/max16601.rst<br/>index 92c0a7d7808c..c8c63a053e40 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/max16601.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/max16601.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/max16601.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/max16601.rst</a></div><div class='hunk'>@@ -13,6 +13,14 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'>     Datasheet: Not published</div><div class='ctx'> </div><div class='add'>+  * Maxim MAX16600</div><div class='add'>+</div><div class='add'>+    Prefix: 'max16600'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: -</div><div class='add'>+</div><div class='add'>+    Datasheet: Not published</div><div class='add'>+</div><div class='ctx'>   * Maxim MAX16601</div><div class='ctx'> </div><div class='ctx'>     Prefix: 'max16601'</div><div class='hunk'>@@ -21,6 +29,14 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'>     Datasheet: Not published</div><div class='ctx'> </div><div class='add'>+  * Maxim MAX16602</div><div class='add'>+</div><div class='add'>+    Prefix: 'max16602'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: -</div><div class='add'>+</div><div class='add'>+    Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX16602.pdf</div><div class='add'>+</div><div class='ctx'> Author: Guenter Roeck &lt;linux@roeck-us.net&gt;</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -28,7 +44,8 @@ Description</div><div class='ctx'> -----------</div><div class='ctx'> </div><div class='ctx'> This driver supports the MAX16508 VR13 Dual-Output Voltage Regulator</div><div class='del'>-as well as the MAX16601 VR13.HC Dual-Output Voltage Regulator chipsets.</div><div class='add'>+as well as the MAX16600, MAX16601, and MAX16602 VR13.HC Dual-Output</div><div class='add'>+Voltage Regulator chipsets.</div><div class='ctx'> </div><div class='ctx'> The driver is a client driver to the core PMBus driver.</div><div class='ctx'> Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.</div><div class='head'>diff --git a/Documentation/hwmon/max31760.rst b/Documentation/hwmon/max31760.rst<br/>new file mode 100644<br/>index 000000000000..b1b55fb843c1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/max31760.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/max31760.rst</a></div><div class='hunk'>@@ -0,0 +1,77 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+Kernel driver max31760</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+  * Analog Devices MAX31760</div><div class='add'>+</div><div class='add'>+    Prefix: 'max31760'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: none</div><div class='add'>+</div><div class='add'>+    Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX31760.pdf</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Author: Ibrahim Tilki &lt;Ibrahim.Tilki@analog.com&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The MAX31760 integrates temperature sensing along with precision PWM fan</div><div class='add'>+control. It accurately measures its local die temperature and the remote</div><div class='add'>+temperature of a discrete diode-connected transistor, such as a 2N3906,</div><div class='add'>+or a thermal diode commonly found on CPUs, graphics processor units (GPUs),</div><div class='add'>+and other ASICs. Multiple temperature thresholds, such as local</div><div class='add'>+high/overtemperature (OT) and remote high/overtemperature, can be set by an</div><div class='add'>+I2C-compatible interface. Fan speed is controlled based on the temperature</div><div class='add'>+reading as an index to a 48-byte lookup table (LUT) containing</div><div class='add'>+user-programmed PWM values. The flexible LUT-based architecture enables</div><div class='add'>+the user to program a smooth nonlinear fan speed vs. temperature transfer</div><div class='add'>+function to minimize acoustic fan noise. Two tachometer inputs allow</div><div class='add'>+measuring the speeds of two fans independently. When the local or remote</div><div class='add'>+OT threshold is exceeded, the SHDN pin is asserted low and can be used to</div><div class='add'>+shut down the system. A dedicated ALERT pin reports that either a local or</div><div class='add'>+remote high-temperature threshold has been exceeded.</div><div class='add'>+</div><div class='add'>+Temperature measurement range: from -55°C to 125°C</div><div class='add'>+</div><div class='add'>+Temperature Resolution: 11 Bits, ±0.125°C</div><div class='add'>+</div><div class='add'>+Please refer how to instantiate this driver: Documentation/i2c/instantiating-devices.rst</div><div class='add'>+</div><div class='add'>+Lookup table for auto fan control</div><div class='add'>+---------------------------------</div><div class='add'>+</div><div class='add'>+========= =================================</div><div class='add'>+LUT Index Name</div><div class='add'>+========= =================================</div><div class='add'>+1         PWM value for T &lt; +18°C</div><div class='add'>+2         PWM value for +18°C ≤ T &lt; +20°C</div><div class='add'>+3         PWM value for +20°C ≤ T &lt; +22°C</div><div class='add'>+...       ...</div><div class='add'>+47        PWM value for +108°C ≤ T &lt; +110°C</div><div class='add'>+48        PWM value for T ≥ +110°C</div><div class='add'>+========= =================================</div><div class='add'>+</div><div class='add'>+Sysfs entries</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+=============================== =================================================================================</div><div class='add'>+fan[1-2]_input                  Fan speed (in RPM)</div><div class='add'>+fan[1-2]_enable                 Enable fan readings and fan fault alarms</div><div class='add'>+fan[1-2]_fault                  Fan fault status</div><div class='add'>+temp[1-2]_label                 "Remote" and "Local" temperature channel labels</div><div class='add'>+temp[1-2]_input                 Temperature sensor readings (in millidegrees Celsius)</div><div class='add'>+temp1_fault                     Remote temperature sensor fault status</div><div class='add'>+temp[1-2]_max                   Temperature max value. Asserts "ALERT" pin when exceeded</div><div class='add'>+temp[1-2]_max_alarm             Temperature max alarm status</div><div class='add'>+temp[1-2]_crit                  Temperature critical value. Asserts "SHDN" pin when exceeded</div><div class='add'>+temp[1-2]_crit_alarm            Temperature critical alarm status</div><div class='add'>+pwm1                            PWM value for direct fan control</div><div class='add'>+pwm1_enable                     1: direct fan control, 2: temperature based auto fan control</div><div class='add'>+pwm1_freq                       PWM frequency in hertz</div><div class='add'>+pwm1_auto_channels_temp         Temperature source for auto fan control. 1: temp1, 2: temp2, 3: max(temp1, temp2)</div><div class='add'>+pwm1_auto_point[1-48]_pwm       PWM value for LUT point</div><div class='add'>+pwm1_auto_point_temp_hyst       Temperature hysteresis for auto fan control. Can be either 2000mC or 4000mC</div><div class='add'>+=============================== =================================================================================</div><div class='head'>diff --git a/Documentation/hwmon/max31790.rst b/Documentation/hwmon/max31790.rst<br/>index 7b097c3b9b90..33c5c7330efc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/max31790.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/max31790.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/max31790.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/max31790.rst</a></div><div class='hunk'>@@ -38,6 +38,7 @@ Sysfs entries</div><div class='ctx'> fan[1-12]_input    RO  fan tachometer speed in RPM</div><div class='ctx'> fan[1-12]_fault    RO  fan experienced fault</div><div class='ctx'> fan[1-6]_target    RW  desired fan speed in RPM</div><div class='add'>+fan[1-6]_enable    RW  enable or disable the tachometer input</div><div class='ctx'> pwm[1-6]_enable    RW  regulator mode, 0=disabled (duty cycle=0%), 1=manual mode, 2=rpm mode</div><div class='ctx'> pwm[1-6]           RW  read: current pwm duty cycle,</div><div class='ctx'>                        write: target pwm duty cycle (0-255)</div><div class='head'>diff --git a/Documentation/hwmon/max6697.rst b/Documentation/hwmon/max6697.rst<br/>index ffc5a7d8d33b..90ca224c446a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/max6697.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/max6697.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/max6697.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/max6697.rst</a></div><div class='hunk'>@@ -73,7 +73,7 @@ Description</div><div class='ctx'> This driver implements support for several MAX6697 compatible temperature sensor</div><div class='ctx'> chips. The chips support one local temperature sensor plus four, six, or seven</div><div class='ctx'> remote temperature sensors. Remote temperature sensors are diode-connected</div><div class='del'>-thermal transitors, except for MAX6698 which supports three diode-connected</div><div class='add'>+thermal transistors, except for MAX6698 which supports three diode-connected</div><div class='ctx'> thermal transistors plus three thermistors in addition to the local temperature</div><div class='ctx'> sensor.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/mc34vr500.rst b/Documentation/hwmon/mc34vr500.rst<br/>new file mode 100644<br/>index 000000000000..f82d872477ac<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/mc34vr500.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/mc34vr500.rst</a></div><div class='hunk'>@@ -0,0 +1,32 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+Kernel driver mc34vr500</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+Supported Chips:</div><div class='add'>+</div><div class='add'>+  * NXP MC34VR500</div><div class='add'>+</div><div class='add'>+    Prefix: 'mc34vr500'</div><div class='add'>+</div><div class='add'>+    Datasheet: https://www.nxp.com/docs/en/data-sheet/MC34VR500.pdf</div><div class='add'>+</div><div class='add'>+Author: Mario Kicherer &lt;dev@kicherer.org&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver implements initial support for the NXP MC34VR500 PMIC. The MC34VR500</div><div class='add'>+monitors the temperature, input voltage and output currents and provides</div><div class='add'>+corresponding alarms. For the temperature, the chip can send interrupts if</div><div class='add'>+the temperature rises above one of the following values: 110°, 120°, 125° and</div><div class='add'>+130° Celsius. For the input voltage, an interrupt is sent when the voltage</div><div class='add'>+drops below 2.8V.</div><div class='add'>+</div><div class='add'>+Currently, this driver only implements the input voltage and temperature</div><div class='add'>+alarms. The interrupts are mapped as follows:</div><div class='add'>+</div><div class='add'>+&lt;= 2.8V  -&gt; in0_min_alarm</div><div class='add'>+&gt;110°c   -&gt; temp1_max_alarm</div><div class='add'>+&gt;120°c   -&gt; temp1_crit_alarm</div><div class='add'>+&gt;130°c   -&gt; temp1_emergency_alarm</div><div class='head'>diff --git a/Documentation/hwmon/menf21bmc.rst b/Documentation/hwmon/menf21bmc.rst<br/>index 978691d5956d..e7f3f67b38d4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/menf21bmc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/menf21bmc.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/menf21bmc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/menf21bmc.rst</a></div><div class='hunk'>@@ -7,7 +7,7 @@ Supported chips:</div><div class='ctx'> </div><div class='ctx'> 	  Prefix: 'menf21bmc_hwmon'</div><div class='ctx'> </div><div class='del'>-	  Adresses scanned: -</div><div class='add'>+	  Addresses scanned: -</div><div class='ctx'> </div><div class='ctx'> Author: Andreas Werner &lt;andreas.werner@men.de&gt;</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/oxp-sensors.rst b/Documentation/hwmon/oxp-sensors.rst<br/>new file mode 100644<br/>index 000000000000..566a8d5bde08<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/oxp-sensors.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/oxp-sensors.rst</a></div><div class='hunk'>@@ -0,0 +1,49 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+Kernel driver oxp-sensors</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+Authors:</div><div class='add'>+    - Derek John Clark &lt;derekjohn.clark@gmail.com&gt;</div><div class='add'>+    - Joaquín Ignacio Aramendía &lt;samsagax@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+Description:</div><div class='add'>+------------</div><div class='add'>+</div><div class='add'>+Handheld devices from One Netbook and Aya Neo provide fan readings and fan</div><div class='add'>+control through their embedded controllers.</div><div class='add'>+</div><div class='add'>+Currently only supports AMD boards from One X Player, AOK ZOE, and some Aya</div><div class='add'>+Neo devices. One X Player Intel boards could be supported if we could figure</div><div class='add'>+out the EC registers and values to write to since the EC layout and model is</div><div class='add'>+different. Aya Neo devices preceding the AIR may not be supportable as the EC</div><div class='add'>+model is different and do not appear to have manual control capabilities.</div><div class='add'>+</div><div class='add'>+Supported devices</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Currently the driver supports the following handhelds:</div><div class='add'>+</div><div class='add'>+ - AOK ZOE A1</div><div class='add'>+ - Aya Neo AIR</div><div class='add'>+ - Aya Neo AIR Pro</div><div class='add'>+ - OneXPlayer AMD</div><div class='add'>+ - OneXPlayer mini AMD</div><div class='add'>+ - OneXPlayer mini AMD PRO</div><div class='add'>+</div><div class='add'>+Sysfs entries</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+The following attributes are supported:</div><div class='add'>+</div><div class='add'>+fan1_input</div><div class='add'>+  Read Only. Reads current fan RMP.</div><div class='add'>+</div><div class='add'>+pwm1_enable</div><div class='add'>+  Read Write. Enable manual fan control. Write "1" to set to manual, write "0"</div><div class='add'>+  to let the EC control de fan speed. Read this attribute to see current status.</div><div class='add'>+</div><div class='add'>+pwm1</div><div class='add'>+  Read Write. Read this attribute to see current duty cycle in the range [0-255].</div><div class='add'>+  When pwm1_enable is set to "1" (manual) write any value in the range [0-255]</div><div class='add'>+  to set fan speed.</div><div class='head'>diff --git a/Documentation/hwmon/pmbus-core.rst b/Documentation/hwmon/pmbus-core.rst<br/>index e7e0c9ef10be..cff93adf6e42 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/pmbus-core.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/pmbus-core.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/pmbus-core.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/pmbus-core.rst</a></div><div class='hunk'>@@ -121,6 +121,15 @@ Specifically, it provides the following information.</div><div class='ctx'>   non-standard PMBus commands to standard commands, or to augment standard</div><div class='ctx'>   command return values with device specific information.</div><div class='ctx'> </div><div class='add'>+PEC Support</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+Many PMBus devices support SMBus PEC (Packet Error Checking). If supported</div><div class='add'>+by both the I2C adapter and by the PMBus chip, it is by default enabled.</div><div class='add'>+If PEC is supported, the PMBus core driver adds an attribute named 'pec' to</div><div class='add'>+the I2C device. This attribute can be used to control PEC support in the</div><div class='add'>+communication with the PMBus chip.</div><div class='add'>+</div><div class='ctx'> API functions</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='hunk'>@@ -165,7 +174,7 @@ Read byte from page &lt;page&gt;, register &lt;reg&gt;.</div><div class='ctx'>   int (*read_word_data)(struct i2c_client *client, int page, int phase,</div><div class='ctx'>                         int reg);</div><div class='ctx'> </div><div class='del'>-Read word from page &lt;page&gt;, phase &lt;pase&gt;, register &lt;reg&gt;. If the chip does not</div><div class='add'>+Read word from page &lt;page&gt;, phase &lt;phase&gt;, register &lt;reg&gt;. If the chip does not</div><div class='ctx'> support multiple phases, the phase parameter can be ignored. If the chip</div><div class='ctx'> supports multiple phases, a phase value of 0xff indicates all phases.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/pwm-fan.rst b/Documentation/hwmon/pwm-fan.rst<br/>index 82fe96742fee..f77998b204ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/pwm-fan.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/pwm-fan.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/pwm-fan.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/pwm-fan.rst</a></div><div class='hunk'>@@ -18,3 +18,15 @@ the hwmon's sysfs interface.</div><div class='ctx'> </div><div class='ctx'> The fan rotation speed returned via the optional 'fan1_input' is extrapolated</div><div class='ctx'> from the sampled interrupts from the tachometer signal within 1 second.</div><div class='add'>+</div><div class='add'>+The driver provides the following sensor accesses in sysfs:</div><div class='add'>+</div><div class='add'>+=============== ======= =======================================================</div><div class='add'>+fan1_input	ro	fan tachometer speed in RPM</div><div class='add'>+pwm1_enable	rw	keep enable mode, defines behaviour when pwm1=0</div><div class='add'>+			0 -&gt; disable pwm and regulator</div><div class='add'>+			1 -&gt; enable pwm; if pwm==0, disable pwm, keep regulator enabled</div><div class='add'>+			2 -&gt; enable pwm; if pwm==0, keep pwm and regulator enabled</div><div class='add'>+			3 -&gt; enable pwm; if pwm==0, disable pwm and regulator</div><div class='add'>+pwm1		rw	relative speed (0-255), 255=max. speed.</div><div class='add'>+=============== ======= =======================================================</div><div class='head'>diff --git a/Documentation/hwmon/sfctemp.rst b/Documentation/hwmon/sfctemp.rst<br/>new file mode 100644<br/>index 000000000000..9fbd5bb1f356<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/sfctemp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/sfctemp.rst</a></div><div class='hunk'>@@ -0,0 +1,33 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Kernel driver sfctemp</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+ - StarFive JH7100</div><div class='add'>+ - StarFive JH7110</div><div class='add'>+</div><div class='add'>+Authors:</div><div class='add'>+ - Emil Renner Berthing &lt;kernel@esmil.dk&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver adds support for reading the built-in temperature sensor on the</div><div class='add'>+JH7100 and JH7110 RISC-V SoCs by StarFive Technology Co. Ltd.</div><div class='add'>+</div><div class='add'>+``sysfs`` interface</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+The temperature sensor can be enabled, disabled and queried via the standard</div><div class='add'>+hwmon interface in sysfs under ``/sys/class/hwmon/hwmonX`` for some value of</div><div class='add'>+``X``:</div><div class='add'>+</div><div class='add'>+================ ==== =============================================</div><div class='add'>+Name             Perm Description</div><div class='add'>+================ ==== =============================================</div><div class='add'>+temp1_enable     RW   Enable or disable temperature sensor.</div><div class='add'>+                      Automatically enabled by the driver,</div><div class='add'>+                      but may be disabled to save power.</div><div class='add'>+temp1_input      RO   Temperature reading in milli-degrees Celsius.</div><div class='add'>+================ ==== =============================================</div><div class='head'>diff --git a/Documentation/hwmon/sht4x.rst b/Documentation/hwmon/sht4x.rst<br/>index c318e5582ead..daf21e763425 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/sht4x.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/sht4x.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/sht4x.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/sht4x.rst</a></div><div class='hunk'>@@ -37,7 +37,7 @@ Sysfs entries</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='ctx'> =============== ============================================</div><div class='del'>-temp1_input     Measured temperature in millidegrees Celcius</div><div class='add'>+temp1_input     Measured temperature in millidegrees Celsius</div><div class='ctx'> humidity1_input Measured humidity in %H</div><div class='ctx'> update_interval The minimum interval for polling the sensor,</div><div class='ctx'>                 in milliseconds. Writable. Must be at least</div><div class='head'>diff --git a/Documentation/hwmon/smm665.rst b/Documentation/hwmon/smm665.rst<br/>index a0e27f62b57b..481e69d8bf39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/smm665.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/smm665.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/smm665.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/smm665.rst</a></div><div class='hunk'>@@ -180,7 +180,7 @@ in9_crit_alarm		AIN1 critical alarm</div><div class='ctx'> in10_crit_alarm		AIN2 critical alarm</div><div class='ctx'> </div><div class='ctx'> temp1_input		Chip temperature</div><div class='del'>-temp1_min		Mimimum chip temperature</div><div class='add'>+temp1_min		Minimum chip temperature</div><div class='ctx'> temp1_max		Maximum chip temperature</div><div class='ctx'> temp1_crit		Critical chip temperature</div><div class='ctx'> temp1_crit_alarm	Temperature critical alarm</div><div class='head'>diff --git a/Documentation/hwmon/smpro-hwmon.rst b/Documentation/hwmon/smpro-hwmon.rst<br/>new file mode 100644<br/>index 000000000000..fb7b3665735b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/smpro-hwmon.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/smpro-hwmon.rst</a></div><div class='hunk'>@@ -0,0 +1,102 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+Kernel driver Ampere(R)'s Altra(R) SMpro hwmon</div><div class='add'>+==============================================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * Ampere(R) Altra(R)</div><div class='add'>+</div><div class='add'>+    Prefix: ``smpro``</div><div class='add'>+</div><div class='add'>+    Reference: `Altra SoC BMC Interface Specification`</div><div class='add'>+</div><div class='add'>+Author: Thu Nguyen &lt;thu@os.amperecomputing.com&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+The smpro-hwmon driver supports hardware monitoring for Ampere(R) Altra(R)</div><div class='add'>+SoCs based on the SMpro co-processor (SMpro).  The following sensor metrics</div><div class='add'>+are supported by the driver:</div><div class='add'>+</div><div class='add'>+  * temperature</div><div class='add'>+  * voltage</div><div class='add'>+  * current</div><div class='add'>+  * power</div><div class='add'>+</div><div class='add'>+The interface provides the registers to query the various sensors and</div><div class='add'>+their values which are then exported to userspace by this driver.</div><div class='add'>+</div><div class='add'>+Usage Notes</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The driver creates at least two sysfs files for each sensor.</div><div class='add'>+</div><div class='add'>+* ``&lt;sensor_type&gt;&lt;idx&gt;_label`` reports the sensor label.</div><div class='add'>+* ``&lt;sensor_type&gt;&lt;idx&gt;_input`` returns the sensor value.</div><div class='add'>+</div><div class='add'>+The sysfs files are allocated in the SMpro rootfs folder, with one root</div><div class='add'>+directory for each instance.</div><div class='add'>+</div><div class='add'>+When the SoC is turned off, the driver will fail to read registers and</div><div class='add'>+return ``-ENXIO``.</div><div class='add'>+</div><div class='add'>+Sysfs entries</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+The following sysfs files are supported:</div><div class='add'>+</div><div class='add'>+* Ampere(R) Altra(R):</div><div class='add'>+</div><div class='add'>+  ============    =============  ======  ===============================================</div><div class='add'>+  Name            Unit           Perm    Description</div><div class='add'>+  ============    =============  ======  ===============================================</div><div class='add'>+  temp1_input     millicelsius   RO      SoC temperature</div><div class='add'>+  temp2_input     millicelsius   RO      Max temperature reported among SoC VRDs</div><div class='add'>+  temp2_crit      millicelsius   RO      SoC VRD HOT Threshold temperature</div><div class='add'>+  temp3_input     millicelsius   RO      Max temperature reported among DIMM VRDs</div><div class='add'>+  temp4_input     millicelsius   RO      Max temperature reported among Core VRDs</div><div class='add'>+  temp5_input     millicelsius   RO      Temperature of DIMM0 on CH0</div><div class='add'>+  temp5_crit      millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp6_input     millicelsius   RO      Temperature of DIMM0 on CH1</div><div class='add'>+  temp6_crit      millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp7_input     millicelsius   RO      Temperature of DIMM0 on CH2</div><div class='add'>+  temp7_crit      millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp8_input     millicelsius   RO      Temperature of DIMM0 on CH3</div><div class='add'>+  temp8_crit      millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp9_input     millicelsius   RO      Temperature of DIMM0 on CH4</div><div class='add'>+  temp9_crit      millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp10_input    millicelsius   RO      Temperature of DIMM0 on CH5</div><div class='add'>+  temp10_crit     millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp11_input    millicelsius   RO      Temperature of DIMM0 on CH6</div><div class='add'>+  temp11_crit     millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp12_input    millicelsius   RO      Temperature of DIMM0 on CH7</div><div class='add'>+  temp12_crit     millicelsius   RO      MEM HOT Threshold for all DIMMs</div><div class='add'>+  temp13_input    millicelsius   RO      Max temperature reported among RCA VRDs</div><div class='add'>+  in0_input       millivolts     RO      Core voltage</div><div class='add'>+  in1_input       millivolts     RO      SoC voltage</div><div class='add'>+  in2_input       millivolts     RO      DIMM VRD1 voltage</div><div class='add'>+  in3_input       millivolts     RO      DIMM VRD2 voltage</div><div class='add'>+  in4_input       millivolts     RO      RCA VRD voltage</div><div class='add'>+  cur1_input      milliamperes   RO      Core VRD current</div><div class='add'>+  cur2_input      milliamperes   RO      SoC VRD current</div><div class='add'>+  cur3_input      milliamperes   RO      DIMM VRD1 current</div><div class='add'>+  cur4_input      milliamperes   RO      DIMM VRD2 current</div><div class='add'>+  cur5_input      milliamperes   RO      RCA VRD current</div><div class='add'>+  power1_input    microwatts     RO      Core VRD power</div><div class='add'>+  power2_input    microwatts     RO      SoC VRD power</div><div class='add'>+  power3_input    microwatts     RO      DIMM VRD1 power</div><div class='add'>+  power4_input    microwatts     RO      DIMM VRD2 power</div><div class='add'>+  power5_input    microwatts     RO      RCA VRD power</div><div class='add'>+  ============    =============  ======  ===============================================</div><div class='add'>+</div><div class='add'>+  Example::</div><div class='add'>+</div><div class='add'>+    # cat in0_input</div><div class='add'>+    830</div><div class='add'>+    # cat temp1_input</div><div class='add'>+    37000</div><div class='add'>+    # cat curr1_input</div><div class='add'>+    9000</div><div class='add'>+    # cat power5_input</div><div class='add'>+    19500000</div><div class='head'>diff --git a/Documentation/hwmon/stpddc60.rst b/Documentation/hwmon/stpddc60.rst<br/>index 7f7ce7f7871b..0c31f78fe58b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/stpddc60.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/stpddc60.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/stpddc60.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/stpddc60.rst</a></div><div class='hunk'>@@ -39,7 +39,7 @@ output voltage as a positive or negative offset in the interval 50mV to 400mV</div><div class='ctx'> in 50mV steps. This means that the absolute values of the limits will change</div><div class='ctx'> when the commanded output voltage changes. Also, care should be taken when</div><div class='ctx'> writing to those limits since in the worst case the commanded output voltage</div><div class='del'>-could change at the same time as the limit is written to, wich will lead to</div><div class='add'>+could change at the same time as the limit is written to, which will lead to</div><div class='ctx'> unpredictable results.</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/hwmon/submitting-patches.rst b/Documentation/hwmon/submitting-patches.rst<br/>index 9a218ea996d8..6482c4f137dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/submitting-patches.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/submitting-patches.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/submitting-patches.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/submitting-patches.rst</a></div><div class='hunk'>@@ -12,7 +12,6 @@ increase the chances of your change being accepted.</div><div class='ctx'> * It should be unnecessary to mention, but please read and follow:</div><div class='ctx'> </div><div class='ctx'>     - Documentation/process/submit-checklist.rst</div><div class='del'>-    - Documentation/process/submitting-drivers.rst</div><div class='ctx'>     - Documentation/process/submitting-patches.rst</div><div class='ctx'>     - Documentation/process/coding-style.rst</div><div class='ctx'> </div><div class='hunk'>@@ -127,7 +126,7 @@ increase the chances of your change being accepted.</div><div class='ctx'> * Use devm_hwmon_device_register_with_info() or, if your driver needs a remove</div><div class='ctx'>   function, hwmon_device_register_with_info() to register your driver with the</div><div class='ctx'>   hwmon subsystem. Try using devm_add_action() instead of a remove function if</div><div class='del'>-  possible. Do not use hwmon_device_register().</div><div class='add'>+  possible. Do not use any of the deprecated registration functions.</div><div class='ctx'> </div><div class='ctx'> * Your driver should be buildable as module. If not, please be prepared to</div><div class='ctx'>   explain why it has to be built into the kernel.</div><div class='head'>diff --git a/Documentation/hwmon/sysfs-interface.rst b/Documentation/hwmon/sysfs-interface.rst<br/>index 209626fb2405..f76e9f8cc1ad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/sysfs-interface.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/sysfs-interface.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/sysfs-interface.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/sysfs-interface.rst</a></div><div class='hunk'>@@ -201,7 +201,7 @@ PWM</div><div class='ctx'> 		Pulse width modulation fan control.</div><div class='ctx'> </div><div class='ctx'> `pwm[1-*]_enable`</div><div class='del'>-		Fan speed control method:</div><div class='add'>+		Fan speed control method.</div><div class='ctx'> </div><div class='ctx'> `pwm[1-*]_mode`</div><div class='ctx'> 		direct current or pulse-width modulation.</div><div class='head'>diff --git a/Documentation/hwmon/tps546d24.rst b/Documentation/hwmon/tps546d24.rst<br/>new file mode 100644<br/>index 000000000000..97adb8a30fc0<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/tps546d24.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/tps546d24.rst</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+Kernel driver tps546d24</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * TI TPS546D24</div><div class='add'>+</div><div class='add'>+    Prefix: 'tps546d24'</div><div class='add'>+</div><div class='add'>+    Addresses scanned: -</div><div class='add'>+</div><div class='add'>+    Datasheet: https://www.ti.com/lit/gpn/tps546d24</div><div class='add'>+</div><div class='add'>+Author: Duke Du &lt;dukedu83@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The TPS546D24A is a highly integrated, non-isolated DC/DC converter capable</div><div class='add'>+of high frequency operation and 40-A current output from a 7-mm x 5-mm</div><div class='add'>+package.</div><div class='add'>+</div><div class='add'>+Two, three, and four TPS546D24A devices can be interconnected</div><div class='add'>+to provide up to 160 A on a single output. The device has an option to</div><div class='add'>+overdrive the internal 5-V LDO with an external 5-V supply via the VDD5</div><div class='add'>+pin to improve efficiency and reduce power dissipation of the converter.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Platform data support</div><div class='add'>+---------------------</div><div class='add'>+</div><div class='add'>+The driver supports standard PMBus driver platform data.</div><div class='head'>diff --git a/Documentation/hwmon/vexpress.rst b/Documentation/hwmon/vexpress.rst<br/>index 8c861c8151ac..7fc99f75b3b1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/vexpress.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/vexpress.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/vexpress.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/vexpress.rst</a></div><div class='hunk'>@@ -27,7 +27,7 @@ Versatile Express platform (http://www.arm.com/versatileexpress/) is a</div><div class='ctx'> reference &amp; prototyping system for ARM Ltd. processors. It can be set up</div><div class='ctx'> from a wide range of boards, each of them containing (apart of the main</div><div class='ctx'> chip/FPGA) a number of microcontrollers responsible for platform</div><div class='del'>-configuration and control. Theses microcontrollers can also monitor the</div><div class='add'>+configuration and control. These microcontrollers can also monitor the</div><div class='ctx'> board and its environment by a number of internal and external sensors,</div><div class='ctx'> providing information about power lines voltages and currents, board</div><div class='ctx'> temperature and power usage. Some of them also calculate consumed energy</div><div class='head'>diff --git a/Documentation/hwmon/via686a.rst b/Documentation/hwmon/via686a.rst<br/>index 7ab9ddebcf79..8c52a9207bcb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/via686a.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/hwmon/via686a.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/via686a.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/via686a.rst</a></div><div class='hunk'>@@ -58,7 +58,7 @@ representable value is around 2600 RPM.</div><div class='ctx'> </div><div class='ctx'> Voltage sensors (also known as IN sensors) report their values in volts.</div><div class='ctx'> An alarm is triggered if the voltage has crossed a programmable minimum</div><div class='del'>-or maximum limit. Voltages are internally scalled, so each voltage channel</div><div class='add'>+or maximum limit. Voltages are internally scaled, so each voltage channel</div><div class='ctx'> has a different resolution and range.</div><div class='ctx'> </div><div class='ctx'> If an alarm triggers, it will remain triggered until the hardware register</div><div class='head'>diff --git a/Documentation/hwmon/xdpe152c4.rst b/Documentation/hwmon/xdpe152c4.rst<br/>new file mode 100644<br/>index 000000000000..ab92c32d4d69<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/hwmon/xdpe152c4.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/hwmon/xdpe152c4.rst</a></div><div class='hunk'>@@ -0,0 +1,118 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+Kernel driver xdpe152</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Supported chips:</div><div class='add'>+</div><div class='add'>+  * Infineon XDPE152C4</div><div class='add'>+</div><div class='add'>+    Prefix: 'xdpe152c4'</div><div class='add'>+</div><div class='add'>+  * Infineon XDPE15284</div><div class='add'>+</div><div class='add'>+    Prefix: 'xdpe15284'</div><div class='add'>+</div><div class='add'>+Authors:</div><div class='add'>+</div><div class='add'>+    Greg Schwendimann &lt;greg.schwendimann@infineon.com&gt;</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver implements support for Infineon Digital Multi-phase Controller</div><div class='add'>+XDPE152C4 and XDPE15284 dual loop voltage regulators.</div><div class='add'>+The devices are compliant with:</div><div class='add'>+</div><div class='add'>+- Intel VR13, VR13HC and VR14 rev 1.86</div><div class='add'>+  converter specification.</div><div class='add'>+- Intel SVID rev 1.93. protocol.</div><div class='add'>+- PMBus rev 1.3.1 interface.</div><div class='add'>+</div><div class='add'>+Devices support linear format for reading input and output voltage, input</div><div class='add'>+and output current, input and output power and temperature.</div><div class='add'>+</div><div class='add'>+Devices support two pages for telemetry.</div><div class='add'>+</div><div class='add'>+The driver provides for current: input, maximum and critical thresholds</div><div class='add'>+and maximum and critical alarms. Low Critical thresholds and Low critical alarm are</div><div class='add'>+supported only for current output.</div><div class='add'>+The driver exports the following attributes for via the sysfs files, where</div><div class='add'>+indexes 1, 2 are for "iin" and 3, 4 for "iout":</div><div class='add'>+</div><div class='add'>+**curr[1-4]_crit**</div><div class='add'>+</div><div class='add'>+**curr[1-4]_crit_alarm**</div><div class='add'>+</div><div class='add'>+**curr[1-4]_input**</div><div class='add'>+</div><div class='add'>+**curr[1-4]_label**</div><div class='add'>+</div><div class='add'>+**curr[1-4]_max**</div><div class='add'>+</div><div class='add'>+**curr[1-4]_max_alarm**</div><div class='add'>+</div><div class='add'>+**curr[3-4]_lcrit**</div><div class='add'>+</div><div class='add'>+**curr[3-4]_lcrit_alarm**</div><div class='add'>+</div><div class='add'>+**curr[3-4]_rated_max**</div><div class='add'>+</div><div class='add'>+The driver provides for voltage: input, critical and low critical thresholds</div><div class='add'>+and critical and low critical alarms.</div><div class='add'>+The driver exports the following attributes for via the sysfs files, where</div><div class='add'>+indexes 1, 2 are for "vin" and 3, 4 for "vout":</div><div class='add'>+</div><div class='add'>+**in[1-4]_min**</div><div class='add'>+</div><div class='add'>+**in[1-4]_crit**</div><div class='add'>+</div><div class='add'>+**in[1-4_crit_alarm**</div><div class='add'>+</div><div class='add'>+**in[1-4]_input**</div><div class='add'>+</div><div class='add'>+**in[1-4]_label**</div><div class='add'>+</div><div class='add'>+**in[1-4]_max**</div><div class='add'>+</div><div class='add'>+**in[1-4]_max_alarm**</div><div class='add'>+</div><div class='add'>+**in[1-4]_min**</div><div class='add'>+</div><div class='add'>+**in[1-4]_min_alarm**</div><div class='add'>+</div><div class='add'>+**in[3-4]_lcrit**</div><div class='add'>+</div><div class='add'>+**in[3-4]_lcrit_alarm**</div><div class='add'>+</div><div class='add'>+**in[3-4]_rated_max**</div><div class='add'>+</div><div class='add'>+**in[3-4]_rated_min**</div><div class='add'>+</div><div class='add'>+The driver provides for power: input and alarms.</div><div class='add'>+The driver exports the following attributes for via the sysfs files, where</div><div class='add'>+indexes 1, 2 are for "pin" and 3, 4 for "pout":</div><div class='add'>+</div><div class='add'>+**power[1-2]_alarm**</div><div class='add'>+</div><div class='add'>+**power[1-4]_input**</div><div class='add'>+</div><div class='add'>+**power[1-4]_label**</div><div class='add'>+</div><div class='add'>+**power[1-4]_max**</div><div class='add'>+</div><div class='add'>+**power[1-4]_rated_max**</div><div class='add'>+</div><div class='add'>+The driver provides for temperature: input, maximum and critical thresholds</div><div class='add'>+and maximum and critical alarms.</div><div class='add'>+The driver exports the following attributes for via the sysfs files:</div><div class='add'>+</div><div class='add'>+**temp[1-2]_crit**</div><div class='add'>+</div><div class='add'>+**temp[1-2]_crit_alarm**</div><div class='add'>+</div><div class='add'>+**temp[1-2]_input**</div><div class='add'>+</div><div class='add'>+**temp[1-2]_max**</div><div class='add'>+</div><div class='add'>+**temp[1-2]_max_alarm**</div><div class='head'>diff --git a/Documentation/i2c/busses/i2c-i801.rst b/Documentation/i2c/busses/i2c-i801.rst<br/>index cad59170b2ad..ab9e850e8fe0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/busses/i2c-i801.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/busses/i2c-i801.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/busses/i2c-i801.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/busses/i2c-i801.rst</a></div><div class='hunk'>@@ -46,6 +46,7 @@ Supported adapters:</div><div class='ctx'>   * Intel Emmitsburg (PCH)</div><div class='ctx'>   * Intel Alder Lake (PCH)</div><div class='ctx'>   * Intel Raptor Lake (PCH)</div><div class='add'>+  * Intel Meteor Lake (SOC)</div><div class='ctx'> </div><div class='ctx'>    Datasheets: Publicly available at the Intel website</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/i2c/busses/i2c-piix4.rst b/Documentation/i2c/busses/i2c-piix4.rst<br/>index cc9000259223..07fe6f6f4b18 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/busses/i2c-piix4.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/busses/i2c-piix4.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/busses/i2c-piix4.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/busses/i2c-piix4.rst</a></div><div class='hunk'>@@ -64,7 +64,7 @@ correct address for this module, you could get in big trouble (read:</div><div class='ctx'> crashes, data corruption, etc.). Try this only as a last resort (try BIOS</div><div class='ctx'> updates first, for example), and backup first! An even more dangerous</div><div class='ctx'> option is 'force_addr=&lt;IOPORT&gt;'. This will not only enable the PIIX4 like</div><div class='del'>-'force' foes, but it will also set a new base I/O port address. The SMBus</div><div class='add'>+'force' does, but it will also set a new base I/O port address. The SMBus</div><div class='ctx'> parts of the PIIX4 needs a range of 8 of these addresses to function</div><div class='ctx'> correctly. If these addresses are already reserved by some other device,</div><div class='ctx'> you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE</div><div class='hunk'>@@ -86,15 +86,15 @@ If you own Force CPCI735 motherboard or other OSB4 based systems you may need</div><div class='ctx'> to change the SMBus Interrupt Select register so the SMBus controller uses</div><div class='ctx'> the SMI mode.</div><div class='ctx'> </div><div class='del'>-1) Use lspci command and locate the PCI device with the SMBus controller:</div><div class='add'>+1) Use ``lspci`` command and locate the PCI device with the SMBus controller:</div><div class='ctx'>    00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)</div><div class='ctx'>    The line may vary for different chipsets. Please consult the driver source</div><div class='del'>-   for all possible PCI ids (and lspci -n to match them). Lets assume the</div><div class='add'>+   for all possible PCI ids (and ``lspci -n`` to match them). Let's assume the</div><div class='ctx'>    device is located at 00:0f.0.</div><div class='ctx'> 2) Now you just need to change the value in 0xD2 register. Get it first with</div><div class='del'>-   command: lspci -xxx -s 00:0f.0</div><div class='add'>+   command: ``lspci -xxx -s 00:0f.0``</div><div class='ctx'>    If the value is 0x3 then you need to change it to 0x1:</div><div class='del'>-   setpci  -s 00:0f.0 d2.b=1</div><div class='add'>+   ``setpci  -s 00:0f.0 d2.b=1``</div><div class='ctx'> </div><div class='ctx'> Please note that you don't need to do that in all cases, just when the SMBus is</div><div class='ctx'> not working properly.</div><div class='hunk'>@@ -109,6 +109,3 @@ which can easily get corrupted due to a state machine bug. These are mostly</div><div class='ctx'> Thinkpad laptops, but desktop systems may also be affected. We have no list</div><div class='ctx'> of all affected systems, so the only safe solution was to prevent access to</div><div class='ctx'> the SMBus on all IBM systems (detected using DMI data.)</div><div class='del'>-</div><div class='del'>-For additional information, read:</div><div class='del'>-http://www.lm-sensors.org/browser/lm-sensors/trunk/README</div><div class='head'>diff --git a/Documentation/i2c/dev-interface.rst b/Documentation/i2c/dev-interface.rst<br/>index 73ad34849f99..c277a8e1202b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/dev-interface.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/dev-interface.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/dev-interface.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/dev-interface.rst</a></div><div class='hunk'>@@ -148,7 +148,7 @@ You can do plain I2C transactions by using read(2) and write(2) calls.</div><div class='ctx'> You do not need to pass the address byte; instead, set it through</div><div class='ctx'> ioctl I2C_SLAVE before you try to access the device.</div><div class='ctx'> </div><div class='del'>-You can do SMBus level transactions (see documentation file smbus-protocol</div><div class='add'>+You can do SMBus level transactions (see documentation file smbus-protocol.rst</div><div class='ctx'> for details) through the following functions::</div><div class='ctx'> </div><div class='ctx'>   __s32 i2c_smbus_write_quick(int file, __u8 value);</div><div class='head'>diff --git a/Documentation/i2c/gpio-fault-injection.rst b/Documentation/i2c/gpio-fault-injection.rst<br/>index 9dca6ec7d266..91d23889abd5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/gpio-fault-injection.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/gpio-fault-injection.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/gpio-fault-injection.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/gpio-fault-injection.rst</a></div><div class='hunk'>@@ -93,7 +93,7 @@ bus arbitration against another master in a multi-master setup.</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='ctx'> This file is write only and you need to write the duration of the arbitration</div><div class='del'>-intereference (in µs, maximum is 100ms). The calling process will then sleep</div><div class='add'>+interference (in µs, maximum is 100ms). The calling process will then sleep</div><div class='ctx'> and wait for the next bus clock. The process is interruptible, though.</div><div class='ctx'> </div><div class='ctx'> Arbitration lost is achieved by waiting for SCL going down by the master under</div><div class='head'>diff --git a/Documentation/i2c/i2c-protocol.rst b/Documentation/i2c/i2c-protocol.rst<br/>index b2092f8f815d..df0febfe6410 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/i2c-protocol.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/i2c-protocol.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/i2c-protocol.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/i2c-protocol.rst</a></div><div class='hunk'>@@ -2,7 +2,8 @@</div><div class='ctx'> The I2C Protocol</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='del'>-This document describes the I2C protocol. Or will, when it is finished :-)</div><div class='add'>+This document is an overview of the basic I2C transactions and the kernel</div><div class='add'>+APIs to perform them.</div><div class='ctx'> </div><div class='ctx'> Key to symbols</div><div class='ctx'> ==============</div><div class='hunk'>@@ -12,13 +13,9 @@ S               Start condition</div><div class='ctx'> P               Stop condition</div><div class='ctx'> Rd/Wr (1 bit)   Read/Write bit. Rd equals 1, Wr equals 0.</div><div class='ctx'> A, NA (1 bit)   Acknowledge (ACK) and Not Acknowledge (NACK) bit</div><div class='del'>-Addr  (7 bits)  I2C 7 bit address. Note that this can be expanded as usual to</div><div class='add'>+Addr  (7 bits)  I2C 7 bit address. Note that this can be expanded to</div><div class='ctx'>                 get a 10 bit I2C address.</div><div class='del'>-Comm  (8 bits)  Command byte, a data byte which often selects a register on</div><div class='del'>-                the device.</div><div class='del'>-Data  (8 bits)  A plain data byte. Sometimes, I write DataLow, DataHigh</div><div class='del'>-                for 16 bit data.</div><div class='del'>-Count (8 bits)  A data byte containing the length of a block operation.</div><div class='add'>+Data  (8 bits)  A plain data byte.</div><div class='ctx'> </div><div class='ctx'> [..]            Data sent by I2C device, as opposed to data sent by the</div><div class='ctx'>                 host adapter.</div><div class='head'>diff --git a/Documentation/i2c/i2c-sysfs.rst b/Documentation/i2c/i2c-sysfs.rst<br/>index 6b68b95cd427..78c54c658fa1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/i2c-sysfs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/i2c-sysfs.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/i2c-sysfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/i2c-sysfs.rst</a></div><div class='hunk'>@@ -51,11 +51,10 @@ Google Pixel 3 phone for example::</div><div class='ctx'> ``i2c-2`` is an I2C bus whose number is 2, and ``2-0049`` is an I2C device</div><div class='ctx'> on bus 2 address 0x49 bound with a kernel driver.</div><div class='ctx'> </div><div class='del'>-Terminologies</div><div class='del'>-=============</div><div class='add'>+Terminology</div><div class='add'>+===========</div><div class='ctx'> </div><div class='del'>-First, let us define a couple of terminologies to avoid confusions in the later</div><div class='del'>-sections.</div><div class='add'>+First, let us define some terms to avoid confusion in later sections.</div><div class='ctx'> </div><div class='ctx'> (Physical) I2C Bus Controller</div><div class='ctx'> -----------------------------</div><div class='hunk'>@@ -100,9 +99,7 @@ Caveat</div><div class='ctx'> This may be a confusing part for people who only know about the physical I2C</div><div class='ctx'> design of a board. It is actually possible to rename the I2C bus physical number</div><div class='ctx'> to a different number in logical I2C bus level in Device Tree Source (DTS) under</div><div class='del'>-section ``aliases``. See</div><div class='del'>-`arch/arm/boot/dts/nuvoton-npcm730-gsj.dts</div><div class='del'>-&lt;../../arch/arm/boot/dts/nuvoton-npcm730-gsj.dts&gt;`_</div><div class='add'>+section ``aliases``. See ``arch/arm/boot/dts/nuvoton-npcm730-gsj.dts``</div><div class='ctx'> for an example of DTS file.</div><div class='ctx'> </div><div class='ctx'> Best Practice: **(To kernel software developers)** It is better to keep the I2C</div><div class='hunk'>@@ -117,7 +114,7 @@ Walk through Logical I2C Bus</div><div class='ctx'> </div><div class='ctx'> For the following content, we will use a more complex I2C topology as an</div><div class='ctx'> example. Here is a brief graph for the I2C topology. If you do not understand</div><div class='del'>-this graph at the first glance, do not be afraid to continue reading this doc</div><div class='add'>+this graph at first glance, do not be afraid to continue reading this doc</div><div class='ctx'> and review it when you finish reading.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='hunk'>@@ -290,8 +287,7 @@ MUX channel 0, and all the way to ``i2c-19`` for the MUX channel 3.</div><div class='ctx'> The kernel software developer is able to pin the fanout MUX channels to a static</div><div class='ctx'> logical I2C bus number in the DTS. This doc will not go through the details on</div><div class='ctx'> how to implement this in DTS, but we can see an example in:</div><div class='del'>-`arch/arm/boot/dts/aspeed-bmc-facebook-wedge400.dts</div><div class='del'>-&lt;../../arch/arm/boot/dts/aspeed-bmc-facebook-wedge400.dts&gt;`_</div><div class='add'>+``arch/arm/boot/dts/aspeed-bmc-facebook-wedge400.dts``</div><div class='ctx'> </div><div class='ctx'> In the above example, there is an 8-channel I2C MUX at address 0x70 on physical</div><div class='ctx'> I2C bus 2. The channel 2 of the MUX is defined as ``imux18`` in DTS,</div><div class='hunk'>@@ -383,13 +379,9 @@ Sysfs for the I2C sensor device::</div><div class='ctx'> </div><div class='ctx'> For more info on the Hwmon Sysfs, refer to the doc:</div><div class='ctx'> </div><div class='del'>-`Naming and data format standards for sysfs files</div><div class='del'>-&lt;../hwmon/sysfs-interface.rst&gt;`_</div><div class='add'>+../hwmon/sysfs-interface.rst</div><div class='ctx'> </div><div class='ctx'> Instantiate I2C Devices in I2C Sysfs</div><div class='ctx'> ------------------------------------</div><div class='ctx'> </div><div class='del'>-Refer to the doc:</div><div class='del'>-</div><div class='del'>-`How to instantiate I2C devices, Method 4: Instantiate from user-space</div><div class='del'>-&lt;instantiating-devices.rst#method-4-instantiate-from-user-space&gt;`_</div><div class='add'>+Refer to section "Method 4: Instantiate from user-space" of instantiating-devices.rst</div><div class='head'>diff --git a/Documentation/i2c/i2c-topology.rst b/Documentation/i2c/i2c-topology.rst<br/>index 7cb53819778e..48fce0f7491b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/i2c-topology.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/i2c-topology.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/i2c-topology.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/i2c-topology.rst</a></div><div class='hunk'>@@ -5,6 +5,8 @@ I2C muxes and complex topologies</div><div class='ctx'> There are a couple of reasons for building more complex I2C topologies</div><div class='ctx'> than a straight-forward I2C bus with one adapter and one or more devices.</div><div class='ctx'> </div><div class='add'>+Some example use cases are:</div><div class='add'>+</div><div class='ctx'> 1. A mux may be needed on the bus to prevent address collisions.</div><div class='ctx'> </div><div class='ctx'> 2. The bus may be accessible from some external bus master, and arbitration</div><div class='hunk'>@@ -14,10 +16,10 @@ than a straight-forward I2C bus with one adapter and one or more devices.</div><div class='ctx'>    from the I2C bus, at least most of the time, and sits behind a gate</div><div class='ctx'>    that has to be operated before the device can be accessed.</div><div class='ctx'> </div><div class='del'>-Etc</div><div class='del'>-===</div><div class='add'>+Several types of hardware components such as I2C muxes, I2C gates and I2C</div><div class='add'>+arbitrators allow to handle such needs.</div><div class='ctx'> </div><div class='del'>-These constructs are represented as I2C adapter trees by Linux, where</div><div class='add'>+These components are represented as I2C adapter trees by Linux, where</div><div class='ctx'> each adapter has a parent adapter (except the root adapter) and zero or</div><div class='ctx'> more child adapters. The root adapter is the actual adapter that issues</div><div class='ctx'> I2C transfers, and all adapters with a parent are part of an "i2c-mux"</div><div class='hunk'>@@ -35,46 +37,7 @@ Locking</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='ctx'> There are two variants of locking available to I2C muxes, they can be</div><div class='del'>-mux-locked or parent-locked muxes. As is evident from below, it can be</div><div class='del'>-useful to know if a mux is mux-locked or if it is parent-locked. The</div><div class='del'>-following list was correct at the time of writing:</div><div class='del'>-</div><div class='del'>-In drivers/i2c/muxes/:</div><div class='del'>-</div><div class='del'>-======================    =============================================</div><div class='del'>-i2c-arb-gpio-challenge    Parent-locked</div><div class='del'>-i2c-mux-gpio              Normally parent-locked, mux-locked iff</div><div class='del'>-                          all involved gpio pins are controlled by the</div><div class='del'>-                          same I2C root adapter that they mux.</div><div class='del'>-i2c-mux-gpmux             Normally parent-locked, mux-locked iff</div><div class='del'>-                          specified in device-tree.</div><div class='del'>-i2c-mux-ltc4306           Mux-locked</div><div class='del'>-i2c-mux-mlxcpld           Parent-locked</div><div class='del'>-i2c-mux-pca9541           Parent-locked</div><div class='del'>-i2c-mux-pca954x           Parent-locked</div><div class='del'>-i2c-mux-pinctrl           Normally parent-locked, mux-locked iff</div><div class='del'>-                          all involved pinctrl devices are controlled</div><div class='del'>-                          by the same I2C root adapter that they mux.</div><div class='del'>-i2c-mux-reg               Parent-locked</div><div class='del'>-======================    =============================================</div><div class='del'>-</div><div class='del'>-In drivers/iio/:</div><div class='del'>-</div><div class='del'>-======================    =============================================</div><div class='del'>-gyro/mpu3050              Mux-locked</div><div class='del'>-imu/inv_mpu6050/          Mux-locked</div><div class='del'>-======================    =============================================</div><div class='del'>-</div><div class='del'>-In drivers/media/:</div><div class='del'>-</div><div class='del'>-=======================   =============================================</div><div class='del'>-dvb-frontends/lgdt3306a   Mux-locked</div><div class='del'>-dvb-frontends/m88ds3103   Parent-locked</div><div class='del'>-dvb-frontends/rtl2830     Parent-locked</div><div class='del'>-dvb-frontends/rtl2832     Mux-locked</div><div class='del'>-dvb-frontends/si2168      Mux-locked</div><div class='del'>-usb/cx231xx/              Parent-locked</div><div class='del'>-=======================   =============================================</div><div class='add'>+mux-locked or parent-locked muxes.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Mux-locked muxes</div><div class='hunk'>@@ -89,40 +52,8 @@ full transaction, unrelated I2C transfers may interleave the different</div><div class='ctx'> stages of the transaction. This has the benefit that the mux driver</div><div class='ctx'> may be easier and cleaner to implement, but it has some caveats.</div><div class='ctx'> </div><div class='del'>-==== =====================================================================</div><div class='del'>-ML1. If you build a topology with a mux-locked mux being the parent</div><div class='del'>-     of a parent-locked mux, this might break the expectation from the</div><div class='del'>-     parent-locked mux that the root adapter is locked during the</div><div class='del'>-     transaction.</div><div class='del'>-</div><div class='del'>-ML2. It is not safe to build arbitrary topologies with two (or more)</div><div class='del'>-     mux-locked muxes that are not siblings, when there are address</div><div class='del'>-     collisions between the devices on the child adapters of these</div><div class='del'>-     non-sibling muxes.</div><div class='del'>-</div><div class='del'>-     I.e. the select-transfer-deselect transaction targeting e.g. device</div><div class='del'>-     address 0x42 behind mux-one may be interleaved with a similar</div><div class='del'>-     operation targeting device address 0x42 behind mux-two. The</div><div class='del'>-     intension with such a topology would in this hypothetical example</div><div class='del'>-     be that mux-one and mux-two should not be selected simultaneously,</div><div class='del'>-     but mux-locked muxes do not guarantee that in all topologies.</div><div class='del'>-</div><div class='del'>-ML3. A mux-locked mux cannot be used by a driver for auto-closing</div><div class='del'>-     gates/muxes, i.e. something that closes automatically after a given</div><div class='del'>-     number (one, in most cases) of I2C transfers. Unrelated I2C transfers</div><div class='del'>-     may creep in and close prematurely.</div><div class='del'>-</div><div class='del'>-ML4. If any non-I2C operation in the mux driver changes the I2C mux state,</div><div class='del'>-     the driver has to lock the root adapter during that operation.</div><div class='del'>-     Otherwise garbage may appear on the bus as seen from devices</div><div class='del'>-     behind the mux, when an unrelated I2C transfer is in flight during</div><div class='del'>-     the non-I2C mux-changing operation.</div><div class='del'>-==== =====================================================================</div><div class='del'>-</div><div class='del'>-</div><div class='ctx'> Mux-locked Example</div><div class='del'>-------------------</div><div class='del'>-</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='hunk'>@@ -153,6 +84,43 @@ This means that accesses to D2 are lockout out for the full duration</div><div class='ctx'> of the entire operation. But accesses to D3 are possibly interleaved</div><div class='ctx'> at any point.</div><div class='ctx'> </div><div class='add'>+Mux-locked caveats</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+When using a mux-locked mux, be aware of the following restrictions:</div><div class='add'>+</div><div class='add'>+[ML1]</div><div class='add'>+  If you build a topology with a mux-locked mux being the parent</div><div class='add'>+  of a parent-locked mux, this might break the expectation from the</div><div class='add'>+  parent-locked mux that the root adapter is locked during the</div><div class='add'>+  transaction.</div><div class='add'>+</div><div class='add'>+[ML2]</div><div class='add'>+  It is not safe to build arbitrary topologies with two (or more)</div><div class='add'>+  mux-locked muxes that are not siblings, when there are address</div><div class='add'>+  collisions between the devices on the child adapters of these</div><div class='add'>+  non-sibling muxes.</div><div class='add'>+</div><div class='add'>+  I.e. the select-transfer-deselect transaction targeting e.g. device</div><div class='add'>+  address 0x42 behind mux-one may be interleaved with a similar</div><div class='add'>+  operation targeting device address 0x42 behind mux-two. The</div><div class='add'>+  intent with such a topology would in this hypothetical example</div><div class='add'>+  be that mux-one and mux-two should not be selected simultaneously,</div><div class='add'>+  but mux-locked muxes do not guarantee that in all topologies.</div><div class='add'>+</div><div class='add'>+[ML3]</div><div class='add'>+  A mux-locked mux cannot be used by a driver for auto-closing</div><div class='add'>+  gates/muxes, i.e. something that closes automatically after a given</div><div class='add'>+  number (one, in most cases) of I2C transfers. Unrelated I2C transfers</div><div class='add'>+  may creep in and close prematurely.</div><div class='add'>+</div><div class='add'>+[ML4]</div><div class='add'>+  If any non-I2C operation in the mux driver changes the I2C mux state,</div><div class='add'>+  the driver has to lock the root adapter during that operation.</div><div class='add'>+  Otherwise garbage may appear on the bus as seen from devices</div><div class='add'>+  behind the mux, when an unrelated I2C transfer is in flight during</div><div class='add'>+  the non-I2C mux-changing operation.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Parent-locked muxes</div><div class='ctx'> -------------------</div><div class='hunk'>@@ -161,28 +129,10 @@ Parent-locked muxes lock the parent adapter during the full select-</div><div class='ctx'> transfer-deselect transaction. The implication is that the mux driver</div><div class='ctx'> has to ensure that any and all I2C transfers through that parent</div><div class='ctx'> adapter during the transaction are unlocked I2C transfers (using e.g.</div><div class='del'>-__i2c_transfer), or a deadlock will follow. There are a couple of</div><div class='del'>-caveats.</div><div class='del'>-</div><div class='del'>-==== ====================================================================</div><div class='del'>-PL1. If you build a topology with a parent-locked mux being the child</div><div class='del'>-     of another mux, this might break a possible assumption from the</div><div class='del'>-     child mux that the root adapter is unused between its select op</div><div class='del'>-     and the actual transfer (e.g. if the child mux is auto-closing</div><div class='del'>-     and the parent mux issues I2C transfers as part of its select).</div><div class='del'>-     This is especially the case if the parent mux is mux-locked, but</div><div class='del'>-     it may also happen if the parent mux is parent-locked.</div><div class='del'>-</div><div class='del'>-PL2. If select/deselect calls out to other subsystems such as gpio,</div><div class='del'>-     pinctrl, regmap or iio, it is essential that any I2C transfers</div><div class='del'>-     caused by these subsystems are unlocked. This can be convoluted to</div><div class='del'>-     accomplish, maybe even impossible if an acceptably clean solution</div><div class='del'>-     is sought.</div><div class='del'>-==== ====================================================================</div><div class='del'>-</div><div class='add'>+__i2c_transfer), or a deadlock will follow.</div><div class='ctx'> </div><div class='ctx'> Parent-locked Example</div><div class='del'>----------------------</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='hunk'>@@ -212,10 +162,30 @@ When there is an access to D1, this happens:</div><div class='ctx'>  9.  M1 unlocks its parent adapter.</div><div class='ctx'>  10. M1 unlocks muxes on its parent.</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> This means that accesses to both D2 and D3 are locked out for the full</div><div class='ctx'> duration of the entire operation.</div><div class='ctx'> </div><div class='add'>+Parent-locked Caveats</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+When using a parent-locked mux, be aware of the following restrictions:</div><div class='add'>+</div><div class='add'>+[PL1]</div><div class='add'>+  If you build a topology with a parent-locked mux being the child</div><div class='add'>+  of another mux, this might break a possible assumption from the</div><div class='add'>+  child mux that the root adapter is unused between its select op</div><div class='add'>+  and the actual transfer (e.g. if the child mux is auto-closing</div><div class='add'>+  and the parent mux issues I2C transfers as part of its select).</div><div class='add'>+  This is especially the case if the parent mux is mux-locked, but</div><div class='add'>+  it may also happen if the parent mux is parent-locked.</div><div class='add'>+</div><div class='add'>+[PL2]</div><div class='add'>+  If select/deselect calls out to other subsystems such as gpio,</div><div class='add'>+  pinctrl, regmap or iio, it is essential that any I2C transfers</div><div class='add'>+  caused by these subsystems are unlocked. This can be convoluted to</div><div class='add'>+  accomplish, maybe even impossible if an acceptably clean solution</div><div class='add'>+  is sought.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Complex Examples</div><div class='ctx'> ================</div><div class='hunk'>@@ -261,8 +231,10 @@ This is a good topology::</div><div class='ctx'> When device D1 is accessed, accesses to D2 are locked out for the</div><div class='ctx'> full duration of the operation (muxes on the top child adapter of M1</div><div class='ctx'> are locked). But accesses to D3 and D4 are possibly interleaved at</div><div class='del'>-any point. Accesses to D3 locks out D1 and D2, but accesses to D4</div><div class='del'>-are still possibly interleaved.</div><div class='add'>+any point.</div><div class='add'>+</div><div class='add'>+Accesses to D3 locks out D1 and D2, but accesses to D4 are still possibly</div><div class='add'>+interleaved.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Mux-locked mux as parent of parent-locked mux</div><div class='hunk'>@@ -394,3 +366,47 @@ This is a good topology::</div><div class='ctx'> When D1 or D2 are accessed, accesses to D3 and D4 are locked out while</div><div class='ctx'> accesses to D5 may interleave. When D3 or D4 are accessed, accesses to</div><div class='ctx'> all other devices are locked out.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Mux type of existing device drivers</div><div class='add'>+===================================</div><div class='add'>+</div><div class='add'>+Whether a device is mux-locked or parent-locked depends on its</div><div class='add'>+implementation. The following list was correct at the time of writing:</div><div class='add'>+</div><div class='add'>+In drivers/i2c/muxes/:</div><div class='add'>+</div><div class='add'>+======================    =============================================</div><div class='add'>+i2c-arb-gpio-challenge    Parent-locked</div><div class='add'>+i2c-mux-gpio              Normally parent-locked, mux-locked iff</div><div class='add'>+                          all involved gpio pins are controlled by the</div><div class='add'>+                          same I2C root adapter that they mux.</div><div class='add'>+i2c-mux-gpmux             Normally parent-locked, mux-locked iff</div><div class='add'>+                          specified in device-tree.</div><div class='add'>+i2c-mux-ltc4306           Mux-locked</div><div class='add'>+i2c-mux-mlxcpld           Parent-locked</div><div class='add'>+i2c-mux-pca9541           Parent-locked</div><div class='add'>+i2c-mux-pca954x           Parent-locked</div><div class='add'>+i2c-mux-pinctrl           Normally parent-locked, mux-locked iff</div><div class='add'>+                          all involved pinctrl devices are controlled</div><div class='add'>+                          by the same I2C root adapter that they mux.</div><div class='add'>+i2c-mux-reg               Parent-locked</div><div class='add'>+======================    =============================================</div><div class='add'>+</div><div class='add'>+In drivers/iio/:</div><div class='add'>+</div><div class='add'>+======================    =============================================</div><div class='add'>+gyro/mpu3050              Mux-locked</div><div class='add'>+imu/inv_mpu6050/          Mux-locked</div><div class='add'>+======================    =============================================</div><div class='add'>+</div><div class='add'>+In drivers/media/:</div><div class='add'>+</div><div class='add'>+=======================   =============================================</div><div class='add'>+dvb-frontends/lgdt3306a   Mux-locked</div><div class='add'>+dvb-frontends/m88ds3103   Parent-locked</div><div class='add'>+dvb-frontends/rtl2830     Parent-locked</div><div class='add'>+dvb-frontends/rtl2832     Mux-locked</div><div class='add'>+dvb-frontends/si2168      Mux-locked</div><div class='add'>+usb/cx231xx/              Parent-locked</div><div class='add'>+=======================   =============================================</div><div class='head'>diff --git a/Documentation/i2c/instantiating-devices.rst b/Documentation/i2c/instantiating-devices.rst<br/>index 890c9360ce19..3ea056a95812 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/instantiating-devices.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/instantiating-devices.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/instantiating-devices.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/instantiating-devices.rst</a></div><div class='hunk'>@@ -31,7 +31,9 @@ Declare the I2C devices via devicetree</div><div class='ctx'> On platforms using devicetree, the declaration of I2C devices is done in</div><div class='ctx'> subnodes of the master controller.</div><div class='ctx'> </div><div class='del'>-Example::</div><div class='add'>+Example:</div><div class='add'>+</div><div class='add'>+.. code-block:: dts</div><div class='ctx'> </div><div class='ctx'> 	i2c1: i2c@400a0000 {</div><div class='ctx'> 		/* ... master properties skipped ... */</div><div class='hunk'>@@ -71,7 +73,9 @@ code. Instantiating I2C devices via board files is done with an array of</div><div class='ctx'> struct i2c_board_info which is registered by calling</div><div class='ctx'> i2c_register_board_info().</div><div class='ctx'> </div><div class='del'>-Example (from omap2 h4)::</div><div class='add'>+Example (from omap2 h4):</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'>   static struct i2c_board_info h4_i2c_board_info[] __initdata = {</div><div class='ctx'> 	{</div><div class='hunk'>@@ -111,7 +115,9 @@ bus in advance, so the method 1 described above can't be used. Instead,</div><div class='ctx'> you can instantiate your I2C devices explicitly. This is done by filling</div><div class='ctx'> a struct i2c_board_info and calling i2c_new_client_device().</div><div class='ctx'> </div><div class='del'>-Example (from the sfe4001 network driver)::</div><div class='add'>+Example (from the sfe4001 network driver):</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'>   static struct i2c_board_info sfe4001_hwmon_info = {</div><div class='ctx'> 	I2C_BOARD_INFO("max6647", 0x4e),</div><div class='hunk'>@@ -136,7 +142,9 @@ it may have different addresses from one board to the next (manufacturer</div><div class='ctx'> changing its design without notice). In this case, you can call</div><div class='ctx'> i2c_new_scanned_device() instead of i2c_new_client_device().</div><div class='ctx'> </div><div class='del'>-Example (from the nxp OHCI driver)::</div><div class='add'>+Example (from the nxp OHCI driver):</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='ctx'>   static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/i2c/slave-interface.rst b/Documentation/i2c/slave-interface.rst<br/>index 82ea3e1d6fe4..3f0d320bc80a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/slave-interface.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/slave-interface.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/slave-interface.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/slave-interface.rst</a></div><div class='hunk'>@@ -32,9 +32,9 @@ User manual</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='ctx'> I2C slave backends behave like standard I2C clients. So, you can instantiate</div><div class='del'>-them as described in the document 'instantiating-devices'. The only difference</div><div class='del'>-is that i2c slave backends have their own address space. So, you have to add</div><div class='del'>-0x1000 to the address you would originally request. An example for</div><div class='add'>+them as described in the document instantiating-devices.rst. The only</div><div class='add'>+difference is that i2c slave backends have their own address space. So, you</div><div class='add'>+have to add 0x1000 to the address you would originally request. An example for</div><div class='ctx'> instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64</div><div class='ctx'> on bus 1::</div><div class='ctx'> </div><div class='hunk'>@@ -72,12 +72,15 @@ Event types:</div><div class='ctx'> </div><div class='ctx'>   'val': unused</div><div class='ctx'> </div><div class='del'>-  'ret': always 0</div><div class='add'>+  'ret': 0 if the backend is ready, otherwise some errno</div><div class='ctx'> </div><div class='ctx'> Another I2C master wants to write data to us. This event should be sent once</div><div class='ctx'> our own address and the write bit was detected. The data did not arrive yet, so</div><div class='del'>-there is nothing to process or return. Wakeup or initialization probably needs</div><div class='del'>-to be done, though.</div><div class='add'>+there is nothing to process or return. After returning, the bus driver must</div><div class='add'>+always ack the address phase. If 'ret' is zero, backend initialization or</div><div class='add'>+wakeup is done and further data may be received. If 'ret' is an errno, the bus</div><div class='add'>+driver should nack all incoming bytes until the next stop condition to enforce</div><div class='add'>+a retry of the transmission.</div><div class='ctx'> </div><div class='ctx'> * I2C_SLAVE_READ_REQUESTED (mandatory)</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/i2c/smbus-protocol.rst b/Documentation/i2c/smbus-protocol.rst<br/>index 00d8e17d0aca..adc87456c99d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/smbus-protocol.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/smbus-protocol.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/smbus-protocol.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/smbus-protocol.rst</a></div><div class='hunk'>@@ -41,12 +41,12 @@ Sr              Repeated start condition, used to switch from write to</div><div class='ctx'> P               Stop condition</div><div class='ctx'> Rd/Wr (1 bit)   Read/Write bit. Rd equals 1, Wr equals 0.</div><div class='ctx'> A, NA (1 bit)   Acknowledge (ACK) and Not Acknowledge (NACK) bit</div><div class='del'>-Addr  (7 bits)  I2C 7 bit address. Note that this can be expanded as usual to</div><div class='add'>+Addr  (7 bits)  I2C 7 bit address. Note that this can be expanded to</div><div class='ctx'>                 get a 10 bit I2C address.</div><div class='ctx'> Comm  (8 bits)  Command byte, a data byte which often selects a register on</div><div class='ctx'>                 the device.</div><div class='del'>-Data  (8 bits)  A plain data byte. Sometimes, I write DataLow, DataHigh</div><div class='del'>-                for 16 bit data.</div><div class='add'>+Data  (8 bits)  A plain data byte. DataLow and DataHigh represent the low and</div><div class='add'>+                high byte of a 16 bit word.</div><div class='ctx'> Count (8 bits)  A data byte containing the length of a block operation.</div><div class='ctx'> </div><div class='ctx'> [..]            Data sent by I2C device, as opposed to data sent by the host</div><div class='hunk'>@@ -238,7 +238,7 @@ This is implemented in the following way in the Linux kernel:</div><div class='ctx'> * I2C bus drivers trigger SMBus Host Notify by a call to</div><div class='ctx'>   i2c_handle_smbus_host_notify().</div><div class='ctx'> * I2C drivers for devices which can trigger SMBus Host Notify will have</div><div class='del'>-  client-&gt;irq assigned to a Host Notify IRQ if noone else specified an other.</div><div class='add'>+  client-&gt;irq assigned to a Host Notify IRQ if no one else specified another.</div><div class='ctx'> </div><div class='ctx'> There is currently no way to retrieve the data parameter from the client.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/i2c/writing-clients.rst b/Documentation/i2c/writing-clients.rst<br/>index 978cc8210bf3..b7d3ae7458f8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/writing-clients.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/i2c/writing-clients.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/i2c/writing-clients.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/i2c/writing-clients.rst</a></div><div class='hunk'>@@ -46,7 +46,7 @@ driver model device node, and its I2C address.</div><div class='ctx'> 	},</div><div class='ctx'> </div><div class='ctx'> 	.id_table	= foo_idtable,</div><div class='del'>-	.probe		= foo_probe,</div><div class='add'>+	.probe_new	= foo_probe,</div><div class='ctx'> 	.remove		= foo_remove,</div><div class='ctx'> 	/* if device autodetection is needed: */</div><div class='ctx'> 	.class		= I2C_CLASS_SOMETHING,</div><div class='hunk'>@@ -155,9 +155,8 @@ those devices, and a remove() method to unbind.</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	static int foo_probe(struct i2c_client *client,</div><div class='del'>-			     const struct i2c_device_id *id);</div><div class='del'>-	static int foo_remove(struct i2c_client *client);</div><div class='add'>+	static int foo_probe(struct i2c_client *client);</div><div class='add'>+	static void foo_remove(struct i2c_client *client);</div><div class='ctx'> </div><div class='ctx'> Remember that the i2c_driver does not create those client handles.  The</div><div class='ctx'> handle may be used during foo_probe().  If foo_probe() reports success</div><div class='hunk'>@@ -165,8 +164,12 @@ handle may be used during foo_probe().  If foo_probe() reports success</div><div class='ctx'> foo_remove() returns.  That binding model is used by most Linux drivers.</div><div class='ctx'> </div><div class='ctx'> The probe function is called when an entry in the id_table name field</div><div class='del'>-matches the device's name. It is passed the entry that was matched so</div><div class='del'>-the driver knows which one in the table matched.</div><div class='add'>+matches the device's name. If the probe function needs that entry, it</div><div class='add'>+can retrieve it using</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+	const struct i2c_device_id *id = i2c_match_id(foo_idtable, client);</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Device Creation</div><div class='hunk'>@@ -361,7 +364,7 @@ stop condition is issued between transaction. The i2c_msg structure</div><div class='ctx'> contains for each message the client address, the number of bytes of the</div><div class='ctx'> message and the message data itself.</div><div class='ctx'> </div><div class='del'>-You can read the file ``i2c-protocol`` for more information about the</div><div class='add'>+You can read the file i2c-protocol.rst for more information about the</div><div class='ctx'> actual I2C protocol.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -411,7 +414,7 @@ transactions return 0 on success; the 'read' transactions return the read</div><div class='ctx'> value, except for block transactions, which return the number of values</div><div class='ctx'> read. The block buffers need not be longer than 32 bytes.</div><div class='ctx'> </div><div class='del'>-You can read the file ``smbus-protocol`` for more information about the</div><div class='add'>+You can read the file smbus-protocol.rst for more information about the</div><div class='ctx'> actual SMBus protocol.</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/ide/ChangeLog.ide-cd.1994-2004 b/Documentation/ide/ChangeLog.ide-cd.1994-2004<br/>deleted file mode 100644<br/>index 4cc3ad99f39b..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/ChangeLog.ide-cd.1994-2004?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/ChangeLog.ide-cd.1994-2004</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,268 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * 1.00  Oct 31, 1994 -- Initial version.</div><div class='del'>- * 1.01  Nov  2, 1994 -- Fixed problem with starting request in</div><div class='del'>- *                       cdrom_check_status.</div><div class='del'>- * 1.03  Nov 25, 1994 -- leaving unmask_intr[] as a user-setting (as for disks)</div><div class='del'>- * (from mlord)       -- minor changes to cdrom_setup()</div><div class='del'>- *                    -- renamed ide_dev_s to ide_drive_t, enable irq on command</div><div class='del'>- * 2.00  Nov 27, 1994 -- Generalize packet command interface;</div><div class='del'>- *                       add audio ioctls.</div><div class='del'>- * 2.01  Dec  3, 1994 -- Rework packet command interface to handle devices</div><div class='del'>- *                       which send an interrupt when ready for a command.</div><div class='del'>- * 2.02  Dec 11, 1994 -- Cache the TOC in the driver.</div><div class='del'>- *                       Don't use SCMD_PLAYAUDIO_TI; it's not included</div><div class='del'>- *                       in the current version of ATAPI.</div><div class='del'>- *                       Try to use LBA instead of track or MSF addressing</div><div class='del'>- *                       when possible.</div><div class='del'>- *                       Don't wait for READY_STAT.</div><div class='del'>- * 2.03  Jan 10, 1995 -- Rewrite block read routines to handle block sizes</div><div class='del'>- *                       other than 2k and to move multiple sectors in a</div><div class='del'>- *                       single transaction.</div><div class='del'>- * 2.04  Apr 21, 1995 -- Add work-around for Creative Labs CD220E drives.</div><div class='del'>- *                       Thanks to Nick Saw &lt;cwsaw@pts7.pts.mot.com&gt; for</div><div class='del'>- *                       help in figuring this out.  Ditto for Acer and</div><div class='del'>- *                       Aztech drives, which seem to have the same problem.</div><div class='del'>- * 2.04b May 30, 1995 -- Fix to match changes in ide.c version 3.16 -ml</div><div class='del'>- * 2.05  Jun  8, 1995 -- Don't attempt to retry after an illegal request</div><div class='del'>- *                        or data protect error.</div><div class='del'>- *                       Use HWIF and DEV_HWIF macros as in ide.c.</div><div class='del'>- *                       Always try to do a request_sense after</div><div class='del'>- *                        a failed command.</div><div class='del'>- *                       Include an option to give textual descriptions</div><div class='del'>- *                        of ATAPI errors.</div><div class='del'>- *                       Fix a bug in handling the sector cache which</div><div class='del'>- *                        showed up if the drive returned data in 512 byte</div><div class='del'>- *                        blocks (like Pioneer drives).  Thanks to</div><div class='del'>- *                        Richard Hirst &lt;srh@gpt.co.uk&gt; for diagnosing this.</div><div class='del'>- *                       Properly supply the page number field in the</div><div class='del'>- *                        MODE_SELECT command.</div><div class='del'>- *                       PLAYAUDIO12 is broken on the Aztech; work around it.</div><div class='del'>- * 2.05x Aug 11, 1995 -- lots of data structure renaming/restructuring in ide.c</div><div class='del'>- *                       (my apologies to Scott, but now ide-cd.c is independent)</div><div class='del'>- * 3.00  Aug 22, 1995 -- Implement CDROMMULTISESSION ioctl.</div><div class='del'>- *                       Implement CDROMREADAUDIO ioctl (UNTESTED).</div><div class='del'>- *                       Use input_ide_data() and output_ide_data().</div><div class='del'>- *                       Add door locking.</div><div class='del'>- *                       Fix usage count leak in cdrom_open, which happened</div><div class='del'>- *                        when a read-write mount was attempted.</div><div class='del'>- *                       Try to load the disk on open.</div><div class='del'>- *                       Implement CDROMEJECT_SW ioctl (off by default).</div><div class='del'>- *                       Read total cdrom capacity during open.</div><div class='del'>- *                       Rearrange logic in cdrom_decode_status.  Issue</div><div class='del'>- *                        request sense commands for failed packet commands</div><div class='del'>- *                        from here instead of from cdrom_queue_packet_command.</div><div class='del'>- *                        Fix a race condition in retrieving error information.</div><div class='del'>- *                       Suppress printing normal unit attention errors and</div><div class='del'>- *                        some drive not ready errors.</div><div class='del'>- *                       Implement CDROMVOLREAD ioctl.</div><div class='del'>- *                       Implement CDROMREADMODE1/2 ioctls.</div><div class='del'>- *                       Fix race condition in setting up interrupt handlers</div><div class='del'>- *                        when the `serialize' option is used.</div><div class='del'>- * 3.01  Sep  2, 1995 -- Fix ordering of reenabling interrupts in</div><div class='del'>- *                        cdrom_queue_request.</div><div class='del'>- *                       Another try at using ide_[input,output]_data.</div><div class='del'>- * 3.02  Sep 16, 1995 -- Stick total disk capacity in partition table as well.</div><div class='del'>- *                       Make VERBOSE_IDE_CD_ERRORS dump failed command again.</div><div class='del'>- *                       Dump out more information for ILLEGAL REQUEST errs.</div><div class='del'>- *                       Fix handling of errors occurring before the</div><div class='del'>- *                        packet command is transferred.</div><div class='del'>- *                       Fix transfers with odd bytelengths.</div><div class='del'>- * 3.03  Oct 27, 1995 -- Some Creative drives have an id of just `CD'.</div><div class='del'>- *                       `DCI-2S10' drives are broken too.</div><div class='del'>- * 3.04  Nov 20, 1995 -- So are Vertos drives.</div><div class='del'>- * 3.05  Dec  1, 1995 -- Changes to go with overhaul of ide.c and ide-tape.c</div><div class='del'>- * 3.06  Dec 16, 1995 -- Add support needed for partitions.</div><div class='del'>- *                       More workarounds for Vertos bugs (based on patches</div><div class='del'>- *                        from Holger Dietze &lt;dietze@aix520.informatik.uni-leipzig.de&gt;).</div><div class='del'>- *                       Try to eliminate byteorder assumptions.</div><div class='del'>- *                       Use atapi_cdrom_subchnl struct definition.</div><div class='del'>- *                       Add STANDARD_ATAPI compilation option.</div><div class='del'>- * 3.07  Jan 29, 1996 -- More twiddling for broken drives: Sony 55D,</div><div class='del'>- *                        Vertos 300.</div><div class='del'>- *                       Add NO_DOOR_LOCKING configuration option.</div><div class='del'>- *                       Handle drive_cmd requests w/NULL args (for hdparm -t).</div><div class='del'>- *                       Work around sporadic Sony55e audio play problem.</div><div class='del'>- * 3.07a Feb 11, 1996 -- check drive-&gt;id for NULL before dereferencing, to fix</div><div class='del'>- *                        problem with "hde=cdrom" with no drive present.  -ml</div><div class='del'>- * 3.08  Mar  6, 1996 -- More Vertos workarounds.</div><div class='del'>- * 3.09  Apr  5, 1996 -- Add CDROMCLOSETRAY ioctl.</div><div class='del'>- *                       Switch to using MSF addressing for audio commands.</div><div class='del'>- *                       Reformat to match kernel tabbing style.</div><div class='del'>- *                       Add CDROM_GET_UPC ioctl.</div><div class='del'>- * 3.10  Apr 10, 1996 -- Fix compilation error with STANDARD_ATAPI.</div><div class='del'>- * 3.11  Apr 29, 1996 -- Patch from Heiko Eißfeldt &lt;heiko@colossus.escape.de&gt;</div><div class='del'>- *                       to remove redundant verify_area calls.</div><div class='del'>- * 3.12  May  7, 1996 -- Rudimentary changer support.  Based on patches</div><div class='del'>- *                        from Gerhard Zuber &lt;zuber@berlin.snafu.de&gt;.</div><div class='del'>- *                       Let open succeed even if there's no loaded disc.</div><div class='del'>- * 3.13  May 19, 1996 -- Fixes for changer code.</div><div class='del'>- * 3.14  May 29, 1996 -- Add work-around for Vertos 600.</div><div class='del'>- *                        (From Hennus Bergman &lt;hennus@sky.ow.nl&gt;.)</div><div class='del'>- * 3.15  July 2, 1996 -- Added support for Sanyo 3 CD changers</div><div class='del'>- *                        from Ben Galliart &lt;bgallia@luc.edu&gt; with</div><div class='del'>- *                        special help from Jeff Lightfoot</div><div class='del'>- *                        &lt;jeffml@pobox.com&gt;</div><div class='del'>- * 3.15a July 9, 1996 -- Improved Sanyo 3 CD changer identification</div><div class='del'>- * 3.16  Jul 28, 1996 -- Fix from Gadi to reduce kernel stack usage for ioctl.</div><div class='del'>- * 3.17  Sep 17, 1996 -- Tweak audio reads for some drives.</div><div class='del'>- *                       Start changing CDROMLOADFROMSLOT to CDROM_SELECT_DISC.</div><div class='del'>- * 3.18  Oct 31, 1996 -- Added module and DMA support.</div><div class='del'>- *</div><div class='del'>- * 4.00  Nov 5, 1996   -- New ide-cd maintainer,</div><div class='del'>- *                                 Erik B. Andersen &lt;andersee@debian.org&gt;</div><div class='del'>- *                     -- Newer Creative drives don't always set the error</div><div class='del'>- *                          register correctly.  Make sure we see media changes</div><div class='del'>- *                          regardless.</div><div class='del'>- *                     -- Integrate with generic cdrom driver.</div><div class='del'>- *                     -- CDROMGETSPINDOWN and CDROMSETSPINDOWN ioctls, based on</div><div class='del'>- *                          a patch from Ciro Cattuto &lt;&gt;.</div><div class='del'>- *                     -- Call set_device_ro.</div><div class='del'>- *                     -- Implement CDROMMECHANISMSTATUS and CDROMSLOTTABLE</div><div class='del'>- *                          ioctls, based on patch by Erik Andersen</div><div class='del'>- *                     -- Add some probes of drive capability during setup.</div><div class='del'>- *</div><div class='del'>- * 4.01  Nov 11, 1996  -- Split into ide-cd.c and ide-cd.h</div><div class='del'>- *                     -- Removed CDROMMECHANISMSTATUS and CDROMSLOTTABLE</div><div class='del'>- *                          ioctls in favor of a generalized approach</div><div class='del'>- *                          using the generic cdrom driver.</div><div class='del'>- *                     -- Fully integrated with the 2.1.X kernel.</div><div class='del'>- *                     -- Other stuff that I forgot (lots of changes)</div><div class='del'>- *</div><div class='del'>- * 4.02  Dec 01, 1996  -- Applied patch from Gadi Oxman &lt;gadio@netvision.net.il&gt;</div><div class='del'>- *                          to fix the drive door locking problems.</div><div class='del'>- *</div><div class='del'>- * 4.03  Dec 04, 1996  -- Added DSC overlap support.</div><div class='del'>- * 4.04  Dec 29, 1996  -- Added CDROMREADRAW ioclt based on patch</div><div class='del'>- *                          by Ales Makarov (xmakarov@sun.felk.cvut.cz)</div><div class='del'>- *</div><div class='del'>- * 4.05  Nov 20, 1997  -- Modified to print more drive info on init</div><div class='del'>- *                        Minor other changes</div><div class='del'>- *                        Fix errors on CDROMSTOP (If you have a "Dolphin",</div><div class='del'>- *                          you must define IHAVEADOLPHIN)</div><div class='del'>- *                        Added identifier so new Sanyo CD-changer works</div><div class='del'>- *                        Better detection if door locking isn't supported</div><div class='del'>- *</div><div class='del'>- * 4.06  Dec 17, 1997  -- fixed endless "tray open" messages  -ml</div><div class='del'>- * 4.07  Dec 17, 1997  -- fallback to set pc-&gt;stat on "tray open"</div><div class='del'>- * 4.08  Dec 18, 1997  -- spew less noise when tray is empty</div><div class='del'>- *                     -- fix speed display for ACER 24X, 18X</div><div class='del'>- * 4.09  Jan 04, 1998  -- fix handling of the last block so we return</div><div class='del'>- *                         an end of file instead of an I/O error (Gadi)</div><div class='del'>- * 4.10  Jan 24, 1998  -- fixed a bug so now changers can change to a new</div><div class='del'>- *                         slot when there is no disc in the current slot.</div><div class='del'>- *                     -- Fixed a memory leak where info-&gt;changer_info was</div><div class='del'>- *                         malloc'ed but never free'd when closing the device.</div><div class='del'>- *                     -- Cleaned up the global namespace a bit by making more</div><div class='del'>- *                         functions static that should already have been.</div><div class='del'>- * 4.11  Mar 12, 1998  -- Added support for the CDROM_SELECT_SPEED ioctl</div><div class='del'>- *                         based on a patch for 2.0.33 by Jelle Foks</div><div class='del'>- *                         &lt;jelle@scintilla.utwente.nl&gt;, a patch for 2.0.33</div><div class='del'>- *                         by Toni Giorgino &lt;toni@pcape2.pi.infn.it&gt;, the SCSI</div><div class='del'>- *                         version, and my own efforts.  -erik</div><div class='del'>- *                     -- Fixed a stupid bug which egcs was kind enough to</div><div class='del'>- *                         inform me of where "Illegal mode for this track"</div><div class='del'>- *                         was never returned due to a comparison on data</div><div class='del'>- *                         types of limited range.</div><div class='del'>- * 4.12  Mar 29, 1998  -- Fixed bug in CDROM_SELECT_SPEED so write speed is</div><div class='del'>- *                         now set ionly for CD-R and CD-RW drives.  I had</div><div class='del'>- *                         removed this support because it produced errors.</div><div class='del'>- *                         It produced errors _only_ for non-writers. duh.</div><div class='del'>- * 4.13  May 05, 1998  -- Suppress useless "in progress of becoming ready"</div><div class='del'>- *                         messages, since this is not an error.</div><div class='del'>- *                     -- Change error messages to be const</div><div class='del'>- *                     -- Remove a "\t" which looks ugly in the syslogs</div><div class='del'>- * 4.14  July 17, 1998 -- Change to pointing to .ps version of ATAPI spec</div><div class='del'>- *                         since the .pdf version doesn't seem to work...</div><div class='del'>- *                     -- Updated the TODO list to something more current.</div><div class='del'>- *</div><div class='del'>- * 4.15  Aug 25, 1998  -- Updated ide-cd.h to respect machine endianness,</div><div class='del'>- *                         patch thanks to "Eddie C. Dost" &lt;ecd@skynet.be&gt;</div><div class='del'>- *</div><div class='del'>- * 4.50  Oct 19, 1998  -- New maintainers!</div><div class='del'>- *                         Jens Axboe &lt;axboe@image.dk&gt;</div><div class='del'>- *                         Chris Zwilling &lt;chris@cloudnet.com&gt;</div><div class='del'>- *</div><div class='del'>- * 4.51  Dec 23, 1998  -- Jens Axboe &lt;axboe@image.dk&gt;</div><div class='del'>- *                      - ide_cdrom_reset enabled since the ide subsystem</div><div class='del'>- *                         handles resets fine now. &lt;axboe@image.dk&gt;</div><div class='del'>- *                      - Transfer size fix for Samsung CD-ROMs, thanks to</div><div class='del'>- *                        "Ville Hallik" &lt;ville.hallik@mail.ee&gt;.</div><div class='del'>- *                      - other minor stuff.</div><div class='del'>- *</div><div class='del'>- * 4.52  Jan 19, 1999  -- Jens Axboe &lt;axboe@image.dk&gt;</div><div class='del'>- *                      - Detect DVD-ROM/RAM drives</div><div class='del'>- *</div><div class='del'>- * 4.53  Feb 22, 1999   - Include other model Samsung and one Goldstar</div><div class='del'>- *                         drive in transfer size limit.</div><div class='del'>- *                      - Fix the I/O error when doing eject without a medium</div><div class='del'>- *                         loaded on some drives.</div><div class='del'>- *                      - CDROMREADMODE2 is now implemented through</div><div class='del'>- *                         CDROMREADRAW, since many drives don't support</div><div class='del'>- *                         MODE2 (even though ATAPI 2.6 says they must).</div><div class='del'>- *                      - Added ignore parameter to ide-cd (as a module), eg</div><div class='del'>- *                         	insmod ide-cd ignore='hda hdb'</div><div class='del'>- *                         Useful when using ide-cd in conjunction with</div><div class='del'>- *                         ide-scsi. TODO: non-modular way of doing the</div><div class='del'>- *                         same.</div><div class='del'>- *</div><div class='del'>- * 4.54  Aug 5, 1999	- Support for MMC2 class commands through the generic</div><div class='del'>- *			  packet interface to cdrom.c.</div><div class='del'>- *			- Unified audio ioctl support, most of it.</div><div class='del'>- *			- cleaned up various deprecated verify_area().</div><div class='del'>- *			- Added ide_cdrom_packet() as the interface for</div><div class='del'>- *			  the Uniform generic_packet().</div><div class='del'>- *			- bunch of other stuff, will fill in logs later.</div><div class='del'>- *			- report 1 slot for non-changers, like the other</div><div class='del'>- *			  cd-rom drivers. don't report select disc for</div><div class='del'>- *			  non-changers as well.</div><div class='del'>- *			- mask out audio playing, if the device can't do it.</div><div class='del'>- *</div><div class='del'>- * 4.55  Sep 1, 1999	- Eliminated the rest of the audio ioctls, except</div><div class='del'>- *			  for CDROMREADTOC[ENTRY|HEADER]. Some of the drivers</div><div class='del'>- *			  use this independently of the actual audio handling.</div><div class='del'>- *			  They will disappear later when I get the time to</div><div class='del'>- *			  do it cleanly.</div><div class='del'>- *			- Minimize the TOC reading - only do it when we</div><div class='del'>- *			  know a media change has occurred.</div><div class='del'>- *			- Moved all the CDROMREADx ioctls to the Uniform layer.</div><div class='del'>- *			- Heiko Eißfeldt &lt;heiko@colossus.escape.de&gt; supplied</div><div class='del'>- *			  some fixes for CDI.</div><div class='del'>- *			- CD-ROM leaving door locked fix from Andries</div><div class='del'>- *			  Brouwer &lt;Andries.Brouwer@cwi.nl&gt;</div><div class='del'>- *			- Erik Andersen &lt;andersen@xmission.com&gt; unified</div><div class='del'>- *			  commands across the various drivers and how</div><div class='del'>- *			  sense errors are handled.</div><div class='del'>- *</div><div class='del'>- * 4.56  Sep 12, 1999	- Removed changer support - it is now in the</div><div class='del'>- *			  Uniform layer.</div><div class='del'>- *			- Added partition based multisession handling.</div><div class='del'>- *			- Mode sense and mode select moved to the</div><div class='del'>- *			  Uniform layer.</div><div class='del'>- *			- Fixed a problem with WPI CDS-32X drive - it</div><div class='del'>- *			  failed the capabilities</div><div class='del'>- *</div><div class='del'>- * 4.57  Apr 7, 2000	- Fixed sense reporting.</div><div class='del'>- *			- Fixed possible oops in ide_cdrom_get_last_session()</div><div class='del'>- *			- Fix locking mania and make ide_cdrom_reset relock</div><div class='del'>- *			- Stop spewing errors to log when magicdev polls with</div><div class='del'>- *			  TEST_UNIT_READY on some drives.</div><div class='del'>- *			- Various fixes from Tobias Ringstrom:</div><div class='del'>- *			  tray if it was locked prior to the reset.</div><div class='del'>- *			  - cdrom_read_capacity returns one frame too little.</div><div class='del'>- *			  - Fix real capacity reporting.</div><div class='del'>- *</div><div class='del'>- * 4.58  May 1, 2000	- Clean up ACER50 stuff.</div><div class='del'>- *			- Fix small problem with ide_cdrom_capacity</div><div class='del'>- *</div><div class='del'>- * 4.59  Aug 11, 2000	- Fix changer problem in cdrom_read_toc, we weren't</div><div class='del'>- *			  correctly sensing a disc change.</div><div class='del'>- *			- Rearranged some code</div><div class='del'>- *			- Use extended sense on drives that support it for</div><div class='del'>- *			  correctly reporting tray status -- from</div><div class='del'>- *			  Michael D Johnson &lt;johnsom@orst.edu&gt;</div><div class='del'>- * 4.60  Dec 17, 2003	- Add mt rainier support</div><div class='del'>- *			- Bump timeout for packet commands, matches sr</div><div class='del'>- *			- Odd stuff</div><div class='del'>- * 4.61  Jan 22, 2004	- support hardware sector sizes other than 2kB,</div><div class='del'>- *			  Pascal Schmidt &lt;der.eremit@email.de&gt;</div><div class='del'>- */</div><div class='head'>diff --git a/Documentation/ide/ChangeLog.ide-floppy.1996-2002 b/Documentation/ide/ChangeLog.ide-floppy.1996-2002<br/>deleted file mode 100644<br/>index 46c19ef32a9e..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/ChangeLog.ide-floppy.1996-2002?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/ChangeLog.ide-floppy.1996-2002</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,63 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Many thanks to Lode Leroy &lt;Lode.Leroy@www.ibase.be&gt;, who tested so many</div><div class='del'>- * ALPHA patches to this driver on an EASYSTOR LS-120 ATAPI floppy drive.</div><div class='del'>- *</div><div class='del'>- * Ver 0.1   Oct 17 96   Initial test version, mostly based on ide-tape.c.</div><div class='del'>- * Ver 0.2   Oct 31 96   Minor changes.</div><div class='del'>- * Ver 0.3   Dec  2 96   Fixed error recovery bug.</div><div class='del'>- * Ver 0.4   Jan 26 97   Add support for the HDIO_GETGEO ioctl.</div><div class='del'>- * Ver 0.5   Feb 21 97   Add partitions support.</div><div class='del'>- *                       Use the minimum of the LBA and CHS capacities.</div><div class='del'>- *                       Avoid hwgroup-&gt;rq == NULL on the last irq.</div><div class='del'>- *                       Fix potential null dereferencing with DEBUG_LOG.</div><div class='del'>- * Ver 0.8   Dec  7 97   Increase irq timeout from 10 to 50 seconds.</div><div class='del'>- *                       Add media write-protect detection.</div><div class='del'>- *                       Issue START command only if TEST UNIT READY fails.</div><div class='del'>- *                       Add work-around for IOMEGA ZIP revision 21.D.</div><div class='del'>- *                       Remove idefloppy_get_capabilities().</div><div class='del'>- * Ver 0.9   Jul  4 99   Fix a bug which might have caused the number of</div><div class='del'>- *                        bytes requested on each interrupt to be zero.</div><div class='del'>- *                        Thanks to &lt;shanos@es.co.nz&gt; for pointing this out.</div><div class='del'>- * Ver 0.9.sv Jan 6 01   Sam Varshavchik &lt;mrsam@courier-mta.com&gt;</div><div class='del'>- *                       Implement low level formatting.  Reimplemented</div><div class='del'>- *                       IDEFLOPPY_CAPABILITIES_PAGE, since we need the srfp</div><div class='del'>- *                       bit.  My LS-120 drive barfs on</div><div class='del'>- *                       IDEFLOPPY_CAPABILITIES_PAGE, but maybe it's just me.</div><div class='del'>- *                       Compromise by not reporting a failure to get this</div><div class='del'>- *                       mode page.  Implemented four IOCTLs in order to</div><div class='del'>- *                       implement formatting.  IOCTls begin with 0x4600,</div><div class='del'>- *                       0x46 is 'F' as in Format.</div><div class='del'>- *            Jan 9 01   Userland option to select format verify.</div><div class='del'>- *                       Added PC_SUPPRESS_ERROR flag - some idefloppy drives</div><div class='del'>- *                       do not implement IDEFLOPPY_CAPABILITIES_PAGE, and</div><div class='del'>- *                       return a sense error.  Suppress error reporting in</div><div class='del'>- *                       this particular case in order to avoid spurious</div><div class='del'>- *                       errors in syslog.  The culprit is</div><div class='del'>- *                       idefloppy_get_capability_page(), so move it to</div><div class='del'>- *                       idefloppy_begin_format() so that it's not used</div><div class='del'>- *                       unless absolutely necessary.</div><div class='del'>- *                       If drive does not support format progress indication</div><div class='del'>- *                       monitor the dsc bit in the status register.</div><div class='del'>- *                       Also, O_NDELAY on open will allow the device to be</div><div class='del'>- *                       opened without a disk available.  This can be used to</div><div class='del'>- *                       open an unformatted disk, or get the device capacity.</div><div class='del'>- * Ver 0.91  Dec 11 99   Added IOMEGA Clik! drive support by</div><div class='del'>- *     		   &lt;paul@paulbristow.net&gt;</div><div class='del'>- * Ver 0.92  Oct 22 00   Paul Bristow became official maintainer for this</div><div class='del'>- *           		   driver.  Included Powerbook internal zip kludge.</div><div class='del'>- * Ver 0.93  Oct 24 00   Fixed bugs for Clik! drive</div><div class='del'>- *                        no disk on insert and disk change now works</div><div class='del'>- * Ver 0.94  Oct 27 00   Tidied up to remove strstr(Clik) everywhere</div><div class='del'>- * Ver 0.95  Nov  7 00   Brought across to kernel 2.4</div><div class='del'>- * Ver 0.96  Jan  7 01   Actually in line with release version of 2.4.0</div><div class='del'>- *                       including set_bit patch from Rusty Russell</div><div class='del'>- * Ver 0.97  Jul 22 01   Merge 0.91-0.96 onto 0.9.sv for ac series</div><div class='del'>- * Ver 0.97.sv Aug 3 01  Backported from 2.4.7-ac3</div><div class='del'>- * Ver 0.98  Oct 26 01   Split idefloppy_transfer_pc into two pieces to</div><div class='del'>- *                        fix a lost interrupt problem. It appears the busy</div><div class='del'>- *                        bit was being deasserted by my IOMEGA ATAPI ZIP 100</div><div class='del'>- *                        drive before the drive was actually ready.</div><div class='del'>- * Ver 0.98a Oct 29 01   Expose delay value so we can play.</div><div class='del'>- * Ver 0.99  Feb 24 02   Remove duplicate code, modify clik! detection code</div><div class='del'>- *                        to support new PocketZip drives</div><div class='del'>- */</div><div class='head'>diff --git a/Documentation/ide/ChangeLog.ide-tape.1995-2002 b/Documentation/ide/ChangeLog.ide-tape.1995-2002<br/>deleted file mode 100644<br/>index 877fac8770b3..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/ChangeLog.ide-tape.1995-2002?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/ChangeLog.ide-tape.1995-2002</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,257 +0,0 @@</div><div class='del'>-/*</div><div class='del'>- * Ver 0.1   Nov  1 95   Pre-working code :-)</div><div class='del'>- * Ver 0.2   Nov 23 95   A short backup (few megabytes) and restore procedure</div><div class='del'>- *                        was successful ! (Using tar cvf ... on the block</div><div class='del'>- *                        device interface).</div><div class='del'>- *                       A longer backup resulted in major swapping, bad</div><div class='del'>- *                        overall Linux performance and eventually failed as</div><div class='del'>- *                        we received non serial read-ahead requests from the</div><div class='del'>- *                        buffer cache.</div><div class='del'>- * Ver 0.3   Nov 28 95   Long backups are now possible, thanks to the</div><div class='del'>- *                        character device interface. Linux's responsiveness</div><div class='del'>- *                        and performance doesn't seem to be much affected</div><div class='del'>- *                        from the background backup procedure.</div><div class='del'>- *                       Some general mtio.h magnetic tape operations are</div><div class='del'>- *                        now supported by our character device. As a result,</div><div class='del'>- *                        popular tape utilities are starting to work with</div><div class='del'>- *                        ide tapes :-)</div><div class='del'>- *                       The following configurations were tested:</div><div class='del'>- *                       1. An IDE ATAPI TAPE shares the same interface</div><div class='del'>- *                        and irq with an IDE ATAPI CDROM.</div><div class='del'>- *                       2. An IDE ATAPI TAPE shares the same interface</div><div class='del'>- *                        and irq with a normal IDE disk.</div><div class='del'>- *                        Both configurations seemed to work just fine !</div><div class='del'>- *                        However, to be on the safe side, it is meanwhile</div><div class='del'>- *                        recommended to give the IDE TAPE its own interface</div><div class='del'>- *                        and irq.</div><div class='del'>- *                       The one thing which needs to be done here is to</div><div class='del'>- *                        add a "request postpone" feature to ide.c,</div><div class='del'>- *                        so that we won't have to wait for the tape to finish</div><div class='del'>- *                        performing a long media access (DSC) request (such</div><div class='del'>- *                        as a rewind) before we can access the other device</div><div class='del'>- *                        on the same interface. This effect doesn't disturb</div><div class='del'>- *                        normal operation most of the time because read/write</div><div class='del'>- *                        requests are relatively fast, and once we are</div><div class='del'>- *                        performing one tape r/w request, a lot of requests</div><div class='del'>- *                        from the other device can be queued and ide.c will</div><div class='del'>- *			  service all of them after this single tape request.</div><div class='del'>- * Ver 1.0   Dec 11 95   Integrated into Linux 1.3.46 development tree.</div><div class='del'>- *                       On each read / write request, we now ask the drive</div><div class='del'>- *                        if we can transfer a constant number of bytes</div><div class='del'>- *                        (a parameter of the drive) only to its buffers,</div><div class='del'>- *                        without causing actual media access. If we can't,</div><div class='del'>- *                        we just wait until we can by polling the DSC bit.</div><div class='del'>- *                        This ensures that while we are not transferring</div><div class='del'>- *                        more bytes than the constant referred to above, the</div><div class='del'>- *                        interrupt latency will not become too high and</div><div class='del'>- *                        we won't cause an interrupt timeout, as happened</div><div class='del'>- *                        occasionally in the previous version.</div><div class='del'>- *                       While polling for DSC, the current request is</div><div class='del'>- *                        postponed and ide.c is free to handle requests from</div><div class='del'>- *                        the other device. This is handled transparently to</div><div class='del'>- *                        ide.c. The hwgroup locking method which was used</div><div class='del'>- *                        in the previous version was removed.</div><div class='del'>- *                       Use of new general features which are provided by</div><div class='del'>- *                        ide.c for use with atapi devices.</div><div class='del'>- *                        (Programming done by Mark Lord)</div><div class='del'>- *                       Few potential bug fixes (Again, suggested by Mark)</div><div class='del'>- *                       Single character device data transfers are now</div><div class='del'>- *                        not limited in size, as they were before.</div><div class='del'>- *                       We are asking the tape about its recommended</div><div class='del'>- *                        transfer unit and send a larger data transfer</div><div class='del'>- *                        as several transfers of the above size.</div><div class='del'>- *                        For best results, use an integral number of this</div><div class='del'>- *                        basic unit (which is shown during driver</div><div class='del'>- *                        initialization). I will soon add an ioctl to get</div><div class='del'>- *                        this important parameter.</div><div class='del'>- *                       Our data transfer buffer is allocated on startup,</div><div class='del'>- *                        rather than before each data transfer. This should</div><div class='del'>- *                        ensure that we will indeed have a data buffer.</div><div class='del'>- * Ver 1.1   Dec 14 95   Fixed random problems which occurred when the tape</div><div class='del'>- *                        shared an interface with another device.</div><div class='del'>- *                        (poll_for_dsc was a complete mess).</div><div class='del'>- *                       Removed some old (non-active) code which had</div><div class='del'>- *                        to do with supporting buffer cache originated</div><div class='del'>- *                        requests.</div><div class='del'>- *                       The block device interface can now be opened, so</div><div class='del'>- *                        that general ide driver features like the unmask</div><div class='del'>- *                        interrupts flag can be selected with an ioctl.</div><div class='del'>- *                        This is the only use of the block device interface.</div><div class='del'>- *                       New fast pipelined operation mode (currently only on</div><div class='del'>- *                        writes). When using the pipelined mode, the</div><div class='del'>- *                        throughput can potentially reach the maximum</div><div class='del'>- *                        tape supported throughput, regardless of the</div><div class='del'>- *                        user backup program. On my tape drive, it sometimes</div><div class='del'>- *                        boosted performance by a factor of 2. Pipelined</div><div class='del'>- *                        mode is enabled by default, but since it has a few</div><div class='del'>- *                        downfalls as well, you may want to disable it.</div><div class='del'>- *                        A short explanation of the pipelined operation mode</div><div class='del'>- *                        is available below.</div><div class='del'>- * Ver 1.2   Jan  1 96   Eliminated pipelined mode race condition.</div><div class='del'>- *                       Added pipeline read mode. As a result, restores</div><div class='del'>- *                        are now as fast as backups.</div><div class='del'>- *                       Optimized shared interface behavior. The new behavior</div><div class='del'>- *                        typically results in better IDE bus efficiency and</div><div class='del'>- *                        higher tape throughput.</div><div class='del'>- *                       Pre-calculation of the expected read/write request</div><div class='del'>- *                        service time, based on the tape's parameters. In</div><div class='del'>- *                        the pipelined operation mode, this allows us to</div><div class='del'>- *                        adjust our polling frequency to a much lower value,</div><div class='del'>- *                        and thus to dramatically reduce our load on Linux,</div><div class='del'>- *                        without any decrease in performance.</div><div class='del'>- *                       Implemented additional mtio.h operations.</div><div class='del'>- *                       The recommended user block size is returned by</div><div class='del'>- *                        the MTIOCGET ioctl.</div><div class='del'>- *                       Additional minor changes.</div><div class='del'>- * Ver 1.3   Feb  9 96   Fixed pipelined read mode bug which prevented the</div><div class='del'>- *                        use of some block sizes during a restore procedure.</div><div class='del'>- *                       The character device interface will now present a</div><div class='del'>- *                        continuous view of the media - any mix of block sizes</div><div class='del'>- *                        during a backup/restore procedure is supported. The</div><div class='del'>- *                        driver will buffer the requests internally and</div><div class='del'>- *                        convert them to the tape's recommended transfer</div><div class='del'>- *                        unit, making performance almost independent of the</div><div class='del'>- *                        chosen user block size.</div><div class='del'>- *                       Some improvements in error recovery.</div><div class='del'>- *                       By cooperating with ide-dma.c, bus mastering DMA can</div><div class='del'>- *                        now sometimes be used with IDE tape drives as well.</div><div class='del'>- *                        Bus mastering DMA has the potential to dramatically</div><div class='del'>- *                        reduce the CPU's overhead when accessing the device,</div><div class='del'>- *                        and can be enabled by using hdparm -d1 on the tape's</div><div class='del'>- *                        block device interface. For more info, read the</div><div class='del'>- *                        comments in ide-dma.c.</div><div class='del'>- * Ver 1.4   Mar 13 96   Fixed serialize support.</div><div class='del'>- * Ver 1.5   Apr 12 96   Fixed shared interface operation, broken in 1.3.85.</div><div class='del'>- *                       Fixed pipelined read mode inefficiency.</div><div class='del'>- *                       Fixed nasty null dereferencing bug.</div><div class='del'>- * Ver 1.6   Aug 16 96   Fixed FPU usage in the driver.</div><div class='del'>- *                       Fixed end of media bug.</div><div class='del'>- * Ver 1.7   Sep 10 96   Minor changes for the CONNER CTT8000-A model.</div><div class='del'>- * Ver 1.8   Sep 26 96   Attempt to find a better balance between good</div><div class='del'>- *                        interactive response and high system throughput.</div><div class='del'>- * Ver 1.9   Nov  5 96   Automatically cross encountered filemarks rather</div><div class='del'>- *                        than requiring an explicit FSF command.</div><div class='del'>- *                       Abort pending requests at end of media.</div><div class='del'>- *                       MTTELL was sometimes returning incorrect results.</div><div class='del'>- *                       Return the real block size in the MTIOCGET ioctl.</div><div class='del'>- *                       Some error recovery bug fixes.</div><div class='del'>- * Ver 1.10  Nov  5 96   Major reorganization.</div><div class='del'>- *                       Reduced CPU overhead a bit by eliminating internal</div><div class='del'>- *                        bounce buffers.</div><div class='del'>- *                       Added module support.</div><div class='del'>- *                       Added multiple tape drives support.</div><div class='del'>- *                       Added partition support.</div><div class='del'>- *                       Rewrote DSC handling.</div><div class='del'>- *                       Some portability fixes.</div><div class='del'>- *                       Removed ide-tape.h.</div><div class='del'>- *                       Additional minor changes.</div><div class='del'>- * Ver 1.11  Dec  2 96   Bug fix in previous DSC timeout handling.</div><div class='del'>- *                       Use ide_stall_queue() for DSC overlap.</div><div class='del'>- *                       Use the maximum speed rather than the current speed</div><div class='del'>- *                        to compute the request service time.</div><div class='del'>- * Ver 1.12  Dec  7 97   Fix random memory overwriting and/or last block data</div><div class='del'>- *                        corruption, which could occur if the total number</div><div class='del'>- *                        of bytes written to the tape was not an integral</div><div class='del'>- *                        number of tape blocks.</div><div class='del'>- *                       Add support for INTERRUPT DRQ devices.</div><div class='del'>- * Ver 1.13  Jan  2 98   Add "speed == 0" work-around for HP COLORADO 5GB</div><div class='del'>- * Ver 1.14  Dec 30 98   Partial fixes for the Sony/AIWA tape drives.</div><div class='del'>- *                       Replace cli()/sti() with hwgroup spinlocks.</div><div class='del'>- * Ver 1.15  Mar 25 99   Fix SMP race condition by replacing hwgroup</div><div class='del'>- *                        spinlock with private per-tape spinlock.</div><div class='del'>- * Ver 1.16  Sep  1 99   Add OnStream tape support.</div><div class='del'>- *                       Abort read pipeline on EOD.</div><div class='del'>- *                       Wait for the tape to become ready in case it returns</div><div class='del'>- *                        "in the process of becoming ready" on open().</div><div class='del'>- *                       Fix zero padding of the last written block in</div><div class='del'>- *                        case the tape block size is larger than PAGE_SIZE.</div><div class='del'>- *                       Decrease the default disconnection time to tn.</div><div class='del'>- * Ver 1.16e Oct  3 99   Minor fixes.</div><div class='del'>- * Ver 1.16e1 Oct 13 99  Patches by Arnold Niessen,</div><div class='del'>- *                          niessen@iae.nl / arnold.niessen@philips.com</div><div class='del'>- *                   GO-1)  Undefined code in idetape_read_position</div><div class='del'>- *				according to Gadi's email</div><div class='del'>- *                   AJN-1) Minor fix asc == 11 should be asc == 0x11</div><div class='del'>- *                               in idetape_issue_packet_command (did effect</div><div class='del'>- *                               debugging output only)</div><div class='del'>- *                   AJN-2) Added more debugging output, and</div><div class='del'>- *                              added ide-tape: where missing. I would also</div><div class='del'>- *				like to add tape-&gt;name where possible</div><div class='del'>- *                   AJN-3) Added different debug_level's</div><div class='del'>- *                              via /proc/ide/hdc/settings</div><div class='del'>- *				"debug_level" determines amount of debugging output;</div><div class='del'>- *				can be changed using /proc/ide/hdx/settings</div><div class='del'>- *				0 : almost no debugging output</div><div class='del'>- *				1 : 0+output errors only</div><div class='del'>- *				2 : 1+output all sensekey/asc</div><div class='del'>- *				3 : 2+follow all chrdev related procedures</div><div class='del'>- *				4 : 3+follow all procedures</div><div class='del'>- *				5 : 4+include pc_stack rq_stack info</div><div class='del'>- *				6 : 5+USE_COUNT updates</div><div class='del'>- *                   AJN-4) Fixed timeout for retension in idetape_queue_pc_tail</div><div class='del'>- *				from 5 to 10 minutes</div><div class='del'>- *                   AJN-5) Changed maximum number of blocks to skip when</div><div class='del'>- *                              reading tapes with multiple consecutive write</div><div class='del'>- *                              errors from 100 to 1000 in idetape_get_logical_blk</div><div class='del'>- *                   Proposed changes to code:</div><div class='del'>- *                   1) output "logical_blk_num" via /proc</div><div class='del'>- *                   2) output "current_operation" via /proc</div><div class='del'>- *                   3) Either solve or document the fact that `mt rewind' is</div><div class='del'>- *                      required after reading from /dev/nhtx to be</div><div class='del'>- *			able to rmmod the idetape module;</div><div class='del'>- *			Also, sometimes an application finishes but the</div><div class='del'>- *			device remains `busy' for some time. Same cause ?</div><div class='del'>- *                   Proposed changes to release-notes:</div><div class='del'>- *		     4) write a simple `quickstart' section in the</div><div class='del'>- *                      release notes; I volunteer if you don't want to</div><div class='del'>- *		     5) include a pointer to video4linux in the doc</div><div class='del'>- *                      to stimulate video applications</div><div class='del'>- *                   6) release notes lines 331 and 362: explain what happens</div><div class='del'>- *			if the application data rate is higher than 1100 KB/s;</div><div class='del'>- *			similar approach to lower-than-500 kB/s ?</div><div class='del'>- *		     7) 6.6 Comparison; wouldn't it be better to allow different</div><div class='del'>- *			strategies for read and write ?</div><div class='del'>- *			Wouldn't it be better to control the tape buffer</div><div class='del'>- *			contents instead of the bandwidth ?</div><div class='del'>- *		     8) line 536: replace will by would (if I understand</div><div class='del'>- *			this section correctly, a hypothetical and unwanted situation</div><div class='del'>- *			 is being described)</div><div class='del'>- * Ver 1.16f Dec 15 99   Change place of the secondary OnStream header frames.</div><div class='del'>- * Ver 1.17  Nov 2000 / Jan 2001  Marcel Mol, marcel@mesa.nl</div><div class='del'>- *			- Add idetape_onstream_mode_sense_tape_parameter_page</div><div class='del'>- *			  function to get tape capacity in frames: tape-&gt;capacity.</div><div class='del'>- *			- Add support for DI-50 drives( or any DI- drive).</div><div class='del'>- *			- 'workaround' for read error/blank block around block 3000.</div><div class='del'>- *			- Implement Early warning for end of media for Onstream.</div><div class='del'>- *			- Cosmetic code changes for readability.</div><div class='del'>- *			- Idetape_position_tape should not use SKIP bit during</div><div class='del'>- *			  Onstream read recovery.</div><div class='del'>- *			- Add capacity, logical_blk_num and first/last_frame_position</div><div class='del'>- *			  to /proc/ide/hd?/settings.</div><div class='del'>- *			- Module use count was gone in the Linux 2.4 driver.</div><div class='del'>- * Ver 1.17a Apr 2001 Willem Riede osst@riede.org</div><div class='del'>- *			- Get drive's actual block size from mode sense block descriptor</div><div class='del'>- *			- Limit size of pipeline</div><div class='del'>- * Ver 1.17b Oct 2002   Alan Stern &lt;stern@rowland.harvard.edu&gt;</div><div class='del'>- *			Changed IDETAPE_MIN_PIPELINE_STAGES to 1 and actually used</div><div class='del'>- *			 it in the code!</div><div class='del'>- *			Actually removed aborted stages in idetape_abort_pipeline</div><div class='del'>- *			 instead of just changing the command code.</div><div class='del'>- *			Made the transfer byte count for Request Sense equal to the</div><div class='del'>- *			 actual length of the data transfer.</div><div class='del'>- *			Changed handling of partial data transfers: they do not</div><div class='del'>- *			 cause DMA errors.</div><div class='del'>- *			Moved initiation of DMA transfers to the correct place.</div><div class='del'>- *			Removed reference to unallocated memory.</div><div class='del'>- *			Made __idetape_discard_read_pipeline return the number of</div><div class='del'>- *			 sectors skipped, not the number of stages.</div><div class='del'>- *			Replaced errant kfree() calls with __idetape_kfree_stage().</div><div class='del'>- *			Fixed off-by-one error in testing the pipeline length.</div><div class='del'>- *			Fixed handling of filemarks in the read pipeline.</div><div class='del'>- *			Small code optimization for MTBSF and MTBSFM ioctls.</div><div class='del'>- *			Don't try to unlock the door during device close if is</div><div class='del'>- *			 already unlocked!</div><div class='del'>- *			Cosmetic fixes to miscellaneous debugging output messages.</div><div class='del'>- *			Set the minimum /proc/ide/hd?/settings values for "pipeline",</div><div class='del'>- *			 "pipeline_min", and "pipeline_max" to 1.</div><div class='del'>- */</div><div class='head'>diff --git a/Documentation/ide/changelogs.rst b/Documentation/ide/changelogs.rst<br/>deleted file mode 100644<br/>index fdf9d0fb8027..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/changelogs.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/changelogs.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,17 +0,0 @@</div><div class='del'>-Changelog for ide cd</div><div class='del'>---------------------</div><div class='del'>-</div><div class='del'>- .. include:: ChangeLog.ide-cd.1994-2004</div><div class='del'>-    :literal:</div><div class='del'>-</div><div class='del'>-Changelog for ide floppy</div><div class='del'>-------------------------</div><div class='del'>-</div><div class='del'>- .. include:: ChangeLog.ide-floppy.1996-2002</div><div class='del'>-    :literal:</div><div class='del'>-</div><div class='del'>-Changelog for ide tape</div><div class='del'>-----------------------</div><div class='del'>-</div><div class='del'>- .. include:: ChangeLog.ide-tape.1995-2002</div><div class='del'>-    :literal:</div><div class='head'>diff --git a/Documentation/ide/ide-tape.rst b/Documentation/ide/ide-tape.rst<br/>deleted file mode 100644<br/>index 3e061d9c0e38..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/ide-tape.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/ide-tape.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,68 +0,0 @@</div><div class='del'>-===============================</div><div class='del'>-IDE ATAPI streaming tape driver</div><div class='del'>-===============================</div><div class='del'>-</div><div class='del'>-This driver is a part of the Linux ide driver.</div><div class='del'>-</div><div class='del'>-The driver, in co-operation with ide.c, basically traverses the</div><div class='del'>-request-list for the block device interface. The character device</div><div class='del'>-interface, on the other hand, creates new requests, adds them</div><div class='del'>-to the request-list of the block device, and waits for their completion.</div><div class='del'>-</div><div class='del'>-The block device major and minor numbers are determined from the</div><div class='del'>-tape's relative position in the ide interfaces, as explained in ide.c.</div><div class='del'>-</div><div class='del'>-The character device interface consists of the following devices::</div><div class='del'>-</div><div class='del'>-  ht0		major 37, minor 0	first  IDE tape, rewind on close.</div><div class='del'>-  ht1		major 37, minor 1	second IDE tape, rewind on close.</div><div class='del'>-  ...</div><div class='del'>-  nht0		major 37, minor 128	first  IDE tape, no rewind on close.</div><div class='del'>-  nht1		major 37, minor 129	second IDE tape, no rewind on close.</div><div class='del'>-  ...</div><div class='del'>-</div><div class='del'>-The general magnetic tape commands compatible interface, as defined by</div><div class='del'>-include/linux/mtio.h, is accessible through the character device.</div><div class='del'>-</div><div class='del'>-General ide driver configuration options, such as the interrupt-unmask</div><div class='del'>-flag, can be configured by issuing an ioctl to the block device interface,</div><div class='del'>-as any other ide device.</div><div class='del'>-</div><div class='del'>-Our own ide-tape ioctl's can be issued to either the block device or</div><div class='del'>-the character device interface.</div><div class='del'>-</div><div class='del'>-Maximal throughput with minimal bus load will usually be achieved in the</div><div class='del'>-following scenario:</div><div class='del'>-</div><div class='del'>-     1.	ide-tape is operating in the pipelined operation mode.</div><div class='del'>-     2.	No buffering is performed by the user backup program.</div><div class='del'>-</div><div class='del'>-Testing was done with a 2 GB CONNER CTMA 4000 IDE ATAPI Streaming Tape Drive.</div><div class='del'>-</div><div class='del'>-Here are some words from the first releases of hd.c, which are quoted</div><div class='del'>-in ide.c and apply here as well:</div><div class='del'>-</div><div class='del'>-* Special care is recommended.  Have Fun!</div><div class='del'>-</div><div class='del'>-Possible improvements</div><div class='del'>-=====================</div><div class='del'>-</div><div class='del'>-1. Support for the ATAPI overlap protocol.</div><div class='del'>-</div><div class='del'>-In order to maximize bus throughput, we currently use the DSC</div><div class='del'>-overlap method which enables ide.c to service requests from the</div><div class='del'>-other device while the tape is busy executing a command. The</div><div class='del'>-DSC overlap method involves polling the tape's status register</div><div class='del'>-for the DSC bit, and servicing the other device while the tape</div><div class='del'>-isn't ready.</div><div class='del'>-</div><div class='del'>-In the current QIC development standard (December 1995),</div><div class='del'>-it is recommended that new tape drives will *in addition*</div><div class='del'>-implement the ATAPI overlap protocol, which is used for the</div><div class='del'>-same purpose - efficient use of the IDE bus, but is interrupt</div><div class='del'>-driven and thus has much less CPU overhead.</div><div class='del'>-</div><div class='del'>-ATAPI overlap is likely to be supported in most new ATAPI</div><div class='del'>-devices, including new ATAPI cdroms, and thus provides us</div><div class='del'>-a method by which we can achieve higher throughput when</div><div class='del'>-sharing a (fast) ATA-2 disk with any (slow) new ATAPI device.</div><div class='head'>diff --git a/Documentation/ide/ide.rst b/Documentation/ide/ide.rst<br/>deleted file mode 100644<br/>index 88bdcba92f7d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/ide.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/ide.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,265 +0,0 @@</div><div class='del'>-============================================</div><div class='del'>-Information regarding the Enhanced IDE drive</div><div class='del'>-============================================</div><div class='del'>-</div><div class='del'>-   The hdparm utility can be used to control various IDE features on a</div><div class='del'>-   running system. It is packaged separately.  Please Look for it on popular</div><div class='del'>-   linux FTP sites.</div><div class='del'>-</div><div class='del'>--------------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-.. important::</div><div class='del'>-</div><div class='del'>-   BUGGY IDE CHIPSETS CAN CORRUPT DATA!!</div><div class='del'>-</div><div class='del'>-    PCI versions of the CMD640 and RZ1000 interfaces are now detected</div><div class='del'>-    automatically at startup when PCI BIOS support is configured.</div><div class='del'>-</div><div class='del'>-    Linux disables the "prefetch" ("readahead") mode of the RZ1000</div><div class='del'>-    to prevent data corruption possible due to hardware design flaws.</div><div class='del'>-</div><div class='del'>-    For the CMD640, linux disables "IRQ unmasking" (hdparm -u1) on any</div><div class='del'>-    drive for which the "prefetch" mode of the CMD640 is turned on.</div><div class='del'>-    If "prefetch" is disabled (hdparm -p8), then "IRQ unmasking" can be</div><div class='del'>-    used again.</div><div class='del'>-</div><div class='del'>-    For the CMD640, linux disables "32bit I/O" (hdparm -c1) on any drive</div><div class='del'>-    for which the "prefetch" mode of the CMD640 is turned off.</div><div class='del'>-    If "prefetch" is enabled (hdparm -p9), then "32bit I/O" can be</div><div class='del'>-    used again.</div><div class='del'>-</div><div class='del'>-    The CMD640 is also used on some Vesa Local Bus (VLB) cards, and is *NOT*</div><div class='del'>-    automatically detected by Linux.  For safe, reliable operation with such</div><div class='del'>-    interfaces, one *MUST* use the "cmd640.probe_vlb" kernel option.</div><div class='del'>-</div><div class='del'>-    Use of the "serialize" option is no longer necessary.</div><div class='del'>-</div><div class='del'>--------------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-Common pitfalls</div><div class='del'>-===============</div><div class='del'>-</div><div class='del'>-- 40-conductor IDE cables are capable of transferring data in DMA modes up to</div><div class='del'>-  udma2, but no faster.</div><div class='del'>-</div><div class='del'>-- If possible devices should be attached to separate channels if they are</div><div class='del'>-  available. Typically the disk on the first and CD-ROM on the second.</div><div class='del'>-</div><div class='del'>-- If you mix devices on the same cable, please consider using similar devices</div><div class='del'>-  in respect of the data transfer mode they support.</div><div class='del'>-</div><div class='del'>-- Even better try to stick to the same vendor and device type on the same</div><div class='del'>-  cable.</div><div class='del'>-</div><div class='del'>-This is the multiple IDE interface driver, as evolved from hd.c</div><div class='del'>-===============================================================</div><div class='del'>-</div><div class='del'>-It supports up to 9 IDE interfaces per default, on one or more IRQs (usually</div><div class='del'>-14 &amp; 15).  There can be up to two drives per interface, as per the ATA-6 spec.::</div><div class='del'>-</div><div class='del'>-  Primary:    ide0, port 0x1f0; major=3;  hda is minor=0; hdb is minor=64</div><div class='del'>-  Secondary:  ide1, port 0x170; major=22; hdc is minor=0; hdd is minor=64</div><div class='del'>-  Tertiary:   ide2, port 0x1e8; major=33; hde is minor=0; hdf is minor=64</div><div class='del'>-  Quaternary: ide3, port 0x168; major=34; hdg is minor=0; hdh is minor=64</div><div class='del'>-  fifth..     ide4, usually PCI, probed</div><div class='del'>-  sixth..     ide5, usually PCI, probed</div><div class='del'>-</div><div class='del'>-To access devices on interfaces &gt; ide0, device entries please make sure that</div><div class='del'>-device files for them are present in /dev.  If not, please create such</div><div class='del'>-entries, by using /dev/MAKEDEV.</div><div class='del'>-</div><div class='del'>-This driver automatically probes for most IDE interfaces (including all PCI</div><div class='del'>-ones), for the drives/geometries attached to those interfaces, and for the IRQ</div><div class='del'>-lines being used by the interfaces (normally 14, 15 for ide0/ide1).</div><div class='del'>-</div><div class='del'>-Any number of interfaces may share a single IRQ if necessary, at a slight</div><div class='del'>-performance penalty, whether on separate cards or a single VLB card.</div><div class='del'>-The IDE driver automatically detects and handles this.  However, this may</div><div class='del'>-or may not be harmful to your hardware.. two or more cards driving the same IRQ</div><div class='del'>-can potentially burn each other's bus driver, though in practice this</div><div class='del'>-seldom occurs.  Be careful, and if in doubt, don't do it!</div><div class='del'>-</div><div class='del'>-Drives are normally found by auto-probing and/or examining the CMOS/BIOS data.</div><div class='del'>-For really weird situations, the apparent (fdisk) geometry can also be specified</div><div class='del'>-on the kernel "command line" using LILO.  The format of such lines is::</div><div class='del'>-</div><div class='del'>-	ide_core.chs=[interface_number.device_number]:cyls,heads,sects</div><div class='del'>-</div><div class='del'>-or::</div><div class='del'>-</div><div class='del'>-	ide_core.cdrom=[interface_number.device_number]</div><div class='del'>-</div><div class='del'>-For example::</div><div class='del'>-</div><div class='del'>-	ide_core.chs=1.0:1050,32,64  ide_core.cdrom=1.1</div><div class='del'>-</div><div class='del'>-The results of successful auto-probing may override the physical geometry/irq</div><div class='del'>-specified, though the "original" geometry may be retained as the "logical"</div><div class='del'>-geometry for partitioning purposes (fdisk).</div><div class='del'>-</div><div class='del'>-If the auto-probing during boot time confuses a drive (ie. the drive works</div><div class='del'>-with hd.c but not with ide.c), then an command line option may be specified</div><div class='del'>-for each drive for which you'd like the drive to skip the hardware</div><div class='del'>-probe/identification sequence.  For example::</div><div class='del'>-</div><div class='del'>-	ide_core.noprobe=0.1</div><div class='del'>-</div><div class='del'>-or::</div><div class='del'>-</div><div class='del'>-	ide_core.chs=1.0:768,16,32</div><div class='del'>-	ide_core.noprobe=1.0</div><div class='del'>-</div><div class='del'>-Note that when only one IDE device is attached to an interface, it should be</div><div class='del'>-jumpered as "single" or "master", *not* "slave".  Many folks have had</div><div class='del'>-"trouble" with cdroms because of this requirement, so the driver now probes</div><div class='del'>-for both units, though success is more likely when the drive is jumpered</div><div class='del'>-correctly.</div><div class='del'>-</div><div class='del'>-Courtesy of Scott Snyder and others, the driver supports ATAPI cdrom drives</div><div class='del'>-such as the NEC-260 and the new MITSUMI triple/quad speed drives.</div><div class='del'>-Such drives will be identified at boot time, just like a hard disk.</div><div class='del'>-</div><div class='del'>-If for some reason your cdrom drive is *not* found at boot time, you can force</div><div class='del'>-the probe to look harder by supplying a kernel command line parameter</div><div class='del'>-via LILO, such as:::</div><div class='del'>-</div><div class='del'>-	ide_core.cdrom=1.0	/* "master" on second interface (hdc) */</div><div class='del'>-</div><div class='del'>-or::</div><div class='del'>-</div><div class='del'>-	ide_core.cdrom=1.1	/* "slave" on second interface (hdd) */</div><div class='del'>-</div><div class='del'>-For example, a GW2000 system might have a hard drive on the primary</div><div class='del'>-interface (/dev/hda) and an IDE cdrom drive on the secondary interface</div><div class='del'>-(/dev/hdc).  To mount a CD in the cdrom drive, one would use something like::</div><div class='del'>-</div><div class='del'>-	ln -sf /dev/hdc /dev/cdrom</div><div class='del'>-	mkdir /mnt/cdrom</div><div class='del'>-	mount /dev/cdrom /mnt/cdrom -t iso9660 -o ro</div><div class='del'>-</div><div class='del'>-If, after doing all of the above, mount doesn't work and you see</div><div class='del'>-errors from the driver (with dmesg) complaining about `status=0xff`,</div><div class='del'>-this means that the hardware is not responding to the driver's attempts</div><div class='del'>-to read it.  One of the following is probably the problem:</div><div class='del'>-</div><div class='del'>-  - Your hardware is broken.</div><div class='del'>-</div><div class='del'>-  - You are using the wrong address for the device, or you have the</div><div class='del'>-    drive jumpered wrong.  Review the configuration instructions above.</div><div class='del'>-</div><div class='del'>-  - Your IDE controller requires some nonstandard initialization sequence</div><div class='del'>-    before it will work properly.  If this is the case, there will often</div><div class='del'>-    be a separate MS-DOS driver just for the controller.  IDE interfaces</div><div class='del'>-    on sound cards usually fall into this category.  Such configurations</div><div class='del'>-    can often be made to work by first booting MS-DOS, loading the</div><div class='del'>-    appropriate drivers, and then warm-booting linux (without powering</div><div class='del'>-    off).  This can be automated using loadlin in the MS-DOS autoexec.</div><div class='del'>-</div><div class='del'>-If you always get timeout errors, interrupts from the drive are probably</div><div class='del'>-not making it to the host.  Check how you have the hardware jumpered</div><div class='del'>-and make sure it matches what the driver expects (see the configuration</div><div class='del'>-instructions above).  If you have a PCI system, also check the BIOS</div><div class='del'>-setup; I've had one report of a system which was shipped with IRQ 15</div><div class='del'>-disabled by the BIOS.</div><div class='del'>-</div><div class='del'>-The kernel is able to execute binaries directly off of the cdrom,</div><div class='del'>-provided it is mounted with the default block size of 1024 (as above).</div><div class='del'>-</div><div class='del'>-Please pass on any feedback on any of this stuff to the maintainer,</div><div class='del'>-whose address can be found in linux/MAINTAINERS.</div><div class='del'>-</div><div class='del'>-The IDE driver is modularized.  The high level disk/CD-ROM/tape/floppy</div><div class='del'>-drivers can always be compiled as loadable modules, the chipset drivers</div><div class='del'>-can only be compiled into the kernel, and the core code (ide.c) can be</div><div class='del'>-compiled as a loadable module provided no chipset support is needed.</div><div class='del'>-</div><div class='del'>-When using ide.c as a module in combination with kmod, add::</div><div class='del'>-</div><div class='del'>-	alias block-major-3 ide-probe</div><div class='del'>-</div><div class='del'>-to a configuration file in /etc/modprobe.d/.</div><div class='del'>-</div><div class='del'>-When ide.c is used as a module, you can pass command line parameters to the</div><div class='del'>-driver using the "options=" keyword to insmod, while replacing any ',' with</div><div class='del'>-';'.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Summary of ide driver parameters for kernel command line</div><div class='del'>-========================================================</div><div class='del'>-</div><div class='del'>-For legacy IDE VLB host drivers (ali14xx/dtc2278/ht6560b/qd65xx/umc8672)</div><div class='del'>-you need to explicitly enable probing by using "probe" kernel parameter,</div><div class='del'>-i.e. to enable probing for ALI M14xx chipsets (ali14xx host driver) use:</div><div class='del'>-</div><div class='del'>-* "ali14xx.probe" boot option when ali14xx driver is built-in the kernel</div><div class='del'>-</div><div class='del'>-* "probe" module parameter when ali14xx driver is compiled as module</div><div class='del'>-  ("modprobe ali14xx probe")</div><div class='del'>-</div><div class='del'>-Also for legacy CMD640 host driver (cmd640) you need to use "probe_vlb"</div><div class='del'>-kernel paremeter to enable probing for VLB version of the chipset (PCI ones</div><div class='del'>-are detected automatically).</div><div class='del'>-</div><div class='del'>-You also need to use "probe" kernel parameter for ide-4drives driver</div><div class='del'>-(support for IDE generic chipset with four drives on one port).</div><div class='del'>-</div><div class='del'>-To enable support for IDE doublers on Amiga use "doubler" kernel parameter</div><div class='del'>-for gayle host driver (i.e. "gayle.doubler" if the driver is built-in).</div><div class='del'>-</div><div class='del'>-To force ignoring cable detection (this should be needed only if you're using</div><div class='del'>-short 40-wires cable which cannot be automatically detected - if this is not</div><div class='del'>-a case please report it as a bug instead) use "ignore_cable" kernel parameter:</div><div class='del'>-</div><div class='del'>-* "ide_core.ignore_cable=[interface_number]" boot option if IDE is built-in</div><div class='del'>-  (i.e. "ide_core.ignore_cable=1" to force ignoring cable for "ide1")</div><div class='del'>-</div><div class='del'>-* "ignore_cable=[interface_number]" module parameter (for ide_core module)</div><div class='del'>-  if IDE is compiled as module</div><div class='del'>-</div><div class='del'>-Other kernel parameters for ide_core are:</div><div class='del'>-</div><div class='del'>-* "nodma=[interface_number.device_number]" to disallow DMA for a device</div><div class='del'>-</div><div class='del'>-* "noflush=[interface_number.device_number]" to disable flush requests</div><div class='del'>-</div><div class='del'>-* "nohpa=[interface_number.device_number]" to disable Host Protected Area</div><div class='del'>-</div><div class='del'>-* "noprobe=[interface_number.device_number]" to skip probing</div><div class='del'>-</div><div class='del'>-* "nowerr=[interface_number.device_number]" to ignore the WRERR_STAT bit</div><div class='del'>-</div><div class='del'>-* "cdrom=[interface_number.device_number]" to force device as a CD-ROM</div><div class='del'>-</div><div class='del'>-* "chs=[interface_number.device_number]" to force device as a disk (using CHS)</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Some Terminology</div><div class='del'>-================</div><div class='del'>-</div><div class='del'>-IDE</div><div class='del'>-  Integrated Drive Electronics, meaning that each drive has a built-in</div><div class='del'>-  controller, which is why an "IDE interface card" is not a "controller card".</div><div class='del'>-</div><div class='del'>-ATA</div><div class='del'>-  AT (the old IBM 286 computer) Attachment Interface, a draft American</div><div class='del'>-  National Standard for connecting hard drives to PCs.  This is the official</div><div class='del'>-  name for "IDE".</div><div class='del'>-</div><div class='del'>-  The latest standards define some enhancements, known as the ATA-6 spec,</div><div class='del'>-  which grew out of vendor-specific "Enhanced IDE" (EIDE) implementations.</div><div class='del'>-</div><div class='del'>-ATAPI</div><div class='del'>-  ATA Packet Interface, a new protocol for controlling the drives,</div><div class='del'>-  similar to SCSI protocols, created at the same time as the ATA2 standard.</div><div class='del'>-  ATAPI is currently used for controlling CDROM, TAPE and FLOPPY (ZIP or</div><div class='del'>-  LS120/240) devices, removable R/W cartridges, and for high capacity hard disk</div><div class='del'>-  drives.</div><div class='del'>-</div><div class='del'>-mlord@pobox.com</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Wed Apr 17 22:52:44 CEST 2002 edited by Marcin Dalecki, the current</div><div class='del'>-maintainer.</div><div class='del'>-</div><div class='del'>-Wed Aug 20 22:31:29 CEST 2003 updated ide boot options to current ide.c</div><div class='del'>-comments at 2.6.0-test4 time. Maciej Soltysiak &lt;solt@dns.toxicfilms.tv&gt;</div><div class='head'>diff --git a/Documentation/ide/index.rst b/Documentation/ide/index.rst<br/>deleted file mode 100644<br/>index 813dfe611a31..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/index.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,21 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-==================================</div><div class='del'>-Integrated Drive Electronics (IDE)</div><div class='del'>-==================================</div><div class='del'>-</div><div class='del'>-.. toctree::</div><div class='del'>-    :maxdepth: 1</div><div class='del'>-</div><div class='del'>-    ide</div><div class='del'>-    ide-tape</div><div class='del'>-    warm-plug-howto</div><div class='del'>-</div><div class='del'>-    changelogs</div><div class='del'>-</div><div class='del'>-.. only::  subproject and html</div><div class='del'>-</div><div class='del'>-   Indices</div><div class='del'>-   =======</div><div class='del'>-</div><div class='del'>-   * :ref:`genindex`</div><div class='head'>diff --git a/Documentation/ide/warm-plug-howto.rst b/Documentation/ide/warm-plug-howto.rst<br/>deleted file mode 100644<br/>index c245242ef2f1..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/ide/warm-plug-howto.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/ide/warm-plug-howto.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-===================</div><div class='del'>-IDE warm-plug HOWTO</div><div class='del'>-===================</div><div class='del'>-</div><div class='del'>-To warm-plug devices on a port 'idex'::</div><div class='del'>-</div><div class='del'>-	# echo -n "1" &gt; /sys/class/ide_port/idex/delete_devices</div><div class='del'>-</div><div class='del'>-unplug old device(s) and plug new device(s)::</div><div class='del'>-</div><div class='del'>-	# echo -n "1" &gt; /sys/class/ide_port/idex/scan</div><div class='del'>-</div><div class='del'>-done</div><div class='del'>-</div><div class='del'>-NOTE: please make sure that partitions are unmounted and that there are</div><div class='del'>-no other active references to devices before doing "delete_devices" step,</div><div class='del'>-also do not attempt "scan" step on devices currently in use -- otherwise</div><div class='del'>-results may be unpredictable and lead to data loss if you're unlucky</div><div class='head'>diff --git a/Documentation/iio/bno055.rst b/Documentation/iio/bno055.rst<br/>new file mode 100644<br/>index 000000000000..9a489a79d8f5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/iio/bno055.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/iio/bno055.rst</a></div><div class='hunk'>@@ -0,0 +1,51 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==============================</div><div class='add'>+BNO055 driver</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+1. Overview</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+This driver supports Bosch BNO055 IMUs (on both serial and I2C busses).</div><div class='add'>+</div><div class='add'>+Accelerometer, magnetometer and gyroscope measures are always provided.</div><div class='add'>+When "fusion_enable" sysfs attribute is set to 1, orientation (both Euler</div><div class='add'>+angles and quaternion), linear velocity and gravity vector are also</div><div class='add'>+provided, but some sensor settings (e.g. low pass filtering and range)</div><div class='add'>+became locked (the IMU firmware controls them).</div><div class='add'>+</div><div class='add'>+This driver supports also IIO buffers.</div><div class='add'>+</div><div class='add'>+2. Calibration</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+The IMU continuously performs an autocalibration procedure if (and only if)</div><div class='add'>+operating in fusion mode. The magnetometer autocalibration can however be</div><div class='add'>+disabled writing 0 in the sysfs in_magn_calibration_fast_enable attribute.</div><div class='add'>+</div><div class='add'>+The driver provides access to autocalibration flags (i.e. you can known if</div><div class='add'>+the IMU has successfully autocalibrated) and to the calibration data blob.</div><div class='add'>+</div><div class='add'>+The user can save this blob in a firmware file (i.e. in /lib/firmware) that</div><div class='add'>+the driver looks for at probe time. If found, then the IMU is initialized</div><div class='add'>+with this calibration data. This saves the user from performing the</div><div class='add'>+calibration procedure every time (which consist of moving the IMU in</div><div class='add'>+various way).</div><div class='add'>+</div><div class='add'>+The driver looks for calibration data file using two different names: first</div><div class='add'>+a file whose name is suffixed with the IMU unique ID (exposed in sysfs as</div><div class='add'>+serial_number) is searched for; this is useful when there is more than one</div><div class='add'>+IMU instance. If this file is not found, then a "generic" calibration file</div><div class='add'>+is searched for (which can be used when only one IMU is present, without</div><div class='add'>+struggling with fancy names, that change on each device).</div><div class='add'>+</div><div class='add'>+Valid calibration file names would be e.g.</div><div class='add'>+ bno055-caldata-0e7c26a33541515120204a35342b04ff.dat</div><div class='add'>+ bno055-caldata.dat</div><div class='add'>+</div><div class='add'>+In non-fusion mode the IIO 'offset' attributes provide access to the</div><div class='add'>+offsets from calibration data (if any), so that the user can apply them to</div><div class='add'>+the accel, angvel and magn IIO attributes. In fusion mode they are not</div><div class='add'>+needed (the IMU firmware internally applies those corrections) and they</div><div class='add'>+read as zero.</div><div class='head'>diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst<br/>index 58b7a4ebac51..1b7292c58cd0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/iio/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/iio/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/iio/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/iio/index.rst</a></div><div class='hunk'>@@ -10,3 +10,5 @@ Industrial I/O</div><div class='ctx'>    iio_configfs</div><div class='ctx'> </div><div class='ctx'>    ep93xx_adc</div><div class='add'>+</div><div class='add'>+   bno055</div><div class='head'>diff --git a/Documentation/COPYING-logo b/Documentation/images/COPYING-logo<br/>index b21c7cf7d9f6..6a441d453cb5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/COPYING-logo?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/COPYING-logo</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/images/COPYING-logo?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/images/COPYING-logo</a></div><div class='hunk'>@@ -11,3 +11,11 @@ Larry's web-page:</div><div class='ctx'> </div><div class='ctx'> 	https://www.isc.tamu.edu/~lewing/linux/</div><div class='ctx'> </div><div class='add'>+The SVG version was re-illustrated in vector by Garrett LeSage and</div><div class='add'>+refined and cleaned up by IFo Hancroft. It is also freely usable</div><div class='add'>+as long as you acknowledge Larry, Garrett and IFo as above.</div><div class='add'>+</div><div class='add'>+There are also black-and-white and inverted vector versions at</div><div class='add'>+Garrett's repository:</div><div class='add'>+</div><div class='add'>+	https://github.com/garrett/Tux</div><div class='head'>diff --git a/Documentation/logo.gif b/Documentation/images/logo.gif<br/>index 2eae75fecfb9..2eae75fecfb9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/logo.gif?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/logo.gif</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/images/logo.gif?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/images/logo.gif</a></div>Binary files differ<div class='head'>diff --git a/Documentation/images/logo.svg b/Documentation/images/logo.svg<br/>new file mode 100644<br/>index 000000000000..58a6881c74b6<br/>--- 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&lt;linearGradient</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="linearGradient14830-4"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#7c7c7c;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop14832-6" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#7c7c7c;stop-opacity:0.32941177"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop14834-5" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.3012044"</div><div class='add'>+       y="-0.15060219"</div><div class='add'>+       width="1.1409113"</div><div class='add'>+       x="-0.070455663"</div><div class='add'>+       id="filter14812-5"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14814-2"</div><div class='add'>+         stdDeviation="1.0252435"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="linearGradient14830-8-1"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#7c7c7c;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop14832-2-5" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#7c7c7c;stop-opacity:0.32941177"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop14834-8-0" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.3012044"</div><div class='add'>+       y="-0.15060219"</div><div class='add'>+       width="1.1409113"</div><div class='add'>+       x="-0.070455663"</div><div class='add'>+       id="filter14812-0-9"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14814-6-7"</div><div class='add'>+         stdDeviation="1.0252435"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient14518-6"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#110800;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop14540-0" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop14542-5"</div><div class='add'>+         offset="0.59066743"</div><div class='add'>+         style="stop-color:#a65a00;stop-opacity:0.80000001;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop14522-4"</div><div class='add'>+         offset="1"</div><div class='add'>+         style="stop-color:#ff921e;stop-opacity:0;" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect29716-0-0"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.4681805"</div><div class='add'>+       y="-0.23409025"</div><div class='add'>+       width="1.4010103"</div><div class='add'>+       x="-0.20050517"</div><div class='add'>+       id="filter14897-2"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14899-5"</div><div class='add'>+         stdDeviation="2.8444356"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient14518-2-2"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#110800;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop14540-5-0" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop14542-2-7"</div><div class='add'>+         offset="0.59066743"</div><div class='add'>+         style="stop-color:#a65a00;stop-opacity:0.80000001;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop14522-2-1"</div><div class='add'>+         offset="1"</div><div class='add'>+         style="stop-color:#ff921e;stop-opacity:0;" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect29716-0-8-3"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.2134444"</div><div class='add'>+       y="-0.10672215"</div><div class='add'>+       width="1.1828213"</div><div class='add'>+       x="-0.091410659"</div><div class='add'>+       id="filter14951-8"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14953-7"</div><div class='add'>+         stdDeviation="1.2967831"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.5474488"</div><div class='add'>+       y="-0.27372435"</div><div class='add'>+       width="1.9386586"</div><div class='add'>+       x="-0.46932927"</div><div class='add'>+       id="filter15211-9"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur15213-7"</div><div class='add'>+         stdDeviation="0.85991809"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.9645272"</div><div class='add'>+       y="-0.48226368"</div><div class='add'>+       width="2.2077935"</div><div class='add'>+       x="-0.60389674"</div><div class='add'>+       id="filter14706-3"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14708-8"</div><div class='add'>+         stdDeviation="2.6400036"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient15103-0"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop15105-1"</div><div class='add'>+         offset="0"</div><div class='add'>+         style="stop-color:#000000;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop15107-6"</div><div class='add'>+         offset="1"</div><div class='add'>+         style="stop-color:#000000;stop-opacity:0;" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       id="filter15115-3"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur15117-8"</div><div class='add'>+         stdDeviation="2.2091576"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient14392-8"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop14394-3"</div><div class='add'>+         offset="0"</div><div class='add'>+         style="stop-color:#3e2a06;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop14396-0"</div><div class='add'>+         offset="1"</div><div class='add'>+         style="stop-color:#ad780a;stop-opacity:1" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       is_visible="true"</div><div class='add'>+       id="path-effect14300-7"</div><div class='add'>+       effect="spiro" /&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       is_visible="true"</div><div class='add'>+       id="path-effect14300-2-7"</div><div class='add'>+       effect="spiro" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.2859976"</div><div class='add'>+       y="-0.14299878"</div><div class='add'>+       width="1.2900307"</div><div class='add'>+       x="-0.14501533"</div><div class='add'>+       id="filter14416-8"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14418-5"</div><div class='add'>+         stdDeviation="4.7787162"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       is_visible="true"</div><div class='add'>+       id="path-effect14300-2-2-0"</div><div class='add'>+       effect="spiro" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.2498901"</div><div class='add'>+       y="-0.12494507"</div><div class='add'>+       width="1.2305853"</div><div class='add'>+       x="-0.11529266"</div><div class='add'>+       id="filter14432-2"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14434-2"</div><div class='add'>+         stdDeviation="3.1725155"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient17009"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop17011"</div><div class='add'>+         offset="0"</div><div class='add'>+         style="stop-color:#f3cd0c;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop17013"</div><div class='add'>+         offset="1"</div><div class='add'>+         style="stop-color:#f3cd0c;stop-opacity:0;" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.2585374"</div><div class='add'>+       y="-0.12926871"</div><div class='add'>+       width="1.0418237"</div><div class='add'>+       x="-0.020911871"</div><div class='add'>+       id="filter17044"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur17046"</div><div class='add'>+         stdDeviation="0.47946431"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.3188565"</div><div class='add'>+       y="-0.15942827"</div><div class='add'>+       width="1.3550917"</div><div class='add'>+       x="-0.17754583"</div><div class='add'>+       id="filter15185-2"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur15187-7"</div><div class='add'>+         stdDeviation="0.90083196"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect4582-3"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter4592-2"</div><div class='add'>+       x="-0.81659585"</div><div class='add'>+       width="2.6331918"</div><div class='add'>+       y="-0.057823781"</div><div class='add'>+       height="1.1156476"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="1.4463082"</div><div class='add'>+         id="feGaussianBlur4594-6" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="linearGradient4417-8-5"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#000000;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop4419-4-4" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#000000;stop-opacity:0.24886878"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop4421-2-0" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect4500-7"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter4538-7"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.7854602"</div><div class='add'>+         id="feGaussianBlur4540-9" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter4427-5-7"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="1.1383167"</div><div class='add'>+         id="feGaussianBlur4429-4-8" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="linearGradient4417-0"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#000000;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop4419-8" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#000000;stop-opacity:0.24886878"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop4421-8" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter4487-6"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.6434074"</div><div class='add'>+         id="feGaussianBlur4489-4" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.0800927"</div><div class='add'>+       y="-0.040046327"</div><div class='add'>+       width="1.2350631"</div><div class='add'>+       x="-0.11753157"</div><div class='add'>+       id="filter14666-9"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14668-7"</div><div class='add'>+         stdDeviation="1.352085"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect29707-7-6"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient29652-2"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29654-6"</div><div class='add'>+         offset="0"</div><div class='add'>+         style="stop-color:#c8c8c8;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29656-1"</div><div class='add'>+         offset="1"</div><div class='add'>+         style="stop-color:#797978;stop-opacity:1" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect29553-7"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient28469-0"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28479-4"</div><div class='add'>+         offset="0"</div><div class='add'>+         style="stop-color:#d2940a;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28477-2"</div><div class='add'>+         offset="0.75143719"</div><div class='add'>+         style="stop-color:#d89c08;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#b67e07;stop-opacity:1;"</div><div class='add'>+         offset="0.86579126"</div><div class='add'>+         id="stop28485-7" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#946106;stop-opacity:1"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28473-1" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28463-4"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28489-4"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter28502-8"</div><div class='add'>+       x="-0.1548306"</div><div class='add'>+       width="1.3096611"</div><div class='add'>+       y="-0.21494099"</div><div class='add'>+       height="1.429882"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.89858666"</div><div class='add'>+         id="feGaussianBlur28504-3" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28273-54-7"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       id="filter15145-6"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur15147-1"</div><div class='add'>+         stdDeviation="0.75821369"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient28275-8"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#ad780a;stop-opacity:1"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop28277-1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28291-9"</div><div class='add'>+         offset="0.11972899"</div><div class='add'>+         style="stop-color:#d89e08;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28289-6"</div><div class='add'>+         offset="0.25514477"</div><div class='add'>+         style="stop-color:#edb80b;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28287-6"</div><div class='add'>+         offset="0.39194193"</div><div class='add'>+         style="stop-color:#ebc80d;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28285-7"</div><div class='add'>+         offset="0.52741116"</div><div class='add'>+         style="stop-color:#f5d838;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28283-7"</div><div class='add'>+         offset="0.76906693"</div><div class='add'>+         style="stop-color:#f6d811;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#f5cd31;stop-opacity:1"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28279-5" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28273-44"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28384-7"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.260552"</div><div class='add'>+       y="-0.13027605"</div><div class='add'>+       width="1.3219118"</div><div class='add'>+       x="-0.16095592"</div><div class='add'>+       id="filter14963-7"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur14965-0"</div><div class='add'>+         stdDeviation="0.84878819"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient29529-6"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#3a2903;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop29531-0" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29539-7"</div><div class='add'>+         offset="0.55472803"</div><div class='add'>+         style="stop-color:#735208;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#ac8c04;stop-opacity:1"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop29533-8" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       id="filter15177-1"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur15179-3"</div><div class='add'>+         stdDeviation="0.11039302"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.2114592"</div><div class='add'>+       y="-0.10572958"</div><div class='add'>+       width="1.2328929"</div><div class='add'>+       x="-0.11644644"</div><div class='add'>+       id="filter15173-0"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur15175-4"</div><div class='add'>+         stdDeviation="0.11039302"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="linearGradient28572-7"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#f5ce2d;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop28574-5" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#d79b08;stop-opacity:1"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28576-0" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter28584-4"</div><div class='add'>+       x="-0.10730159"</div><div class='add'>+       width="1.2146032"</div><div class='add'>+       y="-0.13610739"</div><div class='add'>+       height="1.2722148"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.2640625"</div><div class='add'>+         id="feGaussianBlur28586-3" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect29455-3"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient29477-3"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#757574;stop-opacity:0"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop29479-5" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29487-5"</div><div class='add'>+         offset="0.26291031"</div><div class='add'>+         style="stop-color:#757574;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29485-0"</div><div class='add'>+         offset="0.5"</div><div class='add'>+         style="stop-color:#757574;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#757574;stop-opacity:0"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop29481-3" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter29493-2"</div><div class='add'>+       x="-0.23446631"</div><div class='add'>+       width="1.4689326"</div><div class='add'>+       y="-0.14606842"</div><div class='add'>+       height="1.2921369"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.51262416"</div><div class='add'>+         id="feGaussianBlur29495-7" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient29336-6"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#646464;stop-opacity:0"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop29338-1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29344-7"</div><div class='add'>+         offset="0.30628255"</div><div class='add'>+         style="stop-color:#646464;stop-opacity:0.5825243" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#646464;stop-opacity:1"</div><div class='add'>+         offset="0.47000006"</div><div class='add'>+         id="stop29354-5" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29356-3"</div><div class='add'>+         offset="0.72834015"</div><div class='add'>+         style="stop-color:#646464;stop-opacity:0.25728154" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#646464;stop-opacity:0;"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop29340-6" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter29447-1"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.13475369"</div><div class='add'>+         id="feGaussianBlur29449-4" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter29350-1"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.1475"</div><div class='add'>+         id="feGaussianBlur29352-7" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient28976-3"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#747474;stop-opacity:1"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop28978-7" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29259-5"</div><div class='add'>+         offset="0.125"</div><div class='add'>+         style="stop-color:#8c8c8c;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop29257-0"</div><div class='add'>+         offset="0.25"</div><div class='add'>+         style="stop-color:#a4a4a4;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28984-4"</div><div class='add'>+         offset="0.5"</div><div class='add'>+         style="stop-color:#d4d4d4;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#d4d4d4;stop-opacity:1"</div><div class='add'>+         offset="0.61919296"</div><div class='add'>+         id="stop28986-0" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#7c7c7c;stop-opacity:1"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28980-2" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28974-8"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28881-6"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter28927-8"</div><div class='add'>+       x="-0.15795375"</div><div class='add'>+       width="1.3159075"</div><div class='add'>+       y="-0.2091987"</div><div class='add'>+       height="1.4183974"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.24891089"</div><div class='add'>+         id="feGaussianBlur28929-2" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient28935-8"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#949494;stop-opacity:0.39215687;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop28937-7" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28943-3"</div><div class='add'>+         offset="0.5"</div><div class='add'>+         style="stop-color:#949494;stop-opacity:1;" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#949494;stop-opacity:0.39215687;"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28939-8" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter28949-8"</div><div class='add'>+       x="-0.17867894"</div><div class='add'>+       width="1.3573579"</div><div class='add'>+       y="-0.18134074"</div><div class='add'>+       height="1.3626815"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.51947927"</div><div class='add'>+         id="feGaussianBlur28951-1" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       height="1.6165009"</div><div class='add'>+       y="-0.30825046"</div><div class='add'>+       width="1.5843594"</div><div class='add'>+       x="-0.2921797"</div><div class='add'>+       id="filter15133-1"</div><div class='add'>+       inkscape:collect="always"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         id="feGaussianBlur15135-5"</div><div class='add'>+         stdDeviation="1.7403319"</div><div class='add'>+         inkscape:collect="always" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient28853-5"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#020204;stop-opacity:1"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop28855-3" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28865-0"</div><div class='add'>+         offset="0.73448181"</div><div class='add'>+         style="stop-color:#020204;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#5c5c5c;stop-opacity:1;"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28857-9" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28851-0"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28273-4-2"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient28799-3"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#fefefc;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop28801-6" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28807-7"</div><div class='add'>+         offset="0.75733864"</div><div class='add'>+         style="stop-color:#fefefc;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#d4d4d4;stop-opacity:1"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28803-0" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28797-81"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;linearGradient</div><div class='add'>+       id="linearGradient28799-5-5"&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#fefefc;stop-opacity:1;"</div><div class='add'>+         offset="0"</div><div class='add'>+         id="stop28801-1-9" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         id="stop28807-2-6"</div><div class='add'>+         offset="0.75733864"</div><div class='add'>+         style="stop-color:#fefefc;stop-opacity:1" /&gt;</div><div class='add'>+      &lt;stop</div><div class='add'>+         style="stop-color:#d4d4d4;stop-opacity:1"</div><div class='add'>+         offset="1"</div><div class='add'>+         id="stop28803-6-3" /&gt;</div><div class='add'>+    &lt;/linearGradient&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28797-8-1"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28463-0-7"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter30475-4"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="0.93152507"</div><div class='add'>+         id="feGaussianBlur30477-9" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28463-8-0"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;filter</div><div class='add'>+       style="color-interpolation-filters:sRGB"</div><div class='add'>+       inkscape:collect="always"</div><div class='add'>+       id="filter30479-2"</div><div class='add'>+       x="-0.07637769"</div><div class='add'>+       width="1.1527554"</div><div class='add'>+       y="-0.12919053"</div><div class='add'>+       height="1.2583811"&gt;</div><div class='add'>+      &lt;feGaussianBlur</div><div class='add'>+         inkscape:collect="always"</div><div class='add'>+         stdDeviation="2.0355046"</div><div class='add'>+         id="feGaussianBlur30481-9" /&gt;</div><div class='add'>+    &lt;/filter&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect29721-2"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    &lt;inkscape:path-effect</div><div class='add'>+       effect="spiro"</div><div class='add'>+       id="path-effect28714-5"</div><div class='add'>+       is_visible="true" /&gt;</div><div class='add'>+    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2.608083,2.328125 0 0 1 -2.60808,-2.32812 2.608083,2.328125 0 0 1 2.60808,-2.32813 2.608083,2.328125 0 0 1 2.60809,2.32813 z"</div><div class='add'>+               style="color:#000000;display:inline;overflow:visible;visibility:visible;fill:url(#linearGradient18830);fill-opacity:1;fill-rule:nonzero;stroke:none;stroke-width:0.25;marker:none;filter:url(#filter28584-4);enable-background:accumulate"</div><div class='add'>+               transform="matrix(1.0956223,0,-0.17017853,1.5181314,-76.24447,-140.47964)" /&gt;</div><div class='add'>+          &lt;/g&gt;</div><div class='add'>+        &lt;/g&gt;</div><div class='add'>+      &lt;/g&gt;</div><div class='add'>+    &lt;/g&gt;</div><div class='add'>+  &lt;/g&gt;</div><div class='add'>+&lt;/svg&gt;</div><div class='head'>diff --git a/Documentation/index.rst b/Documentation/index.rst<br/>index 1988c19d9daf..9dfdc826618c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/index.rst</a></div><div class='hunk'>@@ -1,13 +1,8 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-.. The Linux Kernel documentation master file, created by</div><div class='del'>-   sphinx-quickstart on Fri Feb 12 13:51:46 2016.</div><div class='del'>-   You can adapt this file completely to your liking, but it should at least</div><div class='del'>-   contain the root `toctree` directive.</div><div class='del'>-</div><div class='ctx'> .. _linux_doc:</div><div class='ctx'> </div><div class='add'>+==============================</div><div class='ctx'> The Linux Kernel documentation</div><div class='ctx'> ==============================</div><div class='ctx'> </div><div class='hunk'>@@ -18,162 +13,110 @@ documents into a coherent whole.  Please note that improvements to the</div><div class='ctx'> documentation are welcome; join the linux-doc list at vger.kernel.org if</div><div class='ctx'> you want to help out.</div><div class='ctx'> </div><div class='del'>-Licensing documentation</div><div class='del'>------------------------</div><div class='del'>-</div><div class='del'>-The following describes the license of the Linux kernel source code</div><div class='del'>-(GPLv2), how to properly mark the license of individual files in the source</div><div class='del'>-tree, as well as links to the full license text.</div><div class='del'>-</div><div class='del'>-* :ref:`kernel_licensing`</div><div class='del'>-</div><div class='del'>-User-oriented documentation</div><div class='del'>----------------------------</div><div class='add'>+Working with the development community</div><div class='add'>+======================================</div><div class='ctx'> </div><div class='del'>-The following manuals are written for *users* of the kernel — those who are</div><div class='del'>-trying to get it to work optimally on a given system.</div><div class='add'>+The essential guides for interacting with the kernel's development</div><div class='add'>+community and getting your work upstream.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='del'>-</div><div class='del'>-   admin-guide/index</div><div class='del'>-   kbuild/index</div><div class='del'>-</div><div class='del'>-Firmware-related documentation</div><div class='del'>-------------------------------</div><div class='del'>-The following holds information on the kernel's expectations regarding the</div><div class='del'>-platform firmwares.</div><div class='add'>+   :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-.. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='add'>+   process/development-process</div><div class='add'>+   process/submitting-patches</div><div class='add'>+   Code of conduct &lt;process/code-of-conduct&gt;</div><div class='add'>+   maintainer/index</div><div class='add'>+   All development-process docs &lt;process/index&gt;</div><div class='ctx'> </div><div class='del'>-   firmware-guide/index</div><div class='del'>-   devicetree/index</div><div class='ctx'> </div><div class='del'>-Application-developer documentation</div><div class='del'>------------------------------------</div><div class='add'>+Internal API manuals</div><div class='add'>+====================</div><div class='ctx'> </div><div class='del'>-The user-space API manual gathers together documents describing aspects of</div><div class='del'>-the kernel interface as seen by application developers.</div><div class='add'>+Manuals for use by developers working to interface with the rest of the</div><div class='add'>+kernel.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='del'>-</div><div class='del'>-   userspace-api/index</div><div class='add'>+   :maxdepth: 1</div><div class='ctx'> </div><div class='add'>+   core-api/index</div><div class='add'>+   driver-api/index</div><div class='add'>+   subsystem-apis</div><div class='add'>+   Locking in the kernel &lt;locking/index&gt;</div><div class='ctx'> </div><div class='del'>-Introduction to kernel development</div><div class='del'>-----------------------------------</div><div class='add'>+Development tools and processes</div><div class='add'>+===============================</div><div class='ctx'> </div><div class='del'>-These manuals contain overall information about how to develop the kernel.</div><div class='del'>-The kernel community is quite large, with thousands of developers</div><div class='del'>-contributing over the course of a year.  As with any large community,</div><div class='del'>-knowing how things are done will make the process of getting your changes</div><div class='del'>-merged much easier.</div><div class='add'>+Various other manuals with useful information for all kernel developers.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='add'>+   :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-   process/index</div><div class='del'>-   dev-tools/index</div><div class='add'>+   process/license-rules</div><div class='ctx'>    doc-guide/index</div><div class='add'>+   dev-tools/index</div><div class='add'>+   dev-tools/testing-overview</div><div class='ctx'>    kernel-hacking/index</div><div class='ctx'>    trace/index</div><div class='del'>-   maintainer/index</div><div class='ctx'>    fault-injection/index</div><div class='ctx'>    livepatch/index</div><div class='add'>+   rust/index</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Kernel API documentation</div><div class='del'>-------------------------</div><div class='add'>+User-oriented documentation</div><div class='add'>+===========================</div><div class='ctx'> </div><div class='del'>-These books get into the details of how specific kernel subsystems work</div><div class='del'>-from the point of view of a kernel developer.  Much of the information here</div><div class='del'>-is taken directly from the kernel source, with supplemental material added</div><div class='del'>-as needed (or at least as we managed to add it — probably *not* all that is</div><div class='del'>-needed).</div><div class='add'>+The following manuals are written for *users* of the kernel — those who are</div><div class='add'>+trying to get it to work optimally on a given system and application</div><div class='add'>+developers seeking information on the kernel's user-space APIs.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='add'>+   :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-   driver-api/index</div><div class='del'>-   core-api/index</div><div class='del'>-   locking/index</div><div class='del'>-   accounting/index</div><div class='del'>-   block/index</div><div class='del'>-   cdrom/index</div><div class='del'>-   cpu-freq/index</div><div class='del'>-   ide/index</div><div class='del'>-   fb/index</div><div class='del'>-   fpga/index</div><div class='del'>-   hid/index</div><div class='del'>-   i2c/index</div><div class='del'>-   iio/index</div><div class='del'>-   isdn/index</div><div class='del'>-   infiniband/index</div><div class='del'>-   leds/index</div><div class='del'>-   netlabel/index</div><div class='del'>-   networking/index</div><div class='del'>-   pcmcia/index</div><div class='del'>-   power/index</div><div class='del'>-   target/index</div><div class='del'>-   timers/index</div><div class='del'>-   spi/index</div><div class='del'>-   w1/index</div><div class='del'>-   watchdog/index</div><div class='del'>-   virt/index</div><div class='del'>-   input/index</div><div class='del'>-   hwmon/index</div><div class='del'>-   gpu/index</div><div class='del'>-   security/index</div><div class='del'>-   sound/index</div><div class='del'>-   crypto/index</div><div class='del'>-   filesystems/index</div><div class='del'>-   vm/index</div><div class='del'>-   bpf/index</div><div class='del'>-   usb/index</div><div class='del'>-   PCI/index</div><div class='del'>-   scsi/index</div><div class='del'>-   misc-devices/index</div><div class='del'>-   scheduler/index</div><div class='del'>-   mhi/index</div><div class='del'>-   tty/index</div><div class='del'>-   peci/index</div><div class='del'>-</div><div class='del'>-Architecture-agnostic documentation</div><div class='del'>------------------------------------</div><div class='add'>+   admin-guide/index</div><div class='add'>+   The kernel build system &lt;kbuild/index&gt;</div><div class='add'>+   admin-guide/reporting-issues.rst</div><div class='add'>+   User-space tools &lt;tools/index&gt;</div><div class='add'>+   userspace-api/index</div><div class='add'>+</div><div class='add'>+See also: the `Linux man pages &lt;https://www.kernel.org/doc/man-pages/&gt;`_,</div><div class='add'>+which are kept separately from the kernel's own documentation.</div><div class='add'>+</div><div class='add'>+Firmware-related documentation</div><div class='add'>+==============================</div><div class='add'>+The following holds information on the kernel's expectations regarding the</div><div class='add'>+platform firmwares.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   firmware-guide/index</div><div class='add'>+   devicetree/index</div><div class='ctx'> </div><div class='del'>-   asm-annotations</div><div class='ctx'> </div><div class='ctx'> Architecture-specific documentation</div><div class='del'>------------------------------------</div><div class='add'>+===================================</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 2</div><div class='ctx'> </div><div class='del'>-   arch</div><div class='add'>+   arch/index</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Other documentation</div><div class='del'>--------------------</div><div class='add'>+===================</div><div class='ctx'> </div><div class='ctx'> There are several unsorted documents that don't seem to fit on other parts</div><div class='ctx'> of the documentation body, or may require some adjustments and/or conversion</div><div class='ctx'> to ReStructured Text format, or are simply too old.</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='add'>+   :maxdepth: 1</div><div class='ctx'> </div><div class='del'>-   tools/index</div><div class='ctx'>    staging/index</div><div class='del'>-   watch_queue</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Translations</div><div class='del'>-------------</div><div class='add'>+============</div><div class='ctx'> </div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 2</div><div class='head'>diff --git a/Documentation/input/devices/atarikbd.rst b/Documentation/input/devices/atarikbd.rst<br/>index 745e7a1ff122..0c4c7804ccb2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/input/devices/atarikbd.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/input/devices/atarikbd.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/input/devices/atarikbd.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/input/devices/atarikbd.rst</a></div><div class='hunk'>@@ -288,7 +288,7 @@ between 0 and large positive numbers. Excess motion below 0 is ignored. The</div><div class='ctx'> command sets the maximum positive value that can be attained in the scaled</div><div class='ctx'> coordinate system. Motion beyond that value is also ignored.</div><div class='ctx'> </div><div class='del'>-SET MOUSE KEYCODE MOSE</div><div class='add'>+SET MOUSE KEYCODE MODE</div><div class='ctx'> ----------------------</div><div class='ctx'> </div><div class='ctx'> ::</div><div class='hunk'>@@ -333,7 +333,7 @@ occur before the internally maintained coordinate is changed by one</div><div class='ctx'> (independently scaled for each axis). Remember that the mouse position</div><div class='ctx'> information is available only by interrogating the ikbd in the ABSOLUTE MOUSE</div><div class='ctx'> POSITIONING mode unless the ikbd has been commanded to report on button press</div><div class='del'>-or release (see SET MOSE BUTTON ACTION).</div><div class='add'>+or release (see SET MOUSE BUTTON ACTION).</div><div class='ctx'> </div><div class='ctx'> INTERROGATE MOUSE POSITION</div><div class='ctx'> --------------------------</div><div class='head'>diff --git a/Documentation/input/devices/ntrig.rst b/Documentation/input/devices/ntrig.rst<br/>index a6b22ce6c61c..1559f53495cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/input/devices/ntrig.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/input/devices/ntrig.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/input/devices/ntrig.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/input/devices/ntrig.rst</a></div><div class='hunk'>@@ -32,7 +32,7 @@ The following parameters are used to configure filters to reduce noise:</div><div class='ctx'> |activation_height,	|size threshold to activate immediately		      |</div><div class='ctx'> |activation_width	|						      |</div><div class='ctx'> +-----------------------+-----------------------------------------------------+</div><div class='del'>-|min_height,		|size threshold bellow which fingers are ignored      |</div><div class='add'>+|min_height,		|size threshold below which fingers are ignored       |</div><div class='ctx'> |min_width		|both to decide activation and during activity	      |</div><div class='ctx'> +-----------------------+-----------------------------------------------------+</div><div class='ctx'> |deactivate_slack	|the number of "no contact" frames to ignore before   |</div><div class='head'>diff --git a/Documentation/input/event-codes.rst b/Documentation/input/event-codes.rst<br/>index 8741d390b184..b4557462edd7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/input/event-codes.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/input/event-codes.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/input/event-codes.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/input/event-codes.rst</a></div><div class='hunk'>@@ -235,6 +235,12 @@ A few EV_ABS codes have special meanings:</div><div class='ctx'>     BTN_TOOL_&lt;name&gt; signals the type of tool that is currently detected by the</div><div class='ctx'>     hardware and is otherwise independent of ABS_DISTANCE and/or BTN_TOUCH.</div><div class='ctx'> </div><div class='add'>+* ABS_PROFILE:</div><div class='add'>+</div><div class='add'>+  - Used to describe the state of a multi-value profile switch.  An event is</div><div class='add'>+    emitted only when the selected profile changes, indicating the newly</div><div class='add'>+    selected profile value.</div><div class='add'>+</div><div class='ctx'> * ABS_MT_&lt;name&gt;:</div><div class='ctx'> </div><div class='ctx'>   - Used to describe multitouch input events. Please see</div><div class='head'>diff --git a/Documentation/input/gamepad.rst b/Documentation/input/gamepad.rst<br/>index 4d5e7fb80a84..71019de46036 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/input/gamepad.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/input/gamepad.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/input/gamepad.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/input/gamepad.rst</a></div><div class='hunk'>@@ -189,3 +189,9 @@ Gamepads report the following events:</div><div class='ctx'> - Rumble:</div><div class='ctx'> </div><div class='ctx'>   Rumble is advertised as FF_RUMBLE.</div><div class='add'>+</div><div class='add'>+- Profile:</div><div class='add'>+</div><div class='add'>+  Some pads provide a multi-value profile selection switch.  An example is the</div><div class='add'>+  XBox Adaptive and the XBox Elite 2 controllers.  When the active profile is</div><div class='add'>+  switched, its newly selected value is emitted as an ABS_PROFILE event.</div><div class='head'>diff --git a/Documentation/input/index.rst b/Documentation/input/index.rst<br/>index 9888f5cbf6d5..35581cd18e91 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/input/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/input/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/input/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/input/index.rst</a></div><div class='hunk'>@@ -1,6 +1,6 @@</div><div class='del'>-=============================</div><div class='del'>-The Linux Input Documentation</div><div class='del'>-=============================</div><div class='add'>+===================</div><div class='add'>+Input Documentation</div><div class='add'>+===================</div><div class='ctx'> </div><div class='ctx'> Contents:</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/input/input-programming.rst b/Documentation/input/input-programming.rst<br/>index 2638dce69764..c9264814c7aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/input/input-programming.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/input/input-programming.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/input/input-programming.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/input/input-programming.rst</a></div><div class='hunk'>@@ -85,15 +85,15 @@ accepted by this input device. Our example device can only generate EV_KEY</div><div class='ctx'> type events, and from those only BTN_0 event code. Thus we only set these</div><div class='ctx'> two bits. We could have used::</div><div class='ctx'> </div><div class='del'>-	set_bit(EV_KEY, button_dev.evbit);</div><div class='del'>-	set_bit(BTN_0, button_dev.keybit);</div><div class='add'>+	set_bit(EV_KEY, button_dev-&gt;evbit);</div><div class='add'>+	set_bit(BTN_0, button_dev-&gt;keybit);</div><div class='ctx'> </div><div class='ctx'> as well, but with more than single bits the first approach tends to be</div><div class='ctx'> shorter.</div><div class='ctx'> </div><div class='ctx'> Then the example driver registers the input device structure by calling::</div><div class='ctx'> </div><div class='del'>-	input_register_device(&amp;button_dev);</div><div class='add'>+	input_register_device(button_dev);</div><div class='ctx'> </div><div class='ctx'> This adds the button_dev structure to linked lists of the input driver and</div><div class='ctx'> calls device handler modules _connect functions to tell them a new input</div><div class='head'>diff --git a/Documentation/input/joydev/joystick.rst b/Documentation/input/joydev/joystick.rst<br/>index f615906a0821..6d721396717a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/input/joydev/joystick.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/input/joydev/joystick.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/input/joydev/joystick.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/input/joydev/joystick.rst</a></div><div class='hunk'>@@ -517,6 +517,7 @@ All I-Force devices are supported by the iforce module. This includes:</div><div class='ctx'> * AVB Mag Turbo Force</div><div class='ctx'> * AVB Top Shot Pegasus</div><div class='ctx'> * AVB Top Shot Force Feedback Racing Wheel</div><div class='add'>+* Boeder Force Feedback Wheel</div><div class='ctx'> * Logitech WingMan Force</div><div class='ctx'> * Logitech WingMan Force Wheel</div><div class='ctx'> * Guillemot Race Leader Force Feedback</div><div class='head'>diff --git a/Documentation/isdn/interface_capi.rst b/Documentation/isdn/interface_capi.rst<br/>index fe2421444b76..4d63b34b35cf 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/isdn/interface_capi.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/isdn/interface_capi.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/isdn/interface_capi.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/isdn/interface_capi.rst</a></div><div class='hunk'>@@ -323,7 +323,7 @@ If the lowest bit of showcapimsgs is set, kernelcapi logs controller and</div><div class='ctx'> application up and down events.</div><div class='ctx'> </div><div class='ctx'> In addition, every registered CAPI controller has an associated traceflag</div><div class='del'>-parameter controlling how CAPI messages sent from and to tha controller are</div><div class='add'>+parameter controlling how CAPI messages sent from and to the controller are</div><div class='ctx'> logged. The traceflag parameter is initialized with the value of the</div><div class='ctx'> showcapimsgs parameter when the controller is registered, but can later be</div><div class='ctx'> changed via the MANUFACTURER_REQ command KCAPI_CMD_TRACE.</div><div class='head'>diff --git a/Documentation/isdn/m_isdn.rst b/Documentation/isdn/m_isdn.rst<br/>index 9957de349e69..5847a164287e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/isdn/m_isdn.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/isdn/m_isdn.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/isdn/m_isdn.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/isdn/m_isdn.rst</a></div><div class='hunk'>@@ -3,7 +3,7 @@ mISDN Driver</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='ctx'> mISDN is a new modular ISDN driver, in the long term it should replace</div><div class='del'>-the old I4L driver architecture for passiv ISDN cards.</div><div class='add'>+the old I4L driver architecture for passive ISDN cards.</div><div class='ctx'> It was designed to allow a broad range of applications and interfaces</div><div class='ctx'> but only have the basic function in kernel, the interface to the user</div><div class='ctx'> space is based on sockets with a own address family AF_ISDN.</div><div class='head'>diff --git a/Documentation/kbuild/gcc-plugins.rst b/Documentation/kbuild/gcc-plugins.rst<br/>index 0ba76719f1b9..c578c6ba3eb6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/gcc-plugins.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kbuild/gcc-plugins.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/gcc-plugins.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kbuild/gcc-plugins.rst</a></div><div class='hunk'>@@ -90,7 +90,11 @@ e.g., on Ubuntu for gcc-10::</div><div class='ctx'> </div><div class='ctx'> Or on Fedora::</div><div class='ctx'> </div><div class='del'>-	dnf install gcc-plugin-devel</div><div class='add'>+	dnf install gcc-plugin-devel libmpc-devel</div><div class='add'>+</div><div class='add'>+Or on Fedora when using cross-compilers that include plugins::</div><div class='add'>+</div><div class='add'>+	dnf install libmpc-devel</div><div class='ctx'> </div><div class='ctx'> Enable the GCC plugin infrastructure and some plugin(s) you want to use</div><div class='ctx'> in the kernel config::</div><div class='hunk'>@@ -99,6 +103,19 @@ in the kernel config::</div><div class='ctx'> 	CONFIG_GCC_PLUGIN_LATENT_ENTROPY=y</div><div class='ctx'> 	...</div><div class='ctx'> </div><div class='add'>+Run gcc (native or cross-compiler) to ensure plugin headers are detected::</div><div class='add'>+</div><div class='add'>+	gcc -print-file-name=plugin</div><div class='add'>+	CROSS_COMPILE=arm-linux-gnu- ${CROSS_COMPILE}gcc -print-file-name=plugin</div><div class='add'>+</div><div class='add'>+The word "plugin" means they are not detected::</div><div class='add'>+</div><div class='add'>+	plugin</div><div class='add'>+</div><div class='add'>+A full path means they are detected::</div><div class='add'>+</div><div class='add'>+       /usr/lib/gcc/x86_64-redhat-linux/12/plugin</div><div class='add'>+</div><div class='ctx'> To compile the minimum tool set including the plugin(s)::</div><div class='ctx'> </div><div class='ctx'> 	make scripts</div><div class='head'>diff --git a/Documentation/kbuild/kbuild.rst b/Documentation/kbuild/kbuild.rst<br/>index ef19b9c13523..2a22ddb1b848 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/kbuild.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kbuild/kbuild.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/kbuild.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kbuild/kbuild.rst</a></div><div class='hunk'>@@ -48,6 +48,10 @@ KCFLAGS</div><div class='ctx'> -------</div><div class='ctx'> Additional options to the C compiler (for built-in and modules).</div><div class='ctx'> </div><div class='add'>+KRUSTFLAGS</div><div class='add'>+----------</div><div class='add'>+Additional options to the Rust compiler (for built-in and modules).</div><div class='add'>+</div><div class='ctx'> CFLAGS_KERNEL</div><div class='ctx'> -------------</div><div class='ctx'> Additional options for $(CC) when used to compile</div><div class='hunk'>@@ -57,6 +61,15 @@ CFLAGS_MODULE</div><div class='ctx'> -------------</div><div class='ctx'> Additional module specific options to use for $(CC).</div><div class='ctx'> </div><div class='add'>+RUSTFLAGS_KERNEL</div><div class='add'>+----------------</div><div class='add'>+Additional options for $(RUSTC) when used to compile</div><div class='add'>+code that is compiled as built-in.</div><div class='add'>+</div><div class='add'>+RUSTFLAGS_MODULE</div><div class='add'>+----------------</div><div class='add'>+Additional module specific options to use for $(RUSTC).</div><div class='add'>+</div><div class='ctx'> LDFLAGS_MODULE</div><div class='ctx'> --------------</div><div class='ctx'> Additional options used for $(LD) when linking modules.</div><div class='hunk'>@@ -69,6 +82,10 @@ HOSTCXXFLAGS</div><div class='ctx'> ------------</div><div class='ctx'> Additional flags to be passed to $(HOSTCXX) when building host programs.</div><div class='ctx'> </div><div class='add'>+HOSTRUSTFLAGS</div><div class='add'>+-------------</div><div class='add'>+Additional flags to be passed to $(HOSTRUSTC) when building host programs.</div><div class='add'>+</div><div class='ctx'> HOSTLDFLAGS</div><div class='ctx'> -----------</div><div class='ctx'> Additional flags to be passed when linking host programs.</div><div class='hunk'>@@ -143,7 +160,7 @@ directory name found in the arch/ directory.</div><div class='ctx'> But some architectures such as x86 and sparc have aliases.</div><div class='ctx'> </div><div class='ctx'> - x86: i386 for 32 bit, x86_64 for 64 bit</div><div class='del'>-- sh: sh for 32 bit, sh64 for 64 bit</div><div class='add'>+- parisc: parisc64 for 64 bit</div><div class='ctx'> - sparc: sparc32 for 32 bit, sparc64 for 64 bit</div><div class='ctx'> </div><div class='ctx'> CROSS_COMPILE</div><div class='hunk'>@@ -261,6 +278,13 @@ To get all available archs you can also specify all. E.g.::</div><div class='ctx'> </div><div class='ctx'>     $ make ALLSOURCE_ARCHS=all tags</div><div class='ctx'> </div><div class='add'>+IGNORE_DIRS</div><div class='add'>+-----------</div><div class='add'>+For tags/TAGS/cscope targets, you can choose which directories won't</div><div class='add'>+be included in the databases, separated by blank space. E.g.::</div><div class='add'>+</div><div class='add'>+    $ make IGNORE_DIRS="drivers/gpu/drm/radeon tools" cscope</div><div class='add'>+</div><div class='ctx'> KBUILD_BUILD_TIMESTAMP</div><div class='ctx'> ----------------------</div><div class='ctx'> Setting this to a date string overrides the timestamp used in the</div><div class='head'>diff --git a/Documentation/kbuild/kconfig-language.rst b/Documentation/kbuild/kconfig-language.rst<br/>index 93a5b6e1fabd..858ed5d80def 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/kconfig-language.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kbuild/kconfig-language.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/kconfig-language.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kbuild/kconfig-language.rst</a></div><div class='hunk'>@@ -525,8 +525,8 @@ followed by a test macro::</div><div class='ctx'> If you need to expose a compiler capability to makefiles and/or C source files,</div><div class='ctx'> `CC_HAS_` is the recommended prefix for the config option::</div><div class='ctx'> </div><div class='del'>-  config CC_HAS_ASM_GOTO</div><div class='del'>-	def_bool $(success,$(srctree)/scripts/gcc-goto.sh $(CC))</div><div class='add'>+  config CC_HAS_FOO</div><div class='add'>+	def_bool $(success,$(srctree)/scripts/cc-check-foo.sh $(CC))</div><div class='ctx'> </div><div class='ctx'> Build as module only</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~</div><div class='hunk'>@@ -672,7 +672,7 @@ Future kconfig work</div><div class='ctx'> Work on kconfig is welcomed on both areas of clarifying semantics and on</div><div class='ctx'> evaluating the use of a full SAT solver for it. A full SAT solver can be</div><div class='ctx'> desirable to enable more complex dependency mappings and / or queries,</div><div class='del'>-for instance on possible use case for a SAT solver could be that of handling</div><div class='add'>+for instance one possible use case for a SAT solver could be that of handling</div><div class='ctx'> the current known recursive dependency issues. It is not known if this would</div><div class='ctx'> address such issues but such evaluation is desirable. If support for a full SAT</div><div class='ctx'> solver proves too complex or that it cannot address recursive dependency issues</div><div class='hunk'>@@ -693,6 +693,8 @@ in documenting basic Kconfig syntax a more precise definition of Kconfig</div><div class='ctx'> semantics is welcomed. One project deduced Kconfig semantics through</div><div class='ctx'> the use of the xconfig configurator [1]_. Work should be done to confirm if</div><div class='ctx'> the deduced semantics matches our intended Kconfig design goals.</div><div class='add'>+Another project formalized a denotational semantics of a core subset of</div><div class='add'>+the Kconfig language [10]_.</div><div class='ctx'> </div><div class='ctx'> Having well defined semantics can be useful for tools for practical</div><div class='ctx'> evaluation of dependencies, for instance one such case was work to</div><div class='hunk'>@@ -700,6 +702,8 @@ express in boolean abstraction of the inferred semantics of Kconfig to</div><div class='ctx'> translate Kconfig logic into boolean formulas and run a SAT solver on this to</div><div class='ctx'> find dead code / features (always inactive), 114 dead features were found in</div><div class='ctx'> Linux using this methodology [1]_ (Section 8: Threats to validity).</div><div class='add'>+The kismet tool, based on the semantics in [10]_, finds abuses of reverse</div><div class='add'>+dependencies and has led to dozens of committed fixes to Linux Kconfig files [11]_.</div><div class='ctx'> </div><div class='ctx'> Confirming this could prove useful as Kconfig stands as one of the leading</div><div class='ctx'> industrial variability modeling languages [1]_ [2]_. Its study would help</div><div class='hunk'>@@ -738,3 +742,5 @@ https://kernelnewbies.org/KernelProjects/kconfig-sat</div><div class='ctx'> .. [7] https://vamos.cs.fau.de</div><div class='ctx'> .. [8] https://undertaker.cs.fau.de</div><div class='ctx'> .. [9] https://www4.cs.fau.de/Publications/2011/tartler_11_eurosys.pdf</div><div class='add'>+.. [10] https://paulgazzillo.com/papers/esecfse21.pdf</div><div class='add'>+.. [11] https://github.com/paulgazz/kmax</div><div class='head'>diff --git a/Documentation/kbuild/llvm.rst b/Documentation/kbuild/llvm.rst<br/>index b854bb413164..c3851fe1900d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/llvm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kbuild/llvm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/llvm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kbuild/llvm.rst</a></div><div class='hunk'>@@ -15,12 +15,15 @@ such as GCC and binutils. Ongoing work has allowed for `Clang</div><div class='ctx'> &lt;https://clang.llvm.org/&gt;`_ and `LLVM &lt;https://llvm.org/&gt;`_ utilities to be</div><div class='ctx'> used as viable substitutes. Distributions such as `Android</div><div class='ctx'> &lt;https://www.android.com/&gt;`_, `ChromeOS</div><div class='del'>-&lt;https://www.chromium.org/chromium-os&gt;`_, and `OpenMandriva</div><div class='del'>-&lt;https://www.openmandriva.org/&gt;`_ use Clang built kernels.  `LLVM is a</div><div class='del'>-collection of toolchain components implemented in terms of C++ objects</div><div class='del'>-&lt;https://www.aosabook.org/en/llvm.html&gt;`_. Clang is a front-end to LLVM that</div><div class='del'>-supports C and the GNU C extensions required by the kernel, and is pronounced</div><div class='del'>-"klang," not "see-lang."</div><div class='add'>+&lt;https://www.chromium.org/chromium-os&gt;`_, `OpenMandriva</div><div class='add'>+&lt;https://www.openmandriva.org/&gt;`_, and `Chimera Linux</div><div class='add'>+&lt;https://chimera-linux.org/&gt;`_ use Clang built kernels. Google's and Meta's</div><div class='add'>+datacenter fleets also run kernels built with Clang.</div><div class='add'>+</div><div class='add'>+`LLVM is a collection of toolchain components implemented in terms of C++</div><div class='add'>+objects &lt;https://www.aosabook.org/en/llvm.html&gt;`_. Clang is a front-end to LLVM</div><div class='add'>+that supports C and the GNU C extensions required by the kernel, and is</div><div class='add'>+pronounced "klang," not "see-lang."</div><div class='ctx'> </div><div class='ctx'> Clang</div><div class='ctx'> -----</div><div class='hunk'>@@ -129,18 +132,24 @@ yet. Bug reports are always welcome at the issue tracker below!</div><div class='ctx'>    * - arm64</div><div class='ctx'>      - Supported</div><div class='ctx'>      - ``LLVM=1``</div><div class='add'>+   * - hexagon</div><div class='add'>+     - Maintained</div><div class='add'>+     - ``LLVM=1``</div><div class='ctx'>    * - mips</div><div class='ctx'>      - Maintained</div><div class='del'>-     - ``CC=clang``</div><div class='add'>+     - ``LLVM=1``</div><div class='ctx'>    * - powerpc</div><div class='ctx'>      - Maintained</div><div class='ctx'>      - ``CC=clang``</div><div class='ctx'>    * - riscv</div><div class='ctx'>      - Maintained</div><div class='del'>-     - ``CC=clang``</div><div class='add'>+     - ``LLVM=1``</div><div class='ctx'>    * - s390</div><div class='ctx'>      - Maintained</div><div class='ctx'>      - ``CC=clang``</div><div class='add'>+   * - um (User Mode)</div><div class='add'>+     - Maintained</div><div class='add'>+     - ``LLVM=1``</div><div class='ctx'>    * - x86</div><div class='ctx'>      - Supported</div><div class='ctx'>      - ``LLVM=1``</div><div class='hunk'>@@ -162,6 +171,10 @@ Getting Help</div><div class='ctx'> Getting LLVM</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='add'>+We provide prebuilt stable versions of LLVM on `kernel.org &lt;https://kernel.org/pub/tools/llvm/&gt;`_.</div><div class='add'>+Below are links that may be useful for building LLVM from source or procuring</div><div class='add'>+it through a distribution's package manager.</div><div class='add'>+</div><div class='ctx'> - https://releases.llvm.org/download.html</div><div class='ctx'> - https://github.com/llvm/llvm-project</div><div class='ctx'> - https://llvm.org/docs/GettingStarted.html</div><div class='head'>diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst<br/>index 11a296e52d68..e67eb261c9b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/makefiles.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kbuild/makefiles.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/makefiles.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kbuild/makefiles.rst</a></div><div class='hunk'>@@ -4,68 +4,8 @@ Linux Kernel Makefiles</div><div class='ctx'> </div><div class='ctx'> This document describes the Linux kernel Makefiles.</div><div class='ctx'> </div><div class='del'>-.. Table of Contents</div><div class='del'>-</div><div class='del'>-	=== 1 Overview</div><div class='del'>-	=== 2 Who does what</div><div class='del'>-	=== 3 The kbuild files</div><div class='del'>-	   --- 3.1 Goal definitions</div><div class='del'>-	   --- 3.2 Built-in object goals - obj-y</div><div class='del'>-	   --- 3.3 Loadable module goals - obj-m</div><div class='del'>-	   --- 3.4 &lt;deleted&gt;</div><div class='del'>-	   --- 3.5 Library file goals - lib-y</div><div class='del'>-	   --- 3.6 Descending down in directories</div><div class='del'>-	   --- 3.7 Non-builtin vmlinux targets - extra-y</div><div class='del'>-	   --- 3.8 Always built goals - always-y</div><div class='del'>-	   --- 3.9 Compilation flags</div><div class='del'>-	   --- 3.10 Dependency tracking</div><div class='del'>-	   --- 3.11 Custom Rules</div><div class='del'>-	   --- 3.12 Command change detection</div><div class='del'>-	   --- 3.13 $(CC) support functions</div><div class='del'>-	   --- 3.14 $(LD) support functions</div><div class='del'>-	   --- 3.15 Script Invocation</div><div class='del'>-</div><div class='del'>-	=== 4 Host Program support</div><div class='del'>-	   --- 4.1 Simple Host Program</div><div class='del'>-	   --- 4.2 Composite Host Programs</div><div class='del'>-	   --- 4.3 Using C++ for host programs</div><div class='del'>-	   --- 4.4 Controlling compiler options for host programs</div><div class='del'>-	   --- 4.5 When host programs are actually built</div><div class='del'>-</div><div class='del'>-	=== 5 Userspace Program support</div><div class='del'>-	   --- 5.1 Simple Userspace Program</div><div class='del'>-	   --- 5.2 Composite Userspace Programs</div><div class='del'>-	   --- 5.3 Controlling compiler options for userspace programs</div><div class='del'>-	   --- 5.4 When userspace programs are actually built</div><div class='del'>-</div><div class='del'>-	=== 6 Kbuild clean infrastructure</div><div class='del'>-</div><div class='del'>-	=== 7 Architecture Makefiles</div><div class='del'>-	   --- 7.1 Set variables to tweak the build to the architecture</div><div class='del'>-	   --- 7.2 Add prerequisites to archheaders</div><div class='del'>-	   --- 7.3 Add prerequisites to archprepare</div><div class='del'>-	   --- 7.4 List directories to visit when descending</div><div class='del'>-	   --- 7.5 Architecture-specific boot images</div><div class='del'>-	   --- 7.6 Building non-kbuild targets</div><div class='del'>-	   --- 7.7 Commands useful for building a boot image</div><div class='del'>-	   --- 7.8 &lt;deleted&gt;</div><div class='del'>-	   --- 7.9 Preprocessing linker scripts</div><div class='del'>-	   --- 7.10 Generic header files</div><div class='del'>-	   --- 7.11 Post-link pass</div><div class='del'>-</div><div class='del'>-	=== 8 Kbuild syntax for exported headers</div><div class='del'>-		--- 8.1 no-export-headers</div><div class='del'>-		--- 8.2 generic-y</div><div class='del'>-		--- 8.3 generated-y</div><div class='del'>-		--- 8.4 mandatory-y</div><div class='del'>-</div><div class='del'>-	=== 9 Kbuild Variables</div><div class='del'>-	=== 10 Makefile language</div><div class='del'>-	=== 11 Credits</div><div class='del'>-	=== 12 TODO</div><div class='del'>-</div><div class='del'>-1 Overview</div><div class='del'>-==========</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='ctx'> </div><div class='ctx'> The Makefiles have five parts::</div><div class='ctx'> </div><div class='hunk'>@@ -82,6 +22,7 @@ The top Makefile is responsible for building two major products: vmlinux</div><div class='ctx'> (the resident kernel image) and modules (any module files).</div><div class='ctx'> It builds these goals by recursively descending into the subdirectories of</div><div class='ctx'> the kernel source tree.</div><div class='add'>+</div><div class='ctx'> The list of subdirectories which are visited depends upon the kernel</div><div class='ctx'> configuration. The top Makefile textually includes an arch Makefile</div><div class='ctx'> with the name arch/$(SRCARCH)/Makefile. The arch Makefile supplies</div><div class='hunk'>@@ -95,14 +36,13 @@ any built-in or modular targets.</div><div class='ctx'> scripts/Makefile.* contains all the definitions/rules etc. that</div><div class='ctx'> are used to build the kernel based on the kbuild makefiles.</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-2 Who does what</div><div class='del'>-===============</div><div class='add'>+Who does what</div><div class='add'>+=============</div><div class='ctx'> </div><div class='ctx'> People have four different relationships with the kernel Makefiles.</div><div class='ctx'> </div><div class='ctx'> *Users* are people who build kernels.  These people type commands such as</div><div class='del'>-"make menuconfig" or "make".  They usually do not read or edit</div><div class='add'>+``make menuconfig`` or ``make``.  They usually do not read or edit</div><div class='ctx'> any kernel Makefiles (or any other source files).</div><div class='ctx'> </div><div class='ctx'> *Normal developers* are people who work on features such as device</div><div class='hunk'>@@ -122,1371 +62,1429 @@ These people need to know about all aspects of the kernel Makefiles.</div><div class='ctx'> This document is aimed towards normal developers and arch developers.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-3 The kbuild files</div><div class='del'>-==================</div><div class='add'>+The kbuild files</div><div class='add'>+================</div><div class='ctx'> </div><div class='ctx'> Most Makefiles within the kernel are kbuild Makefiles that use the</div><div class='ctx'> kbuild infrastructure. This chapter introduces the syntax used in the</div><div class='ctx'> kbuild makefiles.</div><div class='del'>-The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can</div><div class='del'>-be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'</div><div class='add'>+</div><div class='add'>+The preferred name for the kbuild files are ``Makefile`` but ``Kbuild`` can</div><div class='add'>+be used and if both a ``Makefile`` and a ``Kbuild`` file exists, then the ``Kbuild``</div><div class='ctx'> file will be used.</div><div class='ctx'> </div><div class='del'>-Section 3.1 "Goal definitions" is a quick intro; further chapters provide</div><div class='add'>+Section `Goal definitions`_ is a quick intro; further chapters provide</div><div class='ctx'> more details, with real examples.</div><div class='ctx'> </div><div class='del'>-3.1 Goal definitions</div><div class='del'>---------------------</div><div class='add'>+Goal definitions</div><div class='add'>+----------------</div><div class='ctx'> </div><div class='del'>-	Goal definitions are the main part (heart) of the kbuild Makefile.</div><div class='del'>-	These lines define the files to be built, any special compilation</div><div class='del'>-	options, and any subdirectories to be entered recursively.</div><div class='add'>+Goal definitions are the main part (heart) of the kbuild Makefile.</div><div class='add'>+These lines define the files to be built, any special compilation</div><div class='add'>+options, and any subdirectories to be entered recursively.</div><div class='ctx'> </div><div class='del'>-	The most simple kbuild makefile contains one line:</div><div class='add'>+The most simple kbuild makefile contains one line:</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		obj-y += foo.o</div><div class='add'>+  obj-y += foo.o</div><div class='ctx'> </div><div class='del'>-	This tells kbuild that there is one object in that directory, named</div><div class='del'>-	foo.o. foo.o will be built from foo.c or foo.S.</div><div class='add'>+This tells kbuild that there is one object in that directory, named</div><div class='add'>+foo.o. foo.o will be built from foo.c or foo.S.</div><div class='ctx'> </div><div class='del'>-	If foo.o shall be built as a module, the variable obj-m is used.</div><div class='del'>-	Therefore the following pattern is often used:</div><div class='add'>+If foo.o shall be built as a module, the variable obj-m is used.</div><div class='add'>+Therefore the following pattern is often used:</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		obj-$(CONFIG_FOO) += foo.o</div><div class='add'>+  obj-$(CONFIG_FOO) += foo.o</div><div class='ctx'> </div><div class='del'>-	$(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).</div><div class='del'>-	If CONFIG_FOO is neither y nor m, then the file will not be compiled</div><div class='del'>-	nor linked.</div><div class='add'>+$(CONFIG_FOO) evaluates to either y (for built-in) or m (for module).</div><div class='add'>+If CONFIG_FOO is neither y nor m, then the file will not be compiled</div><div class='add'>+nor linked.</div><div class='ctx'> </div><div class='del'>-3.2 Built-in object goals - obj-y</div><div class='del'>----------------------------------</div><div class='add'>+Built-in object goals - obj-y</div><div class='add'>+-----------------------------</div><div class='ctx'> </div><div class='del'>-	The kbuild Makefile specifies object files for vmlinux</div><div class='del'>-	in the $(obj-y) lists.  These lists depend on the kernel</div><div class='del'>-	configuration.</div><div class='add'>+The kbuild Makefile specifies object files for vmlinux</div><div class='add'>+in the $(obj-y) lists.  These lists depend on the kernel</div><div class='add'>+configuration.</div><div class='ctx'> </div><div class='del'>-	Kbuild compiles all the $(obj-y) files.  It then calls</div><div class='del'>-	"$(AR) rcSTP" to merge these files into one built-in.a file.</div><div class='del'>-	This is a thin archive without a symbol table. It will be later</div><div class='del'>-	linked into vmlinux by scripts/link-vmlinux.sh</div><div class='add'>+Kbuild compiles all the $(obj-y) files.  It then calls</div><div class='add'>+``$(AR) rcSTP`` to merge these files into one built-in.a file.</div><div class='add'>+This is a thin archive without a symbol table. It will be later</div><div class='add'>+linked into vmlinux by scripts/link-vmlinux.sh</div><div class='ctx'> </div><div class='del'>-	The order of files in $(obj-y) is significant.  Duplicates in</div><div class='del'>-	the lists are allowed: the first instance will be linked into</div><div class='del'>-	built-in.a and succeeding instances will be ignored.</div><div class='add'>+The order of files in $(obj-y) is significant.  Duplicates in</div><div class='add'>+the lists are allowed: the first instance will be linked into</div><div class='add'>+built-in.a and succeeding instances will be ignored.</div><div class='ctx'> </div><div class='del'>-	Link order is significant, because certain functions</div><div class='del'>-	(module_init() / __initcall) will be called during boot in the</div><div class='del'>-	order they appear. So keep in mind that changing the link</div><div class='del'>-	order may e.g. change the order in which your SCSI</div><div class='del'>-	controllers are detected, and thus your disks are renumbered.</div><div class='add'>+Link order is significant, because certain functions</div><div class='add'>+(module_init() / __initcall) will be called during boot in the</div><div class='add'>+order they appear. So keep in mind that changing the link</div><div class='add'>+order may e.g. change the order in which your SCSI</div><div class='add'>+controllers are detected, and thus your disks are renumbered.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#drivers/isdn/i4l/Makefile</div><div class='del'>-		# Makefile for the kernel ISDN subsystem and device drivers.</div><div class='del'>-		# Each configuration option enables a list of files.</div><div class='del'>-		obj-$(CONFIG_ISDN_I4L)         += isdn.o</div><div class='del'>-		obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o</div><div class='add'>+  #drivers/isdn/i4l/Makefile</div><div class='add'>+  # Makefile for the kernel ISDN subsystem and device drivers.</div><div class='add'>+  # Each configuration option enables a list of files.</div><div class='add'>+  obj-$(CONFIG_ISDN_I4L)         += isdn.o</div><div class='add'>+  obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o</div><div class='ctx'> </div><div class='del'>-3.3 Loadable module goals - obj-m</div><div class='del'>----------------------------------</div><div class='add'>+Loadable module goals - obj-m</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+$(obj-m) specifies object files which are built as loadable</div><div class='add'>+kernel modules.</div><div class='add'>+</div><div class='add'>+A module may be built from one source file or several source</div><div class='add'>+files. In the case of one source file, the kbuild makefile</div><div class='add'>+simply adds the file to $(obj-m).</div><div class='add'>+</div><div class='add'>+Example::</div><div class='add'>+</div><div class='add'>+  #drivers/isdn/i4l/Makefile</div><div class='add'>+  obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o</div><div class='add'>+</div><div class='add'>+Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to "m"</div><div class='add'>+</div><div class='add'>+If a kernel module is built from several source files, you specify</div><div class='add'>+that you want to build a module in the same way as above; however,</div><div class='add'>+kbuild needs to know which object files you want to build your</div><div class='add'>+module from, so you have to tell it by setting a $(&lt;module_name&gt;-y)</div><div class='add'>+variable.</div><div class='add'>+</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	$(obj-m) specifies object files which are built as loadable</div><div class='del'>-	kernel modules.</div><div class='add'>+  #drivers/isdn/i4l/Makefile</div><div class='add'>+  obj-$(CONFIG_ISDN_I4L) += isdn.o</div><div class='add'>+  isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o</div><div class='ctx'> </div><div class='del'>-	A module may be built from one source file or several source</div><div class='del'>-	files. In the case of one source file, the kbuild makefile</div><div class='del'>-	simply adds the file to $(obj-m).</div><div class='add'>+In this example, the module name will be isdn.o. Kbuild will</div><div class='add'>+compile the objects listed in $(isdn-y) and then run</div><div class='add'>+``$(LD) -r`` on the list of these files to generate isdn.o.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Due to kbuild recognizing $(&lt;module_name&gt;-y) for composite objects,</div><div class='add'>+you can use the value of a ``CONFIG_`` symbol to optionally include an</div><div class='add'>+object file as part of a composite object.</div><div class='ctx'> </div><div class='del'>-		#drivers/isdn/i4l/Makefile</div><div class='del'>-		obj-$(CONFIG_ISDN_PPP_BSDCOMP) += isdn_bsdcomp.o</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	Note: In this example $(CONFIG_ISDN_PPP_BSDCOMP) evaluates to 'm'</div><div class='add'>+  #fs/ext2/Makefile</div><div class='add'>+  obj-$(CONFIG_EXT2_FS) += ext2.o</div><div class='add'>+  ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \</div><div class='add'>+    namei.o super.o symlink.o</div><div class='add'>+  ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \</div><div class='add'>+    xattr_trusted.o</div><div class='ctx'> </div><div class='del'>-	If a kernel module is built from several source files, you specify</div><div class='del'>-	that you want to build a module in the same way as above; however,</div><div class='del'>-	kbuild needs to know which object files you want to build your</div><div class='del'>-	module from, so you have to tell it by setting a $(&lt;module_name&gt;-y)</div><div class='del'>-	variable.</div><div class='add'>+In this example, xattr.o, xattr_user.o and xattr_trusted.o are only</div><div class='add'>+part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)</div><div class='add'>+evaluates to "y".</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Note: Of course, when you are building objects into the kernel,</div><div class='add'>+the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,</div><div class='add'>+kbuild will build an ext2.o file for you out of the individual</div><div class='add'>+parts and then link this into built-in.a, as you would expect.</div><div class='ctx'> </div><div class='del'>-		#drivers/isdn/i4l/Makefile</div><div class='del'>-		obj-$(CONFIG_ISDN_I4L) += isdn.o</div><div class='del'>-		isdn-y := isdn_net_lib.o isdn_v110.o isdn_common.o</div><div class='add'>+Library file goals - lib-y</div><div class='add'>+--------------------------</div><div class='ctx'> </div><div class='del'>-	In this example, the module name will be isdn.o. Kbuild will</div><div class='del'>-	compile the objects listed in $(isdn-y) and then run</div><div class='del'>-	"$(LD) -r" on the list of these files to generate isdn.o.</div><div class='add'>+Objects listed with obj-* are used for modules, or</div><div class='add'>+combined in a built-in.a for that specific directory.</div><div class='add'>+There is also the possibility to list objects that will</div><div class='add'>+be included in a library, lib.a.</div><div class='add'>+All objects listed with lib-y are combined in a single</div><div class='add'>+library for that directory.</div><div class='add'>+Objects that are listed in obj-y and additionally listed in</div><div class='add'>+lib-y will not be included in the library, since they will</div><div class='add'>+be accessible anyway.</div><div class='add'>+For consistency, objects listed in lib-m will be included in lib.a.</div><div class='ctx'> </div><div class='del'>-	Due to kbuild recognizing $(&lt;module_name&gt;-y) for composite objects,</div><div class='del'>-	you can use the value of a `CONFIG_` symbol to optionally include an</div><div class='del'>-	object file as part of a composite object.</div><div class='add'>+Note that the same kbuild makefile may list files to be built-in</div><div class='add'>+and to be part of a library. Therefore the same directory</div><div class='add'>+may contain both a built-in.a and a lib.a file.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#fs/ext2/Makefile</div><div class='del'>-	        obj-$(CONFIG_EXT2_FS) += ext2.o</div><div class='del'>-		ext2-y := balloc.o dir.o file.o ialloc.o inode.o ioctl.o \</div><div class='del'>-			  namei.o super.o symlink.o</div><div class='del'>-	        ext2-$(CONFIG_EXT2_FS_XATTR) += xattr.o xattr_user.o \</div><div class='del'>-						xattr_trusted.o</div><div class='add'>+  #arch/x86/lib/Makefile</div><div class='add'>+  lib-y    := delay.o</div><div class='ctx'> </div><div class='del'>-	In this example, xattr.o, xattr_user.o and xattr_trusted.o are only</div><div class='del'>-	part of the composite object ext2.o if $(CONFIG_EXT2_FS_XATTR)</div><div class='del'>-	evaluates to 'y'.</div><div class='add'>+This will create a library lib.a based on delay.o. For kbuild to</div><div class='add'>+actually recognize that there is a lib.a being built, the directory</div><div class='add'>+shall be listed in libs-y.</div><div class='ctx'> </div><div class='del'>-	Note: Of course, when you are building objects into the kernel,</div><div class='del'>-	the syntax above will also work. So, if you have CONFIG_EXT2_FS=y,</div><div class='del'>-	kbuild will build an ext2.o file for you out of the individual</div><div class='del'>-	parts and then link this into built-in.a, as you would expect.</div><div class='add'>+See also `List directories to visit when descending`_.</div><div class='ctx'> </div><div class='del'>-3.5 Library file goals - lib-y</div><div class='add'>+Use of lib-y is normally restricted to ``lib/`` and ``arch/*/lib``.</div><div class='add'>+</div><div class='add'>+Descending down in directories</div><div class='ctx'> ------------------------------</div><div class='ctx'> </div><div class='del'>-	Objects listed with obj-* are used for modules, or</div><div class='del'>-	combined in a built-in.a for that specific directory.</div><div class='del'>-	There is also the possibility to list objects that will</div><div class='del'>-	be included in a library, lib.a.</div><div class='del'>-	All objects listed with lib-y are combined in a single</div><div class='del'>-	library for that directory.</div><div class='del'>-	Objects that are listed in obj-y and additionally listed in</div><div class='del'>-	lib-y will not be included in the library, since they will</div><div class='del'>-	be accessible anyway.</div><div class='del'>-	For consistency, objects listed in lib-m will be included in lib.a.</div><div class='add'>+A Makefile is only responsible for building objects in its own</div><div class='add'>+directory. Files in subdirectories should be taken care of by</div><div class='add'>+Makefiles in these subdirs. The build system will automatically</div><div class='add'>+invoke make recursively in subdirectories, provided you let it know of</div><div class='add'>+them.</div><div class='add'>+</div><div class='add'>+To do so, obj-y and obj-m are used.</div><div class='add'>+ext2 lives in a separate directory, and the Makefile present in fs/</div><div class='add'>+tells kbuild to descend down using the following assignment.</div><div class='ctx'> </div><div class='del'>-	Note that the same kbuild makefile may list files to be built-in</div><div class='del'>-	and to be part of a library. Therefore the same directory</div><div class='del'>-	may contain both a built-in.a and a lib.a file.</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  #fs/Makefile</div><div class='add'>+  obj-$(CONFIG_EXT2_FS) += ext2/</div><div class='ctx'> </div><div class='del'>-		#arch/x86/lib/Makefile</div><div class='del'>-		lib-y    := delay.o</div><div class='add'>+If CONFIG_EXT2_FS is set to either "y" (built-in) or "m" (modular)</div><div class='add'>+the corresponding obj- variable will be set, and kbuild will descend</div><div class='add'>+down in the ext2 directory.</div><div class='ctx'> </div><div class='del'>-	This will create a library lib.a based on delay.o. For kbuild to</div><div class='del'>-	actually recognize that there is a lib.a being built, the directory</div><div class='del'>-	shall be listed in libs-y.</div><div class='add'>+Kbuild uses this information not only to decide that it needs to visit</div><div class='add'>+the directory, but also to decide whether or not to link objects from</div><div class='add'>+the directory into vmlinux.</div><div class='ctx'> </div><div class='del'>-	See also "7.4 List directories to visit when descending".</div><div class='add'>+When Kbuild descends into the directory with "y", all built-in objects</div><div class='add'>+from that directory are combined into the built-in.a, which will be</div><div class='add'>+eventually linked into vmlinux.</div><div class='ctx'> </div><div class='del'>-	Use of lib-y is normally restricted to `lib/` and `arch/*/lib`.</div><div class='add'>+When Kbuild descends into the directory with "m", in contrast, nothing</div><div class='add'>+from that directory will be linked into vmlinux. If the Makefile in</div><div class='add'>+that directory specifies obj-y, those objects will be left orphan.</div><div class='add'>+It is very likely a bug of the Makefile or of dependencies in Kconfig.</div><div class='ctx'> </div><div class='del'>-3.6 Descending down in directories</div><div class='del'>-----------------------------------</div><div class='add'>+Kbuild also supports dedicated syntax, subdir-y and subdir-m, for</div><div class='add'>+descending into subdirectories. It is a good fit when you know they</div><div class='add'>+do not contain kernel-space objects at all. A typical usage is to let</div><div class='add'>+Kbuild descend into subdirectories to build tools.</div><div class='ctx'> </div><div class='del'>-	A Makefile is only responsible for building objects in its own</div><div class='del'>-	directory. Files in subdirectories should be taken care of by</div><div class='del'>-	Makefiles in these subdirs. The build system will automatically</div><div class='del'>-	invoke make recursively in subdirectories, provided you let it know of</div><div class='del'>-	them.</div><div class='add'>+Examples::</div><div class='ctx'> </div><div class='del'>-	To do so, obj-y and obj-m are used.</div><div class='del'>-	ext2 lives in a separate directory, and the Makefile present in fs/</div><div class='del'>-	tells kbuild to descend down using the following assignment.</div><div class='add'>+  # scripts/Makefile</div><div class='add'>+  subdir-$(CONFIG_GCC_PLUGINS) += gcc-plugins</div><div class='add'>+  subdir-$(CONFIG_MODVERSIONS) += genksyms</div><div class='add'>+  subdir-$(CONFIG_SECURITY_SELINUX) += selinux</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Unlike obj-y/m, subdir-y/m does not need the trailing slash since this</div><div class='add'>+syntax is always used for directories.</div><div class='ctx'> </div><div class='del'>-		#fs/Makefile</div><div class='del'>-		obj-$(CONFIG_EXT2_FS) += ext2/</div><div class='add'>+It is good practice to use a ``CONFIG_`` variable when assigning directory</div><div class='add'>+names. This allows kbuild to totally skip the directory if the</div><div class='add'>+corresponding ``CONFIG_`` option is neither "y" nor "m".</div><div class='ctx'> </div><div class='del'>-	If CONFIG_EXT2_FS is set to either 'y' (built-in) or 'm' (modular)</div><div class='del'>-	the corresponding obj- variable will be set, and kbuild will descend</div><div class='del'>-	down in the ext2 directory.</div><div class='add'>+Non-builtin vmlinux targets - extra-y</div><div class='add'>+-------------------------------------</div><div class='ctx'> </div><div class='del'>-	Kbuild uses this information not only to decide that it needs to visit</div><div class='del'>-	the directory, but also to decide whether or not to link objects from</div><div class='del'>-	the directory into vmlinux.</div><div class='add'>+extra-y specifies targets which are needed for building vmlinux,</div><div class='add'>+but not combined into built-in.a.</div><div class='ctx'> </div><div class='del'>-	When Kbuild descends into the directory with 'y', all built-in objects</div><div class='del'>-	from that directory are combined into the built-in.a, which will be</div><div class='del'>-	eventually linked into vmlinux.</div><div class='add'>+Examples are:</div><div class='ctx'> </div><div class='del'>-	When Kbuild descends into the directory with 'm', in contrast, nothing</div><div class='del'>-	from that directory will be linked into vmlinux. If the Makefile in</div><div class='del'>-	that directory specifies obj-y, those objects will be left orphan.</div><div class='del'>-	It is very likely a bug of the Makefile or of dependencies in Kconfig.</div><div class='add'>+1) vmlinux linker script</div><div class='ctx'> </div><div class='del'>-	Kbuild also supports dedicated syntax, subdir-y and subdir-m, for</div><div class='del'>-	descending into subdirectories. It is a good fit when you know they</div><div class='del'>-	do not contain kernel-space objects at all. A typical usage is to let</div><div class='del'>-	Kbuild descend into subdirectories to build tools.</div><div class='add'>+   The linker script for vmlinux is located at</div><div class='add'>+   arch/$(SRCARCH)/kernel/vmlinux.lds</div><div class='ctx'> </div><div class='del'>-	Examples::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		# scripts/Makefile</div><div class='del'>-		subdir-$(CONFIG_GCC_PLUGINS) += gcc-plugins</div><div class='del'>-		subdir-$(CONFIG_MODVERSIONS) += genksyms</div><div class='del'>-		subdir-$(CONFIG_SECURITY_SELINUX) += selinux</div><div class='add'>+  # arch/x86/kernel/Makefile</div><div class='add'>+  extra-y	+= vmlinux.lds</div><div class='ctx'> </div><div class='del'>-	Unlike obj-y/m, subdir-y/m does not need the trailing slash since this</div><div class='del'>-	syntax is always used for directories.</div><div class='add'>+$(extra-y) should only contain targets needed for vmlinux.</div><div class='ctx'> </div><div class='del'>-	It is good practice to use a `CONFIG_` variable when assigning directory</div><div class='del'>-	names. This allows kbuild to totally skip the directory if the</div><div class='del'>-	corresponding `CONFIG_` option is neither 'y' nor 'm'.</div><div class='add'>+Kbuild skips extra-y when vmlinux is apparently not a final goal.</div><div class='add'>+(e.g. ``make modules``, or building external modules)</div><div class='ctx'> </div><div class='del'>-3.7 Non-builtin vmlinux targets - extra-y</div><div class='del'>------------------------------------------</div><div class='add'>+If you intend to build targets unconditionally, always-y (explained</div><div class='add'>+in the next section) is the correct syntax to use.</div><div class='ctx'> </div><div class='del'>-	extra-y specifies targets which are needed for building vmlinux,</div><div class='del'>-	but not combined into built-in.a.</div><div class='add'>+Always built goals - always-y</div><div class='add'>+-----------------------------</div><div class='add'>+</div><div class='add'>+always-y specifies targets which are literally always built when</div><div class='add'>+Kbuild visits the Makefile.</div><div class='ctx'> </div><div class='del'>-	Examples are:</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	1) head objects</div><div class='add'>+  # ./Kbuild</div><div class='add'>+  offsets-file := include/generated/asm-offsets.h</div><div class='add'>+  always-y += $(offsets-file)</div><div class='ctx'> </div><div class='del'>-	    Some objects must be placed at the head of vmlinux. They are</div><div class='del'>-	    directly linked to vmlinux without going through built-in.a</div><div class='del'>-	    A typical use-case is an object that contains the entry point.</div><div class='add'>+Compilation flags</div><div class='add'>+-----------------</div><div class='ctx'> </div><div class='del'>-	    arch/$(SRCARCH)/Makefile should specify such objects as head-y.</div><div class='add'>+ccflags-y, asflags-y and ldflags-y</div><div class='add'>+  These three flags apply only to the kbuild makefile in which they</div><div class='add'>+  are assigned. They are used for all the normal cc, as and ld</div><div class='add'>+  invocations happening during a recursive build.</div><div class='add'>+  Note: Flags with the same behaviour were previously named:</div><div class='add'>+  EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.</div><div class='add'>+  They are still supported but their usage is deprecated.</div><div class='ctx'> </div><div class='del'>-	    Discussion:</div><div class='del'>-	      Given that we can control the section order in the linker script,</div><div class='del'>-	      why do we need head-y?</div><div class='add'>+  ccflags-y specifies options for compiling with $(CC).</div><div class='ctx'> </div><div class='del'>-	2) vmlinux linker script</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	    The linker script for vmlinux is located at</div><div class='del'>-	    arch/$(SRCARCH)/kernel/vmlinux.lds</div><div class='add'>+    # drivers/acpi/acpica/Makefile</div><div class='add'>+    ccflags-y				:= -Os -D_LINUX -DBUILDING_ACPICA</div><div class='add'>+    ccflags-$(CONFIG_ACPI_DEBUG)	+= -DACPI_DEBUG_OUTPUT</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  This variable is necessary because the top Makefile owns the</div><div class='add'>+  variable $(KBUILD_CFLAGS) and uses it for compilation flags for the</div><div class='add'>+  entire tree.</div><div class='ctx'> </div><div class='del'>-		# arch/x86/kernel/Makefile</div><div class='del'>-		extra-y	:= head_$(BITS).o</div><div class='del'>-		extra-y	+= head$(BITS).o</div><div class='del'>-		extra-y	+= ebda.o</div><div class='del'>-		extra-y	+= platform-quirks.o</div><div class='del'>-		extra-y	+= vmlinux.lds</div><div class='add'>+  asflags-y specifies assembler options.</div><div class='ctx'> </div><div class='del'>-	$(extra-y) should only contain targets needed for vmlinux.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Kbuild skips extra-y when vmlinux is apparently not a final goal.</div><div class='del'>-	(e.g. 'make modules', or building external modules)</div><div class='add'>+    #arch/sparc/kernel/Makefile</div><div class='add'>+    asflags-y := -ansi</div><div class='ctx'> </div><div class='del'>-	If you intend to build targets unconditionally, always-y (explained</div><div class='del'>-	in the next section) is the correct syntax to use.</div><div class='add'>+  ldflags-y specifies options for linking with $(LD).</div><div class='ctx'> </div><div class='del'>-3.8 Always built goals - always-y</div><div class='del'>----------------------------------</div><div class='add'>+  Example::</div><div class='add'>+</div><div class='add'>+    #arch/cris/boot/compressed/Makefile</div><div class='add'>+    ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds</div><div class='add'>+</div><div class='add'>+subdir-ccflags-y, subdir-asflags-y</div><div class='add'>+  The two flags listed above are similar to ccflags-y and asflags-y.</div><div class='add'>+  The difference is that the subdir- variants have effect for the kbuild</div><div class='add'>+  file where they are present and all subdirectories.</div><div class='add'>+  Options specified using subdir-* are added to the commandline before</div><div class='add'>+  the options specified using the non-subdir variants.</div><div class='add'>+</div><div class='add'>+  Example::</div><div class='add'>+</div><div class='add'>+    subdir-ccflags-y := -Werror</div><div class='add'>+</div><div class='add'>+ccflags-remove-y, asflags-remove-y</div><div class='add'>+  These flags are used to remove particular flags for the compiler,</div><div class='add'>+  assembler invocations.</div><div class='add'>+</div><div class='add'>+  Example::</div><div class='add'>+</div><div class='add'>+    ccflags-remove-$(CONFIG_MCOUNT) += -pg</div><div class='ctx'> </div><div class='del'>-	always-y specifies targets which are literally always built when</div><div class='del'>-	Kbuild visits the Makefile.</div><div class='add'>+CFLAGS_$@, AFLAGS_$@</div><div class='add'>+  CFLAGS_$@ and AFLAGS_$@ only apply to commands in current</div><div class='add'>+  kbuild makefile.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='del'>-	  # ./Kbuild</div><div class='del'>-	  offsets-file := include/generated/asm-offsets.h</div><div class='del'>-	  always-y += $(offsets-file)</div><div class='add'>+  $(CFLAGS_$@) specifies per-file options for $(CC).  The $@</div><div class='add'>+  part has a literal value which specifies the file that it is for.</div><div class='ctx'> </div><div class='del'>-3.9 Compilation flags</div><div class='del'>----------------------</div><div class='add'>+  CFLAGS_$@ has the higher priority than ccflags-remove-y; CFLAGS_$@</div><div class='add'>+  can re-add compiler flags that were removed by ccflags-remove-y.</div><div class='ctx'> </div><div class='del'>-    ccflags-y, asflags-y and ldflags-y</div><div class='del'>-	These three flags apply only to the kbuild makefile in which they</div><div class='del'>-	are assigned. They are used for all the normal cc, as and ld</div><div class='del'>-	invocations happening during a recursive build.</div><div class='del'>-	Note: Flags with the same behaviour were previously named:</div><div class='del'>-	EXTRA_CFLAGS, EXTRA_AFLAGS and EXTRA_LDFLAGS.</div><div class='del'>-	They are still supported but their usage is deprecated.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	ccflags-y specifies options for compiling with $(CC).</div><div class='add'>+    # drivers/scsi/Makefile</div><div class='add'>+    CFLAGS_aha152x.o =   -DAHA152X_STAT -DAUTOCONF</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  This line specify compilation flags for aha152x.o.</div><div class='ctx'> </div><div class='del'>-		# drivers/acpi/acpica/Makefile</div><div class='del'>-		ccflags-y			:= -Os -D_LINUX -DBUILDING_ACPICA</div><div class='del'>-		ccflags-$(CONFIG_ACPI_DEBUG)	+= -DACPI_DEBUG_OUTPUT</div><div class='add'>+  $(AFLAGS_$@) is a similar feature for source files in assembly</div><div class='add'>+  languages.</div><div class='ctx'> </div><div class='del'>-	This variable is necessary because the top Makefile owns the</div><div class='del'>-	variable $(KBUILD_CFLAGS) and uses it for compilation flags for the</div><div class='del'>-	entire tree.</div><div class='add'>+  AFLAGS_$@ has the higher priority than asflags-remove-y; AFLAGS_$@</div><div class='add'>+  can re-add assembler flags that were removed by asflags-remove-y.</div><div class='ctx'> </div><div class='del'>-	asflags-y specifies assembler options.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    # arch/arm/kernel/Makefile</div><div class='add'>+    AFLAGS_head.o        := -DTEXT_OFFSET=$(TEXT_OFFSET)</div><div class='add'>+    AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312</div><div class='add'>+    AFLAGS_iwmmxt.o      := -Wa,-mcpu=iwmmxt</div><div class='ctx'> </div><div class='del'>-		#arch/sparc/kernel/Makefile</div><div class='del'>-		asflags-y := -ansi</div><div class='add'>+Dependency tracking</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+Kbuild tracks dependencies on the following:</div><div class='add'>+</div><div class='add'>+1) All prerequisite files (both ``*.c`` and ``*.h``)</div><div class='add'>+2) ``CONFIG_`` options used in all prerequisite files</div><div class='add'>+3) Command-line used to compile target</div><div class='add'>+</div><div class='add'>+Thus, if you change an option to $(CC) all affected files will</div><div class='add'>+be re-compiled.</div><div class='ctx'> </div><div class='del'>-	ldflags-y specifies options for linking with $(LD).</div><div class='add'>+Custom Rules</div><div class='add'>+------------</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Custom rules are used when the kbuild infrastructure does</div><div class='add'>+not provide the required support. A typical example is</div><div class='add'>+header files generated during the build process.</div><div class='add'>+Another example are the architecture-specific Makefiles which</div><div class='add'>+need custom rules to prepare boot images etc.</div><div class='ctx'> </div><div class='del'>-		#arch/cris/boot/compressed/Makefile</div><div class='del'>-		ldflags-y += -T $(srctree)/$(src)/decompress_$(arch-y).lds</div><div class='add'>+Custom rules are written as normal Make rules.</div><div class='add'>+Kbuild is not executing in the directory where the Makefile is</div><div class='add'>+located, so all custom rules shall use a relative</div><div class='add'>+path to prerequisite files and target files.</div><div class='ctx'> </div><div class='del'>-    subdir-ccflags-y, subdir-asflags-y</div><div class='del'>-	The two flags listed above are similar to ccflags-y and asflags-y.</div><div class='del'>-	The difference is that the subdir- variants have effect for the kbuild</div><div class='del'>-	file where they are present and all subdirectories.</div><div class='del'>-	Options specified using subdir-* are added to the commandline before</div><div class='del'>-	the options specified using the non-subdir variants.</div><div class='add'>+Two variables are used when defining custom rules:</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+$(src)</div><div class='add'>+  $(src) is a relative path which points to the directory</div><div class='add'>+  where the Makefile is located. Always use $(src) when</div><div class='add'>+  referring to files located in the src tree.</div><div class='ctx'> </div><div class='del'>-		subdir-ccflags-y := -Werror</div><div class='add'>+$(obj)</div><div class='add'>+  $(obj) is a relative path which points to the directory</div><div class='add'>+  where the target is saved. Always use $(obj) when</div><div class='add'>+  referring to generated files.</div><div class='ctx'> </div><div class='del'>-    ccflags-remove-y, asflags-remove-y</div><div class='del'>-	These flags are used to remove particular flags for the compiler,</div><div class='del'>-	assembler invocations.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    #drivers/scsi/Makefile</div><div class='add'>+    $(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl</div><div class='add'>+    $(CPP) -DCHIP=810 - &lt; $&lt; | ... $(src)/script_asm.pl</div><div class='ctx'> </div><div class='del'>-		ccflags-remove-$(CONFIG_MCOUNT) += -pg</div><div class='add'>+  This is a custom rule, following the normal syntax</div><div class='add'>+  required by make.</div><div class='ctx'> </div><div class='del'>-    CFLAGS_$@, AFLAGS_$@</div><div class='del'>-	CFLAGS_$@ and AFLAGS_$@ only apply to commands in current</div><div class='del'>-	kbuild makefile.</div><div class='add'>+  The target file depends on two prerequisite files. References</div><div class='add'>+  to the target file are prefixed with $(obj), references</div><div class='add'>+  to prerequisites are referenced with $(src) (because they are not</div><div class='add'>+  generated files).</div><div class='ctx'> </div><div class='del'>-	$(CFLAGS_$@) specifies per-file options for $(CC).  The $@</div><div class='del'>-	part has a literal value which specifies the file that it is for.</div><div class='add'>+$(kecho)</div><div class='add'>+  echoing information to user in a rule is often a good practice</div><div class='add'>+  but when execution ``make -s`` one does not expect to see any output</div><div class='add'>+  except for warnings/errors.</div><div class='add'>+  To support this kbuild defines $(kecho) which will echo out the</div><div class='add'>+  text following $(kecho) to stdout except if ``make -s`` is used.</div><div class='ctx'> </div><div class='del'>-	CFLAGS_$@ has the higher priority than ccflags-remove-y; CFLAGS_$@</div><div class='del'>-	can re-add compiler flags that were removed by ccflags-remove-y.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    # arch/arm/Makefile</div><div class='add'>+    $(BOOT_TARGETS): vmlinux</div><div class='add'>+            $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@</div><div class='add'>+            @$(kecho) '  Kernel: $(boot)/$@ is ready'</div><div class='ctx'> </div><div class='del'>-		# drivers/scsi/Makefile</div><div class='del'>-		CFLAGS_aha152x.o =   -DAHA152X_STAT -DAUTOCONF</div><div class='add'>+  When kbuild is executing with KBUILD_VERBOSE unset, then only a shorthand</div><div class='add'>+  of a command is normally displayed.</div><div class='add'>+  To enable this behaviour for custom commands kbuild requires</div><div class='add'>+  two variables to be set::</div><div class='ctx'> </div><div class='del'>-	This line specify compilation flags for aha152x.o.</div><div class='add'>+    quiet_cmd_&lt;command&gt; - what shall be echoed</div><div class='add'>+          cmd_&lt;command&gt; - the command to execute</div><div class='ctx'> </div><div class='del'>-	$(AFLAGS_$@) is a similar feature for source files in assembly</div><div class='del'>-	languages.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	AFLAGS_$@ has the higher priority than asflags-remove-y; AFLAGS_$@</div><div class='del'>-	can re-add assembler flags that were removed by asflags-remove-y.</div><div class='add'>+    # lib/Makefile</div><div class='add'>+    quiet_cmd_crc32 = GEN     $@</div><div class='add'>+          cmd_crc32 = $&lt; &gt; $@</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    $(obj)/crc32table.h: $(obj)/gen_crc32table</div><div class='add'>+            $(call cmd,crc32)</div><div class='ctx'> </div><div class='del'>-		# arch/arm/kernel/Makefile</div><div class='del'>-		AFLAGS_head.o        := -DTEXT_OFFSET=$(TEXT_OFFSET)</div><div class='del'>-		AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312</div><div class='del'>-		AFLAGS_iwmmxt.o      := -Wa,-mcpu=iwmmxt</div><div class='add'>+  When updating the $(obj)/crc32table.h target, the line::</div><div class='ctx'> </div><div class='add'>+    GEN     lib/crc32table.h</div><div class='ctx'> </div><div class='del'>-3.10 Dependency tracking</div><div class='add'>+  will be displayed with ``make KBUILD_VERBOSE=``.</div><div class='add'>+</div><div class='add'>+Command change detection</div><div class='ctx'> ------------------------</div><div class='ctx'> </div><div class='del'>-	Kbuild tracks dependencies on the following:</div><div class='add'>+When the rule is evaluated, timestamps are compared between the target</div><div class='add'>+and its prerequisite files. GNU Make updates the target when any of the</div><div class='add'>+prerequisites is newer than that.</div><div class='ctx'> </div><div class='del'>-	1) All prerequisite files (both `*.c` and `*.h`)</div><div class='del'>-	2) `CONFIG_` options used in all prerequisite files</div><div class='del'>-	3) Command-line used to compile target</div><div class='add'>+The target should be rebuilt also when the command line has changed</div><div class='add'>+since the last invocation. This is not supported by Make itself, so</div><div class='add'>+Kbuild achieves this by a kind of meta-programming.</div><div class='ctx'> </div><div class='del'>-	Thus, if you change an option to $(CC) all affected files will</div><div class='del'>-	be re-compiled.</div><div class='add'>+if_changed is the macro used for this purpose, in the following form::</div><div class='ctx'> </div><div class='del'>-3.11 Custom Rules</div><div class='del'>------------------</div><div class='add'>+  quiet_cmd_&lt;command&gt; = ...</div><div class='add'>+        cmd_&lt;command&gt; = ...</div><div class='ctx'> </div><div class='del'>-	Custom rules are used when the kbuild infrastructure does</div><div class='del'>-	not provide the required support. A typical example is</div><div class='del'>-	header files generated during the build process.</div><div class='del'>-	Another example are the architecture-specific Makefiles which</div><div class='del'>-	need custom rules to prepare boot images etc.</div><div class='add'>+  &lt;target&gt;: &lt;source(s)&gt; FORCE</div><div class='add'>+          $(call if_changed,&lt;command&gt;)</div><div class='ctx'> </div><div class='del'>-	Custom rules are written as normal Make rules.</div><div class='del'>-	Kbuild is not executing in the directory where the Makefile is</div><div class='del'>-	located, so all custom rules shall use a relative</div><div class='del'>-	path to prerequisite files and target files.</div><div class='add'>+Any target that utilizes if_changed must be listed in $(targets),</div><div class='add'>+otherwise the command line check will fail, and the target will</div><div class='add'>+always be built.</div><div class='ctx'> </div><div class='del'>-	Two variables are used when defining custom rules:</div><div class='add'>+If the target is already listed in the recognized syntax such as</div><div class='add'>+obj-y/m, lib-y/m, extra-y/m, always-y/m, hostprogs, userprogs, Kbuild</div><div class='add'>+automatically adds it to $(targets). Otherwise, the target must be</div><div class='add'>+explicitly added to $(targets).</div><div class='ctx'> </div><div class='del'>-	$(src)</div><div class='del'>-	    $(src) is a relative path which points to the directory</div><div class='del'>-	    where the Makefile is located. Always use $(src) when</div><div class='del'>-	    referring to files located in the src tree.</div><div class='add'>+Assignments to $(targets) are without $(obj)/ prefix. if_changed may be</div><div class='add'>+used in conjunction with custom rules as defined in `Custom Rules`_.</div><div class='ctx'> </div><div class='del'>-	$(obj)</div><div class='del'>-	    $(obj) is a relative path which points to the directory</div><div class='del'>-	    where the target is saved. Always use $(obj) when</div><div class='del'>-	    referring to generated files.</div><div class='add'>+Note: It is a typical mistake to forget the FORCE prerequisite.</div><div class='add'>+Another common pitfall is that whitespace is sometimes significant; for</div><div class='add'>+instance, the below will fail (note the extra space after the comma)::</div><div class='ctx'> </div><div class='del'>-	    Example::</div><div class='add'>+  target: source(s) FORCE</div><div class='ctx'> </div><div class='del'>-		#drivers/scsi/Makefile</div><div class='del'>-		$(obj)/53c8xx_d.h: $(src)/53c7,8xx.scr $(src)/script_asm.pl</div><div class='del'>-			$(CPP) -DCHIP=810 - &lt; $&lt; | ... $(src)/script_asm.pl</div><div class='add'>+**WRONG!**	$(call if_changed, objcopy)</div><div class='ctx'> </div><div class='del'>-	    This is a custom rule, following the normal syntax</div><div class='del'>-	    required by make.</div><div class='add'>+Note:</div><div class='add'>+  if_changed should not be used more than once per target.</div><div class='add'>+  It stores the executed command in a corresponding .cmd</div><div class='add'>+  file and multiple calls would result in overwrites and</div><div class='add'>+  unwanted results when the target is up to date and only the</div><div class='add'>+  tests on changed commands trigger execution of commands.</div><div class='ctx'> </div><div class='del'>-	    The target file depends on two prerequisite files. References</div><div class='del'>-	    to the target file are prefixed with $(obj), references</div><div class='del'>-	    to prerequisites are referenced with $(src) (because they are not</div><div class='del'>-	    generated files).</div><div class='add'>+$(CC) support functions</div><div class='add'>+-----------------------</div><div class='ctx'> </div><div class='del'>-	$(kecho)</div><div class='del'>-	    echoing information to user in a rule is often a good practice</div><div class='del'>-	    but when execution "make -s" one does not expect to see any output</div><div class='del'>-	    except for warnings/errors.</div><div class='del'>-	    To support this kbuild defines $(kecho) which will echo out the</div><div class='del'>-	    text following $(kecho) to stdout except if "make -s" is used.</div><div class='add'>+The kernel may be built with several different versions of</div><div class='add'>+$(CC), each supporting a unique set of features and options.</div><div class='add'>+kbuild provides basic support to check for valid options for $(CC).</div><div class='add'>+$(CC) is usually the gcc compiler, but other alternatives are</div><div class='add'>+available.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+as-option</div><div class='add'>+  as-option is used to check if $(CC) -- when used to compile</div><div class='add'>+  assembler (``*.S``) files -- supports the given option. An optional</div><div class='add'>+  second option may be specified if the first option is not supported.</div><div class='ctx'> </div><div class='del'>-		# arch/arm/Makefile</div><div class='del'>-		$(BOOT_TARGETS): vmlinux</div><div class='del'>-			$(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $(boot)/$@</div><div class='del'>-			@$(kecho) '  Kernel: $(boot)/$@ is ready'</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	When kbuild is executing with KBUILD_VERBOSE=0, then only a shorthand</div><div class='del'>-	of a command is normally displayed.</div><div class='del'>-	To enable this behaviour for custom commands kbuild requires</div><div class='del'>-	two variables to be set::</div><div class='add'>+    #arch/sh/Makefile</div><div class='add'>+    cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)</div><div class='ctx'> </div><div class='del'>-		quiet_cmd_&lt;command&gt;	- what shall be echoed</div><div class='del'>-		      cmd_&lt;command&gt;	- the command to execute</div><div class='add'>+  In the above example, cflags-y will be assigned the option</div><div class='add'>+  -Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).</div><div class='add'>+  The second argument is optional, and if supplied will be used</div><div class='add'>+  if first argument is not supported.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+as-instr</div><div class='add'>+  as-instr checks if the assembler reports a specific instruction</div><div class='add'>+  and then outputs either option1 or option2</div><div class='add'>+  C escapes are supported in the test instruction</div><div class='add'>+  Note: as-instr-option uses KBUILD_AFLAGS for assembler options</div><div class='ctx'> </div><div class='del'>-		# lib/Makefile</div><div class='del'>-		quiet_cmd_crc32 = GEN     $@</div><div class='del'>-		      cmd_crc32 = $&lt; &gt; $@</div><div class='add'>+cc-option</div><div class='add'>+  cc-option is used to check if $(CC) supports a given option, and if</div><div class='add'>+  not supported to use an optional second option.</div><div class='ctx'> </div><div class='del'>-		$(obj)/crc32table.h: $(obj)/gen_crc32table</div><div class='del'>-			$(call cmd,crc32)</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	When updating the $(obj)/crc32table.h target, the line:</div><div class='add'>+    #arch/x86/Makefile</div><div class='add'>+    cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)</div><div class='ctx'> </div><div class='del'>-		  GEN     lib/crc32table.h</div><div class='add'>+  In the above example, cflags-y will be assigned the option</div><div class='add'>+  -march=pentium-mmx if supported by $(CC), otherwise -march=i586.</div><div class='add'>+  The second argument to cc-option is optional, and if omitted,</div><div class='add'>+  cflags-y will be assigned no value if first option is not supported.</div><div class='add'>+  Note: cc-option uses KBUILD_CFLAGS for $(CC) options</div><div class='ctx'> </div><div class='del'>-	will be displayed with "make KBUILD_VERBOSE=0".</div><div class='add'>+cc-option-yn</div><div class='add'>+  cc-option-yn is used to check if gcc supports a given option</div><div class='add'>+  and return "y" if supported, otherwise "n".</div><div class='ctx'> </div><div class='del'>-3.12 Command change detection</div><div class='del'>------------------------------</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	When the rule is evaluated, timestamps are compared between the target</div><div class='del'>-	and its prerequisite files. GNU Make updates the target when any of the</div><div class='del'>-	prerequisites is newer than that.</div><div class='add'>+    #arch/ppc/Makefile</div><div class='add'>+    biarch := $(call cc-option-yn, -m32)</div><div class='add'>+    aflags-$(biarch) += -a32</div><div class='add'>+    cflags-$(biarch) += -m32</div><div class='ctx'> </div><div class='del'>-	The target should be rebuilt also when the command line has changed</div><div class='del'>-	since the last invocation. This is not supported by Make itself, so</div><div class='del'>-	Kbuild achieves this by a kind of meta-programming.</div><div class='add'>+  In the above example, $(biarch) is set to y if $(CC) supports the -m32</div><div class='add'>+  option. When $(biarch) equals "y", the expanded variables $(aflags-y)</div><div class='add'>+  and $(cflags-y) will be assigned the values -a32 and -m32,</div><div class='add'>+  respectively.</div><div class='ctx'> </div><div class='del'>-	if_changed is the macro used for this purpose, in the following form::</div><div class='add'>+  Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options</div><div class='ctx'> </div><div class='del'>-		quiet_cmd_&lt;command&gt; = ...</div><div class='del'>-		      cmd_&lt;command&gt; = ...</div><div class='add'>+cc-disable-warning</div><div class='add'>+  cc-disable-warning checks if gcc supports a given warning and returns</div><div class='add'>+  the commandline switch to disable it. This special function is needed,</div><div class='add'>+  because gcc 4.4 and later accept any unknown -Wno-* option and only</div><div class='add'>+  warn about it if there is another warning in the source file.</div><div class='ctx'> </div><div class='del'>-		&lt;target&gt;: &lt;source(s)&gt; FORCE</div><div class='del'>-			$(call if_changed,&lt;command&gt;)</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Any target that utilizes if_changed must be listed in $(targets),</div><div class='del'>-	otherwise the command line check will fail, and the target will</div><div class='del'>-	always be built.</div><div class='add'>+    KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)</div><div class='ctx'> </div><div class='del'>-	If the target is already listed in the recognized syntax such as</div><div class='del'>-	obj-y/m, lib-y/m, extra-y/m, always-y/m, hostprogs, userprogs, Kbuild</div><div class='del'>-	automatically adds it to $(targets). Otherwise, the target must be</div><div class='del'>-	explicitly added to $(targets).</div><div class='add'>+  In the above example, -Wno-unused-but-set-variable will be added to</div><div class='add'>+  KBUILD_CFLAGS only if gcc really accepts it.</div><div class='ctx'> </div><div class='del'>-	Assignments to $(targets) are without $(obj)/ prefix. if_changed may be</div><div class='del'>-	used in conjunction with custom rules as defined in "3.11 Custom Rules".</div><div class='add'>+gcc-min-version</div><div class='add'>+  gcc-min-version tests if the value of $(CONFIG_GCC_VERSION) is greater than</div><div class='add'>+  or equal to the provided value and evaluates to y if so.</div><div class='ctx'> </div><div class='del'>-	Note: It is a typical mistake to forget the FORCE prerequisite.</div><div class='del'>-	Another common pitfall is that whitespace is sometimes significant; for</div><div class='del'>-	instance, the below will fail (note the extra space after the comma)::</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-		target: source(s) FORCE</div><div class='add'>+    cflags-$(call gcc-min-version, 70100) := -foo</div><div class='ctx'> </div><div class='del'>-	**WRONG!**	$(call if_changed, objcopy)</div><div class='add'>+  In this example, cflags-y will be assigned the value -foo if $(CC) is gcc and</div><div class='add'>+  $(CONFIG_GCC_VERSION) is &gt;= 7.1.</div><div class='ctx'> </div><div class='del'>-	Note:</div><div class='del'>-		if_changed should not be used more than once per target.</div><div class='del'>-		It stores the executed command in a corresponding .cmd</div><div class='del'>-		file and multiple calls would result in overwrites and</div><div class='del'>-		unwanted results when the target is up to date and only the</div><div class='del'>-		tests on changed commands trigger execution of commands.</div><div class='add'>+clang-min-version</div><div class='add'>+  clang-min-version tests if the value of $(CONFIG_CLANG_VERSION) is greater</div><div class='add'>+  than or equal to the provided value and evaluates to y if so.</div><div class='ctx'> </div><div class='del'>-3.13 $(CC) support functions</div><div class='del'>-----------------------------</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	The kernel may be built with several different versions of</div><div class='del'>-	$(CC), each supporting a unique set of features and options.</div><div class='del'>-	kbuild provides basic support to check for valid options for $(CC).</div><div class='del'>-	$(CC) is usually the gcc compiler, but other alternatives are</div><div class='del'>-	available.</div><div class='del'>-</div><div class='del'>-    as-option</div><div class='del'>-	as-option is used to check if $(CC) -- when used to compile</div><div class='del'>-	assembler (`*.S`) files -- supports the given option. An optional</div><div class='del'>-	second option may be specified if the first option is not supported.</div><div class='del'>-</div><div class='del'>-	Example::</div><div class='del'>-</div><div class='del'>-		#arch/sh/Makefile</div><div class='del'>-		cflags-y += $(call as-option,-Wa$(comma)-isa=$(isa-y),)</div><div class='del'>-</div><div class='del'>-	In the above example, cflags-y will be assigned the option</div><div class='del'>-	-Wa$(comma)-isa=$(isa-y) if it is supported by $(CC).</div><div class='del'>-	The second argument is optional, and if supplied will be used</div><div class='del'>-	if first argument is not supported.</div><div class='del'>-</div><div class='del'>-    as-instr</div><div class='del'>-	as-instr checks if the assembler reports a specific instruction</div><div class='del'>-	and then outputs either option1 or option2</div><div class='del'>-	C escapes are supported in the test instruction</div><div class='del'>-	Note: as-instr-option uses KBUILD_AFLAGS for assembler options</div><div class='del'>-</div><div class='del'>-    cc-option</div><div class='del'>-	cc-option is used to check if $(CC) supports a given option, and if</div><div class='del'>-	not supported to use an optional second option.</div><div class='del'>-</div><div class='del'>-	Example::</div><div class='del'>-</div><div class='del'>-		#arch/x86/Makefile</div><div class='del'>-		cflags-y += $(call cc-option,-march=pentium-mmx,-march=i586)</div><div class='del'>-</div><div class='del'>-	In the above example, cflags-y will be assigned the option</div><div class='del'>-	-march=pentium-mmx if supported by $(CC), otherwise -march=i586.</div><div class='del'>-	The second argument to cc-option is optional, and if omitted,</div><div class='del'>-	cflags-y will be assigned no value if first option is not supported.</div><div class='del'>-	Note: cc-option uses KBUILD_CFLAGS for $(CC) options</div><div class='del'>-</div><div class='del'>-   cc-option-yn</div><div class='del'>-	cc-option-yn is used to check if gcc supports a given option</div><div class='del'>-	and return 'y' if supported, otherwise 'n'.</div><div class='del'>-</div><div class='del'>-	Example::</div><div class='del'>-</div><div class='del'>-		#arch/ppc/Makefile</div><div class='del'>-		biarch := $(call cc-option-yn, -m32)</div><div class='del'>-		aflags-$(biarch) += -a32</div><div class='del'>-		cflags-$(biarch) += -m32</div><div class='del'>-</div><div class='del'>-	In the above example, $(biarch) is set to y if $(CC) supports the -m32</div><div class='del'>-	option. When $(biarch) equals 'y', the expanded variables $(aflags-y)</div><div class='del'>-	and $(cflags-y) will be assigned the values -a32 and -m32,</div><div class='del'>-	respectively.</div><div class='del'>-	Note: cc-option-yn uses KBUILD_CFLAGS for $(CC) options</div><div class='del'>-</div><div class='del'>-    cc-disable-warning</div><div class='del'>-	cc-disable-warning checks if gcc supports a given warning and returns</div><div class='del'>-	the commandline switch to disable it. This special function is needed,</div><div class='del'>-	because gcc 4.4 and later accept any unknown -Wno-* option and only</div><div class='del'>-	warn about it if there is another warning in the source file.</div><div class='del'>-</div><div class='del'>-	Example::</div><div class='del'>-</div><div class='del'>-		KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)</div><div class='del'>-</div><div class='del'>-	In the above example, -Wno-unused-but-set-variable will be added to</div><div class='del'>-	KBUILD_CFLAGS only if gcc really accepts it.</div><div class='del'>-</div><div class='del'>-    cc-ifversion</div><div class='del'>-	cc-ifversion tests the version of $(CC) and equals the fourth parameter</div><div class='del'>-	if version expression is true, or the fifth (if given) if the version</div><div class='del'>-	expression is false.</div><div class='del'>-</div><div class='del'>-	Example::</div><div class='del'>-</div><div class='del'>-		#fs/reiserfs/Makefile</div><div class='del'>-		ccflags-y := $(call cc-ifversion, -lt, 0402, -O1)</div><div class='del'>-</div><div class='del'>-	In this example, ccflags-y will be assigned the value -O1 if the</div><div class='del'>-	$(CC) version is less than 4.2.</div><div class='del'>-	cc-ifversion takes all the shell operators:</div><div class='del'>-	-eq, -ne, -lt, -le, -gt, and -ge</div><div class='del'>-	The third parameter may be a text as in this example, but it may also</div><div class='del'>-	be an expanded variable or a macro.</div><div class='del'>-</div><div class='del'>-    cc-cross-prefix</div><div class='del'>-	cc-cross-prefix is used to check if there exists a $(CC) in path with</div><div class='del'>-	one of the listed prefixes. The first prefix where there exist a</div><div class='del'>-	prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found</div><div class='del'>-	then nothing is returned.</div><div class='del'>-	Additional prefixes are separated by a single space in the</div><div class='del'>-	call of cc-cross-prefix.</div><div class='del'>-	This functionality is useful for architecture Makefiles that try</div><div class='del'>-	to set CROSS_COMPILE to well-known values but may have several</div><div class='del'>-	values to select between.</div><div class='del'>-	It is recommended only to try to set CROSS_COMPILE if it is a cross</div><div class='del'>-	build (host arch is different from target arch). And if CROSS_COMPILE</div><div class='del'>-	is already set then leave it with the old value.</div><div class='del'>-</div><div class='del'>-	Example::</div><div class='del'>-</div><div class='del'>-		#arch/m68k/Makefile</div><div class='del'>-		ifneq ($(SUBARCH),$(ARCH))</div><div class='del'>-		        ifeq ($(CROSS_COMPILE),)</div><div class='del'>-		               CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)</div><div class='del'>-			endif</div><div class='del'>-		endif</div><div class='del'>-</div><div class='del'>-3.14 $(LD) support functions</div><div class='del'>-----------------------------</div><div class='add'>+    cflags-$(call clang-min-version, 110000) := -foo</div><div class='ctx'> </div><div class='del'>-    ld-option</div><div class='del'>-	ld-option is used to check if $(LD) supports the supplied option.</div><div class='del'>-	ld-option takes two options as arguments.</div><div class='del'>-	The second argument is an optional option that can be used if the</div><div class='del'>-	first option is not supported by $(LD).</div><div class='add'>+  In this example, cflags-y will be assigned the value -foo if $(CC) is clang</div><div class='add'>+  and $(CONFIG_CLANG_VERSION) is &gt;= 11.0.0.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+cc-cross-prefix</div><div class='add'>+  cc-cross-prefix is used to check if there exists a $(CC) in path with</div><div class='add'>+  one of the listed prefixes. The first prefix where there exist a</div><div class='add'>+  prefix$(CC) in the PATH is returned - and if no prefix$(CC) is found</div><div class='add'>+  then nothing is returned.</div><div class='ctx'> </div><div class='del'>-		#Makefile</div><div class='del'>-		LDFLAGS_vmlinux += $(call ld-option, -X)</div><div class='add'>+  Additional prefixes are separated by a single space in the</div><div class='add'>+  call of cc-cross-prefix.</div><div class='ctx'> </div><div class='del'>-3.15 Script invocation</div><div class='del'>-----------------------</div><div class='add'>+  This functionality is useful for architecture Makefiles that try</div><div class='add'>+  to set CROSS_COMPILE to well-known values but may have several</div><div class='add'>+  values to select between.</div><div class='ctx'> </div><div class='del'>-	Make rules may invoke scripts to build the kernel. The rules shall</div><div class='del'>-	always provide the appropriate interpreter to execute the script. They</div><div class='del'>-	shall not rely on the execute bits being set, and shall not invoke the</div><div class='del'>-	script directly. For the convenience of manual script invocation, such</div><div class='del'>-	as invoking ./scripts/checkpatch.pl, it is recommended to set execute</div><div class='del'>-	bits on the scripts nonetheless.</div><div class='add'>+  It is recommended only to try to set CROSS_COMPILE if it is a cross</div><div class='add'>+  build (host arch is different from target arch). And if CROSS_COMPILE</div><div class='add'>+  is already set then leave it with the old value.</div><div class='ctx'> </div><div class='del'>-	Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL),</div><div class='del'>-	and $(PYTHON3) to refer to interpreters for the respective</div><div class='del'>-	scripts.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    #arch/m68k/Makefile</div><div class='add'>+    ifneq ($(SUBARCH),$(ARCH))</div><div class='add'>+            ifeq ($(CROSS_COMPILE),)</div><div class='add'>+                    CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu-)</div><div class='add'>+            endif</div><div class='add'>+    endif</div><div class='ctx'> </div><div class='del'>-		#Makefile</div><div class='del'>-		cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \</div><div class='del'>-			     $(KERNELRELEASE)</div><div class='add'>+$(LD) support functions</div><div class='add'>+-----------------------</div><div class='ctx'> </div><div class='del'>-4 Host Program support</div><div class='del'>-======================</div><div class='add'>+ld-option</div><div class='add'>+  ld-option is used to check if $(LD) supports the supplied option.</div><div class='add'>+  ld-option takes two options as arguments.</div><div class='add'>+</div><div class='add'>+  The second argument is an optional option that can be used if the</div><div class='add'>+  first option is not supported by $(LD).</div><div class='add'>+</div><div class='add'>+  Example::</div><div class='add'>+</div><div class='add'>+    #Makefile</div><div class='add'>+    LDFLAGS_vmlinux += $(call ld-option, -X)</div><div class='add'>+</div><div class='add'>+Script invocation</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Make rules may invoke scripts to build the kernel. The rules shall</div><div class='add'>+always provide the appropriate interpreter to execute the script. They</div><div class='add'>+shall not rely on the execute bits being set, and shall not invoke the</div><div class='add'>+script directly. For the convenience of manual script invocation, such</div><div class='add'>+as invoking ./scripts/checkpatch.pl, it is recommended to set execute</div><div class='add'>+bits on the scripts nonetheless.</div><div class='add'>+</div><div class='add'>+Kbuild provides variables $(CONFIG_SHELL), $(AWK), $(PERL),</div><div class='add'>+and $(PYTHON3) to refer to interpreters for the respective</div><div class='add'>+scripts.</div><div class='add'>+</div><div class='add'>+Example::</div><div class='add'>+</div><div class='add'>+  #Makefile</div><div class='add'>+  cmd_depmod = $(CONFIG_SHELL) $(srctree)/scripts/depmod.sh $(DEPMOD) \</div><div class='add'>+          $(KERNELRELEASE)</div><div class='add'>+</div><div class='add'>+Host Program support</div><div class='add'>+====================</div><div class='ctx'> </div><div class='ctx'> Kbuild supports building executables on the host for use during the</div><div class='ctx'> compilation stage.</div><div class='add'>+</div><div class='ctx'> Two steps are required in order to use a host executable.</div><div class='ctx'> </div><div class='ctx'> The first step is to tell kbuild that a host program exists. This is</div><div class='del'>-done utilising the variable "hostprogs".</div><div class='add'>+done utilising the variable ``hostprogs``.</div><div class='ctx'> </div><div class='ctx'> The second step is to add an explicit dependency to the executable.</div><div class='ctx'> This can be done in two ways. Either add the dependency in a rule,</div><div class='del'>-or utilise the variable "always-y".</div><div class='add'>+or utilise the variable ``always-y``.</div><div class='ctx'> Both possibilities are described in the following.</div><div class='ctx'> </div><div class='del'>-4.1 Simple Host Program</div><div class='add'>+Simple Host Program</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+In some cases there is a need to compile and run a program on the</div><div class='add'>+computer where the build is running.</div><div class='add'>+</div><div class='add'>+The following line tells kbuild that the program bin2hex shall be</div><div class='add'>+built on the build host.</div><div class='add'>+</div><div class='add'>+Example::</div><div class='add'>+</div><div class='add'>+  hostprogs := bin2hex</div><div class='add'>+</div><div class='add'>+Kbuild assumes in the above example that bin2hex is made from a single</div><div class='add'>+c-source file named bin2hex.c located in the same directory as</div><div class='add'>+the Makefile.</div><div class='add'>+</div><div class='add'>+Composite Host Programs</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='del'>-	In some cases there is a need to compile and run a program on the</div><div class='del'>-	computer where the build is running.</div><div class='del'>-	The following line tells kbuild that the program bin2hex shall be</div><div class='del'>-	built on the build host.</div><div class='add'>+Host programs can be made up based on composite objects.</div><div class='add'>+The syntax used to define composite objects for host programs is</div><div class='add'>+similar to the syntax used for kernel objects.</div><div class='add'>+$(&lt;executable&gt;-objs) lists all objects used to link the final</div><div class='add'>+executable.</div><div class='add'>+</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  #scripts/lxdialog/Makefile</div><div class='add'>+  hostprogs     := lxdialog</div><div class='add'>+  lxdialog-objs := checklist.o lxdialog.o</div><div class='ctx'> </div><div class='del'>-		hostprogs := bin2hex</div><div class='add'>+Objects with extension .o are compiled from the corresponding .c</div><div class='add'>+files. In the above example, checklist.c is compiled to checklist.o</div><div class='add'>+and lxdialog.c is compiled to lxdialog.o.</div><div class='ctx'> </div><div class='del'>-	Kbuild assumes in the above example that bin2hex is made from a single</div><div class='del'>-	c-source file named bin2hex.c located in the same directory as</div><div class='del'>-	the Makefile.</div><div class='add'>+Finally, the two .o files are linked to the executable, lxdialog.</div><div class='add'>+Note: The syntax &lt;executable&gt;-y is not permitted for host-programs.</div><div class='ctx'> </div><div class='del'>-4.2 Composite Host Programs</div><div class='add'>+Using C++ for host programs</div><div class='ctx'> ---------------------------</div><div class='ctx'> </div><div class='del'>-	Host programs can be made up based on composite objects.</div><div class='del'>-	The syntax used to define composite objects for host programs is</div><div class='del'>-	similar to the syntax used for kernel objects.</div><div class='del'>-	$(&lt;executable&gt;-objs) lists all objects used to link the final</div><div class='del'>-	executable.</div><div class='add'>+kbuild offers support for host programs written in C++. This was</div><div class='add'>+introduced solely to support kconfig, and is not recommended</div><div class='add'>+for general use.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#scripts/lxdialog/Makefile</div><div class='del'>-		hostprogs     := lxdialog</div><div class='del'>-		lxdialog-objs := checklist.o lxdialog.o</div><div class='add'>+  #scripts/kconfig/Makefile</div><div class='add'>+  hostprogs     := qconf</div><div class='add'>+  qconf-cxxobjs := qconf.o</div><div class='ctx'> </div><div class='del'>-	Objects with extension .o are compiled from the corresponding .c</div><div class='del'>-	files. In the above example, checklist.c is compiled to checklist.o</div><div class='del'>-	and lxdialog.c is compiled to lxdialog.o.</div><div class='add'>+In the example above the executable is composed of the C++ file</div><div class='add'>+qconf.cc - identified by $(qconf-cxxobjs).</div><div class='ctx'> </div><div class='del'>-	Finally, the two .o files are linked to the executable, lxdialog.</div><div class='del'>-	Note: The syntax &lt;executable&gt;-y is not permitted for host-programs.</div><div class='add'>+If qconf is composed of a mixture of .c and .cc files, then an</div><div class='add'>+additional line can be used to identify this.</div><div class='ctx'> </div><div class='del'>-4.3 Using C++ for host programs</div><div class='del'>--------------------------------</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	kbuild offers support for host programs written in C++. This was</div><div class='del'>-	introduced solely to support kconfig, and is not recommended</div><div class='del'>-	for general use.</div><div class='add'>+  #scripts/kconfig/Makefile</div><div class='add'>+  hostprogs     := qconf</div><div class='add'>+  qconf-cxxobjs := qconf.o</div><div class='add'>+  qconf-objs    := check.o</div><div class='add'>+</div><div class='add'>+Using Rust for host programs</div><div class='add'>+----------------------------</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Kbuild offers support for host programs written in Rust. However,</div><div class='add'>+since a Rust toolchain is not mandatory for kernel compilation,</div><div class='add'>+it may only be used in scenarios where Rust is required to be</div><div class='add'>+available (e.g. when  ``CONFIG_RUST`` is enabled).</div><div class='ctx'> </div><div class='del'>-		#scripts/kconfig/Makefile</div><div class='del'>-		hostprogs     := qconf</div><div class='del'>-		qconf-cxxobjs := qconf.o</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	In the example above the executable is composed of the C++ file</div><div class='del'>-	qconf.cc - identified by $(qconf-cxxobjs).</div><div class='add'>+  hostprogs     := target</div><div class='add'>+  target-rust   := y</div><div class='ctx'> </div><div class='del'>-	If qconf is composed of a mixture of .c and .cc files, then an</div><div class='del'>-	additional line can be used to identify this.</div><div class='add'>+Kbuild will compile ``target`` using ``target.rs`` as the crate root,</div><div class='add'>+located in the same directory as the ``Makefile``. The crate may</div><div class='add'>+consist of several source files (see ``samples/rust/hostprogs``).</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Controlling compiler options for host programs</div><div class='add'>+----------------------------------------------</div><div class='ctx'> </div><div class='del'>-		#scripts/kconfig/Makefile</div><div class='del'>-		hostprogs     := qconf</div><div class='del'>-		qconf-cxxobjs := qconf.o</div><div class='del'>-		qconf-objs    := check.o</div><div class='add'>+When compiling host programs, it is possible to set specific flags.</div><div class='add'>+The programs will always be compiled utilising $(HOSTCC) passed</div><div class='add'>+the options specified in $(KBUILD_HOSTCFLAGS).</div><div class='ctx'> </div><div class='del'>-4.4 Controlling compiler options for host programs</div><div class='del'>---------------------------------------------------</div><div class='add'>+To set flags that will take effect for all host programs created</div><div class='add'>+in that Makefile, use the variable HOST_EXTRACFLAGS.</div><div class='ctx'> </div><div class='del'>-	When compiling host programs, it is possible to set specific flags.</div><div class='del'>-	The programs will always be compiled utilising $(HOSTCC) passed</div><div class='del'>-	the options specified in $(KBUILD_HOSTCFLAGS).</div><div class='del'>-	To set flags that will take effect for all host programs created</div><div class='del'>-	in that Makefile, use the variable HOST_EXTRACFLAGS.</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  #scripts/lxdialog/Makefile</div><div class='add'>+  HOST_EXTRACFLAGS += -I/usr/include/ncurses</div><div class='ctx'> </div><div class='del'>-		#scripts/lxdialog/Makefile</div><div class='del'>-		HOST_EXTRACFLAGS += -I/usr/include/ncurses</div><div class='add'>+To set specific flags for a single file the following construction</div><div class='add'>+is used:</div><div class='ctx'> </div><div class='del'>-	To set specific flags for a single file the following construction</div><div class='del'>-	is used:</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  #arch/ppc64/boot/Makefile</div><div class='add'>+  HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)</div><div class='ctx'> </div><div class='del'>-		#arch/ppc64/boot/Makefile</div><div class='del'>-		HOSTCFLAGS_piggyback.o := -DKERNELBASE=$(KERNELBASE)</div><div class='add'>+It is also possible to specify additional options to the linker.</div><div class='ctx'> </div><div class='del'>-	It is also possible to specify additional options to the linker.</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  #scripts/kconfig/Makefile</div><div class='add'>+  HOSTLDLIBS_qconf := -L$(QTDIR)/lib</div><div class='ctx'> </div><div class='del'>-		#scripts/kconfig/Makefile</div><div class='del'>-		HOSTLDLIBS_qconf := -L$(QTDIR)/lib</div><div class='add'>+When linking qconf, it will be passed the extra option</div><div class='add'>+``-L$(QTDIR)/lib``.</div><div class='ctx'> </div><div class='del'>-	When linking qconf, it will be passed the extra option</div><div class='del'>-	"-L$(QTDIR)/lib".</div><div class='add'>+When host programs are actually built</div><div class='add'>+-------------------------------------</div><div class='ctx'> </div><div class='del'>-4.5 When host programs are actually built</div><div class='del'>------------------------------------------</div><div class='add'>+Kbuild will only build host-programs when they are referenced</div><div class='add'>+as a prerequisite.</div><div class='ctx'> </div><div class='del'>-	Kbuild will only build host-programs when they are referenced</div><div class='del'>-	as a prerequisite.</div><div class='del'>-	This is possible in two ways:</div><div class='add'>+This is possible in two ways:</div><div class='ctx'> </div><div class='del'>-	(1) List the prerequisite explicitly in a custom rule.</div><div class='add'>+(1) List the prerequisite explicitly in a custom rule.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    Example::</div><div class='ctx'> </div><div class='del'>-		#drivers/pci/Makefile</div><div class='del'>-		hostprogs := gen-devlist</div><div class='del'>-		$(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist</div><div class='del'>-			( cd $(obj); ./gen-devlist ) &lt; $&lt;</div><div class='add'>+      #drivers/pci/Makefile</div><div class='add'>+      hostprogs := gen-devlist</div><div class='add'>+      $(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist</div><div class='add'>+      ( cd $(obj); ./gen-devlist ) &lt; $&lt;</div><div class='ctx'> </div><div class='del'>-	The target $(obj)/devlist.h will not be built before</div><div class='del'>-	$(obj)/gen-devlist is updated. Note that references to</div><div class='del'>-	the host programs in custom rules must be prefixed with $(obj).</div><div class='add'>+    The target $(obj)/devlist.h will not be built before</div><div class='add'>+    $(obj)/gen-devlist is updated. Note that references to</div><div class='add'>+    the host programs in custom rules must be prefixed with $(obj).</div><div class='ctx'> </div><div class='del'>-	(2) Use always-y</div><div class='add'>+(2) Use always-y</div><div class='ctx'> </div><div class='del'>-	When there is no suitable custom rule, and the host program</div><div class='del'>-	shall be built when a makefile is entered, the always-y</div><div class='del'>-	variable shall be used.</div><div class='add'>+    When there is no suitable custom rule, and the host program</div><div class='add'>+    shall be built when a makefile is entered, the always-y</div><div class='add'>+    variable shall be used.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    Example::</div><div class='ctx'> </div><div class='del'>-		#scripts/lxdialog/Makefile</div><div class='del'>-		hostprogs     := lxdialog</div><div class='del'>-		always-y      := $(hostprogs)</div><div class='add'>+      #scripts/lxdialog/Makefile</div><div class='add'>+      hostprogs     := lxdialog</div><div class='add'>+      always-y      := $(hostprogs)</div><div class='ctx'> </div><div class='del'>-	Kbuild provides the following shorthand for this:</div><div class='add'>+    Kbuild provides the following shorthand for this::</div><div class='ctx'> </div><div class='del'>-		hostprogs-always-y := lxdialog</div><div class='add'>+      hostprogs-always-y := lxdialog</div><div class='ctx'> </div><div class='del'>-	This will tell kbuild to build lxdialog even if not referenced in</div><div class='del'>-	any rule.</div><div class='add'>+    This will tell kbuild to build lxdialog even if not referenced in</div><div class='add'>+    any rule.</div><div class='ctx'> </div><div class='del'>-5 Userspace Program support</div><div class='del'>-===========================</div><div class='add'>+Userspace Program support</div><div class='add'>+=========================</div><div class='ctx'> </div><div class='ctx'> Just like host programs, Kbuild also supports building userspace executables</div><div class='ctx'> for the target architecture (i.e. the same architecture as you are building</div><div class='ctx'> the kernel for).</div><div class='ctx'> </div><div class='del'>-The syntax is quite similar. The difference is to use "userprogs" instead of</div><div class='del'>-"hostprogs".</div><div class='add'>+The syntax is quite similar. The difference is to use ``userprogs`` instead of</div><div class='add'>+``hostprogs``.</div><div class='ctx'> </div><div class='del'>-5.1 Simple Userspace Program</div><div class='del'>-----------------------------</div><div class='add'>+Simple Userspace Program</div><div class='add'>+------------------------</div><div class='ctx'> </div><div class='del'>-	The following line tells kbuild that the program bpf-direct shall be</div><div class='del'>-	built for the target architecture.</div><div class='add'>+The following line tells kbuild that the program bpf-direct shall be</div><div class='add'>+built for the target architecture.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		userprogs := bpf-direct</div><div class='add'>+  userprogs := bpf-direct</div><div class='ctx'> </div><div class='del'>-	Kbuild assumes in the above example that bpf-direct is made from a</div><div class='del'>-	single C source file named bpf-direct.c located in the same directory</div><div class='del'>-	as the Makefile.</div><div class='add'>+Kbuild assumes in the above example that bpf-direct is made from a</div><div class='add'>+single C source file named bpf-direct.c located in the same directory</div><div class='add'>+as the Makefile.</div><div class='ctx'> </div><div class='del'>-5.2 Composite Userspace Programs</div><div class='del'>---------------------------------</div><div class='add'>+Composite Userspace Programs</div><div class='add'>+----------------------------</div><div class='ctx'> </div><div class='del'>-	Userspace programs can be made up based on composite objects.</div><div class='del'>-	The syntax used to define composite objects for userspace programs is</div><div class='del'>-	similar to the syntax used for kernel objects.</div><div class='del'>-	$(&lt;executable&gt;-objs) lists all objects used to link the final</div><div class='del'>-	executable.</div><div class='add'>+Userspace programs can be made up based on composite objects.</div><div class='add'>+The syntax used to define composite objects for userspace programs is</div><div class='add'>+similar to the syntax used for kernel objects.</div><div class='add'>+$(&lt;executable&gt;-objs) lists all objects used to link the final</div><div class='add'>+executable.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#samples/seccomp/Makefile</div><div class='del'>-		userprogs      := bpf-fancy</div><div class='del'>-		bpf-fancy-objs := bpf-fancy.o bpf-helper.o</div><div class='add'>+  #samples/seccomp/Makefile</div><div class='add'>+  userprogs      := bpf-fancy</div><div class='add'>+  bpf-fancy-objs := bpf-fancy.o bpf-helper.o</div><div class='ctx'> </div><div class='del'>-	Objects with extension .o are compiled from the corresponding .c</div><div class='del'>-	files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o</div><div class='del'>-	and bpf-helper.c is compiled to bpf-helper.o.</div><div class='add'>+Objects with extension .o are compiled from the corresponding .c</div><div class='add'>+files. In the above example, bpf-fancy.c is compiled to bpf-fancy.o</div><div class='add'>+and bpf-helper.c is compiled to bpf-helper.o.</div><div class='ctx'> </div><div class='del'>-	Finally, the two .o files are linked to the executable, bpf-fancy.</div><div class='del'>-	Note: The syntax &lt;executable&gt;-y is not permitted for userspace programs.</div><div class='add'>+Finally, the two .o files are linked to the executable, bpf-fancy.</div><div class='add'>+Note: The syntax &lt;executable&gt;-y is not permitted for userspace programs.</div><div class='ctx'> </div><div class='del'>-5.3 Controlling compiler options for userspace programs</div><div class='del'>--------------------------------------------------------</div><div class='add'>+Controlling compiler options for userspace programs</div><div class='add'>+---------------------------------------------------</div><div class='ctx'> </div><div class='del'>-	When compiling userspace programs, it is possible to set specific flags.</div><div class='del'>-	The programs will always be compiled utilising $(CC) passed</div><div class='del'>-	the options specified in $(KBUILD_USERCFLAGS).</div><div class='del'>-	To set flags that will take effect for all userspace programs created</div><div class='del'>-	in that Makefile, use the variable userccflags.</div><div class='add'>+When compiling userspace programs, it is possible to set specific flags.</div><div class='add'>+The programs will always be compiled utilising $(CC) passed</div><div class='add'>+the options specified in $(KBUILD_USERCFLAGS).</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+To set flags that will take effect for all userspace programs created</div><div class='add'>+in that Makefile, use the variable userccflags.</div><div class='ctx'> </div><div class='del'>-		# samples/seccomp/Makefile</div><div class='del'>-		userccflags += -I usr/include</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	To set specific flags for a single file the following construction</div><div class='del'>-	is used:</div><div class='add'>+  # samples/seccomp/Makefile</div><div class='add'>+  userccflags += -I usr/include</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+To set specific flags for a single file the following construction</div><div class='add'>+is used:</div><div class='ctx'> </div><div class='del'>-		bpf-helper-userccflags += -I user/include</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	It is also possible to specify additional options to the linker.</div><div class='add'>+  bpf-helper-userccflags += -I user/include</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+It is also possible to specify additional options to the linker.</div><div class='ctx'> </div><div class='del'>-		# net/bpfilter/Makefile</div><div class='del'>-		bpfilter_umh-userldflags += -static</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	When linking bpfilter_umh, it will be passed the extra option -static.</div><div class='add'>+  # net/bpfilter/Makefile</div><div class='add'>+  bpfilter_umh-userldflags += -static</div><div class='ctx'> </div><div class='del'>-	From command line, :ref:`USERCFLAGS and USERLDFLAGS &lt;userkbuildflags&gt;` will also be used.</div><div class='add'>+When linking bpfilter_umh, it will be passed the extra option -static.</div><div class='ctx'> </div><div class='del'>-5.4 When userspace programs are actually built</div><div class='del'>-----------------------------------------------</div><div class='add'>+From command line, :ref:`USERCFLAGS and USERLDFLAGS &lt;userkbuildflags&gt;` will also be used.</div><div class='add'>+</div><div class='add'>+When userspace programs are actually built</div><div class='add'>+------------------------------------------</div><div class='ctx'> </div><div class='del'>-	Kbuild builds userspace programs only when told to do so.</div><div class='del'>-	There are two ways to do this.</div><div class='add'>+Kbuild builds userspace programs only when told to do so.</div><div class='add'>+There are two ways to do this.</div><div class='ctx'> </div><div class='del'>-	(1) Add it as the prerequisite of another file</div><div class='add'>+(1) Add it as the prerequisite of another file</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    Example::</div><div class='ctx'> </div><div class='del'>-		#net/bpfilter/Makefile</div><div class='del'>-		userprogs := bpfilter_umh</div><div class='del'>-		$(obj)/bpfilter_umh_blob.o: $(obj)/bpfilter_umh</div><div class='add'>+      #net/bpfilter/Makefile</div><div class='add'>+      userprogs := bpfilter_umh</div><div class='add'>+      $(obj)/bpfilter_umh_blob.o: $(obj)/bpfilter_umh</div><div class='ctx'> </div><div class='del'>-	$(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o</div><div class='add'>+    $(obj)/bpfilter_umh is built before $(obj)/bpfilter_umh_blob.o</div><div class='ctx'> </div><div class='del'>-	(2) Use always-y</div><div class='add'>+(2) Use always-y</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    Example::</div><div class='ctx'> </div><div class='del'>-		userprogs := binderfs_example</div><div class='del'>-		always-y := $(userprogs)</div><div class='add'>+      userprogs := binderfs_example</div><div class='add'>+      always-y := $(userprogs)</div><div class='ctx'> </div><div class='del'>-	Kbuild provides the following shorthand for this:</div><div class='add'>+    Kbuild provides the following shorthand for this::</div><div class='ctx'> </div><div class='del'>-		userprogs-always-y := binderfs_example</div><div class='add'>+      userprogs-always-y := binderfs_example</div><div class='ctx'> </div><div class='del'>-	This will tell Kbuild to build binderfs_example when it visits this</div><div class='del'>-	Makefile.</div><div class='add'>+    This will tell Kbuild to build binderfs_example when it visits this</div><div class='add'>+    Makefile.</div><div class='ctx'> </div><div class='del'>-6 Kbuild clean infrastructure</div><div class='del'>-=============================</div><div class='add'>+Kbuild clean infrastructure</div><div class='add'>+===========================</div><div class='ctx'> </div><div class='del'>-"make clean" deletes most generated files in the obj tree where the kernel</div><div class='add'>+``make clean`` deletes most generated files in the obj tree where the kernel</div><div class='ctx'> is compiled. This includes generated files such as host programs.</div><div class='ctx'> Kbuild knows targets listed in $(hostprogs), $(always-y), $(always-m),</div><div class='ctx'> $(always-), $(extra-y), $(extra-) and $(targets). They are all deleted</div><div class='del'>-during "make clean". Files matching the patterns "*.[oas]", "*.ko", plus</div><div class='add'>+during ``make clean``. Files matching the patterns ``*.[oas]``, ``*.ko``, plus</div><div class='ctx'> some additional files generated by kbuild are deleted all over the kernel</div><div class='del'>-source tree when "make clean" is executed.</div><div class='add'>+source tree when ``make clean`` is executed.</div><div class='ctx'> </div><div class='ctx'> Additional files or directories can be specified in kbuild makefiles by use of</div><div class='ctx'> $(clean-files).</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#lib/Makefile</div><div class='del'>-		clean-files := crc32table.h</div><div class='add'>+  #lib/Makefile</div><div class='add'>+  clean-files := crc32table.h</div><div class='ctx'> </div><div class='del'>-When executing "make clean", the file "crc32table.h" will be deleted.</div><div class='add'>+When executing ``make clean``, the file ``crc32table.h`` will be deleted.</div><div class='ctx'> Kbuild will assume files to be in the same relative directory as the</div><div class='del'>-Makefile, except if prefixed with $(objtree).</div><div class='add'>+Makefile.</div><div class='ctx'> </div><div class='ctx'> To exclude certain files or directories from make clean, use the</div><div class='ctx'> $(no-clean-files) variable.</div><div class='ctx'> </div><div class='del'>-Usually kbuild descends down in subdirectories due to "obj-* := dir/",</div><div class='add'>+Usually kbuild descends down in subdirectories due to ``obj-* := dir/``,</div><div class='ctx'> but in the architecture makefiles where the kbuild infrastructure</div><div class='ctx'> is not sufficient this sometimes needs to be explicit.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#arch/x86/boot/Makefile</div><div class='del'>-		subdir- := compressed</div><div class='add'>+  #arch/x86/boot/Makefile</div><div class='add'>+  subdir- := compressed</div><div class='ctx'> </div><div class='ctx'> The above assignment instructs kbuild to descend down in the</div><div class='del'>-directory compressed/ when "make clean" is executed.</div><div class='add'>+directory compressed/ when ``make clean`` is executed.</div><div class='ctx'> </div><div class='del'>-Note 1: arch/$(SRCARCH)/Makefile cannot use "subdir-", because that file is</div><div class='add'>+Note 1: arch/$(SRCARCH)/Makefile cannot use ``subdir-``, because that file is</div><div class='ctx'> included in the top level makefile. Instead, arch/$(SRCARCH)/Kbuild can use</div><div class='del'>-"subdir-".</div><div class='add'>+``subdir-``.</div><div class='ctx'> </div><div class='ctx'> Note 2: All directories listed in core-y, libs-y, drivers-y and net-y will</div><div class='del'>-be visited during "make clean".</div><div class='add'>+be visited during ``make clean``.</div><div class='ctx'> </div><div class='del'>-7 Architecture Makefiles</div><div class='del'>-========================</div><div class='add'>+Architecture Makefiles</div><div class='add'>+======================</div><div class='ctx'> </div><div class='ctx'> The top level Makefile sets up the environment and does the preparation,</div><div class='ctx'> before starting to descend down in the individual directories.</div><div class='add'>+</div><div class='ctx'> The top level makefile contains the generic part, whereas</div><div class='ctx'> arch/$(SRCARCH)/Makefile contains what is required to set up kbuild</div><div class='ctx'> for said architecture.</div><div class='add'>+</div><div class='ctx'> To do so, arch/$(SRCARCH)/Makefile sets up a number of variables and defines</div><div class='ctx'> a few targets.</div><div class='ctx'> </div><div class='ctx'> When kbuild executes, the following steps are followed (roughly):</div><div class='ctx'> </div><div class='ctx'> 1) Configuration of the kernel =&gt; produce .config</div><div class='add'>+</div><div class='ctx'> 2) Store kernel version in include/linux/version.h</div><div class='add'>+</div><div class='ctx'> 3) Updating all other prerequisites to the target prepare:</div><div class='add'>+</div><div class='ctx'>    - Additional prerequisites are specified in arch/$(SRCARCH)/Makefile</div><div class='add'>+</div><div class='ctx'> 4) Recursively descend down in all directories listed in</div><div class='ctx'>    init-* core* drivers-* net-* libs-* and build all targets.</div><div class='add'>+</div><div class='ctx'>    - The values of the above variables are expanded in arch/$(SRCARCH)/Makefile.</div><div class='add'>+</div><div class='ctx'> 5) All object files are then linked and the resulting file vmlinux is</div><div class='ctx'>    located at the root of the obj tree.</div><div class='del'>-   The very first objects linked are listed in head-y, assigned by</div><div class='del'>-   arch/$(SRCARCH)/Makefile.</div><div class='add'>+   The very first objects linked are listed in scripts/head-object-list.txt.</div><div class='add'>+</div><div class='ctx'> 6) Finally, the architecture-specific part does any required post processing</div><div class='ctx'>    and builds the final bootimage.</div><div class='add'>+</div><div class='ctx'>    - This includes building boot records</div><div class='ctx'>    - Preparing initrd images and the like</div><div class='ctx'> </div><div class='add'>+Set variables to tweak the build to the architecture</div><div class='add'>+----------------------------------------------------</div><div class='add'>+</div><div class='add'>+KBUILD_LDFLAGS</div><div class='add'>+  Generic $(LD) options</div><div class='ctx'> </div><div class='del'>-7.1 Set variables to tweak the build to the architecture</div><div class='del'>---------------------------------------------------------</div><div class='add'>+  Flags used for all invocations of the linker.</div><div class='add'>+  Often specifying the emulation is sufficient.</div><div class='ctx'> </div><div class='del'>-    KBUILD_LDFLAGS</div><div class='del'>-	Generic $(LD) options</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Flags used for all invocations of the linker.</div><div class='del'>-	Often specifying the emulation is sufficient.</div><div class='add'>+    #arch/s390/Makefile</div><div class='add'>+    KBUILD_LDFLAGS         := -m elf_s390</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  Note: ldflags-y can be used to further customise</div><div class='add'>+  the flags used. See `Non-builtin vmlinux targets - extra-y`_.</div><div class='ctx'> </div><div class='del'>-		#arch/s390/Makefile</div><div class='del'>-		KBUILD_LDFLAGS         := -m elf_s390</div><div class='add'>+LDFLAGS_vmlinux</div><div class='add'>+  Options for $(LD) when linking vmlinux</div><div class='ctx'> </div><div class='del'>-	Note: ldflags-y can be used to further customise</div><div class='del'>-	the flags used. See section 3.7.</div><div class='add'>+  LDFLAGS_vmlinux is used to specify additional flags to pass to</div><div class='add'>+  the linker when linking the final vmlinux image.</div><div class='ctx'> </div><div class='del'>-    LDFLAGS_vmlinux</div><div class='del'>-	Options for $(LD) when linking vmlinux</div><div class='add'>+  LDFLAGS_vmlinux uses the LDFLAGS_$@ support.</div><div class='ctx'> </div><div class='del'>-	LDFLAGS_vmlinux is used to specify additional flags to pass to</div><div class='del'>-	the linker when linking the final vmlinux image.</div><div class='del'>-	LDFLAGS_vmlinux uses the LDFLAGS_$@ support.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    #arch/x86/Makefile</div><div class='add'>+    LDFLAGS_vmlinux := -e stext</div><div class='ctx'> </div><div class='del'>-		#arch/x86/Makefile</div><div class='del'>-		LDFLAGS_vmlinux := -e stext</div><div class='add'>+OBJCOPYFLAGS</div><div class='add'>+  objcopy flags</div><div class='ctx'> </div><div class='del'>-    OBJCOPYFLAGS</div><div class='del'>-	objcopy flags</div><div class='add'>+  When $(call if_changed,objcopy) is used to translate a .o file,</div><div class='add'>+  the flags specified in OBJCOPYFLAGS will be used.</div><div class='ctx'> </div><div class='del'>-	When $(call if_changed,objcopy) is used to translate a .o file,</div><div class='del'>-	the flags specified in OBJCOPYFLAGS will be used.</div><div class='del'>-	$(call if_changed,objcopy) is often used to generate raw binaries on</div><div class='del'>-	vmlinux.</div><div class='add'>+  $(call if_changed,objcopy) is often used to generate raw binaries on</div><div class='add'>+  vmlinux.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-		#arch/s390/Makefile</div><div class='del'>-		OBJCOPYFLAGS := -O binary</div><div class='add'>+    #arch/s390/Makefile</div><div class='add'>+    OBJCOPYFLAGS := -O binary</div><div class='ctx'> </div><div class='del'>-		#arch/s390/boot/Makefile</div><div class='del'>-		$(obj)/image: vmlinux FORCE</div><div class='del'>-			$(call if_changed,objcopy)</div><div class='add'>+    #arch/s390/boot/Makefile</div><div class='add'>+    $(obj)/image: vmlinux FORCE</div><div class='add'>+            $(call if_changed,objcopy)</div><div class='ctx'> </div><div class='del'>-	In this example, the binary $(obj)/image is a binary version of</div><div class='del'>-	vmlinux. The usage of $(call if_changed,xxx) will be described later.</div><div class='add'>+  In this example, the binary $(obj)/image is a binary version of</div><div class='add'>+  vmlinux. The usage of $(call if_changed,xxx) will be described later.</div><div class='ctx'> </div><div class='del'>-    KBUILD_AFLAGS</div><div class='del'>-	Assembler flags</div><div class='add'>+KBUILD_AFLAGS</div><div class='add'>+  Assembler flags</div><div class='ctx'> </div><div class='del'>-	Default value - see top level Makefile</div><div class='del'>-	Append or modify as required per architecture.</div><div class='add'>+  Default value - see top level Makefile.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  Append or modify as required per architecture.</div><div class='ctx'> </div><div class='del'>-		#arch/sparc64/Makefile</div><div class='del'>-		KBUILD_AFLAGS += -m64 -mcpu=ultrasparc</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-    KBUILD_CFLAGS</div><div class='del'>-	$(CC) compiler flags</div><div class='add'>+    #arch/sparc64/Makefile</div><div class='add'>+    KBUILD_AFLAGS += -m64 -mcpu=ultrasparc</div><div class='ctx'> </div><div class='del'>-	Default value - see top level Makefile</div><div class='del'>-	Append or modify as required per architecture.</div><div class='add'>+KBUILD_CFLAGS</div><div class='add'>+  $(CC) compiler flags</div><div class='ctx'> </div><div class='del'>-	Often, the KBUILD_CFLAGS variable depends on the configuration.</div><div class='add'>+  Default value - see top level Makefile.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  Append or modify as required per architecture.</div><div class='ctx'> </div><div class='del'>-		#arch/x86/boot/compressed/Makefile</div><div class='del'>-		cflags-$(CONFIG_X86_32) := -march=i386</div><div class='del'>-		cflags-$(CONFIG_X86_64) := -mcmodel=small</div><div class='del'>-		KBUILD_CFLAGS += $(cflags-y)</div><div class='add'>+  Often, the KBUILD_CFLAGS variable depends on the configuration.</div><div class='ctx'> </div><div class='del'>-	Many arch Makefiles dynamically run the target C compiler to</div><div class='del'>-	probe supported options::</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-		#arch/x86/Makefile</div><div class='add'>+    #arch/x86/boot/compressed/Makefile</div><div class='add'>+    cflags-$(CONFIG_X86_32) := -march=i386</div><div class='add'>+    cflags-$(CONFIG_X86_64) := -mcmodel=small</div><div class='add'>+    KBUILD_CFLAGS += $(cflags-y)</div><div class='ctx'> </div><div class='del'>-		...</div><div class='del'>-		cflags-$(CONFIG_MPENTIUMII)     += $(call cc-option,\</div><div class='add'>+  Many arch Makefiles dynamically run the target C compiler to</div><div class='add'>+  probe supported options::</div><div class='add'>+</div><div class='add'>+    #arch/x86/Makefile</div><div class='add'>+</div><div class='add'>+    ...</div><div class='add'>+    cflags-$(CONFIG_MPENTIUMII)     += $(call cc-option,\</div><div class='ctx'> 						-march=pentium2,-march=i686)</div><div class='del'>-		...</div><div class='del'>-		# Disable unit-at-a-time mode ...</div><div class='del'>-		KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)</div><div class='del'>-		...</div><div class='add'>+    ...</div><div class='add'>+    # Disable unit-at-a-time mode ...</div><div class='add'>+    KBUILD_CFLAGS += $(call cc-option,-fno-unit-at-a-time)</div><div class='add'>+    ...</div><div class='add'>+</div><div class='ctx'> </div><div class='add'>+  The first example utilises the trick that a config option expands</div><div class='add'>+  to "y" when selected.</div><div class='ctx'> </div><div class='del'>-	The first example utilises the trick that a config option expands</div><div class='del'>-	to 'y' when selected.</div><div class='add'>+KBUILD_RUSTFLAGS</div><div class='add'>+  $(RUSTC) compiler flags</div><div class='ctx'> </div><div class='del'>-    KBUILD_AFLAGS_KERNEL</div><div class='del'>-	Assembler options specific for built-in</div><div class='add'>+  Default value - see top level Makefile.</div><div class='ctx'> </div><div class='del'>-	$(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile</div><div class='del'>-	resident kernel code.</div><div class='add'>+  Append or modify as required per architecture.</div><div class='ctx'> </div><div class='del'>-    KBUILD_AFLAGS_MODULE</div><div class='del'>-	Assembler options specific for modules</div><div class='add'>+  Often, the KBUILD_RUSTFLAGS variable depends on the configuration.</div><div class='ctx'> </div><div class='del'>-	$(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that</div><div class='del'>-	are used for assembler.</div><div class='add'>+  Note that target specification file generation (for ``--target``)</div><div class='add'>+  is handled in ``scripts/generate_rust_target.rs``.</div><div class='ctx'> </div><div class='del'>-	From commandline AFLAGS_MODULE shall be used (see kbuild.rst).</div><div class='add'>+KBUILD_AFLAGS_KERNEL</div><div class='add'>+  Assembler options specific for built-in</div><div class='ctx'> </div><div class='del'>-    KBUILD_CFLAGS_KERNEL</div><div class='del'>-	$(CC) options specific for built-in</div><div class='add'>+  $(KBUILD_AFLAGS_KERNEL) contains extra C compiler flags used to compile</div><div class='add'>+  resident kernel code.</div><div class='ctx'> </div><div class='del'>-	$(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile</div><div class='del'>-	resident kernel code.</div><div class='add'>+KBUILD_AFLAGS_MODULE</div><div class='add'>+  Assembler options specific for modules</div><div class='ctx'> </div><div class='del'>-    KBUILD_CFLAGS_MODULE</div><div class='del'>-	Options for $(CC) when building modules</div><div class='add'>+  $(KBUILD_AFLAGS_MODULE) is used to add arch-specific options that</div><div class='add'>+  are used for assembler.</div><div class='ctx'> </div><div class='del'>-	$(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that</div><div class='del'>-	are used for $(CC).</div><div class='del'>-	From commandline CFLAGS_MODULE shall be used (see kbuild.rst).</div><div class='add'>+  From commandline AFLAGS_MODULE shall be used (see kbuild.rst).</div><div class='ctx'> </div><div class='del'>-    KBUILD_LDFLAGS_MODULE</div><div class='del'>-	Options for $(LD) when linking modules</div><div class='add'>+KBUILD_CFLAGS_KERNEL</div><div class='add'>+  $(CC) options specific for built-in</div><div class='ctx'> </div><div class='del'>-	$(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options</div><div class='del'>-	used when linking modules. This is often a linker script.</div><div class='add'>+  $(KBUILD_CFLAGS_KERNEL) contains extra C compiler flags used to compile</div><div class='add'>+  resident kernel code.</div><div class='ctx'> </div><div class='del'>-	From commandline LDFLAGS_MODULE shall be used (see kbuild.rst).</div><div class='add'>+KBUILD_CFLAGS_MODULE</div><div class='add'>+  Options for $(CC) when building modules</div><div class='ctx'> </div><div class='del'>-    KBUILD_LDS</div><div class='add'>+  $(KBUILD_CFLAGS_MODULE) is used to add arch-specific options that</div><div class='add'>+  are used for $(CC).</div><div class='ctx'> </div><div class='del'>-	The linker script with full path. Assigned by the top-level Makefile.</div><div class='add'>+  From commandline CFLAGS_MODULE shall be used (see kbuild.rst).</div><div class='ctx'> </div><div class='del'>-    KBUILD_LDS_MODULE</div><div class='add'>+KBUILD_RUSTFLAGS_KERNEL</div><div class='add'>+  $(RUSTC) options specific for built-in</div><div class='ctx'> </div><div class='del'>-	The module linker script with full path. Assigned by the top-level</div><div class='del'>-	Makefile and additionally by the arch Makefile.</div><div class='add'>+  $(KBUILD_RUSTFLAGS_KERNEL) contains extra Rust compiler flags used to</div><div class='add'>+  compile resident kernel code.</div><div class='ctx'> </div><div class='del'>-    KBUILD_VMLINUX_OBJS</div><div class='add'>+KBUILD_RUSTFLAGS_MODULE</div><div class='add'>+  Options for $(RUSTC) when building modules</div><div class='ctx'> </div><div class='del'>-	All object files for vmlinux. They are linked to vmlinux in the same</div><div class='del'>-	order as listed in KBUILD_VMLINUX_OBJS.</div><div class='add'>+  $(KBUILD_RUSTFLAGS_MODULE) is used to add arch-specific options that</div><div class='add'>+  are used for $(RUSTC).</div><div class='ctx'> </div><div class='del'>-    KBUILD_VMLINUX_LIBS</div><div class='add'>+  From commandline RUSTFLAGS_MODULE shall be used (see kbuild.rst).</div><div class='ctx'> </div><div class='del'>-	All .a "lib" files for vmlinux. KBUILD_VMLINUX_OBJS and</div><div class='del'>-	KBUILD_VMLINUX_LIBS together specify all the object files used to</div><div class='del'>-	link vmlinux.</div><div class='add'>+KBUILD_LDFLAGS_MODULE</div><div class='add'>+  Options for $(LD) when linking modules</div><div class='ctx'> </div><div class='del'>-7.2 Add prerequisites to archheaders</div><div class='del'>-------------------------------------</div><div class='add'>+  $(KBUILD_LDFLAGS_MODULE) is used to add arch-specific options</div><div class='add'>+  used when linking modules. This is often a linker script.</div><div class='ctx'> </div><div class='del'>-	The archheaders: rule is used to generate header files that</div><div class='del'>-	may be installed into user space by "make header_install".</div><div class='add'>+  From commandline LDFLAGS_MODULE shall be used (see kbuild.rst).</div><div class='ctx'> </div><div class='del'>-	It is run before "make archprepare" when run on the</div><div class='del'>-	architecture itself.</div><div class='add'>+KBUILD_LDS</div><div class='add'>+  The linker script with full path. Assigned by the top-level Makefile.</div><div class='ctx'> </div><div class='add'>+KBUILD_VMLINUX_OBJS</div><div class='add'>+  All object files for vmlinux. They are linked to vmlinux in the same</div><div class='add'>+  order as listed in KBUILD_VMLINUX_OBJS.</div><div class='ctx'> </div><div class='del'>-7.3 Add prerequisites to archprepare</div><div class='del'>-------------------------------------</div><div class='add'>+  The objects listed in scripts/head-object-list.txt are exceptions;</div><div class='add'>+  they are placed before the other objects.</div><div class='ctx'> </div><div class='del'>-	The archprepare: rule is used to list prerequisites that need to be</div><div class='del'>-	built before starting to descend down in the subdirectories.</div><div class='del'>-	This is usually used for header files containing assembler constants.</div><div class='add'>+KBUILD_VMLINUX_LIBS</div><div class='add'>+  All .a ``lib`` files for vmlinux. KBUILD_VMLINUX_OBJS and</div><div class='add'>+  KBUILD_VMLINUX_LIBS together specify all the object files used to</div><div class='add'>+  link vmlinux.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Add prerequisites to archheaders</div><div class='add'>+--------------------------------</div><div class='ctx'> </div><div class='del'>-		#arch/arm/Makefile</div><div class='del'>-		archprepare: maketools</div><div class='add'>+The archheaders: rule is used to generate header files that</div><div class='add'>+may be installed into user space by ``make header_install``.</div><div class='ctx'> </div><div class='del'>-	In this example, the file target maketools will be processed</div><div class='del'>-	before descending down in the subdirectories.</div><div class='del'>-	See also chapter XXX-TODO that describes how kbuild supports</div><div class='del'>-	generating offset header files.</div><div class='add'>+It is run before ``make archprepare`` when run on the</div><div class='add'>+architecture itself.</div><div class='ctx'> </div><div class='add'>+Add prerequisites to archprepare</div><div class='add'>+--------------------------------</div><div class='ctx'> </div><div class='del'>-7.4 List directories to visit when descending</div><div class='del'>----------------------------------------------</div><div class='add'>+The archprepare: rule is used to list prerequisites that need to be</div><div class='add'>+built before starting to descend down in the subdirectories.</div><div class='ctx'> </div><div class='del'>-	An arch Makefile cooperates with the top Makefile to define variables</div><div class='del'>-	which specify how to build the vmlinux file.  Note that there is no</div><div class='del'>-	corresponding arch-specific section for modules; the module-building</div><div class='del'>-	machinery is all architecture-independent.</div><div class='add'>+This is usually used for header files containing assembler constants.</div><div class='ctx'> </div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	head-y, core-y, libs-y, drivers-y</div><div class='del'>-	    $(head-y) lists objects to be linked first in vmlinux.</div><div class='add'>+  #arch/arm/Makefile</div><div class='add'>+  archprepare: maketools</div><div class='ctx'> </div><div class='del'>-	    $(libs-y) lists directories where a lib.a archive can be located.</div><div class='add'>+In this example, the file target maketools will be processed</div><div class='add'>+before descending down in the subdirectories.</div><div class='ctx'> </div><div class='del'>-	    The rest list directories where a built-in.a object file can be</div><div class='del'>-	    located.</div><div class='add'>+See also chapter XXX-TODO that describes how kbuild supports</div><div class='add'>+generating offset header files.</div><div class='ctx'> </div><div class='del'>-	    Then the rest follows in this order:</div><div class='add'>+List directories to visit when descending</div><div class='add'>+-----------------------------------------</div><div class='ctx'> </div><div class='del'>-		$(core-y), $(libs-y), $(drivers-y)</div><div class='add'>+An arch Makefile cooperates with the top Makefile to define variables</div><div class='add'>+which specify how to build the vmlinux file.  Note that there is no</div><div class='add'>+corresponding arch-specific section for modules; the module-building</div><div class='add'>+machinery is all architecture-independent.</div><div class='ctx'> </div><div class='del'>-	    The top level Makefile defines values for all generic directories,</div><div class='del'>-	    and arch/$(SRCARCH)/Makefile only adds architecture-specific</div><div class='del'>-	    directories.</div><div class='add'>+core-y, libs-y, drivers-y</div><div class='add'>+  $(libs-y) lists directories where a lib.a archive can be located.</div><div class='ctx'> </div><div class='del'>-	    Example::</div><div class='add'>+  The rest list directories where a built-in.a object file can be</div><div class='add'>+  located.</div><div class='ctx'> </div><div class='del'>-		# arch/sparc/Makefile</div><div class='del'>-		core-y                 += arch/sparc/</div><div class='add'>+  Then the rest follows in this order:</div><div class='ctx'> </div><div class='del'>-		libs-y                 += arch/sparc/prom/</div><div class='del'>-		libs-y                 += arch/sparc/lib/</div><div class='add'>+    $(core-y), $(libs-y), $(drivers-y)</div><div class='ctx'> </div><div class='del'>-		drivers-$(CONFIG_PM) += arch/sparc/power/</div><div class='add'>+  The top level Makefile defines values for all generic directories,</div><div class='add'>+  and arch/$(SRCARCH)/Makefile only adds architecture-specific</div><div class='add'>+  directories.</div><div class='ctx'> </div><div class='del'>-7.5 Architecture-specific boot images</div><div class='del'>--------------------------------------</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	An arch Makefile specifies goals that take the vmlinux file, compress</div><div class='del'>-	it, wrap it in bootstrapping code, and copy the resulting files</div><div class='del'>-	somewhere. This includes various kinds of installation commands.</div><div class='del'>-	The actual goals are not standardized across architectures.</div><div class='add'>+    # arch/sparc/Makefile</div><div class='add'>+    core-y                 += arch/sparc/</div><div class='ctx'> </div><div class='del'>-	It is common to locate any additional processing in a boot/</div><div class='del'>-	directory below arch/$(SRCARCH)/.</div><div class='add'>+    libs-y                 += arch/sparc/prom/</div><div class='add'>+    libs-y                 += arch/sparc/lib/</div><div class='ctx'> </div><div class='del'>-	Kbuild does not provide any smart way to support building a</div><div class='del'>-	target specified in boot/. Therefore arch/$(SRCARCH)/Makefile shall</div><div class='del'>-	call make manually to build a target in boot/.</div><div class='add'>+    drivers-$(CONFIG_PM) += arch/sparc/power/</div><div class='ctx'> </div><div class='del'>-	The recommended approach is to include shortcuts in</div><div class='del'>-	arch/$(SRCARCH)/Makefile, and use the full path when calling down</div><div class='del'>-	into the arch/$(SRCARCH)/boot/Makefile.</div><div class='add'>+Architecture-specific boot images</div><div class='add'>+---------------------------------</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+An arch Makefile specifies goals that take the vmlinux file, compress</div><div class='add'>+it, wrap it in bootstrapping code, and copy the resulting files</div><div class='add'>+somewhere. This includes various kinds of installation commands.</div><div class='add'>+The actual goals are not standardized across architectures.</div><div class='ctx'> </div><div class='del'>-		#arch/x86/Makefile</div><div class='del'>-		boot := arch/x86/boot</div><div class='del'>-		bzImage: vmlinux</div><div class='del'>-			$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@</div><div class='add'>+It is common to locate any additional processing in a boot/</div><div class='add'>+directory below arch/$(SRCARCH)/.</div><div class='ctx'> </div><div class='del'>-	"$(Q)$(MAKE) $(build)=&lt;dir&gt;" is the recommended way to invoke</div><div class='del'>-	make in a subdirectory.</div><div class='add'>+Kbuild does not provide any smart way to support building a</div><div class='add'>+target specified in boot/. Therefore arch/$(SRCARCH)/Makefile shall</div><div class='add'>+call make manually to build a target in boot/.</div><div class='ctx'> </div><div class='del'>-	There are no rules for naming architecture-specific targets,</div><div class='del'>-	but executing "make help" will list all relevant targets.</div><div class='del'>-	To support this, $(archhelp) must be defined.</div><div class='add'>+The recommended approach is to include shortcuts in</div><div class='add'>+arch/$(SRCARCH)/Makefile, and use the full path when calling down</div><div class='add'>+into the arch/$(SRCARCH)/boot/Makefile.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#arch/x86/Makefile</div><div class='del'>-		define archhelp</div><div class='del'>-		  echo  '* bzImage      - Compressed kernel image (arch/x86/boot/bzImage)'</div><div class='del'>-		endif</div><div class='add'>+  #arch/x86/Makefile</div><div class='add'>+  boot := arch/x86/boot</div><div class='add'>+  bzImage: vmlinux</div><div class='add'>+          $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@</div><div class='ctx'> </div><div class='del'>-	When make is executed without arguments, the first goal encountered</div><div class='del'>-	will be built. In the top level Makefile the first goal present</div><div class='del'>-	is all:.</div><div class='del'>-	An architecture shall always, per default, build a bootable image.</div><div class='del'>-	In "make help", the default goal is highlighted with a '*'.</div><div class='del'>-	Add a new prerequisite to all: to select a default goal different</div><div class='del'>-	from vmlinux.</div><div class='add'>+``$(Q)$(MAKE) $(build)=&lt;dir&gt;`` is the recommended way to invoke</div><div class='add'>+make in a subdirectory.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+There are no rules for naming architecture-specific targets,</div><div class='add'>+but executing ``make help`` will list all relevant targets.</div><div class='add'>+To support this, $(archhelp) must be defined.</div><div class='ctx'> </div><div class='del'>-		#arch/x86/Makefile</div><div class='del'>-		all: bzImage</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-	When "make" is executed without arguments, bzImage will be built.</div><div class='add'>+  #arch/x86/Makefile</div><div class='add'>+  define archhelp</div><div class='add'>+    echo  '* bzImage      - Compressed kernel image (arch/x86/boot/bzImage)'</div><div class='add'>+  endif</div><div class='ctx'> </div><div class='del'>-7.7 Commands useful for building a boot image</div><div class='del'>----------------------------------------------</div><div class='add'>+When make is executed without arguments, the first goal encountered</div><div class='add'>+will be built. In the top level Makefile the first goal present</div><div class='add'>+is all:.</div><div class='ctx'> </div><div class='del'>-    Kbuild provides a few macros that are useful when building a</div><div class='del'>-    boot image.</div><div class='add'>+An architecture shall always, per default, build a bootable image.</div><div class='add'>+In ``make help``, the default goal is highlighted with a ``*``.</div><div class='ctx'> </div><div class='del'>-    ld</div><div class='del'>-	Link target. Often, LDFLAGS_$@ is used to set specific options to ld.</div><div class='add'>+Add a new prerequisite to all: to select a default goal different</div><div class='add'>+from vmlinux.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-		#arch/x86/boot/Makefile</div><div class='del'>-		LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary</div><div class='del'>-		LDFLAGS_setup    := -Ttext 0x0 -s --oformat binary -e begtext</div><div class='add'>+  #arch/x86/Makefile</div><div class='add'>+  all: bzImage</div><div class='ctx'> </div><div class='del'>-		targets += setup setup.o bootsect bootsect.o</div><div class='del'>-		$(obj)/setup $(obj)/bootsect: %: %.o FORCE</div><div class='del'>-			$(call if_changed,ld)</div><div class='add'>+When ``make`` is executed without arguments, bzImage will be built.</div><div class='ctx'> </div><div class='del'>-	In this example, there are two possible targets, requiring different</div><div class='del'>-	options to the linker. The linker options are specified using the</div><div class='del'>-	LDFLAGS_$@ syntax - one for each potential target.</div><div class='del'>-	$(targets) are assigned all potential targets, by which kbuild knows</div><div class='del'>-	the targets and will:</div><div class='add'>+Commands useful for building a boot image</div><div class='add'>+-----------------------------------------</div><div class='ctx'> </div><div class='del'>-		1) check for commandline changes</div><div class='del'>-		2) delete target during make clean</div><div class='add'>+Kbuild provides a few macros that are useful when building a</div><div class='add'>+boot image.</div><div class='ctx'> </div><div class='del'>-	The ": %: %.o" part of the prerequisite is a shorthand that</div><div class='del'>-	frees us from listing the setup.o and bootsect.o files.</div><div class='add'>+ld</div><div class='add'>+  Link target. Often, LDFLAGS_$@ is used to set specific options to ld.</div><div class='ctx'> </div><div class='del'>-	Note:</div><div class='del'>-	      It is a common mistake to forget the "targets :=" assignment,</div><div class='del'>-	      resulting in the target file being recompiled for no</div><div class='del'>-	      obvious reason.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-    objcopy</div><div class='del'>-	Copy binary. Uses OBJCOPYFLAGS usually specified in</div><div class='del'>-	arch/$(SRCARCH)/Makefile.</div><div class='del'>-	OBJCOPYFLAGS_$@ may be used to set additional options.</div><div class='add'>+    #arch/x86/boot/Makefile</div><div class='add'>+    LDFLAGS_bootsect := -Ttext 0x0 -s --oformat binary</div><div class='add'>+    LDFLAGS_setup    := -Ttext 0x0 -s --oformat binary -e begtext</div><div class='ctx'> </div><div class='del'>-    gzip</div><div class='del'>-	Compress target. Use maximum compression to compress target.</div><div class='add'>+    targets += setup setup.o bootsect bootsect.o</div><div class='add'>+    $(obj)/setup $(obj)/bootsect: %: %.o FORCE</div><div class='add'>+            $(call if_changed,ld)</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+  In this example, there are two possible targets, requiring different</div><div class='add'>+  options to the linker. The linker options are specified using the</div><div class='add'>+  LDFLAGS_$@ syntax - one for each potential target.</div><div class='ctx'> </div><div class='del'>-		#arch/x86/boot/compressed/Makefile</div><div class='del'>-		$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE</div><div class='del'>-			$(call if_changed,gzip)</div><div class='add'>+  $(targets) are assigned all potential targets, by which kbuild knows</div><div class='add'>+  the targets and will:</div><div class='ctx'> </div><div class='del'>-    dtc</div><div class='del'>-	Create flattened device tree blob object suitable for linking</div><div class='del'>-	into vmlinux. Device tree blobs linked into vmlinux are placed</div><div class='del'>-	in an init section in the image. Platform code *must* copy the</div><div class='del'>-	blob to non-init memory prior to calling unflatten_device_tree().</div><div class='add'>+  1) check for commandline changes</div><div class='add'>+  2) delete target during make clean</div><div class='ctx'> </div><div class='del'>-	To use this command, simply add `*.dtb` into obj-y or targets, or make</div><div class='del'>-	some other target depend on `%.dtb`</div><div class='add'>+  The ``: %: %.o`` part of the prerequisite is a shorthand that</div><div class='add'>+  frees us from listing the setup.o and bootsect.o files.</div><div class='ctx'> </div><div class='del'>-	A central rule exists to create `$(obj)/%.dtb` from `$(src)/%.dts`;</div><div class='del'>-	architecture Makefiles do no need to explicitly write out that rule.</div><div class='add'>+  Note:</div><div class='add'>+  It is a common mistake to forget the ``targets :=`` assignment,</div><div class='add'>+  resulting in the target file being recompiled for no</div><div class='add'>+  obvious reason.</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+objcopy</div><div class='add'>+  Copy binary. Uses OBJCOPYFLAGS usually specified in</div><div class='add'>+  arch/$(SRCARCH)/Makefile.</div><div class='ctx'> </div><div class='del'>-		targets += $(dtb-y)</div><div class='del'>-		DTC_FLAGS ?= -p 1024</div><div class='add'>+  OBJCOPYFLAGS_$@ may be used to set additional options.</div><div class='ctx'> </div><div class='del'>-7.9 Preprocessing linker scripts</div><div class='del'>---------------------------------</div><div class='add'>+gzip</div><div class='add'>+  Compress target. Use maximum compression to compress target.</div><div class='ctx'> </div><div class='del'>-	When the vmlinux image is built, the linker script</div><div class='del'>-	arch/$(SRCARCH)/kernel/vmlinux.lds is used.</div><div class='del'>-	The script is a preprocessed variant of the file vmlinux.lds.S</div><div class='del'>-	located in the same directory.</div><div class='del'>-	kbuild knows .lds files and includes a rule `*lds.S` -&gt; `*lds`.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	Example::</div><div class='add'>+    #arch/x86/boot/compressed/Makefile</div><div class='add'>+    $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE</div><div class='add'>+            $(call if_changed,gzip)</div><div class='ctx'> </div><div class='del'>-		#arch/x86/kernel/Makefile</div><div class='del'>-		extra-y := vmlinux.lds</div><div class='add'>+dtc</div><div class='add'>+  Create flattened device tree blob object suitable for linking</div><div class='add'>+  into vmlinux. Device tree blobs linked into vmlinux are placed</div><div class='add'>+  in an init section in the image. Platform code *must* copy the</div><div class='add'>+  blob to non-init memory prior to calling unflatten_device_tree().</div><div class='ctx'> </div><div class='del'>-	The assignment to extra-y is used to tell kbuild to build the</div><div class='del'>-	target vmlinux.lds.</div><div class='del'>-	The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the</div><div class='del'>-	specified options when building the target vmlinux.lds.</div><div class='add'>+  To use this command, simply add ``*.dtb`` into obj-y or targets, or make</div><div class='add'>+  some other target depend on ``%.dtb``</div><div class='ctx'> </div><div class='del'>-	When building the `*.lds` target, kbuild uses the variables::</div><div class='add'>+  A central rule exists to create ``$(obj)/%.dtb`` from ``$(src)/%.dts``;</div><div class='add'>+  architecture Makefiles do no need to explicitly write out that rule.</div><div class='ctx'> </div><div class='del'>-		KBUILD_CPPFLAGS	: Set in top-level Makefile</div><div class='del'>-		cppflags-y	: May be set in the kbuild makefile</div><div class='del'>-		CPPFLAGS_$(@F)  : Target-specific flags.</div><div class='del'>-				Note that the full filename is used in this</div><div class='del'>-				assignment.</div><div class='add'>+  Example::</div><div class='ctx'> </div><div class='del'>-	The kbuild infrastructure for `*lds` files is used in several</div><div class='del'>-	architecture-specific files.</div><div class='add'>+    targets += $(dtb-y)</div><div class='add'>+    DTC_FLAGS ?= -p 1024</div><div class='ctx'> </div><div class='del'>-7.10 Generic header files</div><div class='del'>--------------------------</div><div class='add'>+Preprocessing linker scripts</div><div class='add'>+----------------------------</div><div class='ctx'> </div><div class='del'>-	The directory include/asm-generic contains the header files</div><div class='del'>-	that may be shared between individual architectures.</div><div class='del'>-	The recommended approach how to use a generic header file is</div><div class='del'>-	to list the file in the Kbuild file.</div><div class='del'>-	See "8.2 generic-y" for further info on syntax etc.</div><div class='add'>+When the vmlinux image is built, the linker script</div><div class='add'>+arch/$(SRCARCH)/kernel/vmlinux.lds is used.</div><div class='ctx'> </div><div class='del'>-7.11 Post-link pass</div><div class='del'>--------------------</div><div class='add'>+The script is a preprocessed variant of the file vmlinux.lds.S</div><div class='add'>+located in the same directory.</div><div class='add'>+</div><div class='add'>+kbuild knows .lds files and includes a rule ``*lds.S`` -&gt; ``*lds``.</div><div class='add'>+</div><div class='add'>+Example::</div><div class='add'>+</div><div class='add'>+  #arch/x86/kernel/Makefile</div><div class='add'>+  extra-y := vmlinux.lds</div><div class='add'>+</div><div class='add'>+The assignment to extra-y is used to tell kbuild to build the</div><div class='add'>+target vmlinux.lds.</div><div class='add'>+</div><div class='add'>+The assignment to $(CPPFLAGS_vmlinux.lds) tells kbuild to use the</div><div class='add'>+specified options when building the target vmlinux.lds.</div><div class='add'>+</div><div class='add'>+When building the ``*.lds`` target, kbuild uses the variables::</div><div class='ctx'> </div><div class='del'>-	If the file arch/xxx/Makefile.postlink exists, this makefile</div><div class='del'>-	will be invoked for post-link objects (vmlinux and modules.ko)</div><div class='del'>-	for architectures to run post-link passes on. Must also handle</div><div class='del'>-	the clean target.</div><div class='add'>+  KBUILD_CPPFLAGS      : Set in top-level Makefile</div><div class='add'>+  cppflags-y           : May be set in the kbuild makefile</div><div class='add'>+  CPPFLAGS_$(@F)       : Target-specific flags.</div><div class='add'>+                         Note that the full filename is used in this</div><div class='add'>+                         assignment.</div><div class='ctx'> </div><div class='del'>-	This pass runs after kallsyms generation. If the architecture</div><div class='del'>-	needs to modify symbol locations, rather than manipulate the</div><div class='del'>-	kallsyms, it may be easier to add another postlink target for</div><div class='del'>-	.tmp_vmlinux? targets to be called from link-vmlinux.sh.</div><div class='add'>+The kbuild infrastructure for ``*lds`` files is used in several</div><div class='add'>+architecture-specific files.</div><div class='ctx'> </div><div class='del'>-	For example, powerpc uses this to check relocation sanity of</div><div class='del'>-	the linked vmlinux file.</div><div class='add'>+Generic header files</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+The directory include/asm-generic contains the header files</div><div class='add'>+that may be shared between individual architectures.</div><div class='add'>+</div><div class='add'>+The recommended approach how to use a generic header file is</div><div class='add'>+to list the file in the Kbuild file.</div><div class='add'>+</div><div class='add'>+See `generic-y`_ for further info on syntax etc.</div><div class='add'>+</div><div class='add'>+Post-link pass</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+If the file arch/xxx/Makefile.postlink exists, this makefile</div><div class='add'>+will be invoked for post-link objects (vmlinux and modules.ko)</div><div class='add'>+for architectures to run post-link passes on. Must also handle</div><div class='add'>+the clean target.</div><div class='add'>+</div><div class='add'>+This pass runs after kallsyms generation. If the architecture</div><div class='add'>+needs to modify symbol locations, rather than manipulate the</div><div class='add'>+kallsyms, it may be easier to add another postlink target for</div><div class='add'>+.tmp_vmlinux? targets to be called from link-vmlinux.sh.</div><div class='add'>+</div><div class='add'>+For example, powerpc uses this to check relocation sanity of</div><div class='add'>+the linked vmlinux file.</div><div class='ctx'> </div><div class='del'>-8 Kbuild syntax for exported headers</div><div class='del'>-------------------------------------</div><div class='add'>+Kbuild syntax for exported headers</div><div class='add'>+==================================</div><div class='ctx'> </div><div class='ctx'> The kernel includes a set of headers that is exported to userspace.</div><div class='ctx'> Many headers can be exported as-is but other headers require a</div><div class='ctx'> minimal pre-processing before they are ready for user-space.</div><div class='add'>+</div><div class='ctx'> The pre-processing does:</div><div class='ctx'> </div><div class='ctx'> - drop kernel-specific annotations</div><div class='ctx'> - drop include of compiler.h</div><div class='del'>-- drop all sections that are kernel internal (guarded by `ifdef __KERNEL__`)</div><div class='add'>+- drop all sections that are kernel internal (guarded by ``ifdef __KERNEL__``)</div><div class='ctx'> </div><div class='ctx'> All headers under include/uapi/, include/generated/uapi/,</div><div class='ctx'> arch/&lt;arch&gt;/include/uapi/ and arch/&lt;arch&gt;/include/generated/uapi/</div><div class='hunk'>@@ -1494,139 +1492,139 @@ are exported.</div><div class='ctx'> </div><div class='ctx'> A Kbuild file may be defined under arch/&lt;arch&gt;/include/uapi/asm/ and</div><div class='ctx'> arch/&lt;arch&gt;/include/asm/ to list asm files coming from asm-generic.</div><div class='add'>+</div><div class='ctx'> See subsequent chapter for the syntax of the Kbuild file.</div><div class='ctx'> </div><div class='del'>-8.1 no-export-headers</div><div class='del'>----------------------</div><div class='add'>+no-export-headers</div><div class='add'>+-----------------</div><div class='ctx'> </div><div class='del'>-	no-export-headers is essentially used by include/uapi/linux/Kbuild to</div><div class='del'>-	avoid exporting specific headers (e.g. kvm.h) on architectures that do</div><div class='del'>-	not support it. It should be avoided as much as possible.</div><div class='add'>+no-export-headers is essentially used by include/uapi/linux/Kbuild to</div><div class='add'>+avoid exporting specific headers (e.g. kvm.h) on architectures that do</div><div class='add'>+not support it. It should be avoided as much as possible.</div><div class='ctx'> </div><div class='del'>-8.2 generic-y</div><div class='del'>--------------</div><div class='add'>+generic-y</div><div class='add'>+---------</div><div class='ctx'> </div><div class='del'>-	If an architecture uses a verbatim copy of a header from</div><div class='del'>-	include/asm-generic then this is listed in the file</div><div class='del'>-	arch/$(SRCARCH)/include/asm/Kbuild like this:</div><div class='add'>+If an architecture uses a verbatim copy of a header from</div><div class='add'>+include/asm-generic then this is listed in the file</div><div class='add'>+arch/$(SRCARCH)/include/asm/Kbuild like this:</div><div class='ctx'> </div><div class='del'>-		Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-			#arch/x86/include/asm/Kbuild</div><div class='del'>-			generic-y += termios.h</div><div class='del'>-			generic-y += rtc.h</div><div class='add'>+  #arch/x86/include/asm/Kbuild</div><div class='add'>+  generic-y += termios.h</div><div class='add'>+  generic-y += rtc.h</div><div class='ctx'> </div><div class='del'>-	During the prepare phase of the build a wrapper include</div><div class='del'>-	file is generated in the directory::</div><div class='add'>+During the prepare phase of the build a wrapper include</div><div class='add'>+file is generated in the directory::</div><div class='ctx'> </div><div class='del'>-		arch/$(SRCARCH)/include/generated/asm</div><div class='add'>+  arch/$(SRCARCH)/include/generated/asm</div><div class='ctx'> </div><div class='del'>-	When a header is exported where the architecture uses</div><div class='del'>-	the generic header a similar wrapper is generated as part</div><div class='del'>-	of the set of exported headers in the directory::</div><div class='add'>+When a header is exported where the architecture uses</div><div class='add'>+the generic header a similar wrapper is generated as part</div><div class='add'>+of the set of exported headers in the directory::</div><div class='ctx'> </div><div class='del'>-		usr/include/asm</div><div class='add'>+  usr/include/asm</div><div class='ctx'> </div><div class='del'>-	The generated wrapper will in both cases look like the following:</div><div class='add'>+The generated wrapper will in both cases look like the following:</div><div class='ctx'> </div><div class='del'>-		Example: termios.h::</div><div class='add'>+Example: termios.h::</div><div class='ctx'> </div><div class='del'>-			#include &lt;asm-generic/termios.h&gt;</div><div class='add'>+  #include &lt;asm-generic/termios.h&gt;</div><div class='ctx'> </div><div class='del'>-8.3 generated-y</div><div class='del'>----------------</div><div class='add'>+generated-y</div><div class='add'>+-----------</div><div class='ctx'> </div><div class='del'>-	If an architecture generates other header files alongside generic-y</div><div class='del'>-	wrappers, generated-y specifies them.</div><div class='add'>+If an architecture generates other header files alongside generic-y</div><div class='add'>+wrappers, generated-y specifies them.</div><div class='ctx'> </div><div class='del'>-	This prevents them being treated as stale asm-generic wrappers and</div><div class='del'>-	removed.</div><div class='add'>+This prevents them being treated as stale asm-generic wrappers and</div><div class='add'>+removed.</div><div class='ctx'> </div><div class='del'>-		Example::</div><div class='add'>+Example::</div><div class='ctx'> </div><div class='del'>-			#arch/x86/include/asm/Kbuild</div><div class='del'>-			generated-y += syscalls_32.h</div><div class='add'>+  #arch/x86/include/asm/Kbuild</div><div class='add'>+  generated-y += syscalls_32.h</div><div class='ctx'> </div><div class='del'>-8.4 mandatory-y</div><div class='del'>----------------</div><div class='add'>+mandatory-y</div><div class='add'>+-----------</div><div class='ctx'> </div><div class='del'>-	mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild</div><div class='del'>-	to define the minimum set of ASM headers that all architectures must have.</div><div class='add'>+mandatory-y is essentially used by include/(uapi/)asm-generic/Kbuild</div><div class='add'>+to define the minimum set of ASM headers that all architectures must have.</div><div class='ctx'> </div><div class='del'>-	This works like optional generic-y. If a mandatory header is missing</div><div class='del'>-	in arch/$(SRCARCH)/include/(uapi/)/asm, Kbuild will automatically</div><div class='del'>-	generate a wrapper of the asm-generic one.</div><div class='add'>+This works like optional generic-y. If a mandatory header is missing</div><div class='add'>+in arch/$(SRCARCH)/include/(uapi/)/asm, Kbuild will automatically</div><div class='add'>+generate a wrapper of the asm-generic one.</div><div class='ctx'> </div><div class='del'>-9 Kbuild Variables</div><div class='del'>-==================</div><div class='add'>+Kbuild Variables</div><div class='add'>+================</div><div class='ctx'> </div><div class='ctx'> The top Makefile exports the following variables:</div><div class='ctx'> </div><div class='del'>-    VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION</div><div class='del'>-	These variables define the current kernel version.  A few arch</div><div class='del'>-	Makefiles actually use these values directly; they should use</div><div class='del'>-	$(KERNELRELEASE) instead.</div><div class='add'>+VERSION, PATCHLEVEL, SUBLEVEL, EXTRAVERSION</div><div class='add'>+  These variables define the current kernel version.  A few arch</div><div class='add'>+  Makefiles actually use these values directly; they should use</div><div class='add'>+  $(KERNELRELEASE) instead.</div><div class='ctx'> </div><div class='del'>-	$(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic</div><div class='del'>-	three-part version number, such as "2", "4", and "0".  These three</div><div class='del'>-	values are always numeric.</div><div class='add'>+  $(VERSION), $(PATCHLEVEL), and $(SUBLEVEL) define the basic</div><div class='add'>+  three-part version number, such as "2", "4", and "0".  These three</div><div class='add'>+  values are always numeric.</div><div class='ctx'> </div><div class='del'>-	$(EXTRAVERSION) defines an even tinier sublevel for pre-patches</div><div class='del'>-	or additional patches.	It is usually some non-numeric string</div><div class='del'>-	such as "-pre4", and is often blank.</div><div class='add'>+  $(EXTRAVERSION) defines an even tinier sublevel for pre-patches</div><div class='add'>+  or additional patches.	It is usually some non-numeric string</div><div class='add'>+  such as "-pre4", and is often blank.</div><div class='ctx'> </div><div class='del'>-    KERNELRELEASE</div><div class='del'>-	$(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable</div><div class='del'>-	for constructing installation directory names or showing in</div><div class='del'>-	version strings.  Some arch Makefiles use it for this purpose.</div><div class='add'>+KERNELRELEASE</div><div class='add'>+  $(KERNELRELEASE) is a single string such as "2.4.0-pre4", suitable</div><div class='add'>+  for constructing installation directory names or showing in</div><div class='add'>+  version strings.  Some arch Makefiles use it for this purpose.</div><div class='ctx'> </div><div class='del'>-    ARCH</div><div class='del'>-	This variable defines the target architecture, such as "i386",</div><div class='del'>-	"arm", or "sparc". Some kbuild Makefiles test $(ARCH) to</div><div class='del'>-	determine which files to compile.</div><div class='add'>+ARCH</div><div class='add'>+  This variable defines the target architecture, such as "i386",</div><div class='add'>+  "arm", or "sparc". Some kbuild Makefiles test $(ARCH) to</div><div class='add'>+  determine which files to compile.</div><div class='ctx'> </div><div class='del'>-	By default, the top Makefile sets $(ARCH) to be the same as the</div><div class='del'>-	host system architecture.  For a cross build, a user may</div><div class='del'>-	override the value of $(ARCH) on the command line::</div><div class='add'>+  By default, the top Makefile sets $(ARCH) to be the same as the</div><div class='add'>+  host system architecture.  For a cross build, a user may</div><div class='add'>+  override the value of $(ARCH) on the command line::</div><div class='ctx'> </div><div class='del'>-	    make ARCH=m68k ...</div><div class='add'>+    make ARCH=m68k ...</div><div class='ctx'> </div><div class='del'>-    SRCARCH</div><div class='del'>-	This variable specifies the directory in arch/ to build.</div><div class='add'>+SRCARCH</div><div class='add'>+  This variable specifies the directory in arch/ to build.</div><div class='ctx'> </div><div class='del'>-	ARCH and SRCARCH may not necessarily match. A couple of arch</div><div class='del'>-	directories are biarch, that is, a single `arch/*/` directory supports</div><div class='del'>-	both 32-bit and 64-bit.</div><div class='add'>+  ARCH and SRCARCH may not necessarily match. A couple of arch</div><div class='add'>+  directories are biarch, that is, a single ``arch/*/`` directory supports</div><div class='add'>+  both 32-bit and 64-bit.</div><div class='ctx'> </div><div class='del'>-	For example, you can pass in ARCH=i386, ARCH=x86_64, or ARCH=x86.</div><div class='del'>-	For all of them, SRCARCH=x86 because arch/x86/ supports	both i386 and</div><div class='del'>-	x86_64.</div><div class='add'>+  For example, you can pass in ARCH=i386, ARCH=x86_64, or ARCH=x86.</div><div class='add'>+  For all of them, SRCARCH=x86 because arch/x86/ supports both i386 and</div><div class='add'>+  x86_64.</div><div class='ctx'> </div><div class='del'>-    INSTALL_PATH</div><div class='del'>-	This variable defines a place for the arch Makefiles to install</div><div class='del'>-	the resident kernel image and System.map file.</div><div class='del'>-	Use this for architecture-specific install targets.</div><div class='add'>+INSTALL_PATH</div><div class='add'>+  This variable defines a place for the arch Makefiles to install</div><div class='add'>+  the resident kernel image and System.map file.</div><div class='add'>+  Use this for architecture-specific install targets.</div><div class='ctx'> </div><div class='del'>-    INSTALL_MOD_PATH, MODLIB</div><div class='del'>-	$(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module</div><div class='del'>-	installation.  This variable is not defined in the Makefile but</div><div class='del'>-	may be passed in by the user if desired.</div><div class='add'>+INSTALL_MOD_PATH, MODLIB</div><div class='add'>+  $(INSTALL_MOD_PATH) specifies a prefix to $(MODLIB) for module</div><div class='add'>+  installation.  This variable is not defined in the Makefile but</div><div class='add'>+  may be passed in by the user if desired.</div><div class='ctx'> </div><div class='del'>-	$(MODLIB) specifies the directory for module installation.</div><div class='del'>-	The top Makefile defines $(MODLIB) to</div><div class='del'>-	$(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE).  The user may</div><div class='del'>-	override this value on the command line if desired.</div><div class='add'>+  $(MODLIB) specifies the directory for module installation.</div><div class='add'>+  The top Makefile defines $(MODLIB) to</div><div class='add'>+  $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE).  The user may</div><div class='add'>+  override this value on the command line if desired.</div><div class='ctx'> </div><div class='del'>-    INSTALL_MOD_STRIP</div><div class='del'>-	If this variable is specified, it will cause modules to be stripped</div><div class='del'>-	after they are installed.  If INSTALL_MOD_STRIP is '1', then the</div><div class='del'>-	default option --strip-debug will be used.  Otherwise, the</div><div class='del'>-	INSTALL_MOD_STRIP value will be used as the option(s) to the strip</div><div class='del'>-	command.</div><div class='add'>+INSTALL_MOD_STRIP</div><div class='add'>+  If this variable is specified, it will cause modules to be stripped</div><div class='add'>+  after they are installed.  If INSTALL_MOD_STRIP is "1", then the</div><div class='add'>+  default option --strip-debug will be used.  Otherwise, the</div><div class='add'>+  INSTALL_MOD_STRIP value will be used as the option(s) to the strip</div><div class='add'>+  command.</div><div class='ctx'> </div><div class='del'>-</div><div class='del'>-10 Makefile language</div><div class='del'>-====================</div><div class='add'>+Makefile language</div><div class='add'>+=================</div><div class='ctx'> </div><div class='ctx'> The kernel Makefiles are designed to be run with GNU Make.  The Makefiles</div><div class='ctx'> use only the documented features of GNU Make, but they do use many</div><div class='hunk'>@@ -1634,27 +1632,27 @@ GNU extensions.</div><div class='ctx'> </div><div class='ctx'> GNU Make supports elementary list-processing functions.  The kernel</div><div class='ctx'> Makefiles use a novel style of list building and manipulation with few</div><div class='del'>-"if" statements.</div><div class='add'>+``if`` statements.</div><div class='ctx'> </div><div class='del'>-GNU Make has two assignment operators, ":=" and "=".  ":=" performs</div><div class='add'>+GNU Make has two assignment operators, ``:=`` and ``=``.  ``:=`` performs</div><div class='ctx'> immediate evaluation of the right-hand side and stores an actual string</div><div class='del'>-into the left-hand side.  "=" is like a formula definition; it stores the</div><div class='add'>+into the left-hand side.  ``=`` is like a formula definition; it stores the</div><div class='ctx'> right-hand side in an unevaluated form and then evaluates this form each</div><div class='ctx'> time the left-hand side is used.</div><div class='ctx'> </div><div class='del'>-There are some cases where "=" is appropriate.  Usually, though, ":="</div><div class='add'>+There are some cases where ``=`` is appropriate.  Usually, though, ``:=``</div><div class='ctx'> is the right choice.</div><div class='ctx'> </div><div class='del'>-11 Credits</div><div class='del'>-==========</div><div class='add'>+Credits</div><div class='add'>+=======</div><div class='ctx'> </div><div class='ctx'> - Original version made by Michael Elizabeth Chastain, &lt;mailto:mec@shout.net&gt;</div><div class='ctx'> - Updates by Kai Germaschewski &lt;kai@tp1.ruhr-uni-bochum.de&gt;</div><div class='ctx'> - Updates by Sam Ravnborg &lt;sam@ravnborg.org&gt;</div><div class='ctx'> - Language QA by Jan Engelhardt &lt;jengelh@gmx.de&gt;</div><div class='ctx'> </div><div class='del'>-12 TODO</div><div class='del'>-=======</div><div class='add'>+TODO</div><div class='add'>+====</div><div class='ctx'> </div><div class='ctx'> - Describe how kbuild supports shipped files with _shipped.</div><div class='ctx'> - Generating offset header files.</div><div class='head'>diff --git a/Documentation/kbuild/reproducible-builds.rst b/Documentation/kbuild/reproducible-builds.rst<br/>index 3b25655e441b..f2dcc39044e6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/reproducible-builds.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kbuild/reproducible-builds.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kbuild/reproducible-builds.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kbuild/reproducible-builds.rst</a></div><div class='hunk'>@@ -99,10 +99,10 @@ unreproducible parts can be treated as sources:</div><div class='ctx'> Structure randomisation</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='del'>-If you enable ``CONFIG_GCC_PLUGIN_RANDSTRUCT``, you will need to</div><div class='del'>-pre-generate the random seed in</div><div class='del'>-``scripts/gcc-plugins/randomize_layout_seed.h`` so the same value</div><div class='del'>-is used in rebuilds.</div><div class='add'>+If you enable ``CONFIG_RANDSTRUCT``, you will need to pre-generate</div><div class='add'>+the random seed in ``scripts/basic/randstruct.seed`` so the same</div><div class='add'>+value is used by each build. See ``scripts/gen-randstruct-seed.sh``</div><div class='add'>+for details.</div><div class='ctx'> </div><div class='ctx'> Debug info conflicts</div><div class='ctx'> --------------------</div><div class='hunk'>@@ -119,6 +119,16 @@ To avoid this, you can make the vDSO different for different</div><div class='ctx'> kernel versions by including an arbitrary string of "salt" in it.</div><div class='ctx'> This is specified by the Kconfig symbol ``CONFIG_BUILD_SALT``.</div><div class='ctx'> </div><div class='add'>+Git</div><div class='add'>+---</div><div class='add'>+</div><div class='add'>+Uncommitted changes or different commit ids in git can also lead</div><div class='add'>+to different compilation results. For example, after executing</div><div class='add'>+``git reset HEAD^``, even if the code is the same, the</div><div class='add'>+``include/config/kernel.release`` generated during compilation</div><div class='add'>+will be different, which will eventually lead to binary differences.</div><div class='add'>+See ``scripts/setlocalversion`` for details.</div><div class='add'>+</div><div class='ctx'> .. _KBUILD_BUILD_TIMESTAMP: kbuild.html#kbuild-build-timestamp</div><div class='ctx'> .. _KBUILD_BUILD_USER and KBUILD_BUILD_HOST: kbuild.html#kbuild-build-user-kbuild-build-host</div><div class='ctx'> .. _KCFLAGS: kbuild.html#kcflags</div><div class='head'>diff --git a/Documentation/kernel-hacking/false-sharing.rst b/Documentation/kernel-hacking/false-sharing.rst<br/>new file mode 100644<br/>index 000000000000..122b0e124656<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kernel-hacking/false-sharing.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kernel-hacking/false-sharing.rst</a></div><div class='hunk'>@@ -0,0 +1,206 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=============</div><div class='add'>+False Sharing</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+What is False Sharing</div><div class='add'>+=====================</div><div class='add'>+False sharing is related with cache mechanism of maintaining the data</div><div class='add'>+coherence of one cache line stored in multiple CPU's caches; then</div><div class='add'>+academic definition for it is in [1]_. Consider a struct with a</div><div class='add'>+refcount and a string::</div><div class='add'>+</div><div class='add'>+	struct foo {</div><div class='add'>+		refcount_t refcount;</div><div class='add'>+		...</div><div class='add'>+		char name[16];</div><div class='add'>+	} ____cacheline_internodealigned_in_smp;</div><div class='add'>+</div><div class='add'>+Member 'refcount'(A) and 'name'(B) _share_ one cache line like below::</div><div class='add'>+</div><div class='add'>+                +-----------+                     +-----------+</div><div class='add'>+                |   CPU 0   |                     |   CPU 1   |</div><div class='add'>+                +-----------+                     +-----------+</div><div class='add'>+               /                                        |</div><div class='add'>+              /                                         |</div><div class='add'>+             V                                          V</div><div class='add'>+         +----------------------+             +----------------------+</div><div class='add'>+         | A      B             | Cache 0     | A       B            | Cache 1</div><div class='add'>+         +----------------------+             +----------------------+</div><div class='add'>+                             |                  |</div><div class='add'>+  ---------------------------+------------------+-----------------------------</div><div class='add'>+                             |                  |</div><div class='add'>+                           +----------------------+</div><div class='add'>+                           |                      |</div><div class='add'>+                           +----------------------+</div><div class='add'>+              Main Memory  | A       B            |</div><div class='add'>+                           +----------------------+</div><div class='add'>+</div><div class='add'>+'refcount' is modified frequently, but 'name' is set once at object</div><div class='add'>+creation time and is never modified.  When many CPUs access 'foo' at</div><div class='add'>+the same time, with 'refcount' being only bumped by one CPU frequently</div><div class='add'>+and 'name' being read by other CPUs, all those reading CPUs have to</div><div class='add'>+reload the whole cache line over and over due to the 'sharing', even</div><div class='add'>+though 'name' is never changed.</div><div class='add'>+</div><div class='add'>+There are many real-world cases of performance regressions caused by</div><div class='add'>+false sharing.  One of these is a rw_semaphore 'mmap_lock' inside</div><div class='add'>+mm_struct struct, whose cache line layout change triggered a</div><div class='add'>+regression and Linus analyzed in [2]_.</div><div class='add'>+</div><div class='add'>+There are two key factors for a harmful false sharing:</div><div class='add'>+</div><div class='add'>+* A global datum accessed (shared) by many CPUs</div><div class='add'>+* In the concurrent accesses to the data, there is at least one write</div><div class='add'>+  operation: write/write or write/read cases.</div><div class='add'>+</div><div class='add'>+The sharing could be from totally unrelated kernel components, or</div><div class='add'>+different code paths of the same kernel component.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+False Sharing Pitfalls</div><div class='add'>+======================</div><div class='add'>+Back in time when one platform had only one or a few CPUs, hot data</div><div class='add'>+members could be purposely put in the same cache line to make them</div><div class='add'>+cache hot and save cacheline/TLB, like a lock and the data protected</div><div class='add'>+by it.  But for recent large system with hundreds of CPUs, this may</div><div class='add'>+not work when the lock is heavily contended, as the lock owner CPU</div><div class='add'>+could write to the data, while other CPUs are busy spinning the lock.</div><div class='add'>+</div><div class='add'>+Looking at past cases, there are several frequently occurring patterns</div><div class='add'>+for false sharing:</div><div class='add'>+</div><div class='add'>+* lock (spinlock/mutex/semaphore) and data protected by it are</div><div class='add'>+  purposely put in one cache line.</div><div class='add'>+* global data being put together in one cache line. Some kernel</div><div class='add'>+  subsystems have many global parameters of small size (4 bytes),</div><div class='add'>+  which can easily be grouped together and put into one cache line.</div><div class='add'>+* data members of a big data structure randomly sitting together</div><div class='add'>+  without being noticed (cache line is usually 64 bytes or more),</div><div class='add'>+  like 'mem_cgroup' struct.</div><div class='add'>+</div><div class='add'>+Following 'mitigation' section provides real-world examples.</div><div class='add'>+</div><div class='add'>+False sharing could easily happen unless they are intentionally</div><div class='add'>+checked, and it is valuable to run specific tools for performance</div><div class='add'>+critical workloads to detect false sharing affecting performance case</div><div class='add'>+and optimize accordingly.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+How to detect and analyze False Sharing</div><div class='add'>+========================================</div><div class='add'>+perf record/report/stat are widely used for performance tuning, and</div><div class='add'>+once hotspots are detected, tools like 'perf-c2c' and 'pahole' can</div><div class='add'>+be further used to detect and pinpoint the possible false sharing</div><div class='add'>+data structures.  'addr2line' is also good at decoding instruction</div><div class='add'>+pointer when there are multiple layers of inline functions.</div><div class='add'>+</div><div class='add'>+perf-c2c can capture the cache lines with most false sharing hits,</div><div class='add'>+decoded functions (line number of file) accessing that cache line,</div><div class='add'>+and in-line offset of the data. Simple commands are::</div><div class='add'>+</div><div class='add'>+  $ perf c2c record -ag sleep 3</div><div class='add'>+  $ perf c2c report --call-graph none -k vmlinux</div><div class='add'>+</div><div class='add'>+When running above during testing will-it-scale's tlb_flush1 case,</div><div class='add'>+perf reports something like::</div><div class='add'>+</div><div class='add'>+  Total records                     :    1658231</div><div class='add'>+  Locked Load/Store Operations      :      89439</div><div class='add'>+  Load Operations                   :     623219</div><div class='add'>+  Load Local HITM                   :      92117</div><div class='add'>+  Load Remote HITM                  :        139</div><div class='add'>+</div><div class='add'>+  #----------------------------------------------------------------------</div><div class='add'>+      4        0     2374        0        0        0  0xff1100088366d880</div><div class='add'>+  #----------------------------------------------------------------------</div><div class='add'>+    0.00%   42.29%    0.00%    0.00%    0.00%    0x8     1       1  0xffffffff81373b7b         0       231       129     5312        64  [k] __mod_lruvec_page_state    [kernel.vmlinux]  memcontrol.h:752   1</div><div class='add'>+    0.00%   13.10%    0.00%    0.00%    0.00%    0x8     1       1  0xffffffff81374718         0       226        97     3551        64  [k] folio_lruvec_lock_irqsave  [kernel.vmlinux]  memcontrol.h:752   1</div><div class='add'>+    0.00%   11.20%    0.00%    0.00%    0.00%    0x8     1       1  0xffffffff812c29bf         0       170       136      555        64  [k] lru_add_fn                 [kernel.vmlinux]  mm_inline.h:41     1</div><div class='add'>+    0.00%    7.62%    0.00%    0.00%    0.00%    0x8     1       1  0xffffffff812c3ec5         0       175       108      632        64  [k] release_pages              [kernel.vmlinux]  mm_inline.h:41     1</div><div class='add'>+    0.00%   23.29%    0.00%    0.00%    0.00%   0x10     1       1  0xffffffff81372d0a         0       234       279     1051        64  [k] __mod_memcg_lruvec_state   [kernel.vmlinux]  memcontrol.c:736   1</div><div class='add'>+</div><div class='add'>+A nice introduction for perf-c2c is [3]_.</div><div class='add'>+</div><div class='add'>+'pahole' decodes data structure layouts delimited in cache line</div><div class='add'>+granularity.  Users can match the offset in perf-c2c output with</div><div class='add'>+pahole's decoding to locate the exact data members.  For global</div><div class='add'>+data, users can search the data address in System.map.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Possible Mitigations</div><div class='add'>+====================</div><div class='add'>+False sharing does not always need to be mitigated.  False sharing</div><div class='add'>+mitigations should balance performance gains with complexity and</div><div class='add'>+space consumption.  Sometimes, lower performance is OK, and it's</div><div class='add'>+unnecessary to hyper-optimize every rarely used data structure or</div><div class='add'>+a cold data path.</div><div class='add'>+</div><div class='add'>+False sharing hurting performance cases are seen more frequently with</div><div class='add'>+core count increasing.  Because of these detrimental effects, many</div><div class='add'>+patches have been proposed across variety of subsystems (like</div><div class='add'>+networking and memory management) and merged.  Some common mitigations</div><div class='add'>+(with examples) are:</div><div class='add'>+</div><div class='add'>+* Separate hot global data in its own dedicated cache line, even if it</div><div class='add'>+  is just a 'short' type. The downside is more consumption of memory,</div><div class='add'>+  cache line and TLB entries.</div><div class='add'>+</div><div class='add'>+  - Commit 91b6d3256356 ("net: cache align tcp_memory_allocated, tcp_sockets_allocated")</div><div class='add'>+</div><div class='add'>+* Reorganize the data structure, separate the interfering members to</div><div class='add'>+  different cache lines.  One downside is it may introduce new false</div><div class='add'>+  sharing of other members.</div><div class='add'>+</div><div class='add'>+  - Commit 802f1d522d5f ("mm: page_counter: re-layout structure to reduce false sharing")</div><div class='add'>+</div><div class='add'>+* Replace 'write' with 'read' when possible, especially in loops.</div><div class='add'>+  Like for some global variable, use compare(read)-then-write instead</div><div class='add'>+  of unconditional write. For example, use::</div><div class='add'>+</div><div class='add'>+	if (!test_bit(XXX))</div><div class='add'>+		set_bit(XXX);</div><div class='add'>+</div><div class='add'>+  instead of directly "set_bit(XXX);", similarly for atomic_t data::</div><div class='add'>+</div><div class='add'>+	if (atomic_read(XXX) == AAA)</div><div class='add'>+		atomic_set(XXX, BBB);</div><div class='add'>+</div><div class='add'>+  - Commit 7b1002f7cfe5 ("bcache: fixup bcache_dev_sectors_dirty_add() multithreaded CPU false sharing")</div><div class='add'>+  - Commit 292648ac5cf1 ("mm: gup: allow FOLL_PIN to scale in SMP")</div><div class='add'>+</div><div class='add'>+* Turn hot global data to 'per-cpu data + global data' when possible,</div><div class='add'>+  or reasonably increase the threshold for syncing per-cpu data to</div><div class='add'>+  global data, to reduce or postpone the 'write' to that global data.</div><div class='add'>+</div><div class='add'>+  - Commit 520f897a3554 ("ext4: use percpu_counters for extent_status cache hits/misses")</div><div class='add'>+  - Commit 56f3547bfa4d ("mm: adjust vm_committed_as_batch according to vm overcommit policy")</div><div class='add'>+</div><div class='add'>+Surely, all mitigations should be carefully verified to not cause side</div><div class='add'>+effects.  To avoid introducing false sharing when coding, it's better</div><div class='add'>+to:</div><div class='add'>+</div><div class='add'>+* Be aware of cache line boundaries</div><div class='add'>+* Group mostly read-only fields together</div><div class='add'>+* Group things that are written at the same time together</div><div class='add'>+* Separate frequently read and frequently written fields on</div><div class='add'>+  different cache lines.</div><div class='add'>+</div><div class='add'>+and better add a comment stating the false sharing consideration.</div><div class='add'>+</div><div class='add'>+One note is, sometimes even after a severe false sharing is detected</div><div class='add'>+and solved, the performance may still have no obvious improvement as</div><div class='add'>+the hotspot switches to a new place.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Miscellaneous</div><div class='add'>+=============</div><div class='add'>+One open issue is that kernel has an optional data structure</div><div class='add'>+randomization mechanism, which also randomizes the situation of cache</div><div class='add'>+line sharing of data members.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. [1] https://en.wikipedia.org/wiki/False_sharing</div><div class='add'>+.. [2] https://lore.kernel.org/lkml/CAHk-=whoqV=cX5VC80mmR9rr+Z+yQ6fiQZm36Fb-izsanHg23w@mail.gmail.com/</div><div class='add'>+.. [3] https://joemario.github.io/blog/2016/09/01/c2c-blog/</div><div class='head'>diff --git a/Documentation/kernel-hacking/hacking.rst b/Documentation/kernel-hacking/hacking.rst<br/>index 55bd37a2efb0..1717348a4404 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kernel-hacking/hacking.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kernel-hacking/hacking.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kernel-hacking/hacking.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kernel-hacking/hacking.rst</a></div><div class='hunk'>@@ -112,8 +112,7 @@ time, although different tasklets can run simultaneously.</div><div class='ctx'> .. warning::</div><div class='ctx'> </div><div class='ctx'>     The name 'tasklet' is misleading: they have nothing to do with</div><div class='del'>-    'tasks', and probably more to do with some bad vodka Alexey</div><div class='del'>-    Kuznetsov had at the time.</div><div class='add'>+    'tasks'.</div><div class='ctx'> </div><div class='ctx'> You can tell you are in a softirq (or tasklet) using the</div><div class='ctx'> :c:func:`in_softirq()` macro (``include/linux/preempt.h``).</div><div class='hunk'>@@ -121,7 +120,7 @@ You can tell you are in a softirq (or tasklet) using the</div><div class='ctx'> .. warning::</div><div class='ctx'> </div><div class='ctx'>     Beware that this will return a false positive if a</div><div class='del'>-    :ref:`botton half lock &lt;local_bh_disable&gt;` is held.</div><div class='add'>+    :ref:`bottom half lock &lt;local_bh_disable&gt;` is held.</div><div class='ctx'> </div><div class='ctx'> Some Basic Rules</div><div class='ctx'> ================</div><div class='hunk'>@@ -290,8 +289,8 @@ userspace.</div><div class='ctx'>     Unlike :c:func:`put_user()` and :c:func:`get_user()`, they</div><div class='ctx'>     return the amount of uncopied data (ie. 0 still means success).</div><div class='ctx'> </div><div class='del'>-[Yes, this moronic interface makes me cringe. The flamewar comes up</div><div class='del'>-every year or so. --RR.]</div><div class='add'>+[Yes, this objectionable interface makes me cringe. The flamewar comes</div><div class='add'>+up every year or so. --RR.]</div><div class='ctx'> </div><div class='ctx'> The functions may sleep implicitly. This should never be called outside</div><div class='ctx'> user context (it makes no sense), with interrupts disabled, or a</div><div class='hunk'>@@ -645,8 +644,9 @@ names in development kernels; this is not done just to keep everyone on</div><div class='ctx'> their toes: it reflects a fundamental change (eg. can no longer be</div><div class='ctx'> called with interrupts on, or does extra checks, or doesn't do checks</div><div class='ctx'> which were caught before). Usually this is accompanied by a fairly</div><div class='del'>-complete note to the linux-kernel mailing list; search the archive.</div><div class='del'>-Simply doing a global replace on the file usually makes things **worse**.</div><div class='add'>+complete note to the appropriate kernel development mailing list; search</div><div class='add'>+the archives. Simply doing a global replace on the file usually makes</div><div class='add'>+things **worse**.</div><div class='ctx'> </div><div class='ctx'> Initializing structure members</div><div class='ctx'> ------------------------------</div><div class='hunk'>@@ -723,14 +723,14 @@ Putting Your Stuff in the Kernel</div><div class='ctx'> In order to get your stuff into shape for official inclusion, or even to</div><div class='ctx'> make a neat patch, there's administrative work to be done:</div><div class='ctx'> </div><div class='del'>--  Figure out whose pond you've been pissing in. Look at the top of the</div><div class='del'>-   source files, inside the ``MAINTAINERS`` file, and last of all in the</div><div class='del'>-   ``CREDITS`` file. You should coordinate with this person to make sure</div><div class='del'>-   you're not duplicating effort, or trying something that's already</div><div class='del'>-   been rejected.</div><div class='add'>+-  Figure out who are the owners of the code you've been modifying. Look</div><div class='add'>+   at the top of the source files, inside the ``MAINTAINERS`` file, and</div><div class='add'>+   last of all in the ``CREDITS`` file. You should coordinate with these</div><div class='add'>+   people to make sure you're not duplicating effort, or trying something</div><div class='add'>+   that's already been rejected.</div><div class='ctx'> </div><div class='del'>-   Make sure you put your name and EMail address at the top of any files</div><div class='del'>-   you create or mangle significantly. This is the first place people</div><div class='add'>+   Make sure you put your name and email address at the top of any files</div><div class='add'>+   you create or modify significantly. This is the first place people</div><div class='ctx'>    will look when they find a bug, or when **they** want to make a change.</div><div class='ctx'> </div><div class='ctx'> -  Usually you want a configuration option for your kernel hack. Edit</div><div class='hunk'>@@ -748,15 +748,14 @@ make a neat patch, there's administrative work to be done:</div><div class='ctx'>    can usually just add a "obj-$(CONFIG_xxx) += xxx.o" line. The syntax</div><div class='ctx'>    is documented in ``Documentation/kbuild/makefiles.rst``.</div><div class='ctx'> </div><div class='del'>--  Put yourself in ``CREDITS`` if you've done something noteworthy,</div><div class='del'>-   usually beyond a single file (your name should be at the top of the</div><div class='del'>-   source files anyway). ``MAINTAINERS`` means you want to be consulted</div><div class='del'>-   when changes are made to a subsystem, and hear about bugs; it implies</div><div class='del'>-   a more-than-passing commitment to some part of the code.</div><div class='add'>+-  Put yourself in ``CREDITS`` if you consider what you've done</div><div class='add'>+   noteworthy, usually beyond a single file (your name should be at the</div><div class='add'>+   top of the source files anyway). ``MAINTAINERS`` means you want to be</div><div class='add'>+   consulted when changes are made to a subsystem, and hear about bugs;</div><div class='add'>+   it implies a more-than-passing commitment to some part of the code.</div><div class='ctx'> </div><div class='ctx'> -  Finally, don't forget to read</div><div class='del'>-   ``Documentation/process/submitting-patches.rst`` and possibly</div><div class='del'>-   ``Documentation/process/submitting-drivers.rst``.</div><div class='add'>+   ``Documentation/process/submitting-patches.rst``</div><div class='ctx'> </div><div class='ctx'> Kernel Cantrips</div><div class='ctx'> ===============</div><div class='head'>diff --git a/Documentation/kernel-hacking/index.rst b/Documentation/kernel-hacking/index.rst<br/>index f53027652290..79c03bac99a2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kernel-hacking/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kernel-hacking/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kernel-hacking/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kernel-hacking/index.rst</a></div><div class='hunk'>@@ -9,3 +9,4 @@ Kernel Hacking Guides</div><div class='ctx'> </div><div class='ctx'>    hacking</div><div class='ctx'>    locking</div><div class='add'>+   false-sharing</div><div class='head'>diff --git a/Documentation/kernel-hacking/locking.rst b/Documentation/kernel-hacking/locking.rst<br/>index 4cbd50edf277..dff0646a717b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/kernel-hacking/locking.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/kernel-hacking/locking.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/kernel-hacking/locking.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/kernel-hacking/locking.rst</a></div><div class='hunk'>@@ -941,8 +941,7 @@ lock.</div><div class='ctx'> </div><div class='ctx'> A classic problem here is when you provide callbacks or hooks: if you</div><div class='ctx'> call these with the lock held, you risk simple deadlock, or a deadly</div><div class='del'>-embrace (who knows what the callback will do?). Remember, the other</div><div class='del'>-programmers are out to get you, so don't do this.</div><div class='add'>+embrace (who knows what the callback will do?).</div><div class='ctx'> </div><div class='ctx'> Overzealous Prevention Of Deadlocks</div><div class='ctx'> ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='hunk'>@@ -952,8 +951,6 @@ grabs a read lock, searches a list, fails to find what it wants, drops</div><div class='ctx'> the read lock, grabs a write lock and inserts the object has a race</div><div class='ctx'> condition.</div><div class='ctx'> </div><div class='del'>-If you don't see why, please stay away from my code.</div><div class='del'>-</div><div class='ctx'> Racing Timers: A Kernel Pastime</div><div class='ctx'> -------------------------------</div><div class='ctx'> </div><div class='hunk'>@@ -970,7 +967,7 @@ you might do the following::</div><div class='ctx'> </div><div class='ctx'>             while (list) {</div><div class='ctx'>                     struct foo *next = list-&gt;next;</div><div class='del'>-                    del_timer(&amp;list-&gt;timer);</div><div class='add'>+                    timer_delete(&amp;list-&gt;timer);</div><div class='ctx'>                     kfree(list);</div><div class='ctx'>                     list = next;</div><div class='ctx'>             }</div><div class='hunk'>@@ -984,7 +981,7 @@ the lock after we spin_unlock_bh(), and then try to free</div><div class='ctx'> the element (which has already been freed!).</div><div class='ctx'> </div><div class='ctx'> This can be avoided by checking the result of</div><div class='del'>-del_timer(): if it returns 1, the timer has been deleted.</div><div class='add'>+timer_delete(): if it returns 1, the timer has been deleted.</div><div class='ctx'> If 0, it means (in this case) that it is currently running, so we can</div><div class='ctx'> do::</div><div class='ctx'> </div><div class='hunk'>@@ -993,7 +990,7 @@ do::</div><div class='ctx'> </div><div class='ctx'>                     while (list) {</div><div class='ctx'>                             struct foo *next = list-&gt;next;</div><div class='del'>-                            if (!del_timer(&amp;list-&gt;timer)) {</div><div class='add'>+                            if (!timer_delete(&amp;list-&gt;timer)) {</div><div class='ctx'>                                     /* Give timer a chance to delete this */</div><div class='ctx'>                                     spin_unlock_bh(&amp;list_lock);</div><div class='ctx'>                                     goto retry;</div><div class='hunk'>@@ -1008,9 +1005,12 @@ do::</div><div class='ctx'> Another common problem is deleting timers which restart themselves (by</div><div class='ctx'> calling add_timer() at the end of their timer function).</div><div class='ctx'> Because this is a fairly common case which is prone to races, you should</div><div class='del'>-use del_timer_sync() (``include/linux/timer.h``) to</div><div class='del'>-handle this case. It returns the number of times the timer had to be</div><div class='del'>-deleted before we finally stopped it from adding itself back in.</div><div class='add'>+use timer_delete_sync() (``include/linux/timer.h``) to handle this case.</div><div class='add'>+</div><div class='add'>+Before freeing a timer, timer_shutdown() or timer_shutdown_sync() should be</div><div class='add'>+called which will keep it from being rearmed. Any subsequent attempt to</div><div class='add'>+rearm the timer will be silently ignored by the core code.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> Locking Speed</div><div class='ctx'> =============</div><div class='hunk'>@@ -1277,11 +1277,11 @@ Manfred Spraul points out that you can still do this, even if the data</div><div class='ctx'> is very occasionally accessed in user context or softirqs/tasklets. The</div><div class='ctx'> irq handler doesn't use a lock, and all other accesses are done as so::</div><div class='ctx'> </div><div class='del'>-        spin_lock(&amp;lock);</div><div class='add'>+        mutex_lock(&amp;lock);</div><div class='ctx'>         disable_irq(irq);</div><div class='ctx'>         ...</div><div class='ctx'>         enable_irq(irq);</div><div class='del'>-        spin_unlock(&amp;lock);</div><div class='add'>+        mutex_unlock(&amp;lock);</div><div class='ctx'> </div><div class='ctx'> The disable_irq() prevents the irq handler from running</div><div class='ctx'> (and waits for it to finish if it's currently running on other CPUs).</div><div class='hunk'>@@ -1338,7 +1338,7 @@ lock.</div><div class='ctx'> </div><div class='ctx'> -  kfree()</div><div class='ctx'> </div><div class='del'>--  add_timer() and del_timer()</div><div class='add'>+-  add_timer() and timer_delete()</div><div class='ctx'> </div><div class='ctx'> Mutex API reference</div><div class='ctx'> ===================</div><div class='head'>diff --git a/Documentation/leds/index.rst b/Documentation/leds/index.rst<br/>index e5d63b940045..ce57254cb871 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/leds/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/leds/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/leds/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/leds/index.rst</a></div><div class='hunk'>@@ -25,4 +25,6 @@ LEDs</div><div class='ctx'>    leds-lp5562</div><div class='ctx'>    leds-lp55xx</div><div class='ctx'>    leds-mlxcpld</div><div class='add'>+   leds-mt6370-rgb</div><div class='ctx'>    leds-sc27xx</div><div class='add'>+   leds-qcom-lpg</div><div class='head'>diff --git a/Documentation/leds/leds-mt6370-rgb.rst b/Documentation/leds/leds-mt6370-rgb.rst<br/>new file mode 100644<br/>index 000000000000..152a2e592172<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/leds/leds-mt6370-rgb.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/leds/leds-mt6370-rgb.rst</a></div><div class='hunk'>@@ -0,0 +1,64 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=========================================</div><div class='add'>+The device for Mediatek MT6370 RGB LED</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The MT6370 integrates a four-channel RGB LED driver, designed to provide a</div><div class='add'>+variety of lighting effect for mobile device applications. The RGB LED devices</div><div class='add'>+includes a smart LED string controller and it can drive 3 channels of LEDs with</div><div class='add'>+a sink current up to 24mA and a CHG_VIN power good indicator LED with sink</div><div class='add'>+current up to 6mA. It provides three operation modes for RGB LEDs:</div><div class='add'>+PWM Dimming mode, breath pattern mode, and constant current mode. The device</div><div class='add'>+can increase or decrease the brightness of the RGB LED via an I2C interface.</div><div class='add'>+</div><div class='add'>+The breath pattern for a channel can be programmed using the "pattern" trigger,</div><div class='add'>+using the hw_pattern attribute.</div><div class='add'>+</div><div class='add'>+/sys/class/leds/&lt;led&gt;/hw_pattern</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+Specify a hardware breath pattern for a MT6370 RGB LED.</div><div class='add'>+</div><div class='add'>+The breath pattern is a series of timing pairs, with the hold-time expressed in</div><div class='add'>+milliseconds. And the brightness is controlled by</div><div class='add'>+'/sys/class/leds/&lt;led&gt;/brightness'. The pattern doesn't include the brightness</div><div class='add'>+setting. Hardware pattern only controls the timing for each pattern stage</div><div class='add'>+depending on the current brightness setting.</div><div class='add'>+</div><div class='add'>+Pattern diagram::</div><div class='add'>+</div><div class='add'>+         "0 Tr1 0 Tr2 0 Tf1 0 Tf2 0 Ton 0 Toff" --&gt; '0' for dummy brightness code</div><div class='add'>+</div><div class='add'>+          ^</div><div class='add'>+          |           ============</div><div class='add'>+          |          /            \                                /</div><div class='add'>+    Icurr |         /              \                              /</div><div class='add'>+          |        /                \                            /</div><div class='add'>+          |       /                  \                          /   .....repeat</div><div class='add'>+          |      /                    \                        /</div><div class='add'>+          |   ---                      ---                  ---</div><div class='add'>+          |---                            ---            ---</div><div class='add'>+          +----------------------------------============------------&gt; Time</div><div class='add'>+          &lt; Tr1&gt;&lt;Tr2&gt;&lt;   Ton    &gt;&lt;Tf1&gt;&lt;Tf2 &gt;&lt;  Toff    &gt;&lt; Tr1&gt;&lt;Tr2&gt;</div><div class='add'>+</div><div class='add'>+Timing description:</div><div class='add'>+</div><div class='add'>+  * Tr1:    First rising time for 0% - 30% load.</div><div class='add'>+  * Tr2:    Second rising time for 31% - 100% load.</div><div class='add'>+  * Ton:    On time for 100% load.</div><div class='add'>+  * Tf1:    First falling time for 100% - 31% load.</div><div class='add'>+  * Tf2:    Second falling time for 30% to 0% load.</div><div class='add'>+  * Toff:   Off time for 0% load.</div><div class='add'>+</div><div class='add'>+  * Tr1/Tr2/Tf1/Tf2/Ton: 125ms to 3125ms, 200ms per step.</div><div class='add'>+  * Toff: 250ms to 6250ms, 400ms per step.</div><div class='add'>+</div><div class='add'>+Pattern example::</div><div class='add'>+</div><div class='add'>+       "0 125 0 125 0 125 0 125 0 625 0 1050"</div><div class='add'>+</div><div class='add'>+This Will configure Tr1/Tr2/Tf1/Tf2 to 125m, Ton to 625ms, and Toff to 1050ms.</div><div class='head'>diff --git a/Documentation/leds/leds-qcom-lpg.rst b/Documentation/leds/leds-qcom-lpg.rst<br/>new file mode 100644<br/>index 000000000000..d6a76c38c581<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/leds/leds-qcom-lpg.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/leds/leds-qcom-lpg.rst</a></div><div class='hunk'>@@ -0,0 +1,78 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==============================</div><div class='add'>+Kernel driver for Qualcomm LPG</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+Description</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The Qualcomm LPG can be found in a variety of Qualcomm PMICs and consists of a</div><div class='add'>+number of PWM channels, a programmable pattern lookup table and a RGB LED</div><div class='add'>+current sink.</div><div class='add'>+</div><div class='add'>+To facilitate the various use cases, the LPG channels can be exposed as</div><div class='add'>+individual LEDs, grouped together as RGB LEDs or otherwise be accessed as PWM</div><div class='add'>+channels. The output of each PWM channel is routed to other hardware</div><div class='add'>+blocks, such as the RGB current sink, GPIO pins etc.</div><div class='add'>+</div><div class='add'>+The each PWM channel can operate with a period between 27us and 384 seconds and</div><div class='add'>+has a 9 bit resolution of the duty cycle.</div><div class='add'>+</div><div class='add'>+In order to provide support for status notifications with the CPU subsystem in</div><div class='add'>+deeper idle states the LPG provides pattern support. This consists of a shared</div><div class='add'>+lookup table of brightness values and per channel properties to select the</div><div class='add'>+range within the table to use, the rate and if the pattern should repeat.</div><div class='add'>+</div><div class='add'>+The pattern for a channel can be programmed using the "pattern" trigger, using</div><div class='add'>+the hw_pattern attribute.</div><div class='add'>+</div><div class='add'>+/sys/class/leds/&lt;led&gt;/hw_pattern</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+Specify a hardware pattern for a Qualcomm LPG LED.</div><div class='add'>+</div><div class='add'>+The pattern is a series of brightness and hold-time pairs, with the hold-time</div><div class='add'>+expressed in milliseconds. The hold time is a property of the pattern and must</div><div class='add'>+therefore be identical for each element in the pattern (except for the pauses</div><div class='add'>+described below). As the LPG hardware is not able to perform the linear</div><div class='add'>+transitions expected by the leds-trigger-pattern format, each entry in the</div><div class='add'>+pattern must be followed a zero-length entry of the same brightness.</div><div class='add'>+</div><div class='add'>+Simple pattern::</div><div class='add'>+</div><div class='add'>+    "255 500 255 0 0 500 0 0"</div><div class='add'>+</div><div class='add'>+        ^</div><div class='add'>+        |</div><div class='add'>+    255 +----+    +----+</div><div class='add'>+        |    |    |    |      ...</div><div class='add'>+      0 |    +----+    +----</div><div class='add'>+        +----------------------&gt;</div><div class='add'>+        0    5   10   15     time (100ms)</div><div class='add'>+</div><div class='add'>+The LPG supports specifying a longer hold-time for the first and last element</div><div class='add'>+in the pattern, the so called "low pause" and "high pause".</div><div class='add'>+</div><div class='add'>+Low-pause pattern::</div><div class='add'>+</div><div class='add'>+    "255 1000 255 0 0 500 0 0 255 500 255 0 0 500 0 0"</div><div class='add'>+</div><div class='add'>+        ^</div><div class='add'>+        |</div><div class='add'>+    255 +--------+    +----+    +----+    +--------+</div><div class='add'>+        |        |    |    |    |    |    |        |      ...</div><div class='add'>+      0 |        +----+    +----+    +----+        +----</div><div class='add'>+        +-----------------------------&gt;</div><div class='add'>+        0    5   10   15  20   25   time (100ms)</div><div class='add'>+</div><div class='add'>+Similarly, the last entry can be stretched by using a higher hold-time on the</div><div class='add'>+last entry.</div><div class='add'>+</div><div class='add'>+In order to save space in the shared lookup table the LPG supports "ping-pong"</div><div class='add'>+mode, in which case each run through the pattern is performed by first running</div><div class='add'>+the pattern forward, then backwards. This mode is automatically used by the</div><div class='add'>+driver when the given pattern is a palindrome. In this case the "high pause"</div><div class='add'>+denotes the wait time before the pattern is run in reverse and as such the</div><div class='add'>+specified hold-time of the middle item in the pattern is allowed to have a</div><div class='add'>+different hold-time.</div><div class='head'>diff --git a/Documentation/leds/ledtrig-oneshot.rst b/Documentation/leds/ledtrig-oneshot.rst<br/>index 69fa3ea1d554..e044d69e9c0f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/leds/ledtrig-oneshot.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/leds/ledtrig-oneshot.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/leds/ledtrig-oneshot.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/leds/ledtrig-oneshot.rst</a></div><div class='hunk'>@@ -5,7 +5,7 @@ One-shot LED Trigger</div><div class='ctx'> This is a LED trigger useful for signaling the user of an event where there are</div><div class='ctx'> no clear trap points to put standard led-on and led-off settings.  Using this</div><div class='ctx'> trigger, the application needs only to signal the trigger when an event has</div><div class='del'>-happened, than the trigger turns the LED on and than keeps it off for a</div><div class='add'>+happened, then the trigger turns the LED on and then keeps it off for a</div><div class='ctx'> specified amount of time.</div><div class='ctx'> </div><div class='ctx'> This trigger is meant to be usable both for sporadic and dense events.  In the</div><div class='head'>diff --git a/Documentation/leds/well-known-leds.txt b/Documentation/leds/well-known-leds.txt<br/>index 2160382c86be..e9c30dc75884 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/leds/well-known-leds.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/leds/well-known-leds.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/leds/well-known-leds.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/leds/well-known-leds.txt</a></div><div class='hunk'>@@ -70,3 +70,33 @@ Good: "platform:*:charging" (allwinner sun50i)</div><div class='ctx'> * Screen</div><div class='ctx'> </div><div class='ctx'> Good: ":backlight" (Motorola Droid 4)</div><div class='add'>+</div><div class='add'>+* Ethernet LEDs</div><div class='add'>+</div><div class='add'>+Currently two types of Network LEDs are support, those controlled by</div><div class='add'>+the PHY and those by the MAC. In theory both can be present at the</div><div class='add'>+same time for one Linux netdev, hence the names need to differ between</div><div class='add'>+MAC and PHY.</div><div class='add'>+</div><div class='add'>+Do not use the netdev name, such as eth0, enp1s0. These are not stable</div><div class='add'>+and are not unique. They also don't differentiate between MAC and PHY.</div><div class='add'>+</div><div class='add'>+** MAC LEDs</div><div class='add'>+</div><div class='add'>+Good: f1070000.ethernet:white:WAN</div><div class='add'>+Good: mdio_mux-0.1:00:green:left</div><div class='add'>+Good: 0000:02:00.0:yellow:top</div><div class='add'>+</div><div class='add'>+The first part must uniquely name the MAC controller. Then follows the</div><div class='add'>+colour.  WAN/LAN should be used for a single LED. If there are</div><div class='add'>+multiple LEDs, use left/right, or top/bottom to indicate their</div><div class='add'>+position on the RJ45 socket.</div><div class='add'>+</div><div class='add'>+** PHY LEDs</div><div class='add'>+</div><div class='add'>+Good: f1072004.mdio-mii:00: white:WAN</div><div class='add'>+Good: !mdio-mux!mdio@2!switch@0!mdio:01:green:right</div><div class='add'>+Good: r8169-0-200:00:yellow:bottom</div><div class='add'>+</div><div class='add'>+The first part must uniquely name the PHY. This often means uniquely</div><div class='add'>+identifying the MDIO bus controller, and the address on the bus.</div><div class='head'>diff --git a/Documentation/litmus-tests/README b/Documentation/litmus-tests/README<br/>index 7f5c6c3ed6c3..658d37860d39 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/litmus-tests/README?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/litmus-tests/README</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/litmus-tests/README?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/litmus-tests/README</a></div><div class='hunk'>@@ -9,7 +9,7 @@ a kernel test module based on a litmus test, please see</div><div class='ctx'> tools/memory-model/README.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-atomic (/atomic derectory)</div><div class='add'>+atomic (/atomic directory)</div><div class='ctx'> --------------------------</div><div class='ctx'> </div><div class='ctx'> Atomic-RMW+mb__after_atomic-is-stronger-than-acquire.litmus</div><div class='head'>diff --git a/Documentation/litmus-tests/locking/DCL-broken.litmus b/Documentation/litmus-tests/locking/DCL-broken.litmus<br/>new file mode 100644<br/>index 000000000000..bfb7ba4316d6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/litmus-tests/locking/DCL-broken.litmus?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/litmus-tests/locking/DCL-broken.litmus</a></div><div class='hunk'>@@ -0,0 +1,54 @@</div><div class='add'>+C DCL-broken</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: Sometimes</div><div class='add'>+ *</div><div class='add'>+ * This litmus test demonstrates more than just locking is required to</div><div class='add'>+ * correctly implement double-checked locking.</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	int flag;</div><div class='add'>+	int data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P0(int *flag, int *data, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	r0 = READ_ONCE(*flag);</div><div class='add'>+	if (r0 == 0) {</div><div class='add'>+		spin_lock(lck);</div><div class='add'>+		r1 = READ_ONCE(*flag);</div><div class='add'>+		if (r1 == 0) {</div><div class='add'>+			WRITE_ONCE(*data, 1);</div><div class='add'>+			WRITE_ONCE(*flag, 1);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(lck);</div><div class='add'>+	}</div><div class='add'>+	r2 = READ_ONCE(*data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *flag, int *data, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	r0 = READ_ONCE(*flag);</div><div class='add'>+	if (r0 == 0) {</div><div class='add'>+		spin_lock(lck);</div><div class='add'>+		r1 = READ_ONCE(*flag);</div><div class='add'>+		if (r1 == 0) {</div><div class='add'>+			WRITE_ONCE(*data, 1);</div><div class='add'>+			WRITE_ONCE(*flag, 1);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(lck);</div><div class='add'>+	}</div><div class='add'>+	r2 = READ_ONCE(*data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+locations [flag;data;0:r0;0:r1;1:r0;1:r1]</div><div class='add'>+exists (0:r2=0 \/ 1:r2=0)</div><div class='head'>diff --git a/Documentation/litmus-tests/locking/DCL-fixed.litmus b/Documentation/litmus-tests/locking/DCL-fixed.litmus<br/>new file mode 100644<br/>index 000000000000..d1b60bcb0c8f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/litmus-tests/locking/DCL-fixed.litmus?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/litmus-tests/locking/DCL-fixed.litmus</a></div><div class='hunk'>@@ -0,0 +1,55 @@</div><div class='add'>+C DCL-fixed</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: Never</div><div class='add'>+ *</div><div class='add'>+ * This litmus test demonstrates that double-checked locking can be</div><div class='add'>+ * reliable given proper use of smp_load_acquire() and smp_store_release()</div><div class='add'>+ * in addition to the locking.</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	int flag;</div><div class='add'>+	int data;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P0(int *flag, int *data, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	r0 = smp_load_acquire(flag);</div><div class='add'>+	if (r0 == 0) {</div><div class='add'>+		spin_lock(lck);</div><div class='add'>+		r1 = READ_ONCE(*flag);</div><div class='add'>+		if (r1 == 0) {</div><div class='add'>+			WRITE_ONCE(*data, 1);</div><div class='add'>+			smp_store_release(flag, 1);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(lck);</div><div class='add'>+	}</div><div class='add'>+	r2 = READ_ONCE(*data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *flag, int *data, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	r0 = smp_load_acquire(flag);</div><div class='add'>+	if (r0 == 0) {</div><div class='add'>+		spin_lock(lck);</div><div class='add'>+		r1 = READ_ONCE(*flag);</div><div class='add'>+		if (r1 == 0) {</div><div class='add'>+			WRITE_ONCE(*data, 1);</div><div class='add'>+			smp_store_release(flag, 1);</div><div class='add'>+		}</div><div class='add'>+		spin_unlock(lck);</div><div class='add'>+	}</div><div class='add'>+	r2 = READ_ONCE(*data);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+locations [flag;data;0:r0;0:r1;1:r0;1:r1]</div><div class='add'>+exists (0:r2=0 \/ 1:r2=0)</div><div class='head'>diff --git a/Documentation/litmus-tests/locking/RM-broken.litmus b/Documentation/litmus-tests/locking/RM-broken.litmus<br/>new file mode 100644<br/>index 000000000000..b7ef30cedfe5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/litmus-tests/locking/RM-broken.litmus?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/litmus-tests/locking/RM-broken.litmus</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+C RM-broken</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: DEADLOCK</div><div class='add'>+ *</div><div class='add'>+ * This litmus test demonstrates that the old "roach motel" approach</div><div class='add'>+ * to locking, where code can be freely moved into critical sections,</div><div class='add'>+ * cannot be used in the Linux kernel.</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	int x;</div><div class='add'>+	atomic_t y;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P0(int *x, atomic_t *y, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	spin_lock(lck);</div><div class='add'>+	r2 = atomic_inc_return(y);</div><div class='add'>+	WRITE_ONCE(*x, 1);</div><div class='add'>+	spin_unlock(lck);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *x, atomic_t *y, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	spin_lock(lck);</div><div class='add'>+	r0 = READ_ONCE(*x);</div><div class='add'>+	r1 = READ_ONCE(*x);</div><div class='add'>+	r2 = atomic_inc_return(y);</div><div class='add'>+	spin_unlock(lck);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+locations [x;0:r2;1:r0;1:r1;1:r2]</div><div class='add'>+filter (1:r0=0 /\ 1:r1=1)</div><div class='add'>+exists (1:r2=1)</div><div class='head'>diff --git a/Documentation/litmus-tests/locking/RM-fixed.litmus b/Documentation/litmus-tests/locking/RM-fixed.litmus<br/>new file mode 100644<br/>index 000000000000..b62817559616<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/litmus-tests/locking/RM-fixed.litmus?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/litmus-tests/locking/RM-fixed.litmus</a></div><div class='hunk'>@@ -0,0 +1,41 @@</div><div class='add'>+C RM-fixed</div><div class='add'>+</div><div class='add'>+(*</div><div class='add'>+ * Result: Never</div><div class='add'>+ *</div><div class='add'>+ * This litmus test demonstrates that the old "roach motel" approach</div><div class='add'>+ * to locking, where code can be freely moved into critical sections,</div><div class='add'>+ * cannot be used in the Linux kernel.</div><div class='add'>+ *)</div><div class='add'>+</div><div class='add'>+{</div><div class='add'>+	int x;</div><div class='add'>+	atomic_t y;</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P0(int *x, atomic_t *y, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	spin_lock(lck);</div><div class='add'>+	r2 = atomic_inc_return(y);</div><div class='add'>+	WRITE_ONCE(*x, 1);</div><div class='add'>+	spin_unlock(lck);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+P1(int *x, atomic_t *y, spinlock_t *lck)</div><div class='add'>+{</div><div class='add'>+	int r0;</div><div class='add'>+	int r1;</div><div class='add'>+	int r2;</div><div class='add'>+</div><div class='add'>+	r0 = READ_ONCE(*x);</div><div class='add'>+	r1 = READ_ONCE(*x);</div><div class='add'>+	spin_lock(lck);</div><div class='add'>+	r2 = atomic_inc_return(y);</div><div class='add'>+	spin_unlock(lck);</div><div class='add'>+}</div><div class='add'>+</div><div class='add'>+locations [x;0:r2;1:r0;1:r1;1:r2]</div><div class='add'>+filter (1:r0=0 /\ 1:r1=1)</div><div class='add'>+exists (1:r2=1)</div><div class='head'>diff --git a/Documentation/livepatch/module-elf-format.rst b/Documentation/livepatch/module-elf-format.rst<br/>index dbe9b400e39f..a03ed02ec57e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/livepatch/module-elf-format.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/livepatch/module-elf-format.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/livepatch/module-elf-format.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/livepatch/module-elf-format.rst</a></div><div class='hunk'>@@ -1,8 +1,8 @@</div><div class='ctx'> ===========================</div><div class='del'>-Livepatch module Elf format</div><div class='add'>+Livepatch module ELF format</div><div class='ctx'> ===========================</div><div class='ctx'> </div><div class='del'>-This document outlines the Elf format requirements that livepatch modules must follow.</div><div class='add'>+This document outlines the ELF format requirements that livepatch modules must follow.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> .. Table of Contents</div><div class='hunk'>@@ -20,17 +20,17 @@ code. So, instead of duplicating code and re-implementing what the module</div><div class='ctx'> loader can already do, livepatch leverages existing code in the module</div><div class='ctx'> loader to perform the all the arch-specific relocation work. Specifically,</div><div class='ctx'> livepatch reuses the apply_relocate_add() function in the module loader to</div><div class='del'>-write relocations. The patch module Elf format described in this document</div><div class='add'>+write relocations. The patch module ELF format described in this document</div><div class='ctx'> enables livepatch to be able to do this. The hope is that this will make</div><div class='ctx'> livepatch more easily portable to other architectures and reduce the amount</div><div class='ctx'> of arch-specific code required to port livepatch to a particular</div><div class='ctx'> architecture.</div><div class='ctx'> </div><div class='ctx'> Since apply_relocate_add() requires access to a module's section header</div><div class='del'>-table, symbol table, and relocation section indices, Elf information is</div><div class='add'>+table, symbol table, and relocation section indices, ELF information is</div><div class='ctx'> preserved for livepatch modules (see section 5). Livepatch manages its own</div><div class='ctx'> relocation sections and symbols, which are described in this document. The</div><div class='del'>-Elf constants used to mark livepatch symbols and relocation sections were</div><div class='add'>+ELF constants used to mark livepatch symbols and relocation sections were</div><div class='ctx'> selected from OS-specific ranges according to the definitions from glibc.</div><div class='ctx'> </div><div class='ctx'> Why does livepatch need to write its own relocations?</div><div class='hunk'>@@ -43,7 +43,7 @@ reject the livepatch module. Furthermore, we cannot apply relocations that</div><div class='ctx'> affect modules not yet loaded at patch module load time (e.g. a patch to a</div><div class='ctx'> driver that is not loaded). Formerly, livepatch solved this problem by</div><div class='ctx'> embedding special "dynrela" (dynamic rela) sections in the resulting patch</div><div class='del'>-module Elf output. Using these dynrela sections, livepatch could resolve</div><div class='add'>+module ELF output. Using these dynrela sections, livepatch could resolve</div><div class='ctx'> symbols while taking into account its scope and what module the symbol</div><div class='ctx'> belongs to, and then manually apply the dynamic relocations. However this</div><div class='ctx'> approach required livepatch to supply arch-specific code in order to write</div><div class='hunk'>@@ -80,7 +80,7 @@ Example:</div><div class='ctx'> 3. Livepatch relocation sections</div><div class='ctx'> ================================</div><div class='ctx'> </div><div class='del'>-A livepatch module manages its own Elf relocation sections to apply</div><div class='add'>+A livepatch module manages its own ELF relocation sections to apply</div><div class='ctx'> relocations to modules as well as to the kernel (vmlinux) at the</div><div class='ctx'> appropriate time. For example, if a patch module patches a driver that is</div><div class='ctx'> not currently loaded, livepatch will apply the corresponding livepatch</div><div class='hunk'>@@ -95,7 +95,7 @@ also possible for a livepatch module to have no livepatch relocation</div><div class='ctx'> sections, as in the case of the sample livepatch module (see</div><div class='ctx'> samples/livepatch).</div><div class='ctx'> </div><div class='del'>-Since Elf information is preserved for livepatch modules (see Section 5), a</div><div class='add'>+Since ELF information is preserved for livepatch modules (see Section 5), a</div><div class='ctx'> livepatch relocation section can be applied simply by passing in the</div><div class='ctx'> appropriate section index to apply_relocate_add(), which then uses it to</div><div class='ctx'> access the relocation section and apply the relocations.</div><div class='hunk'>@@ -210,11 +210,11 @@ module-&gt;symtab.</div><div class='ctx'> =====================================</div><div class='ctx'> Normally, a stripped down copy of a module's symbol table (containing only</div><div class='ctx'> "core" symbols) is made available through module-&gt;symtab (See layout_symtab()</div><div class='del'>-in kernel/module.c). For livepatch modules, the symbol table copied into memory</div><div class='del'>-on module load must be exactly the same as the symbol table produced when the</div><div class='del'>-patch module was compiled. This is because the relocations in each livepatch</div><div class='del'>-relocation section refer to their respective symbols with their symbol indices,</div><div class='del'>-and the original symbol indices (and thus the symtab ordering) must be</div><div class='add'>+in kernel/module/kallsyms.c). For livepatch modules, the symbol table copied</div><div class='add'>+into memory on module load must be exactly the same as the symbol table produced</div><div class='add'>+when the patch module was compiled. This is because the relocations in each</div><div class='add'>+livepatch relocation section refer to their respective symbols with their symbol</div><div class='add'>+indices, and the original symbol indices (and thus the symtab ordering) must be</div><div class='ctx'> preserved in order for apply_relocate_add() to find the right symbol.</div><div class='ctx'> </div><div class='ctx'> For example, take this particular rela from a livepatch module:::</div><div class='hunk'>@@ -291,19 +291,12 @@ Examples:</div><div class='ctx'>   Note that the 'Ndx' (Section index) for these symbols is SHN_LIVEPATCH (0xff20).</div><div class='ctx'>   "OS" means OS-specific.</div><div class='ctx'> </div><div class='del'>-5. Symbol table and Elf section access</div><div class='add'>+5. Symbol table and ELF section access</div><div class='ctx'> ======================================</div><div class='ctx'> A livepatch module's symbol table is accessible through module-&gt;symtab.</div><div class='ctx'> </div><div class='ctx'> Since apply_relocate_add() requires access to a module's section headers,</div><div class='del'>-symbol table, and relocation section indices, Elf information is preserved for</div><div class='add'>+symbol table, and relocation section indices, ELF information is preserved for</div><div class='ctx'> livepatch modules and is made accessible by the module loader through</div><div class='del'>-module-&gt;klp_info, which is a klp_modinfo struct. When a livepatch module loads,</div><div class='del'>-this struct is filled in by the module loader. Its fields are documented below::</div><div class='del'>-</div><div class='del'>-	struct klp_modinfo {</div><div class='del'>-		Elf_Ehdr hdr; /* Elf header */</div><div class='del'>-		Elf_Shdr *sechdrs; /* Section header table */</div><div class='del'>-		char *secstrings; /* String table for the section headers */</div><div class='del'>-		unsigned int symndx; /* The symbol table section index */</div><div class='del'>-	};</div><div class='add'>+module-&gt;klp_info, which is a :c:type:`klp_modinfo` struct. When a livepatch module</div><div class='add'>+loads, this struct is filled in by the module loader.</div><div class='head'>diff --git a/Documentation/livepatch/reliable-stacktrace.rst b/Documentation/livepatch/reliable-stacktrace.rst<br/>index 67459d2ca2af..d56bb706172f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/livepatch/reliable-stacktrace.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/livepatch/reliable-stacktrace.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/livepatch/reliable-stacktrace.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/livepatch/reliable-stacktrace.rst</a></div><div class='hunk'>@@ -183,7 +183,7 @@ trampoline or return trampoline. For example, considering the x86_64</div><div class='ctx'> .. code-block:: none</div><div class='ctx'> </div><div class='ctx'>    SYM_CODE_START(return_to_handler)</div><div class='del'>-           UNWIND_HINT_EMPTY</div><div class='add'>+           UNWIND_HINT_UNDEFINED</div><div class='ctx'>            subq  $24, %rsp</div><div class='ctx'> </div><div class='ctx'>            /* Save the return values */</div><div class='head'>diff --git a/Documentation/locking/locktorture.rst b/Documentation/locking/locktorture.rst<br/>index dfaf9fc883f4..7f56fc0d7c31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/locking/locktorture.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/locking/locktorture.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/locking/locktorture.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/locking/locktorture.rst</a></div><div class='hunk'>@@ -5,7 +5,7 @@ Kernel Lock Torture Test Operation</div><div class='ctx'> CONFIG_LOCK_TORTURE_TEST</div><div class='ctx'> ========================</div><div class='ctx'> </div><div class='del'>-The CONFIG LOCK_TORTURE_TEST config option provides a kernel module</div><div class='add'>+The CONFIG_LOCK_TORTURE_TEST config option provides a kernel module</div><div class='ctx'> that runs torture tests on core kernel locking primitives. The kernel</div><div class='ctx'> module, 'locktorture', may be built after the fact on the running</div><div class='ctx'> kernel to be tested, if desired. The tests periodically output status</div><div class='hunk'>@@ -67,7 +67,7 @@ torture_type</div><div class='ctx'> </div><div class='ctx'> 		     - "rtmutex_lock":</div><div class='ctx'> 				rtmutex_lock() and rtmutex_unlock() pairs.</div><div class='del'>-				Kernel must have CONFIG_RT_MUTEX=y.</div><div class='add'>+				Kernel must have CONFIG_RT_MUTEXES=y.</div><div class='ctx'> </div><div class='ctx'> 		     - "rwsem_lock":</div><div class='ctx'> 				read/write down() and up() semaphore pairs.</div><div class='head'>diff --git a/Documentation/locking/seqlock.rst b/Documentation/locking/seqlock.rst<br/>index 64405e5da63e..bfda1a5fecad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/locking/seqlock.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/locking/seqlock.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/locking/seqlock.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/locking/seqlock.rst</a></div><div class='hunk'>@@ -39,7 +39,7 @@ as the writer can invalidate a pointer that the reader is following.</div><div class='ctx'> Sequence counters (``seqcount_t``)</div><div class='ctx'> ==================================</div><div class='ctx'> </div><div class='del'>-This is the the raw counting mechanism, which does not protect against</div><div class='add'>+This is the raw counting mechanism, which does not protect against</div><div class='ctx'> multiple writers.  Write side critical sections must thus be serialized</div><div class='ctx'> by an external lock.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/loongarch/booting.rst b/Documentation/loongarch/booting.rst<br/>new file mode 100644<br/>index 000000000000..91eccd410478<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/loongarch/booting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/loongarch/booting.rst</a></div><div class='hunk'>@@ -0,0 +1,42 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=======================</div><div class='add'>+Booting Linux/LoongArch</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+:Author: Yanteng Si &lt;siyanteng@loongson.cn&gt;</div><div class='add'>+:Date:   18 Nov 2022</div><div class='add'>+</div><div class='add'>+Information passed from BootLoader to kernel</div><div class='add'>+============================================</div><div class='add'>+</div><div class='add'>+LoongArch supports ACPI and FDT. The information that needs to be passed</div><div class='add'>+to the kernel includes the memmap, the initrd, the command line, optionally</div><div class='add'>+the ACPI/FDT tables, and so on.</div><div class='add'>+</div><div class='add'>+The kernel is passed the following arguments on `kernel_entry` :</div><div class='add'>+</div><div class='add'>+      - a0 = efi_boot: `efi_boot` is a flag indicating whether</div><div class='add'>+        this boot environment is fully UEFI-compliant.</div><div class='add'>+</div><div class='add'>+      - a1 = cmdline: `cmdline` is a pointer to the kernel command line.</div><div class='add'>+</div><div class='add'>+      - a2 = systemtable: `systemtable` points to the EFI system table.</div><div class='add'>+        All pointers involved at this stage are in physical addresses.</div><div class='add'>+</div><div class='add'>+Header of Linux/LoongArch kernel images</div><div class='add'>+=======================================</div><div class='add'>+</div><div class='add'>+Linux/LoongArch kernel images are EFI images. Being PE files, they have</div><div class='add'>+a 64-byte header structured like::</div><div class='add'>+</div><div class='add'>+	u32	MZ_MAGIC                /* "MZ", MS-DOS header */</div><div class='add'>+	u32	res0 = 0                /* Reserved */</div><div class='add'>+	u64	kernel_entry            /* Kernel entry point */</div><div class='add'>+	u64	_end - _text            /* Kernel image effective size */</div><div class='add'>+	u64	load_offset             /* Kernel image load offset from start of RAM */</div><div class='add'>+	u64	res1 = 0                /* Reserved */</div><div class='add'>+	u64	res2 = 0                /* Reserved */</div><div class='add'>+	u64	res3 = 0                /* Reserved */</div><div class='add'>+	u32	LINUX_PE_MAGIC          /* Magic number */</div><div class='add'>+	u32	pe_header - _head       /* Offset to the PE header */</div><div class='head'>diff --git a/Documentation/loongarch/features.rst b/Documentation/loongarch/features.rst<br/>new file mode 100644<br/>index 000000000000..ebacade3ea45<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/loongarch/features.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/loongarch/features.rst</a></div><div class='hunk'>@@ -0,0 +1,3 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+.. kernel-feat:: $srctree/Documentation/features loongarch</div><div class='head'>diff --git a/Documentation/loongarch/index.rst b/Documentation/loongarch/index.rst<br/>new file mode 100644<br/>index 000000000000..c779bfa00c05<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/loongarch/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/loongarch/index.rst</a></div><div class='hunk'>@@ -0,0 +1,22 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+======================</div><div class='add'>+LoongArch Architecture</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 2</div><div class='add'>+   :numbered:</div><div class='add'>+</div><div class='add'>+   introduction</div><div class='add'>+   booting</div><div class='add'>+   irq-chip-model</div><div class='add'>+</div><div class='add'>+   features</div><div class='add'>+</div><div class='add'>+.. only::  subproject and html</div><div class='add'>+</div><div class='add'>+   Indices</div><div class='add'>+   =======</div><div class='add'>+</div><div class='add'>+   * :ref:`genindex`</div><div class='head'>diff --git a/Documentation/loongarch/introduction.rst b/Documentation/loongarch/introduction.rst<br/>new file mode 100644<br/>index 000000000000..49135d451ced<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/loongarch/introduction.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/loongarch/introduction.rst</a></div><div class='hunk'>@@ -0,0 +1,390 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=========================</div><div class='add'>+Introduction to LoongArch</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are</div><div class='add'>+currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit</div><div class='add'>+version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels</div><div class='add'>+(PLVs) defined in LoongArch: PLV0~PLV3, from high to low. Kernel runs at PLV0</div><div class='add'>+while applications run at PLV3. This document introduces the registers, basic</div><div class='add'>+instruction set, virtual memory and some other topics of LoongArch.</div><div class='add'>+</div><div class='add'>+Registers</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+LoongArch registers include general purpose registers (GPRs), floating point</div><div class='add'>+registers (FPRs), vector registers (VRs) and control status registers (CSRs)</div><div class='add'>+used in privileged mode (PLV0).</div><div class='add'>+</div><div class='add'>+GPRs</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32</div><div class='add'>+and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers</div><div class='add'>+are not architecturally special. (Except ``$r1``, which is hard-wired as the</div><div class='add'>+link register of the BL instruction.)</div><div class='add'>+</div><div class='add'>+The kernel uses a variant of the LoongArch register convention, as described in</div><div class='add'>+the LoongArch ELF psABI spec, in :ref:`References &lt;loongarch-references&gt;`:</div><div class='add'>+</div><div class='add'>+================= =============== =================== ============</div><div class='add'>+Name              Alias           Usage               Preserved</div><div class='add'>+                                                      across calls</div><div class='add'>+================= =============== =================== ============</div><div class='add'>+``$r0``           ``$zero``       Constant zero       Unused</div><div class='add'>+``$r1``           ``$ra``         Return address      No</div><div class='add'>+``$r2``           ``$tp``         TLS/Thread pointer  Unused</div><div class='add'>+``$r3``           ``$sp``         Stack pointer       Yes</div><div class='add'>+``$r4``-``$r11``  ``$a0``-``$a7`` Argument registers  No</div><div class='add'>+``$r4``-``$r5``   ``$v0``-``$v1`` Return value        No</div><div class='add'>+``$r12``-``$r20`` ``$t0``-``$t8`` Temp registers      No</div><div class='add'>+``$r21``          ``$u0``         Percpu base address Unused</div><div class='add'>+``$r22``          ``$fp``         Frame pointer       Yes</div><div class='add'>+``$r23``-``$r31`` ``$s0``-``$s8`` Static registers    Yes</div><div class='add'>+================= =============== =================== ============</div><div class='add'>+</div><div class='add'>+.. Note::</div><div class='add'>+    The register ``$r21`` is reserved in the ELF psABI, but used by the Linux</div><div class='add'>+    kernel for storing the percpu base address. It normally has no ABI name,</div><div class='add'>+    but is called ``$u0`` in the kernel. You may also see ``$v0`` or ``$v1``</div><div class='add'>+    in some old code,however they are deprecated aliases of ``$a0`` and ``$a1``</div><div class='add'>+    respectively.</div><div class='add'>+</div><div class='add'>+FPRs</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+LoongArch has 32 FPRs ( ``$f0`` ~ ``$f31`` ) when FPU is present. Each one is</div><div class='add'>+64-bit wide on the LA64 cores.</div><div class='add'>+</div><div class='add'>+The floating-point register convention is the same as described in the</div><div class='add'>+LoongArch ELF psABI spec:</div><div class='add'>+</div><div class='add'>+================= ================== =================== ============</div><div class='add'>+Name              Alias              Usage               Preserved</div><div class='add'>+                                                         across calls</div><div class='add'>+================= ================== =================== ============</div><div class='add'>+``$f0``-``$f7``   ``$fa0``-``$fa7``  Argument registers  No</div><div class='add'>+``$f0``-``$f1``   ``$fv0``-``$fv1``  Return value        No</div><div class='add'>+``$f8``-``$f23``  ``$ft0``-``$ft15`` Temp registers      No</div><div class='add'>+``$f24``-``$f31`` ``$fs0``-``$fs7``  Static registers    Yes</div><div class='add'>+================= ================== =================== ============</div><div class='add'>+</div><div class='add'>+.. Note::</div><div class='add'>+    You may see ``$fv0`` or ``$fv1`` in some old code, however they are</div><div class='add'>+    deprecated aliases of ``$fa0`` and ``$fa1`` respectively.</div><div class='add'>+</div><div class='add'>+VRs</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+There are currently 2 vector extensions to LoongArch:</div><div class='add'>+</div><div class='add'>+- LSX (Loongson SIMD eXtension) with 128-bit vectors,</div><div class='add'>+- LASX (Loongson Advanced SIMD eXtension) with 256-bit vectors.</div><div class='add'>+</div><div class='add'>+LSX brings ``$v0`` ~ ``$v31`` while LASX brings ``$x0`` ~ ``$x31`` as the vector</div><div class='add'>+registers.</div><div class='add'>+</div><div class='add'>+The VRs overlap with FPRs: for example, on a core implementing LSX and LASX,</div><div class='add'>+the lower 128 bits of ``$x0`` is shared with ``$v0``, and the lower 64 bits of</div><div class='add'>+``$v0`` is shared with ``$f0``; same with all other VRs.</div><div class='add'>+</div><div class='add'>+CSRs</div><div class='add'>+----</div><div class='add'>+</div><div class='add'>+CSRs can only be accessed from privileged mode (PLV0):</div><div class='add'>+</div><div class='add'>+================= ===================================== ==============</div><div class='add'>+Address           Full Name                             Abbrev Name</div><div class='add'>+================= ===================================== ==============</div><div class='add'>+0x0               Current Mode Information              CRMD</div><div class='add'>+0x1               Pre-exception Mode Information        PRMD</div><div class='add'>+0x2               Extension Unit Enable                 EUEN</div><div class='add'>+0x3               Miscellaneous Control                 MISC</div><div class='add'>+0x4               Exception Configuration               ECFG</div><div class='add'>+0x5               Exception Status                      ESTAT</div><div class='add'>+0x6               Exception Return Address              ERA</div><div class='add'>+0x7               Bad (Faulting) Virtual Address        BADV</div><div class='add'>+0x8               Bad (Faulting) Instruction Word       BADI</div><div class='add'>+0xC               Exception Entrypoint Address          EENTRY</div><div class='add'>+0x10              TLB Index                             TLBIDX</div><div class='add'>+0x11              TLB Entry High-order Bits             TLBEHI</div><div class='add'>+0x12              TLB Entry Low-order Bits 0            TLBELO0</div><div class='add'>+0x13              TLB Entry Low-order Bits 1            TLBELO1</div><div class='add'>+0x18              Address Space Identifier              ASID</div><div class='add'>+0x19              Page Global Directory Address for     PGDL</div><div class='add'>+                  Lower-half Address Space</div><div class='add'>+0x1A              Page Global Directory Address for     PGDH</div><div class='add'>+                  Higher-half Address Space</div><div class='add'>+0x1B              Page Global Directory Address         PGD</div><div class='add'>+0x1C              Page Walk Control for Lower-          PWCL</div><div class='add'>+                  half Address Space</div><div class='add'>+0x1D              Page Walk Control for Higher-         PWCH</div><div class='add'>+                  half Address Space</div><div class='add'>+0x1E              STLB Page Size                        STLBPS</div><div class='add'>+0x1F              Reduced Virtual Address Configuration RVACFG</div><div class='add'>+0x20              CPU Identifier                        CPUID</div><div class='add'>+0x21              Privileged Resource Configuration 1   PRCFG1</div><div class='add'>+0x22              Privileged Resource Configuration 2   PRCFG2</div><div class='add'>+0x23              Privileged Resource Configuration 3   PRCFG3</div><div class='add'>+0x30+n (0≤n≤15)   Saved Data register                   SAVEn</div><div class='add'>+0x40              Timer Identifier                      TID</div><div class='add'>+0x41              Timer Configuration                   TCFG</div><div class='add'>+0x42              Timer Value                           TVAL</div><div class='add'>+0x43              Compensation of Timer Count           CNTC</div><div class='add'>+0x44              Timer Interrupt Clearing              TICLR</div><div class='add'>+0x60              LLBit Control                         LLBCTL</div><div class='add'>+0x80              Implementation-specific Control 1     IMPCTL1</div><div class='add'>+0x81              Implementation-specific Control 2     IMPCTL2</div><div class='add'>+0x88              TLB Refill Exception Entrypoint       TLBRENTRY</div><div class='add'>+                  Address</div><div class='add'>+0x89              TLB Refill Exception BAD (Faulting)   TLBRBADV</div><div class='add'>+                  Virtual Address</div><div class='add'>+0x8A              TLB Refill Exception Return Address   TLBRERA</div><div class='add'>+0x8B              TLB Refill Exception Saved Data       TLBRSAVE</div><div class='add'>+                  Register</div><div class='add'>+0x8C              TLB Refill Exception Entry Low-order  TLBRELO0</div><div class='add'>+                  Bits 0</div><div class='add'>+0x8D              TLB Refill Exception Entry Low-order  TLBRELO1</div><div class='add'>+                  Bits 1</div><div class='add'>+0x8E              TLB Refill Exception Entry High-order TLBEHI</div><div class='add'>+                  Bits</div><div class='add'>+0x8F              TLB Refill Exception Pre-exception    TLBRPRMD</div><div class='add'>+                  Mode Information</div><div class='add'>+0x90              Machine Error Control                 MERRCTL</div><div class='add'>+0x91              Machine Error Information 1           MERRINFO1</div><div class='add'>+0x92              Machine Error Information 2           MERRINFO2</div><div class='add'>+0x93              Machine Error Exception Entrypoint    MERRENTRY</div><div class='add'>+                  Address</div><div class='add'>+0x94              Machine Error Exception Return        MERRERA</div><div class='add'>+                  Address</div><div class='add'>+0x95              Machine Error Exception Saved Data    MERRSAVE</div><div class='add'>+                  Register</div><div class='add'>+0x98              Cache TAGs                            CTAG</div><div class='add'>+0x180+n (0≤n≤3)   Direct Mapping Configuration Window n DMWn</div><div class='add'>+0x200+2n (0≤n≤31) Performance Monitor Configuration n   PMCFGn</div><div class='add'>+0x201+2n (0≤n≤31) Performance Monitor Overall Counter n PMCNTn</div><div class='add'>+0x300             Memory Load/Store WatchPoint          MWPC</div><div class='add'>+                  Overall Control</div><div class='add'>+0x301             Memory Load/Store WatchPoint          MWPS</div><div class='add'>+                  Overall Status</div><div class='add'>+0x310+8n (0≤n≤7)  Memory Load/Store WatchPoint n        MWPnCFG1</div><div class='add'>+                  Configuration 1</div><div class='add'>+0x311+8n (0≤n≤7)  Memory Load/Store WatchPoint n        MWPnCFG2</div><div class='add'>+                  Configuration 2</div><div class='add'>+0x312+8n (0≤n≤7)  Memory Load/Store WatchPoint n        MWPnCFG3</div><div class='add'>+                  Configuration 3</div><div class='add'>+0x313+8n (0≤n≤7)  Memory Load/Store WatchPoint n        MWPnCFG4</div><div class='add'>+                  Configuration 4</div><div class='add'>+0x380             Instruction Fetch WatchPoint          FWPC</div><div class='add'>+                  Overall Control</div><div class='add'>+0x381             Instruction Fetch WatchPoint          FWPS</div><div class='add'>+                  Overall Status</div><div class='add'>+0x390+8n (0≤n≤7)  Instruction Fetch WatchPoint n        FWPnCFG1</div><div class='add'>+                  Configuration 1</div><div class='add'>+0x391+8n (0≤n≤7)  Instruction Fetch WatchPoint n        FWPnCFG2</div><div class='add'>+                  Configuration 2</div><div class='add'>+0x392+8n (0≤n≤7)  Instruction Fetch WatchPoint n        FWPnCFG3</div><div class='add'>+                  Configuration 3</div><div class='add'>+0x393+8n (0≤n≤7)  Instruction Fetch WatchPoint n        FWPnCFG4</div><div class='add'>+                  Configuration 4</div><div class='add'>+0x500             Debug Register                        DBG</div><div class='add'>+0x501             Debug Exception Return Address        DERA</div><div class='add'>+0x502             Debug Exception Saved Data Register   DSAVE</div><div class='add'>+================= ===================================== ==============</div><div class='add'>+</div><div class='add'>+ERA, TLBRERA, MERRERA and DERA are sometimes also known as EPC, TLBREPC, MERREPC</div><div class='add'>+and DEPC respectively.</div><div class='add'>+</div><div class='add'>+Basic Instruction Set</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Instruction formats</div><div class='add'>+-------------------</div><div class='add'>+</div><div class='add'>+LoongArch instructions are 32 bits wide, belonging to 9 basic instruction</div><div class='add'>+formats (and variants of them):</div><div class='add'>+</div><div class='add'>+=========== ==========================</div><div class='add'>+Format name Composition</div><div class='add'>+=========== ==========================</div><div class='add'>+2R          Opcode + Rj + Rd</div><div class='add'>+3R          Opcode + Rk + Rj + Rd</div><div class='add'>+4R          Opcode + Ra + Rk + Rj + Rd</div><div class='add'>+2RI8        Opcode + I8 + Rj + Rd</div><div class='add'>+2RI12       Opcode + I12 + Rj + Rd</div><div class='add'>+2RI14       Opcode + I14 + Rj + Rd</div><div class='add'>+2RI16       Opcode + I16 + Rj + Rd</div><div class='add'>+1RI21       Opcode + I21L + Rj + I21H</div><div class='add'>+I26         Opcode + I26L + I26H</div><div class='add'>+=========== ==========================</div><div class='add'>+</div><div class='add'>+Rd is the destination register operand, while Rj, Rk and Ra ("a" stands for</div><div class='add'>+"additional") are the source register operands. I8/I12/I14/I16/I21/I26 are</div><div class='add'>+immediate operands of respective width. The longer I21 and I26 are stored</div><div class='add'>+in separate higher and lower parts in the instruction word, denoted by the "L"</div><div class='add'>+and "H" suffixes.</div><div class='add'>+</div><div class='add'>+List of Instructions</div><div class='add'>+--------------------</div><div class='add'>+</div><div class='add'>+For brevity, only instruction names (mnemonics) are listed here; please see the</div><div class='add'>+:ref:`References &lt;loongarch-references&gt;` for details.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+1. Arithmetic Instructions::</div><div class='add'>+</div><div class='add'>+    ADD.W SUB.W ADDI.W ADD.D SUB.D ADDI.D</div><div class='add'>+    SLT SLTU SLTI SLTUI</div><div class='add'>+    AND OR NOR XOR ANDN ORN ANDI ORI XORI</div><div class='add'>+    MUL.W MULH.W MULH.WU DIV.W DIV.WU MOD.W MOD.WU</div><div class='add'>+    MUL.D MULH.D MULH.DU DIV.D DIV.DU MOD.D MOD.DU</div><div class='add'>+    PCADDI PCADDU12I PCADDU18I</div><div class='add'>+    LU12I.W LU32I.D LU52I.D ADDU16I.D</div><div class='add'>+</div><div class='add'>+2. Bit-shift Instructions::</div><div class='add'>+</div><div class='add'>+    SLL.W SRL.W SRA.W ROTR.W SLLI.W SRLI.W SRAI.W ROTRI.W</div><div class='add'>+    SLL.D SRL.D SRA.D ROTR.D SLLI.D SRLI.D SRAI.D ROTRI.D</div><div class='add'>+</div><div class='add'>+3. Bit-manipulation Instructions::</div><div class='add'>+</div><div class='add'>+    EXT.W.B EXT.W.H CLO.W CLO.D SLZ.W CLZ.D CTO.W CTO.D CTZ.W CTZ.D</div><div class='add'>+    BYTEPICK.W BYTEPICK.D BSTRINS.W BSTRINS.D BSTRPICK.W BSTRPICK.D</div><div class='add'>+    REVB.2H REVB.4H REVB.2W REVB.D REVH.2W REVH.D BITREV.4B BITREV.8B BITREV.W BITREV.D</div><div class='add'>+    MASKEQZ MASKNEZ</div><div class='add'>+</div><div class='add'>+4. Branch Instructions::</div><div class='add'>+</div><div class='add'>+    BEQ BNE BLT BGE BLTU BGEU BEQZ BNEZ B BL JIRL</div><div class='add'>+</div><div class='add'>+5. Load/Store Instructions::</div><div class='add'>+</div><div class='add'>+    LD.B LD.BU LD.H LD.HU LD.W LD.WU LD.D ST.B ST.H ST.W ST.D</div><div class='add'>+    LDX.B LDX.BU LDX.H LDX.HU LDX.W LDX.WU LDX.D STX.B STX.H STX.W STX.D</div><div class='add'>+    LDPTR.W LDPTR.D STPTR.W STPTR.D</div><div class='add'>+    PRELD PRELDX</div><div class='add'>+</div><div class='add'>+6. Atomic Operation Instructions::</div><div class='add'>+</div><div class='add'>+    LL.W SC.W LL.D SC.D</div><div class='add'>+    AMSWAP.W AMSWAP.D AMADD.W AMADD.D AMAND.W AMAND.D AMOR.W AMOR.D AMXOR.W AMXOR.D</div><div class='add'>+    AMMAX.W AMMAX.D AMMIN.W AMMIN.D</div><div class='add'>+</div><div class='add'>+7. Barrier Instructions::</div><div class='add'>+</div><div class='add'>+    IBAR DBAR</div><div class='add'>+</div><div class='add'>+8. Special Instructions::</div><div class='add'>+</div><div class='add'>+    SYSCALL BREAK CPUCFG NOP IDLE ERTN(ERET) DBCL(DBGCALL) RDTIMEL.W RDTIMEH.W RDTIME.D</div><div class='add'>+    ASRTLE.D ASRTGT.D</div><div class='add'>+</div><div class='add'>+9. Privileged Instructions::</div><div class='add'>+</div><div class='add'>+    CSRRD CSRWR CSRXCHG</div><div class='add'>+    IOCSRRD.B IOCSRRD.H IOCSRRD.W IOCSRRD.D IOCSRWR.B IOCSRWR.H IOCSRWR.W IOCSRWR.D</div><div class='add'>+    CACOP TLBP(TLBSRCH) TLBRD TLBWR TLBFILL TLBCLR TLBFLUSH INVTLB LDDIR LDPTE</div><div class='add'>+</div><div class='add'>+Virtual Memory</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+LoongArch supports direct-mapped virtual memory and page-mapped virtual memory.</div><div class='add'>+</div><div class='add'>+Direct-mapped virtual memory is configured by CSR.DMWn (n=0~3), it has a simple</div><div class='add'>+relationship between virtual address (VA) and physical address (PA)::</div><div class='add'>+</div><div class='add'>+ VA = PA + FixedOffset</div><div class='add'>+</div><div class='add'>+Page-mapped virtual memory has arbitrary relationship between VA and PA, which</div><div class='add'>+is recorded in TLB and page tables. LoongArch's TLB includes a fully-associative</div><div class='add'>+MTLB (Multiple Page Size TLB) and set-associative STLB (Single Page Size TLB).</div><div class='add'>+</div><div class='add'>+By default, the whole virtual address space of LA32 is configured like this:</div><div class='add'>+</div><div class='add'>+============ =========================== =============================</div><div class='add'>+Name         Address Range               Attributes</div><div class='add'>+============ =========================== =============================</div><div class='add'>+``UVRANGE``  ``0x00000000 - 0x7FFFFFFF`` Page-mapped, Cached, PLV0~3</div><div class='add'>+``KPRANGE0`` ``0x80000000 - 0x9FFFFFFF`` Direct-mapped, Uncached, PLV0</div><div class='add'>+``KPRANGE1`` ``0xA0000000 - 0xBFFFFFFF`` Direct-mapped, Cached, PLV0</div><div class='add'>+``KVRANGE``  ``0xC0000000 - 0xFFFFFFFF`` Page-mapped, Cached, PLV0</div><div class='add'>+============ =========================== =============================</div><div class='add'>+</div><div class='add'>+User mode (PLV3) can only access UVRANGE. For direct-mapped KPRANGE0 and</div><div class='add'>+KPRANGE1, PA is equal to VA with bit30~31 cleared. For example, the uncached</div><div class='add'>+direct-mapped VA of 0x00001000 is 0x80001000, and the cached direct-mapped</div><div class='add'>+VA of 0x00001000 is 0xA0001000.</div><div class='add'>+</div><div class='add'>+By default, the whole virtual address space of LA64 is configured like this:</div><div class='add'>+</div><div class='add'>+============ ====================== ======================================</div><div class='add'>+Name         Address Range          Attributes</div><div class='add'>+============ ====================== ======================================</div><div class='add'>+``XUVRANGE`` ``0x0000000000000000 - Page-mapped, Cached, PLV0~3</div><div class='add'>+             0x3FFFFFFFFFFFFFFF``</div><div class='add'>+``XSPRANGE`` ``0x4000000000000000 - Direct-mapped, Cached / Uncached, PLV0</div><div class='add'>+             0x7FFFFFFFFFFFFFFF``</div><div class='add'>+``XKPRANGE`` ``0x8000000000000000 - Direct-mapped, Cached / Uncached, PLV0</div><div class='add'>+             0xBFFFFFFFFFFFFFFF``</div><div class='add'>+``XKVRANGE`` ``0xC000000000000000 - Page-mapped, Cached, PLV0</div><div class='add'>+             0xFFFFFFFFFFFFFFFF``</div><div class='add'>+============ ====================== ======================================</div><div class='add'>+</div><div class='add'>+User mode (PLV3) can only access XUVRANGE. For direct-mapped XSPRANGE and</div><div class='add'>+XKPRANGE, PA is equal to VA with bits 60~63 cleared, and the cache attribute</div><div class='add'>+is configured by bits 60~61 in VA: 0 is for strongly-ordered uncached, 1 is</div><div class='add'>+for coherent cached, and 2 is for weakly-ordered uncached.</div><div class='add'>+</div><div class='add'>+Currently we only use XKPRANGE for direct mapping and XSPRANGE is reserved.</div><div class='add'>+</div><div class='add'>+To put this in action: the strongly-ordered uncached direct-mapped VA (in</div><div class='add'>+XKPRANGE) of 0x00000000_00001000 is 0x80000000_00001000, the coherent cached</div><div class='add'>+direct-mapped VA (in XKPRANGE) of 0x00000000_00001000 is 0x90000000_00001000,</div><div class='add'>+and the weakly-ordered uncached direct-mapped VA (in XKPRANGE) of 0x00000000</div><div class='add'>+_00001000 is 0xA0000000_00001000.</div><div class='add'>+</div><div class='add'>+Relationship of Loongson and LoongArch</div><div class='add'>+======================================</div><div class='add'>+</div><div class='add'>+LoongArch is a RISC ISA which is different from any other existing ones, while</div><div class='add'>+Loongson is a family of processors. Loongson includes 3 series: Loongson-1 is</div><div class='add'>+the 32-bit processor series, Loongson-2 is the low-end 64-bit processor series,</div><div class='add'>+and Loongson-3 is the high-end 64-bit processor series. Old Loongson is based on</div><div class='add'>+MIPS, while New Loongson is based on LoongArch. Take Loongson-3 as an example:</div><div class='add'>+Loongson-3A1000/3B1500/3A2000/3A3000/3A4000 are MIPS-compatible, while Loongson-</div><div class='add'>+3A5000 (and future revisions) are all based on LoongArch.</div><div class='add'>+</div><div class='add'>+.. _loongarch-references:</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+Official web site of Loongson Technology Corp. Ltd.:</div><div class='add'>+</div><div class='add'>+  http://www.loongson.cn/</div><div class='add'>+</div><div class='add'>+Developer web site of Loongson and LoongArch (Software and Documentation):</div><div class='add'>+</div><div class='add'>+  http://www.loongnix.cn/</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/</div><div class='add'>+</div><div class='add'>+  https://loongson.github.io/LoongArch-Documentation/</div><div class='add'>+</div><div class='add'>+Documentation of LoongArch ISA:</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.02-CN.pdf (in Chinese)</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.02-EN.pdf (in English)</div><div class='add'>+</div><div class='add'>+Documentation of LoongArch ELF psABI:</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-CN.pdf (in Chinese)</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-EN.pdf (in English)</div><div class='add'>+</div><div class='add'>+Linux kernel repository of Loongson and LoongArch:</div><div class='add'>+</div><div class='add'>+  https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson.git</div><div class='head'>diff --git a/Documentation/loongarch/irq-chip-model.rst b/Documentation/loongarch/irq-chip-model.rst<br/>new file mode 100644<br/>index 000000000000..7988f4192363<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/loongarch/irq-chip-model.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/loongarch/irq-chip-model.rst</a></div><div class='hunk'>@@ -0,0 +1,160 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=======================================</div><div class='add'>+IRQ chip model (hierarchy) of LoongArch</div><div class='add'>+=======================================</div><div class='add'>+</div><div class='add'>+Currently, LoongArch based processors (e.g. Loongson-3A5000) can only work together</div><div class='add'>+with LS7A chipsets. The irq chips in LoongArch computers include CPUINTC (CPU Core</div><div class='add'>+Interrupt Controller), LIOINTC (Legacy I/O Interrupt Controller), EIOINTC (Extended</div><div class='add'>+I/O Interrupt Controller), HTVECINTC (Hyper-Transport Vector Interrupt Controller),</div><div class='add'>+PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller</div><div class='add'>+in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).</div><div class='add'>+</div><div class='add'>+CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package</div><div class='add'>+controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e.,</div><div class='add'>+in chipsets). These controllers (in other words, irqchips) are linked in a hierarchy,</div><div class='add'>+and there are two models of hierarchy (legacy model and extended model).</div><div class='add'>+</div><div class='add'>+Legacy IRQ model</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go</div><div class='add'>+to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices</div><div class='add'>+interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go</div><div class='add'>+to LIOINTC, and then CPUINTC::</div><div class='add'>+</div><div class='add'>+     +-----+     +---------+     +-------+</div><div class='add'>+     | IPI | --&gt; | CPUINTC | &lt;-- | Timer |</div><div class='add'>+     +-----+     +---------+     +-------+</div><div class='add'>+                      ^</div><div class='add'>+                      |</div><div class='add'>+                 +---------+     +-------+</div><div class='add'>+                 | LIOINTC | &lt;-- | UARTs |</div><div class='add'>+                 +---------+     +-------+</div><div class='add'>+                      ^</div><div class='add'>+                      |</div><div class='add'>+                +-----------+</div><div class='add'>+                | HTVECINTC |</div><div class='add'>+                +-----------+</div><div class='add'>+                 ^         ^</div><div class='add'>+                 |         |</div><div class='add'>+           +---------+ +---------+</div><div class='add'>+           | PCH-PIC | | PCH-MSI |</div><div class='add'>+           +---------+ +---------+</div><div class='add'>+             ^     ^           ^</div><div class='add'>+             |     |           |</div><div class='add'>+     +---------+ +---------+ +---------+</div><div class='add'>+     | PCH-LPC | | Devices | | Devices |</div><div class='add'>+     +---------+ +---------+ +---------+</div><div class='add'>+          ^</div><div class='add'>+          |</div><div class='add'>+     +---------+</div><div class='add'>+     | Devices |</div><div class='add'>+     +---------+</div><div class='add'>+</div><div class='add'>+Extended IRQ model</div><div class='add'>+==================</div><div class='add'>+</div><div class='add'>+In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go</div><div class='add'>+to CPUINTC directly, CPU UARTS interrupts go to LIOINTC, while all other devices</div><div class='add'>+interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by EIOINTC, and then go to</div><div class='add'>+to CPUINTC directly::</div><div class='add'>+</div><div class='add'>+          +-----+     +---------+     +-------+</div><div class='add'>+          | IPI | --&gt; | CPUINTC | &lt;-- | Timer |</div><div class='add'>+          +-----+     +---------+     +-------+</div><div class='add'>+                       ^       ^</div><div class='add'>+                       |       |</div><div class='add'>+                +---------+ +---------+     +-------+</div><div class='add'>+                | EIOINTC | | LIOINTC | &lt;-- | UARTs |</div><div class='add'>+                +---------+ +---------+     +-------+</div><div class='add'>+                 ^       ^</div><div class='add'>+                 |       |</div><div class='add'>+          +---------+ +---------+</div><div class='add'>+          | PCH-PIC | | PCH-MSI |</div><div class='add'>+          +---------+ +---------+</div><div class='add'>+            ^     ^           ^</div><div class='add'>+            |     |           |</div><div class='add'>+    +---------+ +---------+ +---------+</div><div class='add'>+    | PCH-LPC | | Devices | | Devices |</div><div class='add'>+    +---------+ +---------+ +---------+</div><div class='add'>+         ^</div><div class='add'>+         |</div><div class='add'>+    +---------+</div><div class='add'>+    | Devices |</div><div class='add'>+    +---------+</div><div class='add'>+</div><div class='add'>+ACPI-related definitions</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+CPUINTC::</div><div class='add'>+</div><div class='add'>+  ACPI_MADT_TYPE_CORE_PIC;</div><div class='add'>+  struct acpi_madt_core_pic;</div><div class='add'>+  enum acpi_madt_core_pic_version;</div><div class='add'>+</div><div class='add'>+LIOINTC::</div><div class='add'>+</div><div class='add'>+  ACPI_MADT_TYPE_LIO_PIC;</div><div class='add'>+  struct acpi_madt_lio_pic;</div><div class='add'>+  enum acpi_madt_lio_pic_version;</div><div class='add'>+</div><div class='add'>+EIOINTC::</div><div class='add'>+</div><div class='add'>+  ACPI_MADT_TYPE_EIO_PIC;</div><div class='add'>+  struct acpi_madt_eio_pic;</div><div class='add'>+  enum acpi_madt_eio_pic_version;</div><div class='add'>+</div><div class='add'>+HTVECINTC::</div><div class='add'>+</div><div class='add'>+  ACPI_MADT_TYPE_HT_PIC;</div><div class='add'>+  struct acpi_madt_ht_pic;</div><div class='add'>+  enum acpi_madt_ht_pic_version;</div><div class='add'>+</div><div class='add'>+PCH-PIC::</div><div class='add'>+</div><div class='add'>+  ACPI_MADT_TYPE_BIO_PIC;</div><div class='add'>+  struct acpi_madt_bio_pic;</div><div class='add'>+  enum acpi_madt_bio_pic_version;</div><div class='add'>+</div><div class='add'>+PCH-MSI::</div><div class='add'>+</div><div class='add'>+  ACPI_MADT_TYPE_MSI_PIC;</div><div class='add'>+  struct acpi_madt_msi_pic;</div><div class='add'>+  enum acpi_madt_msi_pic_version;</div><div class='add'>+</div><div class='add'>+PCH-LPC::</div><div class='add'>+</div><div class='add'>+  ACPI_MADT_TYPE_LPC_PIC;</div><div class='add'>+  struct acpi_madt_lpc_pic;</div><div class='add'>+  enum acpi_madt_lpc_pic_version;</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+Documentation of Loongson-3A5000:</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-3A5000-usermanual-1.02-CN.pdf (in Chinese)</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-3A5000-usermanual-1.02-EN.pdf (in English)</div><div class='add'>+</div><div class='add'>+Documentation of Loongson's LS7A chipset:</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-CN.pdf (in Chinese)</div><div class='add'>+</div><div class='add'>+  https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-EN.pdf (in English)</div><div class='add'>+</div><div class='add'>+.. Note::</div><div class='add'>+    - CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described</div><div class='add'>+      in Section 7.4 of "LoongArch Reference Manual, Vol 1";</div><div class='add'>+    - LIOINTC is "Legacy I/OInterrupts" described in Section 11.1 of</div><div class='add'>+      "Loongson 3A5000 Processor Reference Manual";</div><div class='add'>+    - EIOINTC is "Extended I/O Interrupts" described in Section 11.2 of</div><div class='add'>+      "Loongson 3A5000 Processor Reference Manual";</div><div class='add'>+    - HTVECINTC is "HyperTransport Interrupts" described in Section 14.3 of</div><div class='add'>+      "Loongson 3A5000 Processor Reference Manual";</div><div class='add'>+    - PCH-PIC/PCH-MSI is "Interrupt Controller" described in Section 5 of</div><div class='add'>+      "Loongson 7A1000 Bridge User Manual";</div><div class='add'>+    - PCH-LPC is "LPC Interrupts" described in Section 24.3 of</div><div class='add'>+      "Loongson 7A1000 Bridge User Manual".</div><div class='head'>diff --git a/Documentation/maintainer/maintainer-entry-profile.rst b/Documentation/maintainer/maintainer-entry-profile.rst<br/>index 93b2ae6c34a9..cfd37f31077f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/maintainer/maintainer-entry-profile.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/maintainer/maintainer-entry-profile.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/maintainer/maintainer-entry-profile.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/maintainer/maintainer-entry-profile.rst</a></div><div class='hunk'>@@ -104,3 +104,4 @@ to do something different in the near future.</div><div class='ctx'>    ../riscv/patch-acceptance</div><div class='ctx'>    ../driver-api/media/maintainer-entry-profile</div><div class='ctx'>    ../driver-api/vfio-pci-device-specific-driver-acceptance</div><div class='add'>+   ../nvme/feature-and-quirk-policy</div><div class='head'>diff --git a/Documentation/maintainer/rebasing-and-merging.rst b/Documentation/maintainer/rebasing-and-merging.rst<br/>index 09f988e7fa71..85800ce95ae5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/maintainer/rebasing-and-merging.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/maintainer/rebasing-and-merging.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/maintainer/rebasing-and-merging.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/maintainer/rebasing-and-merging.rst</a></div><div class='hunk'>@@ -213,11 +213,7 @@ point rather than some random spot.  If your upstream-bound branch has</div><div class='ctx'> emptied entirely into the mainline during the merge window, you can pull it</div><div class='ctx'> forward with a command like::</div><div class='ctx'> </div><div class='del'>-  git merge v5.2-rc1^0</div><div class='del'>-</div><div class='del'>-The "^0" will cause Git to do a fast-forward merge (which should be</div><div class='del'>-possible in this situation), thus avoiding the addition of a spurious merge</div><div class='del'>-commit.</div><div class='add'>+  git merge --ff-only v5.2-rc1</div><div class='ctx'> </div><div class='ctx'> The guidelines laid out above are just that: guidelines.  There will always</div><div class='ctx'> be situations that call out for a different solution, and these guidelines</div><div class='head'>diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt<br/>index b12df9137e1c..06e14efd8662 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/memory-barriers.txt?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/memory-barriers.txt</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/memory-barriers.txt?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/memory-barriers.txt</a></div><div class='hunk'>@@ -52,7 +52,7 @@ CONTENTS</div><div class='ctx'> </div><div class='ctx'>      - Varieties of memory barrier.</div><div class='ctx'>      - What may not be assumed about memory barriers?</div><div class='del'>-     - Data dependency barriers (historical).</div><div class='add'>+     - Address-dependency barriers (historical).</div><div class='ctx'>      - Control dependencies.</div><div class='ctx'>      - SMP barrier pairing.</div><div class='ctx'>      - Examples of memory barrier sequences.</div><div class='hunk'>@@ -187,9 +187,9 @@ As a further example, consider this sequence of events:</div><div class='ctx'> 	B = 4;		Q = P;</div><div class='ctx'> 	P = &amp;B;		D = *Q;</div><div class='ctx'> </div><div class='del'>-There is an obvious data dependency here, as the value loaded into D depends on</div><div class='del'>-the address retrieved from P by CPU 2.  At the end of the sequence, any of the</div><div class='del'>-following results are possible:</div><div class='add'>+There is an obvious address dependency here, as the value loaded into D depends</div><div class='add'>+on the address retrieved from P by CPU 2.  At the end of the sequence, any of</div><div class='add'>+the following results are possible:</div><div class='ctx'> </div><div class='ctx'> 	(Q == &amp;A) and (D == 1)</div><div class='ctx'> 	(Q == &amp;B) and (D == 2)</div><div class='hunk'>@@ -391,58 +391,62 @@ Memory barriers come in four basic varieties:</div><div class='ctx'>      memory system as time progresses.  All stores _before_ a write barrier</div><div class='ctx'>      will occur _before_ all the stores after the write barrier.</div><div class='ctx'> </div><div class='del'>-     [!] Note that write barriers should normally be paired with read or data</div><div class='del'>-     dependency barriers; see the "SMP barrier pairing" subsection.</div><div class='add'>+     [!] Note that write barriers should normally be paired with read or</div><div class='add'>+     address-dependency barriers; see the "SMP barrier pairing" subsection.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>- (2) Data dependency barriers.</div><div class='add'>+ (2) Address-dependency barriers (historical).</div><div class='ctx'> </div><div class='del'>-     A data dependency barrier is a weaker form of read barrier.  In the case</div><div class='del'>-     where two loads are performed such that the second depends on the result</div><div class='del'>-     of the first (eg: the first load retrieves the address to which the second</div><div class='del'>-     load will be directed), a data dependency barrier would be required to</div><div class='del'>-     make sure that the target of the second load is updated after the address</div><div class='del'>-     obtained by the first load is accessed.</div><div class='add'>+     An address-dependency barrier is a weaker form of read barrier.  In the</div><div class='add'>+     case where two loads are performed such that the second depends on the</div><div class='add'>+     result of the first (eg: the first load retrieves the address to which</div><div class='add'>+     the second load will be directed), an address-dependency barrier would</div><div class='add'>+     be required to make sure that the target of the second load is updated</div><div class='add'>+     after the address obtained by the first load is accessed.</div><div class='ctx'> </div><div class='del'>-     A data dependency barrier is a partial ordering on interdependent loads</div><div class='del'>-     only; it is not required to have any effect on stores, independent loads</div><div class='del'>-     or overlapping loads.</div><div class='add'>+     An address-dependency barrier is a partial ordering on interdependent</div><div class='add'>+     loads only; it is not required to have any effect on stores, independent</div><div class='add'>+     loads or overlapping loads.</div><div class='ctx'> </div><div class='ctx'>      As mentioned in (1), the other CPUs in the system can be viewed as</div><div class='ctx'>      committing sequences of stores to the memory system that the CPU being</div><div class='del'>-     considered can then perceive.  A data dependency barrier issued by the CPU</div><div class='del'>-     under consideration guarantees that for any load preceding it, if that</div><div class='del'>-     load touches one of a sequence of stores from another CPU, then by the</div><div class='del'>-     time the barrier completes, the effects of all the stores prior to that</div><div class='del'>-     touched by the load will be perceptible to any loads issued after the data</div><div class='del'>-     dependency barrier.</div><div class='add'>+     considered can then perceive.  An address-dependency barrier issued by</div><div class='add'>+     the CPU under consideration guarantees that for any load preceding it,</div><div class='add'>+     if that load touches one of a sequence of stores from another CPU, then</div><div class='add'>+     by the time the barrier completes, the effects of all the stores prior to</div><div class='add'>+     that touched by the load will be perceptible to any loads issued after</div><div class='add'>+     the address-dependency barrier.</div><div class='ctx'> </div><div class='ctx'>      See the "Examples of memory barrier sequences" subsection for diagrams</div><div class='ctx'>      showing the ordering constraints.</div><div class='ctx'> </div><div class='del'>-     [!] Note that the first load really has to have a _data_ dependency and</div><div class='add'>+     [!] Note that the first load really has to have an _address_ dependency and</div><div class='ctx'>      not a control dependency.  If the address for the second load is dependent</div><div class='ctx'>      on the first load, but the dependency is through a conditional rather than</div><div class='ctx'>      actually loading the address itself, then it's a _control_ dependency and</div><div class='ctx'>      a full read barrier or better is required.  See the "Control dependencies"</div><div class='ctx'>      subsection for more information.</div><div class='ctx'> </div><div class='del'>-     [!] Note that data dependency barriers should normally be paired with</div><div class='add'>+     [!] Note that address-dependency barriers should normally be paired with</div><div class='ctx'>      write barriers; see the "SMP barrier pairing" subsection.</div><div class='ctx'> </div><div class='add'>+     [!] Kernel release v5.9 removed kernel APIs for explicit address-</div><div class='add'>+     dependency barriers.  Nowadays, APIs for marking loads from shared</div><div class='add'>+     variables such as READ_ONCE() and rcu_dereference() provide implicit</div><div class='add'>+     address-dependency barriers.</div><div class='ctx'> </div><div class='ctx'>  (3) Read (or load) memory barriers.</div><div class='ctx'> </div><div class='del'>-     A read barrier is a data dependency barrier plus a guarantee that all the</div><div class='del'>-     LOAD operations specified before the barrier will appear to happen before</div><div class='del'>-     all the LOAD operations specified after the barrier with respect to the</div><div class='del'>-     other components of the system.</div><div class='add'>+     A read barrier is an address-dependency barrier plus a guarantee that all</div><div class='add'>+     the LOAD operations specified before the barrier will appear to happen</div><div class='add'>+     before all the LOAD operations specified after the barrier with respect to</div><div class='add'>+     the other components of the system.</div><div class='ctx'> </div><div class='ctx'>      A read barrier is a partial ordering on loads only; it is not required to</div><div class='ctx'>      have any effect on stores.</div><div class='ctx'> </div><div class='del'>-     Read memory barriers imply data dependency barriers, and so can substitute</div><div class='del'>-     for them.</div><div class='add'>+     Read memory barriers imply address-dependency barriers, and so can</div><div class='add'>+     substitute for them.</div><div class='ctx'> </div><div class='ctx'>      [!] Note that read barriers should normally be paired with write barriers;</div><div class='ctx'>      see the "SMP barrier pairing" subsection.</div><div class='hunk'>@@ -550,17 +554,21 @@ There are certain things that the Linux kernel memory barriers do not guarantee:</div><div class='ctx'> 	    Documentation/core-api/dma-api.rst</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-DATA DEPENDENCY BARRIERS (HISTORICAL)</div><div class='del'>--------------------------------------</div><div class='add'>+ADDRESS-DEPENDENCY BARRIERS (HISTORICAL)</div><div class='add'>+----------------------------------------</div><div class='ctx'> </div><div class='ctx'> As of v4.15 of the Linux kernel, an smp_mb() was added to READ_ONCE() for</div><div class='ctx'> DEC Alpha, which means that about the only people who need to pay attention</div><div class='ctx'> to this section are those working on DEC Alpha architecture-specific code</div><div class='ctx'> and those working on READ_ONCE() itself.  For those who need it, and for</div><div class='ctx'> those who are interested in the history, here is the story of</div><div class='del'>-data-dependency barriers.</div><div class='add'>+address-dependency barriers.</div><div class='add'>+</div><div class='add'>+[!] While address dependencies are observed in both load-to-load and</div><div class='add'>+load-to-store relations, address-dependency barriers are not necessary</div><div class='add'>+for load-to-store situations.</div><div class='ctx'> </div><div class='del'>-The usage requirements of data dependency barriers are a little subtle, and</div><div class='add'>+The requirement of address-dependency barriers is a little subtle, and</div><div class='ctx'> it's not always obvious that they're needed.  To illustrate, consider the</div><div class='ctx'> following sequence of events:</div><div class='ctx'> </div><div class='hunk'>@@ -570,11 +578,14 @@ following sequence of events:</div><div class='ctx'> 	B = 4;</div><div class='ctx'> 	&lt;write barrier&gt;</div><div class='ctx'> 	WRITE_ONCE(P, &amp;B);</div><div class='del'>-			      Q = READ_ONCE(P);</div><div class='add'>+			      Q = READ_ONCE_OLD(P);</div><div class='ctx'> 			      D = *Q;</div><div class='ctx'> </div><div class='del'>-There's a clear data dependency here, and it would seem that by the end of the</div><div class='del'>-sequence, Q must be either &amp;A or &amp;B, and that:</div><div class='add'>+[!] READ_ONCE_OLD() corresponds to READ_ONCE() of pre-4.15 kernel, which</div><div class='add'>+doesn't imply an address-dependency barrier.</div><div class='add'>+</div><div class='add'>+There's a clear address dependency here, and it would seem that by the end of</div><div class='add'>+the sequence, Q must be either &amp;A or &amp;B, and that:</div><div class='ctx'> </div><div class='ctx'> 	(Q == &amp;A) implies (D == 1)</div><div class='ctx'> 	(Q == &amp;B) implies (D == 4)</div><div class='hunk'>@@ -588,8 +599,8 @@ While this may seem like a failure of coherency or causality maintenance, it</div><div class='ctx'> isn't, and this behaviour can be observed on certain real CPUs (such as the DEC</div><div class='ctx'> Alpha).</div><div class='ctx'> </div><div class='del'>-To deal with this, a data dependency barrier or better must be inserted</div><div class='del'>-between the address load and the data load:</div><div class='add'>+To deal with this, READ_ONCE() provides an implicit address-dependency barrier</div><div class='add'>+since kernel release v4.15:</div><div class='ctx'> </div><div class='ctx'> 	CPU 1		      CPU 2</div><div class='ctx'> 	===============	      ===============</div><div class='hunk'>@@ -598,7 +609,7 @@ between the address load and the data load:</div><div class='ctx'> 	&lt;write barrier&gt;</div><div class='ctx'> 	WRITE_ONCE(P, &amp;B);</div><div class='ctx'> 			      Q = READ_ONCE(P);</div><div class='del'>-			      &lt;data dependency barrier&gt;</div><div class='add'>+			      &lt;implicit address-dependency barrier&gt;</div><div class='ctx'> 			      D = *Q;</div><div class='ctx'> </div><div class='ctx'> This enforces the occurrence of one of the two implications, and prevents the</div><div class='hunk'>@@ -615,13 +626,13 @@ odd-numbered bank is idle, one can see the new value of the pointer P (&amp;B),</div><div class='ctx'> but the old value of the variable B (2).</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-A data-dependency barrier is not required to order dependent writes</div><div class='del'>-because the CPUs that the Linux kernel supports don't do writes</div><div class='del'>-until they are certain (1) that the write will actually happen, (2)</div><div class='del'>-of the location of the write, and (3) of the value to be written.</div><div class='add'>+An address-dependency barrier is not required to order dependent writes</div><div class='add'>+because the CPUs that the Linux kernel supports don't do writes until they</div><div class='add'>+are certain (1) that the write will actually happen, (2) of the location of</div><div class='add'>+the write, and (3) of the value to be written.</div><div class='ctx'> But please carefully read the "CONTROL DEPENDENCIES" section and the</div><div class='del'>-Documentation/RCU/rcu_dereference.rst file:  The compiler can and does</div><div class='del'>-break dependencies in a great many highly creative ways.</div><div class='add'>+Documentation/RCU/rcu_dereference.rst file:  The compiler can and does break</div><div class='add'>+dependencies in a great many highly creative ways.</div><div class='ctx'> </div><div class='ctx'> 	CPU 1		      CPU 2</div><div class='ctx'> 	===============	      ===============</div><div class='hunk'>@@ -629,12 +640,12 @@ break dependencies in a great many highly creative ways.</div><div class='ctx'> 	B = 4;</div><div class='ctx'> 	&lt;write barrier&gt;</div><div class='ctx'> 	WRITE_ONCE(P, &amp;B);</div><div class='del'>-			      Q = READ_ONCE(P);</div><div class='add'>+			      Q = READ_ONCE_OLD(P);</div><div class='ctx'> 			      WRITE_ONCE(*Q, 5);</div><div class='ctx'> </div><div class='del'>-Therefore, no data-dependency barrier is required to order the read into</div><div class='add'>+Therefore, no address-dependency barrier is required to order the read into</div><div class='ctx'> Q with the store into *Q.  In other words, this outcome is prohibited,</div><div class='del'>-even without a data-dependency barrier:</div><div class='add'>+even without an implicit address-dependency barrier of modern READ_ONCE():</div><div class='ctx'> </div><div class='ctx'> 	(Q == &amp;B) &amp;&amp; (B == 4)</div><div class='ctx'> </div><div class='hunk'>@@ -645,12 +656,12 @@ can be used to record rare error conditions and the like, and the CPUs'</div><div class='ctx'> naturally occurring ordering prevents such records from being lost.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Note well that the ordering provided by a data dependency is local to</div><div class='add'>+Note well that the ordering provided by an address dependency is local to</div><div class='ctx'> the CPU containing it.  See the section on "Multicopy atomicity" for</div><div class='ctx'> more information.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-The data dependency barrier is very important to the RCU system,</div><div class='add'>+The address-dependency barrier is very important to the RCU system,</div><div class='ctx'> for example.  See rcu_assign_pointer() and rcu_dereference() in</div><div class='ctx'> include/linux/rcupdate.h.  This permits the current target of an RCU'd</div><div class='ctx'> pointer to be replaced with a new modified target, without the replacement</div><div class='hunk'>@@ -667,20 +678,21 @@ not understand them.  The purpose of this section is to help you prevent</div><div class='ctx'> the compiler's ignorance from breaking your code.</div><div class='ctx'> </div><div class='ctx'> A load-load control dependency requires a full read memory barrier, not</div><div class='del'>-simply a data dependency barrier to make it work correctly.  Consider the</div><div class='del'>-following bit of code:</div><div class='add'>+simply an (implicit) address-dependency barrier to make it work correctly.</div><div class='add'>+Consider the following bit of code:</div><div class='ctx'> </div><div class='ctx'> 	q = READ_ONCE(a);</div><div class='add'>+	&lt;implicit address-dependency barrier&gt;</div><div class='ctx'> 	if (q) {</div><div class='del'>-		&lt;data dependency barrier&gt;  /* BUG: No data dependency!!! */</div><div class='add'>+		/* BUG: No address dependency!!! */</div><div class='ctx'> 		p = READ_ONCE(b);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-This will not have the desired effect because there is no actual data</div><div class='add'>+This will not have the desired effect because there is no actual address</div><div class='ctx'> dependency, but rather a control dependency that the CPU may short-circuit</div><div class='ctx'> by attempting to predict the outcome in advance, so that other CPUs see</div><div class='del'>-the load from b as having happened before the load from a.  In such a</div><div class='del'>-case what's actually required is:</div><div class='add'>+the load from b as having happened before the load from a.  In such a case</div><div class='add'>+what's actually required is:</div><div class='ctx'> </div><div class='ctx'> 	q = READ_ONCE(a);</div><div class='ctx'> 	if (q) {</div><div class='hunk'>@@ -927,9 +939,9 @@ General barriers pair with each other, though they also pair with most</div><div class='ctx'> other types of barriers, albeit without multicopy atomicity.  An acquire</div><div class='ctx'> barrier pairs with a release barrier, but both may also pair with other</div><div class='ctx'> barriers, including of course general barriers.  A write barrier pairs</div><div class='del'>-with a data dependency barrier, a control dependency, an acquire barrier,</div><div class='add'>+with an address-dependency barrier, a control dependency, an acquire barrier,</div><div class='ctx'> a release barrier, a read barrier, or a general barrier.  Similarly a</div><div class='del'>-read barrier, control dependency, or a data dependency barrier pairs</div><div class='add'>+read barrier, control dependency, or an address-dependency barrier pairs</div><div class='ctx'> with a write barrier, an acquire barrier, a release barrier, or a</div><div class='ctx'> general barrier:</div><div class='ctx'> </div><div class='hunk'>@@ -948,7 +960,7 @@ Or:</div><div class='ctx'> 	a = 1;</div><div class='ctx'> 	&lt;write barrier&gt;</div><div class='ctx'> 	WRITE_ONCE(b, &amp;a);    x = READ_ONCE(b);</div><div class='del'>-			      &lt;data dependency barrier&gt;</div><div class='add'>+			      &lt;implicit address-dependency barrier&gt;</div><div class='ctx'> 			      y = *x;</div><div class='ctx'> </div><div class='ctx'> Or even:</div><div class='hunk'>@@ -968,8 +980,8 @@ Basically, the read barrier always has to be there, even though it can be of</div><div class='ctx'> the "weaker" type.</div><div class='ctx'> </div><div class='ctx'> [!] Note that the stores before the write barrier would normally be expected to</div><div class='del'>-match the loads after the read barrier or the data dependency barrier, and vice</div><div class='del'>-versa:</div><div class='add'>+match the loads after the read barrier or the address-dependency barrier, and</div><div class='add'>+vice versa:</div><div class='ctx'> </div><div class='ctx'> 	CPU 1                               CPU 2</div><div class='ctx'> 	===================                 ===================</div><div class='hunk'>@@ -1021,8 +1033,8 @@ STORE B, STORE C } all occurring before the unordered set of { STORE D, STORE E</div><div class='ctx'> 	                   V</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Secondly, data dependency barriers act as partial orderings on data-dependent</div><div class='del'>-loads.  Consider the following sequence of events:</div><div class='add'>+Secondly, address-dependency barriers act as partial orderings on address-</div><div class='add'>+dependent loads.  Consider the following sequence of events:</div><div class='ctx'> </div><div class='ctx'> 	CPU 1			CPU 2</div><div class='ctx'> 	=======================	=======================</div><div class='hunk'>@@ -1067,8 +1079,8 @@ effectively random order, despite the write barrier issued by CPU 1:</div><div class='ctx'> In the above example, CPU 2 perceives that B is 7, despite the load of *C</div><div class='ctx'> (which would be B) coming after the LOAD of C.</div><div class='ctx'> </div><div class='del'>-If, however, a data dependency barrier were to be placed between the load of C</div><div class='del'>-and the load of *C (ie: B) on CPU 2:</div><div class='add'>+If, however, an address-dependency barrier were to be placed between the load</div><div class='add'>+of C and the load of *C (ie: B) on CPU 2:</div><div class='ctx'> </div><div class='ctx'> 	CPU 1			CPU 2</div><div class='ctx'> 	=======================	=======================</div><div class='hunk'>@@ -1078,7 +1090,7 @@ and the load of *C (ie: B) on CPU 2:</div><div class='ctx'> 	&lt;write barrier&gt;</div><div class='ctx'> 	STORE C = &amp;B		LOAD X</div><div class='ctx'> 	STORE D = 4		LOAD C (gets &amp;B)</div><div class='del'>-				&lt;data dependency barrier&gt;</div><div class='add'>+				&lt;address-dependency barrier&gt;</div><div class='ctx'> 				LOAD *C (reads B)</div><div class='ctx'> </div><div class='ctx'> then the following will occur:</div><div class='hunk'>@@ -1101,7 +1113,7 @@ then the following will occur:</div><div class='ctx'> 	                               |        +-------+       |       |</div><div class='ctx'> 	                               |        | X-&gt;9  |------&gt;|       |</div><div class='ctx'> 	                               |        +-------+       |       |</div><div class='del'>-	  Makes sure all effects ---&gt;   \   ddddddddddddddddd   |       |</div><div class='add'>+	  Makes sure all effects ---&gt;   \   aaaaaaaaaaaaaaaaa   |       |</div><div class='ctx'> 	  prior to the store of C        \      +-------+       |       |</div><div class='ctx'> 	  are perceptible to              -----&gt;| B-&gt;2  |------&gt;|       |</div><div class='ctx'> 	  subsequent loads                      +-------+       |       |</div><div class='hunk'>@@ -1292,7 +1304,7 @@ Which might appear as this:</div><div class='ctx'> 	LOAD with immediate effect              :       :       +-------+</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Placing a read barrier or a data dependency barrier just before the second</div><div class='add'>+Placing a read barrier or an address-dependency barrier just before the second</div><div class='ctx'> load:</div><div class='ctx'> </div><div class='ctx'> 	CPU 1			CPU 2</div><div class='hunk'>@@ -1816,20 +1828,20 @@ which may then reorder things however it wishes.</div><div class='ctx'> CPU MEMORY BARRIERS</div><div class='ctx'> -------------------</div><div class='ctx'> </div><div class='del'>-The Linux kernel has eight basic CPU memory barriers:</div><div class='add'>+The Linux kernel has seven basic CPU memory barriers:</div><div class='ctx'> </div><div class='del'>-	TYPE		MANDATORY		SMP CONDITIONAL</div><div class='del'>-	===============	=======================	===========================</div><div class='del'>-	GENERAL		mb()			smp_mb()</div><div class='del'>-	WRITE		wmb()			smp_wmb()</div><div class='del'>-	READ		rmb()			smp_rmb()</div><div class='del'>-	DATA DEPENDENCY				READ_ONCE()</div><div class='add'>+	TYPE			MANDATORY	SMP CONDITIONAL</div><div class='add'>+	=======================	===============	===============</div><div class='add'>+	GENERAL			mb()		smp_mb()</div><div class='add'>+	WRITE			wmb()		smp_wmb()</div><div class='add'>+	READ			rmb()		smp_rmb()</div><div class='add'>+	ADDRESS DEPENDENCY			READ_ONCE()</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-All memory barriers except the data dependency barriers imply a compiler</div><div class='del'>-barrier.  Data dependencies do not impose any additional compiler ordering.</div><div class='add'>+All memory barriers except the address-dependency barriers imply a compiler</div><div class='add'>+barrier.  Address dependencies do not impose any additional compiler ordering.</div><div class='ctx'> </div><div class='del'>-Aside: In the case of data dependencies, the compiler would be expected</div><div class='add'>+Aside: In the case of address dependencies, the compiler would be expected</div><div class='ctx'> to issue the loads in the correct order (eg. `a[b]` would have to load</div><div class='ctx'> the value of b before loading a[b]), however there is no guarantee in</div><div class='ctx'> the C specification that the compiler may not speculate the value of b</div><div class='hunk'>@@ -1894,10 +1906,12 @@ There are some more advanced barrier functions:</div><div class='ctx'> </div><div class='ctx'>  (*) dma_wmb();</div><div class='ctx'>  (*) dma_rmb();</div><div class='add'>+ (*) dma_mb();</div><div class='ctx'> </div><div class='ctx'>      These are for use with consistent memory to guarantee the ordering</div><div class='ctx'>      of writes or reads of shared memory accessible to both the CPU and a</div><div class='del'>-     DMA capable device.</div><div class='add'>+     DMA capable device. See Documentation/core-api/dma-api.rst file for more</div><div class='add'>+     information about consistent memory.</div><div class='ctx'> </div><div class='ctx'>      For example, consider a device driver that shares memory with a device</div><div class='ctx'>      and uses a descriptor status value to indicate if the descriptor belongs</div><div class='hunk'>@@ -1918,22 +1932,21 @@ There are some more advanced barrier functions:</div><div class='ctx'> 		/* assign ownership */</div><div class='ctx'> 		desc-&gt;status = DEVICE_OWN;</div><div class='ctx'> </div><div class='del'>-		/* notify device of new descriptors */</div><div class='add'>+		/* Make descriptor status visible to the device followed by</div><div class='add'>+		 * notify device of new descriptor</div><div class='add'>+		 */</div><div class='ctx'> 		writel(DESC_NOTIFY, doorbell);</div><div class='ctx'> 	}</div><div class='ctx'> </div><div class='del'>-     The dma_rmb() allows us guarantee the device has released ownership</div><div class='add'>+     The dma_rmb() allows us to guarantee that the device has released ownership</div><div class='ctx'>      before we read the data from the descriptor, and the dma_wmb() allows</div><div class='ctx'>      us to guarantee the data is written to the descriptor before the device</div><div class='del'>-     can see it now has ownership.  Note that, when using writel(), a prior</div><div class='del'>-     wmb() is not needed to guarantee that the cache coherent memory writes</div><div class='del'>-     have completed before writing to the MMIO region.  The cheaper</div><div class='del'>-     writel_relaxed() does not provide this guarantee and must not be used</div><div class='del'>-     here.</div><div class='add'>+     can see it now has ownership.  The dma_mb() implies both a dma_rmb() and</div><div class='add'>+     a dma_wmb().</div><div class='ctx'> </div><div class='del'>-     See the subsection "Kernel I/O barrier effects" for more information on</div><div class='del'>-     relaxed I/O accessors and the Documentation/core-api/dma-api.rst file for</div><div class='del'>-     more information on consistent memory.</div><div class='add'>+     Note that the dma_*() barriers do not provide any ordering guarantees for</div><div class='add'>+     accesses to MMIO regions.  See the later "KERNEL I/O BARRIER EFFECTS"</div><div class='add'>+     subsection for more information about I/O accessors and MMIO ordering.</div><div class='ctx'> </div><div class='ctx'>  (*) pmem_wmb();</div><div class='ctx'> </div><div class='hunk'>@@ -1953,7 +1966,7 @@ There are some more advanced barrier functions:</div><div class='ctx'>  (*) io_stop_wc();</div><div class='ctx'> </div><div class='ctx'>      For memory accesses with write-combining attributes (e.g. those returned</div><div class='del'>-     by ioremap_wc(), the CPU may wait for prior accesses to be merged with</div><div class='add'>+     by ioremap_wc()), the CPU may wait for prior accesses to be merged with</div><div class='ctx'>      subsequent ones. io_stop_wc() can be used to prevent the merging of</div><div class='ctx'>      write-combining memory accesses before this macro with those after it when</div><div class='ctx'>      such wait has performance implications.</div><div class='hunk'>@@ -2748,7 +2761,8 @@ is discarded from the CPU's cache and reloaded.  To deal with this, the</div><div class='ctx'> appropriate part of the kernel must invalidate the overlapping bits of the</div><div class='ctx'> cache on each CPU.</div><div class='ctx'> </div><div class='del'>-See Documentation/core-api/cachetlb.rst for more information on cache management.</div><div class='add'>+See Documentation/core-api/cachetlb.rst for more information on cache</div><div class='add'>+management.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> CACHE COHERENCY VS MMIO</div><div class='hunk'>@@ -2888,8 +2902,8 @@ AND THEN THERE'S THE ALPHA</div><div class='ctx'> The DEC Alpha CPU is one of the most relaxed CPUs there is.  Not only that,</div><div class='ctx'> some versions of the Alpha CPU have a split data cache, permitting them to have</div><div class='ctx'> two semantically-related cache lines updated at separate times.  This is where</div><div class='del'>-the data dependency barrier really becomes necessary as this synchronises both</div><div class='del'>-caches with the memory coherence system, thus making it seem like pointer</div><div class='add'>+the address-dependency barrier really becomes necessary as this synchronises</div><div class='add'>+both caches with the memory coherence system, thus making it seem like pointer</div><div class='ctx'> changes vs new data occur in the right order.</div><div class='ctx'> </div><div class='ctx'> The Alpha defines the Linux kernel's memory model, although as of v4.15</div><div class='head'>diff --git a/Documentation/misc-devices/index.rst b/Documentation/misc-devices/index.rst<br/>index 30ac58f81901..756be15a49a4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/misc-devices/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/misc-devices/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/misc-devices/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/misc-devices/index.rst</a></div><div class='hunk'>@@ -25,6 +25,7 @@ fit into other categories.</div><div class='ctx'>    isl29003</div><div class='ctx'>    lis3lv02d</div><div class='ctx'>    max6875</div><div class='add'>+   oxsemi-tornado</div><div class='ctx'>    pci-endpoint-test</div><div class='ctx'>    spear-pcie-gadget</div><div class='ctx'>    uacce</div><div class='head'>diff --git a/Documentation/misc-devices/oxsemi-tornado.rst b/Documentation/misc-devices/oxsemi-tornado.rst<br/>new file mode 100644<br/>index 000000000000..b33351bef6cf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/misc-devices/oxsemi-tornado.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/misc-devices/oxsemi-tornado.rst</a></div><div class='hunk'>@@ -0,0 +1,131 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+====================================================================</div><div class='add'>+Notes on Oxford Semiconductor PCIe (Tornado) 950 serial port devices</div><div class='add'>+====================================================================</div><div class='add'>+</div><div class='add'>+Oxford Semiconductor PCIe (Tornado) 950 serial port devices are driven</div><div class='add'>+by a fixed 62.5MHz clock input derived from the 100MHz PCI Express clock.</div><div class='add'>+</div><div class='add'>+The baud rate produced by the baud generator is obtained from this input</div><div class='add'>+frequency by dividing it by the clock prescaler, which can be set to any</div><div class='add'>+value from 1 to 63.875 in increments of 0.125, and then the usual 16-bit</div><div class='add'>+divisor is used as with the original 8250, to divide the frequency by a</div><div class='add'>+value from 1 to 65535.  Finally a programmable oversampling rate is used</div><div class='add'>+that can take any value from 4 to 16 to divide the frequency further and</div><div class='add'>+determine the actual baud rate used.  Baud rates from 15625000bps down</div><div class='add'>+to 0.933bps can be obtained this way.</div><div class='add'>+</div><div class='add'>+By default the oversampling rate is set to 16 and the clock prescaler is</div><div class='add'>+set to 33.875, meaning that the frequency to be used as the reference</div><div class='add'>+for the usual 16-bit divisor is 115313.653, which is close enough to the</div><div class='add'>+frequency of 115200 used by the original 8250 for the same values to be</div><div class='add'>+used for the divisor to obtain the requested baud rates by software that</div><div class='add'>+is unaware of the extra clock controls available.</div><div class='add'>+</div><div class='add'>+The oversampling rate is programmed with the TCR register and the clock</div><div class='add'>+prescaler is programmed with the CPR/CPR2 register pair [OX200]_ [OX952]_</div><div class='add'>+[OX954]_ [OX958]_.  To switch away from the default value of 33.875 for</div><div class='add'>+the prescaler the enhanced mode has to be explicitly enabled though, by</div><div class='add'>+setting bit 4 of the EFR.  In that mode setting bit 7 in the MCR enables</div><div class='add'>+the prescaler or otherwise it is bypassed as if the value of 1 was used.</div><div class='add'>+Additionally writing any value to CPR clears CPR2 for compatibility with</div><div class='add'>+old software written for older conventional PCI Oxford Semiconductor</div><div class='add'>+devices that do not have the extra prescaler's 9th bit in CPR2, so the</div><div class='add'>+CPR/CPR2 register pair has to be programmed in the right order.</div><div class='add'>+</div><div class='add'>+By using these parameters rates from 15625000bps down to 1bps can be</div><div class='add'>+obtained, with either exact or highly-accurate actual bit rates for</div><div class='add'>+standard and many non-standard rates.</div><div class='add'>+</div><div class='add'>+Here are the figures for the standard and some non-standard baud rates</div><div class='add'>+(including those quoted in Oxford Semiconductor documentation), giving</div><div class='add'>+the requested rate (r), the actual rate yielded (a) and its deviation</div><div class='add'>+from the requested rate (d), and the values of the oversampling rate</div><div class='add'>+(tcr), the clock prescaler (cpr) and the divisor (div) produced by the</div><div class='add'>+new ``get_divisor`` handler:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+ r: 15625000, a: 15625000.00, d:  0.0000%, tcr:  4, cpr:  1.000, div:     1</div><div class='add'>+ r: 12500000, a: 12500000.00, d:  0.0000%, tcr:  5, cpr:  1.000, div:     1</div><div class='add'>+ r: 10416666, a: 10416666.67, d:  0.0000%, tcr:  6, cpr:  1.000, div:     1</div><div class='add'>+ r:  8928571, a:  8928571.43, d:  0.0000%, tcr:  7, cpr:  1.000, div:     1</div><div class='add'>+ r:  7812500, a:  7812500.00, d:  0.0000%, tcr:  8, cpr:  1.000, div:     1</div><div class='add'>+ r:  4000000, a:  4000000.00, d:  0.0000%, tcr:  5, cpr:  3.125, div:     1</div><div class='add'>+ r:  3686400, a:  3676470.59, d: -0.2694%, tcr:  8, cpr:  2.125, div:     1</div><div class='add'>+ r:  3500000, a:  3496503.50, d: -0.0999%, tcr: 13, cpr:  1.375, div:     1</div><div class='add'>+ r:  3000000, a:  2976190.48, d: -0.7937%, tcr: 14, cpr:  1.500, div:     1</div><div class='add'>+ r:  2500000, a:  2500000.00, d:  0.0000%, tcr: 10, cpr:  2.500, div:     1</div><div class='add'>+ r:  2000000, a:  2000000.00, d:  0.0000%, tcr: 10, cpr:  3.125, div:     1</div><div class='add'>+ r:  1843200, a:  1838235.29, d: -0.2694%, tcr: 16, cpr:  2.125, div:     1</div><div class='add'>+ r:  1500000, a:  1492537.31, d: -0.4975%, tcr:  5, cpr:  8.375, div:     1</div><div class='add'>+ r:  1152000, a:  1152073.73, d:  0.0064%, tcr: 14, cpr:  3.875, div:     1</div><div class='add'>+ r:   921600, a:   919117.65, d: -0.2694%, tcr: 16, cpr:  2.125, div:     2</div><div class='add'>+ r:   576000, a:   576036.87, d:  0.0064%, tcr: 14, cpr:  3.875, div:     2</div><div class='add'>+ r:   460800, a:   460829.49, d:  0.0064%, tcr:  7, cpr:  3.875, div:     5</div><div class='add'>+ r:   230400, a:   230414.75, d:  0.0064%, tcr: 14, cpr:  3.875, div:     5</div><div class='add'>+ r:   115200, a:   115207.37, d:  0.0064%, tcr: 14, cpr:  1.250, div:    31</div><div class='add'>+ r:    57600, a:    57603.69, d:  0.0064%, tcr:  8, cpr:  3.875, div:    35</div><div class='add'>+ r:    38400, a:    38402.46, d:  0.0064%, tcr: 14, cpr:  3.875, div:    30</div><div class='add'>+ r:    19200, a:    19201.23, d:  0.0064%, tcr:  8, cpr:  3.875, div:   105</div><div class='add'>+ r:     9600, a:     9600.06, d:  0.0006%, tcr:  9, cpr:  1.125, div:   643</div><div class='add'>+ r:     4800, a:     4799.98, d: -0.0004%, tcr:  7, cpr:  2.875, div:   647</div><div class='add'>+ r:     2400, a:     2400.02, d:  0.0008%, tcr:  9, cpr:  2.250, div:  1286</div><div class='add'>+ r:     1200, a:     1200.00, d:  0.0000%, tcr: 14, cpr:  2.875, div:  1294</div><div class='add'>+ r:      300, a:      300.00, d:  0.0000%, tcr: 11, cpr:  2.625, div:  7215</div><div class='add'>+ r:      200, a:      200.00, d:  0.0000%, tcr: 16, cpr:  1.250, div: 15625</div><div class='add'>+ r:      150, a:      150.00, d:  0.0000%, tcr: 13, cpr:  2.250, div: 14245</div><div class='add'>+ r:      134, a:      134.00, d:  0.0000%, tcr: 11, cpr:  2.625, div: 16153</div><div class='add'>+ r:      110, a:      110.00, d:  0.0000%, tcr: 12, cpr:  1.000, div: 47348</div><div class='add'>+ r:       75, a:       75.00, d:  0.0000%, tcr:  4, cpr:  5.875, div: 35461</div><div class='add'>+ r:       50, a:       50.00, d:  0.0000%, tcr: 16, cpr:  1.250, div: 62500</div><div class='add'>+ r:       25, a:       25.00, d:  0.0000%, tcr: 16, cpr:  2.500, div: 62500</div><div class='add'>+ r:        4, a:        4.00, d:  0.0000%, tcr: 16, cpr: 20.000, div: 48828</div><div class='add'>+ r:        2, a:        2.00, d:  0.0000%, tcr: 16, cpr: 40.000, div: 48828</div><div class='add'>+ r:        1, a:        1.00, d:  0.0000%, tcr: 16, cpr: 63.875, div: 61154</div><div class='add'>+</div><div class='add'>+With the baud base set to 15625000 and the unsigned 16-bit UART_DIV_MAX</div><div class='add'>+limitation imposed by ``serial8250_get_baud_rate`` standard baud rates</div><div class='add'>+below 300bps become unavailable in the regular way, e.g. the rate of</div><div class='add'>+200bps requires the baud base to be divided by 78125 and that is beyond</div><div class='add'>+the unsigned 16-bit range.  The historic spd_cust feature can still be</div><div class='add'>+used by encoding the values for, the prescaler, the oversampling rate</div><div class='add'>+and the clock divisor (DLM/DLL) as follows to obtain such rates if so</div><div class='add'>+required:</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  31 29 28             20 19   16 15                            0</div><div class='add'>+ +-----+-----------------+-------+-------------------------------+</div><div class='add'>+ |0 0 0|    CPR2:CPR     |  TCR  |            DLM:DLL            |</div><div class='add'>+ +-----+-----------------+-------+-------------------------------+</div><div class='add'>+</div><div class='add'>+Use a value such encoded for the ``custom_divisor`` field along with the</div><div class='add'>+ASYNC_SPD_CUST flag set in the ``flags`` field in ``struct serial_struct``</div><div class='add'>+passed with the TIOCSSERIAL ioctl(2), such as with the setserial(8)</div><div class='add'>+utility and its ``divisor`` and ``spd_cust`` parameters, and then select</div><div class='add'>+the baud rate of 38400bps.  Note that the value of 0 in TCR sets the</div><div class='add'>+oversampling rate to 16 and prescaler values below 1 in CPR2/CPR are</div><div class='add'>+clamped by the driver to 1.</div><div class='add'>+</div><div class='add'>+For example the value of 0x1f4004e2 will set CPR2/CPR, TCR and DLM/DLL</div><div class='add'>+respectively to 0x1f4, 0x0 and 0x04e2, choosing the prescaler value,</div><div class='add'>+the oversampling rate and the clock divisor of 62.500, 16 and 1250</div><div class='add'>+respectively.  These parameters will set the baud rate for the serial</div><div class='add'>+port to 62500000 / 62.500 / 1250 / 16 = 50bps.</div><div class='add'>+</div><div class='add'>+Maciej W. Rozycki  &lt;macro@orcam.me.uk&gt;</div><div class='add'>+</div><div class='add'>+.. [OX200] "OXPCIe200 PCI Express Multi-Port Bridge", Oxford Semiconductor,</div><div class='add'>+   Inc., DS-0045, 10 Nov 2008, Section "950 Mode", pp. 64-65</div><div class='add'>+</div><div class='add'>+.. [OX952] "OXPCIe952 PCI Express Bridge to Dual Serial &amp; Parallel Port",</div><div class='add'>+   Oxford Semiconductor, Inc., DS-0046, Mar 06 08, Section "950 Mode",</div><div class='add'>+   p. 20</div><div class='add'>+</div><div class='add'>+.. [OX954] "OXPCIe954 PCI Express Bridge to Quad Serial Port", Oxford</div><div class='add'>+   Semiconductor, Inc., DS-0047, Feb 08, Section "950 Mode", p. 20</div><div class='add'>+</div><div class='add'>+.. [OX958] "OXPCIe958 PCI Express Bridge to Octal Serial Port", Oxford</div><div class='add'>+   Semiconductor, Inc., DS-0048, Feb 08, Section "950 Mode", p. 20</div><div class='head'>diff --git a/Documentation/vm/active_mm.rst b/Documentation/mm/active_mm.rst<br/>index 6f8269c284ed..d096fc091e23 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/active_mm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/active_mm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/active_mm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/active_mm.rst</a></div><div class='hunk'>@@ -1,9 +1,13 @@</div><div class='del'>-.. _active_mm:</div><div class='del'>-</div><div class='ctx'> =========</div><div class='ctx'> Active MM</div><div class='ctx'> =========</div><div class='ctx'> </div><div class='add'>+Note, the mm_count refcount may no longer include the "lazy" users</div><div class='add'>+(running tasks with -&gt;active_mm == mm &amp;&amp; -&gt;mm == NULL) on kernels</div><div class='add'>+with CONFIG_MMU_LAZY_TLB_REFCOUNT=n. Taking and releasing these lazy</div><div class='add'>+references must be done with mmgrab_lazy_tlb() and mmdrop_lazy_tlb()</div><div class='add'>+helpers, which abstract this config option.</div><div class='add'>+</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='ctx'>  List:       linux-kernel</div><div class='head'>diff --git a/Documentation/vm/arch_pgtable_helpers.rst b/Documentation/mm/arch_pgtable_helpers.rst<br/>index f8b225fc9190..af3891f895b0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/arch_pgtable_helpers.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/arch_pgtable_helpers.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/arch_pgtable_helpers.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/arch_pgtable_helpers.rst</a></div><div class='hunk'>@@ -1,7 +1,5 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-.. _arch_page_table_helpers:</div><div class='del'>-</div><div class='ctx'> ===============================</div><div class='ctx'> Architecture Page Table Helpers</div><div class='ctx'> ===============================</div><div class='hunk'>@@ -13,7 +11,7 @@ Following tables describe the expected semantics which can also be tested during</div><div class='ctx'> boot via CONFIG_DEBUG_VM_PGTABLE option. All future changes in here or the debug</div><div class='ctx'> test need to be in sync.</div><div class='ctx'> </div><div class='del'>-======================</div><div class='add'>+</div><div class='ctx'> PTE Page Table Helpers</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='hunk'>@@ -79,7 +77,7 @@ PTE Page Table Helpers</div><div class='ctx'> | ptep_set_access_flags     | Converts into a more permissive PTE              |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> </div><div class='del'>-======================</div><div class='add'>+</div><div class='ctx'> PMD Page Table Helpers</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='hunk'>@@ -94,7 +92,7 @@ PMD Page Table Helpers</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> | pmd_trans_huge            | Tests a Transparent Huge Page (THP) at PMD       |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='del'>-| pmd_present               | Tests a valid mapped PMD                         |</div><div class='add'>+| pmd_present               | Tests whether pmd_page() points to valid memory  |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> | pmd_young                 | Tests a young PMD                                |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='hunk'>@@ -153,7 +151,7 @@ PMD Page Table Helpers</div><div class='ctx'> | pmdp_set_access_flags     | Converts into a more permissive PMD              |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> </div><div class='del'>-======================</div><div class='add'>+</div><div class='ctx'> PUD Page Table Helpers</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='hunk'>@@ -209,14 +207,14 @@ PUD Page Table Helpers</div><div class='ctx'> | pudp_set_access_flags     | Converts into a more permissive PUD              |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> </div><div class='del'>-==========================</div><div class='add'>+</div><div class='ctx'> HugeTLB Page Table Helpers</div><div class='ctx'> ==========================</div><div class='ctx'> </div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> | pte_huge                  | Tests a HugeTLB                                  |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='del'>-| pte_mkhuge                | Creates a HugeTLB                                |</div><div class='add'>+| arch_make_huge_pte        | Creates a HugeTLB                                |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> | huge_pte_dirty            | Tests a dirty HugeTLB                            |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='hunk'>@@ -235,7 +233,7 @@ HugeTLB Page Table Helpers</div><div class='ctx'> | huge_ptep_set_access_flags  | Converts into a more permissive HugeTLB        |</div><div class='ctx'> +---------------------------+--------------------------------------------------+</div><div class='ctx'> </div><div class='del'>-========================</div><div class='add'>+</div><div class='ctx'> SWAP Page Table Helpers</div><div class='ctx'> ========================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/vm/balance.rst b/Documentation/mm/balance.rst<br/>index 6a1fadf3e173..abaa78561c31 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/balance.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/balance.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/balance.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/balance.rst</a></div><div class='hunk'>@@ -1,12 +1,10 @@</div><div class='del'>-.. _balance:</div><div class='del'>-</div><div class='ctx'> ================</div><div class='ctx'> Memory Balancing</div><div class='ctx'> ================</div><div class='ctx'> </div><div class='ctx'> Started Jan 2000 by Kanoj Sarcar &lt;kanoj@sgi.com&gt;</div><div class='ctx'> </div><div class='del'>-Memory balancing is needed for !__GFP_ATOMIC and !__GFP_KSWAPD_RECLAIM as</div><div class='add'>+Memory balancing is needed for !__GFP_HIGH and !__GFP_KSWAPD_RECLAIM as</div><div class='ctx'> well as for non __GFP_IO allocations.</div><div class='ctx'> </div><div class='ctx'> The first reason why a caller may avoid reclaim is that the caller can not</div><div class='head'>diff --git a/Documentation/mm/bootmem.rst b/Documentation/mm/bootmem.rst<br/>new file mode 100644<br/>index 000000000000..eb2b31eedfa1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/bootmem.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/bootmem.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===========</div><div class='add'>+Boot Memory</div><div class='add'>+===========</div><div class='head'>diff --git a/Documentation/vm/damon/api.rst b/Documentation/mm/damon/api.rst<br/>index 08f34df45523..08f34df45523 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/damon/api.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/damon/api.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/damon/api.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/damon/api.rst</a></div><div class='head'>diff --git a/Documentation/vm/damon/design.rst b/Documentation/mm/damon/design.rst<br/>index 0cff6fac6b7e..0cff6fac6b7e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/damon/design.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/damon/design.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/damon/design.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/damon/design.rst</a></div><div class='head'>diff --git a/Documentation/vm/damon/faq.rst b/Documentation/mm/damon/faq.rst<br/>index dde7e2414ee6..dde7e2414ee6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/damon/faq.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/damon/faq.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/damon/faq.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/damon/faq.rst</a></div><div class='head'>diff --git a/Documentation/mm/damon/index.rst b/Documentation/mm/damon/index.rst<br/>new file mode 100644<br/>index 000000000000..5e0a50583500<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/damon/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/damon/index.rst</a></div><div class='hunk'>@@ -0,0 +1,35 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==========================</div><div class='add'>+DAMON: Data Access MONitor</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+DAMON is a Linux kernel subsystem that provides a framework for data access</div><div class='add'>+monitoring and the monitoring results based system operations.  The core</div><div class='add'>+monitoring mechanisms of DAMON (refer to :doc:`design` for the detail) make it</div><div class='add'>+</div><div class='add'>+ - *accurate* (the monitoring output is useful enough for DRAM level memory</div><div class='add'>+   management; It might not appropriate for CPU Cache levels, though),</div><div class='add'>+ - *light-weight* (the monitoring overhead is low enough to be applied online),</div><div class='add'>+   and</div><div class='add'>+ - *scalable* (the upper-bound of the overhead is in constant range regardless</div><div class='add'>+   of the size of target workloads).</div><div class='add'>+</div><div class='add'>+Using this framework, therefore, the kernel can operate system in an</div><div class='add'>+access-aware fashion.  Because the features are also exposed to the user space,</div><div class='add'>+users who have special information about their workloads can write personalized</div><div class='add'>+applications for better understanding and optimizations of their workloads and</div><div class='add'>+systems.</div><div class='add'>+</div><div class='add'>+For easier development of such systems, DAMON provides a feature called DAMOS</div><div class='add'>+(DAMon-based Operation Schemes) in addition to the monitoring.  Using the</div><div class='add'>+feature, DAMON users in both kernel and user spaces can do access-aware system</div><div class='add'>+operations with no code but simple configurations.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 2</div><div class='add'>+</div><div class='add'>+   faq</div><div class='add'>+   design</div><div class='add'>+   api</div><div class='add'>+   maintainer-profile</div><div class='head'>diff --git a/Documentation/mm/damon/maintainer-profile.rst b/Documentation/mm/damon/maintainer-profile.rst<br/>new file mode 100644<br/>index 000000000000..24a202f03de8<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/damon/maintainer-profile.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/damon/maintainer-profile.rst</a></div><div class='hunk'>@@ -0,0 +1,62 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+DAMON Maintainer Entry Profile</div><div class='add'>+==============================</div><div class='add'>+</div><div class='add'>+The DAMON subsystem covers the files that listed in 'DATA ACCESS MONITOR'</div><div class='add'>+section of 'MAINTAINERS' file.</div><div class='add'>+</div><div class='add'>+The mailing lists for the subsystem are damon@lists.linux.dev and</div><div class='add'>+linux-mm@kvack.org.  Patches should be made against the mm-unstable tree [1]_</div><div class='add'>+whenever possible and posted to the mailing lists.</div><div class='add'>+</div><div class='add'>+SCM Trees</div><div class='add'>+---------</div><div class='add'>+</div><div class='add'>+There are multiple Linux trees for DAMON development.  Patches under</div><div class='add'>+development or testing are queued in damon/next [2]_ by the DAMON maintainer.</div><div class='add'>+Suffieicntly reviewed patches will be queued in mm-unstable [1]_ by the memory</div><div class='add'>+management subsystem maintainer.  After more sufficient tests, the patches will</div><div class='add'>+be queued in mm-stable [3]_ , and finally pull-requested to the mainline by the</div><div class='add'>+memory management subsystem maintainer.</div><div class='add'>+</div><div class='add'>+Note again the patches for review should be made against the mm-unstable</div><div class='add'>+tree[1] whenever possible.  damon/next is only for preview of others' works in</div><div class='add'>+progress.</div><div class='add'>+</div><div class='add'>+Submit checklist addendum</div><div class='add'>+-------------------------</div><div class='add'>+</div><div class='add'>+When making DAMON changes, you should do below.</div><div class='add'>+</div><div class='add'>+- Build changes related outputs including kernel and documents.</div><div class='add'>+- Ensure the builds introduce no new errors or warnings.</div><div class='add'>+- Run and ensure no new failures for DAMON selftests [4]_ and kunittests [5]_ .</div><div class='add'>+</div><div class='add'>+Further doing below and putting the results will be helpful.</div><div class='add'>+</div><div class='add'>+- Run damon-tests/corr [6]_ for normal changes.</div><div class='add'>+- Run damon-tests/perf [7]_ for performance changes.</div><div class='add'>+</div><div class='add'>+Key cycle dates</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+Patches can be sent anytime.  Key cycle dates of the mm-unstable[1] and</div><div class='add'>+mm-stable[3] trees depend on the memory management subsystem maintainer.</div><div class='add'>+</div><div class='add'>+Review cadence</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+The DAMON maintainer does the work on the usual work hour (09:00 to 17:00,</div><div class='add'>+Mon-Fri) in PST.  The response to patches will occasionally be slow.  Do not</div><div class='add'>+hesitate to send a ping if you have not heard back within a week of sending a</div><div class='add'>+patch.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. [1] https://git.kernel.org/akpm/mm/h/mm-unstable</div><div class='add'>+.. [2] https://git.kernel.org/sj/h/damon/next</div><div class='add'>+.. [3] https://git.kernel.org/akpm/mm/h/mm-stable</div><div class='add'>+.. [4] https://github.com/awslabs/damon-tests/blob/master/corr/run.sh#L49</div><div class='add'>+.. [5] https://github.com/awslabs/damon-tests/blob/master/corr/tests/kunit.sh</div><div class='add'>+.. [6] https://github.com/awslabs/damon-tests/tree/master/corr</div><div class='add'>+.. [7] https://github.com/awslabs/damon-tests/tree/master/perf</div><div class='head'>diff --git a/Documentation/vm/free_page_reporting.rst b/Documentation/mm/free_page_reporting.rst<br/>index 8c05e62d8b2b..1468f71c261f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/free_page_reporting.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/free_page_reporting.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/free_page_reporting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/free_page_reporting.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _free_page_reporting:</div><div class='del'>-</div><div class='ctx'> =====================</div><div class='ctx'> Free Page Reporting</div><div class='ctx'> =====================</div><div class='head'>diff --git a/Documentation/vm/frontswap.rst b/Documentation/mm/frontswap.rst<br/>index feecc5e24477..c892412988af 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/frontswap.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/frontswap.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/frontswap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/frontswap.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _frontswap:</div><div class='del'>-</div><div class='ctx'> =========</div><div class='ctx'> Frontswap</div><div class='ctx'> =========</div><div class='head'>diff --git a/Documentation/mm/highmem.rst b/Documentation/mm/highmem.rst<br/>new file mode 100644<br/>index 000000000000..c964e0848702<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/highmem.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/highmem.rst</a></div><div class='hunk'>@@ -0,0 +1,209 @@</div><div class='add'>+====================</div><div class='add'>+High Memory Handling</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+By: Peter Zijlstra &lt;a.p.zijlstra@chello.nl&gt;</div><div class='add'>+</div><div class='add'>+.. contents:: :local:</div><div class='add'>+</div><div class='add'>+What Is High Memory?</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+High memory (highmem) is used when the size of physical memory approaches or</div><div class='add'>+exceeds the maximum size of virtual memory.  At that point it becomes</div><div class='add'>+impossible for the kernel to keep all of the available physical memory mapped</div><div class='add'>+at all times.  This means the kernel needs to start using temporary mappings of</div><div class='add'>+the pieces of physical memory that it wants to access.</div><div class='add'>+</div><div class='add'>+The part of (physical) memory not covered by a permanent mapping is what we</div><div class='add'>+refer to as 'highmem'.  There are various architecture dependent constraints on</div><div class='add'>+where exactly that border lies.</div><div class='add'>+</div><div class='add'>+In the i386 arch, for example, we choose to map the kernel into every process's</div><div class='add'>+VM space so that we don't have to pay the full TLB invalidation costs for</div><div class='add'>+kernel entry/exit.  This means the available virtual memory space (4GiB on</div><div class='add'>+i386) has to be divided between user and kernel space.</div><div class='add'>+</div><div class='add'>+The traditional split for architectures using this approach is 3:1, 3GiB for</div><div class='add'>+userspace and the top 1GiB for kernel space::</div><div class='add'>+</div><div class='add'>+		+--------+ 0xffffffff</div><div class='add'>+		| Kernel |</div><div class='add'>+		+--------+ 0xc0000000</div><div class='add'>+		|        |</div><div class='add'>+		| User   |</div><div class='add'>+		|        |</div><div class='add'>+		+--------+ 0x00000000</div><div class='add'>+</div><div class='add'>+This means that the kernel can at most map 1GiB of physical memory at any one</div><div class='add'>+time, but because we need virtual address space for other things - including</div><div class='add'>+temporary maps to access the rest of the physical memory - the actual direct</div><div class='add'>+map will typically be less (usually around ~896MiB).</div><div class='add'>+</div><div class='add'>+Other architectures that have mm context tagged TLBs can have separate kernel</div><div class='add'>+and user maps.  Some hardware (like some ARMs), however, have limited virtual</div><div class='add'>+space when they use mm context tags.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Temporary Virtual Mappings</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+The kernel contains several ways of creating temporary mappings. The following</div><div class='add'>+list shows them in order of preference of use.</div><div class='add'>+</div><div class='add'>+* kmap_local_page().  This function is used to require short term mappings.</div><div class='add'>+  It can be invoked from any context (including interrupts) but the mappings</div><div class='add'>+  can only be used in the context which acquired them.</div><div class='add'>+</div><div class='add'>+  This function should always be used, whereas kmap_atomic() and kmap() have</div><div class='add'>+  been deprecated.</div><div class='add'>+</div><div class='add'>+  These mappings are thread-local and CPU-local, meaning that the mapping</div><div class='add'>+  can only be accessed from within this thread and the thread is bound to the</div><div class='add'>+  CPU while the mapping is active. Although preemption is never disabled by</div><div class='add'>+  this function, the CPU can not be unplugged from the system via</div><div class='add'>+  CPU-hotplug until the mapping is disposed.</div><div class='add'>+</div><div class='add'>+  It's valid to take pagefaults in a local kmap region, unless the context</div><div class='add'>+  in which the local mapping is acquired does not allow it for other reasons.</div><div class='add'>+</div><div class='add'>+  As said, pagefaults and preemption are never disabled. There is no need to</div><div class='add'>+  disable preemption because, when context switches to a different task, the</div><div class='add'>+  maps of the outgoing task are saved and those of the incoming one are</div><div class='add'>+  restored.</div><div class='add'>+</div><div class='add'>+  kmap_local_page() always returns a valid virtual address and it is assumed</div><div class='add'>+  that kunmap_local() will never fail.</div><div class='add'>+</div><div class='add'>+  On CONFIG_HIGHMEM=n kernels and for low memory pages this returns the</div><div class='add'>+  virtual address of the direct mapping. Only real highmem pages are</div><div class='add'>+  temporarily mapped. Therefore, users may call a plain page_address()</div><div class='add'>+  for pages which are known to not come from ZONE_HIGHMEM. However, it is</div><div class='add'>+  always safe to use kmap_local_page() / kunmap_local().</div><div class='add'>+</div><div class='add'>+  While it is significantly faster than kmap(), for the highmem case it</div><div class='add'>+  comes with restrictions about the pointers validity. Contrary to kmap()</div><div class='add'>+  mappings, the local mappings are only valid in the context of the caller</div><div class='add'>+  and cannot be handed to other contexts. This implies that users must</div><div class='add'>+  be absolutely sure to keep the use of the return address local to the</div><div class='add'>+  thread which mapped it.</div><div class='add'>+</div><div class='add'>+  Most code can be designed to use thread local mappings. User should</div><div class='add'>+  therefore try to design their code to avoid the use of kmap() by mapping</div><div class='add'>+  pages in the same thread the address will be used and prefer</div><div class='add'>+  kmap_local_page().</div><div class='add'>+</div><div class='add'>+  Nesting kmap_local_page() and kmap_atomic() mappings is allowed to a certain</div><div class='add'>+  extent (up to KMAP_TYPE_NR) but their invocations have to be strictly ordered</div><div class='add'>+  because the map implementation is stack based. See kmap_local_page() kdocs</div><div class='add'>+  (included in the "Functions" section) for details on how to manage nested</div><div class='add'>+  mappings.</div><div class='add'>+</div><div class='add'>+* kmap_atomic(). This function has been deprecated; use kmap_local_page().</div><div class='add'>+</div><div class='add'>+  NOTE: Conversions to kmap_local_page() must take care to follow the mapping</div><div class='add'>+  restrictions imposed on kmap_local_page(). Furthermore, the code between</div><div class='add'>+  calls to kmap_atomic() and kunmap_atomic() may implicitly depend on the side</div><div class='add'>+  effects of atomic mappings, i.e. disabling page faults or preemption, or both.</div><div class='add'>+  In that case, explicit calls to pagefault_disable() or preempt_disable() or</div><div class='add'>+  both must be made in conjunction with the use of kmap_local_page().</div><div class='add'>+</div><div class='add'>+  [Legacy documentation]</div><div class='add'>+</div><div class='add'>+  This permits a very short duration mapping of a single page.  Since the</div><div class='add'>+  mapping is restricted to the CPU that issued it, it performs well, but</div><div class='add'>+  the issuing task is therefore required to stay on that CPU until it has</div><div class='add'>+  finished, lest some other task displace its mappings.</div><div class='add'>+</div><div class='add'>+  kmap_atomic() may also be used by interrupt contexts, since it does not</div><div class='add'>+  sleep and the callers too may not sleep until after kunmap_atomic() is</div><div class='add'>+  called.</div><div class='add'>+</div><div class='add'>+  Each call of kmap_atomic() in the kernel creates a non-preemptible section</div><div class='add'>+  and disable pagefaults. This could be a source of unwanted latency. Therefore</div><div class='add'>+  users should prefer kmap_local_page() instead of kmap_atomic().</div><div class='add'>+</div><div class='add'>+  It is assumed that k[un]map_atomic() won't fail.</div><div class='add'>+</div><div class='add'>+* kmap(). This function has been deprecated; use kmap_local_page().</div><div class='add'>+</div><div class='add'>+  NOTE: Conversions to kmap_local_page() must take care to follow the mapping</div><div class='add'>+  restrictions imposed on kmap_local_page(). In particular, it is necessary to</div><div class='add'>+  make sure that the kernel virtual memory pointer is only valid in the thread</div><div class='add'>+  that obtained it.</div><div class='add'>+</div><div class='add'>+  [Legacy documentation]</div><div class='add'>+</div><div class='add'>+  This should be used to make short duration mapping of a single page with no</div><div class='add'>+  restrictions on preemption or migration. It comes with an overhead as mapping</div><div class='add'>+  space is restricted and protected by a global lock for synchronization. When</div><div class='add'>+  mapping is no longer needed, the address that the page was mapped to must be</div><div class='add'>+  released with kunmap().</div><div class='add'>+</div><div class='add'>+  Mapping changes must be propagated across all the CPUs. kmap() also</div><div class='add'>+  requires global TLB invalidation when the kmap's pool wraps and it might</div><div class='add'>+  block when the mapping space is fully utilized until a slot becomes</div><div class='add'>+  available. Therefore, kmap() is only callable from preemptible context.</div><div class='add'>+</div><div class='add'>+  All the above work is necessary if a mapping must last for a relatively</div><div class='add'>+  long time but the bulk of high-memory mappings in the kernel are</div><div class='add'>+  short-lived and only used in one place. This means that the cost of</div><div class='add'>+  kmap() is mostly wasted in such cases. kmap() was not intended for long</div><div class='add'>+  term mappings but it has morphed in that direction and its use is</div><div class='add'>+  strongly discouraged in newer code and the set of the preceding functions</div><div class='add'>+  should be preferred.</div><div class='add'>+</div><div class='add'>+  On 64-bit systems, calls to kmap_local_page(), kmap_atomic() and kmap() have</div><div class='add'>+  no real work to do because a 64-bit address space is more than sufficient to</div><div class='add'>+  address all the physical memory whose pages are permanently mapped.</div><div class='add'>+</div><div class='add'>+* vmap().  This can be used to make a long duration mapping of multiple</div><div class='add'>+  physical pages into a contiguous virtual space.  It needs global</div><div class='add'>+  synchronization to unmap.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Cost of Temporary Mappings</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+The cost of creating temporary mappings can be quite high.  The arch has to</div><div class='add'>+manipulate the kernel's page tables, the data TLB and/or the MMU's registers.</div><div class='add'>+</div><div class='add'>+If CONFIG_HIGHMEM is not set, then the kernel will try and create a mapping</div><div class='add'>+simply with a bit of arithmetic that will convert the page struct address into</div><div class='add'>+a pointer to the page contents rather than juggling mappings about.  In such a</div><div class='add'>+case, the unmap operation may be a null operation.</div><div class='add'>+</div><div class='add'>+If CONFIG_MMU is not set, then there can be no temporary mappings and no</div><div class='add'>+highmem.  In such a case, the arithmetic approach will also be used.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+i386 PAE</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+The i386 arch, under some circumstances, will permit you to stick up to 64GiB</div><div class='add'>+of RAM into your 32-bit machine.  This has a number of consequences:</div><div class='add'>+</div><div class='add'>+* Linux needs a page-frame structure for each page in the system and the</div><div class='add'>+  pageframes need to live in the permanent mapping, which means:</div><div class='add'>+</div><div class='add'>+* you can have 896M/sizeof(struct page) page-frames at most; with struct</div><div class='add'>+  page being 32-bytes that would end up being something in the order of 112G</div><div class='add'>+  worth of pages; the kernel, however, needs to store more than just</div><div class='add'>+  page-frames in that memory...</div><div class='add'>+</div><div class='add'>+* PAE makes your page tables larger - which slows the system down as more</div><div class='add'>+  data has to be accessed to traverse in TLB fills and the like.  One</div><div class='add'>+  advantage is that PAE has more PTE bits and can provide advanced features</div><div class='add'>+  like NX and PAT.</div><div class='add'>+</div><div class='add'>+The general recommendation is that you don't use more than 8GiB on a 32-bit</div><div class='add'>+machine - although more might work for you and your workload, you're pretty</div><div class='add'>+much on your own - don't expect kernel developers to really care much if things</div><div class='add'>+come apart.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Functions</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/highmem.h</div><div class='add'>+.. kernel-doc:: include/linux/highmem-internal.h</div><div class='head'>diff --git a/Documentation/vm/hmm.rst b/Documentation/mm/hmm.rst<br/>index f2a59ed82ed3..9aa512c3a12c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/hmm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/hmm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/hmm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/hmm.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _hmm:</div><div class='del'>-</div><div class='ctx'> =====================================</div><div class='ctx'> Heterogeneous Memory Management (HMM)</div><div class='ctx'> =====================================</div><div class='hunk'>@@ -304,7 +302,7 @@ devm_memunmap_pages(), and devm_release_mem_region() when the resources can</div><div class='ctx'> be tied to a ``struct device``.</div><div class='ctx'> </div><div class='ctx'> The overall migration steps are similar to migrating NUMA pages within system</div><div class='del'>-memory (see :ref:`Page migration &lt;page_migration&gt;`) but the steps are split</div><div class='add'>+memory (see Documentation/mm/page_migration.rst) but the steps are split</div><div class='ctx'> between device driver specific code and shared common code:</div><div class='ctx'> </div><div class='ctx'> 1. ``mmap_read_lock()``</div><div class='head'>diff --git a/Documentation/vm/hugetlbfs_reserv.rst b/Documentation/mm/hugetlbfs_reserv.rst<br/>index f143954e0d05..d9c2b0f01dcd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/hugetlbfs_reserv.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/hugetlbfs_reserv.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/hugetlbfs_reserv.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/hugetlbfs_reserv.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _hugetlbfs_reserve:</div><div class='del'>-</div><div class='ctx'> =====================</div><div class='ctx'> Hugetlbfs Reservation</div><div class='ctx'> =====================</div><div class='hunk'>@@ -7,10 +5,10 @@ Hugetlbfs Reservation</div><div class='ctx'> Overview</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='del'>-Huge pages as described at :ref:`hugetlbpage` are typically</div><div class='del'>-preallocated for application use.  These huge pages are instantiated in a</div><div class='del'>-task's address space at page fault time if the VMA indicates huge pages are</div><div class='del'>-to be used.  If no huge page exists at page fault time, the task is sent</div><div class='add'>+Huge pages as described at Documentation/admin-guide/mm/hugetlbpage.rst are</div><div class='add'>+typically preallocated for application use.  These huge pages are instantiated</div><div class='add'>+in a task's address space at page fault time if the VMA indicates huge pages</div><div class='add'>+are to be used.  If no huge page exists at page fault time, the task is sent</div><div class='ctx'> a SIGBUS and often dies an unhappy death.  Shortly after huge page support</div><div class='ctx'> was added, it was determined that it would be better to detect a shortage</div><div class='ctx'> of huge pages at mmap() time.  The idea is that if there were not enough</div><div class='hunk'>@@ -181,14 +179,14 @@ Consuming Reservations/Allocating a Huge Page</div><div class='ctx'> </div><div class='ctx'> Reservations are consumed when huge pages associated with the reservations</div><div class='ctx'> are allocated and instantiated in the corresponding mapping.  The allocation</div><div class='del'>-is performed within the routine alloc_huge_page()::</div><div class='add'>+is performed within the routine alloc_hugetlb_folio()::</div><div class='ctx'> </div><div class='del'>-	struct page *alloc_huge_page(struct vm_area_struct *vma,</div><div class='add'>+	struct folio *alloc_hugetlb_folio(struct vm_area_struct *vma,</div><div class='ctx'> 				     unsigned long addr, int avoid_reserve)</div><div class='ctx'> </div><div class='del'>-alloc_huge_page is passed a VMA pointer and a virtual address, so it can</div><div class='add'>+alloc_hugetlb_folio is passed a VMA pointer and a virtual address, so it can</div><div class='ctx'> consult the reservation map to determine if a reservation exists.  In addition,</div><div class='del'>-alloc_huge_page takes the argument avoid_reserve which indicates reserves</div><div class='add'>+alloc_hugetlb_folio takes the argument avoid_reserve which indicates reserves</div><div class='ctx'> should not be used even if it appears they have been set aside for the</div><div class='ctx'> specified address.  The avoid_reserve argument is most often used in the case</div><div class='ctx'> of Copy on Write and Page Migration where additional copies of an existing</div><div class='hunk'>@@ -208,7 +206,8 @@ a reservation for the allocation.  After determining whether a reservation</div><div class='ctx'> exists and can be used for the allocation, the routine dequeue_huge_page_vma()</div><div class='ctx'> is called.  This routine takes two arguments related to reservations:</div><div class='ctx'> </div><div class='del'>-- avoid_reserve, this is the same value/argument passed to alloc_huge_page()</div><div class='add'>+- avoid_reserve, this is the same value/argument passed to</div><div class='add'>+  alloc_hugetlb_folio().</div><div class='ctx'> - chg, even though this argument is of type long only the values 0 or 1 are</div><div class='ctx'>   passed to dequeue_huge_page_vma.  If the value is 0, it indicates a</div><div class='ctx'>   reservation exists (see the section "Memory Policy and Reservations" for</div><div class='hunk'>@@ -233,9 +232,9 @@ the scope reservations.  Even if a surplus page is allocated, the same</div><div class='ctx'> reservation based adjustments as above will be made: SetPagePrivate(page) and</div><div class='ctx'> resv_huge_pages--.</div><div class='ctx'> </div><div class='del'>-After obtaining a new huge page, (page)-&gt;private is set to the value of</div><div class='del'>-the subpool associated with the page if it exists.  This will be used for</div><div class='del'>-subpool accounting when the page is freed.</div><div class='add'>+After obtaining a new hugetlb folio, (folio)-&gt;_hugetlb_subpool is set to the</div><div class='add'>+value of the subpool associated with the page if it exists.  This will be used</div><div class='add'>+for subpool accounting when the folio is freed.</div><div class='ctx'> </div><div class='ctx'> The routine vma_commit_reservation() is then called to adjust the reserve</div><div class='ctx'> map based on the consumption of the reservation.  In general, this involves</div><div class='hunk'>@@ -246,8 +245,8 @@ was no reservation in a shared mapping or this was a private mapping a new</div><div class='ctx'> entry must be created.</div><div class='ctx'> </div><div class='ctx'> It is possible that the reserve map could have been changed between the call</div><div class='del'>-to vma_needs_reservation() at the beginning of alloc_huge_page() and the</div><div class='del'>-call to vma_commit_reservation() after the page was allocated.  This would</div><div class='add'>+to vma_needs_reservation() at the beginning of alloc_hugetlb_folio() and the</div><div class='add'>+call to vma_commit_reservation() after the folio was allocated.  This would</div><div class='ctx'> be possible if hugetlb_reserve_pages was called for the same page in a shared</div><div class='ctx'> mapping.  In such cases, the reservation count and subpool free page count</div><div class='ctx'> will be off by one.  This rare condition can be identified by comparing the</div><div class='head'>diff --git a/Documentation/vm/hwpoison.rst b/Documentation/mm/hwpoison.rst<br/>index c742de1769d1..ba48a441feed 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/hwpoison.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/hwpoison.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/hwpoison.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/hwpoison.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. hwpoison:</div><div class='del'>-</div><div class='ctx'> ========</div><div class='ctx'> hwpoison</div><div class='ctx'> ========</div><div class='hunk'>@@ -120,7 +118,8 @@ Testing</div><div class='ctx'>   unpoison-pfn</div><div class='ctx'> 	Software-unpoison page at PFN echoed into this file. This way</div><div class='ctx'> 	a page can be reused again.  This only works for Linux</div><div class='del'>-	injected failures, not for real memory failures.</div><div class='add'>+	injected failures, not for real memory failures. Once any hardware</div><div class='add'>+	memory failure happens, this feature is disabled.</div><div class='ctx'> </div><div class='ctx'>   Note these injection interfaces are not stable and might change between</div><div class='ctx'>   kernel versions</div><div class='head'>diff --git a/Documentation/mm/index.rst b/Documentation/mm/index.rst<br/>new file mode 100644<br/>index 000000000000..5a94a921ea40<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/index.rst</a></div><div class='hunk'>@@ -0,0 +1,69 @@</div><div class='add'>+===============================</div><div class='add'>+Memory Management Documentation</div><div class='add'>+===============================</div><div class='add'>+</div><div class='add'>+Memory Management Guide</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+This is a guide to understanding the memory management subsystem</div><div class='add'>+of Linux.  If you are looking for advice on simply allocating memory,</div><div class='add'>+see the :ref:`memory_allocation`.  For controlling and tuning guides,</div><div class='add'>+see the :doc:`admin guide &lt;../admin-guide/mm/index&gt;`.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   physical_memory</div><div class='add'>+   page_tables</div><div class='add'>+   process_addrs</div><div class='add'>+   bootmem</div><div class='add'>+   page_allocation</div><div class='add'>+   vmalloc</div><div class='add'>+   slab</div><div class='add'>+   highmem</div><div class='add'>+   page_reclaim</div><div class='add'>+   swap</div><div class='add'>+   page_cache</div><div class='add'>+   shmfs</div><div class='add'>+   oom</div><div class='add'>+</div><div class='add'>+Legacy Documentation</div><div class='add'>+====================</div><div class='add'>+</div><div class='add'>+This is a collection of older documents about the Linux memory management</div><div class='add'>+(MM) subsystem internals with different level of details ranging from</div><div class='add'>+notes and mailing list responses for elaborating descriptions of data</div><div class='add'>+structures and algorithms.  It should all be integrated nicely into the</div><div class='add'>+above structured documentation, or deleted if it has served its purpose.</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 1</div><div class='add'>+</div><div class='add'>+   active_mm</div><div class='add'>+   arch_pgtable_helpers</div><div class='add'>+   balance</div><div class='add'>+   damon/index</div><div class='add'>+   free_page_reporting</div><div class='add'>+   frontswap</div><div class='add'>+   hmm</div><div class='add'>+   hwpoison</div><div class='add'>+   hugetlbfs_reserv</div><div class='add'>+   ksm</div><div class='add'>+   memory-model</div><div class='add'>+   mmu_notifier</div><div class='add'>+   multigen_lru</div><div class='add'>+   numa</div><div class='add'>+   overcommit-accounting</div><div class='add'>+   page_migration</div><div class='add'>+   page_frags</div><div class='add'>+   page_owner</div><div class='add'>+   page_table_check</div><div class='add'>+   remap_file_pages</div><div class='add'>+   slub</div><div class='add'>+   split_page_table_lock</div><div class='add'>+   transhuge</div><div class='add'>+   unevictable-lru</div><div class='add'>+   vmalloced-kernel-stacks</div><div class='add'>+   vmemmap_dedup</div><div class='add'>+   z3fold</div><div class='add'>+   zsmalloc</div><div class='head'>diff --git a/Documentation/vm/ksm.rst b/Documentation/mm/ksm.rst<br/>index 9e37add068e6..2806e3e4a10e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/ksm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/ksm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/ksm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/ksm.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _ksm:</div><div class='del'>-</div><div class='ctx'> =======================</div><div class='ctx'> Kernel Samepage Merging</div><div class='ctx'> =======================</div><div class='hunk'>@@ -8,7 +6,7 @@ KSM is a memory-saving de-duplication feature, enabled by CONFIG_KSM=y,</div><div class='ctx'> added to the Linux kernel in 2.6.32.  See ``mm/ksm.c`` for its implementation,</div><div class='ctx'> and http://lwn.net/Articles/306704/ and https://lwn.net/Articles/330589/</div><div class='ctx'> </div><div class='del'>-The userspace interface of KSM is described in :ref:`Documentation/admin-guide/mm/ksm.rst &lt;admin_guide_ksm&gt;`</div><div class='add'>+The userspace interface of KSM is described in Documentation/admin-guide/mm/ksm.rst</div><div class='ctx'> </div><div class='ctx'> Design</div><div class='ctx'> ======</div><div class='hunk'>@@ -26,7 +24,7 @@ tree.</div><div class='ctx'> </div><div class='ctx'> If a KSM page is shared between less than ``max_page_sharing`` VMAs,</div><div class='ctx'> the node of the stable tree that represents such KSM page points to a</div><div class='del'>-list of struct rmap_item and the ``page-&gt;mapping`` of the</div><div class='add'>+list of struct ksm_rmap_item and the ``page-&gt;mapping`` of the</div><div class='ctx'> KSM page points to the stable tree node.</div><div class='ctx'> </div><div class='ctx'> When the sharing passes this threshold, KSM adds a second dimension to</div><div class='head'>diff --git a/Documentation/vm/memory-model.rst b/Documentation/mm/memory-model.rst<br/>index 30e8fbed6914..5f3eafbbc520 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/memory-model.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/memory-model.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/memory-model.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/memory-model.rst</a></div><div class='hunk'>@@ -1,7 +1,5 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-.. _physical_memory_model:</div><div class='del'>-</div><div class='ctx'> =====================</div><div class='ctx'> Physical Memory Model</div><div class='ctx'> =====================</div><div class='hunk'>@@ -170,7 +168,7 @@ The users of `ZONE_DEVICE` are:</div><div class='ctx'> * hmm: Extend `ZONE_DEVICE` with `-&gt;page_fault()` and `-&gt;page_free()`</div><div class='ctx'>   event callbacks to allow a device-driver to coordinate memory management</div><div class='ctx'>   events related to device-memory, typically GPU memory. See</div><div class='del'>-  Documentation/vm/hmm.rst.</div><div class='add'>+  Documentation/mm/hmm.rst.</div><div class='ctx'> </div><div class='ctx'> * p2pdma: Create `struct page` objects to allow peer devices in a</div><div class='ctx'>   PCI/-E topology to coordinate direct-DMA operations between themselves,</div><div class='head'>diff --git a/Documentation/vm/mmu_notifier.rst b/Documentation/mm/mmu_notifier.rst<br/>index df5d7777fc6b..c687bea4922f 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/mmu_notifier.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/mmu_notifier.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/mmu_notifier.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/mmu_notifier.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _mmu_notifier:</div><div class='del'>-</div><div class='ctx'> When do you need to notify inside page table lock ?</div><div class='ctx'> ===================================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/mm/multigen_lru.rst b/Documentation/mm/multigen_lru.rst<br/>new file mode 100644<br/>index 000000000000..52ed5092022f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/multigen_lru.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/multigen_lru.rst</a></div><div class='hunk'>@@ -0,0 +1,269 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=============</div><div class='add'>+Multi-Gen LRU</div><div class='add'>+=============</div><div class='add'>+The multi-gen LRU is an alternative LRU implementation that optimizes</div><div class='add'>+page reclaim and improves performance under memory pressure. Page</div><div class='add'>+reclaim decides the kernel's caching policy and ability to overcommit</div><div class='add'>+memory. It directly impacts the kswapd CPU usage and RAM efficiency.</div><div class='add'>+</div><div class='add'>+Design overview</div><div class='add'>+===============</div><div class='add'>+Objectives</div><div class='add'>+----------</div><div class='add'>+The design objectives are:</div><div class='add'>+</div><div class='add'>+* Good representation of access recency</div><div class='add'>+* Try to profit from spatial locality</div><div class='add'>+* Fast paths to make obvious choices</div><div class='add'>+* Simple self-correcting heuristics</div><div class='add'>+</div><div class='add'>+The representation of access recency is at the core of all LRU</div><div class='add'>+implementations. In the multi-gen LRU, each generation represents a</div><div class='add'>+group of pages with similar access recency. Generations establish a</div><div class='add'>+(time-based) common frame of reference and therefore help make better</div><div class='add'>+choices, e.g., between different memcgs on a computer or different</div><div class='add'>+computers in a data center (for job scheduling).</div><div class='add'>+</div><div class='add'>+Exploiting spatial locality improves efficiency when gathering the</div><div class='add'>+accessed bit. A rmap walk targets a single page and does not try to</div><div class='add'>+profit from discovering a young PTE. A page table walk can sweep all</div><div class='add'>+the young PTEs in an address space, but the address space can be too</div><div class='add'>+sparse to make a profit. The key is to optimize both methods and use</div><div class='add'>+them in combination.</div><div class='add'>+</div><div class='add'>+Fast paths reduce code complexity and runtime overhead. Unmapped pages</div><div class='add'>+do not require TLB flushes; clean pages do not require writeback.</div><div class='add'>+These facts are only helpful when other conditions, e.g., access</div><div class='add'>+recency, are similar. With generations as a common frame of reference,</div><div class='add'>+additional factors stand out. But obvious choices might not be good</div><div class='add'>+choices; thus self-correction is necessary.</div><div class='add'>+</div><div class='add'>+The benefits of simple self-correcting heuristics are self-evident.</div><div class='add'>+Again, with generations as a common frame of reference, this becomes</div><div class='add'>+attainable. Specifically, pages in the same generation can be</div><div class='add'>+categorized based on additional factors, and a feedback loop can</div><div class='add'>+statistically compare the refault percentages across those categories</div><div class='add'>+and infer which of them are better choices.</div><div class='add'>+</div><div class='add'>+Assumptions</div><div class='add'>+-----------</div><div class='add'>+The protection of hot pages and the selection of cold pages are based</div><div class='add'>+on page access channels and patterns. There are two access channels:</div><div class='add'>+</div><div class='add'>+* Accesses through page tables</div><div class='add'>+* Accesses through file descriptors</div><div class='add'>+</div><div class='add'>+The protection of the former channel is by design stronger because:</div><div class='add'>+</div><div class='add'>+1. The uncertainty in determining the access patterns of the former</div><div class='add'>+   channel is higher due to the approximation of the accessed bit.</div><div class='add'>+2. The cost of evicting the former channel is higher due to the TLB</div><div class='add'>+   flushes required and the likelihood of encountering the dirty bit.</div><div class='add'>+3. The penalty of underprotecting the former channel is higher because</div><div class='add'>+   applications usually do not prepare themselves for major page</div><div class='add'>+   faults like they do for blocked I/O. E.g., GUI applications</div><div class='add'>+   commonly use dedicated I/O threads to avoid blocking rendering</div><div class='add'>+   threads.</div><div class='add'>+</div><div class='add'>+There are also two access patterns:</div><div class='add'>+</div><div class='add'>+* Accesses exhibiting temporal locality</div><div class='add'>+* Accesses not exhibiting temporal locality</div><div class='add'>+</div><div class='add'>+For the reasons listed above, the former channel is assumed to follow</div><div class='add'>+the former pattern unless ``VM_SEQ_READ`` or ``VM_RAND_READ`` is</div><div class='add'>+present, and the latter channel is assumed to follow the latter</div><div class='add'>+pattern unless outlying refaults have been observed.</div><div class='add'>+</div><div class='add'>+Workflow overview</div><div class='add'>+=================</div><div class='add'>+Evictable pages are divided into multiple generations for each</div><div class='add'>+``lruvec``. The youngest generation number is stored in</div><div class='add'>+``lrugen-&gt;max_seq`` for both anon and file types as they are aged on</div><div class='add'>+an equal footing. The oldest generation numbers are stored in</div><div class='add'>+``lrugen-&gt;min_seq[]`` separately for anon and file types as clean file</div><div class='add'>+pages can be evicted regardless of swap constraints. These three</div><div class='add'>+variables are monotonically increasing.</div><div class='add'>+</div><div class='add'>+Generation numbers are truncated into ``order_base_2(MAX_NR_GENS+1)``</div><div class='add'>+bits in order to fit into the gen counter in ``folio-&gt;flags``. Each</div><div class='add'>+truncated generation number is an index to ``lrugen-&gt;folios[]``. The</div><div class='add'>+sliding window technique is used to track at least ``MIN_NR_GENS`` and</div><div class='add'>+at most ``MAX_NR_GENS`` generations. The gen counter stores a value</div><div class='add'>+within ``[1, MAX_NR_GENS]`` while a page is on one of</div><div class='add'>+``lrugen-&gt;folios[]``; otherwise it stores zero.</div><div class='add'>+</div><div class='add'>+Each generation is divided into multiple tiers. A page accessed ``N``</div><div class='add'>+times through file descriptors is in tier ``order_base_2(N)``. Unlike</div><div class='add'>+generations, tiers do not have dedicated ``lrugen-&gt;folios[]``. In</div><div class='add'>+contrast to moving across generations, which requires the LRU lock,</div><div class='add'>+moving across tiers only involves atomic operations on</div><div class='add'>+``folio-&gt;flags`` and therefore has a negligible cost. A feedback loop</div><div class='add'>+modeled after the PID controller monitors refaults over all the tiers</div><div class='add'>+from anon and file types and decides which tiers from which types to</div><div class='add'>+evict or protect. The desired effect is to balance refault percentages</div><div class='add'>+between anon and file types proportional to the swappiness level.</div><div class='add'>+</div><div class='add'>+There are two conceptually independent procedures: the aging and the</div><div class='add'>+eviction. They form a closed-loop system, i.e., the page reclaim.</div><div class='add'>+</div><div class='add'>+Aging</div><div class='add'>+-----</div><div class='add'>+The aging produces young generations. Given an ``lruvec``, it</div><div class='add'>+increments ``max_seq`` when ``max_seq-min_seq+1`` approaches</div><div class='add'>+``MIN_NR_GENS``. The aging promotes hot pages to the youngest</div><div class='add'>+generation when it finds them accessed through page tables; the</div><div class='add'>+demotion of cold pages happens consequently when it increments</div><div class='add'>+``max_seq``. The aging uses page table walks and rmap walks to find</div><div class='add'>+young PTEs. For the former, it iterates ``lruvec_memcg()-&gt;mm_list``</div><div class='add'>+and calls ``walk_page_range()`` with each ``mm_struct`` on this list</div><div class='add'>+to scan PTEs, and after each iteration, it increments ``max_seq``. For</div><div class='add'>+the latter, when the eviction walks the rmap and finds a young PTE,</div><div class='add'>+the aging scans the adjacent PTEs. For both, on finding a young PTE,</div><div class='add'>+the aging clears the accessed bit and updates the gen counter of the</div><div class='add'>+page mapped by this PTE to ``(max_seq%MAX_NR_GENS)+1``.</div><div class='add'>+</div><div class='add'>+Eviction</div><div class='add'>+--------</div><div class='add'>+The eviction consumes old generations. Given an ``lruvec``, it</div><div class='add'>+increments ``min_seq`` when ``lrugen-&gt;folios[]`` indexed by</div><div class='add'>+``min_seq%MAX_NR_GENS`` becomes empty. To select a type and a tier to</div><div class='add'>+evict from, it first compares ``min_seq[]`` to select the older type.</div><div class='add'>+If both types are equally old, it selects the one whose first tier has</div><div class='add'>+a lower refault percentage. The first tier contains single-use</div><div class='add'>+unmapped clean pages, which are the best bet. The eviction sorts a</div><div class='add'>+page according to its gen counter if the aging has found this page</div><div class='add'>+accessed through page tables and updated its gen counter. It also</div><div class='add'>+moves a page to the next generation, i.e., ``min_seq+1``, if this page</div><div class='add'>+was accessed multiple times through file descriptors and the feedback</div><div class='add'>+loop has detected outlying refaults from the tier this page is in. To</div><div class='add'>+this end, the feedback loop uses the first tier as the baseline, for</div><div class='add'>+the reason stated earlier.</div><div class='add'>+</div><div class='add'>+Working set protection</div><div class='add'>+----------------------</div><div class='add'>+Each generation is timestamped at birth. If ``lru_gen_min_ttl`` is</div><div class='add'>+set, an ``lruvec`` is protected from the eviction when its oldest</div><div class='add'>+generation was born within ``lru_gen_min_ttl`` milliseconds. In other</div><div class='add'>+words, it prevents the working set of ``lru_gen_min_ttl`` milliseconds</div><div class='add'>+from getting evicted. The OOM killer is triggered if this working set</div><div class='add'>+cannot be kept in memory.</div><div class='add'>+</div><div class='add'>+This time-based approach has the following advantages:</div><div class='add'>+</div><div class='add'>+1. It is easier to configure because it is agnostic to applications</div><div class='add'>+   and memory sizes.</div><div class='add'>+2. It is more reliable because it is directly wired to the OOM killer.</div><div class='add'>+</div><div class='add'>+``mm_struct`` list</div><div class='add'>+------------------</div><div class='add'>+An ``mm_struct`` list is maintained for each memcg, and an</div><div class='add'>+``mm_struct`` follows its owner task to the new memcg when this task</div><div class='add'>+is migrated.</div><div class='add'>+</div><div class='add'>+A page table walker iterates ``lruvec_memcg()-&gt;mm_list`` and calls</div><div class='add'>+``walk_page_range()`` with each ``mm_struct`` on this list to scan</div><div class='add'>+PTEs. When multiple page table walkers iterate the same list, each of</div><div class='add'>+them gets a unique ``mm_struct``, and therefore they can run in</div><div class='add'>+parallel.</div><div class='add'>+</div><div class='add'>+Page table walkers ignore any misplaced pages, e.g., if an</div><div class='add'>+``mm_struct`` was migrated, pages left in the previous memcg will be</div><div class='add'>+ignored when the current memcg is under reclaim. Similarly, page table</div><div class='add'>+walkers will ignore pages from nodes other than the one under reclaim.</div><div class='add'>+</div><div class='add'>+This infrastructure also tracks the usage of ``mm_struct`` between</div><div class='add'>+context switches so that page table walkers can skip processes that</div><div class='add'>+have been sleeping since the last iteration.</div><div class='add'>+</div><div class='add'>+Rmap/PT walk feedback</div><div class='add'>+---------------------</div><div class='add'>+Searching the rmap for PTEs mapping each page on an LRU list (to test</div><div class='add'>+and clear the accessed bit) can be expensive because pages from</div><div class='add'>+different VMAs (PA space) are not cache friendly to the rmap (VA</div><div class='add'>+space). For workloads mostly using mapped pages, searching the rmap</div><div class='add'>+can incur the highest CPU cost in the reclaim path.</div><div class='add'>+</div><div class='add'>+``lru_gen_look_around()`` exploits spatial locality to reduce the</div><div class='add'>+trips into the rmap. It scans the adjacent PTEs of a young PTE and</div><div class='add'>+promotes hot pages. If the scan was done cacheline efficiently, it</div><div class='add'>+adds the PMD entry pointing to the PTE table to the Bloom filter. This</div><div class='add'>+forms a feedback loop between the eviction and the aging.</div><div class='add'>+</div><div class='add'>+Bloom filters</div><div class='add'>+-------------</div><div class='add'>+Bloom filters are a space and memory efficient data structure for set</div><div class='add'>+membership test, i.e., test if an element is not in the set or may be</div><div class='add'>+in the set.</div><div class='add'>+</div><div class='add'>+In the eviction path, specifically, in ``lru_gen_look_around()``, if a</div><div class='add'>+PMD has a sufficient number of hot pages, its address is placed in the</div><div class='add'>+filter. In the aging path, set membership means that the PTE range</div><div class='add'>+will be scanned for young pages.</div><div class='add'>+</div><div class='add'>+Note that Bloom filters are probabilistic on set membership. If a test</div><div class='add'>+is false positive, the cost is an additional scan of a range of PTEs,</div><div class='add'>+which may yield hot pages anyway. Parameters of the filter itself can</div><div class='add'>+control the false positive rate in the limit.</div><div class='add'>+</div><div class='add'>+PID controller</div><div class='add'>+--------------</div><div class='add'>+A feedback loop modeled after the Proportional-Integral-Derivative</div><div class='add'>+(PID) controller monitors refaults over anon and file types and</div><div class='add'>+decides which type to evict when both types are available from the</div><div class='add'>+same generation.</div><div class='add'>+</div><div class='add'>+The PID controller uses generations rather than the wall clock as the</div><div class='add'>+time domain because a CPU can scan pages at different rates under</div><div class='add'>+varying memory pressure. It calculates a moving average for each new</div><div class='add'>+generation to avoid being permanently locked in a suboptimal state.</div><div class='add'>+</div><div class='add'>+Memcg LRU</div><div class='add'>+---------</div><div class='add'>+An memcg LRU is a per-node LRU of memcgs. It is also an LRU of LRUs,</div><div class='add'>+since each node and memcg combination has an LRU of folios (see</div><div class='add'>+``mem_cgroup_lruvec()``). Its goal is to improve the scalability of</div><div class='add'>+global reclaim, which is critical to system-wide memory overcommit in</div><div class='add'>+data centers. Note that memcg LRU only applies to global reclaim.</div><div class='add'>+</div><div class='add'>+The basic structure of an memcg LRU can be understood by an analogy to</div><div class='add'>+the active/inactive LRU (of folios):</div><div class='add'>+</div><div class='add'>+1. It has the young and the old (generations), i.e., the counterparts</div><div class='add'>+   to the active and the inactive;</div><div class='add'>+2. The increment of ``max_seq`` triggers promotion, i.e., the</div><div class='add'>+   counterpart to activation;</div><div class='add'>+3. Other events trigger similar operations, e.g., offlining an memcg</div><div class='add'>+   triggers demotion, i.e., the counterpart to deactivation.</div><div class='add'>+</div><div class='add'>+In terms of global reclaim, it has two distinct features:</div><div class='add'>+</div><div class='add'>+1. Sharding, which allows each thread to start at a random memcg (in</div><div class='add'>+   the old generation) and improves parallelism;</div><div class='add'>+2. Eventual fairness, which allows direct reclaim to bail out at will</div><div class='add'>+   and reduces latency without affecting fairness over some time.</div><div class='add'>+</div><div class='add'>+In terms of traversing memcgs during global reclaim, it improves the</div><div class='add'>+best-case complexity from O(n) to O(1) and does not affect the</div><div class='add'>+worst-case complexity O(n). Therefore, on average, it has a sublinear</div><div class='add'>+complexity.</div><div class='add'>+</div><div class='add'>+Summary</div><div class='add'>+-------</div><div class='add'>+The multi-gen LRU (of folios) can be disassembled into the following</div><div class='add'>+parts:</div><div class='add'>+</div><div class='add'>+* Generations</div><div class='add'>+* Rmap walks</div><div class='add'>+* Page table walks via ``mm_struct`` list</div><div class='add'>+* Bloom filters for rmap/PT walk feedback</div><div class='add'>+* PID controller for refault feedback</div><div class='add'>+</div><div class='add'>+The aging and the eviction form a producer-consumer model;</div><div class='add'>+specifically, the latter drives the former by the sliding window over</div><div class='add'>+generations. Within the aging, rmap walks drive page table walks by</div><div class='add'>+inserting hot densely populated page tables to the Bloom filters.</div><div class='add'>+Within the eviction, the PID controller uses refaults as the feedback</div><div class='add'>+to select types to evict and tiers to protect.</div><div class='head'>diff --git a/Documentation/vm/numa.rst b/Documentation/mm/numa.rst<br/>index 99fdeca917ca..0f1b56809dca 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/numa.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/numa.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/numa.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/numa.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _numa:</div><div class='del'>-</div><div class='ctx'> Started Nov 1999 by Kanoj Sarcar &lt;kanoj@sgi.com&gt;</div><div class='ctx'> </div><div class='ctx'> =============</div><div class='hunk'>@@ -64,7 +62,7 @@ In addition, for some architectures, again x86 is an example, Linux supports</div><div class='ctx'> the emulation of additional nodes.  For NUMA emulation, linux will carve up</div><div class='ctx'> the existing nodes--or the system memory for non-NUMA platforms--into multiple</div><div class='ctx'> nodes.  Each emulated node will manage a fraction of the underlying cells'</div><div class='del'>-physical memory.  NUMA emluation is useful for testing NUMA kernel and</div><div class='add'>+physical memory.  NUMA emulation is useful for testing NUMA kernel and</div><div class='ctx'> application features on non-NUMA platforms, and as a sort of memory resource</div><div class='ctx'> management mechanism when used together with cpusets.</div><div class='ctx'> [see Documentation/admin-guide/cgroup-v1/cpusets.rst]</div><div class='hunk'>@@ -110,7 +108,7 @@ to improve NUMA locality using various CPU affinity command line interfaces,</div><div class='ctx'> such as taskset(1) and numactl(1), and program interfaces such as</div><div class='ctx'> sched_setaffinity(2).  Further, one can modify the kernel's default local</div><div class='ctx'> allocation behavior using Linux NUMA memory policy. [see</div><div class='del'>-:ref:`Documentation/admin-guide/mm/numa_memory_policy.rst &lt;numa_memory_policy&gt;`].</div><div class='add'>+Documentation/admin-guide/mm/numa_memory_policy.rst].</div><div class='ctx'> </div><div class='ctx'> System administrators can restrict the CPUs and nodes' memories that a non-</div><div class='ctx'> privileged user can specify in the scheduling or NUMA commands and functions</div><div class='head'>diff --git a/Documentation/mm/oom.rst b/Documentation/mm/oom.rst<br/>new file mode 100644<br/>index 000000000000..18e9e40c1ec1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/oom.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/oom.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+======================</div><div class='add'>+Out Of Memory Handling</div><div class='add'>+======================</div><div class='head'>diff --git a/Documentation/vm/overcommit-accounting.rst b/Documentation/mm/overcommit-accounting.rst<br/>index 1addb0c374a4..a4895d6fc1c2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/overcommit-accounting.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/overcommit-accounting.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/overcommit-accounting.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/overcommit-accounting.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _overcommit_accounting:</div><div class='del'>-</div><div class='ctx'> =====================</div><div class='ctx'> Overcommit Accounting</div><div class='ctx'> =====================</div><div class='head'>diff --git a/Documentation/mm/page_allocation.rst b/Documentation/mm/page_allocation.rst<br/>new file mode 100644<br/>index 000000000000..d9b4495561f1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_allocation.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_allocation.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===============</div><div class='add'>+Page Allocation</div><div class='add'>+===============</div><div class='head'>diff --git a/Documentation/mm/page_cache.rst b/Documentation/mm/page_cache.rst<br/>new file mode 100644<br/>index 000000000000..75eba7c431b2<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_cache.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_cache.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==========</div><div class='add'>+Page Cache</div><div class='add'>+==========</div><div class='head'>diff --git a/Documentation/vm/page_frags.rst b/Documentation/mm/page_frags.rst<br/>index 7d6f9385d129..a81617e688a8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/page_frags.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/page_frags.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_frags.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_frags.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _page_frags:</div><div class='del'>-</div><div class='ctx'> ==============</div><div class='ctx'> Page fragments</div><div class='ctx'> ==============</div><div class='head'>diff --git a/Documentation/vm/page_migration.rst b/Documentation/mm/page_migration.rst<br/>index 8c5cb8147e55..313dce18893e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/page_migration.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/page_migration.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_migration.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_migration.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _page_migration:</div><div class='del'>-</div><div class='ctx'> ==============</div><div class='ctx'> Page migration</div><div class='ctx'> ==============</div><div class='hunk'>@@ -9,8 +7,8 @@ nodes in a NUMA system while the process is running. This means that the</div><div class='ctx'> virtual addresses that the process sees do not change. However, the</div><div class='ctx'> system rearranges the physical location of those pages.</div><div class='ctx'> </div><div class='del'>-Also see :ref:`Heterogeneous Memory Management (HMM) &lt;hmm&gt;`</div><div class='del'>-for migrating pages to or from device private memory.</div><div class='add'>+Also see Documentation/mm/hmm.rst for migrating pages to or from device</div><div class='add'>+private memory.</div><div class='ctx'> </div><div class='ctx'> The main intent of page migration is to reduce the latency of memory accesses</div><div class='ctx'> by moving pages near to the processor where the process accessing that memory</div><div class='hunk'>@@ -152,110 +150,15 @@ Steps:</div><div class='ctx'> Non-LRU page migration</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='del'>-Although migration originally aimed for reducing the latency of memory accesses</div><div class='del'>-for NUMA, compaction also uses migration to create high-order pages.</div><div class='del'>-</div><div class='del'>-Current problem of the implementation is that it is designed to migrate only</div><div class='del'>-*LRU* pages. However, there are potential non-LRU pages which can be migrated</div><div class='del'>-in drivers, for example, zsmalloc, virtio-balloon pages.</div><div class='del'>-</div><div class='del'>-For virtio-balloon pages, some parts of migration code path have been hooked</div><div class='del'>-up and added virtio-balloon specific functions to intercept migration logics.</div><div class='del'>-It's too specific to a driver so other drivers who want to make their pages</div><div class='del'>-movable would have to add their own specific hooks in the migration path.</div><div class='del'>-</div><div class='del'>-To overcome the problem, VM supports non-LRU page migration which provides</div><div class='del'>-generic functions for non-LRU movable pages without driver specific hooks</div><div class='del'>-in the migration path.</div><div class='del'>-</div><div class='del'>-If a driver wants to make its pages movable, it should define three functions</div><div class='del'>-which are function pointers of struct address_space_operations.</div><div class='del'>-</div><div class='del'>-1. ``bool (*isolate_page) (struct page *page, isolate_mode_t mode);``</div><div class='del'>-</div><div class='del'>-   What VM expects from isolate_page() function of driver is to return *true*</div><div class='del'>-   if driver isolates the page successfully. On returning true, VM marks the page</div><div class='del'>-   as PG_isolated so concurrent isolation in several CPUs skip the page</div><div class='del'>-   for isolation. If a driver cannot isolate the page, it should return *false*.</div><div class='del'>-</div><div class='del'>-   Once page is successfully isolated, VM uses page.lru fields so driver</div><div class='del'>-   shouldn't expect to preserve values in those fields.</div><div class='del'>-</div><div class='del'>-2. ``int (*migratepage) (struct address_space *mapping,``</div><div class='del'>-|	``struct page *newpage, struct page *oldpage, enum migrate_mode);``</div><div class='del'>-</div><div class='del'>-   After isolation, VM calls migratepage() of driver with the isolated page.</div><div class='del'>-   The function of migratepage() is to move the contents of the old page to the</div><div class='del'>-   new page</div><div class='del'>-   and set up fields of struct page newpage. Keep in mind that you should</div><div class='del'>-   indicate to the VM the oldpage is no longer movable via __ClearPageMovable()</div><div class='del'>-   under page_lock if you migrated the oldpage successfully and returned</div><div class='del'>-   MIGRATEPAGE_SUCCESS. If driver cannot migrate the page at the moment, driver</div><div class='del'>-   can return -EAGAIN. On -EAGAIN, VM will retry page migration in a short time</div><div class='del'>-   because VM interprets -EAGAIN as "temporary migration failure". On returning</div><div class='del'>-   any error except -EAGAIN, VM will give up the page migration without</div><div class='del'>-   retrying.</div><div class='del'>-</div><div class='del'>-   Driver shouldn't touch the page.lru field while in the migratepage() function.</div><div class='del'>-</div><div class='del'>-3. ``void (*putback_page)(struct page *);``</div><div class='del'>-</div><div class='del'>-   If migration fails on the isolated page, VM should return the isolated page</div><div class='del'>-   to the driver so VM calls the driver's putback_page() with the isolated page.</div><div class='del'>-   In this function, the driver should put the isolated page back into its own data</div><div class='del'>-   structure.</div><div class='add'>+Although migration originally aimed for reducing the latency of memory</div><div class='add'>+accesses for NUMA, compaction also uses migration to create high-order</div><div class='add'>+pages.  For compaction purposes, it is also useful to be able to move</div><div class='add'>+non-LRU pages, such as zsmalloc and virtio-balloon pages.</div><div class='ctx'> </div><div class='del'>-Non-LRU movable page flags</div><div class='del'>-</div><div class='del'>-   There are two page flags for supporting non-LRU movable page.</div><div class='del'>-</div><div class='del'>-   * PG_movable</div><div class='del'>-</div><div class='del'>-     Driver should use the function below to make page movable under page_lock::</div><div class='del'>-</div><div class='del'>-	void __SetPageMovable(struct page *page, struct address_space *mapping)</div><div class='del'>-</div><div class='del'>-     It needs argument of address_space for registering migration</div><div class='del'>-     family functions which will be called by VM. Exactly speaking,</div><div class='del'>-     PG_movable is not a real flag of struct page. Rather, VM</div><div class='del'>-     reuses the page-&gt;mapping's lower bits to represent it::</div><div class='del'>-</div><div class='del'>-	#define PAGE_MAPPING_MOVABLE 0x2</div><div class='del'>-	page-&gt;mapping = page-&gt;mapping | PAGE_MAPPING_MOVABLE;</div><div class='del'>-</div><div class='del'>-     so driver shouldn't access page-&gt;mapping directly. Instead, driver should</div><div class='del'>-     use page_mapping() which masks off the low two bits of page-&gt;mapping under</div><div class='del'>-     page lock so it can get the right struct address_space.</div><div class='del'>-</div><div class='del'>-     For testing of non-LRU movable pages, VM supports __PageMovable() function.</div><div class='del'>-     However, it doesn't guarantee to identify non-LRU movable pages because</div><div class='del'>-     the page-&gt;mapping field is unified with other variables in struct page.</div><div class='del'>-     If the driver releases the page after isolation by VM, page-&gt;mapping</div><div class='del'>-     doesn't have a stable value although it has PAGE_MAPPING_MOVABLE set</div><div class='del'>-     (look at __ClearPageMovable). But __PageMovable() is cheap to call whether</div><div class='del'>-     page is LRU or non-LRU movable once the page has been isolated because LRU</div><div class='del'>-     pages can never have PAGE_MAPPING_MOVABLE set in page-&gt;mapping. It is also</div><div class='del'>-     good for just peeking to test non-LRU movable pages before more expensive</div><div class='del'>-     checking with lock_page() in pfn scanning to select a victim.</div><div class='del'>-</div><div class='del'>-     For guaranteeing non-LRU movable page, VM provides PageMovable() function.</div><div class='del'>-     Unlike __PageMovable(), PageMovable() validates page-&gt;mapping and</div><div class='del'>-     mapping-&gt;a_ops-&gt;isolate_page under lock_page(). The lock_page() prevents</div><div class='del'>-     sudden destroying of page-&gt;mapping.</div><div class='del'>-</div><div class='del'>-     Drivers using __SetPageMovable() should clear the flag via</div><div class='del'>-     __ClearMovablePage() under page_lock() before the releasing the page.</div><div class='del'>-</div><div class='del'>-   * PG_isolated</div><div class='del'>-</div><div class='del'>-     To prevent concurrent isolation among several CPUs, VM marks isolated page</div><div class='del'>-     as PG_isolated under lock_page(). So if a CPU encounters PG_isolated</div><div class='del'>-     non-LRU movable page, it can skip it. Driver doesn't need to manipulate the</div><div class='del'>-     flag because VM will set/clear it automatically. Keep in mind that if the</div><div class='del'>-     driver sees a PG_isolated page, it means the page has been isolated by the</div><div class='del'>-     VM so it shouldn't touch the page.lru field.</div><div class='del'>-     The PG_isolated flag is aliased with the PG_reclaim flag so drivers</div><div class='del'>-     shouldn't use PG_isolated for its own purposes.</div><div class='add'>+If a driver wants to make its pages movable, it should define a struct</div><div class='add'>+movable_operations.  It then needs to call __SetPageMovable() on each</div><div class='add'>+page that it may be able to move.  This uses the ``page-&gt;mapping`` field,</div><div class='add'>+so this field is not available for the driver to use for other purposes.</div><div class='ctx'> </div><div class='ctx'> Monitoring Migration</div><div class='ctx'> =====================</div><div class='hunk'>@@ -286,3 +189,5 @@ THP_MIGRATION_FAIL and PGMIGRATE_FAIL to increase.</div><div class='ctx'> </div><div class='ctx'> Christoph Lameter, May 8, 2006.</div><div class='ctx'> Minchan Kim, Mar 28, 2016.</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/migrate.h</div><div class='head'>diff --git a/Documentation/vm/page_owner.rst b/Documentation/mm/page_owner.rst<br/>index 65204d7f004f..62e3f7ab23cc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/page_owner.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/page_owner.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_owner.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_owner.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _page_owner:</div><div class='del'>-</div><div class='ctx'> ==================================================</div><div class='ctx'> page owner: Tracking about who allocated each page</div><div class='ctx'> ==================================================</div><div class='hunk'>@@ -38,22 +36,10 @@ not affect to allocation performance, especially if the static keys jump</div><div class='ctx'> label patching functionality is available. Following is the kernel's code</div><div class='ctx'> size change due to this facility.</div><div class='ctx'> </div><div class='del'>-- Without page owner::</div><div class='del'>-</div><div class='del'>-   text    data     bss     dec     hex filename</div><div class='del'>-   48392   2333     644   51369    c8a9 mm/page_alloc.o</div><div class='del'>-</div><div class='del'>-- With page owner::</div><div class='del'>-</div><div class='del'>-   text    data     bss     dec     hex filename</div><div class='del'>-   48800   2445     644   51889    cab1 mm/page_alloc.o</div><div class='del'>-   6662     108      29    6799    1a8f mm/page_owner.o</div><div class='del'>-   1025       8       8    1041     411 mm/page_ext.o</div><div class='del'>-</div><div class='del'>-Although, roughly, 8 KB code is added in total, page_alloc.o increase by</div><div class='del'>-520 bytes and less than half of it is in hotpath. Building the kernel with</div><div class='del'>-page owner and turning it on if needed would be great option to debug</div><div class='del'>-kernel memory problem.</div><div class='add'>+Although enabling page owner increases kernel size by several kilobytes,</div><div class='add'>+most of this code is outside page allocator and its hot path. Building</div><div class='add'>+the kernel with page owner and turning it on if needed would be great</div><div class='add'>+option to debug kernel memory problem.</div><div class='ctx'> </div><div class='ctx'> There is one notice that is caused by implementation detail. page owner</div><div class='ctx'> stores information into the memory from struct page extension. This memory</div><div class='hunk'>@@ -64,7 +50,7 @@ pages are investigated and marked as allocated in initialization phase.</div><div class='ctx'> Although it doesn't mean that they have the right owner information,</div><div class='ctx'> at least, we can tell whether the page is allocated or not,</div><div class='ctx'> more accurately. On 2GB memory x86-64 VM box, 13343 early allocated pages</div><div class='del'>-are catched and marked, although they are mostly allocated from struct</div><div class='add'>+are caught and marked, although they are mostly allocated from struct</div><div class='ctx'> page extension feature. Anyway, after that, no page is left in</div><div class='ctx'> un-tracking state.</div><div class='ctx'> </div><div class='hunk'>@@ -73,7 +59,7 @@ Usage</div><div class='ctx'> </div><div class='ctx'> 1) Build user-space helper::</div><div class='ctx'> </div><div class='del'>-	cd tools/vm</div><div class='add'>+	cd tools/mm</div><div class='ctx'> 	make page_owner_sort</div><div class='ctx'> </div><div class='ctx'> 2) Enable page owner: add "page_owner=on" to boot cmdline.</div><div class='hunk'>@@ -94,6 +80,11 @@ Usage</div><div class='ctx'> 	Page allocated via order XXX, ...</div><div class='ctx'> 	PFN XXX ...</div><div class='ctx'> 	// Detailed stack</div><div class='add'>+    By default, it will do full pfn dump, to start with a given pfn,</div><div class='add'>+    page_owner supports fseek.</div><div class='add'>+</div><div class='add'>+    FILE *fp = fopen("/sys/kernel/debug/page_owner", "r");</div><div class='add'>+    fseek(fp, pfn_start, SEEK_SET);</div><div class='ctx'> </div><div class='ctx'>    The ``page_owner_sort`` tool ignores ``PFN`` rows, puts the remaining rows</div><div class='ctx'>    in buf, uses regexp to extract the page order value, counts the times</div><div class='hunk'>@@ -110,7 +101,7 @@ Usage</div><div class='ctx'>    If you want to sort by the page nums of buf, use the ``-m`` parameter.</div><div class='ctx'>    The detailed parameters are:</div><div class='ctx'> </div><div class='del'>-   fundamental function:</div><div class='add'>+   fundamental function::</div><div class='ctx'> </div><div class='ctx'> 	Sort:</div><div class='ctx'> 		-a		Sort by memory allocation time.</div><div class='hunk'>@@ -121,15 +112,22 @@ Usage</div><div class='ctx'> 		-r		Sort by memory release time.</div><div class='ctx'> 		-s		Sort by stack trace.</div><div class='ctx'> 		-t		Sort by times (default).</div><div class='add'>+		--sort &lt;order&gt;	Specify sorting order.  Sorting syntax is [+|-]key[,[+|-]key[,...]].</div><div class='add'>+				Choose a key from the **STANDARD FORMAT SPECIFIERS** section. The "+" is</div><div class='add'>+				optional since default direction is increasing numerical or lexicographic</div><div class='add'>+				order. Mixed use of abbreviated and complete-form of keys is allowed.</div><div class='ctx'> </div><div class='del'>-   additional function:</div><div class='add'>+		Examples:</div><div class='add'>+				./page_owner_sort &lt;input&gt; &lt;output&gt; --sort=n,+pid,-tgid</div><div class='add'>+				./page_owner_sort &lt;input&gt; &lt;output&gt; --sort=at</div><div class='add'>+</div><div class='add'>+   additional function::</div><div class='ctx'> </div><div class='ctx'> 	Cull:</div><div class='ctx'> 		--cull &lt;rules&gt;</div><div class='ctx'> 				Specify culling rules.Culling syntax is key[,key[,...]].Choose a</div><div class='ctx'> 				multi-letter key from the **STANDARD FORMAT SPECIFIERS** section.</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 		&lt;rules&gt; is a single argument in the form of a comma-separated list,</div><div class='ctx'> 		which offers a way to specify individual culling rules.  The recognized</div><div class='ctx'> 		keywords are described in the **STANDARD FORMAT SPECIFIERS** section below.</div><div class='hunk'>@@ -137,7 +135,6 @@ Usage</div><div class='ctx'> 		the STANDARD SORT KEYS section below. Mixed use of abbreviated and</div><div class='ctx'> 		complete-form of keys is allowed.</div><div class='ctx'> </div><div class='del'>-</div><div class='ctx'> 		Examples:</div><div class='ctx'> 				./page_owner_sort &lt;input&gt; &lt;output&gt; --cull=stacktrace</div><div class='ctx'> 				./page_owner_sort &lt;input&gt; &lt;output&gt; --cull=st,pid,name</div><div class='hunk'>@@ -147,16 +144,44 @@ Usage</div><div class='ctx'> 		-f		Filter out the information of blocks whose memory has been released.</div><div class='ctx'> </div><div class='ctx'> 	Select:</div><div class='del'>-		--pid &lt;PID&gt;		Select by pid.</div><div class='del'>-		--tgid &lt;TGID&gt;		Select by tgid.</div><div class='del'>-		--name &lt;command&gt;	Select by task command name.</div><div class='add'>+		--pid &lt;pidlist&gt;		Select by pid. This selects the blocks whose process ID</div><div class='add'>+					numbers appear in &lt;pidlist&gt;.</div><div class='add'>+		--tgid &lt;tgidlist&gt;	Select by tgid. This selects the blocks whose thread</div><div class='add'>+					group ID numbers appear in &lt;tgidlist&gt;.</div><div class='add'>+		--name &lt;cmdlist&gt;	Select by task command name. This selects the blocks whose</div><div class='add'>+					task command name appear in &lt;cmdlist&gt;.</div><div class='add'>+</div><div class='add'>+		&lt;pidlist&gt;, &lt;tgidlist&gt;, &lt;cmdlist&gt; are single arguments in the form of a comma-separated list,</div><div class='add'>+		which offers a way to specify individual selecting rules.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+		Examples:</div><div class='add'>+				./page_owner_sort &lt;input&gt; &lt;output&gt; --pid=1</div><div class='add'>+				./page_owner_sort &lt;input&gt; &lt;output&gt; --tgid=1,2,3</div><div class='add'>+				./page_owner_sort &lt;input&gt; &lt;output&gt; --name name1,name2</div><div class='ctx'> </div><div class='ctx'> STANDARD FORMAT SPECIFIERS</div><div class='ctx'> ==========================</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+  For --sort option:</div><div class='add'>+</div><div class='add'>+	KEY		LONG		DESCRIPTION</div><div class='add'>+	p		pid		process ID</div><div class='add'>+	tg		tgid		thread group ID</div><div class='add'>+	n		name		task command name</div><div class='add'>+	st		stacktrace	stack trace of the page allocation</div><div class='add'>+	T		txt		full text of block</div><div class='add'>+	ft		free_ts		timestamp of the page when it was released</div><div class='add'>+	at		alloc_ts	timestamp of the page when it was allocated</div><div class='add'>+	ator		allocator	memory allocator for pages</div><div class='add'>+</div><div class='add'>+  For --cull option:</div><div class='ctx'> </div><div class='ctx'> 	KEY		LONG		DESCRIPTION</div><div class='ctx'> 	p		pid		process ID</div><div class='ctx'> 	tg		tgid		thread group ID</div><div class='ctx'> 	n		name		task command name</div><div class='ctx'> 	f		free		whether the page has been released or not</div><div class='del'>-	st		stacktrace	stace trace of the page allocation</div><div class='add'>+	st		stacktrace	stack trace of the page allocation</div><div class='add'>+	ator		allocator	memory allocator for pages</div><div class='head'>diff --git a/Documentation/mm/page_reclaim.rst b/Documentation/mm/page_reclaim.rst<br/>new file mode 100644<br/>index 000000000000..50a30b7f8ac3<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_reclaim.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_reclaim.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+============</div><div class='add'>+Page Reclaim</div><div class='add'>+============</div><div class='head'>diff --git a/Documentation/vm/page_table_check.rst b/Documentation/mm/page_table_check.rst<br/>index 1a09472f10a3..cfd8f4117cf3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/page_table_check.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/page_table_check.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_table_check.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_table_check.rst</a></div><div class='hunk'>@@ -1,7 +1,5 @@</div><div class='ctx'> .. SPDX-License-Identifier: GPL-2.0</div><div class='ctx'> </div><div class='del'>-.. _page_table_check:</div><div class='del'>-</div><div class='ctx'> ================</div><div class='ctx'> Page Table Check</div><div class='ctx'> ================</div><div class='head'>diff --git a/Documentation/mm/page_tables.rst b/Documentation/mm/page_tables.rst<br/>new file mode 100644<br/>index 000000000000..96939571d7bc<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/page_tables.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/page_tables.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===========</div><div class='add'>+Page Tables</div><div class='add'>+===========</div><div class='head'>diff --git a/Documentation/mm/physical_memory.rst b/Documentation/mm/physical_memory.rst<br/>new file mode 100644<br/>index 000000000000..531e73b003dd<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/physical_memory.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/physical_memory.rst</a></div><div class='hunk'>@@ -0,0 +1,371 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===============</div><div class='add'>+Physical Memory</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+Linux is available for a wide range of architectures so there is a need for an</div><div class='add'>+architecture-independent abstraction to represent the physical memory. This</div><div class='add'>+chapter describes the structures used to manage physical memory in a running</div><div class='add'>+system.</div><div class='add'>+</div><div class='add'>+The first principal concept prevalent in the memory management is</div><div class='add'>+`Non-Uniform Memory Access (NUMA)</div><div class='add'>+&lt;https://en.wikipedia.org/wiki/Non-uniform_memory_access&gt;`_.</div><div class='add'>+With multi-core and multi-socket machines, memory may be arranged into banks</div><div class='add'>+that incur a different cost to access depending on the “distance” from the</div><div class='add'>+processor. For example, there might be a bank of memory assigned to each CPU or</div><div class='add'>+a bank of memory very suitable for DMA near peripheral devices.</div><div class='add'>+</div><div class='add'>+Each bank is called a node and the concept is represented under Linux by a</div><div class='add'>+``struct pglist_data`` even if the architecture is UMA. This structure is</div><div class='add'>+always referenced by its typedef ``pg_data_t``. A ``pg_data_t`` structure</div><div class='add'>+for a particular node can be referenced by ``NODE_DATA(nid)`` macro where</div><div class='add'>+``nid`` is the ID of that node.</div><div class='add'>+</div><div class='add'>+For NUMA architectures, the node structures are allocated by the architecture</div><div class='add'>+specific code early during boot. Usually, these structures are allocated</div><div class='add'>+locally on the memory bank they represent. For UMA architectures, only one</div><div class='add'>+static ``pg_data_t`` structure called ``contig_page_data`` is used. Nodes will</div><div class='add'>+be discussed further in Section :ref:`Nodes &lt;nodes&gt;`</div><div class='add'>+</div><div class='add'>+The entire physical address space is partitioned into one or more blocks</div><div class='add'>+called zones which represent ranges within memory. These ranges are usually</div><div class='add'>+determined by architectural constraints for accessing the physical memory.</div><div class='add'>+The memory range within a node that corresponds to a particular zone is</div><div class='add'>+described by a ``struct zone``, typedeffed to ``zone_t``. Each zone has</div><div class='add'>+one of the types described below.</div><div class='add'>+</div><div class='add'>+* ``ZONE_DMA`` and ``ZONE_DMA32`` historically represented memory suitable for</div><div class='add'>+  DMA by peripheral devices that cannot access all of the addressable</div><div class='add'>+  memory. For many years there are better more and robust interfaces to get</div><div class='add'>+  memory with DMA specific requirements (Documentation/core-api/dma-api.rst),</div><div class='add'>+  but ``ZONE_DMA`` and ``ZONE_DMA32`` still represent memory ranges that have</div><div class='add'>+  restrictions on how they can be accessed.</div><div class='add'>+  Depending on the architecture, either of these zone types or even they both</div><div class='add'>+  can be disabled at build time using ``CONFIG_ZONE_DMA`` and</div><div class='add'>+  ``CONFIG_ZONE_DMA32`` configuration options. Some 64-bit platforms may need</div><div class='add'>+  both zones as they support peripherals with different DMA addressing</div><div class='add'>+  limitations.</div><div class='add'>+</div><div class='add'>+* ``ZONE_NORMAL`` is for normal memory that can be accessed by the kernel all</div><div class='add'>+  the time. DMA operations can be performed on pages in this zone if the DMA</div><div class='add'>+  devices support transfers to all addressable memory. ``ZONE_NORMAL`` is</div><div class='add'>+  always enabled.</div><div class='add'>+</div><div class='add'>+* ``ZONE_HIGHMEM`` is the part of the physical memory that is not covered by a</div><div class='add'>+  permanent mapping in the kernel page tables. The memory in this zone is only</div><div class='add'>+  accessible to the kernel using temporary mappings. This zone is available</div><div class='add'>+  only on some 32-bit architectures and is enabled with ``CONFIG_HIGHMEM``.</div><div class='add'>+</div><div class='add'>+* ``ZONE_MOVABLE`` is for normal accessible memory, just like ``ZONE_NORMAL``.</div><div class='add'>+  The difference is that the contents of most pages in ``ZONE_MOVABLE`` is</div><div class='add'>+  movable. That means that while virtual addresses of these pages do not</div><div class='add'>+  change, their content may move between different physical pages. Often</div><div class='add'>+  ``ZONE_MOVABLE`` is populated during memory hotplug, but it may be</div><div class='add'>+  also populated on boot using one of ``kernelcore``, ``movablecore`` and</div><div class='add'>+  ``movable_node`` kernel command line parameters. See</div><div class='add'>+  Documentation/mm/page_migration.rst and</div><div class='add'>+  Documentation/admin-guide/mm/memory-hotplug.rst for additional details.</div><div class='add'>+</div><div class='add'>+* ``ZONE_DEVICE`` represents memory residing on devices such as PMEM and GPU.</div><div class='add'>+  It has different characteristics than RAM zone types and it exists to provide</div><div class='add'>+  :ref:`struct page &lt;Pages&gt;` and memory map services for device driver</div><div class='add'>+  identified physical address ranges. ``ZONE_DEVICE`` is enabled with</div><div class='add'>+  configuration option ``CONFIG_ZONE_DEVICE``.</div><div class='add'>+</div><div class='add'>+It is important to note that many kernel operations can only take place using</div><div class='add'>+``ZONE_NORMAL`` so it is the most performance critical zone. Zones are</div><div class='add'>+discussed further in Section :ref:`Zones &lt;zones&gt;`.</div><div class='add'>+</div><div class='add'>+The relation between node and zone extents is determined by the physical memory</div><div class='add'>+map reported by the firmware, architectural constraints for memory addressing</div><div class='add'>+and certain parameters in the kernel command line.</div><div class='add'>+</div><div class='add'>+For example, with 32-bit kernel on an x86 UMA machine with 2 Gbytes of RAM the</div><div class='add'>+entire memory will be on node 0 and there will be three zones: ``ZONE_DMA``,</div><div class='add'>+``ZONE_NORMAL`` and ``ZONE_HIGHMEM``::</div><div class='add'>+</div><div class='add'>+  0                                                            2G</div><div class='add'>+  +-------------------------------------------------------------+</div><div class='add'>+  |                            node 0                           |</div><div class='add'>+  +-------------------------------------------------------------+</div><div class='add'>+</div><div class='add'>+  0         16M                    896M                        2G</div><div class='add'>+  +----------+-----------------------+--------------------------+</div><div class='add'>+  | ZONE_DMA |      ZONE_NORMAL      |       ZONE_HIGHMEM       |</div><div class='add'>+  +----------+-----------------------+--------------------------+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+With a kernel built with ``ZONE_DMA`` disabled and ``ZONE_DMA32`` enabled and</div><div class='add'>+booted with ``movablecore=80%`` parameter on an arm64 machine with 16 Gbytes of</div><div class='add'>+RAM equally split between two nodes, there will be ``ZONE_DMA32``,</div><div class='add'>+``ZONE_NORMAL`` and ``ZONE_MOVABLE`` on node 0, and ``ZONE_NORMAL`` and</div><div class='add'>+``ZONE_MOVABLE`` on node 1::</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  1G                                9G                         17G</div><div class='add'>+  +--------------------------------+ +--------------------------+</div><div class='add'>+  |              node 0            | |          node 1          |</div><div class='add'>+  +--------------------------------+ +--------------------------+</div><div class='add'>+</div><div class='add'>+  1G       4G        4200M          9G          9320M          17G</div><div class='add'>+  +---------+----------+-----------+ +------------+-------------+</div><div class='add'>+  |  DMA32  |  NORMAL  |  MOVABLE  | |   NORMAL   |   MOVABLE   |</div><div class='add'>+  +---------+----------+-----------+ +------------+-------------+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Memory banks may belong to interleaving nodes. In the example below an x86</div><div class='add'>+machine has 16 Gbytes of RAM in 4 memory banks, even banks belong to node 0</div><div class='add'>+and odd banks belong to node 1::</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+  0              4G              8G             12G            16G</div><div class='add'>+  +-------------+ +-------------+ +-------------+ +-------------+</div><div class='add'>+  |    node 0   | |    node 1   | |    node 0   | |    node 1   |</div><div class='add'>+  +-------------+ +-------------+ +-------------+ +-------------+</div><div class='add'>+</div><div class='add'>+  0   16M      4G</div><div class='add'>+  +-----+-------+ +-------------+ +-------------+ +-------------+</div><div class='add'>+  | DMA | DMA32 | |    NORMAL   | |    NORMAL   | |    NORMAL   |</div><div class='add'>+  +-----+-------+ +-------------+ +-------------+ +-------------+</div><div class='add'>+</div><div class='add'>+In this case node 0 will span from 0 to 12 Gbytes and node 1 will span from</div><div class='add'>+4 to 16 Gbytes.</div><div class='add'>+</div><div class='add'>+.. _nodes:</div><div class='add'>+</div><div class='add'>+Nodes</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+As we have mentioned, each node in memory is described by a ``pg_data_t`` which</div><div class='add'>+is a typedef for a ``struct pglist_data``. When allocating a page, by default</div><div class='add'>+Linux uses a node-local allocation policy to allocate memory from the node</div><div class='add'>+closest to the running CPU. As processes tend to run on the same CPU, it is</div><div class='add'>+likely the memory from the current node will be used. The allocation policy can</div><div class='add'>+be controlled by users as described in</div><div class='add'>+Documentation/admin-guide/mm/numa_memory_policy.rst.</div><div class='add'>+</div><div class='add'>+Most NUMA architectures maintain an array of pointers to the node</div><div class='add'>+structures. The actual structures are allocated early during boot when</div><div class='add'>+architecture specific code parses the physical memory map reported by the</div><div class='add'>+firmware. The bulk of the node initialization happens slightly later in the</div><div class='add'>+boot process by free_area_init() function, described later in Section</div><div class='add'>+:ref:`Initialization &lt;initialization&gt;`.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Along with the node structures, kernel maintains an array of ``nodemask_t``</div><div class='add'>+bitmasks called ``node_states``. Each bitmask in this array represents a set of</div><div class='add'>+nodes with particular properties as defined by ``enum node_states``:</div><div class='add'>+</div><div class='add'>+``N_POSSIBLE``</div><div class='add'>+  The node could become online at some point.</div><div class='add'>+``N_ONLINE``</div><div class='add'>+  The node is online.</div><div class='add'>+``N_NORMAL_MEMORY``</div><div class='add'>+  The node has regular memory.</div><div class='add'>+``N_HIGH_MEMORY``</div><div class='add'>+  The node has regular or high memory. When ``CONFIG_HIGHMEM`` is disabled</div><div class='add'>+  aliased to ``N_NORMAL_MEMORY``.</div><div class='add'>+``N_MEMORY``</div><div class='add'>+  The node has memory(regular, high, movable)</div><div class='add'>+``N_CPU``</div><div class='add'>+  The node has one or more CPUs</div><div class='add'>+</div><div class='add'>+For each node that has a property described above, the bit corresponding to the</div><div class='add'>+node ID in the ``node_states[&lt;property&gt;]`` bitmask is set.</div><div class='add'>+</div><div class='add'>+For example, for node 2 with normal memory and CPUs, bit 2 will be set in ::</div><div class='add'>+</div><div class='add'>+  node_states[N_POSSIBLE]</div><div class='add'>+  node_states[N_ONLINE]</div><div class='add'>+  node_states[N_NORMAL_MEMORY]</div><div class='add'>+  node_states[N_HIGH_MEMORY]</div><div class='add'>+  node_states[N_MEMORY]</div><div class='add'>+  node_states[N_CPU]</div><div class='add'>+</div><div class='add'>+For various operations possible with nodemasks please refer to</div><div class='add'>+``include/linux/nodemask.h``.</div><div class='add'>+</div><div class='add'>+Among other things, nodemasks are used to provide macros for node traversal,</div><div class='add'>+namely ``for_each_node()`` and ``for_each_online_node()``.</div><div class='add'>+</div><div class='add'>+For instance, to call a function foo() for each online node::</div><div class='add'>+</div><div class='add'>+	for_each_online_node(nid) {</div><div class='add'>+		pg_data_t *pgdat = NODE_DATA(nid);</div><div class='add'>+</div><div class='add'>+		foo(pgdat);</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+Node structure</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+The nodes structure ``struct pglist_data`` is declared in</div><div class='add'>+``include/linux/mmzone.h``. Here we briefly describe fields of this</div><div class='add'>+structure:</div><div class='add'>+</div><div class='add'>+General</div><div class='add'>+~~~~~~~</div><div class='add'>+</div><div class='add'>+``node_zones``</div><div class='add'>+  The zones for this node.  Not all of the zones may be populated, but it is</div><div class='add'>+  the full list. It is referenced by this node's node_zonelists as well as</div><div class='add'>+  other node's node_zonelists.</div><div class='add'>+</div><div class='add'>+``node_zonelists``</div><div class='add'>+  The list of all zones in all nodes. This list defines the order of zones</div><div class='add'>+  that allocations are preferred from. The ``node_zonelists`` is set up by</div><div class='add'>+  ``build_zonelists()`` in ``mm/page_alloc.c`` during the initialization of</div><div class='add'>+  core memory management structures.</div><div class='add'>+</div><div class='add'>+``nr_zones``</div><div class='add'>+  Number of populated zones in this node.</div><div class='add'>+</div><div class='add'>+``node_mem_map``</div><div class='add'>+  For UMA systems that use FLATMEM memory model the 0's node</div><div class='add'>+  ``node_mem_map`` is array of struct pages representing each physical frame.</div><div class='add'>+</div><div class='add'>+``node_page_ext``</div><div class='add'>+  For UMA systems that use FLATMEM memory model the 0's node</div><div class='add'>+  ``node_page_ext`` is array of extensions of struct pages. Available only</div><div class='add'>+  in the kernels built with ``CONFIG_PAGE_EXTENSION`` enabled.</div><div class='add'>+</div><div class='add'>+``node_start_pfn``</div><div class='add'>+  The page frame number of the starting page frame in this node.</div><div class='add'>+</div><div class='add'>+``node_present_pages``</div><div class='add'>+  Total number of physical pages present in this node.</div><div class='add'>+</div><div class='add'>+``node_spanned_pages``</div><div class='add'>+  Total size of physical page range, including holes.</div><div class='add'>+</div><div class='add'>+``node_size_lock``</div><div class='add'>+  A lock that protects the fields defining the node extents. Only defined when</div><div class='add'>+  at least one of ``CONFIG_MEMORY_HOTPLUG`` or</div><div class='add'>+  ``CONFIG_DEFERRED_STRUCT_PAGE_INIT`` configuration options are enabled.</div><div class='add'>+  ``pgdat_resize_lock()`` and ``pgdat_resize_unlock()`` are provided to</div><div class='add'>+  manipulate ``node_size_lock`` without checking for ``CONFIG_MEMORY_HOTPLUG``</div><div class='add'>+  or ``CONFIG_DEFERRED_STRUCT_PAGE_INIT``.</div><div class='add'>+</div><div class='add'>+``node_id``</div><div class='add'>+  The Node ID (NID) of the node, starts at 0.</div><div class='add'>+</div><div class='add'>+``totalreserve_pages``</div><div class='add'>+  This is a per-node reserve of pages that are not available to userspace</div><div class='add'>+  allocations.</div><div class='add'>+</div><div class='add'>+``first_deferred_pfn``</div><div class='add'>+  If memory initialization on large machines is deferred then this is the first</div><div class='add'>+  PFN that needs to be initialized. Defined only when</div><div class='add'>+  ``CONFIG_DEFERRED_STRUCT_PAGE_INIT`` is enabled</div><div class='add'>+</div><div class='add'>+``deferred_split_queue``</div><div class='add'>+  Per-node queue of huge pages that their split was deferred. Defined only when ``CONFIG_TRANSPARENT_HUGEPAGE`` is enabled.</div><div class='add'>+</div><div class='add'>+``__lruvec``</div><div class='add'>+  Per-node lruvec holding LRU lists and related parameters. Used only when</div><div class='add'>+  memory cgroups are disabled. It should not be accessed directly, use</div><div class='add'>+  ``mem_cgroup_lruvec()`` to look up lruvecs instead.</div><div class='add'>+</div><div class='add'>+Reclaim control</div><div class='add'>+~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+See also Documentation/mm/page_reclaim.rst.</div><div class='add'>+</div><div class='add'>+``kswapd``</div><div class='add'>+  Per-node instance of kswapd kernel thread.</div><div class='add'>+</div><div class='add'>+``kswapd_wait``, ``pfmemalloc_wait``, ``reclaim_wait``</div><div class='add'>+  Workqueues used to synchronize memory reclaim tasks</div><div class='add'>+</div><div class='add'>+``nr_writeback_throttled``</div><div class='add'>+  Number of tasks that are throttled waiting on dirty pages to clean.</div><div class='add'>+</div><div class='add'>+``nr_reclaim_start``</div><div class='add'>+  Number of pages written while reclaim is throttled waiting for writeback.</div><div class='add'>+</div><div class='add'>+``kswapd_order``</div><div class='add'>+  Controls the order kswapd tries to reclaim</div><div class='add'>+</div><div class='add'>+``kswapd_highest_zoneidx``</div><div class='add'>+  The highest zone index to be reclaimed by kswapd</div><div class='add'>+</div><div class='add'>+``kswapd_failures``</div><div class='add'>+  Number of runs kswapd was unable to reclaim any pages</div><div class='add'>+</div><div class='add'>+``min_unmapped_pages``</div><div class='add'>+  Minimal number of unmapped file backed pages that cannot be reclaimed.</div><div class='add'>+  Determined by ``vm.min_unmapped_ratio`` sysctl. Only defined when</div><div class='add'>+  ``CONFIG_NUMA`` is enabled.</div><div class='add'>+</div><div class='add'>+``min_slab_pages``</div><div class='add'>+  Minimal number of SLAB pages that cannot be reclaimed. Determined by</div><div class='add'>+  ``vm.min_slab_ratio sysctl``. Only defined when ``CONFIG_NUMA`` is enabled</div><div class='add'>+</div><div class='add'>+``flags``</div><div class='add'>+  Flags controlling reclaim behavior.</div><div class='add'>+</div><div class='add'>+Compaction control</div><div class='add'>+~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+``kcompactd_max_order``</div><div class='add'>+  Page order that kcompactd should try to achieve.</div><div class='add'>+</div><div class='add'>+``kcompactd_highest_zoneidx``</div><div class='add'>+  The highest zone index to be compacted by kcompactd.</div><div class='add'>+</div><div class='add'>+``kcompactd_wait``</div><div class='add'>+  Workqueue used to synchronize memory compaction tasks.</div><div class='add'>+</div><div class='add'>+``kcompactd``</div><div class='add'>+  Per-node instance of kcompactd kernel thread.</div><div class='add'>+</div><div class='add'>+``proactive_compact_trigger``</div><div class='add'>+  Determines if proactive compaction is enabled. Controlled by</div><div class='add'>+  ``vm.compaction_proactiveness`` sysctl.</div><div class='add'>+</div><div class='add'>+Statistics</div><div class='add'>+~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+``per_cpu_nodestats``</div><div class='add'>+  Per-CPU VM statistics for the node</div><div class='add'>+</div><div class='add'>+``vm_stat``</div><div class='add'>+  VM statistics for the node.</div><div class='add'>+</div><div class='add'>+.. _zones:</div><div class='add'>+</div><div class='add'>+Zones</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+.. admonition:: Stub</div><div class='add'>+</div><div class='add'>+   This section is incomplete. Please list and describe the appropriate fields.</div><div class='add'>+</div><div class='add'>+.. _pages:</div><div class='add'>+</div><div class='add'>+Pages</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+.. admonition:: Stub</div><div class='add'>+</div><div class='add'>+   This section is incomplete. Please list and describe the appropriate fields.</div><div class='add'>+</div><div class='add'>+.. _folios:</div><div class='add'>+</div><div class='add'>+Folios</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+.. admonition:: Stub</div><div class='add'>+</div><div class='add'>+   This section is incomplete. Please list and describe the appropriate fields.</div><div class='add'>+</div><div class='add'>+.. _initialization:</div><div class='add'>+</div><div class='add'>+Initialization</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+.. admonition:: Stub</div><div class='add'>+</div><div class='add'>+   This section is incomplete. Please list and describe the appropriate fields.</div><div class='head'>diff --git a/Documentation/mm/process_addrs.rst b/Documentation/mm/process_addrs.rst<br/>new file mode 100644<br/>index 000000000000..e8618fbc62c9<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/process_addrs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/process_addrs.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=================</div><div class='add'>+Process Addresses</div><div class='add'>+=================</div><div class='head'>diff --git a/Documentation/vm/remap_file_pages.rst b/Documentation/mm/remap_file_pages.rst<br/>index 7bef6718e3a9..297091ce257c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/remap_file_pages.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/remap_file_pages.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/remap_file_pages.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/remap_file_pages.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _remap_file_pages:</div><div class='del'>-</div><div class='ctx'> ==============================</div><div class='ctx'> remap_file_pages() system call</div><div class='ctx'> ==============================</div><div class='head'>diff --git a/Documentation/mm/shmfs.rst b/Documentation/mm/shmfs.rst<br/>new file mode 100644<br/>index 000000000000..8b01ebb4c30e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/shmfs.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/shmfs.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+========================</div><div class='add'>+Shared Memory Filesystem</div><div class='add'>+========================</div><div class='head'>diff --git a/Documentation/mm/slab.rst b/Documentation/mm/slab.rst<br/>new file mode 100644<br/>index 000000000000..87d5a5bb172f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/slab.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/slab.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===============</div><div class='add'>+Slab Allocation</div><div class='add'>+===============</div><div class='head'>diff --git a/Documentation/vm/slub.rst b/Documentation/mm/slub.rst<br/>index d3028554b1e9..be75971532f5 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/slub.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/slub.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/slub.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/slub.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _slub:</div><div class='del'>-</div><div class='ctx'> ==========================</div><div class='ctx'> Short users guide for SLUB</div><div class='ctx'> ==========================</div><div class='hunk'>@@ -21,7 +19,7 @@ slabs that have data in them. See "slabinfo -h" for more options when</div><div class='ctx'> running the command. ``slabinfo`` can be compiled with</div><div class='ctx'> ::</div><div class='ctx'> </div><div class='del'>-	gcc -o slabinfo tools/vm/slabinfo.c</div><div class='add'>+	gcc -o slabinfo tools/mm/slabinfo.c</div><div class='ctx'> </div><div class='ctx'> Some of the modes of operation of ``slabinfo`` require that slub debugging</div><div class='ctx'> be enabled on the command line. F.e. no tracking information will be</div><div class='hunk'>@@ -116,6 +114,8 @@ options from the ``slub_debug`` parameter translate to the following files::</div><div class='ctx'> 	T	trace</div><div class='ctx'> 	A	failslab</div><div class='ctx'> </div><div class='add'>+failslab file is writable, so writing 1 or 0 will enable or disable</div><div class='add'>+the option at runtime. Write returns -EINVAL if cache is an alias.</div><div class='ctx'> Careful with tracing: It may spew out lots of information and never stop if</div><div class='ctx'> used on the wrong slab.</div><div class='ctx'> </div><div class='hunk'>@@ -384,5 +384,78 @@ c) Execute ``slabinfo-gnuplot.sh`` in '-t' mode, passing all of the</div><div class='ctx'>       40,60`` range will plot only samples collected between 40th and</div><div class='ctx'>       60th seconds).</div><div class='ctx'> </div><div class='add'>+</div><div class='add'>+DebugFS files for SLUB</div><div class='add'>+======================</div><div class='add'>+</div><div class='add'>+For more information about current state of SLUB caches with the user tracking</div><div class='add'>+debug option enabled, debugfs files are available, typically under</div><div class='add'>+/sys/kernel/debug/slab/&lt;cache&gt;/ (created only for caches with enabled user</div><div class='add'>+tracking). There are 2 types of these files with the following debug</div><div class='add'>+information:</div><div class='add'>+</div><div class='add'>+1. alloc_traces::</div><div class='add'>+</div><div class='add'>+    Prints information about unique allocation traces of the currently</div><div class='add'>+    allocated objects. The output is sorted by frequency of each trace.</div><div class='add'>+</div><div class='add'>+    Information in the output:</div><div class='add'>+    Number of objects, allocating function, possible memory wastage of</div><div class='add'>+    kmalloc objects(total/per-object), minimal/average/maximal jiffies</div><div class='add'>+    since alloc, pid range of the allocating processes, cpu mask of</div><div class='add'>+    allocating cpus, numa node mask of origins of memory, and stack trace.</div><div class='add'>+</div><div class='add'>+    Example:::</div><div class='add'>+</div><div class='add'>+    338 pci_alloc_dev+0x2c/0xa0 waste=521872/1544 age=290837/291891/293509 pid=1 cpus=106 nodes=0-1</div><div class='add'>+        __kmem_cache_alloc_node+0x11f/0x4e0</div><div class='add'>+        kmalloc_trace+0x26/0xa0</div><div class='add'>+        pci_alloc_dev+0x2c/0xa0</div><div class='add'>+        pci_scan_single_device+0xd2/0x150</div><div class='add'>+        pci_scan_slot+0xf7/0x2d0</div><div class='add'>+        pci_scan_child_bus_extend+0x4e/0x360</div><div class='add'>+        acpi_pci_root_create+0x32e/0x3b0</div><div class='add'>+        pci_acpi_scan_root+0x2b9/0x2d0</div><div class='add'>+        acpi_pci_root_add.cold.11+0x110/0xb0a</div><div class='add'>+        acpi_bus_attach+0x262/0x3f0</div><div class='add'>+        device_for_each_child+0xb7/0x110</div><div class='add'>+        acpi_dev_for_each_child+0x77/0xa0</div><div class='add'>+        acpi_bus_attach+0x108/0x3f0</div><div class='add'>+        device_for_each_child+0xb7/0x110</div><div class='add'>+        acpi_dev_for_each_child+0x77/0xa0</div><div class='add'>+        acpi_bus_attach+0x108/0x3f0</div><div class='add'>+</div><div class='add'>+2. free_traces::</div><div class='add'>+</div><div class='add'>+    Prints information about unique freeing traces of the currently allocated</div><div class='add'>+    objects. The freeing traces thus come from the previous life-cycle of the</div><div class='add'>+    objects and are reported as not available for objects allocated for the first</div><div class='add'>+    time. The output is sorted by frequency of each trace.</div><div class='add'>+</div><div class='add'>+    Information in the output:</div><div class='add'>+    Number of objects, freeing function, minimal/average/maximal jiffies since free,</div><div class='add'>+    pid range of the freeing processes, cpu mask of freeing cpus, and stack trace.</div><div class='add'>+</div><div class='add'>+    Example:::</div><div class='add'>+</div><div class='add'>+    1980 &lt;not-available&gt; age=4294912290 pid=0 cpus=0</div><div class='add'>+    51 acpi_ut_update_ref_count+0x6a6/0x782 age=236886/237027/237772 pid=1 cpus=1</div><div class='add'>+	kfree+0x2db/0x420</div><div class='add'>+	acpi_ut_update_ref_count+0x6a6/0x782</div><div class='add'>+	acpi_ut_update_object_reference+0x1ad/0x234</div><div class='add'>+	acpi_ut_remove_reference+0x7d/0x84</div><div class='add'>+	acpi_rs_get_prt_method_data+0x97/0xd6</div><div class='add'>+	acpi_get_irq_routing_table+0x82/0xc4</div><div class='add'>+	acpi_pci_irq_find_prt_entry+0x8e/0x2e0</div><div class='add'>+	acpi_pci_irq_lookup+0x3a/0x1e0</div><div class='add'>+	acpi_pci_irq_enable+0x77/0x240</div><div class='add'>+	pcibios_enable_device+0x39/0x40</div><div class='add'>+	do_pci_enable_device.part.0+0x5d/0xe0</div><div class='add'>+	pci_enable_device_flags+0xfc/0x120</div><div class='add'>+	pci_enable_device+0x13/0x20</div><div class='add'>+	virtio_pci_probe+0x9e/0x170</div><div class='add'>+	local_pci_probe+0x48/0x80</div><div class='add'>+	pci_device_probe+0x105/0x1c0</div><div class='add'>+</div><div class='ctx'> Christoph Lameter, May 30, 2007</div><div class='ctx'> Sergey Senozhatsky, October 23, 2015</div><div class='head'>diff --git a/Documentation/vm/split_page_table_lock.rst b/Documentation/mm/split_page_table_lock.rst<br/>index c08919662704..50ee0dfc95be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/split_page_table_lock.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/split_page_table_lock.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/split_page_table_lock.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/split_page_table_lock.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _split_page_table_lock:</div><div class='del'>-</div><div class='ctx'> =====================</div><div class='ctx'> Split page table lock</div><div class='ctx'> =====================</div><div class='head'>diff --git a/Documentation/mm/swap.rst b/Documentation/mm/swap.rst<br/>new file mode 100644<br/>index 000000000000..78819bd4d745<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/swap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/swap.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+====</div><div class='add'>+Swap</div><div class='add'>+====</div><div class='head'>diff --git a/Documentation/vm/transhuge.rst b/Documentation/mm/transhuge.rst<br/>index 216db1d67d04..9a607059ea11 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/transhuge.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/transhuge.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/transhuge.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/transhuge.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _transhuge:</div><div class='del'>-</div><div class='ctx'> ============================</div><div class='ctx'> Transparent Hugepage Support</div><div class='ctx'> ============================</div><div class='hunk'>@@ -112,36 +110,20 @@ Refcounts and transparent huge pages</div><div class='ctx'> Refcounting on THP is mostly consistent with refcounting on other compound</div><div class='ctx'> pages:</div><div class='ctx'> </div><div class='del'>-  - get_page()/put_page() and GUP operate on head page's -&gt;_refcount.</div><div class='add'>+  - get_page()/put_page() and GUP operate on the folio-&gt;_refcount.</div><div class='ctx'> </div><div class='ctx'>   - -&gt;_refcount in tail pages is always zero: get_page_unless_zero() never</div><div class='ctx'>     succeeds on tail pages.</div><div class='ctx'> </div><div class='del'>-  - map/unmap of the pages with PTE entry increment/decrement -&gt;_mapcount</div><div class='del'>-    on relevant sub-page of the compound page.</div><div class='del'>-</div><div class='del'>-  - map/unmap of the whole compound page is accounted for in compound_mapcount</div><div class='del'>-    (stored in first tail page). For file huge pages, we also increment</div><div class='del'>-    -&gt;_mapcount of all sub-pages in order to have race-free detection of</div><div class='del'>-    last unmap of subpages.</div><div class='del'>-</div><div class='del'>-PageDoubleMap() indicates that the page is *possibly* mapped with PTEs.</div><div class='del'>-</div><div class='del'>-For anonymous pages, PageDoubleMap() also indicates -&gt;_mapcount in all</div><div class='del'>-subpages is offset up by one. This additional reference is required to</div><div class='del'>-get race-free detection of unmap of subpages when we have them mapped with</div><div class='del'>-both PMDs and PTEs.</div><div class='del'>-</div><div class='del'>-This optimization is required to lower the overhead of per-subpage mapcount</div><div class='del'>-tracking. The alternative is to alter -&gt;_mapcount in all subpages on each</div><div class='del'>-map/unmap of the whole compound page.</div><div class='del'>-</div><div class='del'>-For anonymous pages, we set PG_double_map when a PMD of the page is split</div><div class='del'>-for the first time, but still have a PMD mapping. The additional references</div><div class='del'>-go away with the last compound_mapcount.</div><div class='add'>+  - map/unmap of a PMD entry for the whole THP increment/decrement</div><div class='add'>+    folio-&gt;_entire_mapcount and also increment/decrement</div><div class='add'>+    folio-&gt;_nr_pages_mapped by COMPOUND_MAPPED when _entire_mapcount</div><div class='add'>+    goes from -1 to 0 or 0 to -1.</div><div class='ctx'> </div><div class='del'>-File pages get PG_double_map set on the first map of the page with PTE and</div><div class='del'>-goes away when the page gets evicted from the page cache.</div><div class='add'>+  - map/unmap of individual pages with PTE entry increment/decrement</div><div class='add'>+    page-&gt;_mapcount and also increment/decrement folio-&gt;_nr_pages_mapped</div><div class='add'>+    when page-&gt;_mapcount goes from -1 to 0 or 0 to -1 as this counts</div><div class='add'>+    the number of pages mapped by PTE.</div><div class='ctx'> </div><div class='ctx'> split_huge_page internally has to distribute the refcounts in the head</div><div class='ctx'> page to the tail pages before clearing all PG_head/tail bits from the page</div><div class='hunk'>@@ -169,8 +151,8 @@ clear where references should go after split: it will stay on the head page.</div><div class='ctx'> Note that split_huge_pmd() doesn't have any limitations on refcounting:</div><div class='ctx'> pmd can be split at any point and never fails.</div><div class='ctx'> </div><div class='del'>-Partial unmap and deferred_split_huge_page()</div><div class='del'>-============================================</div><div class='add'>+Partial unmap and deferred_split_folio()</div><div class='add'>+========================================</div><div class='ctx'> </div><div class='ctx'> Unmapping part of THP (with munmap() or other way) is not going to free</div><div class='ctx'> memory immediately. Instead, we detect that a subpage of THP is not in use</div><div class='hunk'>@@ -182,6 +164,6 @@ the place where we can detect partial unmap. It also might be</div><div class='ctx'> counterproductive since in many cases partial unmap happens during exit(2) if</div><div class='ctx'> a THP crosses a VMA boundary.</div><div class='ctx'> </div><div class='del'>-The function deferred_split_huge_page() is used to queue a page for splitting.</div><div class='add'>+The function deferred_split_folio() is used to queue a folio for splitting.</div><div class='ctx'> The splitting itself will happen when we get memory pressure via shrinker</div><div class='ctx'> interface.</div><div class='head'>diff --git a/Documentation/vm/unevictable-lru.rst b/Documentation/mm/unevictable-lru.rst<br/>index b280367d6a44..d5ac8511eb67 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/unevictable-lru.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/unevictable-lru.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/unevictable-lru.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/unevictable-lru.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _unevictable_lru:</div><div class='del'>-</div><div class='ctx'> ==============================</div><div class='ctx'> Unevictable LRU Infrastructure</div><div class='ctx'> ==============================</div><div class='hunk'>@@ -12,7 +10,7 @@ Introduction</div><div class='ctx'> </div><div class='ctx'> This document describes the Linux memory manager's "Unevictable LRU"</div><div class='ctx'> infrastructure and the use of this to manage several types of "unevictable"</div><div class='del'>-pages.</div><div class='add'>+folios.</div><div class='ctx'> </div><div class='ctx'> The document attempts to provide the overall rationale behind this mechanism</div><div class='ctx'> and the rationale for some of the design decisions that drove the</div><div class='hunk'>@@ -27,8 +25,8 @@ The Unevictable LRU</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='ctx'> The Unevictable LRU facility adds an additional LRU list to track unevictable</div><div class='del'>-pages and to hide these pages from vmscan.  This mechanism is based on a patch</div><div class='del'>-by Larry Woodman of Red Hat to address several scalability problems with page</div><div class='add'>+folios and to hide these folios from vmscan.  This mechanism is based on a patch</div><div class='add'>+by Larry Woodman of Red Hat to address several scalability problems with folio</div><div class='ctx'> reclaim in Linux.  The problems have been observed at customer sites on large</div><div class='ctx'> memory x86_64 systems.</div><div class='ctx'> </div><div class='hunk'>@@ -44,6 +42,8 @@ The unevictable list addresses the following classes of unevictable pages:</div><div class='ctx'> </div><div class='ctx'>  * Those owned by ramfs.</div><div class='ctx'> </div><div class='add'>+ * Those owned by tmpfs with the noswap mount option.</div><div class='add'>+</div><div class='ctx'>  * Those mapped into SHM_LOCK'd shared memory regions.</div><div class='ctx'> </div><div class='ctx'>  * Those mapped into VM_LOCKED [mlock()ed] VMAs.</div><div class='hunk'>@@ -52,40 +52,41 @@ The infrastructure may also be able to handle other conditions that make pages</div><div class='ctx'> unevictable, either by definition or by circumstance, in the future.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-The Unevictable LRU Page List</div><div class='del'>------------------------------</div><div class='add'>+The Unevictable LRU Folio List</div><div class='add'>+------------------------------</div><div class='ctx'> </div><div class='del'>-The Unevictable LRU page list is a lie.  It was never an LRU-ordered list, but a</div><div class='del'>-companion to the LRU-ordered anonymous and file, active and inactive page lists;</div><div class='del'>-and now it is not even a page list.  But following familiar convention, here in</div><div class='del'>-this document and in the source, we often imagine it as a fifth LRU page list.</div><div class='add'>+The Unevictable LRU folio list is a lie.  It was never an LRU-ordered</div><div class='add'>+list, but a companion to the LRU-ordered anonymous and file, active and</div><div class='add'>+inactive folio lists; and now it is not even a folio list.  But following</div><div class='add'>+familiar convention, here in this document and in the source, we often</div><div class='add'>+imagine it as a fifth LRU folio list.</div><div class='ctx'> </div><div class='ctx'> The Unevictable LRU infrastructure consists of an additional, per-node, LRU list</div><div class='del'>-called the "unevictable" list and an associated page flag, PG_unevictable, to</div><div class='del'>-indicate that the page is being managed on the unevictable list.</div><div class='add'>+called the "unevictable" list and an associated folio flag, PG_unevictable, to</div><div class='add'>+indicate that the folio is being managed on the unevictable list.</div><div class='ctx'> </div><div class='ctx'> The PG_unevictable flag is analogous to, and mutually exclusive with, the</div><div class='del'>-PG_active flag in that it indicates on which LRU list a page resides when</div><div class='add'>+PG_active flag in that it indicates on which LRU list a folio resides when</div><div class='ctx'> PG_lru is set.</div><div class='ctx'> </div><div class='del'>-The Unevictable LRU infrastructure maintains unevictable pages as if they were</div><div class='add'>+The Unevictable LRU infrastructure maintains unevictable folios as if they were</div><div class='ctx'> on an additional LRU list for a few reasons:</div><div class='ctx'> </div><div class='del'>- (1) We get to "treat unevictable pages just like we treat other pages in the</div><div class='add'>+ (1) We get to "treat unevictable folios just like we treat other folios in the</div><div class='ctx'>      system - which means we get to use the same code to manipulate them, the</div><div class='ctx'>      same code to isolate them (for migrate, etc.), the same code to keep track</div><div class='ctx'>      of the statistics, etc..." [Rik van Riel]</div><div class='ctx'> </div><div class='del'>- (2) We want to be able to migrate unevictable pages between nodes for memory</div><div class='add'>+ (2) We want to be able to migrate unevictable folios between nodes for memory</div><div class='ctx'>      defragmentation, workload management and memory hotplug.  The Linux kernel</div><div class='del'>-     can only migrate pages that it can successfully isolate from the LRU</div><div class='add'>+     can only migrate folios that it can successfully isolate from the LRU</div><div class='ctx'>      lists (or "Movable" pages: outside of consideration here).  If we were to</div><div class='del'>-     maintain pages elsewhere than on an LRU-like list, where they can be</div><div class='del'>-     detected by isolate_lru_page(), we would prevent their migration.</div><div class='add'>+     maintain folios elsewhere than on an LRU-like list, where they can be</div><div class='add'>+     detected by folio_isolate_lru(), we would prevent their migration.</div><div class='ctx'> </div><div class='del'>-The unevictable list does not differentiate between file-backed and anonymous,</div><div class='del'>-swap-backed pages.  This differentiation is only important while the pages are,</div><div class='del'>-in fact, evictable.</div><div class='add'>+The unevictable list does not differentiate between file-backed and</div><div class='add'>+anonymous, swap-backed folios.  This differentiation is only important</div><div class='add'>+while the folios are, in fact, evictable.</div><div class='ctx'> </div><div class='ctx'> The unevictable list benefits from the "arrayification" of the per-node LRU</div><div class='ctx'> lists and statistics originally proposed and posted by Christoph Lameter.</div><div class='hunk'>@@ -158,7 +159,7 @@ These are currently used in three places in the kernel:</div><div class='ctx'> Detecting Unevictable Pages</div><div class='ctx'> ---------------------------</div><div class='ctx'> </div><div class='del'>-The function page_evictable() in mm/internal.h determines whether a page is</div><div class='add'>+The function folio_evictable() in mm/internal.h determines whether a folio is</div><div class='ctx'> evictable or not using the query function outlined above [see section</div><div class='ctx'> :ref:`Marking address spaces unevictable &lt;mark_addr_space_unevict&gt;`]</div><div class='ctx'> to check the AS_UNEVICTABLE flag.</div><div class='hunk'>@@ -167,7 +168,7 @@ For address spaces that are so marked after being populated (as SHM regions</div><div class='ctx'> might be), the lock action (e.g. SHM_LOCK) can be lazy, and need not populate</div><div class='ctx'> the page tables for the region as does, for example, mlock(), nor need it make</div><div class='ctx'> any special effort to push any pages in the SHM_LOCK'd area to the unevictable</div><div class='del'>-list.  Instead, vmscan will do this if and when it encounters the pages during</div><div class='add'>+list.  Instead, vmscan will do this if and when it encounters the folios during</div><div class='ctx'> a reclamation scan.</div><div class='ctx'> </div><div class='ctx'> On an unlock action (such as SHM_UNLOCK), the unlocker (e.g. shmctl()) must scan</div><div class='hunk'>@@ -176,41 +177,43 @@ condition is keeping them unevictable.  If an unevictable region is destroyed,</div><div class='ctx'> the pages are also "rescued" from the unevictable list in the process of</div><div class='ctx'> freeing them.</div><div class='ctx'> </div><div class='del'>-page_evictable() also checks for mlocked pages by testing an additional page</div><div class='del'>-flag, PG_mlocked (as wrapped by PageMlocked()), which is set when a page is</div><div class='del'>-faulted into a VM_LOCKED VMA, or found in a VMA being VM_LOCKED.</div><div class='add'>+folio_evictable() also checks for mlocked folios by calling</div><div class='add'>+folio_test_mlocked(), which is set when a folio is faulted into a</div><div class='add'>+VM_LOCKED VMA, or found in a VMA being VM_LOCKED.</div><div class='ctx'> </div><div class='ctx'> </div><div class='del'>-Vmscan's Handling of Unevictable Pages</div><div class='del'>---------------------------------------</div><div class='add'>+Vmscan's Handling of Unevictable Folios</div><div class='add'>+---------------------------------------</div><div class='ctx'> </div><div class='del'>-If unevictable pages are culled in the fault path, or moved to the unevictable</div><div class='del'>-list at mlock() or mmap() time, vmscan will not encounter the pages until they</div><div class='add'>+If unevictable folios are culled in the fault path, or moved to the unevictable</div><div class='add'>+list at mlock() or mmap() time, vmscan will not encounter the folios until they</div><div class='ctx'> have become evictable again (via munlock() for example) and have been "rescued"</div><div class='ctx'> from the unevictable list.  However, there may be situations where we decide,</div><div class='del'>-for the sake of expediency, to leave an unevictable page on one of the regular</div><div class='add'>+for the sake of expediency, to leave an unevictable folio on one of the regular</div><div class='ctx'> active/inactive LRU lists for vmscan to deal with.  vmscan checks for such</div><div class='del'>-pages in all of the shrink_{active|inactive|page}_list() functions and will</div><div class='del'>-"cull" such pages that it encounters: that is, it diverts those pages to the</div><div class='add'>+folios in all of the shrink_{active|inactive|page}_list() functions and will</div><div class='add'>+"cull" such folios that it encounters: that is, it diverts those folios to the</div><div class='ctx'> unevictable list for the memory cgroup and node being scanned.</div><div class='ctx'> </div><div class='del'>-There may be situations where a page is mapped into a VM_LOCKED VMA, but the</div><div class='del'>-page is not marked as PG_mlocked.  Such pages will make it all the way to</div><div class='del'>-shrink_active_list() or shrink_page_list() where they will be detected when</div><div class='del'>-vmscan walks the reverse map in page_referenced() or try_to_unmap().  The page</div><div class='del'>-is culled to the unevictable list when it is released by the shrinker.</div><div class='add'>+There may be situations where a folio is mapped into a VM_LOCKED VMA,</div><div class='add'>+but the folio does not have the mlocked flag set.  Such folios will make</div><div class='add'>+it all the way to shrink_active_list() or shrink_page_list() where they</div><div class='add'>+will be detected when vmscan walks the reverse map in folio_referenced()</div><div class='add'>+or try_to_unmap().  The folio is culled to the unevictable list when it</div><div class='add'>+is released by the shrinker.</div><div class='ctx'> </div><div class='del'>-To "cull" an unevictable page, vmscan simply puts the page back on the LRU list</div><div class='del'>-using putback_lru_page() - the inverse operation to isolate_lru_page() - after</div><div class='del'>-dropping the page lock.  Because the condition which makes the page unevictable</div><div class='del'>-may change once the page is unlocked, __pagevec_lru_add_fn() will recheck the</div><div class='del'>-unevictable state of a page before placing it on the unevictable list.</div><div class='add'>+To "cull" an unevictable folio, vmscan simply puts the folio back on</div><div class='add'>+the LRU list using folio_putback_lru() - the inverse operation to</div><div class='add'>+folio_isolate_lru() - after dropping the folio lock.  Because the</div><div class='add'>+condition which makes the folio unevictable may change once the folio</div><div class='add'>+is unlocked, __pagevec_lru_add_fn() will recheck the unevictable state</div><div class='add'>+of a folio before placing it on the unevictable list.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> MLOCKED Pages</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='del'>-The unevictable page list is also useful for mlock(), in addition to ramfs and</div><div class='add'>+The unevictable folio list is also useful for mlock(), in addition to ramfs and</div><div class='ctx'> SYSV SHM.  Note that mlock() is only available in CONFIG_MMU=y situations; in</div><div class='ctx'> NOMMU situations, all mappings are effectively mlocked.</div><div class='ctx'> </div><div class='hunk'>@@ -267,7 +270,7 @@ the LRU.  Such pages can be "noticed" by memory management in several places:</div><div class='ctx'>  (4) in the fault path and when a VM_LOCKED stack segment is expanded; or</div><div class='ctx'> </div><div class='ctx'>  (5) as mentioned above, in vmscan:shrink_page_list() when attempting to</div><div class='del'>-     reclaim a page in a VM_LOCKED VMA by page_referenced() or try_to_unmap().</div><div class='add'>+     reclaim a page in a VM_LOCKED VMA by folio_referenced() or try_to_unmap().</div><div class='ctx'> </div><div class='ctx'> mlocked pages become unlocked and rescued from the unevictable list when:</div><div class='ctx'> </div><div class='hunk'>@@ -295,7 +298,7 @@ treated as a no-op and mlock_fixup() simply returns.</div><div class='ctx'> If the VMA passes some filtering as described in "Filtering Special VMAs"</div><div class='ctx'> below, mlock_fixup() will attempt to merge the VMA with its neighbors or split</div><div class='ctx'> off a subset of the VMA if the range does not cover the entire VMA.  Any pages</div><div class='del'>-already present in the VMA are then marked as mlocked by mlock_page() via</div><div class='add'>+already present in the VMA are then marked as mlocked by mlock_folio() via</div><div class='ctx'> mlock_pte_range() via walk_page_range() via mlock_vma_pages_range().</div><div class='ctx'> </div><div class='ctx'> Before returning from the system call, do_mlock() or mlockall() will call</div><div class='hunk'>@@ -308,22 +311,22 @@ do end up getting faulted into this VM_LOCKED VMA, they will be handled in the</div><div class='ctx'> fault path - which is also how mlock2()'s MLOCK_ONFAULT areas are handled.</div><div class='ctx'> </div><div class='ctx'> For each PTE (or PMD) being faulted into a VMA, the page add rmap function</div><div class='del'>-calls mlock_vma_page(), which calls mlock_page() when the VMA is VM_LOCKED</div><div class='add'>+calls mlock_vma_folio(), which calls mlock_folio() when the VMA is VM_LOCKED</div><div class='ctx'> (unless it is a PTE mapping of a part of a transparent huge page).  Or when</div><div class='del'>-it is a newly allocated anonymous page, lru_cache_add_inactive_or_unevictable()</div><div class='del'>-calls mlock_new_page() instead: similar to mlock_page(), but can make better</div><div class='add'>+it is a newly allocated anonymous page, folio_add_lru_vma() calls</div><div class='add'>+mlock_new_folio() instead: similar to mlock_folio(), but can make better</div><div class='ctx'> judgments, since this page is held exclusively and known not to be on LRU yet.</div><div class='ctx'> </div><div class='del'>-mlock_page() sets PageMlocked immediately, then places the page on the CPU's</div><div class='del'>-mlock pagevec, to batch up the rest of the work to be done under lru_lock by</div><div class='del'>-__mlock_page().  __mlock_page() sets PageUnevictable, initializes mlock_count</div><div class='add'>+mlock_folio() sets PG_mlocked immediately, then places the page on the CPU's</div><div class='add'>+mlock folio batch, to batch up the rest of the work to be done under lru_lock by</div><div class='add'>+__mlock_folio().  __mlock_folio() sets PG_unevictable, initializes mlock_count</div><div class='ctx'> and moves the page to unevictable state ("the unevictable LRU", but with</div><div class='del'>-mlock_count in place of LRU threading).  Or if the page was already PageLRU</div><div class='del'>-and PageUnevictable and PageMlocked, it simply increments the mlock_count.</div><div class='add'>+mlock_count in place of LRU threading).  Or if the page was already PG_lru</div><div class='add'>+and PG_unevictable and PG_mlocked, it simply increments the mlock_count.</div><div class='ctx'> </div><div class='ctx'> But in practice that may not work ideally: the page may not yet be on an LRU, or</div><div class='ctx'> it may have been temporarily isolated from LRU.  In such cases the mlock_count</div><div class='del'>-field cannot be touched, but will be set to 0 later when __pagevec_lru_add_fn()</div><div class='add'>+field cannot be touched, but will be set to 0 later when __munlock_folio()</div><div class='ctx'> returns the page to "LRU".  Races prohibit mlock_count from being set to 1 then:</div><div class='ctx'> rather than risk stranding a page indefinitely as unevictable, always err with</div><div class='ctx'> mlock_count on the low side, so that when munlocked the page will be rescued to</div><div class='hunk'>@@ -370,20 +373,21 @@ Because of the VMA filtering discussed above, VM_LOCKED will not be set in</div><div class='ctx'> any "special" VMAs.  So, those VMAs will be ignored for munlock.</div><div class='ctx'> </div><div class='ctx'> If the VMA is VM_LOCKED, mlock_fixup() again attempts to merge or split off the</div><div class='del'>-specified range.  All pages in the VMA are then munlocked by munlock_page() via</div><div class='add'>+specified range.  All pages in the VMA are then munlocked by munlock_folio() via</div><div class='ctx'> mlock_pte_range() via walk_page_range() via mlock_vma_pages_range() - the same</div><div class='ctx'> function used when mlocking a VMA range, with new flags for the VMA indicating</div><div class='ctx'> that it is munlock() being performed.</div><div class='ctx'> </div><div class='del'>-munlock_page() uses the mlock pagevec to batch up work to be done under</div><div class='del'>-lru_lock by  __munlock_page().  __munlock_page() decrements the page's</div><div class='del'>-mlock_count, and when that reaches 0 it clears PageMlocked and clears</div><div class='del'>-PageUnevictable, moving the page from unevictable state to inactive LRU.</div><div class='add'>+munlock_folio() uses the mlock pagevec to batch up work to be done</div><div class='add'>+under lru_lock by  __munlock_folio().  __munlock_folio() decrements the</div><div class='add'>+folio's mlock_count, and when that reaches 0 it clears the mlocked flag</div><div class='add'>+and clears the unevictable flag, moving the folio from unevictable state</div><div class='add'>+to the inactive LRU.</div><div class='ctx'> </div><div class='del'>-But in practice that may not work ideally: the page may not yet have reached</div><div class='add'>+But in practice that may not work ideally: the folio may not yet have reached</div><div class='ctx'> "the unevictable LRU", or it may have been temporarily isolated from it.  In</div><div class='ctx'> those cases its mlock_count field is unusable and must be assumed to be 0: so</div><div class='del'>-that the page will be rescued to an evictable LRU, then perhaps be mlocked</div><div class='add'>+that the folio will be rescued to an evictable LRU, then perhaps be mlocked</div><div class='ctx'> again later if vmscan finds it in a VM_LOCKED VMA.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -410,7 +414,7 @@ However, since mlock_vma_pages_range() starts by setting VM_LOCKED on a VMA,</div><div class='ctx'> before mlocking any pages already present, if one of those pages were migrated</div><div class='ctx'> before mlock_pte_range() reached it, it would get counted twice in mlock_count.</div><div class='ctx'> To prevent that, mlock_vma_pages_range() temporarily marks the VMA as VM_IO,</div><div class='del'>-so that mlock_vma_page() will skip it.</div><div class='add'>+so that mlock_vma_folio() will skip it.</div><div class='ctx'> </div><div class='ctx'> To complete page migration, we place the old and new pages back onto the LRU</div><div class='ctx'> afterwards.  The "unneeded" page - old page on success, new page on failure -</div><div class='hunk'>@@ -483,18 +487,19 @@ Before the unevictable/mlock changes, mlocking did not mark the pages in any</div><div class='ctx'> way, so unmapping them required no processing.</div><div class='ctx'> </div><div class='ctx'> For each PTE (or PMD) being unmapped from a VMA, page_remove_rmap() calls</div><div class='del'>-munlock_vma_page(), which calls munlock_page() when the VMA is VM_LOCKED</div><div class='add'>+munlock_vma_folio(), which calls munlock_folio() when the VMA is VM_LOCKED</div><div class='ctx'> (unless it was a PTE mapping of a part of a transparent huge page).</div><div class='ctx'> </div><div class='del'>-munlock_page() uses the mlock pagevec to batch up work to be done under</div><div class='del'>-lru_lock by  __munlock_page().  __munlock_page() decrements the page's</div><div class='del'>-mlock_count, and when that reaches 0 it clears PageMlocked and clears</div><div class='del'>-PageUnevictable, moving the page from unevictable state to inactive LRU.</div><div class='add'>+munlock_folio() uses the mlock pagevec to batch up work to be done</div><div class='add'>+under lru_lock by  __munlock_folio().  __munlock_folio() decrements the</div><div class='add'>+folio's mlock_count, and when that reaches 0 it clears the mlocked flag</div><div class='add'>+and clears the unevictable flag, moving the folio from unevictable state</div><div class='add'>+to the inactive LRU.</div><div class='ctx'> </div><div class='del'>-But in practice that may not work ideally: the page may not yet have reached</div><div class='add'>+But in practice that may not work ideally: the folio may not yet have reached</div><div class='ctx'> "the unevictable LRU", or it may have been temporarily isolated from it.  In</div><div class='ctx'> those cases its mlock_count field is unusable and must be assumed to be 0: so</div><div class='del'>-that the page will be rescued to an evictable LRU, then perhaps be mlocked</div><div class='add'>+that the folio will be rescued to an evictable LRU, then perhaps be mlocked</div><div class='ctx'> again later if vmscan finds it in a VM_LOCKED VMA.</div><div class='ctx'> </div><div class='ctx'> </div><div class='hunk'>@@ -507,7 +512,7 @@ which had been Copied-On-Write from the file pages now being truncated.</div><div class='ctx'> </div><div class='ctx'> Mlocked pages can be munlocked and deleted in this way: like with munmap(),</div><div class='ctx'> for each PTE (or PMD) being unmapped from a VMA, page_remove_rmap() calls</div><div class='del'>-munlock_vma_page(), which calls munlock_page() when the VMA is VM_LOCKED</div><div class='add'>+munlock_vma_folio(), which calls munlock_folio() when the VMA is VM_LOCKED</div><div class='ctx'> (unless it was a PTE mapping of a part of a transparent huge page).</div><div class='ctx'> </div><div class='ctx'> However, if there is a racing munlock(), since mlock_vma_pages_range() starts</div><div class='hunk'>@@ -515,7 +520,7 @@ munlocking by clearing VM_LOCKED from a VMA, before munlocking all the pages</div><div class='ctx'> present, if one of those pages were unmapped by truncation or hole punch before</div><div class='ctx'> mlock_pte_range() reached it, it would not be recognized as mlocked by this VMA,</div><div class='ctx'> and would not be counted out of mlock_count.  In this rare case, a page may</div><div class='del'>-still appear as PageMlocked after it has been fully unmapped: and it is left to</div><div class='add'>+still appear as PG_mlocked after it has been fully unmapped: and it is left to</div><div class='ctx'> release_pages() (or __page_cache_release()) to clear it and update statistics</div><div class='ctx'> before freeing (this event is counted in /proc/vmstat unevictable_pgs_cleared,</div><div class='ctx'> which is usually 0).</div><div class='hunk'>@@ -527,7 +532,7 @@ Page Reclaim in shrink_*_list()</div><div class='ctx'> vmscan's shrink_active_list() culls any obviously unevictable pages -</div><div class='ctx'> i.e. !page_evictable(page) pages - diverting those to the unevictable list.</div><div class='ctx'> However, shrink_active_list() only sees unevictable pages that made it onto the</div><div class='del'>-active/inactive LRU lists.  Note that these pages do not have PageUnevictable</div><div class='add'>+active/inactive LRU lists.  Note that these pages do not have PG_unevictable</div><div class='ctx'> set - otherwise they would be on the unevictable list and shrink_active_list()</div><div class='ctx'> would never see them.</div><div class='ctx'> </div><div class='hunk'>@@ -547,8 +552,8 @@ vmscan's shrink_inactive_list() and shrink_page_list() also divert obviously</div><div class='ctx'> unevictable pages found on the inactive lists to the appropriate memory cgroup</div><div class='ctx'> and node unevictable list.</div><div class='ctx'> </div><div class='del'>-rmap's page_referenced_one(), called via vmscan's shrink_active_list() or</div><div class='add'>+rmap's folio_referenced_one(), called via vmscan's shrink_active_list() or</div><div class='ctx'> shrink_page_list(), and rmap's try_to_unmap_one() called via shrink_page_list(),</div><div class='del'>-check for (3) pages still mapped into VM_LOCKED VMAs, and call mlock_vma_page()</div><div class='add'>+check for (3) pages still mapped into VM_LOCKED VMAs, and call mlock_vma_folio()</div><div class='ctx'> to correct them.  Such pages are culled to the unevictable list when released</div><div class='ctx'> by the shrinker.</div><div class='head'>diff --git a/Documentation/mm/vmalloc.rst b/Documentation/mm/vmalloc.rst<br/>new file mode 100644<br/>index 000000000000..363fe20d6b9f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/vmalloc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/vmalloc.rst</a></div><div class='hunk'>@@ -0,0 +1,5 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+======================================</div><div class='add'>+Virtually Contiguous Memory Allocation</div><div class='add'>+======================================</div><div class='head'>diff --git a/Documentation/vm/vmalloced-kernel-stacks.rst b/Documentation/mm/vmalloced-kernel-stacks.rst<br/>index fc8c67833af6..fc8c67833af6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/vmalloced-kernel-stacks.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/vmalloced-kernel-stacks.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/vmalloced-kernel-stacks.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/vmalloced-kernel-stacks.rst</a></div><div class='head'>diff --git a/Documentation/mm/vmemmap_dedup.rst b/Documentation/mm/vmemmap_dedup.rst<br/>new file mode 100644<br/>index 000000000000..a4b12ff906c4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/vmemmap_dedup.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/vmemmap_dedup.rst</a></div><div class='hunk'>@@ -0,0 +1,249 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=========================================</div><div class='add'>+A vmemmap diet for HugeTLB and Device DAX</div><div class='add'>+=========================================</div><div class='add'>+</div><div class='add'>+HugeTLB</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+This section is to explain how HugeTLB Vmemmap Optimization (HVO) works.</div><div class='add'>+</div><div class='add'>+The ``struct page`` structures are used to describe a physical page frame. By</div><div class='add'>+default, there is a one-to-one mapping from a page frame to it's corresponding</div><div class='add'>+``struct page``.</div><div class='add'>+</div><div class='add'>+HugeTLB pages consist of multiple base page size pages and is supported by many</div><div class='add'>+architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more</div><div class='add'>+details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are</div><div class='add'>+currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page</div><div class='add'>+consists of 512 base pages and a 1GB HugeTLB page consists of 4096 base pages.</div><div class='add'>+For each base page, there is a corresponding ``struct page``.</div><div class='add'>+</div><div class='add'>+Within the HugeTLB subsystem, only the first 4 ``struct page`` are used to</div><div class='add'>+contain unique information about a HugeTLB page. ``__NR_USED_SUBPAGE`` provides</div><div class='add'>+this upper limit. The only 'useful' information in the remaining ``struct page``</div><div class='add'>+is the compound_head field, and this field is the same for all tail pages.</div><div class='add'>+</div><div class='add'>+By removing redundant ``struct page`` for HugeTLB pages, memory can be returned</div><div class='add'>+to the buddy allocator for other uses.</div><div class='add'>+</div><div class='add'>+Different architectures support different HugeTLB pages. For example, the</div><div class='add'>+following table is the HugeTLB page size supported by x86 and arm64</div><div class='add'>+architectures. Because arm64 supports 4k, 16k, and 64k base pages and</div><div class='add'>+supports contiguous entries, so it supports many kinds of sizes of HugeTLB</div><div class='add'>+page.</div><div class='add'>+</div><div class='add'>++--------------+-----------+-----------------------------------------------+</div><div class='add'>+| Architecture | Page Size |                HugeTLB Page Size              |</div><div class='add'>++--------------+-----------+-----------+-----------+-----------+-----------+</div><div class='add'>+|    x86-64    |    4KB    |    2MB    |    1GB    |           |           |</div><div class='add'>++--------------+-----------+-----------+-----------+-----------+-----------+</div><div class='add'>+|              |    4KB    |   64KB    |    2MB    |    32MB   |    1GB    |</div><div class='add'>+|              +-----------+-----------+-----------+-----------+-----------+</div><div class='add'>+|    arm64     |   16KB    |    2MB    |   32MB    |     1GB   |           |</div><div class='add'>+|              +-----------+-----------+-----------+-----------+-----------+</div><div class='add'>+|              |   64KB    |    2MB    |  512MB    |    16GB   |           |</div><div class='add'>++--------------+-----------+-----------+-----------+-----------+-----------+</div><div class='add'>+</div><div class='add'>+When the system boot up, every HugeTLB page has more than one ``struct page``</div><div class='add'>+structs which size is (unit: pages)::</div><div class='add'>+</div><div class='add'>+   struct_size = HugeTLB_Size / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE</div><div class='add'>+</div><div class='add'>+Where HugeTLB_Size is the size of the HugeTLB page. We know that the size</div><div class='add'>+of the HugeTLB page is always n times PAGE_SIZE. So we can get the following</div><div class='add'>+relationship::</div><div class='add'>+</div><div class='add'>+   HugeTLB_Size = n * PAGE_SIZE</div><div class='add'>+</div><div class='add'>+Then::</div><div class='add'>+</div><div class='add'>+   struct_size = n * PAGE_SIZE / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE</div><div class='add'>+               = n * sizeof(struct page) / PAGE_SIZE</div><div class='add'>+</div><div class='add'>+We can use huge mapping at the pud/pmd level for the HugeTLB page.</div><div class='add'>+</div><div class='add'>+For the HugeTLB page of the pmd level mapping, then::</div><div class='add'>+</div><div class='add'>+   struct_size = n * sizeof(struct page) / PAGE_SIZE</div><div class='add'>+               = PAGE_SIZE / sizeof(pte_t) * sizeof(struct page) / PAGE_SIZE</div><div class='add'>+               = sizeof(struct page) / sizeof(pte_t)</div><div class='add'>+               = 64 / 8</div><div class='add'>+               = 8 (pages)</div><div class='add'>+</div><div class='add'>+Where n is how many pte entries which one page can contains. So the value of</div><div class='add'>+n is (PAGE_SIZE / sizeof(pte_t)).</div><div class='add'>+</div><div class='add'>+This optimization only supports 64-bit system, so the value of sizeof(pte_t)</div><div class='add'>+is 8. And this optimization also applicable only when the size of ``struct page``</div><div class='add'>+is a power of two. In most cases, the size of ``struct page`` is 64 bytes (e.g.</div><div class='add'>+x86-64 and arm64). So if we use pmd level mapping for a HugeTLB page, the</div><div class='add'>+size of ``struct page`` structs of it is 8 page frames which size depends on the</div><div class='add'>+size of the base page.</div><div class='add'>+</div><div class='add'>+For the HugeTLB page of the pud level mapping, then::</div><div class='add'>+</div><div class='add'>+   struct_size = PAGE_SIZE / sizeof(pmd_t) * struct_size(pmd)</div><div class='add'>+               = PAGE_SIZE / 8 * 8 (pages)</div><div class='add'>+               = PAGE_SIZE (pages)</div><div class='add'>+</div><div class='add'>+Where the struct_size(pmd) is the size of the ``struct page`` structs of a</div><div class='add'>+HugeTLB page of the pmd level mapping.</div><div class='add'>+</div><div class='add'>+E.g.: A 2MB HugeTLB page on x86_64 consists in 8 page frames while 1GB</div><div class='add'>+HugeTLB page consists in 4096.</div><div class='add'>+</div><div class='add'>+Next, we take the pmd level mapping of the HugeTLB page as an example to</div><div class='add'>+show the internal implementation of this optimization. There are 8 pages</div><div class='add'>+``struct page`` structs associated with a HugeTLB page which is pmd mapped.</div><div class='add'>+</div><div class='add'>+Here is how things look before optimization::</div><div class='add'>+</div><div class='add'>+    HugeTLB                  struct pages(8 pages)         page frame(8 pages)</div><div class='add'>+ +-----------+ ---virt_to_page---&gt; +-----------+   mapping to   +-----------+</div><div class='add'>+ |           |                     |     0     | -------------&gt; |     0     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     1     | -------------&gt; |     1     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     2     | -------------&gt; |     2     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     3     | -------------&gt; |     3     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     4     | -------------&gt; |     4     |</div><div class='add'>+ |    PMD    |                     +-----------+                +-----------+</div><div class='add'>+ |   level   |                     |     5     | -------------&gt; |     5     |</div><div class='add'>+ |  mapping  |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     6     | -------------&gt; |     6     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     7     | -------------&gt; |     7     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |</div><div class='add'>+ |           |</div><div class='add'>+ |           |</div><div class='add'>+ +-----------+</div><div class='add'>+</div><div class='add'>+The value of page-&gt;compound_head is the same for all tail pages. The first</div><div class='add'>+page of ``struct page`` (page 0) associated with the HugeTLB page contains the 4</div><div class='add'>+``struct page`` necessary to describe the HugeTLB. The only use of the remaining</div><div class='add'>+pages of ``struct page`` (page 1 to page 7) is to point to page-&gt;compound_head.</div><div class='add'>+Therefore, we can remap pages 1 to 7 to page 0. Only 1 page of ``struct page``</div><div class='add'>+will be used for each HugeTLB page. This will allow us to free the remaining</div><div class='add'>+7 pages to the buddy allocator.</div><div class='add'>+</div><div class='add'>+Here is how things look after remapping::</div><div class='add'>+</div><div class='add'>+    HugeTLB                  struct pages(8 pages)         page frame(8 pages)</div><div class='add'>+ +-----------+ ---virt_to_page---&gt; +-----------+   mapping to   +-----------+</div><div class='add'>+ |           |                     |     0     | -------------&gt; |     0     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     1     | ---------------^ ^ ^ ^ ^ ^ ^</div><div class='add'>+ |           |                     +-----------+                  | | | | | |</div><div class='add'>+ |           |                     |     2     | -----------------+ | | | | |</div><div class='add'>+ |           |                     +-----------+                    | | | | |</div><div class='add'>+ |           |                     |     3     | -------------------+ | | | |</div><div class='add'>+ |           |                     +-----------+                      | | | |</div><div class='add'>+ |           |                     |     4     | ---------------------+ | | |</div><div class='add'>+ |    PMD    |                     +-----------+                        | | |</div><div class='add'>+ |   level   |                     |     5     | -----------------------+ | |</div><div class='add'>+ |  mapping  |                     +-----------+                          | |</div><div class='add'>+ |           |                     |     6     | -------------------------+ |</div><div class='add'>+ |           |                     +-----------+                            |</div><div class='add'>+ |           |                     |     7     | ---------------------------+</div><div class='add'>+ |           |                     +-----------+</div><div class='add'>+ |           |</div><div class='add'>+ |           |</div><div class='add'>+ |           |</div><div class='add'>+ +-----------+</div><div class='add'>+</div><div class='add'>+When a HugeTLB is freed to the buddy system, we should allocate 7 pages for</div><div class='add'>+vmemmap pages and restore the previous mapping relationship.</div><div class='add'>+</div><div class='add'>+For the HugeTLB page of the pud level mapping. It is similar to the former.</div><div class='add'>+We also can use this approach to free (PAGE_SIZE - 1) vmemmap pages.</div><div class='add'>+</div><div class='add'>+Apart from the HugeTLB page of the pmd/pud level mapping, some architectures</div><div class='add'>+(e.g. aarch64) provides a contiguous bit in the translation table entries</div><div class='add'>+that hints to the MMU to indicate that it is one of a contiguous set of</div><div class='add'>+entries that can be cached in a single TLB entry.</div><div class='add'>+</div><div class='add'>+The contiguous bit is used to increase the mapping size at the pmd and pte</div><div class='add'>+(last) level. So this type of HugeTLB page can be optimized only when its</div><div class='add'>+size of the ``struct page`` structs is greater than **1** page.</div><div class='add'>+</div><div class='add'>+Notice: The head vmemmap page is not freed to the buddy allocator and all</div><div class='add'>+tail vmemmap pages are mapped to the head vmemmap page frame. So we can see</div><div class='add'>+more than one ``struct page`` struct with ``PG_head`` (e.g. 8 per 2 MB HugeTLB</div><div class='add'>+page) associated with each HugeTLB page. The ``compound_head()`` can handle</div><div class='add'>+this correctly. There is only **one** head ``struct page``, the tail</div><div class='add'>+``struct page`` with ``PG_head`` are fake head ``struct page``.  We need an</div><div class='add'>+approach to distinguish between those two different types of ``struct page`` so</div><div class='add'>+that ``compound_head()`` can return the real head ``struct page`` when the</div><div class='add'>+parameter is the tail ``struct page`` but with ``PG_head``. The following code</div><div class='add'>+snippet describes how to distinguish between real and fake head ``struct page``.</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	if (test_bit(PG_head, &amp;page-&gt;flags)) {</div><div class='add'>+		unsigned long head = READ_ONCE(page[1].compound_head);</div><div class='add'>+</div><div class='add'>+		if (head &amp; 1) {</div><div class='add'>+			if (head == (unsigned long)page + 1)</div><div class='add'>+				/* head struct page */</div><div class='add'>+			else</div><div class='add'>+				/* tail struct page */</div><div class='add'>+		} else {</div><div class='add'>+			/* head struct page */</div><div class='add'>+		}</div><div class='add'>+	}</div><div class='add'>+</div><div class='add'>+We can safely access the field of the **page[1]** with ``PG_head`` because the</div><div class='add'>+page is a compound page composed with at least two contiguous pages.</div><div class='add'>+The implementation refers to ``page_fixed_fake_head()``.</div><div class='add'>+</div><div class='add'>+Device DAX</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+The device-dax interface uses the same tail deduplication technique explained</div><div class='add'>+in the previous chapter, except when used with the vmemmap in</div><div class='add'>+the device (altmap).</div><div class='add'>+</div><div class='add'>+The following page sizes are supported in DAX: PAGE_SIZE (4K on x86_64),</div><div class='add'>+PMD_SIZE (2M on x86_64) and PUD_SIZE (1G on x86_64).</div><div class='add'>+</div><div class='add'>+The differences with HugeTLB are relatively minor.</div><div class='add'>+</div><div class='add'>+It only use 3 ``struct page`` for storing all information as opposed</div><div class='add'>+to 4 on HugeTLB pages.</div><div class='add'>+</div><div class='add'>+There's no remapping of vmemmap given that device-dax memory is not part of</div><div class='add'>+System RAM ranges initialized at boot. Thus the tail page deduplication</div><div class='add'>+happens at a later stage when we populate the sections. HugeTLB reuses the</div><div class='add'>+the head vmemmap page representing, whereas device-dax reuses the tail</div><div class='add'>+vmemmap page. This results in only half of the savings compared to HugeTLB.</div><div class='add'>+</div><div class='add'>+Deduplicated tail pages are not mapped read-only.</div><div class='add'>+</div><div class='add'>+Here's how things look like on device-dax after the sections are populated::</div><div class='add'>+</div><div class='add'>+ +-----------+ ---virt_to_page---&gt; +-----------+   mapping to   +-----------+</div><div class='add'>+ |           |                     |     0     | -------------&gt; |     0     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     1     | -------------&gt; |     1     |</div><div class='add'>+ |           |                     +-----------+                +-----------+</div><div class='add'>+ |           |                     |     2     | ----------------^ ^ ^ ^ ^ ^</div><div class='add'>+ |           |                     +-----------+                   | | | | |</div><div class='add'>+ |           |                     |     3     | ------------------+ | | | |</div><div class='add'>+ |           |                     +-----------+                     | | | |</div><div class='add'>+ |           |                     |     4     | --------------------+ | | |</div><div class='add'>+ |    PMD    |                     +-----------+                       | | |</div><div class='add'>+ |   level   |                     |     5     | ----------------------+ | |</div><div class='add'>+ |  mapping  |                     +-----------+                         | |</div><div class='add'>+ |           |                     |     6     | ------------------------+ |</div><div class='add'>+ |           |                     +-----------+                           |</div><div class='add'>+ |           |                     |     7     | --------------------------+</div><div class='add'>+ |           |                     +-----------+</div><div class='add'>+ |           |</div><div class='add'>+ |           |</div><div class='add'>+ |           |</div><div class='add'>+ +-----------+</div><div class='head'>diff --git a/Documentation/vm/z3fold.rst b/Documentation/mm/z3fold.rst<br/>index 224e3c61d686..25b5935d06c7 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/vm/z3fold.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/vm/z3fold.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/z3fold.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/z3fold.rst</a></div><div class='hunk'>@@ -1,5 +1,3 @@</div><div class='del'>-.. _z3fold:</div><div class='del'>-</div><div class='ctx'> ======</div><div class='ctx'> z3fold</div><div class='ctx'> ======</div><div class='head'>diff --git a/Documentation/mm/zsmalloc.rst b/Documentation/mm/zsmalloc.rst<br/>new file mode 100644<br/>index 000000000000..a3c26d587752<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/mm/zsmalloc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/mm/zsmalloc.rst</a></div><div class='hunk'>@@ -0,0 +1,265 @@</div><div class='add'>+========</div><div class='add'>+zsmalloc</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+This allocator is designed for use with zram. Thus, the allocator is</div><div class='add'>+supposed to work well under low memory conditions. In particular, it</div><div class='add'>+never attempts higher order page allocation which is very likely to</div><div class='add'>+fail under memory pressure. On the other hand, if we just use single</div><div class='add'>+(0-order) pages, it would suffer from very high fragmentation --</div><div class='add'>+any object of size PAGE_SIZE/2 or larger would occupy an entire page.</div><div class='add'>+This was one of the major issues with its predecessor (xvmalloc).</div><div class='add'>+</div><div class='add'>+To overcome these issues, zsmalloc allocates a bunch of 0-order pages</div><div class='add'>+and links them together using various 'struct page' fields. These linked</div><div class='add'>+pages act as a single higher-order page i.e. an object can span 0-order</div><div class='add'>+page boundaries. The code refers to these linked pages as a single entity</div><div class='add'>+called zspage.</div><div class='add'>+</div><div class='add'>+For simplicity, zsmalloc can only allocate objects of size up to PAGE_SIZE</div><div class='add'>+since this satisfies the requirements of all its current users (in the</div><div class='add'>+worst case, page is incompressible and is thus stored "as-is" i.e. in</div><div class='add'>+uncompressed form). For allocation requests larger than this size, failure</div><div class='add'>+is returned (see zs_malloc).</div><div class='add'>+</div><div class='add'>+Additionally, zs_malloc() does not return a dereferenceable pointer.</div><div class='add'>+Instead, it returns an opaque handle (unsigned long) which encodes actual</div><div class='add'>+location of the allocated object. The reason for this indirection is that</div><div class='add'>+zsmalloc does not keep zspages permanently mapped since that would cause</div><div class='add'>+issues on 32-bit systems where the VA region for kernel space mappings</div><div class='add'>+is very small. So, before using the allocating memory, the object has to</div><div class='add'>+be mapped using zs_map_object() to get a usable pointer and subsequently</div><div class='add'>+unmapped using zs_unmap_object().</div><div class='add'>+</div><div class='add'>+stat</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+With CONFIG_ZSMALLOC_STAT, we could see zsmalloc internal information via</div><div class='add'>+``/sys/kernel/debug/zsmalloc/&lt;user name&gt;``. Here is a sample of stat output::</div><div class='add'>+</div><div class='add'>+ # cat /sys/kernel/debug/zsmalloc/zram0/classes</div><div class='add'>+</div><div class='add'>+ class  size       10%       20%       30%       40%       50%       60%       70%       80%       90%       99%      100% obj_allocated   obj_used pages_used pages_per_zspage freeable</div><div class='add'>+    ...</div><div class='add'>+    ...</div><div class='add'>+    30   512         0        12         4         1         0         1         0         0         1         0       414          3464       3346        433                1       14</div><div class='add'>+    31   528         2         7         2         2         1         0         1         0         0         2       117          4154       3793        536                4       44</div><div class='add'>+    32   544         6         3         4         1         2         1         0         0         0         1       260          4170       3965        556                2       26</div><div class='add'>+    ...</div><div class='add'>+    ...</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+class</div><div class='add'>+	index</div><div class='add'>+size</div><div class='add'>+	object size zspage stores</div><div class='add'>+10%</div><div class='add'>+	the number of zspages with usage ratio less than 10% (see below)</div><div class='add'>+20%</div><div class='add'>+	the number of zspages with usage ratio between 10% and 20%</div><div class='add'>+30%</div><div class='add'>+	the number of zspages with usage ratio between 20% and 30%</div><div class='add'>+40%</div><div class='add'>+	the number of zspages with usage ratio between 30% and 40%</div><div class='add'>+50%</div><div class='add'>+	the number of zspages with usage ratio between 40% and 50%</div><div class='add'>+60%</div><div class='add'>+	the number of zspages with usage ratio between 50% and 60%</div><div class='add'>+70%</div><div class='add'>+	the number of zspages with usage ratio between 60% and 70%</div><div class='add'>+80%</div><div class='add'>+	the number of zspages with usage ratio between 70% and 80%</div><div class='add'>+90%</div><div class='add'>+	the number of zspages with usage ratio between 80% and 90%</div><div class='add'>+99%</div><div class='add'>+	the number of zspages with usage ratio between 90% and 99%</div><div class='add'>+100%</div><div class='add'>+	the number of zspages with usage ratio 100%</div><div class='add'>+obj_allocated</div><div class='add'>+	the number of objects allocated</div><div class='add'>+obj_used</div><div class='add'>+	the number of objects allocated to the user</div><div class='add'>+pages_used</div><div class='add'>+	the number of pages allocated for the class</div><div class='add'>+pages_per_zspage</div><div class='add'>+	the number of 0-order pages to make a zspage</div><div class='add'>+freeable</div><div class='add'>+	the approximate number of pages class compaction can free</div><div class='add'>+</div><div class='add'>+Each zspage maintains inuse counter which keeps track of the number of</div><div class='add'>+objects stored in the zspage.  The inuse counter determines the zspage's</div><div class='add'>+"fullness group" which is calculated as the ratio of the "inuse" objects to</div><div class='add'>+the total number of objects the zspage can hold (objs_per_zspage). The</div><div class='add'>+closer the inuse counter is to objs_per_zspage, the better.</div><div class='add'>+</div><div class='add'>+Internals</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+zsmalloc has 255 size classes, each of which can hold a number of zspages.</div><div class='add'>+Each zspage can contain up to ZSMALLOC_CHAIN_SIZE physical (0-order) pages.</div><div class='add'>+The optimal zspage chain size for each size class is calculated during the</div><div class='add'>+creation of the zsmalloc pool (see calculate_zspage_chain_size()).</div><div class='add'>+</div><div class='add'>+As an optimization, zsmalloc merges size classes that have similar</div><div class='add'>+characteristics in terms of the number of pages per zspage and the number</div><div class='add'>+of objects that each zspage can store.</div><div class='add'>+</div><div class='add'>+For instance, consider the following size classes:::</div><div class='add'>+</div><div class='add'>+  class  size       10%   ....    100% obj_allocated   obj_used pages_used pages_per_zspage freeable</div><div class='add'>+  ...</div><div class='add'>+     94  1536        0    ....       0             0          0          0                3        0</div><div class='add'>+    100  1632        0    ....       0             0          0          0                2        0</div><div class='add'>+  ...</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Size classes #95-99 are merged with size class #100. This means that when we</div><div class='add'>+need to store an object of size, say, 1568 bytes, we end up using size class</div><div class='add'>+#100 instead of size class #96. Size class #100 is meant for objects of size</div><div class='add'>+1632 bytes, so each object of size 1568 bytes wastes 1632-1568=64 bytes.</div><div class='add'>+</div><div class='add'>+Size class #100 consists of zspages with 2 physical pages each, which can</div><div class='add'>+hold a total of 5 objects. If we need to store 13 objects of size 1568, we</div><div class='add'>+end up allocating three zspages, or 6 physical pages.</div><div class='add'>+</div><div class='add'>+However, if we take a closer look at size class #96 (which is meant for</div><div class='add'>+objects of size 1568 bytes) and trace `calculate_zspage_chain_size()`, we</div><div class='add'>+find that the most optimal zspage configuration for this class is a chain</div><div class='add'>+of 5 physical pages:::</div><div class='add'>+</div><div class='add'>+    pages per zspage      wasted bytes     used%</div><div class='add'>+           1                  960           76</div><div class='add'>+           2                  352           95</div><div class='add'>+           3                 1312           89</div><div class='add'>+           4                  704           95</div><div class='add'>+           5                   96           99</div><div class='add'>+</div><div class='add'>+This means that a class #96 configuration with 5 physical pages can store 13</div><div class='add'>+objects of size 1568 in a single zspage, using a total of 5 physical pages.</div><div class='add'>+This is more efficient than the class #100 configuration, which would use 6</div><div class='add'>+physical pages to store the same number of objects.</div><div class='add'>+</div><div class='add'>+As the zspage chain size for class #96 increases, its key characteristics</div><div class='add'>+such as pages per-zspage and objects per-zspage also change. This leads to</div><div class='add'>+dewer class mergers, resulting in a more compact grouping of classes, which</div><div class='add'>+reduces memory wastage.</div><div class='add'>+</div><div class='add'>+Let's take a closer look at the bottom of `/sys/kernel/debug/zsmalloc/zramX/classes`:::</div><div class='add'>+</div><div class='add'>+  class  size       10%   ....    100% obj_allocated   obj_used pages_used pages_per_zspage freeable</div><div class='add'>+</div><div class='add'>+  ...</div><div class='add'>+    202  3264         0   ..         0             0          0          0                4        0</div><div class='add'>+    254  4096         0   ..         0             0          0          0                1        0</div><div class='add'>+  ...</div><div class='add'>+</div><div class='add'>+Size class #202 stores objects of size 3264 bytes and has a maximum of 4 pages</div><div class='add'>+per zspage. Any object larger than 3264 bytes is considered huge and belongs</div><div class='add'>+to size class #254, which stores each object in its own physical page (objects</div><div class='add'>+in huge classes do not share pages).</div><div class='add'>+</div><div class='add'>+Increasing the size of the chain of zspages also results in a higher watermark</div><div class='add'>+for the huge size class and fewer huge classes overall. This allows for more</div><div class='add'>+efficient storage of large objects.</div><div class='add'>+</div><div class='add'>+For zspage chain size of 8, huge class watermark becomes 3632 bytes:::</div><div class='add'>+</div><div class='add'>+  class  size       10%   ....    100% obj_allocated   obj_used pages_used pages_per_zspage freeable</div><div class='add'>+</div><div class='add'>+  ...</div><div class='add'>+    202  3264         0   ..         0             0          0          0                4        0</div><div class='add'>+    211  3408         0   ..         0             0          0          0                5        0</div><div class='add'>+    217  3504         0   ..         0             0          0          0                6        0</div><div class='add'>+    222  3584         0   ..         0             0          0          0                7        0</div><div class='add'>+    225  3632         0   ..         0             0          0          0                8        0</div><div class='add'>+    254  4096         0   ..         0             0          0          0                1        0</div><div class='add'>+  ...</div><div class='add'>+</div><div class='add'>+For zspage chain size of 16, huge class watermark becomes 3840 bytes:::</div><div class='add'>+</div><div class='add'>+  class  size       10%   ....    100% obj_allocated   obj_used pages_used pages_per_zspage freeable</div><div class='add'>+</div><div class='add'>+  ...</div><div class='add'>+    202  3264         0   ..         0             0          0          0                4        0</div><div class='add'>+    206  3328         0   ..         0             0          0          0               13        0</div><div class='add'>+    207  3344         0   ..         0             0          0          0                9        0</div><div class='add'>+    208  3360         0   ..         0             0          0          0               14        0</div><div class='add'>+    211  3408         0   ..         0             0          0          0                5        0</div><div class='add'>+    212  3424         0   ..         0             0          0          0               16        0</div><div class='add'>+    214  3456         0   ..         0             0          0          0               11        0</div><div class='add'>+    217  3504         0   ..         0             0          0          0                6        0</div><div class='add'>+    219  3536         0   ..         0             0          0          0               13        0</div><div class='add'>+    222  3584         0   ..         0             0          0          0                7        0</div><div class='add'>+    223  3600         0   ..         0             0          0          0               15        0</div><div class='add'>+    225  3632         0   ..         0             0          0          0                8        0</div><div class='add'>+    228  3680         0   ..         0             0          0          0                9        0</div><div class='add'>+    230  3712         0   ..         0             0          0          0               10        0</div><div class='add'>+    232  3744         0   ..         0             0          0          0               11        0</div><div class='add'>+    234  3776         0   ..         0             0          0          0               12        0</div><div class='add'>+    235  3792         0   ..         0             0          0          0               13        0</div><div class='add'>+    236  3808         0   ..         0             0          0          0               14        0</div><div class='add'>+    238  3840         0   ..         0             0          0          0               15        0</div><div class='add'>+    254  4096         0   ..         0             0          0          0                1        0</div><div class='add'>+  ...</div><div class='add'>+</div><div class='add'>+Overall the combined zspage chain size effect on zsmalloc pool configuration:::</div><div class='add'>+</div><div class='add'>+  pages per zspage   number of size classes (clusters)   huge size class watermark</div><div class='add'>+         4                        69                               3264</div><div class='add'>+         5                        86                               3408</div><div class='add'>+         6                        93                               3504</div><div class='add'>+         7                       112                               3584</div><div class='add'>+         8                       123                               3632</div><div class='add'>+         9                       140                               3680</div><div class='add'>+        10                       143                               3712</div><div class='add'>+        11                       159                               3744</div><div class='add'>+        12                       164                               3776</div><div class='add'>+        13                       180                               3792</div><div class='add'>+        14                       183                               3808</div><div class='add'>+        15                       188                               3840</div><div class='add'>+        16                       191                               3840</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+A synthetic test</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+zram as a build artifacts storage (Linux kernel compilation).</div><div class='add'>+</div><div class='add'>+* `CONFIG_ZSMALLOC_CHAIN_SIZE=4`</div><div class='add'>+</div><div class='add'>+  zsmalloc classes stats:::</div><div class='add'>+</div><div class='add'>+    class  size       10%   ....    100% obj_allocated   obj_used pages_used pages_per_zspage freeable</div><div class='add'>+</div><div class='add'>+    ...</div><div class='add'>+    Total              13   ..        51        413836     412973     159955                         3</div><div class='add'>+</div><div class='add'>+  zram mm_stat:::</div><div class='add'>+</div><div class='add'>+   1691783168 628083717 655175680        0 655175680       60        0    34048    34049</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+* `CONFIG_ZSMALLOC_CHAIN_SIZE=8`</div><div class='add'>+</div><div class='add'>+  zsmalloc classes stats:::</div><div class='add'>+</div><div class='add'>+    class  size       10%   ....    100% obj_allocated   obj_used pages_used pages_per_zspage freeable</div><div class='add'>+</div><div class='add'>+    ...</div><div class='add'>+    Total              18   ..        87        414852     412978     156666                         0</div><div class='add'>+</div><div class='add'>+  zram mm_stat:::</div><div class='add'>+</div><div class='add'>+    1691803648 627793930 641703936        0 641703936       60        0    33591    33591</div><div class='add'>+</div><div class='add'>+Using larger zspage chains may result in using fewer physical pages, as seen</div><div class='add'>+in the example where the number of physical pages used decreased from 159955</div><div class='add'>+to 156666, at the same time maximum zsmalloc pool memory usage went down from</div><div class='add'>+655175680 to 641703936 bytes.</div><div class='add'>+</div><div class='add'>+However, this advantage may be offset by the potential for increased system</div><div class='add'>+memory pressure (as some zspages have larger chain sizes) in cases where there</div><div class='add'>+is heavy internal fragmentation and zspool compaction is unable to relocate</div><div class='add'>+objects and release zspages. In these cases, it is recommended to decrease</div><div class='add'>+the limit on the size of the zspage chains (as specified by the</div><div class='add'>+CONFIG_ZSMALLOC_CHAIN_SIZE option).</div><div class='head'>diff --git a/Documentation/netlink/genetlink-c.yaml b/Documentation/netlink/genetlink-c.yaml<br/>new file mode 100644<br/>index 000000000000..8e8c17b0a6c6<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/genetlink-c.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/genetlink-c.yaml</a></div><div class='hunk'>@@ -0,0 +1,331 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://kernel.org/schemas/netlink/genetlink-c.yaml#</div><div class='add'>+$schema: https://json-schema.org/draft-07/schema</div><div class='add'>+</div><div class='add'>+# Common defines</div><div class='add'>+$defs:</div><div class='add'>+  uint:</div><div class='add'>+    type: integer</div><div class='add'>+    minimum: 0</div><div class='add'>+  len-or-define:</div><div class='add'>+    type: [ string, integer ]</div><div class='add'>+    pattern: ^[0-9A-Za-z_]+( - 1)?$</div><div class='add'>+    minimum: 0</div><div class='add'>+</div><div class='add'>+# Schema for specs</div><div class='add'>+title: Protocol</div><div class='add'>+description: Specification of a genetlink protocol</div><div class='add'>+type: object</div><div class='add'>+required: [ name, doc, attribute-sets, operations ]</div><div class='add'>+additionalProperties: False</div><div class='add'>+properties:</div><div class='add'>+  name:</div><div class='add'>+    description: Name of the genetlink family.</div><div class='add'>+    type: string</div><div class='add'>+  doc:</div><div class='add'>+    type: string</div><div class='add'>+  version:</div><div class='add'>+    description: Generic Netlink family version. Default is 1.</div><div class='add'>+    type: integer</div><div class='add'>+    minimum: 1</div><div class='add'>+  protocol:</div><div class='add'>+    description: Schema compatibility level. Default is "genetlink".</div><div class='add'>+    enum: [ genetlink, genetlink-c ]</div><div class='add'>+  uapi-header:</div><div class='add'>+    description: Path to the uAPI header, default is linux/${family-name}.h</div><div class='add'>+    type: string</div><div class='add'>+  # Start genetlink-c</div><div class='add'>+  c-family-name:</div><div class='add'>+    description: Name of the define for the family name.</div><div class='add'>+    type: string</div><div class='add'>+  c-version-name:</div><div class='add'>+    description: Name of the define for the verion of the family.</div><div class='add'>+    type: string</div><div class='add'>+  max-by-define:</div><div class='add'>+    description: Makes the number of attributes and commands be specified by a define, not an enum value.</div><div class='add'>+    type: boolean</div><div class='add'>+  # End genetlink-c</div><div class='add'>+</div><div class='add'>+  definitions:</div><div class='add'>+    description: List of type and constant definitions (enums, flags, defines).</div><div class='add'>+    type: array</div><div class='add'>+    items:</div><div class='add'>+      type: object</div><div class='add'>+      required: [ type, name ]</div><div class='add'>+      additionalProperties: False</div><div class='add'>+      properties:</div><div class='add'>+        name:</div><div class='add'>+          type: string</div><div class='add'>+        header:</div><div class='add'>+          description: For C-compatible languages, header which already defines this value.</div><div class='add'>+          type: string</div><div class='add'>+        type:</div><div class='add'>+          enum: [ const, enum, flags ]</div><div class='add'>+        doc:</div><div class='add'>+          type: string</div><div class='add'>+        # For const</div><div class='add'>+        value:</div><div class='add'>+          description: For const - the value.</div><div class='add'>+          type: [ string, integer ]</div><div class='add'>+        # For enum and flags</div><div class='add'>+        value-start:</div><div class='add'>+          description: For enum or flags the literal initializer for the first value.</div><div class='add'>+          type: [ string, integer ]</div><div class='add'>+        entries:</div><div class='add'>+          description: For enum or flags array of values.</div><div class='add'>+          type: array</div><div class='add'>+          items:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: string</div><div class='add'>+              - type: object</div><div class='add'>+                required: [ name ]</div><div class='add'>+                additionalProperties: False</div><div class='add'>+                properties:</div><div class='add'>+                  name:</div><div class='add'>+                    type: string</div><div class='add'>+                  value:</div><div class='add'>+                    type: integer</div><div class='add'>+                  doc:</div><div class='add'>+                    type: string</div><div class='add'>+        render-max:</div><div class='add'>+          description: Render the max members for this enum.</div><div class='add'>+          type: boolean</div><div class='add'>+        # Start genetlink-c</div><div class='add'>+        enum-name:</div><div class='add'>+          description: Name for enum, if empty no name will be used.</div><div class='add'>+          type: [ string, "null" ]</div><div class='add'>+        name-prefix:</div><div class='add'>+          description: For enum the prefix of the values, optional.</div><div class='add'>+          type: string</div><div class='add'>+        # End genetlink-c</div><div class='add'>+</div><div class='add'>+  attribute-sets:</div><div class='add'>+    description: Definition of attribute spaces for this family.</div><div class='add'>+    type: array</div><div class='add'>+    items:</div><div class='add'>+      description: Definition of a single attribute space.</div><div class='add'>+      type: object</div><div class='add'>+      required: [ name, attributes ]</div><div class='add'>+      additionalProperties: False</div><div class='add'>+      properties:</div><div class='add'>+        name:</div><div class='add'>+          description: |</div><div class='add'>+            Name used when referring to this space in other definitions, not used outside of the spec.</div><div class='add'>+          type: string</div><div class='add'>+        name-prefix:</div><div class='add'>+          description: |</div><div class='add'>+            Prefix for the C enum name of the attributes. Default family[name]-set[name]-a-</div><div class='add'>+          type: string</div><div class='add'>+        enum-name:</div><div class='add'>+          description: Name for the enum type of the attribute.</div><div class='add'>+          type: string</div><div class='add'>+        doc:</div><div class='add'>+          description: Documentation of the space.</div><div class='add'>+          type: string</div><div class='add'>+        subset-of:</div><div class='add'>+          description: |</div><div class='add'>+            Name of another space which this is a logical part of. Sub-spaces can be used to define</div><div class='add'>+            a limited group of attributes which are used in a nest.</div><div class='add'>+          type: string</div><div class='add'>+        # Start genetlink-c</div><div class='add'>+        attr-cnt-name:</div><div class='add'>+          description: The explicit name for constant holding the count of attributes (last attr + 1).</div><div class='add'>+          type: string</div><div class='add'>+        attr-max-name:</div><div class='add'>+          description: The explicit name for last member of attribute enum.</div><div class='add'>+          type: string</div><div class='add'>+        # End genetlink-c</div><div class='add'>+        attributes:</div><div class='add'>+          description: List of attributes in the space.</div><div class='add'>+          type: array</div><div class='add'>+          items:</div><div class='add'>+            type: object</div><div class='add'>+            required: [ name, type ]</div><div class='add'>+            additionalProperties: False</div><div class='add'>+            properties:</div><div class='add'>+              name:</div><div class='add'>+                type: string</div><div class='add'>+              type: &amp;attr-type</div><div class='add'>+                enum: [ unused, pad, flag, binary, u8, u16, u32, u64, s32, s64,</div><div class='add'>+                        string, nest, array-nest, nest-type-value ]</div><div class='add'>+              doc:</div><div class='add'>+                description: Documentation of the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              value:</div><div class='add'>+                description: Value for the enum item representing this attribute in the uAPI.</div><div class='add'>+                $ref: '#/$defs/uint'</div><div class='add'>+              type-value:</div><div class='add'>+                description: Name of the value extracted from the type of a nest-type-value attribute.</div><div class='add'>+                type: array</div><div class='add'>+                items:</div><div class='add'>+                  type: string</div><div class='add'>+              byte-order:</div><div class='add'>+                enum: [ little-endian, big-endian ]</div><div class='add'>+              multi-attr:</div><div class='add'>+                type: boolean</div><div class='add'>+              nested-attributes:</div><div class='add'>+                description: Name of the space (sub-space) used inside the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              enum:</div><div class='add'>+                description: Name of the enum type used for the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              enum-as-flags:</div><div class='add'>+                description: |</div><div class='add'>+                  Treat the enum as flags. In most cases enum is either used as flags or as values.</div><div class='add'>+                  Sometimes, however, both forms are necessary, in which case header contains the enum</div><div class='add'>+                  form while specific attributes may request to convert the values into a bitfield.</div><div class='add'>+                type: boolean</div><div class='add'>+              checks:</div><div class='add'>+                description: Kernel input validation.</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: False</div><div class='add'>+                properties:</div><div class='add'>+                  flags-mask:</div><div class='add'>+                    description: Name of the flags constant on which to base mask (unsigned scalar types only).</div><div class='add'>+                    type: string</div><div class='add'>+                  min:</div><div class='add'>+                    description: Min value for an integer attribute.</div><div class='add'>+                    type: integer</div><div class='add'>+                  min-len:</div><div class='add'>+                    description: Min length for a binary attribute.</div><div class='add'>+                    $ref: '#/$defs/len-or-define'</div><div class='add'>+                  max-len:</div><div class='add'>+                    description: Max length for a string or a binary attribute.</div><div class='add'>+                    $ref: '#/$defs/len-or-define'</div><div class='add'>+              sub-type: *attr-type</div><div class='add'>+</div><div class='add'>+      # Make sure name-prefix does not appear in subsets (subsets inherit naming)</div><div class='add'>+      dependencies:</div><div class='add'>+        name-prefix:</div><div class='add'>+          not:</div><div class='add'>+            required: [ subset-of ]</div><div class='add'>+        subset-of:</div><div class='add'>+          not:</div><div class='add'>+            required: [ name-prefix ]</div><div class='add'>+</div><div class='add'>+  operations:</div><div class='add'>+    description: Operations supported by the protocol.</div><div class='add'>+    type: object</div><div class='add'>+    required: [ list ]</div><div class='add'>+    additionalProperties: False</div><div class='add'>+    properties:</div><div class='add'>+      enum-model:</div><div class='add'>+        description: |</div><div class='add'>+          The model of assigning values to the operations.</div><div class='add'>+          "unified" is the recommended model where all message types belong</div><div class='add'>+          to a single enum.</div><div class='add'>+          "directional" has the messages sent to the kernel and from the kernel</div><div class='add'>+          enumerated separately.</div><div class='add'>+        enum: [ unified ]</div><div class='add'>+      name-prefix:</div><div class='add'>+        description: |</div><div class='add'>+          Prefix for the C enum name of the command. The name is formed by concatenating</div><div class='add'>+          the prefix with the upper case name of the command, with dashes replaced by underscores.</div><div class='add'>+        type: string</div><div class='add'>+      enum-name:</div><div class='add'>+        description: Name for the enum type with commands.</div><div class='add'>+        type: string</div><div class='add'>+      async-prefix:</div><div class='add'>+        description: Same as name-prefix but used to render notifications and events to separate enum.</div><div class='add'>+        type: string</div><div class='add'>+      async-enum:</div><div class='add'>+        description: Name for the enum type with notifications/events.</div><div class='add'>+        type: string</div><div class='add'>+      list:</div><div class='add'>+        description: List of commands</div><div class='add'>+        type: array</div><div class='add'>+        items:</div><div class='add'>+          type: object</div><div class='add'>+          additionalProperties: False</div><div class='add'>+          required: [ name, doc ]</div><div class='add'>+          properties:</div><div class='add'>+            name:</div><div class='add'>+              description: Name of the operation, also defining its C enum value in uAPI.</div><div class='add'>+              type: string</div><div class='add'>+            doc:</div><div class='add'>+              description: Documentation for the command.</div><div class='add'>+              type: string</div><div class='add'>+            value:</div><div class='add'>+              description: Value for the enum in the uAPI.</div><div class='add'>+              $ref: '#/$defs/uint'</div><div class='add'>+            attribute-set:</div><div class='add'>+              description: |</div><div class='add'>+                Attribute space from which attributes directly in the requests and replies</div><div class='add'>+                to this command are defined.</div><div class='add'>+              type: string</div><div class='add'>+            flags: &amp;cmd_flags</div><div class='add'>+              description: Command flags.</div><div class='add'>+              type: array</div><div class='add'>+              items:</div><div class='add'>+                enum: [ admin-perm ]</div><div class='add'>+            dont-validate:</div><div class='add'>+              description: Kernel attribute validation flags.</div><div class='add'>+              type: array</div><div class='add'>+              items:</div><div class='add'>+                enum: [ strict, dump ]</div><div class='add'>+            do: &amp;subop-type</div><div class='add'>+              description: Main command handler.</div><div class='add'>+              type: object</div><div class='add'>+              additionalProperties: False</div><div class='add'>+              properties:</div><div class='add'>+                request: &amp;subop-attr-list</div><div class='add'>+                  description: Definition of the request message for a given command.</div><div class='add'>+                  type: object</div><div class='add'>+                  additionalProperties: False</div><div class='add'>+                  properties:</div><div class='add'>+                    attributes:</div><div class='add'>+                      description: |</div><div class='add'>+                        Names of attributes from the attribute-set (not full attribute</div><div class='add'>+                        definitions, just names).</div><div class='add'>+                      type: array</div><div class='add'>+                      items:</div><div class='add'>+                        type: string</div><div class='add'>+                reply: *subop-attr-list</div><div class='add'>+                pre:</div><div class='add'>+                  description: Hook for a function to run before the main callback (pre_doit or start).</div><div class='add'>+                  type: string</div><div class='add'>+                post:</div><div class='add'>+                  description: Hook for a function to run after the main callback (post_doit or done).</div><div class='add'>+                  type: string</div><div class='add'>+            dump: *subop-type</div><div class='add'>+            notify:</div><div class='add'>+              description: Name of the command sharing the reply type with this notification.</div><div class='add'>+              type: string</div><div class='add'>+            event:</div><div class='add'>+              type: object</div><div class='add'>+              additionalProperties: False</div><div class='add'>+              properties:</div><div class='add'>+                attributes:</div><div class='add'>+                  description: Explicit list of the attributes for the notification.</div><div class='add'>+                  type: array</div><div class='add'>+                  items:</div><div class='add'>+                    type: string</div><div class='add'>+            mcgrp:</div><div class='add'>+              description: Name of the multicast group generating given notification.</div><div class='add'>+              type: string</div><div class='add'>+  mcast-groups:</div><div class='add'>+    description: List of multicast groups.</div><div class='add'>+    type: object</div><div class='add'>+    required: [ list ]</div><div class='add'>+    additionalProperties: False</div><div class='add'>+    properties:</div><div class='add'>+      list:</div><div class='add'>+        description: List of groups.</div><div class='add'>+        type: array</div><div class='add'>+        items:</div><div class='add'>+          type: object</div><div class='add'>+          required: [ name ]</div><div class='add'>+          additionalProperties: False</div><div class='add'>+          properties:</div><div class='add'>+            name:</div><div class='add'>+              description: |</div><div class='add'>+                The name for the group, used to form the define and the value of the define.</div><div class='add'>+              type: string</div><div class='add'>+            # Start genetlink-c</div><div class='add'>+            c-define-name:</div><div class='add'>+              description: Override for the name of the define in C uAPI.</div><div class='add'>+              type: string</div><div class='add'>+            # End genetlink-c</div><div class='add'>+            flags: *cmd_flags</div><div class='head'>diff --git a/Documentation/netlink/genetlink-legacy.yaml b/Documentation/netlink/genetlink-legacy.yaml<br/>new file mode 100644<br/>index 000000000000..b33541a51d6b<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/genetlink-legacy.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/genetlink-legacy.yaml</a></div><div class='hunk'>@@ -0,0 +1,377 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://kernel.org/schemas/netlink/genetlink-legacy.yaml#</div><div class='add'>+$schema: https://json-schema.org/draft-07/schema</div><div class='add'>+</div><div class='add'>+# Common defines</div><div class='add'>+$defs:</div><div class='add'>+  uint:</div><div class='add'>+    type: integer</div><div class='add'>+    minimum: 0</div><div class='add'>+  len-or-define:</div><div class='add'>+    type: [ string, integer ]</div><div class='add'>+    pattern: ^[0-9A-Za-z_]+( - 1)?$</div><div class='add'>+    minimum: 0</div><div class='add'>+</div><div class='add'>+# Schema for specs</div><div class='add'>+title: Protocol</div><div class='add'>+description: Specification of a genetlink protocol</div><div class='add'>+type: object</div><div class='add'>+required: [ name, doc, attribute-sets, operations ]</div><div class='add'>+additionalProperties: False</div><div class='add'>+properties:</div><div class='add'>+  name:</div><div class='add'>+    description: Name of the genetlink family.</div><div class='add'>+    type: string</div><div class='add'>+  doc:</div><div class='add'>+    type: string</div><div class='add'>+  version:</div><div class='add'>+    description: Generic Netlink family version. Default is 1.</div><div class='add'>+    type: integer</div><div class='add'>+    minimum: 1</div><div class='add'>+  protocol:</div><div class='add'>+    description: Schema compatibility level. Default is "genetlink".</div><div class='add'>+    enum: [ genetlink, genetlink-c, genetlink-legacy ] # Trim</div><div class='add'>+  uapi-header:</div><div class='add'>+    description: Path to the uAPI header, default is linux/${family-name}.h</div><div class='add'>+    type: string</div><div class='add'>+  # Start genetlink-c</div><div class='add'>+  c-family-name:</div><div class='add'>+    description: Name of the define for the family name.</div><div class='add'>+    type: string</div><div class='add'>+  c-version-name:</div><div class='add'>+    description: Name of the define for the verion of the family.</div><div class='add'>+    type: string</div><div class='add'>+  max-by-define:</div><div class='add'>+    description: Makes the number of attributes and commands be specified by a define, not an enum value.</div><div class='add'>+    type: boolean</div><div class='add'>+  # End genetlink-c</div><div class='add'>+  # Start genetlink-legacy</div><div class='add'>+  kernel-policy:</div><div class='add'>+    description: |</div><div class='add'>+      Defines if the input policy in the kernel is global, per-operation, or split per operation type.</div><div class='add'>+      Default is split.</div><div class='add'>+    enum: [ split, per-op, global ]</div><div class='add'>+  # End genetlink-legacy</div><div class='add'>+</div><div class='add'>+  definitions:</div><div class='add'>+    description: List of type and constant definitions (enums, flags, defines).</div><div class='add'>+    type: array</div><div class='add'>+    items:</div><div class='add'>+      type: object</div><div class='add'>+      required: [ type, name ]</div><div class='add'>+      additionalProperties: False</div><div class='add'>+      properties:</div><div class='add'>+        name:</div><div class='add'>+          type: string</div><div class='add'>+        header:</div><div class='add'>+          description: For C-compatible languages, header which already defines this value.</div><div class='add'>+          type: string</div><div class='add'>+        type:</div><div class='add'>+          enum: [ const, enum, flags, struct ] # Trim</div><div class='add'>+        doc:</div><div class='add'>+          type: string</div><div class='add'>+        # For const</div><div class='add'>+        value:</div><div class='add'>+          description: For const - the value.</div><div class='add'>+          type: [ string, integer ]</div><div class='add'>+        # For enum and flags</div><div class='add'>+        value-start:</div><div class='add'>+          description: For enum or flags the literal initializer for the first value.</div><div class='add'>+          type: [ string, integer ]</div><div class='add'>+        entries:</div><div class='add'>+          description: For enum or flags array of values.</div><div class='add'>+          type: array</div><div class='add'>+          items:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: string</div><div class='add'>+              - type: object</div><div class='add'>+                required: [ name ]</div><div class='add'>+                additionalProperties: False</div><div class='add'>+                properties:</div><div class='add'>+                  name:</div><div class='add'>+                    type: string</div><div class='add'>+                  value:</div><div class='add'>+                    type: integer</div><div class='add'>+                  doc:</div><div class='add'>+                    type: string</div><div class='add'>+        render-max:</div><div class='add'>+          description: Render the max members for this enum.</div><div class='add'>+          type: boolean</div><div class='add'>+        # Start genetlink-c</div><div class='add'>+        enum-name:</div><div class='add'>+          description: Name for enum, if empty no name will be used.</div><div class='add'>+          type: [ string, "null" ]</div><div class='add'>+        name-prefix:</div><div class='add'>+          description: For enum the prefix of the values, optional.</div><div class='add'>+          type: string</div><div class='add'>+        # End genetlink-c</div><div class='add'>+        # Start genetlink-legacy</div><div class='add'>+        members:</div><div class='add'>+          description: List of struct members. Only scalars and strings members allowed.</div><div class='add'>+          type: array</div><div class='add'>+          items:</div><div class='add'>+            type: object</div><div class='add'>+            required: [ name, type ]</div><div class='add'>+            additionalProperties: False</div><div class='add'>+            properties:</div><div class='add'>+              name:</div><div class='add'>+                type: string</div><div class='add'>+              type:</div><div class='add'>+                enum: [ u8, u16, u32, u64, s8, s16, s32, s64, string ]</div><div class='add'>+              len:</div><div class='add'>+                $ref: '#/$defs/len-or-define'</div><div class='add'>+        # End genetlink-legacy</div><div class='add'>+</div><div class='add'>+  attribute-sets:</div><div class='add'>+    description: Definition of attribute spaces for this family.</div><div class='add'>+    type: array</div><div class='add'>+    items:</div><div class='add'>+      description: Definition of a single attribute space.</div><div class='add'>+      type: object</div><div class='add'>+      required: [ name, attributes ]</div><div class='add'>+      additionalProperties: False</div><div class='add'>+      properties:</div><div class='add'>+        name:</div><div class='add'>+          description: |</div><div class='add'>+            Name used when referring to this space in other definitions, not used outside of the spec.</div><div class='add'>+          type: string</div><div class='add'>+        name-prefix:</div><div class='add'>+          description: |</div><div class='add'>+            Prefix for the C enum name of the attributes. Default family[name]-set[name]-a-</div><div class='add'>+          type: string</div><div class='add'>+        enum-name:</div><div class='add'>+          description: Name for the enum type of the attribute.</div><div class='add'>+          type: string</div><div class='add'>+        doc:</div><div class='add'>+          description: Documentation of the space.</div><div class='add'>+          type: string</div><div class='add'>+        subset-of:</div><div class='add'>+          description: |</div><div class='add'>+            Name of another space which this is a logical part of. Sub-spaces can be used to define</div><div class='add'>+            a limited group of attributes which are used in a nest.</div><div class='add'>+          type: string</div><div class='add'>+        # Start genetlink-c</div><div class='add'>+        attr-cnt-name:</div><div class='add'>+          description: The explicit name for constant holding the count of attributes (last attr + 1).</div><div class='add'>+          type: string</div><div class='add'>+        attr-max-name:</div><div class='add'>+          description: The explicit name for last member of attribute enum.</div><div class='add'>+          type: string</div><div class='add'>+        # End genetlink-c</div><div class='add'>+        attributes:</div><div class='add'>+          description: List of attributes in the space.</div><div class='add'>+          type: array</div><div class='add'>+          items:</div><div class='add'>+            type: object</div><div class='add'>+            required: [ name, type ]</div><div class='add'>+            additionalProperties: False</div><div class='add'>+            properties:</div><div class='add'>+              name:</div><div class='add'>+                type: string</div><div class='add'>+              type: &amp;attr-type</div><div class='add'>+                enum: [ unused, pad, flag, binary, u8, u16, u32, u64, s32, s64,</div><div class='add'>+                        string, nest, array-nest, nest-type-value ]</div><div class='add'>+              doc:</div><div class='add'>+                description: Documentation of the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              value:</div><div class='add'>+                description: Value for the enum item representing this attribute in the uAPI.</div><div class='add'>+                $ref: '#/$defs/uint'</div><div class='add'>+              type-value:</div><div class='add'>+                description: Name of the value extracted from the type of a nest-type-value attribute.</div><div class='add'>+                type: array</div><div class='add'>+                items:</div><div class='add'>+                  type: string</div><div class='add'>+              byte-order:</div><div class='add'>+                enum: [ little-endian, big-endian ]</div><div class='add'>+              multi-attr:</div><div class='add'>+                type: boolean</div><div class='add'>+              nested-attributes:</div><div class='add'>+                description: Name of the space (sub-space) used inside the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              enum:</div><div class='add'>+                description: Name of the enum type used for the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              enum-as-flags:</div><div class='add'>+                description: |</div><div class='add'>+                  Treat the enum as flags. In most cases enum is either used as flags or as values.</div><div class='add'>+                  Sometimes, however, both forms are necessary, in which case header contains the enum</div><div class='add'>+                  form while specific attributes may request to convert the values into a bitfield.</div><div class='add'>+                type: boolean</div><div class='add'>+              checks:</div><div class='add'>+                description: Kernel input validation.</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: False</div><div class='add'>+                properties:</div><div class='add'>+                  flags-mask:</div><div class='add'>+                    description: Name of the flags constant on which to base mask (unsigned scalar types only).</div><div class='add'>+                    type: string</div><div class='add'>+                  min:</div><div class='add'>+                    description: Min value for an integer attribute.</div><div class='add'>+                    type: integer</div><div class='add'>+                  min-len:</div><div class='add'>+                    description: Min length for a binary attribute.</div><div class='add'>+                    $ref: '#/$defs/len-or-define'</div><div class='add'>+                  max-len:</div><div class='add'>+                    description: Max length for a string or a binary attribute.</div><div class='add'>+                    $ref: '#/$defs/len-or-define'</div><div class='add'>+              sub-type: *attr-type</div><div class='add'>+              # Start genetlink-legacy</div><div class='add'>+              struct:</div><div class='add'>+                description: Name of the struct type used for the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              # End genetlink-legacy</div><div class='add'>+</div><div class='add'>+      # Make sure name-prefix does not appear in subsets (subsets inherit naming)</div><div class='add'>+      dependencies:</div><div class='add'>+        name-prefix:</div><div class='add'>+          not:</div><div class='add'>+            required: [ subset-of ]</div><div class='add'>+        subset-of:</div><div class='add'>+          not:</div><div class='add'>+            required: [ name-prefix ]</div><div class='add'>+</div><div class='add'>+  operations:</div><div class='add'>+    description: Operations supported by the protocol.</div><div class='add'>+    type: object</div><div class='add'>+    required: [ list ]</div><div class='add'>+    additionalProperties: False</div><div class='add'>+    properties:</div><div class='add'>+      enum-model:</div><div class='add'>+        description: |</div><div class='add'>+          The model of assigning values to the operations.</div><div class='add'>+          "unified" is the recommended model where all message types belong</div><div class='add'>+          to a single enum.</div><div class='add'>+          "directional" has the messages sent to the kernel and from the kernel</div><div class='add'>+          enumerated separately.</div><div class='add'>+        enum: [ unified, directional ] # Trim</div><div class='add'>+      name-prefix:</div><div class='add'>+        description: |</div><div class='add'>+          Prefix for the C enum name of the command. The name is formed by concatenating</div><div class='add'>+          the prefix with the upper case name of the command, with dashes replaced by underscores.</div><div class='add'>+        type: string</div><div class='add'>+      enum-name:</div><div class='add'>+        description: Name for the enum type with commands.</div><div class='add'>+        type: string</div><div class='add'>+      async-prefix:</div><div class='add'>+        description: Same as name-prefix but used to render notifications and events to separate enum.</div><div class='add'>+        type: string</div><div class='add'>+      async-enum:</div><div class='add'>+        description: Name for the enum type with notifications/events.</div><div class='add'>+        type: string</div><div class='add'>+      # Start genetlink-legacy</div><div class='add'>+      fixed-header: &amp;fixed-header</div><div class='add'>+        description: |</div><div class='add'>+          Name of the structure defining the optional fixed-length protocol</div><div class='add'>+          header. This header is placed in a message after the netlink and</div><div class='add'>+          genetlink headers and before any attributes.</div><div class='add'>+        type: string</div><div class='add'>+      # End genetlink-legacy</div><div class='add'>+      list:</div><div class='add'>+        description: List of commands</div><div class='add'>+        type: array</div><div class='add'>+        items:</div><div class='add'>+          type: object</div><div class='add'>+          additionalProperties: False</div><div class='add'>+          required: [ name, doc ]</div><div class='add'>+          properties:</div><div class='add'>+            name:</div><div class='add'>+              description: Name of the operation, also defining its C enum value in uAPI.</div><div class='add'>+              type: string</div><div class='add'>+            doc:</div><div class='add'>+              description: Documentation for the command.</div><div class='add'>+              type: string</div><div class='add'>+            value:</div><div class='add'>+              description: Value for the enum in the uAPI.</div><div class='add'>+              $ref: '#/$defs/uint'</div><div class='add'>+            attribute-set:</div><div class='add'>+              description: |</div><div class='add'>+                Attribute space from which attributes directly in the requests and replies</div><div class='add'>+                to this command are defined.</div><div class='add'>+              type: string</div><div class='add'>+            flags: &amp;cmd_flags</div><div class='add'>+              description: Command flags.</div><div class='add'>+              type: array</div><div class='add'>+              items:</div><div class='add'>+                enum: [ admin-perm ]</div><div class='add'>+            dont-validate:</div><div class='add'>+              description: Kernel attribute validation flags.</div><div class='add'>+              type: array</div><div class='add'>+              items:</div><div class='add'>+                enum: [ strict, dump ]</div><div class='add'>+            # Start genetlink-legacy</div><div class='add'>+            fixed-header: *fixed-header</div><div class='add'>+            # End genetlink-legacy</div><div class='add'>+            do: &amp;subop-type</div><div class='add'>+              description: Main command handler.</div><div class='add'>+              type: object</div><div class='add'>+              additionalProperties: False</div><div class='add'>+              properties:</div><div class='add'>+                request: &amp;subop-attr-list</div><div class='add'>+                  description: Definition of the request message for a given command.</div><div class='add'>+                  type: object</div><div class='add'>+                  additionalProperties: False</div><div class='add'>+                  properties:</div><div class='add'>+                    attributes:</div><div class='add'>+                      description: |</div><div class='add'>+                        Names of attributes from the attribute-set (not full attribute</div><div class='add'>+                        definitions, just names).</div><div class='add'>+                      type: array</div><div class='add'>+                      items:</div><div class='add'>+                        type: string</div><div class='add'>+                    # Start genetlink-legacy</div><div class='add'>+                    value:</div><div class='add'>+                      description: |</div><div class='add'>+                        ID of this message if value for request and response differ,</div><div class='add'>+                        i.e. requests and responses have different message enums.</div><div class='add'>+                      $ref: '#/$defs/uint'</div><div class='add'>+                    # End genetlink-legacy</div><div class='add'>+                reply: *subop-attr-list</div><div class='add'>+                pre:</div><div class='add'>+                  description: Hook for a function to run before the main callback (pre_doit or start).</div><div class='add'>+                  type: string</div><div class='add'>+                post:</div><div class='add'>+                  description: Hook for a function to run after the main callback (post_doit or done).</div><div class='add'>+                  type: string</div><div class='add'>+            dump: *subop-type</div><div class='add'>+            notify:</div><div class='add'>+              description: Name of the command sharing the reply type with this notification.</div><div class='add'>+              type: string</div><div class='add'>+            event:</div><div class='add'>+              type: object</div><div class='add'>+              additionalProperties: False</div><div class='add'>+              properties:</div><div class='add'>+                attributes:</div><div class='add'>+                  description: Explicit list of the attributes for the notification.</div><div class='add'>+                  type: array</div><div class='add'>+                  items:</div><div class='add'>+                    type: string</div><div class='add'>+            mcgrp:</div><div class='add'>+              description: Name of the multicast group generating given notification.</div><div class='add'>+              type: string</div><div class='add'>+  mcast-groups:</div><div class='add'>+    description: List of multicast groups.</div><div class='add'>+    type: object</div><div class='add'>+    required: [ list ]</div><div class='add'>+    additionalProperties: False</div><div class='add'>+    properties:</div><div class='add'>+      list:</div><div class='add'>+        description: List of groups.</div><div class='add'>+        type: array</div><div class='add'>+        items:</div><div class='add'>+          type: object</div><div class='add'>+          required: [ name ]</div><div class='add'>+          additionalProperties: False</div><div class='add'>+          properties:</div><div class='add'>+            name:</div><div class='add'>+              description: |</div><div class='add'>+                The name for the group, used to form the define and the value of the define.</div><div class='add'>+              type: string</div><div class='add'>+            # Start genetlink-c</div><div class='add'>+            c-define-name:</div><div class='add'>+              description: Override for the name of the define in C uAPI.</div><div class='add'>+              type: string</div><div class='add'>+            # End genetlink-c</div><div class='add'>+            flags: *cmd_flags</div><div class='head'>diff --git a/Documentation/netlink/genetlink.yaml b/Documentation/netlink/genetlink.yaml<br/>new file mode 100644<br/>index 000000000000..d8b2cdeba058<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/genetlink.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/genetlink.yaml</a></div><div class='hunk'>@@ -0,0 +1,299 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+%YAML 1.2</div><div class='add'>+---</div><div class='add'>+$id: http://kernel.org/schemas/netlink/genetlink-legacy.yaml#</div><div class='add'>+$schema: https://json-schema.org/draft-07/schema</div><div class='add'>+</div><div class='add'>+# Common defines</div><div class='add'>+$defs:</div><div class='add'>+  uint:</div><div class='add'>+    type: integer</div><div class='add'>+    minimum: 0</div><div class='add'>+  len-or-define:</div><div class='add'>+    type: [ string, integer ]</div><div class='add'>+    pattern: ^[0-9A-Za-z_]+( - 1)?$</div><div class='add'>+    minimum: 0</div><div class='add'>+</div><div class='add'>+# Schema for specs</div><div class='add'>+title: Protocol</div><div class='add'>+description: Specification of a genetlink protocol</div><div class='add'>+type: object</div><div class='add'>+required: [ name, doc, attribute-sets, operations ]</div><div class='add'>+additionalProperties: False</div><div class='add'>+properties:</div><div class='add'>+  name:</div><div class='add'>+    description: Name of the genetlink family.</div><div class='add'>+    type: string</div><div class='add'>+  doc:</div><div class='add'>+    type: string</div><div class='add'>+  version:</div><div class='add'>+    description: Generic Netlink family version. Default is 1.</div><div class='add'>+    type: integer</div><div class='add'>+    minimum: 1</div><div class='add'>+  protocol:</div><div class='add'>+    description: Schema compatibility level. Default is "genetlink".</div><div class='add'>+    enum: [ genetlink ]</div><div class='add'>+  uapi-header:</div><div class='add'>+    description: Path to the uAPI header, default is linux/${family-name}.h</div><div class='add'>+    type: string</div><div class='add'>+</div><div class='add'>+  definitions:</div><div class='add'>+    description: List of type and constant definitions (enums, flags, defines).</div><div class='add'>+    type: array</div><div class='add'>+    items:</div><div class='add'>+      type: object</div><div class='add'>+      required: [ type, name ]</div><div class='add'>+      additionalProperties: False</div><div class='add'>+      properties:</div><div class='add'>+        name:</div><div class='add'>+          type: string</div><div class='add'>+        header:</div><div class='add'>+          description: For C-compatible languages, header which already defines this value.</div><div class='add'>+          type: string</div><div class='add'>+        type:</div><div class='add'>+          enum: [ const, enum, flags ]</div><div class='add'>+        doc:</div><div class='add'>+          type: string</div><div class='add'>+        # For const</div><div class='add'>+        value:</div><div class='add'>+          description: For const - the value.</div><div class='add'>+          type: [ string, integer ]</div><div class='add'>+        # For enum and flags</div><div class='add'>+        value-start:</div><div class='add'>+          description: For enum or flags the literal initializer for the first value.</div><div class='add'>+          type: [ string, integer ]</div><div class='add'>+        entries:</div><div class='add'>+          description: For enum or flags array of values.</div><div class='add'>+          type: array</div><div class='add'>+          items:</div><div class='add'>+            oneOf:</div><div class='add'>+              - type: string</div><div class='add'>+              - type: object</div><div class='add'>+                required: [ name ]</div><div class='add'>+                additionalProperties: False</div><div class='add'>+                properties:</div><div class='add'>+                  name:</div><div class='add'>+                    type: string</div><div class='add'>+                  value:</div><div class='add'>+                    type: integer</div><div class='add'>+                  doc:</div><div class='add'>+                    type: string</div><div class='add'>+        render-max:</div><div class='add'>+          description: Render the max members for this enum.</div><div class='add'>+          type: boolean</div><div class='add'>+</div><div class='add'>+  attribute-sets:</div><div class='add'>+    description: Definition of attribute spaces for this family.</div><div class='add'>+    type: array</div><div class='add'>+    items:</div><div class='add'>+      description: Definition of a single attribute space.</div><div class='add'>+      type: object</div><div class='add'>+      required: [ name, attributes ]</div><div class='add'>+      additionalProperties: False</div><div class='add'>+      properties:</div><div class='add'>+        name:</div><div class='add'>+          description: |</div><div class='add'>+            Name used when referring to this space in other definitions, not used outside of the spec.</div><div class='add'>+          type: string</div><div class='add'>+        name-prefix:</div><div class='add'>+          description: |</div><div class='add'>+            Prefix for the C enum name of the attributes. Default family[name]-set[name]-a-</div><div class='add'>+          type: string</div><div class='add'>+        enum-name:</div><div class='add'>+          description: Name for the enum type of the attribute.</div><div class='add'>+          type: string</div><div class='add'>+        doc:</div><div class='add'>+          description: Documentation of the space.</div><div class='add'>+          type: string</div><div class='add'>+        subset-of:</div><div class='add'>+          description: |</div><div class='add'>+            Name of another space which this is a logical part of. Sub-spaces can be used to define</div><div class='add'>+            a limited group of attributes which are used in a nest.</div><div class='add'>+          type: string</div><div class='add'>+        attributes:</div><div class='add'>+          description: List of attributes in the space.</div><div class='add'>+          type: array</div><div class='add'>+          items:</div><div class='add'>+            type: object</div><div class='add'>+            required: [ name, type ]</div><div class='add'>+            additionalProperties: False</div><div class='add'>+            properties:</div><div class='add'>+              name:</div><div class='add'>+                type: string</div><div class='add'>+              type: &amp;attr-type</div><div class='add'>+                enum: [ unused, pad, flag, binary, u8, u16, u32, u64, s32, s64,</div><div class='add'>+                        string, nest, array-nest, nest-type-value ]</div><div class='add'>+              doc:</div><div class='add'>+                description: Documentation of the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              value:</div><div class='add'>+                description: Value for the enum item representing this attribute in the uAPI.</div><div class='add'>+                $ref: '#/$defs/uint'</div><div class='add'>+              type-value:</div><div class='add'>+                description: Name of the value extracted from the type of a nest-type-value attribute.</div><div class='add'>+                type: array</div><div class='add'>+                items:</div><div class='add'>+                  type: string</div><div class='add'>+              byte-order:</div><div class='add'>+                enum: [ little-endian, big-endian ]</div><div class='add'>+              multi-attr:</div><div class='add'>+                type: boolean</div><div class='add'>+              nested-attributes:</div><div class='add'>+                description: Name of the space (sub-space) used inside the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              enum:</div><div class='add'>+                description: Name of the enum type used for the attribute.</div><div class='add'>+                type: string</div><div class='add'>+              enum-as-flags:</div><div class='add'>+                description: |</div><div class='add'>+                  Treat the enum as flags. In most cases enum is either used as flags or as values.</div><div class='add'>+                  Sometimes, however, both forms are necessary, in which case header contains the enum</div><div class='add'>+                  form while specific attributes may request to convert the values into a bitfield.</div><div class='add'>+                type: boolean</div><div class='add'>+              checks:</div><div class='add'>+                description: Kernel input validation.</div><div class='add'>+                type: object</div><div class='add'>+                additionalProperties: False</div><div class='add'>+                properties:</div><div class='add'>+                  flags-mask:</div><div class='add'>+                    description: Name of the flags constant on which to base mask (unsigned scalar types only).</div><div class='add'>+                    type: string</div><div class='add'>+                  min:</div><div class='add'>+                    description: Min value for an integer attribute.</div><div class='add'>+                    type: integer</div><div class='add'>+                  min-len:</div><div class='add'>+                    description: Min length for a binary attribute.</div><div class='add'>+                    $ref: '#/$defs/len-or-define'</div><div class='add'>+                  max-len:</div><div class='add'>+                    description: Max length for a string or a binary attribute.</div><div class='add'>+                    $ref: '#/$defs/len-or-define'</div><div class='add'>+              sub-type: *attr-type</div><div class='add'>+</div><div class='add'>+      # Make sure name-prefix does not appear in subsets (subsets inherit naming)</div><div class='add'>+      dependencies:</div><div class='add'>+        name-prefix:</div><div class='add'>+          not:</div><div class='add'>+            required: [ subset-of ]</div><div class='add'>+        subset-of:</div><div class='add'>+          not:</div><div class='add'>+            required: [ name-prefix ]</div><div class='add'>+</div><div class='add'>+  operations:</div><div class='add'>+    description: Operations supported by the protocol.</div><div class='add'>+    type: object</div><div class='add'>+    required: [ list ]</div><div class='add'>+    additionalProperties: False</div><div class='add'>+    properties:</div><div class='add'>+      enum-model:</div><div class='add'>+        description: |</div><div class='add'>+          The model of assigning values to the operations.</div><div class='add'>+          "unified" is the recommended model where all message types belong</div><div class='add'>+          to a single enum.</div><div class='add'>+          "directional" has the messages sent to the kernel and from the kernel</div><div class='add'>+          enumerated separately.</div><div class='add'>+        enum: [ unified ]</div><div class='add'>+      name-prefix:</div><div class='add'>+        description: |</div><div class='add'>+          Prefix for the C enum name of the command. The name is formed by concatenating</div><div class='add'>+          the prefix with the upper case name of the command, with dashes replaced by underscores.</div><div class='add'>+        type: string</div><div class='add'>+      enum-name:</div><div class='add'>+        description: Name for the enum type with commands.</div><div class='add'>+        type: string</div><div class='add'>+      async-prefix:</div><div class='add'>+        description: Same as name-prefix but used to render notifications and events to separate enum.</div><div class='add'>+        type: string</div><div class='add'>+      async-enum:</div><div class='add'>+        description: Name for the enum type with notifications/events.</div><div class='add'>+        type: string</div><div class='add'>+      list:</div><div class='add'>+        description: List of commands</div><div class='add'>+        type: array</div><div class='add'>+        items:</div><div class='add'>+          type: object</div><div class='add'>+          additionalProperties: False</div><div class='add'>+          required: [ name, doc ]</div><div class='add'>+          properties:</div><div class='add'>+            name:</div><div class='add'>+              description: Name of the operation, also defining its C enum value in uAPI.</div><div class='add'>+              type: string</div><div class='add'>+            doc:</div><div class='add'>+              description: Documentation for the command.</div><div class='add'>+              type: string</div><div class='add'>+            value:</div><div class='add'>+              description: Value for the enum in the uAPI.</div><div class='add'>+              $ref: '#/$defs/uint'</div><div class='add'>+            attribute-set:</div><div class='add'>+              description: |</div><div class='add'>+                Attribute space from which attributes directly in the requests and replies</div><div class='add'>+                to this command are defined.</div><div class='add'>+              type: string</div><div class='add'>+            flags: &amp;cmd_flags</div><div class='add'>+              description: Command flags.</div><div class='add'>+              type: array</div><div class='add'>+              items:</div><div class='add'>+                enum: [ admin-perm ]</div><div class='add'>+            dont-validate:</div><div class='add'>+              description: Kernel attribute validation flags.</div><div class='add'>+              type: array</div><div class='add'>+              items:</div><div class='add'>+                enum: [ strict, dump ]</div><div class='add'>+            do: &amp;subop-type</div><div class='add'>+              description: Main command handler.</div><div class='add'>+              type: object</div><div class='add'>+              additionalProperties: False</div><div class='add'>+              properties:</div><div class='add'>+                request: &amp;subop-attr-list</div><div class='add'>+                  description: Definition of the request message for a given command.</div><div class='add'>+                  type: object</div><div class='add'>+                  additionalProperties: False</div><div class='add'>+                  properties:</div><div class='add'>+                    attributes:</div><div class='add'>+                      description: |</div><div class='add'>+                        Names of attributes from the attribute-set (not full attribute</div><div class='add'>+                        definitions, just names).</div><div class='add'>+                      type: array</div><div class='add'>+                      items:</div><div class='add'>+                        type: string</div><div class='add'>+                reply: *subop-attr-list</div><div class='add'>+                pre:</div><div class='add'>+                  description: Hook for a function to run before the main callback (pre_doit or start).</div><div class='add'>+                  type: string</div><div class='add'>+                post:</div><div class='add'>+                  description: Hook for a function to run after the main callback (post_doit or done).</div><div class='add'>+                  type: string</div><div class='add'>+            dump: *subop-type</div><div class='add'>+            notify:</div><div class='add'>+              description: Name of the command sharing the reply type with this notification.</div><div class='add'>+              type: string</div><div class='add'>+            event:</div><div class='add'>+              type: object</div><div class='add'>+              additionalProperties: False</div><div class='add'>+              properties:</div><div class='add'>+                attributes:</div><div class='add'>+                  description: Explicit list of the attributes for the notification.</div><div class='add'>+                  type: array</div><div class='add'>+                  items:</div><div class='add'>+                    type: string</div><div class='add'>+            mcgrp:</div><div class='add'>+              description: Name of the multicast group generating given notification.</div><div class='add'>+              type: string</div><div class='add'>+  mcast-groups:</div><div class='add'>+    description: List of multicast groups.</div><div class='add'>+    type: object</div><div class='add'>+    required: [ list ]</div><div class='add'>+    additionalProperties: False</div><div class='add'>+    properties:</div><div class='add'>+      list:</div><div class='add'>+        description: List of groups.</div><div class='add'>+        type: array</div><div class='add'>+        items:</div><div class='add'>+          type: object</div><div class='add'>+          required: [ name ]</div><div class='add'>+          additionalProperties: False</div><div class='add'>+          properties:</div><div class='add'>+            name:</div><div class='add'>+              description: |</div><div class='add'>+                The name for the group, used to form the define and the value of the define.</div><div class='add'>+              type: string</div><div class='add'>+            flags: *cmd_flags</div><div class='head'>diff --git a/Documentation/netlink/specs/devlink.yaml b/Documentation/netlink/specs/devlink.yaml<br/>new file mode 100644<br/>index 000000000000..90641668232e<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/specs/devlink.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/specs/devlink.yaml</a></div><div class='hunk'>@@ -0,0 +1,198 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: devlink</div><div class='add'>+</div><div class='add'>+protocol: genetlink-legacy</div><div class='add'>+</div><div class='add'>+doc: Partial family for Devlink.</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: devlink</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: bus-name</div><div class='add'>+        type: string</div><div class='add'>+        value: 1</div><div class='add'>+      -</div><div class='add'>+        name: dev-name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: port-index</div><div class='add'>+        type: u32</div><div class='add'>+</div><div class='add'>+      # TODO: fill in the attributes in between</div><div class='add'>+</div><div class='add'>+      -</div><div class='add'>+        name: info-driver-name</div><div class='add'>+        type: string</div><div class='add'>+        value: 98</div><div class='add'>+      -</div><div class='add'>+        name: info-serial-number</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: info-version-fixed</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: dl-info-version</div><div class='add'>+      -</div><div class='add'>+        name: info-version-running</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: dl-info-version</div><div class='add'>+      -</div><div class='add'>+        name: info-version-stored</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: dl-info-version</div><div class='add'>+      -</div><div class='add'>+        name: info-version-name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: info-version-value</div><div class='add'>+        type: string</div><div class='add'>+</div><div class='add'>+      # TODO: fill in the attributes in between</div><div class='add'>+</div><div class='add'>+      -</div><div class='add'>+        name: reload-failed</div><div class='add'>+        type: u8</div><div class='add'>+        value: 136</div><div class='add'>+</div><div class='add'>+      # TODO: fill in the attributes in between</div><div class='add'>+</div><div class='add'>+      -</div><div class='add'>+        name: reload-action</div><div class='add'>+        type: u8</div><div class='add'>+        value: 153</div><div class='add'>+</div><div class='add'>+      # TODO: fill in the attributes in between</div><div class='add'>+</div><div class='add'>+      -</div><div class='add'>+        name: dev-stats</div><div class='add'>+        type: nest</div><div class='add'>+        value: 156</div><div class='add'>+        nested-attributes: dl-dev-stats</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: dl-reload-stats</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats-entry</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: dl-reload-stats-entry</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats-limit</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats-value</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: remote-reload-stats</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: dl-reload-stats</div><div class='add'>+      -</div><div class='add'>+        name: reload-action-info</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: dl-reload-act-info</div><div class='add'>+      -</div><div class='add'>+        name: reload-action-stats</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: dl-reload-act-stats</div><div class='add'>+  -</div><div class='add'>+    name: dl-dev-stats</div><div class='add'>+    subset-of: devlink</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats</div><div class='add'>+        type: nest</div><div class='add'>+      -</div><div class='add'>+        name: remote-reload-stats</div><div class='add'>+        type: nest</div><div class='add'>+  -</div><div class='add'>+    name: dl-reload-stats</div><div class='add'>+    subset-of: devlink</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: reload-action-info</div><div class='add'>+        type: nest</div><div class='add'>+  -</div><div class='add'>+    name: dl-reload-act-info</div><div class='add'>+    subset-of: devlink</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: reload-action</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: reload-action-stats</div><div class='add'>+        type: nest</div><div class='add'>+  -</div><div class='add'>+    name: dl-reload-act-stats</div><div class='add'>+    subset-of: devlink</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats-entry</div><div class='add'>+        type: nest</div><div class='add'>+  -</div><div class='add'>+    name: dl-reload-stats-entry</div><div class='add'>+    subset-of: devlink</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats-limit</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: reload-stats-value</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: dl-info-version</div><div class='add'>+    subset-of: devlink</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: info-version-name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: info-version-value</div><div class='add'>+        type: string</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  enum-model: directional</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: get</div><div class='add'>+      doc: Get devlink instances.</div><div class='add'>+      attribute-set: devlink</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 1</div><div class='add'>+          attributes: &amp;dev-id-attrs</div><div class='add'>+            - bus-name</div><div class='add'>+            - dev-name</div><div class='add'>+        reply:  &amp;get-reply</div><div class='add'>+          value: 3</div><div class='add'>+          attributes:</div><div class='add'>+            - bus-name</div><div class='add'>+            - dev-name</div><div class='add'>+            - reload-failed</div><div class='add'>+            - reload-action</div><div class='add'>+            - dev-stats</div><div class='add'>+      dump:</div><div class='add'>+        reply: *get-reply</div><div class='add'>+</div><div class='add'>+      # TODO: fill in the operations in between</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: info-get</div><div class='add'>+      doc: Get device information, like driver name, hardware and firmware versions etc.</div><div class='add'>+      attribute-set: devlink</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          value: 51</div><div class='add'>+          attributes: *dev-id-attrs</div><div class='add'>+        reply:</div><div class='add'>+          value: 51</div><div class='add'>+          attributes:</div><div class='add'>+            - bus-name</div><div class='add'>+            - dev-name</div><div class='head'>diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml<br/>new file mode 100644<br/>index 000000000000..129f413ea349<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/specs/ethtool.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/specs/ethtool.yaml</a></div><div class='hunk'>@@ -0,0 +1,1646 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: ethtool</div><div class='add'>+</div><div class='add'>+protocol: genetlink-legacy</div><div class='add'>+</div><div class='add'>+doc: Partial family for Ethtool Netlink.</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    name: udp-tunnel-type</div><div class='add'>+    type: enum</div><div class='add'>+    entries: [ vxlan, geneve, vxlan-gpe ]</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: header</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: dev-index</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: dev-name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: u32</div><div class='add'>+</div><div class='add'>+  -</div><div class='add'>+    name: bitset-bit</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: index</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: value</div><div class='add'>+        type: flag</div><div class='add'>+  -</div><div class='add'>+    name: bitset-bits</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: bit</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: bitset-bit</div><div class='add'>+  -</div><div class='add'>+    name: bitset</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: nomask</div><div class='add'>+        type: flag</div><div class='add'>+      -</div><div class='add'>+        name: size</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: bits</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: bitset-bits</div><div class='add'>+</div><div class='add'>+  -</div><div class='add'>+    name: u64-array</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: u64</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: u64</div><div class='add'>+  -</div><div class='add'>+    name: s32-array</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: s32</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: s32</div><div class='add'>+  -</div><div class='add'>+    name: string</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: index</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: value</div><div class='add'>+        type: string</div><div class='add'>+  -</div><div class='add'>+    name: strings</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: string</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: string</div><div class='add'>+  -</div><div class='add'>+    name: stringset</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: count</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: strings</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: strings</div><div class='add'>+  -</div><div class='add'>+    name: stringsets</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: stringset</div><div class='add'>+        type: nest</div><div class='add'>+        multi-attr: true</div><div class='add'>+        nested-attributes: stringset</div><div class='add'>+  -</div><div class='add'>+    name: strset</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: stringsets</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: stringsets</div><div class='add'>+      -</div><div class='add'>+        name: counts-only</div><div class='add'>+        type: flag</div><div class='add'>+</div><div class='add'>+  -</div><div class='add'>+    name: privflags</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: flags</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: bitset</div><div class='add'>+</div><div class='add'>+  -</div><div class='add'>+    name: rings</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: rx-max</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: rx-mini-max</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: rx-jumbo-max</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: tx-max</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: rx</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: rx-mini</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: rx-jumbo</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: tx</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: rx-buf-len</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: tcp-data-split</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: cqe-size</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: tx-push</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: rx-push</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: tx-push-buf-len</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: tx-push-buf-len-max</div><div class='add'>+        type: u32</div><div class='add'>+</div><div class='add'>+  -</div><div class='add'>+    name: mm-stat</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: reassembly-errors</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: smd-errors</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: reassembly-ok</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: rx-frag-count</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: tx-frag-count</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: hold-count</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='add'>+    name: mm</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: pmac-enabled</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: tx-enabled</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: tx-active</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: tx-min-frag-size</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: tx-min-frag-size</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: verify-enabled</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: verify-status</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: verify-time</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: max-verify-time</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: stats</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: mm-stat</div><div class='add'>+  -</div><div class='add'>+    name: linkinfo</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: port</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: phyaddr</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: tp-mdix</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: tp-mdix-ctrl</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: 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stats-grp</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: id</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: ss-id</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: stat</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: u64</div><div class='add'>+      -</div><div class='add'>+        name: hist-rx</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: u64</div><div class='add'>+      -</div><div class='add'>+        name: hist-tx</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: u64</div><div class='add'>+      -</div><div class='add'>+        name: hist-bkt-low</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: hist-bkt-hi</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: hist-bkt-val</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='add'>+    name: stats</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: groups</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: bitset</div><div class='add'>+      -</div><div class='add'>+        name: grp</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: stats-grp</div><div class='add'>+      -</div><div class='add'>+        name: src</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: phc-vclocks</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: num</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: index</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: s32-array</div><div class='add'>+  -</div><div class='add'>+    name: module</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: power-mode-policy</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: power-mode</div><div class='add'>+        type: u8</div><div class='add'>+  -</div><div class='add'>+    name: pse</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: admin-state</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: admin-control</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: pw-d-status</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: rss</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: context</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: hfunc</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: indir</div><div class='add'>+        type: binary</div><div class='add'>+      -</div><div class='add'>+        name: hkey</div><div class='add'>+        type: binary</div><div class='add'>+  -</div><div class='add'>+    name: plca</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: header</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: header</div><div class='add'>+      -</div><div class='add'>+        name: version</div><div class='add'>+        type: u16</div><div class='add'>+      -</div><div class='add'>+        name: enabled</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: status</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: node-cnt</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: node-id</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: to-tmr</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: burst-cnt</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: burst-tmr</div><div class='add'>+        type: u32</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  enum-model: directional</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: strset-get</div><div class='add'>+      doc: Get string set from the kernel.</div><div class='add'>+</div><div class='add'>+      attribute-set: strset</div><div class='add'>+</div><div class='add'>+      do: &amp;strset-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - stringsets</div><div class='add'>+            - counts-only</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - stringsets</div><div class='add'>+      dump: *strset-get-op</div><div class='add'>+    -</div><div class='add'>+      name: linkinfo-get</div><div class='add'>+      doc: Get link info.</div><div class='add'>+</div><div class='add'>+      attribute-set: linkinfo</div><div class='add'>+</div><div class='add'>+      do: &amp;linkinfo-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;linkinfo</div><div class='add'>+            - header</div><div class='add'>+            - port</div><div class='add'>+            - phyaddr</div><div class='add'>+            - tp-mdix</div><div class='add'>+            - tp-mdix-ctrl</div><div class='add'>+            - transceiver</div><div class='add'>+      dump: *linkinfo-get-op</div><div class='add'>+    -</div><div class='add'>+      name: linkinfo-set</div><div class='add'>+      doc: Set link info.</div><div class='add'>+</div><div class='add'>+      attribute-set: linkinfo</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *linkinfo</div><div class='add'>+    -</div><div class='add'>+      name: linkinfo-ntf</div><div class='add'>+      doc: Notification for change in link info.</div><div class='add'>+      notify: linkinfo-get</div><div class='add'>+    -</div><div class='add'>+      name: linkmodes-get</div><div class='add'>+      doc: Get link modes.</div><div class='add'>+</div><div class='add'>+      attribute-set: linkmodes</div><div class='add'>+</div><div class='add'>+      do: &amp;linkmodes-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;linkmodes</div><div class='add'>+            - header</div><div class='add'>+            - autoneg</div><div class='add'>+            - ours</div><div class='add'>+            - peer</div><div class='add'>+            - speed</div><div class='add'>+            - duplex</div><div class='add'>+            - master-slave-cfg</div><div class='add'>+            - master-slave-state</div><div class='add'>+            - master-slave-lanes</div><div class='add'>+            - rate-matching</div><div class='add'>+      dump: *linkmodes-get-op</div><div class='add'>+    -</div><div class='add'>+      name: linkmodes-set</div><div class='add'>+      doc: Set link modes.</div><div class='add'>+</div><div class='add'>+      attribute-set: linkmodes</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *linkmodes</div><div class='add'>+    -</div><div class='add'>+      name: linkmodes-ntf</div><div class='add'>+      doc: Notification for change in link modes.</div><div class='add'>+      notify: linkmodes-get</div><div class='add'>+    -</div><div class='add'>+      name: linkstate-get</div><div class='add'>+      doc: Get link state.</div><div class='add'>+</div><div class='add'>+      attribute-set: linkstate</div><div class='add'>+</div><div class='add'>+      do: &amp;linkstate-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - link</div><div class='add'>+            - sqi</div><div class='add'>+            - sqi-max</div><div class='add'>+            - ext-state</div><div class='add'>+            - ext-substate</div><div class='add'>+            - down-cnt</div><div class='add'>+      dump: *linkstate-get-op</div><div class='add'>+    -</div><div class='add'>+      name: debug-get</div><div class='add'>+      doc: Get debug message mask.</div><div class='add'>+</div><div class='add'>+      attribute-set: debug</div><div class='add'>+</div><div class='add'>+      do: &amp;debug-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;debug</div><div class='add'>+            - header</div><div class='add'>+            - msgmask</div><div class='add'>+      dump: *debug-get-op</div><div class='add'>+    -</div><div class='add'>+      name: debug-set</div><div class='add'>+      doc: Set debug message mask.</div><div class='add'>+</div><div class='add'>+      attribute-set: debug</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *debug</div><div class='add'>+    -</div><div class='add'>+      name: debug-ntf</div><div class='add'>+      doc: Notification for change in debug message mask.</div><div class='add'>+      notify: debug-get</div><div class='add'>+    -</div><div class='add'>+      name: wol-get</div><div class='add'>+      doc: Get WOL params.</div><div class='add'>+</div><div class='add'>+      attribute-set: wol</div><div class='add'>+</div><div class='add'>+      do: &amp;wol-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;wol</div><div class='add'>+            - header</div><div class='add'>+            - modes</div><div class='add'>+            - sopass</div><div class='add'>+      dump: *wol-get-op</div><div class='add'>+    -</div><div class='add'>+      name: wol-set</div><div class='add'>+      doc: Set WOL params.</div><div class='add'>+</div><div class='add'>+      attribute-set: wol</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *wol</div><div class='add'>+    -</div><div class='add'>+      name: wol-ntf</div><div class='add'>+      doc: Notification for change in WOL params.</div><div class='add'>+      notify: wol-get</div><div class='add'>+    -</div><div class='add'>+      name: features-get</div><div class='add'>+      doc: Get features.</div><div class='add'>+</div><div class='add'>+      attribute-set: features</div><div class='add'>+</div><div class='add'>+      do: &amp;feature-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;feature</div><div class='add'>+            - header</div><div class='add'>+            # User-changeable features.</div><div class='add'>+            - hw</div><div class='add'>+            # User-requested features.</div><div class='add'>+            - wanted</div><div class='add'>+            # Currently active features.</div><div class='add'>+            - active</div><div class='add'>+            # Unchangeable features.</div><div class='add'>+            - nochange</div><div class='add'>+      dump: *feature-get-op</div><div class='add'>+    -</div><div class='add'>+      name: features-set</div><div class='add'>+      doc: Set features.</div><div class='add'>+</div><div class='add'>+      attribute-set: features</div><div class='add'>+</div><div class='add'>+      do: &amp;feature-set-op</div><div class='add'>+        request:</div><div class='add'>+          attributes: *feature</div><div class='add'>+        reply:</div><div class='add'>+          attributes: *feature</div><div class='add'>+    -</div><div class='add'>+      name: features-ntf</div><div class='add'>+      doc: Notification for change in features.</div><div class='add'>+      notify: features-get</div><div class='add'>+    -</div><div class='add'>+      name: privflags-get</div><div class='add'>+      doc: Get device private flags.</div><div class='add'>+</div><div class='add'>+      attribute-set: privflags</div><div class='add'>+</div><div class='add'>+      do: &amp;privflag-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;privflag</div><div class='add'>+            - header</div><div class='add'>+            - flags</div><div class='add'>+      dump: *privflag-get-op</div><div class='add'>+    -</div><div class='add'>+      name: privflags-set</div><div class='add'>+      doc: Set device private flags.</div><div class='add'>+</div><div class='add'>+      attribute-set: privflags</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *privflag</div><div class='add'>+    -</div><div class='add'>+      name: privflags-ntf</div><div class='add'>+      doc: Notification for change in device private flags.</div><div class='add'>+      notify: privflags-get</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: rings-get</div><div class='add'>+      doc: Get ring params.</div><div class='add'>+</div><div class='add'>+      attribute-set: rings</div><div class='add'>+</div><div class='add'>+      do: &amp;ring-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;ring</div><div class='add'>+            - header</div><div class='add'>+            - rx-max</div><div class='add'>+            - rx-mini-max</div><div class='add'>+            - rx-jumbo-max</div><div class='add'>+            - tx-max</div><div class='add'>+            - rx</div><div class='add'>+            - rx-mini</div><div class='add'>+            - rx-jumbo</div><div class='add'>+            - tx</div><div class='add'>+            - rx-buf-len</div><div class='add'>+            - tcp-data-split</div><div class='add'>+            - cqe-size</div><div class='add'>+            - tx-push</div><div class='add'>+            - rx-push</div><div class='add'>+            - tx-push-buf-len</div><div class='add'>+            - tx-push-buf-len-max</div><div class='add'>+      dump: *ring-get-op</div><div class='add'>+    -</div><div class='add'>+      name: rings-set</div><div class='add'>+      doc: Set ring params.</div><div class='add'>+</div><div class='add'>+      attribute-set: rings</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *ring</div><div class='add'>+    -</div><div class='add'>+      name: rings-ntf</div><div class='add'>+      doc: Notification for change in ring params.</div><div class='add'>+      notify: rings-get</div><div class='add'>+    -</div><div class='add'>+      name: channels-get</div><div class='add'>+      doc: Get channel params.</div><div class='add'>+</div><div class='add'>+      attribute-set: channels</div><div class='add'>+</div><div class='add'>+      do: &amp;channel-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;channel</div><div class='add'>+            - header</div><div class='add'>+            - rx-max</div><div class='add'>+            - tx-max</div><div class='add'>+            - other-max</div><div class='add'>+            - combined-max</div><div class='add'>+            - rx-count</div><div class='add'>+            - tx-count</div><div class='add'>+            - other-count</div><div class='add'>+            - combined-count</div><div class='add'>+      dump: *channel-get-op</div><div class='add'>+    -</div><div class='add'>+      name: channels-set</div><div class='add'>+      doc: Set channel params.</div><div class='add'>+</div><div class='add'>+      attribute-set: channels</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *channel</div><div class='add'>+    -</div><div class='add'>+      name: channels-ntf</div><div class='add'>+      doc: Notification for change in channel params.</div><div class='add'>+      notify: channels-get</div><div class='add'>+    -</div><div class='add'>+      name: coalesce-get</div><div class='add'>+      doc: Get coalesce params.</div><div class='add'>+</div><div class='add'>+      attribute-set: coalesce</div><div class='add'>+</div><div class='add'>+      do: &amp;coalesce-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;coalesce</div><div class='add'>+            - header</div><div class='add'>+            - rx-usecs</div><div class='add'>+            - rx-max-frames</div><div class='add'>+            - rx-usecs-irq</div><div class='add'>+            - rx-max-frames-irq</div><div class='add'>+            - tx-usecs</div><div class='add'>+            - tx-max-frames</div><div class='add'>+            - tx-usecs-irq</div><div class='add'>+            - tx-max-frames-irq</div><div class='add'>+            - stats-block-usecs</div><div class='add'>+            - use-adaptive-rx</div><div class='add'>+            - use-adaptive-tx</div><div class='add'>+            - pkt-rate-low</div><div class='add'>+            - rx-usecs-low</div><div class='add'>+            - rx-max-frames-low</div><div class='add'>+            - tx-usecs-low</div><div class='add'>+            - tx-max-frames-low</div><div class='add'>+            - pkt-rate-high</div><div class='add'>+            - rx-usecs-high</div><div class='add'>+            - rx-max-frames-high</div><div class='add'>+            - tx-usecs-high</div><div class='add'>+            - tx-max-frames-high</div><div class='add'>+            - rate-sample-interval</div><div class='add'>+            - use-cqe-mode-tx</div><div class='add'>+            - use-cqe-mode-rx</div><div class='add'>+            - tx-aggr-max-bytes</div><div class='add'>+            - tx-aggr-max-frames</div><div class='add'>+            - tx-aggr-time-usecs</div><div class='add'>+      dump: *coalesce-get-op</div><div class='add'>+    -</div><div class='add'>+      name: coalesce-set</div><div class='add'>+      doc: Set coalesce params.</div><div class='add'>+</div><div class='add'>+      attribute-set: coalesce</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *coalesce</div><div class='add'>+    -</div><div class='add'>+      name: coalesce-ntf</div><div class='add'>+      doc: Notification for change in coalesce params.</div><div class='add'>+      notify: coalesce-get</div><div class='add'>+    -</div><div class='add'>+      name: pause-get</div><div class='add'>+      doc: Get pause params.</div><div class='add'>+</div><div class='add'>+      attribute-set: pause</div><div class='add'>+</div><div class='add'>+      do: &amp;pause-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;pause</div><div class='add'>+            - header</div><div class='add'>+            - autoneg</div><div class='add'>+            - rx</div><div class='add'>+            - tx</div><div class='add'>+            - stats</div><div class='add'>+            - stats-src</div><div class='add'>+      dump: *pause-get-op</div><div class='add'>+    -</div><div class='add'>+      name: pause-set</div><div class='add'>+      doc: Set pause params.</div><div class='add'>+</div><div class='add'>+      attribute-set: pause</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *pause</div><div class='add'>+    -</div><div class='add'>+      name: pause-ntf</div><div class='add'>+      doc: Notification for change in pause params.</div><div class='add'>+      notify: pause-get</div><div class='add'>+    -</div><div class='add'>+      name: eee-get</div><div class='add'>+      doc: Get eee params.</div><div class='add'>+</div><div class='add'>+      attribute-set: eee</div><div class='add'>+</div><div class='add'>+      do: &amp;eee-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;eee</div><div class='add'>+            - header</div><div class='add'>+            - modes-ours</div><div class='add'>+            - modes-peer</div><div class='add'>+            - active</div><div class='add'>+            - enabled</div><div class='add'>+            - tx-lpi-enabled</div><div class='add'>+            - tx-lpi-timer</div><div class='add'>+      dump: *eee-get-op</div><div class='add'>+    -</div><div class='add'>+      name: eee-set</div><div class='add'>+      doc: Set eee params.</div><div class='add'>+</div><div class='add'>+      attribute-set: eee</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *eee</div><div class='add'>+    -</div><div class='add'>+      name: eee-ntf</div><div class='add'>+      doc: Notification for change in eee params.</div><div class='add'>+      notify: eee-get</div><div class='add'>+    -</div><div class='add'>+      name: tsinfo-get</div><div class='add'>+      doc: Get tsinfo params.</div><div class='add'>+</div><div class='add'>+      attribute-set: tsinfo</div><div class='add'>+</div><div class='add'>+      do: &amp;tsinfo-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - timestamping</div><div class='add'>+            - tx-types</div><div class='add'>+            - rx-filters</div><div class='add'>+            - phc-index</div><div class='add'>+      dump: *tsinfo-get-op</div><div class='add'>+    -</div><div class='add'>+      name: cable-test-act</div><div class='add'>+      doc: Cable test.</div><div class='add'>+</div><div class='add'>+      attribute-set: cable-test</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - cable-test-nft-nest</div><div class='add'>+    -</div><div class='add'>+      name: cable-test-tdr-act</div><div class='add'>+      doc: Cable test TDR.</div><div class='add'>+</div><div class='add'>+      attribute-set: cable-test-tdr</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - cable-test-tdr-cfg</div><div class='add'>+    -</div><div class='add'>+      name: tunnel-info-get</div><div class='add'>+      doc: Get tsinfo params.</div><div class='add'>+</div><div class='add'>+      attribute-set: tunnel-info</div><div class='add'>+</div><div class='add'>+      do: &amp;tunnel-info-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - udp-ports</div><div class='add'>+      dump: *tunnel-info-get-op</div><div class='add'>+    -</div><div class='add'>+      name: fec-get</div><div class='add'>+      doc: Get FEC params.</div><div class='add'>+</div><div class='add'>+      attribute-set: fec</div><div class='add'>+</div><div class='add'>+      do: &amp;fec-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;fec</div><div class='add'>+            - header</div><div class='add'>+            - modes</div><div class='add'>+            - auto</div><div class='add'>+            - active</div><div class='add'>+            - stats</div><div class='add'>+      dump: *fec-get-op</div><div class='add'>+    -</div><div class='add'>+      name: fec-set</div><div class='add'>+      doc: Set FEC params.</div><div class='add'>+</div><div class='add'>+      attribute-set: fec</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *fec</div><div class='add'>+    -</div><div class='add'>+      name: fec-ntf</div><div class='add'>+      doc: Notification for change in FEC params.</div><div class='add'>+      notify: fec-get</div><div class='add'>+    -</div><div class='add'>+      name: module-eeprom-get</div><div class='add'>+      doc: Get module EEPROM params.</div><div class='add'>+</div><div class='add'>+      attribute-set: module-eeprom</div><div class='add'>+</div><div class='add'>+      do: &amp;module-eeprom-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - offset</div><div class='add'>+            - length</div><div class='add'>+            - page</div><div class='add'>+            - bank</div><div class='add'>+            - i2c-address</div><div class='add'>+            - data</div><div class='add'>+      dump: *module-eeprom-get-op</div><div class='add'>+    -</div><div class='add'>+      name: stats-get</div><div class='add'>+      doc: Get statistics.</div><div class='add'>+</div><div class='add'>+      attribute-set: stats</div><div class='add'>+</div><div class='add'>+      do: &amp;stats-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - groups</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - groups</div><div class='add'>+            - grp</div><div class='add'>+            - src</div><div class='add'>+      dump: *stats-get-op</div><div class='add'>+    -</div><div class='add'>+      name: phc-vclocks-get</div><div class='add'>+      doc: Get PHC VCLOCKs.</div><div class='add'>+</div><div class='add'>+      attribute-set: phc-vclocks</div><div class='add'>+</div><div class='add'>+      do: &amp;phc-vclocks-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - num</div><div class='add'>+      dump: *phc-vclocks-get-op</div><div class='add'>+    -</div><div class='add'>+      name: module-get</div><div class='add'>+      doc: Get module params.</div><div class='add'>+</div><div class='add'>+      attribute-set: module</div><div class='add'>+</div><div class='add'>+      do: &amp;module-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;module</div><div class='add'>+            - header</div><div class='add'>+            - power-mode-policy</div><div class='add'>+            - power-mode</div><div class='add'>+      dump: *module-get-op</div><div class='add'>+    -</div><div class='add'>+      name: module-set</div><div class='add'>+      doc: Set module params.</div><div class='add'>+</div><div class='add'>+      attribute-set: module</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *module</div><div class='add'>+    -</div><div class='add'>+      name: module-ntf</div><div class='add'>+      doc: Notification for change in module params.</div><div class='add'>+      notify: module-get</div><div class='add'>+    -</div><div class='add'>+      name: pse-get</div><div class='add'>+      doc: Get Power Sourcing Equipment params.</div><div class='add'>+</div><div class='add'>+      attribute-set: pse</div><div class='add'>+</div><div class='add'>+      do: &amp;pse-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;pse</div><div class='add'>+            - header</div><div class='add'>+            - admin-state</div><div class='add'>+            - admin-control</div><div class='add'>+            - pw-d-status</div><div class='add'>+      dump: *pse-get-op</div><div class='add'>+    -</div><div class='add'>+      name: pse-set</div><div class='add'>+      doc: Set Power Sourcing Equipment params.</div><div class='add'>+</div><div class='add'>+      attribute-set: pse</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *pse</div><div class='add'>+    -</div><div class='add'>+      name: rss-get</div><div class='add'>+      doc: Get RSS params.</div><div class='add'>+</div><div class='add'>+      attribute-set: rss</div><div class='add'>+</div><div class='add'>+      do: &amp;rss-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - context</div><div class='add'>+            - hfunc</div><div class='add'>+            - indir</div><div class='add'>+            - hkey</div><div class='add'>+      dump: *rss-get-op</div><div class='add'>+    -</div><div class='add'>+      name: plca-get</div><div class='add'>+      doc: Get PLCA params.</div><div class='add'>+</div><div class='add'>+      attribute-set: plca</div><div class='add'>+</div><div class='add'>+      do: &amp;plca-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: &amp;plca</div><div class='add'>+            - header</div><div class='add'>+            - version</div><div class='add'>+            - enabled</div><div class='add'>+            - status</div><div class='add'>+            - node-cnt</div><div class='add'>+            - node-id</div><div class='add'>+            - to-tmr</div><div class='add'>+            - burst-cnt</div><div class='add'>+            - burst-tmr</div><div class='add'>+      dump: *plca-get-op</div><div class='add'>+    -</div><div class='add'>+      name: plca-set</div><div class='add'>+      doc: Set PLCA params.</div><div class='add'>+</div><div class='add'>+      attribute-set: plca</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes: *plca</div><div class='add'>+    -</div><div class='add'>+      name: plca-get-status</div><div class='add'>+      doc: Get PLCA status params.</div><div class='add'>+</div><div class='add'>+      attribute-set: plca</div><div class='add'>+</div><div class='add'>+      do: &amp;plca-get-status-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes: *plca</div><div class='add'>+      dump: *plca-get-status-op</div><div class='add'>+    -</div><div class='add'>+      name: plca-ntf</div><div class='add'>+      doc: Notification for change in PLCA params.</div><div class='add'>+      notify: plca-get</div><div class='add'>+    -</div><div class='add'>+      name: mm-get</div><div class='add'>+      doc: Get MAC Merge configuration and state</div><div class='add'>+</div><div class='add'>+      attribute-set: mm</div><div class='add'>+</div><div class='add'>+      do: &amp;mm-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - pmac-enabled</div><div class='add'>+            - tx-enabled</div><div class='add'>+            - tx-active</div><div class='add'>+            - tx-min-frag-size</div><div class='add'>+            - rx-min-frag-size</div><div class='add'>+            - verify-enabled</div><div class='add'>+            - verify-time</div><div class='add'>+            - max-verify-time</div><div class='add'>+            - stats</div><div class='add'>+      dump: *mm-get-op</div><div class='add'>+    -</div><div class='add'>+      name: mm-set</div><div class='add'>+      doc: Set MAC Merge configuration</div><div class='add'>+</div><div class='add'>+      attribute-set: mm</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - header</div><div class='add'>+            - verify-enabled</div><div class='add'>+            - verify-time</div><div class='add'>+            - tx-enabled</div><div class='add'>+            - pmac-enabled</div><div class='add'>+            - tx-min-frag-size</div><div class='add'>+    -</div><div class='add'>+      name: mm-ntf</div><div class='add'>+      doc: Notification for change in MAC Merge configuration.</div><div class='add'>+      notify: mm-get</div><div class='head'>diff --git a/Documentation/netlink/specs/fou.yaml b/Documentation/netlink/specs/fou.yaml<br/>new file mode 100644<br/>index 000000000000..3e13826a3fdf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/specs/fou.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/specs/fou.yaml</a></div><div class='hunk'>@@ -0,0 +1,132 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: fou</div><div class='add'>+</div><div class='add'>+protocol: genetlink-legacy</div><div class='add'>+</div><div class='add'>+doc: |</div><div class='add'>+  Foo-over-UDP.</div><div class='add'>+</div><div class='add'>+c-family-name: fou-genl-name</div><div class='add'>+c-version-name: fou-genl-version</div><div class='add'>+max-by-define: true</div><div class='add'>+kernel-policy: global</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: encap_type</div><div class='add'>+    name-prefix: fou-encap-</div><div class='add'>+    enum-name:</div><div class='add'>+    entries: [ unspec, direct, gue ]</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: fou</div><div class='add'>+    name-prefix: fou-attr-</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: unspec</div><div class='add'>+        type: unused</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: port</div><div class='add'>+        type: u16</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: af</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: ipproto</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: type</div><div class='add'>+        type: u8</div><div class='add'>+      -</div><div class='add'>+        name: remcsum_nopartial</div><div class='add'>+        type: flag</div><div class='add'>+      -</div><div class='add'>+        name: local_v4</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: local_v6</div><div class='add'>+        type: binary</div><div class='add'>+        checks:</div><div class='add'>+          min-len: 16</div><div class='add'>+      -</div><div class='add'>+        name: peer_v4</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: peer_v6</div><div class='add'>+        type: binary</div><div class='add'>+        checks:</div><div class='add'>+          min-len: 16</div><div class='add'>+      -</div><div class='add'>+        name: peer_port</div><div class='add'>+        type: u16</div><div class='add'>+        byte-order: big-endian</div><div class='add'>+      -</div><div class='add'>+        name: ifindex</div><div class='add'>+        type: s32</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: unspec</div><div class='add'>+      doc: unused</div><div class='add'>+      value: 0</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: add</div><div class='add'>+      doc: Add port.</div><div class='add'>+      attribute-set: fou</div><div class='add'>+</div><div class='add'>+      dont-validate: [ strict, dump ]</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request: &amp;all_attrs</div><div class='add'>+          attributes:</div><div class='add'>+            - port</div><div class='add'>+            - ipproto</div><div class='add'>+            - type</div><div class='add'>+            - remcsum_nopartial</div><div class='add'>+            - local_v4</div><div class='add'>+            - peer_v4</div><div class='add'>+            - local_v6</div><div class='add'>+            - peer_v6</div><div class='add'>+            - peer_port</div><div class='add'>+            - ifindex</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: del</div><div class='add'>+      doc: Delete port.</div><div class='add'>+      attribute-set: fou</div><div class='add'>+</div><div class='add'>+      dont-validate: [ strict, dump ]</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request:  &amp;select_attrs</div><div class='add'>+          attributes:</div><div class='add'>+          - af</div><div class='add'>+          - ifindex</div><div class='add'>+          - port</div><div class='add'>+          - peer_port</div><div class='add'>+          - local_v4</div><div class='add'>+          - peer_v4</div><div class='add'>+          - local_v6</div><div class='add'>+          - peer_v6</div><div class='add'>+</div><div class='add'>+    -</div><div class='add'>+      name: get</div><div class='add'>+      doc: Get tunnel info.</div><div class='add'>+      attribute-set: fou</div><div class='add'>+      dont-validate: [ strict, dump ]</div><div class='add'>+</div><div class='add'>+      do:</div><div class='add'>+        request: *select_attrs</div><div class='add'>+        reply: *all_attrs</div><div class='add'>+</div><div class='add'>+      dump:</div><div class='add'>+        reply: *all_attrs</div><div class='head'>diff --git a/Documentation/netlink/specs/handshake.yaml b/Documentation/netlink/specs/handshake.yaml<br/>new file mode 100644<br/>index 000000000000..614f1a585511<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/specs/handshake.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/specs/handshake.yaml</a></div><div class='hunk'>@@ -0,0 +1,124 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+#</div><div class='add'>+# Author: Chuck Lever &lt;chuck.lever@oracle.com&gt;</div><div class='add'>+#</div><div class='add'>+# Copyright (c) 2023, Oracle and/or its affiliates.</div><div class='add'>+#</div><div class='add'>+</div><div class='add'>+name: handshake</div><div class='add'>+</div><div class='add'>+protocol: genetlink</div><div class='add'>+</div><div class='add'>+doc: Netlink protocol to request a transport layer security handshake.</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: handler-class</div><div class='add'>+    value-start: 0</div><div class='add'>+    entries: [ none, tlshd, max ]</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: msg-type</div><div class='add'>+    value-start: 0</div><div class='add'>+    entries: [ unspec, clienthello, serverhello ]</div><div class='add'>+  -</div><div class='add'>+    type: enum</div><div class='add'>+    name: auth</div><div class='add'>+    value-start: 0</div><div class='add'>+    entries: [ unspec, unauth, psk, x509 ]</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: x509</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: cert</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: privkey</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: accept</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: sockfd</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: handler-class</div><div class='add'>+        type: u32</div><div class='add'>+        enum: handler-class</div><div class='add'>+      -</div><div class='add'>+        name: message-type</div><div class='add'>+        type: u32</div><div class='add'>+        enum: msg-type</div><div class='add'>+      -</div><div class='add'>+        name: timeout</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: auth-mode</div><div class='add'>+        type: u32</div><div class='add'>+        enum: auth</div><div class='add'>+      -</div><div class='add'>+        name: peer-identity</div><div class='add'>+        type: u32</div><div class='add'>+        multi-attr: true</div><div class='add'>+      -</div><div class='add'>+        name: certificate</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: x509</div><div class='add'>+        multi-attr: true</div><div class='add'>+  -</div><div class='add'>+    name: done</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: status</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: sockfd</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: remote-auth</div><div class='add'>+        type: u32</div><div class='add'>+        multi-attr: true</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: ready</div><div class='add'>+      doc: Notify handlers that a new handshake request is waiting</div><div class='add'>+      notify: accept</div><div class='add'>+    -</div><div class='add'>+      name: accept</div><div class='add'>+      doc: Handler retrieves next queued handshake request</div><div class='add'>+      attribute-set: accept</div><div class='add'>+      flags: [ admin-perm ]</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - handler-class</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - sockfd</div><div class='add'>+            - message-type</div><div class='add'>+            - timeout</div><div class='add'>+            - auth-mode</div><div class='add'>+            - peer-identity</div><div class='add'>+            - certificate</div><div class='add'>+    -</div><div class='add'>+      name: done</div><div class='add'>+      doc: Handler reports handshake completion</div><div class='add'>+      attribute-set: done</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - status</div><div class='add'>+            - sockfd</div><div class='add'>+            - remote-auth</div><div class='add'>+</div><div class='add'>+mcast-groups:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: none</div><div class='add'>+    -</div><div class='add'>+      name: tlshd</div><div class='head'>diff --git a/Documentation/netlink/specs/netdev.yaml b/Documentation/netlink/specs/netdev.yaml<br/>new file mode 100644<br/>index 000000000000..b99e7ffef7a1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/specs/netdev.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/specs/netdev.yaml</a></div><div class='hunk'>@@ -0,0 +1,101 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: netdev</div><div class='add'>+</div><div class='add'>+doc:</div><div class='add'>+  netdev configuration over generic netlink.</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    type: flags</div><div class='add'>+    name: xdp-act</div><div class='add'>+    render-max: true</div><div class='add'>+    entries:</div><div class='add'>+      -</div><div class='add'>+        name: basic</div><div class='add'>+        doc:</div><div class='add'>+          XDP feautues set supported by all drivers</div><div class='add'>+          (XDP_ABORTED, XDP_DROP, XDP_PASS, XDP_TX)</div><div class='add'>+      -</div><div class='add'>+        name: redirect</div><div class='add'>+        doc:</div><div class='add'>+          The netdev supports XDP_REDIRECT</div><div class='add'>+      -</div><div class='add'>+        name: ndo-xmit</div><div class='add'>+        doc:</div><div class='add'>+          This feature informs if netdev implements ndo_xdp_xmit callback.</div><div class='add'>+      -</div><div class='add'>+        name: xsk-zerocopy</div><div class='add'>+        doc:</div><div class='add'>+          This feature informs if netdev supports AF_XDP in zero copy mode.</div><div class='add'>+      -</div><div class='add'>+        name: hw-offload</div><div class='add'>+        doc:</div><div class='add'>+         This feature informs if netdev supports XDP hw offloading.</div><div class='add'>+      -</div><div class='add'>+        name: rx-sg</div><div class='add'>+        doc:</div><div class='add'>+          This feature informs if netdev implements non-linear XDP buffer</div><div class='add'>+          support in the driver napi callback.</div><div class='add'>+      -</div><div class='add'>+        name: ndo-xmit-sg</div><div class='add'>+        doc:</div><div class='add'>+          This feature informs if netdev implements non-linear XDP buffer</div><div class='add'>+          support in ndo_xdp_xmit callback.</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: dev</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: ifindex</div><div class='add'>+        doc: netdev ifindex</div><div class='add'>+        type: u32</div><div class='add'>+        checks:</div><div class='add'>+          min: 1</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: pad</div><div class='add'>+      -</div><div class='add'>+        name: xdp-features</div><div class='add'>+        doc: Bitmask of enabled xdp-features.</div><div class='add'>+        type: u64</div><div class='add'>+        enum: xdp-act</div><div class='add'>+        enum-as-flags: true</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: dev-get</div><div class='add'>+      doc: Get / dump information about a netdev.</div><div class='add'>+      attribute-set: dev</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+        reply: &amp;dev-all</div><div class='add'>+          attributes:</div><div class='add'>+            - ifindex</div><div class='add'>+            - xdp-features</div><div class='add'>+      dump:</div><div class='add'>+        reply: *dev-all</div><div class='add'>+    -</div><div class='add'>+      name: dev-add-ntf</div><div class='add'>+      doc: Notification about device appearing.</div><div class='add'>+      notify: dev-get</div><div class='add'>+      mcgrp: mgmt</div><div class='add'>+    -</div><div class='add'>+      name: dev-del-ntf</div><div class='add'>+      doc: Notification about device disappearing.</div><div class='add'>+      notify: dev-get</div><div class='add'>+      mcgrp: mgmt</div><div class='add'>+    -</div><div class='add'>+      name: dev-change-ntf</div><div class='add'>+      doc: Notification about device configuration being changed.</div><div class='add'>+      notify: dev-get</div><div class='add'>+      mcgrp: mgmt</div><div class='add'>+</div><div class='add'>+mcast-groups:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: mgmt</div><div class='head'>diff --git a/Documentation/netlink/specs/ovs_datapath.yaml b/Documentation/netlink/specs/ovs_datapath.yaml<br/>new file mode 100644<br/>index 000000000000..6d71db8c4416<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/specs/ovs_datapath.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/specs/ovs_datapath.yaml</a></div><div class='hunk'>@@ -0,0 +1,153 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: ovs_datapath</div><div class='add'>+version: 2</div><div class='add'>+protocol: genetlink-legacy</div><div class='add'>+</div><div class='add'>+doc:</div><div class='add'>+  OVS datapath configuration over generic netlink.</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    name: ovs-header</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: dp-ifindex</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: user-features</div><div class='add'>+    type: flags</div><div class='add'>+    entries:</div><div class='add'>+      -</div><div class='add'>+        name: unaligned</div><div class='add'>+        doc: Allow last Netlink attribute to be unaligned</div><div class='add'>+      -</div><div class='add'>+        name: vport-pids</div><div class='add'>+        doc: Allow datapath to associate multiple Netlink PIDs to each vport</div><div class='add'>+      -</div><div class='add'>+        name: tc-recirc-sharing</div><div class='add'>+        doc: Allow tc offload recirc sharing</div><div class='add'>+      -</div><div class='add'>+        name: dispatch-upcall-per-cpu</div><div class='add'>+        doc: Allow per-cpu dispatch of upcalls</div><div class='add'>+  -</div><div class='add'>+    name: datapath-stats</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: hit</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: missed</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: lost</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: flows</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='add'>+    name: megaflow-stats</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: mask-hit</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: masks</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: padding</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: cache-hits</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: pad1</div><div class='add'>+        type: u64</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: datapath</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: upcall-pid</div><div class='add'>+        doc: upcall pid</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: stats</div><div class='add'>+        type: binary</div><div class='add'>+        struct: datapath-stats</div><div class='add'>+      -</div><div class='add'>+        name: megaflow-stats</div><div class='add'>+        type: binary</div><div class='add'>+        struct: megaflow-stats</div><div class='add'>+      -</div><div class='add'>+        name: user-features</div><div class='add'>+        type: u32</div><div class='add'>+        enum: user-features</div><div class='add'>+        enum-as-flags: true</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: unused</div><div class='add'>+      -</div><div class='add'>+        name: masks-cache-size</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: per-cpu-pids</div><div class='add'>+        type: binary</div><div class='add'>+        sub-type: u32</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  fixed-header: ovs-header</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: dp-get</div><div class='add'>+      doc: Get / dump OVS data path configuration and state</div><div class='add'>+      value: 3</div><div class='add'>+      attribute-set: datapath</div><div class='add'>+      do: &amp;dp-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+        reply:</div><div class='add'>+          attributes:</div><div class='add'>+            - name</div><div class='add'>+            - upcall-pid</div><div class='add'>+            - stats</div><div class='add'>+            - megaflow-stats</div><div class='add'>+            - user-features</div><div class='add'>+            - masks-cache-size</div><div class='add'>+            - per-cpu-pids</div><div class='add'>+      dump: *dp-get-op</div><div class='add'>+    -</div><div class='add'>+      name: dp-new</div><div class='add'>+      doc: Create new OVS data path</div><div class='add'>+      value: 1</div><div class='add'>+      attribute-set: datapath</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - dp-ifindex</div><div class='add'>+            - name</div><div class='add'>+            - upcall-pid</div><div class='add'>+            - user-features</div><div class='add'>+    -</div><div class='add'>+      name: dp-del</div><div class='add'>+      doc: Delete existing OVS data path</div><div class='add'>+      value: 2</div><div class='add'>+      attribute-set: datapath</div><div class='add'>+      do:</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - dp-ifindex</div><div class='add'>+            - name</div><div class='add'>+</div><div class='add'>+mcast-groups:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: ovs_datapath</div><div class='head'>diff --git a/Documentation/netlink/specs/ovs_vport.yaml b/Documentation/netlink/specs/ovs_vport.yaml<br/>new file mode 100644<br/>index 000000000000..8e55622ddf11<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/netlink/specs/ovs_vport.yaml?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/netlink/specs/ovs_vport.yaml</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+name: ovs_vport</div><div class='add'>+version: 2</div><div class='add'>+protocol: genetlink-legacy</div><div class='add'>+</div><div class='add'>+doc:</div><div class='add'>+  OVS vport configuration over generic netlink.</div><div class='add'>+</div><div class='add'>+definitions:</div><div class='add'>+  -</div><div class='add'>+    name: ovs-header</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: dp-ifindex</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: vport-type</div><div class='add'>+    type: enum</div><div class='add'>+    entries: [ unspec, netdev, internal, gre, vxlan, geneve ]</div><div class='add'>+  -</div><div class='add'>+    name: vport-stats</div><div class='add'>+    type: struct</div><div class='add'>+    members:</div><div class='add'>+      -</div><div class='add'>+        name: rx-packets</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: tx-packets</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: rx-bytes</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: tx-bytes</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: rx-errors</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: tx-errors</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: rx-dropped</div><div class='add'>+        type: u64</div><div class='add'>+      -</div><div class='add'>+        name: tx-dropped</div><div class='add'>+        type: u64</div><div class='add'>+</div><div class='add'>+attribute-sets:</div><div class='add'>+  -</div><div class='add'>+    name: vport-options</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: dst-port</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: extension</div><div class='add'>+        type: u32</div><div class='add'>+  -</div><div class='add'>+    name: upcall-stats</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: success</div><div class='add'>+        type: u64</div><div class='add'>+        value: 0</div><div class='add'>+      -</div><div class='add'>+        name: fail</div><div class='add'>+        type: u64</div><div class='add'>+  -</div><div class='add'>+    name: vport</div><div class='add'>+    attributes:</div><div class='add'>+      -</div><div class='add'>+        name: port-no</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: type</div><div class='add'>+        type: u32</div><div class='add'>+        enum: vport-type</div><div class='add'>+      -</div><div class='add'>+        name: name</div><div class='add'>+        type: string</div><div class='add'>+      -</div><div class='add'>+        name: options</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: vport-options</div><div class='add'>+      -</div><div class='add'>+        name: upcall-pid</div><div class='add'>+        type: binary</div><div class='add'>+        sub-type: u32</div><div class='add'>+      -</div><div class='add'>+        name: stats</div><div class='add'>+        type: binary</div><div class='add'>+        struct: vport-stats</div><div class='add'>+      -</div><div class='add'>+        name: pad</div><div class='add'>+        type: unused</div><div class='add'>+      -</div><div class='add'>+        name: ifindex</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: netnsid</div><div class='add'>+        type: u32</div><div class='add'>+      -</div><div class='add'>+        name: upcall-stats</div><div class='add'>+        type: nest</div><div class='add'>+        nested-attributes: upcall-stats</div><div class='add'>+</div><div class='add'>+operations:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: vport-get</div><div class='add'>+      doc: Get / dump OVS vport configuration and state</div><div class='add'>+      value: 3</div><div class='add'>+      attribute-set: vport</div><div class='add'>+      fixed-header: ovs-header</div><div class='add'>+      do: &amp;vport-get-op</div><div class='add'>+        request:</div><div class='add'>+          attributes:</div><div class='add'>+            - dp-ifindex</div><div class='add'>+            - name</div><div class='add'>+        reply: &amp;dev-all</div><div class='add'>+          attributes:</div><div class='add'>+            - dp-ifindex</div><div class='add'>+            - port-no</div><div class='add'>+            - type</div><div class='add'>+            - name</div><div class='add'>+            - upcall-pid</div><div class='add'>+            - stats</div><div class='add'>+            - ifindex</div><div class='add'>+            - netnsid</div><div class='add'>+            - upcall-stats</div><div class='add'>+      dump: *vport-get-op</div><div class='add'>+</div><div class='add'>+mcast-groups:</div><div class='add'>+  list:</div><div class='add'>+    -</div><div class='add'>+      name: ovs_vport</div><div class='head'>diff --git a/Documentation/networking/af_xdp.rst b/Documentation/networking/af_xdp.rst<br/>index 60b217b436be..247c6c4127e9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/af_xdp.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/af_xdp.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/af_xdp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/af_xdp.rst</a></div><div class='hunk'>@@ -419,7 +419,7 @@ XDP_UMEM_REG setsockopt</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='ctx'> This setsockopt registers a UMEM to a socket. This is the area that</div><div class='del'>-contain all the buffers that packet can recide in. The call takes a</div><div class='add'>+contain all the buffers that packet can reside in. The call takes a</div><div class='ctx'> pointer to the beginning of this area and the size of it. Moreover, it</div><div class='ctx'> also has parameter called chunk_size that is the size that the UMEM is</div><div class='ctx'> divided into. It can only be 2K or 4K at the moment. If you have an</div><div class='hunk'>@@ -592,7 +592,7 @@ A: When a netdev of a physical NIC is initialized, Linux usually</div><div class='ctx'>    A number of other ways are possible all up to the capabilities of</div><div class='ctx'>    the NIC you have.</div><div class='ctx'> </div><div class='del'>-Q: Can I use the XSKMAP to implement a switch betwen different umems</div><div class='add'>+Q: Can I use the XSKMAP to implement a switch between different umems</div><div class='ctx'>    in copy mode?</div><div class='ctx'> </div><div class='ctx'> A: The short answer is no, that is not supported at the moment. The</div><div class='head'>diff --git a/Documentation/networking/arcnet-hardware.rst b/Documentation/networking/arcnet-hardware.rst<br/>index ac249ac8fcf2..982215723582 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/arcnet-hardware.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/arcnet-hardware.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/arcnet-hardware.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/arcnet-hardware.rst</a></div><div class='hunk'>@@ -1902,7 +1902,7 @@ of 32 possible I/O Base addresses using the following tables::</div><div class='ctx'>      6    |  10</div><div class='ctx'> </div><div class='ctx'> The I/O address is sum of all switches set to "1". Remember that</div><div class='del'>-the I/O address space bellow 0x200 is RESERVED for mainboard, so</div><div class='add'>+the I/O address space below 0x200 is RESERVED for mainboard, so</div><div class='ctx'> switch 1 should be ALWAYS SET TO OFF.</div><div class='ctx'> </div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/batman-adv.rst b/Documentation/networking/batman-adv.rst<br/>index b85563ea3682..8a0dcb1894b4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/batman-adv.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/batman-adv.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/batman-adv.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/batman-adv.rst</a></div><div class='hunk'>@@ -159,7 +159,7 @@ Please send us comments, experiences, questions, anything :)</div><div class='ctx'> IRC:</div><div class='ctx'>   #batadv on ircs://irc.hackint.org/</div><div class='ctx'> Mailing-list:</div><div class='del'>-  b.a.t.m.a.n@open-mesh.org (optional subscription at</div><div class='add'>+  b.a.t.m.a.n@lists.open-mesh.org (optional subscription at</div><div class='ctx'>   https://lists.open-mesh.org/mailman3/postorius/lists/b.a.t.m.a.n.lists.open-mesh.org/)</div><div class='ctx'> </div><div class='ctx'> You can also contact the Authors:</div><div class='head'>diff --git a/Documentation/networking/bonding.rst b/Documentation/networking/bonding.rst<br/>index 525e6842dd33..28925e19622d 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/bonding.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/bonding.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/bonding.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/bonding.rst</a></div><div class='hunk'>@@ -566,7 +566,8 @@ miimon</div><div class='ctx'> 	link monitoring.  A value of 100 is a good starting point.</div><div class='ctx'> 	The use_carrier option, below, affects how the link state is</div><div class='ctx'> 	determined.  See the High Availability section for additional</div><div class='del'>-	information.  The default value is 0.</div><div class='add'>+	information.  The default value is 100 if arp_interval is not</div><div class='add'>+	set.</div><div class='ctx'> </div><div class='ctx'> min_links</div><div class='ctx'> </div><div class='hunk'>@@ -775,10 +776,22 @@ peer_notif_delay</div><div class='ctx'> 	Specify the delay, in milliseconds, between each peer</div><div class='ctx'> 	notification (gratuitous ARP and unsolicited IPv6 Neighbor</div><div class='ctx'> 	Advertisement) when they are issued after a failover event.</div><div class='del'>-	This delay should be a multiple of the link monitor interval</div><div class='del'>-	(arp_interval or miimon, whichever is active). The default</div><div class='del'>-	value is 0 which means to match the value of the link monitor</div><div class='del'>-	interval.</div><div class='add'>+	This delay should be a multiple of the MII link monitor interval</div><div class='add'>+	(miimon).</div><div class='add'>+</div><div class='add'>+	The valid range is 0 - 300000. The default value is 0, which means</div><div class='add'>+	to match the value of the MII link monitor interval.</div><div class='add'>+</div><div class='add'>+prio</div><div class='add'>+	Slave priority. A higher number means higher priority.</div><div class='add'>+	The primary slave has the highest priority. This option also</div><div class='add'>+	follows the primary_reselect rules.</div><div class='add'>+</div><div class='add'>+	This option could only be configured via netlink, and is only valid</div><div class='add'>+	for active-backup(1), balance-tlb (5) and balance-alb (6) mode.</div><div class='add'>+	The valid value range is a signed 32 bit integer.</div><div class='add'>+</div><div class='add'>+	The default value is 0.</div><div class='ctx'> </div><div class='ctx'> primary</div><div class='ctx'> </div><div class='hunk'>@@ -835,7 +848,7 @@ primary_reselect</div><div class='ctx'> tlb_dynamic_lb</div><div class='ctx'> </div><div class='ctx'> 	Specifies if dynamic shuffling of flows is enabled in tlb</div><div class='del'>-	mode. The value has no effect on any other modes.</div><div class='add'>+	or alb mode. The value has no effect on any other modes.</div><div class='ctx'> </div><div class='ctx'> 	The default behavior of tlb mode is to shuffle active flows across</div><div class='ctx'> 	slaves based on the load in that interval. This gives nice lb</div><div class='hunk'>@@ -894,7 +907,7 @@ xmit_hash_policy</div><div class='ctx'> 		Uses XOR of hardware MAC addresses and packet type ID</div><div class='ctx'> 		field to generate the hash. The formula is</div><div class='ctx'> </div><div class='del'>-		hash = source MAC XOR destination MAC XOR packet type ID</div><div class='add'>+		hash = source MAC[5] XOR destination MAC[5] XOR packet type ID</div><div class='ctx'> 		slave number = hash modulo slave count</div><div class='ctx'> </div><div class='ctx'> 		This algorithm will place all traffic to a particular</div><div class='hunk'>@@ -910,7 +923,7 @@ xmit_hash_policy</div><div class='ctx'> 		Uses XOR of hardware MAC addresses and IP addresses to</div><div class='ctx'> 		generate the hash.  The formula is</div><div class='ctx'> </div><div class='del'>-		hash = source MAC XOR destination MAC XOR packet type ID</div><div class='add'>+		hash = source MAC[5] XOR destination MAC[5] XOR packet type ID</div><div class='ctx'> 		hash = hash XOR source IP XOR destination IP</div><div class='ctx'> 		hash = hash XOR (hash RSHIFT 16)</div><div class='ctx'> 		hash = hash XOR (hash RSHIFT 8)</div><div class='hunk'>@@ -945,6 +958,7 @@ xmit_hash_policy</div><div class='ctx'> 		hash = hash XOR source IP XOR destination IP</div><div class='ctx'> 		hash = hash XOR (hash RSHIFT 16)</div><div class='ctx'> 		hash = hash XOR (hash RSHIFT 8)</div><div class='add'>+		hash = hash RSHIFT 1</div><div class='ctx'> 		And then hash is reduced modulo slave count.</div><div class='ctx'> </div><div class='ctx'> 		If the protocol is IPv6 then the source and destination</div><div class='hunk'>@@ -1971,15 +1985,6 @@ uses the response as an indication that the link is operating.  This</div><div class='ctx'> gives some assurance that traffic is actually flowing to and from one</div><div class='ctx'> or more peers on the local network.</div><div class='ctx'> </div><div class='del'>-The ARP monitor relies on the device driver itself to verify</div><div class='del'>-that traffic is flowing.  In particular, the driver must keep up to</div><div class='del'>-date the last receive time, dev-&gt;last_rx.  Drivers that use NETIF_F_LLTX</div><div class='del'>-flag must also update netdev_queue-&gt;trans_start.  If they do not, then the</div><div class='del'>-ARP monitor will immediately fail any slaves using that driver, and</div><div class='del'>-those slaves will stay down.  If networking monitoring (tcpdump, etc)</div><div class='del'>-shows the ARP requests and replies on the network, then it may be that</div><div class='del'>-your device driver is not updating last_rx and trans_start.</div><div class='del'>-</div><div class='ctx'> 7.2 Configuring Multiple ARP Targets</div><div class='ctx'> ------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/bridge.rst b/Documentation/networking/bridge.rst<br/>index 4aef9cddde2f..c859f3c1636e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/bridge.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/bridge.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/bridge.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/bridge.rst</a></div><div class='hunk'>@@ -8,7 +8,7 @@ In order to use the Ethernet bridging functionality, you'll need the</div><div class='ctx'> userspace tools.</div><div class='ctx'> </div><div class='ctx'> Documentation for Linux bridging is on:</div><div class='del'>-   http://www.linuxfoundation.org/collaborate/workgroups/networking/bridge</div><div class='add'>+   https://wiki.linuxfoundation.org/networking/bridge</div><div class='ctx'> </div><div class='ctx'> The bridge-utilities are maintained at:</div><div class='ctx'>    git://git.kernel.org/pub/scm/linux/kernel/git/shemminger/bridge-utils.git</div><div class='head'>diff --git a/Documentation/networking/can.rst b/Documentation/networking/can.rst<br/>index f34cb0e4460e..d7e1ada905b2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/can.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/can.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/can.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/can.rst</a></div><div class='hunk'>@@ -168,7 +168,7 @@ reflect the correct [#f1]_ traffic on the node the loopback of the sent</div><div class='ctx'> data has to be performed right after a successful transmission. If</div><div class='ctx'> the CAN network interface is not capable of performing the loopback for</div><div class='ctx'> some reason the SocketCAN core can do this task as a fallback solution.</div><div class='del'>-See :ref:`socketcan-local-loopback1` for details (recommended).</div><div class='add'>+See :ref:`socketcan-local-loopback2` for details (recommended).</div><div class='ctx'> </div><div class='ctx'> The loopback functionality is enabled by default to reflect standard</div><div class='ctx'> networking behaviour for CAN applications. Due to some requests from</div><div class='hunk'>@@ -931,7 +931,7 @@ ival1:</div><div class='ctx'> ival2:</div><div class='ctx'> 	Throttle the received message rate down to the value of ival2. This</div><div class='ctx'> 	is useful to reduce messages for the application when the signal inside the</div><div class='del'>-	CAN frame is stateless as state changes within the ival2 periode may get</div><div class='add'>+	CAN frame is stateless as state changes within the ival2 period may get</div><div class='ctx'> 	lost.</div><div class='ctx'> </div><div class='ctx'> Broadcast Manager Multiplex Message Receive Filter</div><div class='hunk'>@@ -1148,6 +1148,39 @@ tuning on deep embedded systems'. The author is running a MPC603e</div><div class='ctx'> load without any problems ...</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+Switchable Termination Resistors</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+CAN bus requires a specific impedance across the differential pair,</div><div class='add'>+typically provided by two 120Ohm resistors on the farthest nodes of</div><div class='add'>+the bus. Some CAN controllers support activating / deactivating a</div><div class='add'>+termination resistor(s) to provide the correct impedance.</div><div class='add'>+</div><div class='add'>+Query the available resistances::</div><div class='add'>+</div><div class='add'>+    $ ip -details link show can0</div><div class='add'>+    ...</div><div class='add'>+    termination 120 [ 0, 120 ]</div><div class='add'>+</div><div class='add'>+Activate the terminating resistor::</div><div class='add'>+</div><div class='add'>+    $ ip link set dev can0 type can termination 120</div><div class='add'>+</div><div class='add'>+Deactivate the terminating resistor::</div><div class='add'>+</div><div class='add'>+    $ ip link set dev can0 type can termination 0</div><div class='add'>+</div><div class='add'>+To enable termination resistor support to a can-controller, either</div><div class='add'>+implement in the controller's struct can-priv::</div><div class='add'>+</div><div class='add'>+    termination_const</div><div class='add'>+    termination_const_cnt</div><div class='add'>+    do_set_termination</div><div class='add'>+</div><div class='add'>+or add gpio control with the device tree entries from</div><div class='add'>+Documentation/devicetree/bindings/net/can/can-controller.yaml</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> The Virtual CAN Driver (vcan)</div><div class='ctx'> -----------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/can_ucan_protocol.rst b/Documentation/networking/can_ucan_protocol.rst<br/>index 638ac1ee7914..935d872ae87c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/can_ucan_protocol.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/can_ucan_protocol.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/can_ucan_protocol.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/can_ucan_protocol.rst</a></div><div class='hunk'>@@ -50,7 +50,7 @@ Setup Packet</div><div class='ctx'> ``wIndex``         USB Interface Index (0 for device commands)</div><div class='ctx'> ``wLength``        * Host to Device - Number of bytes to transmit</div><div class='ctx'>                    * Device to Host - Maximum Number of bytes to</div><div class='del'>-                     receive. If the device send less. Commom ZLP</div><div class='add'>+                     receive. If the device send less. Common ZLP</div><div class='ctx'>                      semantics are used.</div><div class='ctx'> =================  =====================================================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/cdc_mbim.rst b/Documentation/networking/cdc_mbim.rst<br/>index 0048409c06b4..37f968acc473 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/cdc_mbim.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/cdc_mbim.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/cdc_mbim.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/cdc_mbim.rst</a></div><div class='hunk'>@@ -93,7 +93,7 @@ MBIM function can be looked up using sysfs.  For example::</div><div class='ctx'> USB configuration descriptors</div><div class='ctx'> -----------------------------</div><div class='ctx'> The wMaxControlMessage field of the CDC MBIM functional descriptor</div><div class='del'>-limits the maximum control message size. The managament application is</div><div class='add'>+limits the maximum control message size. The management application is</div><div class='ctx'> responsible for negotiating a control message size complying with the</div><div class='ctx'> requirements in section 9.3.1 of [1], taking this descriptor field</div><div class='ctx'> into consideration.</div><div class='head'>diff --git a/Documentation/networking/decnet.rst b/Documentation/networking/decnet.rst<br/>deleted file mode 100644<br/>index b8bc11ff8370..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/decnet.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/decnet.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,243 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-=========================================</div><div class='del'>-Linux DECnet Networking Layer Information</div><div class='del'>-=========================================</div><div class='del'>-</div><div class='del'>-1. Other documentation....</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-   - Project Home Pages</div><div class='del'>-     - http://www.chygwyn.com/				   - Kernel info</div><div class='del'>-     - http://linux-decnet.sourceforge.net/                - Userland tools</div><div class='del'>-     - http://www.sourceforge.net/projects/linux-decnet/   - Status page</div><div class='del'>-</div><div class='del'>-2. Configuring the kernel</div><div class='del'>-=========================</div><div class='del'>-</div><div class='del'>-Be sure to turn on the following options:</div><div class='del'>-</div><div class='del'>-    - CONFIG_DECNET (obviously)</div><div class='del'>-    - CONFIG_PROC_FS (to see what's going on)</div><div class='del'>-    - CONFIG_SYSCTL (for easy configuration)</div><div class='del'>-</div><div class='del'>-if you want to try out router support (not properly debugged yet)</div><div class='del'>-you'll need the following options as well...</div><div class='del'>-</div><div class='del'>-    - CONFIG_DECNET_ROUTER (to be able to add/delete routes)</div><div class='del'>-    - CONFIG_NETFILTER (will be required for the DECnet routing daemon)</div><div class='del'>-</div><div class='del'>-Don't turn on SIOCGIFCONF support for DECnet unless you are really sure</div><div class='del'>-that you need it, in general you won't and it can cause ifconfig to</div><div class='del'>-malfunction.</div><div class='del'>-</div><div class='del'>-Run time configuration has changed slightly from the 2.4 system. If you</div><div class='del'>-want to configure an endnode, then the simplified procedure is as follows:</div><div class='del'>-</div><div class='del'>- - Set the MAC address on your ethernet card before starting _any_ other</div><div class='del'>-   network protocols.</div><div class='del'>-</div><div class='del'>-As soon as your network card is brought into the UP state, DECnet should</div><div class='del'>-start working. If you need something more complicated or are unsure how</div><div class='del'>-to set the MAC address, see the next section. Also all configurations which</div><div class='del'>-worked with 2.4 will work under 2.5 with no change.</div><div class='del'>-</div><div class='del'>-3. Command line options</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-You can set a DECnet address on the kernel command line for compatibility</div><div class='del'>-with the 2.4 configuration procedure, but in general it's not needed any more.</div><div class='del'>-If you do st a DECnet address on the command line, it has only one purpose</div><div class='del'>-which is that its added to the addresses on the loopback device.</div><div class='del'>-</div><div class='del'>-With 2.4 kernels, DECnet would only recognise addresses as local if they</div><div class='del'>-were added to the loopback device. In 2.5, any local interface address</div><div class='del'>-can be used to loop back to the local machine. Of course this does not</div><div class='del'>-prevent you adding further addresses to the loopback device if you</div><div class='del'>-want to.</div><div class='del'>-</div><div class='del'>-N.B. Since the address list of an interface determines the addresses for</div><div class='del'>-which "hello" messages are sent, if you don't set an address on the loopback</div><div class='del'>-interface then you won't see any entries in /proc/net/neigh for the local</div><div class='del'>-host until such time as you start a connection. This doesn't affect the</div><div class='del'>-operation of the local communications in any other way though.</div><div class='del'>-</div><div class='del'>-The kernel command line takes options looking like the following::</div><div class='del'>-</div><div class='del'>-    decnet.addr=1,2</div><div class='del'>-</div><div class='del'>-the two numbers are the node address 1,2 = 1.2 For 2.2.xx kernels</div><div class='del'>-and early 2.3.xx kernels, you must use a comma when specifying the</div><div class='del'>-DECnet address like this. For more recent 2.3.xx kernels, you may</div><div class='del'>-use almost any character except space, although a `.` would be the most</div><div class='del'>-obvious choice :-)</div><div class='del'>-</div><div class='del'>-There used to be a third number specifying the node type. This option</div><div class='del'>-has gone away in favour of a per interface node type. This is now set</div><div class='del'>-using /proc/sys/net/decnet/conf/&lt;dev&gt;/forwarding. This file can be</div><div class='del'>-set with a single digit, 0=EndNode, 1=L1 Router and  2=L2 Router.</div><div class='del'>-</div><div class='del'>-There are also equivalent options for modules. The node address can</div><div class='del'>-also be set through the /proc/sys/net/decnet/ files, as can other system</div><div class='del'>-parameters.</div><div class='del'>-</div><div class='del'>-Currently the only supported devices are ethernet and ip_gre. The</div><div class='del'>-ethernet address of your ethernet card has to be set according to the DECnet</div><div class='del'>-address of the node in order for it to be autoconfigured (and then appear in</div><div class='del'>-/proc/net/decnet_dev). There is a utility available at the above</div><div class='del'>-FTP sites called dn2ethaddr which can compute the correct ethernet</div><div class='del'>-address to use. The address can be set by ifconfig either before or</div><div class='del'>-at the time the device is brought up. If you are using RedHat you can</div><div class='del'>-add the line::</div><div class='del'>-</div><div class='del'>-    MACADDR=AA:00:04:00:03:04</div><div class='del'>-</div><div class='del'>-or something similar, to /etc/sysconfig/network-scripts/ifcfg-eth0 or</div><div class='del'>-wherever your network card's configuration lives. Setting the MAC address</div><div class='del'>-of your ethernet card to an address starting with "hi-ord" will cause a</div><div class='del'>-DECnet address which matches to be added to the interface (which you can</div><div class='del'>-verify with iproute2).</div><div class='del'>-</div><div class='del'>-The default device for routing can be set through the /proc filesystem</div><div class='del'>-by setting /proc/sys/net/decnet/default_device to the</div><div class='del'>-device you want DECnet to route packets out of when no specific route</div><div class='del'>-is available. Usually this will be eth0, for example::</div><div class='del'>-</div><div class='del'>-    echo -n "eth0" &gt;/proc/sys/net/decnet/default_device</div><div class='del'>-</div><div class='del'>-If you don't set the default device, then it will default to the first</div><div class='del'>-ethernet card which has been autoconfigured as described above. You can</div><div class='del'>-confirm that by looking in the default_device file of course.</div><div class='del'>-</div><div class='del'>-There is a list of what the other files under /proc/sys/net/decnet/ do</div><div class='del'>-on the kernel patch web site (shown above).</div><div class='del'>-</div><div class='del'>-4. Run time kernel configuration</div><div class='del'>-================================</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-This is either done through the sysctl/proc interface (see the kernel web</div><div class='del'>-pages for details on what the various options do) or through the iproute2</div><div class='del'>-package in the same way as IPv4/6 configuration is performed.</div><div class='del'>-</div><div class='del'>-Documentation for iproute2 is included with the package, although there is</div><div class='del'>-as yet no specific section on DECnet, most of the features apply to both</div><div class='del'>-IP and DECnet, albeit with DECnet addresses instead of IP addresses and</div><div class='del'>-a reduced functionality.</div><div class='del'>-</div><div class='del'>-If you want to configure a DECnet router you'll need the iproute2 package</div><div class='del'>-since its the _only_ way to add and delete routes currently. Eventually</div><div class='del'>-there will be a routing daemon to send and receive routing messages for</div><div class='del'>-each interface and update the kernel routing tables accordingly. The</div><div class='del'>-routing daemon will use netfilter to listen to routing packets, and</div><div class='del'>-rtnetlink to update the kernels routing tables.</div><div class='del'>-</div><div class='del'>-The DECnet raw socket layer has been removed since it was there purely</div><div class='del'>-for use by the routing daemon which will now use netfilter (a much cleaner</div><div class='del'>-and more generic solution) instead.</div><div class='del'>-</div><div class='del'>-5. How can I tell if its working?</div><div class='del'>-=================================</div><div class='del'>-</div><div class='del'>-Here is a quick guide of what to look for in order to know if your DECnet</div><div class='del'>-kernel subsystem is working.</div><div class='del'>-</div><div class='del'>-   - Is the node address set (see /proc/sys/net/decnet/node_address)</div><div class='del'>-   - Is the node of the correct type</div><div class='del'>-     (see /proc/sys/net/decnet/conf/&lt;dev&gt;/forwarding)</div><div class='del'>-   - Is the Ethernet MAC address of each Ethernet card set to match</div><div class='del'>-     the DECnet address. If in doubt use the dn2ethaddr utility available</div><div class='del'>-     at the ftp archive.</div><div class='del'>-   - If the previous two steps are satisfied, and the Ethernet card is up,</div><div class='del'>-     you should find that it is listed in /proc/net/decnet_dev and also</div><div class='del'>-     that it appears as a directory in /proc/sys/net/decnet/conf/. The</div><div class='del'>-     loopback device (lo) should also appear and is required to communicate</div><div class='del'>-     within a node.</div><div class='del'>-   - If you have any DECnet routers on your network, they should appear</div><div class='del'>-     in /proc/net/decnet_neigh, otherwise this file will only contain the</div><div class='del'>-     entry for the node itself (if it doesn't check to see if lo is up).</div><div class='del'>-   - If you want to send to any node which is not listed in the</div><div class='del'>-     /proc/net/decnet_neigh file, you'll need to set the default device</div><div class='del'>-     to point to an Ethernet card with connection to a router. This is</div><div class='del'>-     again done with the /proc/sys/net/decnet/default_device file.</div><div class='del'>-   - Try starting a simple server and client, like the dnping/dnmirror</div><div class='del'>-     over the loopback interface. With luck they should communicate.</div><div class='del'>-     For this step and those after, you'll need the DECnet library</div><div class='del'>-     which can be obtained from the above ftp sites as well as the</div><div class='del'>-     actual utilities themselves.</div><div class='del'>-   - If this seems to work, then try talking to a node on your local</div><div class='del'>-     network, and see if you can obtain the same results.</div><div class='del'>-   - At this point you are on your own... :-)</div><div class='del'>-</div><div class='del'>-6. How to send a bug report</div><div class='del'>-===========================</div><div class='del'>-</div><div class='del'>-If you've found a bug and want to report it, then there are several things</div><div class='del'>-you can do to help me work out exactly what it is that is wrong. Useful</div><div class='del'>-information (_most_ of which _is_ _essential_) includes:</div><div class='del'>-</div><div class='del'>- - What kernel version are you running ?</div><div class='del'>- - What version of the patch are you running ?</div><div class='del'>- - How far though the above set of tests can you get ?</div><div class='del'>- - What is in the /proc/decnet* files and /proc/sys/net/decnet/* files ?</div><div class='del'>- - Which services are you running ?</div><div class='del'>- - Which client caused the problem ?</div><div class='del'>- - How much data was being transferred ?</div><div class='del'>- - Was the network congested ?</div><div class='del'>- - How can the problem be reproduced ?</div><div class='del'>- - Can you use tcpdump to get a trace ? (N.B. Most (all?) versions of</div><div class='del'>-   tcpdump don't understand how to dump DECnet properly, so including</div><div class='del'>-   the hex listing of the packet contents is _essential_, usually the -x flag.</div><div class='del'>-   You may also need to increase the length grabbed with the -s flag. The</div><div class='del'>-   -e flag also provides very useful information (ethernet MAC addresses))</div><div class='del'>-</div><div class='del'>-7. MAC FAQ</div><div class='del'>-==========</div><div class='del'>-</div><div class='del'>-A quick FAQ on ethernet MAC addresses to explain how Linux and DECnet</div><div class='del'>-interact and how to get the best performance from your hardware.</div><div class='del'>-</div><div class='del'>-Ethernet cards are designed to normally only pass received network frames</div><div class='del'>-to a host computer when they are addressed to it, or to the broadcast address.</div><div class='del'>-</div><div class='del'>-Linux has an interface which allows the setting of extra addresses for</div><div class='del'>-an ethernet card to listen to. If the ethernet card supports it, the</div><div class='del'>-filtering operation will be done in hardware, if not the extra unwanted packets</div><div class='del'>-received will be discarded by the host computer. In the latter case,</div><div class='del'>-significant processor time and bus bandwidth can be used up on a busy</div><div class='del'>-network (see the NAPI documentation for a longer explanation of these</div><div class='del'>-effects).</div><div class='del'>-</div><div class='del'>-DECnet makes use of this interface to allow running DECnet on an ethernet</div><div class='del'>-card which has already been configured using TCP/IP (presumably using the</div><div class='del'>-built in MAC address of the card, as usual) and/or to allow multiple DECnet</div><div class='del'>-addresses on each physical interface. If you do this, be aware that if your</div><div class='del'>-ethernet card doesn't support perfect hashing in its MAC address filter</div><div class='del'>-then your computer will be doing more work than required. Some cards</div><div class='del'>-will simply set themselves into promiscuous mode in order to receive</div><div class='del'>-packets from the DECnet specified addresses. So if you have one of these</div><div class='del'>-cards its better to set the MAC address of the card as described above</div><div class='del'>-to gain the best efficiency. Better still is to use a card which supports</div><div class='del'>-NAPI as well.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-8. Mailing list</div><div class='del'>-===============</div><div class='del'>-</div><div class='del'>-If you are keen to get involved in development, or want to ask questions</div><div class='del'>-about configuration, or even just report bugs, then there is a mailing</div><div class='del'>-list that you can join, details are at:</div><div class='del'>-</div><div class='del'>-http://sourceforge.net/mail/?group_id=4993</div><div class='del'>-</div><div class='del'>-9. Legal Info</div><div class='del'>-=============</div><div class='del'>-</div><div class='del'>-The Linux DECnet project team have placed their code under the GPL. The</div><div class='del'>-software is provided "as is" and without warranty express or implied.</div><div class='del'>-DECnet is a trademark of Compaq. This software is not a product of</div><div class='del'>-Compaq. We acknowledge the help of people at Compaq in providing extra</div><div class='del'>-documentation above and beyond what was previously publicly available.</div><div class='del'>-</div><div class='del'>-Steve Whitehouse &lt;SteveW@ACM.org&gt;</div><div class='del'>-</div><div class='head'>diff --git a/Documentation/networking/device_drivers/appletalk/index.rst b/Documentation/networking/device_drivers/appletalk/index.rst<br/>index de7507f02037..c196baeb0856 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/appletalk/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/appletalk/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/appletalk/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/appletalk/index.rst</a></div><div class='hunk'>@@ -9,7 +9,6 @@ Contents:</div><div class='ctx'>    :maxdepth: 2</div><div class='ctx'> </div><div class='ctx'>    cops</div><div class='del'>-   ltpc</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/appletalk/ltpc.rst b/Documentation/networking/device_drivers/appletalk/ltpc.rst<br/>deleted file mode 100644<br/>index 0ad197fd17ce..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/appletalk/ltpc.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/appletalk/ltpc.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,144 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-===========</div><div class='del'>-LTPC Driver</div><div class='del'>-===========</div><div class='del'>-</div><div class='del'>-This is the ALPHA version of the ltpc driver.</div><div class='del'>-</div><div class='del'>-In order to use it, you will need at least version 1.3.3 of the</div><div class='del'>-netatalk package, and the Apple or Farallon LocalTalk PC card.</div><div class='del'>-There are a number of different LocalTalk cards for the PC; this</div><div class='del'>-driver applies only to the one with the 65c02 processor chip on it.</div><div class='del'>-</div><div class='del'>-To include it in the kernel, select the CONFIG_LTPC switch in the</div><div class='del'>-configuration dialog.  You can also compile it as a module.</div><div class='del'>-</div><div class='del'>-While the driver will attempt to autoprobe the I/O port address, IRQ</div><div class='del'>-line, and DMA channel of the card, this does not always work.  For</div><div class='del'>-this reason, you should be prepared to supply these parameters</div><div class='del'>-yourself.  (see "Card Configuration" below for how to determine or</div><div class='del'>-change the settings on your card)</div><div class='del'>-</div><div class='del'>-When the driver is compiled into the kernel, you can add a line such</div><div class='del'>-as the following to your /etc/lilo.conf::</div><div class='del'>-</div><div class='del'>- append="ltpc=0x240,9,1"</div><div class='del'>-</div><div class='del'>-where the parameters (in order) are the port address, IRQ, and DMA</div><div class='del'>-channel.  The second and third values can be omitted, in which case</div><div class='del'>-the driver will try to determine them itself.</div><div class='del'>-</div><div class='del'>-If you load the driver as a module, you can pass the parameters "io=",</div><div class='del'>-"irq=", and "dma=" on the command line with insmod or modprobe, or add</div><div class='del'>-them as options in a configuration file in /etc/modprobe.d/ directory::</div><div class='del'>-</div><div class='del'>- alias lt0 ltpc # autoload the module when the interface is configured</div><div class='del'>- options ltpc io=0x240 irq=9 dma=1</div><div class='del'>-</div><div class='del'>-Before starting up the netatalk demons (perhaps in rc.local), you</div><div class='del'>-need to add a line such as::</div><div class='del'>-</div><div class='del'>- /sbin/ifconfig lt0 127.0.0.42</div><div class='del'>-</div><div class='del'>-The address is unimportant - however, the card needs to be configured</div><div class='del'>-with ifconfig so that Netatalk can find it.</div><div class='del'>-</div><div class='del'>-The appropriate netatalk configuration depends on whether you are</div><div class='del'>-attached to a network that includes AppleTalk routers or not.  If,</div><div class='del'>-like me, you are simply connecting to your home Macintoshes and</div><div class='del'>-printers, you need to set up netatalk to "seed".  The way I do this</div><div class='del'>-is to have the lines::</div><div class='del'>-</div><div class='del'>- dummy -seed -phase 2 -net 2000 -addr 2000.26 -zone "1033"</div><div class='del'>- lt0 -seed -phase 1 -net 1033 -addr 1033.27 -zone "1033"</div><div class='del'>-</div><div class='del'>-in my atalkd.conf.  What is going on here is that I need to fool</div><div class='del'>-netatalk into thinking that there are two AppleTalk interfaces</div><div class='del'>-present; otherwise, it refuses to seed.  This is a hack, and a more</div><div class='del'>-permanent solution would be to alter the netatalk code.  Also, make</div><div class='del'>-sure you have the correct name for the dummy interface - If it's</div><div class='del'>-compiled as a module, you will need to refer to it as "dummy0" or some</div><div class='del'>-such.</div><div class='del'>-</div><div class='del'>-If you are attached to an extended AppleTalk network, with routers on</div><div class='del'>-it, then you don't need to fool around with this -- the appropriate</div><div class='del'>-line in atalkd.conf is::</div><div class='del'>-</div><div class='del'>- lt0 -phase 1</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Card Configuration</div><div class='del'>-==================</div><div class='del'>-</div><div class='del'>-The interrupts and so forth are configured via the dipswitch on the</div><div class='del'>-board.  Set the switches so as not to conflict with other hardware.</div><div class='del'>-</div><div class='del'>-       Interrupts -- set at most one.  If none are set, the driver uses</div><div class='del'>-       polled mode.  Because the card was developed in the XT era, the</div><div class='del'>-       original documentation refers to IRQ2.  Since you'll be running</div><div class='del'>-       this on an AT (or later) class machine, that really means IRQ9.</div><div class='del'>-</div><div class='del'>-       ===     ===========================================================</div><div class='del'>-       SW1     IRQ 4</div><div class='del'>-       SW2     IRQ 3</div><div class='del'>-       SW3     IRQ 9 (2 in original card documentation only applies to XT)</div><div class='del'>-       ===     ===========================================================</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-       DMA -- choose DMA 1 or 3, and set both corresponding switches.</div><div class='del'>-</div><div class='del'>-       ===     =====</div><div class='del'>-       SW4     DMA 3</div><div class='del'>-       SW5     DMA 1</div><div class='del'>-       SW6     DMA 3</div><div class='del'>-       SW7     DMA 1</div><div class='del'>-       ===     =====</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-       I/O address -- choose one.</div><div class='del'>-</div><div class='del'>-       ===     =========</div><div class='del'>-       SW8     220 / 240</div><div class='del'>-       ===     =========</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-IP</div><div class='del'>-==</div><div class='del'>-</div><div class='del'>-Yes, it is possible to do IP over LocalTalk.  However, you can't just</div><div class='del'>-treat the LocalTalk device like an ordinary Ethernet device, even if</div><div class='del'>-that's what it looks like to Netatalk.</div><div class='del'>-</div><div class='del'>-Instead, you follow the same procedure as for doing IP in EtherTalk.</div><div class='del'>-See Documentation/networking/ipddp.rst for more information about the</div><div class='del'>-kernel driver and userspace tools needed.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Bugs</div><div class='del'>-====</div><div class='del'>-</div><div class='del'>-IRQ autoprobing often doesn't work on a cold boot.  To get around</div><div class='del'>-this, either compile the driver as a module, or pass the parameters</div><div class='del'>-for the card to the kernel as described above.</div><div class='del'>-</div><div class='del'>-Also, as usual, autoprobing is not recommended when you use the driver</div><div class='del'>-as a module. (though it usually works at boot time, at least)</div><div class='del'>-</div><div class='del'>-Polled mode is *really* slow sometimes, but this seems to depend on</div><div class='del'>-the configuration of the network.</div><div class='del'>-</div><div class='del'>-It may theoretically be possible to use two LTPC cards in the same</div><div class='del'>-machine, but this is unsupported, so if you really want to do this,</div><div class='del'>-you'll probably have to hack the initialization code a bit.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Thanks</div><div class='del'>-======</div><div class='del'>-</div><div class='del'>-Thanks to Alan Cox for helpful discussions early on in this</div><div class='del'>-work, and to Denis Hainsworth for doing the bleeding-edge testing.</div><div class='del'>-</div><div class='del'>-Bradford Johnson &lt;bradford@math.umn.edu&gt;</div><div class='del'>-</div><div class='del'>-Updated 11/09/1998 by David Huggins-Daines &lt;dhd@debian.org&gt;</div><div class='head'>diff --git a/Documentation/networking/device_drivers/atm/iphase.rst b/Documentation/networking/device_drivers/atm/iphase.rst<br/>index 92d9b757d75a..388c7101e2cb 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/atm/iphase.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/atm/iphase.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/atm/iphase.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/atm/iphase.rst</a></div><div class='hunk'>@@ -4,7 +4,7 @@</div><div class='ctx'> ATM (i)Chip IA Linux Driver Source</div><div class='ctx'> ==================================</div><div class='ctx'> </div><div class='del'>-			      READ ME FISRT</div><div class='add'>+			      READ ME FIRST</div><div class='ctx'> </div><div class='ctx'> --------------------------------------------------------------------------------</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/can/can327.rst b/Documentation/networking/device_drivers/can/can327.rst<br/>new file mode 100644<br/>index 000000000000..b87bfbe5d51c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/can/can327.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/can/can327.rst</a></div><div class='hunk'>@@ -0,0 +1,331 @@</div><div class='add'>+.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)</div><div class='add'>+</div><div class='add'>+can327: ELM327 driver for Linux SocketCAN</div><div class='add'>+==========================================</div><div class='add'>+</div><div class='add'>+Authors</div><div class='add'>+--------</div><div class='add'>+</div><div class='add'>+Max Staudt &lt;max@enpas.org&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Motivation</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+This driver aims to lower the initial cost for hackers interested in</div><div class='add'>+working with CAN buses.</div><div class='add'>+</div><div class='add'>+CAN adapters are expensive, few, and far between.</div><div class='add'>+ELM327 interfaces are cheap and plentiful.</div><div class='add'>+Let's use ELM327s as CAN adapters.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Introduction</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+This driver is an effort to turn abundant ELM327 based OBD interfaces</div><div class='add'>+into full fledged (as far as possible) CAN interfaces.</div><div class='add'>+</div><div class='add'>+Since the ELM327 was never meant to be a stand alone CAN controller,</div><div class='add'>+the driver has to switch between its modes as quickly as possible in</div><div class='add'>+order to fake full-duplex operation.</div><div class='add'>+</div><div class='add'>+As such, can327 is a best effort driver. However, this is more than</div><div class='add'>+enough to implement simple request-response protocols (such as OBD II),</div><div class='add'>+and to monitor broadcast messages on a bus (such as in a vehicle).</div><div class='add'>+</div><div class='add'>+Most ELM327s come as nondescript serial devices, attached via USB or</div><div class='add'>+Bluetooth. The driver cannot recognize them by itself, and as such it</div><div class='add'>+is up to the user to attach it in form of a TTY line discipline</div><div class='add'>+(similar to PPP, SLIP, slcan, ...).</div><div class='add'>+</div><div class='add'>+This driver is meant for ELM327 versions 1.4b and up, see below for</div><div class='add'>+known limitations in older controllers and clones.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Data sheet</div><div class='add'>+-----------</div><div class='add'>+</div><div class='add'>+The official data sheets can be found at ELM electronics' home page:</div><div class='add'>+</div><div class='add'>+  https://www.elmelectronics.com/</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+How to attach the line discipline</div><div class='add'>+----------------------------------</div><div class='add'>+</div><div class='add'>+Every ELM327 chip is factory programmed to operate at a serial setting</div><div class='add'>+of 38400 baud/s, 8 data bits, no parity, 1 stopbit.</div><div class='add'>+</div><div class='add'>+If you have kept this default configuration, the line discipline can</div><div class='add'>+be attached on a command prompt as follows::</div><div class='add'>+</div><div class='add'>+    sudo ldattach \</div><div class='add'>+           --debug \</div><div class='add'>+           --speed 38400 \</div><div class='add'>+           --eightbits \</div><div class='add'>+           --noparity \</div><div class='add'>+           --onestopbit \</div><div class='add'>+           --iflag -ICRNL,INLCR,-IXOFF \</div><div class='add'>+           30 \</div><div class='add'>+           /dev/ttyUSB0</div><div class='add'>+</div><div class='add'>+To change the ELM327's serial settings, please refer to its data</div><div class='add'>+sheet. This needs to be done before attaching the line discipline.</div><div class='add'>+</div><div class='add'>+Once the ldisc is attached, the CAN interface starts out unconfigured.</div><div class='add'>+Set the speed before starting it::</div><div class='add'>+</div><div class='add'>+    # The interface needs to be down to change parameters</div><div class='add'>+    sudo ip link set can0 down</div><div class='add'>+    sudo ip link set can0 type can bitrate 500000</div><div class='add'>+    sudo ip link set can0 up</div><div class='add'>+</div><div class='add'>+500000 bit/s is a common rate for OBD-II diagnostics.</div><div class='add'>+If you're connecting straight to a car's OBD port, this is the speed</div><div class='add'>+that most cars (but not all!) expect.</div><div class='add'>+</div><div class='add'>+After this, you can set out as usual with candump, cansniffer, etc.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+How to check the controller version</div><div class='add'>+------------------------------------</div><div class='add'>+</div><div class='add'>+Use a terminal program to attach to the controller.</div><div class='add'>+</div><div class='add'>+After issuing the "``AT WS``" command, the controller will respond with</div><div class='add'>+its version::</div><div class='add'>+</div><div class='add'>+    &gt;AT WS</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+    ELM327 v1.4b</div><div class='add'>+</div><div class='add'>+    &gt;</div><div class='add'>+</div><div class='add'>+Note that clones may claim to be any version they like.</div><div class='add'>+It is not indicative of their actual feature set.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Communication example</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+This is a short and incomplete introduction on how to talk to an ELM327.</div><div class='add'>+It is here to guide understanding of the controller's and the driver's</div><div class='add'>+limitation (listed below) as well as manual testing.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+The ELM327 has two modes:</div><div class='add'>+</div><div class='add'>+- Command mode</div><div class='add'>+- Reception mode</div><div class='add'>+</div><div class='add'>+In command mode, it expects one command per line, terminated by CR.</div><div class='add'>+By default, the prompt is a "``&gt;``", after which a command can be</div><div class='add'>+entered::</div><div class='add'>+</div><div class='add'>+    &gt;ATE1</div><div class='add'>+    OK</div><div class='add'>+    &gt;</div><div class='add'>+</div><div class='add'>+The init script in the driver switches off several configuration options</div><div class='add'>+that are only meaningful in the original OBD scenario the chip is meant</div><div class='add'>+for, and are actually a hindrance for can327.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+When a command is not recognized, such as by an older version of the</div><div class='add'>+ELM327, a question mark is printed as a response instead of OK::</div><div class='add'>+</div><div class='add'>+    &gt;ATUNKNOWN</div><div class='add'>+    ?</div><div class='add'>+    &gt;</div><div class='add'>+</div><div class='add'>+At present, can327 does not evaluate this response. See the section</div><div class='add'>+below on known limitations for details.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+When a CAN frame is to be sent, the target address is configured, after</div><div class='add'>+which the frame is sent as a command that consists of the data's hex</div><div class='add'>+dump::</div><div class='add'>+</div><div class='add'>+    &gt;ATSH123</div><div class='add'>+    OK</div><div class='add'>+    &gt;DEADBEEF12345678</div><div class='add'>+    OK</div><div class='add'>+    &gt;</div><div class='add'>+</div><div class='add'>+The above interaction sends the SFF frame "``DE AD BE EF 12 34 56 78``"</div><div class='add'>+with (11 bit) CAN ID ``0x123``.</div><div class='add'>+For this to function, the controller must be configured for SFF sending</div><div class='add'>+mode (using "``AT PB``", see code or datasheet).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Once a frame has been sent and wait-for-reply mode is on (``ATR1``,</div><div class='add'>+configured on ``listen-only=off``), or when the reply timeout expires</div><div class='add'>+and the driver sets the controller into monitoring mode (``ATMA``),</div><div class='add'>+the ELM327 will send one line for each received CAN frame, consisting</div><div class='add'>+of CAN ID, DLC, and data::</div><div class='add'>+</div><div class='add'>+    123 8 DEADBEEF12345678</div><div class='add'>+</div><div class='add'>+For EFF (29 bit) CAN frames, the address format is slightly different,</div><div class='add'>+which can327 uses to tell the two apart::</div><div class='add'>+</div><div class='add'>+    12 34 56 78 8 DEADBEEF12345678</div><div class='add'>+</div><div class='add'>+The ELM327 will receive both SFF and EFF frames - the current CAN</div><div class='add'>+config (``ATPB``) does not matter.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+If the ELM327's internal UART sending buffer runs full, it will abort</div><div class='add'>+the monitoring mode, print "BUFFER FULL" and drop back into command</div><div class='add'>+mode. Note that in this case, unlike with other error messages, the</div><div class='add'>+error message may appear on the same line as the last (usually</div><div class='add'>+incomplete) data frame::</div><div class='add'>+</div><div class='add'>+    12 34 56 78 8 DEADBEEF123 BUFFER FULL</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Known limitations of the controller</div><div class='add'>+------------------------------------</div><div class='add'>+</div><div class='add'>+- Clone devices ("v1.5" and others)</div><div class='add'>+</div><div class='add'>+  Sending RTR frames is not supported and will be dropped silently.</div><div class='add'>+</div><div class='add'>+  Receiving RTR with DLC 8 will appear to be a regular frame with</div><div class='add'>+  the last received frame's DLC and payload.</div><div class='add'>+</div><div class='add'>+  "``AT CSM``" (CAN Silent Monitoring, i.e. don't send CAN ACKs) is</div><div class='add'>+  not supported, and is hard coded to ON. Thus, frames are not ACKed</div><div class='add'>+  while listening: "``AT MA``" (Monitor All) will always be "silent".</div><div class='add'>+  However, immediately after sending a frame, the ELM327 will be in</div><div class='add'>+  "receive reply" mode, in which it *does* ACK any received frames.</div><div class='add'>+  Once the bus goes silent, or an error occurs (such as BUFFER FULL),</div><div class='add'>+  or the receive reply timeout runs out, the ELM327 will end reply</div><div class='add'>+  reception mode on its own and can327 will fall back to "``AT MA``"</div><div class='add'>+  in order to keep monitoring the bus.</div><div class='add'>+</div><div class='add'>+  Other limitations may apply, depending on the clone and the quality</div><div class='add'>+  of its firmware.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+- All versions</div><div class='add'>+</div><div class='add'>+  No full duplex operation is supported. The driver will switch</div><div class='add'>+  between input/output mode as quickly as possible.</div><div class='add'>+</div><div class='add'>+  The length of outgoing RTR frames cannot be set. In fact, some</div><div class='add'>+  clones (tested with one identifying as "``v1.5``") are unable to</div><div class='add'>+  send RTR frames at all.</div><div class='add'>+</div><div class='add'>+  We don't have a way to get real-time notifications on CAN errors.</div><div class='add'>+  While there is a command (``AT CS``) to retrieve some basic stats,</div><div class='add'>+  we don't poll it as it would force us to interrupt reception mode.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+- Versions prior to 1.4b</div><div class='add'>+</div><div class='add'>+  These versions do not send CAN ACKs when in monitoring mode (AT MA).</div><div class='add'>+  However, they do send ACKs while waiting for a reply immediately</div><div class='add'>+  after sending a frame. The driver maximizes this time to make the</div><div class='add'>+  controller as useful as possible.</div><div class='add'>+</div><div class='add'>+  Starting with version 1.4b, the ELM327 supports the "``AT CSM``"</div><div class='add'>+  command, and the "listen-only" CAN option will take effect.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+- Versions prior to 1.4</div><div class='add'>+</div><div class='add'>+  These chips do not support the "``AT PB``" command, and thus cannot</div><div class='add'>+  change bitrate or SFF/EFF mode on-the-fly. This will have to be</div><div class='add'>+  programmed by the user before attaching the line discipline. See the</div><div class='add'>+  data sheet for details.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+- Versions prior to 1.3</div><div class='add'>+</div><div class='add'>+  These chips cannot be used at all with can327. They do not support</div><div class='add'>+  the "``AT D1``" command, which is necessary to avoid parsing conflicts</div><div class='add'>+  on incoming data, as well as distinction of RTR frame lengths.</div><div class='add'>+</div><div class='add'>+  Specifically, this allows for easy distinction of SFF and EFF</div><div class='add'>+  frames, and to check whether frames are complete. While it is possible</div><div class='add'>+  to deduce the type and length from the length of the line the ELM327</div><div class='add'>+  sends us, this method fails when the ELM327's UART output buffer</div><div class='add'>+  overruns. It may abort sending in the middle of the line, which will</div><div class='add'>+  then be mistaken for something else.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Known limitations of the driver</div><div class='add'>+--------------------------------</div><div class='add'>+</div><div class='add'>+- No 8/7 timing.</div><div class='add'>+</div><div class='add'>+  ELM327 can only set CAN bitrates that are of the form 500000/n, where</div><div class='add'>+  n is an integer divisor.</div><div class='add'>+  However there is an exception: With a separate flag, it may set the</div><div class='add'>+  speed to be 8/7 of the speed indicated by the divisor.</div><div class='add'>+  This mode is not currently implemented.</div><div class='add'>+</div><div class='add'>+- No evaluation of command responses.</div><div class='add'>+</div><div class='add'>+  The ELM327 will reply with OK when a command is understood, and with ?</div><div class='add'>+  when it is not. The driver does not currently check this, and simply</div><div class='add'>+  assumes that the chip understands every command.</div><div class='add'>+  The driver is built such that functionality degrades gracefully</div><div class='add'>+  nevertheless. See the section on known limitations of the controller.</div><div class='add'>+</div><div class='add'>+- No use of hardware CAN ID filtering</div><div class='add'>+</div><div class='add'>+  An ELM327's UART sending buffer will easily overflow on heavy CAN bus</div><div class='add'>+  load, resulting in the "``BUFFER FULL``" message. Using the hardware</div><div class='add'>+  filters available through "``AT CF xxx``" and "``AT CM xxx``" would be</div><div class='add'>+  helpful here, however SocketCAN does not currently provide a facility</div><div class='add'>+  to make use of such hardware features.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Rationale behind the chosen configuration</div><div class='add'>+------------------------------------------</div><div class='add'>+</div><div class='add'>+``AT E1``</div><div class='add'>+  Echo on</div><div class='add'>+</div><div class='add'>+  We need this to be able to get a prompt reliably.</div><div class='add'>+</div><div class='add'>+``AT S1``</div><div class='add'>+  Spaces on</div><div class='add'>+</div><div class='add'>+  We need this to distinguish 11/29 bit CAN addresses received.</div><div class='add'>+</div><div class='add'>+  Note:</div><div class='add'>+  We can usually do this using the line length (odd/even),</div><div class='add'>+  but this fails if the line is not transmitted fully to</div><div class='add'>+  the host (BUFFER FULL).</div><div class='add'>+</div><div class='add'>+``AT D1``</div><div class='add'>+  DLC on</div><div class='add'>+</div><div class='add'>+  We need this to tell the "length" of RTR frames.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+A note on CAN bus termination</div><div class='add'>+------------------------------</div><div class='add'>+</div><div class='add'>+Your adapter may have resistors soldered in which are meant to terminate</div><div class='add'>+the bus. This is correct when it is plugged into a OBD-II socket, but</div><div class='add'>+not helpful when trying to tap into the middle of an existing CAN bus.</div><div class='add'>+</div><div class='add'>+If communications don't work with the adapter connected, check for the</div><div class='add'>+termination resistors on its PCB and try removing them.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/can/ctu/ctucanfd-driver.rst b/Documentation/networking/device_drivers/can/ctu/ctucanfd-driver.rst<br/>new file mode 100644<br/>index 000000000000..1661d13174d5<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/can/ctu/ctucanfd-driver.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/can/ctu/ctucanfd-driver.rst</a></div><div class='hunk'>@@ -0,0 +1,638 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-or-later</div><div class='add'>+</div><div class='add'>+CTU CAN FD Driver</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Author: Martin Jerabek &lt;martin.jerabek01@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+About CTU CAN FD IP Core</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+`CTU CAN FD &lt;https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core&gt;`_</div><div class='add'>+is an open source soft core written in VHDL.</div><div class='add'>+It originated in 2015 as Ondrej Ille's project</div><div class='add'>+at the `Department of Measurement &lt;https://meas.fel.cvut.cz/&gt;`_</div><div class='add'>+of `FEE &lt;http://www.fel.cvut.cz/en/&gt;`_ at `CTU &lt;https://www.cvut.cz/en&gt;`_.</div><div class='add'>+</div><div class='add'>+The SocketCAN driver for Xilinx Zynq SoC based MicroZed board</div><div class='add'>+`Vivado integration &lt;https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top&gt;`_</div><div class='add'>+and Intel Cyclone V 5CSEMA4U23C6 based DE0-Nano-SoC Terasic board</div><div class='add'>+`QSys integration &lt;https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd&gt;`_</div><div class='add'>+has been developed as well as support for</div><div class='add'>+`PCIe integration &lt;https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd&gt;`_ of the core.</div><div class='add'>+</div><div class='add'>+In the case of Zynq, the core is connected via the APB system bus, which does</div><div class='add'>+not have enumeration support, and the device must be specified in Device Tree.</div><div class='add'>+This kind of devices is called platform device in the kernel and is</div><div class='add'>+handled by a platform device driver.</div><div class='add'>+</div><div class='add'>+The basic functional model of the CTU CAN FD peripheral has been</div><div class='add'>+accepted into QEMU mainline. See QEMU `CAN emulation support &lt;https://www.qemu.org/docs/master/system/devices/can.html&gt;`_</div><div class='add'>+for CAN FD buses, host connection and CTU CAN FD core emulation. The development</div><div class='add'>+version of emulation support can be cloned from ctu-canfd branch of QEMU local</div><div class='add'>+development `repository &lt;https://gitlab.fel.cvut.cz/canbus/qemu-canbus&gt;`_.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+About SocketCAN</div><div class='add'>+---------------</div><div class='add'>+</div><div class='add'>+SocketCAN is a standard common interface for CAN devices in the Linux</div><div class='add'>+kernel. As the name suggests, the bus is accessed via sockets, similarly</div><div class='add'>+to common network devices. The reasoning behind this is in depth</div><div class='add'>+described in `Linux SocketCAN &lt;https://www.kernel.org/doc/html/latest/networking/can.html&gt;`_.</div><div class='add'>+In short, it offers a</div><div class='add'>+natural way to implement and work with higher layer protocols over CAN,</div><div class='add'>+in the same way as, e.g., UDP/IP over Ethernet.</div><div class='add'>+</div><div class='add'>+Device probe</div><div class='add'>+~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Before going into detail about the structure of a CAN bus device driver,</div><div class='add'>+let's reiterate how the kernel gets to know about the device at all.</div><div class='add'>+Some buses, like PCI or PCIe, support device enumeration. That is, when</div><div class='add'>+the system boots, it discovers all the devices on the bus and reads</div><div class='add'>+their configuration. The kernel identifies the device via its vendor ID</div><div class='add'>+and device ID, and if there is a driver registered for this identifier</div><div class='add'>+combination, its probe method is invoked to populate the driver's</div><div class='add'>+instance for the given hardware. A similar situation goes with USB, only</div><div class='add'>+it allows for device hot-plug.</div><div class='add'>+</div><div class='add'>+The situation is different for peripherals which are directly embedded</div><div class='add'>+in the SoC and connected to an internal system bus (AXI, APB, Avalon,</div><div class='add'>+and others). These buses do not support enumeration, and thus the kernel</div><div class='add'>+has to learn about the devices from elsewhere. This is exactly what the</div><div class='add'>+Device Tree was made for.</div><div class='add'>+</div><div class='add'>+Device tree</div><div class='add'>+~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+An entry in device tree states that a device exists in the system, how</div><div class='add'>+it is reachable (on which bus it resides) and its configuration –</div><div class='add'>+registers address, interrupts and so on. An example of such a device</div><div class='add'>+tree is given in .</div><div class='add'>+</div><div class='add'>+::</div><div class='add'>+</div><div class='add'>+           / {</div><div class='add'>+               /* ... */</div><div class='add'>+               amba: amba {</div><div class='add'>+                   #address-cells = &lt;1&gt;;</div><div class='add'>+                   #size-cells = &lt;1&gt;;</div><div class='add'>+                   compatible = "simple-bus";</div><div class='add'>+</div><div class='add'>+                   CTU_CAN_FD_0: CTU_CAN_FD@43c30000 {</div><div class='add'>+                       compatible = "ctu,ctucanfd";</div><div class='add'>+                       interrupt-parent = &lt;&amp;intc&gt;;</div><div class='add'>+                       interrupts = &lt;0 30 4&gt;;</div><div class='add'>+                       clocks = &lt;&amp;clkc 15&gt;;</div><div class='add'>+                       reg = &lt;0x43c30000 0x10000&gt;;</div><div class='add'>+                   };</div><div class='add'>+               };</div><div class='add'>+           };</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. _sec:socketcan:drv:</div><div class='add'>+</div><div class='add'>+Driver structure</div><div class='add'>+~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The driver can be divided into two parts – platform-dependent device</div><div class='add'>+discovery and set up, and platform-independent CAN network device</div><div class='add'>+implementation.</div><div class='add'>+</div><div class='add'>+.. _sec:socketcan:platdev:</div><div class='add'>+</div><div class='add'>+Platform device driver</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+In the case of Zynq, the core is connected via the AXI system bus, which</div><div class='add'>+does not have enumeration support, and the device must be specified in</div><div class='add'>+Device Tree. This kind of devices is called *platform device* in the</div><div class='add'>+kernel and is handled by a *platform device driver*\  [1]_.</div><div class='add'>+</div><div class='add'>+A platform device driver provides the following things:</div><div class='add'>+</div><div class='add'>+-  A *probe* function</div><div class='add'>+</div><div class='add'>+-  A *remove* function</div><div class='add'>+</div><div class='add'>+-  A table of *compatible* devices that the driver can handle</div><div class='add'>+</div><div class='add'>+The *probe* function is called exactly once when the device appears (or</div><div class='add'>+the driver is loaded, whichever happens later). If there are more</div><div class='add'>+devices handled by the same driver, the *probe* function is called for</div><div class='add'>+each one of them. Its role is to allocate and initialize resources</div><div class='add'>+required for handling the device, as well as set up low-level functions</div><div class='add'>+for the platform-independent layer, e.g., *read_reg* and *write_reg*.</div><div class='add'>+After that, the driver registers the device to a higher layer, in our</div><div class='add'>+case as a *network device*.</div><div class='add'>+</div><div class='add'>+The *remove* function is called when the device disappears, or the</div><div class='add'>+driver is about to be unloaded. It serves to free the resources</div><div class='add'>+allocated in *probe* and to unregister the device from higher layers.</div><div class='add'>+</div><div class='add'>+Finally, the table of *compatible* devices states which devices the</div><div class='add'>+driver can handle. The Device Tree entry ``compatible`` is matched</div><div class='add'>+against the tables of all *platform drivers*.</div><div class='add'>+</div><div class='add'>+.. code:: c</div><div class='add'>+</div><div class='add'>+           /* Match table for OF platform binding */</div><div class='add'>+           static const struct of_device_id ctucan_of_match[] = {</div><div class='add'>+               { .compatible = "ctu,canfd-2", },</div><div class='add'>+               { .compatible = "ctu,ctucanfd", },</div><div class='add'>+               { /* end of list */ },</div><div class='add'>+           };</div><div class='add'>+           MODULE_DEVICE_TABLE(of, ctucan_of_match);</div><div class='add'>+</div><div class='add'>+           static int ctucan_probe(struct platform_device *pdev);</div><div class='add'>+           static int ctucan_remove(struct platform_device *pdev);</div><div class='add'>+</div><div class='add'>+           static struct platform_driver ctucanfd_driver = {</div><div class='add'>+               .probe  = ctucan_probe,</div><div class='add'>+               .remove = ctucan_remove,</div><div class='add'>+               .driver = {</div><div class='add'>+                   .name = DRIVER_NAME,</div><div class='add'>+                   .of_match_table = ctucan_of_match,</div><div class='add'>+               },</div><div class='add'>+           };</div><div class='add'>+           module_platform_driver(ctucanfd_driver);</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. _sec:socketcan:netdev:</div><div class='add'>+</div><div class='add'>+Network device driver</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+Each network device must support at least these operations:</div><div class='add'>+</div><div class='add'>+-  Bring the device up: ``ndo_open``</div><div class='add'>+</div><div class='add'>+-  Bring the device down: ``ndo_close``</div><div class='add'>+</div><div class='add'>+-  Submit TX frames to the device: ``ndo_start_xmit``</div><div class='add'>+</div><div class='add'>+-  Signal TX completion and errors to the network subsystem: ISR</div><div class='add'>+</div><div class='add'>+-  Submit RX frames to the network subsystem: ISR and NAPI</div><div class='add'>+</div><div class='add'>+There are two possible event sources: the device and the network</div><div class='add'>+subsystem. Device events are usually signaled via an interrupt, handled</div><div class='add'>+in an Interrupt Service Routine (ISR). Handlers for the events</div><div class='add'>+originating in the network subsystem are then specified in</div><div class='add'>+``struct net_device_ops``.</div><div class='add'>+</div><div class='add'>+When the device is brought up, e.g., by calling ``ip link set can0 up``,</div><div class='add'>+the driver’s function ``ndo_open`` is called. It should validate the</div><div class='add'>+interface configuration and configure and enable the device. The</div><div class='add'>+analogous opposite is ``ndo_close``, called when the device is being</div><div class='add'>+brought down, be it explicitly or implicitly.</div><div class='add'>+</div><div class='add'>+When the system should transmit a frame, it does so by calling</div><div class='add'>+``ndo_start_xmit``, which enqueues the frame into the device. If the</div><div class='add'>+device HW queue (FIFO, mailboxes or whatever the implementation is)</div><div class='add'>+becomes full, the ``ndo_start_xmit`` implementation informs the network</div><div class='add'>+subsystem that it should stop the TX queue (via ``netif_stop_queue``).</div><div class='add'>+It is then re-enabled later in ISR when the device has some space</div><div class='add'>+available again and is able to enqueue another frame.</div><div class='add'>+</div><div class='add'>+All the device events are handled in ISR, namely:</div><div class='add'>+</div><div class='add'>+#. **TX completion**. When the device successfully finishes transmitting</div><div class='add'>+   a frame, the frame is echoed locally. On error, an informative error</div><div class='add'>+   frame [2]_ is sent to the network subsystem instead. In both cases,</div><div class='add'>+   the software TX queue is resumed so that more frames may be sent.</div><div class='add'>+</div><div class='add'>+#. **Error condition**. If something goes wrong (e.g., the device goes</div><div class='add'>+   bus-off or RX overrun happens), error counters are updated, and</div><div class='add'>+   informative error frames are enqueued to SW RX queue.</div><div class='add'>+</div><div class='add'>+#. **RX buffer not empty**. In this case, read the RX frames and enqueue</div><div class='add'>+   them to SW RX queue. Usually NAPI is used as a middle layer (see ).</div><div class='add'>+</div><div class='add'>+.. _sec:socketcan:napi:</div><div class='add'>+</div><div class='add'>+NAPI</div><div class='add'>+~~~~</div><div class='add'>+</div><div class='add'>+The frequency of incoming frames can be high and the overhead to invoke</div><div class='add'>+the interrupt service routine for each frame can cause significant</div><div class='add'>+system load. There are multiple mechanisms in the Linux kernel to deal</div><div class='add'>+with this situation. They evolved over the years of Linux kernel</div><div class='add'>+development and enhancements. For network devices, the current standard</div><div class='add'>+is NAPI – *the New API*. It is similar to classical top-half/bottom-half</div><div class='add'>+interrupt handling in that it only acknowledges the interrupt in the ISR</div><div class='add'>+and signals that the rest of the processing should be done in softirq</div><div class='add'>+context. On top of that, it offers the possibility to *poll* for new</div><div class='add'>+frames for a while. This has a potential to avoid the costly round of</div><div class='add'>+enabling interrupts, handling an incoming IRQ in ISR, re-enabling the</div><div class='add'>+softirq and switching context back to softirq.</div><div class='add'>+</div><div class='add'>+See :ref:`Documentation/networking/napi.rst &lt;napi&gt;` for more information.</div><div class='add'>+</div><div class='add'>+Integrating the core to Xilinx Zynq</div><div class='add'>+-----------------------------------</div><div class='add'>+</div><div class='add'>+The core interfaces a simple subset of the Avalon</div><div class='add'>+(search for Intel **Avalon Interface Specifications**)</div><div class='add'>+bus as it was originally used on</div><div class='add'>+Alterra FPGA chips, yet Xilinx natively interfaces with AXI</div><div class='add'>+(search for ARM **AMBA AXI and ACE Protocol Specification AXI3,</div><div class='add'>+AXI4, and AXI4-Lite, ACE and ACE-Lite**).</div><div class='add'>+The most obvious solution would be to use</div><div class='add'>+an Avalon/AXI bridge or implement some simple conversion entity.</div><div class='add'>+However, the core’s interface is half-duplex with no handshake</div><div class='add'>+signaling, whereas AXI is full duplex with two-way signaling. Moreover,</div><div class='add'>+even AXI-Lite slave interface is quite resource-intensive, and the</div><div class='add'>+flexibility and speed of AXI are not required for a CAN core.</div><div class='add'>+</div><div class='add'>+Thus a much simpler bus was chosen – APB (Advanced Peripheral Bus)</div><div class='add'>+(search for ARM **AMBA APB Protocol Specification**).</div><div class='add'>+APB-AXI bridge is directly available in</div><div class='add'>+Xilinx Vivado, and the interface adaptor entity is just a few simple</div><div class='add'>+combinatorial assignments.</div><div class='add'>+</div><div class='add'>+Finally, to be able to include the core in a block diagram as a custom</div><div class='add'>+IP, the core, together with the APB interface, has been packaged as a</div><div class='add'>+Vivado component.</div><div class='add'>+</div><div class='add'>+CTU CAN FD Driver design</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+The general structure of a CAN device driver has already been examined</div><div class='add'>+in . The next paragraphs provide a more detailed description of the CTU</div><div class='add'>+CAN FD core driver in particular.</div><div class='add'>+</div><div class='add'>+Low-level driver</div><div class='add'>+~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The core is not intended to be used solely with SocketCAN, and thus it</div><div class='add'>+is desirable to have an OS-independent low-level driver. This low-level</div><div class='add'>+driver can then be used in implementations of OS driver or directly</div><div class='add'>+either on bare metal or in a user-space application. Another advantage</div><div class='add'>+is that if the hardware slightly changes, only the low-level driver</div><div class='add'>+needs to be modified.</div><div class='add'>+</div><div class='add'>+The code [3]_ is in part automatically generated and in part written</div><div class='add'>+manually by the core author, with contributions of the thesis’ author.</div><div class='add'>+The low-level driver supports operations such as: set bit timing, set</div><div class='add'>+controller mode, enable/disable, read RX frame, write TX frame, and so</div><div class='add'>+on.</div><div class='add'>+</div><div class='add'>+Configuring bit timing</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+On CAN, each bit is divided into four segments: SYNC, PROP, PHASE1, and</div><div class='add'>+PHASE2. Their duration is expressed in multiples of a Time Quantum</div><div class='add'>+(details in `CAN Specification, Version 2.0 &lt;http://esd.cs.ucr.edu/webres/can20.pdf&gt;`_, chapter 8).</div><div class='add'>+When configuring</div><div class='add'>+bitrate, the durations of all the segments (and time quantum) must be</div><div class='add'>+computed from the bitrate and Sample Point. This is performed</div><div class='add'>+independently for both the Nominal bitrate and Data bitrate for CAN FD.</div><div class='add'>+</div><div class='add'>+SocketCAN is fairly flexible and offers either highly customized</div><div class='add'>+configuration by setting all the segment durations manually, or a</div><div class='add'>+convenient configuration by setting just the bitrate and sample point</div><div class='add'>+(and even that is chosen automatically per Bosch recommendation if not</div><div class='add'>+specified). However, each CAN controller may have different base clock</div><div class='add'>+frequency and different width of segment duration registers. The</div><div class='add'>+algorithm thus needs the minimum and maximum values for the durations</div><div class='add'>+(and clock prescaler) and tries to optimize the numbers to fit both the</div><div class='add'>+constraints and the requested parameters.</div><div class='add'>+</div><div class='add'>+.. code:: c</div><div class='add'>+</div><div class='add'>+           struct can_bittiming_const {</div><div class='add'>+               char name[16];      /* Name of the CAN controller hardware */</div><div class='add'>+               __u32 tseg1_min;    /* Time segment 1 = prop_seg + phase_seg1 */</div><div class='add'>+               __u32 tseg1_max;</div><div class='add'>+               __u32 tseg2_min;    /* Time segment 2 = phase_seg2 */</div><div class='add'>+               __u32 tseg2_max;</div><div class='add'>+               __u32 sjw_max;      /* Synchronisation jump width */</div><div class='add'>+               __u32 brp_min;      /* Bit-rate prescaler */</div><div class='add'>+               __u32 brp_max;</div><div class='add'>+               __u32 brp_inc;</div><div class='add'>+           };</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+[lst:can_bittiming_const]</div><div class='add'>+</div><div class='add'>+A curious reader will notice that the durations of the segments PROP_SEG</div><div class='add'>+and PHASE_SEG1 are not determined separately but rather combined and</div><div class='add'>+then, by default, the resulting TSEG1 is evenly divided between PROP_SEG</div><div class='add'>+and PHASE_SEG1. In practice, this has virtually no consequences as the</div><div class='add'>+sample point is between PHASE_SEG1 and PHASE_SEG2. In CTU CAN FD,</div><div class='add'>+however, the duration registers ``PROP`` and ``PH1`` have different</div><div class='add'>+widths (6 and 7 bits, respectively), so the auto-computed values might</div><div class='add'>+overflow the shorter register and must thus be redistributed among the</div><div class='add'>+two [4]_.</div><div class='add'>+</div><div class='add'>+Handling RX</div><div class='add'>+~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+Frame reception is handled in NAPI queue, which is enabled from ISR when</div><div class='add'>+the RXNE (RX FIFO Not Empty) bit is set. Frames are read one by one</div><div class='add'>+until either no frame is left in the RX FIFO or the maximum work quota</div><div class='add'>+has been reached for the NAPI poll run (see ). Each frame is then passed</div><div class='add'>+to the network interface RX queue.</div><div class='add'>+</div><div class='add'>+An incoming frame may be either a CAN 2.0 frame or a CAN FD frame. The</div><div class='add'>+way to distinguish between these two in the kernel is to allocate either</div><div class='add'>+``struct can_frame`` or ``struct canfd_frame``, the two having different</div><div class='add'>+sizes. In the controller, the information about the frame type is stored</div><div class='add'>+in the first word of RX FIFO.</div><div class='add'>+</div><div class='add'>+This brings us a chicken-egg problem: we want to allocate the ``skb``</div><div class='add'>+for the frame, and only if it succeeds, fetch the frame from FIFO;</div><div class='add'>+otherwise keep it there for later. But to be able to allocate the</div><div class='add'>+correct ``skb``, we have to fetch the first work of FIFO. There are</div><div class='add'>+several possible solutions:</div><div class='add'>+</div><div class='add'>+#. Read the word, then allocate. If it fails, discard the rest of the</div><div class='add'>+   frame. When the system is low on memory, the situation is bad anyway.</div><div class='add'>+</div><div class='add'>+#. Always allocate ``skb`` big enough for an FD frame beforehand. Then</div><div class='add'>+   tweak the ``skb`` internals to look like it has been allocated for</div><div class='add'>+   the smaller CAN 2.0 frame.</div><div class='add'>+</div><div class='add'>+#. Add option to peek into the FIFO instead of consuming the word.</div><div class='add'>+</div><div class='add'>+#. If the allocation fails, store the read word into driver’s data. On</div><div class='add'>+   the next try, use the stored word instead of reading it again.</div><div class='add'>+</div><div class='add'>+Option 1 is simple enough, but not very satisfying if we could do</div><div class='add'>+better. Option 2 is not acceptable, as it would require modifying the</div><div class='add'>+private state of an integral kernel structure. The slightly higher</div><div class='add'>+memory consumption is just a virtual cherry on top of the “cake”. Option</div><div class='add'>+3 requires non-trivial HW changes and is not ideal from the HW point of</div><div class='add'>+view.</div><div class='add'>+</div><div class='add'>+Option 4 seems like a good compromise, with its disadvantage being that</div><div class='add'>+a partial frame may stay in the FIFO for a prolonged time. Nonetheless,</div><div class='add'>+there may be just one owner of the RX FIFO, and thus no one else should</div><div class='add'>+see the partial frame (disregarding some exotic debugging scenarios).</div><div class='add'>+Basides, the driver resets the core on its initialization, so the</div><div class='add'>+partial frame cannot be “adopted” either. In the end, option 4 was</div><div class='add'>+selected [5]_.</div><div class='add'>+</div><div class='add'>+.. _subsec:ctucanfd:rxtimestamp:</div><div class='add'>+</div><div class='add'>+Timestamping RX frames</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+The CTU CAN FD core reports the exact timestamp when the frame has been</div><div class='add'>+received. The timestamp is by default captured at the sample point of</div><div class='add'>+the last bit of EOF but is configurable to be captured at the SOF bit.</div><div class='add'>+The timestamp source is external to the core and may be up to 64 bits</div><div class='add'>+wide. At the time of writing, passing the timestamp from kernel to</div><div class='add'>+userspace is not yet implemented, but is planned in the future.</div><div class='add'>+</div><div class='add'>+Handling TX</div><div class='add'>+~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+The CTU CAN FD core has 4 independent TX buffers, each with its own</div><div class='add'>+state and priority. When the core wants to transmit, a TX buffer in</div><div class='add'>+Ready state with the highest priority is selected.</div><div class='add'>+</div><div class='add'>+The priorities are 3bit numbers in register TX_PRIORITY</div><div class='add'>+(nibble-aligned). This should be flexible enough for most use cases.</div><div class='add'>+SocketCAN, however, supports only one FIFO queue for outgoing</div><div class='add'>+frames [6]_. The buffer priorities may be used to simulate the FIFO</div><div class='add'>+behavior by assigning each buffer a distinct priority and *rotating* the</div><div class='add'>+priorities after a frame transmission is completed.</div><div class='add'>+</div><div class='add'>+In addition to priority rotation, the SW must maintain head and tail</div><div class='add'>+pointers into the FIFO formed by the TX buffers to be able to determine</div><div class='add'>+which buffer should be used for next frame (``txb_head``) and which</div><div class='add'>+should be the first completed one (``txb_tail``). The actual buffer</div><div class='add'>+indices are (obviously) modulo 4 (number of TX buffers), but the</div><div class='add'>+pointers must be at least one bit wider to be able to distinguish</div><div class='add'>+between FIFO full and FIFO empty – in this situation,</div><div class='add'>+:math:`txb\_head \equiv txb\_tail\ (\textrm{mod}\ 4)`. An example of how</div><div class='add'>+the FIFO is maintained, together with priority rotation, is depicted in</div><div class='add'>+</div><div class='add'>+|</div><div class='add'>+</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+| TXB# | 0 | 1 | 2 | 3 |</div><div class='add'>++======+===+===+===+===+</div><div class='add'>+| Seq  | A | B | C |   |</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+| Prio | 7 | 6 | 5 | 4 |</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+|      |   | T |   | H |</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+</div><div class='add'>+|</div><div class='add'>+</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+| TXB# | 0 | 1 | 2 | 3 |</div><div class='add'>++======+===+===+===+===+</div><div class='add'>+| Seq  |   | B | C |   |</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+| Prio | 4 | 7 | 6 | 5 |</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+|      |   | T |   | H |</div><div class='add'>++------+---+---+---+---+</div><div class='add'>+</div><div class='add'>+|</div><div class='add'>+</div><div class='add'>++------+---+---+---+---+----+</div><div class='add'>+| TXB# | 0 | 1 | 2 | 3 | 0’ |</div><div class='add'>++======+===+===+===+===+====+</div><div class='add'>+| Seq  | E | B | C | D |    |</div><div class='add'>++------+---+---+---+---+----+</div><div class='add'>+| Prio | 4 | 7 | 6 | 5 |    |</div><div class='add'>++------+---+---+---+---+----+</div><div class='add'>+|      |   | T |   |   | H  |</div><div class='add'>++------+---+---+---+---+----+</div><div class='add'>+</div><div class='add'>+|</div><div class='add'>+</div><div class='add'>+.. kernel-figure:: fsm_txt_buffer_user.svg</div><div class='add'>+</div><div class='add'>+   TX Buffer states with possible transitions</div><div class='add'>+</div><div class='add'>+.. _subsec:ctucanfd:txtimestamp:</div><div class='add'>+</div><div class='add'>+Timestamping TX frames</div><div class='add'>+^^^^^^^^^^^^^^^^^^^^^^</div><div class='add'>+</div><div class='add'>+When submitting a frame to a TX buffer, one may specify the timestamp at</div><div class='add'>+which the frame should be transmitted. The frame transmission may start</div><div class='add'>+later, but not sooner. Note that the timestamp does not participate in</div><div class='add'>+buffer prioritization – that is decided solely by the mechanism</div><div class='add'>+described above.</div><div class='add'>+</div><div class='add'>+Support for time-based packet transmission was recently merged to Linux</div><div class='add'>+v4.19 `Time-based packet transmission &lt;https://lwn.net/Articles/748879/&gt;`_,</div><div class='add'>+but it remains yet to be researched</div><div class='add'>+whether this functionality will be practical for CAN.</div><div class='add'>+</div><div class='add'>+Also similarly to retrieving the timestamp of RX frames, the core</div><div class='add'>+supports retrieving the timestamp of TX frames – that is the time when</div><div class='add'>+the frame was successfully delivered. The particulars are very similar</div><div class='add'>+to timestamping RX frames and are described in .</div><div class='add'>+</div><div class='add'>+Handling RX buffer overrun</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+When a received frame does no more fit into the hardware RX FIFO in its</div><div class='add'>+entirety, RX FIFO overrun flag (STATUS[DOR]) is set and Data Overrun</div><div class='add'>+Interrupt (DOI) is triggered. When servicing the interrupt, care must be</div><div class='add'>+taken first to clear the DOR flag (via COMMAND[CDO]) and after that</div><div class='add'>+clear the DOI interrupt flag. Otherwise, the interrupt would be</div><div class='add'>+immediately [7]_ rearmed.</div><div class='add'>+</div><div class='add'>+**Note**: During development, it was discussed whether the internal HW</div><div class='add'>+pipelining cannot disrupt this clear sequence and whether an additional</div><div class='add'>+dummy cycle is necessary between clearing the flag and the interrupt. On</div><div class='add'>+the Avalon interface, it indeed proved to be the case, but APB being</div><div class='add'>+safe because it uses 2-cycle transactions. Essentially, the DOR flag</div><div class='add'>+would be cleared, but DOI register’s Preset input would still be high</div><div class='add'>+the cycle when the DOI clear request would also be applied (by setting</div><div class='add'>+the register’s Reset input high). As Set had higher priority than Reset,</div><div class='add'>+the DOI flag would not be reset. This has been already fixed by swapping</div><div class='add'>+the Set/Reset priority (see issue #187).</div><div class='add'>+</div><div class='add'>+Reporting Error Passive and Bus Off conditions</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+</div><div class='add'>+It may be desirable to report when the node reaches *Error Passive*,</div><div class='add'>+*Error Warning*, and *Bus Off* conditions. The driver is notified about</div><div class='add'>+error state change by an interrupt (EPI, EWLI), and then proceeds to</div><div class='add'>+determine the core’s error state by reading its error counters.</div><div class='add'>+</div><div class='add'>+There is, however, a slight race condition here – there is a delay</div><div class='add'>+between the time when the state transition occurs (and the interrupt is</div><div class='add'>+triggered) and when the error counters are read. When EPI is received,</div><div class='add'>+the node may be either *Error Passive* or *Bus Off*. If the node goes</div><div class='add'>+*Bus Off*, it obviously remains in the state until it is reset.</div><div class='add'>+Otherwise, the node is *or was* *Error Passive*. However, it may happen</div><div class='add'>+that the read state is *Error Warning* or even *Error Active*. It may be</div><div class='add'>+unclear whether and what exactly to report in that case, but I</div><div class='add'>+personally entertain the idea that the past error condition should still</div><div class='add'>+be reported. Similarly, when EWLI is received but the state is later</div><div class='add'>+detected to be *Error Passive*, *Error Passive* should be reported.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+CTU CAN FD Driver Sources Reference</div><div class='add'>+-----------------------------------</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/net/can/ctucanfd/ctucanfd.h</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/net/can/ctucanfd/ctucanfd_base.c</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/net/can/ctucanfd/ctucanfd_pci.c</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: drivers/net/can/ctucanfd/ctucanfd_platform.c</div><div class='add'>+   :internal:</div><div class='add'>+</div><div class='add'>+CTU CAN FD IP Core and Driver Development Acknowledgment</div><div class='add'>+---------------------------------------------------------</div><div class='add'>+</div><div class='add'>+* Odrej Ille &lt;ondrej.ille@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+  * started the project as student at Department of Measurement, FEE, CTU</div><div class='add'>+  * invested great amount of personal time and enthusiasm to the project over years</div><div class='add'>+  * worked on more funded tasks</div><div class='add'>+</div><div class='add'>+* `Department of Measurement &lt;https://meas.fel.cvut.cz/&gt;`_,</div><div class='add'>+  `Faculty of Electrical Engineering &lt;http://www.fel.cvut.cz/en/&gt;`_,</div><div class='add'>+  `Czech Technical University &lt;https://www.cvut.cz/en&gt;`_</div><div class='add'>+</div><div class='add'>+  * is the main investor into the project over many years</div><div class='add'>+  * uses project in their CAN/CAN FD diagnostics framework for `Skoda Auto &lt;https://www.skoda-auto.cz/&gt;`_</div><div class='add'>+</div><div class='add'>+* `Digiteq Automotive &lt;https://www.digiteqautomotive.com/en&gt;`_</div><div class='add'>+</div><div class='add'>+  * funding of the project CAN FD Open Cores Support Linux Kernel Based Systems</div><div class='add'>+  * negotiated and paid CTU to allow public access to the project</div><div class='add'>+  * provided additional funding of the work</div><div class='add'>+</div><div class='add'>+* `Department of Control Engineering &lt;https://control.fel.cvut.cz/en&gt;`_,</div><div class='add'>+  `Faculty of Electrical Engineering &lt;http://www.fel.cvut.cz/en/&gt;`_,</div><div class='add'>+  `Czech Technical University &lt;https://www.cvut.cz/en&gt;`_</div><div class='add'>+</div><div class='add'>+  * solving the project CAN FD Open Cores Support Linux Kernel Based Systems</div><div class='add'>+  * providing GitLab management</div><div class='add'>+  * virtual servers and computational power for continuous integration</div><div class='add'>+  * providing hardware for HIL continuous integration tests</div><div class='add'>+</div><div class='add'>+* `PiKRON Ltd. &lt;http://pikron.com/&gt;`_</div><div class='add'>+</div><div class='add'>+  * minor funding to initiate preparation of the project open-sourcing</div><div class='add'>+</div><div class='add'>+* Petr Porazil &lt;porazil@pikron.com&gt;</div><div class='add'>+</div><div class='add'>+  * design of PCIe transceiver addon board and assembly of boards</div><div class='add'>+  * design and assembly of MZ_APO baseboard for MicroZed/Zynq based system</div><div class='add'>+</div><div class='add'>+* Martin Jerabek &lt;martin.jerabek01@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+  * Linux driver development</div><div class='add'>+  * continuous integration platform architect and GHDL updates</div><div class='add'>+  * thesis `Open-source and Open-hardware CAN FD Protocol Support &lt;https://dspace.cvut.cz/bitstream/handle/10467/80366/F3-DP-2019-Jerabek-Martin-Jerabek-thesis-2019-canfd.pdf&gt;`_</div><div class='add'>+</div><div class='add'>+* Jiri Novak &lt;jnovak@fel.cvut.cz&gt;</div><div class='add'>+</div><div class='add'>+  * project initiation, management and use at Department of Measurement, FEE, CTU</div><div class='add'>+</div><div class='add'>+* Pavel Pisa &lt;pisa@cmp.felk.cvut.cz&gt;</div><div class='add'>+</div><div class='add'>+  * initiate open-sourcing, project coordination, management at Department of Control Engineering, FEE, CTU</div><div class='add'>+</div><div class='add'>+* Jaroslav Beran&lt;jara.beran@gmail.com&gt;</div><div class='add'>+</div><div class='add'>+ * system integration for Intel SoC, core and driver testing and updates</div><div class='add'>+</div><div class='add'>+* Carsten Emde (`OSADL &lt;https://www.osadl.org/&gt;`_)</div><div class='add'>+</div><div class='add'>+ * provided OSADL expertise to discuss IP core licensing</div><div class='add'>+ * pointed to possible deadlock for LGPL and CAN bus possible patent case which lead to relicense IP core design to BSD like license</div><div class='add'>+</div><div class='add'>+* Reiner Zitzmann and Holger Zeltwanger (`CAN in Automation &lt;https://www.can-cia.org/&gt;`_)</div><div class='add'>+</div><div class='add'>+ * provided suggestions and help to inform community about the project and invited us to events focused on CAN bus future development directions</div><div class='add'>+</div><div class='add'>+* Jan Charvat</div><div class='add'>+</div><div class='add'>+ * implemented CTU CAN FD functional model for QEMU which has been integrated into QEMU mainline (`docs/system/devices/can.rst &lt;https://www.qemu.org/docs/master/system/devices/can.html&gt;`_)</div><div class='add'>+ * Bachelor thesis Model of CAN FD Communication Controller for QEMU Emulator</div><div class='add'>+</div><div class='add'>+Notes</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+.. [1]</div><div class='add'>+   Other buses have their own specific driver interface to set up the</div><div class='add'>+   device.</div><div class='add'>+</div><div class='add'>+.. [2]</div><div class='add'>+   Not to be mistaken with CAN Error Frame. This is a ``can_frame`` with</div><div class='add'>+   ``CAN_ERR_FLAG`` set and some error info in its ``data`` field.</div><div class='add'>+</div><div class='add'>+.. [3]</div><div class='add'>+   Available in CTU CAN FD repository</div><div class='add'>+   `&lt;https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core&gt;`_</div><div class='add'>+</div><div class='add'>+.. [4]</div><div class='add'>+   As is done in the low-level driver functions</div><div class='add'>+   ``ctucan_hw_set_nom_bittiming`` and</div><div class='add'>+   ``ctucan_hw_set_data_bittiming``.</div><div class='add'>+</div><div class='add'>+.. [5]</div><div class='add'>+   At the time of writing this thesis, option 1 is still being used and</div><div class='add'>+   the modification is queued in gitlab issue #222</div><div class='add'>+</div><div class='add'>+.. [6]</div><div class='add'>+   Strictly speaking, multiple CAN TX queues are supported since v4.19</div><div class='add'>+   `can: enable multi-queue for SocketCAN devices &lt;https://lore.kernel.org/patchwork/patch/913526/&gt;`_ but no mainline driver is using</div><div class='add'>+   them yet.</div><div class='add'>+</div><div class='add'>+.. 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y="9.11724" font-size="12px" stroke-width="3.77953" text-align="center" text-anchor="middle"&gt;Legend:&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+  &lt;/g&gt;</div><div class='add'>+  &lt;g fill="#2aa1ff" font-size="12px" stroke-width="3.77953" text-anchor="middle"&gt;</div><div class='add'>+   &lt;text transform="matrix(.264583 0 0 .264583 57.0045 182.079)" x="57.727047" y="9.11724" filter="url(#filter1204-6-2)" text-align="center" style="line-height:1.1" xml:space="preserve"&gt;&lt;tspan x="57.727047" y="9.11724" fill="#2aa1ff" font-size="12px" stroke-width="3.77953" text-align="center" text-anchor="middle"&gt;SW command&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+   &lt;text transform="matrix(.264583 0 0 .264583 57.7865 110.104)" x="40.822609" y="9.11724" filter="url(#filter1204-6-2-9)" text-align="center" style="line-height:1.1" xml:space="preserve"&gt;&lt;tspan x="40.822609" y="9.11724" fill="#2aa1ff" font-size="12px" stroke-width="3.77953" text-align="center" text-anchor="middle"&gt;Set ready&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+   &lt;text transform="matrix(.264583 0 0 .264583 116.893 107.491)" x="28.049065" y="9.1172523" filter="url(#filter1204-6-2-9-4)" text-align="center" style="line-height:1.1" xml:space="preserve"&gt;&lt;tspan x="28.049065" y="9.1172523" fill="#2aa1ff" font-size="12px" stroke-width="3.77953" text-align="center" text-anchor="middle"&gt;Set ready&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+   &lt;text transform="matrix(.264583 0 0 .264583 87.5687 166.324)" x="28.049065" y="9.1172523" filter="url(#filter1204-6-2-9-1)" text-align="center" style="line-height:1.1" xml:space="preserve"&gt;&lt;tspan x="28.049065" y="9.1172523" fill="#2aa1ff" font-size="12px" stroke-width="3.77953" text-align="center" text-anchor="middle"&gt;Set empty&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+   &lt;text transform="matrix(.264583 0 0 .264583 106.53 113.074)" x="30.228771" y="8.9063139" filter="url(#filter1204-6-2-9-1-3)" text-align="center" style="line-height:1.1" xml:space="preserve"&gt;&lt;tspan x="30.228771" y="8.9063139" fill="#2aa1ff" font-size="12px" stroke-width="3.77953" text-align="center" text-anchor="middle"&gt;Set abort&lt;/tspan&gt;&lt;/text&gt;</div><div class='add'>+  &lt;/g&gt;</div><div class='add'>+ &lt;/g&gt;</div><div class='add'>+&lt;/svg&gt;</div><div class='head'>diff --git a/Documentation/networking/device_drivers/can/freescale/flexcan.rst b/Documentation/networking/device_drivers/can/freescale/flexcan.rst<br/>index 4e3eec6cecd2..106cd2890135 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/can/freescale/flexcan.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/can/freescale/flexcan.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/can/freescale/flexcan.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/can/freescale/flexcan.rst</a></div><div class='hunk'>@@ -5,7 +5,7 @@ Flexcan CAN Controller driver</div><div class='ctx'> =============================</div><div class='ctx'> </div><div class='ctx'> Authors: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;,</div><div class='del'>-Dario Binacchi &lt;dario.binacchi@amarula.solutions.com&gt;</div><div class='add'>+Dario Binacchi &lt;dario.binacchi@amarulasolutions.com&gt;</div><div class='ctx'> </div><div class='ctx'> On/off RTR frames reception</div><div class='ctx'> ===========================</div><div class='head'>diff --git a/Documentation/networking/device_drivers/can/index.rst b/Documentation/networking/device_drivers/can/index.rst<br/>index 58b6e0ad3030..6a8a4f74fa26 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/can/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/can/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/can/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/can/index.rst</a></div><div class='hunk'>@@ -10,6 +10,8 @@ Contents:</div><div class='ctx'> .. toctree::</div><div class='ctx'>    :maxdepth: 2</div><div class='ctx'> </div><div class='add'>+   can327</div><div class='add'>+   ctu/ctucanfd-driver</div><div class='ctx'>    freescale/flexcan</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/3com/vortex.rst b/Documentation/networking/device_drivers/ethernet/3com/vortex.rst<br/>index e89e4192af88..a060f84c4f96 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/3com/vortex.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/3com/vortex.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/3com/vortex.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/3com/vortex.rst</a></div><div class='hunk'>@@ -254,7 +254,7 @@ Media selection</div><div class='ctx'> A number of the older NICs such as the 3c590 and 3c900 series have</div><div class='ctx'> 10base2 and AUI interfaces.</div><div class='ctx'> </div><div class='del'>-Prior to January, 2001 this driver would autoeselect the 10base2 or AUI</div><div class='add'>+Prior to January, 2001 this driver would autoselect the 10base2 or AUI</div><div class='ctx'> port if it didn't detect activity on the 10baseT port.  It would then</div><div class='ctx'> get stuck on the 10base2 port and a driver reload was necessary to</div><div class='ctx'> switch back to 10baseT.  This behaviour could not be prevented with a</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/amd/pds_core.rst b/Documentation/networking/device_drivers/ethernet/amd/pds_core.rst<br/>new file mode 100644<br/>index 000000000000..9e8a16c44102<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/amd/pds_core.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/amd/pds_core.rst</a></div><div class='hunk'>@@ -0,0 +1,139 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+========================================================</div><div class='add'>+Linux Driver for the AMD/Pensando(R) DSC adapter family</div><div class='add'>+========================================================</div><div class='add'>+</div><div class='add'>+Copyright(c) 2023 Advanced Micro Devices, Inc</div><div class='add'>+</div><div class='add'>+Identifying the Adapter</div><div class='add'>+=======================</div><div class='add'>+</div><div class='add'>+To find if one or more AMD/Pensando PCI Core devices are installed on the</div><div class='add'>+host, check for the PCI devices::</div><div class='add'>+</div><div class='add'>+  # lspci -d 1dd8:100c</div><div class='add'>+  b5:00.0 Processing accelerators: Pensando Systems Device 100c</div><div class='add'>+  b6:00.0 Processing accelerators: Pensando Systems Device 100c</div><div class='add'>+</div><div class='add'>+If such devices are listed as above, then the pds_core.ko driver should find</div><div class='add'>+and configure them for use.  There should be log entries in the kernel</div><div class='add'>+messages such as these::</div><div class='add'>+</div><div class='add'>+  $ dmesg | grep pds_core</div><div class='add'>+  pds_core 0000:b5:00.0: 252.048 Gb/s available PCIe bandwidth (16.0 GT/s PCIe x16 link)</div><div class='add'>+  pds_core 0000:b5:00.0: FW: 1.60.0-73</div><div class='add'>+  pds_core 0000:b6:00.0: 252.048 Gb/s available PCIe bandwidth (16.0 GT/s PCIe x16 link)</div><div class='add'>+  pds_core 0000:b6:00.0: FW: 1.60.0-73</div><div class='add'>+</div><div class='add'>+Driver and firmware version information can be gathered with devlink::</div><div class='add'>+</div><div class='add'>+  $ devlink dev info pci/0000:b5:00.0</div><div class='add'>+  pci/0000:b5:00.0:</div><div class='add'>+    driver pds_core</div><div class='add'>+    serial_number FLM18420073</div><div class='add'>+    versions:</div><div class='add'>+        fixed:</div><div class='add'>+          asic.id 0x0</div><div class='add'>+          asic.rev 0x0</div><div class='add'>+        running:</div><div class='add'>+          fw 1.51.0-73</div><div class='add'>+        stored:</div><div class='add'>+          fw.goldfw 1.15.9-C-22</div><div class='add'>+          fw.mainfwa 1.60.0-73</div><div class='add'>+          fw.mainfwb 1.60.0-57</div><div class='add'>+</div><div class='add'>+Info versions</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+The ``pds_core`` driver reports the following versions</div><div class='add'>+</div><div class='add'>+.. list-table:: devlink info versions implemented</div><div class='add'>+   :widths: 5 5 90</div><div class='add'>+</div><div class='add'>+   * - Name</div><div class='add'>+     - Type</div><div class='add'>+     - Description</div><div class='add'>+   * - ``fw``</div><div class='add'>+     - running</div><div class='add'>+     - Version of firmware running on the device</div><div class='add'>+   * - ``fw.goldfw``</div><div class='add'>+     - stored</div><div class='add'>+     - Version of firmware stored in the goldfw slot</div><div class='add'>+   * - ``fw.mainfwa``</div><div class='add'>+     - stored</div><div class='add'>+     - Version of firmware stored in the mainfwa slot</div><div class='add'>+   * - ``fw.mainfwb``</div><div class='add'>+     - stored</div><div class='add'>+     - Version of firmware stored in the mainfwb slot</div><div class='add'>+   * - ``asic.id``</div><div class='add'>+     - fixed</div><div class='add'>+     - The ASIC type for this device</div><div class='add'>+   * - ``asic.rev``</div><div class='add'>+     - fixed</div><div class='add'>+     - The revision of the ASIC for this device</div><div class='add'>+</div><div class='add'>+Parameters</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+The ``pds_core`` driver implements the following generic</div><div class='add'>+parameters for controlling the functionality to be made available</div><div class='add'>+as auxiliary_bus devices.</div><div class='add'>+</div><div class='add'>+.. list-table:: Generic parameters implemented</div><div class='add'>+   :widths: 5 5 8 82</div><div class='add'>+</div><div class='add'>+   * - Name</div><div class='add'>+     - Mode</div><div class='add'>+     - Type</div><div class='add'>+     - Description</div><div class='add'>+   * - ``enable_vnet``</div><div class='add'>+     - runtime</div><div class='add'>+     - Boolean</div><div class='add'>+     - Enables vDPA functionality through an auxiliary_bus device</div><div class='add'>+</div><div class='add'>+Firmware Management</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+The ``flash`` command can update a the DSC firmware.  The downloaded firmware</div><div class='add'>+will be saved into either of firmware bank 1 or bank 2, whichever is not</div><div class='add'>+currently in use, and that bank will used for the next boot::</div><div class='add'>+</div><div class='add'>+  # devlink dev flash pci/0000:b5:00.0 \</div><div class='add'>+            file pensando/dsc_fw_1.63.0-22.tar</div><div class='add'>+</div><div class='add'>+Health Reporters</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+The driver supports a devlink health reporter for FW status::</div><div class='add'>+</div><div class='add'>+  # devlink health show pci/0000:2b:00.0 reporter fw</div><div class='add'>+  pci/0000:2b:00.0:</div><div class='add'>+    reporter fw</div><div class='add'>+      state healthy error 0 recover 0</div><div class='add'>+  # devlink health diagnose pci/0000:2b:00.0 reporter fw</div><div class='add'>+   Status: healthy State: 1 Generation: 0 Recoveries: 0</div><div class='add'>+</div><div class='add'>+Enabling the driver</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+The driver is enabled via the standard kernel configuration system,</div><div class='add'>+using the make command::</div><div class='add'>+</div><div class='add'>+  make oldconfig/menuconfig/etc.</div><div class='add'>+</div><div class='add'>+The driver is located in the menu structure at:</div><div class='add'>+</div><div class='add'>+  -&gt; Device Drivers</div><div class='add'>+    -&gt; Network device support (NETDEVICES [=y])</div><div class='add'>+      -&gt; Ethernet driver support</div><div class='add'>+        -&gt; AMD devices</div><div class='add'>+          -&gt; AMD/Pensando Ethernet PDS_CORE Support</div><div class='add'>+</div><div class='add'>+Support</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+For general Linux networking support, please use the netdev mailing</div><div class='add'>+list, which is monitored by AMD/Pensando personnel::</div><div class='add'>+</div><div class='add'>+  netdev@vger.kernel.org</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst b/Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst<br/>index 595ddef1c8b3..099280a261be 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/aquantia/atlantic.rst</a></div><div class='hunk'>@@ -270,7 +270,7 @@ RX flow rules (ntuple filters)</div><div class='ctx'> </div><div class='ctx'>     ethtool -K ethX ntuple &lt;on|off&gt;</div><div class='ctx'> </div><div class='del'>- When disabling ntuple filters, all the user programed filters are</div><div class='add'>+ When disabling ntuple filters, all the user programmed filters are</div><div class='ctx'>  flushed from the driver cache and hardware. All needed filters must</div><div class='ctx'>  be re-added when ntuple is re-enabled.</div><div class='ctx'> </div><div class='hunk'>@@ -418,7 +418,7 @@ Default value: 0xFFFF</div><div class='ctx'> 0        Disable interrupt throttling.</div><div class='ctx'> 1        Enable interrupt throttling and use specified tx and rx rates.</div><div class='ctx'> 0xFFFF   Auto throttling mode. Driver will choose the best RX and TX</div><div class='del'>-	 interrupt throtting settings based on link speed.</div><div class='add'>+	 interrupt throttling settings based on link speed.</div><div class='ctx'> ======   ==============================================================</div><div class='ctx'> </div><div class='ctx'> aq_itr_tx - TX interrupt throttle rate</div><div class='hunk'>@@ -456,7 +456,7 @@ AQ_CFG_RX_PAGEORDER</div><div class='ctx'> </div><div class='ctx'> Default value: 0</div><div class='ctx'> </div><div class='del'>-RX page order override. Thats a power of 2 number of RX pages allocated for</div><div class='add'>+RX page order override. That's a power of 2 number of RX pages allocated for</div><div class='ctx'> each descriptor. Received descriptor size is still limited by</div><div class='ctx'> AQ_CFG_RX_FRAME_MAX.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/dec/de4x5.rst b/Documentation/networking/device_drivers/ethernet/dec/de4x5.rst<br/>deleted file mode 100644<br/>index e03e9c631879..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/dec/de4x5.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/dec/de4x5.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,189 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-===================================</div><div class='del'>-DEC EtherWORKS Ethernet De4x5 cards</div><div class='del'>-===================================</div><div class='del'>-</div><div class='del'>-    Originally,   this  driver  was    written  for the  Digital   Equipment</div><div class='del'>-    Corporation series of EtherWORKS Ethernet cards:</div><div class='del'>-</div><div class='del'>-	 - DE425 TP/COAX EISA</div><div class='del'>-	 - DE434 TP PCI</div><div class='del'>-	 - DE435 TP/COAX/AUI PCI</div><div class='del'>-	 - DE450 TP/COAX/AUI PCI</div><div class='del'>-	 - DE500 10/100 PCI Fasternet</div><div class='del'>-</div><div class='del'>-    but it  will  now attempt  to  support all  cards which   conform to the</div><div class='del'>-    Digital Semiconductor   SROM   Specification.    The  driver   currently</div><div class='del'>-    recognises the following chips:</div><div class='del'>-</div><div class='del'>-	 - DC21040  (no SROM)</div><div class='del'>-	 - DC21041[A]</div><div class='del'>-	 - DC21140[A]</div><div class='del'>-	 - DC21142</div><div class='del'>-	 - DC21143</div><div class='del'>-</div><div class='del'>-    So far the driver is known to work with the following cards:</div><div class='del'>-</div><div class='del'>-	 - KINGSTON</div><div class='del'>-	 - Linksys</div><div class='del'>-	 - ZNYX342</div><div class='del'>-	 - SMC8432</div><div class='del'>-	 - SMC9332 (w/new SROM)</div><div class='del'>-	 - ZNYX31[45]</div><div class='del'>-	 - ZNYX346 10/100 4 port (can act as a 10/100 bridge!)</div><div class='del'>-</div><div class='del'>-    The driver has been tested on a relatively busy network using the DE425,</div><div class='del'>-    DE434, DE435 and DE500 cards and benchmarked with 'ttcp': it transferred</div><div class='del'>-    16M of data to a DECstation 5000/200 as follows::</div><div class='del'>-</div><div class='del'>-		  TCP           UDP</div><div class='del'>-	       TX     RX     TX     RX</div><div class='del'>-      DE425   1030k  997k   1170k  1128k</div><div class='del'>-      DE434   1063k  995k   1170k  1125k</div><div class='del'>-      DE435   1063k  995k   1170k  1125k</div><div class='del'>-      DE500   1063k  998k   1170k  1125k  in 10Mb/s mode</div><div class='del'>-</div><div class='del'>-    All  values are typical (in   kBytes/sec) from a  sample  of 4 for  each</div><div class='del'>-    measurement. Their error is +/-20k on a quiet (private) network and also</div><div class='del'>-    depend on what load the CPU has.</div><div class='del'>-</div><div class='del'>-----------------------------------------------------------------------------</div><div class='del'>-</div><div class='del'>-    The ability to load this  driver as a loadable  module has been included</div><div class='del'>-    and used extensively  during the driver development  (to save those long</div><div class='del'>-    reboot sequences).  Loadable module support  under PCI and EISA has been</div><div class='del'>-    achieved by letting the driver autoprobe as if it were compiled into the</div><div class='del'>-    kernel. Do make sure  you're not sharing  interrupts with anything  that</div><div class='del'>-    cannot accommodate  interrupt  sharing!</div><div class='del'>-</div><div class='del'>-    To utilise this ability, you have to do 8 things:</div><div class='del'>-</div><div class='del'>-    0) have a copy of the loadable modules code installed on your system.</div><div class='del'>-    1) copy de4x5.c from the  /linux/drivers/net directory to your favourite</div><div class='del'>-       temporary directory.</div><div class='del'>-    2) for fixed  autoprobes (not  recommended),  edit the source code  near</div><div class='del'>-       line 5594 to reflect the I/O address  you're using, or assign these when</div><div class='del'>-       loading by::</div><div class='del'>-</div><div class='del'>-		   insmod de4x5 io=0xghh           where g = bus number</div><div class='del'>-							hh = device number</div><div class='del'>-</div><div class='del'>-       .. note::</div><div class='del'>-</div><div class='del'>-	   autoprobing for modules is now supported by default. You may just</div><div class='del'>-	   use::</div><div class='del'>-</div><div class='del'>-		   insmod de4x5</div><div class='del'>-</div><div class='del'>-	   to load all available boards. For a specific board, still use</div><div class='del'>-	   the 'io=?' above.</div><div class='del'>-    3) compile  de4x5.c, but include -DMODULE in  the command line to ensure</div><div class='del'>-       that the correct bits are compiled (see end of source code).</div><div class='del'>-    4) if you are wanting to add a new  card, goto 5. Otherwise, recompile a</div><div class='del'>-       kernel with the de4x5 configuration turned off and reboot.</div><div class='del'>-    5) insmod de4x5 [io=0xghh]</div><div class='del'>-    6) run the net startup bits for your new eth?? interface(s) manually</div><div class='del'>-       (usually /etc/rc.inet[12] at boot time).</div><div class='del'>-    7) enjoy!</div><div class='del'>-</div><div class='del'>-    To unload a module, turn off the associated interface(s)</div><div class='del'>-    'ifconfig eth?? down' then 'rmmod de4x5'.</div><div class='del'>-</div><div class='del'>-    Automedia detection is included so that in  principle you can disconnect</div><div class='del'>-    from, e.g.  TP, reconnect  to BNC  and  things will still work  (after a</div><div class='del'>-    pause while the   driver figures out   where its media went).  My tests</div><div class='del'>-    using ping showed that it appears to work....</div><div class='del'>-</div><div class='del'>-    By  default,  the driver will  now   autodetect any  DECchip based card.</div><div class='del'>-    Should you have a need to restrict the driver to DIGITAL only cards, you</div><div class='del'>-    can compile with a  DEC_ONLY define, or if  loading as a module, use the</div><div class='del'>-    'dec_only=1'  parameter.</div><div class='del'>-</div><div class='del'>-    I've changed the timing routines to  use the kernel timer and scheduling</div><div class='del'>-    functions  so that the  hangs  and other assorted problems that occurred</div><div class='del'>-    while autosensing the  media  should be gone.  A  bonus  for the DC21040</div><div class='del'>-    auto  media sense algorithm is  that it can now  use one that is more in</div><div class='del'>-    line with the  rest (the DC21040  chip doesn't  have a hardware  timer).</div><div class='del'>-    The downside is the 1 'jiffies' (10ms) resolution.</div><div class='del'>-</div><div class='del'>-    IEEE 802.3u MII interface code has  been added in anticipation that some</div><div class='del'>-    products may use it in the future.</div><div class='del'>-</div><div class='del'>-    The SMC9332 card  has a non-compliant SROM  which needs fixing -  I have</div><div class='del'>-    patched this  driver to detect it  because the SROM format used complies</div><div class='del'>-    to a previous DEC-STD format.</div><div class='del'>-</div><div class='del'>-    I have removed the buffer copies needed for receive on Intels.  I cannot</div><div class='del'>-    remove them for   Alphas since  the  Tulip hardware   only does longword</div><div class='del'>-    aligned  DMA transfers  and  the  Alphas get   alignment traps with  non</div><div class='del'>-    longword aligned data copies (which makes them really slow). No comment.</div><div class='del'>-</div><div class='del'>-    I  have added SROM decoding  routines to make this  driver work with any</div><div class='del'>-    card that  supports the Digital  Semiconductor SROM spec. This will help</div><div class='del'>-    all  cards running the dc2114x  series chips in particular.  Cards using</div><div class='del'>-    the dc2104x  chips should run correctly with  the basic  driver.  I'm in</div><div class='del'>-    debt to &lt;mjacob@feral.com&gt; for the  testing and feedback that helped get</div><div class='del'>-    this feature working.  So far we have  tested KINGSTON, SMC8432, SMC9332</div><div class='del'>-    (with the latest SROM complying  with the SROM spec  V3: their first was</div><div class='del'>-    broken), ZNYX342  and  LinkSys. ZNYX314 (dual  21041  MAC) and  ZNYX 315</div><div class='del'>-    (quad 21041 MAC)  cards also  appear  to work despite their  incorrectly</div><div class='del'>-    wired IRQs.</div><div class='del'>-</div><div class='del'>-    I have added a temporary fix for interrupt problems when some SCSI cards</div><div class='del'>-    share the same interrupt as the DECchip based  cards. The problem occurs</div><div class='del'>-    because  the SCSI card wants to  grab the interrupt  as a fast interrupt</div><div class='del'>-    (runs the   service routine with interrupts turned   off) vs.  this card</div><div class='del'>-    which really needs to run the service routine with interrupts turned on.</div><div class='del'>-    This driver will  now   add the interrupt service   routine  as  a  fast</div><div class='del'>-    interrupt if it   is bounced from the   slow interrupt.  THIS IS NOT   A</div><div class='del'>-    RECOMMENDED WAY TO RUN THE DRIVER  and has been done  for a limited time</div><div class='del'>-    until  people   sort  out their  compatibility    issues and the  kernel</div><div class='del'>-    interrupt  service code  is  fixed.   YOU  SHOULD SEPARATE OUT  THE FAST</div><div class='del'>-    INTERRUPT CARDS FROM THE SLOW INTERRUPT CARDS to ensure that they do not</div><div class='del'>-    run on the same interrupt. PCMCIA/CardBus is another can of worms...</div><div class='del'>-</div><div class='del'>-    Finally, I think  I have really  fixed  the module  loading problem with</div><div class='del'>-    more than one DECchip based  card.  As a  side effect, I don't mess with</div><div class='del'>-    the  device structure any  more which means that  if more than 1 card in</div><div class='del'>-    2.0.x is    installed (4  in   2.1.x),  the  user   will have   to  edit</div><div class='del'>-    linux/drivers/net/Space.c  to make room for  them. Hence, module loading</div><div class='del'>-    is  the preferred way to use   this driver, since  it  doesn't have this</div><div class='del'>-    limitation.</div><div class='del'>-</div><div class='del'>-    Where SROM media  detection is used and  full duplex is specified in the</div><div class='del'>-    SROM,  the feature is  ignored unless  lp-&gt;params.fdx  is set at compile</div><div class='del'>-    time  OR during  a   module load  (insmod  de4x5   args='eth??:fdx' [see</div><div class='del'>-    below]).  This is because there  is no way  to automatically detect full</div><div class='del'>-    duplex   links  except through   autonegotiation.    When I  include the</div><div class='del'>-    autonegotiation feature in  the SROM autoconf  code, this detection will</div><div class='del'>-    occur automatically for that case.</div><div class='del'>-</div><div class='del'>-    Command line  arguments are  now allowed, similar to  passing  arguments</div><div class='del'>-    through LILO. This will allow a per adapter board set  up of full duplex</div><div class='del'>-    and media. The only lexical constraints are:  the board name (dev-&gt;name)</div><div class='del'>-    appears in  the list before its parameters.  The list of parameters ends</div><div class='del'>-    either at the end of the parameter list or with another board name.  The</div><div class='del'>-    following parameters are allowed:</div><div class='del'>-</div><div class='del'>-	    =========  ===============================================</div><div class='del'>-	    fdx        for full duplex</div><div class='del'>-	    autosense  to set the media/speed; with the following</div><div class='del'>-		       sub-parameters:</div><div class='del'>-		       TP, TP_NW, BNC, AUI, BNC_AUI, 100Mb, 10Mb, AUTO</div><div class='del'>-	    =========  ===============================================</div><div class='del'>-</div><div class='del'>-    Case sensitivity is important  for  the sub-parameters. They *must*   be</div><div class='del'>-    upper case. Examples::</div><div class='del'>-</div><div class='del'>-	insmod de4x5 args='eth1:fdx autosense=BNC eth0:autosense=100Mb'.</div><div class='del'>-</div><div class='del'>-    For a compiled in driver, in linux/drivers/net/CONFIG, place e.g.::</div><div class='del'>-</div><div class='del'>-	DE4X5_OPTS = -DDE4X5_PARM='"eth0:fdx autosense=AUI eth2:autosense=TP"'</div><div class='del'>-</div><div class='del'>-    Yes,  I know full duplex  isn't permissible on BNC  or AUI; they're just</div><div class='del'>-    examples. By default, full duplex is turned  off and AUTO is the default</div><div class='del'>-    autosense setting. In  reality, I expect only the  full duplex option to</div><div class='del'>-    be used. Note the use of single quotes in the two examples above and the</div><div class='del'>-    lack of commas to separate items.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst b/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst<br/>index 51e6624fb774..e2a36d0d88ef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/freescale/dpaa2/mac-phy-support.rst</a></div><div class='hunk'>@@ -11,7 +11,7 @@ Overview</div><div class='ctx'> --------</div><div class='ctx'> </div><div class='ctx'> The DPAA2 MAC / PHY support consists of a set of APIs that help DPAA2 network</div><div class='del'>-drivers (dpaa2-eth, dpaa2-ethsw) interract with the PHY library.</div><div class='add'>+drivers (dpaa2-eth, dpaa2-ethsw) interact with the PHY library.</div><div class='ctx'> </div><div class='ctx'> DPAA2 Software Architecture</div><div class='ctx'> ---------------------------</div><div class='hunk'>@@ -181,10 +181,13 @@ when necessary using the below listed API::</div><div class='ctx'>  - int dpaa2_mac_connect(struct dpaa2_mac *mac);</div><div class='ctx'>  - void dpaa2_mac_disconnect(struct dpaa2_mac *mac);</div><div class='ctx'> </div><div class='del'>-A phylink integration is necessary only when the partner DPMAC is not of TYPE_FIXED.</div><div class='del'>-One can check for this condition using the below API::</div><div class='add'>+A phylink integration is necessary only when the partner DPMAC is not of</div><div class='add'>+``TYPE_FIXED``. This means it is either of ``TYPE_PHY``, or of</div><div class='add'>+``TYPE_BACKPLANE`` (the difference being the two that in the ``TYPE_BACKPLANE``</div><div class='add'>+mode, the MC firmware does not access the PCS registers). One can check for</div><div class='add'>+this condition using the following helper::</div><div class='ctx'> </div><div class='del'>- - bool dpaa2_mac_is_type_fixed(struct fsl_mc_device *dpmac_dev,struct fsl_mc_io *mc_io);</div><div class='add'>+ - static inline bool dpaa2_mac_is_type_phy(struct dpaa2_mac *mac);</div><div class='ctx'> </div><div class='ctx'> Before connection to a MAC, the caller must allocate and populate the</div><div class='ctx'> dpaa2_mac structure with the associated net_device, a pointer to the MC portal</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/index.rst b/Documentation/networking/device_drivers/ethernet/index.rst<br/>index 6b5dc203da2b..417ca514a4d0 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/index.rst</a></div><div class='hunk'>@@ -14,12 +14,12 @@ Contents:</div><div class='ctx'>    3com/vortex</div><div class='ctx'>    amazon/ena</div><div class='ctx'>    altera/altera_tse</div><div class='add'>+   amd/pds_core</div><div class='ctx'>    aquantia/atlantic</div><div class='ctx'>    chelsio/cxgb</div><div class='ctx'>    cirrus/cs89x0</div><div class='ctx'>    dlink/dl2k</div><div class='ctx'>    davicom/dm9000</div><div class='del'>-   dec/de4x5</div><div class='ctx'>    dec/dmfe</div><div class='ctx'>    freescale/dpaa</div><div class='ctx'>    freescale/dpaa2/index</div><div class='hunk'>@@ -32,17 +32,16 @@ Contents:</div><div class='ctx'>    intel/fm10k</div><div class='ctx'>    intel/igb</div><div class='ctx'>    intel/igbvf</div><div class='del'>-   intel/ixgb</div><div class='ctx'>    intel/ixgbe</div><div class='ctx'>    intel/ixgbevf</div><div class='ctx'>    intel/i40e</div><div class='ctx'>    intel/iavf</div><div class='ctx'>    intel/ice</div><div class='ctx'>    marvell/octeontx2</div><div class='del'>-   mellanox/mlx5</div><div class='add'>+   marvell/octeon_ep</div><div class='add'>+   mellanox/mlx5/index</div><div class='ctx'>    microsoft/netvsc</div><div class='ctx'>    neterion/s2io</div><div class='del'>-   neterion/vxge</div><div class='ctx'>    netronome/nfp</div><div class='ctx'>    pensando/ionic</div><div class='ctx'>    smsc/smc9</div><div class='hunk'>@@ -52,6 +51,8 @@ Contents:</div><div class='ctx'>    ti/am65_nuss_cpsw_switchdev</div><div class='ctx'>    ti/tlan</div><div class='ctx'>    toshiba/spider_net</div><div class='add'>+   wangxun/txgbe</div><div class='add'>+   wangxun/ngbe</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/e100.rst b/Documentation/networking/device_drivers/ethernet/intel/e100.rst<br/>index 3d4a9ba21946..5dee1b53e977 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/e100.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/e100.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/e100.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/e100.rst</a></div><div class='hunk'>@@ -151,8 +151,7 @@ NAPI</div><div class='ctx'> </div><div class='ctx'> NAPI (Rx polling mode) is supported in the e100 driver.</div><div class='ctx'> </div><div class='del'>-See https://wiki.linuxfoundation.org/networking/napi for more</div><div class='del'>-information on NAPI.</div><div class='add'>+See :ref:`Documentation/networking/napi.rst &lt;napi&gt;` for more information.</div><div class='ctx'> </div><div class='ctx'> Multiple Interfaces on Same Ethernet Broadcast Network</div><div class='ctx'> ------------------------------------------------------</div><div class='hunk'>@@ -181,8 +180,6 @@ Support</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-http://sourceforge.net/projects/e1000</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/e1000.rst b/Documentation/networking/device_drivers/ethernet/intel/e1000.rst<br/>index 4aaae0f7d6ba..52a7fb9ce8d9 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/e1000.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/e1000.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/e1000.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/e1000.rst</a></div><div class='hunk'>@@ -451,13 +451,8 @@ Support</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='del'>-    http://support.intel.com</div><div class='del'>-</div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-    http://sourceforge.net/projects/e1000</div><div class='add'>+http://support.intel.com</div><div class='ctx'> </div><div class='ctx'> If an issue is identified with the released source code on the supported</div><div class='ctx'> kernel with a supported adapter, email the specific information related</div><div class='del'>-to the issue to e1000-devel@lists.sf.net</div><div class='add'>+to the issue to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/e1000e.rst b/Documentation/networking/device_drivers/ethernet/intel/e1000e.rst<br/>index f49cd370e7bf..d8f810afdd49 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/e1000e.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/e1000e.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/e1000e.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/e1000e.rst</a></div><div class='hunk'>@@ -371,13 +371,8 @@ NOTE: Wake on LAN is only supported on port A for the following devices:</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/fm10k.rst b/Documentation/networking/device_drivers/ethernet/intel/fm10k.rst<br/>index 9258ef6f515c..396a2c8c3db1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/fm10k.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/fm10k.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/fm10k.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/fm10k.rst</a></div><div class='hunk'>@@ -130,13 +130,8 @@ the Intel Ethernet Controller XL710.</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/i40e.rst b/Documentation/networking/device_drivers/ethernet/intel/i40e.rst<br/>index ac35bd472bdc..4fbaa1a2d674 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/i40e.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/i40e.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/i40e.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/i40e.rst</a></div><div class='hunk'>@@ -399,8 +399,8 @@ operate only in full duplex and only at their native speed.</div><div class='ctx'> NAPI</div><div class='ctx'> ----</div><div class='ctx'> NAPI (Rx polling mode) is supported in the i40e driver.</div><div class='del'>-For more information on NAPI, see</div><div class='del'>-https://wiki.linuxfoundation.org/networking/napi</div><div class='add'>+</div><div class='add'>+See :ref:`Documentation/networking/napi.rst &lt;napi&gt;` for more information.</div><div class='ctx'> </div><div class='ctx'> Flow Control</div><div class='ctx'> ------------</div><div class='hunk'>@@ -759,13 +759,8 @@ enabled when setting up DCB on your switch.</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/iavf.rst b/Documentation/networking/device_drivers/ethernet/intel/iavf.rst<br/>index 151af0a8da9c..eb926c3bd4cd 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/iavf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/iavf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/iavf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/iavf.rst</a></div><div class='hunk'>@@ -319,13 +319,8 @@ This is caused by the way the Linux kernel reports this stressed condition.</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://support.intel.com</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on the supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/ice.rst b/Documentation/networking/device_drivers/ethernet/intel/ice.rst<br/>index 67b7a701ce9e..69695e5511f4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/ice.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/ice.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/ice.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/ice.rst</a></div><div class='hunk'>@@ -817,10 +817,10 @@ NOTE:</div><div class='ctx'> </div><div class='ctx'> NAPI</div><div class='ctx'> ----</div><div class='add'>+</div><div class='ctx'> This driver supports NAPI (Rx polling mode).</div><div class='del'>-For more information on NAPI, see</div><div class='del'>-https://www.linuxfoundation.org/collaborate/workgroups/networking/napi</div><div class='ctx'> </div><div class='add'>+See :ref:`Documentation/networking/napi.rst &lt;napi&gt;` for more information.</div><div class='ctx'> </div><div class='ctx'> MACVLAN</div><div class='ctx'> -------</div><div class='hunk'>@@ -902,6 +902,17 @@ To enable/disable UDP Segmentation Offload, issue the following command::</div><div class='ctx'>   # ethtool -K &lt;ethX&gt; tx-udp-segmentation [off|on]</div><div class='ctx'> </div><div class='ctx'> </div><div class='add'>+GNSS module</div><div class='add'>+-----------</div><div class='add'>+Requires kernel compiled with CONFIG_GNSS=y or CONFIG_GNSS=m.</div><div class='add'>+Allows user to read messages from the GNSS hardware module and write supported</div><div class='add'>+commands. If the module is physically present, a GNSS device is spawned:</div><div class='add'>+``/dev/gnss&lt;id&gt;``.</div><div class='add'>+The protocol of write command is dependent on the GNSS hardware module as the</div><div class='add'>+driver writes raw bytes by the GNSS object to the receiver through i2c. Please</div><div class='add'>+refer to the hardware GNSS module documentation for configuration details.</div><div class='add'>+</div><div class='add'>+</div><div class='ctx'> Performance Optimization</div><div class='ctx'> ========================</div><div class='ctx'> Driver defaults are meant to fit a wide variety of workloads, but if further</div><div class='hunk'>@@ -1015,12 +1026,9 @@ Support</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='ctx'> </div><div class='ctx'> </div><div class='ctx'> Trademarks</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/igb.rst b/Documentation/networking/device_drivers/ethernet/intel/igb.rst<br/>index d46289e182cf..fbd590b6a0d6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/igb.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/igb.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/igb.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/igb.rst</a></div><div class='hunk'>@@ -201,13 +201,8 @@ NOTE: This feature is exclusive to i210 models.</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/igbvf.rst b/Documentation/networking/device_drivers/ethernet/intel/igbvf.rst<br/>index 40fa210c5e14..11a9017f3069 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/igbvf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/igbvf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/igbvf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/igbvf.rst</a></div><div class='hunk'>@@ -53,13 +53,8 @@ https://www.kernel.org/pub/software/network/ethtool/</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/ixgb.rst b/Documentation/networking/device_drivers/ethernet/intel/ixgb.rst<br/>deleted file mode 100644<br/>index c6a233e68ad6..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/ixgb.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/ixgb.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,468 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0+</div><div class='del'>-</div><div class='del'>-=====================================================================</div><div class='del'>-Linux Base Driver for 10 Gigabit Intel(R) Ethernet Network Connection</div><div class='del'>-=====================================================================</div><div class='del'>-</div><div class='del'>-October 1, 2018</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Contents</div><div class='del'>-========</div><div class='del'>-</div><div class='del'>-- In This Release</div><div class='del'>-- Identifying Your Adapter</div><div class='del'>-- Command Line Parameters</div><div class='del'>-- Improving Performance</div><div class='del'>-- Additional Configurations</div><div class='del'>-- Known Issues/Troubleshooting</div><div class='del'>-- Support</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-In This Release</div><div class='del'>-===============</div><div class='del'>-</div><div class='del'>-This file describes the ixgb Linux Base Driver for the 10 Gigabit Intel(R)</div><div class='del'>-Network Connection.  This driver includes support for Itanium(R)2-based</div><div class='del'>-systems.</div><div class='del'>-</div><div class='del'>-For questions related to hardware requirements, refer to the documentation</div><div class='del'>-supplied with your 10 Gigabit adapter.  All hardware requirements listed apply</div><div class='del'>-to use with Linux.</div><div class='del'>-</div><div class='del'>-The following features are available in this kernel:</div><div class='del'>- - Native VLANs</div><div class='del'>- - Channel Bonding (teaming)</div><div class='del'>- - SNMP</div><div class='del'>-</div><div class='del'>-Channel Bonding documentation can be found in the Linux kernel source:</div><div class='del'>-/Documentation/networking/bonding.rst</div><div class='del'>-</div><div class='del'>-The driver information previously displayed in the /proc filesystem is not</div><div class='del'>-supported in this release.  Alternatively, you can use ethtool (version 1.6</div><div class='del'>-or later), lspci, and iproute2 to obtain the same information.</div><div class='del'>-</div><div class='del'>-Instructions on updating ethtool can be found in the section "Additional</div><div class='del'>-Configurations" later in this document.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Identifying Your Adapter</div><div class='del'>-========================</div><div class='del'>-</div><div class='del'>-The following Intel network adapters are compatible with the drivers in this</div><div class='del'>-release:</div><div class='del'>-</div><div class='del'>-+------------+------------------------------+----------------------------------+</div><div class='del'>-| Controller | Adapter Name                 | Physical Layer                   |</div><div class='del'>-+============+==============================+==================================+</div><div class='del'>-| 82597EX    | Intel(R) PRO/10GbE LR/SR/CX4 | - 10G Base-LR (fiber)            |</div><div class='del'>-|            | Server Adapters              | - 10G Base-SR (fiber)            |</div><div class='del'>-|            |                              | - 10G Base-CX4 (copper)          |</div><div class='del'>-+------------+------------------------------+----------------------------------+</div><div class='del'>-</div><div class='del'>-For more information on how to identify your adapter, go to the Adapter &amp;</div><div class='del'>-Driver ID Guide at:</div><div class='del'>-</div><div class='del'>-    https://support.intel.com</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Command Line Parameters</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-If the driver is built as a module, the  following optional parameters are</div><div class='del'>-used by entering them on the command line with the modprobe command using</div><div class='del'>-this syntax::</div><div class='del'>-</div><div class='del'>-    modprobe ixgb [&lt;option&gt;=&lt;VAL1&gt;,&lt;VAL2&gt;,...]</div><div class='del'>-</div><div class='del'>-For example, with two 10GbE PCI adapters, entering::</div><div class='del'>-</div><div class='del'>-    modprobe ixgb TxDescriptors=80,128</div><div class='del'>-</div><div class='del'>-loads the ixgb driver with 80 TX resources for the first adapter and 128 TX</div><div class='del'>-resources for the second adapter.</div><div class='del'>-</div><div class='del'>-The default value for each parameter is generally the recommended setting,</div><div class='del'>-unless otherwise noted.</div><div class='del'>-</div><div class='del'>-Copybreak</div><div class='del'>----------</div><div class='del'>-:Valid Range: 0-XXXX</div><div class='del'>-:Default Value: 256</div><div class='del'>-</div><div class='del'>-    This is the maximum size of packet that is copied to a new buffer on</div><div class='del'>-    receive.</div><div class='del'>-</div><div class='del'>-Debug</div><div class='del'>------</div><div class='del'>-:Valid Range: 0-16 (0=none,...,16=all)</div><div class='del'>-:Default Value: 0</div><div class='del'>-</div><div class='del'>-    This parameter adjusts the level of debug messages displayed in the</div><div class='del'>-    system logs.</div><div class='del'>-</div><div class='del'>-FlowControl</div><div class='del'>------------</div><div class='del'>-:Valid Range: 0-3 (0=none, 1=Rx only, 2=Tx only, 3=Rx&amp;Tx)</div><div class='del'>-:Default Value: 1 if no EEPROM, otherwise read from EEPROM</div><div class='del'>-</div><div class='del'>-    This parameter controls the automatic generation(Tx) and response(Rx) to</div><div class='del'>-    Ethernet PAUSE frames.  There are hardware bugs associated with enabling</div><div class='del'>-    Tx flow control so beware.</div><div class='del'>-</div><div class='del'>-RxDescriptors</div><div class='del'>--------------</div><div class='del'>-:Valid Range: 64-4096</div><div class='del'>-:Default Value: 1024</div><div class='del'>-</div><div class='del'>-    This value is the number of receive descriptors allocated by the driver.</div><div class='del'>-    Increasing this value allows the driver to buffer more incoming packets.</div><div class='del'>-    Each descriptor is 16 bytes.  A receive buffer is also allocated for</div><div class='del'>-    each descriptor and can be either 2048, 4056, 8192, or 16384 bytes,</div><div class='del'>-    depending on the MTU setting.  When the MTU size is 1500 or less, the</div><div class='del'>-    receive buffer size is 2048 bytes. When the MTU is greater than 1500 the</div><div class='del'>-    receive buffer size will be either 4056, 8192, or 16384 bytes.  The</div><div class='del'>-    maximum MTU size is 16114.</div><div class='del'>-</div><div class='del'>-TxDescriptors</div><div class='del'>--------------</div><div class='del'>-:Valid Range: 64-4096</div><div class='del'>-:Default Value: 256</div><div class='del'>-</div><div class='del'>-    This value is the number of transmit descriptors allocated by the driver.</div><div class='del'>-    Increasing this value allows the driver to queue more transmits.  Each</div><div class='del'>-    descriptor is 16 bytes.</div><div class='del'>-</div><div class='del'>-RxIntDelay</div><div class='del'>-----------</div><div class='del'>-:Valid Range: 0-65535 (0=off)</div><div class='del'>-:Default Value: 72</div><div class='del'>-</div><div class='del'>-    This value delays the generation of receive interrupts in units of</div><div class='del'>-    0.8192 microseconds.  Receive interrupt reduction can improve CPU</div><div class='del'>-    efficiency if properly tuned for specific network traffic.  Increasing</div><div class='del'>-    this value adds extra latency to frame reception and can end up</div><div class='del'>-    decreasing the throughput of TCP traffic.  If the system is reporting</div><div class='del'>-    dropped receives, this value may be set too high, causing the driver to</div><div class='del'>-    run out of available receive descriptors.</div><div class='del'>-</div><div class='del'>-TxIntDelay</div><div class='del'>-----------</div><div class='del'>-:Valid Range: 0-65535 (0=off)</div><div class='del'>-:Default Value: 32</div><div class='del'>-</div><div class='del'>-    This value delays the generation of transmit interrupts in units of</div><div class='del'>-    0.8192 microseconds.  Transmit interrupt reduction can improve CPU</div><div class='del'>-    efficiency if properly tuned for specific network traffic.  Increasing</div><div class='del'>-    this value adds extra latency to frame transmission and can end up</div><div class='del'>-    decreasing the throughput of TCP traffic.  If this value is set too high,</div><div class='del'>-    it will cause the driver to run out of available transmit descriptors.</div><div class='del'>-</div><div class='del'>-XsumRX</div><div class='del'>-------</div><div class='del'>-:Valid Range: 0-1</div><div class='del'>-:Default Value: 1</div><div class='del'>-</div><div class='del'>-    A value of '1' indicates that the driver should enable IP checksum</div><div class='del'>-    offload for received packets (both UDP and TCP) to the adapter hardware.</div><div class='del'>-</div><div class='del'>-RxFCHighThresh</div><div class='del'>---------------</div><div class='del'>-:Valid Range: 1,536-262,136 (0x600 - 0x3FFF8, 8 byte granularity)</div><div class='del'>-:Default Value: 196,608 (0x30000)</div><div class='del'>-</div><div class='del'>-    Receive Flow control high threshold (when we send a pause frame)</div><div class='del'>-</div><div class='del'>-RxFCLowThresh</div><div class='del'>--------------</div><div class='del'>-:Valid Range: 64-262,136 (0x40 - 0x3FFF8, 8 byte granularity)</div><div class='del'>-:Default Value: 163,840 (0x28000)</div><div class='del'>-</div><div class='del'>-    Receive Flow control low threshold (when we send a resume frame)</div><div class='del'>-</div><div class='del'>-FCReqTimeout</div><div class='del'>-------------</div><div class='del'>-:Valid Range: 1-65535</div><div class='del'>-:Default Value: 65535</div><div class='del'>-</div><div class='del'>-    Flow control request timeout (how long to pause the link partner's tx)</div><div class='del'>-</div><div class='del'>-IntDelayEnable</div><div class='del'>---------------</div><div class='del'>-:Value Range: 0,1</div><div class='del'>-:Default Value: 1</div><div class='del'>-</div><div class='del'>-    Interrupt Delay, 0 disables transmit interrupt delay and 1 enables it.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Improving Performance</div><div class='del'>-=====================</div><div class='del'>-</div><div class='del'>-With the 10 Gigabit server adapters, the default Linux configuration will</div><div class='del'>-very likely limit the total available throughput artificially.  There is a set</div><div class='del'>-of configuration changes that, when applied together, will increase the ability</div><div class='del'>-of Linux to transmit and receive data.  The following enhancements were</div><div class='del'>-originally acquired from settings published at https://www.spec.org/web99/ for</div><div class='del'>-various submitted results using Linux.</div><div class='del'>-</div><div class='del'>-NOTE:</div><div class='del'>-  These changes are only suggestions, and serve as a starting point for</div><div class='del'>-  tuning your network performance.</div><div class='del'>-</div><div class='del'>-The changes are made in three major ways, listed in order of greatest effect:</div><div class='del'>-</div><div class='del'>-- Use ip link to modify the mtu (maximum transmission unit) and the txqueuelen</div><div class='del'>-  parameter.</div><div class='del'>-- Use sysctl to modify /proc parameters (essentially kernel tuning)</div><div class='del'>-- Use setpci to modify the MMRBC field in PCI-X configuration space to increase</div><div class='del'>-  transmit burst lengths on the bus.</div><div class='del'>-</div><div class='del'>-NOTE:</div><div class='del'>-  setpci modifies the adapter's configuration registers to allow it to read</div><div class='del'>-  up to 4k bytes at a time (for transmits).  However, for some systems the</div><div class='del'>-  behavior after modifying this register may be undefined (possibly errors of</div><div class='del'>-  some kind).  A power-cycle, hard reset or explicitly setting the e6 register</div><div class='del'>-  back to 22 (setpci -d 8086:1a48 e6.b=22) may be required to get back to a</div><div class='del'>-  stable configuration.</div><div class='del'>-</div><div class='del'>-- COPY these lines and paste them into ixgb_perf.sh:</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>-  #!/bin/bash</div><div class='del'>-  echo "configuring network performance , edit this file to change the interface</div><div class='del'>-  or device ID of 10GbE card"</div><div class='del'>-  # set mmrbc to 4k reads, modify only Intel 10GbE device IDs</div><div class='del'>-  # replace 1a48 with appropriate 10GbE device's ID installed on the system,</div><div class='del'>-  # if needed.</div><div class='del'>-  setpci -d 8086:1a48 e6.b=2e</div><div class='del'>-  # set the MTU (max transmission unit) - it requires your switch and clients</div><div class='del'>-  # to change as well.</div><div class='del'>-  # set the txqueuelen</div><div class='del'>-  # your ixgb adapter should be loaded as eth1 for this to work, change if needed</div><div class='del'>-  ip li set dev eth1 mtu 9000 txqueuelen 1000 up</div><div class='del'>-  # call the sysctl utility to modify /proc/sys entries</div><div class='del'>-  sysctl -p ./sysctl_ixgb.conf</div><div class='del'>-</div><div class='del'>-- COPY these lines and paste them into sysctl_ixgb.conf:</div><div class='del'>-</div><div class='del'>-::</div><div class='del'>-</div><div class='del'>-  # some of the defaults may be different for your kernel</div><div class='del'>-  # call this file with sysctl -p &lt;this file&gt;</div><div class='del'>-  # these are just suggested values that worked well to increase throughput in</div><div class='del'>-  # several network benchmark tests, your mileage may vary</div><div class='del'>-</div><div class='del'>-  ### IPV4 specific settings</div><div class='del'>-  # turn TCP timestamp support off, default 1, reduces CPU use</div><div class='del'>-  net.ipv4.tcp_timestamps = 0</div><div class='del'>-  # turn SACK support off, default on</div><div class='del'>-  # on systems with a VERY fast bus -&gt; memory interface this is the big gainer</div><div class='del'>-  net.ipv4.tcp_sack = 0</div><div class='del'>-  # set min/default/max TCP read buffer, default 4096 87380 174760</div><div class='del'>-  net.ipv4.tcp_rmem = 10000000 10000000 10000000</div><div class='del'>-  # set min/pressure/max TCP write buffer, default 4096 16384 131072</div><div class='del'>-  net.ipv4.tcp_wmem = 10000000 10000000 10000000</div><div class='del'>-  # set min/pressure/max TCP buffer space, default 31744 32256 32768</div><div class='del'>-  net.ipv4.tcp_mem = 10000000 10000000 10000000</div><div class='del'>-</div><div class='del'>-  ### CORE settings (mostly for socket and UDP effect)</div><div class='del'>-  # set maximum receive socket buffer size, default 131071</div><div class='del'>-  net.core.rmem_max = 524287</div><div class='del'>-  # set maximum send socket buffer size, default 131071</div><div class='del'>-  net.core.wmem_max = 524287</div><div class='del'>-  # set default receive socket buffer size, default 65535</div><div class='del'>-  net.core.rmem_default = 524287</div><div class='del'>-  # set default send socket buffer size, default 65535</div><div class='del'>-  net.core.wmem_default = 524287</div><div class='del'>-  # set maximum amount of option memory buffers, default 10240</div><div class='del'>-  net.core.optmem_max = 524287</div><div class='del'>-  # set number of unprocessed input packets before kernel starts dropping them; default 300</div><div class='del'>-  net.core.netdev_max_backlog = 300000</div><div class='del'>-</div><div class='del'>-Edit the ixgb_perf.sh script if necessary to change eth1 to whatever interface</div><div class='del'>-your ixgb driver is using and/or replace '1a48' with appropriate 10GbE device's</div><div class='del'>-ID installed on the system.</div><div class='del'>-</div><div class='del'>-NOTE:</div><div class='del'>-  Unless these scripts are added to the boot process, these changes will</div><div class='del'>-  only last only until the next system reboot.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Resolving Slow UDP Traffic</div><div class='del'>---------------------------</div><div class='del'>-If your server does not seem to be able to receive UDP traffic as fast as it</div><div class='del'>-can receive TCP traffic, it could be because Linux, by default, does not set</div><div class='del'>-the network stack buffers as large as they need to be to support high UDP</div><div class='del'>-transfer rates.  One way to alleviate this problem is to allow more memory to</div><div class='del'>-be used by the IP stack to store incoming data.</div><div class='del'>-</div><div class='del'>-For instance, use the commands::</div><div class='del'>-</div><div class='del'>-    sysctl -w net.core.rmem_max=262143</div><div class='del'>-</div><div class='del'>-and::</div><div class='del'>-</div><div class='del'>-    sysctl -w net.core.rmem_default=262143</div><div class='del'>-</div><div class='del'>-to increase the read buffer memory max and default to 262143 (256k - 1) from</div><div class='del'>-defaults of max=131071 (128k - 1) and default=65535 (64k - 1).  These variables</div><div class='del'>-will increase the amount of memory used by the network stack for receives, and</div><div class='del'>-can be increased significantly more if necessary for your application.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Additional Configurations</div><div class='del'>-=========================</div><div class='del'>-</div><div class='del'>-Configuring the Driver on Different Distributions</div><div class='del'>--------------------------------------------------</div><div class='del'>-Configuring a network driver to load properly when the system is started is</div><div class='del'>-distribution dependent. Typically, the configuration process involves adding</div><div class='del'>-an alias line to /etc/modprobe.conf as well as editing other system startup</div><div class='del'>-scripts and/or configuration files.  Many popular Linux distributions ship</div><div class='del'>-with tools to make these changes for you.  To learn the proper way to</div><div class='del'>-configure a network device for your system, refer to your distribution</div><div class='del'>-documentation.  If during this process you are asked for the driver or module</div><div class='del'>-name, the name for the Linux Base Driver for the Intel 10GbE Family of</div><div class='del'>-Adapters is ixgb.</div><div class='del'>-</div><div class='del'>-Viewing Link Messages</div><div class='del'>----------------------</div><div class='del'>-Link messages will not be displayed to the console if the distribution is</div><div class='del'>-restricting system messages. In order to see network driver link messages on</div><div class='del'>-your console, set dmesg to eight by entering the following::</div><div class='del'>-</div><div class='del'>-    dmesg -n 8</div><div class='del'>-</div><div class='del'>-NOTE: This setting is not saved across reboots.</div><div class='del'>-</div><div class='del'>-Jumbo Frames</div><div class='del'>-------------</div><div class='del'>-The driver supports Jumbo Frames for all adapters. Jumbo Frames support is</div><div class='del'>-enabled by changing the MTU to a value larger than the default of 1500.</div><div class='del'>-The maximum value for the MTU is 16114.  Use the ip command to</div><div class='del'>-increase the MTU size.  For example::</div><div class='del'>-</div><div class='del'>-    ip li set dev ethx mtu 9000</div><div class='del'>-</div><div class='del'>-The maximum MTU setting for Jumbo Frames is 16114.  This value coincides</div><div class='del'>-with the maximum Jumbo Frames size of 16128.</div><div class='del'>-</div><div class='del'>-Ethtool</div><div class='del'>--------</div><div class='del'>-The driver utilizes the ethtool interface for driver configuration and</div><div class='del'>-diagnostics, as well as displaying statistical information.  The ethtool</div><div class='del'>-version 1.6 or later is required for this functionality.</div><div class='del'>-</div><div class='del'>-The latest release of ethtool can be found from</div><div class='del'>-https://www.kernel.org/pub/software/network/ethtool/</div><div class='del'>-</div><div class='del'>-NOTE:</div><div class='del'>-  The ethtool version 1.6 only supports a limited set of ethtool options.</div><div class='del'>-  Support for a more complete ethtool feature set can be enabled by</div><div class='del'>-  upgrading to the latest version.</div><div class='del'>-</div><div class='del'>-NAPI</div><div class='del'>-----</div><div class='del'>-NAPI (Rx polling mode) is supported in the ixgb driver.</div><div class='del'>-</div><div class='del'>-See https://wiki.linuxfoundation.org/networking/napi for more information on</div><div class='del'>-NAPI.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Known Issues/Troubleshooting</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-NOTE:</div><div class='del'>-  After installing the driver, if your Intel Network Connection is not</div><div class='del'>-  working, verify in the "In This Release" section of the readme that you have</div><div class='del'>-  installed the correct driver.</div><div class='del'>-</div><div class='del'>-Cable Interoperability Issue with Fujitsu XENPAK Module in SmartBits Chassis</div><div class='del'>-----------------------------------------------------------------------------</div><div class='del'>-Excessive CRC errors may be observed if the Intel(R) PRO/10GbE CX4</div><div class='del'>-Server adapter is connected to a Fujitsu XENPAK CX4 module in a SmartBits</div><div class='del'>-chassis using 15 m/24AWG cable assemblies manufactured by Fujitsu or Leoni.</div><div class='del'>-The CRC errors may be received either by the Intel(R) PRO/10GbE CX4</div><div class='del'>-Server adapter or the SmartBits. If this situation occurs using a different</div><div class='del'>-cable assembly may resolve the issue.</div><div class='del'>-</div><div class='del'>-Cable Interoperability Issues with HP Procurve 3400cl Switch Port</div><div class='del'>------------------------------------------------------------------</div><div class='del'>-Excessive CRC errors may be observed if the Intel(R) PRO/10GbE CX4 Server</div><div class='del'>-adapter is connected to an HP Procurve 3400cl switch port using short cables</div><div class='del'>-(1 m or shorter). If this situation occurs, using a longer cable may resolve</div><div class='del'>-the issue.</div><div class='del'>-</div><div class='del'>-Excessive CRC errors may be observed using Fujitsu 24AWG cable assemblies that</div><div class='del'>-Are 10 m or longer or where using a Leoni 15 m/24AWG cable assembly. The CRC</div><div class='del'>-errors may be received either by the CX4 Server adapter or at the switch. If</div><div class='del'>-this situation occurs, using a different cable assembly may resolve the issue.</div><div class='del'>-</div><div class='del'>-Jumbo Frames System Requirement</div><div class='del'>--------------------------------</div><div class='del'>-Memory allocation failures have been observed on Linux systems with 64 MB</div><div class='del'>-of RAM or less that are running Jumbo Frames.  If you are using Jumbo</div><div class='del'>-Frames, your system may require more than the advertised minimum</div><div class='del'>-requirement of 64 MB of system memory.</div><div class='del'>-</div><div class='del'>-Performance Degradation with Jumbo Frames</div><div class='del'>------------------------------------------</div><div class='del'>-Degradation in throughput performance may be observed in some Jumbo frames</div><div class='del'>-environments.  If this is observed, increasing the application's socket buffer</div><div class='del'>-size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values may help.</div><div class='del'>-See the specific application manual and /usr/src/linux*/Documentation/</div><div class='del'>-networking/ip-sysctl.txt for more details.</div><div class='del'>-</div><div class='del'>-Allocating Rx Buffers when Using Jumbo Frames</div><div class='del'>----------------------------------------------</div><div class='del'>-Allocating Rx buffers when using Jumbo Frames on 2.6.x kernels may fail if</div><div class='del'>-the available memory is heavily fragmented. This issue may be seen with PCI-X</div><div class='del'>-adapters or with packet split disabled. This can be reduced or eliminated</div><div class='del'>-by changing the amount of available memory for receive buffer allocation, by</div><div class='del'>-increasing /proc/sys/vm/min_free_kbytes.</div><div class='del'>-</div><div class='del'>-Multiple Interfaces on Same Ethernet Broadcast Network</div><div class='del'>-------------------------------------------------------</div><div class='del'>-Due to the default ARP behavior on Linux, it is not possible to have</div><div class='del'>-one system on two IP networks in the same Ethernet broadcast domain</div><div class='del'>-(non-partitioned switch) behave as expected.  All Ethernet interfaces</div><div class='del'>-will respond to IP traffic for any IP address assigned to the system.</div><div class='del'>-This results in unbalanced receive traffic.</div><div class='del'>-</div><div class='del'>-If you have multiple interfaces in a server, do either of the following:</div><div class='del'>-</div><div class='del'>-  - Turn on ARP filtering by entering::</div><div class='del'>-</div><div class='del'>-      echo 1 &gt; /proc/sys/net/ipv4/conf/all/arp_filter</div><div class='del'>-</div><div class='del'>-  - Install the interfaces in separate broadcast domains - either in</div><div class='del'>-    different switches or in a switch partitioned to VLANs.</div><div class='del'>-</div><div class='del'>-UDP Stress Test Dropped Packet Issue</div><div class='del'>---------------------------------------</div><div class='del'>-Under small packets UDP stress test with 10GbE driver, the Linux system</div><div class='del'>-may drop UDP packets due to the fullness of socket buffers. You may want</div><div class='del'>-to change the driver's Flow Control variables to the minimum value for</div><div class='del'>-controlling packet reception.</div><div class='del'>-</div><div class='del'>-Tx Hangs Possible Under Stress</div><div class='del'>-------------------------------</div><div class='del'>-Under stress conditions, if TX hangs occur, turning off TSO</div><div class='del'>-"ethtool -K eth0 tso off" may resolve the problem.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-Support</div><div class='del'>-=======</div><div class='del'>-For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='del'>-https://www.intel.com/support/</div><div class='del'>-</div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='del'>-If an issue is identified with the released source code on a supported kernel</div><div class='del'>-with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/ixgbe.rst b/Documentation/networking/device_drivers/ethernet/intel/ixgbe.rst<br/>index 0a233b17c664..1e5f16993f69 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/ixgbe.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/ixgbe.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/ixgbe.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/ixgbe.rst</a></div><div class='hunk'>@@ -545,13 +545,8 @@ on the Intel Ethernet Controller XL710.</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/intel/ixgbevf.rst b/Documentation/networking/device_drivers/ethernet/intel/ixgbevf.rst<br/>index 76bbde736f21..08dc0d368a48 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/ixgbevf.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/intel/ixgbevf.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/intel/ixgbevf.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/intel/ixgbevf.rst</a></div><div class='hunk'>@@ -55,13 +55,8 @@ VLANs: There is a limit of a total of 64 shared VLANs to 1 or more VFs.</div><div class='ctx'> Support</div><div class='ctx'> =======</div><div class='ctx'> For general information, go to the Intel support website at:</div><div class='del'>-</div><div class='ctx'> https://www.intel.com/support/</div><div class='ctx'> </div><div class='del'>-or the Intel Wired Networking project hosted by Sourceforge at:</div><div class='del'>-</div><div class='del'>-https://sourceforge.net/projects/e1000</div><div class='del'>-</div><div class='ctx'> If an issue is identified with the released source code on a supported kernel</div><div class='ctx'> with a supported adapter, email the specific information related to the issue</div><div class='del'>-to e1000-devel@lists.sf.net.</div><div class='add'>+to intel-wired-lan@lists.osuosl.org.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/marvell/octeon_ep.rst b/Documentation/networking/device_drivers/ethernet/marvell/octeon_ep.rst<br/>new file mode 100644<br/>index 000000000000..cad96c8d1f97<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/marvell/octeon_ep.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/marvell/octeon_ep.rst</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0+</div><div class='add'>+</div><div class='add'>+====================================================================</div><div class='add'>+Linux kernel networking driver for Marvell's Octeon PCI Endpoint NIC</div><div class='add'>+====================================================================</div><div class='add'>+</div><div class='add'>+Network driver for Marvell's Octeon PCI EndPoint NIC.</div><div class='add'>+Copyright (c) 2020 Marvell International Ltd.</div><div class='add'>+</div><div class='add'>+Contents</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+- `Overview`_</div><div class='add'>+- `Supported Devices`_</div><div class='add'>+- `Interface Control`_</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+This driver implements networking functionality of Marvell's Octeon PCI</div><div class='add'>+EndPoint NIC.</div><div class='add'>+</div><div class='add'>+Supported Devices</div><div class='add'>+=================</div><div class='add'>+Currently, this driver support following devices:</div><div class='add'>+ * Network controller: Cavium, Inc. Device b200</div><div class='add'>+ * Network controller: Cavium, Inc. Device b400</div><div class='add'>+</div><div class='add'>+Interface Control</div><div class='add'>+=================</div><div class='add'>+Network Interface control like changing mtu, link speed, link down/up are</div><div class='add'>+done by writing command to mailbox command queue, a mailbox interface</div><div class='add'>+implemented through a reserved region in BAR4.</div><div class='add'>+This driver writes the commands into the mailbox and the firmware on the</div><div class='add'>+Octeon device processes them. The firmware also sends unsolicited notifications</div><div class='add'>+to driver for events suchs as link change, through notification queue</div><div class='add'>+implemented as part of mailbox interface.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst b/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst<br/>index dd5cd69467be..5ba9015336e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/marvell/octeontx2.rst</a></div><div class='hunk'>@@ -127,7 +127,7 @@ Type1:</div><div class='ctx'> Type2:</div><div class='ctx'>  - RVU PF0 ie admin function creates these VFs and maps them to loopback block's channels.</div><div class='ctx'>  - A set of two VFs (VF0 &amp; VF1, VF2 &amp; VF3 .. so on) works as a pair ie pkts sent out of</div><div class='del'>-   VF0 will be received by VF1 and viceversa.</div><div class='add'>+   VF0 will be received by VF1 and vice versa.</div><div class='ctx'>  - These VFs can be used by applications or virtual machines to communicate between them</div><div class='ctx'>    without sending traffic outside. There is no switch present in HW, hence the support</div><div class='ctx'>    for loopback VFs.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5.rst<br/>deleted file mode 100644<br/>index 5edf50d7dbd5..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,762 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='del'>-</div><div class='del'>-=================================================</div><div class='del'>-Mellanox ConnectX(R) mlx5 core VPI Network Driver</div><div class='del'>-=================================================</div><div class='del'>-</div><div class='del'>-Copyright (c) 2019, Mellanox Technologies LTD.</div><div class='del'>-</div><div class='del'>-Contents</div><div class='del'>-========</div><div class='del'>-</div><div class='del'>-- `Enabling the driver and kconfig options`_</div><div class='del'>-- `Devlink info`_</div><div class='del'>-- `Devlink parameters`_</div><div class='del'>-- `Bridge offload`_</div><div class='del'>-- `mlx5 subfunction`_</div><div class='del'>-- `mlx5 function attributes`_</div><div class='del'>-- `Devlink health reporters`_</div><div class='del'>-- `mlx5 tracepoints`_</div><div class='del'>-</div><div class='del'>-Enabling the driver and kconfig options</div><div class='del'>-=======================================</div><div class='del'>-</div><div class='del'>-| mlx5 core is modular and most of the major mlx5 core driver features can be selected (compiled in/out)</div><div class='del'>-| at build time via kernel Kconfig flags.</div><div class='del'>-| Basic features, ethernet net device rx/tx offloads and XDP, are available with the most basic flags</div><div class='del'>-| CONFIG_MLX5_CORE=y/m and CONFIG_MLX5_CORE_EN=y.</div><div class='del'>-| For the list of advanced features please see below.</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_CORE=(y/m/n)** (module mlx5_core.ko)</div><div class='del'>-</div><div class='del'>-|    The driver can be enabled by choosing CONFIG_MLX5_CORE=y/m in kernel config.</div><div class='del'>-|    This will provide mlx5 core driver for mlx5 ulps to interface with (mlx5e, mlx5_ib).</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_CORE_EN=(y/n)**</div><div class='del'>-</div><div class='del'>-|    Choosing this option will allow basic ethernet netdevice support with all of the standard rx/tx offloads.</div><div class='del'>-|    mlx5e is the mlx5 ulp driver which provides netdevice kernel interface, when chosen, mlx5e will be</div><div class='del'>-|    built-in into mlx5_core.ko.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_EN_ARFS=(y/n)**</div><div class='del'>-</div><div class='del'>-|     Enables Hardware-accelerated receive flow steering (arfs) support, and ntuple filtering.</div><div class='del'>-|     https://community.mellanox.com/s/article/howto-configure-arfs-on-connectx-4</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_EN_RXNFC=(y/n)**</div><div class='del'>-</div><div class='del'>-|    Enables ethtool receive network flow classification, which allows user defined</div><div class='del'>-|    flow rules to direct traffic into arbitrary rx queue via ethtool set/get_rxnfc API.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_CORE_EN_DCB=(y/n)**:</div><div class='del'>-</div><div class='del'>-|    Enables `Data Center Bridging (DCB) Support &lt;https://community.mellanox.com/s/article/howto-auto-config-pfc-and-ets-on-connectx-4-via-lldp-dcbx&gt;`_.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_MPFS=(y/n)**</div><div class='del'>-</div><div class='del'>-|    Ethernet Multi-Physical Function Switch (MPFS) support in ConnectX NIC.</div><div class='del'>-|    MPFs is required for when `Multi-Host &lt;http://www.mellanox.com/page/multihost&gt;`_ configuration is enabled to allow passing</div><div class='del'>-|    user configured unicast MAC addresses to the requesting PF.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_ESWITCH=(y/n)**</div><div class='del'>-</div><div class='del'>-|    Ethernet SRIOV E-Switch support in ConnectX NIC. E-Switch provides internal SRIOV packet steering</div><div class='del'>-|    and switching for the enabled VFs and PF in two available modes:</div><div class='del'>-|           1) `Legacy SRIOV mode (L2 mac vlan steering based) &lt;https://community.mellanox.com/s/article/howto-configure-sr-iov-for-connectx-4-connectx-5-with-kvm--ethernet-x&gt;`_.</div><div class='del'>-|           2) `Switchdev mode (eswitch offloads) &lt;https://www.mellanox.com/related-docs/prod_software/ASAP2_Hardware_Offloading_for_vSwitches_User_Manual_v4.4.pdf&gt;`_.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_CORE_IPOIB=(y/n)**</div><div class='del'>-</div><div class='del'>-|    IPoIB offloads &amp; acceleration support.</div><div class='del'>-|    Requires CONFIG_MLX5_CORE_EN to provide an accelerated interface for the rdma</div><div class='del'>-|    IPoIB ulp netdevice.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_FPGA=(y/n)**</div><div class='del'>-</div><div class='del'>-|    Build support for the Innova family of network cards by Mellanox Technologies.</div><div class='del'>-|    Innova network cards are comprised of a ConnectX chip and an FPGA chip on one board.</div><div class='del'>-|    If you select this option, the mlx5_core driver will include the Innova FPGA core and allow</div><div class='del'>-|    building sandbox-specific client drivers.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_EN_IPSEC=(y/n)**</div><div class='del'>-</div><div class='del'>-|    Enables `IPSec XFRM cryptography-offload accelaration &lt;http://www.mellanox.com/related-docs/prod_software/Mellanox_Innova_IPsec_Ethernet_Adapter_Card_User_Manual.pdf&gt;`_.</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_EN_TLS=(y/n)**</div><div class='del'>-</div><div class='del'>-|   TLS cryptography-offload accelaration.</div><div class='del'>-</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_INFINIBAND=(y/n/m)** (module mlx5_ib.ko)</div><div class='del'>-</div><div class='del'>-|   Provides low-level InfiniBand/RDMA and `RoCE &lt;https://community.mellanox.com/s/article/recommended-network-configuration-examples-for-roce-deployment&gt;`_ support.</div><div class='del'>-</div><div class='del'>-**CONFIG_MLX5_SF=(y/n)**</div><div class='del'>-</div><div class='del'>-|   Build support for subfunction.</div><div class='del'>-|   Subfunctons are more light weight than PCI SRIOV VFs. Choosing this option</div><div class='del'>-|   will enable support for creating subfunction devices.</div><div class='del'>-</div><div class='del'>-**External options** ( Choose if the corresponding mlx5 feature is required )</div><div class='del'>-</div><div class='del'>-- CONFIG_PTP_1588_CLOCK: When chosen, mlx5 ptp support will be enabled</div><div class='del'>-- CONFIG_VXLAN: When chosen, mlx5 vxlan support will be enabled.</div><div class='del'>-- CONFIG_MLXFW: When chosen, mlx5 firmware flashing support will be enabled (via devlink and ethtool).</div><div class='del'>-</div><div class='del'>-Devlink info</div><div class='del'>-============</div><div class='del'>-</div><div class='del'>-The devlink info reports the running and stored firmware versions on device.</div><div class='del'>-It also prints the device PSID which represents the HCA board type ID.</div><div class='del'>-</div><div class='del'>-User command example::</div><div class='del'>-</div><div class='del'>-   $ devlink dev info pci/0000:00:06.0</div><div class='del'>-      pci/0000:00:06.0:</div><div class='del'>-      driver mlx5_core</div><div class='del'>-      versions:</div><div class='del'>-         fixed:</div><div class='del'>-            fw.psid MT_0000000009</div><div class='del'>-         running:</div><div class='del'>-            fw.version 16.26.0100</div><div class='del'>-         stored:</div><div class='del'>-            fw.version 16.26.0100</div><div class='del'>-</div><div class='del'>-Devlink parameters</div><div class='del'>-==================</div><div class='del'>-</div><div class='del'>-flow_steering_mode: Device flow steering mode</div><div class='del'>----------------------------------------------</div><div class='del'>-The flow steering mode parameter controls the flow steering mode of the driver.</div><div class='del'>-Two modes are supported:</div><div class='del'>-1. 'dmfs' - Device managed flow steering.</div><div class='del'>-2. 'smfs  - Software/Driver managed flow steering.</div><div class='del'>-</div><div class='del'>-In DMFS mode, the HW steering entities are created and managed through the</div><div class='del'>-Firmware.</div><div class='del'>-In SMFS mode, the HW steering entities are created and managed though by</div><div class='del'>-the driver directly into Hardware without firmware intervention.</div><div class='del'>-</div><div class='del'>-SMFS mode is faster and provides better rule inserstion rate compared to default DMFS mode.</div><div class='del'>-</div><div class='del'>-User command examples:</div><div class='del'>-</div><div class='del'>-- Set SMFS flow steering mode::</div><div class='del'>-</div><div class='del'>-    $ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime</div><div class='del'>-</div><div class='del'>-- Read device flow steering mode::</div><div class='del'>-</div><div class='del'>-    $ devlink dev param show pci/0000:06:00.0 name flow_steering_mode</div><div class='del'>-      pci/0000:06:00.0:</div><div class='del'>-      name flow_steering_mode type driver-specific</div><div class='del'>-      values:</div><div class='del'>-         cmode runtime value smfs</div><div class='del'>-</div><div class='del'>-enable_roce: RoCE enablement state</div><div class='del'>-----------------------------------</div><div class='del'>-RoCE enablement state controls driver support for RoCE traffic.</div><div class='del'>-When RoCE is disabled, there is no gid table, only raw ethernet QPs are supported and traffic on the well known UDP RoCE port is handled as raw ethernet traffic.</div><div class='del'>-</div><div class='del'>-To change RoCE enablement state a user must change the driverinit cmode value and run devlink reload.</div><div class='del'>-</div><div class='del'>-User command examples:</div><div class='del'>-</div><div class='del'>-- Disable RoCE::</div><div class='del'>-</div><div class='del'>-    $ devlink dev param set pci/0000:06:00.0 name enable_roce value false cmode driverinit</div><div class='del'>-    $ devlink dev reload pci/0000:06:00.0</div><div class='del'>-</div><div class='del'>-- Read RoCE enablement state::</div><div class='del'>-</div><div class='del'>-    $ devlink dev param show pci/0000:06:00.0 name enable_roce</div><div class='del'>-      pci/0000:06:00.0:</div><div class='del'>-      name enable_roce type generic</div><div class='del'>-      values:</div><div class='del'>-         cmode driverinit value true</div><div class='del'>-</div><div class='del'>-esw_port_metadata: Eswitch port metadata state</div><div class='del'>-----------------------------------------------</div><div class='del'>-When applicable, disabling Eswitch metadata can increase packet rate</div><div class='del'>-up to 20% depending on the use case and packet sizes.</div><div class='del'>-</div><div class='del'>-Eswitch port metadata state controls whether to internally tag packets with</div><div class='del'>-metadata. Metadata tagging must be enabled for multi-port RoCE, failover</div><div class='del'>-between representors and stacked devices.</div><div class='del'>-By default metadata is enabled on the supported devices in E-switch.</div><div class='del'>-Metadata is applicable only for E-switch in switchdev mode and</div><div class='del'>-users may disable it when NONE of the below use cases will be in use:</div><div class='del'>-1. HCA is in Dual/multi-port RoCE mode.</div><div class='del'>-2. VF/SF representor bonding (Usually used for Live migration)</div><div class='del'>-3. Stacked devices</div><div class='del'>-</div><div class='del'>-When metadata is disabled, the above use cases will fail to initialize if</div><div class='del'>-users try to enable them.</div><div class='del'>-</div><div class='del'>-- Show eswitch port metadata::</div><div class='del'>-</div><div class='del'>-    $ devlink dev param show pci/0000:06:00.0 name esw_port_metadata</div><div class='del'>-      pci/0000:06:00.0:</div><div class='del'>-        name esw_port_metadata type driver-specific</div><div class='del'>-          values:</div><div class='del'>-            cmode runtime value true</div><div class='del'>-</div><div class='del'>-- Disable eswitch port metadata::</div><div class='del'>-</div><div class='del'>-    $ devlink dev param set pci/0000:06:00.0 name esw_port_metadata value false cmode runtime</div><div class='del'>-</div><div class='del'>-- Change eswitch mode to switchdev mode where after choosing the metadata value::</div><div class='del'>-</div><div class='del'>-    $ devlink dev eswitch set pci/0000:06:00.0 mode switchdev</div><div class='del'>-</div><div class='del'>-Bridge offload</div><div class='del'>-==============</div><div class='del'>-The mlx5 driver implements support for offloading bridge rules when in switchdev</div><div class='del'>-mode. Linux bridge FDBs are automatically offloaded when mlx5 switchdev</div><div class='del'>-representor is attached to bridge.</div><div class='del'>-</div><div class='del'>-- Change device to switchdev mode::</div><div class='del'>-</div><div class='del'>-    $ devlink dev eswitch set pci/0000:06:00.0 mode switchdev</div><div class='del'>-</div><div class='del'>-- Attach mlx5 switchdev representor 'enp8s0f0' to bridge netdev 'bridge1'::</div><div class='del'>-</div><div class='del'>-    $ ip link set enp8s0f0 master bridge1</div><div class='del'>-</div><div class='del'>-VLANs</div><div class='del'>------</div><div class='del'>-Following bridge VLAN functions are supported by mlx5:</div><div class='del'>-</div><div class='del'>-- VLAN filtering (including multiple VLANs per port)::</div><div class='del'>-</div><div class='del'>-    $ ip link set bridge1 type bridge vlan_filtering 1</div><div class='del'>-    $ bridge vlan add dev enp8s0f0 vid 2-3</div><div class='del'>-</div><div class='del'>-- VLAN push on bridge ingress::</div><div class='del'>-</div><div class='del'>-    $ bridge vlan add dev enp8s0f0 vid 3 pvid</div><div class='del'>-</div><div class='del'>-- VLAN pop on bridge egress::</div><div class='del'>-</div><div class='del'>-    $ bridge vlan add dev enp8s0f0 vid 3 untagged</div><div class='del'>-</div><div class='del'>-mlx5 subfunction</div><div class='del'>-================</div><div class='del'>-mlx5 supports subfunction management using devlink port (see :ref:`Documentation/networking/devlink/devlink-port.rst &lt;devlink_port&gt;`) interface.</div><div class='del'>-</div><div class='del'>-A Subfunction has its own function capabilities and its own resources. This</div><div class='del'>-means a subfunction has its own dedicated queues (txq, rxq, cq, eq). These</div><div class='del'>-queues are neither shared nor stolen from the parent PCI function.</div><div class='del'>-</div><div class='del'>-When a subfunction is RDMA capable, it has its own QP1, GID table and rdma</div><div class='del'>-resources neither shared nor stolen from the parent PCI function.</div><div class='del'>-</div><div class='del'>-A subfunction has a dedicated window in PCI BAR space that is not shared</div><div class='del'>-with ther other subfunctions or the parent PCI function. This ensures that all</div><div class='del'>-devices (netdev, rdma, vdpa etc.) of the subfunction accesses only assigned</div><div class='del'>-PCI BAR space.</div><div class='del'>-</div><div class='del'>-A Subfunction supports eswitch representation through which it supports tc</div><div class='del'>-offloads. The user configures eswitch to send/receive packets from/to</div><div class='del'>-the subfunction port.</div><div class='del'>-</div><div class='del'>-Subfunctions share PCI level resources such as PCI MSI-X IRQs with</div><div class='del'>-other subfunctions and/or with its parent PCI function.</div><div class='del'>-</div><div class='del'>-Example mlx5 software, system and device view::</div><div class='del'>-</div><div class='del'>-       _______</div><div class='del'>-      | admin |</div><div class='del'>-      | user  |----------</div><div class='del'>-      |_______|         |</div><div class='del'>-          |             |</div><div class='del'>-      ____|____       __|______            _________________</div><div class='del'>-     |         |     |         |          |                 |</div><div class='del'>-     | devlink |     | tc tool |          |    user         |</div><div class='del'>-     | tool    |     |_________|          | applications    |</div><div class='del'>-     |_________|         |                |_________________|</div><div class='del'>-           |             |                   |          |</div><div class='del'>-           |             |                   |          |         Userspace</div><div class='del'>- +---------|-------------|-------------------|----------|--------------------+</div><div class='del'>-           |             |           +----------+   +----------+   Kernel</div><div class='del'>-           |             |           |  netdev  |   | rdma dev |</div><div class='del'>-           |             |           +----------+   +----------+</div><div class='del'>-   (devlink port add/del |              ^               ^</div><div class='del'>-    port function set)   |              |               |</div><div class='del'>-           |             |              +---------------|</div><div class='del'>-      _____|___          |              |        _______|_______</div><div class='del'>-     |         |         |              |       | mlx5 class    |</div><div class='del'>-     | devlink |   +------------+       |       |   drivers     |</div><div class='del'>-     | kernel  |   | rep netdev |       |       |(mlx5_core,ib) |</div><div class='del'>-     |_________|   +------------+       |       |_______________|</div><div class='del'>-           |             |              |               ^</div><div class='del'>-   (devlink ops)         |              |          (probe/remove)</div><div class='del'>-  _________|________     |              |           ____|________</div><div class='del'>- | subfunction      |    |     +---------------+   | subfunction |</div><div class='del'>- | management driver|-----     | subfunction   |---|  driver     |</div><div class='del'>- | (mlx5_core)      |          | auxiliary dev |   | (mlx5_core) |</div><div class='del'>- |__________________|          +---------------+   |_____________|</div><div class='del'>-           |                                            ^</div><div class='del'>-  (sf add/del, vhca events)                             |</div><div class='del'>-           |                                      (device add/del)</div><div class='del'>-      _____|____                                    ____|________</div><div class='del'>-     |          |                                  | subfunction |</div><div class='del'>-     |  PCI NIC |---- activate/deactive events----&gt;| host driver |</div><div class='del'>-     |__________|                                  | (mlx5_core) |</div><div class='del'>-                                                   |_____________|</div><div class='del'>-</div><div class='del'>-Subfunction is created using devlink port interface.</div><div class='del'>-</div><div class='del'>-- Change device to switchdev mode::</div><div class='del'>-</div><div class='del'>-    $ devlink dev eswitch set pci/0000:06:00.0 mode switchdev</div><div class='del'>-</div><div class='del'>-- Add a devlink port of subfunction flaovur::</div><div class='del'>-</div><div class='del'>-    $ devlink port add pci/0000:06:00.0 flavour pcisf pfnum 0 sfnum 88</div><div class='del'>-    pci/0000:06:00.0/32768: type eth netdev eth6 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='del'>-      function:</div><div class='del'>-        hw_addr 00:00:00:00:00:00 state inactive opstate detached</div><div class='del'>-</div><div class='del'>-- Show a devlink port of the subfunction::</div><div class='del'>-</div><div class='del'>-    $ devlink port show pci/0000:06:00.0/32768</div><div class='del'>-    pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcisf pfnum 0 sfnum 88</div><div class='del'>-      function:</div><div class='del'>-        hw_addr 00:00:00:00:00:00 state inactive opstate detached</div><div class='del'>-</div><div class='del'>-- Delete a devlink port of subfunction after use::</div><div class='del'>-</div><div class='del'>-    $ devlink port del pci/0000:06:00.0/32768</div><div class='del'>-</div><div class='del'>-mlx5 function attributes</div><div class='del'>-========================</div><div class='del'>-The mlx5 driver provides a mechanism to setup PCI VF/SF function attributes in</div><div class='del'>-a unified way for SmartNIC and non-SmartNIC.</div><div class='del'>-</div><div class='del'>-This is supported only when the eswitch mode is set to switchdev. Port function</div><div class='del'>-configuration of the PCI VF/SF is supported through devlink eswitch port.</div><div class='del'>-</div><div class='del'>-Port function attributes should be set before PCI VF/SF is enumerated by the</div><div class='del'>-driver.</div><div class='del'>-</div><div class='del'>-MAC address setup</div><div class='del'>------------------</div><div class='del'>-mlx5 driver provides mechanism to setup the MAC address of the PCI VF/SF.</div><div class='del'>-</div><div class='del'>-The configured MAC address of the PCI VF/SF will be used by netdevice and rdma</div><div class='del'>-device created for the PCI VF/SF.</div><div class='del'>-</div><div class='del'>-- Get the MAC address of the VF identified by its unique devlink port index::</div><div class='del'>-</div><div class='del'>-    $ devlink port show pci/0000:06:00.0/2</div><div class='del'>-    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='del'>-      function:</div><div class='del'>-        hw_addr 00:00:00:00:00:00</div><div class='del'>-</div><div class='del'>-- Set the MAC address of the VF identified by its unique devlink port index::</div><div class='del'>-</div><div class='del'>-    $ devlink port function set pci/0000:06:00.0/2 hw_addr 00:11:22:33:44:55</div><div class='del'>-</div><div class='del'>-    $ devlink port show pci/0000:06:00.0/2</div><div class='del'>-    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='del'>-      function:</div><div class='del'>-        hw_addr 00:11:22:33:44:55</div><div class='del'>-</div><div class='del'>-- Get the MAC address of the SF identified by its unique devlink port index::</div><div class='del'>-</div><div class='del'>-    $ devlink port show pci/0000:06:00.0/32768</div><div class='del'>-    pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcisf pfnum 0 sfnum 88</div><div class='del'>-      function:</div><div class='del'>-        hw_addr 00:00:00:00:00:00</div><div class='del'>-</div><div class='del'>-- Set the MAC address of the VF identified by its unique devlink port index::</div><div class='del'>-</div><div class='del'>-    $ devlink port function set pci/0000:06:00.0/32768 hw_addr 00:00:00:00:88:88</div><div class='del'>-</div><div class='del'>-    $ devlink port show pci/0000:06:00.0/32768</div><div class='del'>-    pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcivf pfnum 0 sfnum 88</div><div class='del'>-      function:</div><div class='del'>-        hw_addr 00:00:00:00:88:88</div><div class='del'>-</div><div class='del'>-SF state setup</div><div class='del'>---------------</div><div class='del'>-To use the SF, the user must active the SF using the SF function state</div><div class='del'>-attribute.</div><div class='del'>-</div><div class='del'>-- Get the state of the SF identified by its unique devlink port index::</div><div class='del'>-</div><div class='del'>-   $ devlink port show ens2f0npf0sf88</div><div class='del'>-   pci/0000:06:00.0/32768: type eth netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='del'>-     function:</div><div class='del'>-       hw_addr 00:00:00:00:88:88 state inactive opstate detached</div><div class='del'>-</div><div class='del'>-- Activate the function and verify its state is active::</div><div class='del'>-</div><div class='del'>-   $ devlink port function set ens2f0npf0sf88 state active</div><div class='del'>-</div><div class='del'>-   $ devlink port show ens2f0npf0sf88</div><div class='del'>-   pci/0000:06:00.0/32768: type eth netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='del'>-     function:</div><div class='del'>-       hw_addr 00:00:00:00:88:88 state active opstate detached</div><div class='del'>-</div><div class='del'>-Upon function activation, the PF driver instance gets the event from the device</div><div class='del'>-that a particular SF was activated. It's the cue to put the device on bus, probe</div><div class='del'>-it and instantiate the devlink instance and class specific auxiliary devices</div><div class='del'>-for it.</div><div class='del'>-</div><div class='del'>-- Show the auxiliary device and port of the subfunction::</div><div class='del'>-</div><div class='del'>-    $ devlink dev show</div><div class='del'>-    devlink dev show auxiliary/mlx5_core.sf.4</div><div class='del'>-</div><div class='del'>-    $ devlink port show auxiliary/mlx5_core.sf.4/1</div><div class='del'>-    auxiliary/mlx5_core.sf.4/1: type eth netdev p0sf88 flavour virtual port 0 splittable false</div><div class='del'>-</div><div class='del'>-    $ rdma link show mlx5_0/1</div><div class='del'>-    link mlx5_0/1 state ACTIVE physical_state LINK_UP netdev p0sf88</div><div class='del'>-</div><div class='del'>-    $ rdma dev show</div><div class='del'>-    8: rocep6s0f1: node_type ca fw 16.29.0550 node_guid 248a:0703:00b3:d113 sys_image_guid 248a:0703:00b3:d112</div><div class='del'>-    13: mlx5_0: node_type ca fw 16.29.0550 node_guid 0000:00ff:fe00:8888 sys_image_guid 248a:0703:00b3:d112</div><div class='del'>-</div><div class='del'>-- Subfunction auxiliary device and class device hierarchy::</div><div class='del'>-</div><div class='del'>-                 mlx5_core.sf.4</div><div class='del'>-          (subfunction auxiliary device)</div><div class='del'>-                       /\</div><div class='del'>-                      /  \</div><div class='del'>-                     /    \</div><div class='del'>-                    /      \</div><div class='del'>-                   /        \</div><div class='del'>-      mlx5_core.eth.4     mlx5_core.rdma.4</div><div class='del'>-     (sf eth aux dev)     (sf rdma aux dev)</div><div class='del'>-         |                      |</div><div class='del'>-         |                      |</div><div class='del'>-      p0sf88                  mlx5_0</div><div class='del'>-     (sf netdev)          (sf rdma device)</div><div class='del'>-</div><div class='del'>-Additionally, the SF port also gets the event when the driver attaches to the</div><div class='del'>-auxiliary device of the subfunction. This results in changing the operational</div><div class='del'>-state of the function. This provides visiblity to the user to decide when is it</div><div class='del'>-safe to delete the SF port for graceful termination of the subfunction.</div><div class='del'>-</div><div class='del'>-- Show the SF port operational state::</div><div class='del'>-</div><div class='del'>-    $ devlink port show ens2f0npf0sf88</div><div class='del'>-    pci/0000:06:00.0/32768: type eth netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='del'>-      function:</div><div class='del'>-        hw_addr 00:00:00:00:88:88 state active opstate attached</div><div class='del'>-</div><div class='del'>-Devlink health reporters</div><div class='del'>-========================</div><div class='del'>-</div><div class='del'>-tx reporter</div><div class='del'>------------</div><div class='del'>-The tx reporter is responsible for reporting and recovering of the following two error scenarios:</div><div class='del'>-</div><div class='del'>-- TX timeout</div><div class='del'>-    Report on kernel tx timeout detection.</div><div class='del'>-    Recover by searching lost interrupts.</div><div class='del'>-- TX error completion</div><div class='del'>-    Report on error tx completion.</div><div class='del'>-    Recover by flushing the TX queue and reset it.</div><div class='del'>-</div><div class='del'>-TX reporter also support on demand diagnose callback, on which it provides</div><div class='del'>-real time information of its send queues status.</div><div class='del'>-</div><div class='del'>-User commands examples:</div><div class='del'>-</div><div class='del'>-- Diagnose send queues status::</div><div class='del'>-</div><div class='del'>-    $ devlink health diagnose pci/0000:82:00.0 reporter tx</div><div class='del'>-</div><div class='del'>-NOTE: This command has valid output only when interface is up, otherwise the command has empty output.</div><div class='del'>-</div><div class='del'>-- Show number of tx errors indicated, number of recover flows ended successfully,</div><div class='del'>-  is autorecover enabled and graceful period from last recover::</div><div class='del'>-</div><div class='del'>-    $ devlink health show pci/0000:82:00.0 reporter tx</div><div class='del'>-</div><div class='del'>-rx reporter</div><div class='del'>------------</div><div class='del'>-The rx reporter is responsible for reporting and recovering of the following two error scenarios:</div><div class='del'>-</div><div class='del'>-- RX queues initialization (population) timeout</div><div class='del'>-    RX queues descriptors population on ring initialization is done in</div><div class='del'>-    napi context via triggering an irq, in case of a failure to get</div><div class='del'>-    the minimum amount of descriptors, a timeout would occur and it</div><div class='del'>-    could be recoverable by polling the EQ (Event Queue).</div><div class='del'>-- RX completions with errors (reported by HW on interrupt context)</div><div class='del'>-    Report on rx completion error.</div><div class='del'>-    Recover (if needed) by flushing the related queue and reset it.</div><div class='del'>-</div><div class='del'>-RX reporter also supports on demand diagnose callback, on which it</div><div class='del'>-provides real time information of its receive queues status.</div><div class='del'>-</div><div class='del'>-- Diagnose rx queues status, and corresponding completion queue::</div><div class='del'>-</div><div class='del'>-    $ devlink health diagnose pci/0000:82:00.0 reporter rx</div><div class='del'>-</div><div class='del'>-NOTE: This command has valid output only when interface is up, otherwise the command has empty output.</div><div class='del'>-</div><div class='del'>-- Show number of rx errors indicated, number of recover flows ended successfully,</div><div class='del'>-  is autorecover enabled and graceful period from last recover::</div><div class='del'>-</div><div class='del'>-    $ devlink health show pci/0000:82:00.0 reporter rx</div><div class='del'>-</div><div class='del'>-fw reporter</div><div class='del'>------------</div><div class='del'>-The fw reporter implements diagnose and dump callbacks.</div><div class='del'>-It follows symptoms of fw error such as fw syndrome by triggering</div><div class='del'>-fw core dump and storing it into the dump buffer.</div><div class='del'>-The fw reporter diagnose command can be triggered any time by the user to check</div><div class='del'>-current fw status.</div><div class='del'>-</div><div class='del'>-User commands examples:</div><div class='del'>-</div><div class='del'>-- Check fw heath status::</div><div class='del'>-</div><div class='del'>-    $ devlink health diagnose pci/0000:82:00.0 reporter fw</div><div class='del'>-</div><div class='del'>-- Read FW core dump if already stored or trigger new one::</div><div class='del'>-</div><div class='del'>-    $ devlink health dump show pci/0000:82:00.0 reporter fw</div><div class='del'>-</div><div class='del'>-NOTE: This command can run only on the PF which has fw tracer ownership,</div><div class='del'>-running it on other PF or any VF will return "Operation not permitted".</div><div class='del'>-</div><div class='del'>-fw fatal reporter</div><div class='del'>------------------</div><div class='del'>-The fw fatal reporter implements dump and recover callbacks.</div><div class='del'>-It follows fatal errors indications by CR-space dump and recover flow.</div><div class='del'>-The CR-space dump uses vsc interface which is valid even if the FW command</div><div class='del'>-interface is not functional, which is the case in most FW fatal errors.</div><div class='del'>-The recover function runs recover flow which reloads the driver and triggers fw</div><div class='del'>-reset if needed.</div><div class='del'>-On firmware error, the health buffer is dumped into the dmesg. The log</div><div class='del'>-level is derived from the error's severity (given in health buffer).</div><div class='del'>-</div><div class='del'>-User commands examples:</div><div class='del'>-</div><div class='del'>-- Run fw recover flow manually::</div><div class='del'>-</div><div class='del'>-    $ devlink health recover pci/0000:82:00.0 reporter fw_fatal</div><div class='del'>-</div><div class='del'>-- Read FW CR-space dump if already strored or trigger new one::</div><div class='del'>-</div><div class='del'>-    $ devlink health dump show pci/0000:82:00.1 reporter fw_fatal</div><div class='del'>-</div><div class='del'>-NOTE: This command can run only on PF.</div><div class='del'>-</div><div class='del'>-mlx5 tracepoints</div><div class='del'>-================</div><div class='del'>-</div><div class='del'>-mlx5 driver provides internal trace points for tracking and debugging using</div><div class='del'>-kernel tracepoints interfaces (refer to Documentation/trace/ftrace.rst).</div><div class='del'>-</div><div class='del'>-For the list of support mlx5 events check /sys/kernel/debug/tracing/events/mlx5/</div><div class='del'>-</div><div class='del'>-tc and eswitch offloads tracepoints:</div><div class='del'>-</div><div class='del'>-- mlx5e_configure_flower: trace flower filter actions and cookies offloaded to mlx5::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5e_configure_flower &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    tc-6535  [019] ...1  2672.404466: mlx5e_configure_flower: cookie=0000000067874a55 actions= REDIRECT</div><div class='del'>-</div><div class='del'>-- mlx5e_delete_flower: trace flower filter actions and cookies deleted from mlx5::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5e_delete_flower &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    tc-6569  [010] .N.1  2686.379075: mlx5e_delete_flower: cookie=0000000067874a55 actions= NULL</div><div class='del'>-</div><div class='del'>-- mlx5e_stats_flower: trace flower stats request::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5e_stats_flower &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    tc-6546  [010] ...1  2679.704889: mlx5e_stats_flower: cookie=0000000060eb3d6a bytes=0 packets=0 lastused=4295560217</div><div class='del'>-</div><div class='del'>-- mlx5e_tc_update_neigh_used_value: trace tunnel rule neigh update value offloaded to mlx5::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5e_tc_update_neigh_used_value &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u48:4-8806  [009] ...1 55117.882428: mlx5e_tc_update_neigh_used_value: netdev: ens1f0 IPv4: 1.1.1.10 IPv6: ::ffff:1.1.1.10 neigh_used=1</div><div class='del'>-</div><div class='del'>-- mlx5e_rep_neigh_update: trace neigh update tasks scheduled due to neigh state change events::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5e_rep_neigh_update &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u48:7-2221  [009] ...1  1475.387435: mlx5e_rep_neigh_update: netdev: ens1f0 MAC: 24:8a:07:9a:17:9a IPv4: 1.1.1.10 IPv6: ::ffff:1.1.1.10 neigh_connected=1</div><div class='del'>-</div><div class='del'>-Bridge offloads tracepoints:</div><div class='del'>-</div><div class='del'>-- mlx5_esw_bridge_fdb_entry_init: trace bridge FDB entry offloaded to mlx5::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_bridge_fdb_entry_init &gt;&gt; set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u20:9-2217    [003] ...1   318.582243: mlx5_esw_bridge_fdb_entry_init: net_device=enp8s0f0_0 addr=e4:fd:05:08:00:02 vid=0 flags=0 used=0</div><div class='del'>-</div><div class='del'>-- mlx5_esw_bridge_fdb_entry_cleanup: trace bridge FDB entry deleted from mlx5::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_bridge_fdb_entry_cleanup &gt;&gt; set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    ip-2581    [005] ...1   318.629871: mlx5_esw_bridge_fdb_entry_cleanup: net_device=enp8s0f0_1 addr=e4:fd:05:08:00:03 vid=0 flags=0 used=16</div><div class='del'>-</div><div class='del'>-- mlx5_esw_bridge_fdb_entry_refresh: trace bridge FDB entry offload refreshed in</div><div class='del'>-  mlx5::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_bridge_fdb_entry_refresh &gt;&gt; set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u20:8-3849    [003] ...1       466716: mlx5_esw_bridge_fdb_entry_refresh: net_device=enp8s0f0_0 addr=e4:fd:05:08:00:02 vid=3 flags=0 used=0</div><div class='del'>-</div><div class='del'>-- mlx5_esw_bridge_vlan_create: trace bridge VLAN object add on mlx5</div><div class='del'>-  representor::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_bridge_vlan_create &gt;&gt; set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    ip-2560    [007] ...1   318.460258: mlx5_esw_bridge_vlan_create: vid=1 flags=6</div><div class='del'>-</div><div class='del'>-- mlx5_esw_bridge_vlan_cleanup: trace bridge VLAN object delete from mlx5</div><div class='del'>-  representor::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_bridge_vlan_cleanup &gt;&gt; set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    bridge-2582    [007] ...1   318.653496: mlx5_esw_bridge_vlan_cleanup: vid=2 flags=8</div><div class='del'>-</div><div class='del'>-- mlx5_esw_bridge_vport_init: trace mlx5 vport assigned with bridge upper</div><div class='del'>-  device::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_bridge_vport_init &gt;&gt; set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    ip-2560    [007] ...1   318.458915: mlx5_esw_bridge_vport_init: vport_num=1</div><div class='del'>-</div><div class='del'>-- mlx5_esw_bridge_vport_cleanup: trace mlx5 vport removed from bridge upper</div><div class='del'>-  device::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_bridge_vport_cleanup &gt;&gt; set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    ip-5387    [000] ...1       573713: mlx5_esw_bridge_vport_cleanup: vport_num=1</div><div class='del'>-</div><div class='del'>-Eswitch QoS tracepoints:</div><div class='del'>-</div><div class='del'>-- mlx5_esw_vport_qos_create: trace creation of transmit scheduler arbiter for vport::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_vport_qos_create &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    &lt;...&gt;-23496   [018] .... 73136.838831: mlx5_esw_vport_qos_create: (0000:82:00.0) vport=2 tsar_ix=4 bw_share=0, max_rate=0 group=000000007b576bb3</div><div class='del'>-</div><div class='del'>-- mlx5_esw_vport_qos_config: trace configuration of transmit scheduler arbiter for vport::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_vport_qos_config &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    &lt;...&gt;-26548   [023] .... 75754.223823: mlx5_esw_vport_qos_config: (0000:82:00.0) vport=1 tsar_ix=3 bw_share=34, max_rate=10000 group=000000007b576bb3</div><div class='del'>-</div><div class='del'>-- mlx5_esw_vport_qos_destroy: trace deletion of transmit scheduler arbiter for vport::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_vport_qos_destroy &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    &lt;...&gt;-27418   [004] .... 76546.680901: mlx5_esw_vport_qos_destroy: (0000:82:00.0) vport=1 tsar_ix=3</div><div class='del'>-</div><div class='del'>-- mlx5_esw_group_qos_create: trace creation of transmit scheduler arbiter for rate group::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_group_qos_create &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    &lt;...&gt;-26578   [008] .... 75776.022112: mlx5_esw_group_qos_create: (0000:82:00.0) group=000000008dac63ea tsar_ix=5</div><div class='del'>-</div><div class='del'>-- mlx5_esw_group_qos_config: trace configuration of transmit scheduler arbiter for rate group::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_group_qos_config &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    &lt;...&gt;-27303   [020] .... 76461.455356: mlx5_esw_group_qos_config: (0000:82:00.0) group=000000008dac63ea tsar_ix=5 bw_share=100 max_rate=20000</div><div class='del'>-</div><div class='del'>-- mlx5_esw_group_qos_destroy: trace deletion of transmit scheduler arbiter for group::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_esw_group_qos_destroy &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    &lt;...&gt;-27418   [006] .... 76547.187258: mlx5_esw_group_qos_destroy: (0000:82:00.0) group=000000007b576bb3 tsar_ix=1</div><div class='del'>-</div><div class='del'>-SF tracepoints:</div><div class='del'>-</div><div class='del'>-- mlx5_sf_add: trace addition of the SF port::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_add &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    devlink-9363    [031] ..... 24610.188722: mlx5_sf_add: (0000:06:00.0) port_index=32768 controller=0 hw_id=0x8000 sfnum=88</div><div class='del'>-</div><div class='del'>-- mlx5_sf_free: trace freeing of the SF port::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_free &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    devlink-9830    [038] ..... 26300.404749: mlx5_sf_free: (0000:06:00.0) port_index=32768 controller=0 hw_id=0x8000</div><div class='del'>-</div><div class='del'>-- mlx5_sf_hwc_alloc: trace allocating of the hardware SF context::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_hwc_alloc &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    devlink-9775    [031] ..... 26296.385259: mlx5_sf_hwc_alloc: (0000:06:00.0) controller=0 hw_id=0x8000 sfnum=88</div><div class='del'>-</div><div class='del'>-- mlx5_sf_hwc_free: trace freeing of the hardware SF context::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_hwc_free &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u128:3-9093    [046] ..... 24625.365771: mlx5_sf_hwc_free: (0000:06:00.0) hw_id=0x8000</div><div class='del'>-</div><div class='del'>-- mlx5_sf_hwc_deferred_free : trace deferred freeing of the hardware SF context::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_hwc_deferred_free &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    devlink-9519    [046] ..... 24624.400271: mlx5_sf_hwc_deferred_free: (0000:06:00.0) hw_id=0x8000</div><div class='del'>-</div><div class='del'>-- mlx5_sf_vhca_event: trace SF vhca event and state::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_vhca_event &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u128:3-9093    [046] ..... 24625.365525: mlx5_sf_vhca_event: (0000:06:00.0) hw_id=0x8000 sfnum=88 vhca_state=1</div><div class='del'>-</div><div class='del'>-- mlx5_sf_dev_add : trace SF device add event::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_dev_add&gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u128:3-9093    [000] ..... 24616.524495: mlx5_sf_dev_add: (0000:06:00.0) sfdev=00000000fc5d96fd aux_id=4 hw_id=0x8000 sfnum=88</div><div class='del'>-</div><div class='del'>-- mlx5_sf_dev_del : trace SF device delete event::</div><div class='del'>-</div><div class='del'>-    $ echo mlx5:mlx5_sf_dev_del &gt;&gt; /sys/kernel/debug/tracing/set_event</div><div class='del'>-    $ cat /sys/kernel/debug/tracing/trace</div><div class='del'>-    ...</div><div class='del'>-    kworker/u128:3-9093    [044] ..... 24624.400749: mlx5_sf_dev_del: (0000:06:00.0) sfdev=00000000fc5d96fd aux_id=4 hw_id=0x8000 sfnum=88</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst<br/>new file mode 100644<br/>index 000000000000..6b2d1fe74ecf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/counters.rst</a></div><div class='hunk'>@@ -0,0 +1,1276 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+================</div><div class='add'>+Ethtool counters</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+:Copyright: |copy| 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+Contents</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+- `Overview`_</div><div class='add'>+- `Groups`_</div><div class='add'>+- `Types`_</div><div class='add'>+- `Descriptions`_</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+There are several counter groups based on where the counter is being counted. In</div><div class='add'>+addition, each group of counters may have different counter types.</div><div class='add'>+</div><div class='add'>+These counter groups are based on which component in a networking setup,</div><div class='add'>+illustrated below, that they describe::</div><div class='add'>+</div><div class='add'>+                                                  ----------------------------------------</div><div class='add'>+                                                  |                                      |</div><div class='add'>+    ----------------------------------------    ---------------------------------------- |</div><div class='add'>+    |              Hypervisor              |    |                  VM                  | |</div><div class='add'>+    |                                      |    |                                      | |</div><div class='add'>+    | -------------------  --------------- |    | -------------------  --------------- | |</div><div class='add'>+    | | Ethernet driver |  | RDMA driver | |    | | Ethernet driver |  | RDMA driver | | |</div><div class='add'>+    | -------------------  --------------- |    | -------------------  --------------- | |</div><div class='add'>+    |           |                 |        |    |           |                 |        | |</div><div class='add'>+    |           -------------------        |    |           -------------------        | |</div><div class='add'>+    |                   |                  |    |                   |                  |--</div><div class='add'>+    ----------------------------------------    ----------------------------------------</div><div class='add'>+                        |                                           |</div><div class='add'>+            -------------               -----------------------------</div><div class='add'>+            |                           |</div><div class='add'>+         ------                      ------ ------ ------         ------      ------      ------</div><div class='add'>+    -----| PF |----------------------| VF |-| VF |-| VF |-----  --| PF |--- --| PF |--- --| PF |---</div><div class='add'>+    |    ------                      ------ ------ ------    |  | ------  | | ------  | | ------  |</div><div class='add'>+    |                                                        |  |         | |         | |         |</div><div class='add'>+    |                                                        |  |         | |         | |         |</div><div class='add'>+    |                                                        |  |         | |         | |         |</div><div class='add'>+    | eSwitch                                                |  | eSwitch | | eSwitch | | eSwitch |</div><div class='add'>+    ----------------------------------------------------------  ----------- ----------- -----------</div><div class='add'>+               -------------------------------------------------------------------------------</div><div class='add'>+               |                                                                             |</div><div class='add'>+               |                                                                             |</div><div class='add'>+               | Uplink (no counters)                                                        |</div><div class='add'>+               -------------------------------------------------------------------------------</div><div class='add'>+                       ---------------------------------------------------------------</div><div class='add'>+                       |                                                             |</div><div class='add'>+                       |                                                             |</div><div class='add'>+                       | MPFS (no counters)                                          |</div><div class='add'>+                       ---------------------------------------------------------------</div><div class='add'>+                                                     |</div><div class='add'>+                                                     |</div><div class='add'>+                                                     | Port</div><div class='add'>+</div><div class='add'>+Groups</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+Ring</div><div class='add'>+  Software counters populated by the driver stack.</div><div class='add'>+</div><div class='add'>+Netdev</div><div class='add'>+  An aggregation of software ring counters.</div><div class='add'>+</div><div class='add'>+vPort counters</div><div class='add'>+  Traffic counters and drops due to steering or no buffers. May indicate issues</div><div class='add'>+  with NIC. These counters include Ethernet traffic counters (including Raw</div><div class='add'>+  Ethernet) and RDMA/RoCE traffic counters.</div><div class='add'>+</div><div class='add'>+Physical port counters</div><div class='add'>+  Counters that collect statistics about the PFs and VFs. May indicate issues</div><div class='add'>+  with NIC, link, or network. This measuring point holds information on</div><div class='add'>+  standardized counters like IEEE 802.3, RFC2863, RFC 2819, RFC 3635 and</div><div class='add'>+  additional counters like flow control, FEC and more. Physical port counters</div><div class='add'>+  are not exposed to virtual machines.</div><div class='add'>+</div><div class='add'>+Priority Port Counters</div><div class='add'>+  A set of the physical port counters, per priority per port.</div><div class='add'>+</div><div class='add'>+Types</div><div class='add'>+=====</div><div class='add'>+</div><div class='add'>+Counters are divided into three types.</div><div class='add'>+</div><div class='add'>+Traffic Informative Counters</div><div class='add'>+  Counters which count traffic. These counters can be used for load estimation</div><div class='add'>+  or for general debug.</div><div class='add'>+</div><div class='add'>+Traffic Acceleration Counters</div><div class='add'>+  Counters which count traffic that was accelerated by Mellanox driver or by</div><div class='add'>+  hardware. The counters are an additional layer to the informative counter set,</div><div class='add'>+  and the same traffic is counted in both informative and acceleration counters.</div><div class='add'>+</div><div class='add'>+.. [#accel] Traffic acceleration counter.</div><div class='add'>+</div><div class='add'>+Error Counters</div><div class='add'>+  Increment of these counters might indicate a problem. Each of these counters</div><div class='add'>+  has an explanation and correction action.</div><div class='add'>+</div><div class='add'>+Statistic can be fetched via the `ip link` or `ethtool` commands. `ethtool`</div><div class='add'>+provides more detailed information.::</div><div class='add'>+</div><div class='add'>+    ip –s link show &lt;if-name&gt;</div><div class='add'>+    ethtool -S &lt;if-name&gt;</div><div class='add'>+</div><div class='add'>+Descriptions</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+XSK, PTP, and QoS counters that are similar to counters defined previously will</div><div class='add'>+not be separately listed. For example, `ptp_tx[i]_packets` will not be</div><div class='add'>+explicitly documented since `tx[i]_packets` describes the behavior of both</div><div class='add'>+counters, except `ptp_tx[i]_packets` is only counted when precision time</div><div class='add'>+protocol is used.</div><div class='add'>+</div><div class='add'>+Ring / Netdev Counter</div><div class='add'>+----------------------------</div><div class='add'>+The following counters are available per ring or software port.</div><div class='add'>+</div><div class='add'>+These counters provide information on the amount of traffic that was accelerated</div><div class='add'>+by the NIC. The counters are counting the accelerated traffic in addition to the</div><div class='add'>+standard counters which counts it (i.e. accelerated traffic is counted twice).</div><div class='add'>+</div><div class='add'>+The counter names in the table below refers to both ring and port counters. The</div><div class='add'>+notation for ring counters includes the [i] index without the braces. The</div><div class='add'>+notation for port counters doesn't include the [i]. A counter name</div><div class='add'>+`rx[i]_packets` will be printed as `rx0_packets` for ring 0 and `rx_packets` for</div><div class='add'>+the software port.</div><div class='add'>+</div><div class='add'>+.. flat-table:: Ring / Software Port Counter Table</div><div class='add'>+   :widths: 2 3 1</div><div class='add'>+</div><div class='add'>+   * - Counter</div><div class='add'>+     - Description</div><div class='add'>+     - Type</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_packets`</div><div class='add'>+     - The number of packets received on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_bytes`</div><div class='add'>+     - The number of bytes received on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_packets`</div><div class='add'>+     - The number of packets transmitted on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_bytes`</div><div class='add'>+     - The number of bytes transmitted on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_recover`</div><div class='add'>+     - The number of times the SQ was recovered.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_cqes`</div><div class='add'>+     - Number of CQEs events on SQ issued on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_cqe_err`</div><div class='add'>+     - The number of error CQEs encountered on the SQ for ring i.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tso_packets`</div><div class='add'>+     - The number of TSO packets transmitted on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tso_bytes`</div><div class='add'>+     - The number of TSO bytes transmitted on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tso_inner_packets`</div><div class='add'>+     - The number of TSO packets which are indicated to be carry internal</div><div class='add'>+       encapsulation transmitted on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tso_inner_bytes`</div><div class='add'>+     - The number of TSO bytes which are indicated to be carry internal</div><div class='add'>+       encapsulation transmitted on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_gro_packets`</div><div class='add'>+     - Number of received packets processed using hardware-accelerated GRO. The</div><div class='add'>+       number of hardware GRO offloaded packets received on ring i.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_gro_bytes`</div><div class='add'>+     - Number of received bytes processed using hardware-accelerated GRO. The</div><div class='add'>+       number of hardware GRO offloaded bytes received on ring i.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_gro_skbs`</div><div class='add'>+     - The number of receive SKBs constructed while performing</div><div class='add'>+       hardware-accelerated GRO.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_gro_match_packets`</div><div class='add'>+     - Number of received packets processed using hardware-accelerated GRO that</div><div class='add'>+       met the flow table match criteria.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_gro_large_hds`</div><div class='add'>+     - Number of receive packets using hardware-accelerated GRO that have large</div><div class='add'>+       headers that require additional memory to be allocated.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_lro_packets`</div><div class='add'>+     - The number of LRO packets received on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_lro_bytes`</div><div class='add'>+     - The number of LRO bytes received on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_ecn_mark`</div><div class='add'>+     - The number of received packets where the ECN mark was turned on.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_oversize_pkts_buffer`</div><div class='add'>+     - The number of dropped received packets due to length which arrived to RQ</div><div class='add'>+       and exceed software buffer size allocated by the device for incoming</div><div class='add'>+       traffic. It might imply that the device MTU is larger than the software</div><div class='add'>+       buffers size.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_oversize_pkts_sw_drop`</div><div class='add'>+     - Number of received packets dropped in software because the CQE data is</div><div class='add'>+       larger than the MTU size.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_csum_unnecessary`</div><div class='add'>+     - Packets received with a `CHECKSUM_UNNECESSARY` on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_csum_unnecessary_inner`</div><div class='add'>+     - Packets received with inner encapsulation with a `CHECKSUM_UNNECESSARY`</div><div class='add'>+       on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_csum_none`</div><div class='add'>+     - Packets received with a `CHECKSUM_NONE` on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_csum_complete`</div><div class='add'>+     - Packets received with a `CHECKSUM_COMPLETE` on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_csum_complete_tail`</div><div class='add'>+     - Number of received packets that had checksum calculation computed,</div><div class='add'>+       potentially needed padding, and were able to do so with</div><div class='add'>+       `CHECKSUM_PARTIAL`.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_csum_complete_tail_slow`</div><div class='add'>+     - Number of received packets that need padding larger than eight bytes for</div><div class='add'>+       the checksum.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_csum_partial`</div><div class='add'>+     - Packets transmitted with a `CHECKSUM_PARTIAL` on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_csum_partial_inner`</div><div class='add'>+     - Packets transmitted with inner encapsulation with a `CHECKSUM_PARTIAL` on</div><div class='add'>+       ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_csum_none`</div><div class='add'>+     - Packets transmitted with no hardware checksum acceleration on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_stopped` / `tx_queue_stopped` [#ring_global]_</div><div class='add'>+     - Events where SQ was full on ring i. If this counter is increased, check</div><div class='add'>+       the amount of buffers allocated for transmission.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_wake` / `tx_queue_wake` [#ring_global]_</div><div class='add'>+     - Events where SQ was full and has become not full on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_dropped` / `tx_queue_dropped` [#ring_global]_</div><div class='add'>+     - Packets transmitted that were dropped due to DMA mapping failure on</div><div class='add'>+       ring i. If this counter is increased, check the amount of buffers</div><div class='add'>+       allocated for transmission.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_nop`</div><div class='add'>+     - The number of nop WQEs (empty WQEs) inserted to the SQ (related to</div><div class='add'>+       ring i) due to the reach of the end of the cyclic buffer. When reaching</div><div class='add'>+       near to the end of cyclic buffer the driver may add those empty WQEs to</div><div class='add'>+       avoid handling a state the a WQE start in the end of the queue and ends</div><div class='add'>+       in the beginning of the queue. This is a normal condition.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_added_vlan_packets`</div><div class='add'>+     - The number of packets sent where vlan tag insertion was offloaded to the</div><div class='add'>+       hardware.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_removed_vlan_packets`</div><div class='add'>+     - The number of packets received where vlan tag stripping was offloaded to</div><div class='add'>+       the hardware.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_wqe_err`</div><div class='add'>+     - The number of wrong opcodes received on ring i.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_mpwqe_frag`</div><div class='add'>+     - The number of WQEs that failed to allocate compound page and hence</div><div class='add'>+       fragmented MPWQE’s (Multi Packet WQEs) were used on ring i. If this</div><div class='add'>+       counter raise, it may suggest that there is no enough memory for large</div><div class='add'>+       pages, the driver allocated fragmented pages. This is not abnormal</div><div class='add'>+       condition.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_mpwqe_filler_cqes`</div><div class='add'>+     - The number of filler CQEs events that were issued on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_mpwqe_filler_strides`</div><div class='add'>+     - The number of strides consumed by filler CQEs on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_mpwqe_blks`</div><div class='add'>+     - The number of send blocks processed from Multi-Packet WQEs (mpwqe).</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_mpwqe_pkts`</div><div class='add'>+     - The number of send packets processed from Multi-Packet WQEs (mpwqe).</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_cqe_compress_blks`</div><div class='add'>+     - The number of receive blocks with CQE compression on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_cqe_compress_pkts`</div><div class='add'>+     - The number of receive packets with CQE compression on ring i [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_arfs_err`</div><div class='add'>+     - Number of flow rules that failed to be added to the flow table.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_recover`</div><div class='add'>+     - The number of times the RQ was recovered.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xmit_more`</div><div class='add'>+     - The number of packets sent with `xmit_more` indication set on the skbuff</div><div class='add'>+       (no doorbell).</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `ch[i]_poll`</div><div class='add'>+     - The number of invocations of NAPI poll of channel i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `ch[i]_arm`</div><div class='add'>+     - The number of times the NAPI poll function completed and armed the</div><div class='add'>+       completion queues on channel i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `ch[i]_aff_change`</div><div class='add'>+     - The number of times the NAPI poll function explicitly stopped execution</div><div class='add'>+       on a CPU due to a change in affinity, on channel i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `ch[i]_events`</div><div class='add'>+     - The number of hard interrupt events on the completion queues of channel i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `ch[i]_eq_rearm`</div><div class='add'>+     - The number of times the EQ was recovered.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `ch[i]_force_irq`</div><div class='add'>+     - Number of times NAPI is triggered by XSK wakeups by posting a NOP to</div><div class='add'>+       ICOSQ.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_congst_umr`</div><div class='add'>+     - The number of times an outstanding UMR request is delayed due to</div><div class='add'>+       congestion, on ring i.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_alloc_fast`</div><div class='add'>+     - Number of successful fast path allocations.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_alloc_slow`</div><div class='add'>+     - Number of slow path order-0 allocations.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_alloc_slow_high_order`</div><div class='add'>+     - Number of slow path high order allocations.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_alloc_empty`</div><div class='add'>+     - Counter is incremented when ptr ring is empty, so a slow path allocation</div><div class='add'>+       was forced.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_alloc_refill`</div><div class='add'>+     - Counter is incremented when an allocation which triggered a refill of the</div><div class='add'>+       cache.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_alloc_waive`</div><div class='add'>+     - Counter is incremented when pages obtained from the ptr ring that cannot</div><div class='add'>+       be added to the cache due to a NUMA mismatch.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_recycle_cached`</div><div class='add'>+     - Counter is incremented when recycling placed page in the page pool cache.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_recycle_cache_full`</div><div class='add'>+     - Counter is incremented when page pool cache was full.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_recycle_ring`</div><div class='add'>+     - Counter is incremented when page placed into the ptr ring.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_recycle_ring_full`</div><div class='add'>+     - Counter is incremented when page released from page pool because the ptr</div><div class='add'>+       ring was full.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pp_recycle_released_ref`</div><div class='add'>+     - Counter is incremented when page released (and not recycled) because</div><div class='add'>+       refcnt &gt; 1.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xsk_buff_alloc_err`</div><div class='add'>+     - The number of times allocating an skb or XSK buffer failed in the XSK RQ</div><div class='add'>+       context.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xsk_arfs_err`</div><div class='add'>+     - aRFS (accelerated Receive Flow Steering) does not occur in the XSK RQ</div><div class='add'>+       context, so this counter should never increment.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_tx_xmit`</div><div class='add'>+     - The number of packets forwarded back to the port due to XDP program</div><div class='add'>+       `XDP_TX` action (bouncing). these packets are not counted by other</div><div class='add'>+       software counters. These packets are counted by physical port and vPort</div><div class='add'>+       counters.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_tx_mpwqe`</div><div class='add'>+     - Number of multi-packet WQEs transmitted by the netdev and `XDP_TX`-ed by</div><div class='add'>+       the netdev during the RQ context.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_tx_inlnw`</div><div class='add'>+     - Number of WQE data segments transmitted where the data could be inlined</div><div class='add'>+       in the WQE and then `XDP_TX`-ed during the RQ context.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_tx_nops`</div><div class='add'>+     - Number of NOP WQEBBs (WQE building blocks) received posted to the XDP SQ.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_tx_full`</div><div class='add'>+     - The number of packets that should have been forwarded back to the port</div><div class='add'>+       due to `XDP_TX` action but were dropped due to full tx queue. These packets</div><div class='add'>+       are not counted by other software counters. These packets are counted by</div><div class='add'>+       physical port and vPort counters. You may open more rx queues and spread</div><div class='add'>+       traffic rx over all queues and/or increase rx ring size.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_tx_err`</div><div class='add'>+     - The number of times an `XDP_TX` error such as frame too long and frame</div><div class='add'>+       too short occurred on `XDP_TX` ring of RX ring.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_tx_cqes` / `rx_xdp_tx_cqe` [#ring_global]_</div><div class='add'>+     - The number of completions received on the CQ of the `XDP_TX` ring.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_drop`</div><div class='add'>+     - The number of packets dropped due to XDP program `XDP_DROP` action. these</div><div class='add'>+       packets are not counted by other software counters. These packets are</div><div class='add'>+       counted by physical port and vPort counters.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_xdp_redirect`</div><div class='add'>+     - The number of times an XDP redirect action was triggered on ring i.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xdp_xmit`</div><div class='add'>+     - The number of packets redirected to the interface(due to XDP redirect).</div><div class='add'>+       These packets are not counted by other software counters. These packets</div><div class='add'>+       are counted by physical port and vPort counters.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xdp_full`</div><div class='add'>+     - The number of packets redirected to the interface(due to XDP redirect),</div><div class='add'>+       but were dropped due to full tx queue. these packets are not counted by</div><div class='add'>+       other software counters. you may enlarge tx queues.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xdp_mpwqe`</div><div class='add'>+     - Number of multi-packet WQEs offloaded onto the NIC that were</div><div class='add'>+       `XDP_REDIRECT`-ed from other netdevs.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xdp_inlnw`</div><div class='add'>+     - Number of WQE data segments where the data could be inlined in the WQE</div><div class='add'>+       where the data segments were `XDP_REDIRECT`-ed from other netdevs.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xdp_nops`</div><div class='add'>+     - Number of NOP WQEBBs (WQE building blocks) posted to the SQ that were</div><div class='add'>+       `XDP_REDIRECT`-ed from other netdevs.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xdp_err`</div><div class='add'>+     - The number of packets redirected to the interface(due to XDP redirect)</div><div class='add'>+       but were dropped due to error such as frame too long and frame too short.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xdp_cqes`</div><div class='add'>+     - The number of completions received for packets redirected to the</div><div class='add'>+       interface(due to XDP redirect) on the CQ.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xsk_xmit`</div><div class='add'>+     - The number of packets transmitted using XSK zerocopy functionality.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xsk_mpwqe`</div><div class='add'>+     - Number of multi-packet WQEs offloaded onto the NIC that were</div><div class='add'>+       `XDP_REDIRECT`-ed from other netdevs.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xsk_inlnw`</div><div class='add'>+     - Number of WQE data segments where the data could be inlined in the WQE</div><div class='add'>+       that are transmitted using XSK zerocopy.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xsk_full`</div><div class='add'>+     - Number of times doorbell is rung in XSK zerocopy mode when SQ is full.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xsk_err`</div><div class='add'>+     - Number of errors that occurred in XSK zerocopy mode such as if the data</div><div class='add'>+       size is larger than the MTU size.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_xsk_cqes`</div><div class='add'>+     - Number of CQEs processed in XSK zerocopy mode.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_tls_ctx`</div><div class='add'>+     - Number of TLS TX HW offload contexts added to device for encryption.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_tls_del`</div><div class='add'>+     - Number of TLS TX HW offload contexts removed from device (connection</div><div class='add'>+       closed).</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_tls_pool_alloc`</div><div class='add'>+     - Number of times a unit of work is successfully allocated in the TLS HW</div><div class='add'>+       offload pool.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_tls_pool_free`</div><div class='add'>+     - Number of times a unit of work is freed in the TLS HW offload pool.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx_tls_ctx`</div><div class='add'>+     - Number of TLS RX HW offload contexts added to device for decryption.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx_tls_del`</div><div class='add'>+     - Number of TLS RX HW offload contexts deleted from device (connection has</div><div class='add'>+       finished).</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_decrypted_packets`</div><div class='add'>+     - Number of successfully decrypted RX packets which were part of a TLS</div><div class='add'>+       stream.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_decrypted_bytes`</div><div class='add'>+     - Number of TLS payload bytes in RX packets which were successfully</div><div class='add'>+       decrypted.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_resync_req_pkt`</div><div class='add'>+     - Number of received TLS packets with a resync request.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_resync_req_start`</div><div class='add'>+     - Number of times the TLS async resync request was started.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_resync_req_end`</div><div class='add'>+     - Number of times the TLS async resync request properly ended with</div><div class='add'>+       providing the HW tracked tcp-seq.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_resync_req_skip`</div><div class='add'>+     - Number of times the TLS async resync request procedure was started but</div><div class='add'>+       not properly ended.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_resync_res_ok`</div><div class='add'>+     - Number of times the TLS resync response call to the driver was</div><div class='add'>+       successfully handled.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_resync_res_retry`</div><div class='add'>+     - Number of times the TLS resync response call to the driver was</div><div class='add'>+       reattempted when ICOSQ is full.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_resync_res_skip`</div><div class='add'>+     - Number of times the TLS resync response call to the driver was terminated</div><div class='add'>+       unsuccessfully.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_tls_err`</div><div class='add'>+     - Number of times when CQE TLS offload was problematic.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_encrypted_packets`</div><div class='add'>+     - The number of send packets that are TLS encrypted by the kernel.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_encrypted_bytes`</div><div class='add'>+     - The number of send bytes that are TLS encrypted by the kernel.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_ooo`</div><div class='add'>+     - Number of times out of order TLS SQE fragments were handled on ring i.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_dump_packets`</div><div class='add'>+     - Number of TLS decrypted packets copied over from NIC over DMA.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_dump_bytes`</div><div class='add'>+     - Number of TLS decrypted bytes copied over from NIC over DMA.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_resync_bytes`</div><div class='add'>+     - Number of TLS bytes requested to be resynchronized in order to be</div><div class='add'>+       decrypted.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_skip_no_sync_data`</div><div class='add'>+     - Number of TLS send data that can safely be skipped / do not need to be</div><div class='add'>+       decrypted.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx[i]_tls_drop_no_sync_data`</div><div class='add'>+     - Number of TLS send data that were dropped due to retransmission of TLS</div><div class='add'>+       data.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `ptp_cq[i]_abort`</div><div class='add'>+     - Number of times a CQE has to be skipped in precision time protocol due to</div><div class='add'>+       a skew between the port timestamp and CQE timestamp being greater than</div><div class='add'>+       128 seconds.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `ptp_cq[i]_abort_abs_diff_ns`</div><div class='add'>+     - Accumulation of time differences between the port timestamp and CQE</div><div class='add'>+       timestamp when the difference is greater than 128 seconds in precision</div><div class='add'>+       time protocol.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+.. [#ring_global] The corresponding ring and global counters do not share the</div><div class='add'>+                  same name (i.e. do not follow the common naming scheme).</div><div class='add'>+</div><div class='add'>+vPort Counters</div><div class='add'>+--------------</div><div class='add'>+Counters on the NIC port that is connected to a eSwitch.</div><div class='add'>+</div><div class='add'>+.. flat-table:: vPort Counter Table</div><div class='add'>+   :widths: 2 3 1</div><div class='add'>+</div><div class='add'>+   * - Counter</div><div class='add'>+     - Description</div><div class='add'>+     - Type</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_unicast_packets`</div><div class='add'>+     - Unicast packets received, steered to a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_unicast_bytes`</div><div class='add'>+     - Unicast bytes received, steered to a port including Raw Ethernet QP/DPDK</div><div class='add'>+       traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_unicast_packets`</div><div class='add'>+     - Unicast packets transmitted, steered from a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_unicast_bytes`</div><div class='add'>+     - Unicast bytes transmitted, steered from a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_multicast_packets`</div><div class='add'>+     - Multicast packets received, steered to a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_multicast_bytes`</div><div class='add'>+     - Multicast bytes received, steered to a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_multicast_packets`</div><div class='add'>+     - Multicast packets transmitted, steered from a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_multicast_bytes`</div><div class='add'>+     - Multicast bytes transmitted, steered from a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_broadcast_packets`</div><div class='add'>+     - Broadcast packets received, steered to a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_broadcast_bytes`</div><div class='add'>+     - Broadcast bytes received, steered to a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_broadcast_packets`</div><div class='add'>+     - Broadcast packets transmitted, steered from a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_broadcast_bytes`</div><div class='add'>+     - Broadcast bytes transmitted, steered from a port including Raw Ethernet</div><div class='add'>+       QP/DPDK traffic, excluding RDMA traffic.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_rdma_unicast_packets`</div><div class='add'>+     - RDMA unicast packets received, steered to a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_rdma_unicast_bytes`</div><div class='add'>+     - RDMA unicast bytes received, steered to a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_rdma_unicast_packets`</div><div class='add'>+     - RDMA unicast packets transmitted, steered from a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_rdma_unicast_bytes`</div><div class='add'>+     - RDMA unicast bytes transmitted, steered from a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_rdma_multicast_packets`</div><div class='add'>+     - RDMA multicast packets received, steered to a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx_vport_rdma_multicast_bytes`</div><div class='add'>+     - RDMA multicast bytes received, steered to a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_rdma_multicast_packets`</div><div class='add'>+     - RDMA multicast packets transmitted, steered from a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `tx_vport_rdma_multicast_bytes`</div><div class='add'>+     - RDMA multicast bytes transmitted, steered from a port (counters counts</div><div class='add'>+       RoCE/UD/RC traffic) [#accel]_.</div><div class='add'>+     - Acceleration</div><div class='add'>+</div><div class='add'>+   * - `rx_steer_missed_packets`</div><div class='add'>+     - Number of packets that was received by the NIC, however was discarded</div><div class='add'>+       because it did not match any flow in the NIC flow table.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_packets`</div><div class='add'>+     - Representor only: packets received, that were handled by the hypervisor.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_bytes`</div><div class='add'>+     - Representor only: bytes received, that were handled by the hypervisor.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_packets`</div><div class='add'>+     - Representor only: packets transmitted, that were handled by the</div><div class='add'>+       hypervisor.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_bytes`</div><div class='add'>+     - Representor only: bytes transmitted, that were handled by the hypervisor.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `dev_internal_queue_oob`</div><div class='add'>+     - The number of dropped packets due to lack of receive WQEs for an internal</div><div class='add'>+       device RQ.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+Physical Port Counters</div><div class='add'>+----------------------</div><div class='add'>+The physical port counters are the counters on the external port connecting the</div><div class='add'>+adapter to the network. This measuring point holds information on standardized</div><div class='add'>+counters like IEEE 802.3, RFC2863, RFC 2819, RFC 3635 and additional counters</div><div class='add'>+like flow control, FEC and more.</div><div class='add'>+</div><div class='add'>+.. flat-table:: Physical Port Counter Table</div><div class='add'>+   :widths: 2 3 1</div><div class='add'>+</div><div class='add'>+   * - Counter</div><div class='add'>+     - Description</div><div class='add'>+     - Type</div><div class='add'>+</div><div class='add'>+   * - `rx_packets_phy`</div><div class='add'>+     - The number of packets received on the physical port. This counter doesn’t</div><div class='add'>+       include packets that were discarded due to FCS, frame size and similar</div><div class='add'>+       errors.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_packets_phy`</div><div class='add'>+     - The number of packets transmitted on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_bytes_phy`</div><div class='add'>+     - The number of bytes received on the physical port, including Ethernet</div><div class='add'>+       header and FCS.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_bytes_phy`</div><div class='add'>+     - The number of bytes transmitted on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_multicast_phy`</div><div class='add'>+     - The number of multicast packets received on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_multicast_phy`</div><div class='add'>+     - The number of multicast packets transmitted on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_broadcast_phy`</div><div class='add'>+     - The number of broadcast packets received on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_broadcast_phy`</div><div class='add'>+     - The number of broadcast packets transmitted on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_crc_errors_phy`</div><div class='add'>+     - The number of dropped received packets due to FCS (Frame Check Sequence)</div><div class='add'>+       error on the physical port. If this counter is increased in high rate,</div><div class='add'>+       check the link quality using `rx_symbol_error_phy` and</div><div class='add'>+       `rx_corrected_bits_phy` counters below.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_in_range_len_errors_phy`</div><div class='add'>+     - The number of received packets dropped due to length/type errors on a</div><div class='add'>+       physical port.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_out_of_range_len_phy`</div><div class='add'>+     - The number of received packets dropped due to length greater than allowed</div><div class='add'>+       on a physical port. If this counter is increasing, it implies that the</div><div class='add'>+       peer connected to the adapter has a larger MTU configured. Using same MTU</div><div class='add'>+       configuration shall resolve this issue.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_oversize_pkts_phy`</div><div class='add'>+     - The number of dropped received packets due to length which exceed MTU</div><div class='add'>+       size on a physical port. If this counter is increasing, it implies that</div><div class='add'>+       the peer connected to the adapter has a larger MTU configured. Using same</div><div class='add'>+       MTU configuration shall resolve this issue.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_symbol_err_phy`</div><div class='add'>+     - The number of received packets dropped due to physical coding errors</div><div class='add'>+       (symbol errors) on a physical port.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_mac_control_phy`</div><div class='add'>+     - The number of MAC control packets received on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_mac_control_phy`</div><div class='add'>+     - The number of MAC control packets transmitted on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pause_ctrl_phy`</div><div class='add'>+     - The number of link layer pause packets received on a physical port. If</div><div class='add'>+       this counter is increasing, it implies that the network is congested and</div><div class='add'>+       cannot absorb the traffic coming from to the adapter.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_pause_ctrl_phy`</div><div class='add'>+     - The number of link layer pause packets transmitted on a physical port. If</div><div class='add'>+       this counter is increasing, it implies that the NIC is congested and</div><div class='add'>+       cannot absorb the traffic coming from the network.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_unsupported_op_phy`</div><div class='add'>+     - The number of MAC control packets received with unsupported opcode on a</div><div class='add'>+       physical port.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_discards_phy`</div><div class='add'>+     - The number of received packets dropped due to lack of buffers on a</div><div class='add'>+       physical port. If this counter is increasing, it implies that the adapter</div><div class='add'>+       is congested and cannot absorb the traffic coming from the network.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx_discards_phy`</div><div class='add'>+     - The number of packets which were discarded on transmission, even no</div><div class='add'>+       errors were detected. the drop might occur due to link in down state,</div><div class='add'>+       head of line drop, pause from the network, etc.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx_errors_phy`</div><div class='add'>+     - The number of transmitted packets dropped due to a length which exceed</div><div class='add'>+       MTU size on a physical port.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_undersize_pkts_phy`</div><div class='add'>+     - The number of received packets dropped due to length which is shorter</div><div class='add'>+       than 64 bytes on a physical port. If this counter is increasing, it</div><div class='add'>+       implies that the peer connected to the adapter has a non-standard MTU</div><div class='add'>+       configured or malformed packet had arrived.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_fragments_phy`</div><div class='add'>+     - The number of received packets dropped due to a length which is shorter</div><div class='add'>+       than 64 bytes and has FCS error on a physical port. If this counter is</div><div class='add'>+       increasing, it implies that the peer connected to the adapter has a</div><div class='add'>+       non-standard MTU configured.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_jabbers_phy`</div><div class='add'>+     - The number of received packets d due to a length which is longer than 64</div><div class='add'>+       bytes and had FCS error on a physical port.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_64_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 64 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_65_to_127_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 65 to</div><div class='add'>+       127 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_128_to_255_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 128 to</div><div class='add'>+       255 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_256_to_511_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 256 to</div><div class='add'>+       512 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_512_to_1023_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 512 to</div><div class='add'>+       1023 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_1024_to_1518_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 1024 to</div><div class='add'>+       1518 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_1519_to_2047_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 1519 to</div><div class='add'>+       2047 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_2048_to_4095_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 2048 to</div><div class='add'>+       4095 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_4096_to_8191_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 4096 to</div><div class='add'>+       8191 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_8192_to_10239_bytes_phy`</div><div class='add'>+     - The number of packets received on the physical port with size of 8192 to</div><div class='add'>+       10239 bytes.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `link_down_events_phy`</div><div class='add'>+     - The number of times where the link operative state changed to down. In</div><div class='add'>+       case this counter is increasing it may imply on port flapping. You may</div><div class='add'>+       need to replace the cable/transceiver.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_out_of_buffer`</div><div class='add'>+     - Number of times receive queue had no software buffers allocated for the</div><div class='add'>+       adapter's incoming traffic.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `module_bus_stuck`</div><div class='add'>+     - The number of times that module's I\ :sup:`2`\C bus (data or clock)</div><div class='add'>+       short-wire was detected. You may need to replace the cable/transceiver.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `module_high_temp`</div><div class='add'>+     - The number of times that the module temperature was too high. If this</div><div class='add'>+       issue persist, you may need to check the ambient temperature or replace</div><div class='add'>+       the cable/transceiver module.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `module_bad_shorted`</div><div class='add'>+     - The number of times that the module cables were shorted. You may need to</div><div class='add'>+       replace the cable/transceiver module.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `module_unplug`</div><div class='add'>+     - The number of times that module was ejected.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_buffer_passed_thres_phy`</div><div class='add'>+     - The number of events where the port receive buffer was over 85% full.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_pause_storm_warning_events`</div><div class='add'>+     - The number of times the device was sending pauses for a long period of</div><div class='add'>+       time.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_pause_storm_error_events`</div><div class='add'>+     - The number of times the device was sending pauses for a long period of</div><div class='add'>+       time, reaching time out and disabling transmission of pause frames. on</div><div class='add'>+       the period where pause frames were disabled, drop could have been</div><div class='add'>+       occurred.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx[i]_buff_alloc_err`</div><div class='add'>+     - Failed to allocate a buffer to received packet (or SKB) on ring i.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_bits_phy`</div><div class='add'>+     - This counter provides information on the total amount of traffic that</div><div class='add'>+       could have been received and can be used as a guideline to measure the</div><div class='add'>+       ratio of errored traffic in `rx_pcs_symbol_err_phy` and</div><div class='add'>+       `rx_corrected_bits_phy`.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_pcs_symbol_err_phy`</div><div class='add'>+     - This counter counts the number of symbol errors that wasn’t corrected by</div><div class='add'>+       FEC correction algorithm or that FEC algorithm was not active on this</div><div class='add'>+       interface. If this counter is increasing, it implies that the link</div><div class='add'>+       between the NIC and the network is suffering from high BER, and that</div><div class='add'>+       traffic is lost. You may need to replace the cable/transceiver. The error</div><div class='add'>+       rate is the number of `rx_pcs_symbol_err_phy` divided by the number of</div><div class='add'>+       `rx_bits_phy` on a specific time frame.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_corrected_bits_phy`</div><div class='add'>+     - The number of corrected bits on this port according to active FEC</div><div class='add'>+       (RS/FC). If this counter is increasing, it implies that the link between</div><div class='add'>+       the NIC and the network is suffering from high BER. The corrected bit</div><div class='add'>+       rate is the number of `rx_corrected_bits_phy` divided by the number of</div><div class='add'>+       `rx_bits_phy` on a specific time frame.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_err_lane_[l]_phy`</div><div class='add'>+     - This counter counts the number of physical raw errors per lane l index.</div><div class='add'>+       The counter counts errors before FEC corrections. If this counter is</div><div class='add'>+       increasing, it implies that the link between the NIC and the network is</div><div class='add'>+       suffering from high BER, and that traffic might be lost. You may need to</div><div class='add'>+       replace the cable/transceiver. Please check in accordance with</div><div class='add'>+       `rx_corrected_bits_phy`.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `rx_global_pause`</div><div class='add'>+     - The number of pause packets received on the physical port. If this</div><div class='add'>+       counter is increasing, it implies that the network is congested and</div><div class='add'>+       cannot absorb the traffic coming from the adapter. Note: This counter is</div><div class='add'>+       only enabled when global pause mode is enabled.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_global_pause_duration`</div><div class='add'>+     - The duration of pause received (in microSec) on the physical port. The</div><div class='add'>+       counter represents the time the port did not send any traffic. If this</div><div class='add'>+       counter is increasing, it implies that the network is congested and</div><div class='add'>+       cannot absorb the traffic coming from the adapter. Note: This counter is</div><div class='add'>+       only enabled when global pause mode is enabled.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_global_pause`</div><div class='add'>+     - The number of pause packets transmitted on a physical port. If this</div><div class='add'>+       counter is increasing, it implies that the adapter is congested and</div><div class='add'>+       cannot absorb the traffic coming from the network. Note: This counter is</div><div class='add'>+       only enabled when global pause mode is enabled.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_global_pause_duration`</div><div class='add'>+     - The duration of pause transmitter (in microSec) on the physical port.</div><div class='add'>+       Note: This counter is only enabled when global pause mode is enabled.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_global_pause_transition`</div><div class='add'>+     - The number of times a transition from Xoff to Xon on the physical port</div><div class='add'>+       has occurred. Note: This counter is only enabled when global pause mode</div><div class='add'>+       is enabled.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_if_down_packets`</div><div class='add'>+     - The number of received packets that were dropped due to interface down.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+Priority Port Counters</div><div class='add'>+----------------------</div><div class='add'>+The following counters are physical port counters that are counted per L2</div><div class='add'>+priority (0-7).</div><div class='add'>+</div><div class='add'>+**Note:** `p` in the counter name represents the priority.</div><div class='add'>+</div><div class='add'>+.. flat-table:: Priority Port Counter Table</div><div class='add'>+   :widths: 2 3 1</div><div class='add'>+</div><div class='add'>+   * - Counter</div><div class='add'>+     - Description</div><div class='add'>+     - Type</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_bytes`</div><div class='add'>+     - The number of bytes received with priority p on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_packets`</div><div class='add'>+     - The number of packets received with priority p on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_prio[p]_bytes`</div><div class='add'>+     - The number of bytes transmitted on priority p on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_prio[p]_packets`</div><div class='add'>+     - The number of packets transmitted on priority p on the physical port.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_pause`</div><div class='add'>+     - The number of pause packets received with priority p on a physical port.</div><div class='add'>+       If this counter is increasing, it implies that the network is congested</div><div class='add'>+       and cannot absorb the traffic coming from the adapter. Note: This counter</div><div class='add'>+       is available only if PFC was enabled on priority p.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_pause_duration`</div><div class='add'>+     - The duration of pause received (in microSec) on priority p on the</div><div class='add'>+       physical port. The counter represents the time the port did not send any</div><div class='add'>+       traffic on this priority. If this counter is increasing, it implies that</div><div class='add'>+       the network is congested and cannot absorb the traffic coming from the</div><div class='add'>+       adapter. Note: This counter is available only if PFC was enabled on</div><div class='add'>+       priority p.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_pause_transition`</div><div class='add'>+     - The number of times a transition from Xoff to Xon on priority p on the</div><div class='add'>+       physical port has occurred. Note: This counter is available only if PFC</div><div class='add'>+       was enabled on priority p.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_prio[p]_pause`</div><div class='add'>+     - The number of pause packets transmitted on priority p on a physical port.</div><div class='add'>+       If this counter is increasing, it implies that the adapter is congested</div><div class='add'>+       and cannot absorb the traffic coming from the network. Note: This counter</div><div class='add'>+       is available only if PFC was enabled on priority p.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `tx_prio[p]_pause_duration`</div><div class='add'>+     - The duration of pause transmitter (in microSec) on priority p on the</div><div class='add'>+       physical port. Note: This counter is available only if PFC was enabled on</div><div class='add'>+       priority p.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_buf_discard`</div><div class='add'>+     - The number of packets discarded by device due to lack of per host receive</div><div class='add'>+       buffers.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_cong_discard`</div><div class='add'>+     - The number of packets discarded by device due to per host congestion.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_marked`</div><div class='add'>+     - The number of packets ecn marked by device due to per host congestion.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `rx_prio[p]_discards`</div><div class='add'>+     - The number of packets discarded by device due to lack of receive buffers.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+Device Counters</div><div class='add'>+---------------</div><div class='add'>+.. flat-table:: Device Counter Table</div><div class='add'>+   :widths: 2 3 1</div><div class='add'>+</div><div class='add'>+   * - Counter</div><div class='add'>+     - Description</div><div class='add'>+     - Type</div><div class='add'>+</div><div class='add'>+   * - `rx_pci_signal_integrity`</div><div class='add'>+     - Counts physical layer PCIe signal integrity errors, the number of</div><div class='add'>+       transitions to recovery due to Framing errors and CRC (dlp and tlp). If</div><div class='add'>+       this counter is raising, try moving the adapter card to a different slot</div><div class='add'>+       to rule out a bad PCI slot. Validate that you are running with the latest</div><div class='add'>+       firmware available and latest server BIOS version.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `tx_pci_signal_integrity`</div><div class='add'>+     - Counts physical layer PCIe signal integrity errors, the number of</div><div class='add'>+       transition to recovery initiated by the other side (moving to recovery</div><div class='add'>+       due to getting TS/EIEOS). If this counter is raising, try moving the</div><div class='add'>+       adapter card to a different slot to rule out a bad PCI slot. Validate</div><div class='add'>+       that you are running with the latest firmware available and latest server</div><div class='add'>+       BIOS version.</div><div class='add'>+     - Error</div><div class='add'>+</div><div class='add'>+   * - `outbound_pci_buffer_overflow`</div><div class='add'>+     - The number of packets dropped due to pci buffer overflow. If this counter</div><div class='add'>+       is raising in high rate, it might indicate that the receive traffic rate</div><div class='add'>+       for a host is larger than the PCIe bus and therefore a congestion occurs.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `outbound_pci_stalled_rd`</div><div class='add'>+     - The percentage (in the range 0...100) of time within the last second that</div><div class='add'>+       the NIC had outbound non-posted reads requests but could not perform the</div><div class='add'>+       operation due to insufficient posted credits.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `outbound_pci_stalled_wr`</div><div class='add'>+     - The percentage (in the range 0...100) of time within the last second that</div><div class='add'>+       the NIC had outbound posted writes requests but could not perform the</div><div class='add'>+       operation due to insufficient posted credits.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `outbound_pci_stalled_rd_events`</div><div class='add'>+     - The number of seconds where `outbound_pci_stalled_rd` was above 30%.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `outbound_pci_stalled_wr_events`</div><div class='add'>+     - The number of seconds where `outbound_pci_stalled_wr` was above 30%.</div><div class='add'>+     - Informative</div><div class='add'>+</div><div class='add'>+   * - `dev_out_of_buffer`</div><div class='add'>+     - The number of times the device owned queue had not enough buffers</div><div class='add'>+       allocated.</div><div class='add'>+     - Error</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/devlink.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/devlink.rst<br/>new file mode 100644<br/>index 000000000000..3a7a714cc08f<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/devlink.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/devlink.rst</a></div><div class='hunk'>@@ -0,0 +1,292 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+=======</div><div class='add'>+Devlink</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+:Copyright: |copy| 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+Contents</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+- `Info`_</div><div class='add'>+- `Parameters`_</div><div class='add'>+- `Health reporters`_</div><div class='add'>+</div><div class='add'>+Info</div><div class='add'>+====</div><div class='add'>+</div><div class='add'>+The devlink info reports the running and stored firmware versions on device.</div><div class='add'>+It also prints the device PSID which represents the HCA board type ID.</div><div class='add'>+</div><div class='add'>+User command example::</div><div class='add'>+</div><div class='add'>+   $ devlink dev info pci/0000:00:06.0</div><div class='add'>+      pci/0000:00:06.0:</div><div class='add'>+      driver mlx5_core</div><div class='add'>+      versions:</div><div class='add'>+         fixed:</div><div class='add'>+            fw.psid MT_0000000009</div><div class='add'>+         running:</div><div class='add'>+            fw.version 16.26.0100</div><div class='add'>+         stored:</div><div class='add'>+            fw.version 16.26.0100</div><div class='add'>+</div><div class='add'>+Parameters</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+flow_steering_mode: Device flow steering mode</div><div class='add'>+---------------------------------------------</div><div class='add'>+The flow steering mode parameter controls the flow steering mode of the driver.</div><div class='add'>+Two modes are supported:</div><div class='add'>+1. 'dmfs' - Device managed flow steering.</div><div class='add'>+2. 'smfs' - Software/Driver managed flow steering.</div><div class='add'>+</div><div class='add'>+In DMFS mode, the HW steering entities are created and managed through the</div><div class='add'>+Firmware.</div><div class='add'>+In SMFS mode, the HW steering entities are created and managed though by</div><div class='add'>+the driver directly into hardware without firmware intervention.</div><div class='add'>+</div><div class='add'>+SMFS mode is faster and provides better rule insertion rate compared to default DMFS mode.</div><div class='add'>+</div><div class='add'>+User command examples:</div><div class='add'>+</div><div class='add'>+- Set SMFS flow steering mode::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param set pci/0000:06:00.0 name flow_steering_mode value "smfs" cmode runtime</div><div class='add'>+</div><div class='add'>+- Read device flow steering mode::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param show pci/0000:06:00.0 name flow_steering_mode</div><div class='add'>+      pci/0000:06:00.0:</div><div class='add'>+      name flow_steering_mode type driver-specific</div><div class='add'>+      values:</div><div class='add'>+         cmode runtime value smfs</div><div class='add'>+</div><div class='add'>+enable_roce: RoCE enablement state</div><div class='add'>+----------------------------------</div><div class='add'>+If the device supports RoCE disablement, RoCE enablement state controls device</div><div class='add'>+support for RoCE capability. Otherwise, the control occurs in the driver stack.</div><div class='add'>+When RoCE is disabled at the driver level, only raw ethernet QPs are supported.</div><div class='add'>+</div><div class='add'>+To change RoCE enablement state, a user must change the driverinit cmode value</div><div class='add'>+and run devlink reload.</div><div class='add'>+</div><div class='add'>+User command examples:</div><div class='add'>+</div><div class='add'>+- Disable RoCE::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param set pci/0000:06:00.0 name enable_roce value false cmode driverinit</div><div class='add'>+    $ devlink dev reload pci/0000:06:00.0</div><div class='add'>+</div><div class='add'>+- Read RoCE enablement state::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param show pci/0000:06:00.0 name enable_roce</div><div class='add'>+      pci/0000:06:00.0:</div><div class='add'>+      name enable_roce type generic</div><div class='add'>+      values:</div><div class='add'>+         cmode driverinit value true</div><div class='add'>+</div><div class='add'>+esw_port_metadata: Eswitch port metadata state</div><div class='add'>+----------------------------------------------</div><div class='add'>+When applicable, disabling eswitch metadata can increase packet rate</div><div class='add'>+up to 20% depending on the use case and packet sizes.</div><div class='add'>+</div><div class='add'>+Eswitch port metadata state controls whether to internally tag packets with</div><div class='add'>+metadata. Metadata tagging must be enabled for multi-port RoCE, failover</div><div class='add'>+between representors and stacked devices.</div><div class='add'>+By default metadata is enabled on the supported devices in E-switch.</div><div class='add'>+Metadata is applicable only for E-switch in switchdev mode and</div><div class='add'>+users may disable it when NONE of the below use cases will be in use:</div><div class='add'>+1. HCA is in Dual/multi-port RoCE mode.</div><div class='add'>+2. VF/SF representor bonding (Usually used for Live migration)</div><div class='add'>+3. Stacked devices</div><div class='add'>+</div><div class='add'>+When metadata is disabled, the above use cases will fail to initialize if</div><div class='add'>+users try to enable them.</div><div class='add'>+</div><div class='add'>+- Show eswitch port metadata::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param show pci/0000:06:00.0 name esw_port_metadata</div><div class='add'>+      pci/0000:06:00.0:</div><div class='add'>+        name esw_port_metadata type driver-specific</div><div class='add'>+          values:</div><div class='add'>+            cmode runtime value true</div><div class='add'>+</div><div class='add'>+- Disable eswitch port metadata::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param set pci/0000:06:00.0 name esw_port_metadata value false cmode runtime</div><div class='add'>+</div><div class='add'>+- Change eswitch mode to switchdev mode where after choosing the metadata value::</div><div class='add'>+</div><div class='add'>+    $ devlink dev eswitch set pci/0000:06:00.0 mode switchdev</div><div class='add'>+</div><div class='add'>+hairpin_num_queues: Number of hairpin queues</div><div class='add'>+--------------------------------------------</div><div class='add'>+We refer to a TC NIC rule that involves forwarding as "hairpin".</div><div class='add'>+</div><div class='add'>+Hairpin queues are mlx5 hardware specific implementation for hardware</div><div class='add'>+forwarding of such packets.</div><div class='add'>+</div><div class='add'>+- Show the number of hairpin queues::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param show pci/0000:06:00.0 name hairpin_num_queues</div><div class='add'>+      pci/0000:06:00.0:</div><div class='add'>+        name hairpin_num_queues type driver-specific</div><div class='add'>+          values:</div><div class='add'>+            cmode driverinit value 2</div><div class='add'>+</div><div class='add'>+- Change the number of hairpin queues::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param set pci/0000:06:00.0 name hairpin_num_queues value 4 cmode driverinit</div><div class='add'>+</div><div class='add'>+hairpin_queue_size: Size of the hairpin queues</div><div class='add'>+----------------------------------------------</div><div class='add'>+Control the size of the hairpin queues.</div><div class='add'>+</div><div class='add'>+- Show the size of the hairpin queues::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param show pci/0000:06:00.0 name hairpin_queue_size</div><div class='add'>+      pci/0000:06:00.0:</div><div class='add'>+        name hairpin_queue_size type driver-specific</div><div class='add'>+          values:</div><div class='add'>+            cmode driverinit value 1024</div><div class='add'>+</div><div class='add'>+- Change the size (in packets) of the hairpin queues::</div><div class='add'>+</div><div class='add'>+    $ devlink dev param set pci/0000:06:00.0 name hairpin_queue_size value 512 cmode driverinit</div><div class='add'>+</div><div class='add'>+Health reporters</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+tx reporter</div><div class='add'>+-----------</div><div class='add'>+The tx reporter is responsible for reporting and recovering of the following two error scenarios:</div><div class='add'>+</div><div class='add'>+- tx timeout</div><div class='add'>+    Report on kernel tx timeout detection.</div><div class='add'>+    Recover by searching lost interrupts.</div><div class='add'>+- tx error completion</div><div class='add'>+    Report on error tx completion.</div><div class='add'>+    Recover by flushing the tx queue and reset it.</div><div class='add'>+</div><div class='add'>+tx reporter also support on demand diagnose callback, on which it provides</div><div class='add'>+real time information of its send queues status.</div><div class='add'>+</div><div class='add'>+User commands examples:</div><div class='add'>+</div><div class='add'>+- Diagnose send queues status::</div><div class='add'>+</div><div class='add'>+    $ devlink health diagnose pci/0000:82:00.0 reporter tx</div><div class='add'>+</div><div class='add'>+NOTE: This command has valid output only when interface is up, otherwise the command has empty output.</div><div class='add'>+</div><div class='add'>+- Show number of tx errors indicated, number of recover flows ended successfully,</div><div class='add'>+  is autorecover enabled and graceful period from last recover::</div><div class='add'>+</div><div class='add'>+    $ devlink health show pci/0000:82:00.0 reporter tx</div><div class='add'>+</div><div class='add'>+rx reporter</div><div class='add'>+-----------</div><div class='add'>+The rx reporter is responsible for reporting and recovering of the following two error scenarios:</div><div class='add'>+</div><div class='add'>+- rx queues' initialization (population) timeout</div><div class='add'>+    Population of rx queues' descriptors on ring initialization is done</div><div class='add'>+    in napi context via triggering an irq. In case of a failure to get</div><div class='add'>+    the minimum amount of descriptors, a timeout would occur, and</div><div class='add'>+    descriptors could be recovered by polling the EQ (Event Queue).</div><div class='add'>+- rx completions with errors (reported by HW on interrupt context)</div><div class='add'>+    Report on rx completion error.</div><div class='add'>+    Recover (if needed) by flushing the related queue and reset it.</div><div class='add'>+</div><div class='add'>+rx reporter also supports on demand diagnose callback, on which it</div><div class='add'>+provides real time information of its receive queues' status.</div><div class='add'>+</div><div class='add'>+- Diagnose rx queues' status and corresponding completion queue::</div><div class='add'>+</div><div class='add'>+    $ devlink health diagnose pci/0000:82:00.0 reporter rx</div><div class='add'>+</div><div class='add'>+NOTE: This command has valid output only when interface is up. Otherwise, the command has empty output.</div><div class='add'>+</div><div class='add'>+- Show number of rx errors indicated, number of recover flows ended successfully,</div><div class='add'>+  is autorecover enabled, and graceful period from last recover::</div><div class='add'>+</div><div class='add'>+    $ devlink health show pci/0000:82:00.0 reporter rx</div><div class='add'>+</div><div class='add'>+fw reporter</div><div class='add'>+-----------</div><div class='add'>+The fw reporter implements `diagnose` and `dump` callbacks.</div><div class='add'>+It follows symptoms of fw error such as fw syndrome by triggering</div><div class='add'>+fw core dump and storing it into the dump buffer.</div><div class='add'>+The fw reporter diagnose command can be triggered any time by the user to check</div><div class='add'>+current fw status.</div><div class='add'>+</div><div class='add'>+User commands examples:</div><div class='add'>+</div><div class='add'>+- Check fw heath status::</div><div class='add'>+</div><div class='add'>+    $ devlink health diagnose pci/0000:82:00.0 reporter fw</div><div class='add'>+</div><div class='add'>+- Read FW core dump if already stored or trigger new one::</div><div class='add'>+</div><div class='add'>+    $ devlink health dump show pci/0000:82:00.0 reporter fw</div><div class='add'>+</div><div class='add'>+NOTE: This command can run only on the PF which has fw tracer ownership,</div><div class='add'>+running it on other PF or any VF will return "Operation not permitted".</div><div class='add'>+</div><div class='add'>+fw fatal reporter</div><div class='add'>+-----------------</div><div class='add'>+The fw fatal reporter implements `dump` and `recover` callbacks.</div><div class='add'>+It follows fatal errors indications by CR-space dump and recover flow.</div><div class='add'>+The CR-space dump uses vsc interface which is valid even if the FW command</div><div class='add'>+interface is not functional, which is the case in most FW fatal errors.</div><div class='add'>+The recover function runs recover flow which reloads the driver and triggers fw</div><div class='add'>+reset if needed.</div><div class='add'>+On firmware error, the health buffer is dumped into the dmesg. The log</div><div class='add'>+level is derived from the error's severity (given in health buffer).</div><div class='add'>+</div><div class='add'>+User commands examples:</div><div class='add'>+</div><div class='add'>+- Run fw recover flow manually::</div><div class='add'>+</div><div class='add'>+    $ devlink health recover pci/0000:82:00.0 reporter fw_fatal</div><div class='add'>+</div><div class='add'>+- Read FW CR-space dump if already stored or trigger new one::</div><div class='add'>+</div><div class='add'>+    $ devlink health dump show pci/0000:82:00.1 reporter fw_fatal</div><div class='add'>+</div><div class='add'>+NOTE: This command can run only on PF.</div><div class='add'>+</div><div class='add'>+vnic reporter</div><div class='add'>+-------------</div><div class='add'>+The vnic reporter implements only the `diagnose` callback.</div><div class='add'>+It is responsible for querying the vnic diagnostic counters from fw and displaying</div><div class='add'>+them in realtime.</div><div class='add'>+</div><div class='add'>+Description of the vnic counters:</div><div class='add'>+total_q_under_processor_handle: number of queues in an error state due to</div><div class='add'>+an async error or errored command.</div><div class='add'>+send_queue_priority_update_flow: number of QP/SQ priority/SL update</div><div class='add'>+events.</div><div class='add'>+cq_overrun: number of times CQ entered an error state due to an</div><div class='add'>+overflow.</div><div class='add'>+async_eq_overrun: number of times an EQ mapped to async events was</div><div class='add'>+overrun.</div><div class='add'>+comp_eq_overrun: number of times an EQ mapped to completion events was</div><div class='add'>+overrun.</div><div class='add'>+quota_exceeded_command: number of commands issued and failed due to quota</div><div class='add'>+exceeded.</div><div class='add'>+invalid_command: number of commands issued and failed dues to any reason</div><div class='add'>+other than quota exceeded.</div><div class='add'>+nic_receive_steering_discard: number of packets that completed RX flow</div><div class='add'>+steering but were discarded due to a mismatch in flow table.</div><div class='add'>+</div><div class='add'>+User commands examples:</div><div class='add'>+- Diagnose PF/VF vnic counters</div><div class='add'>+        $ devlink health diagnose pci/0000:82:00.1 reporter vnic</div><div class='add'>+- Diagnose representor vnic counters (performed by supplying devlink port of the</div><div class='add'>+  representor, which can be obtained via devlink port command)</div><div class='add'>+        $ devlink health diagnose pci/0000:82:00.1/65537 reporter vnic</div><div class='add'>+</div><div class='add'>+NOTE: This command can run over all interfaces such as PF/VF and representor ports.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst<br/>new file mode 100644<br/>index 000000000000..3fdcd6b61ccf<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/index.rst</a></div><div class='hunk'>@@ -0,0 +1,26 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+Mellanox ConnectX(R) mlx5 core VPI Network Driver</div><div class='add'>+=================================================</div><div class='add'>+</div><div class='add'>+:Copyright: |copy| 2019, Mellanox Technologies LTD.</div><div class='add'>+:Copyright: |copy| 2020-2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+Contents:</div><div class='add'>+</div><div class='add'>+.. toctree::</div><div class='add'>+   :maxdepth: 2</div><div class='add'>+</div><div class='add'>+   kconfig</div><div class='add'>+   devlink</div><div class='add'>+   switchdev</div><div class='add'>+   tracepoints</div><div class='add'>+   counters</div><div class='add'>+</div><div class='add'>+.. only::  subproject and html</div><div class='add'>+</div><div class='add'>+   Indices</div><div class='add'>+   =======</div><div class='add'>+</div><div class='add'>+   * :ref:`genindex`</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst<br/>new file mode 100644<br/>index 000000000000..43b1f7e87ec4<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/kconfig.rst</a></div><div class='hunk'>@@ -0,0 +1,168 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+=======================================</div><div class='add'>+Enabling the driver and kconfig options</div><div class='add'>+=======================================</div><div class='add'>+</div><div class='add'>+:Copyright: |copy| 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+| mlx5 core is modular and most of the major mlx5 core driver features can be selected (compiled in/out)</div><div class='add'>+| at build time via kernel Kconfig flags.</div><div class='add'>+| Basic features, ethernet net device rx/tx offloads and XDP, are available with the most basic flags</div><div class='add'>+| CONFIG_MLX5_CORE=y/m and CONFIG_MLX5_CORE_EN=y.</div><div class='add'>+| For the list of advanced features, please see below.</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_BRIDGE=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Enable :ref:`Ethernet Bridging (BRIDGE) offloading support &lt;mlx5_bridge_offload&gt;`.</div><div class='add'>+|    This will provide the ability to add representors of mlx5 uplink and VF</div><div class='add'>+|    ports to Bridge and offloading rules for traffic between such ports.</div><div class='add'>+|    Supports VLANs (trunk and access modes).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_CORE=(y/m/n)** (module mlx5_core.ko)</div><div class='add'>+</div><div class='add'>+|    The driver can be enabled by choosing CONFIG_MLX5_CORE=y/m in kernel config.</div><div class='add'>+|    This will provide mlx5 core driver for mlx5 ulps to interface with (mlx5e, mlx5_ib).</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_CORE_EN=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Choosing this option will allow basic ethernet netdevice support with all of the standard rx/tx offloads.</div><div class='add'>+|    mlx5e is the mlx5 ulp driver which provides netdevice kernel interface, when chosen, mlx5e will be</div><div class='add'>+|    built-in into mlx5_core.ko.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_CORE_EN_DCB=(y/n)**:</div><div class='add'>+</div><div class='add'>+|    Enables `Data Center Bridging (DCB) Support &lt;https://community.mellanox.com/s/article/howto-auto-config-pfc-and-ets-on-connectx-4-via-lldp-dcbx&gt;`_.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_CORE_IPOIB=(y/n)**</div><div class='add'>+</div><div class='add'>+|    IPoIB offloads &amp; acceleration support.</div><div class='add'>+|    Requires CONFIG_MLX5_CORE_EN to provide an accelerated interface for the rdma</div><div class='add'>+|    IPoIB ulp netdevice.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_CLS_ACT=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Enables offload support for TC classifier action (NET_CLS_ACT).</div><div class='add'>+|    Works in both native NIC mode and Switchdev SRIOV mode.</div><div class='add'>+|    Flow-based classifiers, such as those registered through</div><div class='add'>+|    `tc-flower(8)`, are processed by the device, rather than the</div><div class='add'>+|    host. Actions that would then overwrite matching classification</div><div class='add'>+|    results would then be instant due to the offload.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_EN_ARFS=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Enables Hardware-accelerated receive flow steering (arfs) support, and ntuple filtering.</div><div class='add'>+|    https://community.mellanox.com/s/article/howto-configure-arfs-on-connectx-4</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_EN_IPSEC=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Enables `IPSec XFRM cryptography-offload acceleration &lt;https://support.mellanox.com/s/article/ConnectX-6DX-Bluefield-2-IPsec-HW-Full-Offload-Configuration-Guide&gt;`_.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_EN_MACSEC=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Build support for MACsec cryptography-offload acceleration in the NIC.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_EN_RXNFC=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Enables ethtool receive network flow classification, which allows user defined</div><div class='add'>+|    flow rules to direct traffic into arbitrary rx queue via ethtool set/get_rxnfc API.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_EN_TLS=(y/n)**</div><div class='add'>+</div><div class='add'>+|    TLS cryptography-offload acceleration.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_ESWITCH=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Ethernet SRIOV E-Switch support in ConnectX NIC. E-Switch provides internal SRIOV packet steering</div><div class='add'>+|    and switching for the enabled VFs and PF in two available modes:</div><div class='add'>+|           1) `Legacy SRIOV mode (L2 mac vlan steering based) &lt;https://community.mellanox.com/s/article/howto-configure-sr-iov-for-connectx-4-connectx-5-with-kvm--ethernet-x&gt;`_.</div><div class='add'>+|           2) `Switchdev mode (eswitch offloads) &lt;https://www.mellanox.com/related-docs/prod_software/ASAP2_Hardware_Offloading_for_vSwitches_User_Manual_v4.4.pdf&gt;`_.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_FPGA=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Build support for the Innova family of network cards by Mellanox Technologies.</div><div class='add'>+|    Innova network cards are comprised of a ConnectX chip and an FPGA chip on one board.</div><div class='add'>+|    If you select this option, the mlx5_core driver will include the Innova FPGA core and allow</div><div class='add'>+|    building sandbox-specific client drivers.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_INFINIBAND=(y/n/m)** (module mlx5_ib.ko)</div><div class='add'>+</div><div class='add'>+|    Provides low-level InfiniBand/RDMA and `RoCE &lt;https://community.mellanox.com/s/article/recommended-network-configuration-examples-for-roce-deployment&gt;`_ support.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_MPFS=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Ethernet Multi-Physical Function Switch (MPFS) support in ConnectX NIC.</div><div class='add'>+|    MPFs is required for when `Multi-Host &lt;http://www.mellanox.com/page/multihost&gt;`_ configuration is enabled to allow passing</div><div class='add'>+|    user configured unicast MAC addresses to the requesting PF.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_SF=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Build support for subfunction.</div><div class='add'>+|    Subfunctons are more light weight than PCI SRIOV VFs. Choosing this option</div><div class='add'>+|    will enable support for creating subfunction devices.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_SF_MANAGER=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Build support for subfuction port in the NIC. A Mellanox subfunction</div><div class='add'>+|    port is managed through devlink.  A subfunction supports RDMA, netdevice</div><div class='add'>+|    and vdpa device. It is similar to a SRIOV VF but it doesn't require</div><div class='add'>+|    SRIOV support.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_SW_STEERING=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Build support for software-managed steering in the NIC.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_TC_CT=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Support offloading connection tracking rules via tc ct action.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_TC_SAMPLE=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Support offloading sample rules via tc sample action.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_VDPA=(y/n)**</div><div class='add'>+</div><div class='add'>+|    Support library for Mellanox VDPA drivers. Provides code that is</div><div class='add'>+|    common for all types of VDPA drivers. The following drivers are planned:</div><div class='add'>+|    net, block.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_VDPA_NET=(y/n)**</div><div class='add'>+</div><div class='add'>+|    VDPA network driver for ConnectX6 and newer. Provides offloading</div><div class='add'>+|    of virtio net datapath such that descriptors put on the ring will</div><div class='add'>+|    be executed by the hardware. It also supports a variety of stateless</div><div class='add'>+|    offloads depending on the actual device used and firmware version.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**CONFIG_MLX5_VFIO_PCI=(y/n)**</div><div class='add'>+</div><div class='add'>+|    This provides migration support for MLX5 devices using the VFIO framework.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+**External options** ( Choose if the corresponding mlx5 feature is required )</div><div class='add'>+</div><div class='add'>+- CONFIG_MLXFW: When chosen, mlx5 firmware flashing support will be enabled (via devlink and ethtool).</div><div class='add'>+- CONFIG_PTP_1588_CLOCK: When chosen, mlx5 ptp support will be enabled</div><div class='add'>+- CONFIG_VXLAN: When chosen, mlx5 vxlan support will be enabled.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst<br/>new file mode 100644<br/>index 000000000000..01deedb71597<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/switchdev.rst</a></div><div class='hunk'>@@ -0,0 +1,239 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+=========</div><div class='add'>+Switchdev</div><div class='add'>+=========</div><div class='add'>+</div><div class='add'>+:Copyright: |copy| 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+.. _mlx5_bridge_offload:</div><div class='add'>+</div><div class='add'>+Bridge offload</div><div class='add'>+==============</div><div class='add'>+</div><div class='add'>+The mlx5 driver implements support for offloading bridge rules when in switchdev</div><div class='add'>+mode. Linux bridge FDBs are automatically offloaded when mlx5 switchdev</div><div class='add'>+representor is attached to bridge.</div><div class='add'>+</div><div class='add'>+- Change device to switchdev mode::</div><div class='add'>+</div><div class='add'>+    $ devlink dev eswitch set pci/0000:06:00.0 mode switchdev</div><div class='add'>+</div><div class='add'>+- Attach mlx5 switchdev representor 'enp8s0f0' to bridge netdev 'bridge1'::</div><div class='add'>+</div><div class='add'>+    $ ip link set enp8s0f0 master bridge1</div><div class='add'>+</div><div class='add'>+VLANs</div><div class='add'>+-----</div><div class='add'>+</div><div class='add'>+Following bridge VLAN functions are supported by mlx5:</div><div class='add'>+</div><div class='add'>+- VLAN filtering (including multiple VLANs per port)::</div><div class='add'>+</div><div class='add'>+    $ ip link set bridge1 type bridge vlan_filtering 1</div><div class='add'>+    $ bridge vlan add dev enp8s0f0 vid 2-3</div><div class='add'>+</div><div class='add'>+- VLAN push on bridge ingress::</div><div class='add'>+</div><div class='add'>+    $ bridge vlan add dev enp8s0f0 vid 3 pvid</div><div class='add'>+</div><div class='add'>+- VLAN pop on bridge egress::</div><div class='add'>+</div><div class='add'>+    $ bridge vlan add dev enp8s0f0 vid 3 untagged</div><div class='add'>+</div><div class='add'>+Subfunction</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+mlx5 supports subfunction management using devlink port (see :ref:`Documentation/networking/devlink/devlink-port.rst &lt;devlink_port&gt;`) interface.</div><div class='add'>+</div><div class='add'>+A subfunction has its own function capabilities and its own resources. This</div><div class='add'>+means a subfunction has its own dedicated queues (txq, rxq, cq, eq). These</div><div class='add'>+queues are neither shared nor stolen from the parent PCI function.</div><div class='add'>+</div><div class='add'>+When a subfunction is RDMA capable, it has its own QP1, GID table, and RDMA</div><div class='add'>+resources neither shared nor stolen from the parent PCI function.</div><div class='add'>+</div><div class='add'>+A subfunction has a dedicated window in PCI BAR space that is not shared</div><div class='add'>+with the other subfunctions or the parent PCI function. This ensures that all</div><div class='add'>+devices (netdev, rdma, vdpa, etc.) of the subfunction accesses only assigned</div><div class='add'>+PCI BAR space.</div><div class='add'>+</div><div class='add'>+A subfunction supports eswitch representation through which it supports tc</div><div class='add'>+offloads. The user configures eswitch to send/receive packets from/to</div><div class='add'>+the subfunction port.</div><div class='add'>+</div><div class='add'>+Subfunctions share PCI level resources such as PCI MSI-X IRQs with</div><div class='add'>+other subfunctions and/or with its parent PCI function.</div><div class='add'>+</div><div class='add'>+Example mlx5 software, system, and device view::</div><div class='add'>+</div><div class='add'>+       _______</div><div class='add'>+      | admin |</div><div class='add'>+      | user  |----------</div><div class='add'>+      |_______|         |</div><div class='add'>+          |             |</div><div class='add'>+      ____|____       __|______            _________________</div><div class='add'>+     |         |     |         |          |                 |</div><div class='add'>+     | devlink |     | tc tool |          |    user         |</div><div class='add'>+     | tool    |     |_________|          | applications    |</div><div class='add'>+     |_________|         |                |_________________|</div><div class='add'>+           |             |                   |          |</div><div class='add'>+           |             |                   |          |         Userspace</div><div class='add'>+ +---------|-------------|-------------------|----------|--------------------+</div><div class='add'>+           |             |           +----------+   +----------+   Kernel</div><div class='add'>+           |             |           |  netdev  |   | rdma dev |</div><div class='add'>+           |             |           +----------+   +----------+</div><div class='add'>+   (devlink port add/del |              ^               ^</div><div class='add'>+    port function set)   |              |               |</div><div class='add'>+           |             |              +---------------|</div><div class='add'>+      _____|___          |              |        _______|_______</div><div class='add'>+     |         |         |              |       | mlx5 class    |</div><div class='add'>+     | devlink |   +------------+       |       |   drivers     |</div><div class='add'>+     | kernel  |   | rep netdev |       |       |(mlx5_core,ib) |</div><div class='add'>+     |_________|   +------------+       |       |_______________|</div><div class='add'>+           |             |              |               ^</div><div class='add'>+   (devlink ops)         |              |          (probe/remove)</div><div class='add'>+  _________|________     |              |           ____|________</div><div class='add'>+ | subfunction      |    |     +---------------+   | subfunction |</div><div class='add'>+ | management driver|-----     | subfunction   |---|  driver     |</div><div class='add'>+ | (mlx5_core)      |          | auxiliary dev |   | (mlx5_core) |</div><div class='add'>+ |__________________|          +---------------+   |_____________|</div><div class='add'>+           |                                            ^</div><div class='add'>+  (sf add/del, vhca events)                             |</div><div class='add'>+           |                                      (device add/del)</div><div class='add'>+      _____|____                                    ____|________</div><div class='add'>+     |          |                                  | subfunction |</div><div class='add'>+     |  PCI NIC |--- activate/deactivate events---&gt;| host driver |</div><div class='add'>+     |__________|                                  | (mlx5_core) |</div><div class='add'>+                                                   |_____________|</div><div class='add'>+</div><div class='add'>+Subfunction is created using devlink port interface.</div><div class='add'>+</div><div class='add'>+- Change device to switchdev mode::</div><div class='add'>+</div><div class='add'>+    $ devlink dev eswitch set pci/0000:06:00.0 mode switchdev</div><div class='add'>+</div><div class='add'>+- Add a devlink port of subfunction flavour::</div><div class='add'>+</div><div class='add'>+    $ devlink port add pci/0000:06:00.0 flavour pcisf pfnum 0 sfnum 88</div><div class='add'>+    pci/0000:06:00.0/32768: type eth netdev eth6 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='add'>+      function:</div><div class='add'>+        hw_addr 00:00:00:00:00:00 state inactive opstate detached</div><div class='add'>+</div><div class='add'>+- Show a devlink port of the subfunction::</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/32768</div><div class='add'>+    pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcisf pfnum 0 sfnum 88</div><div class='add'>+      function:</div><div class='add'>+        hw_addr 00:00:00:00:00:00 state inactive opstate detached</div><div class='add'>+</div><div class='add'>+- Delete a devlink port of subfunction after use::</div><div class='add'>+</div><div class='add'>+    $ devlink port del pci/0000:06:00.0/32768</div><div class='add'>+</div><div class='add'>+Function attributes</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+The mlx5 driver provides a mechanism to setup PCI VF/SF function attributes in</div><div class='add'>+a unified way for SmartNIC and non-SmartNIC.</div><div class='add'>+</div><div class='add'>+This is supported only when the eswitch mode is set to switchdev. Port function</div><div class='add'>+configuration of the PCI VF/SF is supported through devlink eswitch port.</div><div class='add'>+</div><div class='add'>+Port function attributes should be set before PCI VF/SF is enumerated by the</div><div class='add'>+driver.</div><div class='add'>+</div><div class='add'>+MAC address setup</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+mlx5 driver support devlink port function attr mechanism to setup MAC</div><div class='add'>+address. (refer to Documentation/networking/devlink/devlink-port.rst)</div><div class='add'>+</div><div class='add'>+RoCE capability setup</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+Not all mlx5 PCI devices/SFs require RoCE capability.</div><div class='add'>+</div><div class='add'>+When RoCE capability is disabled, it saves 1 Mbytes worth of system memory per</div><div class='add'>+PCI devices/SF.</div><div class='add'>+</div><div class='add'>+mlx5 driver support devlink port function attr mechanism to setup RoCE</div><div class='add'>+capability. (refer to Documentation/networking/devlink/devlink-port.rst)</div><div class='add'>+</div><div class='add'>+migratable capability setup</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+User who wants mlx5 PCI VFs to be able to perform live migration need to</div><div class='add'>+explicitly enable the VF migratable capability.</div><div class='add'>+</div><div class='add'>+mlx5 driver support devlink port function attr mechanism to setup migratable</div><div class='add'>+capability. (refer to Documentation/networking/devlink/devlink-port.rst)</div><div class='add'>+</div><div class='add'>+SF state setup</div><div class='add'>+--------------</div><div class='add'>+</div><div class='add'>+To use the SF, the user must activate the SF using the SF function state</div><div class='add'>+attribute.</div><div class='add'>+</div><div class='add'>+- Get the state of the SF identified by its unique devlink port index::</div><div class='add'>+</div><div class='add'>+   $ devlink port show ens2f0npf0sf88</div><div class='add'>+   pci/0000:06:00.0/32768: type eth netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='add'>+     function:</div><div class='add'>+       hw_addr 00:00:00:00:88:88 state inactive opstate detached</div><div class='add'>+</div><div class='add'>+- Activate the function and verify its state is active::</div><div class='add'>+</div><div class='add'>+   $ devlink port function set ens2f0npf0sf88 state active</div><div class='add'>+</div><div class='add'>+   $ devlink port show ens2f0npf0sf88</div><div class='add'>+   pci/0000:06:00.0/32768: type eth netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='add'>+     function:</div><div class='add'>+       hw_addr 00:00:00:00:88:88 state active opstate detached</div><div class='add'>+</div><div class='add'>+Upon function activation, the PF driver instance gets the event from the device</div><div class='add'>+that a particular SF was activated. It's the cue to put the device on bus, probe</div><div class='add'>+it and instantiate the devlink instance and class specific auxiliary devices</div><div class='add'>+for it.</div><div class='add'>+</div><div class='add'>+- Show the auxiliary device and port of the subfunction::</div><div class='add'>+</div><div class='add'>+    $ devlink dev show</div><div class='add'>+    devlink dev show auxiliary/mlx5_core.sf.4</div><div class='add'>+</div><div class='add'>+    $ devlink port show auxiliary/mlx5_core.sf.4/1</div><div class='add'>+    auxiliary/mlx5_core.sf.4/1: type eth netdev p0sf88 flavour virtual port 0 splittable false</div><div class='add'>+</div><div class='add'>+    $ rdma link show mlx5_0/1</div><div class='add'>+    link mlx5_0/1 state ACTIVE physical_state LINK_UP netdev p0sf88</div><div class='add'>+</div><div class='add'>+    $ rdma dev show</div><div class='add'>+    8: rocep6s0f1: node_type ca fw 16.29.0550 node_guid 248a:0703:00b3:d113 sys_image_guid 248a:0703:00b3:d112</div><div class='add'>+    13: mlx5_0: node_type ca fw 16.29.0550 node_guid 0000:00ff:fe00:8888 sys_image_guid 248a:0703:00b3:d112</div><div class='add'>+</div><div class='add'>+- Subfunction auxiliary device and class device hierarchy::</div><div class='add'>+</div><div class='add'>+                 mlx5_core.sf.4</div><div class='add'>+          (subfunction auxiliary device)</div><div class='add'>+                       /\</div><div class='add'>+                      /  \</div><div class='add'>+                     /    \</div><div class='add'>+                    /      \</div><div class='add'>+                   /        \</div><div class='add'>+      mlx5_core.eth.4     mlx5_core.rdma.4</div><div class='add'>+     (sf eth aux dev)     (sf rdma aux dev)</div><div class='add'>+         |                      |</div><div class='add'>+         |                      |</div><div class='add'>+      p0sf88                  mlx5_0</div><div class='add'>+     (sf netdev)          (sf rdma device)</div><div class='add'>+</div><div class='add'>+Additionally, the SF port also gets the event when the driver attaches to the</div><div class='add'>+auxiliary device of the subfunction. This results in changing the operational</div><div class='add'>+state of the function. This provides visibility to the user to decide when is it</div><div class='add'>+safe to delete the SF port for graceful termination of the subfunction.</div><div class='add'>+</div><div class='add'>+- Show the SF port operational state::</div><div class='add'>+</div><div class='add'>+    $ devlink port show ens2f0npf0sf88</div><div class='add'>+    pci/0000:06:00.0/32768: type eth netdev ens2f0npf0sf88 flavour pcisf controller 0 pfnum 0 sfnum 88 external false splittable false</div><div class='add'>+      function:</div><div class='add'>+        hw_addr 00:00:00:00:88:88 state active opstate attached</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/tracepoints.rst b/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/tracepoints.rst<br/>new file mode 100644<br/>index 000000000000..da8e53cebb6c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/mellanox/mlx5/tracepoints.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/mellanox/mlx5/tracepoints.rst</a></div><div class='hunk'>@@ -0,0 +1,229 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='add'>+</div><div class='add'>+===========</div><div class='add'>+Tracepoints</div><div class='add'>+===========</div><div class='add'>+</div><div class='add'>+:Copyright: |copy| 2023, NVIDIA CORPORATION &amp; AFFILIATES. All rights reserved.</div><div class='add'>+</div><div class='add'>+mlx5 driver provides internal tracepoints for tracking and debugging using</div><div class='add'>+kernel tracepoints interfaces (refer to Documentation/trace/ftrace.rst).</div><div class='add'>+</div><div class='add'>+For the list of support mlx5 events, check /sys/kernel/tracing/events/mlx5/.</div><div class='add'>+</div><div class='add'>+tc and eswitch offloads tracepoints:</div><div class='add'>+</div><div class='add'>+- mlx5e_configure_flower: trace flower filter actions and cookies offloaded to mlx5::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5e_configure_flower &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    tc-6535  [019] ...1  2672.404466: mlx5e_configure_flower: cookie=0000000067874a55 actions= REDIRECT</div><div class='add'>+</div><div class='add'>+- mlx5e_delete_flower: trace flower filter actions and cookies deleted from mlx5::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5e_delete_flower &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    tc-6569  [010] .N.1  2686.379075: mlx5e_delete_flower: cookie=0000000067874a55 actions= NULL</div><div class='add'>+</div><div class='add'>+- mlx5e_stats_flower: trace flower stats request::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5e_stats_flower &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    tc-6546  [010] ...1  2679.704889: mlx5e_stats_flower: cookie=0000000060eb3d6a bytes=0 packets=0 lastused=4295560217</div><div class='add'>+</div><div class='add'>+- mlx5e_tc_update_neigh_used_value: trace tunnel rule neigh update value offloaded to mlx5::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5e_tc_update_neigh_used_value &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u48:4-8806  [009] ...1 55117.882428: mlx5e_tc_update_neigh_used_value: netdev: ens1f0 IPv4: 1.1.1.10 IPv6: ::ffff:1.1.1.10 neigh_used=1</div><div class='add'>+</div><div class='add'>+- mlx5e_rep_neigh_update: trace neigh update tasks scheduled due to neigh state change events::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5e_rep_neigh_update &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u48:7-2221  [009] ...1  1475.387435: mlx5e_rep_neigh_update: netdev: ens1f0 MAC: 24:8a:07:9a:17:9a IPv4: 1.1.1.10 IPv6: ::ffff:1.1.1.10 neigh_connected=1</div><div class='add'>+</div><div class='add'>+Bridge offloads tracepoints:</div><div class='add'>+</div><div class='add'>+- mlx5_esw_bridge_fdb_entry_init: trace bridge FDB entry offloaded to mlx5::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_bridge_fdb_entry_init &gt;&gt; set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u20:9-2217    [003] ...1   318.582243: mlx5_esw_bridge_fdb_entry_init: net_device=enp8s0f0_0 addr=e4:fd:05:08:00:02 vid=0 flags=0 used=0</div><div class='add'>+</div><div class='add'>+- mlx5_esw_bridge_fdb_entry_cleanup: trace bridge FDB entry deleted from mlx5::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_bridge_fdb_entry_cleanup &gt;&gt; set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    ip-2581    [005] ...1   318.629871: mlx5_esw_bridge_fdb_entry_cleanup: net_device=enp8s0f0_1 addr=e4:fd:05:08:00:03 vid=0 flags=0 used=16</div><div class='add'>+</div><div class='add'>+- mlx5_esw_bridge_fdb_entry_refresh: trace bridge FDB entry offload refreshed in</div><div class='add'>+  mlx5::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_bridge_fdb_entry_refresh &gt;&gt; set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u20:8-3849    [003] ...1       466716: mlx5_esw_bridge_fdb_entry_refresh: net_device=enp8s0f0_0 addr=e4:fd:05:08:00:02 vid=3 flags=0 used=0</div><div class='add'>+</div><div class='add'>+- mlx5_esw_bridge_vlan_create: trace bridge VLAN object add on mlx5</div><div class='add'>+  representor::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_bridge_vlan_create &gt;&gt; set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    ip-2560    [007] ...1   318.460258: mlx5_esw_bridge_vlan_create: vid=1 flags=6</div><div class='add'>+</div><div class='add'>+- mlx5_esw_bridge_vlan_cleanup: trace bridge VLAN object delete from mlx5</div><div class='add'>+  representor::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_bridge_vlan_cleanup &gt;&gt; set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    bridge-2582    [007] ...1   318.653496: mlx5_esw_bridge_vlan_cleanup: vid=2 flags=8</div><div class='add'>+</div><div class='add'>+- mlx5_esw_bridge_vport_init: trace mlx5 vport assigned with bridge upper</div><div class='add'>+  device::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_bridge_vport_init &gt;&gt; set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    ip-2560    [007] ...1   318.458915: mlx5_esw_bridge_vport_init: vport_num=1</div><div class='add'>+</div><div class='add'>+- mlx5_esw_bridge_vport_cleanup: trace mlx5 vport removed from bridge upper</div><div class='add'>+  device::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_bridge_vport_cleanup &gt;&gt; set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    ip-5387    [000] ...1       573713: mlx5_esw_bridge_vport_cleanup: vport_num=1</div><div class='add'>+</div><div class='add'>+Eswitch QoS tracepoints:</div><div class='add'>+</div><div class='add'>+- mlx5_esw_vport_qos_create: trace creation of transmit scheduler arbiter for vport::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_vport_qos_create &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    &lt;...&gt;-23496   [018] .... 73136.838831: mlx5_esw_vport_qos_create: (0000:82:00.0) vport=2 tsar_ix=4 bw_share=0, max_rate=0 group=000000007b576bb3</div><div class='add'>+</div><div class='add'>+- mlx5_esw_vport_qos_config: trace configuration of transmit scheduler arbiter for vport::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_vport_qos_config &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    &lt;...&gt;-26548   [023] .... 75754.223823: mlx5_esw_vport_qos_config: (0000:82:00.0) vport=1 tsar_ix=3 bw_share=34, max_rate=10000 group=000000007b576bb3</div><div class='add'>+</div><div class='add'>+- mlx5_esw_vport_qos_destroy: trace deletion of transmit scheduler arbiter for vport::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_vport_qos_destroy &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    &lt;...&gt;-27418   [004] .... 76546.680901: mlx5_esw_vport_qos_destroy: (0000:82:00.0) vport=1 tsar_ix=3</div><div class='add'>+</div><div class='add'>+- mlx5_esw_group_qos_create: trace creation of transmit scheduler arbiter for rate group::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_group_qos_create &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    &lt;...&gt;-26578   [008] .... 75776.022112: mlx5_esw_group_qos_create: (0000:82:00.0) group=000000008dac63ea tsar_ix=5</div><div class='add'>+</div><div class='add'>+- mlx5_esw_group_qos_config: trace configuration of transmit scheduler arbiter for rate group::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_group_qos_config &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    &lt;...&gt;-27303   [020] .... 76461.455356: mlx5_esw_group_qos_config: (0000:82:00.0) group=000000008dac63ea tsar_ix=5 bw_share=100 max_rate=20000</div><div class='add'>+</div><div class='add'>+- mlx5_esw_group_qos_destroy: trace deletion of transmit scheduler arbiter for group::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_esw_group_qos_destroy &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    &lt;...&gt;-27418   [006] .... 76547.187258: mlx5_esw_group_qos_destroy: (0000:82:00.0) group=000000007b576bb3 tsar_ix=1</div><div class='add'>+</div><div class='add'>+SF tracepoints:</div><div class='add'>+</div><div class='add'>+- mlx5_sf_add: trace addition of the SF port::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_add &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    devlink-9363    [031] ..... 24610.188722: mlx5_sf_add: (0000:06:00.0) port_index=32768 controller=0 hw_id=0x8000 sfnum=88</div><div class='add'>+</div><div class='add'>+- mlx5_sf_free: trace freeing of the SF port::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_free &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    devlink-9830    [038] ..... 26300.404749: mlx5_sf_free: (0000:06:00.0) port_index=32768 controller=0 hw_id=0x8000</div><div class='add'>+</div><div class='add'>+- mlx5_sf_activate: trace activation of the SF port::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_activate &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    devlink-29841   [008] .....  3669.635095: mlx5_sf_activate: (0000:08:00.0) port_index=32768 controller=0 hw_id=0x8000</div><div class='add'>+</div><div class='add'>+- mlx5_sf_deactivate: trace deactivation of the SF port::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_deactivate &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    devlink-29994   [008] .....  4015.969467: mlx5_sf_deactivate: (0000:08:00.0) port_index=32768 controller=0 hw_id=0x8000</div><div class='add'>+</div><div class='add'>+- mlx5_sf_hwc_alloc: trace allocating of the hardware SF context::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_hwc_alloc &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    devlink-9775    [031] ..... 26296.385259: mlx5_sf_hwc_alloc: (0000:06:00.0) controller=0 hw_id=0x8000 sfnum=88</div><div class='add'>+</div><div class='add'>+- mlx5_sf_hwc_free: trace freeing of the hardware SF context::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_hwc_free &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u128:3-9093    [046] ..... 24625.365771: mlx5_sf_hwc_free: (0000:06:00.0) hw_id=0x8000</div><div class='add'>+</div><div class='add'>+- mlx5_sf_hwc_deferred_free: trace deferred freeing of the hardware SF context::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_hwc_deferred_free &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    devlink-9519    [046] ..... 24624.400271: mlx5_sf_hwc_deferred_free: (0000:06:00.0) hw_id=0x8000</div><div class='add'>+</div><div class='add'>+- mlx5_sf_update_state: trace state updates for SF contexts::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_update_state &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u20:3-29490   [009] .....  4141.453530: mlx5_sf_update_state: (0000:08:00.0) port_index=32768 controller=0 hw_id=0x8000 state=2</div><div class='add'>+</div><div class='add'>+- mlx5_sf_vhca_event: trace SF vhca event and state::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_vhca_event &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u128:3-9093    [046] ..... 24625.365525: mlx5_sf_vhca_event: (0000:06:00.0) hw_id=0x8000 sfnum=88 vhca_state=1</div><div class='add'>+</div><div class='add'>+- mlx5_sf_dev_add: trace SF device add event::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_dev_add&gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u128:3-9093    [000] ..... 24616.524495: mlx5_sf_dev_add: (0000:06:00.0) sfdev=00000000fc5d96fd aux_id=4 hw_id=0x8000 sfnum=88</div><div class='add'>+</div><div class='add'>+- mlx5_sf_dev_del: trace SF device delete event::</div><div class='add'>+</div><div class='add'>+    $ echo mlx5:mlx5_sf_dev_del &gt;&gt; /sys/kernel/tracing/set_event</div><div class='add'>+    $ cat /sys/kernel/tracing/trace</div><div class='add'>+    ...</div><div class='add'>+    kworker/u128:3-9093    [044] ..... 24624.400749: mlx5_sf_dev_del: (0000:06:00.0) sfdev=00000000fc5d96fd aux_id=4 hw_id=0x8000 sfnum=88</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/neterion/vxge.rst b/Documentation/networking/device_drivers/ethernet/neterion/vxge.rst<br/>deleted file mode 100644<br/>index 589c6b15c63d..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/neterion/vxge.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/neterion/vxge.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,115 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: GPL-2.0</div><div class='del'>-</div><div class='del'>-==============================================================================</div><div class='del'>-Neterion's (Formerly S2io) X3100 Series 10GbE PCIe Server Adapter Linux driver</div><div class='del'>-==============================================================================</div><div class='del'>-</div><div class='del'>-.. Contents</div><div class='del'>-</div><div class='del'>-  1) Introduction</div><div class='del'>-  2) Features supported</div><div class='del'>-  3) Configurable driver parameters</div><div class='del'>-  4) Troubleshooting</div><div class='del'>-</div><div class='del'>-1. Introduction</div><div class='del'>-===============</div><div class='del'>-</div><div class='del'>-This Linux driver supports all Neterion's X3100 series 10 GbE PCIe I/O</div><div class='del'>-Virtualized Server adapters.</div><div class='del'>-</div><div class='del'>-The X3100 series supports four modes of operation, configurable via</div><div class='del'>-firmware:</div><div class='del'>-</div><div class='del'>-	- Single function mode</div><div class='del'>-	- Multi function mode</div><div class='del'>-	- SRIOV mode</div><div class='del'>-	- MRIOV mode</div><div class='del'>-</div><div class='del'>-The functions share a 10GbE link and the pci-e bus, but hardly anything else</div><div class='del'>-inside the ASIC. Features like independent hw reset, statistics, bandwidth/</div><div class='del'>-priority allocation and guarantees, GRO, TSO, interrupt moderation etc are</div><div class='del'>-supported independently on each function.</div><div class='del'>-</div><div class='del'>-(See below for a complete list of features supported for both IPv4 and IPv6)</div><div class='del'>-</div><div class='del'>-2. Features supported</div><div class='del'>-=====================</div><div class='del'>-</div><div class='del'>-i)   Single function mode (up to 17 queues)</div><div class='del'>-</div><div class='del'>-ii)  Multi function mode (up to 17 functions)</div><div class='del'>-</div><div class='del'>-iii) PCI-SIG's I/O Virtualization</div><div class='del'>-</div><div class='del'>-       - Single Root mode: v1.0 (up to 17 functions)</div><div class='del'>-       - Multi-Root mode: v1.0 (up to 17 functions)</div><div class='del'>-</div><div class='del'>-iv)  Jumbo frames</div><div class='del'>-</div><div class='del'>-       X3100 Series supports MTU up to 9600 bytes, modifiable using</div><div class='del'>-       ip command.</div><div class='del'>-</div><div class='del'>-v)   Offloads supported: (Enabled by default)</div><div class='del'>-</div><div class='del'>-       - Checksum offload (TCP/UDP/IP) on transmit and receive paths</div><div class='del'>-       - TCP Segmentation Offload (TSO) on transmit path</div><div class='del'>-       - Generic Receive Offload (GRO) on receive path</div><div class='del'>-</div><div class='del'>-vi)  MSI-X: (Enabled by default)</div><div class='del'>-</div><div class='del'>-       Resulting in noticeable performance improvement (up to 7% on certain</div><div class='del'>-       platforms).</div><div class='del'>-</div><div class='del'>-vii) NAPI: (Enabled by default)</div><div class='del'>-</div><div class='del'>-       For better Rx interrupt moderation.</div><div class='del'>-</div><div class='del'>-viii)RTH (Receive Traffic Hash): (Enabled by default)</div><div class='del'>-</div><div class='del'>-       Receive side steering for better scaling.</div><div class='del'>-</div><div class='del'>-ix)  Statistics</div><div class='del'>-</div><div class='del'>-       Comprehensive MAC-level and software statistics displayed using</div><div class='del'>-       "ethtool -S" option.</div><div class='del'>-</div><div class='del'>-x)   Multiple hardware queues: (Enabled by default)</div><div class='del'>-</div><div class='del'>-       Up to 17 hardware based transmit and receive data channels, with</div><div class='del'>-       multiple steering options (transmit multiqueue enabled by default).</div><div class='del'>-</div><div class='del'>-3) Configurable driver parameters:</div><div class='del'>-----------------------------------</div><div class='del'>-</div><div class='del'>-i)  max_config_dev</div><div class='del'>-       Specifies maximum device functions to be enabled.</div><div class='del'>-</div><div class='del'>-       Valid range: 1-8</div><div class='del'>-</div><div class='del'>-ii) max_config_port</div><div class='del'>-       Specifies number of ports to be enabled.</div><div class='del'>-</div><div class='del'>-       Valid range: 1,2</div><div class='del'>-</div><div class='del'>-       Default: 1</div><div class='del'>-</div><div class='del'>-iii) max_config_vpath</div><div class='del'>-       Specifies maximum VPATH(s) configured for each device function.</div><div class='del'>-</div><div class='del'>-       Valid range: 1-17</div><div class='del'>-</div><div class='del'>-iv) vlan_tag_strip</div><div class='del'>-       Enables/disables vlan tag stripping from all received tagged frames that</div><div class='del'>-       are not replicated at the internal L2 switch.</div><div class='del'>-</div><div class='del'>-       Valid range: 0,1 (disabled, enabled respectively)</div><div class='del'>-</div><div class='del'>-       Default: 1</div><div class='del'>-</div><div class='del'>-v)  addr_learn_en</div><div class='del'>-       Enable learning the mac address of the guest OS interface in</div><div class='del'>-       virtualization environment.</div><div class='del'>-</div><div class='del'>-       Valid range: 0,1 (disabled, enabled respectively)</div><div class='del'>-</div><div class='del'>-       Default: 0</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/netronome/nfp.rst b/Documentation/networking/device_drivers/ethernet/netronome/nfp.rst<br/>index ada611fb427c..650b57742d51 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/netronome/nfp.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/netronome/nfp.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/netronome/nfp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/netronome/nfp.rst</a></div><div class='hunk'>@@ -1,50 +1,57 @@</div><div class='ctx'> .. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+.. include:: &lt;isonum.txt&gt;</div><div class='ctx'> </div><div class='del'>-=============================================</div><div class='del'>-Netronome Flow Processor (NFP) Kernel Drivers</div><div class='del'>-=============================================</div><div class='add'>+===========================================</div><div class='add'>+Network Flow Processor (NFP) Kernel Drivers</div><div class='add'>+===========================================</div><div class='ctx'> </div><div class='del'>-Copyright (c) 2019, Netronome Systems, Inc.</div><div class='add'>+:Copyright: |copy| 2019, Netronome Systems, Inc.</div><div class='add'>+:Copyright: |copy| 2022, Corigine, Inc.</div><div class='ctx'> </div><div class='ctx'> Contents</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='ctx'> - `Overview`_</div><div class='ctx'> - `Acquiring Firmware`_</div><div class='add'>+- `Devlink Info`_</div><div class='add'>+- `Configure Device`_</div><div class='add'>+- `Statistics`_</div><div class='ctx'> </div><div class='ctx'> Overview</div><div class='ctx'> ========</div><div class='ctx'> </div><div class='del'>-This driver supports Netronome's line of Flow Processor devices,</div><div class='del'>-including the NFP4000, NFP5000, and NFP6000 models, which are also</div><div class='del'>-incorporated in the company's family of Agilio SmartNICs. The SR-IOV</div><div class='del'>-physical and virtual functions for these devices are supported by</div><div class='del'>-the driver.</div><div class='add'>+This driver supports Netronome and Corigine's line of Network Flow Processor</div><div class='add'>+devices, including the NFP3800, NFP4000, NFP5000, and NFP6000 models, which</div><div class='add'>+are also incorporated in the companies' family of Agilio SmartNICs. The SR-IOV</div><div class='add'>+physical and virtual functions for these devices are supported by the driver.</div><div class='ctx'> </div><div class='ctx'> Acquiring Firmware</div><div class='ctx'> ==================</div><div class='ctx'> </div><div class='del'>-The NFP4000 and NFP6000 devices require application specific firmware</div><div class='del'>-to function.  Application firmware can be located either on the host file system</div><div class='add'>+The NFP3800, NFP4000 and NFP6000 devices require application specific firmware</div><div class='add'>+to function. Application firmware can be located either on the host file system</div><div class='ctx'> or in the device flash (if supported by management firmware).</div><div class='ctx'> </div><div class='ctx'> Firmware files on the host filesystem contain card type (`AMDA-*` string), media</div><div class='del'>-config etc.  They should be placed in `/lib/firmware/netronome` directory to</div><div class='add'>+config etc. They should be placed in `/lib/firmware/netronome` directory to</div><div class='ctx'> load firmware from the host file system.</div><div class='ctx'> </div><div class='ctx'> Firmware for basic NIC operation is available in the upstream</div><div class='ctx'> `linux-firmware.git` repository.</div><div class='ctx'> </div><div class='add'>+A more comprehensive list of firmware can be downloaded from the</div><div class='add'>+`Corigine Support site &lt;https://www.corigine.com/DPUDownload.html&gt;`_.</div><div class='add'>+</div><div class='ctx'> Firmware in NVRAM</div><div class='ctx'> -----------------</div><div class='ctx'> </div><div class='ctx'> Recent versions of management firmware supports loading application</div><div class='del'>-firmware from flash when the host driver gets probed.  The firmware loading</div><div class='add'>+firmware from flash when the host driver gets probed. The firmware loading</div><div class='ctx'> policy configuration may be used to configure this feature appropriately.</div><div class='ctx'> </div><div class='ctx'> Devlink or ethtool can be used to update the application firmware on the device</div><div class='ctx'> flash by providing the appropriate `nic_AMDA*.nffw` file to the respective</div><div class='del'>-command.  Users need to take care to write the correct firmware image for the</div><div class='add'>+command. Users need to take care to write the correct firmware image for the</div><div class='ctx'> card and media configuration to flash.</div><div class='ctx'> </div><div class='ctx'> Available storage space in flash depends on the card being used.</div><div class='hunk'>@@ -79,9 +86,9 @@ You may need to use hard instead of symbolic links on distributions</div><div class='ctx'> which use old `mkinitrd` command instead of `dracut` (e.g. Ubuntu).</div><div class='ctx'> </div><div class='ctx'> After changing firmware files you may need to regenerate the initramfs</div><div class='del'>-image.  Initramfs contains drivers and firmware files your system may</div><div class='del'>-need to boot.  Refer to the documentation of your distribution to find</div><div class='del'>-out how to update initramfs.  Good indication of stale initramfs</div><div class='add'>+image. Initramfs contains drivers and firmware files your system may</div><div class='add'>+need to boot. Refer to the documentation of your distribution to find</div><div class='add'>+out how to update initramfs. Good indication of stale initramfs</div><div class='ctx'> is system loading wrong driver or firmware on boot, but when driver is</div><div class='ctx'> later reloaded manually everything works correctly.</div><div class='ctx'> </div><div class='hunk'>@@ -89,9 +96,9 @@ Selecting firmware per device</div><div class='ctx'> -----------------------------</div><div class='ctx'> </div><div class='ctx'> Most commonly all cards on the system use the same type of firmware.</div><div class='del'>-If you want to load specific firmware image for a specific card, you</div><div class='del'>-can use either the PCI bus address or serial number.  Driver will print</div><div class='del'>-which files it's looking for when it recognizes a NFP device::</div><div class='add'>+If you want to load a specific firmware image for a specific card, you</div><div class='add'>+can use either the PCI bus address or serial number. The driver will</div><div class='add'>+print which files it's looking for when it recognizes a NFP device::</div><div class='ctx'> </div><div class='ctx'>     nfp: Looking for firmware file in order of priority:</div><div class='ctx'>     nfp:  netronome/serial-00-12-34-aa-bb-cc-10-ff.nffw: not found</div><div class='hunk'>@@ -106,6 +113,15 @@ Note that `serial-*` and `pci-*` files are **not** automatically included</div><div class='ctx'> in initramfs, you will have to refer to documentation of appropriate tools</div><div class='ctx'> to find out how to include them.</div><div class='ctx'> </div><div class='add'>+Running firmware version</div><div class='add'>+------------------------</div><div class='add'>+</div><div class='add'>+The version of the loaded firmware for a particular &lt;netdev&gt; interface,</div><div class='add'>+(e.g. enp4s0), or an interface's port &lt;netdev port&gt; (e.g. enp4s0np0) can</div><div class='add'>+be displayed with the ethtool command::</div><div class='add'>+</div><div class='add'>+  $ ethtool -i &lt;netdev&gt;</div><div class='add'>+</div><div class='ctx'> Firmware loading policy</div><div class='ctx'> -----------------------</div><div class='ctx'> </div><div class='hunk'>@@ -132,6 +148,115 @@ abi_drv_load_ifc</div><div class='ctx'>     Defines a list of PF devices allowed to load FW on the device.</div><div class='ctx'>     This variable is not currently user configurable.</div><div class='ctx'> </div><div class='add'>+Devlink Info</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+The devlink info command displays the running and stored firmware versions</div><div class='add'>+on the device, serial number and board information.</div><div class='add'>+</div><div class='add'>+Devlink info command example (replace PCI address)::</div><div class='add'>+</div><div class='add'>+  $ devlink dev info pci/0000:03:00.0</div><div class='add'>+    pci/0000:03:00.0:</div><div class='add'>+      driver nfp</div><div class='add'>+      serial_number CSAAMDA2001-1003000111</div><div class='add'>+      versions:</div><div class='add'>+          fixed:</div><div class='add'>+            board.id AMDA2001-1003</div><div class='add'>+            board.rev 01</div><div class='add'>+            board.manufacture CSA</div><div class='add'>+            board.model mozart</div><div class='add'>+          running:</div><div class='add'>+            fw.mgmt 22.10.0-rc3</div><div class='add'>+            fw.cpld 0x1000003</div><div class='add'>+            fw.app nic-22.09.0</div><div class='add'>+            chip.init AMDA-2001-1003  1003000111</div><div class='add'>+          stored:</div><div class='add'>+            fw.bundle_id bspbundle_1003000111</div><div class='add'>+            fw.mgmt 22.10.0-rc3</div><div class='add'>+            fw.cpld 0x0</div><div class='add'>+            chip.init AMDA-2001-1003  1003000111</div><div class='add'>+</div><div class='add'>+Configure Device</div><div class='add'>+================</div><div class='add'>+</div><div class='add'>+This section explains how to use Agilio SmartNICs running basic NIC firmware.</div><div class='add'>+</div><div class='add'>+Configure interface link-speed</div><div class='add'>+------------------------------</div><div class='add'>+The following steps explains how to change between 10G mode and 25G mode on</div><div class='add'>+Agilio CX 2x25GbE cards. The changing of port speed must be done in order,</div><div class='add'>+port 0 (p0) must be set to 10G before port 1 (p1) may be set to 10G.</div><div class='add'>+</div><div class='add'>+Down the respective interface(s)::</div><div class='add'>+</div><div class='add'>+  $ ip link set dev &lt;netdev port 0&gt; down</div><div class='add'>+  $ ip link set dev &lt;netdev port 1&gt; down</div><div class='add'>+</div><div class='add'>+Set interface link-speed to 10G::</div><div class='add'>+</div><div class='add'>+  $ ethtool -s &lt;netdev port 0&gt; speed 10000</div><div class='add'>+  $ ethtool -s &lt;netdev port 1&gt; speed 10000</div><div class='add'>+</div><div class='add'>+Set interface link-speed to 25G::</div><div class='add'>+</div><div class='add'>+  $ ethtool -s &lt;netdev port 0&gt; speed 25000</div><div class='add'>+  $ ethtool -s &lt;netdev port 1&gt; speed 25000</div><div class='add'>+</div><div class='add'>+Reload driver for changes to take effect::</div><div class='add'>+</div><div class='add'>+  $ rmmod nfp; modprobe nfp</div><div class='add'>+</div><div class='add'>+Configure interface Maximum Transmission Unit (MTU)</div><div class='add'>+---------------------------------------------------</div><div class='add'>+</div><div class='add'>+The MTU of interfaces can temporarily be set using the iproute2, ip link or</div><div class='add'>+ifconfig tools. Note that this change will not persist. Setting this via</div><div class='add'>+Network Manager, or another appropriate OS configuration tool, is</div><div class='add'>+recommended as changes to the MTU using Network Manager can be made to</div><div class='add'>+persist.</div><div class='add'>+</div><div class='add'>+Set interface MTU to 9000 bytes::</div><div class='add'>+</div><div class='add'>+  $ ip link set dev &lt;netdev port&gt; mtu 9000</div><div class='add'>+</div><div class='add'>+It is the responsibility of the user or the orchestration layer to set</div><div class='add'>+appropriate MTU values when handling jumbo frames or utilizing tunnels. For</div><div class='add'>+example, if packets sent from a VM are to be encapsulated on the card and</div><div class='add'>+egress a physical port, then the MTU of the VF should be set to lower than</div><div class='add'>+that of the physical port to account for the extra bytes added by the</div><div class='add'>+additional header. If a setup is expected to see fallback traffic between</div><div class='add'>+the SmartNIC and the kernel then the user should also ensure that the PF MTU</div><div class='add'>+is appropriately set to avoid unexpected drops on this path.</div><div class='add'>+</div><div class='add'>+Configure Forward Error Correction (FEC) modes</div><div class='add'>+----------------------------------------------</div><div class='add'>+</div><div class='add'>+Agilio SmartNICs support FEC mode configuration, e.g. Auto, Firecode Base-R,</div><div class='add'>+ReedSolomon and Off modes. Each physical port's FEC mode can be set</div><div class='add'>+independently using ethtool. The supported FEC modes for an interface can</div><div class='add'>+be viewed using::</div><div class='add'>+</div><div class='add'>+  $ ethtool &lt;netdev&gt;</div><div class='add'>+</div><div class='add'>+The currently configured FEC mode can be viewed using::</div><div class='add'>+</div><div class='add'>+  $ ethtool --show-fec &lt;netdev&gt;</div><div class='add'>+</div><div class='add'>+To force the FEC mode for a particular port, auto-negotiation must be disabled</div><div class='add'>+(see the `Auto-negotiation`_ section). An example of how to set the FEC mode</div><div class='add'>+to Reed-Solomon is::</div><div class='add'>+</div><div class='add'>+  $ ethtool --set-fec &lt;netdev&gt; encoding rs</div><div class='add'>+</div><div class='add'>+Auto-negotiation</div><div class='add'>+----------------</div><div class='add'>+</div><div class='add'>+To change auto-negotiation settings, the link must first be put down. After the</div><div class='add'>+link is down, auto-negotiation can be enabled or disabled using::</div><div class='add'>+</div><div class='add'>+  ethtool -s &lt;netdev&gt; autoneg &lt;on|off&gt;</div><div class='add'>+</div><div class='ctx'> Statistics</div><div class='ctx'> ==========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst b/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst<br/>index 0eabbc347d6c..6ec7d686efab 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/pensando/ionic.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/pensando/ionic.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/pensando/ionic.rst</a></div><div class='hunk'>@@ -83,7 +83,7 @@ Configuring the Driver</div><div class='ctx'> MTU</div><div class='ctx'> ---</div><div class='ctx'> </div><div class='del'>-Jumbo frame support is available with a maximim size of 9194 bytes.</div><div class='add'>+Jumbo frame support is available with a maximum size of 9194 bytes.</div><div class='ctx'> </div><div class='ctx'> Interrupt coalescing</div><div class='ctx'> --------------------</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst b/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst<br/>index f24adfab6a1b..25fd9aa284e2 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/ti/am65_nuss_cpsw_switchdev.rst</a></div><div class='hunk'>@@ -124,7 +124,7 @@ Multicast flooding</div><div class='ctx'> ==================</div><div class='ctx'> CPU port mcast_flooding is always on</div><div class='ctx'> </div><div class='del'>-Turning flooding on/off on swithch ports:</div><div class='add'>+Turning flooding on/off on switch ports:</div><div class='ctx'> bridge link set dev sw0p1 mcast_flood on/off</div><div class='ctx'> </div><div class='ctx'> Access and Trunk port</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst b/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst<br/>index 1241ecac73bd..464dce938ed1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/ti/cpsw_switchdev.rst</a></div><div class='hunk'>@@ -174,7 +174,7 @@ Multicast flooding</div><div class='ctx'> ==================</div><div class='ctx'> CPU port mcast_flooding is always on</div><div class='ctx'> </div><div class='del'>-Turning flooding on/off on swithch ports:</div><div class='add'>+Turning flooding on/off on switch ports:</div><div class='ctx'> bridge link set dev sw0p1 mcast_flood on/off</div><div class='ctx'> </div><div class='ctx'> Access and Trunk port</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/wangxun/ngbe.rst b/Documentation/networking/device_drivers/ethernet/wangxun/ngbe.rst<br/>new file mode 100644<br/>index 000000000000..43a02f9943e1<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/wangxun/ngbe.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/wangxun/ngbe.rst</a></div><div class='hunk'>@@ -0,0 +1,14 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=============================================================</div><div class='add'>+Linux Base Driver for WangXun(R) Gigabit PCI Express Adapters</div><div class='add'>+=============================================================</div><div class='add'>+</div><div class='add'>+WangXun Gigabit Linux driver.</div><div class='add'>+Copyright (c) 2019 - 2022 Beijing WangXun Technology Co., Ltd.</div><div class='add'>+</div><div class='add'>+Support</div><div class='add'>+=======</div><div class='add'>+ If you have problems with the software or hardware, please contact our</div><div class='add'>+ customer support team via email at nic-support@net-swift.com or check our website</div><div class='add'>+ at https://www.net-swift.com</div><div class='head'>diff --git a/Documentation/networking/device_drivers/ethernet/wangxun/txgbe.rst b/Documentation/networking/device_drivers/ethernet/wangxun/txgbe.rst<br/>new file mode 100644<br/>index 000000000000..d052ef40fe36<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/ethernet/wangxun/txgbe.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/ethernet/wangxun/txgbe.rst</a></div><div class='hunk'>@@ -0,0 +1,20 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+================================================================</div><div class='add'>+Linux Base Driver for WangXun(R) 10 Gigabit PCI Express Adapters</div><div class='add'>+================================================================</div><div class='add'>+</div><div class='add'>+WangXun 10 Gigabit Linux driver.</div><div class='add'>+Copyright (c) 2015 - 2022 Beijing WangXun Technology Co., Ltd.</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Contents</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+- Support</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Support</div><div class='add'>+=======</div><div class='add'>+If you got any problem, contact Wangxun support team via nic-support@net-swift.com</div><div class='add'>+and Cc: netdev.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/index.rst b/Documentation/networking/device_drivers/index.rst<br/>index 5f5cfdb2a300..601eacaf12f3 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/index.rst</a></div><div class='hunk'>@@ -17,7 +17,6 @@ Contents:</div><div class='ctx'>    fddi/index</div><div class='ctx'>    hamradio/index</div><div class='ctx'>    qlogic/index</div><div class='del'>-   wan/index</div><div class='ctx'>    wifi/index</div><div class='ctx'>    wwan/index</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/wan/index.rst b/Documentation/networking/device_drivers/wan/index.rst<br/>deleted file mode 100644<br/>index 9d9ae94f00b4..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/wan/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/wan/index.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,18 +0,0 @@</div><div class='del'>-.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='del'>-</div><div class='del'>-Classic WAN Device Drivers</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-Contents:</div><div class='del'>-</div><div class='del'>-.. toctree::</div><div class='del'>-   :maxdepth: 2</div><div class='del'>-</div><div class='del'>-   z8530book</div><div class='del'>-</div><div class='del'>-.. only::  subproject and html</div><div class='del'>-</div><div class='del'>-   Indices</div><div class='del'>-   =======</div><div class='del'>-</div><div class='del'>-   * :ref:`genindex`</div><div class='head'>diff --git a/Documentation/networking/device_drivers/wan/z8530book.rst b/Documentation/networking/device_drivers/wan/z8530book.rst<br/>deleted file mode 100644<br/>index fea2c40e7973..000000000000<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/wan/z8530book.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/wan/z8530book.rst</a><br/>+++ /dev/null</div><div class='hunk'>@@ -1,256 +0,0 @@</div><div class='del'>-=======================</div><div class='del'>-Z8530 Programming Guide</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-:Author: Alan Cox</div><div class='del'>-</div><div class='del'>-Introduction</div><div class='del'>-============</div><div class='del'>-</div><div class='del'>-The Z85x30 family synchronous/asynchronous controller chips are used on</div><div class='del'>-a large number of cheap network interface cards. The kernel provides a</div><div class='del'>-core interface layer that is designed to make it easy to provide WAN</div><div class='del'>-services using this chip.</div><div class='del'>-</div><div class='del'>-The current driver only support synchronous operation. Merging the</div><div class='del'>-asynchronous driver support into this code to allow any Z85x30 device to</div><div class='del'>-be used as both a tty interface and as a synchronous controller is a</div><div class='del'>-project for Linux post the 2.4 release</div><div class='del'>-</div><div class='del'>-Driver Modes</div><div class='del'>-============</div><div class='del'>-</div><div class='del'>-The Z85230 driver layer can drive Z8530, Z85C30 and Z85230 devices in</div><div class='del'>-three different modes. Each mode can be applied to an individual channel</div><div class='del'>-on the chip (each chip has two channels).</div><div class='del'>-</div><div class='del'>-The PIO synchronous mode supports the most common Z8530 wiring. Here the</div><div class='del'>-chip is interface to the I/O and interrupt facilities of the host</div><div class='del'>-machine but not to the DMA subsystem. When running PIO the Z8530 has</div><div class='del'>-extremely tight timing requirements. Doing high speeds, even with a</div><div class='del'>-Z85230 will be tricky. Typically you should expect to achieve at best</div><div class='del'>-9600 baud with a Z8C530 and 64Kbits with a Z85230.</div><div class='del'>-</div><div class='del'>-The DMA mode supports the chip when it is configured to use dual DMA</div><div class='del'>-channels on an ISA bus. The better cards tend to support this mode of</div><div class='del'>-operation for a single channel. With DMA running the Z85230 tops out</div><div class='del'>-when it starts to hit ISA DMA constraints at about 512Kbits. It is worth</div><div class='del'>-noting here that many PC machines hang or crash when the chip is driven</div><div class='del'>-fast enough to hold the ISA bus solid.</div><div class='del'>-</div><div class='del'>-Transmit DMA mode uses a single DMA channel. The DMA channel is used for</div><div class='del'>-transmission as the transmit FIFO is smaller than the receive FIFO. it</div><div class='del'>-gives better performance than pure PIO mode but is nowhere near as ideal</div><div class='del'>-as pure DMA mode.</div><div class='del'>-</div><div class='del'>-Using the Z85230 driver</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-The Z85230 driver provides the back end interface to your board. To</div><div class='del'>-configure a Z8530 interface you need to detect the board and to identify</div><div class='del'>-its ports and interrupt resources. It is also your problem to verify the</div><div class='del'>-resources are available.</div><div class='del'>-</div><div class='del'>-Having identified the chip you need to fill in a struct z8530_dev,</div><div class='del'>-which describes each chip. This object must exist until you finally</div><div class='del'>-shutdown the board. Firstly zero the active field. This ensures nothing</div><div class='del'>-goes off without you intending it. The irq field should be set to the</div><div class='del'>-interrupt number of the chip. (Each chip has a single interrupt source</div><div class='del'>-rather than each channel). You are responsible for allocating the</div><div class='del'>-interrupt line. The interrupt handler should be set to</div><div class='del'>-:c:func:`z8530_interrupt()`. The device id should be set to the</div><div class='del'>-z8530_dev structure pointer. Whether the interrupt can be shared or not</div><div class='del'>-is board dependent, and up to you to initialise.</div><div class='del'>-</div><div class='del'>-The structure holds two channel structures. Initialise chanA.ctrlio and</div><div class='del'>-chanA.dataio with the address of the control and data ports. You can or</div><div class='del'>-this with Z8530_PORT_SLEEP to indicate your interface needs the 5uS</div><div class='del'>-delay for chip settling done in software. The PORT_SLEEP option is</div><div class='del'>-architecture specific. Other flags may become available on future</div><div class='del'>-platforms, eg for MMIO. Initialise the chanA.irqs to &amp;z8530_nop to</div><div class='del'>-start the chip up as disabled and discarding interrupt events. This</div><div class='del'>-ensures that stray interrupts will be mopped up and not hang the bus.</div><div class='del'>-Set chanA.dev to point to the device structure itself. The private and</div><div class='del'>-name field you may use as you wish. The private field is unused by the</div><div class='del'>-Z85230 layer. The name is used for error reporting and it may thus make</div><div class='del'>-sense to make it match the network name.</div><div class='del'>-</div><div class='del'>-Repeat the same operation with the B channel if your chip has both</div><div class='del'>-channels wired to something useful. This isn't always the case. If it is</div><div class='del'>-not wired then the I/O values do not matter, but you must initialise</div><div class='del'>-chanB.dev.</div><div class='del'>-</div><div class='del'>-If your board has DMA facilities then initialise the txdma and rxdma</div><div class='del'>-fields for the relevant channels. You must also allocate the ISA DMA</div><div class='del'>-channels and do any necessary board level initialisation to configure</div><div class='del'>-them. The low level driver will do the Z8530 and DMA controller</div><div class='del'>-programming but not board specific magic.</div><div class='del'>-</div><div class='del'>-Having initialised the device you can then call</div><div class='del'>-:c:func:`z8530_init()`. This will probe the chip and reset it into</div><div class='del'>-a known state. An identification sequence is then run to identify the</div><div class='del'>-chip type. If the checks fail to pass the function returns a non zero</div><div class='del'>-error code. Typically this indicates that the port given is not valid.</div><div class='del'>-After this call the type field of the z8530_dev structure is</div><div class='del'>-initialised to either Z8530, Z85C30 or Z85230 according to the chip</div><div class='del'>-found.</div><div class='del'>-</div><div class='del'>-Once you have called z8530_init you can also make use of the utility</div><div class='del'>-function :c:func:`z8530_describe()`. This provides a consistent</div><div class='del'>-reporting format for the Z8530 devices, and allows all the drivers to</div><div class='del'>-provide consistent reporting.</div><div class='del'>-</div><div class='del'>-Attaching Network Interfaces</div><div class='del'>-============================</div><div class='del'>-</div><div class='del'>-If you wish to use the network interface facilities of the driver, then</div><div class='del'>-you need to attach a network device to each channel that is present and</div><div class='del'>-in use. In addition to use the generic HDLC you need to follow some</div><div class='del'>-additional plumbing rules. They may seem complex but a look at the</div><div class='del'>-example hostess_sv11 driver should reassure you.</div><div class='del'>-</div><div class='del'>-The network device used for each channel should be pointed to by the</div><div class='del'>-netdevice field of each channel. The hdlc-&gt; priv field of the network</div><div class='del'>-device points to your private data - you will need to be able to find</div><div class='del'>-your private data from this.</div><div class='del'>-</div><div class='del'>-The way most drivers approach this particular problem is to create a</div><div class='del'>-structure holding the Z8530 device definition and put that into the</div><div class='del'>-private field of the network device. The network device fields of the</div><div class='del'>-channels then point back to the network devices.</div><div class='del'>-</div><div class='del'>-If you wish to use the generic HDLC then you need to register the HDLC</div><div class='del'>-device.</div><div class='del'>-</div><div class='del'>-Before you register your network device you will also need to provide</div><div class='del'>-suitable handlers for most of the network device callbacks. See the</div><div class='del'>-network device documentation for more details on this.</div><div class='del'>-</div><div class='del'>-Configuring And Activating The Port</div><div class='del'>-===================================</div><div class='del'>-</div><div class='del'>-The Z85230 driver provides helper functions and tables to load the port</div><div class='del'>-registers on the Z8530 chips. When programming the register settings for</div><div class='del'>-a channel be aware that the documentation recommends initialisation</div><div class='del'>-orders. Strange things happen when these are not followed.</div><div class='del'>-</div><div class='del'>-:c:func:`z8530_channel_load()` takes an array of pairs of</div><div class='del'>-initialisation values in an array of u8 type. The first value is the</div><div class='del'>-Z8530 register number. Add 16 to indicate the alternate register bank on</div><div class='del'>-the later chips. The array is terminated by a 255.</div><div class='del'>-</div><div class='del'>-The driver provides a pair of public tables. The z8530_hdlc_kilostream</div><div class='del'>-table is for the UK 'Kilostream' service and also happens to cover most</div><div class='del'>-other end host configurations. The z8530_hdlc_kilostream_85230 table</div><div class='del'>-is the same configuration using the enhancements of the 85230 chip. The</div><div class='del'>-configuration loaded is standard NRZ encoded synchronous data with HDLC</div><div class='del'>-bitstuffing. All of the timing is taken from the other end of the link.</div><div class='del'>-</div><div class='del'>-When writing your own tables be aware that the driver internally tracks</div><div class='del'>-register values. It may need to reload values. You should therefore be</div><div class='del'>-sure to set registers 1-7, 9-11, 14 and 15 in all configurations. Where</div><div class='del'>-the register settings depend on DMA selection the driver will update the</div><div class='del'>-bits itself when you open or close. Loading a new table with the</div><div class='del'>-interface open is not recommended.</div><div class='del'>-</div><div class='del'>-There are three standard configurations supported by the core code. In</div><div class='del'>-PIO mode the interface is programmed up to use interrupt driven PIO.</div><div class='del'>-This places high demands on the host processor to avoid latency. The</div><div class='del'>-driver is written to take account of latency issues but it cannot avoid</div><div class='del'>-latencies caused by other drivers, notably IDE in PIO mode. Because the</div><div class='del'>-drivers allocate buffers you must also prevent MTU changes while the</div><div class='del'>-port is open.</div><div class='del'>-</div><div class='del'>-Once the port is open it will call the rx_function of each channel</div><div class='del'>-whenever a completed packet arrived. This is invoked from interrupt</div><div class='del'>-context and passes you the channel and a network buffer (struct</div><div class='del'>-sk_buff) holding the data. The data includes the CRC bytes so most</div><div class='del'>-users will want to trim the last two bytes before processing the data.</div><div class='del'>-This function is very timing critical. When you wish to simply discard</div><div class='del'>-data the support code provides the function</div><div class='del'>-:c:func:`z8530_null_rx()` to discard the data.</div><div class='del'>-</div><div class='del'>-To active PIO mode sending and receiving the ``z8530_sync_open`` is called.</div><div class='del'>-This expects to be passed the network device and the channel. Typically</div><div class='del'>-this is called from your network device open callback. On a failure a</div><div class='del'>-non zero error status is returned.</div><div class='del'>-The :c:func:`z8530_sync_close()` function shuts down a PIO</div><div class='del'>-channel. This must be done before the channel is opened again and before</div><div class='del'>-the driver shuts down and unloads.</div><div class='del'>-</div><div class='del'>-The ideal mode of operation is dual channel DMA mode. Here the kernel</div><div class='del'>-driver will configure the board for DMA in both directions. The driver</div><div class='del'>-also handles ISA DMA issues such as controller programming and the</div><div class='del'>-memory range limit for you. This mode is activated by calling the</div><div class='del'>-:c:func:`z8530_sync_dma_open()` function. On failure a non zero</div><div class='del'>-error value is returned. Once this mode is activated it can be shut down</div><div class='del'>-by calling the :c:func:`z8530_sync_dma_close()`. You must call</div><div class='del'>-the close function matching the open mode you used.</div><div class='del'>-</div><div class='del'>-The final supported mode uses a single DMA channel to drive the transmit</div><div class='del'>-side. As the Z85C30 has a larger FIFO on the receive channel this tends</div><div class='del'>-to increase the maximum speed a little. This is activated by calling the</div><div class='del'>-``z8530_sync_txdma_open``. This returns a non zero error code on failure. The</div><div class='del'>-:c:func:`z8530_sync_txdma_close()` function closes down the Z8530</div><div class='del'>-interface from this mode.</div><div class='del'>-</div><div class='del'>-Network Layer Functions</div><div class='del'>-=======================</div><div class='del'>-</div><div class='del'>-The Z8530 layer provides functions to queue packets for transmission.</div><div class='del'>-The driver internally buffers the frame currently being transmitted and</div><div class='del'>-one further frame (in order to keep back to back transmission running).</div><div class='del'>-Any further buffering is up to the caller.</div><div class='del'>-</div><div class='del'>-The function :c:func:`z8530_queue_xmit()` takes a network buffer</div><div class='del'>-in sk_buff format and queues it for transmission. The caller must</div><div class='del'>-provide the entire packet with the exception of the bitstuffing and CRC.</div><div class='del'>-This is normally done by the caller via the generic HDLC interface</div><div class='del'>-layer. It returns 0 if the buffer has been queued and non zero values</div><div class='del'>-for queue full. If the function accepts the buffer it becomes property</div><div class='del'>-of the Z8530 layer and the caller should not free it.</div><div class='del'>-</div><div class='del'>-The function :c:func:`z8530_get_stats()` returns a pointer to an</div><div class='del'>-internally maintained per interface statistics block. This provides most</div><div class='del'>-of the interface code needed to implement the network layer get_stats</div><div class='del'>-callback.</div><div class='del'>-</div><div class='del'>-Porting The Z8530 Driver</div><div class='del'>-========================</div><div class='del'>-</div><div class='del'>-The Z8530 driver is written to be portable. In DMA mode it makes</div><div class='del'>-assumptions about the use of ISA DMA. These are probably warranted in</div><div class='del'>-most cases as the Z85230 in particular was designed to glue to PC type</div><div class='del'>-machines. The PIO mode makes no real assumptions.</div><div class='del'>-</div><div class='del'>-Should you need to retarget the Z8530 driver to another architecture the</div><div class='del'>-only code that should need changing are the port I/O functions. At the</div><div class='del'>-moment these assume PC I/O port accesses. This may not be appropriate</div><div class='del'>-for all platforms. Replacing :c:func:`z8530_read_port()` and</div><div class='del'>-``z8530_write_port`` is intended to be all that is required to port</div><div class='del'>-this driver layer.</div><div class='del'>-</div><div class='del'>-Known Bugs And Assumptions</div><div class='del'>-==========================</div><div class='del'>-</div><div class='del'>-Interrupt Locking</div><div class='del'>-    The locking in the driver is done via the global cli/sti lock. This</div><div class='del'>-    makes for relatively poor SMP performance. Switching this to use a</div><div class='del'>-    per device spin lock would probably materially improve performance.</div><div class='del'>-</div><div class='del'>-Occasional Failures</div><div class='del'>-    We have reports of occasional failures when run for very long</div><div class='del'>-    periods of time and the driver starts to receive junk frames. At the</div><div class='del'>-    moment the cause of this is not clear.</div><div class='del'>-</div><div class='del'>-Public Functions Provided</div><div class='del'>-=========================</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: drivers/net/wan/z85230.c</div><div class='del'>-   :export:</div><div class='del'>-</div><div class='del'>-Internal Functions</div><div class='del'>-==================</div><div class='del'>-</div><div class='del'>-.. kernel-doc:: drivers/net/wan/z85230.c</div><div class='del'>-   :internal:</div><div class='head'>diff --git a/Documentation/networking/device_drivers/wwan/index.rst b/Documentation/networking/device_drivers/wwan/index.rst<br/>index 1cb8c7371401..370d8264d5dc 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/wwan/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/wwan/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/wwan/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/wwan/index.rst</a></div><div class='hunk'>@@ -9,6 +9,7 @@ Contents:</div><div class='ctx'>    :maxdepth: 2</div><div class='ctx'> </div><div class='ctx'>    iosm</div><div class='add'>+   t7xx</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/device_drivers/wwan/iosm.rst b/Documentation/networking/device_drivers/wwan/iosm.rst<br/>index aceb0223eb46..6f9e955af984 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/wwan/iosm.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/device_drivers/wwan/iosm.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/wwan/iosm.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/wwan/iosm.rst</a></div><div class='hunk'>@@ -69,7 +69,7 @@ wwan0-X network device</div><div class='ctx'> The IOSM driver exposes IP link interface "wwan0-X" of type "wwan" for IP</div><div class='ctx'> traffic. Iproute network utility is used for creating "wwan0-X" network</div><div class='ctx'> interface and for associating it with MBIM IP session. The Driver supports</div><div class='del'>-upto 8 IP sessions for simultaneous IP communication.</div><div class='add'>+up to 8 IP sessions for simultaneous IP communication.</div><div class='ctx'> </div><div class='ctx'> The userspace management application is responsible for creating new IP link</div><div class='ctx'> prior to establishing MBIM IP session where the SessionId is greater than 0.</div><div class='head'>diff --git a/Documentation/networking/device_drivers/wwan/t7xx.rst b/Documentation/networking/device_drivers/wwan/t7xx.rst<br/>new file mode 100644<br/>index 000000000000..dd5b731957ca<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/device_drivers/wwan/t7xx.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/device_drivers/wwan/t7xx.rst</a></div><div class='hunk'>@@ -0,0 +1,120 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0-only</div><div class='add'>+</div><div class='add'>+.. Copyright (C) 2020-21 Intel Corporation</div><div class='add'>+</div><div class='add'>+.. _t7xx_driver_doc:</div><div class='add'>+</div><div class='add'>+============================================</div><div class='add'>+t7xx driver for MTK PCIe based T700 5G modem</div><div class='add'>+============================================</div><div class='add'>+The t7xx driver is a WWAN PCIe host driver developed for linux or Chrome OS platforms</div><div class='add'>+for data exchange over PCIe interface between Host platform &amp; MediaTek's T700 5G modem.</div><div class='add'>+The driver exposes an interface conforming to the MBIM protocol [1]. Any front end</div><div class='add'>+application (e.g. Modem Manager) could easily manage the MBIM interface to enable</div><div class='add'>+data communication towards WWAN. The driver also provides an interface to interact</div><div class='add'>+with the MediaTek's modem via AT commands.</div><div class='add'>+</div><div class='add'>+Basic usage</div><div class='add'>+===========</div><div class='add'>+MBIM &amp; AT functions are inactive when unmanaged. The t7xx driver provides</div><div class='add'>+WWAN port userspace interfaces representing MBIM &amp; AT control channels and does</div><div class='add'>+not play any role in managing their functionality. It is the job of a userspace</div><div class='add'>+application to detect port enumeration and enable MBIM &amp; AT functionalities.</div><div class='add'>+</div><div class='add'>+Examples of few such userspace applications are:</div><div class='add'>+</div><div class='add'>+- mbimcli (included with the libmbim [2] library), and</div><div class='add'>+- Modem Manager [3]</div><div class='add'>+</div><div class='add'>+Management Applications to carry out below required actions for establishing</div><div class='add'>+MBIM IP session:</div><div class='add'>+</div><div class='add'>+- open the MBIM control channel</div><div class='add'>+- configure network connection settings</div><div class='add'>+- connect to network</div><div class='add'>+- configure IP network interface</div><div class='add'>+</div><div class='add'>+Management Applications to carry out below required actions for send an AT</div><div class='add'>+command and receive response:</div><div class='add'>+</div><div class='add'>+- open the AT control channel using a UART tool or a special user tool</div><div class='add'>+</div><div class='add'>+Management application development</div><div class='add'>+==================================</div><div class='add'>+The driver and userspace interfaces are described below. The MBIM protocol is</div><div class='add'>+described in [1] Mobile Broadband Interface Model v1.0 Errata-1.</div><div class='add'>+</div><div class='add'>+MBIM control channel userspace ABI</div><div class='add'>+----------------------------------</div><div class='add'>+</div><div class='add'>+/dev/wwan0mbim0 character device</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+The driver exposes an MBIM interface to the MBIM function by implementing</div><div class='add'>+MBIM WWAN Port. The userspace end of the control channel pipe is a</div><div class='add'>+/dev/wwan0mbim0 character device. Application shall use this interface for</div><div class='add'>+MBIM protocol communication.</div><div class='add'>+</div><div class='add'>+Fragmentation</div><div class='add'>+~~~~~~~~~~~~~</div><div class='add'>+The userspace application is responsible for all control message fragmentation</div><div class='add'>+and defragmentation as per MBIM specification.</div><div class='add'>+</div><div class='add'>+/dev/wwan0mbim0 write()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+The MBIM control messages from the management application must not exceed the</div><div class='add'>+negotiated control message size.</div><div class='add'>+</div><div class='add'>+/dev/wwan0mbim0 read()</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+The management application must accept control messages of up the negotiated</div><div class='add'>+control message size.</div><div class='add'>+</div><div class='add'>+MBIM data channel userspace ABI</div><div class='add'>+-------------------------------</div><div class='add'>+</div><div class='add'>+wwan0-X network device</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+The t7xx driver exposes IP link interface "wwan0-X" of type "wwan" for IP</div><div class='add'>+traffic. Iproute network utility is used for creating "wwan0-X" network</div><div class='add'>+interface and for associating it with MBIM IP session.</div><div class='add'>+</div><div class='add'>+The userspace management application is responsible for creating new IP link</div><div class='add'>+prior to establishing MBIM IP session where the SessionId is greater than 0.</div><div class='add'>+</div><div class='add'>+For example, creating new IP link for a MBIM IP session with SessionId 1:</div><div class='add'>+</div><div class='add'>+  ip link add dev wwan0-1 parentdev wwan0 type wwan linkid 1</div><div class='add'>+</div><div class='add'>+The driver will automatically map the "wwan0-1" network device to MBIM IP</div><div class='add'>+session 1.</div><div class='add'>+</div><div class='add'>+AT port userspace ABI</div><div class='add'>+----------------------------------</div><div class='add'>+</div><div class='add'>+/dev/wwan0at0 character device</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='add'>+The driver exposes an AT port by implementing AT WWAN Port.</div><div class='add'>+The userspace end of the control port is a /dev/wwan0at0 character</div><div class='add'>+device. Application shall use this interface to issue AT commands.</div><div class='add'>+</div><div class='add'>+The MediaTek's T700 modem supports the 3GPP TS 27.007 [4] specification.</div><div class='add'>+</div><div class='add'>+References</div><div class='add'>+==========</div><div class='add'>+[1] *MBIM (Mobile Broadband Interface Model) Errata-1*</div><div class='add'>+</div><div class='add'>+- https://www.usb.org/document-library/</div><div class='add'>+</div><div class='add'>+[2] *libmbim "a glib-based library for talking to WWAN modems and devices which</div><div class='add'>+speak the Mobile Interface Broadband Model (MBIM) protocol"*</div><div class='add'>+</div><div class='add'>+- http://www.freedesktop.org/wiki/Software/libmbim/</div><div class='add'>+</div><div class='add'>+[3] *Modem Manager "a DBus-activated daemon which controls mobile broadband</div><div class='add'>+(2G/3G/4G/5G) devices and connections"*</div><div class='add'>+</div><div class='add'>+- http://www.freedesktop.org/wiki/Software/ModemManager/</div><div class='add'>+</div><div class='add'>+[4] *Specification # 27.007 - 3GPP*</div><div class='add'>+</div><div class='add'>+- https://www.3gpp.org/DynaReport/27007.htm</div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-health.rst b/Documentation/networking/devlink/devlink-health.rst<br/>index e37f77734b5b..e0b8cfed610a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-health.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/devlink-health.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-health.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/devlink-health.rst</a></div><div class='hunk'>@@ -33,7 +33,7 @@ Device driver can provide specific callbacks for each "health reporter", e.g.:</div><div class='ctx'>   * Recovery procedures</div><div class='ctx'>   * Diagnostics procedures</div><div class='ctx'>   * Object dump procedures</div><div class='del'>-  * OOB initial parameters</div><div class='add'>+  * Out Of Box initial parameters</div><div class='ctx'> </div><div class='ctx'> Different parts of the driver can register different types of health reporters</div><div class='ctx'> with different handlers.</div><div class='hunk'>@@ -46,12 +46,31 @@ Once an error is reported, devlink health will perform the following actions:</div><div class='ctx'>   * A log is being send to the kernel trace events buffer</div><div class='ctx'>   * Health status and statistics are being updated for the reporter instance</div><div class='ctx'>   * Object dump is being taken and saved at the reporter instance (as long as</div><div class='del'>-    there is no other dump which is already stored)</div><div class='add'>+    auto-dump is set and there is no other dump which is already stored)</div><div class='ctx'>   * Auto recovery attempt is being done. Depends on:</div><div class='ctx'> </div><div class='ctx'>     - Auto-recovery configuration</div><div class='ctx'>     - Grace period vs. time passed since last recover</div><div class='ctx'> </div><div class='add'>+Devlink formatted message</div><div class='add'>+=========================</div><div class='add'>+</div><div class='add'>+To handle devlink health diagnose and health dump requests, devlink creates a</div><div class='add'>+formatted message structure ``devlink_fmsg`` and send it to the driver's callback</div><div class='add'>+to fill the data in using the devlink fmsg API.</div><div class='add'>+</div><div class='add'>+Devlink fmsg is a mechanism to pass descriptors between drivers and devlink, in</div><div class='add'>+json-like format. The API allows the driver to add nested attributes such as</div><div class='add'>+object, object pair and value array, in addition to attributes such as name and</div><div class='add'>+value.</div><div class='add'>+</div><div class='add'>+Driver should use this API to fill the fmsg context in a format which will be</div><div class='add'>+translated by the devlink to the netlink message later. When it needs to send</div><div class='add'>+the data using SKBs to the netlink layer, it fragments the data between</div><div class='add'>+different SKBs. In order to do this fragmentation, it uses virtual nests</div><div class='add'>+attributes, to avoid actual nesting use which cannot be divided between</div><div class='add'>+different SKBs.</div><div class='add'>+</div><div class='ctx'> User Interface</div><div class='ctx'> ==============</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-info.rst b/Documentation/networking/devlink/devlink-info.rst<br/>index 7572bf6de5c1..1242b0e6826b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-info.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/devlink-info.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-info.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/devlink-info.rst</a></div><div class='hunk'>@@ -198,6 +198,11 @@ fw.bundle_id</div><div class='ctx'> </div><div class='ctx'> Unique identifier of the entire firmware bundle.</div><div class='ctx'> </div><div class='add'>+fw.bootloader</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+Version of the bootloader.</div><div class='add'>+</div><div class='ctx'> Future work</div><div class='ctx'> ===========</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-linecard.rst b/Documentation/networking/devlink/devlink-linecard.rst<br/>new file mode 100644<br/>index 000000000000..6c0b8928bc13<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-linecard.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/devlink-linecard.rst</a></div><div class='hunk'>@@ -0,0 +1,122 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+=================</div><div class='add'>+Devlink Line card</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+Background</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+The ``devlink-linecard`` mechanism is targeted for manipulation of</div><div class='add'>+line cards that serve as a detachable PHY modules for modular switch</div><div class='add'>+system. Following operations are provided:</div><div class='add'>+</div><div class='add'>+  * Get a list of supported line card types.</div><div class='add'>+  * Provision of a slot with specific line card type.</div><div class='add'>+  * Get and monitor of line card state and its change.</div><div class='add'>+</div><div class='add'>+Line card according to the type may contain one or more gearboxes</div><div class='add'>+to mux the lanes with certain speed to multiple ports with lanes</div><div class='add'>+of different speed. Line card ensures N:M mapping between</div><div class='add'>+the switch ASIC modules and physical front panel ports.</div><div class='add'>+</div><div class='add'>+Overview</div><div class='add'>+========</div><div class='add'>+</div><div class='add'>+Each line card devlink object is created by device driver,</div><div class='add'>+according to the physical line card slots available on the device.</div><div class='add'>+</div><div class='add'>+Similar to splitter cable, where the device might have no way</div><div class='add'>+of detection of the splitter cable geometry, the device</div><div class='add'>+might not have a way to detect line card type. For that devices,</div><div class='add'>+concept of provisioning is introduced. It allows the user to:</div><div class='add'>+</div><div class='add'>+  * Provision a line card slot with certain line card type</div><div class='add'>+</div><div class='add'>+    - Device driver would instruct the ASIC to prepare all</div><div class='add'>+      resources accordingly. The device driver would</div><div class='add'>+      create all instances, namely devlink port and netdevices</div><div class='add'>+      that reside on the line card, according to the line card type</div><div class='add'>+  * Manipulate of line card entities even without line card</div><div class='add'>+    being physically connected or powered-up</div><div class='add'>+  * Setup splitter cable on line card ports</div><div class='add'>+</div><div class='add'>+    - As on the ordinary ports, user may provision a splitter</div><div class='add'>+      cable of a certain type, without the need to</div><div class='add'>+      be physically connected to the port</div><div class='add'>+  * Configure devlink ports and netdevices</div><div class='add'>+</div><div class='add'>+Netdevice carrier is decided as follows:</div><div class='add'>+</div><div class='add'>+  * Line card is not inserted or powered-down</div><div class='add'>+</div><div class='add'>+    - The carrier is always down</div><div class='add'>+  * Line card is inserted and powered up</div><div class='add'>+</div><div class='add'>+    - The carrier is decided as for ordinary port netdevice</div><div class='add'>+</div><div class='add'>+Line card state</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+The ``devlink-linecard`` mechanism supports the following line card states:</div><div class='add'>+</div><div class='add'>+  * ``unprovisioned``: Line card is not provisioned on the slot.</div><div class='add'>+  * ``unprovisioning``: Line card slot is currently being unprovisioned.</div><div class='add'>+  * ``provisioning``: Line card slot is currently in a process of being provisioned</div><div class='add'>+    with a line card type.</div><div class='add'>+  * ``provisioning_failed``: Provisioning was not successful.</div><div class='add'>+  * ``provisioned``: Line card slot is provisioned with a type.</div><div class='add'>+  * ``active``: Line card is powered-up and active.</div><div class='add'>+</div><div class='add'>+The following diagram provides a general overview of ``devlink-linecard``</div><div class='add'>+state transitions::</div><div class='add'>+</div><div class='add'>+                                          +-------------------------+</div><div class='add'>+                                          |                         |</div><div class='add'>+       +----------------------------------&gt;      unprovisioned      |</div><div class='add'>+       |                                  |                         |</div><div class='add'>+       |                                  +--------|-------^--------+</div><div class='add'>+       |                                           |       |</div><div class='add'>+       |                                           |       |</div><div class='add'>+       |                                  +--------v-------|--------+</div><div class='add'>+       |                                  |                         |</div><div class='add'>+       |                                  |       provisioning      |</div><div class='add'>+       |                                  |                         |</div><div class='add'>+       |                                  +------------|------------+</div><div class='add'>+       |                                               |</div><div class='add'>+       |                 +-----------------------------+</div><div class='add'>+       |                 |                             |</div><div class='add'>+       |    +------------v------------+   +------------v------------+   +-------------------------+</div><div class='add'>+       |    |                         |   |                         ----&gt;                         |</div><div class='add'>+       +-----   provisioning_failed   |   |       provisioned       |   |         active          |</div><div class='add'>+       |    |                         |   |                         &lt;----                         |</div><div class='add'>+       |    +------------^------------+   +------------|------------+   +-------------------------+</div><div class='add'>+       |                 |                             |</div><div class='add'>+       |                 |                             |</div><div class='add'>+       |                 |                +------------v------------+</div><div class='add'>+       |                 |                |                         |</div><div class='add'>+       |                 |                |     unprovisioning      |</div><div class='add'>+       |                 |                |                         |</div><div class='add'>+       |                 |                +------------|------------+</div><div class='add'>+       |                 |                             |</div><div class='add'>+       |                 +-----------------------------+</div><div class='add'>+       |                                               |</div><div class='add'>+       +-----------------------------------------------+</div><div class='add'>+</div><div class='add'>+</div><div class='add'>+Example usage</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+.. code:: shell</div><div class='add'>+</div><div class='add'>+    $ devlink lc show [ DEV [ lc LC_INDEX ] ]</div><div class='add'>+    $ devlink lc set DEV lc LC_INDEX [ { type LC_TYPE | notype } ]</div><div class='add'>+</div><div class='add'>+    # Show current line card configuration and status for all slots:</div><div class='add'>+    $ devlink lc</div><div class='add'>+</div><div class='add'>+    # Set slot 8 to be provisioned with type "16x100G":</div><div class='add'>+    $ devlink lc set pci/0000:01:00.0 lc 8 type 16x100G</div><div class='add'>+</div><div class='add'>+    # Set slot 8 to be unprovisioned:</div><div class='add'>+    $ devlink lc set pci/0000:01:00.0 lc 8 notype</div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-port.rst b/Documentation/networking/devlink/devlink-port.rst<br/>index 7627b1da01f2..3da590953ce8 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-port.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/devlink-port.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-port.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/devlink-port.rst</a></div><div class='hunk'>@@ -110,7 +110,7 @@ devlink ports for both the controllers.</div><div class='ctx'> Function configuration</div><div class='ctx'> ======================</div><div class='ctx'> </div><div class='del'>-A user can configure the function attribute before enumerating the PCI</div><div class='add'>+Users can configure one or more function attributes before enumerating the PCI</div><div class='ctx'> function. Usually it means, user should configure function attribute</div><div class='ctx'> before a bus specific device for the function is created. However, when</div><div class='ctx'> SRIOV is enabled, virtual function devices are created on the PCI bus.</div><div class='hunk'>@@ -119,9 +119,127 @@ function device to the driver. For subfunctions, this means user should</div><div class='ctx'> configure port function attribute before activating the port function.</div><div class='ctx'> </div><div class='ctx'> A user may set the hardware address of the function using</div><div class='del'>-'devlink port function set hw_addr' command. For Ethernet port function</div><div class='add'>+`devlink port function set hw_addr` command. For Ethernet port function</div><div class='ctx'> this means a MAC address.</div><div class='ctx'> </div><div class='add'>+Users may also set the RoCE capability of the function using</div><div class='add'>+`devlink port function set roce` command.</div><div class='add'>+</div><div class='add'>+Users may also set the function as migratable using</div><div class='add'>+'devlink port function set migratable' command.</div><div class='add'>+</div><div class='add'>+Function attributes</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+MAC address setup</div><div class='add'>+-----------------</div><div class='add'>+The configured MAC address of the PCI VF/SF will be used by netdevice and rdma</div><div class='add'>+device created for the PCI VF/SF.</div><div class='add'>+</div><div class='add'>+- Get the MAC address of the VF identified by its unique devlink port index::</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+      function:</div><div class='add'>+        hw_addr 00:00:00:00:00:00</div><div class='add'>+</div><div class='add'>+- Set the MAC address of the VF identified by its unique devlink port index::</div><div class='add'>+</div><div class='add'>+    $ devlink port function set pci/0000:06:00.0/2 hw_addr 00:11:22:33:44:55</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+      function:</div><div class='add'>+        hw_addr 00:11:22:33:44:55</div><div class='add'>+</div><div class='add'>+- Get the MAC address of the SF identified by its unique devlink port index::</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/32768</div><div class='add'>+    pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcisf pfnum 0 sfnum 88</div><div class='add'>+      function:</div><div class='add'>+        hw_addr 00:00:00:00:00:00</div><div class='add'>+</div><div class='add'>+- Set the MAC address of the SF identified by its unique devlink port index::</div><div class='add'>+</div><div class='add'>+    $ devlink port function set pci/0000:06:00.0/32768 hw_addr 00:00:00:00:88:88</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/32768</div><div class='add'>+    pci/0000:06:00.0/32768: type eth netdev enp6s0pf0sf88 flavour pcisf pfnum 0 sfnum 88</div><div class='add'>+      function:</div><div class='add'>+        hw_addr 00:00:00:00:88:88</div><div class='add'>+</div><div class='add'>+RoCE capability setup</div><div class='add'>+---------------------</div><div class='add'>+Not all PCI VFs/SFs require RoCE capability.</div><div class='add'>+</div><div class='add'>+When RoCE capability is disabled, it saves system memory per PCI VF/SF.</div><div class='add'>+</div><div class='add'>+When user disables RoCE capability for a VF/SF, user application cannot send or</div><div class='add'>+receive any RoCE packets through this VF/SF and RoCE GID table for this PCI</div><div class='add'>+will be empty.</div><div class='add'>+</div><div class='add'>+When RoCE capability is disabled in the device using port function attribute,</div><div class='add'>+VF/SF driver cannot override it.</div><div class='add'>+</div><div class='add'>+- Get RoCE capability of the VF device::</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+        function:</div><div class='add'>+            hw_addr 00:00:00:00:00:00 roce enable</div><div class='add'>+</div><div class='add'>+- Set RoCE capability of the VF device::</div><div class='add'>+</div><div class='add'>+    $ devlink port function set pci/0000:06:00.0/2 roce disable</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+        function:</div><div class='add'>+            hw_addr 00:00:00:00:00:00 roce disable</div><div class='add'>+</div><div class='add'>+migratable capability setup</div><div class='add'>+---------------------------</div><div class='add'>+Live migration is the process of transferring a live virtual machine</div><div class='add'>+from one physical host to another without disrupting its normal</div><div class='add'>+operation.</div><div class='add'>+</div><div class='add'>+User who want PCI VFs to be able to perform live migration need to</div><div class='add'>+explicitly enable the VF migratable capability.</div><div class='add'>+</div><div class='add'>+When user enables migratable capability for a VF, and the HV binds the VF to VFIO driver</div><div class='add'>+with migration support, the user can migrate the VM with this VF from one HV to a</div><div class='add'>+different one.</div><div class='add'>+</div><div class='add'>+However, when migratable capability is enable, device will disable features which cannot</div><div class='add'>+be migrated. Thus migratable cap can impose limitations on a VF so let the user decide.</div><div class='add'>+</div><div class='add'>+Example of LM with migratable function configuration:</div><div class='add'>+- Get migratable capability of the VF device::</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+        function:</div><div class='add'>+            hw_addr 00:00:00:00:00:00 migratable disable</div><div class='add'>+</div><div class='add'>+- Set migratable capability of the VF device::</div><div class='add'>+</div><div class='add'>+    $ devlink port function set pci/0000:06:00.0/2 migratable enable</div><div class='add'>+</div><div class='add'>+    $ devlink port show pci/0000:06:00.0/2</div><div class='add'>+    pci/0000:06:00.0/2: type eth netdev enp6s0pf0vf1 flavour pcivf pfnum 0 vfnum 1</div><div class='add'>+        function:</div><div class='add'>+            hw_addr 00:00:00:00:00:00 migratable enable</div><div class='add'>+</div><div class='add'>+- Bind VF to VFIO driver with migration support::</div><div class='add'>+</div><div class='add'>+    $ echo &lt;pci_id&gt; &gt; /sys/bus/pci/devices/0000:08:00.0/driver/unbind</div><div class='add'>+    $ echo mlx5_vfio_pci &gt; /sys/bus/pci/devices/0000:08:00.0/driver_override</div><div class='add'>+    $ echo &lt;pci_id&gt; &gt; /sys/bus/pci/devices/0000:08:00.0/driver/bind</div><div class='add'>+</div><div class='add'>+Attach VF to the VM.</div><div class='add'>+Start the VM.</div><div class='add'>+Perform live migration.</div><div class='add'>+</div><div class='ctx'> Subfunction</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='hunk'>@@ -130,10 +248,11 @@ it is deployed. Subfunction is created and deployed in unit of 1. Unlike</div><div class='ctx'> SRIOV VFs, a subfunction doesn't require its own PCI virtual function.</div><div class='ctx'> A subfunction communicates with the hardware through the parent PCI function.</div><div class='ctx'> </div><div class='del'>-To use a subfunction, 3 steps setup sequence is followed.</div><div class='del'>-(1) create - create a subfunction;</div><div class='del'>-(2) configure - configure subfunction attributes;</div><div class='del'>-(3) deploy - deploy the subfunction;</div><div class='add'>+To use a subfunction, 3 steps setup sequence is followed:</div><div class='add'>+</div><div class='add'>+1) create - create a subfunction;</div><div class='add'>+2) configure - configure subfunction attributes;</div><div class='add'>+3) deploy - deploy the subfunction;</div><div class='ctx'> </div><div class='ctx'> Subfunction management is done using devlink port user interface.</div><div class='ctx'> User performs setup on the subfunction management device.</div><div class='hunk'>@@ -191,13 +310,48 @@ API allows to configure following rate object's parameters:</div><div class='ctx'> ``tx_max``</div><div class='ctx'>   Maximum TX rate value.</div><div class='ctx'> </div><div class='add'>+``tx_priority``</div><div class='add'>+  Allows for usage of strict priority arbiter among siblings. This</div><div class='add'>+  arbitration scheme attempts to schedule nodes based on their priority</div><div class='add'>+  as long as the nodes remain within their bandwidth limit. The higher the</div><div class='add'>+  priority the higher the probability that the node will get selected for</div><div class='add'>+  scheduling.</div><div class='add'>+</div><div class='add'>+``tx_weight``</div><div class='add'>+  Allows for usage of Weighted Fair Queuing arbitration scheme among</div><div class='add'>+  siblings. This arbitration scheme can be used simultaneously with the</div><div class='add'>+  strict priority. As a node is configured with a higher rate it gets more</div><div class='add'>+  BW relative to it's siblings. Values are relative like a percentage</div><div class='add'>+  points, they basically tell how much BW should node take relative to</div><div class='add'>+  it's siblings.</div><div class='add'>+</div><div class='ctx'> ``parent``</div><div class='ctx'>   Parent node name. Parent node rate limits are considered as additional limits</div><div class='ctx'>   to all node children limits. ``tx_max`` is an upper limit for children.</div><div class='ctx'>   ``tx_share`` is a total bandwidth distributed among children.</div><div class='ctx'> </div><div class='add'>+``tx_priority`` and ``tx_weight`` can be used simultaneously. In that case</div><div class='add'>+nodes with the same priority form a WFQ subgroup in the sibling group</div><div class='add'>+and arbitration among them is based on assigned weights.</div><div class='add'>+</div><div class='add'>+Arbitration flow from the high level:</div><div class='add'>+</div><div class='add'>+#. Choose a node, or group of nodes with the highest priority that stays</div><div class='add'>+   within the BW limit and are not blocked. Use ``tx_priority`` as a</div><div class='add'>+   parameter for this arbitration.</div><div class='add'>+</div><div class='add'>+#. If group of nodes have the same priority perform WFQ arbitration on</div><div class='add'>+   that subgroup. Use ``tx_weight`` as a parameter for this arbitration.</div><div class='add'>+</div><div class='add'>+#. Select the winner node, and continue arbitration flow among it's children,</div><div class='add'>+   until leaf node is reached, and the winner is established.</div><div class='add'>+</div><div class='add'>+#. If all the nodes from the highest priority sub-group are satisfied, or</div><div class='add'>+   overused their assigned BW, move to the lower priority nodes.</div><div class='add'>+</div><div class='ctx'> Driver implementations are allowed to support both or either rate object types</div><div class='del'>-and setting methods of their parameters.</div><div class='add'>+and setting methods of their parameters. Additionally driver implementation</div><div class='add'>+may export nodes/leafs and their child-parent relationships.</div><div class='ctx'> </div><div class='ctx'> Terms and Definitions</div><div class='ctx'> =====================</div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-region.rst b/Documentation/networking/devlink/devlink-region.rst<br/>index f06dca9a1eb6..9232cd7da301 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-region.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/devlink-region.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-region.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/devlink-region.rst</a></div><div class='hunk'>@@ -31,6 +31,15 @@ in its ``devlink_region_ops`` structure. If snapshot id is not set in</div><div class='ctx'> the ``DEVLINK_CMD_REGION_NEW`` request kernel will allocate one and send</div><div class='ctx'> the snapshot information to user space.</div><div class='ctx'> </div><div class='add'>+Regions may optionally allow directly reading from their contents without a</div><div class='add'>+snapshot. Direct read requests are not atomic. In particular a read request</div><div class='add'>+of size 256 bytes or larger will be split into multiple chunks. If atomic</div><div class='add'>+access is required, use a snapshot. A driver wishing to enable this for a</div><div class='add'>+region should implement the ``.read`` callback in the ``devlink_region_ops``</div><div class='add'>+structure. User space can request a direct read by using the</div><div class='add'>+``DEVLINK_ATTR_REGION_DIRECT`` attribute instead of specifying a snapshot</div><div class='add'>+id.</div><div class='add'>+</div><div class='ctx'> example usage</div><div class='ctx'> -------------</div><div class='ctx'> </div><div class='hunk'>@@ -65,6 +74,10 @@ example usage</div><div class='ctx'>     $ devlink region read pci/0000:00:05.0/fw-health snapshot 1 address 0 length 16</div><div class='ctx'>     0000000000000000 0014 95dc 0014 9514 0035 1670 0034 db30</div><div class='ctx'> </div><div class='add'>+    # Read from the region without a snapshot</div><div class='add'>+    $ devlink region read pci/0000:00:05.0/fw-health address 16 length 16</div><div class='add'>+    0000000000000010 0000 0000 ffff ff04 0029 8c00 0028 8cc8</div><div class='add'>+</div><div class='ctx'> As regions are likely very device or driver specific, no generic regions are</div><div class='ctx'> defined. See the driver-specific documentation files for information on the</div><div class='ctx'> specific regions a driver supports.</div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-selftests.rst b/Documentation/networking/devlink/devlink-selftests.rst<br/>new file mode 100644<br/>index 000000000000..c0aa1f3aef0d<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-selftests.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/devlink-selftests.rst</a></div><div class='hunk'>@@ -0,0 +1,38 @@</div><div class='add'>+.. SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)</div><div class='add'>+</div><div class='add'>+=================</div><div class='add'>+Devlink Selftests</div><div class='add'>+=================</div><div class='add'>+</div><div class='add'>+The ``devlink-selftests`` API allows executing selftests on the device.</div><div class='add'>+</div><div class='add'>+Tests Mask</div><div class='add'>+==========</div><div class='add'>+The ``devlink-selftests`` command should be run with a mask indicating</div><div class='add'>+the tests to be executed.</div><div class='add'>+</div><div class='add'>+Tests Description</div><div class='add'>+=================</div><div class='add'>+The following is a list of tests that drivers may execute.</div><div class='add'>+</div><div class='add'>+.. list-table:: List of tests</div><div class='add'>+   :widths: 5 90</div><div class='add'>+</div><div class='add'>+   * - Name</div><div class='add'>+     - Description</div><div class='add'>+   * - ``DEVLINK_SELFTEST_FLASH``</div><div class='add'>+     - Devices may have the firmware on non-volatile memory on the board, e.g.</div><div class='add'>+       flash. This particular test helps to run a flash selftest on the device.</div><div class='add'>+       Implementation of the test is left to the driver/firmware.</div><div class='add'>+</div><div class='add'>+example usage</div><div class='add'>+-------------</div><div class='add'>+</div><div class='add'>+.. code:: shell</div><div class='add'>+</div><div class='add'>+    # Query selftests supported on the devlink device</div><div class='add'>+    $ devlink dev selftests show DEV</div><div class='add'>+    # Query selftests supported on all devlink devices</div><div class='add'>+    $ devlink dev selftests show</div><div class='add'>+    # Executes selftests on the device</div><div class='add'>+    $ devlink dev selftests run DEV id flash</div><div class='head'>diff --git a/Documentation/networking/devlink/devlink-trap.rst b/Documentation/networking/devlink/devlink-trap.rst<br/>index 90d1381b88de..2c14dfe69b3a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-trap.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/devlink-trap.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/devlink-trap.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/devlink-trap.rst</a></div><div class='hunk'>@@ -485,6 +485,16 @@ be added to the following table:</div><div class='ctx'>      - Traps incoming packets that the device decided to drop because</div><div class='ctx'>        the destination MAC is not configured in the MAC table and</div><div class='ctx'>        the interface is not in promiscuous mode</div><div class='add'>+   * - ``eapol``</div><div class='add'>+     - ``control``</div><div class='add'>+     - Traps "Extensible Authentication Protocol over LAN" (EAPOL) packets</div><div class='add'>+       specified in IEEE 802.1X</div><div class='add'>+   * - ``locked_port``</div><div class='add'>+     - ``drop``</div><div class='add'>+     - Traps packets that the device decided to drop because they failed the</div><div class='add'>+       locked bridge port check. That is, packets that were received via a</div><div class='add'>+       locked port and whose {SMAC, VID} does not correspond to an FDB entry</div><div class='add'>+       pointing to the port</div><div class='ctx'> </div><div class='ctx'> Driver-specific Packet Traps</div><div class='ctx'> ============================</div><div class='hunk'>@@ -589,6 +599,9 @@ narrow. The description of these groups must be added to the following table:</div><div class='ctx'>    * - ``parser_error_drops``</div><div class='ctx'>      - Contains packet traps for packets that were marked by the device during</div><div class='ctx'>        parsing as erroneous</div><div class='add'>+   * - ``eapol``</div><div class='add'>+     - Contains packet traps for "Extensible Authentication Protocol over LAN"</div><div class='add'>+       (EAPOL) packets specified in IEEE 802.1X</div><div class='ctx'> </div><div class='ctx'> Packet Trap Policers</div><div class='ctx'> ====================</div><div class='head'>diff --git a/Documentation/networking/devlink/etas_es58x.rst b/Documentation/networking/devlink/etas_es58x.rst<br/>new file mode 100644<br/>index 000000000000..3b857d82a44c<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/etas_es58x.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/etas_es58x.rst</a></div><div class='hunk'>@@ -0,0 +1,36 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+==========================</div><div class='add'>+etas_es58x devlink support</div><div class='add'>+==========================</div><div class='add'>+</div><div class='add'>+This document describes the devlink features implemented by the</div><div class='add'>+``etas_es58x`` device driver.</div><div class='add'>+</div><div class='add'>+Info versions</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+The ``etas_es58x`` driver reports the following versions</div><div class='add'>+</div><div class='add'>+.. list-table:: devlink info versions implemented</div><div class='add'>+   :widths: 5 5 90</div><div class='add'>+</div><div class='add'>+   * - Name</div><div class='add'>+     - Type</div><div class='add'>+     - Description</div><div class='add'>+   * - ``fw``</div><div class='add'>+     - running</div><div class='add'>+     - Version of the firmware running on the device. Also available</div><div class='add'>+       through ``ethtool -i`` as the first member of the</div><div class='add'>+       ``firmware-version``.</div><div class='add'>+   * - ``fw.bootloader``</div><div class='add'>+     - running</div><div class='add'>+     - Version of the bootloader running on the device. Also available</div><div class='add'>+       through ``ethtool -i`` as the second member of the</div><div class='add'>+       ``firmware-version``.</div><div class='add'>+   * - ``board.rev``</div><div class='add'>+     - fixed</div><div class='add'>+     - The hardware revision of the device.</div><div class='add'>+   * - ``serial_number``</div><div class='add'>+     - fixed</div><div class='add'>+     - The USB serial number. Also available through ``lsusb -v``.</div><div class='head'>diff --git a/Documentation/networking/devlink/ice.rst b/Documentation/networking/devlink/ice.rst<br/>index 8c082b139bbd..2f60e34ab926 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/ice.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/ice.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/ice.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/ice.rst</a></div><div class='hunk'>@@ -7,6 +7,21 @@ ice devlink support</div><div class='ctx'> This document describes the devlink features implemented by the ``ice``</div><div class='ctx'> device driver.</div><div class='ctx'> </div><div class='add'>+Parameters</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+.. list-table:: Generic parameters implemented</div><div class='add'>+</div><div class='add'>+   * - Name</div><div class='add'>+     - Mode</div><div class='add'>+     - Notes</div><div class='add'>+   * - ``enable_roce``</div><div class='add'>+     - runtime</div><div class='add'>+     - mutually exclusive with ``enable_iwarp``</div><div class='add'>+   * - ``enable_iwarp``</div><div class='add'>+     - runtime</div><div class='add'>+     - mutually exclusive with ``enable_roce``</div><div class='add'>+</div><div class='ctx'> Info versions</div><div class='ctx'> =============</div><div class='ctx'> </div><div class='hunk'>@@ -139,6 +154,42 @@ EMP firmware image.</div><div class='ctx'> The driver does not currently support reloading the driver via</div><div class='ctx'> ``DEVLINK_RELOAD_ACTION_DRIVER_REINIT``.</div><div class='ctx'> </div><div class='add'>+Port split</div><div class='add'>+==========</div><div class='add'>+</div><div class='add'>+The ``ice`` driver supports port splitting only for port 0, as the FW has</div><div class='add'>+a predefined set of available port split options for the whole device.</div><div class='add'>+</div><div class='add'>+A system reboot is required for port split to be applied.</div><div class='add'>+</div><div class='add'>+The following command will select the port split option with 4 ports:</div><div class='add'>+</div><div class='add'>+.. code:: shell</div><div class='add'>+</div><div class='add'>+    $ devlink port split pci/0000:16:00.0/0 count 4</div><div class='add'>+</div><div class='add'>+The list of all available port options will be printed to dynamic debug after</div><div class='add'>+each ``split`` and ``unsplit`` command. The first option is the default.</div><div class='add'>+</div><div class='add'>+.. code:: shell</div><div class='add'>+</div><div class='add'>+    ice 0000:16:00.0: Available port split options and max port speeds (Gbps):</div><div class='add'>+    ice 0000:16:00.0: Status  Split      Quad 0          Quad 1</div><div class='add'>+    ice 0000:16:00.0:         count  L0  L1  L2  L3  L4  L5  L6  L7</div><div class='add'>+    ice 0000:16:00.0: Active  2     100   -   -   - 100   -   -   -</div><div class='add'>+    ice 0000:16:00.0:         2      50   -  50   -   -   -   -   -</div><div class='add'>+    ice 0000:16:00.0: Pending 4      25  25  25  25   -   -   -   -</div><div class='add'>+    ice 0000:16:00.0:         4      25  25   -   -  25  25   -   -</div><div class='add'>+    ice 0000:16:00.0:         8      10  10  10  10  10  10  10  10</div><div class='add'>+    ice 0000:16:00.0:         1     100   -   -   -   -   -   -   -</div><div class='add'>+</div><div class='add'>+There could be multiple FW port options with the same port split count. When</div><div class='add'>+the same port split count request is issued again, the next FW port option with</div><div class='add'>+the same port split count will be selected.</div><div class='add'>+</div><div class='add'>+``devlink port unsplit`` will select the option with a split count of 1. If</div><div class='add'>+there is no FW option available with split count 1, you will receive an error.</div><div class='add'>+</div><div class='ctx'> Regions</div><div class='ctx'> =======</div><div class='ctx'> </div><div class='hunk'>@@ -153,12 +204,21 @@ device data.</div><div class='ctx'>     * - ``nvm-flash``</div><div class='ctx'>       - The contents of the entire flash chip, sometimes referred to as</div><div class='ctx'>         the device's Non Volatile Memory.</div><div class='add'>+    * - ``shadow-ram``</div><div class='add'>+      - The contents of the Shadow RAM, which is loaded from the beginning</div><div class='add'>+        of the flash. Although the contents are primarily from the flash,</div><div class='add'>+        this area also contains data generated during device boot which is</div><div class='add'>+        not stored in flash.</div><div class='ctx'>     * - ``device-caps``</div><div class='ctx'>       - The contents of the device firmware's capabilities buffer. Useful to</div><div class='ctx'>         determine the current state and configuration of the device.</div><div class='ctx'> </div><div class='del'>-Users can request an immediate capture of a snapshot via the</div><div class='del'>-``DEVLINK_CMD_REGION_NEW``</div><div class='add'>+Both the ``nvm-flash`` and ``shadow-ram`` regions can be accessed without a</div><div class='add'>+snapshot. The ``device-caps`` region requires a snapshot as the contents are</div><div class='add'>+sent by firmware and can't be split into separate reads.</div><div class='add'>+</div><div class='add'>+Users can request an immediate capture of a snapshot for all three regions</div><div class='add'>+via the ``DEVLINK_CMD_REGION_NEW`` command.</div><div class='ctx'> </div><div class='ctx'> .. code:: shell</div><div class='ctx'> </div><div class='hunk'>@@ -218,3 +278,118 @@ Users can request an immediate capture of a snapshot via the</div><div class='ctx'>     0000000000000210 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00</div><div class='ctx'> </div><div class='ctx'>     $ devlink region delete pci/0000:01:00.0/device-caps snapshot 1</div><div class='add'>+</div><div class='add'>+Devlink Rate</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+The ``ice`` driver implements devlink-rate API. It allows for offload of</div><div class='add'>+the Hierarchical QoS to the hardware. It enables user to group Virtual</div><div class='add'>+Functions in a tree structure and assign supported parameters: tx_share,</div><div class='add'>+tx_max, tx_priority and tx_weight to each node in a tree. So effectively</div><div class='add'>+user gains an ability to control how much bandwidth is allocated for each</div><div class='add'>+VF group. This is later enforced by the HW.</div><div class='add'>+</div><div class='add'>+It is assumed that this feature is mutually exclusive with DCB performed</div><div class='add'>+in FW and ADQ, or any driver feature that would trigger changes in QoS,</div><div class='add'>+for example creation of the new traffic class. The driver will prevent DCB</div><div class='add'>+or ADQ configuration if user started making any changes to the nodes using</div><div class='add'>+devlink-rate API. To configure those features a driver reload is necessary.</div><div class='add'>+Correspondingly if ADQ or DCB will get configured the driver won't export</div><div class='add'>+hierarchy at all, or will remove the untouched hierarchy if those</div><div class='add'>+features are enabled after the hierarchy is exported, but before any</div><div class='add'>+changes are made.</div><div class='add'>+</div><div class='add'>+This feature is also dependent on switchdev being enabled in the system.</div><div class='add'>+It's required because devlink-rate requires devlink-port objects to be</div><div class='add'>+present, and those objects are only created in switchdev mode.</div><div class='add'>+</div><div class='add'>+If the driver is set to the switchdev mode, it will export internal</div><div class='add'>+hierarchy the moment VF's are created. Root of the tree is always</div><div class='add'>+represented by the node_0. This node can't be deleted by the user. Leaf</div><div class='add'>+nodes and nodes with children also can't be deleted.</div><div class='add'>+</div><div class='add'>+.. list-table:: Attributes supported</div><div class='add'>+    :widths: 15 85</div><div class='add'>+</div><div class='add'>+    * - Name</div><div class='add'>+      - Description</div><div class='add'>+    * - ``tx_max``</div><div class='add'>+      - maximum bandwidth to be consumed by the tree Node. Rate Limit is</div><div class='add'>+        an absolute number specifying a maximum amount of bytes a Node may</div><div class='add'>+        consume during the course of one second. Rate limit guarantees</div><div class='add'>+        that a link will not oversaturate the receiver on the remote end</div><div class='add'>+        and also enforces an SLA between the subscriber and network</div><div class='add'>+        provider.</div><div class='add'>+    * - ``tx_share``</div><div class='add'>+      - minimum bandwidth allocated to a tree node when it is not blocked.</div><div class='add'>+        It specifies an absolute BW. While tx_max defines the maximum</div><div class='add'>+        bandwidth the node may consume, the tx_share marks committed BW</div><div class='add'>+        for the Node.</div><div class='add'>+    * - ``tx_priority``</div><div class='add'>+      - allows for usage of strict priority arbiter among siblings. This</div><div class='add'>+        arbitration scheme attempts to schedule nodes based on their</div><div class='add'>+        priority as long as the nodes remain within their bandwidth limit.</div><div class='add'>+        Range 0-7. Nodes with priority 7 have the highest priority and are</div><div class='add'>+        selected first, while nodes with priority 0 have the lowest</div><div class='add'>+        priority. Nodes that have the same priority are treated equally.</div><div class='add'>+    * - ``tx_weight``</div><div class='add'>+      - allows for usage of Weighted Fair Queuing arbitration scheme among</div><div class='add'>+        siblings. This arbitration scheme can be used simultaneously with</div><div class='add'>+        the strict priority. Range 1-200. Only relative values matter for</div><div class='add'>+        arbitration.</div><div class='add'>+</div><div class='add'>+``tx_priority`` and ``tx_weight`` can be used simultaneously. In that case</div><div class='add'>+nodes with the same priority form a WFQ subgroup in the sibling group</div><div class='add'>+and arbitration among them is based on assigned weights.</div><div class='add'>+</div><div class='add'>+.. code:: shell</div><div class='add'>+</div><div class='add'>+    # enable switchdev</div><div class='add'>+    $ devlink dev eswitch set pci/0000:4b:00.0 mode switchdev</div><div class='add'>+</div><div class='add'>+    # at this point driver should export internal hierarchy</div><div class='add'>+    $ echo 2 &gt; /sys/class/net/ens785np0/device/sriov_numvfs</div><div class='add'>+</div><div class='add'>+    $ devlink port function rate show</div><div class='add'>+    pci/0000:4b:00.0/node_25: type node parent node_24</div><div class='add'>+    pci/0000:4b:00.0/node_24: type node parent node_0</div><div class='add'>+    pci/0000:4b:00.0/node_32: type node parent node_31</div><div class='add'>+    pci/0000:4b:00.0/node_31: type node parent node_30</div><div class='add'>+    pci/0000:4b:00.0/node_30: type node parent node_16</div><div class='add'>+    pci/0000:4b:00.0/node_19: type node parent node_18</div><div class='add'>+    pci/0000:4b:00.0/node_18: type node parent node_17</div><div class='add'>+    pci/0000:4b:00.0/node_17: type node parent node_16</div><div class='add'>+    pci/0000:4b:00.0/node_14: type node parent node_5</div><div class='add'>+    pci/0000:4b:00.0/node_5: type node parent node_3</div><div class='add'>+    pci/0000:4b:00.0/node_13: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_12: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_11: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_10: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_9: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_8: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_7: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_6: type node parent node_4</div><div class='add'>+    pci/0000:4b:00.0/node_4: type node parent node_3</div><div class='add'>+    pci/0000:4b:00.0/node_3: type node parent node_16</div><div class='add'>+    pci/0000:4b:00.0/node_16: type node parent node_15</div><div class='add'>+    pci/0000:4b:00.0/node_15: type node parent node_0</div><div class='add'>+    pci/0000:4b:00.0/node_2: type node parent node_1</div><div class='add'>+    pci/0000:4b:00.0/node_1: type node parent node_0</div><div class='add'>+    pci/0000:4b:00.0/node_0: type node</div><div class='add'>+    pci/0000:4b:00.0/1: type leaf parent node_25</div><div class='add'>+    pci/0000:4b:00.0/2: type leaf parent node_25</div><div class='add'>+</div><div class='add'>+    # let's create some custom node</div><div class='add'>+    $ devlink port function rate add pci/0000:4b:00.0/node_custom parent node_0</div><div class='add'>+</div><div class='add'>+    # second custom node</div><div class='add'>+    $ devlink port function rate add pci/0000:4b:00.0/node_custom_1 parent node_custom</div><div class='add'>+</div><div class='add'>+    # reassign second VF to newly created branch</div><div class='add'>+    $ devlink port function rate set pci/0000:4b:00.0/2 parent node_custom_1</div><div class='add'>+</div><div class='add'>+    # assign tx_weight to the VF</div><div class='add'>+    $ devlink port function rate set pci/0000:4b:00.0/2 tx_weight 5</div><div class='add'>+</div><div class='add'>+    # assign tx_share to the VF</div><div class='add'>+    $ devlink port function rate set pci/0000:4b:00.0/2 tx_share 500Mbps</div><div class='head'>diff --git a/Documentation/networking/devlink/index.rst b/Documentation/networking/devlink/index.rst<br/>index c17cdb079611..b49749e2b9a6 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/index.rst</a></div><div class='hunk'>@@ -13,10 +13,8 @@ new APIs prefixed by ``devl_*``. The older APIs handle all the locking</div><div class='ctx'> in devlink core, but don't allow registration of most sub-objects once</div><div class='ctx'> the main devlink object is itself registered. The newer ``devl_*`` APIs assume</div><div class='ctx'> the devlink instance lock is already held. Drivers can take the instance</div><div class='del'>-lock by calling ``devl_lock()``. It is also held in most of the callbacks.</div><div class='del'>-Eventually all callbacks will be invoked under the devlink instance lock,</div><div class='del'>-refer to the use of the ``DEVLINK_NL_FLAG_NO_LOCK`` flag in devlink core</div><div class='del'>-to find out which callbacks are not converted, yet.</div><div class='add'>+lock by calling ``devl_lock()``. It is also held all callbacks of devlink</div><div class='add'>+netlink commands.</div><div class='ctx'> </div><div class='ctx'> Drivers are encouraged to use the devlink instance lock for their own needs.</div><div class='ctx'> </div><div class='hunk'>@@ -38,7 +36,9 @@ general.</div><div class='ctx'>    devlink-region</div><div class='ctx'>    devlink-resource</div><div class='ctx'>    devlink-reload</div><div class='add'>+   devlink-selftests</div><div class='ctx'>    devlink-trap</div><div class='add'>+   devlink-linecard</div><div class='ctx'> </div><div class='ctx'> Driver-specific documentation</div><div class='ctx'> -----------------------------</div><div class='hunk'>@@ -50,6 +50,7 @@ parameters, info versions, and other features it supports.</div><div class='ctx'>    :maxdepth: 1</div><div class='ctx'> </div><div class='ctx'>    bnxt</div><div class='add'>+   etas_es58x</div><div class='ctx'>    hns3</div><div class='ctx'>    ionic</div><div class='ctx'>    ice</div><div class='hunk'>@@ -65,3 +66,4 @@ parameters, info versions, and other features it supports.</div><div class='ctx'>    prestera</div><div class='ctx'>    iosm</div><div class='ctx'>    octeontx2</div><div class='add'>+   sfc</div><div class='head'>diff --git a/Documentation/networking/devlink/mlx5.rst b/Documentation/networking/devlink/mlx5.rst<br/>index 29ad304e6fba..202798d6501e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/mlx5.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/mlx5.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/mlx5.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/mlx5.rst</a></div><div class='hunk'>@@ -54,6 +54,36 @@ parameters.</div><div class='ctx'>      - Control the number of large groups (size &gt; 1) in the FDB table.</div><div class='ctx'> </div><div class='ctx'>        * The default value is 15, and the range is between 1 and 1024.</div><div class='add'>+   * - ``esw_multiport``</div><div class='add'>+     - Boolean</div><div class='add'>+     - runtime</div><div class='add'>+     - Control MultiPort E-Switch shared fdb mode.</div><div class='add'>+</div><div class='add'>+       An experimental mode where a single E-Switch is used and all the vports</div><div class='add'>+       and physical ports on the NIC are connected to it.</div><div class='add'>+</div><div class='add'>+       An example is to send traffic from a VF that is created on PF0 to an</div><div class='add'>+       uplink that is natively associated with the uplink of PF1</div><div class='add'>+</div><div class='add'>+       Note: Future devices, ConnectX-8 and onward, will eventually have this</div><div class='add'>+       as the default to allow forwarding between all NIC ports in a single</div><div class='add'>+       E-switch environment and the dual E-switch mode will likely get</div><div class='add'>+       deprecated.</div><div class='add'>+</div><div class='add'>+       Default: disabled</div><div class='add'>+</div><div class='add'>+   * - ``hairpin_num_queues``</div><div class='add'>+     - u32</div><div class='add'>+     - driverinit</div><div class='add'>+     - We refer to a TC NIC rule that involves forwarding as "hairpin".</div><div class='add'>+       Hairpin queues are mlx5 hardware specific implementation for hardware</div><div class='add'>+       forwarding of such packets.</div><div class='add'>+</div><div class='add'>+       Control the number of hairpin queues.</div><div class='add'>+   * - ``hairpin_queue_size``</div><div class='add'>+     - u32</div><div class='add'>+     - driverinit</div><div class='add'>+     - Control the size (in packets) of the hairpin queues.</div><div class='ctx'> </div><div class='ctx'> The ``mlx5`` driver supports reloading via ``DEVLINK_CMD_RELOAD``</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/mlxsw.rst b/Documentation/networking/devlink/mlxsw.rst<br/>index cf857cb4ba8f..433962225bd4 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/mlxsw.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/mlxsw.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/mlxsw.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/mlxsw.rst</a></div><div class='hunk'>@@ -58,6 +58,30 @@ The ``mlxsw`` driver reports the following versions</div><div class='ctx'>      - running</div><div class='ctx'>      - Three digit firmware version</div><div class='ctx'> </div><div class='add'>+Line card auxiliary device info versions</div><div class='add'>+========================================</div><div class='add'>+</div><div class='add'>+The ``mlxsw`` driver reports the following versions for line card auxiliary device</div><div class='add'>+</div><div class='add'>+.. list-table:: devlink info versions implemented</div><div class='add'>+   :widths: 5 5 90</div><div class='add'>+</div><div class='add'>+   * - Name</div><div class='add'>+     - Type</div><div class='add'>+     - Description</div><div class='add'>+   * - ``hw.revision``</div><div class='add'>+     - fixed</div><div class='add'>+     - The hardware revision for this line card</div><div class='add'>+   * - ``ini.version``</div><div class='add'>+     - running</div><div class='add'>+     - Version of line card INI loaded</div><div class='add'>+   * - ``fw.psid``</div><div class='add'>+     - fixed</div><div class='add'>+     - Line card device PSID</div><div class='add'>+   * - ``fw.version``</div><div class='add'>+     - running</div><div class='add'>+     - Three digit firmware version of line card device</div><div class='add'>+</div><div class='ctx'> Driver-specific Traps</div><div class='ctx'> =====================</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/devlink/netdevsim.rst b/Documentation/networking/devlink/netdevsim.rst<br/>index 8a292fb5aaea..88482725422c 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/netdevsim.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/netdevsim.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/netdevsim.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/netdevsim.rst</a></div><div class='hunk'>@@ -67,7 +67,7 @@ The ``netdevsim`` driver supports rate objects management, which includes:</div><div class='ctx'> - setting tx_share and tx_max rate values for any rate object type;</div><div class='ctx'> - setting parent node for any rate object type.</div><div class='ctx'> </div><div class='del'>-Rate nodes and it's parameters are exposed in ``netdevsim`` debugfs in RO mode.</div><div class='add'>+Rate nodes and their parameters are exposed in ``netdevsim`` debugfs in RO mode.</div><div class='ctx'> For example created rate node with name ``some_group``:</div><div class='ctx'> </div><div class='ctx'> .. code:: shell</div><div class='hunk'>@@ -95,5 +95,5 @@ Driver-specific Traps</div><div class='ctx'>    * - ``fid_miss``</div><div class='ctx'>      - ``exception``</div><div class='ctx'>      - When a packet enters the device it is classified to a filtering</div><div class='del'>-       indentifier (FID) based on the ingress port and VLAN. This trap is used</div><div class='add'>+       identifier (FID) based on the ingress port and VLAN. This trap is used</div><div class='ctx'>        to trap packets for which a FID could not be found</div><div class='head'>diff --git a/Documentation/networking/devlink/prestera.rst b/Documentation/networking/devlink/prestera.rst<br/>index 49409d1d3081..96b1124e614b 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/prestera.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/devlink/prestera.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/prestera.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/prestera.rst</a></div><div class='hunk'>@@ -138,4 +138,4 @@ Driver-specific Traps</div><div class='ctx'>      - Drops packets with zero (0) IPV4 source address.</div><div class='ctx'>    * - ``met_red``</div><div class='ctx'>      - ``drop``</div><div class='del'>-     - Drops non-conforming packets (dropped by Ingress policer, metering drop), e.g. packet rate exceeded configured bandwith.</div><div class='add'>+     - Drops non-conforming packets (dropped by Ingress policer, metering drop), e.g. packet rate exceeded configured bandwidth.</div><div class='head'>diff --git a/Documentation/networking/devlink/sfc.rst b/Documentation/networking/devlink/sfc.rst<br/>new file mode 100644<br/>index 000000000000..db64a1bd9733<br/>--- /dev/null<br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/devlink/sfc.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/devlink/sfc.rst</a></div><div class='hunk'>@@ -0,0 +1,57 @@</div><div class='add'>+.. SPDX-License-Identifier: GPL-2.0</div><div class='add'>+</div><div class='add'>+===================</div><div class='add'>+sfc devlink support</div><div class='add'>+===================</div><div class='add'>+</div><div class='add'>+This document describes the devlink features implemented by the ``sfc``</div><div class='add'>+device driver for the ef100 device.</div><div class='add'>+</div><div class='add'>+Info versions</div><div class='add'>+=============</div><div class='add'>+</div><div class='add'>+The ``sfc`` driver reports the following versions</div><div class='add'>+</div><div class='add'>+.. list-table:: devlink info versions implemented</div><div class='add'>+   :widths: 5 5 90</div><div class='add'>+</div><div class='add'>+   * - Name</div><div class='add'>+     - Type</div><div class='add'>+     - Description</div><div class='add'>+   * - ``fw.mgmt.suc``</div><div class='add'>+     - running</div><div class='add'>+     - For boards where the management function is split between multiple</div><div class='add'>+       control units, this is the SUC control unit's firmware version.</div><div class='add'>+   * - ``fw.mgmt.cmc``</div><div class='add'>+     - running</div><div class='add'>+     - For boards where the management function is split between multiple</div><div class='add'>+       control units, this is the CMC control unit's firmware version.</div><div class='add'>+   * - ``fpga.rev``</div><div class='add'>+     - running</div><div class='add'>+     - FPGA design revision.</div><div class='add'>+   * - ``fpga.app``</div><div class='add'>+     - running</div><div class='add'>+     - Datapath programmable logic version.</div><div class='add'>+   * - ``fw.app``</div><div class='add'>+     - running</div><div class='add'>+     - Datapath software/microcode/firmware version.</div><div class='add'>+   * - ``coproc.boot``</div><div class='add'>+     - running</div><div class='add'>+     - SmartNIC application co-processor (APU) first stage boot loader version.</div><div class='add'>+   * - ``coproc.uboot``</div><div class='add'>+     - running</div><div class='add'>+     - SmartNIC application co-processor (APU) co-operating system loader version.</div><div class='add'>+   * - ``coproc.main``</div><div class='add'>+     - running</div><div class='add'>+     - SmartNIC application co-processor (APU) main operating system version.</div><div class='add'>+   * - ``coproc.recovery``</div><div class='add'>+     - running</div><div class='add'>+     - SmartNIC application co-processor (APU) recovery operating system version.</div><div class='add'>+   * - ``fw.exprom``</div><div class='add'>+     - running</div><div class='add'>+     - Expansion ROM version. For boards where the expansion ROM is split between</div><div class='add'>+       multiple images (e.g. PXE and UEFI), this is the specifically the PXE boot</div><div class='add'>+       ROM version.</div><div class='add'>+   * - ``fw.uefi``</div><div class='add'>+     - running</div><div class='add'>+     - UEFI driver version (No UNDI support).</div><div class='head'>diff --git a/Documentation/networking/driver.rst b/Documentation/networking/driver.rst<br/>index c8f59dbda46f..4f5dfa9c022e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/driver.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/driver.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/driver.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/driver.rst</a></div><div class='hunk'>@@ -4,94 +4,124 @@</div><div class='ctx'> Softnet Driver Issues</div><div class='ctx'> =====================</div><div class='ctx'> </div><div class='del'>-Transmit path guidelines:</div><div class='add'>+Probing guidelines</div><div class='add'>+==================</div><div class='ctx'> </div><div class='del'>-1) The ndo_start_xmit method must not return NETDEV_TX_BUSY under</div><div class='del'>-   any normal circumstances.  It is considered a hard error unless</div><div class='del'>-   there is no way your device can tell ahead of time when it's</div><div class='del'>-   transmit function will become busy.</div><div class='add'>+Address validation</div><div class='add'>+------------------</div><div class='ctx'> </div><div class='del'>-   Instead it must maintain the queue properly.  For example,</div><div class='del'>-   for a driver implementing scatter-gather this means::</div><div class='add'>+Any hardware layer address you obtain for your device should</div><div class='add'>+be verified.  For example, for ethernet check it with</div><div class='add'>+linux/etherdevice.h:is_valid_ether_addr()</div><div class='add'>+</div><div class='add'>+Close/stop guidelines</div><div class='add'>+=====================</div><div class='add'>+</div><div class='add'>+Quiescence</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+After the ndo_stop routine has been called, the hardware must</div><div class='add'>+not receive or transmit any data.  All in flight packets must</div><div class='add'>+be aborted. If necessary, poll or wait for completion of</div><div class='add'>+any reset commands.</div><div class='add'>+</div><div class='add'>+Auto-close</div><div class='add'>+----------</div><div class='add'>+</div><div class='add'>+The ndo_stop routine will be called by unregister_netdevice</div><div class='add'>+if device is still UP.</div><div class='add'>+</div><div class='add'>+Transmit path guidelines</div><div class='add'>+========================</div><div class='add'>+</div><div class='add'>+Stop queues in advance</div><div class='add'>+----------------------</div><div class='add'>+</div><div class='add'>+The ndo_start_xmit method must not return NETDEV_TX_BUSY under</div><div class='add'>+any normal circumstances.  It is considered a hard error unless</div><div class='add'>+there is no way your device can tell ahead of time when its</div><div class='add'>+transmit function will become busy.</div><div class='add'>+</div><div class='add'>+Instead it must maintain the queue properly.  For example,</div><div class='add'>+for a driver implementing scatter-gather this means:</div><div class='add'>+</div><div class='add'>+.. code-block:: c</div><div class='add'>+</div><div class='add'>+	static u32 drv_tx_avail(struct drv_ring *dr)</div><div class='add'>+	{</div><div class='add'>+		u32 used = READ_ONCE(dr-&gt;prod) - READ_ONCE(dr-&gt;cons);</div><div class='add'>+</div><div class='add'>+		return dr-&gt;tx_ring_size - (used &amp; bp-&gt;tx_ring_mask);</div><div class='add'>+	}</div><div class='ctx'> </div><div class='ctx'> 	static netdev_tx_t drv_hard_start_xmit(struct sk_buff *skb,</div><div class='ctx'> 					       struct net_device *dev)</div><div class='ctx'> 	{</div><div class='ctx'> 		struct drv *dp = netdev_priv(dev);</div><div class='add'>+		struct netdev_queue *txq;</div><div class='add'>+		struct drv_ring *dr;</div><div class='add'>+		int idx;</div><div class='ctx'> </div><div class='del'>-		lock_tx(dp);</div><div class='del'>-		...</div><div class='del'>-		/* This is a hard error log it. */</div><div class='del'>-		if (TX_BUFFS_AVAIL(dp) &lt;= (skb_shinfo(skb)-&gt;nr_frags + 1)) {</div><div class='add'>+		idx = skb_get_queue_mapping(skb);</div><div class='add'>+		dr = dp-&gt;tx_rings[idx];</div><div class='add'>+		txq = netdev_get_tx_queue(dev, idx);</div><div class='add'>+</div><div class='add'>+		//...</div><div class='add'>+		/* This should be a very rare race - log it. */</div><div class='add'>+		if (drv_tx_avail(dr) &lt;= skb_shinfo(skb)-&gt;nr_frags + 1) {</div><div class='ctx'> 			netif_stop_queue(dev);</div><div class='del'>-			unlock_tx(dp);</div><div class='del'>-			printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n",</div><div class='del'>-			       dev-&gt;name);</div><div class='add'>+			netdev_warn(dev, "Tx Ring full when queue awake!\n");</div><div class='ctx'> 			return NETDEV_TX_BUSY;</div><div class='ctx'> 		}</div><div class='ctx'> </div><div class='del'>-		... queue packet to card ...</div><div class='del'>-		... update tx consumer index ...</div><div class='del'>-</div><div class='del'>-		if (TX_BUFFS_AVAIL(dp) &lt;= (MAX_SKB_FRAGS + 1))</div><div class='del'>-			netif_stop_queue(dev);</div><div class='del'>-</div><div class='del'>-		...</div><div class='del'>-		unlock_tx(dp);</div><div class='del'>-		...</div><div class='del'>-		return NETDEV_TX_OK;</div><div class='del'>-	}</div><div class='del'>-</div><div class='del'>-   And then at the end of your TX reclamation event handling::</div><div class='add'>+		//... queue packet to card ...</div><div class='ctx'> </div><div class='del'>-	if (netif_queue_stopped(dp-&gt;dev) &amp;&amp;</div><div class='del'>-	    TX_BUFFS_AVAIL(dp) &gt; (MAX_SKB_FRAGS + 1))</div><div class='del'>-		netif_wake_queue(dp-&gt;dev);</div><div class='add'>+		netdev_tx_sent_queue(txq, skb-&gt;len);</div><div class='ctx'> </div><div class='del'>-   For a non-scatter-gather supporting card, the three tests simply become::</div><div class='add'>+		//... update tx producer index using WRITE_ONCE() ...</div><div class='ctx'> </div><div class='del'>-		/* This is a hard error log it. */</div><div class='del'>-		if (TX_BUFFS_AVAIL(dp) &lt;= 0)</div><div class='add'>+		if (!netif_txq_maybe_stop(txq, drv_tx_avail(dr),</div><div class='add'>+					  MAX_SKB_FRAGS + 1, 2 * MAX_SKB_FRAGS))</div><div class='add'>+			dr-&gt;stats.stopped++;</div><div class='ctx'> </div><div class='del'>-   and::</div><div class='add'>+		//...</div><div class='add'>+		return NETDEV_TX_OK;</div><div class='add'>+	}</div><div class='ctx'> </div><div class='del'>-		if (TX_BUFFS_AVAIL(dp) == 0)</div><div class='add'>+And then at the end of your TX reclamation event handling:</div><div class='ctx'> </div><div class='del'>-   and::</div><div class='add'>+.. code-block:: c</div><div class='ctx'> </div><div class='del'>-	if (netif_queue_stopped(dp-&gt;dev) &amp;&amp;</div><div class='del'>-	    TX_BUFFS_AVAIL(dp) &gt; 0)</div><div class='del'>-		netif_wake_queue(dp-&gt;dev);</div><div class='add'>+	//... update tx consumer index using WRITE_ONCE() ...</div><div class='ctx'> </div><div class='del'>-2) An ndo_start_xmit method must not modify the shared parts of a</div><div class='del'>-   cloned SKB.</div><div class='add'>+	netif_txq_completed_wake(txq, cmpl_pkts, cmpl_bytes,</div><div class='add'>+				 drv_tx_avail(dr), 2 * MAX_SKB_FRAGS);</div><div class='ctx'> </div><div class='del'>-3) Do not forget that once you return NETDEV_TX_OK from your</div><div class='del'>-   ndo_start_xmit method, it is your driver's responsibility to free</div><div class='del'>-   up the SKB and in some finite amount of time.</div><div class='add'>+Lockless queue stop / wake helper macros</div><div class='add'>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~</div><div class='ctx'> </div><div class='del'>-   For example, this means that it is not allowed for your TX</div><div class='del'>-   mitigation scheme to let TX packets "hang out" in the TX</div><div class='del'>-   ring unreclaimed forever if no new TX packets are sent.</div><div class='del'>-   This error can deadlock sockets waiting for send buffer room</div><div class='del'>-   to be freed up.</div><div class='add'>+.. kernel-doc:: include/net/netdev_queues.h</div><div class='add'>+   :doc: Lockless queue stopping / waking helpers.</div><div class='ctx'> </div><div class='del'>-   If you return NETDEV_TX_BUSY from the ndo_start_xmit method, you</div><div class='del'>-   must not keep any reference to that SKB and you must not attempt</div><div class='del'>-   to free it up.</div><div class='add'>+No exclusive ownership</div><div class='add'>+----------------------</div><div class='ctx'> </div><div class='del'>-Probing guidelines:</div><div class='add'>+An ndo_start_xmit method must not modify the shared parts of a</div><div class='add'>+cloned SKB.</div><div class='ctx'> </div><div class='del'>-1) Any hardware layer address you obtain for your device should</div><div class='del'>-   be verified.  For example, for ethernet check it with</div><div class='del'>-   linux/etherdevice.h:is_valid_ether_addr()</div><div class='add'>+Timely completions</div><div class='add'>+------------------</div><div class='ctx'> </div><div class='del'>-Close/stop guidelines:</div><div class='add'>+Do not forget that once you return NETDEV_TX_OK from your</div><div class='add'>+ndo_start_xmit method, it is your driver's responsibility to free</div><div class='add'>+up the SKB and in some finite amount of time.</div><div class='ctx'> </div><div class='del'>-1) After the ndo_stop routine has been called, the hardware must</div><div class='del'>-   not receive or transmit any data.  All in flight packets must</div><div class='del'>-   be aborted. If necessary, poll or wait for completion of</div><div class='del'>-   any reset commands.</div><div class='add'>+For example, this means that it is not allowed for your TX</div><div class='add'>+mitigation scheme to let TX packets "hang out" in the TX</div><div class='add'>+ring unreclaimed forever if no new TX packets are sent.</div><div class='add'>+This error can deadlock sockets waiting for send buffer room</div><div class='add'>+to be freed up.</div><div class='ctx'> </div><div class='del'>-2) The ndo_stop routine will be called by unregister_netdevice</div><div class='del'>-   if device is still UP.</div><div class='add'>+If you return NETDEV_TX_BUSY from the ndo_start_xmit method, you</div><div class='add'>+must not keep any reference to that SKB and you must not attempt</div><div class='add'>+to free it up.</div><div class='head'>diff --git a/Documentation/networking/dsa/configuration.rst b/Documentation/networking/dsa/configuration.rst<br/>index 2b08f1a772d3..d2934c40f0f1 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/dsa/configuration.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/dsa/configuration.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/dsa/configuration.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/dsa/configuration.rst</a></div><div class='hunk'>@@ -5,7 +5,7 @@ DSA switch configuration from userspace</div><div class='ctx'> =======================================</div><div class='ctx'> </div><div class='ctx'> The DSA switch configuration is not integrated into the main userspace</div><div class='del'>-network configuration suites by now and has to be performed manualy.</div><div class='add'>+network configuration suites by now and has to be performed manually.</div><div class='ctx'> </div><div class='ctx'> .. _dsa-config-showcases:</div><div class='ctx'> </div><div class='hunk'>@@ -49,6 +49,9 @@ In this documentation the following Ethernet interfaces are used:</div><div class='ctx'> *eth0*</div><div class='ctx'>   the master interface</div><div class='ctx'> </div><div class='add'>+*eth1*</div><div class='add'>+  another master interface</div><div class='add'>+</div><div class='ctx'> *lan1*</div><div class='ctx'>   a slave interface</div><div class='ctx'> </div><div class='hunk'>@@ -360,3 +363,96 @@ the ``self`` flag) has been removed. This results in the following changes:</div><div class='ctx'> </div><div class='ctx'> Script writers are therefore encouraged to use the ``master static`` set of</div><div class='ctx'> flags when working with bridge FDB entries on DSA switch interfaces.</div><div class='add'>+</div><div class='add'>+Affinity of user ports to CPU ports</div><div class='add'>+-----------------------------------</div><div class='add'>+</div><div class='add'>+Typically, DSA switches are attached to the host via a single Ethernet</div><div class='add'>+interface, but in cases where the switch chip is discrete, the hardware design</div><div class='add'>+may permit the use of 2 or more ports connected to the host, for an increase in</div><div class='add'>+termination throughput.</div><div class='add'>+</div><div class='add'>+DSA can make use of multiple CPU ports in two ways. First, it is possible to</div><div class='add'>+statically assign the termination traffic associated with a certain user port</div><div class='add'>+to be processed by a certain CPU port. This way, user space can implement</div><div class='add'>+custom policies of static load balancing between user ports, by spreading the</div><div class='add'>+affinities according to the available CPU ports.</div><div class='add'>+</div><div class='add'>+Secondly, it is possible to perform load balancing between CPU ports on a per</div><div class='add'>+packet basis, rather than statically assigning user ports to CPU ports.</div><div class='add'>+This can be achieved by placing the DSA masters under a LAG interface (bonding</div><div class='add'>+or team). DSA monitors this operation and creates a mirror of this software LAG</div><div class='add'>+on the CPU ports facing the physical DSA masters that constitute the LAG slave</div><div class='add'>+devices.</div><div class='add'>+</div><div class='add'>+To make use of multiple CPU ports, the firmware (device tree) description of</div><div class='add'>+the switch must mark all the links between CPU ports and their DSA masters</div><div class='add'>+using the ``ethernet`` reference/phandle. At startup, only a single CPU port</div><div class='add'>+and DSA master will be used - the numerically first port from the firmware</div><div class='add'>+description which has an ``ethernet`` property. It is up to the user to</div><div class='add'>+configure the system for the switch to use other masters.</div><div class='add'>+</div><div class='add'>+DSA uses the ``rtnl_link_ops`` mechanism (with a "dsa" ``kind``) to allow</div><div class='add'>+changing the DSA master of a user port. The ``IFLA_DSA_MASTER`` u32 netlink</div><div class='add'>+attribute contains the ifindex of the master device that handles each slave</div><div class='add'>+device. The DSA master must be a valid candidate based on firmware node</div><div class='add'>+information, or a LAG interface which contains only slaves which are valid</div><div class='add'>+candidates.</div><div class='add'>+</div><div class='add'>+Using iproute2, the following manipulations are possible:</div><div class='add'>+</div><div class='add'>+  .. code-block:: sh</div><div class='add'>+</div><div class='add'>+    # See the DSA master in current use</div><div class='add'>+    ip -d link show dev swp0</div><div class='add'>+        (...)</div><div class='add'>+        dsa master eth0</div><div class='add'>+</div><div class='add'>+    # Static CPU port distribution</div><div class='add'>+    ip link set swp0 type dsa master eth1</div><div class='add'>+    ip link set swp1 type dsa master eth0</div><div class='add'>+    ip link set swp2 type dsa master eth1</div><div class='add'>+    ip link set swp3 type dsa master eth0</div><div class='add'>+</div><div class='add'>+    # CPU ports in LAG, using explicit assignment of the DSA master</div><div class='add'>+    ip link add bond0 type bond mode balance-xor &amp;&amp; ip link set bond0 up</div><div class='add'>+    ip link set eth1 down &amp;&amp; ip link set eth1 master bond0</div><div class='add'>+    ip link set swp0 type dsa master bond0</div><div class='add'>+    ip link set swp1 type dsa master bond0</div><div class='add'>+    ip link set swp2 type dsa master bond0</div><div class='add'>+    ip link set swp3 type dsa master bond0</div><div class='add'>+    ip link set eth0 down &amp;&amp; ip link set eth0 master bond0</div><div class='add'>+    ip -d link show dev swp0</div><div class='add'>+        (...)</div><div class='add'>+        dsa master bond0</div><div class='add'>+</div><div class='add'>+    # CPU ports in LAG, relying on implicit migration of the DSA master</div><div class='add'>+    ip link add bond0 type bond mode balance-xor &amp;&amp; ip link set bond0 up</div><div class='add'>+    ip link set eth0 down &amp;&amp; ip link set eth0 master bond0</div><div class='add'>+    ip link set eth1 down &amp;&amp; ip link set eth1 master bond0</div><div class='add'>+    ip -d link show dev swp0</div><div class='add'>+        (...)</div><div class='add'>+        dsa master bond0</div><div class='add'>+</div><div class='add'>+Notice that in the case of CPU ports under a LAG, the use of the</div><div class='add'>+``IFLA_DSA_MASTER`` netlink attribute is not strictly needed, but rather, DSA</div><div class='add'>+reacts to the ``IFLA_MASTER`` attribute change of its present master (``eth0``)</div><div class='add'>+and migrates all user ports to the new upper of ``eth0``, ``bond0``. Similarly,</div><div class='add'>+when ``bond0`` is destroyed using ``RTM_DELLINK``, DSA migrates the user ports</div><div class='add'>+that were assigned to this interface to the first physical DSA master which is</div><div class='add'>+eligible, based on the firmware description (it effectively reverts to the</div><div class='add'>+startup configuration).</div><div class='add'>+</div><div class='add'>+In a setup with more than 2 physical CPU ports, it is therefore possible to mix</div><div class='add'>+static user to CPU port assignment with LAG between DSA masters. It is not</div><div class='add'>+possible to statically assign a user port towards a DSA master that has any</div><div class='add'>+upper interfaces (this includes LAG devices - the master must always be the LAG</div><div class='add'>+in this case).</div><div class='add'>+</div><div class='add'>+Live changing of the DSA master (and thus CPU port) affinity of a user port is</div><div class='add'>+permitted, in order to allow dynamic redistribution in response to traffic.</div><div class='add'>+</div><div class='add'>+Physical DSA masters are allowed to join and leave at any time a LAG interface</div><div class='add'>+used as a DSA master; however, DSA will reject a LAG interface as a valid</div><div class='add'>+candidate for being a DSA master unless it has at least one physical DSA master</div><div class='add'>+as a slave device.</div><div class='head'>diff --git a/Documentation/networking/dsa/dsa.rst b/Documentation/networking/dsa/dsa.rst<br/>index 89bb4fa4c362..a94ddf83348a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/dsa/dsa.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/dsa/dsa.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/dsa/dsa.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/dsa/dsa.rst</a></div><div class='hunk'>@@ -10,21 +10,21 @@ in joining the effort.</div><div class='ctx'> Design principles</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='del'>-The Distributed Switch Architecture is a subsystem which was primarily designed</div><div class='del'>-to support Marvell Ethernet switches (MV88E6xxx, a.k.a Linkstreet product line)</div><div class='del'>-using Linux, but has since evolved to support other vendors as well.</div><div class='add'>+The Distributed Switch Architecture subsystem was primarily designed to</div><div class='add'>+support Marvell Ethernet switches (MV88E6xxx, a.k.a. Link Street product</div><div class='add'>+line) using Linux, but has since evolved to support other vendors as well.</div><div class='ctx'> </div><div class='ctx'> The original philosophy behind this design was to be able to use unmodified</div><div class='ctx'> Linux tools such as bridge, iproute2, ifconfig to work transparently whether</div><div class='ctx'> they configured/queried a switch port network device or a regular network</div><div class='ctx'> device.</div><div class='ctx'> </div><div class='del'>-An Ethernet switch is typically comprised of multiple front-panel ports, and one</div><div class='del'>-or more CPU or management port. The DSA subsystem currently relies on the</div><div class='add'>+An Ethernet switch typically comprises multiple front-panel ports and one</div><div class='add'>+or more CPU or management ports. The DSA subsystem currently relies on the</div><div class='ctx'> presence of a management port connected to an Ethernet controller capable of</div><div class='ctx'> receiving Ethernet frames from the switch. This is a very common setup for all</div><div class='ctx'> kinds of Ethernet switches found in Small Home and Office products: routers,</div><div class='del'>-gateways, or even top-of-the rack switches. This host Ethernet controller will</div><div class='add'>+gateways, or even top-of-rack switches. This host Ethernet controller will</div><div class='ctx'> be later referred to as "master" and "cpu" in DSA terminology and code.</div><div class='ctx'> </div><div class='ctx'> The D in DSA stands for Distributed, because the subsystem has been designed</div><div class='hunk'>@@ -33,14 +33,14 @@ using upstream and downstream Ethernet links between switches. These specific</div><div class='ctx'> ports are referred to as "dsa" ports in DSA terminology and code. A collection</div><div class='ctx'> of multiple switches connected to each other is called a "switch tree".</div><div class='ctx'> </div><div class='del'>-For each front-panel port, DSA will create specialized network devices which are</div><div class='add'>+For each front-panel port, DSA creates specialized network devices which are</div><div class='ctx'> used as controlling and data-flowing endpoints for use by the Linux networking</div><div class='ctx'> stack. These specialized network interfaces are referred to as "slave" network</div><div class='ctx'> interfaces in DSA terminology and code.</div><div class='ctx'> </div><div class='ctx'> The ideal case for using DSA is when an Ethernet switch supports a "switch tag"</div><div class='ctx'> which is a hardware feature making the switch insert a specific tag for each</div><div class='del'>-Ethernet frames it received to/from specific ports to help the management</div><div class='add'>+Ethernet frame it receives to/from specific ports to help the management</div><div class='ctx'> interface figure out:</div><div class='ctx'> </div><div class='ctx'> - what port is this frame coming from</div><div class='hunk'>@@ -125,7 +125,7 @@ other switches from the same fabric, and in this case, the outermost switch</div><div class='ctx'> ports must decapsulate the packet.</div><div class='ctx'> </div><div class='ctx'> Note that in certain cases, it might be the case that the tagging format used</div><div class='del'>-by a leaf switch (not connected directly to the CPU) to not be the same as what</div><div class='add'>+by a leaf switch (not connected directly to the CPU) is not the same as what</div><div class='ctx'> the network stack sees. This can be seen with Marvell switch trees, where the</div><div class='ctx'> CPU port can be configured to use either the DSA or the Ethertype DSA (EDSA)</div><div class='ctx'> format, but the DSA links are configured to use the shorter (without Ethertype)</div><div class='hunk'>@@ -193,6 +193,23 @@ protocol. If not all packets are of equal size, the tagger can implement the</div><div class='ctx'> default behavior by specifying the correct offset incurred by each individual</div><div class='ctx'> RX packet. Tail taggers do not cause issues to the flow dissector.</div><div class='ctx'> </div><div class='add'>+Checksum offload should work with category 1 and 2 taggers when the DSA master</div><div class='add'>+driver declares NETIF_F_HW_CSUM in vlan_features and looks at csum_start and</div><div class='add'>+csum_offset. For those cases, DSA will shift the checksum start and offset by</div><div class='add'>+the tag size. If the DSA master driver still uses the legacy NETIF_F_IP_CSUM</div><div class='add'>+or NETIF_F_IPV6_CSUM in vlan_features, the offload might only work if the</div><div class='add'>+offload hardware already expects that specific tag (perhaps due to matching</div><div class='add'>+vendors). DSA slaves inherit those flags from the master port, and it is up to</div><div class='add'>+the driver to correctly fall back to software checksum when the IP header is not</div><div class='add'>+where the hardware expects. If that check is ineffective, the packets might go</div><div class='add'>+to the network without a proper checksum (the checksum field will have the</div><div class='add'>+pseudo IP header sum). For category 3, when the offload hardware does not</div><div class='add'>+already expect the switch tag in use, the checksum must be calculated before any</div><div class='add'>+tag is inserted (i.e. inside the tagger). Otherwise, the DSA master would</div><div class='add'>+include the tail tag in the (software or hardware) checksum calculation. Then,</div><div class='add'>+when the tag gets stripped by the switch during transmission, it will leave an</div><div class='add'>+incorrect IP checksum in place.</div><div class='add'>+</div><div class='ctx'> Due to various reasons (most common being category 1 taggers being associated</div><div class='ctx'> with DSA-unaware masters, mangling what the master perceives as MAC DA), the</div><div class='ctx'> tagging protocol may require the DSA master to operate in promiscuous mode, to</div><div class='hunk'>@@ -270,21 +287,35 @@ These interfaces are specialized in order to:</div><div class='ctx'>   to/from specific switch ports</div><div class='ctx'> - query the switch for ethtool operations: statistics, link state,</div><div class='ctx'>   Wake-on-LAN, register dumps...</div><div class='del'>-- external/internal PHY management: link, auto-negotiation etc.</div><div class='add'>+- manage external/internal PHY: link, auto-negotiation, etc.</div><div class='ctx'> </div><div class='ctx'> These slave network devices have custom net_device_ops and ethtool_ops function</div><div class='ctx'> pointers which allow DSA to introduce a level of layering between the networking</div><div class='del'>-stack/ethtool, and the switch driver implementation.</div><div class='add'>+stack/ethtool and the switch driver implementation.</div><div class='ctx'> </div><div class='ctx'> Upon frame transmission from these slave network devices, DSA will look up which</div><div class='del'>-switch tagging protocol is currently registered with these network devices, and</div><div class='add'>+switch tagging protocol is currently registered with these network devices and</div><div class='ctx'> invoke a specific transmit routine which takes care of adding the relevant</div><div class='ctx'> switch tag in the Ethernet frames.</div><div class='ctx'> </div><div class='ctx'> These frames are then queued for transmission using the master network device</div><div class='del'>-``ndo_start_xmit()`` function, since they contain the appropriate switch tag, the</div><div class='add'>+``ndo_start_xmit()`` function. Since they contain the appropriate switch tag, the</div><div class='ctx'> Ethernet switch will be able to process these incoming frames from the</div><div class='del'>-management interface and delivers these frames to the physical switch port.</div><div class='add'>+management interface and deliver them to the physical switch port.</div><div class='add'>+</div><div class='add'>+When using multiple CPU ports, it is possible to stack a LAG (bonding/team)</div><div class='add'>+device between the DSA slave devices and the physical DSA masters. The LAG</div><div class='add'>+device is thus also a DSA master, but the LAG slave devices continue to be DSA</div><div class='add'>+masters as well (just with no user port assigned to them; this is needed for</div><div class='add'>+recovery in case the LAG DSA master disappears). Thus, the data path of the LAG</div><div class='add'>+DSA master is used asymmetrically. On RX, the ``ETH_P_XDSA`` handler, which</div><div class='add'>+calls ``dsa_switch_rcv()``, is invoked early (on the physical DSA master;</div><div class='add'>+LAG slave). Therefore, the RX data path of the LAG DSA master is not used.</div><div class='add'>+On the other hand, TX takes place linearly: ``dsa_slave_xmit`` calls</div><div class='add'>+``dsa_enqueue_skb``, which calls ``dev_queue_xmit`` towards the LAG DSA master.</div><div class='add'>+The latter calls ``dev_queue_xmit`` towards one physical DSA master or the</div><div class='add'>+other, and in both cases, the packet exits the system through a hardware path</div><div class='add'>+towards the switch.</div><div class='ctx'> </div><div class='ctx'> Graphical representation</div><div class='ctx'> ------------------------</div><div class='hunk'>@@ -330,9 +361,9 @@ MDIO reads/writes towards specific PHY addresses. In most MDIO-connected</div><div class='ctx'> switches, these functions would utilize direct or indirect PHY addressing mode</div><div class='ctx'> to return standard MII registers from the switch builtin PHYs, allowing the PHY</div><div class='ctx'> library and/or to return link status, link partner pages, auto-negotiation</div><div class='del'>-results etc..</div><div class='add'>+results, etc.</div><div class='ctx'> </div><div class='del'>-For Ethernet switches which have both external and internal MDIO busses, the</div><div class='add'>+For Ethernet switches which have both external and internal MDIO buses, the</div><div class='ctx'> slave MII bus can be utilized to mux/demux MDIO reads and writes towards either</div><div class='ctx'> internal or external MDIO devices this switch might be connected to: internal</div><div class='ctx'> PHYs, external PHYs, or even external switches.</div><div class='hunk'>@@ -349,7 +380,7 @@ DSA data structures are defined in ``include/net/dsa.h`` as well as</div><div class='ctx'>   table indication (when cascading switches)</div><div class='ctx'> </div><div class='ctx'> - ``dsa_platform_data``: platform device configuration data which can reference</div><div class='del'>-  a collection of dsa_chip_data structure if multiples switches are cascaded,</div><div class='add'>+  a collection of dsa_chip_data structures if multiple switches are cascaded,</div><div class='ctx'>   the master network device this switch tree is attached to needs to be</div><div class='ctx'>   referenced</div><div class='ctx'> </div><div class='hunk'>@@ -426,7 +457,7 @@ logic basically looks like this:</div><div class='ctx'>   "phy-handle" property, if found, this PHY device is created and registered</div><div class='ctx'>   using ``of_phy_connect()``</div><div class='ctx'> </div><div class='del'>-- if Device Tree is used, and the PHY device is "fixed", that is, conforms to</div><div class='add'>+- if Device Tree is used and the PHY device is "fixed", that is, conforms to</div><div class='ctx'>   the definition of a non-MDIO managed PHY as defined in</div><div class='ctx'>   ``Documentation/devicetree/bindings/net/fixed-link.txt``, the PHY is registered</div><div class='ctx'>   and connected transparently using the special fixed MDIO bus driver</div><div class='hunk'>@@ -481,35 +512,117 @@ Device Tree</div><div class='ctx'> DSA features a standardized binding which is documented in</div><div class='ctx'> ``Documentation/devicetree/bindings/net/dsa/dsa.txt``. PHY/MDIO library helper</div><div class='ctx'> functions such as ``of_get_phy_mode()``, ``of_phy_connect()`` are also used to query</div><div class='del'>-per-port PHY specific details: interface connection, MDIO bus location etc..</div><div class='add'>+per-port PHY specific details: interface connection, MDIO bus location, etc.</div><div class='ctx'> </div><div class='ctx'> Driver development</div><div class='ctx'> ==================</div><div class='ctx'> </div><div class='del'>-DSA switch drivers need to implement a dsa_switch_ops structure which will</div><div class='add'>+DSA switch drivers need to implement a ``dsa_switch_ops`` structure which will</div><div class='ctx'> contain the various members described below.</div><div class='ctx'> </div><div class='del'>-``register_switch_driver()`` registers this dsa_switch_ops in its internal list</div><div class='del'>-of drivers to probe for. ``unregister_switch_driver()`` does the exact opposite.</div><div class='add'>+Probing, registration and device lifetime</div><div class='add'>+-----------------------------------------</div><div class='add'>+</div><div class='add'>+DSA switches are regular ``device`` structures on buses (be they platform, SPI,</div><div class='add'>+I2C, MDIO or otherwise). The DSA framework is not involved in their probing</div><div class='add'>+with the device core.</div><div class='add'>+</div><div class='add'>+Switch registration from the perspective of a driver means passing a valid</div><div class='add'>+``struct dsa_switch`` pointer to ``dsa_register_switch()``, usually from the</div><div class='add'>+switch driver's probing function. The following members must be valid in the</div><div class='add'>+provided structure:</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;dev``: will be used to parse the switch's OF node or platform data.</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;num_ports``: will be used to create the port list for this switch, and</div><div class='add'>+  to validate the port indices provided in the OF node.</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;ops``: a pointer to the ``dsa_switch_ops`` structure holding the DSA</div><div class='add'>+  method implementations.</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;priv``: backpointer to a driver-private data structure which can be</div><div class='add'>+  retrieved in all further DSA method callbacks.</div><div class='add'>+</div><div class='add'>+In addition, the following flags in the ``dsa_switch`` structure may optionally</div><div class='add'>+be configured to obtain driver-specific behavior from the DSA core. Their</div><div class='add'>+behavior when set is documented through comments in ``include/net/dsa.h``.</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;vlan_filtering_is_global``</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;needs_standalone_vlan_filtering``</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;configure_vlan_while_not_filtering``</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;untag_bridge_pvid``</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;assisted_learning_on_cpu_port``</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;mtu_enforcement_ingress``</div><div class='add'>+</div><div class='add'>+- ``ds-&gt;fdb_isolation``</div><div class='add'>+</div><div class='add'>+Internally, DSA keeps an array of switch trees (group of switches) global to</div><div class='add'>+the kernel, and attaches a ``dsa_switch`` structure to a tree on registration.</div><div class='add'>+The tree ID to which the switch is attached is determined by the first u32</div><div class='add'>+number of the ``dsa,member`` property of the switch's OF node (0 if missing).</div><div class='add'>+The switch ID within the tree is determined by the second u32 number of the</div><div class='add'>+same OF property (0 if missing). Registering multiple switches with the same</div><div class='add'>+switch ID and tree ID is illegal and will cause an error. Using platform data,</div><div class='add'>+a single switch and a single switch tree is permitted.</div><div class='ctx'> </div><div class='del'>-Unless requested differently by setting the priv_size member accordingly, DSA</div><div class='del'>-does not allocate any driver private context space.</div><div class='add'>+In case of a tree with multiple switches, probing takes place asymmetrically.</div><div class='add'>+The first N-1 callers of ``dsa_register_switch()`` only add their ports to the</div><div class='add'>+port list of the tree (``dst-&gt;ports``), each port having a backpointer to its</div><div class='add'>+associated switch (``dp-&gt;ds``). Then, these switches exit their</div><div class='add'>+``dsa_register_switch()`` call early, because ``dsa_tree_setup_routing_table()``</div><div class='add'>+has determined that the tree is not yet complete (not all ports referenced by</div><div class='add'>+DSA links are present in the tree's port list). The tree becomes complete when</div><div class='add'>+the last switch calls ``dsa_register_switch()``, and this triggers the effective</div><div class='add'>+continuation of initialization (including the call to ``ds-&gt;ops-&gt;setup()``) for</div><div class='add'>+all switches within that tree, all as part of the calling context of the last</div><div class='add'>+switch's probe function.</div><div class='add'>+</div><div class='add'>+The opposite of registration takes place when calling ``dsa_unregister_switch()``,</div><div class='add'>+which removes a switch's ports from the port list of the tree. The entire tree</div><div class='add'>+is torn down when the first switch unregisters.</div><div class='add'>+</div><div class='add'>+It is mandatory for DSA switch drivers to implement the ``shutdown()`` callback</div><div class='add'>+of their respective bus, and call ``dsa_switch_shutdown()`` from it (a minimal</div><div class='add'>+version of the full teardown performed by ``dsa_unregister_switch()``).</div><div class='add'>+The reason is that DSA keeps a reference on the master net device, and if the</div><div class='add'>+driver for the master device decides to unbind on shutdown, DSA's reference</div><div class='add'>+will block that operation from finalizing.</div><div class='add'>+</div><div class='add'>+Either ``dsa_switch_shutdown()`` or ``dsa_unregister_switch()`` must be called,</div><div class='add'>+but not both, and the device driver model permits the bus' ``remove()`` method</div><div class='add'>+to be called even if ``shutdown()`` was already called. Therefore, drivers are</div><div class='add'>+expected to implement a mutual exclusion method between ``remove()`` and</div><div class='add'>+``shutdown()`` by setting their drvdata to NULL after any of these has run, and</div><div class='add'>+checking whether the drvdata is NULL before proceeding to take any action.</div><div class='add'>+</div><div class='add'>+After ``dsa_switch_shutdown()`` or ``dsa_unregister_switch()`` was called, no</div><div class='add'>+further callbacks via the provided ``dsa_switch_ops`` may take place, and the</div><div class='add'>+driver may free the data structures associated with the ``dsa_switch``.</div><div class='ctx'> </div><div class='ctx'> Switch configuration</div><div class='ctx'> --------------------</div><div class='ctx'> </div><div class='del'>-- ``tag_protocol``: this is to indicate what kind of tagging protocol is supported,</div><div class='del'>-  should be a valid value from the ``dsa_tag_protocol`` enum</div><div class='add'>+- ``get_tag_protocol``: this is to indicate what kind of tagging protocol is</div><div class='add'>+  supported, should be a valid value from the ``dsa_tag_protocol`` enum.</div><div class='add'>+  The returned information does not have to be static; the driver is passed the</div><div class='add'>+  CPU port number, as well as the tagging protocol of a possibly stacked</div><div class='add'>+  upstream switch, in case there are hardware limitations in terms of supported</div><div class='add'>+  tag formats.</div><div class='ctx'> </div><div class='del'>-- ``probe``: probe routine which will be invoked by the DSA platform device upon</div><div class='del'>-  registration to test for the presence/absence of a switch device. For MDIO</div><div class='del'>-  devices, it is recommended to issue a read towards internal registers using</div><div class='del'>-  the switch pseudo-PHY and return whether this is a supported device. For other</div><div class='del'>-  buses, return a non-NULL string</div><div class='add'>+- ``change_tag_protocol``: when the default tagging protocol has compatibility</div><div class='add'>+  problems with the master or other issues, the driver may support changing it</div><div class='add'>+  at runtime, either through a device tree property or through sysfs. In that</div><div class='add'>+  case, further calls to ``get_tag_protocol`` should report the protocol in</div><div class='add'>+  current use.</div><div class='ctx'> </div><div class='ctx'> - ``setup``: setup function for the switch, this function is responsible for setting</div><div class='ctx'>   up the ``dsa_switch_ops`` private structure with all it needs: register maps,</div><div class='del'>-  interrupts, mutexes, locks etc.. This function is also expected to properly</div><div class='add'>+  interrupts, mutexes, locks, etc. This function is also expected to properly</div><div class='ctx'>   configure the switch to separate all network interfaces from each other, that</div><div class='ctx'>   is, they should be isolated by the switch hardware itself, typically by creating</div><div class='ctx'>   a Port-based VLAN ID for each port and allowing only the CPU port and the</div><div class='hunk'>@@ -518,7 +631,35 @@ Switch configuration</div><div class='ctx'>   fully configured and ready to serve any kind of request. It is recommended</div><div class='ctx'>   to issue a software reset of the switch during this setup function in order to</div><div class='ctx'>   avoid relying on what a previous software agent such as a bootloader/firmware</div><div class='del'>-  may have previously configured.</div><div class='add'>+  may have previously configured. The method responsible for undoing any</div><div class='add'>+  applicable allocations or operations done here is ``teardown``.</div><div class='add'>+</div><div class='add'>+- ``port_setup`` and ``port_teardown``: methods for initialization and</div><div class='add'>+  destruction of per-port data structures. It is mandatory for some operations</div><div class='add'>+  such as registering and unregistering devlink port regions to be done from</div><div class='add'>+  these methods, otherwise they are optional. A port will be torn down only if</div><div class='add'>+  it has been previously set up. It is possible for a port to be set up during</div><div class='add'>+  probing only to be torn down immediately afterwards, for example in case its</div><div class='add'>+  PHY cannot be found. In this case, probing of the DSA switch continues</div><div class='add'>+  without that particular port.</div><div class='add'>+</div><div class='add'>+- ``port_change_master``: method through which the affinity (association used</div><div class='add'>+  for traffic termination purposes) between a user port and a CPU port can be</div><div class='add'>+  changed. By default all user ports from a tree are assigned to the first</div><div class='add'>+  available CPU port that makes sense for them (most of the times this means</div><div class='add'>+  the user ports of a tree are all assigned to the same CPU port, except for H</div><div class='add'>+  topologies as described in commit 2c0b03258b8b). The ``port`` argument</div><div class='add'>+  represents the index of the user port, and the ``master`` argument represents</div><div class='add'>+  the new DSA master ``net_device``. The CPU port associated with the new</div><div class='add'>+  master can be retrieved by looking at ``struct dsa_port *cpu_dp =</div><div class='add'>+  master-&gt;dsa_ptr``. Additionally, the master can also be a LAG device where</div><div class='add'>+  all the slave devices are physical DSA masters. LAG DSA masters also have a</div><div class='add'>+  valid ``master-&gt;dsa_ptr`` pointer, however this is not unique, but rather a</div><div class='add'>+  duplicate of the first physical DSA master's (LAG slave) ``dsa_ptr``. In case</div><div class='add'>+  of a LAG DSA master, a further call to ``port_lag_join`` will be emitted</div><div class='add'>+  separately for the physical CPU ports associated with the physical DSA</div><div class='add'>+  masters, requesting them to create a hardware LAG associated with the LAG</div><div class='add'>+  interface.</div><div class='ctx'> </div><div class='ctx'> PHY devices and link management</div><div class='ctx'> -------------------------------</div><div class='hunk'>@@ -526,13 +667,13 @@ PHY devices and link management</div><div class='ctx'> - ``get_phy_flags``: Some switches are interfaced to various kinds of Ethernet PHYs,</div><div class='ctx'>   if the PHY library PHY driver needs to know about information it cannot obtain</div><div class='ctx'>   on its own (e.g.: coming from switch memory mapped registers), this function</div><div class='del'>-  should return a 32-bits bitmask of "flags", that is private between the switch</div><div class='add'>+  should return a 32-bit bitmask of "flags" that is private between the switch</div><div class='ctx'>   driver and the Ethernet PHY driver in ``drivers/net/phy/\*``.</div><div class='ctx'> </div><div class='ctx'> - ``phy_read``: Function invoked by the DSA slave MDIO bus when attempting to read</div><div class='ctx'>   the switch port MDIO registers. If unavailable, return 0xffff for each read.</div><div class='ctx'>   For builtin switch Ethernet PHYs, this function should allow reading the link</div><div class='del'>-  status, auto-negotiation results, link partner pages etc..</div><div class='add'>+  status, auto-negotiation results, link partner pages, etc.</div><div class='ctx'> </div><div class='ctx'> - ``phy_write``: Function invoked by the DSA slave MDIO bus when attempting to write</div><div class='ctx'>   to the switch port MDIO registers. If unavailable return a negative error</div><div class='hunk'>@@ -554,7 +695,7 @@ Ethtool operations</div><div class='ctx'> ------------------</div><div class='ctx'> </div><div class='ctx'> - ``get_strings``: ethtool function used to query the driver's strings, will</div><div class='del'>-  typically return statistics strings, private flags strings etc.</div><div class='add'>+  typically return statistics strings, private flags strings, etc.</div><div class='ctx'> </div><div class='ctx'> - ``get_ethtool_stats``: ethtool function used to query per-port statistics and</div><div class='ctx'>   return their values. DSA overlays slave network devices general statistics:</div><div class='hunk'>@@ -564,7 +705,7 @@ Ethtool operations</div><div class='ctx'> - ``get_sset_count``: ethtool function used to query the number of statistics items</div><div class='ctx'> </div><div class='ctx'> - ``get_wol``: ethtool function used to obtain Wake-on-LAN settings per-port, this</div><div class='del'>-  function may, for certain implementations also query the master network device</div><div class='add'>+  function may for certain implementations also query the master network device</div><div class='ctx'>   Wake-on-LAN settings if this interface needs to participate in Wake-on-LAN</div><div class='ctx'> </div><div class='ctx'> - ``set_wol``: ethtool function used to configure Wake-on-LAN settings per-port,</div><div class='hunk'>@@ -607,37 +748,209 @@ Power management</div><div class='ctx'>   in a fully active state</div><div class='ctx'> </div><div class='ctx'> - ``port_enable``: function invoked by the DSA slave network device ndo_open</div><div class='del'>-  function when a port is administratively brought up, this function should be</div><div class='del'>-  fully enabling a given switch port. DSA takes care of marking the port with</div><div class='add'>+  function when a port is administratively brought up, this function should</div><div class='add'>+  fully enable a given switch port. DSA takes care of marking the port with</div><div class='ctx'>   ``BR_STATE_BLOCKING`` if the port is a bridge member, or ``BR_STATE_FORWARDING`` if it</div><div class='ctx'>   was not, and propagating these changes down to the hardware</div><div class='ctx'> </div><div class='ctx'> - ``port_disable``: function invoked by the DSA slave network device ndo_close</div><div class='del'>-  function when a port is administratively brought down, this function should be</div><div class='del'>-  fully disabling a given switch port. DSA takes care of marking the port with</div><div class='add'>+  function when a port is administratively brought down, this function should</div><div class='add'>+  fully disable a given switch port. DSA takes care of marking the port with</div><div class='ctx'>   ``BR_STATE_DISABLED`` and propagating changes to the hardware if this port is</div><div class='ctx'>   disabled while being a bridge member</div><div class='ctx'> </div><div class='add'>+Address databases</div><div class='add'>+-----------------</div><div class='add'>+</div><div class='add'>+Switching hardware is expected to have a table for FDB entries, however not all</div><div class='add'>+of them are active at the same time. An address database is the subset (partition)</div><div class='add'>+of FDB entries that is active (can be matched by address learning on RX, or FDB</div><div class='add'>+lookup on TX) depending on the state of the port. An address database may</div><div class='add'>+occasionally be called "FID" (Filtering ID) in this document, although the</div><div class='add'>+underlying implementation may choose whatever is available to the hardware.</div><div class='add'>+</div><div class='add'>+For example, all ports that belong to a VLAN-unaware bridge (which is</div><div class='add'>+*currently* VLAN-unaware) are expected to learn source addresses in the</div><div class='add'>+database associated by the driver with that bridge (and not with other</div><div class='add'>+VLAN-unaware bridges). During forwarding and FDB lookup, a packet received on a</div><div class='add'>+VLAN-unaware bridge port should be able to find a VLAN-unaware FDB entry having</div><div class='add'>+the same MAC DA as the packet, which is present on another port member of the</div><div class='add'>+same bridge. At the same time, the FDB lookup process must be able to not find</div><div class='add'>+an FDB entry having the same MAC DA as the packet, if that entry points towards</div><div class='add'>+a port which is a member of a different VLAN-unaware bridge (and is therefore</div><div class='add'>+associated with a different address database).</div><div class='add'>+</div><div class='add'>+Similarly, each VLAN of each offloaded VLAN-aware bridge should have an</div><div class='add'>+associated address database, which is shared by all ports which are members of</div><div class='add'>+that VLAN, but not shared by ports belonging to different bridges that are</div><div class='add'>+members of the same VID.</div><div class='add'>+</div><div class='add'>+In this context, a VLAN-unaware database means that all packets are expected to</div><div class='add'>+match on it irrespective of VLAN ID (only MAC address lookup), whereas a</div><div class='add'>+VLAN-aware database means that packets are supposed to match based on the VLAN</div><div class='add'>+ID from the classified 802.1Q header (or the pvid if untagged).</div><div class='add'>+</div><div class='add'>+At the bridge layer, VLAN-unaware FDB entries have the special VID value of 0,</div><div class='add'>+whereas VLAN-aware FDB entries have non-zero VID values. Note that a</div><div class='add'>+VLAN-unaware bridge may have VLAN-aware (non-zero VID) FDB entries, and a</div><div class='add'>+VLAN-aware bridge may have VLAN-unaware FDB entries. As in hardware, the</div><div class='add'>+software bridge keeps separate address databases, and offloads to hardware the</div><div class='add'>+FDB entries belonging to these databases, through switchdev, asynchronously</div><div class='add'>+relative to the moment when the databases become active or inactive.</div><div class='add'>+</div><div class='add'>+When a user port operates in standalone mode, its driver should configure it to</div><div class='add'>+use a separate database called a port private database. This is different from</div><div class='add'>+the databases described above, and should impede operation as standalone port</div><div class='add'>+(packet in, packet out to the CPU port) as little as possible. For example,</div><div class='add'>+on ingress, it should not attempt to learn the MAC SA of ingress traffic, since</div><div class='add'>+learning is a bridging layer service and this is a standalone port, therefore</div><div class='add'>+it would consume useless space. With no address learning, the port private</div><div class='add'>+database should be empty in a naive implementation, and in this case, all</div><div class='add'>+received packets should be trivially flooded to the CPU port.</div><div class='add'>+</div><div class='add'>+DSA (cascade) and CPU ports are also called "shared" ports because they service</div><div class='add'>+multiple address databases, and the database that a packet should be associated</div><div class='add'>+to is usually embedded in the DSA tag. This means that the CPU port may</div><div class='add'>+simultaneously transport packets coming from a standalone port (which were</div><div class='add'>+classified by hardware in one address database), and from a bridge port (which</div><div class='add'>+were classified to a different address database).</div><div class='add'>+</div><div class='add'>+Switch drivers which satisfy certain criteria are able to optimize the naive</div><div class='add'>+configuration by removing the CPU port from the flooding domain of the switch,</div><div class='add'>+and just program the hardware with FDB entries pointing towards the CPU port</div><div class='add'>+for which it is known that software is interested in those MAC addresses.</div><div class='add'>+Packets which do not match a known FDB entry will not be delivered to the CPU,</div><div class='add'>+which will save CPU cycles required for creating an skb just to drop it.</div><div class='add'>+</div><div class='add'>+DSA is able to perform host address filtering for the following kinds of</div><div class='add'>+addresses:</div><div class='add'>+</div><div class='add'>+- Primary unicast MAC addresses of ports (``dev-&gt;dev_addr``). These are</div><div class='add'>+  associated with the port private database of the respective user port,</div><div class='add'>+  and the driver is notified to install them through ``port_fdb_add`` towards</div><div class='add'>+  the CPU port.</div><div class='add'>+</div><div class='add'>+- Secondary unicast and multicast MAC addresses of ports (addresses added</div><div class='add'>+  through ``dev_uc_add()`` and ``dev_mc_add()``). These are also associated</div><div class='add'>+  with the port private database of the respective user port.</div><div class='add'>+</div><div class='add'>+- Local/permanent bridge FDB entries (``BR_FDB_LOCAL``). These are the MAC</div><div class='add'>+  addresses of the bridge ports, for which packets must be terminated locally</div><div class='add'>+  and not forwarded. They are associated with the address database for that</div><div class='add'>+  bridge.</div><div class='add'>+</div><div class='add'>+- Static bridge FDB entries installed towards foreign (non-DSA) interfaces</div><div class='add'>+  present in the same bridge as some DSA switch ports. These are also</div><div class='add'>+  associated with the address database for that bridge.</div><div class='add'>+</div><div class='add'>+- Dynamically learned FDB entries on foreign interfaces present in the same</div><div class='add'>+  bridge as some DSA switch ports, only if ``ds-&gt;assisted_learning_on_cpu_port``</div><div class='add'>+  is set to true by the driver. These are associated with the address database</div><div class='add'>+  for that bridge.</div><div class='add'>+</div><div class='add'>+For various operations detailed below, DSA provides a ``dsa_db`` structure</div><div class='add'>+which can be of the following types:</div><div class='add'>+</div><div class='add'>+- ``DSA_DB_PORT``: the FDB (or MDB) entry to be installed or deleted belongs to</div><div class='add'>+  the port private database of user port ``db-&gt;dp``.</div><div class='add'>+- ``DSA_DB_BRIDGE``: the entry belongs to one of the address databases of bridge</div><div class='add'>+  ``db-&gt;bridge``. Separation between the VLAN-unaware database and the per-VID</div><div class='add'>+  databases of this bridge is expected to be done by the driver.</div><div class='add'>+- ``DSA_DB_LAG``: the entry belongs to the address database of LAG ``db-&gt;lag``.</div><div class='add'>+  Note: ``DSA_DB_LAG`` is currently unused and may be removed in the future.</div><div class='add'>+</div><div class='add'>+The drivers which act upon the ``dsa_db`` argument in ``port_fdb_add``,</div><div class='add'>+``port_mdb_add`` etc should declare ``ds-&gt;fdb_isolation`` as true.</div><div class='add'>+</div><div class='add'>+DSA associates each offloaded bridge and each offloaded LAG with a one-based ID</div><div class='add'>+(``struct dsa_bridge :: num``, ``struct dsa_lag :: id``) for the purposes of</div><div class='add'>+refcounting addresses on shared ports. Drivers may piggyback on DSA's numbering</div><div class='add'>+scheme (the ID is readable through ``db-&gt;bridge.num`` and ``db-&gt;lag.id`` or may</div><div class='add'>+implement their own.</div><div class='add'>+</div><div class='add'>+Only the drivers which declare support for FDB isolation are notified of FDB</div><div class='add'>+entries on the CPU port belonging to ``DSA_DB_PORT`` databases.</div><div class='add'>+For compatibility/legacy reasons, ``DSA_DB_BRIDGE`` addresses are notified to</div><div class='add'>+drivers even if they do not support FDB isolation. However, ``db-&gt;bridge.num``</div><div class='add'>+and ``db-&gt;lag.id`` are always set to 0 in that case (to denote the lack of</div><div class='add'>+isolation, for refcounting purposes).</div><div class='add'>+</div><div class='add'>+Note that it is not mandatory for a switch driver to implement physically</div><div class='add'>+separate address databases for each standalone user port. Since FDB entries in</div><div class='add'>+the port private databases will always point to the CPU port, there is no risk</div><div class='add'>+for incorrect forwarding decisions. In this case, all standalone ports may</div><div class='add'>+share the same database, but the reference counting of host-filtered addresses</div><div class='add'>+(not deleting the FDB entry for a port's MAC address if it's still in use by</div><div class='add'>+another port) becomes the responsibility of the driver, because DSA is unaware</div><div class='add'>+that the port databases are in fact shared. This can be achieved by calling</div><div class='add'>+``dsa_fdb_present_in_other_db()`` and ``dsa_mdb_present_in_other_db()``.</div><div class='add'>+The down side is that the RX filtering lists of each user port are in fact</div><div class='add'>+shared, which means that user port A may accept a packet with a MAC DA it</div><div class='add'>+shouldn't have, only because that MAC address was in the RX filtering list of</div><div class='add'>+user port B. These packets will still be dropped in software, however.</div><div class='add'>+</div><div class='ctx'> Bridge layer</div><div class='ctx'> ------------</div><div class='ctx'> </div><div class='add'>+Offloading the bridge forwarding plane is optional and handled by the methods</div><div class='add'>+below. They may be absent, return -EOPNOTSUPP, or ``ds-&gt;max_num_bridges`` may</div><div class='add'>+be non-zero and exceeded, and in this case, joining a bridge port is still</div><div class='add'>+possible, but the packet forwarding will take place in software, and the ports</div><div class='add'>+under a software bridge must remain configured in the same way as for</div><div class='add'>+standalone operation, i.e. have all bridging service functions (address</div><div class='add'>+learning etc) disabled, and send all received packets to the CPU port only.</div><div class='add'>+</div><div class='add'>+Concretely, a port starts offloading the forwarding plane of a bridge once it</div><div class='add'>+returns success to the ``port_bridge_join`` method, and stops doing so after</div><div class='add'>+``port_bridge_leave`` has been called. Offloading the bridge means autonomously</div><div class='add'>+learning FDB entries in accordance with the software bridge port's state, and</div><div class='add'>+autonomously forwarding (or flooding) received packets without CPU intervention.</div><div class='add'>+This is optional even when offloading a bridge port. Tagging protocol drivers</div><div class='add'>+are expected to call ``dsa_default_offload_fwd_mark(skb)`` for packets which</div><div class='add'>+have already been autonomously forwarded in the forwarding domain of the</div><div class='add'>+ingress switch port. DSA, through ``dsa_port_devlink_setup()``, considers all</div><div class='add'>+switch ports part of the same tree ID to be part of the same bridge forwarding</div><div class='add'>+domain (capable of autonomous forwarding to each other).</div><div class='add'>+</div><div class='add'>+Offloading the TX forwarding process of a bridge is a distinct concept from</div><div class='add'>+simply offloading its forwarding plane, and refers to the ability of certain</div><div class='add'>+driver and tag protocol combinations to transmit a single skb coming from the</div><div class='add'>+bridge device's transmit function to potentially multiple egress ports (and</div><div class='add'>+thereby avoid its cloning in software).</div><div class='add'>+</div><div class='add'>+Packets for which the bridge requests this behavior are called data plane</div><div class='add'>+packets and have ``skb-&gt;offload_fwd_mark`` set to true in the tag protocol</div><div class='add'>+driver's ``xmit`` function. Data plane packets are subject to FDB lookup,</div><div class='add'>+hardware learning on the CPU port, and do not override the port STP state.</div><div class='add'>+Additionally, replication of data plane packets (multicast, flooding) is</div><div class='add'>+handled in hardware and the bridge driver will transmit a single skb for each</div><div class='add'>+packet that may or may not need replication.</div><div class='add'>+</div><div class='add'>+When the TX forwarding offload is enabled, the tag protocol driver is</div><div class='add'>+responsible to inject packets into the data plane of the hardware towards the</div><div class='add'>+correct bridging domain (FID) that the port is a part of. The port may be</div><div class='add'>+VLAN-unaware, and in this case the FID must be equal to the FID used by the</div><div class='add'>+driver for its VLAN-unaware address database associated with that bridge.</div><div class='add'>+Alternatively, the bridge may be VLAN-aware, and in that case, it is guaranteed</div><div class='add'>+that the packet is also VLAN-tagged with the VLAN ID that the bridge processed</div><div class='add'>+this packet in. It is the responsibility of the hardware to untag the VID on</div><div class='add'>+the egress-untagged ports, or keep the tag on the egress-tagged ones.</div><div class='add'>+</div><div class='ctx'> - ``port_bridge_join``: bridge layer function invoked when a given switch port is</div><div class='del'>-  added to a bridge, this function should be doing the necessary at the switch</div><div class='del'>-  level to permit the joining port from being added to the relevant logical</div><div class='add'>+  added to a bridge, this function should do what's necessary at the switch</div><div class='add'>+  level to permit the joining port to be added to the relevant logical</div><div class='ctx'>   domain for it to ingress/egress traffic with other members of the bridge.</div><div class='add'>+  By setting the ``tx_fwd_offload`` argument to true, the TX forwarding process</div><div class='add'>+  of this bridge is also offloaded.</div><div class='ctx'> </div><div class='ctx'> - ``port_bridge_leave``: bridge layer function invoked when a given switch port is</div><div class='del'>-  removed from a bridge, this function should be doing the necessary at the</div><div class='add'>+  removed from a bridge, this function should do what's necessary at the</div><div class='ctx'>   switch level to deny the leaving port from ingress/egress traffic from the</div><div class='del'>-  remaining bridge members. When the port leaves the bridge, it should be aged</div><div class='del'>-  out at the switch hardware for the switch to (re) learn MAC addresses behind</div><div class='del'>-  this port.</div><div class='add'>+  remaining bridge members.</div><div class='ctx'> </div><div class='ctx'> - ``port_stp_state_set``: bridge layer function invoked when a given switch port STP</div><div class='ctx'>   state is computed by the bridge layer and should be propagated to switch</div><div class='del'>-  hardware to forward/block/learn traffic. The switch driver is responsible for</div><div class='del'>-  computing a STP state change based on current and asked parameters and perform</div><div class='del'>-  the relevant ageing based on the intersection results</div><div class='add'>+  hardware to forward/block/learn traffic.</div><div class='ctx'> </div><div class='ctx'> - ``port_bridge_flags``: bridge layer function invoked when a port must</div><div class='ctx'>   configure its settings for e.g. flooding of unknown traffic or source address</div><div class='hunk'>@@ -650,21 +963,11 @@ Bridge layer</div><div class='ctx'>   CPU port, and flooding towards the CPU port should also be enabled, due to a</div><div class='ctx'>   lack of an explicit address filtering mechanism in the DSA core.</div><div class='ctx'> </div><div class='del'>-- ``port_bridge_tx_fwd_offload``: bridge layer function invoked after</div><div class='del'>-  ``port_bridge_join`` when a driver sets ``ds-&gt;num_fwd_offloading_bridges`` to</div><div class='del'>-  a non-zero value. Returning success in this function activates the TX</div><div class='del'>-  forwarding offload bridge feature for this port, which enables the tagging</div><div class='del'>-  protocol driver to inject data plane packets towards the bridging domain that</div><div class='del'>-  the port is a part of. Data plane packets are subject to FDB lookup, hardware</div><div class='del'>-  learning on the CPU port, and do not override the port STP state.</div><div class='del'>-  Additionally, replication of data plane packets (multicast, flooding) is</div><div class='del'>-  handled in hardware and the bridge driver will transmit a single skb for each</div><div class='del'>-  packet that needs replication. The method is provided as a configuration</div><div class='del'>-  point for drivers that need to configure the hardware for enabling this</div><div class='del'>-  feature.</div><div class='del'>-</div><div class='del'>-- ``port_bridge_tx_fwd_unoffload``: bridge layer function invoken when a driver</div><div class='del'>-  leaves a bridge port which had the TX forwarding offload feature enabled.</div><div class='add'>+- ``port_fast_age``: bridge layer function invoked when flushing the</div><div class='add'>+  dynamically learned FDB entries on the port is necessary. This is called when</div><div class='add'>+  transitioning from an STP state where learning should take place to an STP</div><div class='add'>+  state where it shouldn't, or when leaving a bridge, or when address learning</div><div class='add'>+  is turned off via ``port_bridge_flags``.</div><div class='ctx'> </div><div class='ctx'> Bridge VLAN filtering</div><div class='ctx'> ---------------------</div><div class='hunk'>@@ -680,55 +983,44 @@ Bridge VLAN filtering</div><div class='ctx'>   allowed.</div><div class='ctx'> </div><div class='ctx'> - ``port_vlan_add``: bridge layer function invoked when a VLAN is configured</div><div class='del'>-  (tagged or untagged) for the given switch port. If the operation is not</div><div class='del'>-  supported by the hardware, this function should return ``-EOPNOTSUPP`` to</div><div class='del'>-  inform the bridge code to fallback to a software implementation.</div><div class='add'>+  (tagged or untagged) for the given switch port. The CPU port becomes a member</div><div class='add'>+  of a VLAN only if a foreign bridge port is also a member of it (and</div><div class='add'>+  forwarding needs to take place in software), or the VLAN is installed to the</div><div class='add'>+  VLAN group of the bridge device itself, for termination purposes</div><div class='add'>+  (``bridge vlan add dev br0 vid 100 self``). VLANs on shared ports are</div><div class='add'>+  reference counted and removed when there is no user left. Drivers do not need</div><div class='add'>+  to manually install a VLAN on the CPU port.</div><div class='ctx'> </div><div class='ctx'> - ``port_vlan_del``: bridge layer function invoked when a VLAN is removed from the</div><div class='ctx'>   given switch port</div><div class='ctx'> </div><div class='del'>-- ``port_vlan_dump``: bridge layer function invoked with a switchdev callback</div><div class='del'>-  function that the driver has to call for each VLAN the given port is a member</div><div class='del'>-  of. A switchdev object is used to carry the VID and bridge flags.</div><div class='del'>-</div><div class='ctx'> - ``port_fdb_add``: bridge layer function invoked when the bridge wants to install a</div><div class='ctx'>   Forwarding Database entry, the switch hardware should be programmed with the</div><div class='ctx'>   specified address in the specified VLAN Id in the forwarding database</div><div class='del'>-  associated with this VLAN ID. If the operation is not supported, this</div><div class='del'>-  function should return ``-EOPNOTSUPP`` to inform the bridge code to fallback to</div><div class='del'>-  a software implementation.</div><div class='del'>-</div><div class='del'>-.. note:: VLAN ID 0 corresponds to the port private database, which, in the context</div><div class='del'>-        of DSA, would be its port-based VLAN, used by the associated bridge device.</div><div class='add'>+  associated with this VLAN ID.</div><div class='ctx'> </div><div class='ctx'> - ``port_fdb_del``: bridge layer function invoked when the bridge wants to remove a</div><div class='ctx'>   Forwarding Database entry, the switch hardware should be programmed to delete</div><div class='ctx'>   the specified MAC address from the specified VLAN ID if it was mapped into</div><div class='ctx'>   this port forwarding database</div><div class='ctx'> </div><div class='del'>-- ``port_fdb_dump``: bridge layer function invoked with a switchdev callback</div><div class='del'>-  function that the driver has to call for each MAC address known to be behind</div><div class='del'>-  the given port. A switchdev object is used to carry the VID and FDB info.</div><div class='add'>+- ``port_fdb_dump``: bridge bypass function invoked by ``ndo_fdb_dump`` on the</div><div class='add'>+  physical DSA port interfaces. Since DSA does not attempt to keep in sync its</div><div class='add'>+  hardware FDB entries with the software bridge, this method is implemented as</div><div class='add'>+  a means to view the entries visible on user ports in the hardware database.</div><div class='add'>+  The entries reported by this function have the ``self`` flag in the output of</div><div class='add'>+  the ``bridge fdb show`` command.</div><div class='ctx'> </div><div class='ctx'> - ``port_mdb_add``: bridge layer function invoked when the bridge wants to install</div><div class='del'>-  a multicast database entry. If the operation is not supported, this function</div><div class='del'>-  should return ``-EOPNOTSUPP`` to inform the bridge code to fallback to a</div><div class='del'>-  software implementation. The switch hardware should be programmed with the</div><div class='add'>+  a multicast database entry. The switch hardware should be programmed with the</div><div class='ctx'>   specified address in the specified VLAN ID in the forwarding database</div><div class='ctx'>   associated with this VLAN ID.</div><div class='ctx'> </div><div class='del'>-.. note:: VLAN ID 0 corresponds to the port private database, which, in the context</div><div class='del'>-        of DSA, would be its port-based VLAN, used by the associated bridge device.</div><div class='del'>-</div><div class='ctx'> - ``port_mdb_del``: bridge layer function invoked when the bridge wants to remove a</div><div class='ctx'>   multicast database entry, the switch hardware should be programmed to delete</div><div class='ctx'>   the specified MAC address from the specified VLAN ID if it was mapped into</div><div class='ctx'>   this port forwarding database.</div><div class='ctx'> </div><div class='del'>-- ``port_mdb_dump``: bridge layer function invoked with a switchdev callback</div><div class='del'>-  function that the driver has to call for each MAC address known to be behind</div><div class='del'>-  the given port. A switchdev object is used to carry the VID and MDB info.</div><div class='del'>-</div><div class='ctx'> Link aggregation</div><div class='ctx'> ----------------</div><div class='ctx'> </div><div class='hunk'>@@ -835,9 +1127,3 @@ capable hardware, but does not enforce a strict switch device driver model. On</div><div class='ctx'> the other DSA enforces a fairly strict device driver model, and deals with most</div><div class='ctx'> of the switch specific. At some point we should envision a merger between these</div><div class='ctx'> two subsystems and get the best of both worlds.</div><div class='del'>-</div><div class='del'>-Other hanging fruits</div><div class='del'>---------------------</div><div class='del'>-</div><div class='del'>-- allowing more than one CPU/management interface:</div><div class='del'>-  http://comments.gmane.org/gmane.linux.network/365657</div><div class='head'>diff --git a/Documentation/networking/ethtool-netlink.rst b/Documentation/networking/ethtool-netlink.rst<br/>index 24d9be69065d..2540c70952ff 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ethtool-netlink.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/ethtool-netlink.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ethtool-netlink.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/ethtool-netlink.rst</a></div><div class='hunk'>@@ -106,7 +106,7 @@ modifying a bitmap, the former changes the bit set in mask to values set in</div><div class='ctx'> value and preserves the rest; the latter sets the bits set in the bitmap and</div><div class='ctx'> clears the rest.</div><div class='ctx'> </div><div class='del'>-Compact form: nested (bitset) atrribute contents:</div><div class='add'>+Compact form: nested (bitset) attribute contents:</div><div class='ctx'> </div><div class='ctx'>   ============================  ======  ============================</div><div class='ctx'>   ``ETHTOOL_A_BITSET_NOMASK``   flag    no mask, only a list</div><div class='hunk'>@@ -220,6 +220,11 @@ Userspace to kernel:</div><div class='ctx'>   ``ETHTOOL_MSG_PHC_VCLOCKS_GET``       get PHC virtual clocks info</div><div class='ctx'>   ``ETHTOOL_MSG_MODULE_SET``            set transceiver module parameters</div><div class='ctx'>   ``ETHTOOL_MSG_MODULE_GET``            get transceiver module parameters</div><div class='add'>+  ``ETHTOOL_MSG_PSE_SET``               set PSE parameters</div><div class='add'>+  ``ETHTOOL_MSG_PSE_GET``               get PSE parameters</div><div class='add'>+  ``ETHTOOL_MSG_RSS_GET``               get RSS settings</div><div class='add'>+  ``ETHTOOL_MSG_MM_GET``                get MAC merge layer state</div><div class='add'>+  ``ETHTOOL_MSG_MM_SET``                set MAC merge layer parameters</div><div class='ctx'>   ===================================== =================================</div><div class='ctx'> </div><div class='ctx'> Kernel to userspace:</div><div class='hunk'>@@ -260,6 +265,9 @@ Kernel to userspace:</div><div class='ctx'>   ``ETHTOOL_MSG_STATS_GET_REPLY``          standard statistics</div><div class='ctx'>   ``ETHTOOL_MSG_PHC_VCLOCKS_GET_REPLY``    PHC virtual clocks info</div><div class='ctx'>   ``ETHTOOL_MSG_MODULE_GET_REPLY``         transceiver module parameters</div><div class='add'>+  ``ETHTOOL_MSG_PSE_GET_REPLY``            PSE parameters</div><div class='add'>+  ``ETHTOOL_MSG_RSS_GET_REPLY``            RSS settings</div><div class='add'>+  ``ETHTOOL_MSG_MM_GET_REPLY``             MAC merge layer status</div><div class='ctx'>   ======================================== =================================</div><div class='ctx'> </div><div class='ctx'> ``GET`` requests are sent by userspace applications to retrieve device</div><div class='hunk'>@@ -426,6 +434,7 @@ Kernel response contents:</div><div class='ctx'>   ``ETHTOOL_A_LINKMODES_DUPLEX``              u8      duplex mode</div><div class='ctx'>   ``ETHTOOL_A_LINKMODES_MASTER_SLAVE_CFG``    u8      Master/slave port mode</div><div class='ctx'>   ``ETHTOOL_A_LINKMODES_MASTER_SLAVE_STATE``  u8      Master/slave port state</div><div class='add'>+  ``ETHTOOL_A_LINKMODES_RATE_MATCHING``       u8      PHY rate matching</div><div class='ctx'>   ==========================================  ======  ==========================</div><div class='ctx'> </div><div class='ctx'> For ``ETHTOOL_A_LINKMODES_OURS``, value represents advertised modes and mask</div><div class='hunk'>@@ -449,6 +458,7 @@ Request contents:</div><div class='ctx'>   ``ETHTOOL_A_LINKMODES_SPEED``               u32     link speed (Mb/s)</div><div class='ctx'>   ``ETHTOOL_A_LINKMODES_DUPLEX``              u8      duplex mode</div><div class='ctx'>   ``ETHTOOL_A_LINKMODES_MASTER_SLAVE_CFG``    u8      Master/slave port mode</div><div class='add'>+  ``ETHTOOL_A_LINKMODES_RATE_MATCHING``       u8      PHY rate matching</div><div class='ctx'>   ``ETHTOOL_A_LINKMODES_LANES``               u32     lanes</div><div class='ctx'>   ==========================================  ======  ==========================</div><div class='ctx'> </div><div class='hunk'>@@ -486,6 +496,7 @@ Kernel response contents:</div><div class='ctx'>   ``ETHTOOL_A_LINKSTATE_SQI_MAX``       u32     Max support SQI value</div><div class='ctx'>   ``ETHTOOL_A_LINKSTATE_EXT_STATE``     u8      link extended state</div><div class='ctx'>   ``ETHTOOL_A_LINKSTATE_EXT_SUBSTATE``  u8      link extended substate</div><div class='add'>+  ``ETHTOOL_A_LINKSTATE_EXT_DOWN_CNT``  u32     count of link down events</div><div class='ctx'>   ====================================  ======  ============================</div><div class='ctx'> </div><div class='ctx'> For most NIC drivers, the value of ``ETHTOOL_A_LINKSTATE_LINK`` returns</div><div class='hunk'>@@ -772,7 +783,7 @@ Kernel response contents:</div><div class='ctx'>   ``ETHTOOL_A_FEATURES_ACTIVE``         bitset  diff old vs. new active</div><div class='ctx'>   ====================================  ======  ==========================</div><div class='ctx'> </div><div class='del'>-Request constains only one bitset which can be either value/mask pair (request</div><div class='add'>+Request contains only one bitset which can be either value/mask pair (request</div><div class='ctx'> to change specific feature bits and leave the rest) or only a value (request</div><div class='ctx'> to set all features to specified set).</div><div class='ctx'> </div><div class='hunk'>@@ -849,20 +860,24 @@ Request contents:</div><div class='ctx'> </div><div class='ctx'> Kernel response contents:</div><div class='ctx'> </div><div class='del'>-  ====================================  ======  ===========================</div><div class='del'>-  ``ETHTOOL_A_RINGS_HEADER``            nested  reply header</div><div class='del'>-  ``ETHTOOL_A_RINGS_RX_MAX``            u32     max size of RX ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_RX_MINI_MAX``       u32     max size of RX mini ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_RX_JUMBO_MAX``      u32     max size of RX jumbo ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_TX_MAX``            u32     max size of TX ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_RX``                u32     size of RX ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_RX_MINI``           u32     size of RX mini ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_RX_JUMBO``          u32     size of RX jumbo ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_TX``                u32     size of TX ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_RX_BUF_LEN``        u32     size of buffers on the ring</div><div class='del'>-  ``ETHTOOL_A_RINGS_TCP_DATA_SPLIT``    u8      TCP header / data split</div><div class='del'>-  ``ETHTOOL_A_RINGS_CQE_SIZE``          u32     Size of TX/RX CQE</div><div class='del'>-  ====================================  ======  ===========================</div><div class='add'>+  =======================================   ======  ===========================</div><div class='add'>+  ``ETHTOOL_A_RINGS_HEADER``                nested  reply header</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_MAX``                u32     max size of RX ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_MINI_MAX``           u32     max size of RX mini ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_JUMBO_MAX``          u32     max size of RX jumbo ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_TX_MAX``                u32     max size of TX ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX``                    u32     size of RX ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_MINI``               u32     size of RX mini ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_JUMBO``              u32     size of RX jumbo ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_TX``                    u32     size of TX ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_BUF_LEN``            u32     size of buffers on the ring</div><div class='add'>+  ``ETHTOOL_A_RINGS_TCP_DATA_SPLIT``        u8      TCP header / data split</div><div class='add'>+  ``ETHTOOL_A_RINGS_CQE_SIZE``              u32     Size of TX/RX CQE</div><div class='add'>+  ``ETHTOOL_A_RINGS_TX_PUSH``               u8      flag of TX Push mode</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_PUSH``               u8      flag of RX Push mode</div><div class='add'>+  ``ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN``       u32     size of TX push buffer</div><div class='add'>+  ``ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN_MAX``   u32     max size of TX push buffer</div><div class='add'>+  =======================================   ======  ===========================</div><div class='ctx'> </div><div class='ctx'> ``ETHTOOL_A_RINGS_TCP_DATA_SPLIT`` indicates whether the device is usable with</div><div class='ctx'> page-flipping TCP zero-copy receive (``getsockopt(TCP_ZEROCOPY_RECEIVE)``).</div><div class='hunk'>@@ -871,6 +886,24 @@ separate buffers. The device configuration must make it possible to receive</div><div class='ctx'> full memory pages of data, for example because MTU is high enough or through</div><div class='ctx'> HW-GRO.</div><div class='ctx'> </div><div class='add'>+``ETHTOOL_A_RINGS_[RX|TX]_PUSH`` flag is used to enable descriptor fast</div><div class='add'>+path to send or receive packets. In ordinary path, driver fills descriptors in DRAM and</div><div class='add'>+notifies NIC hardware. In fast path, driver pushes descriptors to the device</div><div class='add'>+through MMIO writes, thus reducing the latency. However, enabling this feature</div><div class='add'>+may increase the CPU cost. Drivers may enforce additional per-packet</div><div class='add'>+eligibility checks (e.g. on packet size).</div><div class='add'>+</div><div class='add'>+``ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN`` specifies the maximum number of bytes of a</div><div class='add'>+transmitted packet a driver can push directly to the underlying device</div><div class='add'>+('push' mode). Pushing some of the payload bytes to the device has the</div><div class='add'>+advantages of reducing latency for small packets by avoiding DMA mapping (same</div><div class='add'>+as ``ETHTOOL_A_RINGS_TX_PUSH`` parameter) as well as allowing the underlying</div><div class='add'>+device to process packet headers ahead of fetching its payload.</div><div class='add'>+This can help the device to make fast actions based on the packet's headers.</div><div class='add'>+This is similar to the "tx-copybreak" parameter, which copies the packet to a</div><div class='add'>+preallocated DMA memory area instead of mapping new memory. However,</div><div class='add'>+tx-push-buff parameter copies the packet directly to the device to allow the</div><div class='add'>+device to take faster actions on the packet.</div><div class='ctx'> </div><div class='ctx'> RINGS_SET</div><div class='ctx'> =========</div><div class='hunk'>@@ -887,6 +920,9 @@ Request contents:</div><div class='ctx'>   ``ETHTOOL_A_RINGS_TX``                u32     size of TX ring</div><div class='ctx'>   ``ETHTOOL_A_RINGS_RX_BUF_LEN``        u32     size of buffers on the ring</div><div class='ctx'>   ``ETHTOOL_A_RINGS_CQE_SIZE``          u32     Size of TX/RX CQE</div><div class='add'>+  ``ETHTOOL_A_RINGS_TX_PUSH``           u8      flag of TX Push mode</div><div class='add'>+  ``ETHTOOL_A_RINGS_RX_PUSH``           u8      flag of RX Push mode</div><div class='add'>+  ``ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN``   u32     size of TX push buffer</div><div class='ctx'>   ====================================  ======  ===========================</div><div class='ctx'> </div><div class='ctx'> Kernel checks that requested ring sizes do not exceed limits reported by</div><div class='hunk'>@@ -988,6 +1024,9 @@ Kernel response contents:</div><div class='ctx'>   ``ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL``  u32     rate sampling interval</div><div class='ctx'>   ``ETHTOOL_A_COALESCE_USE_CQE_TX``            bool    timer reset mode, Tx</div><div class='ctx'>   ``ETHTOOL_A_COALESCE_USE_CQE_RX``            bool    timer reset mode, Rx</div><div class='add'>+  ``ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES``     u32     max aggr size, Tx</div><div class='add'>+  ``ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES``    u32     max aggr packets, Tx</div><div class='add'>+  ``ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS``    u32     time (us), aggr, Tx</div><div class='ctx'>   ===========================================  ======  =======================</div><div class='ctx'> </div><div class='ctx'> Attributes are only included in reply if their value is not zero or the</div><div class='hunk'>@@ -1006,6 +1045,17 @@ each packet event resets the timer. In this mode timer is used to force</div><div class='ctx'> the interrupt if queue goes idle, while busy queues depend on the packet</div><div class='ctx'> limit to trigger interrupts.</div><div class='ctx'> </div><div class='add'>+Tx aggregation consists of copying frames into a contiguous buffer so that they</div><div class='add'>+can be submitted as a single IO operation. ``ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES``</div><div class='add'>+describes the maximum size in bytes for the submitted buffer.</div><div class='add'>+``ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES`` describes the maximum number of frames</div><div class='add'>+that can be aggregated into a single buffer.</div><div class='add'>+``ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS`` describes the amount of time in usecs,</div><div class='add'>+counted since the first packet arrival in an aggregated block, after which the</div><div class='add'>+block should be sent.</div><div class='add'>+This feature is mainly of interest for specific USB devices which does not cope</div><div class='add'>+well with frequent small-sized URBs transmissions.</div><div class='add'>+</div><div class='ctx'> COALESCE_SET</div><div class='ctx'> ============</div><div class='ctx'> </div><div class='hunk'>@@ -1039,6 +1089,9 @@ Request contents:</div><div class='ctx'>   ``ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL``  u32     rate sampling interval</div><div class='ctx'>   ``ETHTOOL_A_COALESCE_USE_CQE_TX``            bool    timer reset mode, Tx</div><div class='ctx'>   ``ETHTOOL_A_COALESCE_USE_CQE_RX``            bool    timer reset mode, Rx</div><div class='add'>+  ``ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES``     u32     max aggr size, Tx</div><div class='add'>+  ``ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES``    u32     max aggr packets, Tx</div><div class='add'>+  ``ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS``    u32     time (us), aggr, Tx</div><div class='ctx'>   ===========================================  ======  =======================</div><div class='ctx'> </div><div class='ctx'> Request is rejected if it attributes declared as unsupported by driver (i.e.</div><div class='hunk'>@@ -1046,6 +1099,10 @@ such that the corresponding bit in ``ethtool_ops::supported_coalesce_params``</div><div class='ctx'> is not set), regardless of their values. Driver may impose additional</div><div class='ctx'> constraints on coalescing parameters and their values.</div><div class='ctx'> </div><div class='add'>+Compared to requests issued via the ``ioctl()`` netlink version of this request</div><div class='add'>+will try harder to make sure that values specified by the user have been applied</div><div class='add'>+and may call the driver twice.</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> PAUSE_GET</div><div class='ctx'> =========</div><div class='hunk'>@@ -1056,8 +1113,18 @@ Request contents:</div><div class='ctx'> </div><div class='ctx'>   =====================================  ======  ==========================</div><div class='ctx'>   ``ETHTOOL_A_PAUSE_HEADER``             nested  request header</div><div class='add'>+  ``ETHTOOL_A_PAUSE_STATS_SRC``          u32     source of statistics</div><div class='ctx'>   =====================================  ======  ==========================</div><div class='ctx'> </div><div class='add'>+``ETHTOOL_A_PAUSE_STATS_SRC`` is optional. It takes values from:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_mac_stats_src</div><div class='add'>+</div><div class='add'>+If absent from the request, stats will be provided with</div><div class='add'>+an ``ETHTOOL_A_PAUSE_STATS_SRC`` attribute in the response equal to</div><div class='add'>+``ETHTOOL_MAC_STATS_SRC_AGGREGATE``.</div><div class='add'>+</div><div class='ctx'> Kernel response contents:</div><div class='ctx'> </div><div class='ctx'>   =====================================  ======  ==========================</div><div class='hunk'>@@ -1472,6 +1539,7 @@ Request contents:</div><div class='ctx'> </div><div class='ctx'>   =======================================  ======  ==========================</div><div class='ctx'>   ``ETHTOOL_A_STATS_HEADER``               nested  request header</div><div class='add'>+  ``ETHTOOL_A_STATS_SRC``                  u32     source of statistics</div><div class='ctx'>   ``ETHTOOL_A_STATS_GROUPS``               bitset  requested groups of stats</div><div class='ctx'>   =======================================  ======  ==========================</div><div class='ctx'> </div><div class='hunk'>@@ -1480,6 +1548,8 @@ Kernel response contents:</div><div class='ctx'>  +-----------------------------------+--------+--------------------------------+</div><div class='ctx'>  | ``ETHTOOL_A_STATS_HEADER``        | nested | reply header                   |</div><div class='ctx'>  +-----------------------------------+--------+--------------------------------+</div><div class='add'>+ | ``ETHTOOL_A_STATS_SRC``           | u32    | source of statistics           |</div><div class='add'>+ +-----------------------------------+--------+--------------------------------+</div><div class='ctx'>  | ``ETHTOOL_A_STATS_GRP``           | nested | one or more group of stats     |</div><div class='ctx'>  +-+---------------------------------+--------+--------------------------------+</div><div class='ctx'>  | | ``ETHTOOL_A_STATS_GRP_ID``      | u32    | group ID - ``ETHTOOL_STATS_*`` |</div><div class='hunk'>@@ -1541,6 +1611,11 @@ Low and high bounds are inclusive, for example:</div><div class='ctx'>  etherStatsPkts512to1023Octets 512  1023</div><div class='ctx'>  ============================= ==== ====</div><div class='ctx'> </div><div class='add'>+``ETHTOOL_A_STATS_SRC`` is optional. Similar to ``PAUSE_GET``, it takes values</div><div class='add'>+from ``enum ethtool_mac_stats_src``. If absent from the request, stats will be</div><div class='add'>+provided with an ``ETHTOOL_A_STATS_SRC`` attribute in the response equal to</div><div class='add'>+``ETHTOOL_MAC_STATS_SRC_AGGREGATE``.</div><div class='add'>+</div><div class='ctx'> PHC_VCLOCKS_GET</div><div class='ctx'> ===============</div><div class='ctx'> </div><div class='hunk'>@@ -1617,6 +1692,308 @@ For SFF-8636 modules, low power mode is forced by the host according to table</div><div class='ctx'> For CMIS modules, low power mode is forced by the host according to table 6-12</div><div class='ctx'> in revision 5.0 of the specification.</div><div class='ctx'> </div><div class='add'>+PSE_GET</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+Gets PSE attributes.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+  =====================================  ======  ==========================</div><div class='add'>+  ``ETHTOOL_A_PSE_HEADER``               nested  request header</div><div class='add'>+  =====================================  ======  ==========================</div><div class='add'>+</div><div class='add'>+Kernel response contents:</div><div class='add'>+</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+  ``ETHTOOL_A_PSE_HEADER``                nested  reply header</div><div class='add'>+  ``ETHTOOL_A_PODL_PSE_ADMIN_STATE``         u32  Operational state of the PoDL</div><div class='add'>+                                                  PSE functions</div><div class='add'>+  ``ETHTOOL_A_PODL_PSE_PW_D_STATUS``         u32  power detection status of the</div><div class='add'>+                                                  PoDL PSE.</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` attribute identifies</div><div class='add'>+the operational state of the PoDL PSE functions.  The operational state of the</div><div class='add'>+PSE function can be changed using the ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL``</div><div class='add'>+action. This option is corresponding to ``IEEE 802.3-2018`` 30.15.1.1.2</div><div class='add'>+aPoDLPSEAdminState. Possible values are:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_podl_pse_admin_state</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PODL_PSE_PW_D_STATUS`` attribute identifies</div><div class='add'>+the power detection status of the PoDL PSE.  The status depend on internal PSE</div><div class='add'>+state machine and automatic PD classification support. This option is</div><div class='add'>+corresponding to ``IEEE 802.3-2018`` 30.15.1.1.3 aPoDLPSEPowerDetectionStatus.</div><div class='add'>+Possible values are:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_podl_pse_pw_d_status</div><div class='add'>+</div><div class='add'>+PSE_SET</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+Sets PSE parameters.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+  ``ETHTOOL_A_PSE_HEADER``                nested  request header</div><div class='add'>+  ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL``       u32  Control PoDL PSE Admin state</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PODL_PSE_ADMIN_CONTROL`` attribute is used</div><div class='add'>+to control PoDL PSE Admin functions. This option is implementing</div><div class='add'>+``IEEE 802.3-2018`` 30.15.1.2.1 acPoDLPSEAdminControl. See</div><div class='add'>+``ETHTOOL_A_PODL_PSE_ADMIN_STATE`` for supported values.</div><div class='add'>+</div><div class='add'>+RSS_GET</div><div class='add'>+=======</div><div class='add'>+</div><div class='add'>+Get indirection table, hash key and hash function info associated with a</div><div class='add'>+RSS context of an interface similar to ``ETHTOOL_GRSSH`` ioctl request.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+=====================================  ======  ==========================</div><div class='add'>+  ``ETHTOOL_A_RSS_HEADER``             nested  request header</div><div class='add'>+  ``ETHTOOL_A_RSS_CONTEXT``            u32     context number</div><div class='add'>+=====================================  ======  ==========================</div><div class='add'>+</div><div class='add'>+Kernel response contents:</div><div class='add'>+</div><div class='add'>+=====================================  ======  ==========================</div><div class='add'>+  ``ETHTOOL_A_RSS_HEADER``             nested  reply header</div><div class='add'>+  ``ETHTOOL_A_RSS_HFUNC``              u32     RSS hash func</div><div class='add'>+  ``ETHTOOL_A_RSS_INDIR``              binary  Indir table bytes</div><div class='add'>+  ``ETHTOOL_A_RSS_HKEY``               binary  Hash key bytes</div><div class='add'>+=====================================  ======  ==========================</div><div class='add'>+</div><div class='add'>+ETHTOOL_A_RSS_HFUNC attribute is bitmap indicating the hash function</div><div class='add'>+being used. Current supported options are toeplitz, xor or crc32.</div><div class='add'>+ETHTOOL_A_RSS_INDIR attribute returns RSS indrection table where each byte</div><div class='add'>+indicates queue number.</div><div class='add'>+</div><div class='add'>+PLCA_GET_CFG</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+Gets the IEEE 802.3cg-2019 Clause 148 Physical Layer Collision Avoidance</div><div class='add'>+(PLCA) Reconciliation Sublayer (RS) attributes.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+  =====================================  ======  ==========================</div><div class='add'>+  ``ETHTOOL_A_PLCA_HEADER``              nested  request header</div><div class='add'>+  =====================================  ======  ==========================</div><div class='add'>+</div><div class='add'>+Kernel response contents:</div><div class='add'>+</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+  ``ETHTOOL_A_PLCA_HEADER``               nested  reply header</div><div class='add'>+  ``ETHTOOL_A_PLCA_VERSION``              u16     Supported PLCA management</div><div class='add'>+                                                  interface standard/version</div><div class='add'>+  ``ETHTOOL_A_PLCA_ENABLED``              u8      PLCA Admin State</div><div class='add'>+  ``ETHTOOL_A_PLCA_NODE_ID``              u32     PLCA unique local node ID</div><div class='add'>+  ``ETHTOOL_A_PLCA_NODE_CNT``             u32     Number of PLCA nodes on the</div><div class='add'>+                                                  network, including the</div><div class='add'>+                                                  coordinator</div><div class='add'>+  ``ETHTOOL_A_PLCA_TO_TMR``               u32     Transmit Opportunity Timer</div><div class='add'>+                                                  value in bit-times (BT)</div><div class='add'>+  ``ETHTOOL_A_PLCA_BURST_CNT``            u32     Number of additional packets</div><div class='add'>+                                                  the node is allowed to send</div><div class='add'>+                                                  within a single TO</div><div class='add'>+  ``ETHTOOL_A_PLCA_BURST_TMR``            u32     Time to wait for the MAC to</div><div class='add'>+                                                  transmit a new frame before</div><div class='add'>+                                                  terminating the burst</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PLCA_VERSION`` attribute indicates which</div><div class='add'>+standard and version the PLCA management interface complies to. When not set,</div><div class='add'>+the interface is vendor-specific and (possibly) supplied by the driver.</div><div class='add'>+The OPEN Alliance SIG specifies a standard register map for 10BASE-T1S PHYs</div><div class='add'>+embedding the PLCA Reconcialiation Sublayer. See "10BASE-T1S PLCA Management</div><div class='add'>+Registers" at https://www.opensig.org/about/specifications/.</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PLCA_ENABLED`` attribute indicates the</div><div class='add'>+administrative state of the PLCA RS. When not set, the node operates in "plain"</div><div class='add'>+CSMA/CD mode. This option is corresponding to ``IEEE 802.3cg-2019`` 30.16.1.1.1</div><div class='add'>+aPLCAAdminState / 30.16.1.2.1 acPLCAAdminControl.</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PLCA_NODE_ID`` attribute indicates the</div><div class='add'>+configured local node ID of the PHY. This ID determines which transmit</div><div class='add'>+opportunity (TO) is reserved for the node to transmit into. This option is</div><div class='add'>+corresponding to ``IEEE 802.3cg-2019`` 30.16.1.1.4 aPLCALocalNodeID. The valid</div><div class='add'>+range for this attribute is [0 .. 255] where 255 means "not configured".</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PLCA_NODE_CNT`` attribute indicates the</div><div class='add'>+configured maximum number of PLCA nodes on the mixing-segment. This number</div><div class='add'>+determines the total number of transmit opportunities generated during a</div><div class='add'>+PLCA cycle. This attribute is relevant only for the PLCA coordinator, which is</div><div class='add'>+the node with aPLCALocalNodeID set to 0. Follower nodes ignore this setting.</div><div class='add'>+This option is corresponding to ``IEEE 802.3cg-2019`` 30.16.1.1.3</div><div class='add'>+aPLCANodeCount. The valid range for this attribute is [1 .. 255].</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PLCA_TO_TMR`` attribute indicates the</div><div class='add'>+configured value of the transmit opportunity timer in bit-times. This value</div><div class='add'>+must be set equal across all nodes sharing the medium for PLCA to work</div><div class='add'>+correctly. This option is corresponding to ``IEEE 802.3cg-2019`` 30.16.1.1.5</div><div class='add'>+aPLCATransmitOpportunityTimer. The valid range for this attribute is</div><div class='add'>+[0 .. 255].</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PLCA_BURST_CNT`` attribute indicates the</div><div class='add'>+configured number of extra packets that the node is allowed to send during a</div><div class='add'>+single transmit opportunity. By default, this attribute is 0, meaning that</div><div class='add'>+the node can only send a single frame per TO. When greater than 0, the PLCA RS</div><div class='add'>+keeps the TO after any transmission, waiting for the MAC to send a new frame</div><div class='add'>+for up to aPLCABurstTimer BTs. This can only happen a number of times per PLCA</div><div class='add'>+cycle up to the value of this parameter. After that, the burst is over and the</div><div class='add'>+normal counting of TOs resumes. This option is corresponding to</div><div class='add'>+``IEEE 802.3cg-2019`` 30.16.1.1.6 aPLCAMaxBurstCount. The valid range for this</div><div class='add'>+attribute is [0 .. 255].</div><div class='add'>+</div><div class='add'>+When set, the optional ``ETHTOOL_A_PLCA_BURST_TMR`` attribute indicates how</div><div class='add'>+many bit-times the PLCA RS waits for the MAC to initiate a new transmission</div><div class='add'>+when aPLCAMaxBurstCount is greater than 0. If the MAC fails to send a new</div><div class='add'>+frame within this time, the burst ends and the counting of TOs resumes.</div><div class='add'>+Otherwise, the new frame is sent as part of the current burst. This option</div><div class='add'>+is corresponding to ``IEEE 802.3cg-2019`` 30.16.1.1.7 aPLCABurstTimer. The</div><div class='add'>+valid range for this attribute is [0 .. 255]. Although, the value should be</div><div class='add'>+set greater than the Inter-Frame-Gap (IFG) time of the MAC (plus some margin)</div><div class='add'>+for PLCA burst mode to work as intended.</div><div class='add'>+</div><div class='add'>+PLCA_SET_CFG</div><div class='add'>+============</div><div class='add'>+</div><div class='add'>+Sets PLCA RS parameters.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+  ``ETHTOOL_A_PLCA_HEADER``               nested  request header</div><div class='add'>+  ``ETHTOOL_A_PLCA_ENABLED``              u8      PLCA Admin State</div><div class='add'>+  ``ETHTOOL_A_PLCA_NODE_ID``              u8      PLCA unique local node ID</div><div class='add'>+  ``ETHTOOL_A_PLCA_NODE_CNT``             u8      Number of PLCA nodes on the</div><div class='add'>+                                                  netkork, including the</div><div class='add'>+                                                  coordinator</div><div class='add'>+  ``ETHTOOL_A_PLCA_TO_TMR``               u8      Transmit Opportunity Timer</div><div class='add'>+                                                  value in bit-times (BT)</div><div class='add'>+  ``ETHTOOL_A_PLCA_BURST_CNT``            u8      Number of additional packets</div><div class='add'>+                                                  the node is allowed to send</div><div class='add'>+                                                  within a single TO</div><div class='add'>+  ``ETHTOOL_A_PLCA_BURST_TMR``            u8      Time to wait for the MAC to</div><div class='add'>+                                                  transmit a new frame before</div><div class='add'>+                                                  terminating the burst</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+</div><div class='add'>+For a description of each attribute, see ``PLCA_GET_CFG``.</div><div class='add'>+</div><div class='add'>+PLCA_GET_STATUS</div><div class='add'>+===============</div><div class='add'>+</div><div class='add'>+Gets PLCA RS status information.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+  =====================================  ======  ==========================</div><div class='add'>+  ``ETHTOOL_A_PLCA_HEADER``              nested  request header</div><div class='add'>+  =====================================  ======  ==========================</div><div class='add'>+</div><div class='add'>+Kernel response contents:</div><div class='add'>+</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+  ``ETHTOOL_A_PLCA_HEADER``               nested  reply header</div><div class='add'>+  ``ETHTOOL_A_PLCA_STATUS``               u8      PLCA RS operational status</div><div class='add'>+  ======================================  ======  =============================</div><div class='add'>+</div><div class='add'>+When set, the ``ETHTOOL_A_PLCA_STATUS`` attribute indicates whether the node is</div><div class='add'>+detecting the presence of the BEACON on the network. This flag is</div><div class='add'>+corresponding to ``IEEE 802.3cg-2019`` 30.16.1.1.2 aPLCAStatus.</div><div class='add'>+</div><div class='add'>+MM_GET</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+Retrieve 802.3 MAC Merge parameters.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+  ====================================  ======  ==========================</div><div class='add'>+  ``ETHTOOL_A_MM_HEADER``               nested  request header</div><div class='add'>+  ====================================  ======  ==========================</div><div class='add'>+</div><div class='add'>+Kernel response contents:</div><div class='add'>+</div><div class='add'>+  =================================  ======  ===================================</div><div class='add'>+  ``ETHTOOL_A_MM_HEADER``            nested  request header</div><div class='add'>+  ``ETHTOOL_A_MM_PMAC_ENABLED``      bool    set if RX of preemptible and SMD-V</div><div class='add'>+                                             frames is enabled</div><div class='add'>+  ``ETHTOOL_A_MM_TX_ENABLED``        bool    set if TX of preemptible frames is</div><div class='add'>+                                             administratively enabled (might be</div><div class='add'>+                                             inactive if verification failed)</div><div class='add'>+  ``ETHTOOL_A_MM_TX_ACTIVE``         bool    set if TX of preemptible frames is</div><div class='add'>+                                             operationally enabled</div><div class='add'>+  ``ETHTOOL_A_MM_TX_MIN_FRAG_SIZE``  u32     minimum size of transmitted</div><div class='add'>+                                             non-final fragments, in octets</div><div class='add'>+  ``ETHTOOL_A_MM_RX_MIN_FRAG_SIZE``  u32     minimum size of received non-final</div><div class='add'>+                                             fragments, in octets</div><div class='add'>+  ``ETHTOOL_A_MM_VERIFY_ENABLED``    bool    set if TX of SMD-V frames is</div><div class='add'>+                                             administratively enabled</div><div class='add'>+  ``ETHTOOL_A_MM_VERIFY_STATUS``     u8      state of the verification function</div><div class='add'>+  ``ETHTOOL_A_MM_VERIFY_TIME``       u32     delay between verification attempts</div><div class='add'>+  ``ETHTOOL_A_MM_MAX_VERIFY_TIME```  u32     maximum verification interval</div><div class='add'>+                                             supported by device</div><div class='add'>+  ``ETHTOOL_A_MM_STATS``             nested  IEEE 802.3-2018 subclause 30.14.1</div><div class='add'>+                                             oMACMergeEntity statistics counters</div><div class='add'>+  =================================  ======  ===================================</div><div class='add'>+</div><div class='add'>+The attributes are populated by the device driver through the following</div><div class='add'>+structure:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_mm_state</div><div class='add'>+</div><div class='add'>+The ``ETHTOOL_A_MM_VERIFY_STATUS`` will report one of the values from</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/uapi/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_mm_verify_status</div><div class='add'>+</div><div class='add'>+If ``ETHTOOL_A_MM_VERIFY_ENABLED`` was passed as false in the ``MM_SET``</div><div class='add'>+command, ``ETHTOOL_A_MM_VERIFY_STATUS`` will report either</div><div class='add'>+``ETHTOOL_MM_VERIFY_STATUS_INITIAL`` or ``ETHTOOL_MM_VERIFY_STATUS_DISABLED``,</div><div class='add'>+otherwise it should report one of the other states.</div><div class='add'>+</div><div class='add'>+It is recommended that drivers start with the pMAC disabled, and enable it upon</div><div class='add'>+user space request. It is also recommended that user space does not depend upon</div><div class='add'>+the default values from ``ETHTOOL_MSG_MM_GET`` requests.</div><div class='add'>+</div><div class='add'>+``ETHTOOL_A_MM_STATS`` are reported if ``ETHTOOL_FLAG_STATS`` was set in</div><div class='add'>+``ETHTOOL_A_HEADER_FLAGS``. The attribute will be empty if driver did not</div><div class='add'>+report any statistics. Drivers fill in the statistics in the following</div><div class='add'>+structure:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_mm_stats</div><div class='add'>+</div><div class='add'>+MM_SET</div><div class='add'>+======</div><div class='add'>+</div><div class='add'>+Modifies the configuration of the 802.3 MAC Merge layer.</div><div class='add'>+</div><div class='add'>+Request contents:</div><div class='add'>+</div><div class='add'>+  =================================  ======  ==========================</div><div class='add'>+  ``ETHTOOL_A_MM_VERIFY_TIME``       u32     see MM_GET description</div><div class='add'>+  ``ETHTOOL_A_MM_VERIFY_ENABLED``    bool    see MM_GET description</div><div class='add'>+  ``ETHTOOL_A_MM_TX_ENABLED``        bool    see MM_GET description</div><div class='add'>+  ``ETHTOOL_A_MM_PMAC_ENABLED``      bool    see MM_GET description</div><div class='add'>+  ``ETHTOOL_A_MM_TX_MIN_FRAG_SIZE``  u32     see MM_GET description</div><div class='add'>+  =================================  ======  ==========================</div><div class='add'>+</div><div class='add'>+The attributes are propagated to the driver through the following structure:</div><div class='add'>+</div><div class='add'>+.. kernel-doc:: include/linux/ethtool.h</div><div class='add'>+    :identifiers: ethtool_mm_cfg</div><div class='add'>+</div><div class='ctx'> Request translation</div><div class='ctx'> ===================</div><div class='ctx'> </div><div class='hunk'>@@ -1698,7 +2075,7 @@ are netlink only.</div><div class='ctx'>   ``ETHTOOL_GMODULEEEPROM``           ``ETHTOOL_MSG_MODULE_EEPROM_GET``</div><div class='ctx'>   ``ETHTOOL_GEEE``                    ``ETHTOOL_MSG_EEE_GET``</div><div class='ctx'>   ``ETHTOOL_SEEE``                    ``ETHTOOL_MSG_EEE_SET``</div><div class='del'>-  ``ETHTOOL_GRSSH``                   n/a</div><div class='add'>+  ``ETHTOOL_GRSSH``                   ``ETHTOOL_MSG_RSS_GET``</div><div class='ctx'>   ``ETHTOOL_SRSSH``                   n/a</div><div class='ctx'>   ``ETHTOOL_GTUNABLE``                n/a</div><div class='ctx'>   ``ETHTOOL_STUNABLE``                n/a</div><div class='hunk'>@@ -1718,4 +2095,9 @@ are netlink only.</div><div class='ctx'>   n/a                                 ``ETHTOOL_MSG_PHC_VCLOCKS_GET``</div><div class='ctx'>   n/a                                 ``ETHTOOL_MSG_MODULE_GET``</div><div class='ctx'>   n/a                                 ``ETHTOOL_MSG_MODULE_SET``</div><div class='add'>+  n/a                                 ``ETHTOOL_MSG_PLCA_GET_CFG``</div><div class='add'>+  n/a                                 ``ETHTOOL_MSG_PLCA_SET_CFG``</div><div class='add'>+  n/a                                 ``ETHTOOL_MSG_PLCA_GET_STATUS``</div><div class='add'>+  n/a                                 ``ETHTOOL_MSG_MM_GET``</div><div class='add'>+  n/a                                 ``ETHTOOL_MSG_MM_SET``</div><div class='ctx'>   =================================== =====================================</div><div class='head'>diff --git a/Documentation/networking/filter.rst b/Documentation/networking/filter.rst<br/>index 43cdc4d34745..f69da5074860 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/filter.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/filter.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/filter.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/filter.rst</a></div><div class='hunk'>@@ -305,7 +305,7 @@ Possible BPF extensions are shown in the following table:</div><div class='ctx'>   vlan_tci                              skb_vlan_tag_get(skb)</div><div class='ctx'>   vlan_avail                            skb_vlan_tag_present(skb)</div><div class='ctx'>   vlan_tpid                             skb-&gt;vlan_proto</div><div class='del'>-  rand                                  prandom_u32()</div><div class='add'>+  rand                                  get_random_u32()</div><div class='ctx'>   ===================================   =================================================</div><div class='ctx'> </div><div class='ctx'> These extensions can also be prefixed with '#'.</div><div class='head'>diff --git a/Documentation/networking/generic_netlink.rst b/Documentation/networking/generic_netlink.rst<br/>index 59e04ccf80c1..d960dbd7e80e 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/generic_netlink.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/generic_netlink.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/generic_netlink.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/generic_netlink.rst</a></div><div class='hunk'>@@ -6,4 +6,4 @@ Generic Netlink</div><div class='ctx'> </div><div class='ctx'> A wiki document on how to use Generic Netlink can be found here:</div><div class='ctx'> </div><div class='del'>- * http://www.linuxfoundation.org/collaborate/workgroups/networking/generic_netlink_howto</div><div class='add'>+ * https://wiki.linuxfoundation.org/networking/generic_netlink_howto</div><div class='head'>diff --git a/Documentation/networking/gtp.rst b/Documentation/networking/gtp.rst<br/>index 1563fb94b289..9a7835cc1437 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/gtp.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/gtp.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/gtp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/gtp.rst</a></div><div class='hunk'>@@ -162,7 +162,7 @@ Local GTP-U entity and tunnel identification</div><div class='ctx'> GTP-U uses UDP for transporting PDU's. The receiving UDP port is 2152</div><div class='ctx'> for GTPv1-U and 3386 for GTPv0-U.</div><div class='ctx'> </div><div class='del'>-There is only one GTP-U entity (and therefor SGSN/GGSN/S-GW/PDN-GW</div><div class='add'>+There is only one GTP-U entity (and therefore SGSN/GGSN/S-GW/PDN-GW</div><div class='ctx'> instance) per IP address. Tunnel Endpoint Identifier (TEID) are unique</div><div class='ctx'> per GTP-U entity.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/ieee802154.rst b/Documentation/networking/ieee802154.rst<br/>index f27856d77c8b..c652d383fe10 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ieee802154.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/ieee802154.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ieee802154.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/ieee802154.rst</a></div><div class='hunk'>@@ -70,7 +70,7 @@ Like with WiFi, there are several types of devices implementing IEEE 802.15.4.</div><div class='ctx'> exports a management (e.g. MLME) and data API.</div><div class='ctx'> 2) 'SoftMAC' or just radio. These types of devices are just radio transceivers</div><div class='ctx'> possibly with some kinds of acceleration like automatic CRC computation and</div><div class='del'>-comparation, automagic ACK handling, address matching, etc.</div><div class='add'>+comparison, automagic ACK handling, address matching, etc.</div><div class='ctx'> </div><div class='ctx'> Those types of devices require different approach to be hooked into Linux kernel.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/index.rst b/Documentation/networking/index.rst<br/>index 72cf33579b78..5b75c3f7a137 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/index.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/index.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/index.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/index.rst</a></div><div class='hunk'>@@ -1,5 +1,5 @@</div><div class='del'>-Linux Networking Documentation</div><div class='del'>-==============================</div><div class='add'>+Networking</div><div class='add'>+==========</div><div class='ctx'> </div><div class='ctx'> Refer to :ref:`netdev-FAQ` for a guide on netdev development process specifics.</div><div class='ctx'> </div><div class='hunk'>@@ -36,6 +36,7 @@ Contents:</div><div class='ctx'>    scaling</div><div class='ctx'>    tls</div><div class='ctx'>    tls-offload</div><div class='add'>+   tls-handshake</div><div class='ctx'>    nfc</div><div class='ctx'>    6lowpan</div><div class='ctx'>    6pack</div><div class='hunk'>@@ -47,7 +48,6 @@ Contents:</div><div class='ctx'>    cdc_mbim</div><div class='ctx'>    dccp</div><div class='ctx'>    dctcp</div><div class='del'>-   decnet</div><div class='ctx'>    dns_resolver</div><div class='ctx'>    driver</div><div class='ctx'>    eql</div><div class='hunk'>@@ -74,6 +74,7 @@ Contents:</div><div class='ctx'>    mpls-sysctl</div><div class='ctx'>    mptcp-sysctl</div><div class='ctx'>    multiqueue</div><div class='add'>+   napi</div><div class='ctx'>    netconsole</div><div class='ctx'>    netdev-features</div><div class='ctx'>    netdevices</div><div class='hunk'>@@ -93,16 +94,19 @@ Contents:</div><div class='ctx'>    radiotap-headers</div><div class='ctx'>    rds</div><div class='ctx'>    regulatory</div><div class='add'>+   representors</div><div class='ctx'>    rxrpc</div><div class='ctx'>    sctp</div><div class='ctx'>    secid</div><div class='ctx'>    seg6-sysctl</div><div class='add'>+   skbuff</div><div class='ctx'>    smc-sysctl</div><div class='ctx'>    statistics</div><div class='ctx'>    strparser</div><div class='ctx'>    switchdev</div><div class='ctx'>    sysfs-tagging</div><div class='ctx'>    tc-actions-env-rules</div><div class='add'>+   tc-queue-filters</div><div class='ctx'>    tcp-thin</div><div class='ctx'>    team</div><div class='ctx'>    timestamping</div><div class='hunk'>@@ -112,12 +116,13 @@ Contents:</div><div class='ctx'>    udplite</div><div class='ctx'>    vrf</div><div class='ctx'>    vxlan</div><div class='del'>-   x25-iface</div><div class='ctx'>    x25</div><div class='add'>+   x25-iface</div><div class='ctx'>    xfrm_device</div><div class='ctx'>    xfrm_proc</div><div class='ctx'>    xfrm_sync</div><div class='ctx'>    xfrm_sysctl</div><div class='add'>+   xdp-rx-metadata</div><div class='ctx'> </div><div class='ctx'> .. only::  subproject and html</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/ip-sysctl.rst b/Documentation/networking/ip-sysctl.rst<br/>index b0024aa7b051..6ec06a33688a 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ip-sysctl.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/ip-sysctl.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ip-sysctl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/ip-sysctl.rst</a></div><div class='hunk'>@@ -50,7 +50,7 @@ ip_no_pmtu_disc - INTEGER</div><div class='ctx'> 	Default: FALSE</div><div class='ctx'> </div><div class='ctx'> min_pmtu - INTEGER</div><div class='del'>-	default 552 - minimum Path MTU. Unless this is changed mannually,</div><div class='add'>+	default 552 - minimum Path MTU. Unless this is changed manually,</div><div class='ctx'> 	each cached pmtu will never be lower than this setting.</div><div class='ctx'> </div><div class='ctx'> ip_forward_use_pmtu - BOOLEAN</div><div class='hunk'>@@ -156,6 +156,9 @@ route/max_size - INTEGER</div><div class='ctx'> 	From linux kernel 3.6 onwards, this is deprecated for ipv4</div><div class='ctx'> 	as route cache is no longer used.</div><div class='ctx'> </div><div class='add'>+	From linux kernel 6.3 onwards, this is deprecated for ipv6</div><div class='add'>+	as garbage collection manages cached route entries.</div><div class='add'>+</div><div class='ctx'> neigh/default/gc_thresh1 - INTEGER</div><div class='ctx'> 	Minimum number of entries to keep.  Garbage collector will not</div><div class='ctx'> 	purge entries if there are fewer than this number.</div><div class='hunk'>@@ -202,6 +205,12 @@ neigh/default/unres_qlen - INTEGER</div><div class='ctx'> </div><div class='ctx'> 	Default: 101</div><div class='ctx'> </div><div class='add'>+neigh/default/interval_probe_time_ms - INTEGER</div><div class='add'>+	The probe interval for neighbor entries with NTF_MANAGED flag,</div><div class='add'>+	the min value is 1.</div><div class='add'>+</div><div class='add'>+	Default: 5000</div><div class='add'>+</div><div class='ctx'> mtu_expires - INTEGER</div><div class='ctx'> 	Time, in seconds, that cached PMTU information is kept.</div><div class='ctx'> </div><div class='hunk'>@@ -267,6 +276,13 @@ ipfrag_max_dist - INTEGER</div><div class='ctx'> 	from different IP datagrams, which could result in data corruption.</div><div class='ctx'> 	Default: 64</div><div class='ctx'> </div><div class='add'>+bc_forwarding - INTEGER</div><div class='add'>+	bc_forwarding enables the feature described in rfc1812#section-5.3.5.2</div><div class='add'>+	and rfc2644. It allows the router to forward directed broadcast.</div><div class='add'>+	To enable this feature, the 'all' entry and the input interface entry</div><div class='add'>+	should be set to 1.</div><div class='add'>+	Default: 0</div><div class='add'>+</div><div class='ctx'> INET peer storage</div><div class='ctx'> =================</div><div class='ctx'> </div><div class='hunk'>@@ -324,6 +340,8 @@ tcp_app_win - INTEGER</div><div class='ctx'> 	Reserve max(window/2^tcp_app_win, mss) of window for application</div><div class='ctx'> 	buffer. Value 0 is special, it means that nothing is reserved.</div><div class='ctx'> </div><div class='add'>+	Possible values are [0, 31], inclusive.</div><div class='add'>+</div><div class='ctx'> 	Default: 31</div><div class='ctx'> </div><div class='ctx'> tcp_autocorking - BOOLEAN</div><div class='hunk'>@@ -623,6 +641,16 @@ tcp_recovery - INTEGER</div><div class='ctx'> </div><div class='ctx'> 	Default: 0x1</div><div class='ctx'> </div><div class='add'>+tcp_reflect_tos - BOOLEAN</div><div class='add'>+	For listening sockets, reuse the DSCP value of the initial SYN message</div><div class='add'>+	for outgoing packets. This allows to have both directions of a TCP</div><div class='add'>+	stream to use the same DSCP value, assuming DSCP remains unchanged for</div><div class='add'>+	the lifetime of the connection.</div><div class='add'>+</div><div class='add'>+	This options affects both IPv4 and IPv6.</div><div class='add'>+</div><div class='add'>+	Default: 0 (disabled)</div><div class='add'>+</div><div class='ctx'> tcp_reordering - INTEGER</div><div class='ctx'> 	Initial reordering level of packets in a TCP stream.</div><div class='ctx'> 	TCP stack can then dynamically adjust flow reordering level</div><div class='hunk'>@@ -1012,7 +1040,114 @@ tcp_limit_output_bytes - INTEGER</div><div class='ctx'> tcp_challenge_ack_limit - INTEGER</div><div class='ctx'> 	Limits number of Challenge ACK sent per second, as recommended</div><div class='ctx'> 	in RFC 5961 (Improving TCP's Robustness to Blind In-Window Attacks)</div><div class='del'>-	Default: 1000</div><div class='add'>+	Note that this per netns rate limit can allow some side channel</div><div class='add'>+	attacks and probably should not be enabled.</div><div class='add'>+	TCP stack implements per TCP socket limits anyway.</div><div class='add'>+	Default: INT_MAX (unlimited)</div><div class='add'>+</div><div class='add'>+tcp_ehash_entries - INTEGER</div><div class='add'>+	Show the number of hash buckets for TCP sockets in the current</div><div class='add'>+	networking namespace.</div><div class='add'>+</div><div class='add'>+	A negative value means the networking namespace does not own its</div><div class='add'>+	hash buckets and shares the initial networking namespace's one.</div><div class='add'>+</div><div class='add'>+tcp_child_ehash_entries - INTEGER</div><div class='add'>+	Control the number of hash buckets for TCP sockets in the child</div><div class='add'>+	networking namespace, which must be set before clone() or unshare().</div><div class='add'>+</div><div class='add'>+	If the value is not 0, the kernel uses a value rounded up to 2^n</div><div class='add'>+	as the actual hash bucket size.  0 is a special value, meaning</div><div class='add'>+	the child networking namespace will share the initial networking</div><div class='add'>+	namespace's hash buckets.</div><div class='add'>+</div><div class='add'>+	Note that the child will use the global one in case the kernel</div><div class='add'>+	fails to allocate enough memory.  In addition, the global hash</div><div class='add'>+	buckets are spread over available NUMA nodes, but the allocation</div><div class='add'>+	of the child hash table depends on the current process's NUMA</div><div class='add'>+	policy, which could result in performance differences.</div><div class='add'>+</div><div class='add'>+	Note also that the default value of tcp_max_tw_buckets and</div><div class='add'>+	tcp_max_syn_backlog depend on the hash bucket size.</div><div class='add'>+</div><div class='add'>+	Possible values: 0, 2^n (n: 0 - 24 (16Mi))</div><div class='add'>+</div><div class='add'>+	Default: 0</div><div class='add'>+</div><div class='add'>+tcp_plb_enabled - BOOLEAN</div><div class='add'>+	If set and the underlying congestion control (e.g. DCTCP) supports</div><div class='add'>+	and enables PLB feature, TCP PLB (Protective Load Balancing) is</div><div class='add'>+	enabled. PLB is described in the following paper:</div><div class='add'>+	https://doi.org/10.1145/3544216.3544226. Based on PLB parameters,</div><div class='add'>+	upon sensing sustained congestion, TCP triggers a change in</div><div class='add'>+	flow label field for outgoing IPv6 packets. A change in flow label</div><div class='add'>+	field potentially changes the path of outgoing packets for switches</div><div class='add'>+	that use ECMP/WCMP for routing.</div><div class='add'>+</div><div class='add'>+	PLB changes socket txhash which results in a change in IPv6 Flow Label</div><div class='add'>+	field, and currently no-op for IPv4 headers. It is possible</div><div class='add'>+	to apply PLB for IPv4 with other network header fields (e.g. TCP</div><div class='add'>+	or IPv4 options) or using encapsulation where outer header is used</div><div class='add'>+	by switches to determine next hop. In either case, further host</div><div class='add'>+	and switch side changes will be needed.</div><div class='add'>+</div><div class='add'>+	When set, PLB assumes that congestion signal (e.g. ECN) is made</div><div class='add'>+	available and used by congestion control module to estimate a</div><div class='add'>+	congestion measure (e.g. ce_ratio). PLB needs a congestion measure to</div><div class='add'>+	make repathing decisions.</div><div class='add'>+</div><div class='add'>+	Default: FALSE</div><div class='add'>+</div><div class='add'>+tcp_plb_idle_rehash_rounds - INTEGER</div><div class='add'>+	Number of consecutive congested rounds (RTT) seen after which</div><div class='add'>+	a rehash can be performed, given there are no packets in flight.</div><div class='add'>+	This is referred to as M in PLB paper:</div><div class='add'>+	https://doi.org/10.1145/3544216.3544226.</div><div class='add'>+</div><div class='add'>+	Possible Values: 0 - 31</div><div class='add'>+</div><div class='add'>+	Default: 3</div><div class='add'>+</div><div class='add'>+tcp_plb_rehash_rounds - INTEGER</div><div class='add'>+	Number of consecutive congested rounds (RTT) seen after which</div><div class='add'>+	a forced rehash can be performed. Be careful when setting this</div><div class='add'>+	parameter, as a small value increases the risk of retransmissions.</div><div class='add'>+	This is referred to as N in PLB paper:</div><div class='add'>+	https://doi.org/10.1145/3544216.3544226.</div><div class='add'>+</div><div class='add'>+	Possible Values: 0 - 31</div><div class='add'>+</div><div class='add'>+	Default: 12</div><div class='add'>+</div><div class='add'>+tcp_plb_suspend_rto_sec - INTEGER</div><div class='add'>+	Time, in seconds, to suspend PLB in event of an RTO. In order to avoid</div><div class='add'>+	having PLB repath onto a connectivity "black hole", after an RTO a TCP</div><div class='add'>+	connection suspends PLB repathing for a random duration between 1x and</div><div class='add'>+	2x of this parameter. Randomness is added to avoid concurrent rehashing</div><div class='add'>+	of multiple TCP connections. This should be set corresponding to the</div><div class='add'>+	amount of time it takes to repair a failed link.</div><div class='add'>+</div><div class='add'>+	Possible Values: 0 - 255</div><div class='add'>+</div><div class='add'>+	Default: 60</div><div class='add'>+</div><div class='add'>+tcp_plb_cong_thresh - INTEGER</div><div class='add'>+	Fraction of packets marked with congestion over a round (RTT) to</div><div class='add'>+	tag that round as congested. This is referred to as K in the PLB paper:</div><div class='add'>+	https://doi.org/10.1145/3544216.3544226.</div><div class='add'>+</div><div class='add'>+	The 0-1 fraction range is mapped to 0-256 range to avoid floating</div><div class='add'>+	point operations. For example, 128 means that if at least 50% of</div><div class='add'>+	the packets in a round were marked as congested then the round</div><div class='add'>+	will be tagged as congested.</div><div class='add'>+</div><div class='add'>+	Setting threshold to 0 means that PLB repaths every RTT regardless</div><div class='add'>+	of congestion. This is not intended behavior for PLB and should be</div><div class='add'>+	used only for experimentation purpose.</div><div class='add'>+</div><div class='add'>+	Possible Values: 0 - 256</div><div class='add'>+</div><div class='add'>+	Default: 128</div><div class='ctx'> </div><div class='ctx'> UDP variables</div><div class='ctx'> =============</div><div class='hunk'>@@ -1045,11 +1180,34 @@ udp_rmem_min - INTEGER</div><div class='ctx'> 	Default: 4K</div><div class='ctx'> </div><div class='ctx'> udp_wmem_min - INTEGER</div><div class='del'>-	Minimal size of send buffer used by UDP sockets in moderation.</div><div class='del'>-	Each UDP socket is able to use the size for sending data, even if</div><div class='del'>-	total pages of UDP sockets exceed udp_mem pressure. The unit is byte.</div><div class='add'>+	UDP does not have tx memory accounting and this tunable has no effect.</div><div class='add'>+</div><div class='add'>+udp_hash_entries - INTEGER</div><div class='add'>+	Show the number of hash buckets for UDP sockets in the current</div><div class='add'>+	networking namespace.</div><div class='add'>+</div><div class='add'>+	A negative value means the networking namespace does not own its</div><div class='add'>+	hash buckets and shares the initial networking namespace's one.</div><div class='add'>+</div><div class='add'>+udp_child_ehash_entries - INTEGER</div><div class='add'>+	Control the number of hash buckets for UDP sockets in the child</div><div class='add'>+	networking namespace, which must be set before clone() or unshare().</div><div class='add'>+</div><div class='add'>+	If the value is not 0, the kernel uses a value rounded up to 2^n</div><div class='add'>+	as the actual hash bucket size.  0 is a special value, meaning</div><div class='add'>+	the child networking namespace will share the initial networking</div><div class='add'>+	namespace's hash buckets.</div><div class='add'>+</div><div class='add'>+	Note that the child will use the global one in case the kernel</div><div class='add'>+	fails to allocate enough memory.  In addition, the global hash</div><div class='add'>+	buckets are spread over available NUMA nodes, but the allocation</div><div class='add'>+	of the child hash table depends on the current process's NUMA</div><div class='add'>+	policy, which could result in performance differences.</div><div class='add'>+</div><div class='add'>+	Possible values: 0, 2^n (n: 7 (128) - 16 (64K))</div><div class='add'>+</div><div class='add'>+	Default: 0</div><div class='ctx'> </div><div class='del'>-	Default: 4K</div><div class='ctx'> </div><div class='ctx'> RAW variables</div><div class='ctx'> =============</div><div class='hunk'>@@ -1078,7 +1236,7 @@ cipso_cache_enable - BOOLEAN</div><div class='ctx'> cipso_cache_bucket_size - INTEGER</div><div class='ctx'> 	The CIPSO label cache consists of a fixed size hash table with each</div><div class='ctx'> 	hash bucket containing a number of cache entries.  This variable limits</div><div class='del'>-	the number of entries in each hash bucket; the larger the value the</div><div class='add'>+	the number of entries in each hash bucket; the larger the value is, the</div><div class='ctx'> 	more CIPSO label mappings that can be cached.  When the number of</div><div class='ctx'> 	entries in a given hash bucket reaches this limit adding new entries</div><div class='ctx'> 	causes the oldest entry in the bucket to be removed to make room.</div><div class='hunk'>@@ -1172,7 +1330,7 @@ ip_autobind_reuse - BOOLEAN</div><div class='ctx'> 	option should only be set by experts.</div><div class='ctx'> 	Default: 0</div><div class='ctx'> </div><div class='del'>-ip_dynaddr - BOOLEAN</div><div class='add'>+ip_dynaddr - INTEGER</div><div class='ctx'> 	If set non-zero, enables support for dynamic addresses.</div><div class='ctx'> 	If set to a non-zero value larger than 1, a kernel log</div><div class='ctx'> 	message will be printed when dynamic address rewriting</div><div class='hunk'>@@ -1436,6 +1594,14 @@ proxy_arp_pvlan - BOOLEAN</div><div class='ctx'> 	  Hewlett-Packard call it Source-Port filtering or port-isolation.</div><div class='ctx'> 	  Ericsson call it MAC-Forced Forwarding (RFC Draft).</div><div class='ctx'> </div><div class='add'>+proxy_delay - INTEGER</div><div class='add'>+	Delay proxy response.</div><div class='add'>+</div><div class='add'>+	Delay response to a neighbor solicitation when proxy_arp</div><div class='add'>+	or proxy_ndp is enabled. A random value between [0, proxy_delay)</div><div class='add'>+	will be chosen, setting to zero means reply with no delay.</div><div class='add'>+	Value in jiffies. Defaults to 80.</div><div class='add'>+</div><div class='ctx'> shared_media - BOOLEAN</div><div class='ctx'> 	Send(router) or accept(host) RFC1620 shared media redirects.</div><div class='ctx'> 	Overrides secure_redirects.</div><div class='hunk'>@@ -1620,12 +1786,15 @@ arp_notify - BOOLEAN</div><div class='ctx'> 	     or hardware address changes.</div><div class='ctx'> 	 ==  ==========================================================</div><div class='ctx'> </div><div class='del'>-arp_accept - BOOLEAN</div><div class='del'>-	Define behavior for gratuitous ARP frames who's IP is not</div><div class='del'>-	already present in the ARP table:</div><div class='add'>+arp_accept - INTEGER</div><div class='add'>+	Define behavior for accepting gratuitous ARP (garp) frames from devices</div><div class='add'>+	that are not already present in the ARP table:</div><div class='ctx'> </div><div class='ctx'> 	- 0 - don't create new entries in the ARP table</div><div class='ctx'> 	- 1 - create new entries in the ARP table</div><div class='add'>+	- 2 - create new entries only if the source IP address is in the same</div><div class='add'>+	  subnet as an address configured on the interface that received the</div><div class='add'>+	  garp message.</div><div class='ctx'> </div><div class='ctx'> 	Both replies and requests type gratuitous arp will trigger the</div><div class='ctx'> 	ARP table to be updated, if this setting is on.</div><div class='hunk'>@@ -1919,7 +2088,7 @@ skip_notify_on_dev_down - BOOLEAN</div><div class='ctx'> </div><div class='ctx'> nexthop_compat_mode - BOOLEAN</div><div class='ctx'> 	New nexthop API provides a means for managing nexthops independent of</div><div class='del'>-	prefixes. Backwards compatibilty with old route format is enabled by</div><div class='add'>+	prefixes. Backwards compatibility with old route format is enabled by</div><div class='ctx'> 	default which means route dumps and notifications contain the new</div><div class='ctx'> 	nexthop attribute but also the full, expanded nexthop definition.</div><div class='ctx'> 	Further, updates or deletes of a nexthop configuration generate route</div><div class='hunk'>@@ -2467,6 +2636,37 @@ drop_unsolicited_na - BOOLEAN</div><div class='ctx'> </div><div class='ctx'> 	By default this is turned off.</div><div class='ctx'> </div><div class='add'>+accept_untracked_na - INTEGER</div><div class='add'>+	Define behavior for accepting neighbor advertisements from devices that</div><div class='add'>+	are absent in the neighbor cache:</div><div class='add'>+</div><div class='add'>+	- 0 - (default) Do not accept unsolicited and untracked neighbor</div><div class='add'>+	  advertisements.</div><div class='add'>+</div><div class='add'>+	- 1 - Add a new neighbor cache entry in STALE state for routers on</div><div class='add'>+	  receiving a neighbor advertisement (either solicited or unsolicited)</div><div class='add'>+	  with target link-layer address option specified if no neighbor entry</div><div class='add'>+	  is already present for the advertised IPv6 address. Without this knob,</div><div class='add'>+	  NAs received for untracked addresses (absent in neighbor cache) are</div><div class='add'>+	  silently ignored.</div><div class='add'>+</div><div class='add'>+	  This is as per router-side behavior documented in RFC9131.</div><div class='add'>+</div><div class='add'>+	  This has lower precedence than drop_unsolicited_na.</div><div class='add'>+</div><div class='add'>+	  This will optimize the return path for the initial off-link</div><div class='add'>+	  communication that is initiated by a directly connected host, by</div><div class='add'>+	  ensuring that the first-hop router which turns on this setting doesn't</div><div class='add'>+	  have to buffer the initial return packets to do neighbor-solicitation.</div><div class='add'>+	  The prerequisite is that the host is configured to send unsolicited</div><div class='add'>+	  neighbor advertisements on interface bringup. This setting should be</div><div class='add'>+	  used in conjunction with the ndisc_notify setting on the host to</div><div class='add'>+	  satisfy this prerequisite.</div><div class='add'>+</div><div class='add'>+	- 2 - Extend option (1) to add a new neighbor cache entry only if the</div><div class='add'>+	  source IP address is in the same subnet as an address configured on</div><div class='add'>+	  the interface that received the neighbor advertisement.</div><div class='add'>+</div><div class='ctx'> enhanced_dad - BOOLEAN</div><div class='ctx'> 	Include a nonce option in the IPv6 neighbor solicitation messages used for</div><div class='ctx'> 	duplicate address detection per RFC7527. A received DAD NS will only signal</div><div class='hunk'>@@ -2521,6 +2721,13 @@ echo_ignore_anycast - BOOLEAN</div><div class='ctx'> </div><div class='ctx'> 	Default: 0</div><div class='ctx'> </div><div class='add'>+error_anycast_as_unicast - BOOLEAN</div><div class='add'>+	If set to 1, then the kernel will respond with ICMP Errors</div><div class='add'>+	resulting from requests sent to it over the IPv6 protocol destined</div><div class='add'>+	to anycast address essentially treating anycast as unicast.</div><div class='add'>+</div><div class='add'>+	Default: 0</div><div class='add'>+</div><div class='ctx'> xfrm6_gc_thresh - INTEGER</div><div class='ctx'> 	(Obsolete since linux-4.14)</div><div class='ctx'> 	The threshold at which we will start garbage collecting for IPv6</div><div class='hunk'>@@ -2621,7 +2828,7 @@ pf_expose - INTEGER</div><div class='ctx'> 	can be got via SCTP_GET_PEER_ADDR_INFO sockopt;  When it's enabled,</div><div class='ctx'> 	a SCTP_PEER_ADDR_CHANGE event will be sent for a transport becoming</div><div class='ctx'> 	SCTP_PF state and a SCTP_PF-state transport info can be got via</div><div class='del'>-	SCTP_GET_PEER_ADDR_INFO sockopt;  When it's diabled, no</div><div class='add'>+	SCTP_GET_PEER_ADDR_INFO sockopt;  When it's disabled, no</div><div class='ctx'> 	SCTP_PEER_ADDR_CHANGE event will be sent and it returns -EACCES when</div><div class='ctx'> 	trying to get a SCTP_PF-state transport info via SCTP_GET_PEER_ADDR_INFO</div><div class='ctx'> 	sockopt.</div><div class='hunk'>@@ -2841,7 +3048,14 @@ sctp_rmem - vector of 3 INTEGERs: min, default, max</div><div class='ctx'> 	Default: 4K</div><div class='ctx'> </div><div class='ctx'> sctp_wmem  - vector of 3 INTEGERs: min, default, max</div><div class='del'>-	Currently this tunable has no effect.</div><div class='add'>+	Only the first value ("min") is used, "default" and "max" are</div><div class='add'>+	ignored.</div><div class='add'>+</div><div class='add'>+	min: Minimum size of send buffer that can be used by SCTP sockets.</div><div class='add'>+	It is guaranteed to each SCTP socket (but not association) even</div><div class='add'>+	under moderate memory pressure.</div><div class='add'>+</div><div class='add'>+	Default: 4K</div><div class='ctx'> </div><div class='ctx'> addr_scope_policy - INTEGER</div><div class='ctx'> 	Control IPv4 address scoping - draft-stewart-tsvwg-sctp-ipv4-00</div><div class='hunk'>@@ -2896,6 +3110,52 @@ plpmtud_probe_interval - INTEGER</div><div class='ctx'> </div><div class='ctx'> 	Default: 0</div><div class='ctx'> </div><div class='add'>+reconf_enable - BOOLEAN</div><div class='add'>+        Enable or disable extension of Stream Reconfiguration functionality</div><div class='add'>+        specified in RFC6525. This extension provides the ability to "reset"</div><div class='add'>+        a stream, and it includes the Parameters of "Outgoing/Incoming SSN</div><div class='add'>+        Reset", "SSN/TSN Reset" and "Add Outgoing/Incoming Streams".</div><div class='add'>+</div><div class='add'>+	- 1: Enable extension.</div><div class='add'>+	- 0: Disable extension.</div><div class='add'>+</div><div class='add'>+	Default: 0</div><div class='add'>+</div><div class='add'>+intl_enable - BOOLEAN</div><div class='add'>+        Enable or disable extension of User Message Interleaving functionality</div><div class='add'>+        specified in RFC8260. This extension allows the interleaving of user</div><div class='add'>+        messages sent on different streams. With this feature enabled, I-DATA</div><div class='add'>+        chunk will replace DATA chunk to carry user messages if also supported</div><div class='add'>+        by the peer. Note that to use this feature, one needs to set this option</div><div class='add'>+        to 1 and also needs to set socket options SCTP_FRAGMENT_INTERLEAVE to 2</div><div class='add'>+        and SCTP_INTERLEAVING_SUPPORTED to 1.</div><div class='add'>+</div><div class='add'>+	- 1: Enable extension.</div><div class='add'>+	- 0: Disable extension.</div><div class='add'>+</div><div class='add'>+	Default: 0</div><div class='add'>+</div><div class='add'>+ecn_enable - BOOLEAN</div><div class='add'>+        Control use of Explicit Congestion Notification (ECN) by SCTP.</div><div class='add'>+        Like in TCP, ECN is used only when both ends of the SCTP connection</div><div class='add'>+        indicate support for it. This feature is useful in avoiding losses</div><div class='add'>+        due to congestion by allowing supporting routers to signal congestion</div><div class='add'>+        before having to drop packets.</div><div class='add'>+</div><div class='add'>+        1: Enable ecn.</div><div class='add'>+        0: Disable ecn.</div><div class='add'>+</div><div class='add'>+        Default: 1</div><div class='add'>+</div><div class='add'>+l3mdev_accept - BOOLEAN</div><div class='add'>+	Enabling this option allows a "global" bound socket to work</div><div class='add'>+	across L3 master domains (e.g., VRFs) with packets capable of</div><div class='add'>+	being received regardless of the L3 domain in which they</div><div class='add'>+	originated. Only valid when the kernel was compiled with</div><div class='add'>+	CONFIG_NET_L3_MASTER_DEV.</div><div class='add'>+</div><div class='add'>+	Default: 1 (enabled)</div><div class='add'>+</div><div class='ctx'> </div><div class='ctx'> ``/proc/sys/net/core/*``</div><div class='ctx'> ========================</div><div class='head'>diff --git a/Documentation/networking/ipvlan.rst b/Documentation/networking/ipvlan.rst<br/>index 694adcba36b0..895d0ccfd596 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ipvlan.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/ipvlan.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ipvlan.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/ipvlan.rst</a></div><div class='hunk'>@@ -11,7 +11,7 @@ Initial Release:</div><div class='ctx'> ================</div><div class='ctx'> This is conceptually very similar to the macvlan driver with one major</div><div class='ctx'> exception of using L3 for mux-ing /demux-ing among slaves. This property makes</div><div class='del'>-the master device share the L2 with it's slave devices. I have developed this</div><div class='add'>+the master device share the L2 with its slave devices. I have developed this</div><div class='ctx'> driver in conjunction with network namespaces and not sure if there is use case</div><div class='ctx'> outside of it.</div><div class='ctx'> </div><div class='hunk'>@@ -61,7 +61,7 @@ e.g.</div><div class='ctx'> IPvlan has two modes of operation - L2 and L3. For a given master device,</div><div class='ctx'> you can select one of these two modes and all slaves on that master will</div><div class='ctx'> operate in the same (selected) mode. The RX mode is almost identical except</div><div class='del'>-that in L3 mode the slaves wont receive any multicast / broadcast traffic.</div><div class='add'>+that in L3 mode the slaves won't receive any multicast / broadcast traffic.</div><div class='ctx'> L3 mode is more restrictive since routing is controlled from the other (mostly)</div><div class='ctx'> default namespace.</div><div class='ctx'> </div><div class='head'>diff --git a/Documentation/networking/ipvs-sysctl.rst b/Documentation/networking/ipvs-sysctl.rst<br/>index 387fda80f05f..3fb5fa142eef 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ipvs-sysctl.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/ipvs-sysctl.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/ipvs-sysctl.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/ipvs-sysctl.rst</a></div><div class='hunk'>@@ -129,6 +129,26 @@ drop_packet - INTEGER</div><div class='ctx'> 	threshold. When the mode 3 is set, the always mode drop rate</div><div class='ctx'> 	is controlled by the /proc/sys/net/ipv4/vs/am_droprate.</div><div class='ctx'> </div><div class='add'>+est_cpulist - CPULIST</div><div class='add'>+	Allowed	CPUs for estimation kthreads</div><div class='add'>+</div><div class='add'>+	Syntax: standard cpulist format</div><div class='add'>+	empty list - stop kthread tasks and estimation</div><div class='add'>+	default - the system's housekeeping CPUs for kthreads</div><div class='add'>+</div><div class='add'>+	Example:</div><div class='add'>+	"all": all possible CPUs</div><div class='add'>+	"0-N": all possible CPUs, N denotes last CPU number</div><div class='add'>+	"0,1-N:1/2": first and all CPUs with odd number</div><div class='add'>+	"": empty list</div><div class='add'>+</div><div class='add'>+est_nice - INTEGER</div><div class='add'>+	default 0</div><div class='add'>+	Valid range: -20 (more favorable) .. 19 (less favorable)</div><div class='add'>+</div><div class='add'>+	Niceness value to use for the estimation kthreads (scheduling</div><div class='add'>+	priority)</div><div class='add'>+</div><div class='ctx'> expire_nodest_conn - BOOLEAN</div><div class='ctx'> 	- 0 - disabled (default)</div><div class='ctx'> 	- not 0 - enabled</div><div class='hunk'>@@ -304,8 +324,8 @@ run_estimation - BOOLEAN</div><div class='ctx'> 	0 - disabled</div><div class='ctx'> 	not 0 - enabled (default)</div><div class='ctx'> </div><div class='del'>-	If disabled, the estimation will be stop, and you can't see</div><div class='del'>-	any update on speed estimation data.</div><div class='add'>+	If disabled, the estimation will be suspended and kthread tasks</div><div class='add'>+	stopped.</div><div class='ctx'> </div><div class='ctx'> 	You can always re-enable estimation by setting this value to 1.</div><div class='ctx'> 	But be careful, the first estimation after re-enable is not</div><div class='head'>diff --git a/Documentation/networking/j1939.rst b/Documentation/networking/j1939.rst<br/>index b705d2801e9c..e4bd7aa1f5aa 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/j1939.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/j1939.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/j1939.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/j1939.rst</a></div><div class='hunk'>@@ -116,7 +116,7 @@ format, the Group Extension is set in the PS-field.</div><div class='ctx'>   ----------------------------------------</div><div class='ctx'>   23 ... 16       15 ... 8</div><div class='ctx'>   ==============  ========================</div><div class='del'>-  F0h ... FFh     GE (Group Extenstion)</div><div class='add'>+  F0h ... FFh     GE (Group Extension)</div><div class='ctx'>   ==============  ========================</div><div class='ctx'> </div><div class='ctx'> On the other hand, when using PDU1 format, the PS-field contains a so-called</div><div class='head'>diff --git a/Documentation/networking/l2tp.rst b/Documentation/networking/l2tp.rst<br/>index 498b382d25a0..7f383e99dbad 100644<br/>--- a/<a href='/cgit/linux-arm.git/tree/Documentation/networking/l2tp.rst?h=devel-stable&amp;id=2eacc8479c1f6610288f619a23c374502176ca66'>Documentation/networking/l2tp.rst</a><br/>+++ b/<a href='/cgit/linux-arm.git/tree/Documentation/networking/l2tp.rst?h=devel-stable&amp;id=53ae158f6ddc14df5c44d62c06e33fdb66de1196'>Documentation/networking/l2tp.rst</a></div><div class='hunk'>@@ -530,7 +530,7 @@ its tunnel close actions. For L2TPIP sockets, the socket's close</div><div class='ctx'> handler initiates the same tunnel close actions. All sessions are</div><div class='ctx'> first closed. Each session drops its tunnel ref. When the tunnel ref</div><div class='ctx'> reaches zero, the tunnel puts its socket ref. When the socket is</div><div class='del'>-eventually destroyed, it's sk_destruct finally frees the L2TP tunnel</div><div class='add'>+eventually destroyed, its sk_destruct finally frees the L2TP tunnel</div><div class='ctx'> context.</div><div class='ctx'> </div><div class='ctx'> Sessions</div><div class='head'>diff --git a/Documentation/networking/mptcp-sysctl.rst b/Documentation/networking/mptcp-sysctl.rst